#include "stdio.h"
typedef struct {
	int N;
	int M;
	int step; 
	float* m;
} mat;

#define get_elem(A, r, c) (A.m[r * A.step + c])
#define set_elem(A, r, c, val) A.m[r * A.step + c] = val
#define BLOCK_SIZE 2

__device__ mat get_submat(mat A, int row, int col) 
{
	mat Asub;
	Asub.M = BLOCK_SIZE;
	Asub.N = BLOCK_SIZE;
	Asub.step = A.step;
	Asub.m = &A.m[A.step * BLOCK_SIZE * row + BLOCK_SIZE * col];
	return Asub;
}

__global__ void matmul(mat A, mat B, mat C)
{
	int blockCol = blockIdx.x;
	int blockRow = blockIdx.y;

	mat Csub = get_submat(C, blockRow, blockCol);

	int row = threadIdx.y;
	int col = threadIdx.x;
	float cij = 0;
	for (int m = 0; m < (A.M / BLOCK_SIZE); ++m) {
		mat Asub = get_submat(A, blockRow, m);

		mat Bsub = get_submat(B, m, blockCol);

		__shared__ float As[BLOCK_SIZE][BLOCK_SIZE];
		__shared__ float Bs[BLOCK_SIZE][BLOCK_SIZE];

		As[row][col] = get_elem(Asub, row, col);
		Bs[row][col] = get_elem(Bsub, row, col);

		__syncthreads();
		for (int e = 0; e < BLOCK_SIZE; ++e)
		cij += As[row][e] * Bs[e][col];

		__syncthreads();
	}

	set_elem(Csub, row, col, cij);
}

int main()
{
	float m1[] = {1,2,3,4,
				5,6,7,8,
				9,10,11,12,
				13,14,15,16};

	float m2[] = {16,15,14,13,
				12,11,10,9,
				8,7,6,5,
				4,3,2,1};

	float *m3 = (float*)malloc(4 * 4 * sizeof(float));

	mat A = { .N = 4, .M = 4, .step = 4, .m = m1 };
	mat B = { .N = 4, .M = 4, .step = 4, .m = m2 };
	mat C = { .N = 4, .M = 4, .step = 4, .m = m3 };

	mat d_A = { .N = A.N, .M = A.M, .step = A.M };
	int size = A.M * A.N * sizeof(float);
	cudaMalloc(&d_A.m, size);
	cudaMemcpy(d_A.m, A.m, size, cudaMemcpyHostToDevice);

	mat d_B = { .N = B.N, .M = B.M, .step = B.M };
	size = B.M * B.N * sizeof(float);
	cudaMalloc(&d_B.m, size);
	cudaMemcpy(d_B.m, B.m, size, cudaMemcpyHostToDevice);

	mat d_C = {  .N = C.N, .M = C.M, .step = C.M};
	size = C.M * C.N * sizeof(float);
	cudaMalloc(&d_C.m, size);

	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid(B.M / dimBlock.x, A.N / dimBlock.y);
	matmul<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);

	cudaMemcpy(C.m, d_C.m, size, cudaMemcpyDeviceToHost);
	
	int N = C.N, M = C.M;
	for (int i = 0; i < N; i++) {
		for (int j = 0; j < M; j++) {
			float elem = C.m[i * C.step + j];
			printf("%f ", elem);
		}
		printf("\n");
	}

	cudaFree(d_A.m);
	cudaFree(d_B.m);
	cudaFree(d_C.m);
	free(m3);
}


	.file	"tmpxft_00238b8e_00000000-6_task42.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10get_submat3matii
	.type	_Z10get_submat3matii, @function
_Z10get_submat3matii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z10get_submat3matii, .-_Z10get_submat3matii
	.globl	_Z31__device_stub__Z6matmul3matS_S_R3matS0_S0_
	.type	_Z31__device_stub__Z6matmul3matS_S_R3matS0_S0_, @function
_Z31__device_stub__Z6matmul3matS_S_R3matS0_S0_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 72(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rdx, 80(%rsp)
	movq	%rsp, %rdx
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	8(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z6matmul3matS_S_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 128
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L4:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z31__device_stub__Z6matmul3matS_S_R3matS0_S0_, .-_Z31__device_stub__Z6matmul3matS_S_R3matS0_S0_
	.globl	_Z6matmul3matS_S_
	.type	_Z6matmul3matS_S_, @function
_Z6matmul3matS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	64(%rsp), %rdx
	leaq	40(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	_Z31__device_stub__Z6matmul3matS_S_R3matS0_S0_
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z6matmul3matS_S_, .-_Z6matmul3matS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"%f "
.LC3:
	.string	"\n"
	.section	.rodata
	.align 32
.LC0:
	.long	1065353216
	.long	1073741824
	.long	1077936128
	.long	1082130432
	.long	1084227584
	.long	1086324736
	.long	1088421888
	.long	1090519040
	.long	1091567616
	.long	1092616192
	.long	1093664768
	.long	1094713344
	.long	1095761920
	.long	1096810496
	.long	1097859072
	.long	1098907648
	.align 32
.LC1:
	.long	1098907648
	.long	1097859072
	.long	1096810496
	.long	1095761920
	.long	1094713344
	.long	1093664768
	.long	1092616192
	.long	1091567616
	.long	1090519040
	.long	1088421888
	.long	1086324736
	.long	1084227584
	.long	1082130432
	.long	1077936128
	.long	1073741824
	.long	1065353216
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC0(%rip), %rsi
	movl	$16, %ecx
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movabsq	$17179869188, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$304, %rsp
	.cfi_def_cfa_offset 352
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	leaq	168(%rsp), %rdi
	rep movsl
	leaq	232(%rsp), %rdi
	leaq	.LC1(%rip), %rsi
	movl	$16, %ecx
	rep movsl
	movl	$64, %edi
	call	malloc@PLT
	leaq	40(%rsp), %rdi
	movl	$64, %esi
	movq	%rbp, 24(%rsp)
	movq	$4, 32(%rsp)
	movq	%rax, %rbx
	xorl	%eax, %eax
	movq	%rax, 40(%rsp)
	call	cudaMalloc@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	leaq	168(%rsp), %rsi
	movl	$64, %edx
	call	cudaMemcpy@PLT
	xorl	%edx, %edx
	leaq	64(%rsp), %rdi
	movl	$64, %esi
	movq	%rdx, 64(%rsp)
	movq	%rbp, 48(%rsp)
	movq	$4, 56(%rsp)
	call	cudaMalloc@PLT
	movq	64(%rsp), %rdi
	movl	$64, %edx
	leaq	232(%rsp), %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	xorl	%ecx, %ecx
	leaq	88(%rsp), %rdi
	movl	$64, %esi
	movq	%rcx, 88(%rsp)
	movq	%rbp, 72(%rsp)
	movq	$4, 80(%rsp)
	call	cudaMalloc@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$8589934594, %rdi
	movl	$1, %esi
	movq	%rdi, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	40(%rsp), %rax
	movups	24(%rsp), %xmm1
	leaq	144(%rsp), %rdx
	leaq	120(%rsp), %rsi
	movups	48(%rsp), %xmm2
	movups	72(%rsp), %xmm3
	leaq	96(%rsp), %rdi
	movq	%rax, 112(%rsp)
	movq	64(%rsp), %rax
	movups	%xmm1, 96(%rsp)
	movq	%rax, 136(%rsp)
	movq	88(%rsp), %rax
	movups	%xmm2, 120(%rsp)
	movq	%rax, 160(%rsp)
	movups	%xmm3, 144(%rsp)
	call	_Z31__device_stub__Z6matmul3matS_S_R3matS0_S0_
.L12:
	movq	88(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	xorl	%r12d, %r12d
	movl	$64, %edx
	leaq	.LC2(%rip), %r14
	call	cudaMemcpy@PLT
.L13:
	movq	%r12, %r13
	xorl	%ebp, %ebp
	salq	$4, %r13
	addq	%rbx, %r13
.L14:
	cvtss2sd	0(%r13,%rbp,4), %xmm0
	movq	%r14, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%rbp
	cmpq	$4, %rbp
	jne	.L14
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r12
	call	__printf_chk@PLT
	cmpq	$4, %r12
	jne	.L13
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$304, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z6matmul3matS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6matmul3matS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "stdio.h"
typedef struct {
	int N;
	int M;
	int step; 
	float* m;
} mat;

#define get_elem(A, r, c) (A.m[r * A.step + c])
#define set_elem(A, r, c, val) A.m[r * A.step + c] = val
#define BLOCK_SIZE 2

__device__ mat get_submat(mat A, int row, int col) 
{
	mat Asub;
	Asub.M = BLOCK_SIZE;
	Asub.N = BLOCK_SIZE;
	Asub.step = A.step;
	Asub.m = &A.m[A.step * BLOCK_SIZE * row + BLOCK_SIZE * col];
	return Asub;
}

__global__ void matmul(mat A, mat B, mat C)
{
	int blockCol = blockIdx.x;
	int blockRow = blockIdx.y;

	mat Csub = get_submat(C, blockRow, blockCol);

	int row = threadIdx.y;
	int col = threadIdx.x;
	float cij = 0;
	for (int m = 0; m < (A.M / BLOCK_SIZE); ++m) {
		mat Asub = get_submat(A, blockRow, m);

		mat Bsub = get_submat(B, m, blockCol);

		__shared__ float As[BLOCK_SIZE][BLOCK_SIZE];
		__shared__ float Bs[BLOCK_SIZE][BLOCK_SIZE];

		As[row][col] = get_elem(Asub, row, col);
		Bs[row][col] = get_elem(Bsub, row, col);

		__syncthreads();
		for (int e = 0; e < BLOCK_SIZE; ++e)
		cij += As[row][e] * Bs[e][col];

		__syncthreads();
	}

	set_elem(Csub, row, col, cij);
}

int main()
{
	float m1[] = {1,2,3,4,
				5,6,7,8,
				9,10,11,12,
				13,14,15,16};

	float m2[] = {16,15,14,13,
				12,11,10,9,
				8,7,6,5,
				4,3,2,1};

	float *m3 = (float*)malloc(4 * 4 * sizeof(float));

	mat A = { .N = 4, .M = 4, .step = 4, .m = m1 };
	mat B = { .N = 4, .M = 4, .step = 4, .m = m2 };
	mat C = { .N = 4, .M = 4, .step = 4, .m = m3 };

	mat d_A = { .N = A.N, .M = A.M, .step = A.M };
	int size = A.M * A.N * sizeof(float);
	hipMalloc(&d_A.m, size);
	hipMemcpy(d_A.m, A.m, size, hipMemcpyHostToDevice);

	mat d_B = { .N = B.N, .M = B.M, .step = B.M };
	size = B.M * B.N * sizeof(float);
	hipMalloc(&d_B.m, size);
	hipMemcpy(d_B.m, B.m, size, hipMemcpyHostToDevice);

	mat d_C = {  .N = C.N, .M = C.M, .step = C.M};
	size = C.M * C.N * sizeof(float);
	hipMalloc(&d_C.m, size);

	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid(B.M / dimBlock.x, A.N / dimBlock.y);
	matmul<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);

	hipMemcpy(C.m, d_C.m, size, hipMemcpyDeviceToHost);
	
	int N = C.N, M = C.M;
	for (int i = 0; i < N; i++) {
		for (int j = 0; j < M; j++) {
			float elem = C.m[i * C.step + j];
			printf("%f ", elem);
		}
		printf("\n");
	}

	hipFree(d_A.m);
	hipFree(d_B.m);
	hipFree(d_C.m);
	free(m3);
}


	.text
	.file	"task42.hip"
	.globl	_Z21__device_stub__matmul3matS_S_ # -- Begin function _Z21__device_stub__matmul3matS_S_
	.type	_Z21__device_stub__matmul3matS_S_,@function
_Z21__device_stub__matmul3matS_S_:      # @_Z21__device_stub__matmul3matS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	128(%rsp), %rax
	leaq	48(%rsp), %rbx
	movq	%rax, (%rbx)
	leaq	152(%rsp), %rax
	movq	%rax, 8(%rbx)
	leaq	176(%rsp), %rax
	movq	%rax, 16(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6matmul3matS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__matmul3matS_S_, .Lfunc_end0-_Z21__device_stub__matmul3matS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3f800000                      # float 1
	.long	0x40000000                      # float 2
	.long	0x40400000                      # float 3
	.long	0x40800000                      # float 4
.LCPI1_1:
	.long	0x40a00000                      # float 5
	.long	0x40c00000                      # float 6
	.long	0x40e00000                      # float 7
	.long	0x41000000                      # float 8
.LCPI1_2:
	.long	0x41100000                      # float 9
	.long	0x41200000                      # float 10
	.long	0x41300000                      # float 11
	.long	0x41400000                      # float 12
.LCPI1_3:
	.long	0x41500000                      # float 13
	.long	0x41600000                      # float 14
	.long	0x41700000                      # float 15
	.long	0x41800000                      # float 16
.LCPI1_4:
	.long	0x41800000                      # float 16
	.long	0x41700000                      # float 15
	.long	0x41600000                      # float 14
	.long	0x41500000                      # float 13
.LCPI1_5:
	.long	0x41400000                      # float 12
	.long	0x41300000                      # float 11
	.long	0x41200000                      # float 10
	.long	0x41100000                      # float 9
.LCPI1_6:
	.long	0x41000000                      # float 8
	.long	0x40e00000                      # float 7
	.long	0x40c00000                      # float 6
	.long	0x40a00000                      # float 5
.LCPI1_7:
	.long	0x40800000                      # float 4
	.long	0x40400000                      # float 3
	.long	0x40000000                      # float 2
	.long	0x3f800000                      # float 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$392, %rsp                      # imm = 0x188
	.cfi_def_cfa_offset 448
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movaps	.LCPI1_0(%rip), %xmm0           # xmm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0]
	leaq	320(%rsp), %r15
	movaps	%xmm0, (%r15)
	movaps	.LCPI1_1(%rip), %xmm0           # xmm0 = [5.0E+0,6.0E+0,7.0E+0,8.0E+0]
	movaps	%xmm0, 16(%r15)
	movaps	.LCPI1_2(%rip), %xmm0           # xmm0 = [9.0E+0,1.0E+1,1.1E+1,1.2E+1]
	movaps	%xmm0, 32(%r15)
	movaps	.LCPI1_3(%rip), %xmm0           # xmm0 = [1.3E+1,1.4E+1,1.5E+1,1.6E+1]
	movaps	%xmm0, 48(%r15)
	movaps	.LCPI1_4(%rip), %xmm0           # xmm0 = [1.6E+1,1.5E+1,1.4E+1,1.3E+1]
	leaq	256(%rsp), %r14
	movaps	%xmm0, (%r14)
	movaps	.LCPI1_5(%rip), %xmm0           # xmm0 = [1.2E+1,1.1E+1,1.0E+1,9.0E+0]
	movaps	%xmm0, 16(%r14)
	movaps	.LCPI1_6(%rip), %xmm0           # xmm0 = [8.0E+0,7.0E+0,6.0E+0,5.0E+0]
	movaps	%xmm0, 32(%r14)
	movaps	.LCPI1_7(%rip), %xmm0           # xmm0 = [4.0E+0,3.0E+0,2.0E+0,1.0E+0]
	movaps	%xmm0, 48(%r14)
	movl	$64, %edi
	callq	malloc
	movq	%rax, (%rsp)                    # 8-byte Spill
	movabsq	$17179869188, %r13              # imm = 0x400000004
	leaq	72(%rsp), %r12
	movq	%r13, -16(%r12)
	movl	$4, %ebp
	movl	%ebp, -8(%r12)
	xorl	%ebx, %ebx
	movq	%rbx, (%r12)
	movl	$64, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$64, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %r15
	movq	%r13, -16(%r15)
	movl	%ebp, -8(%r15)
	movq	%rbx, (%r15)
	movl	$64, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$64, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rdi
	movq	%r13, -16(%rdi)
	movl	%ebp, -8(%rdi)
	movq	%rbx, (%rdi)
	movl	$64, %esi
	callq	hipMalloc
	movabsq	$8589934594, %rdi               # imm = 0x200000002
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	72(%rsp), %rax
	leaq	128(%rsp), %rcx
	movq	%rax, 16(%rcx)
	movups	56(%rsp), %xmm0
	movaps	%xmm0, (%rcx)
	movq	48(%rsp), %rax
	leaq	160(%rsp), %rdx
	movq	%rax, 16(%rdx)
	movups	32(%rsp), %xmm0
	movaps	%xmm0, (%rdx)
	movq	24(%rsp), %rax
	leaq	192(%rsp), %rsi
	movq	%rax, 16(%rsi)
	movups	8(%rsp), %xmm0
	movaps	%xmm0, (%rsi)
	leaq	224(%rsp), %r14
	movq	%rcx, (%r14)
	movq	%rdx, 8(%r14)
	movq	%rsi, 16(%r14)
	leaq	112(%rsp), %r15
	leaq	96(%rsp), %r12
	leaq	88(%rsp), %r13
	leaq	80(%rsp), %rbp
	movq	%r15, %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movq	%rbp, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r15), %rsi
	movl	8(%r15), %edx
	movq	(%r12), %rcx
	movl	8(%r12), %r8d
	movl	$_Z6matmul3matS_S_, %edi
	movq	%r14, %r9
	pushq	(%rbp)
	.cfi_adjust_cfa_offset 8
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB1_2:
	movq	24(%rsp), %rsi
	movl	$64, %edx
	movq	(%rsp), %r12                    # 8-byte Reload
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%ebx, %ebx
	movq	%r12, %r14
.LBB1_3:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	xorl	%r15d, %r15d
.LBB1_4:                                #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	$4, %r15
	jne	.LBB1_4
# %bb.5:                                #   in Loop: Header=BB1_3 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbx
	addq	$16, %r14
	cmpq	$4, %rbx
	jne	.LBB1_3
# %bb.6:
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	%r12, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$392, %rsp                      # imm = 0x188
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6matmul3matS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6matmul3matS_S_,@object       # @_Z6matmul3matS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z6matmul3matS_S_
	.p2align	3, 0x0
_Z6matmul3matS_S_:
	.quad	_Z21__device_stub__matmul3matS_S_
	.size	_Z6matmul3matS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%f "
	.size	.L.str, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6matmul3matS_S_"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__matmul3matS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6matmul3matS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6matmul3matS_S_       ; -- Begin function _Z6matmul3matS_S_
	.globl	_Z6matmul3matS_S_
	.p2align	8
	.type	_Z6matmul3matS_S_,@function
_Z6matmul3matS_S_:                      ; @_Z6matmul3matS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x4
	s_load_b64 s[2:3], s[0:1], 0x40
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 2
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_clause 0x3
	s_load_b32 s5, s[0:1], 0x8
	s_load_b32 s9, s[0:1], 0x20
	s_load_b64 s[6:7], s[0:1], 0x10
	s_load_b64 s[10:11], s[0:1], 0x28
	v_lshlrev_b32_e32 v2, 2, v0
	v_lshlrev_b32_e32 v3, 3, v1
	s_lshr_b32 s8, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_add_i32 s4, s4, s8
	v_add_nc_u32_e32 v4, 16, v2
	s_ashr_i32 s8, s4, 1
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[5:6], null, s5, v1, v[0:1]
	v_mad_u64_u32 v[7:8], null, s9, v1, v[0:1]
	s_mul_i32 s4, s15, s5
	s_lshl_b32 s9, s9, 1
	s_lshl_b32 s4, s4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[9:10], 2, v[5:6]
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v5, v3, v2
	v_lshlrev_b64 v[11:12], 2, v[7:8]
	v_add_nc_u32_e32 v6, v4, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v10, vcc_lo
	v_add_co_u32 v9, vcc_lo, s10, v11
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v12, vcc_lo
	s_lshl_b32 s6, s14, 1
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_ashr_i32 s5, s4, 31
	s_ashr_i32 s7, s6, 31
	s_lshl_b64 s[10:11], s[4:5], 2
	s_add_i32 s8, s8, -1
	v_add_co_u32 v11, vcc_lo, v7, s10
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v8, vcc_lo
	s_lshl_b64 s[10:11], s[6:7], 2
	s_add_i32 s4, s4, 2
	v_add_co_u32 v13, vcc_lo, v9, s10
	v_add_co_ci_u32_e32 v14, vcc_lo, s11, v10, vcc_lo
	global_load_b32 v11, v[11:12], off
	global_load_b32 v12, v[13:14], off
	s_add_i32 s6, s6, s9
	s_cmp_eq_u32 s8, 0
	s_waitcnt vmcnt(1)
	ds_store_b32 v5, v11
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b64 v[11:12], v3
	ds_load_2addr_b32 v[13:14], v4 offset1:2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_fmac_f32_e32 v2, v11, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v2, v12, v14
	s_cbranch_scc0 .LBB0_2
.LBB0_3:                                ; %Flow89
	s_load_b32 s0, s[0:1], 0x38
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[3:4], null, s0, v1, v[0:1]
	s_mul_i32 s0, s0, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s14
	s_lshl_b32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s1, s0, 31
	v_ashrrev_i32_e32 v4, 31, v3
	s_lshl_b64 s[0:1], s[0:1], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6matmul3matS_S_
		.amdhsa_group_segment_fixed_size 32
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 72
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6matmul3matS_S_, .Lfunc_end0-_Z6matmul3matS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 492
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 32 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           24
        .value_kind:     by_value
      - .offset:         24
        .size:           24
        .value_kind:     by_value
      - .offset:         48
        .size:           24
        .value_kind:     by_value
    .group_segment_fixed_size: 32
    .kernarg_segment_align: 8
    .kernarg_segment_size: 72
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6matmul3matS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6matmul3matS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
