#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <cuda.h>

#define PI 3.1415

void gauss (int sigma, int gauss_matrix[][5]);
void gpuComputing(int gauss_matrix[][5], int** image_matrix, int** final_matrix, int height, int width);

__global__ void kernel(int* image, int* final, int* gauss, int pitch, int pitch_i, int pitch_f, int height, int width)
{
	int abs_Pos, c, r;
	int x, aux, aux2;
	int gauss_element;
	int image_element;
	int tid = threadIdx.x;

	float result;

	/** Todos los threads de un bloque comparten la misma fila **/
	__shared__ int fila;

	fila = blockIdx.x + 2;

	/** Los threads van recorriendo la fila cada 512 casilleros **/
	while(tid < width - 4)
	{
		result = 0;

		/** Posicion absoluta del thread en el arreglo con la imagen **/
		abs_Pos = fila * width + (tid +2);

		/** Posicion x en la matriz **/
		x = abs_Pos % width;

		/** Recorre la matriz de gauss y simultaneamente copia los valores necesarios de
		 ** la matriz de imagen para realizar el calculo **/
		for (r = 0; r < 5; ++r) {
			aux = r - 2;
			int* gauss_row = (int*)((char*)gauss + r * pitch);
			int* image_row = (int*)((char*)image + ((fila + aux) * pitch));
			for (c = 0; c < 5; ++c)
			{
				aux2 = c - 2;
				gauss_element = gauss_row[c];
				image_element = image_row[x + aux2];
				result += (gauss_element * image_element)/273;
				
			}
		}
		
		/** Guarda el valor a la celda correspondiente en la imagen final **/
		int* final_row = (int*)((char*)final +  blockIdx.x * pitch_f);
		final_row[tid] = result;
		
		/** Incremento para realizar todas las operaciones de una fila en un bloque **/
		tid += 512;
	}	
	return;
}


int main(int argc, char *argv[])
{
	int width, height, i, j;
	int **image_matrix, **final_matrix, **auxiliar_matrix;
	int gauss_matrix[5][5];
	int sigma = (int)strtod(argv[2], NULL);
	int *temp, *temp2, *temp3;

	/** Lectura del archivo contenedor de los datos **/
	FILE *in_f = fopen(argv[1], "r");
	
	/** Lee el ancho de la matriz **/
	fscanf(in_f, "%d", &width);
	/** Lee el alto de la matriz **/
	fscanf(in_f, "%d", &height);

	/** Arreglo dinamico 2D para almacenar la matriz **/
	image_matrix = (int**)malloc(width * sizeof(int*));
	temp = (int*)malloc(width * height * sizeof(int));
	for(i = 0; i < width; i++)
		image_matrix[i] = temp + (i * height);

	/** Arrelgo dinamico 2D con 4 filas y columnas adicionales **/
	auxiliar_matrix = (int**)malloc((width + 4) * sizeof(int*));
	temp2 = (int*)malloc((width + 4) * (height + 4) * sizeof(int));
	for(i = 0; i < (width + 4); i++)
		auxiliar_matrix[i] = temp2 + (i * (height + 4));

	/** Arreglo dinamico 2D para almacenar el resultado final **/
	final_matrix = (int**)malloc(width * sizeof(int*));
	temp3 = (int*)malloc(width * height * sizeof(int));
	for(i = 0; i < width; i++)
		final_matrix[i] = temp3 + (i * height );

	/** Lee los valores del archivo y los almacena en image_matrix **/
	for (i = 0; i < width; i++)
	{
		for(j = 0; j < height; j++)
			fscanf(in_f, "%d", &image_matrix[i][j]);
	}
	fclose(in_f);

	/** Calculo de la matriz con los valores del filtro **/
	gauss(sigma, gauss_matrix);
	
	/** Desplazamiento de la matriz 2 filas hacia arriba y 2 hacia la izquierda **/
	for(i = 2; i < width + 2; i++)
	{
		for(j = 2; j < height + 2; j++){
			auxiliar_matrix[i][j] = image_matrix[i-2][j-2];
		}
	}

	/** Reflexion de filas **/
	for(i = 2; i < width + 2; i++)
	{
		auxiliar_matrix[i][0] = auxiliar_matrix[i][4];
		auxiliar_matrix[i][1] = auxiliar_matrix[i][3];
		auxiliar_matrix[i][height + 2] = auxiliar_matrix[i][height];
		auxiliar_matrix[i][height + 3] = auxiliar_matrix[i][height-1];
	}

	/** Reflexion de columnas **/
	for(i = 0; i < height + 4; i++)
	{
		auxiliar_matrix[0][i] = auxiliar_matrix[4][i];
		auxiliar_matrix[1][i] = auxiliar_matrix[3][i];
		auxiliar_matrix[width + 2][i] = auxiliar_matrix[width][i];
		auxiliar_matrix[width + 3][i] = auxiliar_matrix[width-1][i];
	}

	gpuComputing(gauss_matrix, auxiliar_matrix, final_matrix, height, width);
	
	/** Abre archivo que contendra los valores finales **/
	FILE *out = fopen("salida", "w");
	for (i = 0; i < height; i++)
	{
		for (j = 0; j < width; j++)
		{
			if ( j != width - 1)
				fprintf(out, "%d\t", final_matrix[i][j]);
			else if (i != height-1)
				fprintf(out, "%d\n", final_matrix[i][j]);
			else
				fprintf(out, "%d", final_matrix[i][j]);
		}
	}
	fclose(out);

	/** Liberacion de memoria correspondiente a las 3 matrices **/
	free(temp);
	free(temp2);
	free(temp3);

	return 0;
}

void gauss(int sigma, int gauss_matrix[][5])
{
	int i, j;
	int x = -2, y = 2;
	double u, v, varianza;
	double operation;

	for(i = 0; i < 5; i++)
	{
		for(j = 0; j < 5; j++)
		{
			u = pow(x,2);
			v = pow(y,2);
			varianza = pow(sigma,2);

			operation = 273.0*exp((-u-v)/(2.0*varianza))/(2.0*PI*varianza);
			gauss_matrix[i][j] = (int)ceil(operation);
			x++;
		}
		y--;
		x = -2;
	}
	return;
}


void gpuComputing(int gauss_matrix[][5], int** image_matrix, int** final_matrix, int height, int width)
{
	int *d_image, *d_final, *d_gauss;
	int r_height = height + 4;
	int r_width = width + 4;

	size_t pitch, pitch_i, pitch_f;

	/** Metodo que entrega la direccion del arreglo en el dispositivo **/
	cudaMallocPitch(&d_gauss, &pitch, 5 * sizeof(int), 5);
	cudaMallocPitch(&d_image, &pitch_i, r_width * sizeof(int), r_height);
	cudaMallocPitch(&d_final, &pitch_f, width * sizeof(int), height);
	
	/** Traspaso de los datos desde el host al dispositivo **/
	cudaMemcpy2D(d_gauss, pitch, *gauss_matrix, 5 * sizeof(int), 5 * sizeof(int), 5, cudaMemcpyHostToDevice);
	cudaMemcpy2D(d_image, pitch_i, *image_matrix, r_width * sizeof(int), r_width * sizeof(int), r_height, cudaMemcpyHostToDevice);

	/** Llamada al kernel, si bien su implementacion pudo ser mas eficiente, los tiempos permanecen bajos **/
	kernel<<<height, 512>>>(d_image, d_final, d_gauss, pitch, pitch_i, pitch_f, r_height, r_width);

	/** Traspaso del resultado final **/
	cudaMemcpy2D(*final_matrix, width*sizeof(int), d_final, pitch_f, width*sizeof(int), height, cudaMemcpyDeviceToHost);
	
	cudaFree(d_final);
	cudaFree(d_image);
	cudaFree(d_gauss);

	return;
}

	.file	"tmpxft_002fd6e4_00000000-6_Gauss.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z5gaussiPA5_i
	.type	_Z5gaussiPA5_i, @function
_Z5gaussiPA5_i:
.LFB2028:
	.cfi_startproc
	endbr64
	cvtsi2sdl	%edi, %xmm0
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$2, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	mulsd	%xmm0, %xmm0
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movaps	%xmm0, %xmm2
	movsd	%xmm0, 8(%rsp)
	addsd	%xmm0, %xmm2
	movsd	%xmm2, 16(%rsp)
.L3:
	cvtsi2sdl	%r12d, %xmm0
	xorl	%ebx, %ebx
	mulsd	%xmm0, %xmm0
	movsd	%xmm0, 24(%rsp)
.L4:
	leal	-2(%rbx), %eax
	cvtsi2sdl	%eax, %xmm0
	mulsd	%xmm0, %xmm0
	xorps	.LC0(%rip), %xmm0
	subsd	24(%rsp), %xmm0
	divsd	16(%rsp), %xmm0
	call	exp@PLT
	movsd	8(%rsp), %xmm1
	mulsd	.LC1(%rip), %xmm0
	mulsd	.LC2(%rip), %xmm1
	divsd	%xmm1, %xmm0
	call	ceil@PLT
	cvttsd2sil	%xmm0, %eax
	movl	%eax, 0(%rbp,%rbx,4)
	incq	%rbx
	cmpq	$5, %rbx
	jne	.L4
	decl	%r12d
	addq	$20, %rbp
	cmpl	$-3, %r12d
	jne	.L3
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z5gaussiPA5_i, .-_Z5gaussiPA5_i
	.globl	_Z34__device_stub__Z6kernelPiS_S_iiiiiPiS_S_iiiii
	.type	_Z34__device_stub__Z6kernelPiS_S_iiiiiPiS_S_iiiii, @function
_Z34__device_stub__Z6kernelPiS_S_iiiiiPiS_S_iiiii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z6kernelPiS_S_iiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L9:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z34__device_stub__Z6kernelPiS_S_iiiiiPiS_S_iiiii, .-_Z34__device_stub__Z6kernelPiS_S_iiiiiPiS_S_iiiii
	.globl	_Z6kernelPiS_S_iiiii
	.type	_Z6kernelPiS_S_iiiii, @function
_Z6kernelPiS_S_iiiii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z6kernelPiS_S_iiiiiPiS_S_iiiii
	.cfi_endproc
.LFE2055:
	.size	_Z6kernelPiS_S_iiiii, .-_Z6kernelPiS_S_iiiii
	.globl	_Z12gpuComputingPA5_iPPiS2_ii
	.type	_Z12gpuComputingPA5_iPPiS2_ii, @function
_Z12gpuComputingPA5_iPPiS2_ii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leal	4(%rcx), %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	movl	$20, %edx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	leal	4(%r8), %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	movl	$5, %ecx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rsi
	leaq	48(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	cudaMallocPitch@PLT
	movslq	%ebp, %rax
	leaq	64(%rsp), %rsi
	movslq	%r14d, %rcx
	leaq	0(,%rax,4), %r15
	leaq	32(%rsp), %rdi
	movq	%r15, %rdx
	call	cudaMallocPitch@PLT
	movslq	%ebx, %rax
	leaq	72(%rsp), %rsi
	movslq	%ebx, %rcx
	movq	%rax, 16(%rsp)
	leaq	-16(%r15), %rax
	leaq	40(%rsp), %rdi
	movq	%rax, %rdx
	movq	%rax, 8(%rsp)
	call	cudaMallocPitch@PLT
	movl	$5, %r9d
	movl	$20, %ecx
	pushq	%r8
	.cfi_def_cfa_offset 184
	movl	$20, %r8d
	pushq	$1
	.cfi_def_cfa_offset 192
	movq	40(%rsp), %rdx
	movq	72(%rsp), %rsi
	movq	64(%rsp), %rdi
	call	cudaMemcpy2D@PLT
	movq	80(%rsp), %rsi
	movslq	%r14d, %r9
	movq	%r15, %r8
	movq	48(%rsp), %rdi
	movq	0(%r13), %rdx
	movq	%r15, %rcx
	movl	$1, (%rsp)
	call	cudaMemcpy2D@PLT
	movl	%ebx, 96(%rsp)
	movl	$8388609, %edx
	movabsq	$4294967297, %rax
	movq	%rax, 100(%rsp)
	popq	%r9
	.cfi_def_cfa_offset 184
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	popq	%r10
	.cfi_def_cfa_offset 176
	movq	80(%rsp), %rdi
	salq	$9, %rdx
	movl	$1, %ecx
	movl	88(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	%rbp
	.cfi_def_cfa_offset 184
	pushq	%r14
	.cfi_def_cfa_offset 192
	movl	88(%rsp), %r9d
	movl	80(%rsp), %r8d
	movl	72(%rsp), %ecx
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z34__device_stub__Z6kernelPiS_S_iiiiiPiS_S_iiiii
	popq	%rsi
	.cfi_def_cfa_offset 184
	popq	%rdi
	.cfi_def_cfa_offset 176
.L15:
	pushq	%rax
	.cfi_def_cfa_offset 184
	movq	(%r12), %rdi
	pushq	$2
	.cfi_def_cfa_offset 192
	movq	24(%rsp), %r8
	movq	32(%rsp), %r9
	movq	88(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	%r8, %rsi
	call	cudaMemcpy2D@PLT
	popq	%rdx
	.cfi_def_cfa_offset 184
	popq	%rcx
	.cfi_def_cfa_offset 176
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z12gpuComputingPA5_iPPiS2_ii, .-_Z12gpuComputingPA5_iPPiS2_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"r"
.LC4:
	.string	"%d"
.LC5:
	.string	"w"
.LC6:
	.string	"salida"
.LC7:
	.string	"%d\t"
.LC8:
	.string	"%d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movq	16(%rsi), %rdi
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	call	strtod@PLT
	movq	8(%rbx), %rdi
	leaq	.LC3(%rip), %rsi
	cvttsd2sil	%xmm0, %eax
	movl	%eax, 28(%rsp)
	call	fopen@PLT
	leaq	44(%rsp), %rdx
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movq	(%rsp), %rdi
	leaq	48(%rsp), %rdx
	xorl	%eax, %eax
	leaq	.LC4(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movslq	44(%rsp), %rbp
	movq	%rbp, %rbx
	salq	$3, %rbp
	movq	%rbp, %rdi
	call	malloc@PLT
	movslq	48(%rsp), %r15
	movq	%rax, %r12
	movl	%ebx, %eax
	imull	%r15d, %eax
	movq	%r15, %r13
	salq	$2, %r15
	cltq
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	%rax, 16(%rsp)
	movq	%rax, %rdx
	xorl	%eax, %eax
.L19:
	cmpl	%eax, %ebx
	jle	.L47
	movq	%rdx, (%r12,%rax,8)
	incq	%rax
	addq	%r15, %rdx
	jmp	.L19
.L47:
	leaq	32(%rbp), %rdi
	addl	$4, %r13d
	call	malloc@PLT
	leal	4(%rbx), %edi
	imull	%r13d, %edi
	movq	%rax, %r14
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	leaq	16(%r15), %rsi
	leal	3(%rbx), %ecx
	movq	%rax, %r13
	movq	%rax, %rdx
	xorl	%eax, %eax
.L21:
	cmpl	%eax, %ecx
	jl	.L48
	movq	%rdx, (%r14,%rax,8)
	incq	%rax
	addq	%rsi, %rdx
	jmp	.L21
.L48:
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rax, 8(%rsp)
	movq	%rax, %rdx
	xorl	%eax, %eax
.L23:
	cmpl	%eax, %ebx
	jle	.L49
	movq	%rdx, 0(%rbp,%rax,8)
	incq	%rax
	addq	%r15, %rdx
	jmp	.L23
.L49:
	xorl	%ebx, %ebx
.L25:
	cmpl	%ebx, 44(%rsp)
	jle	.L50
	xorl	%r15d, %r15d
.L27:
	cmpl	%r15d, 48(%rsp)
	jle	.L51
	movq	(%r12,%rbx,8), %rax
	movq	(%rsp), %rdi
	leaq	.LC4(%rip), %rsi
	leaq	(%rax,%r15,4), %rdx
	xorl	%eax, %eax
	incq	%r15
	call	__isoc23_fscanf@PLT
	jmp	.L27
.L51:
	incq	%rbx
	jmp	.L25
.L50:
	movq	(%rsp), %rdi
	call	fclose@PLT
	movl	28(%rsp), %edi
	leaq	52(%rsp), %rsi
	call	_Z5gaussiPA5_i
	movl	44(%rsp), %r8d
	movl	48(%rsp), %ecx
	movl	$2, %eax
	leal	1(%r8), %edi
	leal	1(%rcx), %r10d
.L28:
	cmpl	%eax, %edi
	jl	.L52
	xorl	%edx, %edx
	movl	$2, %esi
.L30:
	cmpl	%esi, %r10d
	jl	.L53
	movq	-16(%r12,%rax,8), %rbx
	movq	(%r14,%rax,8), %r11
	incl	%esi
	movl	(%rbx,%rdx), %ebx
	movl	%ebx, 8(%r11,%rdx)
	addq	$4, %rdx
	jmp	.L30
.L53:
	incq	%rax
	jmp	.L28
.L52:
	movslq	%ecx, %rdx
	movl	$2, %esi
	salq	$2, %rdx
	leaq	8(%rdx), %r10
	leaq	-4(%rdx), %r11
	leaq	12(%rdx), %rbx
.L31:
	cmpl	%esi, %edi
	jl	.L54
	movq	(%r14,%rsi,8), %rax
	incq	%rsi
	movl	16(%rax), %r12d
	movl	%r12d, (%rax)
	movl	12(%rax), %r12d
	movl	%r12d, 4(%rax)
	movl	(%rax,%rdx), %r12d
	movl	%r12d, (%rax,%r10)
	movl	(%rax,%r11), %r12d
	movl	%r12d, (%rax,%rbx)
	jmp	.L31
.L54:
	movslq	%r8d, %rax
	leal	3(%rcx), %edx
	salq	$3, %rax
	leaq	(%r14,%rax), %rsi
	leaq	16(%r14,%rax), %rdi
	leaq	-8(%r14,%rax), %r10
	leaq	24(%r14,%rax), %r11
	xorl	%eax, %eax
.L33:
	cmpl	%eax, %edx
	jl	.L55
	movq	32(%r14), %rbx
	movl	(%rbx,%rax,4), %r12d
	movq	(%r14), %rbx
	movl	%r12d, (%rbx,%rax,4)
	movq	24(%r14), %rbx
	movl	(%rbx,%rax,4), %r12d
	movq	8(%r14), %rbx
	movl	%r12d, (%rbx,%rax,4)
	movq	(%rsi), %rbx
	movl	(%rbx,%rax,4), %r12d
	movq	(%rdi), %rbx
	movl	%r12d, (%rbx,%rax,4)
	movq	(%r10), %rbx
	movl	(%rbx,%rax,4), %r12d
	movq	(%r11), %rbx
	movl	%r12d, (%rbx,%rax,4)
	incq	%rax
	jmp	.L33
.L55:
	movq	%r14, %rsi
	leaq	52(%rsp), %rdi
	movq	%rbp, %rdx
	xorl	%ebx, %ebx
	call	_Z12gpuComputingPA5_iPPiS2_ii
	leaq	.LC5(%rip), %rsi
	leaq	.LC6(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %r14
.L35:
	movl	%ebx, %r15d
	cmpl	48(%rsp), %ebx
	jge	.L56
	xorl	%r12d, %r12d
.L40:
	movl	44(%rsp), %eax
	cmpl	%eax, %r12d
	jge	.L57
	movq	0(%rbp,%rbx,8), %rdx
	decl	%eax
	movl	(%rdx,%r12,4), %ecx
	leaq	.LC7(%rip), %rdx
	cmpl	%r12d, %eax
	jne	.L46
	movl	48(%rsp), %eax
	leaq	.LC8(%rip), %rdx
	decl	%eax
	cmpl	%r15d, %eax
	jne	.L46
	leaq	.LC4(%rip), %rdx
.L46:
	movl	$2, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	incq	%r12
	call	__fprintf_chk@PLT
	jmp	.L40
.L57:
	incq	%rbx
	jmp	.L35
.L56:
	movq	%r14, %rdi
	call	fclose@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L41
	call	__stack_chk_fail@PLT
.L41:
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z6kernelPiS_S_iiiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelPiS_S_iiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC0:
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	0
	.long	1081151488
	.align 8
.LC2:
	.long	-1065151889
	.long	1075388874
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <hip/hip_runtime.h>

#define PI 3.1415

void gauss (int sigma, int gauss_matrix[][5]);
void gpuComputing(int gauss_matrix[][5], int** image_matrix, int** final_matrix, int height, int width);

__global__ void kernel(int* image, int* final, int* gauss, int pitch, int pitch_i, int pitch_f, int height, int width)
{
	int abs_Pos, c, r;
	int x, aux, aux2;
	int gauss_element;
	int image_element;
	int tid = threadIdx.x;

	float result;

	/** Todos los threads de un bloque comparten la misma fila **/
	__shared__ int fila;

	fila = blockIdx.x + 2;

	/** Los threads van recorriendo la fila cada 512 casilleros **/
	while(tid < width - 4)
	{
		result = 0;

		/** Posicion absoluta del thread en el arreglo con la imagen **/
		abs_Pos = fila * width + (tid +2);

		/** Posicion x en la matriz **/
		x = abs_Pos % width;

		/** Recorre la matriz de gauss y simultaneamente copia los valores necesarios de
		 ** la matriz de imagen para realizar el calculo **/
		for (r = 0; r < 5; ++r) {
			aux = r - 2;
			int* gauss_row = (int*)((char*)gauss + r * pitch);
			int* image_row = (int*)((char*)image + ((fila + aux) * pitch));
			for (c = 0; c < 5; ++c)
			{
				aux2 = c - 2;
				gauss_element = gauss_row[c];
				image_element = image_row[x + aux2];
				result += (gauss_element * image_element)/273;
				
			}
		}
		
		/** Guarda el valor a la celda correspondiente en la imagen final **/
		int* final_row = (int*)((char*)final +  blockIdx.x * pitch_f);
		final_row[tid] = result;
		
		/** Incremento para realizar todas las operaciones de una fila en un bloque **/
		tid += 512;
	}	
	return;
}


int main(int argc, char *argv[])
{
	int width, height, i, j;
	int **image_matrix, **final_matrix, **auxiliar_matrix;
	int gauss_matrix[5][5];
	int sigma = (int)strtod(argv[2], NULL);
	int *temp, *temp2, *temp3;

	/** Lectura del archivo contenedor de los datos **/
	FILE *in_f = fopen(argv[1], "r");
	
	/** Lee el ancho de la matriz **/
	fscanf(in_f, "%d", &width);
	/** Lee el alto de la matriz **/
	fscanf(in_f, "%d", &height);

	/** Arreglo dinamico 2D para almacenar la matriz **/
	image_matrix = (int**)malloc(width * sizeof(int*));
	temp = (int*)malloc(width * height * sizeof(int));
	for(i = 0; i < width; i++)
		image_matrix[i] = temp + (i * height);

	/** Arrelgo dinamico 2D con 4 filas y columnas adicionales **/
	auxiliar_matrix = (int**)malloc((width + 4) * sizeof(int*));
	temp2 = (int*)malloc((width + 4) * (height + 4) * sizeof(int));
	for(i = 0; i < (width + 4); i++)
		auxiliar_matrix[i] = temp2 + (i * (height + 4));

	/** Arreglo dinamico 2D para almacenar el resultado final **/
	final_matrix = (int**)malloc(width * sizeof(int*));
	temp3 = (int*)malloc(width * height * sizeof(int));
	for(i = 0; i < width; i++)
		final_matrix[i] = temp3 + (i * height );

	/** Lee los valores del archivo y los almacena en image_matrix **/
	for (i = 0; i < width; i++)
	{
		for(j = 0; j < height; j++)
			fscanf(in_f, "%d", &image_matrix[i][j]);
	}
	fclose(in_f);

	/** Calculo de la matriz con los valores del filtro **/
	gauss(sigma, gauss_matrix);
	
	/** Desplazamiento de la matriz 2 filas hacia arriba y 2 hacia la izquierda **/
	for(i = 2; i < width + 2; i++)
	{
		for(j = 2; j < height + 2; j++){
			auxiliar_matrix[i][j] = image_matrix[i-2][j-2];
		}
	}

	/** Reflexion de filas **/
	for(i = 2; i < width + 2; i++)
	{
		auxiliar_matrix[i][0] = auxiliar_matrix[i][4];
		auxiliar_matrix[i][1] = auxiliar_matrix[i][3];
		auxiliar_matrix[i][height + 2] = auxiliar_matrix[i][height];
		auxiliar_matrix[i][height + 3] = auxiliar_matrix[i][height-1];
	}

	/** Reflexion de columnas **/
	for(i = 0; i < height + 4; i++)
	{
		auxiliar_matrix[0][i] = auxiliar_matrix[4][i];
		auxiliar_matrix[1][i] = auxiliar_matrix[3][i];
		auxiliar_matrix[width + 2][i] = auxiliar_matrix[width][i];
		auxiliar_matrix[width + 3][i] = auxiliar_matrix[width-1][i];
	}

	gpuComputing(gauss_matrix, auxiliar_matrix, final_matrix, height, width);
	
	/** Abre archivo que contendra los valores finales **/
	FILE *out = fopen("salida", "w");
	for (i = 0; i < height; i++)
	{
		for (j = 0; j < width; j++)
		{
			if ( j != width - 1)
				fprintf(out, "%d\t", final_matrix[i][j]);
			else if (i != height-1)
				fprintf(out, "%d\n", final_matrix[i][j]);
			else
				fprintf(out, "%d", final_matrix[i][j]);
		}
	}
	fclose(out);

	/** Liberacion de memoria correspondiente a las 3 matrices **/
	free(temp);
	free(temp2);
	free(temp3);

	return 0;
}

void gauss(int sigma, int gauss_matrix[][5])
{
	int i, j;
	int x = -2, y = 2;
	double u, v, varianza;
	double operation;

	for(i = 0; i < 5; i++)
	{
		for(j = 0; j < 5; j++)
		{
			u = pow(x,2);
			v = pow(y,2);
			varianza = pow(sigma,2);

			operation = 273.0*exp((-u-v)/(2.0*varianza))/(2.0*PI*varianza);
			gauss_matrix[i][j] = (int)ceil(operation);
			x++;
		}
		y--;
		x = -2;
	}
	return;
}


void gpuComputing(int gauss_matrix[][5], int** image_matrix, int** final_matrix, int height, int width)
{
	int *d_image, *d_final, *d_gauss;
	int r_height = height + 4;
	int r_width = width + 4;

	size_t pitch, pitch_i, pitch_f;

	/** Metodo que entrega la direccion del arreglo en el dispositivo **/
	hipMallocPitch(&d_gauss, &pitch, 5 * sizeof(int), 5);
	hipMallocPitch(&d_image, &pitch_i, r_width * sizeof(int), r_height);
	hipMallocPitch(&d_final, &pitch_f, width * sizeof(int), height);
	
	/** Traspaso de los datos desde el host al dispositivo **/
	hipMemcpy2D(d_gauss, pitch, *gauss_matrix, 5 * sizeof(int), 5 * sizeof(int), 5, hipMemcpyHostToDevice);
	hipMemcpy2D(d_image, pitch_i, *image_matrix, r_width * sizeof(int), r_width * sizeof(int), r_height, hipMemcpyHostToDevice);

	/** Llamada al kernel, si bien su implementacion pudo ser mas eficiente, los tiempos permanecen bajos **/
	kernel<<<height, 512>>>(d_image, d_final, d_gauss, pitch, pitch_i, pitch_f, r_height, r_width);

	/** Traspaso del resultado final **/
	hipMemcpy2D(*final_matrix, width*sizeof(int), d_final, pitch_f, width*sizeof(int), height, hipMemcpyDeviceToHost);
	
	hipFree(d_final);
	hipFree(d_image);
	hipFree(d_gauss);

	return;
}

	.text
	.file	"Gauss.hip"
	.globl	_Z21__device_stub__kernelPiS_S_iiiii # -- Begin function _Z21__device_stub__kernelPiS_S_iiiii
	.type	_Z21__device_stub__kernelPiS_S_iiiii,@function
_Z21__device_stub__kernelPiS_S_iiiii:   # @_Z21__device_stub__kernelPiS_S_iiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPiS_S_iiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__kernelPiS_S_iiiii, .Lfunc_end0-_Z21__device_stub__kernelPiS_S_iiiii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	16(%rsi), %rdi
	xorl	%esi, %esi
	callq	strtod
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	8(%rbx), %rdi
	movl	$.L.str, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	4(%rsp), %r14
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movq	%rsp, %r12
	movl	$.L.str.1, %esi
	movq	%rbx, %rdi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movslq	(%r14), %r14
	leaq	(,%r14,8), %rdi
	movq	%rdi, 64(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %r13
	movl	(%r12), %r15d
	movl	%r15d, %eax
	imull	%r14d, %eax
	movslq	%eax, %rdi
	shlq	$2, %rdi
	movq	%rdi, 56(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%r14, %rdi
	movl	%edi, %ebp
	movslq	%r15d, %r14
	testq	%rdi, %rdi
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	leaq	(,%r14,4), %rsi
	xorl	%ecx, %ecx
	movq	%rax, %rdx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%rdx, (%r13,%rcx,8)
	incq	%rcx
	addq	%rsi, %rdx
	cmpq	%rcx, %rbp
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	movq	%r13, 48(%rsp)                  # 8-byte Spill
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movq	%rdi, %r13
	movq	%rdi, 40(%rsp)                  # 8-byte Spill
	leaq	32(,%rdi,8), %rdi
	addq	$4, %r13
	callq	malloc
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	leaq	4(%r14), %r12
	movl	%r12d, %eax
	movq	%r13, 16(%rsp)                  # 8-byte Spill
	imull	%r13d, %eax
	movslq	%eax, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	24(%rsp), %rdi                  # 8-byte Reload
	cmpl	$-3, 40(%rsp)                   # 4-byte Folded Reload
	jl	.LBB1_6
# %bb.4:                                # %.lr.ph115.preheader
	movl	16(%rsp), %esi                  # 4-byte Reload
	shlq	$2, %r12
	xorl	%ecx, %ecx
	movq	%rax, %rdx
.LBB1_5:                                # %.lr.ph115
                                        # =>This Inner Loop Header: Depth=1
	movq	%rdx, (%rdi,%rcx,8)
	incq	%rcx
	addq	%r12, %rdx
	cmpq	%rcx, %rsi
	jne	.LBB1_5
.LBB1_6:                                # %._crit_edge116
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	cvttsd2si	8(%rsp), %eax           # 8-byte Folded Reload
	movl	%eax, 36(%rsp)                  # 4-byte Spill
	movq	64(%rsp), %rdi                  # 8-byte Reload
	callq	malloc
	movq	%rax, %r12
	movq	56(%rsp), %rdi                  # 8-byte Reload
	callq	malloc
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	40(%rsp), %rdx                  # 8-byte Reload
	testl	%edx, %edx
	movq	48(%rsp), %r13                  # 8-byte Reload
	jle	.LBB1_16
# %bb.7:                                # %.lr.ph119.preheader
	shlq	$2, %r14
	xorl	%eax, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
.LBB1_8:                                # %.lr.ph119
                                        # =>This Inner Loop Header: Depth=1
	movq	%rcx, (%r12,%rax,8)
	incq	%rax
	addq	%r14, %rcx
	cmpq	%rax, %rbp
	jne	.LBB1_8
# %bb.9:                                # %.preheader111
	testl	%edx, %edx
	jle	.LBB1_16
# %bb.10:                               # %.preheader110.preheader
	xorl	%ebp, %ebp
.LBB1_11:                               # %.preheader110
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_13 Depth 2
	testl	%r15d, %r15d
	jle	.LBB1_15
# %bb.12:                               # %.lr.ph121
                                        #   in Loop: Header=BB1_11 Depth=1
	movq	(%r13,%rbp,8), %r14
	xorl	%r13d, %r13d
.LBB1_13:                               #   Parent Loop BB1_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.1, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%r13
	movslq	(%rsp), %r15
	addq	$4, %r14
	cmpq	%r15, %r13
	jl	.LBB1_13
# %bb.14:                               # %._crit_edge122.loopexit
                                        #   in Loop: Header=BB1_11 Depth=1
	movl	4(%rsp), %edx
	movq	48(%rsp), %r13                  # 8-byte Reload
.LBB1_15:                               # %._crit_edge122
                                        #   in Loop: Header=BB1_11 Depth=1
	incq	%rbp
	movslq	%edx, %rax
	cmpq	%rax, %rbp
	jl	.LBB1_11
.LBB1_16:                               # %._crit_edge124
	movq	%rbx, %rdi
	callq	fclose
	leaq	80(%rsp), %rsi
	movl	36(%rsp), %edi                  # 4-byte Reload
	callq	_Z5gaussiPA5_i
	movl	4(%rsp), %r8d
	testl	%r8d, %r8d
	jle	.LBB1_17
# %bb.28:                               # %.preheader109.lr.ph
	movl	$2, %eax
	movl	(%rsp), %ecx
	movq	24(%rsp), %rsi                  # 8-byte Reload
.LBB1_29:                               # %.preheader109
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_31 Depth 2
	testl	%ecx, %ecx
	jle	.LBB1_33
# %bb.30:                               # %.lr.ph126
                                        #   in Loop: Header=BB1_29 Depth=1
	movq	-16(%r13,%rax,8), %rdx
	movq	(%rsi,%rax,8), %r8
	movl	$1, %edi
.LBB1_31:                               #   Parent Loop BB1_29 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	-4(%rdx,%rdi,4), %ecx
	movl	%ecx, 4(%r8,%rdi,4)
	movslq	(%rsp), %rcx
	incq	%rdi
	cmpq	%rcx, %rdi
	jle	.LBB1_31
# %bb.32:                               # %._crit_edge127.loopexit
                                        #   in Loop: Header=BB1_29 Depth=1
	movl	4(%rsp), %r8d
.LBB1_33:                               # %._crit_edge127
                                        #   in Loop: Header=BB1_29 Depth=1
	leaq	1(%rax), %rdx
	movslq	%r8d, %rdi
	cmpq	%rdi, %rax
	movq	%rdx, %rax
	jle	.LBB1_29
# %bb.34:                               # %.preheader108
	testl	%r8d, %r8d
	jle	.LBB1_18
# %bb.35:                               # %.lr.ph132.preheader
	movl	$1, %eax
.LBB1_36:                               # %.lr.ph132
                                        # =>This Inner Loop Header: Depth=1
	movq	8(%rsi,%rax,8), %rcx
	movq	12(%rcx), %rdx
	rolq	$32, %rdx
	movq	%rdx, (%rcx)
	movslq	(%rsp), %rdx
	movl	(%rcx,%rdx,4), %edi
	movl	%edi, 8(%rcx,%rdx,4)
	movslq	(%rsp), %rdx
	movl	-4(%rcx,%rdx,4), %edi
	movl	%edi, 12(%rcx,%rdx,4)
	movslq	4(%rsp), %r8
	incq	%rax
	cmpq	%r8, %rax
	jle	.LBB1_36
	jmp	.LBB1_18
.LBB1_17:
	movq	24(%rsp), %rsi                  # 8-byte Reload
.LBB1_18:                               # %.preheader107
	movl	(%rsp), %ecx
	cmpl	$-3, %ecx
	jl	.LBB1_22
# %bb.19:                               # %.lr.ph134
	movq	32(%rsi), %rax
	movq	(%rsi), %rdx
	movq	8(%rsi), %r10
	movq	24(%rsi), %rdi
	movq	$-1, %r8
.LBB1_20:                               # =>This Inner Loop Header: Depth=1
	movl	4(%rax,%r8,4), %ecx
	movl	%ecx, 4(%rdx,%r8,4)
	movl	4(%rdi,%r8,4), %ecx
	movl	%ecx, 4(%r10,%r8,4)
	movslq	4(%rsp), %rcx
	movq	(%rsi,%rcx,8), %r9
	movq	16(%rsi,%rcx,8), %rcx
	movl	4(%r9,%r8,4), %r9d
	movl	%r9d, 4(%rcx,%r8,4)
	movslq	4(%rsp), %rcx
	movq	-8(%rsi,%rcx,8), %r9
	movq	24(%rsi,%rcx,8), %rcx
	movl	4(%r9,%r8,4), %r9d
	movl	%r9d, 4(%rcx,%r8,4)
	movslq	(%rsp), %rcx
	leaq	3(%rcx), %r9
	incq	%r8
	cmpq	%r9, %r8
	jl	.LBB1_20
# %bb.21:                               # %._crit_edge135.loopexit
	movl	4(%rsp), %r8d
.LBB1_22:                               # %._crit_edge135
	leaq	80(%rsp), %rdi
	movq	%r12, %rdx
                                        # kill: def $ecx killed $ecx killed $rcx
                                        # kill: def $r8d killed $r8d killed $r8
	callq	_Z12gpuComputingPA5_iPPiS2_ii
	movl	$.L.str.2, %edi
	movl	$.L.str.3, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	(%rsp), %ecx
	testl	%ecx, %ecx
	jle	.LBB1_43
# %bb.23:                               # %.preheader.preheader
	movl	4(%rsp), %eax
	xorl	%r14d, %r14d
.LBB1_24:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_26 Depth 2
	testl	%eax, %eax
	jle	.LBB1_42
# %bb.25:                               # %.lr.ph137
                                        #   in Loop: Header=BB1_24 Depth=1
	xorl	%r15d, %r15d
.LBB1_26:                               #   Parent Loop BB1_24 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	decl	%eax
	cmpq	%rax, %r15
	jne	.LBB1_27
# %bb.37:                               #   in Loop: Header=BB1_26 Depth=2
	movl	(%rsp), %eax
	decl	%eax
	movq	(%r12,%r14,8), %rcx
	movl	(%rcx,%r15,4), %edx
	cmpq	%rax, %r14
	jne	.LBB1_38
# %bb.39:                               #   in Loop: Header=BB1_26 Depth=2
	movl	$.L.str.1, %esi
	jmp	.LBB1_40
.LBB1_27:                               #   in Loop: Header=BB1_26 Depth=2
	movq	(%r12,%r14,8), %rax
	movl	(%rax,%r15,4), %edx
	movl	$.L.str.4, %esi
	jmp	.LBB1_40
.LBB1_38:                               #   in Loop: Header=BB1_26 Depth=2
	movl	$.L.str.5, %esi
.LBB1_40:                               #   in Loop: Header=BB1_26 Depth=2
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	fprintf
	incq	%r15
	movslq	4(%rsp), %rax
	cmpq	%rax, %r15
	jl	.LBB1_26
# %bb.41:                               # %._crit_edge138.loopexit
                                        #   in Loop: Header=BB1_24 Depth=1
	movl	(%rsp), %ecx
.LBB1_42:                               # %._crit_edge138
                                        #   in Loop: Header=BB1_24 Depth=1
	incq	%r14
	movslq	%ecx, %rdx
	cmpq	%rdx, %r14
	jl	.LBB1_24
.LBB1_43:                               # %._crit_edge140
	movq	%rbx, %rdi
	callq	fclose
	movq	72(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	16(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	8(%rsp), %rdi                   # 8-byte Reload
	callq	free
	xorl	%eax, %eax
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z5gaussiPA5_i
.LCPI2_0:
	.quad	0x401921cac083126f              # double 6.2830000000000004
.LCPI2_1:
	.quad	0xc000000000000000              # double -2
.LCPI2_3:
	.quad	0x4071100000000000              # double 273
.LCPI2_4:
	.quad	0x3ff0000000000000              # double 1
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI2_2:
	.quad	0x8000000000000000              # double -0
	.quad	0x8000000000000000              # double -0
	.text
	.globl	_Z5gaussiPA5_i
	.type	_Z5gaussiPA5_i,@function
_Z5gaussiPA5_i:                         # @_Z5gaussiPA5_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cvtsi2sd	%edi, %xmm0
	movq	%rsi, %rbx
	mulsd	%xmm0, %xmm0
	movapd	%xmm0, %xmm1
	addsd	%xmm0, %xmm1
	mulsd	.LCPI2_0(%rip), %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movl	$2, %ebp
	xorl	%r14d, %r14d
	movapd	.LCPI2_2(%rip), %xmm2           # xmm2 = [-0.0E+0,-0.0E+0]
	movsd	%xmm1, 16(%rsp)                 # 8-byte Spill
.LBB2_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebp, %xmm0
	mulsd	%xmm0, %xmm0
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	xorl	%r15d, %r15d
	movsd	.LCPI2_1(%rip), %xmm3           # xmm3 = mem[0],zero
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movapd	%xmm3, (%rsp)                   # 16-byte Spill
	movapd	%xmm3, %xmm0
	xorpd	%xmm2, %xmm0
	mulsd	%xmm3, %xmm0
	subsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	divsd	%xmm1, %xmm0
	callq	exp
	mulsd	.LCPI2_3(%rip), %xmm0
	divsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	callq	ceil@PLT
	movsd	.LCPI2_4(%rip), %xmm3           # xmm3 = mem[0],zero
	movapd	.LCPI2_2(%rip), %xmm2           # xmm2 = [-0.0E+0,-0.0E+0]
	movsd	16(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	cvttsd2si	%xmm0, %eax
	movl	%eax, (%rbx,%r15,4)
	movapd	(%rsp), %xmm0                   # 16-byte Reload
	addsd	%xmm3, %xmm0
	movapd	%xmm0, (%rsp)                   # 16-byte Spill
	movaps	(%rsp), %xmm3                   # 16-byte Reload
	incq	%r15
	cmpq	$5, %r15
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	decl	%ebp
	incq	%r14
	addq	$20, %rbx
	cmpq	$5, %r14
	jne	.LBB2_1
# %bb.4:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z5gaussiPA5_i, .Lfunc_end2-_Z5gaussiPA5_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z12gpuComputingPA5_iPPiS2_ii   # -- Begin function _Z12gpuComputingPA5_iPPiS2_ii
	.type	_Z12gpuComputingPA5_iPPiS2_ii,@function
_Z12gpuComputingPA5_iPPiS2_ii:          # @_Z12gpuComputingPA5_iPPiS2_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebx
	movl	%ecx, %r15d
	movq	%rdx, 80(%rsp)                  # 8-byte Spill
	movq	%rsi, 72(%rsp)                  # 8-byte Spill
	movq	%rdi, %r13
	leal	4(%r15), %ebp
	leaq	64(%rsp), %r12
	leaq	56(%rsp), %rsi
	movl	$20, %edx
	movl	$5, %ecx
	movq	%r12, %rdi
	callq	hipMallocPitch
	movl	%ebx, 36(%rsp)                  # 4-byte Spill
	movslq	%ebx, %r14
	leaq	16(,%r14,4), %rbx
	movl	%ebp, 32(%rsp)                  # 4-byte Spill
	movslq	%ebp, %rbp
	leaq	24(%rsp), %rdi
	leaq	48(%rsp), %rsi
	movq	%rbx, %rdx
	movq	%rbp, %rcx
	callq	hipMallocPitch
	shlq	$2, %r14
	movslq	%r15d, %r15
	leaq	16(%rsp), %rdi
	leaq	40(%rsp), %rsi
	movq	%r14, %rdx
	movq	%r15, %rcx
	callq	hipMallocPitch
	movq	(%r12), %rdi
	leaq	56(%rsp), %rax
	movq	(%rax), %rsi
	movl	$1, %r12d
	movl	%r12d, (%rsp)
	movl	$20, %ecx
	movl	$20, %r8d
	movl	$5, %r9d
	movq	%r13, %rdx
	callq	hipMemcpy2D
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	leaq	48(%rsp), %rax
	movq	(%rax), %rsi
	movq	72(%rsp), %rax                  # 8-byte Reload
	movq	(%rax), %rdx
	movl	%r12d, (%rsp)
	movq	%rbx, %rcx
	movq	%rbx, %r8
	movq	%rbp, %r9
	callq	hipMemcpy2D
	movl	%r15d, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movl	36(%rsp), %eax                  # 4-byte Reload
	addl	$4, %eax
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	64(%rsp), %rdx
	movl	56(%rsp), %ecx
	movl	48(%rsp), %r8d
	movl	40(%rsp), %r9d
	movl	%eax, 8(%rsp)
	movl	32(%rsp), %eax                  # 4-byte Reload
	movl	%eax, (%rsp)
	callq	_Z21__device_stub__kernelPiS_S_iiiii
.LBB3_2:
	movq	80(%rsp), %rax                  # 8-byte Reload
	movq	(%rax), %rdi
	movq	16(%rsp), %rdx
	movq	40(%rsp), %rcx
	movl	$2, (%rsp)
	movq	%r14, %rsi
	movq	%r14, %r8
	movq	%r15, %r9
	callq	hipMemcpy2D
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z12gpuComputingPA5_iPPiS2_ii, .Lfunc_end3-_Z12gpuComputingPA5_iPPiS2_ii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPiS_S_iiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6kernelPiS_S_iiiii,@object    # @_Z6kernelPiS_S_iiiii
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelPiS_S_iiiii
	.p2align	3, 0x0
_Z6kernelPiS_S_iiiii:
	.quad	_Z21__device_stub__kernelPiS_S_iiiii
	.size	_Z6kernelPiS_S_iiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"r"
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"salida"
	.size	.L.str.2, 7

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"w"
	.size	.L.str.3, 2

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%d\t"
	.size	.L.str.4, 4

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d\n"
	.size	.L.str.5, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelPiS_S_iiiii"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelPiS_S_iiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6kernelPiS_S_iiiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6kernelPiS_S_iiiii    ; -- Begin function _Z6kernelPiS_S_iiiii
	.globl	_Z6kernelPiS_S_iiiii
	.p2align	8
	.type	_Z6kernelPiS_S_iiiii,@function
_Z6kernelPiS_S_iiiii:                   ; @_Z6kernelPiS_S_iiiii
; %bb.0:
	s_load_b32 s12, s[0:1], 0x28
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_add_i32 s8, s12, -4
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s8, v0
	s_cbranch_execz .LBB0_7
; %bb.1:                                ; %.lr.ph
	s_clause 0x1
	s_load_b32 s9, s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x0
	s_add_i32 s10, s15, 2
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b32 s13, s[0:1], 0x18
	s_mul_i32 s10, s10, s12
	s_mov_b32 s14, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s11, s15, s9
	s_add_i32 s9, s10, 2
	s_add_u32 s10, s6, s11
	s_addc_u32 s11, s7, 0
	s_ashr_i32 s6, s12, 31
	s_ashr_i32 s16, s13, 31
	s_add_i32 s12, s12, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s12, s12, s6
	v_cvt_f32_u32_e32 v1, s12
	s_sub_i32 s6, 0, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, s6, v1
	v_mul_hi_u32 v2, v1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v1, v2
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;       Child Loop BB0_4 Depth 3
	v_add_nc_u32_e32 v3, s9, v0
	s_mov_b64 s[0:1], s[2:3]
	s_mov_b32 s17, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_add_nc_u32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v4
	v_mul_hi_u32 v5, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, v5, s12
	v_sub_nc_u32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s12, v3
	v_cmp_le_u32_e32 vcc_lo, s12, v3
	v_cndmask_b32_e32 v3, v3, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s12, v3
	v_cmp_le_u32_e32 vcc_lo, s12, v3
	v_cndmask_b32_e32 v3, v3, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v4
	v_sub_nc_u32_e32 v4, v3, v4
	v_mov_b32_e32 v3, 0
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_4 Depth 3
	s_add_i32 s6, s17, s15
	s_mov_b32 s18, -2
	s_mul_i32 s6, s6, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_ashr_i32 s7, s6, 31
	s_add_u32 s19, s4, s6
	s_addc_u32 s20, s5, s7
	s_mov_b64 s[6:7], s[0:1]
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_add_nc_u32_e32 v5, s18, v4
	s_add_i32 s18, s18, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s19, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s20, v6, vcc_lo
	global_load_b32 v7, v1, s[6:7]
	global_load_b32 v5, v[5:6], off
	s_add_u32 s6, s6, 4
	s_addc_u32 s7, s7, 0
	s_cmp_lg_u32 s18, 3
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_i32 v6, 0xf00f00f1, v5
	v_add_nc_u32_e32 v5, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v6, 31, v5
	v_ashrrev_i32_e32 v5, 8, v5
	v_add_nc_u32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v5, v5
	v_add_f32_e32 v3, v3, v5
	s_cbranch_scc1 .LBB0_4
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=2
	s_add_i32 s17, s17, 1
	s_add_u32 s0, s0, s13
	s_addc_u32 s1, s1, s16
	s_cmp_lg_u32 s17, 5
	s_cbranch_scc1 .LBB0_3
; %bb.6:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	v_add_nc_u32_e32 v0, 0x200, v0
	v_cvt_i32_f32_e32 v6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_le_i32_e32 vcc_lo, s8, v0
	v_add_co_u32 v3, s0, s10, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s11, v5, s0
	s_or_b32 s14, vcc_lo, s14
	global_store_b32 v[3:4], v6, off
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB0_2
.LBB0_7:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPiS_S_iiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 21
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6kernelPiS_S_iiiii, .Lfunc_end0-_Z6kernelPiS_S_iiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 560
; NumSgprs: 23
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 23
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 44
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPiS_S_iiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     23
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPiS_S_iiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
