#include <stdio.h>
#include "cuda.h"
#define max(x,y)  ((x) > (y)? (x) : (y))
#define min(x,y)  ((x) < (y)? (x) : (y))
#define ceil(a,b) ((a) % (b) == 0 ? (a) / (b) : ((a) / (b)) + 1)

void check_error (const char* message) {
	cudaError_t error = cudaGetLastError ();
	if (error != cudaSuccess) {
		printf ("CUDA error : %s, %s\n", message, cudaGetErrorString (error));
		exit(-1);
	}
}

__global__ void sw4 (double * uacc_in_0, double * uacc_in_1, double * uacc_in_2, double * __restrict__ u_in_0, double * __restrict__ u_in_1, double * __restrict__ u_in_2, double * __restrict__ mu_in, double * __restrict__ la_in, double * strx, double * stry, double * strz, int N) {
	//Determing the block's indices
	int blockdim_i= (int)(blockDim.x);
	int i0 = (int)(blockIdx.x)*(blockdim_i);
	int i = max (i0, 0) + (int)(threadIdx.x);
	int blockdim_j= (int)(blockDim.y);
	int j0 = (int)(blockIdx.y)*(blockdim_j);
	int j = max (j0, 0) + (int)(threadIdx.y);
	int blockdim_k= (int)(blockDim.z);
	int k0 = (int)(blockIdx.z)*(blockdim_k);
	int k = max (k0, 0) + (int)(threadIdx.z);

	// Assumptions 
	int a1 = 1;
	double h = 3.7;
	double cof = 1e0 / ( h *  h);

	double (*uacc_0)[304][304] = (double (*)[304][304])uacc_in_0;
	double (*uacc_1)[304][304] = (double (*)[304][304])uacc_in_1;
	double (*uacc_2)[304][304] = (double (*)[304][304])uacc_in_2;
	double (*u_0)[304][304] = (double (*)[304][304])u_in_0;
	double (*u_1)[304][304] = (double (*)[304][304])u_in_1;
	double (*u_2)[304][304] = (double (*)[304][304])u_in_2;
	double (*mu)[304][304] = (double (*)[304][304])mu_in;
	double (*la)[304][304] = (double (*)[304][304])la_in;

	double mux1, mux2, mux3, mux4, muy1, muy2, muy3, muy4, muz1, muz2, muz3, muz4;
	double r1, r2, r3;
	if (i>=2 & j>=2 & k>=2 & i<=N-3 & j<=N-3 & k<=N-3) {
mux1 = mu[k][j][i-1] * strx[i-1];
mux1 -= 3.0 / 4.0 * mu[k][j][i] * strx[i];
mux1 -= 3.0 / 4.0 * mu[k][j][i-2] * strx[i-2];

mux2 = mu[k][j][i-2] * strx[i-2];
mux2 += mu[k][j][i+1] * strx[i+1];
mux2 += 3.0 * mu[k][j][i] * strx[i];
mux2 += 3.0 * mu[k][j][i-1] * strx[i-1];

mux3 = mu[k][j][i-1] * strx[i-1];
mux3 += mu[k][j][i+2] * strx[i+2];
mux3 += 3.0 * mu[k][j][i+1] * strx[i+1];
mux3 += 3.0 * mu[k][j][i] * strx[i];

mux4 = mu[k][j][i+1] * strx[i+1];
mux4 -= 3.0 / 4.0 * mu[k][j][i] * strx[i];
mux4 -= 3.0 / 4.0 * mu[k][j][i+2] * strx[i+2];

muy1 = mu[k][j-1][i] * stry[j-1];
muy1 -= 3.0 / 4.0 * mu[k][j][i] * stry[j];
muy1 -= 3.0 / 4.0 * mu[k][j-2][i] * stry[j-2];

muy2 = mu[k][j-2][i] * stry[j-2];
muy2 += mu[k][j+1][i] * stry[j+1];
muy2 += 3.0 * mu[k][j][i] * stry[j];
muy2 += 3.0 * mu[k][j-1][i] * stry[j-1];

muy3 = mu[k][j-1][i] * stry[j-1];
muy3 += mu[k][j+2][i] * stry[j+2];
muy3 += 3.0 * mu[k][j+1][i] * stry[j+1];
muy3 += 3.0 * mu[k][j][i] * stry[j];

muy4 = mu[k][j+1][i] * stry[j+1];
muy4 -= 3.0 / 4.0 * mu[k][j][i] * stry[j];
muy4 -= 3.0 / 4.0 * mu[k][j+2][i] * stry[j+2];

muz1 = mu[k-1][j][i] * strz[k-1];
muz1 -= 3.0 / 4.0 * mu[k][j][i] * strz[k];
muz1 -= 3.0 / 4.0 * mu[k-2][j][i] * strz[k-2];

muz2 = mu[k-2][j][i] * strz[k-2];
muz2 += mu[k+1][j][i] * strz[k+1];
muz2 += 3.0 * mu[k][j][i] * strz[k];
muz2 += 3.0 * mu[k-1][j][i] * strz[k-1];

muz3 = mu[k-1][j][i] * strz[k-1];
muz3 += mu[k+2][j][i] * strz[k+2];
muz3 += 3.0 * mu[k+1][j][i] * strz[k+1];
muz3 += 3.0 * mu[k][j][i] * strz[k];

muz4 = -(3.0 / 4.0 * mu[k][j][i] * strz[k]);
muz4 += mu[k+1][j][i] * strz[k+1];
muz4 -= 3.0 / 4.0 * mu[k+2][j][i] * strz[k+2];

double _t_3_ = u_0[k][j][i-2];
_t_3_ -= u_0[k][j][i];
double _v_18_ = la[k][j][i-1] * strx[i-1];
double _t_2_ = _v_18_;
_t_2_ += 2.0 * mux1;
_t_2_ -= 3.0 / 4.0 * la[k][j][i] * strx[i];
_t_2_ -= 3.0 / 4.0 * la[k][j][i-2] * strx[i-2];
double _v_19_ = _t_2_ * _t_3_;
double _v_28_ = strx[i] * _v_19_;
double _t_4_ = la[k][j][i-2] * strx[i-2];
double _v_21_ = la[k][j][i+1] * strx[i+1];
_t_4_ += _v_21_;
_t_4_ += 2.0 * mux2;
_t_4_ += 3.0 * la[k][j][i] * strx[i];
_t_4_ += 3.0 * la[k][j][i-1] * strx[i-1];
double _t_5_ = u_0[k][j][i-1];
_t_5_ -= u_0[k][j][i];
double _v_22_ = _t_4_ * _t_5_;
_v_28_ += strx[i] * _v_22_;
double _t_6_ = _v_18_;
_t_6_ += la[k][j][i+2] * strx[i+2];
_t_6_ += 2.0 * mux3;
_t_6_ += 3.0 * la[k][j][i+1] * strx[i+1];
_t_6_ += 3.0 * la[k][j][i] * strx[i];
double _t_8_ = -(3.0 / 4.0 * la[k][j][i] * strx[i]);
_t_8_ -= 3.0 / 4.0 * la[k][j][i+2] * strx[i+2];
_t_8_ += 2.0 * mux4;
double _t_7_ = u_0[k][j][i+1];
_t_7_ -= u_0[k][j][i];
double _v_25_ = _t_6_ * _t_7_;
_v_28_ += strx[i] * _v_25_;
_t_8_ += _v_21_;
double _t_9_ = u_0[k][j][i+2];
_t_9_ -= u_0[k][j][i];
double _v_27_ = _t_8_ * _t_9_;
_v_28_ += strx[i] * _v_27_;
r1 = 1.0 / 6.0 * _v_28_;
double _v_29_ = muy1 * u_0[k][j-2][i];
_v_29_ -= muy1 * u_0[k][j][i];
double _v_33_ = stry[j] * _v_29_;
double _v_30_ = muy2 * u_0[k][j-1][i];
_v_30_ -= muy2 * u_0[k][j][i];
_v_33_ += stry[j] * _v_30_;
double _v_31_ = muy3 * u_0[k][j+1][i];
_v_31_ -= muy3 * u_0[k][j][i];
_v_33_ += stry[j] * _v_31_;
double _v_32_ = muy4 * u_0[k][j+2][i];
_v_32_ -= muy4 * u_0[k][j][i];
_v_33_ += stry[j] * _v_32_;
r1 += 1.0 / 6.0 * _v_33_;
double _v_34_ = muz1 * u_0[k-2][j][i];
_v_34_ -= muz1 * u_0[k][j][i];
double _v_38_ = strz[k] * _v_34_;
double _v_35_ = muz2 * u_0[k-1][j][i];
_v_35_ -= muz2 * u_0[k][j][i];
_v_38_ += strz[k] * _v_35_;
double _v_36_ = muz3 * u_0[k+1][j][i];
_v_36_ -= muz3 * u_0[k][j][i];
_v_38_ += strz[k] * _v_36_;
double _v_37_ = -(muz4 * u_0[k][j][i]);
_v_37_ += muz4 * u_0[k+2][j][i];
_v_38_ += strz[k] * _v_37_;
r1 += 1.0 / 6.0 * _v_38_;

double _v_39_ = mux1 * u_1[k][j][i-2];
_v_39_ -= mux1 * u_1[k][j][i];
double _v_43_ = strx[i] * _v_39_;
double _v_40_ = mux2 * u_1[k][j][i-1];
_v_40_ -= mux2 * u_1[k][j][i];
_v_43_ += strx[i] * _v_40_;
double _v_41_ = mux3 * u_1[k][j][i+1];
_v_41_ -= mux3 * u_1[k][j][i];
_v_43_ += strx[i] * _v_41_;
double _v_42_ = mux4 * u_1[k][j][i+2];
_v_42_ -= mux4 * u_1[k][j][i];
_v_43_ += strx[i] * _v_42_;
r2 = 1.0 / 6.0 * _v_43_;
double _t_28_ = u_1[k][j-2][i];
_t_28_ -= u_1[k][j][i];
double _v_44_ = la[k][j-1][i] * stry[j-1];
double _t_27_ = _v_44_;
_t_27_ += 2.0 * muy1;
_t_27_ -= 3.0 / 4.0 * la[k][j][i] * stry[j];
_t_27_ -= 3.0 / 4.0 * la[k][j-2][i] * stry[j-2];
double _v_45_ = _t_27_ * _t_28_;
double _v_54_ = stry[j] * _v_45_;
double _t_29_ = la[k][j-2][i] * stry[j-2];
double _v_47_ = la[k][j+1][i] * stry[j+1];
_t_29_ += _v_47_;
_t_29_ += 2.0 * muy2;
_t_29_ += 3.0 * la[k][j][i] * stry[j];
_t_29_ += 3.0 * la[k][j-1][i] * stry[j-1];
double _t_30_ = u_1[k][j-1][i];
_t_30_ -= u_1[k][j][i];
double _v_48_ = _t_29_ * _t_30_;
_v_54_ += stry[j] * _v_48_;
double _t_31_ = _v_44_;
_t_31_ += la[k][j+2][i] * stry[j+2];
_t_31_ += 2.0 * muy3;
_t_31_ += 3.0 * la[k][j+1][i] * stry[j+1];
_t_31_ += 3.0 * la[k][j][i] * stry[j];
double _t_33_ = -(3.0 / 4.0 * la[k][j][i] * stry[j]);
_t_33_ -= 3.0 / 4.0 * la[k][j+2][i] * stry[j+2];
_t_33_ += 2.0 * muy4;
double _t_32_ = u_1[k][j+1][i];
_t_32_ -= u_1[k][j][i];
double _v_51_ = _t_31_ * _t_32_;
_v_54_ += stry[j] * _v_51_;
_t_33_ += _v_47_;
double _t_34_ = u_1[k][j+2][i];
_t_34_ -= u_1[k][j][i];
double _v_53_ = _t_33_ * _t_34_;
_v_54_ += stry[j] * _v_53_;
r2 += 1.0 / 6.0 * _v_54_;
double _v_55_ = muz1 * u_1[k-2][j][i];
_v_55_ -= muz1 * u_1[k][j][i];
double _v_59_ = strz[k] * _v_55_;
double _v_56_ = muz2 * u_1[k-1][j][i];
_v_56_ -= muz2 * u_1[k][j][i];
_v_59_ += strz[k] * _v_56_;
double _v_57_ = muz3 * u_1[k+1][j][i];
_v_57_ -= muz3 * u_1[k][j][i];
_v_59_ += strz[k] * _v_57_;
double _v_58_ = -(muz4 * u_1[k][j][i]);
_v_58_ += muz4 * u_1[k+2][j][i];
_v_59_ += strz[k] * _v_58_;
r2 += 1.0 / 6.0 * _v_59_;

double _v_60_ = mux1 * u_2[k][j][i-2];
_v_60_ -= mux1 * u_2[k][j][i];
double _v_64_ = strx[i] * _v_60_;
double _v_61_ = mux2 * u_2[k][j][i-1];
_v_61_ -= mux2 * u_2[k][j][i];
_v_64_ += strx[i] * _v_61_;
double _v_62_ = mux3 * u_2[k][j][i+1];
_v_62_ -= mux3 * u_2[k][j][i];
_v_64_ += strx[i] * _v_62_;
double _v_63_ = mux4 * u_2[k][j][i+2];
_v_63_ -= mux4 * u_2[k][j][i];
_v_64_ += strx[i] * _v_63_;
r3 = 1.0 / 6.0 * _v_64_;
double _v_65_ = muy1 * u_2[k][j-2][i];
_v_65_ -= muy1 * u_2[k][j][i];
double _v_69_ = stry[j] * _v_65_;
double _v_66_ = muy2 * u_2[k][j-1][i];
_v_66_ -= muy2 * u_2[k][j][i];
_v_69_ += stry[j] * _v_66_;
double _v_67_ = muy3 * u_2[k][j+1][i];
_v_67_ -= muy3 * u_2[k][j][i];
_v_69_ += stry[j] * _v_67_;
double _v_68_ = muy4 * u_2[k][j+2][i];
_v_68_ -= muy4 * u_2[k][j][i];
_v_69_ += stry[j] * _v_68_;
r3 += 1.0 / 6.0 * _v_69_;
double _t_53_ = u_2[k-2][j][i];
_t_53_ -= u_2[k][j][i];
double _t_52_ = 2.0 * muz1;
double _v_70_ = la[k-1][j][i] * strz[k-1];
double _t_54_ = 3.0 * la[k-1][j][i] * strz[k-1];
_t_54_ += 2.0 * muz2;
_t_54_ += 3.0 * la[k][j][i] * strz[k];
double _t_56_ = 3.0 * la[k][j][i] * strz[k];
_t_56_ += 2.0 * muz3;
double _t_58_ = -(3.0 / 4.0 * la[k][j][i] * strz[k]);
_t_58_ += 2.0 * muz4;
_t_52_ -= 3.0 / 4.0 * la[k][j][i] * strz[k];
_t_52_ += _v_70_;
_t_52_ -= 3.0 / 4.0 * la[k-2][j][i] * strz[k-2];
double _v_71_ = _t_52_ * _t_53_;
double _v_80_ = strz[k] * _v_71_;
_t_54_ += la[k-2][j][i] * strz[k-2];
double _v_73_ = la[k+1][j][i] * strz[k+1];
_t_56_ += 3.0 * la[k+1][j][i] * strz[k+1];
_t_54_ += _v_73_;
double _t_55_ = u_2[k-1][j][i];
_t_55_ -= u_2[k][j][i];
double _v_74_ = _t_54_ * _t_55_;
_v_80_ += strz[k] * _v_74_;
_t_56_ += _v_70_;
_t_56_ += la[k+2][j][i] * strz[k+2];
_t_58_ -= 3.0 / 4.0 * la[k+2][j][i] * strz[k+2];
double _t_57_ = u_2[k+1][j][i];
_t_57_ -= u_2[k][j][i];
double _v_77_ = _t_56_ * _t_57_;
_v_80_ += strz[k] * _v_77_;
_t_58_ += _v_73_;
double _t_59_ = -(u_2[k][j][i]);
_t_59_ += u_2[k+2][j][i];
double _v_79_ = _t_58_ * _t_59_;
_v_80_ += strz[k] * _v_79_;
r3 += 1.0 / 6.0 * _v_80_;

double _t_65_ = -u_0[k-1][j][i-2];
_t_65_ += u_0[k+1][j][i-2];
double _t_93_ = u_0[k-1][j][i-2];
_t_93_ -= u_0[k-1][j][i+2];
_t_93_ += 8.0 * -u_0[k-1][j][i-1];
_t_93_ += 8.0 * u_0[k-1][j][i+1];
double _t_96_ = u_0[k+1][j][i-2];
_t_96_ -= u_0[k+1][j][i+2];
_t_96_ += 8.0 * -u_0[k+1][j][i-1];
_t_96_ += 8.0 * u_0[k+1][j][i+1];
double _t_67_ = 8.0 * -u_0[k-1][j][i-1];
_t_67_ += 8.0 * u_0[k+1][j][i-1];
_t_67_ += u_0[k-2][j][i-1];
_t_67_ -= u_0[k+2][j][i-1];
double _t_70_ = 8.0 * -u_0[k-1][j][i+1];
_t_70_ += 8.0 * u_0[k+1][j][i+1];
_t_70_ += u_0[k-2][j][i+1];
_t_70_ -= u_0[k+2][j][i+1];
double _t_73_ = -u_0[k-1][j][i+2];
_t_73_ += u_0[k+1][j][i+2];
double _t_91_ = -u_0[k-2][j][i-1];
_t_91_ += u_0[k-2][j][i+1];
double _t_99_ = -u_0[k+2][j][i-1];
_t_99_ += u_0[k+2][j][i+1];
double _v_81_ = mu[k][j][i-2] * 8.0 * _t_65_;
_v_81_ += mu[k][j][i-2] * u_0[k-2][j][i-2];
_v_81_ -= mu[k][j][i-2] * u_0[k+2][j][i-2];
double _v_87_ = la[k-2][j][i] * u_0[k-2][j][i-2];
_v_87_ -= la[k-2][j][i] * u_0[k-2][j][i+2];
_v_87_ += la[k-2][j][i] * 8.0 * _t_91_;
double _v_88_ = la[k+2][j][i] * u_0[k+2][j][i-2];
_v_88_ -= la[k+2][j][i] * u_0[k+2][j][i+2];
_v_88_ += la[k+2][j][i] * 8.0 * _t_99_;
double _v_90_ = la[k-2][j][i] * u_1[k-2][j-2][i];
_v_90_ -= la[k-2][j][i] * u_1[k-2][j+2][i];
double _v_91_ = la[k+2][j][i] * u_1[k+2][j-2][i];
_v_91_ -= la[k+2][j][i] * u_1[k+2][j+2][i];
double _v_82_ = mu[k][j][i+2] * u_0[k-2][j][i+2];
_v_82_ -= mu[k][j][i+2] * u_0[k+2][j][i+2];
_v_82_ += mu[k][j][i+2] * 8.0 * _t_73_;
double _v_84_ = mu[k][j-2][i] * u_1[k-2][j-2][i];
_v_84_ -= mu[k][j-2][i] * u_1[k+2][j-2][i];
double _v_85_ = mu[k][j+2][i] * u_1[k-2][j+2][i];
_v_85_ -= mu[k][j+2][i] * u_1[k+2][j+2][i];
double _t_62_ = _v_81_;
_t_62_ -= 8.0 * mu[k][j][i-1] * _t_67_;
_t_62_ += 8.0 * mu[k][j][i+1] * _t_70_;
_t_62_ -= _v_82_;
double _t_61_ = 1.0 / 144.0 * strx[i] * strz[k];
double _t_60_ = _t_61_ * _t_62_;
double _t_88_ = _v_87_;
_t_88_ -= 8.0 * la[k-1][j][i] * _t_93_;
_t_88_ += 8.0 * la[k+1][j][i] * _t_96_;
_t_88_ -= _v_88_;
double _t_87_ = 1.0 / 144.0 * strx[i] * strz[k];
_t_60_ += _t_87_ * _t_88_;
double _t_78_ = -u_1[k-1][j-2][i];
_t_78_ += u_1[k+1][j-2][i];
double _t_106_ = u_1[k-1][j-2][i];
_t_106_ -= u_1[k-1][j+2][i];
_t_106_ += 8.0 * -u_1[k-1][j-1][i];
_t_106_ += 8.0 * u_1[k-1][j+1][i];
double _t_109_ = u_1[k+1][j-2][i];
_t_109_ -= u_1[k+1][j+2][i];
_t_109_ += 8.0 * -u_1[k+1][j-1][i];
_t_109_ += 8.0 * u_1[k+1][j+1][i];
double _t_80_ = 8.0 * -u_1[k-1][j-1][i];
_t_80_ += 8.0 * u_1[k+1][j-1][i];
_t_80_ += u_1[k-2][j-1][i];
_t_80_ -= u_1[k+2][j-1][i];
double _t_83_ = 8.0 * -u_1[k-1][j+1][i];
_t_83_ += 8.0 * u_1[k+1][j+1][i];
_t_83_ += u_1[k-2][j+1][i];
_t_83_ -= u_1[k+2][j+1][i];
double _t_86_ = -u_1[k-1][j+2][i];
_t_86_ += u_1[k+1][j+2][i];
double _t_104_ = -u_1[k-2][j-1][i];
_t_104_ += u_1[k-2][j+1][i];
double _t_112_ = -u_1[k+2][j-1][i];
_t_112_ += u_1[k+2][j+1][i];
_v_84_ += mu[k][j-2][i] * 8.0 * _t_78_;
double _t_75_ = _v_84_;
_t_75_ -= 8.0 * mu[k][j-1][i] * _t_80_;
_t_75_ += 8.0 * mu[k][j+1][i] * _t_83_;
_v_85_ += mu[k][j+2][i] * 8.0 * _t_86_;
_t_75_ -= _v_85_;
double _t_74_ = 1.0 / 144.0 * stry[j] * strz[k];
_t_60_ += _t_74_ * _t_75_;
_v_90_ += la[k-2][j][i] * 8.0 * _t_104_;
double _t_101_ = _v_90_;
_t_101_ -= 8.0 * la[k-1][j][i] * _t_106_;
_t_101_ += 8.0 * la[k+1][j][i] * _t_109_;
_v_91_ += la[k+2][j][i] * 8.0 * _t_112_;
_t_101_ -= _v_91_;
double _t_100_ = 1.0 / 144.0 * stry[j] * strz[k];
_t_60_ += _t_100_ * _t_101_;
r3 += _t_60_;

double _t_146_ = u_1[k][j-1][i-2];
_t_146_ -= u_1[k][j-1][i+2];
_t_146_ += 8.0 * -u_1[k][j-1][i-1];
_t_146_ += 8.0 * u_1[k][j-1][i+1];
double _t_118_ = -u_1[k][j-1][i-2];
_t_118_ += u_1[k][j+1][i-2];
double _t_120_ = 8.0 * -u_1[k][j-1][i-1];
_t_120_ += 8.0 * u_1[k][j+1][i-1];
_t_120_ += u_1[k][j-2][i-1];
_t_120_ -= u_1[k][j+2][i-1];
double _t_123_ = 8.0 * -u_1[k][j-1][i+1];
_t_123_ += 8.0 * u_1[k][j+1][i+1];
_t_123_ += u_1[k][j-2][i+1];
_t_123_ -= u_1[k][j+2][i+1];
double _t_126_ = -u_1[k][j-1][i+2];
_t_126_ += u_1[k][j+1][i+2];
double _t_149_ = u_1[k][j+1][i-2];
_t_149_ -= u_1[k][j+1][i+2];
_t_149_ += 8.0 * -u_1[k][j+1][i-1];
_t_149_ += 8.0 * u_1[k][j+1][i+1];
double _t_144_ = -u_1[k][j-2][i-1];
_t_144_ += u_1[k][j-2][i+1];
double _t_152_ = -u_1[k][j+2][i-1];
_t_152_ += u_1[k][j+2][i+1];
double _t_141_ = -(8.0 * mu[k][j-1][i] * _t_146_);
_t_141_ += 8.0 * mu[k][j+1][i] * _t_149_;
double _v_99_ = mu[k][j-2][i] * u_1[k][j-2][i-2];
_v_99_ += mu[k][j-2][i] * 8.0 * _t_144_;
_v_99_ -= mu[k][j-2][i] * u_1[k][j-2][i+2];
double _v_93_ = la[k][j][i-2] * u_1[k][j-2][i-2];
_v_93_ -= la[k][j][i-2] * u_1[k][j+2][i-2];
_v_93_ += la[k][j][i-2] * 8.0 * _t_118_;
double _v_94_ = la[k][j][i+2] * u_1[k][j-2][i+2];
_v_94_ -= la[k][j][i+2] * u_1[k][j+2][i+2];
_v_94_ += la[k][j][i+2] * 8.0 * _t_126_;
double _v_96_ = la[k][j][i-2] * u_2[k-2][j][i-2];
_v_96_ -= la[k][j][i-2] * u_2[k+2][j][i-2];
double _v_97_ = la[k][j][i+2] * u_2[k-2][j][i+2];
_v_97_ -= la[k][j][i+2] * u_2[k+2][j][i+2];
double _v_102_ = mu[k-2][j][i] * u_2[k-2][j][i-2];
_v_102_ -= mu[k-2][j][i] * u_2[k-2][j][i+2];
double _v_103_ = mu[k+2][j][i] * u_2[k+2][j][i-2];
_v_103_ -= mu[k+2][j][i] * u_2[k+2][j][i+2];
double _v_100_ = mu[k][j+2][i] * u_1[k][j+2][i-2];
_v_100_ += mu[k][j+2][i] * 8.0 * _t_152_;
_v_100_ -= mu[k][j+2][i] * u_1[k][j+2][i+2];
_t_141_ += _v_99_;
_t_141_ -= _v_100_;
double _t_140_ = 1.0 / 144.0 * strx[i] * stry[j];
double _t_113_ = _t_140_ * _t_141_;
double _t_115_ = _v_93_;
_t_115_ -= 8.0 * la[k][j][i-1] * _t_120_;
_t_115_ += 8.0 * la[k][j][i+1] * _t_123_;
_t_115_ -= _v_94_;
double _t_114_ = 1.0 / 144.0 * strx[i] * stry[j];
_t_113_ += _t_114_ * _t_115_;
double _t_133_ = u_2[k-2][j][i-1];
_t_133_ -= u_2[k+2][j][i-1];
_t_133_ += 8.0 * -u_2[k-1][j][i-1];
_t_133_ += 8.0 * u_2[k+1][j][i-1];
double _t_157_ = -u_2[k-2][j][i-1];
_t_157_ += u_2[k-2][j][i+1];
double _t_159_ = 8.0 * -u_2[k-1][j][i-1];
_t_159_ += 8.0 * u_2[k-1][j][i+1];
_t_159_ += u_2[k-1][j][i-2];
_t_159_ -= u_2[k-1][j][i+2];
double _t_162_ = 8.0 * -u_2[k+1][j][i-1];
_t_162_ += 8.0 * u_2[k+1][j][i+1];
_t_162_ += u_2[k+1][j][i-2];
_t_162_ -= u_2[k+1][j][i+2];
double _t_165_ = -u_2[k+2][j][i-1];
_t_165_ += u_2[k+2][j][i+1];
double _t_136_ = u_2[k-2][j][i+1];
_t_136_ -= u_2[k+2][j][i+1];
_t_136_ += 8.0 * -u_2[k-1][j][i+1];
_t_136_ += 8.0 * u_2[k+1][j][i+1];
double _t_131_ = -u_2[k-1][j][i-2];
_t_131_ += u_2[k+1][j][i-2];
double _t_139_ = -u_2[k-1][j][i+2];
_t_139_ += u_2[k+1][j][i+2];
double _t_128_ = -(8.0 * la[k][j][i-1] * _t_133_);
_t_128_ += 8.0 * la[k][j][i+1] * _t_136_;
_v_96_ += la[k][j][i-2] * 8.0 * _t_131_;
_t_128_ += _v_96_;
_v_97_ += la[k][j][i+2] * 8.0 * _t_139_;
_t_128_ -= _v_97_;
double _t_127_ = 1.0 / 144.0 * strx[i] * strz[k];
_t_113_ += _t_127_ * _t_128_;
_v_102_ += mu[k-2][j][i] * 8.0 * _t_157_;
double _t_154_ = _v_102_;
_t_154_ -= 8.0 * mu[k-1][j][i] * _t_159_;
_t_154_ += 8.0 * mu[k+1][j][i] * _t_162_;
_v_103_ += mu[k+2][j][i] * 8.0 * _t_165_;
_t_154_ -= _v_103_;
double _t_153_ = _t_127_;
_t_113_ += _t_153_ * _t_154_;
r1 += _t_113_;
double _t_193_ = 1.0 / 144.0 * stry[j] * strz[k];

double _t_173_ = u_0[k][j-2][i-1];
_t_173_ -= u_0[k][j+2][i-1];
_t_173_ += 8.0 * -u_0[k][j-1][i-1];
_t_173_ += 8.0 * u_0[k][j+1][i-1];
double _t_184_ = -u_0[k][j-2][i-1];
_t_184_ += u_0[k][j-2][i+1];
double _t_186_ = 8.0 * -u_0[k][j-1][i-1];
_t_186_ += 8.0 * u_0[k][j-1][i+1];
_t_186_ += u_0[k][j-1][i-2];
_t_186_ -= u_0[k][j-1][i+2];
double _t_189_ = 8.0 * -u_0[k][j+1][i-1];
_t_189_ += 8.0 * u_0[k][j+1][i+1];
_t_189_ += u_0[k][j+1][i-2];
_t_189_ -= u_0[k][j+1][i+2];
double _t_192_ = -u_0[k][j+2][i-1];
_t_192_ += u_0[k][j+2][i+1];
double _t_176_ = u_0[k][j-2][i+1];
_t_176_ -= u_0[k][j+2][i+1];
_t_176_ += 8.0 * -u_0[k][j-1][i+1];
_t_176_ += 8.0 * u_0[k][j+1][i+1];
double _t_171_ = -u_0[k][j-1][i-2];
_t_171_ += u_0[k][j+1][i-2];
double _t_179_ = -u_0[k][j-1][i+2];
_t_179_ += u_0[k][j+1][i+2];
double _t_168_ = -(8.0 * mu[k][j][i-1] * _t_173_);
_t_168_ += 8.0 * mu[k][j][i+1] * _t_176_;
double _v_105_ = mu[k][j][i-2] * u_0[k][j-2][i-2];
_v_105_ += mu[k][j][i-2] * 8.0 * _t_171_;
_v_105_ -= mu[k][j][i-2] * u_0[k][j+2][i-2];
double _v_108_ = la[k][j-2][i] * u_0[k][j-2][i-2];
_v_108_ -= la[k][j-2][i] * u_0[k][j-2][i+2];
_v_108_ += la[k][j-2][i] * 8.0 * _t_184_;
double _v_109_ = la[k][j+2][i] * u_0[k][j+2][i-2];
_v_109_ -= la[k][j+2][i] * u_0[k][j+2][i+2];
_v_109_ += la[k][j+2][i] * 8.0 * _t_192_;
double _v_111_ = la[k][j-2][i] * u_2[k-2][j-2][i];
_v_111_ -= la[k][j-2][i] * u_2[k+2][j-2][i];
double _v_112_ = la[k][j+2][i] * u_2[k-2][j+2][i];
_v_112_ -= la[k][j+2][i] * u_2[k+2][j+2][i];
double _v_114_ = mu[k-2][j][i] * u_2[k-2][j-2][i];
_v_114_ -= mu[k-2][j][i] * u_2[k-2][j+2][i];
double _v_115_ = mu[k+2][j][i] * u_2[k+2][j-2][i];
_v_115_ -= mu[k+2][j][i] * u_2[k+2][j+2][i];
double _v_106_ = mu[k][j][i+2] * u_0[k][j-2][i+2];
_v_106_ += mu[k][j][i+2] * 8.0 * _t_179_;
_v_106_ -= mu[k][j][i+2] * u_0[k][j+2][i+2];
_t_168_ += _v_105_;
_t_168_ -= _v_106_;
double _t_167_ = _t_140_;
double _t_166_ = _t_167_ * _t_168_;
double _t_181_ = _v_108_;
_t_181_ -= 8.0 * la[k][j-1][i] * _t_186_;
_t_181_ += 8.0 * la[k][j+1][i] * _t_189_;
_t_181_ -= _v_109_;
double _t_180_ = _t_167_;
_t_166_ += _t_180_ * _t_181_;
double _t_199_ = u_2[k-2][j-1][i];
_t_199_ -= u_2[k+2][j-1][i];
_t_199_ += 8.0 * -u_2[k-1][j-1][i];
_t_199_ += 8.0 * u_2[k+1][j-1][i];
double _t_210_ = -u_2[k-2][j-1][i];
_t_210_ += u_2[k-2][j+1][i];
double _t_212_ = 8.0 * -u_2[k-1][j-1][i];
_t_212_ += 8.0 * u_2[k-1][j+1][i];
_t_212_ += u_2[k-1][j-2][i];
_t_212_ -= u_2[k-1][j+2][i];
double _t_215_ = 8.0 * -u_2[k+1][j-1][i];
_t_215_ += 8.0 * u_2[k+1][j+1][i];
_t_215_ += u_2[k+1][j-2][i];
_t_215_ -= u_2[k+1][j+2][i];
double _t_218_ = -u_2[k+2][j-1][i];
_t_218_ += u_2[k+2][j+1][i];
double _t_202_ = u_2[k-2][j+1][i];
_t_202_ -= u_2[k+2][j+1][i];
_t_202_ += 8.0 * -u_2[k-1][j+1][i];
_t_202_ += 8.0 * u_2[k+1][j+1][i];
double _t_197_ = -u_2[k-1][j-2][i];
_t_197_ += u_2[k+1][j-2][i];
double _t_205_ = -u_2[k-1][j+2][i];
_t_205_ += u_2[k+1][j+2][i];
double _t_194_ = -(8.0 * la[k][j-1][i] * _t_199_);
_t_194_ += 8.0 * la[k][j+1][i] * _t_202_;
_v_111_ += la[k][j-2][i] * 8.0 * _t_197_;
_t_194_ += _v_111_;
_v_112_ += la[k][j+2][i] * 8.0 * _t_205_;
_t_194_ -= _v_112_;
_t_166_ += _t_193_ * _t_194_;
_v_114_ += mu[k-2][j][i] * 8.0 * _t_210_;
double _t_207_ = _v_114_;
_t_207_ -= 8.0 * mu[k-1][j][i] * _t_212_;
_t_207_ += 8.0 * mu[k+1][j][i] * _t_215_;
_v_115_ += mu[k+2][j][i] * 8.0 * _t_218_;
_t_207_ -= _v_115_;
double _t_206_ = _t_193_;
_t_166_ += _t_206_ * _t_207_;
r2 += _t_166_;

double uacc_0kc0jc0ic0 = cof * r1;
uacc_0kc0jc0ic0 += a1 * uacc_0[k][j][i];
double _v_120_ = cof * r2;
double _v_122_ = cof * r3;

double uacc_1kc0jc0ic0 = _v_120_;
uacc_1kc0jc0ic0 += a1 * uacc_1[k][j][i];

double uacc_2kc0jc0ic0 = _v_122_;
uacc_2kc0jc0ic0 += a1 * uacc_2[k][j][i];

uacc_0[k][j][i] = uacc_0kc0jc0ic0;
uacc_1[k][j][i] = uacc_1kc0jc0ic0;
uacc_2[k][j][i] = uacc_2kc0jc0ic0;
	} 
}

extern "C" void host_code (double *h_uacc_0, double *h_uacc_1, double *h_uacc_2, double *h_u_0, double *h_u_1, double *h_u_2, double *h_mu, double *h_la, double *h_strx, double *h_stry, double *h_strz, int N) {
	double *uacc_0;
	cudaMalloc (&uacc_0, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for uacc_0\n");
	cudaMemcpy (uacc_0, h_uacc_0, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *uacc_1;
	cudaMalloc (&uacc_1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for uacc_1\n");
	cudaMemcpy (uacc_1, h_uacc_1, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *uacc_2;
	cudaMalloc (&uacc_2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for uacc_2\n");
	cudaMemcpy (uacc_2, h_uacc_2, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *u_0;
	cudaMalloc (&u_0, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u_0\n");
	cudaMemcpy (u_0, h_u_0, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *u_1;
	cudaMalloc (&u_1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u_1\n");
	cudaMemcpy (u_1, h_u_1, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *u_2;
	cudaMalloc (&u_2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u_2\n");
	cudaMemcpy (u_2, h_u_2, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *mu;
	cudaMalloc (&mu, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for mu\n");
	cudaMemcpy (mu, h_mu, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *la;
	cudaMalloc (&la, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for la\n");
	cudaMemcpy (la, h_la, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *strx;
	cudaMalloc (&strx, sizeof(double)*N);
	check_error ("Failed to allocate device memory for strx\n");
	cudaMemcpy (strx, h_strx, sizeof(double)*N, cudaMemcpyHostToDevice);
	double *stry;
	cudaMalloc (&stry, sizeof(double)*N);
	check_error ("Failed to allocate device memory for stry\n");
	cudaMemcpy (stry, h_stry, sizeof(double)*N, cudaMemcpyHostToDevice);
	double *strz;
	cudaMalloc (&strz, sizeof(double)*N);
	check_error ("Failed to allocate device memory for strz\n");
	cudaMemcpy (strz, h_strz, sizeof(double)*N, cudaMemcpyHostToDevice);

	dim3 blockconfig (16, 2, 2);
	dim3 gridconfig (ceil(N, blockconfig.x), ceil(N, blockconfig.y), ceil(N, blockconfig.z));

	sw4 <<<gridconfig, blockconfig>>> (uacc_0, uacc_1, uacc_2, u_0, u_1, u_2, mu, la, strx, stry, strz, N);

	cudaMemcpy (h_uacc_0, uacc_0, sizeof(double)*N*N*N, cudaMemcpyDeviceToHost);
	cudaMemcpy (h_uacc_1, uacc_1, sizeof(double)*N*N*N, cudaMemcpyDeviceToHost);
	cudaMemcpy (h_uacc_2, uacc_2, sizeof(double)*N*N*N, cudaMemcpyDeviceToHost);

	cudaFree (uacc_0); 
	cudaFree (uacc_1);
	cudaFree (uacc_2);
	cudaFree (u_0);
	cudaFree (u_1);
	cudaFree (u_2);
	cudaFree (mu);
	cudaFree (la);
	cudaFree (strx);
	cudaFree (stry);
	cudaFree (strz);
}

	.file	"tmpxft_0031eaae_00000000-6_reordered-a.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0:
.LFB2173:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE2173:
	.size	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error : %s, %s\n"
	.text
	.globl	_Z11check_errorPKc
	.type	_Z11check_errorPKc, @function
_Z11check_errorPKc:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L3
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movq	%rbx, %rdx
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L3:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z11check_errorPKc, .-_Z11check_errorPKc
	.globl	_Z43__device_stub__Z3sw4PdS_S_S_S_S_S_S_S_S_S_iPdS_S_S_S_S_S_S_S_S_S_i
	.type	_Z43__device_stub__Z3sw4PdS_S_S_S_S_S_S_S_S_S_iPdS_S_S_S_S_S_S_S_S_S_i, @function
_Z43__device_stub__Z3sw4PdS_S_S_S_S_S_S_S_S_S_iPdS_S_S_S_S_S_S_S_S_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$264, %rsp
	.cfi_def_cfa_offset 272
	movq	288(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	104(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	116(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	296(%rsp), %rax
	movq	%rdx, 24(%rsp)
	leaq	88(%rsp), %rdx
	movq	%rax, 8(%rsp)
	movq	304(%rsp), %rax
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 248(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movq	%rcx, 48(%rsp)
	leaq	96(%rsp), %rcx
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 192(%rsp)
	movq	272(%rsp), %rax
	movq	%r8, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 200(%rsp)
	movq	280(%rsp), %rax
	movq	%r9, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 224(%rsp)
	movq	%rsp, %rax
	movq	%rax, 232(%rsp)
	leaq	312(%rsp), %rax
	movq	%rax, 240(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 104(%rsp)
	movl	$1, 112(%rsp)
	movq	%rax, 116(%rsp)
	movl	$1, 124(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	96(%rsp)
	.cfi_def_cfa_offset 280
	leaq	_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i(%rip), %rdi
	pushq	96(%rsp)
	.cfi_def_cfa_offset 288
	movq	132(%rsp), %rcx
	movl	140(%rsp), %r8d
	movq	120(%rsp), %rsi
	movl	128(%rsp), %edx
	leaq	168(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 280
	popq	%rdx
	.cfi_def_cfa_offset 272
.L7:
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$264, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z43__device_stub__Z3sw4PdS_S_S_S_S_S_S_S_S_S_iPdS_S_S_S_S_S_S_S_S_S_i, .-_Z43__device_stub__Z3sw4PdS_S_S_S_S_S_S_S_S_S_iPdS_S_S_S_S_S_S_S_S_S_i
	.globl	_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i
	.type	_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i, @function
_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z3sw4PdS_S_S_S_S_S_S_S_S_S_iPdS_S_S_S_S_S_S_S_S_S_i
	.cfi_endproc
.LFE2054:
	.size	_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i, .-_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i
	.section	.rodata.str1.1
.LC1:
	.string	"Failed to allocate device memory for uacc_0\n"
.LC2:
	.string	"Failed to allocate device memory for uacc_1\n"
.LC3:
	.string	"Failed to allocate device memory for uacc_2\n"
.LC4:
	.string	"Failed to allocate device memory for u_0\n"
.LC5:
	.string	"Failed to allocate device memory for u_1\n"
.LC6:
	.string	"Failed to allocate device memory for u_2\n"
.LC7:
	.string	"Failed to allocate device memory for mu\n"
.LC8:
	.string	"Failed to allocate device memory for la\n"
.LC9:
	.string	"Failed to allocate device memory for strx\n"
.LC10:
	.string	"Failed to allocate device memory for stry\n"
.LC11:
	.string	"Failed to allocate device memory for strz\n"
	.text
	.globl	host_code
	.type	host_code, @function
host_code:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	movq	272(%rsp), %rax
	movq	%r9, 32(%rsp)
	movq	%rdx, 24(%rsp)
	movslq	296(%rsp), %rbp
	movq	%rax, 40(%rsp)
	movq	280(%rsp), %rax
	movq	%rdi, 8(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rbp, %rbx
	movq	256(%rsp), %r15
	movq	%rax, 48(%rsp)
	movq	288(%rsp), %rax
	movq	%rsi, 16(%rsp)
	movq	264(%rsp), %r14
	movq	%rax, 56(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	movq	%rbp, %rax
	imulq	%rbp, %rax
	imulq	%rbp, %rax
	salq	$3, %rbp
	salq	$3, %rax
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC1(%rip), %rdi
	call	_Z11check_errorPKc
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	72(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC2(%rip), %rdi
	call	_Z11check_errorPKc
	movq	(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	80(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC3(%rip), %rdi
	call	_Z11check_errorPKc
	movq	(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	88(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rsi
	leaq	96(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC4(%rip), %rdi
	call	_Z11check_errorPKc
	movq	(%rsp), %rdx
	movq	96(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rsi
	leaq	104(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC5(%rip), %rdi
	call	_Z11check_errorPKc
	movq	(%rsp), %rdx
	movq	104(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rsi
	leaq	112(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC6(%rip), %rdi
	call	_Z11check_errorPKc
	movq	(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movq	112(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rsi
	leaq	120(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC7(%rip), %rdi
	call	_Z11check_errorPKc
	movq	(%rsp), %rdx
	movq	120(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rsi
	leaq	128(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC8(%rip), %rdi
	call	_Z11check_errorPKc
	movq	(%rsp), %rdx
	movl	$1, %ecx
	movq	%r14, %rsi
	movq	128(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	%rbp, %rsi
	leaq	136(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC9(%rip), %rdi
	call	_Z11check_errorPKc
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	136(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	%rbp, %rsi
	leaq	144(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC10(%rip), %rdi
	call	_Z11check_errorPKc
	movq	48(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	144(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	%rbp, %rsi
	leaq	152(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC11(%rip), %rdi
	call	_Z11check_errorPKc
	movq	56(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	152(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	%ebx, %eax
	movl	%ebx, %esi
	movl	%ebx, %edx
	andl	$1, %eax
	shrl	%esi
	movl	$2, %ecx
	cmpl	$1, %eax
	movl	%ebx, %eax
	sbbl	$-1, %esi
	andl	$15, %edx
	shrl	$4, %eax
	cmpl	$1, %edx
	movl	%esi, 176(%rsp)
	movl	$536870913, %edx
	sbbl	$-1, %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$4, %rdx
	movl	%eax, 172(%rsp)
	movq	172(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	%rbx
	.cfi_def_cfa_offset 264
	pushq	160(%rsp)
	.cfi_def_cfa_offset 272
	pushq	160(%rsp)
	.cfi_def_cfa_offset 280
	pushq	160(%rsp)
	.cfi_def_cfa_offset 288
	pushq	160(%rsp)
	.cfi_def_cfa_offset 296
	pushq	160(%rsp)
	.cfi_def_cfa_offset 304
	movq	160(%rsp), %r9
	movq	152(%rsp), %r8
	movq	144(%rsp), %rcx
	movq	136(%rsp), %rdx
	movq	128(%rsp), %rsi
	movq	120(%rsp), %rdi
	call	_Z43__device_stub__Z3sw4PdS_S_S_S_S_S_S_S_S_S_iPdS_S_S_S_S_S_S_S_S_S_i
	addq	$48, %rsp
	.cfi_def_cfa_offset 256
.L15:
	movq	(%rsp), %rdx
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	8(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	80(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	88(%rsp), %rsi
	movl	$2, %ecx
	movq	24(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movq	144(%rsp), %rdi
	call	cudaFree@PLT
	movq	152(%rsp), %rdi
	call	cudaFree@PLT
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	host_code, .-host_code
	.section	.rodata.str1.1
.LC12:
	.string	"_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include "hip/hip_runtime.h"
#define max(x,y)  ((x) > (y)? (x) : (y))
#define min(x,y)  ((x) < (y)? (x) : (y))
#define ceil(a,b) ((a) % (b) == 0 ? (a) / (b) : ((a) / (b)) + 1)

void check_error (const char* message) {
	hipError_t error = hipGetLastError ();
	if (error != hipSuccess) {
		printf ("CUDA error : %s, %s\n", message, hipGetErrorString (error));
		exit(-1);
	}
}

__global__ void sw4 (double * uacc_in_0, double * uacc_in_1, double * uacc_in_2, double * __restrict__ u_in_0, double * __restrict__ u_in_1, double * __restrict__ u_in_2, double * __restrict__ mu_in, double * __restrict__ la_in, double * strx, double * stry, double * strz, int N) {
	//Determing the block's indices
	int blockdim_i= (int)(blockDim.x);
	int i0 = (int)(blockIdx.x)*(blockdim_i);
	int i = max (i0, 0) + (int)(threadIdx.x);
	int blockdim_j= (int)(blockDim.y);
	int j0 = (int)(blockIdx.y)*(blockdim_j);
	int j = max (j0, 0) + (int)(threadIdx.y);
	int blockdim_k= (int)(blockDim.z);
	int k0 = (int)(blockIdx.z)*(blockdim_k);
	int k = max (k0, 0) + (int)(threadIdx.z);

	// Assumptions 
	int a1 = 1;
	double h = 3.7;
	double cof = 1e0 / ( h *  h);

	double (*uacc_0)[304][304] = (double (*)[304][304])uacc_in_0;
	double (*uacc_1)[304][304] = (double (*)[304][304])uacc_in_1;
	double (*uacc_2)[304][304] = (double (*)[304][304])uacc_in_2;
	double (*u_0)[304][304] = (double (*)[304][304])u_in_0;
	double (*u_1)[304][304] = (double (*)[304][304])u_in_1;
	double (*u_2)[304][304] = (double (*)[304][304])u_in_2;
	double (*mu)[304][304] = (double (*)[304][304])mu_in;
	double (*la)[304][304] = (double (*)[304][304])la_in;

	double mux1, mux2, mux3, mux4, muy1, muy2, muy3, muy4, muz1, muz2, muz3, muz4;
	double r1, r2, r3;
	if (i>=2 & j>=2 & k>=2 & i<=N-3 & j<=N-3 & k<=N-3) {
mux1 = mu[k][j][i-1] * strx[i-1];
mux1 -= 3.0 / 4.0 * mu[k][j][i] * strx[i];
mux1 -= 3.0 / 4.0 * mu[k][j][i-2] * strx[i-2];

mux2 = mu[k][j][i-2] * strx[i-2];
mux2 += mu[k][j][i+1] * strx[i+1];
mux2 += 3.0 * mu[k][j][i] * strx[i];
mux2 += 3.0 * mu[k][j][i-1] * strx[i-1];

mux3 = mu[k][j][i-1] * strx[i-1];
mux3 += mu[k][j][i+2] * strx[i+2];
mux3 += 3.0 * mu[k][j][i+1] * strx[i+1];
mux3 += 3.0 * mu[k][j][i] * strx[i];

mux4 = mu[k][j][i+1] * strx[i+1];
mux4 -= 3.0 / 4.0 * mu[k][j][i] * strx[i];
mux4 -= 3.0 / 4.0 * mu[k][j][i+2] * strx[i+2];

muy1 = mu[k][j-1][i] * stry[j-1];
muy1 -= 3.0 / 4.0 * mu[k][j][i] * stry[j];
muy1 -= 3.0 / 4.0 * mu[k][j-2][i] * stry[j-2];

muy2 = mu[k][j-2][i] * stry[j-2];
muy2 += mu[k][j+1][i] * stry[j+1];
muy2 += 3.0 * mu[k][j][i] * stry[j];
muy2 += 3.0 * mu[k][j-1][i] * stry[j-1];

muy3 = mu[k][j-1][i] * stry[j-1];
muy3 += mu[k][j+2][i] * stry[j+2];
muy3 += 3.0 * mu[k][j+1][i] * stry[j+1];
muy3 += 3.0 * mu[k][j][i] * stry[j];

muy4 = mu[k][j+1][i] * stry[j+1];
muy4 -= 3.0 / 4.0 * mu[k][j][i] * stry[j];
muy4 -= 3.0 / 4.0 * mu[k][j+2][i] * stry[j+2];

muz1 = mu[k-1][j][i] * strz[k-1];
muz1 -= 3.0 / 4.0 * mu[k][j][i] * strz[k];
muz1 -= 3.0 / 4.0 * mu[k-2][j][i] * strz[k-2];

muz2 = mu[k-2][j][i] * strz[k-2];
muz2 += mu[k+1][j][i] * strz[k+1];
muz2 += 3.0 * mu[k][j][i] * strz[k];
muz2 += 3.0 * mu[k-1][j][i] * strz[k-1];

muz3 = mu[k-1][j][i] * strz[k-1];
muz3 += mu[k+2][j][i] * strz[k+2];
muz3 += 3.0 * mu[k+1][j][i] * strz[k+1];
muz3 += 3.0 * mu[k][j][i] * strz[k];

muz4 = -(3.0 / 4.0 * mu[k][j][i] * strz[k]);
muz4 += mu[k+1][j][i] * strz[k+1];
muz4 -= 3.0 / 4.0 * mu[k+2][j][i] * strz[k+2];

double _t_3_ = u_0[k][j][i-2];
_t_3_ -= u_0[k][j][i];
double _v_18_ = la[k][j][i-1] * strx[i-1];
double _t_2_ = _v_18_;
_t_2_ += 2.0 * mux1;
_t_2_ -= 3.0 / 4.0 * la[k][j][i] * strx[i];
_t_2_ -= 3.0 / 4.0 * la[k][j][i-2] * strx[i-2];
double _v_19_ = _t_2_ * _t_3_;
double _v_28_ = strx[i] * _v_19_;
double _t_4_ = la[k][j][i-2] * strx[i-2];
double _v_21_ = la[k][j][i+1] * strx[i+1];
_t_4_ += _v_21_;
_t_4_ += 2.0 * mux2;
_t_4_ += 3.0 * la[k][j][i] * strx[i];
_t_4_ += 3.0 * la[k][j][i-1] * strx[i-1];
double _t_5_ = u_0[k][j][i-1];
_t_5_ -= u_0[k][j][i];
double _v_22_ = _t_4_ * _t_5_;
_v_28_ += strx[i] * _v_22_;
double _t_6_ = _v_18_;
_t_6_ += la[k][j][i+2] * strx[i+2];
_t_6_ += 2.0 * mux3;
_t_6_ += 3.0 * la[k][j][i+1] * strx[i+1];
_t_6_ += 3.0 * la[k][j][i] * strx[i];
double _t_8_ = -(3.0 / 4.0 * la[k][j][i] * strx[i]);
_t_8_ -= 3.0 / 4.0 * la[k][j][i+2] * strx[i+2];
_t_8_ += 2.0 * mux4;
double _t_7_ = u_0[k][j][i+1];
_t_7_ -= u_0[k][j][i];
double _v_25_ = _t_6_ * _t_7_;
_v_28_ += strx[i] * _v_25_;
_t_8_ += _v_21_;
double _t_9_ = u_0[k][j][i+2];
_t_9_ -= u_0[k][j][i];
double _v_27_ = _t_8_ * _t_9_;
_v_28_ += strx[i] * _v_27_;
r1 = 1.0 / 6.0 * _v_28_;
double _v_29_ = muy1 * u_0[k][j-2][i];
_v_29_ -= muy1 * u_0[k][j][i];
double _v_33_ = stry[j] * _v_29_;
double _v_30_ = muy2 * u_0[k][j-1][i];
_v_30_ -= muy2 * u_0[k][j][i];
_v_33_ += stry[j] * _v_30_;
double _v_31_ = muy3 * u_0[k][j+1][i];
_v_31_ -= muy3 * u_0[k][j][i];
_v_33_ += stry[j] * _v_31_;
double _v_32_ = muy4 * u_0[k][j+2][i];
_v_32_ -= muy4 * u_0[k][j][i];
_v_33_ += stry[j] * _v_32_;
r1 += 1.0 / 6.0 * _v_33_;
double _v_34_ = muz1 * u_0[k-2][j][i];
_v_34_ -= muz1 * u_0[k][j][i];
double _v_38_ = strz[k] * _v_34_;
double _v_35_ = muz2 * u_0[k-1][j][i];
_v_35_ -= muz2 * u_0[k][j][i];
_v_38_ += strz[k] * _v_35_;
double _v_36_ = muz3 * u_0[k+1][j][i];
_v_36_ -= muz3 * u_0[k][j][i];
_v_38_ += strz[k] * _v_36_;
double _v_37_ = -(muz4 * u_0[k][j][i]);
_v_37_ += muz4 * u_0[k+2][j][i];
_v_38_ += strz[k] * _v_37_;
r1 += 1.0 / 6.0 * _v_38_;

double _v_39_ = mux1 * u_1[k][j][i-2];
_v_39_ -= mux1 * u_1[k][j][i];
double _v_43_ = strx[i] * _v_39_;
double _v_40_ = mux2 * u_1[k][j][i-1];
_v_40_ -= mux2 * u_1[k][j][i];
_v_43_ += strx[i] * _v_40_;
double _v_41_ = mux3 * u_1[k][j][i+1];
_v_41_ -= mux3 * u_1[k][j][i];
_v_43_ += strx[i] * _v_41_;
double _v_42_ = mux4 * u_1[k][j][i+2];
_v_42_ -= mux4 * u_1[k][j][i];
_v_43_ += strx[i] * _v_42_;
r2 = 1.0 / 6.0 * _v_43_;
double _t_28_ = u_1[k][j-2][i];
_t_28_ -= u_1[k][j][i];
double _v_44_ = la[k][j-1][i] * stry[j-1];
double _t_27_ = _v_44_;
_t_27_ += 2.0 * muy1;
_t_27_ -= 3.0 / 4.0 * la[k][j][i] * stry[j];
_t_27_ -= 3.0 / 4.0 * la[k][j-2][i] * stry[j-2];
double _v_45_ = _t_27_ * _t_28_;
double _v_54_ = stry[j] * _v_45_;
double _t_29_ = la[k][j-2][i] * stry[j-2];
double _v_47_ = la[k][j+1][i] * stry[j+1];
_t_29_ += _v_47_;
_t_29_ += 2.0 * muy2;
_t_29_ += 3.0 * la[k][j][i] * stry[j];
_t_29_ += 3.0 * la[k][j-1][i] * stry[j-1];
double _t_30_ = u_1[k][j-1][i];
_t_30_ -= u_1[k][j][i];
double _v_48_ = _t_29_ * _t_30_;
_v_54_ += stry[j] * _v_48_;
double _t_31_ = _v_44_;
_t_31_ += la[k][j+2][i] * stry[j+2];
_t_31_ += 2.0 * muy3;
_t_31_ += 3.0 * la[k][j+1][i] * stry[j+1];
_t_31_ += 3.0 * la[k][j][i] * stry[j];
double _t_33_ = -(3.0 / 4.0 * la[k][j][i] * stry[j]);
_t_33_ -= 3.0 / 4.0 * la[k][j+2][i] * stry[j+2];
_t_33_ += 2.0 * muy4;
double _t_32_ = u_1[k][j+1][i];
_t_32_ -= u_1[k][j][i];
double _v_51_ = _t_31_ * _t_32_;
_v_54_ += stry[j] * _v_51_;
_t_33_ += _v_47_;
double _t_34_ = u_1[k][j+2][i];
_t_34_ -= u_1[k][j][i];
double _v_53_ = _t_33_ * _t_34_;
_v_54_ += stry[j] * _v_53_;
r2 += 1.0 / 6.0 * _v_54_;
double _v_55_ = muz1 * u_1[k-2][j][i];
_v_55_ -= muz1 * u_1[k][j][i];
double _v_59_ = strz[k] * _v_55_;
double _v_56_ = muz2 * u_1[k-1][j][i];
_v_56_ -= muz2 * u_1[k][j][i];
_v_59_ += strz[k] * _v_56_;
double _v_57_ = muz3 * u_1[k+1][j][i];
_v_57_ -= muz3 * u_1[k][j][i];
_v_59_ += strz[k] * _v_57_;
double _v_58_ = -(muz4 * u_1[k][j][i]);
_v_58_ += muz4 * u_1[k+2][j][i];
_v_59_ += strz[k] * _v_58_;
r2 += 1.0 / 6.0 * _v_59_;

double _v_60_ = mux1 * u_2[k][j][i-2];
_v_60_ -= mux1 * u_2[k][j][i];
double _v_64_ = strx[i] * _v_60_;
double _v_61_ = mux2 * u_2[k][j][i-1];
_v_61_ -= mux2 * u_2[k][j][i];
_v_64_ += strx[i] * _v_61_;
double _v_62_ = mux3 * u_2[k][j][i+1];
_v_62_ -= mux3 * u_2[k][j][i];
_v_64_ += strx[i] * _v_62_;
double _v_63_ = mux4 * u_2[k][j][i+2];
_v_63_ -= mux4 * u_2[k][j][i];
_v_64_ += strx[i] * _v_63_;
r3 = 1.0 / 6.0 * _v_64_;
double _v_65_ = muy1 * u_2[k][j-2][i];
_v_65_ -= muy1 * u_2[k][j][i];
double _v_69_ = stry[j] * _v_65_;
double _v_66_ = muy2 * u_2[k][j-1][i];
_v_66_ -= muy2 * u_2[k][j][i];
_v_69_ += stry[j] * _v_66_;
double _v_67_ = muy3 * u_2[k][j+1][i];
_v_67_ -= muy3 * u_2[k][j][i];
_v_69_ += stry[j] * _v_67_;
double _v_68_ = muy4 * u_2[k][j+2][i];
_v_68_ -= muy4 * u_2[k][j][i];
_v_69_ += stry[j] * _v_68_;
r3 += 1.0 / 6.0 * _v_69_;
double _t_53_ = u_2[k-2][j][i];
_t_53_ -= u_2[k][j][i];
double _t_52_ = 2.0 * muz1;
double _v_70_ = la[k-1][j][i] * strz[k-1];
double _t_54_ = 3.0 * la[k-1][j][i] * strz[k-1];
_t_54_ += 2.0 * muz2;
_t_54_ += 3.0 * la[k][j][i] * strz[k];
double _t_56_ = 3.0 * la[k][j][i] * strz[k];
_t_56_ += 2.0 * muz3;
double _t_58_ = -(3.0 / 4.0 * la[k][j][i] * strz[k]);
_t_58_ += 2.0 * muz4;
_t_52_ -= 3.0 / 4.0 * la[k][j][i] * strz[k];
_t_52_ += _v_70_;
_t_52_ -= 3.0 / 4.0 * la[k-2][j][i] * strz[k-2];
double _v_71_ = _t_52_ * _t_53_;
double _v_80_ = strz[k] * _v_71_;
_t_54_ += la[k-2][j][i] * strz[k-2];
double _v_73_ = la[k+1][j][i] * strz[k+1];
_t_56_ += 3.0 * la[k+1][j][i] * strz[k+1];
_t_54_ += _v_73_;
double _t_55_ = u_2[k-1][j][i];
_t_55_ -= u_2[k][j][i];
double _v_74_ = _t_54_ * _t_55_;
_v_80_ += strz[k] * _v_74_;
_t_56_ += _v_70_;
_t_56_ += la[k+2][j][i] * strz[k+2];
_t_58_ -= 3.0 / 4.0 * la[k+2][j][i] * strz[k+2];
double _t_57_ = u_2[k+1][j][i];
_t_57_ -= u_2[k][j][i];
double _v_77_ = _t_56_ * _t_57_;
_v_80_ += strz[k] * _v_77_;
_t_58_ += _v_73_;
double _t_59_ = -(u_2[k][j][i]);
_t_59_ += u_2[k+2][j][i];
double _v_79_ = _t_58_ * _t_59_;
_v_80_ += strz[k] * _v_79_;
r3 += 1.0 / 6.0 * _v_80_;

double _t_65_ = -u_0[k-1][j][i-2];
_t_65_ += u_0[k+1][j][i-2];
double _t_93_ = u_0[k-1][j][i-2];
_t_93_ -= u_0[k-1][j][i+2];
_t_93_ += 8.0 * -u_0[k-1][j][i-1];
_t_93_ += 8.0 * u_0[k-1][j][i+1];
double _t_96_ = u_0[k+1][j][i-2];
_t_96_ -= u_0[k+1][j][i+2];
_t_96_ += 8.0 * -u_0[k+1][j][i-1];
_t_96_ += 8.0 * u_0[k+1][j][i+1];
double _t_67_ = 8.0 * -u_0[k-1][j][i-1];
_t_67_ += 8.0 * u_0[k+1][j][i-1];
_t_67_ += u_0[k-2][j][i-1];
_t_67_ -= u_0[k+2][j][i-1];
double _t_70_ = 8.0 * -u_0[k-1][j][i+1];
_t_70_ += 8.0 * u_0[k+1][j][i+1];
_t_70_ += u_0[k-2][j][i+1];
_t_70_ -= u_0[k+2][j][i+1];
double _t_73_ = -u_0[k-1][j][i+2];
_t_73_ += u_0[k+1][j][i+2];
double _t_91_ = -u_0[k-2][j][i-1];
_t_91_ += u_0[k-2][j][i+1];
double _t_99_ = -u_0[k+2][j][i-1];
_t_99_ += u_0[k+2][j][i+1];
double _v_81_ = mu[k][j][i-2] * 8.0 * _t_65_;
_v_81_ += mu[k][j][i-2] * u_0[k-2][j][i-2];
_v_81_ -= mu[k][j][i-2] * u_0[k+2][j][i-2];
double _v_87_ = la[k-2][j][i] * u_0[k-2][j][i-2];
_v_87_ -= la[k-2][j][i] * u_0[k-2][j][i+2];
_v_87_ += la[k-2][j][i] * 8.0 * _t_91_;
double _v_88_ = la[k+2][j][i] * u_0[k+2][j][i-2];
_v_88_ -= la[k+2][j][i] * u_0[k+2][j][i+2];
_v_88_ += la[k+2][j][i] * 8.0 * _t_99_;
double _v_90_ = la[k-2][j][i] * u_1[k-2][j-2][i];
_v_90_ -= la[k-2][j][i] * u_1[k-2][j+2][i];
double _v_91_ = la[k+2][j][i] * u_1[k+2][j-2][i];
_v_91_ -= la[k+2][j][i] * u_1[k+2][j+2][i];
double _v_82_ = mu[k][j][i+2] * u_0[k-2][j][i+2];
_v_82_ -= mu[k][j][i+2] * u_0[k+2][j][i+2];
_v_82_ += mu[k][j][i+2] * 8.0 * _t_73_;
double _v_84_ = mu[k][j-2][i] * u_1[k-2][j-2][i];
_v_84_ -= mu[k][j-2][i] * u_1[k+2][j-2][i];
double _v_85_ = mu[k][j+2][i] * u_1[k-2][j+2][i];
_v_85_ -= mu[k][j+2][i] * u_1[k+2][j+2][i];
double _t_62_ = _v_81_;
_t_62_ -= 8.0 * mu[k][j][i-1] * _t_67_;
_t_62_ += 8.0 * mu[k][j][i+1] * _t_70_;
_t_62_ -= _v_82_;
double _t_61_ = 1.0 / 144.0 * strx[i] * strz[k];
double _t_60_ = _t_61_ * _t_62_;
double _t_88_ = _v_87_;
_t_88_ -= 8.0 * la[k-1][j][i] * _t_93_;
_t_88_ += 8.0 * la[k+1][j][i] * _t_96_;
_t_88_ -= _v_88_;
double _t_87_ = 1.0 / 144.0 * strx[i] * strz[k];
_t_60_ += _t_87_ * _t_88_;
double _t_78_ = -u_1[k-1][j-2][i];
_t_78_ += u_1[k+1][j-2][i];
double _t_106_ = u_1[k-1][j-2][i];
_t_106_ -= u_1[k-1][j+2][i];
_t_106_ += 8.0 * -u_1[k-1][j-1][i];
_t_106_ += 8.0 * u_1[k-1][j+1][i];
double _t_109_ = u_1[k+1][j-2][i];
_t_109_ -= u_1[k+1][j+2][i];
_t_109_ += 8.0 * -u_1[k+1][j-1][i];
_t_109_ += 8.0 * u_1[k+1][j+1][i];
double _t_80_ = 8.0 * -u_1[k-1][j-1][i];
_t_80_ += 8.0 * u_1[k+1][j-1][i];
_t_80_ += u_1[k-2][j-1][i];
_t_80_ -= u_1[k+2][j-1][i];
double _t_83_ = 8.0 * -u_1[k-1][j+1][i];
_t_83_ += 8.0 * u_1[k+1][j+1][i];
_t_83_ += u_1[k-2][j+1][i];
_t_83_ -= u_1[k+2][j+1][i];
double _t_86_ = -u_1[k-1][j+2][i];
_t_86_ += u_1[k+1][j+2][i];
double _t_104_ = -u_1[k-2][j-1][i];
_t_104_ += u_1[k-2][j+1][i];
double _t_112_ = -u_1[k+2][j-1][i];
_t_112_ += u_1[k+2][j+1][i];
_v_84_ += mu[k][j-2][i] * 8.0 * _t_78_;
double _t_75_ = _v_84_;
_t_75_ -= 8.0 * mu[k][j-1][i] * _t_80_;
_t_75_ += 8.0 * mu[k][j+1][i] * _t_83_;
_v_85_ += mu[k][j+2][i] * 8.0 * _t_86_;
_t_75_ -= _v_85_;
double _t_74_ = 1.0 / 144.0 * stry[j] * strz[k];
_t_60_ += _t_74_ * _t_75_;
_v_90_ += la[k-2][j][i] * 8.0 * _t_104_;
double _t_101_ = _v_90_;
_t_101_ -= 8.0 * la[k-1][j][i] * _t_106_;
_t_101_ += 8.0 * la[k+1][j][i] * _t_109_;
_v_91_ += la[k+2][j][i] * 8.0 * _t_112_;
_t_101_ -= _v_91_;
double _t_100_ = 1.0 / 144.0 * stry[j] * strz[k];
_t_60_ += _t_100_ * _t_101_;
r3 += _t_60_;

double _t_146_ = u_1[k][j-1][i-2];
_t_146_ -= u_1[k][j-1][i+2];
_t_146_ += 8.0 * -u_1[k][j-1][i-1];
_t_146_ += 8.0 * u_1[k][j-1][i+1];
double _t_118_ = -u_1[k][j-1][i-2];
_t_118_ += u_1[k][j+1][i-2];
double _t_120_ = 8.0 * -u_1[k][j-1][i-1];
_t_120_ += 8.0 * u_1[k][j+1][i-1];
_t_120_ += u_1[k][j-2][i-1];
_t_120_ -= u_1[k][j+2][i-1];
double _t_123_ = 8.0 * -u_1[k][j-1][i+1];
_t_123_ += 8.0 * u_1[k][j+1][i+1];
_t_123_ += u_1[k][j-2][i+1];
_t_123_ -= u_1[k][j+2][i+1];
double _t_126_ = -u_1[k][j-1][i+2];
_t_126_ += u_1[k][j+1][i+2];
double _t_149_ = u_1[k][j+1][i-2];
_t_149_ -= u_1[k][j+1][i+2];
_t_149_ += 8.0 * -u_1[k][j+1][i-1];
_t_149_ += 8.0 * u_1[k][j+1][i+1];
double _t_144_ = -u_1[k][j-2][i-1];
_t_144_ += u_1[k][j-2][i+1];
double _t_152_ = -u_1[k][j+2][i-1];
_t_152_ += u_1[k][j+2][i+1];
double _t_141_ = -(8.0 * mu[k][j-1][i] * _t_146_);
_t_141_ += 8.0 * mu[k][j+1][i] * _t_149_;
double _v_99_ = mu[k][j-2][i] * u_1[k][j-2][i-2];
_v_99_ += mu[k][j-2][i] * 8.0 * _t_144_;
_v_99_ -= mu[k][j-2][i] * u_1[k][j-2][i+2];
double _v_93_ = la[k][j][i-2] * u_1[k][j-2][i-2];
_v_93_ -= la[k][j][i-2] * u_1[k][j+2][i-2];
_v_93_ += la[k][j][i-2] * 8.0 * _t_118_;
double _v_94_ = la[k][j][i+2] * u_1[k][j-2][i+2];
_v_94_ -= la[k][j][i+2] * u_1[k][j+2][i+2];
_v_94_ += la[k][j][i+2] * 8.0 * _t_126_;
double _v_96_ = la[k][j][i-2] * u_2[k-2][j][i-2];
_v_96_ -= la[k][j][i-2] * u_2[k+2][j][i-2];
double _v_97_ = la[k][j][i+2] * u_2[k-2][j][i+2];
_v_97_ -= la[k][j][i+2] * u_2[k+2][j][i+2];
double _v_102_ = mu[k-2][j][i] * u_2[k-2][j][i-2];
_v_102_ -= mu[k-2][j][i] * u_2[k-2][j][i+2];
double _v_103_ = mu[k+2][j][i] * u_2[k+2][j][i-2];
_v_103_ -= mu[k+2][j][i] * u_2[k+2][j][i+2];
double _v_100_ = mu[k][j+2][i] * u_1[k][j+2][i-2];
_v_100_ += mu[k][j+2][i] * 8.0 * _t_152_;
_v_100_ -= mu[k][j+2][i] * u_1[k][j+2][i+2];
_t_141_ += _v_99_;
_t_141_ -= _v_100_;
double _t_140_ = 1.0 / 144.0 * strx[i] * stry[j];
double _t_113_ = _t_140_ * _t_141_;
double _t_115_ = _v_93_;
_t_115_ -= 8.0 * la[k][j][i-1] * _t_120_;
_t_115_ += 8.0 * la[k][j][i+1] * _t_123_;
_t_115_ -= _v_94_;
double _t_114_ = 1.0 / 144.0 * strx[i] * stry[j];
_t_113_ += _t_114_ * _t_115_;
double _t_133_ = u_2[k-2][j][i-1];
_t_133_ -= u_2[k+2][j][i-1];
_t_133_ += 8.0 * -u_2[k-1][j][i-1];
_t_133_ += 8.0 * u_2[k+1][j][i-1];
double _t_157_ = -u_2[k-2][j][i-1];
_t_157_ += u_2[k-2][j][i+1];
double _t_159_ = 8.0 * -u_2[k-1][j][i-1];
_t_159_ += 8.0 * u_2[k-1][j][i+1];
_t_159_ += u_2[k-1][j][i-2];
_t_159_ -= u_2[k-1][j][i+2];
double _t_162_ = 8.0 * -u_2[k+1][j][i-1];
_t_162_ += 8.0 * u_2[k+1][j][i+1];
_t_162_ += u_2[k+1][j][i-2];
_t_162_ -= u_2[k+1][j][i+2];
double _t_165_ = -u_2[k+2][j][i-1];
_t_165_ += u_2[k+2][j][i+1];
double _t_136_ = u_2[k-2][j][i+1];
_t_136_ -= u_2[k+2][j][i+1];
_t_136_ += 8.0 * -u_2[k-1][j][i+1];
_t_136_ += 8.0 * u_2[k+1][j][i+1];
double _t_131_ = -u_2[k-1][j][i-2];
_t_131_ += u_2[k+1][j][i-2];
double _t_139_ = -u_2[k-1][j][i+2];
_t_139_ += u_2[k+1][j][i+2];
double _t_128_ = -(8.0 * la[k][j][i-1] * _t_133_);
_t_128_ += 8.0 * la[k][j][i+1] * _t_136_;
_v_96_ += la[k][j][i-2] * 8.0 * _t_131_;
_t_128_ += _v_96_;
_v_97_ += la[k][j][i+2] * 8.0 * _t_139_;
_t_128_ -= _v_97_;
double _t_127_ = 1.0 / 144.0 * strx[i] * strz[k];
_t_113_ += _t_127_ * _t_128_;
_v_102_ += mu[k-2][j][i] * 8.0 * _t_157_;
double _t_154_ = _v_102_;
_t_154_ -= 8.0 * mu[k-1][j][i] * _t_159_;
_t_154_ += 8.0 * mu[k+1][j][i] * _t_162_;
_v_103_ += mu[k+2][j][i] * 8.0 * _t_165_;
_t_154_ -= _v_103_;
double _t_153_ = _t_127_;
_t_113_ += _t_153_ * _t_154_;
r1 += _t_113_;
double _t_193_ = 1.0 / 144.0 * stry[j] * strz[k];

double _t_173_ = u_0[k][j-2][i-1];
_t_173_ -= u_0[k][j+2][i-1];
_t_173_ += 8.0 * -u_0[k][j-1][i-1];
_t_173_ += 8.0 * u_0[k][j+1][i-1];
double _t_184_ = -u_0[k][j-2][i-1];
_t_184_ += u_0[k][j-2][i+1];
double _t_186_ = 8.0 * -u_0[k][j-1][i-1];
_t_186_ += 8.0 * u_0[k][j-1][i+1];
_t_186_ += u_0[k][j-1][i-2];
_t_186_ -= u_0[k][j-1][i+2];
double _t_189_ = 8.0 * -u_0[k][j+1][i-1];
_t_189_ += 8.0 * u_0[k][j+1][i+1];
_t_189_ += u_0[k][j+1][i-2];
_t_189_ -= u_0[k][j+1][i+2];
double _t_192_ = -u_0[k][j+2][i-1];
_t_192_ += u_0[k][j+2][i+1];
double _t_176_ = u_0[k][j-2][i+1];
_t_176_ -= u_0[k][j+2][i+1];
_t_176_ += 8.0 * -u_0[k][j-1][i+1];
_t_176_ += 8.0 * u_0[k][j+1][i+1];
double _t_171_ = -u_0[k][j-1][i-2];
_t_171_ += u_0[k][j+1][i-2];
double _t_179_ = -u_0[k][j-1][i+2];
_t_179_ += u_0[k][j+1][i+2];
double _t_168_ = -(8.0 * mu[k][j][i-1] * _t_173_);
_t_168_ += 8.0 * mu[k][j][i+1] * _t_176_;
double _v_105_ = mu[k][j][i-2] * u_0[k][j-2][i-2];
_v_105_ += mu[k][j][i-2] * 8.0 * _t_171_;
_v_105_ -= mu[k][j][i-2] * u_0[k][j+2][i-2];
double _v_108_ = la[k][j-2][i] * u_0[k][j-2][i-2];
_v_108_ -= la[k][j-2][i] * u_0[k][j-2][i+2];
_v_108_ += la[k][j-2][i] * 8.0 * _t_184_;
double _v_109_ = la[k][j+2][i] * u_0[k][j+2][i-2];
_v_109_ -= la[k][j+2][i] * u_0[k][j+2][i+2];
_v_109_ += la[k][j+2][i] * 8.0 * _t_192_;
double _v_111_ = la[k][j-2][i] * u_2[k-2][j-2][i];
_v_111_ -= la[k][j-2][i] * u_2[k+2][j-2][i];
double _v_112_ = la[k][j+2][i] * u_2[k-2][j+2][i];
_v_112_ -= la[k][j+2][i] * u_2[k+2][j+2][i];
double _v_114_ = mu[k-2][j][i] * u_2[k-2][j-2][i];
_v_114_ -= mu[k-2][j][i] * u_2[k-2][j+2][i];
double _v_115_ = mu[k+2][j][i] * u_2[k+2][j-2][i];
_v_115_ -= mu[k+2][j][i] * u_2[k+2][j+2][i];
double _v_106_ = mu[k][j][i+2] * u_0[k][j-2][i+2];
_v_106_ += mu[k][j][i+2] * 8.0 * _t_179_;
_v_106_ -= mu[k][j][i+2] * u_0[k][j+2][i+2];
_t_168_ += _v_105_;
_t_168_ -= _v_106_;
double _t_167_ = _t_140_;
double _t_166_ = _t_167_ * _t_168_;
double _t_181_ = _v_108_;
_t_181_ -= 8.0 * la[k][j-1][i] * _t_186_;
_t_181_ += 8.0 * la[k][j+1][i] * _t_189_;
_t_181_ -= _v_109_;
double _t_180_ = _t_167_;
_t_166_ += _t_180_ * _t_181_;
double _t_199_ = u_2[k-2][j-1][i];
_t_199_ -= u_2[k+2][j-1][i];
_t_199_ += 8.0 * -u_2[k-1][j-1][i];
_t_199_ += 8.0 * u_2[k+1][j-1][i];
double _t_210_ = -u_2[k-2][j-1][i];
_t_210_ += u_2[k-2][j+1][i];
double _t_212_ = 8.0 * -u_2[k-1][j-1][i];
_t_212_ += 8.0 * u_2[k-1][j+1][i];
_t_212_ += u_2[k-1][j-2][i];
_t_212_ -= u_2[k-1][j+2][i];
double _t_215_ = 8.0 * -u_2[k+1][j-1][i];
_t_215_ += 8.0 * u_2[k+1][j+1][i];
_t_215_ += u_2[k+1][j-2][i];
_t_215_ -= u_2[k+1][j+2][i];
double _t_218_ = -u_2[k+2][j-1][i];
_t_218_ += u_2[k+2][j+1][i];
double _t_202_ = u_2[k-2][j+1][i];
_t_202_ -= u_2[k+2][j+1][i];
_t_202_ += 8.0 * -u_2[k-1][j+1][i];
_t_202_ += 8.0 * u_2[k+1][j+1][i];
double _t_197_ = -u_2[k-1][j-2][i];
_t_197_ += u_2[k+1][j-2][i];
double _t_205_ = -u_2[k-1][j+2][i];
_t_205_ += u_2[k+1][j+2][i];
double _t_194_ = -(8.0 * la[k][j-1][i] * _t_199_);
_t_194_ += 8.0 * la[k][j+1][i] * _t_202_;
_v_111_ += la[k][j-2][i] * 8.0 * _t_197_;
_t_194_ += _v_111_;
_v_112_ += la[k][j+2][i] * 8.0 * _t_205_;
_t_194_ -= _v_112_;
_t_166_ += _t_193_ * _t_194_;
_v_114_ += mu[k-2][j][i] * 8.0 * _t_210_;
double _t_207_ = _v_114_;
_t_207_ -= 8.0 * mu[k-1][j][i] * _t_212_;
_t_207_ += 8.0 * mu[k+1][j][i] * _t_215_;
_v_115_ += mu[k+2][j][i] * 8.0 * _t_218_;
_t_207_ -= _v_115_;
double _t_206_ = _t_193_;
_t_166_ += _t_206_ * _t_207_;
r2 += _t_166_;

double uacc_0kc0jc0ic0 = cof * r1;
uacc_0kc0jc0ic0 += a1 * uacc_0[k][j][i];
double _v_120_ = cof * r2;
double _v_122_ = cof * r3;

double uacc_1kc0jc0ic0 = _v_120_;
uacc_1kc0jc0ic0 += a1 * uacc_1[k][j][i];

double uacc_2kc0jc0ic0 = _v_122_;
uacc_2kc0jc0ic0 += a1 * uacc_2[k][j][i];

uacc_0[k][j][i] = uacc_0kc0jc0ic0;
uacc_1[k][j][i] = uacc_1kc0jc0ic0;
uacc_2[k][j][i] = uacc_2kc0jc0ic0;
	} 
}

extern "C" void host_code (double *h_uacc_0, double *h_uacc_1, double *h_uacc_2, double *h_u_0, double *h_u_1, double *h_u_2, double *h_mu, double *h_la, double *h_strx, double *h_stry, double *h_strz, int N) {
	double *uacc_0;
	hipMalloc (&uacc_0, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for uacc_0\n");
	hipMemcpy (uacc_0, h_uacc_0, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *uacc_1;
	hipMalloc (&uacc_1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for uacc_1\n");
	hipMemcpy (uacc_1, h_uacc_1, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *uacc_2;
	hipMalloc (&uacc_2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for uacc_2\n");
	hipMemcpy (uacc_2, h_uacc_2, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *u_0;
	hipMalloc (&u_0, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u_0\n");
	hipMemcpy (u_0, h_u_0, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *u_1;
	hipMalloc (&u_1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u_1\n");
	hipMemcpy (u_1, h_u_1, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *u_2;
	hipMalloc (&u_2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u_2\n");
	hipMemcpy (u_2, h_u_2, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *mu;
	hipMalloc (&mu, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for mu\n");
	hipMemcpy (mu, h_mu, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *la;
	hipMalloc (&la, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for la\n");
	hipMemcpy (la, h_la, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *strx;
	hipMalloc (&strx, sizeof(double)*N);
	check_error ("Failed to allocate device memory for strx\n");
	hipMemcpy (strx, h_strx, sizeof(double)*N, hipMemcpyHostToDevice);
	double *stry;
	hipMalloc (&stry, sizeof(double)*N);
	check_error ("Failed to allocate device memory for stry\n");
	hipMemcpy (stry, h_stry, sizeof(double)*N, hipMemcpyHostToDevice);
	double *strz;
	hipMalloc (&strz, sizeof(double)*N);
	check_error ("Failed to allocate device memory for strz\n");
	hipMemcpy (strz, h_strz, sizeof(double)*N, hipMemcpyHostToDevice);

	dim3 blockconfig (16, 2, 2);
	dim3 gridconfig (ceil(N, blockconfig.x), ceil(N, blockconfig.y), ceil(N, blockconfig.z));

	sw4 <<<gridconfig, blockconfig>>> (uacc_0, uacc_1, uacc_2, u_0, u_1, u_2, mu, la, strx, stry, strz, N);

	hipMemcpy (h_uacc_0, uacc_0, sizeof(double)*N*N*N, hipMemcpyDeviceToHost);
	hipMemcpy (h_uacc_1, uacc_1, sizeof(double)*N*N*N, hipMemcpyDeviceToHost);
	hipMemcpy (h_uacc_2, uacc_2, sizeof(double)*N*N*N, hipMemcpyDeviceToHost);

	hipFree (uacc_0); 
	hipFree (uacc_1);
	hipFree (uacc_2);
	hipFree (u_0);
	hipFree (u_1);
	hipFree (u_2);
	hipFree (mu);
	hipFree (la);
	hipFree (strx);
	hipFree (stry);
	hipFree (strz);
}

	.text
	.file	"reordered-a.hip"
	.globl	_Z11check_errorPKc              # -- Begin function _Z11check_errorPKc
	.type	_Z11check_errorPKc,@function
_Z11check_errorPKc:                     # @_Z11check_errorPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB0_2:
	.cfi_def_cfa_offset 16
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$-1, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z11check_errorPKc, .Lfunc_end0-_Z11check_errorPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__sw4PdS_S_S_S_S_S_S_S_S_S_i # -- Begin function _Z18__device_stub__sw4PdS_S_S_S_S_S_S_S_S_S_i
	.type	_Z18__device_stub__sw4PdS_S_S_S_S_S_S_S_S_S_i,@function
_Z18__device_stub__sw4PdS_S_S_S_S_S_S_S_S_S_i: # @_Z18__device_stub__sw4PdS_S_S_S_S_S_S_S_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z18__device_stub__sw4PdS_S_S_S_S_S_S_S_S_S_i, .Lfunc_end1-_Z18__device_stub__sw4PdS_S_S_S_S_S_S_S_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	host_code                       # -- Begin function host_code
	.type	host_code,@function
host_code:                              # @host_code
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 112(%rsp)                  # 8-byte Spill
	movq	%r8, 104(%rsp)                  # 8-byte Spill
	movq	%rcx, 96(%rsp)                  # 8-byte Spill
	movq	%rdx, %rbx
	movq	%rsi, %r15
	movq	%rdi, %r13
	movslq	248(%rsp), %r14
	movq	%r14, 120(%rsp)                 # 8-byte Spill
	leaq	(,%r14,8), %rbp
	imulq	%r14, %r14
	imulq	%rbp, %r14
	leaq	24(%rsp), %r12
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.1, %edi
	callq	_Z11check_errorPKc
	movq	(%r12), %rdi
	movq	%r13, 128(%rsp)                 # 8-byte Spill
	movq	%r13, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %r12
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.2, %edi
	callq	_Z11check_errorPKc
	movq	(%r12), %rdi
	movq	%r15, 136(%rsp)                 # 8-byte Spill
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.3, %edi
	callq	_Z11check_errorPKc
	movq	(%r12), %rdi
	movq	%rbx, 144(%rsp)                 # 8-byte Spill
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	88(%rsp), %r12
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.4, %edi
	callq	_Z11check_errorPKc
	movq	(%r12), %rdi
	movq	96(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	80(%rsp), %r15
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.5, %edi
	callq	_Z11check_errorPKc
	movq	(%r15), %rdi
	movq	104(%rsp), %rsi                 # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	72(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.6, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	112(%rsp), %rsi                 # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	64(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.7, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	208(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	56(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.8, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	216(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movl	$.L.str.9, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	224(%rsp), %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	40(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movl	$.L.str.10, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	232(%rsp), %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movl	$.L.str.11, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	120(%rsp), %rbx                 # 8-byte Reload
	movq	240(%rsp), %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%ebx, %eax
	andl	$15, %eax
	movl	%ebx, %ecx
	shrl	$4, %ecx
	cmpl	$1, %eax
	sbbl	$-1, %ecx
	movl	%ebx, %eax
	andl	$1, %eax
	movl	%ebx, %esi
	shrl	%esi
	addl	%eax, %esi
	movq	%rsi, %rdi
	shlq	$32, %rdi
	orq	%rcx, %rdi
	movabsq	$8589934608, %rdx               # imm = 0x200000010
                                        # kill: def $esi killed $esi killed $rsi
	movl	$2, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	88(%rsp), %rcx
	movq	80(%rsp), %r8
	movq	72(%rsp), %r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	88(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z18__device_stub__sw4PdS_S_S_S_S_S_S_S_S_S_i
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB2_2:
	movq	24(%rsp), %rsi
	movq	128(%rsp), %rdi                 # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	movq	136(%rsp), %rdi                 # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movq	144(%rsp), %rdi                 # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	88(%rsp), %rdi
	callq	hipFree
	movq	80(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	host_code, .Lfunc_end2-host_code
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error : %s, %s\n"
	.size	.L.str, 21

	.type	_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i,@object # @_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i
	.p2align	3, 0x0
_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i:
	.quad	_Z18__device_stub__sw4PdS_S_S_S_S_S_S_S_S_S_i
	.size	_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Failed to allocate device memory for uacc_0\n"
	.size	.L.str.1, 45

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to allocate device memory for uacc_1\n"
	.size	.L.str.2, 45

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate device memory for uacc_2\n"
	.size	.L.str.3, 45

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to allocate device memory for u_0\n"
	.size	.L.str.4, 42

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to allocate device memory for u_1\n"
	.size	.L.str.5, 42

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to allocate device memory for u_2\n"
	.size	.L.str.6, 42

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to allocate device memory for mu\n"
	.size	.L.str.7, 41

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Failed to allocate device memory for la\n"
	.size	.L.str.8, 41

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to allocate device memory for strx\n"
	.size	.L.str.9, 43

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Failed to allocate device memory for stry\n"
	.size	.L.str.10, 43

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Failed to allocate device memory for strz\n"
	.size	.L.str.11, 43

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i"
	.size	.L__unnamed_1, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__sw4PdS_S_S_S_S_S_S_S_S_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3sw4PdS_S_S_S_S_S_S_S_S_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i ; -- Begin function _Z3sw4PdS_S_S_S_S_S_S_S_S_S_i
	.globl	_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i
	.p2align	8
	.type	_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i,@function
_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i:          ; @_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x6c
	s_load_b32 s4, s[0:1], 0x58
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	v_bfe_u32 v3, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_and_b32 s5, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	s_mul_i32 s13, s13, s5
	s_mul_i32 s14, s14, s2
	s_mul_i32 s15, s15, s3
	s_max_i32 s2, s13, 0
	s_max_i32 s3, s14, 0
	s_max_i32 s5, s15, 0
	v_add_nc_u32_e32 v0, s2, v1
	v_add_nc_u32_e32 v46, s3, v2
	v_add_nc_u32_e32 v47, s5, v3
	s_add_i32 s4, s4, -3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min3_u32 v1, v0, v46, v47
	v_max3_i32 v2, v0, v46, v47
	v_cmp_lt_u32_e32 vcc_lo, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e64 s2, s4, v2
	s_and_b32 s2, s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b256 s[8:15], s[0:1], 0x30
	v_mad_u64_u32 v[118:119], null, 0xb4800, v47, 0
	v_mov_b32_e32 v48, 0
	v_mad_u64_u32 v[82:83], null, 0x980, v46, 0
	s_load_b128 s[4:7], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v1, v48
	v_lshlrev_b64 v[190:191], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s8, v118
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v119, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v2, v82
	v_add_co_ci_u32_e32 v1, vcc_lo, v3, v83, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v38, vcc_lo, v0, v190
	v_add_co_ci_u32_e32 v39, vcc_lo, v1, v191, vcc_lo
	v_add_co_u32 v100, vcc_lo, s12, v190
	v_add_co_ci_u32_e32 v101, vcc_lo, s13, v191, vcc_lo
	global_load_b128 v[0:3], v[38:39], off
	global_load_b128 v[32:35], v[100:101], off
	global_load_b128 v[96:99], v[38:39], off offset:-16
	global_load_b128 v[28:31], v[100:101], off offset:-16
	s_waitcnt vmcnt(3)
	v_mul_f64 v[49:50], 0x3fe80000, v[0:1]
	v_mul_f64 v[36:37], 0x40080000, v[0:1]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[8:9], 0x3fe80000, v[96:97]
	v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v6, v2
	s_waitcnt vmcnt(0)
	v_mul_f64 v[74:75], v[98:99], v[30:31]
	v_mul_f64 v[106:107], v[49:50], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[98:99], v[30:31], -v[106:107]
	v_fma_f64 v[106:107], v[6:7], v[34:35], -v[106:107]
	v_fma_f64 v[59:60], -v[8:9], v[28:29], v[10:11]
	v_mul_f64 v[8:9], v[2:3], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[96:97], v[28:29], v[8:9]
	v_fma_f64 v[0:1], v[36:37], v[32:33], v[8:9]
	v_mul_f64 v[8:9], 0x40080000, v[98:99]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[61:62], v[8:9], v[30:31], v[0:1]
	v_add_co_u32 v0, vcc_lo, s4, v118
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v119, vcc_lo
	v_add_co_u32 v0, s2, v0, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v1, vcc_lo, v1, v83, s2
	v_add_co_u32 v94, vcc_lo, v0, v190
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v95, vcc_lo, v1, v191, vcc_lo
	s_clause 0x1
	global_load_b128 v[20:23], v[94:95], off
	global_load_b128 v[8:11], v[94:95], off offset:-16
	s_waitcnt vmcnt(1)
	v_mul_f64 v[0:1], v[59:60], v[20:21]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[59:60], v[8:9], -v[0:1]
	v_mul_f64 v[0:1], v[61:62], v[20:21]
	v_fma_f64 v[53:54], v[61:62], v[10:11], -v[0:1]
	v_add_co_u32 v0, vcc_lo, s6, v118
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v119, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, s2, v0, v82
	v_add_co_ci_u32_e64 v1, vcc_lo, v1, v83, s2
	s_load_b64 s[2:3], s[0:1], 0x50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v88, vcc_lo, v0, v190
	v_add_co_ci_u32_e32 v89, vcc_lo, v1, v191, vcc_lo
	s_clause 0x1
	global_load_b128 v[24:27], v[88:89], off
	global_load_b128 v[8:11], v[88:89], off offset:-16
	v_mul_f64 v[53:54], v[32:33], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[32:33], v[51:52], v[53:54]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[0:1], v[59:60], v[24:25]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[55:56], v[59:60], v[8:9], -v[0:1]
	v_mul_f64 v[0:1], v[61:62], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[61:62], v[10:11], -v[0:1]
	v_lshlrev_b64 v[0:1], 3, v[47:48]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, 0xfff4c000, v38
	v_add_co_ci_u32_e32 v1, vcc_lo, -1, v39, vcc_lo
	v_add_co_u32 v10, vcc_lo, 0xb4000, v38
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v39, vcc_lo
	global_load_b64 v[2:3], v[0:1], off offset:-2048
	v_add_co_u32 v12, vcc_lo, 0x169000, v38
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v39, vcc_lo
	v_mul_f64 v[53:54], v[32:33], v[57:58]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[53:54], v[32:33], v[55:56], v[53:54]
	s_waitcnt vmcnt(0)
	scratch_store_b64 off, v[2:3], off offset:4 ; 8-byte Folded Spill
	s_clause 0x1
	global_load_b64 v[0:1], v[10:11], off offset:2048
	global_load_b64 v[4:5], v[12:13], off
	s_clause 0x2
	global_load_b64 v[112:113], v[8:9], off offset:16
	global_load_b128 v[12:15], v[8:9], off offset:-16
	global_load_b128 v[16:19], v[8:9], off
	s_waitcnt vmcnt(4)
	v_mul_f64 v[8:9], 0x40080000, v[0:1]
	s_waitcnt vmcnt(3)
	v_dual_mov_b32 v139, v5 :: v_dual_mov_b32 v138, v4
	s_waitcnt vmcnt(1)
	v_mul_f64 v[10:11], v[2:3], v[14:15]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[40:41], v[49:50], v[16:17]
	v_mov_b32_e32 v47, v48
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[4:5], v[112:113], v[10:11]
	v_fma_f64 v[42:43], v[2:3], v[14:15], -v[40:41]
	v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
	scratch_store_b64 off, v[4:5], off offset:52 ; 8-byte Folded Spill
	v_fma_f64 v[8:9], v[8:9], v[18:19], v[10:11]
	v_add_co_u32 v10, vcc_lo, 0xffe97000, v38
	v_add_co_ci_u32_e32 v11, vcc_lo, -1, v39, vcc_lo
	global_load_b64 v[80:81], v[10:11], off
	v_fma_f64 v[114:115], v[36:37], v[16:17], v[8:9]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[10:11], 0x3fe80000, v[80:81]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[64:65], -v[10:11], v[12:13], v[42:43]
	v_mul_f64 v[10:11], v[0:1], v[18:19]
	v_mul_f64 v[42:43], 0x40080000, v[2:3]
	v_add_co_u32 v0, vcc_lo, s10, v118
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v119, vcc_lo
	s_load_b256 s[4:11], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, s2, v0, v82
	v_add_co_ci_u32_e64 v1, vcc_lo, v1, v83, s2
	v_mul_f64 v[2:3], v[114:115], v[20:21]
	v_mul_f64 v[184:185], v[64:65], v[20:21]
	v_fma_f64 v[10:11], v[80:81], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[36:37], v[16:17], v[10:11]
	v_fma_f64 v[68:69], v[42:43], v[14:15], v[10:11]
	v_add_co_u32 v42, vcc_lo, v0, v190
	v_add_co_ci_u32_e32 v43, vcc_lo, v1, v191, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, 0xb4000, v42
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v43, vcc_lo
	s_clause 0x1
	global_load_b128 v[84:87], v[42:43], off
	global_load_b64 v[10:11], v[10:11], off offset:2048
	v_mul_f64 v[188:189], v[68:69], v[20:21]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[116:117], 0x40080000, v[84:85]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[66:67], 0x40080000, v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[44:45], v[16:17], v[116:117]
	v_fma_f64 v[44:45], v[114:115], 2.0, v[44:45]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[70:71], v[18:19], v[66:67], v[44:45]
	v_add_co_u32 v44, vcc_lo, 0xfff4c000, v42
	v_add_co_ci_u32_e32 v45, vcc_lo, -1, v43, vcc_lo
	v_add_co_u32 v66, vcc_lo, 0xffe97000, v42
	v_add_co_ci_u32_e32 v67, vcc_lo, -1, v43, vcc_lo
	s_clause 0x1
	global_load_b64 v[0:1], v[44:45], off offset:-2048
	global_load_b64 v[102:103], v[66:67], off
	v_mul_f64 v[44:45], 0x3fe80000, v[84:85]
	global_load_b128 v[76:79], v[42:43], off offset:-16
	v_mul_f64 v[66:67], v[16:17], v[44:45]
	v_mul_f64 v[108:109], v[32:33], v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[64:65], 2.0, -v[66:67]
	s_waitcnt vmcnt(2)
	v_fma_f64 v[8:9], v[14:15], v[0:1], v[8:9]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[72:73], 0x3fe80000, v[102:103]
	v_fma_f64 v[122:123], v[14:15], v[0:1], v[70:71]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[70:71], v[30:31], v[78:79]
	scratch_store_b64 off, v[0:1], off offset:36 ; 8-byte Folded Spill
	v_fma_f64 v[120:121], -v[12:13], v[72:73], v[8:9]
	v_mul_f64 v[8:9], 0x40080000, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s10, v118
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v119, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, s0, v0, v82
	v_add_co_ci_u32_e64 v1, vcc_lo, v1, v83, s0
	s_mov_b32 s0, 0x1c71c71c
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v104, vcc_lo, v0, v190
	v_add_co_ci_u32_e32 v105, vcc_lo, v1, v191, vcc_lo
	s_mov_b32 s1, 0x3f7c71c7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_f64 v[152:153], v[32:33], s[0:1]
	v_mul_f64 v[8:9], v[14:15], v[8:9]
	v_dual_mov_b32 v14, v138 :: v_dual_mov_b32 v15, v139
	v_fma_f64 v[8:9], v[68:69], 2.0, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[16:17], v[116:117], v[8:9]
	v_fma_f64 v[12:13], v[12:13], v[102:103], v[8:9]
	v_mul_f64 v[8:9], v[34:35], v[86:87]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[28:29], v[76:77], v[8:9]
	v_fma_f64 v[61:62], v[61:62], 2.0, v[8:9]
	v_fma_f64 v[8:9], v[59:60], 2.0, v[70:71]
	v_mul_f64 v[59:60], 0x3fe80000, v[76:77]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[32:33], v[44:45], v[8:9]
	v_fma_f64 v[8:9], -v[28:29], v[59:60], v[8:9]
	v_fma_f64 v[28:29], v[32:33], v[116:117], v[61:62]
	v_mul_f64 v[59:60], 0x40080000, v[78:79]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[59:60], v[30:31], v[59:60], v[28:29]
	s_clause 0x1
	global_load_b128 v[28:31], v[104:105], off
	global_load_b128 v[90:93], v[104:105], off offset:-16
	s_waitcnt vmcnt(1)
	v_add_f64 v[30:31], v[30:31], -v[28:29]
	s_waitcnt vmcnt(0)
	v_add_f64 v[72:73], v[92:93], -v[28:29]
	global_load_b64 v[92:93], v[100:101], off offset:16
	global_load_b64 v[100:101], v[42:43], off offset:16
	global_load_b64 v[124:125], v[38:39], off offset:16
	v_add_f64 v[61:62], v[90:91], -v[28:29]
	v_mul_f64 v[170:171], v[64:65], v[28:29]
	v_mul_f64 v[174:175], v[68:69], v[28:29]
	v_mul_f64 v[176:177], v[28:29], v[114:115]
	v_mul_f64 v[59:60], v[72:73], v[59:60]
	v_mul_f64 v[8:9], v[61:62], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[55:56], v[32:33], v[59:60]
	v_fma_f64 v[8:9], v[32:33], v[8:9], v[55:56]
	global_load_b64 v[55:56], v[104:105], off offset:16
	s_waitcnt vmcnt(2)
	v_mul_f64 v[90:91], 0x3fe80000, v[100:101]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[74:75], v[124:125], v[92:93], v[74:75]
	v_fma_f64 v[70:71], v[92:93], v[100:101], v[70:71]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[90:91], -v[92:93], v[90:91], -v[108:109]
	v_mul_f64 v[108:109], 0x3fe80000, v[124:125]
	v_fma_f64 v[106:107], -v[108:109], v[92:93], v[106:107]
	v_mul_f64 v[92:93], 0x40080000, v[6:7]
	s_waitcnt vmcnt(0)
	v_add_f64 v[55:56], v[55:56], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[108:109], v[106:107], v[20:21]
	v_fma_f64 v[74:75], v[92:93], v[34:35], v[74:75]
	global_load_b64 v[92:93], v[94:95], off offset:16
	v_mul_f64 v[110:111], v[106:107], v[24:25]
	v_fma_f64 v[90:91], v[106:107], 2.0, v[90:91]
	v_fma_f64 v[74:75], v[36:37], v[32:33], v[74:75]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[70:71], v[74:75], 2.0, v[70:71]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[92:93], v[106:107], v[92:93], -v[108:109]
	global_load_b64 v[108:109], v[88:89], off offset:16
	s_waitcnt vmcnt(0)
	v_fma_f64 v[108:109], v[106:107], v[108:109], -v[110:111]
	v_mul_f64 v[106:107], 0x40080000, v[86:87]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[70:71], v[34:35], v[106:107], v[70:71]
	v_mul_f64 v[106:107], v[74:75], v[20:21]
	v_fma_f64 v[34:35], v[34:35], v[86:87], v[90:91]
	v_fma_f64 v[61:62], v[32:33], v[116:117], v[70:71]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[22:23], v[74:75], v[22:23], -v[106:107]
	v_mul_f64 v[106:107], v[74:75], v[24:25]
	v_mul_f64 v[34:35], v[55:56], v[34:35]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[30:31], v[30:31], v[61:62]
	v_fma_f64 v[51:52], v[32:33], v[22:23], v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[26:27], v[74:75], v[26:27], -v[106:107]
	v_lshlrev_b64 v[22:23], 3, v[46:47]
	v_add_co_u32 v22, vcc_lo, s14, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, s15, v23, vcc_lo
	v_fma_f64 v[8:9], v[32:33], v[30:31], v[8:9]
	v_fma_f64 v[0:1], v[32:33], v[92:93], v[51:52]
	v_fma_f64 v[26:27], v[32:33], v[26:27], v[53:54]
	scratch_store_b64 off, v[0:1], off offset:20 ; 8-byte Folded Spill
	v_fma_f64 v[0:1], v[32:33], v[108:109], v[26:27]
	scratch_store_b128 off, v[4:7], off offset:108 ; 16-byte Folded Spill
	v_add_co_u32 v26, vcc_lo, 0xfffff000, v38
	v_add_co_ci_u32_e32 v27, vcc_lo, -1, v39, vcc_lo
	scratch_store_b64 off, v[0:1], off offset:12 ; 8-byte Folded Spill
	v_fma_f64 v[0:1], v[32:33], v[34:35], v[8:9]
	scratch_store_b64 off, v[0:1], off offset:28 ; 8-byte Folded Spill
	global_load_b64 v[126:127], v[26:27], off offset:-768
	global_load_b128 v[72:75], v[22:23], off
	s_clause 0x1
	global_load_b64 v[128:129], v[38:39], off offset:-2432
	global_load_b64 v[132:133], v[38:39], off offset:2432
	global_load_b128 v[30:33], v[22:23], off offset:-16
	s_waitcnt vmcnt(4)
	v_mul_f64 v[34:35], 0x3fe80000, v[126:127]
	s_waitcnt vmcnt(3)
	v_mul_f64 v[26:27], v[49:50], v[72:73]
	s_waitcnt vmcnt(2)
	v_mul_f64 v[48:49], 0x40080000, v[128:129]
	v_mul_f64 v[84:85], v[152:153], v[72:73]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[46:47], v[128:129], v[32:33], -v[26:27]
	v_fma_f64 v[26:27], v[132:133], v[74:75], -v[26:27]
	v_fma_f64 v[34:35], -v[34:35], v[30:31], v[46:47]
	v_add_co_u32 v46, vcc_lo, 0x1000, v38
	v_add_co_ci_u32_e32 v47, vcc_lo, 0, v39, vcc_lo
	v_mul_f64 v[38:39], v[132:133], v[74:75]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[34:35], v[28:29]
	v_fma_f64 v[38:39], v[126:127], v[30:31], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], v[36:37], v[72:73], v[38:39]
	v_fma_f64 v[58:59], v[48:49], v[32:33], v[38:39]
	v_add_co_u32 v38, vcc_lo, 0xfffff000, v42
	v_add_co_ci_u32_e32 v39, vcc_lo, -1, v43, vcc_lo
	s_clause 0x2
	global_load_b64 v[108:109], v[38:39], off offset:-768
	global_load_b64 v[130:131], v[42:43], off offset:-2432
	global_load_b64 v[134:135], v[42:43], off offset:2432
	global_load_b64 v[22:23], v[22:23], off offset:16
	global_load_b64 v[136:137], v[46:47], off offset:768
	v_mul_f64 v[164:165], v[58:59], v[28:29]
	s_waitcnt vmcnt(4)
	v_mul_f64 v[50:51], 0x3fe80000, v[108:109]
	s_waitcnt vmcnt(3)
	v_mul_f64 v[38:39], v[32:33], v[130:131]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], v[34:35], 2.0, v[38:39]
	v_fma_f64 v[48:49], -v[72:73], v[44:45], v[48:49]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[90:91], -v[30:31], v[50:51], v[48:49]
	v_add_co_u32 v48, vcc_lo, 0x1000, v42
	v_add_co_ci_u32_e32 v49, vcc_lo, 0, v43, vcc_lo
	v_add_co_u32 v70, vcc_lo, 0x169000, v42
	v_add_co_ci_u32_e32 v71, vcc_lo, 0, v43, vcc_lo
	global_load_b64 v[106:107], v[48:49], off offset:768
	s_waitcnt vmcnt(3)
	v_mul_f64 v[42:43], v[74:75], v[134:135]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[30:31], v[108:109], v[42:43]
	v_mul_f64 v[42:43], 0x40080000, v[130:131]
	v_fma_f64 v[30:31], v[58:59], 2.0, v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[30:31], v[72:73], v[116:117], v[30:31]
	v_fma_f64 v[92:93], v[32:33], v[42:43], v[30:31]
	v_mul_f64 v[30:31], v[128:129], v[32:33]
	v_mul_f64 v[32:33], 0x40080000, v[132:133]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[30:31], v[136:137], v[22:23], v[30:31]
	v_fma_f64 v[30:31], v[32:33], v[74:75], v[30:31]
	v_mul_f64 v[32:33], v[72:73], v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[142:143], v[36:37], v[72:73], v[30:31]
	v_mul_f64 v[30:31], 0x3fe80000, v[14:15]
	v_mul_f64 v[148:149], v[142:143], v[24:25]
	v_mul_f64 v[166:167], v[142:143], v[28:29]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[42:43], 0x3fe80000, v[106:107]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[144:145], -v[22:23], v[42:43], -v[32:33]
	v_mul_f64 v[32:33], 0x3fe80000, v[136:137]
	v_fma_f64 v[146:147], -v[32:33], v[22:23], v[26:27]
	v_fma_f64 v[26:27], v[22:23], v[106:107], v[38:39]
	v_fma_f64 v[22:23], v[4:5], v[18:19], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[150:151], v[146:147], v[24:25]
	v_mul_f64 v[168:169], v[146:147], v[28:29]
	v_fma_f64 v[154:155], -v[30:31], v[112:113], v[22:23]
	v_add_co_u32 v22, vcc_lo, 0xffe97000, v88
	v_add_co_ci_u32_e32 v23, vcc_lo, -1, v89, vcc_lo
	v_add_co_u32 v30, vcc_lo, 0xfff4c000, v88
	v_add_co_ci_u32_e32 v31, vcc_lo, -1, v89, vcc_lo
	v_add_co_u32 v32, vcc_lo, 0xb4000, v88
	v_add_co_ci_u32_e32 v33, vcc_lo, 0, v89, vcc_lo
	v_add_co_u32 v110, vcc_lo, 0x169000, v88
	v_add_co_ci_u32_e32 v111, vcc_lo, 0, v89, vcc_lo
	s_clause 0x2
	global_load_b128 v[46:49], v[22:23], off
	global_load_b128 v[36:39], v[30:31], off offset:-2048
	global_load_b128 v[30:33], v[32:33], off offset:2048
	v_add_co_u32 v138, vcc_lo, 0xffffecf0, v94
	global_load_b128 v[50:53], v[110:111], off
	v_add_co_ci_u32_e32 v139, vcc_lo, -1, v95, vcc_lo
	v_add_co_u32 v140, vcc_lo, 0x12f0, v94
	v_add_co_ci_u32_e32 v141, vcc_lo, 0, v95, vcc_lo
	global_load_b128 v[40:43], v[94:95], off offset:-2432
	v_fma_f64 v[0:1], v[142:143], 2.0, v[26:27]
	v_mul_f64 v[172:173], v[154:155], v[28:29]
	v_mul_f64 v[186:187], v[154:155], v[20:21]
	s_waitcnt vmcnt(4)
	v_add_f64 v[156:157], v[46:47], -v[24:25]
	global_load_b128 v[44:47], v[94:95], off offset:2432
	s_waitcnt vmcnt(4)
	v_add_f64 v[158:159], v[36:37], -v[24:25]
	s_waitcnt vmcnt(3)
	v_add_f64 v[160:161], v[30:31], -v[24:25]
	v_mul_f64 v[36:37], v[34:35], v[24:25]
	s_waitcnt vmcnt(2)
	v_add_f64 v[162:163], v[50:51], -v[24:25]
	v_mul_f64 v[50:51], v[58:59], v[24:25]
	s_clause 0x1
	global_load_b128 v[28:31], v[138:139], off offset:16
	global_load_b128 v[22:25], v[140:141], off offset:16
	s_waitcnt vmcnt(3)
	v_add_f64 v[178:179], v[40:41], -v[20:21]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[92:93], v[178:179], v[92:93]
	s_waitcnt vmcnt(2)
	v_add_f64 v[44:45], v[44:45], -v[20:21]
	s_waitcnt vmcnt(1)
	v_add_f64 v[180:181], v[28:29], -v[20:21]
	s_waitcnt vmcnt(0)
	v_add_f64 v[182:183], v[22:23], -v[20:21]
	v_add_co_u32 v20, vcc_lo, 0xfffff000, v88
	v_add_co_ci_u32_e32 v21, vcc_lo, -1, v89, vcc_lo
	v_add_co_u32 v40, vcc_lo, 0xffffecf0, v104
	v_add_co_ci_u32_e32 v41, vcc_lo, -1, v105, vcc_lo
	global_load_b64 v[20:21], v[20:21], off offset:-768
	v_add_co_u32 v26, vcc_lo, 0x1000, v88
	v_add_co_ci_u32_e32 v27, vcc_lo, 0, v89, vcc_lo
	global_load_b128 v[54:57], v[40:41], off offset:16
	global_load_b64 v[26:27], v[26:27], off offset:768
	v_mul_f64 v[90:91], v[180:181], v[90:91]
	s_waitcnt vmcnt(2)
	v_fma_f64 v[4:5], v[34:35], v[20:21], -v[36:37]
	global_load_b64 v[20:21], v[88:89], off offset:-2432
	s_waitcnt vmcnt(2)
	v_fma_f64 v[54:55], v[34:35], v[54:55], -v[60:61]
	global_load_b128 v[60:63], v[104:105], off offset:-2432
	s_waitcnt vmcnt(2)
	v_fma_f64 v[8:9], v[146:147], v[26:27], -v[150:151]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[50:51], v[58:59], v[20:21], -v[50:51]
	global_load_b64 v[20:21], v[88:89], off offset:2432
	v_mul_f64 v[50:51], v[72:73], v[50:51]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[4:5], v[72:73], v[4:5], v[50:51]
	v_mul_f64 v[50:51], v[156:157], v[120:121]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[6:7], v[142:143], v[20:21], -v[148:149]
	global_load_b128 v[20:23], v[104:105], off offset:2432
	v_fma_f64 v[164:165], v[58:59], v[60:61], -v[164:165]
	v_fma_f64 v[4:5], v[72:73], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[4:5], v[72:73], v[8:9], v[4:5]
	scratch_store_b64 off, v[4:5], off offset:68 ; 8-byte Folded Spill
	s_waitcnt vmcnt(0)
	v_fma_f64 v[20:21], v[142:143], v[20:21], -v[166:167]
	v_add_co_u32 v142, vcc_lo, 0x12f0, v104
	v_add_co_ci_u32_e32 v143, vcc_lo, 0, v105, vcc_lo
	v_fma_f64 v[166:167], v[146:147], 2.0, v[144:145]
	global_load_b128 v[26:29], v[142:143], off offset:16
	s_waitcnt vmcnt(0)
	v_fma_f64 v[168:169], v[146:147], v[26:27], -v[168:169]
	v_add_co_u32 v26, vcc_lo, 0xffe97000, v94
	v_add_co_ci_u32_e32 v27, vcc_lo, -1, v95, vcc_lo
	v_add_co_u32 v148, vcc_lo, 0xffe96ff0, v104
	v_add_co_ci_u32_e32 v149, vcc_lo, -1, v105, vcc_lo
	v_add_co_u32 v144, vcc_lo, 0x169000, v94
	v_add_co_ci_u32_e32 v145, vcc_lo, 0, v95, vcc_lo
	global_load_b128 v[58:61], v[148:149], off offset:16
	global_load_b64 v[26:27], v[26:27], off
	v_add_co_u32 v150, vcc_lo, 0x168ff0, v104
	global_load_b64 v[34:35], v[144:145], off
	v_add_co_ci_u32_e32 v151, vcc_lo, 0, v105, vcc_lo
	global_load_b64 v[146:147], v[70:71], off
	s_waitcnt vmcnt(3)
	v_fma_f64 v[58:59], v[64:65], v[58:59], -v[170:171]
	s_waitcnt vmcnt(2)
	v_fma_f64 v[26:27], v[64:65], v[26:27], -v[184:185]
	v_fma_f64 v[64:65], v[154:155], 2.0, -v[66:67]
	v_mul_f64 v[66:67], 0x40080000, v[134:135]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[170:171], v[154:155], v[34:35], -v[186:187]
	global_load_b128 v[34:37], v[150:151], off offset:16
	s_waitcnt vmcnt(0)
	v_fma_f64 v[34:35], v[154:155], v[34:35], -v[172:173]
	v_fma_f64 v[172:173], v[74:75], v[66:67], v[0:1]
	v_mul_f64 v[0:1], 0x3fe80000, v[146:147]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[184:185], -v[112:113], v[0:1], v[64:65]
	v_add_co_u32 v0, vcc_lo, 0xfff4c000, v94
	v_add_co_ci_u32_e32 v1, vcc_lo, -1, v95, vcc_lo
	global_load_b64 v[0:1], v[0:1], off offset:-2048
	s_waitcnt vmcnt(0)
	v_fma_f64 v[186:187], v[68:69], v[0:1], -v[188:189]
	v_add_co_u32 v0, vcc_lo, 0xfff4b7f0, v104
	v_add_co_ci_u32_e32 v1, vcc_lo, -1, v105, vcc_lo
	global_load_b128 v[64:67], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_fma_f64 v[64:65], v[68:69], v[64:65], -v[174:175]
	v_add_co_u32 v68, vcc_lo, 0xb4000, v94
	v_add_co_ci_u32_e32 v69, vcc_lo, 0, v95, vcc_lo
	v_add_co_u32 v154, vcc_lo, 0xb47f0, v104
	v_add_co_ci_u32_e32 v155, vcc_lo, 0, v105, vcc_lo
	global_load_b64 v[68:69], v[68:69], off offset:2048
	v_mul_f64 v[64:65], v[16:17], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[16:17], v[58:59], v[64:65]
	v_mul_f64 v[64:65], v[16:17], v[186:187]
	v_fma_f64 v[26:27], v[16:17], v[26:27], v[64:65]
	v_fma_f64 v[64:65], v[112:113], v[146:147], v[122:123]
	v_fma_f64 v[112:113], v[18:19], v[10:11], v[12:13]
	v_fma_f64 v[18:19], v[18:19], v[10:11], v[184:185]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[112:113], v[158:159], v[112:113]
	v_mul_f64 v[18:19], v[162:163], v[18:19]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[2:3], v[114:115], v[68:69], -v[2:3]
	global_load_b128 v[68:71], v[154:155], off offset:16
	v_fma_f64 v[2:3], v[16:17], v[2:3], v[26:27]
	v_mul_f64 v[26:27], v[160:161], v[64:65]
	v_mul_f64 v[64:65], v[16:17], v[112:113]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[16:17], v[170:171], v[2:3]
	v_fma_f64 v[50:51], v[16:17], v[50:51], v[64:65]
	v_mul_f64 v[64:65], v[72:73], v[92:93]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[16:17], v[26:27], v[50:51]
	v_fma_f64 v[64:65], v[72:73], v[90:91], v[64:65]
	v_fma_f64 v[50:51], v[74:75], v[134:135], v[166:167]
	v_add_f64 v[90:91], v[48:49], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[50:51], v[182:183], v[50:51]
	v_fma_f64 v[180:181], 0xc0200000, v[38:39], v[90:91]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[180:181], 0x40200000, v[32:33], v[180:181]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[68:69], v[114:115], v[68:69], -v[176:177]
	v_fma_f64 v[114:115], v[72:73], v[116:117], v[172:173]
	v_mul_f64 v[116:117], v[72:73], v[164:165]
	v_fma_f64 v[58:59], v[16:17], v[68:69], v[58:59]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[44:45], v[44:45], v[114:115]
	v_fma_f64 v[54:55], v[72:73], v[54:55], v[116:117]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[6:7], v[16:17], v[34:35], v[58:59]
	scratch_store_b64 off, v[10:11], off offset:124 ; 8-byte Folded Spill
	v_fma_f64 v[68:69], v[72:73], v[20:21], v[54:55]
	scratch_store_b64 off, v[6:7], off offset:76 ; 8-byte Folded Spill
	v_fma_f64 v[6:7], v[16:17], v[18:19], v[26:27]
	v_dual_mov_b32 v26, v80 :: v_dual_mov_b32 v27, v81
	v_dual_mov_b32 v35, v15 :: v_dual_mov_b32 v34, v14
	scratch_store_b64 off, v[6:7], off offset:44 ; 8-byte Folded Spill
	v_mul_f64 v[6:7], v[72:73], s[0:1]
	s_mov_b32 s0, 0x55555555
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[6:7], v[6:7], v[16:17]
	scratch_store_b64 off, v[2:3], off offset:84 ; 8-byte Folded Spill
	v_fma_f64 v[2:3], v[72:73], v[44:45], v[64:65]
	v_mul_f64 v[44:45], v[152:153], v[16:17]
	scratch_store_b64 off, v[6:7], off offset:60 ; 8-byte Folded Spill
	v_fma_f64 v[6:7], v[72:73], v[168:169], v[68:69]
	v_fma_f64 v[2:3], v[72:73], v[50:51], v[2:3]
	s_clause 0x1
	scratch_store_b64 off, v[6:7], off offset:92
	scratch_store_b64 off, v[2:3], off offset:100
	s_clause 0x3
	global_load_b64 v[158:159], v[94:95], off offset:-2416
	global_load_b128 v[16:19], v[94:95], off offset:-2448
	global_load_b128 v[72:75], v[94:95], off offset:2416
	global_load_b64 v[162:163], v[94:95], off offset:2448
	v_add_co_u32 v6, vcc_lo, 0xb4000, v104
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v105, vcc_lo
	v_add_co_u32 v8, vcc_lo, 0xfff4c000, v104
	v_add_co_ci_u32_e32 v9, vcc_lo, -1, v105, vcc_lo
	v_add_co_u32 v116, vcc_lo, 0xffe97000, v88
	v_add_co_ci_u32_e32 v117, vcc_lo, -1, v89, vcc_lo
	s_waitcnt vmcnt(2)
	v_add_f64 v[2:3], v[16:17], -v[158:159]
	v_ldexp_f64 v[4:5], -v[18:19], 3
	s_waitcnt vmcnt(1)
	v_add_f64 v[160:161], v[72:73], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[152:153], 0xc0200000, v[18:19], v[2:3]
	v_fma_f64 v[188:189], 0x40200000, v[74:75], v[4:5]
	s_waitcnt vmcnt(0)
	v_add_f64 v[4:5], v[72:73], -v[162:163]
	s_clause 0x2
	global_load_b64 v[120:121], v[154:155], off offset:32
	global_load_b128 v[16:19], v[6:7], off offset:2032
	global_load_b64 v[0:1], v[0:1], off offset:32
	s_clause 0x1
	global_load_b128 v[112:115], v[116:117], off offset:-16
	global_load_b64 v[164:165], v[116:117], off offset:16
	global_load_b128 v[184:187], v[104:105], off offset:-2448
	global_load_b64 v[170:171], v[110:111], off offset:16
	v_fma_f64 v[20:21], 0x40200000, v[42:43], v[152:153]
	v_fma_f64 v[4:5], 0xc0200000, v[74:75], v[4:5]
	global_load_b128 v[72:75], v[8:9], off offset:-2064
	v_fma_f64 v[152:153], 0x40200000, v[46:47], v[4:5]
	s_waitcnt vmcnt(6)
	v_add_f64 v[6:7], v[16:17], -v[120:121]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[6:7], 0xc0200000, v[18:19], v[6:7]
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], v[16:17], -v[72:73]
	v_ldexp_f64 v[16:17], v[18:19], 3
	v_add_f64 v[18:19], v[72:73], -v[0:1]
	v_add_f64 v[0:1], v[120:121], -v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[122:123], 0xc0200000, v[74:75], v[16:17]
	v_fma_f64 v[176:177], 0xc0200000, v[74:75], v[18:19]
	global_load_b128 v[16:19], v[110:111], off offset:-16
	v_fma_f64 v[176:177], 0x40200000, v[66:67], v[176:177]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[50:51], v[76:77], v[16:17]
	v_add_f64 v[178:179], v[114:115], -v[18:19]
	v_add_f64 v[68:69], v[52:53], -v[18:19]
	v_mul_f64 v[18:19], v[34:35], v[170:171]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[168:169], v[76:77], v[112:113], -v[50:51]
	v_mul_f64 v[50:51], v[26:27], v[164:165]
	v_fma_f64 v[72:73], v[34:35], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[74:75], v[26:27], v[112:113], -v[50:51]
	v_add_f64 v[112:113], v[48:49], -v[114:115]
	v_add_co_u32 v114, vcc_lo, 0xfff4b800, v88
	v_add_co_ci_u32_e32 v115, vcc_lo, -1, v89, vcc_lo
	global_load_b128 v[48:51], v[114:115], off offset:-16
	s_waitcnt vmcnt(0)
	v_ldexp_f64 v[16:17], -v[50:51], 3
	v_fma_f64 v[178:179], 0xc0200000, v[50:51], v[178:179]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[182:183], 0x40200000, v[38:39], v[16:17]
	v_ldexp_f64 v[16:17], -v[186:187], 3
	v_ldexp_f64 v[38:39], v[96:97], 3
	v_add_f64 v[50:51], v[48:49], v[182:183]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], 0x40200000, v[62:63], v[16:17]
	v_add_f64 v[16:17], v[56:57], -v[28:29]
	v_fma_f64 v[172:173], 0xc0200000, v[62:63], v[16:17]
	v_add_co_u32 v16, vcc_lo, 0xffe97000, v104
	v_add_co_ci_u32_e32 v17, vcc_lo, -1, v105, vcc_lo
	global_load_b128 v[90:93], v[16:17], off offset:-16
	s_waitcnt vmcnt(0)
	v_mul_f64 v[16:17], v[96:97], v[90:91]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[166:167], v[38:39], v[8:9], v[16:17]
	v_add_co_u32 v8, vcc_lo, 0xfffff000, v104
	v_add_co_ci_u32_e32 v9, vcc_lo, -1, v105, vcc_lo
	s_clause 0x3
	global_load_b128 v[154:157], v[8:9], off offset:-784
	global_load_b128 v[16:19], v[104:105], off offset:2416
	global_load_b64 v[4:5], v[40:41], off offset:32
	global_load_b64 v[10:11], v[150:151], off offset:32
	s_waitcnt vmcnt(3)
	v_mul_f64 v[62:63], v[96:97], v[154:155]
	s_waitcnt vmcnt(2)
	v_add_f64 v[8:9], v[16:17], -v[184:185]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[40:41], v[108:109], v[4:5]
	v_mul_f64 v[4:5], v[124:125], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[174:175], v[38:39], v[8:9], v[62:63]
	v_ldexp_f64 v[38:39], -v[42:43], 3
	v_fma_f64 v[154:155], v[108:109], v[154:155], -v[40:41]
	v_add_f64 v[42:43], v[56:57], -v[156:157]
	v_add_f64 v[56:57], v[60:61], -v[92:93]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[62:63], 0x40200000, v[46:47], v[38:39]
	v_add_co_u32 v38, vcc_lo, 0x1000, v104
	v_add_co_ci_u32_e32 v39, vcc_lo, 0, v105, vcc_lo
	global_load_b128 v[38:41], v[38:39], off offset:752
	v_add_f64 v[150:151], v[30:31], v[62:63]
	s_waitcnt vmcnt(0)
	v_add_f64 v[46:47], v[156:157], -v[40:41]
	v_add_f64 v[156:157], v[184:185], v[2:3]
	v_ldexp_f64 v[2:3], -v[66:67], 3
	v_add_f64 v[40:41], v[28:29], -v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[186:187], 0xc0200000, v[186:187], v[46:47]
	v_fma_f64 v[2:3], 0x40200000, v[70:71], v[2:3]
	v_fma_f64 v[70:71], 0x40200000, v[70:71], v[6:7]
	global_load_b64 v[6:7], v[148:149], off offset:32
	v_add_f64 v[148:149], v[122:123], v[92:93]
	s_clause 0x1
	global_load_b64 v[120:121], v[104:105], off offset:-2416
	global_load_b64 v[122:123], v[104:105], off offset:2448
	v_add_f64 v[184:185], v[2:3], v[60:61]
	v_mul_f64 v[60:61], v[124:125], v[10:11]
	v_mul_f64 v[10:11], v[146:147], v[10:11]
	s_waitcnt vmcnt(2)
	v_mul_f64 v[46:47], v[102:103], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[124:125], v[6:7], -v[60:61]
	v_ldexp_f64 v[60:61], v[124:125], 3
	s_waitcnt vmcnt(0)
	v_add_f64 v[66:67], v[122:123], -v[120:121]
	v_fma_f64 v[46:47], v[102:103], v[90:91], -v[46:47]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[52:53], v[60:61], v[0:1], v[6:7]
	v_add_co_u32 v6, vcc_lo, 0xfffff000, v94
	v_add_co_ci_u32_e32 v7, vcc_lo, -1, v95, vcc_lo
	v_fma_f64 v[12:13], v[60:61], v[66:67], v[4:5]
	global_load_b128 v[60:63], v[6:7], off offset:-784
	s_waitcnt vmcnt(0)
	v_add_f64 v[6:7], v[30:31], -v[62:63]
	v_add_co_u32 v30, vcc_lo, 0x1000, v94
	v_add_co_ci_u32_e32 v31, vcc_lo, 0, v95, vcc_lo
	v_add_f64 v[188:189], v[62:63], v[188:189]
	global_load_b128 v[90:93], v[30:31], off offset:752
	s_waitcnt vmcnt(0)
	v_mul_f64 v[30:31], v[76:77], v[90:91]
	v_mul_f64 v[90:91], v[136:137], v[90:91]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[76:77], v[60:61], -v[30:31]
	v_mul_f64 v[30:31], v[126:127], v[60:61]
	v_ldexp_f64 v[60:61], v[126:127], 3
	v_fma_f64 v[6:7], v[60:61], v[6:7], v[30:31]
	v_add_co_u32 v30, vcc_lo, 0x167000, v94
	v_add_co_ci_u32_e32 v31, vcc_lo, 0, v95, vcc_lo
	global_load_b64 v[62:63], v[30:31], off offset:3328
	v_add_co_u32 v30, vcc_lo, 0xffe96000, v94
	v_add_co_ci_u32_e32 v31, vcc_lo, -1, v95, vcc_lo
	v_add_co_u32 v66, vcc_lo, 0xfff4b000, v94
	v_add_co_ci_u32_e32 v67, vcc_lo, -1, v95, vcc_lo
	v_add_co_u32 v0, vcc_lo, 0xb3000, v94
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v95, vcc_lo
	s_clause 0x2
	global_load_b64 v[30:31], v[30:31], off offset:-768
	global_load_b64 v[66:67], v[66:67], off offset:-2816
	global_load_b64 v[4:5], v[0:1], off offset:1280
	s_waitcnt vmcnt(3)
	v_mul_f64 v[54:55], v[126:127], v[62:63]
	s_waitcnt vmcnt(0)
	v_add_f64 v[58:59], v[4:5], -v[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[54:55], v[126:127], v[30:31], -v[54:55]
	v_fma_f64 v[54:55], v[60:61], v[58:59], v[54:55]
	v_ldexp_f64 v[58:59], v[136:137], 3
	v_add_f64 v[60:61], v[24:25], -v[92:93]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[90:91], v[58:59], v[60:61], v[90:91]
	v_add_co_u32 v60, vcc_lo, 0x16a000, v94
	v_add_co_ci_u32_e32 v61, vcc_lo, 0, v95, vcc_lo
	v_add_co_u32 v2, vcc_lo, 0xffe99000, v94
	v_add_co_ci_u32_e32 v3, vcc_lo, -1, v95, vcc_lo
	global_load_b64 v[60:61], v[60:61], off offset:768
	v_add_co_u32 v80, vcc_lo, 0xfff4d000, v94
	v_add_co_ci_u32_e32 v81, vcc_lo, -1, v95, vcc_lo
	v_add_co_u32 v0, vcc_lo, 0xb5000, v94
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v95, vcc_lo
	s_clause 0x2
	global_load_b64 v[2:3], v[2:3], off offset:-3328
	global_load_b64 v[14:15], v[80:81], off offset:-1280
	global_load_b64 v[80:81], v[0:1], off offset:2816
	s_waitcnt vmcnt(3)
	v_mul_f64 v[0:1], v[136:137], v[60:61]
	s_waitcnt vmcnt(0)
	v_add_f64 v[64:65], v[80:81], -v[14:15]
	v_add_f64 v[14:15], v[66:67], -v[14:15]
	v_add_f64 v[4:5], v[4:5], -v[80:81]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[136:137], v[2:3], -v[0:1]
	v_fma_f64 v[58:59], v[58:59], v[64:65], v[0:1]
	v_mul_f64 v[0:1], v[102:103], v[2:3]
	v_ldexp_f64 v[2:3], v[102:103], 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], v[102:103], v[30:31], -v[0:1]
	v_fma_f64 v[30:31], v[2:3], v[56:57], v[46:47]
	v_add_co_u32 v46, vcc_lo, 0xffe97000, v94
	v_add_co_ci_u32_e32 v47, vcc_lo, -1, v95, vcc_lo
	s_clause 0x1
	global_load_b64 v[64:65], v[46:47], off offset:-2432
	global_load_b64 v[46:47], v[46:47], off offset:2432
	s_waitcnt vmcnt(0)
	v_add_f64 v[56:57], v[46:47], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], v[56:57], v[0:1]
	v_add_co_u32 v0, vcc_lo, 0x168000, v104
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v105, vcc_lo
	v_mul_f64 v[56:57], v[146:147], v[60:61]
	global_load_b128 v[102:105], v[0:1], off offset:4080
	v_fma_f64 v[60:61], v[146:147], v[62:63], -v[56:57]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[0:1], v[146:147], v[102:103], -v[10:11]
	v_ldexp_f64 v[10:11], v[146:147], 3
	v_add_f64 v[56:57], v[36:37], -v[104:105]
	v_add_f64 v[28:29], v[148:149], -v[104:105]
	v_add_f64 v[36:37], v[184:185], -v[36:37]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[56:57], v[10:11], v[56:57], v[0:1]
	s_clause 0x1
	global_load_b64 v[146:147], v[144:145], off offset:-2432
	global_load_b64 v[0:1], v[144:145], off offset:2432
	s_waitcnt vmcnt(0)
	v_add_f64 v[62:63], v[0:1], -v[146:147]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[144:145], v[10:11], v[62:63], v[60:61]
	v_add_co_u32 v10, vcc_lo, 0xb4800, v88
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v89, vcc_lo
	v_add_co_u32 v66, vcc_lo, 0xfff4b800, v94
	v_add_co_ci_u32_e32 v67, vcc_lo, -1, v95, vcc_lo
	global_load_b128 v[60:63], v[10:11], off offset:-16
	s_waitcnt vmcnt(0)
	v_add_f64 v[182:183], v[60:61], -v[48:49]
	v_ldexp_f64 v[48:49], -v[62:63], 3
	v_fma_f64 v[178:179], 0x40200000, v[62:63], v[178:179]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[48:49], 0x40200000, v[32:33], v[48:49]
	v_ldexp_f64 v[32:33], v[76:77], 3
	v_add_f64 v[48:49], v[60:61], v[48:49]
	global_load_b64 v[60:61], v[138:139], off offset:32
	v_fma_f64 v[76:77], v[32:33], v[160:161], v[8:9]
	v_fma_f64 v[8:9], v[32:33], v[182:183], v[168:169]
	v_add_f64 v[32:33], v[162:163], -v[158:159]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[126:127], -v[126:127], v[60:61], v[6:7]
	global_load_b64 v[6:7], v[140:141], off offset:32
	s_waitcnt vmcnt(0)
	v_fma_f64 v[90:91], -v[136:137], v[6:7], v[90:91]
	v_mul_f64 v[6:7], v[100:101], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[100:101], v[60:61], -v[6:7]
	v_mul_f64 v[60:61], v[100:101], v[170:171]
	v_fma_f64 v[136:137], v[100:101], v[164:165], -v[60:61]
	s_clause 0x1
	global_load_b64 v[62:63], v[114:115], off offset:16
	global_load_b64 v[60:61], v[10:11], off offset:16
	v_ldexp_f64 v[100:101], v[100:101], 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fma_f64 v[138:139], v[100:101], v[32:33], v[6:7]
	s_waitcnt vmcnt(0)
	v_add_f64 v[6:7], v[60:61], -v[62:63]
	v_fma_f64 v[32:33], v[100:101], v[6:7], v[136:137]
	v_ldexp_f64 v[6:7], -v[18:19], 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], 0x40200000, v[22:23], v[6:7]
	v_add_f64 v[100:101], v[16:17], v[6:7]
	global_load_b64 v[16:17], v[142:143], off offset:32
	v_fma_f64 v[6:7], 0x40200000, v[18:19], v[186:187]
	v_fma_f64 v[18:19], 0x40200000, v[22:23], v[172:173]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[22:23], v[106:107], v[16:17]
	v_fma_f64 v[124:125], -v[124:125], v[16:17], v[12:13]
	v_add_f64 v[12:13], v[188:189], -v[92:93]
	scratch_load_b64 v[16:17], off, off offset:36 ; 8-byte Folded Reload
	s_clause 0x1
	global_load_b64 v[92:93], v[66:67], off offset:-2432
	global_load_b64 v[66:67], v[66:67], off offset:2432
	v_fma_f64 v[136:137], v[106:107], v[38:39], -v[22:23]
	v_add_f64 v[22:23], v[150:151], -v[24:25]
	v_fma_f64 v[24:25], -v[96:97], v[102:103], v[166:167]
	v_fma_f64 v[38:39], -v[96:97], v[38:39], v[174:175]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[14:15], 0xc0200000, v[92:93], v[14:15]
	v_ldexp_f64 v[16:17], -v[16:17], 3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], 0x40200000, v[66:67], v[14:15]
	v_fma_f64 v[30:31], v[16:17], v[176:177], v[30:31]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[2:3], v[16:17], v[14:15], v[2:3]
	scratch_load_b64 v[16:17], off, off offset:124 ; 8-byte Folded Reload
	v_add_co_u32 v14, vcc_lo, 0xb4800, v94
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v95, vcc_lo
	s_waitcnt vmcnt(0)
	v_ldexp_f64 v[80:81], v[16:17], 3
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[16:17], v[80:81], v[70:71], v[30:31]
	s_clause 0x1
	global_load_b64 v[30:31], v[14:15], off offset:-2432
	global_load_b64 v[14:15], v[14:15], off offset:2432
	v_ldexp_f64 v[70:71], v[86:87], 3
	v_add_f64 v[16:17], v[16:17], -v[56:57]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[4:5], 0xc0200000, v[30:31], v[4:5]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], 0x40200000, v[14:15], v[4:5]
	v_fma_f64 v[4:5], v[80:81], v[4:5], v[2:3]
	v_ldexp_f64 v[2:3], v[78:79], 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], -v[144:145]
	v_fma_f64 v[76:77], -v[2:3], v[12:13], v[76:77]
	v_mul_f64 v[2:3], v[2:3], v[178:179]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[70:71], v[180:181], -v[2:3]
	v_fma_f64 v[2:3], v[70:71], v[22:23], v[76:77]
	scratch_load_b128 v[76:79], off, off offset:108 ; 16-byte Folded Reload
	v_ldexp_f64 v[22:23], v[98:99], 3
	v_add_f64 v[8:9], v[8:9], v[12:13]
	v_add_f64 v[2:3], v[2:3], -v[138:139]
	v_mul_f64 v[12:13], v[44:45], v[16:17]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[24:25], -v[22:23], v[28:29], v[24:25]
	v_mul_f64 v[6:7], v[22:23], v[6:7]
	v_ldexp_f64 v[22:23], v[30:31], 3
	v_ldexp_f64 v[28:29], v[108:109], 3
	v_add_f64 v[30:31], v[100:101], -v[122:123]
	v_add_f64 v[8:9], v[8:9], -v[32:33]
	v_mul_f64 v[2:3], v[84:85], v[2:3]
	v_fma_f64 v[22:23], 0xc0200000, v[92:93], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[22:23], v[64:65]
	v_add_f64 v[22:23], v[22:23], -v[146:147]
	s_waitcnt vmcnt(0)
	v_ldexp_f64 v[70:71], v[78:79], 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[70:71], v[18:19], -v[6:7]
	v_fma_f64 v[6:7], v[70:71], v[36:37], v[24:25]
	v_ldexp_f64 v[24:25], -v[66:67], 3
	v_ldexp_f64 v[36:37], v[134:135], 3
	v_add_f64 v[6:7], v[6:7], -v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], 0x40200000, v[14:15], v[24:25]
	v_ldexp_f64 v[24:25], v[128:129], 3
	v_fma_f64 v[6:7], v[44:45], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], v[46:47]
	v_mul_f64 v[20:21], v[24:25], v[20:21]
	v_fma_f64 v[22:23], -v[24:25], v[22:23], v[54:55]
	v_add_f64 v[24:25], v[156:157], -v[120:121]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[14:15], -v[0:1]
	v_ldexp_f64 v[14:15], v[132:133], 3
	v_fma_f64 v[20:21], v[14:15], v[152:153], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[14:15], v[14:15], v[0:1], v[22:23]
	v_fma_f64 v[0:1], v[28:29], v[42:43], v[154:155]
	v_ldexp_f64 v[42:43], v[130:131], 3
	v_ldexp_f64 v[22:23], v[106:107], 3
	v_add_f64 v[20:21], v[126:127], v[20:21]
	v_add_f64 v[12:13], v[14:15], -v[58:59]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[0:1], -v[42:43], v[24:25], v[0:1]
	v_add_f64 v[24:25], v[38:39], v[18:19]
	v_fma_f64 v[40:41], v[22:23], v[40:41], v[136:137]
	v_add_f64 v[20:21], v[20:21], -v[90:91]
	v_fma_f64 v[0:1], v[36:37], v[30:31], v[0:1]
	v_add_co_u32 v30, vcc_lo, 0x167000, v88
	v_add_co_ci_u32_e32 v31, vcc_lo, 0, v89, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[18:19], v[84:85], v[20:21], v[2:3]
	v_add_f64 v[2:3], v[24:25], -v[124:125]
	s_clause 0x2
	global_load_b64 v[24:25], v[116:117], off offset:-2432
	global_load_b64 v[38:39], v[110:111], off offset:-2432
	global_load_b64 v[70:71], v[114:115], off offset:-2432
	v_add_f64 v[0:1], v[0:1], -v[40:41]
	global_load_b64 v[40:41], v[10:11], off offset:-2432
	v_fma_f64 v[8:9], v[44:45], v[8:9], v[18:19]
	v_mul_f64 v[0:1], v[84:85], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[84:85], v[2:3], v[0:1]
	s_waitcnt vmcnt(2)
	v_add_f64 v[0:1], v[24:25], -v[38:39]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[0:1], 0xc0200000, v[70:71], v[0:1]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], 0x40200000, v[40:41], v[0:1]
	v_mul_f64 v[94:95], v[42:43], v[0:1]
	s_clause 0x4
	global_load_b64 v[96:97], v[116:117], off offset:2432
	global_load_b64 v[98:99], v[110:111], off offset:2432
	global_load_b64 v[0:1], v[114:115], off offset:2432
	global_load_b64 v[10:11], v[10:11], off offset:2432
	global_load_b64 v[30:31], v[30:31], off offset:3328
	s_waitcnt vmcnt(4)
	v_add_f64 v[24:25], v[96:97], -v[24:25]
	s_waitcnt vmcnt(3)
	v_add_f64 v[20:21], v[96:97], -v[98:99]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], 0xc0200000, v[0:1], v[20:21]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[20:21], 0x40200000, v[10:11], v[20:21]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[20:21], v[36:37], v[20:21], -v[94:95]
	v_add_co_u32 v36, vcc_lo, 0xffe96000, v88
	v_add_co_ci_u32_e32 v37, vcc_lo, -1, v89, vcc_lo
	v_add_co_u32 v46, vcc_lo, 0xfff4b000, v88
	v_add_co_ci_u32_e32 v47, vcc_lo, -1, v89, vcc_lo
	global_load_b64 v[36:37], v[36:37], off offset:-768
	v_add_co_u32 v54, vcc_lo, 0xb3000, v88
	v_add_co_ci_u32_e32 v55, vcc_lo, 0, v89, vcc_lo
	s_clause 0x1
	global_load_b64 v[46:47], v[46:47], off offset:-2816
	global_load_b64 v[54:55], v[54:55], off offset:1280
	s_waitcnt vmcnt(3)
	v_mul_f64 v[42:43], v[108:109], v[30:31]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], v[108:109], v[36:37], -v[42:43]
	s_waitcnt vmcnt(0)
	v_add_f64 v[64:65], v[54:55], -v[46:47]
	v_fma_f64 v[28:29], v[28:29], v[64:65], v[42:43]
	v_add_co_u32 v42, vcc_lo, 0xffe99000, v88
	v_add_co_ci_u32_e32 v43, vcc_lo, -1, v89, vcc_lo
	v_add_co_u32 v64, vcc_lo, 0x16a000, v88
	v_add_co_ci_u32_e32 v65, vcc_lo, 0, v89, vcc_lo
	s_clause 0x1
	global_load_b64 v[64:65], v[64:65], off offset:768
	global_load_b64 v[42:43], v[42:43], off offset:-3328
	v_add_co_u32 v66, vcc_lo, 0xfff4d000, v88
	v_add_co_ci_u32_e32 v67, vcc_lo, -1, v89, vcc_lo
	v_add_co_u32 v76, vcc_lo, 0xb5000, v88
	v_add_co_ci_u32_e32 v77, vcc_lo, 0, v89, vcc_lo
	s_clause 0x1
	global_load_b64 v[66:67], v[66:67], off offset:-1280
	global_load_b64 v[76:77], v[76:77], off offset:2816
	v_add_co_u32 v18, vcc_lo, s4, v118
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v119, vcc_lo
	scratch_load_b64 v[16:17], off, off offset:68 ; 8-byte Folded Reload
	v_add_f64 v[14:15], v[28:29], v[20:21]
	s_clause 0x1
	scratch_load_b64 v[20:21], off, off offset:12
	scratch_load_b64 v[28:29], off, off offset:60
	s_waitcnt vmcnt(6)
	v_mul_f64 v[78:79], v[106:107], v[64:65]
	s_waitcnt vmcnt(3)
	v_add_f64 v[80:81], v[76:77], -v[66:67]
	s_waitcnt vmcnt(2)
	v_mul_f64 v[16:17], v[16:17], s[0:1]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[6:7], v[28:29], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[78:79], v[106:107], v[42:43], -v[78:79]
	v_mul_f64 v[42:43], v[26:27], v[42:43]
	v_fma_f64 v[16:17], v[20:21], s[0:1], v[16:17]
	v_add_co_u32 v20, vcc_lo, s6, v118
	v_add_co_ci_u32_e32 v21, vcc_lo, s7, v119, vcc_lo
	v_fma_f64 v[22:23], v[22:23], v[80:81], v[78:79]
	v_fma_f64 v[36:37], v[26:27], v[36:37], -v[42:43]
	v_ldexp_f64 v[42:43], v[26:27], 3
	scratch_load_b64 v[26:27], off, off offset:52 ; 8-byte Folded Reload
	v_add_f64 v[12:13], v[14:15], -v[22:23]
	v_add_co_u32 v22, vcc_lo, s8, v118
	v_fma_f64 v[74:75], v[42:43], v[112:113], v[74:75]
	v_fma_f64 v[24:25], v[42:43], v[24:25], v[36:37]
	scratch_load_b64 v[42:43], off, off offset:4 ; 8-byte Folded Reload
	v_ldexp_f64 v[36:37], -v[70:71], 3
	v_add_co_ci_u32_e32 v23, vcc_lo, s9, v119, vcc_lo
	v_add_co_u32 v18, vcc_lo, v18, v82
	v_add_co_ci_u32_e32 v19, vcc_lo, v19, v83, vcc_lo
	v_add_co_u32 v20, vcc_lo, v20, v82
	v_add_co_ci_u32_e32 v21, vcc_lo, v21, v83, vcc_lo
	v_add_co_u32 v22, vcc_lo, v22, v82
	v_add_co_ci_u32_e32 v23, vcc_lo, v23, v83, vcc_lo
	v_add_co_u32 v18, vcc_lo, v18, v190
	v_add_co_ci_u32_e32 v19, vcc_lo, v19, v191, vcc_lo
	v_add_co_u32 v20, vcc_lo, v20, v190
	v_add_co_ci_u32_e32 v21, vcc_lo, v21, v191, vcc_lo
	v_add_co_u32 v22, vcc_lo, v22, v190
	v_add_co_ci_u32_e32 v23, vcc_lo, v23, v191, vcc_lo
	v_fma_f64 v[2:3], v[28:29], v[12:13], v[2:3]
	v_fma_f64 v[0:1], 0x40200000, v[0:1], v[36:37]
	v_add_f64 v[36:37], v[50:51], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[46:47], v[0:1]
	v_add_f64 v[0:1], v[0:1], -v[66:67]
	s_waitcnt vmcnt(0)
	v_ldexp_f64 v[42:43], -v[42:43], 3
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], v[42:43], v[0:1], v[24:25]
	v_ldexp_f64 v[24:25], -v[40:41], 3
	v_ldexp_f64 v[40:41], v[26:27], 3
	scratch_load_b64 v[26:27], off, off offset:92 ; 8-byte Folded Reload
	v_fma_f64 v[36:37], v[42:43], v[36:37], v[74:75]
	v_fma_f64 v[10:11], 0x40200000, v[10:11], v[24:25]
	v_add_f64 v[24:25], v[48:49], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[54:55], v[10:11]
	v_fma_f64 v[24:25], v[40:41], v[24:25], v[36:37]
	v_ldexp_f64 v[36:37], v[34:35], 3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], -v[76:77]
	v_fma_f64 v[0:1], v[40:41], v[10:11], v[0:1]
	v_mul_f64 v[10:11], v[34:35], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[34:35], v[30:31], -v[10:11]
	v_add_f64 v[30:31], v[98:99], -v[38:39]
	v_fma_f64 v[38:39], v[36:37], v[68:69], v[72:73]
	v_fma_f64 v[10:11], v[36:37], v[30:31], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[24:25], -v[38:39]
	v_add_f64 v[0:1], v[0:1], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[44:45], v[14:15], v[8:9]
	v_dual_mov_b32 v14, v28 :: v_dual_mov_b32 v15, v29
	v_fma_f64 v[0:1], v[14:15], v[0:1], v[2:3]
	v_fma_f64 v[2:3], v[14:15], v[4:5], v[6:7]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[30:31], v[26:27], s[0:1]
	scratch_load_b64 v[26:27], off, off offset:28 ; 8-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_fma_f64 v[30:31], v[26:27], s[0:1], v[30:31]
	scratch_load_b64 v[26:27], off, off offset:100 ; 8-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_mul_f64 v[36:37], v[26:27], s[0:1]
	scratch_load_b64 v[26:27], off, off offset:20 ; 8-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_fma_f64 v[36:37], v[26:27], s[0:1], v[36:37]
	scratch_load_b64 v[26:27], off, off offset:76 ; 8-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_fma_f64 v[30:31], v[26:27], s[0:1], v[30:31]
	scratch_load_b64 v[26:27], off, off offset:84 ; 8-byte Folded Reload
	v_add_f64 v[4:5], v[30:31], v[8:9]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[36:37], v[26:27], s[0:1], v[36:37]
	global_load_b64 v[10:11], v[18:19], off
	global_load_b64 v[12:13], v[20:21], off
	global_load_b64 v[24:25], v[22:23], off
	scratch_load_b64 v[26:27], off, off offset:44 ; 8-byte Folded Reload
	v_add_f64 v[0:1], v[36:37], v[0:1]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[16:17], v[26:27], s[0:1], v[16:17]
	s_mov_b32 s0, 0xd6ac6977
	s_mov_b32 s1, 0x3fb2b324
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[4:5], s[0:1], v[10:11]
	v_fma_f64 v[0:1], v[0:1], s[0:1], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[16:17], v[2:3]
	v_fma_f64 v[2:3], v[2:3], s[0:1], v[24:25]
	global_store_b64 v[18:19], v[4:5], off
	global_store_b64 v[20:21], v[0:1], off
	global_store_b64 v[22:23], v[2:3], off
.LBB0_2:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3sw4PdS_S_S_S_S_S_S_S_S_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 132
		.amdhsa_kernarg_size 352
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 192
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i, .Lfunc_end0-_Z3sw4PdS_S_S_S_S_S_S_S_S_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 8300
; NumSgprs: 18
; NumVgprs: 192
; ScratchSize: 132
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 23
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 192
; Occupancy: 8
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .offset:         88
        .size:           4
        .value_kind:     by_value
      - .offset:         96
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         100
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         104
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         108
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         110
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         112
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         114
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         116
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         118
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         160
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 352
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3sw4PdS_S_S_S_S_S_S_S_S_S_i
    .private_segment_fixed_size: 132
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3sw4PdS_S_S_S_S_S_S_S_S_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     192
    .vgpr_spill_count: 32
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
