/**
 * 3DConvolution.cu: This file is part of the PolyBench/GPU 1.0 test suite.
 *
 *
 * Contact: Scott Grauer-Gray <sgrauerg@gmail.com>
 * Louis-Noel Pouchet <pouchet@cse.ohio-state.edu>
 * Web address: http://www.cse.ohio-state.edu/~pouchet/software/polybench/GPU
 */

#include <unistd.h>
#include <stdio.h>
#include <time.h>
#include <sys/time.h>
#include <stdlib.h>
#include <stdarg.h>
#include <string.h>
#include <cuda.h>

/* Problem size */
#define NI 512l
#define NJ 512l
#define NK 512l

#define NUM_ITERATIONS 10

/* Thread block dimensions */
#define DIM_THREAD_BLOCK_X 32
#define DIM_THREAD_BLOCK_Y 8

/* Can switch DATA_TYPE between float and double */
typedef float DATA_TYPE;

void init(DATA_TYPE* A)
{
	int i, j, k;

	for (i = 0; i < NI; ++i)
    	{
		for (j = 0; j < NJ; ++j)
		{
			for (k = 0; k < NK; ++k)
			{
				A[i*(NK * NJ) + j*NK + k] = i % 12 + 2 * (j % 7) + 3 * (k % 13);
			}
		}
	}
}


__global__ void convolution3D_kernel(DATA_TYPE *A, DATA_TYPE *B, int i)
{
	int k = blockIdx.x * blockDim.x + threadIdx.x;
	int j = blockIdx.y * blockDim.y + threadIdx.y;

	DATA_TYPE c11, c12, c13, c21, c22, c23, c31, c32, c33;

	c11 = +2;  c21 = +5;  c31 = -8;
	c12 = -3;  c22 = +6;  c32 = -9;
	c13 = +4;  c23 = +7;  c33 = +10;


	if ((i < (NI-1)) && (j < (NJ-1)) &&  (k < (NK-1)) && (i > 0) && (j > 0) && (k > 0))
	{
		B[i*(NK * NJ) + j*NK + k] = c11 * A[(i - 1)*(NK * NJ) + (j - 1)*NK + (k - 1)]  +  c13 * A[(i + 1)*(NK * NJ) + (j - 1)*NK + (k - 1)]
					     +   c21 * A[(i - 1)*(NK * NJ) + (j - 1)*NK + (k - 1)]  +  c23 * A[(i + 1)*(NK * NJ) + (j - 1)*NK + (k - 1)]
					     +   c31 * A[(i - 1)*(NK * NJ) + (j - 1)*NK + (k - 1)]  +  c33 * A[(i + 1)*(NK * NJ) + (j - 1)*NK + (k - 1)]
					     +   c12 * A[(i + 0)*(NK * NJ) + (j - 1)*NK + (k + 0)]  +  c22 * A[(i + 0)*(NK * NJ) + (j + 0)*NK + (k + 0)]   
					     +   c32 * A[(i + 0)*(NK * NJ) + (j + 1)*NK + (k + 0)]  +  c11 * A[(i - 1)*(NK * NJ) + (j - 1)*NK + (k + 1)]  
					     +   c13 * A[(i + 1)*(NK * NJ) + (j - 1)*NK + (k + 1)]  +  c21 * A[(i - 1)*(NK * NJ) + (j + 0)*NK + (k + 1)]  
					     +   c23 * A[(i + 1)*(NK * NJ) + (j + 0)*NK + (k + 1)]  +  c31 * A[(i - 1)*(NK * NJ) + (j + 1)*NK + (k + 1)]  
					     +   c33 * A[(i + 1)*(NK * NJ) + (j + 1)*NK + (k + 1)];
	}
}


void convolution3DCuda(DATA_TYPE* A, DATA_TYPE* B)
{
	dim3 block(DIM_THREAD_BLOCK_X, DIM_THREAD_BLOCK_Y);
	dim3 grid((size_t)(ceil( ((float)NK) / ((float)block.x) )), (size_t)(ceil( ((float)NJ) / ((float)block.y) )));

	int i;
	for (i = 1; i < NI - 1; ++i) // 0
	{
		convolution3D_kernel<<< grid, block >>>(A, B, i);
	}

	cudaDeviceSynchronize();
}


int main(int argc, char *argv[])
{
	DATA_TYPE* A;
	DATA_TYPE* B;  

	float average_time = 0;

	cudaEvent_t start, end;
	float time;
	cudaEventCreate(&start);
	cudaEventCreate(&end);
#ifndef UNMANAGED
	cudaMallocManaged( &A, NI*NJ*NK*sizeof(DATA_TYPE) );
	cudaMallocManaged( &B, NI*NJ*NK*sizeof(DATA_TYPE) );
	//initialize the arrays
	init(A);
	for (int i = 0; i < NUM_ITERATIONS + 1; ++i) {
		cudaEventCreate(&start);
		cudaEventCreate(&end);
		cudaEventRecord(start);
		convolution3DCuda(A, B);
		cudaEventRecord(end);
		cudaEventSynchronize(end);
		cudaEventElapsedTime(&time, start, end);
		if (i > 0) {
			// first iteration warms up the GPU
			average_time += time / NUM_ITERATIONS;
		}
	}
#else
	DATA_TYPE *gA, *gB;
	cudaMalloc( &gA, NI*NJ*NK*sizeof(DATA_TYPE) );
	cudaMalloc( &gB, NI*NJ*NK*sizeof(DATA_TYPE) );
	A = (DATA_TYPE *) malloc( NI*NJ*NK*sizeof(DATA_TYPE) );
	B = (DATA_TYPE *) malloc( NI*NJ*NK*sizeof(DATA_TYPE) );
	//initialize the arrays
	init(A);
	cudaMemcpy(gA, A, NI*NJ*NK*sizeof(DATA_TYPE), cudaMemcpyHostToDevice);

	for (int i = 0; i < NUM_ITERATIONS + 1; ++i) {
		cudaEventCreate(&start);
		cudaEventCreate(&end);
		cudaEventRecord(start);
		convolution3DCuda(gA, gB);
		cudaEventRecord(end);
		cudaEventSynchronize(end);
		cudaEventElapsedTime(&time, start, end);
		if (i > 0) {
			// first iteration warms up the GPU
			average_time += time / NUM_ITERATIONS;
		}
	}
	cudaMemcpy(B, gB, NI*NJ*NK*sizeof(DATA_TYPE), cudaMemcpyDeviceToHost);
#endif
	printf("%f\n", average_time);
#ifndef UNMANAGED
	cudaFree(A);
	cudaFree(B);
#else
	cudaFree(gA);
	cudaFree(gB);
	free(A);
	free(B);
#endif
	return 0;
}


	.file	"tmpxft_0027e520_00000000-6_3DConvolution.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2045:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2045:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z4initPf
	.type	_Z4initPf, @function
_Z4initPf:
.LFB2040:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	xorl	%ecx, %ecx
	movl	$12, %r10d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	$13, %r11d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	$7, %ebx
.L3:
	movl	%ecx, %eax
	movq	%rcx, %r8
	xorl	%edi, %edi
	cltd
	salq	$18, %r8
	idivl	%r10d
	movl	%edx, %ebp
.L7:
	movl	%edi, %eax
	leaq	(%r9,%r8,4), %r12
	xorl	%esi, %esi
	cltd
	idivl	%ebx
	leal	0(%rbp,%rdx,2), %r13d
.L4:
	movl	%esi, %eax
	cltd
	idivl	%r11d
	leal	(%rdx,%rdx,2), %edx
	addl	%r13d, %edx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%r12,%rsi,4)
	incq	%rsi
	cmpq	$512, %rsi
	jne	.L4
	incl	%edi
	addq	$512, %r8
	cmpl	$512, %edi
	jne	.L7
	incq	%rcx
	cmpq	$512, %rcx
	jne	.L3
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z4initPf, .-_Z4initPf
	.globl	_Z43__device_stub__Z20convolution3D_kernelPfS_iPfS_i
	.type	_Z43__device_stub__Z20convolution3D_kernelPfS_iPfS_i, @function
_Z43__device_stub__Z20convolution3D_kernelPfS_iPfS_i:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z20convolution3D_kernelPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L11:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z43__device_stub__Z20convolution3D_kernelPfS_iPfS_i, .-_Z43__device_stub__Z20convolution3D_kernelPfS_iPfS_i
	.globl	_Z20convolution3D_kernelPfS_i
	.type	_Z20convolution3D_kernelPfS_i, @function
_Z20convolution3D_kernelPfS_i:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z20convolution3D_kernelPfS_iPfS_i
	.cfi_endproc
.LFE2068:
	.size	_Z20convolution3D_kernelPfS_i, .-_Z20convolution3D_kernelPfS_i
	.globl	_Z17convolution3DCudaPfS_
	.type	_Z17convolution3DCudaPfS_, @function
_Z17convolution3DCudaPfS_:
.LFB2041:
	.cfi_startproc
	endbr64
	movabsq	$274877906960, %rax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movabsq	$34359738400, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	$1, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, 16(%rsp)
	movq	%rax, 20(%rsp)
	movl	$1, 28(%rsp)
.L18:
	movl	16(%rsp), %ecx
	movq	20(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	28(%rsp), %esi
	movq	%r13, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movl	%ebx, %edx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	_Z43__device_stub__Z20convolution3D_kernelPfS_iPfS_i
.L17:
	incl	%ebx
	cmpl	$511, %ebx
	jne	.L18
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaDeviceSynchronize@PLT
	.cfi_endproc
.LFE2041:
	.size	_Z17convolution3DCudaPfS_, .-_Z17convolution3DCudaPfS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"%f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2042:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rbp
	leaq	48(%rsp), %r12
	movq	%rbp, %rdi
	call	cudaEventCreate@PLT
	movq	%r12, %rdi
	call	cudaEventCreate@PLT
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	movl	$536870912, %esi
	call	cudaMallocManaged@PLT
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	movl	$536870912, %esi
	call	cudaMallocManaged@PLT
	movq	24(%rsp), %rdi
	call	_Z4initPf
	xorps	%xmm0, %xmm0
.L23:
	movq	%rbp, %rdi
	movss	%xmm0, 12(%rsp)
	call	cudaEventCreate@PLT
	movq	%r12, %rdi
	call	cudaEventCreate@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z17convolution3DCudaPfS_
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	leaq	20(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	testl	%ebx, %ebx
	movss	12(%rsp), %xmm0
	je	.L22
	movss	20(%rsp), %xmm1
	divss	.LC1(%rip), %xmm1
	addss	%xmm1, %xmm0
.L22:
	incl	%ebx
	cmpl	$11, %ebx
	jne	.L23
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2042:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z20convolution3D_kernelPfS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2070:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z20convolution3D_kernelPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2070:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1092616192
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * 3DConvolution.cu: This file is part of the PolyBench/GPU 1.0 test suite.
 *
 *
 * Contact: Scott Grauer-Gray <sgrauerg@gmail.com>
 * Louis-Noel Pouchet <pouchet@cse.ohio-state.edu>
 * Web address: http://www.cse.ohio-state.edu/~pouchet/software/polybench/GPU
 */

#include <unistd.h>
#include <stdio.h>
#include <time.h>
#include <sys/time.h>
#include <stdlib.h>
#include <stdarg.h>
#include <string.h>
#include <hip/hip_runtime.h>

/* Problem size */
#define NI 512l
#define NJ 512l
#define NK 512l

#define NUM_ITERATIONS 10

/* Thread block dimensions */
#define DIM_THREAD_BLOCK_X 32
#define DIM_THREAD_BLOCK_Y 8

/* Can switch DATA_TYPE between float and double */
typedef float DATA_TYPE;

void init(DATA_TYPE* A)
{
	int i, j, k;

	for (i = 0; i < NI; ++i)
    	{
		for (j = 0; j < NJ; ++j)
		{
			for (k = 0; k < NK; ++k)
			{
				A[i*(NK * NJ) + j*NK + k] = i % 12 + 2 * (j % 7) + 3 * (k % 13);
			}
		}
	}
}


__global__ void convolution3D_kernel(DATA_TYPE *A, DATA_TYPE *B, int i)
{
	int k = blockIdx.x * blockDim.x + threadIdx.x;
	int j = blockIdx.y * blockDim.y + threadIdx.y;

	DATA_TYPE c11, c12, c13, c21, c22, c23, c31, c32, c33;

	c11 = +2;  c21 = +5;  c31 = -8;
	c12 = -3;  c22 = +6;  c32 = -9;
	c13 = +4;  c23 = +7;  c33 = +10;


	if ((i < (NI-1)) && (j < (NJ-1)) &&  (k < (NK-1)) && (i > 0) && (j > 0) && (k > 0))
	{
		B[i*(NK * NJ) + j*NK + k] = c11 * A[(i - 1)*(NK * NJ) + (j - 1)*NK + (k - 1)]  +  c13 * A[(i + 1)*(NK * NJ) + (j - 1)*NK + (k - 1)]
					     +   c21 * A[(i - 1)*(NK * NJ) + (j - 1)*NK + (k - 1)]  +  c23 * A[(i + 1)*(NK * NJ) + (j - 1)*NK + (k - 1)]
					     +   c31 * A[(i - 1)*(NK * NJ) + (j - 1)*NK + (k - 1)]  +  c33 * A[(i + 1)*(NK * NJ) + (j - 1)*NK + (k - 1)]
					     +   c12 * A[(i + 0)*(NK * NJ) + (j - 1)*NK + (k + 0)]  +  c22 * A[(i + 0)*(NK * NJ) + (j + 0)*NK + (k + 0)]   
					     +   c32 * A[(i + 0)*(NK * NJ) + (j + 1)*NK + (k + 0)]  +  c11 * A[(i - 1)*(NK * NJ) + (j - 1)*NK + (k + 1)]  
					     +   c13 * A[(i + 1)*(NK * NJ) + (j - 1)*NK + (k + 1)]  +  c21 * A[(i - 1)*(NK * NJ) + (j + 0)*NK + (k + 1)]  
					     +   c23 * A[(i + 1)*(NK * NJ) + (j + 0)*NK + (k + 1)]  +  c31 * A[(i - 1)*(NK * NJ) + (j + 1)*NK + (k + 1)]  
					     +   c33 * A[(i + 1)*(NK * NJ) + (j + 1)*NK + (k + 1)];
	}
}


void convolution3DCuda(DATA_TYPE* A, DATA_TYPE* B)
{
	dim3 block(DIM_THREAD_BLOCK_X, DIM_THREAD_BLOCK_Y);
	dim3 grid((size_t)(ceil( ((float)NK) / ((float)block.x) )), (size_t)(ceil( ((float)NJ) / ((float)block.y) )));

	int i;
	for (i = 1; i < NI - 1; ++i) // 0
	{
		convolution3D_kernel<<< grid, block >>>(A, B, i);
	}

	hipDeviceSynchronize();
}


int main(int argc, char *argv[])
{
	DATA_TYPE* A;
	DATA_TYPE* B;  

	float average_time = 0;

	hipEvent_t start, end;
	float time;
	hipEventCreate(&start);
	hipEventCreate(&end);
#ifndef UNMANAGED
	hipMallocManaged( &A, NI*NJ*NK*sizeof(DATA_TYPE) );
	hipMallocManaged( &B, NI*NJ*NK*sizeof(DATA_TYPE) );
	//initialize the arrays
	init(A);
	for (int i = 0; i < NUM_ITERATIONS + 1; ++i) {
		hipEventCreate(&start);
		hipEventCreate(&end);
		hipEventRecord(start);
		convolution3DCuda(A, B);
		hipEventRecord(end);
		hipEventSynchronize(end);
		hipEventElapsedTime(&time, start, end);
		if (i > 0) {
			// first iteration warms up the GPU
			average_time += time / NUM_ITERATIONS;
		}
	}
#else
	DATA_TYPE *gA, *gB;
	hipMalloc( &gA, NI*NJ*NK*sizeof(DATA_TYPE) );
	hipMalloc( &gB, NI*NJ*NK*sizeof(DATA_TYPE) );
	A = (DATA_TYPE *) malloc( NI*NJ*NK*sizeof(DATA_TYPE) );
	B = (DATA_TYPE *) malloc( NI*NJ*NK*sizeof(DATA_TYPE) );
	//initialize the arrays
	init(A);
	hipMemcpy(gA, A, NI*NJ*NK*sizeof(DATA_TYPE), hipMemcpyHostToDevice);

	for (int i = 0; i < NUM_ITERATIONS + 1; ++i) {
		hipEventCreate(&start);
		hipEventCreate(&end);
		hipEventRecord(start);
		convolution3DCuda(gA, gB);
		hipEventRecord(end);
		hipEventSynchronize(end);
		hipEventElapsedTime(&time, start, end);
		if (i > 0) {
			// first iteration warms up the GPU
			average_time += time / NUM_ITERATIONS;
		}
	}
	hipMemcpy(B, gB, NI*NJ*NK*sizeof(DATA_TYPE), hipMemcpyDeviceToHost);
#endif
	printf("%f\n", average_time);
#ifndef UNMANAGED
	hipFree(A);
	hipFree(B);
#else
	hipFree(gA);
	hipFree(gB);
	free(A);
	free(B);
#endif
	return 0;
}


	.text
	.file	"3DConvolution.hip"
	.globl	_Z4initPf                       # -- Begin function _Z4initPf
	.type	_Z4initPf,@function
_Z4initPf:                              # @_Z4initPf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	xorl	%eax, %eax
	movl	$2863311531, %ecx               # imm = 0xAAAAAAAB
	movl	$65535, %edx                    # imm = 0xFFFF
.LBB0_1:                                # %.preheader17
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_2 Depth 2
                                        #       Child Loop BB0_3 Depth 3
	movl	%eax, %esi
	imulq	%rcx, %rsi
	shrq	$35, %rsi
	shll	$2, %esi
	leal	(%rsi,%rsi,2), %r8d
	movl	%eax, %esi
	subl	%r8d, %esi
	movq	%rdi, %r8
	xorl	%r9d, %r9d
.LBB0_2:                                # %.preheader
                                        #   Parent Loop BB0_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_3 Depth 3
	movl	%r9d, %r10d
	imulq	$613566757, %r10, %r10          # imm = 0x24924925
	shrq	$32, %r10
	movl	%r9d, %r11d
	subl	%r10d, %r11d
	shrl	%r11d
	addl	%r10d, %r11d
	shrl	$2, %r11d
	leal	(,%r11,8), %r10d
	subl	%r10d, %r11d
	addl	%r9d, %r11d
	leal	(%rsi,%r11,2), %r10d
	xorl	%r11d, %r11d
	xorl	%ebx, %ebx
.LBB0_3:                                #   Parent Loop BB0_1 Depth=1
                                        #     Parent Loop BB0_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%ebx, %ebp
	andl	%edx, %ebp
	imull	$20165, %ebp, %ebp              # imm = 0x4EC5
	shrl	$18, %ebp
	imull	$39, %ebp, %ebp
	movl	%r11d, %r14d
	subl	%ebp, %r14d
	andl	%edx, %r14d
	addl	%r10d, %r14d
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r14d, %xmm0
	movss	%xmm0, (%r8,%rbx,4)
	incq	%rbx
	addl	$3, %r11d
	cmpq	$512, %rbx                      # imm = 0x200
	jne	.LBB0_3
# %bb.4:                                #   in Loop: Header=BB0_2 Depth=2
	incq	%r9
	addq	$2048, %r8                      # imm = 0x800
	cmpq	$512, %r9                       # imm = 0x200
	jne	.LBB0_2
# %bb.5:                                #   in Loop: Header=BB0_1 Depth=1
	incq	%rax
	addq	$1048576, %rdi                  # imm = 0x100000
	cmpq	$512, %rax                      # imm = 0x200
	jne	.LBB0_1
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z4initPf, .Lfunc_end0-_Z4initPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__convolution3D_kernelPfS_i # -- Begin function _Z35__device_stub__convolution3D_kernelPfS_i
	.type	_Z35__device_stub__convolution3D_kernelPfS_i,@function
_Z35__device_stub__convolution3D_kernelPfS_i: # @_Z35__device_stub__convolution3D_kernelPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20convolution3D_kernelPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z35__device_stub__convolution3D_kernelPfS_i, .Lfunc_end1-_Z35__device_stub__convolution3D_kernelPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z17convolution3DCudaPfS_       # -- Begin function _Z17convolution3DCudaPfS_
	.type	_Z17convolution3DCudaPfS_,@function
_Z17convolution3DCudaPfS_:              # @_Z17convolution3DCudaPfS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movl	$1, %ebp
	movabsq	$274877906960, %r15             # imm = 0x4000000010
	movabsq	$34359738400, %r12              # imm = 0x800000020
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_3
# %bb.2:                                #   in Loop: Header=BB2_1 Depth=1
	movq	%r14, %rdi
	movq	%rbx, %rsi
	movl	%ebp, %edx
	callq	_Z35__device_stub__convolution3D_kernelPfS_i
.LBB2_3:                                #   in Loop: Header=BB2_1 Depth=1
	incl	%ebp
	cmpl	$511, %ebp                      # imm = 0x1FF
	jne	.LBB2_1
# %bb.4:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipDeviceSynchronize            # TAILCALL
.Lfunc_end2:
	.size	_Z17convolution3DCudaPfS_, .Lfunc_end2-_Z17convolution3DCudaPfS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x41200000                      # float 10
.LCPI3_1:
	.long	0x80000000                      # float -0
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	movq	%rsp, %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	leaq	32(%rsp), %r15
	movl	$536870912, %esi                # imm = 0x20000000
	movq	%r15, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	24(%rsp), %rdi
	movl	$536870912, %esi                # imm = 0x20000000
	movl	$1, %edx
	callq	hipMallocManaged
	movq	(%r15), %rdi
	callq	_Z4initPf
	xorps	%xmm0, %xmm0
	movl	$11, %ebp
	leaq	12(%rsp), %r15
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movq	%rbx, %rdi
	callq	hipEventCreate
	movq	%r14, %rdi
	callq	hipEventCreate
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	callq	_Z17convolution3DCudaPfS_
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	(%rsp), %rdx
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI3_0(%rip), %xmm0
	movss	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	cmpl	$11, %ebp
	je	.LBB3_3
# %bb.2:                                #   in Loop: Header=BB3_1 Depth=1
	movaps	%xmm0, %xmm1
.LBB3_3:                                #   in Loop: Header=BB3_1 Depth=1
	movss	8(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	%xmm1, %xmm0
	decl	%ebp
	jne	.LBB3_1
# %bb.4:
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20convolution3D_kernelPfS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z20convolution3D_kernelPfS_i,@object # @_Z20convolution3D_kernelPfS_i
	.section	.rodata,"a",@progbits
	.globl	_Z20convolution3D_kernelPfS_i
	.p2align	3, 0x0
_Z20convolution3D_kernelPfS_i:
	.quad	_Z35__device_stub__convolution3D_kernelPfS_i
	.size	_Z20convolution3D_kernelPfS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%f\n"
	.size	.L.str, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z20convolution3D_kernelPfS_i"
	.size	.L__unnamed_1, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__convolution3D_kernelPfS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z20convolution3D_kernelPfS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z20convolution3D_kernelPfS_i ; -- Begin function _Z20convolution3D_kernelPfS_i
	.globl	_Z20convolution3D_kernelPfS_i
	.p2align	8
	.type	_Z20convolution3D_kernelPfS_i,@function
_Z20convolution3D_kernelPfS_i:          ; @_Z20convolution3D_kernelPfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s4, s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_mov_b32 s7, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[0:1], null, s15, s3, v[4:5]
	v_min3_i32 v1, s4, v0, v2
	v_max3_i32 v3, v2, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e32 vcc_lo, 0, v1
	v_cmp_gt_i32_e64 s2, 0x1ff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, vcc_lo
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v4, -1, v0
	s_add_i32 s6, s4, -1
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v5, v3 :: v_dual_add_nc_u32 v6, -1, v2
	s_lshl_b64 s[8:9], s[6:7], 20
	v_mov_b32_e32 v7, v3
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[4:5], 11, v[4:5]
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_waitcnt lgkmcnt(0)
	s_add_u32 s8, s0, s8
	s_addc_u32 s9, s1, s9
	s_add_i32 s6, s4, 1
	v_add_co_u32 v14, vcc_lo, s8, v4
	s_lshl_b64 s[6:7], s[6:7], 20
	v_add_co_ci_u32_e32 v15, vcc_lo, s9, v5, vcc_lo
	s_add_u32 s10, s0, s6
	s_addc_u32 s11, s1, s7
	v_add_co_u32 v16, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v17, vcc_lo, s11, v5, vcc_lo
	v_add_co_u32 v8, vcc_lo, v14, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, v15, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, v16, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v17, v7, vcc_lo
	s_clause 0x1
	global_load_b32 v18, v[8:9], off
	global_load_b32 v19, v[6:7], off
	s_lshl_b64 s[6:7], s[4:5], 20
	s_lshl_b64 s[4:5], s[4:5], 18
	v_lshlrev_b64 v[6:7], 9, v[0:1]
	s_add_u32 s6, s0, s6
	v_add_co_u32 v10, s4, s4, v2
	s_addc_u32 s7, s1, s7
	v_add_co_u32 v8, vcc_lo, s6, v4
	v_add_co_ci_u32_e64 v11, null, s5, 0, s4
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v5, vcc_lo
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	v_add_nc_u32_e32 v2, 1, v0
	v_add_co_u32 v6, vcc_lo, v10, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v11, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 11, v[2:3]
	v_add_co_u32 v8, vcc_lo, v8, v4
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_ci_u32_e32 v9, vcc_lo, v9, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v10, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, v12, v4
	v_add_co_ci_u32_e32 v13, vcc_lo, v13, v5, vcc_lo
	s_clause 0x2
	global_load_b32 v20, v[8:9], off
	global_load_b32 v21, v[10:11], off
	global_load_b32 v22, v[12:13], off
	v_add_co_u32 v8, vcc_lo, v14, v4
	v_lshlrev_b64 v[0:1], 11, v[0:1]
	v_add_co_ci_u32_e32 v9, vcc_lo, v15, v5, vcc_lo
	v_add_co_u32 v10, vcc_lo, v16, v4
	v_add_co_ci_u32_e32 v11, vcc_lo, v17, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v14, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v15, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, v12, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, v13, v5, vcc_lo
	v_add_co_u32 v12, vcc_lo, v14, v4
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v13, vcc_lo, v15, v5, vcc_lo
	s_clause 0x3
	global_load_b32 v8, v[8:9], off offset:4
	global_load_b32 v9, v[10:11], off offset:4
	global_load_b32 v10, v[0:1], off offset:4
	global_load_b32 v11, v[12:13], off offset:4
	v_add_co_u32 v0, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, v0, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, v2, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[0:1], off offset:4
	global_load_b32 v1, v[2:3], off offset:4
	s_waitcnt vmcnt(9)
	v_mul_f32_e32 v2, 4.0, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, 2.0, v18
	v_fmac_f32_e32 v2, 0x40a00000, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, 0x40e00000, v19
	v_fmac_f32_e32 v2, 0xc1000000, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, 0x41200000, v19
	s_waitcnt vmcnt(8)
	v_fmamk_f32 v2, v20, 0xc0400000, v2
	s_waitcnt vmcnt(7)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmamk_f32 v2, v21, 0x40c00000, v2
	s_waitcnt vmcnt(6)
	v_fmamk_f32 v2, v22, 0xc1100000, v2
	s_waitcnt vmcnt(5)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, 2.0, v8
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v2, 4.0, v9
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, 0x40a00000, v10
	s_waitcnt vmcnt(2)
	v_fmac_f32_e32 v2, 0x40e00000, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v2, 0xc1000000, v0
	v_add_co_u32 v0, vcc_lo, s2, v6
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v2, 0x41200000, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v7, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20convolution3D_kernelPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z20convolution3D_kernelPfS_i, .Lfunc_end0-_Z20convolution3D_kernelPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 884
; NumSgprs: 18
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20convolution3D_kernelPfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20convolution3D_kernelPfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     23
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
