#include <iostream>
#include <vector>
#include <algorithm>
#include <stdio.h>

using namespace std;

#define BSIZE 256

#define CHECK(call)                                                            \
{                                                                              \
    const cudaError_t error = call;                                            \
    if (error != cudaSuccess)                                                  \
    {                                                                          \
        fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__);                 \
        fprintf(stderr, "code: %d, reason: %s\n", error,                       \
                cudaGetErrorString(error));                                    \
        exit(1);                                                               \
    }                                                                          \
}

// rearrange the data by classes
__global__ void separateClass(int nPoints, int nDimension, int* devPointIdx, float* devTranData, float* devTranDataSortClass) {
	int pointIdx = blockIdx.x * BSIZE + threadIdx.x;

	if(pointIdx < nPoints) {
		int i;
		int inPos = pointIdx * nDimension;
		int outPos = devPointIdx[pointIdx] * nDimension;
		for(i = 0; i < nDimension; i++)
			devTranDataSortClass[outPos+i] = devTranData[inPos+i];
	}

}

// create dataArray in GPU
__global__ void createSVMData(int numClass, int* devClassDist, int* devClassAccuDist, int* devNPointsArray, int* devNPointsAccuArray, int nDimension, float* devDataArray, float* devTranDataSortClass) {
	int svmId = blockIdx.x;
	int classA = 0;
	while(svmId >= (classA+1)*(numClass-1)-(classA+1)*classA/2)
		classA ++;
	int classB = svmId - classA*(numClass-1) + classA*(classA-1)/2 + classA + 1;
	int pointId = threadIdx.x;

	while(pointId < devNPointsArray[svmId]) {
		int i;
		int inPos = 0;
		if(pointId >= devClassDist[classA])
			inPos = (devClassAccuDist[classB] + pointId - devClassDist[classA]) * nDimension;
		else
			inPos = (devClassAccuDist[classA] + pointId) * nDimension;

		int outPos = devNPointsAccuArray[svmId] * nDimension + pointId;
		for(i = 0; i < nDimension; i++)
			devDataArray[outPos+i*devNPointsArray[svmId]] = devTranDataSortClass[inPos+i];

		pointId += BSIZE;
	}

}


/**
 * Setup both dataArray and transposedDataArray for one-againse-one multi-class training
 * @param numSVM the number of SVMs for training, equals to category.size() * (category.size()-1) / 2
 * @param category stores the labels for different classes
 * @param classDist stores the class distribution for each class, where classDist[0] is the number of points in the original data set which has label category[0]
 * @param nPoints the number of points in the original data
 * @param nDimension the number of dimensions of the data points in the original data
 * @param transposedData the row major store of the original data
 * @param labels store the labels for the orignal data
 * @param nPointsArray the number of points for each SVM, where nPointsArray[svmId] = classDist[i] + classDist[j] and there is a one to one mapping between svmId and (i, j), given by svmId = i * (category.size()-1) - i*(i-1)/2 + j - i - 1. Please refer to createSVMData() for the detailed mapping;  
 * @param dataArray is used to store the output column major data for each SVM
 * @param transposedDataArray is used to store the output row major data for each SVM
 */
void setupData(int numSVM, vector<float> category, int* classDist, int nPoints, int nDimension, float* transposedData, float* labels, int* nPointsArray, float** dataArray, float** transposedDataArray) {
	int i;

	// 1. create transposed data sorted by classes
	int* classCount = (int*)calloc(category.size(), sizeof(int));
	int* pointIdx = (int*)malloc(sizeof(int)*nPoints);
	int* classAccuDist = (int*)malloc(sizeof(int)*category.size());
	classAccuDist[0] = 0;
	for(i = 1; i < category.size(); i++)
		classAccuDist[i] = classAccuDist[i-1] + classDist[i-1];

	for(i = 0; i < nPoints; i++) {
		int classIdx = find(category.begin(), category.end(), labels[i]) - category.begin();
		pointIdx[i] = classAccuDist[classIdx] + classCount[classIdx];
		classCount[classIdx] ++;
	}

	int* devPointIdx;
	CHECK(cudaMalloc((int**)&devPointIdx, sizeof(int)*nPoints));
	CHECK(cudaMemcpy(devPointIdx, pointIdx, sizeof(int)*nPoints, cudaMemcpyHostToDevice));

	float* devTranData;
	CHECK(cudaMalloc((float**)&devTranData, sizeof(float)*nPoints*nDimension));
	CHECK(cudaMemcpy(devTranData, transposedData, sizeof(float)*nPoints*nDimension, cudaMemcpyHostToDevice));

	float* devTranDataSortClass;
	CHECK(cudaMalloc((float**)&devTranDataSortClass, sizeof(float)*nPoints*nDimension));

	int gridSize = (nPoints / BSIZE) + 1;
	// sort the transposed data by classes
	separateClass<<<gridSize,  BSIZE>>> (nPoints, nDimension, devPointIdx, devTranData, devTranDataSortClass);

	CHECK(cudaFree(devPointIdx));
	CHECK(cudaFree(devTranData));
	free(classCount);
	free(pointIdx);

	// 2. setup transposedDataArray
	float* transposedDataSortClass = (float*) malloc(sizeof(float)*nPoints*nDimension);
	CHECK(cudaMemcpy(transposedDataSortClass, devTranDataSortClass, sizeof(float)*nPoints*nDimension, cudaMemcpyDeviceToHost));

	int classA = 0;
	int classB = 1;
	// copy data to transposedDataArray
	for(i = 0; i < numSVM; i++) {
		memcpy(transposedDataArray[i], transposedDataSortClass+classAccuDist[classA]*nDimension, sizeof(float)*classDist[classA]*nDimension);
		memcpy(transposedDataArray[i]+classDist[classA]*nDimension, transposedDataSortClass+classAccuDist[classB]*nDimension, sizeof(float)*classDist[classB]*nDimension);

		if(classB == category.size()-1) {
			classA ++;
			classB = classA + 1;
		} else
			classB ++;
	}

	free(transposedDataSortClass);

	// 3. setup dataArray
	int* devNPointsArray;
	CHECK(cudaMalloc((int**)&devNPointsArray, sizeof(int)*numSVM));
	CHECK(cudaMemcpy(devNPointsArray, nPointsArray, sizeof(int)*numSVM, cudaMemcpyHostToDevice));

	int* devClassDist;
	CHECK(cudaMalloc((int**)&devClassDist, sizeof(int)*category.size()));
	CHECK(cudaMemcpy(devClassDist, classDist, sizeof(int)*category.size(), cudaMemcpyHostToDevice));

	int* devClassAccuDist;
	CHECK(cudaMalloc((int**)&devClassAccuDist, sizeof(int)*category.size()));
	CHECK(cudaMemcpy(devClassAccuDist, classAccuDist, sizeof(int)*category.size(), cudaMemcpyHostToDevice));

	int* nPointsAccuArray = (int*)malloc(sizeof(int)*numSVM);
	nPointsAccuArray[0] = 0;
	for(i = 1; i < numSVM; i++) 
		nPointsAccuArray[i] = nPointsAccuArray[i-1] + nPointsArray[i-1];

	int* devNPointsAccuArray;
	CHECK(cudaMalloc((int**)&devNPointsAccuArray, sizeof(int)*numSVM));
	CHECK(cudaMemcpy(devNPointsAccuArray, nPointsAccuArray, sizeof(int)*numSVM, cudaMemcpyHostToDevice));

	int totalPoints = nPointsAccuArray[numSVM-1]+nPointsArray[numSVM-1];
	float* devDataArray;
	CHECK(cudaMalloc((float**)&devDataArray, sizeof(float)*totalPoints*nDimension));

	// create devDataArray
	createSVMData<<<numSVM, BSIZE>>>(category.size(), devClassDist, devClassAccuDist, devNPointsArray, devNPointsAccuArray, nDimension, devDataArray, devTranDataSortClass);

	// copy data to dataArray
	for(i = 0; i < numSVM; i++)
		CHECK(cudaMemcpy(dataArray[i], devDataArray+nPointsAccuArray[i]*nDimension, sizeof(float)*nPointsArray[i]*nDimension, cudaMemcpyDeviceToHost));

	// free pointers
	CHECK(cudaFree(devClassDist));
	CHECK(cudaFree(devClassAccuDist));
	CHECK(cudaFree(devNPointsArray));
	CHECK(cudaFree(devNPointsAccuArray));
	CHECK(cudaFree(devDataArray));
	CHECK(cudaFree(devTranDataSortClass));
	free(classAccuDist);
	free(nPointsAccuArray);
}

// randomly partition the data into folder parts
__global__ void partitionData(int folder, int nPoints, int nDimension, int* devDataPartitionSize, int* devDataPartitionAccuSize, float* devTranData, int* devPermutation, float* devDataPar, float* devTranDataPar) {
	int pointId = threadIdx.x;

	while(pointId < nPoints) {
		int inPos = devPermutation[pointId]*nDimension;
		int partId = pointId % folder;
		int partPointId = pointId / folder;
		int outPosData = devDataPartitionAccuSize[partId]*nDimension + partPointId;
		int outPosTranData = (devDataPartitionAccuSize[partId]+partPointId) * nDimension;
		int i;
		for(i = 0; i < nDimension; i++) {
			devDataPar[outPosData+i*devDataPartitionSize[partId]] = devTranData[inPos+i];
			devTranDataPar[outPosTranData+i] = devTranData[inPos+i];
		}

		pointId += BSIZE;
	}

}

void setupDataCV(int folder, int nPoints, int nDimension, float* transposedData, int* permutation, float** dataPartitionArray, float** dataTranPartitionArray) {
	int i;

	// dataPartitionSize stores sizes for each partition
	int* dataPartitionSize = (int*)malloc(sizeof(int)*folder);
	for(i = 0; i < folder; i++) {
		dataPartitionSize[i] = nPoints / folder;
		if(nPoints % folder != 0 && i < nPoints % folder)
			dataPartitionSize[i] ++;
	}

	int* dataPartitionAccuSize = (int*)malloc(sizeof(int)*folder);
	dataPartitionAccuSize[0] = 0;
	for(i = 1; i < folder; i++) {
		dataPartitionAccuSize[i] = dataPartitionAccuSize[i-1] + dataPartitionSize[i-1];
	}

	int* devDataPartitionSize;
	CHECK(cudaMalloc((int**)&devDataPartitionSize, sizeof(int)*folder));
	CHECK(cudaMemcpy(devDataPartitionSize, dataPartitionSize, sizeof(int)*folder, cudaMemcpyHostToDevice));

	int* devDataPartitionAccuSize;
	CHECK(cudaMalloc((int**)&devDataPartitionAccuSize, sizeof(int)*folder));
	CHECK(cudaMemcpy(devDataPartitionAccuSize, dataPartitionAccuSize, sizeof(int)*folder, cudaMemcpyHostToDevice));

	float* devTranData;
	CHECK(cudaMalloc((float**)&devTranData, sizeof(float)*nPoints*nDimension));
	CHECK(cudaMemcpy(devTranData, transposedData, sizeof(float)*nPoints*nDimension, cudaMemcpyHostToDevice));

	int* devPermutation;
	CHECK(cudaMalloc((int**)&devPermutation, sizeof(int)*nPoints));
	CHECK(cudaMemcpy(devPermutation, permutation, sizeof(int)*nPoints, cudaMemcpyHostToDevice));

	float* devDataPar;
	CHECK(cudaMalloc((float**)&devDataPar, sizeof(float)*nPoints*nDimension));

	float* devTranDataPar;
	CHECK(cudaMalloc((float**)&devTranDataPar, sizeof(float)*nPoints*nDimension));

	partitionData<<<1, BSIZE>>>(folder, nPoints, nDimension, devDataPartitionSize, devDataPartitionAccuSize, devTranData, devPermutation, devDataPar, devTranDataPar);

	for(i = 0; i < folder; i++) {
		CHECK(cudaMemcpy(dataPartitionArray[i], devDataPar+dataPartitionAccuSize[i]*nDimension, sizeof(float)*dataPartitionSize[i]*nDimension, cudaMemcpyDeviceToHost));
		CHECK(cudaMemcpy(dataTranPartitionArray[i], devTranDataPar+dataPartitionAccuSize[i]*nDimension, sizeof(float)*dataPartitionSize[i]*nDimension, cudaMemcpyDeviceToHost));
	}

	// free pointers
	free(dataPartitionSize);
	free(dataPartitionAccuSize);
	CHECK(cudaFree(devDataPartitionSize));
	CHECK(cudaFree(devDataPartitionAccuSize));
	CHECK(cudaFree(devTranData));
	CHECK(cudaFree(devPermutation));
	CHECK(cudaFree(devDataPar));
	CHECK(cudaFree(devTranDataPar));
}
	.file	"tmpxft_00202a7e_00000000-6_setupData.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4256:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4256:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z40__device_stub__Z13separateClassiiPiPfS0_iiPiPfS0_
	.type	_Z40__device_stub__Z13separateClassiiPiPfS0_iiPiPfS0_, @function
_Z40__device_stub__Z13separateClassiiPiPfS0_iiPiPfS0_:
.LFB4278:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13separateClassiiPiPfS0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4278:
	.size	_Z40__device_stub__Z13separateClassiiPiPfS0_iiPiPfS0_, .-_Z40__device_stub__Z13separateClassiiPiPfS0_iiPiPfS0_
	.globl	_Z13separateClassiiPiPfS0_
	.type	_Z13separateClassiiPiPfS0_, @function
_Z13separateClassiiPiPfS0_:
.LFB4279:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z13separateClassiiPiPfS0_iiPiPfS0_
	.cfi_endproc
.LFE4279:
	.size	_Z13separateClassiiPiPfS0_, .-_Z13separateClassiiPiPfS0_
	.globl	_Z46__device_stub__Z13createSVMDataiPiS_S_S_iPfS0_iPiS_S_S_iPfS0_
	.type	_Z46__device_stub__Z13createSVMDataiPiS_S_S_iPfS0_iPiS_S_S_iPfS0_, @function
_Z46__device_stub__Z13createSVMDataiPiS_S_S_iPfS0_iPiS_S_S_iPfS0_:
.LFB4280:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movl	%edi, 60(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	232(%rsp), %rax
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movl	%r9d, 56(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	60(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	80(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z13createSVMDataiPiS_S_S_iPfS0_(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 240
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L8:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4280:
	.size	_Z46__device_stub__Z13createSVMDataiPiS_S_S_iPfS0_iPiS_S_S_iPfS0_, .-_Z46__device_stub__Z13createSVMDataiPiS_S_S_iPfS0_iPiS_S_S_iPfS0_
	.globl	_Z13createSVMDataiPiS_S_S_iPfS0_
	.type	_Z13createSVMDataiPiS_S_S_iPfS0_, @function
_Z13createSVMDataiPiS_S_S_iPfS0_:
.LFB4281:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z13createSVMDataiPiS_S_S_iPfS0_iPiS_S_S_iPfS0_
	.cfi_endproc
.LFE4281:
	.size	_Z13createSVMDataiPiS_S_S_iPfS0_, .-_Z13createSVMDataiPiS_S_S_iPfS0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/Archonsh/GPU-Train-SVM/master/example/common/setupData.cu"
.LC1:
	.string	"Error: %s:%d, "
.LC2:
	.string	"code: %d, reason: %s\n"
	.text
	.globl	_Z9setupDataiSt6vectorIfSaIfEEPiiiPfS3_S2_PS3_S4_
	.type	_Z9setupDataiSt6vectorIfSaIfEEPiiiPfS3_S2_PS3_S4_, @function
_Z9setupDataiSt6vectorIfSaIfEEPiiiPfS3_S2_PS3_S4_:
.LFB4252:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	movq	8(%rsi), %r12
	movq	(%rsi), %r14
	movl	$4, %esi
	movq	264(%rsp), %rax
	movq	%rdx, 16(%rsp)
	movq	%r12, %rbp
	movq	256(%rsp), %rdx
	movl	%ecx, 28(%rsp)
	movq	%rax, 32(%rsp)
	movq	272(%rsp), %rax
	subq	%r14, %rbp
	movq	%rdx, 88(%rsp)
	movq	280(%rsp), %r15
	movq	%r9, 64(%rsp)
	movl	%edi, 24(%rsp)
	movl	%r8d, 12(%rsp)
	movq	%rbp, %r8
	movq	%rax, 72(%rsp)
	sarq	$2, %r8
	movq	%r8, %rdi
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	movq	%r8, 80(%rsp)
	call	calloc@PLT
	movslq	28(%rsp), %r13
	movq	%rax, 56(%rsp)
	leaq	0(,%r13,4), %rax
	movq	%rax, %rdi
	movq	%rax, 48(%rsp)
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, 40(%rsp)
	call	malloc@PLT
	xorl	%esi, %esi
	movq	80(%rsp), %r8
	movq	88(%rsp), %rdx
	movl	%esi, (%rax)
	movq	%rax, %rbp
	xorl	%eax, %eax
.L14:
	incq	%rax
	cmpq	%r8, %rax
	jnb	.L90
	movq	16(%rsp), %rsi
	movl	-4(%rsi,%rax,4), %esi
	addl	-4(%rbp,%rax,4), %esi
	movl	%esi, 0(%rbp,%rax,4)
	jmp	.L14
.L90:
	movq	%r8, %rdi
	xorl	%esi, %esi
	sarq	$2, %rdi
.L16:
	cmpl	%esi, 28(%rsp)
	jle	.L91
	movq	%r14, %r8
	movq	%rdi, %r9
.L17:
	movq	%r8, %rax
	testq	%r9, %r9
	je	.L92
	movss	(%rdx,%rsi,4), %xmm0
	ucomiss	(%r8), %xmm0
	jp	.L69
	je	.L18
.L69:
	ucomiss	4(%r8), %xmm0
	jp	.L20
	jne	.L20
	leaq	4(%r8), %rax
	jmp	.L18
.L20:
	ucomiss	8(%r8), %xmm0
	jp	.L22
	jne	.L22
	leaq	8(%r8), %rax
	jmp	.L18
.L22:
	addq	$16, %r8
	ucomiss	-4(%r8), %xmm0
	jp	.L24
	jne	.L24
	addq	$12, %rax
	jmp	.L18
.L24:
	decq	%r9
	jmp	.L17
.L92:
	movq	%r12, %r9
	subq	%r8, %r9
	cmpq	$8, %r9
	je	.L27
	cmpq	$12, %r9
	je	.L28
	cmpq	$4, %r9
	je	.L29
	jmp	.L75
.L28:
	movss	(%r8), %xmm0
	ucomiss	(%rdx,%rsi,4), %xmm0
	jp	.L73
	je	.L18
.L73:
	leaq	4(%r8), %rax
.L27:
	movss	(%rax), %xmm0
	ucomiss	(%rdx,%rsi,4), %xmm0
	jp	.L74
	je	.L18
.L74:
	addq	$4, %rax
.L29:
	movss	(%rax), %xmm0
	ucomiss	(%rdx,%rsi,4), %xmm0
	jp	.L75
	je	.L18
.L75:
	movq	%r12, %rax
.L18:
	subq	%r14, %rax
	movq	56(%rsp), %rcx
	sarq	$2, %rax
	cltq
	leaq	(%rcx,%rax,4), %r9
	movl	0(%rbp,%rax,4), %ecx
	movl	(%r9), %r8d
	addl	%r8d, %ecx
	incl	%r8d
	movl	%ecx, %eax
	movq	40(%rsp), %rcx
	movl	%r8d, (%r9)
	movl	%eax, (%rcx,%rsi,4)
	incq	%rsi
	jmp	.L16
.L91:
	movq	48(%rsp), %rsi
	leaq	96(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$94, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L85
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movq	96(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L35
	movl	$95, %r8d
.L85:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	%r12d, %edi
	call	cudaGetErrorString@PLT
	movl	%r12d, %ecx
	movq	%rax, %r8
.L86:
	movq	stderr(%rip), %rdi
	leaq	.LC2(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L35:
	movslq	12(%rsp), %r14
	leaq	104(%rsp), %rdi
	salq	$2, %r14
	imulq	%r14, %r13
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movl	$98, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L85
	movq	64(%rsp), %rsi
	movq	104(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rdx
	call	cudaMemcpy@PLT
	movl	$99, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L85
	leaq	112(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movl	$102, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L85
	movl	28(%rsp), %eax
	movl	$256, %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, 180(%rsp)
	movl	$16777217, %ecx
	cltd
	salq	$8, %rcx
	idivl	%esi
	movq	%rcx, 172(%rsp)
	movq	%rcx, %rdx
	movl	$1, %ecx
	incl	%eax
	movl	%eax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 164(%rsp)
	movq	160(%rsp), %rdi
	movl	168(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	movq	112(%rsp), %r8
	movq	104(%rsp), %rcx
	movq	96(%rsp), %rdx
	movl	12(%rsp), %esi
	movl	28(%rsp), %edi
	call	_Z40__device_stub__Z13separateClassiiPiPfS0_iiPiPfS0_
.L39:
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movl	$108, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L85
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movl	$109, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L85
	movq	56(%rsp), %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	malloc@PLT
	movq	112(%rsp), %rsi
	movq	%r13, %rdx
	movl	$2, %ecx
	movq	%rax, %rdi
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movl	$115, %r8d
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.L88
	xorl	%eax, %eax
	movl	$1, %r8d
	xorl	%edx, %edx
.L42:
	cmpl	%eax, 24(%rsp)
	jle	.L93
	movslq	%edx, %rsi
	movq	16(%rsp), %rcx
	movl	12(%rsp), %edi
	movslq	%r8d, %r9
	imull	0(%rbp,%rsi,4), %edi
	incl	%r8d
	leaq	(%rcx,%rsi,4), %r10
	movslq	(%r10), %rcx
	movslq	%edi, %rsi
	movq	(%r15,%rax,8), %rdi
	imulq	%r14, %rcx
	leaq	(%r12,%rsi,4), %rsi
	rep movsb
	movl	12(%rsp), %ecx
	imull	(%r10), %ecx
	movq	(%r15,%rax,8), %rsi
	movslq	%ecx, %rcx
	leaq	(%rsi,%rcx,4), %r10
	movq	16(%rsp), %rsi
	movq	%r10, %rdi
	movslq	(%rsi,%r9,4), %rcx
	movl	12(%rsp), %esi
	imull	0(%rbp,%r9,4), %esi
	imulq	%r14, %rcx
	movslq	%esi, %rsi
	leaq	(%r12,%rsi,4), %rsi
	rep movsb
	movq	8(%rbx), %rcx
	subq	(%rbx), %rcx
	sarq	$2, %rcx
	decq	%rcx
	cmpq	%rcx, %r9
	jne	.L44
	leal	2(%rdx), %r8d
	incl	%edx
.L44:
	incq	%rax
	jmp	.L42
.L93:
	movq	%r12, %rdi
	call	free@PLT
	movslq	24(%rsp), %r13
	leaq	120(%rsp), %rdi
	salq	$2, %r13
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movl	$135, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L85
	movq	32(%rsp), %rsi
	movq	120(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rdx
	call	cudaMemcpy@PLT
	movl	$136, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L85
	movq	8(%rbx), %rsi
	leaq	128(%rsp), %rdi
	subq	(%rbx), %rsi
	call	cudaMalloc@PLT
	movl	$139, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L85
	movq	16(%rsp), %rsi
	movq	8(%rbx), %rdx
	movl	$1, %ecx
	movq	128(%rsp), %rdi
	subq	(%rbx), %rdx
	call	cudaMemcpy@PLT
	movl	$140, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L85
	movq	8(%rbx), %rsi
	leaq	136(%rsp), %rdi
	subq	(%rbx), %rsi
	call	cudaMalloc@PLT
	movl	$143, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L85
	movq	136(%rsp), %rdi
	movq	8(%rbx), %rdx
	movl	$1, %ecx
	movq	%rbp, %rsi
	subq	(%rbx), %rdx
	call	cudaMemcpy@PLT
	movl	$144, %r8d
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L85
	movq	%r13, %rdi
	call	malloc@PLT
	xorl	%ecx, %ecx
	movl	%ecx, (%rax)
	movq	%rax, %r12
	xorl	%eax, %eax
.L52:
	incq	%rax
	cmpl	%eax, 24(%rsp)
	jle	.L94
	movq	32(%rsp), %rsi
	movl	-4(%rsi,%rax,4), %edx
	addl	-4(%r12,%rax,4), %edx
	movl	%edx, (%r12,%rax,4)
	jmp	.L52
.L94:
	leaq	144(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movl	$152, %r8d
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	.L89
	movq	144(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rdx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %r15d
	testl	%eax, %eax
	je	.L55
	movl	$153, %r8d
.L89:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	%r15d, %edi
	call	cudaGetErrorString@PLT
	movl	%r15d, %ecx
	movq	%rax, %r8
	jmp	.L86
.L55:
	movq	32(%rsp), %rax
	leaq	152(%rsp), %rdi
	movl	-4(%rax,%r13), %esi
	addl	-4(%r12,%r13), %esi
	movslq	%esi, %rsi
	imulq	%r14, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	je	.L56
	movl	$157, %r8d
.L88:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	%r13d, %edi
	call	cudaGetErrorString@PLT
	movl	%r13d, %ecx
	movq	%rax, %r8
	jmp	.L86
.L56:
	movl	24(%rsp), %eax
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, 180(%rsp)
	movl	%eax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 164(%rsp)
	movq	160(%rsp), %rdi
	movl	168(%rsp), %esi
	movq	%rdx, 172(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L57
	movq	8(%rbx), %rdi
	subq	(%rbx), %rdi
	pushq	112(%rsp)
	.cfi_def_cfa_offset 264
	pushq	160(%rsp)
	.cfi_def_cfa_offset 272
	sarq	$2, %rdi
	movl	28(%rsp), %r9d
	movq	160(%rsp), %r8
	movq	136(%rsp), %rcx
	movq	152(%rsp), %rdx
	movq	144(%rsp), %rsi
	call	_Z46__device_stub__Z13createSVMDataiPiS_S_S_iPfS0_iPiS_S_S_iPfS0_
	popq	%rax
	.cfi_def_cfa_offset 264
	popq	%rdx
	.cfi_def_cfa_offset 256
.L57:
	xorl	%r13d, %r13d
.L58:
	cmpl	%r13d, 24(%rsp)
	jle	.L95
	movq	32(%rsp), %rax
	movq	152(%rsp), %rcx
	movslq	(%rax,%r13,4), %rdx
	movl	12(%rsp), %eax
	imull	(%r12,%r13,4), %eax
	imulq	%r14, %rdx
	cltq
	leaq	(%rcx,%rax,4), %rsi
	movq	72(%rsp), %rax
	movl	$2, %ecx
	movq	(%rax,%r13,8), %rdi
	incq	%r13
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L58
	movl	$164, %r8d
	jmp	.L87
.L95:
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movl	$167, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L87
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movl	$168, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L87
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movl	$169, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L87
	movq	144(%rsp), %rdi
	call	cudaFree@PLT
	movl	$170, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L87
	movq	152(%rsp), %rdi
	call	cudaFree@PLT
	movl	$171, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L87
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L65
	movl	$172, %r8d
.L87:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movl	%ebx, %ecx
	movq	%rax, %r8
	jmp	.L86
.L65:
	movq	%rbp, %rdi
	call	free@PLT
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L66
	call	__stack_chk_fail@PLT
.L66:
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	movq	%r12, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE4252:
	.size	_Z9setupDataiSt6vectorIfSaIfEEPiiiPfS3_S2_PS3_S4_, .-_Z9setupDataiSt6vectorIfSaIfEEPiiiPfS3_S2_PS3_S4_
	.globl	_Z48__device_stub__Z13partitionDataiiiPiS_PfS_S0_S0_iiiPiS_PfS_S0_S0_
	.type	_Z48__device_stub__Z13partitionDataiiiPiS_PfS_S0_S0_iiiPiS_PfS_S0_S0_, @function
_Z48__device_stub__Z13partitionDataiiiPiS_PfS_S0_S0_iiiPiS_PfS_S0_S0_:
.LFB4282:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movl	%edi, 60(%rsp)
	leaq	80(%rsp), %rdi
	movl	%esi, 56(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	232(%rsp), %rax
	movl	%edx, 52(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rax, 8(%rsp)
	movq	240(%rsp), %rax
	movq	%rcx, 40(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 32(%rsp)
	movq	%r9, 24(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	60(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	52(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	movq	%rsp, %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L96
	pushq	72(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z13partitionDataiiiPiS_PfS_S0_S0_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 240
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L96:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L98
	call	__stack_chk_fail@PLT
.L98:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4282:
	.size	_Z48__device_stub__Z13partitionDataiiiPiS_PfS_S0_S0_iiiPiS_PfS_S0_S0_, .-_Z48__device_stub__Z13partitionDataiiiPiS_PfS_S0_S0_iiiPiS_PfS_S0_S0_
	.globl	_Z13partitionDataiiiPiS_PfS_S0_S0_
	.type	_Z13partitionDataiiiPiS_PfS_S0_S0_, @function
_Z13partitionDataiiiPiS_PfS_S0_S0_:
.LFB4283:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z13partitionDataiiiPiS_PfS_S0_S0_iiiPiS_PfS_S0_S0_
	.cfi_endproc
.LFE4283:
	.size	_Z13partitionDataiiiPiS_PfS_S0_S0_, .-_Z13partitionDataiiiPiS_PfS_S0_S0_
	.globl	_Z11setupDataCViiiPfPiPS_S1_
	.type	_Z11setupDataCViiiPfPiPS_S1_, @function
_Z11setupDataCViiiPfPiPS_S1_:
.LFB4253:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movq	%rcx, 32(%rsp)
	movl	%esi, 28(%rsp)
	movq	%r8, 40(%rsp)
	movq	%r9, 48(%rsp)
	movq	%rax, 56(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	movslq	%edi, %rax
	leaq	0(,%rax,4), %r15
	movq	%r15, %rdi
	call	malloc@PLT
	xorl	%ecx, %ecx
	movq	%rax, %r12
.L102:
	movl	%ecx, %esi
	cmpl	%ecx, %ebp
	jle	.L143
	movl	28(%rsp), %eax
	cltd
	idivl	%ebp
	testl	%edx, %edx
	je	.L103
	cmpl	%esi, %edx
	jle	.L103
	incl	%eax
.L103:
	movl	%eax, (%r12,%rcx,4)
	incq	%rcx
	jmp	.L102
.L143:
	movq	%r15, %rdi
	call	malloc@PLT
	xorl	%edx, %edx
	movl	%edx, (%rax)
	movq	%rax, %rbx
	xorl	%eax, %eax
.L105:
	incq	%rax
	cmpl	%eax, %ebp
	jle	.L144
	movl	-4(%r12,%rax,4), %edx
	addl	-4(%rbx,%rax,4), %edx
	movl	%edx, (%rbx,%rax,4)
	jmp	.L105
.L144:
	leaq	64(%rsp), %rdi
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	movl	$216, %r8d
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	.L137
	movq	64(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rdx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %r14d
	testl	%eax, %eax
	je	.L108
	movl	$217, %r8d
.L137:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	%r14d, %edi
	call	cudaGetErrorString@PLT
	movl	%r14d, %ecx
	movq	%rax, %r8
.L138:
	movq	stderr(%rip), %rdi
	leaq	.LC2(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L108:
	leaq	72(%rsp), %rdi
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	movl	$220, %r8d
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	.L137
	movq	72(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rdx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movl	$221, %r8d
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	.L137
	movslq	28(%rsp), %r15
	movslq	%r13d, %r14
	leaq	80(%rsp), %rdi
	salq	$2, %r14
	movq	%r15, %rax
	imulq	%r14, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movl	$224, %r8d
	movl	%eax, 16(%rsp)
	testl	%eax, %eax
	jne	.L140
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movq	80(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, 16(%rsp)
	testl	%eax, %eax
	je	.L112
	movl	$225, %r8d
.L140:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	16(%rsp), %edi
	call	cudaGetErrorString@PLT
	movl	16(%rsp), %ecx
	movq	%rax, %r8
	jmp	.L138
.L112:
	leaq	0(,%r15,4), %rdx
	leaq	88(%rsp), %rdi
	movq	%rdx, %rsi
	movq	%rdx, 16(%rsp)
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdx
	movl	$228, %r8d
	testl	%eax, %eax
	movl	%eax, %r15d
	jne	.L141
	movq	40(%rsp), %rsi
	movq	88(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$229, %r8d
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	.L141
	movq	8(%rsp), %rsi
	leaq	96(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$232, %r8d
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	.L141
	movq	8(%rsp), %rsi
	leaq	104(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %r15d
	testl	%eax, %eax
	je	.L116
	movl	$235, %r8d
.L141:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	%r15d, %edi
	call	cudaGetErrorString@PLT
	movl	%r15d, %ecx
	movq	%rax, %r8
	jmp	.L138
.L116:
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$8, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L117
	pushq	%rax
	.cfi_def_cfa_offset 216
	movl	%r13d, %edx
	movl	%ebp, %edi
	pushq	112(%rsp)
	.cfi_def_cfa_offset 224
	pushq	112(%rsp)
	.cfi_def_cfa_offset 232
	pushq	112(%rsp)
	.cfi_def_cfa_offset 240
	movq	112(%rsp), %r9
	movq	104(%rsp), %r8
	movq	96(%rsp), %rcx
	movl	60(%rsp), %esi
	call	_Z48__device_stub__Z13partitionDataiiiPiS_PfS_S0_S0_iiiPiS_PfS_S0_S0_
	addq	$32, %rsp
	.cfi_def_cfa_offset 208
.L117:
	xorl	%r15d, %r15d
.L118:
	cmpl	%r15d, %ebp
	jle	.L145
	movl	(%rbx,%r15,4), %eax
	movq	96(%rsp), %rcx
	movslq	(%r12,%r15,4), %rdx
	imull	%r13d, %eax
	imulq	%r14, %rdx
	cltq
	leaq	(%rcx,%rax,4), %rsi
	movq	48(%rsp), %rax
	movl	$2, %ecx
	movq	(%rax,%r15,8), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, 8(%rsp)
	testl	%eax, %eax
	je	.L119
	movl	$240, %r8d
	jmp	.L142
.L119:
	movl	(%rbx,%r15,4), %eax
	movq	104(%rsp), %rcx
	movslq	(%r12,%r15,4), %rdx
	imull	%r13d, %eax
	imulq	%r14, %rdx
	cltq
	leaq	(%rcx,%rax,4), %rsi
	movq	56(%rsp), %rax
	movl	$2, %ecx
	movq	(%rax,%r15,8), %rdi
	incq	%r15
	call	cudaMemcpy@PLT
	movl	%eax, 8(%rsp)
	testl	%eax, %eax
	je	.L118
	movl	$241, %r8d
.L142:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	8(%rsp), %edi
	call	cudaGetErrorString@PLT
	movl	8(%rsp), %ecx
	movq	%rax, %r8
	jmp	.L138
.L145:
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movl	$247, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L139
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movl	$248, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L139
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movl	$249, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L139
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movl	$250, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L139
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movl	$251, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L139
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L101
	movl	$252, %r8d
.L139:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movl	%ebx, %ecx
	movq	%rax, %r8
	jmp	.L138
.L101:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L127
	call	__stack_chk_fail@PLT
.L127:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4253:
	.size	_Z11setupDataCViiiPfPiPS_S1_, .-_Z11setupDataCViiiPfPiPS_S1_
	.section	.rodata.str1.1
.LC3:
	.string	"_Z13partitionDataiiiPiS_PfS_S0_S0_"
.LC4:
	.string	"_Z13createSVMDataiPiS_S_S_iPfS0_"
.LC5:
	.string	"_Z13separateClassiiPiPfS0_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4285:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13partitionDataiiiPiS_PfS_S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13createSVMDataiPiS_S_S_iPfS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13separateClassiiPiPfS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4285:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <vector>
#include <algorithm>
#include <stdio.h>

using namespace std;

#define BSIZE 256

#define CHECK(call)                                                            \
{                                                                              \
    const hipError_t error = call;                                            \
    if (error != hipSuccess)                                                  \
    {                                                                          \
        fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__);                 \
        fprintf(stderr, "code: %d, reason: %s\n", error,                       \
                hipGetErrorString(error));                                    \
        exit(1);                                                               \
    }                                                                          \
}

// rearrange the data by classes
__global__ void separateClass(int nPoints, int nDimension, int* devPointIdx, float* devTranData, float* devTranDataSortClass) {
	int pointIdx = blockIdx.x * BSIZE + threadIdx.x;

	if(pointIdx < nPoints) {
		int i;
		int inPos = pointIdx * nDimension;
		int outPos = devPointIdx[pointIdx] * nDimension;
		for(i = 0; i < nDimension; i++)
			devTranDataSortClass[outPos+i] = devTranData[inPos+i];
	}

}

// create dataArray in GPU
__global__ void createSVMData(int numClass, int* devClassDist, int* devClassAccuDist, int* devNPointsArray, int* devNPointsAccuArray, int nDimension, float* devDataArray, float* devTranDataSortClass) {
	int svmId = blockIdx.x;
	int classA = 0;
	while(svmId >= (classA+1)*(numClass-1)-(classA+1)*classA/2)
		classA ++;
	int classB = svmId - classA*(numClass-1) + classA*(classA-1)/2 + classA + 1;
	int pointId = threadIdx.x;

	while(pointId < devNPointsArray[svmId]) {
		int i;
		int inPos = 0;
		if(pointId >= devClassDist[classA])
			inPos = (devClassAccuDist[classB] + pointId - devClassDist[classA]) * nDimension;
		else
			inPos = (devClassAccuDist[classA] + pointId) * nDimension;

		int outPos = devNPointsAccuArray[svmId] * nDimension + pointId;
		for(i = 0; i < nDimension; i++)
			devDataArray[outPos+i*devNPointsArray[svmId]] = devTranDataSortClass[inPos+i];

		pointId += BSIZE;
	}

}


/**
 * Setup both dataArray and transposedDataArray for one-againse-one multi-class training
 * @param numSVM the number of SVMs for training, equals to category.size() * (category.size()-1) / 2
 * @param category stores the labels for different classes
 * @param classDist stores the class distribution for each class, where classDist[0] is the number of points in the original data set which has label category[0]
 * @param nPoints the number of points in the original data
 * @param nDimension the number of dimensions of the data points in the original data
 * @param transposedData the row major store of the original data
 * @param labels store the labels for the orignal data
 * @param nPointsArray the number of points for each SVM, where nPointsArray[svmId] = classDist[i] + classDist[j] and there is a one to one mapping between svmId and (i, j), given by svmId = i * (category.size()-1) - i*(i-1)/2 + j - i - 1. Please refer to createSVMData() for the detailed mapping;  
 * @param dataArray is used to store the output column major data for each SVM
 * @param transposedDataArray is used to store the output row major data for each SVM
 */
void setupData(int numSVM, vector<float> category, int* classDist, int nPoints, int nDimension, float* transposedData, float* labels, int* nPointsArray, float** dataArray, float** transposedDataArray) {
	int i;

	// 1. create transposed data sorted by classes
	int* classCount = (int*)calloc(category.size(), sizeof(int));
	int* pointIdx = (int*)malloc(sizeof(int)*nPoints);
	int* classAccuDist = (int*)malloc(sizeof(int)*category.size());
	classAccuDist[0] = 0;
	for(i = 1; i < category.size(); i++)
		classAccuDist[i] = classAccuDist[i-1] + classDist[i-1];

	for(i = 0; i < nPoints; i++) {
		int classIdx = find(category.begin(), category.end(), labels[i]) - category.begin();
		pointIdx[i] = classAccuDist[classIdx] + classCount[classIdx];
		classCount[classIdx] ++;
	}

	int* devPointIdx;
	CHECK(hipMalloc((int**)&devPointIdx, sizeof(int)*nPoints));
	CHECK(hipMemcpy(devPointIdx, pointIdx, sizeof(int)*nPoints, hipMemcpyHostToDevice));

	float* devTranData;
	CHECK(hipMalloc((float**)&devTranData, sizeof(float)*nPoints*nDimension));
	CHECK(hipMemcpy(devTranData, transposedData, sizeof(float)*nPoints*nDimension, hipMemcpyHostToDevice));

	float* devTranDataSortClass;
	CHECK(hipMalloc((float**)&devTranDataSortClass, sizeof(float)*nPoints*nDimension));

	int gridSize = (nPoints / BSIZE) + 1;
	// sort the transposed data by classes
	separateClass<<<gridSize,  BSIZE>>> (nPoints, nDimension, devPointIdx, devTranData, devTranDataSortClass);

	CHECK(hipFree(devPointIdx));
	CHECK(hipFree(devTranData));
	free(classCount);
	free(pointIdx);

	// 2. setup transposedDataArray
	float* transposedDataSortClass = (float*) malloc(sizeof(float)*nPoints*nDimension);
	CHECK(hipMemcpy(transposedDataSortClass, devTranDataSortClass, sizeof(float)*nPoints*nDimension, hipMemcpyDeviceToHost));

	int classA = 0;
	int classB = 1;
	// copy data to transposedDataArray
	for(i = 0; i < numSVM; i++) {
		memcpy(transposedDataArray[i], transposedDataSortClass+classAccuDist[classA]*nDimension, sizeof(float)*classDist[classA]*nDimension);
		memcpy(transposedDataArray[i]+classDist[classA]*nDimension, transposedDataSortClass+classAccuDist[classB]*nDimension, sizeof(float)*classDist[classB]*nDimension);

		if(classB == category.size()-1) {
			classA ++;
			classB = classA + 1;
		} else
			classB ++;
	}

	free(transposedDataSortClass);

	// 3. setup dataArray
	int* devNPointsArray;
	CHECK(hipMalloc((int**)&devNPointsArray, sizeof(int)*numSVM));
	CHECK(hipMemcpy(devNPointsArray, nPointsArray, sizeof(int)*numSVM, hipMemcpyHostToDevice));

	int* devClassDist;
	CHECK(hipMalloc((int**)&devClassDist, sizeof(int)*category.size()));
	CHECK(hipMemcpy(devClassDist, classDist, sizeof(int)*category.size(), hipMemcpyHostToDevice));

	int* devClassAccuDist;
	CHECK(hipMalloc((int**)&devClassAccuDist, sizeof(int)*category.size()));
	CHECK(hipMemcpy(devClassAccuDist, classAccuDist, sizeof(int)*category.size(), hipMemcpyHostToDevice));

	int* nPointsAccuArray = (int*)malloc(sizeof(int)*numSVM);
	nPointsAccuArray[0] = 0;
	for(i = 1; i < numSVM; i++) 
		nPointsAccuArray[i] = nPointsAccuArray[i-1] + nPointsArray[i-1];

	int* devNPointsAccuArray;
	CHECK(hipMalloc((int**)&devNPointsAccuArray, sizeof(int)*numSVM));
	CHECK(hipMemcpy(devNPointsAccuArray, nPointsAccuArray, sizeof(int)*numSVM, hipMemcpyHostToDevice));

	int totalPoints = nPointsAccuArray[numSVM-1]+nPointsArray[numSVM-1];
	float* devDataArray;
	CHECK(hipMalloc((float**)&devDataArray, sizeof(float)*totalPoints*nDimension));

	// create devDataArray
	createSVMData<<<numSVM, BSIZE>>>(category.size(), devClassDist, devClassAccuDist, devNPointsArray, devNPointsAccuArray, nDimension, devDataArray, devTranDataSortClass);

	// copy data to dataArray
	for(i = 0; i < numSVM; i++)
		CHECK(hipMemcpy(dataArray[i], devDataArray+nPointsAccuArray[i]*nDimension, sizeof(float)*nPointsArray[i]*nDimension, hipMemcpyDeviceToHost));

	// free pointers
	CHECK(hipFree(devClassDist));
	CHECK(hipFree(devClassAccuDist));
	CHECK(hipFree(devNPointsArray));
	CHECK(hipFree(devNPointsAccuArray));
	CHECK(hipFree(devDataArray));
	CHECK(hipFree(devTranDataSortClass));
	free(classAccuDist);
	free(nPointsAccuArray);
}

// randomly partition the data into folder parts
__global__ void partitionData(int folder, int nPoints, int nDimension, int* devDataPartitionSize, int* devDataPartitionAccuSize, float* devTranData, int* devPermutation, float* devDataPar, float* devTranDataPar) {
	int pointId = threadIdx.x;

	while(pointId < nPoints) {
		int inPos = devPermutation[pointId]*nDimension;
		int partId = pointId % folder;
		int partPointId = pointId / folder;
		int outPosData = devDataPartitionAccuSize[partId]*nDimension + partPointId;
		int outPosTranData = (devDataPartitionAccuSize[partId]+partPointId) * nDimension;
		int i;
		for(i = 0; i < nDimension; i++) {
			devDataPar[outPosData+i*devDataPartitionSize[partId]] = devTranData[inPos+i];
			devTranDataPar[outPosTranData+i] = devTranData[inPos+i];
		}

		pointId += BSIZE;
	}

}

void setupDataCV(int folder, int nPoints, int nDimension, float* transposedData, int* permutation, float** dataPartitionArray, float** dataTranPartitionArray) {
	int i;

	// dataPartitionSize stores sizes for each partition
	int* dataPartitionSize = (int*)malloc(sizeof(int)*folder);
	for(i = 0; i < folder; i++) {
		dataPartitionSize[i] = nPoints / folder;
		if(nPoints % folder != 0 && i < nPoints % folder)
			dataPartitionSize[i] ++;
	}

	int* dataPartitionAccuSize = (int*)malloc(sizeof(int)*folder);
	dataPartitionAccuSize[0] = 0;
	for(i = 1; i < folder; i++) {
		dataPartitionAccuSize[i] = dataPartitionAccuSize[i-1] + dataPartitionSize[i-1];
	}

	int* devDataPartitionSize;
	CHECK(hipMalloc((int**)&devDataPartitionSize, sizeof(int)*folder));
	CHECK(hipMemcpy(devDataPartitionSize, dataPartitionSize, sizeof(int)*folder, hipMemcpyHostToDevice));

	int* devDataPartitionAccuSize;
	CHECK(hipMalloc((int**)&devDataPartitionAccuSize, sizeof(int)*folder));
	CHECK(hipMemcpy(devDataPartitionAccuSize, dataPartitionAccuSize, sizeof(int)*folder, hipMemcpyHostToDevice));

	float* devTranData;
	CHECK(hipMalloc((float**)&devTranData, sizeof(float)*nPoints*nDimension));
	CHECK(hipMemcpy(devTranData, transposedData, sizeof(float)*nPoints*nDimension, hipMemcpyHostToDevice));

	int* devPermutation;
	CHECK(hipMalloc((int**)&devPermutation, sizeof(int)*nPoints));
	CHECK(hipMemcpy(devPermutation, permutation, sizeof(int)*nPoints, hipMemcpyHostToDevice));

	float* devDataPar;
	CHECK(hipMalloc((float**)&devDataPar, sizeof(float)*nPoints*nDimension));

	float* devTranDataPar;
	CHECK(hipMalloc((float**)&devTranDataPar, sizeof(float)*nPoints*nDimension));

	partitionData<<<1, BSIZE>>>(folder, nPoints, nDimension, devDataPartitionSize, devDataPartitionAccuSize, devTranData, devPermutation, devDataPar, devTranDataPar);

	for(i = 0; i < folder; i++) {
		CHECK(hipMemcpy(dataPartitionArray[i], devDataPar+dataPartitionAccuSize[i]*nDimension, sizeof(float)*dataPartitionSize[i]*nDimension, hipMemcpyDeviceToHost));
		CHECK(hipMemcpy(dataTranPartitionArray[i], devTranDataPar+dataPartitionAccuSize[i]*nDimension, sizeof(float)*dataPartitionSize[i]*nDimension, hipMemcpyDeviceToHost));
	}

	// free pointers
	free(dataPartitionSize);
	free(dataPartitionAccuSize);
	CHECK(hipFree(devDataPartitionSize));
	CHECK(hipFree(devDataPartitionAccuSize));
	CHECK(hipFree(devTranData));
	CHECK(hipFree(devPermutation));
	CHECK(hipFree(devDataPar));
	CHECK(hipFree(devTranDataPar));
}
	.text
	.file	"setupData.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z28__device_stub__separateClassiiPiPfS0_ # -- Begin function _Z28__device_stub__separateClassiiPiPfS0_
	.type	_Z28__device_stub__separateClassiiPiPfS0_,@function
_Z28__device_stub__separateClassiiPiPfS0_: # @_Z28__device_stub__separateClassiiPiPfS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13separateClassiiPiPfS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__separateClassiiPiPfS0_, .Lfunc_end0-_Z28__device_stub__separateClassiiPiPfS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__createSVMDataiPiS_S_S_iPfS0_ # -- Begin function _Z28__device_stub__createSVMDataiPiS_S_S_iPfS0_
	.type	_Z28__device_stub__createSVMDataiPiS_S_S_iPfS0_,@function
_Z28__device_stub__createSVMDataiPiS_S_S_iPfS0_: # @_Z28__device_stub__createSVMDataiPiS_S_S_iPfS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13createSVMDataiPiS_S_S_iPfS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z28__device_stub__createSVMDataiPiS_S_S_iPfS0_, .Lfunc_end1-_Z28__device_stub__createSVMDataiPiS_S_S_iPfS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z9setupDataiSt6vectorIfSaIfEEPiiiPfS3_S2_PS3_S4_ # -- Begin function _Z9setupDataiSt6vectorIfSaIfEEPiiiPfS3_S2_PS3_S4_
	.type	_Z9setupDataiSt6vectorIfSaIfEEPiiiPfS3_S2_PS3_S4_,@function
_Z9setupDataiSt6vectorIfSaIfEEPiiiPfS3_S2_PS3_S4_: # @_Z9setupDataiSt6vectorIfSaIfEEPiiiPfS3_S2_PS3_S4_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 144(%rsp)                  # 8-byte Spill
	movl	%r8d, 20(%rsp)                  # 4-byte Spill
	movl	%ecx, %r12d
	movq	%rdx, %r15
	movl	%edi, 44(%rsp)                  # 4-byte Spill
	movq	(%rsi), %r14
	movq	%rsi, 72(%rsp)                  # 8-byte Spill
	movq	8(%rsi), %rbx
	subq	%r14, %rbx
	movq	%rbx, %r13
	sarq	$2, %r13
	movl	$4, %esi
	movq	%r13, %rdi
	callq	calloc
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movslq	%r12d, %rdi
	shlq	$2, %rdi
	movq	%rdi, 64(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movl	$0, (%rax)
	cmpq	$2, %r13
	jb	.LBB2_3
# %bb.1:                                # %.lr.ph.preheader
	decq	%r13
	xorl	%edx, %edx
	xorl	%ecx, %ecx
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r15,%rdx,4), %ecx
	movl	%ecx, 4(%rax,%rdx,4)
	incq	%rdx
	cmpq	%rdx, %r13
	jne	.LBB2_2
.LBB2_3:                                # %.preheader259
	movq	%r15, 136(%rsp)                 # 8-byte Spill
	movq	%r12, (%rsp)                    # 8-byte Spill
	testl	%r12d, %r12d
	movq	%rax, %r15
	movq	72(%rsp), %rbx                  # 8-byte Reload
	movq	8(%rsp), %rbp                   # 8-byte Reload
	movq	48(%rsp), %r13                  # 8-byte Reload
	jle	.LBB2_6
# %bb.4:                                # %.lr.ph262.preheader
	movl	(%rsp), %eax                    # 4-byte Reload
	shlq	$2, %rax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	xorl	%r12d, %r12d
.LBB2_5:                                # %.lr.ph262
                                        # =>This Inner Loop Header: Depth=1
	movq	8(%rbx), %rsi
	movq	208(%rsp), %rax
	leaq	(%rax,%r12), %rdx
	movq	%r14, %rdi
	callq	_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPfSt6vectorIfSaIfEEEENS0_5__ops16_Iter_equals_valIKfEEET_SB_SB_T0_St26random_access_iterator_tag
	movq	(%rbx), %r14
	subq	%r14, %rax
	shlq	$30, %rax
	sarq	$30, %rax
	movl	(%r13,%rax), %ecx
	movl	(%r15,%rax), %edx
	addl	%ecx, %edx
	movl	%edx, (%rbp,%r12)
	incl	%ecx
	movl	%ecx, (%r13,%rax)
	addq	$4, %r12
	cmpq	%r12, 24(%rsp)                  # 8-byte Folded Reload
	jne	.LBB2_5
.LBB2_6:                                # %._crit_edge
	movq	%r15, %rbp
	leaq	128(%rsp), %rdi
	movq	64(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_7
# %bb.10:
	movq	%rbp, 32(%rsp)                  # 8-byte Spill
	movq	128(%rsp), %rdi
	movq	8(%rsp), %r12                   # 8-byte Reload
	movq	%r12, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	movq	48(%rsp), %rbp                  # 8-byte Reload
	jne	.LBB2_11
# %bb.12:
	movslq	20(%rsp), %r14                  # 4-byte Folded Reload
	imulq	%r14, %r15
	leaq	120(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_13
# %bb.15:
	movq	120(%rsp), %rdi
	movq	144(%rsp), %rsi                 # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	movl	44(%rsp), %ebx                  # 4-byte Reload
	jne	.LBB2_16
# %bb.17:
	leaq	56(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_18
# %bb.19:
	movabsq	$4294967296, %rax               # imm = 0x100000000
	movq	(%rsp), %r13                    # 8-byte Reload
	leal	255(%r13), %edi
	testl	%r13d, %r13d
	cmovnsl	%r13d, %edi
	sarl	$8, %edi
	incl	%edi
	btsq	$32, %rdi
	leaq	256(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_21
# %bb.20:
	movq	128(%rsp), %rdx
	movq	120(%rsp), %rcx
	movq	56(%rsp), %r8
	movl	%r13d, %edi
	movl	20(%rsp), %esi                  # 4-byte Reload
	callq	_Z28__device_stub__separateClassiiPiPfS0_
.LBB2_21:
	movq	128(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_22
# %bb.23:
	movq	120(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_24
# %bb.25:
	movq	%r14, (%rsp)                    # 8-byte Spill
	movq	%rbp, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	%r15, %rdi
	callq	malloc
	movq	56(%rsp), %rsi
	movq	%rax, %r14
	movq	%rax, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_31
# %bb.26:                               # %.preheader
	movl	%ebx, %eax
	testl	%ebx, %ebx
	movq	32(%rsp), %r8                   # 8-byte Reload
	movq	136(%rsp), %r13                 # 8-byte Reload
	movq	%r14, %rcx
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	jle	.LBB2_29
# %bb.27:                               # %.lr.ph266
	movq	(%rsp), %rdx                    # 8-byte Reload
	leaq	(,%rdx,4), %rdx
	movq	%rdx, 64(%rsp)                  # 8-byte Spill
	movl	$1, %r12d
	xorl	%r15d, %r15d
	xorl	%edx, %edx
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	movq	(%rsp), %rbx                    # 8-byte Reload
	movq	64(%rsp), %r14                  # 8-byte Reload
.LBB2_28:                               # =>This Inner Loop Header: Depth=1
	movq	%rdx, 48(%rsp)                  # 8-byte Spill
	movq	232(%rsp), %rax
	movq	(%rax,%r15,8), %rdi
	movl	%edx, %ebp
	movslq	(%r8,%rbp,4), %rax
	imulq	%rbx, %rax
	leaq	(%rcx,%rax,4), %rsi
	movslq	(%r13,%rbp,4), %rdx
	imulq	%r14, %rdx
	callq	memcpy@PLT
	movslq	(%r13,%rbp,4), %rdi
	imulq	%rbx, %rdi
	shlq	$2, %rdi
	movq	232(%rsp), %rax
	addq	(%rax,%r15,8), %rdi
	movslq	%r12d, %rbp
	movq	32(%rsp), %rax                  # 8-byte Reload
	movslq	(%rax,%rbp,4), %rax
	imulq	%rbx, %rax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %rsi
	movslq	(%r13,%rbp,4), %rdx
	imulq	%r14, %rdx
	callq	memcpy@PLT
	movq	72(%rsp), %rsi                  # 8-byte Reload
	movq	8(%rsi), %rax
	subq	(%rsi), %rax
	sarq	$2, %rax
	decq	%rax
	movq	48(%rsp), %rdi                  # 8-byte Reload
	leal	2(%rdi), %ecx
	leal	1(%rbp), %r12d
	xorl	%edx, %edx
	cmpq	%rbp, %rax
	movq	24(%rsp), %rax                  # 8-byte Reload
	sete	%dl
	cmovel	%ecx, %r12d
	movq	8(%rsp), %rcx                   # 8-byte Reload
	addl	%edi, %edx
	incq	%r15
                                        # kill: def $edx killed $edx def $rdx
	movq	32(%rsp), %r8                   # 8-byte Reload
	cmpq	%r15, %rax
	jne	.LBB2_28
.LBB2_29:                               # %._crit_edge267
	movq	%rcx, %rdi
	callq	free
	movl	44(%rsp), %r14d                 # 4-byte Reload
	movslq	%r14d, %rbx
	leaq	(,%rbx,4), %rbp
	leaq	112(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_30
# %bb.33:
	movq	216(%rsp), %r13
	movq	112(%rsp), %rdi
	movq	%r13, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	movq	72(%rsp), %r15                  # 8-byte Reload
	jne	.LBB2_34
# %bb.36:
	movq	%rbx, 8(%rsp)                   # 8-byte Spill
	movq	8(%r15), %rsi
	subq	(%r15), %rsi
	leaq	104(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	movq	32(%rsp), %rbx                  # 8-byte Reload
	jne	.LBB2_37
# %bb.38:
	movq	104(%rsp), %rdi
	movq	8(%r15), %rdx
	subq	(%r15), %rdx
	movq	136(%rsp), %rsi                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_39
# %bb.40:
	movq	8(%r15), %rsi
	subq	(%r15), %rsi
	leaq	96(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_41
# %bb.42:
	movq	96(%rsp), %rdi
	movq	8(%r15), %rdx
	subq	(%r15), %rdx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_43
# %bb.44:
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r12
	movl	$0, (%rax)
	cmpl	$2, %r14d
	movq	24(%rsp), %rbx                  # 8-byte Reload
	jl	.LBB2_47
# %bb.45:                               # %.lr.ph270.preheader
	leaq	-1(%rbx), %rax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB2_46:                               # %.lr.ph270
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r13,%rcx,4), %edx
	movl	%edx, 4(%r12,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB2_46
.LBB2_47:                               # %._crit_edge271
	leaq	88(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_48
# %bb.49:
	movq	88(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_50
# %bb.51:
	movq	8(%rsp), %rcx                   # 8-byte Reload
	movslq	-4(%r12,%rcx,4), %rax
	movslq	-4(%r13,%rcx,4), %rsi
	addq	%rax, %rsi
	movq	(%rsp), %rax                    # 8-byte Reload
	leaq	(,%rax,4), %r13
	imulq	%r13, %rsi
	leaq	80(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_52
# %bb.53:
	movq	%rbx, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	%rdx, %rdi
	addq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_55
# %bb.54:
	movq	8(%r15), %rdi
	subq	(%r15), %rdi
	shrq	$2, %rdi
	movq	104(%rsp), %rsi
	movq	96(%rsp), %rdx
	movq	112(%rsp), %rcx
	movq	88(%rsp), %r8
                                        # kill: def $edi killed $edi killed $rdi
	movl	20(%rsp), %r9d                  # 4-byte Reload
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	88(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__createSVMDataiPiS_S_S_iPfS0_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB2_55:
	testl	%r14d, %r14d
	movq	(%rsp), %r15                    # 8-byte Reload
	jle	.LBB2_60
# %bb.56:                               # %.lr.ph274.preheader
	movq	224(%rsp), %rbx
	xorl	%r14d, %r14d
.LBB2_58:                               # %.lr.ph274
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rbx,%r14,8), %rdi
	movslq	(%r12,%r14,4), %rsi
	imulq	%r15, %rsi
	shlq	$2, %rsi
	addq	80(%rsp), %rsi
	movq	216(%rsp), %rax
	movslq	(%rax,%r14,4), %rdx
	imulq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_59
# %bb.57:                               #   in Loop: Header=BB2_58 Depth=1
	incq	%r14
	cmpq	%r14, 24(%rsp)                  # 8-byte Folded Reload
	jne	.LBB2_58
.LBB2_60:                               # %._crit_edge275
	movq	104(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_61
# %bb.62:
	movq	96(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	movq	32(%rsp), %rbx                  # 8-byte Reload
	jne	.LBB2_63
# %bb.64:
	movq	112(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_65
# %bb.66:
	movq	88(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_67
# %bb.68:
	movq	80(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_69
# %bb.70:
	movq	56(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_71
# %bb.72:
	movq	%rbx, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_59:
	.cfi_def_cfa_offset 208
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$166, %ecx
.LBB2_32:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rbx
	movl	%ebp, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movl	%ebp, %edx
.LBB2_9:
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.LBB2_7:
	movl	%eax, %r14d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$96, %ecx
	jmp	.LBB2_8
.LBB2_11:
	movl	%eax, %r14d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$97, %ecx
.LBB2_8:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rbx
	movl	%r14d, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movl	%r14d, %edx
	jmp	.LBB2_9
.LBB2_13:
	movl	%eax, %r13d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$100, %ecx
	jmp	.LBB2_14
.LBB2_16:
	movl	%eax, %r13d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$101, %ecx
	jmp	.LBB2_14
.LBB2_18:
	movl	%eax, %r13d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$104, %ecx
	jmp	.LBB2_14
.LBB2_22:
	movl	%eax, %r13d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$110, %ecx
	jmp	.LBB2_14
.LBB2_24:
	movl	%eax, %r13d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$111, %ecx
	jmp	.LBB2_14
.LBB2_31:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$117, %ecx
	jmp	.LBB2_32
.LBB2_30:
	movl	%eax, %r13d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$137, %ecx
.LBB2_14:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rbx
	movl	%r13d, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movl	%r13d, %edx
	jmp	.LBB2_9
.LBB2_34:
	movl	%eax, %r12d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$138, %ecx
	jmp	.LBB2_35
.LBB2_37:
	movl	%eax, %r12d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$141, %ecx
	jmp	.LBB2_35
.LBB2_39:
	movl	%eax, %r12d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$142, %ecx
	jmp	.LBB2_35
.LBB2_41:
	movl	%eax, %r12d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$145, %ecx
	jmp	.LBB2_35
.LBB2_43:
	movl	%eax, %r12d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$146, %ecx
.LBB2_35:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rbx
	movl	%r12d, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movl	%r12d, %edx
	jmp	.LBB2_9
.LBB2_48:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$154, %ecx
	movl	%eax, %ebp
	jmp	.LBB2_32
.LBB2_50:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$155, %ecx
	jmp	.LBB2_32
.LBB2_52:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$159, %ecx
	jmp	.LBB2_32
.LBB2_61:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$169, %ecx
	jmp	.LBB2_32
.LBB2_63:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$170, %ecx
	jmp	.LBB2_32
.LBB2_65:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$171, %ecx
	jmp	.LBB2_32
.LBB2_67:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$172, %ecx
	jmp	.LBB2_32
.LBB2_69:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$173, %ecx
	jmp	.LBB2_32
.LBB2_71:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$174, %ecx
	jmp	.LBB2_32
.Lfunc_end2:
	.size	_Z9setupDataiSt6vectorIfSaIfEEPiiiPfS3_S2_PS3_S4_, .Lfunc_end2-_Z9setupDataiSt6vectorIfSaIfEEPiiiPfS3_S2_PS3_S4_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__partitionDataiiiPiS_PfS_S0_S0_ # -- Begin function _Z28__device_stub__partitionDataiiiPiS_PfS_S0_S0_
	.type	_Z28__device_stub__partitionDataiiiPiS_PfS_S0_S0_,@function
_Z28__device_stub__partitionDataiiiPiS_PfS_S0_S0_: # @_Z28__device_stub__partitionDataiiiPiS_PfS_S0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	56(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13partitionDataiiiPiS_PfS_S0_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z28__device_stub__partitionDataiiiPiS_PfS_S0_S0_, .Lfunc_end3-_Z28__device_stub__partitionDataiiiPiS_PfS_S0_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z11setupDataCViiiPfPiPS_S1_    # -- Begin function _Z11setupDataCViiiPfPiPS_S1_
	.type	_Z11setupDataCViiiPfPiPS_S1_,@function
_Z11setupDataCViiiPfPiPS_S1_:           # @_Z11setupDataCViiiPfPiPS_S1_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 80(%rsp)                   # 8-byte Spill
	movq	%r8, 56(%rsp)                   # 8-byte Spill
	movq	%rcx, 64(%rsp)                  # 8-byte Spill
	movl	%edx, 4(%rsp)                   # 4-byte Spill
	movl	%esi, %r15d
	movl	%edi, %r13d
	movslq	%edi, %rbx
	leaq	(,%rbx,4), %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r14
	movl	%r13d, %ebp
	testl	%ebx, %ebx
	movl	%r15d, (%rsp)                   # 4-byte Spill
	jle	.LBB4_1
# %bb.2:                                # %.lr.ph
	movl	%r15d, %eax
	cltd
	idivl	%r13d
	movslq	%edx, %rcx
	xorl	%edx, %edx
	movl	%r13d, %ebx
.LBB4_3:                                # =>This Inner Loop Header: Depth=1
	xorl	%esi, %esi
	cmpq	%rcx, %rdx
	setl	%sil
	addl	%eax, %esi
	movl	%esi, (%r14,%rdx,4)
	incq	%rdx
	cmpq	%rdx, %rbp
	jne	.LBB4_3
# %bb.4:                                # %._crit_edge
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r15
	movl	$0, (%rax)
	cmpl	$1, %ebx
	je	.LBB4_7
# %bb.5:                                # %.lr.ph171.preheader
	movl	$1, %eax
	xorl	%ecx, %ecx
.LBB4_6:                                # %.lr.ph171
                                        # =>This Inner Loop Header: Depth=1
	addl	-4(%r14,%rax,4), %ecx
	movl	%ecx, (%r15,%rax,4)
	incq	%rax
	cmpq	%rax, %rbp
	jne	.LBB4_6
	jmp	.LBB4_7
.LBB4_1:                                # %._crit_edge.thread
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r15
	movl	$0, (%rax)
	movl	%r13d, %ebx
.LBB4_7:                                # %._crit_edge172
	leaq	48(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_8
# %bb.11:
	movq	48(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_12
# %bb.13:
	leaq	40(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_14
# %bb.15:
	movq	%rbp, 72(%rsp)                  # 8-byte Spill
	movq	40(%rsp), %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_16
# %bb.18:
	movslq	(%rsp), %r12                    # 4-byte Folded Reload
	shlq	$2, %r12
	movslq	4(%rsp), %r13                   # 4-byte Folded Reload
	movq	%r12, %rbp
	imulq	%r13, %rbp
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_19
# %bb.22:
	movq	32(%rsp), %rdi
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_23
# %bb.24:
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_25
# %bb.26:
	movq	24(%rsp), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_27
# %bb.28:
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_29
# %bb.30:
	leaq	8(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_31
# %bb.32:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	255(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_34
# %bb.33:
	movq	48(%rsp), %rcx
	movq	40(%rsp), %r8
	movq	32(%rsp), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	%ebx, %edi
	movl	8(%rsp), %esi                   # 4-byte Reload
	movl	12(%rsp), %edx                  # 4-byte Reload
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__partitionDataiiiPiS_PfS_S0_S0_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB4_34:
	testl	%ebx, %ebx
	jle	.LBB4_41
# %bb.35:                               # %.lr.ph175
	leaq	(,%r13,4), %r12
	xorl	%ebx, %ebx
.LBB4_37:                               # =>This Inner Loop Header: Depth=1
	movq	80(%rsp), %rax                  # 8-byte Reload
	movq	(%rax,%rbx,8), %rdi
	movslq	(%r15,%rbx,4), %rsi
	imulq	%r13, %rsi
	shlq	$2, %rsi
	addq	16(%rsp), %rsi
	movslq	(%r14,%rbx,4), %rdx
	imulq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_38
# %bb.39:                               #   in Loop: Header=BB4_37 Depth=1
	movq	144(%rsp), %rax
	movq	(%rax,%rbx,8), %rdi
	movslq	(%r15,%rbx,4), %rsi
	imulq	%r13, %rsi
	shlq	$2, %rsi
	addq	8(%rsp), %rsi
	movslq	(%r14,%rbx,4), %rdx
	imulq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_40
# %bb.36:                               #   in Loop: Header=BB4_37 Depth=1
	incq	%rbx
	cmpq	%rbx, 72(%rsp)                  # 8-byte Folded Reload
	jne	.LBB4_37
.LBB4_41:                               # %._crit_edge176
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	48(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_42
# %bb.44:
	movq	40(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_45
# %bb.46:
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_47
# %bb.48:
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_49
# %bb.50:
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_51
# %bb.52:
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_53
# %bb.54:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_40:
	.cfi_def_cfa_offset 144
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$243, %ecx
	jmp	.LBB4_21
.LBB4_38:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$242, %ecx
.LBB4_21:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rbx
	movl	%ebp, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movl	%ebp, %edx
.LBB4_10:
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.LBB4_8:
	movl	%eax, %r13d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$218, %ecx
	jmp	.LBB4_9
.LBB4_12:
	movl	%eax, %r13d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$219, %ecx
	jmp	.LBB4_9
.LBB4_14:
	movl	%eax, %r13d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$222, %ecx
.LBB4_9:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rbx
	movl	%r13d, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movl	%r13d, %edx
	jmp	.LBB4_10
.LBB4_16:
	movl	%eax, %r12d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$223, %ecx
	jmp	.LBB4_17
.LBB4_19:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$226, %ecx
	jmp	.LBB4_20
.LBB4_23:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$227, %ecx
	jmp	.LBB4_20
.LBB4_25:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$230, %ecx
.LBB4_20:
	movl	%eax, %ebp
	jmp	.LBB4_21
.LBB4_27:
	movl	%eax, %r12d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$231, %ecx
	jmp	.LBB4_17
.LBB4_29:
	movl	%eax, %r12d
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$234, %ecx
.LBB4_17:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rbx
	movl	%r12d, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movl	%r12d, %edx
	jmp	.LBB4_10
.LBB4_31:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$237, %ecx
	jmp	.LBB4_21
.LBB4_42:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$249, %ecx
	jmp	.LBB4_43
.LBB4_45:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$250, %ecx
	jmp	.LBB4_43
.LBB4_47:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$251, %ecx
	jmp	.LBB4_43
.LBB4_49:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$252, %ecx
	jmp	.LBB4_43
.LBB4_51:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$253, %ecx
	jmp	.LBB4_43
.LBB4_53:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$254, %ecx
.LBB4_43:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	jmp	.LBB4_10
.Lfunc_end4:
	.size	_Z11setupDataCViiiPfPiPS_S1_, .Lfunc_end4-_Z11setupDataCViiiPfPiPS_S1_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPfSt6vectorIfSaIfEEEENS0_5__ops16_Iter_equals_valIKfEEET_SB_SB_T0_St26random_access_iterator_tag,"axG",@progbits,_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPfSt6vectorIfSaIfEEEENS0_5__ops16_Iter_equals_valIKfEEET_SB_SB_T0_St26random_access_iterator_tag,comdat
	.weak	_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPfSt6vectorIfSaIfEEEENS0_5__ops16_Iter_equals_valIKfEEET_SB_SB_T0_St26random_access_iterator_tag # -- Begin function _ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPfSt6vectorIfSaIfEEEENS0_5__ops16_Iter_equals_valIKfEEET_SB_SB_T0_St26random_access_iterator_tag
	.type	_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPfSt6vectorIfSaIfEEEENS0_5__ops16_Iter_equals_valIKfEEET_SB_SB_T0_St26random_access_iterator_tag,@function
_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPfSt6vectorIfSaIfEEEENS0_5__ops16_Iter_equals_valIKfEEET_SB_SB_T0_St26random_access_iterator_tag: # @_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPfSt6vectorIfSaIfEEEENS0_5__ops16_Iter_equals_valIKfEEET_SB_SB_T0_St26random_access_iterator_tag
	.cfi_startproc
# %bb.0:
	movq	%rdi, %rax
	movq	%rsi, %r8
	subq	%rdi, %r8
	movq	%r8, %rdi
	sarq	$4, %rdi
	testq	%rdi, %rdi
	jle	.LBB5_1
# %bb.2:                                # %.lr.ph
	movss	(%rdx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	andq	$-16, %r8
	movq	%r8, %rcx
	addq	%rax, %rcx
	incq	%rdi
	addq	$8, %rax
.LBB5_3:                                # =>This Inner Loop Header: Depth=1
	movss	-8(%rax), %xmm1                 # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jne	.LBB5_4
	jnp	.LBB5_23
.LBB5_4:                                #   in Loop: Header=BB5_3 Depth=1
	movss	-4(%rax), %xmm1                 # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jne	.LBB5_5
	jnp	.LBB5_21
.LBB5_5:                                #   in Loop: Header=BB5_3 Depth=1
	movss	(%rax), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jne	.LBB5_6
	jnp	.LBB5_24
.LBB5_6:                                #   in Loop: Header=BB5_3 Depth=1
	movss	4(%rax), %xmm1                  # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jne	.LBB5_7
	jnp	.LBB5_22
.LBB5_7:                                #   in Loop: Header=BB5_3 Depth=1
	decq	%rdi
	addq	$16, %rax
	cmpq	$1, %rdi
	jg	.LBB5_3
# %bb.8:                                # %._crit_edge.loopexit
	movq	%rsi, %r8
	subq	%rcx, %r8
	jmp	.LBB5_9
.LBB5_1:
	movq	%rax, %rcx
.LBB5_9:                                # %._crit_edge
	sarq	$2, %r8
	cmpq	$3, %r8
	je	.LBB5_14
# %bb.10:                               # %._crit_edge
	cmpq	$2, %r8
	je	.LBB5_13
# %bb.11:                               # %._crit_edge
	cmpq	$1, %r8
	jne	.LBB5_20
# %bb.12:                               # %._crit_edge._crit_edge57
	movss	(%rdx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	jmp	.LBB5_19
.LBB5_23:                               # %.loopexit.loopexit
	addq	$-8, %rax
	retq
.LBB5_21:                               # %.loopexit.loopexit.split.loop.exit
	addq	$-4, %rax
	retq
.LBB5_13:                               # %._crit_edge._crit_edge
	movss	(%rdx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	jmp	.LBB5_17
.LBB5_14:
	movss	(%rcx), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	movss	(%rdx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jne	.LBB5_16
	jnp	.LBB5_15
.LBB5_16:
	addq	$4, %rcx
.LBB5_17:
	movss	(%rcx), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jne	.LBB5_18
	jp	.LBB5_18
.LBB5_15:
	movq	%rcx, %rax
	retq
.LBB5_22:                               # %.loopexit.loopexit.split.loop.exit64
	addq	$4, %rax
	retq
.LBB5_18:
	addq	$4, %rcx
.LBB5_19:
	movss	(%rcx), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	movq	%rcx, %rax
	jne	.LBB5_20
	jp	.LBB5_20
.LBB5_24:                               # %.loopexit
	retq
.LBB5_20:
	movq	%rsi, %rax
	retq
.Lfunc_end5:
	.size	_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPfSt6vectorIfSaIfEEEENS0_5__ops16_Iter_equals_valIKfEEET_SB_SB_T0_St26random_access_iterator_tag, .Lfunc_end5-_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPfSt6vectorIfSaIfEEEENS0_5__ops16_Iter_equals_valIKfEEET_SB_SB_T0_St26random_access_iterator_tag
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13separateClassiiPiPfS0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13createSVMDataiPiS_S_S_iPfS0_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13partitionDataiiiPiS_PfS_S0_S0_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13separateClassiiPiPfS0_,@object # @_Z13separateClassiiPiPfS0_
	.section	.rodata,"a",@progbits
	.globl	_Z13separateClassiiPiPfS0_
	.p2align	3, 0x0
_Z13separateClassiiPiPfS0_:
	.quad	_Z28__device_stub__separateClassiiPiPfS0_
	.size	_Z13separateClassiiPiPfS0_, 8

	.type	_Z13createSVMDataiPiS_S_S_iPfS0_,@object # @_Z13createSVMDataiPiS_S_S_iPfS0_
	.globl	_Z13createSVMDataiPiS_S_S_iPfS0_
	.p2align	3, 0x0
_Z13createSVMDataiPiS_S_S_iPfS0_:
	.quad	_Z28__device_stub__createSVMDataiPiS_S_S_iPfS0_
	.size	_Z13createSVMDataiPiS_S_S_iPfS0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error: %s:%d, "
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/Archonsh/GPU-Train-SVM/master/example/common/setupData.hip"
	.size	.L.str.1, 121

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"code: %d, reason: %s\n"
	.size	.L.str.2, 22

	.type	_Z13partitionDataiiiPiS_PfS_S0_S0_,@object # @_Z13partitionDataiiiPiS_PfS_S0_S0_
	.section	.rodata,"a",@progbits
	.globl	_Z13partitionDataiiiPiS_PfS_S0_S0_
	.p2align	3, 0x0
_Z13partitionDataiiiPiS_PfS_S0_S0_:
	.quad	_Z28__device_stub__partitionDataiiiPiS_PfS_S0_S0_
	.size	_Z13partitionDataiiiPiS_PfS_S0_S0_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z13separateClassiiPiPfS0_"
	.size	.L__unnamed_1, 27

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13createSVMDataiPiS_S_S_iPfS0_"
	.size	.L__unnamed_2, 33

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z13partitionDataiiiPiS_PfS_S0_S0_"
	.size	.L__unnamed_3, 35

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__separateClassiiPiPfS0_
	.addrsig_sym _Z28__device_stub__createSVMDataiPiS_S_S_iPfS0_
	.addrsig_sym _Z28__device_stub__partitionDataiiiPiS_PfS_S0_S0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13separateClassiiPiPfS0_
	.addrsig_sym _Z13createSVMDataiPiS_S_S_iPfS0_
	.addrsig_sym _Z13partitionDataiiiPiS_PfS_S0_S0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13separateClassiiPiPfS0_ ; -- Begin function _Z13separateClassiiPiPfS0_
	.globl	_Z13separateClassiiPiPfS0_
	.p2align	8
	.type	_Z13separateClassiiPiPfS0_,@function
_Z13separateClassiiPiPfS0_:             ; @_Z13separateClassiiPiPfS0_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x0
	v_lshl_add_u32 v0, s15, 8, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_4
; %bb.1:
	s_cmp_lt_i32 s3, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_load_b128 s[4:7], s[0:1], 0x8
	v_ashrrev_i32_e32 v1, 31, v0
	s_load_b64 s[0:1], s[0:1], 0x18
	v_mul_lo_u32 v3, v0, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_ashrrev_i32_e32 v4, 31, v3
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v1, v1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v4, v[2:3], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v4, off
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_cbranch_scc1 .LBB0_3
.LBB0_4:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13separateClassiiPiPfS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13separateClassiiPiPfS0_, .Lfunc_end0-_Z13separateClassiiPiPfS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 256
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13createSVMDataiPiS_S_S_iPfS0_ ; -- Begin function _Z13createSVMDataiPiS_S_S_iPfS0_
	.globl	_Z13createSVMDataiPiS_S_S_iPfS0_
	.p2align	8
	.type	_Z13createSVMDataiPiS_S_S_iPfS0_,@function
_Z13createSVMDataiPiS_S_S_iPfS0_:       ; @_Z13createSVMDataiPiS_S_S_iPfS0_
; %bb.0:
	s_load_b32 s13, s[0:1], 0x0
	s_mov_b32 s2, s15
	s_mov_b32 s12, -1
	s_mov_b32 s3, 0
	s_mov_b32 s5, 0
	s_mov_b32 s4, 0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s13, s13, -1
.LBB1_1:                                ; =>This Inner Loop Header: Depth=1
	s_add_i32 s3, s3, s5
	s_add_i32 s4, s4, s13
	s_lshr_b32 s6, s3, 1
	s_mov_b32 s16, s12
	s_sub_i32 s6, s4, s6
	s_add_i32 s5, s5, 2
	s_add_i32 s12, s12, 1
	s_cmp_ge_i32 s2, s6
	s_cbranch_scc1 .LBB1_1
; %bb.2:
	s_load_b256 s[4:11], s[0:1], 0x8
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[14:15], s[2:3], 2
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	s_add_u32 s8, s8, s14
	s_addc_u32 s9, s9, s15
	s_load_b32 s8, s[8:9], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s8, v0
	s_cbranch_execz .LBB1_12
; %bb.3:                                ; %.lr.ph59
	s_add_i32 s3, s16, 2
	s_lshl_b32 s9, s12, 1
	s_mul_i32 s3, s3, s12
	s_add_i32 s2, s12, s2
	s_sub_i32 s3, s3, s9
	s_mul_i32 s9, s12, s13
	s_lshr_b32 s16, s3, 31
	s_mov_b32 s13, 0
	s_add_i32 s3, s3, s16
	s_sub_i32 s9, s2, s9
	s_ashr_i32 s16, s3, 1
	s_lshl_b64 s[2:3], s[12:13], 2
	s_add_i32 s16, s9, s16
	s_add_u32 s18, s4, s2
	s_addc_u32 s19, s5, s3
	s_ashr_i32 s17, s16, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[4:5], s[16:17], 2
	s_add_u32 s4, s6, s4
	s_addc_u32 s5, s7, s5
	s_add_u32 s6, s6, s2
	s_addc_u32 s7, s7, s3
	s_add_u32 s2, s10, s14
	s_addc_u32 s3, s11, s15
	s_load_b32 s12, s[0:1], 0x28
	s_load_b32 s9, s[2:3], 0x0
	s_load_b128 s[0:3], s[0:1], 0x30
	s_load_b32 s14, s[18:19], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s12, 0
	v_mad_u64_u32 v[1:2], null, s9, s12, v[0:1]
	s_cselect_b32 s15, -1, 0
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[8:9], 2
.LBB1_4:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_10 Depth 2
	s_mov_b32 s9, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_le_i32_e64 s14, v0
	s_xor_b32 s9, exec_lo, s9
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_4 Depth=1
	s_load_b32 s16, s[4:5], 0x4
	v_subrev_nc_u32_e32 v2, s14, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v2, s16, v2
.LBB1_6:                                ; %Flow98
                                        ;   in Loop: Header=BB1_4 Depth=1
	s_and_not1_saveexec_b32 s9, s9
	s_cbranch_execz .LBB1_8
; %bb.7:                                ;   in Loop: Header=BB1_4 Depth=1
	s_load_b32 s16, s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, s16, v0
.LBB1_8:                                ;   in Loop: Header=BB1_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s15
	s_cbranch_vccnz .LBB1_11
; %bb.9:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB1_4 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v2, s12
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s9, s12
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_add_co_u32 v2, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v8, vcc_lo
.LBB1_10:                               ; %.lr.ph
                                        ;   Parent Loop BB1_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v6, v[4:5], off
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_add_i32 s9, s9, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s9, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v6, off
	v_add_co_u32 v2, vcc_lo, v2, s10
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_cbranch_scc1 .LBB1_10
.LBB1_11:                               ; %._crit_edge
                                        ;   in Loop: Header=BB1_4 Depth=1
	v_add_nc_u32_e32 v0, 0x100, v0
	v_add_nc_u32_e32 v1, 0x100, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s8, v0
	s_or_b32 s13, vcc_lo, s13
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_4
.LBB1_12:                               ; %._crit_edge60
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13createSVMDataiPiS_S_S_iPfS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 64
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13createSVMDataiPiS_S_S_iPfS0_, .Lfunc_end1-_Z13createSVMDataiPiS_S_S_iPfS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 560
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13partitionDataiiiPiS_PfS_S0_S0_ ; -- Begin function _Z13partitionDataiiiPiS_PfS_S0_S0_
	.globl	_Z13partitionDataiiiPiS_PfS_S0_S0_
	.p2align	8
	.type	_Z13partitionDataiiiPiS_PfS_S0_S0_,@function
_Z13partitionDataiiiPiS_PfS_S0_S0_:     ; @_Z13partitionDataiiiPiS_PfS_S0_S0_
; %bb.0:
	s_load_b128 s[12:15], s[0:1], 0x0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s13, v0
	s_cbranch_execz .LBB2_6
; %bb.1:                                ; %.lr.ph44
	s_cmp_gt_i32 s14, 0
	s_mov_b32 s18, 0
	s_cselect_b32 s15, -1, 0
	s_ashr_i32 s16, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s12, s16
	s_xor_b32 s17, s2, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s17
	s_sub_i32 s2, 0, s17
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_mul_lo_u32 v2, s2, v1
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v1, v2
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v8, v1, v2
.LBB2_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_4 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s15
	s_cbranch_vccnz .LBB2_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v2, v0, v8
	v_lshlrev_b64 v[9:10], 2, v[0:1]
	s_mov_b32 s19, s14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v2, s17
	v_sub_nc_u32_e32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s17, v3
	v_cmp_le_u32_e32 vcc_lo, s17, v3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_add_nc_u32 v4, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s17, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, v1 :: v_dual_add_nc_u32 v4, 1, v2
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s16, v2
	v_subrev_nc_u32_e32 v4, s16, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, v4, s12
	v_sub_nc_u32_e32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v12, v[5:6], off
	v_add_co_u32 v5, vcc_lo, s10, v9
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v10, vcc_lo
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v5, v[5:6], off
	global_load_b32 v9, v[2:3], off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v2, v12, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, s14
	s_waitcnt vmcnt(1)
	v_mul_lo_u32 v5, v5, s14
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	v_mad_u64_u32 v[2:3], null, v12, s14, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_co_u32 v4, vcc_lo, s2, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v11, vcc_lo
	v_add_co_u32 v6, vcc_lo, s8, v6
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
.LBB2_4:                                ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v12, v[6:7], off
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_co_u32 v6, vcc_lo, v6, 4
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v2, v2, v9
	s_add_i32 s19, s19, -1
	s_cmp_lg_u32 s19, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, s0, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v11, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[10:11], v12, off
	global_store_b32 v[4:5], v12, off
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_cbranch_scc1 .LBB2_4
.LBB2_5:                                ; %._crit_edge
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_add_nc_u32_e32 v0, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s13, v0
	s_or_b32 s18, vcc_lo, s18
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB2_2
.LBB2_6:                                ; %._crit_edge45
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13partitionDataiiiPiS_PfS_S0_S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 64
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z13partitionDataiiiPiS_PfS_S0_S0_, .Lfunc_end2-_Z13partitionDataiiiPiS_PfS_S0_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 592
; NumSgprs: 22
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13separateClassiiPiPfS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13separateClassiiPiPfS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 64
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13createSVMDataiPiS_S_S_iPfS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z13createSVMDataiPiS_S_S_iPfS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 64
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13partitionDataiiiPiS_PfS_S0_S0_
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z13partitionDataiiiPiS_PfS_S0_S0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
