//=============================================================================================================
/**
* @file     rapmusic_kernel.cu
* @author   Christoph Dinh <christoph.dinh@live.de>;
* @version  1.0
* @date     March, 2011
*
* @section  LICENSE
*
* Copyright (C) 2011 Christoph Dinh. All rights reserved.
*
* No part of this program may be photocopied, reproduced,
* or translated to another program language without the
* prior written consent of the author.
*
*
* @brief    ToDo Documentation.. 
*
*/

//*************************************************************************************************************
//=============================================================================================================
// CUDA INCLUDES
//=============================================================================================================

#include "../include/rapmusic_kernel.cuh"
#include "../include/cusvd.cuh"
#include "../include/cuhelpers.cuh"


//*************************************************************************************************************
//=============================================================================================================
// STL INCLUDES
//=============================================================================================================


#define SHDEBUG


//*************************************************************************************************************
//=============================================================================================================
// DEFINE NAMESPACE HPCLib
//=============================================================================================================

namespace HPCLib
{


//*************************************************************************************************************
//=============================================================================================================
// Kernels and Device Functions
//=============================================================================================================

__device__ void cuGetPointPair( const int p_iPoints,
                                const int p_iCurIdx,
                                int *p_pIdx1, int *p_pIdx2)
{
    int ii = p_iPoints*(p_iPoints+1)/2-1-p_iCurIdx;
    int K = (int)floor((sqrt((double)(8*ii+1))-1)/2);
    
    *p_pIdx1 = p_iPoints-1-K;

    *p_pIdx2 = (p_iCurIdx-p_iPoints*(p_iPoints+1)/2 + (K+1)*(K+2)/2)+(*p_pIdx1);
}


//*************************************************************************************************************

__global__ void cuCalcPairCombinations( int p_iNumPoints,
                                        int p_iNumCombinations,
                                        int* p_pPairIdxCombinations)
{
    int t_iCombIdx = threadIdx.x + blockIdx.x * blockDim.x;

    int *t_pIdx1 = new int;
    int *t_pIdx2 = new int;

    while (t_iCombIdx < p_iNumCombinations) {

        cuGetPointPair(p_iNumPoints, t_iCombIdx, t_pIdx1, t_pIdx2);

        p_pPairIdxCombinations[2*t_iCombIdx] = *t_pIdx1;
        p_pPairIdxCombinations[2*t_iCombIdx+1] = *t_pIdx2;

        t_iCombIdx += gridDim.x*blockDim.x;
    }

    delete t_pIdx2;
    delete t_pIdx1;
}


//*************************************************************************************************************

__global__ void cuCalcU_B(  float* p_pMatProj_Phi_s,
                            int p_iProj_Phi_sRows,
                            int p_iProj_Phi_sCols,
                            float* p_pMatU_B,
                            int* p_pRank)
{
    int t_iSizeProj_Phi_sMat = p_iProj_Phi_sRows * p_iProj_Phi_sCols;
    
    extern __shared__ float t_pSharedMem[];

    float* t_pU_B = t_pSharedMem;
    float* t_pW = t_pU_B + t_iSizeProj_Phi_sMat;
    float* t_pYZCache = t_pW + p_iProj_Phi_sCols;
    float* t_pSVDCache_all = t_pYZCache + blockDim.y*blockDim.z;

     if(threadIdx.z == 0)//To prevent other z threads performing memory access
     {
        //Copy first Lead Field point
        int i = threadIdx.y;//combination index
        while(i < t_iSizeProj_Phi_sMat)
        {
            t_pU_B[i] = p_pMatProj_Phi_s[i];
            i += blockDim.y;
        }
     }

    cuSVD_UW_shared(    t_pU_B,   /* [m x n ]*/
                        p_iProj_Phi_sRows,      /* rows */
                        p_iProj_Phi_sCols,      /* columns */
                        t_pW,   /* [nx1]*/
                        t_pSVDCache_all, /* [nx1] */
                        t_pYZCache );

    *p_pRank = 0;

    int t_iKey = 0;
    float t_vMax = 0;

    for(int n = 0; n < p_iProj_Phi_sCols; ++n)
    {
        if (t_pW[n] >= 0.00001f)
        {
            if(t_vMax < t_pW[n])
            {
                t_iKey = n;
                t_vMax = t_pW[n];
            }
            ++(*p_pRank);
        }
    }

    
    //order nonzero Singular values
    int* vecOrdKey = new int[*p_pRank];
    float* vecOrdVal = new float[*p_pRank];

    vecOrdKey[0] = t_iKey;
    vecOrdVal[0] = t_vMax;

    //very uneffective key-value-sorting
    for(int k = 1; k < *p_pRank; ++k)
    {
        vecOrdVal[k] = 0;
        for(int n = 0; n < p_iProj_Phi_sCols; ++n)
        {
            if( t_pW[n] <= vecOrdVal[k-1] && n != vecOrdKey[k-1] && t_pW[n] > vecOrdVal[k] )
            {
                vecOrdKey[k] = n;
                vecOrdVal[k] = t_pW[n];
            }
        }
    }


    int c = 0;
    for(int n = 0; n < *p_pRank; ++n)//ToDo Parallel
    {
        int m = threadIdx.y;
        while(m < p_iProj_Phi_sRows)
        {
            p_pMatU_B[c*p_iProj_Phi_sRows + m] = t_pU_B[vecOrdKey[n]*p_iProj_Phi_sRows + m]; 
            m += blockDim.y;
        }
        ++c;
    }

    __syncthreads();
}

//*************************************************************************************************************

__device__ void cuGetLeadFieldPair( float* p_pMatProjLeadField, //Input
                                    int p_iLeadFieldRows,
                                    float* p_pMatProj_G,
                                    int p_iIdx1, int p_iIdx2)
{
     if(threadIdx.z == 0)//To prevent other z threads performing memory access
     {
        int iidx1 = p_iIdx1 * p_iLeadFieldRows*3;//index with offset (idx1 * p_iLeadFieldRows)
        int iidx2 = p_iIdx2 * p_iLeadFieldRows*3;//index with offset (idx2 * p_iLeadFieldRows)

        int t_iSizePointMat = p_iLeadFieldRows*3;

        //Copy first Lead Field point
        int i = threadIdx.y;//combination index
        while(i < t_iSizePointMat)
        {
            p_pMatProj_G[i] = p_pMatProjLeadField[iidx1 + i];
            i += blockDim.y;
        }

        //Copy second Lead Field point
        i = threadIdx.y;//combination index
        while(i < t_iSizePointMat)
        {
            p_pMatProj_G[t_iSizePointMat+i] = p_pMatProjLeadField[iidx2 + i];
            i += blockDim.y;
        }
    }
}


//*************************************************************************************************************

__global__ void RapMusicSubcorr(    float* p_pMatProjLeadField, //Input
                                    int p_iLeadFieldRows,
                                    int p_iLeadFieldCols, 
                                    int* p_pPairIdxCombinations, //Combination
                                    int p_iNumOfCombinations,

                                    float* p_pMatU_B, //[rowsA x colsB] //from kernel part2
                                    int p_iColsB,
                                    float* p_pRoh )
{
    const int t_iSizePairMat = p_iLeadFieldRows * 6;

    const int t_iPairCols = 6;
    const int iColsA = 6;
    const int t_iSizeSVDCache = t_iPairCols+1+1;

    const int t_iSizeCorMat = iColsA * p_iColsB;

    //Create all Pair Mats in shared mem
    extern __shared__ float t_pSharedMem[];
    
    //Split shared Memory
    float* t_pMatProj_G_all = t_pSharedMem;//size = t_iSizePairMat*blockDim.x
    float* t_pW_all = t_pMatProj_G_all + t_iSizePairMat*blockDim.x;//size = t_iPairCols*blockDim.x
    float* t_pCor_all = t_pW_all + t_iPairCols*blockDim.x;//size = t_iSizeCorMat*blockDim.x
    float* t_pCacheYZ_all = t_pCor_all + t_iSizeCorMat*blockDim.x;//size = blockDim.y*blockDim.z*blockDim.x
    float* t_pSVDCache_all = t_pCacheYZ_all + blockDim.y*blockDim.z*blockDim.x;//size = t_iSizeSVDCache*blockDim.x

    //Split YZ Cache
    float* t_pCacheYZ = t_pCacheYZ_all +(threadIdx.x*blockDim.y*blockDim.z);
    float* t_pCacheY = t_pCacheYZ + threadIdx.z*blockDim.y;

    int t_iNumPairMatsPerBlock = blockDim.x;//Number of threads in x
    int t_iCurrentBlock = blockIdx.x;

    int t_iCombIdx = threadIdx.x + t_iCurrentBlock * t_iNumPairMatsPerBlock;


    while (t_iCombIdx < p_iNumOfCombinations) {

        int idx1 = p_pPairIdxCombinations[2*t_iCombIdx];//*3, 3x more cols -> x y z
        int idx2 = p_pPairIdxCombinations[2*t_iCombIdx+1];//*3, 3x more cols -> x y z

        float* t_pMatProj_G = t_pMatProj_G_all + t_iSizePairMat*threadIdx.x;

        cuGetLeadFieldPair( p_pMatProjLeadField, //Input
                            p_iLeadFieldRows,
                            t_pMatProj_G,
                            idx1, idx2);
        __syncthreads();

    //Part 1
        //fhre svd auf paarmat aus
        float* w = t_pW_all + t_iPairCols*threadIdx.x;
        float* t_pSVDCache = t_pSVDCache_all + t_iSizeSVDCache*threadIdx.x;

        cuSVD_UW_shared( t_pMatProj_G, p_iLeadFieldRows, t_iPairCols, w, t_pSVDCache, t_pCacheYZ);
//        cuSVD_UW( t_pMatProj_G, p_iLeadFieldRows, t_iPairCols, w);
        __syncthreads();

        float* t_pMatU_A_full = t_pMatProj_G;

        //if once a singularvalue is smaller than epsilon = 10^-5 the following values are also smaller
        // -> because Singular values are ordered
        int t_iRank = threadIdx.z;
        while(t_iRank < t_iPairCols)
        {
            if (w[t_iRank] < 0.00001f)//set Eigenvectors with corresponding 0 eigenvalue to 0
            {
                int c = threadIdx.y;
                while(c < p_iLeadFieldRows)
                {
                    t_pMatU_A_full[t_iRank*p_iLeadFieldRows + c] = 0.0f; 
                    c += blockDim.y;
                }
            }
            t_iRank += blockDim.z;
        }
        __syncthreads();


    //Part 2
        float* U_B = p_pMatU_B;

        float* Cor = t_pCor_all + t_iSizeCorMat*threadIdx.x;//new float[t_iSizeCorMat];//p_pMatCor+(t_iCombIdx * t_iSizeCorMat);

        //lt. Mosher 1998: C = U_A^T * U_B

        //Cor.cols() >= Cor.rows() == U_B.cols > U_A.cols
        if(p_iColsB >= iColsA) //Bug ID 1 - fixed! changed from > to >=
        {
            //C = U_B^T * U_A
            for( int cA = 0; cA < iColsA; ++cA )
            {
                float* t_pMatU_A_full_cur = t_pMatU_A_full + (cA*p_iLeadFieldRows);

                int cB = threadIdx.z;
                while(cB < p_iColsB)
                {
                    float* U_B_cur = U_B + (cB*p_iLeadFieldRows);
                    float* t_pCor_cur = Cor + (cA*p_iColsB + cB);
                    *t_pCor_cur = 0;

                    cuScalarProductY_shared( U_B_cur, t_pMatU_A_full_cur, p_iLeadFieldRows, t_pCacheY, t_pCor_cur );
                    __syncthreads();
//                     for( int rAB = 0; rAB < p_iLeadFieldRows; ++rAB)
//                         *t_pCor_cur += U_B_cur[rAB]*t_pMatU_A_full_cur[rAB];

                    cB += blockDim.z;
                }
                __syncthreads();
            }
        }
        else//ToDo to debug
        {
            //C = U_A^T * U_B
            for( int cB = 0; cB < p_iColsB; ++cB )
            {
                float* U_B_cur = U_B + (cB*p_iLeadFieldRows);

                int cA = threadIdx.z;
                while(cA < iColsA)
                {
                    float* t_pMatU_A_full_cur = t_pMatU_A_full + (cA*p_iLeadFieldRows);
                    float* t_pCor_cur = Cor + (cB*iColsA+cA);
                    *t_pCor_cur = 0;

                    cuScalarProductY_shared( t_pMatU_A_full_cur, U_B_cur, p_iLeadFieldRows, t_pCacheY, t_pCor_cur );
                    __syncthreads();
//                     for( int rAB = 0; rAB < p_iLeadFieldRows; ++rAB)
//                         *t_pCor_cur += t_pMatU_A_full_cur[rAB]*U_B_cur[rAB];

                    cA += blockDim.z;
                }
                __syncthreads();
            }
        }

    //Part 3
        int rows = p_iColsB;
        int cols = iColsA;

        if (p_iColsB < iColsA)
        {
            rows = iColsA;
            cols = p_iColsB;
        }

        //cols are maximal iColsA = 6.
        //That's why we can use w and shared cache again. they are 6 width
        cuSVD_W_shared( Cor, rows, cols, w, t_pSVDCache, t_pCacheYZ);
//        cuSVD_W( Cor, rows, cols, w);
        __syncthreads();
        
        p_pRoh[t_iCombIdx] = 0;
        if(threadIdx.y == 0 && threadIdx.z == 0)
            for(int i = 0; i < cols; ++i)
                if (p_pRoh[t_iCombIdx] < w[i])
                    p_pRoh[t_iCombIdx] = w[i];

        __syncthreads();

         t_iCombIdx += gridDim.x*t_iNumPairMatsPerBlock;
    }

    __syncthreads();
}






__device__ void cuPowellOffset( float* p_pMatProjLeadField, //Input
                                    int p_iLeadFieldRows,
                                    float* p_pMatProj_G,
                                    int p_iIdx1, int p_iIdx2)
{

}


//*************************************************************************************************************

__device__ int cuPowellOffset(int p_iRow, int p_iNumPoints)
{

    return p_iRow*p_iNumPoints - (( (p_iRow-1)*p_iRow) / 2); //triangular series 1 3 6 10 ... = (num_pairs*(num_pairs+1))/2

}


//*************************************************************************************************************

__global__ void cuPowellIdxVec(int p_iRow, int p_iNumPoints, int* p_pVecElements)
{

    //     if(p_pVecElements != NULL)
    //         delete[] p_pVecElements;
    // 
    //     p_pVecElements = new int(p_iNumPoints);

    //col combination index
    int t_iIdx = threadIdx.x + blockIdx.x * blockDim.x;


    while (t_iIdx < p_iRow) {
        p_pVecElements[t_iIdx] = cuPowellOffset(t_iIdx+1,p_iNumPoints)-(p_iNumPoints-p_iRow);
        t_iIdx += gridDim.x*blockDim.x;
    }

    //row combination index
    int off = cuPowellOffset(p_iRow,p_iNumPoints);
    int length = p_iNumPoints - p_iRow;

    t_iIdx = threadIdx.x + blockIdx.x * blockDim.x;

    while (t_iIdx+p_iRow < p_iRow+length) {
        p_pVecElements[t_iIdx+p_iRow] = off+t_iIdx;
        t_iIdx += gridDim.x*blockDim.x;
    }
}


//*************************************************************************************************************

__global__ void PowellRapMusicSubcorr(  float* p_pMatProjLeadField, //Input
                                        int p_iLeadFieldRows,
                                        int p_iLeadFieldCols,
                                        int* p_pPairIdxCombinations, //Combination
                                        int* p_pRowIndezes,
                                        int p_iNumOfDipoles,

                                        float* p_pMatU_B, //[rowsA x colsB] //from kernel part2
                                        int p_iColsB,
                                        float* p_pRoh )
{
    const int t_iSizePairMat = p_iLeadFieldRows * 6;

    const int t_iPairCols = 6;
    const int iColsA = 6;
    const int t_iSizeSVDCache = t_iPairCols+1+1;

    const int t_iSizeCorMat = iColsA * p_iColsB;

    //Create all Pair Mats in shared mem
    extern __shared__ float t_pSharedMem[];
    
    //Split shared Memory
    float* t_pMatProj_G_all = t_pSharedMem;//size = t_iSizePairMat*blockDim.x
    float* t_pW_all = t_pMatProj_G_all + t_iSizePairMat*blockDim.x;//size = t_iPairCols*blockDim.x
    float* t_pCor_all = t_pW_all + t_iPairCols*blockDim.x;//size = t_iSizeCorMat*blockDim.x
    float* t_pCacheYZ_all = t_pCor_all + t_iSizeCorMat*blockDim.x;//size = blockDim.y*blockDim.z*blockDim.x
    float* t_pSVDCache_all = t_pCacheYZ_all + blockDim.y*blockDim.z*blockDim.x;//size = t_iSizeSVDCache*blockDim.x

    //Split YZ Cache
    float* t_pCacheYZ = t_pCacheYZ_all +(threadIdx.x*blockDim.y*blockDim.z);
    float* t_pCacheY = t_pCacheYZ + threadIdx.z*blockDim.y;

    int t_iNumPairMatsPerBlock = blockDim.x;//Number of threads in x
    int t_iCurrentBlock = blockIdx.x;

    int t_iCombIdx = threadIdx.x + t_iCurrentBlock * t_iNumPairMatsPerBlock;


    while (t_iCombIdx < p_iNumOfDipoles) {
        int t_iCurrentIdx = p_pRowIndezes[t_iCombIdx];

        int idx1 = p_pPairIdxCombinations[2*t_iCurrentIdx];//*3, 3x more cols -> x y z
        int idx2 = p_pPairIdxCombinations[2*t_iCurrentIdx+1];//*3, 3x more cols -> x y z

        float* t_pMatProj_G = t_pMatProj_G_all + t_iSizePairMat*threadIdx.x;

        cuGetLeadFieldPair( p_pMatProjLeadField, //Input
                            p_iLeadFieldRows,
                            t_pMatProj_G,
                            idx1, idx2);
        __syncthreads();

    //Part 1
        //fhre svd auf paarmat aus
        float* w = t_pW_all + t_iPairCols*threadIdx.x;
        float* t_pSVDCache = t_pSVDCache_all + t_iSizeSVDCache*threadIdx.x;

        cuSVD_UW_shared( t_pMatProj_G, p_iLeadFieldRows, t_iPairCols, w, t_pSVDCache, t_pCacheYZ);
//        cuSVD_UW( t_pMatProj_G, p_iLeadFieldRows, t_iPairCols, w);
        __syncthreads();

        float* t_pMatU_A_full = t_pMatProj_G;

        //if once a singularvalue is smaller than epsilon = 10^-5 the following values are also smaller
        // -> because Singular values are ordered
        int t_iRank = threadIdx.z;
        while(t_iRank < t_iPairCols)
        {
            if (w[t_iRank] < 0.00001f)//set Eigenvectors with corresponding 0 eigenvalue to 0
            {
                int c = threadIdx.y;
                while(c < p_iLeadFieldRows)
                {
                    t_pMatU_A_full[t_iRank*p_iLeadFieldRows + c] = 0.0f; 
                    c += blockDim.y;
                }
            }
            t_iRank += blockDim.z;
        }
        __syncthreads();


    //Part 2
        float* U_B = p_pMatU_B;

        float* Cor = t_pCor_all + t_iSizeCorMat*threadIdx.x;//new float[t_iSizeCorMat];//p_pMatCor+(t_iCombIdx * t_iSizeCorMat);

        //lt. Mosher 1998: C = U_A^T * U_B

        //Cor.cols() >= Cor.rows() == U_B.cols > U_A.cols
        if(p_iColsB >= iColsA) //Bug ID 1 - fixed! changed from > to >=
        {
            //C = U_B^T * U_A
            for( int cA = 0; cA < iColsA; ++cA )
            {
                float* t_pMatU_A_full_cur = t_pMatU_A_full + (cA*p_iLeadFieldRows);

                int cB = threadIdx.z;
                while(cB < p_iColsB)
                {
                    float* U_B_cur = U_B + (cB*p_iLeadFieldRows);
                    float* t_pCor_cur = Cor + (cA*p_iColsB + cB);
                    *t_pCor_cur = 0;

                    cuScalarProductY_shared( U_B_cur, t_pMatU_A_full_cur, p_iLeadFieldRows, t_pCacheY, t_pCor_cur );
                    __syncthreads();
//                     for( int rAB = 0; rAB < p_iLeadFieldRows; ++rAB)
//                         *t_pCor_cur += U_B_cur[rAB]*t_pMatU_A_full_cur[rAB];

                    cB += blockDim.z;
                }
                __syncthreads();
            }
        }
        else//ToDo to debug
        {
            //C = U_A^T * U_B
            for( int cB = 0; cB < p_iColsB; ++cB )
            {
                float* U_B_cur = U_B + (cB*p_iLeadFieldRows);

                int cA = threadIdx.z;
                while(cA < iColsA)
                {
                    float* t_pMatU_A_full_cur = t_pMatU_A_full + (cA*p_iLeadFieldRows);
                    float* t_pCor_cur = Cor + (cB*iColsA+cA);
                    *t_pCor_cur = 0;

                    cuScalarProductY_shared( t_pMatU_A_full_cur, U_B_cur, p_iLeadFieldRows, t_pCacheY, t_pCor_cur );
                    __syncthreads();
//                     for( int rAB = 0; rAB < p_iLeadFieldRows; ++rAB)
//                         *t_pCor_cur += t_pMatU_A_full_cur[rAB]*U_B_cur[rAB];

                    cA += blockDim.z;
                }
                __syncthreads();
            }
        }

    //Part 3
        int rows = p_iColsB;
        int cols = iColsA;

        if (p_iColsB < iColsA)
        {
            rows = iColsA;
            cols = p_iColsB;
        }

        //cols are maximal iColsA = 6.
        //That's why we can use w and shared cache again. they are 6 width
        cuSVD_W_shared( Cor, rows, cols, w, t_pSVDCache, t_pCacheYZ);
//        cuSVD_W( Cor, rows, cols, w);
        __syncthreads();
        
        p_pRoh[t_iCurrentIdx] = 0;
        if(threadIdx.y == 0 && threadIdx.z == 0)
            for(int i = 0; i < cols; ++i)
                if (p_pRoh[t_iCurrentIdx] < w[i])
                    p_pRoh[t_iCurrentIdx] = w[i];

        __syncthreads();

         t_iCombIdx += gridDim.x*t_iNumPairMatsPerBlock;
    }

    __syncthreads();
}

}//Namespace
	.file	"tmpxft_0027e598_00000000-6_rapmusic_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2027:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2027:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_ZN6HPCLib6pythagEff
	.type	_ZN6HPCLib6pythagEff, @function
_ZN6HPCLib6pythagEff:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2008:
	.size	_ZN6HPCLib6pythagEff, .-_ZN6HPCLib6pythagEff
	.globl	_ZN6HPCLib24cuScalarProductYZ_sharedEPfS0_iS0_S0_
	.type	_ZN6HPCLib24cuScalarProductYZ_sharedEPfS0_iS0_S0_, @function
_ZN6HPCLib24cuScalarProductYZ_sharedEPfS0_iS0_S0_:
.LFB2009:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2009:
	.size	_ZN6HPCLib24cuScalarProductYZ_sharedEPfS0_iS0_S0_, .-_ZN6HPCLib24cuScalarProductYZ_sharedEPfS0_iS0_S0_
	.globl	_ZN6HPCLib23cuScalarProductY_sharedEPfS0_iS0_S0_
	.type	_ZN6HPCLib23cuScalarProductY_sharedEPfS0_iS0_S0_, @function
_ZN6HPCLib23cuScalarProductY_sharedEPfS0_iS0_S0_:
.LFB2181:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2181:
	.size	_ZN6HPCLib23cuScalarProductY_sharedEPfS0_iS0_S0_, .-_ZN6HPCLib23cuScalarProductY_sharedEPfS0_iS0_S0_
	.globl	_ZN6HPCLib31cuScalarProductAddZ_incr_sharedEPfS0_iS0_S0_iS0_
	.type	_ZN6HPCLib31cuScalarProductAddZ_incr_sharedEPfS0_iS0_S0_iS0_, @function
_ZN6HPCLib31cuScalarProductAddZ_incr_sharedEPfS0_iS0_S0_iS0_:
.LFB2011:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2011:
	.size	_ZN6HPCLib31cuScalarProductAddZ_incr_sharedEPfS0_iS0_S0_iS0_, .-_ZN6HPCLib31cuScalarProductAddZ_incr_sharedEPfS0_iS0_S0_iS0_
	.globl	_ZN6HPCLib31cuVecScaleSquareReduceYZ_sharedEPfS0_iS0_S0_
	.type	_ZN6HPCLib31cuVecScaleSquareReduceYZ_sharedEPfS0_iS0_S0_, @function
_ZN6HPCLib31cuVecScaleSquareReduceYZ_sharedEPfS0_iS0_S0_:
.LFB2183:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2183:
	.size	_ZN6HPCLib31cuVecScaleSquareReduceYZ_sharedEPfS0_iS0_S0_, .-_ZN6HPCLib31cuVecScaleSquareReduceYZ_sharedEPfS0_iS0_S0_
	.globl	_ZN6HPCLib36cuVecScaleSquareReduceYZ_incr_sharedEPfS0_iS0_S0_i
	.type	_ZN6HPCLib36cuVecScaleSquareReduceYZ_incr_sharedEPfS0_iS0_S0_i, @function
_ZN6HPCLib36cuVecScaleSquareReduceYZ_incr_sharedEPfS0_iS0_S0_i:
.LFB2013:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2013:
	.size	_ZN6HPCLib36cuVecScaleSquareReduceYZ_incr_sharedEPfS0_iS0_S0_i, .-_ZN6HPCLib36cuVecScaleSquareReduceYZ_incr_sharedEPfS0_iS0_S0_i
	.globl	_ZN6HPCLib20cuReduceAbsYZ_sharedEPfiS0_S0_
	.type	_ZN6HPCLib20cuReduceAbsYZ_sharedEPfiS0_S0_, @function
_ZN6HPCLib20cuReduceAbsYZ_sharedEPfiS0_S0_:
.LFB2014:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2014:
	.size	_ZN6HPCLib20cuReduceAbsYZ_sharedEPfiS0_S0_, .-_ZN6HPCLib20cuReduceAbsYZ_sharedEPfiS0_S0_
	.globl	_ZN6HPCLib5cuSVDEPfiiS0_S0_
	.type	_ZN6HPCLib5cuSVDEPfiiS0_S0_, @function
_ZN6HPCLib5cuSVDEPfiiS0_S0_:
.LFB2015:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2015:
	.size	_ZN6HPCLib5cuSVDEPfiiS0_S0_, .-_ZN6HPCLib5cuSVDEPfiiS0_S0_
	.globl	_ZN6HPCLib8cuSVD_UWEPfiiS0_
	.type	_ZN6HPCLib8cuSVD_UWEPfiiS0_, @function
_ZN6HPCLib8cuSVD_UWEPfiiS0_:
.LFB2016:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2016:
	.size	_ZN6HPCLib8cuSVD_UWEPfiiS0_, .-_ZN6HPCLib8cuSVD_UWEPfiiS0_
	.globl	_ZN6HPCLib7cuSVD_WEPfiiS0_
	.type	_ZN6HPCLib7cuSVD_WEPfiiS0_, @function
_ZN6HPCLib7cuSVD_WEPfiiS0_:
.LFB2177:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2177:
	.size	_ZN6HPCLib7cuSVD_WEPfiiS0_, .-_ZN6HPCLib7cuSVD_WEPfiiS0_
	.globl	_ZN6HPCLib12cuSVD_sharedEPfiiS0_S0_S0_S0_
	.type	_ZN6HPCLib12cuSVD_sharedEPfiiS0_S0_S0_S0_, @function
_ZN6HPCLib12cuSVD_sharedEPfiiS0_S0_S0_S0_:
.LFB2018:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2018:
	.size	_ZN6HPCLib12cuSVD_sharedEPfiiS0_S0_S0_S0_, .-_ZN6HPCLib12cuSVD_sharedEPfiiS0_S0_S0_S0_
	.globl	_ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_
	.type	_ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_, @function
_ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_:
.LFB2019:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2019:
	.size	_ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_, .-_ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_
	.globl	_ZN6HPCLib14cuSVD_W_sharedEPfiiS0_S0_S0_
	.type	_ZN6HPCLib14cuSVD_W_sharedEPfiiS0_S0_S0_, @function
_ZN6HPCLib14cuSVD_W_sharedEPfiiS0_S0_S0_:
.LFB2185:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2185:
	.size	_ZN6HPCLib14cuSVD_W_sharedEPfiiS0_S0_S0_, .-_ZN6HPCLib14cuSVD_W_sharedEPfiiS0_S0_S0_
	.globl	_ZN6HPCLib14cuGetPointPairEiiPiS0_
	.type	_ZN6HPCLib14cuGetPointPairEiiPiS0_, @function
_ZN6HPCLib14cuGetPointPairEiiPiS0_:
.LFB2021:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2021:
	.size	_ZN6HPCLib14cuGetPointPairEiiPiS0_, .-_ZN6HPCLib14cuGetPointPairEiiPiS0_
	.globl	_ZN6HPCLib18cuGetLeadFieldPairEPfiS0_ii
	.type	_ZN6HPCLib18cuGetLeadFieldPairEPfiS0_ii, @function
_ZN6HPCLib18cuGetLeadFieldPairEPfiS0_ii:
.LFB2022:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2022:
	.size	_ZN6HPCLib18cuGetLeadFieldPairEPfiS0_ii, .-_ZN6HPCLib18cuGetLeadFieldPairEPfiS0_ii
	.globl	_ZN6HPCLib14cuPowellOffsetEPfiS0_ii
	.type	_ZN6HPCLib14cuPowellOffsetEPfiS0_ii, @function
_ZN6HPCLib14cuPowellOffsetEPfiS0_ii:
.LFB2179:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2179:
	.size	_ZN6HPCLib14cuPowellOffsetEPfiS0_ii, .-_ZN6HPCLib14cuPowellOffsetEPfiS0_ii
	.globl	_ZN6HPCLib14cuPowellOffsetEii
	.type	_ZN6HPCLib14cuPowellOffsetEii, @function
_ZN6HPCLib14cuPowellOffsetEii:
.LFB2024:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2024:
	.size	_ZN6HPCLib14cuPowellOffsetEii, .-_ZN6HPCLib14cuPowellOffsetEii
	.globl	_Z53__device_stub__ZN6HPCLib22cuCalcPairCombinationsEiiPiiiPi
	.type	_Z53__device_stub__ZN6HPCLib22cuCalcPairCombinationsEiiPiiiPi, @function
_Z53__device_stub__ZN6HPCLib22cuCalcPairCombinationsEiiPiiiPi:
.LFB2049:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	44(%rsp), %rsi
	movq	%rdx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_ZN6HPCLib22cuCalcPairCombinationsEiiPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L36:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2049:
	.size	_Z53__device_stub__ZN6HPCLib22cuCalcPairCombinationsEiiPiiiPi, .-_Z53__device_stub__ZN6HPCLib22cuCalcPairCombinationsEiiPiiiPi
	.globl	_ZN6HPCLib22cuCalcPairCombinationsEiiPi
	.type	_ZN6HPCLib22cuCalcPairCombinationsEiiPi, @function
_ZN6HPCLib22cuCalcPairCombinationsEiiPi:
.LFB2050:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__ZN6HPCLib22cuCalcPairCombinationsEiiPiiiPi
	.cfi_endproc
.LFE2050:
	.size	_ZN6HPCLib22cuCalcPairCombinationsEiiPi, .-_ZN6HPCLib22cuCalcPairCombinationsEiiPi
	.globl	_Z44__device_stub__ZN6HPCLib9cuCalcU_BEPfiiS0_PiPfiiS_Pi
	.type	_Z44__device_stub__ZN6HPCLib9cuCalcU_BEPfiiS0_PiPfiiS_Pi, @function
_Z44__device_stub__ZN6HPCLib9cuCalcU_BEPfiiS0_PiPfiiS_Pi:
.LFB2051:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L42:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2051:
	.size	_Z44__device_stub__ZN6HPCLib9cuCalcU_BEPfiiS0_PiPfiiS_Pi, .-_Z44__device_stub__ZN6HPCLib9cuCalcU_BEPfiiS0_PiPfiiS_Pi
	.globl	_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi
	.type	_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi, @function
_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi:
.LFB2052:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__ZN6HPCLib9cuCalcU_BEPfiiS0_PiPfiiS_Pi
	.cfi_endproc
.LFE2052:
	.size	_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi, .-_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi
	.globl	_Z56__device_stub__ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_PfiiPiiS_iS_
	.type	_Z56__device_stub__ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_PfiiPiiS_iS_, @function
_Z56__device_stub__ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_PfiiPiiS_iS_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	216(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 32(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 20(%rsp)
	movq	%r9, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	%rsp, %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L47:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z56__device_stub__ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_PfiiPiiS_iS_, .-_Z56__device_stub__ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_PfiiPiiS_iS_
	.globl	_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_
	.type	_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_, @function
_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z56__device_stub__ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_PfiiPiiS_iS_
	.cfi_endproc
.LFE2054:
	.size	_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_, .-_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_
	.globl	_Z45__device_stub__ZN6HPCLib14cuPowellIdxVecEiiPiiiPi
	.type	_Z45__device_stub__ZN6HPCLib14cuPowellIdxVecEiiPiiiPi, @function
_Z45__device_stub__ZN6HPCLib14cuPowellIdxVecEiiPiiiPi:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	44(%rsp), %rsi
	movq	%rdx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L52
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_ZN6HPCLib14cuPowellIdxVecEiiPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L52:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L54
	call	__stack_chk_fail@PLT
.L54:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z45__device_stub__ZN6HPCLib14cuPowellIdxVecEiiPiiiPi, .-_Z45__device_stub__ZN6HPCLib14cuPowellIdxVecEiiPiiiPi
	.globl	_ZN6HPCLib14cuPowellIdxVecEiiPi
	.type	_ZN6HPCLib14cuPowellIdxVecEiiPi, @function
_ZN6HPCLib14cuPowellIdxVecEiiPi:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__ZN6HPCLib14cuPowellIdxVecEiiPiiiPi
	.cfi_endproc
.LFE2056:
	.size	_ZN6HPCLib14cuPowellIdxVecEiiPi, .-_ZN6HPCLib14cuPowellIdxVecEiiPi
	.globl	_Z65__device_stub__ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_PfiiPiS0_iS_iS_
	.type	_Z65__device_stub__ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_PfiiPiS0_iS_iS_, @function
_Z65__device_stub__ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_PfiiPiS0_iS_iS_:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movl	%esi, 52(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	240(%rsp), %rax
	movl	%edx, 48(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 40(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 32(%rsp)
	movl	%r9d, 28(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	52(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L57
	pushq	72(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 240
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L57:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L59
	call	__stack_chk_fail@PLT
.L59:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z65__device_stub__ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_PfiiPiS0_iS_iS_, .-_Z65__device_stub__ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_PfiiPiS0_iS_iS_
	.globl	_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_
	.type	_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_, @function
_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z65__device_stub__ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_PfiiPiS0_iS_iS_
	.cfi_endproc
.LFE2058:
	.size	_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_, .-_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_"
.LC1:
	.string	"_ZN6HPCLib14cuPowellIdxVecEiiPi"
.LC2:
	.string	"_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_"
.LC3:
	.string	"_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi"
.LC4:
	.string	"_ZN6HPCLib22cuCalcPairCombinationsEiiPi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_ZN6HPCLib14cuPowellIdxVecEiiPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_ZN6HPCLib22cuCalcPairCombinationsEiiPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//=============================================================================================================
/**
* @file     rapmusic_kernel.cu
* @author   Christoph Dinh <christoph.dinh@live.de>;
* @version  1.0
* @date     March, 2011
*
* @section  LICENSE
*
* Copyright (C) 2011 Christoph Dinh. All rights reserved.
*
* No part of this program may be photocopied, reproduced,
* or translated to another program language without the
* prior written consent of the author.
*
*
* @brief    ToDo Documentation.. 
*
*/

//*************************************************************************************************************
//=============================================================================================================
// CUDA INCLUDES
//=============================================================================================================


#include <hip/hip_runtime.h>
#include "../include/rapmusic_kernel.cuh"
#include "../include/cusvd.cuh"
#include "../include/cuhelpers.cuh"


//*************************************************************************************************************
//=============================================================================================================
// STL INCLUDES
//=============================================================================================================


#define SHDEBUG


//*************************************************************************************************************
//=============================================================================================================
// DEFINE NAMESPACE HPCLib
//=============================================================================================================

namespace HPCLib
{


//*************************************************************************************************************
//=============================================================================================================
// Kernels and Device Functions
//=============================================================================================================

__device__ void cuGetPointPair( const int p_iPoints,
                                const int p_iCurIdx,
                                int *p_pIdx1, int *p_pIdx2)
{
    int ii = p_iPoints*(p_iPoints+1)/2-1-p_iCurIdx;
    int K = (int)floor((sqrt((double)(8*ii+1))-1)/2);
    
    *p_pIdx1 = p_iPoints-1-K;

    *p_pIdx2 = (p_iCurIdx-p_iPoints*(p_iPoints+1)/2 + (K+1)*(K+2)/2)+(*p_pIdx1);
}


//*************************************************************************************************************

__global__ void cuCalcPairCombinations( int p_iNumPoints,
                                        int p_iNumCombinations,
                                        int* p_pPairIdxCombinations)
{
    int t_iCombIdx = threadIdx.x + blockIdx.x * blockDim.x;

    int *t_pIdx1 = new int;
    int *t_pIdx2 = new int;

    while (t_iCombIdx < p_iNumCombinations) {

        cuGetPointPair(p_iNumPoints, t_iCombIdx, t_pIdx1, t_pIdx2);

        p_pPairIdxCombinations[2*t_iCombIdx] = *t_pIdx1;
        p_pPairIdxCombinations[2*t_iCombIdx+1] = *t_pIdx2;

        t_iCombIdx += gridDim.x*blockDim.x;
    }

    delete t_pIdx2;
    delete t_pIdx1;
}


//*************************************************************************************************************

__global__ void cuCalcU_B(  float* p_pMatProj_Phi_s,
                            int p_iProj_Phi_sRows,
                            int p_iProj_Phi_sCols,
                            float* p_pMatU_B,
                            int* p_pRank)
{
    int t_iSizeProj_Phi_sMat = p_iProj_Phi_sRows * p_iProj_Phi_sCols;
    
    extern __shared__ float t_pSharedMem[];

    float* t_pU_B = t_pSharedMem;
    float* t_pW = t_pU_B + t_iSizeProj_Phi_sMat;
    float* t_pYZCache = t_pW + p_iProj_Phi_sCols;
    float* t_pSVDCache_all = t_pYZCache + blockDim.y*blockDim.z;

     if(threadIdx.z == 0)//To prevent other z threads performing memory access
     {
        //Copy first Lead Field point
        int i = threadIdx.y;//combination index
        while(i < t_iSizeProj_Phi_sMat)
        {
            t_pU_B[i] = p_pMatProj_Phi_s[i];
            i += blockDim.y;
        }
     }

    cuSVD_UW_shared(    t_pU_B,   /* [m x n ]*/
                        p_iProj_Phi_sRows,      /* rows */
                        p_iProj_Phi_sCols,      /* columns */
                        t_pW,   /* [nx1]*/
                        t_pSVDCache_all, /* [nx1] */
                        t_pYZCache );

    *p_pRank = 0;

    int t_iKey = 0;
    float t_vMax = 0;

    for(int n = 0; n < p_iProj_Phi_sCols; ++n)
    {
        if (t_pW[n] >= 0.00001f)
        {
            if(t_vMax < t_pW[n])
            {
                t_iKey = n;
                t_vMax = t_pW[n];
            }
            ++(*p_pRank);
        }
    }

    
    //order nonzero Singular values
    int* vecOrdKey = new int[*p_pRank];
    float* vecOrdVal = new float[*p_pRank];

    vecOrdKey[0] = t_iKey;
    vecOrdVal[0] = t_vMax;

    //very uneffective key-value-sorting
    for(int k = 1; k < *p_pRank; ++k)
    {
        vecOrdVal[k] = 0;
        for(int n = 0; n < p_iProj_Phi_sCols; ++n)
        {
            if( t_pW[n] <= vecOrdVal[k-1] && n != vecOrdKey[k-1] && t_pW[n] > vecOrdVal[k] )
            {
                vecOrdKey[k] = n;
                vecOrdVal[k] = t_pW[n];
            }
        }
    }


    int c = 0;
    for(int n = 0; n < *p_pRank; ++n)//ToDo Parallel
    {
        int m = threadIdx.y;
        while(m < p_iProj_Phi_sRows)
        {
            p_pMatU_B[c*p_iProj_Phi_sRows + m] = t_pU_B[vecOrdKey[n]*p_iProj_Phi_sRows + m]; 
            m += blockDim.y;
        }
        ++c;
    }

    __syncthreads();
}

//*************************************************************************************************************

__device__ void cuGetLeadFieldPair( float* p_pMatProjLeadField, //Input
                                    int p_iLeadFieldRows,
                                    float* p_pMatProj_G,
                                    int p_iIdx1, int p_iIdx2)
{
     if(threadIdx.z == 0)//To prevent other z threads performing memory access
     {
        int iidx1 = p_iIdx1 * p_iLeadFieldRows*3;//index with offset (idx1 * p_iLeadFieldRows)
        int iidx2 = p_iIdx2 * p_iLeadFieldRows*3;//index with offset (idx2 * p_iLeadFieldRows)

        int t_iSizePointMat = p_iLeadFieldRows*3;

        //Copy first Lead Field point
        int i = threadIdx.y;//combination index
        while(i < t_iSizePointMat)
        {
            p_pMatProj_G[i] = p_pMatProjLeadField[iidx1 + i];
            i += blockDim.y;
        }

        //Copy second Lead Field point
        i = threadIdx.y;//combination index
        while(i < t_iSizePointMat)
        {
            p_pMatProj_G[t_iSizePointMat+i] = p_pMatProjLeadField[iidx2 + i];
            i += blockDim.y;
        }
    }
}


//*************************************************************************************************************

__global__ void RapMusicSubcorr(    float* p_pMatProjLeadField, //Input
                                    int p_iLeadFieldRows,
                                    int p_iLeadFieldCols, 
                                    int* p_pPairIdxCombinations, //Combination
                                    int p_iNumOfCombinations,

                                    float* p_pMatU_B, //[rowsA x colsB] //from kernel part2
                                    int p_iColsB,
                                    float* p_pRoh )
{
    const int t_iSizePairMat = p_iLeadFieldRows * 6;

    const int t_iPairCols = 6;
    const int iColsA = 6;
    const int t_iSizeSVDCache = t_iPairCols+1+1;

    const int t_iSizeCorMat = iColsA * p_iColsB;

    //Create all Pair Mats in shared mem
    extern __shared__ float t_pSharedMem[];
    
    //Split shared Memory
    float* t_pMatProj_G_all = t_pSharedMem;//size = t_iSizePairMat*blockDim.x
    float* t_pW_all = t_pMatProj_G_all + t_iSizePairMat*blockDim.x;//size = t_iPairCols*blockDim.x
    float* t_pCor_all = t_pW_all + t_iPairCols*blockDim.x;//size = t_iSizeCorMat*blockDim.x
    float* t_pCacheYZ_all = t_pCor_all + t_iSizeCorMat*blockDim.x;//size = blockDim.y*blockDim.z*blockDim.x
    float* t_pSVDCache_all = t_pCacheYZ_all + blockDim.y*blockDim.z*blockDim.x;//size = t_iSizeSVDCache*blockDim.x

    //Split YZ Cache
    float* t_pCacheYZ = t_pCacheYZ_all +(threadIdx.x*blockDim.y*blockDim.z);
    float* t_pCacheY = t_pCacheYZ + threadIdx.z*blockDim.y;

    int t_iNumPairMatsPerBlock = blockDim.x;//Number of threads in x
    int t_iCurrentBlock = blockIdx.x;

    int t_iCombIdx = threadIdx.x + t_iCurrentBlock * t_iNumPairMatsPerBlock;


    while (t_iCombIdx < p_iNumOfCombinations) {

        int idx1 = p_pPairIdxCombinations[2*t_iCombIdx];//*3, 3x more cols -> x y z
        int idx2 = p_pPairIdxCombinations[2*t_iCombIdx+1];//*3, 3x more cols -> x y z

        float* t_pMatProj_G = t_pMatProj_G_all + t_iSizePairMat*threadIdx.x;

        cuGetLeadFieldPair( p_pMatProjLeadField, //Input
                            p_iLeadFieldRows,
                            t_pMatProj_G,
                            idx1, idx2);
        __syncthreads();

    //Part 1
        //fhre svd auf paarmat aus
        float* w = t_pW_all + t_iPairCols*threadIdx.x;
        float* t_pSVDCache = t_pSVDCache_all + t_iSizeSVDCache*threadIdx.x;

        cuSVD_UW_shared( t_pMatProj_G, p_iLeadFieldRows, t_iPairCols, w, t_pSVDCache, t_pCacheYZ);
//        cuSVD_UW( t_pMatProj_G, p_iLeadFieldRows, t_iPairCols, w);
        __syncthreads();

        float* t_pMatU_A_full = t_pMatProj_G;

        //if once a singularvalue is smaller than epsilon = 10^-5 the following values are also smaller
        // -> because Singular values are ordered
        int t_iRank = threadIdx.z;
        while(t_iRank < t_iPairCols)
        {
            if (w[t_iRank] < 0.00001f)//set Eigenvectors with corresponding 0 eigenvalue to 0
            {
                int c = threadIdx.y;
                while(c < p_iLeadFieldRows)
                {
                    t_pMatU_A_full[t_iRank*p_iLeadFieldRows + c] = 0.0f; 
                    c += blockDim.y;
                }
            }
            t_iRank += blockDim.z;
        }
        __syncthreads();


    //Part 2
        float* U_B = p_pMatU_B;

        float* Cor = t_pCor_all + t_iSizeCorMat*threadIdx.x;//new float[t_iSizeCorMat];//p_pMatCor+(t_iCombIdx * t_iSizeCorMat);

        //lt. Mosher 1998: C = U_A^T * U_B

        //Cor.cols() >= Cor.rows() == U_B.cols > U_A.cols
        if(p_iColsB >= iColsA) //Bug ID 1 - fixed! changed from > to >=
        {
            //C = U_B^T * U_A
            for( int cA = 0; cA < iColsA; ++cA )
            {
                float* t_pMatU_A_full_cur = t_pMatU_A_full + (cA*p_iLeadFieldRows);

                int cB = threadIdx.z;
                while(cB < p_iColsB)
                {
                    float* U_B_cur = U_B + (cB*p_iLeadFieldRows);
                    float* t_pCor_cur = Cor + (cA*p_iColsB + cB);
                    *t_pCor_cur = 0;

                    cuScalarProductY_shared( U_B_cur, t_pMatU_A_full_cur, p_iLeadFieldRows, t_pCacheY, t_pCor_cur );
                    __syncthreads();
//                     for( int rAB = 0; rAB < p_iLeadFieldRows; ++rAB)
//                         *t_pCor_cur += U_B_cur[rAB]*t_pMatU_A_full_cur[rAB];

                    cB += blockDim.z;
                }
                __syncthreads();
            }
        }
        else//ToDo to debug
        {
            //C = U_A^T * U_B
            for( int cB = 0; cB < p_iColsB; ++cB )
            {
                float* U_B_cur = U_B + (cB*p_iLeadFieldRows);

                int cA = threadIdx.z;
                while(cA < iColsA)
                {
                    float* t_pMatU_A_full_cur = t_pMatU_A_full + (cA*p_iLeadFieldRows);
                    float* t_pCor_cur = Cor + (cB*iColsA+cA);
                    *t_pCor_cur = 0;

                    cuScalarProductY_shared( t_pMatU_A_full_cur, U_B_cur, p_iLeadFieldRows, t_pCacheY, t_pCor_cur );
                    __syncthreads();
//                     for( int rAB = 0; rAB < p_iLeadFieldRows; ++rAB)
//                         *t_pCor_cur += t_pMatU_A_full_cur[rAB]*U_B_cur[rAB];

                    cA += blockDim.z;
                }
                __syncthreads();
            }
        }

    //Part 3
        int rows = p_iColsB;
        int cols = iColsA;

        if (p_iColsB < iColsA)
        {
            rows = iColsA;
            cols = p_iColsB;
        }

        //cols are maximal iColsA = 6.
        //That's why we can use w and shared cache again. they are 6 width
        cuSVD_W_shared( Cor, rows, cols, w, t_pSVDCache, t_pCacheYZ);
//        cuSVD_W( Cor, rows, cols, w);
        __syncthreads();
        
        p_pRoh[t_iCombIdx] = 0;
        if(threadIdx.y == 0 && threadIdx.z == 0)
            for(int i = 0; i < cols; ++i)
                if (p_pRoh[t_iCombIdx] < w[i])
                    p_pRoh[t_iCombIdx] = w[i];

        __syncthreads();

         t_iCombIdx += gridDim.x*t_iNumPairMatsPerBlock;
    }

    __syncthreads();
}






__device__ void cuPowellOffset( float* p_pMatProjLeadField, //Input
                                    int p_iLeadFieldRows,
                                    float* p_pMatProj_G,
                                    int p_iIdx1, int p_iIdx2)
{

}


//*************************************************************************************************************

__device__ int cuPowellOffset(int p_iRow, int p_iNumPoints)
{

    return p_iRow*p_iNumPoints - (( (p_iRow-1)*p_iRow) / 2); //triangular series 1 3 6 10 ... = (num_pairs*(num_pairs+1))/2

}


//*************************************************************************************************************

__global__ void cuPowellIdxVec(int p_iRow, int p_iNumPoints, int* p_pVecElements)
{

    //     if(p_pVecElements != NULL)
    //         delete[] p_pVecElements;
    // 
    //     p_pVecElements = new int(p_iNumPoints);

    //col combination index
    int t_iIdx = threadIdx.x + blockIdx.x * blockDim.x;


    while (t_iIdx < p_iRow) {
        p_pVecElements[t_iIdx] = cuPowellOffset(t_iIdx+1,p_iNumPoints)-(p_iNumPoints-p_iRow);
        t_iIdx += gridDim.x*blockDim.x;
    }

    //row combination index
    int off = cuPowellOffset(p_iRow,p_iNumPoints);
    int length = p_iNumPoints - p_iRow;

    t_iIdx = threadIdx.x + blockIdx.x * blockDim.x;

    while (t_iIdx+p_iRow < p_iRow+length) {
        p_pVecElements[t_iIdx+p_iRow] = off+t_iIdx;
        t_iIdx += gridDim.x*blockDim.x;
    }
}


//*************************************************************************************************************

__global__ void PowellRapMusicSubcorr(  float* p_pMatProjLeadField, //Input
                                        int p_iLeadFieldRows,
                                        int p_iLeadFieldCols,
                                        int* p_pPairIdxCombinations, //Combination
                                        int* p_pRowIndezes,
                                        int p_iNumOfDipoles,

                                        float* p_pMatU_B, //[rowsA x colsB] //from kernel part2
                                        int p_iColsB,
                                        float* p_pRoh )
{
    const int t_iSizePairMat = p_iLeadFieldRows * 6;

    const int t_iPairCols = 6;
    const int iColsA = 6;
    const int t_iSizeSVDCache = t_iPairCols+1+1;

    const int t_iSizeCorMat = iColsA * p_iColsB;

    //Create all Pair Mats in shared mem
    extern __shared__ float t_pSharedMem[];
    
    //Split shared Memory
    float* t_pMatProj_G_all = t_pSharedMem;//size = t_iSizePairMat*blockDim.x
    float* t_pW_all = t_pMatProj_G_all + t_iSizePairMat*blockDim.x;//size = t_iPairCols*blockDim.x
    float* t_pCor_all = t_pW_all + t_iPairCols*blockDim.x;//size = t_iSizeCorMat*blockDim.x
    float* t_pCacheYZ_all = t_pCor_all + t_iSizeCorMat*blockDim.x;//size = blockDim.y*blockDim.z*blockDim.x
    float* t_pSVDCache_all = t_pCacheYZ_all + blockDim.y*blockDim.z*blockDim.x;//size = t_iSizeSVDCache*blockDim.x

    //Split YZ Cache
    float* t_pCacheYZ = t_pCacheYZ_all +(threadIdx.x*blockDim.y*blockDim.z);
    float* t_pCacheY = t_pCacheYZ + threadIdx.z*blockDim.y;

    int t_iNumPairMatsPerBlock = blockDim.x;//Number of threads in x
    int t_iCurrentBlock = blockIdx.x;

    int t_iCombIdx = threadIdx.x + t_iCurrentBlock * t_iNumPairMatsPerBlock;


    while (t_iCombIdx < p_iNumOfDipoles) {
        int t_iCurrentIdx = p_pRowIndezes[t_iCombIdx];

        int idx1 = p_pPairIdxCombinations[2*t_iCurrentIdx];//*3, 3x more cols -> x y z
        int idx2 = p_pPairIdxCombinations[2*t_iCurrentIdx+1];//*3, 3x more cols -> x y z

        float* t_pMatProj_G = t_pMatProj_G_all + t_iSizePairMat*threadIdx.x;

        cuGetLeadFieldPair( p_pMatProjLeadField, //Input
                            p_iLeadFieldRows,
                            t_pMatProj_G,
                            idx1, idx2);
        __syncthreads();

    //Part 1
        //fhre svd auf paarmat aus
        float* w = t_pW_all + t_iPairCols*threadIdx.x;
        float* t_pSVDCache = t_pSVDCache_all + t_iSizeSVDCache*threadIdx.x;

        cuSVD_UW_shared( t_pMatProj_G, p_iLeadFieldRows, t_iPairCols, w, t_pSVDCache, t_pCacheYZ);
//        cuSVD_UW( t_pMatProj_G, p_iLeadFieldRows, t_iPairCols, w);
        __syncthreads();

        float* t_pMatU_A_full = t_pMatProj_G;

        //if once a singularvalue is smaller than epsilon = 10^-5 the following values are also smaller
        // -> because Singular values are ordered
        int t_iRank = threadIdx.z;
        while(t_iRank < t_iPairCols)
        {
            if (w[t_iRank] < 0.00001f)//set Eigenvectors with corresponding 0 eigenvalue to 0
            {
                int c = threadIdx.y;
                while(c < p_iLeadFieldRows)
                {
                    t_pMatU_A_full[t_iRank*p_iLeadFieldRows + c] = 0.0f; 
                    c += blockDim.y;
                }
            }
            t_iRank += blockDim.z;
        }
        __syncthreads();


    //Part 2
        float* U_B = p_pMatU_B;

        float* Cor = t_pCor_all + t_iSizeCorMat*threadIdx.x;//new float[t_iSizeCorMat];//p_pMatCor+(t_iCombIdx * t_iSizeCorMat);

        //lt. Mosher 1998: C = U_A^T * U_B

        //Cor.cols() >= Cor.rows() == U_B.cols > U_A.cols
        if(p_iColsB >= iColsA) //Bug ID 1 - fixed! changed from > to >=
        {
            //C = U_B^T * U_A
            for( int cA = 0; cA < iColsA; ++cA )
            {
                float* t_pMatU_A_full_cur = t_pMatU_A_full + (cA*p_iLeadFieldRows);

                int cB = threadIdx.z;
                while(cB < p_iColsB)
                {
                    float* U_B_cur = U_B + (cB*p_iLeadFieldRows);
                    float* t_pCor_cur = Cor + (cA*p_iColsB + cB);
                    *t_pCor_cur = 0;

                    cuScalarProductY_shared( U_B_cur, t_pMatU_A_full_cur, p_iLeadFieldRows, t_pCacheY, t_pCor_cur );
                    __syncthreads();
//                     for( int rAB = 0; rAB < p_iLeadFieldRows; ++rAB)
//                         *t_pCor_cur += U_B_cur[rAB]*t_pMatU_A_full_cur[rAB];

                    cB += blockDim.z;
                }
                __syncthreads();
            }
        }
        else//ToDo to debug
        {
            //C = U_A^T * U_B
            for( int cB = 0; cB < p_iColsB; ++cB )
            {
                float* U_B_cur = U_B + (cB*p_iLeadFieldRows);

                int cA = threadIdx.z;
                while(cA < iColsA)
                {
                    float* t_pMatU_A_full_cur = t_pMatU_A_full + (cA*p_iLeadFieldRows);
                    float* t_pCor_cur = Cor + (cB*iColsA+cA);
                    *t_pCor_cur = 0;

                    cuScalarProductY_shared( t_pMatU_A_full_cur, U_B_cur, p_iLeadFieldRows, t_pCacheY, t_pCor_cur );
                    __syncthreads();
//                     for( int rAB = 0; rAB < p_iLeadFieldRows; ++rAB)
//                         *t_pCor_cur += t_pMatU_A_full_cur[rAB]*U_B_cur[rAB];

                    cA += blockDim.z;
                }
                __syncthreads();
            }
        }

    //Part 3
        int rows = p_iColsB;
        int cols = iColsA;

        if (p_iColsB < iColsA)
        {
            rows = iColsA;
            cols = p_iColsB;
        }

        //cols are maximal iColsA = 6.
        //That's why we can use w and shared cache again. they are 6 width
        cuSVD_W_shared( Cor, rows, cols, w, t_pSVDCache, t_pCacheYZ);
//        cuSVD_W( Cor, rows, cols, w);
        __syncthreads();
        
        p_pRoh[t_iCurrentIdx] = 0;
        if(threadIdx.y == 0 && threadIdx.z == 0)
            for(int i = 0; i < cols; ++i)
                if (p_pRoh[t_iCurrentIdx] < w[i])
                    p_pRoh[t_iCurrentIdx] = w[i];

        __syncthreads();

         t_iCombIdx += gridDim.x*t_iNumPairMatsPerBlock;
    }

    __syncthreads();
}

}//Namespace
	.text
	.file	"rapmusic_kernel.hip"
	.globl	_ZN6HPCLib37__device_stub__cuCalcPairCombinationsEiiPi # -- Begin function _ZN6HPCLib37__device_stub__cuCalcPairCombinationsEiiPi
	.type	_ZN6HPCLib37__device_stub__cuCalcPairCombinationsEiiPi,@function
_ZN6HPCLib37__device_stub__cuCalcPairCombinationsEiiPi: # @_ZN6HPCLib37__device_stub__cuCalcPairCombinationsEiiPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rcx
	movl	%esi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN6HPCLib22cuCalcPairCombinationsEiiPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_ZN6HPCLib37__device_stub__cuCalcPairCombinationsEiiPi, .Lfunc_end0-_ZN6HPCLib37__device_stub__cuCalcPairCombinationsEiiPi
	.cfi_endproc
                                        # -- End function
	.globl	_ZN6HPCLib24__device_stub__cuCalcU_BEPfiiS0_Pi # -- Begin function _ZN6HPCLib24__device_stub__cuCalcU_BEPfiiS0_Pi
	.type	_ZN6HPCLib24__device_stub__cuCalcU_BEPfiiS0_Pi,@function
_ZN6HPCLib24__device_stub__cuCalcU_BEPfiiS0_Pi: # @_ZN6HPCLib24__device_stub__cuCalcU_BEPfiiS0_Pi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rdi
	movl	%esi, (%rdi)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_ZN6HPCLib24__device_stub__cuCalcU_BEPfiiS0_Pi, .Lfunc_end1-_ZN6HPCLib24__device_stub__cuCalcU_BEPfiiS0_Pi
	.cfi_endproc
                                        # -- End function
	.globl	_ZN6HPCLib30__device_stub__RapMusicSubcorrEPfiiPiiS0_iS0_ # -- Begin function _ZN6HPCLib30__device_stub__RapMusicSubcorrEPfiiPiiS0_iS0_
	.type	_ZN6HPCLib30__device_stub__RapMusicSubcorrEPfiiPiiS0_iS0_,@function
_ZN6HPCLib30__device_stub__RapMusicSubcorrEPfiiPiiS0_iS0_: # @_ZN6HPCLib30__device_stub__RapMusicSubcorrEPfiiPiiS0_iS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_ZN6HPCLib30__device_stub__RapMusicSubcorrEPfiiPiiS0_iS0_, .Lfunc_end2-_ZN6HPCLib30__device_stub__RapMusicSubcorrEPfiiPiiS0_iS0_
	.cfi_endproc
                                        # -- End function
	.globl	_ZN6HPCLib29__device_stub__cuPowellIdxVecEiiPi # -- Begin function _ZN6HPCLib29__device_stub__cuPowellIdxVecEiiPi
	.type	_ZN6HPCLib29__device_stub__cuPowellIdxVecEiiPi,@function
_ZN6HPCLib29__device_stub__cuPowellIdxVecEiiPi: # @_ZN6HPCLib29__device_stub__cuPowellIdxVecEiiPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rcx
	movl	%esi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN6HPCLib14cuPowellIdxVecEiiPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_ZN6HPCLib29__device_stub__cuPowellIdxVecEiiPi, .Lfunc_end3-_ZN6HPCLib29__device_stub__cuPowellIdxVecEiiPi
	.cfi_endproc
                                        # -- End function
	.globl	_ZN6HPCLib36__device_stub__PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_ # -- Begin function _ZN6HPCLib36__device_stub__PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_
	.type	_ZN6HPCLib36__device_stub__PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_,@function
_ZN6HPCLib36__device_stub__PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_: # @_ZN6HPCLib36__device_stub__PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_ZN6HPCLib36__device_stub__PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_, .Lfunc_end4-_ZN6HPCLib36__device_stub__PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN6HPCLib22cuCalcPairCombinationsEiiPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN6HPCLib14cuPowellIdxVecEiiPi, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_ZN6HPCLib22cuCalcPairCombinationsEiiPi,@object # @_ZN6HPCLib22cuCalcPairCombinationsEiiPi
	.section	.rodata,"a",@progbits
	.globl	_ZN6HPCLib22cuCalcPairCombinationsEiiPi
	.p2align	3, 0x0
_ZN6HPCLib22cuCalcPairCombinationsEiiPi:
	.quad	_ZN6HPCLib37__device_stub__cuCalcPairCombinationsEiiPi
	.size	_ZN6HPCLib22cuCalcPairCombinationsEiiPi, 8

	.type	_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi,@object # @_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi
	.globl	_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi
	.p2align	3, 0x0
_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi:
	.quad	_ZN6HPCLib24__device_stub__cuCalcU_BEPfiiS0_Pi
	.size	_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi, 8

	.type	_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_,@object # @_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_
	.globl	_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_
	.p2align	3, 0x0
_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_:
	.quad	_ZN6HPCLib30__device_stub__RapMusicSubcorrEPfiiPiiS0_iS0_
	.size	_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_, 8

	.type	_ZN6HPCLib14cuPowellIdxVecEiiPi,@object # @_ZN6HPCLib14cuPowellIdxVecEiiPi
	.globl	_ZN6HPCLib14cuPowellIdxVecEiiPi
	.p2align	3, 0x0
_ZN6HPCLib14cuPowellIdxVecEiiPi:
	.quad	_ZN6HPCLib29__device_stub__cuPowellIdxVecEiiPi
	.size	_ZN6HPCLib14cuPowellIdxVecEiiPi, 8

	.type	_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_,@object # @_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_
	.globl	_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_
	.p2align	3, 0x0
_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_:
	.quad	_ZN6HPCLib36__device_stub__PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_
	.size	_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_ZN6HPCLib22cuCalcPairCombinationsEiiPi"
	.size	.L__unnamed_1, 40

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi"
	.size	.L__unnamed_2, 31

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_"
	.size	.L__unnamed_3, 43

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_ZN6HPCLib14cuPowellIdxVecEiiPi"
	.size	.L__unnamed_4, 32

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_"
	.size	.L__unnamed_5, 52

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _ZN6HPCLib37__device_stub__cuCalcPairCombinationsEiiPi
	.addrsig_sym _ZN6HPCLib24__device_stub__cuCalcU_BEPfiiS0_Pi
	.addrsig_sym _ZN6HPCLib30__device_stub__RapMusicSubcorrEPfiiPiiS0_iS0_
	.addrsig_sym _ZN6HPCLib29__device_stub__cuPowellIdxVecEiiPi
	.addrsig_sym _ZN6HPCLib36__device_stub__PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZN6HPCLib22cuCalcPairCombinationsEiiPi
	.addrsig_sym _ZN6HPCLib9cuCalcU_BEPfiiS0_Pi
	.addrsig_sym _ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_
	.addrsig_sym _ZN6HPCLib14cuPowellIdxVecEiiPi
	.addrsig_sym _ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text.unlikely.,"ax",@progbits
	.p2align	2                               ; -- Begin function __ockl_dm_alloc
	.type	__ockl_dm_alloc,@function
__ockl_dm_alloc:                        ; @__ockl_dm_alloc
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_or_saveexec_b32 s0, -1
	scratch_store_b32 off, v40, s32         ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s0
	v_writelane_b32 v40, s34, 0
	v_writelane_b32 v40, s35, 1
	v_writelane_b32 v40, s36, 2
	v_writelane_b32 v40, s37, 3
	v_writelane_b32 v40, s38, 4
	v_writelane_b32 v40, s39, 5
	v_writelane_b32 v40, s40, 6
	v_writelane_b32 v40, s41, 7
	v_writelane_b32 v40, s42, 8
	v_writelane_b32 v40, s43, 9
	v_writelane_b32 v40, s44, 10
	v_writelane_b32 v40, s30, 11
	v_writelane_b32 v40, s31, 12
	v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_ne_u64_e32 0, v[4:5]
	s_cbranch_execz .LBB0_702
; %bb.1:
	v_mbcnt_lo_u32_b32 v2, -1, 0
                                        ; implicit-def: $vgpr0_vgpr1
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u64_e32 0xc01, v[4:5]
	s_xor_b32 s23, exec_lo, s0
	s_cbranch_execz .LBB0_668
; %bb.2:
	v_max_u32_e32 v0, 16, v4
	v_mov_b32_e32 v5, 0
	s_load_b64 s[10:11], s[8:9], 0x60
	v_dual_mov_b32 v118, 1 :: v_dual_mov_b32 v17, 0x1800
	s_delay_alu instid0(VALU_DEP_3)
	v_clz_i32_u32_e32 v1, v0
	v_mov_b32_e32 v20, 0x200000
	v_mov_b32_e32 v8, v5
	v_mov_b32_e32 v14, 1
	v_mov_b32_e32 v68, 0x100
	v_not_b32_e32 v3, v1
	v_lshlrev_b32_e32 v1, 1, v1
	v_mov_b32_e32 v13, 3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, 15, v3
	v_lshlrev_b32_e64 v3, v3, 1
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s10, 0x1a800
	s_addc_u32 s13, s11, 0
	s_add_u32 s14, s10, 0x1a808
	v_lshrrev_b32_e32 v4, 1, v3
	v_cmp_gt_u32_e32 vcc_lo, v0, v3
	s_addc_u32 s15, s11, 0
	s_add_u32 s4, s10, 0x800
	s_addc_u32 s5, s11, 0
	v_or_b32_e32 v3, v4, v3
	v_cndmask_b32_e64 v6, 0, 1, vcc_lo
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __unnamed_1@rel32@lo+12
	s_addc_u32 s1, s1, __unnamed_1@rel32@hi+20
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+4
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+12
	s_add_u32 s6, s10, 0x1000
	v_cmp_gt_u32_e32 vcc_lo, v0, v3
	v_sub_nc_u32_e32 v1, v6, v1
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, 54, v1, vcc_lo
	v_lshlrev_b64 v[0:1], 7, v[7:8]
	v_lshlrev_b64 v[3:4], 5, v[7:8]
	v_lshrrev_b64 v[8:9], v7, 0xbf
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v32, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v33, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v34, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v35, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v36, vcc_lo, v3, s0
	v_add_co_ci_u32_e32 v37, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v38, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v39, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v48, vcc_lo, s6, v0
	s_add_u32 s0, s10, 0x2000
	v_add_co_ci_u32_e32 v49, vcc_lo, s7, v1, vcc_lo
	s_addc_u32 s1, s11, 0
	v_add_co_u32 v50, vcc_lo, s0, v0
	s_add_u32 s2, s10, 0x1800
	v_add_co_ci_u32_e32 v51, vcc_lo, s1, v1, vcc_lo
	s_addc_u32 s3, s11, 0
	v_add_co_u32 v52, vcc_lo, s2, v0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __unnamed_1@rel32@lo+24
	s_addc_u32 s1, s1, __unnamed_1@rel32@hi+32
	v_add_co_ci_u32_e32 v53, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v54, vcc_lo, v3, s0
	v_and_b32_e32 v0, 1, v8
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+20
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+28
	v_add_co_ci_u32_e32 v55, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v64, vcc_lo, v3, s2
	v_mov_b32_e32 v9, v5
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, __unnamed_1@rel32@lo+28
	s_addc_u32 s5, s5, __unnamed_1@rel32@hi+36
	v_add_co_ci_u32_e32 v65, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v66, vcc_lo, v3, s4
	v_cmp_eq_u32_e64 s0, 1, v0
	v_mov_b32_e32 v0, 0
	v_add_co_ci_u32_e32 v67, vcc_lo, s5, v4, vcc_lo
	v_mov_b32_e32 v8, v5
	v_dual_mov_b32 v10, v5 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v3, v14
	s_add_u32 s24, s10, 0x100
	s_mov_b32 s4, 0
	s_addc_u32 s25, s11, 0
.LBB0_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
                                        ;       Child Loop BB0_11 Depth 3
                                        ;         Child Loop BB0_14 Depth 4
                                        ;         Child Loop BB0_43 Depth 4
                                        ;           Child Loop BB0_47 Depth 5
                                        ;           Child Loop BB0_75 Depth 5
                                        ;             Child Loop BB0_93 Depth 6
                                        ;             Child Loop BB0_101 Depth 6
                                        ;             Child Loop BB0_107 Depth 6
                                        ;             Child Loop BB0_116 Depth 6
                                        ;             Child Loop BB0_121 Depth 6
                                        ;             Child Loop BB0_123 Depth 6
                                        ;             Child Loop BB0_144 Depth 6
                                        ;             Child Loop BB0_152 Depth 6
                                        ;             Child Loop BB0_158 Depth 6
                                        ;             Child Loop BB0_167 Depth 6
                                        ;             Child Loop BB0_175 Depth 6
                                        ;             Child Loop BB0_178 Depth 6
                                        ;             Child Loop BB0_180 Depth 6
                                        ;             Child Loop BB0_182 Depth 6
                                        ;             Child Loop BB0_184 Depth 6
                                        ;             Child Loop BB0_186 Depth 6
                                        ;             Child Loop BB0_188 Depth 6
                                        ;             Child Loop BB0_210 Depth 6
                                        ;             Child Loop BB0_218 Depth 6
                                        ;             Child Loop BB0_224 Depth 6
                                        ;             Child Loop BB0_233 Depth 6
                                        ;             Child Loop BB0_240 Depth 6
                                        ;             Child Loop BB0_243 Depth 6
                                        ;             Child Loop BB0_248 Depth 6
                                        ;             Child Loop BB0_255 Depth 6
                                        ;             Child Loop BB0_288 Depth 6
                                        ;             Child Loop BB0_296 Depth 6
                                        ;             Child Loop BB0_302 Depth 6
                                        ;             Child Loop BB0_311 Depth 6
                                        ;           Child Loop BB0_320 Depth 5
                                        ;           Child Loop BB0_323 Depth 5
                                        ;           Child Loop BB0_325 Depth 5
                                        ;           Child Loop BB0_327 Depth 5
                                        ;           Child Loop BB0_329 Depth 5
                                        ;           Child Loop BB0_331 Depth 5
                                        ;           Child Loop BB0_333 Depth 5
                                        ;       Child Loop BB0_347 Depth 3
                                        ;         Child Loop BB0_351 Depth 4
                                        ;         Child Loop BB0_378 Depth 4
                                        ;           Child Loop BB0_396 Depth 5
                                        ;           Child Loop BB0_404 Depth 5
                                        ;           Child Loop BB0_410 Depth 5
                                        ;           Child Loop BB0_419 Depth 5
                                        ;           Child Loop BB0_424 Depth 5
                                        ;           Child Loop BB0_426 Depth 5
                                        ;           Child Loop BB0_447 Depth 5
                                        ;           Child Loop BB0_455 Depth 5
                                        ;           Child Loop BB0_461 Depth 5
                                        ;           Child Loop BB0_470 Depth 5
                                        ;           Child Loop BB0_478 Depth 5
                                        ;           Child Loop BB0_481 Depth 5
                                        ;           Child Loop BB0_483 Depth 5
                                        ;           Child Loop BB0_485 Depth 5
                                        ;           Child Loop BB0_487 Depth 5
                                        ;           Child Loop BB0_489 Depth 5
                                        ;           Child Loop BB0_491 Depth 5
                                        ;           Child Loop BB0_513 Depth 5
                                        ;           Child Loop BB0_521 Depth 5
                                        ;           Child Loop BB0_527 Depth 5
                                        ;           Child Loop BB0_536 Depth 5
                                        ;           Child Loop BB0_543 Depth 5
                                        ;           Child Loop BB0_546 Depth 5
                                        ;           Child Loop BB0_551 Depth 5
                                        ;           Child Loop BB0_558 Depth 5
                                        ;           Child Loop BB0_591 Depth 5
                                        ;           Child Loop BB0_599 Depth 5
                                        ;           Child Loop BB0_605 Depth 5
                                        ;           Child Loop BB0_614 Depth 5
                                        ;         Child Loop BB0_623 Depth 4
                                        ;         Child Loop BB0_626 Depth 4
                                        ;         Child Loop BB0_628 Depth 4
                                        ;         Child Loop BB0_630 Depth 4
                                        ;         Child Loop BB0_632 Depth 4
                                        ;         Child Loop BB0_634 Depth 4
                                        ;         Child Loop BB0_636 Depth 4
                                        ;       Child Loop BB0_649 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v119, v3
	v_mov_b32_e32 v3, v5
	s_mov_b32 s26, exec_lo
	;;#ASMSTART
	;;#ASMEND
	v_cmpx_ne_u32_e32 0, v119
	s_cbranch_execz .LBB0_666
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	v_readfirstlane_b32 s1, v7
	s_mov_b32 s27, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e64 s1, v7
	s_cbranch_execz .LBB0_665
; %bb.5:                                ; %.preheader196.preheader
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_mov_b32_e32 v3, 1
.LBB0_6:                                ; %.preheader196
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_11 Depth 3
                                        ;         Child Loop BB0_14 Depth 4
                                        ;         Child Loop BB0_43 Depth 4
                                        ;           Child Loop BB0_47 Depth 5
                                        ;           Child Loop BB0_75 Depth 5
                                        ;             Child Loop BB0_93 Depth 6
                                        ;             Child Loop BB0_101 Depth 6
                                        ;             Child Loop BB0_107 Depth 6
                                        ;             Child Loop BB0_116 Depth 6
                                        ;             Child Loop BB0_121 Depth 6
                                        ;             Child Loop BB0_123 Depth 6
                                        ;             Child Loop BB0_144 Depth 6
                                        ;             Child Loop BB0_152 Depth 6
                                        ;             Child Loop BB0_158 Depth 6
                                        ;             Child Loop BB0_167 Depth 6
                                        ;             Child Loop BB0_175 Depth 6
                                        ;             Child Loop BB0_178 Depth 6
                                        ;             Child Loop BB0_180 Depth 6
                                        ;             Child Loop BB0_182 Depth 6
                                        ;             Child Loop BB0_184 Depth 6
                                        ;             Child Loop BB0_186 Depth 6
                                        ;             Child Loop BB0_188 Depth 6
                                        ;             Child Loop BB0_210 Depth 6
                                        ;             Child Loop BB0_218 Depth 6
                                        ;             Child Loop BB0_224 Depth 6
                                        ;             Child Loop BB0_233 Depth 6
                                        ;             Child Loop BB0_240 Depth 6
                                        ;             Child Loop BB0_243 Depth 6
                                        ;             Child Loop BB0_248 Depth 6
                                        ;             Child Loop BB0_255 Depth 6
                                        ;             Child Loop BB0_288 Depth 6
                                        ;             Child Loop BB0_296 Depth 6
                                        ;             Child Loop BB0_302 Depth 6
                                        ;             Child Loop BB0_311 Depth 6
                                        ;           Child Loop BB0_320 Depth 5
                                        ;           Child Loop BB0_323 Depth 5
                                        ;           Child Loop BB0_325 Depth 5
                                        ;           Child Loop BB0_327 Depth 5
                                        ;           Child Loop BB0_329 Depth 5
                                        ;           Child Loop BB0_331 Depth 5
                                        ;           Child Loop BB0_333 Depth 5
                                        ;       Child Loop BB0_347 Depth 3
                                        ;         Child Loop BB0_351 Depth 4
                                        ;         Child Loop BB0_378 Depth 4
                                        ;           Child Loop BB0_396 Depth 5
                                        ;           Child Loop BB0_404 Depth 5
                                        ;           Child Loop BB0_410 Depth 5
                                        ;           Child Loop BB0_419 Depth 5
                                        ;           Child Loop BB0_424 Depth 5
                                        ;           Child Loop BB0_426 Depth 5
                                        ;           Child Loop BB0_447 Depth 5
                                        ;           Child Loop BB0_455 Depth 5
                                        ;           Child Loop BB0_461 Depth 5
                                        ;           Child Loop BB0_470 Depth 5
                                        ;           Child Loop BB0_478 Depth 5
                                        ;           Child Loop BB0_481 Depth 5
                                        ;           Child Loop BB0_483 Depth 5
                                        ;           Child Loop BB0_485 Depth 5
                                        ;           Child Loop BB0_487 Depth 5
                                        ;           Child Loop BB0_489 Depth 5
                                        ;           Child Loop BB0_491 Depth 5
                                        ;           Child Loop BB0_513 Depth 5
                                        ;           Child Loop BB0_521 Depth 5
                                        ;           Child Loop BB0_527 Depth 5
                                        ;           Child Loop BB0_536 Depth 5
                                        ;           Child Loop BB0_543 Depth 5
                                        ;           Child Loop BB0_546 Depth 5
                                        ;           Child Loop BB0_551 Depth 5
                                        ;           Child Loop BB0_558 Depth 5
                                        ;           Child Loop BB0_591 Depth 5
                                        ;           Child Loop BB0_599 Depth 5
                                        ;           Child Loop BB0_605 Depth 5
                                        ;           Child Loop BB0_614 Depth 5
                                        ;         Child Loop BB0_623 Depth 4
                                        ;         Child Loop BB0_626 Depth 4
                                        ;         Child Loop BB0_628 Depth 4
                                        ;         Child Loop BB0_630 Depth 4
                                        ;         Child Loop BB0_632 Depth 4
                                        ;         Child Loop BB0_634 Depth 4
                                        ;         Child Loop BB0_636 Depth 4
                                        ;       Child Loop BB0_649 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v128, v3 :: v_dual_mov_b32 v3, 0
	s_mov_b32 s28, exec_lo
	;;#ASMSTART
	;;#ASMEND
	v_cmpx_ne_u32_e32 0, v128
	s_cbranch_execz .LBB0_664
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=2
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_6 Depth=2
	global_load_b32 v3, v[32:33], off glc
.LBB0_9:                                ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s29, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_gt_u32 s29, 0x100ff
	s_cbranch_scc0 .LBB0_344
; %bb.10:                               ;   in Loop: Header=BB0_6 Depth=2
	v_mbcnt_lo_u32_b32 v129, exec_lo, 0
	v_mov_b32_e32 v4, v7
	s_mov_b32 s30, 0
	s_bcnt1_i32_b32 s31, exec_lo
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_11:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_14 Depth 4
                                        ;         Child Loop BB0_43 Depth 4
                                        ;           Child Loop BB0_47 Depth 5
                                        ;           Child Loop BB0_75 Depth 5
                                        ;             Child Loop BB0_93 Depth 6
                                        ;             Child Loop BB0_101 Depth 6
                                        ;             Child Loop BB0_107 Depth 6
                                        ;             Child Loop BB0_116 Depth 6
                                        ;             Child Loop BB0_121 Depth 6
                                        ;             Child Loop BB0_123 Depth 6
                                        ;             Child Loop BB0_144 Depth 6
                                        ;             Child Loop BB0_152 Depth 6
                                        ;             Child Loop BB0_158 Depth 6
                                        ;             Child Loop BB0_167 Depth 6
                                        ;             Child Loop BB0_175 Depth 6
                                        ;             Child Loop BB0_178 Depth 6
                                        ;             Child Loop BB0_180 Depth 6
                                        ;             Child Loop BB0_182 Depth 6
                                        ;             Child Loop BB0_184 Depth 6
                                        ;             Child Loop BB0_186 Depth 6
                                        ;             Child Loop BB0_188 Depth 6
                                        ;             Child Loop BB0_210 Depth 6
                                        ;             Child Loop BB0_218 Depth 6
                                        ;             Child Loop BB0_224 Depth 6
                                        ;             Child Loop BB0_233 Depth 6
                                        ;             Child Loop BB0_240 Depth 6
                                        ;             Child Loop BB0_243 Depth 6
                                        ;             Child Loop BB0_248 Depth 6
                                        ;             Child Loop BB0_255 Depth 6
                                        ;             Child Loop BB0_288 Depth 6
                                        ;             Child Loop BB0_296 Depth 6
                                        ;             Child Loop BB0_302 Depth 6
                                        ;             Child Loop BB0_311 Depth 6
                                        ;           Child Loop BB0_320 Depth 5
                                        ;           Child Loop BB0_323 Depth 5
                                        ;           Child Loop BB0_325 Depth 5
                                        ;           Child Loop BB0_327 Depth 5
                                        ;           Child Loop BB0_329 Depth 5
                                        ;           Child Loop BB0_331 Depth 5
                                        ;           Child Loop BB0_333 Depth 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[15:16], 7, v[4:5]
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e64 s1, 0, v129
	v_mov_b32_e32 v6, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=3
	v_add_co_u32 v18, vcc_lo, s10, v15
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v16, vcc_lo
	global_load_b32 v6, v[18:19], off glc
.LBB0_13:                               ;   in Loop: Header=BB0_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b64 v[18:19], 5, v[4:5]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+8
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v18, s2
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v19, vcc_lo
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v6
	global_load_b32 v3, v[18:19], off
	v_add_nc_u32_e32 v6, s2, v129
	s_mov_b32 s2, 0x10100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v18, 0xff00ff01, v6
	v_lshrrev_b32_e32 v18, 16, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v18, 0x10100, v18
	v_sub_nc_u32_e32 v6, v6, v18
	v_add_co_u32 v18, vcc_lo, s10, v15
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v16, vcc_lo
.LBB0_14:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr15_vgpr16
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_gt_u32_e32 0x100, v6
	s_xor_b32 s3, exec_lo, s3
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=4
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, 0x1800, v4, s[6:7]
	v_mad_u64_u32 v[15:16], null, v6, 24, v[21:22]
; %bb.16:                               ; %Flow1135
                                        ;   in Loop: Header=BB0_14 Depth=4
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_14 Depth=4
	s_add_u32 s6, s10, 0x2800
	v_add_nc_u32_e32 v21, 0xffffff00, v6
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[15:16], null, 0x1800, v4, s[6:7]
	v_lshrrev_b32_e32 v23, 8, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, v23, 24, v[15:16]
	v_and_b32_e32 v23, 0xff, v6
	global_load_b64 v[21:22], v[21:22], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[15:16], null, v23, 24, v[21:22]
.LBB0_18:                               ;   in Loop: Header=BB0_14 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v15, v[15:16], off offset:16 glc
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v15, v3
	s_cbranch_vccz .LBB0_20
; %bb.19:                               ;   in Loop: Header=BB0_14 Depth=4
	s_ctz_i32_b32 s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s3, s3, 2
	v_mov_b32_e32 v15, s3
	ds_bpermute_b32 v15, v15, v6
	s_branch .LBB0_21
.LBB0_20:                               ;   in Loop: Header=BB0_14 Depth=4
	v_mov_b32_e32 v15, -1
.LBB0_21:                               ;   in Loop: Header=BB0_14 Depth=4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v15
	s_cmp_eq_u32 s5, -1
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_24
; %bb.22:                               ;   in Loop: Header=BB0_14 Depth=4
	s_cmpk_lt_u32 s5, 0x100
	s_cbranch_scc0 .LBB0_25
; %bb.23:                               ;   in Loop: Header=BB0_14 Depth=4
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, 0x1800, v4, s[6:7]
	s_mov_b32 s6, 0
	v_mad_u64_u32 v[15:16], null, s5, 24, v[21:22]
	s_branch .LBB0_26
.LBB0_24:                               ;   in Loop: Header=BB0_14 Depth=4
	s_mov_b32 s5, -1
                                        ; implicit-def: $vgpr15_vgpr16
	s_branch .LBB0_29
.LBB0_25:                               ;   in Loop: Header=BB0_14 Depth=4
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr15_vgpr16
.LBB0_26:                               ; %Flow1128
                                        ;   in Loop: Header=BB0_14 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_28
; %bb.27:                               ;   in Loop: Header=BB0_14 Depth=4
	s_add_i32 s6, s5, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_lshr_b32 s16, s6, 8
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_and_b32 s5, s5, 0xff
	v_mad_u64_u32 v[15:16], null, 0x1800, v4, s[6:7]
	v_mad_u64_u32 v[21:22], null, s16, 24, v[15:16]
	global_load_b64 v[21:22], v[21:22], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[15:16], null, s5, 24, v[21:22]
.LBB0_28:                               ; %Flow1129
                                        ;   in Loop: Header=BB0_14 Depth=4
	s_mov_b32 s5, 0
.LBB0_29:                               ; %Flow1131
                                        ;   in Loop: Header=BB0_14 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_33
; %bb.30:                               ;   in Loop: Header=BB0_14 Depth=4
	v_add_nc_u32_e32 v6, s31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v15, 0xff00ff01, v6
	v_lshrrev_b32_e32 v15, 16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v15, 0x10100, v15
	v_sub_nc_u32_e32 v6, v6, v15
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_32
; %bb.31:                               ;   in Loop: Header=BB0_14 Depth=4
	global_store_b32 v[18:19], v6, off
.LBB0_32:                               ;   in Loop: Header=BB0_14 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	v_dual_mov_b32 v16, v12 :: v_dual_mov_b32 v15, v11
	s_sub_i32 s2, s2, s31
.LBB0_33:                               ;   in Loop: Header=BB0_14 Depth=4
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB0_35
; %bb.34:                               ;   in Loop: Header=BB0_14 Depth=4
	s_mov_b32 s3, 0
	s_mov_b32 s5, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $vgpr6
	s_branch .LBB0_36
.LBB0_35:                               ;   in Loop: Header=BB0_14 Depth=4
	s_cmp_lt_i32 s2, 1
	s_mov_b32 s5, 0
	s_cselect_b32 s6, -1, 0
                                        ; implicit-def: $sgpr3
.LBB0_36:                               ; %Flow1137
                                        ;   in Loop: Header=BB0_14 Depth=4
	v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_14
; %bb.37:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB0_11 Depth=3
	v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_342
; %bb.38:                               ;   in Loop: Header=BB0_11 Depth=3
	v_and_b32_e32 v3, -2, v4
	v_mov_b32_e32 v11, 0
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e32 vcc_lo, v4, v7
	s_mov_b32 s3, 0
	v_cmp_gt_u32_e64 s2, 14, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s34, s2
	s_cbranch_execz .LBB0_341
; %bb.39:                               ;   in Loop: Header=BB0_11 Depth=3
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_41
; %bb.40:                               ;   in Loop: Header=BB0_11 Depth=3
	v_mov_b32_e32 v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 7, v[3:4]
	v_add_co_u32 v11, vcc_lo, s24, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s25, v12, vcc_lo
	global_load_b32 v4, v[11:12], off offset:2048 glc
.LBB0_41:                               ;   in Loop: Header=BB0_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s36, v4
	v_add_nc_u32_e32 v22, 2, v3
	s_mov_b32 s6, -1
	s_delay_alu instid0(VALU_DEP_2)
	s_cmp_gt_u32 s36, 0x100ff
	s_cbranch_scc1 .LBB0_340
; %bb.42:                               ;   in Loop: Header=BB0_11 Depth=3
	v_mov_b32_e32 v4, v5
	s_bcnt1_i32_b32 s35, exec_lo
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+76
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+84
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, __unnamed_1@rel32@lo+68
	s_addc_u32 s7, s7, __unnamed_1@rel32@hi+76
	s_add_u32 s1, s24, 0x800
	v_lshlrev_b64 v[11:12], 7, v[3:4]
	v_lshlrev_b64 v[3:4], 5, v[3:4]
	v_lshrrev_b64 v[15:16], v22, 0xbf
	v_mbcnt_lo_u32_b32 v130, exec_lo, 0
	v_mov_b32_e32 v23, v5
	v_mov_b32_e32 v24, v5
	v_add_co_u32 v70, vcc_lo, s24, v11
	v_add_co_ci_u32_e32 v71, vcc_lo, s25, v12, vcc_lo
	v_add_co_u32 v80, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v81, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v82, vcc_lo, v3, s6
	v_add_co_ci_u32_e32 v83, vcc_lo, s7, v4, vcc_lo
	s_addc_u32 s2, s25, 0
	v_add_co_u32 v84, vcc_lo, s1, v11
	s_add_u32 s1, s24, 0x1000
	v_add_co_ci_u32_e32 v85, vcc_lo, s2, v12, vcc_lo
	s_addc_u32 s2, s25, 0
	v_add_co_u32 v86, vcc_lo, s1, v11
	s_add_u32 s1, s24, 0x2000
	v_add_co_ci_u32_e32 v87, vcc_lo, s2, v12, vcc_lo
	s_addc_u32 s2, s25, 0
	v_add_co_u32 v96, vcc_lo, s1, v11
	s_add_u32 s1, s24, 0x1800
	v_add_co_ci_u32_e32 v97, vcc_lo, s2, v12, vcc_lo
	s_addc_u32 s5, s25, 0
	v_add_co_u32 v98, vcc_lo, s1, v11
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+88
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+96
	v_add_co_ci_u32_e32 v99, vcc_lo, s5, v12, vcc_lo
	v_add_co_u32 v100, vcc_lo, v3, s2
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, __unnamed_1@rel32@lo+84
	s_addc_u32 s7, s7, __unnamed_1@rel32@hi+92
	v_add_co_ci_u32_e32 v101, vcc_lo, s3, v4, vcc_lo
	v_and_b32_e32 v6, 1, v15
	v_add_co_u32 v102, vcc_lo, v3, s6
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+92
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+100
	v_add_co_ci_u32_e32 v103, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v112, vcc_lo, v3, s2
	v_cmp_eq_u32_e64 s1, 1, v6
	v_add_co_ci_u32_e32 v113, vcc_lo, s3, v4, vcc_lo
	v_mov_b32_e32 v25, v5
                                        ; implicit-def: $vgpr114_vgpr115
.LBB0_43:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_47 Depth 5
                                        ;           Child Loop BB0_75 Depth 5
                                        ;             Child Loop BB0_93 Depth 6
                                        ;             Child Loop BB0_101 Depth 6
                                        ;             Child Loop BB0_107 Depth 6
                                        ;             Child Loop BB0_116 Depth 6
                                        ;             Child Loop BB0_121 Depth 6
                                        ;             Child Loop BB0_123 Depth 6
                                        ;             Child Loop BB0_144 Depth 6
                                        ;             Child Loop BB0_152 Depth 6
                                        ;             Child Loop BB0_158 Depth 6
                                        ;             Child Loop BB0_167 Depth 6
                                        ;             Child Loop BB0_175 Depth 6
                                        ;             Child Loop BB0_178 Depth 6
                                        ;             Child Loop BB0_180 Depth 6
                                        ;             Child Loop BB0_182 Depth 6
                                        ;             Child Loop BB0_184 Depth 6
                                        ;             Child Loop BB0_186 Depth 6
                                        ;             Child Loop BB0_188 Depth 6
                                        ;             Child Loop BB0_210 Depth 6
                                        ;             Child Loop BB0_218 Depth 6
                                        ;             Child Loop BB0_224 Depth 6
                                        ;             Child Loop BB0_233 Depth 6
                                        ;             Child Loop BB0_240 Depth 6
                                        ;             Child Loop BB0_243 Depth 6
                                        ;             Child Loop BB0_248 Depth 6
                                        ;             Child Loop BB0_255 Depth 6
                                        ;             Child Loop BB0_288 Depth 6
                                        ;             Child Loop BB0_296 Depth 6
                                        ;             Child Loop BB0_302 Depth 6
                                        ;             Child Loop BB0_311 Depth 6
                                        ;           Child Loop BB0_320 Depth 5
                                        ;           Child Loop BB0_323 Depth 5
                                        ;           Child Loop BB0_325 Depth 5
                                        ;           Child Loop BB0_327 Depth 5
                                        ;           Child Loop BB0_329 Depth 5
                                        ;           Child Loop BB0_331 Depth 5
                                        ;           Child Loop BB0_333 Depth 5
	s_cmp_eq_u32 s36, 0
	s_mov_b32 s5, -1
	;;#ASMSTART
	;;#ASMEND
	s_cbranch_scc1 .LBB0_72
; %bb.44:                               ;   in Loop: Header=BB0_43 Depth=4
	v_cmp_eq_u32_e64 s2, 0, v130
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_46
; %bb.45:                               ;   in Loop: Header=BB0_43 Depth=4
	global_load_b32 v3, v[70:71], off glc
.LBB0_46:                               ;   in Loop: Header=BB0_43 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v6, v[80:81], off
	v_cvt_f32_u32_e32 v4, s36
	s_sub_i32 s3, 0, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, s3, v4
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s3, v3
	v_add_nc_u32_e32 v3, s3, v130
	s_mov_b32 s3, s36
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v11, v4, v11
	v_add_nc_u32_e32 v11, v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v11
	v_mul_lo_u32 v4, v4, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v12, v3, v4, vcc_lo
.LBB0_47:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x100, v12
	s_xor_b32 s6, exec_lo, s6
; %bb.48:                               ;   in Loop: Header=BB0_47 Depth=5
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, 0x1800, v22, s[16:17]
	v_mad_u64_u32 v[3:4], null, v12, 24, v[15:16]
; %bb.49:                               ; %Flow952
                                        ;   in Loop: Header=BB0_47 Depth=5
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB0_51
; %bb.50:                               ;   in Loop: Header=BB0_47 Depth=5
	s_add_u32 s16, s10, 0x2800
	v_add_nc_u32_e32 v15, 0xffffff00, v12
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	v_lshrrev_b32_e32 v18, 8, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v18, 24, v[3:4]
	v_and_b32_e32 v18, 0xff, v12
	global_load_b64 v[15:16], v[15:16], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v18, 24, v[15:16]
.LBB0_51:                               ;   in Loop: Header=BB0_47 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b32 v3, v[3:4], off offset:16 glc
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v3, v6
	s_cbranch_vccz .LBB0_53
; %bb.52:                               ;   in Loop: Header=BB0_47 Depth=5
	s_ctz_i32_b32 s6, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 2
	v_mov_b32_e32 v3, s6
	ds_bpermute_b32 v3, v3, v12
	s_branch .LBB0_54
.LBB0_53:                               ;   in Loop: Header=BB0_47 Depth=5
	v_mov_b32_e32 v3, -1
.LBB0_54:                               ;   in Loop: Header=BB0_47 Depth=5
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v3
	s_cmp_eq_u32 s7, -1
	s_cselect_b32 s6, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_57
; %bb.55:                               ;   in Loop: Header=BB0_47 Depth=5
	s_cmpk_lt_u32 s7, 0x100
	s_cbranch_scc0 .LBB0_58
; %bb.56:                               ;   in Loop: Header=BB0_47 Depth=5
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	s_mov_b32 s16, 0
	v_mad_u64_u32 v[15:16], null, s7, 24, v[3:4]
	s_branch .LBB0_59
.LBB0_57:                               ;   in Loop: Header=BB0_47 Depth=5
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr15_vgpr16
	s_branch .LBB0_62
.LBB0_58:                               ;   in Loop: Header=BB0_47 Depth=5
	s_mov_b32 s16, -1
                                        ; implicit-def: $vgpr15_vgpr16
.LBB0_59:                               ; %Flow946
                                        ;   in Loop: Header=BB0_47 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_61
; %bb.60:                               ;   in Loop: Header=BB0_47 Depth=5
	s_add_i32 s16, s7, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_lshr_b32 s18, s16, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_and_b32 s7, s7, 0xff
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	v_mad_u64_u32 v[15:16], null, s18, 24, v[3:4]
	global_load_b64 v[3:4], v[15:16], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[15:16], null, s7, 24, v[3:4]
.LBB0_61:                               ; %Flow947
                                        ;   in Loop: Header=BB0_47 Depth=5
	s_mov_b32 s7, 0
.LBB0_62:                               ; %Flow948
                                        ;   in Loop: Header=BB0_47 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB0_66
; %bb.63:                               ;   in Loop: Header=BB0_47 Depth=5
	v_add_nc_u32_e32 v3, s35, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v11
	v_mul_lo_u32 v4, v4, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v12, v3, v4, vcc_lo
	s_and_saveexec_b32 s7, s2
	s_cbranch_execz .LBB0_65
; %bb.64:                               ;   in Loop: Header=BB0_47 Depth=5
	global_store_b32 v[70:71], v12, off
.LBB0_65:                               ;   in Loop: Header=BB0_47 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
	v_dual_mov_b32 v15, v114 :: v_dual_mov_b32 v16, v115
	s_sub_i32 s3, s3, s35
.LBB0_66:                               ;   in Loop: Header=BB0_47 Depth=5
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccz .LBB0_68
; %bb.67:                               ;   in Loop: Header=BB0_47 Depth=5
	s_mov_b32 s6, 0
	s_mov_b32 s7, -1
	s_mov_b32 s16, -1
                                        ; implicit-def: $sgpr3
                                        ; implicit-def: $vgpr12
	s_branch .LBB0_69
.LBB0_68:                               ;   in Loop: Header=BB0_47 Depth=5
	s_cmp_lt_i32 s3, 1
	s_mov_b32 s7, 0
	s_cselect_b32 s16, -1, 0
                                        ; implicit-def: $sgpr6
.LBB0_69:                               ; %Flow954
                                        ;   in Loop: Header=BB0_47 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_71
; %bb.70:                               ;   in Loop: Header=BB0_47 Depth=5
	v_dual_mov_b32 v115, v16 :: v_dual_mov_b32 v114, v15
	s_branch .LBB0_47
.LBB0_71:                               ; %loop.exit.guard903
                                        ;   in Loop: Header=BB0_43 Depth=4
	v_dual_mov_b32 v115, v16 :: v_dual_mov_b32 v114, v15
	s_xor_b32 s2, s7, -1
	s_branch .LBB0_73
.LBB0_72:                               ;   in Loop: Header=BB0_43 Depth=4
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr15_vgpr16
                                        ; implicit-def: $sgpr6
.LBB0_73:                               ; %Flow1121
                                        ;   in Loop: Header=BB0_43 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB0_314
; %bb.74:                               ; %.loopexit188
                                        ;   in Loop: Header=BB0_43 Depth=4
	v_mbcnt_lo_u32_b32 v131, exec_lo, 0
                                        ; implicit-def: $vgpr116_vgpr117
.LBB0_75:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Loop Header: Depth=5
                                        ;             Child Loop BB0_93 Depth 6
                                        ;             Child Loop BB0_101 Depth 6
                                        ;             Child Loop BB0_107 Depth 6
                                        ;             Child Loop BB0_116 Depth 6
                                        ;             Child Loop BB0_121 Depth 6
                                        ;             Child Loop BB0_123 Depth 6
                                        ;             Child Loop BB0_144 Depth 6
                                        ;             Child Loop BB0_152 Depth 6
                                        ;             Child Loop BB0_158 Depth 6
                                        ;             Child Loop BB0_167 Depth 6
                                        ;             Child Loop BB0_175 Depth 6
                                        ;             Child Loop BB0_178 Depth 6
                                        ;             Child Loop BB0_180 Depth 6
                                        ;             Child Loop BB0_182 Depth 6
                                        ;             Child Loop BB0_184 Depth 6
                                        ;             Child Loop BB0_186 Depth 6
                                        ;             Child Loop BB0_188 Depth 6
                                        ;             Child Loop BB0_210 Depth 6
                                        ;             Child Loop BB0_218 Depth 6
                                        ;             Child Loop BB0_224 Depth 6
                                        ;             Child Loop BB0_233 Depth 6
                                        ;             Child Loop BB0_240 Depth 6
                                        ;             Child Loop BB0_243 Depth 6
                                        ;             Child Loop BB0_248 Depth 6
                                        ;             Child Loop BB0_255 Depth 6
                                        ;             Child Loop BB0_288 Depth 6
                                        ;             Child Loop BB0_296 Depth 6
                                        ;             Child Loop BB0_302 Depth 6
                                        ;             Child Loop BB0_311 Depth 6
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s2, 0, v131
	v_mov_b32_e32 v3, 0
	s_mov_b32 s18, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_77
; %bb.76:                               ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v3, v[84:85], off glc
.LBB0_77:                               ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s37, v3
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3)
	s_cmp_eq_u32 s37, 0x10100
	s_cbranch_scc1 .LBB0_137
; %bb.78:                               ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_80
; %bb.79:                               ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v69, v5
	global_atomic_cmpswap_b32 v3, v[86:87], v[68:69], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v3, 0x100, v3, vcc_lo
.LBB0_80:                               ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s38, v3
	s_cmp_lg_u32 s37, s38
	s_cbranch_scc1 .LBB0_138
; %bb.81:                               ;   in Loop: Header=BB0_75 Depth=5
	v_mbcnt_lo_u32_b32 v21, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v21
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_83
; %bb.82:                               ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v3, v[86:87], off glc
.LBB0_83:                               ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_mov_b32 s5, 2
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s20, 0x10100
	s_cbranch_scc1 .LBB0_171
; %bb.84:                               ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB0_88
; %bb.85:                               ;   in Loop: Header=BB0_75 Depth=5
	global_load_b64 v[28:29], v[96:97], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, s3, s6, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_co_ci_u32_e64 v4, s3, s7, v29, s3
	v_cmp_lt_u64_e64 s3, 0x752f, v[3:4]
	v_mov_b32_e32 v3, 1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s16, s3
	s_cbranch_execz .LBB0_87
; %bb.86:                               ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v27, s7
	global_atomic_cmpswap_b64 v[3:4], v[96:97], v[26:29], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s3, v[3:4], v[28:29]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 1, 2, s3
.LBB0_87:                               ; %Flow1110
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s16
.LBB0_88:                               ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_readfirstlane_b32 s39, v3
	s_mov_b32 s5, 1
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s39, 1
	s_cbranch_scc1 .LBB0_171
; %bb.89:                               ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s21, vcc_lo
	s_cbranch_execz .LBB0_118
; %bb.90:                               ;   in Loop: Header=BB0_75 Depth=5
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s3, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s3, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_96
; %bb.91:                               ;   in Loop: Header=BB0_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB0_95
; %bb.92:                               ; %.preheader3.i.i.i117.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_93:                               ; %.preheader3.i.i.i117
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v28
	v_and_b32_e32 v6, v16, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_93
; %bb.94:                               ; %Flow1104
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_95:                               ; %Flow1106
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_96:                               ; %.loopexit4.i.i.i112
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[26:29], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s40, s7, 24
	s_mul_hi_u32 s41, s6, 24
	s_mul_i32 s42, s6, 24
	s_and_saveexec_b32 s43, s3
	s_cbranch_execz .LBB0_98
; %bb.97:                               ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s41, s40
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v26, s42
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_98:                               ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s43
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_mov_b32_e32 v15, v5
	v_dual_mov_b32 v16, v5 :: v_dual_mov_b32 v31, s7
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v29, s5
	v_mov_b32_e32 v30, s6
	v_mov_b32_e32 v28, s4
	s_clause 0x3
	global_store_b128 v[11:12], v[15:18], off
	global_store_b128 v[11:12], v[28:31], off offset:16
	global_store_b128 v[11:12], v[28:31], off offset:32
	global_store_b128 v[11:12], v[28:31], off offset:48
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_106
; %bb.99:                               ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x1
	global_load_b64 v[134:135], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v132, s18 :: v_dual_mov_b32 v133, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[134:135], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[134:135]
	s_cbranch_execz .LBB0_102
; %bb.100:                              ; %.preheader1.i.i.i115.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_101:                              ; %.preheader1.i.i.i115
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s18 :: v_dual_mov_b32 v29, s19
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[28:31], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[30:31]
	v_dual_mov_b32 v31, v16 :: v_dual_mov_b32 v30, v15
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_101
.LBB0_102:                              ; %Flow1102
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[15:16], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_104
; %bb.103:                              ;   in Loop: Header=BB0_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[15:16], v[4:5], off offset:8
.LBB0_104:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[18:19], v[15:16], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	s_cbranch_vccnz .LBB0_106
; %bb.105:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v4, v[15:16], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[18:19], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_106:                              ; %Flow1103
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s41, s41, s40
	v_add_co_u32 v3, vcc_lo, v26, s42
	v_add_co_ci_u32_e32 v4, vcc_lo, s41, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_107:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_109
; %bb.108:                              ;   in Loop: Header=BB0_107 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_109:                              ;   in Loop: Header=BB0_107 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_111
; %bb.110:                              ;   in Loop: Header=BB0_107 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_112
.LBB0_111:                              ;   in Loop: Header=BB0_107 Depth=6
	s_mov_b32 s5, -1
.LBB0_112:                              ; %Flow1097
                                        ;   in Loop: Header=BB0_107 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_107
; %bb.113:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_117
; %bb.114:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17] offset:24 glc
	global_load_b64 v[18:19], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v28, vcc_lo, 0, v12, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v29, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v26, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v27, vcc_lo, s19, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[26:27]
	v_dual_cndmask_b32 v27, v27, v28 :: v_dual_cndmask_b32 v26, v26, v6
	v_mov_b32_e32 v28, v15
	v_and_b32_e32 v6, v27, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v26, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v18, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v6, vcc_lo
	global_store_b64 v[11:12], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[15:16]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_117
; %bb.115:                              ; %.preheader.i.i.i114.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s3, 0
.LBB0_116:                              ; %.preheader.i.i.i114
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[11:12], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[28:29]
	v_dual_mov_b32 v29, v16 :: v_dual_mov_b32 v28, v15
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_116
.LBB0_117:                              ; %Flow1095
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_118:                              ; %Flow1107
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s21
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s18, v3
	v_readfirstlane_b32 s19, v4
	s_cmp_eq_u64 s[18:19], 0
	s_cbranch_scc1 .LBB0_170
; %bb.119:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s3, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v11, s3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x300, v11
	s_cbranch_execz .LBB0_122
; %bb.120:                              ; %.preheader175.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_lshlrev_b32_e32 v3, 3, v11
	s_bcnt1_i32_b32 s6, s3
	s_mov_b32 s16, 0
	s_lshl_b32 s7, s6, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s3, s18, v3
	v_add_co_ci_u32_e64 v4, null, s19, 0, s3
.LBB0_121:                              ; %.preheader175
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v11, s6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, 0x2ff, v11
	global_store_b64 v[3:4], v[5:6], off
	v_add_co_u32 v3, s3, v3, s7
	v_add_co_ci_u32_e64 v4, s3, 0, v4, s3
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB0_121
.LBB0_122:                              ; %Flow1089
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $sgpr5
.LBB0_123:                              ; %.loopexit176
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e32 vcc_lo, 0, v21
	v_mov_b32_e32 v3, s20
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_125
; %bb.124:                              ;   in Loop: Header=BB0_123 Depth=6
	global_load_b32 v3, v[86:87], off glc
.LBB0_125:                              ;   in Loop: Header=BB0_123 Depth=6
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s3, s5
	s_cmp_lg_u32 s20, 0x10100
	s_cbranch_scc0 .LBB0_132
; %bb.126:                              ;   in Loop: Header=BB0_123 Depth=6
	v_mov_b32_e32 v3, s39
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_130
; %bb.127:                              ;   in Loop: Header=BB0_123 Depth=6
	s_add_i32 s3, s20, 0xffffff00
	v_mov_b32_e32 v6, v5
	s_lshr_b32 s3, s3, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	v_mad_u64_u32 v[11:12], null, s3, 24, v[3:4]
	v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s3, 0, v[3:4]
	v_mov_b32_e32 v3, s39
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s7, s3
	s_cbranch_execz .LBB0_129
; %bb.128:                              ;   in Loop: Header=BB0_123 Depth=6
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[86:87], v68, off
	v_mov_b32_e32 v3, 0
.LBB0_129:                              ; %Flow1082
                                        ;   in Loop: Header=BB0_123 Depth=6
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_130:                              ;   in Loop: Header=BB0_123 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_readfirstlane_b32 s3, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB0_133
; %bb.131:                              ;   in Loop: Header=BB0_123 Depth=6
	s_mov_b32 s6, 0
	s_and_not1_b32 vcc_lo, vcc_lo, exec_lo
	s_sleep 2
                                        ; implicit-def: $sgpr39
	s_branch .LBB0_134
.LBB0_132:                              ;   in Loop: Header=BB0_123 Depth=6
	s_mov_b32 s16, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr3
                                        ; implicit-def: $sgpr7
	s_branch .LBB0_135
.LBB0_133:                              ;   in Loop: Header=BB0_123 Depth=6
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr3
.LBB0_134:                              ; %Flow1086
                                        ;   in Loop: Header=BB0_123 Depth=6
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s17, vcc_lo, exec_lo
	s_mov_b32 s7, 0
	s_mov_b32 s16, 0
	s_or_b32 s5, s5, s17
.LBB0_135:                              ; %Flow1085
                                        ;   in Loop: Header=BB0_123 Depth=6
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_139
; %bb.136:                              ;   in Loop: Header=BB0_123 Depth=6
	s_mov_b32 s39, s3
	s_branch .LBB0_123
.LBB0_137:                              ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v117, v4 :: v_dual_mov_b32 v116, v3
	s_branch .LBB0_199
.LBB0_138:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s3, -1
                                        ; implicit-def: $sgpr18
	s_branch .LBB0_191
.LBB0_139:                              ; %loop.exit.guard909
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_169
; %bb.140:                              ;   in Loop: Header=BB0_75 Depth=5
	s_and_saveexec_b32 s40, s5
	s_cbranch_execz .LBB0_168
; %bb.141:                              ;   in Loop: Header=BB0_75 Depth=5
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s3, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s3, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_147
; %bb.142:                              ;   in Loop: Header=BB0_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB0_146
; %bb.143:                              ; %.preheader3.i.i.i124.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_144:                              ; %.preheader3.i.i.i124
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v28
	v_and_b32_e32 v6, v16, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_144
; %bb.145:                              ; %Flow1077
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_146:                              ; %Flow1079
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_147:                              ; %.loopexit4.i.i.i119
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[26:29], v5, s[16:17]
	v_readfirstlane_b32 s20, v11
	v_readfirstlane_b32 s21, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[20:21], s[6:7]
	s_mul_i32 s41, s7, 24
	s_mul_hi_u32 s42, s6, 24
	s_mul_i32 s43, s6, 24
	s_and_saveexec_b32 s44, s3
	s_cbranch_execz .LBB0_149
; %bb.148:                              ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s42, s41
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v26, s43
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_149:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s44
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, s19
	v_dual_mov_b32 v31, s7 :: v_dual_mov_b32 v30, s6
	v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v28, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[28:31], off offset:8
	global_store_b128 v[3:4], v[28:31], off offset:24
	global_store_b128 v[3:4], v[28:31], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_157
; %bb.150:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x1
	global_load_b64 v[134:135], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v132, s20 :: v_dual_mov_b32 v133, s21
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s21, v4
	v_and_b32_e32 v3, s20, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[134:135], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[134:135]
	s_cbranch_execz .LBB0_153
; %bb.151:                              ; %.preheader1.i.i.i122.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_152:                              ; %.preheader1.i.i.i122
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s20 :: v_dual_mov_b32 v29, s21
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[28:31], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[30:31]
	v_dual_mov_b32 v31, v12 :: v_dual_mov_b32 v30, v11
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_152
.LBB0_153:                              ; %Flow1075
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[11:12], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_155
; %bb.154:                              ;   in Loop: Header=BB0_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB0_155:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB0_157
; %bb.156:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_157:                              ; %Flow1076
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s42, s42, s41
	v_add_co_u32 v3, vcc_lo, v26, s43
	v_add_co_ci_u32_e32 v4, vcc_lo, s42, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_158:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_160
; %bb.159:                              ;   in Loop: Header=BB0_158 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_160:                              ;   in Loop: Header=BB0_158 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_162
; %bb.161:                              ;   in Loop: Header=BB0_158 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_163
.LBB0_162:                              ;   in Loop: Header=BB0_158 Depth=6
	s_mov_b32 s5, -1
.LBB0_163:                              ; %Flow1070
                                        ;   in Loop: Header=BB0_158 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_158
; %bb.164:                              ;   in Loop: Header=BB0_75 Depth=5
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB0_168
; %bb.165:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	global_load_b64 v[11:12], v5, s[16:17] offset:24 glc
	global_load_b64 v[15:16], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v28, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo
	v_mov_b32_e32 v29, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v27, v19, v21 :: v_dual_cndmask_b32 v26, v18, v6
	v_and_b32_e32 v4, v27, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v26, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_168
; %bb.166:                              ; %.preheader.i.i.i121.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s3, 0
.LBB0_167:                              ; %.preheader.i.i.i121
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[3:4], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_167
.LBB0_168:                              ; %Flow1080
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s40
	s_mov_b32 s7, s39
.LBB0_169:                              ; %Flow1081
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s39, s7
.LBB0_170:                              ; %Flow1091
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, s39
.LBB0_171:                              ; %__ockl_devmem_request.exit125
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s5, 0
	s_cselect_b32 s3, -1, 0
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_190
; %bb.172:                              ;   in Loop: Header=BB0_75 Depth=5
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s18, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_189
; %bb.173:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b64 v[3:4], v[96:97], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s6, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x7530, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_189
; %bb.174:                              ;   in Loop: Header=BB0_75 Depth=5
	v_sub_nc_u32_e32 v3, 0x7530, v3
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s7, s6, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s6, s16, s6
	s_addc_u32 s7, s17, s7
.LBB0_175:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x659
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB0_178
; %bb.176:                              ; %.preheader11.i138
                                        ;   in Loop: Header=BB0_175 Depth=6
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB0_175
.LBB0_177:                              ; %.preheader9.i137
                                        ;   in Loop: Header=BB0_178 Depth=6
	s_sleep 63
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_178:                              ; %Flow1061
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x326
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_177
; %bb.179:                              ; %Flow1058
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_add_u32 s20, s16, 0x18c
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB0_182
.LBB0_180:                              ; %.preheader7.i136
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 31
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x18c
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB0_180
	s_branch .LBB0_182
.LBB0_181:                              ; %.preheader5.i135
                                        ;   in Loop: Header=BB0_182 Depth=6
	s_sleep 15
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_182:                              ; %.loopexit8.i128
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0xc0
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_181
	s_branch .LBB0_184
.LBB0_183:                              ; %.preheader3.i134
                                        ;   in Loop: Header=BB0_184 Depth=6
	s_sleep 7
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_184:                              ; %Flow1052
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x59
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_183
	s_branch .LBB0_186
.LBB0_185:                              ; %.preheader1.i133
                                        ;   in Loop: Header=BB0_186 Depth=6
	s_sleep 3
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_186:                              ; %Flow1049
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 38
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_185
; %bb.187:                              ; %Flow1046
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_cmp_le_u64_e64 s16, s[6:7], s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_189
.LBB0_188:                              ; %.preheader.i132
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s16, s[6:7], s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_188
.LBB0_189:                              ; %__ockl_rtcwait_u32.exit139
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s18
	s_cmp_lg_u32 s5, 2
	v_mov_b32_e32 v117, s4
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v116, 0, 1, s5
.LBB0_190:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s18, 0
.LBB0_191:                              ; %Flow1113
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB0_199
; %bb.192:                              ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_196
; %bb.193:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b64 v[28:29], v[98:99], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s6, v28
	v_sub_co_ci_u32_e32 v4, vcc_lo, s7, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_u64_e32 vcc_lo, 0x4e1f, v[3:4]
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB0_195
; %bb.194:                              ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v27, s7
	global_atomic_cmpswap_b64 v[3:4], v[98:99], v[26:29], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[3:4], v[28:29]
	v_mov_b32_e32 v4, s4
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
.LBB0_195:                              ; %Flow1040
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_196:                              ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_readfirstlane_b32 s6, v3
	v_readfirstlane_b32 s7, v4
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc0 .LBB0_200
; %bb.197:                              ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
.LBB0_198:                              ; %Flow1039
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v117, v16 :: v_dual_mov_b32 v116, v15
.LBB0_199:                              ; %Flow1116
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_xor_b32 s2, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_75
	s_branch .LBB0_315
.LBB0_200:                              ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v15 :: v_dual_mov_b32 v4, v16
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_236
; %bb.201:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x1
	global_load_b64 v[3:4], v5, s[12:13] glc
	global_load_b64 v[11:12], v5, s[14:15]
	s_waitcnt vmcnt(0)
	v_cmp_ge_u64_e32 vcc_lo, v[3:4], v[11:12]
	s_cbranch_vccnz .LBB0_205
; %bb.202:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s5, exec_lo
	s_mov_b32 s2, exec_lo
	v_mbcnt_lo_u32_b32 v6, s5, 0
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB0_204
; %bb.203:                              ;   in Loop: Header=BB0_75 Depth=5
	s_bcnt1_i32_b32 s5, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s5, s5, 21
	v_mov_b32_e32 v4, s5
	global_atomic_add_u64 v[3:4], v5, v[4:5], s[12:13] glc
.LBB0_204:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v4
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x200000, v6, s[6:7]
	v_cmp_ge_u64_e64 s2, v[3:4], v[11:12]
	s_branch .LBB0_206
.LBB0_205:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr3_vgpr4
.LBB0_206:                              ; %Flow1037
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s20, s2
	s_cbranch_execz .LBB0_235
; %bb.207:                              ;   in Loop: Header=BB0_75 Depth=5
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_213
; %bb.208:                              ;   in Loop: Header=BB0_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v18, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB0_212
; %bb.209:                              ; %.preheader3.i.i.i145.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_210:                              ; %.preheader3.i.i.i145
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[16:17] offset:40
	global_load_b64 v[26:27], v5, s[16:17]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, v18, v28
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, v12 :: v_dual_and_b32 v6, v19, v29
	v_mad_u64_u32 v[18:19], null, v6, 24, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v12, v18
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_210
; %bb.211:                              ; %Flow1033
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_212:                              ; %Flow1035
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_213:                              ; %.loopexit4.i.i.i140
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[16:17] offset:40
	global_load_b128 v[26:29], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v18
	v_readfirstlane_b32 s7, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s21, s7, 24
	s_mul_hi_u32 s39, s6, 24
	s_mul_i32 s40, s6, 24
	s_and_saveexec_b32 s41, s2
	s_cbranch_execz .LBB0_215
; %bb.214:                              ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s39, s21
	s_waitcnt vmcnt(0)
	v_add_co_u32 v18, vcc_lo, v26, s40
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[18:19], v[11:14], off offset:8
.LBB0_215:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s41
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v31, s7
	v_dual_mov_b32 v19, v5 :: v_dual_mov_b32 v30, s6
	v_dual_mov_b32 v21, v5 :: v_dual_mov_b32 v28, s4
	v_mov_b32_e32 v29, s5
	s_clause 0x3
	global_store_b128 v[11:12], v[18:21], off
	global_store_b128 v[11:12], v[28:31], off offset:16
	global_store_b128 v[11:12], v[28:31], off offset:32
	global_store_b128 v[11:12], v[28:31], off offset:48
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_223
; %bb.216:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x1
	global_load_b64 v[134:135], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v132, s18 :: v_dual_mov_b32 v133, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[134:135], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[134:135]
	s_cbranch_execz .LBB0_219
; %bb.217:                              ; %.preheader1.i.i.i143.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_218:                              ; %.preheader1.i.i.i143
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s18 :: v_dual_mov_b32 v29, s19
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[28:31], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[30:31]
	v_dual_mov_b32 v31, v19 :: v_dual_mov_b32 v30, v18
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_218
.LBB0_219:                              ; %Flow1031
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[18:19], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_221
; %bb.220:                              ;   in Loop: Header=BB0_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[18:19], v[4:5], off offset:8
.LBB0_221:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[28:29], v[18:19], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[28:29]
	s_cbranch_vccnz .LBB0_223
; %bb.222:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v4, v[18:19], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[28:29], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_223:                              ; %Flow1032
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s39, s39, s21
	v_add_co_u32 v3, vcc_lo, v26, s40
	v_add_co_ci_u32_e32 v4, vcc_lo, s39, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_224:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_226
; %bb.225:                              ;   in Loop: Header=BB0_224 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_226:                              ;   in Loop: Header=BB0_224 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_228
; %bb.227:                              ;   in Loop: Header=BB0_224 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_229
.LBB0_228:                              ;   in Loop: Header=BB0_224 Depth=6
	s_mov_b32 s5, -1
.LBB0_229:                              ; %Flow1026
                                        ;   in Loop: Header=BB0_224 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_224
; %bb.230:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_234
; %bb.231:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17] offset:24 glc
	global_load_b64 v[28:29], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v26, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v27, vcc_lo, s19, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[26:27]
	v_dual_cndmask_b32 v27, v27, v21 :: v_dual_cndmask_b32 v26, v26, v6
	v_and_b32_e32 v6, v27, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v26, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, v28, v11
	v_mov_b32_e32 v28, v18
	v_add_co_ci_u32_e32 v12, vcc_lo, v29, v6, vcc_lo
	v_mov_b32_e32 v29, v19
	global_store_b64 v[11:12], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[18:19]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_234
; %bb.232:                              ; %.preheader.i.i.i142.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s2, 0
.LBB0_233:                              ; %.preheader.i.i.i142
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[11:12], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[28:29]
	v_dual_mov_b32 v29, v19 :: v_dual_mov_b32 v28, v18
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_233
.LBB0_234:                              ; %Flow1024
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_235:                              ; %Flow1038
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s20
.LBB0_236:                              ; %__ockl_devmem_request.exit146
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v3
	v_readfirstlane_b32 s17, v4
	s_cmp_eq_u64 s[16:17], 0
	s_cbranch_scc1 .LBB0_281
; %bb.237:                              ;   in Loop: Header=BB0_75 Depth=5
	v_mbcnt_lo_u32_b32 v4, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	global_load_b32 v6, v[82:83], off
	s_bcnt1_i32_b32 s3, exec_lo
	s_add_u32 s6, s16, 16
	s_addc_u32 s7, s17, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshrrev_b32_e32 v3, 5, v3
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s5, exec_lo, s2
	s_cbranch_execz .LBB0_245
; %bb.238:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v15, v[100:101], off
	s_mov_b32 s18, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB0_241
; %bb.239:                              ; %.preheader172.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s19, s3, 2
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB0_240:                              ; %.preheader172
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_add_nc_u32_e32 v16, s3, v16
	global_store_b32 v[11:12], v5, off
	v_add_co_u32 v11, s2, v11, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s2, 0, v12, s2
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB0_240
.LBB0_241:                              ; %Flow1013
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s18
	global_load_b32 v16, v[102:103], off
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v15, v4, v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v11, v6
	s_cbranch_execz .LBB0_244
; %bb.242:                              ; %.preheader170.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_mul_lo_u32 v12, v15, s3
	s_mov_b32 s18, 0
.LBB0_243:                              ; %.preheader170
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_lshlrev_b32_e64 v15, v11, 1
	v_lshrrev_b32_e32 v16, 3, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v11, v12
	v_and_b32_e32 v16, 0x1ffffffc, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v11, v6
	global_store_b32 v16, v15, s[6:7]
	s_or_b32 s18, vcc_lo, s18
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB0_243
.LBB0_244:                              ; %Flow1010
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_245:                              ; %Flow1018
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_and_not1_saveexec_b32 s5, s5
	s_cbranch_execz .LBB0_250
; %bb.246:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s18, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB0_249
; %bb.247:                              ; %.preheader.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v15, v[112:113], off
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s19, s3, 2
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB0_248:                              ; %.preheader
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_add_nc_u32_e32 v16, s3, v16
	s_waitcnt vmcnt(0)
	global_store_b32 v[11:12], v15, off
	v_add_co_u32 v11, s2, v11, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s2, 0, v12, s2
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB0_248
.LBB0_249:                              ; %Flow1016
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s18
.LBB0_250:                              ; %.loopexit
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_254
; %bb.251:                              ;   in Loop: Header=BB0_75 Depth=5
	v_and_b32_e32 v6, 31, v6
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v6
	s_cbranch_execz .LBB0_253
; %bb.252:                              ;   in Loop: Header=BB0_75 Depth=5
	v_add_nc_u32_e32 v4, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v11, v[3:4], off
	s_waitcnt vmcnt(0)
	v_lshl_or_b32 v6, -1, v6, v11
	global_store_b32 v[3:4], v6, off
.LBB0_253:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	global_store_b128 v5, v[22:25], s[16:17]
.LBB0_254:                              ; %Flow1007
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $sgpr5
.LBB0_255:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e64 s2, 0, v131
	v_mov_b32_e32 v3, s37
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_257
; %bb.256:                              ;   in Loop: Header=BB0_255 Depth=6
	global_load_b32 v3, v[84:85], off glc
.LBB0_257:                              ;   in Loop: Header=BB0_255 Depth=6
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s37, v3
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s5, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s3, s5
	s_cmp_eq_u32 s37, 0x10100
	s_cbranch_scc1 .LBB0_264
; %bb.258:                              ;   in Loop: Header=BB0_255 Depth=6
	v_mov_b32_e32 v3, s38
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_260
; %bb.259:                              ;   in Loop: Header=BB0_255 Depth=6
	global_load_b32 v3, v[86:87], off glc
.LBB0_260:                              ;   in Loop: Header=BB0_255 Depth=6
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s38, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u32 s37, s38
	s_cbranch_scc0 .LBB0_265
; %bb.261:                              ;   in Loop: Header=BB0_255 Depth=6
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_272
; %bb.262:                              ;   in Loop: Header=BB0_255 Depth=6
	s_cmpk_lt_u32 s37, 0x100
	s_cbranch_scc0 .LBB0_266
; %bb.263:                              ;   in Loop: Header=BB0_255 Depth=6
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[6:7]
	s_mov_b32 s6, 0
	v_mad_u64_u32 v[11:12], null, s37, 24, v[3:4]
	s_branch .LBB0_267
.LBB0_264:                              ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b64 s[2:3], 0
	s_mov_b32 s20, -1
	s_mov_b32 s18, 0
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB0_277
.LBB0_265:                              ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b32 s18, -1
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB0_276
.LBB0_266:                              ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_267:                              ; %Flow999
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_269
; %bb.268:                              ;   in Loop: Header=BB0_255 Depth=6
	s_add_i32 s6, s37, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s18, s6, 8
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[6:7]
	s_and_b32 s6, s37, 0xff
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s18, 24, v[3:4]
	global_load_b64 v[3:4], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4]
.LBB0_269:                              ;   in Loop: Header=BB0_255 Depth=6
	v_dual_mov_b32 v15, s37 :: v_dual_mov_b32 v4, s17
	v_dual_mov_b32 v3, s16 :: v_dual_mov_b32 v6, v5
	global_store_b32 v5, v15, s[16:17] offset:4
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off offset:8 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_271
; %bb.270:                              ;   in Loop: Header=BB0_255 Depth=6
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[84:85], v118, off
	v_dual_mov_b32 v3, v11 :: v_dual_mov_b32 v4, v12
.LBB0_271:                              ; %Flow997
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_272:                              ; %Flow1000
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v4
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc0 .LBB0_274
; %bb.273:                              ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
	s_branch .LBB0_275
.LBB0_274:                              ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b32 s19, 0
	s_and_not1_b32 s2, s2, exec_lo
	s_sleep 2
.LBB0_275:                              ; %Flow1005
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b32 s18, 0
.LBB0_276:                              ; %Flow1004
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_mov_b32 s20, 0
	s_or_b32 s5, s3, s2
                                        ; implicit-def: $sgpr2_sgpr3
.LBB0_277:                              ; %Flow1003
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_255
; %bb.278:                              ; %loop.exit.guard913
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s2
	s_and_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB0_198
; %bb.279:                              ; %loop.exit.guard914
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_xor_b32 s2, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB0_282
; %bb.280:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s18, 0
	s_branch .LBB0_283
.LBB0_281:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s18, 0
	s_branch .LBB0_198
.LBB0_282:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s18, -1
                                        ; implicit-def: $sgpr6_sgpr7
.LBB0_283:                              ; %Flow994
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_198
; %bb.284:                              ;   in Loop: Header=BB0_75 Depth=5
	s_and_saveexec_b32 s3, s5
	s_cbranch_execz .LBB0_313
; %bb.285:                              ;   in Loop: Header=BB0_75 Depth=5
	s_load_b64 s[18:19], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_291
; %bb.286:                              ;   in Loop: Header=BB0_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[18:19] offset:40
	global_load_b64 v[15:16], v5, s[18:19]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB0_290
; %bb.287:                              ; %.preheader3.i.i.i152.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_288:                              ; %.preheader3.i.i.i152
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[18:19] offset:40
	global_load_b64 v[18:19], v5, s[18:19]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v28
	v_and_b32_e32 v6, v16, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_288
; %bb.289:                              ; %Flow990
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_290:                              ; %Flow992
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_291:                              ; %.loopexit4.i.i.i147
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[18:19] offset:40
	global_load_b128 v[26:29], v5, s[18:19]
	v_readfirstlane_b32 s20, v11
	v_readfirstlane_b32 s21, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[20:21], s[6:7]
	s_mul_i32 s37, s7, 24
	s_mul_hi_u32 s38, s6, 24
	s_mul_i32 s39, s6, 24
	s_and_saveexec_b32 s40, s2
	s_cbranch_execz .LBB0_293
; %bb.292:                              ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s38, s37
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v26, s39
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_293:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s40
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v11, s16 :: v_dual_mov_b32 v12, s17
	v_dual_mov_b32 v31, s7 :: v_dual_mov_b32 v30, s6
	v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v28, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[28:31], off offset:8
	global_store_b128 v[3:4], v[28:31], off offset:24
	global_store_b128 v[3:4], v[28:31], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_301
; %bb.294:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x1
	global_load_b64 v[133:134], v5, s[18:19] offset:32 glc
	global_load_b64 v[3:4], v5, s[18:19] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v131, s20 :: v_dual_mov_b32 v132, s21
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s21, v4
	v_and_b32_e32 v3, s20, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[133:134], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[131:134], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[133:134]
	s_cbranch_execz .LBB0_297
; %bb.295:                              ; %.preheader1.i.i.i150.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_296:                              ; %.preheader1.i.i.i150
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s20 :: v_dual_mov_b32 v29, s21
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[28:31], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[30:31]
	v_dual_mov_b32 v31, v12 :: v_dual_mov_b32 v30, v11
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_296
.LBB0_297:                              ; %Flow988
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[11:12], v5, s[18:19] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_299
; %bb.298:                              ;   in Loop: Header=BB0_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB0_299:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB0_301
; %bb.300:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_301:                              ; %Flow989
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s38, s38, s37
	v_add_co_u32 v3, vcc_lo, v26, s39
	v_add_co_ci_u32_e32 v4, vcc_lo, s38, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_302:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_304
; %bb.303:                              ;   in Loop: Header=BB0_302 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_304:                              ;   in Loop: Header=BB0_302 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_306
; %bb.305:                              ;   in Loop: Header=BB0_302 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_307
.LBB0_306:                              ;   in Loop: Header=BB0_302 Depth=6
	s_mov_b32 s5, -1
.LBB0_307:                              ; %Flow983
                                        ;   in Loop: Header=BB0_302 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_302
; %bb.308:                              ;   in Loop: Header=BB0_75 Depth=5
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_312
; %bb.309:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[18:19] offset:40
	global_load_b64 v[11:12], v5, s[18:19] offset:24 glc
	global_load_b64 v[15:16], v5, s[18:19]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v28, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo
	v_mov_b32_e32 v29, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v27, v19, v21 :: v_dual_cndmask_b32 v26, v18, v6
	v_and_b32_e32 v4, v27, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v26, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_312
; %bb.310:                              ; %.preheader.i.i.i149.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s2, 0
.LBB0_311:                              ; %.preheader.i.i.i149
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[3:4], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_311
.LBB0_312:                              ; %Flow981
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v131, 0
.LBB0_313:                              ; %Flow993
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v15, v116 :: v_dual_mov_b32 v16, v117
	s_mov_b32 s18, -1
	s_branch .LBB0_198
.LBB0_314:                              ;   in Loop: Header=BB0_43 Depth=4
                                        ; implicit-def: $vgpr114_vgpr115
                                        ; implicit-def: $sgpr36
                                        ; implicit-def: $vgpr130
	s_branch .LBB0_338
.LBB0_315:                              ;   in Loop: Header=BB0_43 Depth=4
	v_cmp_ne_u64_e64 s5, 1, v[116:117]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_317
; %bb.316:                              ;   in Loop: Header=BB0_43 Depth=4
	v_dual_mov_b32 v114, v116 :: v_dual_mov_b32 v115, v117
	s_branch .LBB0_337
.LBB0_317:                              ;   in Loop: Header=BB0_43 Depth=4
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_334
; %bb.318:                              ;   in Loop: Header=BB0_43 Depth=4
	global_load_b64 v[3:4], v[98:99], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x4e20, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_334
; %bb.319:                              ;   in Loop: Header=BB0_43 Depth=4
	v_sub_nc_u32_e32 v3, 0x4e20, v3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
.LBB0_320:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x659
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB0_323
; %bb.321:                              ; %.preheader11.i166
                                        ;   in Loop: Header=BB0_320 Depth=5
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB0_320
.LBB0_322:                              ; %.preheader9.i165
                                        ;   in Loop: Header=BB0_323 Depth=5
	s_sleep 63
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_323:                              ; %Flow975
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x326
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB0_322
; %bb.324:                              ; %Flow972
                                        ;   in Loop: Header=BB0_43 Depth=4
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB0_327
.LBB0_325:                              ; %.preheader7.i164
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 31
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB0_325
	s_branch .LBB0_327
.LBB0_326:                              ; %.preheader5.i163
                                        ;   in Loop: Header=BB0_327 Depth=5
	s_sleep 15
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_327:                              ; %.loopexit8.i156
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0xc0
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB0_326
	s_branch .LBB0_329
.LBB0_328:                              ; %.preheader3.i162
                                        ;   in Loop: Header=BB0_329 Depth=5
	s_sleep 7
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_329:                              ; %Flow966
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x59
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB0_328
	s_branch .LBB0_331
.LBB0_330:                              ; %.preheader1.i161
                                        ;   in Loop: Header=BB0_331 Depth=5
	s_sleep 3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_331:                              ; %Flow963
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 38
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB0_330
; %bb.332:                              ; %Flow960
                                        ;   in Loop: Header=BB0_43 Depth=4
	v_cmp_le_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_334
.LBB0_333:                              ; %.preheader.i160
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_333
.LBB0_334:                              ; %__ockl_rtcwait_u32.exit167
                                        ;   in Loop: Header=BB0_43 Depth=4
	s_or_b32 exec_lo, exec_lo, s16
	v_mov_b32_e32 v3, s36
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v130
	s_cbranch_execz .LBB0_336
; %bb.335:                              ;   in Loop: Header=BB0_43 Depth=4
	global_load_b32 v3, v[84:85], off glc
.LBB0_336:                              ;   in Loop: Header=BB0_43 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s36, v3
.LBB0_337:                              ;   in Loop: Header=BB0_43 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v15, v114 :: v_dual_mov_b32 v16, v115
	s_mov_b32 s6, 0
.LBB0_338:                              ; %Flow1122
                                        ;   in Loop: Header=BB0_43 Depth=4
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_43
; %bb.339:                              ; %Flow1123
                                        ;   in Loop: Header=BB0_11 Depth=3
	v_mov_b32_e32 v22, v7
.LBB0_340:                              ; %Flow1124
                                        ;   in Loop: Header=BB0_11 Depth=3
	v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v4, v22
	s_and_b32 s3, s6, exec_lo
.LBB0_341:                              ; %Flow1126
                                        ;   in Loop: Header=BB0_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s34
.LBB0_342:                              ; %.loopexit187
                                        ;   in Loop: Header=BB0_11 Depth=3
	s_xor_b32 s1, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s1
	s_or_b32 s30, s1, s30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s30
	s_cbranch_execnz .LBB0_11
; %bb.343:                              ; %Flow1139
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s30
	s_mov_b32 s1, 0
	s_branch .LBB0_345
.LBB0_344:                              ;   in Loop: Header=BB0_6 Depth=2
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_345:                              ; %Flow1321
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_642
; %bb.346:                              ;   in Loop: Header=BB0_6 Depth=2
	v_mbcnt_lo_u32_b32 v70, exec_lo, 0
	s_bcnt1_i32_b32 s30, exec_lo
                                        ; implicit-def: $vgpr28_vgpr29
.LBB0_347:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_351 Depth 4
                                        ;         Child Loop BB0_378 Depth 4
                                        ;           Child Loop BB0_396 Depth 5
                                        ;           Child Loop BB0_404 Depth 5
                                        ;           Child Loop BB0_410 Depth 5
                                        ;           Child Loop BB0_419 Depth 5
                                        ;           Child Loop BB0_424 Depth 5
                                        ;           Child Loop BB0_426 Depth 5
                                        ;           Child Loop BB0_447 Depth 5
                                        ;           Child Loop BB0_455 Depth 5
                                        ;           Child Loop BB0_461 Depth 5
                                        ;           Child Loop BB0_470 Depth 5
                                        ;           Child Loop BB0_478 Depth 5
                                        ;           Child Loop BB0_481 Depth 5
                                        ;           Child Loop BB0_483 Depth 5
                                        ;           Child Loop BB0_485 Depth 5
                                        ;           Child Loop BB0_487 Depth 5
                                        ;           Child Loop BB0_489 Depth 5
                                        ;           Child Loop BB0_491 Depth 5
                                        ;           Child Loop BB0_513 Depth 5
                                        ;           Child Loop BB0_521 Depth 5
                                        ;           Child Loop BB0_527 Depth 5
                                        ;           Child Loop BB0_536 Depth 5
                                        ;           Child Loop BB0_543 Depth 5
                                        ;           Child Loop BB0_546 Depth 5
                                        ;           Child Loop BB0_551 Depth 5
                                        ;           Child Loop BB0_558 Depth 5
                                        ;           Child Loop BB0_591 Depth 5
                                        ;           Child Loop BB0_599 Depth 5
                                        ;           Child Loop BB0_605 Depth 5
                                        ;           Child Loop BB0_614 Depth 5
                                        ;         Child Loop BB0_623 Depth 4
                                        ;         Child Loop BB0_626 Depth 4
                                        ;         Child Loop BB0_628 Depth 4
                                        ;         Child Loop BB0_630 Depth 4
                                        ;         Child Loop BB0_632 Depth 4
                                        ;         Child Loop BB0_634 Depth 4
                                        ;         Child Loop BB0_636 Depth 4
	s_delay_alu instid0(VALU_DEP_2)
	s_cmp_eq_u32 s29, 0
	s_mov_b32 s5, -1
	;;#ASMSTART
	;;#ASMEND
	s_cbranch_scc1 .LBB0_375
; %bb.348:                              ;   in Loop: Header=BB0_347 Depth=3
	v_cmp_eq_u32_e64 s1, 0, v70
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_350
; %bb.349:                              ;   in Loop: Header=BB0_347 Depth=3
	global_load_b32 v3, v[34:35], off glc
.LBB0_350:                              ;   in Loop: Header=BB0_347 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	global_load_b32 v6, v[36:37], off
	v_cvt_f32_u32_e32 v4, s29
	s_sub_i32 s2, 0, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, s2, v4
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s2, v3
	v_add_nc_u32_e32 v3, s2, v70
	s_mov_b32 s2, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v11, v4, v11
	v_add_nc_u32_e32 v15, v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v15
	v_mul_lo_u32 v4, v4, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v16, v3, v4, vcc_lo
.LBB0_351:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x100, v16
	s_xor_b32 s3, exec_lo, s3
; %bb.352:                              ;   in Loop: Header=BB0_351 Depth=4
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, 0x1800, v7, s[6:7]
	v_mad_u64_u32 v[3:4], null, v16, 24, v[11:12]
; %bb.353:                              ; %Flow1148
                                        ;   in Loop: Header=BB0_351 Depth=4
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB0_355
; %bb.354:                              ;   in Loop: Header=BB0_351 Depth=4
	s_add_u32 s6, s10, 0x2800
	v_add_nc_u32_e32 v11, 0xffffff00, v16
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[6:7]
	v_lshrrev_b32_e32 v18, 8, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v18, 24, v[3:4]
	v_and_b32_e32 v18, 0xff, v16
	global_load_b64 v[11:12], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v18, 24, v[11:12]
.LBB0_355:                              ;   in Loop: Header=BB0_351 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v3, v[3:4], off offset:16 glc
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v3, v6
	s_cbranch_vccz .LBB0_357
; %bb.356:                              ;   in Loop: Header=BB0_351 Depth=4
	s_ctz_i32_b32 s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s3, s3, 2
	v_mov_b32_e32 v3, s3
	ds_bpermute_b32 v3, v3, v16
	s_branch .LBB0_358
.LBB0_357:                              ;   in Loop: Header=BB0_351 Depth=4
	v_mov_b32_e32 v3, -1
.LBB0_358:                              ;   in Loop: Header=BB0_351 Depth=4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v3
	s_cmp_eq_u32 s6, -1
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_361
; %bb.359:                              ;   in Loop: Header=BB0_351 Depth=4
	s_cmpk_lt_u32 s6, 0x100
	s_cbranch_scc0 .LBB0_362
; %bb.360:                              ;   in Loop: Header=BB0_351 Depth=4
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_mov_b32 s7, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4]
	s_branch .LBB0_363
.LBB0_361:                              ;   in Loop: Header=BB0_351 Depth=4
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr11_vgpr12
	s_branch .LBB0_366
.LBB0_362:                              ;   in Loop: Header=BB0_351 Depth=4
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_363:                              ; %Flow1141
                                        ;   in Loop: Header=BB0_351 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB0_365
; %bb.364:                              ;   in Loop: Header=BB0_351 Depth=4
	s_add_i32 s7, s6, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_lshr_b32 s7, s7, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_and_b32 s6, s6, 0xff
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4]
	global_load_b64 v[3:4], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4]
.LBB0_365:                              ; %Flow1142
                                        ;   in Loop: Header=BB0_351 Depth=4
	s_mov_b32 s6, 0
.LBB0_366:                              ; %Flow1144
                                        ;   in Loop: Header=BB0_351 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_370
; %bb.367:                              ;   in Loop: Header=BB0_351 Depth=4
	v_add_nc_u32_e32 v3, s30, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v15
	v_mul_lo_u32 v4, v4, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v16, v3, v4, vcc_lo
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_369
; %bb.368:                              ;   in Loop: Header=BB0_351 Depth=4
	global_store_b32 v[34:35], v16, off
.LBB0_369:                              ;   in Loop: Header=BB0_351 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v11, v28 :: v_dual_mov_b32 v12, v29
	s_sub_i32 s2, s2, s30
.LBB0_370:                              ;   in Loop: Header=BB0_351 Depth=4
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB0_372
; %bb.371:                              ;   in Loop: Header=BB0_351 Depth=4
	s_mov_b32 s3, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $vgpr16
	s_branch .LBB0_373
.LBB0_372:                              ;   in Loop: Header=BB0_351 Depth=4
	s_cmp_lt_i32 s2, 1
	s_mov_b32 s3, 0
	s_cselect_b32 s6, -1, 0
.LBB0_373:                              ; %Flow1150
                                        ;   in Loop: Header=BB0_351 Depth=4
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_351
; %bb.374:                              ; %loop.exit.guard922
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_xor_b32 s1, s3, -1
	s_branch .LBB0_376
.LBB0_375:                              ;   in Loop: Header=BB0_347 Depth=3
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_376:                              ; %Flow1317
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_617
; %bb.377:                              ; %.loopexit190
                                        ;   in Loop: Header=BB0_347 Depth=3
	v_mbcnt_lo_u32_b32 v71, exec_lo, 0
                                        ; implicit-def: $vgpr30_vgpr31
.LBB0_378:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_396 Depth 5
                                        ;           Child Loop BB0_404 Depth 5
                                        ;           Child Loop BB0_410 Depth 5
                                        ;           Child Loop BB0_419 Depth 5
                                        ;           Child Loop BB0_424 Depth 5
                                        ;           Child Loop BB0_426 Depth 5
                                        ;           Child Loop BB0_447 Depth 5
                                        ;           Child Loop BB0_455 Depth 5
                                        ;           Child Loop BB0_461 Depth 5
                                        ;           Child Loop BB0_470 Depth 5
                                        ;           Child Loop BB0_478 Depth 5
                                        ;           Child Loop BB0_481 Depth 5
                                        ;           Child Loop BB0_483 Depth 5
                                        ;           Child Loop BB0_485 Depth 5
                                        ;           Child Loop BB0_487 Depth 5
                                        ;           Child Loop BB0_489 Depth 5
                                        ;           Child Loop BB0_491 Depth 5
                                        ;           Child Loop BB0_513 Depth 5
                                        ;           Child Loop BB0_521 Depth 5
                                        ;           Child Loop BB0_527 Depth 5
                                        ;           Child Loop BB0_536 Depth 5
                                        ;           Child Loop BB0_543 Depth 5
                                        ;           Child Loop BB0_546 Depth 5
                                        ;           Child Loop BB0_551 Depth 5
                                        ;           Child Loop BB0_558 Depth 5
                                        ;           Child Loop BB0_591 Depth 5
                                        ;           Child Loop BB0_599 Depth 5
                                        ;           Child Loop BB0_605 Depth 5
                                        ;           Child Loop BB0_614 Depth 5
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s1, 0, v71
	v_mov_b32_e32 v3, 0
	s_mov_b32 s18, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_380
; %bb.379:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v3, v[32:33], off glc
.LBB0_380:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s31, v3
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3)
	s_cmp_eq_u32 s31, 0x10100
	s_cbranch_scc1 .LBB0_440
; %bb.381:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_383
; %bb.382:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v69, v5
	global_atomic_cmpswap_b32 v3, v[48:49], v[68:69], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v3, 0x100, v3, vcc_lo
.LBB0_383:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s34, v3
	s_cmp_lg_u32 s31, s34
	s_cbranch_scc1 .LBB0_441
; %bb.384:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mbcnt_lo_u32_b32 v27, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v27
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_386
; %bb.385:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v3, v[48:49], off glc
.LBB0_386:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_mov_b32 s16, 2
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s20, 0x10100
	s_cbranch_scc1 .LBB0_474
; %bb.387:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_391
; %bb.388:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b64 v[23:24], v[50:51], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, s2, s6, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_co_ci_u32_e64 v4, s2, s7, v24, s2
	v_cmp_lt_u64_e64 s2, 0x752f, v[3:4]
	v_mov_b32_e32 v3, 1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_390
; %bb.389:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v22, s7
	global_atomic_cmpswap_b64 v[3:4], v[50:51], v[21:24], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s2, v[3:4], v[23:24]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 1, 2, s2
.LBB0_390:                              ; %Flow1306
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_391:                              ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_readfirstlane_b32 s3, v3
	s_mov_b32 s16, 1
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s3, 1
	s_cbranch_scc1 .LBB0_474
; %bb.392:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s21, vcc_lo
	s_cbranch_execz .LBB0_421
; %bb.393:                              ;   in Loop: Header=BB0_378 Depth=4
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_399
; %bb.394:                              ;   in Loop: Header=BB0_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB0_398
; %bb.395:                              ; %.preheader3.i.i.i75.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_396:                              ; %.preheader3.i.i.i75
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v23
	v_and_b32_e32 v6, v16, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_396
; %bb.397:                              ; %Flow1300
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_398:                              ; %Flow1302
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_399:                              ; %.loopexit4.i.i.i70
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[21:24], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s35, s7, 24
	s_mul_hi_u32 s36, s6, 24
	s_mul_i32 s37, s6, 24
	s_and_saveexec_b32 s38, s2
	s_cbranch_execz .LBB0_401
; %bb.400:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s36, s35
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v21, s37
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_401:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s38
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v23, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v24, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_dual_mov_b32 v15, v5 :: v_dual_mov_b32 v26, s7
	v_dual_mov_b32 v16, v5 :: v_dual_mov_b32 v25, s6
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v23, s4
	v_mov_b32_e32 v24, s5
	s_clause 0x3
	global_store_b128 v[11:12], v[15:18], off
	global_store_b128 v[11:12], v[23:26], off offset:16
	global_store_b128 v[11:12], v[23:26], off offset:32
	global_store_b128 v[11:12], v[23:26], off offset:48
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_409
; %bb.402:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v80, s18 :: v_dual_mov_b32 v81, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v21, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[25:26], v[82:83]
	s_cbranch_execz .LBB0_405
; %bb.403:                              ; %.preheader1.i.i.i73.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_404:                              ; %.preheader1.i.i.i73
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v23, s18 :: v_dual_mov_b32 v24, s19
	s_sleep 1
	global_store_b64 v[3:4], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[23:26], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[25:26]
	v_dual_mov_b32 v26, v16 :: v_dual_mov_b32 v25, v15
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_404
.LBB0_405:                              ; %Flow1298
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[15:16], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_407
; %bb.406:                              ;   in Loop: Header=BB0_378 Depth=4
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[15:16], v[4:5], off offset:8
.LBB0_407:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[18:19], v[15:16], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	s_cbranch_vccnz .LBB0_409
; %bb.408:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v4, v[15:16], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[18:19], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_409:                              ; %Flow1299
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s36, s36, s35
	v_add_co_u32 v3, vcc_lo, v21, s37
	v_add_co_ci_u32_e32 v4, vcc_lo, s36, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_410:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_412
; %bb.411:                              ;   in Loop: Header=BB0_410 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_412:                              ;   in Loop: Header=BB0_410 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_414
; %bb.413:                              ;   in Loop: Header=BB0_410 Depth=5
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_415
.LBB0_414:                              ;   in Loop: Header=BB0_410 Depth=5
	s_mov_b32 s5, -1
.LBB0_415:                              ; %Flow1293
                                        ;   in Loop: Header=BB0_410 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_410
; %bb.416:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_420
; %bb.417:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17] offset:24 glc
	global_load_b64 v[18:19], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v12, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v24, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v21, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v22, vcc_lo, s19, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_dual_cndmask_b32 v22, v22, v23 :: v_dual_cndmask_b32 v21, v21, v6
	v_dual_mov_b32 v23, v15 :: v_dual_and_b32 v6, v22, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v21, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v18, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v6, vcc_lo
	global_store_b64 v[11:12], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[15:16]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_420
; %bb.418:                              ; %.preheader.i.i.i72.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s2, 0
.LBB0_419:                              ; %.preheader.i.i.i72
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[11:12], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[23:24]
	v_dual_mov_b32 v24, v16 :: v_dual_mov_b32 v23, v15
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_419
.LBB0_420:                              ; %Flow1291
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_421:                              ; %Flow1303
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s21
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s18, v3
	v_readfirstlane_b32 s19, v4
	s_cmp_eq_u64 s[18:19], 0
	s_cbranch_scc1 .LBB0_473
; %bb.422:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s2, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v11, s2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x300, v11
	s_cbranch_execz .LBB0_425
; %bb.423:                              ; %.preheader185.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_lshlrev_b32_e32 v3, 3, v11
	s_bcnt1_i32_b32 s6, s2
	s_mov_b32 s16, 0
	s_lshl_b32 s7, s6, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s2, s18, v3
	v_add_co_ci_u32_e64 v4, null, s19, 0, s2
.LBB0_424:                              ; %.preheader185
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v11, s6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, 0x2ff, v11
	global_store_b64 v[3:4], v[5:6], off
	v_add_co_u32 v3, s2, v3, s7
	v_add_co_ci_u32_e64 v4, s2, 0, v4, s2
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB0_424
.LBB0_425:                              ; %Flow1285
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $sgpr5
.LBB0_426:                              ; %.loopexit186
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e32 vcc_lo, 0, v27
	v_mov_b32_e32 v3, s20
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_428
; %bb.427:                              ;   in Loop: Header=BB0_426 Depth=5
	global_load_b32 v3, v[48:49], off glc
.LBB0_428:                              ;   in Loop: Header=BB0_426 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_and_not1_b32 s2, s5, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s2, s5
	s_cmp_lg_u32 s20, 0x10100
	s_cbranch_scc0 .LBB0_435
; %bb.429:                              ;   in Loop: Header=BB0_426 Depth=5
	v_mov_b32_e32 v3, s3
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_433
; %bb.430:                              ;   in Loop: Header=BB0_426 Depth=5
	s_add_i32 s2, s20, 0xffffff00
	v_mov_b32_e32 v6, v5
	s_lshr_b32 s2, s2, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	v_mad_u64_u32 v[11:12], null, s2, 24, v[3:4]
	v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s2, 0, v[3:4]
	v_mov_b32_e32 v3, s3
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s7, s2
	s_cbranch_execz .LBB0_432
; %bb.431:                              ;   in Loop: Header=BB0_426 Depth=5
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[48:49], v68, off
	v_mov_b32_e32 v3, 0
.LBB0_432:                              ; %Flow1278
                                        ;   in Loop: Header=BB0_426 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_433:                              ;   in Loop: Header=BB0_426 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc1 .LBB0_436
; %bb.434:                              ;   in Loop: Header=BB0_426 Depth=5
	s_mov_b32 s6, 0
	s_and_not1_b32 vcc_lo, vcc_lo, exec_lo
	s_sleep 2
                                        ; implicit-def: $sgpr3
	s_branch .LBB0_437
.LBB0_435:                              ;   in Loop: Header=BB0_426 Depth=5
	s_mov_b32 s16, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $sgpr7
	s_branch .LBB0_438
.LBB0_436:                              ;   in Loop: Header=BB0_426 Depth=5
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr2
.LBB0_437:                              ; %Flow1282
                                        ;   in Loop: Header=BB0_426 Depth=5
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s17, vcc_lo, exec_lo
	s_mov_b32 s7, 0
	s_mov_b32 s16, 0
	s_or_b32 s5, s5, s17
.LBB0_438:                              ; %Flow1281
                                        ;   in Loop: Header=BB0_426 Depth=5
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_442
; %bb.439:                              ;   in Loop: Header=BB0_426 Depth=5
	s_mov_b32 s3, s2
	s_branch .LBB0_426
.LBB0_440:                              ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v31, v4 :: v_dual_mov_b32 v30, v3
	s_branch .LBB0_502
.LBB0_441:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s5, -1
                                        ; implicit-def: $sgpr18
	s_branch .LBB0_494
.LBB0_442:                              ; %loop.exit.guard925
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_472
; %bb.443:                              ;   in Loop: Header=BB0_378 Depth=4
	s_and_saveexec_b32 s35, s5
	s_cbranch_execz .LBB0_471
; %bb.444:                              ;   in Loop: Header=BB0_378 Depth=4
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_450
; %bb.445:                              ;   in Loop: Header=BB0_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB0_449
; %bb.446:                              ; %.preheader3.i.i.i82.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_447:                              ; %.preheader3.i.i.i82
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v23
	v_and_b32_e32 v6, v16, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_447
; %bb.448:                              ; %Flow1273
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_449:                              ; %Flow1275
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_450:                              ; %.loopexit4.i.i.i77
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[21:24], v5, s[16:17]
	v_readfirstlane_b32 s20, v11
	v_readfirstlane_b32 s21, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[20:21], s[6:7]
	s_mul_i32 s36, s7, 24
	s_mul_hi_u32 s37, s6, 24
	s_mul_i32 s38, s6, 24
	s_and_saveexec_b32 s39, s2
	s_cbranch_execz .LBB0_452
; %bb.451:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s37, s36
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v21, s38
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_452:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s39
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v23, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v24, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, s19
	v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v25, s6
	v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v23, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[23:26], off offset:8
	global_store_b128 v[3:4], v[23:26], off offset:24
	global_store_b128 v[3:4], v[23:26], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_460
; %bb.453:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v80, s20 :: v_dual_mov_b32 v81, s21
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s21, v4
	v_and_b32_e32 v3, s20, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v21, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[25:26], v[82:83]
	s_cbranch_execz .LBB0_456
; %bb.454:                              ; %.preheader1.i.i.i80.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_455:                              ; %.preheader1.i.i.i80
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
	s_sleep 1
	global_store_b64 v[3:4], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[23:26], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[25:26]
	v_dual_mov_b32 v26, v12 :: v_dual_mov_b32 v25, v11
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_455
.LBB0_456:                              ; %Flow1271
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[11:12], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_458
; %bb.457:                              ;   in Loop: Header=BB0_378 Depth=4
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB0_458:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB0_460
; %bb.459:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_460:                              ; %Flow1272
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s37, s37, s36
	v_add_co_u32 v3, vcc_lo, v21, s38
	v_add_co_ci_u32_e32 v4, vcc_lo, s37, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_461:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_463
; %bb.462:                              ;   in Loop: Header=BB0_461 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_463:                              ;   in Loop: Header=BB0_461 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_465
; %bb.464:                              ;   in Loop: Header=BB0_461 Depth=5
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_466
.LBB0_465:                              ;   in Loop: Header=BB0_461 Depth=5
	s_mov_b32 s5, -1
.LBB0_466:                              ; %Flow1266
                                        ;   in Loop: Header=BB0_461 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_461
; %bb.467:                              ;   in Loop: Header=BB0_378 Depth=4
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_471
; %bb.468:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	global_load_b64 v[11:12], v5, s[16:17] offset:24 glc
	global_load_b64 v[15:16], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v23, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo
	v_mov_b32_e32 v24, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v22, v19, v21 :: v_dual_cndmask_b32 v21, v18, v6
	v_and_b32_e32 v4, v22, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v21, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_471
; %bb.469:                              ; %.preheader.i.i.i79.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s2, 0
.LBB0_470:                              ; %.preheader.i.i.i79
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[3:4], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_470
.LBB0_471:                              ; %Flow1276
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s35
	s_mov_b32 s7, s3
.LBB0_472:                              ; %Flow1277
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s3, s7
.LBB0_473:                              ; %Flow1287
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s16, s3
.LBB0_474:                              ; %__ockl_devmem_request.exit83
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s16, 0
	s_cselect_b32 s5, -1, 0
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_493
; %bb.475:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s17, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_492
; %bb.476:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b64 v[3:4], v[50:51], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x7530, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_492
; %bb.477:                              ;   in Loop: Header=BB0_378 Depth=4
	v_sub_nc_u32_e32 v3, 0x7530, v3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
.LBB0_478:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x659
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_481
; %bb.479:                              ; %.preheader11.i
                                        ;   in Loop: Header=BB0_478 Depth=5
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB0_478
.LBB0_480:                              ; %.preheader9.i
                                        ;   in Loop: Header=BB0_481 Depth=5
	s_sleep 63
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_481:                              ; %Flow1257
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x326
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB0_480
; %bb.482:                              ; %Flow1254
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_485
.LBB0_483:                              ; %.preheader7.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 31
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_483
	s_branch .LBB0_485
.LBB0_484:                              ; %.preheader5.i
                                        ;   in Loop: Header=BB0_485 Depth=5
	s_sleep 15
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_485:                              ; %.loopexit8.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0xc0
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB0_484
	s_branch .LBB0_487
.LBB0_486:                              ; %.preheader3.i
                                        ;   in Loop: Header=BB0_487 Depth=5
	s_sleep 7
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_487:                              ; %Flow1248
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x59
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB0_486
	s_branch .LBB0_489
.LBB0_488:                              ; %.preheader1.i
                                        ;   in Loop: Header=BB0_489 Depth=5
	s_sleep 3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_489:                              ; %Flow1245
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 38
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB0_488
; %bb.490:                              ; %Flow1242
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_cmp_le_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_492
.LBB0_491:                              ; %.preheader.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_491
.LBB0_492:                              ; %__ockl_rtcwait_u32.exit
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	s_cmp_lg_u32 s16, 2
	v_mov_b32_e32 v31, s4
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v30, 0, 1, s2
.LBB0_493:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s18, 0
.LBB0_494:                              ; %Flow1309
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_502
; %bb.495:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_499
; %bb.496:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b64 v[23:24], v[52:53], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v23
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_u64_e32 vcc_lo, 0x4e1f, v[3:4]
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_498
; %bb.497:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v21, s2 :: v_dual_mov_b32 v22, s3
	global_atomic_cmpswap_b64 v[3:4], v[52:53], v[21:24], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[3:4], v[23:24]
	v_mov_b32_e32 v4, s4
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
.LBB0_498:                              ; %Flow1236
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_499:                              ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_readfirstlane_b32 s2, v3
	v_readfirstlane_b32 s3, v4
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u64 s[2:3], 0
	s_cbranch_scc0 .LBB0_503
; %bb.500:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s2
.LBB0_501:                              ; %Flow1235
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v31, v16 :: v_dual_mov_b32 v30, v15
.LBB0_502:                              ; %Flow1312
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_xor_b32 s1, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_378
	s_branch .LBB0_618
.LBB0_503:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v15 :: v_dual_mov_b32 v4, v16
	s_and_saveexec_b32 s18, s1
	s_cbranch_execz .LBB0_539
; %bb.504:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x1
	global_load_b64 v[3:4], v5, s[12:13] glc
	global_load_b64 v[11:12], v5, s[14:15]
	s_waitcnt vmcnt(0)
	v_cmp_ge_u64_e32 vcc_lo, v[3:4], v[11:12]
	s_cbranch_vccnz .LBB0_508
; %bb.505:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s2, exec_lo
	s_mov_b32 s1, exec_lo
	v_mbcnt_lo_u32_b32 v6, s2, 0
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB0_507
; %bb.506:                              ;   in Loop: Header=BB0_378 Depth=4
	s_bcnt1_i32_b32 s2, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s2, s2, 21
	v_mov_b32_e32 v4, s2
	global_atomic_add_u64 v[3:4], v5, v[4:5], s[12:13] glc
.LBB0_507:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s3, v4
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x200000, v6, s[2:3]
	v_cmp_ge_u64_e64 s1, v[3:4], v[11:12]
	s_branch .LBB0_509
.LBB0_508:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr3_vgpr4
.LBB0_509:                              ; %Flow1233
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s19, s1
	s_cbranch_execz .LBB0_538
; %bb.510:                              ;   in Loop: Header=BB0_378 Depth=4
	s_load_b64 s[2:3], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s1, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s1, s1, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_516
; %bb.511:                              ;   in Loop: Header=BB0_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[2:3] offset:40
	global_load_b64 v[18:19], v5, s[2:3]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v18, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB0_515
; %bb.512:                              ; %.preheader3.i.i.i89.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_513:                              ; %.preheader3.i.i.i89
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[2:3] offset:40
	global_load_b64 v[21:22], v5, s[2:3]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, v18, v23
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, v12 :: v_dual_and_b32 v6, v19, v24
	v_mad_u64_u32 v[18:19], null, v6, 24, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v12, v18
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_513
; %bb.514:                              ; %Flow1229
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_515:                              ; %Flow1231
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_516:                              ; %.loopexit4.i.i.i84
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[2:3] offset:40
	global_load_b128 v[22:25], v5, s[2:3]
	v_readfirstlane_b32 s16, v11
	v_readfirstlane_b32 s17, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v18
	v_readfirstlane_b32 s7, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[16:17], s[6:7]
	s_mul_i32 s20, s7, 24
	s_mul_hi_u32 s21, s6, 24
	s_mul_i32 s35, s6, 24
	s_and_saveexec_b32 s36, s1
	s_cbranch_execz .LBB0_518
; %bb.517:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s21, s20
	s_waitcnt vmcnt(0)
	v_add_co_u32 v18, vcc_lo, v22, s35
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v23, vcc_lo
	global_store_b128 v[18:19], v[11:14], off offset:8
.LBB0_518:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s36
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v24, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v25, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v27, s7
	v_dual_mov_b32 v19, v5 :: v_dual_mov_b32 v26, s6
	v_dual_mov_b32 v21, v5 :: v_dual_mov_b32 v24, s4
	v_mov_b32_e32 v25, s5
	s_clause 0x3
	global_store_b128 v[11:12], v[18:21], off
	global_store_b128 v[11:12], v[24:27], off offset:16
	global_store_b128 v[11:12], v[24:27], off offset:32
	global_store_b128 v[11:12], v[24:27], off offset:48
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_526
; %bb.519:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[2:3] offset:32 glc
	global_load_b64 v[3:4], v5, s[2:3] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v80, s16 :: v_dual_mov_b32 v81, s17
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s17, v4
	v_and_b32_e32 v3, s16, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v22, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v23, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[26:27], v5, v[80:83], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[26:27], v[82:83]
	s_cbranch_execz .LBB0_522
; %bb.520:                              ; %.preheader1.i.i.i87.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_521:                              ; %.preheader1.i.i.i87
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v24, s16 :: v_dual_mov_b32 v25, s17
	s_sleep 1
	global_store_b64 v[3:4], v[26:27], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[24:27], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[26:27]
	v_dual_mov_b32 v27, v19 :: v_dual_mov_b32 v26, v18
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_521
.LBB0_522:                              ; %Flow1227
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[18:19], v5, s[2:3] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_524
; %bb.523:                              ;   in Loop: Header=BB0_378 Depth=4
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[18:19], v[4:5], off offset:8
.LBB0_524:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[24:25], v[18:19], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[24:25]
	s_cbranch_vccnz .LBB0_526
; %bb.525:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v4, v[18:19], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[24:25], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_526:                              ; %Flow1228
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s21, s21, s20
	v_add_co_u32 v3, vcc_lo, v22, s35
	v_add_co_ci_u32_e32 v4, vcc_lo, s21, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_527:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_529
; %bb.528:                              ;   in Loop: Header=BB0_527 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_529:                              ;   in Loop: Header=BB0_527 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_531
; %bb.530:                              ;   in Loop: Header=BB0_527 Depth=5
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_532
.LBB0_531:                              ;   in Loop: Header=BB0_527 Depth=5
	s_mov_b32 s5, -1
.LBB0_532:                              ; %Flow1222
                                        ;   in Loop: Header=BB0_527 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_527
; %bb.533:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_537
; %bb.534:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[2:3] offset:40
	global_load_b64 v[18:19], v5, s[2:3] offset:24 glc
	global_load_b64 v[23:24], v5, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v21, vcc_lo, v6, s16
	v_add_co_ci_u32_e32 v22, vcc_lo, s17, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_dual_cndmask_b32 v22, v22, v25 :: v_dual_cndmask_b32 v21, v21, v6
	v_and_b32_e32 v6, v22, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v21, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, v23, v11
	v_mov_b32_e32 v23, v18
	v_add_co_ci_u32_e32 v12, vcc_lo, v24, v6, vcc_lo
	v_mov_b32_e32 v24, v19
	global_store_b64 v[11:12], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[18:19]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_537
; %bb.535:                              ; %.preheader.i.i.i86.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s1, 0
.LBB0_536:                              ; %.preheader.i.i.i86
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[11:12], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[23:24]
	v_dual_mov_b32 v24, v19 :: v_dual_mov_b32 v23, v18
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_536
.LBB0_537:                              ; %Flow1220
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_538:                              ; %Flow1234
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s19
.LBB0_539:                              ; %__ockl_devmem_request.exit90
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s18
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v3
	v_readfirstlane_b32 s3, v4
	s_cmp_eq_u64 s[2:3], 0
	s_cbranch_scc1 .LBB0_584
; %bb.540:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mbcnt_lo_u32_b32 v4, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	global_load_b32 v6, v[38:39], off
	s_bcnt1_i32_b32 s5, exec_lo
	s_add_u32 s6, s2, 16
	s_addc_u32 s7, s3, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshrrev_b32_e32 v3, 5, v3
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s16, exec_lo, s1
	s_cbranch_execz .LBB0_548
; %bb.541:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v15, v[54:55], off
	s_mov_b32 s17, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB0_544
; %bb.542:                              ; %.preheader182.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s18, s5, 2
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB0_543:                              ; %.preheader182
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_add_nc_u32_e32 v16, s5, v16
	global_store_b32 v[11:12], v5, off
	v_add_co_u32 v11, s1, v11, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s1, 0, v12, s1
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s19, vcc_lo, s19
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB0_543
.LBB0_544:                              ; %Flow1209
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	global_load_b32 v16, v[64:65], off
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v15, v4, v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v11, v6
	s_cbranch_execz .LBB0_547
; %bb.545:                              ; %.preheader180.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_mul_lo_u32 v12, v15, s5
	s_mov_b32 s17, 0
.LBB0_546:                              ; %.preheader180
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_lshlrev_b32_e64 v15, v11, 1
	v_lshrrev_b32_e32 v16, 3, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v11, v12
	v_and_b32_e32 v16, 0x1ffffffc, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v11, v6
	global_store_b32 v16, v15, s[6:7]
	s_or_b32 s17, vcc_lo, s17
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB0_546
.LBB0_547:                              ; %Flow1206
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_548:                              ; %Flow1214
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_and_not1_saveexec_b32 s16, s16
	s_cbranch_execz .LBB0_553
; %bb.549:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s17, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB0_552
; %bb.550:                              ; %.preheader178.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v15, v[66:67], off
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s18, s5, 2
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB0_551:                              ; %.preheader178
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_add_nc_u32_e32 v16, s5, v16
	s_waitcnt vmcnt(0)
	global_store_b32 v[11:12], v15, off
	v_add_co_u32 v11, s1, v11, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s1, 0, v12, s1
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s19, vcc_lo, s19
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB0_551
.LBB0_552:                              ; %Flow1212
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
.LBB0_553:                              ; %.loopexit179
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s16
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_557
; %bb.554:                              ;   in Loop: Header=BB0_378 Depth=4
	v_and_b32_e32 v6, 31, v6
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v6
	s_cbranch_execz .LBB0_556
; %bb.555:                              ;   in Loop: Header=BB0_378 Depth=4
	v_add_nc_u32_e32 v4, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v11, v[3:4], off
	s_waitcnt vmcnt(0)
	v_lshl_or_b32 v6, -1, v6, v11
	global_store_b32 v[3:4], v6, off
.LBB0_556:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	global_store_b128 v5, v[7:10], s[2:3]
.LBB0_557:                              ; %Flow1203
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $sgpr5
.LBB0_558:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e64 s1, 0, v71
	v_mov_b32_e32 v3, s31
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_560
; %bb.559:                              ;   in Loop: Header=BB0_558 Depth=5
	global_load_b32 v3, v[32:33], off glc
.LBB0_560:                              ;   in Loop: Header=BB0_558 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s31, v3
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s6, s1, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s5, s6
	s_cmp_eq_u32 s31, 0x10100
	s_cbranch_scc1 .LBB0_567
; %bb.561:                              ;   in Loop: Header=BB0_558 Depth=5
	v_mov_b32_e32 v3, s34
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_563
; %bb.562:                              ;   in Loop: Header=BB0_558 Depth=5
	global_load_b32 v3, v[48:49], off glc
.LBB0_563:                              ;   in Loop: Header=BB0_558 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s34, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u32 s31, s34
	s_cbranch_scc0 .LBB0_568
; %bb.564:                              ;   in Loop: Header=BB0_558 Depth=5
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_575
; %bb.565:                              ;   in Loop: Header=BB0_558 Depth=5
	s_cmpk_lt_u32 s31, 0x100
	s_cbranch_scc0 .LBB0_569
; %bb.566:                              ;   in Loop: Header=BB0_558 Depth=5
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_mov_b32 s7, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s31, 24, v[3:4]
	s_branch .LBB0_570
.LBB0_567:                              ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b64 s[16:17], 0
	s_mov_b32 s1, -1
	s_mov_b32 s18, 0
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr34
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB0_580
.LBB0_568:                              ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b32 s18, -1
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr34
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB0_579
.LBB0_569:                              ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_570:                              ; %Flow1195
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB0_572
; %bb.571:                              ;   in Loop: Header=BB0_558 Depth=5
	s_add_i32 s7, s31, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s7, s7, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4]
	s_and_b32 s7, s31, 0xff
	global_load_b64 v[3:4], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4]
.LBB0_572:                              ;   in Loop: Header=BB0_558 Depth=5
	v_dual_mov_b32 v15, s31 :: v_dual_mov_b32 v4, s3
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v6, v5
	global_store_b32 v5, v15, s[2:3] offset:4
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off offset:8 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB0_574
; %bb.573:                              ;   in Loop: Header=BB0_558 Depth=5
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[32:33], v118, off
	v_dual_mov_b32 v3, v11 :: v_dual_mov_b32 v4, v12
.LBB0_574:                              ; %Flow1193
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_575:                              ; %Flow1196
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v4
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc0 .LBB0_577
; %bb.576:                              ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr34
	s_branch .LBB0_578
.LBB0_577:                              ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b32 s19, 0
	s_and_not1_b32 s1, s1, exec_lo
	s_sleep 2
.LBB0_578:                              ; %Flow1201
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b32 s18, 0
.LBB0_579:                              ; %Flow1200
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s16, s1, exec_lo
	s_mov_b32 s1, 0
	s_or_b32 s5, s5, s16
                                        ; implicit-def: $sgpr16_sgpr17
.LBB0_580:                              ; %Flow1199
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_558
; %bb.581:                              ; %loop.exit.guard930
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v15, s16 :: v_dual_mov_b32 v16, s17
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_501
; %bb.582:                              ; %loop.exit.guard931
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_xor_b32 s1, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_585
; %bb.583:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s18, 0
	s_branch .LBB0_586
.LBB0_584:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s18, 0
	s_branch .LBB0_501
.LBB0_585:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s18, -1
                                        ; implicit-def: $sgpr6_sgpr7
.LBB0_586:                              ; %Flow1190
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_501
; %bb.587:                              ;   in Loop: Header=BB0_378 Depth=4
	s_and_saveexec_b32 s20, s5
	s_cbranch_execz .LBB0_616
; %bb.588:                              ;   in Loop: Header=BB0_378 Depth=4
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s1, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s1, s1, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_594
; %bb.589:                              ;   in Loop: Header=BB0_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB0_593
; %bb.590:                              ; %.preheader3.i.i.i96.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_591:                              ; %.preheader3.i.i.i96
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v23
	v_and_b32_e32 v6, v16, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_591
; %bb.592:                              ; %Flow1186
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_593:                              ; %Flow1188
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_594:                              ; %.loopexit4.i.i.i91
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[21:24], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s21, s7, 24
	s_mul_hi_u32 s31, s6, 24
	s_mul_i32 s34, s6, 24
	s_and_saveexec_b32 s35, s1
	s_cbranch_execz .LBB0_596
; %bb.595:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s31, s21
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v21, s34
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_596:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s35
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v23, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v24, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v11, s2
	v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v25, s6
	v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v23, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[23:26], off offset:8
	global_store_b128 v[3:4], v[23:26], off offset:24
	global_store_b128 v[3:4], v[23:26], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_604
; %bb.597:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s3, exec_lo
	v_dual_mov_b32 v80, s18 :: v_dual_mov_b32 v81, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v21, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[25:26], v[82:83]
	s_cbranch_execz .LBB0_600
; %bb.598:                              ; %.preheader1.i.i.i94.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s5, 0
.LBB0_599:                              ; %.preheader1.i.i.i94
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v23, s18 :: v_dual_mov_b32 v24, s19
	s_sleep 1
	global_store_b64 v[3:4], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[23:26], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[25:26]
	v_dual_mov_b32 v26, v12 :: v_dual_mov_b32 v25, v11
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_599
.LBB0_600:                              ; %Flow1184
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b64 v[11:12], v5, s[16:17] offset:16
	s_mov_b32 s5, exec_lo
	s_mov_b32 s3, exec_lo
	v_mbcnt_lo_u32_b32 v3, s5, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_602
; %bb.601:                              ;   in Loop: Header=BB0_378 Depth=4
	s_bcnt1_i32_b32 s5, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s5
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB0_602:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB0_604
; %bb.603:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s3, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s3, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_604:                              ; %Flow1185
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s31, s31, s21
	v_add_co_u32 v3, vcc_lo, v21, s34
	v_add_co_ci_u32_e32 v4, vcc_lo, s31, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_605:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_607
; %bb.606:                              ;   in Loop: Header=BB0_605 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_607:                              ;   in Loop: Header=BB0_605 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s2, v6
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc1 .LBB0_609
; %bb.608:                              ;   in Loop: Header=BB0_605 Depth=5
	s_mov_b32 s2, 0
	s_sleep 1
	s_branch .LBB0_610
.LBB0_609:                              ;   in Loop: Header=BB0_605 Depth=5
	s_mov_b32 s2, -1
.LBB0_610:                              ; %Flow1179
                                        ;   in Loop: Header=BB0_605 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_605
; %bb.611:                              ;   in Loop: Header=BB0_378 Depth=4
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_615
; %bb.612:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	global_load_b64 v[11:12], v5, s[16:17] offset:24 glc
	global_load_b64 v[15:16], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v23, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v21, vcc_lo
	v_mov_b32_e32 v24, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v22, v19, v21 :: v_dual_cndmask_b32 v21, v18, v6
	v_and_b32_e32 v4, v22, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v21, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_615
; %bb.613:                              ; %.preheader.i.i.i93.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s1, 0
.LBB0_614:                              ; %.preheader.i.i.i93
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[3:4], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_614
.LBB0_615:                              ; %Flow1177
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v71, 0
.LBB0_616:                              ; %Flow1189
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s20
	v_dual_mov_b32 v15, v30 :: v_dual_mov_b32 v16, v31
	s_mov_b32 s18, -1
	s_branch .LBB0_501
.LBB0_617:                              ;   in Loop: Header=BB0_347 Depth=3
                                        ; implicit-def: $vgpr28_vgpr29
                                        ; implicit-def: $sgpr29
                                        ; implicit-def: $vgpr70
	s_branch .LBB0_641
.LBB0_618:                              ;   in Loop: Header=BB0_347 Depth=3
	v_cmp_ne_u64_e64 s5, 1, v[30:31]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_620
; %bb.619:                              ;   in Loop: Header=BB0_347 Depth=3
	v_dual_mov_b32 v28, v30 :: v_dual_mov_b32 v29, v31
	s_branch .LBB0_640
.LBB0_620:                              ;   in Loop: Header=BB0_347 Depth=3
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_637
; %bb.621:                              ;   in Loop: Header=BB0_347 Depth=3
	global_load_b64 v[3:4], v[52:53], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x4e20, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_637
; %bb.622:                              ;   in Loop: Header=BB0_347 Depth=3
	v_sub_nc_u32_e32 v3, 0x4e20, v3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
.LBB0_623:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x659
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_626
; %bb.624:                              ; %.preheader11.i110
                                        ;   in Loop: Header=BB0_623 Depth=4
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB0_623
.LBB0_625:                              ; %.preheader9.i109
                                        ;   in Loop: Header=BB0_626 Depth=4
	s_sleep 63
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_626:                              ; %Flow1171
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x326
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_625
; %bb.627:                              ; %Flow1168
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_add_u32 s16, s6, 0x18c
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_630
.LBB0_628:                              ; %.preheader7.i108
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 31
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x18c
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_628
	s_branch .LBB0_630
.LBB0_629:                              ; %.preheader5.i107
                                        ;   in Loop: Header=BB0_630 Depth=4
	s_sleep 15
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_630:                              ; %.loopexit8.i100
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0xc0
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_629
	s_branch .LBB0_632
.LBB0_631:                              ; %.preheader3.i106
                                        ;   in Loop: Header=BB0_632 Depth=4
	s_sleep 7
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_632:                              ; %Flow1162
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x59
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_631
	s_branch .LBB0_634
.LBB0_633:                              ; %.preheader1.i105
                                        ;   in Loop: Header=BB0_634 Depth=4
	s_sleep 3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_634:                              ; %Flow1159
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 38
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_633
; %bb.635:                              ; %Flow1156
                                        ;   in Loop: Header=BB0_347 Depth=3
	v_cmp_le_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_637
.LBB0_636:                              ; %.preheader.i104
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 1
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_636
.LBB0_637:                              ; %__ockl_rtcwait_u32.exit111
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, s29
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v70
	s_cbranch_execz .LBB0_639
; %bb.638:                              ;   in Loop: Header=BB0_347 Depth=3
	global_load_b32 v3, v[32:33], off glc
.LBB0_639:                              ;   in Loop: Header=BB0_347 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s29, v3
.LBB0_640:                              ; %Flow1173
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v11, v28 :: v_dual_mov_b32 v12, v29
.LBB0_641:                              ; %Flow1318
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_347
.LBB0_642:                              ; %.loopexit189
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s6, v11
	v_readfirstlane_b32 s7, v12
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_cmp_eq_u64 s[6:7], 0
	s_cbranch_scc1 .LBB0_663
; %bb.643:                              ;   in Loop: Header=BB0_6 Depth=2
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mbcnt_lo_u32_b32 v3, s5, 0
	;;#ASMSTART
	;;#ASMEND
	global_load_b64 v[0:1], v5, s[6:7] offset:8 glc
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	s_waitcnt vmcnt(0)
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_647
; %bb.644:                              ;   in Loop: Header=BB0_6 Depth=2
	s_mov_b32 s17, exec_lo
	s_bcnt1_i32_b32 s5, s5
	v_mbcnt_lo_u32_b32 v4, s17, 0
	s_mov_b32 s16, exec_lo
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_646
; %bb.645:                              ;   in Loop: Header=BB0_6 Depth=2
	s_bcnt1_i32_b32 s1, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s1, s5, s1
	v_mov_b32_e32 v6, s1
	global_atomic_add_u32 v6, v[0:1], v6, off offset:8 glc
.LBB0_646:                              ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s16
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s1, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u32_u24 v4, s5, v4, s1
.LBB0_647:                              ; %Flow944
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_mov_b32 s3, s4
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, __unnamed_1@rel32@lo+4
	s_addc_u32 s19, s19, __unnamed_1@rel32@hi+12
	s_lshl_b64 s[16:17], s[2:3], 5
	v_mov_b32_e32 v11, 0
	s_add_u32 s18, s16, s18
	s_addc_u32 s19, s17, s19
	v_readfirstlane_b32 s1, v4
	s_load_b32 s5, s[18:19], 0x0
	v_mov_b32_e32 v12, 0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s3, s5, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s3, 32
	s_cbranch_scc1 .LBB0_657
; %bb.648:                              ;   in Loop: Header=BB0_6 Depth=2
	v_cvt_f32_u32_e32 v4, s5
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, __unnamed_1@rel32@lo+32
	s_addc_u32 s19, s19, __unnamed_1@rel32@hi+40
	s_lshr_b32 s3, s3, 5
	s_add_u32 s18, s16, s18
	s_addc_u32 s19, s17, s19
	v_rcp_iflag_f32_e32 v4, v4
	s_load_b32 s18, s[18:19], 0x0
	s_sub_i32 s19, 0, s5
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v4, 0x4f7ffffe, v4 :: v_dual_add_nc_u32 v3, s1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v4
	v_mul_lo_u32 v6, s19, v4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_lo_u32 v3, s18, v3
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, __unnamed_1@rel32@lo+16
	s_addc_u32 s19, s19, __unnamed_1@rel32@hi+24
	s_add_u32 s16, s16, s18
	s_addc_u32 s17, s17, s19
	s_lshr_b32 s18, s2, 1
	s_add_i32 s19, s3, -1
	s_add_i32 s18, s18, 4
	v_mul_hi_u32 v6, v4, v6
	s_lshl_b32 s18, 1, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v6
	v_cvt_f32_u32_e32 v6, s3
	v_mul_hi_u32 v4, v3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v6, v6
	v_mul_lo_u32 v4, v4, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v3, v3, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v6
	v_subrev_nc_u32_e32 v6, s5, v3
	v_cmp_le_u32_e64 s1, s5, v3
	v_cvt_u32_f32_e32 v15, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v4, v3, v6, s1
	s_sub_i32 s1, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v11, s1, v15
	v_add_co_u32 v3, s1, v0, 16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v6, s1, 0, v1, s1
	v_subrev_nc_u32_e32 v12, s5, v4
	v_cmp_le_u32_e64 s1, s5, v4
	s_mov_b32 s5, 0
	v_mul_hi_u32 v16, v15, v11
	v_cndmask_b32_e64 v4, v4, v12, s1
	v_mov_b32_e32 v11, 0
	s_bfe_i32 s1, s2, 0x10000
	s_lshr_b32 s2, s18, 1
	v_mov_b32_e32 v12, 0
	v_lshrrev_b32_e32 v4, 5, v4
	v_add_nc_u32_e32 v18, v15, v16
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s18, s1, s18
.LBB0_649:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], 2, v[4:5]
	s_mov_b32 s2, -1
	s_mov_b32 s20, exec_lo
                                        ; implicit-def: $vgpr19
	v_add_co_u32 v15, s1, v3, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v16, s1, v6, v16, s1
	global_load_b32 v21, v[15:16], off glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v21
	s_cbranch_execz .LBB0_653
; %bb.650:                              ;   in Loop: Header=BB0_649 Depth=3
	v_not_b32_e32 v19, v21
	s_mov_b32 s21, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ctz_i32_b32_e32 v19, v19
	v_min_u32_e32 v21, 32, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e64 v19, v21, 1
	global_atomic_or_b32 v15, v[15:16], v19, off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v15, v15, v19
	v_mov_b32_e32 v19, 0
	v_cmp_ne_u32_e64 s1, 0, v15
	v_cmpx_eq_u32_e32 0, v15
	s_cbranch_execz .LBB0_652
; %bb.651:                              ;   in Loop: Header=BB0_649 Depth=3
	s_load_b32 s2, s[16:17], 0x0
	v_lshl_add_u32 v11, v4, 5, v21
	v_mov_b32_e32 v19, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, v11, s18
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v12, s2, v0, s2
	v_add_co_ci_u32_e64 v15, s2, 0, v1, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v11, s2, v12, v11
	v_add_co_ci_u32_e64 v12, s2, 0, v15, s2
.LBB0_652:                              ;   in Loop: Header=BB0_649 Depth=3
	s_or_b32 exec_lo, exec_lo, s21
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_or_not1_b32 s2, s1, exec_lo
.LBB0_653:                              ; %Flow941
                                        ;   in Loop: Header=BB0_649 Depth=3
	s_or_b32 exec_lo, exec_lo, s20
	s_and_saveexec_b32 s20, s2
; %bb.654:                              ;   in Loop: Header=BB0_649 Depth=3
	v_dual_mov_b32 v19, 0 :: v_dual_add_nc_u32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v15, v4, v18
	v_mul_lo_u32 v15, v15, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v4, v15
	v_subrev_nc_u32_e32 v15, s3, v4
	v_cmp_le_u32_e64 s1, s3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v15, s1
	v_subrev_nc_u32_e32 v15, s3, v4
	v_cmp_le_u32_e64 s1, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v15, s1
; %bb.655:                              ;   in Loop: Header=BB0_649 Depth=3
	s_or_b32 exec_lo, exec_lo, s20
	v_cmp_ne_u32_e64 s1, 0, v19
	s_cmp_eq_u32 s19, 0
	s_cselect_b32 s2, -1, 0
	s_add_i32 s19, s19, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s1, s2
	s_and_b32 s1, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s1, s5
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_649
; %bb.656:                              ; %Flow942
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_657:                              ; %.loopexit193
                                        ;   in Loop: Header=BB0_6 Depth=2
	v_cmp_ne_u64_e64 s1, 0, v[11:12]
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_660
; %bb.658:                              ;   in Loop: Header=BB0_6 Depth=2
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s3, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s5, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s5
	s_cbranch_execz .LBB0_660
; %bb.659:                              ;   in Loop: Header=BB0_6 Depth=2
	s_bcnt1_i32_b32 s1, s1
	s_bcnt1_i32_b32 s3, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s1, s1, s3
	v_mov_b32_e32 v0, s1
	global_atomic_add_u32 v5, v0, s[6:7] offset:16
.LBB0_660:                              ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u64_e32 0, v[11:12]
; %bb.661:                              ;   in Loop: Header=BB0_6 Depth=2
	v_dual_mov_b32 v0, v11 :: v_dual_mov_b32 v119, 0
	v_dual_mov_b32 v128, 0 :: v_dual_mov_b32 v1, v12
; %bb.662:                              ; %Flow
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v128 :: v_dual_mov_b32 v4, v119
.LBB0_663:                              ; %Flow945
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v119, v4
.LBB0_664:                              ; %Flow1324
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s28
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v3
	;;#ASMSTART
	;;#ASMEND
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	s_cbranch_vccnz .LBB0_6
.LBB0_665:                              ; %Flow1326
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s27
	v_mov_b32_e32 v3, v119
.LBB0_666:                              ; %.loopexit197
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v3
	;;#ASMSTART
	;;#ASMEND
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	s_cbranch_vccnz .LBB0_3
; %bb.667:                              ; %Flow1328
                                        ; implicit-def: $vgpr4_vgpr5
.LBB0_668:                              ; %Flow1347
	s_and_not1_saveexec_b32 s1, s23
	s_cbranch_execz .LBB0_701
; %bb.669:
	s_load_b64 s[2:3], s[8:9], 0x50
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v2
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB0_675
; %bb.670:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v3, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v3, s[2:3] offset:40
	global_load_b64 v[6:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v0, v0, v8
	v_and_b32_e32 v1, v1, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v0, 24
	v_mul_lo_u32 v1, v1, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v10, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo
	global_load_b64 v[6:7], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v3, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[0:1], v[8:9]
	s_cbranch_execz .LBB0_674
; %bb.671:                              ; %.preheader3.i.i.i.preheader
	s_mov_b32 s6, 0
.LBB0_672:                              ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v3, s[2:3] offset:40
	global_load_b64 v[10:11], v3, s[2:3]
	v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v8
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v6, 24, v[10:11]
	v_and_b32_e32 v10, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v10, 24, v[1:2]
	v_mov_b32_e32 v1, v6
	global_load_b64 v[6:7], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v3, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[8:9]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_672
; %bb.673:                              ; %Flow1343
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_674:                              ; %Flow1345
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_675:                              ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v0
	v_readfirstlane_b32 s5, v1
	s_mov_b32 s13, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[2:3] offset:40
	global_load_b128 v[6:9], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v10
	v_readfirstlane_b32 s7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s10, s7, 24
	s_mul_hi_u32 s11, s6, 24
	s_mul_i32 s12, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB0_677
; %bb.676:
	v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v11, v3
	s_add_i32 s13, s11, s10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s12
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v7, vcc_lo
	v_dual_mov_b32 v12, 3 :: v_dual_mov_b32 v13, 1
	global_store_b128 v[0:1], v[10:13], off offset:8
.LBB0_677:
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[0:1], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v8, s6
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v0
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_add_co_ci_u32_e32 v9, vcc_lo, v9, v1, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v10, s16 :: v_dual_mov_b32 v13, s19
	v_dual_mov_b32 v11, s17 :: v_dual_mov_b32 v12, s18
	s_clause 0x3
	global_store_b128 v[8:9], v[2:5], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_685
; %bb.678:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v4, vcc_lo, v6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v7, v1, vcc_lo
	global_store_b64 v[4:5], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB0_681
; %bb.679:                              ; %.preheader1.i.i.i.preheader
	s_mov_b32 s13, 0
.LBB0_680:                              ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_680
.LBB0_681:                              ; %Flow1341
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s13, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_683
; %bb.682:
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB0_683:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_685
; %bb.684:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_685:                              ; %Flow1342
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s11, s11, s10
	v_add_co_u32 v0, vcc_lo, v6, s12
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_686:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_688
; %bb.687:                              ;   in Loop: Header=BB0_686 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_688:                              ;   in Loop: Header=BB0_686 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB0_690
; %bb.689:                              ;   in Loop: Header=BB0_686 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB0_691
.LBB0_690:                              ;   in Loop: Header=BB0_686 Depth=1
	s_mov_b32 s6, -1
.LBB0_691:                              ; %Flow1336
                                        ;   in Loop: Header=BB0_686 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_686
; %bb.692:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_696
; %bb.693:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_696
; %bb.694:                              ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB0_695:                              ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_695
.LBB0_696:                              ; %__ockl_devmem_request.exit
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execz .LBB0_700
; %bb.697:
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v2, s2, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_b32 s3, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s3
	s_cbranch_execz .LBB0_700
; %bb.698:
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v2, s3, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_b32 s4, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s4
	s_cbranch_execz .LBB0_700
; %bb.699:
	s_load_b64 s[4:5], s[8:9], 0x60
	s_bcnt1_i32_b32 s2, s2
	s_bcnt1_i32_b32 s3, s3
	v_mov_b32_e32 v4, 0x1a000
	s_mul_i32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, s2
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u64 v4, v[2:3], s[4:5] offset:2184
.LBB0_700:
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_701:                              ; %Flow1348
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_702:                              ; %.loopexit198
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s22
	v_readlane_b32 s30, v40, 11
	v_readlane_b32 s31, v40, 12
	v_readlane_b32 s44, v40, 10
	v_readlane_b32 s43, v40, 9
	v_readlane_b32 s42, v40, 8
	v_readlane_b32 s41, v40, 7
	v_readlane_b32 s40, v40, 6
	v_readlane_b32 s39, v40, 5
	v_readlane_b32 s38, v40, 4
	v_readlane_b32 s37, v40, 3
	v_readlane_b32 s36, v40, 2
	v_readlane_b32 s35, v40, 1
	v_readlane_b32 s34, v40, 0
	s_or_saveexec_b32 s0, -1
	scratch_load_b32 v40, off, s32          ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end0:
	.size	__ockl_dm_alloc, .Lfunc_end0-__ockl_dm_alloc
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 24288
; NumSgprs: 47
; NumVgprs: 136
; ScratchSize: 8
; MemoryBound: 1
	.section	.text.unlikely.,"ax",@progbits
	.p2align	2                               ; -- Begin function __ockl_dm_dealloc
	.type	__ockl_dm_dealloc,@function
__ockl_dm_dealloc:                      ; @__ockl_dm_dealloc
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v2, 0xfff, v0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u64_e32 0, v[2:3]
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB1_12
; %bb.1:
	v_dual_mov_b32 v5, v1 :: v_dual_and_b32 v4, 0xffe00000, v0
	s_load_b64 s[0:1], s[8:9], 0x60
	v_and_b32_e32 v15, 0x1fffff, v0
	global_load_b64 v[6:7], v[4:5], off
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, 0x2800
	s_addc_u32 s1, s1, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+16
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+24
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v1, 1, v6
	v_bfe_i32 v2, v6, 0, 1
	v_and_b32_e32 v16, 0xff, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, 4, v1
	v_lshlrev_b32_e64 v1, v1, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v8, 1, v1
	v_and_b32_e32 v2, v2, v8
	v_add_nc_u32_e32 v8, 0xffffff00, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v14, v2, v1
	v_mov_b32_e32 v2, v6
	v_lshrrev_b32_e32 v18, 8, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cvt_f32_u32_e32 v1, v14
	v_sub_nc_u32_e32 v0, 0, v14
	v_lshlrev_b64 v[12:13], 5, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	v_add_co_u32 v12, vcc_lo, v12, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v9, v0, v17
	v_mad_u64_u32 v[0:1], null, 0x1800, v6, s[0:1]
	v_cmp_gt_u32_e64 s0, 0x100, v7
	v_mul_hi_u32 v2, v17, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[8:9], null, v7, 24, v[0:1]
	v_mad_u64_u32 v[10:11], null, v18, 24, v[0:1]
	v_dual_mov_b32 v17, 1 :: v_dual_add_nc_u32 v2, v17, v2
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v0, v17
	v_cmp_ne_u32_e32 vcc_lo, 0, v17
	v_mov_b32_e32 v17, 0
	;;#ASMSTART
	;;#ASMEND
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB1_11
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_readfirstlane_b32 s1, v6
	v_readfirstlane_b32 s2, v7
	v_mov_b32_e32 v17, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, s1, v6
	v_cmp_eq_u32_e64 s1, s2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB1_10
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s7, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s7, 0
	v_cmp_ne_u32_e64 s1, 0, v0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v1, v9, 0, s1
	v_cndmask_b32_e64 v0, v8, 0, s1
	s_or_b32 s1, s1, s0
	s_xor_b32 s2, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s2
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_2 Depth=1
	global_load_b64 v[17:18], v[10:11], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v16, 24, v[17:18]
.LBB1_6:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	global_load_b32 v17, v[12:13], off
	v_readfirstlane_b32 s2, v0
	v_readfirstlane_b32 s3, v1
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v17, v15, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v18, v17, v2
	v_mul_lo_u32 v19, v18, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v17, v17, v19
	v_add_nc_u32_e32 v19, 1, v18
	v_sub_nc_u32_e32 v20, v17, v14
	v_cmp_ge_u32_e64 s1, v17, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v18, v18, v19, s1
	v_cndmask_b32_e64 v17, v17, v20, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v19, 1, v18
	v_cmp_ge_u32_e64 s1, v17, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v17, v18, v19, s1
	v_lshrrev_b32_e32 v18, 3, v17
	v_lshlrev_b32_e64 v17, v17, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v18, 0x1ffffffc, v18
	v_not_b32_e32 v19, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s1, v4, v18
	v_add_co_ci_u32_e64 v18, s1, 0, v5, s1
	global_atomic_and_b32 v[17:18], v19, off offset:16
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB1_9
; %bb.7:                                ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s10, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s11, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s11
	s_cbranch_execz .LBB1_9
; %bb.8:                                ;   in Loop: Header=BB1_2 Depth=1
	s_bcnt1_i32_b32 s7, s7
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s7, s10
	v_mov_b32_e32 v0, s7
	global_atomic_sub_u32 v3, v0, s[2:3] offset:16
.LBB1_9:                                ; %Flow16
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v17, 0
.LBB1_10:                               ; %Flow18
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_11:                               ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v0, v17
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_cbranch_vccnz .LBB1_2
.LBB1_12:                               ; %Flow40
	s_and_not1_saveexec_b32 s1, s4
	s_cbranch_execz .LBB1_45
; %bb.13:
	s_mov_b32 s10, exec_lo
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execz .LBB1_44
; %bb.14:
	s_load_b64 s[2:3], s[8:9], 0x50
	v_mbcnt_lo_u32_b32 v2, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_20
; %bb.15:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[6:7], v3, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[2:3] offset:40
	global_load_b64 v[8:9], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB1_19
; %bb.16:                               ; %.preheader3.i.i.i.preheader
	s_mov_b32 s6, 0
.LBB1_17:                               ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[2:3] offset:40
	global_load_b64 v[10:11], v3, s[2:3]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB1_17
; %bb.18:                               ; %Flow34
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_19:                               ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_20:                               ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s14, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[2:3] offset:40
	global_load_b128 v[4:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v10
	v_readfirstlane_b32 s7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s11, s7, 24
	s_mul_hi_u32 s12, s6, 24
	s_mul_i32 s13, s6, 24
	s_and_saveexec_b32 s15, s0
	s_cbranch_execz .LBB1_22
; %bb.21:
	v_dual_mov_b32 v8, s14 :: v_dual_mov_b32 v9, v3
	s_add_i32 s14, s12, s11
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s13
	v_add_co_ci_u32_e32 v13, vcc_lo, s14, v5, vcc_lo
	v_dual_mov_b32 v10, 3 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB1_22:
	s_or_b32 exec_lo, exec_lo, s15
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s6
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v7, vcc_lo
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v2, v8
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v6, s16 :: v_dual_mov_b32 v9, s19
	v_dual_mov_b32 v7, s17 :: v_dual_mov_b32 v8, s18
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_30
; %bb.23:
	v_mov_b32_e32 v8, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v8, s[2:3] offset:40
	v_dual_mov_b32 v9, s4 :: v_dual_mov_b32 v10, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v6, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v1, vcc_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[11:12]
	s_cbranch_execz .LBB1_26
; %bb.24:                               ; %.preheader1.i.i.i.preheader
	s_mov_b32 s14, 0
.LBB1_25:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[6:7], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s14, vcc_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB1_25
.LBB1_26:                               ; %Flow32
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s14, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s14, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB1_28
; %bb.27:
	s_bcnt1_i32_b32 s14, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s14
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB1_28:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB1_30
; %bb.29:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_30:                               ; %Flow33
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s12, s12, s11
	v_add_co_u32 v0, vcc_lo, v4, s13
	v_add_co_ci_u32_e32 v1, vcc_lo, s12, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_31:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_33
; %bb.32:                               ;   in Loop: Header=BB1_31 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_33:                               ;   in Loop: Header=BB1_31 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB1_35
; %bb.34:                               ;   in Loop: Header=BB1_31 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB1_36
.LBB1_35:                               ;   in Loop: Header=BB1_31 Depth=1
	s_mov_b32 s6, -1
.LBB1_36:                               ; %Flow27
                                        ;   in Loop: Header=BB1_31 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_31
; %bb.37:
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_41
; %bb.38:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[2:3] offset:40
	global_load_b64 v[7:8], v6, s[2:3] offset:24 glc
	global_load_b64 v[4:5], v6, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_41
; %bb.39:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB1_40:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_40
.LBB1_41:                               ; %__ockl_devmem_request.exit
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_mbcnt_lo_u32_b32 v0, s0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s2, exec_lo, vcc_lo
	s_mov_b32 exec_lo, s2
	s_cbranch_execz .LBB1_44
; %bb.42:
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s2, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s3, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s3
	s_cbranch_execz .LBB1_44
; %bb.43:
	s_load_b64 s[4:5], s[8:9], 0x60
	s_bcnt1_i32_b32 s0, s0
	s_bcnt1_i32_b32 s2, s2
	v_mov_b32_e32 v2, 0x1a000
	s_mul_i32 s0, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s0
	s_waitcnt lgkmcnt(0)
	global_atomic_sub_u64 v2, v[0:1], s[4:5] offset:2184
.LBB1_44:                               ; %Flow38
	s_or_b32 exec_lo, exec_lo, s10
.LBB1_45:                               ; %.loopexit
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end1:
	.size	__ockl_dm_dealloc, .Lfunc_end1-__ockl_dm_dealloc
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 2296
; NumSgprs: 34
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_ZN6HPCLib22cuCalcPairCombinationsEiiPi ; -- Begin function _ZN6HPCLib22cuCalcPairCombinationsEiiPi
	.globl	_ZN6HPCLib22cuCalcPairCombinationsEiiPi
	.p2align	8
	.type	_ZN6HPCLib22cuCalcPairCombinationsEiiPi,@function
_ZN6HPCLib22cuCalcPairCombinationsEiiPi: ; @_ZN6HPCLib22cuCalcPairCombinationsEiiPi
; %bb.0:
	s_mov_b64 s[46:47], s[0:1]
	s_load_b32 s0, s[0:1], 0x1c
	s_load_b64 s[48:49], s[46:47], 0x0
	s_add_u32 s8, s46, 16
	s_addc_u32 s9, s47, 0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s33, s0, 0xffff
	s_getpc_b64 s[50:51]
	s_add_u32 s50, s50, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s51, s51, __ockl_dm_alloc@rel32@hi+12
	v_mad_u64_u32 v[43:44], null, s15, s33, v[0:1]
	v_dual_mov_b32 v0, 4 :: v_dual_mov_b32 v1, 0
	s_swappc_b64 s[30:31], s[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_dual_mov_b32 v41, v0 :: v_dual_mov_b32 v42, v1
	v_dual_mov_b32 v0, 4 :: v_dual_mov_b32 v1, 0
	s_swappc_b64 s[30:31], s[50:51]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s49, v43
	s_cbranch_execz .LBB2_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s4, s[8:9], 0x0
	s_add_i32 s3, s48, 1
	s_load_b64 s[0:1], s[46:47], 0x8
	s_mul_i32 s3, s3, s48
	v_lshlrev_b32_e32 v2, 3, v43
	s_lshr_b32 s5, s3, 31
	s_mov_b32 s7, 0
	s_add_i32 s3, s3, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s3, s3, 1
	s_lshl_b32 s5, s3, 3
	s_not_b32 s3, s3
	v_sub_nc_u32_e32 v3, s5, v2
	v_lshlrev_b32_e32 v2, 1, v43
	s_add_i32 s3, s3, s48
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v4, -7, v3
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s4, s4, s33
	s_lshl_b32 s5, s4, 1
	s_lshl_b32 s6, s4, 3
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	v_cvt_f64_i32_e32 v[5:6], v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[5:6]
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v3, 8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[5:6], v[5:6], v3
	v_cndmask_b32_e64 v3, 0, 0xffffff80, vcc_lo
	v_rsq_f64_e32 v[7:8], v[5:6]
	v_cmp_class_f64_e64 vcc_lo, v[5:6], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[9:10], v[5:6], v[7:8]
	v_mul_f64 v[7:8], v[7:8], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 0.5
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	v_fma_f64 v[7:8], v[7:8], v[11:12], v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], -v[9:10], v[9:10], v[5:6]
	v_fma_f64 v[9:10], v[11:12], v[7:8], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], -v[9:10], v[9:10], v[5:6]
	v_fma_f64 v[7:8], v[11:12], v[7:8], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[7:8], v[7:8], v3
	v_dual_cndmask_b32 v6, v8, v6 :: v_dual_cndmask_b32 v5, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], -1.0
	v_mul_f64 v[5:6], v[5:6], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_floor_f64_e32 v[5:6], v[5:6]
	v_cvt_i32_f64_e32 v7, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 2, v7
	v_mad_u64_u32 v[5:6], null, v3, v7, v[3:4]
	v_subrev_nc_u32_e32 v4, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 31, v5
	v_add_nc_u32_e32 v3, v5, v3
	v_xad_u32 v5, v7, -1, s48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 1, v3
	v_sub_nc_u32_e32 v3, v3, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v3, s3, v43, v3
	v_add_nc_u32_e32 v43, s4, v43
	global_store_b32 v[41:42], v5, off
	global_store_b32 v[0:1], v3, off
	global_load_b32 v7, v[41:42], off
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[2:3]
	v_add_nc_u32_e32 v2, s5, v2
	v_add_co_u32 v5, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s49, v43
	s_or_b32 s7, vcc_lo, s7
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v7, off
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v3, off offset:4
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_2
.LBB2_3:                                ; %Flow28
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s20, exec_lo
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execnz .LBB2_6
.LBB2_4:                                ; %_ZdlPv.exit
	s_or_b32 exec_lo, exec_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u64_e32 0, v[41:42]
	s_cbranch_execnz .LBB2_7
; %bb.5:                                ; %_ZdlPv.exit17
	s_endpgm
.LBB2_6:
	s_add_u32 s8, s46, 16
	s_addc_u32 s9, s47, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_branch .LBB2_4
.LBB2_7:
	v_dual_mov_b32 v0, v41 :: v_dual_mov_b32 v1, v42
	s_add_u32 s8, s46, 16
	s_addc_u32 s9, s47, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN6HPCLib22cuCalcPairCombinationsEiiPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 8
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 136
		.amdhsa_next_free_sgpr 52
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_ZN6HPCLib22cuCalcPairCombinationsEiiPi, .Lfunc_end2-_ZN6HPCLib22cuCalcPairCombinationsEiiPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 732
; NumSgprs: 54
; NumVgprs: 136
; ScratchSize: 8
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 6
; VGPRBlocks: 16
; NumSGPRsForWavesPerEU: 54
; NumVGPRsForWavesPerEU: 136
; Occupancy: 10
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2align	2                               ; -- Begin function _ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_
	.type	_ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_,@function
_ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_: ; @_ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_load_b32 s0, s[8:9], 0x8
	v_mov_b32_e32 v10, v4
	v_mov_b32_e32 v32, 0
	v_bfe_u32 v35, v31, 20, 10
	v_add_nc_u32_e32 v36, 1, v2
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_u32 s14, s0
	s_cselect_b32 s0, 16, 22
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, s0
	v_cmp_lt_i32_e64 s0, 0, v3
	global_load_u16 v11, v4, s[8:9]
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[12:13], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, v6, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, v7, v13, vcc_lo
	flat_store_b32 v[12:13], v32
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s12, v11
	v_bfe_u32 v11, v31, 10, 10
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_lo_u32 v34, v2, s12
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB3_94
; %bb.1:                                ; %.lr.ph654
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_u32_u24_e32 v4, s12, v11
	v_mov_b32_e32 v14, 0
	v_dual_mov_b32 v39, 0 :: v_dual_lshlrev_b32 v18, 2, v35
	v_mul_lo_u32 v37, v35, v2
	v_lshlrev_b32_e32 v15, 2, v4
	v_dual_mov_b32 v49, 0 :: v_dual_add_nc_u32 v4, 1, v11
	v_mov_b32_e32 v38, 0
	v_mov_b32_e32 v48, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_u32 v16, vcc_lo, v8, v15
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v9, vcc_lo
	v_mov_b32_e32 v32, 0
	v_add_co_u32 v18, vcc_lo, v16, v18
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v17, vcc_lo
	s_cmp_gt_u32 s12, 1
	s_mov_b32 s5, 0
	s_cselect_b32 s16, -1, 0
	s_mov_b32 s15, 0
	s_mov_b32 s17, 0
.LBB3_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_5 Depth 2
                                        ;     Child Loop BB3_8 Depth 2
                                        ;     Child Loop BB3_16 Depth 2
                                        ;     Child Loop BB3_19 Depth 2
                                        ;     Child Loop BB3_28 Depth 2
                                        ;       Child Loop BB3_30 Depth 3
                                        ;       Child Loop BB3_33 Depth 3
                                        ;       Child Loop BB3_40 Depth 3
                                        ;     Child Loop BB3_45 Depth 2
                                        ;     Child Loop BB3_51 Depth 2
                                        ;     Child Loop BB3_54 Depth 2
                                        ;     Child Loop BB3_62 Depth 2
                                        ;     Child Loop BB3_65 Depth 2
                                        ;     Child Loop BB3_72 Depth 2
                                        ;     Child Loop BB3_75 Depth 2
                                        ;       Child Loop BB3_77 Depth 3
                                        ;       Child Loop BB3_80 Depth 3
                                        ;       Child Loop BB3_85 Depth 3
                                        ;     Child Loop BB3_89 Depth 2
	flat_load_b32 v22, v[12:13]
	s_mov_b32 s10, s17
	s_mov_b32 s11, s5
	v_mov_b32_e32 v15, v14
	s_lshl_b64 s[6:7], s[10:11], 2
	v_mov_b32_e32 v33, 0
	v_add_co_u32 v20, s1, v6, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v21, s1, s7, v7, s1
	v_mov_b32_e32 v27, 0
	s_mov_b32 s11, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v22, v32, v22
	s_clause 0x1
	flat_store_b32 v[20:21], v22
	flat_store_b64 v[12:13], v[14:15]
	v_cmpx_lt_i32_e64 s17, v2
	s_cbranch_execz .LBB3_48
; %bb.3:                                ;   in Loop: Header=BB3_2 Depth=1
	s_load_b32 s1, s[8:9], 0x4
	v_mul_lo_u32 v26, s10, v2
	v_mov_b32_e32 v27, 0
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v22, s10, v26
	v_ashrrev_i32_e32 v23, 31, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_u32 s13, s1
	s_cselect_b32 s1, 14, 20
	v_mov_b32_e32 v15, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_u32 v22, vcc_lo, v0, v22
	v_add_co_ci_u32_e32 v23, vcc_lo, v1, v23, vcc_lo
	global_load_u16 v24, v15, s[8:9]
	v_subrev_nc_u32_e32 v15, s10, v2
	v_add_nc_u32_e32 v29, -1, v15
	s_waitcnt vmcnt(0)
	v_mad_u32_u24 v28, v35, v24, v11
	v_readfirstlane_b32 s1, v24
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_lt_i32_e64 v28, v29
	s_cbranch_execz .LBB3_7
; %bb.4:                                ; %.lr.ph.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_dual_mov_b32 v27, 0 :: v_dual_mov_b32 v24, v28
	s_delay_alu instid0(VALU_DEP_3)
	s_mul_i32 s4, s1, s12
	s_mov_b32 s3, 0
.LBB3_5:                                ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v25, 31, v24
	v_lshlrev_b64 v[30:31], 2, v[24:25]
	v_add_nc_u32_e32 v24, s4, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v30, vcc_lo, v22, v30
	v_add_co_ci_u32_e32 v31, vcc_lo, v23, v31, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_ge_i32_e32 vcc_lo, v24, v29
	flat_load_b32 v25, v[30:31]
	s_or_b32 s3, vcc_lo, s3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e64 v27, v27, |v25|
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_5
; %bb.6:                                ; %Flow992
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_7:                                ; %Flow993
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b32_e32 v24, 2, v28
	s_mul_i32 s17, s12, s1
	s_cmp_gt_u32 s17, 1
	s_mov_b32 s1, s17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v24, vcc_lo, v8, v24
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v9, vcc_lo
	s_cselect_b32 s3, -1, 0
	s_cmp_lt_u32 s17, 2
	flat_store_b32 v[24:25], v27
	s_cbranch_scc1 .LBB3_11
.LBB3_8:                                ; %.lr.ph34.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshr_b32 s4, s1, 1
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s4, v28
	s_cbranch_execz .LBB3_10
; %bb.9:                                ;   in Loop: Header=BB3_8 Depth=2
	s_lshl_b64 s[18:19], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v29, vcc_lo, v24, s18
	v_add_co_ci_u32_e32 v30, vcc_lo, s19, v25, vcc_lo
	s_clause 0x1
	flat_load_b32 v27, v[29:30]
	flat_load_b32 v29, v[24:25]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v27, v27, v29
	flat_store_b32 v[24:25], v27
.LBB3_10:                               ;   in Loop: Header=BB3_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_cmp_gt_u32 s1, 3
	s_mov_b32 s1, s4
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_8
.LBB3_11:                               ; %._crit_edge35.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_cmp_eq_u32_e64 s1, 0, v28
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB3_13
; %bb.12:                               ;   in Loop: Header=BB3_2 Depth=1
	flat_load_b32 v27, v[8:9]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[12:13], v27
.LBB3_13:                               ; %_ZN6HPCLib20cuReduceAbsYZ_sharedEPfiS0_S0_.exit
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	flat_load_b32 v27, v[12:13]
	v_mov_b32_e32 v33, 0
	s_mov_b32 s18, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_neq_f32_e32 0, v27
	s_cbranch_execz .LBB3_47
; %bb.14:                               ;   in Loop: Header=BB3_2 Depth=1
	v_add_co_u32 v29, vcc_lo, v0, s6
	v_add_co_ci_u32_e32 v30, vcc_lo, s7, v1, vcc_lo
	v_cmp_lt_i32_e64 s2, v28, v15
	v_mov_b32_e32 v32, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB3_18
; %bb.15:                               ; %.lr.ph.i540
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_ashrrev_i32_e32 v27, 31, v26
	v_mov_b32_e32 v32, 0
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[26:27], 2, v[26:27]
	v_add_co_u32 v31, vcc_lo, v29, v26
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v33, vcc_lo, v30, v27, vcc_lo
	v_mov_b32_e32 v26, v28
.LBB3_16:                               ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v27, 31, v26
	v_lshlrev_b64 v[50:51], 2, v[26:27]
	v_add_nc_u32_e32 v26, s17, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v50, vcc_lo, v31, v50
	v_add_co_ci_u32_e32 v51, vcc_lo, v33, v51, vcc_lo
	flat_load_b32 v27, v[12:13]
	flat_load_b32 v52, v[50:51]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_div_scale_f32 v53, null, v27, v27, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v54, v53
	s_waitcnt_depctr 0xfff
	v_fma_f32 v55, -v53, v54, 1.0
	v_fmac_f32_e32 v54, v55, v54
	v_div_scale_f32 v55, vcc_lo, v52, v27, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v64, v55, v54
	v_fma_f32 v65, -v53, v64, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v64, v65, v54
	v_fma_f32 v53, -v53, v64, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v53, v53, v54, v64
	v_cmp_ge_i32_e32 vcc_lo, v26, v15
	v_div_fixup_f32 v27, v53, v27, v52
	s_or_b32 s19, vcc_lo, s19
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v32, v27, v27
	flat_store_b32 v[50:51], v27
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB3_16
; %bb.17:                               ; %Flow986
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s19
.LBB3_18:                               ; %Flow987
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_cndmask_b32_e64 v31, 0, 1, s3
	s_mov_b32 s3, s17
	flat_store_b32 v[24:25], v32
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	v_cmp_ne_u32_e32 vcc_lo, 1, v31
	buffer_gl0_inv
	s_cbranch_vccnz .LBB3_22
.LBB3_19:                               ; %.lr.ph39.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshr_b32 s4, s3, 1
	s_mov_b32 s19, exec_lo
	v_cmpx_gt_u32_e64 s4, v28
	s_cbranch_execz .LBB3_21
; %bb.20:                               ;   in Loop: Header=BB3_19 Depth=2
	s_lshl_b64 s[20:21], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v26, vcc_lo, v24, s20
	v_add_co_ci_u32_e32 v27, vcc_lo, s21, v25, vcc_lo
	s_clause 0x1
	flat_load_b32 v26, v[26:27]
	flat_load_b32 v27, v[24:25]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v26, v26, v27
	flat_store_b32 v[24:25], v26
.LBB3_21:                               ;   in Loop: Header=BB3_19 Depth=2
	s_or_b32 exec_lo, exec_lo, s19
	s_cmp_gt_u32 s3, 3
	s_mov_b32 s3, s4
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_19
.LBB3_22:                               ; %._crit_edge40.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB3_24
; %bb.23:                               ;   in Loop: Header=BB3_2 Depth=1
	flat_load_b32 v26, v[8:9]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[12:13], v26 offset:4
.LBB3_24:                               ; %_ZN6HPCLib31cuVecScaleSquareReduceYZ_sharedEPfS0_iS0_S0_.exit
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	flat_load_b32 v27, v[12:13] offset:4
	flat_load_b32 v26, v[22:23]
	s_add_i32 s19, s10, 1
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_mul_f32_e32 v32, 0x4f800000, v27
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v32, v27, v32, vcc_lo
	v_sqrt_f32_e32 v33, v32
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v50, -1, v33
	v_add_nc_u32_e32 v51, 1, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v52, -v50, v33, v32
	v_fma_f32 v53, -v51, v33, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s3, 0, v52
	v_cndmask_b32_e64 v33, v33, v50, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s3, 0, v53
	v_cndmask_b32_e64 v33, v33, v51, s3
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v50, 0x37800000, v33
	v_cndmask_b32_e32 v33, v33, v50, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v32, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v32, v33, v32, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_nle_f32_e32 vcc_lo, 0, v26
	v_cndmask_b32_e64 v33, |v32|, -|v32|, vcc_lo
	v_add_nc_u32_e32 v32, s10, v28
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f32_e32 v50, v26, v33
	flat_store_b32 v[22:23], v50
	v_cmpx_ge_i32_e64 s19, v3
	s_xor_b32 s3, exec_lo, s3
; %bb.25:                               ; %.._crit_edge633_crit_edge
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_add_nc_u32_e32 v32, s10, v28
                                        ; implicit-def: $vgpr15
                                        ; implicit-def: $vgpr28
                                        ; implicit-def: $vgpr24_vgpr25
                                        ; implicit-def: $vgpr26
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $vgpr31
                                        ; implicit-def: $vgpr22
                                        ; implicit-def: $vgpr29
                                        ; implicit-def: $vgpr30
; %bb.26:                               ; %Flow981
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_saveexec_b32 s20, s3
	v_xor_b32_e32 v33, 0x80000000, v33
	s_xor_b32 exec_lo, exec_lo, s20
	s_cbranch_execz .LBB3_43
; %bb.27:                               ; %.lr.ph632
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f32 v50, v26, v33, -v27
	v_cmp_lt_i32_e64 s3, v32, v2
	v_mov_b32_e32 v51, v48
	s_mov_b32 s21, 0
.LBB3_28:                               ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_30 Depth 3
                                        ;       Child Loop BB3_33 Depth 3
                                        ;       Child Loop BB3_40 Depth 3
	v_mov_b32_e32 v52, 0
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB3_32
; %bb.29:                               ; %.lr.ph.i548.preheader
                                        ;   in Loop: Header=BB3_28 Depth=2
	v_mul_lo_u32 v26, s19, v2
	v_mov_b32_e32 v52, 0
	s_mov_b32 s22, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v27, 31, v26
	v_lshlrev_b64 v[26:27], 2, v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v53, vcc_lo, v29, v26
	v_add_co_ci_u32_e32 v54, vcc_lo, v30, v27, vcc_lo
	v_mov_b32_e32 v26, v28
.LBB3_30:                               ; %.lr.ph.i548
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_28 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v27, 31, v26
	v_lshlrev_b64 v[64:65], 2, v[26:27]
	v_add_nc_u32_e32 v26, s17, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v66, vcc_lo, v22, v64
	v_add_co_ci_u32_e32 v67, vcc_lo, v23, v65, vcc_lo
	v_add_co_u32 v64, vcc_lo, v53, v64
	v_add_co_ci_u32_e32 v65, vcc_lo, v54, v65, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v26, v15
	s_clause 0x1
	flat_load_b32 v27, v[66:67]
	flat_load_b32 v55, v[64:65]
	s_or_b32 s22, vcc_lo, s22
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v52, v27, v55
	s_and_not1_b32 exec_lo, exec_lo, s22
	s_cbranch_execnz .LBB3_30
; %bb.31:                               ; %Flow976
                                        ;   in Loop: Header=BB3_28 Depth=2
	s_or_b32 exec_lo, exec_lo, s22
.LBB3_32:                               ; %Flow977
                                        ;   in Loop: Header=BB3_28 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_cmp_ne_u32_e32 vcc_lo, 1, v31
	s_mov_b32 s22, s17
	flat_store_b32 v[24:25], v52
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB3_36
.LBB3_33:                               ; %.lr.ph36.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_28 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_lshr_b32 s4, s22, 1
	s_mov_b32 s23, exec_lo
	v_cmpx_gt_u32_e64 s4, v28
	s_cbranch_execz .LBB3_35
; %bb.34:                               ;   in Loop: Header=BB3_33 Depth=3
	s_lshl_b64 s[24:25], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v26, vcc_lo, v24, s24
	v_add_co_ci_u32_e32 v27, vcc_lo, s25, v25, vcc_lo
	s_clause 0x1
	flat_load_b32 v26, v[26:27]
	flat_load_b32 v27, v[24:25]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v26, v26, v27
	flat_store_b32 v[24:25], v26
.LBB3_35:                               ;   in Loop: Header=BB3_33 Depth=3
	s_or_b32 exec_lo, exec_lo, s23
	s_cmp_gt_u32 s22, 3
	s_mov_b32 s22, s4
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_33
.LBB3_36:                               ; %._crit_edge37.i
                                        ;   in Loop: Header=BB3_28 Depth=2
	s_and_saveexec_b32 s4, s1
	s_cbranch_execz .LBB3_38
; %bb.37:                               ;   in Loop: Header=BB3_28 Depth=2
	flat_load_b32 v26, v[8:9]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[12:13], v26 offset:4
.LBB3_38:                               ; %_ZN6HPCLib24cuScalarProductYZ_sharedEPfS0_iS0_S0_.exit
                                        ;   in Loop: Header=BB3_28 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB3_41
; %bb.39:                               ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB3_28 Depth=2
	flat_load_b32 v26, v[12:13] offset:4
	s_mov_b32 s22, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_div_scale_f32 v27, null, v50, v50, v26
	v_div_scale_f32 v54, vcc_lo, v26, v50, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v52, v27
	s_waitcnt_depctr 0xfff
	v_fma_f32 v53, -v27, v52, 1.0
	v_fmac_f32_e32 v52, v53, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v53, v54, v52
	v_fma_f32 v55, -v27, v53, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v53, v55, v52
	v_fma_f32 v27, -v27, v53, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v27, v27, v52, v53
	v_div_fixup_f32 v26, v27, v50, v26
	v_mov_b32_e32 v27, v28
.LBB3_40:                               ; %.lr.ph
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_28 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v52, v39, v27
	v_add_nc_u32_e32 v54, v51, v27
	v_add_nc_u32_e32 v27, s17, v27
	v_ashrrev_i32_e32 v53, 31, v52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v55, 31, v54
	v_add_nc_u32_e32 v64, s10, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[52:53], 2, v[52:53]
	v_lshlrev_b64 v[54:55], 2, v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v52, vcc_lo, v0, v52
	v_add_co_ci_u32_e32 v53, vcc_lo, v1, v53, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v54, vcc_lo, v0, v54
	v_add_co_ci_u32_e32 v55, vcc_lo, v1, v55, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v64, v2
	s_clause 0x1
	flat_load_b32 v52, v[52:53]
	flat_load_b32 v53, v[54:55]
	s_or_b32 s22, vcc_lo, s22
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v53, v26, v52
	flat_store_b32 v[54:55], v53
	s_and_not1_b32 exec_lo, exec_lo, s22
	s_cbranch_execnz .LBB3_40
.LBB3_41:                               ; %Flow972
                                        ;   in Loop: Header=BB3_28 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s19, s19, 1
	v_add_nc_u32_e32 v51, v51, v2
	v_cmp_ge_i32_e32 vcc_lo, s19, v3
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_or_b32 s21, vcc_lo, s21
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s21
	s_cbranch_execnz .LBB3_28
; %bb.42:                               ; %Flow979
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s21
.LBB3_43:                               ; %Flow982
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s20
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_i32_e64 v32, v2
	s_cbranch_execz .LBB3_46
; %bb.44:                               ; %.lr.ph636
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s2, 0
.LBB3_45:                               ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v22, v38, v32
	v_add_nc_u32_e32 v32, s17, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v23, 31, v22
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v22, vcc_lo, v0, v22
	v_add_co_ci_u32_e32 v23, vcc_lo, v1, v23, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v32, v2
	flat_load_b32 v15, v[12:13]
	flat_load_b32 v24, v[22:23]
	s_or_b32 s2, vcc_lo, s2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v15, v15, v24
	flat_store_b32 v[22:23], v15
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB3_45
.LBB3_46:                               ; %Flow969
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	flat_load_b32 v27, v[12:13]
.LBB3_47:                               ; %Flow988
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
.LBB3_48:                               ; %Flow994
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s11
	v_add_co_u32 v22, vcc_lo, v10, s6
	s_add_i32 s17, s10, 1
	v_add_co_ci_u32_e32 v23, vcc_lo, s7, v5, vcc_lo
	v_cmp_lt_i32_e32 vcc_lo, s10, v2
	v_cmp_ne_u32_e64 s2, s17, v3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mul_f32 v24, v33, v27 :: v_dual_mov_b32 v15, v14
	v_cmp_eq_u32_e64 s1, s17, v3
	v_mov_b32_e32 v32, 0
	s_and_b32 s2, vcc_lo, s2
	flat_store_b32 v[22:23], v24
	flat_store_b64 v[12:13], v[14:15]
	s_and_saveexec_b32 s11, s2
	s_cbranch_execz .LBB3_92
; %bb.49:                               ;   in Loop: Header=BB3_2 Depth=1
	s_load_b32 s2, s[8:9], 0x4
	v_mul_lo_u32 v27, s17, v2
	v_mov_b32_e32 v32, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v24, s10, v27
	v_ashrrev_i32_e32 v25, 31, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[25:26], 2, v[24:25]
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_u32 s13, s2
	s_cselect_b32 s2, 14, 20
	v_mov_b32_e32 v15, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v25, vcc_lo, v0, v25
	v_add_co_ci_u32_e32 v26, vcc_lo, v1, v26, vcc_lo
	global_load_u16 v30, v15, s[8:9]
	v_subrev_nc_u32_e32 v15, s17, v3
	s_waitcnt vmcnt(0)
	v_mad_u32_u24 v24, v35, v30, v11
	v_readfirstlane_b32 s10, v30
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_lt_i32_e32 vcc_lo, v24, v15
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB3_53
; %bb.50:                               ; %.lr.ph.i565
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_mov_b32_e32 v32, 0
	v_mov_b32_e32 v28, v24
	s_mul_i32 s18, s10, s12
	s_mov_b32 s4, 0
.LBB3_51:                               ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v29, 31, v28
	v_lshlrev_b64 v[50:51], 2, v[28:29]
	v_add_nc_u32_e32 v28, s18, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v50, s2, v25, v50
	v_add_co_ci_u32_e64 v51, s2, v26, v51, s2
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_ge_i32_e64 s2, v28, v15
	flat_load_b32 v29, v[50:51]
	s_or_b32 s4, s2, s4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e64 v32, v32, |v29|
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB3_51
; %bb.52:                               ; %Flow964
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
.LBB3_53:                               ; %Flow965
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_lshlrev_b32_e32 v28, 2, v24
	v_mul_u32_u24_e32 v55, v35, v30
	s_mul_i32 s18, s12, s10
	s_cmp_gt_u32 s18, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v30, s2, v8, v28
	v_add_co_ci_u32_e64 v31, s2, 0, v9, s2
	s_cselect_b32 s20, -1, 0
	s_cmp_lt_u32 s18, 2
	s_mov_b32 s3, s18
	flat_store_b32 v[30:31], v32
	s_cbranch_scc1 .LBB3_57
.LBB3_54:                               ; %.lr.ph34.i560
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshr_b32 s4, s3, 1
	s_mov_b32 s19, exec_lo
	v_cmpx_gt_u32_e64 s4, v24
	s_cbranch_execz .LBB3_56
; %bb.55:                               ;   in Loop: Header=BB3_54 Depth=2
	s_lshl_b64 s[22:23], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v28, s2, v30, s22
	v_add_co_ci_u32_e64 v29, s2, s23, v31, s2
	s_clause 0x1
	flat_load_b32 v28, v[28:29]
	flat_load_b32 v29, v[30:31]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v28, v28, v29
	flat_store_b32 v[30:31], v28
.LBB3_56:                               ;   in Loop: Header=BB3_54 Depth=2
	s_or_b32 exec_lo, exec_lo, s19
	s_cmp_gt_u32 s3, 3
	s_mov_b32 s3, s4
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_54
.LBB3_57:                               ; %._crit_edge35.i564
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_cmp_eq_u32_e64 s2, 0, v24
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB3_59
; %bb.58:                               ;   in Loop: Header=BB3_2 Depth=1
	flat_load_b32 v28, v[8:9]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[12:13], v28
.LBB3_59:                               ; %_ZN6HPCLib20cuReduceAbsYZ_sharedEPfiS0_S0_.exit569
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	flat_load_b32 v28, v[12:13]
	v_mov_b32_e32 v32, 0
	s_mov_b32 s19, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_neq_f32_e32 0, v28
	s_cbranch_execz .LBB3_91
; %bb.60:                               ;   in Loop: Header=BB3_2 Depth=1
	v_ashrrev_i32_e32 v28, 31, v27
	v_add_co_u32 v50, s3, v0, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v51, s3, s7, v1, s3
	v_lshlrev_b64 v[28:29], 2, v[27:28]
	v_mul_lo_u32 v52, v34, s10
	v_mov_b32_e32 v27, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v53, s3, v50, v28
	v_add_co_ci_u32_e64 v54, s3, v51, v29, s3
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB3_64
; %bb.61:                               ; %.lr.ph.i577
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_mul_lo_u32 v32, v2, v24
	v_dual_mov_b32 v27, 0 :: v_dual_mov_b32 v64, v24
	s_mov_b32 s4, 0
.LBB3_62:                               ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v33, 31, v32
	v_add_nc_u32_e32 v64, s18, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[65:66], 2, v[32:33]
	v_add_nc_u32_e32 v32, v32, v52
	v_add_co_u32 v65, vcc_lo, v53, v65
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v66, vcc_lo, v54, v66, vcc_lo
	flat_load_b32 v33, v[12:13]
	flat_load_b32 v67, v[65:66]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_div_scale_f32 v68, null, v33, v33, v67
	v_div_scale_f32 v71, vcc_lo, v67, v33, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v69, v68
	s_waitcnt_depctr 0xfff
	v_fma_f32 v70, -v68, v69, 1.0
	v_fmac_f32_e32 v69, v70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v70, v71, v69
	v_fma_f32 v80, -v68, v70, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v70, v80, v69
	v_fma_f32 v68, -v68, v70, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v68, v68, v69, v70
	v_cmp_ge_i32_e32 vcc_lo, v64, v15
	v_div_fixup_f32 v33, v68, v33, v67
	s_or_b32 s4, vcc_lo, s4
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v27, v33, v33
	flat_store_b32 v[65:66], v33
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB3_62
; %bb.63:                               ; %Flow958
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
.LBB3_64:                               ; %Flow959
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_mov_b32 s3, s18
	flat_store_b32 v[30:31], v27
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB3_68
.LBB3_65:                               ; %.lr.ph42.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshr_b32 s4, s3, 1
	s_mov_b32 s6, exec_lo
	v_cmpx_gt_u32_e64 s4, v24
	s_cbranch_execz .LBB3_67
; %bb.66:                               ;   in Loop: Header=BB3_65 Depth=2
	s_lshl_b64 s[20:21], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v32, vcc_lo, v30, s20
	v_add_co_ci_u32_e32 v33, vcc_lo, s21, v31, vcc_lo
	s_clause 0x1
	flat_load_b32 v27, v[32:33]
	flat_load_b32 v32, v[30:31]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v27, v27, v32
	flat_store_b32 v[30:31], v27
.LBB3_67:                               ;   in Loop: Header=BB3_65 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
	s_cmp_gt_u32 s3, 3
	s_mov_b32 s3, s4
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_65
.LBB3_68:                               ; %._crit_edge43.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB3_70
; %bb.69:                               ;   in Loop: Header=BB3_2 Depth=1
	flat_load_b32 v24, v[8:9]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[12:13], v24 offset:4
.LBB3_70:                               ; %_ZN6HPCLib36cuVecScaleSquareReduceYZ_incr_sharedEPfS0_iS0_S0_i.exit
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	flat_load_b32 v30, v[12:13] offset:4
	flat_load_b32 v31, v[25:26]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_mul_f32_e32 v24, 0x4f800000, v30
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v24, v30, v24, vcc_lo
	v_sqrt_f32_e32 v27, v24
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v32, -1, v27
	v_add_nc_u32_e32 v33, 1, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v64, -v32, v27, v24
	v_fma_f32 v65, -v33, v27, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_ge_f32_e64 s2, 0, v64
	v_add_nc_u32_e32 v64, v55, v4
	v_cndmask_b32_e64 v27, v27, v32, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v65
	v_cndmask_b32_e64 v27, v27, v33, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v32, 0x37800000, v27
	v_cndmask_b32_e32 v27, v27, v32, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v24, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v24, v27, v24 :: v_dual_add_nc_u32 v27, s17, v11
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_nle_f32_e32 vcc_lo, 0, v31
	v_add_nc_u32_e32 v33, v55, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v65, |v24|, -|v24|, vcc_lo
	v_mul_lo_u32 v24, v2, v64
	v_cmp_lt_i32_e64 s2, v33, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f32_e32 v55, v31, v65
	v_xor_b32_e32 v32, 0x80000000, v65
	flat_store_b32 v[25:26], v55
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB3_73
; %bb.71:                               ; %.lr.ph640.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_mul_lo_u32 v25, v2, v64
	v_fma_f32 v55, v31, v32, -v30
	v_mov_b32_e32 v30, v33
	s_mov_b32 s6, 0
.LBB3_72:                               ; %.lr.ph640
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v26, 31, v25
	v_lshlrev_b64 v[64:65], 2, v[25:26]
	v_add_nc_u32_e32 v25, v25, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v64, vcc_lo, v50, v64
	v_add_co_ci_u32_e32 v65, vcc_lo, v51, v65, vcc_lo
	flat_load_b32 v26, v[64:65]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_div_scale_f32 v64, null, v55, v55, v26
	v_div_scale_f32 v65, vcc_lo, v26, v55, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v66, v64
	s_waitcnt_depctr 0xfff
	v_fma_f32 v31, -v64, v66, 1.0
	v_fmac_f32_e32 v66, v31, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v67, v65, v66
	v_fma_f32 v31, -v64, v67, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v67, v31, v66
	v_ashrrev_i32_e32 v31, 31, v30
	v_fma_f32 v68, -v64, v67, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[64:65], 2, v[30:31]
	v_add_nc_u32_e32 v30, s18, v30
	v_div_fmas_f32 v31, v68, v66, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_ge_i32_e32 vcc_lo, v30, v3
	v_add_co_u32 v64, s3, v6, v64
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fixup_f32 v26, v31, v55, v26
	v_add_co_ci_u32_e64 v65, s3, v7, v65, s3
	s_or_b32 s6, vcc_lo, s6
	flat_store_b32 v[64:65], v26
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB3_72
.LBB3_73:                               ; %Flow954
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_i32_e64 v27, v2
	s_cbranch_execz .LBB3_87
; %bb.74:                               ; %.lr.ph644
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_add_co_u32 v30, vcc_lo, v0, v28
	v_add_co_ci_u32_e32 v31, vcc_lo, v1, v29, vcc_lo
	v_add_co_u32 v55, vcc_lo, v20, 4
	v_cmp_lt_i32_e64 s3, v35, v15
	v_add_co_ci_u32_e32 v64, vcc_lo, 0, v21, vcc_lo
	s_mov_b32 s7, 0
.LBB3_75:                               ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_77 Depth 3
                                        ;       Child Loop BB3_80 Depth 3
                                        ;       Child Loop BB3_85 Depth 3
	v_ashrrev_i32_e32 v28, 31, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[25:26], 2, v[27:28]
	v_mov_b32_e32 v28, 0
	v_add_co_u32 v65, vcc_lo, v30, v25
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v66, vcc_lo, v31, v26, vcc_lo
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB3_79
; %bb.76:                               ; %.lr.ph.i584.preheader
                                        ;   in Loop: Header=BB3_75 Depth=2
	v_dual_mov_b32 v28, 0 :: v_dual_mov_b32 v25, v37
	v_mov_b32_e32 v29, v35
	s_mov_b32 s20, 0
.LBB3_77:                               ; %.lr.ph.i584
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_75 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v26, 31, v25
	v_lshlrev_b64 v[67:68], 2, v[25:26]
	v_add_nc_u32_e32 v25, v25, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v69, vcc_lo, v65, v67
	v_add_co_ci_u32_e32 v70, vcc_lo, v66, v68, vcc_lo
	v_add_co_u32 v67, vcc_lo, v53, v67
	v_add_co_ci_u32_e32 v68, vcc_lo, v54, v68, vcc_lo
	s_clause 0x1
	flat_load_b32 v26, v[69:70]
	flat_load_b32 v67, v[67:68]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_fmac_f32 v28, v26, v67 :: v_dual_add_nc_u32 v29, s12, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v29, v15
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB3_77
; %bb.78:                               ; %Flow947
                                        ;   in Loop: Header=BB3_75 Depth=2
	s_or_b32 exec_lo, exec_lo, s20
.LBB3_79:                               ; %Flow948
                                        ;   in Loop: Header=BB3_75 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_mov_b32 s20, s12
	flat_store_b32 v[18:19], v28
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB3_83
.LBB3_80:                               ; %.lr.ph42.i580
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_75 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_lshr_b32 s4, s20, 1
	s_mov_b32 s21, exec_lo
	v_cmpx_gt_u32_e64 s4, v35
	s_cbranch_execz .LBB3_82
; %bb.81:                               ;   in Loop: Header=BB3_80 Depth=3
	s_lshl_b64 s[22:23], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v25, vcc_lo, v18, s22
	v_add_co_ci_u32_e32 v26, vcc_lo, s23, v19, vcc_lo
	s_clause 0x1
	flat_load_b32 v25, v[25:26]
	flat_load_b32 v26, v[18:19]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v25, v25, v26
	flat_store_b32 v[18:19], v25
.LBB3_82:                               ;   in Loop: Header=BB3_80 Depth=3
	s_or_b32 exec_lo, exec_lo, s21
	s_cmp_lt_u32 s20, 4
	s_mov_b32 s20, s4
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB3_80
.LBB3_83:                               ; %.preheader.i
                                        ;   in Loop: Header=BB3_75 Depth=2
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB3_86
; %bb.84:                               ; %.lr.ph44.i.preheader
                                        ;   in Loop: Header=BB3_75 Depth=2
	v_dual_mov_b32 v25, v37 :: v_dual_mov_b32 v28, v35
	s_mov_b32 s20, 0
.LBB3_85:                               ; %.lr.ph44.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_75 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v29, 31, v28
	v_ashrrev_i32_e32 v26, 31, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[67:68], 2, v[28:29]
	v_lshlrev_b64 v[69:70], 2, v[25:26]
	v_add_nc_u32_e32 v25, v25, v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v67, vcc_lo, v55, v67
	v_add_co_ci_u32_e32 v68, vcc_lo, v64, v68, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v69, vcc_lo, v65, v69
	v_add_co_ci_u32_e32 v70, vcc_lo, v66, v70, vcc_lo
	flat_load_b32 v26, v[16:17]
	flat_load_b32 v29, v[67:68]
	flat_load_b32 v67, v[69:70]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_fmac_f32 v67, v26, v29 :: v_dual_add_nc_u32 v28, s12, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v28, v15
	flat_store_b32 v[69:70], v67
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB3_85
.LBB3_86:                               ; %Flow942
                                        ;   in Loop: Header=BB3_75 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v27, s10, v27
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmp_ge_i32_e32 vcc_lo, v27, v2
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB3_75
.LBB3_87:                               ; %Flow951
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB3_90
; %bb.88:                               ; %.lr.ph648.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s2, 0
.LBB3_89:                               ; %.lr.ph648
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_ashrrev_i32_e32 v25, 31, v24
	v_add_nc_u32_e32 v33, s18, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[25:26], 2, v[24:25]
	v_add_nc_u32_e32 v24, v24, v52
	v_add_co_u32 v25, vcc_lo, v50, v25
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v26, vcc_lo, v51, v26, vcc_lo
	flat_load_b32 v15, v[12:13]
	flat_load_b32 v27, v[25:26]
	v_cmp_ge_i32_e32 vcc_lo, v33, v3
	s_or_b32 s2, vcc_lo, s2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v15, v15, v27
	flat_store_b32 v[25:26], v15
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB3_89
.LBB3_90:                               ; %Flow939
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB3_91:                               ; %Flow960
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s19
.LBB3_92:                               ; %Flow966
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s11
	flat_load_b32 v15, v[22:23]
	flat_load_b32 v20, v[20:21]
	v_add_nc_u32_e32 v39, v39, v36
	v_add_nc_u32_e32 v38, v38, v2
	v_add_nc_u32_e32 v4, 1, v4
	s_and_b32 s1, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 s15, s1, s15
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e64 v15, |v15|, |v20|
	v_cmp_gt_f32_e32 vcc_lo, v49, v15
	v_dual_cndmask_b32 v49, v15, v49 :: v_dual_add_nc_u32 v48, v48, v36
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB3_2
; %bb.93:                               ; %._crit_edge655.loopexit
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v32, 0x33ff8cf1, v49
.LBB3_94:                               ; %Flow995
	s_or_b32 exec_lo, exec_lo, s14
	v_min_i32_e32 v4, v2, v3
	s_mov_b32 s5, 0
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 0, v4
	s_cbranch_execz .LBB3_129
; %bb.95:                               ; %.lr.ph679
	s_load_b32 s1, s[8:9], 0x4
	v_dual_mov_b32 v15, 0 :: v_dual_add_nc_u32 v14, -1, v4
	v_mul_lo_u32 v22, v4, v36
	v_not_b32_e32 v24, v2
	v_add_nc_u32_e32 v25, -1, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v23, v2, v14
	s_mov_b32 s11, 0
	v_add_nc_u32_e32 v26, -1, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v27, v4, v23
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_u32 s13, s1
	s_cselect_b32 s1, 14, 20
	s_add_u32 s6, s8, s1
	s_addc_u32 s7, s9, 0
.LBB3_96:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_98 Depth 2
                                        ;     Child Loop BB3_102 Depth 2
                                        ;     Child Loop BB3_109 Depth 2
                                        ;       Child Loop BB3_111 Depth 3
                                        ;       Child Loop BB3_114 Depth 3
                                        ;       Child Loop BB3_121 Depth 3
                                        ;     Child Loop BB3_126 Depth 2
	v_add_nc_u32_e32 v14, -1, v4
	v_cmp_ge_i32_e64 s1, v4, v3
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], 2, v[14:15]
	v_add_co_u32 v16, vcc_lo, v10, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, v5, v17, vcc_lo
	flat_load_b32 v18, v[16:17]
	v_cmpx_lt_i32_e64 v4, v3
	s_cbranch_execz .LBB3_99
; %bb.97:                               ; %.lr.ph658.preheader
                                        ;   in Loop: Header=BB3_96 Depth=1
	v_dual_mov_b32 v16, v26 :: v_dual_mov_b32 v19, v4
	s_mov_b32 s4, 0
.LBB3_98:                               ; %.lr.ph658
                                        ;   Parent Loop BB3_96 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v17, 31, v16
	v_add_nc_u32_e32 v19, 1, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[20:21], 2, v[16:17]
	v_cmp_ge_i32_e32 vcc_lo, v19, v3
	v_add_nc_u32_e32 v16, v16, v2
	s_or_b32 s4, vcc_lo, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s2, v0, v20
	v_add_co_ci_u32_e64 v21, s2, v1, v21, s2
	flat_store_b32 v[20:21], v15
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB3_98
.LBB3_99:                               ; %Flow933
                                        ;   in Loop: Header=BB3_96 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_f32_e32 0, v18
	s_xor_b32 s3, exec_lo, s2
	s_cbranch_execz .LBB3_104
; %bb.100:                              ;   in Loop: Header=BB3_96 Depth=1
	global_load_u16 v16, v15, s[6:7]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0)
	v_mul_u32_u24_e32 v17, v35, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v18, v14, v11, v17
	v_cmpx_lt_i32_e64 v18, v2
	s_cbranch_execz .LBB3_103
; %bb.101:                              ; %.lr.ph662
                                        ;   in Loop: Header=BB3_96 Depth=1
	v_mul_lo_u32 v16, v16, s12
	v_add_nc_u32_e32 v17, v25, v17
	s_mov_b32 s14, 0
.LBB3_102:                              ;   Parent Loop BB3_96 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v18, v27, v17
	v_add_nc_u32_e32 v17, v17, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v19, 31, v18
	v_add_nc_u32_e32 v20, v4, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[18:19], 2, v[18:19]
	v_cmp_ge_i32_e32 vcc_lo, v20, v2
	s_or_b32 s14, vcc_lo, s14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v18, s2, v0, v18
	v_add_co_ci_u32_e64 v19, s2, v1, v19, s2
	flat_store_b32 v[18:19], v15
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB3_102
.LBB3_103:                              ; %Flow916
                                        ;   in Loop: Header=BB3_96 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
                                        ; implicit-def: $vgpr18
.LBB3_104:                              ; %Flow929
                                        ;   in Loop: Header=BB3_96 Depth=1
	s_and_not1_saveexec_b32 s14, s3
	s_cbranch_execz .LBB3_128
; %bb.105:                              ;   in Loop: Header=BB3_96 Depth=1
	v_div_scale_f32 v16, null, v18, v18, 1.0
	v_div_scale_f32 v20, vcc_lo, 1.0, v18, 1.0
	v_add_nc_u32_e32 v29, v14, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v17, v16
	s_waitcnt_depctr 0xfff
	v_fma_f32 v19, -v16, v17, 1.0
	v_fmac_f32_e32 v17, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v19, v20, v17
	v_fma_f32 v21, -v16, v19, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v19, v21, v17
	v_fma_f32 v16, -v16, v19, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_div_fmas_f32 v16, v16, v17, v19
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s1, exec_lo, s2
; %bb.106:                              ; %.._crit_edge670_crit_edge
                                        ;   in Loop: Header=BB3_96 Depth=1
	v_add_nc_u32_e32 v29, v14, v11
; %bb.107:                              ; %Flow926
                                        ;   in Loop: Header=BB3_96 Depth=1
	s_or_saveexec_b32 s15, s1
	v_div_fixup_f32 v28, v16, v18, 1.0
	s_xor_b32 exec_lo, exec_lo, s15
	s_cbranch_execz .LBB3_124
; %bb.108:                              ; %.lr.ph669
                                        ;   in Loop: Header=BB3_96 Depth=1
	global_load_u16 v20, v15, s[6:7]
	v_mul_lo_u32 v17, v14, v2
	v_sub_nc_u32_e32 v30, v2, v4
	s_mov_b32 s18, 0
	v_dual_mov_b32 v31, v22 :: v_dual_mov_b32 v48, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v16, v17, v4
	v_add_nc_u32_e32 v18, v17, v14
	v_ashrrev_i32_e32 v17, 31, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v19, 31, v18
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[18:19], 2, v[18:19]
	v_add_co_u32 v33, vcc_lo, v0, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v37, vcc_lo, v1, v17, vcc_lo
	v_add_co_u32 v16, vcc_lo, v0, v18
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v17, vcc_lo, v1, v19, vcc_lo
	s_waitcnt vmcnt(0)
	v_mad_u32_u24 v38, v35, v20, v11
	v_mad_u32_u24 v18, v35, v20, v29
	v_readfirstlane_b32 s16, v20
	v_mad_u32_u24 v39, v35, v20, v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b32_e32 v19, 2, v38
	v_cmp_lt_i32_e64 s3, v18, v2
	s_delay_alu instid0(VALU_DEP_4)
	s_mul_i32 s16, s16, s12
	v_cmp_lt_i32_e64 s1, v38, v30
	v_cmp_eq_u32_e64 s2, 0, v38
	v_add_co_u32 v18, vcc_lo, v8, v19
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v9, vcc_lo
	s_cmp_gt_u32 s16, 1
	s_cselect_b32 s17, -1, 0
.LBB3_109:                              ;   Parent Loop BB3_96 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_111 Depth 3
                                        ;       Child Loop BB3_114 Depth 3
                                        ;       Child Loop BB3_121 Depth 3
	v_mov_b32_e32 v49, 0
	s_and_saveexec_b32 s4, s1
	s_cbranch_execz .LBB3_113
; %bb.110:                              ; %.lr.ph.i601.preheader
                                        ;   in Loop: Header=BB3_109 Depth=2
	v_mad_u64_u32 v[20:21], null, v48, v2, v[4:5]
	v_mov_b32_e32 v49, 0
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v21, 31, v20
	v_lshlrev_b64 v[20:21], 2, v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v50, vcc_lo, v0, v20
	v_mov_b32_e32 v20, v38
	v_add_co_ci_u32_e32 v51, vcc_lo, v1, v21, vcc_lo
.LBB3_111:                              ; %.lr.ph.i601
                                        ;   Parent Loop BB3_96 Depth=1
                                        ;     Parent Loop BB3_109 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v21, 31, v20
	v_lshlrev_b64 v[52:53], 2, v[20:21]
	v_add_nc_u32_e32 v20, s16, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v54, vcc_lo, v33, v52
	v_add_co_ci_u32_e32 v55, vcc_lo, v37, v53, vcc_lo
	v_add_co_u32 v52, vcc_lo, v50, v52
	v_add_co_ci_u32_e32 v53, vcc_lo, v51, v53, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v20, v30
	s_clause 0x1
	flat_load_b32 v21, v[54:55]
	flat_load_b32 v52, v[52:53]
	s_or_b32 s19, vcc_lo, s19
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v49, v21, v52
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB3_111
; %bb.112:                              ; %Flow923
                                        ;   in Loop: Header=BB3_109 Depth=2
	s_or_b32 exec_lo, exec_lo, s19
.LBB3_113:                              ; %Flow924
                                        ;   in Loop: Header=BB3_109 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	s_and_not1_b32 vcc_lo, exec_lo, s17
	s_mov_b32 s19, s16
	flat_store_b32 v[18:19], v49
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB3_117
.LBB3_114:                              ; %.lr.ph36.i596
                                        ;   Parent Loop BB3_96 Depth=1
                                        ;     Parent Loop BB3_109 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_lshr_b32 s4, s19, 1
	s_mov_b32 s20, exec_lo
	v_cmpx_gt_u32_e64 s4, v38
	s_cbranch_execz .LBB3_116
; %bb.115:                              ;   in Loop: Header=BB3_114 Depth=3
	s_lshl_b64 s[22:23], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v20, vcc_lo, v18, s22
	v_add_co_ci_u32_e32 v21, vcc_lo, s23, v19, vcc_lo
	s_clause 0x1
	flat_load_b32 v20, v[20:21]
	flat_load_b32 v21, v[18:19]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v20, v20, v21
	flat_store_b32 v[18:19], v20
.LBB3_116:                              ;   in Loop: Header=BB3_114 Depth=3
	s_or_b32 exec_lo, exec_lo, s20
	s_cmp_gt_u32 s19, 3
	s_mov_b32 s19, s4
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_114
.LBB3_117:                              ; %._crit_edge37.i600
                                        ;   in Loop: Header=BB3_109 Depth=2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB3_119
; %bb.118:                              ;   in Loop: Header=BB3_109 Depth=2
	flat_load_b32 v20, v[8:9]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[12:13], v20 offset:4
.LBB3_119:                              ; %_ZN6HPCLib24cuScalarProductYZ_sharedEPfS0_iS0_S0_.exit605
                                        ;   in Loop: Header=BB3_109 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB3_122
; %bb.120:                              ; %.lr.ph665.preheader
                                        ;   in Loop: Header=BB3_109 Depth=2
	flat_load_b32 v20, v[12:13] offset:4
	flat_load_b32 v21, v[16:17]
	s_mov_b32 s19, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_div_scale_f32 v49, null, v21, v21, v20
	v_div_scale_f32 v52, vcc_lo, v20, v21, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v50, v49
	s_waitcnt_depctr 0xfff
	v_fma_f32 v51, -v49, v50, 1.0
	v_fmac_f32_e32 v50, v51, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v51, v52, v50
	v_fma_f32 v53, -v49, v51, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v51, v53, v50
	v_fma_f32 v49, -v49, v51, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v49, v49, v50, v51
	v_div_fixup_f32 v20, v49, v21, v20
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v21, v39 :: v_dual_mul_f32 v20, v28, v20
.LBB3_121:                              ; %.lr.ph665
                                        ;   Parent Loop BB3_96 Depth=1
                                        ;     Parent Loop BB3_109 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v49, v27, v21
	v_add_nc_u32_e32 v51, v31, v21
	v_add_nc_u32_e32 v21, s16, v21
	v_ashrrev_i32_e32 v50, 31, v49
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v52, 31, v51
	v_add_nc_u32_e32 v53, v4, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[49:50], 2, v[49:50]
	v_lshlrev_b64 v[51:52], 2, v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v49, vcc_lo, v0, v49
	v_add_co_ci_u32_e32 v50, vcc_lo, v1, v50, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v51, vcc_lo, v0, v51
	v_add_co_ci_u32_e32 v52, vcc_lo, v1, v52, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v53, v2
	s_clause 0x1
	flat_load_b32 v49, v[49:50]
	flat_load_b32 v50, v[51:52]
	s_or_b32 s19, vcc_lo, s19
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v50, v20, v49
	flat_store_b32 v[51:52], v50
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB3_121
.LBB3_122:                              ; %Flow920
                                        ;   in Loop: Header=BB3_109 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v48, 1, v48
	v_add_nc_u32_e32 v31, v31, v2
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmp_ge_i32_e32 vcc_lo, v48, v3
	s_or_b32 s18, vcc_lo, s18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB3_109
; %bb.123:                              ; %Flow925
                                        ;   in Loop: Header=BB3_96 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
.LBB3_124:                              ; %Flow927
                                        ;   in Loop: Header=BB3_96 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s15
	global_load_u16 v17, v15, s[6:7]
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	v_mad_u32_u24 v16, v35, v17, v29
	v_cmpx_lt_i32_e64 v16, v2
	s_cbranch_execz .LBB3_127
; %bb.125:                              ; %.lr.ph673
                                        ;   in Loop: Header=BB3_96 Depth=1
	v_mul_lo_u32 v17, v17, s12
	s_mov_b32 s2, 0
.LBB3_126:                              ;   Parent Loop BB3_96 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v18, v23, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v16, v16, v17
	v_ashrrev_i32_e32 v19, 31, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[18:19], 2, v[18:19]
	v_add_co_u32 v18, vcc_lo, v0, v18
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v19, vcc_lo, v1, v19, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v16, v2
	flat_load_b32 v20, v[18:19]
	s_or_b32 s2, vcc_lo, s2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v20, v28, v20
	flat_store_b32 v[18:19], v20
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB3_126
.LBB3_127:                              ; %Flow918
                                        ;   in Loop: Header=BB3_96 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
.LBB3_128:                              ; %Flow930
                                        ;   in Loop: Header=BB3_96 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_mul_lo_u32 v16, v14, v36
	s_waitcnt_vscnt null, 0x0
	buffer_gl0_inv
	v_add_nc_u32_e32 v26, v26, v24
	v_add_nc_u32_e32 v22, v22, v24
	v_sub_nc_u32_e32 v23, v23, v2
	v_ashrrev_i32_e32 v17, 31, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	v_add_co_u32 v16, vcc_lo, v0, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, v1, v17, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, 2, v4
	v_mov_b32_e32 v4, v14
	flat_load_b32 v18, v[16:17]
	v_add_nc_u32_e32 v27, v27, v24
	s_or_b32 s11, vcc_lo, s11
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v18, 1.0, v18
	flat_store_b32 v[16:17], v18
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB3_96
.LBB3_129:                              ; %Flow936
	s_or_b32 exec_lo, exec_lo, s10
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB3_187
; %bb.130:                              ; %.preheader613.lr.ph
	v_add_nc_u32_e32 v4, -2, v3
	v_dual_mov_b32 v9, 0 :: v_dual_add_nc_u32 v8, -1, v3
	v_cmp_lt_i32_e64 s0, v11, v2
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[12:13], null, v2, v4, v[11:12]
	v_add_nc_u32_e32 v17, v8, v35
	v_lshlrev_b64 v[15:16], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[13:14], null, v2, v17, v[11:12]
	v_add_co_u32 v14, vcc_lo, v6, v15
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v15, vcc_lo, v7, v16, vcc_lo
.LBB3_131:                              ; %.preheader613
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_132 Depth 2
                                        ;       Child Loop BB3_133 Depth 3
                                        ;       Child Loop BB3_141 Depth 3
                                        ;         Child Loop BB3_150 Depth 4
                                        ;       Child Loop BB3_161 Depth 3
                                        ;         Child Loop BB3_177 Depth 4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v31, v3 :: v_dual_mov_b32 v4, v9
	s_mov_b32 s5, 0
	s_mov_b32 s7, 0
                                        ; implicit-def: $sgpr6
                                        ; implicit-def: $sgpr10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v18, -2, v31
	v_add_nc_u32_e32 v3, -1, v31
	v_ashrrev_i32_e32 v19, 31, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[23:24], 2, v[3:4]
	v_lshlrev_b64 v[21:22], 2, v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v16, vcc_lo, v10, v23
	v_add_co_ci_u32_e32 v17, vcc_lo, v5, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v19, vcc_lo, v10, v21
	v_add_co_ci_u32_e32 v20, vcc_lo, v5, v22, vcc_lo
	v_add_co_u32 v21, vcc_lo, v6, v21
	v_add_co_ci_u32_e32 v22, vcc_lo, v7, v22, vcc_lo
	v_add_co_u32 v23, vcc_lo, v6, v23
	v_add_co_ci_u32_e32 v24, vcc_lo, v7, v24, vcc_lo
.LBB3_132:                              ; %.preheader
                                        ;   Parent Loop BB3_131 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_133 Depth 3
                                        ;       Child Loop BB3_141 Depth 3
                                        ;         Child Loop BB3_150 Depth 4
                                        ;       Child Loop BB3_161 Depth 3
                                        ;         Child Loop BB3_177 Depth 4
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v13
	v_dual_mov_b32 v26, v15 :: v_dual_mov_b32 v25, v14
	v_mov_b32_e32 v27, v3
	s_mov_b32 s1, 0
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $sgpr11
                                        ; implicit-def: $sgpr14
.LBB3_133:                              ;   Parent Loop BB3_131 Depth=1
                                        ;     Parent Loop BB3_132 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v8, v27
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mov_b32_e32 v4, v28
	v_mov_b32_e32 v30, v29
	s_or_b32 s14, s14, exec_lo
	s_or_b32 s11, s11, exec_lo
	s_mov_b32 s15, exec_lo
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $vgpr28
                                        ; implicit-def: $vgpr29
	v_cmpx_ne_u32_e32 0, v8
	s_cbranch_execz .LBB3_137
; %bb.134:                              ;   in Loop: Header=BB3_133 Depth=3
	flat_load_b32 v27, v[25:26]
	s_mov_b32 s17, -1
	s_mov_b32 s18, -1
                                        ; implicit-def: $vgpr28
                                        ; implicit-def: $vgpr29
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_nle_f32_e64 s19, |v27|, v32
                                        ; implicit-def: $vgpr27
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s16, s19
	s_cbranch_execz .LBB3_136
; %bb.135:                              ;   in Loop: Header=BB3_133 Depth=3
	v_add_nc_u32_e32 v27, -1, v8
	s_xor_b32 s18, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v28, 31, v27
	v_lshlrev_b64 v[28:29], 2, v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v28, vcc_lo, v10, v28
	v_add_co_ci_u32_e32 v29, vcc_lo, v5, v29, vcc_lo
	v_add_co_u32 v25, vcc_lo, v25, -4
	v_add_co_ci_u32_e32 v26, vcc_lo, -1, v26, vcc_lo
	flat_load_b32 v28, v[28:29]
	v_sub_nc_u32_e32 v29, v30, v2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_le_f32_e64 s17, |v28|, v32
	v_sub_nc_u32_e32 v28, v4, v2
	s_delay_alu instid0(VALU_DEP_2)
	s_or_not1_b32 s17, s17, exec_lo
.LBB3_136:                              ; %Flow911
                                        ;   in Loop: Header=BB3_133 Depth=3
	s_or_b32 exec_lo, exec_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s14, s14, exec_lo
	s_and_b32 s16, s18, exec_lo
	s_and_not1_b32 s11, s11, exec_lo
	s_and_b32 s17, s17, exec_lo
	s_or_b32 s14, s14, s16
	s_or_b32 s11, s11, s17
.LBB3_137:                              ; %Flow910
                                        ;   in Loop: Header=BB3_133 Depth=3
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s15, exec_lo, s11
	s_or_b32 s1, s15, s1
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s15, s14, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s15
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB3_133
; %bb.138:                              ; %loop.exit.guard892
                                        ;   in Loop: Header=BB3_132 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_xor_b32 s1, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s1, exec_lo, s2
	s_cbranch_execz .LBB3_154
; %bb.139:                              ; %.critedge
                                        ;   in Loop: Header=BB3_132 Depth=2
	v_add_nc_u32_e32 v25, v8, v35
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v25, v31
	s_cbranch_execz .LBB3_153
; %bb.140:                              ; %.lr.ph686
                                        ;   in Loop: Header=BB3_132 Depth=2
	v_dual_mov_b32 v36, 1.0 :: v_dual_mov_b32 v33, 0
	s_mov_b32 s11, 0
                                        ; implicit-def: $sgpr14
.LBB3_141:                              ;   Parent Loop BB3_131 Depth=1
                                        ;     Parent Loop BB3_132 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB3_150 Depth 4
	v_ashrrev_i32_e32 v26, 31, v25
	s_or_b32 s14, s14, exec_lo
	s_mov_b32 s15, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[26:27], 2, v[25:26]
	v_add_co_u32 v37, vcc_lo, v6, v26
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v38, vcc_lo, v7, v27, vcc_lo
	flat_load_b32 v29, v[37:38]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v28, v36, v29
	v_mul_f32_e32 v29, v33, v29
                                        ; implicit-def: $vgpr33
                                        ; implicit-def: $vgpr36
	flat_store_b32 v[37:38], v29
	v_cmpx_nle_f32_e64 |v28|, v32
	s_cbranch_execz .LBB3_152
; %bb.142:                              ;   in Loop: Header=BB3_141 Depth=3
	v_add_co_u32 v26, vcc_lo, v10, v26
	v_add_co_ci_u32_e32 v27, vcc_lo, v5, v27, vcc_lo
	v_and_b32_e32 v33, 0x7fffffff, v28
                                        ; implicit-def: $vgpr37
	flat_load_b32 v29, v[26:27]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v36, 0x7fffffff, v29
	v_cmp_ngt_f32_e64 s16, |v28|, |v29|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s17, s16
	s_xor_b32 s16, exec_lo, s17
	s_cbranch_execz .LBB3_146
; %bb.143:                              ;   in Loop: Header=BB3_141 Depth=3
	v_mov_b32_e32 v37, 0
	s_mov_b32 s17, exec_lo
	v_cmpx_neq_f32_e32 0, v29
	s_cbranch_execz .LBB3_145
; %bb.144:                              ;   in Loop: Header=BB3_141 Depth=3
	v_div_scale_f32 v37, null, v36, v36, v33
	v_div_scale_f32 v33, vcc_lo, v33, v36, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v38, v37
	s_waitcnt_depctr 0xfff
	v_fma_f32 v39, -v37, v38, 1.0
	v_fmac_f32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v39, v33, v38
	v_fma_f32 v48, -v37, v39, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v39, v48, v38
	v_fma_f32 v33, -v37, v39, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v33, v33, v38, v39
	v_div_fixup_f32 v33, v33, |v29|, |v28|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v33, |v28|, v33
	v_div_scale_f32 v37, null, v36, v36, v33
	v_div_scale_f32 v48, vcc_lo, v33, v36, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v38, v37
	s_waitcnt_depctr 0xfff
	v_fma_f32 v39, -v37, v38, 1.0
	v_fmac_f32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v39, v48, v38
	v_fma_f32 v49, -v37, v39, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v39, v49, v38
	v_fma_f32 v37, -v37, v39, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v37, v37, v38, v39
	v_div_fixup_f32 v33, v37, |v29|, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[37:38], v33
	v_add_f64 v[37:38], v[37:38], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[37:38]
	v_cndmask_b32_e64 v33, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v33, 8, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[37:38], v[37:38], v33
	v_cndmask_b32_e64 v33, 0, 0xffffff80, vcc_lo
	v_rsq_f64_e32 v[48:49], v[37:38]
	v_cmp_class_f64_e64 vcc_lo, v[37:38], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[50:51], v[37:38], v[48:49]
	v_mul_f64 v[48:49], v[48:49], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], -v[48:49], v[50:51], 0.5
	v_fma_f64 v[50:51], v[50:51], v[52:53], v[50:51]
	v_fma_f64 v[48:49], v[48:49], v[52:53], v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], -v[50:51], v[50:51], v[37:38]
	v_fma_f64 v[50:51], v[52:53], v[48:49], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], -v[50:51], v[50:51], v[37:38]
	v_fma_f64 v[48:49], v[52:53], v[48:49], v[50:51]
	v_cvt_f64_f32_e32 v[50:51], v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[48:49], v[48:49], v33
	v_dual_cndmask_b32 v37, v48, v37 :: v_dual_cndmask_b32 v38, v49, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[36:37], v[37:38], v[50:51]
	v_cvt_f32_f64_e32 v37, v[36:37]
.LBB3_145:                              ; %Flow904
                                        ;   in Loop: Header=BB3_141 Depth=3
	s_or_b32 exec_lo, exec_lo, s17
                                        ; implicit-def: $vgpr33
                                        ; implicit-def: $vgpr36
.LBB3_146:                              ; %Flow905
                                        ;   in Loop: Header=BB3_141 Depth=3
	s_and_not1_saveexec_b32 s16, s16
	s_cbranch_execz .LBB3_148
; %bb.147:                              ;   in Loop: Header=BB3_141 Depth=3
	v_div_scale_f32 v37, null, v33, v33, v36
	v_div_scale_f32 v36, vcc_lo, v36, v33, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v38, v37
	s_waitcnt_depctr 0xfff
	v_fma_f32 v39, -v37, v38, 1.0
	v_fmac_f32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v39, v36, v38
	v_fma_f32 v48, -v37, v39, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v39, v48, v38
	v_fma_f32 v36, -v37, v39, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v36, v36, v38, v39
	v_div_fixup_f32 v36, v36, |v28|, |v29|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v36, |v29|, v36
	v_div_scale_f32 v37, null, v33, v33, v36
	v_div_scale_f32 v48, vcc_lo, v36, v33, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v38, v37
	s_waitcnt_depctr 0xfff
	v_fma_f32 v39, -v37, v38, 1.0
	v_fmac_f32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v39, v48, v38
	v_fma_f32 v49, -v37, v39, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v39, v49, v38
	v_fma_f32 v37, -v37, v39, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v37, v37, v38, v39
	v_div_fixup_f32 v36, v37, |v28|, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[36:37], v36
	v_add_f64 v[36:37], v[36:37], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[36:37]
	v_cndmask_b32_e64 v38, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v38, 8, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[36:37], v[36:37], v38
	v_rsq_f64_e32 v[38:39], v[36:37]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[48:49], v[36:37], v[38:39]
	v_mul_f64 v[38:39], v[38:39], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[38:39], v[48:49], 0.5
	v_fma_f64 v[48:49], v[48:49], v[50:51], v[48:49]
	v_fma_f64 v[38:39], v[38:39], v[50:51], v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[48:49], v[48:49], v[36:37]
	v_fma_f64 v[48:49], v[50:51], v[38:39], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[48:49], v[48:49], v[36:37]
	v_fma_f64 v[38:39], v[50:51], v[38:39], v[48:49]
	v_cndmask_b32_e64 v48, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[36:37], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[38:39], v[38:39], v48
	v_cvt_f64_f32_e32 v[48:49], v33
	v_dual_cndmask_b32 v37, v39, v37 :: v_dual_cndmask_b32 v36, v38, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[36:37], v[36:37], v[48:49]
	v_cvt_f32_f64_e32 v37, v[36:37]
.LBB3_148:                              ; %_ZN6HPCLib6pythagEff.exit
                                        ;   in Loop: Header=BB3_141 Depth=3
	s_or_b32 exec_lo, exec_lo, s16
	s_delay_alu instid0(VALU_DEP_1)
	v_div_scale_f32 v33, null, v37, v37, 1.0
	v_div_scale_f32 v39, vcc_lo, 1.0, v37, 1.0
	flat_store_b32 v[26:27], v37
	v_rcp_f32_e32 v36, v33
	s_waitcnt_depctr 0xfff
	v_fma_f32 v38, -v33, v36, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v36, v38, v36
	v_mul_f32_e32 v38, v39, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v48, -v33, v38, v39
	v_fmac_f32_e32 v38, v48, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v33, -v33, v38, v39
	v_div_fmas_f32 v33, v33, v36, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v36, v33, v37, 1.0
	v_mul_f32_e32 v33, v29, v36
	v_mul_f32_e64 v36, v36, -v28
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB3_151
; %bb.149:                              ; %.lr.ph681
                                        ;   in Loop: Header=BB3_141 Depth=3
	s_load_b32 s17, s[8:9], 0x4
	v_mov_b32_e32 v28, v4
	v_mov_b32_e32 v38, v11
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_u32 s13, s17
	s_cselect_b32 s17, 14, 20
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v26, s17
	s_mov_b32 s17, 0
	global_load_u16 v37, v26, s[8:9]
	v_mov_b32_e32 v26, v30
.LBB3_150:                              ;   Parent Loop BB3_131 Depth=1
                                        ;     Parent Loop BB3_132 Depth=2
                                        ;       Parent Loop BB3_141 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_ashrrev_i32_e32 v29, 31, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v27, 31, v26
	v_lshlrev_b64 v[48:49], 2, v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[50:51], 2, v[26:27]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v28, v28, v37
	v_add_nc_u32_e32 v26, v26, v37
	v_add_co_u32 v48, vcc_lo, v0, v48
	v_add_co_ci_u32_e32 v49, vcc_lo, v1, v49, vcc_lo
	v_add_co_u32 v50, vcc_lo, v0, v50
	v_add_co_ci_u32_e32 v51, vcc_lo, v1, v51, vcc_lo
	s_clause 0x1
	flat_load_b32 v27, v[48:49]
	flat_load_b32 v29, v[50:51]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_dual_mul_f32 v39, v36, v27 :: v_dual_add_nc_u32 v38, v38, v37
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v52, v36, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_ge_i32_e32 vcc_lo, v38, v2
	v_fmac_f32_e32 v39, v33, v29
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f32 v27, v33, v27, -v52
	s_or_b32 s17, vcc_lo, s17
	s_clause 0x1
	flat_store_b32 v[50:51], v39
	flat_store_b32 v[48:49], v27
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB3_150
.LBB3_151:                              ; %Flow903
                                        ;   in Loop: Header=BB3_141 Depth=3
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v25, s12, v25
	v_add_nc_u32_e32 v4, v4, v34
	s_and_not1_b32 s14, s14, exec_lo
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	v_cmp_ge_i32_e32 vcc_lo, v25, v31
	buffer_gl0_inv
	s_and_b32 s16, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s14, s14, s16
.LBB3_152:                              ; %Flow906
                                        ;   in Loop: Header=BB3_141 Depth=3
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s15, exec_lo, s14
	s_or_b32 s11, s15, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB3_141
.LBB3_153:                              ; %Flow908
                                        ;   in Loop: Header=BB3_132 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_154:                              ; %.loopexit
                                        ;   in Loop: Header=BB3_132 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	flat_load_b32 v4, v[16:17]
	s_mov_b32 s1, -1
	s_or_b32 s10, s10, exec_lo
	s_mov_b32 s11, exec_lo
	v_cmpx_ne_u32_e64 v8, v3
	s_cbranch_execz .LBB3_181
; %bb.155:                              ;   in Loop: Header=BB3_132 Depth=2
	flat_load_b32 v29, v[23:24]
	flat_load_b32 v30, v[19:20]
	flat_load_b32 v33, v[21:22]
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_cvt_f64_f32_e32 v[25:26], v29
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_cvt_f64_f32_e32 v[27:28], v30
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_sub_f32 v36, v33, v29 :: v_dual_sub_f32 v37, v30, v4
	v_dual_add_f32 v33, v33, v29 :: v_dual_add_f32 v38, v4, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v33, v36, v33
	v_fmac_f32_e32 v33, v37, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[36:37], v33
	v_add_f64 v[25:26], v[25:26], v[25:26]
	v_mul_f64 v[27:28], v[25:26], v[27:28]
	v_lshlrev_b64 v[25:26], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v52, vcc_lo, v10, v25
	v_add_co_ci_u32_e32 v53, vcc_lo, v5, v26, vcc_lo
	flat_load_b32 v33, v[52:53]
	v_div_scale_f64 v[38:39], null, v[27:28], v[27:28], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[48:49], v[38:39]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[50:51], -v[38:39], v[48:49], 1.0
	v_fma_f64 v[48:49], v[48:49], v[50:51], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[38:39], v[48:49], 1.0
	v_fma_f64 v[48:49], v[48:49], v[50:51], v[48:49]
	v_div_scale_f64 v[50:51], vcc_lo, v[36:37], v[27:28], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[52:53], v[50:51], v[48:49]
	v_fma_f64 v[38:39], -v[38:39], v[52:53], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[38:39], v[38:39], v[48:49], v[52:53]
	v_div_fixup_f64 v[27:28], v[38:39], v[27:28], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v36, v[27:28]
                                        ; implicit-def: $vgpr27_vgpr28
	v_cmp_ngt_f32_e64 s1, |v36|, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s1, exec_lo, s2
	s_cbranch_execz .LBB3_157
; %bb.156:                              ;   in Loop: Header=BB3_132 Depth=2
	v_mul_f32_e32 v27, v36, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[27:28], v27
	v_add_f64 v[27:28], v[27:28], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[27:28]
	v_cndmask_b32_e64 v37, 0, 1, vcc_lo
	v_cndmask_b32_e64 v39, 0, 0xffffff80, vcc_lo
	v_lshlrev_b32_e32 v37, 8, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[27:28], v[27:28], v37
	v_rsq_f64_e32 v[37:38], v[27:28]
	v_cmp_class_f64_e64 vcc_lo, v[27:28], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[48:49], v[27:28], v[37:38]
	v_mul_f64 v[37:38], v[37:38], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[37:38], v[48:49], 0.5
	v_fma_f64 v[48:49], v[48:49], v[50:51], v[48:49]
	v_fma_f64 v[37:38], v[37:38], v[50:51], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[48:49], v[48:49], v[27:28]
	v_fma_f64 v[48:49], v[50:51], v[37:38], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[48:49], v[48:49], v[27:28]
	v_fma_f64 v[37:38], v[50:51], v[37:38], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[37:38], v39
	v_dual_cndmask_b32 v28, v38, v28 :: v_dual_cndmask_b32 v27, v37, v27
.LBB3_157:                              ; %Flow901
                                        ;   in Loop: Header=BB3_132 Depth=2
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB3_159
; %bb.158:                              ;   in Loop: Header=BB3_132 Depth=2
	v_and_b32_e32 v39, 0x7fffffff, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v27, null, v39, v39, 1.0
	v_div_scale_f32 v38, vcc_lo, 1.0, v39, 1.0
	v_rcp_f32_e32 v28, v27
	s_waitcnt_depctr 0xfff
	v_fma_f32 v37, -v27, v28, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v28, v37, v28
	v_mul_f32_e32 v37, v38, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v48, -v27, v37, v38
	v_fmac_f32_e32 v37, v48, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v27, -v27, v37, v38
	v_div_fmas_f32 v27, v27, v28, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v27, v27, |v36|, 1.0
	v_div_scale_f32 v28, null, v39, v39, v27
	v_div_scale_f32 v48, vcc_lo, v27, v39, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v37, v28
	s_waitcnt_depctr 0xfff
	v_fma_f32 v38, -v28, v37, 1.0
	v_fmac_f32_e32 v37, v38, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v38, v48, v37
	v_fma_f32 v49, -v28, v38, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v38, v49, v37
	v_fma_f32 v28, -v28, v38, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v28, v28, v37, v38
	v_div_fixup_f32 v27, v28, |v36|, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[27:28], v27
	v_add_f64 v[27:28], v[27:28], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[27:28]
	v_cndmask_b32_e64 v37, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v37, 8, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[27:28], v[27:28], v37
	v_rsq_f64_e32 v[37:38], v[27:28]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[48:49], v[27:28], v[37:38]
	v_mul_f64 v[37:38], v[37:38], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[37:38], v[48:49], 0.5
	v_fma_f64 v[48:49], v[48:49], v[50:51], v[48:49]
	v_fma_f64 v[37:38], v[37:38], v[50:51], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[48:49], v[48:49], v[27:28]
	v_fma_f64 v[48:49], v[50:51], v[37:38], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[48:49], v[48:49], v[27:28]
	v_fma_f64 v[37:38], v[50:51], v[37:38], v[48:49]
	v_cndmask_b32_e64 v48, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[27:28], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[37:38], v[37:38], v48
	v_cvt_f64_f32_e32 v[48:49], v39
	v_dual_cndmask_b32 v28, v38, v28 :: v_dual_cndmask_b32 v27, v37, v27
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[27:28], v[27:28], v[48:49]
.LBB3_159:                              ; %_ZN6HPCLib6pythagEff.exit607
                                        ;   in Loop: Header=BB3_132 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cvt_f32_f64_e32 v27, v[27:28]
	v_cmp_nle_f32_e32 vcc_lo, 0, v36
	s_mov_b32 s14, exec_lo
	v_cndmask_b32_e64 v27, |v27|, -|v27|, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v27, v27, v36
	v_div_scale_f32 v28, null, v27, v27, v30
	v_div_scale_f32 v38, vcc_lo, v30, v27, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v36, v28
	s_waitcnt_depctr 0xfff
	v_fma_f32 v37, -v28, v36, 1.0
	v_fmac_f32_e32 v36, v37, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v37, v38, v36
	v_fma_f32 v39, -v28, v37, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v37, v39, v36
	v_fma_f32 v28, -v28, v37, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v28, v28, v36, v37
	v_div_fixup_f32 v27, v28, v27, v30
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_f32_e32 v28, v33, v4
	v_add_f32_e32 v30, v4, v33
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v27, v27, v29
	v_mul_f32_e32 v27, v29, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v27, v28, v30
	v_div_scale_f32 v28, null, v33, v33, v27
	v_div_scale_f32 v36, vcc_lo, v27, v33, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v29, v28
	s_waitcnt_depctr 0xfff
	v_fma_f32 v30, -v28, v29, 1.0
	v_fmac_f32_e32 v29, v30, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v30, v36, v29
	v_fma_f32 v37, -v28, v30, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v30, v37, v29
	v_fma_f32 v28, -v28, v30, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v28, v28, v29, v30
	v_div_fixup_f32 v50, v28, v33, v27
	v_cmpx_le_i32_e64 v8, v18
	s_cbranch_execz .LBB3_180
; %bb.160:                              ; %.lr.ph698
                                        ;   in Loop: Header=BB3_132 Depth=2
	s_load_b32 s1, s[8:9], 0x4
	v_mul_lo_u32 v36, v2, v8
	v_mov_b32_e32 v55, 1.0
	v_mov_b32_e32 v49, 1.0
	s_mov_b32 s15, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v39, v36, v2
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_u32 s13, s1
	s_cselect_b32 s1, 14, 20
	v_mov_b32_e32 v27, s1
	global_load_u16 v27, v27, s[8:9]
	s_waitcnt vmcnt(0)
	v_mad_u32_u24 v37, v35, v27, v11
	v_mul_lo_u32 v38, v27, s12
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_lt_i32_e64 s1, v37, v2
.LBB3_161:                              ;   Parent Loop BB3_131 Depth=1
                                        ;     Parent Loop BB3_132 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB3_177 Depth 4
	v_lshlrev_b64 v[27:28], 2, v[8:9]
                                        ; implicit-def: $vgpr64
	v_and_b32_e32 v53, 0x7fffffff, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v29, vcc_lo, v6, v27
	v_add_co_ci_u32_e32 v30, vcc_lo, v7, v28, vcc_lo
	v_add_co_u32 v27, vcc_lo, v10, v27
	v_add_co_ci_u32_e32 v28, vcc_lo, v5, v28, vcc_lo
	flat_load_b32 v51, v[29:30] offset:4
	flat_load_b32 v48, v[27:28] offset:4
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_mul_f32_e32 v52, v55, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v54, 0x7fffffff, v52
	v_cmp_ngt_f32_e64 s2, |v50|, |v52|
	s_and_saveexec_b32 s16, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s16
	s_cbranch_execz .LBB3_165
; %bb.162:                              ;   in Loop: Header=BB3_161 Depth=3
	v_mov_b32_e32 v64, 0
	s_mov_b32 s16, exec_lo
	v_cmpx_neq_f32_e32 0, v52
	s_cbranch_execz .LBB3_164
; %bb.163:                              ;   in Loop: Header=BB3_161 Depth=3
	v_div_scale_f32 v55, null, v54, v54, v53
	v_div_scale_f32 v53, vcc_lo, v53, v54, v53
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v64, v55
	s_waitcnt_depctr 0xfff
	v_fma_f32 v65, -v55, v64, 1.0
	v_fmac_f32_e32 v64, v65, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v65, v53, v64
	v_fma_f32 v66, -v55, v65, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v65, v66, v64
	v_fma_f32 v53, -v55, v65, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v53, v53, v64, v65
	v_div_fixup_f32 v53, v53, |v52|, |v50|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v53, |v50|, v53
	v_div_scale_f32 v55, null, v54, v54, v53
	v_div_scale_f32 v66, vcc_lo, v53, v54, v53
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v64, v55
	s_waitcnt_depctr 0xfff
	v_fma_f32 v65, -v55, v64, 1.0
	v_fmac_f32_e32 v64, v65, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v65, v66, v64
	v_fma_f32 v67, -v55, v65, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v65, v67, v64
	v_fma_f32 v55, -v55, v65, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v55, v55, v64, v65
	v_div_fixup_f32 v53, v55, |v52|, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[64:65], v53
	v_add_f64 v[64:65], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[64:65]
	v_cndmask_b32_e64 v53, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v53, 8, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[64:65], v[64:65], v53
	v_cndmask_b32_e64 v53, 0, 0xffffff80, vcc_lo
	v_rsq_f64_e32 v[66:67], v[64:65]
	v_cmp_class_f64_e64 vcc_lo, v[64:65], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[68:69], v[64:65], v[66:67]
	v_mul_f64 v[66:67], v[66:67], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[70:71], -v[66:67], v[68:69], 0.5
	v_fma_f64 v[68:69], v[68:69], v[70:71], v[68:69]
	v_fma_f64 v[66:67], v[66:67], v[70:71], v[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[70:71], -v[68:69], v[68:69], v[64:65]
	v_fma_f64 v[68:69], v[70:71], v[66:67], v[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[70:71], -v[68:69], v[68:69], v[64:65]
	v_fma_f64 v[66:67], v[70:71], v[66:67], v[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[66:67], v[66:67], v53
	v_cvt_f64_f32_e32 v[53:54], v54
	v_dual_cndmask_b32 v65, v67, v65 :: v_dual_cndmask_b32 v64, v66, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[53:54], v[64:65], v[53:54]
	v_cvt_f32_f64_e32 v64, v[53:54]
.LBB3_164:                              ; %Flow897
                                        ;   in Loop: Header=BB3_161 Depth=3
	s_or_b32 exec_lo, exec_lo, s16
                                        ; implicit-def: $vgpr53
                                        ; implicit-def: $vgpr54
.LBB3_165:                              ; %Flow898
                                        ;   in Loop: Header=BB3_161 Depth=3
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB3_167
; %bb.166:                              ;   in Loop: Header=BB3_161 Depth=3
	v_div_scale_f32 v55, null, v53, v53, v54
	v_div_scale_f32 v54, vcc_lo, v54, v53, v54
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v64, v55
	s_waitcnt_depctr 0xfff
	v_fma_f32 v65, -v55, v64, 1.0
	v_fmac_f32_e32 v64, v65, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v65, v54, v64
	v_fma_f32 v66, -v55, v65, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v65, v66, v64
	v_fma_f32 v54, -v55, v65, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v54, v54, v64, v65
	v_div_fixup_f32 v54, v54, |v50|, |v52|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v54, |v52|, v54
	v_div_scale_f32 v55, null, v53, v53, v54
	v_div_scale_f32 v66, vcc_lo, v54, v53, v54
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v64, v55
	s_waitcnt_depctr 0xfff
	v_fma_f32 v65, -v55, v64, 1.0
	v_fmac_f32_e32 v64, v65, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v65, v66, v64
	v_fma_f32 v67, -v55, v65, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v65, v67, v64
	v_fma_f32 v55, -v55, v65, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v55, v55, v64, v65
	v_div_fixup_f32 v54, v55, |v50|, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[54:55], v54
	v_add_f64 v[54:55], v[54:55], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[54:55]
	v_cndmask_b32_e64 v64, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v64, 8, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[54:55], v[54:55], v64
	v_rsq_f64_e32 v[64:65], v[54:55]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[66:67], v[54:55], v[64:65]
	v_mul_f64 v[64:65], v[64:65], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], -v[64:65], v[66:67], 0.5
	v_fma_f64 v[66:67], v[66:67], v[68:69], v[66:67]
	v_fma_f64 v[64:65], v[64:65], v[68:69], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], -v[66:67], v[66:67], v[54:55]
	v_fma_f64 v[66:67], v[68:69], v[64:65], v[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], -v[66:67], v[66:67], v[54:55]
	v_fma_f64 v[64:65], v[68:69], v[64:65], v[66:67]
	v_cndmask_b32_e64 v66, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[54:55], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[64:65], v[64:65], v66
	v_cvt_f64_f32_e32 v[66:67], v53
	v_dual_cndmask_b32 v55, v65, v55 :: v_dual_cndmask_b32 v54, v64, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[53:54], v[54:55], v[66:67]
	v_cvt_f32_f64_e32 v64, v[53:54]
.LBB3_167:                              ; %_ZN6HPCLib6pythagEff.exit609
                                        ;   in Loop: Header=BB3_161 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_scale_f32 v53, null, v64, v64, v50
	v_div_scale_f32 v54, null, v64, v64, v52
	v_div_scale_f32 v68, vcc_lo, v50, v64, v50
	v_rcp_f32_e32 v55, v53
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v65, v54
	v_mul_f32_e32 v51, v49, v51
	flat_store_b32 v[29:30], v64
                                        ; implicit-def: $vgpr29
	v_fma_f32 v66, -v53, v55, 1.0
	v_fma_f32 v67, -v54, v65, 1.0
	v_fmac_f32_e32 v55, v66, v55
	v_div_scale_f32 v66, s2, v52, v64, v52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v65, v67, v65
	v_mul_f32_e32 v67, v68, v55
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v69, v66, v65
	v_fma_f32 v70, -v53, v67, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v71, -v54, v69, v66
	v_fmac_f32_e32 v67, v70, v55
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v69, v71, v65
	v_fma_f32 v53, -v53, v67, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v54, -v54, v69, v66
	v_div_fmas_f32 v53, v53, v55, v67
	s_mov_b32 vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v54, v54, v65, v69
	v_div_fixup_f32 v50, v53, v64, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v52, v54, v64, v52
	s_waitcnt vmcnt(0) lgkmcnt(1)
	v_mul_f32_e32 v54, v48, v52
	v_mul_f32_e32 v53, v51, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v55, 0x7fffffff, v54
	v_fmac_f32_e32 v53, v33, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v49, 0x7fffffff, v53
	v_cmp_ngt_f32_e64 s2, |v53|, |v54|
	s_and_saveexec_b32 s16, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s16
	s_cbranch_execz .LBB3_171
; %bb.168:                              ;   in Loop: Header=BB3_161 Depth=3
	v_mov_b32_e32 v29, 0
	s_mov_b32 s16, exec_lo
	v_cmpx_neq_f32_e32 0, v54
	s_cbranch_execz .LBB3_170
; %bb.169:                              ;   in Loop: Header=BB3_161 Depth=3
	v_div_scale_f32 v29, null, v55, v55, v49
	v_div_scale_f32 v49, vcc_lo, v49, v55, v49
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v30, v29
	s_waitcnt_depctr 0xfff
	v_fma_f32 v64, -v29, v30, 1.0
	v_fmac_f32_e32 v30, v64, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v64, v49, v30
	v_fma_f32 v65, -v29, v64, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v64, v65, v30
	v_fma_f32 v29, -v29, v64, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v29, v29, v30, v64
	v_div_fixup_f32 v29, v29, |v54|, |v53|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v29, |v53|, v29
	v_div_scale_f32 v30, null, v55, v55, v29
	v_div_scale_f32 v65, vcc_lo, v29, v55, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v49, v30
	s_waitcnt_depctr 0xfff
	v_fma_f32 v64, -v30, v49, 1.0
	v_fmac_f32_e32 v49, v64, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v64, v65, v49
	v_fma_f32 v66, -v30, v64, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v64, v66, v49
	v_fma_f32 v30, -v30, v64, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v30, v30, v49, v64
	v_div_fixup_f32 v29, v30, |v54|, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[29:30], v29
	v_add_f64 v[29:30], v[29:30], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[29:30]
	v_cndmask_b32_e64 v49, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v49, 8, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[29:30], v[29:30], v49
	v_cndmask_b32_e64 v49, 0, 0xffffff80, vcc_lo
	v_rsq_f64_e32 v[64:65], v[29:30]
	v_cmp_class_f64_e64 vcc_lo, v[29:30], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[66:67], v[29:30], v[64:65]
	v_mul_f64 v[64:65], v[64:65], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], -v[64:65], v[66:67], 0.5
	v_fma_f64 v[66:67], v[66:67], v[68:69], v[66:67]
	v_fma_f64 v[64:65], v[64:65], v[68:69], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], -v[66:67], v[66:67], v[29:30]
	v_fma_f64 v[66:67], v[68:69], v[64:65], v[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], -v[66:67], v[66:67], v[29:30]
	v_fma_f64 v[64:65], v[68:69], v[64:65], v[66:67]
	v_cvt_f64_f32_e32 v[66:67], v55
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[64:65], v[64:65], v49
	v_dual_cndmask_b32 v30, v65, v30 :: v_dual_cndmask_b32 v29, v64, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[29:30], v[29:30], v[66:67]
	v_cvt_f32_f64_e32 v29, v[29:30]
.LBB3_170:                              ; %Flow895
                                        ;   in Loop: Header=BB3_161 Depth=3
	s_or_b32 exec_lo, exec_lo, s16
                                        ; implicit-def: $vgpr49
                                        ; implicit-def: $vgpr55
.LBB3_171:                              ; %Flow896
                                        ;   in Loop: Header=BB3_161 Depth=3
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB3_173
; %bb.172:                              ;   in Loop: Header=BB3_161 Depth=3
	v_div_scale_f32 v29, null, v49, v49, v55
	v_div_scale_f32 v55, vcc_lo, v55, v49, v55
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v30, v29
	s_waitcnt_depctr 0xfff
	v_fma_f32 v64, -v29, v30, 1.0
	v_fmac_f32_e32 v30, v64, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v64, v55, v30
	v_fma_f32 v65, -v29, v64, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v64, v65, v30
	v_fma_f32 v29, -v29, v64, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v29, v29, v30, v64
	v_div_fixup_f32 v29, v29, |v53|, |v54|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v29, |v54|, v29
	v_div_scale_f32 v30, null, v49, v49, v29
	v_div_scale_f32 v65, vcc_lo, v29, v49, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v55, v30
	s_waitcnt_depctr 0xfff
	v_fma_f32 v64, -v30, v55, 1.0
	v_fmac_f32_e32 v55, v64, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v64, v65, v55
	v_fma_f32 v66, -v30, v64, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v64, v66, v55
	v_fma_f32 v30, -v30, v64, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v30, v30, v55, v64
	v_div_fixup_f32 v29, v30, |v53|, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[29:30], v29
	v_add_f64 v[29:30], v[29:30], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[29:30]
	v_cndmask_b32_e64 v55, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v55, 8, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[29:30], v[29:30], v55
	v_cndmask_b32_e64 v55, 0, 0xffffff80, vcc_lo
	v_rsq_f64_e32 v[64:65], v[29:30]
	v_cmp_class_f64_e64 vcc_lo, v[29:30], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[66:67], v[29:30], v[64:65]
	v_mul_f64 v[64:65], v[64:65], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], -v[64:65], v[66:67], 0.5
	v_fma_f64 v[66:67], v[66:67], v[68:69], v[66:67]
	v_fma_f64 v[64:65], v[64:65], v[68:69], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], -v[66:67], v[66:67], v[29:30]
	v_fma_f64 v[66:67], v[68:69], v[64:65], v[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], -v[66:67], v[66:67], v[29:30]
	v_fma_f64 v[64:65], v[68:69], v[64:65], v[66:67]
	v_cvt_f64_f32_e32 v[66:67], v49
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[64:65], v[64:65], v55
	v_dual_cndmask_b32 v30, v65, v30 :: v_dual_cndmask_b32 v29, v64, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[29:30], v[29:30], v[66:67]
	v_cvt_f32_f64_e32 v29, v[29:30]
.LBB3_173:                              ; %_ZN6HPCLib6pythagEff.exit611
                                        ;   in Loop: Header=BB3_161 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v49, v50
	v_mov_b32_e32 v55, v52
	s_mov_b32 s2, exec_lo
	flat_store_b32 v[27:28], v29
	v_cmpx_neq_f32_e32 0, v29
	s_cbranch_execz .LBB3_175
; %bb.174:                              ;   in Loop: Header=BB3_161 Depth=3
	v_div_scale_f32 v27, null, v29, v29, 1.0
	v_div_scale_f32 v49, vcc_lo, 1.0, v29, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v28, v27
	s_waitcnt_depctr 0xfff
	v_fma_f32 v30, -v27, v28, 1.0
	v_fmac_f32_e32 v28, v30, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v30, v49, v28
	v_fma_f32 v55, -v27, v30, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v30, v55, v28
	v_fma_f32 v27, -v27, v30, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v27, v27, v28, v30
	v_div_fixup_f32 v27, v27, v29, 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v55, v54, v27
	v_mul_f32_e32 v49, v53, v27
.LBB3_175:                              ;   in Loop: Header=BB3_161 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB3_178
; %bb.176:                              ; %.lr.ph690
                                        ;   in Loop: Header=BB3_161 Depth=3
	v_mov_b32_e32 v27, v37
	s_mov_b32 s16, 0
.LBB3_177:                              ;   Parent Loop BB3_131 Depth=1
                                        ;     Parent Loop BB3_132 Depth=2
                                        ;       Parent Loop BB3_161 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v28, v39, v27
	v_add_nc_u32_e32 v53, v36, v27
	v_add_nc_u32_e32 v27, v27, v38
	v_ashrrev_i32_e32 v29, 31, v28
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v54, 31, v53
	v_lshlrev_b64 v[28:29], 2, v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[53:54], 2, v[53:54]
	v_add_co_u32 v28, vcc_lo, v0, v28
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v29, vcc_lo, v1, v29, vcc_lo
	v_add_co_u32 v53, vcc_lo, v0, v53
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v54, vcc_lo, v1, v54, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v27, v2
	s_clause 0x1
	flat_load_b32 v30, v[28:29]
	flat_load_b32 v64, v[53:54]
	s_or_b32 s16, vcc_lo, s16
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_mul_f32_e32 v65, v55, v30
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v66, v55, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v65, v49, v64
	v_fma_f32 v30, v49, v30, -v66
	s_clause 0x1
	flat_store_b32 v[53:54], v65
	flat_store_b32 v[28:29], v30
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB3_177
.LBB3_178:                              ; %Flow894
                                        ;   in Loop: Header=BB3_161 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	v_dual_mul_f32 v27, v33, v52 :: v_dual_mul_f32 v28, v48, v50
	v_add_nc_u32_e32 v29, 1, v8
	v_cmp_ge_i32_e32 vcc_lo, v8, v18
	v_add_nc_u32_e32 v36, v36, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f32 v27, v51, v50, -v27
	v_dual_mul_f32 v50, v28, v55 :: v_dual_add_nc_u32 v39, v39, v2
	v_mov_b32_e32 v8, v29
	s_or_b32 s15, vcc_lo, s15
	v_mul_f32_e32 v30, v27, v55
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v50, v27, v49
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_fma_f32 v33, v28, v49, -v30
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB3_161
; %bb.179:                              ; %Flow899
                                        ;   in Loop: Header=BB3_132 Depth=2
	s_or_b32 exec_lo, exec_lo, s15
.LBB3_180:                              ; %Flow900
                                        ;   in Loop: Header=BB3_132 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s14
	s_add_i32 s7, s7, 1
	v_add_co_u32 v25, vcc_lo, v6, v25
	s_cmp_eq_u32 s7, 30
	v_add_co_ci_u32_e32 v26, vcc_lo, v7, v26, vcc_lo
	s_cselect_b32 s1, -1, 0
	s_and_not1_b32 s10, s10, exec_lo
	s_or_not1_b32 s1, s1, exec_lo
	s_clause 0x1
	flat_store_b32 v[25:26], v9
	flat_store_b32 v[23:24], v50
	flat_store_b32 v[16:17], v33
.LBB3_181:                              ; %Flow912
                                        ;   in Loop: Header=BB3_132 Depth=2
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s1
	s_or_b32 s5, s1, s5
	s_and_not1_b32 s1, s6, exec_lo
	s_and_b32 s2, s10, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s6, s1, s2
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB3_132
; %bb.182:                              ; %loop.exit.guard
                                        ;   in Loop: Header=BB3_131 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s1, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB3_186
; %bb.183:                              ;   in Loop: Header=BB3_131 Depth=1
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_gt_f32_e32 0, v4
	s_cbranch_execz .LBB3_185
; %bb.184:                              ;   in Loop: Header=BB3_131 Depth=1
	v_xor_b32_e32 v4, 0x80000000, v4
	flat_store_b32 v[16:17], v4
.LBB3_185:                              ; %Flow
                                        ;   in Loop: Header=BB3_131 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_186:                              ; %.loopexit614
                                        ;   in Loop: Header=BB3_131 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_i32_e32 vcc_lo, 2, v31
	v_add_co_u32 v14, s1, v14, -4
	v_add_co_ci_u32_e64 v15, s1, -1, v15, s1
	v_sub_nc_u32_e32 v13, v13, v2
	v_sub_nc_u32_e32 v12, v12, v2
	s_or_b32 s4, vcc_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB3_131
.LBB3_187:                              ; %Flow914
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end3:
	.size	_ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_, .Lfunc_end3-_ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 12436
; NumSgprs: 34
; NumVgprs: 81
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi ; -- Begin function _ZN6HPCLib9cuCalcU_BEPfiiS0_Pi
	.globl	_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi
	.p2align	8
	.type	_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi,@function
_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi:         ; @_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi
; %bb.0:
	v_mov_b32_e32 v1, 0
	s_load_b64 s[46:47], s[0:1], 0x8
	v_bfe_u32 v46, v0, 10, 10
	s_mov_b64 s[26:27], s[0:1]
	s_mov_b32 s13, s14
	global_load_b32 v3, v1, s[0:1] offset:46
	v_bfe_u32 v1, v0, 20, 10
	v_lshl_add_u32 v43, v46, 2, 0
	s_mov_b32 s3, 0
	s_mov_b32 s32, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s47, s46
	v_cmp_gt_i32_e64 s0, s2, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_and_b32 s0, vcc_lo, s0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v47, 0xffff, v3
	v_lshlrev_b32_e32 v56, 2, v47
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB4_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b64 s[0:1], s[26:27], 0x0
	v_dual_mov_b32 v4, v43 :: v_dual_mov_b32 v1, v46
.LBB4_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_add_nc_u32_e32 v1, v1, v47
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_le_i32_e32 vcc_lo, s2, v1
	global_load_b32 v2, v[5:6], off
	s_or_b32 s3, vcc_lo, s3
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v2
	v_add_nc_u32_e32 v4, v4, v56
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB4_2
.LBB4_3:                                ; %Flow175
	s_or_b32 exec_lo, exec_lo, s4
	v_lshrrev_b32_e32 v1, 16, v3
	s_lshl_b32 s0, s2, 2
	s_load_b128 s[48:51], s[26:27], 0x10
	s_add_i32 s33, s0, 0
	v_mov_b32_e32 v45, 0
	v_mul_lo_u32 v44, v1, v47
	s_cmp_lg_u32 s33, -1
	s_mov_b64 s[0:1], src_shared_base
	s_cselect_b32 s0, s33, 0
	s_cselect_b32 s4, s1, 0
	s_lshl_b32 s2, s47, 2
	v_mov_b32_e32 v31, v0
	s_add_i32 s2, s33, s2
	v_mov_b32_e32 v0, 0
	v_lshlrev_b64 v[1:2], 2, v[44:45]
	s_cmp_lg_u32 s2, -1
	v_mov_b32_e32 v5, s4
	s_cselect_b32 s5, s2, 0
	s_cselect_b32 s6, s1, 0
	v_dual_mov_b32 v3, s47 :: v_dual_mov_b32 v8, s5
	v_add_co_u32 v6, vcc_lo, s5, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s6, v2, vcc_lo
	v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v4, s0
	v_dual_mov_b32 v2, s46 :: v_dual_mov_b32 v9, s6
	s_add_u32 s8, s26, 32
	s_addc_u32 s9, s27, 0
	s_mov_b32 s14, s15
	s_mov_b32 s54, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, _ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_@rel32@lo+4
	s_addc_u32 s3, s3, _ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	s_cmp_gt_i32 s47, 0
	s_mov_b32 s0, 0
	s_cselect_b32 s45, -1, 0
	s_cmp_lt_i32 s47, 1
	global_store_b32 v45, v45, s[50:51]
	s_cbranch_scc1 .LBB4_8
; %bb.4:                                ; %.lr.ph105.preheader
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v45, 0
	s_mov_b32 s1, s33
	s_mov_b32 s2, 0
.LBB4_5:                                ; %.lr.ph105
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v1, s1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_cmp_nle_f32_e32 vcc_lo, 0x3727c5ac, v1
	s_cbranch_vccnz .LBB4_7
; %bb.6:                                ;   in Loop: Header=BB4_5 Depth=1
	v_cmp_lt_f32_e32 vcc_lo, v45, v1
	s_and_b32 s3, vcc_lo, exec_lo
	s_cselect_b32 s54, s2, s54
	s_add_i32 s0, s0, 1
	v_cndmask_b32_e32 v45, v45, v1, vcc_lo
	v_mov_b32_e32 v1, s0
	global_store_b32 v0, v1, s[50:51]
.LBB4_7:                                ;   in Loop: Header=BB4_5 Depth=1
	s_add_i32 s2, s2, 1
	s_add_i32 s1, s1, 4
	s_cmp_eq_u32 s47, s2
	s_cbranch_scc0 .LBB4_5
.LBB4_8:                                ; %._crit_edge
	s_ashr_i32 s1, s0, 31
	s_mov_b32 s53, 0
	s_lshl_b64 s[2:3], s[0:1], 2
	s_mov_b32 s52, 1
	v_cmp_gt_u64_e64 s1, s[2:3], 1
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s1, s1, exec_lo
	s_cselect_b32 s1, s3, 0
	s_cselect_b32 s2, s2, 1
	s_cmp_gt_i32 s0, -1
	s_cselect_b32 s0, s2, -1
	s_cselect_b32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
	s_add_u32 s8, s26, 32
	s_addc_u32 s9, s27, 0
	s_getpc_b64 s[56:57]
	s_add_u32 s56, s56, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s57, s57, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[56:57]
	v_dual_mov_b32 v44, 0 :: v_dual_mov_b32 v41, v0
	v_mov_b32_e32 v42, v1
	global_load_b32 v0, v44, s[50:51]
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	v_cmp_lt_u64_e32 vcc_lo, 1, v[2:3]
	v_dual_cndmask_b32 v3, 0, v3 :: v_dual_cndmask_b32 v2, 1, v2
	v_cmp_lt_i64_e32 vcc_lo, -1, v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v1, -1, v3 :: v_dual_cndmask_b32 v0, -1, v2
	s_swappc_b64 s[30:31], s[56:57]
	v_mov_b32_e32 v2, s54
	global_store_b32 v[0:1], v45, off
	global_store_b32 v[41:42], v2, off
	global_load_b32 v2, v44, s[50:51]
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, 2, v2
	v_readfirstlane_b32 s4, v2
	s_cbranch_vccnz .LBB4_19
; %bb.9:                                ; %.lr.ph113.preheader
	v_add_co_u32 v10, vcc_lo, v0, -4
	v_add_co_ci_u32_e32 v11, vcc_lo, -1, v1, vcc_lo
	v_add_co_u32 v12, vcc_lo, v41, -4
	v_add_co_ci_u32_e32 v13, vcc_lo, -1, v42, vcc_lo
.LBB4_10:                               ; %.lr.ph113
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB4_12 Depth 2
	s_lshl_b64 s[0:1], s[52:53], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v2, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s45
	global_store_b32 v[2:3], v44, off
	s_cbranch_vccnz .LBB4_18
; %bb.11:                               ; %.lr.ph109
                                        ;   in Loop: Header=BB4_10 Depth=1
	s_bfe_i64 s[2:3], s[52:53], 0x200000
	v_mov_b32_e32 v14, 0
	s_lshl_b64 s[2:3], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v4, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v11, vcc_lo
	v_add_co_u32 v6, vcc_lo, v12, s2
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v13, vcc_lo
	v_add_co_u32 v8, vcc_lo, v41, s0
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v42, vcc_lo
	s_mov_b32 s1, 0
	s_mov_b32 s2, s33
.LBB4_12:                               ;   Parent Loop BB4_10 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v16, v[4:5], off
	v_mov_b32_e32 v15, s2
	s_mov_b32 s3, exec_lo
	ds_load_b32 v15, v15
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_le_f32_e32 v15, v16
	s_cbranch_execz .LBB4_16
; %bb.13:                               ;   in Loop: Header=BB4_12 Depth=2
	global_load_b32 v16, v[6:7], off
	v_cmp_gt_f32_e64 s0, v15, v14
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, s1, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, vcc_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB4_15
; %bb.14:                               ;   in Loop: Header=BB4_12 Depth=2
	v_mov_b32_e32 v16, s1
	v_mov_b32_e32 v14, v15
	global_store_b32 v[8:9], v16, off
	global_store_b32 v[2:3], v15, off
.LBB4_15:                               ; %Flow168
                                        ;   in Loop: Header=BB4_12 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
.LBB4_16:                               ;   in Loop: Header=BB4_12 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_add_i32 s1, s1, 1
	s_add_i32 s2, s2, 4
	s_cmp_eq_u32 s47, s1
	s_cbranch_scc0 .LBB4_12
; %bb.17:                               ; %._crit_edge110.loopexit
                                        ;   in Loop: Header=BB4_10 Depth=1
	global_load_b32 v2, v44, s[50:51]
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s4, v2
.LBB4_18:                               ; %._crit_edge110
                                        ;   in Loop: Header=BB4_10 Depth=1
	s_add_i32 s52, s52, 1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_cmp_ge_i32 s52, s4
	s_cbranch_scc0 .LBB4_10
.LBB4_19:                               ; %.preheader
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB4_25
; %bb.20:                               ; %.lr.ph121
	v_cmp_gt_i32_e32 vcc_lo, s46, v46
	s_mov_b32 s3, 0
	s_lshl_b32 s5, s46, 2
	s_mov_b32 s6, 0
	s_mov_b32 s2, s3
.LBB4_21:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB4_23 Depth 2
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB4_24
; %bb.22:                               ; %.lr.ph117
                                        ;   in Loop: Header=BB4_21 Depth=1
	s_lshl_b64 s[0:1], s[2:3], 2
	s_mov_b32 s8, 0
	v_add_co_u32 v0, s0, v41, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s0, s1, v42, s0
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, s5, v2, v[43:44]
	v_mov_b32_e32 v1, v46
.LBB4_23:                               ;   Parent Loop BB4_21 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, s6, v1
	ds_load_b32 v4, v0
	v_add_nc_u32_e32 v1, v1, v47
	v_add_nc_u32_e32 v0, v0, v56
	v_ashrrev_i32_e32 v3, 31, v2
	v_cmp_le_i32_e64 s0, s46, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_or_b32 s8, s0, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s1, s48, v2
	v_add_co_ci_u32_e64 v3, s1, s49, v3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[2:3], v4, off
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB4_23
.LBB4_24:                               ; %Flow165
                                        ;   in Loop: Header=BB4_21 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_add_i32 s2, s2, 1
	s_add_i32 s6, s6, s46
	s_cmp_eq_u32 s2, s4
	s_cbranch_scc0 .LBB4_21
.LBB4_25:                               ; %._crit_edge122
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN6HPCLib9cuCalcU_BEPfiiS0_Pi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 8
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 136
		.amdhsa_next_free_sgpr 58
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi, .Lfunc_end4-_ZN6HPCLib9cuCalcU_BEPfiiS0_Pi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1232
; NumSgprs: 60
; NumVgprs: 136
; ScratchSize: 8
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 7
; VGPRBlocks: 16
; NumSGPRsForWavesPerEU: 60
; NumVGPRsForWavesPerEU: 136
; Occupancy: 10
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2align	2                               ; -- Begin function _ZN6HPCLib14cuSVD_W_sharedEPfiiS0_S0_S0_
	.type	_ZN6HPCLib14cuSVD_W_sharedEPfiiS0_S0_S0_,@function
_ZN6HPCLib14cuSVD_W_sharedEPfiiS0_S0_S0_: ; @_ZN6HPCLib14cuSVD_W_sharedEPfiiS0_S0_S0_
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_load_b32 s0, s[8:9], 0x8
	v_mov_b32_e32 v10, v4
	v_mov_b32_e32 v28, 0
	v_bfe_u32 v38, v31, 10, 10
	v_bfe_u32 v39, v31, 20, 10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_u32 s14, s0
	s_cselect_b32 s0, 16, 22
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, s0
	v_cmp_lt_i32_e64 s0, 0, v3
	global_load_u16 v15, v4, s[8:9]
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[11:12], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, v6, v11
	v_add_co_ci_u32_e32 v14, vcc_lo, v7, v12, vcc_lo
	flat_store_b32 v[13:14], v28
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v15
	s_and_saveexec_b32 s10, s0
	s_cbranch_execz .LBB5_91
; %bb.1:                                ; %.lr.ph474
	s_load_b32 s1, s[8:9], 0x4
	v_dual_mov_b32 v37, 0 :: v_dual_lshlrev_b32 v16, 2, v39
	v_mul_lo_u32 v50, v2, s5
	v_mul_lo_u32 v51, v39, v2
	v_dual_mov_b32 v18, 0 :: v_dual_add_nc_u32 v49, 1, v2
	s_mov_b32 s7, 0
	s_mov_b32 s14, 0
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v27, 0
	v_mov_b32_e32 v55, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_u32 s13, s1
	s_cselect_b32 s1, 14, 20
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, s1
	global_load_u16 v48, v4, s[8:9]
	v_mul_u32_u24_e32 v4, s5, v38
	v_lshlrev_b32_e32 v4, 2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_u32 v19, vcc_lo, v8, v4
	v_add_co_ci_u32_e32 v20, vcc_lo, 0, v9, vcc_lo
	v_add_co_u32 v21, vcc_lo, v19, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v22, vcc_lo, 0, v20, vcc_lo
	s_waitcnt vmcnt(0)
	v_mad_u32_u24 v4, v39, v48, v38
	v_readfirstlane_b32 s11, v48
	v_mul_lo_u32 v53, v50, v48
	v_mul_u32_u24_e32 v52, v39, v48
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b32_e32 v16, 2, v4
	s_mul_i32 s11, s11, s5
	v_mul_lo_u32 v54, v2, v4
	s_cmp_gt_u32 s11, 1
	v_cmp_eq_u32_e64 s1, 0, v4
	v_add_co_u32 v23, vcc_lo, v8, v16
	v_add_co_ci_u32_e32 v24, vcc_lo, 0, v9, vcc_lo
	s_cselect_b32 s12, -1, 0
	s_cmp_gt_u32 s5, 1
	s_cselect_b32 s15, -1, 0
.LBB5_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB5_4 Depth 2
                                        ;     Child Loop BB5_7 Depth 2
                                        ;     Child Loop BB5_17 Depth 2
                                        ;     Child Loop BB5_20 Depth 2
                                        ;     Child Loop BB5_27 Depth 2
                                        ;       Child Loop BB5_29 Depth 3
                                        ;       Child Loop BB5_32 Depth 3
                                        ;       Child Loop BB5_39 Depth 3
                                        ;     Child Loop BB5_43 Depth 2
                                        ;     Child Loop BB5_48 Depth 2
                                        ;     Child Loop BB5_51 Depth 2
                                        ;     Child Loop BB5_59 Depth 2
                                        ;     Child Loop BB5_62 Depth 2
                                        ;     Child Loop BB5_69 Depth 2
                                        ;     Child Loop BB5_72 Depth 2
                                        ;       Child Loop BB5_74 Depth 3
                                        ;       Child Loop BB5_77 Depth 3
                                        ;       Child Loop BB5_82 Depth 3
                                        ;     Child Loop BB5_86 Depth 2
	flat_load_b32 v33, v[13:14]
	v_mul_lo_u32 v32, v27, v2
	v_sub_nc_u32_e32 v35, v2, v27
	v_mov_b32_e32 v17, v27
	v_mov_b32_e32 v16, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v36, -1, v35
	v_lshlrev_b64 v[28:29], 2, v[17:18]
	v_add_nc_u32_e32 v25, v32, v27
	v_mov_b32_e32 v27, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v26, 31, v25
	v_lshlrev_b64 v[30:31], 2, v[25:26]
	v_add_co_u32 v25, s2, v6, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v26, s2, v7, v29, s2
	v_add_co_u32 v30, s2, v0, v30
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v31, s2, v1, v31, s2
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v33, v37, v33
	s_clause 0x1
	flat_store_b32 v[25:26], v33
	flat_store_b64 v[13:14], v[15:16]
	v_cmpx_lt_i32_e64 v4, v36
	s_cbranch_execz .LBB5_6
; %bb.3:                                ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB5_2 Depth=1
	v_mov_b32_e32 v27, 0
	v_mov_b32_e32 v33, v4
	s_mov_b32 s3, 0
.LBB5_4:                                ; %.lr.ph.i
                                        ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v34, 31, v33
	v_lshlrev_b64 v[64:65], 2, v[33:34]
	v_add_nc_u32_e32 v33, s11, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v64, vcc_lo, v30, v64
	v_add_co_ci_u32_e32 v65, vcc_lo, v31, v65, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_ge_i32_e32 vcc_lo, v33, v36
	flat_load_b32 v16, v[64:65]
	s_or_b32 s3, vcc_lo, s3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e64 v27, v27, |v16|
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB5_4
; %bb.5:                                ; %Flow689
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB5_6:                                ; %Flow690
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_mov_b32 s2, s11
	flat_store_b32 v[23:24], v27
	s_cbranch_vccnz .LBB5_10
.LBB5_7:                                ; %.lr.ph34.i
                                        ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshr_b32 s6, s2, 1
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_u32_e64 s6, v4
	s_cbranch_execz .LBB5_9
; %bb.8:                                ;   in Loop: Header=BB5_7 Depth=2
	s_lshl_b64 s[16:17], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v33, vcc_lo, v23, s16
	v_add_co_ci_u32_e32 v34, vcc_lo, s17, v24, vcc_lo
	s_clause 0x1
	flat_load_b32 v16, v[33:34]
	flat_load_b32 v27, v[23:24]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v16, v16, v27
	flat_store_b32 v[23:24], v16
.LBB5_9:                                ;   in Loop: Header=BB5_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_cmp_gt_u32 s2, 3
	s_mov_b32 s2, s6
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB5_7
.LBB5_10:                               ; %._crit_edge35.i
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB5_12
; %bb.11:                               ;   in Loop: Header=BB5_2 Depth=1
	flat_load_b32 v16, v[8:9]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[13:14], v16
.LBB5_12:                               ; %_ZN6HPCLib20cuReduceAbsYZ_sharedEPfiS0_S0_.exit
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	flat_load_b32 v33, v[13:14]
	v_add_nc_u32_e32 v27, 1, v17
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_f32_e32 0, v33
	s_xor_b32 s3, exec_lo, s3
; %bb.13:                               ; %_ZN6HPCLib20cuReduceAbsYZ_sharedEPfiS0_S0_.exit._crit_edge
                                        ;   in Loop: Header=BB5_2 Depth=1
	v_add_nc_u32_e32 v27, 1, v17
	s_mov_b32 s2, 0
                                        ; implicit-def: $vgpr30_vgpr31
                                        ; implicit-def: $vgpr35
                                        ; implicit-def: $vgpr32
; %bb.14:                               ; %Flow685
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_saveexec_b32 s4, s3
	v_mov_b32_e32 v16, s2
	s_xor_b32 exec_lo, exec_lo, s4
	s_cbranch_execz .LBB5_45
; %bb.15:                               ;   in Loop: Header=BB5_2 Depth=1
	v_cmp_lt_i32_e64 s2, v4, v35
	v_mov_b32_e32 v16, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB5_19
; %bb.16:                               ; %.lr.ph.i383.preheader
                                        ;   in Loop: Header=BB5_2 Depth=1
	v_ashrrev_i32_e32 v33, 31, v32
	v_add_co_u32 v34, vcc_lo, v0, v28
	v_add_co_ci_u32_e32 v36, vcc_lo, v1, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[32:33], 2, v[32:33]
	v_mov_b32_e32 v16, 0
	s_mov_b32 s6, 0
	v_add_co_u32 v34, vcc_lo, v34, v32
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v36, vcc_lo, v36, v33, vcc_lo
	v_mov_b32_e32 v32, v4
.LBB5_17:                               ; %.lr.ph.i383
                                        ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v33, 31, v32
	v_lshlrev_b64 v[64:65], 2, v[32:33]
	v_add_nc_u32_e32 v32, s11, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v64, vcc_lo, v34, v64
	v_add_co_ci_u32_e32 v65, vcc_lo, v36, v65, vcc_lo
	flat_load_b32 v33, v[13:14]
	flat_load_b32 v37, v[64:65]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_div_scale_f32 v66, null, v33, v33, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v67, v66
	s_waitcnt_depctr 0xfff
	v_fma_f32 v68, -v66, v67, 1.0
	v_fmac_f32_e32 v67, v68, v67
	v_div_scale_f32 v68, vcc_lo, v37, v33, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v69, v68, v67
	v_fma_f32 v70, -v66, v69, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v69, v70, v67
	v_fma_f32 v66, -v66, v69, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v66, v66, v67, v69
	v_cmp_ge_i32_e32 vcc_lo, v32, v35
	v_div_fixup_f32 v33, v66, v33, v37
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v16, v33, v33
	flat_store_b32 v[64:65], v33
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB5_17
; %bb.18:                               ; %Flow683
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB5_19:                               ; %Flow684
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_mov_b32 s3, s11
	flat_store_b32 v[23:24], v16
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB5_23
.LBB5_20:                               ; %.lr.ph39.i
                                        ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshr_b32 s6, s3, 1
	s_mov_b32 s16, exec_lo
	v_cmpx_gt_u32_e64 s6, v4
	s_cbranch_execz .LBB5_22
; %bb.21:                               ;   in Loop: Header=BB5_20 Depth=2
	s_lshl_b64 s[18:19], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v32, vcc_lo, v23, s18
	v_add_co_ci_u32_e32 v33, vcc_lo, s19, v24, vcc_lo
	s_clause 0x1
	flat_load_b32 v16, v[32:33]
	flat_load_b32 v32, v[23:24]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v16, v16, v32
	flat_store_b32 v[23:24], v16
.LBB5_22:                               ;   in Loop: Header=BB5_20 Depth=2
	s_or_b32 exec_lo, exec_lo, s16
	s_cmp_gt_u32 s3, 3
	s_mov_b32 s3, s6
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB5_20
.LBB5_23:                               ; %._crit_edge40.i
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB5_25
; %bb.24:                               ;   in Loop: Header=BB5_2 Depth=1
	flat_load_b32 v16, v[8:9]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[13:14], v16 offset:4
.LBB5_25:                               ; %_ZN6HPCLib31cuVecScaleSquareReduceYZ_sharedEPfS0_iS0_S0_.exit
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	flat_load_b32 v34, v[13:14] offset:4
	flat_load_b32 v64, v[30:31]
	s_mov_b32 s16, exec_lo
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_mul_f32_e32 v16, 0x4f800000, v34
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v16, v34, v16, vcc_lo
	v_sqrt_f32_e32 v32, v16
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v33, -1, v32
	v_add_nc_u32_e32 v36, 1, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v37, -v33, v32, v16
	v_fma_f32 v65, -v36, v32, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s3, 0, v37
	v_cndmask_b32_e64 v32, v32, v33, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s3, 0, v65
	v_cndmask_b32_e64 v32, v32, v36, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v33, 0x37800000, v32 :: v_dual_add_nc_u32 v36, v4, v17
	v_cndmask_b32_e32 v32, v32, v33, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v16, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v16, v32, v16, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_nle_f32_e32 vcc_lo, 0, v64
	v_cndmask_b32_e64 v32, |v16|, -|v16|, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_xor_b32_e32 v16, 0x80000000, v32
	v_add_f32_e32 v32, v64, v32
	flat_store_b32 v[30:31], v32
	v_cmpx_lt_i32_e64 v27, v3
	s_cbranch_execz .LBB5_41
; %bb.26:                               ; %.lr.ph454
                                        ;   in Loop: Header=BB5_2 Depth=1
	v_mul_lo_u32 v37, v2, v27
	v_mad_u64_u32 v[32:33], null, v49, v17, v[4:5]
	v_fma_f32 v64, v64, v16, -v34
	v_cmp_lt_i32_e64 s3, v36, v2
	v_mov_b32_e32 v65, v27
	s_mov_b32 s17, 0
.LBB5_27:                               ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB5_29 Depth 3
                                        ;       Child Loop BB5_32 Depth 3
                                        ;       Child Loop BB5_39 Depth 3
	v_mov_b32_e32 v66, 0
	s_and_saveexec_b32 s6, s2
	s_cbranch_execz .LBB5_31
; %bb.28:                               ; %.lr.ph.i391.preheader
                                        ;   in Loop: Header=BB5_27 Depth=2
	v_mad_u64_u32 v[33:34], null, v65, v2, v[17:18]
	v_mov_b32_e32 v66, 0
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v34, 31, v33
	v_lshlrev_b64 v[33:34], 2, v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v67, vcc_lo, v0, v33
	v_mov_b32_e32 v33, v4
	v_add_co_ci_u32_e32 v68, vcc_lo, v1, v34, vcc_lo
.LBB5_29:                               ; %.lr.ph.i391
                                        ;   Parent Loop BB5_2 Depth=1
                                        ;     Parent Loop BB5_27 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v34, 31, v33
	v_lshlrev_b64 v[69:70], 2, v[33:34]
	v_add_nc_u32_e32 v33, s11, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v80, vcc_lo, v30, v69
	v_add_co_ci_u32_e32 v81, vcc_lo, v31, v70, vcc_lo
	v_add_co_u32 v69, vcc_lo, v67, v69
	v_add_co_ci_u32_e32 v70, vcc_lo, v68, v70, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v33, v35
	s_clause 0x1
	flat_load_b32 v34, v[80:81]
	flat_load_b32 v69, v[69:70]
	s_or_b32 s18, vcc_lo, s18
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v66, v34, v69
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB5_29
; %bb.30:                               ; %Flow677
                                        ;   in Loop: Header=BB5_27 Depth=2
	s_or_b32 exec_lo, exec_lo, s18
.LBB5_31:                               ; %Flow678
                                        ;   in Loop: Header=BB5_27 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_mov_b32 s18, s11
	flat_store_b32 v[23:24], v66
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB5_35
.LBB5_32:                               ; %.lr.ph36.i
                                        ;   Parent Loop BB5_2 Depth=1
                                        ;     Parent Loop BB5_27 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_lshr_b32 s6, s18, 1
	s_mov_b32 s19, exec_lo
	v_cmpx_gt_u32_e64 s6, v4
	s_cbranch_execz .LBB5_34
; %bb.33:                               ;   in Loop: Header=BB5_32 Depth=3
	s_lshl_b64 s[20:21], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v33, vcc_lo, v23, s20
	v_add_co_ci_u32_e32 v34, vcc_lo, s21, v24, vcc_lo
	s_clause 0x1
	flat_load_b32 v33, v[33:34]
	flat_load_b32 v34, v[23:24]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v33, v33, v34
	flat_store_b32 v[23:24], v33
.LBB5_34:                               ;   in Loop: Header=BB5_32 Depth=3
	s_or_b32 exec_lo, exec_lo, s19
	s_cmp_gt_u32 s18, 3
	s_mov_b32 s18, s6
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB5_32
.LBB5_35:                               ; %._crit_edge37.i
                                        ;   in Loop: Header=BB5_27 Depth=2
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB5_37
; %bb.36:                               ;   in Loop: Header=BB5_27 Depth=2
	flat_load_b32 v33, v[8:9]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[13:14], v33 offset:4
.LBB5_37:                               ; %_ZN6HPCLib24cuScalarProductYZ_sharedEPfS0_iS0_S0_.exit
                                        ;   in Loop: Header=BB5_27 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s6, s3
	s_cbranch_execz .LBB5_40
; %bb.38:                               ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB5_27 Depth=2
	flat_load_b32 v34, v[13:14] offset:4
	s_mov_b32 s18, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_div_scale_f32 v33, null, v64, v64, v34
	v_div_scale_f32 v68, vcc_lo, v34, v64, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v66, v33
	s_waitcnt_depctr 0xfff
	v_fma_f32 v67, -v33, v66, 1.0
	v_fmac_f32_e32 v66, v67, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v67, v68, v66
	v_fma_f32 v69, -v33, v67, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v67, v69, v66
	v_fma_f32 v33, -v33, v67, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v66, v33, v66, v67
	v_mov_b32_e32 v33, v32
	v_mov_b32_e32 v67, v36
	v_div_fixup_f32 v66, v66, v64, v34
.LBB5_39:                               ; %.lr.ph
                                        ;   Parent Loop BB5_2 Depth=1
                                        ;     Parent Loop BB5_27 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v68, v37, v67
	v_ashrrev_i32_e32 v34, 31, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v69, 31, v68
	v_lshlrev_b64 v[70:71], 2, v[33:34]
	v_add_nc_u32_e32 v33, s11, v33
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[68:69], 2, v[68:69]
	v_add_co_u32 v70, vcc_lo, v0, v70
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v71, vcc_lo, v1, v71, vcc_lo
	v_add_co_u32 v68, vcc_lo, v0, v68
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v69, vcc_lo, v1, v69, vcc_lo
	s_clause 0x1
	flat_load_b32 v34, v[70:71]
	flat_load_b32 v70, v[68:69]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_fmac_f32 v70, v66, v34 :: v_dual_add_nc_u32 v67, s11, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v67, v2
	flat_store_b32 v[68:69], v70
	s_or_b32 s18, vcc_lo, s18
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB5_39
.LBB5_40:                               ; %Flow674
                                        ;   in Loop: Header=BB5_27 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
	v_add_nc_u32_e32 v65, 1, v65
	v_add_nc_u32_e32 v37, v37, v2
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmp_ge_i32_e32 vcc_lo, v65, v3
	s_or_b32 s17, vcc_lo, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB5_27
.LBB5_41:                               ; %Flow680
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s2, exec_lo
	v_cmpx_lt_i32_e64 v36, v2
	s_cbranch_execz .LBB5_44
; %bb.42:                               ; %.lr.ph458.preheader
                                        ;   in Loop: Header=BB5_2 Depth=1
	v_mul_lo_u32 v30, v49, v17
	v_mov_b32_e32 v31, v4
	s_mov_b32 s3, 0
.LBB5_43:                               ; %.lr.ph458
                                        ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v32, v30, v31
	v_add_nc_u32_e32 v31, s11, v31
	v_ashrrev_i32_e32 v33, 31, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v36, v17, v31
	v_lshlrev_b64 v[32:33], 2, v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v32, vcc_lo, v0, v32
	v_add_co_ci_u32_e32 v33, vcc_lo, v1, v33, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_ge_i32_e32 vcc_lo, v36, v2
	flat_load_b32 v34, v[13:14]
	flat_load_b32 v35, v[32:33]
	s_or_b32 s3, vcc_lo, s3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v34, v34, v35
	flat_store_b32 v[32:33], v34
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB5_43
.LBB5_44:                               ; %Flow672
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	flat_load_b32 v33, v[13:14]
.LBB5_45:                               ; %Flow686
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_add_co_u32 v30, vcc_lo, v10, v28
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mul_f32 v32, v16, v33 :: v_dual_mov_b32 v37, 0
	v_add_co_ci_u32_e32 v31, vcc_lo, v5, v29, vcc_lo
	v_cmp_eq_u32_e64 s2, v3, v27
	v_mov_b32_e32 v16, v15
	s_mov_b32 s16, exec_lo
	flat_store_b32 v[30:31], v32
	flat_store_b64 v[13:14], v[15:16]
	v_cmpx_ne_u32_e64 v3, v27
	s_cbranch_execz .LBB5_89
; %bb.46:                               ;   in Loop: Header=BB5_2 Depth=1
	v_mul_lo_u32 v35, v27, v2
	v_sub_nc_u32_e32 v16, v3, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_i32_e64 s3, v4, v16
	v_add_nc_u32_e32 v32, v35, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v33, 31, v32
	v_lshlrev_b64 v[33:34], 2, v[32:33]
	v_mov_b32_e32 v32, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v33, vcc_lo, v0, v33
	v_add_co_ci_u32_e32 v34, vcc_lo, v1, v34, vcc_lo
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB5_50
; %bb.47:                               ; %.lr.ph.i408.preheader
                                        ;   in Loop: Header=BB5_2 Depth=1
	v_mov_b32_e32 v32, 0
	v_mov_b32_e32 v36, v4
	s_mov_b32 s6, 0
.LBB5_48:                               ; %.lr.ph.i408
                                        ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v37, 31, v36
	v_lshlrev_b64 v[64:65], 2, v[36:37]
	v_add_nc_u32_e32 v36, s11, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v64, vcc_lo, v33, v64
	v_add_co_ci_u32_e32 v65, vcc_lo, v34, v65, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_ge_i32_e32 vcc_lo, v36, v16
	flat_load_b32 v37, v[64:65]
	s_or_b32 s6, vcc_lo, s6
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e64 v32, v32, |v37|
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB5_48
; %bb.49:                               ; %Flow668
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB5_50:                               ; %Flow669
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_mov_b32 s4, s11
	flat_store_b32 v[23:24], v32
	s_cbranch_vccnz .LBB5_54
.LBB5_51:                               ; %.lr.ph34.i403
                                        ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshr_b32 s6, s4, 1
	s_mov_b32 s17, exec_lo
	v_cmpx_gt_u32_e64 s6, v4
	s_cbranch_execz .LBB5_53
; %bb.52:                               ;   in Loop: Header=BB5_51 Depth=2
	s_lshl_b64 s[18:19], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v36, vcc_lo, v23, s18
	v_add_co_ci_u32_e32 v37, vcc_lo, s19, v24, vcc_lo
	s_clause 0x1
	flat_load_b32 v32, v[36:37]
	flat_load_b32 v36, v[23:24]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v32, v32, v36
	flat_store_b32 v[23:24], v32
.LBB5_53:                               ;   in Loop: Header=BB5_51 Depth=2
	s_or_b32 exec_lo, exec_lo, s17
	s_cmp_gt_u32 s4, 3
	s_mov_b32 s4, s6
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB5_51
.LBB5_54:                               ; %._crit_edge35.i407
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_and_saveexec_b32 s4, s1
	s_cbranch_execz .LBB5_56
; %bb.55:                               ;   in Loop: Header=BB5_2 Depth=1
	flat_load_b32 v32, v[8:9]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[13:14], v32
.LBB5_56:                               ; %_ZN6HPCLib20cuReduceAbsYZ_sharedEPfiS0_S0_.exit412
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	flat_load_b32 v32, v[13:14]
	v_mov_b32_e32 v37, 0
	s_mov_b32 s17, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_neq_f32_e32 0, v32
	s_cbranch_execz .LBB5_88
; %bb.57:                               ;   in Loop: Header=BB5_2 Depth=1
	v_ashrrev_i32_e32 v36, 31, v35
	v_add_co_u32 v28, vcc_lo, v0, v28
	v_add_co_ci_u32_e32 v29, vcc_lo, v1, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[35:36], 2, v[35:36]
	v_mov_b32_e32 v32, 0
	v_add_co_u32 v64, vcc_lo, v28, v35
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v65, vcc_lo, v29, v36, vcc_lo
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB5_61
; %bb.58:                               ; %.lr.ph.i420.preheader
                                        ;   in Loop: Header=BB5_2 Depth=1
	v_dual_mov_b32 v32, 0 :: v_dual_mov_b32 v37, v4
	v_mov_b32_e32 v28, v54
	s_mov_b32 s3, 0
.LBB5_59:                               ; %.lr.ph.i420
                                        ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v29, 31, v28
	v_add_nc_u32_e32 v37, s11, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[66:67], 2, v[28:29]
	v_add_nc_u32_e32 v28, v28, v53
	v_add_co_u32 v66, vcc_lo, v64, v66
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v67, vcc_lo, v65, v67, vcc_lo
	flat_load_b32 v29, v[13:14]
	flat_load_b32 v68, v[66:67]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_div_scale_f32 v69, null, v29, v29, v68
	v_div_scale_f32 v80, vcc_lo, v68, v29, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v70, v69
	s_waitcnt_depctr 0xfff
	v_fma_f32 v71, -v69, v70, 1.0
	v_fmac_f32_e32 v70, v71, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v71, v80, v70
	v_fma_f32 v81, -v69, v71, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v71, v81, v70
	v_fma_f32 v69, -v69, v71, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v69, v69, v70, v71
	v_cmp_ge_i32_e32 vcc_lo, v37, v16
	v_div_fixup_f32 v29, v69, v29, v68
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v32, v29, v29
	flat_store_b32 v[66:67], v29
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB5_59
; %bb.60:                               ; %Flow663
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB5_61:                               ; %Flow664
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_mov_b32 s3, s11
	flat_store_b32 v[23:24], v32
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB5_65
.LBB5_62:                               ; %.lr.ph42.i
                                        ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshr_b32 s6, s3, 1
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_u32_e64 s6, v4
	s_cbranch_execz .LBB5_64
; %bb.63:                               ;   in Loop: Header=BB5_62 Depth=2
	s_lshl_b64 s[18:19], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v28, vcc_lo, v23, s18
	v_add_co_ci_u32_e32 v29, vcc_lo, s19, v24, vcc_lo
	s_clause 0x1
	flat_load_b32 v28, v[28:29]
	flat_load_b32 v29, v[23:24]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v28, v28, v29
	flat_store_b32 v[23:24], v28
.LBB5_64:                               ;   in Loop: Header=BB5_62 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_cmp_gt_u32 s3, 3
	s_mov_b32 s3, s6
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB5_62
.LBB5_65:                               ; %._crit_edge43.i
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB5_67
; %bb.66:                               ;   in Loop: Header=BB5_2 Depth=1
	flat_load_b32 v28, v[8:9]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[13:14], v28 offset:4
.LBB5_67:                               ; %_ZN6HPCLib36cuVecScaleSquareReduceYZ_incr_sharedEPfS0_iS0_S0_i.exit
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	flat_load_b32 v67, v[13:14] offset:4
	flat_load_b32 v68, v[33:34]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_mul_f32_e32 v28, 0x4f800000, v67
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v28, v67, v28, vcc_lo
	v_sqrt_f32_e32 v29, v28
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v37, 1, v29
	v_add_nc_u32_e32 v32, -1, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v69, -v37, v29, v28
	v_fma_f32 v66, -v32, v29, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s3, 0, v66
	v_cndmask_b32_e64 v29, v29, v32, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s3, 0, v69
	v_cndmask_b32_e64 v29, v29, v37, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v32, 0x37800000, v29
	v_dual_cndmask_b32 v29, v29, v32 :: v_dual_add_nc_u32 v32, v27, v38
	v_cmp_class_f32_e64 vcc_lo, v28, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v66, v52, v32
	v_cndmask_b32_e32 v28, v29, v28, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_nle_f32_e32 vcc_lo, 0, v68
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_i32_e64 s3, v66, v3
	v_cndmask_b32_e64 v28, |v28|, -|v28|, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_xor_b32_e32 v37, 0x80000000, v28
	v_add_f32_e32 v28, v68, v28
	flat_store_b32 v[33:34], v28
	s_and_saveexec_b32 s6, s3
	s_cbranch_execz .LBB5_70
; %bb.68:                               ; %.lr.ph462.preheader
                                        ;   in Loop: Header=BB5_2 Depth=1
	v_mad_u64_u32 v[28:29], null, v2, v66, v[17:18]
	v_fma_f32 v67, v68, v37, -v67
	v_mov_b32_e32 v33, v66
	s_mov_b32 s18, 0
.LBB5_69:                               ; %.lr.ph462
                                        ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v29, 31, v28
	v_lshlrev_b64 v[68:69], 2, v[28:29]
	v_add_nc_u32_e32 v28, v28, v53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v68, vcc_lo, v0, v68
	v_add_co_ci_u32_e32 v69, vcc_lo, v1, v69, vcc_lo
	flat_load_b32 v29, v[68:69]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_div_scale_f32 v68, null, v67, v67, v29
	v_div_scale_f32 v69, vcc_lo, v29, v67, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v70, v68
	s_waitcnt_depctr 0xfff
	v_fma_f32 v34, -v68, v70, 1.0
	v_fmac_f32_e32 v70, v34, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v71, v69, v70
	v_fma_f32 v34, -v68, v71, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v71, v34, v70
	v_ashrrev_i32_e32 v34, 31, v33
	v_fma_f32 v80, -v68, v71, v69
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[68:69], 2, v[33:34]
	v_add_nc_u32_e32 v33, s11, v33
	v_div_fmas_f32 v34, v80, v70, v71
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_ge_i32_e32 vcc_lo, v33, v3
	v_add_co_u32 v68, s4, v6, v68
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fixup_f32 v29, v34, v67, v29
	v_add_co_ci_u32_e64 v69, s4, v7, v69, s4
	s_or_b32 s18, vcc_lo, s18
	flat_store_b32 v[68:69], v29
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB5_69
.LBB5_70:                               ; %Flow660
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s18, exec_lo
	v_cmpx_lt_i32_e64 v32, v2
	s_cbranch_execz .LBB5_84
; %bb.71:                               ; %.lr.ph464
                                        ;   in Loop: Header=BB5_2 Depth=1
	v_mov_b32_e32 v28, v18
	v_add_co_u32 v35, vcc_lo, v0, v35
	v_add_co_ci_u32_e32 v36, vcc_lo, v1, v36, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[28:29], 2, v[27:28]
	v_cmp_lt_i32_e64 s4, v39, v16
	s_mov_b32 s19, 0
	v_add_co_u32 v67, vcc_lo, v6, v28
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v68, vcc_lo, v7, v29, vcc_lo
.LBB5_72:                               ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB5_74 Depth 3
                                        ;       Child Loop BB5_77 Depth 3
                                        ;       Child Loop BB5_82 Depth 3
	v_ashrrev_i32_e32 v33, 31, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[28:29], 2, v[32:33]
	v_mov_b32_e32 v33, 0
	v_add_co_u32 v69, vcc_lo, v35, v28
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v70, vcc_lo, v36, v29, vcc_lo
	s_and_saveexec_b32 s6, s4
	s_cbranch_execz .LBB5_76
; %bb.73:                               ; %.lr.ph.i427.preheader
                                        ;   in Loop: Header=BB5_72 Depth=2
	v_dual_mov_b32 v33, 0 :: v_dual_mov_b32 v28, v51
	v_mov_b32_e32 v34, v39
	s_mov_b32 s20, 0
.LBB5_74:                               ; %.lr.ph.i427
                                        ;   Parent Loop BB5_2 Depth=1
                                        ;     Parent Loop BB5_72 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v29, 31, v28
	v_lshlrev_b64 v[80:81], 2, v[28:29]
	v_add_nc_u32_e32 v28, v28, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v82, vcc_lo, v69, v80
	v_add_co_ci_u32_e32 v83, vcc_lo, v70, v81, vcc_lo
	v_add_co_u32 v80, vcc_lo, v64, v80
	v_add_co_ci_u32_e32 v81, vcc_lo, v65, v81, vcc_lo
	s_clause 0x1
	flat_load_b32 v29, v[82:83]
	flat_load_b32 v71, v[80:81]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_fmac_f32 v33, v29, v71 :: v_dual_add_nc_u32 v34, s5, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v34, v16
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB5_74
; %bb.75:                               ; %Flow655
                                        ;   in Loop: Header=BB5_72 Depth=2
	s_or_b32 exec_lo, exec_lo, s20
.LBB5_76:                               ; %Flow656
                                        ;   in Loop: Header=BB5_72 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_and_not1_b32 vcc_lo, exec_lo, s15
	s_mov_b32 s20, s5
	flat_store_b32 v[21:22], v33
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB5_80
.LBB5_77:                               ; %.lr.ph42.i423
                                        ;   Parent Loop BB5_2 Depth=1
                                        ;     Parent Loop BB5_72 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_lshr_b32 s6, s20, 1
	s_mov_b32 s21, exec_lo
	v_cmpx_gt_u32_e64 s6, v39
	s_cbranch_execz .LBB5_79
; %bb.78:                               ;   in Loop: Header=BB5_77 Depth=3
	s_lshl_b64 s[22:23], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v28, vcc_lo, v21, s22
	v_add_co_ci_u32_e32 v29, vcc_lo, s23, v22, vcc_lo
	s_clause 0x1
	flat_load_b32 v28, v[28:29]
	flat_load_b32 v29, v[21:22]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v28, v28, v29
	flat_store_b32 v[21:22], v28
.LBB5_79:                               ;   in Loop: Header=BB5_77 Depth=3
	s_or_b32 exec_lo, exec_lo, s21
	s_cmp_lt_u32 s20, 4
	s_mov_b32 s20, s6
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB5_77
.LBB5_80:                               ; %.preheader.i
                                        ;   in Loop: Header=BB5_72 Depth=2
	s_and_saveexec_b32 s6, s4
	s_cbranch_execz .LBB5_83
; %bb.81:                               ; %.lr.ph44.i.preheader
                                        ;   in Loop: Header=BB5_72 Depth=2
	v_mov_b32_e32 v28, v51
	v_mov_b32_e32 v33, v39
	s_mov_b32 s20, 0
.LBB5_82:                               ; %.lr.ph44.i
                                        ;   Parent Loop BB5_2 Depth=1
                                        ;     Parent Loop BB5_72 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v34, 31, v33
	v_ashrrev_i32_e32 v29, 31, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[80:81], 2, v[33:34]
	v_lshlrev_b64 v[82:83], 2, v[28:29]
	v_add_nc_u32_e32 v33, s5, v33
	v_add_nc_u32_e32 v28, v28, v50
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v80, vcc_lo, v67, v80
	v_add_co_ci_u32_e32 v81, vcc_lo, v68, v81, vcc_lo
	v_add_co_u32 v82, vcc_lo, v69, v82
	v_add_co_ci_u32_e32 v83, vcc_lo, v70, v83, vcc_lo
	flat_load_b32 v29, v[19:20]
	flat_load_b32 v34, v[80:81]
	flat_load_b32 v71, v[82:83]
	v_cmp_ge_i32_e32 vcc_lo, v33, v16
	s_or_b32 s20, vcc_lo, s20
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v71, v29, v34
	flat_store_b32 v[82:83], v71
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB5_82
.LBB5_83:                               ; %Flow652
                                        ;   in Loop: Header=BB5_72 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
	v_add_nc_u32_e32 v32, v32, v48
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmp_ge_i32_e32 vcc_lo, v32, v2
	s_or_b32 s19, vcc_lo, s19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB5_72
.LBB5_84:                               ; %Flow658
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB5_87
; %bb.85:                               ; %.lr.ph468.preheader
                                        ;   in Loop: Header=BB5_2 Depth=1
	v_mad_u64_u32 v[28:29], null, v2, v66, v[17:18]
	s_mov_b32 s3, 0
.LBB5_86:                               ; %.lr.ph468
                                        ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v29, 31, v28
	v_lshlrev_b64 v[16:17], 2, v[28:29]
	v_add_nc_u32_e32 v28, v28, v53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v16, vcc_lo, v0, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, v1, v17, vcc_lo
	flat_load_b32 v29, v[13:14]
	flat_load_b32 v32, v[16:17]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mul_f32 v29, v29, v32 :: v_dual_add_nc_u32 v66, s11, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v66, v3
	flat_store_b32 v[16:17], v29
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB5_86
.LBB5_87:                               ; %Flow650
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB5_88:                               ; %Flow665
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
.LBB5_89:                               ; %Flow670
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s16
	flat_load_b32 v16, v[30:31]
	flat_load_b32 v17, v[25:26]
	s_and_b32 s2, exec_lo, s2
	s_or_b32 s14, s2, s14
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e64 v16, |v16|, |v17|
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, v55, v16
	v_cndmask_b32_e32 v55, v16, v55, vcc_lo
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB5_2
; %bb.90:                               ; %.preheader438.loopexit
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v28, 0x33ff8cf1, v55
.LBB5_91:                               ; %Flow691
	s_or_b32 exec_lo, exec_lo, s10
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB5_145
; %bb.92:                               ; %.preheader436.lr.ph
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, -1, v3
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v11, v10
	v_add_co_ci_u32_e32 v2, vcc_lo, v12, v5, vcc_lo
	v_add_co_u32 v8, vcc_lo, v6, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v9, vcc_lo, v7, v9, vcc_lo
	v_add_co_u32 v11, vcc_lo, v0, -8
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, -1, v2, vcc_lo
.LBB5_93:                               ; %.preheader436
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB5_94 Depth 2
                                        ;       Child Loop BB5_96 Depth 3
                                        ;       Child Loop BB5_104 Depth 3
                                        ;       Child Loop BB5_122 Depth 3
	v_mov_b32_e32 v2, v3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mov_b32_e32 v4, v1
	s_mov_b32 s4, 0
	s_mov_b32 s7, 0
                                        ; implicit-def: $sgpr6
                                        ; implicit-def: $sgpr10
	v_add_nc_u32_e32 v15, -2, v2
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v16, 31, v15
	v_lshlrev_b64 v[20:21], 2, v[3:4]
	v_cmp_ne_u32_e64 s0, 0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[18:19], 2, v[15:16]
	v_add_co_u32 v13, vcc_lo, v10, v20
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v5, v21, vcc_lo
	v_add_co_u32 v16, vcc_lo, v10, v18
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v17, vcc_lo, v5, v19, vcc_lo
	v_add_co_u32 v18, vcc_lo, v6, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, v7, v19, vcc_lo
	v_add_co_u32 v20, vcc_lo, v6, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, v7, v21, vcc_lo
.LBB5_94:                               ; %.preheader
                                        ;   Parent Loop BB5_93 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB5_96 Depth 3
                                        ;       Child Loop BB5_104 Depth 3
                                        ;       Child Loop BB5_122 Depth 3
	v_mov_b32_e32 v0, 0
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB5_115
; %bb.95:                               ; %.lr.ph478.preheader
                                        ;   in Loop: Header=BB5_94 Depth=2
	v_dual_mov_b32 v23, v12 :: v_dual_mov_b32 v22, v11
	v_dual_mov_b32 v25, v9 :: v_dual_mov_b32 v24, v8
	v_mov_b32_e32 v26, v3
	s_mov_b32 s12, 0
                                        ; implicit-def: $sgpr14
                                        ; implicit-def: $sgpr15
                                        ; implicit-def: $sgpr16
.LBB5_96:                               ; %.lr.ph478
                                        ;   Parent Loop BB5_93 Depth=1
                                        ;     Parent Loop BB5_94 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	flat_load_b32 v0, v[24:25]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_mov_b32_e32 v4, v26
	s_or_b32 s16, s16, exec_lo
	s_or_b32 s15, s15, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_nle_f32_e64 s1, |v0|, v28
	v_mov_b32_e32 v0, v26
                                        ; implicit-def: $vgpr26
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s17, s1
	s_cbranch_execz .LBB5_100
; %bb.97:                               ;   in Loop: Header=BB5_96 Depth=3
	flat_load_b32 v0, v[22:23]
	s_mov_b32 s1, -1
	s_mov_b32 s18, 0
	s_mov_b32 s19, exec_lo
                                        ; implicit-def: $vgpr26
                                        ; implicit-def: $sgpr20
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_nle_f32_e64 |v0|, v28
; %bb.98:                               ;   in Loop: Header=BB5_96 Depth=3
	v_add_nc_u32_e32 v26, -1, v4
	v_add_co_u32 v24, vcc_lo, v24, -4
	v_add_co_ci_u32_e32 v25, vcc_lo, -1, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v26
	v_add_co_u32 v22, s1, v22, -4
	v_add_co_ci_u32_e64 v23, s1, -1, v23, s1
	s_mov_b32 s18, exec_lo
	s_mov_b32 s20, 0
	s_or_not1_b32 s1, vcc_lo, exec_lo
; %bb.99:                               ; %Flow644
                                        ;   in Loop: Header=BB5_96 Depth=3
	s_or_b32 exec_lo, exec_lo, s19
	v_mov_b32_e32 v0, s20
	s_and_not1_b32 s16, s16, exec_lo
	s_and_b32 s18, s18, exec_lo
	s_and_not1_b32 s15, s15, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s16, s16, s18
	s_or_b32 s15, s15, s1
.LBB5_100:                              ; %Flow643
                                        ;   in Loop: Header=BB5_96 Depth=3
	s_or_b32 exec_lo, exec_lo, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s15
	s_or_b32 s12, s1, s12
	s_and_not1_b32 s1, s14, exec_lo
	s_and_b32 s14, s16, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s14, s1, s14
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB5_96
; %bb.101:                              ; %loop.exit.guard629
                                        ;   in Loop: Header=BB5_94 Depth=2
	s_or_b32 exec_lo, exec_lo, s12
	s_xor_b32 s1, s14, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s12, s1
	s_xor_b32 s1, exec_lo, s12
	s_cbranch_execz .LBB5_114
; %bb.102:                              ; %.critedge
                                        ;   in Loop: Header=BB5_94 Depth=2
	s_load_b32 s12, s[8:9], 0x4
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_u32 s13, s12
	s_cselect_b32 s12, 14, 20
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v0, s12
	s_mov_b32 s12, exec_lo
	global_load_u16 v0, v0, s[8:9]
	s_waitcnt vmcnt(0)
	v_mul_u32_u24_e32 v22, v39, v0
	v_add3_u32 v22, v4, v38, v22
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v22, v2
	s_cbranch_execz .LBB5_113
; %bb.103:                              ; %.lr.ph485
                                        ;   in Loop: Header=BB5_94 Depth=2
	v_mul_lo_u32 v0, v0, s5
	v_dual_mov_b32 v27, 1.0 :: v_dual_mov_b32 v26, 0
	s_mov_b32 s14, 0
                                        ; implicit-def: $sgpr15
.LBB5_104:                              ;   Parent Loop BB5_93 Depth=1
                                        ;     Parent Loop BB5_94 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_ashrrev_i32_e32 v23, 31, v22
	s_or_b32 s15, s15, exec_lo
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[23:24], 2, v[22:23]
	v_add_co_u32 v29, vcc_lo, v6, v23
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v30, vcc_lo, v7, v24, vcc_lo
	flat_load_b32 v31, v[29:30]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v25, v27, v31
	v_mul_f32_e32 v26, v26, v31
                                        ; implicit-def: $vgpr27
	flat_store_b32 v[29:30], v26
                                        ; implicit-def: $vgpr26
	v_cmpx_nle_f32_e64 |v25|, v28
	s_cbranch_execz .LBB5_112
; %bb.105:                              ;   in Loop: Header=BB5_104 Depth=3
	v_add_co_u32 v23, vcc_lo, v10, v23
	v_add_co_ci_u32_e32 v24, vcc_lo, v5, v24, vcc_lo
	v_and_b32_e32 v27, 0x7fffffff, v25
                                        ; implicit-def: $vgpr30
	flat_load_b32 v26, v[23:24]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v29, 0x7fffffff, v26
	v_cmp_ngt_f32_e64 s17, |v25|, |v26|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s18, s17
	s_xor_b32 s17, exec_lo, s18
	s_cbranch_execz .LBB5_109
; %bb.106:                              ;   in Loop: Header=BB5_104 Depth=3
	v_mov_b32_e32 v30, 0
	s_mov_b32 s18, exec_lo
	v_cmpx_neq_f32_e32 0, v26
	s_cbranch_execz .LBB5_108
; %bb.107:                              ;   in Loop: Header=BB5_104 Depth=3
	v_div_scale_f32 v30, null, v29, v29, v27
	v_div_scale_f32 v27, vcc_lo, v27, v29, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v31, v30
	s_waitcnt_depctr 0xfff
	v_fma_f32 v32, -v30, v31, 1.0
	v_fmac_f32_e32 v31, v32, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v32, v27, v31
	v_fma_f32 v33, -v30, v32, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v32, v33, v31
	v_fma_f32 v27, -v30, v32, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v27, v27, v31, v32
	v_div_fixup_f32 v27, v27, |v26|, |v25|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v27, |v25|, v27
	v_div_scale_f32 v30, null, v29, v29, v27
	v_div_scale_f32 v33, vcc_lo, v27, v29, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v31, v30
	s_waitcnt_depctr 0xfff
	v_fma_f32 v32, -v30, v31, 1.0
	v_fmac_f32_e32 v31, v32, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v32, v33, v31
	v_fma_f32 v34, -v30, v32, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v32, v34, v31
	v_fma_f32 v30, -v30, v32, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v30, v30, v31, v32
	v_div_fixup_f32 v27, v30, |v26|, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[30:31], v27
	v_add_f64 v[30:31], v[30:31], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[30:31]
	v_cndmask_b32_e64 v27, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v27, 8, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[30:31], v[30:31], v27
	v_cndmask_b32_e64 v27, 0, 0xffffff80, vcc_lo
	v_rsq_f64_e32 v[32:33], v[30:31]
	v_cmp_class_f64_e64 vcc_lo, v[30:31], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[34:35], v[30:31], v[32:33]
	v_mul_f64 v[32:33], v[32:33], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[32:33], v[34:35], 0.5
	v_fma_f64 v[34:35], v[34:35], v[36:37], v[34:35]
	v_fma_f64 v[32:33], v[32:33], v[36:37], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[30:31]
	v_fma_f64 v[34:35], v[36:37], v[32:33], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[30:31]
	v_fma_f64 v[32:33], v[36:37], v[32:33], v[34:35]
	v_cvt_f64_f32_e32 v[34:35], v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[32:33], v[32:33], v27
	v_dual_cndmask_b32 v30, v32, v30 :: v_dual_cndmask_b32 v31, v33, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[29:30], v[30:31], v[34:35]
	v_cvt_f32_f64_e32 v30, v[29:30]
.LBB5_108:                              ; %Flow637
                                        ;   in Loop: Header=BB5_104 Depth=3
	s_or_b32 exec_lo, exec_lo, s18
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $vgpr29
.LBB5_109:                              ; %Flow638
                                        ;   in Loop: Header=BB5_104 Depth=3
	s_and_not1_saveexec_b32 s17, s17
	s_cbranch_execz .LBB5_111
; %bb.110:                              ;   in Loop: Header=BB5_104 Depth=3
	v_div_scale_f32 v30, null, v27, v27, v29
	v_div_scale_f32 v29, vcc_lo, v29, v27, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v31, v30
	s_waitcnt_depctr 0xfff
	v_fma_f32 v32, -v30, v31, 1.0
	v_fmac_f32_e32 v31, v32, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v32, v29, v31
	v_fma_f32 v33, -v30, v32, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v32, v33, v31
	v_fma_f32 v29, -v30, v32, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v29, v29, v31, v32
	v_div_fixup_f32 v29, v29, |v25|, |v26|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v29, |v26|, v29
	v_div_scale_f32 v30, null, v27, v27, v29
	v_div_scale_f32 v33, vcc_lo, v29, v27, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v31, v30
	s_waitcnt_depctr 0xfff
	v_fma_f32 v32, -v30, v31, 1.0
	v_fmac_f32_e32 v31, v32, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v32, v33, v31
	v_fma_f32 v34, -v30, v32, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v32, v34, v31
	v_fma_f32 v30, -v30, v32, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v30, v30, v31, v32
	v_div_fixup_f32 v29, v30, |v25|, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[29:30], v29
	v_add_f64 v[29:30], v[29:30], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[29:30]
	v_cndmask_b32_e64 v31, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v31, 8, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[29:30], v[29:30], v31
	v_rsq_f64_e32 v[31:32], v[29:30]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[33:34], v[29:30], v[31:32]
	v_mul_f64 v[31:32], v[31:32], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[35:36], -v[31:32], v[33:34], 0.5
	v_fma_f64 v[33:34], v[33:34], v[35:36], v[33:34]
	v_fma_f64 v[31:32], v[31:32], v[35:36], v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[35:36], -v[33:34], v[33:34], v[29:30]
	v_fma_f64 v[33:34], v[35:36], v[31:32], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[35:36], -v[33:34], v[33:34], v[29:30]
	v_fma_f64 v[31:32], v[35:36], v[31:32], v[33:34]
	v_cndmask_b32_e64 v33, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[29:30], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[31:32], v[31:32], v33
	v_cvt_f64_f32_e32 v[33:34], v27
	v_dual_cndmask_b32 v30, v32, v30 :: v_dual_cndmask_b32 v29, v31, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[29:30], v[29:30], v[33:34]
	v_cvt_f32_f64_e32 v30, v[29:30]
.LBB5_111:                              ; %_ZN6HPCLib6pythagEff.exit
                                        ;   in Loop: Header=BB5_104 Depth=3
	s_or_b32 exec_lo, exec_lo, s17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_scale_f32 v27, null, v30, v30, 1.0
	v_div_scale_f32 v32, vcc_lo, 1.0, v30, 1.0
	s_and_not1_b32 s15, s15, exec_lo
	v_rcp_f32_e32 v29, v27
	flat_store_b32 v[23:24], v30
	v_add_nc_u32_e32 v22, v22, v0
	v_fma_f32 v31, -v27, v29, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v29, v31, v29
	v_mul_f32_e32 v31, v32, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v33, -v27, v31, v32
	v_fmac_f32_e32 v31, v33, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v27, -v27, v31, v32
	v_div_fmas_f32 v27, v27, v29, v31
	v_cmp_ge_i32_e32 vcc_lo, v22, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_div_fixup_f32 v27, v27, v30, 1.0
	s_and_b32 s17, vcc_lo, exec_lo
	s_or_b32 s15, s15, s17
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v26, v26, v27
	v_mul_f32_e64 v27, v27, -v25
.LBB5_112:                              ; %Flow639
                                        ;   in Loop: Header=BB5_104 Depth=3
	s_or_b32 exec_lo, exec_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s16, exec_lo, s15
	s_or_b32 s14, s16, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB5_104
.LBB5_113:                              ; %Flow641
                                        ;   in Loop: Header=BB5_94 Depth=2
	s_or_b32 exec_lo, exec_lo, s12
	v_mov_b32_e32 v0, v4
.LBB5_114:                              ; %Flow642
                                        ;   in Loop: Header=BB5_94 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
.LBB5_115:                              ; %Flow645
                                        ;   in Loop: Header=BB5_94 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s11
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b32 v4, v[13:14]
	s_mov_b32 s1, -1
	s_or_b32 s10, s10, exec_lo
	s_mov_b32 s11, exec_lo
	v_cmpx_ne_u32_e64 v0, v3
	s_cbranch_execz .LBB5_139
; %bb.116:                              ;   in Loop: Header=BB5_94 Depth=2
	flat_load_b32 v30, v[20:21]
	flat_load_b32 v31, v[16:17]
	flat_load_b32 v26, v[18:19]
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_cvt_f64_f32_e32 v[22:23], v30
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_cvt_f64_f32_e32 v[24:25], v31
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_sub_f32 v27, v26, v30 :: v_dual_add_f32 v32, v4, v31
	v_dual_add_f32 v26, v26, v30 :: v_dual_sub_f32 v29, v31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v26, v27, v26
	v_fmac_f32_e32 v26, v29, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[26:27], v26
	v_add_f64 v[22:23], v[22:23], v[22:23]
	v_mul_f64 v[32:33], v[22:23], v[24:25]
	v_lshlrev_b64 v[22:23], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v24, vcc_lo, v10, v22
	v_add_co_ci_u32_e32 v25, vcc_lo, v5, v23, vcc_lo
	flat_load_b32 v29, v[24:25]
	v_div_scale_f64 v[34:35], null, v[32:33], v[32:33], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[36:37], v[34:35]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[48:49], -v[34:35], v[36:37], 1.0
	v_fma_f64 v[36:37], v[36:37], v[48:49], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], -v[34:35], v[36:37], 1.0
	v_fma_f64 v[36:37], v[36:37], v[48:49], v[36:37]
	v_div_scale_f64 v[48:49], vcc_lo, v[26:27], v[32:33], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[50:51], v[48:49], v[36:37]
	v_fma_f64 v[34:35], -v[34:35], v[50:51], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[34:35], v[34:35], v[36:37], v[50:51]
	v_div_fixup_f64 v[26:27], v[34:35], v[32:33], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v32, v[26:27]
                                        ; implicit-def: $vgpr26_vgpr27
	v_cmp_ngt_f32_e64 s1, |v32|, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s12, s1
	s_xor_b32 s1, exec_lo, s12
	s_cbranch_execz .LBB5_118
; %bb.117:                              ;   in Loop: Header=BB5_94 Depth=2
	v_mul_f32_e32 v26, v32, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[26:27], v26
	v_add_f64 v[26:27], v[26:27], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[26:27]
	v_cndmask_b32_e64 v33, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v33, 8, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[26:27], v[26:27], v33
	v_rsq_f64_e32 v[33:34], v[26:27]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[35:36], v[26:27], v[33:34]
	v_mul_f64 v[33:34], v[33:34], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], -v[33:34], v[35:36], 0.5
	v_fma_f64 v[35:36], v[35:36], v[48:49], v[35:36]
	v_fma_f64 v[33:34], v[33:34], v[48:49], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], -v[35:36], v[35:36], v[26:27]
	v_fma_f64 v[35:36], v[48:49], v[33:34], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], -v[35:36], v[35:36], v[26:27]
	v_fma_f64 v[33:34], v[48:49], v[33:34], v[35:36]
	v_cndmask_b32_e64 v35, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[26:27], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[33:34], v[33:34], v35
	v_dual_cndmask_b32 v27, v34, v27 :: v_dual_cndmask_b32 v26, v33, v26
.LBB5_118:                              ; %Flow636
                                        ;   in Loop: Header=BB5_94 Depth=2
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB5_120
; %bb.119:                              ;   in Loop: Header=BB5_94 Depth=2
	v_and_b32_e32 v37, 0x7fffffff, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v26, null, v37, v37, 1.0
	v_div_scale_f32 v34, vcc_lo, 1.0, v37, 1.0
	v_rcp_f32_e32 v27, v26
	s_waitcnt_depctr 0xfff
	v_fma_f32 v33, -v26, v27, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v27, v33, v27
	v_mul_f32_e32 v33, v34, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v35, -v26, v33, v34
	v_fmac_f32_e32 v33, v35, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v26, -v26, v33, v34
	v_div_fmas_f32 v26, v26, v27, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v26, v26, |v32|, 1.0
	v_div_scale_f32 v27, null, v37, v37, v26
	v_div_scale_f32 v35, vcc_lo, v26, v37, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v33, v27
	s_waitcnt_depctr 0xfff
	v_fma_f32 v34, -v27, v33, 1.0
	v_fmac_f32_e32 v33, v34, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v34, v35, v33
	v_fma_f32 v36, -v27, v34, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v34, v36, v33
	v_fma_f32 v27, -v27, v34, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v27, v27, v33, v34
	v_div_fixup_f32 v26, v27, |v32|, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[26:27], v26
	v_add_f64 v[26:27], v[26:27], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[26:27]
	v_cndmask_b32_e64 v33, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v33, 8, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[26:27], v[26:27], v33
	v_rsq_f64_e32 v[33:34], v[26:27]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[35:36], v[26:27], v[33:34]
	v_mul_f64 v[33:34], v[33:34], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], -v[33:34], v[35:36], 0.5
	v_fma_f64 v[35:36], v[35:36], v[48:49], v[35:36]
	v_fma_f64 v[33:34], v[33:34], v[48:49], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], -v[35:36], v[35:36], v[26:27]
	v_fma_f64 v[35:36], v[48:49], v[33:34], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], -v[35:36], v[35:36], v[26:27]
	v_fma_f64 v[33:34], v[48:49], v[33:34], v[35:36]
	v_cndmask_b32_e64 v35, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[26:27], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[33:34], v[33:34], v35
	v_cvt_f64_f32_e32 v[35:36], v37
	v_dual_cndmask_b32 v27, v34, v27 :: v_dual_cndmask_b32 v26, v33, v26
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[26:27], v[26:27], v[35:36]
.LBB5_120:                              ; %_ZN6HPCLib6pythagEff.exit430
                                        ;   in Loop: Header=BB5_94 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cvt_f32_f64_e32 v26, v[26:27]
	v_cmp_nle_f32_e32 vcc_lo, 0, v32
	s_mov_b32 s12, exec_lo
	v_cndmask_b32_e64 v26, |v26|, -|v26|, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v26, v26, v32
	v_div_scale_f32 v27, null, v26, v26, v31
	v_div_scale_f32 v34, vcc_lo, v31, v26, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v32, v27
	s_waitcnt_depctr 0xfff
	v_fma_f32 v33, -v27, v32, 1.0
	v_fmac_f32_e32 v32, v33, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v33, v34, v32
	v_fma_f32 v35, -v27, v33, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v33, v35, v32
	v_fma_f32 v27, -v27, v33, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v27, v27, v32, v33
	v_div_fixup_f32 v26, v27, v26, v31
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v31, v4, v29 :: v_dual_sub_f32 v26, v26, v30
	v_dual_sub_f32 v27, v29, v4 :: v_dual_mul_f32 v26, v30, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v26, v27, v31
	v_div_scale_f32 v27, null, v29, v29, v26
	v_div_scale_f32 v32, vcc_lo, v26, v29, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v30, v27
	s_waitcnt_depctr 0xfff
	v_fma_f32 v31, -v27, v30, 1.0
	v_fmac_f32_e32 v30, v31, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v31, v32, v30
	v_fma_f32 v33, -v27, v31, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v31, v33, v30
	v_fma_f32 v27, -v27, v31, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v27, v27, v30, v31
	v_div_fixup_f32 v31, v27, v29, v26
	v_cmpx_le_i32_e64 v0, v15
	s_cbranch_execz .LBB5_138
; %bb.121:                              ; %.lr.ph493.preheader
                                        ;   in Loop: Header=BB5_94 Depth=2
	v_add_co_u32 v26, vcc_lo, v6, v22
	v_add_co_ci_u32_e32 v27, vcc_lo, v7, v23, vcc_lo
	v_dual_mov_b32 v37, 1.0 :: v_dual_add_nc_u32 v0, -1, v0
	v_mov_b32_e32 v32, 1.0
	s_mov_b32 s14, 0
.LBB5_122:                              ; %.lr.ph493
                                        ;   Parent Loop BB5_93 Depth=1
                                        ;     Parent Loop BB5_94 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	flat_load_b32 v33, v[26:27] offset:4
	flat_load_b32 v30, v[24:25] offset:4
                                        ; implicit-def: $vgpr48
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_dual_mul_f32 v34, v37, v33 :: v_dual_and_b32 v35, 0x7fffffff, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v36, 0x7fffffff, v34
	v_cmp_ngt_f32_e64 s1, |v31|, |v34|
	s_and_saveexec_b32 s15, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s15
	s_cbranch_execz .LBB5_126
; %bb.123:                              ;   in Loop: Header=BB5_122 Depth=3
	v_mov_b32_e32 v48, 0
	s_mov_b32 s15, exec_lo
	v_cmpx_neq_f32_e32 0, v34
	s_cbranch_execz .LBB5_125
; %bb.124:                              ;   in Loop: Header=BB5_122 Depth=3
	v_div_scale_f32 v37, null, v36, v36, v35
	v_div_scale_f32 v35, vcc_lo, v35, v36, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v48, v37
	s_waitcnt_depctr 0xfff
	v_fma_f32 v49, -v37, v48, 1.0
	v_fmac_f32_e32 v48, v49, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v49, v35, v48
	v_fma_f32 v50, -v37, v49, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v49, v50, v48
	v_fma_f32 v35, -v37, v49, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v35, v35, v48, v49
	v_div_fixup_f32 v35, v35, |v34|, |v31|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v35, |v31|, v35
	v_div_scale_f32 v37, null, v36, v36, v35
	v_div_scale_f32 v50, vcc_lo, v35, v36, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v48, v37
	s_waitcnt_depctr 0xfff
	v_fma_f32 v49, -v37, v48, 1.0
	v_fmac_f32_e32 v48, v49, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v49, v50, v48
	v_fma_f32 v51, -v37, v49, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v49, v51, v48
	v_fma_f32 v37, -v37, v49, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v37, v37, v48, v49
	v_div_fixup_f32 v35, v37, |v34|, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[48:49], v35
	v_add_f64 v[48:49], v[48:49], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[48:49]
	v_cndmask_b32_e64 v35, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v35, 8, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[48:49], v[48:49], v35
	v_cndmask_b32_e64 v35, 0, 0xffffff80, vcc_lo
	v_rsq_f64_e32 v[50:51], v[48:49]
	v_cmp_class_f64_e64 vcc_lo, v[48:49], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[52:53], v[48:49], v[50:51]
	v_mul_f64 v[50:51], v[50:51], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[54:55], -v[50:51], v[52:53], 0.5
	v_fma_f64 v[52:53], v[52:53], v[54:55], v[52:53]
	v_fma_f64 v[50:51], v[50:51], v[54:55], v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[54:55], -v[52:53], v[52:53], v[48:49]
	v_fma_f64 v[52:53], v[54:55], v[50:51], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[54:55], -v[52:53], v[52:53], v[48:49]
	v_fma_f64 v[50:51], v[54:55], v[50:51], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[50:51], v[50:51], v35
	v_cvt_f64_f32_e32 v[35:36], v36
	v_dual_cndmask_b32 v49, v51, v49 :: v_dual_cndmask_b32 v48, v50, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[35:36], v[48:49], v[35:36]
	v_cvt_f32_f64_e32 v48, v[35:36]
.LBB5_125:                              ; %Flow632
                                        ;   in Loop: Header=BB5_122 Depth=3
	s_or_b32 exec_lo, exec_lo, s15
                                        ; implicit-def: $vgpr35
                                        ; implicit-def: $vgpr36
.LBB5_126:                              ; %Flow633
                                        ;   in Loop: Header=BB5_122 Depth=3
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB5_128
; %bb.127:                              ;   in Loop: Header=BB5_122 Depth=3
	v_div_scale_f32 v37, null, v35, v35, v36
	v_div_scale_f32 v36, vcc_lo, v36, v35, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v48, v37
	s_waitcnt_depctr 0xfff
	v_fma_f32 v49, -v37, v48, 1.0
	v_fmac_f32_e32 v48, v49, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v49, v36, v48
	v_fma_f32 v50, -v37, v49, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v49, v50, v48
	v_fma_f32 v36, -v37, v49, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v36, v36, v48, v49
	v_div_fixup_f32 v36, v36, |v31|, |v34|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v36, |v34|, v36
	v_div_scale_f32 v37, null, v35, v35, v36
	v_div_scale_f32 v50, vcc_lo, v36, v35, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v48, v37
	s_waitcnt_depctr 0xfff
	v_fma_f32 v49, -v37, v48, 1.0
	v_fmac_f32_e32 v48, v49, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v49, v50, v48
	v_fma_f32 v51, -v37, v49, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v49, v51, v48
	v_fma_f32 v37, -v37, v49, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v37, v37, v48, v49
	v_div_fixup_f32 v36, v37, |v31|, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[36:37], v36
	v_add_f64 v[36:37], v[36:37], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[36:37]
	v_cndmask_b32_e64 v48, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v48, 8, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[36:37], v[36:37], v48
	v_rsq_f64_e32 v[48:49], v[36:37]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[50:51], v[36:37], v[48:49]
	v_mul_f64 v[48:49], v[48:49], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], -v[48:49], v[50:51], 0.5
	v_fma_f64 v[50:51], v[50:51], v[52:53], v[50:51]
	v_fma_f64 v[48:49], v[48:49], v[52:53], v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], -v[50:51], v[50:51], v[36:37]
	v_fma_f64 v[50:51], v[52:53], v[48:49], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], -v[50:51], v[50:51], v[36:37]
	v_fma_f64 v[48:49], v[52:53], v[48:49], v[50:51]
	v_cndmask_b32_e64 v50, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[36:37], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[48:49], v[48:49], v50
	v_cvt_f64_f32_e32 v[50:51], v35
	v_dual_cndmask_b32 v37, v49, v37 :: v_dual_cndmask_b32 v36, v48, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[35:36], v[36:37], v[50:51]
	v_cvt_f32_f64_e32 v48, v[35:36]
.LBB5_128:                              ; %_ZN6HPCLib6pythagEff.exit432
                                        ;   in Loop: Header=BB5_122 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_scale_f32 v35, null, v48, v48, v31
	v_div_scale_f32 v36, null, v48, v48, v34
	v_div_scale_f32 v52, vcc_lo, v31, v48, v31
	v_rcp_f32_e32 v37, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v49, v36
	v_mul_f32_e32 v33, v32, v33
	flat_store_b32 v[26:27], v48
	v_fma_f32 v50, -v35, v37, 1.0
	v_fma_f32 v51, -v36, v49, 1.0
	v_fmac_f32_e32 v37, v50, v37
	v_div_scale_f32 v50, s1, v34, v48, v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v49, v51, v49
	v_mul_f32_e32 v51, v52, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v53, v50, v49
	v_fma_f32 v54, -v35, v51, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v55, -v36, v53, v50
	v_fmac_f32_e32 v51, v54, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v53, v55, v49
	v_fma_f32 v35, -v35, v51, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v36, -v36, v53, v50
	v_div_fmas_f32 v35, v35, v37, v51
	s_mov_b32 vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v36, v36, v49, v53
	v_div_fixup_f32 v31, v35, v48, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v34, v36, v48, v34
                                        ; implicit-def: $vgpr48
	s_waitcnt vmcnt(0) lgkmcnt(1)
	v_mul_f32_e32 v36, v30, v34
	v_mul_f32_e32 v35, v33, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v37, 0x7fffffff, v36
	v_fmac_f32_e32 v35, v29, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v32, 0x7fffffff, v35
	v_cmp_ngt_f32_e64 s1, |v35|, |v36|
	s_and_saveexec_b32 s15, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s15
	s_cbranch_execz .LBB5_132
; %bb.129:                              ;   in Loop: Header=BB5_122 Depth=3
	v_mov_b32_e32 v48, 0
	s_mov_b32 s15, exec_lo
	v_cmpx_neq_f32_e32 0, v36
	s_cbranch_execz .LBB5_131
; %bb.130:                              ;   in Loop: Header=BB5_122 Depth=3
	v_div_scale_f32 v48, null, v37, v37, v32
	v_div_scale_f32 v32, vcc_lo, v32, v37, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v49, v48
	s_waitcnt_depctr 0xfff
	v_fma_f32 v50, -v48, v49, 1.0
	v_fmac_f32_e32 v49, v50, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v50, v32, v49
	v_fma_f32 v51, -v48, v50, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v50, v51, v49
	v_fma_f32 v32, -v48, v50, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v32, v32, v49, v50
	v_div_fixup_f32 v32, v32, |v36|, |v35|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v32, |v35|, v32
	v_div_scale_f32 v48, null, v37, v37, v32
	v_div_scale_f32 v51, vcc_lo, v32, v37, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v49, v48
	s_waitcnt_depctr 0xfff
	v_fma_f32 v50, -v48, v49, 1.0
	v_fmac_f32_e32 v49, v50, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v50, v51, v49
	v_fma_f32 v52, -v48, v50, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v50, v52, v49
	v_fma_f32 v48, -v48, v50, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v48, v48, v49, v50
	v_div_fixup_f32 v32, v48, |v36|, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[48:49], v32
	v_add_f64 v[48:49], v[48:49], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[48:49]
	v_cndmask_b32_e64 v32, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v32, 8, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[48:49], v[48:49], v32
	v_cndmask_b32_e64 v32, 0, 0xffffff80, vcc_lo
	v_rsq_f64_e32 v[50:51], v[48:49]
	v_cmp_class_f64_e64 vcc_lo, v[48:49], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[52:53], v[48:49], v[50:51]
	v_mul_f64 v[50:51], v[50:51], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[54:55], -v[50:51], v[52:53], 0.5
	v_fma_f64 v[52:53], v[52:53], v[54:55], v[52:53]
	v_fma_f64 v[50:51], v[50:51], v[54:55], v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[54:55], -v[52:53], v[52:53], v[48:49]
	v_fma_f64 v[52:53], v[54:55], v[50:51], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[54:55], -v[52:53], v[52:53], v[48:49]
	v_fma_f64 v[50:51], v[54:55], v[50:51], v[52:53]
	v_cvt_f64_f32_e32 v[52:53], v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[50:51], v[50:51], v32
	v_dual_cndmask_b32 v49, v51, v49 :: v_dual_cndmask_b32 v48, v50, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[48:49], v[48:49], v[52:53]
	v_cvt_f32_f64_e32 v48, v[48:49]
.LBB5_131:                              ; %Flow630
                                        ;   in Loop: Header=BB5_122 Depth=3
	s_or_b32 exec_lo, exec_lo, s15
                                        ; implicit-def: $vgpr32
                                        ; implicit-def: $vgpr37
.LBB5_132:                              ; %Flow631
                                        ;   in Loop: Header=BB5_122 Depth=3
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB5_134
; %bb.133:                              ;   in Loop: Header=BB5_122 Depth=3
	v_div_scale_f32 v48, null, v32, v32, v37
	v_div_scale_f32 v37, vcc_lo, v37, v32, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v49, v48
	s_waitcnt_depctr 0xfff
	v_fma_f32 v50, -v48, v49, 1.0
	v_fmac_f32_e32 v49, v50, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v50, v37, v49
	v_fma_f32 v51, -v48, v50, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v50, v51, v49
	v_fma_f32 v37, -v48, v50, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v37, v37, v49, v50
	v_div_fixup_f32 v37, v37, |v35|, |v36|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v37, |v36|, v37
	v_div_scale_f32 v48, null, v32, v32, v37
	v_div_scale_f32 v51, vcc_lo, v37, v32, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v49, v48
	s_waitcnt_depctr 0xfff
	v_fma_f32 v50, -v48, v49, 1.0
	v_fmac_f32_e32 v49, v50, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v50, v51, v49
	v_fma_f32 v52, -v48, v50, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v50, v52, v49
	v_fma_f32 v48, -v48, v50, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v48, v48, v49, v50
	v_div_fixup_f32 v37, v48, |v35|, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[48:49], v37
	v_add_f64 v[48:49], v[48:49], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[48:49]
	v_cndmask_b32_e64 v37, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v37, 8, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[48:49], v[48:49], v37
	v_cndmask_b32_e64 v37, 0, 0xffffff80, vcc_lo
	v_rsq_f64_e32 v[50:51], v[48:49]
	v_cmp_class_f64_e64 vcc_lo, v[48:49], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[52:53], v[48:49], v[50:51]
	v_mul_f64 v[50:51], v[50:51], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[54:55], -v[50:51], v[52:53], 0.5
	v_fma_f64 v[52:53], v[52:53], v[54:55], v[52:53]
	v_fma_f64 v[50:51], v[50:51], v[54:55], v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[54:55], -v[52:53], v[52:53], v[48:49]
	v_fma_f64 v[52:53], v[54:55], v[50:51], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[54:55], -v[52:53], v[52:53], v[48:49]
	v_fma_f64 v[50:51], v[54:55], v[50:51], v[52:53]
	v_cvt_f64_f32_e32 v[52:53], v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[50:51], v[50:51], v37
	v_dual_cndmask_b32 v48, v50, v48 :: v_dual_cndmask_b32 v49, v51, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[48:49], v[48:49], v[52:53]
	v_cvt_f32_f64_e32 v48, v[48:49]
.LBB5_134:                              ; %_ZN6HPCLib6pythagEff.exit434
                                        ;   in Loop: Header=BB5_122 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v32, v31 :: v_dual_mov_b32 v37, v34
	s_mov_b32 s1, exec_lo
	flat_store_b32 v[24:25], v48
	v_cmpx_neq_f32_e32 0, v48
	s_cbranch_execz .LBB5_136
; %bb.135:                              ;   in Loop: Header=BB5_122 Depth=3
	v_div_scale_f32 v32, null, v48, v48, 1.0
	v_div_scale_f32 v50, vcc_lo, 1.0, v48, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v37, v32
	s_waitcnt_depctr 0xfff
	v_fma_f32 v49, -v32, v37, 1.0
	v_fmac_f32_e32 v37, v49, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v49, v50, v37
	v_fma_f32 v51, -v32, v49, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v49, v51, v37
	v_fma_f32 v32, -v32, v49, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v32, v32, v37, v49
	v_div_fixup_f32 v37, v32, v48, 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v32, v35, v37
	v_mul_f32_e32 v37, v36, v37
.LBB5_136:                              ;   in Loop: Header=BB5_122 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mul_f32 v29, v29, v34 :: v_dual_mul_f32 v30, v30, v31
	v_add_nc_u32_e32 v0, 1, v0
	v_add_co_u32 v26, vcc_lo, v26, 4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v29, v33, v31, -v29
	v_mul_f32_e32 v31, v30, v37
	v_add_co_ci_u32_e32 v27, vcc_lo, 0, v27, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v0, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v33, v29, v37
	v_add_co_u32 v24, s1, v24, 4
	v_add_co_ci_u32_e64 v25, s1, 0, v25, s1
	v_fmac_f32_e32 v31, v29, v32
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_fma_f32 v29, v30, v32, -v33
	s_or_b32 s14, vcc_lo, s14
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB5_122
; %bb.137:                              ; %Flow634
                                        ;   in Loop: Header=BB5_94 Depth=2
	s_or_b32 exec_lo, exec_lo, s14
.LBB5_138:                              ; %Flow635
                                        ;   in Loop: Header=BB5_94 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s12
	s_add_i32 s7, s7, 1
	v_add_co_u32 v22, vcc_lo, v6, v22
	s_cmp_eq_u32 s7, 30
	v_add_co_ci_u32_e32 v23, vcc_lo, v7, v23, vcc_lo
	s_cselect_b32 s1, -1, 0
	s_and_not1_b32 s10, s10, exec_lo
	s_or_not1_b32 s1, s1, exec_lo
	s_clause 0x1
	flat_store_b32 v[22:23], v1
	flat_store_b32 v[20:21], v31
	flat_store_b32 v[13:14], v29
.LBB5_139:                              ; %Flow646
                                        ;   in Loop: Header=BB5_94 Depth=2
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s1
	s_or_b32 s4, s1, s4
	s_and_not1_b32 s1, s6, exec_lo
	s_and_b32 s6, s10, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s6, s1, s6
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB5_94
; %bb.140:                              ; %loop.exit.guard
                                        ;   in Loop: Header=BB5_93 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s0, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB5_144
; %bb.141:                              ;   in Loop: Header=BB5_93 Depth=1
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_gt_f32_e32 0, v4
	s_cbranch_execz .LBB5_143
; %bb.142:                              ;   in Loop: Header=BB5_93 Depth=1
	v_xor_b32_e32 v0, 0x80000000, v4
	flat_store_b32 v[13:14], v0
.LBB5_143:                              ; %Flow
                                        ;   in Loop: Header=BB5_93 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
.LBB5_144:                              ; %.loopexit437
                                        ;   in Loop: Header=BB5_93 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v8, vcc_lo, v8, -4
	v_add_co_ci_u32_e32 v9, vcc_lo, -1, v9, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, 2, v2
	v_add_co_u32 v11, s0, v11, -4
	v_add_co_ci_u32_e64 v12, s0, -1, v12, s0
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB5_93
.LBB5_145:                              ; %Flow648
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end5:
	.size	_ZN6HPCLib14cuSVD_W_sharedEPfiiS0_S0_S0_, .Lfunc_end5-_ZN6HPCLib14cuSVD_W_sharedEPfiiS0_S0_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 10032
; NumSgprs: 34
; NumVgprs: 84
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_ ; -- Begin function _ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_
	.globl	_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_
	.p2align	8
	.type	_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_,@function
_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_: ; @_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_
; %bb.0:
	s_mov_b64 s[26:27], s[0:1]
	v_mov_b32_e32 v40, v0
	s_clause 0x1
	s_load_b32 s6, s[26:27], 0x44
	s_load_b32 s48, s[26:27], 0x18
	s_add_u32 s2, s26, 56
	s_mov_b32 s0, s13
	s_addc_u32 s3, s27, 0
	v_and_b32_e32 v0, 0x3ff, v40
	s_mov_b32 s49, exec_lo
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s6, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[56:57], null, s0, s1, v[0:1]
	v_cmpx_gt_i32_e64 s48, v56
	s_cbranch_execz .LBB6_54
; %bb.1:                                ; %.lr.ph190
	s_clause 0x6
	s_load_b32 s0, s[26:27], 0x48
	s_load_b32 s50, s[26:27], 0x8
	s_load_b32 s51, s[26:27], 0x28
	s_load_b64 s[38:39], s[26:27], 0x0
	s_load_b64 s[40:41], s[26:27], 0x10
	s_load_b64 s[42:43], s[26:27], 0x20
	s_load_b64 s[44:45], s[26:27], 0x30
	s_mov_b64 s[8:9], src_shared_base
	s_lshr_b32 s52, s6, 16
	s_mul_i32 s7, s1, 24
	v_mul_u32_u24_e32 v1, 6, v0
	v_bfe_u32 v59, v40, 20, 10
	s_load_b64 s[4:5], s[2:3], 0x0
	v_bfe_u32 v62, v40, 10, 10
	v_mad_u32_u24 v8, v0, 24, 12
	v_cmp_gt_u16_e64 s63, s52, 1
	v_mul_u32_u24_e32 v2, s52, v59
	v_cmp_eq_u32_e64 s29, 0, v59
	v_cmp_gt_u32_e64 s34, 6, v59
	v_cmp_eq_u32_e64 s36, 0, v62
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_mul_i32 s8, s50, 6
	s_and_b32 s54, s0, 0xffff
	s_mul_i32 s11, s8, s1
	s_mul_i32 s10, s51, 6
	s_lshl_b32 s0, s11, 2
	s_mul_i32 s11, s54, s52
	s_mul_i32 s12, s10, s1
	v_mul_lo_u32 v4, s11, v0
	s_add_i32 s0, s0, 0
	v_mul_lo_u32 v3, s8, v0
	s_lshl_b32 s8, s12, 2
	s_add_i32 s7, s0, s7
	s_mul_i32 s11, s11, s1
	s_add_i32 s8, s7, s8
	s_lshl_b32 s11, s11, 2
	v_lshl_add_u32 v60, v1, 2, s0
	v_lshl_add_u32 v1, v4, 2, s8
	s_add_i32 s0, s8, s11
	v_lshl_add_u32 v3, v3, 2, 0
	s_cmp_lg_u32 s0, -1
	v_or_b32_e32 v4, v62, v59
	s_cselect_b32 s8, s0, 0
	v_cmp_ne_u32_e64 s0, -1, v1
	v_cmp_ne_u32_e32 vcc_lo, -1, v3
	v_lshl_add_u32 v61, v2, 2, v1
	v_lshlrev_b32_e32 v2, 5, v0
	s_cselect_b32 s11, s9, 0
	v_cndmask_b32_e64 v42, 0, v1, s0
	v_mul_lo_u32 v1, s10, v0
	v_cndmask_b32_e32 v41, 0, v3, vcc_lo
	v_lshlrev_b32_e32 v3, 2, v59
	v_cndmask_b32_e64 v44, 0, s9, s0
	v_add_co_u32 v6, s0, s8, v2
	v_mul_lo_u32 v2, v0, s50
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_mad_u32_u24 v0, v0, 24, v3
	v_lshl_add_u32 v58, v1, 2, s7
	s_cmp_lt_i32 s51, 6
	v_add_co_ci_u32_e64 v7, null, s11, 0, s0
	s_cselect_b32 s56, -1, 0
	v_cmp_ne_u32_e64 s0, -1, v58
	s_cmp_gt_i32 s51, 0
	v_mul_lo_u32 v2, v2, 24
	s_cselect_b32 s7, -1, 0
	s_cmp_lt_u32 s14, s5
	v_mul_lo_u32 v3, s50, v8
	v_mul_lo_u32 v0, s50, v0
	v_cndmask_b32_e64 v43, 0, s9, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v60
	v_cndmask_b32_e64 v46, 0, v58, s0
	v_cndmask_b32_e64 v47, 0, s9, s0
	s_cselect_b32 s0, 14, 20
	v_lshlrev_b32_e32 v1, 2, v62
	s_add_u32 s46, s2, s0
	v_cmp_eq_u32_e64 s0, 0, v4
	s_mul_i32 s55, s50, 3
	v_dual_cndmask_b32 v45, 0, v60 :: v_dual_mov_b32 v76, 0
	v_cndmask_b32_e64 v5, 0, s9, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s50, v62
	v_cmp_gt_i32_e64 s33, s55, v62
	v_cmp_gt_i32_e64 s35, s50, v62
	v_add_nc_u32_e32 v63, v61, v1
	v_cmp_gt_i32_e64 s37, s51, v59
	v_cndmask_b32_e64 v72, 0, 1, s7
	v_add3_u32 v73, v2, v1, 0
	v_add3_u32 v74, v3, v1, 0
	v_add3_u32 v75, v0, v1, 0
	s_addc_u32 s47, s3, 0
	s_and_b32 s61, s0, s7
	s_mul_i32 s0, s50, s54
	s_mov_b32 s28, s15
	s_mov_b32 s13, s14
	s_mov_b32 s53, 0
	s_lshr_b32 s57, s6, 17
	s_max_i32 s58, s51, 6
	s_min_i32 s59, s51, 6
	s_mul_i32 s60, s4, s1
	s_lshl_b32 s62, s52, 2
	s_lshl_b32 s64, s0, 2
	s_lshl_b32 s65, s50, 2
	s_xor_b32 s66, vcc_lo, -1
.LBB6_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB6_5 Depth 2
                                        ;     Child Loop BB6_7 Depth 2
                                        ;     Child Loop BB6_10 Depth 2
                                        ;       Child Loop BB6_12 Depth 3
                                        ;     Child Loop BB6_17 Depth 2
                                        ;       Child Loop BB6_19 Depth 3
                                        ;         Child Loop BB6_21 Depth 4
                                        ;         Child Loop BB6_24 Depth 4
                                        ;     Child Loop BB6_34 Depth 2
                                        ;       Child Loop BB6_36 Depth 3
                                        ;         Child Loop BB6_38 Depth 4
                                        ;         Child Loop BB6_41 Depth 4
                                        ;     Child Loop BB6_50 Depth 2
	s_and_saveexec_b32 s0, s29
	s_cbranch_execz .LBB6_8
; %bb.3:                                ;   in Loop: Header=BB6_2 Depth=1
	s_and_b32 exec_lo, exec_lo, s33
	s_cbranch_execz .LBB6_8
; %bb.4:                                ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB6_2 Depth=1
	v_dual_mov_b32 v3, v62 :: v_dual_lshlrev_b32 v0, 1, v56
	v_mov_b32_e32 v2, v73
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s40, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s41, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v0, v0, s55
.LBB6_5:                                ; %.lr.ph.i
                                        ;   Parent Loop BB6_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, v0, v3
	v_add_nc_u32_e32 v3, s52, v3
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v8, vcc_lo, s38, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s39, v9, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s55, v3
	global_load_b32 v4, v[8:9], off
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v4
	v_add_nc_u32_e32 v2, s62, v2
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB6_5
; %bb.6:                                ; %.lr.ph25.i.preheader
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mul_lo_u32 v0, v1, s55
	v_mov_b32_e32 v1, v74
	v_mov_b32_e32 v2, v62
	s_mov_b32 s1, 0
.LBB6_7:                                ; %.lr.ph25.i
                                        ;   Parent Loop BB6_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v0, v2
	v_add_nc_u32_e32 v2, s52, v2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s38, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s39, v4, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s55, v2
	global_load_b32 v3, v[3:4], off
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v3
	v_add_nc_u32_e32 v1, s62, v1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB6_7
.LBB6_8:                                ; %_ZN6HPCLib18cuGetLeadFieldPairEPfiS0_ii.exit
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v31, v40 :: v_dual_mov_b32 v0, v41
	v_dual_mov_b32 v1, v43 :: v_dual_mov_b32 v2, s50
	v_dual_mov_b32 v3, 6 :: v_dual_mov_b32 v4, v45
	v_dual_mov_b32 v8, v42 :: v_dual_mov_b32 v9, v44
	s_add_u32 s8, s26, 56
	s_addc_u32 s9, s27, 0
	s_mov_b32 s14, s28
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_@rel32@lo+4
	s_addc_u32 s1, s1, _ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s34
	s_cbranch_execz .LBB6_14
; %bb.9:                                ; %.lr.ph170.preheader
                                        ;   in Loop: Header=BB6_2 Depth=1
	v_mov_b32_e32 v0, v75
	v_mov_b32_e32 v1, v59
	s_mov_b32 s1, 0
.LBB6_10:                               ; %.lr.ph170
                                        ;   Parent Loop BB6_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB6_12 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_lshl_add_u32 v2, v1, 2, v60
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, 0x3727c5ac, v2
	s_and_b32 s3, vcc_lo, s66
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB6_13
; %bb.11:                               ; %.lr.ph
                                        ;   in Loop: Header=BB6_10 Depth=2
	v_dual_mov_b32 v2, v0 :: v_dual_mov_b32 v3, v62
	s_mov_b32 s3, 0
.LBB6_12:                               ;   Parent Loop BB6_2 Depth=1
                                        ;     Parent Loop BB6_10 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v3, s52, v3
	ds_store_b32 v2, v76
	v_add_nc_u32_e32 v2, s62, v2
	v_cmp_le_i32_e32 vcc_lo, s50, v3
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB6_12
.LBB6_13:                               ; %Flow265
                                        ;   in Loop: Header=BB6_10 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v1, s54, v1
	v_add_nc_u32_e32 v0, s64, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_u32_e32 vcc_lo, 5, v1
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB6_10
.LBB6_14:                               ; %Flow267
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s56
	s_mov_b32 s0, -1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccz .LBB6_32
; %bb.15:                               ; %.preheader164
                                        ;   in Loop: Header=BB6_2 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v72
	s_cbranch_vccnz .LBB6_31
; %bb.16:                               ; %.lr.ph178.preheader
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_mov_b32 s0, 0
.LBB6_17:                               ; %.lr.ph178
                                        ;   Parent Loop BB6_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB6_19 Depth 3
                                        ;         Child Loop BB6_21 Depth 4
                                        ;         Child Loop BB6_24 Depth 4
	s_and_saveexec_b32 s1, s34
	s_cbranch_execz .LBB6_30
; %bb.18:                               ; %.lr.ph175
                                        ;   in Loop: Header=BB6_17 Depth=2
	s_mul_i32 s2, s0, s50
	v_mad_u64_u32 v[0:1], null, s0, 24, v[58:59]
	s_ashr_i32 s3, s2, 31
	v_mov_b32_e32 v3, v75
	s_lshl_b64 s[2:3], s[2:3], 2
	v_mov_b32_e32 v4, v59
	s_add_u32 s2, s42, s2
	s_addc_u32 s3, s43, s3
	s_mov_b32 s4, 0
.LBB6_19:                               ;   Parent Loop BB6_2 Depth=1
                                        ;     Parent Loop BB6_17 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB6_21 Depth 4
                                        ;         Child Loop BB6_24 Depth 4
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v8, v4, 2, v0
	v_mov_b32_e32 v9, 0
	ds_store_b32 v8, v76
	s_and_saveexec_b32 s5, s35
	s_cbranch_execz .LBB6_23
; %bb.20:                               ; %.lr.ph.i155
                                        ;   in Loop: Header=BB6_19 Depth=3
	global_load_u16 v10, v76, s[46:47]
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v11, v3
	v_mov_b32_e32 v1, v62
	s_mov_b32 s6, 0
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v12, 2, v10
.LBB6_21:                               ;   Parent Loop BB6_2 Depth=1
                                        ;     Parent Loop BB6_17 Depth=2
                                        ;       Parent Loop BB6_19 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[13:14], 2, v[1:2]
	v_add_nc_u32_e32 v1, v1, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v13, vcc_lo, s2, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s3, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_le_i32_e32 vcc_lo, s50, v1
	global_load_b32 v2, v[13:14], off
	ds_load_b32 v13, v11
	v_add_nc_u32_e32 v11, v11, v12
	s_or_b32 s6, vcc_lo, s6
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v9, v13, v2
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB6_21
; %bb.22:                               ; %Flow248
                                        ;   in Loop: Header=BB6_19 Depth=3
	s_or_b32 exec_lo, exec_lo, s6
.LBB6_23:                               ; %Flow249
                                        ;   in Loop: Header=BB6_19 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_and_not1_b32 vcc_lo, exec_lo, s63
	s_mov_b32 s5, s57
	ds_store_b32 v63, v9
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB6_27
.LBB6_24:                               ; %.lr.ph32.i150
                                        ;   Parent Loop BB6_2 Depth=1
                                        ;     Parent Loop BB6_17 Depth=2
                                        ;       Parent Loop BB6_19 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_mov_b32 s6, exec_lo
	v_cmpx_gt_u32_e64 s5, v62
	s_cbranch_execz .LBB6_26
; %bb.25:                               ;   in Loop: Header=BB6_24 Depth=4
	v_lshl_add_u32 v1, s5, 2, v63
	ds_load_b32 v1, v1
	ds_load_b32 v2, v63
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v1, v1, v2
	ds_store_b32 v63, v1
.LBB6_26:                               ;   in Loop: Header=BB6_24 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_lshr_b32 s6, s5, 1
	s_cmp_gt_u32 s5, 1
	s_mov_b32 s5, s6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB6_24
.LBB6_27:                               ; %._crit_edge33.i154
                                        ;   in Loop: Header=BB6_19 Depth=3
	s_and_saveexec_b32 s5, s36
	s_cbranch_execz .LBB6_29
; %bb.28:                               ;   in Loop: Header=BB6_19 Depth=3
	ds_load_b32 v1, v61
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v8, v1
.LBB6_29:                               ; %_ZN6HPCLib23cuScalarProductY_sharedEPfS0_iS0_S0_.exit159
                                        ;   in Loop: Header=BB6_19 Depth=3
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v4, s54, v4
	v_add_nc_u32_e32 v3, s64, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmp_lt_u32_e32 vcc_lo, 5, v4
	s_or_b32 s4, vcc_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB6_19
.LBB6_30:                               ; %Flow252
                                        ;   in Loop: Header=BB6_17 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s0, s51
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB6_17
.LBB6_31:                               ; %Flow254
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_mov_b32 s0, 0
.LBB6_32:                               ; %Flow262
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB6_48
; %bb.33:                               ; %.preheader162.preheader
                                        ;   in Loop: Header=BB6_2 Depth=1
	v_mov_b32_e32 v2, v73
	s_mov_b32 s0, 0
.LBB6_34:                               ; %.preheader162
                                        ;   Parent Loop BB6_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB6_36 Depth 3
                                        ;         Child Loop BB6_38 Depth 4
                                        ;         Child Loop BB6_41 Depth 4
	s_and_saveexec_b32 s1, s37
	s_cbranch_execz .LBB6_47
; %bb.35:                               ; %.lr.ph183
                                        ;   in Loop: Header=BB6_34 Depth=2
	s_mul_i32 s2, s0, s51
	v_mov_b32_e32 v4, v59
	v_lshl_add_u32 v3, s2, 2, v58
	s_mov_b32 s2, 0
.LBB6_36:                               ;   Parent Loop BB6_2 Depth=1
                                        ;     Parent Loop BB6_34 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB6_38 Depth 4
                                        ;         Child Loop BB6_41 Depth 4
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v8, v4, 2, v3
	v_mov_b32_e32 v9, 0
	ds_store_b32 v8, v76
	s_and_saveexec_b32 s3, s35
	s_cbranch_execz .LBB6_40
; %bb.37:                               ; %.lr.ph.i142
                                        ;   in Loop: Header=BB6_36 Depth=3
	global_load_u16 v10, v76, s[46:47]
	v_mul_lo_u32 v0, v4, s50
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v11, v2
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, s42, v0
	v_add_co_ci_u32_e32 v13, vcc_lo, s43, v1, vcc_lo
	v_mov_b32_e32 v0, v62
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v14, 2, v10
.LBB6_38:                               ;   Parent Loop BB6_2 Depth=1
                                        ;     Parent Loop BB6_34 Depth=2
                                        ;       Parent Loop BB6_36 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[15:16], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v15, vcc_lo, v12, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, v13, v16, vcc_lo
	global_load_b32 v1, v[15:16], off
	ds_load_b32 v15, v11
	v_add_nc_u32_e32 v0, v0, v10
	v_add_nc_u32_e32 v11, v11, v14
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v9, v1, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s50, v0
	s_or_b32 s4, vcc_lo, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB6_38
; %bb.39:                               ; %Flow257
                                        ;   in Loop: Header=BB6_36 Depth=3
	s_or_b32 exec_lo, exec_lo, s4
.LBB6_40:                               ; %Flow258
                                        ;   in Loop: Header=BB6_36 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_and_not1_b32 vcc_lo, exec_lo, s63
	s_mov_b32 s3, s57
	ds_store_b32 v63, v9
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB6_44
.LBB6_41:                               ; %.lr.ph32.i
                                        ;   Parent Loop BB6_2 Depth=1
                                        ;     Parent Loop BB6_34 Depth=2
                                        ;       Parent Loop BB6_36 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_u32_e64 s3, v62
	s_cbranch_execz .LBB6_43
; %bb.42:                               ;   in Loop: Header=BB6_41 Depth=4
	v_lshl_add_u32 v0, s3, 2, v63
	ds_load_b32 v0, v0
	ds_load_b32 v1, v63
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v0, v0, v1
	ds_store_b32 v63, v0
.LBB6_43:                               ;   in Loop: Header=BB6_41 Depth=4
	s_or_b32 exec_lo, exec_lo, s4
	s_lshr_b32 s4, s3, 1
	s_cmp_gt_u32 s3, 1
	s_mov_b32 s3, s4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB6_41
.LBB6_44:                               ; %._crit_edge33.i
                                        ;   in Loop: Header=BB6_36 Depth=3
	s_and_saveexec_b32 s3, s36
	s_cbranch_execz .LBB6_46
; %bb.45:                               ;   in Loop: Header=BB6_36 Depth=3
	ds_load_b32 v0, v61
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v8, v0
.LBB6_46:                               ; %_ZN6HPCLib23cuScalarProductY_sharedEPfS0_iS0_S0_.exit
                                        ;   in Loop: Header=BB6_36 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v4, s54, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmp_le_i32_e32 vcc_lo, s51, v4
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB6_36
.LBB6_47:                               ; %Flow260
                                        ;   in Loop: Header=BB6_34 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v2, s65, v2
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 6
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB6_34
.LBB6_48:                               ; %.loopexit163
                                        ;   in Loop: Header=BB6_2 Depth=1
	v_dual_mov_b32 v31, v40 :: v_dual_mov_b32 v0, v46
	v_dual_mov_b32 v1, v47 :: v_dual_mov_b32 v2, s58
	v_dual_mov_b32 v3, s59 :: v_dual_mov_b32 v4, v45
	v_dual_mov_b32 v8, v42 :: v_dual_mov_b32 v9, v44
	s_add_u32 s8, s26, 56
	s_addc_u32 s9, s27, 0
	s_mov_b32 s14, s28
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN6HPCLib14cuSVD_W_sharedEPfiiS0_S0_S0_@rel32@lo+4
	s_addc_u32 s1, s1, _ZN6HPCLib14cuSVD_W_sharedEPfiiS0_S0_S0_@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_ashrrev_i32_e32 v57, 31, v56
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b64 v[0:1], 2, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s44, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s45, v1, vcc_lo
	global_store_b32 v[0:1], v76, off
	s_and_saveexec_b32 s0, s61
	s_cbranch_execz .LBB6_53
; %bb.49:                               ; %.lr.ph187.preheader
                                        ;   in Loop: Header=BB6_2 Depth=1
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, v60
	s_mov_b32 s1, s59
.LBB6_50:                               ; %.lr.ph187
                                        ;   Parent Loop BB6_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v4, v2
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_f32_e32 v3, v4
	s_cbranch_execz .LBB6_52
; %bb.51:                               ;   in Loop: Header=BB6_50 Depth=2
	v_mov_b32_e32 v3, v4
	global_store_b32 v[0:1], v4, off
.LBB6_52:                               ;   in Loop: Header=BB6_50 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v2, 4, v2
	s_add_i32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s1, 0
	s_cbranch_scc1 .LBB6_50
.LBB6_53:                               ; %Flow244
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v56, s60, v56
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmp_le_i32_e32 vcc_lo, s48, v56
	s_or_b32 s53, vcc_lo, s53
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s53
	s_cbranch_execnz .LBB6_2
.LBB6_54:                               ; %Flow271
	s_or_b32 exec_lo, exec_lo, s49
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 84
		.amdhsa_next_free_sgpr 67
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_, .Lfunc_end6-_ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2480
; NumSgprs: 69
; NumVgprs: 84
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 8
; VGPRBlocks: 10
; NumSGPRsForWavesPerEU: 69
; NumVGPRsForWavesPerEU: 84
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_ZN6HPCLib14cuPowellIdxVecEiiPi ; -- Begin function _ZN6HPCLib14cuPowellIdxVecEiiPi
	.globl	_ZN6HPCLib14cuPowellIdxVecEiiPi
	.p2align	8
	.type	_ZN6HPCLib14cuPowellIdxVecEiiPi,@function
_ZN6HPCLib14cuPowellIdxVecEiiPi:        ; @_ZN6HPCLib14cuPowellIdxVecEiiPi
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s1, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s2, 0xffff
	s_mov_b32 s2, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_mul_i32 s1, s1, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB7_3
; %bb.1:                                ; %.lr.ph
	v_mad_u64_u32 v[2:3], null, s5, v1, s[4:5]
	v_mov_b32_e32 v3, v1
	s_mul_i32 s3, s1, s5
	s_mov_b32 s8, 0
.LBB7_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v3, v3, v[3:4]
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[6:7], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v0, 31, v5
	v_add_nc_u32_e32 v3, s1, v3
	v_add_co_u32 v4, s0, s6, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v0, v5, v0
	v_cmp_le_i32_e32 vcc_lo, s4, v3
	v_add_co_ci_u32_e64 v5, s0, s7, v7, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v0, 1, v0
	s_or_b32 s8, vcc_lo, s8
	v_sub_nc_u32_e32 v0, v2, v0
	v_add_nc_u32_e32 v2, s3, v2
	global_store_b32 v[4:5], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB7_2
.LBB7_3:                                ; %Flow45
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v0, s4, v1
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s5, v0
	s_cbranch_execz .LBB7_6
; %bb.4:                                ; %.lr.ph34
	s_add_i32 s0, s4, -1
	s_mov_b32 s3, 0
	s_mul_i32 s0, s0, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s2, s0, 31
	s_add_i32 s0, s0, s2
	s_mul_i32 s2, s5, s4
	s_ashr_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s2, s2, s0
.LBB7_5:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v2, s4, v1
	v_add_nc_u32_e32 v0, s2, v1
	v_add_nc_u32_e32 v1, s1, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_nc_u32_e32 v4, s4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_cmp_le_i32_e32 vcc_lo, s5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s0, s6, v2
	v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
	s_or_b32 s3, vcc_lo, s3
	global_store_b32 v[2:3], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB7_5
.LBB7_6:                                ; %._crit_edge35
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN6HPCLib14cuPowellIdxVecEiiPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_ZN6HPCLib14cuPowellIdxVecEiiPi, .Lfunc_end7-_ZN6HPCLib14cuPowellIdxVecEiiPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 352
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_ ; -- Begin function _ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_
	.globl	_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_
	.p2align	8
	.type	_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_,@function
_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_: ; @_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_
; %bb.0:
	s_mov_b64 s[26:27], s[0:1]
	v_mov_b32_e32 v40, v0
	s_clause 0x1
	s_load_b32 s6, s[26:27], 0x4c
	s_load_b32 s50, s[26:27], 0x20
	s_add_u32 s2, s26, 64
	s_mov_b32 s0, s13
	s_addc_u32 s3, s27, 0
	v_and_b32_e32 v0, 0x3ff, v40
	s_mov_b32 s51, exec_lo
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s6, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[56:57], null, s0, s1, v[0:1]
	v_cmpx_gt_i32_e64 s50, v56
	s_cbranch_execz .LBB8_54
; %bb.1:                                ; %.lr.ph193
	s_clause 0x6
	s_load_b32 s0, s[26:27], 0x50
	s_load_b32 s52, s[26:27], 0x8
	s_load_b32 s53, s[26:27], 0x30
	s_load_b64 s[38:39], s[26:27], 0x0
	s_load_b128 s[40:43], s[26:27], 0x10
	s_load_b64 s[44:45], s[26:27], 0x28
	s_load_b64 s[46:47], s[26:27], 0x38
	s_mov_b64 s[8:9], src_shared_base
	s_lshr_b32 s54, s6, 16
	s_mul_i32 s7, s1, 24
	v_mul_u32_u24_e32 v1, 6, v0
	v_bfe_u32 v61, v40, 20, 10
	s_load_b64 s[4:5], s[2:3], 0x0
	v_bfe_u32 v72, v40, 10, 10
	v_mad_u32_u24 v8, v0, 24, 12
	v_cmp_gt_u16_e64 s65, s54, 1
	v_mul_u32_u24_e32 v2, s54, v61
	v_cmp_eq_u32_e64 s29, 0, v61
	v_cmp_gt_u32_e64 s34, 6, v61
	v_cmp_eq_u32_e64 s36, 0, v72
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_mul_i32 s8, s52, 6
	s_and_b32 s56, s0, 0xffff
	s_mul_i32 s11, s8, s1
	s_mul_i32 s10, s53, 6
	s_lshl_b32 s0, s11, 2
	s_mul_i32 s11, s56, s54
	s_mul_i32 s12, s10, s1
	v_mul_lo_u32 v4, s11, v0
	s_add_i32 s0, s0, 0
	v_mul_lo_u32 v3, s8, v0
	s_lshl_b32 s8, s12, 2
	s_add_i32 s7, s0, s7
	s_mul_i32 s11, s11, s1
	s_add_i32 s8, s7, s8
	s_lshl_b32 s11, s11, 2
	v_lshl_add_u32 v62, v1, 2, s0
	v_lshl_add_u32 v1, v4, 2, s8
	s_add_i32 s0, s8, s11
	v_lshl_add_u32 v3, v3, 2, 0
	s_cmp_lg_u32 s0, -1
	v_or_b32_e32 v4, v72, v61
	s_cselect_b32 s8, s0, 0
	v_cmp_ne_u32_e64 s0, -1, v1
	v_cmp_ne_u32_e32 vcc_lo, -1, v3
	v_lshl_add_u32 v63, v2, 2, v1
	v_lshlrev_b32_e32 v2, 5, v0
	s_cselect_b32 s11, s9, 0
	v_cndmask_b32_e64 v42, 0, v1, s0
	v_mul_lo_u32 v1, s10, v0
	v_cndmask_b32_e32 v41, 0, v3, vcc_lo
	v_lshlrev_b32_e32 v3, 2, v61
	v_cndmask_b32_e64 v44, 0, s9, s0
	v_add_co_u32 v6, s0, s8, v2
	v_mul_lo_u32 v2, v0, s52
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_mad_u32_u24 v0, v0, 24, v3
	v_lshl_add_u32 v58, v1, 2, s7
	s_cmp_lt_i32 s53, 6
	v_add_co_ci_u32_e64 v7, null, s11, 0, s0
	s_cselect_b32 s58, -1, 0
	v_cmp_ne_u32_e64 s0, -1, v58
	s_cmp_gt_i32 s53, 0
	v_mul_lo_u32 v2, v2, 24
	s_cselect_b32 s7, -1, 0
	s_cmp_lt_u32 s14, s5
	v_mul_lo_u32 v3, s52, v8
	v_mul_lo_u32 v0, s52, v0
	v_cndmask_b32_e64 v43, 0, s9, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v62
	v_cndmask_b32_e64 v46, 0, v58, s0
	v_cndmask_b32_e64 v47, 0, s9, s0
	s_cselect_b32 s0, 14, 20
	v_lshlrev_b32_e32 v1, 2, v72
	s_add_u32 s48, s2, s0
	v_cmp_eq_u32_e64 s0, 0, v4
	s_mul_i32 s57, s52, 3
	v_dual_cndmask_b32 v45, 0, v62 :: v_dual_mov_b32 v78, 0
	v_cndmask_b32_e64 v5, 0, s9, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s52, v72
	v_cmp_gt_i32_e64 s33, s57, v72
	v_cmp_gt_i32_e64 s35, s52, v72
	v_add_nc_u32_e32 v73, v63, v1
	v_cmp_gt_i32_e64 s37, s53, v61
	v_cndmask_b32_e64 v74, 0, 1, s7
	v_add3_u32 v75, v2, v1, 0
	v_add3_u32 v76, v3, v1, 0
	v_add3_u32 v77, v0, v1, 0
	s_addc_u32 s49, s3, 0
	s_and_b32 s63, s0, s7
	s_mul_i32 s0, s52, s56
	s_mov_b32 s28, s15
	s_mov_b32 s13, s14
	s_mov_b32 s55, 0
	s_lshr_b32 s59, s6, 17
	s_max_i32 s60, s53, 6
	s_min_i32 s61, s53, 6
	s_mul_i32 s62, s4, s1
	s_lshl_b32 s64, s54, 2
	s_lshl_b32 s66, s0, 2
	s_lshl_b32 s67, s52, 2
	s_xor_b32 s68, vcc_lo, -1
.LBB8_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB8_5 Depth 2
                                        ;     Child Loop BB8_7 Depth 2
                                        ;     Child Loop BB8_10 Depth 2
                                        ;       Child Loop BB8_12 Depth 3
                                        ;     Child Loop BB8_17 Depth 2
                                        ;       Child Loop BB8_19 Depth 3
                                        ;         Child Loop BB8_21 Depth 4
                                        ;         Child Loop BB8_24 Depth 4
                                        ;     Child Loop BB8_34 Depth 2
                                        ;       Child Loop BB8_36 Depth 3
                                        ;         Child Loop BB8_38 Depth 4
                                        ;         Child Loop BB8_41 Depth 4
                                        ;     Child Loop BB8_50 Depth 2
	v_ashrrev_i32_e32 v57, 31, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[56:57]
	v_add_co_u32 v0, vcc_lo, s42, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s43, v1, vcc_lo
	global_load_b32 v59, v[0:1], off
	s_and_saveexec_b32 s0, s29
	s_cbranch_execz .LBB8_8
; %bb.3:                                ;   in Loop: Header=BB8_2 Depth=1
	s_and_b32 exec_lo, exec_lo, s33
	s_cbranch_execz .LBB8_8
; %bb.4:                                ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v3, v72 :: v_dual_lshlrev_b32 v0, 1, v59
	v_mov_b32_e32 v2, v75
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s40, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s41, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v0, v0, s57
.LBB8_5:                                ; %.lr.ph.i
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, v0, v3
	v_add_nc_u32_e32 v3, s54, v3
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v8, vcc_lo, s38, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s39, v9, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s57, v3
	global_load_b32 v4, v[8:9], off
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v4
	v_add_nc_u32_e32 v2, s64, v2
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB8_5
; %bb.6:                                ; %.lr.ph25.i.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mul_lo_u32 v0, v1, s57
	v_mov_b32_e32 v1, v76
	v_mov_b32_e32 v2, v72
	s_mov_b32 s1, 0
.LBB8_7:                                ; %.lr.ph25.i
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v0, v2
	v_add_nc_u32_e32 v2, s54, v2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s38, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s39, v4, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s57, v2
	global_load_b32 v3, v[3:4], off
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v3
	v_add_nc_u32_e32 v1, s64, v1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB8_7
.LBB8_8:                                ; %_ZN6HPCLib18cuGetLeadFieldPairEPfiS0_ii.exit
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v31, v40 :: v_dual_mov_b32 v0, v41
	v_dual_mov_b32 v1, v43 :: v_dual_mov_b32 v2, s52
	v_dual_mov_b32 v3, 6 :: v_dual_mov_b32 v4, v45
	v_dual_mov_b32 v8, v42 :: v_dual_mov_b32 v9, v44
	s_add_u32 s8, s26, 64
	s_addc_u32 s9, s27, 0
	s_mov_b32 s14, s28
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_@rel32@lo+4
	s_addc_u32 s1, s1, _ZN6HPCLib15cuSVD_UW_sharedEPfiiS0_S0_S0_@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s34
	s_cbranch_execz .LBB8_14
; %bb.9:                                ; %.lr.ph173.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	v_mov_b32_e32 v0, v77
	v_mov_b32_e32 v1, v61
	s_mov_b32 s1, 0
.LBB8_10:                               ; %.lr.ph173
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB8_12 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_lshl_add_u32 v2, v1, 2, v62
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, 0x3727c5ac, v2
	s_and_b32 s3, vcc_lo, s68
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB8_13
; %bb.11:                               ; %.lr.ph
                                        ;   in Loop: Header=BB8_10 Depth=2
	v_mov_b32_e32 v2, v0
	v_mov_b32_e32 v3, v72
	s_mov_b32 s3, 0
.LBB8_12:                               ;   Parent Loop BB8_2 Depth=1
                                        ;     Parent Loop BB8_10 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v3, s54, v3
	ds_store_b32 v2, v78
	v_add_nc_u32_e32 v2, s64, v2
	v_cmp_le_i32_e32 vcc_lo, s52, v3
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB8_12
.LBB8_13:                               ; %Flow272
                                        ;   in Loop: Header=BB8_10 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v1, s56, v1
	v_add_nc_u32_e32 v0, s66, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_u32_e32 vcc_lo, 5, v1
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB8_10
.LBB8_14:                               ; %Flow274
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s58
	s_mov_b32 s0, -1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccz .LBB8_32
; %bb.15:                               ; %.preheader167
                                        ;   in Loop: Header=BB8_2 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v74
	s_cbranch_vccnz .LBB8_31
; %bb.16:                               ; %.lr.ph181.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_mov_b32 s0, 0
.LBB8_17:                               ; %.lr.ph181
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB8_19 Depth 3
                                        ;         Child Loop BB8_21 Depth 4
                                        ;         Child Loop BB8_24 Depth 4
	s_and_saveexec_b32 s1, s34
	s_cbranch_execz .LBB8_30
; %bb.18:                               ; %.lr.ph178
                                        ;   in Loop: Header=BB8_17 Depth=2
	s_mul_i32 s2, s0, s52
	v_mad_u64_u32 v[0:1], null, s0, 24, v[58:59]
	s_ashr_i32 s3, s2, 31
	v_mov_b32_e32 v3, v77
	s_lshl_b64 s[2:3], s[2:3], 2
	v_mov_b32_e32 v4, v61
	s_add_u32 s2, s44, s2
	s_addc_u32 s3, s45, s3
	s_mov_b32 s4, 0
.LBB8_19:                               ;   Parent Loop BB8_2 Depth=1
                                        ;     Parent Loop BB8_17 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB8_21 Depth 4
                                        ;         Child Loop BB8_24 Depth 4
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v8, v4, 2, v0
	v_mov_b32_e32 v9, 0
	ds_store_b32 v8, v78
	s_and_saveexec_b32 s5, s35
	s_cbranch_execz .LBB8_23
; %bb.20:                               ; %.lr.ph.i158
                                        ;   in Loop: Header=BB8_19 Depth=3
	global_load_u16 v10, v78, s[48:49]
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v11, v3
	v_mov_b32_e32 v1, v72
	s_mov_b32 s6, 0
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v12, 2, v10
.LBB8_21:                               ;   Parent Loop BB8_2 Depth=1
                                        ;     Parent Loop BB8_17 Depth=2
                                        ;       Parent Loop BB8_19 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[13:14], 2, v[1:2]
	v_add_nc_u32_e32 v1, v1, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v13, vcc_lo, s2, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s3, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_le_i32_e32 vcc_lo, s52, v1
	global_load_b32 v2, v[13:14], off
	ds_load_b32 v13, v11
	v_add_nc_u32_e32 v11, v11, v12
	s_or_b32 s6, vcc_lo, s6
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v9, v13, v2
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB8_21
; %bb.22:                               ; %Flow255
                                        ;   in Loop: Header=BB8_19 Depth=3
	s_or_b32 exec_lo, exec_lo, s6
.LBB8_23:                               ; %Flow256
                                        ;   in Loop: Header=BB8_19 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_and_not1_b32 vcc_lo, exec_lo, s65
	s_mov_b32 s5, s59
	ds_store_b32 v73, v9
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB8_27
.LBB8_24:                               ; %.lr.ph32.i153
                                        ;   Parent Loop BB8_2 Depth=1
                                        ;     Parent Loop BB8_17 Depth=2
                                        ;       Parent Loop BB8_19 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_mov_b32 s6, exec_lo
	v_cmpx_gt_u32_e64 s5, v72
	s_cbranch_execz .LBB8_26
; %bb.25:                               ;   in Loop: Header=BB8_24 Depth=4
	v_lshl_add_u32 v1, s5, 2, v73
	ds_load_b32 v1, v1
	ds_load_b32 v2, v73
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v1, v1, v2
	ds_store_b32 v73, v1
.LBB8_26:                               ;   in Loop: Header=BB8_24 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_lshr_b32 s6, s5, 1
	s_cmp_gt_u32 s5, 1
	s_mov_b32 s5, s6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB8_24
.LBB8_27:                               ; %._crit_edge33.i157
                                        ;   in Loop: Header=BB8_19 Depth=3
	s_and_saveexec_b32 s5, s36
	s_cbranch_execz .LBB8_29
; %bb.28:                               ;   in Loop: Header=BB8_19 Depth=3
	ds_load_b32 v1, v63
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v8, v1
.LBB8_29:                               ; %_ZN6HPCLib23cuScalarProductY_sharedEPfS0_iS0_S0_.exit162
                                        ;   in Loop: Header=BB8_19 Depth=3
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v4, s56, v4
	v_add_nc_u32_e32 v3, s66, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmp_lt_u32_e32 vcc_lo, 5, v4
	s_or_b32 s4, vcc_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB8_19
.LBB8_30:                               ; %Flow259
                                        ;   in Loop: Header=BB8_17 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s0, s53
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB8_17
.LBB8_31:                               ; %Flow261
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_mov_b32 s0, 0
.LBB8_32:                               ; %Flow269
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB8_48
; %bb.33:                               ; %.preheader165.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	v_mov_b32_e32 v2, v75
	s_mov_b32 s0, 0
.LBB8_34:                               ; %.preheader165
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB8_36 Depth 3
                                        ;         Child Loop BB8_38 Depth 4
                                        ;         Child Loop BB8_41 Depth 4
	s_and_saveexec_b32 s1, s37
	s_cbranch_execz .LBB8_47
; %bb.35:                               ; %.lr.ph186
                                        ;   in Loop: Header=BB8_34 Depth=2
	s_mul_i32 s2, s0, s53
	v_mov_b32_e32 v4, v61
	v_lshl_add_u32 v3, s2, 2, v58
	s_mov_b32 s2, 0
.LBB8_36:                               ;   Parent Loop BB8_2 Depth=1
                                        ;     Parent Loop BB8_34 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB8_38 Depth 4
                                        ;         Child Loop BB8_41 Depth 4
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v8, v4, 2, v3
	v_mov_b32_e32 v9, 0
	ds_store_b32 v8, v78
	s_and_saveexec_b32 s3, s35
	s_cbranch_execz .LBB8_40
; %bb.37:                               ; %.lr.ph.i145
                                        ;   in Loop: Header=BB8_36 Depth=3
	global_load_u16 v10, v78, s[48:49]
	v_mul_lo_u32 v0, v4, s52
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v11, v2
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v12, vcc_lo, s44, v0
	v_mov_b32_e32 v0, v72
	v_add_co_ci_u32_e32 v13, vcc_lo, s45, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v14, 2, v10
.LBB8_38:                               ;   Parent Loop BB8_2 Depth=1
                                        ;     Parent Loop BB8_34 Depth=2
                                        ;       Parent Loop BB8_36 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[15:16], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v15, vcc_lo, v12, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, v13, v16, vcc_lo
	global_load_b32 v1, v[15:16], off
	ds_load_b32 v15, v11
	v_add_nc_u32_e32 v0, v0, v10
	v_add_nc_u32_e32 v11, v11, v14
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v9, v1, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s52, v0
	s_or_b32 s4, vcc_lo, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB8_38
; %bb.39:                               ; %Flow264
                                        ;   in Loop: Header=BB8_36 Depth=3
	s_or_b32 exec_lo, exec_lo, s4
.LBB8_40:                               ; %Flow265
                                        ;   in Loop: Header=BB8_36 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_and_not1_b32 vcc_lo, exec_lo, s65
	s_mov_b32 s3, s59
	ds_store_b32 v73, v9
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB8_44
.LBB8_41:                               ; %.lr.ph32.i
                                        ;   Parent Loop BB8_2 Depth=1
                                        ;     Parent Loop BB8_34 Depth=2
                                        ;       Parent Loop BB8_36 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_u32_e64 s3, v72
	s_cbranch_execz .LBB8_43
; %bb.42:                               ;   in Loop: Header=BB8_41 Depth=4
	v_lshl_add_u32 v0, s3, 2, v73
	ds_load_b32 v0, v0
	ds_load_b32 v1, v73
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v0, v0, v1
	ds_store_b32 v73, v0
.LBB8_43:                               ;   in Loop: Header=BB8_41 Depth=4
	s_or_b32 exec_lo, exec_lo, s4
	s_lshr_b32 s4, s3, 1
	s_cmp_gt_u32 s3, 1
	s_mov_b32 s3, s4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB8_41
.LBB8_44:                               ; %._crit_edge33.i
                                        ;   in Loop: Header=BB8_36 Depth=3
	s_and_saveexec_b32 s3, s36
	s_cbranch_execz .LBB8_46
; %bb.45:                               ;   in Loop: Header=BB8_36 Depth=3
	ds_load_b32 v0, v63
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v8, v0
.LBB8_46:                               ; %_ZN6HPCLib23cuScalarProductY_sharedEPfS0_iS0_S0_.exit
                                        ;   in Loop: Header=BB8_36 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v4, s56, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmp_le_i32_e32 vcc_lo, s53, v4
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB8_36
.LBB8_47:                               ; %Flow267
                                        ;   in Loop: Header=BB8_34 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v2, s67, v2
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 6
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB8_34
.LBB8_48:                               ; %.loopexit166
                                        ;   in Loop: Header=BB8_2 Depth=1
	v_dual_mov_b32 v31, v40 :: v_dual_mov_b32 v0, v46
	v_dual_mov_b32 v1, v47 :: v_dual_mov_b32 v2, s60
	v_dual_mov_b32 v3, s61 :: v_dual_mov_b32 v4, v45
	v_dual_mov_b32 v8, v42 :: v_dual_mov_b32 v9, v44
	s_add_u32 s8, s26, 64
	s_addc_u32 s9, s27, 0
	s_mov_b32 s14, s28
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN6HPCLib14cuSVD_W_sharedEPfiiS0_S0_S0_@rel32@lo+4
	s_addc_u32 s1, s1, _ZN6HPCLib14cuSVD_W_sharedEPfiiS0_S0_S0_@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_ashrrev_i32_e32 v60, 31, v59
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b64 v[0:1], 2, v[59:60]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s46, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s47, v1, vcc_lo
	global_store_b32 v[0:1], v78, off
	s_and_saveexec_b32 s0, s63
	s_cbranch_execz .LBB8_53
; %bb.49:                               ; %.lr.ph190.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, v62
	s_mov_b32 s1, s61
.LBB8_50:                               ; %.lr.ph190
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v4, v2
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_f32_e32 v3, v4
	s_cbranch_execz .LBB8_52
; %bb.51:                               ;   in Loop: Header=BB8_50 Depth=2
	v_mov_b32_e32 v3, v4
	global_store_b32 v[0:1], v4, off
.LBB8_52:                               ;   in Loop: Header=BB8_50 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v2, 4, v2
	s_add_i32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s1, 0
	s_cbranch_scc1 .LBB8_50
.LBB8_53:                               ; %Flow251
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v56, s62, v56
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmp_le_i32_e32 vcc_lo, s50, v56
	s_or_b32 s55, vcc_lo, s55
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s55
	s_cbranch_execnz .LBB8_2
.LBB8_54:                               ; %Flow278
	s_or_b32 exec_lo, exec_lo, s51
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 84
		.amdhsa_next_free_sgpr 69
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_, .Lfunc_end8-_ZN6HPCLib21PowellRapMusicSubcorrEPfiiPiS1_iS0_iS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2524
; NumSgprs: 71
; NumVgprs: 84
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 8
; VGPRBlocks: 10
; NumSGPRsForWavesPerEU: 71
; NumVGPRsForWavesPerEU: 84
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.type	__unnamed_1,@object             ; @0
	.section	.rodata,"a",@progbits
	.p2align	2, 0x0
__unnamed_1:
	.long	130054                          ; 0x1fc06
	.long	129546                          ; 0x1fa0a
	.long	110114                          ; 0x1ae22
	.long	16288                           ; 0x3fa0
	.long	6                               ; 0x6
	.long	256                             ; 0x100
	.long	0                               ; 0x0
	.long	4195                            ; 0x1063
	.long	86927                           ; 0x1538f
	.long	86758                           ; 0x152e6
	.long	73744                           ; 0x12010
	.long	10904                           ; 0x2a98
	.long	399                             ; 0x18f
	.long	512                             ; 0x200
	.long	0                               ; 0x0
	.long	2804                            ; 0xaf4
	.long	65280                           ; 0xff00
	.long	64770                           ; 0xfd02
	.long	55054                           ; 0xd70e
	.long	8192                            ; 0x2000
	.long	0                               ; 0x0
	.long	128                             ; 0x80
	.long	0                               ; 0x0
	.long	2107                            ; 0x83b
	.long	43576                           ; 0xaa38
	.long	43406                           ; 0xa98e
	.long	36895                           ; 0x901f
	.long	5504                            ; 0x1580
	.long	56                              ; 0x38
	.long	256                             ; 0x100
	.long	0                               ; 0x0
	.long	1405                            ; 0x57d
	.long	32703                           ; 0x7fbf
	.long	32193                           ; 0x7dc1
	.long	27364                           ; 0x6ae4
	.long	4160                            ; 0x1040
	.long	63                              ; 0x3f
	.long	64                              ; 0x40
	.long	0                               ; 0x0
	.long	1054                            ; 0x41e
	.long	21816                           ; 0x5538
	.long	21646                           ; 0x548e
	.long	18399                           ; 0x47df
	.long	2816                            ; 0xb00
	.long	56                              ; 0x38
	.long	128                             ; 0x80
	.long	0                               ; 0x0
	.long	703                             ; 0x2bf
	.long	16367                           ; 0x3fef
	.long	15856                           ; 0x3df0
	.long	13477                           ; 0x34a5
	.long	2176                            ; 0x880
	.long	15                              ; 0xf
	.long	32                              ; 0x20
	.long	32768                           ; 0x8000
	.long	527                             ; 0x20f
	.long	10915                           ; 0x2aa3
	.long	10745                           ; 0x29f9
	.long	9133                            ; 0x23ad
	.long	1472                            ; 0x5c0
	.long	35                              ; 0x23
	.long	64                              ; 0x40
	.long	0                               ; 0x0
	.long	352                             ; 0x160
	.long	8187                            ; 0x1ffb
	.long	7676                            ; 0x1dfc
	.long	6524                            ; 0x197c
	.long	1280                            ; 0x500
	.long	11                              ; 0xb
	.long	16                              ; 0x10
	.long	134219776                       ; 0x8000800
	.long	265                             ; 0x109
	.long	5459                            ; 0x1553
	.long	5289                            ; 0x14a9
	.long	4495                            ; 0x118f
	.long	896                             ; 0x380
	.long	19                              ; 0x13
	.long	32                              ; 0x20
	.long	524288                          ; 0x80000
	.long	176                             ; 0xb0
	.long	4094                            ; 0xffe
	.long	3583                            ; 0xdff
	.long	3045                            ; 0xbe5
	.long	1024                            ; 0x400
	.long	6                               ; 0x6
	.long	8                               ; 0x8
	.long	1077952576                      ; 0x40404040
	.long	133                             ; 0x85
	.long	2730                            ; 0xaaa
	.long	2560                            ; 0xa00
	.long	2176                            ; 0x880
	.long	512                             ; 0x200
	.long	10                              ; 0xa
	.long	16                              ; 0x10
	.long	67109888                        ; 0x4000400
	.long	89                              ; 0x59
	.long	2047                            ; 0x7ff
	.long	1536                            ; 0x600
	.long	1305                            ; 0x519
	.long	1024                            ; 0x400
	.long	3                               ; 0x3
	.long	4                               ; 0x4
	.long	2290649224                      ; 0x88888888
	.long	66                              ; 0x42
	.long	1365                            ; 0x555
	.long	1195                            ; 0x4ab
	.long	1015                            ; 0x3f7
	.long	512                             ; 0x200
	.long	5                               ; 0x5
	.long	8                               ; 0x8
	.long	538976288                       ; 0x20202020
	.long	44                              ; 0x2c
	.long	1023                            ; 0x3ff
	.long	512                             ; 0x200
	.long	435                             ; 0x1b3
	.long	2048                            ; 0x800
	.long	1                               ; 0x1
	.long	2                               ; 0x2
	.long	2863311530                      ; 0xaaaaaaaa
	.long	34                              ; 0x22
	.long	682                             ; 0x2aa
	.long	512                             ; 0x200
	.long	435                             ; 0x1b3
	.long	2048                            ; 0x800
	.long	2                               ; 0x2
	.long	4                               ; 0x4
	.long	1145324612                      ; 0x44444444
	.long	35                              ; 0x23
	.size	__unnamed_1, 512

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _ZN6HPCLib12t_pSharedMemE
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
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        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
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        .size:           8
        .value_kind:     global_buffer
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        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
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        .value_kind:     hidden_block_count_z
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        .value_kind:     hidden_group_size_x
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        .size:           2
        .value_kind:     hidden_group_size_y
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        .size:           2
        .value_kind:     hidden_group_size_z
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        .size:           2
        .value_kind:     hidden_remainder_x
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        .size:           2
        .value_kind:     hidden_remainder_y
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        .size:           2
        .value_kind:     hidden_remainder_z
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        .size:           8
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        .size:           8
        .value_kind:     hidden_global_offset_z
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        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         96
        .size:           8
        .value_kind:     hidden_hostcall_buffer
      - .offset:         112
        .size:           8
        .value_kind:     hidden_heap_v1
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _ZN6HPCLib22cuCalcPairCombinationsEiiPi
    .private_segment_fixed_size: 8
    .sgpr_count:     54
    .sgpr_spill_count: 0
    .symbol:         _ZN6HPCLib22cuCalcPairCombinationsEiiPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     136
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
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        .offset:         0
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        .value_kind:     hidden_global_offset_x
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        .size:           8
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        .value_kind:     hidden_global_offset_z
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        .size:           2
        .value_kind:     hidden_grid_dims
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        .value_kind:     hidden_hostcall_buffer
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        .size:           4
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    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _ZN6HPCLib9cuCalcU_BEPfiiS0_Pi
    .private_segment_fixed_size: 8
    .sgpr_count:     60
    .sgpr_spill_count: 0
    .symbol:         _ZN6HPCLib9cuCalcU_BEPfiiS0_Pi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     136
    .vgpr_spill_count: 0
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    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
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    .max_flat_workgroup_size: 1024
    .name:           _ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     69
    .sgpr_spill_count: 0
    .symbol:         _ZN6HPCLib15RapMusicSubcorrEPfiiPiiS0_iS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     84
    .vgpr_spill_count: 0
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    .language:       OpenCL C
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    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
