#include <stdlib.h>
#include <stdio.h>
#include <vector>
#include <math.h>
#include <algorithm>
#include <iostream>
#include <time.h>
#include <unistd.h>
#include <sys/time.h>
#include <cuda_runtime.h>


#define TILE_WIDTH 8
#define BLOCK_SIZE 32
// a sequential version of matrix_multiply
void matrix_multiply_seq(float *a, float *b, float *ab, size_t width){
	int i, j, k;
	for(i=0; i<width; i++)
		for(j=0; j<width; j++){
			ab[i*width+j]=0.0;
			for(k=0; k<width; k++){
				ab[i*width+j] += a[i*width+k] * b[k*width+j];
			}
		}
}

// a simple version of matrix_multiply which issues redundant loads from off-chip global memory
__global__ void matrix_multiply_simple(float *a, float *b, float *ab, size_t width){
  // calculate the row & column index of the element
  int row = blockIdx.y*blockDim.y + threadIdx.y;
  int col = blockIdx.x*blockDim.x + threadIdx.x;
  float result = 0;
  // do dot product between row of a and column of b
  for(int k = 0; k < width; ++k){
    result += a[row*width+k] * b[k*width+col];
  }
  // write out this thread's result
  ab[row*width+col] = result;
}

__global__ void matrix_multiply_shared(float *data_a, float *data_b, float *data_output, size_t width){
  // create tiles in shared memrory for the tile multiplication
  __shared__ float shared_A[TILE_WIDTH][TILE_WIDTH];
  __shared__ float shared_B[TILE_WIDTH][TILE_WIDTH];

  // for simplicity assign
  int bx = blockIdx.x; 
  int by = blockIdx.y;
  int tx = threadIdx.x; 
  int ty = threadIdx.y;

  // calculate the row & column index of element in the tile
  int row = by * TILE_WIDTH + ty;
  int col = bx * TILE_WIDTH + tx;
  float result = 0;
  // load the tile data from global memory to shared memory
  // global memory access is reduced by the factor of 1/TILE_WIDTH
  for(int i = 0; i < width/TILE_WIDTH; ++i){
    shared_A[ty][tx] = data_a[row*width + i*TILE_WIDTH + tx];
    shared_B[ty][tx] = data_b[(i*TILE_WIDTH + ty)*width + col];
    // thread barrier. Wait until all the threads have executed.
    // So all the data is loaded to its respective tiles
    __syncthreads();

    // do the multiplication in shared memory 
    // to get sub results for the output matrix
    // multiplication will be performed Matrix Size/TILE_WIDTH
    for(int k = 0; k < TILE_WIDTH; ++k){
      result += shared_A[ty][k] * shared_B[k][tx];
    }
    __syncthreads();
  }
  data_output[row*width + col] = result;
}

// compare two matrix to see if they are equal -- for verification
int matrixEqual(  float *matrixA, float *matrixB, int m, int n ){
  int bad = 0;
  for ( int y = 0; y < m && !bad ; y++ )
    for ( int x = 0; x < n && !bad ; x++ ){
      if ( abs(matrixA[y*n+x] - matrixB[y*n+x]) > 1e-8 ){
        bad++;
      }
    }
  return bad;
}

int main(void){
  // create a large workload so we can easily measure the
  // performance difference of both implementations
  // note that n measures the width of the matrix, not the number of total elements
  const size_t n = 1<<10;
  //const dim3 block_size(TILE_WIDTH,TILE_WIDTH);
  const dim3 block_size(BLOCK_SIZE,BLOCK_SIZE);
  const dim3 num_blocks(n / block_size.x, n / block_size.y);

  // generate random input on the host
	float *h_a, *h_b, *h_s, *h_res;
  //std::vector<float> h_a(n*n), h_b(n*n), h_c(n*n);
	h_a = (float *)malloc(sizeof(float) * n * n);
	h_b = (float *)malloc(sizeof(float) * n * n);
	h_s = (float *)malloc(sizeof(float) * n * n);
	h_res = (float*)malloc(sizeof(float) * n * n);

  for(int i = 0; i < n*n; ++i){
    h_a[i] = static_cast<float>(rand()) / RAND_MAX;
    h_b[i] = static_cast<float>(rand()) / RAND_MAX;
  }

  // allocate storage for the device
  float *d_a = 0, *d_b = 0, *d_c = 0;
  cudaMalloc((void**)&d_a, sizeof(float) * n * n);
  cudaMalloc((void**)&d_b, sizeof(float) * n * n);
  cudaMalloc((void**)&d_c, sizeof(float) * n * n);

  // copy input to the device
  cudaMemcpy(d_a, h_a, sizeof(float) * n * n, cudaMemcpyHostToDevice);
  cudaMemcpy(d_b, h_b, sizeof(float) * n * n, cudaMemcpyHostToDevice);

  // time the kernel launches using CUDA events
  cudaEvent_t launch_begin, launch_end;
  cudaEventCreate(&launch_begin);
  cudaEventCreate(&launch_end);
  //time many sequential run and take the average
  size_t num_launches = 4;
  double average_seq_time;
  struct timespec start, end;
  std::cout << "Timing sequential implementation...";
  if( clock_gettime( CLOCK_REALTIME, &start) == -1 ) {
    perror( "clock gettime" );
    exit( EXIT_FAILURE );
  }
  for(int i = 0; i < num_launches; i++){
	  matrix_multiply_seq(h_a, h_b, h_s, n);
  }

  if( clock_gettime( CLOCK_REALTIME, &end) == -1 ) {
	  perror( "clock gettime" );
      exit( EXIT_FAILURE );
  }
  //compute the time in s
  average_seq_time = (end.tv_sec - start.tv_sec) + (double)(end.tv_nsec - start.tv_nsec) / 1e+9;
  //take the average
  average_seq_time /= num_launches;
  std::cout << " done." << std::endl;
  // launch a single "warm-up" kernel
  matrix_multiply_simple<<<num_blocks,block_size>>>(d_a, d_b, d_c, n);
  cudaMemcpy(h_res, d_c, sizeof(float)*n*n, cudaMemcpyDeviceToHost);
  int equal = matrixEqual(h_res, h_s, n, n);
  if(equal)
	  printf("Verification success.\n");
  else {
	  printf("Verification failed.\n");
	  num_launches = 0;
  }
  // time many kernel launches and take the average time
  float average_simple_time = 0;
  std::cout << "Timing simple implementation...";
  for(int i = 0; i < num_launches; ++i){
    // record a CUDA event immediately before and after the kernel launch
    cudaEventRecord(launch_begin,0);
    matrix_multiply_simple<<<num_blocks,block_size>>>(d_a, d_b, d_c, n);
    cudaEventRecord(launch_end,0);
    cudaEventSynchronize(launch_end);
    // measure the time spent in the kernel
    float time = 0;
    cudaEventElapsedTime(&time, launch_begin, launch_end);
    average_simple_time += time;
  }
  average_simple_time /= num_launches;
  std::cout << " done." << std::endl;
  std::cout <<"Average sequential time: " << average_seq_time*1000 << " ms" << std::endl;
  std::cout <<"Average simple time: " << average_simple_time << " ms" << std::endl;

//-------------- Tiled Matrix Multiplication --------------//
    float average_tiled_time = 0;
    // std::cout << "Timing tiled implementation...";
    for(int i = 0; i < num_launches; ++i){
      // record a CUDA event immediately before and after the kernel launch
      cudaEventRecord(launch_begin,0);
      matrix_multiply_simple<<<num_blocks,block_size>>>(d_a, d_b, d_c, n);
      cudaEventRecord(launch_end,0);
      cudaEventSynchronize(launch_end);
      cudaDeviceSynchronize();
      // measure the time spent in the kernel
      float time = 0;
      cudaEventElapsedTime(&time, launch_begin, launch_end);
      average_tiled_time += time;
    }

  // destroy the CUDA events
  cudaEventDestroy(launch_begin);
  cudaEventDestroy(launch_end);

  average_tiled_time /= num_launches;
  std::cout <<"Average tiled time: " << average_tiled_time << " ms" << std::endl;

  // report the effective throughput of each kernel in GFLOPS
  // the effective throughput is measured as the number of floating point operations performed per second:
  // (one mul + one add) * N^3
  float num_ops=2 * n * n * n;
  float seq_throughput = num_ops / average_seq_time / 1000000000.0f;
  float simple_throughput = num_ops / (average_simple_time / 1000.0f) / 1000000000.0f;
  float tiled_throughput = num_ops / (average_tiled_time / 1000.0f) / 1000000000.0f;

  std::cout << "\nMatrix size: " << n << "x" << n << std::endl;
  std::cout << "Tile size: " << TILE_WIDTH << "x" << TILE_WIDTH << std::endl;
  std::cout << "\nThroughput of sequential implementation: " << seq_throughput << " GFLOPS" << std::endl;
  std::cout << "Throughput of simple kernel: " << simple_throughput << " GFLOPS" << std::endl;
  std::cout << "Throughput of tiled kernel: " << tiled_throughput << " GFLOPS" << std::endl;
  std::cout << "Performance improvement: simple over sequential " << simple_throughput / seq_throughput << "x" << std::endl;
  std::cout << "Performance improvement: tiled over sequential " << tiled_throughput/seq_throughput << "x" << std::endl;
  std::cout << "Performance improvement: tiled over simple " << tiled_throughput/simple_throughput << "x" << std::endl;
  printf("\n");
  // deallocate device memory
  cudaFree(d_a);
  cudaFree(d_b);
  cudaFree(d_c);
  free(h_a);
  free(h_b);
  free(h_s);
  free(h_res);

  return 0;
}


	.file	"tmpxft_00367b5b_00000000-6_matrixMultiplication.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4270:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4270:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4929:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4929:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z19matrix_multiply_seqPfS_S_m
	.type	_Z19matrix_multiply_seqPfS_S_m, @function
_Z19matrix_multiply_seqPfS_S_m:
.LFB4265:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r10
	movq	%rsi, %r11
	movq	%rcx, %rax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	leaq	0(,%rcx,4), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
.L4:
	cmpl	%ebp, %r8d
	je	.L12
	leaq	0(,%r9,4), %rcx
	xorl	%esi, %esi
	leaq	(%rbx,%rcx), %rdx
	leaq	(%r10,%rcx), %rdi
.L6:
	movl	$0x00000000, (%rdx)
	leaq	(%r11,%rsi,4), %r13
	xorl	%ecx, %ecx
.L5:
	movss	(%rdi,%rcx,4), %xmm0
	mulss	0(%r13), %xmm0
	movq	%rcx, %r14
	incq	%rcx
	addss	(%rdx), %xmm0
	addq	%r12, %r13
	movss	%xmm0, (%rdx)
	cmpq	%rcx, %rax
	jne	.L5
	leaq	1(%rsi), %rcx
	addq	$4, %rdx
	cmpq	%r14, %rsi
	je	.L13
	movq	%rcx, %rsi
	jmp	.L6
.L13:
	incl	%r8d
	addq	%rax, %r9
	jmp	.L4
.L12:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4265:
	.size	_Z19matrix_multiply_seqPfS_S_m, .-_Z19matrix_multiply_seqPfS_S_m
	.globl	_Z11matrixEqualPfS_ii
	.type	_Z11matrixEqualPfS_ii, @function
_Z11matrixEqualPfS_ii:
.LFB4266:
	.cfi_startproc
	endbr64
	movsd	.LC2(%rip), %xmm2
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %r9
	movl	%edx, %r11d
	movq	%rsi, %r10
	xorl	%edi, %edi
	xorl	%r8d, %r8d
	xorl	%edx, %edx
	movss	.LC1(%rip), %xmm1
	movl	$1, %ebx
.L15:
	cmpl	%r11d, %r8d
	jge	.L14
	testb	$1, %dl
	jne	.L14
	movslq	%edi, %rax
	xorl	%esi, %esi
	salq	$2, %rax
.L20:
	cmpl	%ecx, %esi
	jge	.L22
	testb	$1, %dl
	jne	.L22
	movss	(%r9,%rax), %xmm0
	subss	(%r10,%rax), %xmm0
	andps	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	ucomisd	%xmm2, %xmm0
	cmova	%ebx, %edx
	incl	%esi
	addq	$4, %rax
	jmp	.L20
.L22:
	incl	%r8d
	addl	%ecx, %edi
	jmp	.L15
.L14:
	movl	%edx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4266:
	.size	_Z11matrixEqualPfS_ii, .-_Z11matrixEqualPfS_ii
	.globl	_Z47__device_stub__Z22matrix_multiply_simplePfS_S_mPfS_S_m
	.type	_Z47__device_stub__Z22matrix_multiply_simplePfS_S_mPfS_S_m, @function
_Z47__device_stub__Z22matrix_multiply_simplePfS_S_mPfS_S_m:
.LFB4292:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z22matrix_multiply_simplePfS_S_m(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L33:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4292:
	.size	_Z47__device_stub__Z22matrix_multiply_simplePfS_S_mPfS_S_m, .-_Z47__device_stub__Z22matrix_multiply_simplePfS_S_mPfS_S_m
	.globl	_Z22matrix_multiply_simplePfS_S_m
	.type	_Z22matrix_multiply_simplePfS_S_m, @function
_Z22matrix_multiply_simplePfS_S_m:
.LFB4293:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z22matrix_multiply_simplePfS_S_mPfS_S_m
	.cfi_endproc
.LFE4293:
	.size	_Z22matrix_multiply_simplePfS_S_m, .-_Z22matrix_multiply_simplePfS_S_m
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"Timing sequential implementation..."
.LC5:
	.string	"clock gettime"
.LC8:
	.string	" done."
.LC9:
	.string	"Verification success.\n"
.LC10:
	.string	"Verification failed.\n"
.LC11:
	.string	"Timing simple implementation..."
.LC12:
	.string	"Average sequential time: "
.LC14:
	.string	" ms"
.LC15:
	.string	"Average simple time: "
.LC16:
	.string	"Average tiled time: "
.LC21:
	.string	"\nMatrix size: "
.LC22:
	.string	"x"
.LC23:
	.string	"Tile size: "
.LC24:
	.string	"\nThroughput of sequential implementation: "
.LC25:
	.string	" GFLOPS"
.LC26:
	.string	"Throughput of simple kernel: "
.LC27:
	.string	"Throughput of tiled kernel: "
.LC28:
	.string	"Performance improvement: simple over sequential "
.LC29:
	.string	"Performance improvement: tiled over sequential "
.LC30:
	.string	"Performance improvement: tiled over simple "
.LC31:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4267:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4194304, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	movl	$1, 104(%rsp)
	movabsq	$137438953504, %rax
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	%rax, 24(%rsp)
.L39:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC3(%rip), %xmm0
	movss	%xmm0, 0(%rbp,%r12)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC3(%rip), %xmm0
	movss	%xmm0, (%rbx,%r12)
	addq	$4, %r12
	cmpq	$4194304, %r12
	jne	.L39
	xorl	%eax, %eax
	leaq	56(%rsp), %rdi
	movl	$4194304, %esi
	movl	$4, %r12d
	movq	%rax, 56(%rsp)
	movq	%rax, 64(%rsp)
	movq	%rax, 72(%rsp)
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	leaq	80(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	88(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%edi, %edi
	leaq	120(%rsp), %rsi
	call	clock_gettime@PLT
	incl	%eax
	jne	.L40
.L41:
	leaq	.LC5(%rip), %rdi
	call	perror@PLT
	movl	$1, %edi
	call	exit@PLT
.L40:
	movq	16(%rsp), %rdx
	movl	$1024, %ecx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	_Z19matrix_multiply_seqPfS_S_m
	decl	%r12d
	jne	.L40
	xorl	%edi, %edi
	leaq	136(%rsp), %rsi
	call	clock_gettime@PLT
	incl	%eax
	je	.L41
	movq	144(%rsp), %rax
	subq	128(%rsp), %rax
	leaq	.LC8(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	cvtsi2sdq	%rax, %xmm0
	movq	136(%rsp), %rax
	subq	120(%rsp), %rax
	divsd	.LC6(%rip), %xmm0
	cvtsi2sdq	%rax, %xmm1
	addsd	%xmm1, %xmm0
	mulsd	.LC7(%rip), %xmm0
	movsd	%xmm0, 32(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	104(%rsp), %ecx
	movl	116(%rsp), %esi
	xorl	%r9d, %r9d
	movq	108(%rsp), %rdi
	xorl	%r8d, %r8d
	movabsq	$137438953504, %rdx
	movq	%rdx, 96(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$1024, %ecx
	movq	56(%rsp), %rdi
	call	_Z47__device_stub__Z22matrix_multiply_simplePfS_S_mPfS_S_m
.L42:
	movq	72(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$2, %ecx
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$1024, %ecx
	movl	$1024, %edx
	call	_Z11matrixEqualPfS_ii
	testl	%eax, %eax
	je	.L43
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movl	$4, %r12d
	call	__printf_chk@PLT
	jmp	.L44
.L43:
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r12d, %r12d
	call	__printf_chk@PLT
.L44:
	leaq	.LC11(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movl	%r12d, %r14d
	xorl	%r13d, %r13d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$0x00000000, 12(%rsp)
	leaq	52(%rsp), %r15
.L45:
	cmpl	%r13d, %r14d
	je	.L60
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	104(%rsp), %ecx
	movl	116(%rsp), %esi
	xorl	%r9d, %r9d
	movq	96(%rsp), %rdx
	movq	108(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$1024, %ecx
	movq	56(%rsp), %rdi
	call	_Z47__device_stub__Z22matrix_multiply_simplePfS_S_mPfS_S_m
.L46:
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	incl	%r13d
	call	cudaEventRecord@PLT
	movq	88(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	88(%rsp), %rdx
	movq	%r15, %rdi
	movq	80(%rsp), %rsi
	movl	$0x00000000, 52(%rsp)
	call	cudaEventElapsedTime@PLT
	movss	12(%rsp), %xmm5
	addss	52(%rsp), %xmm5
	movss	%xmm5, 12(%rsp)
	jmp	.L45
.L60:
	cvtsi2ssq	%r12, %xmm2
	movss	12(%rsp), %xmm6
	xorl	%r13d, %r13d
	xorl	%r12d, %r12d
	leaq	.LC8(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	leaq	52(%rsp), %r15
	divss	%xmm2, %xmm6
	movss	%xmm2, 40(%rsp)
	movss	%xmm6, 44(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC12(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	32(%rsp), %xmm0
	mulsd	.LC13(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC15(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	44(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L48:
	movq	80(%rsp), %rdi
	cmpl	%r13d, %r14d
	je	.L61
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	104(%rsp), %ecx
	movl	116(%rsp), %esi
	xorl	%r9d, %r9d
	movq	96(%rsp), %rdx
	movq	108(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$1024, %ecx
	movq	56(%rsp), %rdi
	call	_Z47__device_stub__Z22matrix_multiply_simplePfS_S_mPfS_S_m
.L49:
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	incl	%r13d
	call	cudaEventRecord@PLT
	movq	88(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	call	cudaDeviceSynchronize@PLT
	movq	88(%rsp), %rdx
	movq	%r15, %rdi
	movq	80(%rsp), %rsi
	movl	$0x00000000, 52(%rsp)
	call	cudaEventElapsedTime@PLT
	movd	%r12d, %xmm7
	addss	52(%rsp), %xmm7
	movd	%xmm7, %r12d
	jmp	.L48
.L61:
	call	cudaEventDestroy@PLT
	movq	88(%rsp), %rdi
	leaq	.LC25(%rip), %r13
	call	cudaEventDestroy@PLT
	leaq	.LC16(%rip), %rsi
	movd	%r12d, %xmm4
	leaq	_ZSt4cout(%rip), %rdi
	divss	40(%rsp), %xmm4
	movd	%xmm4, %r12d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movd	%r12d, %xmm6
	movq	%rax, %rdi
	cvtss2sd	%xmm6, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movss	.LC18(%rip), %xmm3
	movss	44(%rsp), %xmm1
	leaq	.LC21(%rip), %rsi
	movsd	.LC17(%rip), %xmm0
	divsd	32(%rsp), %xmm0
	divsd	.LC6(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm2
	divss	%xmm3, %xmm1
	movss	.LC19(%rip), %xmm0
	movss	%xmm2, 12(%rsp)
	movss	.LC20(%rip), %xmm2
	leaq	_ZSt4cout(%rip), %rdi
	movaps	%xmm0, %xmm4
	divss	%xmm1, %xmm4
	movd	%r12d, %xmm1
	leaq	.LC22(%rip), %r12
	divss	%xmm3, %xmm1
	divss	%xmm2, %xmm4
	divss	%xmm1, %xmm0
	movss	%xmm4, 40(%rsp)
	divss	%xmm2, %xmm0
	movd	%xmm0, %r14d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1024, %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1024, %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC23(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$8, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$8, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC24(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	12(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC26(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	40(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC27(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movd	%r14d, %xmm3
	movq	%rax, %rdi
	cvtss2sd	%xmm3, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC28(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	40(%rsp), %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC29(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movd	%r14d, %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC30(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movd	%r14d, %xmm0
	divss	40(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC31(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4267:
	.size	main, .-main
	.text
	.globl	_Z47__device_stub__Z22matrix_multiply_sharedPfS_S_mPfS_S_m
	.type	_Z47__device_stub__Z22matrix_multiply_sharedPfS_S_mPfS_S_m, @function
_Z47__device_stub__Z22matrix_multiply_sharedPfS_S_mPfS_S_m:
.LFB4294:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L62
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z22matrix_multiply_sharedPfS_S_m(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L62:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L64
	call	__stack_chk_fail@PLT
.L64:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4294:
	.size	_Z47__device_stub__Z22matrix_multiply_sharedPfS_S_mPfS_S_m, .-_Z47__device_stub__Z22matrix_multiply_sharedPfS_S_mPfS_S_m
	.globl	_Z22matrix_multiply_sharedPfS_S_m
	.type	_Z22matrix_multiply_sharedPfS_S_m, @function
_Z22matrix_multiply_sharedPfS_S_m:
.LFB4295:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z22matrix_multiply_sharedPfS_S_mPfS_S_m
	.cfi_endproc
.LFE4295:
	.size	_Z22matrix_multiply_sharedPfS_S_m, .-_Z22matrix_multiply_sharedPfS_S_m
	.section	.rodata.str1.1
.LC32:
	.string	"_Z22matrix_multiply_sharedPfS_S_m"
.LC33:
	.string	"_Z22matrix_multiply_simplePfS_S_m"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4297:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC32(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z22matrix_multiply_sharedPfS_S_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC33(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z22matrix_multiply_simplePfS_S_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4297:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC1:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	-500134854
	.long	1044740494
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC3:
	.long	805306368
	.section	.rodata.cst8
	.align 8
.LC6:
	.long	0
	.long	1104006501
	.align 8
.LC7:
	.long	0
	.long	1070596096
	.align 8
.LC13:
	.long	0
	.long	1083129856
	.align 8
.LC17:
	.long	0
	.long	1105199104
	.section	.rodata.cst4
	.align 4
.LC18:
	.long	1148846080
	.align 4
.LC19:
	.long	1325400064
	.align 4
.LC20:
	.long	1315859240
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdlib.h>
#include <stdio.h>
#include <vector>
#include <math.h>
#include <algorithm>
#include <iostream>
#include <time.h>
#include <unistd.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>


#define TILE_WIDTH 8
#define BLOCK_SIZE 32
// a sequential version of matrix_multiply
void matrix_multiply_seq(float *a, float *b, float *ab, size_t width){
	int i, j, k;
	for(i=0; i<width; i++)
		for(j=0; j<width; j++){
			ab[i*width+j]=0.0;
			for(k=0; k<width; k++){
				ab[i*width+j] += a[i*width+k] * b[k*width+j];
			}
		}
}

// a simple version of matrix_multiply which issues redundant loads from off-chip global memory
__global__ void matrix_multiply_simple(float *a, float *b, float *ab, size_t width){
  // calculate the row & column index of the element
  int row = blockIdx.y*blockDim.y + threadIdx.y;
  int col = blockIdx.x*blockDim.x + threadIdx.x;
  float result = 0;
  // do dot product between row of a and column of b
  for(int k = 0; k < width; ++k){
    result += a[row*width+k] * b[k*width+col];
  }
  // write out this thread's result
  ab[row*width+col] = result;
}

__global__ void matrix_multiply_shared(float *data_a, float *data_b, float *data_output, size_t width){
  // create tiles in shared memrory for the tile multiplication
  __shared__ float shared_A[TILE_WIDTH][TILE_WIDTH];
  __shared__ float shared_B[TILE_WIDTH][TILE_WIDTH];

  // for simplicity assign
  int bx = blockIdx.x; 
  int by = blockIdx.y;
  int tx = threadIdx.x; 
  int ty = threadIdx.y;

  // calculate the row & column index of element in the tile
  int row = by * TILE_WIDTH + ty;
  int col = bx * TILE_WIDTH + tx;
  float result = 0;
  // load the tile data from global memory to shared memory
  // global memory access is reduced by the factor of 1/TILE_WIDTH
  for(int i = 0; i < width/TILE_WIDTH; ++i){
    shared_A[ty][tx] = data_a[row*width + i*TILE_WIDTH + tx];
    shared_B[ty][tx] = data_b[(i*TILE_WIDTH + ty)*width + col];
    // thread barrier. Wait until all the threads have executed.
    // So all the data is loaded to its respective tiles
    __syncthreads();

    // do the multiplication in shared memory 
    // to get sub results for the output matrix
    // multiplication will be performed Matrix Size/TILE_WIDTH
    for(int k = 0; k < TILE_WIDTH; ++k){
      result += shared_A[ty][k] * shared_B[k][tx];
    }
    __syncthreads();
  }
  data_output[row*width + col] = result;
}

// compare two matrix to see if they are equal -- for verification
int matrixEqual(  float *matrixA, float *matrixB, int m, int n ){
  int bad = 0;
  for ( int y = 0; y < m && !bad ; y++ )
    for ( int x = 0; x < n && !bad ; x++ ){
      if ( abs(matrixA[y*n+x] - matrixB[y*n+x]) > 1e-8 ){
        bad++;
      }
    }
  return bad;
}

int main(void){
  // create a large workload so we can easily measure the
  // performance difference of both implementations
  // note that n measures the width of the matrix, not the number of total elements
  const size_t n = 1<<10;
  //const dim3 block_size(TILE_WIDTH,TILE_WIDTH);
  const dim3 block_size(BLOCK_SIZE,BLOCK_SIZE);
  const dim3 num_blocks(n / block_size.x, n / block_size.y);

  // generate random input on the host
	float *h_a, *h_b, *h_s, *h_res;
  //std::vector<float> h_a(n*n), h_b(n*n), h_c(n*n);
	h_a = (float *)malloc(sizeof(float) * n * n);
	h_b = (float *)malloc(sizeof(float) * n * n);
	h_s = (float *)malloc(sizeof(float) * n * n);
	h_res = (float*)malloc(sizeof(float) * n * n);

  for(int i = 0; i < n*n; ++i){
    h_a[i] = static_cast<float>(rand()) / RAND_MAX;
    h_b[i] = static_cast<float>(rand()) / RAND_MAX;
  }

  // allocate storage for the device
  float *d_a = 0, *d_b = 0, *d_c = 0;
  hipMalloc((void**)&d_a, sizeof(float) * n * n);
  hipMalloc((void**)&d_b, sizeof(float) * n * n);
  hipMalloc((void**)&d_c, sizeof(float) * n * n);

  // copy input to the device
  hipMemcpy(d_a, h_a, sizeof(float) * n * n, hipMemcpyHostToDevice);
  hipMemcpy(d_b, h_b, sizeof(float) * n * n, hipMemcpyHostToDevice);

  // time the kernel launches using CUDA events
  hipEvent_t launch_begin, launch_end;
  hipEventCreate(&launch_begin);
  hipEventCreate(&launch_end);
  //time many sequential run and take the average
  size_t num_launches = 4;
  double average_seq_time;
  struct timespec start, end;
  std::cout << "Timing sequential implementation...";
  if( clock_gettime( CLOCK_REALTIME, &start) == -1 ) {
    perror( "clock gettime" );
    exit( EXIT_FAILURE );
  }
  for(int i = 0; i < num_launches; i++){
	  matrix_multiply_seq(h_a, h_b, h_s, n);
  }

  if( clock_gettime( CLOCK_REALTIME, &end) == -1 ) {
	  perror( "clock gettime" );
      exit( EXIT_FAILURE );
  }
  //compute the time in s
  average_seq_time = (end.tv_sec - start.tv_sec) + (double)(end.tv_nsec - start.tv_nsec) / 1e+9;
  //take the average
  average_seq_time /= num_launches;
  std::cout << " done." << std::endl;
  // launch a single "warm-up" kernel
  matrix_multiply_simple<<<num_blocks,block_size>>>(d_a, d_b, d_c, n);
  hipMemcpy(h_res, d_c, sizeof(float)*n*n, hipMemcpyDeviceToHost);
  int equal = matrixEqual(h_res, h_s, n, n);
  if(equal)
	  printf("Verification success.\n");
  else {
	  printf("Verification failed.\n");
	  num_launches = 0;
  }
  // time many kernel launches and take the average time
  float average_simple_time = 0;
  std::cout << "Timing simple implementation...";
  for(int i = 0; i < num_launches; ++i){
    // record a CUDA event immediately before and after the kernel launch
    hipEventRecord(launch_begin,0);
    matrix_multiply_simple<<<num_blocks,block_size>>>(d_a, d_b, d_c, n);
    hipEventRecord(launch_end,0);
    hipEventSynchronize(launch_end);
    // measure the time spent in the kernel
    float time = 0;
    hipEventElapsedTime(&time, launch_begin, launch_end);
    average_simple_time += time;
  }
  average_simple_time /= num_launches;
  std::cout << " done." << std::endl;
  std::cout <<"Average sequential time: " << average_seq_time*1000 << " ms" << std::endl;
  std::cout <<"Average simple time: " << average_simple_time << " ms" << std::endl;

//-------------- Tiled Matrix Multiplication --------------//
    float average_tiled_time = 0;
    // std::cout << "Timing tiled implementation...";
    for(int i = 0; i < num_launches; ++i){
      // record a CUDA event immediately before and after the kernel launch
      hipEventRecord(launch_begin,0);
      matrix_multiply_simple<<<num_blocks,block_size>>>(d_a, d_b, d_c, n);
      hipEventRecord(launch_end,0);
      hipEventSynchronize(launch_end);
      hipDeviceSynchronize();
      // measure the time spent in the kernel
      float time = 0;
      hipEventElapsedTime(&time, launch_begin, launch_end);
      average_tiled_time += time;
    }

  // destroy the CUDA events
  hipEventDestroy(launch_begin);
  hipEventDestroy(launch_end);

  average_tiled_time /= num_launches;
  std::cout <<"Average tiled time: " << average_tiled_time << " ms" << std::endl;

  // report the effective throughput of each kernel in GFLOPS
  // the effective throughput is measured as the number of floating point operations performed per second:
  // (one mul + one add) * N^3
  float num_ops=2 * n * n * n;
  float seq_throughput = num_ops / average_seq_time / 1000000000.0f;
  float simple_throughput = num_ops / (average_simple_time / 1000.0f) / 1000000000.0f;
  float tiled_throughput = num_ops / (average_tiled_time / 1000.0f) / 1000000000.0f;

  std::cout << "\nMatrix size: " << n << "x" << n << std::endl;
  std::cout << "Tile size: " << TILE_WIDTH << "x" << TILE_WIDTH << std::endl;
  std::cout << "\nThroughput of sequential implementation: " << seq_throughput << " GFLOPS" << std::endl;
  std::cout << "Throughput of simple kernel: " << simple_throughput << " GFLOPS" << std::endl;
  std::cout << "Throughput of tiled kernel: " << tiled_throughput << " GFLOPS" << std::endl;
  std::cout << "Performance improvement: simple over sequential " << simple_throughput / seq_throughput << "x" << std::endl;
  std::cout << "Performance improvement: tiled over sequential " << tiled_throughput/seq_throughput << "x" << std::endl;
  std::cout << "Performance improvement: tiled over simple " << tiled_throughput/simple_throughput << "x" << std::endl;
  printf("\n");
  // deallocate device memory
  hipFree(d_a);
  hipFree(d_b);
  hipFree(d_c);
  free(h_a);
  free(h_b);
  free(h_s);
  free(h_res);

  return 0;
}


	.text
	.file	"matrixMultiplication.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z19matrix_multiply_seqPfS_S_m  # -- Begin function _Z19matrix_multiply_seqPfS_S_m
	.type	_Z19matrix_multiply_seqPfS_S_m,@function
_Z19matrix_multiply_seqPfS_S_m:         # @_Z19matrix_multiply_seqPfS_S_m
	.cfi_startproc
# %bb.0:
	testq	%rcx, %rcx
	je	.LBB0_8
# %bb.1:                                # %.preheader.preheader
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	(,%rcx,4), %rax
	xorl	%r8d, %r8d
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_3 Depth 2
                                        #       Child Loop BB0_4 Depth 3
	movq	%r8, %r9
	imulq	%rcx, %r9
	leaq	(%rdx,%r9,4), %r9
	movq	%rsi, %r10
	xorl	%r11d, %r11d
.LBB0_3:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_4 Depth 3
	movl	$0, (%r9,%r11,4)
	xorps	%xmm0, %xmm0
	movq	%r10, %rbx
	xorl	%r14d, %r14d
.LBB0_4:                                #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rdi,%r14,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%rbx), %xmm1
	addss	%xmm1, %xmm0
	movss	%xmm0, (%r9,%r11,4)
	incq	%r14
	addq	%rax, %rbx
	cmpq	%r14, %rcx
	jne	.LBB0_4
# %bb.5:                                #   in Loop: Header=BB0_3 Depth=2
	incq	%r11
	addq	$4, %r10
	cmpq	%rcx, %r11
	jne	.LBB0_3
# %bb.6:                                #   in Loop: Header=BB0_2 Depth=1
	incq	%r8
	addq	%rax, %rdi
	cmpq	%rcx, %r8
	jne	.LBB0_2
# %bb.7:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
.LBB0_8:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z19matrix_multiply_seqPfS_S_m, .Lfunc_end0-_Z19matrix_multiply_seqPfS_S_m
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__matrix_multiply_simplePfS_S_m # -- Begin function _Z37__device_stub__matrix_multiply_simplePfS_S_m
	.type	_Z37__device_stub__matrix_multiply_simplePfS_S_m,@function
_Z37__device_stub__matrix_multiply_simplePfS_S_m: # @_Z37__device_stub__matrix_multiply_simplePfS_S_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22matrix_multiply_simplePfS_S_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z37__device_stub__matrix_multiply_simplePfS_S_m, .Lfunc_end1-_Z37__device_stub__matrix_multiply_simplePfS_S_m
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__matrix_multiply_sharedPfS_S_m # -- Begin function _Z37__device_stub__matrix_multiply_sharedPfS_S_m
	.type	_Z37__device_stub__matrix_multiply_sharedPfS_S_m,@function
_Z37__device_stub__matrix_multiply_sharedPfS_S_m: # @_Z37__device_stub__matrix_multiply_sharedPfS_S_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22matrix_multiply_sharedPfS_S_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z37__device_stub__matrix_multiply_sharedPfS_S_m, .Lfunc_end2-_Z37__device_stub__matrix_multiply_sharedPfS_S_m
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z11matrixEqualPfS_ii
.LCPI3_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI3_1:
	.quad	0x3e45798ee2308c3a              # double 1.0E-8
	.text
	.globl	_Z11matrixEqualPfS_ii
	.type	_Z11matrixEqualPfS_ii,@function
_Z11matrixEqualPfS_ii:                  # @_Z11matrixEqualPfS_ii
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB3_1
# %bb.3:                                # %.preheader.lr.ph
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movslq	%ecx, %r8
	movl	%edx, %edx
	xorl	%r9d, %r9d
	movaps	.LCPI3_0(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movsd	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero
	xorl	%r10d, %r10d
.LBB3_4:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_6 Depth 2
	movl	$0, %eax
	testl	%ecx, %ecx
	jle	.LBB3_8
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB3_4 Depth=1
	movl	%r9d, %r11d
	leaq	(%rsi,%r11,4), %rax
	leaq	(%rdi,%r11,4), %r11
	movl	$1, %ebx
.LBB3_6:                                #   Parent Loop BB3_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	-4(%r11,%rbx,4), %xmm2          # xmm2 = mem[0],zero,zero,zero
	subss	-4(%rax,%rbx,4), %xmm2
	andps	%xmm0, %xmm2
	cvtss2sd	%xmm2, %xmm2
	cmpq	%r8, %rbx
	jge	.LBB3_7
# %bb.11:                               #   in Loop: Header=BB3_6 Depth=2
	incq	%rbx
	ucomisd	%xmm1, %xmm2
	jbe	.LBB3_6
.LBB3_7:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB3_4 Depth=1
	xorl	%eax, %eax
	ucomisd	%xmm1, %xmm2
	seta	%al
.LBB3_8:                                # %._crit_edge
                                        #   in Loop: Header=BB3_4 Depth=1
	incq	%r10
	cmpq	%rdx, %r10
	jae	.LBB3_10
# %bb.9:                                # %._crit_edge
                                        #   in Loop: Header=BB3_4 Depth=1
	addl	%ecx, %r9d
	testl	%eax, %eax
	je	.LBB3_4
.LBB3_10:
	popq	%rbx
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	retq
.LBB3_1:
	xorl	%eax, %eax
	retq
.Lfunc_end3:
	.size	_Z11matrixEqualPfS_ii, .Lfunc_end3-_Z11matrixEqualPfS_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI4_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI4_7:
	.long	0x447a0000                      # float 1000
.LCPI4_8:
	.long	0x4f000000                      # float 2.14748365E+9
.LCPI4_9:
	.long	0x4e6e6b28                      # float 1.0E+9
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI4_1:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI4_2:
	.quad	0x3fd0000000000000              # double 0.25
.LCPI4_4:
	.quad	0x3e45798ee2308c3a              # double 1.0E-8
.LCPI4_5:
	.quad	0x408f400000000000              # double 1000
.LCPI4_6:
	.quad	0x41e0000000000000              # double 2147483648
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI4_3:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r12
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r14
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r15
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	xorl	%ebx, %ebx
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	movss	%xmm0, (%r14,%rbx,4)
	incq	%rbx
	cmpq	$1048576, %rbx                  # imm = 0x100000
	jne	.LBB4_1
# %bb.2:
	xorl	%ebx, %ebx
	leaq	72(%rsp), %rbp
	movq	%rbx, (%rbp)
	leaq	64(%rsp), %r13
	movq	%rbx, (%r13)
	movq	%r12, 96(%rsp)                  # 8-byte Spill
	leaq	56(%rsp), %r12
	movq	%rbx, (%r12)
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%rbp, %rdi
	callq	hipMalloc
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%r13, %rdi
	callq	hipMalloc
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%r12, %rdi
	movq	96(%rsp), %r12                  # 8-byte Reload
	callq	hipMalloc
	movq	(%rbp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %rdi
	callq	hipEventCreate
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	120(%rsp), %rsi
	xorl	%edi, %edi
	callq	clock_gettime
	cmpl	$-1, %eax
	je	.LBB4_31
.LBB4_3:                                # %.preheader.i.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_4 Depth 2
                                        #       Child Loop BB4_5 Depth 3
                                        #         Child Loop BB4_6 Depth 4
	movq	%r12, %rax
	xorl	%ecx, %ecx
.LBB4_4:                                # %.preheader.i
                                        #   Parent Loop BB4_3 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_5 Depth 3
                                        #         Child Loop BB4_6 Depth 4
	movq	%rcx, %rdx
	shlq	$12, %rdx
	addq	%r15, %rdx
	movq	%r14, %rsi
	xorl	%edi, %edi
.LBB4_5:                                #   Parent Loop BB4_3 Depth=1
                                        #     Parent Loop BB4_4 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB4_6 Depth 4
	xorps	%xmm0, %xmm0
	movq	%rsi, %r8
	xorl	%r9d, %r9d
.LBB4_6:                                #   Parent Loop BB4_3 Depth=1
                                        #     Parent Loop BB4_4 Depth=2
                                        #       Parent Loop BB4_5 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movss	(%rax,%r9,4), %xmm1             # xmm1 = mem[0],zero,zero,zero
	mulss	(%r8), %xmm1
	addss	%xmm1, %xmm0
	incq	%r9
	addq	$4096, %r8                      # imm = 0x1000
	cmpq	$1024, %r9                      # imm = 0x400
	jne	.LBB4_6
# %bb.7:                                #   in Loop: Header=BB4_5 Depth=3
	movss	%xmm0, (%rdx,%rdi,4)
	incq	%rdi
	addq	$4, %rsi
	cmpq	$1024, %rdi                     # imm = 0x400
	jne	.LBB4_5
# %bb.8:                                #   in Loop: Header=BB4_4 Depth=2
	incq	%rcx
	addq	$4096, %rax                     # imm = 0x1000
	cmpq	$1024, %rcx                     # imm = 0x400
	jne	.LBB4_4
# %bb.9:                                # %_Z19matrix_multiply_seqPfS_S_m.exit
                                        #   in Loop: Header=BB4_3 Depth=1
	incl	%ebx
	cmpl	$4, %ebx
	jne	.LBB4_3
# %bb.10:
	leaq	104(%rsp), %rsi
	xorl	%edi, %edi
	callq	clock_gettime
	cmpl	$-1, %eax
	je	.LBB4_31
# %bb.11:
	movq	104(%rsp), %rax
	movq	112(%rsp), %rcx
	subq	120(%rsp), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	subq	128(%rsp), %rcx
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rcx, %xmm1
	movabsq	$137438953504, %r13             # imm = 0x2000000020
	divsd	.LCPI4_1(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_13
# %bb.12:
	movq	72(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdx
	movl	$1024, %ecx                     # imm = 0x400
	callq	_Z37__device_stub__matrix_multiply_simplePfS_S_m
.LBB4_13:
	movsd	32(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI4_2(%rip), %xmm0
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	movq	56(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	88(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
	movaps	.LCPI4_3(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movl	$4096, %ecx                     # imm = 0x1000
	movsd	.LCPI4_4(%rip), %xmm1           # xmm1 = mem[0],zero
	movq	%r15, %rsi
.LBB4_14:                               # %.preheader.i86
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_15 Depth 2
	xorl	%edi, %edi
.LBB4_15:                               #   Parent Loop BB4_14 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rbx,%rdi,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	subss	(%rsi,%rdi,4), %xmm2
	andps	%xmm0, %xmm2
	cvtss2sd	%xmm2, %xmm2
	cmpq	$1022, %rdi                     # imm = 0x3FE
	ja	.LBB4_16
# %bb.32:                               #   in Loop: Header=BB4_15 Depth=2
	incq	%rdi
	ucomisd	%xmm1, %xmm2
	jbe	.LBB4_15
.LBB4_16:                               # %._crit_edge.loopexit.i
                                        #   in Loop: Header=BB4_14 Depth=1
	cmpq	$1022, %rax                     # imm = 0x3FE
	ja	.LBB4_18
# %bb.17:                               # %._crit_edge.loopexit.i
                                        #   in Loop: Header=BB4_14 Depth=1
	incq	%rax
	addq	%rcx, %rsi
	addq	%rcx, %rbx
	ucomisd	%xmm1, %xmm2
	jbe	.LBB4_14
.LBB4_18:                               # %_Z11matrixEqualPfS_ii.exit
	movsd	%xmm2, 16(%rsp)                 # 8-byte Spill
	ucomisd	.LCPI4_4(%rip), %xmm2
	jbe	.LBB4_19
# %bb.26:                               # %.lr.ph.preheader
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	movl	$4, %ebx
	leaq	28(%rsp), %rbp
.LBB4_27:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_29
# %bb.28:                               #   in Loop: Header=BB4_27 Depth=1
	movq	72(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdx
	movl	$1024, %ecx                     # imm = 0x400
	callq	_Z37__device_stub__matrix_multiply_simplePfS_S_m
.LBB4_29:                               #   in Loop: Header=BB4_27 Depth=1
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	40(%rsp), %rdi
	callq	hipEventSynchronize
	movl	$0, 28(%rsp)
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	%rbp, %rdi
	callq	hipEventElapsedTime
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	28(%rsp), %xmm0
	decq	%rbx
	jne	.LBB4_27
# %bb.30:
	movl	$4, %ebx
	jmp	.LBB4_20
.LBB4_19:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	xorl	%ebx, %ebx
.LBB4_20:                               # %._crit_edge
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ebx, %xmm1
	movss	%xmm1, 84(%rsp)                 # 4-byte Spill
	divss	%xmm1, %xmm0
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movl	$_ZSt4cout, %r12d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$25, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI4_5(%rip), %xmm0           # xmm0 = mem[0],zero
	mulsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.7, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$21, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.7, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	ucomisd	.LCPI4_4(%rip), %xmm0
	xorpd	%xmm0, %xmm0
	jbe	.LBB4_25
# %bb.21:                               # %.lr.ph109.preheader
	cmpq	$1, %rbx
	adcq	$0, %rbx
	leaq	28(%rsp), %rbp
.LBB4_22:                               # %.lr.ph109
                                        # =>This Inner Loop Header: Depth=1
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_24
# %bb.23:                               #   in Loop: Header=BB4_22 Depth=1
	movq	72(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdx
	movl	$1024, %ecx                     # imm = 0x400
	callq	_Z37__device_stub__matrix_multiply_simplePfS_S_m
.LBB4_24:                               #   in Loop: Header=BB4_22 Depth=1
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	40(%rsp), %rdi
	callq	hipEventSynchronize
	callq	hipDeviceSynchronize
	movl	$0, 28(%rsp)
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	%rbp, %rdi
	callq	hipEventElapsedTime
	movss	16(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	28(%rsp), %xmm0
	decq	%rbx
	jne	.LBB4_22
.LBB4_25:                               # %._crit_edge110
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	movq	48(%rsp), %rdi
	callq	hipEventDestroy
	movq	40(%rsp), %rdi
	callq	hipEventDestroy
	movss	16(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	84(%rsp), %xmm0                 # 4-byte Folded Reload
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	16(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.7, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movsd	.LCPI4_6(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	divsd	.LCPI4_1(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 32(%rsp)                 # 4-byte Spill
	movss	.LCPI4_7(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	12(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	movss	.LCPI4_8(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	movaps	%xmm2, %xmm3
	divss	%xmm1, %xmm3
	movss	.LCPI4_9(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	divss	%xmm1, %xmm3
	movss	%xmm3, 12(%rsp)                 # 4-byte Spill
	movss	16(%rsp), %xmm3                 # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm3
	divss	%xmm3, %xmm2
	divss	%xmm1, %xmm2
	movss	%xmm2, 16(%rsp)                 # 4-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$1024, %esi                     # imm = 0x400
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r12
	movl	$.L.str.11, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$1024, %esi                     # imm = 0x400
	movq	%r12, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.12, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$8, %esi
	callq	_ZNSolsEi
	movq	%rax, %r12
	movl	$.L.str.11, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r12, %rdi
	movl	$8, %esi
	callq	_ZNSolsEi
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$42, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	32(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.14, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.15, %esi
	movl	$29, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.14, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.16, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	16(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.14, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.17, %esi
	movl	$48, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	32(%rsp), %xmm0                 # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.11, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.18, %esi
	movl	$47, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	16(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	32(%rsp), %xmm0                 # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.11, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.19, %esi
	movl	$43, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	16(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	12(%rsp), %xmm0                 # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.11, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$10, %edi
	callq	putchar@PLT
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	96(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	88(%rsp), %rdi                  # 8-byte Reload
	callq	free
	xorl	%eax, %eax
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_31:
	.cfi_def_cfa_offset 192
	movl	$.L.str.1, %edi
	callq	perror
	movl	$1, %edi
	callq	exit
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22matrix_multiply_simplePfS_S_m, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22matrix_multiply_sharedPfS_S_m, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z22matrix_multiply_simplePfS_S_m,@object # @_Z22matrix_multiply_simplePfS_S_m
	.section	.rodata,"a",@progbits
	.globl	_Z22matrix_multiply_simplePfS_S_m
	.p2align	3, 0x0
_Z22matrix_multiply_simplePfS_S_m:
	.quad	_Z37__device_stub__matrix_multiply_simplePfS_S_m
	.size	_Z22matrix_multiply_simplePfS_S_m, 8

	.type	_Z22matrix_multiply_sharedPfS_S_m,@object # @_Z22matrix_multiply_sharedPfS_S_m
	.globl	_Z22matrix_multiply_sharedPfS_S_m
	.p2align	3, 0x0
_Z22matrix_multiply_sharedPfS_S_m:
	.quad	_Z37__device_stub__matrix_multiply_sharedPfS_S_m
	.size	_Z22matrix_multiply_sharedPfS_S_m, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Timing sequential implementation..."
	.size	.L.str, 36

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"clock gettime"
	.size	.L.str.1, 14

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" done."
	.size	.L.str.2, 7

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Timing simple implementation..."
	.size	.L.str.5, 32

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Average sequential time: "
	.size	.L.str.6, 26

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	" ms"
	.size	.L.str.7, 4

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Average simple time: "
	.size	.L.str.8, 22

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Average tiled time: "
	.size	.L.str.9, 21

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"\nMatrix size: "
	.size	.L.str.10, 15

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"x"
	.size	.L.str.11, 2

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Tile size: "
	.size	.L.str.12, 12

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"\nThroughput of sequential implementation: "
	.size	.L.str.13, 43

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	" GFLOPS"
	.size	.L.str.14, 8

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Throughput of simple kernel: "
	.size	.L.str.15, 30

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"Throughput of tiled kernel: "
	.size	.L.str.16, 29

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"Performance improvement: simple over sequential "
	.size	.L.str.17, 49

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"Performance improvement: tiled over sequential "
	.size	.L.str.18, 48

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Performance improvement: tiled over simple "
	.size	.L.str.19, 44

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z22matrix_multiply_simplePfS_S_m"
	.size	.L__unnamed_1, 34

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z22matrix_multiply_sharedPfS_S_m"
	.size	.L__unnamed_2, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Verification failed."
	.size	.Lstr, 21

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Verification success."
	.size	.Lstr.1, 22

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z37__device_stub__matrix_multiply_simplePfS_S_m
	.addrsig_sym _Z37__device_stub__matrix_multiply_sharedPfS_S_m
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z22matrix_multiply_simplePfS_S_m
	.addrsig_sym _Z22matrix_multiply_sharedPfS_S_m
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z22matrix_multiply_simplePfS_S_m ; -- Begin function _Z22matrix_multiply_simplePfS_S_m
	.globl	_Z22matrix_multiply_simplePfS_S_m
	.p2align	8
	.type	_Z22matrix_multiply_simplePfS_S_m,@function
_Z22matrix_multiply_simplePfS_S_m:      ; @_Z22matrix_multiply_simplePfS_S_m
; %bb.0:
	s_clause 0x1
	s_load_b32 s12, s[0:1], 0x2c
	s_load_b256 s[4:11], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s12, 0xffff
	s_cmp_lg_u64 s[10:11], 0
	v_mad_u64_u32 v[1:2], null, s14, s0, v[3:4]
	s_mov_b64 s[0:1], 0
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	s_cbranch_scc0 .LBB0_4
; %bb.1:                                ; %.lr.ph
	s_load_b32 s2, s[2:3], 0xc
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s2, s2, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[5:6], null, s15, s2, v[0:1]
	s_lshl_b64 s[2:3], s[10:11], 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v0, 31, v5
	v_mul_lo_u32 v6, v5, s11
	v_mad_u64_u32 v[3:4], null, v5, s10, 0
	v_mul_lo_u32 v0, v0, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add3_u32 v4, v4, v6, v0
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_mov_b32_e32 v0, 0
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v9, v[7:8], off
	global_load_b32 v10, v[5:6], off
	s_add_u32 s0, s0, 1
	v_add_co_u32 v5, vcc_lo, v5, s2
	s_addc_u32 s1, s1, 0
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	v_cmp_ge_u64_e64 s4, s[0:1], s[10:11]
	v_add_co_u32 v7, vcc_lo, v7, 4
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 vcc_lo, exec_lo, s4
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v0, v9, v10
	s_cbranch_vccz .LBB0_2
; %bb.3:                                ; %Flow
	s_mov_b32 s0, 0
	s_branch .LBB0_5
.LBB0_4:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr3_vgpr4
.LBB0_5:                                ; %Flow42
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB0_7
; %bb.6:                                ; %.._crit_edge_crit_edge
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v0, 0
	v_mov_b32_e32 v4, 0
.LBB0_7:                                ; %._crit_edge
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s8, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	v_add_co_u32 v1, vcc_lo, v3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22matrix_multiply_simplePfS_S_m
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z22matrix_multiply_simplePfS_S_m, .Lfunc_end0-_Z22matrix_multiply_simplePfS_S_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 396
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z22matrix_multiply_sharedPfS_S_m ; -- Begin function _Z22matrix_multiply_sharedPfS_S_m
	.globl	_Z22matrix_multiply_sharedPfS_S_m
	.p2align	8
	.type	_Z22matrix_multiply_sharedPfS_S_m,@function
_Z22matrix_multiply_sharedPfS_S_m:      ; @_Z22matrix_multiply_sharedPfS_S_m
; %bb.0:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_bfe_u32 v5, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v3, s15, 3, v5
	v_lshl_add_u32 v0, s14, 3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v3
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v6, v1, s6
	v_mul_lo_u32 v7, v3, s7
	v_mad_u64_u32 v[1:2], null, v3, s6, 0
	v_cmp_gt_u64_e64 s8, s[6:7], 7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s8
	v_add3_u32 v2, v2, v7, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_ashrrev_i32_e32 v1, 31, v0
	s_cbranch_vccz .LBB1_6
; %bb.1:                                ; %.lr.ph
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s0, v2
	v_lshlrev_b32_e32 v10, 2, v4
	v_lshlrev_b32_e32 v6, 5, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v3, vcc_lo
	v_lshlrev_b64 v[11:12], 2, v[0:1]
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v9, v6, v10
	v_add_co_u32 v7, vcc_lo, v7, v10
	v_add_nc_u32_e32 v10, 0x100, v10
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	v_add_co_u32 v11, vcc_lo, s2, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v13, v10, v6
	s_mov_b32 s1, 0
	s_lshr_b64 s[2:3], s[6:7], 3
	s_mov_b32 s8, s1
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s0, s8, 3
	v_add_nc_u32_e32 v18, s0, v5
	s_lshl_b64 s[10:11], s[0:1], 2
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[14:15], null, v18, s6, 0
	v_mad_u64_u32 v[16:17], null, v18, s7, v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v15, v16
	v_add_co_u32 v16, vcc_lo, v7, s10
	v_add_co_ci_u32_e32 v17, vcc_lo, s11, v8, vcc_lo
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, v11, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, v12, v15, vcc_lo
	global_load_b32 v16, v[16:17], off
	global_load_b32 v15, v[14:15], off
	v_mov_b32_e32 v14, v10
	s_waitcnt vmcnt(1)
	ds_store_b32 v9, v16
	s_waitcnt vmcnt(0)
	ds_store_b32 v13, v15
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_3:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v15, s0, v6
	s_add_i32 s0, s0, 4
	ds_load_b32 v16, v14
	ds_load_b32 v15, v15
	v_add_nc_u32_e32 v14, 32, v14
	s_cmp_eq_u32 s0, 32
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v4, v15, v16
	s_cbranch_scc0 .LBB1_3
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s8, s8, 1
	s_mov_b32 s9, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_le_u64_e64 s0, s[2:3], s[8:9]
	s_barrier
	buffer_gl0_inv
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB1_2
; %bb.5:                                ; %Flow
	s_mov_b32 s0, 0
	s_branch .LBB1_7
.LBB1_6:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr4
.LBB1_7:                                ; %Flow62
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB1_9
; %bb.8:                                ; %.._crit_edge_crit_edge
	v_mov_b32_e32 v4, 0
.LBB1_9:                                ; %._crit_edge
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v3, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22matrix_multiply_sharedPfS_S_m
		.amdhsa_group_segment_fixed_size 512
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z22matrix_multiply_sharedPfS_S_m, .Lfunc_end1-_Z22matrix_multiply_sharedPfS_S_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 528
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 512 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z22matrix_multiply_simplePfS_S_m
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z22matrix_multiply_simplePfS_S_m.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
    .group_segment_fixed_size: 512
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z22matrix_multiply_sharedPfS_S_m
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z22matrix_multiply_sharedPfS_S_m.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
