#include <stdio.h>
#include <assert.h>

#define N 100000
#define tb 512	// tamaño bloque

__global__ void VecAdd(int* D)
{
	int ii = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;

	for (int i=ii; i<N; i+=stride){
    D[2*N + i] = D[i] + D[N + i];
  }
}

cudaError_t testCuErr(cudaError_t result)
{
  if (result != cudaSuccess) {
    printf("CUDA Runtime Error: %s\n", cudaGetErrorString(result));
    assert(result == cudaSuccess);	// si no se cumple, se aborta el programa
  }
  return result;
}

int main()
{ cudaFree(0);
  int *H,*D;
  int i, dg; int size = 3*N*sizeof(int);
  
  H = (int*)malloc(size);
  
  // reservamos espacio en la memoria global del device
  testCuErr(cudaMallocHost((void**)&D, size));
     
  // inicializamos HA y HB
  for (i=0; i<3*N; i++) {
    if(i < N){
      H[i] = -i;
    }else if((i < 2*N) && (i > N-1)){
      H[i] = 3*i;
    }
  }

  testCuErr(cudaMemcpy(D, H, size, cudaMemcpyHostToDevice));

      
  dg = (N+tb-1)/tb; if (dg>65535) dg=65535;
  // llamamos al kernel
  VecAdd <<<dg, tb>>>(D);	// N o más hilos ejecutan el kernel en paralelo
  testCuErr(cudaGetLastError());
  
  testCuErr(cudaMemcpy(H, D, size, cudaMemcpyDeviceToHost));

    
  // liberamos la memoria reservada en el device
  testCuErr(cudaFreeHost(D));
  
  // una vez que tenemos los resultados en el host, comprobamos que son correctos
  for (i = 0; i < N; i++){// printf("%d + %d = %d\n",HA[i],HB[i],HC[i]);
    //printf("%d = %d + %d\n",H[2*N + i],H[i],H[N + i]);
    if (H[2*N + i] != (H[i] + H[N + i])){
		printf("error en componente %d\n", i);}
  }

  free(H);
  return 0;
} 

	.file	"tmpxft_00207141_00000000-6_suma-vect-u-pinned.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA Runtime Error: %s\n"
	.text
	.globl	_Z9testCuErr9cudaError
	.type	_Z9testCuErr9cudaError, @function
_Z9testCuErr9cudaError:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%edi, %ebx
	testl	%edi, %edi
	je	.L3
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L3:
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z9testCuErr9cudaError, .-_Z9testCuErr9cudaError
	.globl	_Z25__device_stub__Z6VecAddPiPi
	.type	_Z25__device_stub__Z6VecAddPiPi, @function
_Z25__device_stub__Z6VecAddPiPi:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z6VecAddPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L9:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z25__device_stub__Z6VecAddPiPi, .-_Z25__device_stub__Z6VecAddPiPi
	.globl	_Z6VecAddPi
	.type	_Z6VecAddPi, @function
_Z6VecAddPi:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z6VecAddPiPi
	.cfi_endproc
.LFE2054:
	.size	_Z6VecAddPi, .-_Z6VecAddPi
	.section	.rodata.str1.1
.LC1:
	.string	"error en componente %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%edi, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	cudaFree@PLT
	movl	$1200000, %edi
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$1200000, %esi
	movq	%rax, %rbx
	call	cudaMallocHost@PLT
	movl	%eax, %edi
	call	_Z9testCuErr9cudaError
	xorl	%eax, %eax
.L19:
	cmpq	$99999, %rax
	leaq	1(%rax), %rdx
	ja	.L15
	movl	%eax, %ecx
	negl	%ecx
	jmp	.L26
.L15:
	leal	-100000(%rax), %ecx
	cmpl	$99999, %ecx
	ja	.L17
	leal	(%rax,%rax,2), %ecx
.L26:
	movl	%ecx, (%rbx,%rax,4)
	movq	%rdx, %rax
	jmp	.L19
.L17:
	movq	%rdx, %rax
	cmpq	$300000, %rdx
	jne	.L19
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$1200000, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z9testCuErr9cudaError
	movl	$8388609, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1073741873, %edi
	salq	$9, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$2, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	8(%rsp), %rdi
	call	_Z25__device_stub__Z6VecAddPiPi
.L20:
	call	cudaGetLastError@PLT
	xorl	%ebp, %ebp
	leaq	.LC1(%rip), %r12
	movl	%eax, %edi
	call	_Z9testCuErr9cudaError
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$1200000, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z9testCuErr9cudaError
	movq	8(%rsp), %rdi
	call	cudaFreeHost@PLT
	movl	%eax, %edi
	call	_Z9testCuErr9cudaError
.L22:
	movl	400000(%rbx,%rbp,4), %eax
	addl	(%rbx,%rbp,4), %eax
	cmpl	%eax, 800000(%rbx,%rbp,4)
	je	.L21
	movl	%ebp, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L21:
	incq	%rbp
	cmpq	$100000, %rbp
	jne	.L22
	movq	%rbx, %rdi
	call	free@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z6VecAddPi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6VecAddPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <assert.h>

#define N 100000
#define tb 512	// tamaño bloque

__global__ void VecAdd(int* D)
{
	int ii = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;

	for (int i=ii; i<N; i+=stride){
    D[2*N + i] = D[i] + D[N + i];
  }
}

hipError_t testCuErr(hipError_t result)
{
  if (result != hipSuccess) {
    printf("CUDA Runtime Error: %s\n", hipGetErrorString(result));
    assert(result == hipSuccess);	// si no se cumple, se aborta el programa
  }
  return result;
}

int main()
{ hipFree(0);
  int *H,*D;
  int i, dg; int size = 3*N*sizeof(int);
  
  H = (int*)malloc(size);
  
  // reservamos espacio en la memoria global del device
  testCuErr(hipHostMalloc((void**)&D, size, hipHostMallocDefault));
     
  // inicializamos HA y HB
  for (i=0; i<3*N; i++) {
    if(i < N){
      H[i] = -i;
    }else if((i < 2*N) && (i > N-1)){
      H[i] = 3*i;
    }
  }

  testCuErr(hipMemcpy(D, H, size, hipMemcpyHostToDevice));

      
  dg = (N+tb-1)/tb; if (dg>65535) dg=65535;
  // llamamos al kernel
  VecAdd <<<dg, tb>>>(D);	// N o más hilos ejecutan el kernel en paralelo
  testCuErr(hipGetLastError());
  
  testCuErr(hipMemcpy(H, D, size, hipMemcpyDeviceToHost));

    
  // liberamos la memoria reservada en el device
  testCuErr(hipHostFree(D));
  
  // una vez que tenemos los resultados en el host, comprobamos que son correctos
  for (i = 0; i < N; i++){// printf("%d + %d = %d\n",HA[i],HB[i],HC[i]);
    //printf("%d = %d + %d\n",H[2*N + i],H[i],H[N + i]);
    if (H[2*N + i] != (H[i] + H[N + i])){
		printf("error en componente %d\n", i);}
  }

  free(H);
  return 0;
} 

	.text
	.file	"suma-vect-u-pinned.hip"
	.globl	_Z21__device_stub__VecAddPi     # -- Begin function _Z21__device_stub__VecAddPi
	.type	_Z21__device_stub__VecAddPi,@function
_Z21__device_stub__VecAddPi:            # @_Z21__device_stub__VecAddPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6VecAddPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__VecAddPi, .Lfunc_end0-_Z21__device_stub__VecAddPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z9testCuErr10hipError_t        # -- Begin function _Z9testCuErr10hipError_t
	.type	_Z9testCuErr10hipError_t,@function
_Z9testCuErr10hipError_t:               # @_Z9testCuErr10hipError_t
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%edi, %ebx
	testl	%edi, %edi
	je	.LBB1_2
# %bb.1:
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB1_2:
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z9testCuErr10hipError_t, .Lfunc_end1-_Z9testCuErr10hipError_t
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	xorl	%r14d, %r14d
	xorl	%edi, %edi
	callq	hipFree
	movl	$1200000, %edi                  # imm = 0x124F80
	callq	malloc
	movq	%rax, %rbx
	movq	%rsp, %rdi
	movl	$1200000, %esi                  # imm = 0x124F80
	xorl	%edx, %edx
	callq	hipHostMalloc
	movl	%eax, %edi
	callq	_Z9testCuErr10hipError_t
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	cmpq	$99999, %rcx                    # imm = 0x1869F
	ja	.LBB2_3
# %bb.2:                                #   in Loop: Header=BB2_1 Depth=1
	movl	%eax, (%rbx,%rcx,4)
	jmp	.LBB2_5
.LBB2_3:                                #   in Loop: Header=BB2_1 Depth=1
	cmpq	$199999, %rcx                   # imm = 0x30D3F
	ja	.LBB2_5
# %bb.4:                                #   in Loop: Header=BB2_1 Depth=1
	movl	%r14d, (%rbx,%rcx,4)
.LBB2_5:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%rcx
	decl	%eax
	addl	$3, %r14d
	cmpq	$300000, %rcx                   # imm = 0x493E0
	jne	.LBB2_1
# %bb.6:
	movq	(%rsp), %rdi
	movl	$1200000, %edx                  # imm = 0x124F80
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_Z9testCuErr10hipError_t
	movabsq	$4294967492, %rdi               # imm = 0x1000000C4
	leaq	316(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.7:
	movq	(%rsp), %rdi
	callq	_Z21__device_stub__VecAddPi
.LBB2_8:
	callq	hipGetLastError
	movl	%eax, %edi
	callq	_Z9testCuErr10hipError_t
	movq	(%rsp), %rsi
	movl	$1200000, %edx                  # imm = 0x124F80
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_Z9testCuErr10hipError_t
	movq	(%rsp), %rdi
	callq	hipHostFree
	movl	%eax, %edi
	callq	_Z9testCuErr10hipError_t
	xorl	%r14d, %r14d
.LBB2_9:                                # =>This Inner Loop Header: Depth=1
	movl	400000(%rbx,%r14,4), %eax
	addl	(%rbx,%r14,4), %eax
	cmpl	%eax, 800000(%rbx,%r14,4)
	je	.LBB2_11
# %bb.10:                               #   in Loop: Header=BB2_9 Depth=1
	movl	$.L.str.1, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
.LBB2_11:                               #   in Loop: Header=BB2_9 Depth=1
	incq	%r14
	cmpq	$100000, %r14                   # imm = 0x186A0
	jne	.LBB2_9
# %bb.12:
	movq	%rbx, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6VecAddPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6VecAddPi,@object             # @_Z6VecAddPi
	.section	.rodata,"a",@progbits
	.globl	_Z6VecAddPi
	.p2align	3, 0x0
_Z6VecAddPi:
	.quad	_Z21__device_stub__VecAddPi
	.size	_Z6VecAddPi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA Runtime Error: %s\n"
	.size	.L.str, 24

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"error en componente %d\n"
	.size	.L.str.1, 24

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6VecAddPi"
	.size	.L__unnamed_1, 12

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__VecAddPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6VecAddPi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6VecAddPi             ; -- Begin function _Z6VecAddPi
	.globl	_Z6VecAddPi
	.p2align	8
	.type	_Z6VecAddPi,@function
_Z6VecAddPi:                            ; @_Z6VecAddPi
; %bb.0:
	s_load_b32 s4, s[0:1], 0x14
	s_add_u32 s2, s0, 8
	s_addc_u32 s3, s1, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmpx_gt_i32_e32 0x186a0, v1
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s2, s[2:3], 0x0
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s4
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_ashr_i32 s3, s2, 31
	s_mov_b32 s1, 0
	s_lshl_b64 s[4:5], s[2:3], 2
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v4, vcc_lo, 0x61000, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v3, vcc_lo
	v_add_nc_u32_e32 v1, s2, v1
	s_clause 0x1
	global_load_b32 v0, v[2:3], off
	global_load_b32 v6, v[4:5], off offset:2688
	v_add_co_u32 v4, vcc_lo, 0xc3000, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v3, vcc_lo
	v_cmp_lt_i32_e32 vcc_lo, 0x1869f, v1
	v_add_co_u32 v2, s0, v2, s4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v6, v0
	global_store_b32 v[4:5], v0, off offset:1280
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow15
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6VecAddPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6VecAddPi, .Lfunc_end0-_Z6VecAddPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6VecAddPi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6VecAddPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
