/* Copyright (c) 1993-2015, NVIDIA CORPORATION. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *  * Neither the name of NVIDIA CORPORATION nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <stdio.h>
#include <assert.h>

// Convenience function for checking CUDA runtime API results
// can be wrapped around any runtime API call. No-op in release builds.
inline
cudaError_t checkCuda(cudaError_t result)
{
#if defined(DEBUG) || defined(_DEBUG)
  if (result != cudaSuccess) {
    fprintf(stderr, "CUDA Runtime Error: %s\n", cudaGetErrorString(result));
    assert(result == cudaSuccess);
  }
#endif
  return result;
}

const int TILE_DIM = 32;
const int BLOCK_ROWS = 8;
const int NUM_REPS = 100;

// Check errors and print GB/s
void postprocess(const float *ref, const float *res, int n, float ms)
{
  bool passed = true;
  for (int i = 0; i < n; i++)
    if (res[i] != ref[i]) {
      printf("%d %f %f\n", i, res[i], ref[i]);
      printf("%25s\n", "*** FAILED ***");
      passed = false;
      break;
    }
  if (passed)
    printf("%20.2f\n", 2 * n * sizeof(float) * 1e-6 * NUM_REPS / ms );
}

// simple copy kernel
// Used as reference case representing best effective bandwidth.
__global__ void copy(float *odata, const float *idata)
{
  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = gridDim.x * TILE_DIM;

  for (int j = 0; j < TILE_DIM; j+= BLOCK_ROWS)
    odata[(y+j)*width + x] = idata[(y+j)*width + x];
}

// copy kernel using shared memory
// Also used as reference case, demonstrating effect of using shared memory.
__global__ void copySharedMem(float *odata, const float *idata)
{
  __shared__ float tile[TILE_DIM * TILE_DIM];
  
  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = gridDim.x * TILE_DIM;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS)
     tile[(threadIdx.y+j)*TILE_DIM + threadIdx.x] = idata[(y+j)*width + x];

  __syncthreads();

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS)
     odata[(y+j)*width + x] = tile[(threadIdx.y+j)*TILE_DIM + threadIdx.x];          
}

// naive transpose
// Simplest transpose; doesn't use shared memory.
// Global memory reads are coalesced but writes are not.
__global__ void transposeNaive(float *odata, const float *idata)
{
  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = gridDim.x * TILE_DIM;

  for (int j = 0; j < TILE_DIM; j+= BLOCK_ROWS)
    odata[x*width + (y+j)] = idata[(y+j)*width + x];
}

// coalesced transpose
// Uses shared memory to achieve coalesing in both reads and writes
// Tile width == #banks causes shared memory bank conflicts.
__global__ void transposeCoalesced(float *odata, const float *idata)
{
  __shared__ float tile[TILE_DIM][TILE_DIM];
    
  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = gridDim.x * TILE_DIM;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS)
     tile[threadIdx.y+j][threadIdx.x] = idata[(y+j)*width + x];

  __syncthreads();

  x = blockIdx.y * TILE_DIM + threadIdx.x;  // transpose block offset
  y = blockIdx.x * TILE_DIM + threadIdx.y;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS)
     odata[(y+j)*width + x] = tile[threadIdx.x][threadIdx.y + j];
}
   

// No bank-conflict transpose
// Same as transposeCoalesced except the first tile dimension is padded 
// to avoid shared memory bank conflicts.
__global__ void transposeNoBankConflicts(float *odata, const float *idata)
{
  __shared__ float tile[TILE_DIM][TILE_DIM+1];
    
  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = gridDim.x * TILE_DIM;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS)
     tile[threadIdx.y+j][threadIdx.x] = idata[(y+j)*width + x];

  __syncthreads();

  x = blockIdx.y * TILE_DIM + threadIdx.x;  // transpose block offset
  y = blockIdx.x * TILE_DIM + threadIdx.y;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS)
     odata[(y+j)*width + x] = tile[threadIdx.x][threadIdx.y + j];
}

int main(int argc, char **argv)
{
  const int nx = 1024;
  const int ny = 1024;
  const int mem_size = nx*ny*sizeof(float);

  dim3 dimGrid(nx/TILE_DIM, ny/TILE_DIM, 1);
  dim3 dimBlock(TILE_DIM, BLOCK_ROWS, 1);

  int devId = 0;
  if (argc > 1) devId = atoi(argv[1]);

  cudaDeviceProp prop;
  checkCuda( cudaGetDeviceProperties(&prop, devId));
  printf("\nDevice : %s\n", prop.name);
  printf("Matrix size: %d %d, Block size: %d %d, Tile size: %d %d\n", 
         nx, ny, TILE_DIM, BLOCK_ROWS, TILE_DIM, TILE_DIM);
  printf("dimGrid: %d %d %d. dimBlock: %d %d %d\n",
         dimGrid.x, dimGrid.y, dimGrid.z, dimBlock.x, dimBlock.y, dimBlock.z);
  
  checkCuda( cudaSetDevice(devId) );

  float *h_idata = (float*)malloc(mem_size);
  float *h_cdata = (float*)malloc(mem_size);
  float *h_tdata = (float*)malloc(mem_size);
  float *gold    = (float*)malloc(mem_size);
  
  float *d_idata, *d_cdata, *d_tdata;
  checkCuda( cudaMalloc(&d_idata, mem_size) );
  checkCuda( cudaMalloc(&d_cdata, mem_size) );
  checkCuda( cudaMalloc(&d_tdata, mem_size) );

  // check parameters and calculate execution configuration
  if (nx % TILE_DIM || ny % TILE_DIM) {
    printf("nx and ny must be a multiple of TILE_DIM\n");
    goto error_exit;
  }

  if (TILE_DIM % BLOCK_ROWS) {
    printf("TILE_DIM must be a multiple of BLOCK_ROWS\n");
    goto error_exit;
  }
    
  // host
  for (int j = 0; j < ny; j++)
    for (int i = 0; i < nx; i++)
      h_idata[j*nx + i] = j*nx + i;

  // correct result for error checking
  for (int j = 0; j < ny; j++)
    for (int i = 0; i < nx; i++)
      gold[j*nx + i] = h_idata[i*nx + j];
  
  // device
  checkCuda( cudaMemcpy(d_idata, h_idata, mem_size, cudaMemcpyHostToDevice) );
  
  // events for timing
  cudaEvent_t startEvent, stopEvent;
  checkCuda( cudaEventCreate(&startEvent) );
  checkCuda( cudaEventCreate(&stopEvent) );
  float ms;

  // ------------
  // time kernels
  // ------------
  printf("%25s%25s\n", "Routine", "Bandwidth (GB/s)");
  
  // ----
  // copy 
  // ----
  printf("%25s", "copy");
  checkCuda( cudaMemset(d_cdata, 0, mem_size) );
  // warm up
  copy<<<dimGrid, dimBlock>>>(d_cdata, d_idata);
  checkCuda( cudaEventRecord(startEvent, 0) );
  for (int i = 0; i < NUM_REPS; i++)
     copy<<<dimGrid, dimBlock>>>(d_cdata, d_idata);
  checkCuda( cudaEventRecord(stopEvent, 0) );
  checkCuda( cudaEventSynchronize(stopEvent) );
  checkCuda( cudaEventElapsedTime(&ms, startEvent, stopEvent) );
  checkCuda( cudaMemcpy(h_cdata, d_cdata, mem_size, cudaMemcpyDeviceToHost) );
  postprocess(h_idata, h_cdata, nx*ny, ms);

  // -------------
  // copySharedMem 
  // -------------
  printf("%25s", "shared memory copy");
  checkCuda( cudaMemset(d_cdata, 0, mem_size) );
  // warm up
  copySharedMem<<<dimGrid, dimBlock>>>(d_cdata, d_idata);
  checkCuda( cudaEventRecord(startEvent, 0) );
  for (int i = 0; i < NUM_REPS; i++)
     copySharedMem<<<dimGrid, dimBlock>>>(d_cdata, d_idata);
  checkCuda( cudaEventRecord(stopEvent, 0) );
  checkCuda( cudaEventSynchronize(stopEvent) );
  checkCuda( cudaEventElapsedTime(&ms, startEvent, stopEvent) );
  checkCuda( cudaMemcpy(h_cdata, d_cdata, mem_size, cudaMemcpyDeviceToHost) );
  postprocess(h_idata, h_cdata, nx * ny, ms);

  // --------------
  // transposeNaive 
  // --------------
  printf("%25s", "naive transpose");
  checkCuda( cudaMemset(d_tdata, 0, mem_size) );
  // warmup
  transposeNaive<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
  checkCuda( cudaEventRecord(startEvent, 0) );
  for (int i = 0; i < NUM_REPS; i++)
     transposeNaive<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
  checkCuda( cudaEventRecord(stopEvent, 0) );
  checkCuda( cudaEventSynchronize(stopEvent) );
  checkCuda( cudaEventElapsedTime(&ms, startEvent, stopEvent) );
  checkCuda( cudaMemcpy(h_tdata, d_tdata, mem_size, cudaMemcpyDeviceToHost) );
  postprocess(gold, h_tdata, nx * ny, ms);

  // ------------------
  // transposeCoalesced 
  // ------------------
  printf("%25s", "coalesced transpose");
  checkCuda( cudaMemset(d_tdata, 0, mem_size) );
  // warmup
  transposeCoalesced<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
  checkCuda( cudaEventRecord(startEvent, 0) );
  for (int i = 0; i < NUM_REPS; i++)
     transposeCoalesced<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
  checkCuda( cudaEventRecord(stopEvent, 0) );
  checkCuda( cudaEventSynchronize(stopEvent) );
  checkCuda( cudaEventElapsedTime(&ms, startEvent, stopEvent) );
  checkCuda( cudaMemcpy(h_tdata, d_tdata, mem_size, cudaMemcpyDeviceToHost) );
  postprocess(gold, h_tdata, nx * ny, ms);

  // ------------------------
  // transposeNoBankConflicts
  // ------------------------
  printf("%25s", "conflict-free transpose");
  checkCuda( cudaMemset(d_tdata, 0, mem_size) );
  // warmup
  transposeNoBankConflicts<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
  checkCuda( cudaEventRecord(startEvent, 0) );
  for (int i = 0; i < NUM_REPS; i++)
     transposeNoBankConflicts<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
  checkCuda( cudaEventRecord(stopEvent, 0) );
  checkCuda( cudaEventSynchronize(stopEvent) );
  checkCuda( cudaEventElapsedTime(&ms, startEvent, stopEvent) );
  checkCuda( cudaMemcpy(h_tdata, d_tdata, mem_size, cudaMemcpyDeviceToHost) );
  postprocess(gold, h_tdata, nx * ny, ms);

error_exit:
  // cleanup
  checkCuda( cudaEventDestroy(startEvent) );
  checkCuda( cudaEventDestroy(stopEvent) );
  checkCuda( cudaFree(d_tdata) );
  checkCuda( cudaFree(d_cdata) );
  checkCuda( cudaFree(d_idata) );
  free(h_idata);
  free(h_tdata);
  free(h_cdata);
  free(gold);
}

	.file	"tmpxft_0021e324_00000000-6_transpose.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d %f %f\n"
.LC1:
	.string	"*** FAILED ***"
.LC2:
	.string	"%25s\n"
.LC5:
	.string	"%20.2f\n"
	.text
	.globl	_Z11postprocessPKfS0_if
	.type	_Z11postprocessPKfS0_if, @function
_Z11postprocessPKfS0_if:
.LFB2028:
	.cfi_startproc
	endbr64
	movaps	%xmm0, %xmm2
	xorl	%eax, %eax
.L3:
	cmpl	%eax, %edx
	jle	.L13
	leaq	1(%rax), %rcx
	movss	(%rsi,%rax,4), %xmm0
	movss	-4(%rdi,%rcx,4), %xmm1
	ucomiss	%xmm1, %xmm0
	jp	.L9
	je	.L8
.L9:
	pushq	%rdx
	.cfi_def_cfa_offset 16
	movl	$2, %edi
	movl	%eax, %edx
	movb	$2, %al
	leaq	.LC0(%rip), %rsi
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	jmp	__printf_chk@PLT
.L8:
	movq	%rcx, %rax
	jmp	.L3
.L13:
	addl	%edx, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	js	.L6
	cvtsi2sdq	%rdx, %xmm1
	jmp	.L7
.L6:
	shrq	%rdx
	cvtsi2sdq	%rdx, %xmm1
	addsd	%xmm1, %xmm1
.L7:
	mulsd	.LC3(%rip), %xmm1
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	mulsd	.LC4(%rip), %xmm1
	movaps	%xmm1, %xmm0
	cvtss2sd	%xmm2, %xmm1
	divsd	%xmm1, %xmm0
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z11postprocessPKfS0_if, .-_Z11postprocessPKfS0_if
	.globl	_Z26__device_stub__Z4copyPfPKfPfPKf
	.type	_Z26__device_stub__Z4copyPfPKfPfPKf, @function
_Z26__device_stub__Z4copyPfPKfPfPKf:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z4copyPfPKf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L14:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z26__device_stub__Z4copyPfPKfPfPKf, .-_Z26__device_stub__Z4copyPfPKfPfPKf
	.globl	_Z4copyPfPKf
	.type	_Z4copyPfPKf, @function
_Z4copyPfPKf:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z4copyPfPKfPfPKf
	.cfi_endproc
.LFE2055:
	.size	_Z4copyPfPKf, .-_Z4copyPfPKf
	.globl	_Z36__device_stub__Z13copySharedMemPfPKfPfPKf
	.type	_Z36__device_stub__Z13copySharedMemPfPKfPfPKf, @function
_Z36__device_stub__Z13copySharedMemPfPKfPfPKf:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z13copySharedMemPfPKf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L19:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z36__device_stub__Z13copySharedMemPfPKfPfPKf, .-_Z36__device_stub__Z13copySharedMemPfPKfPfPKf
	.globl	_Z13copySharedMemPfPKf
	.type	_Z13copySharedMemPfPKf, @function
_Z13copySharedMemPfPKf:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z13copySharedMemPfPKfPfPKf
	.cfi_endproc
.LFE2057:
	.size	_Z13copySharedMemPfPKf, .-_Z13copySharedMemPfPKf
	.globl	_Z37__device_stub__Z14transposeNaivePfPKfPfPKf
	.type	_Z37__device_stub__Z14transposeNaivePfPKfPfPKf, @function
_Z37__device_stub__Z14transposeNaivePfPKfPfPKf:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14transposeNaivePfPKf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L24:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z37__device_stub__Z14transposeNaivePfPKfPfPKf, .-_Z37__device_stub__Z14transposeNaivePfPKfPfPKf
	.globl	_Z14transposeNaivePfPKf
	.type	_Z14transposeNaivePfPKf, @function
_Z14transposeNaivePfPKf:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z14transposeNaivePfPKfPfPKf
	.cfi_endproc
.LFE2059:
	.size	_Z14transposeNaivePfPKf, .-_Z14transposeNaivePfPKf
	.globl	_Z41__device_stub__Z18transposeCoalescedPfPKfPfPKf
	.type	_Z41__device_stub__Z18transposeCoalescedPfPKfPfPKf, @function
_Z41__device_stub__Z18transposeCoalescedPfPKfPfPKf:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18transposeCoalescedPfPKf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L29:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z41__device_stub__Z18transposeCoalescedPfPKfPfPKf, .-_Z41__device_stub__Z18transposeCoalescedPfPKfPfPKf
	.globl	_Z18transposeCoalescedPfPKf
	.type	_Z18transposeCoalescedPfPKf, @function
_Z18transposeCoalescedPfPKf:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z18transposeCoalescedPfPKfPfPKf
	.cfi_endproc
.LFE2061:
	.size	_Z18transposeCoalescedPfPKf, .-_Z18transposeCoalescedPfPKf
	.globl	_Z47__device_stub__Z24transposeNoBankConflictsPfPKfPfPKf
	.type	_Z47__device_stub__Z24transposeNoBankConflictsPfPKfPfPKf, @function
_Z47__device_stub__Z24transposeNoBankConflictsPfPKfPfPKf:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z24transposeNoBankConflictsPfPKf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L34:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z47__device_stub__Z24transposeNoBankConflictsPfPKfPfPKf, .-_Z47__device_stub__Z24transposeNoBankConflictsPfPKfPfPKf
	.globl	_Z24transposeNoBankConflictsPfPKf
	.type	_Z24transposeNoBankConflictsPfPKf, @function
_Z24transposeNoBankConflictsPfPKf:
.LFB2063:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z24transposeNoBankConflictsPfPKfPfPKf
	.cfi_endproc
.LFE2063:
	.size	_Z24transposeNoBankConflictsPfPKf, .-_Z24transposeNoBankConflictsPfPKf
	.section	.rodata.str1.1
.LC6:
	.string	"\nDevice : %s\n"
.LC7:
	.string	"Matrix size: %d %d, Block size: %d %d, Tile size: %d %d\n"
.LC8:
	.string	"dimGrid: %d %d %d. dimBlock: %d %d %d\n"
.LC9:
	.string	"Bandwidth (GB/s)"
.LC10:
	.string	"Routine"
.LC11:
	.string	"%25s%25s\n"
.LC12:
	.string	"copy"
.LC13:
	.string	"%25s"
.LC14:
	.string	"shared memory copy"
.LC15:
	.string	"naive transpose"
.LC16:
	.string	"coalesced transpose"
.LC17:
	.string	"conflict-free transpose"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1144, %rsp
	.cfi_def_cfa_offset 1200
	movq	%fs:40, %rax
	movq	%rax, 1128(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jle	.L71
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movl	%eax, %ebx
	jmp	.L40
.L71:
	xorl	%ebx, %ebx
.L40:
	leaq	96(%rsp), %rbp
	movl	%ebx, %esi
	movq	%rbp, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movq	%rbp, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rsi
	call	__printf_chk@PLT
	pushq	$32
	.cfi_def_cfa_offset 1208
	movl	$8, %r9d
	xorl	%eax, %eax
	pushq	$32
	.cfi_def_cfa_offset 1216
	movl	$32, %r8d
	movl	$1024, %ecx
	movl	$1024, %edx
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	popq	%rax
	.cfi_def_cfa_offset 1208
	popq	%rdx
	.cfi_def_cfa_offset 1200
	pushq	$1
	.cfi_def_cfa_offset 1208
	pushq	$8
	.cfi_def_cfa_offset 1216
	movl	$32, %edx
	movl	$32, %r9d
	xorl	%eax, %eax
	movl	$1, %r8d
	movl	$32, %ecx
	movl	$2, %edi
	leaq	.LC8(%rip), %rsi
	call	__printf_chk@PLT
	popq	%rcx
	.cfi_def_cfa_offset 1208
	movl	%ebx, %edi
	popq	%rsi
	.cfi_def_cfa_offset 1200
	call	cudaSetDevice@PLT
	movl	$4194304, %edi
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	movq	%rbp, %rcx
	xorl	%edx, %edx
.L41:
	xorl	%eax, %eax
.L42:
	leal	(%rdx,%rax), %esi
	cvtsi2ssl	%esi, %xmm0
	movss	%xmm0, (%rcx,%rax,4)
	incq	%rax
	cmpq	$1024, %rax
	jne	.L42
	addl	$1024, %edx
	addq	$4096, %rcx
	cmpl	$1048576, %edx
	jne	.L41
	xorl	%eax, %eax
.L43:
	movq	%rax, %rcx
	leaq	0(%rbp,%rax,4), %rsi
	xorl	%edx, %edx
	salq	$12, %rcx
	addq	%r12, %rcx
.L44:
	movss	(%rsi), %xmm0
	addq	$4096, %rsi
	movss	%xmm0, (%rcx,%rdx,4)
	incq	%rdx
	cmpq	$1024, %rdx
	jne	.L44
	incq	%rax
	cmpq	$1024, %rax
	jne	.L43
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$4194304, %edx
	movq	%rbp, %rsi
	leaq	.LC13(%rip), %r14
	call	cudaMemcpy@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	.LC9(%rip), %rcx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC10(%rip), %rdx
	leaq	.LC11(%rip), %rsi
	call	__printf_chk@PLT
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC12(%rip), %rdx
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	movl	$4194304, %edx
	call	cudaMemset@PLT
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdx
	movl	$1, %ecx
	movabsq	$137438953504, %rdi
	movl	$1, %esi
	movq	%rdi, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rdx, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movq	32(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z26__device_stub__Z4copyPfPKfPfPKf
.L46:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	movl	$100, %r13d
	call	cudaEventRecord@PLT
.L48:
	movl	92(%rsp), %ecx
	movq	84(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	72(%rsp), %rdi
	movl	80(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	movq	32(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z26__device_stub__Z4copyPfPKfPfPKf
.L47:
	decl	%r13d
	jne	.L48
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	leaq	28(%rsp), %r13
	call	cudaEventRecord@PLT
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	%r13, %rdi
	call	cudaEventElapsedTime@PLT
	movq	40(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movss	28(%rsp), %xmm0
	movq	8(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$1048576, %edx
	call	_Z11postprocessPKfS0_if
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC14(%rip), %rdx
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	movl	$4194304, %edx
	call	cudaMemset@PLT
	movl	92(%rsp), %ecx
	movl	80(%rsp), %esi
	xorl	%r9d, %r9d
	movq	84(%rsp), %rdx
	movq	72(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	movq	32(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z36__device_stub__Z13copySharedMemPfPKfPfPKf
.L49:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	movl	$100, %r15d
	call	cudaEventRecord@PLT
.L51:
	movl	92(%rsp), %ecx
	movq	84(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	72(%rsp), %rdi
	movl	80(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L50
	movq	32(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z36__device_stub__Z13copySharedMemPfPKfPfPKf
.L50:
	decl	%r15d
	jne	.L51
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	%r13, %rdi
	call	cudaEventElapsedTime@PLT
	movq	40(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movss	28(%rsp), %xmm0
	movq	8(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$1048576, %edx
	call	_Z11postprocessPKfS0_if
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC15(%rip), %rdx
	call	__printf_chk@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	movl	$4194304, %edx
	call	cudaMemset@PLT
	movl	92(%rsp), %ecx
	movl	80(%rsp), %esi
	xorl	%r9d, %r9d
	movq	84(%rsp), %rdx
	movq	72(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L52
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z37__device_stub__Z14transposeNaivePfPKfPfPKf
.L52:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	movl	$100, %r15d
	call	cudaEventRecord@PLT
.L54:
	movl	92(%rsp), %ecx
	movq	84(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	72(%rsp), %rdi
	movl	80(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L53
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z37__device_stub__Z14transposeNaivePfPKfPfPKf
.L53:
	decl	%r15d
	jne	.L54
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	%r13, %rdi
	call	cudaEventElapsedTime@PLT
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movl	$1048576, %edx
	movq	%rbx, %rsi
	movq	%r12, %rdi
	movss	28(%rsp), %xmm0
	call	_Z11postprocessPKfS0_if
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC16(%rip), %rdx
	call	__printf_chk@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	movl	$4194304, %edx
	call	cudaMemset@PLT
	movl	92(%rsp), %ecx
	movl	80(%rsp), %esi
	xorl	%r9d, %r9d
	movq	84(%rsp), %rdx
	movq	72(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z41__device_stub__Z18transposeCoalescedPfPKfPfPKf
.L55:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	movl	$100, %r15d
	call	cudaEventRecord@PLT
.L57:
	movl	92(%rsp), %ecx
	movq	84(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	72(%rsp), %rdi
	movl	80(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z41__device_stub__Z18transposeCoalescedPfPKfPfPKf
.L56:
	decl	%r15d
	jne	.L57
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	%r13, %rdi
	call	cudaEventElapsedTime@PLT
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movl	$1048576, %edx
	movq	%rbx, %rsi
	movq	%r12, %rdi
	movss	28(%rsp), %xmm0
	call	_Z11postprocessPKfS0_if
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC17(%rip), %rdx
	call	__printf_chk@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	movl	$4194304, %edx
	call	cudaMemset@PLT
	movl	92(%rsp), %ecx
	movl	80(%rsp), %esi
	xorl	%r9d, %r9d
	movq	84(%rsp), %rdx
	movq	72(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L58
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z47__device_stub__Z24transposeNoBankConflictsPfPKfPfPKf
.L58:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	movl	$100, %r14d
	call	cudaEventRecord@PLT
.L60:
	movl	92(%rsp), %ecx
	movq	84(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	72(%rsp), %rdi
	movl	80(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z47__device_stub__Z24transposeNoBankConflictsPfPKfPfPKf
.L59:
	decl	%r14d
	jne	.L60
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	%r13, %rdi
	call	cudaEventElapsedTime@PLT
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movl	$1048576, %edx
	movq	%rbx, %rsi
	movq	%r12, %rdi
	movss	28(%rsp), %xmm0
	call	_Z11postprocessPKfS0_if
	movq	56(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	64(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	1128(%rsp), %rax
	subq	%fs:40, %rax
	je	.L61
	call	__stack_chk_fail@PLT
.L61:
	addq	$1144, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC18:
	.string	"_Z24transposeNoBankConflictsPfPKf"
.LC19:
	.string	"_Z18transposeCoalescedPfPKf"
.LC20:
	.string	"_Z14transposeNaivePfPKf"
.LC21:
	.string	"_Z13copySharedMemPfPKf"
.LC22:
	.string	"_Z4copyPfPKf"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2065:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z24transposeNoBankConflictsPfPKf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z18transposeCoalescedPfPKf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14transposeNaivePfPKf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC21(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13copySharedMemPfPKf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC22(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z4copyPfPKf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2065:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC4:
	.long	0
	.long	1079574528
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* Copyright (c) 1993-2015, NVIDIA CORPORATION. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *  * Neither the name of NVIDIA CORPORATION nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <assert.h>

// Convenience function for checking CUDA runtime API results
// can be wrapped around any runtime API call. No-op in release builds.
inline
hipError_t checkCuda(hipError_t result)
{
#if defined(DEBUG) || defined(_DEBUG)
  if (result != hipSuccess) {
    fprintf(stderr, "CUDA Runtime Error: %s\n", hipGetErrorString(result));
    assert(result == hipSuccess);
  }
#endif
  return result;
}

const int TILE_DIM = 32;
const int BLOCK_ROWS = 8;
const int NUM_REPS = 100;

// Check errors and print GB/s
void postprocess(const float *ref, const float *res, int n, float ms)
{
  bool passed = true;
  for (int i = 0; i < n; i++)
    if (res[i] != ref[i]) {
      printf("%d %f %f\n", i, res[i], ref[i]);
      printf("%25s\n", "*** FAILED ***");
      passed = false;
      break;
    }
  if (passed)
    printf("%20.2f\n", 2 * n * sizeof(float) * 1e-6 * NUM_REPS / ms );
}

// simple copy kernel
// Used as reference case representing best effective bandwidth.
__global__ void copy(float *odata, const float *idata)
{
  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = gridDim.x * TILE_DIM;

  for (int j = 0; j < TILE_DIM; j+= BLOCK_ROWS)
    odata[(y+j)*width + x] = idata[(y+j)*width + x];
}

// copy kernel using shared memory
// Also used as reference case, demonstrating effect of using shared memory.
__global__ void copySharedMem(float *odata, const float *idata)
{
  __shared__ float tile[TILE_DIM * TILE_DIM];
  
  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = gridDim.x * TILE_DIM;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS)
     tile[(threadIdx.y+j)*TILE_DIM + threadIdx.x] = idata[(y+j)*width + x];

  __syncthreads();

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS)
     odata[(y+j)*width + x] = tile[(threadIdx.y+j)*TILE_DIM + threadIdx.x];          
}

// naive transpose
// Simplest transpose; doesn't use shared memory.
// Global memory reads are coalesced but writes are not.
__global__ void transposeNaive(float *odata, const float *idata)
{
  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = gridDim.x * TILE_DIM;

  for (int j = 0; j < TILE_DIM; j+= BLOCK_ROWS)
    odata[x*width + (y+j)] = idata[(y+j)*width + x];
}

// coalesced transpose
// Uses shared memory to achieve coalesing in both reads and writes
// Tile width == #banks causes shared memory bank conflicts.
__global__ void transposeCoalesced(float *odata, const float *idata)
{
  __shared__ float tile[TILE_DIM][TILE_DIM];
    
  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = gridDim.x * TILE_DIM;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS)
     tile[threadIdx.y+j][threadIdx.x] = idata[(y+j)*width + x];

  __syncthreads();

  x = blockIdx.y * TILE_DIM + threadIdx.x;  // transpose block offset
  y = blockIdx.x * TILE_DIM + threadIdx.y;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS)
     odata[(y+j)*width + x] = tile[threadIdx.x][threadIdx.y + j];
}
   

// No bank-conflict transpose
// Same as transposeCoalesced except the first tile dimension is padded 
// to avoid shared memory bank conflicts.
__global__ void transposeNoBankConflicts(float *odata, const float *idata)
{
  __shared__ float tile[TILE_DIM][TILE_DIM+1];
    
  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = gridDim.x * TILE_DIM;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS)
     tile[threadIdx.y+j][threadIdx.x] = idata[(y+j)*width + x];

  __syncthreads();

  x = blockIdx.y * TILE_DIM + threadIdx.x;  // transpose block offset
  y = blockIdx.x * TILE_DIM + threadIdx.y;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS)
     odata[(y+j)*width + x] = tile[threadIdx.x][threadIdx.y + j];
}

int main(int argc, char **argv)
{
  const int nx = 1024;
  const int ny = 1024;
  const int mem_size = nx*ny*sizeof(float);

  dim3 dimGrid(nx/TILE_DIM, ny/TILE_DIM, 1);
  dim3 dimBlock(TILE_DIM, BLOCK_ROWS, 1);

  int devId = 0;
  if (argc > 1) devId = atoi(argv[1]);

  hipDeviceProp_t prop;
  checkCuda( hipGetDeviceProperties(&prop, devId));
  printf("\nDevice : %s\n", prop.name);
  printf("Matrix size: %d %d, Block size: %d %d, Tile size: %d %d\n", 
         nx, ny, TILE_DIM, BLOCK_ROWS, TILE_DIM, TILE_DIM);
  printf("dimGrid: %d %d %d. dimBlock: %d %d %d\n",
         dimGrid.x, dimGrid.y, dimGrid.z, dimBlock.x, dimBlock.y, dimBlock.z);
  
  checkCuda( hipSetDevice(devId) );

  float *h_idata = (float*)malloc(mem_size);
  float *h_cdata = (float*)malloc(mem_size);
  float *h_tdata = (float*)malloc(mem_size);
  float *gold    = (float*)malloc(mem_size);
  
  float *d_idata, *d_cdata, *d_tdata;
  checkCuda( hipMalloc(&d_idata, mem_size) );
  checkCuda( hipMalloc(&d_cdata, mem_size) );
  checkCuda( hipMalloc(&d_tdata, mem_size) );

  // check parameters and calculate execution configuration
  if (nx % TILE_DIM || ny % TILE_DIM) {
    printf("nx and ny must be a multiple of TILE_DIM\n");
    goto error_exit;
  }

  if (TILE_DIM % BLOCK_ROWS) {
    printf("TILE_DIM must be a multiple of BLOCK_ROWS\n");
    goto error_exit;
  }
    
  // host
  for (int j = 0; j < ny; j++)
    for (int i = 0; i < nx; i++)
      h_idata[j*nx + i] = j*nx + i;

  // correct result for error checking
  for (int j = 0; j < ny; j++)
    for (int i = 0; i < nx; i++)
      gold[j*nx + i] = h_idata[i*nx + j];
  
  // device
  checkCuda( hipMemcpy(d_idata, h_idata, mem_size, hipMemcpyHostToDevice) );
  
  // events for timing
  hipEvent_t startEvent, stopEvent;
  checkCuda( hipEventCreate(&startEvent) );
  checkCuda( hipEventCreate(&stopEvent) );
  float ms;

  // ------------
  // time kernels
  // ------------
  printf("%25s%25s\n", "Routine", "Bandwidth (GB/s)");
  
  // ----
  // copy 
  // ----
  printf("%25s", "copy");
  checkCuda( hipMemset(d_cdata, 0, mem_size) );
  // warm up
  copy<<<dimGrid, dimBlock>>>(d_cdata, d_idata);
  checkCuda( hipEventRecord(startEvent, 0) );
  for (int i = 0; i < NUM_REPS; i++)
     copy<<<dimGrid, dimBlock>>>(d_cdata, d_idata);
  checkCuda( hipEventRecord(stopEvent, 0) );
  checkCuda( hipEventSynchronize(stopEvent) );
  checkCuda( hipEventElapsedTime(&ms, startEvent, stopEvent) );
  checkCuda( hipMemcpy(h_cdata, d_cdata, mem_size, hipMemcpyDeviceToHost) );
  postprocess(h_idata, h_cdata, nx*ny, ms);

  // -------------
  // copySharedMem 
  // -------------
  printf("%25s", "shared memory copy");
  checkCuda( hipMemset(d_cdata, 0, mem_size) );
  // warm up
  copySharedMem<<<dimGrid, dimBlock>>>(d_cdata, d_idata);
  checkCuda( hipEventRecord(startEvent, 0) );
  for (int i = 0; i < NUM_REPS; i++)
     copySharedMem<<<dimGrid, dimBlock>>>(d_cdata, d_idata);
  checkCuda( hipEventRecord(stopEvent, 0) );
  checkCuda( hipEventSynchronize(stopEvent) );
  checkCuda( hipEventElapsedTime(&ms, startEvent, stopEvent) );
  checkCuda( hipMemcpy(h_cdata, d_cdata, mem_size, hipMemcpyDeviceToHost) );
  postprocess(h_idata, h_cdata, nx * ny, ms);

  // --------------
  // transposeNaive 
  // --------------
  printf("%25s", "naive transpose");
  checkCuda( hipMemset(d_tdata, 0, mem_size) );
  // warmup
  transposeNaive<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
  checkCuda( hipEventRecord(startEvent, 0) );
  for (int i = 0; i < NUM_REPS; i++)
     transposeNaive<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
  checkCuda( hipEventRecord(stopEvent, 0) );
  checkCuda( hipEventSynchronize(stopEvent) );
  checkCuda( hipEventElapsedTime(&ms, startEvent, stopEvent) );
  checkCuda( hipMemcpy(h_tdata, d_tdata, mem_size, hipMemcpyDeviceToHost) );
  postprocess(gold, h_tdata, nx * ny, ms);

  // ------------------
  // transposeCoalesced 
  // ------------------
  printf("%25s", "coalesced transpose");
  checkCuda( hipMemset(d_tdata, 0, mem_size) );
  // warmup
  transposeCoalesced<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
  checkCuda( hipEventRecord(startEvent, 0) );
  for (int i = 0; i < NUM_REPS; i++)
     transposeCoalesced<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
  checkCuda( hipEventRecord(stopEvent, 0) );
  checkCuda( hipEventSynchronize(stopEvent) );
  checkCuda( hipEventElapsedTime(&ms, startEvent, stopEvent) );
  checkCuda( hipMemcpy(h_tdata, d_tdata, mem_size, hipMemcpyDeviceToHost) );
  postprocess(gold, h_tdata, nx * ny, ms);

  // ------------------------
  // transposeNoBankConflicts
  // ------------------------
  printf("%25s", "conflict-free transpose");
  checkCuda( hipMemset(d_tdata, 0, mem_size) );
  // warmup
  transposeNoBankConflicts<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
  checkCuda( hipEventRecord(startEvent, 0) );
  for (int i = 0; i < NUM_REPS; i++)
     transposeNoBankConflicts<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
  checkCuda( hipEventRecord(stopEvent, 0) );
  checkCuda( hipEventSynchronize(stopEvent) );
  checkCuda( hipEventElapsedTime(&ms, startEvent, stopEvent) );
  checkCuda( hipMemcpy(h_tdata, d_tdata, mem_size, hipMemcpyDeviceToHost) );
  postprocess(gold, h_tdata, nx * ny, ms);

error_exit:
  // cleanup
  checkCuda( hipEventDestroy(startEvent) );
  checkCuda( hipEventDestroy(stopEvent) );
  checkCuda( hipFree(d_tdata) );
  checkCuda( hipFree(d_cdata) );
  checkCuda( hipFree(d_idata) );
  free(h_idata);
  free(h_tdata);
  free(h_cdata);
  free(gold);
}

	.text
	.file	"transpose.hip"
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z11postprocessPKfS0_if
.LCPI0_0:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI0_1:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI0_2:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
.LCPI0_3:
	.quad	0x4059000000000000              # double 100
	.text
	.globl	_Z11postprocessPKfS0_if
	.type	_Z11postprocessPKfS0_if,@function
_Z11postprocessPKfS0_if:                # @_Z11postprocessPKfS0_if
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	testl	%edx, %edx
	jle	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %ecx
	xorl	%eax, %eax
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rsi,%rax,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	movss	(%rdi,%rax,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	ucomiss	%xmm2, %xmm1
	jne	.LBB0_5
	jp	.LBB0_5
# %bb.3:                                #   in Loop: Header=BB0_2 Depth=1
	incq	%rax
	cmpq	%rax, %rcx
	jne	.LBB0_2
.LBB0_4:                                # %.critedge
	addl	%edx, %edx
	movslq	%edx, %rax
	shlq	$2, %rax
	movq	%rax, %xmm2
	punpckldq	.LCPI0_0(%rip), %xmm2   # xmm2 = xmm2[0],mem[0],xmm2[1],mem[1]
	subpd	.LCPI0_1(%rip), %xmm2
	movapd	%xmm2, %xmm1
	unpckhpd	%xmm2, %xmm1                    # xmm1 = xmm1[1],xmm2[1]
	addsd	%xmm2, %xmm1
	mulsd	.LCPI0_2(%rip), %xmm1
	mulsd	.LCPI0_3(%rip), %xmm1
	cvtss2sd	%xmm0, %xmm0
	divsd	%xmm0, %xmm1
	movl	$.L.str.3, %edi
	movapd	%xmm1, %xmm0
	movb	$1, %al
	popq	%rcx
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.LBB0_5:
	.cfi_def_cfa_offset 16
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	%xmm2, %xmm1
	movl	$.L.str, %edi
	movl	%eax, %esi
	movb	$2, %al
	callq	printf
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.Lfunc_end0:
	.size	_Z11postprocessPKfS0_if, .Lfunc_end0-_Z11postprocessPKfS0_if
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__copyPfPKf    # -- Begin function _Z19__device_stub__copyPfPKf
	.type	_Z19__device_stub__copyPfPKf,@function
_Z19__device_stub__copyPfPKf:           # @_Z19__device_stub__copyPfPKf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4copyPfPKf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z19__device_stub__copyPfPKf, .Lfunc_end1-_Z19__device_stub__copyPfPKf
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__copySharedMemPfPKf # -- Begin function _Z28__device_stub__copySharedMemPfPKf
	.type	_Z28__device_stub__copySharedMemPfPKf,@function
_Z28__device_stub__copySharedMemPfPKf:  # @_Z28__device_stub__copySharedMemPfPKf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13copySharedMemPfPKf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z28__device_stub__copySharedMemPfPKf, .Lfunc_end2-_Z28__device_stub__copySharedMemPfPKf
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__transposeNaivePfPKf # -- Begin function _Z29__device_stub__transposeNaivePfPKf
	.type	_Z29__device_stub__transposeNaivePfPKf,@function
_Z29__device_stub__transposeNaivePfPKf: # @_Z29__device_stub__transposeNaivePfPKf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14transposeNaivePfPKf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z29__device_stub__transposeNaivePfPKf, .Lfunc_end3-_Z29__device_stub__transposeNaivePfPKf
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__transposeCoalescedPfPKf # -- Begin function _Z33__device_stub__transposeCoalescedPfPKf
	.type	_Z33__device_stub__transposeCoalescedPfPKf,@function
_Z33__device_stub__transposeCoalescedPfPKf: # @_Z33__device_stub__transposeCoalescedPfPKf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18transposeCoalescedPfPKf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z33__device_stub__transposeCoalescedPfPKf, .Lfunc_end4-_Z33__device_stub__transposeCoalescedPfPKf
	.cfi_endproc
                                        # -- End function
	.globl	_Z39__device_stub__transposeNoBankConflictsPfPKf # -- Begin function _Z39__device_stub__transposeNoBankConflictsPfPKf
	.type	_Z39__device_stub__transposeNoBankConflictsPfPKf,@function
_Z39__device_stub__transposeNoBankConflictsPfPKf: # @_Z39__device_stub__transposeNoBankConflictsPfPKf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24transposeNoBankConflictsPfPKf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z39__device_stub__transposeNoBankConflictsPfPKf, .Lfunc_end5-_Z39__device_stub__transposeNoBankConflictsPfPKf
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1544, %rsp                     # imm = 0x608
	.cfi_def_cfa_offset 1600
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%ebx, %ebx
	cmpl	$2, %edi
	jl	.LBB6_2
# %bb.1:
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
.LBB6_2:
	leaq	72(%rsp), %r14
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	hipGetDevicePropertiesR0600
	xorl	%r13d, %r13d
	movl	$.L.str.4, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$32, (%rsp)
	movl	$.L.str.5, %edi
	movl	$1024, %esi                     # imm = 0x400
	movl	$1024, %edx                     # imm = 0x400
	movl	$32, %ecx
	movl	$8, %r8d
	movl	$32, %r9d
	xorl	%eax, %eax
	callq	printf
	movl	$1, (%rsp)
	movl	$.L.str.6, %edi
	movl	$32, %esi
	movl	$32, %edx
	movl	$1, %ecx
	movl	$32, %r8d
	movl	$8, %r9d
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	hipSetDevice
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r14
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r12
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r15
	leaq	24(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	movl	$1024, %eax                     # imm = 0x400
	xorl	%ecx, %ecx
.LBB6_3:                                # %.preheader192
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_4 Depth 2
	movl	$1024, %edx                     # imm = 0x400
	movq	%r13, %rsi
.LBB6_4:                                #   Parent Loop BB6_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtsi2ss	%esi, %xmm0
	movss	%xmm0, (%r14,%rsi,4)
	incq	%rsi
	decq	%rdx
	jne	.LBB6_4
# %bb.5:                                #   in Loop: Header=BB6_3 Depth=1
	incq	%rcx
	addq	%rax, %r13
	cmpq	%rax, %rcx
	jne	.LBB6_3
# %bb.6:                                # %.preheader.preheader
	xorl	%eax, %eax
	movq	%r14, %rcx
	movq	%r15, %rdx
.LBB6_7:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_8 Depth 2
	movq	%rcx, %rsi
	xorl	%edi, %edi
.LBB6_8:                                #   Parent Loop BB6_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rsi), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rdx,%rdi,4)
	incq	%rdi
	addq	$4096, %rsi                     # imm = 0x1000
	cmpq	$1024, %rdi                     # imm = 0x400
	jne	.LBB6_8
# %bb.9:                                #   in Loop: Header=BB6_7 Depth=1
	incq	%rax
	addq	$4096, %rdx                     # imm = 0x1000
	addq	$4, %rcx
	cmpq	$1024, %rax                     # imm = 0x400
	jne	.LBB6_7
# %bb.10:
	movabsq	$137438953504, %r13             # imm = 0x2000000020
	movabsq	$34359738400, %rbp              # imm = 0x800000020
	movq	24(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$.L.str.7, %edi
	movl	$.L.str.8, %esi
	movl	$.L.str.9, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.10, %edi
	movl	$.L.str.11, %esi
	xorl	%eax, %eax
	callq	printf
	movq	40(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	xorl	%esi, %esi
	callq	hipMemset
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_12
# %bb.11:
	movq	40(%rsp), %rdi
	movq	24(%rsp), %rsi
	callq	_Z19__device_stub__copyPfPKf
.LBB6_12:
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$100, %ebx
.LBB6_13:                               # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_15
# %bb.14:                               #   in Loop: Header=BB6_13 Depth=1
	movq	40(%rsp), %rdi
	movq	24(%rsp), %rsi
	callq	_Z19__device_stub__copyPfPKf
.LBB6_15:                               #   in Loop: Header=BB6_13 Depth=1
	decl	%ebx
	jne	.LBB6_13
# %bb.16:
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	52(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movq	40(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	56(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	callq	_Z11postprocessPKfS0_if
	movl	$.L.str.10, %edi
	movl	$.L.str.12, %esi
	xorl	%eax, %eax
	callq	printf
	movq	40(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	xorl	%esi, %esi
	callq	hipMemset
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_18
# %bb.17:
	movq	40(%rsp), %rdi
	movq	24(%rsp), %rsi
	callq	_Z28__device_stub__copySharedMemPfPKf
.LBB6_18:
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$100, %ebx
.LBB6_19:                               # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_21
# %bb.20:                               #   in Loop: Header=BB6_19 Depth=1
	movq	40(%rsp), %rdi
	movq	24(%rsp), %rsi
	callq	_Z28__device_stub__copySharedMemPfPKf
.LBB6_21:                               #   in Loop: Header=BB6_19 Depth=1
	decl	%ebx
	jne	.LBB6_19
# %bb.22:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	52(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movq	40(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	56(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	callq	_Z11postprocessPKfS0_if
	movl	$.L.str.10, %edi
	movl	$.L.str.13, %esi
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	xorl	%esi, %esi
	callq	hipMemset
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_24
# %bb.23:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	callq	_Z29__device_stub__transposeNaivePfPKf
.LBB6_24:
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$100, %ebx
	movq	64(%rsp), %r15                  # 8-byte Reload
.LBB6_25:                               # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_27
# %bb.26:                               #   in Loop: Header=BB6_25 Depth=1
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	callq	_Z29__device_stub__transposeNaivePfPKf
.LBB6_27:                               #   in Loop: Header=BB6_25 Depth=1
	decl	%ebx
	jne	.LBB6_25
# %bb.28:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	52(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movq	16(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movq	%r15, %rdi
	movq	%r12, %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	callq	_Z11postprocessPKfS0_if
	movl	$.L.str.10, %edi
	movl	$.L.str.14, %esi
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	xorl	%esi, %esi
	callq	hipMemset
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_30
# %bb.29:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	callq	_Z33__device_stub__transposeCoalescedPfPKf
.LBB6_30:
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$100, %ebx
.LBB6_31:                               # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_33
# %bb.32:                               #   in Loop: Header=BB6_31 Depth=1
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	callq	_Z33__device_stub__transposeCoalescedPfPKf
.LBB6_33:                               #   in Loop: Header=BB6_31 Depth=1
	decl	%ebx
	jne	.LBB6_31
# %bb.34:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	52(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movq	16(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movq	%r15, %rdi
	movq	%r12, %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	callq	_Z11postprocessPKfS0_if
	movl	$.L.str.10, %edi
	movl	$.L.str.15, %esi
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	xorl	%esi, %esi
	callq	hipMemset
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_36
# %bb.35:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	callq	_Z39__device_stub__transposeNoBankConflictsPfPKf
.LBB6_36:
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$100, %ebx
.LBB6_37:                               # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_39
# %bb.38:                               #   in Loop: Header=BB6_37 Depth=1
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	callq	_Z39__device_stub__transposeNoBankConflictsPfPKf
.LBB6_39:                               #   in Loop: Header=BB6_37 Depth=1
	decl	%ebx
	jne	.LBB6_37
# %bb.40:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	52(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movq	16(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movq	%r15, %rdi
	movq	%r12, %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	callq	_Z11postprocessPKfS0_if
	movq	32(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	56(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$1544, %rsp                     # imm = 0x608
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4copyPfPKf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13copySharedMemPfPKf, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14transposeNaivePfPKf, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18transposeCoalescedPfPKf, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24transposeNoBankConflictsPfPKf, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d %f %f\n"
	.size	.L.str, 10

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%25s\n"
	.size	.L.str.1, 6

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"*** FAILED ***"
	.size	.L.str.2, 15

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%20.2f\n"
	.size	.L.str.3, 8

	.type	_Z4copyPfPKf,@object            # @_Z4copyPfPKf
	.section	.rodata,"a",@progbits
	.globl	_Z4copyPfPKf
	.p2align	3, 0x0
_Z4copyPfPKf:
	.quad	_Z19__device_stub__copyPfPKf
	.size	_Z4copyPfPKf, 8

	.type	_Z13copySharedMemPfPKf,@object  # @_Z13copySharedMemPfPKf
	.globl	_Z13copySharedMemPfPKf
	.p2align	3, 0x0
_Z13copySharedMemPfPKf:
	.quad	_Z28__device_stub__copySharedMemPfPKf
	.size	_Z13copySharedMemPfPKf, 8

	.type	_Z14transposeNaivePfPKf,@object # @_Z14transposeNaivePfPKf
	.globl	_Z14transposeNaivePfPKf
	.p2align	3, 0x0
_Z14transposeNaivePfPKf:
	.quad	_Z29__device_stub__transposeNaivePfPKf
	.size	_Z14transposeNaivePfPKf, 8

	.type	_Z18transposeCoalescedPfPKf,@object # @_Z18transposeCoalescedPfPKf
	.globl	_Z18transposeCoalescedPfPKf
	.p2align	3, 0x0
_Z18transposeCoalescedPfPKf:
	.quad	_Z33__device_stub__transposeCoalescedPfPKf
	.size	_Z18transposeCoalescedPfPKf, 8

	.type	_Z24transposeNoBankConflictsPfPKf,@object # @_Z24transposeNoBankConflictsPfPKf
	.globl	_Z24transposeNoBankConflictsPfPKf
	.p2align	3, 0x0
_Z24transposeNoBankConflictsPfPKf:
	.quad	_Z39__device_stub__transposeNoBankConflictsPfPKf
	.size	_Z24transposeNoBankConflictsPfPKf, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"\nDevice : %s\n"
	.size	.L.str.4, 14

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Matrix size: %d %d, Block size: %d %d, Tile size: %d %d\n"
	.size	.L.str.5, 57

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"dimGrid: %d %d %d. dimBlock: %d %d %d\n"
	.size	.L.str.6, 39

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%25s%25s\n"
	.size	.L.str.7, 10

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Routine"
	.size	.L.str.8, 8

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Bandwidth (GB/s)"
	.size	.L.str.9, 17

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"%25s"
	.size	.L.str.10, 5

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"copy"
	.size	.L.str.11, 5

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"shared memory copy"
	.size	.L.str.12, 19

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"naive transpose"
	.size	.L.str.13, 16

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"coalesced transpose"
	.size	.L.str.14, 20

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"conflict-free transpose"
	.size	.L.str.15, 24

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4copyPfPKf"
	.size	.L__unnamed_1, 13

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13copySharedMemPfPKf"
	.size	.L__unnamed_2, 23

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z14transposeNaivePfPKf"
	.size	.L__unnamed_3, 24

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z18transposeCoalescedPfPKf"
	.size	.L__unnamed_4, 28

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z24transposeNoBankConflictsPfPKf"
	.size	.L__unnamed_5, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__copyPfPKf
	.addrsig_sym _Z28__device_stub__copySharedMemPfPKf
	.addrsig_sym _Z29__device_stub__transposeNaivePfPKf
	.addrsig_sym _Z33__device_stub__transposeCoalescedPfPKf
	.addrsig_sym _Z39__device_stub__transposeNoBankConflictsPfPKf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4copyPfPKf
	.addrsig_sym _Z13copySharedMemPfPKf
	.addrsig_sym _Z14transposeNaivePfPKf
	.addrsig_sym _Z18transposeCoalescedPfPKf
	.addrsig_sym _Z24transposeNoBankConflictsPfPKf
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4copyPfPKf            ; -- Begin function _Z4copyPfPKf
	.globl	_Z4copyPfPKf
	.p2align	8
	.type	_Z4copyPfPKf,@function
_Z4copyPfPKf:                           ; @_Z4copyPfPKf
; %bb.0:
	s_load_b32 s4, s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	s_load_b128 s[0:3], s[0:1], 0x0
	v_and_b32_e32 v0, 0x3ff, v0
	s_lshl_b32 s5, s14, 5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, s15, 5, v1
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v1, s4, v1
	s_lshl_b32 s4, s4, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 5, v1
	v_add3_u32 v0, v0, v1, s5
	s_mov_b32 s5, -8
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s5, s5, 8
	s_cmp_gt_u32 s5, 23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_nc_u32_e32 v0, s4, v0
	v_add_co_u32 v3, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[1:2], v3, off
	s_cbranch_scc0 .LBB0_1
; %bb.2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4copyPfPKf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4copyPfPKf, .Lfunc_end0-_Z4copyPfPKf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z13copySharedMemPfPKf  ; -- Begin function _Z13copySharedMemPfPKf
	.globl	_Z13copySharedMemPfPKf
	.p2align	8
	.type	_Z13copySharedMemPfPKf,@function
_Z13copySharedMemPfPKf:                 ; @_Z13copySharedMemPfPKf
; %bb.0:
	s_load_b32 s4, s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	s_load_b128 s[0:3], s[0:1], 0x0
	v_and_b32_e32 v0, 0x3ff, v0
	s_lshl_b32 s5, s14, 5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v2, s15, 5, v1
	v_lshlrev_b32_e32 v3, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v3, v1, 7, v3
	v_mov_b32_e32 v4, v3
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v2, s4, v2
	s_lshl_b32 s4, s4, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 5, v2
	v_add3_u32 v0, v0, v2, s5
	s_mov_b32 s5, -8
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v1, v0
.LBB1_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s5, s5, 8
	s_cmp_gt_u32 s5, 23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_add_nc_u32_e32 v1, s4, v1
	v_add_co_u32 v5, vcc_lo, s2, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	global_load_b32 v2, v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v2
	v_add_nc_u32_e32 v4, 0x400, v4
	s_cbranch_scc0 .LBB1_1
; %bb.2:
	s_mov_b32 s2, -8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v4, v3
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_nc_u32_e32 v3, 0x400, v3
	s_add_i32 s2, s2, 8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_gt_u32 s2, 23
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_nc_u32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[1:2], v4, off
	s_cbranch_scc0 .LBB1_3
; %bb.4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13copySharedMemPfPKf
		.amdhsa_group_segment_fixed_size 4096
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13copySharedMemPfPKf, .Lfunc_end1-_Z13copySharedMemPfPKf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 300
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4096 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z14transposeNaivePfPKf ; -- Begin function _Z14transposeNaivePfPKf
	.globl	_Z14transposeNaivePfPKf
	.p2align	8
	.type	_Z14transposeNaivePfPKf,@function
_Z14transposeNaivePfPKf:                ; @_Z14transposeNaivePfPKf
; %bb.0:
	s_load_b32 s4, s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_lshl_b32 s5, s14, 5
	s_lshl_b32 s6, s15, 5
	s_load_b128 s[0:3], s[0:1], 0x0
	v_add_nc_u32_e32 v2, s5, v1
	v_add_nc_u32_e32 v3, s6, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, s4, v2
	v_mul_lo_u32 v3, s4, v3
	s_lshl_b32 s4, s4, 8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v2, 5, v2
	v_lshlrev_b32_e32 v3, 5, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v2, v0, v2, s6
	v_add3_u32 v0, v1, v3, s5
	s_mov_b32 s5, -8
.LBB2_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s5, s5, 8
	s_cmp_gt_u32 s5, 23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	v_add_nc_u32_e32 v0, s4, v0
	v_add_co_u32 v3, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	global_load_b32 v1, v[3:4], off
	v_add_nc_u32_e32 v3, s5, v2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[3:4], v1, off
	s_cbranch_scc0 .LBB2_1
; %bb.2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14transposeNaivePfPKf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z14transposeNaivePfPKf, .Lfunc_end2-_Z14transposeNaivePfPKf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 232
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z18transposeCoalescedPfPKf ; -- Begin function _Z18transposeCoalescedPfPKf
	.globl	_Z18transposeCoalescedPfPKf
	.p2align	8
	.type	_Z18transposeCoalescedPfPKf,@function
_Z18transposeCoalescedPfPKf:            ; @_Z18transposeCoalescedPfPKf
; %bb.0:
	s_load_b32 s5, s[0:1], 0x10
	v_bfe_u32 v2, v0, 10, 10
	s_lshl_b32 s6, s15, 5
	s_load_b128 s[0:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_lshl_b32 s7, s14, 5
	v_add_nc_u32_e32 v1, s6, v2
	s_mov_b32 s8, -8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v3
	v_lshl_add_u32 v4, v2, 7, v0
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v1, s5, v1
	s_lshl_b32 s4, s5, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 5, v1
	v_add3_u32 v0, v3, v1, s7
.LBB3_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s8, s8, 8
	s_cmp_gt_u32 s8, 23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_add_nc_u32_e32 v0, s4, v0
	v_add_co_u32 v5, vcc_lo, s2, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	global_load_b32 v1, v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v1
	v_add_nc_u32_e32 v4, 0x400, v4
	s_cbranch_scc0 .LBB3_1
; %bb.2:
	v_add_nc_u32_e32 v0, s7, v2
	v_lshlrev_b32_e32 v1, 2, v2
	s_mov_b32 s2, -8
	s_waitcnt lgkmcnt(0)
	s_barrier
	v_mul_lo_u32 v0, s5, v0
	v_lshl_add_u32 v2, v3, 7, v1
	buffer_gl0_inv
	v_lshlrev_b32_e32 v0, 5, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v3, v0, s6
.LBB3_3:                                ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v5, v2
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_nc_u32_e32 v2, 32, v2
	s_add_i32 s2, s2, 8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_gt_u32 s2, 23
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	v_add_nc_u32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
	s_cbranch_scc0 .LBB3_3
; %bb.4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18transposeCoalescedPfPKf
		.amdhsa_group_segment_fixed_size 4096
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z18transposeCoalescedPfPKf, .Lfunc_end3-_Z18transposeCoalescedPfPKf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 320
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4096 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z24transposeNoBankConflictsPfPKf ; -- Begin function _Z24transposeNoBankConflictsPfPKf
	.globl	_Z24transposeNoBankConflictsPfPKf
	.p2align	8
	.type	_Z24transposeNoBankConflictsPfPKf,@function
_Z24transposeNoBankConflictsPfPKf:      ; @_Z24transposeNoBankConflictsPfPKf
; %bb.0:
	s_load_b32 s5, s[0:1], 0x10
	v_bfe_u32 v2, v0, 10, 10
	s_lshl_b32 s6, s15, 5
	s_load_b128 s[0:3], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_lshl_b32 s7, s14, 5
	v_add_nc_u32_e32 v1, s6, v2
	s_mov_b32 s8, -8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v3
	v_mad_u32_u24 v4, 0x84, v2, v0
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v1, s5, v1
	s_lshl_b32 s4, s5, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 5, v1
	v_add3_u32 v0, v3, v1, s7
.LBB4_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s8, s8, 8
	s_cmp_gt_u32 s8, 23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_add_nc_u32_e32 v0, s4, v0
	v_add_co_u32 v5, vcc_lo, s2, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	global_load_b32 v1, v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v1
	v_add_nc_u32_e32 v4, 0x420, v4
	s_cbranch_scc0 .LBB4_1
; %bb.2:
	v_add_nc_u32_e32 v0, s7, v2
	v_lshlrev_b32_e32 v1, 2, v2
	s_mov_b32 s2, -8
	s_waitcnt lgkmcnt(0)
	s_barrier
	v_mul_lo_u32 v0, s5, v0
	v_mad_u32_u24 v2, 0x84, v3, v1
	buffer_gl0_inv
	v_lshlrev_b32_e32 v0, 5, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v3, v0, s6
.LBB4_3:                                ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v5, v2
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_nc_u32_e32 v2, 32, v2
	s_add_i32 s2, s2, 8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_gt_u32 s2, 23
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	v_add_nc_u32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
	s_cbranch_scc0 .LBB4_3
; %bb.4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24transposeNoBankConflictsPfPKf
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z24transposeNoBankConflictsPfPKf, .Lfunc_end4-_Z24transposeNoBankConflictsPfPKf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 328
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4copyPfPKf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4copyPfPKf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 4096
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13copySharedMemPfPKf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13copySharedMemPfPKf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14transposeNaivePfPKf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14transposeNaivePfPKf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 4096
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18transposeCoalescedPfPKf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18transposeCoalescedPfPKf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 4224
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z24transposeNoBankConflictsPfPKf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z24transposeNoBankConflictsPfPKf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
