// cuda_example3.cu : Defines the entry point for the console application.
//


#include <stdio.h>
#include <cuda.h>
#include <string.h>


// Kernel that executes on the CUDA device
__global__ void square_array( float *a, long int N, long int b )
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if ( ((2*b)*idx+b) < N){
        a[idx*2*b] = a[idx*2*b]+a[((2*b)*idx+b)];
    	 a[((2*b)*idx+b)] = 0;
       
    }
}

typedef struct cudaDeviceProp cudaDevProp_t;

// main routine that executes on the host
int main( void )
{
    
    int ct,dev;
    long int b = 1;
    int passos = 0;
    cudaDevProp_t prop;

    float *a_h, *a_d; // Pointer to host & device arrays
    const long int N = 30000; // Number of elements in arrays

    size_t size = N * sizeof( float );

    cudaGetDeviceCount(&ct); //is there a cuda device??

    if(ct == 0){ 
        printf("\nNo CUDA device found.\n");
        exit(0);
    }

    a_h = (float *)malloc( size );    // Allocate array on host
    cudaMalloc( (void **)&a_d, size ); // Allocate array on device

    // Initialize host array and copy it to CUDA device
    for ( long int i = 0; i < N; i++ )
        a_h[i] = (float)1;

    cudaMemcpy( a_d, a_h, size, cudaMemcpyHostToDevice );

    // kernel initialization
    cudaGetDevice(&dev);
    cudaGetDeviceProperties(&prop,dev);
    int block_size = prop.maxThreadsPerBlock; //ATENTION
    int n_blocks   = N / block_size + ( N % block_size == 0 ? 0 : 1 );

    while(b<N){
        passos++;
    	square_array <<< n_blocks, block_size >>> ( a_d, N,b );
        b = b*2;
        cudaMemcpy( a_h, a_d, sizeof( float ) * N, cudaMemcpyDeviceToHost );
        puts("\n\n");
    // Print results
      // for ( int i = 0; i < N; i++ )
          printf( " %f\n",a_h[0] ); // Cleanup
    }
    // Retrieve result from device and store it in host array

    printf("\n\tPASSOS: %d", passos);
    free( a_h );
    cudaFree( a_d );
    return 0;
}

	.file	"tmpxft_0025bcdb_00000000-6_soma_albert.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z34__device_stub__Z12square_arrayPfllPfll
	.type	_Z34__device_stub__Z12square_arrayPfllPfll, @function
_Z34__device_stub__Z12square_arrayPfllPfll:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12square_arrayPfll(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z34__device_stub__Z12square_arrayPfllPfll, .-_Z34__device_stub__Z12square_arrayPfllPfll
	.globl	_Z12square_arrayPfll
	.type	_Z12square_arrayPfll, @function
_Z12square_arrayPfll:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z12square_arrayPfllPfll
	.cfi_endproc
.LFE2053:
	.size	_Z12square_arrayPfll, .-_Z12square_arrayPfll
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\nNo CUDA device found.\n"
.LC2:
	.string	"\n\n"
.LC3:
	.string	" %f\n"
.LC4:
	.string	"\n\tPASSOS: %d"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1096, %rsp
	.cfi_def_cfa_offset 1152
	movq	%fs:40, %rax
	movq	%rax, 1080(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	cmpl	$0, 8(%rsp)
	jne	.L9
	movl	$2, %edi
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	exit@PLT
.L9:
	movl	$120000, %edi
	xorl	%ebx, %ebx
	call	malloc@PLT
	leaq	16(%rsp), %rdi
	movl	$120000, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	movss	.LC1(%rip), %xmm0
.L10:
	movss	%xmm0, 0(%rbp,%rbx,4)
	incq	%rbx
	cmpq	$30000, %rbx
	jne	.L10
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$120000, %edx
	movq	%rbp, %rsi
	movabsq	$4294967297, %r15
	movl	$1, %r12d
	call	cudaMemcpy@PLT
	leaq	12(%rsp), %rdi
	call	cudaGetDevice@PLT
	movl	12(%rsp), %esi
	leaq	48(%rsp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movq	%rbx, %rax
	movslq	368(%rsp), %rcx
	cqto
	idivq	%rcx
	movq	%rcx, %r13
	cmpq	$1, %rdx
	movq	%rax, %rbx
	sbbl	$-1, %ebx
	xorl	%r14d, %r14d
.L12:
	movq	%r15, 40(%rsp)
	movl	44(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, 28(%rsp)
	movl	32(%rsp), %esi
	incl	%r14d
	movl	%r13d, 36(%rsp)
	movq	36(%rsp), %rdx
	movl	%ebx, 24(%rsp)
	movq	24(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	movq	16(%rsp), %rdi
	movq	%r12, %rdx
	movl	$30000, %esi
	call	_Z34__device_stub__Z12square_arrayPfllPfll
.L11:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	addq	%r12, %r12
	movl	$120000, %edx
	call	cudaMemcpy@PLT
	leaq	.LC2(%rip), %rdi
	call	puts@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	0(%rbp), %xmm0
	call	__printf_chk@PLT
	cmpl	$15, %r14d
	jne	.L12
	movl	$15, %edx
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	1080(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$1096, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z12square_arrayPfll"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12square_arrayPfll(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// cuda_example3.cu : Defines the entry point for the console application.
//


#include <stdio.h>
#include <hip/hip_runtime.h>
#include <string.h>


// Kernel that executes on the CUDA device
__global__ void square_array( float *a, long int N, long int b )
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if ( ((2*b)*idx+b) < N){
        a[idx*2*b] = a[idx*2*b]+a[((2*b)*idx+b)];
    	 a[((2*b)*idx+b)] = 0;
       
    }
}

typedef struct hipDeviceProp_t cudaDevProp_t;

// main routine that executes on the host
int main( void )
{
    
    int ct,dev;
    long int b = 1;
    int passos = 0;
    cudaDevProp_t prop;

    float *a_h, *a_d; // Pointer to host & device arrays
    const long int N = 30000; // Number of elements in arrays

    size_t size = N * sizeof( float );

    hipGetDeviceCount(&ct); //is there a cuda device??

    if(ct == 0){ 
        printf("\nNo CUDA device found.\n");
        exit(0);
    }

    a_h = (float *)malloc( size );    // Allocate array on host
    hipMalloc( (void **)&a_d, size ); // Allocate array on device

    // Initialize host array and copy it to CUDA device
    for ( long int i = 0; i < N; i++ )
        a_h[i] = (float)1;

    hipMemcpy( a_d, a_h, size, hipMemcpyHostToDevice );

    // kernel initialization
    hipGetDevice(&dev);
    hipGetDeviceProperties(&prop,dev);
    int block_size = prop.maxThreadsPerBlock; //ATENTION
    int n_blocks   = N / block_size + ( N % block_size == 0 ? 0 : 1 );

    while(b<N){
        passos++;
    	square_array <<< n_blocks, block_size >>> ( a_d, N,b );
        b = b*2;
        hipMemcpy( a_h, a_d, sizeof( float ) * N, hipMemcpyDeviceToHost );
        puts("\n\n");
    // Print results
      // for ( int i = 0; i < N; i++ )
          printf( " %f\n",a_h[0] ); // Cleanup
    }
    // Retrieve result from device and store it in host array

    printf("\n\tPASSOS: %d", passos);
    free( a_h );
    hipFree( a_d );
    return 0;
}

	.text
	.file	"soma_albert.hip"
	.globl	_Z27__device_stub__square_arrayPfll # -- Begin function _Z27__device_stub__square_arrayPfll
	.type	_Z27__device_stub__square_arrayPfll,@function
_Z27__device_stub__square_arrayPfll:    # @_Z27__device_stub__square_arrayPfll
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12square_arrayPfll, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__square_arrayPfll, .Lfunc_end0-_Z27__device_stub__square_arrayPfll
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$1488, %rsp                     # imm = 0x5D0
	.cfi_def_cfa_offset 1536
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	12(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	cmpl	$0, (%rbx)
	je	.LBB1_8
# %bb.1:
	movl	$120000, %edi                   # imm = 0x1D4C0
	callq	malloc
	movq	%rax, %rbx
	movq	%rsp, %rdi
	movl	$120000, %esi                   # imm = 0x1D4C0
	callq	hipMalloc
	xorl	%eax, %eax
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rbx,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$30000, %rax                    # imm = 0x7530
	jne	.LBB1_2
# %bb.3:
	movq	(%rsp), %rdi
	movl	$120000, %edx                   # imm = 0x1D4C0
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %r14
	movq	%r14, %rdi
	callq	hipGetDevice
	movl	(%r14), %esi
	leaq	16(%rsp), %r14
	movq	%r14, %rdi
	callq	hipGetDevicePropertiesR0600
	movl	320(%r14), %r14d
	movl	$30000, %eax                    # imm = 0x7530
	xorl	%edx, %edx
	idivl	%r14d
	movl	%eax, %r15d
	cmpl	$1, %edx
	sbbl	$-1, %r15d
	btsq	$32, %r15
	btsq	$32, %r14
	movl	$1, %r12d
	movl	$15, %ebp
.LBB1_4:                                # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:                                #   in Loop: Header=BB1_4 Depth=1
	movq	(%rsp), %rdi
	movl	$30000, %esi                    # imm = 0x7530
	movq	%r12, %rdx
	callq	_Z27__device_stub__square_arrayPfll
.LBB1_6:                                #   in Loop: Header=BB1_4 Depth=1
	addq	%r12, %r12
	movq	(%rsp), %rsi
	movl	$120000, %edx                   # imm = 0x1D4C0
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.1, %edi
	callq	puts
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	decl	%ebp
	jne	.LBB1_4
# %bb.7:
	movl	$.L.str.3, %edi
	movl	$15, %esi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$1488, %rsp                     # imm = 0x5D0
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_8:
	.cfi_def_cfa_offset 1536
	movl	$.Lstr, %edi
	callq	puts
	xorl	%edi, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12square_arrayPfll, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12square_arrayPfll,@object    # @_Z12square_arrayPfll
	.section	.rodata,"a",@progbits
	.globl	_Z12square_arrayPfll
	.p2align	3, 0x0
_Z12square_arrayPfll:
	.quad	_Z27__device_stub__square_arrayPfll
	.size	_Z12square_arrayPfll, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"\n\n"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" %f\n"
	.size	.L.str.2, 5

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\n\tPASSOS: %d"
	.size	.L.str.3, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12square_arrayPfll"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\nNo CUDA device found."
	.size	.Lstr, 23

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__square_arrayPfll
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12square_arrayPfll
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12square_arrayPfll    ; -- Begin function _Z12square_arrayPfll
	.globl	_Z12square_arrayPfll
	.p2align	8
	.type	_Z12square_arrayPfll,@function
_Z12square_arrayPfll:                   ; @_Z12square_arrayPfll
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_lshl_b32 s6, s4, 1
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_load_b128 s[0:3], s[0:1], 0x0
	v_alignbit_b32 v0, s5, s4, 31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v2
	v_mul_lo_u32 v3, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, s6, v1
	v_mad_u64_u32 v[0:1], null, s6, v2, s[4:5]
	v_add3_u32 v1, v3, v1, v4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[0:1]
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_lshlrev_b32_e32 v4, 1, v2
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v5, 31, v4
	v_mul_lo_u32 v6, v4, s5
	v_mad_u64_u32 v[2:3], null, v4, s4, 0
	v_mul_lo_u32 v4, v5, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v3, v6, v4
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v[2:3], off
	global_load_b32 v5, v[0:1], off
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v4, v4, v5 :: v_dual_mov_b32 v5, 0
	s_clause 0x1
	global_store_b32 v[2:3], v4, off
	global_store_b32 v[0:1], v5, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12square_arrayPfll
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12square_arrayPfll, .Lfunc_end0-_Z12square_arrayPfll
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12square_arrayPfll
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12square_arrayPfll.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
