#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
#include <time.h>
#include <math.h>

//add this if compiled by visual studio
#include <device_launch_parameters.h>

#define G 6.67e-2f
#define BLOCK_DIM 1024
#define MAX_RANGE 100.0f
#define MASS 10000.0f
#define EPS 1.0f

extern __shared__ float3 shared_s[];


void initialize(float3* h_s, float3* h_v, float3* h_a, float dt, int num_bodies) {
	int i, j;
	float3 r;
	float r2, inv_r3;
	for (i = 0; i < num_bodies; i++) {
		h_s[i].x = MAX_RANGE * rand() / (float)RAND_MAX;
		h_s[i].y = MAX_RANGE * rand() / (float)RAND_MAX;
		h_s[i].z = MAX_RANGE * rand() / (float)RAND_MAX;
	}

	for (i = 0; i < num_bodies; i++) {
		for (j = 0; j < num_bodies; j++) {
			if (i != j) {
				r.x = h_s[j].x - h_s[i].x;
				r.y = h_s[j].y - h_s[i].y;
				r.z = h_s[j].z - h_s[i].z;
				r2 = r.x*r.x + r.y*r.y + r.z*r.z + EPS;
				inv_r3 = 1.0f / sqrtf(r2*r2*r2);
				h_a[i].x += inv_r3 * r.x*MASS;
				h_a[i].y += inv_r3 * r.y*MASS;
				h_a[i].z += inv_r3 * r.z*MASS;
			}
		}
	}

	for (i = 0; i < num_bodies; i++) {
		h_v[i].x = h_a[i].x*dt*0.5;
		h_v[i].y = h_a[i].y*dt*0.5;
		h_v[i].z = h_a[i].z*dt*0.5;
	}
}

void cpu_func(float3* h_s, float3* h_v, float3* h_a, float dt, int num_bodies, int num_iteration) {
	int i, j,k;
	float3 r;
	float r2, inv_r3,total_t=0;
	FILE* fp = fopen("pos_cpu.txt","w");
	FILE* fp1 = fopen("accel_cpu.txt", "w");
	for (i = 0; i < num_iteration; i++) {
		clock_t t0 = clock();
		for (j = 0; j < num_bodies; j++) {
			h_s[j].x +=  h_v[j].x*dt;
			h_s[j].y +=  h_v[j].y*dt;
			h_s[j].z +=  h_v[j].z*dt;
			h_v[j].x +=  h_a[j].x*dt;
			h_v[j].y +=  h_a[j].y*dt;
			h_v[j].z +=  h_a[j].z*dt;
		}
		for (j = 0; j< num_bodies; j++) {
			h_a[j].x = 0;
			h_a[j].y = 0;
			h_a[j].z = 0;
			for (k = 0; k < num_bodies; k++) {
				if (j != k) {
					r.x = h_s[k].x - h_s[j].x;
					r.y = h_s[k].y - h_s[j].y;
					r.z = h_s[k].z - h_s[j].z;
					r2 = r.x*r.x + r.y*r.y + r.z*r.z + EPS;
					inv_r3 = 1.0f / sqrtf(r2*r2*r2);
					h_a[j].x += inv_r3 * r.x*MASS;
					h_a[j].y += inv_r3 * r.y*MASS;
					h_a[j].z += inv_r3 * r.z*MASS;
					//printf("cpu: ax[%d]=%.6f\n", j, h_a[j].x);
					//printf("cpu r1[%d]=%.6f r2[%d]=%.6f\n",j, h_s[j].x ,j,h_s[k].x);
				}
			}	
		}
		clock_t t1 = clock();
		printf("iteration %d, time cost %.6f\n", i, (float)(t1 - t0) / (float)CLOCKS_PER_SEC);
		total_t += (float)(t1 - t0) / (float)CLOCKS_PER_SEC;
		for (j = 0; j < num_bodies; j++) {
			fprintf(fp1, "%.6f %.6f %.6f\n", h_a[j].x, h_a[j].y, h_a[j].z);
			fprintf(fp, "%.6f %.6f %.6f\n", h_s[j].x, h_s[j].y, h_s[j].z);
		}
	}
	printf("total time %.6f, avg time per iteration %.6f\n", total_t, total_t / (float)num_iteration);
	fclose(fp);
	fclose(fp1);
}


/*
__global__ void initialize(float3* s,float3* v,float3* a,int num_bodies){

}*/

__device__ void force_calc(float3 s,int tile, int num_bodies, float3* a) {
	int i,N=BLOCK_DIM;
	float3 r;
	float r2, inv_r3;
	if ((tile + 1)*BLOCK_DIM > num_bodies) {
		N = num_bodies % BLOCK_DIM;
	}
	//printf("gidx=%d\t", blockDim.x*blockIdx.x + threadIdx.x);
	for (i = 0; i < N; i++) {
		//if (i!=check_idx) {
			r.x = shared_s[i].x - s.x;
			r.y = shared_s[i].y - s.y;
			r.z = shared_s[i].z - s.z;
			r2 = r.x*r.x + r.y*r.y + r.z*r.z + EPS;
			inv_r3 = 1.0f / sqrtf(r2*r2*r2);
			(*a).x += inv_r3 * r.x*MASS;
			(*a).y += inv_r3 * r.y*MASS;
			(*a).z += inv_r3 * r.z*MASS;
			//printf("gpu r1=%.6f r2=%.6f gidx=%d\n", s.x,shared_s[i].x, blockDim.x*blockIdx.x + threadIdx.x);
		//}
		
		
	}
}


__global__ void accel_update(float3* s, float3* a, int num_bodies,int total_elem) {
	int gidx = blockDim.x*blockIdx.x + threadIdx.x;
	float3 accel = { 0.0f,0.0f,0.0f }, myPos;
	int idx, i, tile = 0;

	//if (gidx < num_bodies) 
	myPos = s[gidx];
	
	
	for (i = 0; i < num_bodies; i += blockDim.x) {
		idx = tile * blockDim.x + threadIdx.x;
		if (idx <= total_elem) {
			shared_s[threadIdx.x] = s[idx];
			__syncthreads();
			force_calc(myPos,tile,num_bodies,&accel);
			__syncthreads();
			tile++;
		}
	}
	
	a[gidx] = accel;
	
}

__global__ void pos_update(float3* s, float3* v, float3* a, float dt, int num_bodies) {
	int i = blockDim.x*blockIdx.x + threadIdx.x;
	if (i < num_bodies) {
		s[i].x += v[i].x*dt;
		s[i].y += v[i].y*dt;
		s[i].z += v[i].z*dt;
		v[i].x += a[i].x*dt;
		v[i].y += a[i].y*dt;
		v[i].z += a[i].z*dt;
	}
}

void gpu_func(float3* s, float3* v, float3* a, float3* h_s, float3* h_a, float dt, int num_bodies, int total_elem, int num_iteration) {
	int i, j;
	FILE *fp = fopen("pos.txt", "w");
	FILE *fp1 = fopen("accel.txt", "w");
	float total_t = 0;
	for (i = 0; i < num_iteration; i++) {
		clock_t t0 = clock();
		pos_update <<<(num_bodies + BLOCK_DIM - 1) / BLOCK_DIM, BLOCK_DIM ,sizeof(float3)*BLOCK_DIM>>> (s, v, a, dt, num_bodies);
		cudaDeviceSynchronize();
		accel_update <<<(num_bodies + BLOCK_DIM - 1) / BLOCK_DIM, BLOCK_DIM, sizeof(float3)*BLOCK_DIM >>> (s, a, num_bodies, total_elem);
		cudaDeviceSynchronize();
		clock_t t1 = clock();
		printf("iteration %d, time cost %.6f\n", i, (float)(t1 - t0) /(float)CLOCKS_PER_SEC);
		total_t += (float)(t1 - t0) / (float)CLOCKS_PER_SEC;
		cudaMemcpy(h_s, s, total_elem * sizeof(float3), cudaMemcpyDeviceToHost);
		cudaMemcpy( h_a, a, total_elem * sizeof(float3), cudaMemcpyDeviceToHost );
		for (j = 0; j < num_bodies; j++) {
			fprintf(fp, "%.6f %.6f %.6f\n", h_s[j].x, h_s[j].y, h_s[j].z);
			fprintf(fp1, "%.6f %.6f %.6f\n", h_a[j].x, h_a[j].y, h_a[j].z);
		}
	}
	printf("total time %.6f, avg time per iteration %.6f\n", total_t, total_t/(float)num_iteration);
	fclose(fp);
	fclose(fp1);
}


int main(int argc, char *argv[]) {
	if (argc < 2) {
		printf("Error: wrong number of args\n");
		exit(0);
	}
	int num_bodies = atoi(argv[1]);
	float dt = 1;
	if (argc > 2) dt = atof(argv[2]);
	int num_iteration = 10;
	if (argc > 3) num_iteration = atoi(argv[3]);

	int D = (num_bodies + BLOCK_DIM - 1) / BLOCK_DIM;
	int total_elem = D * BLOCK_DIM;

	//host memory allocation
	float3 *h_s, *h_v, *h_a;
		cudaError_t err00 = cudaMallocHost((void**)&h_s, total_elem * sizeof(float3));
	if (err00 != cudaSuccess) {
		printf("%s in %s at line %d\n", cudaGetErrorString(err00), __FILE__, __LINE__);
	}
	cudaError_t err01 = cudaMallocHost((void**)&h_v, total_elem * sizeof(float3));
	if (err01 != cudaSuccess) {
		printf("%s in %s at line %d\n", cudaGetErrorString(err01), __FILE__, __LINE__);
	}
	cudaError_t err02 = cudaMallocHost((void**)&h_a, total_elem * sizeof(float3));
	if (err02 != cudaSuccess) {
		printf("%s in %s at line %d\n", cudaGetErrorString(err02), __FILE__, __LINE__);
	}

	//initialization
	initialize(h_s, h_v, h_a, dt, num_bodies);

	//device memory allocation
	float3 *s, *v, *a;
	cudaError_t err10 = cudaMalloc((void**)&s, total_elem * sizeof(float3));
	if (err10 != cudaSuccess) {
		printf("%s in %s at line %d\n", cudaGetErrorString(err10), __FILE__, __LINE__);
	}
	cudaError_t err11 = cudaMalloc((void**)&v, total_elem * sizeof(float3));
	if (err11 != cudaSuccess) {
		printf("%s in %s at line %d\n", cudaGetErrorString(err11), __FILE__, __LINE__);
	}
	cudaError_t err12 = cudaMalloc((void**)&a, total_elem * sizeof(float3));
	if (err12 != cudaSuccess) {
		printf("%s in %s at line %d\n", cudaGetErrorString(err12), __FILE__, __LINE__);
	}

	//copy initialized data from host to device
	cudaError_t err20 = cudaMemcpy(s, h_s, total_elem * sizeof(float3), cudaMemcpyHostToDevice);
	if (err20 != cudaSuccess) {
		printf("%s in %s at line %d\n", cudaGetErrorString(err20), __FILE__, __LINE__);
	}
	cudaError_t err21 = cudaMemcpy(v, h_v, total_elem * sizeof(float3), cudaMemcpyHostToDevice);
	if (err21 != cudaSuccess) {
		printf("%s in %s at line %d\n", cudaGetErrorString(err21), __FILE__, __LINE__);
	}
	cudaError_t err22 = cudaMemcpy(a, h_a, total_elem * sizeof(float3), cudaMemcpyHostToDevice);
	if (err22 != cudaSuccess) {
		printf("%s in %s at line %d\n", cudaGetErrorString(err22), __FILE__, __LINE__);
	}
	//cpu code
	printf("cpu code is running....\n");
	cpu_func(h_s,h_v,h_a,dt,num_bodies, num_iteration);
	printf("gpu code is running....\n");
	//run gpu code
	gpu_func(s, v, a, h_s, h_a, dt, num_bodies, total_elem, num_iteration);

	

	cudaDeviceReset();
	cudaFree(s); cudaFree(v); cudaFree(a);
	cudaFreeHost(h_s); cudaFreeHost(h_v); cudaFreeHost(h_a);
}
	.file	"tmpxft_002d08e6_00000000-6_gpu_n_bodies.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10initializeP6float3S0_S0_fi
	.type	_Z10initializeP6float3S0_S0_fi, @function
_Z10initializeP6float3S0_S0_fi:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movaps	%xmm0, %xmm5
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%ecx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
.L3:
	cmpl	%r13d, %r15d
	jge	.L14
	movss	%xmm5, 12(%rsp)
	incl	%r15d
	addq	$12, %rbp
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	mulss	.LC1(%rip), %xmm0
	movss	%xmm0, -12(%rbp)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	mulss	.LC1(%rip), %xmm0
	movss	%xmm0, -8(%rbp)
	call	rand@PLT
	movss	12(%rsp), %xmm5
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	mulss	.LC1(%rip), %xmm0
	movss	%xmm0, -4(%rbp)
	jmp	.L3
.L14:
	xorl	%ebp, %ebp
	xorl	%eax, %eax
	movslq	%r13d, %rcx
.L5:
	cmpl	%r13d, %eax
	jge	.L15
	movq	%r12, %r15
	xorl	%edx, %edx
.L7:
	cmpl	%edx, %eax
	je	.L6
	movss	(%r15), %xmm3
	movss	4(%r15), %xmm2
	movq	%rcx, 40(%rsp)
	subss	(%r12,%rbp), %xmm3
	subss	4(%r12,%rbp), %xmm2
	movq	%rdx, 24(%rsp)
	movss	8(%r15), %xmm1
	subss	8(%r12,%rbp), %xmm1
	movl	%eax, 32(%rsp)
	movss	%xmm5, 36(%rsp)
	movaps	%xmm3, %xmm4
	movaps	%xmm2, %xmm0
	movss	%xmm3, 20(%rsp)
	mulss	%xmm2, %xmm0
	movss	%xmm2, 16(%rsp)
	mulss	%xmm3, %xmm4
	movss	%xmm1, 12(%rsp)
	addss	%xmm0, %xmm4
	movaps	%xmm1, %xmm0
	mulss	%xmm1, %xmm0
	addss	%xmm0, %xmm4
	addss	.LC2(%rip), %xmm4
	movaps	%xmm4, %xmm0
	mulss	%xmm4, %xmm0
	mulss	%xmm4, %xmm0
	call	sqrtf@PLT
	movss	20(%rsp), %xmm3
	movq	40(%rsp), %rcx
	movss	.LC2(%rip), %xmm4
	movss	16(%rsp), %xmm2
	movss	12(%rsp), %xmm1
	movss	36(%rsp), %xmm5
	divss	%xmm0, %xmm4
	movss	.LC3(%rip), %xmm0
	movq	24(%rsp), %rdx
	movl	32(%rsp), %eax
	mulss	%xmm4, %xmm3
	mulss	%xmm4, %xmm2
	mulss	%xmm4, %xmm1
	mulss	%xmm0, %xmm3
	mulss	%xmm0, %xmm2
	addss	(%rbx,%rbp), %xmm3
	mulss	%xmm0, %xmm1
	addss	4(%rbx,%rbp), %xmm2
	addss	8(%rbx,%rbp), %xmm1
	movss	%xmm3, (%rbx,%rbp)
	movss	%xmm2, 4(%rbx,%rbp)
	movss	%xmm1, 8(%rbx,%rbp)
.L6:
	incq	%rdx
	addq	$12, %r15
	cmpq	%rcx, %rdx
	jne	.L7
	incl	%eax
	addq	$12, %rbp
	jmp	.L5
.L15:
	movss	.LC4(%rip), %xmm0
	xorl	%eax, %eax
	xorl	%edx, %edx
.L9:
	cmpl	%r13d, %edx
	jge	.L16
	movss	(%rbx,%rax), %xmm1
	incl	%edx
	mulss	%xmm5, %xmm1
	mulss	%xmm0, %xmm1
	movss	%xmm1, (%r14,%rax)
	movss	4(%rbx,%rax), %xmm1
	mulss	%xmm5, %xmm1
	mulss	%xmm0, %xmm1
	movss	%xmm1, 4(%r14,%rax)
	movss	8(%rbx,%rax), %xmm1
	mulss	%xmm5, %xmm1
	mulss	%xmm0, %xmm1
	movss	%xmm1, 8(%r14,%rax)
	addq	$12, %rax
	jmp	.L9
.L16:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10initializeP6float3S0_S0_fi, .-_Z10initializeP6float3S0_S0_fi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC6:
	.string	"w"
.LC7:
	.string	"pos_cpu.txt"
.LC8:
	.string	"accel_cpu.txt"
.LC10:
	.string	"iteration %d, time cost %.6f\n"
.LC11:
	.string	"%.6f %.6f %.6f\n"
.LC12:
	.string	"total time %.6f, avg time per iteration %.6f\n"
	.text
	.globl	_Z8cpu_funcP6float3S0_S0_fii
	.type	_Z8cpu_funcP6float3S0_S0_fii, @function
_Z8cpu_funcP6float3S0_S0_fii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leaq	.LC6(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r13, %rsi
	movl	%ecx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	leaq	.LC7(%rip), %rdi
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movl	%r8d, 28(%rsp)
	movss	%xmm0, (%rsp)
	call	fopen@PLT
	movq	%r13, %rsi
	leaq	.LC8(%rip), %rdi
	movq	%rax, 8(%rsp)
	call	fopen@PLT
	movl	$0x00000000, 4(%rsp)
	movq	%rax, 16(%rsp)
	xorl	%eax, %eax
	movl	%eax, 24(%rsp)
	movslq	%r12d, %rax
	movq	%rax, 40(%rsp)
.L18:
	movl	28(%rsp), %edx
	cmpl	%edx, 24(%rsp)
	jge	.L30
	call	clock@PLT
	xorl	%edx, %edx
	movq	%rax, 32(%rsp)
	xorl	%eax, %eax
.L19:
	cmpl	%r12d, %edx
	jge	.L31
	movss	(%rsp), %xmm0
	mulss	(%r15,%rax), %xmm0
	incl	%edx
	addss	(%rbx,%rax), %xmm0
	movss	%xmm0, (%rbx,%rax)
	movss	(%rsp), %xmm0
	mulss	4(%r15,%rax), %xmm0
	addss	4(%rbx,%rax), %xmm0
	movss	%xmm0, 4(%rbx,%rax)
	movss	(%rsp), %xmm0
	mulss	8(%r15,%rax), %xmm0
	addss	8(%rbx,%rax), %xmm0
	movss	%xmm0, 8(%rbx,%rax)
	movss	(%rsp), %xmm0
	mulss	0(%rbp,%rax), %xmm0
	addss	(%r15,%rax), %xmm0
	movss	%xmm0, (%r15,%rax)
	movss	(%rsp), %xmm0
	mulss	4(%rbp,%rax), %xmm0
	addss	4(%r15,%rax), %xmm0
	movss	%xmm0, 4(%r15,%rax)
	movss	(%rsp), %xmm0
	mulss	8(%rbp,%rax), %xmm0
	addss	8(%r15,%rax), %xmm0
	movss	%xmm0, 8(%r15,%rax)
	addq	$12, %rax
	jmp	.L19
.L31:
	movq	%rbx, %r14
	movq	%rbp, %r13
	movq	%rbp, %rax
	movq	%rbx, %rdx
	xorl	%esi, %esi
.L21:
	cmpl	%r12d, %esi
	jge	.L32
	movl	$0x00000000, (%rax)
	movq	%rbx, %rcx
	xorl	%edi, %edi
	movl	$0x00000000, 4(%rax)
	movl	$0x00000000, 8(%rax)
.L23:
	cmpl	%edi, %esi
	je	.L22
	movss	(%rcx), %xmm3
	movss	4(%rcx), %xmm2
	movq	%rax, 88(%rsp)
	subss	(%rdx), %xmm3
	subss	4(%rdx), %xmm2
	movq	%rdi, 80(%rsp)
	movss	8(%rcx), %xmm1
	subss	8(%rdx), %xmm1
	movl	%esi, 76(%rsp)
	movq	%rcx, 64(%rsp)
	movaps	%xmm3, %xmm4
	movaps	%xmm2, %xmm0
	movq	%rdx, 56(%rsp)
	mulss	%xmm2, %xmm0
	movss	%xmm3, 72(%rsp)
	mulss	%xmm3, %xmm4
	movss	%xmm2, 52(%rsp)
	movss	%xmm1, 48(%rsp)
	addss	%xmm0, %xmm4
	movaps	%xmm1, %xmm0
	mulss	%xmm1, %xmm0
	addss	%xmm0, %xmm4
	addss	.LC2(%rip), %xmm4
	movaps	%xmm4, %xmm0
	mulss	%xmm4, %xmm0
	mulss	%xmm4, %xmm0
	call	sqrtf@PLT
	movss	72(%rsp), %xmm3
	movq	88(%rsp), %rax
	movss	.LC2(%rip), %xmm4
	movss	52(%rsp), %xmm2
	movss	48(%rsp), %xmm1
	movq	80(%rsp), %rdi
	divss	%xmm0, %xmm4
	movl	76(%rsp), %esi
	movq	64(%rsp), %rcx
	movss	.LC3(%rip), %xmm0
	movq	56(%rsp), %rdx
	mulss	%xmm4, %xmm3
	mulss	%xmm4, %xmm2
	mulss	%xmm4, %xmm1
	mulss	%xmm0, %xmm3
	mulss	%xmm0, %xmm2
	addss	(%rax), %xmm3
	mulss	%xmm0, %xmm1
	addss	4(%rax), %xmm2
	addss	8(%rax), %xmm1
	movss	%xmm3, (%rax)
	movss	%xmm2, 4(%rax)
	movss	%xmm1, 8(%rax)
.L22:
	movq	40(%rsp), %r9
	incq	%rdi
	addq	$12, %rcx
	cmpq	%r9, %rdi
	jne	.L23
	incl	%esi
	addq	$12, %rdx
	addq	$12, %rax
	jmp	.L21
.L32:
	call	clock@PLT
	movq	32(%rsp), %rcx
	movl	24(%rsp), %edx
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	subq	%rcx, %rax
	cvtsi2ssq	%rax, %xmm1
	movb	$1, %al
	divss	.LC9(%rip), %xmm1
	movss	%xmm1, 32(%rsp)
	cvtss2sd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movss	32(%rsp), %xmm1
	xorl	%ecx, %ecx
	addss	4(%rsp), %xmm1
	movss	%xmm1, 4(%rsp)
.L25:
	cmpl	%r12d, %ecx
	jge	.L33
	movq	16(%rsp), %rdi
	movl	$2, %esi
	movb	$3, %al
	movl	%ecx, 32(%rsp)
	leaq	.LC11(%rip), %rdx
	cvtss2sd	0(%r13), %xmm0
	cvtss2sd	8(%r13), %xmm2
	cvtss2sd	4(%r13), %xmm1
	call	__fprintf_chk@PLT
	movq	8(%rsp), %rdi
	movb	$3, %al
	addq	$12, %r13
	leaq	.LC11(%rip), %rdx
	movl	$2, %esi
	addq	$12, %r14
	cvtss2sd	-12(%r14), %xmm0
	cvtss2sd	-4(%r14), %xmm2
	cvtss2sd	-8(%r14), %xmm1
	call	__fprintf_chk@PLT
	movl	32(%rsp), %ecx
	incl	%ecx
	jmp	.L25
.L33:
	incl	24(%rsp)
	jmp	.L18
.L30:
	cvtsi2ssl	%edx, %xmm0
	movss	4(%rsp), %xmm1
	leaq	.LC12(%rip), %rsi
	movb	$2, %al
	movl	$2, %edi
	divss	%xmm0, %xmm1
	cvtss2sd	4(%rsp), %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	fclose@PLT
	movq	16(%rsp), %rdi
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z8cpu_funcP6float3S0_S0_fii, .-_Z8cpu_funcP6float3S0_S0_fii
	.globl	_Z10force_calc6float3iiPS_
	.type	_Z10force_calc6float3iiPS_, @function
_Z10force_calc6float3iiPS_:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movl	$1, 28(%rsp)
	movl	28(%rsp), %edi
	movq	%xmm0, (%rsp)
	movss	%xmm1, 8(%rsp)
	call	exit@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z10force_calc6float3iiPS_, .-_Z10force_calc6float3iiPS_
	.globl	_Z43__device_stub__Z12accel_updateP6float3S0_iiP6float3S0_ii
	.type	_Z43__device_stub__Z12accel_updateP6float3S0_iiP6float3S0_ii, @function
_Z43__device_stub__Z12accel_updateP6float3S0_iiP6float3S0_ii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12accel_updateP6float3S0_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L36:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z43__device_stub__Z12accel_updateP6float3S0_iiP6float3S0_ii, .-_Z43__device_stub__Z12accel_updateP6float3S0_iiP6float3S0_ii
	.globl	_Z12accel_updateP6float3S0_ii
	.type	_Z12accel_updateP6float3S0_ii, @function
_Z12accel_updateP6float3S0_ii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z12accel_updateP6float3S0_iiP6float3S0_ii
	.cfi_endproc
.LFE2057:
	.size	_Z12accel_updateP6float3S0_ii, .-_Z12accel_updateP6float3S0_ii
	.globl	_Z44__device_stub__Z10pos_updateP6float3S0_S0_fiP6float3S0_S0_fi
	.type	_Z44__device_stub__Z10pos_updateP6float3S0_S0_fiP6float3S0_S0_fi, @function
_Z44__device_stub__Z10pos_updateP6float3S0_S0_fiP6float3S0_S0_fi:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, (%rsp)
	leaq	40(%rsp), %rcx
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10pos_updateP6float3S0_S0_fi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L41:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
	call	__stack_chk_fail@PLT
.L43:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z44__device_stub__Z10pos_updateP6float3S0_S0_fiP6float3S0_S0_fi, .-_Z44__device_stub__Z10pos_updateP6float3S0_S0_fiP6float3S0_S0_fi
	.globl	_Z10pos_updateP6float3S0_S0_fi
	.type	_Z10pos_updateP6float3S0_S0_fi, @function
_Z10pos_updateP6float3S0_S0_fi:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z10pos_updateP6float3S0_S0_fiP6float3S0_S0_fi
	.cfi_endproc
.LFE2059:
	.size	_Z10pos_updateP6float3S0_S0_fi, .-_Z10pos_updateP6float3S0_S0_fi
	.section	.rodata.str1.1
.LC13:
	.string	"pos.txt"
.LC14:
	.string	"accel.txt"
	.text
	.globl	_Z8gpu_funcP6float3S0_S0_S0_S0_fiii
	.type	_Z8gpu_funcP6float3S0_S0_S0_S0_fiii, @function
_Z8gpu_funcP6float3S0_S0_S0_S0_fiii:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movabsq	$4294968320, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	leaq	.LC6(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r9d, %ebx
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movl	192(%rsp), %eax
	movq	%rdi, 8(%rsp)
	leaq	.LC13(%rip), %rdi
	movq	%rsi, 72(%rsp)
	movq	%rbp, %rsi
	movl	200(%rsp), %r15d
	movq	%rdx, 16(%rsp)
	movq	%rcx, 48(%rsp)
	movq	%r8, 56(%rsp)
	movss	%xmm0, 84(%rsp)
	movl	%eax, 68(%rsp)
	call	fopen@PLT
	movq	%rbp, %rsi
	leaq	.LC14(%rip), %rdi
	movq	%rax, 32(%rsp)
	call	fopen@PLT
	movl	$1024, %ecx
	movl	$0x00000000, 64(%rsp)
	movq	%rax, 40(%rsp)
	leal	1023(%rbx), %eax
	cltd
	idivl	%ecx
	movl	%eax, 80(%rsp)
	movslq	68(%rsp), %rax
	imulq	$12, %rax, %rax
	movq	%rax, 24(%rsp)
.L47:
	cmpl	%r15d, %r12d
	jge	.L54
	call	clock@PLT
	xorl	%r9d, %r9d
	movq	%r13, %rdx
	movl	$1, %ecx
	movq	%rax, %r14
	movl	80(%rsp), %eax
	movl	$12288, %r8d
	movq	%r13, 116(%rsp)
	movl	$1, 124(%rsp)
	movl	%eax, 104(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 108(%rsp)
	movq	104(%rsp), %rdi
	movl	112(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	movss	84(%rsp), %xmm0
	movq	16(%rsp), %rdx
	movl	%ebx, %ecx
	movq	72(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z44__device_stub__Z10pos_updateP6float3S0_S0_fiP6float3S0_S0_fi
.L48:
	call	cudaDeviceSynchronize@PLT
	movl	80(%rsp), %eax
	xorl	%r9d, %r9d
	movq	%r13, %rdx
	movl	$12288, %r8d
	movl	$1, %ecx
	movq	%r13, 116(%rsp)
	movl	%eax, 104(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 108(%rsp)
	movq	104(%rsp), %rdi
	movl	112(%rsp), %esi
	movl	$1, 124(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	movl	68(%rsp), %ecx
	movq	16(%rsp), %rsi
	movl	%ebx, %edx
	movq	8(%rsp), %rdi
	call	_Z43__device_stub__Z12accel_updateP6float3S0_iiP6float3S0_ii
.L49:
	call	cudaDeviceSynchronize@PLT
	call	clock@PLT
	movl	%r12d, %edx
	movl	$2, %edi
	leaq	.LC10(%rip), %rsi
	subq	%r14, %rax
	xorl	%r14d, %r14d
	cvtsi2ssq	%rax, %xmm1
	movb	$1, %al
	divss	.LC9(%rip), %xmm1
	cvtss2sd	%xmm1, %xmm0
	movss	%xmm1, 88(%rsp)
	call	__printf_chk@PLT
	movss	88(%rsp), %xmm1
	addss	64(%rsp), %xmm1
	movl	$2, %ecx
	movq	24(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	48(%rsp), %rdi
	movss	%xmm1, 64(%rsp)
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	56(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rcx
	movq	56(%rsp), %rbp
.L50:
	cmpl	%ebx, %r14d
	jge	.L55
	movq	32(%rsp), %rdi
	leaq	.LC11(%rip), %rdx
	movl	$2, %esi
	movb	$3, %al
	cvtss2sd	(%rcx), %xmm0
	cvtss2sd	8(%rcx), %xmm2
	cvtss2sd	4(%rcx), %xmm1
	incl	%r14d
	movq	%rcx, 88(%rsp)
	addq	$12, %rbp
	call	__fprintf_chk@PLT
	movq	40(%rsp), %rdi
	leaq	.LC11(%rip), %rdx
	movb	$3, %al
	movl	$2, %esi
	cvtss2sd	-12(%rbp), %xmm0
	cvtss2sd	-4(%rbp), %xmm2
	cvtss2sd	-8(%rbp), %xmm1
	call	__fprintf_chk@PLT
	movq	88(%rsp), %rcx
	addq	$12, %rcx
	jmp	.L50
.L55:
	incl	%r12d
	jmp	.L47
.L54:
	cvtsi2ssl	%r15d, %xmm0
	movss	64(%rsp), %xmm1
	leaq	.LC12(%rip), %rsi
	movb	$2, %al
	movl	$2, %edi
	divss	%xmm0, %xmm1
	cvtss2sd	64(%rsp), %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	call	fclose@PLT
	movq	40(%rsp), %rdi
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z8gpu_funcP6float3S0_S0_S0_S0_fiii, .-_Z8gpu_funcP6float3S0_S0_S0_S0_fiii
	.section	.rodata.str1.1
.LC15:
	.string	"Error: wrong number of args\n"
.LC16:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/haldarritam/N-Body-Simulation-CUDA/master/Backup/Johnny/gpu_n_bodies.cu"
.LC17:
	.string	"%s in %s at line %d\n"
.LC18:
	.string	"cpu code is running....\n"
.LC19:
	.string	"gpu code is running....\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	cmpl	$1, %edi
	jg	.L57
	movl	$2, %edi
	leaq	.LC15(%rip), %rsi
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	exit@PLT
.L57:
	movl	%edi, %r12d
	movq	8(%rsi), %rdi
	movq	%rsi, %rbx
	call	atoi@PLT
	movl	%eax, %ebp
	cmpl	$2, %r12d
	je	.L69
	movq	16(%rbx), %rdi
	movl	$10, %r13d
	call	atof@PLT
	cvtsd2ss	%xmm0, %xmm1
	movd	%xmm1, %r14d
	cmpl	$3, %r12d
	je	.L58
	movq	24(%rbx), %rdi
	call	atoi@PLT
	movl	%eax, %r13d
	jmp	.L58
.L69:
	movss	.LC2(%rip), %xmm2
	movl	$10, %r13d
	movd	%xmm2, %r14d
.L58:
	leal	1023(%rbp), %r12d
	movl	$1024, %ecx
	leaq	8(%rsp), %rdi
	movl	%r12d, %eax
	cltd
	idivl	%ecx
	subl	%edx, %r12d
	movslq	%r12d, %rbx
	imulq	$12, %rbx, %rbx
	movq	%rbx, %rsi
	call	cudaMallocHost@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L59
	call	cudaGetErrorString@PLT
	movl	$212, %r8d
	movl	$2, %edi
	leaq	.LC16(%rip), %rcx
	movq	%rax, %rdx
	leaq	.LC17(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L59:
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMallocHost@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L60
	call	cudaGetErrorString@PLT
	movl	$216, %r8d
	movl	$2, %edi
	leaq	.LC16(%rip), %rcx
	movq	%rax, %rdx
	leaq	.LC17(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L60:
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMallocHost@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L61
	call	cudaGetErrorString@PLT
	movl	$220, %r8d
	movl	$2, %edi
	leaq	.LC16(%rip), %rcx
	movq	%rax, %rdx
	leaq	.LC17(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L61:
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	%ebp, %ecx
	movd	%r14d, %xmm0
	movq	8(%rsp), %rdi
	call	_Z10initializeP6float3S0_S0_fi
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L62
	call	cudaGetErrorString@PLT
	movl	$230, %r8d
	movl	$2, %edi
	leaq	.LC16(%rip), %rcx
	movq	%rax, %rdx
	leaq	.LC17(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L62:
	leaq	40(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L63
	call	cudaGetErrorString@PLT
	movl	$234, %r8d
	movl	$2, %edi
	leaq	.LC16(%rip), %rcx
	movq	%rax, %rdx
	leaq	.LC17(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L63:
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L64
	call	cudaGetErrorString@PLT
	movl	$238, %r8d
	movl	$2, %edi
	leaq	.LC16(%rip), %rcx
	movq	%rax, %rdx
	leaq	.LC17(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L64:
	movq	32(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L65
	call	cudaGetErrorString@PLT
	movl	$244, %r8d
	movl	$2, %edi
	leaq	.LC16(%rip), %rcx
	movq	%rax, %rdx
	leaq	.LC17(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L65:
	movq	40(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L66
	call	cudaGetErrorString@PLT
	movl	$248, %r8d
	movl	$2, %edi
	leaq	.LC16(%rip), %rcx
	movq	%rax, %rdx
	leaq	.LC17(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L66:
	movq	48(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L67
	call	cudaGetErrorString@PLT
	movl	$252, %r8d
	movl	$2, %edi
	leaq	.LC16(%rip), %rcx
	movq	%rax, %rdx
	leaq	.LC17(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L67:
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	24(%rsp), %rdx
	movl	%r13d, %r8d
	movl	%ebp, %ecx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movd	%r14d, %xmm0
	call	_Z8cpu_funcP6float3S0_S0_fii
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	pushq	%r13
	.cfi_def_cfa_offset 120
	movl	%ebp, %r9d
	movd	%r14d, %xmm0
	pushq	%r12
	.cfi_def_cfa_offset 128
	movq	40(%rsp), %r8
	movq	24(%rsp), %rcx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	movq	64(%rsp), %rdx
	call	_Z8gpu_funcP6float3S0_S0_S0_S0_fiii
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
	call	cudaDeviceReset@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	16(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	24(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L68
	call	__stack_chk_fail@PLT
.L68:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC20:
	.string	"_Z10pos_updateP6float3S0_S0_fi"
.LC21:
	.string	"_Z12accel_updateP6float3S0_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10pos_updateP6float3S0_S0_fi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC21(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12accel_updateP6float3S0_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2061:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1120403456
	.align 4
.LC1:
	.long	805306368
	.align 4
.LC2:
	.long	1065353216
	.align 4
.LC3:
	.long	1176256512
	.align 4
.LC4:
	.long	1056964608
	.align 4
.LC9:
	.long	1232348160
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <time.h>
#include <math.h>

//add this if compiled by visual studio


#define G 6.67e-2f
#define BLOCK_DIM 1024
#define MAX_RANGE 100.0f
#define MASS 10000.0f
#define EPS 1.0f

extern __shared__ float3 shared_s[];


void initialize(float3* h_s, float3* h_v, float3* h_a, float dt, int num_bodies) {
	int i, j;
	float3 r;
	float r2, inv_r3;
	for (i = 0; i < num_bodies; i++) {
		h_s[i].x = MAX_RANGE * rand() / (float)RAND_MAX;
		h_s[i].y = MAX_RANGE * rand() / (float)RAND_MAX;
		h_s[i].z = MAX_RANGE * rand() / (float)RAND_MAX;
	}

	for (i = 0; i < num_bodies; i++) {
		for (j = 0; j < num_bodies; j++) {
			if (i != j) {
				r.x = h_s[j].x - h_s[i].x;
				r.y = h_s[j].y - h_s[i].y;
				r.z = h_s[j].z - h_s[i].z;
				r2 = r.x*r.x + r.y*r.y + r.z*r.z + EPS;
				inv_r3 = 1.0f / sqrtf(r2*r2*r2);
				h_a[i].x += inv_r3 * r.x*MASS;
				h_a[i].y += inv_r3 * r.y*MASS;
				h_a[i].z += inv_r3 * r.z*MASS;
			}
		}
	}

	for (i = 0; i < num_bodies; i++) {
		h_v[i].x = h_a[i].x*dt*0.5;
		h_v[i].y = h_a[i].y*dt*0.5;
		h_v[i].z = h_a[i].z*dt*0.5;
	}
}

void cpu_func(float3* h_s, float3* h_v, float3* h_a, float dt, int num_bodies, int num_iteration) {
	int i, j,k;
	float3 r;
	float r2, inv_r3,total_t=0;
	FILE* fp = fopen("pos_cpu.txt","w");
	FILE* fp1 = fopen("accel_cpu.txt", "w");
	for (i = 0; i < num_iteration; i++) {
		clock_t t0 = clock();
		for (j = 0; j < num_bodies; j++) {
			h_s[j].x +=  h_v[j].x*dt;
			h_s[j].y +=  h_v[j].y*dt;
			h_s[j].z +=  h_v[j].z*dt;
			h_v[j].x +=  h_a[j].x*dt;
			h_v[j].y +=  h_a[j].y*dt;
			h_v[j].z +=  h_a[j].z*dt;
		}
		for (j = 0; j< num_bodies; j++) {
			h_a[j].x = 0;
			h_a[j].y = 0;
			h_a[j].z = 0;
			for (k = 0; k < num_bodies; k++) {
				if (j != k) {
					r.x = h_s[k].x - h_s[j].x;
					r.y = h_s[k].y - h_s[j].y;
					r.z = h_s[k].z - h_s[j].z;
					r2 = r.x*r.x + r.y*r.y + r.z*r.z + EPS;
					inv_r3 = 1.0f / sqrtf(r2*r2*r2);
					h_a[j].x += inv_r3 * r.x*MASS;
					h_a[j].y += inv_r3 * r.y*MASS;
					h_a[j].z += inv_r3 * r.z*MASS;
					//printf("cpu: ax[%d]=%.6f\n", j, h_a[j].x);
					//printf("cpu r1[%d]=%.6f r2[%d]=%.6f\n",j, h_s[j].x ,j,h_s[k].x);
				}
			}	
		}
		clock_t t1 = clock();
		printf("iteration %d, time cost %.6f\n", i, (float)(t1 - t0) / (float)CLOCKS_PER_SEC);
		total_t += (float)(t1 - t0) / (float)CLOCKS_PER_SEC;
		for (j = 0; j < num_bodies; j++) {
			fprintf(fp1, "%.6f %.6f %.6f\n", h_a[j].x, h_a[j].y, h_a[j].z);
			fprintf(fp, "%.6f %.6f %.6f\n", h_s[j].x, h_s[j].y, h_s[j].z);
		}
	}
	printf("total time %.6f, avg time per iteration %.6f\n", total_t, total_t / (float)num_iteration);
	fclose(fp);
	fclose(fp1);
}


/*
__global__ void initialize(float3* s,float3* v,float3* a,int num_bodies){

}*/

__device__ void force_calc(float3 s,int tile, int num_bodies, float3* a) {
	int i,N=BLOCK_DIM;
	float3 r;
	float r2, inv_r3;
	if ((tile + 1)*BLOCK_DIM > num_bodies) {
		N = num_bodies % BLOCK_DIM;
	}
	//printf("gidx=%d\t", blockDim.x*blockIdx.x + threadIdx.x);
	for (i = 0; i < N; i++) {
		//if (i!=check_idx) {
			r.x = shared_s[i].x - s.x;
			r.y = shared_s[i].y - s.y;
			r.z = shared_s[i].z - s.z;
			r2 = r.x*r.x + r.y*r.y + r.z*r.z + EPS;
			inv_r3 = 1.0f / sqrtf(r2*r2*r2);
			(*a).x += inv_r3 * r.x*MASS;
			(*a).y += inv_r3 * r.y*MASS;
			(*a).z += inv_r3 * r.z*MASS;
			//printf("gpu r1=%.6f r2=%.6f gidx=%d\n", s.x,shared_s[i].x, blockDim.x*blockIdx.x + threadIdx.x);
		//}
		
		
	}
}


__global__ void accel_update(float3* s, float3* a, int num_bodies,int total_elem) {
	int gidx = blockDim.x*blockIdx.x + threadIdx.x;
	float3 accel = { 0.0f,0.0f,0.0f }, myPos;
	int idx, i, tile = 0;

	//if (gidx < num_bodies) 
	myPos = s[gidx];
	
	
	for (i = 0; i < num_bodies; i += blockDim.x) {
		idx = tile * blockDim.x + threadIdx.x;
		if (idx <= total_elem) {
			shared_s[threadIdx.x] = s[idx];
			__syncthreads();
			force_calc(myPos,tile,num_bodies,&accel);
			__syncthreads();
			tile++;
		}
	}
	
	a[gidx] = accel;
	
}

__global__ void pos_update(float3* s, float3* v, float3* a, float dt, int num_bodies) {
	int i = blockDim.x*blockIdx.x + threadIdx.x;
	if (i < num_bodies) {
		s[i].x += v[i].x*dt;
		s[i].y += v[i].y*dt;
		s[i].z += v[i].z*dt;
		v[i].x += a[i].x*dt;
		v[i].y += a[i].y*dt;
		v[i].z += a[i].z*dt;
	}
}

void gpu_func(float3* s, float3* v, float3* a, float3* h_s, float3* h_a, float dt, int num_bodies, int total_elem, int num_iteration) {
	int i, j;
	FILE *fp = fopen("pos.txt", "w");
	FILE *fp1 = fopen("accel.txt", "w");
	float total_t = 0;
	for (i = 0; i < num_iteration; i++) {
		clock_t t0 = clock();
		pos_update <<<(num_bodies + BLOCK_DIM - 1) / BLOCK_DIM, BLOCK_DIM ,sizeof(float3)*BLOCK_DIM>>> (s, v, a, dt, num_bodies);
		hipDeviceSynchronize();
		accel_update <<<(num_bodies + BLOCK_DIM - 1) / BLOCK_DIM, BLOCK_DIM, sizeof(float3)*BLOCK_DIM >>> (s, a, num_bodies, total_elem);
		hipDeviceSynchronize();
		clock_t t1 = clock();
		printf("iteration %d, time cost %.6f\n", i, (float)(t1 - t0) /(float)CLOCKS_PER_SEC);
		total_t += (float)(t1 - t0) / (float)CLOCKS_PER_SEC;
		hipMemcpy(h_s, s, total_elem * sizeof(float3), hipMemcpyDeviceToHost);
		hipMemcpy( h_a, a, total_elem * sizeof(float3), hipMemcpyDeviceToHost );
		for (j = 0; j < num_bodies; j++) {
			fprintf(fp, "%.6f %.6f %.6f\n", h_s[j].x, h_s[j].y, h_s[j].z);
			fprintf(fp1, "%.6f %.6f %.6f\n", h_a[j].x, h_a[j].y, h_a[j].z);
		}
	}
	printf("total time %.6f, avg time per iteration %.6f\n", total_t, total_t/(float)num_iteration);
	fclose(fp);
	fclose(fp1);
}


int main(int argc, char *argv[]) {
	if (argc < 2) {
		printf("Error: wrong number of args\n");
		exit(0);
	}
	int num_bodies = atoi(argv[1]);
	float dt = 1;
	if (argc > 2) dt = atof(argv[2]);
	int num_iteration = 10;
	if (argc > 3) num_iteration = atoi(argv[3]);

	int D = (num_bodies + BLOCK_DIM - 1) / BLOCK_DIM;
	int total_elem = D * BLOCK_DIM;

	//host memory allocation
	float3 *h_s, *h_v, *h_a;
		hipError_t err00 = hipHostMalloc((void**)&h_s, total_elem * sizeof(float3), hipHostMallocDefault);
	if (err00 != hipSuccess) {
		printf("%s in %s at line %d\n", hipGetErrorString(err00), __FILE__, __LINE__);
	}
	hipError_t err01 = hipHostMalloc((void**)&h_v, total_elem * sizeof(float3), hipHostMallocDefault);
	if (err01 != hipSuccess) {
		printf("%s in %s at line %d\n", hipGetErrorString(err01), __FILE__, __LINE__);
	}
	hipError_t err02 = hipHostMalloc((void**)&h_a, total_elem * sizeof(float3), hipHostMallocDefault);
	if (err02 != hipSuccess) {
		printf("%s in %s at line %d\n", hipGetErrorString(err02), __FILE__, __LINE__);
	}

	//initialization
	initialize(h_s, h_v, h_a, dt, num_bodies);

	//device memory allocation
	float3 *s, *v, *a;
	hipError_t err10 = hipMalloc((void**)&s, total_elem * sizeof(float3));
	if (err10 != hipSuccess) {
		printf("%s in %s at line %d\n", hipGetErrorString(err10), __FILE__, __LINE__);
	}
	hipError_t err11 = hipMalloc((void**)&v, total_elem * sizeof(float3));
	if (err11 != hipSuccess) {
		printf("%s in %s at line %d\n", hipGetErrorString(err11), __FILE__, __LINE__);
	}
	hipError_t err12 = hipMalloc((void**)&a, total_elem * sizeof(float3));
	if (err12 != hipSuccess) {
		printf("%s in %s at line %d\n", hipGetErrorString(err12), __FILE__, __LINE__);
	}

	//copy initialized data from host to device
	hipError_t err20 = hipMemcpy(s, h_s, total_elem * sizeof(float3), hipMemcpyHostToDevice);
	if (err20 != hipSuccess) {
		printf("%s in %s at line %d\n", hipGetErrorString(err20), __FILE__, __LINE__);
	}
	hipError_t err21 = hipMemcpy(v, h_v, total_elem * sizeof(float3), hipMemcpyHostToDevice);
	if (err21 != hipSuccess) {
		printf("%s in %s at line %d\n", hipGetErrorString(err21), __FILE__, __LINE__);
	}
	hipError_t err22 = hipMemcpy(a, h_a, total_elem * sizeof(float3), hipMemcpyHostToDevice);
	if (err22 != hipSuccess) {
		printf("%s in %s at line %d\n", hipGetErrorString(err22), __FILE__, __LINE__);
	}
	//cpu code
	printf("cpu code is running....\n");
	cpu_func(h_s,h_v,h_a,dt,num_bodies, num_iteration);
	printf("gpu code is running....\n");
	//run gpu code
	gpu_func(s, v, a, h_s, h_a, dt, num_bodies, total_elem, num_iteration);

	

	hipDeviceReset();
	hipFree(s); hipFree(v); hipFree(a);
	hipHostFree(h_s); hipHostFree(h_v); hipHostFree(h_a);
}
	.text
	.file	"gpu_n_bodies.hip"
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10initializeP15HIP_vector_typeIfLj3EES1_S1_fi
.LCPI0_0:
	.long	0x42c80000                      # float 100
.LCPI0_1:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI0_2:
	.long	0x3f800000                      # float 1
.LCPI0_3:
	.long	0x461c4000                      # float 1.0E+4
.LCPI0_4:
	.long	0x3f000000                      # float 0.5
	.text
	.globl	_Z10initializeP15HIP_vector_typeIfLj3EES1_S1_fi
	.type	_Z10initializeP15HIP_vector_typeIfLj3EES1_S1_fi,@function
_Z10initializeP15HIP_vector_typeIfLj3EES1_S1_fi: # @_Z10initializeP15HIP_vector_typeIfLj3EES1_S1_fi
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB0_13
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movq	%rdx, %r12
	movq	%rsi, %r14
	movq	%rdi, %r15
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movl	%ecx, %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	leaq	(,%rax,4), %rax
	leaq	(%rax,%rax,2), %r13
	xorl	%ebx, %ebx
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI0_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	.LCPI0_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r15,%rbx)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI0_0(%rip), %xmm0
	mulss	.LCPI0_1(%rip), %xmm0
	movss	%xmm0, 4(%r15,%rbx)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI0_0(%rip), %xmm0
	mulss	.LCPI0_1(%rip), %xmm0
	movss	%xmm0, 8(%r15,%rbx)
	addq	$12, %rbx
	cmpq	%rbx, %r13
	jne	.LBB0_2
# %bb.3:                                # %.preheader67
	testl	%ebp, %ebp
	movss	4(%rsp), %xmm3                  # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	jle	.LBB0_12
# %bb.4:                                # %.preheader66.lr.ph
	movl	%ebp, 8(%rsp)                   # 4-byte Spill
	movq	%r14, 32(%rsp)                  # 8-byte Spill
	xorl	%ebp, %ebp
	movss	.LCPI0_2(%rip), %xmm4           # xmm4 = mem[0],zero,zero,zero
	xorps	%xmm5, %xmm5
	movss	.LCPI0_3(%rip), %xmm6           # xmm6 = mem[0],zero,zero,zero
	xorl	%eax, %eax
	movq	%r12, 40(%rsp)                  # 8-byte Spill
.LBB0_5:                                # %.lr.ph70
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_6 Depth 2
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	leaq	(,%rax,4), %rax
	leaq	(%rax,%rax,2), %r14
	leaq	(%r15,%r14), %rbx
	addq	%r12, %r14
	xorl	%r12d, %r12d
.LBB0_6:                                #   Parent Loop BB0_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpq	%r12, %rbp
	je	.LBB0_16
# %bb.7:                                #   in Loop: Header=BB0_6 Depth=2
	movss	(%r15,%r12), %xmm9              # xmm9 = mem[0],zero,zero,zero
	subss	(%rbx), %xmm9
	movss	4(%r15,%r12), %xmm8             # xmm8 = mem[0],zero,zero,zero
	subss	4(%rbx), %xmm8
	movss	8(%r15,%r12), %xmm7             # xmm7 = mem[0],zero,zero,zero
	subss	8(%rbx), %xmm7
	movaps	%xmm9, %xmm0
	mulss	%xmm9, %xmm0
	movaps	%xmm8, %xmm1
	mulss	%xmm8, %xmm1
	addss	%xmm0, %xmm1
	movaps	%xmm7, %xmm2
	mulss	%xmm7, %xmm2
	addss	%xmm1, %xmm2
	addss	%xmm4, %xmm2
	movaps	%xmm2, %xmm0
	mulss	%xmm2, %xmm0
	mulss	%xmm2, %xmm0
	ucomiss	%xmm5, %xmm0
	jb	.LBB0_14
# %bb.8:                                #   in Loop: Header=BB0_6 Depth=2
	sqrtss	%xmm0, %xmm0
	jmp	.LBB0_15
.LBB0_14:                               # %call.sqrt
                                        #   in Loop: Header=BB0_6 Depth=2
	movss	%xmm7, 20(%rsp)                 # 4-byte Spill
	movss	%xmm8, 16(%rsp)                 # 4-byte Spill
	movss	%xmm9, 12(%rsp)                 # 4-byte Spill
	callq	sqrtf
	movss	12(%rsp), %xmm9                 # 4-byte Reload
                                        # xmm9 = mem[0],zero,zero,zero
	movss	16(%rsp), %xmm8                 # 4-byte Reload
                                        # xmm8 = mem[0],zero,zero,zero
	movss	20(%rsp), %xmm7                 # 4-byte Reload
                                        # xmm7 = mem[0],zero,zero,zero
	movss	.LCPI0_3(%rip), %xmm6           # xmm6 = mem[0],zero,zero,zero
	xorps	%xmm5, %xmm5
	movss	.LCPI0_2(%rip), %xmm4           # xmm4 = mem[0],zero,zero,zero
	movss	4(%rsp), %xmm3                  # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
.LBB0_15:                               # %.split
                                        #   in Loop: Header=BB0_6 Depth=2
	movaps	%xmm4, %xmm1
	divss	%xmm0, %xmm1
	mulss	%xmm1, %xmm9
	mulss	%xmm6, %xmm9
	addss	(%r14), %xmm9
	movss	%xmm9, (%r14)
	mulss	%xmm1, %xmm8
	mulss	%xmm6, %xmm8
	addss	4(%r14), %xmm8
	movss	%xmm8, 4(%r14)
	mulss	%xmm1, %xmm7
	mulss	%xmm6, %xmm7
	addss	8(%r14), %xmm7
	movss	%xmm7, 8(%r14)
.LBB0_16:                               #   in Loop: Header=BB0_6 Depth=2
	addq	$12, %r12
	cmpq	%r12, %r13
	jne	.LBB0_6
# %bb.17:                               # %._crit_edge
                                        #   in Loop: Header=BB0_5 Depth=1
	movq	48(%rsp), %rax                  # 8-byte Reload
	incq	%rax
	addq	$12, %rbp
	cmpq	24(%rsp), %rax                  # 8-byte Folded Reload
	movq	40(%rsp), %r12                  # 8-byte Reload
	jne	.LBB0_5
# %bb.9:                                # %.preheader
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	movq	32(%rsp), %rdx                  # 8-byte Reload
	jle	.LBB0_12
# %bb.10:                               # %.lr.ph73.preheader
	movq	24(%rsp), %rax                  # 8-byte Reload
	shlq	$2, %rax
	leaq	(%rax,%rax,2), %rax
	xorl	%ecx, %ecx
	movss	.LCPI0_4(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB0_11:                               # %.lr.ph73
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r12,%rcx), %xmm1              # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm3, %xmm1
	mulss	%xmm0, %xmm1
	movss	%xmm1, (%rdx,%rcx)
	movss	4(%r12,%rcx), %xmm1             # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm3, %xmm1
	mulss	%xmm0, %xmm1
	movss	%xmm1, 4(%rdx,%rcx)
	movss	8(%r12,%rcx), %xmm1             # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm3, %xmm1
	mulss	%xmm0, %xmm1
	movss	%xmm1, 8(%rdx,%rcx)
	addq	$12, %rcx
	cmpq	%rcx, %rax
	jne	.LBB0_11
.LBB0_12:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB0_13:                               # %._crit_edge74
	retq
.Lfunc_end0:
	.size	_Z10initializeP15HIP_vector_typeIfLj3EES1_S1_fi, .Lfunc_end0-_Z10initializeP15HIP_vector_typeIfLj3EES1_S1_fi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z8cpu_funcP15HIP_vector_typeIfLj3EES1_S1_fii
.LCPI1_0:
	.long	0x3f800000                      # float 1
.LCPI1_1:
	.long	0x461c4000                      # float 1.0E+4
.LCPI1_2:
	.long	0x49742400                      # float 1.0E+6
.LCPI1_3:
	.long	0x00000000                      # float 0
	.text
	.globl	_Z8cpu_funcP15HIP_vector_typeIfLj3EES1_S1_fii
	.type	_Z8cpu_funcP15HIP_vector_typeIfLj3EES1_S1_fii,@function
_Z8cpu_funcP15HIP_vector_typeIfLj3EES1_S1_fii: # @_Z8cpu_funcP15HIP_vector_typeIfLj3EES1_S1_fii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebx
	movl	%ecx, %r13d
	movss	%xmm0, 40(%rsp)                 # 4-byte Spill
	movq	%rdx, 32(%rsp)                  # 8-byte Spill
	movq	%rsi, %r15
	movq	%rdi, %rbp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %r14
	movl	$.L.str.2, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %r12
	movl	%ebx, 20(%rsp)                  # 4-byte Spill
	testl	%ebx, %ebx
	jle	.LBB1_1
# %bb.2:                                # %.lr.ph125
	movq	%r15, 56(%rsp)                  # 8-byte Spill
	movl	%r13d, %eax
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	leaq	(,%rax,4), %rax
	leaq	(%rax,%rax,2), %r15
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	xorps	%xmm2, %xmm2
	movq	%r14, 72(%rsp)                  # 8-byte Spill
	movq	%r12, 64(%rsp)                  # 8-byte Spill
	movl	%r13d, 12(%rsp)                 # 4-byte Spill
.LBB1_3:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_5 Depth 2
                                        #     Child Loop BB1_8 Depth 2
                                        #       Child Loop BB1_9 Depth 3
                                        #     Child Loop BB1_18 Depth 2
	movss	%xmm2, 44(%rsp)                 # 4-byte Spill
	callq	clock
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	testl	%r13d, %r13d
	movss	40(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	.LCPI1_0(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	jle	.LBB1_16
# %bb.4:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_3 Depth=1
	xorl	%eax, %eax
	movq	32(%rsp), %rcx                  # 8-byte Reload
	movq	56(%rsp), %rdx                  # 8-byte Reload
.LBB1_5:                                # %.lr.ph
                                        #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rdx,%rax), %xmm0              # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	addss	(%rbp,%rax), %xmm0
	movss	%xmm0, (%rbp,%rax)
	movss	4(%rdx,%rax), %xmm0             # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	addss	4(%rbp,%rax), %xmm0
	movss	%xmm0, 4(%rbp,%rax)
	movss	8(%rdx,%rax), %xmm0             # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	addss	8(%rbp,%rax), %xmm0
	movss	%xmm0, 8(%rbp,%rax)
	movss	(%rcx,%rax), %xmm0              # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	addss	(%rdx,%rax), %xmm0
	movss	%xmm0, (%rdx,%rax)
	movss	4(%rcx,%rax), %xmm0             # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	addss	4(%rdx,%rax), %xmm0
	movss	%xmm0, 4(%rdx,%rax)
	movss	8(%rcx,%rax), %xmm0             # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	addss	8(%rdx,%rax), %xmm0
	movss	%xmm0, 8(%rdx,%rax)
	addq	$12, %rax
	cmpq	%rax, %r15
	jne	.LBB1_5
# %bb.6:                                # %.preheader
                                        #   in Loop: Header=BB1_3 Depth=1
	cmpl	$0, 12(%rsp)                    # 4-byte Folded Reload
	jle	.LBB1_16
# %bb.7:                                # %.lr.ph116.preheader
                                        #   in Loop: Header=BB1_3 Depth=1
	xorl	%ebx, %ebx
	xorl	%eax, %eax
.LBB1_8:                                # %.lr.ph116
                                        #   Parent Loop BB1_3 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_9 Depth 3
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	leaq	(,%rax,4), %rax
	leaq	(%rax,%rax,2), %r12
	movq	32(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%r12), %r13
	movq	$0, (%rax,%r12)
	movl	$0, 8(%rax,%r12)
	addq	%rbp, %r12
	xorl	%r14d, %r14d
.LBB1_9:                                #   Parent Loop BB1_3 Depth=1
                                        #     Parent Loop BB1_8 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	cmpq	%r14, %rbx
	je	.LBB1_14
# %bb.10:                               #   in Loop: Header=BB1_9 Depth=3
	movss	(%rbp,%r14), %xmm6              # xmm6 = mem[0],zero,zero,zero
	subss	(%r12), %xmm6
	movss	4(%rbp,%r14), %xmm5             # xmm5 = mem[0],zero,zero,zero
	subss	4(%r12), %xmm5
	movss	8(%rbp,%r14), %xmm4             # xmm4 = mem[0],zero,zero,zero
	subss	8(%r12), %xmm4
	movaps	%xmm6, %xmm0
	mulss	%xmm6, %xmm0
	movaps	%xmm5, %xmm1
	mulss	%xmm5, %xmm1
	addss	%xmm0, %xmm1
	movaps	%xmm4, %xmm2
	mulss	%xmm4, %xmm2
	addss	%xmm1, %xmm2
	addss	%xmm3, %xmm2
	movaps	%xmm2, %xmm0
	mulss	%xmm2, %xmm0
	mulss	%xmm2, %xmm0
	ucomiss	.LCPI1_3(%rip), %xmm0
	jb	.LBB1_12
# %bb.11:                               #   in Loop: Header=BB1_9 Depth=3
	sqrtss	%xmm0, %xmm0
	jmp	.LBB1_13
.LBB1_12:                               # %call.sqrt
                                        #   in Loop: Header=BB1_9 Depth=3
	movss	%xmm4, 16(%rsp)                 # 4-byte Spill
	movss	%xmm5, 52(%rsp)                 # 4-byte Spill
	movss	%xmm6, 48(%rsp)                 # 4-byte Spill
	callq	sqrtf
	movss	48(%rsp), %xmm6                 # 4-byte Reload
                                        # xmm6 = mem[0],zero,zero,zero
	movss	52(%rsp), %xmm5                 # 4-byte Reload
                                        # xmm5 = mem[0],zero,zero,zero
	movss	16(%rsp), %xmm4                 # 4-byte Reload
                                        # xmm4 = mem[0],zero,zero,zero
	movss	.LCPI1_0(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
.LBB1_13:                               # %.split
                                        #   in Loop: Header=BB1_9 Depth=3
	movaps	%xmm3, %xmm1
	divss	%xmm0, %xmm1
	mulss	%xmm1, %xmm6
	movss	.LCPI1_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm0, %xmm6
	addss	(%r13), %xmm6
	movss	%xmm6, (%r13)
	mulss	%xmm1, %xmm5
	mulss	%xmm0, %xmm5
	addss	4(%r13), %xmm5
	movss	%xmm5, 4(%r13)
	mulss	%xmm1, %xmm4
	mulss	%xmm0, %xmm4
	addss	8(%r13), %xmm4
	movss	%xmm4, 8(%r13)
.LBB1_14:                               #   in Loop: Header=BB1_9 Depth=3
	addq	$12, %r14
	cmpq	%r14, %r15
	jne	.LBB1_9
# %bb.15:                               # %._crit_edge
                                        #   in Loop: Header=BB1_8 Depth=2
	movq	96(%rsp), %rax                  # 8-byte Reload
	incq	%rax
	addq	$12, %rbx
	cmpq	88(%rsp), %rax                  # 8-byte Folded Reload
	jne	.LBB1_8
.LBB1_16:                               # %._crit_edge117
                                        #   in Loop: Header=BB1_3 Depth=1
	callq	clock
	subq	80(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI1_2(%rip), %xmm0
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.3, %edi
	movq	24(%rsp), %rsi                  # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movb	$1, %al
	callq	printf
	cmpl	$0, 12(%rsp)                    # 4-byte Folded Reload
	movq	72(%rsp), %r14                  # 8-byte Reload
	movq	64(%rsp), %r12                  # 8-byte Reload
	movq	32(%rsp), %r13                  # 8-byte Reload
	jle	.LBB1_19
# %bb.17:                               # %.lr.ph120.preheader
                                        #   in Loop: Header=BB1_3 Depth=1
	xorl	%ebx, %ebx
.LBB1_18:                               # %.lr.ph120
                                        #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13,%rbx), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%r13,%rbx), %xmm1
	xorps	%xmm2, %xmm2
	cvtss2sd	8(%r13,%rbx), %xmm2
	movl	$.L.str.4, %esi
	movq	%r12, %rdi
	movb	$3, %al
	callq	fprintf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbp,%rbx), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%rbp,%rbx), %xmm1
	xorps	%xmm2, %xmm2
	cvtss2sd	8(%rbp,%rbx), %xmm2
	movl	$.L.str.4, %esi
	movq	%r14, %rdi
	movb	$3, %al
	callq	fprintf
	addq	$12, %rbx
	cmpq	%rbx, %r15
	jne	.LBB1_18
.LBB1_19:                               # %._crit_edge121
                                        #   in Loop: Header=BB1_3 Depth=1
	movss	44(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	addss	16(%rsp), %xmm2                 # 4-byte Folded Reload
	movq	24(%rsp), %rax                  # 8-byte Reload
	incl	%eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	cmpl	20(%rsp), %eax                  # 4-byte Folded Reload
	movl	12(%rsp), %r13d                 # 4-byte Reload
	jne	.LBB1_3
	jmp	.LBB1_20
.LBB1_1:
	xorps	%xmm2, %xmm2
.LBB1_20:                               # %._crit_edge126
	xorps	%xmm1, %xmm1
	cvtsi2ssl	20(%rsp), %xmm1         # 4-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	divss	%xmm1, %xmm2
	xorps	%xmm1, %xmm1
	cvtss2sd	%xmm2, %xmm1
	movl	$.L.str.5, %edi
	movb	$2, %al
	callq	printf
	movq	%r14, %rdi
	callq	fclose
	movq	%r12, %rdi
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.Lfunc_end1:
	.size	_Z8cpu_funcP15HIP_vector_typeIfLj3EES1_S1_fii, .Lfunc_end1-_Z8cpu_funcP15HIP_vector_typeIfLj3EES1_S1_fii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__accel_updateP15HIP_vector_typeIfLj3EES1_ii # -- Begin function _Z27__device_stub__accel_updateP15HIP_vector_typeIfLj3EES1_ii
	.type	_Z27__device_stub__accel_updateP15HIP_vector_typeIfLj3EES1_ii,@function
_Z27__device_stub__accel_updateP15HIP_vector_typeIfLj3EES1_ii: # @_Z27__device_stub__accel_updateP15HIP_vector_typeIfLj3EES1_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z27__device_stub__accel_updateP15HIP_vector_typeIfLj3EES1_ii, .Lfunc_end2-_Z27__device_stub__accel_updateP15HIP_vector_typeIfLj3EES1_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi # -- Begin function _Z25__device_stub__pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi
	.type	_Z25__device_stub__pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi,@function
_Z25__device_stub__pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi: # @_Z25__device_stub__pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movss	%xmm0, (%rdx)
	movq	%rsp, %r8
	movl	%ecx, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r8, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z25__device_stub__pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi, .Lfunc_end3-_Z25__device_stub__pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z8gpu_funcP15HIP_vector_typeIfLj3EES1_S1_S1_S1_fiii
.LCPI4_0:
	.long	0x49742400                      # float 1.0E+6
	.text
	.globl	_Z8gpu_funcP15HIP_vector_typeIfLj3EES1_S1_S1_S1_fiii
	.type	_Z8gpu_funcP15HIP_vector_typeIfLj3EES1_S1_S1_S1_fiii,@function
_Z8gpu_funcP15HIP_vector_typeIfLj3EES1_S1_S1_S1_fiii: # @_Z8gpu_funcP15HIP_vector_typeIfLj3EES1_S1_S1_S1_fiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $r9d killed $r9d def $r9
	movq	%r9, 8(%rsp)                    # 8-byte Spill
	movss	%xmm0, 56(%rsp)                 # 4-byte Spill
	movq	%r8, %r12
	movq	%rcx, %r13
	movq	%rdx, 24(%rsp)                  # 8-byte Spill
	movq	%rsi, 64(%rsp)                  # 8-byte Spill
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	movl	152(%rsp), %ebp
	movl	144(%rsp), %r15d
	movl	$.L.str.6, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	$.L.str.7, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %r14
	movl	%ebp, 4(%rsp)                   # 4-byte Spill
	testl	%ebp, %ebp
	jle	.LBB4_1
# %bb.2:                                # %.lr.ph70
	movq	8(%rsp), %rdx                   # 8-byte Reload
	leal	1023(%rdx), %eax
	leal	2046(%rdx), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	movabsq	$4294968320, %rax               # imm = 0x100000400
	sarl	$10, %ecx
	addq	%rcx, %rax
	addq	$-1024, %rax                    # imm = 0xFC00
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movl	%r15d, 52(%rsp)                 # 4-byte Spill
	movslq	%r15d, %rax
	shlq	$2, %rax
	leaq	(%rax,%rax,2), %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movl	%edx, %eax
	shlq	$2, %rax
	leaq	(%rax,%rax,2), %r15
	xorps	%xmm2, %xmm2
	xorl	%eax, %eax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
.LBB4_3:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_9 Depth 2
	movss	%xmm2, 60(%rsp)                 # 4-byte Spill
	callq	clock
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	$12288, %r8d                    # imm = 0x3000
	movq	80(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdi
	movl	$1, %esi
	movabsq	$4294968320, %rdx               # imm = 0x100000400
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_5
# %bb.4:                                #   in Loop: Header=BB4_3 Depth=1
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movss	56(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	8(%rsp), %rcx                   # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z25__device_stub__pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi
.LBB4_5:                                #   in Loop: Header=BB4_3 Depth=1
	callq	hipDeviceSynchronize
	movl	$12288, %r8d                    # imm = 0x3000
	movq	%rbp, %rdi
	movl	$1, %esi
	movabsq	$4294968320, %rdx               # imm = 0x100000400
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_7
# %bb.6:                                #   in Loop: Header=BB4_3 Depth=1
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	8(%rsp), %rdx                   # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movl	52(%rsp), %ecx                  # 4-byte Reload
	callq	_Z27__device_stub__accel_updateP15HIP_vector_typeIfLj3EES1_ii
.LBB4_7:                                #   in Loop: Header=BB4_3 Depth=1
	callq	hipDeviceSynchronize
	callq	clock
	subq	32(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI4_0(%rip), %xmm0
	movss	%xmm0, 32(%rsp)                 # 4-byte Spill
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.3, %edi
	movq	40(%rsp), %rsi                  # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movb	$1, %al
	callq	printf
	movq	%r13, %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	72(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r12, %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	jle	.LBB4_10
# %bb.8:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB4_3 Depth=1
	xorl	%ebp, %ebp
.LBB4_9:                                # %.lr.ph
                                        #   Parent Loop BB4_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13,%rbp), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%r13,%rbp), %xmm1
	xorps	%xmm2, %xmm2
	cvtss2sd	8(%r13,%rbp), %xmm2
	movl	$.L.str.4, %esi
	movq	%rbx, %rdi
	movb	$3, %al
	callq	fprintf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12,%rbp), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%r12,%rbp), %xmm1
	xorps	%xmm2, %xmm2
	cvtss2sd	8(%r12,%rbp), %xmm2
	movl	$.L.str.4, %esi
	movq	%r14, %rdi
	movb	$3, %al
	callq	fprintf
	addq	$12, %rbp
	cmpq	%rbp, %r15
	jne	.LBB4_9
.LBB4_10:                               # %._crit_edge
                                        #   in Loop: Header=BB4_3 Depth=1
	movss	60(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	addss	32(%rsp), %xmm2                 # 4-byte Folded Reload
	movq	40(%rsp), %rax                  # 8-byte Reload
	incl	%eax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	cmpl	4(%rsp), %eax                   # 4-byte Folded Reload
	jne	.LBB4_3
	jmp	.LBB4_11
.LBB4_1:
	xorps	%xmm2, %xmm2
.LBB4_11:                               # %._crit_edge71
	xorps	%xmm1, %xmm1
	cvtsi2ssl	4(%rsp), %xmm1          # 4-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	divss	%xmm1, %xmm2
	xorps	%xmm1, %xmm1
	cvtss2sd	%xmm2, %xmm1
	movl	$.L.str.5, %edi
	movb	$2, %al
	callq	printf
	movq	%rbx, %rdi
	callq	fclose
	movq	%r14, %rdi
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.Lfunc_end4:
	.size	_Z8gpu_funcP15HIP_vector_typeIfLj3EES1_S1_S1_S1_fiii, .Lfunc_end4-_Z8gpu_funcP15HIP_vector_typeIfLj3EES1_S1_S1_S1_fiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI5_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$1, %edi
	jle	.LBB5_24
# %bb.1:
	movq	%rsi, %r15
	movl	%edi, %ebp
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	movl	$10, %r14d
	cmpl	$2, %ebp
	jne	.LBB5_3
# %bb.2:
	movss	.LCPI5_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	jmp	.LBB5_5
.LBB5_3:
	movq	16(%r15), %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	cmpl	$4, %ebp
	jb	.LBB5_5
# %bb.4:
	movq	24(%r15), %rdi
	callq	atoi
	movl	%eax, %r14d
.LBB5_5:                                # %.thread
	leal	1023(%rbx), %eax
	leal	2046(%rbx), %r12d
	testl	%eax, %eax
	cmovnsl	%eax, %r12d
	andl	$-1024, %r12d                   # imm = 0xFC00
	movslq	%r12d, %rax
	shlq	$2, %rax
	leaq	(%rax,%rax,2), %r15
	leaq	24(%rsp), %rdi
	movq	%r15, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	testl	%eax, %eax
	je	.LBB5_7
# %bb.6:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %edi
	movl	$.L.str.10, %edx
	movq	%rax, %rsi
	movl	$212, %ecx
	xorl	%eax, %eax
	callq	printf
.LBB5_7:
	leaq	32(%rsp), %rdi
	movq	%r15, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	testl	%eax, %eax
	je	.LBB5_9
# %bb.8:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %edi
	movl	$.L.str.10, %edx
	movq	%rax, %rsi
	movl	$216, %ecx
	xorl	%eax, %eax
	callq	printf
.LBB5_9:
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	testl	%eax, %eax
	je	.LBB5_11
# %bb.10:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %edi
	movl	$.L.str.10, %edx
	movq	%rax, %rsi
	movl	$220, %ecx
	xorl	%eax, %eax
	callq	printf
.LBB5_11:
	movq	24(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %ecx
	callq	_Z10initializeP15HIP_vector_typeIfLj3EES1_S1_fi
	leaq	56(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB5_13
# %bb.12:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %edi
	movl	$.L.str.10, %edx
	movq	%rax, %rsi
	movl	$230, %ecx
	xorl	%eax, %eax
	callq	printf
.LBB5_13:
	leaq	48(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB5_15
# %bb.14:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %edi
	movl	$.L.str.10, %edx
	movq	%rax, %rsi
	movl	$234, %ecx
	xorl	%eax, %eax
	callq	printf
.LBB5_15:
	leaq	40(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB5_17
# %bb.16:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %edi
	movl	$.L.str.10, %edx
	movq	%rax, %rsi
	movl	$238, %ecx
	xorl	%eax, %eax
	callq	printf
.LBB5_17:
	movq	56(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB5_19
# %bb.18:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %edi
	movl	$.L.str.10, %edx
	movq	%rax, %rsi
	movl	$244, %ecx
	xorl	%eax, %eax
	callq	printf
.LBB5_19:
	movq	48(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB5_21
# %bb.20:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %edi
	movl	$.L.str.10, %edx
	movq	%rax, %rsi
	movl	$248, %ecx
	xorl	%eax, %eax
	callq	printf
.LBB5_21:
	movq	40(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB5_23
# %bb.22:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %edi
	movl	$.L.str.10, %edx
	movq	%rax, %rsi
	movl	$252, %ecx
	xorl	%eax, %eax
	callq	printf
.LBB5_23:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	24(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %ecx
	movl	%r14d, %r8d
	callq	_Z8cpu_funcP15HIP_vector_typeIfLj3EES1_S1_fii
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	56(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rcx
	movq	16(%rsp), %r8
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %r9d
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	callq	_Z8gpu_funcP15HIP_vector_typeIfLj3EES1_S1_S1_S1_fiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	callq	hipDeviceReset
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipHostFree
	movq	32(%rsp), %rdi
	callq	hipHostFree
	movq	16(%rsp), %rdi
	callq	hipHostFree
	xorl	%eax, %eax
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_24:
	.cfi_def_cfa_offset 112
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	xorl	%edi, %edi
	callq	exit
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"pos_cpu.txt"
	.size	.L.str, 12

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"w"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"accel_cpu.txt"
	.size	.L.str.2, 14

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"iteration %d, time cost %.6f\n"
	.size	.L.str.3, 30

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%.6f %.6f %.6f\n"
	.size	.L.str.4, 16

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"total time %.6f, avg time per iteration %.6f\n"
	.size	.L.str.5, 46

	.type	_Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii,@object # @_Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii
	.section	.rodata,"a",@progbits
	.globl	_Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii
	.p2align	3, 0x0
_Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii:
	.quad	_Z27__device_stub__accel_updateP15HIP_vector_typeIfLj3EES1_ii
	.size	_Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii, 8

	.type	_Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi,@object # @_Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi
	.globl	_Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi
	.p2align	3, 0x0
_Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi:
	.quad	_Z25__device_stub__pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi
	.size	_Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi, 8

	.type	.L.str.6,@object                # @.str.6
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.6:
	.asciz	"pos.txt"
	.size	.L.str.6, 8

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"accel.txt"
	.size	.L.str.7, 10

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"%s in %s at line %d\n"
	.size	.L.str.9, 21

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/haldarritam/N-Body-Simulation-CUDA/master/Backup/Johnny/gpu_n_bodies.hip"
	.size	.L.str.10, 135

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii"
	.size	.L__unnamed_1, 47

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi"
	.size	.L__unnamed_2, 48

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"cpu code is running...."
	.size	.Lstr, 24

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"gpu code is running...."
	.size	.Lstr.1, 24

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Error: wrong number of args"
	.size	.Lstr.2, 28

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__accel_updateP15HIP_vector_typeIfLj3EES1_ii
	.addrsig_sym _Z25__device_stub__pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii
	.addrsig_sym _Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii ; -- Begin function _Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii
	.globl	_Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii
	.p2align	8
	.type	_Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii,@function
_Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii: ; @_Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii
; %bb.0:
	s_clause 0x2
	s_load_b32 s8, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s8, 0xffff
	s_cmp_lt_i32 s2, 1
	v_mad_u64_u32 v[7:8], null, s15, s1, v[0:1]
	v_mov_b32_e32 v1, 0
	s_cbranch_scc1 .LBB0_9
; %bb.1:                                ; %.lr.ph
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_i64_i32 v[1:2], null, v7, 12, s[4:5]
	v_mad_u32_u24 v10, v0, 12, 0
	v_mov_b32_e32 v11, 0
	v_mov_b32_e32 v3, 0
	s_and_b32 s8, s2, 0x3ff
	s_mov_b32 s9, 0
	global_load_b96 v[4:6], v[1:2], off
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v11, s1, v[0:1]
	s_mov_b32 s10, exec_lo
	v_cmpx_ge_i32_e64 s3, v8
	s_cbranch_execz .LBB0_8
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mad_i64_i32 v[12:13], null, v8, 12, s[4:5]
	v_lshl_add_u32 v8, v11, 10, 0x400
	v_mov_b32_e32 v9, s8
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_lt_i32_e32 vcc_lo, s2, v8
	global_load_b96 v[12:14], v[12:13], off
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v10, v12, v13 offset1:1
	ds_store_b32 v10, v14 offset:8
	v_cndmask_b32_e32 v8, 0x400, v9, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_ne_u32_e32 0, v8
	s_cbranch_execz .LBB0_7
; %bb.4:                                ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s13, 0
	s_mov_b32 s12, 0
.LBB0_5:                                ; %.lr.ph.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v9, s13
	s_add_i32 s13, s13, 12
	ds_load_2addr_b32 v[12:13], v9 offset1:1
	ds_load_b32 v9, v9 offset:8
	v_add_nc_u32_e32 v8, -1, v8
	s_waitcnt lgkmcnt(1)
	v_dual_sub_f32 v12, v12, v4 :: v_dual_sub_f32 v13, v13, v5
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e32 v9, v9, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v14, v13, v13
	v_fmac_f32_e32 v14, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, v9, v9
	v_add_f32_e32 v14, 1.0, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v14, v14
	v_mul_f32_e32 v14, v14, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v15, 0x4f800000, v14
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v14
	v_cndmask_b32_e32 v14, v14, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v15, v14
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v16, -1, v15
	v_add_nc_u32_e32 v17, 1, v15
	v_fma_f32 v18, -v16, v15, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v19, -v17, v15, v14
	v_cmp_ge_f32_e64 s0, 0, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v15, v15, v16, s0
	v_cmp_lt_f32_e64 s0, 0, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v15, v15, v17, s0
	v_mul_f32_e32 v16, 0x37800000, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v15, v15, v16, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v14, 0x260
	v_cndmask_b32_e32 v14, v15, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v15, null, v14, v14, 1.0
	v_div_scale_f32 v18, vcc_lo, 1.0, v14, 1.0
	v_rcp_f32_e32 v16, v15
	s_waitcnt_depctr 0xfff
	v_fma_f32 v17, -v15, v16, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v17, v16
	v_mul_f32_e32 v17, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v19, -v15, v17, v18
	v_fmac_f32_e32 v17, v19, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v15, -v15, v17, v18
	v_div_fmas_f32 v15, v15, v16, v17
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v14, v15, v14, 1.0
	s_or_b32 s12, vcc_lo, s12
	v_mul_f32_e32 v13, v13, v14
	v_mul_f32_e32 v9, v9, v14
	v_mul_f32_e32 v12, v12, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v2, 0x461c4000, v13
	v_fmac_f32_e32 v3, 0x461c4000, v9
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v1, 0x461c4000, v12
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB0_5
; %bb.6:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
.LBB0_7:                                ; %Flow59
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v11, 1, v11
	s_barrier
	buffer_gl0_inv
.LBB0_8:                                ; %Flow60
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_add_i32 s9, s9, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s9, s2
	s_cbranch_scc1 .LBB0_2
.LBB0_9:                                ; %._crit_edge
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_i64_i32 v[4:5], null, v7, 12, s[6:7]
	global_store_b96 v[4:5], v[1:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii, .Lfunc_end0-_Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 716
; NumSgprs: 18
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi ; -- Begin function _Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi
	.globl	_Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi
	.p2align	8
	.type	_Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi,@function
_Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi: ; @_Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mad_i64_i32 v[3:4], null, v1, 12, 0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s0, v3
	global_load_b32 v9, v[5:6], off
	global_load_b96 v[0:2], v[7:8], off
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_waitcnt vmcnt(0)
	v_fma_f32 v0, s2, v9, v0
	global_store_b32 v[7:8], v0, off
	global_load_b32 v0, v[5:6], off offset:4
	s_waitcnt vmcnt(0)
	v_fma_f32 v0, s2, v0, v1
	global_store_b32 v[7:8], v0, off offset:4
	global_load_b32 v0, v[5:6], off offset:8
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v2, s2, v0
	global_store_b32 v[7:8], v2, off offset:8
	global_load_b32 v7, v[3:4], off
	global_load_b96 v[0:2], v[5:6], off
	s_waitcnt vmcnt(0)
	v_fma_f32 v0, s2, v7, v0
	global_store_b32 v[5:6], v0, off
	global_load_b32 v0, v[3:4], off offset:4
	s_waitcnt vmcnt(0)
	v_fma_f32 v0, s2, v0, v1
	global_store_b32 v[5:6], v0, off offset:4
	global_load_b32 v0, v[3:4], off offset:8
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v2, s2, v0
	global_store_b32 v[5:6], v2, off offset:8
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi, .Lfunc_end1-_Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 312
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12accel_updateP15HIP_vector_typeIfLj3EES1_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     20
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10pos_updateP15HIP_vector_typeIfLj3EES1_S1_fi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
