#include <stdio.h>
#include "cuda.h"

#define DIM 20
#define TURNS 1


__global__ void gridmean(float grid[DIM][DIM], float tmp_grid[DIM][DIM]){
	int x = blockIdx.x * blockDim.x;
	int y = blockIdx.y * blockDim.y;

	float tmp = 0;
	for(int i = x-1; i <= x+1; i++){
		for(int j = y-1; j <= y+1; j++){
			if(!(i < 0 || j < 0|| i >= DIM || j >= DIM)){
				tmp += grid[i][j];
			}	
		}
	}
	tmp_grid[x][y] = tmp/9;

}

__global__ void copy(float grid[DIM][DIM], float tmp_grid[DIM][DIM]){
	grid[blockIdx.x][blockIdx.y] = tmp_grid[blockIdx.x][blockIdx.y];
}

int main(){
	
	float grid[DIM][DIM];
	float tmp_grid[DIM][DIM];
	float (*grid_d)[DIM];
	float (*tmp_grid_d)[DIM];
	int size = DIM*DIM*sizeof(float);
	cudaMalloc((void**)&grid_d,size);
	cudaMalloc((void**)&tmp_grid_d,size);

	for(int i = 0; i < DIM; i++){
		for(int j = 0; j < DIM; j++){
			grid[i][j] = (float) i*DIM + j;
		}
	}
	
	//for(int i = 0; i < DIM; i++){
	//	for(int j = 0; j < DIM; j++){
	//		printf("%f ", grid[i][j]);
	//	}
	//	printf("\n");
	//}

	cudaMemcpy(grid_d,grid,size, cudaMemcpyHostToDevice);
	cudaMemcpy(tmp_grid_d,tmp_grid,size, cudaMemcpyHostToDevice);
	dim3 numBlocks(DIM,DIM);

	for(int k = 0; k < TURNS; k++){
		gridmean<<<numBlocks,1>>>(grid_d,tmp_grid_d);
		copy<<<numBlocks,1>>>(grid_d,tmp_grid_d);
	}

	cudaMemcpy(grid,grid_d,size, cudaMemcpyDeviceToHost);

	for(int i = 0; i < DIM; i++){
		for(int j = 0; j < DIM; j++){
			printf("%f ", grid[i][j]);
		}
		printf("\n");
	}
	cudaFree(grid_d);
	return 0;
}

	.file	"tmpxft_0036fc08_00000000-6_e1_cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z34__device_stub__Z8gridmeanPA20_fS0_PA20_fS0_
	.type	_Z34__device_stub__Z8gridmeanPA20_fS0_PA20_fS0_, @function
_Z34__device_stub__Z8gridmeanPA20_fS0_PA20_fS0_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z8gridmeanPA20_fS0_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z34__device_stub__Z8gridmeanPA20_fS0_PA20_fS0_, .-_Z34__device_stub__Z8gridmeanPA20_fS0_PA20_fS0_
	.globl	_Z8gridmeanPA20_fS0_
	.type	_Z8gridmeanPA20_fS0_, @function
_Z8gridmeanPA20_fS0_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z8gridmeanPA20_fS0_PA20_fS0_
	.cfi_endproc
.LFE2053:
	.size	_Z8gridmeanPA20_fS0_, .-_Z8gridmeanPA20_fS0_
	.globl	_Z30__device_stub__Z4copyPA20_fS0_PA20_fS0_
	.type	_Z30__device_stub__Z4copyPA20_fS0_PA20_fS0_, @function
_Z30__device_stub__Z4copyPA20_fS0_PA20_fS0_:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z4copyPA20_fS0_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z30__device_stub__Z4copyPA20_fS0_PA20_fS0_, .-_Z30__device_stub__Z4copyPA20_fS0_PA20_fS0_
	.globl	_Z4copyPA20_fS0_
	.type	_Z4copyPA20_fS0_, @function
_Z4copyPA20_fS0_:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z4copyPA20_fS0_PA20_fS0_
	.cfi_endproc
.LFE2055:
	.size	_Z4copyPA20_fS0_, .-_Z4copyPA20_fS0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"%f "
.LC2:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$1600, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$3256, %rsp
	.cfi_def_cfa_offset 3296
	movq	%fs:40, %rax
	movq	%rax, 3240(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	leaq	40(%rsp), %rbx
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$1600, %esi
	call	cudaMalloc@PLT
	movss	.LC0(%rip), %xmm2
	movq	%rbx, %rcx
	xorl	%edx, %edx
.L14:
	cvtsi2ssl	%edx, %xmm0
	xorl	%eax, %eax
	mulss	%xmm2, %xmm0
.L15:
	cvtsi2ssl	%eax, %xmm1
	addss	%xmm0, %xmm1
	movss	%xmm1, (%rcx,%rax,4)
	incq	%rax
	cmpq	$20, %rax
	jne	.L15
	incl	%edx
	addq	$80, %rcx
	cmpl	$20, %edx
	jne	.L14
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$1600, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	leaq	1640(%rsp), %rsi
	movl	$1600, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$85899345940, %rdi
	movl	$1, %esi
	movabsq	$4294967297, %rdx
	movl	$1, 24(%rsp)
	movq	%rdi, 16(%rsp)
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z34__device_stub__Z8gridmeanPA20_fS0_PA20_fS0_
.L17:
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdx
	movl	$1, %ecx
	movl	$1, 36(%rsp)
	movq	%rdx, 28(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z30__device_stub__Z4copyPA20_fS0_PA20_fS0_
.L18:
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movl	$1600, %edx
	movq	%rbx, %rdi
	leaq	1600(%rbx), %r12
	leaq	.LC1(%rip), %r13
	call	cudaMemcpy@PLT
.L19:
	xorl	%ebp, %ebp
.L20:
	cvtss2sd	(%rbx,%rbp,4), %xmm0
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%rbp
	cmpq	$20, %rbp
	jne	.L20
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$80, %rbx
	call	__printf_chk@PLT
	cmpq	%r12, %rbx
	jne	.L19
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	3240(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$3256, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z4copyPA20_fS0_"
.LC4:
	.string	"_Z8gridmeanPA20_fS0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z4copyPA20_fS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8gridmeanPA20_fS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1101004800
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include "hip/hip_runtime.h"

#define DIM 20
#define TURNS 1


__global__ void gridmean(float grid[DIM][DIM], float tmp_grid[DIM][DIM]){
	int x = blockIdx.x * blockDim.x;
	int y = blockIdx.y * blockDim.y;

	float tmp = 0;
	for(int i = x-1; i <= x+1; i++){
		for(int j = y-1; j <= y+1; j++){
			if(!(i < 0 || j < 0|| i >= DIM || j >= DIM)){
				tmp += grid[i][j];
			}	
		}
	}
	tmp_grid[x][y] = tmp/9;

}

__global__ void copy(float grid[DIM][DIM], float tmp_grid[DIM][DIM]){
	grid[blockIdx.x][blockIdx.y] = tmp_grid[blockIdx.x][blockIdx.y];
}

int main(){
	
	float grid[DIM][DIM];
	float tmp_grid[DIM][DIM];
	float (*grid_d)[DIM];
	float (*tmp_grid_d)[DIM];
	int size = DIM*DIM*sizeof(float);
	hipMalloc((void**)&grid_d,size);
	hipMalloc((void**)&tmp_grid_d,size);

	for(int i = 0; i < DIM; i++){
		for(int j = 0; j < DIM; j++){
			grid[i][j] = (float) i*DIM + j;
		}
	}
	
	//for(int i = 0; i < DIM; i++){
	//	for(int j = 0; j < DIM; j++){
	//		printf("%f ", grid[i][j]);
	//	}
	//	printf("\n");
	//}

	hipMemcpy(grid_d,grid,size, hipMemcpyHostToDevice);
	hipMemcpy(tmp_grid_d,tmp_grid,size, hipMemcpyHostToDevice);
	dim3 numBlocks(DIM,DIM);

	for(int k = 0; k < TURNS; k++){
		gridmean<<<numBlocks,1>>>(grid_d,tmp_grid_d);
		copy<<<numBlocks,1>>>(grid_d,tmp_grid_d);
	}

	hipMemcpy(grid,grid_d,size, hipMemcpyDeviceToHost);

	for(int i = 0; i < DIM; i++){
		for(int j = 0; j < DIM; j++){
			printf("%f ", grid[i][j]);
		}
		printf("\n");
	}
	hipFree(grid_d);
	return 0;
}

	.text
	.file	"e1_cuda.hip"
	.globl	_Z23__device_stub__gridmeanPA20_fS0_ # -- Begin function _Z23__device_stub__gridmeanPA20_fS0_
	.type	_Z23__device_stub__gridmeanPA20_fS0_,@function
_Z23__device_stub__gridmeanPA20_fS0_:   # @_Z23__device_stub__gridmeanPA20_fS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8gridmeanPA20_fS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__gridmeanPA20_fS0_, .Lfunc_end0-_Z23__device_stub__gridmeanPA20_fS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__copyPA20_fS0_ # -- Begin function _Z19__device_stub__copyPA20_fS0_
	.type	_Z19__device_stub__copyPA20_fS0_,@function
_Z19__device_stub__copyPA20_fS0_:       # @_Z19__device_stub__copyPA20_fS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4copyPA20_fS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z19__device_stub__copyPA20_fS0_, .Lfunc_end1-_Z19__device_stub__copyPA20_fS0_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x41a00000                      # float 20
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$3216, %rsp                     # imm = 0xC90
	.cfi_def_cfa_offset 3248
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsp, %rdi
	movl	$1600, %esi                     # imm = 0x640
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$1600, %esi                     # imm = 0x640
	callq	hipMalloc
	leaq	16(%rsp), %rax
	xorl	%ecx, %ecx
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB2_1:                                # %.preheader43
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ecx, %xmm1
	mulss	%xmm0, %xmm1
	xorl	%edx, %edx
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm2, %xmm2
	cvtsi2ss	%edx, %xmm2
	addss	%xmm1, %xmm2
	movss	%xmm2, (%rax,%rdx,4)
	incq	%rdx
	cmpq	$20, %rdx
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%rcx
	addq	$80, %rax
	cmpq	$20, %rcx
	jne	.LBB2_1
# %bb.4:                                # %.critedge
	movabsq	$85899345940, %r15              # imm = 0x1400000014
	movabsq	$4294967297, %r14               # imm = 0x100000001
	movq	(%rsp), %rdi
	leaq	16(%rsp), %rbx
	movl	$1600, %edx                     # imm = 0x640
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	leaq	1616(%rsp), %rsi
	movl	$1600, %edx                     # imm = 0x640
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z23__device_stub__gridmeanPA20_fS0_
.LBB2_6:
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.7:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z19__device_stub__copyPA20_fS0_
.LBB2_8:
	movq	(%rsp), %rsi
	movl	$1600, %edx                     # imm = 0x640
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r14d, %r14d
.LBB2_9:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_10 Depth 2
	xorl	%r15d, %r15d
.LBB2_10:                               #   Parent Loop BB2_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r15,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	$20, %r15
	jne	.LBB2_10
# %bb.11:                               #   in Loop: Header=BB2_9 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$80, %rbx
	cmpq	$20, %r14
	jne	.LBB2_9
# %bb.12:
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$3216, %rsp                     # imm = 0xC90
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8gridmeanPA20_fS0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4copyPA20_fS0_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8gridmeanPA20_fS0_,@object    # @_Z8gridmeanPA20_fS0_
	.section	.rodata,"a",@progbits
	.globl	_Z8gridmeanPA20_fS0_
	.p2align	3, 0x0
_Z8gridmeanPA20_fS0_:
	.quad	_Z23__device_stub__gridmeanPA20_fS0_
	.size	_Z8gridmeanPA20_fS0_, 8

	.type	_Z4copyPA20_fS0_,@object        # @_Z4copyPA20_fS0_
	.globl	_Z4copyPA20_fS0_
	.p2align	3, 0x0
_Z4copyPA20_fS0_:
	.quad	_Z19__device_stub__copyPA20_fS0_
	.size	_Z4copyPA20_fS0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%f "
	.size	.L.str, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8gridmeanPA20_fS0_"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z4copyPA20_fS0_"
	.size	.L__unnamed_2, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__gridmeanPA20_fS0_
	.addrsig_sym _Z19__device_stub__copyPA20_fS0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8gridmeanPA20_fS0_
	.addrsig_sym _Z4copyPA20_fS0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8gridmeanPA20_fS0_    ; -- Begin function _Z8gridmeanPA20_fS0_
	.globl	_Z8gridmeanPA20_fS0_
	.p2align	8
	.type	_Z8gridmeanPA20_fS0_,@function
_Z8gridmeanPA20_fS0_:                   ; @_Z8gridmeanPA20_fS0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v0, 0
	s_mov_b32 s7, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s4, 0xffff
	s_lshr_b32 s4, s4, 16
	s_mul_i32 s8, s14, s5
	s_mul_i32 s4, s15, s4
	s_add_i32 s6, s8, -1
	s_add_i32 s5, s4, -2
.LBB0_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_2 Depth 2
	s_cmp_gt_i32 s6, 19
	s_mov_b32 s9, s6
	s_cselect_b32 s10, -1, 0
	s_mul_hi_u32 s11, s6, 0x50
	s_mul_i32 s12, s6, 0x50
	s_mov_b32 s6, s5
.LBB0_2:                                ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s6, s6, 1
	s_or_b32 s13, s6, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_lt_i32 s13, 0
	s_cselect_b32 s13, -1, 0
	s_or_b32 s13, s10, s13
	s_cmp_gt_i32 s6, 19
	s_cselect_b32 s14, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s13, s14, s13
	s_and_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=2
	s_add_u32 s13, s0, s12
	s_addc_u32 s16, s1, s11
	s_lshl_b64 s[14:15], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s14, s13, s14
	s_addc_u32 s15, s16, s15
	s_load_b32 s13, s[14:15], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v0, s13, v0
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=2
	s_cmp_gt_i32 s6, s4
	s_cbranch_scc0 .LBB0_2
; %bb.5:                                ;   in Loop: Header=BB0_1 Depth=1
	s_add_i32 s6, s9, 1
	s_cmp_gt_i32 s9, s8
	s_cbranch_scc0 .LBB0_1
; %bb.6:
	v_div_scale_f32 v1, null, 0x41100000, 0x41100000, v0
	v_div_scale_f32 v4, vcc_lo, v0, 0x41100000, v0
	s_mul_i32 s0, s8, 0x50
	s_delay_alu instid0(VALU_DEP_2)
	v_rcp_f32_e32 v2, v1
	s_ashr_i32 s5, s4, 31
	s_mul_hi_i32 s1, s8, 0x50
	s_add_u32 s2, s2, s0
	s_addc_u32 s3, s3, s1
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v3, -v1, v2, 1.0
	v_fmac_f32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, v4, v2
	v_fma_f32 v5, -v1, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v5, v2
	v_fma_f32 v1, -v1, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v1, v1, v2, v3
	v_div_fixup_f32 v0, v1, 0x41100000, v0
	v_mov_b32_e32 v1, 0
	global_store_b32 v1, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8gridmeanPA20_fS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8gridmeanPA20_fS0_, .Lfunc_end0-_Z8gridmeanPA20_fS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 376
; NumSgprs: 19
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z4copyPA20_fS0_        ; -- Begin function _Z4copyPA20_fS0_
	.globl	_Z4copyPA20_fS0_
	.p2align	8
	.type	_Z4copyPA20_fS0_,@function
_Z4copyPA20_fS0_:                       ; @_Z4copyPA20_fS0_
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s14, 0x50
	s_mov_b32 s4, s15
	s_mov_b32 s5, 0
	s_mul_hi_u32 s7, s14, 0x50
	s_waitcnt lgkmcnt(0)
	s_add_u32 s8, s2, s6
	s_addc_u32 s9, s3, s7
	s_lshl_b64 s[2:3], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s4, s8, s2
	s_addc_u32 s5, s9, s3
	s_add_u32 s0, s0, s6
	s_load_b32 s4, s[4:5], 0x0
	v_mov_b32_e32 v0, 0
	s_addc_u32 s1, s1, s7
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v1, s4
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4copyPA20_fS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z4copyPA20_fS0_, .Lfunc_end1-_Z4copyPA20_fS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 116
; NumSgprs: 16
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8gridmeanPA20_fS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     19
    .sgpr_spill_count: 0
    .symbol:         _Z8gridmeanPA20_fS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4copyPA20_fS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z4copyPA20_fS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
