#include <stdint.h>
#include <unistd.h>

#include <png.h>
#include <cuda.h>
#include <math.h>

#define rel params[0]
#define img params[1]
#define scl params[2]

__device__ void writeHSV(uint8_t *pixel, int theta) {
    unsigned char region, remainder, q, t;
    region = theta / 43;
    remainder = (theta - (region * 43)) * 6;
   
    q = (255 * (255 - ((255 * remainder) >> 8))) >> 8;
    t = (255 * (255 - ((255 * (255 - remainder)) >> 8))) >> 8;

    switch (region) {
        case 0:
            *pixel++ = 255;
            *pixel++ = t;
            *pixel++ = 0;
            return;
        case 1:
            *pixel++ = q;
            *pixel++ = 255;
            *pixel++ = 0;
            return;
        case 2:
            *pixel++ = 0;
            *pixel++ = 255;
            *pixel++ = t;
            return;
        case 3:
            *pixel++ = 0;
            *pixel++ = q;
            *pixel++ = 255;
            return;
        case 4:
            *pixel++ = t;
            *pixel++ = 0;
            *pixel++ = 255;
            return;
        default:
            *pixel++ = 255;
            *pixel++ = 0;
            *pixel++ = q;
            return;
    }
}

__global__ void euclid (uint8_t *gpu, double *params, int streamNumber ) {
    int index, pos;
    int c, t;
    uint32_t x, y; 

    index = streamNumber * 65536 + threadIdx.x * 256;
    for (pos = 0; pos < 256; pos++) {
        x = (uint32_t) (((rel + 2.0) + (double) (.5 + (index % 1024)) * scl) * 1048576);
        y = (uint32_t) (((img + 2.0) + (double) (.5 + (index / 1024)) * scl) * 1048576);
        c = 0;
        t = 1;
        while (1) {
            if (x > y) {
                x -= y;
                c++;
            } else if (y > x) {
                y -= x;
            } else {
                break;
            }
            t++;
            if (t > 1000) break;
        }

        uint8_t *pixel = (gpu + index++ * 3);
        *pixel++ = (255 * c) / t;
        *pixel++ = (255 * c) / t;
        *pixel++ = (255 * c) / t;
    }
}

__global__ void mandelbrot (uint8_t *gpu, double *params, int streamNumber ) {
    int index, c, pos;
    double cr, ci, zr, zi, t;

    index = streamNumber * 65536 + threadIdx.x * 256;
    for (pos = 0; pos < 256; pos++) {
        c = 0;
        cr = rel + (double) (.5 + (index % 1024)) * scl / 1024.0;
        ci = img + (double) (.5 + (index / 1024)) * scl / 1024.0;
        zr = cr;
        zi = ci;

        while (++c < 1000 && zr * zr + zi * zi < 4) {
            t = zr;
            zr = zr * zr - zi * zi + cr;
            zi = 2 * t * zi + ci;
        }
    
        uint8_t *pixel = (gpu + index * 3);
        if (c == 1000) {
            *pixel++ = 0;
            *pixel++ = 0;
            *pixel++ = 0;
        } else {
            writeHSV(pixel, c);
        }
        index ++;
    }
}

// GPU variables
double *gpu_params;
uint8_t *gpu; 

// Host variables
cudaStream_t streams[16];
double params[3];
png_byte ** row_pointers;
void (*kernel) (uint8_t *, double *, int);


// reads parameters from stdin and writes them to params array
// initializes rel, img, and scl macros
void readParams() {
    rel = -2.0;
    img = -2.0;
    scl = 4.0;
    char c = getchar();
    switch (c) {
        case 'm':
            kernel = mandelbrot;
            break;
        default:
            kernel = euclid;
    }
    while ((c = getchar()) != '@') {
        scl /= 3.0;
        switch (c) {
            case '3':
            case '6':
            case '9':
                rel += scl;
            case '2':
            case '5':
            case '8':
                rel += scl;
            default:
                break;
        }
        switch (c) {
            case '7':
            case '8':
            case '9':
                img += scl;
            case '4':
            case '5':
            case '6':
                img += scl;
            default:
                break;
        }
    }
}

// begins computation
void computeKernel() {
    // setup params
    cudaMemcpy( gpu_params, params, 3 * sizeof(double), cudaMemcpyHostToDevice);

    // initialize streams
    int i, r;
    for (i = 0; i < 16; i++) {
        cudaStreamCreate((streams + i));
    }

    // execute kernels in the streams
    for (i = 0; i < 16; i++) {
        kernel<<<1, 256, 0, streams[i]>>>( gpu, gpu_params, i );
    }

    // setup asynchronous memory copy after completion
    for (i = 0; i < 16; i++) {
        for (r = 0; r < 64; r++) {
            cudaMemcpyAsync(row_pointers[64 * i + r], (gpu + i * 65536 * 3 + r * 1024 * 3), sizeof(uint8_t) * 1024 * 3, cudaMemcpyDeviceToHost, streams[i]);
        }
    }

    cudaDeviceSynchronize();
}

extern void writePngOutput();

int main(int argc, char **argv) {

    // Initialize memory
    cudaMalloc( (void**)  &gpu, 1024 * 1024 * sizeof(uint8_t) * 3 );
    cudaMalloc( (void**)  &gpu_params, 3 * sizeof(double) );

    row_pointers = (png_byte **) malloc (1024 * sizeof (png_byte *));
    for (int y = 0; y < 1024; y++) {
        row_pointers[y] = (png_byte *) malloc (sizeof (uint8_t) * 1024 * 3);
    }

   
    // do the process
    while (1) {
        readParams();
        computeKernel();
        writePngOutput();
    }

}

size_t pngBufferFill = 0;
extern void writeFn(png_structp png_ptr, png_bytep data, uint32_t size);
extern void flushFn(png_structp png_ptr);

void writePngOutput() {

    png_structp png_ptr = png_create_write_struct (PNG_LIBPNG_VER_STRING, NULL, NULL, NULL);
    png_infop   info_ptr = png_create_info_struct (png_ptr);
    
    png_set_IHDR (png_ptr,
            info_ptr,
            1024,                           // width
            1024,                           // height
            8,                              // depth
            PNG_COLOR_TYPE_RGB,
            PNG_INTERLACE_NONE,
            PNG_COMPRESSION_TYPE_DEFAULT,
            PNG_FILTER_TYPE_DEFAULT);

    png_set_write_fn(png_ptr, NULL, (png_rw_ptr) writeFn, (png_flush_ptr) flushFn);

    png_init_io (png_ptr, stdout);
    png_set_rows (png_ptr, info_ptr, row_pointers);
    png_write_png (png_ptr, info_ptr, PNG_TRANSFORM_IDENTITY, NULL);

    write(2, &pngBufferFill, 4);
    pngBufferFill = 0;

    png_destroy_write_struct (&png_ptr, &info_ptr);
}

void writeFn(png_structp png_ptr, png_bytep data, uint32_t size) {
    write(1, data, size);
    pngBufferFill += size;
}

void flushFn(png_structp png_ptr) {
    fflush(stdout);
}

	.file	"tmpxft_0033601b_00000000-6_parallelbrot.cudafe1.cpp"
	.text
#APP

#NO_APP
	.globl	_Z7writeFnP14png_struct_defPhj
	.type	_Z7writeFnP14png_struct_defPhj, @function
_Z7writeFnP14png_struct_defPhj:
.LFB2045:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%edx, %ebx
	movl	$1, %edi
	movq	%rbx, %rdx
	call	write@PLT
	addq	%rbx, pngBufferFill(%rip)
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2045:
	.size	_Z7writeFnP14png_struct_defPhj, .-_Z7writeFnP14png_struct_defPhj
	.globl	_Z7flushFnP14png_struct_def
	.type	_Z7flushFnP14png_struct_def, @function
_Z7flushFnP14png_struct_def:
.LFB2046:
	.cfi_startproc
	endbr64
	movq	stdout(%rip), %rdi
	jmp	fflush@PLT
	.cfi_endproc
.LFE2046:
	.size	_Z7flushFnP14png_struct_def, .-_Z7flushFnP14png_struct_def
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2049:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2049:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8writeHSVPhi
	.type	_Z8writeHSVPhi, @function
_Z8writeHSVPhi:
.LFB2040:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2040:
	.size	_Z8writeHSVPhi, .-_Z8writeHSVPhi
	.globl	_Z10readParamsv
	.type	_Z10readParamsv, @function
_Z10readParamsv:
.LFB2041:
	.cfi_startproc
	endbr64
	movsd	.LC0(%rip), %xmm0
	movq	.LC1(%rip), %rax
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	params(%rip), %rbx
	movq	%rax, 16+params(%rip)
	movsd	%xmm0, params(%rip)
	movsd	%xmm0, 8+params(%rip)
	call	getchar@PLT
	leaq	_Z10mandelbrotPhPdi(%rip), %rdx
	cmpb	$109, %al
	leaq	_Z6euclidPhPdi(%rip), %rax
	cmove	%rdx, %rax
	movq	%rax, kernel(%rip)
.L15:
	call	getchar@PLT
	movl	%eax, %ecx
	cmpb	$64, %al
	je	.L23
	movsd	16+params(%rip), %xmm0
	divsd	.LC2(%rip), %xmm0
	movsd	%xmm0, 16+params(%rip)
	cmpb	$57, %cl
	ja	.L15
	movl	$1, %eax
	movl	$73, %edx
	salq	%cl, %rax
	salq	$50, %rdx
	testq	%rdx, %rax
	jne	.L11
	movl	$73, %edx
	salq	$51, %rdx
	testq	%rdx, %rax
	je	.L12
	movsd	(%rbx), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, (%rbx)
.L11:
	movsd	(%rbx), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, (%rbx)
.L12:
	cmpb	$54, %cl
	jg	.L13
	cmpb	$51, %cl
	jg	.L14
	jmp	.L15
.L13:
	movsd	8+params(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 8+params(%rip)
.L14:
	addsd	8+params(%rip), %xmm0
	movsd	%xmm0, 8+params(%rip)
	jmp	.L15
.L23:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2041:
	.size	_Z10readParamsv, .-_Z10readParamsv
	.globl	_Z13computeKernelv
	.type	_Z13computeKernelv, @function
_Z13computeKernelv:
.LFB2042:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$1, %ecx
	movl	$24, %edx
	leaq	params(%rip), %rsi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	leaq	streams(%rip), %rbx
	leaq	128(%rbx), %rbp
	movq	%rbx, %r12
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	gpu_params(%rip), %rdi
	call	cudaMemcpy@PLT
.L25:
	movq	%rbx, %rdi
	addq	$8, %rbx
	call	cudaStreamCreate@PLT
	cmpq	%rbp, %rbx
	jne	.L25
	movl	$16777217, %ebp
	xorl	%ebx, %ebx
	salq	$8, %rbp
.L27:
	movq	(%r12,%rbx,8), %r9
	xorl	%r8d, %r8d
	movq	%rbp, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rbp, 20(%rsp)
	movl	$1, 28(%rsp)
	movq	%rdi, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	gpu_params(%rip), %rsi
	movq	gpu(%rip), %rdi
	movl	%ebx, %edx
	call	*kernel(%rip)
.L26:
	incq	%rbx
	cmpq	$16, %rbx
	jne	.L27
	xorl	%ebp, %ebp
.L28:
	movq	%rbp, %rbx
	movq	%rbp, %r14
	incq	%rbp
	salq	$9, %rbx
	leaq	512(%rbx), %r13
.L29:
	movq	row_pointers(%rip), %rax
	movq	(%r12,%r14,8), %r8
	movl	$2, %ecx
	imulq	$384, %rbx, %rsi
	movl	$3072, %edx
	addq	gpu(%rip), %rsi
	movq	(%rax,%rbx), %rdi
	addq	$8, %rbx
	call	cudaMemcpyAsync@PLT
	cmpq	%r13, %rbx
	jne	.L29
	cmpq	$16, %rbp
	jne	.L28
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaDeviceSynchronize@PLT
	.cfi_endproc
.LFE2042:
	.size	_Z13computeKernelv, .-_Z13computeKernelv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"1.6.43"
	.text
	.globl	_Z14writePngOutputv
	.type	_Z14writePngOutputv, @function
_Z14writePngOutputv:
.LFB2044:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rdi
	call	png_create_write_struct@PLT
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	png_create_info_struct@PLT
	movl	$2, %r9d
	movl	$8, %r8d
	movl	$1024, %ecx
	movq	%rax, 16(%rsp)
	movq	%rax, %rsi
	movl	$1024, %edx
	pushq	%rax
	.cfi_def_cfa_offset 56
	pushq	$0
	.cfi_def_cfa_offset 64
	pushq	$0
	.cfi_def_cfa_offset 72
	pushq	$0
	.cfi_def_cfa_offset 80
	movq	40(%rsp), %rdi
	call	png_set_IHDR@PLT
	movq	40(%rsp), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	xorl	%esi, %esi
	leaq	_Z7flushFnP14png_struct_def(%rip), %rcx
	leaq	_Z7writeFnP14png_struct_defPhj(%rip), %rdx
	call	png_set_write_fn@PLT
	movq	stdout(%rip), %rsi
	movq	8(%rsp), %rdi
	call	png_init_io@PLT
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movq	row_pointers(%rip), %rdx
	call	png_set_rows@PLT
	movq	16(%rsp), %rsi
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	movq	8(%rsp), %rdi
	call	png_write_png@PLT
	movl	$4, %edx
	movl	$2, %edi
	leaq	pngBufferFill(%rip), %rsi
	call	write@PLT
	xorl	%edx, %edx
	leaq	16(%rsp), %rsi
	leaq	8(%rsp), %rdi
	movq	%rdx, pngBufferFill(%rip)
	call	png_destroy_write_struct@PLT
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2044:
	.size	_Z14writePngOutputv, .-_Z14writePngOutputv
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2043:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$3145728, %esi
	leaq	gpu(%rip), %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	xorl	%ebx, %ebx
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	cudaMalloc@PLT
	movl	$24, %esi
	leaq	gpu_params(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$8192, %edi
	call	malloc@PLT
	movq	%rax, row_pointers(%rip)
	movq	%rax, %rbp
.L39:
	movl	$3072, %edi
	call	malloc@PLT
	movq	%rax, 0(%rbp,%rbx,8)
	incq	%rbx
	cmpq	$1024, %rbx
	jne	.L39
.L40:
	call	_Z10readParamsv
	call	_Z13computeKernelv
	call	_Z14writePngOutputv
	jmp	.L40
	.cfi_endproc
.LFE2043:
	.size	main, .-main
	.text
	.globl	_Z28__device_stub__Z6euclidPhPdiPhPdi
	.type	_Z28__device_stub__Z6euclidPhPdiPhPdi, @function
_Z28__device_stub__Z6euclidPhPdiPhPdi:
.LFB2071:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6euclidPhPdi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L43:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2071:
	.size	_Z28__device_stub__Z6euclidPhPdiPhPdi, .-_Z28__device_stub__Z6euclidPhPdiPhPdi
	.globl	_Z6euclidPhPdi
	.type	_Z6euclidPhPdi, @function
_Z6euclidPhPdi:
.LFB2072:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z6euclidPhPdiPhPdi
	.cfi_endproc
.LFE2072:
	.size	_Z6euclidPhPdi, .-_Z6euclidPhPdi
	.globl	_Z33__device_stub__Z10mandelbrotPhPdiPhPdi
	.type	_Z33__device_stub__Z10mandelbrotPhPdiPhPdi, @function
_Z33__device_stub__Z10mandelbrotPhPdiPhPdi:
.LFB2073:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10mandelbrotPhPdi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L48:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2073:
	.size	_Z33__device_stub__Z10mandelbrotPhPdiPhPdi, .-_Z33__device_stub__Z10mandelbrotPhPdiPhPdi
	.globl	_Z10mandelbrotPhPdi
	.type	_Z10mandelbrotPhPdi, @function
_Z10mandelbrotPhPdi:
.LFB2074:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z10mandelbrotPhPdiPhPdi
	.cfi_endproc
.LFE2074:
	.size	_Z10mandelbrotPhPdi, .-_Z10mandelbrotPhPdi
	.section	.rodata.str1.1
.LC4:
	.string	"_Z10mandelbrotPhPdi"
.LC5:
	.string	"_Z6euclidPhPdi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2076:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10mandelbrotPhPdi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6euclidPhPdi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2076:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	pngBufferFill
	.bss
	.align 8
	.type	pngBufferFill, @object
	.size	pngBufferFill, 8
pngBufferFill:
	.zero	8
	.globl	kernel
	.align 8
	.type	kernel, @object
	.size	kernel, 8
kernel:
	.zero	8
	.globl	row_pointers
	.align 8
	.type	row_pointers, @object
	.size	row_pointers, 8
row_pointers:
	.zero	8
	.globl	params
	.align 16
	.type	params, @object
	.size	params, 24
params:
	.zero	24
	.globl	streams
	.align 32
	.type	streams, @object
	.size	streams, 128
streams:
	.zero	128
	.globl	gpu
	.align 8
	.type	gpu, @object
	.size	gpu, 8
gpu:
	.zero	8
	.globl	gpu_params
	.align 8
	.type	gpu_params, @object
	.size	gpu_params, 8
gpu_params:
	.zero	8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	-1073741824
	.align 8
.LC1:
	.long	0
	.long	1074790400
	.align 8
.LC2:
	.long	0
	.long	1074266112
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdint.h>
#include <unistd.h>

#include <png.h>
#include <hip/hip_runtime.h>
#include <math.h>

#define rel params[0]
#define img params[1]
#define scl params[2]

__device__ void writeHSV(uint8_t *pixel, int theta) {
    unsigned char region, remainder, q, t;
    region = theta / 43;
    remainder = (theta - (region * 43)) * 6;
   
    q = (255 * (255 - ((255 * remainder) >> 8))) >> 8;
    t = (255 * (255 - ((255 * (255 - remainder)) >> 8))) >> 8;

    switch (region) {
        case 0:
            *pixel++ = 255;
            *pixel++ = t;
            *pixel++ = 0;
            return;
        case 1:
            *pixel++ = q;
            *pixel++ = 255;
            *pixel++ = 0;
            return;
        case 2:
            *pixel++ = 0;
            *pixel++ = 255;
            *pixel++ = t;
            return;
        case 3:
            *pixel++ = 0;
            *pixel++ = q;
            *pixel++ = 255;
            return;
        case 4:
            *pixel++ = t;
            *pixel++ = 0;
            *pixel++ = 255;
            return;
        default:
            *pixel++ = 255;
            *pixel++ = 0;
            *pixel++ = q;
            return;
    }
}

__global__ void euclid (uint8_t *gpu, double *params, int streamNumber ) {
    int index, pos;
    int c, t;
    uint32_t x, y; 

    index = streamNumber * 65536 + threadIdx.x * 256;
    for (pos = 0; pos < 256; pos++) {
        x = (uint32_t) (((rel + 2.0) + (double) (.5 + (index % 1024)) * scl) * 1048576);
        y = (uint32_t) (((img + 2.0) + (double) (.5 + (index / 1024)) * scl) * 1048576);
        c = 0;
        t = 1;
        while (1) {
            if (x > y) {
                x -= y;
                c++;
            } else if (y > x) {
                y -= x;
            } else {
                break;
            }
            t++;
            if (t > 1000) break;
        }

        uint8_t *pixel = (gpu + index++ * 3);
        *pixel++ = (255 * c) / t;
        *pixel++ = (255 * c) / t;
        *pixel++ = (255 * c) / t;
    }
}

__global__ void mandelbrot (uint8_t *gpu, double *params, int streamNumber ) {
    int index, c, pos;
    double cr, ci, zr, zi, t;

    index = streamNumber * 65536 + threadIdx.x * 256;
    for (pos = 0; pos < 256; pos++) {
        c = 0;
        cr = rel + (double) (.5 + (index % 1024)) * scl / 1024.0;
        ci = img + (double) (.5 + (index / 1024)) * scl / 1024.0;
        zr = cr;
        zi = ci;

        while (++c < 1000 && zr * zr + zi * zi < 4) {
            t = zr;
            zr = zr * zr - zi * zi + cr;
            zi = 2 * t * zi + ci;
        }
    
        uint8_t *pixel = (gpu + index * 3);
        if (c == 1000) {
            *pixel++ = 0;
            *pixel++ = 0;
            *pixel++ = 0;
        } else {
            writeHSV(pixel, c);
        }
        index ++;
    }
}

// GPU variables
double *gpu_params;
uint8_t *gpu; 

// Host variables
hipStream_t streams[16];
double params[3];
png_byte ** row_pointers;
void (*kernel) (uint8_t *, double *, int);


// reads parameters from stdin and writes them to params array
// initializes rel, img, and scl macros
void readParams() {
    rel = -2.0;
    img = -2.0;
    scl = 4.0;
    char c = getchar();
    switch (c) {
        case 'm':
            kernel = mandelbrot;
            break;
        default:
            kernel = euclid;
    }
    while ((c = getchar()) != '@') {
        scl /= 3.0;
        switch (c) {
            case '3':
            case '6':
            case '9':
                rel += scl;
            case '2':
            case '5':
            case '8':
                rel += scl;
            default:
                break;
        }
        switch (c) {
            case '7':
            case '8':
            case '9':
                img += scl;
            case '4':
            case '5':
            case '6':
                img += scl;
            default:
                break;
        }
    }
}

// begins computation
void computeKernel() {
    // setup params
    hipMemcpy( gpu_params, params, 3 * sizeof(double), hipMemcpyHostToDevice);

    // initialize streams
    int i, r;
    for (i = 0; i < 16; i++) {
        hipStreamCreate((streams + i));
    }

    // execute kernels in the streams
    for (i = 0; i < 16; i++) {
        kernel<<<1, 256, 0, streams[i]>>>( gpu, gpu_params, i );
    }

    // setup asynchronous memory copy after completion
    for (i = 0; i < 16; i++) {
        for (r = 0; r < 64; r++) {
            hipMemcpyAsync(row_pointers[64 * i + r], (gpu + i * 65536 * 3 + r * 1024 * 3), sizeof(uint8_t) * 1024 * 3, hipMemcpyDeviceToHost, streams[i]);
        }
    }

    hipDeviceSynchronize();
}

extern void writePngOutput();

int main(int argc, char **argv) {

    // Initialize memory
    hipMalloc( (void**)  &gpu, 1024 * 1024 * sizeof(uint8_t) * 3 );
    hipMalloc( (void**)  &gpu_params, 3 * sizeof(double) );

    row_pointers = (png_byte **) malloc (1024 * sizeof (png_byte *));
    for (int y = 0; y < 1024; y++) {
        row_pointers[y] = (png_byte *) malloc (sizeof (uint8_t) * 1024 * 3);
    }

   
    // do the process
    while (1) {
        readParams();
        computeKernel();
        writePngOutput();
    }

}

size_t pngBufferFill = 0;
extern void writeFn(png_structp png_ptr, png_bytep data, uint32_t size);
extern void flushFn(png_structp png_ptr);

void writePngOutput() {

    png_structp png_ptr = png_create_write_struct (PNG_LIBPNG_VER_STRING, NULL, NULL, NULL);
    png_infop   info_ptr = png_create_info_struct (png_ptr);
    
    png_set_IHDR (png_ptr,
            info_ptr,
            1024,                           // width
            1024,                           // height
            8,                              // depth
            PNG_COLOR_TYPE_RGB,
            PNG_INTERLACE_NONE,
            PNG_COMPRESSION_TYPE_DEFAULT,
            PNG_FILTER_TYPE_DEFAULT);

    png_set_write_fn(png_ptr, NULL, (png_rw_ptr) writeFn, (png_flush_ptr) flushFn);

    png_init_io (png_ptr, stdout);
    png_set_rows (png_ptr, info_ptr, row_pointers);
    png_write_png (png_ptr, info_ptr, PNG_TRANSFORM_IDENTITY, NULL);

    write(2, &pngBufferFill, 4);
    pngBufferFill = 0;

    png_destroy_write_struct (&png_ptr, &info_ptr);
}

void writeFn(png_structp png_ptr, png_bytep data, uint32_t size) {
    write(1, data, size);
    pngBufferFill += size;
}

void flushFn(png_structp png_ptr) {
    fflush(stdout);
}

	.text
	.file	"parallelbrot.hip"
	.globl	_Z21__device_stub__euclidPhPdi  # -- Begin function _Z21__device_stub__euclidPhPdi
	.type	_Z21__device_stub__euclidPhPdi,@function
_Z21__device_stub__euclidPhPdi:         # @_Z21__device_stub__euclidPhPdi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6euclidPhPdi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__euclidPhPdi, .Lfunc_end0-_Z21__device_stub__euclidPhPdi
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__mandelbrotPhPdi # -- Begin function _Z25__device_stub__mandelbrotPhPdi
	.type	_Z25__device_stub__mandelbrotPhPdi,@function
_Z25__device_stub__mandelbrotPhPdi:     # @_Z25__device_stub__mandelbrotPhPdi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10mandelbrotPhPdi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__mandelbrotPhPdi, .Lfunc_end1-_Z25__device_stub__mandelbrotPhPdi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z10readParamsv
.LCPI2_0:
	.quad	0x4008000000000000              # double 3
	.text
	.globl	_Z10readParamsv
	.type	_Z10readParamsv,@function
_Z10readParamsv:                        # @_Z10readParamsv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$-4611686018427387904, %rax     # imm = 0xC000000000000000
	movq	%rax, params(%rip)
	movq	%rax, params+8(%rip)
	movabsq	$4616189618054758400, %rax      # imm = 0x4010000000000000
	movq	%rax, params+16(%rip)
	callq	getchar
	cmpb	$109, %al
	movl	$_Z10mandelbrotPhPdi, %eax
	movl	$_Z6euclidPhPdi, %ecx
	cmoveq	%rax, %rcx
	movq	%rcx, kernel(%rip)
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	callq	getchar
                                        # kill: def $eax killed $eax def $rax
	shll	$24, %eax
	cmpl	$1073741824, %eax               # imm = 0x40000000
	je	.LBB2_9
# %bb.2:                                # %.lr.ph
                                        #   in Loop: Header=BB2_1 Depth=1
	sarl	$24, %eax
	movsd	params+16(%rip), %xmm0          # xmm0 = mem[0],zero
	divsd	.LCPI2_0(%rip), %xmm0
	movsd	%xmm0, params+16(%rip)
	leal	-50(%rax), %ecx
	cmpl	$7, %ecx
	ja	.LBB2_1
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_1 Depth=1
	jmpq	*.LJTI2_0(,%rcx,8)
.LBB2_4:                                #   in Loop: Header=BB2_1 Depth=1
	movsd	params(%rip), %xmm1             # xmm1 = mem[0],zero
	addsd	%xmm0, %xmm1
	movsd	%xmm1, params(%rip)
.LBB2_5:                                #   in Loop: Header=BB2_1 Depth=1
	movsd	params(%rip), %xmm1             # xmm1 = mem[0],zero
	addsd	%xmm0, %xmm1
	movsd	%xmm1, params(%rip)
	leal	-52(%rax), %ecx
	cmpl	$3, %ecx
	jb	.LBB2_8
# %bb.6:                                #   in Loop: Header=BB2_1 Depth=1
	addl	$-55, %eax
	cmpl	$2, %eax
	ja	.LBB2_1
.LBB2_7:                                #   in Loop: Header=BB2_1 Depth=1
	movsd	params+8(%rip), %xmm1           # xmm1 = mem[0],zero
	addsd	%xmm0, %xmm1
	movsd	%xmm1, params+8(%rip)
.LBB2_8:                                #   in Loop: Header=BB2_1 Depth=1
	addsd	params+8(%rip), %xmm0
	movsd	%xmm0, params+8(%rip)
	jmp	.LBB2_1
.LBB2_9:                                # %._crit_edge
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z10readParamsv, .Lfunc_end2-_Z10readParamsv
	.cfi_endproc
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
.LJTI2_0:
	.quad	.LBB2_5
	.quad	.LBB2_4
	.quad	.LBB2_8
	.quad	.LBB2_5
	.quad	.LBB2_4
	.quad	.LBB2_7
	.quad	.LBB2_5
	.quad	.LBB2_4
                                        # -- End function
	.text
	.globl	_Z13computeKernelv              # -- Begin function _Z13computeKernelv
	.type	_Z13computeKernelv,@function
_Z13computeKernelv:                     # @_Z13computeKernelv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	gpu_params(%rip), %rdi
	movl	$params, %esi
	movl	$24, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	xorl	%ebx, %ebx
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	leaq	streams(%rbx), %rdi
	callq	hipStreamCreate
	addq	$8, %rbx
	cmpq	$128, %rbx
	jne	.LBB3_1
# %bb.2:                                # %.preheader23.preheader
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	xorl	%r14d, %r14d
	leaq	255(%rbx), %r15
.LBB3_3:                                # %.preheader23
                                        # =>This Inner Loop Header: Depth=1
	movq	streams(,%r14,8), %r9
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_5
# %bb.4:                                #   in Loop: Header=BB3_3 Depth=1
	movq	kernel(%rip), %rax
	movq	gpu(%rip), %rdi
	movq	gpu_params(%rip), %rsi
	movl	%r14d, %edx
	callq	*(%rax)
.LBB3_5:                                #   in Loop: Header=BB3_3 Depth=1
	incq	%r14
	cmpq	$16, %r14
	jne	.LBB3_3
# %bb.6:                                # %.preheader.preheader
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB3_7:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_8 Depth 2
	movq	%rbx, %r12
	xorl	%r13d, %r13d
.LBB3_8:                                #   Parent Loop BB3_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	row_pointers(%rip), %rax
	addq	%r14, %rax
	movq	(%rax,%r13,8), %rdi
	movq	gpu(%rip), %rsi
	addq	%r12, %rsi
	movq	streams(,%r15,8), %r8
	movl	$3072, %edx                     # imm = 0xC00
	movl	$2, %ecx
	callq	hipMemcpyAsync
	incq	%r13
	addq	$3072, %r12                     # imm = 0xC00
	cmpq	$64, %r13
	jne	.LBB3_8
# %bb.9:                                #   in Loop: Header=BB3_7 Depth=1
	incq	%r15
	addq	$512, %r14                      # imm = 0x200
	addq	$196608, %rbx                   # imm = 0x30000
	cmpq	$16, %r15
	jne	.LBB3_7
# %bb.10:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipDeviceSynchronize            # TAILCALL
.Lfunc_end3:
	.size	_Z13computeKernelv, .Lfunc_end3-_Z13computeKernelv
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	$gpu, %edi
	movl	$3145728, %esi                  # imm = 0x300000
	callq	hipMalloc
	movl	$gpu_params, %edi
	movl	$24, %esi
	callq	hipMalloc
	movl	$8192, %edi                     # imm = 0x2000
	callq	malloc
	movq	%rax, row_pointers(%rip)
	xorl	%ebx, %ebx
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	movl	$3072, %edi                     # imm = 0xC00
	callq	malloc
	movq	row_pointers(%rip), %rcx
	movq	%rax, (%rcx,%rbx,8)
	incq	%rbx
	cmpq	$1024, %rbx                     # imm = 0x400
	jne	.LBB4_1
.LBB4_2:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	callq	_Z10readParamsv
	callq	_Z13computeKernelv
	callq	_Z14writePngOutputv
	jmp	.LBB4_2
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z14writePngOutputv             # -- Begin function _Z14writePngOutputv
	.type	_Z14writePngOutputv,@function
_Z14writePngOutputv:                    # @_Z14writePngOutputv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%r13d, %r13d
	movl	$.L.str, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	png_create_write_struct
	movq	%rax, %r15
	leaq	8(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rax, %rdi
	callq	png_create_info_struct
	movq	%rax, %r12
	movq	%rsp, %r14
	movq	%rax, (%r14)
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r15, %rdi
	movq	%rax, %rsi
	movl	$1024, %edx                     # imm = 0x400
	movl	$1024, %ecx                     # imm = 0x400
	movl	$8, %r8d
	movl	$2, %r9d
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	callq	png_set_IHDR
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z7writeFnP14png_struct_defPhj, %edx
	movl	$_Z7flushFnP14png_struct_def, %ecx
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	png_set_write_fn
	movq	stdout(%rip), %rsi
	movq	%r15, %rdi
	callq	png_init_io
	movq	row_pointers(%rip), %rdx
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	png_set_rows
	movq	%r15, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	png_write_png
	movl	$pngBufferFill, %esi
	movl	$4, %edx
	movl	$2, %edi
	callq	write
	movq	$0, pngBufferFill(%rip)
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	png_destroy_write_struct
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z14writePngOutputv, .Lfunc_end5-_Z14writePngOutputv
	.cfi_endproc
                                        # -- End function
	.globl	_Z7writeFnP14png_struct_defPhj  # -- Begin function _Z7writeFnP14png_struct_defPhj
	.type	_Z7writeFnP14png_struct_defPhj,@function
_Z7writeFnP14png_struct_defPhj:         # @_Z7writeFnP14png_struct_defPhj
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%edx, %ebx
	movl	$1, %edi
	movq	%rbx, %rdx
	callq	write
	addq	%rbx, pngBufferFill(%rip)
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z7writeFnP14png_struct_defPhj, .Lfunc_end6-_Z7writeFnP14png_struct_defPhj
	.cfi_endproc
                                        # -- End function
	.globl	_Z7flushFnP14png_struct_def     # -- Begin function _Z7flushFnP14png_struct_def
	.type	_Z7flushFnP14png_struct_def,@function
_Z7flushFnP14png_struct_def:            # @_Z7flushFnP14png_struct_def
	.cfi_startproc
# %bb.0:
	movq	stdout(%rip), %rdi
	jmp	fflush                          # TAILCALL
.Lfunc_end7:
	.size	_Z7flushFnP14png_struct_def, .Lfunc_end7-_Z7flushFnP14png_struct_def
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6euclidPhPdi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10mandelbrotPhPdi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6euclidPhPdi,@object          # @_Z6euclidPhPdi
	.section	.rodata,"a",@progbits
	.globl	_Z6euclidPhPdi
	.p2align	3, 0x0
_Z6euclidPhPdi:
	.quad	_Z21__device_stub__euclidPhPdi
	.size	_Z6euclidPhPdi, 8

	.type	_Z10mandelbrotPhPdi,@object     # @_Z10mandelbrotPhPdi
	.globl	_Z10mandelbrotPhPdi
	.p2align	3, 0x0
_Z10mandelbrotPhPdi:
	.quad	_Z25__device_stub__mandelbrotPhPdi
	.size	_Z10mandelbrotPhPdi, 8

	.type	gpu_params,@object              # @gpu_params
	.bss
	.globl	gpu_params
	.p2align	3, 0x0
gpu_params:
	.quad	0
	.size	gpu_params, 8

	.type	gpu,@object                     # @gpu
	.globl	gpu
	.p2align	3, 0x0
gpu:
	.quad	0
	.size	gpu, 8

	.type	streams,@object                 # @streams
	.globl	streams
	.p2align	4, 0x0
streams:
	.zero	128
	.size	streams, 128

	.type	params,@object                  # @params
	.globl	params
	.p2align	4, 0x0
params:
	.zero	24
	.size	params, 24

	.type	row_pointers,@object            # @row_pointers
	.globl	row_pointers
	.p2align	3, 0x0
row_pointers:
	.quad	0
	.size	row_pointers, 8

	.type	kernel,@object                  # @kernel
	.globl	kernel
	.p2align	3, 0x0
kernel:
	.quad	0
	.size	kernel, 8

	.type	pngBufferFill,@object           # @pngBufferFill
	.globl	pngBufferFill
	.p2align	3, 0x0
pngBufferFill:
	.quad	0                               # 0x0
	.size	pngBufferFill, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"1.6.43"
	.size	.L.str, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6euclidPhPdi"
	.size	.L__unnamed_1, 15

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10mandelbrotPhPdi"
	.size	.L__unnamed_2, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__euclidPhPdi
	.addrsig_sym _Z25__device_stub__mandelbrotPhPdi
	.addrsig_sym _Z7writeFnP14png_struct_defPhj
	.addrsig_sym _Z7flushFnP14png_struct_def
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6euclidPhPdi
	.addrsig_sym _Z10mandelbrotPhPdi
	.addrsig_sym gpu_params
	.addrsig_sym gpu
	.addrsig_sym streams
	.addrsig_sym params
	.addrsig_sym pngBufferFill
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6euclidPhPdi          ; -- Begin function _Z6euclidPhPdi
	.globl	_Z6euclidPhPdi
	.p2align	8
	.type	_Z6euclidPhPdi,@function
_Z6euclidPhPdi:                         ; @_Z6euclidPhPdi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 8, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v1, s4, 16, v0
	v_mov_b32_e32 v0, 0
	s_mov_b32 s4, 0
.LBB0_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_2 Depth 2
	s_clause 0x1
	global_load_b128 v[2:5], v0, s[2:3]
	global_load_b64 v[6:7], v0, s[2:3] offset:16
	v_ashrrev_i32_e32 v8, 31, v1
	s_mov_b32 s5, 0
	s_mov_b32 s6, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v8, 22, v8
	v_add_nc_u32_e32 v8, v1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 10, v8
	v_mul_i32_i24_e32 v9, 0x400, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v10, v1, v9
	v_cvt_f64_i32_e32 v[8:9], v8
	v_cvt_f64_i32_e32 v[10:11], v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], 0.5
	v_add_f64 v[10:11], v[10:11], 0.5
	s_waitcnt vmcnt(1)
	v_add_f64 v[2:3], v[2:3], 2.0
	v_add_f64 v[4:5], v[4:5], 2.0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[10:11], v[6:7], v[2:3]
	v_fma_f64 v[4:5], v[8:9], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[2:3], v[2:3], 20
	v_ldexp_f64 v[4:5], v[4:5], 20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f64_e32 v3, v[2:3]
	v_cvt_u32_f64_e32 v4, v[4:5]
	v_mov_b32_e32 v2, 0
.LBB0_2:                                ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_mov_b32 s7, 0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_le_u32_e64 v3, v4
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB0_6
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=2
	s_mov_b32 s9, exec_lo
	v_cmpx_gt_u32_e64 v4, v3
	s_xor_b32 s9, exec_lo, s9
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=2
	s_mov_b32 s7, exec_lo
	v_sub_nc_u32_e32 v4, v4, v3
; %bb.5:                                ; %Flow54
                                        ;   in Loop: Header=BB0_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s7, s7, exec_lo
.LBB0_6:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=2
	s_and_not1_saveexec_b32 s8, s8
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_add_nc_u32_e32 v2, 1, v2
	s_or_b32 s7, s7, exec_lo
; %bb.8:                                ; %Flow55
                                        ;   in Loop: Header=BB0_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s8
	v_mov_b32_e32 v5, s6
	s_mov_b32 s8, -1
	s_and_saveexec_b32 s9, s7
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=2
	s_add_i32 s6, s6, 1
	v_mov_b32_e32 v5, 0x3e9
	s_cmpk_eq_i32 s6, 0x3e9
	s_cselect_b32 s7, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s8, s7, exec_lo
; %bb.10:                               ; %Flow56
                                        ;   in Loop: Header=BB0_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s7, exec_lo, s8
	s_or_b32 s5, s7, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_2
; %bb.11:                               ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_cvt_f32_u32_e32 v3, v5
	v_mul_lo_u32 v2, 0xff, v2
	v_sub_nc_u32_e32 v4, 0, v5
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	s_cmpk_lg_i32 s4, 0x100
	v_rcp_iflag_f32_e32 v3, v3
	v_ashrrev_i32_e32 v6, 31, v2
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v3, 0x4f7ffffe, v3 :: v_dual_add_nc_u32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v2, v2, v6
	v_cvt_u32_f32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v4, v3
	v_mul_hi_u32 v4, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v3, v4
	v_mul_hi_u32 v3, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v3, v5
	v_sub_nc_u32_e32 v2, v2, v4
	v_add_nc_u32_e32 v4, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v7, v2, v5
	v_cmp_ge_u32_e32 vcc_lo, v2, v5
	v_dual_cndmask_b32 v2, v2, v7 :: v_dual_cndmask_b32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_u32_e32 vcc_lo, v2, v5
	v_add_nc_u32_e32 v4, 1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v3, v4, vcc_lo
	v_lshl_add_u32 v3, v1, 1, v1
	v_add_nc_u32_e32 v1, 1, v1
	v_xor_b32_e32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v3
	v_sub_nc_u32_e32 v4, v2, v6
	v_add_co_u32 v2, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v5, vcc_lo
	v_lshlrev_b16 v6, 8, v4
	v_and_b32_e32 v7, 0xff, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v5, v7, v6
	s_clause 0x1
	global_store_b8 v[2:3], v4, off offset:2
	global_store_b16 v[2:3], v5, off
	s_cbranch_scc1 .LBB0_1
; %bb.12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6euclidPhPdi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 10
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6euclidPhPdi, .Lfunc_end0-_Z6euclidPhPdi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 652
; NumSgprs: 12
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 12
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10mandelbrotPhPdi     ; -- Begin function _Z10mandelbrotPhPdi
	.globl	_Z10mandelbrotPhPdi
	.p2align	8
	.type	_Z10mandelbrotPhPdi,@function
_Z10mandelbrotPhPdi:                    ; @_Z10mandelbrotPhPdi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 8, v0
	v_mov_b32_e32 v12, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_lshl_add_u32 v11, s4, 16, v0
	s_mov_b32 s4, 0
.LBB1_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_2 Depth 2
	s_clause 0x1
	global_load_b64 v[0:1], v12, s[2:3] offset:16
	global_load_b128 v[2:5], v12, s[2:3]
	v_ashrrev_i32_e32 v6, 31, v11
	s_mov_b32 s5, 0
	s_mov_b32 s6, 1
                                        ; implicit-def: $sgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v6, 22, v6
	v_add_nc_u32_e32 v6, v11, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 10, v6
	v_mul_i32_i24_e32 v7, 0x400, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v8, v11, v7
	v_cvt_f64_i32_e32 v[6:7], v6
	v_cvt_f64_i32_e32 v[8:9], v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], 0.5
	v_add_f64 v[8:9], v[8:9], 0.5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[6:7], v[6:7], v[0:1]
	v_mul_f64 v[8:9], v[8:9], v[0:1]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], 0x3f500000, v[6:7], v[4:5]
	v_fma_f64 v[2:3], 0x3f500000, v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v8, v3
	v_dual_mov_b32 v4, v0 :: v_dual_mov_b32 v7, v2
.LBB1_2:                                ;   Parent Loop BB1_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mul_f64 v[9:10], v[4:5], v[4:5]
	v_mov_b32_e32 v6, s6
	s_or_b32 s7, s7, exec_lo
	s_mov_b32 s8, exec_lo
	v_fma_f64 v[13:14], v[7:8], v[7:8], v[9:10]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_f64_e32 4.0, v[13:14]
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=2
	v_mul_f64 v[13:14], v[7:8], v[7:8]
	v_add_f64 v[6:7], v[7:8], v[7:8]
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_cmpk_eq_i32 s6, 0x3e8
	s_cselect_b32 s9, -1, 0
	s_and_not1_b32 s7, s7, exec_lo
	s_and_b32 s9, s9, exec_lo
	s_or_b32 s7, s7, s9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[13:14], -v[9:10]
	v_fma_f64 v[4:5], v[6:7], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[2:3], v[9:10]
	v_dual_mov_b32 v6, 0x3e8 :: v_dual_mov_b32 v7, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v8, v9
.LBB1_4:                                ; %Flow69
                                        ;   in Loop: Header=BB1_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, exec_lo, s7
	s_or_b32 s5, s8, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB1_2
; %bb.5:                                ; %.critedge
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_lshl_add_u32 v0, v11, 1, v11
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_cmpx_ne_u32_e32 0x3e8, v6
	s_xor_b32 s5, exec_lo, s5
	s_cbranch_execz .LBB1_25
; %bb.6:                                ; %NodeBlock59
                                        ;   in Loop: Header=BB1_1 Depth=1
	v_mul_hi_u32 v2, 0x2fa0be83, v6
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 3, v2
	v_mad_u64_u32 v[3:4], null, 0xd5, v2, v[6:7]
	v_and_b32_e32 v7, 0xff, v2
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v3, 6
	v_and_b32_e32 v3, 0xfe, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, 0xff, v3
	v_mul_u32_u24_e32 v3, 0xff, v3
	v_mul_u32_u24_e32 v4, 0xff, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v3, 8, v3
	v_lshrrev_b32_e32 v4, 8, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v3, 0xff, v3
	v_xor_b32_e32 v4, 0xff, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_u32_u24_e32 v3, 0xff, v3
	v_mul_u32_u24_e32 v5, 0xff, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v4, 8, v3
                                        ; implicit-def: $vgpr3
	v_lshrrev_b32_e32 v5, 8, v5
	v_cmpx_lt_i16_e32 1, v7
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB1_20
; %bb.7:                                ; %NodeBlock57
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_mov_b32 s7, exec_lo
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr3
	v_cmpx_lt_i16_e32 2, v7
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB1_17
; %bb.8:                                ; %NodeBlock55
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_mov_b32 s8, exec_lo
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr3
	v_cmpx_lt_i16_e32 3, v7
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB1_14
; %bb.9:                                ; %LeafBlock
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_mov_b32 s9, exec_lo
                                        ; implicit-def: $sgpr11
                                        ; implicit-def: $sgpr10
	v_cmpx_ne_u16_e32 4, v7
	s_xor_b32 s9, exec_lo, s9
; %bb.10:                               ;   in Loop: Header=BB1_1 Depth=1
	s_movk_i32 s10, 0xff
	s_mov_b32 s11, 0
                                        ; implicit-def: $vgpr5
; %bb.11:                               ; %Flow
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_saveexec_b32 s9, s9
	v_dual_mov_b32 v6, s11 :: v_dual_mov_b32 v3, s10
	s_xor_b32 exec_lo, exec_lo, s9
; %bb.12:                               ;   in Loop: Header=BB1_1 Depth=1
	v_dual_mov_b32 v4, 0xff :: v_dual_mov_b32 v3, v5
	v_mov_b32_e32 v6, 0
; %bb.13:                               ; %Flow61
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v2, v4
                                        ; implicit-def: $vgpr4
.LBB1_14:                               ; %Flow62
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_and_not1_saveexec_b32 s8, s8
; %bb.15:                               ;   in Loop: Header=BB1_1 Depth=1
	v_dual_mov_b32 v2, 0xff :: v_dual_mov_b32 v3, 0
	v_mov_b32_e32 v6, v4
; %bb.16:                               ; %Flow63
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
                                        ; implicit-def: $vgpr5
.LBB1_17:                               ; %Flow64
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_and_not1_saveexec_b32 s7, s7
; %bb.18:                               ;   in Loop: Header=BB1_1 Depth=1
	v_dual_mov_b32 v6, 0xff :: v_dual_mov_b32 v3, 0
	v_mov_b32_e32 v2, v5
; %bb.19:                               ; %Flow65
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr7
.LBB1_20:                               ; %Flow67
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB1_24
; %bb.21:                               ; %NodeBlock
                                        ;   in Loop: Header=BB1_1 Depth=1
	v_mov_b32_e32 v3, 0xff
	s_mov_b32 s7, exec_lo
	v_cmpx_lt_i16_e32 0, v7
; %bb.22:                               ;   in Loop: Header=BB1_1 Depth=1
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v5, 0xff
	v_mov_b32_e32 v3, v4
; %bb.23:                               ; %Flow66
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v6, v5
.LBB1_24:                               ; %_Z8writeHSVPhi.exit
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b16 v4, 8, v6
	v_and_b32_e32 v3, 0xff, v3
	v_or_b32_e32 v3, v3, v4
	s_clause 0x1
	global_store_b8 v[0:1], v2, off offset:2
	global_store_b16 v[0:1], v3, off
                                        ; implicit-def: $vgpr0_vgpr1
.LBB1_25:                               ; %Flow68
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_and_not1_saveexec_b32 s5, s5
; %bb.26:                               ;   in Loop: Header=BB1_1 Depth=1
	s_clause 0x1
	global_store_b8 v[0:1], v12, off offset:2
	global_store_b16 v[0:1], v12, off
; %bb.27:                               ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v11, 1, v11
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s4, 0x100
	s_cbranch_scc1 .LBB1_1
; %bb.28:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10mandelbrotPhPdi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 12
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10mandelbrotPhPdi, .Lfunc_end1-_Z10mandelbrotPhPdi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 912
; NumSgprs: 14
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 14
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6euclidPhPdi
    .private_segment_fixed_size: 0
    .sgpr_count:     12
    .sgpr_spill_count: 0
    .symbol:         _Z6euclidPhPdi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10mandelbrotPhPdi
    .private_segment_fixed_size: 0
    .sgpr_count:     14
    .sgpr_spill_count: 0
    .symbol:         _Z10mandelbrotPhPdi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
