#ifdef USE_DOUBLE
#define real_t double
#define fftComplex_t cufftDoubleComplex
#define complex_t cuDoubleComplex
#else
#define real_t double
#define fftComplex_t cufftDoubleComplex
#define complex_t cuDoubleComplex
#endif

#include <stdio.h>
#include <stdlib.h>
#include <math.h>

#include <cuda.h>
#include <cuda_runtime.h>
#include <cufft.h>
#include <cuComplex.h>

#define nThrdsX 16
#define nThrdsY 16
#define nThrds 256

#define clight 299792458
#define PI 3.14159265358979323846
#define cmtops (2*PI*clight*1.e-10)

__device__ __forceinline__ cuDoubleComplex my_cexpc (cuDoubleComplex z)
{

  cuDoubleComplex res;

  double t = exp(z.x);

  res.x=cos(z.y);
  res.y=sin(z.y);

  res.x *= t;
  res.y *= t;

  return res;

}

__device__ __forceinline__ cuDoubleComplex my_cexpf (double z)
{

  cuDoubleComplex res;

  res.x=exp(z);
  res.y=0.0;

  return res;

}

__device__ __forceinline__ cuDoubleComplex my_cexpi (double z)
{

  cuDoubleComplex res;

  res.x=cos(z);
  res.y=sin(z);

  return res;

}

__device__ double g(double t, double *d_param)
{
  
  double f1,f2,f3,f4;
  
  f1=d_param[3]*exp(-t/d_param[6]);
  f2=d_param[4]*exp(-t/d_param[7]);
  f3=d_param[5]*exp(-t/d_param[8]);
  f4=(d_param[0]+d_param[1]+d_param[2])*t-(d_param[3]+d_param[4]+d_param[5]);
  
  return ( f1 + f2 + f3 + f4 );
  
}

__device__ cuDoubleComplex Rr(double t1 ,double t2, double t3, double *d_param)
{
  cuDoubleComplex f1;
  cuDoubleComplex f2;
  
  f1 = my_cexpi( -( t3 - t1 ) * d_param[9] * cmtops );
  f1 = cuCsub(f1 , cuCmul( my_cexpi( -cmtops * ( ( d_param[9] - d_param[10] ) * t3 - ( d_param[9] * t1 ) ) ) , my_cexpf( -(d_param[12]*t3)/(2.*d_param[11]) ) ) );
  f1 = cuCmul(f1 , my_cexpf( -( t1 + t3 + (2.*t2) ) / ( 2.*d_param[11] ) ) );
  f2 = my_cexpf(-g(t1,d_param) + g(t2,d_param) - g(t3,d_param) - g(t1+t2,d_param) - g(t2+t3,d_param) + g(t1+t2+t3,d_param)  );
  
  return cuCmul( f1 , f2 );
}

__device__ cuDoubleComplex Rnr(double t1 ,double t2, double t3, double *d_param)
{
  cuDoubleComplex f1;
  cuDoubleComplex f2;
  
  f1 = my_cexpi( -( t3 + t1 ) * d_param[9] * cmtops );
  f1 = cuCsub(f1 , cuCmul( my_cexpi( -cmtops * ( ( d_param[9] - d_param[10] ) * t3 + ( d_param[9] * t1 ) ) ) , my_cexpf( -(d_param[12]*t3)/(2.*d_param[11]) ) ) );
  f1 = cuCmul(f1 , my_cexpf( -( t1 + t3 + (2.*t2) ) / ( 2.*d_param[11] ) ) );
  f2 = my_cexpf( -g(t1,d_param) - g(t2,d_param) - g(t3,d_param) + g(t1+t2,d_param) + g(t2+t3,d_param) - g(t1+t2+t3,d_param) );
  
  return cuCmul( f1 , f2 );
}

__global__ void kernelHalfFirstX(cufftDoubleComplex *d_r)
{
  
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  
  cuDoubleComplex half;
  
  half.x=0.5;
  half.y=0.0;
  
  d_r[i]=cuCmul(d_r[i],half);
  
}

__global__ void kernelHalfFirstY(cufftDoubleComplex *d_r, int n)
{
  
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  
  int j = i*n;
  
  cuDoubleComplex half;
  
  half.x=0.5;
  half.y=0.0;
  
  if (j>0)
    d_r[j]=cuCmul(d_r[j],half); 
  
}

__global__ void kernelPermutation(cufftDoubleComplex *d_r,cufftDoubleComplex *d_ftr, int n)
{
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  int j = blockIdx.y * blockDim.y + threadIdx.y;
  
  int k = i * n + j;
  int l = i * n + j + n/2 ;
  int m = ( i + n/2 ) * n + j;
  int p = ( i + n/2 ) * n + j + n/2;
  
  d_r[m]=d_ftr[l];
  d_r[p]=d_ftr[k];
  d_r[l]=d_ftr[m];
  d_r[k]=d_ftr[p];
}

__global__ void kernelRephasing(cufftDoubleComplex *d_r,double dt,double t2,int n,double *d_param)
{
  
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  int j = blockIdx.y * blockDim.y + threadIdx.y;
  
  int k = i * n + j;
  
  double t1 = i * dt;
  double t3 = j * dt;
  
  d_r[k]=Rr(t1,t2,t3,d_param);
  
}

__global__ void kernelNonRephasing(cufftDoubleComplex *d_r, double dt, double t2,int n,double *d_param)
{
  
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  int j = blockIdx.y * blockDim.y + threadIdx.y;
  
  int k= i * n + j;
  
  double t1 = i * dt;
  double t3 = j * dt;
  
  d_r[k]=Rnr(t1,t2,t3,d_param);
  
}

int main(int argc, char* argv[])
{
  
  FILE* input=fopen(argv[1],"r");
  FILE* out=fopen("spec.dat","w");
  
  int i,ii,j,l,test;
  int iw1,iw3,iFirst,iLast,jFirst,jLast;
  int ndata,nw1,nw3,nave;
  
  double t2,dt;
  double w1min,w1max,w3min,w3max;
  double w1,w3;
  double **res;
  
  double c1,tau1,c2,tau2,c3,tau3,wm,delta,tLife,alpha;
  
  fscanf(input,"%lf %lf %lf %lf",&w1min,&w1max,&w3min,&w3max);
  fscanf(input,"%lf %lf %lf",&delta,&tLife,&alpha);
  fscanf(input,"%d %lf",&ndata,&dt);
  fscanf(input,"%lf",&t2);
  fscanf(input,"%d",&nave);
  
  ndata=(int)(ndata/nThrds)+1;
  ndata=nThrds*2*(int)(ndata/2);
 
  printf("%d %d\n",ndata,nThrds);
 
  nw1=0;
  test=1;
  for(i=ndata/2-1;i<ndata-1;i++)
  {
    
    w1=1.e10/((double)ndata*clight*dt)*(double)(1-ndata/2+i);
    
    if(w1>w1max)
    {
      iLast=i-1;
      break;
    }
    
    if( w1>=w1min )
    {
      nw1++;
      
      if(test)
      {
	test=0;
	iFirst=i;
      }
    }
    
  }
  
  nw3=0;
  test=1;
  for(j=ndata/2-1;j<ndata-1;j++)
  {
    
    w3=1.e10/((double)ndata*clight*dt)*(double)(1-ndata/2+j);
    
    if(w3>w3max)
    {
      jLast=j-1;
      break;
    }
    
    if( w3>=w3min )
    {
      nw3++;
      
      if(test)
      {
	test=0;
	jFirst=j;
      }
    }
    
  }

  printf("%d %d %d %d %d %d\n",iFirst,iLast,jFirst,jLast,nw1,nw3);
  
  res=(double**)malloc(nw1*sizeof(double*));
  
  for(i=0;i<nw1;i++)
  {
    res[i]=(double*)malloc(nw3*sizeof(double));
    for(j=0;j<nw3;j++)
      res[i][j]=0.0;
  }
  
  double *param,*d_param;
  
  param=(double*)malloc(13*sizeof(double));
  cudaMalloc((void**) &d_param,13*sizeof(double));
  
  param[10]=delta;
  param[11]=tLife;
  param[12]=alpha;
  
  cufftDoubleComplex *d_rlist,*d_ftrlist,*rlist;
  cufftHandle d_pr;
  
  rlist=(cufftDoubleComplex*)malloc(ndata*ndata*sizeof(cufftDoubleComplex));
  
  cudaMalloc((void**) &d_rlist,ndata*ndata*sizeof(cufftDoubleComplex));
  cudaMalloc((void**) &d_ftrlist,ndata*ndata*sizeof(cufftDoubleComplex));
  
  cufftPlan2d(&d_pr,ndata,ndata,CUFFT_Z2Z);
  
  dim3 threadsPerBlock(nThrdsX, nThrdsY);
  dim3 numBlocks(ndata / threadsPerBlock.x, ndata / threadsPerBlock.y);
  dim3 numHalfBlocks( (ndata/2) / threadsPerBlock.x, (ndata/2) / threadsPerBlock.y );
  
  for(ii=0;ii<nave;ii++)
  {
    
    fscanf(input,"%lf",&wm);
    fscanf(input,"%lf",&c1);
    fscanf(input,"%lf",&c2);
    fscanf(input,"%lf",&c3);
    fscanf(input,"%lf",&tau1);
    fscanf(input,"%lf",&tau2);
    fscanf(input,"%lf",&tau3);
    
    printf("%lf %lf %lf %lf %lf %lf %lf\n",wm,c1,c2,c3,tau1,tau2,tau3);

    param[0]=c1*tau1;
    param[1]=c2*tau2;
    param[2]=c3*tau3;
    
    param[3]=param[0]*tau1;
    param[4]=param[1]*tau2;
    param[5]=param[2]*tau3;
    
    param[6]=tau1;
    param[7]=tau2;
    param[8]=tau3;
    param[9]=wm;
    
    cudaMemcpy(d_param,param,13*sizeof(double),cudaMemcpyHostToDevice);
    
    // Rephasing component
    
    kernelRephasing<<<numBlocks,threadsPerBlock>>>(d_rlist,dt,t2,ndata,d_param);
    kernelHalfFirstX<<<(ndata / threadsPerBlock.x),threadsPerBlock>>>(d_rlist);
    kernelHalfFirstY<<<(ndata / threadsPerBlock.x),threadsPerBlock>>>(d_rlist,ndata);
    
    cufftExecZ2Z(d_pr,d_rlist,d_ftrlist,CUFFT_INVERSE);
    
    kernelPermutation<<<numHalfBlocks,threadsPerBlock>>>(d_rlist,d_ftrlist,ndata);
    
    cudaMemcpy(rlist,d_rlist,ndata*ndata*sizeof(cufftDoubleComplex),cudaMemcpyDeviceToHost);
    
    iw1=0;
    for(i=iFirst;i<=iLast;i++)
    {
      iw3=0;
      for(j=jFirst;j<=jLast;j++)
      {
	
	l=ndata*(ndata-i-1)+j+1;
	res[iw1][iw3]+=cuCreal(rlist[l]);
	
	iw3++;
      }
      iw1++;
    }
    
    // Non-rephasing component
    
    kernelNonRephasing<<<numBlocks,threadsPerBlock>>>(d_rlist,dt,t2,ndata,d_param);
    kernelHalfFirstX<<<(ndata / threadsPerBlock.x),threadsPerBlock>>>(d_rlist);
    kernelHalfFirstY<<<(ndata / threadsPerBlock.x),threadsPerBlock>>>(d_rlist,ndata);
    
    cufftExecZ2Z(d_pr,d_rlist,d_ftrlist,CUFFT_INVERSE);
    
    kernelPermutation<<<numHalfBlocks,threadsPerBlock>>>(d_rlist,d_ftrlist,ndata);
    
    cudaMemcpy(rlist,d_rlist,ndata*ndata*sizeof(cufftDoubleComplex),cudaMemcpyDeviceToHost);
    
    iw1=0;
    for(i=iFirst;i<=iLast;i++)
    {
      iw3=0;
      for(j=jFirst;j<=jLast;j++)
      {
	
	l=ndata*(i+1)+j+1;
	res[iw1][iw3]+=cuCreal(rlist[l]);
	
	iw3++;
      }
      iw1++;
    }
  }
  
  cufftDestroy(d_pr);
  
  cudaFree(d_rlist);
  cudaFree(d_ftrlist);
  
  iw1=0;
  for(i=iFirst;i<=iLast;i++)
  {
    
    w1=1.e10/((double)ndata*clight*dt)*(double)(1-ndata/2+i);
    
    iw3=0;
    for(j=jFirst;j<=jLast;j++)
    {
      
      w3=1.e10/((double)ndata*clight*dt)*(double)(1-ndata/2+j);
      
      fprintf(out,"%lf\t%lf\t%le\n",w1,w3,res[iw1][iw3]/(double)ndata);
      iw3++;
    }
    
    fprintf(out,"\n");
    iw1++;
  }
  
  for(i=0;i<nw1;i++)
    free(res[i]);
  
  free(res);
  
  fclose(out);
  fclose(input);
  
  return 0;
  
}

	.file	"tmpxft_0033037f_00000000-6_irspec_double.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2059:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z1gdPd
	.type	_Z1gdPd, @function
_Z1gdPd:
.LFB2053:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2053:
	.size	_Z1gdPd, .-_Z1gdPd
	.globl	_Z2RrdddPd
	.type	_Z2RrdddPd, @function
_Z2RrdddPd:
.LFB2054:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2054:
	.size	_Z2RrdddPd, .-_Z2RrdddPd
	.globl	_Z3RnrdddPd
	.type	_Z3RnrdddPd, @function
_Z3RnrdddPd:
.LFB2209:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2209:
	.size	_Z3RnrdddPd, .-_Z3RnrdddPd
	.globl	_Z43__device_stub__Z16kernelHalfFirstXP7double2P7double2
	.type	_Z43__device_stub__Z16kernelHalfFirstXP7double2P7double2, @function
_Z43__device_stub__Z16kernelHalfFirstXP7double2P7double2:
.LFB2081:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z16kernelHalfFirstXP7double2(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L8:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2081:
	.size	_Z43__device_stub__Z16kernelHalfFirstXP7double2P7double2, .-_Z43__device_stub__Z16kernelHalfFirstXP7double2P7double2
	.globl	_Z16kernelHalfFirstXP7double2
	.type	_Z16kernelHalfFirstXP7double2, @function
_Z16kernelHalfFirstXP7double2:
.LFB2082:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z16kernelHalfFirstXP7double2P7double2
	.cfi_endproc
.LFE2082:
	.size	_Z16kernelHalfFirstXP7double2, .-_Z16kernelHalfFirstXP7double2
	.globl	_Z44__device_stub__Z16kernelHalfFirstYP7double2iP7double2i
	.type	_Z44__device_stub__Z16kernelHalfFirstYP7double2iP7double2i, @function
_Z44__device_stub__Z16kernelHalfFirstYP7double2iP7double2i:
.LFB2083:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z16kernelHalfFirstYP7double2i(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L14:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2083:
	.size	_Z44__device_stub__Z16kernelHalfFirstYP7double2iP7double2i, .-_Z44__device_stub__Z16kernelHalfFirstYP7double2iP7double2i
	.globl	_Z16kernelHalfFirstYP7double2i
	.type	_Z16kernelHalfFirstYP7double2i, @function
_Z16kernelHalfFirstYP7double2i:
.LFB2084:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z16kernelHalfFirstYP7double2iP7double2i
	.cfi_endproc
.LFE2084:
	.size	_Z16kernelHalfFirstYP7double2i, .-_Z16kernelHalfFirstYP7double2i
	.globl	_Z48__device_stub__Z17kernelPermutationP7double2S0_iP7double2S0_i
	.type	_Z48__device_stub__Z17kernelPermutationP7double2S0_iP7double2S0_i, @function
_Z48__device_stub__Z17kernelPermutationP7double2S0_iP7double2S0_i:
.LFB2085:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z17kernelPermutationP7double2S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L19:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2085:
	.size	_Z48__device_stub__Z17kernelPermutationP7double2S0_iP7double2S0_i, .-_Z48__device_stub__Z17kernelPermutationP7double2S0_iP7double2S0_i
	.globl	_Z17kernelPermutationP7double2S0_i
	.type	_Z17kernelPermutationP7double2S0_i, @function
_Z17kernelPermutationP7double2S0_i:
.LFB2086:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z17kernelPermutationP7double2S0_iP7double2S0_i
	.cfi_endproc
.LFE2086:
	.size	_Z17kernelPermutationP7double2S0_i, .-_Z17kernelPermutationP7double2S0_i
	.globl	_Z47__device_stub__Z15kernelRephasingP7double2ddiPdP7double2ddiPd
	.type	_Z47__device_stub__Z15kernelRephasingP7double2ddiPdP7double2ddiPd, @function
_Z47__device_stub__Z15kernelRephasingP7double2ddiPdP7double2ddiPd:
.LFB2087:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	56(%rsp), %rcx
	leaq	64(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	48(%rsp), %rdx
	movsd	%xmm0, 32(%rsp)
	movsd	%xmm1, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z15kernelRephasingP7double2ddiPd(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L24:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2087:
	.size	_Z47__device_stub__Z15kernelRephasingP7double2ddiPdP7double2ddiPd, .-_Z47__device_stub__Z15kernelRephasingP7double2ddiPdP7double2ddiPd
	.globl	_Z15kernelRephasingP7double2ddiPd
	.type	_Z15kernelRephasingP7double2ddiPd, @function
_Z15kernelRephasingP7double2ddiPd:
.LFB2088:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z15kernelRephasingP7double2ddiPdP7double2ddiPd
	.cfi_endproc
.LFE2088:
	.size	_Z15kernelRephasingP7double2ddiPd, .-_Z15kernelRephasingP7double2ddiPd
	.globl	_Z50__device_stub__Z18kernelNonRephasingP7double2ddiPdP7double2ddiPd
	.type	_Z50__device_stub__Z18kernelNonRephasingP7double2ddiPdP7double2ddiPd, @function
_Z50__device_stub__Z18kernelNonRephasingP7double2ddiPdP7double2ddiPd:
.LFB2089:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	56(%rsp), %rcx
	leaq	64(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	48(%rsp), %rdx
	movsd	%xmm0, 32(%rsp)
	movsd	%xmm1, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z18kernelNonRephasingP7double2ddiPd(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L29:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2089:
	.size	_Z50__device_stub__Z18kernelNonRephasingP7double2ddiPdP7double2ddiPd, .-_Z50__device_stub__Z18kernelNonRephasingP7double2ddiPdP7double2ddiPd
	.globl	_Z18kernelNonRephasingP7double2ddiPd
	.type	_Z18kernelNonRephasingP7double2ddiPd, @function
_Z18kernelNonRephasingP7double2ddiPd:
.LFB2090:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z18kernelNonRephasingP7double2ddiPdP7double2ddiPd
	.cfi_endproc
.LFE2090:
	.size	_Z18kernelNonRephasingP7double2ddiPd, .-_Z18kernelNonRephasingP7double2ddiPd
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"r"
.LC1:
	.string	"w"
.LC2:
	.string	"spec.dat"
.LC3:
	.string	"%lf %lf %lf %lf"
.LC4:
	.string	"%lf %lf %lf"
.LC5:
	.string	"%d %lf"
.LC6:
	.string	"%lf"
.LC7:
	.string	"%d"
.LC8:
	.string	"%d %d\n"
.LC11:
	.string	"%d %d %d %d %d %d\n"
.LC13:
	.string	"%lf %lf %lf %lf %lf %lf %lf\n"
.LC14:
	.string	"%lf\t%lf\t%le\n"
.LC15:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	$2, %ebx
	subq	$280, %rsp
	.cfi_def_cfa_offset 336
	movq	8(%rsi), %rdi
	leaq	.LC0(%rip), %rsi
	movq	%fs:40, %rax
	movq	%rax, 264(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	leaq	.LC1(%rip), %rsi
	leaq	.LC2(%rip), %rdi
	movq	%rax, 8(%rsp)
	call	fopen@PLT
	movq	8(%rsp), %rdi
	leaq	104(%rsp), %r9
	leaq	88(%rsp), %rcx
	movq	%rax, 40(%rsp)
	leaq	80(%rsp), %rdx
	leaq	96(%rsp), %r8
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movq	8(%rsp), %rdi
	xorl	%eax, %eax
	leaq	184(%rsp), %r8
	leaq	176(%rsp), %rcx
	leaq	168(%rsp), %rdx
	leaq	.LC4(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movq	8(%rsp), %rdi
	xorl	%eax, %eax
	leaq	72(%rsp), %rcx
	leaq	52(%rsp), %rdx
	leaq	.LC5(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movq	8(%rsp), %rdi
	leaq	64(%rsp), %rdx
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movq	8(%rsp), %rdi
	leaq	56(%rsp), %rdx
	xorl	%eax, %eax
	leaq	.LC7(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movl	52(%rsp), %eax
	movl	$256, %ecx
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	cltd
	idivl	%ecx
	incl	%eax
	cltd
	idivl	%ebx
	sall	$9, %eax
	movl	%eax, %edx
	movl	%eax, 52(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	52(%rsp), %esi
	movl	$1, %r8d
	movsd	72(%rsp), %xmm2
	movl	%r8d, %r9d
	movsd	88(%rsp), %xmm3
	movsd	80(%rsp), %xmm4
	movl	%esi, %eax
	movsd	.LC9(%rip), %xmm5
	movsd	.LC10(%rip), %xmm6
	leal	-1(%rsi), %edi
	cltd
	idivl	%ebx
	leal	-1(%rax), %edx
	subl	%eax, %r9d
	movl	%edx, %ecx
.L35:
	cmpl	%ecx, %edi
	jle	.L38
	cvtsi2sdl	%esi, %xmm0
	movaps	%xmm6, %xmm1
	leal	(%r9,%rcx), %r10d
	mulsd	%xmm5, %xmm0
	mulsd	%xmm2, %xmm0
	divsd	%xmm0, %xmm1
	cvtsi2sdl	%r10d, %xmm0
	mulsd	%xmm1, %xmm0
	comisd	%xmm3, %xmm0
	jbe	.L84
	leal	-1(%rcx), %ebx
	movl	%ebx, 20(%rsp)
	jmp	.L38
.L84:
	comisd	%xmm4, %xmm0
	jb	.L39
	incl	%r14d
	testl	%r8d, %r8d
	je	.L39
	movl	%ecx, %ebp
	xorl	%r8d, %r8d
.L39:
	incl	%ecx
	jmp	.L35
.L38:
	movl	$1, %ecx
	movsd	104(%rsp), %xmm3
	movsd	96(%rsp), %xmm4
	xorl	%r13d, %r13d
	movl	%ecx, %r8d
	movsd	.LC9(%rip), %xmm5
	movsd	.LC10(%rip), %xmm6
	subl	%eax, %r8d
.L42:
	cmpl	%edx, %edi
	jle	.L45
	cvtsi2sdl	%esi, %xmm0
	movaps	%xmm6, %xmm1
	leal	(%r8,%rdx), %eax
	mulsd	%xmm5, %xmm0
	mulsd	%xmm2, %xmm0
	divsd	%xmm0, %xmm1
	cvtsi2sdl	%eax, %xmm0
	mulsd	%xmm1, %xmm0
	comisd	%xmm3, %xmm0
	jbe	.L85
	leal	-1(%rdx), %eax
	movl	%eax, 32(%rsp)
	jmp	.L45
.L85:
	comisd	%xmm4, %xmm0
	jb	.L46
	incl	%r13d
	testl	%ecx, %ecx
	je	.L46
	movl	%edx, 36(%rsp)
	xorl	%ecx, %ecx
.L46:
	incl	%edx
	jmp	.L42
.L45:
	pushq	%r13
	.cfi_def_cfa_offset 344
	movl	%ebp, %edx
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	pushq	%r14
	.cfi_def_cfa_offset 352
	movl	48(%rsp), %r9d
	xorl	%eax, %eax
	movslq	%r13d, %rbx
	movl	52(%rsp), %r8d
	movl	36(%rsp), %ecx
	salq	$3, %rbx
	xorl	%r15d, %r15d
	call	__printf_chk@PLT
	movslq	%r14d, %rdi
	salq	$3, %rdi
	call	malloc@PLT
	movq	%rax, %r12
	popq	%rax
	.cfi_def_cfa_offset 344
	popq	%rdx
	.cfi_def_cfa_offset 336
.L49:
	cmpl	%r15d, %r14d
	jle	.L87
	movq	%rbx, %rdi
	call	malloc@PLT
	xorl	%edx, %edx
	movq	%rax, (%r12,%r15,8)
.L50:
	cmpl	%edx, %r13d
	jle	.L88
	movq	$0x000000000, (%rax,%rdx,8)
	incq	%rdx
	jmp	.L50
.L88:
	incq	%r15
	jmp	.L49
.L87:
	movl	$104, %edi
	call	malloc@PLT
	movl	$104, %esi
	leaq	192(%rsp), %rdi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	movl	52(%rsp), %r13d
	movsd	168(%rsp), %xmm0
	imull	%r13d, %r13d
	movsd	%xmm0, 80(%rbx)
	movsd	176(%rsp), %xmm0
	movsd	%xmm0, 88(%rbx)
	movsd	184(%rsp), %xmm0
	movslq	%r13d, %r13
	salq	$4, %r13
	movsd	%xmm0, 96(%rbx)
	movq	%r13, %rdi
	call	malloc@PLT
	movq	%r13, %rsi
	leaq	200(%rsp), %rdi
	xorl	%r13d, %r13d
	movq	%rax, 24(%rsp)
	call	cudaMalloc@PLT
	movl	52(%rsp), %esi
	leaq	208(%rsp), %rdi
	imull	%esi, %esi
	movslq	%esi, %rsi
	salq	$4, %rsi
	call	cudaMalloc@PLT
	movl	52(%rsp), %esi
	movl	$105, %ecx
	leaq	60(%rsp), %rdi
	movl	%esi, %edx
	call	cufftPlan2d@PLT
	movl	52(%rsp), %eax
	movl	$2, %ecx
	movl	$1, 224(%rsp)
	movl	$1, 236(%rsp)
	movslq	36(%rsp), %r15
	movl	$1, 248(%rsp)
	movl	%eax, %edx
	shrl	$4, %edx
	movl	%edx, 228(%rsp)
	movl	%edx, 232(%rsp)
	cltd
	idivl	%ecx
	shrl	$4, %eax
	movl	%eax, 240(%rsp)
	movl	%eax, 244(%rsp)
.L53:
	cmpl	%r13d, 56(%rsp)
	jle	.L89
	movq	8(%rsp), %rdi
	leaq	160(%rsp), %rdx
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movq	8(%rsp), %rdi
	leaq	112(%rsp), %rdx
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movq	8(%rsp), %rdi
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	leaq	128(%rsp), %rdx
	call	__isoc23_fscanf@PLT
	movq	8(%rsp), %rdi
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	leaq	144(%rsp), %rdx
	call	__isoc23_fscanf@PLT
	movq	8(%rsp), %rdi
	leaq	120(%rsp), %rdx
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movq	8(%rsp), %rdi
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	leaq	136(%rsp), %rdx
	call	__isoc23_fscanf@PLT
	movq	8(%rsp), %rdi
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	leaq	152(%rsp), %rdx
	call	__isoc23_fscanf@PLT
	movsd	120(%rsp), %xmm4
	movsd	112(%rsp), %xmm1
	movb	$7, %al
	movsd	152(%rsp), %xmm6
	leaq	.LC13(%rip), %rsi
	movsd	136(%rsp), %xmm5
	movl	$2, %edi
	movsd	144(%rsp), %xmm3
	movsd	128(%rsp), %xmm2
	movsd	160(%rsp), %xmm0
	call	__printf_chk@PLT
	movsd	120(%rsp), %xmm5
	movsd	112(%rsp), %xmm2
	movq	%rbx, %rsi
	movsd	152(%rsp), %xmm3
	movl	$1, %ecx
	movsd	144(%rsp), %xmm0
	movl	$104, %edx
	movsd	136(%rsp), %xmm4
	mulsd	%xmm5, %xmm2
	movsd	128(%rsp), %xmm1
	movsd	%xmm5, 48(%rbx)
	mulsd	%xmm3, %xmm0
	movq	192(%rsp), %rdi
	movsd	%xmm3, 64(%rbx)
	mulsd	%xmm4, %xmm1
	movsd	%xmm4, 56(%rbx)
	movsd	%xmm2, (%rbx)
	mulsd	%xmm5, %xmm2
	movsd	%xmm0, 16(%rbx)
	mulsd	%xmm3, %xmm0
	movsd	%xmm1, 8(%rbx)
	mulsd	%xmm4, %xmm1
	movsd	%xmm2, 24(%rbx)
	movsd	%xmm0, 40(%rbx)
	movsd	160(%rsp), %xmm0
	movsd	%xmm1, 32(%rbx)
	movsd	%xmm0, 72(%rbx)
	call	cudaMemcpy@PLT
	movl	224(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	228(%rsp), %rdi
	movl	236(%rsp), %esi
	movabsq	$68719476752, %rdx
	movq	%rdx, 216(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	movq	192(%rsp), %rdx
	movl	52(%rsp), %esi
	movsd	64(%rsp), %xmm1
	movsd	72(%rsp), %xmm0
	movq	200(%rsp), %rdi
	call	_Z47__device_stub__Z15kernelRephasingP7double2ddiPdP7double2ddiPd
.L54:
	movl	52(%rsp), %eax
	movl	224(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	216(%rsp), %rdx
	shrl	$4, %eax
	movl	%eax, 252(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 256(%rsp)
	movq	252(%rsp), %rdi
	movl	260(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	movq	200(%rsp), %rdi
	call	_Z43__device_stub__Z16kernelHalfFirstXP7double2P7double2
.L55:
	movl	52(%rsp), %eax
	movl	224(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	216(%rsp), %rdx
	shrl	$4, %eax
	movl	%eax, 252(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 256(%rsp)
	movq	252(%rsp), %rdi
	movl	260(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	movl	52(%rsp), %esi
	movq	200(%rsp), %rdi
	call	_Z44__device_stub__Z16kernelHalfFirstYP7double2iP7double2i
.L56:
	movq	208(%rsp), %rdx
	movl	60(%rsp), %edi
	movl	$1, %ecx
	movq	200(%rsp), %rsi
	call	cufftExecZ2Z@PLT
	movl	224(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	216(%rsp), %rdx
	movq	240(%rsp), %rdi
	movl	248(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L57
	movl	52(%rsp), %edx
	movq	208(%rsp), %rsi
	movq	200(%rsp), %rdi
	call	_Z48__device_stub__Z17kernelPermutationP7double2S0_iP7double2S0_i
.L57:
	movl	52(%rsp), %edx
	movq	24(%rsp), %rdi
	movl	$2, %ecx
	movq	200(%rsp), %rsi
	imull	%edx, %edx
	movslq	%edx, %rdx
	salq	$4, %rdx
	call	cudaMemcpy@PLT
	movl	52(%rsp), %r8d
	xorl	%esi, %esi
	leal	-1(%r8), %edx
	subl	%ebp, %edx
	imull	%r8d, %edx
.L58:
	leal	0(%rbp,%rsi), %eax
	cmpl	%eax, 20(%rsp)
	jl	.L60
	movslq	%edx, %rax
	movq	24(%rsp), %r10
	movq	%r15, %rdi
	xorl	%ecx, %ecx
	addq	%r15, %rax
	salq	$4, %rax
	addq	%r10, %rax
.L61:
	cmpl	%edi, 32(%rsp)
	jl	.L90
	movq	(%r12,%rsi,8), %r9
	incq	%rdi
	addq	%rcx, %r9
	movsd	(%r9), %xmm0
	addsd	16(%rax,%rcx,2), %xmm0
	addq	$8, %rcx
	movsd	%xmm0, (%r9)
	jmp	.L61
.L90:
	incq	%rsi
	subl	%r8d, %edx
	jmp	.L58
.L60:
	movl	224(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	216(%rsp), %rdx
	movq	228(%rsp), %rdi
	movl	236(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L62
	movq	192(%rsp), %rdx
	movl	52(%rsp), %esi
	movsd	64(%rsp), %xmm1
	movsd	72(%rsp), %xmm0
	movq	200(%rsp), %rdi
	call	_Z50__device_stub__Z18kernelNonRephasingP7double2ddiPdP7double2ddiPd
.L62:
	movl	52(%rsp), %eax
	movl	224(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	216(%rsp), %rdx
	shrl	$4, %eax
	movl	%eax, 252(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 256(%rsp)
	movq	252(%rsp), %rdi
	movl	260(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L63
	movq	200(%rsp), %rdi
	call	_Z43__device_stub__Z16kernelHalfFirstXP7double2P7double2
.L63:
	movl	52(%rsp), %eax
	movl	224(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	216(%rsp), %rdx
	shrl	$4, %eax
	movl	%eax, 252(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 256(%rsp)
	movq	252(%rsp), %rdi
	movl	260(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	movl	52(%rsp), %esi
	movq	200(%rsp), %rdi
	call	_Z44__device_stub__Z16kernelHalfFirstYP7double2iP7double2i
.L64:
	movq	208(%rsp), %rdx
	movl	60(%rsp), %edi
	movl	$1, %ecx
	movq	200(%rsp), %rsi
	call	cufftExecZ2Z@PLT
	movl	224(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	216(%rsp), %rdx
	movq	240(%rsp), %rdi
	movl	248(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L65
	movl	52(%rsp), %edx
	movq	208(%rsp), %rsi
	movq	200(%rsp), %rdi
	call	_Z48__device_stub__Z17kernelPermutationP7double2S0_iP7double2S0_i
.L65:
	movl	52(%rsp), %edx
	movq	24(%rsp), %rdi
	movl	$2, %ecx
	movq	200(%rsp), %rsi
	imull	%edx, %edx
	movslq	%edx, %rdx
	salq	$4, %rdx
	call	cudaMemcpy@PLT
	movl	52(%rsp), %r8d
	leal	1(%rbp), %edx
	xorl	%esi, %esi
	imull	%r8d, %edx
.L66:
	leal	0(%rbp,%rsi), %eax
	cmpl	%eax, 20(%rsp)
	jl	.L68
	movslq	%edx, %rax
	movq	24(%rsp), %r10
	movq	%r15, %rdi
	xorl	%ecx, %ecx
	addq	%r15, %rax
	salq	$4, %rax
	addq	%r10, %rax
.L69:
	cmpl	%edi, 32(%rsp)
	jl	.L91
	movq	(%r12,%rsi,8), %r9
	incq	%rdi
	addq	%rcx, %r9
	movsd	(%r9), %xmm0
	addsd	16(%rax,%rcx,2), %xmm0
	addq	$8, %rcx
	movsd	%xmm0, (%r9)
	jmp	.L69
.L91:
	incq	%rsi
	addl	%r8d, %edx
	jmp	.L66
.L68:
	incl	%r13d
	jmp	.L53
.L89:
	movl	60(%rsp), %edi
	movq	%r12, %r13
	call	cufftDestroy@PLT
	movq	200(%rsp), %rdi
	call	cudaFree@PLT
	movq	208(%rsp), %rdi
	call	cudaFree@PLT
.L71:
	movl	20(%rsp), %eax
	cmpl	%eax, %ebp
	jg	.L92
	movl	52(%rsp), %eax
	movl	$2, %ecx
	movl	36(%rsp), %r15d
	xorl	%ebx, %ebx
	movsd	.LC10(%rip), %xmm1
	cvtsi2sdl	%eax, %xmm0
	mulsd	.LC9(%rip), %xmm0
	cltd
	mulsd	72(%rsp), %xmm0
	idivl	%ecx
	divsd	%xmm0, %xmm1
	negl	%eax
	leal	1(%rbp,%rax), %eax
	cvtsi2sdl	%eax, %xmm0
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, 24(%rsp)
.L72:
	movl	32(%rsp), %eax
	cmpl	%eax, %r15d
	jg	.L93
	movl	52(%rsp), %eax
	movsd	.LC9(%rip), %xmm0
	movl	$2, %esi
	movq	0(%r13), %rdx
	movsd	.LC10(%rip), %xmm1
	cvtsi2sdl	%eax, %xmm3
	movq	40(%rsp), %rdi
	movsd	(%rdx,%rbx), %xmm2
	cltd
	addq	$8, %rbx
	idivl	%esi
	mulsd	%xmm3, %xmm0
	leaq	.LC14(%rip), %rdx
	mulsd	72(%rsp), %xmm0
	divsd	%xmm3, %xmm2
	negl	%eax
	leal	1(%r15,%rax), %eax
	incl	%r15d
	divsd	%xmm0, %xmm1
	cvtsi2sdl	%eax, %xmm0
	movb	$3, %al
	mulsd	%xmm0, %xmm1
	movsd	24(%rsp), %xmm0
	call	__fprintf_chk@PLT
	jmp	.L72
.L93:
	movq	40(%rsp), %rdi
	leaq	.LC15(%rip), %rdx
	xorl	%eax, %eax
	incl	%ebp
	movl	$2, %esi
	addq	$8, %r13
	call	__fprintf_chk@PLT
	jmp	.L71
.L92:
	xorl	%ebx, %ebx
.L75:
	cmpl	%ebx, %r14d
	jle	.L94
	movq	(%r12,%rbx,8), %rdi
	incq	%rbx
	call	free@PLT
	jmp	.L75
.L94:
	movq	%r12, %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	fclose@PLT
	movq	8(%rsp), %rdi
	call	fclose@PLT
	movq	264(%rsp), %rax
	subq	%fs:40, %rax
	je	.L77
	call	__stack_chk_fail@PLT
.L77:
	addq	$280, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	main, .-main
	.section	.rodata.str1.1
.LC16:
	.string	"_Z18kernelNonRephasingP7double2ddiPd"
.LC17:
	.string	"_Z15kernelRephasingP7double2ddiPd"
.LC18:
	.string	"_Z17kernelPermutationP7double2S0_i"
.LC19:
	.string	"_Z16kernelHalfFirstYP7double2i"
.LC20:
	.string	"_Z16kernelHalfFirstXP7double2"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2092:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z18kernelNonRephasingP7double2ddiPd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15kernelRephasingP7double2ddiPd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17kernelPermutationP7double2S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16kernelHalfFirstYP7double2i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16kernelHalfFirstXP7double2(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2092:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC9:
	.long	1241513984
	.long	1102175864
	.align 8
.LC10:
	.long	536870912
	.long	1107468383
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#ifdef USE_DOUBLE
#define real_t double
#define fftComplex_t hipfftDoubleComplex
#define complex_t hipDoubleComplex
#else
#define real_t double
#define fftComplex_t hipfftDoubleComplex
#define complex_t hipDoubleComplex
#endif

#include <stdio.h>
#include <stdlib.h>
#include <math.h>

#include <hip/hip_runtime.h>

#include <hipfft/hipfft.h>
#include <hip/hip_complex.h>

#define nThrdsX 16
#define nThrdsY 16
#define nThrds 256

#define clight 299792458
#define PI 3.14159265358979323846
#define cmtops (2*PI*clight*1.e-10)

__device__ __forceinline__ hipDoubleComplex my_cexpc (hipDoubleComplex z)
{

  hipDoubleComplex res;

  double t = exp(z.x);

  res.x=cos(z.y);
  res.y=sin(z.y);

  res.x *= t;
  res.y *= t;

  return res;

}

__device__ __forceinline__ hipDoubleComplex my_cexpf (double z)
{

  hipDoubleComplex res;

  res.x=exp(z);
  res.y=0.0;

  return res;

}

__device__ __forceinline__ hipDoubleComplex my_cexpi (double z)
{

  hipDoubleComplex res;

  res.x=cos(z);
  res.y=sin(z);

  return res;

}

__device__ double g(double t, double *d_param)
{
  
  double f1,f2,f3,f4;
  
  f1=d_param[3]*exp(-t/d_param[6]);
  f2=d_param[4]*exp(-t/d_param[7]);
  f3=d_param[5]*exp(-t/d_param[8]);
  f4=(d_param[0]+d_param[1]+d_param[2])*t-(d_param[3]+d_param[4]+d_param[5]);
  
  return ( f1 + f2 + f3 + f4 );
  
}

__device__ hipDoubleComplex Rr(double t1 ,double t2, double t3, double *d_param)
{
  hipDoubleComplex f1;
  hipDoubleComplex f2;
  
  f1 = my_cexpi( -( t3 - t1 ) * d_param[9] * cmtops );
  f1 = hipCsub(f1 , hipCmul( my_cexpi( -cmtops * ( ( d_param[9] - d_param[10] ) * t3 - ( d_param[9] * t1 ) ) ) , my_cexpf( -(d_param[12]*t3)/(2.*d_param[11]) ) ) );
  f1 = hipCmul(f1 , my_cexpf( -( t1 + t3 + (2.*t2) ) / ( 2.*d_param[11] ) ) );
  f2 = my_cexpf(-g(t1,d_param) + g(t2,d_param) - g(t3,d_param) - g(t1+t2,d_param) - g(t2+t3,d_param) + g(t1+t2+t3,d_param)  );
  
  return hipCmul( f1 , f2 );
}

__device__ hipDoubleComplex Rnr(double t1 ,double t2, double t3, double *d_param)
{
  hipDoubleComplex f1;
  hipDoubleComplex f2;
  
  f1 = my_cexpi( -( t3 + t1 ) * d_param[9] * cmtops );
  f1 = hipCsub(f1 , hipCmul( my_cexpi( -cmtops * ( ( d_param[9] - d_param[10] ) * t3 + ( d_param[9] * t1 ) ) ) , my_cexpf( -(d_param[12]*t3)/(2.*d_param[11]) ) ) );
  f1 = hipCmul(f1 , my_cexpf( -( t1 + t3 + (2.*t2) ) / ( 2.*d_param[11] ) ) );
  f2 = my_cexpf( -g(t1,d_param) - g(t2,d_param) - g(t3,d_param) + g(t1+t2,d_param) + g(t2+t3,d_param) - g(t1+t2+t3,d_param) );
  
  return hipCmul( f1 , f2 );
}

__global__ void kernelHalfFirstX(hipfftDoubleComplex *d_r)
{
  
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  
  hipDoubleComplex half;
  
  half.x=0.5;
  half.y=0.0;
  
  d_r[i]=hipCmul(d_r[i],half);
  
}

__global__ void kernelHalfFirstY(hipfftDoubleComplex *d_r, int n)
{
  
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  
  int j = i*n;
  
  hipDoubleComplex half;
  
  half.x=0.5;
  half.y=0.0;
  
  if (j>0)
    d_r[j]=hipCmul(d_r[j],half); 
  
}

__global__ void kernelPermutation(hipfftDoubleComplex *d_r,hipfftDoubleComplex *d_ftr, int n)
{
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  int j = blockIdx.y * blockDim.y + threadIdx.y;
  
  int k = i * n + j;
  int l = i * n + j + n/2 ;
  int m = ( i + n/2 ) * n + j;
  int p = ( i + n/2 ) * n + j + n/2;
  
  d_r[m]=d_ftr[l];
  d_r[p]=d_ftr[k];
  d_r[l]=d_ftr[m];
  d_r[k]=d_ftr[p];
}

__global__ void kernelRephasing(hipfftDoubleComplex *d_r,double dt,double t2,int n,double *d_param)
{
  
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  int j = blockIdx.y * blockDim.y + threadIdx.y;
  
  int k = i * n + j;
  
  double t1 = i * dt;
  double t3 = j * dt;
  
  d_r[k]=Rr(t1,t2,t3,d_param);
  
}

__global__ void kernelNonRephasing(hipfftDoubleComplex *d_r, double dt, double t2,int n,double *d_param)
{
  
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  int j = blockIdx.y * blockDim.y + threadIdx.y;
  
  int k= i * n + j;
  
  double t1 = i * dt;
  double t3 = j * dt;
  
  d_r[k]=Rnr(t1,t2,t3,d_param);
  
}

int main(int argc, char* argv[])
{
  
  FILE* input=fopen(argv[1],"r");
  FILE* out=fopen("spec.dat","w");
  
  int i,ii,j,l,test;
  int iw1,iw3,iFirst,iLast,jFirst,jLast;
  int ndata,nw1,nw3,nave;
  
  double t2,dt;
  double w1min,w1max,w3min,w3max;
  double w1,w3;
  double **res;
  
  double c1,tau1,c2,tau2,c3,tau3,wm,delta,tLife,alpha;
  
  fscanf(input,"%lf %lf %lf %lf",&w1min,&w1max,&w3min,&w3max);
  fscanf(input,"%lf %lf %lf",&delta,&tLife,&alpha);
  fscanf(input,"%d %lf",&ndata,&dt);
  fscanf(input,"%lf",&t2);
  fscanf(input,"%d",&nave);
  
  ndata=(int)(ndata/nThrds)+1;
  ndata=nThrds*2*(int)(ndata/2);
 
  printf("%d %d\n",ndata,nThrds);
 
  nw1=0;
  test=1;
  for(i=ndata/2-1;i<ndata-1;i++)
  {
    
    w1=1.e10/((double)ndata*clight*dt)*(double)(1-ndata/2+i);
    
    if(w1>w1max)
    {
      iLast=i-1;
      break;
    }
    
    if( w1>=w1min )
    {
      nw1++;
      
      if(test)
      {
	test=0;
	iFirst=i;
      }
    }
    
  }
  
  nw3=0;
  test=1;
  for(j=ndata/2-1;j<ndata-1;j++)
  {
    
    w3=1.e10/((double)ndata*clight*dt)*(double)(1-ndata/2+j);
    
    if(w3>w3max)
    {
      jLast=j-1;
      break;
    }
    
    if( w3>=w3min )
    {
      nw3++;
      
      if(test)
      {
	test=0;
	jFirst=j;
      }
    }
    
  }

  printf("%d %d %d %d %d %d\n",iFirst,iLast,jFirst,jLast,nw1,nw3);
  
  res=(double**)malloc(nw1*sizeof(double*));
  
  for(i=0;i<nw1;i++)
  {
    res[i]=(double*)malloc(nw3*sizeof(double));
    for(j=0;j<nw3;j++)
      res[i][j]=0.0;
  }
  
  double *param,*d_param;
  
  param=(double*)malloc(13*sizeof(double));
  hipMalloc((void**) &d_param,13*sizeof(double));
  
  param[10]=delta;
  param[11]=tLife;
  param[12]=alpha;
  
  hipfftDoubleComplex *d_rlist,*d_ftrlist,*rlist;
  hipfftHandle d_pr;
  
  rlist=(hipfftDoubleComplex*)malloc(ndata*ndata*sizeof(hipfftDoubleComplex));
  
  hipMalloc((void**) &d_rlist,ndata*ndata*sizeof(hipfftDoubleComplex));
  hipMalloc((void**) &d_ftrlist,ndata*ndata*sizeof(hipfftDoubleComplex));
  
  hipfftPlan2d(&d_pr,ndata,ndata,HIPFFT_Z2Z);
  
  dim3 threadsPerBlock(nThrdsX, nThrdsY);
  dim3 numBlocks(ndata / threadsPerBlock.x, ndata / threadsPerBlock.y);
  dim3 numHalfBlocks( (ndata/2) / threadsPerBlock.x, (ndata/2) / threadsPerBlock.y );
  
  for(ii=0;ii<nave;ii++)
  {
    
    fscanf(input,"%lf",&wm);
    fscanf(input,"%lf",&c1);
    fscanf(input,"%lf",&c2);
    fscanf(input,"%lf",&c3);
    fscanf(input,"%lf",&tau1);
    fscanf(input,"%lf",&tau2);
    fscanf(input,"%lf",&tau3);
    
    printf("%lf %lf %lf %lf %lf %lf %lf\n",wm,c1,c2,c3,tau1,tau2,tau3);

    param[0]=c1*tau1;
    param[1]=c2*tau2;
    param[2]=c3*tau3;
    
    param[3]=param[0]*tau1;
    param[4]=param[1]*tau2;
    param[5]=param[2]*tau3;
    
    param[6]=tau1;
    param[7]=tau2;
    param[8]=tau3;
    param[9]=wm;
    
    hipMemcpy(d_param,param,13*sizeof(double),hipMemcpyHostToDevice);
    
    // Rephasing component
    
    kernelRephasing<<<numBlocks,threadsPerBlock>>>(d_rlist,dt,t2,ndata,d_param);
    kernelHalfFirstX<<<(ndata / threadsPerBlock.x),threadsPerBlock>>>(d_rlist);
    kernelHalfFirstY<<<(ndata / threadsPerBlock.x),threadsPerBlock>>>(d_rlist,ndata);
    
    hipfftExecZ2Z(d_pr,d_rlist,d_ftrlist,HIPFFT_BACKWARD);
    
    kernelPermutation<<<numHalfBlocks,threadsPerBlock>>>(d_rlist,d_ftrlist,ndata);
    
    hipMemcpy(rlist,d_rlist,ndata*ndata*sizeof(hipfftDoubleComplex),hipMemcpyDeviceToHost);
    
    iw1=0;
    for(i=iFirst;i<=iLast;i++)
    {
      iw3=0;
      for(j=jFirst;j<=jLast;j++)
      {
	
	l=ndata*(ndata-i-1)+j+1;
	res[iw1][iw3]+=hipCreal(rlist[l]);
	
	iw3++;
      }
      iw1++;
    }
    
    // Non-rephasing component
    
    kernelNonRephasing<<<numBlocks,threadsPerBlock>>>(d_rlist,dt,t2,ndata,d_param);
    kernelHalfFirstX<<<(ndata / threadsPerBlock.x),threadsPerBlock>>>(d_rlist);
    kernelHalfFirstY<<<(ndata / threadsPerBlock.x),threadsPerBlock>>>(d_rlist,ndata);
    
    hipfftExecZ2Z(d_pr,d_rlist,d_ftrlist,HIPFFT_BACKWARD);
    
    kernelPermutation<<<numHalfBlocks,threadsPerBlock>>>(d_rlist,d_ftrlist,ndata);
    
    hipMemcpy(rlist,d_rlist,ndata*ndata*sizeof(hipfftDoubleComplex),hipMemcpyDeviceToHost);
    
    iw1=0;
    for(i=iFirst;i<=iLast;i++)
    {
      iw3=0;
      for(j=jFirst;j<=jLast;j++)
      {
	
	l=ndata*(i+1)+j+1;
	res[iw1][iw3]+=hipCreal(rlist[l]);
	
	iw3++;
      }
      iw1++;
    }
  }
  
  hipfftDestroy(d_pr);
  
  hipFree(d_rlist);
  hipFree(d_ftrlist);
  
  iw1=0;
  for(i=iFirst;i<=iLast;i++)
  {
    
    w1=1.e10/((double)ndata*clight*dt)*(double)(1-ndata/2+i);
    
    iw3=0;
    for(j=jFirst;j<=jLast;j++)
    {
      
      w3=1.e10/((double)ndata*clight*dt)*(double)(1-ndata/2+j);
      
      fprintf(out,"%lf\t%lf\t%le\n",w1,w3,res[iw1][iw3]/(double)ndata);
      iw3++;
    }
    
    fprintf(out,"\n");
    iw1++;
  }
  
  for(i=0;i<nw1;i++)
    free(res[i]);
  
  free(res);
  
  fclose(out);
  fclose(input);
  
  return 0;
  
}

	.text
	.file	"irspec_double.hip"
	.globl	_Z31__device_stub__kernelHalfFirstXP15HIP_vector_typeIdLj2EE # -- Begin function _Z31__device_stub__kernelHalfFirstXP15HIP_vector_typeIdLj2EE
	.type	_Z31__device_stub__kernelHalfFirstXP15HIP_vector_typeIdLj2EE,@function
_Z31__device_stub__kernelHalfFirstXP15HIP_vector_typeIdLj2EE: # @_Z31__device_stub__kernelHalfFirstXP15HIP_vector_typeIdLj2EE
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__kernelHalfFirstXP15HIP_vector_typeIdLj2EE, .Lfunc_end0-_Z31__device_stub__kernelHalfFirstXP15HIP_vector_typeIdLj2EE
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__kernelHalfFirstYP15HIP_vector_typeIdLj2EEi # -- Begin function _Z31__device_stub__kernelHalfFirstYP15HIP_vector_typeIdLj2EEi
	.type	_Z31__device_stub__kernelHalfFirstYP15HIP_vector_typeIdLj2EEi,@function
_Z31__device_stub__kernelHalfFirstYP15HIP_vector_typeIdLj2EEi: # @_Z31__device_stub__kernelHalfFirstYP15HIP_vector_typeIdLj2EEi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__kernelHalfFirstYP15HIP_vector_typeIdLj2EEi, .Lfunc_end1-_Z31__device_stub__kernelHalfFirstYP15HIP_vector_typeIdLj2EEi
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__kernelPermutationP15HIP_vector_typeIdLj2EES1_i # -- Begin function _Z32__device_stub__kernelPermutationP15HIP_vector_typeIdLj2EES1_i
	.type	_Z32__device_stub__kernelPermutationP15HIP_vector_typeIdLj2EES1_i,@function
_Z32__device_stub__kernelPermutationP15HIP_vector_typeIdLj2EES1_i: # @_Z32__device_stub__kernelPermutationP15HIP_vector_typeIdLj2EES1_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z32__device_stub__kernelPermutationP15HIP_vector_typeIdLj2EES1_i, .Lfunc_end2-_Z32__device_stub__kernelPermutationP15HIP_vector_typeIdLj2EES1_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__kernelRephasingP15HIP_vector_typeIdLj2EEddiPd # -- Begin function _Z30__device_stub__kernelRephasingP15HIP_vector_typeIdLj2EEddiPd
	.type	_Z30__device_stub__kernelRephasingP15HIP_vector_typeIdLj2EEddiPd,@function
_Z30__device_stub__kernelRephasingP15HIP_vector_typeIdLj2EEddiPd: # @_Z30__device_stub__kernelRephasingP15HIP_vector_typeIdLj2EEddiPd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	40(%rsp), %rdi
	movsd	%xmm1, (%rdi)
	leaq	12(%rsp), %r8
	movl	%esi, (%r8)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%r8, 24(%rbx)
	movq	%rsi, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z30__device_stub__kernelRephasingP15HIP_vector_typeIdLj2EEddiPd, .Lfunc_end3-_Z30__device_stub__kernelRephasingP15HIP_vector_typeIdLj2EEddiPd
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd # -- Begin function _Z33__device_stub__kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd
	.type	_Z33__device_stub__kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd,@function
_Z33__device_stub__kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd: # @_Z33__device_stub__kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	40(%rsp), %rdi
	movsd	%xmm1, (%rdi)
	leaq	12(%rsp), %r8
	movl	%esi, (%r8)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%r8, 24(%rbx)
	movq	%rsi, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z33__device_stub__kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd, .Lfunc_end4-_Z33__device_stub__kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x41b1de784a000000              # double 299792458
.LCPI5_1:
	.quad	0x4202a05f20000000              # double 1.0E+10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$296, %rsp                      # imm = 0x128
	.cfi_def_cfa_offset 352
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	8(%rsi), %rdi
	movl	$.L.str, %esi
	callq	fopen
	movq	%rax, %r14
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	xorl	%ebx, %ebx
	leaq	288(%rsp), %rdx
	leaq	280(%rsp), %rcx
	leaq	272(%rsp), %r8
	leaq	264(%rsp), %r9
	movl	$.L.str.3, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	leaq	256(%rsp), %rdx
	leaq	248(%rsp), %rcx
	leaq	240(%rsp), %r8
	movl	$.L.str.4, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	leaq	12(%rsp), %r15
	leaq	40(%rsp), %rcx
	movl	$.L.str.5, %esi
	movq	%r14, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	leaq	216(%rsp), %rdx
	movl	$.L.str.6, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	leaq	84(%rsp), %rdx
	movl	$.L.str.7, %esi
	movq	%r14, 128(%rsp)                 # 8-byte Spill
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	(%r15), %eax
	leal	255(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$8, %ecx
	movl	%ecx, %eax
	incl	%eax
	shrl	$31, %eax
	leal	(%rcx,%rax), %esi
	incl	%esi
	andl	$-2, %esi
	shll	$8, %esi
	movl	%esi, (%r15)
	movl	$.L.str.8, %edi
	movl	$256, %edx                      # imm = 0x100
	xorl	%eax, %eax
	callq	printf
	movl	(%r15), %eax
	movl	%eax, %r14d
	shrl	$31, %r14d
	addl	%eax, %r14d
	sarl	%r14d
                                        # implicit-def: $edx
	movq	%rdx, 32(%rsp)                  # 8-byte Spill
                                        # implicit-def: $r12d
	movl	$0, %ebp
                                        # implicit-def: $ecx
                                        # implicit-def: $r13d
	cmpl	%eax, %r14d
	jge	.LBB5_12
# %bb.1:                                # %.lr.ph
	cvtsi2sd	%eax, %xmm1
	mulsd	.LCPI5_0(%rip), %xmm1
	leal	-1(%r14), %edx
	movsd	40(%rsp), %xmm3                 # xmm3 = mem[0],zero
	mulsd	%xmm1, %xmm3
	movsd	.LCPI5_1(%rip), %xmm0           # xmm0 = mem[0],zero
	movapd	%xmm0, %xmm2
	divsd	%xmm3, %xmm2
	movsd	280(%rsp), %xmm3                # xmm3 = mem[0],zero
	movsd	288(%rsp), %xmm4                # xmm4 = mem[0],zero
	movl	%r14d, %esi
	negl	%esi
	movl	%r14d, %edi
	subl	%r14d, %edi
	xorl	%r8d, %r8d
	movl	$1, %r10d
	movl	%edx, %r9d
                                        # implicit-def: $r12d
	xorl	%ebx, %ebx
.LBB5_2:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm5, %xmm5
	cvtsi2sd	%edi, %xmm5
	mulsd	%xmm2, %xmm5
	ucomisd	%xmm3, %xmm5
	ja	.LBB5_3
# %bb.4:                                #   in Loop: Header=BB5_2 Depth=1
	ucomisd	%xmm4, %xmm5
	sbbl	$-1, %ebx
	ucomisd	%xmm4, %xmm5
	movl	%r10d, %r11d
	cmovael	%r8d, %r11d
	testl	%r10d, %r10d
	movl	%r9d, %r10d
	cmovel	%r12d, %r10d
	ucomisd	%xmm4, %xmm5
	cmovael	%r10d, %r12d
	incl	%r9d
	decl	%esi
	incl	%edi
	movl	%eax, %ebp
	movl	%r11d, %r10d
                                        # implicit-def: $r11d
	movq	%r11, 32(%rsp)                  # 8-byte Spill
	addl	%esi, %ebp
	jne	.LBB5_2
	jmp	.LBB5_5
.LBB5_3:
	movl	$-2, %edi
	subl	%esi, %edi
	movq	%rdi, 32(%rsp)                  # 8-byte Spill
.LBB5_5:                                # %.loopexit283
	cmpl	%eax, %r14d
	jge	.LBB5_6
# %bb.7:                                # %.lr.ph305
	mulsd	40(%rsp), %xmm1
	divsd	%xmm1, %xmm0
	movsd	264(%rsp), %xmm1                # xmm1 = mem[0],zero
	movsd	272(%rsp), %xmm2                # xmm2 = mem[0],zero
	movl	%r14d, %esi
	negl	%esi
	negl	%eax
	subl	%r14d, %r14d
	xorl	%edi, %edi
	movl	$1, %r8d
                                        # implicit-def: $ecx
	xorl	%ebp, %ebp
.LBB5_8:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm3, %xmm3
	cvtsi2sd	%r14d, %xmm3
	mulsd	%xmm0, %xmm3
	ucomisd	%xmm1, %xmm3
	ja	.LBB5_9
# %bb.10:                               #   in Loop: Header=BB5_8 Depth=1
	ucomisd	%xmm2, %xmm3
	sbbl	$-1, %ebp
	ucomisd	%xmm2, %xmm3
	movl	%r8d, %r9d
	cmovael	%edi, %r9d
	testl	%r8d, %r8d
	movl	%edx, %r8d
	cmovel	%ecx, %r8d
	ucomisd	%xmm2, %xmm3
	cmovael	%r8d, %ecx
	incl	%edx
	decl	%esi
	incl	%r14d
	movl	%r9d, %r8d
	cmpl	%esi, %eax
	jne	.LBB5_8
	jmp	.LBB5_11
.LBB5_6:
	xorl	%ebp, %ebp
                                        # implicit-def: $ecx
.LBB5_11:
                                        # implicit-def: $r13d
	jmp	.LBB5_12
.LBB5_9:
	movl	$-2, %r13d
	subl	%esi, %r13d
.LBB5_12:                               # %.loopexit
	movl	%ebp, (%rsp)
	movl	$.L.str.9, %edi
	movl	%r12d, %esi
	movq	32(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movq	%rcx, 48(%rsp)                  # 8-byte Spill
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%r13d, %r8d
	movl	%ebx, %r9d
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %eax
	movq	%rax, 120(%rsp)                 # 8-byte Spill
	leaq	(,%rax,8), %rdi
	callq	malloc
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	testl	%ebx, %ebx
	je	.LBB5_17
# %bb.13:                               # %.lr.ph312
	movl	%ebp, %ebx
	shlq	$3, %rbx
	xorl	%r14d, %r14d
.LBB5_14:                               # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	callq	malloc
	movq	56(%rsp), %rcx                  # 8-byte Reload
	movq	%rax, (%rcx,%r14,8)
	testl	%ebp, %ebp
	je	.LBB5_16
# %bb.15:                               # %.lr.ph309.preheader
                                        #   in Loop: Header=BB5_14 Depth=1
	movq	%rax, %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	memset@PLT
.LBB5_16:                               # %._crit_edge
                                        #   in Loop: Header=BB5_14 Depth=1
	incq	%r14
	cmpq	%r14, 120(%rsp)                 # 8-byte Folded Reload
	jne	.LBB5_14
.LBB5_17:                               # %._crit_edge313
	movl	$104, %edi
	callq	malloc
	movq	%rax, %rbx
	leaq	104(%rsp), %rdi
	movl	$104, %esi
	callq	hipMalloc
	movsd	256(%rsp), %xmm0                # xmm0 = mem[0],zero
	movsd	%xmm0, 80(%rbx)
	movsd	248(%rsp), %xmm0                # xmm0 = mem[0],zero
	movsd	%xmm0, 88(%rbx)
	movsd	240(%rsp), %xmm0                # xmm0 = mem[0],zero
	movsd	%xmm0, 96(%rbx)
	movl	12(%rsp), %ebp
	imull	%ebp, %ebp
	shlq	$4, %rbp
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movl	12(%rsp), %esi
	imull	%esi, %esi
	shlq	$4, %rsi
	leaq	72(%rsp), %rdi
	callq	hipMalloc
	movl	12(%rsp), %edx
	leaq	96(%rsp), %rdi
	movl	%edx, %esi
	movl	$105, %ecx
	callq	hipfftPlan2d
	cmpl	$0, 84(%rsp)
	jle	.LBB5_48
# %bb.18:                               # %.lr.ph336
	movabsq	$4294967296, %rcx               # imm = 0x100000000
	movl	12(%rsp), %eax
	movl	%eax, %edx
	shrl	$31, %edx
	addl	%eax, %edx
	movl	%eax, %esi
	shrl	$4, %esi
	leaq	1(%rcx), %rax
	imulq	%rax, %rsi
	movq	%rsi, 144(%rsp)                 # 8-byte Spill
	sarl	%edx
	shrl	$4, %edx
	imulq	%rax, %rdx
	movq	%rdx, 152(%rsp)                 # 8-byte Spill
	movabsq	$68719476752, %r15              # imm = 0x1000000010
	movq	48(%rsp), %rcx                  # 8-byte Reload
	movslq	%ecx, %rax
	movl	%r13d, %ebp
	subl	%ecx, %ebp
	incl	%ebp
	movslq	%r12d, %rdx
	movq	32(%rsp), %r14                  # 8-byte Reload
                                        # kill: def $r14d killed $r14d killed $r14 def $r14
	subl	%r12d, %r14d
	incl	%r14d
	shlq	$4, %rax
	movq	64(%rsp), %rcx                  # 8-byte Reload
	addq	%rcx, %rax
	addq	$16, %rax
	movq	%rax, 136(%rsp)                 # 8-byte Spill
	movl	%r12d, %eax
	notl	%eax
	movq	%rax, 224(%rsp)                 # 8-byte Spill
	shlq	$4, %rdx
	addq	$16, %rdx
	movq	%rdx, 232(%rsp)                 # 8-byte Spill
	xorl	%eax, %eax
	movl	%r12d, 28(%rsp)                 # 4-byte Spill
.LBB5_19:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_29 Depth 2
                                        #       Child Loop BB5_31 Depth 3
                                        #     Child Loop BB5_43 Depth 2
                                        #       Child Loop BB5_45 Depth 3
	movl	%eax, 116(%rsp)                 # 4-byte Spill
	movl	$.L.str.6, %esi
	movq	128(%rsp), %r12                 # 8-byte Reload
	movq	%r12, %rdi
	leaq	160(%rsp), %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$.L.str.6, %esi
	movq	%r12, %rdi
	leaq	208(%rsp), %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$.L.str.6, %esi
	movq	%r12, %rdi
	leaq	192(%rsp), %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$.L.str.6, %esi
	movq	%r12, %rdi
	leaq	176(%rsp), %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$.L.str.6, %esi
	movq	%r12, %rdi
	leaq	200(%rsp), %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$.L.str.6, %esi
	movq	%r12, %rdi
	leaq	184(%rsp), %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$.L.str.6, %esi
	movq	%r12, %rdi
	leaq	168(%rsp), %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movsd	160(%rsp), %xmm0                # xmm0 = mem[0],zero
	movsd	208(%rsp), %xmm1                # xmm1 = mem[0],zero
	movsd	192(%rsp), %xmm2                # xmm2 = mem[0],zero
	movsd	176(%rsp), %xmm3                # xmm3 = mem[0],zero
	movsd	200(%rsp), %xmm4                # xmm4 = mem[0],zero
	movsd	184(%rsp), %xmm5                # xmm5 = mem[0],zero
	movsd	168(%rsp), %xmm6                # xmm6 = mem[0],zero
	movl	$.L.str.10, %edi
	movb	$7, %al
	callq	printf
	movsd	200(%rsp), %xmm0                # xmm0 = mem[0],zero
	movsd	208(%rsp), %xmm1                # xmm1 = mem[0],zero
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, (%rbx)
	movsd	184(%rsp), %xmm2                # xmm2 = mem[0],zero
	movsd	192(%rsp), %xmm3                # xmm3 = mem[0],zero
	mulsd	%xmm2, %xmm3
	movsd	%xmm3, 8(%rbx)
	movsd	168(%rsp), %xmm4                # xmm4 = mem[0],zero
	movsd	176(%rsp), %xmm5                # xmm5 = mem[0],zero
	mulsd	%xmm4, %xmm5
	movsd	%xmm5, 16(%rbx)
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, 24(%rbx)
	mulsd	%xmm2, %xmm3
	movsd	%xmm3, 32(%rbx)
	mulsd	%xmm4, %xmm5
	movsd	%xmm5, 40(%rbx)
	movsd	%xmm0, 48(%rbx)
	movsd	%xmm2, 56(%rbx)
	movsd	%xmm4, 64(%rbx)
	movsd	160(%rsp), %xmm0                # xmm0 = mem[0],zero
	movsd	%xmm0, 72(%rbx)
	movq	104(%rsp), %rdi
	movl	$104, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	144(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_21
# %bb.20:                               #   in Loop: Header=BB5_19 Depth=1
	movq	16(%rsp), %rdi
	movsd	40(%rsp), %xmm0                 # xmm0 = mem[0],zero
	movsd	216(%rsp), %xmm1                # xmm1 = mem[0],zero
	movl	12(%rsp), %esi
	movq	104(%rsp), %rdx
	callq	_Z30__device_stub__kernelRephasingP15HIP_vector_typeIdLj2EEddiPd
.LBB5_21:                               #   in Loop: Header=BB5_19 Depth=1
	movl	12(%rsp), %edi
	shrl	$4, %edi
	movabsq	$4294967296, %r12               # imm = 0x100000000
	orq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_23
# %bb.22:                               #   in Loop: Header=BB5_19 Depth=1
	movq	16(%rsp), %rdi
	callq	_Z31__device_stub__kernelHalfFirstXP15HIP_vector_typeIdLj2EE
.LBB5_23:                               #   in Loop: Header=BB5_19 Depth=1
	movl	12(%rsp), %edi
	shrl	$4, %edi
	orq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_25
# %bb.24:                               #   in Loop: Header=BB5_19 Depth=1
	movq	16(%rsp), %rdi
	movl	12(%rsp), %esi
	callq	_Z31__device_stub__kernelHalfFirstYP15HIP_vector_typeIdLj2EEi
.LBB5_25:                               #   in Loop: Header=BB5_19 Depth=1
	movq	96(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	72(%rsp), %rdx
	movl	$1, %ecx
	callq	hipfftExecZ2Z
	movq	152(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movl	28(%rsp), %r12d                 # 4-byte Reload
	jne	.LBB5_27
# %bb.26:                               #   in Loop: Header=BB5_19 Depth=1
	movq	16(%rsp), %rdi
	movq	72(%rsp), %rsi
	movl	12(%rsp), %edx
	callq	_Z32__device_stub__kernelPermutationP15HIP_vector_typeIdLj2EES1_i
.LBB5_27:                               #   in Loop: Header=BB5_19 Depth=1
	movq	16(%rsp), %rsi
	movl	12(%rsp), %edx
	imull	%edx, %edx
	shlq	$4, %rdx
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	32(%rsp), %r12d                 # 4-byte Folded Reload
	movq	48(%rsp), %r9                   # 8-byte Reload
	movq	56(%rsp), %r10                  # 8-byte Reload
	movq	136(%rsp), %r11                 # 8-byte Reload
	jg	.LBB5_33
# %bb.28:                               # %.preheader282.lr.ph
                                        #   in Loop: Header=BB5_19 Depth=1
	movl	12(%rsp), %eax
	movq	224(%rsp), %rcx                 # 8-byte Reload
	addl	%eax, %ecx
	imull	%eax, %ecx
	xorl	%edx, %edx
.LBB5_29:                               # %.preheader282
                                        #   Parent Loop BB5_19 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB5_31 Depth 3
	cmpl	%r13d, %r9d
	jg	.LBB5_32
# %bb.30:                               # %.lr.ph317
                                        #   in Loop: Header=BB5_29 Depth=2
	movslq	%ecx, %rsi
	shlq	$4, %rsi
	addq	%r11, %rsi
	movq	(%r10,%rdx,8), %rdi
	xorl	%r8d, %r8d
.LBB5_31:                               #   Parent Loop BB5_19 Depth=1
                                        #     Parent Loop BB5_29 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movsd	(%rsi), %xmm0                   # xmm0 = mem[0],zero
	addsd	(%rdi,%r8,8), %xmm0
	movsd	%xmm0, (%rdi,%r8,8)
	incq	%r8
	addq	$16, %rsi
	cmpq	%r8, %rbp
	jne	.LBB5_31
.LBB5_32:                               # %._crit_edge318
                                        #   in Loop: Header=BB5_29 Depth=2
	incq	%rdx
	subl	%eax, %ecx
	cmpq	%r14, %rdx
	jne	.LBB5_29
.LBB5_33:                               # %._crit_edge322
                                        #   in Loop: Header=BB5_19 Depth=1
	movq	144(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_35
# %bb.34:                               #   in Loop: Header=BB5_19 Depth=1
	movq	16(%rsp), %rdi
	movsd	40(%rsp), %xmm0                 # xmm0 = mem[0],zero
	movsd	216(%rsp), %xmm1                # xmm1 = mem[0],zero
	movl	12(%rsp), %esi
	movq	104(%rsp), %rdx
	callq	_Z33__device_stub__kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd
.LBB5_35:                               #   in Loop: Header=BB5_19 Depth=1
	movl	12(%rsp), %edi
	shrl	$4, %edi
	movabsq	$4294967296, %r12               # imm = 0x100000000
	orq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_37
# %bb.36:                               #   in Loop: Header=BB5_19 Depth=1
	movq	16(%rsp), %rdi
	callq	_Z31__device_stub__kernelHalfFirstXP15HIP_vector_typeIdLj2EE
.LBB5_37:                               #   in Loop: Header=BB5_19 Depth=1
	movl	12(%rsp), %edi
	shrl	$4, %edi
	orq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_39
# %bb.38:                               #   in Loop: Header=BB5_19 Depth=1
	movq	16(%rsp), %rdi
	movl	12(%rsp), %esi
	callq	_Z31__device_stub__kernelHalfFirstYP15HIP_vector_typeIdLj2EEi
.LBB5_39:                               #   in Loop: Header=BB5_19 Depth=1
	movq	96(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	72(%rsp), %rdx
	movl	$1, %ecx
	callq	hipfftExecZ2Z
	movq	152(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movl	28(%rsp), %r12d                 # 4-byte Reload
	jne	.LBB5_41
# %bb.40:                               #   in Loop: Header=BB5_19 Depth=1
	movq	16(%rsp), %rdi
	movq	72(%rsp), %rsi
	movl	12(%rsp), %edx
	callq	_Z32__device_stub__kernelPermutationP15HIP_vector_typeIdLj2EES1_i
.LBB5_41:                               #   in Loop: Header=BB5_19 Depth=1
	movq	16(%rsp), %rsi
	movl	12(%rsp), %edx
	imull	%edx, %edx
	shlq	$4, %rdx
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	32(%rsp), %r12d                 # 4-byte Folded Reload
	movq	48(%rsp), %r9                   # 8-byte Reload
	movq	56(%rsp), %r10                  # 8-byte Reload
	jg	.LBB5_47
# %bb.42:                               # %.preheader281.lr.ph
                                        #   in Loop: Header=BB5_19 Depth=1
	movslq	12(%rsp), %rax
	movq	232(%rsp), %rcx                 # 8-byte Reload
	imulq	%rax, %rcx
	addq	136(%rsp), %rcx                 # 8-byte Folded Reload
	shlq	$4, %rax
	xorl	%edx, %edx
.LBB5_43:                               # %.preheader281
                                        #   Parent Loop BB5_19 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB5_45 Depth 3
	cmpl	%r13d, %r9d
	jg	.LBB5_46
# %bb.44:                               # %.lr.ph328
                                        #   in Loop: Header=BB5_43 Depth=2
	movq	(%r10,%rdx,8), %rsi
	movq	%rcx, %rdi
	xorl	%r8d, %r8d
.LBB5_45:                               #   Parent Loop BB5_19 Depth=1
                                        #     Parent Loop BB5_43 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movsd	(%rdi), %xmm0                   # xmm0 = mem[0],zero
	addsd	(%rsi,%r8,8), %xmm0
	movsd	%xmm0, (%rsi,%r8,8)
	incq	%r8
	addq	$16, %rdi
	cmpq	%r8, %rbp
	jne	.LBB5_45
.LBB5_46:                               # %._crit_edge329
                                        #   in Loop: Header=BB5_43 Depth=2
	incq	%rdx
	addq	%rax, %rcx
	cmpq	%r14, %rdx
	jne	.LBB5_43
.LBB5_47:                               # %._crit_edge333
                                        #   in Loop: Header=BB5_19 Depth=1
	movl	116(%rsp), %eax                 # 4-byte Reload
	incl	%eax
	cmpl	84(%rsp), %eax
	jl	.LBB5_19
.LBB5_48:                               # %._crit_edge337
	movq	96(%rsp), %rdi
	callq	hipfftDestroy
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	cmpl	32(%rsp), %r12d                 # 4-byte Folded Reload
	jg	.LBB5_54
# %bb.49:                               # %.lr.ph348
	movl	%r13d, %ebx
	movq	48(%rsp), %rcx                  # 8-byte Reload
	subl	%ecx, %ebx
	incl	%ebx
	movq	32(%rsp), %rax                  # 8-byte Reload
	subl	%r12d, %eax
	incl	%eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	leal	1(%rcx), %r14d
	xorl	%ebp, %ebp
	movsd	.LCPI5_0(%rip), %xmm1           # xmm1 = mem[0],zero
	movsd	.LCPI5_1(%rip), %xmm3           # xmm3 = mem[0],zero
.LBB5_50:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_52 Depth 2
	movl	12(%rsp), %eax
	incl	%r12d
	movl	%r12d, 28(%rsp)                 # 4-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	mulsd	%xmm1, %xmm0
	cmpl	%r13d, 48(%rsp)                 # 4-byte Folded Reload
	movq	88(%rsp), %rdx                  # 8-byte Reload
	jg	.LBB5_53
# %bb.51:                               # %.lr.ph342
                                        #   in Loop: Header=BB5_50 Depth=1
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
	movl	28(%rsp), %eax                  # 4-byte Reload
	mulsd	40(%rsp), %xmm0
	subl	%ecx, %eax
	movapd	%xmm3, %xmm1
	xorps	%xmm2, %xmm2
	cvtsi2sd	%eax, %xmm2
	divsd	%xmm0, %xmm1
	mulsd	%xmm1, %xmm2
	movsd	%xmm2, 64(%rsp)                 # 8-byte Spill
	movq	56(%rsp), %rax                  # 8-byte Reload
	movq	(%rax,%rbp,8), %r15
	xorl	%r12d, %r12d
.LBB5_52:                               #   Parent Loop BB5_50 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	12(%rsp), %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movapd	%xmm0, %xmm1
	mulsd	.LCPI5_0(%rip), %xmm1
	mulsd	40(%rsp), %xmm1
	movsd	(%r15,%r12,8), %xmm2            # xmm2 = mem[0],zero
	divsd	%xmm0, %xmm2
	movapd	%xmm3, %xmm0
	divsd	%xmm1, %xmm0
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
	leal	(%r14,%r12), %eax
	subl	%ecx, %eax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%eax, %xmm1
	mulsd	%xmm0, %xmm1
	movl	$.L.str.11, %esi
	movq	%rdx, %rdi
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$3, %al
	callq	fprintf
	movsd	.LCPI5_1(%rip), %xmm3           # xmm3 = mem[0],zero
	movq	88(%rsp), %rdx                  # 8-byte Reload
	incq	%r12
	cmpq	%r12, %rbx
	jne	.LBB5_52
.LBB5_53:                               # %._crit_edge343
                                        #   in Loop: Header=BB5_50 Depth=1
	movl	$10, %edi
	movq	%rdx, %rsi
	callq	fputc@PLT
	movsd	.LCPI5_1(%rip), %xmm3           # xmm3 = mem[0],zero
	incq	%rbp
	cmpq	32(%rsp), %rbp                  # 8-byte Folded Reload
	movl	28(%rsp), %r12d                 # 4-byte Reload
	movsd	.LCPI5_0(%rip), %xmm1           # xmm1 = mem[0],zero
	jne	.LBB5_50
.LBB5_54:                               # %.preheader
	movq	120(%rsp), %r14                 # 8-byte Reload
	testq	%r14, %r14
	movq	56(%rsp), %r15                  # 8-byte Reload
	je	.LBB5_57
# %bb.55:                               # %.lr.ph350.preheader
	xorl	%ebx, %ebx
.LBB5_56:                               # %.lr.ph350
                                        # =>This Inner Loop Header: Depth=1
	movq	(%r15,%rbx,8), %rdi
	callq	free
	incq	%rbx
	cmpq	%rbx, %r14
	jne	.LBB5_56
.LBB5_57:                               # %._crit_edge351
	movq	%r15, %rdi
	callq	free
	movq	88(%rsp), %rdi                  # 8-byte Reload
	callq	fclose
	movq	128(%rsp), %rdi                 # 8-byte Reload
	callq	fclose
	xorl	%eax, %eax
	addq	$296, %rsp                      # imm = 0x128
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE,@object # @_Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE
	.section	.rodata,"a",@progbits
	.globl	_Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE
	.p2align	3, 0x0
_Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE:
	.quad	_Z31__device_stub__kernelHalfFirstXP15HIP_vector_typeIdLj2EE
	.size	_Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE, 8

	.type	_Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi,@object # @_Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi
	.globl	_Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi
	.p2align	3, 0x0
_Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi:
	.quad	_Z31__device_stub__kernelHalfFirstYP15HIP_vector_typeIdLj2EEi
	.size	_Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi, 8

	.type	_Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i,@object # @_Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i
	.globl	_Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i
	.p2align	3, 0x0
_Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i:
	.quad	_Z32__device_stub__kernelPermutationP15HIP_vector_typeIdLj2EES1_i
	.size	_Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i, 8

	.type	_Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd,@object # @_Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd
	.globl	_Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd
	.p2align	3, 0x0
_Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd:
	.quad	_Z30__device_stub__kernelRephasingP15HIP_vector_typeIdLj2EEddiPd
	.size	_Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd, 8

	.type	_Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd,@object # @_Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd
	.globl	_Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd
	.p2align	3, 0x0
_Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd:
	.quad	_Z33__device_stub__kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd
	.size	_Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"r"
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"spec.dat"
	.size	.L.str.1, 9

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"w"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%lf %lf %lf %lf"
	.size	.L.str.3, 16

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%lf %lf %lf"
	.size	.L.str.4, 12

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d %lf"
	.size	.L.str.5, 7

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"%lf"
	.size	.L.str.6, 4

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%d"
	.size	.L.str.7, 3

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"%d %d\n"
	.size	.L.str.8, 7

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"%d %d %d %d %d %d\n"
	.size	.L.str.9, 19

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"%lf %lf %lf %lf %lf %lf %lf\n"
	.size	.L.str.10, 29

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"%lf\t%lf\t%le\n"
	.size	.L.str.11, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE"
	.size	.L__unnamed_1, 46

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi"
	.size	.L__unnamed_2, 47

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i"
	.size	.L__unnamed_3, 51

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd"
	.size	.L__unnamed_4, 50

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd"
	.size	.L__unnamed_5, 53

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__kernelHalfFirstXP15HIP_vector_typeIdLj2EE
	.addrsig_sym _Z31__device_stub__kernelHalfFirstYP15HIP_vector_typeIdLj2EEi
	.addrsig_sym _Z32__device_stub__kernelPermutationP15HIP_vector_typeIdLj2EES1_i
	.addrsig_sym _Z30__device_stub__kernelRephasingP15HIP_vector_typeIdLj2EEddiPd
	.addrsig_sym _Z33__device_stub__kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE
	.addrsig_sym _Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi
	.addrsig_sym _Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i
	.addrsig_sym _Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd
	.addrsig_sym _Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE ; -- Begin function _Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE
	.globl	_Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE
	.p2align	8
	.type	_Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE,@function
_Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE: ; @_Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x14
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 4, v[1:2]
	v_add_co_u32 v4, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	global_load_b128 v[0:3], v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[6:7], v[2:3], 0
	v_mul_f64 v[8:9], v[0:1], 0
	v_fma_f64 v[0:1], v[0:1], 0.5, -v[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[2:3], v[2:3], 0.5, v[8:9]
	global_store_b128 v[4:5], v[0:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE, .Lfunc_end0-_Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 144
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi ; -- Begin function _Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi
	.globl	_Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi
	.p2align	8
	.type	_Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi,@function
_Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi: ; @_Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_mul_lo_u32 v0, v1, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 0, v0
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 4, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	global_load_b128 v[0:3], v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[6:7], v[2:3], 0
	v_mul_f64 v[8:9], v[0:1], 0
	v_fma_f64 v[0:1], v[0:1], 0.5, -v[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[2:3], v[2:3], 0.5, v[8:9]
	global_store_b128 v[4:5], v[0:3], off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi, .Lfunc_end1-_Z16kernelHalfFirstYP15HIP_vector_typeIdLj2EEi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i ; -- Begin function _Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i
	.globl	_Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i
	.p2align	8
	.type	_Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i,@function
_Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i: ; @_Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s5, s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_lshr_b32 s4, s5, 31
	v_mad_u64_u32 v[4:5], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[5:6], null, s15, s3, v[0:1]
	s_load_b128 s[0:3], s[0:1], 0x0
	s_add_i32 s4, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s4, s4, 1
	v_mad_u64_u32 v[6:7], null, v4, s5, v[5:6]
	v_add_nc_u32_e32 v4, s4, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, s4, v6
	v_mad_u64_u32 v[10:11], null, v4, s5, v[5:6]
	v_ashrrev_i32_e32 v7, 31, v6
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	s_lshl_b64 s[4:5], s[4:5], 4
	v_lshlrev_b64 v[6:7], 4, v[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[8:9], 4, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 4, v[10:11]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s2, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	v_add_co_u32 v10, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v5, vcc_lo
	global_load_b128 v[0:3], v[0:1], off
	v_add_co_u32 v12, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v7, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b128 v[10:11], v[0:3], off
	global_load_b128 v[0:3], v[12:13], off
	v_add_co_u32 v10, vcc_lo, v10, s4
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	v_add_co_u32 v8, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b128 v[10:11], v[0:3], off
	global_load_b128 v[0:3], v[4:5], off
	v_add_co_u32 v4, vcc_lo, v4, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b128 v[8:9], v[0:3], off
	global_load_b128 v[0:3], v[4:5], off
	v_add_co_u32 v4, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v7, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b128 v[4:5], v[0:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i, .Lfunc_end2-_Z17kernelPermutationP15HIP_vector_typeIdLj2EES1_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 376
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd ; -- Begin function _Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd
	.globl	_Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd
	.p2align	8
	.type	_Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd,@function
_Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd: ; @_Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd
; %bb.0:
	s_load_b32 s2, s[0:1], 0x34
	v_and_b32_e32 v3, 0x3ff, v0
	s_clause 0x1
	s_load_b128 s[28:31], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x20
	v_bfe_u32 v0, v0, 10, 10
                                        ; implicit-def: $vgpr7_vgpr8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	v_mad_u64_u32 v[1:2], null, s14, s3, v[3:4]
	s_load_b64 s[4:5], s[8:9], 0x48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[4:5], v1
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_mov_b32 s2, 0x75eeba82
	s_mov_b32 s3, 0xbfc81c59
                                        ; implicit-def: $vgpr0
	v_cvt_f64_i32_e32 v[15:16], v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[13:14], v[4:5], s[30:31]
                                        ; implicit-def: $vgpr5_vgpr6
	v_fma_f64 v[3:4], v[15:16], s[30:31], -v[13:14]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[3:4], s[4:5], v[3:4]
	v_mul_f64 v[3:4], v[3:4], s[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s3, 0x41d00000, |v[3:4]|
	v_trig_preop_f64 v[21:22], |v[3:4]|, 0
	v_trig_preop_f64 v[19:20], |v[3:4]|, 1
	v_ldexp_f64 v[23:24], |v[3:4]|, 0xffffff80
	v_trig_preop_f64 v[17:18], |v[3:4]|, 2
	v_and_b32_e32 v25, 0x7fffffff, v4
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s2
	s_cbranch_execz .LBB3_2
; %bb.1:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[3:4]|
	v_mov_b32_e32 v38, 0
	s_mov_b32 s10, 0x54442d18
	s_mov_b32 s11, 0x3ff921fb
	s_mov_b32 s12, 0x33145c07
	s_mov_b32 s13, 0x3c91a626
	v_dual_cndmask_b32 v6, v25, v24 :: v_dual_cndmask_b32 v5, v3, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[7:8], v[21:22], v[5:6]
	v_mul_f64 v[9:10], v[19:20], v[5:6]
	v_mul_f64 v[34:35], v[17:18], v[5:6]
	v_fma_f64 v[11:12], v[21:22], v[5:6], -v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[36:37], v[19:20], v[5:6], -v[9:10]
	v_fma_f64 v[5:6], v[17:18], v[5:6], -v[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[9:10], v[11:12]
	v_add_f64 v[28:29], v[26:27], -v[9:10]
	v_add_f64 v[32:33], v[7:8], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[26:27], -v[28:29]
	v_add_f64 v[11:12], v[11:12], -v[28:29]
	v_ldexp_f64 v[28:29], v[32:33], -2
	v_add_f64 v[7:8], v[32:33], -v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[30:31]
	v_add_f64 v[30:31], v[34:35], v[36:37]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[28:29]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[7:8], v[26:27], -v[7:8]
	v_add_f64 v[9:10], v[11:12], v[9:10]
	v_fract_f64_e32 v[11:12], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[30:31], v[9:10]
	v_dual_cndmask_b32 v12, 0, v12 :: v_dual_cndmask_b32 v11, 0, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[11:12], v[11:12], 2
	v_add_f64 v[28:29], v[7:8], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[28:29], v[11:12]
	v_add_f64 v[7:8], v[28:29], -v[7:8]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[32:33]
	v_add_f64 v[32:33], v[30:31], -v[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[26:27], -v[7:8]
	v_cndmask_b32_e64 v39, 0, 0x40100000, vcc_lo
	v_add_f64 v[43:44], v[30:31], -v[32:33]
	v_add_f64 v[32:33], v[36:37], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[11:12], v[11:12], v[38:39]
	v_add_f64 v[39:40], v[26:27], -v[30:31]
	v_add_f64 v[36:37], v[34:35], -v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[28:29], v[11:12]
	v_add_f64 v[45:46], v[26:27], -v[39:40]
	v_add_f64 v[9:10], v[9:10], -v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[32:33], v[36:37]
	v_cvt_i32_f64_e32 v0, v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[30:31], -v[45:46]
	v_cvt_f64_i32_e32 v[39:40], v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[30:31]
	v_add_f64 v[11:12], v[11:12], -v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[32:33], v[9:10]
	v_add_f64 v[30:31], v[28:29], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[9:10]
	v_add_f64 v[9:10], v[30:31], -v[11:12]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[7:8], v[5:6]
	v_add_f64 v[7:8], v[28:29], -v[9:10]
	v_cndmask_b32_e64 v39, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v0, s2, 0, v0, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_add_f64 v[7:8], v[30:31], -v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[7:8], v[5:6]
	v_mul_f64 v[11:12], v[9:10], s[10:11]
	v_add_f64 v[7:8], v[9:10], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[9:10], s[10:11], -v[11:12]
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[9:10], s[12:13], v[26:27]
	v_fma_f64 v[7:8], v[5:6], s[10:11], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[11:12], v[7:8]
	v_add_f64 v[9:10], v[5:6], -v[11:12]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[9:10]
.LBB3_2:                                ; %Flow31
	s_and_not1_saveexec_b32 s2, s6
	s_cbranch_execz .LBB3_4
; %bb.3:
	s_mov_b32 s6, 0x6dc9c883
	s_mov_b32 s7, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[5:6], |v[3:4]|, s[6:7]
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[9:10], v[5:6]
	v_fma_f64 v[5:6], v[9:10], s[6:7], |v[3:4]|
	v_mul_f64 v[7:8], v[9:10], s[10:11]
	s_mov_b32 s6, 0x252049c0
	s_mov_b32 s7, 0xb97b839a
	v_cvt_i32_f64_e32 v0, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], v[9:10], s[10:11], v[5:6]
	v_add_f64 v[11:12], v[5:6], v[7:8]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[5:6], -v[11:12]
	v_add_f64 v[11:12], v[11:12], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_fma_f64 v[7:8], v[9:10], s[10:11], v[7:8]
	v_add_f64 v[5:6], v[11:12], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	v_fma_f64 v[7:8], v[9:10], s[6:7], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[26:27], v[7:8]
	v_add_f64 v[11:12], v[5:6], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[11:12]
.LBB3_4:                                ; %_ZL3cosd.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr127
                                        ; implicit-def: $vgpr9_vgpr10
                                        ; implicit-def: $vgpr11_vgpr12
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s2
	s_cbranch_execz .LBB3_6
; %bb.5:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[3:4]|
	v_mov_b32_e32 v35, 0
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_dual_cndmask_b32 v10, v25, v24 :: v_dual_cndmask_b32 v9, v3, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[11:12], v[21:22], v[9:10]
	v_mul_f64 v[23:24], v[19:20], v[9:10]
	v_mul_f64 v[33:34], v[17:18], v[9:10]
	v_fma_f64 v[21:22], v[21:22], v[9:10], -v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[19:20], v[9:10], -v[23:24]
	v_fma_f64 v[9:10], v[17:18], v[9:10], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[23:24], v[21:22]
	v_add_f64 v[27:28], v[25:26], -v[23:24]
	v_add_f64 v[31:32], v[11:12], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[25:26], -v[27:28]
	v_add_f64 v[21:22], v[21:22], -v[27:28]
	v_ldexp_f64 v[27:28], v[31:32], -2
	v_add_f64 v[11:12], v[31:32], -v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[23:24], v[23:24], -v[29:30]
	v_add_f64 v[29:30], v[33:34], v[19:20]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[27:28]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[11:12], v[25:26], -v[11:12]
	v_add_f64 v[21:22], v[21:22], v[23:24]
	v_fract_f64_e32 v[23:24], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[29:30], v[21:22]
	v_dual_cndmask_b32 v24, 0, v24 :: v_dual_cndmask_b32 v23, 0, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[23:24], v[23:24], 2
	v_add_f64 v[27:28], v[11:12], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[27:28], v[23:24]
	v_add_f64 v[11:12], v[27:28], -v[11:12]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[31:32]
	v_add_f64 v[31:32], v[29:30], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[25:26], -v[11:12]
	v_cndmask_b32_e64 v36, 0, 0x40100000, vcc_lo
	v_add_f64 v[40:41], v[29:30], -v[31:32]
	v_add_f64 v[19:20], v[19:20], -v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[23:24], v[23:24], v[35:36]
	v_add_f64 v[36:37], v[25:26], -v[29:30]
	v_add_f64 v[31:32], v[33:34], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[38:39], v[27:28], v[23:24]
	v_add_f64 v[42:43], v[25:26], -v[36:37]
	v_add_f64 v[21:22], v[21:22], -v[36:37]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[19:20], v[19:20], v[31:32]
	v_cvt_i32_f64_e32 v38, v[38:39]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[29:30], v[29:30], -v[42:43]
	v_cvt_f64_i32_e32 v[36:37], v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[21:22], v[29:30]
	v_add_f64 v[23:24], v[23:24], -v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[19:20], v[21:22]
	v_add_f64 v[19:20], v[27:28], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[17:18]
	v_add_f64 v[17:18], v[19:20], -v[23:24]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[11:12], v[9:10]
	v_add_f64 v[11:12], v[27:28], -v[17:18]
	v_cndmask_b32_e64 v36, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v127, s2, 0, v38, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[11:12]
	v_add_f64 v[11:12], v[19:20], -v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[11:12], v[9:10]
	v_mul_f64 v[19:20], v[17:18], s[6:7]
	v_add_f64 v[11:12], v[17:18], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[21:22], v[17:18], s[6:7], -v[19:20]
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[17:18], s[10:11], v[21:22]
	v_fma_f64 v[11:12], v[9:10], s[6:7], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[19:20], v[11:12]
	v_add_f64 v[17:18], v[9:10], -v[19:20]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], -v[17:18]
.LBB3_6:                                ; %Flow30
	s_or_saveexec_b32 s2, s3
	v_mul_f64 v[19:20], v[15:16], s[30:31]
	s_xor_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB3_8
; %bb.7:
	s_mov_b32 s6, 0x6dc9c883
	s_mov_b32 s7, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[9:10], |v[3:4]|, s[6:7]
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[15:16], v[9:10]
	v_fma_f64 v[9:10], v[15:16], s[6:7], |v[3:4]|
	v_mul_f64 v[11:12], v[15:16], s[10:11]
	s_mov_b32 s6, 0x252049c0
	s_mov_b32 s7, 0xb97b839a
	v_cvt_i32_f64_e32 v127, v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[21:22], v[15:16], s[10:11], v[9:10]
	v_add_f64 v[17:18], v[9:10], v[11:12]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], -v[17:18]
	v_add_f64 v[17:18], v[17:18], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[11:12]
	v_fma_f64 v[11:12], v[15:16], s[10:11], v[11:12]
	v_add_f64 v[9:10], v[17:18], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	v_fma_f64 v[11:12], v[15:16], s[6:7], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[21:22], v[11:12]
	v_add_f64 v[17:18], v[9:10], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], -v[17:18]
.LBB3_8:                                ; %_Z8my_cexpid.exit.i
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b64 s[2:3], s[8:9], 0x50
	v_mul_f64 v[15:16], s[4:5], v[13:14]
                                        ; implicit-def: $vgpr128
                                        ; implicit-def: $vgpr21_vgpr22
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[17:18], s[4:5], -s[2:3]
	s_mov_b32 s2, 0x75eeba82
	s_mov_b32 s3, 0xbfc81c59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], v[19:20], v[17:18], -v[15:16]
                                        ; implicit-def: $vgpr17_vgpr18
	v_mul_f64 v[15:16], v[15:16], s[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s3, 0x41d00000, |v[15:16]|
	v_trig_preop_f64 v[31:32], |v[15:16]|, 0
	v_trig_preop_f64 v[29:30], |v[15:16]|, 1
	v_ldexp_f64 v[33:34], |v[15:16]|, 0xffffff80
	v_trig_preop_f64 v[27:28], |v[15:16]|, 2
	v_and_b32_e32 v35, 0x7fffffff, v16
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s2
	s_cbranch_execz .LBB3_10
; %bb.9:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[15:16]|
	v_mov_b32_e32 v48, 0
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_cndmask_b32_e32 v18, v35, v34, vcc_lo
	v_cndmask_b32_e32 v17, v15, v33, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[21:22], v[31:32], v[17:18]
	v_mul_f64 v[23:24], v[29:30], v[17:18]
	v_fma_f64 v[25:26], v[31:32], v[17:18], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[46:47], v[29:30], v[17:18], -v[23:24]
	v_add_f64 v[36:37], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[36:37], -v[23:24]
	v_add_f64 v[42:43], v[21:22], v[36:37]
	v_add_f64 v[40:41], v[36:37], -v[38:39]
	v_add_f64 v[25:26], v[25:26], -v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[38:39], v[42:43], -2
	v_add_f64 v[21:22], v[42:43], -v[21:22]
	v_add_f64 v[23:24], v[23:24], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[38:39]|
	v_add_f64 v[21:22], v[36:37], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[25:26], v[23:24]
	v_fract_f64_e32 v[25:26], v[38:39]
	v_dual_cndmask_b32 v26, 0, v26 :: v_dual_cndmask_b32 v25, 0, v25
	v_mul_f64 v[44:45], v[27:28], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[25:26], v[25:26], 2
	v_add_f64 v[40:41], v[44:45], v[46:47]
	v_fma_f64 v[17:18], v[27:28], v[17:18], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[36:37], v[40:41], v[23:24]
	v_add_f64 v[38:39], v[21:22], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[38:39], v[25:26]
	v_add_f64 v[21:22], v[38:39], -v[21:22]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[42:43]
	v_add_f64 v[42:43], v[40:41], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[36:37], -v[21:22]
	v_cndmask_b32_e64 v49, 0, 0x40100000, vcc_lo
	v_add_f64 v[53:54], v[40:41], -v[42:43]
	v_add_f64 v[42:43], v[46:47], -v[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[25:26], v[48:49]
	v_add_f64 v[49:50], v[36:37], -v[40:41]
	v_add_f64 v[46:47], v[44:45], -v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[38:39], v[25:26]
	v_add_f64 v[55:56], v[36:37], -v[49:50]
	v_add_f64 v[23:24], v[23:24], -v[49:50]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[42:43], v[42:43], v[46:47]
	v_cvt_i32_f64_e32 v51, v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[40:41], -v[55:56]
	v_cvt_f64_i32_e32 v[49:50], v51
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[40:41]
	v_add_f64 v[25:26], v[25:26], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[42:43], v[23:24]
	v_add_f64 v[40:41], v[38:39], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[23:24]
	v_add_f64 v[23:24], v[40:41], -v[25:26]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[21:22], v[17:18]
	v_add_f64 v[21:22], v[38:39], -v[23:24]
	v_cndmask_b32_e64 v49, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v128, s2, 0, v51, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[17:18], v[21:22]
	v_add_f64 v[21:22], v[40:41], -v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[21:22], v[17:18]
	v_mul_f64 v[25:26], v[23:24], s[6:7]
	v_add_f64 v[21:22], v[23:24], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[23:24], s[6:7], -v[25:26]
	v_add_f64 v[17:18], v[17:18], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[21:22], v[23:24], s[10:11], v[36:37]
	v_fma_f64 v[21:22], v[17:18], s[6:7], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[25:26], v[21:22]
	v_add_f64 v[23:24], v[17:18], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[21:22], v[21:22], -v[23:24]
.LBB3_10:                               ; %Flow29
	s_or_saveexec_b32 s2, s4
	s_load_b64 s[30:31], s[0:1], 0x10
	s_xor_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB3_12
; %bb.11:
	s_mov_b32 s4, 0x6dc9c883
	s_mov_b32 s5, 0x3fe45f30
	s_mov_b32 s7, 0xbc91a626
	v_mul_f64 v[17:18], |v[15:16]|, s[4:5]
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0xbff921fb
	s_mov_b32 s6, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[23:24], v[17:18]
	v_fma_f64 v[17:18], v[23:24], s[4:5], |v[15:16]|
	v_mul_f64 v[21:22], v[23:24], s[6:7]
	s_mov_b32 s4, 0x252049c0
	s_mov_b32 s5, 0xb97b839a
	v_cvt_i32_f64_e32 v128, v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[36:37], v[23:24], s[6:7], v[17:18]
	v_add_f64 v[25:26], v[17:18], v[21:22]
	s_mov_b32 s7, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[17:18], -v[25:26]
	v_add_f64 v[25:26], v[25:26], -v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[21:22]
	v_fma_f64 v[21:22], v[23:24], s[6:7], v[21:22]
	v_add_f64 v[17:18], v[25:26], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[17:18], -v[21:22]
	v_fma_f64 v[21:22], v[23:24], s[4:5], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[36:37], v[21:22]
	v_add_f64 v[25:26], v[17:18], -v[36:37]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[21:22], v[21:22], -v[25:26]
.LBB3_12:                               ; %_ZL3cosd.exit.i66.i
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr129
                                        ; implicit-def: $vgpr23_vgpr24
                                        ; implicit-def: $vgpr25_vgpr26
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s2
	s_cbranch_execz .LBB3_14
; %bb.13:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[15:16]|
	v_mov_b32_e32 v45, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0x3ff921fb
	s_mov_b32 s6, 0x33145c07
	s_mov_b32 s7, 0x3c91a626
	v_cndmask_b32_e32 v24, v35, v34, vcc_lo
	v_cndmask_b32_e32 v23, v15, v33, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[25:26], v[31:32], v[23:24]
	v_mul_f64 v[33:34], v[29:30], v[23:24]
	v_fma_f64 v[31:32], v[31:32], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[29:30], v[29:30], v[23:24], -v[33:34]
	v_add_f64 v[35:36], v[33:34], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[35:36], -v[33:34]
	v_add_f64 v[41:42], v[25:26], v[35:36]
	v_add_f64 v[39:40], v[35:36], -v[37:38]
	v_add_f64 v[31:32], v[31:32], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[37:38], v[41:42], -2
	v_add_f64 v[25:26], v[41:42], -v[25:26]
	v_add_f64 v[33:34], v[33:34], -v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[37:38]|
	v_add_f64 v[25:26], v[35:36], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[31:32], v[33:34]
	v_fract_f64_e32 v[33:34], v[37:38]
	v_dual_cndmask_b32 v34, 0, v34 :: v_dual_cndmask_b32 v33, 0, v33
	v_mul_f64 v[43:44], v[27:28], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[33:34], v[33:34], 2
	v_add_f64 v[39:40], v[43:44], v[29:30]
	v_fma_f64 v[23:24], v[27:28], v[23:24], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[39:40], v[31:32]
	v_add_f64 v[37:38], v[25:26], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[37:38], v[33:34]
	v_add_f64 v[25:26], v[37:38], -v[25:26]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[41:42]
	v_add_f64 v[41:42], v[39:40], -v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[35:36], -v[25:26]
	v_cndmask_b32_e64 v46, 0, 0x40100000, vcc_lo
	v_add_f64 v[50:51], v[39:40], -v[41:42]
	v_add_f64 v[29:30], v[29:30], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[33:34], v[33:34], v[45:46]
	v_add_f64 v[46:47], v[35:36], -v[39:40]
	v_add_f64 v[41:42], v[43:44], -v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[48:49], v[37:38], v[33:34]
	v_add_f64 v[52:53], v[35:36], -v[46:47]
	v_add_f64 v[31:32], v[31:32], -v[46:47]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[29:30], v[29:30], v[41:42]
	v_cvt_i32_f64_e32 v48, v[48:49]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], -v[52:53]
	v_cvt_f64_i32_e32 v[46:47], v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[31:32], v[39:40]
	v_add_f64 v[33:34], v[33:34], -v[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[29:30], v[31:32]
	v_add_f64 v[29:30], v[37:38], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[27:28]
	v_add_f64 v[27:28], v[29:30], -v[33:34]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[25:26], v[23:24]
	v_add_f64 v[25:26], v[37:38], -v[27:28]
	v_cndmask_b32_e64 v46, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v129, s2, 0, v48, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_add_f64 v[25:26], v[29:30], -v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[25:26], v[23:24]
	v_mul_f64 v[29:30], v[27:28], s[4:5]
	v_add_f64 v[25:26], v[27:28], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[27:28], s[4:5], -v[29:30]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[27:28], s[6:7], v[31:32]
	v_fma_f64 v[25:26], v[23:24], s[4:5], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[29:30], v[25:26]
	v_add_f64 v[27:28], v[23:24], -v[29:30]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[25:26], v[25:26], -v[27:28]
.LBB3_14:                               ; %Flow
	s_and_not1_saveexec_b32 s2, s3
	s_cbranch_execz .LBB3_16
; %bb.15:
	s_mov_b32 s4, 0x6dc9c883
	s_mov_b32 s5, 0x3fe45f30
	s_mov_b32 s7, 0xbc91a626
	v_mul_f64 v[23:24], |v[15:16]|, s[4:5]
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0xbff921fb
	s_mov_b32 s6, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[27:28], v[23:24]
	v_fma_f64 v[23:24], v[27:28], s[4:5], |v[15:16]|
	v_mul_f64 v[25:26], v[27:28], s[6:7]
	s_mov_b32 s4, 0x252049c0
	s_mov_b32 s5, 0xb97b839a
	v_cvt_i32_f64_e32 v129, v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[31:32], v[27:28], s[6:7], v[23:24]
	v_add_f64 v[29:30], v[23:24], v[25:26]
	s_mov_b32 s7, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], -v[29:30]
	v_add_f64 v[29:30], v[29:30], -v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_fma_f64 v[25:26], v[27:28], s[6:7], v[25:26]
	v_add_f64 v[23:24], v[29:30], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	v_fma_f64 v[25:26], v[27:28], s[4:5], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[31:32], v[25:26]
	v_add_f64 v[29:30], v[23:24], -v[31:32]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[25:26], v[25:26], -v[29:30]
.LBB3_16:                               ; %_Z2RrdddPd.exit
	s_or_b32 exec_lo, exec_lo, s2
	v_add_f64 v[29:30], v[13:14], v[19:20]
	s_clause 0x2
	s_load_b128 s[4:7], s[8:9], 0x58
	s_load_b64 s[10:11], s[8:9], 0x40
	s_load_b512 s[12:27], s[8:9], 0x0
	s_mov_b32 s34, 0x652b82fe
	s_mov_b32 s35, 0x3ff71547
	s_mov_b32 s36, 0xfefa39ef
	s_mov_b32 s37, 0xbfe62e42
	s_mov_b32 s38, 0x3b39803f
	s_mov_b32 s39, 0xbc7abc9e
	s_mov_b32 s40, 0xfca7ab0c
	s_mov_b32 s42, 0x6a5dcb37
	s_mov_b32 s41, 0x3e928af3
	s_mov_b32 s43, 0x3e5ade15
	s_mov_b32 s44, 0x623fde64
	s_mov_b32 s45, 0x3ec71dee
	s_mov_b32 s46, 0x9037ab78
	s_mov_b32 s52, 0x46cc5e42
	s_mov_b32 s47, 0x3e21eeb6
	s_mov_b32 s53, 0xbda907db
	s_mov_b32 s48, 0xb42fdfa7
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[31:32], v[19:20], -s[6:7]
	v_add_f64 v[27:28], s[4:5], s[4:5]
	v_div_scale_f64 v[39:40], null, s[24:25], s[24:25], -v[13:14]
	v_div_scale_f64 v[35:36], null, s[26:27], s[26:27], -v[13:14]
	v_div_scale_f64 v[37:38], null, s[10:11], s[10:11], -v[13:14]
	v_div_scale_f64 v[45:46], null, s[24:25], s[24:25], -s[30:31]
	v_div_scale_f64 v[47:48], null, s[26:27], s[26:27], -s[30:31]
	v_div_scale_f64 v[83:84], s8, -v[13:14], s[10:11], -v[13:14]
	v_div_scale_f64 v[93:94], s4, -s[30:31], s[24:25], -s[30:31]
	v_div_scale_f64 v[95:96], s3, -s[30:31], s[26:27], -s[30:31]
	v_fma_f64 v[29:30], s[30:31], 2.0, v[29:30]
	v_div_scale_f64 v[85:86], null, s[10:11], s[10:11], -v[19:20]
	v_div_scale_f64 v[103:104], s2, -s[30:31], s[10:11], -s[30:31]
	s_mov_b32 s50, 0xf9a43bb8
	s_mov_b32 s49, 0xbe5ae600
	s_mov_b32 s51, 0x3de5e0b2
	s_mov_b32 s55, 0x3f811111
	s_mov_b32 s54, 0x11110bb3
	s_mov_b32 s56, 0x55555555
	s_mov_b32 s57, 0x3fa55555
	s_mov_b32 s60, 0x55555511
	s_mov_b32 s61, 0x3fc55555
	s_mov_b32 s58, 11
	s_mov_b32 s59, 0x3fe00000
	s_load_b32 s0, s[0:1], 0x18
	v_div_scale_f64 v[41:42], null, v[27:28], v[27:28], v[31:32]
	v_rcp_f64_e32 v[33:34], v[39:40]
	v_rcp_f64_e32 v[53:54], v[35:36]
	v_rcp_f64_e32 v[55:56], v[37:38]
	v_rcp_f64_e32 v[65:66], v[45:46]
	v_rcp_f64_e32 v[67:68], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_scale_f64 v[43:44], null, v[27:28], v[27:28], -v[29:30]
	v_div_scale_f64 v[77:78], s5, -v[29:30], v[27:28], -v[29:30]
	v_rcp_f64_e32 v[49:50], v[41:42]
	v_fma_f64 v[61:62], -v[39:40], v[33:34], 1.0
	v_fma_f64 v[63:64], -v[35:36], v[53:54], 1.0
	v_fma_f64 v[69:70], -v[37:38], v[55:56], 1.0
	v_rcp_f64_e32 v[51:52], v[43:44]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[57:58], -v[41:42], v[49:50], 1.0
	v_fma_f64 v[33:34], v[33:34], v[61:62], v[33:34]
	v_fma_f64 v[53:54], v[53:54], v[63:64], v[53:54]
	v_fma_f64 v[61:62], -v[47:48], v[67:68], 1.0
	v_fma_f64 v[55:56], v[55:56], v[69:70], v[55:56]
	v_fma_f64 v[59:60], -v[43:44], v[51:52], 1.0
	v_fma_f64 v[49:50], v[49:50], v[57:58], v[49:50]
	v_div_scale_f64 v[57:58], null, s[10:11], s[10:11], -s[30:31]
	v_fma_f64 v[73:74], -v[39:40], v[33:34], 1.0
	v_fma_f64 v[75:76], -v[35:36], v[53:54], 1.0
	v_fma_f64 v[61:62], v[67:68], v[61:62], v[67:68]
	v_div_scale_f64 v[67:68], vcc_lo, v[31:32], v[27:28], v[31:32]
	v_fma_f64 v[51:52], v[51:52], v[59:60], v[51:52]
	v_fma_f64 v[59:60], -v[45:46], v[65:66], 1.0
	v_fma_f64 v[63:64], -v[41:42], v[49:50], 1.0
	v_rcp_f64_e32 v[71:72], v[57:58]
	v_fma_f64 v[79:80], v[33:34], v[73:74], v[33:34]
	v_div_scale_f64 v[73:74], s7, -v[13:14], s[26:27], -v[13:14]
	v_fma_f64 v[81:82], v[53:54], v[75:76], v[53:54]
	v_fma_f64 v[75:76], -v[47:48], v[61:62], 1.0
	v_div_scale_f64 v[53:54], null, s[24:25], s[24:25], -v[19:20]
	v_fma_f64 v[69:70], -v[43:44], v[51:52], 1.0
	v_fma_f64 v[59:60], v[65:66], v[59:60], v[65:66]
	v_fma_f64 v[65:66], -v[37:38], v[55:56], 1.0
	v_fma_f64 v[63:64], v[49:50], v[63:64], v[49:50]
	s_delay_alu instid0(TRANS32_DEP_1)
	v_fma_f64 v[33:34], -v[57:58], v[71:72], 1.0
	v_mul_f64 v[91:92], v[73:74], v[81:82]
	v_fma_f64 v[61:62], v[61:62], v[75:76], v[61:62]
	v_rcp_f64_e32 v[105:106], v[53:54]
	v_fma_f64 v[51:52], v[51:52], v[69:70], v[51:52]
	v_div_scale_f64 v[69:70], s6, -v[13:14], s[24:25], -v[13:14]
	v_fma_f64 v[49:50], -v[45:46], v[59:60], 1.0
	v_fma_f64 v[55:56], v[55:56], v[65:66], v[55:56]
	v_mul_f64 v[65:66], v[67:68], v[63:64]
	v_fma_f64 v[71:72], v[71:72], v[33:34], v[71:72]
	v_add_f64 v[33:34], v[13:14], s[30:31]
	v_fma_f64 v[99:100], -v[35:36], v[91:92], v[73:74]
	v_add_f64 v[35:36], v[19:20], s[30:31]
	v_mul_f64 v[109:110], v[95:96], v[61:62]
	v_mul_f64 v[87:88], v[77:78], v[51:52]
	v_mul_f64 v[89:90], v[69:70], v[79:80]
	v_fma_f64 v[59:60], v[59:60], v[49:50], v[59:60]
	v_mul_f64 v[97:98], v[83:84], v[55:56]
	v_div_scale_f64 v[49:50], null, s[26:27], s[26:27], -v[19:20]
	v_fma_f64 v[41:42], -v[41:42], v[65:66], v[67:68]
	v_div_scale_f64 v[75:76], null, s[26:27], s[26:27], -v[33:34]
	v_div_scale_f64 v[73:74], null, s[10:11], s[10:11], -v[33:34]
	v_fma_f64 v[67:68], -v[43:44], v[87:88], v[77:78]
	v_fma_f64 v[69:70], -v[39:40], v[89:90], v[69:70]
	v_fma_f64 v[77:78], -v[57:58], v[71:72], 1.0
	v_div_scale_f64 v[43:44], null, s[24:25], s[24:25], -v[33:34]
	v_mul_f64 v[101:102], v[93:94], v[59:60]
	v_fma_f64 v[83:84], -v[37:38], v[97:98], v[83:84]
	v_rcp_f64_e32 v[107:108], v[49:50]
	v_div_fmas_f64 v[39:40], v[41:42], v[63:64], v[65:66]
	s_mov_b32 vcc_lo, s5
	v_rcp_f64_e32 v[65:66], v[85:86]
	v_div_scale_f64 v[63:64], null, s[26:27], s[26:27], -v[35:36]
	v_div_scale_f64 v[164:165], s5, -v[35:36], s[26:27], -v[35:36]
	v_div_fmas_f64 v[37:38], v[67:68], v[51:52], v[87:88]
	s_mov_b32 vcc_lo, s6
	v_fma_f64 v[67:68], v[71:72], v[77:78], v[71:72]
	v_div_fmas_f64 v[41:42], v[69:70], v[79:80], v[89:90]
	s_mov_b32 vcc_lo, s7
	v_div_scale_f64 v[77:78], null, s[24:25], s[24:25], -v[35:36]
	v_div_fmas_f64 v[51:52], v[99:100], v[81:82], v[91:92]
	v_rcp_f64_e32 v[71:72], v[43:44]
	v_rcp_f64_e32 v[79:80], v[75:76]
	v_fma_f64 v[45:46], -v[45:46], v[101:102], v[93:94]
	v_rcp_f64_e32 v[81:82], v[73:74]
	s_mov_b32 vcc_lo, s8
	v_fma_f64 v[69:70], -v[53:54], v[105:106], 1.0
	v_fma_f64 v[89:90], -v[47:48], v[109:110], v[95:96]
	v_div_fmas_f64 v[83:84], v[83:84], v[55:56], v[97:98]
	v_fma_f64 v[87:88], -v[49:50], v[107:108], 1.0
	s_mov_b32 vcc_lo, s4
	v_div_scale_f64 v[125:126], s6, -v[19:20], s[26:27], -v[19:20]
	v_div_scale_f64 v[130:131], s8, -v[19:20], s[10:11], -v[19:20]
	v_div_scale_f64 v[150:151], s7, -v[35:36], s[24:25], -v[35:36]
	v_div_fixup_f64 v[31:32], v[39:40], v[27:28], v[31:32]
	v_fma_f64 v[93:94], -v[85:86], v[65:66], 1.0
	v_div_fixup_f64 v[27:28], v[37:38], v[27:28], -v[29:30]
	v_mul_f64 v[91:92], v[103:104], v[67:68]
	v_div_fixup_f64 v[47:48], v[41:42], s[24:25], -v[13:14]
	v_add_f64 v[41:42], v[33:34], v[19:20]
	v_rcp_f64_e32 v[95:96], v[77:78]
	v_div_fixup_f64 v[55:56], v[51:52], s[26:27], -v[13:14]
	v_fma_f64 v[97:98], -v[43:44], v[71:72], 1.0
	v_div_fmas_f64 v[45:46], v[45:46], v[59:60], v[101:102]
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(TRANS32_DEP_2)
	v_fma_f64 v[59:60], -v[75:76], v[79:80], 1.0
	v_fma_f64 v[99:100], -v[73:74], v[81:82], 1.0
	v_rcp_f64_e32 v[101:102], v[63:64]
	s_mov_b32 vcc_lo, s3
	v_fma_f64 v[105:106], v[105:106], v[69:70], v[105:106]
	v_div_fmas_f64 v[61:62], v[89:90], v[61:62], v[109:110]
	v_div_fixup_f64 v[51:52], v[83:84], s[10:11], -v[13:14]
	v_fma_f64 v[87:88], v[107:108], v[87:88], v[107:108]
	v_div_scale_f64 v[69:70], null, s[10:11], s[10:11], -v[35:36]
	s_mov_b32 vcc_lo, s2
	v_div_scale_f64 v[134:135], s2, -v[33:34], s[24:25], -v[33:34]
	v_fma_f64 v[109:110], v[65:66], v[93:94], v[65:66]
	v_div_scale_f64 v[138:139], s3, -v[33:34], s[10:11], -v[33:34]
	v_fma_f64 v[89:90], -v[57:58], v[91:92], v[103:104]
	v_mul_f64 v[83:84], v[47:48], s[34:35]
	v_div_scale_f64 v[65:66], null, s[24:25], s[24:25], -v[41:42]
	v_mul_f64 v[103:104], v[55:56], s[34:35]
	s_delay_alu instid0(TRANS32_DEP_2)
	v_fma_f64 v[107:108], -v[77:78], v[95:96], 1.0
	v_fma_f64 v[111:112], v[71:72], v[97:98], v[71:72]
	v_div_fixup_f64 v[57:58], v[45:46], s[24:25], -s[30:31]
	v_fma_f64 v[45:46], v[79:80], v[59:60], v[79:80]
	v_fma_f64 v[79:80], v[81:82], v[99:100], v[81:82]
	v_div_scale_f64 v[71:72], null, s[10:11], s[10:11], -v[41:42]
	s_delay_alu instid0(TRANS32_DEP_1)
	v_fma_f64 v[81:82], -v[63:64], v[101:102], 1.0
	v_fma_f64 v[99:100], -v[53:54], v[105:106], 1.0
	v_div_fixup_f64 v[59:60], v[61:62], s[26:27], -s[30:31]
	v_mul_f64 v[61:62], v[51:52], s[34:35]
	v_fma_f64 v[113:114], -v[49:50], v[87:88], 1.0
	v_rndne_f64_e32 v[93:94], v[83:84]
	v_div_fmas_f64 v[83:84], v[89:90], v[67:68], v[91:92]
	v_rcp_f64_e32 v[89:90], v[69:70]
	v_div_scale_f64 v[67:68], null, s[26:27], s[26:27], -v[41:42]
	v_rndne_f64_e32 v[97:98], v[103:104]
	v_fma_f64 v[91:92], v[95:96], v[107:108], v[95:96]
	v_fma_f64 v[95:96], -v[85:86], v[109:110], 1.0
	v_fma_f64 v[103:104], -v[43:44], v[111:112], 1.0
	v_mul_f64 v[107:108], v[57:58], s[34:35]
	v_fma_f64 v[115:116], -v[75:76], v[45:46], 1.0
	v_fma_f64 v[117:118], -v[73:74], v[79:80], 1.0
	v_div_scale_f64 v[121:122], vcc_lo, -v[19:20], s[24:25], -v[19:20]
	v_fma_f64 v[101:102], v[101:102], v[81:82], v[101:102]
	v_fma_f64 v[99:100], v[105:106], v[99:100], v[105:106]
	v_mul_f64 v[81:82], v[59:60], s[34:35]
	v_rndne_f64_e32 v[105:106], v[61:62]
	v_fma_f64 v[113:114], v[87:88], v[113:114], v[87:88]
	v_rcp_f64_e32 v[119:120], v[65:66]
	v_rcp_f64_e32 v[140:141], v[71:72]
	v_fma_f64 v[123:124], v[93:94], s[36:37], v[47:48]
	v_div_fixup_f64 v[61:62], v[83:84], s[10:11], -s[30:31]
	v_rcp_f64_e32 v[87:88], v[67:68]
	v_fma_f64 v[83:84], v[97:98], s[36:37], v[55:56]
	v_fma_f64 v[132:133], -v[77:78], v[91:92], 1.0
	v_fma_f64 v[95:96], v[109:110], v[95:96], v[109:110]
	v_fma_f64 v[109:110], -v[69:70], v[89:90], 1.0
	v_fma_f64 v[103:104], v[111:112], v[103:104], v[111:112]
	v_rndne_f64_e32 v[111:112], v[107:108]
	v_div_scale_f64 v[107:108], s4, -v[33:34], s[26:27], -v[33:34]
	v_fma_f64 v[136:137], v[45:46], v[115:116], v[45:46]
	v_fma_f64 v[117:118], v[79:80], v[117:118], v[79:80]
	v_mul_f64 v[142:143], v[121:122], v[99:100]
	v_rndne_f64_e32 v[115:116], v[81:82]
	v_fma_f64 v[144:145], v[105:106], s[36:37], v[51:52]
	v_mul_f64 v[146:147], v[125:126], v[113:114]
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(TRANS32_DEP_2)
	v_fma_f64 v[45:46], -v[65:66], v[119:120], 1.0
	v_fma_f64 v[160:161], -v[71:72], v[140:141], 1.0
	v_fma_f64 v[79:80], v[93:94], s[38:39], v[123:124]
	v_fma_f64 v[123:124], -v[63:64], v[101:102], 1.0
	v_mul_f64 v[148:149], v[61:62], s[34:35]
	v_fma_f64 v[81:82], v[97:98], s[38:39], v[83:84]
	v_fma_f64 v[91:92], v[91:92], v[132:133], v[91:92]
	v_mul_f64 v[132:133], v[130:131], v[95:96]
	v_fma_f64 v[89:90], v[89:90], v[109:110], v[89:90]
	v_mul_f64 v[109:110], v[134:135], v[103:104]
	s_delay_alu instid0(TRANS32_DEP_1)
	v_fma_f64 v[152:153], -v[67:68], v[87:88], 1.0
	v_fma_f64 v[154:155], v[111:112], s[36:37], v[57:58]
	v_mul_f64 v[156:157], v[107:108], v[136:137]
	v_mul_f64 v[158:159], v[138:139], v[117:118]
	v_fma_f64 v[121:122], -v[53:54], v[142:143], v[121:122]
	v_fma_f64 v[166:167], v[115:116], s[36:37], v[59:60]
	v_fma_f64 v[83:84], v[105:106], s[38:39], v[144:145]
	v_mul_f64 v[53:54], v[23:24], v[23:24]
	v_cvt_i32_f64_e32 v105, v[105:106]
	v_fma_f64 v[162:163], v[119:120], v[45:46], v[119:120]
	v_mul_f64 v[45:46], v[5:6], v[5:6]
	v_fma_f64 v[144:145], v[79:80], s[42:43], s[40:41]
	v_fma_f64 v[101:102], v[101:102], v[123:124], v[101:102]
	v_fma_f64 v[123:124], -v[49:50], v[146:147], v[125:126]
	v_rndne_f64_e32 v[119:120], v[148:149]
	v_mul_f64 v[49:50], v[17:18], v[17:18]
	v_fma_f64 v[125:126], v[81:82], s[42:43], s[40:41]
	v_fma_f64 v[130:131], -v[85:86], v[132:133], v[130:131]
	v_fma_f64 v[168:169], -v[69:70], v[89:90], 1.0
	v_fma_f64 v[134:135], -v[43:44], v[109:110], v[134:135]
	v_fma_f64 v[148:149], v[87:88], v[152:153], v[87:88]
	v_mul_f64 v[152:153], v[150:151], v[91:92]
	v_fma_f64 v[85:86], v[111:112], s[38:39], v[154:155]
	v_fma_f64 v[75:76], -v[75:76], v[156:157], v[107:108]
	v_mul_f64 v[43:44], v[9:10], v[9:10]
	v_fma_f64 v[73:74], -v[73:74], v[158:159], v[138:139]
	v_fma_f64 v[107:108], v[140:141], v[160:161], v[140:141]
	v_div_fmas_f64 v[99:100], v[121:122], v[99:100], v[142:143]
	v_fma_f64 v[87:88], v[115:116], s[38:39], v[166:167]
	v_fma_f64 v[121:122], v[83:84], s[42:43], s[40:41]
	s_mov_b32 vcc_lo, s6
	v_fma_f64 v[138:139], -v[65:66], v[162:163], 1.0
	v_fma_f64 v[154:155], v[53:54], s[52:53], s[46:47]
	v_fma_f64 v[140:141], v[79:80], v[144:145], s[44:45]
	v_mul_f64 v[142:143], v[164:165], v[101:102]
	v_div_fmas_f64 v[123:124], v[123:124], v[113:114], v[146:147]
	s_mov_b32 vcc_lo, s8
	v_fma_f64 v[113:114], v[119:120], s[36:37], v[61:62]
	v_fma_f64 v[125:126], v[81:82], v[125:126], s[44:45]
	v_div_scale_f64 v[144:145], s6, -v[35:36], s[10:11], -v[35:36]
	v_div_fmas_f64 v[130:131], v[130:131], v[95:96], v[132:133]
	s_mov_b32 vcc_lo, s2
	v_fma_f64 v[146:147], v[45:46], s[52:53], s[46:47]
	v_div_fmas_f64 v[103:104], v[134:135], v[103:104], v[109:110]
	s_mov_b32 vcc_lo, s4
	v_fma_f64 v[77:78], -v[77:78], v[152:153], v[150:151]
	v_fma_f64 v[150:151], v[89:90], v[168:169], v[89:90]
	v_fma_f64 v[132:133], v[85:86], s[42:43], s[40:41]
	v_div_fmas_f64 v[75:76], v[75:76], v[136:137], v[156:157]
	s_mov_b32 vcc_lo, s3
	v_fma_f64 v[109:110], v[43:44], s[52:53], s[46:47]
	v_fma_f64 v[134:135], v[49:50], s[52:53], s[46:47]
	s_mov_b32 s46, 0x7c89e6b0
	v_fma_f64 v[89:90], v[45:46], s[50:51], s[48:49]
	v_fma_f64 v[95:96], v[43:44], s[50:51], s[48:49]
	v_fma_f64 v[136:137], v[49:50], s[50:51], s[48:49]
	v_div_fmas_f64 v[73:74], v[73:74], v[117:118], v[158:159]
	v_fma_f64 v[117:118], -v[67:68], v[148:149], 1.0
	s_mov_b32 s47, 0x3efa0199
	v_fma_f64 v[156:157], v[53:54], s[50:51], s[48:49]
	v_fma_f64 v[158:159], v[87:88], s[42:43], s[40:41]
	v_fma_f64 v[121:122], v[83:84], v[121:122], s[44:45]
	s_mov_b32 vcc_lo, s7
	v_fma_f64 v[138:139], v[162:163], v[138:139], v[162:163]
	v_div_scale_f64 v[160:161], s2, -v[41:42], s[24:25], -v[41:42]
	s_mov_b32 s8, 0xa17f65f6
	s_mov_b32 s50, 0x796cde01
	s_mov_b32 s9, 0xbe927e4f
	s_mov_b32 s51, 0x3ec71de3
	v_fma_f64 v[140:141], v[79:80], v[140:141], s[46:47]
	v_fma_f64 v[63:64], -v[63:64], v[142:143], v[164:165]
	s_mov_b32 s48, 0x14761f6e
	s_mov_b32 s49, 0x3f2a01a0
	v_fma_f64 v[113:114], v[119:120], s[38:39], v[113:114]
	v_fma_f64 v[125:126], v[81:82], v[125:126], s[46:47]
	v_fma_f64 v[154:155], v[53:54], v[154:155], s[8:9]
	v_div_scale_f64 v[164:165], s3, -v[41:42], s[26:27], -v[41:42]
	s_mov_b32 s52, 0x1852b7b0
	v_fma_f64 v[146:147], v[45:46], v[146:147], s[8:9]
	s_mov_b32 s53, 0x3f56c16c
	v_cvt_i32_f64_e32 v106, v[119:120]
	v_div_fmas_f64 v[77:78], v[77:78], v[91:92], v[152:153]
	v_mul_f64 v[152:153], v[144:145], v[150:151]
	v_fma_f64 v[91:92], -v[71:72], v[107:108], 1.0
	v_fma_f64 v[132:133], v[85:86], v[132:133], s[44:45]
	s_mov_b32 vcc_lo, s5
	v_fma_f64 v[109:110], v[43:44], v[109:110], s[8:9]
	v_fma_f64 v[134:135], v[49:50], v[134:135], s[8:9]
	s_mov_b32 s8, 0x19f4ec90
	v_fma_f64 v[89:90], v[45:46], v[89:90], s[50:51]
	v_fma_f64 v[162:163], v[43:44], v[95:96], s[50:51]
	v_fma_f64 v[136:137], v[49:50], v[136:137], s[50:51]
	v_div_fixup_f64 v[95:96], v[99:100], s[24:25], -v[19:20]
	v_fma_f64 v[148:149], v[148:149], v[117:118], v[148:149]
	s_mov_b32 s9, 0x3efa01a0
	v_fma_f64 v[117:118], v[53:54], v[156:157], s[50:51]
	v_fma_f64 v[156:157], v[87:88], v[158:159], s[44:45]
	v_fma_f64 v[121:122], v[83:84], v[121:122], s[46:47]
	s_mov_b32 s50, 0x19e83e5c
	s_mov_b32 s51, 0xbf2a01a0
	v_div_fixup_f64 v[99:100], v[73:74], s[10:11], -v[33:34]
	v_cmp_nlt_f64_e64 s5, 0x40900000, v[59:60]
	v_fma_f64 v[140:141], v[79:80], v[140:141], s[48:49]
	v_div_fmas_f64 v[63:64], v[63:64], v[101:102], v[142:143]
	v_mul_f64 v[142:143], v[160:161], v[138:139]
	s_mov_b32 vcc_lo, s6
	v_fma_f64 v[101:102], v[113:114], s[42:43], s[40:41]
	v_fma_f64 v[125:126], v[81:82], v[125:126], s[48:49]
	v_fma_f64 v[154:155], v[53:54], v[154:155], s[8:9]
	s_mov_b32 s6, 0x16c16967
	s_mov_b32 s7, 0xbf56c16c
	v_fma_f64 v[69:70], -v[69:70], v[152:153], v[144:145]
	v_div_scale_f64 v[144:145], s4, -v[41:42], s[10:11], -v[41:42]
	v_fma_f64 v[158:159], v[107:108], v[91:92], v[107:108]
	v_div_fixup_f64 v[107:108], v[123:124], s[26:27], -v[19:20]
	v_fma_f64 v[123:124], v[85:86], v[132:133], s[46:47]
	v_fma_f64 v[132:133], v[45:46], v[146:147], s[8:9]
	v_fma_f64 v[146:147], v[45:46], v[89:90], s[50:51]
	v_fma_f64 v[162:163], v[43:44], v[162:163], s[50:51]
	v_fma_f64 v[109:110], v[43:44], v[109:110], s[8:9]
	v_fma_f64 v[134:135], v[49:50], v[134:135], s[8:9]
	v_fma_f64 v[136:137], v[49:50], v[136:137], s[50:51]
	v_mul_f64 v[166:167], v[164:165], v[148:149]
	v_fma_f64 v[168:169], v[53:54], v[117:118], s[50:51]
	v_fma_f64 v[156:157], v[87:88], v[156:157], s[46:47]
	v_fma_f64 v[121:122], v[83:84], v[121:122], s[48:49]
	v_div_fixup_f64 v[91:92], v[130:131], s[10:11], -v[19:20]
	v_div_fixup_f64 v[89:90], v[103:104], s[24:25], -v[33:34]
	v_div_fixup_f64 v[103:104], v[75:76], s[26:27], -v[33:34]
	v_mul_f64 v[75:76], v[95:96], s[34:35]
	s_mov_b32 s50, s56
	v_cmp_nlt_f64_e64 s9, 0x40900000, v[55:56]
	s_mov_b32 s51, 0xbfc55555
	v_fma_f64 v[140:141], v[79:80], v[140:141], s[52:53]
	v_fma_f64 v[160:161], -v[65:66], v[142:143], v[160:161]
	v_fma_f64 v[130:131], v[113:114], v[101:102], s[44:45]
	v_fma_f64 v[125:126], v[81:82], v[125:126], s[52:53]
	v_div_fixup_f64 v[101:102], v[77:78], s[24:25], -v[35:36]
	v_div_fmas_f64 v[117:118], v[69:70], v[150:151], v[152:153]
	s_mov_b32 vcc_lo, s2
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[47:48]
	v_mul_f64 v[150:151], v[144:145], v[158:159]
	v_mul_f64 v[152:153], v[107:108], s[34:35]
	v_fma_f64 v[123:124], v[85:86], v[123:124], s[48:49]
	v_fma_f64 v[132:133], v[45:46], v[132:133], s[6:7]
	v_fma_f64 v[69:70], v[45:46], v[146:147], s[54:55]
	v_fma_f64 v[65:66], v[43:44], v[162:163], s[54:55]
	v_fma_f64 v[146:147], v[43:44], v[109:110], s[6:7]
	v_fma_f64 v[134:135], v[49:50], v[134:135], s[6:7]
	v_fma_f64 v[73:74], v[49:50], v[136:137], s[54:55]
	v_fma_f64 v[136:137], v[53:54], v[154:155], s[6:7]
	v_fma_f64 v[77:78], v[53:54], v[168:169], s[54:55]
	s_mov_b32 s54, 0x11122322
	v_fma_f64 v[162:163], v[83:84], v[121:122], s[52:53]
	v_fma_f64 v[156:157], v[87:88], v[156:157], s[48:49]
	v_fma_f64 v[154:155], -v[67:68], v[166:167], v[164:165]
	v_mul_f64 v[168:169], v[99:100], s[34:35]
	v_rndne_f64_e32 v[164:165], v[75:76]
	v_div_fixup_f64 v[109:110], v[63:64], s[26:27], -v[35:36]
	v_cmp_ngt_f64_e64 s6, 0xc090cc00, v[59:60]
	v_cmp_nlt_f64_e64 s7, 0x40900000, v[107:108]
	v_cmp_ngt_f64_e64 s8, 0xc090cc00, v[107:108]
	v_fma_f64 v[140:141], v[79:80], v[140:141], s[54:55]
	v_div_fmas_f64 v[121:122], v[160:161], v[138:139], v[142:143]
	v_mul_f64 v[138:139], v[91:92], s[34:35]
	v_fma_f64 v[130:131], v[113:114], v[130:131], s[46:47]
	v_fma_f64 v[125:126], v[81:82], v[125:126], s[54:55]
	v_mul_f64 v[142:143], v[89:90], s[34:35]
	v_mul_f64 v[160:161], v[103:104], s[34:35]
	s_mov_b32 vcc_lo, s3
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[57:58]
	v_div_fixup_f64 v[117:118], v[117:118], s[10:11], -v[35:36]
	v_fma_f64 v[144:145], -v[71:72], v[150:151], v[144:145]
	v_rndne_f64_e32 v[152:153], v[152:153]
	v_fma_f64 v[170:171], v[85:86], v[123:124], s[52:53]
	v_fma_f64 v[67:68], v[45:46], v[132:133], s[56:57]
	v_mul_f64 v[132:133], v[101:102], s[34:35]
	v_fma_f64 v[63:64], v[43:44], v[146:147], s[56:57]
	v_fma_f64 v[71:72], v[49:50], v[134:135], s[56:57]
	v_fma_f64 v[75:76], v[53:54], v[136:137], s[56:57]
	s_mov_b32 s56, 0x555502a1
	v_fma_f64 v[134:135], v[83:84], v[162:163], s[54:55]
	v_fma_f64 v[136:137], v[87:88], v[156:157], s[52:53]
	v_div_fmas_f64 v[123:124], v[154:155], v[148:149], v[166:167]
	s_mov_b32 vcc_lo, s4
	v_fma_f64 v[156:157], v[164:165], s[36:37], v[95:96]
	v_cvt_i32_f64_e32 v163, v[111:112]
	v_cvt_i32_f64_e32 v162, v[93:94]
	v_cvt_i32_f64_e32 v166, v[115:116]
	v_cvt_i32_f64_e32 v93, v[164:165]
	v_fma_f64 v[140:141], v[79:80], v[140:141], s[56:57]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[57:58]
	v_div_fixup_f64 v[121:122], v[121:122], s[24:25], -v[41:42]
	v_rndne_f64_e32 v[138:139], v[138:139]
	v_fma_f64 v[146:147], v[113:114], v[130:131], s[48:49]
	v_fma_f64 v[148:149], v[81:82], v[125:126], s[56:57]
	v_rndne_f64_e32 v[142:143], v[142:143]
	v_rndne_f64_e32 v[154:155], v[160:161]
	v_mul_f64 v[160:161], v[109:110], s[34:35]
	v_cvt_i32_f64_e32 v130, v[97:98]
	v_div_fmas_f64 v[125:126], v[144:145], v[158:159], v[150:151]
	v_fma_f64 v[144:145], v[152:153], s[36:37], v[107:108]
	v_rndne_f64_e32 v[150:151], v[168:169]
	v_fma_f64 v[158:159], v[85:86], v[170:171], s[54:55]
	v_rndne_f64_e32 v[131:132], v[132:133]
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[47:48]
	v_fma_f64 v[97:98], v[83:84], v[134:135], s[56:57]
	v_fma_f64 v[111:112], v[87:88], v[136:137], s[54:55]
	v_div_fixup_f64 v[123:124], v[123:124], s[26:27], -v[41:42]
	v_fma_f64 v[133:134], v[79:80], v[140:141], s[60:61]
	v_fma_f64 v[135:136], v[138:139], s[36:37], v[91:92]
	v_fma_f64 v[115:116], v[113:114], v[146:147], s[52:53]
	v_fma_f64 v[140:141], v[81:82], v[148:149], s[60:61]
	v_fma_f64 v[119:120], v[142:143], s[36:37], v[89:90]
	v_fma_f64 v[146:147], v[164:165], s[38:39], v[156:157]
	v_fma_f64 v[148:149], v[154:155], s[36:37], v[103:104]
	v_cvt_i32_f64_e32 v164, v[152:153]
	v_cvt_i32_f64_e32 v94, v[138:139]
	v_div_fixup_f64 v[125:126], v[125:126], s[10:11], -v[41:42]
	v_fma_f64 v[144:145], v[152:153], s[38:39], v[144:145]
	v_fma_f64 v[152:153], v[150:151], s[36:37], v[99:100]
	v_fma_f64 v[156:157], v[85:86], v[158:159], s[56:57]
	v_rndne_f64_e32 v[158:159], v[160:161]
	v_cvt_i32_f64_e32 v165, v[150:151]
	v_cmp_ngt_f64_e64 s10, 0xc090cc00, v[55:56]
	v_cmp_nlt_f64_e64 s11, 0x40900000, v[95:96]
	v_fma_f64 v[160:161], v[83:84], v[97:98], s[60:61]
	v_fma_f64 v[111:112], v[87:88], v[111:112], s[56:57]
	v_cvt_i32_f64_e32 v97, v[142:143]
	v_cvt_i32_f64_e32 v98, v[154:155]
	v_fma_f64 v[133:134], v[79:80], v[133:134], s[58:59]
	v_fma_f64 v[135:136], v[138:139], s[38:39], v[135:136]
	v_fma_f64 v[115:116], v[113:114], v[115:116], s[54:55]
	v_fma_f64 v[140:141], v[81:82], v[140:141], s[58:59]
	v_fma_f64 v[119:120], v[142:143], s[38:39], v[119:120]
	v_fma_f64 v[142:143], v[131:132], s[36:37], v[101:102]
	v_fma_f64 v[137:138], v[154:155], s[38:39], v[148:149]
	v_fma_f64 v[148:149], v[150:151], s[38:39], v[152:153]
	v_fma_f64 v[150:151], v[85:86], v[156:157], s[60:61]
	v_fma_f64 v[152:153], v[158:159], s[36:37], v[109:110]
	v_fma_f64 v[154:155], v[83:84], v[160:161], s[58:59]
	v_fma_f64 v[111:112], v[87:88], v[111:112], s[60:61]
	v_cvt_i32_f64_e32 v160, v[131:132]
	v_cvt_i32_f64_e32 v161, v[158:159]
	v_fma_f64 v[133:134], v[79:80], v[133:134], 1.0
	v_fma_f64 v[115:116], v[113:114], v[115:116], s[56:57]
	v_fma_f64 v[139:140], v[81:82], v[140:141], 1.0
	v_fma_f64 v[141:142], v[131:132], s[38:39], v[142:143]
	v_fma_f64 v[131:132], v[85:86], v[150:151], s[58:59]
	v_fma_f64 v[150:151], v[158:159], s[38:39], v[152:153]
	v_fma_f64 v[152:153], v[146:147], s[42:43], s[40:41]
	v_add_f64 v[158:159], s[18:19], s[20:21]
	v_fma_f64 v[154:155], v[83:84], v[154:155], 1.0
	v_fma_f64 v[111:112], v[87:88], v[111:112], s[58:59]
	v_fma_f64 v[79:80], v[79:80], v[133:134], 1.0
	v_fma_f64 v[133:134], v[144:145], s[42:43], s[40:41]
	v_fma_f64 v[115:116], v[113:114], v[115:116], s[60:61]
	v_fma_f64 v[81:82], v[81:82], v[139:140], 1.0
	v_fma_f64 v[139:140], v[135:136], s[42:43], s[40:41]
	v_fma_f64 v[47:48], v[141:142], s[42:43], s[40:41]
	v_fma_f64 v[131:132], v[85:86], v[131:132], 1.0
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[44:45]
	v_add_f64 v[158:159], v[158:159], s[22:23]
	v_fma_f64 v[83:84], v[83:84], v[154:155], 1.0
	v_fma_f64 v[111:112], v[87:88], v[111:112], 1.0
	v_fma_f64 v[154:155], v[119:120], s[42:43], s[40:41]
	v_ldexp_f64 v[79:80], v[79:80], v162
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[44:45]
	v_fma_f64 v[115:116], v[113:114], v[115:116], s[58:59]
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[44:45]
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[44:45]
	v_fma_f64 v[85:86], v[85:86], v[131:132], 1.0
	v_fma_f64 v[131:132], v[137:138], s[42:43], s[40:41]
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[46:47]
	v_fma_f64 v[87:88], v[87:88], v[111:112], 1.0
	v_fma_f64 v[111:112], v[148:149], s[42:43], s[40:41]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[44:45]
	v_cndmask_b32_e32 v162, 0x7ff00000, v80, vcc_lo
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[46:47]
	v_ldexp_f64 v[80:81], v[81:82], v130
	v_ldexp_f64 v[82:83], v[83:84], v105
	v_fma_f64 v[115:116], v[113:114], v[115:116], 1.0
	s_and_b32 vcc_lo, s2, vcc_lo
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[46:47]
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[46:47]
	v_ldexp_f64 v[85:86], v[85:86], v163
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[44:45]
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[48:49]
	v_ldexp_f64 v[87:88], v[87:88], v166
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[44:45]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[46:47]
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[48:49]
	v_cndmask_b32_e64 v81, 0x7ff00000, v81, s9
	s_and_b32 s9, s10, s9
	v_fma_f64 v[113:114], v[113:114], v[115:116], 1.0
	v_fma_f64 v[115:116], v[150:151], s[42:43], s[40:41]
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[48:49]
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[48:49]
	v_cndmask_b32_e64 v80, 0, v80, s9
	v_cmp_nlt_f64_e64 s9, 0x40900000, v[61:62]
	v_cndmask_b32_e64 v81, 0, v81, s10
	v_cmp_ngt_f64_e64 s10, 0xc090cc00, v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mul_f64 v[80:81], s[20:21], v[80:81]
	v_cndmask_b32_e64 v163, 0x7ff00000, v86, s3
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[46:47]
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[52:53]
	v_cndmask_b32_e64 v62, 0, v163, s4
	v_cndmask_b32_e64 v86, 0x7ff00000, v88, s5
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[46:47]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[48:49]
	s_and_b32 s5, s6, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v87, 0, v87, s5
	v_cmp_nlt_f64_e64 s5, 0x40900000, v[51:52]
	v_cndmask_b32_e64 v88, 0, v86, s6
	v_cmp_ngt_f64_e64 s6, 0xc090cc00, v[51:52]
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[52:53]
	v_cndmask_b32_e64 v52, 0, v162, s2
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[91:92]
	v_ldexp_f64 v[105:106], v[113:114], v106
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[44:45]
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[52:53]
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[52:53]
	v_mul_f64 v[86:87], s[20:21], v[87:88]
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[48:49]
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[54:55]
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[48:49]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[52:53]
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[54:55]
	v_cndmask_b32_e64 v106, 0x7ff00000, v106, s9
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[46:47]
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[54:55]
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[54:55]
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[52:53]
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[56:57]
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[52:53]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[54:55]
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[56:57]
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[48:49]
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[56:57]
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[56:57]
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[54:55]
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[60:61]
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[54:55]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[56:57]
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[60:61]
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[52:53]
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[60:61]
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[60:61]
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[56:57]
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[58:59]
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[56:57]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[60:61]
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[58:59]
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[54:55]
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[58:59]
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[58:59]
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[60:61]
	v_fma_f64 v[152:153], v[146:147], v[152:153], 1.0
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[60:61]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[58:59]
	v_fma_f64 v[133:134], v[144:145], v[133:134], 1.0
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[56:57]
	v_fma_f64 v[139:140], v[135:136], v[139:140], 1.0
	v_fma_f64 v[47:48], v[141:142], v[47:48], 1.0
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[58:59]
	v_fma_f64 v[146:147], v[146:147], v[152:153], 1.0
	v_mul_f64 v[152:153], v[123:124], s[34:35]
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[58:59]
	v_fma_f64 v[154:155], v[119:120], v[154:155], 1.0
	v_fma_f64 v[133:134], v[144:145], v[133:134], 1.0
	v_mul_f64 v[143:144], v[117:118], s[34:35]
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[60:61]
	v_fma_f64 v[135:136], v[135:136], v[139:140], 1.0
	v_mul_f64 v[139:140], v[121:122], s[34:35]
	v_fma_f64 v[47:48], v[141:142], v[47:48], 1.0
	v_fma_f64 v[131:132], v[137:138], v[131:132], 1.0
	v_ldexp_f64 v[113:114], v[146:147], v93
	v_rndne_f64_e32 v[152:153], v[152:153]
	v_add_f64 v[145:146], s[12:13], s[14:15]
	v_cmp_nlt_f64_e64 s13, 0x40900000, v[103:104]
	v_cmp_ngt_f64_e64 s14, 0xc090cc00, v[103:104]
	v_cmp_ngt_f64_e64 s12, 0xc090cc00, v[95:96]
	v_cndmask_b32_e64 v95, 0, v106, s10
	v_fma_f64 v[111:112], v[148:149], v[111:112], 1.0
	v_fma_f64 v[119:120], v[119:120], v[154:155], 1.0
	v_mul_f64 v[154:155], v[125:126], s[34:35]
	v_ldexp_f64 v[133:134], v[133:134], v164
	v_rndne_f64_e32 v[143:144], v[143:144]
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[58:59]
	v_ldexp_f64 v[93:94], v[135:136], v94
	v_rndne_f64_e32 v[139:140], v[139:140]
	v_cndmask_b32_e32 v51, 0, v79, vcc_lo
	s_and_b32 vcc_lo, s8, s7
	v_ldexp_f64 v[47:48], v[47:48], v160
	v_fma_f64 v[131:132], v[137:138], v[131:132], 1.0
	v_cndmask_b32_e64 v114, 0x7ff00000, v114, s11
	v_fma_f64 v[137:138], v[152:153], s[36:37], v[123:124]
	v_cvt_i32_f64_e32 v88, v[152:153]
	v_add_f64 v[145:146], v[145:146], s[16:17]
	v_fma_f64 v[111:112], v[148:149], v[111:112], 1.0
	v_rndne_f64_e32 v[154:155], v[154:155]
	v_cndmask_b32_e64 v84, 0x7ff00000, v134, s7
	v_fma_f64 v[148:149], v[143:144], s[36:37], v[117:118]
	v_cmp_nlt_f64_e64 s7, 0x40900000, v[109:110]
	v_fma_f64 v[115:116], v[150:151], v[115:116], 1.0
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v84, 0, v84, s8
	v_fma_f64 v[156:157], v[139:140], s[36:37], v[121:122]
	v_cmp_ngt_f64_e64 s8, 0xc090cc00, v[109:110]
	v_ldexp_f64 v[130:131], v[131:132], v98
	v_ldexp_f64 v[97:98], v[119:120], v97
	v_fma_f64 v[137:138], v[152:153], s[38:39], v[137:138]
	v_cndmask_b32_e64 v119, 0x7ff00000, v83, s5
	v_cndmask_b32_e32 v83, 0, v133, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	s_and_b32 s5, s6, s5
	v_cndmask_b32_e32 v61, 0, v85, vcc_lo
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[91:92]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[89:90]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[89:90]
	v_cvt_i32_f64_e32 v120, v[143:144]
	v_fma_f64 v[61:62], s[18:19], v[61:62], v[86:87]
	v_cndmask_b32_e64 v87, 0, v82, s5
	s_and_b32 s5, s14, s13
	v_ldexp_f64 v[85:86], v[111:112], v165
	v_mul_f64 v[83:84], s[20:21], v[83:84]
	v_cndmask_b32_e64 v91, 0, v114, s12
	v_fma_f64 v[13:14], v[13:14], v[145:146], -v[158:159]
	v_fma_f64 v[148:149], v[143:144], s[38:39], v[148:149]
	v_fma_f64 v[19:20], v[19:20], v[145:146], -v[158:159]
	v_fma_f64 v[33:34], v[33:34], v[145:146], -v[158:159]
	v_fma_f64 v[115:116], v[150:151], v[115:116], 1.0
	v_fma_f64 v[150:151], v[154:155], s[36:37], v[125:126]
	v_fma_f64 v[156:157], v[139:140], s[38:39], v[156:157]
	v_fma_f64 v[35:36], v[35:36], v[145:146], -v[158:159]
	v_fma_f64 v[41:42], v[41:42], v[145:146], -v[158:159]
	v_cndmask_b32_e64 v103, 0, v130, s5
	s_and_b32 s5, s12, s11
	v_fma_f64 v[57:58], v[137:138], s[42:43], s[40:41]
	v_cndmask_b32_e64 v90, 0, v113, s5
	s_and_b32 s5, s10, s9
	v_cndmask_b32_e64 v96, 0x7ff00000, v131, s13
	v_cvt_i32_f64_e32 v131, v[139:140]
	v_cmp_nlt_f64_e64 s9, 0x40900000, v[101:102]
	v_cndmask_b32_e32 v106, 0x7ff00000, v94, vcc_lo
	v_cndmask_b32_e64 v94, 0, v105, s5
	v_cmp_nlt_f64_e64 s5, 0x40900000, v[99:100]
	s_and_b32 vcc_lo, s2, vcc_lo
	v_cndmask_b32_e64 v104, 0, v96, s14
	v_cndmask_b32_e64 v92, 0x7ff00000, v98, s3
	v_fma_f64 v[61:62], s[22:23], v[94:95], v[61:62]
	v_cmp_nlt_f64_e64 s11, 0x40900000, v[123:124]
	v_cmp_ngt_f64_e64 s10, 0xc090cc00, v[101:102]
	v_mul_f64 v[103:104], s[20:21], v[103:104]
	s_and_b32 s3, s4, s3
	v_fma_f64 v[59:60], v[148:149], s[42:43], s[40:41]
	v_cmp_ngt_f64_e64 s12, 0xc090cc00, v[123:124]
	v_fma_f64 v[83:84], s[18:19], v[90:91], v[83:84]
	v_ldexp_f64 v[115:116], v[115:116], v161
	v_fma_f64 v[150:151], v[154:155], s[38:39], v[150:151]
	v_fma_f64 v[107:108], v[156:157], s[42:43], s[40:41]
	v_cndmask_b32_e64 v89, 0, v92, s4
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[121:122]
	v_cvt_i32_f64_e32 v94, v[154:155]
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[44:45]
	v_cndmask_b32_e64 v92, 0x7ff00000, v48, s9
	v_cndmask_b32_e64 v95, 0x7ff00000, v86, s5
	v_cndmask_b32_e32 v86, 0, v93, vcc_lo
	v_fma_f64 v[51:52], s[18:19], v[51:52], v[80:81]
	v_fma_f64 v[81:82], v[145:146], s[30:31], -v[158:159]
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[117:118]
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[44:45]
	v_cndmask_b32_e64 v96, 0x7ff00000, v116, s7
	v_fma_f64 v[55:56], v[150:151], s[42:43], s[40:41]
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v91, 0, v96, s8
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[46:47]
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[46:47]
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[44:45]
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[46:47]
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[48:49]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[48:49]
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[46:47]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[48:49]
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[52:53]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[52:53]
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[48:49]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[52:53]
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[54:55]
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[52:53]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[54:55]
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[56:57]
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[56:57]
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[60:61]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[60:61]
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[60:61]
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[58:59]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[58:59]
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[60:61]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[58:59]
	v_fma_f64 v[57:58], v[137:138], v[57:58], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], 1.0
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[58:59]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[107:108], v[156:157], v[107:108], 1.0
	v_fma_f64 v[57:58], v[137:138], v[57:58], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], 1.0
	v_fma_f64 v[55:56], v[150:151], v[55:56], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[79:80], v[156:157], v[107:108], 1.0
	v_ldexp_f64 v[57:58], v[57:58], v88
	v_cndmask_b32_e64 v88, 0, v119, s6
	v_cmp_ngt_f64_e64 s6, 0xc090cc00, v[99:100]
	v_mul_f64 v[99:100], v[53:54], v[53:54]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[51:52], s[22:23], v[87:88], v[51:52]
	v_cndmask_b32_e64 v88, 0, v97, s3
	s_and_b32 s3, s8, s7
	s_and_b32 s7, s10, s9
	v_cndmask_b32_e64 v90, 0, v115, s3
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[121:122]
	v_fma_f64 v[88:89], s[18:19], v[88:89], v[103:104]
	v_cndmask_b32_e64 v87, 0, v106, s2
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[117:118]
	v_mul_f64 v[90:91], s[20:21], v[90:91]
	v_ldexp_f64 v[59:60], v[59:60], v120
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[83:84], s[22:23], v[86:87], v[83:84]
	v_fma_f64 v[55:56], v[150:151], v[55:56], 1.0
	v_ldexp_f64 v[79:80], v[79:80], v131
	v_cndmask_b32_e64 v58, 0x7ff00000, v58, s11
	s_and_b32 s5, s6, s5
	v_cndmask_b32_e64 v48, 0, v95, s6
	v_cmp_ngt_f64_e64 s6, 0xc090cc00, v[125:126]
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v58, 0, v58, s12
	v_add_f64 v[13:14], v[13:14], v[51:52]
	v_add_f64 v[51:52], v[81:82], v[61:62]
	v_cndmask_b32_e64 v61, 0, v92, s10
	v_mul_f64 v[81:82], v[25:26], 0.5
	v_mul_f64 v[95:96], v[5:6], -v[45:46]
	v_cndmask_b32_e32 v62, 0x7ff00000, v60, vcc_lo
	v_cndmask_b32_e64 v60, 0, v47, s7
	s_and_b32 s7, s12, s11
	v_cndmask_b32_e64 v47, 0, v85, s5
	v_cndmask_b32_e64 v57, 0, v57, s7
	v_cndmask_b32_e64 v80, 0x7ff00000, v80, s3
	s_and_b32 s3, s4, s3
	v_add_f64 v[19:20], v[19:20], v[83:84]
	v_fma_f64 v[47:48], s[22:23], v[47:48], v[88:89]
	v_mul_f64 v[39:40], s[20:21], v[57:58]
	v_fma_f64 v[57:58], s[18:19], v[60:61], v[90:91]
	v_cndmask_b32_e64 v61, 0, v80, s4
	v_cndmask_b32_e64 v60, 0, v79, s3
	v_mul_f64 v[79:80], v[31:32], s[34:35]
	v_ldexp_f64 v[55:56], v[55:56], v94
	v_cmp_nlt_f64_e64 s5, 0x40900000, v[125:126]
	s_and_b32 vcc_lo, s2, vcc_lo
	v_cmp_ngt_f64_e64 s3, 0xc090cc00, v[31:32]
	v_mul_f64 v[83:84], v[23:24], -v[53:54]
	v_mul_f64 v[89:90], v[43:44], 0.5
	v_mul_f64 v[93:94], v[7:8], 0.5
	v_add_f64 v[13:14], v[51:52], -v[13:14]
	v_cndmask_b32_e64 v52, 0, v62, s2
	v_cndmask_b32_e32 v51, 0, v59, vcc_lo
	v_cmp_nlt_f64_e64 s2, 0x40900000, v[31:32]
	v_add_f64 v[33:34], v[33:34], v[47:48]
	v_fma_f64 v[39:40], s[18:19], v[60:61], v[39:40]
	v_mul_f64 v[59:60], v[49:50], 0.5
	v_mul_f64 v[61:62], v[45:46], 0.5
	v_rndne_f64_e32 v[47:48], v[79:80]
	v_cndmask_b32_e64 v56, 0x7ff00000, v56, s5
	s_and_b32 vcc_lo, s6, s5
	v_fma_f64 v[77:78], v[83:84], v[77:78], v[81:82]
	v_mul_f64 v[81:82], v[17:18], -v[49:50]
	v_fma_f64 v[69:70], v[95:96], v[69:70], v[93:94]
	v_add_f64 v[13:14], v[13:14], -v[19:20]
	v_cndmask_b32_e64 v20, 0, v56, s6
	v_add_f64 v[85:86], -v[59:60], 1.0
	v_add_f64 v[87:88], -v[61:62], 1.0
	v_fma_f64 v[29:30], v[47:48], s[36:37], v[31:32]
	v_lshlrev_b32_e32 v32, 30, v128
	v_fma_f64 v[51:52], s[22:23], v[51:52], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v19, 0, v55 :: v_dual_and_b32 v32, 0x80000000, v32
	v_fma_f64 v[69:70], v[45:46], v[69:70], -v[7:8]
	v_fma_f64 v[19:20], s[22:23], v[19:20], v[39:40]
	v_mul_f64 v[45:46], v[45:46], v[45:46]
	v_add_f64 v[13:14], v[13:14], -v[33:34]
	v_mul_f64 v[33:34], v[27:28], s[34:35]
	v_add_f64 v[91:92], -v[85:86], 1.0
	v_add_f64 v[97:98], -v[87:88], 1.0
	v_fma_f64 v[29:30], v[47:48], s[38:39], v[29:30]
	v_add_f64 v[35:36], v[35:36], v[51:52]
	v_mul_f64 v[51:52], v[53:54], 0.5
	v_add_f64 v[19:20], v[41:42], v[19:20]
	v_add_f64 v[59:60], v[91:92], -v[59:60]
	v_add_f64 v[61:62], v[97:98], -v[61:62]
	v_add_f64 v[13:14], v[13:14], -v[35:36]
	v_add_f64 v[57:58], -v[51:52], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[7:8], v[5:6], -v[7:8], v[61:62]
	v_add_f64 v[13:14], v[19:20], v[13:14]
	v_rndne_f64_e32 v[19:20], v[33:34]
	v_fma_f64 v[33:34], v[29:30], s[42:43], s[40:41]
	v_add_f64 v[79:80], -v[57:58], 1.0
	v_fma_f64 v[7:8], v[45:46], v[67:68], v[7:8]
	v_mul_f64 v[35:36], v[13:14], s[34:35]
	v_fma_f64 v[37:38], v[19:20], s[36:37], v[27:28]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[44:45]
	v_add_f64 v[51:52], v[79:80], -v[51:52]
	v_mul_f64 v[79:80], v[21:22], 0.5
	v_add_f64 v[7:8], v[87:88], v[7:8]
	v_rndne_f64_e32 v[35:36], v[35:36]
	v_fma_f64 v[37:38], v[19:20], s[38:39], v[37:38]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[46:47]
	v_fma_f64 v[51:52], v[23:24], -v[25:26], v[51:52]
	v_fma_f64 v[25:26], v[53:54], v[77:78], -v[25:26]
	v_fma_f64 v[39:40], v[35:36], s[36:37], v[13:14]
	v_fma_f64 v[41:42], v[37:38], s[42:43], s[40:41]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[48:49]
	v_fma_f64 v[51:52], v[99:100], v[75:76], v[51:52]
	v_fma_f64 v[25:26], v[83:84], s[50:51], v[25:26]
	v_mul_f64 v[75:76], v[11:12], 0.5
	v_fma_f64 v[39:40], v[35:36], s[38:39], v[39:40]
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[44:45]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[52:53]
	v_add_f64 v[51:52], v[57:58], v[51:52]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	v_cvt_i32_f64_e32 v57, v[47:48]
	v_fma_f64 v[55:56], v[39:40], s[42:43], s[40:41]
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[46:47]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[55:56], v[39:40], v[55:56], s[44:45]
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[56:57]
	v_fma_f64 v[55:56], v[39:40], v[55:56], s[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[52:53]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[55:56], v[39:40], v[55:56], s[48:49]
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[58:59]
	v_fma_f64 v[53:54], v[39:40], v[55:56], s[52:53]
	v_fma_f64 v[55:56], v[81:82], v[73:74], v[79:80]
	v_add_f64 v[73:74], -v[89:90], 1.0
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[33:34], v[29:30], v[33:34], 1.0
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[56:57]
	v_fma_f64 v[53:54], v[39:40], v[53:54], s[54:55]
	v_fma_f64 v[55:56], v[49:50], v[55:56], -v[21:22]
	v_add_f64 v[77:78], -v[73:74], 1.0
	v_mul_f64 v[49:50], v[49:50], v[49:50]
	v_fma_f64 v[21:22], v[17:18], -v[21:22], v[59:60]
	v_mul_f64 v[59:60], v[9:10], -v[43:44]
	v_fma_f64 v[29:30], v[29:30], v[33:34], 1.0
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[60:61]
	v_fma_f64 v[25:26], v[39:40], v[53:54], s[56:57]
	v_fma_f64 v[33:34], v[81:82], s[50:51], v[55:56]
	v_add_f64 v[47:48], v[77:78], -v[89:90]
	v_fma_f64 v[53:54], v[95:96], s[50:51], v[69:70]
	v_fma_f64 v[21:22], v[49:50], v[71:72], v[21:22]
	v_fma_f64 v[49:50], v[59:60], v[65:66], v[75:76]
	v_and_b32_e32 v55, 1, v129
	v_ldexp_f64 v[29:30], v[29:30], v57
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[58:59]
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v55
	v_dual_cndmask_b32 v45, v52, v24 :: v_dual_cndmask_b32 v46, v51, v23
	v_cmp_class_f64_e64 vcc_lo, v[15:16], 0x1f8
	v_lshlrev_b32_e32 v15, 30, v129
	v_fma_f64 v[23:24], v[39:40], v[25:26], s[60:61]
	v_add_f64 v[17:18], v[17:18], -v[33:34]
	v_fma_f64 v[33:34], v[9:10], -v[11:12], v[47:48]
	s_delay_alu instid0(VALU_DEP_4)
	v_xor_b32_e32 v47, v15, v16
	v_add_f64 v[15:16], v[85:86], v[21:22]
	v_add_f64 v[5:6], v[5:6], -v[53:54]
	v_mul_f64 v[25:26], v[43:44], v[43:44]
	v_fma_f64 v[11:12], v[43:44], v[49:50], -v[11:12]
	v_and_b32_e32 v21, 0x80000000, v47
	v_cndmask_b32_e64 v44, 0x7ff00000, v30, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v43, v45, v21
	v_and_b32_e32 v45, 1, v0
	v_lshlrev_b32_e32 v0, 30, v0
	v_fma_f64 v[21:22], v[37:38], v[41:42], 1.0
	v_cndmask_b32_e32 v31, 0x7ff80000, v43, vcc_lo
	v_and_b32_e32 v43, 1, v128
	v_cmp_eq_u32_e64 s5, 0, v45
	v_cndmask_b32_e32 v30, 0, v46, vcc_lo
	v_and_b32_e32 v0, 0x80000000, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e64 s4, 0, v43
	v_mul_f64 v[41:42], v[30:31], 0
	v_fma_f64 v[23:24], v[39:40], v[23:24], s[58:59]
	v_xor_b32_e32 v18, 0x80000000, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v15, v17, v15, s4
	v_xor_b32_e32 v6, 0x80000000, v6
	v_cndmask_b32_e64 v16, v18, v16, s4
	v_fma_f64 v[25:26], v[25:26], v[63:64], v[33:34]
	v_cndmask_b32_e64 v33, v5, v7, s5
	v_cndmask_b32_e32 v5, 0, v15, vcc_lo
	v_fma_f64 v[11:12], v[59:60], s[50:51], v[11:12]
	v_xor_b32_e32 v16, v16, v32
	v_cndmask_b32_e64 v32, v6, v8, s5
	v_cvt_i32_f64_e32 v34, v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v6, 0x7ff80000, v16, vcc_lo
	s_and_b32 vcc_lo, s3, s2
	v_xor_b32_e32 v0, v32, v0
	v_cndmask_b32_e32 v15, 0, v29, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[3:4], 0x1f8
	v_cndmask_b32_e64 v16, 0, v44, s3
	v_fma_f64 v[7:8], v[37:38], v[21:22], 1.0
	v_and_b32_e32 v3, 1, v127
	v_cmp_ngt_f64_e64 s3, 0xc090cc00, v[27:28]
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_eq_u32_e64 s2, 0, v3
	v_fma_f64 v[17:18], v[39:40], v[23:24], 1.0
	v_cvt_i32_f64_e32 v23, v[35:36]
	v_add_f64 v[21:22], v[73:74], v[25:26]
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	v_cndmask_b32_e32 v12, 0x7ff80000, v0, vcc_lo
	v_dual_cndmask_b32 v11, 0, v33 :: v_dual_lshlrev_b32 v0, 30, v127
	v_ldexp_f64 v[7:8], v[7:8], v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v4
	v_and_b32_e32 v0, 0x80000000, v0
	v_mul_f64 v[19:20], v[15:16], v[30:31]
	v_fma_f64 v[15:16], v[15:16], v[5:6], -v[41:42]
	v_fma_f64 v[17:18], v[39:40], v[17:18], 1.0
	v_cndmask_b32_e64 v3, v22, v10, s2
	v_cndmask_b32_e64 v4, v21, v9, s2
	v_cmp_nlt_f64_e64 s2, 0x40900000, v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v0, v3, v0
	v_cndmask_b32_e32 v3, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v4, 0x7ff80000, v0, vcc_lo
	v_fma_f64 v[5:6], v[5:6], 0, v[19:20]
	v_add_f64 v[11:12], v[11:12], -v[15:16]
	s_and_b32 vcc_lo, s3, s2
	v_cndmask_b32_e64 v10, 0x7ff00000, v8, s2
	v_ldexp_f64 v[8:9], v[17:18], v23
	v_cndmask_b32_e32 v15, 0, v7, vcc_lo
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[13:14]
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[13:14]
	v_cndmask_b32_e64 v16, 0, v10, s3
	v_add_f64 v[3:4], v[3:4], -v[5:6]
	v_mul_f64 v[5:6], v[11:12], 0
	v_cndmask_b32_e32 v0, 0x7ff00000, v9, vcc_lo
	s_and_b32 vcc_lo, s2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[9:10], v[3:4], 0
	v_fma_f64 v[3:4], v[15:16], v[3:4], v[5:6]
	v_cndmask_b32_e32 v5, 0, v8, vcc_lo
	v_cndmask_b32_e64 v6, 0, v0, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[7:8], v[15:16], v[11:12], -v[9:10]
	v_mul_f64 v[9:10], v[3:4], 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[11:12], v[3:4], v[5:6]
	v_fma_f64 v[3:4], v[7:8], v[5:6], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[5:6], v[7:8], 0, v[11:12]
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[7:8], null, v1, s0, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[0:1], 4, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s28, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s29, v1, vcc_lo
	global_store_b128 v[0:1], v[3:6], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 172
		.amdhsa_next_free_sgpr 62
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd, .Lfunc_end3-_Z15kernelRephasingP15HIP_vector_typeIdLj2EEddiPd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 11760
; NumSgprs: 64
; NumVgprs: 172
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 7
; VGPRBlocks: 21
; NumSGPRsForWavesPerEU: 64
; NumVGPRsForWavesPerEU: 172
; Occupancy: 8
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd ; -- Begin function _Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd
	.globl	_Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd
	.p2align	8
	.type	_Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd,@function
_Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd: ; @_Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd
; %bb.0:
	s_load_b32 s2, s[0:1], 0x34
	v_bfe_u32 v3, v0, 10, 10
	s_clause 0x1
	s_load_b128 s[28:31], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x20
	v_and_b32_e32 v0, 0x3ff, v0
                                        ; implicit-def: $vgpr7_vgpr8
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_load_b64 s[4:5], s[8:9], 0x48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[4:5], v1
	v_mad_u64_u32 v[2:3], null, s14, s2, v[0:1]
	s_mov_b32 s2, 0x75eeba82
	s_mov_b32 s3, 0xbfc81c59
                                        ; implicit-def: $vgpr0
	v_cvt_f64_i32_e32 v[15:16], v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[11:12], v[4:5], s[30:31]
                                        ; implicit-def: $vgpr5_vgpr6
	v_fma_f64 v[29:30], v[15:16], s[30:31], v[11:12]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[3:4], s[4:5], v[29:30]
	v_mul_f64 v[3:4], v[3:4], s[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s3, 0x41d00000, |v[3:4]|
	v_trig_preop_f64 v[21:22], |v[3:4]|, 0
	v_trig_preop_f64 v[19:20], |v[3:4]|, 1
	v_ldexp_f64 v[23:24], |v[3:4]|, 0xffffff80
	v_trig_preop_f64 v[17:18], |v[3:4]|, 2
	v_and_b32_e32 v25, 0x7fffffff, v4
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s2
	s_cbranch_execz .LBB4_2
; %bb.1:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[3:4]|
	v_mov_b32_e32 v41, 0
	s_mov_b32 s10, 0x54442d18
	s_mov_b32 s11, 0x3ff921fb
	s_mov_b32 s12, 0x33145c07
	s_mov_b32 s13, 0x3c91a626
	v_dual_cndmask_b32 v6, v25, v24 :: v_dual_cndmask_b32 v5, v3, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[7:8], v[21:22], v[5:6]
	v_mul_f64 v[9:10], v[19:20], v[5:6]
	v_mul_f64 v[37:38], v[17:18], v[5:6]
	v_fma_f64 v[13:14], v[21:22], v[5:6], -v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[39:40], v[19:20], v[5:6], -v[9:10]
	v_fma_f64 v[5:6], v[17:18], v[5:6], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[9:10], v[13:14]
	v_add_f64 v[31:32], v[26:27], -v[9:10]
	v_add_f64 v[35:36], v[7:8], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[33:34], v[26:27], -v[31:32]
	v_add_f64 v[13:14], v[13:14], -v[31:32]
	v_ldexp_f64 v[31:32], v[35:36], -2
	v_add_f64 v[7:8], v[35:36], -v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], -v[33:34]
	v_add_f64 v[33:34], v[37:38], v[39:40]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[31:32]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[7:8], v[26:27], -v[7:8]
	v_add_f64 v[9:10], v[13:14], v[9:10]
	v_fract_f64_e32 v[13:14], v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[33:34], v[9:10]
	v_dual_cndmask_b32 v14, 0, v14 :: v_dual_cndmask_b32 v13, 0, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[13:14], v[13:14], 2
	v_add_f64 v[31:32], v[7:8], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[35:36], v[31:32], v[13:14]
	v_add_f64 v[7:8], v[31:32], -v[7:8]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[35:36]
	v_add_f64 v[35:36], v[33:34], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[26:27], -v[7:8]
	v_cndmask_b32_e64 v42, 0, 0x40100000, vcc_lo
	v_add_f64 v[46:47], v[33:34], -v[35:36]
	v_add_f64 v[35:36], v[39:40], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[13:14], v[13:14], v[41:42]
	v_add_f64 v[42:43], v[26:27], -v[33:34]
	v_add_f64 v[39:40], v[37:38], -v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[44:45], v[31:32], v[13:14]
	v_add_f64 v[48:49], v[26:27], -v[42:43]
	v_add_f64 v[9:10], v[9:10], -v[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[35:36], v[35:36], v[39:40]
	v_cvt_i32_f64_e32 v0, v[44:45]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[33:34], -v[48:49]
	v_cvt_f64_i32_e32 v[42:43], v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[33:34]
	v_add_f64 v[13:14], v[13:14], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[35:36], v[9:10]
	v_add_f64 v[33:34], v[31:32], v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[9:10]
	v_add_f64 v[9:10], v[33:34], -v[13:14]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[7:8], v[5:6]
	v_add_f64 v[7:8], v[31:32], -v[9:10]
	v_cndmask_b32_e64 v42, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v0, s2, 0, v0, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_add_f64 v[7:8], v[33:34], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[7:8], v[5:6]
	v_mul_f64 v[13:14], v[9:10], s[10:11]
	v_add_f64 v[7:8], v[9:10], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[9:10], s[10:11], -v[13:14]
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[9:10], s[12:13], v[26:27]
	v_fma_f64 v[7:8], v[5:6], s[10:11], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[13:14], v[7:8]
	v_add_f64 v[9:10], v[5:6], -v[13:14]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[9:10]
.LBB4_2:                                ; %Flow31
	s_and_not1_saveexec_b32 s2, s6
	s_cbranch_execz .LBB4_4
; %bb.3:
	s_mov_b32 s6, 0x6dc9c883
	s_mov_b32 s7, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[5:6], |v[3:4]|, s[6:7]
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[9:10], v[5:6]
	v_fma_f64 v[5:6], v[9:10], s[6:7], |v[3:4]|
	v_mul_f64 v[7:8], v[9:10], s[10:11]
	s_mov_b32 s6, 0x252049c0
	s_mov_b32 s7, 0xb97b839a
	v_cvt_i32_f64_e32 v0, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], v[9:10], s[10:11], v[5:6]
	v_add_f64 v[13:14], v[5:6], v[7:8]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[5:6], -v[13:14]
	v_add_f64 v[13:14], v[13:14], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_fma_f64 v[7:8], v[9:10], s[10:11], v[7:8]
	v_add_f64 v[5:6], v[13:14], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	v_fma_f64 v[7:8], v[9:10], s[6:7], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[26:27], v[7:8]
	v_add_f64 v[13:14], v[5:6], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[13:14]
.LBB4_4:                                ; %_ZL3cosd.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr127
                                        ; implicit-def: $vgpr9_vgpr10
                                        ; implicit-def: $vgpr13_vgpr14
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s2
	s_cbranch_execz .LBB4_6
; %bb.5:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[3:4]|
	v_mov_b32_e32 v37, 0
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_dual_cndmask_b32 v10, v25, v24 :: v_dual_cndmask_b32 v9, v3, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[13:14], v[21:22], v[9:10]
	v_mul_f64 v[23:24], v[19:20], v[9:10]
	v_mul_f64 v[35:36], v[17:18], v[9:10]
	v_fma_f64 v[21:22], v[21:22], v[9:10], -v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[19:20], v[9:10], -v[23:24]
	v_fma_f64 v[9:10], v[17:18], v[9:10], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[23:24], v[21:22]
	v_add_f64 v[27:28], v[25:26], -v[23:24]
	v_add_f64 v[33:34], v[13:14], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[25:26], -v[27:28]
	v_add_f64 v[21:22], v[21:22], -v[27:28]
	v_ldexp_f64 v[27:28], v[33:34], -2
	v_add_f64 v[13:14], v[33:34], -v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[23:24], v[23:24], -v[31:32]
	v_add_f64 v[31:32], v[35:36], v[19:20]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[27:28]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[13:14], v[25:26], -v[13:14]
	v_add_f64 v[21:22], v[21:22], v[23:24]
	v_fract_f64_e32 v[23:24], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[31:32], v[21:22]
	v_dual_cndmask_b32 v24, 0, v24 :: v_dual_cndmask_b32 v23, 0, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[23:24], v[23:24], 2
	v_add_f64 v[27:28], v[13:14], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[27:28], v[23:24]
	v_add_f64 v[13:14], v[27:28], -v[13:14]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[33:34]
	v_add_f64 v[33:34], v[31:32], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[13:14], v[25:26], -v[13:14]
	v_cndmask_b32_e64 v38, 0, 0x40100000, vcc_lo
	v_add_f64 v[42:43], v[31:32], -v[33:34]
	v_add_f64 v[19:20], v[19:20], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[23:24], v[23:24], v[37:38]
	v_add_f64 v[38:39], v[25:26], -v[31:32]
	v_add_f64 v[33:34], v[35:36], -v[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[40:41], v[27:28], v[23:24]
	v_add_f64 v[44:45], v[25:26], -v[38:39]
	v_add_f64 v[21:22], v[21:22], -v[38:39]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[19:20], v[19:20], v[33:34]
	v_cvt_i32_f64_e32 v40, v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[31:32], -v[44:45]
	v_cvt_f64_i32_e32 v[38:39], v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[21:22], v[31:32]
	v_add_f64 v[23:24], v[23:24], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[19:20], v[21:22]
	v_add_f64 v[19:20], v[27:28], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[17:18]
	v_add_f64 v[17:18], v[19:20], -v[23:24]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[13:14], v[9:10]
	v_add_f64 v[13:14], v[27:28], -v[17:18]
	v_cndmask_b32_e64 v38, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v127, s2, 0, v40, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[13:14]
	v_add_f64 v[13:14], v[19:20], -v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[13:14], v[9:10]
	v_mul_f64 v[19:20], v[17:18], s[6:7]
	v_add_f64 v[13:14], v[17:18], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[21:22], v[17:18], s[6:7], -v[19:20]
	v_add_f64 v[9:10], v[9:10], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[17:18], s[10:11], v[21:22]
	v_fma_f64 v[13:14], v[9:10], s[6:7], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[19:20], v[13:14]
	v_add_f64 v[17:18], v[9:10], -v[19:20]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[13:14], v[13:14], -v[17:18]
.LBB4_6:                                ; %Flow30
	s_or_saveexec_b32 s2, s3
	v_mul_f64 v[21:22], v[15:16], s[30:31]
	s_xor_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB4_8
; %bb.7:
	s_mov_b32 s6, 0x6dc9c883
	s_mov_b32 s7, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[9:10], |v[3:4]|, s[6:7]
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[15:16], v[9:10]
	v_fma_f64 v[9:10], v[15:16], s[6:7], |v[3:4]|
	v_mul_f64 v[13:14], v[15:16], s[10:11]
	s_mov_b32 s6, 0x252049c0
	s_mov_b32 s7, 0xb97b839a
	v_cvt_i32_f64_e32 v127, v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[15:16], s[10:11], v[9:10]
	v_add_f64 v[17:18], v[9:10], v[13:14]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], -v[17:18]
	v_add_f64 v[17:18], v[17:18], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[13:14]
	v_fma_f64 v[13:14], v[15:16], s[10:11], v[13:14]
	v_add_f64 v[9:10], v[17:18], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[13:14]
	v_fma_f64 v[13:14], v[15:16], s[6:7], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[19:20], v[13:14]
	v_add_f64 v[17:18], v[9:10], -v[19:20]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[13:14], v[13:14], -v[17:18]
.LBB4_8:                                ; %_Z8my_cexpid.exit.i
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b64 s[2:3], s[8:9], 0x50
                                        ; implicit-def: $vgpr128
                                        ; implicit-def: $vgpr17_vgpr18
                                        ; implicit-def: $vgpr19_vgpr20
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[15:16], s[4:5], -s[2:3]
	s_mov_b32 s2, 0x75eeba82
	s_mov_b32 s3, 0xbfc81c59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[15:16], v[11:12], v[15:16]
	v_fma_f64 v[15:16], s[4:5], v[21:22], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[15:16], v[15:16], s[2:3]
	v_cmp_ngt_f64_e64 s3, 0x41d00000, |v[15:16]|
	v_trig_preop_f64 v[33:34], |v[15:16]|, 0
	v_trig_preop_f64 v[31:32], |v[15:16]|, 1
	v_ldexp_f64 v[35:36], |v[15:16]|, 0xffffff80
	v_trig_preop_f64 v[27:28], |v[15:16]|, 2
	v_and_b32_e32 v37, 0x7fffffff, v16
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s2
	s_cbranch_execz .LBB4_10
; %bb.9:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[15:16]|
	v_mov_b32_e32 v50, 0
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_dual_cndmask_b32 v18, v37, v36 :: v_dual_cndmask_b32 v17, v15, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[19:20], v[33:34], v[17:18]
	v_mul_f64 v[23:24], v[31:32], v[17:18]
	v_mul_f64 v[46:47], v[27:28], v[17:18]
	v_fma_f64 v[25:26], v[33:34], v[17:18], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[48:49], v[31:32], v[17:18], -v[23:24]
	v_fma_f64 v[17:18], v[27:28], v[17:18], -v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], v[23:24], v[25:26]
	v_add_f64 v[40:41], v[38:39], -v[23:24]
	v_add_f64 v[44:45], v[19:20], v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[42:43], v[38:39], -v[40:41]
	v_add_f64 v[25:26], v[25:26], -v[40:41]
	v_ldexp_f64 v[40:41], v[44:45], -2
	v_add_f64 v[19:20], v[44:45], -v[19:20]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[23:24], v[23:24], -v[42:43]
	v_add_f64 v[42:43], v[46:47], v[48:49]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[40:41]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[19:20], v[38:39], -v[19:20]
	v_add_f64 v[23:24], v[25:26], v[23:24]
	v_fract_f64_e32 v[25:26], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[42:43], v[23:24]
	v_dual_cndmask_b32 v26, 0, v26 :: v_dual_cndmask_b32 v25, 0, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[25:26], v[25:26], 2
	v_add_f64 v[40:41], v[19:20], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[40:41], v[25:26]
	v_add_f64 v[19:20], v[40:41], -v[19:20]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[44:45]
	v_add_f64 v[44:45], v[42:43], -v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[38:39], -v[19:20]
	v_cndmask_b32_e64 v51, 0, 0x40100000, vcc_lo
	v_add_f64 v[55:56], v[42:43], -v[44:45]
	v_add_f64 v[44:45], v[48:49], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[25:26], v[50:51]
	v_add_f64 v[51:52], v[38:39], -v[42:43]
	v_add_f64 v[48:49], v[46:47], -v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[40:41], v[25:26]
	v_add_f64 v[57:58], v[38:39], -v[51:52]
	v_add_f64 v[23:24], v[23:24], -v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[44:45], v[44:45], v[48:49]
	v_cvt_i32_f64_e32 v53, v[53:54]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[42:43], -v[57:58]
	v_cvt_f64_i32_e32 v[51:52], v53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[42:43]
	v_add_f64 v[25:26], v[25:26], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[44:45], v[23:24]
	v_add_f64 v[42:43], v[40:41], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[23:24]
	v_add_f64 v[23:24], v[42:43], -v[25:26]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[19:20], v[17:18]
	v_add_f64 v[19:20], v[40:41], -v[23:24]
	v_cndmask_b32_e64 v51, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v128, s2, 0, v53, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[17:18], v[19:20]
	v_add_f64 v[19:20], v[42:43], -v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[19:20], v[17:18]
	v_mul_f64 v[25:26], v[23:24], s[6:7]
	v_add_f64 v[19:20], v[23:24], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], v[23:24], s[6:7], -v[25:26]
	v_add_f64 v[17:18], v[17:18], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], v[23:24], s[10:11], v[38:39]
	v_fma_f64 v[19:20], v[17:18], s[6:7], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[25:26], v[19:20]
	v_add_f64 v[23:24], v[17:18], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[19:20], v[19:20], -v[23:24]
.LBB4_10:                               ; %Flow29
	s_or_saveexec_b32 s2, s4
	s_load_b64 s[30:31], s[0:1], 0x10
	s_xor_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB4_12
; %bb.11:
	s_mov_b32 s4, 0x6dc9c883
	s_mov_b32 s5, 0x3fe45f30
	s_mov_b32 s7, 0xbc91a626
	v_mul_f64 v[17:18], |v[15:16]|, s[4:5]
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0xbff921fb
	s_mov_b32 s6, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[23:24], v[17:18]
	v_fma_f64 v[17:18], v[23:24], s[4:5], |v[15:16]|
	v_mul_f64 v[19:20], v[23:24], s[6:7]
	s_mov_b32 s4, 0x252049c0
	s_mov_b32 s5, 0xb97b839a
	v_cvt_i32_f64_e32 v128, v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[38:39], v[23:24], s[6:7], v[17:18]
	v_add_f64 v[25:26], v[17:18], v[19:20]
	s_mov_b32 s7, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[17:18], -v[25:26]
	v_add_f64 v[25:26], v[25:26], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[19:20]
	v_fma_f64 v[19:20], v[23:24], s[6:7], v[19:20]
	v_add_f64 v[17:18], v[25:26], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[17:18], -v[19:20]
	v_fma_f64 v[19:20], v[23:24], s[4:5], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[38:39], v[19:20]
	v_add_f64 v[25:26], v[17:18], -v[38:39]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[19:20], v[19:20], -v[25:26]
.LBB4_12:                               ; %_ZL3cosd.exit.i66.i
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr129
                                        ; implicit-def: $vgpr23_vgpr24
                                        ; implicit-def: $vgpr25_vgpr26
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s2
	s_cbranch_execz .LBB4_14
; %bb.13:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[15:16]|
	v_mov_b32_e32 v47, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0x3ff921fb
	s_mov_b32 s6, 0x33145c07
	s_mov_b32 s7, 0x3c91a626
	v_dual_cndmask_b32 v24, v37, v36 :: v_dual_cndmask_b32 v23, v15, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[25:26], v[33:34], v[23:24]
	v_mul_f64 v[35:36], v[31:32], v[23:24]
	v_mul_f64 v[45:46], v[27:28], v[23:24]
	v_fma_f64 v[33:34], v[33:34], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[31:32], v[31:32], v[23:24], -v[35:36]
	v_fma_f64 v[23:24], v[27:28], v[23:24], -v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[37:38], v[35:36], v[33:34]
	v_add_f64 v[39:40], v[37:38], -v[35:36]
	v_add_f64 v[43:44], v[25:26], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[37:38], -v[39:40]
	v_add_f64 v[33:34], v[33:34], -v[39:40]
	v_ldexp_f64 v[39:40], v[43:44], -2
	v_add_f64 v[25:26], v[43:44], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[35:36], v[35:36], -v[41:42]
	v_add_f64 v[41:42], v[45:46], v[31:32]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[39:40]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[37:38], -v[25:26]
	v_add_f64 v[33:34], v[33:34], v[35:36]
	v_fract_f64_e32 v[35:36], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[41:42], v[33:34]
	v_dual_cndmask_b32 v36, 0, v36 :: v_dual_cndmask_b32 v35, 0, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[35:36], v[35:36], 2
	v_add_f64 v[39:40], v[25:26], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[39:40], v[35:36]
	v_add_f64 v[25:26], v[39:40], -v[25:26]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[43:44]
	v_add_f64 v[43:44], v[41:42], -v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[37:38], -v[25:26]
	v_cndmask_b32_e64 v48, 0, 0x40100000, vcc_lo
	v_add_f64 v[52:53], v[41:42], -v[43:44]
	v_add_f64 v[31:32], v[31:32], -v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[35:36], v[35:36], v[47:48]
	v_add_f64 v[48:49], v[37:38], -v[41:42]
	v_add_f64 v[43:44], v[45:46], -v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[39:40], v[35:36]
	v_add_f64 v[54:55], v[37:38], -v[48:49]
	v_add_f64 v[33:34], v[33:34], -v[48:49]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[31:32], v[31:32], v[43:44]
	v_cvt_i32_f64_e32 v50, v[50:51]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], -v[54:55]
	v_cvt_f64_i32_e32 v[48:49], v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[33:34], v[41:42]
	v_add_f64 v[35:36], v[35:36], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[31:32], v[33:34]
	v_add_f64 v[31:32], v[39:40], v[35:36]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[27:28]
	v_add_f64 v[27:28], v[31:32], -v[35:36]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[25:26], v[23:24]
	v_add_f64 v[25:26], v[39:40], -v[27:28]
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v129, s2, 0, v50, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_add_f64 v[25:26], v[31:32], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[25:26], v[23:24]
	v_mul_f64 v[31:32], v[27:28], s[4:5]
	v_add_f64 v[25:26], v[27:28], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[33:34], v[27:28], s[4:5], -v[31:32]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[27:28], s[6:7], v[33:34]
	v_fma_f64 v[25:26], v[23:24], s[4:5], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[31:32], v[25:26]
	v_add_f64 v[27:28], v[23:24], -v[31:32]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[25:26], v[25:26], -v[27:28]
.LBB4_14:                               ; %Flow
	s_and_not1_saveexec_b32 s2, s3
	s_cbranch_execz .LBB4_16
; %bb.15:
	s_mov_b32 s4, 0x6dc9c883
	s_mov_b32 s5, 0x3fe45f30
	s_mov_b32 s7, 0xbc91a626
	v_mul_f64 v[23:24], |v[15:16]|, s[4:5]
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0xbff921fb
	s_mov_b32 s6, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[27:28], v[23:24]
	v_fma_f64 v[23:24], v[27:28], s[4:5], |v[15:16]|
	v_mul_f64 v[25:26], v[27:28], s[6:7]
	s_mov_b32 s4, 0x252049c0
	s_mov_b32 s5, 0xb97b839a
	v_cvt_i32_f64_e32 v129, v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[33:34], v[27:28], s[6:7], v[23:24]
	v_add_f64 v[31:32], v[23:24], v[25:26]
	s_mov_b32 s7, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], -v[31:32]
	v_add_f64 v[31:32], v[31:32], -v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_fma_f64 v[25:26], v[27:28], s[6:7], v[25:26]
	v_add_f64 v[23:24], v[31:32], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	v_fma_f64 v[25:26], v[27:28], s[4:5], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[33:34], v[25:26]
	v_add_f64 v[31:32], v[23:24], -v[33:34]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[25:26], v[25:26], -v[31:32]
.LBB4_16:                               ; %_Z3RnrdddPd.exit
	s_or_b32 exec_lo, exec_lo, s2
	s_clause 0x1
	s_load_b128 s[4:7], s[8:9], 0x58
	s_load_b64 s[10:11], s[8:9], 0x40
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[29:30], s[30:31], 2.0, v[29:30]
	s_load_b512 s[12:27], s[8:9], 0x0
	s_mov_b32 s34, 0x652b82fe
	s_mov_b32 s35, 0x3ff71547
	s_mov_b32 s36, 0xfefa39ef
	s_mov_b32 s37, 0xbfe62e42
	s_mov_b32 s38, 0x3b39803f
	s_mov_b32 s39, 0xbc7abc9e
	s_mov_b32 s40, 0xfca7ab0c
	s_mov_b32 s42, 0x6a5dcb37
	s_mov_b32 s41, 0x3e928af3
	s_mov_b32 s43, 0x3e5ade15
	s_mov_b32 s44, 0x623fde64
	s_mov_b32 s45, 0x3ec71dee
	s_mov_b32 s46, 0x9037ab78
	s_mov_b32 s52, 0x46cc5e42
	s_mov_b32 s47, 0x3e21eeb6
	s_mov_b32 s53, 0xbda907db
	v_mul_f64 v[31:32], v[11:12], -s[6:7]
	v_add_f64 v[27:28], s[4:5], s[4:5]
	v_div_scale_f64 v[37:38], null, s[10:11], s[10:11], -v[21:22]
	s_waitcnt lgkmcnt(0)
	v_div_scale_f64 v[39:40], null, s[24:25], s[24:25], -v[21:22]
	v_div_scale_f64 v[35:36], null, s[26:27], s[26:27], -v[21:22]
	v_div_scale_f64 v[45:46], null, s[24:25], s[24:25], -s[30:31]
	v_div_scale_f64 v[47:48], null, s[26:27], s[26:27], -s[30:31]
	v_div_scale_f64 v[83:84], s8, -v[21:22], s[10:11], -v[21:22]
	v_div_scale_f64 v[93:94], s4, -s[30:31], s[24:25], -s[30:31]
	v_div_scale_f64 v[95:96], s3, -s[30:31], s[26:27], -s[30:31]
	v_div_scale_f64 v[85:86], null, s[10:11], s[10:11], -v[11:12]
	v_div_scale_f64 v[103:104], s2, -s[30:31], s[10:11], -s[30:31]
	s_mov_b32 s48, 0xb42fdfa7
	s_mov_b32 s50, 0xf9a43bb8
	s_mov_b32 s49, 0xbe5ae600
	s_mov_b32 s51, 0x3de5e0b2
	s_mov_b32 s55, 0x3f811111
	s_mov_b32 s54, 0x11110bb3
	s_mov_b32 s56, 0x55555555
	s_mov_b32 s57, 0x3fa55555
	s_mov_b32 s60, 0x55555511
	s_mov_b32 s61, 0x3fc55555
	s_mov_b32 s58, 11
	s_mov_b32 s59, 0x3fe00000
	s_load_b32 s0, s[0:1], 0x18
	v_div_scale_f64 v[41:42], null, v[27:28], v[27:28], v[31:32]
	v_div_scale_f64 v[43:44], null, v[27:28], v[27:28], -v[29:30]
	v_rcp_f64_e32 v[33:34], v[39:40]
	v_rcp_f64_e32 v[53:54], v[35:36]
	v_rcp_f64_e32 v[55:56], v[37:38]
	v_rcp_f64_e32 v[65:66], v[45:46]
	v_div_scale_f64 v[77:78], s5, -v[29:30], v[27:28], -v[29:30]
	v_rcp_f64_e32 v[67:68], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[49:50], v[41:42]
	v_rcp_f64_e32 v[51:52], v[43:44]
	v_fma_f64 v[61:62], -v[39:40], v[33:34], 1.0
	v_fma_f64 v[63:64], -v[35:36], v[53:54], 1.0
	v_fma_f64 v[69:70], -v[37:38], v[55:56], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[57:58], -v[41:42], v[49:50], 1.0
	v_fma_f64 v[59:60], -v[43:44], v[51:52], 1.0
	v_fma_f64 v[33:34], v[33:34], v[61:62], v[33:34]
	v_fma_f64 v[53:54], v[53:54], v[63:64], v[53:54]
	v_fma_f64 v[61:62], -v[47:48], v[67:68], 1.0
	v_fma_f64 v[55:56], v[55:56], v[69:70], v[55:56]
	v_fma_f64 v[49:50], v[49:50], v[57:58], v[49:50]
	v_div_scale_f64 v[57:58], null, s[10:11], s[10:11], -s[30:31]
	v_fma_f64 v[51:52], v[51:52], v[59:60], v[51:52]
	v_fma_f64 v[59:60], -v[45:46], v[65:66], 1.0
	v_fma_f64 v[73:74], -v[39:40], v[33:34], 1.0
	v_fma_f64 v[75:76], -v[35:36], v[53:54], 1.0
	v_fma_f64 v[61:62], v[67:68], v[61:62], v[67:68]
	v_div_scale_f64 v[67:68], vcc_lo, v[31:32], v[27:28], v[31:32]
	v_fma_f64 v[63:64], -v[41:42], v[49:50], 1.0
	v_rcp_f64_e32 v[71:72], v[57:58]
	v_fma_f64 v[69:70], -v[43:44], v[51:52], 1.0
	v_fma_f64 v[59:60], v[65:66], v[59:60], v[65:66]
	v_fma_f64 v[65:66], -v[37:38], v[55:56], 1.0
	v_fma_f64 v[79:80], v[33:34], v[73:74], v[33:34]
	v_div_scale_f64 v[73:74], s7, -v[21:22], s[26:27], -v[21:22]
	v_fma_f64 v[81:82], v[53:54], v[75:76], v[53:54]
	v_fma_f64 v[75:76], -v[47:48], v[61:62], 1.0
	v_div_scale_f64 v[53:54], null, s[24:25], s[24:25], -v[11:12]
	v_fma_f64 v[63:64], v[49:50], v[63:64], v[49:50]
	v_fma_f64 v[51:52], v[51:52], v[69:70], v[51:52]
	v_div_scale_f64 v[69:70], s6, -v[21:22], s[24:25], -v[21:22]
	s_delay_alu instid0(TRANS32_DEP_1)
	v_fma_f64 v[33:34], -v[57:58], v[71:72], 1.0
	v_fma_f64 v[49:50], -v[45:46], v[59:60], 1.0
	v_fma_f64 v[55:56], v[55:56], v[65:66], v[55:56]
	v_mul_f64 v[91:92], v[73:74], v[81:82]
	v_fma_f64 v[61:62], v[61:62], v[75:76], v[61:62]
	v_rcp_f64_e32 v[105:106], v[53:54]
	v_mul_f64 v[65:66], v[67:68], v[63:64]
	v_mul_f64 v[87:88], v[77:78], v[51:52]
	v_mul_f64 v[89:90], v[69:70], v[79:80]
	v_fma_f64 v[71:72], v[71:72], v[33:34], v[71:72]
	v_add_f64 v[33:34], v[21:22], s[30:31]
	v_fma_f64 v[59:60], v[59:60], v[49:50], v[59:60]
	v_mul_f64 v[97:98], v[83:84], v[55:56]
	v_div_scale_f64 v[49:50], null, s[26:27], s[26:27], -v[11:12]
	v_fma_f64 v[99:100], -v[35:36], v[91:92], v[73:74]
	v_add_f64 v[35:36], v[11:12], s[30:31]
	v_mul_f64 v[109:110], v[95:96], v[61:62]
	v_fma_f64 v[41:42], -v[41:42], v[65:66], v[67:68]
	v_fma_f64 v[67:68], -v[43:44], v[87:88], v[77:78]
	v_fma_f64 v[69:70], -v[39:40], v[89:90], v[69:70]
	v_fma_f64 v[77:78], -v[57:58], v[71:72], 1.0
	v_div_scale_f64 v[43:44], null, s[24:25], s[24:25], -v[33:34]
	v_div_scale_f64 v[75:76], null, s[26:27], s[26:27], -v[33:34]
	v_mul_f64 v[101:102], v[93:94], v[59:60]
	v_div_scale_f64 v[73:74], null, s[10:11], s[10:11], -v[33:34]
	v_fma_f64 v[83:84], -v[37:38], v[97:98], v[83:84]
	v_rcp_f64_e32 v[107:108], v[49:50]
	v_div_fmas_f64 v[39:40], v[41:42], v[63:64], v[65:66]
	s_mov_b32 vcc_lo, s5
	v_rcp_f64_e32 v[65:66], v[85:86]
	v_div_fmas_f64 v[37:38], v[67:68], v[51:52], v[87:88]
	s_mov_b32 vcc_lo, s6
	v_div_scale_f64 v[63:64], null, s[26:27], s[26:27], -v[35:36]
	v_div_fmas_f64 v[41:42], v[69:70], v[79:80], v[89:90]
	s_mov_b32 vcc_lo, s7
	v_fma_f64 v[67:68], v[71:72], v[77:78], v[71:72]
	v_div_fmas_f64 v[51:52], v[99:100], v[81:82], v[91:92]
	v_div_scale_f64 v[77:78], null, s[24:25], s[24:25], -v[35:36]
	v_rcp_f64_e32 v[71:72], v[43:44]
	v_rcp_f64_e32 v[79:80], v[75:76]
	v_fma_f64 v[45:46], -v[45:46], v[101:102], v[93:94]
	v_rcp_f64_e32 v[81:82], v[73:74]
	s_mov_b32 vcc_lo, s8
	v_fma_f64 v[69:70], -v[53:54], v[105:106], 1.0
	v_fma_f64 v[89:90], -v[47:48], v[109:110], v[95:96]
	v_div_fmas_f64 v[83:84], v[83:84], v[55:56], v[97:98]
	v_fma_f64 v[87:88], -v[49:50], v[107:108], 1.0
	s_mov_b32 vcc_lo, s4
	v_div_scale_f64 v[125:126], s6, -v[11:12], s[26:27], -v[11:12]
	v_div_scale_f64 v[130:131], s8, -v[11:12], s[10:11], -v[11:12]
	v_div_scale_f64 v[150:151], s7, -v[35:36], s[24:25], -v[35:36]
	v_div_scale_f64 v[164:165], s5, -v[35:36], s[26:27], -v[35:36]
	v_div_fixup_f64 v[31:32], v[39:40], v[27:28], v[31:32]
	v_div_fixup_f64 v[27:28], v[37:38], v[27:28], -v[29:30]
	v_fma_f64 v[93:94], -v[85:86], v[65:66], 1.0
	v_div_fixup_f64 v[47:48], v[41:42], s[24:25], -v[21:22]
	v_add_f64 v[41:42], v[33:34], v[11:12]
	v_mul_f64 v[91:92], v[103:104], v[67:68]
	v_div_fixup_f64 v[55:56], v[51:52], s[26:27], -v[21:22]
	v_rcp_f64_e32 v[95:96], v[77:78]
	v_fma_f64 v[97:98], -v[43:44], v[71:72], 1.0
	v_div_fmas_f64 v[45:46], v[45:46], v[59:60], v[101:102]
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(TRANS32_DEP_2)
	v_fma_f64 v[59:60], -v[75:76], v[79:80], 1.0
	v_fma_f64 v[99:100], -v[73:74], v[81:82], 1.0
	v_rcp_f64_e32 v[101:102], v[63:64]
	s_mov_b32 vcc_lo, s3
	v_fma_f64 v[105:106], v[105:106], v[69:70], v[105:106]
	v_div_fmas_f64 v[61:62], v[89:90], v[61:62], v[109:110]
	v_div_fixup_f64 v[51:52], v[83:84], s[10:11], -v[21:22]
	v_fma_f64 v[87:88], v[107:108], v[87:88], v[107:108]
	v_div_scale_f64 v[69:70], null, s[10:11], s[10:11], -v[35:36]
	s_mov_b32 vcc_lo, s2
	v_div_scale_f64 v[134:135], s2, -v[33:34], s[24:25], -v[33:34]
	v_div_scale_f64 v[138:139], s3, -v[33:34], s[10:11], -v[33:34]
	v_fma_f64 v[109:110], v[65:66], v[93:94], v[65:66]
	v_mul_f64 v[83:84], v[47:48], s[34:35]
	v_div_scale_f64 v[65:66], null, s[24:25], s[24:25], -v[41:42]
	v_fma_f64 v[89:90], -v[57:58], v[91:92], v[103:104]
	v_mul_f64 v[103:104], v[55:56], s[34:35]
	s_delay_alu instid0(TRANS32_DEP_2)
	v_fma_f64 v[107:108], -v[77:78], v[95:96], 1.0
	v_fma_f64 v[111:112], v[71:72], v[97:98], v[71:72]
	v_div_fixup_f64 v[57:58], v[45:46], s[24:25], -s[30:31]
	v_fma_f64 v[45:46], v[79:80], v[59:60], v[79:80]
	v_fma_f64 v[79:80], v[81:82], v[99:100], v[81:82]
	v_div_scale_f64 v[71:72], null, s[10:11], s[10:11], -v[41:42]
	s_delay_alu instid0(TRANS32_DEP_1)
	v_fma_f64 v[81:82], -v[63:64], v[101:102], 1.0
	v_fma_f64 v[99:100], -v[53:54], v[105:106], 1.0
	v_div_fixup_f64 v[59:60], v[61:62], s[26:27], -s[30:31]
	v_mul_f64 v[61:62], v[51:52], s[34:35]
	v_fma_f64 v[113:114], -v[49:50], v[87:88], 1.0
	v_rndne_f64_e32 v[93:94], v[83:84]
	v_rcp_f64_e32 v[119:120], v[65:66]
	v_div_fmas_f64 v[83:84], v[89:90], v[67:68], v[91:92]
	v_rndne_f64_e32 v[97:98], v[103:104]
	v_rcp_f64_e32 v[89:90], v[69:70]
	v_fma_f64 v[91:92], v[95:96], v[107:108], v[95:96]
	v_fma_f64 v[95:96], -v[85:86], v[109:110], 1.0
	v_div_scale_f64 v[67:68], null, s[26:27], s[26:27], -v[41:42]
	v_fma_f64 v[103:104], -v[43:44], v[111:112], 1.0
	v_mul_f64 v[107:108], v[57:58], s[34:35]
	v_fma_f64 v[115:116], -v[75:76], v[45:46], 1.0
	v_fma_f64 v[117:118], -v[73:74], v[79:80], 1.0
	v_div_scale_f64 v[121:122], vcc_lo, -v[11:12], s[24:25], -v[11:12]
	v_fma_f64 v[101:102], v[101:102], v[81:82], v[101:102]
	v_fma_f64 v[99:100], v[105:106], v[99:100], v[105:106]
	v_mul_f64 v[81:82], v[59:60], s[34:35]
	v_rndne_f64_e32 v[105:106], v[61:62]
	v_fma_f64 v[113:114], v[87:88], v[113:114], v[87:88]
	v_rcp_f64_e32 v[140:141], v[71:72]
	v_fma_f64 v[123:124], v[93:94], s[36:37], v[47:48]
	v_div_fixup_f64 v[61:62], v[83:84], s[10:11], -s[30:31]
	v_fma_f64 v[83:84], v[97:98], s[36:37], v[55:56]
	v_fma_f64 v[132:133], -v[77:78], v[91:92], 1.0
	v_fma_f64 v[95:96], v[109:110], v[95:96], v[109:110]
	v_rcp_f64_e32 v[87:88], v[67:68]
	s_delay_alu instid0(TRANS32_DEP_3)
	v_fma_f64 v[109:110], -v[69:70], v[89:90], 1.0
	v_fma_f64 v[103:104], v[111:112], v[103:104], v[111:112]
	v_rndne_f64_e32 v[111:112], v[107:108]
	v_div_scale_f64 v[107:108], s4, -v[33:34], s[26:27], -v[33:34]
	v_fma_f64 v[136:137], v[45:46], v[115:116], v[45:46]
	v_fma_f64 v[117:118], v[79:80], v[117:118], v[79:80]
	v_fma_f64 v[45:46], -v[65:66], v[119:120], 1.0
	v_mul_f64 v[142:143], v[121:122], v[99:100]
	v_rndne_f64_e32 v[115:116], v[81:82]
	v_fma_f64 v[144:145], v[105:106], s[36:37], v[51:52]
	v_mul_f64 v[146:147], v[125:126], v[113:114]
	s_delay_alu instid0(TRANS32_DEP_2)
	v_fma_f64 v[160:161], -v[71:72], v[140:141], 1.0
	v_fma_f64 v[79:80], v[93:94], s[38:39], v[123:124]
	v_fma_f64 v[123:124], -v[63:64], v[101:102], 1.0
	v_mul_f64 v[148:149], v[61:62], s[34:35]
	v_fma_f64 v[81:82], v[97:98], s[38:39], v[83:84]
	v_fma_f64 v[91:92], v[91:92], v[132:133], v[91:92]
	v_mul_f64 v[132:133], v[130:131], v[95:96]
	v_fma_f64 v[89:90], v[89:90], v[109:110], v[89:90]
	v_mul_f64 v[109:110], v[134:135], v[103:104]
	s_delay_alu instid0(TRANS32_DEP_1)
	v_fma_f64 v[152:153], -v[67:68], v[87:88], 1.0
	v_fma_f64 v[154:155], v[111:112], s[36:37], v[57:58]
	v_mul_f64 v[156:157], v[107:108], v[136:137]
	v_mul_f64 v[158:159], v[138:139], v[117:118]
	v_fma_f64 v[162:163], v[119:120], v[45:46], v[119:120]
	v_fma_f64 v[121:122], -v[53:54], v[142:143], v[121:122]
	v_fma_f64 v[166:167], v[115:116], s[36:37], v[59:60]
	v_fma_f64 v[83:84], v[105:106], s[38:39], v[144:145]
	v_mul_f64 v[45:46], v[5:6], v[5:6]
	v_mul_f64 v[53:54], v[23:24], v[23:24]
	v_cvt_i32_f64_e32 v105, v[105:106]
	v_fma_f64 v[144:145], v[79:80], s[42:43], s[40:41]
	v_fma_f64 v[101:102], v[101:102], v[123:124], v[101:102]
	v_fma_f64 v[123:124], -v[49:50], v[146:147], v[125:126]
	v_rndne_f64_e32 v[119:120], v[148:149]
	v_fma_f64 v[125:126], v[81:82], s[42:43], s[40:41]
	v_mul_f64 v[49:50], v[17:18], v[17:18]
	v_fma_f64 v[130:131], -v[85:86], v[132:133], v[130:131]
	v_fma_f64 v[168:169], -v[69:70], v[89:90], 1.0
	v_fma_f64 v[134:135], -v[43:44], v[109:110], v[134:135]
	v_fma_f64 v[148:149], v[87:88], v[152:153], v[87:88]
	v_mul_f64 v[152:153], v[150:151], v[91:92]
	v_fma_f64 v[85:86], v[111:112], s[38:39], v[154:155]
	v_fma_f64 v[75:76], -v[75:76], v[156:157], v[107:108]
	v_mul_f64 v[43:44], v[9:10], v[9:10]
	v_fma_f64 v[73:74], -v[73:74], v[158:159], v[138:139]
	v_fma_f64 v[107:108], v[140:141], v[160:161], v[140:141]
	v_div_fmas_f64 v[99:100], v[121:122], v[99:100], v[142:143]
	v_fma_f64 v[87:88], v[115:116], s[38:39], v[166:167]
	v_fma_f64 v[121:122], v[83:84], s[42:43], s[40:41]
	s_mov_b32 vcc_lo, s6
	v_fma_f64 v[138:139], -v[65:66], v[162:163], 1.0
	v_fma_f64 v[154:155], v[53:54], s[52:53], s[46:47]
	v_fma_f64 v[140:141], v[79:80], v[144:145], s[44:45]
	v_mul_f64 v[142:143], v[164:165], v[101:102]
	v_div_fmas_f64 v[123:124], v[123:124], v[113:114], v[146:147]
	s_mov_b32 vcc_lo, s8
	v_fma_f64 v[125:126], v[81:82], v[125:126], s[44:45]
	v_fma_f64 v[113:114], v[119:120], s[36:37], v[61:62]
	v_div_scale_f64 v[144:145], s6, -v[35:36], s[10:11], -v[35:36]
	v_div_fmas_f64 v[130:131], v[130:131], v[95:96], v[132:133]
	s_mov_b32 vcc_lo, s2
	v_fma_f64 v[146:147], v[45:46], s[52:53], s[46:47]
	v_div_fmas_f64 v[103:104], v[134:135], v[103:104], v[109:110]
	s_mov_b32 vcc_lo, s4
	v_fma_f64 v[77:78], -v[77:78], v[152:153], v[150:151]
	v_fma_f64 v[150:151], v[89:90], v[168:169], v[89:90]
	v_fma_f64 v[132:133], v[85:86], s[42:43], s[40:41]
	v_div_fmas_f64 v[75:76], v[75:76], v[136:137], v[156:157]
	s_mov_b32 vcc_lo, s3
	v_fma_f64 v[109:110], v[43:44], s[52:53], s[46:47]
	v_fma_f64 v[134:135], v[49:50], s[52:53], s[46:47]
	s_mov_b32 s46, 0x7c89e6b0
	v_fma_f64 v[89:90], v[45:46], s[50:51], s[48:49]
	v_fma_f64 v[95:96], v[43:44], s[50:51], s[48:49]
	v_fma_f64 v[136:137], v[49:50], s[50:51], s[48:49]
	v_div_fmas_f64 v[73:74], v[73:74], v[117:118], v[158:159]
	v_fma_f64 v[117:118], -v[67:68], v[148:149], 1.0
	s_mov_b32 s47, 0x3efa0199
	v_fma_f64 v[156:157], v[53:54], s[50:51], s[48:49]
	v_fma_f64 v[158:159], v[87:88], s[42:43], s[40:41]
	v_fma_f64 v[121:122], v[83:84], v[121:122], s[44:45]
	s_mov_b32 vcc_lo, s7
	v_fma_f64 v[138:139], v[162:163], v[138:139], v[162:163]
	v_div_scale_f64 v[160:161], s2, -v[41:42], s[24:25], -v[41:42]
	s_mov_b32 s8, 0xa17f65f6
	s_mov_b32 s50, 0x796cde01
	s_mov_b32 s9, 0xbe927e4f
	s_mov_b32 s51, 0x3ec71de3
	v_fma_f64 v[140:141], v[79:80], v[140:141], s[46:47]
	v_fma_f64 v[63:64], -v[63:64], v[142:143], v[164:165]
	s_mov_b32 s48, 0x14761f6e
	s_mov_b32 s49, 0x3f2a01a0
	v_fma_f64 v[125:126], v[81:82], v[125:126], s[46:47]
	v_fma_f64 v[113:114], v[119:120], s[38:39], v[113:114]
	v_fma_f64 v[154:155], v[53:54], v[154:155], s[8:9]
	v_div_scale_f64 v[164:165], s3, -v[41:42], s[26:27], -v[41:42]
	s_mov_b32 s52, 0x1852b7b0
	v_fma_f64 v[146:147], v[45:46], v[146:147], s[8:9]
	s_mov_b32 s53, 0x3f56c16c
	v_cvt_i32_f64_e32 v106, v[119:120]
	v_div_fmas_f64 v[77:78], v[77:78], v[91:92], v[152:153]
	v_mul_f64 v[152:153], v[144:145], v[150:151]
	v_fma_f64 v[91:92], -v[71:72], v[107:108], 1.0
	v_fma_f64 v[132:133], v[85:86], v[132:133], s[44:45]
	s_mov_b32 vcc_lo, s5
	v_fma_f64 v[109:110], v[43:44], v[109:110], s[8:9]
	v_fma_f64 v[134:135], v[49:50], v[134:135], s[8:9]
	s_mov_b32 s8, 0x19f4ec90
	v_fma_f64 v[89:90], v[45:46], v[89:90], s[50:51]
	v_fma_f64 v[162:163], v[43:44], v[95:96], s[50:51]
	v_fma_f64 v[136:137], v[49:50], v[136:137], s[50:51]
	v_div_fixup_f64 v[95:96], v[99:100], s[24:25], -v[11:12]
	v_fma_f64 v[148:149], v[148:149], v[117:118], v[148:149]
	s_mov_b32 s9, 0x3efa01a0
	v_fma_f64 v[117:118], v[53:54], v[156:157], s[50:51]
	v_fma_f64 v[156:157], v[87:88], v[158:159], s[44:45]
	v_fma_f64 v[121:122], v[83:84], v[121:122], s[46:47]
	s_mov_b32 s50, 0x19e83e5c
	s_mov_b32 s51, 0xbf2a01a0
	v_div_fixup_f64 v[99:100], v[73:74], s[10:11], -v[33:34]
	v_cmp_nlt_f64_e64 s5, 0x40900000, v[59:60]
	v_fma_f64 v[140:141], v[79:80], v[140:141], s[48:49]
	v_div_fmas_f64 v[63:64], v[63:64], v[101:102], v[142:143]
	v_mul_f64 v[142:143], v[160:161], v[138:139]
	s_mov_b32 vcc_lo, s6
	v_fma_f64 v[125:126], v[81:82], v[125:126], s[48:49]
	v_fma_f64 v[101:102], v[113:114], s[42:43], s[40:41]
	v_fma_f64 v[154:155], v[53:54], v[154:155], s[8:9]
	s_mov_b32 s6, 0x16c16967
	s_mov_b32 s7, 0xbf56c16c
	v_fma_f64 v[69:70], -v[69:70], v[152:153], v[144:145]
	v_div_scale_f64 v[144:145], s4, -v[41:42], s[10:11], -v[41:42]
	v_fma_f64 v[158:159], v[107:108], v[91:92], v[107:108]
	v_div_fixup_f64 v[107:108], v[123:124], s[26:27], -v[11:12]
	v_fma_f64 v[123:124], v[85:86], v[132:133], s[46:47]
	v_fma_f64 v[132:133], v[45:46], v[146:147], s[8:9]
	v_fma_f64 v[146:147], v[45:46], v[89:90], s[50:51]
	v_fma_f64 v[162:163], v[43:44], v[162:163], s[50:51]
	v_fma_f64 v[109:110], v[43:44], v[109:110], s[8:9]
	v_fma_f64 v[134:135], v[49:50], v[134:135], s[8:9]
	v_fma_f64 v[136:137], v[49:50], v[136:137], s[50:51]
	v_mul_f64 v[166:167], v[164:165], v[148:149]
	v_fma_f64 v[168:169], v[53:54], v[117:118], s[50:51]
	v_fma_f64 v[156:157], v[87:88], v[156:157], s[46:47]
	v_fma_f64 v[121:122], v[83:84], v[121:122], s[48:49]
	v_div_fixup_f64 v[91:92], v[130:131], s[10:11], -v[11:12]
	v_div_fixup_f64 v[89:90], v[103:104], s[24:25], -v[33:34]
	v_div_fixup_f64 v[103:104], v[75:76], s[26:27], -v[33:34]
	v_mul_f64 v[75:76], v[95:96], s[34:35]
	s_mov_b32 s50, s56
	v_cmp_nlt_f64_e64 s9, 0x40900000, v[55:56]
	s_mov_b32 s51, 0xbfc55555
	v_fma_f64 v[140:141], v[79:80], v[140:141], s[52:53]
	v_fma_f64 v[160:161], -v[65:66], v[142:143], v[160:161]
	v_fma_f64 v[125:126], v[81:82], v[125:126], s[52:53]
	v_fma_f64 v[130:131], v[113:114], v[101:102], s[44:45]
	v_div_fixup_f64 v[101:102], v[77:78], s[24:25], -v[35:36]
	v_div_fmas_f64 v[117:118], v[69:70], v[150:151], v[152:153]
	s_mov_b32 vcc_lo, s2
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[47:48]
	v_mul_f64 v[150:151], v[144:145], v[158:159]
	v_mul_f64 v[152:153], v[107:108], s[34:35]
	v_fma_f64 v[123:124], v[85:86], v[123:124], s[48:49]
	v_fma_f64 v[132:133], v[45:46], v[132:133], s[6:7]
	v_fma_f64 v[69:70], v[45:46], v[146:147], s[54:55]
	v_fma_f64 v[65:66], v[43:44], v[162:163], s[54:55]
	v_fma_f64 v[146:147], v[43:44], v[109:110], s[6:7]
	v_fma_f64 v[134:135], v[49:50], v[134:135], s[6:7]
	v_fma_f64 v[73:74], v[49:50], v[136:137], s[54:55]
	v_fma_f64 v[136:137], v[53:54], v[154:155], s[6:7]
	v_fma_f64 v[77:78], v[53:54], v[168:169], s[54:55]
	s_mov_b32 s54, 0x11122322
	v_fma_f64 v[162:163], v[83:84], v[121:122], s[52:53]
	v_fma_f64 v[156:157], v[87:88], v[156:157], s[48:49]
	v_fma_f64 v[154:155], -v[67:68], v[166:167], v[164:165]
	v_mul_f64 v[168:169], v[99:100], s[34:35]
	v_rndne_f64_e32 v[164:165], v[75:76]
	v_div_fixup_f64 v[109:110], v[63:64], s[26:27], -v[35:36]
	v_cmp_ngt_f64_e64 s6, 0xc090cc00, v[59:60]
	v_cmp_nlt_f64_e64 s7, 0x40900000, v[107:108]
	v_cmp_ngt_f64_e64 s8, 0xc090cc00, v[107:108]
	v_fma_f64 v[140:141], v[79:80], v[140:141], s[54:55]
	v_div_fmas_f64 v[121:122], v[160:161], v[138:139], v[142:143]
	v_mul_f64 v[138:139], v[91:92], s[34:35]
	v_fma_f64 v[125:126], v[81:82], v[125:126], s[54:55]
	v_fma_f64 v[130:131], v[113:114], v[130:131], s[46:47]
	v_mul_f64 v[142:143], v[89:90], s[34:35]
	v_mul_f64 v[160:161], v[103:104], s[34:35]
	s_mov_b32 vcc_lo, s3
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[57:58]
	v_div_fixup_f64 v[117:118], v[117:118], s[10:11], -v[35:36]
	v_fma_f64 v[144:145], -v[71:72], v[150:151], v[144:145]
	v_rndne_f64_e32 v[152:153], v[152:153]
	v_fma_f64 v[170:171], v[85:86], v[123:124], s[52:53]
	v_fma_f64 v[67:68], v[45:46], v[132:133], s[56:57]
	v_mul_f64 v[132:133], v[101:102], s[34:35]
	v_fma_f64 v[63:64], v[43:44], v[146:147], s[56:57]
	v_fma_f64 v[71:72], v[49:50], v[134:135], s[56:57]
	v_fma_f64 v[75:76], v[53:54], v[136:137], s[56:57]
	s_mov_b32 s56, 0x555502a1
	v_fma_f64 v[134:135], v[83:84], v[162:163], s[54:55]
	v_fma_f64 v[136:137], v[87:88], v[156:157], s[52:53]
	v_div_fmas_f64 v[123:124], v[154:155], v[148:149], v[166:167]
	s_mov_b32 vcc_lo, s4
	v_fma_f64 v[156:157], v[164:165], s[36:37], v[95:96]
	v_cvt_i32_f64_e32 v163, v[111:112]
	v_cvt_i32_f64_e32 v162, v[93:94]
	v_cvt_i32_f64_e32 v166, v[115:116]
	v_cvt_i32_f64_e32 v93, v[164:165]
	v_fma_f64 v[140:141], v[79:80], v[140:141], s[56:57]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[57:58]
	v_div_fixup_f64 v[121:122], v[121:122], s[24:25], -v[41:42]
	v_rndne_f64_e32 v[138:139], v[138:139]
	v_fma_f64 v[148:149], v[81:82], v[125:126], s[56:57]
	v_fma_f64 v[146:147], v[113:114], v[130:131], s[48:49]
	v_rndne_f64_e32 v[142:143], v[142:143]
	v_rndne_f64_e32 v[154:155], v[160:161]
	v_mul_f64 v[160:161], v[109:110], s[34:35]
	v_cvt_i32_f64_e32 v130, v[97:98]
	v_div_fmas_f64 v[125:126], v[144:145], v[158:159], v[150:151]
	v_fma_f64 v[144:145], v[152:153], s[36:37], v[107:108]
	v_rndne_f64_e32 v[150:151], v[168:169]
	v_fma_f64 v[158:159], v[85:86], v[170:171], s[54:55]
	v_rndne_f64_e32 v[131:132], v[132:133]
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[47:48]
	v_fma_f64 v[97:98], v[83:84], v[134:135], s[56:57]
	v_fma_f64 v[111:112], v[87:88], v[136:137], s[54:55]
	v_div_fixup_f64 v[123:124], v[123:124], s[26:27], -v[41:42]
	v_fma_f64 v[133:134], v[79:80], v[140:141], s[60:61]
	v_fma_f64 v[135:136], v[138:139], s[36:37], v[91:92]
	v_fma_f64 v[140:141], v[81:82], v[148:149], s[60:61]
	v_fma_f64 v[115:116], v[113:114], v[146:147], s[52:53]
	v_fma_f64 v[119:120], v[142:143], s[36:37], v[89:90]
	v_fma_f64 v[146:147], v[164:165], s[38:39], v[156:157]
	v_fma_f64 v[148:149], v[154:155], s[36:37], v[103:104]
	v_cvt_i32_f64_e32 v164, v[152:153]
	v_cvt_i32_f64_e32 v94, v[138:139]
	v_div_fixup_f64 v[125:126], v[125:126], s[10:11], -v[41:42]
	v_fma_f64 v[144:145], v[152:153], s[38:39], v[144:145]
	v_fma_f64 v[152:153], v[150:151], s[36:37], v[99:100]
	v_fma_f64 v[156:157], v[85:86], v[158:159], s[56:57]
	v_rndne_f64_e32 v[158:159], v[160:161]
	v_cvt_i32_f64_e32 v165, v[150:151]
	v_cmp_ngt_f64_e64 s10, 0xc090cc00, v[55:56]
	v_cmp_nlt_f64_e64 s11, 0x40900000, v[95:96]
	v_fma_f64 v[160:161], v[83:84], v[97:98], s[60:61]
	v_fma_f64 v[111:112], v[87:88], v[111:112], s[56:57]
	v_cvt_i32_f64_e32 v97, v[142:143]
	v_cvt_i32_f64_e32 v98, v[154:155]
	v_fma_f64 v[133:134], v[79:80], v[133:134], s[58:59]
	v_fma_f64 v[135:136], v[138:139], s[38:39], v[135:136]
	v_fma_f64 v[140:141], v[81:82], v[140:141], s[58:59]
	v_fma_f64 v[115:116], v[113:114], v[115:116], s[54:55]
	v_fma_f64 v[119:120], v[142:143], s[38:39], v[119:120]
	v_fma_f64 v[142:143], v[131:132], s[36:37], v[101:102]
	v_fma_f64 v[137:138], v[154:155], s[38:39], v[148:149]
	v_fma_f64 v[148:149], v[150:151], s[38:39], v[152:153]
	v_fma_f64 v[150:151], v[85:86], v[156:157], s[60:61]
	v_fma_f64 v[152:153], v[158:159], s[36:37], v[109:110]
	v_fma_f64 v[154:155], v[83:84], v[160:161], s[58:59]
	v_fma_f64 v[111:112], v[87:88], v[111:112], s[60:61]
	v_cvt_i32_f64_e32 v160, v[131:132]
	v_cvt_i32_f64_e32 v161, v[158:159]
	v_fma_f64 v[133:134], v[79:80], v[133:134], 1.0
	v_fma_f64 v[139:140], v[81:82], v[140:141], 1.0
	v_fma_f64 v[115:116], v[113:114], v[115:116], s[56:57]
	v_fma_f64 v[141:142], v[131:132], s[38:39], v[142:143]
	v_fma_f64 v[131:132], v[85:86], v[150:151], s[58:59]
	v_fma_f64 v[150:151], v[158:159], s[38:39], v[152:153]
	v_fma_f64 v[152:153], v[146:147], s[42:43], s[40:41]
	v_add_f64 v[158:159], s[18:19], s[20:21]
	v_fma_f64 v[154:155], v[83:84], v[154:155], 1.0
	v_fma_f64 v[111:112], v[87:88], v[111:112], s[58:59]
	v_fma_f64 v[79:80], v[79:80], v[133:134], 1.0
	v_fma_f64 v[133:134], v[144:145], s[42:43], s[40:41]
	v_fma_f64 v[81:82], v[81:82], v[139:140], 1.0
	v_fma_f64 v[139:140], v[135:136], s[42:43], s[40:41]
	v_fma_f64 v[115:116], v[113:114], v[115:116], s[60:61]
	v_fma_f64 v[47:48], v[141:142], s[42:43], s[40:41]
	v_fma_f64 v[131:132], v[85:86], v[131:132], 1.0
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[44:45]
	v_add_f64 v[158:159], v[158:159], s[22:23]
	v_fma_f64 v[83:84], v[83:84], v[154:155], 1.0
	v_fma_f64 v[111:112], v[87:88], v[111:112], 1.0
	v_fma_f64 v[154:155], v[119:120], s[42:43], s[40:41]
	v_ldexp_f64 v[79:80], v[79:80], v162
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[44:45]
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[44:45]
	v_fma_f64 v[115:116], v[113:114], v[115:116], s[58:59]
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[44:45]
	v_fma_f64 v[85:86], v[85:86], v[131:132], 1.0
	v_fma_f64 v[131:132], v[137:138], s[42:43], s[40:41]
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[46:47]
	v_fma_f64 v[87:88], v[87:88], v[111:112], 1.0
	v_fma_f64 v[111:112], v[148:149], s[42:43], s[40:41]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[44:45]
	v_cndmask_b32_e32 v162, 0x7ff00000, v80, vcc_lo
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[46:47]
	v_ldexp_f64 v[80:81], v[81:82], v130
	v_ldexp_f64 v[82:83], v[83:84], v105
	s_and_b32 vcc_lo, s2, vcc_lo
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[46:47]
	v_fma_f64 v[115:116], v[113:114], v[115:116], 1.0
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[46:47]
	v_ldexp_f64 v[85:86], v[85:86], v163
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[44:45]
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[48:49]
	v_ldexp_f64 v[87:88], v[87:88], v166
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[44:45]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[46:47]
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[48:49]
	v_cndmask_b32_e64 v81, 0x7ff00000, v81, s9
	s_and_b32 s9, s10, s9
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[48:49]
	v_fma_f64 v[113:114], v[113:114], v[115:116], 1.0
	v_fma_f64 v[115:116], v[150:151], s[42:43], s[40:41]
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[48:49]
	v_cndmask_b32_e64 v80, 0, v80, s9
	v_cmp_nlt_f64_e64 s9, 0x40900000, v[61:62]
	v_cndmask_b32_e64 v81, 0, v81, s10
	v_cmp_ngt_f64_e64 s10, 0xc090cc00, v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mul_f64 v[80:81], s[20:21], v[80:81]
	v_cndmask_b32_e64 v163, 0x7ff00000, v86, s3
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[46:47]
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[52:53]
	v_cndmask_b32_e64 v62, 0, v163, s4
	v_cndmask_b32_e64 v86, 0x7ff00000, v88, s5
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[46:47]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[48:49]
	s_and_b32 s5, s6, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v87, 0, v87, s5
	v_cmp_nlt_f64_e64 s5, 0x40900000, v[51:52]
	v_cndmask_b32_e64 v88, 0, v86, s6
	v_cmp_ngt_f64_e64 s6, 0xc090cc00, v[51:52]
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[52:53]
	v_cndmask_b32_e64 v52, 0, v162, s2
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[91:92]
	v_mul_f64 v[86:87], s[20:21], v[87:88]
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[52:53]
	v_ldexp_f64 v[105:106], v[113:114], v106
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[44:45]
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[52:53]
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[48:49]
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[54:55]
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[48:49]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[52:53]
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[54:55]
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[54:55]
	v_cndmask_b32_e64 v106, 0x7ff00000, v106, s9
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[46:47]
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[54:55]
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[52:53]
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[56:57]
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[52:53]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[54:55]
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[56:57]
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[56:57]
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[48:49]
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[56:57]
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[54:55]
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[60:61]
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[54:55]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[56:57]
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[60:61]
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[60:61]
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[52:53]
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[60:61]
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[56:57]
	v_fma_f64 v[152:153], v[146:147], v[152:153], s[58:59]
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[56:57]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[60:61]
	v_fma_f64 v[133:134], v[144:145], v[133:134], s[58:59]
	v_fma_f64 v[139:140], v[135:136], v[139:140], s[58:59]
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[54:55]
	v_fma_f64 v[47:48], v[141:142], v[47:48], s[58:59]
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[60:61]
	v_fma_f64 v[152:153], v[146:147], v[152:153], 1.0
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[60:61]
	v_fma_f64 v[154:155], v[119:120], v[154:155], s[58:59]
	v_fma_f64 v[133:134], v[144:145], v[133:134], 1.0
	v_fma_f64 v[139:140], v[135:136], v[139:140], 1.0
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[56:57]
	v_fma_f64 v[47:48], v[141:142], v[47:48], 1.0
	v_fma_f64 v[131:132], v[137:138], v[131:132], s[58:59]
	v_fma_f64 v[146:147], v[146:147], v[152:153], 1.0
	v_mul_f64 v[152:153], v[123:124], s[34:35]
	v_fma_f64 v[111:112], v[148:149], v[111:112], s[58:59]
	v_fma_f64 v[154:155], v[119:120], v[154:155], 1.0
	v_fma_f64 v[133:134], v[144:145], v[133:134], 1.0
	v_mul_f64 v[143:144], v[117:118], s[34:35]
	v_fma_f64 v[135:136], v[135:136], v[139:140], 1.0
	v_mul_f64 v[139:140], v[121:122], s[34:35]
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[60:61]
	v_fma_f64 v[47:48], v[141:142], v[47:48], 1.0
	v_fma_f64 v[131:132], v[137:138], v[131:132], 1.0
	v_ldexp_f64 v[113:114], v[146:147], v93
	v_rndne_f64_e32 v[152:153], v[152:153]
	v_add_f64 v[145:146], s[12:13], s[14:15]
	v_cmp_nlt_f64_e64 s13, 0x40900000, v[103:104]
	v_cmp_ngt_f64_e64 s14, 0xc090cc00, v[103:104]
	v_cmp_ngt_f64_e64 s12, 0xc090cc00, v[95:96]
	v_cndmask_b32_e64 v95, 0, v106, s10
	v_fma_f64 v[111:112], v[148:149], v[111:112], 1.0
	v_fma_f64 v[119:120], v[119:120], v[154:155], 1.0
	v_mul_f64 v[154:155], v[125:126], s[34:35]
	v_ldexp_f64 v[133:134], v[133:134], v164
	v_rndne_f64_e32 v[143:144], v[143:144]
	v_ldexp_f64 v[93:94], v[135:136], v94
	v_rndne_f64_e32 v[139:140], v[139:140]
	v_fma_f64 v[115:116], v[150:151], v[115:116], s[58:59]
	v_cndmask_b32_e32 v51, 0, v79, vcc_lo
	s_and_b32 vcc_lo, s8, s7
	v_ldexp_f64 v[47:48], v[47:48], v160
	v_fma_f64 v[131:132], v[137:138], v[131:132], 1.0
	v_cndmask_b32_e64 v114, 0x7ff00000, v114, s11
	v_fma_f64 v[137:138], v[152:153], s[36:37], v[123:124]
	v_cvt_i32_f64_e32 v88, v[152:153]
	v_add_f64 v[145:146], v[145:146], s[16:17]
	v_fma_f64 v[111:112], v[148:149], v[111:112], 1.0
	v_rndne_f64_e32 v[154:155], v[154:155]
	v_cndmask_b32_e64 v84, 0x7ff00000, v134, s7
	v_fma_f64 v[148:149], v[143:144], s[36:37], v[117:118]
	v_cmp_nlt_f64_e64 s7, 0x40900000, v[109:110]
	v_fma_f64 v[156:157], v[139:140], s[36:37], v[121:122]
	v_fma_f64 v[115:116], v[150:151], v[115:116], 1.0
	v_cndmask_b32_e64 v84, 0, v84, s8
	v_cmp_ngt_f64_e64 s8, 0xc090cc00, v[109:110]
	v_ldexp_f64 v[130:131], v[131:132], v98
	v_ldexp_f64 v[97:98], v[119:120], v97
	v_fma_f64 v[137:138], v[152:153], s[38:39], v[137:138]
	v_cndmask_b32_e64 v119, 0x7ff00000, v83, s5
	v_cndmask_b32_e32 v83, 0, v133, vcc_lo
	s_and_b32 vcc_lo, s4, s3
	s_and_b32 s5, s6, s5
	v_cndmask_b32_e32 v61, 0, v85, vcc_lo
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[91:92]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[89:90]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[89:90]
	v_cvt_i32_f64_e32 v120, v[143:144]
	v_fma_f64 v[61:62], s[18:19], v[61:62], v[86:87]
	v_cndmask_b32_e64 v87, 0, v82, s5
	s_and_b32 s5, s14, s13
	v_ldexp_f64 v[85:86], v[111:112], v165
	v_mul_f64 v[83:84], s[20:21], v[83:84]
	v_cndmask_b32_e64 v91, 0, v114, s12
	v_fma_f64 v[21:22], v[21:22], v[145:146], -v[158:159]
	v_fma_f64 v[148:149], v[143:144], s[38:39], v[148:149]
	v_fma_f64 v[11:12], v[11:12], v[145:146], -v[158:159]
	v_fma_f64 v[33:34], v[33:34], v[145:146], -v[158:159]
	v_fma_f64 v[35:36], v[35:36], v[145:146], -v[158:159]
	v_fma_f64 v[156:157], v[139:140], s[38:39], v[156:157]
	v_fma_f64 v[115:116], v[150:151], v[115:116], 1.0
	v_fma_f64 v[150:151], v[154:155], s[36:37], v[125:126]
	v_fma_f64 v[41:42], v[41:42], v[145:146], -v[158:159]
	v_cndmask_b32_e64 v103, 0, v130, s5
	s_and_b32 s5, s12, s11
	v_fma_f64 v[57:58], v[137:138], s[42:43], s[40:41]
	v_cndmask_b32_e64 v90, 0, v113, s5
	s_and_b32 s5, s10, s9
	v_cndmask_b32_e64 v96, 0x7ff00000, v131, s13
	v_cvt_i32_f64_e32 v131, v[139:140]
	v_cmp_nlt_f64_e64 s9, 0x40900000, v[101:102]
	v_cndmask_b32_e32 v106, 0x7ff00000, v94, vcc_lo
	v_cndmask_b32_e64 v94, 0, v105, s5
	v_cmp_nlt_f64_e64 s5, 0x40900000, v[99:100]
	s_and_b32 vcc_lo, s2, vcc_lo
	v_cndmask_b32_e64 v104, 0, v96, s14
	v_cndmask_b32_e64 v92, 0x7ff00000, v98, s3
	v_fma_f64 v[61:62], s[22:23], v[94:95], v[61:62]
	v_cmp_nlt_f64_e64 s11, 0x40900000, v[123:124]
	v_cmp_ngt_f64_e64 s10, 0xc090cc00, v[101:102]
	v_mul_f64 v[103:104], s[20:21], v[103:104]
	s_and_b32 s3, s4, s3
	v_fma_f64 v[59:60], v[148:149], s[42:43], s[40:41]
	v_cmp_ngt_f64_e64 s12, 0xc090cc00, v[123:124]
	v_fma_f64 v[83:84], s[18:19], v[90:91], v[83:84]
	v_cndmask_b32_e64 v89, 0, v92, s4
	v_fma_f64 v[107:108], v[156:157], s[42:43], s[40:41]
	v_ldexp_f64 v[115:116], v[115:116], v161
	v_fma_f64 v[150:151], v[154:155], s[38:39], v[150:151]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[121:122]
	v_cvt_i32_f64_e32 v94, v[154:155]
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[44:45]
	v_cndmask_b32_e64 v92, 0x7ff00000, v48, s9
	v_cndmask_b32_e64 v95, 0x7ff00000, v86, s5
	v_cndmask_b32_e32 v86, 0, v93, vcc_lo
	v_fma_f64 v[51:52], s[18:19], v[51:52], v[80:81]
	v_fma_f64 v[81:82], v[145:146], s[30:31], -v[158:159]
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[117:118]
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[44:45]
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[44:45]
	v_cndmask_b32_e64 v96, 0x7ff00000, v116, s7
	v_fma_f64 v[55:56], v[150:151], s[42:43], s[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v91, 0, v96, s8
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[46:47]
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[46:47]
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[46:47]
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[44:45]
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[48:49]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[48:49]
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[48:49]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[46:47]
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[52:53]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[52:53]
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[52:53]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[48:49]
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[54:55]
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[52:53]
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[56:57]
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[54:55]
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[60:61]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[60:61]
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[60:61]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[56:57]
	v_fma_f64 v[57:58], v[137:138], v[57:58], s[58:59]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], s[58:59]
	v_fma_f64 v[107:108], v[156:157], v[107:108], s[58:59]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[60:61]
	v_fma_f64 v[57:58], v[137:138], v[57:58], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], 1.0
	v_fma_f64 v[107:108], v[156:157], v[107:108], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[55:56], v[150:151], v[55:56], s[58:59]
	v_fma_f64 v[57:58], v[137:138], v[57:58], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], v[148:149], v[59:60], 1.0
	v_fma_f64 v[79:80], v[156:157], v[107:108], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[55:56], v[150:151], v[55:56], 1.0
	v_ldexp_f64 v[57:58], v[57:58], v88
	v_cndmask_b32_e64 v88, 0, v119, s6
	v_cmp_ngt_f64_e64 s6, 0xc090cc00, v[99:100]
	v_mul_f64 v[99:100], v[53:54], v[53:54]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[51:52], s[22:23], v[87:88], v[51:52]
	v_cndmask_b32_e64 v88, 0, v97, s3
	s_and_b32 s3, s8, s7
	s_and_b32 s7, s10, s9
	v_cndmask_b32_e64 v90, 0, v115, s3
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[121:122]
	v_fma_f64 v[88:89], s[18:19], v[88:89], v[103:104]
	v_cndmask_b32_e64 v87, 0, v106, s2
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[117:118]
	v_mul_f64 v[90:91], s[20:21], v[90:91]
	v_ldexp_f64 v[59:60], v[59:60], v120
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[83:84], s[22:23], v[86:87], v[83:84]
	v_ldexp_f64 v[79:80], v[79:80], v131
	v_fma_f64 v[55:56], v[150:151], v[55:56], 1.0
	v_cndmask_b32_e64 v58, 0x7ff00000, v58, s11
	s_and_b32 s5, s6, s5
	v_cndmask_b32_e64 v48, 0, v95, s6
	v_cmp_ngt_f64_e64 s6, 0xc090cc00, v[125:126]
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v58, 0, v58, s12
	v_add_f64 v[21:22], v[21:22], v[51:52]
	v_add_f64 v[51:52], v[81:82], v[61:62]
	v_cndmask_b32_e64 v61, 0, v92, s10
	v_mul_f64 v[81:82], v[25:26], 0.5
	v_mul_f64 v[95:96], v[5:6], -v[45:46]
	v_cndmask_b32_e32 v62, 0x7ff00000, v60, vcc_lo
	v_cndmask_b32_e64 v60, 0, v47, s7
	s_and_b32 s7, s12, s11
	v_cndmask_b32_e64 v47, 0, v85, s5
	v_cndmask_b32_e64 v80, 0x7ff00000, v80, s3
	v_cndmask_b32_e64 v57, 0, v57, s7
	s_and_b32 s3, s4, s3
	v_add_f64 v[11:12], v[11:12], v[83:84]
	v_fma_f64 v[47:48], s[22:23], v[47:48], v[88:89]
	v_ldexp_f64 v[55:56], v[55:56], v94
	v_mul_f64 v[39:40], s[20:21], v[57:58]
	v_fma_f64 v[57:58], s[18:19], v[60:61], v[90:91]
	v_cndmask_b32_e64 v61, 0, v80, s4
	v_cndmask_b32_e64 v60, 0, v79, s3
	v_mul_f64 v[79:80], v[31:32], s[34:35]
	v_cmp_nlt_f64_e64 s5, 0x40900000, v[125:126]
	s_and_b32 vcc_lo, s2, vcc_lo
	v_cmp_ngt_f64_e64 s3, 0xc090cc00, v[31:32]
	v_mul_f64 v[83:84], v[23:24], -v[53:54]
	v_mul_f64 v[89:90], v[43:44], 0.5
	v_mul_f64 v[93:94], v[7:8], 0.5
	v_add_f64 v[21:22], -v[21:22], -v[51:52]
	v_cndmask_b32_e64 v52, 0, v62, s2
	v_cndmask_b32_e32 v51, 0, v59, vcc_lo
	v_cmp_nlt_f64_e64 s2, 0x40900000, v[31:32]
	v_add_f64 v[33:34], v[33:34], v[47:48]
	v_fma_f64 v[39:40], s[18:19], v[60:61], v[39:40]
	v_mul_f64 v[59:60], v[49:50], 0.5
	v_mul_f64 v[61:62], v[45:46], 0.5
	v_rndne_f64_e32 v[47:48], v[79:80]
	v_cndmask_b32_e64 v56, 0x7ff00000, v56, s5
	s_and_b32 vcc_lo, s6, s5
	v_fma_f64 v[77:78], v[83:84], v[77:78], v[81:82]
	v_mul_f64 v[81:82], v[17:18], -v[49:50]
	v_fma_f64 v[69:70], v[95:96], v[69:70], v[93:94]
	v_add_f64 v[11:12], v[21:22], -v[11:12]
	v_cndmask_b32_e64 v22, 0, v56, s6
	v_add_f64 v[85:86], -v[59:60], 1.0
	v_add_f64 v[87:88], -v[61:62], 1.0
	v_fma_f64 v[29:30], v[47:48], s[36:37], v[31:32]
	v_lshlrev_b32_e32 v32, 30, v128
	v_fma_f64 v[51:52], s[22:23], v[51:52], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v21, 0, v55 :: v_dual_and_b32 v32, 0x80000000, v32
	v_fma_f64 v[69:70], v[45:46], v[69:70], -v[7:8]
	v_fma_f64 v[21:22], s[22:23], v[21:22], v[39:40]
	v_mul_f64 v[45:46], v[45:46], v[45:46]
	v_add_f64 v[11:12], v[33:34], v[11:12]
	v_mul_f64 v[33:34], v[27:28], s[34:35]
	v_add_f64 v[91:92], -v[85:86], 1.0
	v_add_f64 v[97:98], -v[87:88], 1.0
	v_fma_f64 v[29:30], v[47:48], s[38:39], v[29:30]
	v_add_f64 v[35:36], v[35:36], v[51:52]
	v_mul_f64 v[51:52], v[53:54], 0.5
	v_add_f64 v[21:22], v[41:42], v[21:22]
	v_add_f64 v[59:60], v[91:92], -v[59:60]
	v_add_f64 v[61:62], v[97:98], -v[61:62]
	v_add_f64 v[11:12], v[35:36], v[11:12]
	v_add_f64 v[57:58], -v[51:52], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[7:8], v[5:6], -v[7:8], v[61:62]
	v_add_f64 v[11:12], v[11:12], -v[21:22]
	v_rndne_f64_e32 v[21:22], v[33:34]
	v_fma_f64 v[33:34], v[29:30], s[42:43], s[40:41]
	v_add_f64 v[79:80], -v[57:58], 1.0
	v_fma_f64 v[7:8], v[45:46], v[67:68], v[7:8]
	v_mul_f64 v[35:36], v[11:12], s[34:35]
	v_fma_f64 v[37:38], v[21:22], s[36:37], v[27:28]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[44:45]
	v_add_f64 v[51:52], v[79:80], -v[51:52]
	v_mul_f64 v[79:80], v[19:20], 0.5
	v_add_f64 v[7:8], v[87:88], v[7:8]
	v_rndne_f64_e32 v[35:36], v[35:36]
	v_fma_f64 v[37:38], v[21:22], s[38:39], v[37:38]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[46:47]
	v_fma_f64 v[51:52], v[23:24], -v[25:26], v[51:52]
	v_fma_f64 v[25:26], v[53:54], v[77:78], -v[25:26]
	v_fma_f64 v[39:40], v[35:36], s[36:37], v[11:12]
	v_fma_f64 v[41:42], v[37:38], s[42:43], s[40:41]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[48:49]
	v_fma_f64 v[51:52], v[99:100], v[75:76], v[51:52]
	v_fma_f64 v[25:26], v[83:84], s[50:51], v[25:26]
	v_mul_f64 v[75:76], v[13:14], 0.5
	v_fma_f64 v[39:40], v[35:36], s[38:39], v[39:40]
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[44:45]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[52:53]
	v_add_f64 v[51:52], v[57:58], v[51:52]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	v_cvt_i32_f64_e32 v57, v[47:48]
	v_fma_f64 v[55:56], v[39:40], s[42:43], s[40:41]
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[46:47]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[55:56], v[39:40], v[55:56], s[44:45]
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[56:57]
	v_fma_f64 v[55:56], v[39:40], v[55:56], s[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[52:53]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[55:56], v[39:40], v[55:56], s[48:49]
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[58:59]
	v_fma_f64 v[53:54], v[39:40], v[55:56], s[52:53]
	v_fma_f64 v[55:56], v[81:82], v[73:74], v[79:80]
	v_add_f64 v[73:74], -v[89:90], 1.0
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[33:34], v[29:30], v[33:34], 1.0
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[56:57]
	v_fma_f64 v[53:54], v[39:40], v[53:54], s[54:55]
	v_fma_f64 v[55:56], v[49:50], v[55:56], -v[19:20]
	v_add_f64 v[77:78], -v[73:74], 1.0
	v_mul_f64 v[49:50], v[49:50], v[49:50]
	v_fma_f64 v[19:20], v[17:18], -v[19:20], v[59:60]
	v_mul_f64 v[59:60], v[9:10], -v[43:44]
	v_fma_f64 v[29:30], v[29:30], v[33:34], 1.0
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[60:61]
	v_fma_f64 v[25:26], v[39:40], v[53:54], s[56:57]
	v_fma_f64 v[33:34], v[81:82], s[50:51], v[55:56]
	v_add_f64 v[47:48], v[77:78], -v[89:90]
	v_fma_f64 v[53:54], v[95:96], s[50:51], v[69:70]
	v_fma_f64 v[19:20], v[49:50], v[71:72], v[19:20]
	v_fma_f64 v[49:50], v[59:60], v[65:66], v[75:76]
	v_and_b32_e32 v55, 1, v129
	v_ldexp_f64 v[29:30], v[29:30], v57
	v_fma_f64 v[41:42], v[37:38], v[41:42], s[58:59]
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v55
	v_dual_cndmask_b32 v45, v52, v24 :: v_dual_cndmask_b32 v46, v51, v23
	v_cmp_class_f64_e64 vcc_lo, v[15:16], 0x1f8
	v_lshlrev_b32_e32 v15, 30, v129
	v_fma_f64 v[23:24], v[39:40], v[25:26], s[60:61]
	v_add_f64 v[17:18], v[17:18], -v[33:34]
	v_fma_f64 v[33:34], v[9:10], -v[13:14], v[47:48]
	s_delay_alu instid0(VALU_DEP_4)
	v_xor_b32_e32 v47, v15, v16
	v_add_f64 v[15:16], v[85:86], v[19:20]
	v_add_f64 v[5:6], v[5:6], -v[53:54]
	v_mul_f64 v[25:26], v[43:44], v[43:44]
	v_fma_f64 v[13:14], v[43:44], v[49:50], -v[13:14]
	v_and_b32_e32 v19, 0x80000000, v47
	v_cndmask_b32_e64 v44, 0x7ff00000, v30, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v43, v45, v19
	v_and_b32_e32 v45, 1, v0
	v_lshlrev_b32_e32 v0, 30, v0
	v_fma_f64 v[19:20], v[37:38], v[41:42], 1.0
	v_cndmask_b32_e32 v31, 0x7ff80000, v43, vcc_lo
	v_and_b32_e32 v43, 1, v128
	v_cmp_eq_u32_e64 s5, 0, v45
	v_cndmask_b32_e32 v30, 0, v46, vcc_lo
	v_and_b32_e32 v0, 0x80000000, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e64 s4, 0, v43
	v_mul_f64 v[41:42], v[30:31], 0
	v_fma_f64 v[23:24], v[39:40], v[23:24], s[58:59]
	v_xor_b32_e32 v18, 0x80000000, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v15, v17, v15, s4
	v_xor_b32_e32 v6, 0x80000000, v6
	v_cndmask_b32_e64 v16, v18, v16, s4
	v_fma_f64 v[25:26], v[25:26], v[63:64], v[33:34]
	v_cndmask_b32_e64 v33, v5, v7, s5
	v_cndmask_b32_e32 v5, 0, v15, vcc_lo
	v_fma_f64 v[13:14], v[59:60], s[50:51], v[13:14]
	v_xor_b32_e32 v16, v16, v32
	v_cndmask_b32_e64 v32, v6, v8, s5
	v_cvt_i32_f64_e32 v34, v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v6, 0x7ff80000, v16, vcc_lo
	s_and_b32 vcc_lo, s3, s2
	v_xor_b32_e32 v0, v32, v0
	v_cndmask_b32_e32 v15, 0, v29, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[3:4], 0x1f8
	v_cndmask_b32_e64 v16, 0, v44, s3
	v_fma_f64 v[7:8], v[37:38], v[19:20], 1.0
	v_and_b32_e32 v3, 1, v127
	v_cmp_ngt_f64_e64 s3, 0xc090cc00, v[27:28]
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_eq_u32_e64 s2, 0, v3
	v_fma_f64 v[17:18], v[39:40], v[23:24], 1.0
	v_cvt_i32_f64_e32 v23, v[35:36]
	v_add_f64 v[21:22], v[73:74], v[25:26]
	v_add_f64 v[9:10], v[9:10], -v[13:14]
	v_cndmask_b32_e32 v14, 0x7ff80000, v0, vcc_lo
	v_dual_cndmask_b32 v13, 0, v33 :: v_dual_lshlrev_b32 v0, 30, v127
	v_ldexp_f64 v[7:8], v[7:8], v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v4
	v_and_b32_e32 v0, 0x80000000, v0
	v_mul_f64 v[19:20], v[15:16], v[30:31]
	v_fma_f64 v[15:16], v[15:16], v[5:6], -v[41:42]
	v_fma_f64 v[17:18], v[39:40], v[17:18], 1.0
	v_cndmask_b32_e64 v3, v22, v10, s2
	v_cndmask_b32_e64 v4, v21, v9, s2
	v_cmp_nlt_f64_e64 s2, 0x40900000, v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v0, v3, v0
	v_cndmask_b32_e32 v3, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v4, 0x7ff80000, v0, vcc_lo
	v_fma_f64 v[5:6], v[5:6], 0, v[19:20]
	v_add_f64 v[13:14], v[13:14], -v[15:16]
	s_and_b32 vcc_lo, s3, s2
	v_cndmask_b32_e64 v10, 0x7ff00000, v8, s2
	v_ldexp_f64 v[8:9], v[17:18], v23
	v_cndmask_b32_e32 v15, 0, v7, vcc_lo
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[11:12]
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[11:12]
	v_cndmask_b32_e64 v16, 0, v10, s3
	v_add_f64 v[3:4], v[3:4], -v[5:6]
	v_mul_f64 v[5:6], v[13:14], 0
	v_cndmask_b32_e32 v0, 0x7ff00000, v9, vcc_lo
	s_and_b32 vcc_lo, s2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[9:10], v[3:4], 0
	v_fma_f64 v[3:4], v[15:16], v[3:4], v[5:6]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v6, 0, v0, s2
	v_cndmask_b32_e32 v5, 0, v8, vcc_lo
	v_fma_f64 v[7:8], v[15:16], v[13:14], -v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[9:10], v[3:4], 0
	v_mul_f64 v[11:12], v[3:4], v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[3:4], v[7:8], v[5:6], -v[9:10]
	v_fma_f64 v[5:6], v[7:8], 0, v[11:12]
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[7:8], null, v2, s0, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[0:1], 4, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s28, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s29, v1, vcc_lo
	global_store_b128 v[0:1], v[3:6], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 172
		.amdhsa_next_free_sgpr 62
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd, .Lfunc_end4-_Z18kernelNonRephasingP15HIP_vector_typeIdLj2EEddiPd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 11756
; NumSgprs: 64
; NumVgprs: 172
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 7
; VGPRBlocks: 21
; NumSGPRsForWavesPerEU: 64
; NumVGPRsForWavesPerEU: 172
; Occupancy: 8
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16kernelHalfFirstXP15HIP_vector_typeIdLj2EE.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
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  - 2
...

	.end_amdgpu_metadata
