
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <stdio.h>
#include <memory.h>
#include <stdlib.h>

// these numbers can not be larger, it is not because of GPU global memory size limit(for example:flag size),
// maybe it is limits by other level memory size.
const unsigned int blockNum = 1024;
const unsigned int threadNum = 1024;

__global__ void isDivisible(unsigned long value, unsigned long start, unsigned char *flag)
{
	//int threadid = threadIdx.x + blockNum * blockIdx.x;
	int threadid = blockDim.x * blockIdx.x + threadIdx.x;
	if ((value % (start + threadid)) == 0)
	{
		flag[threadid] = 1;
	}
}

int checkPrimary(unsigned long value)
{
	cudaError_t cudaStatus;
	unsigned char * dev_flag;
	unsigned char * host_flag;
	
	const  int size =  blockNum * threadNum;

	host_flag = (unsigned char*)malloc(size * sizeof(unsigned char));
	if (host_flag == NULL)
	{
		fprintf(stderr, "malloc failed!");
		return -1;
	}

	// Choose which GPU to run on, change this on a multi-GPU system.
	cudaStatus = cudaSetDevice(0);
	if (cudaStatus != cudaSuccess) {
		fprintf(stderr, "cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?");
		goto Error;
	}
	// Allocate GPU buffers for three vectors (two input, one output)    .
	cudaStatus = cudaMalloc((void**)&dev_flag, size * sizeof(unsigned char));
	if (cudaStatus != cudaSuccess) {
		fprintf(stderr, "cudaMalloc failed!");
		goto Error;
	}

	for (;; value++)
	{
		cudaMemset(dev_flag, 0, size * sizeof(unsigned char));
		if (cudaStatus != cudaSuccess) {
			fprintf(stderr, "cudaMemset failed!");
			goto Error;
		}
		bool isPrimary = true;
		for (unsigned long i = 2; i <= (value / 2); i += size)
		{
			isDivisible <<<blockNum, threadNum >>> (value, i, dev_flag);
			// Check for any errors launching the kernel
			cudaStatus = cudaGetLastError();
			if (cudaStatus != cudaSuccess) {
				fprintf(stderr, "isDivisible launch failed: %s\n", cudaGetErrorString(cudaStatus));
				goto Error;
			}
			// cudaDeviceSynchronize waits for the kernel to finish, and returns
			// any errors encountered during the launch.
			cudaStatus = cudaDeviceSynchronize();
			if (cudaStatus != cudaSuccess) {
				fprintf(stderr, "cudaDeviceSynchronize returned error code %d after launching isDivisible:%s!\n", cudaStatus, cudaGetErrorString(cudaStatus));
				goto Error;
			}

			// Copy output vector from GPU buffer to host memory.
			cudaStatus = cudaMemcpy(host_flag, dev_flag, size * sizeof(unsigned char), cudaMemcpyDeviceToHost);
			if (cudaStatus != cudaSuccess) {
				fprintf(stderr, "cudaMemcpy failed!");
				goto Error;
			}
			
			for (int j = 0; j < size; ++j)
			{
				if (host_flag[j])
				{
					isPrimary = false;
					//printf("[%llu] [%llu]\n",value, i + j);
					break;
				}
			}
			if (isPrimary == false)
			{
				break;
			}

		}
		if (isPrimary)
		{
			printf("%llu is a primary number\n", value);
		}

	}
	


Error:

	cudaFree(dev_flag);
	free(host_flag);
	// cudaDeviceReset must be called before exiting in order for profiling and
	// tracing tools such as Nsight and Visual Profiler to show complete traces.
	cudaStatus = cudaDeviceReset();
	if (cudaStatus != cudaSuccess) {
		fprintf(stderr, "cudaDeviceReset failed!");
		return -1;
	}
	return 0;

}

	.file	"tmpxft_00316761_00000000-6_PrimaryNumber.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z33__device_stub__Z11isDivisiblemmPhmmPh
	.type	_Z33__device_stub__Z11isDivisiblemmPhmmPh, @function
_Z33__device_stub__Z11isDivisiblemmPhmmPh:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11isDivisiblemmPh(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z33__device_stub__Z11isDivisiblemmPhmmPh, .-_Z33__device_stub__Z11isDivisiblemmPhmmPh
	.globl	_Z11isDivisiblemmPh
	.type	_Z11isDivisiblemmPh, @function
_Z11isDivisiblemmPh:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z11isDivisiblemmPhmmPh
	.cfi_endproc
.LFE2053:
	.size	_Z11isDivisiblemmPh, .-_Z11isDivisiblemmPh
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"malloc failed!"
.LC1:
	.string	"cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?"
.LC2:
	.string	"cudaMalloc failed!"
.LC3:
	.string	"isDivisible launch failed: %s\n"
.LC4:
	.string	"cudaDeviceSynchronize returned error code %d after launching isDivisible:%s!\n"
.LC5:
	.string	"cudaMemcpy failed!"
.LC6:
	.string	"cudaDeviceReset failed!"
.LC7:
	.string	"%llu is a primary number\n"
	.text
	.globl	_Z12checkPrimarym
	.type	_Z12checkPrimarym, @function
_Z12checkPrimarym:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	movl	$1048576, %edi
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	testq	%rax, %rax
	jne	.L9
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	jmp	.L33
.L9:
	xorl	%edi, %edi
	movq	%rax, %rbp
	call	cudaSetDevice@PLT
	leaq	.LC1(%rip), %rdx
	testl	%eax, %eax
	jne	.L32
	leaq	8(%rsp), %rdi
	movl	$1048576, %esi
	movabsq	$4294968320, %r14
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L13
	leaq	.LC2(%rip), %rdx
.L32:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L12
.L24:
	xorl	%eax, %eax
.L18:
	cmpb	$0, 0(%rbp,%rax)
	je	.L34
.L19:
	incq	%rbx
.L13:
	movq	8(%rsp), %rdi
	movl	$1048576, %edx
	xorl	%esi, %esi
	movq	%rbx, %r15
	shrq	%r15
	movl	$2, %r13d
	call	cudaMemset@PLT
.L14:
	cmpq	%r13, %r15
	jb	.L35
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, %rdx
	movl	$1, %ecx
	movq	%r14, %rdi
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	8(%rsp), %rdx
	movq	%r13, %rsi
	movq	%rbx, %rdi
	call	_Z33__device_stub__Z11isDivisiblemmPhmmPh
.L15:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L16
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L12
.L16:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L17
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	%r12d, %ecx
	leaq	.LC4(%rip), %rdx
	movq	%rax, %r8
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L12
.L17:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$1048576, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L24
	leaq	.LC5(%rip), %rdx
	jmp	.L32
.L34:
	incq	%rax
	cmpq	$1048576, %rax
	jne	.L18
	addq	$1048576, %r13
	jmp	.L14
.L12:
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	call	cudaDeviceReset@PLT
	movl	%eax, %edx
	xorl	%eax, %eax
	testl	%edx, %edx
	je	.L8
	movq	stderr(%rip), %rdi
	leaq	.LC6(%rip), %rdx
	movl	$2, %esi
.L33:
	call	__fprintf_chk@PLT
	orl	$-1, %eax
	jmp	.L8
.L35:
	movq	%rbx, %rdx
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L19
.L8:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z12checkPrimarym, .-_Z12checkPrimarym
	.section	.rodata.str1.1
.LC8:
	.string	"_Z11isDivisiblemmPh"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z11isDivisiblemmPh(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include "hip/hip_runtime.h"


#include <stdio.h>
#include <memory.h>
#include <stdlib.h>

// these numbers can not be larger, it is not because of GPU global memory size limit(for example:flag size),
// maybe it is limits by other level memory size.
const unsigned int blockNum = 1024;
const unsigned int threadNum = 1024;

__global__ void isDivisible(unsigned long value, unsigned long start, unsigned char *flag)
{
	//int threadid = threadIdx.x + blockNum * blockIdx.x;
	int threadid = blockDim.x * blockIdx.x + threadIdx.x;
	if ((value % (start + threadid)) == 0)
	{
		flag[threadid] = 1;
	}
}

int checkPrimary(unsigned long value)
{
	hipError_t cudaStatus;
	unsigned char * dev_flag;
	unsigned char * host_flag;
	
	const  int size =  blockNum * threadNum;

	host_flag = (unsigned char*)malloc(size * sizeof(unsigned char));
	if (host_flag == NULL)
	{
		fprintf(stderr, "malloc failed!");
		return -1;
	}

	// Choose which GPU to run on, change this on a multi-GPU system.
	cudaStatus = hipSetDevice(0);
	if (cudaStatus != hipSuccess) {
		fprintf(stderr, "hipSetDevice failed!  Do you have a CUDA-capable GPU installed?");
		goto Error;
	}
	// Allocate GPU buffers for three vectors (two input, one output)    .
	cudaStatus = hipMalloc((void**)&dev_flag, size * sizeof(unsigned char));
	if (cudaStatus != hipSuccess) {
		fprintf(stderr, "hipMalloc failed!");
		goto Error;
	}

	for (;; value++)
	{
		hipMemset(dev_flag, 0, size * sizeof(unsigned char));
		if (cudaStatus != hipSuccess) {
			fprintf(stderr, "hipMemset failed!");
			goto Error;
		}
		bool isPrimary = true;
		for (unsigned long i = 2; i <= (value / 2); i += size)
		{
			isDivisible <<<blockNum, threadNum >>> (value, i, dev_flag);
			// Check for any errors launching the kernel
			cudaStatus = hipGetLastError();
			if (cudaStatus != hipSuccess) {
				fprintf(stderr, "isDivisible launch failed: %s\n", hipGetErrorString(cudaStatus));
				goto Error;
			}
			// cudaDeviceSynchronize waits for the kernel to finish, and returns
			// any errors encountered during the launch.
			cudaStatus = hipDeviceSynchronize();
			if (cudaStatus != hipSuccess) {
				fprintf(stderr, "hipDeviceSynchronize returned error code %d after launching isDivisible:%s!\n", cudaStatus, hipGetErrorString(cudaStatus));
				goto Error;
			}

			// Copy output vector from GPU buffer to host memory.
			cudaStatus = hipMemcpy(host_flag, dev_flag, size * sizeof(unsigned char), hipMemcpyDeviceToHost);
			if (cudaStatus != hipSuccess) {
				fprintf(stderr, "hipMemcpy failed!");
				goto Error;
			}
			
			for (int j = 0; j < size; ++j)
			{
				if (host_flag[j])
				{
					isPrimary = false;
					//printf("[%llu] [%llu]\n",value, i + j);
					break;
				}
			}
			if (isPrimary == false)
			{
				break;
			}

		}
		if (isPrimary)
		{
			printf("%llu is a primary number\n", value);
		}

	}
	


Error:

	hipFree(dev_flag);
	free(host_flag);
	// cudaDeviceReset must be called before exiting in order for profiling and
	// tracing tools such as Nsight and Visual Profiler to show complete traces.
	cudaStatus = hipDeviceReset();
	if (cudaStatus != hipSuccess) {
		fprintf(stderr, "hipDeviceReset failed!");
		return -1;
	}
	return 0;

}

	.text
	.file	"PrimaryNumber.hip"
	.globl	_Z26__device_stub__isDivisiblemmPh # -- Begin function _Z26__device_stub__isDivisiblemmPh
	.type	_Z26__device_stub__isDivisiblemmPh,@function
_Z26__device_stub__isDivisiblemmPh:     # @_Z26__device_stub__isDivisiblemmPh
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11isDivisiblemmPh, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__isDivisiblemmPh, .Lfunc_end0-_Z26__device_stub__isDivisiblemmPh
	.cfi_endproc
                                        # -- End function
	.globl	_Z12checkPrimarym               # -- Begin function _Z12checkPrimarym
	.type	_Z12checkPrimarym,@function
_Z12checkPrimarym:                      # @_Z12checkPrimarym
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %r14
	movl	$1048576, %edi                  # imm = 0x100000
	callq	malloc
	testq	%rax, %rax
	je	.LBB1_1
# %bb.2:
	movq	%rax, %rbx
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB1_3
# %bb.4:
	movq	%rsp, %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_16
# %bb.5:                                # %.preheader75.preheader
	movabsq	$4294968320, %r15               # imm = 0x100000400
.LBB1_6:                                # %.preheader75
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_8 Depth 2
                                        #       Child Loop BB1_25 Depth 3
	movq	(%rsp), %rdi
	movl	$1048576, %edx                  # imm = 0x100000
	xorl	%esi, %esi
	callq	hipMemset
	cmpq	$4, %r14
	jae	.LBB1_7
.LBB1_27:                               # %._crit_edge
                                        #   in Loop: Header=BB1_6 Depth=1
	movl	$.L.str.7, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB1_28:                               # %.thread67
                                        #   in Loop: Header=BB1_6 Depth=1
	incq	%r14
	jmp	.LBB1_6
.LBB1_7:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_6 Depth=1
	movq	%r14, %r13
	shrq	%r13
	movl	$2, %r12d
.LBB1_8:                                # %.lr.ph
                                        #   Parent Loop BB1_6 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_25 Depth 3
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.9:                                #   in Loop: Header=BB1_8 Depth=2
	movq	(%rsp), %rdx
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	_Z26__device_stub__isDivisiblemmPh
.LBB1_10:                               #   in Loop: Header=BB1_8 Depth=2
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.19:                               #   in Loop: Header=BB1_8 Depth=2
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB1_20
# %bb.21:                               #   in Loop: Header=BB1_8 Depth=2
	movq	(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_23
# %bb.22:                               # %.preheader.preheader
                                        #   in Loop: Header=BB1_8 Depth=2
	xorl	%eax, %eax
.LBB1_25:                               # %.preheader
                                        #   Parent Loop BB1_6 Depth=1
                                        #     Parent Loop BB1_8 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	cmpb	$0, (%rbx,%rax)
	jne	.LBB1_28
# %bb.24:                               #   in Loop: Header=BB1_25 Depth=3
	incq	%rax
	cmpq	$1048576, %rax                  # imm = 0x100000
	jne	.LBB1_25
# %bb.26:                               #   in Loop: Header=BB1_8 Depth=2
	addq	$1048576, %r12                  # imm = 0x100000
	cmpq	%r13, %r12
	jbe	.LBB1_8
	jmp	.LBB1_27
.LBB1_11:
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movq	%r14, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB1_12
.LBB1_20:
	movl	%eax, %ebp
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movq	%r14, %rdi
	movl	%ebp, %edx
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB1_12
.LBB1_23:
	movq	stderr(%rip), %rcx
	movl	$.L.str.6, %edi
.LBB1_17:
	movl	$17, %esi
.LBB1_18:
	movl	$1, %edx
	callq	fwrite@PLT
.LBB1_12:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	callq	hipDeviceReset
	movl	%eax, %ecx
	xorl	%eax, %eax
	testl	%ecx, %ecx
	jne	.LBB1_13
.LBB1_15:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_1:
	.cfi_def_cfa_offset 64
	movq	stderr(%rip), %rcx
	movl	$.L.str, %edi
	movl	$14, %esi
	jmp	.LBB1_14
.LBB1_3:
	movq	stderr(%rip), %rcx
	movl	$.L.str.1, %edi
	movl	$63, %esi
	jmp	.LBB1_18
.LBB1_13:
	movq	stderr(%rip), %rcx
	movl	$.L.str.8, %edi
	movl	$22, %esi
.LBB1_14:
	movl	$1, %edx
	callq	fwrite@PLT
	movl	$-1, %eax
	jmp	.LBB1_15
.LBB1_16:
	movq	stderr(%rip), %rcx
	movl	$.L.str.2, %edi
	jmp	.LBB1_17
.Lfunc_end1:
	.size	_Z12checkPrimarym, .Lfunc_end1-_Z12checkPrimarym
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11isDivisiblemmPh, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11isDivisiblemmPh,@object     # @_Z11isDivisiblemmPh
	.section	.rodata,"a",@progbits
	.globl	_Z11isDivisiblemmPh
	.p2align	3, 0x0
_Z11isDivisiblemmPh:
	.quad	_Z26__device_stub__isDivisiblemmPh
	.size	_Z11isDivisiblemmPh, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"malloc failed!"
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"hipSetDevice failed!  Do you have a CUDA-capable GPU installed?"
	.size	.L.str.1, 64

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"hipMalloc failed!"
	.size	.L.str.2, 18

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"isDivisible launch failed: %s\n"
	.size	.L.str.4, 31

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"hipDeviceSynchronize returned error code %d after launching isDivisible:%s!\n"
	.size	.L.str.5, 77

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"hipMemcpy failed!"
	.size	.L.str.6, 18

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%llu is a primary number\n"
	.size	.L.str.7, 26

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"hipDeviceReset failed!"
	.size	.L.str.8, 23

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11isDivisiblemmPh"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__isDivisiblemmPh
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11isDivisiblemmPh
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11isDivisiblemmPh     ; -- Begin function _Z11isDivisiblemmPh
	.globl	_Z11isDivisiblemmPh
	.p2align	8
	.type	_Z11isDivisiblemmPh,@function
_Z11isDivisiblemmPh:                    ; @_Z11isDivisiblemmPh
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v0, 31, v1
	v_add_co_u32 v9, vcc_lo, v1, s6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v0, vcc_lo
	v_cvt_f32_u32_e32 v2, v9
	v_sub_co_u32 v11, vcc_lo, 0, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v3, v10
	v_sub_co_ci_u32_e32 v12, vcc_lo, 0, v10, vcc_lo
	v_fmamk_f32 v2, v3, 0x4f800000, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x5f7ffffc, v2
	v_mul_f32_e32 v3, 0x2f800000, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v3, v3
	v_fmamk_f32 v2, v3, 0xcf800000, v2
	v_cvt_u32_f32_e32 v13, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v14, v2
	v_mul_lo_u32 v4, v11, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, v12, v14
	v_mad_u64_u32 v[2:3], null, v11, v14, 0
	v_add3_u32 v15, v3, v4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v16, v14, v2
	v_mad_u64_u32 v[5:6], null, v13, v2, 0
	v_mad_u64_u32 v[3:4], null, v14, v15, 0
	v_mad_u64_u32 v[7:8], null, v13, v15, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, v16, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v2, v5
	v_add_co_ci_u32_e32 v2, vcc_lo, v3, v6, vcc_lo
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v2, v7
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, v14, v2
	v_add_co_ci_u32_e32 v13, vcc_lo, v13, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v4, v12, v14
	v_mad_u64_u32 v[2:3], null, v11, v14, 0
	v_mul_lo_u32 v5, v11, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v14, v2
	v_add3_u32 v11, v3, v5, v4
	v_mad_u64_u32 v[5:6], null, v13, v2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, v14, v11, 0
	v_mad_u64_u32 v[7:8], null, v13, v11, 0
	v_add_co_u32 v2, vcc_lo, v12, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v4, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v3, v6, vcc_lo
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v8, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, v14, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, v13, v3, vcc_lo
	v_mul_hi_u32 v11, s4, v6
	v_mad_u64_u32 v[4:5], null, s5, v6, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s4, v8, 0
	v_mad_u64_u32 v[6:7], null, s5, v8, 0
	v_add_co_u32 v2, vcc_lo, v11, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v3, v5, vcc_lo
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v7, vcc_lo
	v_add_co_u32 v4, vcc_lo, v2, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v3, vcc_lo
	v_mul_lo_u32 v6, v10, v4
	v_mad_u64_u32 v[2:3], null, v9, v4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v9, v5
	v_sub_co_u32 v2, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v3, v4, v6
	v_sub_nc_u32_e32 v4, s5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_co_ci_u32_e64 v4, s2, v4, v10, vcc_lo
	v_sub_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	v_sub_co_u32 v5, vcc_lo, v2, v9
	v_subrev_co_ci_u32_e64 v6, s2, 0, v4, vcc_lo
	v_cmp_ge_u32_e64 s2, v2, v9
	v_sub_co_ci_u32_e32 v4, vcc_lo, v4, v10, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v3, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v7, 0, -1, s2
	v_cmp_ge_u32_e64 s2, v5, v9
	v_cndmask_b32_e64 v12, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, v6, v10
	v_cndmask_b32_e64 v8, 0, -1, s2
	v_cmp_ge_u32_e64 s2, v6, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v11, 0, -1, s2
	v_cmp_eq_u32_e64 s2, v3, v10
	v_cndmask_b32_e32 v8, v11, v8, vcc_lo
	v_sub_co_u32 v9, vcc_lo, v5, v9
	v_subrev_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_ne_u32_e32 vcc_lo, 0, v8
	v_cndmask_b32_e64 v7, v12, v7, s2
	s_mov_b32 s2, exec_lo
	v_dual_cndmask_b32 v4, v6, v4 :: v_dual_cndmask_b32 v5, v5, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, 0, v7
	v_dual_cndmask_b32 v3, v3, v4 :: v_dual_cndmask_b32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u64_e32 0, v[2:3]
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v0, vcc_lo
	v_mov_b32_e32 v0, 1
	global_store_b8 v[1:2], v0, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11isDivisiblemmPh
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11isDivisiblemmPh, .Lfunc_end0-_Z11isDivisiblemmPh
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 812
; NumSgprs: 18
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11isDivisiblemmPh
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11isDivisiblemmPh.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
