//#define REARRANGED_DOMAIN 

#ifdef USING_SHARED_MEMORY
#define BLOCK_SIZE 960
#endif

__global__ void gravity_wb(
        int N,
        double g,
        double * stage_vertex_values, 
        double * stage_edge_values, 
        double * stage_centroid_values, 
        double * bed_edge_values, 
        double * bed_centroid_values, 
        double * vertex_coordinates, 
        double * xmom_explicit_update, 
        double * ymom_explicit_update, 
        double * normals, 
        double * areas, 
        double * edgelengths
        )
{
    const int k = 
            threadIdx.x+threadIdx.y*blockDim.x+
            (blockIdx.x+blockIdx.y*gridDim.x)*blockDim.x*blockDim.y;

    int i;
#ifndef REARRANGED_DOMAIN
    int k3=k*3, k6=k*6;
#endif

    double w0, w1, w2, 
           x0, y0, x1, y1, x2, y2,
           avg_h;

    double wx, wy, det,
           hh[3];
    double area, n0, n1, fact;

#ifdef USING_SHARED_MEMORY
    __shared__ double sh_data[ BLOCK_SIZE *6];
#else
    double sidex, sidey;
#endif 


    if (k >= N)
        return;

#ifndef REARRANGED_DOMAIN
    w0 = stage_vertex_values[k3];
    w1 = stage_vertex_values[k3 + 1];
    w2 = stage_vertex_values[k3 + 2];

    x0 = vertex_coordinates[k6];
    y0 = vertex_coordinates[k6 + 1];
    x1 = vertex_coordinates[k6 + 2];
    y1 = vertex_coordinates[k6 + 3];
    x2 = vertex_coordinates[k6 + 4];
    y2 = vertex_coordinates[k6 + 5];
#else
    w0 = stage_vertex_values[k];
    w1 = stage_vertex_values[k + N];
    w2 = stage_vertex_values[k + 2*N];
    

    x0 = vertex_coordinates[k];
    x1 = vertex_coordinates[k + 2*N];
    x2 = vertex_coordinates[k + 4*N];

    
    y0 = vertex_coordinates[k + N];
    y1 = vertex_coordinates[k + 3*N];
    y2 = vertex_coordinates[k + 5*N];
#endif

    //_gradient(x0, y0, x1, y1, x2, y2, w0, w1, w2, &wx, &wy);

    det = (y2 - y0)*(x1 - x0) - (y1 - y0)*(x2 - x0);

    wx = (y2 -y0)*(w1 - w0) - (y1 - y0)*(w2 -w0);
    wx /= det;

    wy = (x1 - x0)*(w2 - w0) - (x2 - x0)*(w1 -w0);
    wy /= det;

    avg_h = stage_centroid_values[k] - bed_centroid_values[k];

    xmom_explicit_update[k] += -g *wx *avg_h;
    ymom_explicit_update[k] += -g *wy *avg_h;

#ifndef REARRANGED_DOMAIN
    hh[0] = stage_edge_values[k3] - bed_edge_values[k3];
    hh[0] *= -0.5 * g * hh[0];
    hh[1] = stage_edge_values[k3+1] - bed_edge_values[k3+1];
    hh[1] *= -0.5 * g * hh[1];
    hh[2] = stage_edge_values[k3+2] - bed_edge_values[k3+2];
    hh[2] *= -0.5 * g * hh[2];
#else
    hh[0] = stage_edge_values[k] - bed_edge_values[k];
    hh[0] *= -0.5 * g * hh[0];
    hh[1] = stage_edge_values[k+N] - bed_edge_values[k+N];
    hh[1] *= -0.5 * g * hh[1];
    hh[2] = stage_edge_values[k+2*N] - bed_edge_values[k+2*N];
    hh[2] *= -0.5 * g * hh[2];
#endif



#ifndef USING_SHARED_MEMORY
    sidex = 0.0;
    sidey = 0.0;
#endif


    area = areas[k];


#ifndef USING_SHARED_MEMORY
    sidex = 0;
    sidey = 0;
#endif


    for ( i = 0 ; i < 3 ; i++ )
    {
#ifndef REARRANGED_DOMAIN
        n0 = normals[k6 + 2*i];
        n1 = normals[k6 + 2*i + 1];

       // fact =  -0.5 * g * hh[i] * hh[i] * edgelengths[k3 + i];
        fact = hh[i] * edgelengths[k3 + i];
#else
        n0 = normals[k + 2*i*N];
        n1 = normals[k + (2*i + 1)*N];

        fact = hh[i] * edgelengths[k + i*N];
#endif


#ifdef USING_SHARED_MEMORY
        sh_data[threadIdx.x + i*blockDim.x] = fact*n0;
        sh_data[threadIdx.x + (i+3)*blockDim.x] = fact*n1;
#else
        sidex += fact*n0;
        sidey += fact*n1;
#endif
    }

#ifdef USING_SHARED_MEMORY
    xmom_explicit_update[k] += -(sh_data[threadIdx.x+3*blockDim.x] + sh_data[threadIdx.x + 4*blockDim.x] + sh_data[threadIdx.x+5*blockDim.x]) / area;
    ymom_explicit_update[k] += -(sh_data[threadIdx.x+3*blockDim.x] + sh_data[threadIdx.x + 4*blockDim.x] + sh_data[threadIdx.x+5*blockDim.x]) / area;
#else
    xmom_explicit_update[k] += -sidex / area;
    ymom_explicit_update[k] += -sidey / area;
#endif
}

	.file	"tmpxft_0035d46f_00000000-6_gravity.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z52__device_stub__Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_idPdS_S_S_S_S_S_S_S_S_S_
	.type	_Z52__device_stub__Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_idPdS_S_S_S_S_S_S_S_S_S_, @function
_Z52__device_stub__Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_idPdS_S_S_S_S_S_S_S_S_S_:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$296, %rsp
	.cfi_def_cfa_offset 304
	movq	304(%rsp), %rax
	movl	%edi, 108(%rsp)
	leaq	128(%rsp), %rdi
	movq	%rsi, 88(%rsp)
	leaq	140(%rsp), %rsi
	movq	%rax, 48(%rsp)
	movq	312(%rsp), %rax
	movq	%rdx, 80(%rsp)
	leaq	112(%rsp), %rdx
	movq	%rax, 40(%rsp)
	movq	320(%rsp), %rax
	movq	%rcx, 72(%rsp)
	leaq	120(%rsp), %rcx
	movq	%rax, 32(%rsp)
	movq	328(%rsp), %rax
	movq	%r8, 64(%rsp)
	movq	%rax, 24(%rsp)
	movq	336(%rsp), %rax
	movq	%r9, 56(%rsp)
	movq	%rax, 16(%rsp)
	movq	344(%rsp), %rax
	movsd	%xmm0, 96(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 280(%rsp)
	xorl	%eax, %eax
	leaq	108(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 272(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 128(%rsp)
	movl	$1, 136(%rsp)
	movq	%rax, 140(%rsp)
	movl	$1, 148(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	120(%rsp)
	.cfi_def_cfa_offset 312
	leaq	_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_(%rip), %rdi
	pushq	120(%rsp)
	.cfi_def_cfa_offset 320
	movq	156(%rsp), %rcx
	movl	164(%rsp), %r8d
	movq	144(%rsp), %rsi
	movl	152(%rsp), %edx
	leaq	192(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 312
	popq	%rdx
	.cfi_def_cfa_offset 304
.L2:
	movq	280(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$296, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z52__device_stub__Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_idPdS_S_S_S_S_S_S_S_S_S_, .-_Z52__device_stub__Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_idPdS_S_S_S_S_S_S_S_S_S_
	.globl	_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
	.type	_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_, @function
_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_idPdS_S_S_S_S_S_S_S_S_S_
	.cfi_endproc
.LFE2033:
	.size	_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_, .-_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
//#define REARRANGED_DOMAIN 

#ifdef USING_SHARED_MEMORY
#define BLOCK_SIZE 960
#endif

__global__ void gravity_wb(
        int N,
        double g,
        double * stage_vertex_values, 
        double * stage_edge_values, 
        double * stage_centroid_values, 
        double * bed_edge_values, 
        double * bed_centroid_values, 
        double * vertex_coordinates, 
        double * xmom_explicit_update, 
        double * ymom_explicit_update, 
        double * normals, 
        double * areas, 
        double * edgelengths
        )
{
    const int k = 
            threadIdx.x+threadIdx.y*blockDim.x+
            (blockIdx.x+blockIdx.y*gridDim.x)*blockDim.x*blockDim.y;

    int i;
#ifndef REARRANGED_DOMAIN
    int k3=k*3, k6=k*6;
#endif

    double w0, w1, w2, 
           x0, y0, x1, y1, x2, y2,
           avg_h;

    double wx, wy, det,
           hh[3];
    double area, n0, n1, fact;

#ifdef USING_SHARED_MEMORY
    __shared__ double sh_data[ BLOCK_SIZE *6];
#else
    double sidex, sidey;
#endif 


    if (k >= N)
        return;

#ifndef REARRANGED_DOMAIN
    w0 = stage_vertex_values[k3];
    w1 = stage_vertex_values[k3 + 1];
    w2 = stage_vertex_values[k3 + 2];

    x0 = vertex_coordinates[k6];
    y0 = vertex_coordinates[k6 + 1];
    x1 = vertex_coordinates[k6 + 2];
    y1 = vertex_coordinates[k6 + 3];
    x2 = vertex_coordinates[k6 + 4];
    y2 = vertex_coordinates[k6 + 5];
#else
    w0 = stage_vertex_values[k];
    w1 = stage_vertex_values[k + N];
    w2 = stage_vertex_values[k + 2*N];
    

    x0 = vertex_coordinates[k];
    x1 = vertex_coordinates[k + 2*N];
    x2 = vertex_coordinates[k + 4*N];

    
    y0 = vertex_coordinates[k + N];
    y1 = vertex_coordinates[k + 3*N];
    y2 = vertex_coordinates[k + 5*N];
#endif

    //_gradient(x0, y0, x1, y1, x2, y2, w0, w1, w2, &wx, &wy);

    det = (y2 - y0)*(x1 - x0) - (y1 - y0)*(x2 - x0);

    wx = (y2 -y0)*(w1 - w0) - (y1 - y0)*(w2 -w0);
    wx /= det;

    wy = (x1 - x0)*(w2 - w0) - (x2 - x0)*(w1 -w0);
    wy /= det;

    avg_h = stage_centroid_values[k] - bed_centroid_values[k];

    xmom_explicit_update[k] += -g *wx *avg_h;
    ymom_explicit_update[k] += -g *wy *avg_h;

#ifndef REARRANGED_DOMAIN
    hh[0] = stage_edge_values[k3] - bed_edge_values[k3];
    hh[0] *= -0.5 * g * hh[0];
    hh[1] = stage_edge_values[k3+1] - bed_edge_values[k3+1];
    hh[1] *= -0.5 * g * hh[1];
    hh[2] = stage_edge_values[k3+2] - bed_edge_values[k3+2];
    hh[2] *= -0.5 * g * hh[2];
#else
    hh[0] = stage_edge_values[k] - bed_edge_values[k];
    hh[0] *= -0.5 * g * hh[0];
    hh[1] = stage_edge_values[k+N] - bed_edge_values[k+N];
    hh[1] *= -0.5 * g * hh[1];
    hh[2] = stage_edge_values[k+2*N] - bed_edge_values[k+2*N];
    hh[2] *= -0.5 * g * hh[2];
#endif



#ifndef USING_SHARED_MEMORY
    sidex = 0.0;
    sidey = 0.0;
#endif


    area = areas[k];


#ifndef USING_SHARED_MEMORY
    sidex = 0;
    sidey = 0;
#endif


    for ( i = 0 ; i < 3 ; i++ )
    {
#ifndef REARRANGED_DOMAIN
        n0 = normals[k6 + 2*i];
        n1 = normals[k6 + 2*i + 1];

       // fact =  -0.5 * g * hh[i] * hh[i] * edgelengths[k3 + i];
        fact = hh[i] * edgelengths[k3 + i];
#else
        n0 = normals[k + 2*i*N];
        n1 = normals[k + (2*i + 1)*N];

        fact = hh[i] * edgelengths[k + i*N];
#endif


#ifdef USING_SHARED_MEMORY
        sh_data[threadIdx.x + i*blockDim.x] = fact*n0;
        sh_data[threadIdx.x + (i+3)*blockDim.x] = fact*n1;
#else
        sidex += fact*n0;
        sidey += fact*n1;
#endif
    }

#ifdef USING_SHARED_MEMORY
    xmom_explicit_update[k] += -(sh_data[threadIdx.x+3*blockDim.x] + sh_data[threadIdx.x + 4*blockDim.x] + sh_data[threadIdx.x+5*blockDim.x]) / area;
    ymom_explicit_update[k] += -(sh_data[threadIdx.x+3*blockDim.x] + sh_data[threadIdx.x + 4*blockDim.x] + sh_data[threadIdx.x+5*blockDim.x]) / area;
#else
    xmom_explicit_update[k] += -sidex / area;
    ymom_explicit_update[k] += -sidey / area;
#endif
}

	.text
	.file	"gravity.hip"
	.globl	_Z25__device_stub__gravity_wbidPdS_S_S_S_S_S_S_S_S_S_ # -- Begin function _Z25__device_stub__gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
	.type	_Z25__device_stub__gravity_wbidPdS_S_S_S_S_S_S_S_S_S_,@function
_Z25__device_stub__gravity_wbidPdS_S_S_S_S_S_S_S_S_S_: # @_Z25__device_stub__gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$224, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	72(%rsp), %rdi
	movsd	%xmm0, (%rdi)
	leaq	64(%rsp), %r10
	movq	%rsi, (%r10)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%r10, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$240, %rsp
	.cfi_adjust_cfa_offset -240
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__gravity_wbidPdS_S_S_S_S_S_S_S_S_S_, .Lfunc_end0-_Z25__device_stub__gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_,@object # @_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
	.p2align	3, 0x0
_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_:
	.quad	_Z25__device_stub__gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
	.size	_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_"
	.size	.L__unnamed_1, 39

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_ ; -- Begin function _Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
	.globl	_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
	.p2align	8
	.type	_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_,@function
_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_: ; @_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x68
	s_load_b32 s3, s[0:1], 0x74
	s_load_b32 s4, s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s15
	s_lshr_b32 s5, s3, 16
	s_add_i32 s2, s2, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s2, s5, v[1:2]
	v_and_b32_e32 v3, 0x3ff, v0
	s_and_b32 s2, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, v2, s2, v[3:4]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s4, v0
	s_cbranch_execz .LBB0_4
; %bb.1:
	s_load_b512 s[4:19], s[0:1], 0x8
	v_mul_lo_u32 v1, v0, 6
	v_lshl_add_u32 v3, v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[19:20], 3, v[3:4]
	v_lshlrev_b64 v[17:18], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s16, v17
	v_add_co_ci_u32_e32 v10, vcc_lo, s17, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v13, vcc_lo, s6, v19
	v_add_co_ci_u32_e32 v14, vcc_lo, s7, v20, vcc_lo
	s_clause 0x2
	global_load_b128 v[1:4], v[9:10], off offset:32
	global_load_b128 v[5:8], v[9:10], off offset:16
	global_load_b128 v[9:12], v[9:10], off
	s_clause 0x1
	global_load_b64 v[21:22], v[13:14], off offset:16
	global_load_b128 v[13:16], v[13:14], off
	s_waitcnt vmcnt(2)
	v_add_f64 v[7:8], v[7:8], -v[11:12]
	v_add_f64 v[23:24], v[1:2], -v[9:10]
	s_waitcnt vmcnt(0)
	v_add_f64 v[21:22], v[21:22], -v[13:14]
	v_add_f64 v[1:2], v[3:4], -v[11:12]
	v_add_f64 v[3:4], v[5:6], -v[9:10]
	v_add_f64 v[5:6], v[15:16], -v[13:14]
	v_mul_f64 v[9:10], v[7:8], v[23:24]
	v_mul_f64 v[7:8], v[21:22], v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[9:10], v[3:4], v[1:2], -v[9:10]
	v_fma_f64 v[7:8], v[5:6], v[1:2], -v[7:8]
	v_ashrrev_i32_e32 v1, 31, v0
	v_mul_f64 v[5:6], v[5:6], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], 3, v[0:1]
	v_add_co_u32 v0, vcc_lo, s10, v15
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v16, vcc_lo
	v_add_co_u32 v25, vcc_lo, s14, v15
	v_add_co_ci_u32_e32 v26, vcc_lo, s15, v16, vcc_lo
	global_load_b64 v[27:28], v[0:1], off
	global_load_b64 v[25:26], v[25:26], off
	v_add_co_u32 v0, vcc_lo, s18, v15
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v16, vcc_lo
	s_load_b256 s[16:23], s[0:1], 0x48
	s_mov_b64 s[0:1], 0
	global_load_b64 v[31:32], v[0:1], off
	v_div_scale_f64 v[11:12], null, v[9:10], v[9:10], v[7:8]
	v_div_scale_f64 v[33:34], vcc_lo, v[7:8], v[9:10], v[7:8]
	v_fma_f64 v[4:5], v[21:22], v[3:4], -v[5:6]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[13:14], v[11:12]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[29:30], -v[11:12], v[13:14], 1.0
	v_fma_f64 v[13:14], v[13:14], v[29:30], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], -v[11:12], v[13:14], 1.0
	v_fma_f64 v[13:14], v[13:14], v[29:30], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[29:30], v[33:34], v[13:14]
	v_fma_f64 v[11:12], -v[11:12], v[29:30], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[11:12], v[11:12], v[13:14], v[29:30]
	v_div_fixup_f64 v[2:3], v[11:12], v[9:10], v[7:8]
	v_div_scale_f64 v[6:7], null, v[9:10], v[9:10], v[4:5]
	s_waitcnt vmcnt(1)
	v_add_f64 v[11:12], v[27:28], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[2:3], v[2:3], s[4:5]
	v_rcp_f64_e32 v[13:14], v[6:7]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[21:22], -v[11:12], v[2:3], v[31:32]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s16, v15
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[23:24], -v[6:7], v[13:14], 1.0
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v16, vcc_lo
	v_div_scale_f64 v[25:26], vcc_lo, v[4:5], v[9:10], v[4:5]
	global_store_b64 v[0:1], v[21:22], off
	global_load_b64 v[21:22], v[2:3], off
	v_fma_f64 v[13:14], v[13:14], v[23:24], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[23:24], -v[6:7], v[13:14], 1.0
	v_fma_f64 v[13:14], v[13:14], v[23:24], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[23:24], v[25:26], v[13:14]
	v_fma_f64 v[6:7], -v[6:7], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[6:7], v[6:7], v[13:14], v[23:24]
	v_div_fixup_f64 v[4:5], v[6:7], v[9:10], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[4:5], s[4:5]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], -v[11:12], v[4:5], v[21:22]
	v_add_co_u32 v21, vcc_lo, s8, v19
	v_add_co_ci_u32_e32 v22, vcc_lo, s9, v20, vcc_lo
	v_add_co_u32 v23, vcc_lo, s12, v19
	v_add_co_ci_u32_e32 v24, vcc_lo, s13, v20, vcc_lo
	global_store_b64 v[2:3], v[4:5], off
	global_load_b128 v[6:9], v[21:22], off
	global_load_b128 v[10:13], v[23:24], off
	global_load_b64 v[21:22], v[21:22], off offset:16
	global_load_b64 v[23:24], v[23:24], off offset:16
	v_add_co_u32 v4, vcc_lo, s20, v15
	v_add_co_ci_u32_e32 v5, vcc_lo, s21, v16, vcc_lo
	v_mul_f64 v[14:15], s[4:5], -0.5
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(3)
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	v_add_f64 v[10:11], v[8:9], -v[12:13]
	s_waitcnt vmcnt(1)
	v_add_f64 v[12:13], v[21:22], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[8:9], v[14:15], v[6:7]
	v_mul_f64 v[21:22], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[14:15], v[12:13]
	v_mul_f64 v[8:9], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[10:11], v[10:11], v[21:22]
	v_mul_f64 v[12:13], v[12:13], v[14:15]
	v_add_co_u32 v14, vcc_lo, v17, s18
	v_add_co_ci_u32_e32 v15, vcc_lo, s19, v18, vcc_lo
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	v_add_co_u32 v16, vcc_lo, s22, v19
	v_add_co_ci_u32_e32 v17, vcc_lo, s23, v20, vcc_lo
	v_add_co_u32 v18, vcc_lo, v14, 8
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v15, vcc_lo
	v_dual_mov_b32 v15, v7 :: v_dual_mov_b32 v14, v6
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[24:25], v[16:17], off
	global_load_b128 v[20:23], v[18:19], off offset:-8
	s_cmp_eq_u32 s0, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 2
	v_cndmask_b32_e32 v26, v9, v11, vcc_lo
	v_cndmask_b32_e32 v28, v8, v10, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v27, v26, v13 :: v_dual_cndmask_b32 v26, v28, v12
	v_add_co_u32 v16, vcc_lo, v16, 8
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v17, vcc_lo
	v_add_co_u32 v18, vcc_lo, v18, 16
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v19, vcc_lo
	s_cmp_lg_u32 s0, 3
	s_waitcnt vmcnt(1)
	v_mul_f64 v[24:25], v[26:27], v[24:25]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[14:15], v[20:21], v[24:25], v[14:15]
	v_fma_f64 v[6:7], v[22:23], v[24:25], v[6:7]
	s_cbranch_scc1 .LBB0_2
; %bb.3:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[8:9], null, v[4:5], v[4:5], v[14:15]
	global_load_b64 v[12:13], v[0:1], off
	v_rcp_f64_e32 v[10:11], v[8:9]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	v_div_scale_f64 v[16:17], vcc_lo, v[14:15], v[4:5], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[16:17], v[10:11]
	v_fma_f64 v[8:9], -v[8:9], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[8:9], v[8:9], v[10:11], v[18:19]
	v_div_scale_f64 v[10:11], null, v[4:5], v[4:5], v[6:7]
	v_div_fixup_f64 v[8:9], v[8:9], v[4:5], v[14:15]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[12:13], -v[8:9]
	v_rcp_f64_e32 v[12:13], v[10:11]
	global_store_b64 v[0:1], v[8:9], off
	global_load_b64 v[0:1], v[2:3], off
	v_fma_f64 v[8:9], -v[10:11], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[12:13], v[8:9], v[12:13]
	v_fma_f64 v[12:13], -v[10:11], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[12:13], v[8:9]
	v_div_scale_f64 v[12:13], vcc_lo, v[6:7], v[4:5], v[6:7]
	v_mul_f64 v[14:15], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[10:11], v[14:15], v[12:13]
	v_div_fmas_f64 v[8:9], v[10:11], v[8:9], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[4:5], v[8:9], v[4:5], v[6:7]
	s_waitcnt vmcnt(0)
	v_add_f64 v[0:1], v[0:1], -v[4:5]
	global_store_b64 v[2:3], v[0:1], off
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 360
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 35
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_, .Lfunc_end0-_Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1392
; NumSgprs: 26
; NumVgprs: 35
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 35
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         96
        .size:           8
        .value_kind:     global_buffer
      - .offset:         104
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         108
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         112
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         116
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         118
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         120
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         122
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         124
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         126
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         160
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         168
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 360
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z10gravity_wbidPdS_S_S_S_S_S_S_S_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     35
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
