#include <stdio.h>
#include <chrono>
#include <random>
#include <limits>


void serial_add(float* A, float* B, float* C, int N) {
    for (int i = 0; i < N; i++) {
        C[i] = A[i] + B[i];
    }
}


/**
 * @brief void vecAdd(float* A, float* B, float* C)
 *        Adds elements of vectors A and B and stores them in vector D
 * @param A: vector addend
 * @param B: vector addend
 * @param C: pointer to where the result of A + B will be stored
 * @return C: pointer to address where A + B will be stored
 */
__global__ void vecAdd(float* A, float* B, float* C) {
    int i = threadIdx.x;
    C[i] = A[i] + B[i];
}

int main() {
    int N = 10000000;

    float* A = (float*)malloc(N * sizeof(float));
    float* B = (float*)malloc(N * sizeof(float));
    float* C = (float*)malloc(N * sizeof(float));

    for (int i = 0; i < N; i++) {
        unsigned seed = std::chrono::system_clock::now().time_since_epoch().count();
        std::default_random_engine generator (seed);
        float d = std::generate_canonical<float, std::numeric_limits<float>::digits>(generator);
        A[i] = d;
    }

    for (int i = 0; i < N; i++) {
        unsigned seed = std::chrono::system_clock::now().time_since_epoch().count();
        std::default_random_engine generator (seed);
        float d = std::generate_canonical<float, std::numeric_limits<float>::digits>(generator);
        B[i] = d;
    }

    float* dev_A;
    float* dev_B;
    float* dev_C;

    cudaMalloc((void**) &dev_A, N * sizeof(float));
    cudaMalloc((void**) &dev_B, N * sizeof(float));
    cudaMalloc((void**) &dev_C, N * sizeof(float));

    cudaMemcpy(dev_A, A, N * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(dev_B, B, N * sizeof(float), cudaMemcpyHostToDevice);

    auto start = std::chrono::high_resolution_clock::now();
    vecAdd<<<1, N>>>(dev_A, dev_B, dev_C);
    cudaMemcpy(C, dev_C, N * sizeof(float), cudaMemcpyDeviceToHost);
    auto end = std::chrono::high_resolution_clock::now();
    printf("GPU Compute Time: %u\n", std::chrono::duration_cast<std::chrono::microseconds>(end - start).count() / 25.0);
    cudaFree(dev_A);
    cudaFree(dev_B);
    cudaFree(dev_C);

    for (int i = 0; i < N; i++) {
        unsigned seed = std::chrono::system_clock::now().time_since_epoch().count();
        std::default_random_engine generator (seed);
        float d = std::generate_canonical<float, std::numeric_limits<float>::digits>(generator);
        A[i] = d;
    }

    for (int i = 0; i < N; i++) {
        unsigned seed = std::chrono::system_clock::now().time_since_epoch().count();
        std::default_random_engine generator (seed);
        float d = std::generate_canonical<float, std::numeric_limits<float>::digits>(generator);
        B[i] = d;
    }

    start = std::chrono::high_resolution_clock::now();
    serial_add(A, B, C, N);
    end = std::chrono::high_resolution_clock::now();
    printf("CPU Compute Time: %u\n", std::chrono::duration_cast<std::chrono::microseconds>(end - start).count() / 25.0);

    free(A);
    free(B);
    free(C);

    return 0;
}
	.file	"tmpxft_0036403b_00000000-6_kernel_vector_add.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4213:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4213:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10serial_addPfS_S_i
	.type	_Z10serial_addPfS_S_i, @function
_Z10serial_addPfS_S_i:
.LFB4207:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L3:
	cmpl	%eax, %ecx
	jle	.L6
	movss	(%rdi,%rax,4), %xmm0
	addss	(%rsi,%rax,4), %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	jmp	.L3
.L6:
	ret
	.cfi_endproc
.LFE4207:
	.size	_Z10serial_addPfS_S_i, .-_Z10serial_addPfS_S_i
	.globl	_Z29__device_stub__Z6vecAddPfS_S_PfS_S_
	.type	_Z29__device_stub__Z6vecAddPfS_S_PfS_S_, @function
_Z29__device_stub__Z6vecAddPfS_S_PfS_S_:
.LFB4235:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6vecAddPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L7:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4235:
	.size	_Z29__device_stub__Z6vecAddPfS_S_PfS_S_, .-_Z29__device_stub__Z6vecAddPfS_S_PfS_S_
	.globl	_Z6vecAddPfS_S_
	.type	_Z6vecAddPfS_S_, @function
_Z6vecAddPfS_S_:
.LFB4236:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6vecAddPfS_S_PfS_S_
	.cfi_endproc
.LFE4236:
	.size	_Z6vecAddPfS_S_, .-_Z6vecAddPfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z6vecAddPfS_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4238:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6vecAddPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4238:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_,"axG",@progbits,_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_,comdat
	.weak	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	.type	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_, @function
_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_:
.LFB4579:
	.cfi_startproc
	endbr64
	imulq	$16807, (%rdi), %rax
	movl	$2147483647, %ecx
	xorl	%edx, %edx
	divq	%rcx
	movq	%rdx, (%rdi)
	decq	%rdx
	js	.L15
	cvtsi2ssq	%rdx, %xmm0
	jmp	.L16
.L15:
	movq	%rdx, %rax
	andl	$1, %edx
	shrq	%rax
	orq	%rdx, %rax
	cvtsi2ssq	%rax, %xmm0
	addss	%xmm0, %xmm0
.L16:
	xorps	%xmm1, %xmm1
	addss	%xmm1, %xmm0
	mulss	.LC3(%rip), %xmm0
	comiss	.LC4(%rip), %xmm0
	jb	.L14
	movss	.LC1(%rip), %xmm0
.L14:
	ret
	.cfi_endproc
.LFE4579:
	.size	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_, .-_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	.section	.rodata.str1.1
.LC6:
	.string	"GPU Compute Time: %u\n"
.LC7:
	.string	"CPU Compute Time: %u\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4208:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$40000000, %edi
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	$2147483647, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$40000000, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$40000000, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movq	%rax, %r12
.L20:
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	xorl	%edx, %edx
	leaq	40(%rsp), %r13
	movl	%eax, %eax
	movq	%r13, %rdi
	divq	%r14
	movl	$1, %eax
	testq	%rdx, %rdx
	cmove	%rax, %rdx
	movq	%rdx, 40(%rsp)
	call	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	movss	%xmm0, 0(%rbp,%r15,4)
	incq	%r15
	cmpq	$10000000, %r15
	jne	.L20
	xorl	%r15d, %r15d
	movl	$2147483647, %r14d
.L21:
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	xorl	%edx, %edx
	movq	%r13, %rdi
	movl	%eax, %eax
	divq	%r14
	movl	$1, %eax
	testq	%rdx, %rdx
	cmove	%rax, %rdx
	movq	%rdx, 40(%rsp)
	call	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	$10000000, %r15
	jne	.L21
	movq	%rsp, %rdi
	movl	$40000000, %esi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$40000000, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$40000000, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$40000000, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$40000000, %edx
	call	cudaMemcpy@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$33632557, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$7, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rax, %r14
	movabsq	$4294967297, %rdi
	movq	%rdx, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z29__device_stub__Z6vecAddPfS_S_PfS_S_
.L22:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	xorl	%r15d, %r15d
	movl	$40000000, %edx
	call	cudaMemcpy@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$1000, %ecx
	movl	$2, %edi
	leaq	.LC6(%rip), %rsi
	subq	%r14, %rax
	movl	$2147483647, %r14d
	cqto
	idivq	%rcx
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC5(%rip), %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
.L23:
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	xorl	%edx, %edx
	movq	%r13, %rdi
	movl	%eax, %eax
	divq	%r14
	movl	$1, %eax
	testq	%rdx, %rdx
	cmove	%rax, %rdx
	movq	%rdx, 40(%rsp)
	call	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	movss	%xmm0, 0(%rbp,%r15,4)
	incq	%r15
	cmpq	$10000000, %r15
	jne	.L23
	xorl	%r15d, %r15d
	movl	$2147483647, %r14d
.L24:
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	xorl	%edx, %edx
	movq	%r13, %rdi
	movl	%eax, %eax
	divq	%r14
	movl	$1, %eax
	testq	%rdx, %rdx
	cmove	%rax, %rdx
	movq	%rdx, 40(%rsp)
	call	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	$10000000, %r15
	jne	.L24
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$10000000, %ecx
	movq	%r12, %rdx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	movq	%rax, %r13
	call	_Z10serial_addPfS_S_i
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$1000, %ecx
	movl	$2, %edi
	leaq	.LC7(%rip), %rsi
	subq	%r13, %rax
	cqto
	idivq	%rcx
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC5(%rip), %xmm0
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4208:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353215
	.align 4
.LC3:
	.long	805306368
	.align 4
.LC4:
	.long	1065353216
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1077477376
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <chrono>
#include <random>
#include <limits>


void serial_add(float* A, float* B, float* C, int N) {
    for (int i = 0; i < N; i++) {
        C[i] = A[i] + B[i];
    }
}


/**
 * @brief void vecAdd(float* A, float* B, float* C)
 *        Adds elements of vectors A and B and stores them in vector D
 * @param A: vector addend
 * @param B: vector addend
 * @param C: pointer to where the result of A + B will be stored
 * @return C: pointer to address where A + B will be stored
 */
__global__ void vecAdd(float* A, float* B, float* C) {
    int i = threadIdx.x;
    C[i] = A[i] + B[i];
}

int main() {
    int N = 10000000;

    float* A = (float*)malloc(N * sizeof(float));
    float* B = (float*)malloc(N * sizeof(float));
    float* C = (float*)malloc(N * sizeof(float));

    for (int i = 0; i < N; i++) {
        unsigned seed = std::chrono::system_clock::now().time_since_epoch().count();
        std::default_random_engine generator (seed);
        float d = std::generate_canonical<float, std::numeric_limits<float>::digits>(generator);
        A[i] = d;
    }

    for (int i = 0; i < N; i++) {
        unsigned seed = std::chrono::system_clock::now().time_since_epoch().count();
        std::default_random_engine generator (seed);
        float d = std::generate_canonical<float, std::numeric_limits<float>::digits>(generator);
        B[i] = d;
    }

    float* dev_A;
    float* dev_B;
    float* dev_C;

    hipMalloc((void**) &dev_A, N * sizeof(float));
    hipMalloc((void**) &dev_B, N * sizeof(float));
    hipMalloc((void**) &dev_C, N * sizeof(float));

    hipMemcpy(dev_A, A, N * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(dev_B, B, N * sizeof(float), hipMemcpyHostToDevice);

    auto start = std::chrono::high_resolution_clock::now();
    vecAdd<<<1, N>>>(dev_A, dev_B, dev_C);
    hipMemcpy(C, dev_C, N * sizeof(float), hipMemcpyDeviceToHost);
    auto end = std::chrono::high_resolution_clock::now();
    printf("GPU Compute Time: %u\n", std::chrono::duration_cast<std::chrono::microseconds>(end - start).count() / 25.0);
    hipFree(dev_A);
    hipFree(dev_B);
    hipFree(dev_C);

    for (int i = 0; i < N; i++) {
        unsigned seed = std::chrono::system_clock::now().time_since_epoch().count();
        std::default_random_engine generator (seed);
        float d = std::generate_canonical<float, std::numeric_limits<float>::digits>(generator);
        A[i] = d;
    }

    for (int i = 0; i < N; i++) {
        unsigned seed = std::chrono::system_clock::now().time_since_epoch().count();
        std::default_random_engine generator (seed);
        float d = std::generate_canonical<float, std::numeric_limits<float>::digits>(generator);
        B[i] = d;
    }

    start = std::chrono::high_resolution_clock::now();
    serial_add(A, B, C, N);
    end = std::chrono::high_resolution_clock::now();
    printf("CPU Compute Time: %u\n", std::chrono::duration_cast<std::chrono::microseconds>(end - start).count() / 25.0);

    free(A);
    free(B);
    free(C);

    return 0;
}
	.text
	.file	"kernel_vector_add.hip"
	.globl	_Z10serial_addPfS_S_i           # -- Begin function _Z10serial_addPfS_S_i
	.type	_Z10serial_addPfS_S_i,@function
_Z10serial_addPfS_S_i:                  # @_Z10serial_addPfS_S_i
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB0_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ecx, %eax
	xorl	%ecx, %ecx
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%rsi,%rcx,4), %xmm0
	movss	%xmm0, (%rdx,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB0_2
.LBB0_3:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z10serial_addPfS_S_i, .Lfunc_end0-_Z10serial_addPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__vecAddPfS_S_ # -- Begin function _Z21__device_stub__vecAddPfS_S_
	.type	_Z21__device_stub__vecAddPfS_S_,@function
_Z21__device_stub__vecAddPfS_S_:        # @_Z21__device_stub__vecAddPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6vecAddPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__vecAddPfS_S_, .Lfunc_end1-_Z21__device_stub__vecAddPfS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x4039000000000000              # double 25
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$40000000, %edi                 # imm = 0x2625A00
	callq	malloc
	movq	%rax, %rbx
	movl	$40000000, %edi                 # imm = 0x2625A00
	callq	malloc
	movq	%rax, %r14
	movl	$40000000, %edi                 # imm = 0x2625A00
	callq	malloc
	movq	%rax, %r15
	xorl	%r13d, %r13d
	leaq	8(%rsp), %r12
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movl	%eax, %ecx
	leaq	(%rcx,%rcx,2), %rcx
	shrq	$32, %rcx
	movl	%eax, %edx
	subl	%ecx, %edx
	shrl	%edx
	addl	%ecx, %edx
	shrl	$30, %edx
	movl	%edx, %ecx
	shll	$31, %ecx
	orl	%edx, %ecx
	leal	(%rax,%rcx), %edx
	cmpl	$1, %edx
	adcl	%eax, %ecx
	movq	%rcx, 8(%rsp)
	movq	%r12, %rdi
	callq	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	movss	%xmm0, (%rbx,%r13,4)
	incq	%r13
	cmpq	$10000000, %r13                 # imm = 0x989680
	jne	.LBB2_1
# %bb.2:                                # %.preheader87.preheader
	xorl	%r13d, %r13d
	leaq	8(%rsp), %r12
.LBB2_3:                                # %.preheader87
                                        # =>This Inner Loop Header: Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movl	%eax, %ecx
	leaq	(%rcx,%rcx,2), %rcx
	shrq	$32, %rcx
	movl	%eax, %edx
	subl	%ecx, %edx
	shrl	%edx
	addl	%ecx, %edx
	shrl	$30, %edx
	movl	%edx, %ecx
	shll	$31, %ecx
	orl	%edx, %ecx
	leal	(%rax,%rcx), %edx
	cmpl	$1, %edx
	adcl	%eax, %ecx
	movq	%rcx, 8(%rsp)
	movq	%r12, %rdi
	callq	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	movss	%xmm0, (%r14,%r13,4)
	incq	%r13
	cmpq	$10000000, %r13                 # imm = 0x989680
	jne	.LBB2_3
# %bb.4:
	leaq	8(%rsp), %r12
	movl	$40000000, %esi                 # imm = 0x2625A00
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %r13
	movl	$40000000, %esi                 # imm = 0x2625A00
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$40000000, %esi                 # imm = 0x2625A00
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$40000000, %edx                 # imm = 0x2625A00
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$40000000, %edx                 # imm = 0x2625A00
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	9999999(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	8(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	callq	_Z21__device_stub__vecAddPfS_S_
.LBB2_6:
	movq	24(%rsp), %rsi
	movl	$40000000, %edx                 # imm = 0x2625A00
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%r12, %rax
	movabsq	$2361183241434822607, %r13      # imm = 0x20C49BA5E353F7CF
	imulq	%r13
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$7, %rdx
	addq	%rax, %rdx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rdx, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	xorl	%ebp, %ebp
	leaq	16(%rsp), %r12
.LBB2_7:                                # =>This Inner Loop Header: Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movl	%eax, %ecx
	leaq	(%rcx,%rcx,2), %rcx
	shrq	$32, %rcx
	movl	%eax, %edx
	subl	%ecx, %edx
	shrl	%edx
	addl	%ecx, %edx
	shrl	$30, %edx
	movl	%edx, %ecx
	shll	$31, %ecx
	orl	%edx, %ecx
	leal	(%rax,%rcx), %edx
	cmpl	$1, %edx
	adcl	%eax, %ecx
	movq	%rcx, 16(%rsp)
	movq	%r12, %rdi
	callq	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	movss	%xmm0, (%rbx,%rbp,4)
	incq	%rbp
	cmpq	$10000000, %rbp                 # imm = 0x989680
	jne	.LBB2_7
# %bb.8:                                # %.preheader.preheader
	xorl	%ebp, %ebp
	leaq	16(%rsp), %r12
.LBB2_9:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movl	%eax, %ecx
	leaq	(%rcx,%rcx,2), %rcx
	shrq	$32, %rcx
	movl	%eax, %edx
	subl	%ecx, %edx
	shrl	%edx
	addl	%ecx, %edx
	shrl	$30, %edx
	movl	%edx, %ecx
	shll	$31, %ecx
	orl	%edx, %ecx
	leal	(%rax,%rcx), %edx
	cmpl	$1, %edx
	adcl	%eax, %ecx
	movq	%rcx, 16(%rsp)
	movq	%r12, %rdi
	callq	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	movss	%xmm0, (%r14,%rbp,4)
	incq	%rbp
	cmpq	$10000000, %rbp                 # imm = 0x989680
	jne	.LBB2_9
# %bb.10:
	xorl	%ebp, %ebp
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
.LBB2_11:                               # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rbx,%rbp,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%r14,%rbp,4), %xmm0
	movss	%xmm0, (%r15,%rbp,4)
	incq	%rbp
	cmpq	$10000000, %rbp                 # imm = 0x989680
	jne	.LBB2_11
# %bb.12:                               # %_Z10serial_addPfS_S_i.exit
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%r12, %rax
	imulq	%r13
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$7, %rdx
	addq	%rax, %rdx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rdx, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
.LCPI3_0:
	.quad	0x41dfffffff800000              # double 2147483646
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI3_1:
	.long	0x40000000                      # float 2
.LCPI3_2:
	.long	0x5f000000                      # float 9.22337203E+18
.LCPI3_3:
	.long	0x3f800000                      # float 1
	.section	.text._ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_,"axG",@progbits,_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_,comdat
	.weak	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	.type	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_,@function
_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_: # @_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$64, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	fldl	.LCPI3_0(%rip)
	fstpt	(%rsp)
	callq	logl
	fstpt	52(%rsp)                        # 10-byte Folded Spill
	flds	.LCPI3_1(%rip)
	fstpt	(%rsp)
	callq	logl
	fldt	52(%rsp)                        # 10-byte Folded Reload
	fdivp	%st, %st(1)
	flds	.LCPI3_2(%rip)
	xorl	%ecx, %ecx
	fxch	%st(1)
	fucomi	%st(1), %st
	fldz
	fcmovnb	%st(2), %st
	fstp	%st(2)
	fsubp	%st, %st(1)
	setae	%cl
	fnstcw	28(%rsp)
	movzwl	28(%rsp), %eax
	orl	$3072, %eax                     # imm = 0xC00
	movw	%ax, 30(%rsp)
	fldcw	30(%rsp)
	fistpll	40(%rsp)
	fldcw	28(%rsp)
	shlq	$63, %rcx
	xorq	40(%rsp), %rcx
	leaq	23(%rcx), %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %rcx
	cmpq	$1, %rax
	adcq	$0, %rcx
	movq	(%rbx), %rsi
	xorps	%xmm0, %xmm0
	movss	.LCPI3_3(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movabsq	$8589934597, %rdi               # imm = 0x200000005
.LBB3_1:                                # %select.unfold
                                        # =>This Inner Loop Header: Depth=1
	imulq	$16807, %rsi, %rsi              # imm = 0x41A7
	movq	%rsi, %rax
	mulq	%rdi
	movq	%rsi, %rax
	subq	%rdx, %rax
	shrq	%rax
	addq	%rdx, %rax
	shrq	$30, %rax
	movq	%rax, %rdx
	shlq	$31, %rdx
	subq	%rdx, %rax
	leaq	(%rsi,%rax), %rdx
	decq	%rdx
	testq	%rdx, %rdx
	js	.LBB3_2
# %bb.3:                                # %select.unfold
                                        #   in Loop: Header=BB3_1 Depth=1
	xorps	%xmm2, %xmm2
	cvtsi2ss	%rdx, %xmm2
	jmp	.LBB3_4
.LBB3_2:                                #   in Loop: Header=BB3_1 Depth=1
	movq	%rdx, %r8
	shrq	%r8
	andl	$1, %edx
	orq	%r8, %rdx
	xorps	%xmm2, %xmm2
	cvtsi2ss	%rdx, %xmm2
	addss	%xmm2, %xmm2
.LBB3_4:                                # %select.unfold
                                        #   in Loop: Header=BB3_1 Depth=1
	addq	%rax, %rsi
	mulss	%xmm1, %xmm2
	movss	%xmm1, 36(%rsp)
	flds	36(%rsp)
	fmull	.LCPI3_0(%rip)
	addss	%xmm2, %xmm0
	fstps	32(%rsp)
	movss	32(%rsp), %xmm1                 # xmm1 = mem[0],zero,zero,zero
	decq	%rcx
	jne	.LBB3_1
# %bb.5:
	movq	%rsi, (%rbx)
	divss	%xmm1, %xmm0
	ucomiss	.LCPI3_3(%rip), %xmm0
	jae	.LBB3_7
# %bb.6:
	addq	$64, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB3_7:
	.cfi_def_cfa_offset 80
	movss	.LCPI3_3(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	xorps	%xmm1, %xmm1
	addq	$64, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	nextafterf                      # TAILCALL
.Lfunc_end3:
	.size	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_, .Lfunc_end3-_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6vecAddPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6vecAddPfS_S_,@object         # @_Z6vecAddPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z6vecAddPfS_S_
	.p2align	3, 0x0
_Z6vecAddPfS_S_:
	.quad	_Z21__device_stub__vecAddPfS_S_
	.size	_Z6vecAddPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"GPU Compute Time: %u\n"
	.size	.L.str, 22

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"CPU Compute Time: %u\n"
	.size	.L.str.1, 22

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6vecAddPfS_S_"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__vecAddPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6vecAddPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6vecAddPfS_S_         ; -- Begin function _Z6vecAddPfS_S_
	.globl	_Z6vecAddPfS_S_
	.p2align	8
	.type	_Z6vecAddPfS_S_,@function
_Z6vecAddPfS_S_:                        ; @_Z6vecAddPfS_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 2, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v0, s[4:5]
	global_load_b32 v2, v0, s[6:7]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6vecAddPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6vecAddPfS_S_, .Lfunc_end0-_Z6vecAddPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 72
; NumSgprs: 8
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6vecAddPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z6vecAddPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
