#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>

void secuential(const int a[] ,const int b[], int c[], const unsigned int sqrt_dim);
     
__global__ void multiply(  const int* A, const int* B,int* C, int width, int tile_width)
{

    float Csub = 0;
	
    for (int a = width * tile_width * blockIdx.y, b = tile_width * blockIdx.x; a <= width * tile_width * blockIdx.y + width - 1; a += tile_width, b +=  tile_width * width)
    {
		extern __shared__ int shared[];

		int *As=&shared[0];
		int *Bs=&shared[tile_width*tile_width];
        As[threadIdx.y+tile_width*threadIdx.x] = A[a + width * threadIdx.y + threadIdx.x];
        Bs[threadIdx.y+tile_width*threadIdx.x] = B[b + width * threadIdx.y + threadIdx.x];
        __syncthreads();

        for (int k = 0; k < tile_width; ++k)
        {
			Csub += As[threadIdx.y+tile_width*k] * Bs[threadIdx.x+tile_width*k]; //a*b^t
        }
		
        __syncthreads();
    }
    int c = width * tile_width * blockIdx.y + tile_width * blockIdx.x;
    C[c + width * threadIdx.y + threadIdx.x] = Csub;
	C[c + width * threadIdx.y + threadIdx.x]+=B[c + width * threadIdx.y + threadIdx.x] + A[c + width * threadIdx.x + threadIdx.y];

}

void init(int *a, int size, int val)
{
    for (int i = 0; i < size; ++i)
    {
        a[i] = val;
    }

}

int main(int argc, char** argv)
{
	clock_t time_begin;
	unsigned int size_array  = (argc > 1)? atoi (argv[1]): 1024;
	unsigned int tile_width = (argc > 2)? atoi (argv[2]): 2;	
	bool verbose= (argc>3)? (argv[3][0]=='v'): false;

   int* h_array1 = (int*) malloc(sizeof(int) * size_array*size_array); 
   int* h_array2 = (int*) malloc(sizeof(int) * size_array*size_array);
   int* h_array3 = (int*) malloc(sizeof(int) * size_array*size_array);
   int* h_array_sec = (int*) malloc(sizeof(int) * size_array*size_array);
 

   init(h_array1, size_array*size_array,1);
   init(h_array2, size_array*size_array,1);
    
	if(verbose){
		printf("A:\n");
		for(int i=0; i<size_array*size_array; i++){
			printf("%i\t", h_array1[i]); 
			if((i+1)%size_array==0) printf("\n");
		}
		printf("\n");
		printf("B:\n");
		for(int i=0; i<size_array*size_array; i++){
			printf("%i\t", h_array2[i]);
			if((i+1)%size_array==0) printf("\n");
		}
		printf("\n");
	}
  
   int *d_array1,*d_array2, *d_array3;
   cudaMalloc((void**) &d_array1, sizeof(int) * size_array*size_array);
   cudaMalloc((void**) &d_array2, sizeof(int) * size_array*size_array);
   cudaMalloc((void**) &d_array3, sizeof(int) * size_array*size_array);
   cudaMemcpy(d_array1, h_array1, sizeof(int) * size_array*size_array, cudaMemcpyHostToDevice);
   cudaMemcpy(d_array2, h_array2, sizeof(int) * size_array*size_array, cudaMemcpyHostToDevice);

   dim3 bloque(tile_width, tile_width);
   dim3 grid(size_array / bloque.x, size_array / bloque.y);
   time_begin=clock();
   multiply<<< grid, bloque, tile_width*tile_width*tile_width*tile_width >>>( d_array1, d_array2,d_array3, size_array, tile_width);
   cudaMemcpy(h_array3, d_array3, sizeof(int) * size_array*size_array, cudaMemcpyDeviceToHost);
   printf("GPU time: %f seconds\n", (((float)clock() - (float)time_begin) / 1000000.0F ) * 1000  ); 

   if(verbose){
		printf("Array C=B + AB^t + A^t :\n");
		for(int i=0; i<size_array*size_array; i++){
			printf("%i\t", h_array3[i]);
			if((i+1)%size_array==0) printf("\n");
		}
	}
	time_begin=clock();
	secuential(h_array1, h_array2, h_array_sec, size_array);
	printf("CPU time: %f seconds\n", (((float)clock() - (float)time_begin) / 1000000.0F ) * 1000  ); 

	bool b=true;
	for(int i=0; i<size_array; i++){
		if(h_array_sec[i] !=  h_array3[i]){
			printf("GPU and CPU have different results (at least) at position %i\n", i);
			b=false;
			break;		
		}
	}
	if(b)
		printf("GPU and CPU have the same results\n");
   free(h_array1);
   free(h_array2);
   free(h_array3);
   cudaFree(d_array1);
   cudaFree(d_array2);
   cudaFree(d_array3);
 
}

void secuential(const int a[] ,const int b[], int c[], const unsigned int sqrt_dim){
	int dim = sqrt_dim* sqrt_dim;
	int index_i, index_j;
	//int *c= (int *)malloc ( dim * sizeof(int));
	for(int i=0; i< dim; i++){
		index_i = (int)i%sqrt_dim; 
		index_j = (i-index_i)/sqrt_dim;
		c[i]= b[i]; //c= b
		c[i]+= a[index_j+ index_i * sqrt_dim]; //c+= a^t
		for(int j=0;j<sqrt_dim;j++){ //row of first matrix
			c[i]+=a[j+index_j * sqrt_dim ]*b[j + index_i*sqrt_dim]; //c+= a*b^t
		}
	}

	/*printf("Sequential result: Array C=B + AB^t + A^t :\n");
    for(int i=0; i<dim; i++){
        printf("%i\t", c[i]);
		if((i+1)%(int)(sqrt((float)dim))==0)
			printf("\n");
	}
	printf("\n");*/
	//free(c);
}

	.file	"tmpxft_00228f5c_00000000-6_entrega2_1.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z4initPiii
	.type	_Z4initPiii, @function
_Z4initPiii:
.LFB2027:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L3:
	cmpl	%eax, %esi
	jle	.L6
	movl	%edx, (%rdi,%rax,4)
	incq	%rax
	jmp	.L3
.L6:
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z4initPiii, .-_Z4initPiii
	.globl	_Z10secuentialPKiS0_Pij
	.type	_Z10secuentialPKiS0_Pij, @function
_Z10secuentialPKiS0_Pij:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rsi, %r10
	movq	%rdi, %r9
	movq	%rdx, %r11
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%esi, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%ecx, %ebx
	imull	%ecx, %ebx
.L8:
	movl	%esi, %eax
	cmpl	%esi, %ebx
	jle	.L13
	xorl	%edx, %edx
	movl	(%r10,%rsi,4), %edi
	divl	%ecx
	movl	%edi, (%r11,%rsi,4)
	movl	%esi, %eax
	movl	%edx, %r8d
	subl	%edx, %eax
	xorl	%edx, %edx
	divl	%ecx
	movl	%r8d, %edx
	imull	%ecx, %edx
	leal	(%rax,%rdx), %r8d
	imull	%ecx, %eax
	addl	(%r9,%r8,4), %edi
	xorl	%r8d, %r8d
.L9:
	movl	%edi, (%r11,%rsi,4)
	cmpl	%ecx, %r8d
	je	.L14
	leal	(%rax,%r8), %ebp
	leal	(%rdx,%r8), %r12d
	incl	%r8d
	movl	(%r9,%rbp,4), %ebp
	imull	(%r10,%r12,4), %ebp
	addl	%ebp, %edi
	jmp	.L9
.L14:
	incq	%rsi
	jmp	.L8
.L13:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10secuentialPKiS0_Pij, .-_Z10secuentialPKiS0_Pij
	.globl	_Z35__device_stub__Z8multiplyPKiS0_PiiiPKiS0_Piii
	.type	_Z35__device_stub__Z8multiplyPKiS0_PiiiPKiS0_Piii, @function
_Z35__device_stub__Z8multiplyPKiS0_PiiiPKiS0_Piii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8multiplyPKiS0_Piii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L15:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z35__device_stub__Z8multiplyPKiS0_PiiiPKiS0_Piii, .-_Z35__device_stub__Z8multiplyPKiS0_PiiiPKiS0_Piii
	.globl	_Z8multiplyPKiS0_Piii
	.type	_Z8multiplyPKiS0_Piii, @function
_Z8multiplyPKiS0_Piii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z8multiplyPKiS0_PiiiPKiS0_Piii
	.cfi_endproc
.LFE2055:
	.size	_Z8multiplyPKiS0_Piii, .-_Z8multiplyPKiS0_Piii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"A:\n"
.LC1:
	.string	"%i\t"
.LC2:
	.string	"\n"
.LC3:
	.string	"B:\n"
.LC6:
	.string	"GPU time: %f seconds\n"
.LC7:
	.string	"CPU time: %f seconds\n"
.LC8:
	.string	"Array C=B + AB^t + A^t :\n"
.LC9:
	.string	"GPU and CPU have different results (at least) at position %i\n"
.LC10:
	.string	"GPU and CPU have the same results\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	cmpl	$1, %edi
	jle	.L39
	movl	%edi, %r13d
	movq	8(%rsi), %rdi
	movq	%rsi, %r12
	call	atoi@PLT
	movl	%eax, %ebx
	cmpl	$2, %r13d
	je	.L40
	movq	16(%r12), %rdi
	xorl	%r14d, %r14d
	call	atoi@PLT
	movl	%eax, %ebp
	cmpl	$3, %r13d
	je	.L21
	movq	24(%r12), %rax
	cmpb	$118, (%rax)
	sete	%r14b
	jmp	.L21
.L39:
	movl	$2, %ebp
	movl	$1024, %ebx
	jmp	.L47
.L40:
	movl	$2, %ebp
.L47:
	xorl	%r14d, %r14d
.L21:
	movl	%ebx, %eax
	movl	%ebx, %r13d
	imulq	%rax, %rax
	imull	%ebx, %r13d
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %edx
	movl	%r13d, %esi
	movq	%rax, 24(%rsp)
	call	_Z4initPiii
	movq	16(%rsp), %rdi
	call	_Z4initPiii
	testb	%r14b, %r14b
	je	.L22
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r15d, %r15d
	call	__printf_chk@PLT
.L23:
	cmpl	%r13d, %r15d
	jnb	.L48
	movq	8(%rsp), %rax
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movl	(%rax,%r15,4), %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leal	1(%r15), %eax
	xorl	%edx, %edx
	divl	%ebx
	testl	%edx, %edx
	jne	.L24
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L24:
	incq	%r15
	jmp	.L23
.L48:
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r15d, %r15d
	call	__printf_chk@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L26:
	cmpl	%r13d, %r15d
	jnb	.L49
	movq	16(%rsp), %rax
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movl	(%rax,%r15,4), %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leal	1(%r15), %eax
	xorl	%edx, %edx
	divl	%ebx
	testl	%edx, %edx
	jne	.L27
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L27:
	incq	%r15
	jmp	.L26
.L49:
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L22:
	movq	(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	40(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movq	(%rsp), %rdx
	call	cudaMemcpy@PLT
	xorl	%edx, %edx
	movl	%ebx, %eax
	movl	$1, 72(%rsp)
	divl	%ebp
	movl	$1, 84(%rsp)
	movl	%eax, 76(%rsp)
	movl	%eax, 80(%rsp)
	call	clock@PLT
	movl	%ebp, %r8d
	movl	%ebp, 64(%rsp)
	movl	72(%rsp), %ecx
	imull	%ebp, %r8d
	movl	%ebp, 68(%rsp)
	movq	76(%rsp), %rdi
	xorl	%r9d, %r9d
	movq	64(%rsp), %rdx
	movl	84(%rsp), %esi
	movq	%rax, %r15
	imull	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	%ebp, %r8d
	movl	%ebx, %ecx
	movq	40(%rsp), %rdi
	call	_Z35__device_stub__Z8multiplyPKiS0_PiiiPKiS0_Piii
.L29:
	movq	56(%rsp), %rsi
	movq	(%rsp), %rdx
	movq	%r12, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	call	clock@PLT
	cvtsi2ssq	%r15, %xmm1
	movl	$2, %edi
	leaq	.LC6(%rip), %rsi
	cvtsi2ssq	%rax, %xmm0
	movb	$1, %al
	subss	%xmm1, %xmm0
	divss	.LC4(%rip), %xmm0
	mulss	.LC5(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	testb	%r14b, %r14b
	jne	.L30
.L35:
	call	clock@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	%ebx, %ecx
	movq	8(%rsp), %rdi
	movq	%rax, %rbp
	call	_Z10secuentialPKiS0_Pij
	call	clock@PLT
	cvtsi2ssq	%rbp, %xmm1
	movl	$2, %edi
	leaq	.LC7(%rip), %rsi
	cvtsi2ssq	%rax, %xmm0
	movb	$1, %al
	subss	%xmm1, %xmm0
	divss	.LC4(%rip), %xmm0
	mulss	.LC5(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	xorl	%edx, %edx
	jmp	.L31
.L30:
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r14d, %r14d
	call	__printf_chk@PLT
	leaq	.LC1(%rip), %rbp
.L32:
	cmpl	%r13d, %r14d
	jnb	.L35
	movl	(%r12,%r14,4), %edx
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leal	1(%r14), %eax
	xorl	%edx, %edx
	divl	%ebx
	testl	%edx, %edx
	jne	.L33
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L33:
	incq	%r14
	jmp	.L32
.L42:
	movq	%rax, %rdx
.L31:
	cmpl	%ebx, %edx
	jnb	.L50
	movq	24(%rsp), %rcx
	movl	(%r12,%rdx,4), %esi
	leaq	1(%rdx), %rax
	cmpl	%esi, (%rcx,%rdx,4)
	je	.L42
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L36
.L50:
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L36:
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z8multiplyPKiS0_Piii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8multiplyPKiS0_Piii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC4:
	.long	1232348160
	.align 4
.LC5:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include "hip/hip_runtime.h"


#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>

void secuential(const int a[] ,const int b[], int c[], const unsigned int sqrt_dim);
     
__global__ void multiply(  const int* A, const int* B,int* C, int width, int tile_width)
{

    float Csub = 0;
	
    for (int a = width * tile_width * blockIdx.y, b = tile_width * blockIdx.x; a <= width * tile_width * blockIdx.y + width - 1; a += tile_width, b +=  tile_width * width)
    {
		extern __shared__ int shared[];

		int *As=&shared[0];
		int *Bs=&shared[tile_width*tile_width];
        As[threadIdx.y+tile_width*threadIdx.x] = A[a + width * threadIdx.y + threadIdx.x];
        Bs[threadIdx.y+tile_width*threadIdx.x] = B[b + width * threadIdx.y + threadIdx.x];
        __syncthreads();

        for (int k = 0; k < tile_width; ++k)
        {
			Csub += As[threadIdx.y+tile_width*k] * Bs[threadIdx.x+tile_width*k]; //a*b^t
        }
		
        __syncthreads();
    }
    int c = width * tile_width * blockIdx.y + tile_width * blockIdx.x;
    C[c + width * threadIdx.y + threadIdx.x] = Csub;
	C[c + width * threadIdx.y + threadIdx.x]+=B[c + width * threadIdx.y + threadIdx.x] + A[c + width * threadIdx.x + threadIdx.y];

}

void init(int *a, int size, int val)
{
    for (int i = 0; i < size; ++i)
    {
        a[i] = val;
    }

}

int main(int argc, char** argv)
{
	clock_t time_begin;
	unsigned int size_array  = (argc > 1)? atoi (argv[1]): 1024;
	unsigned int tile_width = (argc > 2)? atoi (argv[2]): 2;	
	bool verbose= (argc>3)? (argv[3][0]=='v'): false;

   int* h_array1 = (int*) malloc(sizeof(int) * size_array*size_array); 
   int* h_array2 = (int*) malloc(sizeof(int) * size_array*size_array);
   int* h_array3 = (int*) malloc(sizeof(int) * size_array*size_array);
   int* h_array_sec = (int*) malloc(sizeof(int) * size_array*size_array);
 

   init(h_array1, size_array*size_array,1);
   init(h_array2, size_array*size_array,1);
    
	if(verbose){
		printf("A:\n");
		for(int i=0; i<size_array*size_array; i++){
			printf("%i\t", h_array1[i]); 
			if((i+1)%size_array==0) printf("\n");
		}
		printf("\n");
		printf("B:\n");
		for(int i=0; i<size_array*size_array; i++){
			printf("%i\t", h_array2[i]);
			if((i+1)%size_array==0) printf("\n");
		}
		printf("\n");
	}
  
   int *d_array1,*d_array2, *d_array3;
   hipMalloc((void**) &d_array1, sizeof(int) * size_array*size_array);
   hipMalloc((void**) &d_array2, sizeof(int) * size_array*size_array);
   hipMalloc((void**) &d_array3, sizeof(int) * size_array*size_array);
   hipMemcpy(d_array1, h_array1, sizeof(int) * size_array*size_array, hipMemcpyHostToDevice);
   hipMemcpy(d_array2, h_array2, sizeof(int) * size_array*size_array, hipMemcpyHostToDevice);

   dim3 bloque(tile_width, tile_width);
   dim3 grid(size_array / bloque.x, size_array / bloque.y);
   time_begin=clock();
   multiply<<< grid, bloque, tile_width*tile_width*tile_width*tile_width >>>( d_array1, d_array2,d_array3, size_array, tile_width);
   hipMemcpy(h_array3, d_array3, sizeof(int) * size_array*size_array, hipMemcpyDeviceToHost);
   printf("GPU time: %f seconds\n", (((float)clock() - (float)time_begin) / 1000000.0F ) * 1000  ); 

   if(verbose){
		printf("Array C=B + AB^t + A^t :\n");
		for(int i=0; i<size_array*size_array; i++){
			printf("%i\t", h_array3[i]);
			if((i+1)%size_array==0) printf("\n");
		}
	}
	time_begin=clock();
	secuential(h_array1, h_array2, h_array_sec, size_array);
	printf("CPU time: %f seconds\n", (((float)clock() - (float)time_begin) / 1000000.0F ) * 1000  ); 

	bool b=true;
	for(int i=0; i<size_array; i++){
		if(h_array_sec[i] !=  h_array3[i]){
			printf("GPU and CPU have different results (at least) at position %i\n", i);
			b=false;
			break;		
		}
	}
	if(b)
		printf("GPU and CPU have the same results\n");
   free(h_array1);
   free(h_array2);
   free(h_array3);
   hipFree(d_array1);
   hipFree(d_array2);
   hipFree(d_array3);
 
}

void secuential(const int a[] ,const int b[], int c[], const unsigned int sqrt_dim){
	int dim = sqrt_dim* sqrt_dim;
	int index_i, index_j;
	//int *c= (int *)malloc ( dim * sizeof(int));
	for(int i=0; i< dim; i++){
		index_i = (int)i%sqrt_dim; 
		index_j = (i-index_i)/sqrt_dim;
		c[i]= b[i]; //c= b
		c[i]+= a[index_j+ index_i * sqrt_dim]; //c+= a^t
		for(int j=0;j<sqrt_dim;j++){ //row of first matrix
			c[i]+=a[j+index_j * sqrt_dim ]*b[j + index_i*sqrt_dim]; //c+= a*b^t
		}
	}

	/*printf("Sequential result: Array C=B + AB^t + A^t :\n");
    for(int i=0; i<dim; i++){
        printf("%i\t", c[i]);
		if((i+1)%(int)(sqrt((float)dim))==0)
			printf("\n");
	}
	printf("\n");*/
	//free(c);
}

	.text
	.file	"entrega2_1.hip"
	.globl	_Z23__device_stub__multiplyPKiS0_Piii # -- Begin function _Z23__device_stub__multiplyPKiS0_Piii
	.type	_Z23__device_stub__multiplyPKiS0_Piii,@function
_Z23__device_stub__multiplyPKiS0_Piii:  # @_Z23__device_stub__multiplyPKiS0_Piii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8multiplyPKiS0_Piii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__multiplyPKiS0_Piii, .Lfunc_end0-_Z23__device_stub__multiplyPKiS0_Piii
	.cfi_endproc
                                        # -- End function
	.globl	_Z4initPiii                     # -- Begin function _Z4initPiii
	.type	_Z4initPiii,@function
_Z4initPiii:                            # @_Z4initPiii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %eax
	xorl	%ecx, %ecx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%edx, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z4initPiii, .Lfunc_end1-_Z4initPiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x49742400                      # float 1.0E+6
.LCPI2_1:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jl	.LBB2_1
# %bb.2:
	movq	%rsi, %rbx
	movl	%edi, %ebp
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r13d
	cmpl	$2, %ebp
	jne	.LBB2_4
# %bb.3:
	movl	$2, (%rsp)                      # 4-byte Folded Spill
	jmp	.LBB2_5
.LBB2_1:
	movl	$2, (%rsp)                      # 4-byte Folded Spill
	movl	$1024, %r13d                    # imm = 0x400
.LBB2_5:
	xorl	%ebp, %ebp
.LBB2_7:                                # %.thread118
	movl	%r13d, %r14d
	movq	%r14, %r12
	imulq	%r14, %r12
	shlq	$2, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	%r12, 24(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	movq	%r15, %r12
	callq	malloc
	imull	%r13d, %r13d
	testl	%r13d, %r13d
	jle	.LBB2_12
# %bb.8:                                # %.lr.ph.preheader.i
	movl	%r13d, %edx
	xorl	%ecx, %ecx
.LBB2_9:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movl	$1, (%rbx,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rdx
	jne	.LBB2_9
# %bb.10:                               # %.lr.ph.i111.preheader
	xorl	%ecx, %ecx
.LBB2_11:                               # %.lr.ph.i111
                                        # =>This Inner Loop Header: Depth=1
	movl	$1, (%r12,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rdx
	jne	.LBB2_11
.LBB2_12:                               # %_Z4initPiii.exit115
	movl	%r13d, 4(%rsp)                  # 4-byte Spill
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movl	%ebp, 20(%rsp)                  # 4-byte Spill
	testb	%bpl, %bpl
	je	.LBB2_25
# %bb.13:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	4(%rsp), %eax                   # 4-byte Reload
	testl	%eax, %eax
	je	.LBB2_23
# %bb.14:                               # %.lr.ph.preheader
	movl	%eax, %ebp
	xorl	%r13d, %r13d
.LBB2_15:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r13,4), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r13
	movl	%r13d, %eax
	xorl	%edx, %edx
	divl	%r14d
	testl	%edx, %edx
	jne	.LBB2_17
# %bb.16:                               #   in Loop: Header=BB2_15 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
.LBB2_17:                               #   in Loop: Header=BB2_15 Depth=1
	cmpq	%r13, %rbp
	jne	.LBB2_15
# %bb.18:                               # %._crit_edge
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	cmpl	$0, 4(%rsp)                     # 4-byte Folded Reload
	je	.LBB2_24
# %bb.19:                               # %.lr.ph124.preheader
	xorl	%r13d, %r13d
.LBB2_20:                               # %.lr.ph124
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r12,%r13,4), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r13
	movl	%r13d, %eax
	xorl	%edx, %edx
	divl	%r14d
	testl	%edx, %edx
	jne	.LBB2_22
# %bb.21:                               #   in Loop: Header=BB2_20 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
.LBB2_22:                               #   in Loop: Header=BB2_20 Depth=1
	cmpq	%r13, %rbp
	jne	.LBB2_20
	jmp	.LBB2_24
.LBB2_4:
	movq	16(%rbx), %rdi
	callq	atoi
	cmpl	$4, %ebp
	movl	%eax, (%rsp)                    # 4-byte Spill
	jb	.LBB2_5
# %bb.6:
	movq	24(%rbx), %rax
	cmpb	$118, (%rax)
	sete	%bpl
	jmp	.LBB2_7
.LBB2_23:                               # %._crit_edge125.critedge
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.Lstr.1, %edi
	callq	puts@PLT
.LBB2_24:                               # %._crit_edge125
	movl	$10, %edi
	callq	putchar@PLT
.LBB2_25:
	leaq	40(%rsp), %r13
	movq	%r13, %rdi
	movq	24(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%rbx, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	(%rsp), %r15d                   # 4-byte Reload
	movl	%r15d, %eax
	movq	%rax, %r13
	shlq	$32, %r13
	orq	%rax, %r13
	movl	%r14d, %eax
	xorl	%edx, %edx
	divl	%r15d
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, %rbp
	shlq	$32, %rbp
	orq	%rax, %rbp
	callq	clock
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movl	%r15d, %r8d
	imull	%r8d, %r8d
	imull	%r8d, %r8d
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_27
# %bb.26:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	%r14d, %ecx
	movl	%r15d, %r8d
	callq	_Z23__device_stub__multiplyPKiS0_Piii
.LBB2_27:
	movq	8(%rsp), %rsi
	movq	56(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	cvtsi2ss	%rax, %xmm0
	cvtsi2ssq	48(%rsp), %xmm1         # 8-byte Folded Reload
	subss	%xmm1, %xmm0
	divss	.LCPI2_0(%rip), %xmm0
	mulss	.LCPI2_1(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	cmpb	$0, 20(%rsp)                    # 1-byte Folded Reload
	movl	4(%rsp), %ebp                   # 4-byte Reload
	je	.LBB2_33
# %bb.28:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	testl	%ebp, %ebp
	je	.LBB2_33
# %bb.29:                               # %.lr.ph128.preheader
	movl	%ebp, %ebp
	xorl	%r13d, %r13d
.LBB2_30:                               # %.lr.ph128
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r15,%r13,4), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r13
	movl	%r13d, %eax
	xorl	%edx, %edx
	divl	%r14d
	testl	%edx, %edx
	jne	.LBB2_32
# %bb.31:                               #   in Loop: Header=BB2_30 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
.LBB2_32:                               #   in Loop: Header=BB2_30 Depth=1
	cmpq	%r13, %rbp
	jne	.LBB2_30
.LBB2_33:                               # %.loopexit
	callq	clock
	movq	%rax, %r13
	movq	%rbx, %rdi
	movq	%r12, %rsi
	movq	64(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	%r14d, %ecx
	callq	_Z10secuentialPKiS0_Pij
	callq	clock
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r13, %xmm1
	subss	%xmm1, %xmm0
	divss	.LCPI2_0(%rip), %xmm0
	mulss	.LCPI2_1(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.6, %edi
	movb	$1, %al
	callq	printf
	testq	%r14, %r14
	je	.LBB2_38
# %bb.34:                               # %.lr.ph132.preheader
	xorl	%esi, %esi
.LBB2_35:                               # %.lr.ph132
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbp,%rsi,4), %eax
	cmpl	(%r15,%rsi,4), %eax
	jne	.LBB2_36
# %bb.37:                               #   in Loop: Header=BB2_35 Depth=1
	incq	%rsi
	cmpq	%rsi, %r14
	jne	.LBB2_35
.LBB2_38:                               # %.critedge
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	jmp	.LBB2_39
.LBB2_36:
	movl	$.L.str.7, %edi
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_39:
	movq	%rbx, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z10secuentialPKiS0_Pij         # -- Begin function _Z10secuentialPKiS0_Pij
	.type	_Z10secuentialPKiS0_Pij,@function
_Z10secuentialPKiS0_Pij:                # @_Z10secuentialPKiS0_Pij
	.cfi_startproc
# %bb.0:
	movl	%ecx, %eax
	imull	%ecx, %eax
	testl	%eax, %eax
	jle	.LBB3_6
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %r8
	cmpl	$1, %ecx
	movl	%ecx, %r10d
	adcl	$0, %r10d
	movl	%eax, %r11d
	xorl	%r9d, %r9d
.LBB3_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_3 Depth 2
	movl	%r9d, %eax
	xorl	%edx, %edx
	divl	%ecx
                                        # kill: def $eax killed $eax def $rax
                                        # kill: def $edx killed $edx def $rdx
	movl	(%rsi,%r9,4), %ebx
	movl	%ebx, (%r8,%r9,4)
	imull	%ecx, %edx
	leal	(%rax,%rdx), %r14d
	addl	(%rdi,%r14,4), %ebx
	movl	%ebx, (%r8,%r9,4)
	imull	%ecx, %eax
	movq	%r10, %r14
	xorl	%r15d, %r15d
.LBB3_3:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rax,%r15), %r12d
	leal	(%rdx,%r15), %r13d
	movl	(%rsi,%r13,4), %ebp
	imull	(%rdi,%r12,4), %ebp
	addl	%ebp, %ebx
	movl	%ebx, (%r8,%r9,4)
	incq	%r15
	decq	%r14
	jne	.LBB3_3
# %bb.4:                                #   in Loop: Header=BB3_2 Depth=1
	incq	%r9
	cmpq	%r11, %r9
	jne	.LBB3_2
# %bb.5:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB3_6:                                # %._crit_edge
	retq
.Lfunc_end3:
	.size	_Z10secuentialPKiS0_Pij, .Lfunc_end3-_Z10secuentialPKiS0_Pij
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8multiplyPKiS0_Piii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8multiplyPKiS0_Piii,@object   # @_Z8multiplyPKiS0_Piii
	.section	.rodata,"a",@progbits
	.globl	_Z8multiplyPKiS0_Piii
	.p2align	3, 0x0
_Z8multiplyPKiS0_Piii:
	.quad	_Z23__device_stub__multiplyPKiS0_Piii
	.size	_Z8multiplyPKiS0_Piii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%i\t"
	.size	.L.str.1, 4

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"GPU time: %f seconds\n"
	.size	.L.str.4, 22

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"CPU time: %f seconds\n"
	.size	.L.str.6, 22

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"GPU and CPU have different results (at least) at position %i\n"
	.size	.L.str.7, 62

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8multiplyPKiS0_Piii"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"A:"
	.size	.Lstr, 3

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"B:"
	.size	.Lstr.1, 3

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Array C=B + AB^t + A^t :"
	.size	.Lstr.2, 25

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"GPU and CPU have the same results"
	.size	.Lstr.3, 34

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__multiplyPKiS0_Piii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8multiplyPKiS0_Piii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8multiplyPKiS0_Piii   ; -- Begin function _Z8multiplyPKiS0_Piii
	.globl	_Z8multiplyPKiS0_Piii
	.p2align	8
	.type	_Z8multiplyPKiS0_Piii,@function
_Z8multiplyPKiS0_Piii:                  ; @_Z8multiplyPKiS0_Piii
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s11, s10
	s_add_i32 s0, s10, -1
	s_mul_i32 s1, s3, s15
	s_mul_i32 s2, s14, s11
	v_add_co_u32 v6, s0, s0, s1
	s_delay_alu instid0(VALU_DEP_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_mov_b32 s0, -1
	s_cbranch_vccz .LBB0_7
; %bb.1:                                ; %.lr.ph64
	v_dual_mov_b32 v4, 0 :: v_dual_and_b32 v1, 0x3ff, v0
	s_mul_i32 s0, s11, s11
	v_bfe_u32 v5, v0, 10, 10
	s_lshl_b32 s0, s0, 2
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_lo_u32 v8, v1, s11
	s_cmp_gt_i32 s11, 0
	s_mov_b32 s13, s1
	s_cselect_b32 s12, -1, 0
	v_mad_u64_u32 v[2:3], null, v5, s10, v[1:2]
	v_cndmask_b32_e64 v12, 0, 1, s12
	v_lshlrev_b32_e32 v9, 2, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_add_lshl_u32 v3, v8, v5, 2
	v_mov_b32_e32 v7, 0
	v_lshl_add_u32 v8, v1, 2, s0
	s_lshl_b32 s12, s11, 2
	s_mov_b32 s14, s2
	v_add_nc_u32_e32 v10, 0, v3
	v_add3_u32 v11, 0, s0, v3
	v_cmp_ne_u32_e64 s0, 1, v12
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	v_add_nc_u32_e32 v3, s13, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[3:4]
	v_add_nc_u32_e32 v3, s14, v2
	v_lshlrev_b64 v[14:15], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s4, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v14, vcc_lo, s6, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s7, v15, vcc_lo
	s_and_b32 vcc_lo, exec_lo, s0
	global_load_b32 v3, v[12:13], off
	global_load_b32 v12, v[14:15], off
	s_waitcnt vmcnt(1)
	ds_store_b32 v10, v3
	s_waitcnt vmcnt(0)
	ds_store_b32 v11, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_5
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s15, 0
	s_mov_b32 s16, s11
.LBB0_4:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v3, s15, v9
	v_add_nc_u32_e32 v12, s15, v8
	s_add_i32 s16, s16, -1
	s_add_i32 s15, s15, s12
	s_cmp_eq_u32 s16, 0
	ds_load_b32 v3, v3
	ds_load_b32 v12, v12
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v3, v12, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v3, v3
	v_add_f32_e32 v7, v7, v3
	s_cbranch_scc0 .LBB0_4
.LBB0_5:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s13, s13, s11
	s_add_i32 s14, s14, s3
	v_cmp_gt_u32_e32 vcc_lo, s13, v6
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccz .LBB0_2
; %bb.6:                                ; %._crit_edge65.loopexit
	v_cvt_i32_f32_e32 v3, v7
	s_mov_b32 s0, 0
	s_branch .LBB0_8
.LBB0_7:
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr1
                                        ; implicit-def: $vgpr2
.LBB0_8:                                ; %Flow91
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB0_10
; %bb.9:                                ; %.._crit_edge65_crit_edge
	v_bfe_u32 v5, v0, 10, 10
	v_and_b32_e32 v1, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v5, s10, v[1:2]
	v_mov_b32_e32 v3, 0
.LBB0_10:                               ; %._crit_edge65
	s_add_i32 s1, s1, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v7, 0 :: v_dual_add_nc_u32 v6, s1, v2
	v_mul_lo_u32 v2, v1, s10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[6:7]
	v_add3_u32 v6, v2, v5, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[4:5], v3, off
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v0, v[0:1], off
	global_load_b32 v1, v[6:7], off
	s_waitcnt vmcnt(0)
	v_add3_u32 v0, v0, v3, v1
	global_store_b32 v[4:5], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8multiplyPKiS0_Piii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8multiplyPKiS0_Piii, .Lfunc_end0-_Z8multiplyPKiS0_Piii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 604
; NumSgprs: 19
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8multiplyPKiS0_Piii
    .private_segment_fixed_size: 0
    .sgpr_count:     19
    .sgpr_spill_count: 0
    .symbol:         _Z8multiplyPKiS0_Piii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
