/*******************************************************************************

This program compares all types of memory learned so far and compares their
Performance

Author: Said Darham
*******************************************************************************/

//Based on the work of Andrew Krepps
#include <stdio.h>
#include <stdlib.h> //srand and rand
#include <math.h>

// Constant data declaration
#define WORKSIZE 1024 // define a default worksize for constant data

// Define different memroy types
#define GLOBAL 1
#define SHARED 2
#define CONSTANT 3
#define REGISTER 4

// Arrays for constant memory on device
__device__ __constant__ int d_a_const[WORKSIZE];
__device__ __constant__ int d_b_const[WORKSIZE];




/*******************************************************************************

                            Print Array and Data Info

*******************************************************************************/
void printArray(int *array, int n, const char* funcDesc){
    //helper function to Print the array of n elements and what function is used
    printf("\n%s: ", funcDesc);
    for(int i = 0; i<n; i++){
      printf("%d ", array[i]);
    }
}
void printDataInfo(int totalThreads){
  //print device info as well as the amount of data for a thread size
  cudaDeviceProp prop;
  cudaGetDeviceProperties(&prop,0);
  const unsigned int bytes = totalThreads*sizeof(int);
  printf("\nDevice: %s\n", prop.name);
  printf("Transfer size (MB): %d\n\n", bytes * bytes / totalThreads);
}


/*******************************************************************************

        PROFILE DATA TRANSFER FUNCTIONS (Host2Device and Device2Host)

*******************************************************************************/
void profileCopiesHostToDevice(int        *d_a,
                               int        *h_a,
                               int        *d_b,
				                       int        *h_b,
                               const unsigned int  bytes,
                               const char         *desc,
                               const int    memType){

  // events for timing
  cudaEvent_t startEvent, stopEvent;
  // create an event
  cudaEventCreate(&startEvent);
  cudaEventCreate(&stopEvent);

  //start a recording event and execute the transfer after
  cudaEventRecord(startEvent, 0);

  // Use either cudaMemcpy or cudaMemcpyToSymbol depending on memory TYPE
  if(memType != CONSTANT){
    cudaMemcpy( d_a, h_a, bytes, cudaMemcpyHostToDevice);
    cudaMemcpy( d_b, h_b, bytes, cudaMemcpyHostToDevice);
  }else if(memType == CONSTANT){
    cudaMemcpyToSymbol( d_a_const, h_a, bytes,0, cudaMemcpyHostToDevice);
    cudaMemcpyToSymbol( d_b_const, h_b, bytes,0, cudaMemcpyHostToDevice);
  }

  cudaEventRecord(stopEvent, 0); //stop
  cudaEventSynchronize(stopEvent);
  //get the elapsed time and print info
  float time;
  cudaEventElapsedTime(&time, startEvent, stopEvent);
  printf("\n%s Transfers Host to Device Time Elaped: %f ms, Bandwidth (MB/s): %f\n\n", desc, time, bytes * 1e-3 / time);

  // clean up events
  cudaEventDestroy(startEvent);
  cudaEventDestroy(stopEvent);
}

void profileCopiesDeviceToHost( int *h_c_add, int *d_c_add, int *h_c_sub, int *d_c_sub,
								                int *h_c_mult, int *d_c_mult, int *h_c_mod, int *d_c_mod,
                                const unsigned int bytes, const char *desc){


  // events for timing
  cudaEvent_t startEvent, stopEvent;
  // create an event
  cudaEventCreate(&startEvent);
  cudaEventCreate(&stopEvent);
  //start a recording event and execute the transfer after
  cudaEventRecord(startEvent, 0);

  cudaMemcpy( h_c_add, d_c_add, bytes, cudaMemcpyDeviceToHost);
  cudaMemcpy( h_c_sub, d_c_sub, bytes, cudaMemcpyDeviceToHost);
  cudaMemcpy( h_c_mult, d_c_mult, bytes, cudaMemcpyDeviceToHost);
  cudaMemcpy( h_c_mod, d_c_mod, bytes, cudaMemcpyDeviceToHost);

  cudaEventRecord(stopEvent, 0);//stop
  cudaEventSynchronize(stopEvent);
  //get the elapsed time and print info
  float time;
  cudaEventElapsedTime(&time, startEvent, stopEvent);
  printf("\n%s transfers Device To Host Time Elaped: %f ms, Bandwidth (MB/s): %f\n",desc,time, bytes * 1e-3 / time);

  // clean up events
  cudaEventDestroy(startEvent);
  cudaEventDestroy(stopEvent);
}




/*******************************************************************************

        ARITHMETIC KERNEL FUNCTIONS (GLOBAL, SHARED, CONSTANT, REGISTER)

*******************************************************************************/
// Add Functions
__global__ void add(int *a, int *b, int *c, int n){
    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = a[id] + b[id];
}
__global__ void addShared(int *a, int *b, int *c, int n){
    extern __shared__ int res[]; //using shared memory
    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    // Make sure we do not go out of bounds
    if (id < n)
        res[threadIdx.x] = a[id] + b[id];

	__syncthreads(); // wait for all threads in the block to finish
	c[threadIdx.x] = res[threadIdx.x];//since threads from different blocks cannot talk, use thread index instead
}
__global__ void addConst( int *c, int n){
    // Get our global thread ID
    const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    // use the constant data declared
    if (id < n)
        c[id] = d_a_const[id] + d_b_const[id];
}
__global__ void addReg(int *a, int *b, int *c, int n){
  // Get our global thread ID
  const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;
  if (id < n){
    int tempA, tempB, tempC;//use variables in register
    tempA = a[id];
    tempB = b[id];
    tempC = tempA + tempB;
    c[id] = tempC;
  }
}

// subtract functions
__global__ void subtract(int *a, int *b, int *c, int n){
                // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = a[id] - b[id];
}
__global__ void subtractShared(int *a, int *b, int *c, int n){
   extern __shared__ int res[]; //using shared memory

    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        res[threadIdx.x] = a[id] - b[id];

	__syncthreads(); // wait for all threads in the block to finish

	c[threadIdx.x] = res[threadIdx.x];

}
__global__ void subtractConst(int *c, int n){
    // Get our global thread ID
    const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = d_a_const[id] - d_b_const[id];
}
__global__ void subtractReg(int *a, int *b, int *c, int n){
  // Get our global thread ID
  const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;
  if (id < n){
    int tempA, tempB, tempC;//use variables in register
    tempA = a[id];
    tempB = b[id];
    tempC = tempA - tempB;
    c[id] = tempC;
  }
}

// multiply functions
__global__ void mult(int *a, int *b, int *c, int n){
           // Get our global thread ID
   int id = blockIdx.x*blockDim.x+threadIdx.x;

   // Make sure we do not go out of bounds
   if (id < n)
       c[id] = a[id] * b[id];
}
__global__ void multShared(int *a, int *b, int *c, int n){
    extern __shared__ int res[]; //using shared memory
     // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        res[threadIdx.x] = a[id] * b[id];

	__syncthreads(); // wait for all threads in the block to finish

	c[threadIdx.x] = res[threadIdx.x];

}
__global__ void multConst(int *c, int n){
   // Get our global thread ID
   const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;

   // Make sure we do not go out of bounds
   if (id < n)
       c[id] = d_a_const[id] * d_b_const[id];
}
__global__ void multReg(int *a, int *b, int *c, int n){
  // Get our global thread ID
  const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;
  if (id < n){
    int tempA, tempB, tempC;//use variables in register
    tempA = a[id];
    tempB = b[id];
    tempC = tempA * tempB;
    c[id] = tempC;
  }
}

// Moudulu functions
__global__ void mod(int *a, int *b, int *c, int n){

    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = a[id] % b[id];
}
__global__ void modShared(int *a, int *b, int *c, int n){
 extern __shared__ int res[];

    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        res[threadIdx.x] = a[id] % b[id];

	__syncthreads(); // wait for all threads in the block to finish

	c[threadIdx.x] = res[threadIdx.x];
}
__global__ void modConst(int *c, int n){

    // Get our global thread ID
    const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = d_a_const[id] % d_b_const[id];
}
__global__ void modReg(int *a, int *b, int *c, int n){
  // Get our global thread ID
  const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;
  if (id < n){
    int tempA, tempB, tempC;
    tempA = a[id]; //use variables in register
    tempB = b[id];
    tempC = tempA % tempB;
    c[id] = tempC;
  }
}


/*******************************************************************************

        EXECUTION AND PROFILING OF ARITHMETIC FUNCTIONS

*******************************************************************************/
void executeGlobalFunctions(int numBlocks, int totalThreads,
                            int *d_a, int *d_b, int *d_c_add,
                            int *d_c_sub,int *d_c_mult,int *d_c_mod){

      float time;
      // events for timing
      cudaEvent_t startEvent, stopEvent;
      cudaEventCreate(&startEvent);
      cudaEventCreate(&stopEvent);

      //start a recording event and execute the Kernels after
      cudaEventRecord(startEvent, 0);
      //invoking global memory kernels
      add<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_add, totalThreads);
      subtract<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_sub, totalThreads);
      mult<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_mult, totalThreads);
      mod<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_mod, totalThreads);

      cudaEventRecord(stopEvent, 0); //stop
      cudaEventSynchronize(stopEvent);
      //get the elapsed time and print info
      cudaEventElapsedTime(&time, startEvent, stopEvent);
      printf("Global Memory Functions  Elapsed Time: %f\n", time);
       // clean up events
      cudaEventDestroy(startEvent);
      cudaEventDestroy(stopEvent);

}

void executeSharedFunctions(int numBlocks, int totalThreads,
                            int *d_a, int *d_b, int *d_c_add, int *d_c_sub, int *d_c_mult, int *d_c_mod){

      float time;
      // events for timing
      cudaEvent_t startEvent, stopEvent;
      cudaEventCreate(&startEvent);
      cudaEventCreate(&stopEvent);

      //start a recording event and execute the Kernels after
      cudaEventRecord(startEvent, 0);
      //invoking shared memory kernels
      addShared<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_add, totalThreads);
      subtractShared<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_sub, totalThreads);
      multShared<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_mult, totalThreads);
      modShared<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_mod, totalThreads);

      cudaEventRecord(stopEvent, 0); //stop
      cudaEventSynchronize(stopEvent);
      cudaEventElapsedTime(&time, startEvent, stopEvent);
      printf("Shared Memory Functions Elapsed Time: %f\n", time);
       // clean up events
      cudaEventDestroy(startEvent);
      cudaEventDestroy(stopEvent);
}

void executeConstantFunctions(int numBlocks, int totalThreads,
                              int *d_c_add, int *d_c_sub,
                              int *d_c_mult, int *d_c_mod){

      float time;
      // events for timing
      cudaEvent_t startEvent, stopEvent;
      cudaEventCreate(&startEvent);
      cudaEventCreate(&stopEvent);

      //start a recording event and execute the Kernels after
      cudaEventRecord(startEvent, 0);
      //invoking constant memory kernels
      addConst<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_c_add, totalThreads);
      subtractConst<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_c_sub, totalThreads);
      multConst<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>( d_c_mult, totalThreads);
      modConst<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_c_mod, totalThreads);

      cudaEventRecord(stopEvent, 0); //stop
      cudaEventSynchronize(stopEvent);
      cudaEventElapsedTime(&time, startEvent, stopEvent);
      printf("Constant Memory Functions Elapsed Time: %f\n", time);
       // clean up events
      cudaEventDestroy(startEvent);
      cudaEventDestroy(stopEvent);


}
void executeRegisterFunctions(int numBlocks, int totalThreads,
                            int *d_a, int *d_b, int *d_c_add,
                            int *d_c_sub,int *d_c_mult,int *d_c_mod){

      float time;
      // events for timing
      cudaEvent_t startEvent, stopEvent;
      cudaEventCreate(&startEvent);
      cudaEventCreate(&stopEvent);

      //start a recording event and execute the Kernels after
      cudaEventRecord(startEvent, 0);

      //invoke kernels using register memory
      addReg<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_add, totalThreads);
      subtractReg<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_sub, totalThreads);
      multReg<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>( d_a, d_b, d_c_mult, totalThreads);
      modReg<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_mod, totalThreads);

      cudaEventRecord(stopEvent, 0); //stop
      cudaEventSynchronize(stopEvent);
      cudaEventElapsedTime(&time, startEvent, stopEvent);
      printf("Register Memory Functions Elapsed Time: %f\n", time);
       // clean up events
      cudaEventDestroy(startEvent);
      cudaEventDestroy(stopEvent);
}




/*******************************************************************************

        EXECUTION AND PROFILING OF EACH TYPE OF DEVICE MEMORY USED

*******************************************************************************/
void gpuTest(int numBlocks, int totalThreads, const int memoryType){


	// Host input vectors
	int *h_a, *h_b;
	//Host output vectors for different functions "h_c_func"
	int *h_c_add,*h_c_sub,*h_c_mult,*h_c_mod;

	// Device input vectors
	int *d_a, *d_b;
	//Device output vector
	int *d_c_add,*d_c_sub,*d_c_mult,*d_c_mod;

	// Size, in bytes, of each vector
	const unsigned int bytes = totalThreads*sizeof(int);

	// Allocate memory for each vector on host Pinned
	cudaMallocHost((void**)&h_a, bytes);
	cudaMallocHost((void**)&h_b, bytes);
	cudaMallocHost((void**)&h_c_add, bytes);
	cudaMallocHost((void**)&h_c_sub, bytes);
	cudaMallocHost((void**)&h_c_mult, bytes);
	cudaMallocHost((void**)&h_c_mod, bytes);

	// Allocate memory for each intput and output vector on GPU
  if(memoryType != CONSTANT){
    //do not need these vectors for constant memory
    cudaMalloc(&d_a, bytes);
  	cudaMalloc(&d_b, bytes);
  }
	cudaMalloc(&d_c_add, bytes);
	cudaMalloc(&d_c_sub, bytes);
	cudaMalloc(&d_c_mult, bytes);
	cudaMalloc(&d_c_mod, bytes);

	//initialize the input vectors
	for(int i = 0;i<totalThreads;i++){
		//first array is 0 through number of threads
		h_a[i] = i;
		// second array is a random number between 0 and 3
		h_b[i] = rand() % 4;
	}

	//For a selected memory type, copy data form host to device, invoke the kernels and copy data from device to host
  switch(memoryType){
    case GLOBAL:
      printf("\t\t*****Executing Arithmetic Functions Using Global Memory*****\n");
      profileCopiesHostToDevice(d_a, h_a, d_b, h_b, bytes, "Global", GLOBAL);
      executeGlobalFunctions(numBlocks, totalThreads,d_a,d_b,d_c_add,d_c_sub,d_c_mult,d_c_mod);
      profileCopiesDeviceToHost(h_c_add,d_c_add,h_c_sub, d_c_sub,h_c_mult, d_c_mult,h_c_mod, d_c_mod, bytes,"Shared");
      break;
    case SHARED:
      printf("\t\t*****Executing Arithmetic Functions Using Shared Memory*****\n");
      profileCopiesHostToDevice(d_a, h_a, d_b, h_b, bytes, "Shared", SHARED);
      executeSharedFunctions(numBlocks, totalThreads,d_a,d_b,d_c_add,d_c_sub,d_c_mult,d_c_mod);
      profileCopiesDeviceToHost(h_c_add,d_c_add,h_c_sub, d_c_sub,h_c_mult, d_c_mult,h_c_mod, d_c_mod, bytes,"Shared");
      break;
    case CONSTANT:
      printf("\t\t*****Executing Arithmetic Functions Using Constant Memory*****\n");
      profileCopiesHostToDevice(d_a_const, h_a, d_b_const, h_b, bytes, "Constant",CONSTANT);
      executeConstantFunctions(numBlocks, totalThreads,d_c_add,d_c_sub,d_c_mult,d_c_mod);
      profileCopiesDeviceToHost(h_c_add,d_c_add,h_c_sub, d_c_sub,h_c_mult, d_c_mult,h_c_mod, d_c_mod, bytes,"Constant");
      break;
    case REGISTER:
      printf("\t\t*****Executing Arithmetic Functions Using Register Memory*****\n");
      profileCopiesHostToDevice(d_a, h_a, d_b, h_b, bytes, "Register", REGISTER);
      executeRegisterFunctions(numBlocks, totalThreads,d_a,d_b,d_c_add,d_c_sub,d_c_mult,d_c_mod);
      profileCopiesDeviceToHost(h_c_add,d_c_add,h_c_sub, d_c_sub,h_c_mult, d_c_mult,h_c_mod, d_c_mod, bytes,"Register");
      break;
    default:
      printf("Unknown Memory Type!\n");
      break;
  }

  // print the first 7 elements of the inputs and results
  printArray(h_a, 7,"Array 1");
  printArray(h_b, 7,"Array 2");
  printf("\n");
  printArray(h_c_add, 7, "Add Results");
  printArray(h_c_sub, 7, "Subtract Results");
  printArray(h_c_mult, 7, "Multiply Results");
  printArray(h_c_mod, 7, "Modulus Results");
  printf("\n\n");

	//free up space on  GPU
	cudaFree(d_a);
	cudaFree(d_b);
	cudaFree(d_c_add);
	cudaFree(d_c_sub);
	cudaFree(d_c_mult);
	cudaFree(d_c_add);

	//free up space on our CPU use cudaFreeHost since pinnned
	cudaFreeHost(h_a);
	cudaFreeHost(h_b);
	cudaFreeHost(h_c_add);
 	cudaFreeHost(h_c_sub);
	cudaFreeHost(h_c_mult);
	cudaFreeHost(h_c_mod);
}


/*******************************************************************************

                            MAIN

*******************************************************************************/
int main(int argc, char** argv)
{

  int totalThreads = (1 << 10);
  int blockSize = 256;

  //User wants to run the Global vs Pinned Examples
  if( argc > 2 && argc < 4){
    // Ensure the user supplies both number of threads and block size
    // otherwise use default values
    totalThreads = atoi(argv[1]);
    blockSize = atoi(argv[2]);
  }

  int numBlocks = totalThreads/blockSize;

  printf("\nUsing %d Threads and %d BlockSize\n",totalThreads, blockSize);

  // validate command line arguments
  if (totalThreads % blockSize != 0) {
    ++numBlocks;
    totalThreads = numBlocks*blockSize;

    printf("Warning: Total thread count is not evenly divisible by the block size\n");
    printf("The total number of threads will be rounded up to %d\n", totalThreads);
  }

  // Print device and data transfer info
  printDataInfo(totalThreads);

  // execute global memory test
  gpuTest(numBlocks, totalThreads, GLOBAL);
  // execute shared memory test
  gpuTest(numBlocks, totalThreads, SHARED);
  // execute constant memory test
  gpuTest(numBlocks, totalThreads, CONSTANT);
  // execute register memory test
  gpuTest(numBlocks, totalThreads, REGISTER);

  return 0;
}

	.file	"tmpxft_0030adcf_00000000-6_assignment6.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2039:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2039:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function
_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0:
.LFB2212:
	.cfi_startproc
	jmp	cudaLaunchKernel@PLT
	.cfi_endproc
.LFE2212:
	.size	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\n%s: "
.LC1:
	.string	"%d "
	.text
	.globl	_Z10printArrayPiiPKc
	.type	_Z10printArrayPiiPKc, @function
_Z10printArrayPiiPKc:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%eax, %eax
	leaq	.LC1(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	movl	$2, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	leaq	.LC0(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
	call	__printf_chk@PLT
.L4:
	cmpl	%ebx, %ebp
	jle	.L8
	movl	(%r12,%rbx,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L4
.L8:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10printArrayPiiPKc, .-_Z10printArrayPiiPKc
	.section	.rodata.str1.1
.LC2:
	.string	"\nDevice: %s\n"
.LC3:
	.string	"Transfer size (MB): %d\n\n"
	.text
	.globl	_Z13printDataInfoi
	.type	_Z13printDataInfoi, @function
_Z13printDataInfoi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%esi, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	leal	0(,%rbp,4), %ebx
	imull	%ebx, %ebx
	subq	$1040, %rsp
	.cfi_def_cfa_offset 1072
	movq	%fs:40, %rax
	movq	%rax, 1032(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %r12
	movq	%r12, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movq	%r12, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC2(%rip), %rsi
	call	__printf_chk@PLT
	xorl	%edx, %edx
	movl	%ebx, %eax
	leaq	.LC3(%rip), %rsi
	divl	%ebp
	movl	$2, %edi
	movl	%eax, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	1032(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$1040, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z13printDataInfoi, .-_Z13printDataInfoi
	.section	.rodata.str1.1
.LC5:
	.string	"\n%s Transfers Host to Device Time Elaped: %f ms, Bandwidth (MB/s): %f\n\n"
	.text
	.globl	_Z25profileCopiesHostToDevicePiS_S_S_jPKci
	.type	_Z25profileCopiesHostToDevicePiS_S_S_jPKci, @function
_Z25profileCopiesHostToDevicePiS_S_S_jPKci:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r8d, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	cmpl	$3, 96(%rsp)
	je	.L13
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movq	%r15, %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movq	%r14, %rdi
	call	cudaMemcpy@PLT
	jmp	.L14
.L13:
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rsi
	leaq	_ZL9d_a_const(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	leaq	_ZL9d_b_const(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
.L14:
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	leaq	4(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	cvtsi2sdq	%rbx, %xmm1
	movq	%r13, %rdx
	movb	$2, %al
	mulsd	.LC4(%rip), %xmm1
	cvtss2sd	4(%rsp), %xmm0
	movl	$2, %edi
	leaq	.LC5(%rip), %rsi
	divsd	%xmm0, %xmm1
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	16(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z25profileCopiesHostToDevicePiS_S_S_jPKci, .-_Z25profileCopiesHostToDevicePiS_S_S_jPKci
	.section	.rodata.str1.1
.LC6:
	.string	"\n%s transfers Device To Host Time Elaped: %f ms, Bandwidth (MB/s): %f\n"
	.text
	.globl	_Z25profileCopiesDeviceToHostPiS_S_S_S_S_S_S_jPKc
	.type	_Z25profileCopiesDeviceToHostPiS_S_S_S_S_S_S_jPKc, @function
_Z25profileCopiesDeviceToHostPiS_S_S_S_S_S_S_jPKc:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r9, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	128(%rsp), %rax
	movq	%r8, (%rsp)
	leaq	40(%rsp), %rdi
	movq	%rax, 8(%rsp)
	movq	136(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	152(%rsp), %rax
	movq	%rax, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$2, %ecx
	movq	%r15, %rsi
	movq	%r14, %rdi
	movl	144(%rsp), %ebx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	leaq	36(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	cvtsi2sdq	%rbx, %xmm1
	movb	$2, %al
	cvtss2sd	36(%rsp), %xmm0
	mulsd	.LC4(%rip), %xmm1
	movq	24(%rsp), %rdx
	movl	$2, %edi
	leaq	.LC6(%rip), %rsi
	divsd	%xmm0, %xmm1
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	48(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z25profileCopiesDeviceToHostPiS_S_S_S_S_S_S_jPKc, .-_Z25profileCopiesDeviceToHostPiS_S_S_S_S_S_S_jPKc
	.globl	_Z27__device_stub__Z3addPiS_S_iPiS_S_i
	.type	_Z27__device_stub__Z3addPiS_S_iPiS_S_i, @function
_Z27__device_stub__Z3addPiS_S_iPiS_S_i:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z3addPiS_S_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L24:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z27__device_stub__Z3addPiS_S_iPiS_S_i, .-_Z27__device_stub__Z3addPiS_S_iPiS_S_i
	.globl	_Z3addPiS_S_i
	.type	_Z3addPiS_S_i, @function
_Z3addPiS_S_i:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z3addPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2062:
	.size	_Z3addPiS_S_i, .-_Z3addPiS_S_i
	.globl	_Z33__device_stub__Z9addSharedPiS_S_iPiS_S_i
	.type	_Z33__device_stub__Z9addSharedPiS_S_iPiS_S_i, @function
_Z33__device_stub__Z9addSharedPiS_S_iPiS_S_i:
.LFB2063:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9addSharedPiS_S_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L29:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2063:
	.size	_Z33__device_stub__Z9addSharedPiS_S_iPiS_S_i, .-_Z33__device_stub__Z9addSharedPiS_S_iPiS_S_i
	.globl	_Z9addSharedPiS_S_i
	.type	_Z9addSharedPiS_S_i, @function
_Z9addSharedPiS_S_i:
.LFB2064:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z9addSharedPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2064:
	.size	_Z9addSharedPiS_S_i, .-_Z9addSharedPiS_S_i
	.globl	_Z28__device_stub__Z8addConstPiiPii
	.type	_Z28__device_stub__Z8addConstPiiPii, @function
_Z28__device_stub__Z8addConstPiiPii:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	32(%rsp), %rdi
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 56(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z8addConstPii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L34:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z28__device_stub__Z8addConstPiiPii, .-_Z28__device_stub__Z8addConstPiiPii
	.globl	_Z8addConstPii
	.type	_Z8addConstPii, @function
_Z8addConstPii:
.LFB2066:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z8addConstPiiPii
	.cfi_endproc
.LFE2066:
	.size	_Z8addConstPii, .-_Z8addConstPii
	.globl	_Z30__device_stub__Z6addRegPiS_S_iPiS_S_i
	.type	_Z30__device_stub__Z6addRegPiS_S_iPiS_S_i, @function
_Z30__device_stub__Z6addRegPiS_S_iPiS_S_i:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z6addRegPiS_S_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L39:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L41
	call	__stack_chk_fail@PLT
.L41:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z30__device_stub__Z6addRegPiS_S_iPiS_S_i, .-_Z30__device_stub__Z6addRegPiS_S_iPiS_S_i
	.globl	_Z6addRegPiS_S_i
	.type	_Z6addRegPiS_S_i, @function
_Z6addRegPiS_S_i:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6addRegPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2068:
	.size	_Z6addRegPiS_S_i, .-_Z6addRegPiS_S_i
	.globl	_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i
	.type	_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i, @function
_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i:
.LFB2069:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z8subtractPiS_S_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L44:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2069:
	.size	_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i, .-_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i
	.globl	_Z8subtractPiS_S_i
	.type	_Z8subtractPiS_S_i, @function
_Z8subtractPiS_S_i:
.LFB2070:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2070:
	.size	_Z8subtractPiS_S_i, .-_Z8subtractPiS_S_i
	.globl	_Z39__device_stub__Z14subtractSharedPiS_S_iPiS_S_i
	.type	_Z39__device_stub__Z14subtractSharedPiS_S_iPiS_S_i, @function
_Z39__device_stub__Z14subtractSharedPiS_S_iPiS_S_i:
.LFB2071:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14subtractSharedPiS_S_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L49:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2071:
	.size	_Z39__device_stub__Z14subtractSharedPiS_S_iPiS_S_i, .-_Z39__device_stub__Z14subtractSharedPiS_S_iPiS_S_i
	.globl	_Z14subtractSharedPiS_S_i
	.type	_Z14subtractSharedPiS_S_i, @function
_Z14subtractSharedPiS_S_i:
.LFB2072:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z14subtractSharedPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2072:
	.size	_Z14subtractSharedPiS_S_i, .-_Z14subtractSharedPiS_S_i
	.globl	_Z34__device_stub__Z13subtractConstPiiPii
	.type	_Z34__device_stub__Z13subtractConstPiiPii, @function
_Z34__device_stub__Z13subtractConstPiiPii:
.LFB2073:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	32(%rsp), %rdi
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 56(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z13subtractConstPii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L54:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L56
	call	__stack_chk_fail@PLT
.L56:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2073:
	.size	_Z34__device_stub__Z13subtractConstPiiPii, .-_Z34__device_stub__Z13subtractConstPiiPii
	.globl	_Z13subtractConstPii
	.type	_Z13subtractConstPii, @function
_Z13subtractConstPii:
.LFB2074:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z13subtractConstPiiPii
	.cfi_endproc
.LFE2074:
	.size	_Z13subtractConstPii, .-_Z13subtractConstPii
	.globl	_Z36__device_stub__Z11subtractRegPiS_S_iPiS_S_i
	.type	_Z36__device_stub__Z11subtractRegPiS_S_iPiS_S_i, @function
_Z36__device_stub__Z11subtractRegPiS_S_iPiS_S_i:
.LFB2075:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11subtractRegPiS_S_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L59:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L61
	call	__stack_chk_fail@PLT
.L61:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2075:
	.size	_Z36__device_stub__Z11subtractRegPiS_S_iPiS_S_i, .-_Z36__device_stub__Z11subtractRegPiS_S_iPiS_S_i
	.globl	_Z11subtractRegPiS_S_i
	.type	_Z11subtractRegPiS_S_i, @function
_Z11subtractRegPiS_S_i:
.LFB2076:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z11subtractRegPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2076:
	.size	_Z11subtractRegPiS_S_i, .-_Z11subtractRegPiS_S_i
	.globl	_Z28__device_stub__Z4multPiS_S_iPiS_S_i
	.type	_Z28__device_stub__Z4multPiS_S_iPiS_S_i, @function
_Z28__device_stub__Z4multPiS_S_iPiS_S_i:
.LFB2077:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z4multPiS_S_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L64:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L66
	call	__stack_chk_fail@PLT
.L66:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2077:
	.size	_Z28__device_stub__Z4multPiS_S_iPiS_S_i, .-_Z28__device_stub__Z4multPiS_S_iPiS_S_i
	.globl	_Z4multPiS_S_i
	.type	_Z4multPiS_S_i, @function
_Z4multPiS_S_i:
.LFB2078:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z4multPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2078:
	.size	_Z4multPiS_S_i, .-_Z4multPiS_S_i
	.globl	_Z35__device_stub__Z10multSharedPiS_S_iPiS_S_i
	.type	_Z35__device_stub__Z10multSharedPiS_S_iPiS_S_i, @function
_Z35__device_stub__Z10multSharedPiS_S_iPiS_S_i:
.LFB2079:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L69
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10multSharedPiS_S_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L69:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L71
	call	__stack_chk_fail@PLT
.L71:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2079:
	.size	_Z35__device_stub__Z10multSharedPiS_S_iPiS_S_i, .-_Z35__device_stub__Z10multSharedPiS_S_iPiS_S_i
	.globl	_Z10multSharedPiS_S_i
	.type	_Z10multSharedPiS_S_i, @function
_Z10multSharedPiS_S_i:
.LFB2080:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10multSharedPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2080:
	.size	_Z10multSharedPiS_S_i, .-_Z10multSharedPiS_S_i
	.globl	_Z29__device_stub__Z9multConstPiiPii
	.type	_Z29__device_stub__Z9multConstPiiPii, @function
_Z29__device_stub__Z9multConstPiiPii:
.LFB2081:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	32(%rsp), %rdi
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 56(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L74
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z9multConstPii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L74:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L76
	call	__stack_chk_fail@PLT
.L76:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2081:
	.size	_Z29__device_stub__Z9multConstPiiPii, .-_Z29__device_stub__Z9multConstPiiPii
	.globl	_Z9multConstPii
	.type	_Z9multConstPii, @function
_Z9multConstPii:
.LFB2082:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z9multConstPiiPii
	.cfi_endproc
.LFE2082:
	.size	_Z9multConstPii, .-_Z9multConstPii
	.globl	_Z31__device_stub__Z7multRegPiS_S_iPiS_S_i
	.type	_Z31__device_stub__Z7multRegPiS_S_iPiS_S_i, @function
_Z31__device_stub__Z7multRegPiS_S_iPiS_S_i:
.LFB2083:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L79
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7multRegPiS_S_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L79:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L81
	call	__stack_chk_fail@PLT
.L81:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2083:
	.size	_Z31__device_stub__Z7multRegPiS_S_iPiS_S_i, .-_Z31__device_stub__Z7multRegPiS_S_iPiS_S_i
	.globl	_Z7multRegPiS_S_i
	.type	_Z7multRegPiS_S_i, @function
_Z7multRegPiS_S_i:
.LFB2084:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z7multRegPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2084:
	.size	_Z7multRegPiS_S_i, .-_Z7multRegPiS_S_i
	.globl	_Z27__device_stub__Z3modPiS_S_iPiS_S_i
	.type	_Z27__device_stub__Z3modPiS_S_iPiS_S_i, @function
_Z27__device_stub__Z3modPiS_S_iPiS_S_i:
.LFB2085:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L84
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z3modPiS_S_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L84:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L86
	call	__stack_chk_fail@PLT
.L86:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2085:
	.size	_Z27__device_stub__Z3modPiS_S_iPiS_S_i, .-_Z27__device_stub__Z3modPiS_S_iPiS_S_i
	.globl	_Z3modPiS_S_i
	.type	_Z3modPiS_S_i, @function
_Z3modPiS_S_i:
.LFB2086:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z3modPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2086:
	.size	_Z3modPiS_S_i, .-_Z3modPiS_S_i
	.section	.rodata.str1.1
.LC7:
	.string	"Global Memory Functions  Elapsed Time: %f\n"
	.text
	.globl	_Z22executeGlobalFunctionsiiPiS_S_S_S_S_
	.type	_Z22executeGlobalFunctionsiiPiS_S_S_S_S_, @function
_Z22executeGlobalFunctionsiiPiS_S_S_S_S_:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r9, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdi
	movq	144(%rsp), %r15
	movq	%rcx, 24(%rsp)
	movq	152(%rsp), %r14
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movslq	%ebx, %rax
	movl	%ebx, 60(%rsp)
	xorl	%r9d, %r9d
	salq	$2, %rax
	movl	%ebp, 48(%rsp)
	movq	%rax, 8(%rsp)
	movq	8(%rsp), %r8
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	%rax, 52(%rsp)
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L90
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %ecx
	movq	%r13, %rdx
	call	_Z27__device_stub__Z3addPiS_S_iPiS_S_i
.L90:
	movl	%ebx, 60(%rsp)
	movq	8(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	%rax, 52(%rsp)
	movq	60(%rsp), %rdx
	movl	%ebp, 48(%rsp)
	movl	56(%rsp), %esi
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L91
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %ecx
	movq	%r12, %rdx
	call	_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i
.L91:
	movl	%ebx, 60(%rsp)
	movq	8(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	%rax, 52(%rsp)
	movq	60(%rsp), %rdx
	movl	%ebp, 48(%rsp)
	movl	56(%rsp), %esi
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L92
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %ecx
	movq	%r15, %rdx
	call	_Z28__device_stub__Z4multPiS_S_iPiS_S_i
.L92:
	movl	%ebx, 60(%rsp)
	movq	8(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	%rax, 52(%rsp)
	movq	60(%rsp), %rdx
	movl	%ebp, 48(%rsp)
	movl	56(%rsp), %esi
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L93
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %ecx
	movq	%r14, %rdx
	call	_Z27__device_stub__Z3modPiS_S_iPiS_S_i
.L93:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	60(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	60(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L94
	call	__stack_chk_fail@PLT
.L94:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z22executeGlobalFunctionsiiPiS_S_S_S_S_, .-_Z22executeGlobalFunctionsiiPiS_S_S_S_S_
	.globl	_Z33__device_stub__Z9modSharedPiS_S_iPiS_S_i
	.type	_Z33__device_stub__Z9modSharedPiS_S_iPiS_S_i, @function
_Z33__device_stub__Z9modSharedPiS_S_iPiS_S_i:
.LFB2087:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L96
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9modSharedPiS_S_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L96:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L98
	call	__stack_chk_fail@PLT
.L98:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2087:
	.size	_Z33__device_stub__Z9modSharedPiS_S_iPiS_S_i, .-_Z33__device_stub__Z9modSharedPiS_S_iPiS_S_i
	.globl	_Z9modSharedPiS_S_i
	.type	_Z9modSharedPiS_S_i, @function
_Z9modSharedPiS_S_i:
.LFB2088:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z9modSharedPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2088:
	.size	_Z9modSharedPiS_S_i, .-_Z9modSharedPiS_S_i
	.section	.rodata.str1.1
.LC8:
	.string	"Shared Memory Functions Elapsed Time: %f\n"
	.text
	.globl	_Z22executeSharedFunctionsiiPiS_S_S_S_S_
	.type	_Z22executeSharedFunctionsiiPiS_S_S_S_S_, @function
_Z22executeSharedFunctionsiiPiS_S_S_S_S_:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r9, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdi
	movq	144(%rsp), %r15
	movq	%rcx, 24(%rsp)
	movq	152(%rsp), %r14
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movslq	%ebx, %rax
	movl	%ebx, 60(%rsp)
	xorl	%r9d, %r9d
	salq	$2, %rax
	movl	%ebp, 48(%rsp)
	movq	%rax, 8(%rsp)
	movq	8(%rsp), %r8
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	%rax, 52(%rsp)
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L102
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %ecx
	movq	%r13, %rdx
	call	_Z33__device_stub__Z9addSharedPiS_S_iPiS_S_i
.L102:
	movl	%ebx, 60(%rsp)
	movq	8(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	%rax, 52(%rsp)
	movq	60(%rsp), %rdx
	movl	%ebp, 48(%rsp)
	movl	56(%rsp), %esi
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L103
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %ecx
	movq	%r12, %rdx
	call	_Z39__device_stub__Z14subtractSharedPiS_S_iPiS_S_i
.L103:
	movl	%ebx, 60(%rsp)
	movq	8(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	%rax, 52(%rsp)
	movq	60(%rsp), %rdx
	movl	%ebp, 48(%rsp)
	movl	56(%rsp), %esi
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L104
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %ecx
	movq	%r15, %rdx
	call	_Z35__device_stub__Z10multSharedPiS_S_iPiS_S_i
.L104:
	movl	%ebx, 60(%rsp)
	movq	8(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	%rax, 52(%rsp)
	movq	60(%rsp), %rdx
	movl	%ebp, 48(%rsp)
	movl	56(%rsp), %esi
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L105
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %ecx
	movq	%r14, %rdx
	call	_Z33__device_stub__Z9modSharedPiS_S_iPiS_S_i
.L105:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	60(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	60(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L106
	call	__stack_chk_fail@PLT
.L106:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z22executeSharedFunctionsiiPiS_S_S_S_S_, .-_Z22executeSharedFunctionsiiPiS_S_S_S_S_
	.globl	_Z28__device_stub__Z8modConstPiiPii
	.type	_Z28__device_stub__Z8modConstPiiPii, @function
_Z28__device_stub__Z8modConstPiiPii:
.LFB2089:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	32(%rsp), %rdi
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 56(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L108
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z8modConstPii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L108:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L110
	call	__stack_chk_fail@PLT
.L110:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2089:
	.size	_Z28__device_stub__Z8modConstPiiPii, .-_Z28__device_stub__Z8modConstPiiPii
	.globl	_Z8modConstPii
	.type	_Z8modConstPii, @function
_Z8modConstPii:
.LFB2090:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z8modConstPiiPii
	.cfi_endproc
.LFE2090:
	.size	_Z8modConstPii, .-_Z8modConstPii
	.section	.rodata.str1.1
.LC9:
	.string	"Constant Memory Functions Elapsed Time: %f\n"
	.text
	.globl	_Z24executeConstantFunctionsiiPiS_S_S_
	.type	_Z24executeConstantFunctionsiiPiS_S_S_, @function
_Z24executeConstantFunctionsiiPiS_S_S_:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rcx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r9, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	24(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movslq	%ebx, %rax
	movl	%ebx, 44(%rsp)
	xorl	%r9d, %r9d
	salq	$2, %rax
	movl	%ebp, 32(%rsp)
	movq	%rax, 8(%rsp)
	movq	8(%rsp), %r8
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	52(%rsp), %ecx
	movq	%rax, 36(%rsp)
	movq	44(%rsp), %rdx
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L114
	movl	%ebx, %esi
	movq	%r15, %rdi
	call	_Z28__device_stub__Z8addConstPiiPii
.L114:
	movl	%ebx, 44(%rsp)
	movq	8(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	52(%rsp), %ecx
	movq	%rax, 36(%rsp)
	movq	44(%rsp), %rdx
	movl	%ebp, 32(%rsp)
	movl	40(%rsp), %esi
	movq	32(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L115
	movl	%ebx, %esi
	movq	%r14, %rdi
	call	_Z34__device_stub__Z13subtractConstPiiPii
.L115:
	movl	%ebx, 44(%rsp)
	movq	8(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	52(%rsp), %ecx
	movq	%rax, 36(%rsp)
	movq	44(%rsp), %rdx
	movl	%ebp, 32(%rsp)
	movl	40(%rsp), %esi
	movq	32(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L116
	movl	%ebx, %esi
	movq	%r13, %rdi
	call	_Z29__device_stub__Z9multConstPiiPii
.L116:
	movl	%ebx, 44(%rsp)
	movq	8(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	52(%rsp), %ecx
	movq	%rax, 36(%rsp)
	movq	44(%rsp), %rdx
	movl	%ebp, 32(%rsp)
	movl	40(%rsp), %esi
	movq	32(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L117
	movl	%ebx, %esi
	movq	%r12, %rdi
	call	_Z28__device_stub__Z8modConstPiiPii
.L117:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	leaq	44(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	44(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	24(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L118
	call	__stack_chk_fail@PLT
.L118:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z24executeConstantFunctionsiiPiS_S_S_, .-_Z24executeConstantFunctionsiiPiS_S_S_
	.globl	_Z30__device_stub__Z6modRegPiS_S_iPiS_S_i
	.type	_Z30__device_stub__Z6modRegPiS_S_iPiS_S_i, @function
_Z30__device_stub__Z6modRegPiS_S_iPiS_S_i:
.LFB2091:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L120
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z6modRegPiS_S_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L120:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L122
	call	__stack_chk_fail@PLT
.L122:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2091:
	.size	_Z30__device_stub__Z6modRegPiS_S_iPiS_S_i, .-_Z30__device_stub__Z6modRegPiS_S_iPiS_S_i
	.globl	_Z6modRegPiS_S_i
	.type	_Z6modRegPiS_S_i, @function
_Z6modRegPiS_S_i:
.LFB2092:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6modRegPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2092:
	.size	_Z6modRegPiS_S_i, .-_Z6modRegPiS_S_i
	.section	.rodata.str1.1
.LC10:
	.string	"Register Memory Functions Elapsed Time: %f\n"
	.text
	.globl	_Z24executeRegisterFunctionsiiPiS_S_S_S_S_
	.type	_Z24executeRegisterFunctionsiiPiS_S_S_S_S_, @function
_Z24executeRegisterFunctionsiiPiS_S_S_S_S_:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r9, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdi
	movq	144(%rsp), %r15
	movq	%rcx, 24(%rsp)
	movq	152(%rsp), %r14
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movslq	%ebx, %rax
	movl	%ebx, 60(%rsp)
	xorl	%r9d, %r9d
	salq	$2, %rax
	movl	%ebp, 48(%rsp)
	movq	%rax, 8(%rsp)
	movq	8(%rsp), %r8
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	%rax, 52(%rsp)
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L126
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %ecx
	movq	%r13, %rdx
	call	_Z30__device_stub__Z6addRegPiS_S_iPiS_S_i
.L126:
	movl	%ebx, 60(%rsp)
	movq	8(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	%rax, 52(%rsp)
	movq	60(%rsp), %rdx
	movl	%ebp, 48(%rsp)
	movl	56(%rsp), %esi
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L127
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %ecx
	movq	%r12, %rdx
	call	_Z36__device_stub__Z11subtractRegPiS_S_iPiS_S_i
.L127:
	movl	%ebx, 60(%rsp)
	movq	8(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	%rax, 52(%rsp)
	movq	60(%rsp), %rdx
	movl	%ebp, 48(%rsp)
	movl	56(%rsp), %esi
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L128
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %ecx
	movq	%r15, %rdx
	call	_Z31__device_stub__Z7multRegPiS_S_iPiS_S_i
.L128:
	movl	%ebx, 60(%rsp)
	movq	8(%rsp), %r8
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	%rax, 52(%rsp)
	movq	60(%rsp), %rdx
	movl	%ebp, 48(%rsp)
	movl	56(%rsp), %esi
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L129
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %ecx
	movq	%r14, %rdx
	call	_Z30__device_stub__Z6modRegPiS_S_iPiS_S_i
.L129:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	60(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	60(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L130
	call	__stack_chk_fail@PLT
.L130:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z24executeRegisterFunctionsiiPiS_S_S_S_S_, .-_Z24executeRegisterFunctionsiiPiS_S_S_S_S_
	.section	.rodata.str1.1
.LC11:
	.string	"\t\t*****Executing Arithmetic Functions Using Global Memory*****\n"
.LC12:
	.string	"Global"
.LC13:
	.string	"Shared"
.LC14:
	.string	"\t\t*****Executing Arithmetic Functions Using Shared Memory*****\n"
.LC15:
	.string	"\t\t*****Executing Arithmetic Functions Using Constant Memory*****\n"
.LC16:
	.string	"Constant"
.LC17:
	.string	"\t\t*****Executing Arithmetic Functions Using Register Memory*****\n"
.LC18:
	.string	"Register"
.LC19:
	.string	"Unknown Memory Type!\n"
.LC20:
	.string	"Array 1"
.LC21:
	.string	"Array 2"
.LC22:
	.string	"\n"
.LC23:
	.string	"Add Results"
.LC24:
	.string	"Subtract Results"
.LC25:
	.string	"Multiply Results"
.LC26:
	.string	"Modulus Results"
.LC27:
	.string	"\n\n"
	.text
	.globl	_Z7gpuTestiii
	.type	_Z7gpuTestiii, @function
_Z7gpuTestiii:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leal	0(,%rsi,4), %ebx
	movq	%rbx, %rsi
	movq	%rbx, %rbp
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMallocHost@PLT
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMallocHost@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMallocHost@PLT
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMallocHost@PLT
	leaq	40(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMallocHost@PLT
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMallocHost@PLT
	cmpl	$3, %r13d
	je	.L133
	leaq	56(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
.L133:
	movq	%rbx, %rsi
	leaq	72(%rsp), %rdi
	movl	$4, %r15d
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	96(%rsp), %rdi
	xorl	%ebx, %ebx
	call	cudaMalloc@PLT
.L134:
	cmpl	%ebx, %r12d
	jle	.L150
	movq	8(%rsp), %rax
	movl	%ebx, (%rax,%rbx,4)
	call	rand@PLT
	cltd
	idivl	%r15d
	movq	16(%rsp), %rax
	movl	%edx, (%rax,%rbx,4)
	incq	%rbx
	jmp	.L134
.L150:
	cmpl	$3, %r13d
	je	.L136
	jg	.L137
	cmpl	$1, %r13d
	je	.L138
	cmpl	$2, %r13d
	jne	.L140
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	pushq	%r13
	.cfi_remember_state
	.cfi_def_cfa_offset 184
	movl	%ebp, %r8d
	leaq	.LC13(%rip), %r9
	pushq	$2
	.cfi_def_cfa_offset 192
	movq	32(%rsp), %rcx
	movq	80(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	72(%rsp), %rdi
	call	_Z25profileCopiesHostToDevicePiS_S_S_jPKci
	popq	%r15
	.cfi_def_cfa_offset 184
	popq	%rax
	.cfi_def_cfa_offset 176
	pushq	96(%rsp)
	.cfi_def_cfa_offset 184
	pushq	96(%rsp)
	.cfi_def_cfa_offset 192
	movl	%r12d, %esi
	movl	%r14d, %edi
	movq	96(%rsp), %r9
	movq	88(%rsp), %r8
	movq	80(%rsp), %rcx
	movq	72(%rsp), %rdx
	call	_Z22executeSharedFunctionsiiPiS_S_S_S_S_
	jmp	.L148
.L137:
	.cfi_restore_state
	cmpl	$4, %r13d
	jne	.L140
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC18(%rip), %r9
	movl	%ebp, %r8d
	pushq	%rax
	.cfi_def_cfa_offset 184
	pushq	$4
	.cfi_def_cfa_offset 192
	movq	24(%rsp), %rsi
	movq	72(%rsp), %rdi
	movq	32(%rsp), %rcx
	movq	80(%rsp), %rdx
	call	_Z25profileCopiesHostToDevicePiS_S_S_jPKci
	popq	%rdx
	.cfi_def_cfa_offset 184
	popq	%rcx
	.cfi_def_cfa_offset 176
	pushq	96(%rsp)
	.cfi_def_cfa_offset 184
	pushq	96(%rsp)
	.cfi_def_cfa_offset 192
	movl	%r12d, %esi
	movl	%r14d, %edi
	movq	96(%rsp), %r9
	movq	88(%rsp), %r8
	movq	80(%rsp), %rcx
	movq	72(%rsp), %rdx
	call	_Z24executeRegisterFunctionsiiPiS_S_S_S_S_
	popq	%rsi
	.cfi_def_cfa_offset 184
	leaq	.LC18(%rip), %rax
	popq	%rdi
	.cfi_def_cfa_offset 176
	jmp	.L149
.L138:
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC12(%rip), %r9
	movl	%ebp, %r8d
	pushq	%rax
	.cfi_def_cfa_offset 184
	pushq	$1
	.cfi_def_cfa_offset 192
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rsi
	movq	72(%rsp), %rdi
	movq	80(%rsp), %rdx
	call	_Z25profileCopiesHostToDevicePiS_S_S_jPKci
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
	pushq	96(%rsp)
	.cfi_def_cfa_offset 184
	pushq	96(%rsp)
	.cfi_def_cfa_offset 192
	movl	%r12d, %esi
	movl	%r14d, %edi
	movq	96(%rsp), %r9
	movq	88(%rsp), %r8
	movq	80(%rsp), %rcx
	movq	72(%rsp), %rdx
	call	_Z22executeGlobalFunctionsiiPiS_S_S_S_S_
.L148:
	popq	%r11
	.cfi_def_cfa_offset 184
	leaq	.LC13(%rip), %rax
	popq	%rbx
	.cfi_def_cfa_offset 176
.L149:
	pushq	%rax
	.cfi_def_cfa_offset 184
	pushq	%rbp
	.cfi_def_cfa_offset 192
	pushq	112(%rsp)
	.cfi_def_cfa_offset 200
	pushq	72(%rsp)
	.cfi_def_cfa_offset 208
	movq	120(%rsp), %r9
	movq	72(%rsp), %r8
	movq	112(%rsp), %rcx
	movq	64(%rsp), %rdx
	movq	104(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z25profileCopiesDeviceToHostPiS_S_S_S_S_S_S_jPKc
	addq	$32, %rsp
	.cfi_def_cfa_offset 176
	jmp	.L142
.L136:
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC16(%rip), %r9
	leaq	_ZL9d_b_const(%rip), %rdx
	pushq	%r8
	.cfi_def_cfa_offset 184
	leaq	_ZL9d_a_const(%rip), %rdi
	movl	%ebp, %r8d
	pushq	$3
	.cfi_def_cfa_offset 192
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rsi
	call	_Z25profileCopiesHostToDevicePiS_S_S_jPKci
	popq	%r9
	.cfi_def_cfa_offset 184
	popq	%r10
	.cfi_def_cfa_offset 176
	movl	%r12d, %esi
	movq	96(%rsp), %r9
	movq	88(%rsp), %r8
	movl	%r14d, %edi
	movq	80(%rsp), %rcx
	movq	72(%rsp), %rdx
	call	_Z24executeConstantFunctionsiiPiS_S_S_
	leaq	.LC16(%rip), %rax
	jmp	.L149
.L140:
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L142:
	movq	8(%rsp), %rdi
	leaq	.LC20(%rip), %rdx
	movl	$7, %esi
	call	_Z10printArrayPiiPKc
	movq	16(%rsp), %rdi
	movl	$7, %esi
	leaq	.LC21(%rip), %rdx
	call	_Z10printArrayPiiPKc
	leaq	.LC22(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	movl	$7, %esi
	leaq	.LC23(%rip), %rdx
	call	_Z10printArrayPiiPKc
	movq	32(%rsp), %rdi
	movl	$7, %esi
	leaq	.LC24(%rip), %rdx
	call	_Z10printArrayPiiPKc
	movq	40(%rsp), %rdi
	movl	$7, %esi
	leaq	.LC25(%rip), %rdx
	call	_Z10printArrayPiiPKc
	movq	48(%rsp), %rdi
	movl	$7, %esi
	leaq	.LC26(%rip), %rdx
	call	_Z10printArrayPiiPKc
	leaq	.LC27(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	16(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	24(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	32(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	40(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	48(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L143
	call	__stack_chk_fail@PLT
.L143:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z7gpuTestiii, .-_Z7gpuTestiii
	.section	.rodata.str1.1
.LC28:
	.string	"\nUsing %d Threads and %d BlockSize\n"
.LC29:
	.string	"Warning: Total thread count is not evenly divisible by the block size\n"
.LC30:
	.string	"The total number of threads will be rounded up to %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rcx
	.cfi_def_cfa_offset 48
	cmpl	$3, %edi
	jne	.L154
	movq	8(%rsi), %rdi
	movq	%rsi, %rbp
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movl	%eax, %r12d
	jmp	.L152
.L154:
	movl	$256, %r12d
	movl	$1024, %ebx
.L152:
	movl	%ebx, %eax
	movl	%r12d, %ecx
	movl	$2, %edi
	cltd
	leaq	.LC28(%rip), %rsi
	idivl	%r12d
	movl	%edx, %r13d
	movl	%eax, %ebp
	movl	%ebx, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	testl	%r13d, %r13d
	je	.L153
	incl	%ebp
	movl	%r12d, %ebx
	leaq	.LC29(%rip), %rsi
	xorl	%eax, %eax
	imull	%ebp, %ebx
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC30(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movl	%ebx, %edx
	call	__printf_chk@PLT
.L153:
	movl	%ebx, %edi
	call	_Z13printDataInfoi
	movl	%ebx, %esi
	movl	%ebp, %edi
	movl	$1, %edx
	call	_Z7gpuTestiii
	movl	%ebx, %esi
	movl	%ebp, %edi
	movl	$2, %edx
	call	_Z7gpuTestiii
	movl	%ebx, %esi
	movl	%ebp, %edi
	movl	$3, %edx
	call	_Z7gpuTestiii
	movl	$4, %edx
	movl	%ebx, %esi
	movl	%ebp, %edi
	call	_Z7gpuTestiii
	popq	%rdx
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	main, .-main
	.section	.rodata.str1.1
.LC31:
	.string	"_Z6modRegPiS_S_i"
.LC32:
	.string	"_Z8modConstPii"
.LC33:
	.string	"_Z9modSharedPiS_S_i"
.LC34:
	.string	"_Z3modPiS_S_i"
.LC35:
	.string	"_Z7multRegPiS_S_i"
.LC36:
	.string	"_Z9multConstPii"
.LC37:
	.string	"_Z10multSharedPiS_S_i"
.LC38:
	.string	"_Z4multPiS_S_i"
.LC39:
	.string	"_Z11subtractRegPiS_S_i"
.LC40:
	.string	"_Z13subtractConstPii"
.LC41:
	.string	"_Z14subtractSharedPiS_S_i"
.LC42:
	.string	"_Z8subtractPiS_S_i"
.LC43:
	.string	"_Z6addRegPiS_S_i"
.LC44:
	.string	"_Z8addConstPii"
.LC45:
	.string	"_Z9addSharedPiS_S_i"
.LC46:
	.string	"_Z3addPiS_S_i"
.LC47:
	.string	"d_a_const"
.LC48:
	.string	"d_b_const"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2094:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC31(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6modRegPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC32(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z8modConstPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC33(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9modSharedPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC34(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z3modPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC35(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7multRegPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC36(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9multConstPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC37(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10multSharedPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC38(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z4multPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC39(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z11subtractRegPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC40(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13subtractConstPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC41(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14subtractSharedPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC42(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z8subtractPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC43(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z6addRegPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC44(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z8addConstPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC45(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9addSharedPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC46(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z3addPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC47(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	movq	%rdx, %rcx
	movl	$4096, %r9d
	xorl	%r8d, %r8d
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	_ZL9d_a_const(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC48(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4096, %r9d
	leaq	_ZL9d_b_const(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2094:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL9d_b_const
	.comm	_ZL9d_b_const,4096,32
	.local	_ZL9d_a_const
	.comm	_ZL9d_a_const,4096,32
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	-755914244
	.long	1062232653
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*******************************************************************************

This program compares all types of memory learned so far and compares their
Performance

Author: Said Darham
*******************************************************************************/

//Based on the work of Andrew Krepps

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h> //srand and rand
#include <math.h>

// Constant data declaration
#define WORKSIZE 1024 // define a default worksize for constant data

// Define different memroy types
#define GLOBAL 1
#define SHARED 2
#define CONSTANT 3
#define REGISTER 4

// Arrays for constant memory on device
__device__ __constant__ int d_a_const[WORKSIZE];
__device__ __constant__ int d_b_const[WORKSIZE];




/*******************************************************************************

                            Print Array and Data Info

*******************************************************************************/
void printArray(int *array, int n, const char* funcDesc){
    //helper function to Print the array of n elements and what function is used
    printf("\n%s: ", funcDesc);
    for(int i = 0; i<n; i++){
      printf("%d ", array[i]);
    }
}
void printDataInfo(int totalThreads){
  //print device info as well as the amount of data for a thread size
  hipDeviceProp_t prop;
  hipGetDeviceProperties(&prop,0);
  const unsigned int bytes = totalThreads*sizeof(int);
  printf("\nDevice: %s\n", prop.name);
  printf("Transfer size (MB): %d\n\n", bytes * bytes / totalThreads);
}


/*******************************************************************************

        PROFILE DATA TRANSFER FUNCTIONS (Host2Device and Device2Host)

*******************************************************************************/
void profileCopiesHostToDevice(int        *d_a,
                               int        *h_a,
                               int        *d_b,
				                       int        *h_b,
                               const unsigned int  bytes,
                               const char         *desc,
                               const int    memType){

  // events for timing
  hipEvent_t startEvent, stopEvent;
  // create an event
  hipEventCreate(&startEvent);
  hipEventCreate(&stopEvent);

  //start a recording event and execute the transfer after
  hipEventRecord(startEvent, 0);

  // Use either cudaMemcpy or cudaMemcpyToSymbol depending on memory TYPE
  if(memType != CONSTANT){
    hipMemcpy( d_a, h_a, bytes, hipMemcpyHostToDevice);
    hipMemcpy( d_b, h_b, bytes, hipMemcpyHostToDevice);
  }else if(memType == CONSTANT){
    hipMemcpyToSymbol( HIP_SYMBOL(d_a_const), h_a, bytes,0, hipMemcpyHostToDevice);
    hipMemcpyToSymbol( HIP_SYMBOL(d_b_const), h_b, bytes,0, hipMemcpyHostToDevice);
  }

  hipEventRecord(stopEvent, 0); //stop
  hipEventSynchronize(stopEvent);
  //get the elapsed time and print info
  float time;
  hipEventElapsedTime(&time, startEvent, stopEvent);
  printf("\n%s Transfers Host to Device Time Elaped: %f ms, Bandwidth (MB/s): %f\n\n", desc, time, bytes * 1e-3 / time);

  // clean up events
  hipEventDestroy(startEvent);
  hipEventDestroy(stopEvent);
}

void profileCopiesDeviceToHost( int *h_c_add, int *d_c_add, int *h_c_sub, int *d_c_sub,
								                int *h_c_mult, int *d_c_mult, int *h_c_mod, int *d_c_mod,
                                const unsigned int bytes, const char *desc){


  // events for timing
  hipEvent_t startEvent, stopEvent;
  // create an event
  hipEventCreate(&startEvent);
  hipEventCreate(&stopEvent);
  //start a recording event and execute the transfer after
  hipEventRecord(startEvent, 0);

  hipMemcpy( h_c_add, d_c_add, bytes, hipMemcpyDeviceToHost);
  hipMemcpy( h_c_sub, d_c_sub, bytes, hipMemcpyDeviceToHost);
  hipMemcpy( h_c_mult, d_c_mult, bytes, hipMemcpyDeviceToHost);
  hipMemcpy( h_c_mod, d_c_mod, bytes, hipMemcpyDeviceToHost);

  hipEventRecord(stopEvent, 0);//stop
  hipEventSynchronize(stopEvent);
  //get the elapsed time and print info
  float time;
  hipEventElapsedTime(&time, startEvent, stopEvent);
  printf("\n%s transfers Device To Host Time Elaped: %f ms, Bandwidth (MB/s): %f\n",desc,time, bytes * 1e-3 / time);

  // clean up events
  hipEventDestroy(startEvent);
  hipEventDestroy(stopEvent);
}




/*******************************************************************************

        ARITHMETIC KERNEL FUNCTIONS (GLOBAL, SHARED, CONSTANT, REGISTER)

*******************************************************************************/
// Add Functions
__global__ void add(int *a, int *b, int *c, int n){
    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = a[id] + b[id];
}
__global__ void addShared(int *a, int *b, int *c, int n){
    extern __shared__ int res[]; //using shared memory
    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    // Make sure we do not go out of bounds
    if (id < n)
        res[threadIdx.x] = a[id] + b[id];

	__syncthreads(); // wait for all threads in the block to finish
	c[threadIdx.x] = res[threadIdx.x];//since threads from different blocks cannot talk, use thread index instead
}
__global__ void addConst( int *c, int n){
    // Get our global thread ID
    const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    // use the constant data declared
    if (id < n)
        c[id] = d_a_const[id] + d_b_const[id];
}
__global__ void addReg(int *a, int *b, int *c, int n){
  // Get our global thread ID
  const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;
  if (id < n){
    int tempA, tempB, tempC;//use variables in register
    tempA = a[id];
    tempB = b[id];
    tempC = tempA + tempB;
    c[id] = tempC;
  }
}

// subtract functions
__global__ void subtract(int *a, int *b, int *c, int n){
                // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = a[id] - b[id];
}
__global__ void subtractShared(int *a, int *b, int *c, int n){
   extern __shared__ int res[]; //using shared memory

    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        res[threadIdx.x] = a[id] - b[id];

	__syncthreads(); // wait for all threads in the block to finish

	c[threadIdx.x] = res[threadIdx.x];

}
__global__ void subtractConst(int *c, int n){
    // Get our global thread ID
    const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = d_a_const[id] - d_b_const[id];
}
__global__ void subtractReg(int *a, int *b, int *c, int n){
  // Get our global thread ID
  const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;
  if (id < n){
    int tempA, tempB, tempC;//use variables in register
    tempA = a[id];
    tempB = b[id];
    tempC = tempA - tempB;
    c[id] = tempC;
  }
}

// multiply functions
__global__ void mult(int *a, int *b, int *c, int n){
           // Get our global thread ID
   int id = blockIdx.x*blockDim.x+threadIdx.x;

   // Make sure we do not go out of bounds
   if (id < n)
       c[id] = a[id] * b[id];
}
__global__ void multShared(int *a, int *b, int *c, int n){
    extern __shared__ int res[]; //using shared memory
     // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        res[threadIdx.x] = a[id] * b[id];

	__syncthreads(); // wait for all threads in the block to finish

	c[threadIdx.x] = res[threadIdx.x];

}
__global__ void multConst(int *c, int n){
   // Get our global thread ID
   const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;

   // Make sure we do not go out of bounds
   if (id < n)
       c[id] = d_a_const[id] * d_b_const[id];
}
__global__ void multReg(int *a, int *b, int *c, int n){
  // Get our global thread ID
  const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;
  if (id < n){
    int tempA, tempB, tempC;//use variables in register
    tempA = a[id];
    tempB = b[id];
    tempC = tempA * tempB;
    c[id] = tempC;
  }
}

// Moudulu functions
__global__ void mod(int *a, int *b, int *c, int n){

    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = a[id] % b[id];
}
__global__ void modShared(int *a, int *b, int *c, int n){
 extern __shared__ int res[];

    // Get our global thread ID
    int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        res[threadIdx.x] = a[id] % b[id];

	__syncthreads(); // wait for all threads in the block to finish

	c[threadIdx.x] = res[threadIdx.x];
}
__global__ void modConst(int *c, int n){

    // Get our global thread ID
    const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;

    // Make sure we do not go out of bounds
    if (id < n)
        c[id] = d_a_const[id] % d_b_const[id];
}
__global__ void modReg(int *a, int *b, int *c, int n){
  // Get our global thread ID
  const unsigned int id = blockIdx.x*blockDim.x+threadIdx.x;
  if (id < n){
    int tempA, tempB, tempC;
    tempA = a[id]; //use variables in register
    tempB = b[id];
    tempC = tempA % tempB;
    c[id] = tempC;
  }
}


/*******************************************************************************

        EXECUTION AND PROFILING OF ARITHMETIC FUNCTIONS

*******************************************************************************/
void executeGlobalFunctions(int numBlocks, int totalThreads,
                            int *d_a, int *d_b, int *d_c_add,
                            int *d_c_sub,int *d_c_mult,int *d_c_mod){

      float time;
      // events for timing
      hipEvent_t startEvent, stopEvent;
      hipEventCreate(&startEvent);
      hipEventCreate(&stopEvent);

      //start a recording event and execute the Kernels after
      hipEventRecord(startEvent, 0);
      //invoking global memory kernels
      add<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_add, totalThreads);
      subtract<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_sub, totalThreads);
      mult<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_mult, totalThreads);
      mod<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_mod, totalThreads);

      hipEventRecord(stopEvent, 0); //stop
      hipEventSynchronize(stopEvent);
      //get the elapsed time and print info
      hipEventElapsedTime(&time, startEvent, stopEvent);
      printf("Global Memory Functions  Elapsed Time: %f\n", time);
       // clean up events
      hipEventDestroy(startEvent);
      hipEventDestroy(stopEvent);

}

void executeSharedFunctions(int numBlocks, int totalThreads,
                            int *d_a, int *d_b, int *d_c_add, int *d_c_sub, int *d_c_mult, int *d_c_mod){

      float time;
      // events for timing
      hipEvent_t startEvent, stopEvent;
      hipEventCreate(&startEvent);
      hipEventCreate(&stopEvent);

      //start a recording event and execute the Kernels after
      hipEventRecord(startEvent, 0);
      //invoking shared memory kernels
      addShared<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_add, totalThreads);
      subtractShared<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_sub, totalThreads);
      multShared<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_mult, totalThreads);
      modShared<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_mod, totalThreads);

      hipEventRecord(stopEvent, 0); //stop
      hipEventSynchronize(stopEvent);
      hipEventElapsedTime(&time, startEvent, stopEvent);
      printf("Shared Memory Functions Elapsed Time: %f\n", time);
       // clean up events
      hipEventDestroy(startEvent);
      hipEventDestroy(stopEvent);
}

void executeConstantFunctions(int numBlocks, int totalThreads,
                              int *d_c_add, int *d_c_sub,
                              int *d_c_mult, int *d_c_mod){

      float time;
      // events for timing
      hipEvent_t startEvent, stopEvent;
      hipEventCreate(&startEvent);
      hipEventCreate(&stopEvent);

      //start a recording event and execute the Kernels after
      hipEventRecord(startEvent, 0);
      //invoking constant memory kernels
      addConst<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_c_add, totalThreads);
      subtractConst<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_c_sub, totalThreads);
      multConst<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>( d_c_mult, totalThreads);
      modConst<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_c_mod, totalThreads);

      hipEventRecord(stopEvent, 0); //stop
      hipEventSynchronize(stopEvent);
      hipEventElapsedTime(&time, startEvent, stopEvent);
      printf("Constant Memory Functions Elapsed Time: %f\n", time);
       // clean up events
      hipEventDestroy(startEvent);
      hipEventDestroy(stopEvent);


}
void executeRegisterFunctions(int numBlocks, int totalThreads,
                            int *d_a, int *d_b, int *d_c_add,
                            int *d_c_sub,int *d_c_mult,int *d_c_mod){

      float time;
      // events for timing
      hipEvent_t startEvent, stopEvent;
      hipEventCreate(&startEvent);
      hipEventCreate(&stopEvent);

      //start a recording event and execute the Kernels after
      hipEventRecord(startEvent, 0);

      //invoke kernels using register memory
      addReg<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_add, totalThreads);
      subtractReg<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_sub, totalThreads);
      multReg<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>( d_a, d_b, d_c_mult, totalThreads);
      modReg<<<numBlocks, totalThreads, totalThreads*sizeof(int)>>>(d_a, d_b, d_c_mod, totalThreads);

      hipEventRecord(stopEvent, 0); //stop
      hipEventSynchronize(stopEvent);
      hipEventElapsedTime(&time, startEvent, stopEvent);
      printf("Register Memory Functions Elapsed Time: %f\n", time);
       // clean up events
      hipEventDestroy(startEvent);
      hipEventDestroy(stopEvent);
}




/*******************************************************************************

        EXECUTION AND PROFILING OF EACH TYPE OF DEVICE MEMORY USED

*******************************************************************************/
void gpuTest(int numBlocks, int totalThreads, const int memoryType){


	// Host input vectors
	int *h_a, *h_b;
	//Host output vectors for different functions "h_c_func"
	int *h_c_add,*h_c_sub,*h_c_mult,*h_c_mod;

	// Device input vectors
	int *d_a, *d_b;
	//Device output vector
	int *d_c_add,*d_c_sub,*d_c_mult,*d_c_mod;

	// Size, in bytes, of each vector
	const unsigned int bytes = totalThreads*sizeof(int);

	// Allocate memory for each vector on host Pinned
	hipHostMalloc((void**)&h_a, bytes, hipHostMallocDefault);
	hipHostMalloc((void**)&h_b, bytes, hipHostMallocDefault);
	hipHostMalloc((void**)&h_c_add, bytes, hipHostMallocDefault);
	hipHostMalloc((void**)&h_c_sub, bytes, hipHostMallocDefault);
	hipHostMalloc((void**)&h_c_mult, bytes, hipHostMallocDefault);
	hipHostMalloc((void**)&h_c_mod, bytes, hipHostMallocDefault);

	// Allocate memory for each intput and output vector on GPU
  if(memoryType != CONSTANT){
    //do not need these vectors for constant memory
    hipMalloc(&d_a, bytes);
  	hipMalloc(&d_b, bytes);
  }
	hipMalloc(&d_c_add, bytes);
	hipMalloc(&d_c_sub, bytes);
	hipMalloc(&d_c_mult, bytes);
	hipMalloc(&d_c_mod, bytes);

	//initialize the input vectors
	for(int i = 0;i<totalThreads;i++){
		//first array is 0 through number of threads
		h_a[i] = i;
		// second array is a random number between 0 and 3
		h_b[i] = rand() % 4;
	}

	//For a selected memory type, copy data form host to device, invoke the kernels and copy data from device to host
  switch(memoryType){
    case GLOBAL:
      printf("\t\t*****Executing Arithmetic Functions Using Global Memory*****\n");
      profileCopiesHostToDevice(d_a, h_a, d_b, h_b, bytes, "Global", GLOBAL);
      executeGlobalFunctions(numBlocks, totalThreads,d_a,d_b,d_c_add,d_c_sub,d_c_mult,d_c_mod);
      profileCopiesDeviceToHost(h_c_add,d_c_add,h_c_sub, d_c_sub,h_c_mult, d_c_mult,h_c_mod, d_c_mod, bytes,"Shared");
      break;
    case SHARED:
      printf("\t\t*****Executing Arithmetic Functions Using Shared Memory*****\n");
      profileCopiesHostToDevice(d_a, h_a, d_b, h_b, bytes, "Shared", SHARED);
      executeSharedFunctions(numBlocks, totalThreads,d_a,d_b,d_c_add,d_c_sub,d_c_mult,d_c_mod);
      profileCopiesDeviceToHost(h_c_add,d_c_add,h_c_sub, d_c_sub,h_c_mult, d_c_mult,h_c_mod, d_c_mod, bytes,"Shared");
      break;
    case CONSTANT:
      printf("\t\t*****Executing Arithmetic Functions Using Constant Memory*****\n");
      profileCopiesHostToDevice(d_a_const, h_a, d_b_const, h_b, bytes, "Constant",CONSTANT);
      executeConstantFunctions(numBlocks, totalThreads,d_c_add,d_c_sub,d_c_mult,d_c_mod);
      profileCopiesDeviceToHost(h_c_add,d_c_add,h_c_sub, d_c_sub,h_c_mult, d_c_mult,h_c_mod, d_c_mod, bytes,"Constant");
      break;
    case REGISTER:
      printf("\t\t*****Executing Arithmetic Functions Using Register Memory*****\n");
      profileCopiesHostToDevice(d_a, h_a, d_b, h_b, bytes, "Register", REGISTER);
      executeRegisterFunctions(numBlocks, totalThreads,d_a,d_b,d_c_add,d_c_sub,d_c_mult,d_c_mod);
      profileCopiesDeviceToHost(h_c_add,d_c_add,h_c_sub, d_c_sub,h_c_mult, d_c_mult,h_c_mod, d_c_mod, bytes,"Register");
      break;
    default:
      printf("Unknown Memory Type!\n");
      break;
  }

  // print the first 7 elements of the inputs and results
  printArray(h_a, 7,"Array 1");
  printArray(h_b, 7,"Array 2");
  printf("\n");
  printArray(h_c_add, 7, "Add Results");
  printArray(h_c_sub, 7, "Subtract Results");
  printArray(h_c_mult, 7, "Multiply Results");
  printArray(h_c_mod, 7, "Modulus Results");
  printf("\n\n");

	//free up space on  GPU
	hipFree(d_a);
	hipFree(d_b);
	hipFree(d_c_add);
	hipFree(d_c_sub);
	hipFree(d_c_mult);
	hipFree(d_c_add);

	//free up space on our CPU use cudaFreeHost since pinnned
	hipHostFree(h_a);
	hipHostFree(h_b);
	hipHostFree(h_c_add);
 	hipHostFree(h_c_sub);
	hipHostFree(h_c_mult);
	hipHostFree(h_c_mod);
}


/*******************************************************************************

                            MAIN

*******************************************************************************/
int main(int argc, char** argv)
{

  int totalThreads = (1 << 10);
  int blockSize = 256;

  //User wants to run the Global vs Pinned Examples
  if( argc > 2 && argc < 4){
    // Ensure the user supplies both number of threads and block size
    // otherwise use default values
    totalThreads = atoi(argv[1]);
    blockSize = atoi(argv[2]);
  }

  int numBlocks = totalThreads/blockSize;

  printf("\nUsing %d Threads and %d BlockSize\n",totalThreads, blockSize);

  // validate command line arguments
  if (totalThreads % blockSize != 0) {
    ++numBlocks;
    totalThreads = numBlocks*blockSize;

    printf("Warning: Total thread count is not evenly divisible by the block size\n");
    printf("The total number of threads will be rounded up to %d\n", totalThreads);
  }

  // Print device and data transfer info
  printDataInfo(totalThreads);

  // execute global memory test
  gpuTest(numBlocks, totalThreads, GLOBAL);
  // execute shared memory test
  gpuTest(numBlocks, totalThreads, SHARED);
  // execute constant memory test
  gpuTest(numBlocks, totalThreads, CONSTANT);
  // execute register memory test
  gpuTest(numBlocks, totalThreads, REGISTER);

  return 0;
}

	.text
	.file	"assignment6.hip"
	.globl	_Z10printArrayPiiPKc            # -- Begin function _Z10printArrayPiiPKc
	.type	_Z10printArrayPiiPKc,@function
_Z10printArrayPiiPKc:                   # @_Z10printArrayPiiPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, %rbx
	movl	$.L.str, %edi
	movq	%rdx, %rsi
	xorl	%eax, %eax
	callq	printf
	testl	%ebp, %ebp
	jle	.LBB0_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r14d
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB0_2
.LBB0_3:                                # %._crit_edge
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z10printArrayPiiPKc, .Lfunc_end0-_Z10printArrayPiiPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z13printDataInfoi              # -- Begin function _Z13printDataInfoi
	.type	_Z13printDataInfoi,@function
_Z13printDataInfoi:                     # @_Z13printDataInfoi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$1472, %rsp                     # imm = 0x5C0
	.cfi_def_cfa_offset 1504
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%edi, %ebx
	movq	%rsp, %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	leal	(,%rbx,4), %ebp
	movl	$.L.str.2, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	imull	%ebp, %ebp
	movl	%ebp, %eax
	xorl	%edx, %edx
	divl	%ebx
	movl	$.L.str.3, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
	addq	$1472, %rsp                     # imm = 0x5C0
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z13printDataInfoi, .Lfunc_end1-_Z13printDataInfoi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z25profileCopiesHostToDevicePiS_S_S_jPKci
.LCPI2_0:
	.quad	0x3f50624dd2f1a9fc              # double 0.001
	.text
	.globl	_Z25profileCopiesHostToDevicePiS_S_S_jPKci
	.type	_Z25profileCopiesHostToDevicePiS_S_S_jPKci,@function
_Z25profileCopiesHostToDevicePiS_S_S_jPKci: # @_Z25profileCopiesHostToDevicePiS_S_S_jPKci
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movl	%r8d, %r14d
	movq	%rcx, %r15
	movq	%rdx, %r13
	movq	%rsi, %r12
	movq	%rdi, %rbp
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%r14d, %r14d
	cmpl	$3, 96(%rsp)
	jne	.LBB2_1
# %bb.2:
	movl	$d_a_const, %edi
	movq	%r12, %rsi
	movq	%r14, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movl	$d_b_const, %edi
	movq	%r15, %rsi
	movq	%r14, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	jmp	.LBB2_3
.LBB2_1:
	movq	%rbp, %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r13, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.LBB2_3:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	36(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	cvtsi2sd	%r14, %xmm1
	mulsd	.LCPI2_0(%rip), %xmm1
	divsd	%xmm0, %xmm1
	movl	$.L.str.4, %edi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movb	$2, %al
	callq	printf
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25profileCopiesHostToDevicePiS_S_S_jPKci, .Lfunc_end2-_Z25profileCopiesHostToDevicePiS_S_S_jPKci
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z25profileCopiesDeviceToHostPiS_S_S_S_S_S_S_jPKc
.LCPI3_0:
	.quad	0x3f50624dd2f1a9fc              # double 0.001
	.text
	.globl	_Z25profileCopiesDeviceToHostPiS_S_S_S_S_S_S_jPKc
	.type	_Z25profileCopiesDeviceToHostPiS_S_S_S_S_S_S_jPKc,@function
_Z25profileCopiesDeviceToHostPiS_S_S_S_S_S_S_jPKc: # @_Z25profileCopiesDeviceToHostPiS_S_S_S_S_S_S_jPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 8(%rsp)                    # 8-byte Spill
	movq	%r8, (%rsp)                     # 8-byte Spill
	movq	%rcx, %r15
	movq	%rdx, %rbx
	movq	%rsi, %r13
	movq	%rdi, %r14
	movl	112(%rsp), %r12d
	leaq	32(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventCreate
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r14, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi                    # 8-byte Reload
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	96(%rsp), %rdi
	movq	104(%rsp), %rsi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rbx
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rbx), %rdi
	callq	hipEventSynchronize
	movq	(%rbp), %rsi
	movq	(%rbx), %rdx
	movq	%rbx, %r14
	leaq	28(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	cvtsi2sd	%r12, %xmm1
	mulsd	.LCPI3_0(%rip), %xmm1
	divsd	%xmm0, %xmm1
	movl	$.L.str.5, %edi
	movq	120(%rsp), %rsi
	movb	$2, %al
	callq	printf
	movq	(%rbp), %rdi
	callq	hipEventDestroy
	movq	(%r14), %rdi
	callq	hipEventDestroy
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z25profileCopiesDeviceToHostPiS_S_S_S_S_S_S_jPKc, .Lfunc_end3-_Z25profileCopiesDeviceToHostPiS_S_S_S_S_S_S_jPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__addPiS_S_i   # -- Begin function _Z18__device_stub__addPiS_S_i
	.type	_Z18__device_stub__addPiS_S_i,@function
_Z18__device_stub__addPiS_S_i:          # @_Z18__device_stub__addPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3addPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z18__device_stub__addPiS_S_i, .Lfunc_end4-_Z18__device_stub__addPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__addSharedPiS_S_i # -- Begin function _Z24__device_stub__addSharedPiS_S_i
	.type	_Z24__device_stub__addSharedPiS_S_i,@function
_Z24__device_stub__addSharedPiS_S_i:    # @_Z24__device_stub__addSharedPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9addSharedPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z24__device_stub__addSharedPiS_S_i, .Lfunc_end5-_Z24__device_stub__addSharedPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__addConstPii  # -- Begin function _Z23__device_stub__addConstPii
	.type	_Z23__device_stub__addConstPii,@function
_Z23__device_stub__addConstPii:         # @_Z23__device_stub__addConstPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8addConstPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z23__device_stub__addConstPii, .Lfunc_end6-_Z23__device_stub__addConstPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__addRegPiS_S_i # -- Begin function _Z21__device_stub__addRegPiS_S_i
	.type	_Z21__device_stub__addRegPiS_S_i,@function
_Z21__device_stub__addRegPiS_S_i:       # @_Z21__device_stub__addRegPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6addRegPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z21__device_stub__addRegPiS_S_i, .Lfunc_end7-_Z21__device_stub__addRegPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__subtractPiS_S_i # -- Begin function _Z23__device_stub__subtractPiS_S_i
	.type	_Z23__device_stub__subtractPiS_S_i,@function
_Z23__device_stub__subtractPiS_S_i:     # @_Z23__device_stub__subtractPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8subtractPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z23__device_stub__subtractPiS_S_i, .Lfunc_end8-_Z23__device_stub__subtractPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__subtractSharedPiS_S_i # -- Begin function _Z29__device_stub__subtractSharedPiS_S_i
	.type	_Z29__device_stub__subtractSharedPiS_S_i,@function
_Z29__device_stub__subtractSharedPiS_S_i: # @_Z29__device_stub__subtractSharedPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14subtractSharedPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z29__device_stub__subtractSharedPiS_S_i, .Lfunc_end9-_Z29__device_stub__subtractSharedPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__subtractConstPii # -- Begin function _Z28__device_stub__subtractConstPii
	.type	_Z28__device_stub__subtractConstPii,@function
_Z28__device_stub__subtractConstPii:    # @_Z28__device_stub__subtractConstPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13subtractConstPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z28__device_stub__subtractConstPii, .Lfunc_end10-_Z28__device_stub__subtractConstPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__subtractRegPiS_S_i # -- Begin function _Z26__device_stub__subtractRegPiS_S_i
	.type	_Z26__device_stub__subtractRegPiS_S_i,@function
_Z26__device_stub__subtractRegPiS_S_i:  # @_Z26__device_stub__subtractRegPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11subtractRegPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z26__device_stub__subtractRegPiS_S_i, .Lfunc_end11-_Z26__device_stub__subtractRegPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__multPiS_S_i  # -- Begin function _Z19__device_stub__multPiS_S_i
	.type	_Z19__device_stub__multPiS_S_i,@function
_Z19__device_stub__multPiS_S_i:         # @_Z19__device_stub__multPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4multPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z19__device_stub__multPiS_S_i, .Lfunc_end12-_Z19__device_stub__multPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__multSharedPiS_S_i # -- Begin function _Z25__device_stub__multSharedPiS_S_i
	.type	_Z25__device_stub__multSharedPiS_S_i,@function
_Z25__device_stub__multSharedPiS_S_i:   # @_Z25__device_stub__multSharedPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10multSharedPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z25__device_stub__multSharedPiS_S_i, .Lfunc_end13-_Z25__device_stub__multSharedPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__multConstPii # -- Begin function _Z24__device_stub__multConstPii
	.type	_Z24__device_stub__multConstPii,@function
_Z24__device_stub__multConstPii:        # @_Z24__device_stub__multConstPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9multConstPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	_Z24__device_stub__multConstPii, .Lfunc_end14-_Z24__device_stub__multConstPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__multRegPiS_S_i # -- Begin function _Z22__device_stub__multRegPiS_S_i
	.type	_Z22__device_stub__multRegPiS_S_i,@function
_Z22__device_stub__multRegPiS_S_i:      # @_Z22__device_stub__multRegPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7multRegPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end15:
	.size	_Z22__device_stub__multRegPiS_S_i, .Lfunc_end15-_Z22__device_stub__multRegPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__modPiS_S_i   # -- Begin function _Z18__device_stub__modPiS_S_i
	.type	_Z18__device_stub__modPiS_S_i,@function
_Z18__device_stub__modPiS_S_i:          # @_Z18__device_stub__modPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3modPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end16:
	.size	_Z18__device_stub__modPiS_S_i, .Lfunc_end16-_Z18__device_stub__modPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__modSharedPiS_S_i # -- Begin function _Z24__device_stub__modSharedPiS_S_i
	.type	_Z24__device_stub__modSharedPiS_S_i,@function
_Z24__device_stub__modSharedPiS_S_i:    # @_Z24__device_stub__modSharedPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9modSharedPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end17:
	.size	_Z24__device_stub__modSharedPiS_S_i, .Lfunc_end17-_Z24__device_stub__modSharedPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__modConstPii  # -- Begin function _Z23__device_stub__modConstPii
	.type	_Z23__device_stub__modConstPii,@function
_Z23__device_stub__modConstPii:         # @_Z23__device_stub__modConstPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8modConstPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end18:
	.size	_Z23__device_stub__modConstPii, .Lfunc_end18-_Z23__device_stub__modConstPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__modRegPiS_S_i # -- Begin function _Z21__device_stub__modRegPiS_S_i
	.type	_Z21__device_stub__modRegPiS_S_i,@function
_Z21__device_stub__modRegPiS_S_i:       # @_Z21__device_stub__modRegPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6modRegPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end19:
	.size	_Z21__device_stub__modRegPiS_S_i, .Lfunc_end19-_Z21__device_stub__modRegPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z22executeGlobalFunctionsiiPiS_S_S_S_S_ # -- Begin function _Z22executeGlobalFunctionsiiPiS_S_S_S_S_
	.type	_Z22executeGlobalFunctionsiiPiS_S_S_S_S_,@function
_Z22executeGlobalFunctionsiiPiS_S_S_S_S_: # @_Z22executeGlobalFunctionsiiPiS_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, (%rsp)                    # 8-byte Spill
	movq	%rdx, %r15
	movl	%esi, %ebx
	movl	%edi, %ebp
	leaq	16(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movslq	%ebx, %rax
	leaq	(,%rax,4), %r12
	movl	%ebp, %r13d
	btsq	$32, %r13
	movl	%eax, %ebp
	btsq	$32, %rbp
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB20_2
# %bb.1:
	movq	%r15, %rdi
	movq	(%rsp), %rsi                    # 8-byte Reload
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z18__device_stub__addPiS_S_i
.LBB20_2:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB20_4
# %bb.3:
	movq	%r15, %rdi
	movq	(%rsp), %rsi                    # 8-byte Reload
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movl	%ebx, %ecx
	callq	_Z23__device_stub__subtractPiS_S_i
.LBB20_4:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB20_6
# %bb.5:
	movq	96(%rsp), %rdx
	movq	%r15, %rdi
	movq	(%rsp), %rsi                    # 8-byte Reload
	movl	%ebx, %ecx
	callq	_Z19__device_stub__multPiS_S_i
.LBB20_6:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB20_8
# %bb.7:
	movq	104(%rsp), %rdx
	movq	%r15, %rdi
	movq	(%rsp), %rsi                    # 8-byte Reload
	movl	%ebx, %ecx
	callq	_Z18__device_stub__modPiS_S_i
.LBB20_8:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	36(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.6, %edi
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end20:
	.size	_Z22executeGlobalFunctionsiiPiS_S_S_S_S_, .Lfunc_end20-_Z22executeGlobalFunctionsiiPiS_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z22executeSharedFunctionsiiPiS_S_S_S_S_ # -- Begin function _Z22executeSharedFunctionsiiPiS_S_S_S_S_
	.type	_Z22executeSharedFunctionsiiPiS_S_S_S_S_,@function
_Z22executeSharedFunctionsiiPiS_S_S_S_S_: # @_Z22executeSharedFunctionsiiPiS_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, (%rsp)                    # 8-byte Spill
	movq	%rdx, %r15
	movl	%esi, %ebx
	movl	%edi, %ebp
	leaq	16(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movslq	%ebx, %rax
	leaq	(,%rax,4), %r12
	movl	%ebp, %r13d
	btsq	$32, %r13
	movl	%eax, %ebp
	btsq	$32, %rbp
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB21_2
# %bb.1:
	movq	%r15, %rdi
	movq	(%rsp), %rsi                    # 8-byte Reload
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z24__device_stub__addSharedPiS_S_i
.LBB21_2:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB21_4
# %bb.3:
	movq	%r15, %rdi
	movq	(%rsp), %rsi                    # 8-byte Reload
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movl	%ebx, %ecx
	callq	_Z29__device_stub__subtractSharedPiS_S_i
.LBB21_4:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB21_6
# %bb.5:
	movq	96(%rsp), %rdx
	movq	%r15, %rdi
	movq	(%rsp), %rsi                    # 8-byte Reload
	movl	%ebx, %ecx
	callq	_Z25__device_stub__multSharedPiS_S_i
.LBB21_6:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB21_8
# %bb.7:
	movq	104(%rsp), %rdx
	movq	%r15, %rdi
	movq	(%rsp), %rsi                    # 8-byte Reload
	movl	%ebx, %ecx
	callq	_Z24__device_stub__modSharedPiS_S_i
.LBB21_8:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	36(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.7, %edi
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end21:
	.size	_Z22executeSharedFunctionsiiPiS_S_S_S_S_, .Lfunc_end21-_Z22executeSharedFunctionsiiPiS_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z24executeConstantFunctionsiiPiS_S_S_ # -- Begin function _Z24executeConstantFunctionsiiPiS_S_S_
	.type	_Z24executeConstantFunctionsiiPiS_S_S_,@function
_Z24executeConstantFunctionsiiPiS_S_S_: # @_Z24executeConstantFunctionsiiPiS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movq	%r8, 16(%rsp)                   # 8-byte Spill
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movl	%esi, %ebp
	movl	%edi, %r12d
	leaq	8(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movslq	%ebp, %rax
	leaq	(,%rax,4), %r15
	movl	%r12d, %r12d
	btsq	$32, %r12
	movl	%eax, %r13d
	btsq	$32, %r13
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	movq	%r15, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB22_2
# %bb.1:
	movq	%r14, %rdi
	movl	%ebp, %esi
	callq	_Z23__device_stub__addConstPii
.LBB22_2:
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	movq	%r15, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB22_4
# %bb.3:
	movq	%rbx, %rdi
	movl	%ebp, %esi
	callq	_Z28__device_stub__subtractConstPii
.LBB22_4:
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	movq	%r15, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB22_6
# %bb.5:
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movl	%ebp, %esi
	callq	_Z24__device_stub__multConstPii
.LBB22_6:
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	movq	%r15, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB22_8
# %bb.7:
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	%ebp, %esi
	callq	_Z23__device_stub__modConstPii
.LBB22_8:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	36(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end22:
	.size	_Z24executeConstantFunctionsiiPiS_S_S_, .Lfunc_end22-_Z24executeConstantFunctionsiiPiS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z24executeRegisterFunctionsiiPiS_S_S_S_S_ # -- Begin function _Z24executeRegisterFunctionsiiPiS_S_S_S_S_
	.type	_Z24executeRegisterFunctionsiiPiS_S_S_S_S_,@function
_Z24executeRegisterFunctionsiiPiS_S_S_S_S_: # @_Z24executeRegisterFunctionsiiPiS_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, (%rsp)                    # 8-byte Spill
	movq	%rdx, %r15
	movl	%esi, %ebx
	movl	%edi, %ebp
	leaq	16(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movslq	%ebx, %rax
	leaq	(,%rax,4), %r12
	movl	%ebp, %r13d
	btsq	$32, %r13
	movl	%eax, %ebp
	btsq	$32, %rbp
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB23_2
# %bb.1:
	movq	%r15, %rdi
	movq	(%rsp), %rsi                    # 8-byte Reload
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z21__device_stub__addRegPiS_S_i
.LBB23_2:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB23_4
# %bb.3:
	movq	%r15, %rdi
	movq	(%rsp), %rsi                    # 8-byte Reload
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movl	%ebx, %ecx
	callq	_Z26__device_stub__subtractRegPiS_S_i
.LBB23_4:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB23_6
# %bb.5:
	movq	96(%rsp), %rdx
	movq	%r15, %rdi
	movq	(%rsp), %rsi                    # 8-byte Reload
	movl	%ebx, %ecx
	callq	_Z22__device_stub__multRegPiS_S_i
.LBB23_6:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB23_8
# %bb.7:
	movq	104(%rsp), %rdx
	movq	%r15, %rdi
	movq	(%rsp), %rsi                    # 8-byte Reload
	movl	%ebx, %ecx
	callq	_Z21__device_stub__modRegPiS_S_i
.LBB23_8:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	36(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end23:
	.size	_Z24executeRegisterFunctionsiiPiS_S_S_S_S_, .Lfunc_end23-_Z24executeRegisterFunctionsiiPiS_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z7gpuTestiii                   # -- Begin function _Z7gpuTestiii
	.type	_Z7gpuTestiii,@function
_Z7gpuTestiii:                          # @_Z7gpuTestiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %r15d
	movl	%esi, %r14d
	movl	%edi, %ebp
	leal	(,%r14,4), %ebx
	leaq	64(%rsp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	56(%rsp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	96(%rsp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	88(%rsp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	80(%rsp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	72(%rsp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	cmpl	$3, %r15d
	je	.LBB24_2
# %bb.1:
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
.LBB24_2:
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%r14d, %r14d
	jle	.LBB24_5
# %bb.3:                                # %.lr.ph.preheader
	movl	%r14d, %r12d
	xorl	%r13d, %r13d
.LBB24_4:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	64(%rsp), %rax
	movl	%r13d, (%rax,%r13,4)
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	3(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-4, %ecx
	subl	%ecx, %eax
	movq	56(%rsp), %rcx
	movl	%eax, (%rcx,%r13,4)
	incq	%r13
	cmpq	%r13, %r12
	jne	.LBB24_4
.LBB24_5:                               # %._crit_edge
	decl	%r15d
	cmpl	$3, %r15d
	ja	.LBB24_13
# %bb.6:                                # %._crit_edge
	jmpq	*.LJTI24_0(,%r15,8)
.LBB24_7:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movq	48(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	56(%rsp), %rcx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$.L.str.11, %r9d
	movl	%ebx, %r8d
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	_Z25profileCopiesHostToDevicePiS_S_S_jPKci
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rcx
	movq	8(%rsp), %r8
	movq	24(%rsp), %r9
	movl	%ebp, %edi
	movl	%r14d, %esi
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z22executeGlobalFunctionsiiPiS_S_S_S_S_
	jmp	.LBB24_8
.LBB24_11:
	.cfi_def_cfa_offset 160
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rcx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$d_a_const, %edi
	movl	$d_b_const, %edx
	movl	$.L.str.15, %r9d
	movl	%ebx, %r8d
	pushq	$3
	.cfi_adjust_cfa_offset 8
	callq	_Z25profileCopiesHostToDevicePiS_S_S_jPKci
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rcx
	movq	16(%rsp), %r8
	movq	32(%rsp), %r9
	movl	%ebp, %edi
	movl	%r14d, %esi
	callq	_Z24executeConstantFunctionsiiPiS_S_S_
	movq	96(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	88(%rsp), %rdx
	movq	24(%rsp), %rcx
	movq	80(%rsp), %r8
	movq	16(%rsp), %r9
	pushq	$.L.str.15
	.cfi_adjust_cfa_offset 8
	jmp	.LBB24_9
.LBB24_12:
	.cfi_def_cfa_offset 160
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	48(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	56(%rsp), %rcx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$.L.str.17, %r9d
	movl	%ebx, %r8d
	pushq	$4
	.cfi_adjust_cfa_offset 8
	callq	_Z25profileCopiesHostToDevicePiS_S_S_jPKci
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rcx
	movq	8(%rsp), %r8
	movq	24(%rsp), %r9
	movl	%ebp, %edi
	movl	%r14d, %esi
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z24executeRegisterFunctionsiiPiS_S_S_S_S_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movq	96(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	88(%rsp), %rdx
	movq	24(%rsp), %rcx
	movq	80(%rsp), %r8
	movq	16(%rsp), %r9
	pushq	$.L.str.17
	.cfi_adjust_cfa_offset 8
	jmp	.LBB24_9
.LBB24_10:
	.cfi_def_cfa_offset 160
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	48(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	56(%rsp), %rcx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$.L.str.12, %r9d
	movl	%ebx, %r8d
	pushq	$2
	.cfi_adjust_cfa_offset 8
	callq	_Z25profileCopiesHostToDevicePiS_S_S_jPKci
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rcx
	movq	8(%rsp), %r8
	movq	24(%rsp), %r9
	movl	%ebp, %edi
	movl	%r14d, %esi
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z22executeSharedFunctionsiiPiS_S_S_S_S_
.LBB24_8:
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movq	96(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	88(%rsp), %rdx
	movq	24(%rsp), %rcx
	movq	80(%rsp), %r8
	movq	16(%rsp), %r9
	pushq	$.L.str.12
	.cfi_adjust_cfa_offset 8
.LBB24_9:
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z25profileCopiesDeviceToHostPiS_S_S_S_S_S_S_jPKc
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB24_14:
	movq	64(%rsp), %rdi
	movl	$.L.str.19, %edx
	movl	$7, %esi
	callq	_Z10printArrayPiiPKc
	movq	56(%rsp), %rdi
	movl	$.L.str.20, %edx
	movl	$7, %esi
	callq	_Z10printArrayPiiPKc
	movl	$10, %edi
	callq	putchar@PLT
	movq	96(%rsp), %rdi
	movl	$.L.str.22, %edx
	movl	$7, %esi
	callq	_Z10printArrayPiiPKc
	movq	88(%rsp), %rdi
	movl	$.L.str.23, %edx
	movl	$7, %esi
	callq	_Z10printArrayPiiPKc
	movq	80(%rsp), %rdi
	movl	$.L.str.24, %edx
	movl	$7, %esi
	callq	_Z10printArrayPiiPKc
	movq	72(%rsp), %rdi
	movl	$.L.str.25, %edx
	movl	$7, %esi
	callq	_Z10printArrayPiiPKc
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipHostFree
	movq	56(%rsp), %rdi
	callq	hipHostFree
	movq	96(%rsp), %rdi
	callq	hipHostFree
	movq	88(%rsp), %rdi
	callq	hipHostFree
	movq	80(%rsp), %rdi
	callq	hipHostFree
	movq	72(%rsp), %rdi
	callq	hipHostFree
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB24_13:
	.cfi_def_cfa_offset 160
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	jmp	.LBB24_14
.Lfunc_end24:
	.size	_Z7gpuTestiii, .Lfunc_end24-_Z7gpuTestiii
	.cfi_endproc
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
.LJTI24_0:
	.quad	.LBB24_7
	.quad	.LBB24_10
	.quad	.LBB24_11
	.quad	.LBB24_12
                                        # -- End function
	.text
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$3, %edi
	jne	.LBB25_1
# %bb.2:
	movq	%rsi, %r14
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %r14d
	jmp	.LBB25_3
.LBB25_1:
	movl	$256, %r14d                     # imm = 0x100
	movl	$1024, %ebx                     # imm = 0x400
.LBB25_3:
	movl	%ebx, %eax
	cltd
	idivl	%r14d
	movl	%edx, %r15d
	movl	%eax, %ebp
	movl	$.L.str.27, %edi
	movl	%ebx, %esi
	movl	%r14d, %edx
	xorl	%eax, %eax
	callq	printf
	testl	%r15d, %r15d
	je	.LBB25_5
# %bb.4:
	incl	%ebp
	imull	%ebp, %r14d
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	movl	$.L.str.29, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%r14d, %ebx
.LBB25_5:
	movl	%ebx, %edi
	callq	_Z13printDataInfoi
	movl	%ebp, %edi
	movl	%ebx, %esi
	movl	$1, %edx
	callq	_Z7gpuTestiii
	movl	%ebp, %edi
	movl	%ebx, %esi
	movl	$2, %edx
	callq	_Z7gpuTestiii
	movl	%ebp, %edi
	movl	%ebx, %esi
	movl	$3, %edx
	callq	_Z7gpuTestiii
	movl	%ebp, %edi
	movl	%ebx, %esi
	movl	$4, %edx
	callq	_Z7gpuTestiii
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end25:
	.size	main, .Lfunc_end25-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB26_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB26_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3addPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9addSharedPiS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8addConstPii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6addRegPiS_S_i, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8subtractPiS_S_i, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14subtractSharedPiS_S_i, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13subtractConstPii, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11subtractRegPiS_S_i, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4multPiS_S_i, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10multSharedPiS_S_i, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9multConstPii, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7multRegPiS_S_i, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3modPiS_S_i, %esi
	movl	$.L__unnamed_13, %edx
	movl	$.L__unnamed_13, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9modSharedPiS_S_i, %esi
	movl	$.L__unnamed_14, %edx
	movl	$.L__unnamed_14, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8modConstPii, %esi
	movl	$.L__unnamed_15, %edx
	movl	$.L__unnamed_15, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6modRegPiS_S_i, %esi
	movl	$.L__unnamed_16, %edx
	movl	$.L__unnamed_16, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$d_a_const, %esi
	movl	$.L__unnamed_17, %edx
	movl	$.L__unnamed_17, %ecx
	movl	$4096, %r9d                     # imm = 0x1000
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$d_b_const, %esi
	movl	$.L__unnamed_18, %edx
	movl	$.L__unnamed_18, %ecx
	movl	$4096, %r9d                     # imm = 0x1000
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end26:
	.size	__hip_module_ctor, .Lfunc_end26-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB27_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB27_2:
	retq
.Lfunc_end27:
	.size	__hip_module_dtor, .Lfunc_end27-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	d_a_const,@object               # @d_a_const
	.local	d_a_const
	.comm	d_a_const,4096,16
	.type	d_b_const,@object               # @d_b_const
	.local	d_b_const
	.comm	d_b_const,4096,16
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\n%s: "
	.size	.L.str, 6

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d "
	.size	.L.str.1, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\nDevice: %s\n"
	.size	.L.str.2, 13

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Transfer size (MB): %d\n\n"
	.size	.L.str.3, 25

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\n%s Transfers Host to Device Time Elaped: %f ms, Bandwidth (MB/s): %f\n\n"
	.size	.L.str.4, 72

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\n%s transfers Device To Host Time Elaped: %f ms, Bandwidth (MB/s): %f\n"
	.size	.L.str.5, 71

	.type	_Z3addPiS_S_i,@object           # @_Z3addPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z3addPiS_S_i
	.p2align	3, 0x0
_Z3addPiS_S_i:
	.quad	_Z18__device_stub__addPiS_S_i
	.size	_Z3addPiS_S_i, 8

	.type	_Z9addSharedPiS_S_i,@object     # @_Z9addSharedPiS_S_i
	.globl	_Z9addSharedPiS_S_i
	.p2align	3, 0x0
_Z9addSharedPiS_S_i:
	.quad	_Z24__device_stub__addSharedPiS_S_i
	.size	_Z9addSharedPiS_S_i, 8

	.type	_Z8addConstPii,@object          # @_Z8addConstPii
	.globl	_Z8addConstPii
	.p2align	3, 0x0
_Z8addConstPii:
	.quad	_Z23__device_stub__addConstPii
	.size	_Z8addConstPii, 8

	.type	_Z6addRegPiS_S_i,@object        # @_Z6addRegPiS_S_i
	.globl	_Z6addRegPiS_S_i
	.p2align	3, 0x0
_Z6addRegPiS_S_i:
	.quad	_Z21__device_stub__addRegPiS_S_i
	.size	_Z6addRegPiS_S_i, 8

	.type	_Z8subtractPiS_S_i,@object      # @_Z8subtractPiS_S_i
	.globl	_Z8subtractPiS_S_i
	.p2align	3, 0x0
_Z8subtractPiS_S_i:
	.quad	_Z23__device_stub__subtractPiS_S_i
	.size	_Z8subtractPiS_S_i, 8

	.type	_Z14subtractSharedPiS_S_i,@object # @_Z14subtractSharedPiS_S_i
	.globl	_Z14subtractSharedPiS_S_i
	.p2align	3, 0x0
_Z14subtractSharedPiS_S_i:
	.quad	_Z29__device_stub__subtractSharedPiS_S_i
	.size	_Z14subtractSharedPiS_S_i, 8

	.type	_Z13subtractConstPii,@object    # @_Z13subtractConstPii
	.globl	_Z13subtractConstPii
	.p2align	3, 0x0
_Z13subtractConstPii:
	.quad	_Z28__device_stub__subtractConstPii
	.size	_Z13subtractConstPii, 8

	.type	_Z11subtractRegPiS_S_i,@object  # @_Z11subtractRegPiS_S_i
	.globl	_Z11subtractRegPiS_S_i
	.p2align	3, 0x0
_Z11subtractRegPiS_S_i:
	.quad	_Z26__device_stub__subtractRegPiS_S_i
	.size	_Z11subtractRegPiS_S_i, 8

	.type	_Z4multPiS_S_i,@object          # @_Z4multPiS_S_i
	.globl	_Z4multPiS_S_i
	.p2align	3, 0x0
_Z4multPiS_S_i:
	.quad	_Z19__device_stub__multPiS_S_i
	.size	_Z4multPiS_S_i, 8

	.type	_Z10multSharedPiS_S_i,@object   # @_Z10multSharedPiS_S_i
	.globl	_Z10multSharedPiS_S_i
	.p2align	3, 0x0
_Z10multSharedPiS_S_i:
	.quad	_Z25__device_stub__multSharedPiS_S_i
	.size	_Z10multSharedPiS_S_i, 8

	.type	_Z9multConstPii,@object         # @_Z9multConstPii
	.globl	_Z9multConstPii
	.p2align	3, 0x0
_Z9multConstPii:
	.quad	_Z24__device_stub__multConstPii
	.size	_Z9multConstPii, 8

	.type	_Z7multRegPiS_S_i,@object       # @_Z7multRegPiS_S_i
	.globl	_Z7multRegPiS_S_i
	.p2align	3, 0x0
_Z7multRegPiS_S_i:
	.quad	_Z22__device_stub__multRegPiS_S_i
	.size	_Z7multRegPiS_S_i, 8

	.type	_Z3modPiS_S_i,@object           # @_Z3modPiS_S_i
	.globl	_Z3modPiS_S_i
	.p2align	3, 0x0
_Z3modPiS_S_i:
	.quad	_Z18__device_stub__modPiS_S_i
	.size	_Z3modPiS_S_i, 8

	.type	_Z9modSharedPiS_S_i,@object     # @_Z9modSharedPiS_S_i
	.globl	_Z9modSharedPiS_S_i
	.p2align	3, 0x0
_Z9modSharedPiS_S_i:
	.quad	_Z24__device_stub__modSharedPiS_S_i
	.size	_Z9modSharedPiS_S_i, 8

	.type	_Z8modConstPii,@object          # @_Z8modConstPii
	.globl	_Z8modConstPii
	.p2align	3, 0x0
_Z8modConstPii:
	.quad	_Z23__device_stub__modConstPii
	.size	_Z8modConstPii, 8

	.type	_Z6modRegPiS_S_i,@object        # @_Z6modRegPiS_S_i
	.globl	_Z6modRegPiS_S_i
	.p2align	3, 0x0
_Z6modRegPiS_S_i:
	.quad	_Z21__device_stub__modRegPiS_S_i
	.size	_Z6modRegPiS_S_i, 8

	.type	.L.str.6,@object                # @.str.6
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.6:
	.asciz	"Global Memory Functions  Elapsed Time: %f\n"
	.size	.L.str.6, 43

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Shared Memory Functions Elapsed Time: %f\n"
	.size	.L.str.7, 42

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Constant Memory Functions Elapsed Time: %f\n"
	.size	.L.str.8, 44

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Register Memory Functions Elapsed Time: %f\n"
	.size	.L.str.9, 44

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Global"
	.size	.L.str.11, 7

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Shared"
	.size	.L.str.12, 7

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Constant"
	.size	.L.str.15, 9

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"Register"
	.size	.L.str.17, 9

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Array 1"
	.size	.L.str.19, 8

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"Array 2"
	.size	.L.str.20, 8

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"Add Results"
	.size	.L.str.22, 12

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"Subtract Results"
	.size	.L.str.23, 17

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"Multiply Results"
	.size	.L.str.24, 17

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"Modulus Results"
	.size	.L.str.25, 16

	.type	.L.str.27,@object               # @.str.27
.L.str.27:
	.asciz	"\nUsing %d Threads and %d BlockSize\n"
	.size	.L.str.27, 36

	.type	.L.str.29,@object               # @.str.29
.L.str.29:
	.asciz	"The total number of threads will be rounded up to %d\n"
	.size	.L.str.29, 54

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3addPiS_S_i"
	.size	.L__unnamed_1, 14

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9addSharedPiS_S_i"
	.size	.L__unnamed_2, 20

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z8addConstPii"
	.size	.L__unnamed_3, 15

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z6addRegPiS_S_i"
	.size	.L__unnamed_4, 17

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z8subtractPiS_S_i"
	.size	.L__unnamed_5, 19

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z14subtractSharedPiS_S_i"
	.size	.L__unnamed_6, 26

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z13subtractConstPii"
	.size	.L__unnamed_7, 21

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z11subtractRegPiS_S_i"
	.size	.L__unnamed_8, 23

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z4multPiS_S_i"
	.size	.L__unnamed_9, 15

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"_Z10multSharedPiS_S_i"
	.size	.L__unnamed_10, 22

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"_Z9multConstPii"
	.size	.L__unnamed_11, 16

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"_Z7multRegPiS_S_i"
	.size	.L__unnamed_12, 18

	.type	.L__unnamed_13,@object          # @12
.L__unnamed_13:
	.asciz	"_Z3modPiS_S_i"
	.size	.L__unnamed_13, 14

	.type	.L__unnamed_14,@object          # @13
.L__unnamed_14:
	.asciz	"_Z9modSharedPiS_S_i"
	.size	.L__unnamed_14, 20

	.type	.L__unnamed_15,@object          # @14
.L__unnamed_15:
	.asciz	"_Z8modConstPii"
	.size	.L__unnamed_15, 15

	.type	.L__unnamed_16,@object          # @15
.L__unnamed_16:
	.asciz	"_Z6modRegPiS_S_i"
	.size	.L__unnamed_16, 17

	.type	.L__unnamed_17,@object          # @16
.L__unnamed_17:
	.asciz	"d_a_const"
	.size	.L__unnamed_17, 10

	.type	.L__unnamed_18,@object          # @17
.L__unnamed_18:
	.asciz	"d_b_const"
	.size	.L__unnamed_18, 10

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\t\t*****Executing Arithmetic Functions Using Register Memory*****"
	.size	.Lstr, 65

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\t\t*****Executing Arithmetic Functions Using Constant Memory*****"
	.size	.Lstr.1, 65

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\t\t*****Executing Arithmetic Functions Using Shared Memory*****"
	.size	.Lstr.2, 63

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"\t\t*****Executing Arithmetic Functions Using Global Memory*****"
	.size	.Lstr.3, 63

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Unknown Memory Type!"
	.size	.Lstr.4, 21

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"\n"
	.size	.Lstr.5, 2

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"Warning: Total thread count is not evenly divisible by the block size"
	.size	.Lstr.6, 70

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__addPiS_S_i
	.addrsig_sym _Z24__device_stub__addSharedPiS_S_i
	.addrsig_sym _Z23__device_stub__addConstPii
	.addrsig_sym _Z21__device_stub__addRegPiS_S_i
	.addrsig_sym _Z23__device_stub__subtractPiS_S_i
	.addrsig_sym _Z29__device_stub__subtractSharedPiS_S_i
	.addrsig_sym _Z28__device_stub__subtractConstPii
	.addrsig_sym _Z26__device_stub__subtractRegPiS_S_i
	.addrsig_sym _Z19__device_stub__multPiS_S_i
	.addrsig_sym _Z25__device_stub__multSharedPiS_S_i
	.addrsig_sym _Z24__device_stub__multConstPii
	.addrsig_sym _Z22__device_stub__multRegPiS_S_i
	.addrsig_sym _Z18__device_stub__modPiS_S_i
	.addrsig_sym _Z24__device_stub__modSharedPiS_S_i
	.addrsig_sym _Z23__device_stub__modConstPii
	.addrsig_sym _Z21__device_stub__modRegPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym d_a_const
	.addrsig_sym d_b_const
	.addrsig_sym _Z3addPiS_S_i
	.addrsig_sym _Z9addSharedPiS_S_i
	.addrsig_sym _Z8addConstPii
	.addrsig_sym _Z6addRegPiS_S_i
	.addrsig_sym _Z8subtractPiS_S_i
	.addrsig_sym _Z14subtractSharedPiS_S_i
	.addrsig_sym _Z13subtractConstPii
	.addrsig_sym _Z11subtractRegPiS_S_i
	.addrsig_sym _Z4multPiS_S_i
	.addrsig_sym _Z10multSharedPiS_S_i
	.addrsig_sym _Z9multConstPii
	.addrsig_sym _Z7multRegPiS_S_i
	.addrsig_sym _Z3modPiS_S_i
	.addrsig_sym _Z9modSharedPiS_S_i
	.addrsig_sym _Z8modConstPii
	.addrsig_sym _Z6modRegPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3addPiS_S_i           ; -- Begin function _Z3addPiS_S_i
	.globl	_Z3addPiS_S_i
	.p2align	8
	.type	_Z3addPiS_S_i,@function
_Z3addPiS_S_i:                          ; @_Z3addPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3addPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3addPiS_S_i, .Lfunc_end0-_Z3addPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9addSharedPiS_S_i     ; -- Begin function _Z9addSharedPiS_S_i
	.globl	_Z9addSharedPiS_S_i
	.p2align	8
	.type	_Z9addSharedPiS_S_i,@function
_Z9addSharedPiS_S_i:                    ; @_Z9addSharedPiS_S_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	global_load_b32 v1, v[1:2], off
	v_lshl_add_u32 v2, v0, 2, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v1, v3
	ds_store_b32 v2, v1
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v1, 0, v0
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9addSharedPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9addSharedPiS_S_i, .Lfunc_end1-_Z9addSharedPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 220
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8addConstPii          ; -- Begin function _Z8addConstPii
	.globl	_Z8addConstPii
	.p2align	8
	.type	_Z8addConstPii,@function
_Z8addConstPii:                         ; @_Z8addConstPii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB2_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_a_const@rel32@lo+4
	s_addc_u32 s3, s3, d_a_const@rel32@hi+12
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, d_b_const@rel32@lo+4
	s_addc_u32 s5, s5, d_b_const@rel32@hi+12
	s_load_b64 s[0:1], s[0:1], 0x0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v0, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, v0, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8addConstPii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z8addConstPii, .Lfunc_end2-_Z8addConstPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 208
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6addRegPiS_S_i        ; -- Begin function _Z6addRegPiS_S_i
	.globl	_Z6addRegPiS_S_i
	.p2align	8
	.type	_Z6addRegPiS_S_i,@function
_Z6addRegPiS_S_i:                       ; @_Z6addRegPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6addRegPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z6addRegPiS_S_i, .Lfunc_end3-_Z6addRegPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8subtractPiS_S_i      ; -- Begin function _Z8subtractPiS_S_i
	.globl	_Z8subtractPiS_S_i
	.p2align	8
	.type	_Z8subtractPiS_S_i,@function
_Z8subtractPiS_S_i:                     ; @_Z8subtractPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB4_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB4_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8subtractPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z8subtractPiS_S_i, .Lfunc_end4-_Z8subtractPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14subtractSharedPiS_S_i ; -- Begin function _Z14subtractSharedPiS_S_i
	.globl	_Z14subtractSharedPiS_S_i
	.p2align	8
	.type	_Z14subtractSharedPiS_S_i,@function
_Z14subtractSharedPiS_S_i:              ; @_Z14subtractSharedPiS_S_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB5_2
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	global_load_b32 v1, v[1:2], off
	v_lshl_add_u32 v2, v0, 2, 0
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v1, v3, v1
	ds_store_b32 v2, v1
.LBB5_2:
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v1, 0, v0
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14subtractSharedPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z14subtractSharedPiS_S_i, .Lfunc_end5-_Z14subtractSharedPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 220
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13subtractConstPii    ; -- Begin function _Z13subtractConstPii
	.globl	_Z13subtractConstPii
	.p2align	8
	.type	_Z13subtractConstPii,@function
_Z13subtractConstPii:                   ; @_Z13subtractConstPii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB6_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_a_const@rel32@lo+4
	s_addc_u32 s3, s3, d_a_const@rel32@hi+12
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, d_b_const@rel32@lo+4
	s_addc_u32 s5, s5, d_b_const@rel32@hi+12
	s_load_b64 s[0:1], s[0:1], 0x0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v0, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, v0, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB6_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13subtractConstPii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z13subtractConstPii, .Lfunc_end6-_Z13subtractConstPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 208
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11subtractRegPiS_S_i  ; -- Begin function _Z11subtractRegPiS_S_i
	.globl	_Z11subtractRegPiS_S_i
	.p2align	8
	.type	_Z11subtractRegPiS_S_i,@function
_Z11subtractRegPiS_S_i:                 ; @_Z11subtractRegPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB7_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB7_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11subtractRegPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z11subtractRegPiS_S_i, .Lfunc_end7-_Z11subtractRegPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z4multPiS_S_i          ; -- Begin function _Z4multPiS_S_i
	.globl	_Z4multPiS_S_i
	.p2align	8
	.type	_Z4multPiS_S_i,@function
_Z4multPiS_S_i:                         ; @_Z4multPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB8_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB8_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4multPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	_Z4multPiS_S_i, .Lfunc_end8-_Z4multPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 184
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10multSharedPiS_S_i   ; -- Begin function _Z10multSharedPiS_S_i
	.globl	_Z10multSharedPiS_S_i
	.p2align	8
	.type	_Z10multSharedPiS_S_i,@function
_Z10multSharedPiS_S_i:                  ; @_Z10multSharedPiS_S_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB9_2
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	global_load_b32 v1, v[1:2], off
	v_lshl_add_u32 v2, v0, 2, 0
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v1, v1, v3
	ds_store_b32 v2, v1
.LBB9_2:
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v1, 0, v0
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10multSharedPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end9:
	.size	_Z10multSharedPiS_S_i, .Lfunc_end9-_Z10multSharedPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 224
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9multConstPii         ; -- Begin function _Z9multConstPii
	.globl	_Z9multConstPii
	.p2align	8
	.type	_Z9multConstPii,@function
_Z9multConstPii:                        ; @_Z9multConstPii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB10_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_a_const@rel32@lo+4
	s_addc_u32 s3, s3, d_a_const@rel32@hi+12
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, d_b_const@rel32@lo+4
	s_addc_u32 s5, s5, d_b_const@rel32@hi+12
	s_load_b64 s[0:1], s[0:1], 0x0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v0, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, v0, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB10_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9multConstPii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end10:
	.size	_Z9multConstPii, .Lfunc_end10-_Z9multConstPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 212
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7multRegPiS_S_i       ; -- Begin function _Z7multRegPiS_S_i
	.globl	_Z7multRegPiS_S_i
	.p2align	8
	.type	_Z7multRegPiS_S_i,@function
_Z7multRegPiS_S_i:                      ; @_Z7multRegPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB11_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB11_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7multRegPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end11:
	.size	_Z7multRegPiS_S_i, .Lfunc_end11-_Z7multRegPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 184
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z3modPiS_S_i           ; -- Begin function _Z3modPiS_S_i
	.globl	_Z3modPiS_S_i
	.p2align	8
	.type	_Z3modPiS_S_i,@function
_Z3modPiS_S_i:                          ; @_Z3modPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB12_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v4, v[2:3], off
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(1)
	v_ashrrev_i32_e32 v3, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v6, 31, v2
	v_xor_b32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v2, v6
	v_cvt_f32_u32_e32 v4, v3
	v_sub_nc_u32_e32 v5, 0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v2, v2, v6
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v4
	v_mul_lo_u32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v4, v5
	v_add_nc_u32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v2, v4
	v_mul_lo_u32 v4, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v4
	v_sub_nc_u32_e32 v4, v2, v3
	v_cmp_ge_u32_e32 vcc_lo, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_sub_nc_u32_e32 v4, v2, v3
	v_cmp_ge_u32_e32 vcc_lo, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_xor_b32_e32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v6
	global_store_b32 v[0:1], v2, off
.LBB12_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3modPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end12:
	.size	_Z3modPiS_S_i, .Lfunc_end12-_Z3modPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 344
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9modSharedPiS_S_i     ; -- Begin function _Z9modSharedPiS_S_i
	.globl	_Z9modSharedPiS_S_i
	.p2align	8
	.type	_Z9modSharedPiS_S_i,@function
_Z9modSharedPiS_S_i:                    ; @_Z9modSharedPiS_S_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB13_2
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(1)
	v_ashrrev_i32_e32 v2, 31, v3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v5, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v3, v2
	v_add_nc_u32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v2, v3, v2
	v_xor_b32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v3, v2
	v_sub_nc_u32_e32 v4, 0, v2
	v_rcp_iflag_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x4f7ffffe, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v3, v3
	v_mul_lo_u32 v4, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v4
	v_add_nc_u32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v1, v3
	v_mul_lo_u32 v3, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v3
	v_sub_nc_u32_e32 v3, v1, v2
	v_cmp_ge_u32_e32 vcc_lo, v1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, v1, v3, vcc_lo
	v_sub_nc_u32_e32 v3, v1, v2
	v_cmp_ge_u32_e32 vcc_lo, v1, v2
	v_lshl_add_u32 v2, v0, 2, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, v1, v3, vcc_lo
	v_xor_b32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v5
	ds_store_b32 v2, v1
.LBB13_2:
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v1, 0, v0
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9modSharedPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end13:
	.size	_Z9modSharedPiS_S_i, .Lfunc_end13-_Z9modSharedPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 384
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8modConstPii          ; -- Begin function _Z8modConstPii
	.globl	_Z8modConstPii
	.p2align	8
	.type	_Z8modConstPii,@function
_Z8modConstPii:                         ; @_Z8modConstPii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB14_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_b_const@rel32@lo+4
	s_addc_u32 s3, s3, d_b_const@rel32@hi+12
	s_load_b64 s[0:1], s[0:1], 0x0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v0, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_a_const@rel32@lo+4
	s_addc_u32 s3, s3, d_a_const@rel32@hi+12
	global_load_b32 v4, v[2:3], off
	v_add_co_u32 v2, vcc_lo, v0, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(1)
	v_ashrrev_i32_e32 v3, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v6, 31, v2
	v_xor_b32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v2, v6
	v_cvt_f32_u32_e32 v4, v3
	v_sub_nc_u32_e32 v5, 0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v2, v2, v6
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v4
	v_mul_lo_u32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v4, v5
	v_add_nc_u32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v2, v4
	v_mul_lo_u32 v4, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v4
	v_sub_nc_u32_e32 v4, v2, v3
	v_cmp_ge_u32_e32 vcc_lo, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_sub_nc_u32_e32 v4, v2, v3
	v_cmp_ge_u32_e32 vcc_lo, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_xor_b32_e32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v6
	global_store_b32 v[0:1], v2, off
.LBB14_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8modConstPii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end14:
	.size	_Z8modConstPii, .Lfunc_end14-_Z8modConstPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 372
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6modRegPiS_S_i        ; -- Begin function _Z6modRegPiS_S_i
	.globl	_Z6modRegPiS_S_i
	.p2align	8
	.type	_Z6modRegPiS_S_i,@function
_Z6modRegPiS_S_i:                       ; @_Z6modRegPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB15_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v4, v[2:3], off
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(1)
	v_ashrrev_i32_e32 v3, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v6, 31, v2
	v_xor_b32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v2, v6
	v_cvt_f32_u32_e32 v4, v3
	v_sub_nc_u32_e32 v5, 0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v2, v2, v6
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v4
	v_mul_lo_u32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v4, v5
	v_add_nc_u32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v2, v4
	v_mul_lo_u32 v4, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v4
	v_sub_nc_u32_e32 v4, v2, v3
	v_cmp_ge_u32_e32 vcc_lo, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_sub_nc_u32_e32 v4, v2, v3
	v_cmp_ge_u32_e32 vcc_lo, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_xor_b32_e32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v6
	global_store_b32 v[0:1], v2, off
.LBB15_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6modRegPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end15:
	.size	_Z6modRegPiS_S_i, .Lfunc_end15-_Z6modRegPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 344
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	d_a_const               ; @d_a_const
	.type	d_a_const,@object
	.section	.bss,"aw",@nobits
	.globl	d_a_const
	.p2align	4, 0x0
d_a_const:
	.zero	4096
	.size	d_a_const, 4096

	.protected	d_b_const               ; @d_b_const
	.type	d_b_const,@object
	.globl	d_b_const
	.p2align	4, 0x0
d_b_const:
	.zero	4096
	.size	d_b_const, 4096

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym d_a_const
	.addrsig_sym d_b_const
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
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        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
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        .value_kind:     by_value
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        .value_kind:     hidden_block_count_x
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        .size:           4
        .value_kind:     hidden_block_count_y
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        .size:           4
        .value_kind:     hidden_block_count_z
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        .size:           2
        .value_kind:     hidden_group_size_x
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        .size:           2
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        .size:           2
        .value_kind:     hidden_group_size_z
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        .size:           2
        .value_kind:     hidden_remainder_x
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        .size:           2
        .value_kind:     hidden_remainder_y
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        .size:           2
        .value_kind:     hidden_remainder_z
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        .size:           8
        .value_kind:     hidden_global_offset_x
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        .size:           8
        .value_kind:     hidden_global_offset_y
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        .size:           8
        .value_kind:     hidden_global_offset_z
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        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3addPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3addPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .size:           8
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        .value_kind:     hidden_grid_dims
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        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9addSharedPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9addSharedPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
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    .group_segment_fixed_size: 0
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    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8addConstPii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8addConstPii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
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