#define _NTHREAD 512
#define _NBLOCK 65535

__global__ void _AFFINE_KERNEL(int* ,int ,int* ,int ,int ,int ,int );

#define MIN(a,b) (((a)<(b))?(a):(b))
#include<cuda.h>
#include<stdio.h>
#include<stdlib.h>
int main()
{
    int x[20];
    int w[20],i,j,k;
    for(i=0;i<20;i++)
    {
        x[i]=2*i;
        w[i]=2*i;
    }
	int _SZ_w_1 = 20;
	int _SZ_x_1 = 20;
	int *_DEV_w;
	cudaMalloc((void**) &_DEV_w, sizeof(int)*_SZ_w_1);
	cudaMemcpy(_DEV_w, w, sizeof(int)*_SZ_w_1, cudaMemcpyHostToDevice);
	int *_DEV_x;
	cudaMalloc((void**) &_DEV_x, sizeof(int)*_SZ_x_1);
	cudaMemcpy(_DEV_x, x, sizeof(int)*_SZ_x_1, cudaMemcpyHostToDevice);
	int _NUM_THREADS = 20;
	float _NUM_BLOCKS=1;
	int _NUM_TILE=1;
	dim3 _THREADS(512);
	dim3 _BLOCKS(1);
	if(_NUM_THREADS < _NTHREAD)
	{
		_THREADS.x=_NUM_THREADS;
	}
	else {
		 _THREADS.x=_NTHREAD;
		_NUM_BLOCKS=(_NUM_THREADS % _NTHREAD == 0)?(_NUM_THREADS/_NTHREAD):((_NUM_THREADS/_NTHREAD)+1);
		if(_NUM_BLOCKS<_NBLOCK)
			_BLOCKS.x=_NUM_BLOCKS;
		else {
			_BLOCKS.x=_NBLOCK;
			int temp=_NUM_BLOCKS;
			_NUM_TILE=(temp % _NBLOCK == 0)?(_NUM_BLOCKS/_NBLOCK):((_NUM_BLOCKS/_NBLOCK)+1);
		}
	}
	int ID_1, ID_2, START[1];
	int _CUDA_TILE;
	int Phi[1]={19};
	int loopUpperLimits[1]={9};
	for(ID_1=1;ID_1<=9/19+1;ID_1++)
	{
		for(ID_2=0;ID_2<1;ID_2++)
		{
			if(Phi[ID_2]>=0)
				START[ID_2]=(ID_1-1)*Phi[ID_2];
			else
				START[ID_2]=loopUpperLimits[ID_2]+(ID_1-1)*Phi[ID_2];
		}
		for(_CUDA_TILE=0;_CUDA_TILE<_NUM_TILE;_CUDA_TILE++)
		{
			_AFFINE_KERNEL<<<_BLOCKS,_THREADS>>>(_DEV_w, _SZ_w_1, _DEV_x, _SZ_x_1, START[0], MIN(START[0]+19, 9), _CUDA_TILE);
			cudaDeviceSynchronize();
		}
	}
	cudaMemcpy(w, _DEV_w, sizeof(int)*_SZ_w_1, cudaMemcpyDeviceToHost);
	cudaMemcpy(x, _DEV_x, sizeof(int)*_SZ_x_1, cudaMemcpyDeviceToHost);
	cudaFree(_DEV_w);
	cudaFree(_DEV_x);
    
    return 0;
}



__global__ void _AFFINE_KERNEL(int* w,int _SZ_w_1,int* x,int _SZ_x_1,int CUDA_L_i,int CUDA_U_i, int _CUDA_TILE)
{
	int i = gridDim.x*blockDim.x*_CUDA_TILE + blockDim.x*blockIdx.x + threadIdx.x;
	if((CUDA_L_i<=i)&&(i<=CUDA_U_i)){
		x[1+i-1]=-x[20-1-i];
		w[1+i-1]=w[20-1-i];
}}


	.file	"tmpxft_00334379_00000000-6_SandiaRules.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z41__device_stub__Z14_AFFINE_KERNELPiiS_iiiiPiiS_iiii
	.type	_Z41__device_stub__Z14_AFFINE_KERNELPiiS_iiiiPiiS_iiii, @function
_Z41__device_stub__Z14_AFFINE_KERNELPiiS_iiiiPiiS_iiii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsp, %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z14_AFFINE_KERNELPiiS_iiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 192
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z41__device_stub__Z14_AFFINE_KERNELPiiS_iiiiPiiS_iiii, .-_Z41__device_stub__Z14_AFFINE_KERNELPiiS_iiiiPiiS_iiii
	.globl	_Z14_AFFINE_KERNELPiiS_iiii
	.type	_Z14_AFFINE_KERNELPiiS_iiii, @function
_Z14_AFFINE_KERNELPiiS_iiii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z14_AFFINE_KERNELPiiS_iiiiPiiS_iiii
	.cfi_endproc
.LFE2053:
	.size	_Z14_AFFINE_KERNELPiiS_iiii, .-_Z14_AFFINE_KERNELPiiS_iiii
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$216, %rsp
	.cfi_def_cfa_offset 240
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rbx
	leaq	120(%rsp), %rbp
.L9:
	leal	(%rax,%rax), %edx
	movl	%edx, (%rbx,%rax,4)
	movl	%edx, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$20, %rax
	jne	.L9
	movq	%rsp, %rdi
	movl	$80, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$80, %edx
	call	cudaMemcpy@PLT
	leaq	8(%rsp), %rdi
	movl	$80, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$80, %edx
	call	cudaMemcpy@PLT
	movl	$1073741829, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$2, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	%rax
	.cfi_def_cfa_offset 248
	movl	$20, %ecx
	movl	$9, %r9d
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 256
	movq	24(%rsp), %rdx
	movl	$20, %esi
	movq	16(%rsp), %rdi
	call	_Z41__device_stub__Z14_AFFINE_KERNELPiiS_iiiiPiiS_iiii
	popq	%rdx
	.cfi_def_cfa_offset 248
	popq	%rcx
	.cfi_def_cfa_offset 240
.L10:
	call	cudaDeviceSynchronize@PLT
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$80, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$80, %edx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$216, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z14_AFFINE_KERNELPiiS_iiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14_AFFINE_KERNELPiiS_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#define _NTHREAD 512
#define _NBLOCK 65535

__global__ void _AFFINE_KERNEL(int* ,int ,int* ,int ,int ,int ,int );

#define MIN(a,b) (((a)<(b))?(a):(b))
#include<hip/hip_runtime.h>
#include<stdio.h>
#include<stdlib.h>
int main()
{
    int x[20];
    int w[20],i,j,k;
    for(i=0;i<20;i++)
    {
        x[i]=2*i;
        w[i]=2*i;
    }
	int _SZ_w_1 = 20;
	int _SZ_x_1 = 20;
	int *_DEV_w;
	hipMalloc((void**) &_DEV_w, sizeof(int)*_SZ_w_1);
	hipMemcpy(_DEV_w, w, sizeof(int)*_SZ_w_1, hipMemcpyHostToDevice);
	int *_DEV_x;
	hipMalloc((void**) &_DEV_x, sizeof(int)*_SZ_x_1);
	hipMemcpy(_DEV_x, x, sizeof(int)*_SZ_x_1, hipMemcpyHostToDevice);
	int _NUM_THREADS = 20;
	float _NUM_BLOCKS=1;
	int _NUM_TILE=1;
	dim3 _THREADS(512);
	dim3 _BLOCKS(1);
	if(_NUM_THREADS < _NTHREAD)
	{
		_THREADS.x=_NUM_THREADS;
	}
	else {
		 _THREADS.x=_NTHREAD;
		_NUM_BLOCKS=(_NUM_THREADS % _NTHREAD == 0)?(_NUM_THREADS/_NTHREAD):((_NUM_THREADS/_NTHREAD)+1);
		if(_NUM_BLOCKS<_NBLOCK)
			_BLOCKS.x=_NUM_BLOCKS;
		else {
			_BLOCKS.x=_NBLOCK;
			int temp=_NUM_BLOCKS;
			_NUM_TILE=(temp % _NBLOCK == 0)?(_NUM_BLOCKS/_NBLOCK):((_NUM_BLOCKS/_NBLOCK)+1);
		}
	}
	int ID_1, ID_2, START[1];
	int _CUDA_TILE;
	int Phi[1]={19};
	int loopUpperLimits[1]={9};
	for(ID_1=1;ID_1<=9/19+1;ID_1++)
	{
		for(ID_2=0;ID_2<1;ID_2++)
		{
			if(Phi[ID_2]>=0)
				START[ID_2]=(ID_1-1)*Phi[ID_2];
			else
				START[ID_2]=loopUpperLimits[ID_2]+(ID_1-1)*Phi[ID_2];
		}
		for(_CUDA_TILE=0;_CUDA_TILE<_NUM_TILE;_CUDA_TILE++)
		{
			_AFFINE_KERNEL<<<_BLOCKS,_THREADS>>>(_DEV_w, _SZ_w_1, _DEV_x, _SZ_x_1, START[0], MIN(START[0]+19, 9), _CUDA_TILE);
			hipDeviceSynchronize();
		}
	}
	hipMemcpy(w, _DEV_w, sizeof(int)*_SZ_w_1, hipMemcpyDeviceToHost);
	hipMemcpy(x, _DEV_x, sizeof(int)*_SZ_x_1, hipMemcpyDeviceToHost);
	hipFree(_DEV_w);
	hipFree(_DEV_x);
    
    return 0;
}



__global__ void _AFFINE_KERNEL(int* w,int _SZ_w_1,int* x,int _SZ_x_1,int CUDA_L_i,int CUDA_U_i, int _CUDA_TILE)
{
	int i = gridDim.x*blockDim.x*_CUDA_TILE + blockDim.x*blockIdx.x + threadIdx.x;
	if((CUDA_L_i<=i)&&(i<=CUDA_U_i)){
		x[1+i-1]=-x[20-1-i];
		w[1+i-1]=w[20-1-i];
}}


	.text
	.file	"SandiaRules.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$192, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -16
	xorl	%eax, %eax
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, 112(%rsp,%rax,2)
	movl	%eax, 32(%rsp,%rax,2)
	addq	$2, %rax
	cmpq	$40, %rax
	jne	.LBB0_1
# %bb.2:                                # %.critedge
	leaq	24(%rsp), %rbx
	movl	$80, %esi
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	leaq	32(%rsp), %rsi
	movl	$80, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rbx
	movl	$80, %esi
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	leaq	112(%rsp), %rsi
	movl	$80, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	19(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rdx
	movl	$0, (%rsp)
	movl	$20, %esi
	movl	$20, %ecx
	xorl	%r8d, %r8d
	movl	$9, %r9d
	callq	_Z29__device_stub___AFFINE_KERNELPiiS_iiii
.LBB0_4:
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movl	$80, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	leaq	112(%rsp), %rdi
	movl	$80, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$192, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub___AFFINE_KERNELPiiS_iiii # -- Begin function _Z29__device_stub___AFFINE_KERNELPiiS_iiii
	.type	_Z29__device_stub___AFFINE_KERNELPiiS_iiii,@function
_Z29__device_stub___AFFINE_KERNELPiiS_iiii: # @_Z29__device_stub___AFFINE_KERNELPiiS_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14_AFFINE_KERNELPiiS_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z29__device_stub___AFFINE_KERNELPiiS_iiii, .Lfunc_end1-_Z29__device_stub___AFFINE_KERNELPiiS_iiii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14_AFFINE_KERNELPiiS_iiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14_AFFINE_KERNELPiiS_iiii,@object # @_Z14_AFFINE_KERNELPiiS_iiii
	.section	.rodata,"a",@progbits
	.globl	_Z14_AFFINE_KERNELPiiS_iiii
	.p2align	3, 0x0
_Z14_AFFINE_KERNELPiiS_iiii:
	.quad	_Z29__device_stub___AFFINE_KERNELPiiS_iiii
	.size	_Z14_AFFINE_KERNELPiiS_iiii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z14_AFFINE_KERNELPiiS_iiii"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub___AFFINE_KERNELPiiS_iiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14_AFFINE_KERNELPiiS_iiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14_AFFINE_KERNELPiiS_iiii ; -- Begin function _Z14_AFFINE_KERNELPiiS_iiii
	.globl	_Z14_AFFINE_KERNELPiiS_iiii
	.p2align	8
	.type	_Z14_AFFINE_KERNELPiiS_iiii,@function
_Z14_AFFINE_KERNELPiiS_iiii:            ; @_Z14_AFFINE_KERNELPiiS_iiii
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x1c
	s_load_b32 s2, s[0:1], 0x28
	s_load_b32 s3, s[0:1], 0x34
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s6
	s_and_b32 s3, s3, 0xffff
	s_add_i32 s2, s2, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	v_cmp_le_i32_e32 vcc_lo, s4, v1
	v_cmp_ge_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_sub_co_u32 v2, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v4, v[2:3], off offset:76
	v_add_co_u32 v2, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v6, 0, v4
	v_sub_co_u32 v4, vcc_lo, s0, v0
	v_sub_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[2:3], v6, off
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[4:5], off offset:76
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14_AFFINE_KERNELPiiS_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14_AFFINE_KERNELPiiS_iiii, .Lfunc_end0-_Z14_AFFINE_KERNELPiiS_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 232
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14_AFFINE_KERNELPiiS_iiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14_AFFINE_KERNELPiiS_iiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
