
#include <cuda_runtime.h>
#include <iostream>
#include <ctime>

__global__ void matmulDevice(int *A, int *B, int *C, int N)
{
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    int row = blockIdx.y * blockDim.y + threadIdx.y;

    if (row < N && col < N)
    {
        int sum = 0;
        for (int i = 0; i < N; i++)
            sum += A[row * N + i] * B[i * N + col];
        C[row * N + col] = sum;
    }
}

void matmulHost(int *A, int *B, int *C, int N)
{

    for (int i = 0; i < N; i++)
    {
        for (int j = 0; j < N; j++)
        {
            int sum = 0;
            for (int k = 0; k < N; k++)
                sum += A[i * N + k] * B[k * N + j];
            C[i * N + j] = sum;
        }
    }
}

//Sourced online to check CudaErrors while calling methods 
#define checkCudaErrors(ans)                  \
    {                                         \
        gpuAssert((ans), __FILE__, __LINE__); \
    }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort = true)
{
    if (code != cudaSuccess)
    {
        fprintf(stderr, "GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
        if (abort)
            exit(code);
    }
}

using namespace std;

int main(void)
{
    int device_count = 0;
    cudaGetDeviceCount(&device_count);

    if (device_count == 0)
        cout << "Sorry! You dont have CudaDevice" << endl;
    else
        cout << "CudaDevice found! Device count: " << device_count << endl;

    int N = 2048; //Depending on your device
    int block_size = 32; 
    int nIter = 1;

    unsigned int count = N * N;
    unsigned int mem_size = sizeof(int) * count;

    //Allocate memory of the indicated size
    int *A = (int *)malloc(mem_size);
    int *B = (int *)malloc(mem_size);
    int *h_C = (int *)malloc(mem_size);
    int *hCuda_C = (int *)malloc(mem_size);

    int *d_A, *d_B, *d_C;

    //Pupulate the host arrays (to be copied to device arrays)
    for (int i = 0; i < count; i++)
    {
        A[i] = rand() % 100 + 1;
        B[i] = rand() % 100 + 1;
    }

    unsigned int start_time = clock();

    for (int j = 0; j < nIter; j++)
    {
        matmulHost(A, B, h_C, N);
    }

    unsigned int elapsedTime = clock() - start_time;
    float msecPerMatrixMulCpu = elapsedTime / nIter;

    cout << "CPU time: " << msecPerMatrixMulCpu << endl;

    checkCudaErrors(cudaMalloc((void **)&d_A, mem_size));
    checkCudaErrors(cudaMalloc((void **)&d_B, mem_size));
    checkCudaErrors(cudaMalloc((void **)&d_C, mem_size));
    
    checkCudaErrors(cudaMemcpy(d_A, A, mem_size,
                               cudaMemcpyHostToDevice));
    checkCudaErrors(cudaMemcpy(d_B, B, mem_size,
                               cudaMemcpyHostToDevice));

    dim3 threadsPerBlock(block_size, block_size);
    dim3 blocksPerGrid(N / block_size, N / block_size);

    cudaEvent_t start;
    cudaEvent_t stop;
    checkCudaErrors(cudaEventCreate(&start));
    checkCudaErrors(cudaEventCreate(&stop));

    checkCudaErrors(cudaEventRecord(start, 0));

    for (int j = 0; j < nIter; j++)
    {
        matmulDevice<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_B, d_C, N);
    }

    checkCudaErrors(cudaEventRecord(stop, 0));

    checkCudaErrors(cudaEventSynchronize(stop));

    float msecTotal = 0.0f;
    checkCudaErrors(cudaEventElapsedTime(&msecTotal, start, stop));

    float msecPerMatrixMul = msecTotal / nIter;

    cout << "GPU time: " << msecPerMatrixMul << endl;

    cudaDeviceSynchronize();

    checkCudaErrors(cudaMemcpy(hCuda_C, d_C, mem_size, cudaMemcpyDeviceToHost));
    cudaDeviceSynchronize();

    // free device memory
    cudaFree(d_A);
    cudaFree(d_B);
    cudaFree(d_C);

    bool test = true;

    for (int i = 0; i < count; i++)
    {
        if (h_C[i] != hCuda_C[i])
            test = false;
    }

    if (test)
        cout << "CUDA Array Multiplication Successful" << endl;
    else
        cout << "CUDA Array Multiplication Failed" << endl;

    return 0;
}

	.file	"tmpxft_00267ce2_00000000-6_main_cuda.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4296:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4296:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z10matmulHostPiS_S_i
	.type	_Z10matmulHostPiS_S_i, @function
_Z10matmulHostPiS_S_i:
.LFB3635:
	.cfi_startproc
	endbr64
	movq	%rsi, %r10
	movslq	%ecx, %rsi
	xorl	%r8d, %r8d
	movq	%rdi, %r9
	movq	%rsi, %rax
	movq	%rdx, %r11
	salq	$2, %rsi
	xorl	%ecx, %ecx
	cmpl	%eax, %r8d
	jl	.L12
	ret
.L12:
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
.L8:
	xorl	%edx, %edx
	leaq	(%r9,%rcx), %r13
	leaq	(%r11,%rcx), %r14
.L7:
	leaq	(%r10,%rdx,4), %rbp
	xorl	%edi, %edi
	xorl	%ebx, %ebx
.L5:
	movl	0(%r13,%rdi,4), %r12d
	imull	0(%rbp), %r12d
	incq	%rdi
	addq	%rsi, %rbp
	addl	%r12d, %ebx
	cmpl	%edi, %eax
	jg	.L5
	movl	%ebx, (%r14,%rdx,4)
	incq	%rdx
	cmpl	%edx, %eax
	jg	.L7
	incl	%r8d
	addq	%rsi, %rcx
	cmpl	%eax, %r8d
	jl	.L8
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z10matmulHostPiS_S_i, .-_Z10matmulHostPiS_S_i
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB3636:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L20
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L14
	movl	%ebx, %edi
	call	exit@PLT
.L14:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L20:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.text
	.globl	_Z37__device_stub__Z12matmulDevicePiS_S_iPiS_S_i
	.type	_Z37__device_stub__Z12matmulDevicePiS_S_iPiS_S_i, @function
_Z37__device_stub__Z12matmulDevicePiS_S_iPiS_S_i:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12matmulDevicePiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L23:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z37__device_stub__Z12matmulDevicePiS_S_iPiS_S_i, .-_Z37__device_stub__Z12matmulDevicePiS_S_iPiS_S_i
	.globl	_Z12matmulDevicePiS_S_i
	.type	_Z12matmulDevicePiS_S_i, @function
_Z12matmulDevicePiS_S_i:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z12matmulDevicePiS_S_iPiS_S_i
	.cfi_endproc
.LFE3663:
	.size	_Z12matmulDevicePiS_S_i, .-_Z12matmulDevicePiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Sorry! You dont have CudaDevice"
.LC2:
	.string	"CudaDevice found! Device count: "
.LC3:
	.string	"CPU time: "
.LC4:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/DarrelHua/Array-Multiplication/main/main_cuda.cu"
.LC6:
	.string	"GPU time: "
.LC7:
	.string	"CUDA Array Multiplication Successful"
.LC8:
	.string	"CUDA Array Multiplication Failed"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	xorl	%eax, %eax
	movl	%eax, 16(%rsp)
	call	cudaGetDeviceCount@PLT
	cmpl	$0, 16(%rsp)
	jne	.L29
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L44
.L29:
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	16(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
.L44:
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	xorl	%ebp, %ebp
	movl	$100, %ebx
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$16777216, %edi
	call	malloc@PLT
	movl	$16777216, %edi
	movq	%rax, %r15
	call	malloc@PLT
	movl	$16777216, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$16777216, %edi
	movq	%rax, %r14
	call	malloc@PLT
	movq	%rax, %r13
.L31:
	call	rand@PLT
	cltd
	idivl	%ebx
	incl	%edx
	movl	%edx, (%r15,%rbp)
	call	rand@PLT
	cltd
	idivl	%ebx
	incl	%edx
	movl	%edx, (%r12,%rbp)
	addq	$4, %rbp
	cmpq	$16777216, %rbp
	jne	.L31
	call	clock@PLT
	movl	$2048, %ecx
	movq	%r14, %rdx
	movq	%r12, %rsi
	movq	%r15, %rdi
	movq	%rax, %rbx
	call	_Z10matmulHostPiS_S_i
	call	clock@PLT
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	subl	%ebx, %eax
	leaq	.LC4(%rip), %rbx
	cvtsi2ssq	%rax, %xmm0
	movss	%xmm0, 12(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	12(%rsp), %xmm0
	movq	%rax, %rdi
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	24(%rsp), %rdi
	movl	$16777216, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$96, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	32(%rsp), %rdi
	movl	$16777216, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$97, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	40(%rsp), %rdi
	movl	$16777216, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$98, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rsi
	movl	$16777216, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$100, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$16777216, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$102, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	48(%rsp), %rdi
	movabsq	$137438953504, %rax
	movl	$1, 72(%rsp)
	movq	%rax, 64(%rsp)
	movabsq	$274877907008, %rax
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	cudaEventCreate@PLT
	movl	$1, %ecx
	movl	$110, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$1, %ecx
	movl	$111, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$1, %ecx
	movl	$113, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	72(%rsp), %ecx
	movl	84(%rsp), %esi
	xorl	%r9d, %r9d
	movq	64(%rsp), %rdx
	movq	76(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$2048, %ecx
	movq	24(%rsp), %rdi
	call	_Z37__device_stub__Z12matmulDevicePiS_S_iPiS_S_i
.L34:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$1, %ecx
	movl	$120, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movl	$1, %ecx
	movl	$122, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	20(%rsp), %rdi
	movl	$0x00000000, 20(%rsp)
	call	cudaEventElapsedTime@PLT
	movl	$1, %ecx
	movl	$125, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movss	20(%rsp), %xmm0
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movss	%xmm0, 12(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	12(%rsp), %xmm0
	movq	%rax, %rdi
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	call	cudaDeviceSynchronize@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	movl	$16777216, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$133, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
	movb	$1, %dl
	xorl	%ecx, %ecx
.L36:
	movl	0(%r13,%rax), %ebx
	cmpl	%ebx, (%r14,%rax)
	cmovne	%ecx, %edx
	addq	$4, %rax
	cmpq	$16777216, %rax
	jne	.L36
	leaq	.LC7(%rip), %rsi
	testb	%dl, %dl
	jne	.L45
	leaq	.LC8(%rip), %rsi
.L45:
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z12matmulDevicePiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12matmulDevicePiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <ctime>

__global__ void matmulDevice(int *A, int *B, int *C, int N)
{
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    int row = blockIdx.y * blockDim.y + threadIdx.y;

    if (row < N && col < N)
    {
        int sum = 0;
        for (int i = 0; i < N; i++)
            sum += A[row * N + i] * B[i * N + col];
        C[row * N + col] = sum;
    }
}

void matmulHost(int *A, int *B, int *C, int N)
{

    for (int i = 0; i < N; i++)
    {
        for (int j = 0; j < N; j++)
        {
            int sum = 0;
            for (int k = 0; k < N; k++)
                sum += A[i * N + k] * B[k * N + j];
            C[i * N + j] = sum;
        }
    }
}

//Sourced online to check CudaErrors while calling methods 
#define checkCudaErrors(ans)                  \
    {                                         \
        gpuAssert((ans), __FILE__, __LINE__); \
    }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort = true)
{
    if (code != hipSuccess)
    {
        fprintf(stderr, "GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
        if (abort)
            exit(code);
    }
}

using namespace std;

int main(void)
{
    int device_count = 0;
    hipGetDeviceCount(&device_count);

    if (device_count == 0)
        cout << "Sorry! You dont have CudaDevice" << endl;
    else
        cout << "CudaDevice found! Device count: " << device_count << endl;

    int N = 2048; //Depending on your device
    int block_size = 32; 
    int nIter = 1;

    unsigned int count = N * N;
    unsigned int mem_size = sizeof(int) * count;

    //Allocate memory of the indicated size
    int *A = (int *)malloc(mem_size);
    int *B = (int *)malloc(mem_size);
    int *h_C = (int *)malloc(mem_size);
    int *hCuda_C = (int *)malloc(mem_size);

    int *d_A, *d_B, *d_C;

    //Pupulate the host arrays (to be copied to device arrays)
    for (int i = 0; i < count; i++)
    {
        A[i] = rand() % 100 + 1;
        B[i] = rand() % 100 + 1;
    }

    unsigned int start_time = clock();

    for (int j = 0; j < nIter; j++)
    {
        matmulHost(A, B, h_C, N);
    }

    unsigned int elapsedTime = clock() - start_time;
    float msecPerMatrixMulCpu = elapsedTime / nIter;

    cout << "CPU time: " << msecPerMatrixMulCpu << endl;

    checkCudaErrors(hipMalloc((void **)&d_A, mem_size));
    checkCudaErrors(hipMalloc((void **)&d_B, mem_size));
    checkCudaErrors(hipMalloc((void **)&d_C, mem_size));
    
    checkCudaErrors(hipMemcpy(d_A, A, mem_size,
                               hipMemcpyHostToDevice));
    checkCudaErrors(hipMemcpy(d_B, B, mem_size,
                               hipMemcpyHostToDevice));

    dim3 threadsPerBlock(block_size, block_size);
    dim3 blocksPerGrid(N / block_size, N / block_size);

    hipEvent_t start;
    hipEvent_t stop;
    checkCudaErrors(hipEventCreate(&start));
    checkCudaErrors(hipEventCreate(&stop));

    checkCudaErrors(hipEventRecord(start, 0));

    for (int j = 0; j < nIter; j++)
    {
        matmulDevice<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_B, d_C, N);
    }

    checkCudaErrors(hipEventRecord(stop, 0));

    checkCudaErrors(hipEventSynchronize(stop));

    float msecTotal = 0.0f;
    checkCudaErrors(hipEventElapsedTime(&msecTotal, start, stop));

    float msecPerMatrixMul = msecTotal / nIter;

    cout << "GPU time: " << msecPerMatrixMul << endl;

    hipDeviceSynchronize();

    checkCudaErrors(hipMemcpy(hCuda_C, d_C, mem_size, hipMemcpyDeviceToHost));
    hipDeviceSynchronize();

    // free device memory
    hipFree(d_A);
    hipFree(d_B);
    hipFree(d_C);

    bool test = true;

    for (int i = 0; i < count; i++)
    {
        if (h_C[i] != hCuda_C[i])
            test = false;
    }

    if (test)
        cout << "CUDA Array Multiplication Successful" << endl;
    else
        cout << "CUDA Array Multiplication Failed" << endl;

    return 0;
}

	.text
	.file	"main_cuda.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z27__device_stub__matmulDevicePiS_S_i # -- Begin function _Z27__device_stub__matmulDevicePiS_S_i
	.type	_Z27__device_stub__matmulDevicePiS_S_i,@function
_Z27__device_stub__matmulDevicePiS_S_i: # @_Z27__device_stub__matmulDevicePiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12matmulDevicePiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__matmulDevicePiS_S_i, .Lfunc_end0-_Z27__device_stub__matmulDevicePiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z10matmulHostPiS_S_i           # -- Begin function _Z10matmulHostPiS_S_i
	.type	_Z10matmulHostPiS_S_i,@function
_Z10matmulHostPiS_S_i:                  # @_Z10matmulHostPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB1_7
# %bb.1:                                # %.preheader26.lr.ph
	movl	%ecx, %eax
	leaq	(,%rax,4), %r8
	xorl	%edx, %edx
	xorl	%r10d, %r10d
.LBB1_2:                                # %.preheader.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
                                        #       Child Loop BB1_4 Depth 3
	movl	%edx, %r11d
	leaq	(%rdi,%r11,4), %r11
	movq	%r10, %rbx
	imulq	%rax, %rbx
	movq	-8(%rsp), %r9                   # 8-byte Reload
	leaq	(%r9,%rbx,4), %rbx
	movq	%rsi, %r14
	xorl	%r15d, %r15d
.LBB1_3:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_4 Depth 3
	xorl	%r12d, %r12d
	movq	%r14, %r13
	xorl	%ebp, %ebp
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r13), %r9d
	imull	(%r11,%r12,4), %r9d
	addl	%r9d, %ebp
	incq	%r12
	addq	%r8, %r13
	cmpq	%r12, %rax
	jne	.LBB1_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_3 Depth=2
	movl	%ebp, (%rbx,%r15,4)
	incq	%r15
	addq	$4, %r14
	cmpq	%rax, %r15
	jne	.LBB1_3
# %bb.6:                                # %._crit_edge30
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r10
	addl	%ecx, %edx
	cmpq	%rax, %r10
	jne	.LBB1_2
.LBB1_7:                                # %._crit_edge32
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z10matmulHostPiS_S_i, .Lfunc_end1-_Z10matmulHostPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	44(%rsp), %rbx
	movl	$0, (%rbx)
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	cmpl	$0, (%rbx)
	je	.LBB2_1
# %bb.2:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	44(%rsp), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	jmp	.LBB2_3
.LBB2_1:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB2_3:
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$16777216, %edi                 # imm = 0x1000000
	callq	malloc
	movq	%rax, %r12
	movl	$16777216, %edi                 # imm = 0x1000000
	callq	malloc
	movq	%rax, %r15
	movl	$16777216, %edi                 # imm = 0x1000000
	callq	malloc
	movq	%rax, %rbx
	movl	$16777216, %edi                 # imm = 0x1000000
	callq	malloc
	movq	%rax, %r14
	xorl	%r13d, %r13d
.LBB2_4:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	movl	%eax, (%r12,%r13,4)
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	movl	%eax, (%r15,%r13,4)
	incq	%r13
	cmpq	$4194304, %r13                  # imm = 0x400000
	jne	.LBB2_4
# %bb.5:                                # %.critedge
	xorl	%ebp, %ebp
	callq	clock
	movq	%rax, %r13
	movq	%r12, %rax
.LBB2_6:                                # %.preheader.lr.ph.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_7 Depth 2
                                        #       Child Loop BB2_8 Depth 3
	movq	%rbp, %rcx
	shlq	$13, %rcx
	addq	%rbx, %rcx
	movq	%r15, %rdx
	xorl	%esi, %esi
.LBB2_7:                                # %.preheader.i
                                        #   Parent Loop BB2_6 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_8 Depth 3
	xorl	%edi, %edi
	movq	%rdx, %r8
	xorl	%r9d, %r9d
.LBB2_8:                                #   Parent Loop BB2_6 Depth=1
                                        #     Parent Loop BB2_7 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r8), %r10d
	imull	(%rax,%rdi,4), %r10d
	addl	%r10d, %r9d
	incq	%rdi
	addq	$8192, %r8                      # imm = 0x2000
	cmpq	$2048, %rdi                     # imm = 0x800
	jne	.LBB2_8
# %bb.9:                                # %._crit_edge.i
                                        #   in Loop: Header=BB2_7 Depth=2
	movl	%r9d, (%rcx,%rsi,4)
	incq	%rsi
	addq	$4, %rdx
	cmpq	$2048, %rsi                     # imm = 0x800
	jne	.LBB2_7
# %bb.10:                               # %._crit_edge30.i
                                        #   in Loop: Header=BB2_6 Depth=1
	incq	%rbp
	addq	$8192, %rax                     # imm = 0x2000
	cmpq	$2048, %rbp                     # imm = 0x800
	jne	.LBB2_6
# %bb.11:                               # %_Z10matmulHostPiS_S_i.exit
	callq	clock
	subl	%r13d, %eax
	cvtsi2ss	%rax, %xmm0
	movss	%xmm0, (%rsp)                   # 4-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsp), %xmm0                   # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	leaq	32(%rsp), %rdi
	movl	$16777216, %esi                 # imm = 0x1000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_12
# %bb.14:                               # %_Z9gpuAssert10hipError_tPKcib.exit
	leaq	24(%rsp), %rdi
	movl	$16777216, %esi                 # imm = 0x1000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_15
# %bb.16:                               # %_Z9gpuAssert10hipError_tPKcib.exit68
	leaq	16(%rsp), %rdi
	movl	$16777216, %esi                 # imm = 0x1000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_17
# %bb.18:                               # %_Z9gpuAssert10hipError_tPKcib.exit70
	movq	32(%rsp), %rdi
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_19
# %bb.20:                               # %_Z9gpuAssert10hipError_tPKcib.exit72
	movq	24(%rsp), %rdi
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_21
# %bb.22:                               # %_Z9gpuAssert10hipError_tPKcib.exit74
	leaq	48(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB2_23
# %bb.24:                               # %_Z9gpuAssert10hipError_tPKcib.exit76
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB2_25
# %bb.26:                               # %_Z9gpuAssert10hipError_tPKcib.exit78
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB2_27
# %bb.28:                               # %_Z9gpuAssert10hipError_tPKcib.exit80
	movabsq	$274877907008, %rdi             # imm = 0x4000000040
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_30
# %bb.29:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	$2048, %ecx                     # imm = 0x800
	callq	_Z27__device_stub__matmulDevicePiS_S_i
.LBB2_30:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB2_31
# %bb.32:                               # %_Z9gpuAssert10hipError_tPKcib.exit82
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	testl	%eax, %eax
	jne	.LBB2_33
# %bb.34:                               # %_Z9gpuAssert10hipError_tPKcib.exit84
	leaq	40(%rsp), %rdi
	movl	$0, (%rdi)
	movq	48(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	hipEventElapsedTime
	testl	%eax, %eax
	jne	.LBB2_35
# %bb.36:                               # %_Z9gpuAssert10hipError_tPKcib.exit86
	cvtss2sd	40(%rsp), %xmm0
	movsd	%xmm0, (%rsp)                   # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	(%rsp), %xmm0                   # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_37
# %bb.38:                               # %_Z9gpuAssert10hipError_tPKcib.exit88
	callq	hipDeviceSynchronize
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movb	$1, %al
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB2_39:                               # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%rdx,4), %esi
	cmpl	(%r14,%rdx,4), %esi
	movzbl	%al, %eax
	cmovnel	%ecx, %eax
	incq	%rdx
	cmpq	$4194304, %rdx                  # imm = 0x400000
	jne	.LBB2_39
# %bb.40:
	movl	$_ZSt4cout, %edi
	testb	$1, %al
	jne	.LBB2_41
# %bb.42:
	movl	$.L.str.6, %esi
	movl	$32, %edx
	jmp	.LBB2_43
.LBB2_41:
	movl	$.L.str.5, %esi
	movl	$36, %edx
.LBB2_43:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_12:
	.cfi_def_cfa_offset 112
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$96, %r8d
	jmp	.LBB2_13
.LBB2_15:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$97, %r8d
	jmp	.LBB2_13
.LBB2_17:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$98, %r8d
	jmp	.LBB2_13
.LBB2_19:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$101, %r8d
	jmp	.LBB2_13
.LBB2_21:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$103, %r8d
	jmp	.LBB2_13
.LBB2_23:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$110, %r8d
	jmp	.LBB2_13
.LBB2_25:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$111, %r8d
	jmp	.LBB2_13
.LBB2_27:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$113, %r8d
	jmp	.LBB2_13
.LBB2_31:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$120, %r8d
	jmp	.LBB2_13
.LBB2_33:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$122, %r8d
	jmp	.LBB2_13
.LBB2_35:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$125, %r8d
	jmp	.LBB2_13
.LBB2_37:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$133, %r8d
.LBB2_13:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12matmulDevicePiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12matmulDevicePiS_S_i,@object # @_Z12matmulDevicePiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z12matmulDevicePiS_S_i
	.p2align	3, 0x0
_Z12matmulDevicePiS_S_i:
	.quad	_Z27__device_stub__matmulDevicePiS_S_i
	.size	_Z12matmulDevicePiS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Sorry! You dont have CudaDevice"
	.size	.L.str, 32

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"CudaDevice found! Device count: "
	.size	.L.str.1, 33

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"CPU time: "
	.size	.L.str.2, 11

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/DarrelHua/Array-Multiplication/main/main_cuda.hip"
	.size	.L.str.3, 112

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"GPU time: "
	.size	.L.str.4, 11

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"CUDA Array Multiplication Successful"
	.size	.L.str.5, 37

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"CUDA Array Multiplication Failed"
	.size	.L.str.6, 33

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.7, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12matmulDevicePiS_S_i"
	.size	.L__unnamed_1, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__matmulDevicePiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12matmulDevicePiS_S_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12matmulDevicePiS_S_i ; -- Begin function _Z12matmulDevicePiS_S_i
	.globl	_Z12matmulDevicePiS_S_i
	.p2align	8
	.type	_Z12matmulDevicePiS_S_i,@function
_Z12matmulDevicePiS_S_i:                ; @_Z12matmulDevicePiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e64 s2, v2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v1, v1, s2
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s3, s2
	v_mov_b32_e32 v5, v0
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_add_i32 s3, s3, -1
	s_cmp_eq_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s6, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	global_load_b32 v8, v[3:4], off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v2, 0
.LBB0_5:                                ; %Flow46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12matmulDevicePiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12matmulDevicePiS_S_i, .Lfunc_end0-_Z12matmulDevicePiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 352
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12matmulDevicePiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12matmulDevicePiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
