



#include <stdlib.h>
#include <math.h>
#include <unistd.h>
#include <ctype.h>
#include <getopt.h>
#include <string.h>

#include <stdio.h>
#include <cmath>
#include <float.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <iostream>
#include <thrust/device_vector.h>

using namespace std;

//Size of the GPU memory
#define GPU_MEMSIZE_GB		2

//For case in which XSIZE = 1201 and YSIZE = 801
#define GLOBAL_MEM_USE_MB	773
#define MEM_USE_PER_THREAD_B	1280

//MAX_XSIZE_POSSIBLE is the maximum size of x or max number of columns if there is only one row
#define MAX_XSIZE_POSSIBLE	floor(((GPU_MEMSIZE_GB * 1000 - GLOBAL_MEM_USE_MB)*1000000)/MEM_USE_PER_THREAD_B) 

#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))


//Always have even number of radius;and divisible by 10

#define	RADSTEP			1
#define ANGLESIZE		36	

#define PI 3.14

#define THREADS_PER_BLOCK	512

//#define FILENAME	"Annie_coastDEM.txt"
//---------------------------Function declarations--------------------------------------------------------------------------//

__global__ void getMatrix(float* data,float* angle,float* anisotropy,float* azimuth,float* variance,float* orientation,float* ortho,size_t XSIZE,size_t YSIZE,int RADIUS,int WINDOW_SIZE);
int Get_GPU_devices(void);
static void HandleError( cudaError_t err,const char *file, int line );
//--------------------------------------------------------------------------------------------------------------------------//

//Current Usage:
//Global Memory: 773 MB


__global__ void getMatrix(float* data,float* angle,float* anisotropy,float* azimuth,float* variance,float* orientation,float* ortho,size_t XSIZE,size_t YSIZE,int RADIUS,int WINDOW_SIZE)
//__global__ void getMatrix(int* data,float* angle,float* anisotropy,float* azimuth,size_t XSIZE,size_t YSIZE)
{


//	Thread indices
	int x = (blockIdx.x * blockDim.x) + threadIdx.x;
	int y = (blockIdx.y * blockDim.y) + threadIdx.y;
	int id = y * XSIZE + x;
//----------------------------------------------------------------------------------------------------------------------------//	

	if((y>(YSIZE - RADIUS - 1))||(y<(RADIUS))) return;
	else if((x>(XSIZE - RADIUS - 1))||(x<(RADIUS))) return;
	else
	{

		//Actual computation
		int xrad,yrad,xradOrtho1,yradOrtho1,xradOneEighty,yradOneEighty,valueOneEighty;
		int valueOrtho1,valueOrtho2,xradOrtho2,yradOrtho2,i,j,k;
		//printf("Radius is: %d\n",RADIUS);
	
/*
		float variance[RADIUS];
		float orientation[RADIUS];
		float ortho[RADIUS];
*/		
		

		float value,sum_value,avg_value;
		float sum_valueOrtho,avg_valueOrtho;
		
	//	Initializing declared variables
		sum_value = 0;
		avg_value = 0;
		sum_valueOrtho = 0;
		avg_valueOrtho = 0;

	//	Iniitalize variance, ortho, and orientation arrays with max float value SGR changed i<100 to i<RADIUS

		
				
		//Flipped
		for(i=0;i<ANGLESIZE;i++) {
			
			for(k = 0;k<RADIUS;k+=RADSTEP) {
	
				//Initializing to 0 so that the sum is zero everytime it starts
				sum_value = 0;
				sum_valueOrtho = 0;

				for(j=k;j<k+WINDOW_SIZE;j++){

					//Computation for angle of interest
					xrad = (int)lrintf(cosf(angle[i]) * (j+1) + x);	
					yrad = (int)lrintf(sinf(angle[i]) * (j+1) + y);	

					value = data[y * XSIZE + x]  - data[yrad * XSIZE + xrad];
					value = value * value;
				
					//One eighty angle computation
					xradOneEighty = (int)lrintf(cosf(angle[i]+PI) * (j+1) + x);	
					yradOneEighty = (int)lrintf(sinf(angle[i]+PI) * (j+1) + y);	
				
					valueOneEighty = data[y * XSIZE + x] - data[yradOneEighty * XSIZE + xradOneEighty];
					valueOneEighty = valueOneEighty * valueOneEighty;

					sum_value = sum_value + value + valueOneEighty;
					avg_value = sum_value/(2*(j+1)); //the average variance from scale 1 to scale j

					//Computation for values on angle orthogonal to angle of interest
					xradOrtho1 = (int)lrintf(cosf(angle[i]+PI/2) * (j+1) + x);	
					yradOrtho1 = (int)lrintf(sinf(angle[i]+PI/2) * (j+1) + y);	
				
					valueOrtho1 = data[y * XSIZE + x]  - data[yradOrtho1 * XSIZE + xradOrtho1];
					valueOrtho1 = valueOrtho1 * valueOrtho1;

					//One eighty ortho angle computation
					xradOrtho2 = (int)lrintf(cosf(angle[i]+PI*3/2) * (j+1) + x);	
					yradOrtho2 = (int)lrintf(sinf(angle[i]+PI*3/2) * (j+1) + y);	

					valueOrtho2 = data[y * XSIZE + x]  - data[yradOrtho2 * XSIZE + xradOrtho2];
					valueOrtho2 = valueOrtho2 * valueOrtho2;

					sum_valueOrtho = sum_valueOrtho + valueOrtho1 + valueOrtho2;
					avg_valueOrtho = sum_valueOrtho/(2*j+1);

					//Fail safe to ensure there is no nan or inf when taking anisotropy ratio, later on.			
					if(avg_value == 0) {
							if((avg_valueOrtho < 1) && (avg_valueOrtho > 0)) {
								avg_value = avg_valueOrtho;
							}
							else {
								avg_value = 1;
							}
					}

					if(avg_valueOrtho == 0) {
						avg_valueOrtho = 1;
					}
				
					//Determine if the variance is minimum compared to  others at scale j, if so record it and its angle i. If not, pass it
					if(avg_value < variance[id * RADIUS + j]) {
							variance[id * RADIUS + j] = avg_value;
							orientation[id * RADIUS + j] = angle[i];
							ortho[id * RADIUS + j] = avg_valueOrtho;		
					}	
				}
			}
		}
		for(j=0;j<RADIUS;j+=RADSTEP){	
			anisotropy[y * XSIZE  * RADIUS/RADSTEP + x * RADIUS/RADSTEP + j] = (36+ortho[id * RADIUS + j])/(36+variance[id * RADIUS + j]);
			azimuth[y * XSIZE  * RADIUS/RADSTEP + x * RADIUS/RADSTEP + j] = orientation[id * RADIUS + j] * 180/PI;
		}
	}
 
}

//--------------------------------------END OF KERNEL-----------------------------------------------------------//

//--------------------------------------Handle Error()-----------------------------------------------------------//

static void HandleError( cudaError_t err,const char *file, int line ) {
    if (err != cudaSuccess) {
		cout << cudaGetErrorString(err) << "in" << file << "at line" << line << "\n";
        exit( EXIT_FAILURE );
    }
}

//--------------------------------------Get_GPU_devices()-----------------------------------------------------------//
int Get_GPU_devices()
{
	cudaDeviceProp prop;
	int whichDevice,DeviceCount;
	HANDLE_ERROR(cudaGetDevice(&whichDevice));
	HANDLE_ERROR(cudaGetDeviceProperties(&prop,whichDevice));

	if(!prop.deviceOverlap){
		cout<< "Device does not handle overlaps so streams are not possible\n";
	return 0;
	}

	DeviceCount = 0;
	
	HANDLE_ERROR(cudaGetDeviceCount(&DeviceCount));
	if(DeviceCount > 0){ 
		cout<<  DeviceCount <<"Devices Found\n";
	}else{
		cout<< "No devices found or error in reading the number of devices\n";
		return 0;
	}
	
	for(int i = 0;i<DeviceCount;i++){
		cudaDeviceProp properties;
		HANDLE_ERROR(cudaGetDeviceProperties(&properties,i));
		cout<<"Device Number:"<< i << "\n";
		cout<<"  Device name: "<< properties.name;
		cout<<"  Device Global Memory size: "<< properties.totalGlobalMem/1000000 << "MB \n";
		cout<<"\n";

	}

	return DeviceCount;
}

//-------------------------------------------------------------------------------------------------------------//

int main(int argc,char* argv[])
{

	char FileName[20];
	char delimiterStr[10];
	char delimiter;
	int RADIUS;
	int WINDOW_SIZE;	

	//delimiter_string = "A";
	if(argc != 9){
		printf("\tArguments needed = 9; Provided = %d\n",argc);
                printf("Usage: ./Executable -i InputDataFileName -d Delimiter -r Radius -w WindowSize\n");
		printf("Exiting program\n");
		return 0;
	}


	int option;

	while ((option = getopt(argc, argv,"i:d:r:w:")) != -1) {
		switch (option) {
                        case 'i' : strcpy(FileName,optarg);
                            break;
                        case 'd' : strcpy(delimiterStr,optarg);
                            break;
                        case 'r' : RADIUS  = atoi(optarg);
                            break;
                        case 'w' : WINDOW_SIZE = atoi(optarg);
                            break;
                        default: printf("Usage: Executable -i InputDataFileName -d Delimiter -r Radius -w WindowSize\n");
                            exit(EXIT_FAILURE);
                }
         }


	//In the future use optarg
	if(strcmp(delimiterStr,"space")==0){
		delimiter = ' ';
	}
	else if(strcmp(delimiterStr,"Space")==0){
		delimiter = ' ';
	}
	else if(strcmp(delimiterStr,"tab")==0){
		delimiter = '\t';
	}
	else if(strcmp(delimiterStr,"Tab")==0){
		delimiter = '\t';
	}
	else{
		delimiter = delimiterStr[0];
	}
	
	printf("Delimiter: %c\n",delimiter);


	printf("Radius is %d\n",RADIUS);
	printf("Input file name is: %s\n",FileName);

//-------------------------------------------------------------------------------------//

	//Setting the output buffer to 500MB
	size_t limit;
	cudaDeviceSetLimit(cudaLimitPrintfFifoSize, 500 * 1024 * 1024);
	cudaDeviceGetLimit(&limit,cudaLimitPrintfFifoSize);

	//File declarations and opening them
	FILE *datTxt1,*datTxt,*outputAnisotropy00,*outputAnisotropy09,*outputAnisotropy49,*outputAnisotropy99;
	FILE *outputAzimuth00,*outputAzimuth09,*outputAzimuth49,*outputAzimuth99; 
	

	FILE * inpCheck;
	inpCheck = fopen("inpCheck.txt","w");
	if(inpCheck == NULL) {
		perror("Cannot open inpcheck.txt file");
		return (-1);
	}
	

	datTxt1 = fopen(FileName,"r");	
	if(datTxt1 == NULL) {
		cout<< "Cannot open file:" << argv[1] <<  "\nCheck if file exists.\n";
		exit(1);
	}
	outputAnisotropy00 = fopen("outputDataAni_First.txt","w");
	outputAnisotropy09 = fopen("outputDataAni_Rad_div_10.txt","w");
	outputAnisotropy49 = fopen("outputDataAni_Rad_div_2.txt","w");
	outputAnisotropy99 = fopen("outputDataAni_Last.txt","w");
	if((outputAnisotropy00 == NULL)||(outputAnisotropy09 == NULL)||(outputAnisotropy49 == NULL)||(outputAnisotropy99 == NULL)) {
		perror("Cannot open Anisotropy file");
		return (-1);
	}

	outputAzimuth00 = fopen("outputDataAzi_First.txt","w");
	outputAzimuth09 = fopen("outputDataAzi_Rad_div_10.txt","w");
	outputAzimuth49 = fopen("outputDataAzi_Rad_div_2.txt","w");
	outputAzimuth99 = fopen("outputDataAzi_Last.txt","w");

	if((outputAzimuth00 == NULL)||(outputAzimuth09 == NULL)||(outputAzimuth49 == NULL)||(outputAzimuth99 == NULL)) {
		perror("Cannot open Azimuth file");
		return (-1);
	}


//-----------Getting total rows and columns in the data file---------------------------------------------------------------------------------------------------//
	size_t XSIZE,YSIZE;
	XSIZE = 0;
	YSIZE = 0;
	int i,j;

	//Counting number of columns(x)
	char* max_line;
	max_line = (char*)malloc(MAX_XSIZE_POSSIBLE);
	memset(max_line,'\0',sizeof(max_line));

	fgets(max_line,MAX_XSIZE_POSSIBLE,datTxt1)!=NULL; 
	while(*max_line)if(*max_line++ == ' ')++XSIZE;
	XSIZE+=1;
	
	


	//Counting number of rows(y)
	do{
		i = fgetc(datTxt1);
		if(i == '\n') YSIZE++;
	}while(i != EOF);
	YSIZE+=1;
	
	fclose(datTxt1);
	cout<< "(XSIZE,YSIZE)::"<< "(" << XSIZE << "," << YSIZE << ")" << "\n";

	datTxt = fopen(FileName,"r");

	if(datTxt == NULL) {
		printf("Cannot open file: %s\nCheck if file exists\n",argv[1]);
		exit(1);
	}

//-----------------------Checking if the data size fits the memory of the GPU----------------------------------------------------------------------------------------//
	cout<< "(XSIZE,YSIZE)::"<< "(" << XSIZE << "," << YSIZE << ")" << "\n";
	//(MAX_XSIZE_POSSIBLE - XSIZE*YSIZE >0)? printf("There is enough memory for the computation\n"):printf("There is not enough memory and may result in incorrect results\n");

//--------------------------------------------------------------------------------------------------------------------------------------------------------------------//
//	Allocating Managed Memory (Unified Memory)

//	dim3 gridSize(XSIZE ,(YSIZE+THREADS_PER_BLOCK-1)/THREADS_PER_BLOCK,1);
//	dim3 blockSize(1,THREADS_PER_BLOCK,1);

	long int total_threads;

	float* data;
	float* anisotropy,*azimuth,*angle;
	float* variance,*orientation,*ortho;

	total_threads = THREADS_PER_BLOCK * ((XSIZE + THREADS_PER_BLOCK - 1)/THREADS_PER_BLOCK) * YSIZE;

	HANDLE_ERROR(cudaMallocManaged((void**)&angle,ANGLESIZE * sizeof(float)));
	HANDLE_ERROR(cudaMallocManaged((void**)&data,XSIZE * YSIZE * sizeof(float)));
	HANDLE_ERROR(cudaMallocManaged((void**)&anisotropy,YSIZE  * XSIZE  * RADIUS/RADSTEP * sizeof(float)));
	HANDLE_ERROR(cudaMallocManaged((void**)&azimuth,YSIZE  * XSIZE  * RADIUS/RADSTEP * sizeof(float)));

	HANDLE_ERROR(cudaMallocManaged((void**)&variance,total_threads * RADIUS * sizeof(float)));
	HANDLE_ERROR(cudaMallocManaged((void**)&orientation,total_threads * RADIUS * sizeof(float)));
	HANDLE_ERROR(cudaMallocManaged((void**)&ortho,total_threads * RADIUS * sizeof(float)));
//--------------------------------------------------------------------------------------------------------------------------------------------------------------------//
	//XSIZE ints in a row which are max of 5 digits
	//with a space in the front and the back and space
	//between each number 
	char *startPtr,*endPtr;
	char line[XSIZE * 10 +2+(XSIZE-1)];
	memset(line, '\0', sizeof(line));
	int Value;
	i = 0;
	j = 0;
	//Assuming each number in the data set has a max of 5 characters
	char tempVal[5];
	memset(tempVal,'\0',sizeof(tempVal));

	cout<< "Working1\n";
	while(fgets(line,XSIZE *10 + 2 + (XSIZE-1),datTxt)!=NULL) {	
		cout << "Working2\n";
		startPtr = line;	
		for(i=0;i<XSIZE;i++) {
			Value = 0;
			memset(tempVal,'\0',sizeof(tempVal));		
			if(i != (XSIZE - 1)) {	
				endPtr = strchr(startPtr,' ');
				strncpy(tempVal,startPtr,endPtr-startPtr); 
				Value = atoi(tempVal);
				data[j * XSIZE + i] = Value;
				fprintf(inpCheck,"%d ",Value);

				endPtr = endPtr + 1;
				startPtr = endPtr;
			}	
			else if(i == (XSIZE - 1)){
				strcpy(tempVal,startPtr);
				Value = atoi(tempVal);
				data[j * XSIZE + i] = Value;
				fprintf(inpCheck,"%d\n",Value);
			}
		}
		
		j++;
	}	
	
	
//------------------------------------Matrix Declarations--------------------------------------------------------------------------------------------------------------//
//	float angle[ANGLESIZE];

	for(int i=0;i<ANGLESIZE;i++) {
		angle[i] = i * 5 * PI/180;
	}
	
	for(i=0;i<RADIUS * total_threads ;i++){
			variance[i] = FLT_MAX;
			ortho[i] = FLT_MAX;
			orientation[i] = FLT_MAX;
	}
//--------------------------------------CUDA-------------------------------------------------------------------------------------------------------------------------//

	
	cudaError_t error;
	//error = cudaSetDevice(Get_GPU_devices() -1);
	error = cudaSetDevice(0);

	if(error == cudaSuccess){
		 cout <<"success\n";
	}else{
		cout <<"unsuccessful\n";
	}
	
	//cudaSetDevice(1);

	cout<< "Hello1\n";

	dim3 gridSize((XSIZE + THREADS_PER_BLOCK - 1)/THREADS_PER_BLOCK,YSIZE,1);
	dim3 blockSize(THREADS_PER_BLOCK,1,1);

	//dim3 gridSize(3,YSIZE,1);
	

	cout <<"Hello2\n";

	getMatrix<<<gridSize,blockSize>>>(data,angle,anisotropy,azimuth,variance,orientation,ortho,XSIZE,YSIZE,RADIUS,WINDOW_SIZE);

	error = cudaDeviceSynchronize();
	if(error != cudaSuccess){
		cout << "CUDA Device Synchronization Error:" << cudaGetErrorString(error) << "\n";

    		// we can't recover from the error -- exit the program
    		return 0;
  	}

	error = cudaGetLastError();

	if(error != cudaSuccess){
		cout <<"CUDA Error:" << cudaGetErrorString(error) << "\n";
    		// we can't recover from the error -- exit the program
	    	return 0;
  	}

	cout << "Hello3\n";
	cout << "Hello4\n";
	cout << "Hello5\n";

//--------------------------------------------------------------------------------------------------------------------------------------------------------------------//
//			Writing to files


	for(j=0;j<YSIZE ;j++) {
		for(i=0;i<XSIZE ;i++) {
			if((j>(YSIZE - RADIUS - 1))||(j<(RADIUS))) continue;
			if((i>(XSIZE - RADIUS - 1))||(i<(RADIUS))) continue;

			if (i == (XSIZE  - RADIUS - 1)) {
				fprintf(outputAnisotropy00,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + 0]);
				fprintf(outputAzimuth00,"%f",azimuth[j * XSIZE * RADIUS/RADSTEP + i * RADIUS/RADSTEP + 0]);
				fprintf(outputAnisotropy00,"\n");
				fprintf(outputAzimuth00,"\n");

				fprintf(outputAnisotropy09,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP +RADIUS/10 -1]);
				fprintf(outputAzimuth09,"%f",azimuth[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS/10 -1]);
				fprintf(outputAnisotropy09,"\n");
				fprintf(outputAzimuth09,"\n");

				fprintf(outputAnisotropy49,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS/2 - 1]);
				fprintf(outputAzimuth49,"%f",azimuth[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS/2 - 1]);
				fprintf(outputAnisotropy49,"\n");
				fprintf(outputAzimuth49,"\n");

				fprintf(outputAnisotropy99,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS -1]);
				fprintf(outputAzimuth99,"%f",azimuth[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS - 1]);
				fprintf(outputAnisotropy99,"\n");
				fprintf(outputAzimuth99,"\n");
			}
			else {
				fprintf(outputAnisotropy00,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + 0]);
				fprintf(outputAzimuth00,"%f",azimuth[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + 0]);
				fprintf(outputAnisotropy00,"\t");
				fprintf(outputAzimuth00,"\t");
	
				fprintf(outputAnisotropy09,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS/10 -1]);
				fprintf(outputAzimuth09,"%f",azimuth[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS/10 -1]);
				fprintf(outputAnisotropy09,"\t");
				fprintf(outputAzimuth09,"\t");

				fprintf(outputAnisotropy49,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS/2 - 1]);
				fprintf(outputAzimuth49,"%f",azimuth[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS/2 - 1]);	
				fprintf(outputAnisotropy49,"\t");
				fprintf(outputAzimuth49,"\t");

				fprintf(outputAnisotropy99,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS - 1]);
				fprintf(outputAzimuth99,"%f",azimuth[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS - 1]);
				fprintf(outputAnisotropy99,"\t");
				fprintf(outputAzimuth99,"\t");	
			}					
		}
	}	


	fclose(datTxt);
	fclose(inpCheck);
	fclose(outputAnisotropy00);
	fclose(outputAnisotropy09);
	fclose(outputAnisotropy49);
	fclose(outputAnisotropy99);

	fclose(outputAzimuth00);
	fclose(outputAzimuth09);
	fclose(outputAzimuth49);
	fclose(outputAzimuth99);
	
	cudaFree(data);
	cudaFree(angle);
	cudaFree(azimuth);
	cudaFree(anisotropy);
	cudaFree(variance);
	cudaFree(orientation);
	cudaFree(ortho);
	
	
	//free(max_line);
//	free(anisotropy);
//	free(azimuth);

//	size_t free_byte ;

//	size_t total_byte ;
/*
	cudaMemGetInfo( &free_byte, &total_byte );
	double free_db = (double)free_byte;
	double total_db = (double)total_byte;
	double used_db = total_db - free_db;
//	cout << "GPU memory usage: used = %f, free = %f MB, total = %f MB\n",used_db/1024.0/1024.0, free_db/1024.0/1024.0, total_db/1024.0/1024.0);
*/
	return 0;
}

	.file	"tmpxft_00213bd7_00000000-6_topo_UnifiedMemory.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.section	.text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
	.weak	nvtxEtiGetModuleFunctionTable_v3
	.hidden	nvtxEtiGetModuleFunctionTable_v3
	.type	nvtxEtiGetModuleFunctionTable_v3, @function
nvtxEtiGetModuleFunctionTable_v3:
.LFB8470:
	.cfi_startproc
	endbr64
	decl	%edi
	xorl	%eax, %eax
	cmpl	$5, %edi
	ja	.L1
	leaq	.L4(%rip), %rcx
	movslq	(%rcx,%rdi,4), %rax
	addq	%rcx, %rax
	notrack jmp	*%rax
	.section	.rodata.nvtxEtiGetModuleFunctionTable_v3,"aG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
	.align 4
	.align 4
.L4:
	.long	.L9-.L4
	.long	.L14-.L4
	.long	.L7-.L4
	.long	.L6-.L4
	.long	.L5-.L4
	.long	.L3-.L4
	.section	.text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
.L9:
	leaq	560+nvtxGlobals_v3(%rip), %rcx
	jmp	.L18
.L7:
	leaq	776+nvtxGlobals_v3(%rip), %rcx
	movl	$128, %eax
	jmp	.L8
.L6:
	leaq	904+nvtxGlobals_v3(%rip), %rcx
	jmp	.L19
.L5:
	leaq	968+nvtxGlobals_v3(%rip), %rcx
.L18:
	movl	$136, %eax
	jmp	.L8
.L3:
	leaq	1104+nvtxGlobals_v3(%rip), %rcx
.L19:
	movl	$64, %eax
	jmp	.L8
.L14:
	leaq	696+nvtxGlobals_v3(%rip), %rcx
	movl	$80, %eax
.L8:
	testq	%rdx, %rdx
	je	.L10
	shrl	$3, %eax
	decl	%eax
	movl	%eax, (%rdx)
.L10:
	testq	%rsi, %rsi
	jne	.L11
.L12:
	movl	$1, %eax
	ret
.L11:
	movq	%rcx, (%rsi)
	jmp	.L12
.L1:
	ret
	.cfi_endproc
.LFE8470:
	.size	nvtxEtiGetModuleFunctionTable_v3, .-nvtxEtiGetModuleFunctionTable_v3
	.section	.text.nvtxGetExportTable_v3,"axG",@progbits,nvtxGetExportTable_v3,comdat
	.weak	nvtxGetExportTable_v3
	.hidden	nvtxGetExportTable_v3
	.type	nvtxGetExportTable_v3, @function
nvtxGetExportTable_v3:
.LFB8471:
	.cfi_startproc
	endbr64
	leaq	8+nvtxGlobals_v3(%rip), %rax
	cmpl	$1, %edi
	je	.L21
	cmpl	$3, %edi
	leaq	16(%rax), %rax
	movl	$0, %edx
	cmovne	%rdx, %rax
.L21:
	ret
	.cfi_endproc
.LFE8471:
	.size	nvtxGetExportTable_v3, .-nvtxGetExportTable_v3
	.section	.text.nvtxEtiSetInjectionNvtxVersion_v3,"axG",@progbits,nvtxEtiSetInjectionNvtxVersion_v3,comdat
	.weak	nvtxEtiSetInjectionNvtxVersion_v3
	.hidden	nvtxEtiSetInjectionNvtxVersion_v3
	.type	nvtxEtiSetInjectionNvtxVersion_v3, @function
nvtxEtiSetInjectionNvtxVersion_v3:
.LFB8472:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE8472:
	.size	nvtxEtiSetInjectionNvtxVersion_v3, .-nvtxEtiSetInjectionNvtxVersion_v3
	.text
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB11176:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE11176:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"in"
.LC1:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/bipushosti/Topographic_Anisotropy/master/topo_UnifiedMemory.cu"
.LC2:
	.string	"at line"
.LC3:
	.string	"\n"
	.text
	.type	_ZL11HandleError9cudaErrorPKci.constprop.0, @function
_ZL11HandleError9cudaErrorPKci.constprop.0:
.LFB12066:
	.cfi_startproc
	testl	%edi, %edi
	je	.L28
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%esi, %ebx
	call	cudaGetErrorString@PLT
	leaq	_ZSt4cout(%rip), %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1, %edi
	call	exit@PLT
.L28:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE12066:
	.size	_ZL11HandleError9cudaErrorPKci.constprop.0, .-_ZL11HandleError9cudaErrorPKci.constprop.0
	.section	.text._ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,"axG",@progbits,_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,comdat
	.weak	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.hidden	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.type	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, @function
_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv:
.LFB11586:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L33:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11586:
	.size	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, .-_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.section	.text.nvtxSetInitFunctionsToNoops_v3,"axG",@progbits,nvtxSetInitFunctionsToNoops_v3,comdat
	.weak	nvtxSetInitFunctionsToNoops_v3
	.hidden	nvtxSetInitFunctionsToNoops_v3
	.type	nvtxSetInitFunctionsToNoops_v3, @function
nvtxSetInitFunctionsToNoops_v3:
.LFB8537:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	leaq	nvtxMarkEx_impl_init_v3(%rip), %rdx
	setne	%al
	cmpq	%rdx, 48+nvtxGlobals_v3(%rip)
	je	.L166
	testb	%al, %al
	je	.L38
.L166:
	xorl	%r10d, %r10d
	movq	%r10, 48+nvtxGlobals_v3(%rip)
.L38:
	leaq	nvtxMarkA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 56+nvtxGlobals_v3(%rip)
	je	.L167
	testb	%al, %al
	je	.L40
.L167:
	xorl	%r9d, %r9d
	movq	%r9, 56+nvtxGlobals_v3(%rip)
.L40:
	leaq	nvtxMarkW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 64+nvtxGlobals_v3(%rip)
	je	.L168
	testb	%al, %al
	je	.L42
.L168:
	xorl	%r8d, %r8d
	movq	%r8, 64+nvtxGlobals_v3(%rip)
.L42:
	leaq	nvtxRangeStartEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 72+nvtxGlobals_v3(%rip)
	je	.L169
	testb	%al, %al
	je	.L44
.L169:
	xorl	%edi, %edi
	movq	%rdi, 72+nvtxGlobals_v3(%rip)
.L44:
	leaq	nvtxRangeStartA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 80+nvtxGlobals_v3(%rip)
	je	.L170
	testb	%al, %al
	je	.L46
.L170:
	xorl	%esi, %esi
	movq	%rsi, 80+nvtxGlobals_v3(%rip)
.L46:
	leaq	nvtxRangeStartW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 88+nvtxGlobals_v3(%rip)
	je	.L171
	testb	%al, %al
	je	.L48
.L171:
	xorl	%ecx, %ecx
	movq	%rcx, 88+nvtxGlobals_v3(%rip)
.L48:
	leaq	nvtxRangeEnd_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 96+nvtxGlobals_v3(%rip)
	je	.L172
	testb	%al, %al
	je	.L50
.L172:
	xorl	%edx, %edx
	movq	%rdx, 96+nvtxGlobals_v3(%rip)
.L50:
	leaq	nvtxRangePushEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 104+nvtxGlobals_v3(%rip)
	je	.L173
	testb	%al, %al
	je	.L52
.L173:
	xorl	%r11d, %r11d
	movq	%r11, 104+nvtxGlobals_v3(%rip)
.L52:
	leaq	nvtxRangePushA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 112+nvtxGlobals_v3(%rip)
	je	.L174
	testb	%al, %al
	je	.L54
.L174:
	xorl	%r10d, %r10d
	movq	%r10, 112+nvtxGlobals_v3(%rip)
.L54:
	leaq	nvtxRangePushW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 120+nvtxGlobals_v3(%rip)
	je	.L175
	testb	%al, %al
	je	.L56
.L175:
	xorl	%r9d, %r9d
	movq	%r9, 120+nvtxGlobals_v3(%rip)
.L56:
	leaq	nvtxRangePop_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 128+nvtxGlobals_v3(%rip)
	je	.L176
	testb	%al, %al
	je	.L58
.L176:
	xorl	%r8d, %r8d
	movq	%r8, 128+nvtxGlobals_v3(%rip)
.L58:
	leaq	nvtxNameCategoryA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 136+nvtxGlobals_v3(%rip)
	je	.L177
	testb	%al, %al
	je	.L60
.L177:
	xorl	%edi, %edi
	movq	%rdi, 136+nvtxGlobals_v3(%rip)
.L60:
	leaq	nvtxNameCategoryW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 144+nvtxGlobals_v3(%rip)
	je	.L178
	testb	%al, %al
	je	.L62
.L178:
	xorl	%esi, %esi
	movq	%rsi, 144+nvtxGlobals_v3(%rip)
.L62:
	leaq	nvtxNameOsThreadA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 152+nvtxGlobals_v3(%rip)
	je	.L179
	testb	%al, %al
	je	.L64
.L179:
	xorl	%ecx, %ecx
	movq	%rcx, 152+nvtxGlobals_v3(%rip)
.L64:
	leaq	nvtxNameOsThreadW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 160+nvtxGlobals_v3(%rip)
	je	.L180
	testb	%al, %al
	je	.L66
.L180:
	xorl	%edx, %edx
	movq	%rdx, 160+nvtxGlobals_v3(%rip)
.L66:
	leaq	nvtxNameCuDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 168+nvtxGlobals_v3(%rip)
	je	.L181
	testb	%al, %al
	je	.L68
.L181:
	xorl	%r11d, %r11d
	movq	%r11, 168+nvtxGlobals_v3(%rip)
.L68:
	leaq	nvtxNameCuDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 176+nvtxGlobals_v3(%rip)
	je	.L182
	testb	%al, %al
	je	.L70
.L182:
	xorl	%r10d, %r10d
	movq	%r10, 176+nvtxGlobals_v3(%rip)
.L70:
	leaq	nvtxNameCuContextA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 184+nvtxGlobals_v3(%rip)
	je	.L183
	testb	%al, %al
	je	.L72
.L183:
	xorl	%r9d, %r9d
	movq	%r9, 184+nvtxGlobals_v3(%rip)
.L72:
	leaq	nvtxNameCuContextW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 192+nvtxGlobals_v3(%rip)
	je	.L184
	testb	%al, %al
	je	.L74
.L184:
	xorl	%r8d, %r8d
	movq	%r8, 192+nvtxGlobals_v3(%rip)
.L74:
	leaq	nvtxNameCuStreamA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 200+nvtxGlobals_v3(%rip)
	je	.L185
	testb	%al, %al
	je	.L76
.L185:
	xorl	%edi, %edi
	movq	%rdi, 200+nvtxGlobals_v3(%rip)
.L76:
	leaq	nvtxNameCuStreamW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 208+nvtxGlobals_v3(%rip)
	je	.L186
	testb	%al, %al
	je	.L78
.L186:
	xorl	%esi, %esi
	movq	%rsi, 208+nvtxGlobals_v3(%rip)
.L78:
	leaq	nvtxNameCuEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 216+nvtxGlobals_v3(%rip)
	je	.L187
	testb	%al, %al
	je	.L80
.L187:
	xorl	%ecx, %ecx
	movq	%rcx, 216+nvtxGlobals_v3(%rip)
.L80:
	leaq	nvtxNameCuEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 224+nvtxGlobals_v3(%rip)
	je	.L188
	testb	%al, %al
	je	.L82
.L188:
	xorl	%edx, %edx
	movq	%rdx, 224+nvtxGlobals_v3(%rip)
.L82:
	leaq	nvtxNameClDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 232+nvtxGlobals_v3(%rip)
	je	.L189
	testb	%al, %al
	je	.L84
.L189:
	xorl	%r11d, %r11d
	movq	%r11, 232+nvtxGlobals_v3(%rip)
.L84:
	leaq	nvtxNameClDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 240+nvtxGlobals_v3(%rip)
	je	.L190
	testb	%al, %al
	je	.L86
.L190:
	xorl	%r10d, %r10d
	movq	%r10, 240+nvtxGlobals_v3(%rip)
.L86:
	leaq	nvtxNameClContextA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 248+nvtxGlobals_v3(%rip)
	je	.L191
	testb	%al, %al
	je	.L88
.L191:
	xorl	%r9d, %r9d
	movq	%r9, 248+nvtxGlobals_v3(%rip)
.L88:
	leaq	nvtxNameClContextW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 256+nvtxGlobals_v3(%rip)
	je	.L192
	testb	%al, %al
	je	.L90
.L192:
	xorl	%r8d, %r8d
	movq	%r8, 256+nvtxGlobals_v3(%rip)
.L90:
	leaq	nvtxNameClCommandQueueA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 264+nvtxGlobals_v3(%rip)
	je	.L193
	testb	%al, %al
	je	.L92
.L193:
	xorl	%edi, %edi
	movq	%rdi, 264+nvtxGlobals_v3(%rip)
.L92:
	leaq	nvtxNameClCommandQueueW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 272+nvtxGlobals_v3(%rip)
	je	.L194
	testb	%al, %al
	je	.L94
.L194:
	xorl	%esi, %esi
	movq	%rsi, 272+nvtxGlobals_v3(%rip)
.L94:
	leaq	nvtxNameClMemObjectA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 280+nvtxGlobals_v3(%rip)
	je	.L195
	testb	%al, %al
	je	.L96
.L195:
	xorl	%ecx, %ecx
	movq	%rcx, 280+nvtxGlobals_v3(%rip)
.L96:
	leaq	nvtxNameClMemObjectW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 288+nvtxGlobals_v3(%rip)
	je	.L196
	testb	%al, %al
	je	.L98
.L196:
	xorl	%edx, %edx
	movq	%rdx, 288+nvtxGlobals_v3(%rip)
.L98:
	leaq	nvtxNameClSamplerA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 296+nvtxGlobals_v3(%rip)
	je	.L197
	testb	%al, %al
	je	.L100
.L197:
	xorl	%r11d, %r11d
	movq	%r11, 296+nvtxGlobals_v3(%rip)
.L100:
	leaq	nvtxNameClSamplerW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 304+nvtxGlobals_v3(%rip)
	je	.L198
	testb	%al, %al
	je	.L102
.L198:
	xorl	%r10d, %r10d
	movq	%r10, 304+nvtxGlobals_v3(%rip)
.L102:
	leaq	nvtxNameClProgramA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 312+nvtxGlobals_v3(%rip)
	je	.L199
	testb	%al, %al
	je	.L104
.L199:
	xorl	%r9d, %r9d
	movq	%r9, 312+nvtxGlobals_v3(%rip)
.L104:
	leaq	nvtxNameClProgramW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 320+nvtxGlobals_v3(%rip)
	je	.L200
	testb	%al, %al
	je	.L106
.L200:
	xorl	%r8d, %r8d
	movq	%r8, 320+nvtxGlobals_v3(%rip)
.L106:
	leaq	nvtxNameClEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 328+nvtxGlobals_v3(%rip)
	je	.L201
	testb	%al, %al
	je	.L108
.L201:
	xorl	%edi, %edi
	movq	%rdi, 328+nvtxGlobals_v3(%rip)
.L108:
	leaq	nvtxNameClEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 336+nvtxGlobals_v3(%rip)
	je	.L202
	testb	%al, %al
	je	.L110
.L202:
	xorl	%esi, %esi
	movq	%rsi, 336+nvtxGlobals_v3(%rip)
.L110:
	leaq	nvtxNameCudaDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 344+nvtxGlobals_v3(%rip)
	je	.L203
	testb	%al, %al
	je	.L112
.L203:
	xorl	%ecx, %ecx
	movq	%rcx, 344+nvtxGlobals_v3(%rip)
.L112:
	leaq	nvtxNameCudaDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 352+nvtxGlobals_v3(%rip)
	je	.L204
	testb	%al, %al
	je	.L114
.L204:
	xorl	%edx, %edx
	movq	%rdx, 352+nvtxGlobals_v3(%rip)
.L114:
	leaq	nvtxNameCudaStreamA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 360+nvtxGlobals_v3(%rip)
	je	.L205
	testb	%al, %al
	je	.L116
.L205:
	xorl	%r11d, %r11d
	movq	%r11, 360+nvtxGlobals_v3(%rip)
.L116:
	leaq	nvtxNameCudaStreamW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 368+nvtxGlobals_v3(%rip)
	je	.L206
	testb	%al, %al
	je	.L118
.L206:
	xorl	%r10d, %r10d
	movq	%r10, 368+nvtxGlobals_v3(%rip)
.L118:
	leaq	nvtxNameCudaEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 376+nvtxGlobals_v3(%rip)
	je	.L207
	testb	%al, %al
	je	.L120
.L207:
	xorl	%r9d, %r9d
	movq	%r9, 376+nvtxGlobals_v3(%rip)
.L120:
	leaq	nvtxNameCudaEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 384+nvtxGlobals_v3(%rip)
	je	.L208
	testb	%al, %al
	je	.L122
.L208:
	xorl	%r8d, %r8d
	movq	%r8, 384+nvtxGlobals_v3(%rip)
.L122:
	leaq	nvtxDomainMarkEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 392+nvtxGlobals_v3(%rip)
	je	.L209
	testb	%al, %al
	je	.L124
.L209:
	xorl	%edi, %edi
	movq	%rdi, 392+nvtxGlobals_v3(%rip)
.L124:
	leaq	nvtxDomainRangeStartEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 400+nvtxGlobals_v3(%rip)
	je	.L210
	testb	%al, %al
	je	.L126
.L210:
	xorl	%esi, %esi
	movq	%rsi, 400+nvtxGlobals_v3(%rip)
.L126:
	leaq	nvtxDomainRangeEnd_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 408+nvtxGlobals_v3(%rip)
	je	.L211
	testb	%al, %al
	je	.L128
.L211:
	xorl	%ecx, %ecx
	movq	%rcx, 408+nvtxGlobals_v3(%rip)
.L128:
	leaq	nvtxDomainRangePushEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 416+nvtxGlobals_v3(%rip)
	je	.L212
	testb	%al, %al
	je	.L130
.L212:
	xorl	%edx, %edx
	movq	%rdx, 416+nvtxGlobals_v3(%rip)
.L130:
	leaq	nvtxDomainRangePop_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 424+nvtxGlobals_v3(%rip)
	je	.L213
	testb	%al, %al
	je	.L132
.L213:
	xorl	%r11d, %r11d
	movq	%r11, 424+nvtxGlobals_v3(%rip)
.L132:
	leaq	nvtxDomainResourceCreate_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 432+nvtxGlobals_v3(%rip)
	je	.L214
	testb	%al, %al
	je	.L134
.L214:
	xorl	%r10d, %r10d
	movq	%r10, 432+nvtxGlobals_v3(%rip)
.L134:
	leaq	nvtxDomainResourceDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 440+nvtxGlobals_v3(%rip)
	je	.L215
	testb	%al, %al
	je	.L136
.L215:
	xorl	%r9d, %r9d
	movq	%r9, 440+nvtxGlobals_v3(%rip)
.L136:
	leaq	nvtxDomainNameCategoryA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 448+nvtxGlobals_v3(%rip)
	je	.L216
	testb	%al, %al
	je	.L138
.L216:
	xorl	%r8d, %r8d
	movq	%r8, 448+nvtxGlobals_v3(%rip)
.L138:
	leaq	nvtxDomainNameCategoryW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 456+nvtxGlobals_v3(%rip)
	je	.L217
	testb	%al, %al
	je	.L140
.L217:
	xorl	%edi, %edi
	movq	%rdi, 456+nvtxGlobals_v3(%rip)
.L140:
	leaq	nvtxDomainRegisterStringA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 464+nvtxGlobals_v3(%rip)
	je	.L218
	testb	%al, %al
	je	.L142
.L218:
	xorl	%esi, %esi
	movq	%rsi, 464+nvtxGlobals_v3(%rip)
.L142:
	leaq	nvtxDomainRegisterStringW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 472+nvtxGlobals_v3(%rip)
	je	.L219
	testb	%al, %al
	je	.L144
.L219:
	xorl	%ecx, %ecx
	movq	%rcx, 472+nvtxGlobals_v3(%rip)
.L144:
	leaq	nvtxDomainCreateA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 480+nvtxGlobals_v3(%rip)
	je	.L220
	testb	%al, %al
	je	.L146
.L220:
	xorl	%edx, %edx
	movq	%rdx, 480+nvtxGlobals_v3(%rip)
.L146:
	leaq	nvtxDomainCreateW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 488+nvtxGlobals_v3(%rip)
	je	.L221
	testb	%al, %al
	je	.L148
.L221:
	xorl	%r11d, %r11d
	movq	%r11, 488+nvtxGlobals_v3(%rip)
.L148:
	leaq	nvtxDomainDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 496+nvtxGlobals_v3(%rip)
	je	.L222
	testb	%al, %al
	je	.L150
.L222:
	xorl	%r10d, %r10d
	movq	%r10, 496+nvtxGlobals_v3(%rip)
.L150:
	leaq	nvtxInitialize_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 504+nvtxGlobals_v3(%rip)
	je	.L223
	testb	%al, %al
	je	.L152
.L223:
	xorl	%r9d, %r9d
	movq	%r9, 504+nvtxGlobals_v3(%rip)
.L152:
	leaq	nvtxDomainSyncUserCreate_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 512+nvtxGlobals_v3(%rip)
	je	.L224
	testb	%al, %al
	je	.L154
.L224:
	xorl	%r8d, %r8d
	movq	%r8, 512+nvtxGlobals_v3(%rip)
.L154:
	leaq	nvtxDomainSyncUserDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 520+nvtxGlobals_v3(%rip)
	je	.L225
	testb	%al, %al
	je	.L156
.L225:
	xorl	%edi, %edi
	movq	%rdi, 520+nvtxGlobals_v3(%rip)
.L156:
	leaq	nvtxDomainSyncUserAcquireStart_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 528+nvtxGlobals_v3(%rip)
	je	.L226
	testb	%al, %al
	je	.L158
.L226:
	xorl	%esi, %esi
	movq	%rsi, 528+nvtxGlobals_v3(%rip)
.L158:
	leaq	nvtxDomainSyncUserAcquireFailed_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 536+nvtxGlobals_v3(%rip)
	je	.L227
	testb	%al, %al
	je	.L160
.L227:
	xorl	%ecx, %ecx
	movq	%rcx, 536+nvtxGlobals_v3(%rip)
.L160:
	leaq	nvtxDomainSyncUserAcquireSuccess_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 544+nvtxGlobals_v3(%rip)
	je	.L228
	testb	%al, %al
	je	.L162
.L228:
	xorl	%edx, %edx
	movq	%rdx, 544+nvtxGlobals_v3(%rip)
.L162:
	leaq	nvtxDomainSyncUserReleasing_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 552+nvtxGlobals_v3(%rip)
	je	.L229
	testb	%al, %al
	je	.L37
.L229:
	xorl	%eax, %eax
	movq	%rax, 552+nvtxGlobals_v3(%rip)
.L37:
	ret
	.cfi_endproc
.LFE8537:
	.size	nvtxSetInitFunctionsToNoops_v3, .-nvtxSetInitFunctionsToNoops_v3
	.section	.rodata.nvtxInitializeInjectionLibrary_v3.str1.1,"aMS",@progbits,1
.LC4:
	.string	"NVTX_INJECTION64_PATH"
.LC5:
	.string	"InitializeInjectionNvtx2"
	.section	.text.nvtxInitializeInjectionLibrary_v3,"axG",@progbits,nvtxInitializeInjectionLibrary_v3,comdat
	.weak	nvtxInitializeInjectionLibrary_v3
	.hidden	nvtxInitializeInjectionLibrary_v3
	.type	nvtxInitializeInjectionLibrary_v3, @function
nvtxInitializeInjectionLibrary_v3:
.LFB8538:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	.LC4(%rip), %rdi
	call	getenv@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	je	.L423
	movl	$1, %esi
	movq	%rax, %rdi
	call	dlopen@PLT
	movl	$4, %edx
	movq	%rax, %rbx
	testq	%rax, %rax
	je	.L422
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	dlsym@PLT
	testq	%rax, %rax
	jne	.L425
	movq	%rbx, %rdi
	call	dlclose@PLT
	movl	$5, %edx
	jmp	.L422
.L423:
	movq	InitializeInjectionNvtx2_fnptr(%rip), %rax
	movl	$7, %edx
	testq	%rax, %rax
	je	.L422
.L425:
	leaq	nvtxGetExportTable_v3(%rip), %rdi
	call	*%rax
	xorl	%edx, %edx
	testl	%eax, %eax
	jne	.L422
	testq	%rbx, %rbx
	je	.L426
	movq	%rbx, %rdi
	call	dlclose@PLT
.L426:
	movl	$6, %edx
.L422:
	movl	%edx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8538:
	.size	nvtxInitializeInjectionLibrary_v3, .-nvtxInitializeInjectionLibrary_v3
	.section	.text.nvtxInitOnce_v3,"axG",@progbits,nvtxInitOnce_v3,comdat
	.weak	nvtxInitOnce_v3
	.hidden	nvtxInitOnce_v3
	.type	nvtxInitOnce_v3, @function
nvtxInitOnce_v3:
.LFB8539:
	.cfi_startproc
	endbr64
	movl	nvtxGlobals_v3(%rip), %eax
	cmpl	$2, %eax
	je	.L442
	pushq	%rdx
	.cfi_def_cfa_offset 16
	movl	$1, %eax
	xorl	%edx, %edx
	mfence
	lock cmpxchgl	%edx, nvtxGlobals_v3(%rip)
	testl	%eax, %eax
	jne	.L445
	call	nvtxInitializeInjectionLibrary_v3
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	call	nvtxSetInitFunctionsToNoops_v3
	movl	$2, %eax
	mfence
	xchgl	nvtxGlobals_v3(%rip), %eax
	jmp	.L434
.L445:
	mfence
	movl	nvtxGlobals_v3(%rip), %eax
	cmpl	$2, %eax
	je	.L434
	call	sched_yield@PLT
	jmp	.L445
.L434:
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
.L442:
	ret
	.cfi_endproc
.LFE8539:
	.size	nvtxInitOnce_v3, .-nvtxInitOnce_v3
	.section	.text.nvtxDomainSyncUserReleasing_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserReleasing_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserReleasing_impl_init_v3
	.hidden	nvtxDomainSyncUserReleasing_impl_init_v3
	.type	nvtxDomainSyncUserReleasing_impl_init_v3, @function
nvtxDomainSyncUserReleasing_impl_init_v3:
.LFB8536:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	552+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L446
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L446:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8536:
	.size	nvtxDomainSyncUserReleasing_impl_init_v3, .-nvtxDomainSyncUserReleasing_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireSuccess_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireSuccess_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.type	nvtxDomainSyncUserAcquireSuccess_impl_init_v3, @function
nvtxDomainSyncUserAcquireSuccess_impl_init_v3:
.LFB8535:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	544+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L449
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L449:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8535:
	.size	nvtxDomainSyncUserAcquireSuccess_impl_init_v3, .-nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireFailed_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireFailed_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.type	nvtxDomainSyncUserAcquireFailed_impl_init_v3, @function
nvtxDomainSyncUserAcquireFailed_impl_init_v3:
.LFB8534:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	536+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L452
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L452:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8534:
	.size	nvtxDomainSyncUserAcquireFailed_impl_init_v3, .-nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireStart_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireStart_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.type	nvtxDomainSyncUserAcquireStart_impl_init_v3, @function
nvtxDomainSyncUserAcquireStart_impl_init_v3:
.LFB8533:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	528+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L455
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L455:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8533:
	.size	nvtxDomainSyncUserAcquireStart_impl_init_v3, .-nvtxDomainSyncUserAcquireStart_impl_init_v3
	.section	.text.nvtxDomainSyncUserDestroy_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserDestroy_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserDestroy_impl_init_v3
	.hidden	nvtxDomainSyncUserDestroy_impl_init_v3
	.type	nvtxDomainSyncUserDestroy_impl_init_v3, @function
nvtxDomainSyncUserDestroy_impl_init_v3:
.LFB8532:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	520+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L458
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L458:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8532:
	.size	nvtxDomainSyncUserDestroy_impl_init_v3, .-nvtxDomainSyncUserDestroy_impl_init_v3
	.section	.text.nvtxDomainSyncUserCreate_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserCreate_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserCreate_impl_init_v3
	.hidden	nvtxDomainSyncUserCreate_impl_init_v3
	.type	nvtxDomainSyncUserCreate_impl_init_v3, @function
nvtxDomainSyncUserCreate_impl_init_v3:
.LFB8531:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	512+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L462
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L462:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8531:
	.size	nvtxDomainSyncUserCreate_impl_init_v3, .-nvtxDomainSyncUserCreate_impl_init_v3
	.section	.text.nvtxInitialize_impl_init_v3,"axG",@progbits,nvtxInitialize_impl_init_v3,comdat
	.weak	nvtxInitialize_impl_init_v3
	.hidden	nvtxInitialize_impl_init_v3
	.type	nvtxInitialize_impl_init_v3, @function
nvtxInitialize_impl_init_v3:
.LFB8502:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	504+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L464
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L464:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8502:
	.size	nvtxInitialize_impl_init_v3, .-nvtxInitialize_impl_init_v3
	.section	.text.nvtxDomainDestroy_impl_init_v3,"axG",@progbits,nvtxDomainDestroy_impl_init_v3,comdat
	.weak	nvtxDomainDestroy_impl_init_v3
	.hidden	nvtxDomainDestroy_impl_init_v3
	.type	nvtxDomainDestroy_impl_init_v3, @function
nvtxDomainDestroy_impl_init_v3:
.LFB8501:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	496+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L467
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L467:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8501:
	.size	nvtxDomainDestroy_impl_init_v3, .-nvtxDomainDestroy_impl_init_v3
	.section	.text.nvtxDomainCreateW_impl_init_v3,"axG",@progbits,nvtxDomainCreateW_impl_init_v3,comdat
	.weak	nvtxDomainCreateW_impl_init_v3
	.hidden	nvtxDomainCreateW_impl_init_v3
	.type	nvtxDomainCreateW_impl_init_v3, @function
nvtxDomainCreateW_impl_init_v3:
.LFB8500:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	488+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L471
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L471:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8500:
	.size	nvtxDomainCreateW_impl_init_v3, .-nvtxDomainCreateW_impl_init_v3
	.section	.text.nvtxDomainCreateA_impl_init_v3,"axG",@progbits,nvtxDomainCreateA_impl_init_v3,comdat
	.weak	nvtxDomainCreateA_impl_init_v3
	.hidden	nvtxDomainCreateA_impl_init_v3
	.type	nvtxDomainCreateA_impl_init_v3, @function
nvtxDomainCreateA_impl_init_v3:
.LFB8499:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	480+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L474
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L474:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8499:
	.size	nvtxDomainCreateA_impl_init_v3, .-nvtxDomainCreateA_impl_init_v3
	.section	.text.nvtxDomainRegisterStringW_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringW_impl_init_v3,comdat
	.weak	nvtxDomainRegisterStringW_impl_init_v3
	.hidden	nvtxDomainRegisterStringW_impl_init_v3
	.type	nvtxDomainRegisterStringW_impl_init_v3, @function
nvtxDomainRegisterStringW_impl_init_v3:
.LFB8498:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	472+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L477
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L477:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8498:
	.size	nvtxDomainRegisterStringW_impl_init_v3, .-nvtxDomainRegisterStringW_impl_init_v3
	.section	.text.nvtxDomainRegisterStringA_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringA_impl_init_v3,comdat
	.weak	nvtxDomainRegisterStringA_impl_init_v3
	.hidden	nvtxDomainRegisterStringA_impl_init_v3
	.type	nvtxDomainRegisterStringA_impl_init_v3, @function
nvtxDomainRegisterStringA_impl_init_v3:
.LFB8497:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	464+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L480
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L480:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8497:
	.size	nvtxDomainRegisterStringA_impl_init_v3, .-nvtxDomainRegisterStringA_impl_init_v3
	.section	.text.nvtxDomainNameCategoryW_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryW_impl_init_v3,comdat
	.weak	nvtxDomainNameCategoryW_impl_init_v3
	.hidden	nvtxDomainNameCategoryW_impl_init_v3
	.type	nvtxDomainNameCategoryW_impl_init_v3, @function
nvtxDomainNameCategoryW_impl_init_v3:
.LFB8496:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 24(%rsp)
	movl	%esi, 20(%rsp)
	movq	%rdx, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	456+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L482
	movq	8(%rsp), %rdx
	movl	20(%rsp), %esi
	movq	24(%rsp), %rdi
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L482:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8496:
	.size	nvtxDomainNameCategoryW_impl_init_v3, .-nvtxDomainNameCategoryW_impl_init_v3
	.section	.text.nvtxDomainNameCategoryA_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryA_impl_init_v3,comdat
	.weak	nvtxDomainNameCategoryA_impl_init_v3
	.hidden	nvtxDomainNameCategoryA_impl_init_v3
	.type	nvtxDomainNameCategoryA_impl_init_v3, @function
nvtxDomainNameCategoryA_impl_init_v3:
.LFB8495:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 24(%rsp)
	movl	%esi, 20(%rsp)
	movq	%rdx, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	448+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L485
	movq	8(%rsp), %rdx
	movl	20(%rsp), %esi
	movq	24(%rsp), %rdi
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L485:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8495:
	.size	nvtxDomainNameCategoryA_impl_init_v3, .-nvtxDomainNameCategoryA_impl_init_v3
	.section	.text.nvtxDomainResourceDestroy_impl_init_v3,"axG",@progbits,nvtxDomainResourceDestroy_impl_init_v3,comdat
	.weak	nvtxDomainResourceDestroy_impl_init_v3
	.hidden	nvtxDomainResourceDestroy_impl_init_v3
	.type	nvtxDomainResourceDestroy_impl_init_v3, @function
nvtxDomainResourceDestroy_impl_init_v3:
.LFB8494:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	440+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L488
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L488:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8494:
	.size	nvtxDomainResourceDestroy_impl_init_v3, .-nvtxDomainResourceDestroy_impl_init_v3
	.section	.text.nvtxDomainResourceCreate_impl_init_v3,"axG",@progbits,nvtxDomainResourceCreate_impl_init_v3,comdat
	.weak	nvtxDomainResourceCreate_impl_init_v3
	.hidden	nvtxDomainResourceCreate_impl_init_v3
	.type	nvtxDomainResourceCreate_impl_init_v3, @function
nvtxDomainResourceCreate_impl_init_v3:
.LFB8493:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	432+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L492
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L492:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8493:
	.size	nvtxDomainResourceCreate_impl_init_v3, .-nvtxDomainResourceCreate_impl_init_v3
	.section	.text.nvtxDomainRangePop_impl_init_v3,"axG",@progbits,nvtxDomainRangePop_impl_init_v3,comdat
	.weak	nvtxDomainRangePop_impl_init_v3
	.hidden	nvtxDomainRangePop_impl_init_v3
	.type	nvtxDomainRangePop_impl_init_v3, @function
nvtxDomainRangePop_impl_init_v3:
.LFB8492:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	424+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L495
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L495:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8492:
	.size	nvtxDomainRangePop_impl_init_v3, .-nvtxDomainRangePop_impl_init_v3
	.section	.text.nvtxDomainRangePushEx_impl_init_v3,"axG",@progbits,nvtxDomainRangePushEx_impl_init_v3,comdat
	.weak	nvtxDomainRangePushEx_impl_init_v3
	.hidden	nvtxDomainRangePushEx_impl_init_v3
	.type	nvtxDomainRangePushEx_impl_init_v3, @function
nvtxDomainRangePushEx_impl_init_v3:
.LFB8491:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	416+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L498
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L498:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8491:
	.size	nvtxDomainRangePushEx_impl_init_v3, .-nvtxDomainRangePushEx_impl_init_v3
	.section	.text.nvtxDomainRangeEnd_impl_init_v3,"axG",@progbits,nvtxDomainRangeEnd_impl_init_v3,comdat
	.weak	nvtxDomainRangeEnd_impl_init_v3
	.hidden	nvtxDomainRangeEnd_impl_init_v3
	.type	nvtxDomainRangeEnd_impl_init_v3, @function
nvtxDomainRangeEnd_impl_init_v3:
.LFB8490:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	408+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L500
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L500:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8490:
	.size	nvtxDomainRangeEnd_impl_init_v3, .-nvtxDomainRangeEnd_impl_init_v3
	.section	.text.nvtxDomainRangeStartEx_impl_init_v3,"axG",@progbits,nvtxDomainRangeStartEx_impl_init_v3,comdat
	.weak	nvtxDomainRangeStartEx_impl_init_v3
	.hidden	nvtxDomainRangeStartEx_impl_init_v3
	.type	nvtxDomainRangeStartEx_impl_init_v3, @function
nvtxDomainRangeStartEx_impl_init_v3:
.LFB8489:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	400+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L504
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L504:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8489:
	.size	nvtxDomainRangeStartEx_impl_init_v3, .-nvtxDomainRangeStartEx_impl_init_v3
	.section	.text.nvtxDomainMarkEx_impl_init_v3,"axG",@progbits,nvtxDomainMarkEx_impl_init_v3,comdat
	.weak	nvtxDomainMarkEx_impl_init_v3
	.hidden	nvtxDomainMarkEx_impl_init_v3
	.type	nvtxDomainMarkEx_impl_init_v3, @function
nvtxDomainMarkEx_impl_init_v3:
.LFB8488:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	392+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L506
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L506:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8488:
	.size	nvtxDomainMarkEx_impl_init_v3, .-nvtxDomainMarkEx_impl_init_v3
	.section	.text.nvtxNameCudaEventW_impl_init_v3,"axG",@progbits,nvtxNameCudaEventW_impl_init_v3,comdat
	.weak	nvtxNameCudaEventW_impl_init_v3
	.hidden	nvtxNameCudaEventW_impl_init_v3
	.type	nvtxNameCudaEventW_impl_init_v3, @function
nvtxNameCudaEventW_impl_init_v3:
.LFB8516:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	384+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L509
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L509:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8516:
	.size	nvtxNameCudaEventW_impl_init_v3, .-nvtxNameCudaEventW_impl_init_v3
	.section	.text.nvtxNameCudaEventA_impl_init_v3,"axG",@progbits,nvtxNameCudaEventA_impl_init_v3,comdat
	.weak	nvtxNameCudaEventA_impl_init_v3
	.hidden	nvtxNameCudaEventA_impl_init_v3
	.type	nvtxNameCudaEventA_impl_init_v3, @function
nvtxNameCudaEventA_impl_init_v3:
.LFB8515:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	376+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L512
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L512:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8515:
	.size	nvtxNameCudaEventA_impl_init_v3, .-nvtxNameCudaEventA_impl_init_v3
	.section	.text.nvtxNameCudaStreamW_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamW_impl_init_v3,comdat
	.weak	nvtxNameCudaStreamW_impl_init_v3
	.hidden	nvtxNameCudaStreamW_impl_init_v3
	.type	nvtxNameCudaStreamW_impl_init_v3, @function
nvtxNameCudaStreamW_impl_init_v3:
.LFB8514:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	368+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L515
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L515:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8514:
	.size	nvtxNameCudaStreamW_impl_init_v3, .-nvtxNameCudaStreamW_impl_init_v3
	.section	.text.nvtxNameCudaStreamA_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamA_impl_init_v3,comdat
	.weak	nvtxNameCudaStreamA_impl_init_v3
	.hidden	nvtxNameCudaStreamA_impl_init_v3
	.type	nvtxNameCudaStreamA_impl_init_v3, @function
nvtxNameCudaStreamA_impl_init_v3:
.LFB8513:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	360+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L518
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L518:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8513:
	.size	nvtxNameCudaStreamA_impl_init_v3, .-nvtxNameCudaStreamA_impl_init_v3
	.section	.text.nvtxNameCudaDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceW_impl_init_v3,comdat
	.weak	nvtxNameCudaDeviceW_impl_init_v3
	.hidden	nvtxNameCudaDeviceW_impl_init_v3
	.type	nvtxNameCudaDeviceW_impl_init_v3, @function
nvtxNameCudaDeviceW_impl_init_v3:
.LFB8512:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	352+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L521
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L521:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8512:
	.size	nvtxNameCudaDeviceW_impl_init_v3, .-nvtxNameCudaDeviceW_impl_init_v3
	.section	.text.nvtxNameCudaDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceA_impl_init_v3,comdat
	.weak	nvtxNameCudaDeviceA_impl_init_v3
	.hidden	nvtxNameCudaDeviceA_impl_init_v3
	.type	nvtxNameCudaDeviceA_impl_init_v3, @function
nvtxNameCudaDeviceA_impl_init_v3:
.LFB8511:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	344+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L524
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L524:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8511:
	.size	nvtxNameCudaDeviceA_impl_init_v3, .-nvtxNameCudaDeviceA_impl_init_v3
	.section	.text.nvtxNameClEventW_impl_init_v3,"axG",@progbits,nvtxNameClEventW_impl_init_v3,comdat
	.weak	nvtxNameClEventW_impl_init_v3
	.hidden	nvtxNameClEventW_impl_init_v3
	.type	nvtxNameClEventW_impl_init_v3, @function
nvtxNameClEventW_impl_init_v3:
.LFB8530:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	336+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L527
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L527:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8530:
	.size	nvtxNameClEventW_impl_init_v3, .-nvtxNameClEventW_impl_init_v3
	.section	.text.nvtxNameClEventA_impl_init_v3,"axG",@progbits,nvtxNameClEventA_impl_init_v3,comdat
	.weak	nvtxNameClEventA_impl_init_v3
	.hidden	nvtxNameClEventA_impl_init_v3
	.type	nvtxNameClEventA_impl_init_v3, @function
nvtxNameClEventA_impl_init_v3:
.LFB8529:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	328+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L530
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L530:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8529:
	.size	nvtxNameClEventA_impl_init_v3, .-nvtxNameClEventA_impl_init_v3
	.section	.text.nvtxNameClProgramW_impl_init_v3,"axG",@progbits,nvtxNameClProgramW_impl_init_v3,comdat
	.weak	nvtxNameClProgramW_impl_init_v3
	.hidden	nvtxNameClProgramW_impl_init_v3
	.type	nvtxNameClProgramW_impl_init_v3, @function
nvtxNameClProgramW_impl_init_v3:
.LFB8528:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	320+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L533
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L533:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8528:
	.size	nvtxNameClProgramW_impl_init_v3, .-nvtxNameClProgramW_impl_init_v3
	.section	.text.nvtxNameClProgramA_impl_init_v3,"axG",@progbits,nvtxNameClProgramA_impl_init_v3,comdat
	.weak	nvtxNameClProgramA_impl_init_v3
	.hidden	nvtxNameClProgramA_impl_init_v3
	.type	nvtxNameClProgramA_impl_init_v3, @function
nvtxNameClProgramA_impl_init_v3:
.LFB8527:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	312+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L536
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L536:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8527:
	.size	nvtxNameClProgramA_impl_init_v3, .-nvtxNameClProgramA_impl_init_v3
	.section	.text.nvtxNameClSamplerW_impl_init_v3,"axG",@progbits,nvtxNameClSamplerW_impl_init_v3,comdat
	.weak	nvtxNameClSamplerW_impl_init_v3
	.hidden	nvtxNameClSamplerW_impl_init_v3
	.type	nvtxNameClSamplerW_impl_init_v3, @function
nvtxNameClSamplerW_impl_init_v3:
.LFB8526:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	304+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L539
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L539:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8526:
	.size	nvtxNameClSamplerW_impl_init_v3, .-nvtxNameClSamplerW_impl_init_v3
	.section	.text.nvtxNameClSamplerA_impl_init_v3,"axG",@progbits,nvtxNameClSamplerA_impl_init_v3,comdat
	.weak	nvtxNameClSamplerA_impl_init_v3
	.hidden	nvtxNameClSamplerA_impl_init_v3
	.type	nvtxNameClSamplerA_impl_init_v3, @function
nvtxNameClSamplerA_impl_init_v3:
.LFB8525:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	296+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L542
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L542:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8525:
	.size	nvtxNameClSamplerA_impl_init_v3, .-nvtxNameClSamplerA_impl_init_v3
	.section	.text.nvtxNameClMemObjectW_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectW_impl_init_v3,comdat
	.weak	nvtxNameClMemObjectW_impl_init_v3
	.hidden	nvtxNameClMemObjectW_impl_init_v3
	.type	nvtxNameClMemObjectW_impl_init_v3, @function
nvtxNameClMemObjectW_impl_init_v3:
.LFB8524:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	288+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L545
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L545:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8524:
	.size	nvtxNameClMemObjectW_impl_init_v3, .-nvtxNameClMemObjectW_impl_init_v3
	.section	.text.nvtxNameClMemObjectA_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectA_impl_init_v3,comdat
	.weak	nvtxNameClMemObjectA_impl_init_v3
	.hidden	nvtxNameClMemObjectA_impl_init_v3
	.type	nvtxNameClMemObjectA_impl_init_v3, @function
nvtxNameClMemObjectA_impl_init_v3:
.LFB8523:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	280+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L548
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L548:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8523:
	.size	nvtxNameClMemObjectA_impl_init_v3, .-nvtxNameClMemObjectA_impl_init_v3
	.section	.text.nvtxNameClCommandQueueW_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueW_impl_init_v3,comdat
	.weak	nvtxNameClCommandQueueW_impl_init_v3
	.hidden	nvtxNameClCommandQueueW_impl_init_v3
	.type	nvtxNameClCommandQueueW_impl_init_v3, @function
nvtxNameClCommandQueueW_impl_init_v3:
.LFB8522:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	272+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L551
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L551:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8522:
	.size	nvtxNameClCommandQueueW_impl_init_v3, .-nvtxNameClCommandQueueW_impl_init_v3
	.section	.text.nvtxNameClCommandQueueA_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueA_impl_init_v3,comdat
	.weak	nvtxNameClCommandQueueA_impl_init_v3
	.hidden	nvtxNameClCommandQueueA_impl_init_v3
	.type	nvtxNameClCommandQueueA_impl_init_v3, @function
nvtxNameClCommandQueueA_impl_init_v3:
.LFB8521:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	264+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L554
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L554:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8521:
	.size	nvtxNameClCommandQueueA_impl_init_v3, .-nvtxNameClCommandQueueA_impl_init_v3
	.section	.text.nvtxNameClContextW_impl_init_v3,"axG",@progbits,nvtxNameClContextW_impl_init_v3,comdat
	.weak	nvtxNameClContextW_impl_init_v3
	.hidden	nvtxNameClContextW_impl_init_v3
	.type	nvtxNameClContextW_impl_init_v3, @function
nvtxNameClContextW_impl_init_v3:
.LFB8520:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	256+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L557
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L557:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8520:
	.size	nvtxNameClContextW_impl_init_v3, .-nvtxNameClContextW_impl_init_v3
	.section	.text.nvtxNameClContextA_impl_init_v3,"axG",@progbits,nvtxNameClContextA_impl_init_v3,comdat
	.weak	nvtxNameClContextA_impl_init_v3
	.hidden	nvtxNameClContextA_impl_init_v3
	.type	nvtxNameClContextA_impl_init_v3, @function
nvtxNameClContextA_impl_init_v3:
.LFB8519:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	248+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L560
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L560:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8519:
	.size	nvtxNameClContextA_impl_init_v3, .-nvtxNameClContextA_impl_init_v3
	.section	.text.nvtxNameClDeviceW_impl_init_v3,"axG",@progbits,nvtxNameClDeviceW_impl_init_v3,comdat
	.weak	nvtxNameClDeviceW_impl_init_v3
	.hidden	nvtxNameClDeviceW_impl_init_v3
	.type	nvtxNameClDeviceW_impl_init_v3, @function
nvtxNameClDeviceW_impl_init_v3:
.LFB8518:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	240+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L563
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L563:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8518:
	.size	nvtxNameClDeviceW_impl_init_v3, .-nvtxNameClDeviceW_impl_init_v3
	.section	.text.nvtxNameClDeviceA_impl_init_v3,"axG",@progbits,nvtxNameClDeviceA_impl_init_v3,comdat
	.weak	nvtxNameClDeviceA_impl_init_v3
	.hidden	nvtxNameClDeviceA_impl_init_v3
	.type	nvtxNameClDeviceA_impl_init_v3, @function
nvtxNameClDeviceA_impl_init_v3:
.LFB8517:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	232+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L566
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L566:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8517:
	.size	nvtxNameClDeviceA_impl_init_v3, .-nvtxNameClDeviceA_impl_init_v3
	.section	.text.nvtxNameCuEventW_impl_init_v3,"axG",@progbits,nvtxNameCuEventW_impl_init_v3,comdat
	.weak	nvtxNameCuEventW_impl_init_v3
	.hidden	nvtxNameCuEventW_impl_init_v3
	.type	nvtxNameCuEventW_impl_init_v3, @function
nvtxNameCuEventW_impl_init_v3:
.LFB8510:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	224+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L569
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L569:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8510:
	.size	nvtxNameCuEventW_impl_init_v3, .-nvtxNameCuEventW_impl_init_v3
	.section	.text.nvtxNameCuEventA_impl_init_v3,"axG",@progbits,nvtxNameCuEventA_impl_init_v3,comdat
	.weak	nvtxNameCuEventA_impl_init_v3
	.hidden	nvtxNameCuEventA_impl_init_v3
	.type	nvtxNameCuEventA_impl_init_v3, @function
nvtxNameCuEventA_impl_init_v3:
.LFB8509:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	216+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L572
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L572:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8509:
	.size	nvtxNameCuEventA_impl_init_v3, .-nvtxNameCuEventA_impl_init_v3
	.section	.text.nvtxNameCuStreamW_impl_init_v3,"axG",@progbits,nvtxNameCuStreamW_impl_init_v3,comdat
	.weak	nvtxNameCuStreamW_impl_init_v3
	.hidden	nvtxNameCuStreamW_impl_init_v3
	.type	nvtxNameCuStreamW_impl_init_v3, @function
nvtxNameCuStreamW_impl_init_v3:
.LFB8508:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	208+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L575
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L575:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8508:
	.size	nvtxNameCuStreamW_impl_init_v3, .-nvtxNameCuStreamW_impl_init_v3
	.section	.text.nvtxNameCuStreamA_impl_init_v3,"axG",@progbits,nvtxNameCuStreamA_impl_init_v3,comdat
	.weak	nvtxNameCuStreamA_impl_init_v3
	.hidden	nvtxNameCuStreamA_impl_init_v3
	.type	nvtxNameCuStreamA_impl_init_v3, @function
nvtxNameCuStreamA_impl_init_v3:
.LFB8507:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	200+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L578
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L578:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8507:
	.size	nvtxNameCuStreamA_impl_init_v3, .-nvtxNameCuStreamA_impl_init_v3
	.section	.text.nvtxNameCuContextW_impl_init_v3,"axG",@progbits,nvtxNameCuContextW_impl_init_v3,comdat
	.weak	nvtxNameCuContextW_impl_init_v3
	.hidden	nvtxNameCuContextW_impl_init_v3
	.type	nvtxNameCuContextW_impl_init_v3, @function
nvtxNameCuContextW_impl_init_v3:
.LFB8506:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	192+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L581
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L581:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8506:
	.size	nvtxNameCuContextW_impl_init_v3, .-nvtxNameCuContextW_impl_init_v3
	.section	.text.nvtxNameCuContextA_impl_init_v3,"axG",@progbits,nvtxNameCuContextA_impl_init_v3,comdat
	.weak	nvtxNameCuContextA_impl_init_v3
	.hidden	nvtxNameCuContextA_impl_init_v3
	.type	nvtxNameCuContextA_impl_init_v3, @function
nvtxNameCuContextA_impl_init_v3:
.LFB8505:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	184+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L584
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L584:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8505:
	.size	nvtxNameCuContextA_impl_init_v3, .-nvtxNameCuContextA_impl_init_v3
	.section	.text.nvtxNameCuDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceW_impl_init_v3,comdat
	.weak	nvtxNameCuDeviceW_impl_init_v3
	.hidden	nvtxNameCuDeviceW_impl_init_v3
	.type	nvtxNameCuDeviceW_impl_init_v3, @function
nvtxNameCuDeviceW_impl_init_v3:
.LFB8504:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	176+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L587
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L587:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8504:
	.size	nvtxNameCuDeviceW_impl_init_v3, .-nvtxNameCuDeviceW_impl_init_v3
	.section	.text.nvtxNameCuDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceA_impl_init_v3,comdat
	.weak	nvtxNameCuDeviceA_impl_init_v3
	.hidden	nvtxNameCuDeviceA_impl_init_v3
	.type	nvtxNameCuDeviceA_impl_init_v3, @function
nvtxNameCuDeviceA_impl_init_v3:
.LFB8503:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	168+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L590
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L590:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8503:
	.size	nvtxNameCuDeviceA_impl_init_v3, .-nvtxNameCuDeviceA_impl_init_v3
	.section	.text.nvtxNameOsThreadW_impl_init_v3,"axG",@progbits,nvtxNameOsThreadW_impl_init_v3,comdat
	.weak	nvtxNameOsThreadW_impl_init_v3
	.hidden	nvtxNameOsThreadW_impl_init_v3
	.type	nvtxNameOsThreadW_impl_init_v3, @function
nvtxNameOsThreadW_impl_init_v3:
.LFB8487:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	160+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L593
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L593:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8487:
	.size	nvtxNameOsThreadW_impl_init_v3, .-nvtxNameOsThreadW_impl_init_v3
	.section	.text.nvtxNameOsThreadA_impl_init_v3,"axG",@progbits,nvtxNameOsThreadA_impl_init_v3,comdat
	.weak	nvtxNameOsThreadA_impl_init_v3
	.hidden	nvtxNameOsThreadA_impl_init_v3
	.type	nvtxNameOsThreadA_impl_init_v3, @function
nvtxNameOsThreadA_impl_init_v3:
.LFB8486:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	152+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L596
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L596:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8486:
	.size	nvtxNameOsThreadA_impl_init_v3, .-nvtxNameOsThreadA_impl_init_v3
	.section	.text.nvtxNameCategoryW_impl_init_v3,"axG",@progbits,nvtxNameCategoryW_impl_init_v3,comdat
	.weak	nvtxNameCategoryW_impl_init_v3
	.hidden	nvtxNameCategoryW_impl_init_v3
	.type	nvtxNameCategoryW_impl_init_v3, @function
nvtxNameCategoryW_impl_init_v3:
.LFB8485:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	144+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L599
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L599:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8485:
	.size	nvtxNameCategoryW_impl_init_v3, .-nvtxNameCategoryW_impl_init_v3
	.section	.text.nvtxNameCategoryA_impl_init_v3,"axG",@progbits,nvtxNameCategoryA_impl_init_v3,comdat
	.weak	nvtxNameCategoryA_impl_init_v3
	.hidden	nvtxNameCategoryA_impl_init_v3
	.type	nvtxNameCategoryA_impl_init_v3, @function
nvtxNameCategoryA_impl_init_v3:
.LFB8484:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	136+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L602
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L602:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8484:
	.size	nvtxNameCategoryA_impl_init_v3, .-nvtxNameCategoryA_impl_init_v3
	.section	.text.nvtxRangePop_impl_init_v3,"axG",@progbits,nvtxRangePop_impl_init_v3,comdat
	.weak	nvtxRangePop_impl_init_v3
	.hidden	nvtxRangePop_impl_init_v3
	.type	nvtxRangePop_impl_init_v3, @function
nvtxRangePop_impl_init_v3:
.LFB8483:
	.cfi_startproc
	endbr64
	pushq	%rsi
	.cfi_def_cfa_offset 16
	call	nvtxInitOnce_v3
	movq	128+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L606
	popq	%rcx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L606:
	.cfi_restore_state
	movl	$-2, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8483:
	.size	nvtxRangePop_impl_init_v3, .-nvtxRangePop_impl_init_v3
	.section	.text.nvtxRangePushW_impl_init_v3,"axG",@progbits,nvtxRangePushW_impl_init_v3,comdat
	.weak	nvtxRangePushW_impl_init_v3
	.hidden	nvtxRangePushW_impl_init_v3
	.type	nvtxRangePushW_impl_init_v3, @function
nvtxRangePushW_impl_init_v3:
.LFB8482:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	120+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L609
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L609:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8482:
	.size	nvtxRangePushW_impl_init_v3, .-nvtxRangePushW_impl_init_v3
	.section	.text.nvtxRangePushA_impl_init_v3,"axG",@progbits,nvtxRangePushA_impl_init_v3,comdat
	.weak	nvtxRangePushA_impl_init_v3
	.hidden	nvtxRangePushA_impl_init_v3
	.type	nvtxRangePushA_impl_init_v3, @function
nvtxRangePushA_impl_init_v3:
.LFB8481:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	112+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L612
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L612:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8481:
	.size	nvtxRangePushA_impl_init_v3, .-nvtxRangePushA_impl_init_v3
	.section	.text.nvtxRangePushEx_impl_init_v3,"axG",@progbits,nvtxRangePushEx_impl_init_v3,comdat
	.weak	nvtxRangePushEx_impl_init_v3
	.hidden	nvtxRangePushEx_impl_init_v3
	.type	nvtxRangePushEx_impl_init_v3, @function
nvtxRangePushEx_impl_init_v3:
.LFB8480:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	104+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L615
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L615:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8480:
	.size	nvtxRangePushEx_impl_init_v3, .-nvtxRangePushEx_impl_init_v3
	.section	.text.nvtxRangeEnd_impl_init_v3,"axG",@progbits,nvtxRangeEnd_impl_init_v3,comdat
	.weak	nvtxRangeEnd_impl_init_v3
	.hidden	nvtxRangeEnd_impl_init_v3
	.type	nvtxRangeEnd_impl_init_v3, @function
nvtxRangeEnd_impl_init_v3:
.LFB8479:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	96+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L617
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L617:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8479:
	.size	nvtxRangeEnd_impl_init_v3, .-nvtxRangeEnd_impl_init_v3
	.section	.text.nvtxRangeStartW_impl_init_v3,"axG",@progbits,nvtxRangeStartW_impl_init_v3,comdat
	.weak	nvtxRangeStartW_impl_init_v3
	.hidden	nvtxRangeStartW_impl_init_v3
	.type	nvtxRangeStartW_impl_init_v3, @function
nvtxRangeStartW_impl_init_v3:
.LFB8478:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	88+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L621
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L621:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8478:
	.size	nvtxRangeStartW_impl_init_v3, .-nvtxRangeStartW_impl_init_v3
	.section	.text.nvtxRangeStartA_impl_init_v3,"axG",@progbits,nvtxRangeStartA_impl_init_v3,comdat
	.weak	nvtxRangeStartA_impl_init_v3
	.hidden	nvtxRangeStartA_impl_init_v3
	.type	nvtxRangeStartA_impl_init_v3, @function
nvtxRangeStartA_impl_init_v3:
.LFB8477:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	80+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L624
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L624:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8477:
	.size	nvtxRangeStartA_impl_init_v3, .-nvtxRangeStartA_impl_init_v3
	.section	.text.nvtxRangeStartEx_impl_init_v3,"axG",@progbits,nvtxRangeStartEx_impl_init_v3,comdat
	.weak	nvtxRangeStartEx_impl_init_v3
	.hidden	nvtxRangeStartEx_impl_init_v3
	.type	nvtxRangeStartEx_impl_init_v3, @function
nvtxRangeStartEx_impl_init_v3:
.LFB8476:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	72+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L627
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L627:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8476:
	.size	nvtxRangeStartEx_impl_init_v3, .-nvtxRangeStartEx_impl_init_v3
	.section	.text.nvtxMarkW_impl_init_v3,"axG",@progbits,nvtxMarkW_impl_init_v3,comdat
	.weak	nvtxMarkW_impl_init_v3
	.hidden	nvtxMarkW_impl_init_v3
	.type	nvtxMarkW_impl_init_v3, @function
nvtxMarkW_impl_init_v3:
.LFB8475:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	64+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L629
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L629:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8475:
	.size	nvtxMarkW_impl_init_v3, .-nvtxMarkW_impl_init_v3
	.section	.text.nvtxMarkA_impl_init_v3,"axG",@progbits,nvtxMarkA_impl_init_v3,comdat
	.weak	nvtxMarkA_impl_init_v3
	.hidden	nvtxMarkA_impl_init_v3
	.type	nvtxMarkA_impl_init_v3, @function
nvtxMarkA_impl_init_v3:
.LFB8474:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	56+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L632
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L632:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8474:
	.size	nvtxMarkA_impl_init_v3, .-nvtxMarkA_impl_init_v3
	.section	.text.nvtxMarkEx_impl_init_v3,"axG",@progbits,nvtxMarkEx_impl_init_v3,comdat
	.weak	nvtxMarkEx_impl_init_v3
	.hidden	nvtxMarkEx_impl_init_v3
	.type	nvtxMarkEx_impl_init_v3, @function
nvtxMarkEx_impl_init_v3:
.LFB8473:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	48+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L635
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L635:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8473:
	.size	nvtxMarkEx_impl_init_v3, .-nvtxMarkEx_impl_init_v3
	.section	.rodata.str1.1
.LC6:
	.string	"Device does not handle overlaps so streams are not possible\n"
.LC7:
	.string	"Devices Found\n"
.LC8:
	.string	"No devices found or error in reading the number of devices\n"
.LC9:
	.string	"Device Number:"
.LC10:
	.string	"  Device name: "
.LC11:
	.string	"  Device Global Memory size: "
.LC12:
	.string	"MB \n"
	.text
	.globl	_Z15Get_GPU_devicesv
	.type	_Z15Get_GPU_devicesv, @function
_Z15Get_GPU_devicesv:
.LFB11171:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	leaq	_ZSt4cout(%rip), %rbx
	subq	$2080, %rsp
	.cfi_def_cfa_offset 2128
	movq	%fs:40, %rax
	movq	%rax, 2072(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaGetDevice@PLT
	movl	$189, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movl	(%rsp), %esi
	leaq	8(%rsp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	$190, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	cmpl	$0, 392(%rsp)
	leaq	.LC6(%rip), %rsi
	je	.L647
	xorl	%eax, %eax
	leaq	4(%rsp), %rdi
	movl	%eax, 4(%rsp)
	call	cudaGetDeviceCount@PLT
	movl	$199, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movl	4(%rsp), %esi
	testl	%esi, %esi
	jle	.L641
	movq	%rbx, %rdi
	xorl	%ebp, %ebp
	leaq	.LC9(%rip), %r12
	call	_ZNSolsEi@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L642
.L641:
	leaq	.LC8(%rip), %rsi
.L647:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%eax, %eax
	jmp	.L638
.L642:
	movl	4(%rsp), %eax
	cmpl	%ebp, %eax
	jle	.L638
	leaq	1040(%rsp), %r14
	movl	%ebp, %esi
	leaq	.LC3(%rip), %r13
	movq	%r14, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	$209, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	%r12, %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	incl	%ebp
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC10(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC11(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1000000, %ecx
	xorl	%edx, %edx
	movq	%rax, %rdi
	movq	1328(%rsp), %rax
	divq	%rcx
	movq	%rax, %rsi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC12(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r13, %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L642
.L638:
	movq	2072(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L645
	call	__stack_chk_fail@PLT
.L645:
	addq	$2080, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11171:
	.size	_Z15Get_GPU_devicesv, .-_Z15Get_GPU_devicesv
	.globl	_Z44__device_stub__Z9getMatrixPfS_S_S_S_S_S_mmiiPfS_S_S_S_S_S_mmii
	.type	_Z44__device_stub__Z9getMatrixPfS_S_S_S_S_S_mmiiPfS_S_S_S_S_S_mmii, @function
_Z44__device_stub__Z9getMatrixPfS_S_S_S_S_S_mmiiPfS_S_S_S_S_S_mmii:
.LFB11198:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	240(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	264(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L648
	pushq	72(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z9getMatrixPfS_S_S_S_S_S_mmii(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 256
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L648:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L650
	call	__stack_chk_fail@PLT
.L650:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11198:
	.size	_Z44__device_stub__Z9getMatrixPfS_S_S_S_S_S_mmiiPfS_S_S_S_S_S_mmii, .-_Z44__device_stub__Z9getMatrixPfS_S_S_S_S_S_mmiiPfS_S_S_S_S_S_mmii
	.globl	_Z9getMatrixPfS_S_S_S_S_S_mmii
	.type	_Z9getMatrixPfS_S_S_S_S_S_mmii, @function
_Z9getMatrixPfS_S_S_S_S_S_mmii:
.LFB11199:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z9getMatrixPfS_S_S_S_S_S_mmiiPfS_S_S_S_S_S_mmii
	.cfi_endproc
.LFE11199:
	.size	_Z9getMatrixPfS_S_S_S_S_S_mmii, .-_Z9getMatrixPfS_S_S_S_S_S_mmii
	.section	.rodata.str1.1
.LC13:
	.string	"\tArguments needed = 9; Provided = %d\n"
.LC14:
	.string	"Usage: ./Executable -i InputDataFileName -d Delimiter -r Radius -w WindowSize\n"
.LC15:
	.string	"Exiting program\n"
.LC16:
	.string	"Usage: Executable -i InputDataFileName -d Delimiter -r Radius -w WindowSize\n"
.LC17:
	.string	"i:d:r:w:"
.LC18:
	.string	"space"
.LC19:
	.string	"Space"
.LC20:
	.string	"tab"
.LC21:
	.string	"Tab"
.LC22:
	.string	"Delimiter: %c\n"
.LC23:
	.string	"Radius is %d\n"
.LC24:
	.string	"Input file name is: %s\n"
.LC25:
	.string	"w"
.LC26:
	.string	"inpCheck.txt"
.LC27:
	.string	"Cannot open inpcheck.txt file"
.LC28:
	.string	"r"
.LC29:
	.string	"Cannot open file:"
.LC30:
	.string	"\nCheck if file exists.\n"
.LC31:
	.string	"outputDataAni_First.txt"
.LC32:
	.string	"outputDataAni_Rad_div_10.txt"
.LC33:
	.string	"outputDataAni_Rad_div_2.txt"
.LC34:
	.string	"outputDataAni_Last.txt"
.LC35:
	.string	"Cannot open Anisotropy file"
.LC36:
	.string	"outputDataAzi_First.txt"
.LC37:
	.string	"outputDataAzi_Rad_div_10.txt"
.LC38:
	.string	"outputDataAzi_Rad_div_2.txt"
.LC39:
	.string	"outputDataAzi_Last.txt"
.LC40:
	.string	"Cannot open Azimuth file"
.LC41:
	.string	"(XSIZE,YSIZE)::"
.LC42:
	.string	"("
.LC43:
	.string	","
.LC44:
	.string	")"
.LC45:
	.string	"Cannot open file: %s\nCheck if file exists\n"
.LC46:
	.string	"Working1\n"
.LC47:
	.string	"Working2\n"
.LC48:
	.string	"%d "
.LC49:
	.string	"%d\n"
.LC53:
	.string	"success\n"
.LC54:
	.string	"unsuccessful\n"
.LC55:
	.string	"Hello1\n"
.LC56:
	.string	"Hello2\n"
.LC57:
	.string	"CUDA Device Synchronization Error:"
.LC58:
	.string	"CUDA Error:"
.LC59:
	.string	"Hello3\n"
.LC60:
	.string	"Hello4\n"
.LC61:
	.string	"Hello5\n"
.LC62:
	.string	"%f"
.LC63:
	.string	"\t"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB11172:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	leaq	.LC17(%rip), %r12
	pushq	%rbx
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$344, %rsp
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	cmpl	$9, %edi
	je	.L654
	movl	%edi, %edx
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L655
.L664:
	cmpl	$114, %r13d
	je	.L656
	jg	.L657
	cmpl	$100, %r13d
	je	.L658
	cmpl	$105, %r13d
	jne	.L660
	leaq	-76(%rbp), %rdi
	movl	$20, %edx
.L726:
	movq	optarg(%rip), %rsi
	call	__strcpy_chk@PLT
.L654:
	movq	%r12, %rdx
	movq	%rbx, %rsi
	movl	$9, %edi
	call	getopt@PLT
	movl	%eax, %r13d
	cmpl	$-1, %eax
	jne	.L664
	jmp	.L732
.L657:
	cmpl	$119, %r13d
	jne	.L660
	movq	optarg(%rip), %rdi
	call	atoi@PLT
	movl	%eax, -356(%rbp)
	jmp	.L654
.L658:
	leaq	-86(%rbp), %rdi
	movl	$10, %edx
	jmp	.L726
.L656:
	movq	optarg(%rip), %rdi
	call	atoi@PLT
	movl	%eax, -204(%rbp)
	jmp	.L654
.L660:
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L731
.L732:
	leaq	-86(%rbp), %r14
	leaq	.LC18(%rip), %rsi
	movb	$32, %r12b
	movq	%r14, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	je	.L665
	leaq	.LC19(%rip), %rsi
	movq	%r14, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	je	.L665
	leaq	.LC20(%rip), %rsi
	movq	%r14, %rdi
	movb	$9, %r12b
	call	strcmp@PLT
	testl	%eax, %eax
	je	.L665
	leaq	.LC21(%rip), %rsi
	movq	%r14, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	je	.L665
	movb	-86(%rbp), %r12b
.L665:
	movsbl	%r12b, %edx
	leaq	.LC22(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	-76(%rbp), %r12
	movl	$2, %edi
	xorl	%eax, %eax
	movl	-204(%rbp), %edx
	leaq	.LC23(%rip), %rsi
	leaq	.LC25(%rip), %r14
	call	__printf_chk@PLT
	movq	%r12, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC24(%rip), %rsi
	call	__printf_chk@PLT
	movl	$524288000, %esi
	movl	$1, %edi
	call	cudaDeviceSetLimit@PLT
	leaq	-184(%rbp), %rdi
	movl	$1, %esi
	call	cudaDeviceGetLimit@PLT
	leaq	.LC26(%rip), %rdi
	movq	%r14, %rsi
	call	fopen@PLT
	leaq	.LC27(%rip), %rdi
	movq	%rax, -304(%rbp)
	testq	%rax, %rax
	je	.L730
	movq	%r12, %rdi
	leaq	.LC28(%rip), %rsi
	call	fopen@PLT
	movq	%rax, %r12
	testq	%rax, %rax
	jne	.L668
	leaq	.LC29(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	8(%rbx), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC30(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L731:
	movl	$1, %edi
	call	exit@PLT
.L668:
	movq	%r14, %rsi
	leaq	.LC31(%rip), %rdi
	call	fopen@PLT
	movq	%r14, %rsi
	leaq	.LC32(%rip), %rdi
	movq	%rax, -232(%rbp)
	call	fopen@PLT
	movq	%r14, %rsi
	leaq	.LC33(%rip), %rdi
	movq	%rax, -240(%rbp)
	call	fopen@PLT
	movq	%r14, %rsi
	leaq	.LC34(%rip), %rdi
	movq	%rax, -248(%rbp)
	call	fopen@PLT
	cmpq	$0, -232(%rbp)
	movq	%rax, -256(%rbp)
	je	.L669
	cmpq	$0, -240(%rbp)
	je	.L669
	cmpq	$0, -248(%rbp)
	je	.L669
	testq	%rax, %rax
	jne	.L670
.L669:
	leaq	.LC35(%rip), %rdi
	jmp	.L730
.L670:
	movq	%r14, %rsi
	leaq	.LC36(%rip), %rdi
	call	fopen@PLT
	movq	%r14, %rsi
	leaq	.LC37(%rip), %rdi
	movq	%rax, -264(%rbp)
	call	fopen@PLT
	movq	%r14, %rsi
	leaq	.LC38(%rip), %rdi
	movq	%rax, -272(%rbp)
	call	fopen@PLT
	movq	%r14, %rsi
	leaq	.LC39(%rip), %rdi
	movq	%rax, -280(%rbp)
	call	fopen@PLT
	cmpq	$0, -264(%rbp)
	movq	%rax, -288(%rbp)
	je	.L673
	cmpq	$0, -272(%rbp)
	je	.L673
	cmpq	$0, -280(%rbp)
	je	.L673
	testq	%rax, %rax
	jne	.L674
.L673:
	leaq	.LC40(%rip), %rdi
.L730:
	call	perror@PLT
	jmp	.L653
.L674:
	movl	$958593, %edi
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
	call	malloc@PLT
	movq	%r12, %rcx
	movl	$958593, %edx
	movl	$958593, %esi
	movq	%r14, (%rax)
	movq	%rax, %rdi
	movq	%rax, %r13
	call	__fgets_chk@PLT
.L676:
	movb	0(%r13), %al
	leaq	1(%r15), %rcx
	movq	%rcx, -200(%rbp)
	testb	%al, %al
	je	.L733
	incq	%r13
	cmpb	$32, %al
	cmove	-200(%rbp), %r15
	jmp	.L676
.L733:
	xorl	%r13d, %r13d
.L682:
	movq	%r12, %rdi
	call	fgetc@PLT
	cmpl	$10, %eax
	jne	.L679
	incq	%r13
	jmp	.L682
.L679:
	incl	%eax
	jne	.L682
	leaq	1(%r13), %rax
	movq	%r12, %rdi
	leaq	.LC43(%rip), %r14
	movq	%rax, -216(%rbp)
	leaq	.LC44(%rip), %r13
	leaq	.LC3(%rip), %r12
	call	fclose@PLT
	leaq	.LC41(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC42(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-200(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-216(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	-76(%rbp), %rdi
	leaq	.LC28(%rip), %rsi
	call	fopen@PLT
	movq	%rax, -320(%rbp)
	testq	%rax, %rax
	jne	.L683
	movq	8(%rbx), %rdx
	leaq	.LC45(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L731
.L683:
	leaq	.LC41(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC42(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-200(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-216(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1, %edx
	movl	$144, %esi
	leaq	512(%r15), %rax
	leaq	-152(%rbp), %rdi
	movq	%rax, -336(%rbp)
	call	cudaMallocManaged@PLT
	movl	$379, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	-216(%rbp), %rbx
	movq	-200(%rbp), %rax
	movl	$1, %edx
	leaq	-176(%rbp), %rdi
	imulq	%rax, %rbx
	leaq	0(,%rbx,4), %rsi
	call	cudaMallocManaged@PLT
	movl	$380, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movslq	-204(%rbp), %rax
	movl	$1, %edx
	leaq	-168(%rbp), %rdi
	imulq	%rax, %rbx
	movq	%rax, -224(%rbp)
	salq	$2, %rbx
	movq	%rbx, %rsi
	call	cudaMallocManaged@PLT
	movl	$381, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movl	$1, %edx
	movq	%rbx, %rsi
	leaq	-160(%rbp), %rdi
	call	cudaMallocManaged@PLT
	movl	$382, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	-336(%rbp), %rax
	movl	$1, %edx
	movq	-216(%rbp), %rcx
	movq	-224(%rbp), %r13
	leaq	-144(%rbp), %rdi
	andq	$-512, %rax
	imulq	%rcx, %rax
	imulq	%rax, %r13
	leaq	0(,%r13,4), %rbx
	movq	%rbx, %rsi
	call	cudaMallocManaged@PLT
	movl	$384, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movl	$1, %edx
	leaq	-136(%rbp), %rdi
	movq	%rbx, %rsi
	call	cudaMallocManaged@PLT
	movl	$385, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movl	$1, %edx
	leaq	-128(%rbp), %rdi
	movq	%rbx, %rsi
	call	cudaMallocManaged@PLT
	movl	$386, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	imulq	$11, -200(%rbp), %rax
	movq	%rsp, -368(%rbp)
	leaq	1(%rax), %rcx
	addq	$16, %rax
	movq	%rax, %rdx
	movq	%rcx, -328(%rbp)
	andq	$-4096, %rax
	movq	%rsp, %rcx
	andq	$-16, %rdx
	subq	%rax, %rcx
.L684:
	cmpq	%rcx, %rsp
	je	.L685
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L684
.L685:
	movq	%rdx, %rax
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L686
	orq	$0, -8(%rsp,%rax)
.L686:
	movq	-328(%rbp), %rcx
	xorl	%esi, %esi
	movq	%rsp, %rdi
	xorl	%ebx, %ebx
	movq	%rsp, -352(%rbp)
	movq	%rcx, %rdx
	call	__memset_chk@PLT
	leaq	.LC46(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movl	%ebx, -91(%rbp)
	movb	$0, -87(%rbp)
	xorl	%ebx, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	imull	$11, -200(%rbp), %eax
	incl	%eax
	movl	%eax, -208(%rbp)
.L687:
	movq	-320(%rbp), %rcx
	movl	-208(%rbp), %edx
	movq	-328(%rbp), %rsi
	movq	-352(%rbp), %rdi
	call	__fgets_chk@PLT
	testq	%rax, %rax
	je	.L734
	leaq	.LC47(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	xorl	%r12d, %r12d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-352(%rbp), %rax
	leaq	0(,%rbx,4), %r14
	movq	%rax, -296(%rbp)
.L688:
	movq	-200(%rbp), %rax
	cmpq	%rax, %r12
	je	.L735
	leaq	-91(%rbp), %rax
	xorl	%r11d, %r11d
	movb	$0, -87(%rbp)
	movq	%rax, -312(%rbp)
	movq	-176(%rbp), %rax
	movl	%r11d, -91(%rbp)
	addq	%r14, %rax
	movq	%rax, -344(%rbp)
	cmpq	%r15, %r12
	je	.L689
	movq	-296(%rbp), %rdi
	movl	$32, %esi
	call	strchr@PLT
	movq	-312(%rbp), %rdi
	movl	$5, %ecx
	movq	%rax, -376(%rbp)
	movq	%rax, %rdx
	movq	-296(%rbp), %rax
	subq	%rax, %rdx
	movq	%rax, %rsi
	call	__strncpy_chk@PLT
	movq	-312(%rbp), %rdi
	call	atoi@PLT
	movq	-304(%rbp), %rdi
	movl	$2, %esi
	leaq	.LC48(%rip), %rdx
	cvtsi2ssl	%eax, %xmm0
	movl	%eax, %ecx
	movq	-344(%rbp), %rax
	movss	%xmm0, (%rax)
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movq	-376(%rbp), %r8
	leaq	1(%r8), %rax
	movq	%rax, -296(%rbp)
	jmp	.L690
.L689:
	movq	-296(%rbp), %rsi
	movq	-312(%rbp), %rdi
	movl	$5, %edx
	call	__strcpy_chk@PLT
	movq	-312(%rbp), %rdi
	call	atoi@PLT
	movq	-304(%rbp), %rdi
	movl	$2, %esi
	leaq	.LC49(%rip), %rdx
	cvtsi2ssl	%eax, %xmm0
	movl	%eax, %ecx
	movq	-344(%rbp), %rax
	movss	%xmm0, (%rax)
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L690:
	incq	%r12
	addq	$4, %r14
	jmp	.L688
.L735:
	addq	%rax, %rbx
	jmp	.L687
.L734:
	movq	-152(%rbp), %rdx
	movsd	.LC50(%rip), %xmm2
	movsd	.LC51(%rip), %xmm1
.L693:
	leal	(%rax,%rax,4), %ecx
	cvtsi2sdl	%ecx, %xmm0
	mulsd	%xmm2, %xmm0
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	cmpq	$36, %rax
	jne	.L693
	movq	-144(%rbp), %rdx
	movq	-128(%rbp), %rcx
	xorl	%eax, %eax
	movq	-136(%rbp), %rsi
	movss	.LC52(%rip), %xmm0
.L694:
	cmpq	%rax, %r13
	jle	.L736
	movss	%xmm0, (%rdx,%rax,4)
	movss	%xmm0, (%rcx,%rax,4)
	movss	%xmm0, (%rsi,%rax,4)
	incq	%rax
	jmp	.L694
.L736:
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	leaq	.LC53(%rip), %rsi
	testl	%eax, %eax
	je	.L727
	leaq	.LC54(%rip), %rsi
.L727:
	leaq	_ZSt4cout(%rip), %rdi
	leaq	_ZSt4cout(%rip), %rbx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC55(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-336(%rbp), %rax
	movq	%rbx, %rdi
	leaq	.LC56(%rip), %rsi
	movl	$1, -108(%rbp)
	shrq	$9, %rax
	movl	$1, -96(%rbp)
	movl	%eax, -116(%rbp)
	movl	-216(%rbp), %eax
	movl	%eax, -112(%rbp)
	movl	$8388609, %eax
	salq	$9, %rax
	movq	%rax, -104(%rbp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	-96(%rbp), %ecx
	movq	-104(%rbp), %rdx
	xorl	%r9d, %r9d
	movq	-116(%rbp), %rdi
	movl	-108(%rbp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L698
	movq	-136(%rbp), %r9
	movq	-144(%rbp), %r8
	movq	-160(%rbp), %rcx
	movq	-168(%rbp), %rdx
	movq	-152(%rbp), %rsi
	movq	-176(%rbp), %rdi
	pushq	%r10
	movl	-356(%rbp), %eax
	pushq	%rax
	movl	-204(%rbp), %eax
	pushq	%rax
	pushq	-216(%rbp)
	pushq	-200(%rbp)
	pushq	-128(%rbp)
	call	_Z44__device_stub__Z9getMatrixPfS_S_S_S_S_S_mmiiPfS_S_S_S_S_S_mmii
	addq	$48, %rsp
.L698:
	call	cudaDeviceSynchronize@PLT
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC57(%rip), %rsi
	testl	%eax, %eax
	movl	%eax, %r12d
	jne	.L729
	call	cudaGetLastError@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L701
	leaq	.LC58(%rip), %rsi
.L729:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L700
.L701:
	leaq	.LC59(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC60(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC61(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-224(%rbp), %rax
	xorl	%edx, %edx
	xorl	%r8d, %r8d
	movq	-200(%rbp), %rcx
	movq	%rdx, -312(%rbp)
	imulq	%rcx, %rax
	movq	%rax, -328(%rbp)
.L702:
	movq	-216(%rbp), %rax
	cmpq	%rax, %r8
	jnb	.L706
	xorl	%eax, %eax
	xorl	%r14d, %r14d
	movl	%eax, -296(%rbp)
.L707:
	movq	-200(%rbp), %rax
	cmpq	%rax, %r14
	je	.L737
	movq	-216(%rbp), %rax
	movq	-224(%rbp), %rcx
	subq	%rcx, %rax
	decq	%rax
	cmpq	%r8, %rax
	jb	.L703
	cmpl	%r8d, -204(%rbp)
	jg	.L703
	movq	-200(%rbp), %rsi
	subq	%rcx, %rsi
	decq	%rsi
	cmpq	%r14, %rsi
	jb	.L703
	cmpl	%r14d, -204(%rbp)
	jg	.L703
	movq	-312(%rbp), %rax
	movslq	-296(%rbp), %r15
	movl	$10, %edi
	movq	%r8, -336(%rbp)
	addq	%rax, %r15
	movq	-168(%rbp), %rax
	leaq	(%rcx,%r15), %r13
	cvtss2sd	(%rax,%r15,4), %xmm0
	movl	-204(%rbp), %eax
	salq	$2, %r13
	cltd
	idivl	%edi
	movl	$2, %edi
	movslq	%eax, %r12
	movl	-204(%rbp), %eax
	addq	%r15, %r12
	cltd
	salq	$2, %r12
	idivl	%edi
	movq	-232(%rbp), %rdi
	leaq	.LC62(%rip), %rdx
	movslq	%eax, %rbx
	movb	$1, %al
	addq	%r15, %rbx
	salq	$2, %rbx
	cmpq	%r14, %rsi
	movl	$2, %esi
	jne	.L704
	call	__fprintf_chk@PLT
	movq	-160(%rbp), %rax
	movl	$2, %esi
	movq	-264(%rbp), %rdi
	leaq	.LC62(%rip), %rdx
	cvtss2sd	(%rax,%r15,4), %xmm0
	movb	$1, %al
	leaq	.LC3(%rip), %r15
	call	__fprintf_chk@PLT
	jmp	.L728
.L704:
	call	__fprintf_chk@PLT
	movq	-160(%rbp), %rax
	movl	$2, %esi
	movq	-264(%rbp), %rdi
	leaq	.LC62(%rip), %rdx
	cvtss2sd	(%rax,%r15,4), %xmm0
	movb	$1, %al
	leaq	.LC63(%rip), %r15
	call	__fprintf_chk@PLT
.L728:
	movq	-232(%rbp), %rdi
	movq	%r15, %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movq	%r15, %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	movq	-264(%rbp), %rdi
	call	__fprintf_chk@PLT
	movq	-168(%rbp), %rax
	movl	$2, %esi
	movq	-240(%rbp), %rdi
	leaq	.LC62(%rip), %rdx
	cvtss2sd	-4(%rax,%r12), %xmm0
	movb	$1, %al
	call	__fprintf_chk@PLT
	movq	-160(%rbp), %rax
	movl	$2, %esi
	movq	-272(%rbp), %rdi
	leaq	.LC62(%rip), %rdx
	cvtss2sd	-4(%rax,%r12), %xmm0
	movb	$1, %al
	call	__fprintf_chk@PLT
	movq	%r15, %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	movq	-240(%rbp), %rdi
	call	__fprintf_chk@PLT
	movq	%r15, %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	movq	-272(%rbp), %rdi
	call	__fprintf_chk@PLT
	movq	-168(%rbp), %rax
	movl	$2, %esi
	movq	-248(%rbp), %rdi
	leaq	.LC62(%rip), %rdx
	cvtss2sd	-4(%rax,%rbx), %xmm0
	movb	$1, %al
	call	__fprintf_chk@PLT
	movq	-160(%rbp), %rax
	movl	$2, %esi
	movq	-280(%rbp), %rdi
	leaq	.LC62(%rip), %rdx
	cvtss2sd	-4(%rax,%rbx), %xmm0
	movb	$1, %al
	call	__fprintf_chk@PLT
	movq	%r15, %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	movq	-248(%rbp), %rdi
	call	__fprintf_chk@PLT
	movq	%r15, %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	movq	-280(%rbp), %rdi
	call	__fprintf_chk@PLT
	movq	-168(%rbp), %rax
	movl	$2, %esi
	movq	-256(%rbp), %rdi
	leaq	.LC62(%rip), %rdx
	cvtss2sd	-4(%rax,%r13), %xmm0
	movb	$1, %al
	call	__fprintf_chk@PLT
	movq	-160(%rbp), %rax
	movl	$2, %esi
	movq	-288(%rbp), %rdi
	leaq	.LC62(%rip), %rdx
	cvtss2sd	-4(%rax,%r13), %xmm0
	movb	$1, %al
	call	__fprintf_chk@PLT
	movq	%r15, %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	movq	-256(%rbp), %rdi
	call	__fprintf_chk@PLT
	movq	%r15, %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	movq	-288(%rbp), %rdi
	call	__fprintf_chk@PLT
	movq	-336(%rbp), %r8
.L703:
	movl	-204(%rbp), %ecx
	incq	%r14
	addl	%ecx, -296(%rbp)
	jmp	.L707
.L737:
	movq	-328(%rbp), %rcx
	incq	%r8
	addq	%rcx, -312(%rbp)
	jmp	.L702
.L706:
	movq	-320(%rbp), %rdi
	call	fclose@PLT
	movq	-304(%rbp), %rdi
	call	fclose@PLT
	movq	-232(%rbp), %rdi
	call	fclose@PLT
	movq	-240(%rbp), %rdi
	call	fclose@PLT
	movq	-248(%rbp), %rdi
	call	fclose@PLT
	movq	-256(%rbp), %rdi
	call	fclose@PLT
	movq	-264(%rbp), %rdi
	call	fclose@PLT
	movq	-272(%rbp), %rdi
	call	fclose@PLT
	movq	-280(%rbp), %rdi
	call	fclose@PLT
	movq	-288(%rbp), %rdi
	call	fclose@PLT
	movq	-176(%rbp), %rdi
	call	cudaFree@PLT
	movq	-152(%rbp), %rdi
	call	cudaFree@PLT
	movq	-160(%rbp), %rdi
	call	cudaFree@PLT
	movq	-168(%rbp), %rdi
	call	cudaFree@PLT
	movq	-144(%rbp), %rdi
	call	cudaFree@PLT
	movq	-136(%rbp), %rdi
	call	cudaFree@PLT
	movq	-128(%rbp), %rdi
	call	cudaFree@PLT
.L700:
	movq	-368(%rbp), %rsp
.L655:
	xorl	%r13d, %r13d
.L653:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L708
	call	__stack_chk_fail@PLT
.L708:
	leaq	-40(%rbp), %rsp
	movl	%r13d, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11172:
	.size	main, .-main
	.section	.rodata.str1.1
.LC64:
	.string	"_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv"
.LC65:
	.string	"_Z9getMatrixPfS_S_S_S_S_S_mmii"
.LC66:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std3__45__cpo5beginE"
.LC67:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std3__45__cpo3endE"
.LC68:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std3__45__cpo6cbeginE"
.LC69:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std3__45__cpo4cendE"
.LC70:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std3__45__cpo6rbeginE"
.LC71:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std3__45__cpo4rendE"
.LC72:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std3__45__cpo7crbeginE"
.LC73:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std3__45__cpo5crendE"
.LC74:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std3__454_GLOBAL__N__b785e680_21_topo_UnifiedMemory_cu_8591ccb06ignoreE"
.LC75:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std3__419piecewise_constructE"
.LC76:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std3__48in_placeE"
.LC77:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std3__47nulloptE"
.LC78:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std3__420unreachable_sentinelE"
.LC79:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std6ranges3__45__cpo4swapE"
.LC80:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std6ranges3__45__cpo9iter_moveE"
.LC81:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std6ranges3__45__cpo7advanceE"
.LC82:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std6ranges3__45__cpo5beginE"
.LC83:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std6ranges3__45__cpo3endE"
.LC84:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std6ranges3__45__cpo6cbeginE"
.LC85:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std6ranges3__45__cpo4cendE"
.LC86:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std6ranges3__45__cpo9iter_swapE"
.LC87:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std6ranges3__45__cpo4nextE"
.LC88:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std6ranges3__45__cpo4prevE"
.LC89:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std6ranges3__45__cpo4dataE"
.LC90:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std6ranges3__45__cpo5cdataE"
.LC91:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std6ranges3__45__cpo4sizeE"
.LC92:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std6ranges3__45__cpo5ssizeE"
.LC93:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb04cuda3std6ranges3__45__cpo8distanceE"
.LC94:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb06thrust20THRUST_200700_890_NS8cuda_cub3parE"
.LC95:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb06thrust20THRUST_200700_890_NS8cuda_cub10par_nosyncE"
.LC96:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb06thrust20THRUST_200700_890_NS6system6detail10sequential3seqE"
.LC97:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb06thrust20THRUST_200700_890_NS12placeholders2_1E"
.LC98:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb06thrust20THRUST_200700_890_NS12placeholders2_2E"
.LC99:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb06thrust20THRUST_200700_890_NS12placeholders2_3E"
.LC100:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb06thrust20THRUST_200700_890_NS12placeholders2_4E"
.LC101:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb06thrust20THRUST_200700_890_NS12placeholders2_5E"
.LC102:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb06thrust20THRUST_200700_890_NS12placeholders2_6E"
.LC103:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb06thrust20THRUST_200700_890_NS12placeholders2_7E"
.LC104:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb06thrust20THRUST_200700_890_NS12placeholders2_8E"
.LC105:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb06thrust20THRUST_200700_890_NS12placeholders2_9E"
.LC106:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb06thrust20THRUST_200700_890_NS12placeholders3_10E"
.LC107:
	.string	"_ZN52_INTERNAL_b785e680_21_topo_UnifiedMemory_cu_8591ccb06thrust20THRUST_200700_890_NS3seqE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB11203:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC64(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC65(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9getMatrixPfS_S_S_S_S_S_mmii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC66(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo5beginE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC67(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo3endE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC68(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo6cbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC69(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo4cendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC70(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo6rbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC71(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo4rendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC72(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo7crbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC73(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo5crendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC74(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__454_GLOBAL__N__b785e680_21_topo_UnifiedMemory_cu_8591ccb06ignoreE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC75(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC76(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__48in_placeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC77(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__47nulloptE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC78(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__420unreachable_sentinelE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC79(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC80(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC81(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo7advanceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC82(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5beginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC83(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo3endE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC84(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo6cbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC85(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4cendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC86(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC87(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4nextE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC88(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4prevE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC89(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4dataE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC90(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5cdataE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC91(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4sizeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC92(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5ssizeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC93(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo8distanceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC94(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC95(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC96(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC97(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC98(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC99(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC100(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC101(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC102(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC103(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC104(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC105(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC106(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC107(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NSL3seqE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE11203:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__420unreachable_sentinelE
	.section	.rodata._ZN4cuda3std3__420unreachable_sentinelE,"aG",@progbits,_ZN4cuda3std3__420unreachable_sentinelE,comdat
	.type	_ZN4cuda3std3__420unreachable_sentinelE, @gnu_unique_object
	.size	_ZN4cuda3std3__420unreachable_sentinelE, 1
_ZN4cuda3std3__420unreachable_sentinelE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo5crendE
	.section	.rodata._ZN4cuda3std3__45__cpo5crendE,"aG",@progbits,_ZN4cuda3std3__45__cpo5crendE,comdat
	.type	_ZN4cuda3std3__45__cpo5crendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo5crendE, 1
_ZN4cuda3std3__45__cpo5crendE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo7crbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo7crbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo7crbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo7crbeginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo7crbeginE, 1
_ZN4cuda3std3__45__cpo7crbeginE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo4rendE
	.section	.rodata._ZN4cuda3std3__45__cpo4rendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4rendE,comdat
	.type	_ZN4cuda3std3__45__cpo4rendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo4rendE, 1
_ZN4cuda3std3__45__cpo4rendE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo6rbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo6rbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6rbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo6rbeginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo6rbeginE, 1
_ZN4cuda3std3__45__cpo6rbeginE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo8distanceE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo8distanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo8distanceE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo8distanceE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo8distanceE, 1
_ZN4cuda3std6ranges3__45__cpo8distanceE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo5ssizeE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo5ssizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5ssizeE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo5ssizeE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo5ssizeE, 1
_ZN4cuda3std6ranges3__45__cpo5ssizeE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4sizeE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4sizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4sizeE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4sizeE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4sizeE, 1
_ZN4cuda3std6ranges3__45__cpo4sizeE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo5cdataE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo5cdataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5cdataE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo5cdataE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo5cdataE, 1
_ZN4cuda3std6ranges3__45__cpo5cdataE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4dataE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4dataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4dataE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4dataE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4dataE, 1
_ZN4cuda3std6ranges3__45__cpo4dataE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4prevE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4prevE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4prevE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4prevE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4prevE, 1
_ZN4cuda3std6ranges3__45__cpo4prevE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4nextE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4nextE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4nextE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4nextE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4nextE, 1
_ZN4cuda3std6ranges3__45__cpo4nextE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_swapE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_swapE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4cendE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4cendE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4cendE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4cendE, 1
_ZN4cuda3std6ranges3__45__cpo4cendE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo6cbeginE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo6cbeginE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo6cbeginE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo6cbeginE, 1
_ZN4cuda3std6ranges3__45__cpo6cbeginE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo3endE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo3endE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo3endE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo3endE, 1
_ZN4cuda3std6ranges3__45__cpo3endE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo5beginE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5beginE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo5beginE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo5beginE, 1
_ZN4cuda3std6ranges3__45__cpo5beginE:
	.zero	1
	.weak	_ZN4cuda3std3__47nulloptE
	.section	.rodata._ZN4cuda3std3__47nulloptE,"aG",@progbits,_ZN4cuda3std3__47nulloptE,comdat
	.type	_ZN4cuda3std3__47nulloptE, @gnu_unique_object
	.size	_ZN4cuda3std3__47nulloptE, 1
_ZN4cuda3std3__47nulloptE:
	.zero	1
	.hidden	InitializeInjectionNvtx2_fnptr
	.weak	InitializeInjectionNvtx2_fnptr
	.bss
	.align 8
	.type	InitializeInjectionNvtx2_fnptr, @object
	.size	InitializeInjectionNvtx2_fnptr, 8
InitializeInjectionNvtx2_fnptr:
	.zero	8
	.hidden	nvtxGlobals_v3
	.weak	nvtxGlobals_v3
	.section	.data.rel.local,"aw"
	.align 32
	.type	nvtxGlobals_v3, @object
	.size	nvtxGlobals_v3, 1168
nvtxGlobals_v3:
	.long	0
	.zero	4
	.quad	16
	.quad	nvtxEtiGetModuleFunctionTable_v3
	.quad	24
	.long	3
	.long	0
	.quad	nvtxEtiSetInjectionNvtxVersion_v3
	.quad	nvtxMarkEx_impl_init_v3
	.quad	nvtxMarkA_impl_init_v3
	.quad	nvtxMarkW_impl_init_v3
	.quad	nvtxRangeStartEx_impl_init_v3
	.quad	nvtxRangeStartA_impl_init_v3
	.quad	nvtxRangeStartW_impl_init_v3
	.quad	nvtxRangeEnd_impl_init_v3
	.quad	nvtxRangePushEx_impl_init_v3
	.quad	nvtxRangePushA_impl_init_v3
	.quad	nvtxRangePushW_impl_init_v3
	.quad	nvtxRangePop_impl_init_v3
	.quad	nvtxNameCategoryA_impl_init_v3
	.quad	nvtxNameCategoryW_impl_init_v3
	.quad	nvtxNameOsThreadA_impl_init_v3
	.quad	nvtxNameOsThreadW_impl_init_v3
	.quad	nvtxNameCuDeviceA_impl_init_v3
	.quad	nvtxNameCuDeviceW_impl_init_v3
	.quad	nvtxNameCuContextA_impl_init_v3
	.quad	nvtxNameCuContextW_impl_init_v3
	.quad	nvtxNameCuStreamA_impl_init_v3
	.quad	nvtxNameCuStreamW_impl_init_v3
	.quad	nvtxNameCuEventA_impl_init_v3
	.quad	nvtxNameCuEventW_impl_init_v3
	.quad	nvtxNameClDeviceA_impl_init_v3
	.quad	nvtxNameClDeviceW_impl_init_v3
	.quad	nvtxNameClContextA_impl_init_v3
	.quad	nvtxNameClContextW_impl_init_v3
	.quad	nvtxNameClCommandQueueA_impl_init_v3
	.quad	nvtxNameClCommandQueueW_impl_init_v3
	.quad	nvtxNameClMemObjectA_impl_init_v3
	.quad	nvtxNameClMemObjectW_impl_init_v3
	.quad	nvtxNameClSamplerA_impl_init_v3
	.quad	nvtxNameClSamplerW_impl_init_v3
	.quad	nvtxNameClProgramA_impl_init_v3
	.quad	nvtxNameClProgramW_impl_init_v3
	.quad	nvtxNameClEventA_impl_init_v3
	.quad	nvtxNameClEventW_impl_init_v3
	.quad	nvtxNameCudaDeviceA_impl_init_v3
	.quad	nvtxNameCudaDeviceW_impl_init_v3
	.quad	nvtxNameCudaStreamA_impl_init_v3
	.quad	nvtxNameCudaStreamW_impl_init_v3
	.quad	nvtxNameCudaEventA_impl_init_v3
	.quad	nvtxNameCudaEventW_impl_init_v3
	.quad	nvtxDomainMarkEx_impl_init_v3
	.quad	nvtxDomainRangeStartEx_impl_init_v3
	.quad	nvtxDomainRangeEnd_impl_init_v3
	.quad	nvtxDomainRangePushEx_impl_init_v3
	.quad	nvtxDomainRangePop_impl_init_v3
	.quad	nvtxDomainResourceCreate_impl_init_v3
	.quad	nvtxDomainResourceDestroy_impl_init_v3
	.quad	nvtxDomainNameCategoryA_impl_init_v3
	.quad	nvtxDomainNameCategoryW_impl_init_v3
	.quad	nvtxDomainRegisterStringA_impl_init_v3
	.quad	nvtxDomainRegisterStringW_impl_init_v3
	.quad	nvtxDomainCreateA_impl_init_v3
	.quad	nvtxDomainCreateW_impl_init_v3
	.quad	nvtxDomainDestroy_impl_init_v3
	.quad	nvtxInitialize_impl_init_v3
	.quad	nvtxDomainSyncUserCreate_impl_init_v3
	.quad	nvtxDomainSyncUserDestroy_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.quad	nvtxDomainSyncUserReleasing_impl_init_v3
	.quad	0
	.quad	nvtxGlobals_v3+48
	.quad	nvtxGlobals_v3+56
	.quad	nvtxGlobals_v3+64
	.quad	nvtxGlobals_v3+72
	.quad	nvtxGlobals_v3+80
	.quad	nvtxGlobals_v3+88
	.quad	nvtxGlobals_v3+96
	.quad	nvtxGlobals_v3+104
	.quad	nvtxGlobals_v3+112
	.quad	nvtxGlobals_v3+120
	.quad	nvtxGlobals_v3+128
	.quad	nvtxGlobals_v3+136
	.quad	nvtxGlobals_v3+144
	.quad	nvtxGlobals_v3+152
	.quad	nvtxGlobals_v3+160
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+168
	.quad	nvtxGlobals_v3+176
	.quad	nvtxGlobals_v3+184
	.quad	nvtxGlobals_v3+192
	.quad	nvtxGlobals_v3+200
	.quad	nvtxGlobals_v3+208
	.quad	nvtxGlobals_v3+216
	.quad	nvtxGlobals_v3+224
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+232
	.quad	nvtxGlobals_v3+240
	.quad	nvtxGlobals_v3+248
	.quad	nvtxGlobals_v3+256
	.quad	nvtxGlobals_v3+264
	.quad	nvtxGlobals_v3+272
	.quad	nvtxGlobals_v3+280
	.quad	nvtxGlobals_v3+288
	.quad	nvtxGlobals_v3+296
	.quad	nvtxGlobals_v3+304
	.quad	nvtxGlobals_v3+312
	.quad	nvtxGlobals_v3+320
	.quad	nvtxGlobals_v3+328
	.quad	nvtxGlobals_v3+336
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+344
	.quad	nvtxGlobals_v3+352
	.quad	nvtxGlobals_v3+360
	.quad	nvtxGlobals_v3+368
	.quad	nvtxGlobals_v3+376
	.quad	nvtxGlobals_v3+384
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+392
	.quad	nvtxGlobals_v3+400
	.quad	nvtxGlobals_v3+408
	.quad	nvtxGlobals_v3+416
	.quad	nvtxGlobals_v3+424
	.quad	nvtxGlobals_v3+432
	.quad	nvtxGlobals_v3+440
	.quad	nvtxGlobals_v3+448
	.quad	nvtxGlobals_v3+456
	.quad	nvtxGlobals_v3+464
	.quad	nvtxGlobals_v3+472
	.quad	nvtxGlobals_v3+480
	.quad	nvtxGlobals_v3+488
	.quad	nvtxGlobals_v3+496
	.quad	nvtxGlobals_v3+504
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+512
	.quad	nvtxGlobals_v3+520
	.quad	nvtxGlobals_v3+528
	.quad	nvtxGlobals_v3+536
	.quad	nvtxGlobals_v3+544
	.quad	nvtxGlobals_v3+552
	.quad	0
	.section	.rodata
	.type	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, 1
_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, 1
_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NSL3seqE, @object
	.size	_ZN6thrust20THRUST_200700_890_NSL3seqE, 1
_ZN6thrust20THRUST_200700_890_NSL3seqE:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, 1
_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo7advanceE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo7advanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo7advanceE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo7advanceE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo7advanceE, 1
_ZN4cuda3std6ranges3__45__cpo7advanceE:
	.zero	1
	.hidden	_ZN4cuda3std3__454_GLOBAL__N__b785e680_21_topo_UnifiedMemory_cu_8591ccb06ignoreE
	.weak	_ZN4cuda3std3__454_GLOBAL__N__b785e680_21_topo_UnifiedMemory_cu_8591ccb06ignoreE
	.section	.rodata._ZN4cuda3std3__454_GLOBAL__N__b785e680_21_topo_UnifiedMemory_cu_8591ccb06ignoreE,"aG",@progbits,_ZN4cuda3std3__454_GLOBAL__N__b785e680_21_topo_UnifiedMemory_cu_8591ccb06ignoreE,comdat
	.type	_ZN4cuda3std3__454_GLOBAL__N__b785e680_21_topo_UnifiedMemory_cu_8591ccb06ignoreE, @gnu_unique_object
	.size	_ZN4cuda3std3__454_GLOBAL__N__b785e680_21_topo_UnifiedMemory_cu_8591ccb06ignoreE, 1
_ZN4cuda3std3__454_GLOBAL__N__b785e680_21_topo_UnifiedMemory_cu_8591ccb06ignoreE:
	.zero	1
	.weak	_ZN4cuda3std3__48in_placeE
	.section	.rodata._ZN4cuda3std3__48in_placeE,"aG",@progbits,_ZN4cuda3std3__48in_placeE,comdat
	.type	_ZN4cuda3std3__48in_placeE, @gnu_unique_object
	.size	_ZN4cuda3std3__48in_placeE, 1
_ZN4cuda3std3__48in_placeE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo4cendE
	.section	.rodata._ZN4cuda3std3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4cendE,comdat
	.type	_ZN4cuda3std3__45__cpo4cendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo4cendE, 1
_ZN4cuda3std3__45__cpo4cendE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo6cbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6cbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo6cbeginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo6cbeginE, 1
_ZN4cuda3std3__45__cpo6cbeginE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo3endE
	.section	.rodata._ZN4cuda3std3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std3__45__cpo3endE,comdat
	.type	_ZN4cuda3std3__45__cpo3endE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo3endE, 1
_ZN4cuda3std3__45__cpo3endE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo5beginE
	.section	.rodata._ZN4cuda3std3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std3__45__cpo5beginE,comdat
	.type	_ZN4cuda3std3__45__cpo5beginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo5beginE, 1
_ZN4cuda3std3__45__cpo5beginE:
	.zero	1
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC50:
	.long	1374389535
	.long	1074339512
	.align 8
.LC51:
	.long	0
	.long	1080459264
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC52:
	.long	2139095039
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:





#include <stdlib.h>
#include <math.h>
#include <unistd.h>
#include <ctype.h>
#include <getopt.h>
#include <string.h>

#include <stdio.h>
#include <cmath>
#include <float.h>
#include <hip/hip_runtime.h>

#include <iostream>
#include <thrust/device_vector.h>

using namespace std;

//Size of the GPU memory
#define GPU_MEMSIZE_GB		2

//For case in which XSIZE = 1201 and YSIZE = 801
#define GLOBAL_MEM_USE_MB	773
#define MEM_USE_PER_THREAD_B	1280

//MAX_XSIZE_POSSIBLE is the maximum size of x or max number of columns if there is only one row
#define MAX_XSIZE_POSSIBLE	floor(((GPU_MEMSIZE_GB * 1000 - GLOBAL_MEM_USE_MB)*1000000)/MEM_USE_PER_THREAD_B) 

#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))


//Always have even number of radius;and divisible by 10

#define	RADSTEP			1
#define ANGLESIZE		36	

#define PI 3.14

#define THREADS_PER_BLOCK	512

//#define FILENAME	"Annie_coastDEM.txt"
//---------------------------Function declarations--------------------------------------------------------------------------//

__global__ void getMatrix(float* data,float* angle,float* anisotropy,float* azimuth,float* variance,float* orientation,float* ortho,size_t XSIZE,size_t YSIZE,int RADIUS,int WINDOW_SIZE);
int Get_GPU_devices(void);
static void HandleError( hipError_t err,const char *file, int line );
//--------------------------------------------------------------------------------------------------------------------------//

//Current Usage:
//Global Memory: 773 MB


__global__ void getMatrix(float* data,float* angle,float* anisotropy,float* azimuth,float* variance,float* orientation,float* ortho,size_t XSIZE,size_t YSIZE,int RADIUS,int WINDOW_SIZE)
//__global__ void getMatrix(int* data,float* angle,float* anisotropy,float* azimuth,size_t XSIZE,size_t YSIZE)
{


//	Thread indices
	int x = (blockIdx.x * blockDim.x) + threadIdx.x;
	int y = (blockIdx.y * blockDim.y) + threadIdx.y;
	int id = y * XSIZE + x;
//----------------------------------------------------------------------------------------------------------------------------//	

	if((y>(YSIZE - RADIUS - 1))||(y<(RADIUS))) return;
	else if((x>(XSIZE - RADIUS - 1))||(x<(RADIUS))) return;
	else
	{

		//Actual computation
		int xrad,yrad,xradOrtho1,yradOrtho1,xradOneEighty,yradOneEighty,valueOneEighty;
		int valueOrtho1,valueOrtho2,xradOrtho2,yradOrtho2,i,j,k;
		//printf("Radius is: %d\n",RADIUS);
	
/*
		float variance[RADIUS];
		float orientation[RADIUS];
		float ortho[RADIUS];
*/		
		

		float value,sum_value,avg_value;
		float sum_valueOrtho,avg_valueOrtho;
		
	//	Initializing declared variables
		sum_value = 0;
		avg_value = 0;
		sum_valueOrtho = 0;
		avg_valueOrtho = 0;

	//	Iniitalize variance, ortho, and orientation arrays with max float value SGR changed i<100 to i<RADIUS

		
				
		//Flipped
		for(i=0;i<ANGLESIZE;i++) {
			
			for(k = 0;k<RADIUS;k+=RADSTEP) {
	
				//Initializing to 0 so that the sum is zero everytime it starts
				sum_value = 0;
				sum_valueOrtho = 0;

				for(j=k;j<k+WINDOW_SIZE;j++){

					//Computation for angle of interest
					xrad = (int)lrintf(cosf(angle[i]) * (j+1) + x);	
					yrad = (int)lrintf(sinf(angle[i]) * (j+1) + y);	

					value = data[y * XSIZE + x]  - data[yrad * XSIZE + xrad];
					value = value * value;
				
					//One eighty angle computation
					xradOneEighty = (int)lrintf(cosf(angle[i]+PI) * (j+1) + x);	
					yradOneEighty = (int)lrintf(sinf(angle[i]+PI) * (j+1) + y);	
				
					valueOneEighty = data[y * XSIZE + x] - data[yradOneEighty * XSIZE + xradOneEighty];
					valueOneEighty = valueOneEighty * valueOneEighty;

					sum_value = sum_value + value + valueOneEighty;
					avg_value = sum_value/(2*(j+1)); //the average variance from scale 1 to scale j

					//Computation for values on angle orthogonal to angle of interest
					xradOrtho1 = (int)lrintf(cosf(angle[i]+PI/2) * (j+1) + x);	
					yradOrtho1 = (int)lrintf(sinf(angle[i]+PI/2) * (j+1) + y);	
				
					valueOrtho1 = data[y * XSIZE + x]  - data[yradOrtho1 * XSIZE + xradOrtho1];
					valueOrtho1 = valueOrtho1 * valueOrtho1;

					//One eighty ortho angle computation
					xradOrtho2 = (int)lrintf(cosf(angle[i]+PI*3/2) * (j+1) + x);	
					yradOrtho2 = (int)lrintf(sinf(angle[i]+PI*3/2) * (j+1) + y);	

					valueOrtho2 = data[y * XSIZE + x]  - data[yradOrtho2 * XSIZE + xradOrtho2];
					valueOrtho2 = valueOrtho2 * valueOrtho2;

					sum_valueOrtho = sum_valueOrtho + valueOrtho1 + valueOrtho2;
					avg_valueOrtho = sum_valueOrtho/(2*j+1);

					//Fail safe to ensure there is no nan or inf when taking anisotropy ratio, later on.			
					if(avg_value == 0) {
							if((avg_valueOrtho < 1) && (avg_valueOrtho > 0)) {
								avg_value = avg_valueOrtho;
							}
							else {
								avg_value = 1;
							}
					}

					if(avg_valueOrtho == 0) {
						avg_valueOrtho = 1;
					}
				
					//Determine if the variance is minimum compared to  others at scale j, if so record it and its angle i. If not, pass it
					if(avg_value < variance[id * RADIUS + j]) {
							variance[id * RADIUS + j] = avg_value;
							orientation[id * RADIUS + j] = angle[i];
							ortho[id * RADIUS + j] = avg_valueOrtho;		
					}	
				}
			}
		}
		for(j=0;j<RADIUS;j+=RADSTEP){	
			anisotropy[y * XSIZE  * RADIUS/RADSTEP + x * RADIUS/RADSTEP + j] = (36+ortho[id * RADIUS + j])/(36+variance[id * RADIUS + j]);
			azimuth[y * XSIZE  * RADIUS/RADSTEP + x * RADIUS/RADSTEP + j] = orientation[id * RADIUS + j] * 180/PI;
		}
	}
 
}

//--------------------------------------END OF KERNEL-----------------------------------------------------------//

//--------------------------------------Handle Error()-----------------------------------------------------------//

static void HandleError( hipError_t err,const char *file, int line ) {
    if (err != hipSuccess) {
		cout << hipGetErrorString(err) << "in" << file << "at line" << line << "\n";
        exit( EXIT_FAILURE );
    }
}

//--------------------------------------Get_GPU_devices()-----------------------------------------------------------//
int Get_GPU_devices()
{
	hipDeviceProp_t prop;
	int whichDevice,DeviceCount;
	HANDLE_ERROR(hipGetDevice(&whichDevice));
	HANDLE_ERROR(hipGetDeviceProperties(&prop,whichDevice));

	if(!prop.deviceOverlap){
		cout<< "Device does not handle overlaps so streams are not possible\n";
	return 0;
	}

	DeviceCount = 0;
	
	HANDLE_ERROR(hipGetDeviceCount(&DeviceCount));
	if(DeviceCount > 0){ 
		cout<<  DeviceCount <<"Devices Found\n";
	}else{
		cout<< "No devices found or error in reading the number of devices\n";
		return 0;
	}
	
	for(int i = 0;i<DeviceCount;i++){
		hipDeviceProp_t properties;
		HANDLE_ERROR(hipGetDeviceProperties(&properties,i));
		cout<<"Device Number:"<< i << "\n";
		cout<<"  Device name: "<< properties.name;
		cout<<"  Device Global Memory size: "<< properties.totalGlobalMem/1000000 << "MB \n";
		cout<<"\n";

	}

	return DeviceCount;
}

//-------------------------------------------------------------------------------------------------------------//

int main(int argc,char* argv[])
{

	char FileName[20];
	char delimiterStr[10];
	char delimiter;
	int RADIUS;
	int WINDOW_SIZE;	

	//delimiter_string = "A";
	if(argc != 9){
		printf("\tArguments needed = 9; Provided = %d\n",argc);
                printf("Usage: ./Executable -i InputDataFileName -d Delimiter -r Radius -w WindowSize\n");
		printf("Exiting program\n");
		return 0;
	}


	int option;

	while ((option = getopt(argc, argv,"i:d:r:w:")) != -1) {
		switch (option) {
                        case 'i' : strcpy(FileName,optarg);
                            break;
                        case 'd' : strcpy(delimiterStr,optarg);
                            break;
                        case 'r' : RADIUS  = atoi(optarg);
                            break;
                        case 'w' : WINDOW_SIZE = atoi(optarg);
                            break;
                        default: printf("Usage: Executable -i InputDataFileName -d Delimiter -r Radius -w WindowSize\n");
                            exit(EXIT_FAILURE);
                }
         }


	//In the future use optarg
	if(strcmp(delimiterStr,"space")==0){
		delimiter = ' ';
	}
	else if(strcmp(delimiterStr,"Space")==0){
		delimiter = ' ';
	}
	else if(strcmp(delimiterStr,"tab")==0){
		delimiter = '\t';
	}
	else if(strcmp(delimiterStr,"Tab")==0){
		delimiter = '\t';
	}
	else{
		delimiter = delimiterStr[0];
	}
	
	printf("Delimiter: %c\n",delimiter);


	printf("Radius is %d\n",RADIUS);
	printf("Input file name is: %s\n",FileName);

//-------------------------------------------------------------------------------------//

	//Setting the output buffer to 500MB
	size_t limit;
	hipDeviceSetLimit(hipLimitPrintfFifoSize, 500 * 1024 * 1024);
	hipDeviceGetLimit(&limit,hipLimitPrintfFifoSize);

	//File declarations and opening them
	FILE *datTxt1,*datTxt,*outputAnisotropy00,*outputAnisotropy09,*outputAnisotropy49,*outputAnisotropy99;
	FILE *outputAzimuth00,*outputAzimuth09,*outputAzimuth49,*outputAzimuth99; 
	

	FILE * inpCheck;
	inpCheck = fopen("inpCheck.txt","w");
	if(inpCheck == NULL) {
		perror("Cannot open inpcheck.txt file");
		return (-1);
	}
	

	datTxt1 = fopen(FileName,"r");	
	if(datTxt1 == NULL) {
		cout<< "Cannot open file:" << argv[1] <<  "\nCheck if file exists.\n";
		exit(1);
	}
	outputAnisotropy00 = fopen("outputDataAni_First.txt","w");
	outputAnisotropy09 = fopen("outputDataAni_Rad_div_10.txt","w");
	outputAnisotropy49 = fopen("outputDataAni_Rad_div_2.txt","w");
	outputAnisotropy99 = fopen("outputDataAni_Last.txt","w");
	if((outputAnisotropy00 == NULL)||(outputAnisotropy09 == NULL)||(outputAnisotropy49 == NULL)||(outputAnisotropy99 == NULL)) {
		perror("Cannot open Anisotropy file");
		return (-1);
	}

	outputAzimuth00 = fopen("outputDataAzi_First.txt","w");
	outputAzimuth09 = fopen("outputDataAzi_Rad_div_10.txt","w");
	outputAzimuth49 = fopen("outputDataAzi_Rad_div_2.txt","w");
	outputAzimuth99 = fopen("outputDataAzi_Last.txt","w");

	if((outputAzimuth00 == NULL)||(outputAzimuth09 == NULL)||(outputAzimuth49 == NULL)||(outputAzimuth99 == NULL)) {
		perror("Cannot open Azimuth file");
		return (-1);
	}


//-----------Getting total rows and columns in the data file---------------------------------------------------------------------------------------------------//
	size_t XSIZE,YSIZE;
	XSIZE = 0;
	YSIZE = 0;
	int i,j;

	//Counting number of columns(x)
	char* max_line;
	max_line = (char*)malloc(MAX_XSIZE_POSSIBLE);
	memset(max_line,'\0',sizeof(max_line));

	fgets(max_line,MAX_XSIZE_POSSIBLE,datTxt1)!=NULL; 
	while(*max_line)if(*max_line++ == ' ')++XSIZE;
	XSIZE+=1;
	
	


	//Counting number of rows(y)
	do{
		i = fgetc(datTxt1);
		if(i == '\n') YSIZE++;
	}while(i != EOF);
	YSIZE+=1;
	
	fclose(datTxt1);
	cout<< "(XSIZE,YSIZE)::"<< "(" << XSIZE << "," << YSIZE << ")" << "\n";

	datTxt = fopen(FileName,"r");

	if(datTxt == NULL) {
		printf("Cannot open file: %s\nCheck if file exists\n",argv[1]);
		exit(1);
	}

//-----------------------Checking if the data size fits the memory of the GPU----------------------------------------------------------------------------------------//
	cout<< "(XSIZE,YSIZE)::"<< "(" << XSIZE << "," << YSIZE << ")" << "\n";
	//(MAX_XSIZE_POSSIBLE - XSIZE*YSIZE >0)? printf("There is enough memory for the computation\n"):printf("There is not enough memory and may result in incorrect results\n");

//--------------------------------------------------------------------------------------------------------------------------------------------------------------------//
//	Allocating Managed Memory (Unified Memory)

//	dim3 gridSize(XSIZE ,(YSIZE+THREADS_PER_BLOCK-1)/THREADS_PER_BLOCK,1);
//	dim3 blockSize(1,THREADS_PER_BLOCK,1);

	long int total_threads;

	float* data;
	float* anisotropy,*azimuth,*angle;
	float* variance,*orientation,*ortho;

	total_threads = THREADS_PER_BLOCK * ((XSIZE + THREADS_PER_BLOCK - 1)/THREADS_PER_BLOCK) * YSIZE;

	HANDLE_ERROR(hipMallocManaged((void**)&angle,ANGLESIZE * sizeof(float)));
	HANDLE_ERROR(hipMallocManaged((void**)&data,XSIZE * YSIZE * sizeof(float)));
	HANDLE_ERROR(hipMallocManaged((void**)&anisotropy,YSIZE  * XSIZE  * RADIUS/RADSTEP * sizeof(float)));
	HANDLE_ERROR(hipMallocManaged((void**)&azimuth,YSIZE  * XSIZE  * RADIUS/RADSTEP * sizeof(float)));

	HANDLE_ERROR(hipMallocManaged((void**)&variance,total_threads * RADIUS * sizeof(float)));
	HANDLE_ERROR(hipMallocManaged((void**)&orientation,total_threads * RADIUS * sizeof(float)));
	HANDLE_ERROR(hipMallocManaged((void**)&ortho,total_threads * RADIUS * sizeof(float)));
//--------------------------------------------------------------------------------------------------------------------------------------------------------------------//
	//XSIZE ints in a row which are max of 5 digits
	//with a space in the front and the back and space
	//between each number 
	char *startPtr,*endPtr;
	char line[XSIZE * 10 +2+(XSIZE-1)];
	memset(line, '\0', sizeof(line));
	int Value;
	i = 0;
	j = 0;
	//Assuming each number in the data set has a max of 5 characters
	char tempVal[5];
	memset(tempVal,'\0',sizeof(tempVal));

	cout<< "Working1\n";
	while(fgets(line,XSIZE *10 + 2 + (XSIZE-1),datTxt)!=NULL) {	
		cout << "Working2\n";
		startPtr = line;	
		for(i=0;i<XSIZE;i++) {
			Value = 0;
			memset(tempVal,'\0',sizeof(tempVal));		
			if(i != (XSIZE - 1)) {	
				endPtr = strchr(startPtr,' ');
				strncpy(tempVal,startPtr,endPtr-startPtr); 
				Value = atoi(tempVal);
				data[j * XSIZE + i] = Value;
				fprintf(inpCheck,"%d ",Value);

				endPtr = endPtr + 1;
				startPtr = endPtr;
			}	
			else if(i == (XSIZE - 1)){
				strcpy(tempVal,startPtr);
				Value = atoi(tempVal);
				data[j * XSIZE + i] = Value;
				fprintf(inpCheck,"%d\n",Value);
			}
		}
		
		j++;
	}	
	
	
//------------------------------------Matrix Declarations--------------------------------------------------------------------------------------------------------------//
//	float angle[ANGLESIZE];

	for(int i=0;i<ANGLESIZE;i++) {
		angle[i] = i * 5 * PI/180;
	}
	
	for(i=0;i<RADIUS * total_threads ;i++){
			variance[i] = FLT_MAX;
			ortho[i] = FLT_MAX;
			orientation[i] = FLT_MAX;
	}
//--------------------------------------CUDA-------------------------------------------------------------------------------------------------------------------------//

	
	hipError_t error;
	//error = cudaSetDevice(Get_GPU_devices() -1);
	error = hipSetDevice(0);

	if(error == hipSuccess){
		 cout <<"success\n";
	}else{
		cout <<"unsuccessful\n";
	}
	
	//cudaSetDevice(1);

	cout<< "Hello1\n";

	dim3 gridSize((XSIZE + THREADS_PER_BLOCK - 1)/THREADS_PER_BLOCK,YSIZE,1);
	dim3 blockSize(THREADS_PER_BLOCK,1,1);

	//dim3 gridSize(3,YSIZE,1);
	

	cout <<"Hello2\n";

	getMatrix<<<gridSize,blockSize>>>(data,angle,anisotropy,azimuth,variance,orientation,ortho,XSIZE,YSIZE,RADIUS,WINDOW_SIZE);

	error = hipDeviceSynchronize();
	if(error != hipSuccess){
		cout << "CUDA Device Synchronization Error:" << hipGetErrorString(error) << "\n";

    		// we can't recover from the error -- exit the program
    		return 0;
  	}

	error = hipGetLastError();

	if(error != hipSuccess){
		cout <<"CUDA Error:" << hipGetErrorString(error) << "\n";
    		// we can't recover from the error -- exit the program
	    	return 0;
  	}

	cout << "Hello3\n";
	cout << "Hello4\n";
	cout << "Hello5\n";

//--------------------------------------------------------------------------------------------------------------------------------------------------------------------//
//			Writing to files


	for(j=0;j<YSIZE ;j++) {
		for(i=0;i<XSIZE ;i++) {
			if((j>(YSIZE - RADIUS - 1))||(j<(RADIUS))) continue;
			if((i>(XSIZE - RADIUS - 1))||(i<(RADIUS))) continue;

			if (i == (XSIZE  - RADIUS - 1)) {
				fprintf(outputAnisotropy00,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + 0]);
				fprintf(outputAzimuth00,"%f",azimuth[j * XSIZE * RADIUS/RADSTEP + i * RADIUS/RADSTEP + 0]);
				fprintf(outputAnisotropy00,"\n");
				fprintf(outputAzimuth00,"\n");

				fprintf(outputAnisotropy09,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP +RADIUS/10 -1]);
				fprintf(outputAzimuth09,"%f",azimuth[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS/10 -1]);
				fprintf(outputAnisotropy09,"\n");
				fprintf(outputAzimuth09,"\n");

				fprintf(outputAnisotropy49,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS/2 - 1]);
				fprintf(outputAzimuth49,"%f",azimuth[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS/2 - 1]);
				fprintf(outputAnisotropy49,"\n");
				fprintf(outputAzimuth49,"\n");

				fprintf(outputAnisotropy99,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS -1]);
				fprintf(outputAzimuth99,"%f",azimuth[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS - 1]);
				fprintf(outputAnisotropy99,"\n");
				fprintf(outputAzimuth99,"\n");
			}
			else {
				fprintf(outputAnisotropy00,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + 0]);
				fprintf(outputAzimuth00,"%f",azimuth[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + 0]);
				fprintf(outputAnisotropy00,"\t");
				fprintf(outputAzimuth00,"\t");
	
				fprintf(outputAnisotropy09,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS/10 -1]);
				fprintf(outputAzimuth09,"%f",azimuth[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS/10 -1]);
				fprintf(outputAnisotropy09,"\t");
				fprintf(outputAzimuth09,"\t");

				fprintf(outputAnisotropy49,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS/2 - 1]);
				fprintf(outputAzimuth49,"%f",azimuth[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS/2 - 1]);	
				fprintf(outputAnisotropy49,"\t");
				fprintf(outputAzimuth49,"\t");

				fprintf(outputAnisotropy99,"%f",anisotropy[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS - 1]);
				fprintf(outputAzimuth99,"%f",azimuth[j * XSIZE  * RADIUS/RADSTEP + i * RADIUS/RADSTEP + RADIUS - 1]);
				fprintf(outputAnisotropy99,"\t");
				fprintf(outputAzimuth99,"\t");	
			}					
		}
	}	


	fclose(datTxt);
	fclose(inpCheck);
	fclose(outputAnisotropy00);
	fclose(outputAnisotropy09);
	fclose(outputAnisotropy49);
	fclose(outputAnisotropy99);

	fclose(outputAzimuth00);
	fclose(outputAzimuth09);
	fclose(outputAzimuth49);
	fclose(outputAzimuth99);
	
	hipFree(data);
	hipFree(angle);
	hipFree(azimuth);
	hipFree(anisotropy);
	hipFree(variance);
	hipFree(orientation);
	hipFree(ortho);
	
	
	//free(max_line);
//	free(anisotropy);
//	free(azimuth);

//	size_t free_byte ;

//	size_t total_byte ;
/*
	cudaMemGetInfo( &free_byte, &total_byte );
	double free_db = (double)free_byte;
	double total_db = (double)total_byte;
	double used_db = total_db - free_db;
//	cout << "GPU memory usage: used = %f, free = %f MB, total = %f MB\n",used_db/1024.0/1024.0, free_db/1024.0/1024.0, total_db/1024.0/1024.0);
*/
	return 0;
}

	.text
	.file	"topo_UnifiedMemory.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z24__device_stub__getMatrixPfS_S_S_S_S_S_mmii # -- Begin function _Z24__device_stub__getMatrixPfS_S_S_S_S_S_mmii
	.type	_Z24__device_stub__getMatrixPfS_S_S_S_S_S_mmii,@function
_Z24__device_stub__getMatrixPfS_S_S_S_S_S_mmii: # @_Z24__device_stub__getMatrixPfS_S_S_S_S_S_mmii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9getMatrixPfS_S_S_S_S_S_mmii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__getMatrixPfS_S_S_S_S_S_mmii, .Lfunc_end0-_Z24__device_stub__getMatrixPfS_S_S_S_S_S_mmii
	.cfi_endproc
                                        # -- End function
	.globl	_Z15Get_GPU_devicesv            # -- Begin function _Z15Get_GPU_devicesv
	.type	_Z15Get_GPU_devicesv,@function
_Z15Get_GPU_devicesv:                   # @_Z15Get_GPU_devicesv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$2960, %rsp                     # imm = 0xB90
	.cfi_def_cfa_offset 2992
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDevice
	movl	%eax, %edi
	movl	$189, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movl	(%rbx), %esi
	leaq	1488(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDevicePropertiesR0600
	movl	%eax, %edi
	movl	$190, %esi
	callq	_ZL11HandleError10hipError_tPKci
	cmpl	$0, 384(%rbx)
	je	.LBB1_1
# %bb.3:
	leaq	8(%rsp), %rbx
	movl	$0, (%rbx)
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	movl	%eax, %edi
	movl	$199, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movl	(%rbx), %esi
	movl	$_ZSt4cout, %edi
	testl	%esi, %esi
	jle	.LBB1_8
# %bb.4:
	callq	_ZNSolsEi
	movl	$.L.str.2, %esi
	movl	$14, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	8(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB1_7
# %bb.5:                                # %.lr.ph
	xorl	%ebx, %ebx
	leaq	16(%rsp), %r14
	movabsq	$4835703278458516699, %r15      # imm = 0x431BDE82D7B634DB
.LBB1_6:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	hipGetDevicePropertiesR0600
	movl	%eax, %edi
	movl	$209, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movl	$.L.str.5, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$15, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	callq	strlen
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$29, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r15, %rax
	mulq	304(%rsp)
	shrq	$18, %rdx
	movl	$_ZSt4cout, %edi
	movq	%rdx, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.8, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incl	%ebx
	movl	8(%rsp), %eax
	cmpl	%eax, %ebx
	jl	.LBB1_6
	jmp	.LBB1_7
.LBB1_1:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$60, %edx
	jmp	.LBB1_2
.LBB1_8:
	movl	$.L.str.3, %esi
	movl	$59, %edx
.LBB1_2:                                # %.loopexit
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%eax, %eax
.LBB1_7:                                # %.loopexit
	addq	$2960, %rsp                     # imm = 0xB90
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z15Get_GPU_devicesv, .Lfunc_end1-_Z15Get_GPU_devicesv
	.cfi_endproc
                                        # -- End function
	.type	_ZL11HandleError10hipError_tPKci,@function # -- Begin function _ZL11HandleError10hipError_tPKci
_ZL11HandleError10hipError_tPKci:       # @_ZL11HandleError10hipError_tPKci
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB2_2
# %bb.1:
	retq
.LBB2_2:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%esi, %ebx
	callq	hipGetErrorString
	movl	$_ZSt4cout, %edi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.57, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.58, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movl	$.L.str.5, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	_ZL11HandleError10hipError_tPKci, .Lfunc_end2-_ZL11HandleError10hipError_tPKci
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x40091eb851eb851f              # double 3.1400000000000001
.LCPI3_1:
	.quad	0x4066800000000000              # double 180
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$392, %rsp                      # imm = 0x188
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpl	$9, %edi
	jne	.LBB3_12
# %bb.1:                                # %.preheader358.outer.preheader
	movq	%rsi, %r13
	leaq	-98(%rbp), %rbx
	leaq	-416(%rbp), %r14
                                        # implicit-def: $eax
	movq	%rax, -136(%rbp)                # 8-byte Spill
                                        # implicit-def: $eax
.LBB3_2:                                # %.preheader358
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_3 Depth 2
	movq	%rax, -56(%rbp)                 # 8-byte Spill
.LBB3_3:                                # %.preheader358
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.12, %edx
	movl	$9, %edi
	movq	%r13, %rsi
	callq	getopt
	cmpl	$104, %eax
	jle	.LBB3_6
# %bb.4:                                # %.preheader358
                                        #   in Loop: Header=BB3_3 Depth=2
	cmpl	$105, %eax
	jne	.LBB3_8
# %bb.5:                                #   in Loop: Header=BB3_3 Depth=2
	movq	optarg(%rip), %rsi
	movq	%r14, %rdi
	callq	strcpy
	jmp	.LBB3_3
.LBB3_6:                                # %.preheader358
                                        #   in Loop: Header=BB3_3 Depth=2
	cmpl	$100, %eax
	jne	.LBB3_13
# %bb.7:                                #   in Loop: Header=BB3_3 Depth=2
	movq	optarg(%rip), %rsi
	movq	%rbx, %rdi
	callq	strcpy
	jmp	.LBB3_3
.LBB3_8:                                # %.preheader358
                                        #   in Loop: Header=BB3_3 Depth=2
	cmpl	$114, %eax
	je	.LBB3_11
# %bb.9:                                # %.preheader358
                                        #   in Loop: Header=BB3_3 Depth=2
	cmpl	$119, %eax
	jne	.LBB3_83
# %bb.10:                               #   in Loop: Header=BB3_3 Depth=2
	movq	optarg(%rip), %rdi
	callq	atoi
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, -136(%rbp)                # 8-byte Spill
	jmp	.LBB3_3
.LBB3_11:                               #   in Loop: Header=BB3_2 Depth=1
	movq	optarg(%rip), %rdi
	callq	atoi
                                        # kill: def $eax killed $eax def $rax
	jmp	.LBB3_2
.LBB3_12:
	movl	%edi, %esi
	xorl	%ebx, %ebx
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	jmp	.LBB3_64
.LBB3_13:                               # %.preheader358
	cmpl	$-1, %eax
	jne	.LBB3_83
# %bb.14:
	movl	$1667330163, %ecx               # imm = 0x63617073
	xorl	-98(%rbp), %ecx
	movzwl	-94(%rbp), %edx
	xorl	$101, %edx
	movb	$32, %al
	orl	%ecx, %edx
	je	.LBB3_19
# %bb.15:
	movl	$1667330131, %ecx               # imm = 0x63617053
	xorl	-98(%rbp), %ecx
	movzwl	-94(%rbp), %edx
	xorl	$101, %edx
	orl	%ecx, %edx
	je	.LBB3_19
# %bb.16:
	cmpl	$6447476, -98(%rbp)             # imm = 0x626174
	je	.LBB3_18
# %bb.17:
	cmpl	$6447444, -98(%rbp)             # imm = 0x626154
	movzbl	-98(%rbp), %ecx
	movl	$9, %eax
	cmovnel	%ecx, %eax
	jmp	.LBB3_19
.LBB3_18:
	movb	$9, %al
.LBB3_19:
	movsbl	%al, %esi
	movl	$.L.str.18, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.19, %edi
	movq	-56(%rbp), %rsi                 # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	callq	printf
	leaq	-416(%rbp), %rsi
	movl	$.L.str.20, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$524288000, %esi                # imm = 0x1F400000
	movl	$1, %edi
	callq	hipDeviceSetLimit
	leaq	-424(%rbp), %rdi
	movl	$1, %esi
	callq	hipDeviceGetLimit
	movl	$.L.str.21, %edi
	movl	$.L.str.22, %esi
	callq	fopen
	movq	%rax, -296(%rbp)                # 8-byte Spill
	testq	%rax, %rax
	je	.LBB3_79
# %bb.20:
	leaq	-416(%rbp), %rdi
	movl	$.L.str.24, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB3_85
# %bb.21:
	movq	%rax, %r12
	movl	$.L.str.27, %edi
	movl	$.L.str.22, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	$.L.str.28, %edi
	movl	$.L.str.22, %esi
	callq	fopen
	movq	%rax, -168(%rbp)                # 8-byte Spill
	movl	$.L.str.29, %edi
	movl	$.L.str.22, %esi
	callq	fopen
	movq	%rax, -160(%rbp)                # 8-byte Spill
	movl	$.L.str.30, %edi
	movl	$.L.str.22, %esi
	callq	fopen
	testq	%rbx, %rbx
	je	.LBB3_80
# %bb.22:
	cmpq	$0, -168(%rbp)                  # 8-byte Folded Reload
	je	.LBB3_80
# %bb.23:
	cmpq	$0, -160(%rbp)                  # 8-byte Folded Reload
	je	.LBB3_80
# %bb.24:
	movq	%rax, %r14
	testq	%rax, %rax
	je	.LBB3_80
# %bb.25:
	movl	$.L.str.32, %edi
	movl	$.L.str.22, %esi
	callq	fopen
	movq	%rax, %r15
	movl	$.L.str.33, %edi
	movl	$.L.str.22, %esi
	callq	fopen
	movq	%rax, -152(%rbp)                # 8-byte Spill
	movl	$.L.str.34, %edi
	movl	$.L.str.22, %esi
	callq	fopen
	movq	%rax, -144(%rbp)                # 8-byte Spill
	movl	$.L.str.35, %edi
	movl	$.L.str.22, %esi
	callq	fopen
	movq	%rax, -256(%rbp)                # 8-byte Spill
	movq	%r15, -240(%rbp)                # 8-byte Spill
	testq	%r15, %r15
	je	.LBB3_81
# %bb.26:
	cmpq	$0, -152(%rbp)                  # 8-byte Folded Reload
	je	.LBB3_81
# %bb.27:
	cmpq	$0, -144(%rbp)                  # 8-byte Folded Reload
	je	.LBB3_81
# %bb.28:
	cmpq	$0, -256(%rbp)                  # 8-byte Folded Reload
	je	.LBB3_81
# %bb.29:
	movq	%r14, -224(%rbp)                # 8-byte Spill
	movl	$958593, %edi                   # imm = 0xEA081
	callq	malloc
	movq	%rax, %r14
	movq	$0, (%rax)
	movq	%rax, %rdi
	movl	$958593, %esi                   # imm = 0xEA081
	movq	%r12, %rdx
	callq	fgets
	movb	(%r14), %al
	testb	%al, %al
	je	.LBB3_32
# %bb.30:                               # %.lr.ph.preheader
	incq	%r14
	xorl	%r15d, %r15d
.LBB3_31:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorl	%ecx, %ecx
	cmpb	$32, %al
	sete	%cl
	addq	%rcx, %r15
	movb	(%r14), %al
	incq	%r14
	testb	%al, %al
	jne	.LBB3_31
	jmp	.LBB3_33
.LBB3_32:
	xorl	%r15d, %r15d
.LBB3_33:                               # %._crit_edge
	xorl	%ecx, %ecx
.LBB3_34:                               # =>This Inner Loop Header: Depth=1
	movq	%rcx, %r14
	movq	%r12, %rdi
	callq	fgetc
	xorl	%ecx, %ecx
	cmpl	$10, %eax
	sete	%cl
	addq	%r14, %rcx
	cmpl	$-1, %eax
	jne	.LBB3_34
# %bb.35:
	movq	%rcx, -248(%rbp)                # 8-byte Spill
	movq	%rbx, -232(%rbp)                # 8-byte Spill
	leaq	1(%r15), %rbx
	movq	%r14, -384(%rbp)                # 8-byte Spill
	leaq	1(%r14), %rax
	movq	%rax, -88(%rbp)                 # 8-byte Spill
	movq	%r12, %rdi
	callq	fclose
	movl	$_ZSt4cout, %edi
	movl	$.L.str.37, %esi
	movl	$15, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.38, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbx, -72(%rbp)                 # 8-byte Spill
	movq	%rbx, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.39, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movq	-88(%rbp), %rsi                 # 8-byte Reload
	movq	%rsi, %r12
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.40, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.5, %esi
	movl	$1, %edx
	movq	%r14, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	-416(%rbp), %rdi
	movl	$.L.str.24, %esi
	callq	fopen
	movq	%rax, -280(%rbp)                # 8-byte Spill
	testq	%rax, %rax
	je	.LBB3_86
# %bb.36:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.37, %esi
	movl	$15, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.38, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	-72(%rbp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.39, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.40, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.5, %esi
	movl	$1, %edx
	movq	%r14, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	512(%r15), %rax
	movq	%rax, -216(%rbp)                # 8-byte Spill
	movq	%rax, %rbx
	andq	$-512, %rbx                     # imm = 0xFE00
	leaq	-328(%rbp), %rdi
	movl	$144, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	%eax, %edi
	movl	$379, %esi                      # imm = 0x17B
	callq	_ZL11HandleError10hipError_tPKci
	movq	%r12, %r14
	imulq	-72(%rbp), %r14                 # 8-byte Folded Reload
	leaq	(,%r14,4), %rsi
	leaq	-200(%rbp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	%eax, %edi
	movl	$380, %esi                      # imm = 0x17C
	callq	_ZL11HandleError10hipError_tPKci
	movslq	-56(%rbp), %r13                 # 4-byte Folded Reload
	imulq	%r13, %r14
	shlq	$2, %r14
	leaq	-64(%rbp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	%eax, %edi
	movl	$381, %esi                      # imm = 0x17D
	callq	_ZL11HandleError10hipError_tPKci
	leaq	-48(%rbp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	%eax, %edi
	movl	$382, %esi                      # imm = 0x17E
	callq	_ZL11HandleError10hipError_tPKci
	movq	%r13, -288(%rbp)                # 8-byte Spill
	imulq	%r12, %r13
	imulq	%rbx, %r13
	movq	-72(%rbp), %rbx                 # 8-byte Reload
	movq	%r13, -208(%rbp)                # 8-byte Spill
	leaq	(,%r13,4), %r14
	leaq	-320(%rbp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	%eax, %edi
	movl	$384, %esi                      # imm = 0x180
	callq	_ZL11HandleError10hipError_tPKci
	leaq	-312(%rbp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	%eax, %edi
	movl	$385, %esi                      # imm = 0x181
	callq	_ZL11HandleError10hipError_tPKci
	leaq	-304(%rbp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	%eax, %edi
	movl	$386, %esi                      # imm = 0x182
	callq	_ZL11HandleError10hipError_tPKci
	movq	%rsp, -112(%rbp)                # 8-byte Spill
	leaq	(%rbx,%rbx,4), %rax
	leaq	(%r15,%rax,2), %r14
	addq	$2, %r14
	movq	%r15, -128(%rbp)                # 8-byte Spill
	leaq	(%r15,%rax,2), %rax
	addq	$17, %rax
	andq	$-16, %rax
	movq	%rsp, %r15
	subq	%rax, %r15
	movq	%r15, %rsp
	movq	%r15, %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	memset@PLT
	movb	$0, -76(%rbp)
	movl	$0, -80(%rbp)
	movl	$_ZSt4cout, %edi
	movl	$.L.str.42, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r15, -184(%rbp)                # 8-byte Spill
	movq	%r15, %rdi
	movq	%r14, -272(%rbp)                # 8-byte Spill
	movl	%r14d, %esi
	movq	-280(%rbp), %rdx                # 8-byte Reload
	callq	fgets
	testq	%rax, %rax
	je	.LBB3_45
# %bb.37:                               # %.lr.ph372
	movq	-128(%rbp), %rax                # 8-byte Reload
	leaq	4(,%rax,4), %rax
	movq	%rax, -264(%rbp)                # 8-byte Spill
	leaq	-80(%rbp), %r13
	xorl	%eax, %eax
	movq	%rax, -120(%rbp)                # 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, -176(%rbp)                # 8-byte Spill
.LBB3_38:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_40 Depth 2
	movl	$_ZSt4cout, %edi
	movl	$.L.str.43, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	testq	%rbx, %rbx
	je	.LBB3_44
# %bb.39:                               # %.lr.ph367
                                        #   in Loop: Header=BB3_38 Depth=1
	movq	-72(%rbp), %rbx                 # 8-byte Reload
	movq	%rbx, %rax
	imulq	-176(%rbp), %rax                # 8-byte Folded Reload
	shlq	$2, %rax
	movq	%rax, -192(%rbp)                # 8-byte Spill
	movq	-120(%rbp), %r15                # 8-byte Reload
	movq	-184(%rbp), %r14                # 8-byte Reload
.LBB3_40:                               #   Parent Loop BB3_38 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movb	$0, -76(%rbp)
	movl	$0, -80(%rbp)
	cmpq	$1, %rbx
	jne	.LBB3_42
# %bb.41:                               #   in Loop: Header=BB3_40 Depth=2
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	strcpy
	movq	%r13, %rdi
	callq	atoi
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movq	-200(%rbp), %rcx
	addq	-192(%rbp), %rcx                # 8-byte Folded Reload
	movq	-128(%rbp), %rdx                # 8-byte Reload
	movss	%xmm0, (%rcx,%rdx,4)
	movl	$.L.str.45, %esi
	movq	-296(%rbp), %rdi                # 8-byte Reload
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB3_43
.LBB3_42:                               #   in Loop: Header=BB3_40 Depth=2
	movq	%r14, %rdi
	movl	$32, %esi
	callq	strchr
	movq	%rax, %r12
	movq	%rax, %rdx
	subq	%r14, %rdx
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	strncpy
	movq	%r13, %rdi
	callq	atoi
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movq	-200(%rbp), %rcx
	movss	%xmm0, (%rcx,%r15)
	movl	$.L.str.44, %esi
	movq	-296(%rbp), %rdi                # 8-byte Reload
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	fprintf
	incq	%r12
	movq	%r12, %r14
.LBB3_43:                               #   in Loop: Header=BB3_40 Depth=2
	addq	$4, %r15
	decq	%rbx
	jne	.LBB3_40
.LBB3_44:                               # %._crit_edge368
                                        #   in Loop: Header=BB3_38 Depth=1
	incq	-176(%rbp)                      # 8-byte Folded Spill
	movq	-184(%rbp), %rdi                # 8-byte Reload
	movq	-272(%rbp), %rsi                # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movq	-280(%rbp), %rdx                # 8-byte Reload
	callq	fgets
	movq	-120(%rbp), %rcx                # 8-byte Reload
	addq	-264(%rbp), %rcx                # 8-byte Folded Reload
	movq	%rcx, -120(%rbp)                # 8-byte Spill
	testq	%rax, %rax
	movq	-72(%rbp), %rbx                 # 8-byte Reload
	jne	.LBB3_38
.LBB3_45:                               # %.preheader357
	movq	-216(%rbp), %r14                # 8-byte Reload
	shrq	$9, %r14
	movq	-328(%rbp), %rax
	xorl	%ecx, %ecx
	movsd	.LCPI3_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movsd	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero
.LBB3_46:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm2, %xmm2
	cvtsi2sd	%ecx, %xmm2
	mulsd	%xmm0, %xmm2
	divsd	%xmm1, %xmm2
	cvtsd2ss	%xmm2, %xmm2
	movss	%xmm2, (%rax)
	addq	$5, %rcx
	addq	$4, %rax
	cmpq	$180, %rcx
	jne	.LBB3_46
# %bb.47:                               # %.preheader356
	movq	-208(%rbp), %r8                 # 8-byte Reload
	testq	%r8, %r8
	movq	-128(%rbp), %rbx                # 8-byte Reload
	movq	-88(%rbp), %r15                 # 8-byte Reload
	jle	.LBB3_50
# %bb.48:                               # %.lr.ph375
	movq	-320(%rbp), %rax
	movq	-304(%rbp), %rcx
	movq	-312(%rbp), %rdx
	xorl	%esi, %esi
	movl	$2139095039, %edi               # imm = 0x7F7FFFFF
.LBB3_49:                               # =>This Inner Loop Header: Depth=1
	movl	%edi, (%rax,%rsi,4)
	movl	%edi, (%rcx,%rsi,4)
	movl	%edi, (%rdx,%rsi,4)
	incq	%rsi
	cmpq	%rsi, %r8
	jne	.LBB3_49
.LBB3_50:                               # %._crit_edge376
	xorl	%edi, %edi
	callq	hipSetDevice
	movl	$_ZSt4cout, %edi
	testl	%eax, %eax
	je	.LBB3_52
# %bb.51:
	movl	$.L.str.47, %esi
	movl	$13, %edx
	jmp	.LBB3_53
.LBB3_52:
	movl	$.L.str.46, %esi
	movl	$8, %edx
.LBB3_53:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.48, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r14d, %eax
	movq	%r15, %r14
	shlq	$32, %r14
	orq	%rax, %r14
	movl	$_ZSt4cout, %edi
	movl	$.L.str.49, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_55
# %bb.54:
	movq	-200(%rbp), %rdi
	movq	-328(%rbp), %rsi
	movq	-64(%rbp), %rdx
	movq	-48(%rbp), %rcx
	movq	-320(%rbp), %r8
	movq	-312(%rbp), %r9
	subq	$8, %rsp
	pushq	-136(%rbp)                      # 8-byte Folded Reload
	pushq	-56(%rbp)                       # 8-byte Folded Reload
	pushq	%r15
	pushq	-72(%rbp)                       # 8-byte Folded Reload
	pushq	-304(%rbp)
	callq	_Z24__device_stub__getMatrixPfS_S_S_S_S_S_mmii
	addq	$48, %rsp
.LBB3_55:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	je	.LBB3_57
# %bb.56:
	movl	%eax, %r14d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.50, %esi
	movl	$34, %edx
	jmp	.LBB3_59
.LBB3_57:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB3_65
# %bb.58:
	movl	%eax, %r14d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.51, %esi
	movl	$11, %edx
.LBB3_59:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r14d, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB3_61
# %bb.60:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cout, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB3_62
.LBB3_61:
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cout(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB3_62:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	-112(%rbp), %rbx                # 8-byte Reload
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB3_63:
	movq	%rbx, %rsp
	xorl	%ebx, %ebx
.LBB3_64:
	movl	%ebx, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.LBB3_65:
	.cfi_def_cfa %rbp, 16
	movl	$_ZSt4cout, %edi
	movl	$.L.str.52, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.53, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.54, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	testq	%r15, %r15
	movq	-248(%rbp), %rdx                # 8-byte Reload
	je	.LBB3_78
# %bb.66:                               # %.preheader.lr.ph
	movq	-288(%rbp), %rsi                # 8-byte Reload
	subq	%rsi, %rdx
	movq	%rbx, %rdi
	subq	%rsi, %rdi
	movq	-72(%rbp), %r8                  # 8-byte Reload
	imulq	%rsi, %r8
	imulq	$1717986919, %rsi, %rax         # imm = 0x66666667
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$34, %rax
	addl	%ecx, %eax
	movslq	%eax, %r9
	movq	-56(%rbp), %rcx                 # 8-byte Reload
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
	cltq
	leaq	-1(%rsi), %rcx
	movq	%rcx, -344(%rbp)                # 8-byte Spill
	movq	%rdi, %rcx
	imulq	%rsi, %rcx
	movq	%rcx, -336(%rbp)                # 8-byte Spill
	movq	%rsi, %rcx
	subq	%rbx, %rcx
	movq	%rcx, -176(%rbp)                # 8-byte Spill
	negq	%rbx
	leaq	(,%rsi,4), %r10
	movq	%r8, -368(%rbp)                 # 8-byte Spill
	leaq	(,%r8,4), %rcx
	movq	%rcx, -376(%rbp)                # 8-byte Spill
	movq	%rax, -352(%rbp)                # 8-byte Spill
	leaq	(,%rax,4), %rax
	movq	%rax, -272(%rbp)                # 8-byte Spill
	movq	%r9, -360(%rbp)                 # 8-byte Spill
	leaq	(,%r9,4), %rax
	movq	%rax, -264(%rbp)                # 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, -56(%rbp)                 # 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, -88(%rbp)                 # 8-byte Spill
	movq	%rbx, -128(%rbp)                # 8-byte Spill
	movq	%rdx, -248(%rbp)                # 8-byte Spill
	movq	%rdi, -184(%rbp)                # 8-byte Spill
	movq	%r10, -192(%rbp)                # 8-byte Spill
.LBB3_67:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_69 Depth 2
	cmpq	$0, -72(%rbp)                   # 8-byte Folded Reload
	je	.LBB3_77
# %bb.68:                               # %.lr.ph378
                                        #   in Loop: Header=BB3_67 Depth=1
	movq	-88(%rbp), %rcx                 # 8-byte Reload
	cmpq	%rcx, %rdx
	setb	%al
	cmpq	-288(%rbp), %rcx                # 8-byte Folded Reload
	setl	%sil
	orb	%al, %sil
	movq	-368(%rbp), %r8                 # 8-byte Reload
	imulq	%rcx, %r8
	addq	-336(%rbp), %r8                 # 8-byte Folded Reload
	movq	-360(%rbp), %rax                # 8-byte Reload
	addq	%r8, %rax
	decq	%rax
	movq	%rax, -216(%rbp)                # 8-byte Spill
	movq	-352(%rbp), %rax                # 8-byte Reload
	leaq	-1(%rax,%r8), %rax
	movq	%rax, -208(%rbp)                # 8-byte Spill
	movq	-344(%rbp), %rax                # 8-byte Reload
	movq	%r8, -136(%rbp)                 # 8-byte Spill
	addq	%r8, %rax
	movq	%rax, -392(%rbp)                # 8-byte Spill
	movq	-56(%rbp), %r14                 # 8-byte Reload
	xorl	%r12d, %r12d
	movb	%sil, -120(%rbp)                # 1-byte Spill
.LBB3_69:                               #   Parent Loop BB3_67 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	testb	%sil, %sil
	jne	.LBB3_76
# %bb.70:                               #   in Loop: Header=BB3_69 Depth=2
	cmpq	%r12, %rdi
	jb	.LBB3_76
# %bb.71:                               #   in Loop: Header=BB3_69 Depth=2
	cmpq	-288(%rbp), %r12                # 8-byte Folded Reload
	jl	.LBB3_76
# %bb.72:                               #   in Loop: Header=BB3_69 Depth=2
	movq	-176(%rbp), %rcx                # 8-byte Reload
	movq	-64(%rbp), %rax
	addq	%r12, %rcx
	je	.LBB3_74
# %bb.73:                               #   in Loop: Header=BB3_69 Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r14), %xmm0
	movl	$.L.str.55, %esi
	movq	-232(%rbp), %r15                # 8-byte Reload
	movq	%r15, %rdi
	movb	$1, %al
	callq	fprintf
	movq	-48(%rbp), %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r14), %xmm0
	movl	$.L.str.55, %esi
	movq	-240(%rbp), %rbx                # 8-byte Reload
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
	movl	$9, %r13d
	movl	$9, %edi
	movq	%r15, %rsi
	callq	fputc@PLT
	movl	$9, %edi
	movq	%rbx, %rsi
	callq	fputc@PLT
	movq	-64(%rbp), %rax
	movq	-264(%rbp), %r15                # 8-byte Reload
	addq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	-4(%r14,%rax), %xmm0
	movl	$.L.str.55, %esi
	movq	-168(%rbp), %rbx                # 8-byte Reload
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
	movq	-48(%rbp), %rax
	addq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	-4(%r14,%rax), %xmm0
	movl	$.L.str.55, %esi
	movq	-152(%rbp), %r15                # 8-byte Reload
	movq	%r15, %rdi
	movb	$1, %al
	callq	fprintf
	movl	$9, %edi
	movq	%rbx, %rsi
	callq	fputc@PLT
	movl	$9, %edi
	movq	%r15, %rsi
	callq	fputc@PLT
	movq	-64(%rbp), %rax
	movq	-272(%rbp), %r15                # 8-byte Reload
	addq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	-4(%r14,%rax), %xmm0
	movl	$.L.str.55, %esi
	movq	-160(%rbp), %rbx                # 8-byte Reload
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
	movq	-48(%rbp), %rax
	addq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	-4(%r14,%rax), %xmm0
	movl	$.L.str.55, %esi
	movq	-144(%rbp), %r15                # 8-byte Reload
	movq	%r15, %rdi
	movb	$1, %al
	callq	fprintf
	movl	$9, %edi
	movq	%rbx, %rsi
	callq	fputc@PLT
	movl	$9, %edi
	movq	%r15, %rsi
	callq	fputc@PLT
	movq	-64(%rbp), %rax
	movq	-192(%rbp), %rbx                # 8-byte Reload
	addq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	-4(%r14,%rax), %xmm0
	movl	$.L.str.55, %esi
	movq	-224(%rbp), %r15                # 8-byte Reload
	movq	%r15, %rdi
	movb	$1, %al
	callq	fprintf
	movq	-48(%rbp), %rax
	addq	%rbx, %rax
	leaq	(%r14,%rax), %rbx
	addq	$-4, %rbx
	jmp	.LBB3_75
.LBB3_74:                               #   in Loop: Header=BB3_69 Depth=2
	movq	-136(%rbp), %rbx                # 8-byte Reload
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%rbx,4), %xmm0
	movl	$.L.str.55, %esi
	movq	-232(%rbp), %r15                # 8-byte Reload
	movq	%r15, %rdi
	movb	$1, %al
	callq	fprintf
	movq	-48(%rbp), %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%rbx,4), %xmm0
	movl	$.L.str.55, %esi
	movq	-240(%rbp), %rbx                # 8-byte Reload
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
	movl	$10, %r13d
	movl	$10, %edi
	movq	%r15, %rsi
	callq	fputc@PLT
	movl	$10, %edi
	movq	%rbx, %rsi
	callq	fputc@PLT
	movq	-64(%rbp), %rax
	movq	-216(%rbp), %r15                # 8-byte Reload
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r15,4), %xmm0
	movl	$.L.str.55, %esi
	movq	-168(%rbp), %rbx                # 8-byte Reload
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
	movq	-48(%rbp), %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r15,4), %xmm0
	movl	$.L.str.55, %esi
	movq	-152(%rbp), %r15                # 8-byte Reload
	movq	%r15, %rdi
	movb	$1, %al
	callq	fprintf
	movl	$10, %edi
	movq	%rbx, %rsi
	callq	fputc@PLT
	movl	$10, %edi
	movq	%r15, %rsi
	callq	fputc@PLT
	movq	-64(%rbp), %rax
	movq	-208(%rbp), %r15                # 8-byte Reload
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r15,4), %xmm0
	movl	$.L.str.55, %esi
	movq	-160(%rbp), %rbx                # 8-byte Reload
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
	movq	-48(%rbp), %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r15,4), %xmm0
	movl	$.L.str.55, %esi
	movq	-144(%rbp), %r15                # 8-byte Reload
	movq	%r15, %rdi
	movb	$1, %al
	callq	fprintf
	movl	$10, %edi
	movq	%rbx, %rsi
	callq	fputc@PLT
	movl	$10, %edi
	movq	%r15, %rsi
	callq	fputc@PLT
	movq	-64(%rbp), %rax
	movq	-392(%rbp), %rcx                # 8-byte Reload
	leaq	(,%rcx,4), %rbx
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%rcx,4), %xmm0
	movl	$.L.str.55, %esi
	movq	-224(%rbp), %r15                # 8-byte Reload
	movq	%r15, %rdi
	movb	$1, %al
	callq	fprintf
	addq	-48(%rbp), %rbx
.LBB3_75:                               # %.sink.split
                                        #   in Loop: Header=BB3_69 Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.55, %esi
	movq	-256(%rbp), %rbx                # 8-byte Reload
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
	movl	%r13d, %edi
	movq	%r15, %rsi
	callq	fputc@PLT
	movl	%r13d, %edi
	movq	%rbx, %rsi
	callq	fputc@PLT
	movq	-128(%rbp), %rbx                # 8-byte Reload
	movq	-248(%rbp), %rdx                # 8-byte Reload
	movq	-184(%rbp), %rdi                # 8-byte Reload
	movb	-120(%rbp), %sil                # 1-byte Reload
	movq	-192(%rbp), %r10                # 8-byte Reload
.LBB3_76:                               #   in Loop: Header=BB3_69 Depth=2
	leaq	(%rbx,%r12), %rax
	incq	%rax
	incq	%r12
	addq	%r10, %r14
	cmpq	$1, %rax
	jne	.LBB3_69
.LBB3_77:                               # %._crit_edge379
                                        #   in Loop: Header=BB3_67 Depth=1
	movq	-88(%rbp), %rsi                 # 8-byte Reload
	leaq	1(%rsi), %rax
	movq	-56(%rbp), %rcx                 # 8-byte Reload
	addq	-376(%rbp), %rcx                # 8-byte Folded Reload
	movq	%rcx, -56(%rbp)                 # 8-byte Spill
	cmpq	-384(%rbp), %rsi                # 8-byte Folded Reload
	movq	%rax, -88(%rbp)                 # 8-byte Spill
	jne	.LBB3_67
.LBB3_78:                               # %._crit_edge381
	movq	-280(%rbp), %rdi                # 8-byte Reload
	callq	fclose
	movq	-296(%rbp), %rdi                # 8-byte Reload
	callq	fclose
	movq	-232(%rbp), %rdi                # 8-byte Reload
	callq	fclose
	movq	-168(%rbp), %rdi                # 8-byte Reload
	callq	fclose
	movq	-160(%rbp), %rdi                # 8-byte Reload
	callq	fclose
	movq	-224(%rbp), %rdi                # 8-byte Reload
	callq	fclose
	movq	-240(%rbp), %rdi                # 8-byte Reload
	callq	fclose
	movq	-152(%rbp), %rdi                # 8-byte Reload
	callq	fclose
	movq	-144(%rbp), %rdi                # 8-byte Reload
	callq	fclose
	movq	-256(%rbp), %rdi                # 8-byte Reload
	callq	fclose
	movq	-200(%rbp), %rdi
	callq	hipFree
	movq	-328(%rbp), %rdi
	callq	hipFree
	movq	-48(%rbp), %rdi
	callq	hipFree
	movq	-64(%rbp), %rdi
	callq	hipFree
	movq	-320(%rbp), %rdi
	callq	hipFree
	movq	-312(%rbp), %rdi
	callq	hipFree
	movq	-304(%rbp), %rdi
	callq	hipFree
	movq	-112(%rbp), %rbx                # 8-byte Reload
	jmp	.LBB3_63
.LBB3_79:
	movl	$.L.str.23, %edi
	jmp	.LBB3_82
.LBB3_80:
	movl	$.L.str.31, %edi
	jmp	.LBB3_82
.LBB3_81:
	movl	$.L.str.36, %edi
.LBB3_82:
	callq	perror
	movl	$-1, %ebx
	jmp	.LBB3_64
.LBB3_83:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB3_84:
	movl	$1, %edi
	callq	exit
.LBB3_85:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.25, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	8(%r13), %rsi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.26, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	jmp	.LBB3_84
.LBB3_86:
	movq	8(%r13), %rsi
	movl	$.L.str.41, %edi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB3_84
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9getMatrixPfS_S_S_S_S_S_mmii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9getMatrixPfS_S_S_S_S_S_mmii,@object # @_Z9getMatrixPfS_S_S_S_S_S_mmii
	.section	.rodata,"a",@progbits
	.globl	_Z9getMatrixPfS_S_S_S_S_S_mmii
	.p2align	3, 0x0
_Z9getMatrixPfS_S_S_S_S_S_mmii:
	.quad	_Z24__device_stub__getMatrixPfS_S_S_S_S_S_mmii
	.size	_Z9getMatrixPfS_S_S_S_S_S_mmii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/bipushosti/Topographic_Anisotropy/master/topo_UnifiedMemory.hip"
	.size	.L.str, 126

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Device does not handle overlaps so streams are not possible\n"
	.size	.L.str.1, 61

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Devices Found\n"
	.size	.L.str.2, 15

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"No devices found or error in reading the number of devices\n"
	.size	.L.str.3, 60

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Device Number:"
	.size	.L.str.4, 15

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\n"
	.size	.L.str.5, 2

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"  Device name: "
	.size	.L.str.6, 16

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"  Device Global Memory size: "
	.size	.L.str.7, 30

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"MB \n"
	.size	.L.str.8, 5

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"\tArguments needed = 9; Provided = %d\n"
	.size	.L.str.9, 38

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"i:d:r:w:"
	.size	.L.str.12, 9

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"space"
	.size	.L.str.14, 6

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Space"
	.size	.L.str.15, 6

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"tab"
	.size	.L.str.16, 4

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"Tab"
	.size	.L.str.17, 4

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"Delimiter: %c\n"
	.size	.L.str.18, 15

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Radius is %d\n"
	.size	.L.str.19, 14

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"Input file name is: %s\n"
	.size	.L.str.20, 24

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"inpCheck.txt"
	.size	.L.str.21, 13

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"w"
	.size	.L.str.22, 2

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"Cannot open inpcheck.txt file"
	.size	.L.str.23, 30

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"r"
	.size	.L.str.24, 2

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"Cannot open file:"
	.size	.L.str.25, 18

	.type	.L.str.26,@object               # @.str.26
.L.str.26:
	.asciz	"\nCheck if file exists.\n"
	.size	.L.str.26, 24

	.type	.L.str.27,@object               # @.str.27
.L.str.27:
	.asciz	"outputDataAni_First.txt"
	.size	.L.str.27, 24

	.type	.L.str.28,@object               # @.str.28
.L.str.28:
	.asciz	"outputDataAni_Rad_div_10.txt"
	.size	.L.str.28, 29

	.type	.L.str.29,@object               # @.str.29
.L.str.29:
	.asciz	"outputDataAni_Rad_div_2.txt"
	.size	.L.str.29, 28

	.type	.L.str.30,@object               # @.str.30
.L.str.30:
	.asciz	"outputDataAni_Last.txt"
	.size	.L.str.30, 23

	.type	.L.str.31,@object               # @.str.31
.L.str.31:
	.asciz	"Cannot open Anisotropy file"
	.size	.L.str.31, 28

	.type	.L.str.32,@object               # @.str.32
.L.str.32:
	.asciz	"outputDataAzi_First.txt"
	.size	.L.str.32, 24

	.type	.L.str.33,@object               # @.str.33
.L.str.33:
	.asciz	"outputDataAzi_Rad_div_10.txt"
	.size	.L.str.33, 29

	.type	.L.str.34,@object               # @.str.34
.L.str.34:
	.asciz	"outputDataAzi_Rad_div_2.txt"
	.size	.L.str.34, 28

	.type	.L.str.35,@object               # @.str.35
.L.str.35:
	.asciz	"outputDataAzi_Last.txt"
	.size	.L.str.35, 23

	.type	.L.str.36,@object               # @.str.36
.L.str.36:
	.asciz	"Cannot open Azimuth file"
	.size	.L.str.36, 25

	.type	.L.str.37,@object               # @.str.37
.L.str.37:
	.asciz	"(XSIZE,YSIZE)::"
	.size	.L.str.37, 16

	.type	.L.str.38,@object               # @.str.38
.L.str.38:
	.asciz	"("
	.size	.L.str.38, 2

	.type	.L.str.39,@object               # @.str.39
.L.str.39:
	.asciz	","
	.size	.L.str.39, 2

	.type	.L.str.40,@object               # @.str.40
.L.str.40:
	.asciz	")"
	.size	.L.str.40, 2

	.type	.L.str.41,@object               # @.str.41
.L.str.41:
	.asciz	"Cannot open file: %s\nCheck if file exists\n"
	.size	.L.str.41, 43

	.type	.L.str.42,@object               # @.str.42
.L.str.42:
	.asciz	"Working1\n"
	.size	.L.str.42, 10

	.type	.L.str.43,@object               # @.str.43
.L.str.43:
	.asciz	"Working2\n"
	.size	.L.str.43, 10

	.type	.L.str.44,@object               # @.str.44
.L.str.44:
	.asciz	"%d "
	.size	.L.str.44, 4

	.type	.L.str.45,@object               # @.str.45
.L.str.45:
	.asciz	"%d\n"
	.size	.L.str.45, 4

	.type	.L.str.46,@object               # @.str.46
.L.str.46:
	.asciz	"success\n"
	.size	.L.str.46, 9

	.type	.L.str.47,@object               # @.str.47
.L.str.47:
	.asciz	"unsuccessful\n"
	.size	.L.str.47, 14

	.type	.L.str.48,@object               # @.str.48
.L.str.48:
	.asciz	"Hello1\n"
	.size	.L.str.48, 8

	.type	.L.str.49,@object               # @.str.49
.L.str.49:
	.asciz	"Hello2\n"
	.size	.L.str.49, 8

	.type	.L.str.50,@object               # @.str.50
.L.str.50:
	.asciz	"CUDA Device Synchronization Error:"
	.size	.L.str.50, 35

	.type	.L.str.51,@object               # @.str.51
.L.str.51:
	.asciz	"CUDA Error:"
	.size	.L.str.51, 12

	.type	.L.str.52,@object               # @.str.52
.L.str.52:
	.asciz	"Hello3\n"
	.size	.L.str.52, 8

	.type	.L.str.53,@object               # @.str.53
.L.str.53:
	.asciz	"Hello4\n"
	.size	.L.str.53, 8

	.type	.L.str.54,@object               # @.str.54
.L.str.54:
	.asciz	"Hello5\n"
	.size	.L.str.54, 8

	.type	.L.str.55,@object               # @.str.55
.L.str.55:
	.asciz	"%f"
	.size	.L.str.55, 3

	.type	.L.str.57,@object               # @.str.57
.L.str.57:
	.asciz	"in"
	.size	.L.str.57, 3

	.type	.L.str.58,@object               # @.str.58
.L.str.58:
	.asciz	"at line"
	.size	.L.str.58, 8

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9getMatrixPfS_S_S_S_S_S_mmii"
	.size	.L__unnamed_1, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Usage: Executable -i InputDataFileName -d Delimiter -r Radius -w WindowSize"
	.size	.Lstr, 76

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Usage: ./Executable -i InputDataFileName -d Delimiter -r Radius -w WindowSize"
	.size	.Lstr.1, 78

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Exiting program"
	.size	.Lstr.2, 16

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__getMatrixPfS_S_S_S_S_S_mmii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9getMatrixPfS_S_S_S_S_S_mmii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9getMatrixPfS_S_S_S_S_S_mmii ; -- Begin function _Z9getMatrixPfS_S_S_S_S_S_mmii
	.globl	_Z9getMatrixPfS_S_S_S_S_S_mmii
	.p2align	8
	.type	_Z9getMatrixPfS_S_S_S_S_S_mmii,@function
_Z9getMatrixPfS_S_S_S_S_S_mmii:         ; @_Z9getMatrixPfS_S_S_S_S_S_mmii
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x5c
	s_load_b128 s[4:7], s[0:1], 0x40
	v_bfe_u32 v1, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s2, s3, 16
	s_ashr_i32 s9, s6, 31
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[4:5], null, s15, s2, v[1:2]
	s_mov_b32 s8, s6
	s_not_b64 s[10:11], s[8:9]
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s4, s10, s4
	s_addc_u32 s5, s11, s5
	v_ashrrev_i32_e32 v5, 31, v4
	v_cmp_le_i32_e64 s2, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_u64_e32 vcc_lo, s[4:5], v[4:5]
	s_and_b32 s2, s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_55
; %bb.1:
	s_load_b512 s[16:31], s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	s_and_b32 s0, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s0, v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s10, s30
	s_addc_u32 s1, s11, s31
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u64_e32 vcc_lo, s[0:1], v[0:1]
	v_cmp_le_i32_e64 s0, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, vcc_lo
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_55
; %bb.2:                                ; %.preheader252
	v_mul_lo_u32 v5, v5, s30
	v_mul_lo_u32 v6, v4, s31
	v_mad_u64_u32 v[2:3], null, v4, s30, 0
	s_cmp_gt_i32 s6, 0
	v_cvt_f32_i32_e32 v11, v0
	s_cselect_b32 s14, -1, 0
	v_mov_b32_e32 v12, 0
	v_cndmask_b32_e64 v13, 0, 1, s14
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add3_u32 v3, v3, v6, v5
	v_add_co_u32 v5, vcc_lo, v2, v0
	s_cmp_gt_i32 s7, 0
	s_mov_b32 s4, 0x51eb851f
	v_add_co_ci_u32_e32 v6, vcc_lo, v3, v1, vcc_lo
	v_cvt_f32_i32_e32 v1, v4
	v_mul_lo_u32 v4, v5, s6
	s_mov_b32 s10, 0x3d70a3d7
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	s_cselect_b32 s15, -1, 0
	s_mov_b32 s5, 0x40091eb8
	s_mov_b32 s11, 0x4012d70a
	s_mov_b32 s33, 0xb94c1982
	s_mov_b32 s34, 0x37d75334
	v_add_co_u32 v5, vcc_lo, s16, v6
	v_add_co_ci_u32_e32 v6, vcc_lo, s17, v7, vcc_lo
	s_mov_b32 s1, 0x3ff91eb8
	s_mov_b32 s2, s3
.LBB0_3:                                ; %.preheader251
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;       Child Loop BB0_7 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB0_51
; %bb.4:                                ; %.preheader250.lr.ph
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_lshl_b64 s[12:13], s[2:3], 2
	s_mov_b32 s35, 2
	s_add_u32 s12, s18, s12
	s_addc_u32 s13, s19, s13
	s_mov_b32 s36, 0
.LBB0_5:                                ; %.preheader250
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_7 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s15
	s_cbranch_vccnz .LBB0_50
; %bb.6:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_5 Depth=2
	v_dual_mov_b32 v15, 0 :: v_dual_mov_b32 v14, 0
	s_add_i32 s37, s36, s7
	s_mov_b32 s38, s35
	s_mov_b32 s39, s36
.LBB0_7:                                ; %.lr.ph
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v7, v12, s[12:13]
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e64 s40, 0x48000000, |v7|
	v_readfirstlane_b32 s0, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s40
	s_bitset0_b32 s0, 31
	s_cbranch_vccz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=3
	s_and_b32 s41, s0, 0x7fffff
	s_lshr_b32 s42, s0, 23
	s_bitset1_b32 s41, 23
	s_addk_i32 s42, 0xff88
	s_mul_hi_u32 s43, s41, 0xfe5163ab
	s_mul_i32 s44, s41, 0x3c439041
	s_mul_hi_u32 s45, s41, 0x3c439041
	s_add_u32 s43, s43, s44
	s_addc_u32 s44, 0, s45
	s_mul_i32 s45, s41, 0xdb629599
	s_mul_hi_u32 s46, s41, 0xdb629599
	s_add_u32 s44, s44, s45
	s_addc_u32 s45, 0, s46
	s_mul_i32 s46, s41, 0xf534ddc0
	s_mul_hi_u32 s47, s41, 0xf534ddc0
	s_add_u32 s45, s45, s46
	s_addc_u32 s46, 0, s47
	s_mul_i32 s47, s41, 0xfc2757d1
	s_mul_hi_u32 s48, s41, 0xfc2757d1
	s_add_u32 s46, s46, s47
	s_addc_u32 s47, 0, s48
	s_mul_i32 s48, s41, 0x4e441529
	s_mul_hi_u32 s49, s41, 0x4e441529
	s_add_u32 s47, s47, s48
	s_addc_u32 s48, 0, s49
	s_cmp_gt_u32 s42, 63
	s_mul_i32 s49, s41, 0xfe5163ab
	s_mul_hi_u32 s50, s41, 0xa2f9836e
	s_mul_i32 s41, s41, 0xa2f9836e
	s_cselect_b32 s51, s44, s46
	s_cselect_b32 s43, s43, s45
	s_cselect_b32 s44, s49, s44
	s_add_u32 s41, s48, s41
	s_addc_u32 s48, 0, s50
	s_cmp_gt_u32 s42, 63
	s_cselect_b32 s49, 0xffffffc0, 0
	s_cselect_b32 s45, s45, s47
	s_cselect_b32 s41, s46, s41
	s_cselect_b32 s46, s47, s48
	s_add_i32 s49, s49, s42
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s49, 31
	s_cselect_b32 s42, 0xffffffe0, 0
	s_cselect_b32 s47, s45, s41
	s_cselect_b32 s41, s41, s46
	s_cselect_b32 s45, s51, s45
	s_cselect_b32 s46, s43, s51
	s_cselect_b32 s43, s44, s43
	s_add_i32 s42, s42, s49
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s42, 31
	s_cselect_b32 s44, 0xffffffe0, 0
	s_cselect_b32 s41, s47, s41
	s_cselect_b32 s47, s45, s47
	s_cselect_b32 s45, s46, s45
	s_cselect_b32 s43, s43, s46
	s_add_i32 s44, s44, s42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s42, 32, s44
	s_cmp_eq_u32 s44, 0
	v_mov_b32_e32 v8, s42
	s_cselect_b32 s44, -1, 0
	v_alignbit_b32 v9, s41, s47, v8
	v_alignbit_b32 v10, s47, s45, v8
	v_alignbit_b32 v8, s45, s43, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s42, v9
	v_cndmask_b32_e64 v9, v10, s47, s44
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v8, v8, s45, s44
	s_cselect_b32 s41, s41, s42
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v10, s41, v9, 30
	s_bfe_u32 s42, s41, 0x1001d
	s_delay_alu instid0(VALU_DEP_2)
	v_alignbit_b32 v9, v9, v8, 30
	s_sub_i32 s46, 0, s42
	v_alignbit_b32 v8, v8, s43, 30
	v_xor_b32_e32 v10, s46, v10
	s_lshr_b32 s43, s41, 29
	v_xor_b32_e32 v9, s46, v9
	s_lshl_b32 s43, s43, 31
	v_xor_b32_e32 v8, s46, v8
	v_clz_i32_u32_e32 v16, v10
	s_or_b32 s44, s43, 0.5
	s_lshr_b32 s41, s41, 30
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s42, s42, s41
	v_min_u32_e32 v16, 32, v16
	s_mov_b32 s41, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v17, 31, v16
	v_lshlrev_b32_e32 v18, 23, v16
	v_alignbit_b32 v10, v10, v9, v17
	v_alignbit_b32 v8, v9, v8, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v18, s44, v18
	v_alignbit_b32 v9, v10, v8, 9
	v_lshrrev_b32_e32 v10, 9, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v17, v9
	v_min_u32_e32 v17, 32, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v19, 31, v17
	v_add_nc_u32_e32 v16, v17, v16
	v_alignbit_b32 v8, v9, v8, v19
	v_or_b32_e32 v9, v10, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v10, 23, v16
	v_lshrrev_b32_e32 v8, 9, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v16, 0x3fc90fda, v9
	v_sub_nc_u32_e32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v10, 0x3fc90fda, v9, -v16
	v_add_nc_u32_e32 v8, 0x33000000, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v10, 0x33a22168, v9
	v_or_b32_e32 v8, s43, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, 0x3fc90fda, v8
	v_add_f32_e32 v8, v16, v10
	s_branch .LBB0_10
.LBB0_9:                                ;   in Loop: Header=BB0_7 Depth=3
	s_mov_b32 s41, -1
                                        ; implicit-def: $sgpr42
                                        ; implicit-def: $vgpr8
.LBB0_10:                               ; %Flow330
                                        ;   in Loop: Header=BB0_7 Depth=3
	v_mul_f32_e64 v10, 0x3f22f983, |v7|
	v_mov_b32_e32 v9, s42
	s_and_not1_b32 vcc_lo, exec_lo, s41
	s_delay_alu instid0(VALU_DEP_2)
	v_rndne_f32_e32 v10, v10
	s_cbranch_vccnz .LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_7 Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v8, 0xbfc90fda, v10, |v7|
	v_cvt_i32_f32_e32 v9, v10
	v_fmac_f32_e32 v8, 0xb3a22168, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v8, 0xa7c234c4, v10
.LBB0_12:                               ; %_ZL4cosff.exit
                                        ;   in Loop: Header=BB0_7 Depth=3
	s_and_b32 vcc_lo, exec_lo, s40
	s_cbranch_vccz .LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_7 Depth=3
	s_and_b32 s40, s0, 0x7fffff
	s_lshr_b32 s41, s0, 23
	s_bitset1_b32 s40, 23
	s_addk_i32 s41, 0xff88
	s_mul_hi_u32 s42, s40, 0xfe5163ab
	s_mul_i32 s43, s40, 0x3c439041
	s_mul_hi_u32 s44, s40, 0x3c439041
	s_add_u32 s42, s42, s43
	s_addc_u32 s43, 0, s44
	s_mul_i32 s44, s40, 0xdb629599
	s_mul_hi_u32 s45, s40, 0xdb629599
	s_add_u32 s43, s43, s44
	s_addc_u32 s44, 0, s45
	s_mul_i32 s45, s40, 0xf534ddc0
	s_mul_hi_u32 s46, s40, 0xf534ddc0
	s_add_u32 s44, s44, s45
	s_addc_u32 s45, 0, s46
	s_mul_i32 s46, s40, 0xfc2757d1
	s_mul_hi_u32 s47, s40, 0xfc2757d1
	s_add_u32 s45, s45, s46
	s_addc_u32 s46, 0, s47
	s_mul_i32 s47, s40, 0x4e441529
	s_mul_hi_u32 s48, s40, 0x4e441529
	s_add_u32 s46, s46, s47
	s_addc_u32 s47, 0, s48
	s_cmp_gt_u32 s41, 63
	s_mul_i32 s48, s40, 0xfe5163ab
	s_mul_hi_u32 s49, s40, 0xa2f9836e
	s_mul_i32 s40, s40, 0xa2f9836e
	s_cselect_b32 s50, s43, s45
	s_cselect_b32 s42, s42, s44
	s_cselect_b32 s43, s48, s43
	s_add_u32 s40, s47, s40
	s_addc_u32 s47, 0, s49
	s_cmp_gt_u32 s41, 63
	s_cselect_b32 s48, 0xffffffc0, 0
	s_cselect_b32 s44, s44, s46
	s_cselect_b32 s40, s45, s40
	s_cselect_b32 s45, s46, s47
	s_add_i32 s48, s48, s41
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s48, 31
	s_cselect_b32 s41, 0xffffffe0, 0
	s_cselect_b32 s46, s44, s40
	s_cselect_b32 s40, s40, s45
	s_cselect_b32 s44, s50, s44
	s_cselect_b32 s45, s42, s50
	s_cselect_b32 s42, s43, s42
	s_add_i32 s41, s41, s48
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s41, 31
	s_cselect_b32 s43, 0xffffffe0, 0
	s_cselect_b32 s40, s46, s40
	s_cselect_b32 s46, s44, s46
	s_cselect_b32 s44, s45, s44
	s_cselect_b32 s42, s42, s45
	s_add_i32 s43, s43, s41
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s41, 32, s43
	s_cmp_eq_u32 s43, 0
	v_mov_b32_e32 v16, s41
	s_cselect_b32 s43, -1, 0
	v_alignbit_b32 v17, s40, s46, v16
	v_alignbit_b32 v18, s46, s44, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s41, v17
	v_cndmask_b32_e64 v17, v18, s46, s43
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s40, s40, s41
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v18, s40, v17, 30
	s_bfe_u32 s41, s40, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s45, 0, s41
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v18, s45, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v19, v18
	v_min_u32_e32 v19, 32, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v21, 23, v19
	v_alignbit_b32 v16, s44, s42, v16
	v_sub_nc_u32_e32 v20, 31, v19
	v_cndmask_b32_e64 v16, v16, s44, s43
	s_delay_alu instid0(VALU_DEP_1)
	v_alignbit_b32 v17, v17, v16, 30
	v_alignbit_b32 v16, v16, s42, 30
	s_lshr_b32 s42, s40, 29
	s_lshr_b32 s40, s40, 30
	s_lshl_b32 s42, s42, 31
	v_xor_b32_e32 v17, s45, v17
	v_xor_b32_e32 v16, s45, v16
	s_or_b32 s43, s42, 0.5
	s_add_i32 s41, s41, s40
	v_sub_nc_u32_e32 v21, s43, v21
	v_alignbit_b32 v18, v18, v17, v20
	v_alignbit_b32 v16, v17, v16, v20
	s_mov_b32 s40, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v17, v18, v16, 9
	v_lshrrev_b32_e32 v18, 9, v18
	v_clz_i32_u32_e32 v20, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v20, 32, v20
	v_sub_nc_u32_e32 v22, 31, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_alignbit_b32 v16, v17, v16, v22
	v_or_b32_e32 v17, v18, v21
	v_add_nc_u32_e32 v19, v20, v19
	v_lshrrev_b32_e32 v16, 9, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v19, 0x3fc90fda, v17 :: v_dual_lshlrev_b32 v18, 23, v19
	v_sub_nc_u32_e32 v16, v16, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v18, 0x3fc90fda, v17, -v19
	v_add_nc_u32_e32 v16, 0x33000000, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v18, 0x33a22168, v17
	v_or_b32_e32 v16, s42, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v18, 0x3fc90fda, v16
	v_add_f32_e32 v16, v19, v18
	s_branch .LBB0_15
.LBB0_14:                               ;   in Loop: Header=BB0_7 Depth=3
	s_mov_b32 s40, -1
                                        ; implicit-def: $sgpr41
                                        ; implicit-def: $vgpr16
.LBB0_15:                               ; %Flow329
                                        ;   in Loop: Header=BB0_7 Depth=3
	v_mov_b32_e32 v17, s41
	s_and_not1_b32 vcc_lo, exec_lo, s40
	s_cbranch_vccnz .LBB0_17
; %bb.16:                               ;   in Loop: Header=BB0_7 Depth=3
	v_fma_f32 v16, 0xbfc90fda, v10, |v7|
	v_cvt_i32_f32_e32 v17, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, 0xb3a22168, v10
	v_fmac_f32_e32 v16, 0xa7c234c4, v10
.LBB0_17:                               ; %_ZL4sinff.exit
                                        ;   in Loop: Header=BB0_7 Depth=3
	v_mul_f32_e32 v10, v8, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v19, v16, v16 :: v_dual_and_b32 v18, 1, v9
	v_lshlrev_b32_e32 v9, 30, v9
	v_xor_b32_e32 v25, s0, v7
	v_fmaak_f32 v20, s33, v10, 0x3c0881c4
	v_dual_fmaak_f32 v21, s34, v10, 0xbab64f3b :: v_dual_and_b32 v22, 1, v17
	v_fmaak_f32 v23, s33, v19, 0x3c0881c4
	v_dual_fmaak_f32 v24, s34, v19, 0xbab64f3b :: v_dual_lshlrev_b32 v17, 30, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmaak_f32 v20, v10, v20, 0xbe2aaa9d
	v_fmaak_f32 v21, v10, v21, 0x3d2aabf7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmaak_f32 v23, v19, v23, 0xbe2aaa9d
	v_fmaak_f32 v24, v19, v24, 0x3d2aabf7
	v_cmp_eq_u32_e32 vcc_lo, 0, v18
	v_mul_f32_e32 v20, v10, v20
	v_fmaak_f32 v21, v10, v21, 0xbf000004
	v_mul_f32_e32 v23, v19, v23
	v_fmaak_f32 v24, v19, v24, 0xbf000004
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v8, v8, v20 :: v_dual_and_b32 v17, 0x80000000, v17
	v_fma_f32 v10, v10, v21, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v16, v16, v23 :: v_dual_and_b32 v9, 0x80000000, v9
	v_fma_f32 v19, v19, v24, 1.0
	s_add_i32 s40, s39, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v8, -v8, v10, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v22
	v_xor_b32_e32 v10, v25, v17
	v_xor_b32_e32 v8, v9, v8
	v_cndmask_b32_e32 v16, v19, v16, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v7, 0x1f8
	v_cvt_f32_i32_e32 v9, s40
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v10, v10, v16
	v_cndmask_b32_e32 v8, 0x7fc00000, v8, vcc_lo
	v_cndmask_b32_e32 v10, 0x7fc00000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v8, v8, v9, v11
	v_fma_f32 v10, v10, v9, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rndne_f32_e32 v8, v8
	v_rndne_f32_e32 v10, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e64 v17, 0x2f800000, |v8|
	v_mul_f32_e64 v16, 0x2f800000, |v10|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_floor_f32_e32 v17, v17
	v_floor_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v16, 0xcf800000, v16, |v10|
	v_ashrrev_i32_e32 v10, 31, v10
	v_cvt_u32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v16, v16, v10
	v_sub_nc_u32_e32 v10, v16, v10
	v_fma_f32 v16, 0xcf800000, v17, |v8|
	v_ashrrev_i32_e32 v8, 31, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v18, 31, v10
	v_cvt_u32_f32_e32 v19, v16
	v_mul_lo_u32 v20, v10, s31
	v_mad_u64_u32 v[16:17], null, v10, s30, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v10, v18, s30
	v_xor_b32_e32 v18, v19, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v18, v18, v8
	v_add3_u32 v17, v17, v20, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v19, 31, v18
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[18:19], 2, v[18:19]
	v_add_co_u32 v8, vcc_lo, s16, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s17, v17, vcc_lo
	v_add_co_u32 v17, vcc_lo, v8, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v18, vcc_lo, v10, v19, vcc_lo
	s_clause 0x1
	global_load_b32 v16, v[5:6], off
	global_load_b32 v17, v[17:18], off
	v_cvt_f64_f32_e32 v[7:8], v7
	v_add_f64 v[18:19], v[7:8], s[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v10, v[18:19]
	v_cmp_ngt_f32_e64 s41, 0x48000000, |v10|
	v_readfirstlane_b32 s0, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s41
	s_bitset0_b32 s0, 31
	s_cbranch_vccz .LBB0_19
; %bb.18:                               ;   in Loop: Header=BB0_7 Depth=3
	s_and_b32 s42, s0, 0x7fffff
	s_lshr_b32 s43, s0, 23
	s_bitset1_b32 s42, 23
	s_addk_i32 s43, 0xff88
	s_mul_hi_u32 s44, s42, 0xfe5163ab
	s_mul_i32 s45, s42, 0x3c439041
	s_mul_hi_u32 s46, s42, 0x3c439041
	s_add_u32 s44, s44, s45
	s_addc_u32 s45, 0, s46
	s_mul_i32 s46, s42, 0xdb629599
	s_mul_hi_u32 s47, s42, 0xdb629599
	s_add_u32 s45, s45, s46
	s_addc_u32 s46, 0, s47
	s_mul_i32 s47, s42, 0xf534ddc0
	s_mul_hi_u32 s48, s42, 0xf534ddc0
	s_add_u32 s46, s46, s47
	s_addc_u32 s47, 0, s48
	s_mul_i32 s48, s42, 0xfc2757d1
	s_mul_hi_u32 s49, s42, 0xfc2757d1
	s_add_u32 s47, s47, s48
	s_addc_u32 s48, 0, s49
	s_mul_i32 s49, s42, 0x4e441529
	s_mul_hi_u32 s50, s42, 0x4e441529
	s_add_u32 s48, s48, s49
	s_addc_u32 s49, 0, s50
	s_cmp_gt_u32 s43, 63
	s_mul_i32 s50, s42, 0xfe5163ab
	s_mul_hi_u32 s51, s42, 0xa2f9836e
	s_mul_i32 s42, s42, 0xa2f9836e
	s_cselect_b32 s52, s45, s47
	s_cselect_b32 s44, s44, s46
	s_cselect_b32 s45, s50, s45
	s_add_u32 s42, s49, s42
	s_addc_u32 s49, 0, s51
	s_cmp_gt_u32 s43, 63
	s_cselect_b32 s50, 0xffffffc0, 0
	s_cselect_b32 s46, s46, s48
	s_cselect_b32 s42, s47, s42
	s_cselect_b32 s47, s48, s49
	s_add_i32 s50, s50, s43
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s50, 31
	s_cselect_b32 s43, 0xffffffe0, 0
	s_cselect_b32 s48, s46, s42
	s_cselect_b32 s42, s42, s47
	s_cselect_b32 s46, s52, s46
	s_cselect_b32 s47, s44, s52
	s_cselect_b32 s44, s45, s44
	s_add_i32 s43, s43, s50
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s43, 31
	s_cselect_b32 s45, 0xffffffe0, 0
	s_cselect_b32 s42, s48, s42
	s_cselect_b32 s48, s46, s48
	s_cselect_b32 s46, s47, s46
	s_cselect_b32 s44, s44, s47
	s_add_i32 s45, s45, s43
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s43, 32, s45
	s_cmp_eq_u32 s45, 0
	v_mov_b32_e32 v18, s43
	s_cselect_b32 s45, -1, 0
	v_alignbit_b32 v19, s42, s48, v18
	v_alignbit_b32 v20, s48, s46, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s43, v19
	v_cndmask_b32_e64 v19, v20, s48, s45
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s42, s42, s43
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v20, s42, v19, 30
	s_bfe_u32 s43, s42, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s47, 0, s43
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v20, s47, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v21, v20
	v_min_u32_e32 v21, 32, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v23, 23, v21
	v_alignbit_b32 v18, s46, s44, v18
	v_sub_nc_u32_e32 v22, 31, v21
	v_cndmask_b32_e64 v18, v18, s46, s45
	s_delay_alu instid0(VALU_DEP_1)
	v_alignbit_b32 v19, v19, v18, 30
	v_alignbit_b32 v18, v18, s44, 30
	s_lshr_b32 s44, s42, 29
	s_lshr_b32 s42, s42, 30
	s_lshl_b32 s44, s44, 31
	v_xor_b32_e32 v19, s47, v19
	v_xor_b32_e32 v18, s47, v18
	s_or_b32 s45, s44, 0.5
	s_add_i32 s43, s43, s42
	v_sub_nc_u32_e32 v23, s45, v23
	v_alignbit_b32 v20, v20, v19, v22
	v_alignbit_b32 v18, v19, v18, v22
	s_mov_b32 s42, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v19, v20, v18, 9
	v_lshrrev_b32_e32 v20, 9, v20
	v_clz_i32_u32_e32 v22, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v22, 32, v22
	v_sub_nc_u32_e32 v24, 31, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_alignbit_b32 v18, v19, v18, v24
	v_or_b32_e32 v19, v20, v23
	v_add_nc_u32_e32 v21, v22, v21
	v_lshrrev_b32_e32 v18, 9, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v21, 0x3fc90fda, v19 :: v_dual_lshlrev_b32 v20, 23, v21
	v_sub_nc_u32_e32 v18, v18, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v20, 0x3fc90fda, v19, -v21
	v_add_nc_u32_e32 v18, 0x33000000, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v20, 0x33a22168, v19
	v_or_b32_e32 v18, s44, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v20, 0x3fc90fda, v18
	v_add_f32_e32 v18, v21, v20
	s_branch .LBB0_20
.LBB0_19:                               ;   in Loop: Header=BB0_7 Depth=3
	s_mov_b32 s42, -1
                                        ; implicit-def: $sgpr43
                                        ; implicit-def: $vgpr18
.LBB0_20:                               ; %Flow328
                                        ;   in Loop: Header=BB0_7 Depth=3
	v_mul_f32_e64 v20, 0x3f22f983, |v10|
	v_mov_b32_e32 v19, s43
	s_and_not1_b32 vcc_lo, exec_lo, s42
	s_delay_alu instid0(VALU_DEP_2)
	v_rndne_f32_e32 v20, v20
	s_cbranch_vccnz .LBB0_22
; %bb.21:                               ;   in Loop: Header=BB0_7 Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v18, 0xbfc90fda, v20, |v10|
	v_cvt_i32_f32_e32 v19, v20
	v_fmac_f32_e32 v18, 0xb3a22168, v20
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v18, 0xa7c234c4, v20
.LBB0_22:                               ; %_ZL4cosff.exit198
                                        ;   in Loop: Header=BB0_7 Depth=3
	s_and_b32 vcc_lo, exec_lo, s41
	s_cbranch_vccz .LBB0_24
; %bb.23:                               ;   in Loop: Header=BB0_7 Depth=3
	s_and_b32 s41, s0, 0x7fffff
	s_lshr_b32 s42, s0, 23
	s_bitset1_b32 s41, 23
	s_addk_i32 s42, 0xff88
	s_mul_hi_u32 s43, s41, 0xfe5163ab
	s_mul_i32 s44, s41, 0x3c439041
	s_mul_hi_u32 s45, s41, 0x3c439041
	s_add_u32 s43, s43, s44
	s_addc_u32 s44, 0, s45
	s_mul_i32 s45, s41, 0xdb629599
	s_mul_hi_u32 s46, s41, 0xdb629599
	s_add_u32 s44, s44, s45
	s_addc_u32 s45, 0, s46
	s_mul_i32 s46, s41, 0xf534ddc0
	s_mul_hi_u32 s47, s41, 0xf534ddc0
	s_add_u32 s45, s45, s46
	s_addc_u32 s46, 0, s47
	s_mul_i32 s47, s41, 0xfc2757d1
	s_mul_hi_u32 s48, s41, 0xfc2757d1
	s_add_u32 s46, s46, s47
	s_addc_u32 s47, 0, s48
	s_mul_i32 s48, s41, 0x4e441529
	s_mul_hi_u32 s49, s41, 0x4e441529
	s_add_u32 s47, s47, s48
	s_addc_u32 s48, 0, s49
	s_cmp_gt_u32 s42, 63
	s_mul_i32 s49, s41, 0xfe5163ab
	s_mul_hi_u32 s50, s41, 0xa2f9836e
	s_mul_i32 s41, s41, 0xa2f9836e
	s_cselect_b32 s51, s44, s46
	s_cselect_b32 s43, s43, s45
	s_cselect_b32 s44, s49, s44
	s_add_u32 s41, s48, s41
	s_addc_u32 s48, 0, s50
	s_cmp_gt_u32 s42, 63
	s_cselect_b32 s49, 0xffffffc0, 0
	s_cselect_b32 s45, s45, s47
	s_cselect_b32 s41, s46, s41
	s_cselect_b32 s46, s47, s48
	s_add_i32 s49, s49, s42
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s49, 31
	s_cselect_b32 s42, 0xffffffe0, 0
	s_cselect_b32 s47, s45, s41
	s_cselect_b32 s41, s41, s46
	s_cselect_b32 s45, s51, s45
	s_cselect_b32 s46, s43, s51
	s_cselect_b32 s43, s44, s43
	s_add_i32 s42, s42, s49
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s42, 31
	s_cselect_b32 s44, 0xffffffe0, 0
	s_cselect_b32 s41, s47, s41
	s_cselect_b32 s47, s45, s47
	s_cselect_b32 s45, s46, s45
	s_cselect_b32 s43, s43, s46
	s_add_i32 s44, s44, s42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s42, 32, s44
	s_cmp_eq_u32 s44, 0
	v_mov_b32_e32 v21, s42
	s_cselect_b32 s44, -1, 0
	v_alignbit_b32 v22, s41, s47, v21
	v_alignbit_b32 v23, s47, s45, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s42, v22
	v_cndmask_b32_e64 v22, v23, s47, s44
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s41, s41, s42
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v23, s41, v22, 30
	s_bfe_u32 s42, s41, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s46, 0, s42
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v23, s46, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v24, v23
	v_min_u32_e32 v24, 32, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v26, 23, v24
	v_alignbit_b32 v21, s45, s43, v21
	v_sub_nc_u32_e32 v25, 31, v24
	v_cndmask_b32_e64 v21, v21, s45, s44
	s_delay_alu instid0(VALU_DEP_1)
	v_alignbit_b32 v22, v22, v21, 30
	v_alignbit_b32 v21, v21, s43, 30
	s_lshr_b32 s43, s41, 29
	s_lshr_b32 s41, s41, 30
	s_lshl_b32 s43, s43, 31
	v_xor_b32_e32 v22, s46, v22
	v_xor_b32_e32 v21, s46, v21
	s_or_b32 s44, s43, 0.5
	s_add_i32 s42, s42, s41
	v_sub_nc_u32_e32 v26, s44, v26
	v_alignbit_b32 v23, v23, v22, v25
	v_alignbit_b32 v21, v22, v21, v25
	s_mov_b32 s41, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v22, v23, v21, 9
	v_lshrrev_b32_e32 v23, 9, v23
	v_clz_i32_u32_e32 v25, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v25, 32, v25
	v_sub_nc_u32_e32 v27, 31, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_alignbit_b32 v21, v22, v21, v27
	v_or_b32_e32 v22, v23, v26
	v_add_nc_u32_e32 v24, v25, v24
	v_lshrrev_b32_e32 v21, 9, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v24, 0x3fc90fda, v22 :: v_dual_lshlrev_b32 v23, 23, v24
	v_sub_nc_u32_e32 v21, v21, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v23, 0x3fc90fda, v22, -v24
	v_add_nc_u32_e32 v21, 0x33000000, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v23, 0x33a22168, v22
	v_or_b32_e32 v21, s43, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, 0x3fc90fda, v21
	v_add_f32_e32 v21, v24, v23
	s_branch .LBB0_25
.LBB0_24:                               ;   in Loop: Header=BB0_7 Depth=3
	s_mov_b32 s41, -1
                                        ; implicit-def: $sgpr42
                                        ; implicit-def: $vgpr21
.LBB0_25:                               ; %Flow327
                                        ;   in Loop: Header=BB0_7 Depth=3
	v_mov_b32_e32 v22, s42
	s_and_not1_b32 vcc_lo, exec_lo, s41
	s_cbranch_vccnz .LBB0_27
; %bb.26:                               ;   in Loop: Header=BB0_7 Depth=3
	v_fma_f32 v21, 0xbfc90fda, v20, |v10|
	v_cvt_i32_f32_e32 v22, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v21, 0xb3a22168, v20
	v_fmac_f32_e32 v21, 0xa7c234c4, v20
.LBB0_27:                               ; %_ZL4sinff.exit206
                                        ;   in Loop: Header=BB0_7 Depth=3
	v_dual_mul_f32 v20, v18, v18 :: v_dual_and_b32 v23, 1, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v24, v21, v21 :: v_dual_lshlrev_b32 v19, 30, v19
	v_xor_b32_e32 v30, s0, v10
	v_fmaak_f32 v25, s33, v20, 0x3c0881c4
	v_dual_fmaak_f32 v26, s34, v20, 0xbab64f3b :: v_dual_and_b32 v27, 1, v22
	v_lshlrev_b32_e32 v22, 30, v22
	v_cmp_eq_u32_e32 vcc_lo, 0, v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fmaak_f32 v25, v20, v25, 0xbe2aaa9d
	v_fmaak_f32 v28, s33, v24, 0x3c0881c4
	s_mov_b32 s0, s4
	v_and_b32_e32 v19, 0x80000000, v19
	v_mul_f32_e32 v25, v20, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmaak_f32 v28, v24, v28, 0xbe2aaa9d
	v_dual_fmaak_f32 v29, s34, v24, 0xbab64f3b :: v_dual_fmac_f32 v18, v18, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v28, v24, v28
	v_fmaak_f32 v26, v20, v26, 0x3d2aabf7
	v_fmaak_f32 v29, v24, v29, 0x3d2aabf7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v21, v21, v28 :: v_dual_fmaak_f32 v26, v20, v26, 0xbf000004
	v_fmaak_f32 v29, v24, v29, 0xbf000004
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v20, v20, v26, 1.0
	v_fma_f32 v24, v24, v29, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v18, -v18, v20, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v27
	v_and_b32_e32 v22, 0x80000000, v22
	v_xor_b32_e32 v18, v19, v18
	v_cndmask_b32_e32 v21, v24, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v20, v30, v22
	v_cmp_class_f32_e64 vcc_lo, v10, 0x1f8
	v_xor_b32_e32 v19, v20, v21
	v_cndmask_b32_e32 v10, 0x7fc00000, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v18, 0x7fc00000, v19, vcc_lo
	v_fma_f32 v10, v10, v9, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v18, v18, v9, v1
	v_rndne_f32_e32 v10, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rndne_f32_e32 v18, v18
	v_mul_f32_e64 v20, 0x2f800000, |v10|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e64 v19, 0x2f800000, |v18|
	v_floor_f32_e32 v20, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_floor_f32_e32 v19, v19
	v_fma_f32 v19, 0xcf800000, v19, |v18|
	v_ashrrev_i32_e32 v18, 31, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v19, v19
	v_xor_b32_e32 v19, v19, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v21, v19, v18
	v_fma_f32 v18, 0xcf800000, v20, |v10|
	v_ashrrev_i32_e32 v10, 31, v10
	v_ashrrev_i32_e32 v20, 31, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cvt_u32_f32_e32 v22, v18
	v_mul_lo_u32 v23, v21, s31
	v_mad_u64_u32 v[18:19], null, v21, s30, 0
	v_mul_lo_u32 v21, v20, s30
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v20, v22, v10
	v_sub_nc_u32_e32 v20, v20, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v19, v19, v23, v21
	v_ashrrev_i32_e32 v21, 31, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[18:19], 2, v[18:19]
	v_lshlrev_b64 v[20:21], 2, v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v10, vcc_lo, s16, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s17, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v10, v20
	v_add_co_ci_u32_e32 v19, vcc_lo, v19, v21, vcc_lo
	global_load_b32 v18, v[18:19], off
	v_add_f64 v[19:20], v[7:8], s[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v10, v[19:20]
	v_cmp_ngt_f32_e64 s41, 0x48000000, |v10|
	v_readfirstlane_b32 s0, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s41
	s_bitset0_b32 s0, 31
	s_cbranch_vccz .LBB0_29
; %bb.28:                               ;   in Loop: Header=BB0_7 Depth=3
	s_and_b32 s42, s0, 0x7fffff
	s_lshr_b32 s43, s0, 23
	s_bitset1_b32 s42, 23
	s_addk_i32 s43, 0xff88
	s_mul_hi_u32 s44, s42, 0xfe5163ab
	s_mul_i32 s45, s42, 0x3c439041
	s_mul_hi_u32 s46, s42, 0x3c439041
	s_add_u32 s44, s44, s45
	s_addc_u32 s45, 0, s46
	s_mul_i32 s46, s42, 0xdb629599
	s_mul_hi_u32 s47, s42, 0xdb629599
	s_add_u32 s45, s45, s46
	s_addc_u32 s46, 0, s47
	s_mul_i32 s47, s42, 0xf534ddc0
	s_mul_hi_u32 s48, s42, 0xf534ddc0
	s_add_u32 s46, s46, s47
	s_addc_u32 s47, 0, s48
	s_mul_i32 s48, s42, 0xfc2757d1
	s_mul_hi_u32 s49, s42, 0xfc2757d1
	s_add_u32 s47, s47, s48
	s_addc_u32 s48, 0, s49
	s_mul_i32 s49, s42, 0x4e441529
	s_mul_hi_u32 s50, s42, 0x4e441529
	s_add_u32 s48, s48, s49
	s_addc_u32 s49, 0, s50
	s_cmp_gt_u32 s43, 63
	s_mul_i32 s50, s42, 0xfe5163ab
	s_mul_hi_u32 s51, s42, 0xa2f9836e
	s_mul_i32 s42, s42, 0xa2f9836e
	s_cselect_b32 s52, s45, s47
	s_cselect_b32 s44, s44, s46
	s_cselect_b32 s45, s50, s45
	s_add_u32 s42, s49, s42
	s_addc_u32 s49, 0, s51
	s_cmp_gt_u32 s43, 63
	s_cselect_b32 s50, 0xffffffc0, 0
	s_cselect_b32 s46, s46, s48
	s_cselect_b32 s42, s47, s42
	s_cselect_b32 s47, s48, s49
	s_add_i32 s50, s50, s43
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s50, 31
	s_cselect_b32 s43, 0xffffffe0, 0
	s_cselect_b32 s48, s46, s42
	s_cselect_b32 s42, s42, s47
	s_cselect_b32 s46, s52, s46
	s_cselect_b32 s47, s44, s52
	s_cselect_b32 s44, s45, s44
	s_add_i32 s43, s43, s50
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s43, 31
	s_cselect_b32 s45, 0xffffffe0, 0
	s_cselect_b32 s42, s48, s42
	s_cselect_b32 s48, s46, s48
	s_cselect_b32 s46, s47, s46
	s_cselect_b32 s44, s44, s47
	s_add_i32 s45, s45, s43
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s43, 32, s45
	s_cmp_eq_u32 s45, 0
	v_mov_b32_e32 v19, s43
	s_cselect_b32 s45, -1, 0
	v_alignbit_b32 v20, s42, s48, v19
	v_alignbit_b32 v21, s48, s46, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s43, v20
	v_cndmask_b32_e64 v20, v21, s48, s45
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s42, s42, s43
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v21, s42, v20, 30
	s_bfe_u32 s43, s42, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s47, 0, s43
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v21, s47, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v22, v21
	v_min_u32_e32 v22, 32, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v24, 23, v22
	v_alignbit_b32 v19, s46, s44, v19
	v_sub_nc_u32_e32 v23, 31, v22
	v_cndmask_b32_e64 v19, v19, s46, s45
	s_delay_alu instid0(VALU_DEP_1)
	v_alignbit_b32 v20, v20, v19, 30
	v_alignbit_b32 v19, v19, s44, 30
	s_lshr_b32 s44, s42, 29
	s_lshr_b32 s42, s42, 30
	s_lshl_b32 s44, s44, 31
	v_xor_b32_e32 v20, s47, v20
	v_xor_b32_e32 v19, s47, v19
	s_or_b32 s45, s44, 0.5
	s_add_i32 s43, s43, s42
	v_sub_nc_u32_e32 v24, s45, v24
	v_alignbit_b32 v21, v21, v20, v23
	v_alignbit_b32 v19, v20, v19, v23
	s_mov_b32 s42, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v20, v21, v19, 9
	v_lshrrev_b32_e32 v21, 9, v21
	v_clz_i32_u32_e32 v23, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v23, 32, v23
	v_sub_nc_u32_e32 v25, 31, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_alignbit_b32 v19, v20, v19, v25
	v_or_b32_e32 v20, v21, v24
	v_add_nc_u32_e32 v22, v23, v22
	v_lshrrev_b32_e32 v19, 9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v22, 0x3fc90fda, v20 :: v_dual_lshlrev_b32 v21, 23, v22
	v_sub_nc_u32_e32 v19, v19, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v21, 0x3fc90fda, v20, -v22
	v_add_nc_u32_e32 v19, 0x33000000, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v21, 0x33a22168, v20
	v_or_b32_e32 v19, s44, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v21, 0x3fc90fda, v19
	v_add_f32_e32 v19, v22, v21
	s_branch .LBB0_30
.LBB0_29:                               ;   in Loop: Header=BB0_7 Depth=3
	s_mov_b32 s42, -1
                                        ; implicit-def: $sgpr43
                                        ; implicit-def: $vgpr19
.LBB0_30:                               ; %Flow326
                                        ;   in Loop: Header=BB0_7 Depth=3
	v_mul_f32_e64 v21, 0x3f22f983, |v10|
	v_mov_b32_e32 v20, s43
	s_and_not1_b32 vcc_lo, exec_lo, s42
	s_delay_alu instid0(VALU_DEP_2)
	v_rndne_f32_e32 v21, v21
	s_cbranch_vccnz .LBB0_32
; %bb.31:                               ;   in Loop: Header=BB0_7 Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v19, 0xbfc90fda, v21, |v10|
	v_cvt_i32_f32_e32 v20, v21
	v_fmac_f32_e32 v19, 0xb3a22168, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v19, 0xa7c234c4, v21
.LBB0_32:                               ; %_ZL4cosff.exit212
                                        ;   in Loop: Header=BB0_7 Depth=3
	s_and_b32 vcc_lo, exec_lo, s41
	s_cbranch_vccz .LBB0_34
; %bb.33:                               ;   in Loop: Header=BB0_7 Depth=3
	s_and_b32 s41, s0, 0x7fffff
	s_lshr_b32 s42, s0, 23
	s_bitset1_b32 s41, 23
	s_addk_i32 s42, 0xff88
	s_mul_hi_u32 s43, s41, 0xfe5163ab
	s_mul_i32 s44, s41, 0x3c439041
	s_mul_hi_u32 s45, s41, 0x3c439041
	s_add_u32 s43, s43, s44
	s_addc_u32 s44, 0, s45
	s_mul_i32 s45, s41, 0xdb629599
	s_mul_hi_u32 s46, s41, 0xdb629599
	s_add_u32 s44, s44, s45
	s_addc_u32 s45, 0, s46
	s_mul_i32 s46, s41, 0xf534ddc0
	s_mul_hi_u32 s47, s41, 0xf534ddc0
	s_add_u32 s45, s45, s46
	s_addc_u32 s46, 0, s47
	s_mul_i32 s47, s41, 0xfc2757d1
	s_mul_hi_u32 s48, s41, 0xfc2757d1
	s_add_u32 s46, s46, s47
	s_addc_u32 s47, 0, s48
	s_mul_i32 s48, s41, 0x4e441529
	s_mul_hi_u32 s49, s41, 0x4e441529
	s_add_u32 s47, s47, s48
	s_addc_u32 s48, 0, s49
	s_cmp_gt_u32 s42, 63
	s_mul_i32 s49, s41, 0xfe5163ab
	s_mul_hi_u32 s50, s41, 0xa2f9836e
	s_mul_i32 s41, s41, 0xa2f9836e
	s_cselect_b32 s51, s44, s46
	s_cselect_b32 s43, s43, s45
	s_cselect_b32 s44, s49, s44
	s_add_u32 s41, s48, s41
	s_addc_u32 s48, 0, s50
	s_cmp_gt_u32 s42, 63
	s_cselect_b32 s49, 0xffffffc0, 0
	s_cselect_b32 s45, s45, s47
	s_cselect_b32 s41, s46, s41
	s_cselect_b32 s46, s47, s48
	s_add_i32 s49, s49, s42
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s49, 31
	s_cselect_b32 s42, 0xffffffe0, 0
	s_cselect_b32 s47, s45, s41
	s_cselect_b32 s41, s41, s46
	s_cselect_b32 s45, s51, s45
	s_cselect_b32 s46, s43, s51
	s_cselect_b32 s43, s44, s43
	s_add_i32 s42, s42, s49
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s42, 31
	s_cselect_b32 s44, 0xffffffe0, 0
	s_cselect_b32 s41, s47, s41
	s_cselect_b32 s47, s45, s47
	s_cselect_b32 s45, s46, s45
	s_cselect_b32 s43, s43, s46
	s_add_i32 s44, s44, s42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s42, 32, s44
	s_cmp_eq_u32 s44, 0
	v_mov_b32_e32 v22, s42
	s_cselect_b32 s44, -1, 0
	v_alignbit_b32 v23, s41, s47, v22
	v_alignbit_b32 v24, s47, s45, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s42, v23
	v_cndmask_b32_e64 v23, v24, s47, s44
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s41, s41, s42
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v24, s41, v23, 30
	s_bfe_u32 s42, s41, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s46, 0, s42
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v24, s46, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v25, v24
	v_min_u32_e32 v25, 32, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v27, 23, v25
	v_alignbit_b32 v22, s45, s43, v22
	v_sub_nc_u32_e32 v26, 31, v25
	v_cndmask_b32_e64 v22, v22, s45, s44
	s_delay_alu instid0(VALU_DEP_1)
	v_alignbit_b32 v23, v23, v22, 30
	v_alignbit_b32 v22, v22, s43, 30
	s_lshr_b32 s43, s41, 29
	s_lshr_b32 s41, s41, 30
	s_lshl_b32 s43, s43, 31
	v_xor_b32_e32 v23, s46, v23
	v_xor_b32_e32 v22, s46, v22
	s_or_b32 s44, s43, 0.5
	s_add_i32 s42, s42, s41
	v_sub_nc_u32_e32 v27, s44, v27
	v_alignbit_b32 v24, v24, v23, v26
	v_alignbit_b32 v22, v23, v22, v26
	s_mov_b32 s41, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v23, v24, v22, 9
	v_lshrrev_b32_e32 v24, 9, v24
	v_clz_i32_u32_e32 v26, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v26, 32, v26
	v_sub_nc_u32_e32 v28, 31, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_alignbit_b32 v22, v23, v22, v28
	v_or_b32_e32 v23, v24, v27
	v_add_nc_u32_e32 v25, v26, v25
	v_lshrrev_b32_e32 v22, 9, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v25, 0x3fc90fda, v23 :: v_dual_lshlrev_b32 v24, 23, v25
	v_sub_nc_u32_e32 v22, v22, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v24, 0x3fc90fda, v23, -v25
	v_add_nc_u32_e32 v22, 0x33000000, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v24, 0x33a22168, v23
	v_or_b32_e32 v22, s43, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v24, 0x3fc90fda, v22
	v_add_f32_e32 v22, v25, v24
	s_branch .LBB0_35
.LBB0_34:                               ;   in Loop: Header=BB0_7 Depth=3
	s_mov_b32 s41, -1
                                        ; implicit-def: $sgpr42
                                        ; implicit-def: $vgpr22
.LBB0_35:                               ; %Flow325
                                        ;   in Loop: Header=BB0_7 Depth=3
	v_mov_b32_e32 v23, s42
	s_and_not1_b32 vcc_lo, exec_lo, s41
	s_cbranch_vccnz .LBB0_37
; %bb.36:                               ;   in Loop: Header=BB0_7 Depth=3
	v_fma_f32 v22, 0xbfc90fda, v21, |v10|
	v_cvt_i32_f32_e32 v23, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v22, 0xb3a22168, v21
	v_fmac_f32_e32 v22, 0xa7c234c4, v21
.LBB0_37:                               ; %_ZL4sinff.exit220
                                        ;   in Loop: Header=BB0_7 Depth=3
	v_dual_mul_f32 v21, v19, v19 :: v_dual_and_b32 v24, 1, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v25, v22, v22 :: v_dual_lshlrev_b32 v20, 30, v20
	v_xor_b32_e32 v31, s0, v10
	v_fmaak_f32 v26, s33, v21, 0x3c0881c4
	v_dual_fmaak_f32 v27, s34, v21, 0xbab64f3b :: v_dual_and_b32 v28, 1, v23
	v_lshlrev_b32_e32 v23, 30, v23
	v_cmp_eq_u32_e32 vcc_lo, 0, v24
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fmaak_f32 v26, v21, v26, 0xbe2aaa9d
	v_fmaak_f32 v29, s33, v25, 0x3c0881c4
	v_add_f64 v[7:8], v[7:8], s[10:11]
	v_and_b32_e32 v20, 0x80000000, v20
	v_mul_f32_e32 v26, v21, v26
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmaak_f32 v29, v25, v29, 0xbe2aaa9d
	v_dual_fmaak_f32 v30, s34, v25, 0xbab64f3b :: v_dual_fmac_f32 v19, v19, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v29, v25, v29
	v_fmaak_f32 v27, v21, v27, 0x3d2aabf7
	v_fmaak_f32 v30, v25, v30, 0x3d2aabf7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v22, v22, v29 :: v_dual_fmaak_f32 v27, v21, v27, 0xbf000004
	v_fmaak_f32 v30, v25, v30, 0xbf000004
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v21, v21, v27, 1.0
	v_fma_f32 v25, v25, v30, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v19, -v19, v21, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v28
	v_and_b32_e32 v23, 0x80000000, v23
	v_xor_b32_e32 v19, v20, v19
	v_cndmask_b32_e32 v22, v25, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v21, v31, v23
	v_cmp_class_f32_e64 vcc_lo, v10, 0x1f8
	v_xor_b32_e32 v20, v21, v22
	v_cndmask_b32_e32 v10, 0x7fc00000, v19, vcc_lo
	v_cvt_f32_f64_e32 v7, v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v19, 0x7fc00000, v20, vcc_lo
	v_fma_f32 v10, v10, v9, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v19, v19, v9, v1
	v_rndne_f32_e32 v10, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rndne_f32_e32 v19, v19
	v_mul_f32_e64 v21, 0x2f800000, |v10|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e64 v20, 0x2f800000, |v19|
	v_floor_f32_e32 v21, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_floor_f32_e32 v20, v20
	v_fma_f32 v20, 0xcf800000, v20, |v19|
	v_ashrrev_i32_e32 v19, 31, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v20, v20
	v_xor_b32_e32 v20, v20, v19
	v_cmp_ngt_f32_e64 s41, 0x48000000, |v7|
	v_readfirstlane_b32 s0, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_sub_nc_u32_e32 v22, v20, v19
	v_fma_f32 v19, 0xcf800000, v21, |v10|
	v_ashrrev_i32_e32 v10, 31, v10
	s_bitset0_b32 s0, 31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v21, 31, v22
	v_cvt_u32_f32_e32 v23, v19
	v_mul_lo_u32 v24, v22, s31
	v_mad_u64_u32 v[19:20], null, v22, s30, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v22, v21, s30
	v_xor_b32_e32 v21, v23, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v21, v21, v10
	v_add3_u32 v20, v20, v24, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v22, 31, v21
	v_lshlrev_b64 v[19:20], 2, v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[21:22], 2, v[21:22]
	v_add_co_u32 v10, vcc_lo, s16, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v20, vcc_lo, s17, v20, vcc_lo
	v_add_co_u32 v19, vcc_lo, v10, v21
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v20, vcc_lo, v20, v22, vcc_lo
	s_and_b32 vcc_lo, exec_lo, s41
	global_load_b32 v19, v[19:20], off
	s_cbranch_vccz .LBB0_39
; %bb.38:                               ;   in Loop: Header=BB0_7 Depth=3
	s_and_b32 s42, s0, 0x7fffff
	s_lshr_b32 s43, s0, 23
	s_bitset1_b32 s42, 23
	s_addk_i32 s43, 0xff88
	s_mul_hi_u32 s44, s42, 0xfe5163ab
	s_mul_i32 s45, s42, 0x3c439041
	s_mul_hi_u32 s46, s42, 0x3c439041
	s_add_u32 s44, s44, s45
	s_addc_u32 s45, 0, s46
	s_mul_i32 s46, s42, 0xdb629599
	s_mul_hi_u32 s47, s42, 0xdb629599
	s_add_u32 s45, s45, s46
	s_addc_u32 s46, 0, s47
	s_mul_i32 s47, s42, 0xf534ddc0
	s_mul_hi_u32 s48, s42, 0xf534ddc0
	s_add_u32 s46, s46, s47
	s_addc_u32 s47, 0, s48
	s_mul_i32 s48, s42, 0xfc2757d1
	s_mul_hi_u32 s49, s42, 0xfc2757d1
	s_add_u32 s47, s47, s48
	s_addc_u32 s48, 0, s49
	s_mul_i32 s49, s42, 0x4e441529
	s_mul_hi_u32 s50, s42, 0x4e441529
	s_add_u32 s48, s48, s49
	s_addc_u32 s49, 0, s50
	s_cmp_gt_u32 s43, 63
	s_mul_i32 s50, s42, 0xfe5163ab
	s_mul_hi_u32 s51, s42, 0xa2f9836e
	s_mul_i32 s42, s42, 0xa2f9836e
	s_cselect_b32 s52, s45, s47
	s_cselect_b32 s44, s44, s46
	s_cselect_b32 s45, s50, s45
	s_add_u32 s42, s49, s42
	s_addc_u32 s49, 0, s51
	s_cmp_gt_u32 s43, 63
	s_cselect_b32 s50, 0xffffffc0, 0
	s_cselect_b32 s46, s46, s48
	s_cselect_b32 s42, s47, s42
	s_cselect_b32 s47, s48, s49
	s_add_i32 s50, s50, s43
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s50, 31
	s_cselect_b32 s43, 0xffffffe0, 0
	s_cselect_b32 s48, s46, s42
	s_cselect_b32 s42, s42, s47
	s_cselect_b32 s46, s52, s46
	s_cselect_b32 s47, s44, s52
	s_cselect_b32 s44, s45, s44
	s_add_i32 s43, s43, s50
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s43, 31
	s_cselect_b32 s45, 0xffffffe0, 0
	s_cselect_b32 s42, s48, s42
	s_cselect_b32 s48, s46, s48
	s_cselect_b32 s46, s47, s46
	s_cselect_b32 s44, s44, s47
	s_add_i32 s45, s45, s43
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s43, 32, s45
	s_cmp_eq_u32 s45, 0
	v_mov_b32_e32 v8, s43
	s_cselect_b32 s45, -1, 0
	v_alignbit_b32 v10, s42, s48, v8
	v_alignbit_b32 v20, s48, s46, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s43, v10
	v_cndmask_b32_e64 v10, v20, s48, s45
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s42, s42, s43
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v20, s42, v10, 30
	s_bfe_u32 s43, s42, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s47, 0, s43
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v20, s47, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v21, v20
	v_min_u32_e32 v21, 32, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v23, 23, v21
	v_alignbit_b32 v8, s46, s44, v8
	v_sub_nc_u32_e32 v22, 31, v21
	v_cndmask_b32_e64 v8, v8, s46, s45
	s_delay_alu instid0(VALU_DEP_1)
	v_alignbit_b32 v10, v10, v8, 30
	v_alignbit_b32 v8, v8, s44, 30
	s_lshr_b32 s44, s42, 29
	s_lshr_b32 s42, s42, 30
	s_lshl_b32 s44, s44, 31
	v_xor_b32_e32 v10, s47, v10
	v_xor_b32_e32 v8, s47, v8
	s_or_b32 s45, s44, 0.5
	s_add_i32 s43, s43, s42
	v_sub_nc_u32_e32 v23, s45, v23
	v_alignbit_b32 v20, v20, v10, v22
	v_alignbit_b32 v8, v10, v8, v22
	s_mov_b32 s42, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v10, v20, v8, 9
	v_lshrrev_b32_e32 v20, 9, v20
	v_clz_i32_u32_e32 v22, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v22, 32, v22
	v_sub_nc_u32_e32 v24, 31, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_alignbit_b32 v8, v10, v8, v24
	v_or_b32_e32 v10, v20, v23
	v_add_nc_u32_e32 v21, v22, v21
	v_lshrrev_b32_e32 v8, 9, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v21, 0x3fc90fda, v10 :: v_dual_lshlrev_b32 v20, 23, v21
	v_sub_nc_u32_e32 v8, v8, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v20, 0x3fc90fda, v10, -v21
	v_add_nc_u32_e32 v8, 0x33000000, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v20, 0x33a22168, v10
	v_or_b32_e32 v8, s44, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v20, 0x3fc90fda, v8
	v_add_f32_e32 v8, v21, v20
	s_branch .LBB0_40
.LBB0_39:                               ;   in Loop: Header=BB0_7 Depth=3
	s_mov_b32 s42, -1
                                        ; implicit-def: $sgpr43
                                        ; implicit-def: $vgpr8
.LBB0_40:                               ; %Flow324
                                        ;   in Loop: Header=BB0_7 Depth=3
	v_mul_f32_e64 v20, 0x3f22f983, |v7|
	v_mov_b32_e32 v10, s43
	s_and_not1_b32 vcc_lo, exec_lo, s42
	s_delay_alu instid0(VALU_DEP_2)
	v_rndne_f32_e32 v20, v20
	s_cbranch_vccnz .LBB0_42
; %bb.41:                               ;   in Loop: Header=BB0_7 Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v8, 0xbfc90fda, v20, |v7|
	v_cvt_i32_f32_e32 v10, v20
	v_fmac_f32_e32 v8, 0xb3a22168, v20
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v8, 0xa7c234c4, v20
.LBB0_42:                               ; %_ZL4cosff.exit226
                                        ;   in Loop: Header=BB0_7 Depth=3
	s_and_b32 vcc_lo, exec_lo, s41
	s_cbranch_vccz .LBB0_44
; %bb.43:                               ;   in Loop: Header=BB0_7 Depth=3
	s_and_b32 s41, s0, 0x7fffff
	s_lshr_b32 s42, s0, 23
	s_bitset1_b32 s41, 23
	s_addk_i32 s42, 0xff88
	s_mul_hi_u32 s43, s41, 0xfe5163ab
	s_mul_i32 s44, s41, 0x3c439041
	s_mul_hi_u32 s45, s41, 0x3c439041
	s_add_u32 s43, s43, s44
	s_addc_u32 s44, 0, s45
	s_mul_i32 s45, s41, 0xdb629599
	s_mul_hi_u32 s46, s41, 0xdb629599
	s_add_u32 s44, s44, s45
	s_addc_u32 s45, 0, s46
	s_mul_i32 s46, s41, 0xf534ddc0
	s_mul_hi_u32 s47, s41, 0xf534ddc0
	s_add_u32 s45, s45, s46
	s_addc_u32 s46, 0, s47
	s_mul_i32 s47, s41, 0xfc2757d1
	s_mul_hi_u32 s48, s41, 0xfc2757d1
	s_add_u32 s46, s46, s47
	s_addc_u32 s47, 0, s48
	s_mul_i32 s48, s41, 0x4e441529
	s_mul_hi_u32 s49, s41, 0x4e441529
	s_add_u32 s47, s47, s48
	s_addc_u32 s48, 0, s49
	s_cmp_gt_u32 s42, 63
	s_mul_i32 s49, s41, 0xfe5163ab
	s_mul_hi_u32 s50, s41, 0xa2f9836e
	s_mul_i32 s41, s41, 0xa2f9836e
	s_cselect_b32 s51, s44, s46
	s_cselect_b32 s43, s43, s45
	s_cselect_b32 s44, s49, s44
	s_add_u32 s41, s48, s41
	s_addc_u32 s48, 0, s50
	s_cmp_gt_u32 s42, 63
	s_cselect_b32 s49, 0xffffffc0, 0
	s_cselect_b32 s45, s45, s47
	s_cselect_b32 s41, s46, s41
	s_cselect_b32 s46, s47, s48
	s_add_i32 s49, s49, s42
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s49, 31
	s_cselect_b32 s42, 0xffffffe0, 0
	s_cselect_b32 s47, s45, s41
	s_cselect_b32 s41, s41, s46
	s_cselect_b32 s45, s51, s45
	s_cselect_b32 s46, s43, s51
	s_cselect_b32 s43, s44, s43
	s_add_i32 s42, s42, s49
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s42, 31
	s_cselect_b32 s44, 0xffffffe0, 0
	s_cselect_b32 s41, s47, s41
	s_cselect_b32 s47, s45, s47
	s_cselect_b32 s45, s46, s45
	s_cselect_b32 s43, s43, s46
	s_add_i32 s44, s44, s42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s42, 32, s44
	s_cmp_eq_u32 s44, 0
	v_mov_b32_e32 v21, s42
	s_cselect_b32 s44, -1, 0
	v_alignbit_b32 v22, s41, s47, v21
	v_alignbit_b32 v23, s47, s45, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s42, v22
	v_cndmask_b32_e64 v22, v23, s47, s44
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s41, s41, s42
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v23, s41, v22, 30
	s_bfe_u32 s42, s41, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s46, 0, s42
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v23, s46, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v24, v23
	v_min_u32_e32 v24, 32, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v26, 23, v24
	v_alignbit_b32 v21, s45, s43, v21
	v_sub_nc_u32_e32 v25, 31, v24
	v_cndmask_b32_e64 v21, v21, s45, s44
	s_delay_alu instid0(VALU_DEP_1)
	v_alignbit_b32 v22, v22, v21, 30
	v_alignbit_b32 v21, v21, s43, 30
	s_lshr_b32 s43, s41, 29
	s_lshr_b32 s41, s41, 30
	s_lshl_b32 s43, s43, 31
	v_xor_b32_e32 v22, s46, v22
	v_xor_b32_e32 v21, s46, v21
	s_or_b32 s44, s43, 0.5
	s_add_i32 s42, s42, s41
	v_sub_nc_u32_e32 v26, s44, v26
	v_alignbit_b32 v23, v23, v22, v25
	v_alignbit_b32 v21, v22, v21, v25
	s_mov_b32 s41, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v22, v23, v21, 9
	v_lshrrev_b32_e32 v23, 9, v23
	v_clz_i32_u32_e32 v25, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v25, 32, v25
	v_sub_nc_u32_e32 v27, 31, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_alignbit_b32 v21, v22, v21, v27
	v_or_b32_e32 v22, v23, v26
	v_add_nc_u32_e32 v24, v25, v24
	v_lshrrev_b32_e32 v21, 9, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v24, 0x3fc90fda, v22 :: v_dual_lshlrev_b32 v23, 23, v24
	v_sub_nc_u32_e32 v21, v21, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v23, 0x3fc90fda, v22, -v24
	v_add_nc_u32_e32 v21, 0x33000000, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v23, 0x33a22168, v22
	v_or_b32_e32 v21, s43, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, 0x3fc90fda, v21
	v_add_f32_e32 v21, v24, v23
	s_branch .LBB0_45
.LBB0_44:                               ;   in Loop: Header=BB0_7 Depth=3
	s_mov_b32 s41, -1
                                        ; implicit-def: $sgpr42
                                        ; implicit-def: $vgpr21
.LBB0_45:                               ; %Flow323
                                        ;   in Loop: Header=BB0_7 Depth=3
	v_mov_b32_e32 v22, s42
	s_and_not1_b32 vcc_lo, exec_lo, s41
	s_cbranch_vccnz .LBB0_47
; %bb.46:                               ;   in Loop: Header=BB0_7 Depth=3
	v_fma_f32 v21, 0xbfc90fda, v20, |v7|
	v_cvt_i32_f32_e32 v22, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v21, 0xb3a22168, v20
	v_fmac_f32_e32 v21, 0xa7c234c4, v20
.LBB0_47:                               ; %_ZL4sinff.exit234
                                        ;   in Loop: Header=BB0_7 Depth=3
	v_dual_mul_f32 v20, v8, v8 :: v_dual_and_b32 v23, 1, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v24, v21, v21
	v_xor_b32_e32 v30, s0, v7
	s_add_i32 s0, s38, -1
	v_dual_fmaak_f32 v25, s33, v20, 0x3c0881c4 :: v_dual_lshlrev_b32 v10, 30, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmaak_f32 v29, s34, v24, 0xbab64f3b
	v_dual_fmaak_f32 v26, s34, v20, 0xbab64f3b :: v_dual_and_b32 v27, 1, v22
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v19, v16, v19 :: v_dual_and_b32 v10, 0x80000000, v10
	v_dual_fmaak_f32 v25, v20, v25, 0xbe2aaa9d :: v_dual_lshlrev_b32 v22, 30, v22
	v_fmaak_f32 v28, s33, v24, 0x3c0881c4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cvt_i32_f32_e32 v19, v19
	v_fmaak_f32 v29, v24, v29, 0x3d2aabf7
	v_mul_f32_e32 v25, v20, v25
	v_cmp_eq_u32_e32 vcc_lo, 0, v23
	v_sub_f32_e32 v18, v16, v18
	v_mul_lo_u32 v19, v19, v19
	v_fmaak_f32 v29, v24, v29, 0xbf000004
	v_fmac_f32_e32 v8, v8, v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_i32_f32_e32 v18, v18
	v_cvt_f32_i32_e32 v19, v19
	v_fmaak_f32 v28, v24, v28, 0xbe2aaa9d
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v18, v18, v18
	v_dual_add_f32 v15, v15, v19 :: v_dual_mul_f32 v28, v24, v28
	v_fmaak_f32 v26, v20, v26, 0x3d2aabf7
	v_fma_f32 v24, v24, v29, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v21, v21, v28 :: v_dual_fmaak_f32 v26, v20, v26, 0xbf000004
	v_fma_f32 v20, v20, v26, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v8, -v8, v20, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v27
	v_and_b32_e32 v22, 0x80000000, v22
	v_xor_b32_e32 v8, v10, v8
	v_cndmask_b32_e32 v21, v24, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v20, v30, v22
	v_cmp_class_f32_e64 vcc_lo, v7, 0x1f8
	v_xor_b32_e32 v10, v20, v21
	v_cndmask_b32_e32 v7, 0x7fc00000, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v8, 0x7fc00000, v10, vcc_lo
	v_fma_f32 v7, v7, v9, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v8, v8, v9, v1
	v_rndne_f32_e32 v7, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v8, v8
	v_mul_f32_e64 v10, 0x2f800000, |v8|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_floor_f32_e32 v10, v10
	v_fma_f32 v9, 0xcf800000, v10, |v8|
	v_ashrrev_i32_e32 v8, 31, v8
	v_mul_f32_e64 v10, 0x2f800000, |v7|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v9, v9
	v_floor_f32_e32 v10, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v9, v9, v8
	v_sub_nc_u32_e32 v9, v9, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v8, 0xcf800000, v10, |v7|
	v_ashrrev_i32_e32 v10, 31, v7
	v_ashrrev_i32_e32 v20, 31, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cvt_u32_f32_e32 v21, v8
	v_mul_lo_u32 v22, v9, s31
	v_mad_u64_u32 v[7:8], null, v9, s30, 0
	v_mul_lo_u32 v20, v20, s30
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v9, v21, v10
	v_sub_nc_u32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v8, v8, v22, v20
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s16, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s17, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v7, v9
	v_add_co_ci_u32_e32 v8, vcc_lo, v8, v10, vcc_lo
	global_load_b32 v20, v[7:8], off
	v_add_nc_u32_e32 v7, s39, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s24, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s25, v8, vcc_lo
	global_load_b32 v21, v[9:10], off
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v20, v16, v20
	v_sub_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v20, v20
	v_fmac_f32_e32 v14, v16, v16
	v_cvt_f32_i32_e32 v16, v18
	v_cvt_f32_i32_e32 v18, s38
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v17, v20, v20
	v_add_f32_e32 v14, v14, v16
	v_cvt_f32_i32_e32 v16, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f32 v25, vcc_lo, v14, v18, v14
	v_cvt_f32_i32_e32 v17, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v15, v15, v17
	v_div_scale_f32 v17, null, v18, v18, v14
	v_div_scale_f32 v19, null, v16, v16, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v20, v17
	v_rcp_f32_e32 v22, v19
	s_waitcnt_depctr 0xfff
	v_fma_f32 v23, -v17, v20, 1.0
	v_fma_f32 v24, -v19, v22, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v20, v23, v20
	v_div_scale_f32 v23, s0, v15, v16, v15
	v_fmac_f32_e32 v22, v24, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v24, v25, v20
	v_mul_f32_e32 v26, v23, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v27, -v17, v24, v25
	v_fma_f32 v28, -v19, v26, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v24, v27, v20
	v_fmac_f32_e32 v26, v28, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v17, -v17, v24, v25
	v_fma_f32 v19, -v19, v26, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v17, v17, v20, v24
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f32 v19, v19, v22, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v17, v17, v18, v14
	v_div_fixup_f32 v16, v19, v16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 1.0, v16
	v_cmp_lt_f32_e64 s0, 0, v16
	s_and_b32 vcc_lo, vcc_lo, s0
	s_mov_b32 s0, exec_lo
	v_cndmask_b32_e32 v18, 1.0, v16, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v17, v17, v18, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_f32_e32 v17, v21
	s_cbranch_execz .LBB0_49
; %bb.48:                               ;   in Loop: Header=BB0_7 Depth=3
	global_store_b32 v[9:10], v17, off
	global_load_b32 v17, v12, s[12:13]
	v_add_co_u32 v9, vcc_lo, s28, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s29, v8, vcc_lo
	v_add_co_u32 v7, vcc_lo, s26, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s27, v8, vcc_lo
	v_cmp_neq_f32_e32 vcc_lo, 0, v16
	v_cndmask_b32_e32 v16, 1.0, v16, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[7:8], v17, off
	global_store_b32 v[9:10], v16, off
.LBB0_49:                               ;   in Loop: Header=BB0_7 Depth=3
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s38, s38, 2
	s_cmp_lt_i32 s40, s37
	s_mov_b32 s39, s40
	s_cbranch_scc1 .LBB0_7
.LBB0_50:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_add_i32 s36, s36, 1
	s_add_i32 s35, s35, 2
	s_cmp_lg_u32 s36, s6
	s_cbranch_scc1 .LBB0_5
.LBB0_51:                               ; %._crit_edge257
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, 36
	s_cbranch_scc0 .LBB0_3
; %bb.52:                               ; %.preheader
	v_cmp_ne_u32_e32 vcc_lo, 1, v13
	s_cbranch_vccnz .LBB0_55
; %bb.53:                               ; %.lr.ph260
	v_mul_lo_u32 v0, v0, s6
	v_ashrrev_i32_e32 v5, 31, v4
	v_mul_lo_u32 v8, v2, s9
	v_mul_lo_u32 v3, v3, s8
	s_mov_b32 s0, 0x51eb851f
	s_mov_b32 s1, 0x40091eb8
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[6:7], null, v2, s8, v[0:1]
	v_add_co_u32 v0, vcc_lo, s28, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s29, v5, vcc_lo
	v_add_co_u32 v2, vcc_lo, s24, v4
	v_add3_u32 v7, v3, v7, v8
	v_add_co_ci_u32_e32 v3, vcc_lo, s25, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s26, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[8:9], 2, v[6:7]
	v_add_co_ci_u32_e32 v5, vcc_lo, s27, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, s20, v8
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, s21, v9, vcc_lo
	v_add_co_u32 v8, vcc_lo, s22, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s23, v9, vcc_lo
.LBB0_54:                               ; =>This Inner Loop Header: Depth=1
	global_load_b32 v10, v[0:1], off
	global_load_b32 v11, v[2:3], off
	s_add_i32 s6, s6, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s6, 0
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v10, 0x42100000, v10 :: v_dual_add_f32 v11, 0x42100000, v11
	v_div_scale_f32 v12, null, v11, v11, v10
	v_div_scale_f32 v14, vcc_lo, v10, v11, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v13, v12
	s_waitcnt_depctr 0xfff
	v_fma_f32 v15, -v12, v13, 1.0
	v_fmac_f32_e32 v13, v15, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v14, v13
	v_fma_f32 v16, -v12, v15, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v16, v13
	v_fma_f32 v12, -v12, v15, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v12, v12, v13, v15
	v_div_fixup_f32 v10, v12, v11, v10
	global_store_b32 v[6:7], v10, off
	global_load_b32 v10, v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v10, 0x43340000, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[10:11], v10
	v_div_scale_f64 v[12:13], null, s[0:1], s[0:1], v[10:11]
	v_div_scale_f64 v[18:19], vcc_lo, v[10:11], s[0:1], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[14:15], v[12:13]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0
	v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0
	v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[16:17], v[18:19], v[14:15]
	v_fma_f64 v[12:13], -v[12:13], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fmas_f64 v[12:13], v[12:13], v[14:15], v[16:17]
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, v6, 4
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	v_div_fixup_f64 v[10:11], v[12:13], s[0:1], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v10, v[10:11]
	global_store_b32 v[8:9], v10, off
	v_add_co_u32 v8, vcc_lo, v8, 4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_cbranch_scc1 .LBB0_54
.LBB0_55:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9getMatrixPfS_S_S_S_S_S_mmii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 32
		.amdhsa_next_free_sgpr 53
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9getMatrixPfS_S_S_S_S_S_mmii, .Lfunc_end0-_Z9getMatrixPfS_S_S_S_S_S_mmii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 9380
; NumSgprs: 55
; NumVgprs: 32
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 6
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 55
; NumVGPRsForWavesPerEU: 32
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           8
        .value_kind:     by_value
      - .offset:         64
        .size:           8
        .value_kind:     by_value
      - .offset:         72
        .size:           4
        .value_kind:     by_value
      - .offset:         76
        .size:           4
        .value_kind:     by_value
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         84
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         88
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         92
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         94
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         96
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         98
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         100
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         102
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         144
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 336
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9getMatrixPfS_S_S_S_S_S_mmii
    .private_segment_fixed_size: 0
    .sgpr_count:     55
    .sgpr_spill_count: 0
    .symbol:         _Z9getMatrixPfS_S_S_S_S_S_mmii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     32
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
