#include <iostream>
#include "../ginkgo/GOrderHandler.h"
#include <thrust/device_vector.h>
#define def_dvec(t) thrust::device_vector<t>

using namespace std;

__global__ void test(){
    // Creating an OrderHandler struct
    gpu_ginkgo::OrderHandler<100, 10> ggoh(1024, 10);
    ggoh.showOrderBookInfo();
    ggoh.loadStrategy(33, 0., 0.);
    
    // Start Updating Book
    printf("{{{{{{{{{{{{{  NEW BOOK UPDATE }}}}}}}}}}}}}\n");
    int bz1[10] = {1,2,3,4,5,5,4,3,2,1};
    int ap1 = 1029, bp1 = 1028;
    double mp1 = 1028.5;
    ggoh.getTimeInfo(1., 0.2);
    ggoh.bookUpdateSim(bz1, ap1, bp1, mp1);
    ggoh.cancelAndSendNewOrders();
    ggoh.showBasicInfo();
    ggoh.showOrderBookInfo();
    
    // New book Update
    printf("{{{{{{{{{{{{{  NEW BOOK UPDATE }}}}}}}}}}}}}\n");
    int bz2[10] = {1, 3, 5, 7, 9, 11, 11, 9, 7, 5};
    int ap2 = 1030, bp2 = 1029;
    double mp2 = 1029.5;
    ggoh.getTimeInfo(1.3, 0.2);
    ggoh.bookUpdateSim(bz2, ap2, bp2, mp2);
    ggoh.cancelAndSendNewOrders();
    ggoh.showBasicInfo();
    ggoh.showOrderBookInfo();
    
    // New book Update
    printf("{{{{{{{{{{{{{  NEW BOOK UPDATE }}}}}}}}}}}}}\n");
    int bz3[10] = {3, 23, 4, 2, 3, 1, 9, 9, 7, 5};
    int ap3 = 1032, bp3 = 1031;
    double mp3 = 1031.5;
    ggoh.getTimeInfo(1.3, 0.2);
    ggoh.bookUpdateSim(bz3, ap3, bp3, mp3);
    ggoh.cancelAndSendNewOrders();
    ggoh.showBasicInfo();
    ggoh.showOrderBookInfo();
    
    // trade
    printf("{{{{{{{{{{{{{  TRADE COMES }}}}}}}}}}}}}\n");
    int tv = 32;
    ggoh.getTimeInfo(1.6, 0.2);
    ggoh.processTrade(true, 1028, tv);
    ggoh.cancelAndSendNewOrders();
    ggoh.showBasicInfo();
    ggoh.showOrderBookInfo();
    
    // Test finished
    printf("\n <<< TEST FINISHED !!! >>>\n");
}

int main(){
    def_dvec(float) dev_out(1, 0);
    test<<<1, 1>>>();
    return 0;
}
	.file	"tmpxft_00253990_00000000-6_GOrderHandler_test.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi
	.type	_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi, @function
_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi:
.LFB8287:
	.cfi_startproc
	endbr64
	movq	%rdi, %rdx
	movl	%esi, %eax
	ret
	.cfi_endproc
.LFE8287:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi, .-_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi
	.type	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi, @function
_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi:
.LFB8289:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	cmpq	%rdi, 8(%rsi)
	jne	.L2
	cmpl	%edx, (%rsi)
	sete	%al
.L2:
	ret
	.cfi_endproc
.LFE8289:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi, .-_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv.str1.1,"aMS",@progbits,1
.LC1:
	.string	"generic"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv:
.LFB8299:
	.cfi_startproc
	endbr64
	leaq	.LC1(%rip), %rax
	ret
	.cfi_endproc
.LFE8299:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv.str1.1,"aMS",@progbits,1
.LC2:
	.string	"system"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv:
.LFB8304:
	.cfi_startproc
	endbr64
	leaq	.LC2(%rip), %rax
	ret
	.cfi_endproc
.LFE8304:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev:
.LFB8309:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE8309:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev,_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev:
.LFB8314:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE8314:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev,_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE
	.type	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE, @function
_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE:
.LFB8288:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdx, %rbx
	call	*24(%rax)
	movq	%rdx, %rcx
	xorl	%edx, %edx
	cmpq	%rcx, 8(%rbx)
	jne	.L11
	cmpl	%eax, (%rbx)
	sete	%dl
.L11:
	movl	%edx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8288:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE, .-_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv.str1.1,"aMS",@progbits,1
.LC3:
	.string	"cuda"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv
	.type	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv, @function
_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv:
.LFB8364:
	.cfi_startproc
	endbr64
	leaq	.LC3(%rip), %rax
	ret
	.cfi_endproc
.LFE8364:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv, .-_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev:
.LFB8369:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE8369:
	.size	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev,_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev
	.text
	.type	nvtxDomainRangePop, @function
nvtxDomainRangePop:
.LFB8521:
	.cfi_startproc
	movq	424+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L18
	jmp	*%rax
.L18:
	movl	$-2, %eax
	ret
	.cfi_endproc
.LFE8521:
	.size	nvtxDomainRangePop, .-nvtxDomainRangePop
	.section	.text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
	.weak	nvtxEtiGetModuleFunctionTable_v3
	.hidden	nvtxEtiGetModuleFunctionTable_v3
	.type	nvtxEtiGetModuleFunctionTable_v3, @function
nvtxEtiGetModuleFunctionTable_v3:
.LFB8532:
	.cfi_startproc
	endbr64
	decl	%edi
	xorl	%eax, %eax
	cmpl	$5, %edi
	ja	.L19
	leaq	.L22(%rip), %rcx
	movslq	(%rcx,%rdi,4), %rax
	addq	%rcx, %rax
	notrack jmp	*%rax
	.section	.rodata.nvtxEtiGetModuleFunctionTable_v3,"aG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
	.align 4
	.align 4
.L22:
	.long	.L27-.L22
	.long	.L32-.L22
	.long	.L25-.L22
	.long	.L24-.L22
	.long	.L23-.L22
	.long	.L21-.L22
	.section	.text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
.L27:
	leaq	560+nvtxGlobals_v3(%rip), %rcx
	jmp	.L36
.L25:
	leaq	776+nvtxGlobals_v3(%rip), %rcx
	movl	$128, %eax
	jmp	.L26
.L24:
	leaq	904+nvtxGlobals_v3(%rip), %rcx
	jmp	.L37
.L23:
	leaq	968+nvtxGlobals_v3(%rip), %rcx
.L36:
	movl	$136, %eax
	jmp	.L26
.L21:
	leaq	1104+nvtxGlobals_v3(%rip), %rcx
.L37:
	movl	$64, %eax
	jmp	.L26
.L32:
	leaq	696+nvtxGlobals_v3(%rip), %rcx
	movl	$80, %eax
.L26:
	testq	%rdx, %rdx
	je	.L28
	shrl	$3, %eax
	decl	%eax
	movl	%eax, (%rdx)
.L28:
	testq	%rsi, %rsi
	jne	.L29
.L30:
	movl	$1, %eax
	ret
.L29:
	movq	%rcx, (%rsi)
	jmp	.L30
.L19:
	ret
	.cfi_endproc
.LFE8532:
	.size	nvtxEtiGetModuleFunctionTable_v3, .-nvtxEtiGetModuleFunctionTable_v3
	.section	.text.nvtxGetExportTable_v3,"axG",@progbits,nvtxGetExportTable_v3,comdat
	.weak	nvtxGetExportTable_v3
	.hidden	nvtxGetExportTable_v3
	.type	nvtxGetExportTable_v3, @function
nvtxGetExportTable_v3:
.LFB8533:
	.cfi_startproc
	endbr64
	leaq	8+nvtxGlobals_v3(%rip), %rax
	cmpl	$1, %edi
	je	.L38
	cmpl	$3, %edi
	leaq	16(%rax), %rax
	movl	$0, %edx
	cmovne	%rdx, %rax
.L38:
	ret
	.cfi_endproc
.LFE8533:
	.size	nvtxGetExportTable_v3, .-nvtxGetExportTable_v3
	.section	.text.nvtxEtiSetInjectionNvtxVersion_v3,"axG",@progbits,nvtxEtiSetInjectionNvtxVersion_v3,comdat
	.weak	nvtxEtiSetInjectionNvtxVersion_v3
	.hidden	nvtxEtiSetInjectionNvtxVersion_v3
	.type	nvtxEtiSetInjectionNvtxVersion_v3, @function
nvtxEtiSetInjectionNvtxVersion_v3:
.LFB8534:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE8534:
	.size	nvtxEtiSetInjectionNvtxVersion_v3, .-nvtxEtiSetInjectionNvtxVersion_v3
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv:
.LFB9604:
	.cfi_startproc
	endbr64
	movq	8(%rdi), %rax
	ret
	.cfi_endproc
.LFE9604:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev, @function
_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev:
.LFB12414:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE12414:
	.size	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev, .-_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED1Ev,_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev:
.LFB12479:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE12479:
	.size	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED1Ev,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev
	.section	.text._ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_
	.type	_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_, @function
_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_:
.LFB12633:
	.cfi_startproc
	endbr64
	cmpq	%rdi, %rsi
	sete	%al
	ret
	.cfi_endproc
.LFE12633:
	.size	_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_, .-_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_
	.section	.text._ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_
	.type	_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_, @function
_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_:
.LFB12634:
	.cfi_startproc
	endbr64
	cmpq	%rdi, %rsi
	sete	%al
	ret
	.cfi_endproc
.LFE12634:
	.size	_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_, .-_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev:
.LFB8311:
	.cfi_startproc
	endbr64
	movl	$8, %esi
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE8311:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev:
.LFB8316:
	.cfi_startproc
	endbr64
	movl	$8, %esi
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE8316:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev:
.LFB8371:
	.cfi_startproc
	endbr64
	movl	$8, %esi
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE8371:
	.size	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev, @function
_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev:
.LFB12416:
	.cfi_startproc
	endbr64
	movl	$16, %esi
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE12416:
	.size	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev, .-_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev:
.LFB12481:
	.cfi_startproc
	endbr64
	movl	$8, %esi
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE12481:
	.size	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev
	.section	.text._ZN4cuda3__410cuda_errorD2Ev,"axG",@progbits,_ZN4cuda3__410cuda_errorD5Ev,comdat
	.align 2
	.weak	_ZN4cuda3__410cuda_errorD2Ev
	.type	_ZN4cuda3__410cuda_errorD2Ev, @function
_ZN4cuda3__410cuda_errorD2Ev:
.LFB6815:
	.cfi_startproc
	endbr64
	leaq	16+_ZTVN4cuda3__410cuda_errorE(%rip), %rax
	movq	%rax, (%rdi)
	jmp	_ZNSt13runtime_errorD2Ev@PLT
	.cfi_endproc
.LFE6815:
	.size	_ZN4cuda3__410cuda_errorD2Ev, .-_ZN4cuda3__410cuda_errorD2Ev
	.weak	_ZN4cuda3__410cuda_errorD1Ev
	.set	_ZN4cuda3__410cuda_errorD1Ev,_ZN4cuda3__410cuda_errorD2Ev
	.section	.text._ZN4cuda3__410cuda_errorD0Ev,"axG",@progbits,_ZN4cuda3__410cuda_errorD5Ev,comdat
	.align 2
	.weak	_ZN4cuda3__410cuda_errorD0Ev
	.type	_ZN4cuda3__410cuda_errorD0Ev, @function
_ZN4cuda3__410cuda_errorD0Ev:
.LFB6817:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	_ZN4cuda3__410cuda_errorD1Ev
	movq	8(%rsp), %rdi
	movl	$16, %esi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE6817:
	.size	_ZN4cuda3__410cuda_errorD0Ev, .-_ZN4cuda3__410cuda_errorD0Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system12system_errorD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev:
.LFB8373:
	.cfi_startproc
	endbr64
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE(%rip), %rax
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	leaq	32(%rdi), %rdi
	movq	%rax, -32(%rdi)
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt13runtime_errorD2Ev@PLT
	.cfi_endproc
.LFE8373:
	.size	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev,_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system12system_errorD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev:
.LFB8375:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev
	movq	8(%rsp), %rdi
	movl	$64, %esi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE8375:
	.size	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev:
.LFB9601:
	.cfi_startproc
	endbr64
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rax
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	leaq	8(%rdi), %rdi
	movq	%rax, -8(%rdi)
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt9bad_allocD2Ev@PLT
	.cfi_endproc
.LFE9601:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev:
.LFB9603:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev
	movq	8(%rsp), %rdi
	movl	$40, %esi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE9603:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev
	.text
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB11487:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE11487:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv.str1.1,"aMS",@progbits,1
.LC4:
	.string	": "
.LC5:
	.string	"basic_string::append"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv
	.type	_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv, @function
_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv:
.LFB8396:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA8396
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	cmpq	$0, 40(%rdi)
	jne	.L68
	call	_ZNKSt13runtime_error4whatEv@PLT
	leaq	32(%rbx), %r13
	movq	%rax, %rdi
	movq	%rax, %rbp
	call	strlen@PLT
	movq	40(%rbx), %rdx
	movq	%rbp, %rcx
	xorl	%esi, %esi
	movq	%rax, %r8
	movq	%r13, %rdi
.LEHB0:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@PLT
	cmpl	$0, 16(%rbx)
	je	.L68
	cmpq	$0, 40(%rbx)
	jne	.L70
.L72:
	movq	24(%rbx), %rsi
	leaq	8(%rsp), %r12
	movl	16(%rbx), %edx
	movq	%r12, %rdi
	movq	(%rsi), %rax
	call	*48(%rax)
	jmp	.L84
.L70:
	leaq	.LC4(%rip), %rsi
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT
.LEHE0:
	jmp	.L72
.L84:
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movabsq	$4611686018427387903, %rax
	subq	40(%rbx), %rax
	cmpq	%rdx, %rax
	jnb	.L73
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L83
	leaq	.LC5(%rip), %rdi
.LEHB1:
	call	_ZSt20__throw_length_errorPKc@PLT
.L73:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_appendEPKcm@PLT
.LEHE1:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
.L68:
	movq	32(%rbx), %rbx
	jmp	.L66
.L80:
	endbr64
	movq	%rax, %rbp
.L75:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbp, %rdi
	jmp	.L76
.L79:
	endbr64
	movq	%rax, %rdi
.L76:
	call	__cxa_begin_catch@PLT
	movq	%rbx, %rdi
	call	_ZNKSt13runtime_error4whatEv@PLT
	movq	%rax, %rbx
	call	__cxa_end_catch@PLT
.L66:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L78
.L83:
	call	__stack_chk_fail@PLT
.L78:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8396:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,comdat
	.align 4
.LLSDA8396:
	.byte	0xff
	.byte	0x9b
	.uleb128 .LLSDATT8396-.LLSDATTD8396
.LLSDATTD8396:
	.byte	0x1
	.uleb128 .LLSDACSE8396-.LLSDACSB8396
.LLSDACSB8396:
	.uleb128 .LEHB0-.LFB8396
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L79-.LFB8396
	.uleb128 0x1
	.uleb128 .LEHB1-.LFB8396
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L80-.LFB8396
	.uleb128 0x3
.LLSDACSE8396:
	.byte	0x1
	.byte	0
	.byte	0
	.byte	0x7d
	.align 4
	.long	0

.LLSDATT8396:
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,comdat
	.size	_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv, .-_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv
	.section	.text._ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,"axG",@progbits,_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,comdat
	.weak	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.hidden	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.type	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, @function
_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv:
.LFB11899:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L85
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L85:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L87
	call	__stack_chk_fail@PLT
.L87:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11899:
	.size	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, .-_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.section	.text._ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_
	.hidden	_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_
	.type	_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_, @function
_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_:
.LFB11979:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movd	%xmm0, %eax
	movq	%rsi, (%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rax, 8(%rsp)
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rax
	movq	%rdi, 16(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L89
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L89:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L91
	call	__stack_chk_fail@PLT
.L91:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11979:
	.size	_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_, .-_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_
	.section	.rodata._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc.str1.1,"aMS",@progbits,1
.LC6:
	.string	"cudaError %d: %s"
	.section	.text.unlikely._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,"axG",@progbits,_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,comdat
	.weak	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc
	.hidden	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc
	.type	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc, @function
_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc:
.LFB6813:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA6813
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$288, %rsp
	.cfi_def_cfa_offset 320
	movl	%edi, 12(%rsp)
	movl	$16, %edi
	leaq	24(%rsp), %r12
	movq	%fs:40, %rax
	movq	%rax, 280(%rsp)
	xorl	%eax, %eax
	call	__cxa_allocate_exception@PLT
	leaq	24(%rsp), %rdi
	movl	$64, %ecx
	leaq	.LC6(%rip), %r8
	movq	%rax, %rbx
	xorl	%eax, %eax
	movl	$256, %esi
	rep stosl
	pushq	%rdx
	.cfi_def_cfa_offset 328
	movl	$256, %ecx
	movl	$2, %edx
	pushq	%rbp
	.cfi_def_cfa_offset 336
	movl	28(%rsp), %r9d
	movq	%r12, %rdi
	call	__snprintf_chk@PLT
	popq	%rcx
	.cfi_def_cfa_offset 328
	movq	%rbx, %rdi
	popq	%rsi
	.cfi_def_cfa_offset 320
	movq	%r12, %rsi
	call	_ZNSt13runtime_errorC2EPKc@PLT
	leaq	16+_ZTVN4cuda3__410cuda_errorE(%rip), %rax
	movq	%rax, (%rbx)
	movq	280(%rsp), %rax
	subq	%fs:40, %rax
	je	.L94
	call	__stack_chk_fail@PLT
.L94:
	leaq	_ZN4cuda3__410cuda_errorD1Ev(%rip), %rdx
	leaq	_ZTIN4cuda3__410cuda_errorE(%rip), %rsi
	movq	%rbx, %rdi
.LEHB2:
	call	__cxa_throw@PLT
.LEHE2:
	.cfi_endproc
.LFE6813:
	.section	.gcc_except_table._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,"aG",@progbits,_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,comdat
.LLSDA6813:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE6813-.LLSDACSB6813
.LLSDACSB6813:
	.uleb128 .LEHB2-.LFB6813
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE6813:
	.section	.text.unlikely._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,"axG",@progbits,_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,comdat
	.size	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc, .-_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc
	.section	.rodata._ZN4cuda3__423__ensure_current_deviceD2Ev.str1.1,"aMS",@progbits,1
.LC7:
	.string	"Failed to set device"
	.section	.text._ZN4cuda3__423__ensure_current_deviceD2Ev,"axG",@progbits,_ZN4cuda3__423__ensure_current_deviceD5Ev,comdat
	.align 2
	.weak	_ZN4cuda3__423__ensure_current_deviceD2Ev
	.type	_ZN4cuda3__423__ensure_current_deviceD2Ev, @function
_ZN4cuda3__423__ensure_current_deviceD2Ev:
.LFB6822:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA6822
	endbr64
	movl	4(%rdi), %eax
	cmpl	(%rdi), %eax
	je	.L103
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%eax, %edi
	call	cudaSetDevice@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L97
	call	cudaGetLastError@PLT
	leaq	.LC7(%rip), %rsi
	movl	%ebx, %edi
	call	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc
.L97:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
.L103:
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE6822:
	.section	.gcc_except_table._ZN4cuda3__423__ensure_current_deviceD2Ev,"aG",@progbits,_ZN4cuda3__423__ensure_current_deviceD5Ev,comdat
.LLSDA6822:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE6822-.LLSDACSB6822
.LLSDACSB6822:
.LLSDACSE6822:
	.section	.text._ZN4cuda3__423__ensure_current_deviceD2Ev,"axG",@progbits,_ZN4cuda3__423__ensure_current_deviceD5Ev,comdat
	.size	_ZN4cuda3__423__ensure_current_deviceD2Ev, .-_ZN4cuda3__423__ensure_current_deviceD2Ev
	.weak	_ZN4cuda3__423__ensure_current_deviceD1Ev
	.set	_ZN4cuda3__423__ensure_current_deviceD1Ev,_ZN4cuda3__423__ensure_current_deviceD2Ev
	.section	.text._ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st,"axG",@progbits,_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st,comdat
	.weak	_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st
	.type	_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st, @function
_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st:
.LFB7059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	call	cudaStreamSynchronize@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L109
	testl	%eax, %eax
	jne	.L106
.L109:
	movl	%ebx, %eax
.L106:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7059:
	.size	_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st, .-_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv
	.type	_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv, @function
_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv:
.LFB8307:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leaq	_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip), %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 32
	movb	_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip), %al
	testb	%al, %al
	jne	.L116
	leaq	_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L116
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE(%rip), %rax
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev(%rip), %rdi
	movq	%rbx, %rsi
	leaq	__dso_handle(%rip), %rdx
	movq	%rax, _ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip)
	call	__cxa_atexit@PLT
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L116:
	movq	%rbx, %rax
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8307:
	.size	_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv, .-_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei:
.LFB8305:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	call	_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv
	movl	12(%rsp), %edx
	movq	%rbx, %rdi
	movq	%rax, %rsi
	movq	(%rax), %rax
	call	*48(%rax)
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L123
	call	__stack_chk_fail@PLT
.L123:
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8305:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv
	.type	_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv, @function
_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv:
.LFB8312:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leaq	_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip), %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 32
	movb	_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip), %al
	testb	%al, %al
	jne	.L127
	leaq	_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L127
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE(%rip), %rax
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev(%rip), %rdi
	movq	%rbx, %rsi
	leaq	__dso_handle(%rip), %rdx
	movq	%rax, _ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip)
	call	__cxa_atexit@PLT
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L127:
	movq	%rbx, %rax
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8312:
	.size	_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv, .-_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE
	.type	_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE, @function
_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE:
.LFB8357:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%edi, %ebx
	call	_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv
	movq	%rax, %rdx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8357:
	.size	_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE, .-_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi:
.LFB8306:
	.cfi_startproc
	endbr64
	leal	-9901(%rsi), %eax
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%esi, %ebx
	cmpl	$78, %eax
	ja	.L136
	leaq	.L138(%rip), %rdx
	movslq	(%rdx,%rax,4), %rax
	addq	%rdx, %rax
	notrack jmp	*%rax
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,comdat
	.align 4
	.align 4
.L138:
	.long	.L215-.L138
	.long	.L214-.L138
	.long	.L213-.L138
	.long	.L212-.L138
	.long	.L211-.L138
	.long	.L210-.L138
	.long	.L209-.L138
	.long	.L208-.L138
	.long	.L207-.L138
	.long	.L206-.L138
	.long	.L205-.L138
	.long	.L204-.L138
	.long	.L203-.L138
	.long	.L202-.L138
	.long	.L201-.L138
	.long	.L200-.L138
	.long	.L199-.L138
	.long	.L198-.L138
	.long	.L197-.L138
	.long	.L196-.L138
	.long	.L195-.L138
	.long	.L194-.L138
	.long	.L193-.L138
	.long	.L192-.L138
	.long	.L191-.L138
	.long	.L190-.L138
	.long	.L189-.L138
	.long	.L188-.L138
	.long	.L187-.L138
	.long	.L186-.L138
	.long	.L185-.L138
	.long	.L184-.L138
	.long	.L183-.L138
	.long	.L182-.L138
	.long	.L181-.L138
	.long	.L180-.L138
	.long	.L136-.L138
	.long	.L179-.L138
	.long	.L178-.L138
	.long	.L177-.L138
	.long	.L176-.L138
	.long	.L175-.L138
	.long	.L174-.L138
	.long	.L173-.L138
	.long	.L172-.L138
	.long	.L171-.L138
	.long	.L170-.L138
	.long	.L169-.L138
	.long	.L168-.L138
	.long	.L167-.L138
	.long	.L166-.L138
	.long	.L165-.L138
	.long	.L164-.L138
	.long	.L163-.L138
	.long	.L162-.L138
	.long	.L161-.L138
	.long	.L160-.L138
	.long	.L159-.L138
	.long	.L158-.L138
	.long	.L157-.L138
	.long	.L156-.L138
	.long	.L155-.L138
	.long	.L154-.L138
	.long	.L153-.L138
	.long	.L152-.L138
	.long	.L151-.L138
	.long	.L150-.L138
	.long	.L149-.L138
	.long	.L148-.L138
	.long	.L147-.L138
	.long	.L146-.L138
	.long	.L145-.L138
	.long	.L144-.L138
	.long	.L143-.L138
	.long	.L142-.L138
	.long	.L141-.L138
	.long	.L140-.L138
	.long	.L139-.L138
	.long	.L137-.L138
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,comdat
.L215:
	movl	$9901, %edi
	jmp	.L217
.L214:
	movl	$9902, %edi
	jmp	.L217
.L213:
	movl	$9903, %edi
	jmp	.L217
.L212:
	movl	$9904, %edi
	jmp	.L217
.L171:
	movl	$9946, %edi
	jmp	.L217
.L170:
	movl	$9947, %edi
	jmp	.L217
.L169:
	movl	$9948, %edi
	jmp	.L217
.L168:
	movl	$9949, %edi
	jmp	.L217
.L211:
	movl	$9905, %edi
	jmp	.L217
.L167:
	movl	$9950, %edi
	jmp	.L217
.L210:
	movl	$9906, %edi
	jmp	.L217
.L209:
	movl	$9907, %edi
	jmp	.L217
.L208:
	movl	$9908, %edi
	jmp	.L217
.L207:
	movl	$9909, %edi
	jmp	.L217
.L166:
	movl	$9951, %edi
	jmp	.L217
.L206:
	movl	$9910, %edi
	jmp	.L217
.L165:
	movl	$9952, %edi
	jmp	.L217
.L164:
	movl	$9953, %edi
	jmp	.L217
.L163:
	movl	$9954, %edi
	jmp	.L217
.L162:
	movl	$9955, %edi
	jmp	.L217
.L161:
	movl	$9956, %edi
	jmp	.L217
.L160:
	movl	$9957, %edi
	jmp	.L217
.L175:
	movl	$9942, %edi
	jmp	.L217
.L205:
	movl	$9911, %edi
	jmp	.L217
.L204:
	movl	$9912, %edi
	jmp	.L217
.L172:
	movl	$9945, %edi
	jmp	.L217
.L159:
	movl	$9958, %edi
	jmp	.L217
.L158:
	movl	$9959, %edi
	jmp	.L217
.L174:
	movl	$9943, %edi
	jmp	.L217
.L157:
	movl	$9960, %edi
	jmp	.L217
.L156:
	movl	$9961, %edi
	jmp	.L217
.L155:
	movl	$9962, %edi
	jmp	.L217
.L203:
	movl	$9913, %edi
	jmp	.L217
.L202:
	movl	$9914, %edi
	jmp	.L217
.L201:
	movl	$9915, %edi
	jmp	.L217
.L200:
	movl	$9916, %edi
	jmp	.L217
.L199:
	movl	$9917, %edi
	jmp	.L217
.L154:
	movl	$9963, %edi
	jmp	.L217
.L198:
	movl	$9918, %edi
	jmp	.L217
.L153:
	movl	$9964, %edi
	jmp	.L217
.L197:
	movl	$9919, %edi
	jmp	.L217
.L196:
	movl	$9920, %edi
	jmp	.L217
.L195:
	movl	$9921, %edi
	jmp	.L217
.L152:
	movl	$9965, %edi
	jmp	.L217
.L194:
	movl	$9922, %edi
	jmp	.L217
.L151:
	movl	$9966, %edi
	jmp	.L217
.L150:
	movl	$9967, %edi
	jmp	.L217
.L149:
	movl	$9968, %edi
	jmp	.L217
.L148:
	movl	$9969, %edi
	jmp	.L217
.L147:
	movl	$9970, %edi
	jmp	.L217
.L193:
	movl	$9923, %edi
	jmp	.L217
.L192:
	movl	$9924, %edi
	jmp	.L217
.L191:
	movl	$9925, %edi
	jmp	.L217
.L146:
	movl	$9971, %edi
	jmp	.L217
.L190:
	movl	$9926, %edi
	jmp	.L217
.L189:
	movl	$9927, %edi
	jmp	.L217
.L188:
	movl	$9928, %edi
	jmp	.L217
.L145:
	movl	$9972, %edi
	jmp	.L217
.L187:
	movl	$9929, %edi
	jmp	.L217
.L186:
	movl	$9930, %edi
	jmp	.L217
.L185:
	movl	$9931, %edi
	jmp	.L217
.L144:
	movl	$9973, %edi
	jmp	.L217
.L184:
	movl	$9932, %edi
	jmp	.L217
.L183:
	movl	$9933, %edi
	jmp	.L217
.L143:
	movl	$9974, %edi
	jmp	.L217
.L142:
	movl	$9975, %edi
	jmp	.L217
.L141:
	movl	$9976, %edi
	jmp	.L217
.L173:
	movl	$9944, %edi
	jmp	.L217
.L182:
	movl	$9934, %edi
	jmp	.L217
.L181:
	movl	$9935, %edi
	jmp	.L217
.L180:
	movl	$9936, %edi
	jmp	.L217
.L179:
	movl	$9938, %edi
	jmp	.L217
.L140:
	movl	$9977, %edi
	jmp	.L217
.L139:
	movl	$9978, %edi
	jmp	.L217
.L137:
	movl	$9979, %edi
	jmp	.L217
.L178:
	movl	$9939, %edi
	jmp	.L217
.L177:
	movl	$9940, %edi
	jmp	.L217
.L176:
	movl	$9941, %edi
.L217:
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE
.L136:
	.cfi_restore_state
	call	_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv
	movq	%rax, %rdx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8306:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv
	.type	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv, @function
_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv:
.LFB8367:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leaq	_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip), %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 32
	movb	_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip), %al
	testb	%al, %al
	jne	.L220
	leaq	_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L220
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE(%rip), %rax
	leaq	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev(%rip), %rdi
	movq	%rbx, %rsi
	leaq	__dso_handle(%rip), %rdx
	movq	%rax, _ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip)
	call	__cxa_atexit@PLT
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L220:
	movq	%rbx, %rax
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8367:
	.size	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv, .-_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi
	.type	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi, @function
_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi:
.LFB8366:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%esi, %ebx
	cmpl	$998, %esi
	jg	.L227
	call	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv
	movq	%rax, %rdx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	ret
.L227:
	.cfi_restore_state
	call	_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv
	movl	%ebx, %esi
	popq	%rbx
	.cfi_def_cfa_offset 8
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	24(%rax), %rax
	jmp	*%rax
	.cfi_endproc
.LFE8366:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi, .-_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi
	.section	.text._ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	.type	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc, @function
_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc:
.LFB8411:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA8411
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rcx
	.cfi_def_cfa_offset 48
.LEHB3:
	call	cudaGetLastError@PLT
.LEHE3:
	testl	%ebp, %ebp
	je	.L231
	movl	$64, %edi
	call	__cxa_allocate_exception@PLT
	movq	%rax, %rbx
	call	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv
	movq	%r13, %rsi
	movq	%rbx, %rdi
	movq	%rax, %r12
.LEHB4:
	call	_ZNSt13runtime_errorC2EPKc@PLT
.LEHE4:
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE(%rip), %rax
	xorl	%edx, %edx
	movl	%ebp, 16(%rbx)
	movq	%rbx, %rdi
	movq	%rax, (%rbx)
	leaq	48(%rbx), %rax
	leaq	_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE(%rip), %rsi
	movq	%rdx, 40(%rbx)
	leaq	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev(%rip), %rdx
	movq	%r12, 24(%rbx)
	movq	%rax, 32(%rbx)
	movb	$0, 48(%rbx)
.LEHB5:
	call	__cxa_throw@PLT
.L234:
	endbr64
	movq	%rax, %rbp
.L233:
	movq	%rbx, %rdi
	call	__cxa_free_exception@PLT
	movq	%rbp, %rdi
	call	_Unwind_Resume@PLT
.LEHE5:
.L231:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8411:
	.section	.gcc_except_table._ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,comdat
.LLSDA8411:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE8411-.LLSDACSB8411
.LLSDACSB8411:
	.uleb128 .LEHB3-.LFB8411
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB4-.LFB8411
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L234-.LFB8411
	.uleb128 0
	.uleb128 .LEHB5-.LFB8411
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
.LLSDACSE8411:
	.section	.text._ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc, .-_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	.section	.rodata._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm.str1.1,"aMS",@progbits,1
.LC8:
	.string	"CUDA free failed"
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm
	.type	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm, @function
_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm:
.LFB12501:
	.cfi_startproc
	endbr64
	pushq	%rcx
	.cfi_def_cfa_offset 16
	movq	%rsi, %rdi
	call	cudaFree@PLT
	testl	%eax, %eax
	je	.L236
	movl	%eax, %edi
	leaq	.LC8(%rip), %rsi
	popq	%rdx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
.L236:
	.cfi_restore_state
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12501:
	.size	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm, .-_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm
	.section	.text._ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm
	.type	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm, @function
_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm:
.LFB12485:
	.cfi_startproc
	endbr64
	movq	8(%rdi), %rdi
	jmp	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm
	.cfi_endproc
.LFE12485:
	.size	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm, .-_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm
	.section	.text.nvtxSetInitFunctionsToNoops_v3,"axG",@progbits,nvtxSetInitFunctionsToNoops_v3,comdat
	.weak	nvtxSetInitFunctionsToNoops_v3
	.hidden	nvtxSetInitFunctionsToNoops_v3
	.type	nvtxSetInitFunctionsToNoops_v3, @function
nvtxSetInitFunctionsToNoops_v3:
.LFB8599:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	leaq	nvtxMarkEx_impl_init_v3(%rip), %rdx
	setne	%al
	cmpq	%rdx, 48+nvtxGlobals_v3(%rip)
	je	.L369
	testb	%al, %al
	je	.L241
.L369:
	xorl	%r10d, %r10d
	movq	%r10, 48+nvtxGlobals_v3(%rip)
.L241:
	leaq	nvtxMarkA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 56+nvtxGlobals_v3(%rip)
	je	.L370
	testb	%al, %al
	je	.L243
.L370:
	xorl	%r9d, %r9d
	movq	%r9, 56+nvtxGlobals_v3(%rip)
.L243:
	leaq	nvtxMarkW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 64+nvtxGlobals_v3(%rip)
	je	.L371
	testb	%al, %al
	je	.L245
.L371:
	xorl	%r8d, %r8d
	movq	%r8, 64+nvtxGlobals_v3(%rip)
.L245:
	leaq	nvtxRangeStartEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 72+nvtxGlobals_v3(%rip)
	je	.L372
	testb	%al, %al
	je	.L247
.L372:
	xorl	%edi, %edi
	movq	%rdi, 72+nvtxGlobals_v3(%rip)
.L247:
	leaq	nvtxRangeStartA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 80+nvtxGlobals_v3(%rip)
	je	.L373
	testb	%al, %al
	je	.L249
.L373:
	xorl	%esi, %esi
	movq	%rsi, 80+nvtxGlobals_v3(%rip)
.L249:
	leaq	nvtxRangeStartW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 88+nvtxGlobals_v3(%rip)
	je	.L374
	testb	%al, %al
	je	.L251
.L374:
	xorl	%ecx, %ecx
	movq	%rcx, 88+nvtxGlobals_v3(%rip)
.L251:
	leaq	nvtxRangeEnd_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 96+nvtxGlobals_v3(%rip)
	je	.L375
	testb	%al, %al
	je	.L253
.L375:
	xorl	%edx, %edx
	movq	%rdx, 96+nvtxGlobals_v3(%rip)
.L253:
	leaq	nvtxRangePushEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 104+nvtxGlobals_v3(%rip)
	je	.L376
	testb	%al, %al
	je	.L255
.L376:
	xorl	%r11d, %r11d
	movq	%r11, 104+nvtxGlobals_v3(%rip)
.L255:
	leaq	nvtxRangePushA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 112+nvtxGlobals_v3(%rip)
	je	.L377
	testb	%al, %al
	je	.L257
.L377:
	xorl	%r10d, %r10d
	movq	%r10, 112+nvtxGlobals_v3(%rip)
.L257:
	leaq	nvtxRangePushW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 120+nvtxGlobals_v3(%rip)
	je	.L378
	testb	%al, %al
	je	.L259
.L378:
	xorl	%r9d, %r9d
	movq	%r9, 120+nvtxGlobals_v3(%rip)
.L259:
	leaq	nvtxRangePop_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 128+nvtxGlobals_v3(%rip)
	je	.L379
	testb	%al, %al
	je	.L261
.L379:
	xorl	%r8d, %r8d
	movq	%r8, 128+nvtxGlobals_v3(%rip)
.L261:
	leaq	nvtxNameCategoryA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 136+nvtxGlobals_v3(%rip)
	je	.L380
	testb	%al, %al
	je	.L263
.L380:
	xorl	%edi, %edi
	movq	%rdi, 136+nvtxGlobals_v3(%rip)
.L263:
	leaq	nvtxNameCategoryW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 144+nvtxGlobals_v3(%rip)
	je	.L381
	testb	%al, %al
	je	.L265
.L381:
	xorl	%esi, %esi
	movq	%rsi, 144+nvtxGlobals_v3(%rip)
.L265:
	leaq	nvtxNameOsThreadA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 152+nvtxGlobals_v3(%rip)
	je	.L382
	testb	%al, %al
	je	.L267
.L382:
	xorl	%ecx, %ecx
	movq	%rcx, 152+nvtxGlobals_v3(%rip)
.L267:
	leaq	nvtxNameOsThreadW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 160+nvtxGlobals_v3(%rip)
	je	.L383
	testb	%al, %al
	je	.L269
.L383:
	xorl	%edx, %edx
	movq	%rdx, 160+nvtxGlobals_v3(%rip)
.L269:
	leaq	nvtxNameCuDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 168+nvtxGlobals_v3(%rip)
	je	.L384
	testb	%al, %al
	je	.L271
.L384:
	xorl	%r11d, %r11d
	movq	%r11, 168+nvtxGlobals_v3(%rip)
.L271:
	leaq	nvtxNameCuDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 176+nvtxGlobals_v3(%rip)
	je	.L385
	testb	%al, %al
	je	.L273
.L385:
	xorl	%r10d, %r10d
	movq	%r10, 176+nvtxGlobals_v3(%rip)
.L273:
	leaq	nvtxNameCuContextA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 184+nvtxGlobals_v3(%rip)
	je	.L386
	testb	%al, %al
	je	.L275
.L386:
	xorl	%r9d, %r9d
	movq	%r9, 184+nvtxGlobals_v3(%rip)
.L275:
	leaq	nvtxNameCuContextW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 192+nvtxGlobals_v3(%rip)
	je	.L387
	testb	%al, %al
	je	.L277
.L387:
	xorl	%r8d, %r8d
	movq	%r8, 192+nvtxGlobals_v3(%rip)
.L277:
	leaq	nvtxNameCuStreamA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 200+nvtxGlobals_v3(%rip)
	je	.L388
	testb	%al, %al
	je	.L279
.L388:
	xorl	%edi, %edi
	movq	%rdi, 200+nvtxGlobals_v3(%rip)
.L279:
	leaq	nvtxNameCuStreamW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 208+nvtxGlobals_v3(%rip)
	je	.L389
	testb	%al, %al
	je	.L281
.L389:
	xorl	%esi, %esi
	movq	%rsi, 208+nvtxGlobals_v3(%rip)
.L281:
	leaq	nvtxNameCuEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 216+nvtxGlobals_v3(%rip)
	je	.L390
	testb	%al, %al
	je	.L283
.L390:
	xorl	%ecx, %ecx
	movq	%rcx, 216+nvtxGlobals_v3(%rip)
.L283:
	leaq	nvtxNameCuEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 224+nvtxGlobals_v3(%rip)
	je	.L391
	testb	%al, %al
	je	.L285
.L391:
	xorl	%edx, %edx
	movq	%rdx, 224+nvtxGlobals_v3(%rip)
.L285:
	leaq	nvtxNameClDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 232+nvtxGlobals_v3(%rip)
	je	.L392
	testb	%al, %al
	je	.L287
.L392:
	xorl	%r11d, %r11d
	movq	%r11, 232+nvtxGlobals_v3(%rip)
.L287:
	leaq	nvtxNameClDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 240+nvtxGlobals_v3(%rip)
	je	.L393
	testb	%al, %al
	je	.L289
.L393:
	xorl	%r10d, %r10d
	movq	%r10, 240+nvtxGlobals_v3(%rip)
.L289:
	leaq	nvtxNameClContextA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 248+nvtxGlobals_v3(%rip)
	je	.L394
	testb	%al, %al
	je	.L291
.L394:
	xorl	%r9d, %r9d
	movq	%r9, 248+nvtxGlobals_v3(%rip)
.L291:
	leaq	nvtxNameClContextW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 256+nvtxGlobals_v3(%rip)
	je	.L395
	testb	%al, %al
	je	.L293
.L395:
	xorl	%r8d, %r8d
	movq	%r8, 256+nvtxGlobals_v3(%rip)
.L293:
	leaq	nvtxNameClCommandQueueA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 264+nvtxGlobals_v3(%rip)
	je	.L396
	testb	%al, %al
	je	.L295
.L396:
	xorl	%edi, %edi
	movq	%rdi, 264+nvtxGlobals_v3(%rip)
.L295:
	leaq	nvtxNameClCommandQueueW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 272+nvtxGlobals_v3(%rip)
	je	.L397
	testb	%al, %al
	je	.L297
.L397:
	xorl	%esi, %esi
	movq	%rsi, 272+nvtxGlobals_v3(%rip)
.L297:
	leaq	nvtxNameClMemObjectA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 280+nvtxGlobals_v3(%rip)
	je	.L398
	testb	%al, %al
	je	.L299
.L398:
	xorl	%ecx, %ecx
	movq	%rcx, 280+nvtxGlobals_v3(%rip)
.L299:
	leaq	nvtxNameClMemObjectW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 288+nvtxGlobals_v3(%rip)
	je	.L399
	testb	%al, %al
	je	.L301
.L399:
	xorl	%edx, %edx
	movq	%rdx, 288+nvtxGlobals_v3(%rip)
.L301:
	leaq	nvtxNameClSamplerA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 296+nvtxGlobals_v3(%rip)
	je	.L400
	testb	%al, %al
	je	.L303
.L400:
	xorl	%r11d, %r11d
	movq	%r11, 296+nvtxGlobals_v3(%rip)
.L303:
	leaq	nvtxNameClSamplerW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 304+nvtxGlobals_v3(%rip)
	je	.L401
	testb	%al, %al
	je	.L305
.L401:
	xorl	%r10d, %r10d
	movq	%r10, 304+nvtxGlobals_v3(%rip)
.L305:
	leaq	nvtxNameClProgramA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 312+nvtxGlobals_v3(%rip)
	je	.L402
	testb	%al, %al
	je	.L307
.L402:
	xorl	%r9d, %r9d
	movq	%r9, 312+nvtxGlobals_v3(%rip)
.L307:
	leaq	nvtxNameClProgramW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 320+nvtxGlobals_v3(%rip)
	je	.L403
	testb	%al, %al
	je	.L309
.L403:
	xorl	%r8d, %r8d
	movq	%r8, 320+nvtxGlobals_v3(%rip)
.L309:
	leaq	nvtxNameClEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 328+nvtxGlobals_v3(%rip)
	je	.L404
	testb	%al, %al
	je	.L311
.L404:
	xorl	%edi, %edi
	movq	%rdi, 328+nvtxGlobals_v3(%rip)
.L311:
	leaq	nvtxNameClEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 336+nvtxGlobals_v3(%rip)
	je	.L405
	testb	%al, %al
	je	.L313
.L405:
	xorl	%esi, %esi
	movq	%rsi, 336+nvtxGlobals_v3(%rip)
.L313:
	leaq	nvtxNameCudaDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 344+nvtxGlobals_v3(%rip)
	je	.L406
	testb	%al, %al
	je	.L315
.L406:
	xorl	%ecx, %ecx
	movq	%rcx, 344+nvtxGlobals_v3(%rip)
.L315:
	leaq	nvtxNameCudaDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 352+nvtxGlobals_v3(%rip)
	je	.L407
	testb	%al, %al
	je	.L317
.L407:
	xorl	%edx, %edx
	movq	%rdx, 352+nvtxGlobals_v3(%rip)
.L317:
	leaq	nvtxNameCudaStreamA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 360+nvtxGlobals_v3(%rip)
	je	.L408
	testb	%al, %al
	je	.L319
.L408:
	xorl	%r11d, %r11d
	movq	%r11, 360+nvtxGlobals_v3(%rip)
.L319:
	leaq	nvtxNameCudaStreamW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 368+nvtxGlobals_v3(%rip)
	je	.L409
	testb	%al, %al
	je	.L321
.L409:
	xorl	%r10d, %r10d
	movq	%r10, 368+nvtxGlobals_v3(%rip)
.L321:
	leaq	nvtxNameCudaEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 376+nvtxGlobals_v3(%rip)
	je	.L410
	testb	%al, %al
	je	.L323
.L410:
	xorl	%r9d, %r9d
	movq	%r9, 376+nvtxGlobals_v3(%rip)
.L323:
	leaq	nvtxNameCudaEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 384+nvtxGlobals_v3(%rip)
	je	.L411
	testb	%al, %al
	je	.L325
.L411:
	xorl	%r8d, %r8d
	movq	%r8, 384+nvtxGlobals_v3(%rip)
.L325:
	leaq	nvtxDomainMarkEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 392+nvtxGlobals_v3(%rip)
	je	.L412
	testb	%al, %al
	je	.L327
.L412:
	xorl	%edi, %edi
	movq	%rdi, 392+nvtxGlobals_v3(%rip)
.L327:
	leaq	nvtxDomainRangeStartEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 400+nvtxGlobals_v3(%rip)
	je	.L413
	testb	%al, %al
	je	.L329
.L413:
	xorl	%esi, %esi
	movq	%rsi, 400+nvtxGlobals_v3(%rip)
.L329:
	leaq	nvtxDomainRangeEnd_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 408+nvtxGlobals_v3(%rip)
	je	.L414
	testb	%al, %al
	je	.L331
.L414:
	xorl	%ecx, %ecx
	movq	%rcx, 408+nvtxGlobals_v3(%rip)
.L331:
	leaq	nvtxDomainRangePushEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 416+nvtxGlobals_v3(%rip)
	je	.L415
	testb	%al, %al
	je	.L333
.L415:
	xorl	%edx, %edx
	movq	%rdx, 416+nvtxGlobals_v3(%rip)
.L333:
	leaq	nvtxDomainRangePop_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 424+nvtxGlobals_v3(%rip)
	je	.L416
	testb	%al, %al
	je	.L335
.L416:
	xorl	%r11d, %r11d
	movq	%r11, 424+nvtxGlobals_v3(%rip)
.L335:
	leaq	nvtxDomainResourceCreate_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 432+nvtxGlobals_v3(%rip)
	je	.L417
	testb	%al, %al
	je	.L337
.L417:
	xorl	%r10d, %r10d
	movq	%r10, 432+nvtxGlobals_v3(%rip)
.L337:
	leaq	nvtxDomainResourceDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 440+nvtxGlobals_v3(%rip)
	je	.L418
	testb	%al, %al
	je	.L339
.L418:
	xorl	%r9d, %r9d
	movq	%r9, 440+nvtxGlobals_v3(%rip)
.L339:
	leaq	nvtxDomainNameCategoryA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 448+nvtxGlobals_v3(%rip)
	je	.L419
	testb	%al, %al
	je	.L341
.L419:
	xorl	%r8d, %r8d
	movq	%r8, 448+nvtxGlobals_v3(%rip)
.L341:
	leaq	nvtxDomainNameCategoryW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 456+nvtxGlobals_v3(%rip)
	je	.L420
	testb	%al, %al
	je	.L343
.L420:
	xorl	%edi, %edi
	movq	%rdi, 456+nvtxGlobals_v3(%rip)
.L343:
	leaq	nvtxDomainRegisterStringA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 464+nvtxGlobals_v3(%rip)
	je	.L421
	testb	%al, %al
	je	.L345
.L421:
	xorl	%esi, %esi
	movq	%rsi, 464+nvtxGlobals_v3(%rip)
.L345:
	leaq	nvtxDomainRegisterStringW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 472+nvtxGlobals_v3(%rip)
	je	.L422
	testb	%al, %al
	je	.L347
.L422:
	xorl	%ecx, %ecx
	movq	%rcx, 472+nvtxGlobals_v3(%rip)
.L347:
	leaq	nvtxDomainCreateA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 480+nvtxGlobals_v3(%rip)
	je	.L423
	testb	%al, %al
	je	.L349
.L423:
	xorl	%edx, %edx
	movq	%rdx, 480+nvtxGlobals_v3(%rip)
.L349:
	leaq	nvtxDomainCreateW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 488+nvtxGlobals_v3(%rip)
	je	.L424
	testb	%al, %al
	je	.L351
.L424:
	xorl	%r11d, %r11d
	movq	%r11, 488+nvtxGlobals_v3(%rip)
.L351:
	leaq	nvtxDomainDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 496+nvtxGlobals_v3(%rip)
	je	.L425
	testb	%al, %al
	je	.L353
.L425:
	xorl	%r10d, %r10d
	movq	%r10, 496+nvtxGlobals_v3(%rip)
.L353:
	leaq	nvtxInitialize_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 504+nvtxGlobals_v3(%rip)
	je	.L426
	testb	%al, %al
	je	.L355
.L426:
	xorl	%r9d, %r9d
	movq	%r9, 504+nvtxGlobals_v3(%rip)
.L355:
	leaq	nvtxDomainSyncUserCreate_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 512+nvtxGlobals_v3(%rip)
	je	.L427
	testb	%al, %al
	je	.L357
.L427:
	xorl	%r8d, %r8d
	movq	%r8, 512+nvtxGlobals_v3(%rip)
.L357:
	leaq	nvtxDomainSyncUserDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 520+nvtxGlobals_v3(%rip)
	je	.L428
	testb	%al, %al
	je	.L359
.L428:
	xorl	%edi, %edi
	movq	%rdi, 520+nvtxGlobals_v3(%rip)
.L359:
	leaq	nvtxDomainSyncUserAcquireStart_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 528+nvtxGlobals_v3(%rip)
	je	.L429
	testb	%al, %al
	je	.L361
.L429:
	xorl	%esi, %esi
	movq	%rsi, 528+nvtxGlobals_v3(%rip)
.L361:
	leaq	nvtxDomainSyncUserAcquireFailed_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 536+nvtxGlobals_v3(%rip)
	je	.L430
	testb	%al, %al
	je	.L363
.L430:
	xorl	%ecx, %ecx
	movq	%rcx, 536+nvtxGlobals_v3(%rip)
.L363:
	leaq	nvtxDomainSyncUserAcquireSuccess_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 544+nvtxGlobals_v3(%rip)
	je	.L431
	testb	%al, %al
	je	.L365
.L431:
	xorl	%edx, %edx
	movq	%rdx, 544+nvtxGlobals_v3(%rip)
.L365:
	leaq	nvtxDomainSyncUserReleasing_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 552+nvtxGlobals_v3(%rip)
	je	.L432
	testb	%al, %al
	je	.L240
.L432:
	xorl	%eax, %eax
	movq	%rax, 552+nvtxGlobals_v3(%rip)
.L240:
	ret
	.cfi_endproc
.LFE8599:
	.size	nvtxSetInitFunctionsToNoops_v3, .-nvtxSetInitFunctionsToNoops_v3
	.section	.rodata.nvtxInitializeInjectionLibrary_v3.str1.1,"aMS",@progbits,1
.LC9:
	.string	"NVTX_INJECTION64_PATH"
.LC10:
	.string	"InitializeInjectionNvtx2"
	.section	.text.nvtxInitializeInjectionLibrary_v3,"axG",@progbits,nvtxInitializeInjectionLibrary_v3,comdat
	.weak	nvtxInitializeInjectionLibrary_v3
	.hidden	nvtxInitializeInjectionLibrary_v3
	.type	nvtxInitializeInjectionLibrary_v3, @function
nvtxInitializeInjectionLibrary_v3:
.LFB8600:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	.LC9(%rip), %rdi
	call	getenv@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	je	.L626
	movl	$1, %esi
	movq	%rax, %rdi
	call	dlopen@PLT
	movl	$4, %edx
	movq	%rax, %rbx
	testq	%rax, %rax
	je	.L625
	leaq	.LC10(%rip), %rsi
	movq	%rax, %rdi
	call	dlsym@PLT
	testq	%rax, %rax
	jne	.L628
	movq	%rbx, %rdi
	call	dlclose@PLT
	movl	$5, %edx
	jmp	.L625
.L626:
	movq	InitializeInjectionNvtx2_fnptr(%rip), %rax
	movl	$7, %edx
	testq	%rax, %rax
	je	.L625
.L628:
	leaq	nvtxGetExportTable_v3(%rip), %rdi
	call	*%rax
	xorl	%edx, %edx
	testl	%eax, %eax
	jne	.L625
	testq	%rbx, %rbx
	je	.L629
	movq	%rbx, %rdi
	call	dlclose@PLT
.L629:
	movl	$6, %edx
.L625:
	movl	%edx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8600:
	.size	nvtxInitializeInjectionLibrary_v3, .-nvtxInitializeInjectionLibrary_v3
	.section	.text.nvtxInitOnce_v3,"axG",@progbits,nvtxInitOnce_v3,comdat
	.weak	nvtxInitOnce_v3
	.hidden	nvtxInitOnce_v3
	.type	nvtxInitOnce_v3, @function
nvtxInitOnce_v3:
.LFB8601:
	.cfi_startproc
	endbr64
	movl	nvtxGlobals_v3(%rip), %eax
	cmpl	$2, %eax
	je	.L645
	pushq	%rdx
	.cfi_def_cfa_offset 16
	movl	$1, %eax
	xorl	%edx, %edx
	mfence
	lock cmpxchgl	%edx, nvtxGlobals_v3(%rip)
	testl	%eax, %eax
	jne	.L648
	call	nvtxInitializeInjectionLibrary_v3
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	call	nvtxSetInitFunctionsToNoops_v3
	movl	$2, %eax
	mfence
	xchgl	nvtxGlobals_v3(%rip), %eax
	jmp	.L637
.L648:
	mfence
	movl	nvtxGlobals_v3(%rip), %eax
	cmpl	$2, %eax
	je	.L637
	call	sched_yield@PLT
	jmp	.L648
.L637:
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
.L645:
	ret
	.cfi_endproc
.LFE8601:
	.size	nvtxInitOnce_v3, .-nvtxInitOnce_v3
	.section	.text.nvtxDomainSyncUserReleasing_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserReleasing_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserReleasing_impl_init_v3
	.hidden	nvtxDomainSyncUserReleasing_impl_init_v3
	.type	nvtxDomainSyncUserReleasing_impl_init_v3, @function
nvtxDomainSyncUserReleasing_impl_init_v3:
.LFB8598:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	552+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L649
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L649:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8598:
	.size	nvtxDomainSyncUserReleasing_impl_init_v3, .-nvtxDomainSyncUserReleasing_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireSuccess_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireSuccess_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.type	nvtxDomainSyncUserAcquireSuccess_impl_init_v3, @function
nvtxDomainSyncUserAcquireSuccess_impl_init_v3:
.LFB8597:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	544+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L652
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L652:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8597:
	.size	nvtxDomainSyncUserAcquireSuccess_impl_init_v3, .-nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireFailed_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireFailed_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.type	nvtxDomainSyncUserAcquireFailed_impl_init_v3, @function
nvtxDomainSyncUserAcquireFailed_impl_init_v3:
.LFB8596:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	536+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L655
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L655:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8596:
	.size	nvtxDomainSyncUserAcquireFailed_impl_init_v3, .-nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireStart_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireStart_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.type	nvtxDomainSyncUserAcquireStart_impl_init_v3, @function
nvtxDomainSyncUserAcquireStart_impl_init_v3:
.LFB8595:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	528+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L658
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L658:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8595:
	.size	nvtxDomainSyncUserAcquireStart_impl_init_v3, .-nvtxDomainSyncUserAcquireStart_impl_init_v3
	.section	.text.nvtxDomainSyncUserDestroy_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserDestroy_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserDestroy_impl_init_v3
	.hidden	nvtxDomainSyncUserDestroy_impl_init_v3
	.type	nvtxDomainSyncUserDestroy_impl_init_v3, @function
nvtxDomainSyncUserDestroy_impl_init_v3:
.LFB8594:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	520+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L661
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L661:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8594:
	.size	nvtxDomainSyncUserDestroy_impl_init_v3, .-nvtxDomainSyncUserDestroy_impl_init_v3
	.section	.text.nvtxDomainSyncUserCreate_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserCreate_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserCreate_impl_init_v3
	.hidden	nvtxDomainSyncUserCreate_impl_init_v3
	.type	nvtxDomainSyncUserCreate_impl_init_v3, @function
nvtxDomainSyncUserCreate_impl_init_v3:
.LFB8593:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	512+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L665
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L665:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8593:
	.size	nvtxDomainSyncUserCreate_impl_init_v3, .-nvtxDomainSyncUserCreate_impl_init_v3
	.section	.text.nvtxInitialize_impl_init_v3,"axG",@progbits,nvtxInitialize_impl_init_v3,comdat
	.weak	nvtxInitialize_impl_init_v3
	.hidden	nvtxInitialize_impl_init_v3
	.type	nvtxInitialize_impl_init_v3, @function
nvtxInitialize_impl_init_v3:
.LFB8564:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	504+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L667
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L667:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8564:
	.size	nvtxInitialize_impl_init_v3, .-nvtxInitialize_impl_init_v3
	.section	.text.nvtxDomainDestroy_impl_init_v3,"axG",@progbits,nvtxDomainDestroy_impl_init_v3,comdat
	.weak	nvtxDomainDestroy_impl_init_v3
	.hidden	nvtxDomainDestroy_impl_init_v3
	.type	nvtxDomainDestroy_impl_init_v3, @function
nvtxDomainDestroy_impl_init_v3:
.LFB8563:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	496+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L670
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L670:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8563:
	.size	nvtxDomainDestroy_impl_init_v3, .-nvtxDomainDestroy_impl_init_v3
	.section	.text.nvtxDomainCreateW_impl_init_v3,"axG",@progbits,nvtxDomainCreateW_impl_init_v3,comdat
	.weak	nvtxDomainCreateW_impl_init_v3
	.hidden	nvtxDomainCreateW_impl_init_v3
	.type	nvtxDomainCreateW_impl_init_v3, @function
nvtxDomainCreateW_impl_init_v3:
.LFB8562:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	488+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L674
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L674:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8562:
	.size	nvtxDomainCreateW_impl_init_v3, .-nvtxDomainCreateW_impl_init_v3
	.section	.text.nvtxDomainCreateA_impl_init_v3,"axG",@progbits,nvtxDomainCreateA_impl_init_v3,comdat
	.weak	nvtxDomainCreateA_impl_init_v3
	.hidden	nvtxDomainCreateA_impl_init_v3
	.type	nvtxDomainCreateA_impl_init_v3, @function
nvtxDomainCreateA_impl_init_v3:
.LFB8561:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	480+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L677
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L677:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8561:
	.size	nvtxDomainCreateA_impl_init_v3, .-nvtxDomainCreateA_impl_init_v3
	.section	.text.nvtxDomainRegisterStringW_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringW_impl_init_v3,comdat
	.weak	nvtxDomainRegisterStringW_impl_init_v3
	.hidden	nvtxDomainRegisterStringW_impl_init_v3
	.type	nvtxDomainRegisterStringW_impl_init_v3, @function
nvtxDomainRegisterStringW_impl_init_v3:
.LFB8560:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	472+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L680
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L680:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8560:
	.size	nvtxDomainRegisterStringW_impl_init_v3, .-nvtxDomainRegisterStringW_impl_init_v3
	.section	.text.nvtxDomainRegisterStringA_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringA_impl_init_v3,comdat
	.weak	nvtxDomainRegisterStringA_impl_init_v3
	.hidden	nvtxDomainRegisterStringA_impl_init_v3
	.type	nvtxDomainRegisterStringA_impl_init_v3, @function
nvtxDomainRegisterStringA_impl_init_v3:
.LFB8559:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	464+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L683
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L683:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8559:
	.size	nvtxDomainRegisterStringA_impl_init_v3, .-nvtxDomainRegisterStringA_impl_init_v3
	.section	.text.nvtxDomainNameCategoryW_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryW_impl_init_v3,comdat
	.weak	nvtxDomainNameCategoryW_impl_init_v3
	.hidden	nvtxDomainNameCategoryW_impl_init_v3
	.type	nvtxDomainNameCategoryW_impl_init_v3, @function
nvtxDomainNameCategoryW_impl_init_v3:
.LFB8558:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 24(%rsp)
	movl	%esi, 20(%rsp)
	movq	%rdx, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	456+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L685
	movq	8(%rsp), %rdx
	movl	20(%rsp), %esi
	movq	24(%rsp), %rdi
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L685:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8558:
	.size	nvtxDomainNameCategoryW_impl_init_v3, .-nvtxDomainNameCategoryW_impl_init_v3
	.section	.text.nvtxDomainNameCategoryA_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryA_impl_init_v3,comdat
	.weak	nvtxDomainNameCategoryA_impl_init_v3
	.hidden	nvtxDomainNameCategoryA_impl_init_v3
	.type	nvtxDomainNameCategoryA_impl_init_v3, @function
nvtxDomainNameCategoryA_impl_init_v3:
.LFB8557:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 24(%rsp)
	movl	%esi, 20(%rsp)
	movq	%rdx, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	448+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L688
	movq	8(%rsp), %rdx
	movl	20(%rsp), %esi
	movq	24(%rsp), %rdi
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L688:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8557:
	.size	nvtxDomainNameCategoryA_impl_init_v3, .-nvtxDomainNameCategoryA_impl_init_v3
	.section	.text.nvtxDomainResourceDestroy_impl_init_v3,"axG",@progbits,nvtxDomainResourceDestroy_impl_init_v3,comdat
	.weak	nvtxDomainResourceDestroy_impl_init_v3
	.hidden	nvtxDomainResourceDestroy_impl_init_v3
	.type	nvtxDomainResourceDestroy_impl_init_v3, @function
nvtxDomainResourceDestroy_impl_init_v3:
.LFB8556:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	440+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L691
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L691:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8556:
	.size	nvtxDomainResourceDestroy_impl_init_v3, .-nvtxDomainResourceDestroy_impl_init_v3
	.section	.text.nvtxDomainResourceCreate_impl_init_v3,"axG",@progbits,nvtxDomainResourceCreate_impl_init_v3,comdat
	.weak	nvtxDomainResourceCreate_impl_init_v3
	.hidden	nvtxDomainResourceCreate_impl_init_v3
	.type	nvtxDomainResourceCreate_impl_init_v3, @function
nvtxDomainResourceCreate_impl_init_v3:
.LFB8555:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	432+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L695
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L695:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8555:
	.size	nvtxDomainResourceCreate_impl_init_v3, .-nvtxDomainResourceCreate_impl_init_v3
	.section	.text.nvtxDomainRangePop_impl_init_v3,"axG",@progbits,nvtxDomainRangePop_impl_init_v3,comdat
	.weak	nvtxDomainRangePop_impl_init_v3
	.hidden	nvtxDomainRangePop_impl_init_v3
	.type	nvtxDomainRangePop_impl_init_v3, @function
nvtxDomainRangePop_impl_init_v3:
.LFB8554:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	jmp	nvtxDomainRangePop
	.cfi_endproc
.LFE8554:
	.size	nvtxDomainRangePop_impl_init_v3, .-nvtxDomainRangePop_impl_init_v3
	.section	.text.nvtxDomainRangePushEx_impl_init_v3,"axG",@progbits,nvtxDomainRangePushEx_impl_init_v3,comdat
	.weak	nvtxDomainRangePushEx_impl_init_v3
	.hidden	nvtxDomainRangePushEx_impl_init_v3
	.type	nvtxDomainRangePushEx_impl_init_v3, @function
nvtxDomainRangePushEx_impl_init_v3:
.LFB8553:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	416+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L700
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L700:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8553:
	.size	nvtxDomainRangePushEx_impl_init_v3, .-nvtxDomainRangePushEx_impl_init_v3
	.section	.text.nvtxDomainRangeEnd_impl_init_v3,"axG",@progbits,nvtxDomainRangeEnd_impl_init_v3,comdat
	.weak	nvtxDomainRangeEnd_impl_init_v3
	.hidden	nvtxDomainRangeEnd_impl_init_v3
	.type	nvtxDomainRangeEnd_impl_init_v3, @function
nvtxDomainRangeEnd_impl_init_v3:
.LFB8552:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	408+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L702
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L702:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8552:
	.size	nvtxDomainRangeEnd_impl_init_v3, .-nvtxDomainRangeEnd_impl_init_v3
	.section	.text.nvtxDomainRangeStartEx_impl_init_v3,"axG",@progbits,nvtxDomainRangeStartEx_impl_init_v3,comdat
	.weak	nvtxDomainRangeStartEx_impl_init_v3
	.hidden	nvtxDomainRangeStartEx_impl_init_v3
	.type	nvtxDomainRangeStartEx_impl_init_v3, @function
nvtxDomainRangeStartEx_impl_init_v3:
.LFB8551:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	400+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L706
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L706:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8551:
	.size	nvtxDomainRangeStartEx_impl_init_v3, .-nvtxDomainRangeStartEx_impl_init_v3
	.section	.text.nvtxDomainMarkEx_impl_init_v3,"axG",@progbits,nvtxDomainMarkEx_impl_init_v3,comdat
	.weak	nvtxDomainMarkEx_impl_init_v3
	.hidden	nvtxDomainMarkEx_impl_init_v3
	.type	nvtxDomainMarkEx_impl_init_v3, @function
nvtxDomainMarkEx_impl_init_v3:
.LFB8550:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	392+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L708
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L708:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8550:
	.size	nvtxDomainMarkEx_impl_init_v3, .-nvtxDomainMarkEx_impl_init_v3
	.section	.text.nvtxNameCudaEventW_impl_init_v3,"axG",@progbits,nvtxNameCudaEventW_impl_init_v3,comdat
	.weak	nvtxNameCudaEventW_impl_init_v3
	.hidden	nvtxNameCudaEventW_impl_init_v3
	.type	nvtxNameCudaEventW_impl_init_v3, @function
nvtxNameCudaEventW_impl_init_v3:
.LFB8578:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	384+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L711
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L711:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8578:
	.size	nvtxNameCudaEventW_impl_init_v3, .-nvtxNameCudaEventW_impl_init_v3
	.section	.text.nvtxNameCudaEventA_impl_init_v3,"axG",@progbits,nvtxNameCudaEventA_impl_init_v3,comdat
	.weak	nvtxNameCudaEventA_impl_init_v3
	.hidden	nvtxNameCudaEventA_impl_init_v3
	.type	nvtxNameCudaEventA_impl_init_v3, @function
nvtxNameCudaEventA_impl_init_v3:
.LFB8577:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	376+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L714
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L714:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8577:
	.size	nvtxNameCudaEventA_impl_init_v3, .-nvtxNameCudaEventA_impl_init_v3
	.section	.text.nvtxNameCudaStreamW_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamW_impl_init_v3,comdat
	.weak	nvtxNameCudaStreamW_impl_init_v3
	.hidden	nvtxNameCudaStreamW_impl_init_v3
	.type	nvtxNameCudaStreamW_impl_init_v3, @function
nvtxNameCudaStreamW_impl_init_v3:
.LFB8576:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	368+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L717
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L717:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8576:
	.size	nvtxNameCudaStreamW_impl_init_v3, .-nvtxNameCudaStreamW_impl_init_v3
	.section	.text.nvtxNameCudaStreamA_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamA_impl_init_v3,comdat
	.weak	nvtxNameCudaStreamA_impl_init_v3
	.hidden	nvtxNameCudaStreamA_impl_init_v3
	.type	nvtxNameCudaStreamA_impl_init_v3, @function
nvtxNameCudaStreamA_impl_init_v3:
.LFB8575:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	360+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L720
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L720:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8575:
	.size	nvtxNameCudaStreamA_impl_init_v3, .-nvtxNameCudaStreamA_impl_init_v3
	.section	.text.nvtxNameCudaDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceW_impl_init_v3,comdat
	.weak	nvtxNameCudaDeviceW_impl_init_v3
	.hidden	nvtxNameCudaDeviceW_impl_init_v3
	.type	nvtxNameCudaDeviceW_impl_init_v3, @function
nvtxNameCudaDeviceW_impl_init_v3:
.LFB8574:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	352+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L723
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L723:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8574:
	.size	nvtxNameCudaDeviceW_impl_init_v3, .-nvtxNameCudaDeviceW_impl_init_v3
	.section	.text.nvtxNameCudaDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceA_impl_init_v3,comdat
	.weak	nvtxNameCudaDeviceA_impl_init_v3
	.hidden	nvtxNameCudaDeviceA_impl_init_v3
	.type	nvtxNameCudaDeviceA_impl_init_v3, @function
nvtxNameCudaDeviceA_impl_init_v3:
.LFB8573:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	344+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L726
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L726:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8573:
	.size	nvtxNameCudaDeviceA_impl_init_v3, .-nvtxNameCudaDeviceA_impl_init_v3
	.section	.text.nvtxNameClEventW_impl_init_v3,"axG",@progbits,nvtxNameClEventW_impl_init_v3,comdat
	.weak	nvtxNameClEventW_impl_init_v3
	.hidden	nvtxNameClEventW_impl_init_v3
	.type	nvtxNameClEventW_impl_init_v3, @function
nvtxNameClEventW_impl_init_v3:
.LFB8592:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	336+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L729
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L729:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8592:
	.size	nvtxNameClEventW_impl_init_v3, .-nvtxNameClEventW_impl_init_v3
	.section	.text.nvtxNameClEventA_impl_init_v3,"axG",@progbits,nvtxNameClEventA_impl_init_v3,comdat
	.weak	nvtxNameClEventA_impl_init_v3
	.hidden	nvtxNameClEventA_impl_init_v3
	.type	nvtxNameClEventA_impl_init_v3, @function
nvtxNameClEventA_impl_init_v3:
.LFB8591:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	328+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L732
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L732:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8591:
	.size	nvtxNameClEventA_impl_init_v3, .-nvtxNameClEventA_impl_init_v3
	.section	.text.nvtxNameClProgramW_impl_init_v3,"axG",@progbits,nvtxNameClProgramW_impl_init_v3,comdat
	.weak	nvtxNameClProgramW_impl_init_v3
	.hidden	nvtxNameClProgramW_impl_init_v3
	.type	nvtxNameClProgramW_impl_init_v3, @function
nvtxNameClProgramW_impl_init_v3:
.LFB8590:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	320+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L735
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L735:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8590:
	.size	nvtxNameClProgramW_impl_init_v3, .-nvtxNameClProgramW_impl_init_v3
	.section	.text.nvtxNameClProgramA_impl_init_v3,"axG",@progbits,nvtxNameClProgramA_impl_init_v3,comdat
	.weak	nvtxNameClProgramA_impl_init_v3
	.hidden	nvtxNameClProgramA_impl_init_v3
	.type	nvtxNameClProgramA_impl_init_v3, @function
nvtxNameClProgramA_impl_init_v3:
.LFB8589:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	312+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L738
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L738:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8589:
	.size	nvtxNameClProgramA_impl_init_v3, .-nvtxNameClProgramA_impl_init_v3
	.section	.text.nvtxNameClSamplerW_impl_init_v3,"axG",@progbits,nvtxNameClSamplerW_impl_init_v3,comdat
	.weak	nvtxNameClSamplerW_impl_init_v3
	.hidden	nvtxNameClSamplerW_impl_init_v3
	.type	nvtxNameClSamplerW_impl_init_v3, @function
nvtxNameClSamplerW_impl_init_v3:
.LFB8588:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	304+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L741
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L741:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8588:
	.size	nvtxNameClSamplerW_impl_init_v3, .-nvtxNameClSamplerW_impl_init_v3
	.section	.text.nvtxNameClSamplerA_impl_init_v3,"axG",@progbits,nvtxNameClSamplerA_impl_init_v3,comdat
	.weak	nvtxNameClSamplerA_impl_init_v3
	.hidden	nvtxNameClSamplerA_impl_init_v3
	.type	nvtxNameClSamplerA_impl_init_v3, @function
nvtxNameClSamplerA_impl_init_v3:
.LFB8587:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	296+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L744
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L744:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8587:
	.size	nvtxNameClSamplerA_impl_init_v3, .-nvtxNameClSamplerA_impl_init_v3
	.section	.text.nvtxNameClMemObjectW_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectW_impl_init_v3,comdat
	.weak	nvtxNameClMemObjectW_impl_init_v3
	.hidden	nvtxNameClMemObjectW_impl_init_v3
	.type	nvtxNameClMemObjectW_impl_init_v3, @function
nvtxNameClMemObjectW_impl_init_v3:
.LFB8586:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	288+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L747
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L747:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8586:
	.size	nvtxNameClMemObjectW_impl_init_v3, .-nvtxNameClMemObjectW_impl_init_v3
	.section	.text.nvtxNameClMemObjectA_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectA_impl_init_v3,comdat
	.weak	nvtxNameClMemObjectA_impl_init_v3
	.hidden	nvtxNameClMemObjectA_impl_init_v3
	.type	nvtxNameClMemObjectA_impl_init_v3, @function
nvtxNameClMemObjectA_impl_init_v3:
.LFB8585:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	280+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L750
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L750:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8585:
	.size	nvtxNameClMemObjectA_impl_init_v3, .-nvtxNameClMemObjectA_impl_init_v3
	.section	.text.nvtxNameClCommandQueueW_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueW_impl_init_v3,comdat
	.weak	nvtxNameClCommandQueueW_impl_init_v3
	.hidden	nvtxNameClCommandQueueW_impl_init_v3
	.type	nvtxNameClCommandQueueW_impl_init_v3, @function
nvtxNameClCommandQueueW_impl_init_v3:
.LFB8584:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	272+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L753
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L753:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8584:
	.size	nvtxNameClCommandQueueW_impl_init_v3, .-nvtxNameClCommandQueueW_impl_init_v3
	.section	.text.nvtxNameClCommandQueueA_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueA_impl_init_v3,comdat
	.weak	nvtxNameClCommandQueueA_impl_init_v3
	.hidden	nvtxNameClCommandQueueA_impl_init_v3
	.type	nvtxNameClCommandQueueA_impl_init_v3, @function
nvtxNameClCommandQueueA_impl_init_v3:
.LFB8583:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	264+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L756
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L756:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8583:
	.size	nvtxNameClCommandQueueA_impl_init_v3, .-nvtxNameClCommandQueueA_impl_init_v3
	.section	.text.nvtxNameClContextW_impl_init_v3,"axG",@progbits,nvtxNameClContextW_impl_init_v3,comdat
	.weak	nvtxNameClContextW_impl_init_v3
	.hidden	nvtxNameClContextW_impl_init_v3
	.type	nvtxNameClContextW_impl_init_v3, @function
nvtxNameClContextW_impl_init_v3:
.LFB8582:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	256+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L759
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L759:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8582:
	.size	nvtxNameClContextW_impl_init_v3, .-nvtxNameClContextW_impl_init_v3
	.section	.text.nvtxNameClContextA_impl_init_v3,"axG",@progbits,nvtxNameClContextA_impl_init_v3,comdat
	.weak	nvtxNameClContextA_impl_init_v3
	.hidden	nvtxNameClContextA_impl_init_v3
	.type	nvtxNameClContextA_impl_init_v3, @function
nvtxNameClContextA_impl_init_v3:
.LFB8581:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	248+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L762
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L762:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8581:
	.size	nvtxNameClContextA_impl_init_v3, .-nvtxNameClContextA_impl_init_v3
	.section	.text.nvtxNameClDeviceW_impl_init_v3,"axG",@progbits,nvtxNameClDeviceW_impl_init_v3,comdat
	.weak	nvtxNameClDeviceW_impl_init_v3
	.hidden	nvtxNameClDeviceW_impl_init_v3
	.type	nvtxNameClDeviceW_impl_init_v3, @function
nvtxNameClDeviceW_impl_init_v3:
.LFB8580:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	240+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L765
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L765:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8580:
	.size	nvtxNameClDeviceW_impl_init_v3, .-nvtxNameClDeviceW_impl_init_v3
	.section	.text.nvtxNameClDeviceA_impl_init_v3,"axG",@progbits,nvtxNameClDeviceA_impl_init_v3,comdat
	.weak	nvtxNameClDeviceA_impl_init_v3
	.hidden	nvtxNameClDeviceA_impl_init_v3
	.type	nvtxNameClDeviceA_impl_init_v3, @function
nvtxNameClDeviceA_impl_init_v3:
.LFB8579:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	232+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L768
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L768:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8579:
	.size	nvtxNameClDeviceA_impl_init_v3, .-nvtxNameClDeviceA_impl_init_v3
	.section	.text.nvtxNameCuEventW_impl_init_v3,"axG",@progbits,nvtxNameCuEventW_impl_init_v3,comdat
	.weak	nvtxNameCuEventW_impl_init_v3
	.hidden	nvtxNameCuEventW_impl_init_v3
	.type	nvtxNameCuEventW_impl_init_v3, @function
nvtxNameCuEventW_impl_init_v3:
.LFB8572:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	224+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L771
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L771:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8572:
	.size	nvtxNameCuEventW_impl_init_v3, .-nvtxNameCuEventW_impl_init_v3
	.section	.text.nvtxNameCuEventA_impl_init_v3,"axG",@progbits,nvtxNameCuEventA_impl_init_v3,comdat
	.weak	nvtxNameCuEventA_impl_init_v3
	.hidden	nvtxNameCuEventA_impl_init_v3
	.type	nvtxNameCuEventA_impl_init_v3, @function
nvtxNameCuEventA_impl_init_v3:
.LFB8571:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	216+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L774
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L774:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8571:
	.size	nvtxNameCuEventA_impl_init_v3, .-nvtxNameCuEventA_impl_init_v3
	.section	.text.nvtxNameCuStreamW_impl_init_v3,"axG",@progbits,nvtxNameCuStreamW_impl_init_v3,comdat
	.weak	nvtxNameCuStreamW_impl_init_v3
	.hidden	nvtxNameCuStreamW_impl_init_v3
	.type	nvtxNameCuStreamW_impl_init_v3, @function
nvtxNameCuStreamW_impl_init_v3:
.LFB8570:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	208+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L777
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L777:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8570:
	.size	nvtxNameCuStreamW_impl_init_v3, .-nvtxNameCuStreamW_impl_init_v3
	.section	.text.nvtxNameCuStreamA_impl_init_v3,"axG",@progbits,nvtxNameCuStreamA_impl_init_v3,comdat
	.weak	nvtxNameCuStreamA_impl_init_v3
	.hidden	nvtxNameCuStreamA_impl_init_v3
	.type	nvtxNameCuStreamA_impl_init_v3, @function
nvtxNameCuStreamA_impl_init_v3:
.LFB8569:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	200+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L780
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L780:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8569:
	.size	nvtxNameCuStreamA_impl_init_v3, .-nvtxNameCuStreamA_impl_init_v3
	.section	.text.nvtxNameCuContextW_impl_init_v3,"axG",@progbits,nvtxNameCuContextW_impl_init_v3,comdat
	.weak	nvtxNameCuContextW_impl_init_v3
	.hidden	nvtxNameCuContextW_impl_init_v3
	.type	nvtxNameCuContextW_impl_init_v3, @function
nvtxNameCuContextW_impl_init_v3:
.LFB8568:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	192+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L783
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L783:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8568:
	.size	nvtxNameCuContextW_impl_init_v3, .-nvtxNameCuContextW_impl_init_v3
	.section	.text.nvtxNameCuContextA_impl_init_v3,"axG",@progbits,nvtxNameCuContextA_impl_init_v3,comdat
	.weak	nvtxNameCuContextA_impl_init_v3
	.hidden	nvtxNameCuContextA_impl_init_v3
	.type	nvtxNameCuContextA_impl_init_v3, @function
nvtxNameCuContextA_impl_init_v3:
.LFB8567:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	184+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L786
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L786:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8567:
	.size	nvtxNameCuContextA_impl_init_v3, .-nvtxNameCuContextA_impl_init_v3
	.section	.text.nvtxNameCuDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceW_impl_init_v3,comdat
	.weak	nvtxNameCuDeviceW_impl_init_v3
	.hidden	nvtxNameCuDeviceW_impl_init_v3
	.type	nvtxNameCuDeviceW_impl_init_v3, @function
nvtxNameCuDeviceW_impl_init_v3:
.LFB8566:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	176+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L789
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L789:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8566:
	.size	nvtxNameCuDeviceW_impl_init_v3, .-nvtxNameCuDeviceW_impl_init_v3
	.section	.text.nvtxNameCuDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceA_impl_init_v3,comdat
	.weak	nvtxNameCuDeviceA_impl_init_v3
	.hidden	nvtxNameCuDeviceA_impl_init_v3
	.type	nvtxNameCuDeviceA_impl_init_v3, @function
nvtxNameCuDeviceA_impl_init_v3:
.LFB8565:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	168+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L792
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L792:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8565:
	.size	nvtxNameCuDeviceA_impl_init_v3, .-nvtxNameCuDeviceA_impl_init_v3
	.section	.text.nvtxNameOsThreadW_impl_init_v3,"axG",@progbits,nvtxNameOsThreadW_impl_init_v3,comdat
	.weak	nvtxNameOsThreadW_impl_init_v3
	.hidden	nvtxNameOsThreadW_impl_init_v3
	.type	nvtxNameOsThreadW_impl_init_v3, @function
nvtxNameOsThreadW_impl_init_v3:
.LFB8549:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	160+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L795
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L795:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8549:
	.size	nvtxNameOsThreadW_impl_init_v3, .-nvtxNameOsThreadW_impl_init_v3
	.section	.text.nvtxNameOsThreadA_impl_init_v3,"axG",@progbits,nvtxNameOsThreadA_impl_init_v3,comdat
	.weak	nvtxNameOsThreadA_impl_init_v3
	.hidden	nvtxNameOsThreadA_impl_init_v3
	.type	nvtxNameOsThreadA_impl_init_v3, @function
nvtxNameOsThreadA_impl_init_v3:
.LFB8548:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	152+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L798
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L798:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8548:
	.size	nvtxNameOsThreadA_impl_init_v3, .-nvtxNameOsThreadA_impl_init_v3
	.section	.text.nvtxNameCategoryW_impl_init_v3,"axG",@progbits,nvtxNameCategoryW_impl_init_v3,comdat
	.weak	nvtxNameCategoryW_impl_init_v3
	.hidden	nvtxNameCategoryW_impl_init_v3
	.type	nvtxNameCategoryW_impl_init_v3, @function
nvtxNameCategoryW_impl_init_v3:
.LFB8547:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	144+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L801
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L801:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8547:
	.size	nvtxNameCategoryW_impl_init_v3, .-nvtxNameCategoryW_impl_init_v3
	.section	.text.nvtxNameCategoryA_impl_init_v3,"axG",@progbits,nvtxNameCategoryA_impl_init_v3,comdat
	.weak	nvtxNameCategoryA_impl_init_v3
	.hidden	nvtxNameCategoryA_impl_init_v3
	.type	nvtxNameCategoryA_impl_init_v3, @function
nvtxNameCategoryA_impl_init_v3:
.LFB8546:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	136+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L804
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L804:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8546:
	.size	nvtxNameCategoryA_impl_init_v3, .-nvtxNameCategoryA_impl_init_v3
	.section	.text.nvtxRangePop_impl_init_v3,"axG",@progbits,nvtxRangePop_impl_init_v3,comdat
	.weak	nvtxRangePop_impl_init_v3
	.hidden	nvtxRangePop_impl_init_v3
	.type	nvtxRangePop_impl_init_v3, @function
nvtxRangePop_impl_init_v3:
.LFB8545:
	.cfi_startproc
	endbr64
	pushq	%rsi
	.cfi_def_cfa_offset 16
	call	nvtxInitOnce_v3
	movq	128+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L808
	popq	%rcx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L808:
	.cfi_restore_state
	movl	$-2, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8545:
	.size	nvtxRangePop_impl_init_v3, .-nvtxRangePop_impl_init_v3
	.section	.text.nvtxRangePushW_impl_init_v3,"axG",@progbits,nvtxRangePushW_impl_init_v3,comdat
	.weak	nvtxRangePushW_impl_init_v3
	.hidden	nvtxRangePushW_impl_init_v3
	.type	nvtxRangePushW_impl_init_v3, @function
nvtxRangePushW_impl_init_v3:
.LFB8544:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	120+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L811
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L811:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8544:
	.size	nvtxRangePushW_impl_init_v3, .-nvtxRangePushW_impl_init_v3
	.section	.text.nvtxRangePushA_impl_init_v3,"axG",@progbits,nvtxRangePushA_impl_init_v3,comdat
	.weak	nvtxRangePushA_impl_init_v3
	.hidden	nvtxRangePushA_impl_init_v3
	.type	nvtxRangePushA_impl_init_v3, @function
nvtxRangePushA_impl_init_v3:
.LFB8543:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	112+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L814
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L814:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8543:
	.size	nvtxRangePushA_impl_init_v3, .-nvtxRangePushA_impl_init_v3
	.section	.text.nvtxRangePushEx_impl_init_v3,"axG",@progbits,nvtxRangePushEx_impl_init_v3,comdat
	.weak	nvtxRangePushEx_impl_init_v3
	.hidden	nvtxRangePushEx_impl_init_v3
	.type	nvtxRangePushEx_impl_init_v3, @function
nvtxRangePushEx_impl_init_v3:
.LFB8542:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	104+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L817
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L817:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8542:
	.size	nvtxRangePushEx_impl_init_v3, .-nvtxRangePushEx_impl_init_v3
	.section	.text.nvtxRangeEnd_impl_init_v3,"axG",@progbits,nvtxRangeEnd_impl_init_v3,comdat
	.weak	nvtxRangeEnd_impl_init_v3
	.hidden	nvtxRangeEnd_impl_init_v3
	.type	nvtxRangeEnd_impl_init_v3, @function
nvtxRangeEnd_impl_init_v3:
.LFB8541:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	96+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L819
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L819:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8541:
	.size	nvtxRangeEnd_impl_init_v3, .-nvtxRangeEnd_impl_init_v3
	.section	.text.nvtxRangeStartW_impl_init_v3,"axG",@progbits,nvtxRangeStartW_impl_init_v3,comdat
	.weak	nvtxRangeStartW_impl_init_v3
	.hidden	nvtxRangeStartW_impl_init_v3
	.type	nvtxRangeStartW_impl_init_v3, @function
nvtxRangeStartW_impl_init_v3:
.LFB8540:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	88+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L823
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L823:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8540:
	.size	nvtxRangeStartW_impl_init_v3, .-nvtxRangeStartW_impl_init_v3
	.section	.text.nvtxRangeStartA_impl_init_v3,"axG",@progbits,nvtxRangeStartA_impl_init_v3,comdat
	.weak	nvtxRangeStartA_impl_init_v3
	.hidden	nvtxRangeStartA_impl_init_v3
	.type	nvtxRangeStartA_impl_init_v3, @function
nvtxRangeStartA_impl_init_v3:
.LFB8539:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	80+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L826
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L826:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8539:
	.size	nvtxRangeStartA_impl_init_v3, .-nvtxRangeStartA_impl_init_v3
	.section	.text.nvtxRangeStartEx_impl_init_v3,"axG",@progbits,nvtxRangeStartEx_impl_init_v3,comdat
	.weak	nvtxRangeStartEx_impl_init_v3
	.hidden	nvtxRangeStartEx_impl_init_v3
	.type	nvtxRangeStartEx_impl_init_v3, @function
nvtxRangeStartEx_impl_init_v3:
.LFB8538:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	72+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L829
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L829:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8538:
	.size	nvtxRangeStartEx_impl_init_v3, .-nvtxRangeStartEx_impl_init_v3
	.section	.text.nvtxMarkW_impl_init_v3,"axG",@progbits,nvtxMarkW_impl_init_v3,comdat
	.weak	nvtxMarkW_impl_init_v3
	.hidden	nvtxMarkW_impl_init_v3
	.type	nvtxMarkW_impl_init_v3, @function
nvtxMarkW_impl_init_v3:
.LFB8537:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	64+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L831
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L831:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8537:
	.size	nvtxMarkW_impl_init_v3, .-nvtxMarkW_impl_init_v3
	.section	.text.nvtxMarkA_impl_init_v3,"axG",@progbits,nvtxMarkA_impl_init_v3,comdat
	.weak	nvtxMarkA_impl_init_v3
	.hidden	nvtxMarkA_impl_init_v3
	.type	nvtxMarkA_impl_init_v3, @function
nvtxMarkA_impl_init_v3:
.LFB8536:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	56+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L834
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L834:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8536:
	.size	nvtxMarkA_impl_init_v3, .-nvtxMarkA_impl_init_v3
	.section	.text.nvtxMarkEx_impl_init_v3,"axG",@progbits,nvtxMarkEx_impl_init_v3,comdat
	.weak	nvtxMarkEx_impl_init_v3
	.hidden	nvtxMarkEx_impl_init_v3
	.type	nvtxMarkEx_impl_init_v3, @function
nvtxMarkEx_impl_init_v3:
.LFB8535:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	48+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L837
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L837:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8535:
	.size	nvtxMarkEx_impl_init_v3, .-nvtxMarkEx_impl_init_v3
	.text
	.globl	_Z22__device_stub__Z4testvv
	.type	_Z22__device_stub__Z4testvv, @function
_Z22__device_stub__Z4testvv:
.LFB11509:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L840
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z4testv(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L840:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L842
	call	__stack_chk_fail@PLT
.L842:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11509:
	.size	_Z22__device_stub__Z4testvv, .-_Z22__device_stub__Z4testvv
	.globl	_Z4testv
	.type	_Z4testv, @function
_Z4testv:
.LFB11510:
	.cfi_startproc
	endbr64
	jmp	_Z22__device_stub__Z4testvv
	.cfi_endproc
.LFE11510:
	.size	_Z4testv, .-_Z4testv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC11:
	.string	"_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_"
.LC12:
	.string	"_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv"
.LC13:
	.string	"_Z4testv"
.LC14:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std3__45__cpo5beginE"
.LC15:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std3__45__cpo3endE"
.LC16:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std3__45__cpo6cbeginE"
.LC17:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std3__45__cpo4cendE"
.LC18:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std3__45__cpo6rbeginE"
.LC19:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std3__45__cpo4rendE"
.LC20:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std3__45__cpo7crbeginE"
.LC21:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std3__45__cpo5crendE"
.LC22:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std3__454_GLOBAL__N__64f8c6c9_21_GOrderHandler_test_cu__Z4testv6ignoreE"
.LC23:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std3__419piecewise_constructE"
.LC24:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std3__48in_placeE"
.LC25:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std3__47nulloptE"
.LC26:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std3__420unreachable_sentinelE"
.LC27:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std6ranges3__45__cpo4swapE"
.LC28:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std6ranges3__45__cpo9iter_moveE"
.LC29:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std6ranges3__45__cpo7advanceE"
.LC30:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std6ranges3__45__cpo5beginE"
.LC31:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std6ranges3__45__cpo3endE"
.LC32:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std6ranges3__45__cpo6cbeginE"
.LC33:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std6ranges3__45__cpo4cendE"
.LC34:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std6ranges3__45__cpo9iter_swapE"
.LC35:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std6ranges3__45__cpo4nextE"
.LC36:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std6ranges3__45__cpo4prevE"
.LC37:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std6ranges3__45__cpo4dataE"
.LC38:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std6ranges3__45__cpo5cdataE"
.LC39:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std6ranges3__45__cpo4sizeE"
.LC40:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std6ranges3__45__cpo5ssizeE"
.LC41:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv4cuda3std6ranges3__45__cpo8distanceE"
.LC42:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS6system6detail10sequential3seqE"
.LC43:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS6system3cpp3parE"
.LC44:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS8cuda_cub3parE"
.LC45:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS8cuda_cub10par_nosyncE"
.LC46:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS12placeholders2_1E"
.LC47:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS12placeholders2_2E"
.LC48:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS12placeholders2_3E"
.LC49:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS12placeholders2_4E"
.LC50:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS12placeholders2_5E"
.LC51:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS12placeholders2_6E"
.LC52:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS12placeholders2_7E"
.LC53:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS12placeholders2_8E"
.LC54:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS12placeholders2_9E"
.LC55:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS12placeholders3_10E"
.LC56:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS3seqE"
.LC57:
	.string	"_ZN52_INTERNAL_64f8c6c9_21_GOrderHandler_test_cu__Z4testv6thrust20THRUST_200700_890_NS6deviceE"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB11516:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z4testv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo5beginE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo3endE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo6cbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo4cendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo6rbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo4rendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo7crbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo5crendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC22(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__454_GLOBAL__N__64f8c6c9_21_GOrderHandler_test_cu__Z4testv6ignoreE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC23(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC24(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__48in_placeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC25(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__47nulloptE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC26(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__420unreachable_sentinelE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC27(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC28(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC29(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo7advanceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC30(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5beginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC31(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo3endE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC32(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo6cbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC33(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4cendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC34(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC35(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4nextE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC36(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4prevE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC37(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4dataE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC38(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5cdataE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC39(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4sizeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC40(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5ssizeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC41(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo8distanceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC42(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC43(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS6system3cppL3parE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC44(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC45(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC46(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC47(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC48(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC49(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC50(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC51(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC52(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC53(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC54(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC55(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC56(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NSL3seqE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC57(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN6thrust20THRUST_200700_890_NSL6deviceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE11516:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i.str1.1,"aMS",@progbits,1
.LC58:
	.string	"Failed to query current device"
	.section	.text._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,"axG",@progbits,_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,comdat
	.align 2
	.weak	_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i
	.type	_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i, @function
_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i:
.LFB11902:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA11902
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%edx, %rbx
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	movb	_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip), %al
	testb	%al, %al
	jne	.L849
	leaq	_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip), %r14
	movq	%r14, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L849
	movq	%rsp, %rdi
	movl	$-1, (%rsp)
.LEHB6:
	call	cudaGetDeviceCount@PLT
	movl	%eax, %ebp
	call	cudaGetLastError@PLT
.LEHE6:
	testl	%ebp, %ebp
	sete	%dl
	testl	%eax, %eax
	setne	%al
	testb	%al, %dl
	jne	.L876
	testl	%ebp, %ebp
	je	.L851
.L876:
	movl	$-1, (%rsp)
.L851:
	movl	(%rsp), %eax
	movq	%r14, %rdi
	movl	%eax, _ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip)
	call	__cxa_guard_release@PLT
.L849:
	cmpl	_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip), %ebx
	jge	.L853
	testl	%ebx, %ebx
	js	.L853
	jmp	.L897
.L874:
	endbr64
	movq	%rax, %rbx
.L855:
	movq	%r14, %rdi
	call	__cxa_guard_abort@PLT
	jmp	.L896
.L897:
	imulq	$12, %rbx, %rbp
	addq	%r13, %rbp
	movl	0(%rbp), %eax
	cmpl	$2, %eax
	je	.L871
	jmp	.L898
.L853:
	movl	$101, %eax
	salq	$32, %rax
	jmp	.L859
.L898:
	xorl	%eax, %eax
	movl	$1, %edx
	lock cmpxchgl	%edx, 0(%rbp)
	jne	.L860
	movl	(%r12), %eax
	leaq	4(%rsp), %rdi
	movl	%eax, (%rsp)
	xorl	%eax, %eax
	movl	%eax, 4(%rsp)
.LEHB7:
	call	cudaGetDevice@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L861
	call	cudaGetLastError@PLT
	leaq	.LC58(%rip), %rsi
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L895
	jmp	.L894
.L861:
	movl	(%rsp), %edi
	cmpl	%edi, 4(%rsp)
	je	.L863
	call	cudaSetDevice@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L863
	call	cudaGetLastError@PLT
	leaq	.LC7(%rip), %rsi
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L894
.L895:
	movl	%r12d, %edi
	call	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc
.LEHE7:
.L863:
	leaq	8(%rsp), %rdi
	leaq	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rsi
	movq	%rsp, %r15
.LEHB8:
	call	cudaFuncGetAttributes@PLT
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
.LEHE8:
	movl	%eax, %r12d
	testl	%r14d, %r14d
	jne	.L877
	testl	%eax, %eax
	jne	.L865
.L877:
	movl	%r14d, %r12d
.L865:
	imull	$10, 40(%rsp), %eax
	movq	%r15, %rdi
	movl	%eax, 4(%rbp)
	call	_ZN4cuda3__423__ensure_current_deviceD1Ev
	movl	%r12d, 8(%rbp)
	testl	%r12d, %r12d
	je	.L868
.LEHB9:
	call	cudaGetLastError@PLT
	jmp	.L868
.L875:
	endbr64
	movq	%rax, %rbx
.L869:
	movq	%r15, %rdi
	call	_ZN4cuda3__423__ensure_current_deviceD1Ev
.L896:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L894
	movq	%rbx, %rdi
	call	_Unwind_Resume@PLT
.LEHE9:
.L868:
	movl	$2, 0(%rbp)
	jmp	.L871
.L860:
	decl	%eax
	jne	.L871
.L872:
	movl	0(%rbp), %eax
	cmpl	$2, %eax
	jne	.L872
.L871:
	imulq	$12, %rbx, %rbx
	movq	4(%r13,%rbx), %rax
.L859:
	movq	152(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L873
.L894:
	call	__stack_chk_fail@PLT
.L873:
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11902:
	.section	.gcc_except_table._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,"aG",@progbits,_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,comdat
.LLSDA11902:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE11902-.LLSDACSB11902
.LLSDACSB11902:
	.uleb128 .LEHB6-.LFB11902
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L874-.LFB11902
	.uleb128 0
	.uleb128 .LEHB7-.LFB11902
	.uleb128 .LEHE7-.LEHB7
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB8-.LFB11902
	.uleb128 .LEHE8-.LEHB8
	.uleb128 .L875-.LFB11902
	.uleb128 0
	.uleb128 .LEHB9-.LFB11902
	.uleb128 .LEHE9-.LEHB9
	.uleb128 0
	.uleb128 0
.LLSDACSE11902:
	.section	.text._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,"axG",@progbits,_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,comdat
	.size	_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i, .-_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i
	.section	.text._ZN3cub17CUB_200700_890_NS10PtxVersionERi,"axG",@progbits,_ZN3cub17CUB_200700_890_NS10PtxVersionERi,comdat
	.weak	_ZN3cub17CUB_200700_890_NS10PtxVersionERi
	.type	_ZN3cub17CUB_200700_890_NS10PtxVersionERi, @function
_ZN3cub17CUB_200700_890_NS10PtxVersionERi:
.LFB7055:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	4(%rsp), %r13
	movl	$-1, 4(%rsp)
	movq	%r13, %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	sete	%dl
	testl	%eax, %eax
	setne	%al
	testb	%al, %dl
	jne	.L906
	testl	%ebx, %ebx
	jne	.L906
	movl	4(%rsp), %r12d
	jmp	.L900
.L906:
	orl	$-1, %r12d
.L900:
	movb	_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache(%rip), %al
	leaq	_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache(%rip), %rbx
	testb	%al, %al
	jne	.L902
	leaq	_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache(%rip), %r14
	movq	%r14, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L902
	movl	$384, %ecx
	xorl	%eax, %eax
	movq	%rbx, %rdi
	rep stosl
	movq	%r14, %rdi
	call	__cxa_guard_release@PLT
.L902:
	movl	%r12d, %edx
	movq	%r13, %rsi
	movq	%rbx, %rdi
	movl	%r12d, 4(%rsp)
	call	_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i
	movq	%rax, %r12
	movq	%rax, %rbx
	call	cudaGetLastError@PLT
	shrq	$32, %r12
	orl	%r12d, %eax
	movl	%r12d, %r13d
	jne	.L899
	movl	%ebx, 0(%rbp)
.L899:
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L905
	call	__stack_chk_fail@PLT
.L905:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	movl	%r13d, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7055:
	.size	_ZN3cub17CUB_200700_890_NS10PtxVersionERi, .-_ZN3cub17CUB_200700_890_NS10PtxVersionERi
	.section	.rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.str1.1,"aMS",@progbits,1
.LC59:
	.string	"basic_string: construction from null is not valid"
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC5IS3_EEPKcRKS3_,comdat
	.align 2
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, @function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_:
.LFB11914:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	jne	.L912
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L917
	leaq	.LC59(%rip), %rdi
	call	_ZSt19__throw_logic_errorPKc@PLT
.L912:
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	movq	%rsi, %rbp
	call	strlen@PLT
	movq	%rax, (%rsp)
	leaq	0(%rbp,%rax), %r12
	cmpq	$15, %rax
	jbe	.L914
	movq	%rsp, %rsi
	xorl	%edx, %edx
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT
	movq	%rax, (%rbx)
	movq	(%rsp), %rax
	movq	%rax, 16(%rbx)
.L914:
	movq	(%rbx), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	(%rsp), %rax
	movq	(%rbx), %rdx
	movq	%rax, 8(%rbx)
	movb	$0, (%rdx,%rax)
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L915
.L917:
	call	__stack_chk_fail@PLT
.L915:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11914:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	.set	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei.str1.1,"aMS",@progbits,1
.LC60:
	.string	"Unknown error"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei:
.LFB8300:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA8300
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movb	_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %al
	testb	%al, %al
	jne	.L920
	leaq	_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L920
	leaq	_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %r13
	leaq	7(%rsp), %rdx
	leaq	.LC60(%rip), %rsi
	movq	%r13, %rdi
.LEHB10:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE10:
	movq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GOTPCREL(%rip), %rdi
	leaq	__dso_handle(%rip), %rdx
	movq	%r13, %rsi
	call	__cxa_atexit@PLT
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L920:
	movl	%r12d, %edi
	call	strerror@PLT
	movq	%rax, %rsi
	testq	%rax, %rax
	je	.L922
	leaq	7(%rsp), %rdx
	movq	%rbx, %rdi
.LEHB11:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	jmp	.L918
.L922:
	leaq	_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_@PLT
	jmp	.L918
.L927:
	endbr64
	movq	%rax, %rbx
.L924:
	movq	%rbp, %rdi
	call	__cxa_guard_abort@PLT
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L932
	movq	%rbx, %rdi
	call	_Unwind_Resume@PLT
.LEHE11:
.L918:
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L926
.L932:
	call	__stack_chk_fail@PLT
.L926:
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8300:
	.section	.gcc_except_table._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,comdat
.LLSDA8300:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE8300-.LLSDACSB8300
.LLSDACSB8300:
	.uleb128 .LEHB10-.LFB8300
	.uleb128 .LEHE10-.LEHB10
	.uleb128 .L927-.LFB8300
	.uleb128 0
	.uleb128 .LEHB11-.LFB8300
	.uleb128 .LEHE11-.LEHB11
	.uleb128 0
	.uleb128 0
.LLSDACSE8300:
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,comdat
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei.str1.1,"aMS",@progbits,1
.LC61:
	.string	"unknown error"
.LC62:
	.string	"cudaErrorUnknown"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei
	.type	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei, @function
_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei:
.LFB8365:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA8365
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	movl	%edx, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
.LEHB12:
	call	cudaGetErrorString@PLT
	movl	%ebp, %edi
	movq	%rax, %rbx
	call	cudaGetErrorName@PLT
	movq	%rax, %rsi
	testq	%rbx, %rbx
	jne	.L934
	leaq	.LC61(%rip), %rbx
.L934:
	testq	%rsi, %rsi
	jne	.L935
	leaq	.LC62(%rip), %rsi
.L935:
	leaq	8(%rsp), %rbp
	leaq	7(%rsp), %rdx
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE12:
	leaq	.LC4(%rip), %rsi
	movq	%rbp, %rdi
.LEHB13:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT
.LEHE13:
	leaq	40(%rsp), %r13
	movq	%rax, %rsi
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT
	movq	%rbx, %rsi
	movq	%r13, %rdi
.LEHB14:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT
.LEHE14:
	movq	%rax, %rsi
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L939
	jmp	.L944
.L943:
	endbr64
	movq	%rax, %rbx
.L936:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L937
.L942:
	endbr64
	movq	%rax, %rbx
.L937:
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L944
	movq	%rbx, %rdi
.LEHB15:
	call	_Unwind_Resume@PLT
.LEHE15:
.L944:
	call	__stack_chk_fail@PLT
.L939:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	movq	%r12, %rax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8365:
	.section	.gcc_except_table._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,comdat
.LLSDA8365:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE8365-.LLSDACSB8365
.LLSDACSB8365:
	.uleb128 .LEHB12-.LFB8365
	.uleb128 .LEHE12-.LEHB12
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB13-.LFB8365
	.uleb128 .LEHE13-.LEHB13
	.uleb128 .L942-.LFB8365
	.uleb128 0
	.uleb128 .LEHB14-.LFB8365
	.uleb128 .LEHE14-.LEHB14
	.uleb128 .L943-.LFB8365
	.uleb128 0
	.uleb128 .LEHB15-.LFB8365
	.uleb128 .LEHE15-.LEHB15
	.uleb128 0
	.uleb128 0
.LLSDACSE8365:
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,comdat
	.size	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei, .-_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm
	.type	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm, @function
_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm:
.LFB12502:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12502
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
.LEHB16:
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L947
	movl	%eax, %ebp
	leaq	24(%rsp), %r12
	call	cudaGetLastError@PLT
.LEHE16:
	movl	$40, %edi
	call	__cxa_allocate_exception@PLT
	movq	%rax, %rbx
	call	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv
	movl	%ebp, %edx
	movq	%r12, %rdi
	movq	%rax, %rsi
	movq	(%rax), %rax
.LEHB17:
	call	*48(%rax)
.LEHE17:
	leaq	56(%rsp), %r14
	movq	24(%rsp), %rsi
	leaq	15(%rsp), %rdx
	movq	%r14, %rdi
.LEHB18:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE18:
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rax
	movb	$0, 24(%rbx)
	movq	%rbx, %rdi
	leaq	8(%rbx), %r13
	movq	%rax, (%rbx)
	leaq	24(%rbx), %rax
	movq	%rax, 8(%rbx)
	xorl	%eax, %eax
	movq	%rax, 16(%rbx)
	call	_ZNKSt9bad_alloc4whatEv@PLT
	movq	%rax, %rdi
	movq	%rax, %rbp
	call	strlen@PLT
	movq	16(%rbx), %rdx
	movq	%rbp, %rcx
	xorl	%esi, %esi
	movq	%rax, %r8
	movq	%r13, %rdi
.LEHB19:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@PLT
	leaq	.LC4(%rip), %rsi
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movabsq	$4611686018427387903, %rax
	subq	16(%rbx), %rax
	cmpq	%rdx, %rax
	jnb	.L948
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L961
	leaq	.LC5(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L948:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_appendEPKcm@PLT
.LEHE19:
	jmp	.L964
.L959:
	endbr64
	movq	%rax, %rbp
.L951:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbx, %rdi
	call	_ZNSt9bad_allocD2Ev@PLT
	movq	%r14, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L952
.L964:
	movq	%r14, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L961
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev(%rip), %rdx
	leaq	_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rsi
	movq	%rbx, %rdi
.LEHB20:
	call	__cxa_throw@PLT
.L947:
	movq	16(%rsp), %rax
	movq	88(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L956
	jmp	.L961
.L958:
	endbr64
	movq	%rax, %rbp
.L952:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L954
.L957:
	endbr64
	movq	%rax, %rbp
.L954:
	movq	%rbx, %rdi
	call	__cxa_free_exception@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L961
	movq	%rbp, %rdi
	call	_Unwind_Resume@PLT
.LEHE20:
.L961:
	call	__stack_chk_fail@PLT
.L956:
	addq	$96, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12502:
	.section	.gcc_except_table._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,comdat
.LLSDA12502:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12502-.LLSDACSB12502
.LLSDACSB12502:
	.uleb128 .LEHB16-.LFB12502
	.uleb128 .LEHE16-.LEHB16
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB17-.LFB12502
	.uleb128 .LEHE17-.LEHB17
	.uleb128 .L957-.LFB12502
	.uleb128 0
	.uleb128 .LEHB18-.LFB12502
	.uleb128 .LEHE18-.LEHB18
	.uleb128 .L958-.LFB12502
	.uleb128 0
	.uleb128 .LEHB19-.LFB12502
	.uleb128 .LEHE19-.LEHB19
	.uleb128 .L959-.LFB12502
	.uleb128 0
	.uleb128 .LEHB20-.LFB12502
	.uleb128 .LEHE20-.LEHB20
	.uleb128 0
	.uleb128 0
.LLSDACSE12502:
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm, .-_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm
	.section	.text._ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm
	.type	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm, @function
_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm:
.LFB12486:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	8(%rdi), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12486:
	.size	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm, .-_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv
	.type	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv, @function
_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv:
.LFB12379:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12379
	endbr64
	movq	16(%rdi), %rdx
	testq	%rdx, %rdx
	je	.L973
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movq	8(%rdi), %rsi
	salq	$2, %rdx
	movq	(%rdi), %rdi
	movl	$4, %ecx
	call	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm
	xorl	%eax, %eax
	movq	%rax, 8(%rbx)
	movq	%rax, 16(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
.L973:
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE12379:
	.section	.gcc_except_table._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv,comdat
.LLSDA12379:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12379-.LLSDACSB12379
.LLSDACSB12379:
.LLSDACSE12379:
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv
	.section	.rodata._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v.str1.1,"aMS",@progbits,1
.LC63:
	.string	"CCCL"
	.section	.text._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,"axG",@progbits,_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,comdat
	.weak	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	.type	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v, @function
_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v:
.LFB12611:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12611
	endbr64
	movb	_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %al
	testb	%al, %al
	jne	.L986
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %rbx
	movq	%rbx, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L978
	movq	480+nvtxGlobals_v3(%rip), %rdx
	xorl	%eax, %eax
	testq	%rdx, %rdx
	je	.L980
	leaq	.LC63(%rip), %rdi
	call	*%rdx
.L980:
	movq	%rbx, %rdi
	movq	%rax, _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip)
	call	__cxa_guard_release@PLT
.L978:
	leaq	_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
.L986:
	.cfi_restore 3
	leaq	_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %rax
	ret
	.cfi_endproc
.LFE12611:
	.section	.gcc_except_table._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,"aG",@progbits,_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,comdat
.LLSDA12611:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12611-.LLSDACSB12611
.LLSDACSB12611:
.LLSDACSE12611:
	.section	.text._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,"axG",@progbits,_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,comdat
	.size	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v, .-_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	.section	.text._ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev,"axG",@progbits,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED5Ev,comdat
	.align 2
	.weak	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	.hidden	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	.type	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev, @function
_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev:
.LFB12593:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12593
	endbr64
	cmpb	$0, 1(%rdi)
	je	.L992
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	movq	(%rax), %rdi
	call	nvtxDomainRangePop
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
.L992:
	ret
	.cfi_endproc
.LFE12593:
	.section	.gcc_except_table._ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev,"aG",@progbits,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED5Ev,comdat
.LLSDA12593:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12593-.LLSDACSB12593
.LLSDACSB12593:
.LLSDACSE12593:
	.section	.text._ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev,"axG",@progbits,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED5Ev,comdat
	.size	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev, .-_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	.weak	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED1Ev
	.hidden	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED1Ev
	.set	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED1Ev,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	.section	.rodata.str1.1
.LC64:
	.string	"cub::DeviceFor::Bulk"
.LC66:
	.string	"parallel_for failed"
.LC67:
	.string	"parallel_for: failed to synchronize"
	.section	.rodata
	.align 32
.LC0:
	.value	3
	.value	48
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.quad	0
	.long	0
	.zero	4
	.quad	0
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB11484:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA11484
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	leaq	_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip), %rbx
	addq	$-128, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	movb	_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip), %al
	testb	%al, %al
	jne	.L997
	leaq	_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L997
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE(%rip), %rax
	leaq	__dso_handle(%rip), %r12
	movq	%rax, _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip)
	movb	_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource(%rip), %al
	leaq	_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource(%rip), %r13
	testb	%al, %al
	jne	.L1000
	leaq	_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource(%rip), %r14
	movq	%r14, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L1000
	leaq	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED1Ev(%rip), %rdi
	movq	%r12, %rdx
	movq	%r13, %rsi
	call	__cxa_atexit@PLT
	movq	%r14, %rdi
	call	__cxa_guard_release@PLT
.L1000:
	leaq	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED1Ev(%rip), %rdi
	movq	%r12, %rdx
	movq	%rbx, %rsi
	movq	%r13, 8+_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip)
	call	__cxa_atexit@PLT
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L997:
	xorl	%edx, %edx
	movl	$4, %esi
	movq	%rbx, %rdi
	movq	%rbx, 16(%rsp)
	movq	%rdx, 24(%rsp)
	leaq	16(%rsp), %rbp
	movq	%rdx, 32(%rsp)
	movq	%rdx, 40(%rsp)
	movl	$4, %edx
.LEHB21:
	call	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm
.LEHE21:
	movq	%rax, 24(%rsp)
	movq	%rax, %rbx
	movq	$1, 32(%rsp)
	movq	$1, 40(%rsp)
	movw	$0, 10(%rsp)
	movb	_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %al
	testb	%al, %al
	jne	.L1003
	leaq	_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %r12
	movq	%r12, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L1003
	call	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	movq	464+nvtxGlobals_v3(%rip), %rdx
	movq	(%rax), %rdi
	xorl	%eax, %eax
	testq	%rdx, %rdx
	je	.L1005
	leaq	.LC64(%rip), %rsi
	call	*%rdx
.L1005:
	movq	%r12, %rdi
	movq	%rax, _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name(%rip)
	call	__cxa_guard_release@PLT
.L1003:
	movb	_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %al
	testb	%al, %al
	jne	.L1007
	leaq	_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %r12
	movq	%r12, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L1007
	movq	_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rax
	leaq	_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi
	movl	$12, %ecx
	leaq	.LC0(%rip), %rsi
	rep movsl
	movq	%r12, %rdi
	movl	$3, 32+_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr(%rip)
	movq	%rax, 40+_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr(%rip)
	call	__cxa_guard_release@PLT
.L1007:
	cmpb	$0, 11(%rsp)
	je	.L1009
	call	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	movq	(%rax), %rdi
	call	nvtxDomainRangePop
.L1009:
	call	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	movq	(%rax), %rdi
	movq	416+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L1010
	leaq	_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rsi
	call	*%rax
.L1010:
	xorl	%eax, %eax
	leaq	12(%rsp), %rdi
	movb	$1, 11(%rsp)
	leaq	10(%rsp), %r12
	movl	%eax, 12(%rsp)
.LEHB22:
	call	_ZN3cub17CUB_200700_890_NS10PtxVersionERi
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	movl	%eax, %r13d
	testl	%r14d, %r14d
	jne	.L1035
	testl	%eax, %eax
	jne	.L1011
.L1035:
	movl	%r14d, %r13d
	testl	%r14d, %r14d
	jne	.L1011
	movl	$1, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, 56(%rsp)
	movabsq	$4294967297, %rdi
	movabsq	$1099511627777, %rax
	movq	%rdi, 96(%rsp)
	movl	100(%rsp), %ecx
	movq	%rax, 88(%rsp)
	movq	92(%rsp), %rdx
	movl	88(%rsp), %esi
	movl	$0x00000000, 64(%rsp)
	movq	%rdi, 80(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L1013
.L1015:
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	jmp	.L1071
.L1013:
	movq	56(%rsp), %rsi
	movss	64(%rsp), %xmm0
	movl	$1, %edi
	call	_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_
	jmp	.L1015
.L1071:
	movl	%eax, %ebx
	testl	%r13d, %r13d
	jne	.L1036
	testl	%eax, %eax
	jne	.L1016
.L1036:
	movl	%r13d, %ebx
	testl	%r13d, %r13d
	jne	.L1016
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L1016
	movl	$1, %edi
	call	_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
.L1016:
	call	cudaGetLastError@PLT
.LEHE22:
	movl	%eax, %r13d
	testl	%ebx, %ebx
	jne	.L1037
	testl	%eax, %eax
	jne	.L1011
.L1037:
	movl	%ebx, %r13d
.L1011:
	movq	%r12, %rdi
	call	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	leaq	.LC66(%rip), %rsi
	movl	%r13d, %edi
.LEHB23:
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	jmp	.L1072
.L1034:
	endbr64
	movq	%rax, %rbx
.L1020:
	movq	%r12, %rdi
	call	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	jmp	.L1026
.L1072:
	movl	$1, %edi
	call	_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st
	movl	%eax, %edi
	leaq	.LC67(%rip), %rsi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
.LEHE23:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 88(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 80(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
.LEHB24:
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L1024
	jmp	.L1025
.L1033:
	endbr64
	jmp	.L1070
.L1024:
	call	_Z22__device_stub__Z4testvv
.LEHE24:
.L1025:
	movq	%rbp, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L1028
	jmp	.L1067
.L1032:
	endbr64
.L1070:
	movq	%rax, %rbx
.L1026:
	movq	%rbp, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L1067
	movq	%rbx, %rdi
.LEHB25:
	call	_Unwind_Resume@PLT
.LEHE25:
.L1067:
	call	__stack_chk_fail@PLT
.L1028:
	subq	$-128, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11484:
	.section	.gcc_except_table,"a",@progbits
.LLSDA11484:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE11484-.LLSDACSB11484
.LLSDACSB11484:
	.uleb128 .LEHB21-.LFB11484
	.uleb128 .LEHE21-.LEHB21
	.uleb128 .L1033-.LFB11484
	.uleb128 0
	.uleb128 .LEHB22-.LFB11484
	.uleb128 .LEHE22-.LEHB22
	.uleb128 .L1034-.LFB11484
	.uleb128 0
	.uleb128 .LEHB23-.LFB11484
	.uleb128 .LEHE23-.LEHB23
	.uleb128 .L1033-.LFB11484
	.uleb128 0
	.uleb128 .LEHB24-.LFB11484
	.uleb128 .LEHE24-.LEHB24
	.uleb128 .L1032-.LFB11484
	.uleb128 0
	.uleb128 .LEHB25-.LFB11484
	.uleb128 .LEHE25-.LEHB25
	.uleb128 0
	.uleb128 0
.LLSDACSE11484:
	.section	.text.startup
	.size	main, .-main
	.weak	_ZTSN4cuda3__410cuda_errorE
	.section	.rodata._ZTSN4cuda3__410cuda_errorE,"aG",@progbits,_ZTSN4cuda3__410cuda_errorE,comdat
	.align 16
	.type	_ZTSN4cuda3__410cuda_errorE, @object
	.size	_ZTSN4cuda3__410cuda_errorE, 24
_ZTSN4cuda3__410cuda_errorE:
	.string	"N4cuda3__410cuda_errorE"
	.weak	_ZTIN4cuda3__410cuda_errorE
	.section	.data.rel.ro._ZTIN4cuda3__410cuda_errorE,"awG",@progbits,_ZTIN4cuda3__410cuda_errorE,comdat
	.align 8
	.type	_ZTIN4cuda3__410cuda_errorE, @object
	.size	_ZTIN4cuda3__410cuda_errorE, 24
_ZTIN4cuda3__410cuda_errorE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN4cuda3__410cuda_errorE
	.quad	_ZTISt13runtime_error
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE, 55
_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE:
	.string	"N6thrust20THRUST_200700_890_NS6system14error_categoryE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE, 16
_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, 70
_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE:
	.string	"N6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, 69
_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE:
	.string	"N6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, 76
_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE:
	.string	"N6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE, 53
_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE:
	.string	"N6thrust20THRUST_200700_890_NS6system12system_errorE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE
	.quad	_ZTISt13runtime_error
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, 56
_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE:
	.string	"N6thrust20THRUST_200700_890_NS6system6detail9bad_allocE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE
	.quad	_ZTISt9bad_alloc
	.weak	_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE, 74
_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE:
	.string	"N6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE, 16
_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE
	.weak	_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE, 135
_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE:
	.string	"N6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE, 16
_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, 193
_ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE:
	.string	"N6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE
	.quad	_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE
	.weak	_ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, 228
_ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE:
	.string	"N6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, 24
_ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE
	.quad	_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE
	.weak	_ZTVN4cuda3__410cuda_errorE
	.section	.data.rel.ro._ZTVN4cuda3__410cuda_errorE,"awG",@progbits,_ZTVN4cuda3__410cuda_errorE,comdat
	.align 8
	.type	_ZTVN4cuda3__410cuda_errorE, @object
	.size	_ZTVN4cuda3__410cuda_errorE, 40
_ZTVN4cuda3__410cuda_errorE:
	.quad	0
	.quad	_ZTIN4cuda3__410cuda_errorE
	.quad	_ZN4cuda3__410cuda_errorD1Ev
	.quad	_ZN4cuda3__410cuda_errorD0Ev
	.quad	_ZNKSt13runtime_error4whatEv
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, 72
_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, 72
_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, 72
_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE, 40
_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, 40
_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, 56
_ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm
	.quad	_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm
	.quad	_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_
	.weak	_ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, 56
_ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE
	.quad	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm
	.quad	_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm
	.quad	_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_
	.weak	_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d
	.section	.bss._ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,"awG",@nobits,_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,comdat
	.align 8
	.type	_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, @gnu_unique_object
	.size	_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, 8
_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d:
	.zero	8
	.weak	_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d
	.section	.bss._ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,"awG",@nobits,_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,comdat
	.align 8
	.type	_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, @gnu_unique_object
	.size	_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, 8
_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d:
	.zero	8
	.weak	_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr, 8
_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr
	.section	.bss._ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr,comdat
	.align 32
	.type	_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr, 48
_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr:
	.zero	48
	.weak	_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name, 8
_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name
	.section	.bss._ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name,comdat
	.align 8
	.type	_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name, 8
_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name:
	.zero	8
	.weak	_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource
	.section	.bss._ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource,comdat
	.align 8
	.type	_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource, @gnu_unique_object
	.size	_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource, 8
_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource:
	.zero	8
	.weak	_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource
	.section	.data.rel.local._ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource,"awG",@progbits,_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource,comdat
	.align 8
	.type	_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource, @gnu_unique_object
	.size	_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource, 8
_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource:
	.quad	_ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE+16
	.weak	_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource
	.section	.bss._ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource,comdat
	.align 8
	.type	_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource, @gnu_unique_object
	.size	_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource, 8
_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource:
	.zero	8
	.weak	_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource
	.section	.bss._ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource,"awG",@nobits,_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource,comdat
	.align 16
	.type	_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource, @gnu_unique_object
	.size	_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource, 16
_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource:
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	.weak	_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, 8
_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache
	.section	.bss._ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,comdat
	.align 32
	.type	_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, 1536
_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache:
	.zero	1536
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata
	.type	_ZN6thrust20THRUST_200700_890_NSL6deviceE, @object
	.size	_ZN6thrust20THRUST_200700_890_NSL6deviceE, 1
_ZN6thrust20THRUST_200700_890_NSL6deviceE:
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	.type	_ZN6thrust20THRUST_200700_890_NS6system3cppL3parE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS6system3cppL3parE, 1
_ZN6thrust20THRUST_200700_890_NS6system3cppL3parE:
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	.weak	_ZN4cuda3std3__420unreachable_sentinelE
	.section	.rodata._ZN4cuda3std3__420unreachable_sentinelE,"aG",@progbits,_ZN4cuda3std3__420unreachable_sentinelE,comdat
	.type	_ZN4cuda3std3__420unreachable_sentinelE, @gnu_unique_object
	.size	_ZN4cuda3std3__420unreachable_sentinelE, 1
_ZN4cuda3std3__420unreachable_sentinelE:
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	.weak	_ZN4cuda3std3__45__cpo5crendE
	.section	.rodata._ZN4cuda3std3__45__cpo5crendE,"aG",@progbits,_ZN4cuda3std3__45__cpo5crendE,comdat
	.type	_ZN4cuda3std3__45__cpo5crendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo5crendE, 1
_ZN4cuda3std3__45__cpo5crendE:
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	.weak	_ZN4cuda3std3__45__cpo7crbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo7crbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo7crbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo7crbeginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo7crbeginE, 1
_ZN4cuda3std3__45__cpo7crbeginE:
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	.weak	_ZN4cuda3std3__45__cpo4rendE
	.section	.rodata._ZN4cuda3std3__45__cpo4rendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4rendE,comdat
	.type	_ZN4cuda3std3__45__cpo4rendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo4rendE, 1
_ZN4cuda3std3__45__cpo4rendE:
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	.weak	_ZN4cuda3std3__45__cpo6rbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo6rbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6rbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo6rbeginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo6rbeginE, 1
_ZN4cuda3std3__45__cpo6rbeginE:
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	.weak	_ZN4cuda3std6ranges3__45__cpo8distanceE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo8distanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo8distanceE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo8distanceE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo8distanceE, 1
_ZN4cuda3std6ranges3__45__cpo8distanceE:
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	.weak	_ZN4cuda3std6ranges3__45__cpo5ssizeE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo5ssizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5ssizeE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo5ssizeE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo5ssizeE, 1
_ZN4cuda3std6ranges3__45__cpo5ssizeE:
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	.weak	_ZN4cuda3std6ranges3__45__cpo4sizeE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4sizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4sizeE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4sizeE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4sizeE, 1
_ZN4cuda3std6ranges3__45__cpo4sizeE:
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	.weak	_ZN4cuda3std6ranges3__45__cpo5cdataE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo5cdataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5cdataE,comdat
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_ZN4cuda3std6ranges3__45__cpo5cdataE:
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	.weak	_ZN4cuda3std6ranges3__45__cpo4dataE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4dataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4dataE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4dataE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4dataE, 1
_ZN4cuda3std6ranges3__45__cpo4dataE:
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	.weak	_ZN4cuda3std6ranges3__45__cpo4prevE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4prevE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4prevE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4prevE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4prevE, 1
_ZN4cuda3std6ranges3__45__cpo4prevE:
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	.weak	_ZN4cuda3std6ranges3__45__cpo4nextE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4nextE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4nextE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4nextE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4nextE, 1
_ZN4cuda3std6ranges3__45__cpo4nextE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_swapE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_swapE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4cendE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4cendE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4cendE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4cendE, 1
_ZN4cuda3std6ranges3__45__cpo4cendE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo6cbeginE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo6cbeginE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo6cbeginE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo6cbeginE, 1
_ZN4cuda3std6ranges3__45__cpo6cbeginE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo3endE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo3endE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo3endE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo3endE, 1
_ZN4cuda3std6ranges3__45__cpo3endE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo5beginE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5beginE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo5beginE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo5beginE, 1
_ZN4cuda3std6ranges3__45__cpo5beginE:
	.zero	1
	.weak	_ZN4cuda3std3__47nulloptE
	.section	.rodata._ZN4cuda3std3__47nulloptE,"aG",@progbits,_ZN4cuda3std3__47nulloptE,comdat
	.type	_ZN4cuda3std3__47nulloptE, @gnu_unique_object
	.size	_ZN4cuda3std3__47nulloptE, 1
_ZN4cuda3std3__47nulloptE:
	.zero	1
	.hidden	InitializeInjectionNvtx2_fnptr
	.weak	InitializeInjectionNvtx2_fnptr
	.bss
	.align 8
	.type	InitializeInjectionNvtx2_fnptr, @object
	.size	InitializeInjectionNvtx2_fnptr, 8
InitializeInjectionNvtx2_fnptr:
	.zero	8
	.hidden	nvtxGlobals_v3
	.weak	nvtxGlobals_v3
	.section	.data.rel.local,"aw"
	.align 32
	.type	nvtxGlobals_v3, @object
	.size	nvtxGlobals_v3, 1168
nvtxGlobals_v3:
	.long	0
	.zero	4
	.quad	16
	.quad	nvtxEtiGetModuleFunctionTable_v3
	.quad	24
	.long	3
	.long	0
	.quad	nvtxEtiSetInjectionNvtxVersion_v3
	.quad	nvtxMarkEx_impl_init_v3
	.quad	nvtxMarkA_impl_init_v3
	.quad	nvtxMarkW_impl_init_v3
	.quad	nvtxRangeStartEx_impl_init_v3
	.quad	nvtxRangeStartA_impl_init_v3
	.quad	nvtxRangeStartW_impl_init_v3
	.quad	nvtxRangeEnd_impl_init_v3
	.quad	nvtxRangePushEx_impl_init_v3
	.quad	nvtxRangePushA_impl_init_v3
	.quad	nvtxRangePushW_impl_init_v3
	.quad	nvtxRangePop_impl_init_v3
	.quad	nvtxNameCategoryA_impl_init_v3
	.quad	nvtxNameCategoryW_impl_init_v3
	.quad	nvtxNameOsThreadA_impl_init_v3
	.quad	nvtxNameOsThreadW_impl_init_v3
	.quad	nvtxNameCuDeviceA_impl_init_v3
	.quad	nvtxNameCuDeviceW_impl_init_v3
	.quad	nvtxNameCuContextA_impl_init_v3
	.quad	nvtxNameCuContextW_impl_init_v3
	.quad	nvtxNameCuStreamA_impl_init_v3
	.quad	nvtxNameCuStreamW_impl_init_v3
	.quad	nvtxNameCuEventA_impl_init_v3
	.quad	nvtxNameCuEventW_impl_init_v3
	.quad	nvtxNameClDeviceA_impl_init_v3
	.quad	nvtxNameClDeviceW_impl_init_v3
	.quad	nvtxNameClContextA_impl_init_v3
	.quad	nvtxNameClContextW_impl_init_v3
	.quad	nvtxNameClCommandQueueA_impl_init_v3
	.quad	nvtxNameClCommandQueueW_impl_init_v3
	.quad	nvtxNameClMemObjectA_impl_init_v3
	.quad	nvtxNameClMemObjectW_impl_init_v3
	.quad	nvtxNameClSamplerA_impl_init_v3
	.quad	nvtxNameClSamplerW_impl_init_v3
	.quad	nvtxNameClProgramA_impl_init_v3
	.quad	nvtxNameClProgramW_impl_init_v3
	.quad	nvtxNameClEventA_impl_init_v3
	.quad	nvtxNameClEventW_impl_init_v3
	.quad	nvtxNameCudaDeviceA_impl_init_v3
	.quad	nvtxNameCudaDeviceW_impl_init_v3
	.quad	nvtxNameCudaStreamA_impl_init_v3
	.quad	nvtxNameCudaStreamW_impl_init_v3
	.quad	nvtxNameCudaEventA_impl_init_v3
	.quad	nvtxNameCudaEventW_impl_init_v3
	.quad	nvtxDomainMarkEx_impl_init_v3
	.quad	nvtxDomainRangeStartEx_impl_init_v3
	.quad	nvtxDomainRangeEnd_impl_init_v3
	.quad	nvtxDomainRangePushEx_impl_init_v3
	.quad	nvtxDomainRangePop_impl_init_v3
	.quad	nvtxDomainResourceCreate_impl_init_v3
	.quad	nvtxDomainResourceDestroy_impl_init_v3
	.quad	nvtxDomainNameCategoryA_impl_init_v3
	.quad	nvtxDomainNameCategoryW_impl_init_v3
	.quad	nvtxDomainRegisterStringA_impl_init_v3
	.quad	nvtxDomainRegisterStringW_impl_init_v3
	.quad	nvtxDomainCreateA_impl_init_v3
	.quad	nvtxDomainCreateW_impl_init_v3
	.quad	nvtxDomainDestroy_impl_init_v3
	.quad	nvtxInitialize_impl_init_v3
	.quad	nvtxDomainSyncUserCreate_impl_init_v3
	.quad	nvtxDomainSyncUserDestroy_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.quad	nvtxDomainSyncUserReleasing_impl_init_v3
	.quad	0
	.quad	nvtxGlobals_v3+48
	.quad	nvtxGlobals_v3+56
	.quad	nvtxGlobals_v3+64
	.quad	nvtxGlobals_v3+72
	.quad	nvtxGlobals_v3+80
	.quad	nvtxGlobals_v3+88
	.quad	nvtxGlobals_v3+96
	.quad	nvtxGlobals_v3+104
	.quad	nvtxGlobals_v3+112
	.quad	nvtxGlobals_v3+120
	.quad	nvtxGlobals_v3+128
	.quad	nvtxGlobals_v3+136
	.quad	nvtxGlobals_v3+144
	.quad	nvtxGlobals_v3+152
	.quad	nvtxGlobals_v3+160
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+168
	.quad	nvtxGlobals_v3+176
	.quad	nvtxGlobals_v3+184
	.quad	nvtxGlobals_v3+192
	.quad	nvtxGlobals_v3+200
	.quad	nvtxGlobals_v3+208
	.quad	nvtxGlobals_v3+216
	.quad	nvtxGlobals_v3+224
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+232
	.quad	nvtxGlobals_v3+240
	.quad	nvtxGlobals_v3+248
	.quad	nvtxGlobals_v3+256
	.quad	nvtxGlobals_v3+264
	.quad	nvtxGlobals_v3+272
	.quad	nvtxGlobals_v3+280
	.quad	nvtxGlobals_v3+288
	.quad	nvtxGlobals_v3+296
	.quad	nvtxGlobals_v3+304
	.quad	nvtxGlobals_v3+312
	.quad	nvtxGlobals_v3+320
	.quad	nvtxGlobals_v3+328
	.quad	nvtxGlobals_v3+336
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+344
	.quad	nvtxGlobals_v3+352
	.quad	nvtxGlobals_v3+360
	.quad	nvtxGlobals_v3+368
	.quad	nvtxGlobals_v3+376
	.quad	nvtxGlobals_v3+384
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+392
	.quad	nvtxGlobals_v3+400
	.quad	nvtxGlobals_v3+408
	.quad	nvtxGlobals_v3+416
	.quad	nvtxGlobals_v3+424
	.quad	nvtxGlobals_v3+432
	.quad	nvtxGlobals_v3+440
	.quad	nvtxGlobals_v3+448
	.quad	nvtxGlobals_v3+456
	.quad	nvtxGlobals_v3+464
	.quad	nvtxGlobals_v3+472
	.quad	nvtxGlobals_v3+480
	.quad	nvtxGlobals_v3+488
	.quad	nvtxGlobals_v3+496
	.quad	nvtxGlobals_v3+504
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+512
	.quad	nvtxGlobals_v3+520
	.quad	nvtxGlobals_v3+528
	.quad	nvtxGlobals_v3+536
	.quad	nvtxGlobals_v3+544
	.quad	nvtxGlobals_v3+552
	.quad	0
	.section	.rodata
	.type	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, 1
_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE:
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	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, 1
_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE:
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	.weak	_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result
	.section	.bss._ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,comdat
	.align 8
	.type	_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, @gnu_unique_object
	.size	_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, 8
_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result:
	.zero	8
	.weak	_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result
	.section	.bss._ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,"awG",@nobits,_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,comdat
	.align 8
	.type	_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, @gnu_unique_object
	.size	_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, 8
_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result:
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	.weak	_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result
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	.align 8
	.type	_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, @gnu_unique_object
	.size	_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, 8
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	.align 8
	.type	_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, @gnu_unique_object
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	.type	_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, @gnu_unique_object
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	.align 8
	.type	_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, @gnu_unique_object
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	.align 8
	.type	_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, @gnu_unique_object
	.size	_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, 8
_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err:
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	.weak	_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err
	.section	.bss._ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,"awG",@nobits,_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,comdat
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	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E, 1
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	.weak	_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count
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	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, 8
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	.weak	_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count
	.section	.bss._ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,comdat
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	.section	.rodata
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	.type	_ZN4cuda3std3__48in_placeE, @gnu_unique_object
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_ZN4cuda3std3__45__cpo4cendE:
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_ZN4cuda3std3__45__cpo6cbeginE:
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	.type	_ZN4cuda3std3__45__cpo3endE, @gnu_unique_object
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_ZN4cuda3std3__45__cpo3endE:
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	.type	_ZN4cuda3std3__45__cpo5beginE, @gnu_unique_object
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_ZN4cuda3std3__45__cpo5beginE:
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	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
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_ZN4cuda3std3__419piecewise_constructE:
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	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
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_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
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	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.section	.rodata
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	.zero	1
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	.weak	DW.ref.__gxx_personality_v0
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	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.hidden	__dso_handle
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include "../ginkgo/GOrderHandler.h"
#include <thrust/device_vector.h>
#define def_dvec(t) thrust::device_vector<t>

using namespace std;

__global__ void test(){
    // Creating an OrderHandler struct
    gpu_ginkgo::OrderHandler<100, 10> ggoh(1024, 10);
    ggoh.showOrderBookInfo();
    ggoh.loadStrategy(33, 0., 0.);
    
    // Start Updating Book
    printf("{{{{{{{{{{{{{  NEW BOOK UPDATE }}}}}}}}}}}}}\n");
    int bz1[10] = {1,2,3,4,5,5,4,3,2,1};
    int ap1 = 1029, bp1 = 1028;
    double mp1 = 1028.5;
    ggoh.getTimeInfo(1., 0.2);
    ggoh.bookUpdateSim(bz1, ap1, bp1, mp1);
    ggoh.cancelAndSendNewOrders();
    ggoh.showBasicInfo();
    ggoh.showOrderBookInfo();
    
    // New book Update
    printf("{{{{{{{{{{{{{  NEW BOOK UPDATE }}}}}}}}}}}}}\n");
    int bz2[10] = {1, 3, 5, 7, 9, 11, 11, 9, 7, 5};
    int ap2 = 1030, bp2 = 1029;
    double mp2 = 1029.5;
    ggoh.getTimeInfo(1.3, 0.2);
    ggoh.bookUpdateSim(bz2, ap2, bp2, mp2);
    ggoh.cancelAndSendNewOrders();
    ggoh.showBasicInfo();
    ggoh.showOrderBookInfo();
    
    // New book Update
    printf("{{{{{{{{{{{{{  NEW BOOK UPDATE }}}}}}}}}}}}}\n");
    int bz3[10] = {3, 23, 4, 2, 3, 1, 9, 9, 7, 5};
    int ap3 = 1032, bp3 = 1031;
    double mp3 = 1031.5;
    ggoh.getTimeInfo(1.3, 0.2);
    ggoh.bookUpdateSim(bz3, ap3, bp3, mp3);
    ggoh.cancelAndSendNewOrders();
    ggoh.showBasicInfo();
    ggoh.showOrderBookInfo();
    
    // trade
    printf("{{{{{{{{{{{{{  TRADE COMES }}}}}}}}}}}}}\n");
    int tv = 32;
    ggoh.getTimeInfo(1.6, 0.2);
    ggoh.processTrade(true, 1028, tv);
    ggoh.cancelAndSendNewOrders();
    ggoh.showBasicInfo();
    ggoh.showOrderBookInfo();
    
    // Test finished
    printf("\n <<< TEST FINISHED !!! >>>\n");
}

int main(){
    def_dvec(float) dev_out(1, 0);
    test<<<1, 1>>>();
    return 0;
}
	.text
	.file	"GOrderHandler_test.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z19__device_stub__testv        # -- Begin function _Z19__device_stub__testv
	.type	_Z19__device_stub__testv,@function
_Z19__device_stub__testv:               # @_Z19__device_stub__testv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_Z4testv, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z19__device_stub__testv, .Lfunc_end0-_Z19__device_stub__testv
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	%rsp, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2IiEET_S6_
.Ltmp0:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp1:
# %bb.1:
	testl	%eax, %eax
	jne	.LBB1_3
# %bb.2:
.Ltmp2:
	callq	_Z19__device_stub__testv
.Ltmp3:
.LBB1_3:
	movq	16(%rsp), %rdx
	testq	%rdx, %rdx
	je	.LBB1_5
# %bb.4:
	movq	(%rsp), %rax
	movq	8(%rsp), %rsi
	shlq	$2, %rdx
	movq	8(%rax), %rdi
.Ltmp8:
	movl	$4, %ecx
	callq	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm
.Ltmp9:
.LBB1_5:                                # %_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEED2Ev.exit4
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB1_6:
	.cfi_def_cfa_offset 48
.Ltmp10:
	jmp	.LBB1_7
.LBB1_8:
.Ltmp4:
	movq	%rax, %rbx
	movq	16(%rsp), %rdx
	testq	%rdx, %rdx
	je	.LBB1_10
# %bb.9:
	movq	(%rsp), %rax
	movq	8(%rsp), %rsi
	shlq	$2, %rdx
	movq	8(%rax), %rdi
.Ltmp5:
	movl	$4, %ecx
	callq	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm
.Ltmp6:
.LBB1_10:                               # %_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEED2Ev.exit
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.LBB1_11:
.Ltmp7:
.LBB1_7:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp3-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp3
	.uleb128 .Ltmp4-.Lfunc_begin0           #     jumps to .Ltmp4
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp8-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp9-.Ltmp8                  #   Call between .Ltmp8 and .Ltmp9
	.uleb128 .Ltmp10-.Lfunc_begin0          #     jumps to .Ltmp10
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp5-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp6-.Ltmp5                  #   Call between .Ltmp5 and .Ltmp6
	.uleb128 .Ltmp7-.Lfunc_begin0           #     jumps to .Ltmp7
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Lfunc_end1-.Ltmp6             #   Call between .Ltmp6 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2IiEET_S6_,"axG",@progbits,_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2IiEET_S6_,comdat
	.weak	_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2IiEET_S6_ # -- Begin function _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2IiEET_S6_
	.p2align	1, 0x90
	.type	_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2IiEET_S6_,@function
_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2IiEET_S6_: # @_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2IiEET_S6_
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movl	%esi, %r14d
	movq	%rdi, %rbx
	callq	_ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v
	movq	%rax, (%rbx)
	xorps	%xmm0, %xmm0
	movups	%xmm0, 8(%rbx)
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebp, %xmm0
	movslq	%r14d, %rsi
	movq	$0, 24(%rbx)
	leaq	12(%rsp), %rdx
	movss	%xmm0, (%rdx)
.Ltmp11:
	movq	%rbx, %rdi
	callq	_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE9fill_initEmRKf
.Ltmp12:
# %bb.1:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_3:
	.cfi_def_cfa_offset 48
.Ltmp13:
	movq	%rax, %r14
.Ltmp14:
	movq	%rbx, %rdi
	callq	_ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv
.Ltmp15:
# %bb.4:                                # %_ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEED2Ev.exit
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.LBB2_2:
.Ltmp16:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end2:
	.size	_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2IiEET_S6_, .Lfunc_end2-_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2IiEET_S6_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2IiEET_S6_,"aG",@progbits,_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2IiEET_S6_,comdat
	.p2align	2, 0x0
GCC_except_table2:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase1-.Lttbaseref1
.Lttbaseref1:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp11-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp11
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp11-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp12-.Ltmp11                #   Call between .Ltmp11 and .Ltmp12
	.uleb128 .Ltmp13-.Lfunc_begin1          #     jumps to .Ltmp13
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp14-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Ltmp15-.Ltmp14                #   Call between .Ltmp14 and .Ltmp15
	.uleb128 .Ltmp16-.Lfunc_begin1          #     jumps to .Ltmp16
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp15-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Lfunc_end2-.Ltmp15            #   Call between .Ltmp15 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v,"axG",@progbits,_ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v,comdat
	.weak	_ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v # -- Begin function _ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v
	.type	_ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v,@function
_ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v: # @_ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v
	.cfi_startproc
# %bb.0:
	movb	_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource(%rip), %al
	testb	%al, %al
	je	.LBB3_1
.LBB3_4:
	movl	$_ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource, %eax
	retq
.LBB3_1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB3_3
# %bb.2:
	movq	$_ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE+16, _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource(%rip)
	callq	_ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v
	movq	%rax, _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource+8(%rip)
	movl	$_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource, %edi
	callq	__cxa_guard_release
.LBB3_3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
	jmp	.LBB3_4
.Lfunc_end3:
	.size	_ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v, .Lfunc_end3-_ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev,"axG",@progbits,_ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev,comdat
	.weak	_ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev # -- Begin function _ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev
	.p2align	1, 0x90
	.type	_ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev,@function
_ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev: # @_ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev
	.cfi_startproc
# %bb.0:
	retq
.Lfunc_end4:
	.size	_ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev, .Lfunc_end4-_ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v,"axG",@progbits,_ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v,comdat
	.weak	_ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v # -- Begin function _ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v
	.type	_ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v,@function
_ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v: # @_ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v
	.cfi_startproc
# %bb.0:
	movb	_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource(%rip), %al
	testb	%al, %al
	je	.LBB5_1
.LBB5_4:
	movl	$_ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource, %eax
	retq
.LBB5_1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB5_3
# %bb.2:
	movl	$_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource, %edi
	callq	__cxa_guard_release
.LBB5_3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
	jmp	.LBB5_4
.Lfunc_end5:
	.size	_ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v, .Lfunc_end5-_ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev,"axG",@progbits,_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev,comdat
	.weak	_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev # -- Begin function _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev,@function
_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev: # @_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev
	.cfi_startproc
# %bb.0:
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end6:
	.size	_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev, .Lfunc_end6-_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm,"axG",@progbits,_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm,comdat
	.weak	_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm # -- Begin function _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm
	.p2align	1, 0x90
	.type	_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm,@function
_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm: # @_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm
	.cfi_startproc
# %bb.0:
	movq	8(%rdi), %rdi
	jmp	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm # TAILCALL
.Lfunc_end7:
	.size	_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm, .Lfunc_end7-_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm,"axG",@progbits,_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm,comdat
	.weak	_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm # -- Begin function _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm
	.p2align	1, 0x90
	.type	_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm,@function
_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm: # @_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm
	.cfi_startproc
# %bb.0:
	movq	8(%rdi), %rdi
	jmp	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm # TAILCALL
.Lfunc_end8:
	.size	_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm, .Lfunc_end8-_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_,"axG",@progbits,_ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_,comdat
	.weak	_ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_ # -- Begin function _ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_
	.p2align	1, 0x90
	.type	_ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_,@function
_ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_: # @_ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_
	.cfi_startproc
# %bb.0:
	cmpq	%rsi, %rdi
	sete	%al
	retq
.Lfunc_end9:
	.size	_ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_, .Lfunc_end9-_ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev,"axG",@progbits,_ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev,comdat
	.weak	_ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev # -- Begin function _ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev
	.p2align	1, 0x90
	.type	_ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev,@function
_ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev: # @_ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev
	.cfi_startproc
# %bb.0:
	retq
.Lfunc_end10:
	.size	_ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev, .Lfunc_end10-_ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev,"axG",@progbits,_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev,comdat
	.weak	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev # -- Begin function _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev,@function
_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev: # @_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev
	.cfi_startproc
# %bb.0:
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end11:
	.size	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev, .Lfunc_end11-_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm,"axG",@progbits,_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm,comdat
	.weak	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm # -- Begin function _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm
	.p2align	1, 0x90
	.type	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm,@function
_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm: # @_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm
.Lfunc_begin2:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception2
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	leaq	8(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB12_1
# %bb.16:
	movq	8(%rsp), %rax
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB12_1:
	.cfi_def_cfa_offset 112
	movl	%eax, %ebp
	callq	hipGetLastError
	movl	$40, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp17:
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp18:
# %bb.2:
	movq	(%rax), %rcx
.Ltmp19:
	leaq	16(%rsp), %rdi
	movq	%rax, %rsi
	movl	%ebp, %edx
	callq	*48(%rcx)
.Ltmp20:
# %bb.3:
	movq	16(%rsp), %rsi
.Ltmp22:
	leaq	48(%rsp), %rdi
	leaq	7(%rsp), %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp23:
# %bb.4:
	movb	$1, %bpl
.Ltmp25:
	leaq	48(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.Ltmp26:
# %bb.5:
	xorl	%ebp, %ebp
.Ltmp27:
	movl	$_ZTIN6thrust6system6detail9bad_allocE, %esi
	movl	$_ZN6thrust6system6detail9bad_allocD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.Ltmp28:
# %bb.17:
.LBB12_7:
.Ltmp29:
	movq	%rax, %r14
	leaq	64(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB12_9
# %bb.8:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB12_9:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	leaq	32(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB12_11
# %bb.10:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit15
	callq	_ZdlPv
.LBB12_11:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit15
	testb	%bpl, %bpl
	jne	.LBB12_14
	jmp	.LBB12_15
.LBB12_12:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.thread
.Ltmp24:
	movq	%rax, %r14
	leaq	32(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB12_14
# %bb.13:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit15.thread26
	callq	_ZdlPv
	jmp	.LBB12_14
.LBB12_6:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit15.thread
.Ltmp21:
	movq	%rax, %r14
.LBB12_14:
	movq	%rbx, %rdi
	callq	__cxa_free_exception
.LBB12_15:
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end12:
	.size	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm, .Lfunc_end12-_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm,"aG",@progbits,_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm,comdat
	.p2align	2, 0x0
GCC_except_table12:
.Lexception2:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end2-.Lcst_begin2
.Lcst_begin2:
	.uleb128 .Lfunc_begin2-.Lfunc_begin2    # >> Call Site 1 <<
	.uleb128 .Ltmp17-.Lfunc_begin2          #   Call between .Lfunc_begin2 and .Ltmp17
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp17-.Lfunc_begin2          # >> Call Site 2 <<
	.uleb128 .Ltmp20-.Ltmp17                #   Call between .Ltmp17 and .Ltmp20
	.uleb128 .Ltmp21-.Lfunc_begin2          #     jumps to .Ltmp21
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp22-.Lfunc_begin2          # >> Call Site 3 <<
	.uleb128 .Ltmp23-.Ltmp22                #   Call between .Ltmp22 and .Ltmp23
	.uleb128 .Ltmp24-.Lfunc_begin2          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin2          # >> Call Site 4 <<
	.uleb128 .Ltmp28-.Ltmp25                #   Call between .Ltmp25 and .Ltmp28
	.uleb128 .Ltmp29-.Lfunc_begin2          #     jumps to .Ltmp29
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp28-.Lfunc_begin2          # >> Call Site 5 <<
	.uleb128 .Lfunc_end12-.Ltmp28           #   Call between .Ltmp28 and .Lfunc_end12
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end2:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm,"axG",@progbits,_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm,comdat
	.weak	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm # -- Begin function _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm
	.p2align	1, 0x90
	.type	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm,@function
_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm: # @_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm
.Lfunc_begin3:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception3
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB13_1
# %bb.5:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB13_1:
	.cfi_def_cfa_offset 32
	movl	%eax, %ebp
	callq	hipGetLastError
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp30:
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp31:
# %bb.2:
.Ltmp32:
	movl	$.L.str.9, %ecx
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movq	%rax, %rdx
	callq	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
.Ltmp33:
# %bb.3:
	movl	$_ZTIN6thrust6system12system_errorE, %esi
	movl	$_ZN6thrust6system12system_errorD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB13_4:
.Ltmp34:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end13:
	.size	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm, .Lfunc_end13-_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm,"aG",@progbits,_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm,comdat
	.p2align	2, 0x0
GCC_except_table13:
.Lexception3:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end3-.Lcst_begin3
.Lcst_begin3:
	.uleb128 .Lfunc_begin3-.Lfunc_begin3    # >> Call Site 1 <<
	.uleb128 .Ltmp30-.Lfunc_begin3          #   Call between .Lfunc_begin3 and .Ltmp30
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp30-.Lfunc_begin3          # >> Call Site 2 <<
	.uleb128 .Ltmp33-.Ltmp30                #   Call between .Ltmp30 and .Ltmp33
	.uleb128 .Ltmp34-.Lfunc_begin3          #     jumps to .Ltmp34
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp33-.Lfunc_begin3          # >> Call Site 3 <<
	.uleb128 .Lfunc_end13-.Ltmp33           #   Call between .Ltmp33 and .Lfunc_end13
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end3:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_,"axG",@progbits,_ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_,comdat
	.weak	_ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_ # -- Begin function _ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_
	.p2align	1, 0x90
	.type	_ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_,@function
_ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_: # @_ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_
	.cfi_startproc
# %bb.0:
	cmpq	%rsi, %rdi
	sete	%al
	retq
.Lfunc_end14:
	.size	_ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_, .Lfunc_end14-_ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system12hip_categoryEv,"axG",@progbits,_ZN6thrust6system12hip_categoryEv,comdat
	.weak	_ZN6thrust6system12hip_categoryEv # -- Begin function _ZN6thrust6system12hip_categoryEv
	.type	_ZN6thrust6system12hip_categoryEv,@function
_ZN6thrust6system12hip_categoryEv:      # @_ZN6thrust6system12hip_categoryEv
	.cfi_startproc
# %bb.0:
	movb	_ZGVZN6thrust6system12hip_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB15_1
.LBB15_4:
	movl	$_ZZN6thrust6system12hip_categoryEvE6result, %eax
	retq
.LBB15_1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$_ZGVZN6thrust6system12hip_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB15_3
# %bb.2:
	movq	$_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE+16, _ZZN6thrust6system12hip_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system12hip_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system12hip_categoryEvE6result, %edi
	callq	__cxa_guard_release
.LBB15_3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
	jmp	.LBB15_4
.Lfunc_end15:
	.size	_ZN6thrust6system12hip_categoryEv, .Lfunc_end15-_ZN6thrust6system12hip_categoryEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	je	.LBB16_1
# %bb.2:
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	%rsi, %rdi
	callq	strlen
	leaq	(%rax,%rbx), %rdx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # TAILCALL
.LBB16_1:
	.cfi_def_cfa_offset 32
	movl	$.L.str.8, %edi
	callq	_ZSt19__throw_logic_errorPKc
.Lfunc_end16:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .Lfunc_end16-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"axG",@progbits,_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
	.weak	_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE # -- Begin function _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.p2align	1, 0x90
	.type	_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,@function
_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE: # @_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.Lfunc_begin4:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception4
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movq	$_ZTVN6thrust6system6detail9bad_allocE+16, (%rdi)
	leaq	8(%rdi), %r14
	leaq	24(%rdi), %rbp
	movq	%rbp, 8(%rdi)
	movq	$0, 16(%rdi)
	movb	$0, 24(%rdi)
	callq	_ZNKSt9bad_alloc4whatEv
	movq	%rax, %r12
	movq	16(%rbx), %r13
	movq	%rax, %rdi
	callq	strlen
.Ltmp35:
	movq	%r14, %rdi
	xorl	%esi, %esi
	movq	%r13, %rdx
	movq	%r12, %rcx
	movq	%rax, %r8
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm
.Ltmp36:
# %bb.1:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit
.Ltmp37:
	movl	$.L.str.6, %esi
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc
.Ltmp38:
# %bb.2:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc.exit
	movq	(%r15), %rsi
	movq	8(%r15), %rdx
.Ltmp39:
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm
.Ltmp40:
# %bb.3:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLERKS4_.exit
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB17_4:
	.cfi_def_cfa_offset 64
.Ltmp41:
	movq	%rax, %r15
	movq	(%r14), %rdi
	cmpq	%rbp, %rdi
	je	.LBB17_6
# %bb.5:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB17_6:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	%rbx, %rdi
	callq	_ZNSt9bad_allocD2Ev
	movq	%r15, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end17:
	.size	_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .Lfunc_end17-_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"aG",@progbits,_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
	.p2align	2, 0x0
GCC_except_table17:
.Lexception4:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end4-.Lcst_begin4
.Lcst_begin4:
	.uleb128 .Ltmp35-.Lfunc_begin4          # >> Call Site 1 <<
	.uleb128 .Ltmp40-.Ltmp35                #   Call between .Ltmp35 and .Ltmp40
	.uleb128 .Ltmp41-.Lfunc_begin4          #     jumps to .Ltmp41
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp40-.Lfunc_begin4          # >> Call Site 2 <<
	.uleb128 .Lfunc_end17-.Ltmp40           #   Call between .Ltmp40 and .Lfunc_end17
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end4:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system6detail9bad_allocD2Ev,"axG",@progbits,_ZN6thrust6system6detail9bad_allocD2Ev,comdat
	.weak	_ZN6thrust6system6detail9bad_allocD2Ev # -- Begin function _ZN6thrust6system6detail9bad_allocD2Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system6detail9bad_allocD2Ev,@function
_ZN6thrust6system6detail9bad_allocD2Ev: # @_ZN6thrust6system6detail9bad_allocD2Ev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	$_ZTVN6thrust6system6detail9bad_allocE+16, (%rdi)
	movq	8(%rdi), %rdi
	leaq	24(%rbx), %rax
	cmpq	%rax, %rdi
	je	.LBB18_2
# %bb.1:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB18_2:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt9bad_allocD2Ev             # TAILCALL
.Lfunc_end18:
	.size	_ZN6thrust6system6detail9bad_allocD2Ev, .Lfunc_end18-_ZN6thrust6system6detail9bad_allocD2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system14error_categoryD2Ev,"axG",@progbits,_ZN6thrust6system14error_categoryD2Ev,comdat
	.weak	_ZN6thrust6system14error_categoryD2Ev # -- Begin function _ZN6thrust6system14error_categoryD2Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system14error_categoryD2Ev,@function
_ZN6thrust6system14error_categoryD2Ev:  # @_ZN6thrust6system14error_categoryD2Ev
	.cfi_startproc
# %bb.0:
	movq	$_ZTVN6thrust6system14error_categoryE+16, (%rdi)
	retq
.Lfunc_end19:
	.size	_ZN6thrust6system14error_categoryD2Ev, .Lfunc_end19-_ZN6thrust6system14error_categoryD2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev,comdat
	.weak	_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev # -- Begin function _ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev,@function
_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev: # @_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev
	.cfi_startproc
# %bb.0:
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end20:
	.size	_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev, .Lfunc_end20-_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv,"axG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv,comdat
	.weak	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv # -- Begin function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv
	.p2align	1, 0x90
	.type	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv,@function
_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv: # @_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv
	.cfi_startproc
# %bb.0:
	movl	$.L.str, %eax
	retq
.Lfunc_end21:
	.size	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv, .Lfunc_end21-_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi,comdat
	.weak	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi # -- Begin function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi
	.p2align	1, 0x90
	.type	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi,@function
_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi: # @_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%esi, %ebx
	cmpl	$50, %esi
	jg	.LBB22_5
# %bb.1:
	movb	_ZGVZN6thrust6system12hip_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB22_2
.LBB22_4:                               # %_ZN6thrust6system20make_error_conditionENS0_11hip_rocprim4errc6errc_tE.exit
	movl	$_ZZN6thrust6system12hip_categoryEvE6result, %edx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB22_5:
	.cfi_def_cfa_offset 16
	movb	_ZGVZN6thrust6system15system_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB22_6
.LBB22_8:                               # %_ZN6thrust6system15system_categoryEv.exit
	movq	_ZZN6thrust6system15system_categoryEvE6result(%rip), %rax
	movq	24(%rax), %rax
	movl	$_ZZN6thrust6system15system_categoryEvE6result, %edi
	movl	%ebx, %esi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmpq	*%rax                           # TAILCALL
.LBB22_2:
	.cfi_def_cfa_offset 16
	movl	$_ZGVZN6thrust6system12hip_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB22_4
# %bb.3:
	movq	$_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE+16, _ZZN6thrust6system12hip_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system12hip_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system12hip_categoryEvE6result, %edi
	callq	__cxa_guard_release
	jmp	.LBB22_4
.LBB22_6:
	movl	$_ZGVZN6thrust6system15system_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB22_8
# %bb.7:
	movq	$_ZTVN6thrust6system6detail21system_error_categoryE+16, _ZZN6thrust6system15system_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system15system_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system15system_categoryEvE6result, %edi
	callq	__cxa_guard_release
	jmp	.LBB22_8
.Lfunc_end22:
	.size	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi, .Lfunc_end22-_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE,"axG",@progbits,_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE,comdat
	.weak	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE # -- Begin function _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.p2align	1, 0x90
	.type	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE,@function
_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE: # @_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdx, %rbx
	movq	(%rdi), %rax
	callq	*24(%rax)
	cmpq	8(%rbx), %rdx
	sete	%cl
	cmpl	(%rbx), %eax
	sete	%al
	andb	%cl, %al
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end23:
	.size	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE, .Lfunc_end23-_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi,"axG",@progbits,_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi,comdat
	.weak	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi # -- Begin function _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.p2align	1, 0x90
	.type	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi,@function
_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi: # @_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.cfi_startproc
# %bb.0:
	cmpq	%rdi, 8(%rsi)
	sete	%cl
	cmpl	%edx, (%rsi)
	sete	%al
	andb	%cl, %al
	retq
.Lfunc_end24:
	.size	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi, .Lfunc_end24-_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,comdat
	.weak	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei # -- Begin function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei
	.p2align	1, 0x90
	.type	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,@function
_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei: # @_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei
.Lfunc_begin5:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception5
# %bb.0:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movq	%rdi, %rbx
	movl	%edx, %edi
	callq	hipGetErrorString
	movq	%rax, %r15
	movl	%ebp, %edi
	callq	hipGetErrorName
	testq	%rax, %rax
	movl	$.L.str.5, %r14d
	cmovneq	%rax, %r14
	leaq	24(%rsp), %rax
	movq	%rax, -16(%rax)
	movq	%r14, %rdi
	callq	strlen
	leaq	(%rax,%r14), %rdx
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
.Ltmp42:
	movl	$.L.str.6, %esi
	movq	%r12, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc
.Ltmp43:
# %bb.1:                                # %.noexc
	movq	%rax, %r12
	leaq	56(%rsp), %r14
	movq	%r14, -16(%r14)
	movq	(%rax), %rsi
	movq	%rax, %rbp
	addq	$16, %rbp
	cmpq	%rbp, %rsi
	je	.LBB25_2
# %bb.3:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	movq	%rsi, 40(%rsp)
	movq	16(%r12), %rax
	movq	%rax, 56(%rsp)
	movq	8(%r12), %r13
	jmp	.LBB25_4
.LBB25_2:
	movq	8(%r12), %r13
	leaq	1(%r13), %rdx
	movq	%r14, %rdi
	callq	memcpy@PLT
.LBB25_4:
	leaq	40(%rsp), %rdi
	movq	%r13, 8(%rdi)
	movq	%rbp, (%r12)
	movq	$0, 8(%r12)
	movb	$0, 16(%r12)
	testq	%r15, %r15
	movl	$.L.str.4, %esi
	cmovneq	%r15, %rsi
.Ltmp45:
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc
.Ltmp46:
# %bb.5:                                # %.noexc16
	movq	%rax, %r15
	leaq	16(%rbx), %rdi
	movq	%rdi, (%rbx)
	movq	(%rax), %rsi
	movq	%rax, %r12
	addq	$16, %r12
	cmpq	%r12, %rsi
	je	.LBB25_6
# %bb.7:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i13
	movq	%rsi, (%rbx)
	movq	16(%r15), %rax
	movq	%rax, 16(%rbx)
	movq	8(%r15), %r13
	jmp	.LBB25_8
.LBB25_6:
	movq	8(%r15), %r13
	leaq	1(%r13), %rdx
	callq	memcpy@PLT
.LBB25_8:
	movq	%r13, 8(%rbx)
	movq	%r12, (%r15)
	movq	$0, 8(%r15)
	movb	$0, 16(%r15)
	movq	40(%rsp), %rdi
	cmpq	%r14, %rdi
	je	.LBB25_10
# %bb.9:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i18
	callq	_ZdlPv
.LBB25_10:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	8(%rsp), %rdi
	leaq	24(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB25_12
# %bb.11:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i19
	callq	_ZdlPv
.LBB25_12:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit21
	movq	%rbx, %rax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB25_14:
	.cfi_def_cfa_offset 128
.Ltmp47:
	movq	%rax, %rbx
	movq	40(%rsp), %rdi
	cmpq	%r14, %rdi
	je	.LBB25_16
# %bb.15:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i22
	callq	_ZdlPv
	jmp	.LBB25_16
.LBB25_13:
.Ltmp44:
	movq	%rax, %rbx
.LBB25_16:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit24
	movq	8(%rsp), %rdi
	leaq	24(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB25_18
# %bb.17:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i25
	callq	_ZdlPv
.LBB25_18:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit27
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end25:
	.size	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei, .Lfunc_end25-_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei
	.cfi_endproc
	.section	.gcc_except_table._ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,comdat
	.p2align	2, 0x0
GCC_except_table25:
.Lexception5:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end5-.Lcst_begin5
.Lcst_begin5:
	.uleb128 .Lfunc_begin5-.Lfunc_begin5    # >> Call Site 1 <<
	.uleb128 .Ltmp42-.Lfunc_begin5          #   Call between .Lfunc_begin5 and .Ltmp42
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp42-.Lfunc_begin5          # >> Call Site 2 <<
	.uleb128 .Ltmp43-.Ltmp42                #   Call between .Ltmp42 and .Ltmp43
	.uleb128 .Ltmp44-.Lfunc_begin5          #     jumps to .Ltmp44
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp43-.Lfunc_begin5          # >> Call Site 3 <<
	.uleb128 .Ltmp45-.Ltmp43                #   Call between .Ltmp43 and .Ltmp45
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp45-.Lfunc_begin5          # >> Call Site 4 <<
	.uleb128 .Ltmp46-.Ltmp45                #   Call between .Ltmp45 and .Ltmp46
	.uleb128 .Ltmp47-.Lfunc_begin5          #     jumps to .Ltmp47
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp46-.Lfunc_begin5          # >> Call Site 5 <<
	.uleb128 .Lfunc_end25-.Ltmp46           #   Call between .Ltmp46 and .Lfunc_end25
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end5:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system14error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system14error_categoryD0Ev,comdat
	.weak	_ZN6thrust6system14error_categoryD0Ev # -- Begin function _ZN6thrust6system14error_categoryD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system14error_categoryD0Ev,@function
_ZN6thrust6system14error_categoryD0Ev:  # @_ZN6thrust6system14error_categoryD0Ev
	.cfi_startproc
# %bb.0:
	ud2
.Lfunc_end26:
	.size	_ZN6thrust6system14error_categoryD0Ev, .Lfunc_end26-_ZN6thrust6system14error_categoryD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system14error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust6system14error_category23default_error_conditionEi,comdat
	.weak	_ZNK6thrust6system14error_category23default_error_conditionEi # -- Begin function _ZNK6thrust6system14error_category23default_error_conditionEi
	.p2align	1, 0x90
	.type	_ZNK6thrust6system14error_category23default_error_conditionEi,@function
_ZNK6thrust6system14error_category23default_error_conditionEi: # @_ZNK6thrust6system14error_category23default_error_conditionEi
	.cfi_startproc
# %bb.0:
	movl	%esi, %eax
	movq	%rdi, %rdx
	retq
.Lfunc_end27:
	.size	_ZNK6thrust6system14error_category23default_error_conditionEi, .Lfunc_end27-_ZNK6thrust6system14error_category23default_error_conditionEi
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system15system_categoryEv,"axG",@progbits,_ZN6thrust6system15system_categoryEv,comdat
	.weak	_ZN6thrust6system15system_categoryEv # -- Begin function _ZN6thrust6system15system_categoryEv
	.type	_ZN6thrust6system15system_categoryEv,@function
_ZN6thrust6system15system_categoryEv:   # @_ZN6thrust6system15system_categoryEv
	.cfi_startproc
# %bb.0:
	movb	_ZGVZN6thrust6system15system_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB28_1
.LBB28_4:
	movl	$_ZZN6thrust6system15system_categoryEvE6result, %eax
	retq
.LBB28_1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$_ZGVZN6thrust6system15system_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB28_3
# %bb.2:
	movq	$_ZTVN6thrust6system6detail21system_error_categoryE+16, _ZZN6thrust6system15system_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system15system_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system15system_categoryEvE6result, %edi
	callq	__cxa_guard_release
.LBB28_3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
	jmp	.LBB28_4
.Lfunc_end28:
	.size	_ZN6thrust6system15system_categoryEv, .Lfunc_end28-_ZN6thrust6system15system_categoryEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system6detail21system_error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system6detail21system_error_categoryD0Ev,comdat
	.weak	_ZN6thrust6system6detail21system_error_categoryD0Ev # -- Begin function _ZN6thrust6system6detail21system_error_categoryD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system6detail21system_error_categoryD0Ev,@function
_ZN6thrust6system6detail21system_error_categoryD0Ev: # @_ZN6thrust6system6detail21system_error_categoryD0Ev
	.cfi_startproc
# %bb.0:
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end29:
	.size	_ZN6thrust6system6detail21system_error_categoryD0Ev, .Lfunc_end29-_ZN6thrust6system6detail21system_error_categoryD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail21system_error_category4nameEv,"axG",@progbits,_ZNK6thrust6system6detail21system_error_category4nameEv,comdat
	.weak	_ZNK6thrust6system6detail21system_error_category4nameEv # -- Begin function _ZNK6thrust6system6detail21system_error_category4nameEv
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail21system_error_category4nameEv,@function
_ZNK6thrust6system6detail21system_error_category4nameEv: # @_ZNK6thrust6system6detail21system_error_category4nameEv
	.cfi_startproc
# %bb.0:
	movl	$.L.str.1, %eax
	retq
.Lfunc_end30:
	.size	_ZNK6thrust6system6detail21system_error_category4nameEv, .Lfunc_end30-_ZNK6thrust6system6detail21system_error_category4nameEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,comdat
	.weak	_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi # -- Begin function _ZNK6thrust6system6detail21system_error_category23default_error_conditionEi
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,@function
_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi: # @_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%esi, %ebx
	leal	-9901(%rbx), %eax
	cmpl	$78, %eax
	ja	.LBB31_81
# %bb.1:
	jmpq	*.LJTI31_0(,%rax,8)
.LBB31_2:
	movl	$9901, %edi                     # imm = 0x26AD
	jmp	.LBB31_3
.LBB31_77:
	movl	$9979, %edi                     # imm = 0x26FB
	jmp	.LBB31_3
.LBB31_33:
	movl	$9961, %edi                     # imm = 0x26E9
	jmp	.LBB31_3
.LBB31_50:
	movl	$9968, %edi                     # imm = 0x26F0
	jmp	.LBB31_3
.LBB31_67:
	movl	$9974, %edi                     # imm = 0x26F6
	jmp	.LBB31_3
.LBB31_75:
	movl	$9977, %edi                     # imm = 0x26F9
	jmp	.LBB31_3
.LBB31_28:
	movl	$9945, %edi                     # imm = 0x26D9
	jmp	.LBB31_3
.LBB31_19:
	movl	$9952, %edi                     # imm = 0x26E0
	jmp	.LBB31_3
.LBB31_29:
	movl	$9958, %edi                     # imm = 0x26E6
	jmp	.LBB31_3
.LBB31_22:
	movl	$9955, %edi                     # imm = 0x26E3
	jmp	.LBB31_3
.LBB31_17:
	movl	$9951, %edi                     # imm = 0x26DF
	jmp	.LBB31_3
.LBB31_66:
	movl	$9933, %edi                     # imm = 0x26CD
	jmp	.LBB31_3
.LBB31_80:
	movl	$9941, %edi                     # imm = 0x26D5
	jmp	.LBB31_3
.LBB31_59:
	movl	$9928, %edi                     # imm = 0x26C8
	jmp	.LBB31_3
.LBB31_79:
	movl	$9940, %edi                     # imm = 0x26D4
	jmp	.LBB31_3
.LBB31_74:
	movl	$9938, %edi                     # imm = 0x26D2
	jmp	.LBB31_3
.LBB31_58:
	movl	$9927, %edi                     # imm = 0x26C7
	jmp	.LBB31_3
.LBB31_45:
	movl	$9921, %edi                     # imm = 0x26C1
	jmp	.LBB31_3
.LBB31_68:
	movl	$9975, %edi                     # imm = 0x26F7
	jmp	.LBB31_3
.LBB31_7:
	movl	$9946, %edi                     # imm = 0x26DA
	jmp	.LBB31_3
.LBB31_39:
	movl	$9917, %edi                     # imm = 0x26BD
	jmp	.LBB31_3
.LBB31_48:
	movl	$9966, %edi                     # imm = 0x26EE
	jmp	.LBB31_3
.LBB31_71:
	movl	$9934, %edi                     # imm = 0x26CE
	jmp	.LBB31_3
.LBB31_13:
	movl	$9906, %edi                     # imm = 0x26B2
	jmp	.LBB31_3
.LBB31_43:
	movl	$9919, %edi                     # imm = 0x26BF
	jmp	.LBB31_3
.LBB31_47:
	movl	$9922, %edi                     # imm = 0x26C2
	jmp	.LBB31_3
.LBB31_25:
	movl	$9942, %edi                     # imm = 0x26D6
	jmp	.LBB31_3
.LBB31_57:
	movl	$9926, %edi                     # imm = 0x26C6
	jmp	.LBB31_3
.LBB31_61:
	movl	$9929, %edi                     # imm = 0x26C9
	jmp	.LBB31_3
.LBB31_4:
	movl	$9902, %edi                     # imm = 0x26AE
	jmp	.LBB31_3
.LBB31_54:
	movl	$9924, %edi                     # imm = 0x26C4
	jmp	.LBB31_3
.LBB31_18:
	movl	$9910, %edi                     # imm = 0x26B6
	jmp	.LBB31_3
.LBB31_56:
	movl	$9971, %edi                     # imm = 0x26F3
	jmp	.LBB31_3
.LBB31_5:
	movl	$9903, %edi                     # imm = 0x26AF
	jmp	.LBB31_3
.LBB31_11:
	movl	$9905, %edi                     # imm = 0x26B1
	jmp	.LBB31_3
.LBB31_36:
	movl	$9914, %edi                     # imm = 0x26BA
	jmp	.LBB31_3
.LBB31_62:
	movl	$9930, %edi                     # imm = 0x26CA
	jmp	.LBB31_3
.LBB31_65:
	movl	$9932, %edi                     # imm = 0x26CC
	jmp	.LBB31_3
.LBB31_15:
	movl	$9908, %edi                     # imm = 0x26B4
	jmp	.LBB31_3
.LBB31_6:
	movl	$9904, %edi                     # imm = 0x26B0
	jmp	.LBB31_3
.LBB31_26:
	movl	$9911, %edi                     # imm = 0x26B7
	jmp	.LBB31_3
.LBB31_31:
	movl	$9943, %edi                     # imm = 0x26D7
	jmp	.LBB31_3
.LBB31_53:
	movl	$9923, %edi                     # imm = 0x26C3
	jmp	.LBB31_3
.LBB31_16:
	movl	$9909, %edi                     # imm = 0x26B5
	jmp	.LBB31_3
.LBB31_8:
	movl	$9947, %edi                     # imm = 0x26DB
	jmp	.LBB31_3
.LBB31_12:
	movl	$9950, %edi                     # imm = 0x26DE
	jmp	.LBB31_3
.LBB31_14:
	movl	$9907, %edi                     # imm = 0x26B3
	jmp	.LBB31_3
.LBB31_44:
	movl	$9920, %edi                     # imm = 0x26C0
	jmp	.LBB31_3
.LBB31_69:
	movl	$9976, %edi                     # imm = 0x26F8
	jmp	.LBB31_3
.LBB31_9:
	movl	$9948, %edi                     # imm = 0x26DC
	jmp	.LBB31_3
.LBB31_78:
	movl	$9939, %edi                     # imm = 0x26D3
	jmp	.LBB31_3
.LBB31_35:
	movl	$9913, %edi                     # imm = 0x26B9
	jmp	.LBB31_3
.LBB31_23:
	movl	$9956, %edi                     # imm = 0x26E4
	jmp	.LBB31_3
.LBB31_55:
	movl	$9925, %edi                     # imm = 0x26C5
	jmp	.LBB31_3
.LBB31_63:
	movl	$9931, %edi                     # imm = 0x26CB
	jmp	.LBB31_3
.LBB31_27:
	movl	$9912, %edi                     # imm = 0x26B8
	jmp	.LBB31_3
.LBB31_72:
	movl	$9935, %edi                     # imm = 0x26CF
	jmp	.LBB31_3
.LBB31_37:
	movl	$9915, %edi                     # imm = 0x26BB
	jmp	.LBB31_3
.LBB31_38:
	movl	$9916, %edi                     # imm = 0x26BC
	jmp	.LBB31_3
.LBB31_24:
	movl	$9957, %edi                     # imm = 0x26E5
	jmp	.LBB31_3
.LBB31_70:
	movl	$9944, %edi                     # imm = 0x26D8
	jmp	.LBB31_3
.LBB31_41:
	movl	$9918, %edi                     # imm = 0x26BE
	jmp	.LBB31_3
.LBB31_42:
	movl	$9964, %edi                     # imm = 0x26EC
	jmp	.LBB31_3
.LBB31_46:
	movl	$9965, %edi                     # imm = 0x26ED
	jmp	.LBB31_3
.LBB31_32:
	movl	$9960, %edi                     # imm = 0x26E8
	jmp	.LBB31_3
.LBB31_64:
	movl	$9973, %edi                     # imm = 0x26F5
	jmp	.LBB31_3
.LBB31_30:
	movl	$9959, %edi                     # imm = 0x26E7
	jmp	.LBB31_3
.LBB31_49:
	movl	$9967, %edi                     # imm = 0x26EF
	jmp	.LBB31_3
.LBB31_21:
	movl	$9954, %edi                     # imm = 0x26E2
	jmp	.LBB31_3
.LBB31_73:
	movl	$9936, %edi                     # imm = 0x26D0
	jmp	.LBB31_3
.LBB31_51:
	movl	$9969, %edi                     # imm = 0x26F1
	jmp	.LBB31_3
.LBB31_10:
	movl	$9949, %edi                     # imm = 0x26DD
	jmp	.LBB31_3
.LBB31_34:
	movl	$9962, %edi                     # imm = 0x26EA
	jmp	.LBB31_3
.LBB31_52:
	movl	$9970, %edi                     # imm = 0x26F2
	jmp	.LBB31_3
.LBB31_20:
	movl	$9953, %edi                     # imm = 0x26E1
	jmp	.LBB31_3
.LBB31_40:
	movl	$9963, %edi                     # imm = 0x26EB
	jmp	.LBB31_3
.LBB31_60:
	movl	$9972, %edi                     # imm = 0x26F4
	jmp	.LBB31_3
.LBB31_76:
	movl	$9978, %edi                     # imm = 0x26FA
.LBB31_3:
	callq	_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE
	movl	%eax, %ebx
.LBB31_82:
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB31_81:
	.cfi_def_cfa_offset 16
	callq	_ZN6thrust6system15system_categoryEv
	movq	%rax, %rdx
	jmp	.LBB31_82
.Lfunc_end31:
	.size	_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi, .Lfunc_end31-_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi
	.cfi_endproc
	.section	.rodata._ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,"aG",@progbits,_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,comdat
	.p2align	3, 0x0
.LJTI31_0:
	.quad	.LBB31_2
	.quad	.LBB31_4
	.quad	.LBB31_5
	.quad	.LBB31_6
	.quad	.LBB31_11
	.quad	.LBB31_13
	.quad	.LBB31_14
	.quad	.LBB31_15
	.quad	.LBB31_16
	.quad	.LBB31_18
	.quad	.LBB31_26
	.quad	.LBB31_27
	.quad	.LBB31_35
	.quad	.LBB31_36
	.quad	.LBB31_37
	.quad	.LBB31_38
	.quad	.LBB31_39
	.quad	.LBB31_41
	.quad	.LBB31_43
	.quad	.LBB31_44
	.quad	.LBB31_45
	.quad	.LBB31_47
	.quad	.LBB31_53
	.quad	.LBB31_54
	.quad	.LBB31_55
	.quad	.LBB31_57
	.quad	.LBB31_58
	.quad	.LBB31_59
	.quad	.LBB31_61
	.quad	.LBB31_62
	.quad	.LBB31_63
	.quad	.LBB31_65
	.quad	.LBB31_66
	.quad	.LBB31_71
	.quad	.LBB31_72
	.quad	.LBB31_73
	.quad	.LBB31_81
	.quad	.LBB31_74
	.quad	.LBB31_78
	.quad	.LBB31_79
	.quad	.LBB31_80
	.quad	.LBB31_25
	.quad	.LBB31_31
	.quad	.LBB31_70
	.quad	.LBB31_28
	.quad	.LBB31_7
	.quad	.LBB31_8
	.quad	.LBB31_9
	.quad	.LBB31_10
	.quad	.LBB31_12
	.quad	.LBB31_17
	.quad	.LBB31_19
	.quad	.LBB31_20
	.quad	.LBB31_21
	.quad	.LBB31_22
	.quad	.LBB31_23
	.quad	.LBB31_24
	.quad	.LBB31_29
	.quad	.LBB31_30
	.quad	.LBB31_32
	.quad	.LBB31_33
	.quad	.LBB31_34
	.quad	.LBB31_40
	.quad	.LBB31_42
	.quad	.LBB31_46
	.quad	.LBB31_48
	.quad	.LBB31_49
	.quad	.LBB31_50
	.quad	.LBB31_51
	.quad	.LBB31_52
	.quad	.LBB31_56
	.quad	.LBB31_60
	.quad	.LBB31_64
	.quad	.LBB31_67
	.quad	.LBB31_68
	.quad	.LBB31_69
	.quad	.LBB31_75
	.quad	.LBB31_76
	.quad	.LBB31_77
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei,comdat
	.weak	_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei # -- Begin function _ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei,@function
_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei: # @_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movq	%rdi, %rbx
	movb	_ZGVZN6thrust6system16generic_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB32_1
.LBB32_3:                               # %_ZN6thrust6system16generic_categoryEv.exit
	movq	_ZZN6thrust6system16generic_categoryEvE6result(%rip), %rax
	movl	$_ZZN6thrust6system16generic_categoryEvE6result, %esi
	movq	%rbx, %rdi
	movl	%ebp, %edx
	callq	*48(%rax)
	movq	%rbx, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB32_1:
	.cfi_def_cfa_offset 32
	movl	$_ZGVZN6thrust6system16generic_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB32_3
# %bb.2:
	movq	$_ZTVN6thrust6system6detail22generic_error_categoryE+16, _ZZN6thrust6system16generic_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system16generic_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system16generic_categoryEvE6result, %edi
	callq	__cxa_guard_release
	jmp	.LBB32_3
.Lfunc_end32:
	.size	_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei, .Lfunc_end32-_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE,"axG",@progbits,_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE,comdat
	.weak	_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE # -- Begin function _ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE
	.type	_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE,@function
_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE: # @_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%edi, %ebx
	movb	_ZGVZN6thrust6system16generic_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB33_1
.LBB33_3:                               # %_ZN6thrust6system16generic_categoryEv.exit
	movl	$_ZZN6thrust6system16generic_categoryEvE6result, %edx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB33_1:
	.cfi_def_cfa_offset 16
	movl	$_ZGVZN6thrust6system16generic_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB33_3
# %bb.2:
	movq	$_ZTVN6thrust6system6detail22generic_error_categoryE+16, _ZZN6thrust6system16generic_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system16generic_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system16generic_categoryEvE6result, %edi
	callq	__cxa_guard_release
	jmp	.LBB33_3
.Lfunc_end33:
	.size	_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE, .Lfunc_end33-_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system6detail22generic_error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system6detail22generic_error_categoryD0Ev,comdat
	.weak	_ZN6thrust6system6detail22generic_error_categoryD0Ev # -- Begin function _ZN6thrust6system6detail22generic_error_categoryD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system6detail22generic_error_categoryD0Ev,@function
_ZN6thrust6system6detail22generic_error_categoryD0Ev: # @_ZN6thrust6system6detail22generic_error_categoryD0Ev
	.cfi_startproc
# %bb.0:
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end34:
	.size	_ZN6thrust6system6detail22generic_error_categoryD0Ev, .Lfunc_end34-_ZN6thrust6system6detail22generic_error_categoryD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail22generic_error_category4nameEv,"axG",@progbits,_ZNK6thrust6system6detail22generic_error_category4nameEv,comdat
	.weak	_ZNK6thrust6system6detail22generic_error_category4nameEv # -- Begin function _ZNK6thrust6system6detail22generic_error_category4nameEv
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail22generic_error_category4nameEv,@function
_ZNK6thrust6system6detail22generic_error_category4nameEv: # @_ZNK6thrust6system6detail22generic_error_category4nameEv
	.cfi_startproc
# %bb.0:
	movl	$.L.str.2, %eax
	retq
.Lfunc_end35:
	.size	_ZNK6thrust6system6detail22generic_error_category4nameEv, .Lfunc_end35-_ZNK6thrust6system6detail22generic_error_category4nameEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,comdat
	.weak	_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei # -- Begin function _ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,@function
_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei: # @_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei
.Lfunc_begin6:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception6
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movq	%rdi, %rbx
	movb	_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11(%rip), %al
	testb	%al, %al
	je	.LBB36_1
.LBB36_4:
	movl	%ebp, %edi
	callq	strerror
	movq	%rax, %r14
	leaq	16(%rbx), %rax
	movq	%rax, (%rbx)
	testq	%r14, %r14
	je	.LBB36_6
# %bb.5:
	movq	%r14, %rdi
	callq	strlen
	movq	%r14, %rdx
	addq	%rax, %rdx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	jmp	.LBB36_7
.LBB36_6:
	movq	_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11(%rip), %rsi
	movq	_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11+8(%rip), %rdx
	addq	%rsi, %rdx
	movq	%rbx, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
.LBB36_7:
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB36_1:
	.cfi_def_cfa_offset 32
	movl	$_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB36_4
# %bb.2:
	movq	$_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11+16, _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11(%rip)
.Ltmp48:
	movl	$_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi
	movl	$.L.str.3, %esi
	movl	$.L.str.3+13, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
.Ltmp49:
# %bb.3:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	movl	$_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev, %edi
	movl	$_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi
	callq	__cxa_guard_release
	jmp	.LBB36_4
.LBB36_8:                               # %.critedge17
.Ltmp50:
	movq	%rax, %rbx
	movl	$_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi
	callq	__cxa_guard_abort
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end36:
	.size	_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei, .Lfunc_end36-_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei
	.cfi_endproc
	.section	.gcc_except_table._ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,comdat
	.p2align	2, 0x0
GCC_except_table36:
.Lexception6:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end6-.Lcst_begin6
.Lcst_begin6:
	.uleb128 .Lfunc_begin6-.Lfunc_begin6    # >> Call Site 1 <<
	.uleb128 .Ltmp48-.Lfunc_begin6          #   Call between .Lfunc_begin6 and .Ltmp48
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp48-.Lfunc_begin6          # >> Call Site 2 <<
	.uleb128 .Ltmp49-.Ltmp48                #   Call between .Ltmp48 and .Ltmp49
	.uleb128 .Ltmp50-.Lfunc_begin6          #     jumps to .Ltmp50
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp49-.Lfunc_begin6          # >> Call Site 3 <<
	.uleb128 .Lfunc_end36-.Ltmp49           #   Call between .Ltmp49 and .Lfunc_end36
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end6:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB37_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB37_3
.LBB37_1:                               # %._crit_edge
	movq	(%rbx), %rax
.LBB37_3:
	testq	%r14, %r14
	je	.LBB37_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB37_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB37_7
.LBB37_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB37_7:                               # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end37:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag, .Lfunc_end37-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end38:
	.size	__clang_call_terminate, .Lfunc_end38-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB39_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB39_3
.LBB39_1:                               # %._crit_edge
	movq	(%rbx), %rax
.LBB39_3:
	testq	%r14, %r14
	je	.LBB39_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB39_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB39_7
.LBB39_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB39_7:                               # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end39:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end39-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system6detail9bad_allocD0Ev,"axG",@progbits,_ZN6thrust6system6detail9bad_allocD0Ev,comdat
	.weak	_ZN6thrust6system6detail9bad_allocD0Ev # -- Begin function _ZN6thrust6system6detail9bad_allocD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system6detail9bad_allocD0Ev,@function
_ZN6thrust6system6detail9bad_allocD0Ev: # @_ZN6thrust6system6detail9bad_allocD0Ev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	$_ZTVN6thrust6system6detail9bad_allocE+16, (%rdi)
	movq	8(%rdi), %rdi
	leaq	24(%rbx), %rax
	cmpq	%rax, %rdi
	je	.LBB40_2
# %bb.1:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i
	callq	_ZdlPv
.LBB40_2:                               # %_ZN6thrust6system6detail9bad_allocD2Ev.exit
	movq	%rbx, %rdi
	callq	_ZNSt9bad_allocD2Ev
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end40:
	.size	_ZN6thrust6system6detail9bad_allocD0Ev, .Lfunc_end40-_ZN6thrust6system6detail9bad_allocD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail9bad_alloc4whatEv,"axG",@progbits,_ZNK6thrust6system6detail9bad_alloc4whatEv,comdat
	.weak	_ZNK6thrust6system6detail9bad_alloc4whatEv # -- Begin function _ZNK6thrust6system6detail9bad_alloc4whatEv
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail9bad_alloc4whatEv,@function
_ZNK6thrust6system6detail9bad_alloc4whatEv: # @_ZNK6thrust6system6detail9bad_alloc4whatEv
	.cfi_startproc
# %bb.0:
	movq	8(%rdi), %rax
	retq
.Lfunc_end41:
	.size	_ZNK6thrust6system6detail9bad_alloc4whatEv, .Lfunc_end41-_ZNK6thrust6system6detail9bad_alloc4whatEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc,"axG",@progbits,_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc,comdat
	.weak	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc # -- Begin function _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
	.p2align	1, 0x90
	.type	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc,@function
_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc: # @_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movl	%esi, %ebp
	movq	%rdi, %r14
	movq	%rcx, %rsi
	callq	_ZNSt13runtime_errorC2EPKc
	movq	$_ZTVN6thrust6system12system_errorE+16, (%r14)
	movl	%ebp, 16(%r14)
	movq	%rbx, 24(%r14)
	leaq	48(%r14), %rax
	movq	%rax, 32(%r14)
	movq	$0, 40(%r14)
	movb	$0, 48(%r14)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end42:
	.size	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc, .Lfunc_end42-_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system12system_errorD2Ev,"axG",@progbits,_ZN6thrust6system12system_errorD2Ev,comdat
	.weak	_ZN6thrust6system12system_errorD2Ev # -- Begin function _ZN6thrust6system12system_errorD2Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system12system_errorD2Ev,@function
_ZN6thrust6system12system_errorD2Ev:    # @_ZN6thrust6system12system_errorD2Ev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	$_ZTVN6thrust6system12system_errorE+16, (%rdi)
	movq	32(%rdi), %rdi
	leaq	48(%rbx), %rax
	cmpq	%rax, %rdi
	je	.LBB43_2
# %bb.1:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB43_2:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt13runtime_errorD2Ev        # TAILCALL
.Lfunc_end43:
	.size	_ZN6thrust6system12system_errorD2Ev, .Lfunc_end43-_ZN6thrust6system12system_errorD2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system12system_errorD0Ev,"axG",@progbits,_ZN6thrust6system12system_errorD0Ev,comdat
	.weak	_ZN6thrust6system12system_errorD0Ev # -- Begin function _ZN6thrust6system12system_errorD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system12system_errorD0Ev,@function
_ZN6thrust6system12system_errorD0Ev:    # @_ZN6thrust6system12system_errorD0Ev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	$_ZTVN6thrust6system12system_errorE+16, (%rdi)
	movq	32(%rdi), %rdi
	leaq	48(%rbx), %rax
	cmpq	%rax, %rdi
	je	.LBB44_2
# %bb.1:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i
	callq	_ZdlPv
.LBB44_2:                               # %_ZN6thrust6system12system_errorD2Ev.exit
	movq	%rbx, %rdi
	callq	_ZNSt13runtime_errorD2Ev
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end44:
	.size	_ZN6thrust6system12system_errorD0Ev, .Lfunc_end44-_ZN6thrust6system12system_errorD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system12system_error4whatEv,"axG",@progbits,_ZNK6thrust6system12system_error4whatEv,comdat
	.weak	_ZNK6thrust6system12system_error4whatEv # -- Begin function _ZNK6thrust6system12system_error4whatEv
	.p2align	1, 0x90
	.type	_ZNK6thrust6system12system_error4whatEv,@function
_ZNK6thrust6system12system_error4whatEv: # @_ZNK6thrust6system12system_error4whatEv
.Lfunc_begin7:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception7
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	32(%rdi), %r14
	cmpq	$0, 40(%rdi)
	je	.LBB45_3
.LBB45_1:
	movq	(%r14), %rbx
.LBB45_2:
	movq	%rbx, %rax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB45_3:
	.cfi_def_cfa_offset 80
	movq	%rdi, %rbx
	callq	_ZNKSt13runtime_error4whatEv
	movq	%rax, %r15
	movq	40(%rbx), %r12
	movq	%rax, %rdi
	callq	strlen
.Ltmp51:
	movq	%r14, %rdi
	xorl	%esi, %esi
	movq	%r12, %rdx
	movq	%r15, %rcx
	movq	%rax, %r8
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm
.Ltmp52:
# %bb.4:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit
	movl	16(%rbx), %edx
	testl	%edx, %edx
	je	.LBB45_1
# %bb.5:
	cmpq	$0, 40(%rbx)
	je	.LBB45_8
# %bb.6:
.Ltmp53:
	movl	$.L.str.6, %esi
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc
.Ltmp54:
# %bb.7:                                # %._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc.exit_crit_edge
	movl	16(%rbx), %edx
.LBB45_8:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc.exit
	movq	24(%rbx), %rsi
	movq	(%rsi), %rax
.Ltmp56:
	leaq	8(%rsp), %rdi
	callq	*48(%rax)
.Ltmp57:
# %bb.9:                                # %_ZNK6thrust6system10error_code7messageB5cxx11Ev.exit
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdx
.Ltmp59:
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm
.Ltmp60:
# %bb.10:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLERKS4_.exit
	leaq	24(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB45_1
# %bb.11:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
	jmp	.LBB45_1
.LBB45_12:
.Ltmp61:
	movq	%rax, %r14
	leaq	24(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB45_17
# %bb.13:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i4
	callq	_ZdlPv
	jmp	.LBB45_17
.LBB45_14:
.Ltmp58:
	jmp	.LBB45_16
.LBB45_15:
.Ltmp55:
.LBB45_16:
	movq	%rax, %r14
.LBB45_17:
	movq	%r14, %rdi
	callq	__cxa_begin_catch
	movq	%rbx, %rdi
	callq	_ZNKSt13runtime_error4whatEv
	movq	%rax, %rbx
.Ltmp62:
	callq	__cxa_end_catch
.Ltmp63:
	jmp	.LBB45_2
.LBB45_18:
.Ltmp64:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end45:
	.size	_ZNK6thrust6system12system_error4whatEv, .Lfunc_end45-_ZNK6thrust6system12system_error4whatEv
	.cfi_endproc
	.section	.gcc_except_table._ZNK6thrust6system12system_error4whatEv,"aG",@progbits,_ZNK6thrust6system12system_error4whatEv,comdat
	.p2align	2, 0x0
GCC_except_table45:
.Lexception7:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase2-.Lttbaseref2
.Lttbaseref2:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end7-.Lcst_begin7
.Lcst_begin7:
	.uleb128 .Ltmp51-.Lfunc_begin7          # >> Call Site 1 <<
	.uleb128 .Ltmp54-.Ltmp51                #   Call between .Ltmp51 and .Ltmp54
	.uleb128 .Ltmp55-.Lfunc_begin7          #     jumps to .Ltmp55
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp56-.Lfunc_begin7          # >> Call Site 2 <<
	.uleb128 .Ltmp57-.Ltmp56                #   Call between .Ltmp56 and .Ltmp57
	.uleb128 .Ltmp58-.Lfunc_begin7          #     jumps to .Ltmp58
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp59-.Lfunc_begin7          # >> Call Site 3 <<
	.uleb128 .Ltmp60-.Ltmp59                #   Call between .Ltmp59 and .Ltmp60
	.uleb128 .Ltmp61-.Lfunc_begin7          #     jumps to .Ltmp61
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp60-.Lfunc_begin7          # >> Call Site 4 <<
	.uleb128 .Ltmp62-.Ltmp60                #   Call between .Ltmp60 and .Ltmp62
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp62-.Lfunc_begin7          # >> Call Site 5 <<
	.uleb128 .Ltmp63-.Ltmp62                #   Call between .Ltmp62 and .Ltmp63
	.uleb128 .Ltmp64-.Lfunc_begin7          #     jumps to .Ltmp64
	.byte	1                               #   On action: 1
.Lcst_end7:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase2:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE9fill_initEmRKf,"axG",@progbits,_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE9fill_initEmRKf,comdat
	.weak	_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE9fill_initEmRKf # -- Begin function _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE9fill_initEmRKf
	.p2align	1, 0x90
	.type	_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE9fill_initEmRKf,@function
_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE9fill_initEmRKf: # @_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE9fill_initEmRKf
	.cfi_startproc
# %bb.0:
	testq	%rsi, %rsi
	je	.LBB46_2
# %bb.1:                                # %_ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE20uninitialized_fill_nENS0_15normal_iteratorINS_10device_ptrIfEEEEmRKf.exit
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %rbx
	movq	%rdi, %r15
	movq	(%rdi), %rax
	leaq	(,%rsi,4), %rsi
	movq	8(%rax), %rdi
	movl	$4, %edx
	callq	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm
	movq	%rax, 8(%r15)
	movq	%rbx, 16(%r15)
	movq	%rbx, 24(%r15)
	movss	(%r14), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	leaq	15(%rsp), %rdi
	movq	%rax, %rsi
	movq	%rbx, %rdx
	callq	_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB46_2:
	retq
.Lfunc_end46:
	.size	_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE9fill_initEmRKf, .Lfunc_end46-_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE9fill_initEmRKf
	.cfi_endproc
                                        # -- End function
	.section	.text._ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m,"axG",@progbits,_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m,comdat
	.weak	_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m # -- Begin function _ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m
	.p2align	1, 0x90
	.type	_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m,@function
_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m: # @_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m
.Lfunc_begin8:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception8
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	movl	$4294967040, %ebp               # imm = 0xFFFFFF00
	movq	%rdx, 8(%rsp)                   # 8-byte Spill
	leaq	(%rdx,%rbp), %rcx
	decq	%rcx
	shrq	$8, %rcx
	movabsq	$72057598332895489, %rdx        # imm = 0x100000100000101
	movq	%rcx, %rax
	mulq	%rdx
	cmpq	$16777215, %rcx                 # imm = 0xFFFFFF
	jb	.LBB47_5
# %bb.1:                                # %.lr.ph.i.preheader
	movq	%rdx, %r15
	shrq	$16, %r15
	xorl	%r12d, %r12d
	leaq	512(%rbp), %r13
	movabsq	$-4294967040, %r14              # imm = 0xFFFFFFFF00000100
	movq	8(%rsp), %rbx                   # 8-byte Reload
.LBB47_2:                               # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	cmpq	%rbp, %rbx
	movl	$4294967040, %eax               # imm = 0xFFFFFF00
	cmovbq	%rbx, %rax
	addq	$255, %rax
	shrq	$8, %rax
	leaq	(%rax,%rbp), %rdi
	addq	$256, %rdi                      # imm = 0x100
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB47_4
# %bb.3:                                #   in Loop: Header=BB47_2 Depth=1
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movq	%r12, %rdx
	callq	_ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_
.LBB47_4:                               #   in Loop: Header=BB47_2 Depth=1
	addq	%rbp, %r12
	addq	%r14, %rbx
	decq	%r15
	jne	.LBB47_2
.LBB47_5:                               # %_ZN6thrust11hip_rocprim14__parallel_for12parallel_forINS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEE10hipError_tT0_T_P12ihipStream_t.exit
	callq	hipPeekAtLastError
	movl	%eax, %ebp
	callq	hipGetLastError
	testl	%ebp, %ebp
	jne	.LBB47_6
# %bb.11:                               # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit
	xorl	%edi, %edi
	callq	hipStreamSynchronize
	movl	%eax, %ebp
	callq	hipGetLastError
	testl	%ebp, %ebp
	jne	.LBB47_12
# %bb.15:                               # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit8
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB47_6:
	.cfi_def_cfa_offset 80
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp65:
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp66:
# %bb.7:
.Ltmp67:
	movl	$.L.str.10, %ecx
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movq	%rax, %rdx
	callq	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
.Ltmp68:
	jmp	.LBB47_8
.LBB47_12:
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp70:
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp71:
# %bb.13:
.Ltmp72:
	movl	$.L.str.11, %ecx
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movq	%rax, %rdx
	callq	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
.Ltmp73:
.LBB47_8:
	movl	$_ZTIN6thrust6system12system_errorE, %esi
	movl	$_ZN6thrust6system12system_errorD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB47_14:
.Ltmp74:
	jmp	.LBB47_10
.LBB47_9:
.Ltmp69:
.LBB47_10:                              # %common.resume
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end47:
	.size	_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m, .Lfunc_end47-_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m
	.cfi_endproc
	.section	.gcc_except_table._ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m,"aG",@progbits,_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m,comdat
	.p2align	2, 0x0
GCC_except_table47:
.Lexception8:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end8-.Lcst_begin8
.Lcst_begin8:
	.uleb128 .Lfunc_begin8-.Lfunc_begin8    # >> Call Site 1 <<
	.uleb128 .Ltmp65-.Lfunc_begin8          #   Call between .Lfunc_begin8 and .Ltmp65
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp65-.Lfunc_begin8          # >> Call Site 2 <<
	.uleb128 .Ltmp68-.Ltmp65                #   Call between .Ltmp65 and .Ltmp68
	.uleb128 .Ltmp69-.Lfunc_begin8          #     jumps to .Ltmp69
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp68-.Lfunc_begin8          # >> Call Site 3 <<
	.uleb128 .Ltmp70-.Ltmp68                #   Call between .Ltmp68 and .Ltmp70
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp70-.Lfunc_begin8          # >> Call Site 4 <<
	.uleb128 .Ltmp73-.Ltmp70                #   Call between .Ltmp70 and .Ltmp73
	.uleb128 .Ltmp74-.Lfunc_begin8          #     jumps to .Ltmp74
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp73-.Lfunc_begin8          # >> Call Site 5 <<
	.uleb128 .Lfunc_end47-.Ltmp73           #   Call between .Ltmp73 and .Lfunc_end47
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end8:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,"axG",@progbits,_ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,comdat
	.weak	_ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ # -- Begin function _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_
	.type	_ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,@function
_ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_: # @_ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	64(%rsp), %rax
	movq	%rdi, (%rax)
	movss	%xmm0, 8(%rax)
	leaq	24(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	16(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end48:
	.size	_ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_, .Lfunc_end48-_ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv,"axG",@progbits,_ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv,comdat
	.weak	_ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv # -- Begin function _ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv
	.p2align	1, 0x90
	.type	_ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv,@function
_ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv: # @_ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv
	.cfi_startproc
# %bb.0:
	movq	16(%rdi), %rdx
	testq	%rdx, %rdx
	je	.LBB49_2
# %bb.1:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	8(%rdi), %rsi
	shlq	$2, %rdx
	movq	8(%rax), %rdi
	movl	$4, %ecx
	callq	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm
	xorps	%xmm0, %xmm0
	movups	%xmm0, 8(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 8
.LBB49_2:
	retq
.Lfunc_end49:
	.size	_ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv, .Lfunc_end49-_ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB50_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB50_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4testv, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end50:
	.size	__hip_module_ctor, .Lfunc_end50-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB51_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB51_2:
	retq
.Lfunc_end51:
	.size	__hip_module_dtor, .Lfunc_end51-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z4testv,@object                # @_Z4testv
	.section	.rodata,"a",@progbits
	.globl	_Z4testv
	.p2align	3, 0x0
_Z4testv:
	.quad	_Z19__device_stub__testv
	.size	_Z4testv, 8

	.type	_ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,@object # @_ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource
	.section	.bss._ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,"awG",@nobits,_ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,comdat
	.weak	_ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource
	.p2align	3, 0x0
_ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource:
	.zero	16
	.size	_ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource, 16

	.type	_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,@object # @_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource
	.section	.bss._ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,"awG",@nobits,_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,comdat
	.weak	_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource
	.p2align	3, 0x0
_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource:
	.quad	0                               # 0x0
	.size	_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource, 8

	.hidden	__dso_handle
	.type	_ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,@object # @_ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE
	.section	.rodata._ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,"aG",@progbits,_ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,comdat
	.weak	_ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE
	.p2align	3, 0x0
_ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE:
	.quad	0
	.quad	_ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE
	.quad	_ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev
	.quad	_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev
	.quad	_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm
	.quad	_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm
	.quad	_ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_
	.size	_ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE, 56

	.type	_ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,@object # @_ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE
	.section	.rodata._ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,"aG",@progbits,_ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,comdat
	.weak	_ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE
_ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE:
	.asciz	"N6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE"
	.size	_ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE, 200

	.type	_ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,@object # @_ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE
	.section	.rodata._ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,"aG",@progbits,_ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,comdat
	.weak	_ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE
_ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE:
	.asciz	"N6thrust2mr15memory_resourceINS_10device_ptrIvEEEE"
	.size	_ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE, 51

	.type	_ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,@object # @_ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE
	.section	.rodata._ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,"aG",@progbits,_ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,comdat
	.weak	_ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE
	.p2align	3, 0x0
_ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE
	.size	_ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE, 16

	.type	_ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,@object # @_ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE
	.section	.rodata._ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,"aG",@progbits,_ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,comdat
	.weak	_ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE
	.p2align	3, 0x0
_ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE
	.quad	_ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE
	.size	_ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE, 24

	.type	_ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,@object # @_ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource
	.section	.data._ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,"awG",@progbits,_ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,comdat
	.weak	_ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource
	.p2align	3, 0x0
_ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource:
	.quad	_ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE+16
	.size	_ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource, 8

	.type	_ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,@object # @_ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE
	.section	.rodata._ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,"aG",@progbits,_ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,comdat
	.weak	_ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE
	.p2align	3, 0x0
_ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE:
	.quad	0
	.quad	_ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE
	.quad	_ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev
	.quad	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev
	.quad	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm
	.quad	_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm
	.quad	_ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_
	.size	_ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE, 56

	.type	_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,@object # @_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource
	.section	.bss._ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,"awG",@nobits,_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,comdat
	.weak	_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource
	.p2align	3, 0x0
_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource:
	.quad	0                               # 0x0
	.size	_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource, 8

	.type	_ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,@object # @_ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE
	.section	.rodata._ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,"aG",@progbits,_ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,comdat
	.weak	_ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE
_ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE:
	.asciz	"N6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE"
	.size	_ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE, 166

	.type	_ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,@object # @_ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE
	.section	.rodata._ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,"aG",@progbits,_ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,comdat
	.weak	_ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE
_ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE:
	.asciz	"N6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE"
	.size	_ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE, 113

	.type	_ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,@object # @_ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE
	.section	.rodata._ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,"aG",@progbits,_ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,comdat
	.weak	_ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE
	.p2align	3, 0x0
_ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE
	.size	_ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE, 16

	.type	_ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,@object # @_ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE
	.section	.rodata._ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,"aG",@progbits,_ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,comdat
	.weak	_ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE
	.p2align	3, 0x0
_ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE
	.quad	_ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE
	.size	_ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE, 24

	.type	_ZTSN6thrust6system6detail9bad_allocE,@object # @_ZTSN6thrust6system6detail9bad_allocE
	.section	.rodata._ZTSN6thrust6system6detail9bad_allocE,"aG",@progbits,_ZTSN6thrust6system6detail9bad_allocE,comdat
	.weak	_ZTSN6thrust6system6detail9bad_allocE
_ZTSN6thrust6system6detail9bad_allocE:
	.asciz	"N6thrust6system6detail9bad_allocE"
	.size	_ZTSN6thrust6system6detail9bad_allocE, 34

	.type	_ZTIN6thrust6system6detail9bad_allocE,@object # @_ZTIN6thrust6system6detail9bad_allocE
	.section	.rodata._ZTIN6thrust6system6detail9bad_allocE,"aG",@progbits,_ZTIN6thrust6system6detail9bad_allocE,comdat
	.weak	_ZTIN6thrust6system6detail9bad_allocE
	.p2align	3, 0x0
_ZTIN6thrust6system6detail9bad_allocE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system6detail9bad_allocE
	.quad	_ZTISt9bad_alloc
	.size	_ZTIN6thrust6system6detail9bad_allocE, 24

	.type	_ZZN6thrust6system12hip_categoryEvE6result,@object # @_ZZN6thrust6system12hip_categoryEvE6result
	.section	.bss._ZZN6thrust6system12hip_categoryEvE6result,"awG",@nobits,_ZZN6thrust6system12hip_categoryEvE6result,comdat
	.weak	_ZZN6thrust6system12hip_categoryEvE6result
	.p2align	3, 0x0
_ZZN6thrust6system12hip_categoryEvE6result:
	.zero	8
	.size	_ZZN6thrust6system12hip_categoryEvE6result, 8

	.type	_ZGVZN6thrust6system12hip_categoryEvE6result,@object # @_ZGVZN6thrust6system12hip_categoryEvE6result
	.section	.bss._ZGVZN6thrust6system12hip_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust6system12hip_categoryEvE6result,comdat
	.weak	_ZGVZN6thrust6system12hip_categoryEvE6result
	.p2align	3, 0x0
_ZGVZN6thrust6system12hip_categoryEvE6result:
	.quad	0                               # 0x0
	.size	_ZGVZN6thrust6system12hip_categoryEvE6result, 8

	.type	_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE,@object # @_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.section	.rodata._ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE,"aG",@progbits,_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE,comdat
	.weak	_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.p2align	3, 0x0
_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.quad	_ZN6thrust6system14error_categoryD2Ev
	.quad	_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev
	.quad	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv
	.quad	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi
	.quad	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.quad	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.quad	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei
	.size	_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE, 72

	.type	_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE,@object # @_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.section	.rodata._ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE,"aG",@progbits,_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE,comdat
	.weak	_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE
_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE:
	.asciz	"N6thrust6system11hip_rocprim6detail18hip_error_categoryE"
	.size	_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE, 57

	.type	_ZTSN6thrust6system14error_categoryE,@object # @_ZTSN6thrust6system14error_categoryE
	.section	.rodata._ZTSN6thrust6system14error_categoryE,"aG",@progbits,_ZTSN6thrust6system14error_categoryE,comdat
	.weak	_ZTSN6thrust6system14error_categoryE
_ZTSN6thrust6system14error_categoryE:
	.asciz	"N6thrust6system14error_categoryE"
	.size	_ZTSN6thrust6system14error_categoryE, 33

	.type	_ZTIN6thrust6system14error_categoryE,@object # @_ZTIN6thrust6system14error_categoryE
	.section	.rodata._ZTIN6thrust6system14error_categoryE,"aG",@progbits,_ZTIN6thrust6system14error_categoryE,comdat
	.weak	_ZTIN6thrust6system14error_categoryE
	.p2align	3, 0x0
_ZTIN6thrust6system14error_categoryE:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTSN6thrust6system14error_categoryE
	.size	_ZTIN6thrust6system14error_categoryE, 16

	.type	_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE,@object # @_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.section	.rodata._ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE,"aG",@progbits,_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE,comdat
	.weak	_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.p2align	3, 0x0
_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.quad	_ZTIN6thrust6system14error_categoryE
	.size	_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE, 24

	.type	_ZTVN6thrust6system14error_categoryE,@object # @_ZTVN6thrust6system14error_categoryE
	.section	.rodata._ZTVN6thrust6system14error_categoryE,"aG",@progbits,_ZTVN6thrust6system14error_categoryE,comdat
	.weak	_ZTVN6thrust6system14error_categoryE
	.p2align	3, 0x0
_ZTVN6thrust6system14error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust6system14error_categoryE
	.quad	_ZN6thrust6system14error_categoryD2Ev
	.quad	_ZN6thrust6system14error_categoryD0Ev
	.quad	__cxa_pure_virtual
	.quad	_ZNK6thrust6system14error_category23default_error_conditionEi
	.quad	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.quad	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.quad	__cxa_pure_virtual
	.size	_ZTVN6thrust6system14error_categoryE, 72

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"hip"
	.size	.L.str, 4

	.type	_ZZN6thrust6system15system_categoryEvE6result,@object # @_ZZN6thrust6system15system_categoryEvE6result
	.section	.bss._ZZN6thrust6system15system_categoryEvE6result,"awG",@nobits,_ZZN6thrust6system15system_categoryEvE6result,comdat
	.weak	_ZZN6thrust6system15system_categoryEvE6result
	.p2align	3, 0x0
_ZZN6thrust6system15system_categoryEvE6result:
	.zero	8
	.size	_ZZN6thrust6system15system_categoryEvE6result, 8

	.type	_ZGVZN6thrust6system15system_categoryEvE6result,@object # @_ZGVZN6thrust6system15system_categoryEvE6result
	.section	.bss._ZGVZN6thrust6system15system_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust6system15system_categoryEvE6result,comdat
	.weak	_ZGVZN6thrust6system15system_categoryEvE6result
	.p2align	3, 0x0
_ZGVZN6thrust6system15system_categoryEvE6result:
	.quad	0                               # 0x0
	.size	_ZGVZN6thrust6system15system_categoryEvE6result, 8

	.type	_ZTVN6thrust6system6detail21system_error_categoryE,@object # @_ZTVN6thrust6system6detail21system_error_categoryE
	.section	.rodata._ZTVN6thrust6system6detail21system_error_categoryE,"aG",@progbits,_ZTVN6thrust6system6detail21system_error_categoryE,comdat
	.weak	_ZTVN6thrust6system6detail21system_error_categoryE
	.p2align	3, 0x0
_ZTVN6thrust6system6detail21system_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust6system6detail21system_error_categoryE
	.quad	_ZN6thrust6system14error_categoryD2Ev
	.quad	_ZN6thrust6system6detail21system_error_categoryD0Ev
	.quad	_ZNK6thrust6system6detail21system_error_category4nameEv
	.quad	_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi
	.quad	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.quad	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.quad	_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei
	.size	_ZTVN6thrust6system6detail21system_error_categoryE, 72

	.type	_ZTSN6thrust6system6detail21system_error_categoryE,@object # @_ZTSN6thrust6system6detail21system_error_categoryE
	.section	.rodata._ZTSN6thrust6system6detail21system_error_categoryE,"aG",@progbits,_ZTSN6thrust6system6detail21system_error_categoryE,comdat
	.weak	_ZTSN6thrust6system6detail21system_error_categoryE
_ZTSN6thrust6system6detail21system_error_categoryE:
	.asciz	"N6thrust6system6detail21system_error_categoryE"
	.size	_ZTSN6thrust6system6detail21system_error_categoryE, 47

	.type	_ZTIN6thrust6system6detail21system_error_categoryE,@object # @_ZTIN6thrust6system6detail21system_error_categoryE
	.section	.rodata._ZTIN6thrust6system6detail21system_error_categoryE,"aG",@progbits,_ZTIN6thrust6system6detail21system_error_categoryE,comdat
	.weak	_ZTIN6thrust6system6detail21system_error_categoryE
	.p2align	3, 0x0
_ZTIN6thrust6system6detail21system_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system6detail21system_error_categoryE
	.quad	_ZTIN6thrust6system14error_categoryE
	.size	_ZTIN6thrust6system6detail21system_error_categoryE, 24

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"system"
	.size	.L.str.1, 7

	.type	_ZZN6thrust6system16generic_categoryEvE6result,@object # @_ZZN6thrust6system16generic_categoryEvE6result
	.section	.bss._ZZN6thrust6system16generic_categoryEvE6result,"awG",@nobits,_ZZN6thrust6system16generic_categoryEvE6result,comdat
	.weak	_ZZN6thrust6system16generic_categoryEvE6result
	.p2align	3, 0x0
_ZZN6thrust6system16generic_categoryEvE6result:
	.zero	8
	.size	_ZZN6thrust6system16generic_categoryEvE6result, 8

	.type	_ZGVZN6thrust6system16generic_categoryEvE6result,@object # @_ZGVZN6thrust6system16generic_categoryEvE6result
	.section	.bss._ZGVZN6thrust6system16generic_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust6system16generic_categoryEvE6result,comdat
	.weak	_ZGVZN6thrust6system16generic_categoryEvE6result
	.p2align	3, 0x0
_ZGVZN6thrust6system16generic_categoryEvE6result:
	.quad	0                               # 0x0
	.size	_ZGVZN6thrust6system16generic_categoryEvE6result, 8

	.type	_ZTVN6thrust6system6detail22generic_error_categoryE,@object # @_ZTVN6thrust6system6detail22generic_error_categoryE
	.section	.rodata._ZTVN6thrust6system6detail22generic_error_categoryE,"aG",@progbits,_ZTVN6thrust6system6detail22generic_error_categoryE,comdat
	.weak	_ZTVN6thrust6system6detail22generic_error_categoryE
	.p2align	3, 0x0
_ZTVN6thrust6system6detail22generic_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust6system6detail22generic_error_categoryE
	.quad	_ZN6thrust6system14error_categoryD2Ev
	.quad	_ZN6thrust6system6detail22generic_error_categoryD0Ev
	.quad	_ZNK6thrust6system6detail22generic_error_category4nameEv
	.quad	_ZNK6thrust6system14error_category23default_error_conditionEi
	.quad	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.quad	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.quad	_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei
	.size	_ZTVN6thrust6system6detail22generic_error_categoryE, 72

	.type	_ZTSN6thrust6system6detail22generic_error_categoryE,@object # @_ZTSN6thrust6system6detail22generic_error_categoryE
	.section	.rodata._ZTSN6thrust6system6detail22generic_error_categoryE,"aG",@progbits,_ZTSN6thrust6system6detail22generic_error_categoryE,comdat
	.weak	_ZTSN6thrust6system6detail22generic_error_categoryE
_ZTSN6thrust6system6detail22generic_error_categoryE:
	.asciz	"N6thrust6system6detail22generic_error_categoryE"
	.size	_ZTSN6thrust6system6detail22generic_error_categoryE, 48

	.type	_ZTIN6thrust6system6detail22generic_error_categoryE,@object # @_ZTIN6thrust6system6detail22generic_error_categoryE
	.section	.rodata._ZTIN6thrust6system6detail22generic_error_categoryE,"aG",@progbits,_ZTIN6thrust6system6detail22generic_error_categoryE,comdat
	.weak	_ZTIN6thrust6system6detail22generic_error_categoryE
	.p2align	3, 0x0
_ZTIN6thrust6system6detail22generic_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system6detail22generic_error_categoryE
	.quad	_ZTIN6thrust6system14error_categoryE
	.size	_ZTIN6thrust6system6detail22generic_error_categoryE, 24

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"generic"
	.size	.L.str.2, 8

	.type	_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,@object # @_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.section	.bss._ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,"awG",@nobits,_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,comdat
	.weak	_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.p2align	3, 0x0
_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11:
	.zero	32
	.size	_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, 32

	.type	_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,@object # @_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.section	.bss._ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,"awG",@nobits,_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,comdat
	.weak	_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.p2align	3, 0x0
_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11:
	.quad	0                               # 0x0
	.size	_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"Unknown error"
	.size	.L.str.3, 14

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"unknown error"
	.size	.L.str.4, 14

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"hipErrorUnknown"
	.size	.L.str.5, 16

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	": "
	.size	.L.str.6, 3

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"basic_string: construction from null is not valid"
	.size	.L.str.8, 50

	.type	_ZTVN6thrust6system6detail9bad_allocE,@object # @_ZTVN6thrust6system6detail9bad_allocE
	.section	.rodata._ZTVN6thrust6system6detail9bad_allocE,"aG",@progbits,_ZTVN6thrust6system6detail9bad_allocE,comdat
	.weak	_ZTVN6thrust6system6detail9bad_allocE
	.p2align	3, 0x0
_ZTVN6thrust6system6detail9bad_allocE:
	.quad	0
	.quad	_ZTIN6thrust6system6detail9bad_allocE
	.quad	_ZN6thrust6system6detail9bad_allocD2Ev
	.quad	_ZN6thrust6system6detail9bad_allocD0Ev
	.quad	_ZNK6thrust6system6detail9bad_alloc4whatEv
	.size	_ZTVN6thrust6system6detail9bad_allocE, 40

	.type	.L.str.9,@object                # @.str.9
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.9:
	.asciz	"HIP free failed"
	.size	.L.str.9, 16

	.type	_ZTSN6thrust6system12system_errorE,@object # @_ZTSN6thrust6system12system_errorE
	.section	.rodata._ZTSN6thrust6system12system_errorE,"aG",@progbits,_ZTSN6thrust6system12system_errorE,comdat
	.weak	_ZTSN6thrust6system12system_errorE
_ZTSN6thrust6system12system_errorE:
	.asciz	"N6thrust6system12system_errorE"
	.size	_ZTSN6thrust6system12system_errorE, 31

	.type	_ZTIN6thrust6system12system_errorE,@object # @_ZTIN6thrust6system12system_errorE
	.section	.rodata._ZTIN6thrust6system12system_errorE,"aG",@progbits,_ZTIN6thrust6system12system_errorE,comdat
	.weak	_ZTIN6thrust6system12system_errorE
	.p2align	3, 0x0
_ZTIN6thrust6system12system_errorE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system12system_errorE
	.quad	_ZTISt13runtime_error
	.size	_ZTIN6thrust6system12system_errorE, 24

	.type	_ZTVN6thrust6system12system_errorE,@object # @_ZTVN6thrust6system12system_errorE
	.section	.rodata._ZTVN6thrust6system12system_errorE,"aG",@progbits,_ZTVN6thrust6system12system_errorE,comdat
	.weak	_ZTVN6thrust6system12system_errorE
	.p2align	3, 0x0
_ZTVN6thrust6system12system_errorE:
	.quad	0
	.quad	_ZTIN6thrust6system12system_errorE
	.quad	_ZN6thrust6system12system_errorD2Ev
	.quad	_ZN6thrust6system12system_errorD0Ev
	.quad	_ZNK6thrust6system12system_error4whatEv
	.size	_ZTVN6thrust6system12system_errorE, 40

	.type	.L.str.10,@object               # @.str.10
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.10:
	.asciz	"parallel_for failed"
	.size	.L.str.10, 20

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"parallel_for: failed to synchronize"
	.size	.L.str.11, 36

	.type	_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,@object # @_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_
	.section	.rodata._ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,"aG",@progbits,_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,comdat
	.weak	_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_
	.p2align	3, 0x0
_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_:
	.quad	_ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_
	.size	_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z4testv"
	.size	.L__unnamed_1, 9

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_"
	.size	.L__unnamed_2, 128

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__testv
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z4testv
	.addrsig_sym _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource
	.addrsig_sym _ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource
	.addrsig_sym __dso_handle
	.addrsig_sym _ZTVN10__cxxabiv120__si_class_type_infoE
	.addrsig_sym _ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE
	.addrsig_sym _ZTVN10__cxxabiv117__class_type_infoE
	.addrsig_sym _ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE
	.addrsig_sym _ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE
	.addrsig_sym _ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE
	.addrsig_sym _ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource
	.addrsig_sym _ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource
	.addrsig_sym _ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE
	.addrsig_sym _ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE
	.addrsig_sym _ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE
	.addrsig_sym _ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE
	.addrsig_sym _ZTSN6thrust6system6detail9bad_allocE
	.addrsig_sym _ZTISt9bad_alloc
	.addrsig_sym _ZTIN6thrust6system6detail9bad_allocE
	.addrsig_sym _ZZN6thrust6system12hip_categoryEvE6result
	.addrsig_sym _ZGVZN6thrust6system12hip_categoryEvE6result
	.addrsig_sym _ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.addrsig_sym _ZTSN6thrust6system14error_categoryE
	.addrsig_sym _ZTIN6thrust6system14error_categoryE
	.addrsig_sym _ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.addrsig_sym _ZZN6thrust6system15system_categoryEvE6result
	.addrsig_sym _ZGVZN6thrust6system15system_categoryEvE6result
	.addrsig_sym _ZTSN6thrust6system6detail21system_error_categoryE
	.addrsig_sym _ZTIN6thrust6system6detail21system_error_categoryE
	.addrsig_sym _ZZN6thrust6system16generic_categoryEvE6result
	.addrsig_sym _ZGVZN6thrust6system16generic_categoryEvE6result
	.addrsig_sym _ZTSN6thrust6system6detail22generic_error_categoryE
	.addrsig_sym _ZTIN6thrust6system6detail22generic_error_categoryE
	.addrsig_sym _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.addrsig_sym _ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.addrsig_sym _ZTSN6thrust6system12system_errorE
	.addrsig_sym _ZTISt13runtime_error
	.addrsig_sym _ZTIN6thrust6system12system_errorE
	.addrsig_sym _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.p2align	2                               ; -- Begin function __ockl_printf_append_string_n
	.type	__ockl_printf_append_string_n,@function
__ockl_printf_append_string_n:          ; @__ockl_printf_append_string_n
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v7, v2
	v_or_b32_e32 v2, 2, v0
	v_cmp_eq_u32_e64 s0, 0, v6
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v10, v2, v0, s0
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u64_e32 0, v[7:8]
	s_xor_b32 s10, exec_lo, s0
	s_cbranch_execz .LBB0_87
; %bb.1:
	s_load_b64 s[2:3], s[8:9], 0x50
	v_dual_mov_b32 v11, 2 :: v_dual_and_b32 v6, 2, v10
	v_mov_b32_e32 v30, 0
	v_and_b32_e32 v0, -3, v10
	v_mbcnt_lo_u32_b32 v33, -1, 0
	v_mov_b32_e32 v12, 1
	s_mov_b32 s12, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;     Child Loop BB0_13 Depth 2
                                        ;     Child Loop BB0_21 Depth 2
                                        ;     Child Loop BB0_29 Depth 2
                                        ;     Child Loop BB0_37 Depth 2
                                        ;     Child Loop BB0_45 Depth 2
                                        ;     Child Loop BB0_53 Depth 2
                                        ;     Child Loop BB0_61 Depth 2
                                        ;     Child Loop BB0_69 Depth 2
                                        ;     Child Loop BB0_75 Depth 2
                                        ;     Child Loop BB0_84 Depth 2
	v_cmp_gt_u64_e32 vcc_lo, 56, v[4:5]
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $sgpr4
	s_mov_b32 s0, exec_lo
	v_dual_cndmask_b32 v32, 0, v5 :: v_dual_cndmask_b32 v31, 56, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 8, v31
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_8
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_ne_u32_e32 0, v31
	s_cbranch_execz .LBB0_7
; %bb.4:                                ; %.preheader31.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[9:10], 3, v[31:32]
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v14, v8
	v_mov_b32_e32 v13, v7
	s_mov_b64 s[4:5], 0
	s_mov_b32 s7, 0
.LBB0_5:                                ; %.preheader31
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v10, v[13:14]
	v_mov_b32_e32 v16, s11
	v_add_co_u32 v13, vcc_lo, v13, 1
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v15, 0xffff, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[15:16], s4, v[15:16]
	s_add_u32 s4, s4, 8
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e64 s0, s4, v9
	v_or_b32_e32 v3, v16, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v2, v15, v2
	s_or_b32 s7, s0, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_5
; %bb.6:                                ; %Flow232
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_7:                                ; %Flow234
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_mov_b32 s4, 0
.LBB0_8:                                ; %Flow236
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s1
	v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v10, v8
	v_mov_b32_e32 v9, v7
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt vmcnt(0)
	s_clause 0x5
	flat_load_u8 v2, v[7:8]
	flat_load_u8 v3, v[7:8] offset:1
	flat_load_u8 v9, v[7:8] offset:2
	flat_load_u8 v10, v[7:8] offset:3
	flat_load_u8 v13, v[7:8] offset:5
	flat_load_u8 v14, v[7:8] offset:4
	v_mov_b32_e32 v16, v30
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_and_b32_e32 v2, 0xffff, v2
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v3, 8, v3
	s_clause 0x1
	flat_load_u8 v15, v[7:8] offset:7
	flat_load_d16_hi_u8 v16, v[7:8] offset:6
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v9, 16, v9
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v10, 24, v10
	v_or_b32_e32 v2, v3, v2
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v3, 8, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_or3_b32 v2, v2, v9, v10
	s_waitcnt vmcnt(2)
	v_or3_b32 v3, 0, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v2, v2, 0, 0
	v_or3_b32 v2, v2, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v9, 24, v15
	v_add_nc_u32_e32 v15, -8, v31
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_or3_b32 v3, v3, v16, v9
	v_add_co_u32 v9, vcc_lo, v7, 8
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v8, vcc_lo
.LBB0_10:                               ; %.loopexit32
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr13_vgpr14
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v15
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_16
; %bb.11:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v13, 0
	v_mov_b32_e32 v14, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v15
	s_cbranch_execz .LBB0_15
; %bb.12:                               ; %.preheader29.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v13, 0
	v_mov_b32_e32 v14, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_13:                               ; %.preheader29
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v16, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v15
	flat_load_u8 v16, v[16:17]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v17, s11 :: v_dual_and_b32 v16, 0xffff, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], s0, v[16:17]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v14, v17, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v13, v16, v13
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_13
; %bb.14:                               ; %Flow227
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_15:                               ; %Flow229
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr15
.LBB0_16:                               ; %Flow231
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v17, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v13, v[9:10]
	flat_load_u8 v14, v[9:10] offset:1
	flat_load_u8 v16, v[9:10] offset:2
	flat_load_u8 v17, v[9:10] offset:3
	flat_load_u8 v18, v[9:10] offset:5
	flat_load_u8 v19, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v20, v30 :: v_dual_and_b32 v13, 0xffff, v13
	s_clause 0x1
	flat_load_u8 v21, v[9:10] offset:7
	flat_load_d16_hi_u8 v20, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v14, 8, v14
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v16, 16, v16
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v17, 24, v17
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v13, v14, v13
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v14, 8, v18
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v13, v13, v16, v17
	s_waitcnt vmcnt(2)
	v_or3_b32 v14, 0, v19, v14
	v_add_nc_u32_e32 v17, -8, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v13, v13, 0, 0
	v_or3_b32 v13, v13, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v16, 24, v21
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v14, v14, v20, v16
.LBB0_18:                               ; %.loopexit30
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v17
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_24
; %bb.19:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v17
	s_cbranch_execz .LBB0_23
; %bb.20:                               ; %.preheader27.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_21:                               ; %.preheader27
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v18, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v17
	flat_load_u8 v18, v[18:19]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v19, s11 :: v_dual_and_b32 v18, 0xffff, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[18:19], s0, v[18:19]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v16, v19, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v15, v18, v15
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_21
; %bb.22:                               ; %Flow222
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_23:                               ; %Flow224
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr17
.LBB0_24:                               ; %Flow226
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v19, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_26
; %bb.25:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v15, v[9:10]
	flat_load_u8 v16, v[9:10] offset:1
	flat_load_u8 v18, v[9:10] offset:2
	flat_load_u8 v19, v[9:10] offset:3
	flat_load_u8 v20, v[9:10] offset:5
	flat_load_u8 v21, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v22, v30 :: v_dual_and_b32 v15, 0xffff, v15
	s_clause 0x1
	flat_load_u8 v23, v[9:10] offset:7
	flat_load_d16_hi_u8 v22, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v16, 8, v16
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v18, 16, v18
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v19, 24, v19
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v15, v16, v15
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v16, 8, v20
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v15, v15, v18, v19
	s_waitcnt vmcnt(2)
	v_or3_b32 v16, 0, v21, v16
	v_add_nc_u32_e32 v19, -8, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v15, v15, 0, 0
	v_or3_b32 v15, v15, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v18, 24, v23
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v16, v16, v22, v18
.LBB0_26:                               ; %.loopexit28
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr17_vgpr18
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v19
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_32
; %bb.27:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v17, 0
	v_mov_b32_e32 v18, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v19
	s_cbranch_execz .LBB0_31
; %bb.28:                               ; %.preheader25.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v17, 0
	v_mov_b32_e32 v18, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_29:                               ; %.preheader25
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v20, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v21, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v19
	flat_load_u8 v20, v[20:21]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v21, s11 :: v_dual_and_b32 v20, 0xffff, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], s0, v[20:21]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v18, v21, v18
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v17, v20, v17
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_29
; %bb.30:                               ; %Flow217
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_31:                               ; %Flow219
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr19
.LBB0_32:                               ; %Flow221
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v21, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_34
; %bb.33:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v17, v[9:10]
	flat_load_u8 v18, v[9:10] offset:1
	flat_load_u8 v20, v[9:10] offset:2
	flat_load_u8 v21, v[9:10] offset:3
	flat_load_u8 v22, v[9:10] offset:5
	flat_load_u8 v23, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v24, v30 :: v_dual_and_b32 v17, 0xffff, v17
	s_clause 0x1
	flat_load_u8 v25, v[9:10] offset:7
	flat_load_d16_hi_u8 v24, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v18, 8, v18
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v20, 16, v20
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v21, 24, v21
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v17, v18, v17
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v18, 8, v22
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v17, v17, v20, v21
	s_waitcnt vmcnt(2)
	v_or3_b32 v18, 0, v23, v18
	v_add_nc_u32_e32 v21, -8, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v17, v17, 0, 0
	v_or3_b32 v17, v17, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v20, 24, v25
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v18, v18, v24, v20
.LBB0_34:                               ; %.loopexit26
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v21
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_40
; %bb.35:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v19, 0
	v_mov_b32_e32 v20, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v21
	s_cbranch_execz .LBB0_39
; %bb.36:                               ; %.preheader23.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v19, 0
	v_mov_b32_e32 v20, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_37:                               ; %.preheader23
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v22, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v23, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v21
	flat_load_u8 v22, v[22:23]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v23, s11 :: v_dual_and_b32 v22, 0xffff, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], s0, v[22:23]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v20, v23, v20
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v19, v22, v19
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_37
; %bb.38:                               ; %Flow212
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_39:                               ; %Flow214
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr21
.LBB0_40:                               ; %Flow216
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v23, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_42
; %bb.41:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v19, v[9:10]
	flat_load_u8 v20, v[9:10] offset:1
	flat_load_u8 v22, v[9:10] offset:2
	flat_load_u8 v23, v[9:10] offset:3
	flat_load_u8 v24, v[9:10] offset:5
	flat_load_u8 v25, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v26, v30 :: v_dual_and_b32 v19, 0xffff, v19
	s_clause 0x1
	flat_load_u8 v27, v[9:10] offset:7
	flat_load_d16_hi_u8 v26, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v20, 8, v20
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v22, 16, v22
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v23, 24, v23
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v19, v20, v19
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v20, 8, v24
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v19, v19, v22, v23
	s_waitcnt vmcnt(2)
	v_or3_b32 v20, 0, v25, v20
	v_add_nc_u32_e32 v23, -8, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v19, v19, 0, 0
	v_or3_b32 v19, v19, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v22, 24, v27
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v20, v20, v26, v22
.LBB0_42:                               ; %.loopexit24
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr21_vgpr22
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v23
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_48
; %bb.43:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v23
	s_cbranch_execz .LBB0_47
; %bb.44:                               ; %.preheader21.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_45:                               ; %.preheader21
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v24, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v25, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v23
	flat_load_u8 v24, v[24:25]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v25, s11 :: v_dual_and_b32 v24, 0xffff, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[24:25], s0, v[24:25]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v22, v25, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v21, v24, v21
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_45
; %bb.46:                               ; %Flow207
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_47:                               ; %Flow209
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr23
.LBB0_48:                               ; %Flow211
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v25, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_50
; %bb.49:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v21, v[9:10]
	flat_load_u8 v22, v[9:10] offset:1
	flat_load_u8 v24, v[9:10] offset:2
	flat_load_u8 v25, v[9:10] offset:3
	flat_load_u8 v26, v[9:10] offset:5
	flat_load_u8 v27, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v28, v30 :: v_dual_and_b32 v21, 0xffff, v21
	s_clause 0x1
	flat_load_u8 v29, v[9:10] offset:7
	flat_load_d16_hi_u8 v28, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v22, 8, v22
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v24, 16, v24
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v25, 24, v25
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v21, v22, v21
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v22, 8, v26
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v21, v21, v24, v25
	s_waitcnt vmcnt(2)
	v_or3_b32 v22, 0, v27, v22
	v_add_nc_u32_e32 v25, -8, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v21, v21, 0, 0
	v_or3_b32 v21, v21, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v24, 24, v29
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v22, v22, v28, v24
.LBB0_50:                               ; %.loopexit22
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v25
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB0_56
; %bb.51:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v23, 0
	v_mov_b32_e32 v24, 0
	s_mov_b32 s5, exec_lo
	v_cmpx_ne_u32_e32 0, v25
	s_cbranch_execz .LBB0_55
; %bb.52:                               ; %.preheader.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v23, 0
	v_mov_b32_e32 v24, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s6, 0
.LBB0_53:                               ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v26, v[9:10]
	v_mov_b32_e32 v27, s11
	v_add_nc_u32_e32 v25, -1, v25
	v_add_co_u32 v9, vcc_lo, v9, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v25
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v26, 0xffff, v26
	v_lshlrev_b64 v[26:27], s0, v[26:27]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v24, v27, v24
	v_or_b32_e32 v23, v26, v23
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_53
; %bb.54:                               ; %Flow202
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_55:                               ; %Flow204
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr9_vgpr10
.LBB0_56:                               ; %Flow206
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB0_58
; %bb.57:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v23, v[9:10]
	flat_load_u8 v24, v[9:10] offset:1
	flat_load_u8 v25, v[9:10] offset:2
	flat_load_u8 v26, v[9:10] offset:3
	flat_load_u8 v27, v[9:10] offset:5
	flat_load_u8 v28, v[9:10] offset:4
	v_mov_b32_e32 v29, v30
	s_clause 0x1
	flat_load_u8 v34, v[9:10] offset:7
	flat_load_d16_hi_u8 v29, v[9:10] offset:6
	s_waitcnt vmcnt(7) lgkmcnt(0)
	v_and_b32_e32 v9, 0xffff, v23
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v10, 8, v24
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v23, 16, v25
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v24, 8, v27
	v_or_b32_e32 v9, v10, v9
	v_lshlrev_b32_e32 v10, 24, v26
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v9, v9, v23, v10
	s_waitcnt vmcnt(2)
	v_or3_b32 v10, 0, v28, v24
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v23, 24, v34
	v_or3_b32 v9, v9, 0, 0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or3_b32 v24, v10, v29, v23
	v_or3_b32 v23, v9, 0, 0
.LBB0_58:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v29, v33
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v29
	v_cmp_eq_u32_e64 s0, s0, v29
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_64
; %bb.59:                               ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[27:28], v30, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[9:10], v30, s[2:3] offset:40
	global_load_b64 v[25:26], v30, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v10, v10, v28
	v_and_b32_e32 v9, v9, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v10, 24
	v_mul_hi_u32 v34, v9, 24
	v_mul_lo_u32 v9, v9, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v34, v10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v25, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, v26, v10, vcc_lo
	global_load_b64 v[25:26], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v30, v[25:28], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[9:10], v[27:28]
	s_cbranch_execz .LBB0_63
; %bb.60:                               ; %.preheader3.i.i19.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s5, 0
.LBB0_61:                               ; %.preheader3.i.i19
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[25:26], v30, s[2:3] offset:40
	global_load_b64 v[34:35], v30, s[2:3]
	v_dual_mov_b32 v28, v10 :: v_dual_mov_b32 v27, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v25, v25, v27
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, v25, 24, v[34:35]
	v_and_b32_e32 v34, v26, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[25:26], null, v34, 24, v[10:11]
	v_mov_b32_e32 v10, v25
	global_load_b64 v[25:26], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v30, v[25:28], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[27:28]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_61
; %bb.62:                               ; %Flow199
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_63:                               ; %Flow201
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_64:                               ; %.loopexit4.i.i14
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[34:35], v30, s[2:3] offset:40
	global_load_b128 v[25:28], v30, s[2:3]
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_mov_b32 s15, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v34
	v_readfirstlane_b32 s7, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s13, s6, 24
	s_mul_i32 s14, s6, 24
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB0_66
; %bb.65:                               ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s17, s13, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v34, vcc_lo, v25, s14
	v_add_co_ci_u32_e32 v35, vcc_lo, s17, v26, vcc_lo
	v_dual_mov_b32 v9, s15 :: v_dual_mov_b32 v10, v30
	global_store_b128 v[34:35], v[9:12], off offset:8
.LBB0_66:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_cmp_lt_u64_e32 vcc_lo, 56, v[4:5]
	v_or_b32_e32 v9, 0, v1
	v_or_b32_e32 v10, v0, v6
	v_lshl_add_u32 v34, v31, 2, 28
	s_lshl_b64 s[6:7], s[6:7], 12
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v1, v9, v1 :: v_dual_cndmask_b32 v0, v10, v0
	v_lshlrev_b64 v[9:10], 6, v[29:30]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v27, vcc_lo, v27, s6
	v_and_b32_e32 v34, 0x1e0, v34
	v_add_co_ci_u32_e32 v28, vcc_lo, s7, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, v27, v9
	v_and_or_b32 v0, 0xffffff1f, v0, v34
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, v28, v10, vcc_lo
	s_clause 0x3
	global_store_b128 v[9:10], v[0:3], off
	global_store_b128 v[9:10], v[13:16], off offset:16
	global_store_b128 v[9:10], v[17:20], off offset:32
	global_store_b128 v[9:10], v[21:24], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_74
; %bb.67:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x1
	global_load_b64 v[17:18], v30, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v30, s[2:3] offset:40
	v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v16, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v0
	v_readfirstlane_b32 s17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[16:17], s[16:17], s[4:5]
	s_mul_i32 s7, s17, 24
	s_mul_hi_u32 s15, s16, 24
	s_mul_i32 s16, s16, 24
	s_add_i32 s15, s15, s7
	v_add_co_u32 v13, vcc_lo, v25, s16
	v_add_co_ci_u32_e32 v14, vcc_lo, s15, v26, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[13:14], v[17:18], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v30, v[15:18], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[17:18]
	s_cbranch_execz .LBB0_70
; %bb.68:                               ; %.preheader1.i.i17.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s15, 0
.LBB0_69:                               ; %.preheader1.i.i17
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[13:14], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v30, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s15, vcc_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB0_69
.LBB0_70:                               ; %Flow197
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[0:1], v30, s[2:3] offset:16
	s_mov_b32 s15, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s15, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_72
; %bb.71:                               ;   in Loop: Header=BB0_2 Depth=1
	s_bcnt1_i32_b32 s15, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v29, s15
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[29:30], off offset:8
.LBB0_72:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_74
; %bb.73:                               ;   in Loop: Header=BB0_2 Depth=1
	global_load_b32 v29, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v29
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[29:30], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_74:                               ; %Flow198
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s13, s13, s1
	v_add_co_u32 v0, vcc_lo, v25, s14
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v26, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_75:                               ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_77
; %bb.76:                               ;   in Loop: Header=BB0_75 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_77:                               ;   in Loop: Header=BB0_75 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_79
; %bb.78:                               ;   in Loop: Header=BB0_75 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_80
.LBB0_79:                               ;   in Loop: Header=BB0_75 Depth=2
	s_mov_b32 s1, -1
.LBB0_80:                               ; %Flow192
                                        ;   in Loop: Header=BB0_75 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_75
; %bb.81:                               ;   in Loop: Header=BB0_2 Depth=1
	global_load_b128 v[0:3], v[9:10], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_85
; %bb.82:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v30, s[2:3] offset:40
	global_load_b64 v[9:10], v30, s[2:3] offset:24 glc
	global_load_b64 v[15:16], v30, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v17, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, v17, s4
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[13:14]
	v_dual_cndmask_b32 v14, v14, v18 :: v_dual_cndmask_b32 v13, v13, v17
	v_and_b32_e32 v3, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v13, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v17, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v17, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, v15, v2
	v_mov_b32_e32 v15, v9
	v_add_co_ci_u32_e32 v3, vcc_lo, v16, v3, vcc_lo
	v_mov_b32_e32 v16, v10
	global_store_b64 v[2:3], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v30, v[13:16], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[15:16], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_85
; %bb.83:                               ; %.preheader.i.i16.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s0, 0
.LBB0_84:                               ; %.preheader.i.i16
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[2:3], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v30, v[13:16], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[15:16]
	v_dual_mov_b32 v16, v10 :: v_dual_mov_b32 v15, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_84
.LBB0_85:                               ; %__ockl_hostcall_preview.exit20
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_sub_co_u32 v4, vcc_lo, v4, v31
	v_sub_co_ci_u32_e32 v5, vcc_lo, v5, v32, vcc_lo
	v_add_co_u32 v7, s0, v7, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s0, v8, v32, s0
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_or_b32 s12, vcc_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB0_2
; %bb.86:                               ; %Flow237
	s_or_b32 exec_lo, exec_lo, s12
                                        ; implicit-def: $vgpr10
.LBB0_87:                               ; %Flow253
	s_and_not1_saveexec_b32 s1, s10
	s_cbranch_execz .LBB0_116
; %bb.88:
	s_load_b64 s[2:3], s[8:9], 0x50
	s_waitcnt vmcnt(0)
	v_mbcnt_lo_u32_b32 v2, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB0_94
; %bb.89:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[5:6], v0, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[7:8], v0, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v3, 24
	v_mul_lo_u32 v4, v4, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v9, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v7, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[5:6]
	s_cbranch_execz .LBB0_93
; %bb.90:                               ; %.preheader3.i.i.preheader
	s_mov_b32 s6, 0
.LBB0_91:                               ; %.preheader3.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[11:12], v0, s[2:3]
	v_dual_mov_b32 v5, v8 :: v_dual_mov_b32 v6, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v3, 24, v[11:12]
	v_mov_b32_e32 v3, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[3:4]
	global_load_b64 v[3:4], v[7:8], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[5:6]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_91
; %bb.92:                               ; %Flow249
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_93:                               ; %Flow251
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_94:                               ; %.loopexit4.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s11, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[11:12], v3, s[2:3] offset:40
	global_load_b128 v[4:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v11
	v_readfirstlane_b32 s7, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s8, s7, 24
	s_mul_hi_u32 s9, s6, 24
	s_mul_i32 s10, s6, 24
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB0_96
; %bb.95:
	s_add_i32 s13, s9, s8
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v5, vcc_lo
	v_dual_mov_b32 v11, s11 :: v_dual_mov_b32 v12, v3
	v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1
	global_store_b128 v[8:9], v[11:14], off offset:8
.LBB0_96:
	s_or_b32 exec_lo, exec_lo, s12
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_and_or_b32 v0, 0xffffff1f, v10, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v11, s15
	v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v10, s14
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_104
; %bb.97:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v8, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v5, v1, vcc_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB0_100
; %bb.98:                               ; %.preheader1.i.i.preheader
	s_mov_b32 s11, 0
.LBB0_99:                               ; %.preheader1.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_99
.LBB0_100:                              ; %Flow247
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s11, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s11, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_102
; %bb.101:
	s_bcnt1_i32_b32 s11, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s11
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB0_102:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_104
; %bb.103:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_104:                              ; %Flow248
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s9, s9, s8
	v_add_co_u32 v0, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_105:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_107
; %bb.106:                              ;   in Loop: Header=BB0_105 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_107:                              ;   in Loop: Header=BB0_105 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB0_109
; %bb.108:                              ;   in Loop: Header=BB0_105 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB0_110
.LBB0_109:                              ;   in Loop: Header=BB0_105 Depth=1
	s_mov_b32 s6, -1
.LBB0_110:                              ; %Flow242
                                        ;   in Loop: Header=BB0_105 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_105
; %bb.111:
	global_load_b128 v[0:3], v[6:7], off
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_115
; %bb.112:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_115
; %bb.113:                              ; %.preheader.i.i.preheader
	s_mov_b32 s0, 0
.LBB0_114:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_114
.LBB0_115:                              ; %__ockl_hostcall_preview.exit
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_116:                              ; %Flow254
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end0:
	.size	__ockl_printf_append_string_n, .Lfunc_end0-__ockl_printf_append_string_n
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 5708
; NumSgprs: 34
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv
	.type	_ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv,@function
_ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv: ; @_ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_mov_b32 s25, s33
	s_mov_b32 s33, s32
	s_or_saveexec_b32 s0, -1
	scratch_store_b32 off, v40, s33         ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s0
	v_writelane_b32 v40, s30, 0
	s_add_i32 s32, s32, 16
	v_writelane_b32 v40, s31, 1
	s_load_b64 s[20:21], s[8:9], 0x50
	v_mbcnt_lo_u32_b32 v50, -1, 0
	v_mov_b32_e32 v6, 0
	v_dual_mov_b32 v48, v1 :: v_dual_mov_b32 v49, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v50
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_mov_b64 s[18:19], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_6
; %bb.1:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_5
; %bb.2:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB1_3:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_3
; %bb.4:                                ; %Flow575
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_5:                                ; %Flow577
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_6:                                ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_8
; %bb.7:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_8:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_15
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_11
.LBB1_10:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_10
.LBB1_11:                               ; %Flow573
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_13
; %bb.12:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_13:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_15
; %bb.14:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_15:                               ; %Flow574
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_16:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_18
; %bb.17:                               ;   in Loop: Header=BB1_16 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_18:                               ;   in Loop: Header=BB1_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_20
; %bb.19:                               ;   in Loop: Header=BB1_16 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_21
.LBB1_20:                               ;   in Loop: Header=BB1_16 Depth=1
	s_mov_b32 s1, -1
.LBB1_21:                               ; %Flow568
                                        ;   in Loop: Header=BB1_16 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_16
; %bb.22:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_26
; %bb.23:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_26
; %bb.24:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB1_25:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_25
.LBB1_26:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.7@rel32@lo+4
	s_addc_u32 s1, s1, .str.7@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 43, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_add_co_u32 v36, vcc_lo, 0x2000, v49
	v_add_co_ci_u32_e32 v37, vcc_lo, 0, v48, vcc_lo
	s_mov_b32 s0, exec_lo
	flat_load_u8 v0, v[36:37] offset:3904
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u16_e32 0, v0
	s_xor_b32 s22, exec_lo, s0
	s_cbranch_execz .LBB1_55
; %bb.27:
	v_mov_b32_e32 v4, v50
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_33
; %bb.28:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_32
; %bb.29:                               ; %.preheader3.i.i.i10.preheader
	s_mov_b32 s3, 0
.LBB1_30:                               ; %.preheader3.i.i.i10
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_30
; %bb.31:                               ; %Flow545
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_32:                               ; %Flow547
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_33:                               ; %.loopexit4.i.i.i5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_35
; %bb.34:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_35:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_43
; %bb.36:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_39
; %bb.37:                               ; %.preheader1.i.i.i8.preheader
	s_mov_b32 s8, 0
.LBB1_38:                               ; %.preheader1.i.i.i8
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_38
.LBB1_39:                               ; %Flow543
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_41
; %bb.40:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_41:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_43
; %bb.42:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_43:                               ; %Flow544
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_44:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_46
; %bb.45:                               ;   in Loop: Header=BB1_44 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_46:                               ;   in Loop: Header=BB1_44 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_48
; %bb.47:                               ;   in Loop: Header=BB1_44 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_49
.LBB1_48:                               ;   in Loop: Header=BB1_44 Depth=1
	s_mov_b32 s1, -1
.LBB1_49:                               ; %Flow538
                                        ;   in Loop: Header=BB1_44 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_44
; %bb.50:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_54
; %bb.51:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_54
; %bb.52:                               ; %.preheader.i.i.i7.preheader
	s_mov_b32 s0, 0
.LBB1_53:                               ; %.preheader.i.i.i7
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_53
.LBB1_54:                               ; %__ockl_printf_begin.exit11
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.8@rel32@lo+4
	s_addc_u32 s1, s1, .str.8@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 6, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
.LBB1_55:                               ; %Flow562
	s_and_not1_saveexec_b32 s22, s22
	s_cbranch_execz .LBB1_84
; %bb.56:
	v_mov_b32_e32 v4, v50
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_62
; %bb.57:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_61
; %bb.58:                               ; %.preheader3.i.i.i17.preheader
	s_mov_b32 s3, 0
.LBB1_59:                               ; %.preheader3.i.i.i17
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_59
; %bb.60:                               ; %Flow559
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_61:                               ; %Flow561
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_62:                               ; %.loopexit4.i.i.i12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_64
; %bb.63:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_64:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_72
; %bb.65:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_68
; %bb.66:                               ; %.preheader1.i.i.i15.preheader
	s_mov_b32 s8, 0
.LBB1_67:                               ; %.preheader1.i.i.i15
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_67
.LBB1_68:                               ; %Flow557
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_70
; %bb.69:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_70:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_72
; %bb.71:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_72:                               ; %Flow558
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_73:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_75
; %bb.74:                               ;   in Loop: Header=BB1_73 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_75:                               ;   in Loop: Header=BB1_73 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_77
; %bb.76:                               ;   in Loop: Header=BB1_73 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_78
.LBB1_77:                               ;   in Loop: Header=BB1_73 Depth=1
	s_mov_b32 s1, -1
.LBB1_78:                               ; %Flow552
                                        ;   in Loop: Header=BB1_73 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_73
; %bb.79:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_83
; %bb.80:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_83
; %bb.81:                               ; %.preheader.i.i.i14.preheader
	s_mov_b32 s0, 0
.LBB1_82:                               ; %.preheader.i.i.i14
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_82
.LBB1_83:                               ; %__ockl_printf_begin.exit18
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.9@rel32@lo+4
	s_addc_u32 s1, s1, .str.9@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 5, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
.LBB1_84:                               ; %Flow563
	s_or_b32 exec_lo, exec_lo, s22
	flat_load_b32 v38, v[36:37] offset:3908
	v_mov_b32_e32 v4, v50
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_90
; %bb.85:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_89
; %bb.86:                               ; %.preheader3.i.i.i24.preheader
	s_mov_b32 s3, 0
.LBB1_87:                               ; %.preheader3.i.i.i24
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_87
; %bb.88:                               ; %Flow531
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_89:                               ; %Flow533
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_90:                               ; %.loopexit4.i.i.i19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_92
; %bb.91:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_92:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_100
; %bb.93:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_96
; %bb.94:                               ; %.preheader1.i.i.i22.preheader
	s_mov_b32 s8, 0
.LBB1_95:                               ; %.preheader1.i.i.i22
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_95
.LBB1_96:                               ; %Flow529
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_98
; %bb.97:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_98:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_100
; %bb.99:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_100:                              ; %Flow530
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_101:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_103
; %bb.102:                              ;   in Loop: Header=BB1_101 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_103:                              ;   in Loop: Header=BB1_101 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_105
; %bb.104:                              ;   in Loop: Header=BB1_101 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_106
.LBB1_105:                              ;   in Loop: Header=BB1_101 Depth=1
	s_mov_b32 s1, -1
.LBB1_106:                              ; %Flow524
                                        ;   in Loop: Header=BB1_101 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_101
; %bb.107:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_111
; %bb.108:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_111
; %bb.109:                              ; %.preheader.i.i.i21.preheader
	s_mov_b32 s0, 0
.LBB1_110:                              ; %.preheader.i.i.i21
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_110
.LBB1_111:                              ; %__ockl_printf_begin.exit25
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.10@rel32@lo+4
	s_addc_u32 s1, s1, .str.10@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s4, 15, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v5, v50
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v5
	v_mov_b32_e32 v7, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_117
; %bb.112:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[9:10], v1, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[6:7], v1, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v3, v3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v3, v3, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[7:8], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[9:10]
	s_cbranch_execz .LBB1_116
; %bb.113:                              ; %.preheader3.i.i.i31.preheader
	s_mov_b32 s3, 0
.LBB1_114:                              ; %.preheader3.i.i.i31
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[11:12], v1, s[20:21]
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v8, v3, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v2, 24, v[11:12]
	v_mov_b32_e32 v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v8, 24, v[2:3]
	v_mov_b32_e32 v7, v3
	global_load_b64 v[7:8], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_114
; %bb.115:                              ; %Flow517
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_116:                              ; %Flow519
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_117:                              ; %.loopexit4.i.i.i26
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v6, 0
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[9:10], v6, s[20:21] offset:40
	global_load_b128 v[1:4], v6, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_119
; %bb.118:
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, v6
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s8, v2, vcc_lo
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB1_119:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[7:8], 6, v[5:6]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v7
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v8, vcc_lo
	v_mov_b32_e32 v39, v6
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v6, s11
	v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_127
; %bb.120:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v0, s[20:21] offset:32 glc
	global_load_b64 v[3:4], v0, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v7, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[7:8], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v0, v[9:12], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[11:12]
	s_cbranch_execz .LBB1_123
; %bb.121:                              ; %.preheader1.i.i.i29.preheader
	s_mov_b32 s8, 0
.LBB1_122:                              ; %.preheader1.i.i.i29
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_122
.LBB1_123:                              ; %Flow515
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_125
; %bb.124:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB1_125:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB1_127
; %bb.126:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_127:                              ; %Flow516
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_128:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_130
; %bb.129:                              ;   in Loop: Header=BB1_128 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_130:                              ;   in Loop: Header=BB1_128 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_132
; %bb.131:                              ;   in Loop: Header=BB1_128 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_133
.LBB1_132:                              ;   in Loop: Header=BB1_128 Depth=1
	s_mov_b32 s1, -1
.LBB1_133:                              ; %Flow510
                                        ;   in Loop: Header=BB1_128 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_128
; %bb.134:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_138
; %bb.135:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_138
; %bb.136:                              ; %.preheader.i.i.i28.preheader
	s_mov_b32 s0, 0
.LBB1_137:                              ; %.preheader.i.i.i28
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_137
.LBB1_138:                              ; %__ockl_printf_append_args.exit
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v4, v50
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_144
; %bb.139:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_143
; %bb.140:                              ; %.preheader3.i.i.i37.preheader
	s_mov_b32 s3, 0
.LBB1_141:                              ; %.preheader3.i.i.i37
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_141
; %bb.142:                              ; %Flow503
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_143:                              ; %Flow505
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_144:                              ; %.loopexit4.i.i.i32
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_146
; %bb.145:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_146:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_154
; %bb.147:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_150
; %bb.148:                              ; %.preheader1.i.i.i35.preheader
	s_mov_b32 s8, 0
.LBB1_149:                              ; %.preheader1.i.i.i35
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_149
.LBB1_150:                              ; %Flow501
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_152
; %bb.151:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_152:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_154
; %bb.153:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_154:                              ; %Flow502
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_155:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_157
; %bb.156:                              ;   in Loop: Header=BB1_155 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_157:                              ;   in Loop: Header=BB1_155 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_159
; %bb.158:                              ;   in Loop: Header=BB1_155 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_160
.LBB1_159:                              ;   in Loop: Header=BB1_155 Depth=1
	s_mov_b32 s1, -1
.LBB1_160:                              ; %Flow496
                                        ;   in Loop: Header=BB1_155 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_155
; %bb.161:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_165
; %bb.162:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_165
; %bb.163:                              ; %.preheader.i.i.i34.preheader
	s_mov_b32 s0, 0
.LBB1_164:                              ; %.preheader.i.i.i34
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_164
.LBB1_165:                              ; %__ockl_printf_begin.exit38
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.11@rel32@lo+4
	s_addc_u32 s1, s1, .str.11@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 35, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[18:19]
	s_mov_b32 s23, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_add_co_u32 v80, vcc_lo, 0x2f50, v49
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.12@rel32@lo+4
	s_addc_u32 s1, s1, .str.12@rel32@hi+12
	v_add_co_ci_u32_e32 v81, vcc_lo, 0, v48, vcc_lo
	v_dual_mov_b32 v38, 0 :: v_dual_mov_b32 v53, 2
	v_mov_b32_e32 v36, 33
	v_mov_b32_e32 v54, 1
	s_cmp_lg_u64 s[0:1], 0
	s_mov_b32 s22, s23
	s_cselect_b32 s24, 14, 0
.LBB1_166:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_169 Depth 2
                                        ;     Child Loop BB1_177 Depth 2
                                        ;     Child Loop BB1_183 Depth 2
                                        ;     Child Loop BB1_192 Depth 2
                                        ;     Child Loop BB1_196 Depth 2
                                        ;     Child Loop BB1_204 Depth 2
                                        ;     Child Loop BB1_210 Depth 2
                                        ;     Child Loop BB1_219 Depth 2
                                        ;     Child Loop BB1_223 Depth 2
                                        ;     Child Loop BB1_231 Depth 2
                                        ;     Child Loop BB1_237 Depth 2
                                        ;     Child Loop BB1_246 Depth 2
                                        ;     Child Loop BB1_250 Depth 2
                                        ;     Child Loop BB1_258 Depth 2
                                        ;     Child Loop BB1_264 Depth 2
                                        ;     Child Loop BB1_273 Depth 2
	s_lshl_b64 s[0:1], s[22:23], 2
	v_dual_mov_b32 v37, v50 :: v_dual_mov_b32 v4, 0
	v_add_co_u32 v0, vcc_lo, v49, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v48, vcc_lo
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, 0x2000, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_clause 0x2
	flat_load_b32 v55, v[80:81]
	flat_load_b32 v69, v[0:1] offset:3924
	flat_load_b32 v66, v[0:1] offset:3964
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_172
; %bb.167:                              ;   in Loop: Header=BB1_166 Depth=1
	global_load_b64 v[2:3], v38, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[4:5], v38, s[20:21]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB1_171
; %bb.168:                              ; %.preheader3.i.i.i51.preheader
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_mov_b32 s3, 0
.LBB1_169:                              ; %.preheader3.i.i.i51
                                        ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_169
; %bb.170:                              ; %Flow489
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_171:                              ; %Flow491
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_172:                              ; %.loopexit4.i.i.i46
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[20:21] offset:40
	global_load_b128 v[0:3], v38, s[20:21]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_174
; %bb.173:                              ;   in Loop: Header=BB1_166 Depth=1
	v_dual_mov_b32 v51, s8 :: v_dual_mov_b32 v52, v38
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s8, v1, vcc_lo
	global_store_b128 v[4:5], v[51:54], off offset:8
.LBB1_174:                              ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, s23
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s23
	s_mov_b32 s10, s23
	s_mov_b32 s11, s23
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v37, v38 :: v_dual_mov_b32 v2, s8
	v_dual_mov_b32 v39, v38 :: v_dual_mov_b32 v4, s10
	v_mov_b32_e32 v3, s9
	v_mov_b32_e32 v5, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[36:39], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_182
; %bb.175:                              ;   in Loop: Header=BB1_166 Depth=1
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB1_178
; %bb.176:                              ; %.preheader1.i.i.i49.preheader
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_mov_b32 s8, 0
.LBB1_177:                              ; %.preheader1.i.i.i49
                                        ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_177
.LBB1_178:                              ; %Flow487
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[20:21] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_180
; %bb.179:                              ;   in Loop: Header=BB1_166 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB1_180:                              ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_182
; %bb.181:                              ;   in Loop: Header=BB1_166 Depth=1
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_182:                              ; %Flow488
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_183:                              ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_185
; %bb.184:                              ;   in Loop: Header=BB1_183 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_185:                              ;   in Loop: Header=BB1_183 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_187
; %bb.186:                              ;   in Loop: Header=BB1_183 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_188
.LBB1_187:                              ;   in Loop: Header=BB1_183 Depth=2
	s_mov_b32 s1, -1
.LBB1_188:                              ; %Flow482
                                        ;   in Loop: Header=BB1_183 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_183
; %bb.189:                              ;   in Loop: Header=BB1_166 Depth=1
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_193
; %bb.190:                              ;   in Loop: Header=BB1_166 Depth=1
	s_clause 0x2
	global_load_b64 v[4:5], v38, s[20:21] offset:40
	global_load_b64 v[8:9], v38, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v38, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_193
; %bb.191:                              ; %.preheader.i.i.i48.preheader
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_mov_b32 s0, 0
.LBB1_192:                              ; %.preheader.i.i.i48
                                        ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_192
.LBB1_193:                              ; %__ockl_printf_begin.exit52
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.12@rel32@lo+4
	s_addc_u32 s1, s1, .str.12@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s24 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v6, 0
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v50 :: v_dual_mov_b32 v2, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_199
; %bb.194:                              ;   in Loop: Header=BB1_166 Depth=1
	global_load_b64 v[4:5], v38, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v8, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[2:3], v[4:5]
	s_cbranch_execz .LBB1_198
; %bb.195:                              ; %.preheader3.i.i.i58.preheader
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_mov_b32 s3, 0
.LBB1_196:                              ; %.preheader3.i.i.i58
                                        ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[20:21] offset:40
	global_load_b64 v[8:9], v38, s[20:21]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[2:3], null, v6, 24, v[8:9]
	v_and_b32_e32 v8, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v8, 24, v[3:4]
	v_mov_b32_e32 v3, v6
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_196
; %bb.197:                              ; %Flow475
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_198:                              ; %Flow477
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_199:                              ; %.loopexit4.i.i.i53
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v38, s[20:21] offset:40
	global_load_b128 v[4:7], v38, s[20:21]
	v_readfirstlane_b32 s2, v2
	v_readfirstlane_b32 s3, v3
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_201
; %bb.200:                              ;   in Loop: Header=BB1_166 Depth=1
	v_dual_mov_b32 v51, s8 :: v_dual_mov_b32 v52, v38
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v3, vcc_lo, s8, v5, vcc_lo
	global_store_b128 v[2:3], v[51:54], off offset:8
.LBB1_201:                              ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s8, s23
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v3, v8
	s_mov_b32 s9, s23
	s_mov_b32 s10, s23
	s_mov_b32 s11, s23
	v_dual_mov_b32 v3, v38 :: v_dual_add_nc_u32 v2, s22, v55
	v_and_or_b32 v0, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
	v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_209
; %bb.202:                              ;   in Loop: Header=BB1_166 Depth=1
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[20:21] offset:32 glc
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[10:13], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[12:13]
	s_cbranch_execz .LBB1_205
; %bb.203:                              ; %.preheader1.i.i.i56.preheader
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_mov_b32 s8, 0
.LBB1_204:                              ; %.preheader1.i.i.i56
                                        ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v38, v[0:3], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_204
.LBB1_205:                              ; %Flow473
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[0:1], v38, s[20:21] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB1_207
; %bb.206:                              ;   in Loop: Header=BB1_166 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[37:38], off offset:8
.LBB1_207:                              ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB1_209
; %bb.208:                              ;   in Loop: Header=BB1_166 Depth=1
	global_load_b32 v37, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_209:                              ; %Flow474
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_210:                              ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_212
; %bb.211:                              ;   in Loop: Header=BB1_210 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_212:                              ;   in Loop: Header=BB1_210 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_214
; %bb.213:                              ;   in Loop: Header=BB1_210 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_215
.LBB1_214:                              ;   in Loop: Header=BB1_210 Depth=2
	s_mov_b32 s1, -1
.LBB1_215:                              ; %Flow468
                                        ;   in Loop: Header=BB1_210 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_210
; %bb.216:                              ;   in Loop: Header=BB1_166 Depth=1
	global_load_b64 v[67:68], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_220
; %bb.217:                              ;   in Loop: Header=BB1_166 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v38, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_220
; %bb.218:                              ; %.preheader.i.i.i55.preheader
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_mov_b32 s0, 0
.LBB1_219:                              ; %.preheader.i.i.i55
                                        ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_219
.LBB1_220:                              ; %__ockl_printf_append_args.exit59
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v37, v50 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v37
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_226
; %bb.221:                              ;   in Loop: Header=BB1_166 Depth=1
	global_load_b64 v[2:3], v38, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[4:5], v38, s[20:21]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB1_225
; %bb.222:                              ; %.preheader3.i.i.i65.preheader
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_mov_b32 s3, 0
.LBB1_223:                              ; %.preheader3.i.i.i65
                                        ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_223
; %bb.224:                              ; %Flow461
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_225:                              ; %Flow463
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_226:                              ; %.loopexit4.i.i.i60
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[20:21] offset:40
	global_load_b128 v[0:3], v38, s[20:21]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_228
; %bb.227:                              ;   in Loop: Header=BB1_166 Depth=1
	v_dual_mov_b32 v51, s8 :: v_dual_mov_b32 v52, v38
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s8, v1, vcc_lo
	global_store_b128 v[4:5], v[51:54], off offset:8
.LBB1_228:                              ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, s23
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s23
	s_mov_b32 s10, s23
	s_mov_b32 s11, s23
	v_and_or_b32 v67, 0xffffff1f, v67, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_mov_b32_e32 v70, v38
	v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v5, s11
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[67:70], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_236
; %bb.229:                              ;   in Loop: Header=BB1_166 Depth=1
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB1_232
; %bb.230:                              ; %.preheader1.i.i.i63.preheader
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_mov_b32 s8, 0
.LBB1_231:                              ; %.preheader1.i.i.i63
                                        ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_231
.LBB1_232:                              ; %Flow459
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[20:21] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_234
; %bb.233:                              ;   in Loop: Header=BB1_166 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB1_234:                              ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_236
; %bb.235:                              ;   in Loop: Header=BB1_166 Depth=1
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_236:                              ; %Flow460
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_237:                              ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_239
; %bb.238:                              ;   in Loop: Header=BB1_237 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_239:                              ;   in Loop: Header=BB1_237 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_241
; %bb.240:                              ;   in Loop: Header=BB1_237 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_242
.LBB1_241:                              ;   in Loop: Header=BB1_237 Depth=2
	s_mov_b32 s1, -1
.LBB1_242:                              ; %Flow454
                                        ;   in Loop: Header=BB1_237 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_237
; %bb.243:                              ;   in Loop: Header=BB1_166 Depth=1
	global_load_b64 v[64:65], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_247
; %bb.244:                              ;   in Loop: Header=BB1_166 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v38, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_247
; %bb.245:                              ; %.preheader.i.i.i62.preheader
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_mov_b32 s0, 0
.LBB1_246:                              ; %.preheader.i.i.i62
                                        ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_246
.LBB1_247:                              ; %__ockl_printf_append_args.exit66
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v37, v50 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v37
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_253
; %bb.248:                              ;   in Loop: Header=BB1_166 Depth=1
	global_load_b64 v[2:3], v38, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[4:5], v38, s[20:21]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB1_252
; %bb.249:                              ; %.preheader3.i.i.i72.preheader
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_mov_b32 s3, 0
.LBB1_250:                              ; %.preheader3.i.i.i72
                                        ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_250
; %bb.251:                              ; %Flow447
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_252:                              ; %Flow449
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_253:                              ; %.loopexit4.i.i.i67
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[20:21] offset:40
	global_load_b128 v[0:3], v38, s[20:21]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_255
; %bb.254:                              ;   in Loop: Header=BB1_166 Depth=1
	v_dual_mov_b32 v51, s8 :: v_dual_mov_b32 v52, v38
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s8, v1, vcc_lo
	global_store_b128 v[4:5], v[51:54], off offset:8
.LBB1_255:                              ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, s23
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s23
	s_mov_b32 s10, s23
	s_mov_b32 s11, s23
	v_and_or_b32 v64, 0xffffff1d, v64, 34
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v67, v38 :: v_dual_mov_b32 v2, s8
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	v_mov_b32_e32 v5, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[64:67], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_263
; %bb.256:                              ;   in Loop: Header=BB1_166 Depth=1
	s_clause 0x1
	global_load_b64 v[10:11], v38, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[8:11], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[10:11]
	s_cbranch_execz .LBB1_259
; %bb.257:                              ; %.preheader1.i.i.i70.preheader
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_mov_b32 s8, 0
.LBB1_258:                              ; %.preheader1.i.i.i70
                                        ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_258
.LBB1_259:                              ; %Flow445
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[20:21] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_261
; %bb.260:                              ;   in Loop: Header=BB1_166 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB1_261:                              ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_263
; %bb.262:                              ;   in Loop: Header=BB1_166 Depth=1
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_263:                              ; %Flow446
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_264:                              ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_266
; %bb.265:                              ;   in Loop: Header=BB1_264 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_266:                              ;   in Loop: Header=BB1_264 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_268
; %bb.267:                              ;   in Loop: Header=BB1_264 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_269
.LBB1_268:                              ;   in Loop: Header=BB1_264 Depth=2
	s_mov_b32 s1, -1
.LBB1_269:                              ; %Flow440
                                        ;   in Loop: Header=BB1_264 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_264
; %bb.270:                              ;   in Loop: Header=BB1_166 Depth=1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_274
; %bb.271:                              ;   in Loop: Header=BB1_166 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v38, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_274
; %bb.272:                              ; %.preheader.i.i.i69.preheader
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_mov_b32 s0, 0
.LBB1_273:                              ; %.preheader.i.i.i69
                                        ;   Parent Loop BB1_166 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_273
.LBB1_274:                              ; %__ockl_printf_append_args.exit73
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s22, s22, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s22, 10
	s_cbranch_scc0 .LBB1_166
; %bb.275:
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v50
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v50
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_281
; %bb.276:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[3:4], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v6
	v_and_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[6:7]
	s_cbranch_execz .LBB1_280
; %bb.277:                              ; %.preheader3.i.i.i44.preheader
	s_mov_b32 s3, 0
.LBB1_278:                              ; %.preheader3.i.i.i44
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[8:9], v0, s[20:21]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v1, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, v4 :: v_dual_and_b32 v2, v2, v7
	v_mad_u64_u32 v[4:5], null, v2, 24, v[1:2]
	global_load_b64 v[4:5], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_278
; %bb.279:                              ; %Flow433
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_280:                              ; %Flow435
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_281:                              ; %.loopexit4.i.i.i39
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v51, 0
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[6:7], v51, s[20:21] offset:40
	global_load_b128 v[0:3], v51, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_283
; %bb.282:
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, v51
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v6, 2 :: v_dual_mov_b32 v7, 1
	global_store_b128 v[8:9], v[4:7], off offset:8
.LBB1_283:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[50:51]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v50, 33 :: v_dual_mov_b32 v53, v51
	v_mov_b32_e32 v52, v51
	v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v5, s11
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[50:53], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_291
; %bb.284:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_287
; %bb.285:                              ; %.preheader1.i.i.i42.preheader
	s_mov_b32 s8, 0
.LBB1_286:                              ; %.preheader1.i.i.i42
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_286
.LBB1_287:                              ; %Flow431
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_289
; %bb.288:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_289:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_291
; %bb.290:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_291:                              ; %Flow432
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_292:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_294
; %bb.293:                              ;   in Loop: Header=BB1_292 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_294:                              ;   in Loop: Header=BB1_292 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_296
; %bb.295:                              ;   in Loop: Header=BB1_292 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_297
.LBB1_296:                              ;   in Loop: Header=BB1_292 Depth=1
	s_mov_b32 s1, -1
.LBB1_297:                              ; %Flow426
                                        ;   in Loop: Header=BB1_292 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_292
; %bb.298:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_302
; %bb.299:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_302
; %bb.300:                              ; %.preheader.i.i.i41.preheader
	s_mov_b32 s0, 0
.LBB1_301:                              ; %.preheader.i.i.i41
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_301
.LBB1_302:                              ; %__ockl_printf_begin.exit45
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.13@rel32@lo+4
	s_addc_u32 s1, s1, .str.13@rel32@hi+12
	v_readlane_b32 s30, v40, 0
	s_cmp_lg_u64 s[0:1], 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v2, s0
	s_cselect_b32 s4, 39, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v4, s4
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[18:19]
	v_readlane_b32 s31, v40, 1
	s_or_saveexec_b32 s0, -1
	scratch_load_b32 v40, off, s33          ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s0
	s_add_i32 s32, s32, -16
	s_mov_b32 s33, s25
	s_setpc_b64 s[2:3]
.Lfunc_end1:
	.size	_ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv, .Lfunc_end1-_ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 15724
; NumSgprs: 36
; NumVgprs: 82
; ScratchSize: 16
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function _ZN10gpu_ginkgo5Order13showOrderInfoEv
	.type	_ZN10gpu_ginkgo5Order13showOrderInfoEv,@function
_ZN10gpu_ginkgo5Order13showOrderInfoEv: ; @_ZN10gpu_ginkgo5Order13showOrderInfoEv
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_mov_b32 s21, s33
	s_mov_b32 s33, s32
	s_or_saveexec_b32 s0, -1
	scratch_store_b32 off, v40, s33         ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s0
	v_writelane_b32 v40, s30, 0
	s_add_i32 s32, s32, 16
	v_writelane_b32 v40, s31, 1
	s_load_b64 s[22:23], s[8:9], 0x50
	v_mbcnt_lo_u32_b32 v52, -1, 0
	v_mov_b32_e32 v6, 0
	v_dual_mov_b32 v38, v31 :: v_dual_mov_b32 v37, v1
	v_dual_mov_b32 v36, v0 :: v_dual_mov_b32 v7, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v52
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_mov_b64 s[18:19], s[8:9]
	s_mov_b32 s20, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_6
; %bb.1:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[22:23] offset:40
	global_load_b64 v[5:6], v0, s[22:23]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB2_5
; %bb.2:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB2_3:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[22:23] offset:40
	global_load_b64 v[10:11], v0, s[22:23]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_3
; %bb.4:                                ; %Flow514
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_5:                                ; %Flow516
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_6:                                ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[22:23] offset:40
	global_load_b128 v[0:3], v5, s[22:23]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_8
; %bb.7:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB2_8:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_15
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[22:23] offset:32 glc
	global_load_b64 v[2:3], v10, s[22:23] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB2_11
.LBB2_10:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_10
.LBB2_11:                               ; %Flow512
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[22:23] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_13
; %bb.12:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB2_13:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_15
; %bb.14:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_15:                               ; %Flow513
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_16:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_18
; %bb.17:                               ;   in Loop: Header=BB2_16 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_18:                               ;   in Loop: Header=BB2_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_20
; %bb.19:                               ;   in Loop: Header=BB2_16 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_21
.LBB2_20:                               ;   in Loop: Header=BB2_16 Depth=1
	s_mov_b32 s1, -1
.LBB2_21:                               ; %Flow507
                                        ;   in Loop: Header=BB2_16 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_16
; %bb.22:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_26
; %bb.23:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[22:23] offset:40
	global_load_b64 v[9:10], v8, s[22:23] offset:24 glc
	global_load_b64 v[6:7], v8, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_26
; %bb.24:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB2_25:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_25
.LBB2_26:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.17@rel32@lo+4
	s_addc_u32 s1, s1, .str.17@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s4, 33, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v2, v52
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v2
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_32
; %bb.27:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v3, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[22:23] offset:40
	global_load_b64 v[8:9], v3, s[22:23]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB2_31
; %bb.28:                               ; %.preheader3.i.i.i6.preheader
	s_mov_b32 s3, 0
.LBB2_29:                               ; %.preheader3.i.i.i6
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[22:23] offset:40
	global_load_b64 v[10:11], v3, s[22:23]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_29
; %bb.30:                               ; %Flow500
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_31:                               ; %Flow502
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_32:                               ; %.loopexit4.i.i.i1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s2, v8
	v_readfirstlane_b32 s3, v9
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[22:23] offset:40
	global_load_b128 v[4:7], v3, s[22:23]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_34
; %bb.33:
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, v3
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v13, vcc_lo, s8, v5, vcc_lo
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB2_34:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v0, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_mov_b32_e32 v2, s20
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v11, s11
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_42
; %bb.35:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[22:23] offset:32 glc
	global_load_b64 v[0:1], v10, s[22:23] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB2_38
; %bb.36:                               ; %.preheader1.i.i.i4.preheader
	s_mov_b32 s8, 0
.LBB2_37:                               ; %.preheader1.i.i.i4
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_37
.LBB2_38:                               ; %Flow498
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[22:23] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_40
; %bb.39:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB2_40:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_42
; %bb.41:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_42:                               ; %Flow499
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_43:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_45
; %bb.44:                               ;   in Loop: Header=BB2_43 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_45:                               ;   in Loop: Header=BB2_43 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_47
; %bb.46:                               ;   in Loop: Header=BB2_43 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_48
.LBB2_47:                               ;   in Loop: Header=BB2_43 Depth=1
	s_mov_b32 s1, -1
.LBB2_48:                               ; %Flow493
                                        ;   in Loop: Header=BB2_43 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_43
; %bb.49:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_53
; %bb.50:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[22:23] offset:40
	global_load_b64 v[9:10], v8, s[22:23] offset:24 glc
	global_load_b64 v[6:7], v8, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_53
; %bb.51:                               ; %.preheader.i.i.i3.preheader
	s_mov_b32 s0, 0
.LBB2_52:                               ; %.preheader.i.i.i3
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_52
.LBB2_53:                               ; %__ockl_printf_append_args.exit
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v2, v52
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v2
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_59
; %bb.54:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v3, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[22:23] offset:40
	global_load_b64 v[8:9], v3, s[22:23]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB2_58
; %bb.55:                               ; %.preheader3.i.i.i12.preheader
	s_mov_b32 s3, 0
.LBB2_56:                               ; %.preheader3.i.i.i12
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[22:23] offset:40
	global_load_b64 v[10:11], v3, s[22:23]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_56
; %bb.57:                               ; %Flow486
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_58:                               ; %Flow488
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_59:                               ; %.loopexit4.i.i.i7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s2, v8
	v_readfirstlane_b32 s3, v9
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[22:23] offset:40
	global_load_b128 v[4:7], v3, s[22:23]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_61
; %bb.60:
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, v3
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v13, vcc_lo, s8, v5, vcc_lo
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB2_61:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v6, v8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_b32_e32 v2, 0x3ff, v38
	v_and_or_b32 v0, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v11, vcc_lo, v7, v9, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v9, s11
	v_dual_mov_b32 v7, s9 :: v_dual_mov_b32 v8, s10
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_69
; %bb.62:
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[22:23] offset:32 glc
	global_load_b64 v[0:1], v8, s[22:23] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[11:12]
	s_cbranch_execz .LBB2_65
; %bb.63:                               ; %.preheader1.i.i.i10.preheader
	s_mov_b32 s8, 0
.LBB2_64:                               ; %.preheader1.i.i.i10
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[6:7], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_64
.LBB2_65:                               ; %Flow484
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[22:23] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_67
; %bb.66:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB2_67:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_69
; %bb.68:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_69:                               ; %Flow485
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_70:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_72
; %bb.71:                               ;   in Loop: Header=BB2_70 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_72:                               ;   in Loop: Header=BB2_70 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_74
; %bb.73:                               ;   in Loop: Header=BB2_70 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_75
.LBB2_74:                               ;   in Loop: Header=BB2_70 Depth=1
	s_mov_b32 s1, -1
.LBB2_75:                               ; %Flow479
                                        ;   in Loop: Header=BB2_70 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_70
; %bb.76:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_80
; %bb.77:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[22:23] offset:40
	global_load_b64 v[7:8], v6, s[22:23] offset:24 glc
	global_load_b64 v[4:5], v6, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_80
; %bb.78:                               ; %.preheader.i.i.i9.preheader
	s_mov_b32 s0, 0
.LBB2_79:                               ; %.preheader.i.i.i9
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_79
.LBB2_80:                               ; %__ockl_printf_append_args.exit13
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	flat_load_b128 v[48:51], v[36:37]
	flat_load_b96 v[36:38], v[36:37] offset:16
	v_mov_b32_e32 v4, v52
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_86
; %bb.81:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[22:23] offset:40
	global_load_b64 v[5:6], v0, s[22:23]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB2_85
; %bb.82:                               ; %.preheader3.i.i.i19.preheader
	s_mov_b32 s3, 0
.LBB2_83:                               ; %.preheader3.i.i.i19
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[22:23] offset:40
	global_load_b64 v[10:11], v0, s[22:23]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_83
; %bb.84:                               ; %Flow472
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_85:                               ; %Flow474
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_86:                               ; %.loopexit4.i.i.i14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[22:23] offset:40
	global_load_b128 v[0:3], v5, s[22:23]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_88
; %bb.87:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB2_88:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_96
; %bb.89:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[22:23] offset:32 glc
	global_load_b64 v[2:3], v10, s[22:23] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB2_92
; %bb.90:                               ; %.preheader1.i.i.i17.preheader
	s_mov_b32 s8, 0
.LBB2_91:                               ; %.preheader1.i.i.i17
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_91
.LBB2_92:                               ; %Flow470
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[22:23] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_94
; %bb.93:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB2_94:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_96
; %bb.95:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_96:                               ; %Flow471
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_97:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_99
; %bb.98:                               ;   in Loop: Header=BB2_97 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_99:                               ;   in Loop: Header=BB2_97 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_101
; %bb.100:                              ;   in Loop: Header=BB2_97 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_102
.LBB2_101:                              ;   in Loop: Header=BB2_97 Depth=1
	s_mov_b32 s1, -1
.LBB2_102:                              ; %Flow465
                                        ;   in Loop: Header=BB2_97 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_97
; %bb.103:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_107
; %bb.104:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[22:23] offset:40
	global_load_b64 v[9:10], v8, s[22:23] offset:24 glc
	global_load_b64 v[6:7], v8, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_107
; %bb.105:                              ; %.preheader.i.i.i16.preheader
	s_mov_b32 s0, 0
.LBB2_106:                              ; %.preheader.i.i.i16
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_106
.LBB2_107:                              ; %__ockl_printf_begin.exit20
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.18@rel32@lo+4
	s_addc_u32 s1, s1, .str.18@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u64 s[0:1], 0
	s_mov_b64 s[0:1], 0
	s_cbranch_scc1 .LBB2_111
; %bb.108:                              ; %.preheader.preheader
	v_mov_b32_e32 v2, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.18@rel32@lo+3
	s_addc_u32 s1, s1, .str.18@rel32@hi+11
.LBB2_109:                              ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	global_load_u8 v3, v2, s[0:1] offset:1
	s_add_u32 s2, s0, 1
	s_addc_u32 s3, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b64 s[0:1], s[2:3]
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, 0, v3
	s_cbranch_vccnz .LBB2_109
; %bb.110:
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.18@rel32@lo+4
	s_addc_u32 s1, s1, .str.18@rel32@hi+12
	s_sub_u32 s0, s2, s0
	s_subb_u32 s1, s3, s1
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
.LBB2_111:
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, .str.18@rel32@lo+4
	s_addc_u32 s3, s3, .str.18@rel32@hi+12
	v_dual_mov_b32 v39, 0 :: v_dual_mov_b32 v2, s2
	v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v4, s0
	v_dual_mov_b32 v5, s1 :: v_dual_mov_b32 v6, 0
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s5, s5, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[4:5]
	v_mov_b32_e32 v2, v52
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v2
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_117
; %bb.112:
	global_load_b64 v[5:6], v39, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[3:4], v39, s[22:23] offset:40
	global_load_b64 v[7:8], v39, s[22:23]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v9, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v9, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v7, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v39, v[3:6], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[5:6]
	s_cbranch_execz .LBB2_116
; %bb.113:                              ; %.preheader3.i.i.i26.preheader
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
.LBB2_114:                              ; %.preheader3.i.i.i26
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[22:23] offset:40
	global_load_b64 v[10:11], v3, s[22:23]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_114
; %bb.115:                              ; %Flow457
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_116:                              ; %Flow459
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_117:                              ; %.loopexit4.i.i.i21
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[10:11], v39, s[22:23] offset:40
	global_load_b128 v[4:7], v39, s[22:23]
	v_readfirstlane_b32 s2, v8
	v_readfirstlane_b32 s3, v9
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_119
; %bb.118:
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, 0
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v13, vcc_lo, s8, v5, vcc_lo
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB2_119:
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v3, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	v_and_or_b32 v0, 0xffffff1f, v0, 32
	s_mov_b32 s9, s8
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v2, v8
	v_mov_b32_e32 v2, v48
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, s9
	v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, s11
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_127
; %bb.120:
	s_clause 0x1
	global_load_b64 v[14:15], v3, s[22:23] offset:32 glc
	global_load_b64 v[0:1], v3, s[22:23] offset:40
	v_dual_mov_b32 v12, s2 :: v_dual_mov_b32 v13, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v0, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[0:1], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v3, v[12:15], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[8:9], v[14:15]
	s_cbranch_execz .LBB2_123
; %bb.121:                              ; %.preheader1.i.i.i24.preheader
	s_mov_b32 s8, 0
.LBB2_122:                              ; %.preheader1.i.i.i24
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v7, s3
	s_sleep 1
	global_store_b64 v[0:1], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v3, v[6:9], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_122
.LBB2_123:                              ; %Flow455
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[22:23] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_125
; %bb.124:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB2_125:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_127
; %bb.126:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_127:                              ; %Flow456
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_128:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_130
; %bb.129:                              ;   in Loop: Header=BB2_128 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_130:                              ;   in Loop: Header=BB2_128 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_132
; %bb.131:                              ;   in Loop: Header=BB2_128 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_133
.LBB2_132:                              ;   in Loop: Header=BB2_128 Depth=1
	s_mov_b32 s1, -1
.LBB2_133:                              ; %Flow450
                                        ;   in Loop: Header=BB2_128 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_128
; %bb.134:
	global_load_b64 v[0:1], v[10:11], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_138
; %bb.135:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[22:23] offset:40
	global_load_b64 v[9:10], v8, s[22:23] offset:24 glc
	global_load_b64 v[6:7], v8, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_138
; %bb.136:                              ; %.preheader.i.i.i23.preheader
	s_mov_b32 s0, 0
.LBB2_137:                              ; %.preheader.i.i.i23
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_137
.LBB2_138:                              ; %__ockl_printf_append_args.exit27
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v2, v52
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v2
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_144
; %bb.139:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v3, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[22:23] offset:40
	global_load_b64 v[8:9], v3, s[22:23]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB2_143
; %bb.140:                              ; %.preheader3.i.i.i33.preheader
	s_mov_b32 s3, 0
.LBB2_141:                              ; %.preheader3.i.i.i33
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[22:23] offset:40
	global_load_b64 v[10:11], v3, s[22:23]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_141
; %bb.142:                              ; %Flow443
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_143:                              ; %Flow445
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_144:                              ; %.loopexit4.i.i.i28
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s2, v8
	v_readfirstlane_b32 s3, v9
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[22:23] offset:40
	global_load_b128 v[4:7], v3, s[22:23]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_146
; %bb.145:
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, v3
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v13, vcc_lo, s8, v5, vcc_lo
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB2_146:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v0, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_mov_b32_e32 v2, v49
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v11, s11
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_154
; %bb.147:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[22:23] offset:32 glc
	global_load_b64 v[0:1], v10, s[22:23] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB2_150
; %bb.148:                              ; %.preheader1.i.i.i31.preheader
	s_mov_b32 s8, 0
.LBB2_149:                              ; %.preheader1.i.i.i31
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_149
.LBB2_150:                              ; %Flow441
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[22:23] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_152
; %bb.151:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB2_152:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_154
; %bb.153:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_154:                              ; %Flow442
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_155:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_157
; %bb.156:                              ;   in Loop: Header=BB2_155 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_157:                              ;   in Loop: Header=BB2_155 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_159
; %bb.158:                              ;   in Loop: Header=BB2_155 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_160
.LBB2_159:                              ;   in Loop: Header=BB2_155 Depth=1
	s_mov_b32 s1, -1
.LBB2_160:                              ; %Flow436
                                        ;   in Loop: Header=BB2_155 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_155
; %bb.161:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_165
; %bb.162:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[22:23] offset:40
	global_load_b64 v[9:10], v8, s[22:23] offset:24 glc
	global_load_b64 v[6:7], v8, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_165
; %bb.163:                              ; %.preheader.i.i.i30.preheader
	s_mov_b32 s0, 0
.LBB2_164:                              ; %.preheader.i.i.i30
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_164
.LBB2_165:                              ; %__ockl_printf_append_args.exit34
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v2, v52
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v2
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_171
; %bb.166:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v3, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[22:23] offset:40
	global_load_b64 v[8:9], v3, s[22:23]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB2_170
; %bb.167:                              ; %.preheader3.i.i.i40.preheader
	s_mov_b32 s3, 0
.LBB2_168:                              ; %.preheader3.i.i.i40
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[22:23] offset:40
	global_load_b64 v[10:11], v3, s[22:23]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_168
; %bb.169:                              ; %Flow429
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_170:                              ; %Flow431
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_171:                              ; %.loopexit4.i.i.i35
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s2, v8
	v_readfirstlane_b32 s3, v9
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[22:23] offset:40
	global_load_b128 v[4:7], v3, s[22:23]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_173
; %bb.172:
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, v3
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v13, vcc_lo, s8, v5, vcc_lo
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB2_173:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v0, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_mov_b32_e32 v2, v50
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v11, s11
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_181
; %bb.174:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[22:23] offset:32 glc
	global_load_b64 v[0:1], v10, s[22:23] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB2_177
; %bb.175:                              ; %.preheader1.i.i.i38.preheader
	s_mov_b32 s8, 0
.LBB2_176:                              ; %.preheader1.i.i.i38
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_176
.LBB2_177:                              ; %Flow427
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[22:23] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_179
; %bb.178:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB2_179:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_181
; %bb.180:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_181:                              ; %Flow428
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_182:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_184
; %bb.183:                              ;   in Loop: Header=BB2_182 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_184:                              ;   in Loop: Header=BB2_182 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_186
; %bb.185:                              ;   in Loop: Header=BB2_182 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_187
.LBB2_186:                              ;   in Loop: Header=BB2_182 Depth=1
	s_mov_b32 s1, -1
.LBB2_187:                              ; %Flow422
                                        ;   in Loop: Header=BB2_182 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_182
; %bb.188:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_192
; %bb.189:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[22:23] offset:40
	global_load_b64 v[9:10], v8, s[22:23] offset:24 glc
	global_load_b64 v[6:7], v8, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_192
; %bb.190:                              ; %.preheader.i.i.i37.preheader
	s_mov_b32 s0, 0
.LBB2_191:                              ; %.preheader.i.i.i37
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_191
.LBB2_192:                              ; %__ockl_printf_append_args.exit41
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v2, v52
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v2
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_198
; %bb.193:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v3, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[22:23] offset:40
	global_load_b64 v[8:9], v3, s[22:23]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB2_197
; %bb.194:                              ; %.preheader3.i.i.i47.preheader
	s_mov_b32 s3, 0
.LBB2_195:                              ; %.preheader3.i.i.i47
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[22:23] offset:40
	global_load_b64 v[10:11], v3, s[22:23]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_195
; %bb.196:                              ; %Flow415
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_197:                              ; %Flow417
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_198:                              ; %.loopexit4.i.i.i42
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s2, v8
	v_readfirstlane_b32 s3, v9
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[22:23] offset:40
	global_load_b128 v[4:7], v3, s[22:23]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_200
; %bb.199:
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, v3
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v13, vcc_lo, s8, v5, vcc_lo
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB2_200:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v0, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_mov_b32_e32 v2, v51
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v11, s11
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_208
; %bb.201:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[22:23] offset:32 glc
	global_load_b64 v[0:1], v10, s[22:23] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB2_204
; %bb.202:                              ; %.preheader1.i.i.i45.preheader
	s_mov_b32 s8, 0
.LBB2_203:                              ; %.preheader1.i.i.i45
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_203
.LBB2_204:                              ; %Flow413
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[22:23] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_206
; %bb.205:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB2_206:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_208
; %bb.207:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_208:                              ; %Flow414
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_209:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_211
; %bb.210:                              ;   in Loop: Header=BB2_209 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_211:                              ;   in Loop: Header=BB2_209 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_213
; %bb.212:                              ;   in Loop: Header=BB2_209 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_214
.LBB2_213:                              ;   in Loop: Header=BB2_209 Depth=1
	s_mov_b32 s1, -1
.LBB2_214:                              ; %Flow408
                                        ;   in Loop: Header=BB2_209 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_209
; %bb.215:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_219
; %bb.216:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[22:23] offset:40
	global_load_b64 v[9:10], v8, s[22:23] offset:24 glc
	global_load_b64 v[6:7], v8, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_219
; %bb.217:                              ; %.preheader.i.i.i44.preheader
	s_mov_b32 s0, 0
.LBB2_218:                              ; %.preheader.i.i.i44
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_218
.LBB2_219:                              ; %__ockl_printf_append_args.exit48
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v2, v52
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v2
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_225
; %bb.220:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v3, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[22:23] offset:40
	global_load_b64 v[8:9], v3, s[22:23]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB2_224
; %bb.221:                              ; %.preheader3.i.i.i54.preheader
	s_mov_b32 s3, 0
.LBB2_222:                              ; %.preheader3.i.i.i54
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[22:23] offset:40
	global_load_b64 v[10:11], v3, s[22:23]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_222
; %bb.223:                              ; %Flow401
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_224:                              ; %Flow403
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_225:                              ; %.loopexit4.i.i.i49
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s2, v8
	v_readfirstlane_b32 s3, v9
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[22:23] offset:40
	global_load_b128 v[4:7], v3, s[22:23]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_227
; %bb.226:
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, v3
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v13, vcc_lo, s8, v5, vcc_lo
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB2_227:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v0, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_mov_b32_e32 v2, v36
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v11, s11
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_235
; %bb.228:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[22:23] offset:32 glc
	global_load_b64 v[0:1], v10, s[22:23] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB2_231
; %bb.229:                              ; %.preheader1.i.i.i52.preheader
	s_mov_b32 s8, 0
.LBB2_230:                              ; %.preheader1.i.i.i52
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_230
.LBB2_231:                              ; %Flow399
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[22:23] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_233
; %bb.232:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB2_233:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_235
; %bb.234:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_235:                              ; %Flow400
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_236:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_238
; %bb.237:                              ;   in Loop: Header=BB2_236 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_238:                              ;   in Loop: Header=BB2_236 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_240
; %bb.239:                              ;   in Loop: Header=BB2_236 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_241
.LBB2_240:                              ;   in Loop: Header=BB2_236 Depth=1
	s_mov_b32 s1, -1
.LBB2_241:                              ; %Flow394
                                        ;   in Loop: Header=BB2_236 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_236
; %bb.242:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_246
; %bb.243:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[22:23] offset:40
	global_load_b64 v[9:10], v8, s[22:23] offset:24 glc
	global_load_b64 v[6:7], v8, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_246
; %bb.244:                              ; %.preheader.i.i.i51.preheader
	s_mov_b32 s0, 0
.LBB2_245:                              ; %.preheader.i.i.i51
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_245
.LBB2_246:                              ; %__ockl_printf_append_args.exit55
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v8, v52
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v8
	v_cmp_eq_u32_e64 s0, s0, v8
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_252
; %bb.247:
	v_mov_b32_e32 v4, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[11:12], v4, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v4, s[22:23] offset:40
	global_load_b64 v[5:6], v4, s[22:23]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v12
	v_and_b32_e32 v2, v2, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v7, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v7, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v5, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v6, v3, vcc_lo
	global_load_b64 v[9:10], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v4, v[9:12], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[2:3], v[11:12]
	s_cbranch_execz .LBB2_251
; %bb.248:                              ; %.preheader3.i.i.i61.preheader
	s_mov_b32 s3, 0
.LBB2_249:                              ; %.preheader3.i.i.i61
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[5:6], v4, s[22:23] offset:40
	global_load_b64 v[9:10], v4, s[22:23]
	v_dual_mov_b32 v12, v3 :: v_dual_mov_b32 v11, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v5, v5, v11
	v_and_b32_e32 v7, v6, v12
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v5, 24, v[9:10]
	v_mad_u64_u32 v[5:6], null, v7, 24, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v3, v5
	global_load_b64 v[9:10], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v4, v[9:12], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[11:12]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_249
; %bb.250:                              ; %Flow387
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_251:                              ; %Flow389
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_252:                              ; %.loopexit4.i.i.i56
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v9, 0
	v_readfirstlane_b32 s2, v2
	v_readfirstlane_b32 s3, v3
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[10:11], v9, s[22:23] offset:40
	global_load_b128 v[4:7], v9, s[22:23]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_254
; %bb.253:
	v_dual_mov_b32 v10, s8 :: v_dual_mov_b32 v11, v9
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v3, vcc_lo, s8, v5, vcc_lo
	v_dual_mov_b32 v12, 2 :: v_dual_mov_b32 v13, 1
	global_store_b128 v[2:3], v[10:13], off offset:8
.LBB2_254:
	s_or_b32 exec_lo, exec_lo, s9
	v_cvt_f64_f32_e32 v[2:3], v37
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[8:9]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v6, v8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v0, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
	v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_262
; %bb.255:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[22:23] offset:32 glc
	global_load_b64 v[0:1], v10, s[22:23] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB2_258
; %bb.256:                              ; %.preheader1.i.i.i59.preheader
	s_mov_b32 s8, 0
.LBB2_257:                              ; %.preheader1.i.i.i59
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_257
.LBB2_258:                              ; %Flow385
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[22:23] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_260
; %bb.259:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB2_260:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_262
; %bb.261:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_262:                              ; %Flow386
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_263:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_265
; %bb.264:                              ;   in Loop: Header=BB2_263 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_265:                              ;   in Loop: Header=BB2_263 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_267
; %bb.266:                              ;   in Loop: Header=BB2_263 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_268
.LBB2_267:                              ;   in Loop: Header=BB2_263 Depth=1
	s_mov_b32 s1, -1
.LBB2_268:                              ; %Flow380
                                        ;   in Loop: Header=BB2_263 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_263
; %bb.269:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_273
; %bb.270:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[22:23] offset:40
	global_load_b64 v[9:10], v8, s[22:23] offset:24 glc
	global_load_b64 v[6:7], v8, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_273
; %bb.271:                              ; %.preheader.i.i.i58.preheader
	s_mov_b32 s0, 0
.LBB2_272:                              ; %.preheader.i.i.i58
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_272
.LBB2_273:                              ; %__ockl_printf_append_args.exit62
	s_or_b32 exec_lo, exec_lo, s1
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v52
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v52
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_279
; %bb.274:
	v_mov_b32_e32 v4, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[7:8], v4, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v4, s[22:23] offset:40
	global_load_b64 v[5:6], v4, s[22:23]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v8
	v_and_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v5, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v6, v3, vcc_lo
	global_load_b64 v[5:6], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v4, v[5:8], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[2:3], v[7:8]
	s_cbranch_execz .LBB2_278
; %bb.275:                              ; %.preheader3.i.i.i68.preheader
	s_mov_b32 s3, 0
.LBB2_276:                              ; %.preheader3.i.i.i68
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[5:6], v4, s[22:23] offset:40
	global_load_b64 v[9:10], v4, s[22:23]
	v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v7, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[2:3], null, v5, 24, v[9:10]
	v_and_b32_e32 v9, v6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v9, 24, v[3:4]
	v_mov_b32_e32 v3, v5
	global_load_b64 v[5:6], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v4, v[5:8], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_276
; %bb.277:                              ; %Flow373
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_278:                              ; %Flow375
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_279:                              ; %.loopexit4.i.i.i63
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v53, 0
	v_readfirstlane_b32 s2, v2
	v_readfirstlane_b32 s3, v3
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v53, s[22:23] offset:40
	global_load_b128 v[4:7], v53, s[22:23]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_281
; %bb.280:
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, v53
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v3, vcc_lo, s8, v5, vcc_lo
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[2:3], v[8:11], off offset:8
.LBB2_281:
	s_or_b32 exec_lo, exec_lo, s9
	v_cvt_f64_f32_e32 v[2:3], v38
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[52:53]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v6, v8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v0, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v11, vcc_lo, v7, v9, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, s9
	v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, s11
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_289
; %bb.282:
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[22:23] offset:32 glc
	global_load_b64 v[0:1], v8, s[22:23] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[11:12]
	s_cbranch_execz .LBB2_285
; %bb.283:                              ; %.preheader1.i.i.i66.preheader
	s_mov_b32 s8, 0
.LBB2_284:                              ; %.preheader1.i.i.i66
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[6:7], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_284
.LBB2_285:                              ; %Flow371
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[22:23] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_287
; %bb.286:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB2_287:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_289
; %bb.288:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_289:                              ; %Flow372
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_290:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_292
; %bb.291:                              ;   in Loop: Header=BB2_290 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_292:                              ;   in Loop: Header=BB2_290 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_294
; %bb.293:                              ;   in Loop: Header=BB2_290 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_295
.LBB2_294:                              ;   in Loop: Header=BB2_290 Depth=1
	s_mov_b32 s1, -1
.LBB2_295:                              ; %Flow366
                                        ;   in Loop: Header=BB2_290 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_290
; %bb.296:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_300
; %bb.297:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[22:23] offset:40
	global_load_b64 v[7:8], v6, s[22:23] offset:24 glc
	global_load_b64 v[4:5], v6, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_300
; %bb.298:                              ; %.preheader.i.i.i65.preheader
	s_mov_b32 s0, 0
.LBB2_299:                              ; %.preheader.i.i.i65
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_299
.LBB2_300:                              ; %__ockl_printf_append_args.exit69
	s_or_b32 exec_lo, exec_lo, s1
	v_readlane_b32 s30, v40, 0
	v_readlane_b32 s31, v40, 1
	s_or_saveexec_b32 s0, -1
	scratch_load_b32 v40, off, s33          ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s0
	s_add_i32 s32, s32, -16
	s_mov_b32 s33, s21
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end2:
	.size	_ZN10gpu_ginkgo5Order13showOrderInfoEv, .Lfunc_end2-_ZN10gpu_ginkgo5Order13showOrderInfoEv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 15388
; NumSgprs: 36
; NumVgprs: 54
; ScratchSize: 16
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv
	.type	_ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv,@function
_ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv: ; @_ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_mov_b32 s0, s33
	s_mov_b32 s33, s32
	s_or_saveexec_b32 s1, -1
	scratch_store_b32 off, v41, s33 offset:4 ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s1
	v_writelane_b32 v41, s0, 4
	s_add_i32 s32, s32, 16
	scratch_store_b32 off, v40, s33         ; 4-byte Folded Spill
	v_writelane_b32 v41, s34, 0
	v_writelane_b32 v41, s35, 1
	v_writelane_b32 v41, s30, 2
	v_writelane_b32 v41, s31, 3
	s_load_b64 s[28:29], s[8:9], 0x50
	v_mbcnt_lo_u32_b32 v65, -1, 0
	v_mov_b32_e32 v6, 0
	v_dual_mov_b32 v64, v31 :: v_dual_mov_b32 v55, v1
	v_dual_mov_b32 v54, v0 :: v_dual_mov_b32 v7, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v65
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_mov_b64 s[24:25], s[8:9]
	s_mov_b32 s26, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_6
; %bb.1:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[5:6], v0, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB3_5
; %bb.2:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB3_3:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[10:11], v0, s[28:29]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_3
; %bb.4:                                ; %Flow140
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_5:                                ; %Flow142
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_6:                                ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[28:29] offset:40
	global_load_b128 v[0:3], v5, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_8
; %bb.7:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB3_8:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_15
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v10, s[28:29] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB3_11
.LBB3_10:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_10
.LBB3_11:                               ; %Flow138
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB3_13
; %bb.12:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB3_13:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB3_15
; %bb.14:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_15:                               ; %Flow139
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_16:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_18
; %bb.17:                               ;   in Loop: Header=BB3_16 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_18:                               ;   in Loop: Header=BB3_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_20
; %bb.19:                               ;   in Loop: Header=BB3_16 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_21
.LBB3_20:                               ;   in Loop: Header=BB3_16 Depth=1
	s_mov_b32 s1, -1
.LBB3_21:                               ; %Flow133
                                        ;   in Loop: Header=BB3_16 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_16
; %bb.22:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_26
; %bb.23:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[28:29] offset:40
	global_load_b64 v[9:10], v8, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v8, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_26
; %bb.24:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB3_25:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_25
.LBB3_26:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.14@rel32@lo+4
	s_addc_u32 s1, s1, .str.14@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 39, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[24:25]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	flat_load_b32 v0, v[54:55] offset:4028
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v0
	s_xor_b32 s27, exec_lo, s0
	s_cbranch_execz .LBB3_31
; %bb.27:
	flat_load_b64 v[0:1], v[54:55] offset:4020
	s_mov_b32 s34, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v3, 31, v0
	v_mov_b32_e32 v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, v54, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v55, v3, vcc_lo
	flat_load_b32 v66, v[2:3] offset:3208
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v66, v1
	s_cbranch_execz .LBB3_30
; %bb.28:                               ; %.lr.ph.preheader
	s_mov_b32 s35, 0
.LBB3_29:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_mad_i64_i32 v[0:1], null, v66, 28, v[54:55]
	v_mov_b32_e32 v31, v64
	s_mov_b64 s[8:9], s[24:25]
	s_mov_b32 s12, s26
	v_ashrrev_i32_e32 v67, 31, v66
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo5Order13showOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo5Order13showOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_lshlrev_b64 v[0:1], 2, v[66:67]
	v_add_co_u32 v0, vcc_lo, v54, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v55, v1, vcc_lo
	s_clause 0x1
	flat_load_b32 v66, v[0:1] offset:3208
	flat_load_b32 v0, v[54:55] offset:4024
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v66, v0
	s_or_b32 s35, vcc_lo, s35
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB3_29
.LBB3_30:                               ; %Flow112
	s_or_b32 exec_lo, exec_lo, s34
.LBB3_31:                               ; %Flow127
	s_and_not1_saveexec_b32 s18, s27
	s_cbranch_execz .LBB3_60
; %bb.32:
	v_mov_b32_e32 v4, v65
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_38
; %bb.33:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[5:6], v0, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB3_37
; %bb.34:                               ; %.preheader3.i.i.i6.preheader
	s_mov_b32 s3, 0
.LBB3_35:                               ; %.preheader3.i.i.i6
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[10:11], v0, s[28:29]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_35
; %bb.36:                               ; %Flow124
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_37:                               ; %Flow126
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_38:                               ; %.loopexit4.i.i.i1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[28:29] offset:40
	global_load_b128 v[0:3], v5, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_40
; %bb.39:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB3_40:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_48
; %bb.41:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v10, s[28:29] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB3_44
; %bb.42:                               ; %.preheader1.i.i.i4.preheader
	s_mov_b32 s8, 0
.LBB3_43:                               ; %.preheader1.i.i.i4
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_43
.LBB3_44:                               ; %Flow122
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB3_46
; %bb.45:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB3_46:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB3_48
; %bb.47:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_48:                               ; %Flow123
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_49:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_51
; %bb.50:                               ;   in Loop: Header=BB3_49 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_51:                               ;   in Loop: Header=BB3_49 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_53
; %bb.52:                               ;   in Loop: Header=BB3_49 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_54
.LBB3_53:                               ;   in Loop: Header=BB3_49 Depth=1
	s_mov_b32 s1, -1
.LBB3_54:                               ; %Flow117
                                        ;   in Loop: Header=BB3_49 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_49
; %bb.55:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_59
; %bb.56:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[28:29] offset:40
	global_load_b64 v[9:10], v8, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v8, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_59
; %bb.57:                               ; %.preheader.i.i.i3.preheader
	s_mov_b32 s0, 0
.LBB3_58:                               ; %.preheader.i.i.i3
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_58
.LBB3_59:                               ; %__ockl_printf_begin.exit7
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.15@rel32@lo+4
	s_addc_u32 s1, s1, .str.15@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 28, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[24:25]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
.LBB3_60:                               ; %Flow128
	s_or_b32 exec_lo, exec_lo, s18
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v65
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v65
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_66
; %bb.61:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v0, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[3:4], v0, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v6
	v_and_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[6:7]
	s_cbranch_execz .LBB3_65
; %bb.62:                               ; %.preheader3.i.i.i13.preheader
	s_mov_b32 s3, 0
.LBB3_63:                               ; %.preheader3.i.i.i13
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[8:9], v0, s[28:29]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v1, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, v4 :: v_dual_and_b32 v2, v2, v7
	v_mad_u64_u32 v[4:5], null, v2, 24, v[1:2]
	global_load_b64 v[4:5], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_63
; %bb.64:                               ; %Flow108
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_65:                               ; %Flow110
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_66:                               ; %.loopexit4.i.i.i8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v66, 0
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[6:7], v66, s[28:29] offset:40
	global_load_b128 v[0:3], v66, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_68
; %bb.67:
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, v66
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v6, 2 :: v_dual_mov_b32 v7, 1
	global_store_b128 v[8:9], v[4:7], off offset:8
.LBB3_68:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[65:66]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v65, 33 :: v_dual_mov_b32 v68, v66
	v_dual_mov_b32 v67, v66 :: v_dual_mov_b32 v2, s8
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	v_mov_b32_e32 v5, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[65:68], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_76
; %bb.69:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v10, s[28:29] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB3_72
; %bb.70:                               ; %.preheader1.i.i.i11.preheader
	s_mov_b32 s8, 0
.LBB3_71:                               ; %.preheader1.i.i.i11
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_71
.LBB3_72:                               ; %Flow106
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB3_74
; %bb.73:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB3_74:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB3_76
; %bb.75:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_76:                               ; %Flow107
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_77:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_79
; %bb.78:                               ;   in Loop: Header=BB3_77 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_79:                               ;   in Loop: Header=BB3_77 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_81
; %bb.80:                               ;   in Loop: Header=BB3_77 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_82
.LBB3_81:                               ;   in Loop: Header=BB3_77 Depth=1
	s_mov_b32 s1, -1
.LBB3_82:                               ; %Flow101
                                        ;   in Loop: Header=BB3_77 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_77
; %bb.83:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_87
; %bb.84:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[28:29] offset:40
	global_load_b64 v[9:10], v8, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v8, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_87
; %bb.85:                               ; %.preheader.i.i.i10.preheader
	s_mov_b32 s0, 0
.LBB3_86:                               ; %.preheader.i.i.i10
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_86
.LBB3_87:                               ; %__ockl_printf_begin.exit14
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b32 v40, off, s33          ; 4-byte Folded Reload
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.16@rel32@lo+4
	s_addc_u32 s1, s1, .str.16@rel32@hi+12
	v_readlane_b32 s30, v41, 2
	s_cmp_lg_u64 s[0:1], 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v2, s0
	s_cselect_b32 s4, 38, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v4, s4
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[24:25]
	v_readlane_b32 s31, v41, 3
	v_readlane_b32 s35, v41, 1
	v_readlane_b32 s34, v41, 0
	v_readlane_b32 s0, v41, 4
	s_or_saveexec_b32 s1, -1
	scratch_load_b32 v41, off, s33 offset:4 ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s1
	s_add_i32 s32, s32, -16
	s_mov_b32 s33, s0
	s_setpc_b64 s[2:3]
.Lfunc_end3:
	.size	_ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv, .Lfunc_end3-_ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 4760
; NumSgprs: 38
; NumVgprs: 69
; ScratchSize: 32
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv
	.type	_ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv,@function
_ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv: ; @_ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_mov_b32 s0, s33
	s_mov_b32 s33, s32
	s_or_saveexec_b32 s1, -1
	scratch_store_b32 off, v41, s33 offset:4 ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s1
	v_writelane_b32 v41, s0, 4
	s_add_i32 s32, s32, 16
	scratch_store_b32 off, v40, s33         ; 4-byte Folded Spill
	v_writelane_b32 v41, s34, 0
	v_writelane_b32 v41, s35, 1
	v_writelane_b32 v41, s30, 2
	v_writelane_b32 v41, s31, 3
	s_load_b64 s[28:29], s[8:9], 0x50
	v_mbcnt_lo_u32_b32 v65, -1, 0
	v_mov_b32_e32 v6, 0
	v_dual_mov_b32 v54, v31 :: v_dual_mov_b32 v55, v1
	v_dual_mov_b32 v64, v0 :: v_dual_mov_b32 v7, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v65
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_mov_b64 s[24:25], s[8:9]
	s_mov_b32 s26, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB4_6
; %bb.1:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[5:6], v0, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB4_5
; %bb.2:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB4_3:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[10:11], v0, s[28:29]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB4_3
; %bb.4:                                ; %Flow139
	s_or_b32 exec_lo, exec_lo, s3
.LBB4_5:                                ; %Flow141
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB4_6:                                ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[28:29] offset:40
	global_load_b128 v[0:3], v5, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB4_8
; %bb.7:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB4_8:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB4_15
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v10, s[28:29] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB4_11
.LBB4_10:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB4_10
.LBB4_11:                               ; %Flow137
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB4_13
; %bb.12:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB4_13:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB4_15
; %bb.14:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB4_15:                               ; %Flow138
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB4_16:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB4_18
; %bb.17:                               ;   in Loop: Header=BB4_16 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB4_18:                               ;   in Loop: Header=BB4_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB4_20
; %bb.19:                               ;   in Loop: Header=BB4_16 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB4_21
.LBB4_20:                               ;   in Loop: Header=BB4_16 Depth=1
	s_mov_b32 s1, -1
.LBB4_21:                               ; %Flow132
                                        ;   in Loop: Header=BB4_16 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB4_16
; %bb.22:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB4_26
; %bb.23:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[28:29] offset:40
	global_load_b64 v[9:10], v8, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v8, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB4_26
; %bb.24:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB4_25:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB4_25
.LBB4_26:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.19@rel32@lo+4
	s_addc_u32 s1, s1, .str.19@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 39, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[24:25]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_add_co_u32 v0, vcc_lo, 0x1000, v64
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v55, vcc_lo
	s_mov_b32 s0, exec_lo
	flat_load_b32 v0, v[0:1] offset:3964
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v0
	s_xor_b32 s27, exec_lo, s0
	s_cbranch_execz .LBB4_31
; %bb.27:
	v_add_co_u32 v66, vcc_lo, 0xfc0, v64
	v_add_co_ci_u32_e32 v67, vcc_lo, 0, v55, vcc_lo
	s_mov_b32 s34, exec_lo
	flat_load_b64 v[0:1], v[66:67] offset:4020
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v3, 31, v0
	v_mov_b32_e32 v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, v66, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v67, v3, vcc_lo
	flat_load_b32 v70, v[2:3] offset:3208
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v70, v1
	s_cbranch_execz .LBB4_30
; %bb.28:                               ; %.lr.ph.preheader
	v_add_co_u32 v68, vcc_lo, 0x1f78, v64
	v_add_co_ci_u32_e32 v69, vcc_lo, 0, v55, vcc_lo
	s_mov_b32 s35, 0
.LBB4_29:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_mad_i64_i32 v[0:1], null, v70, 28, v[66:67]
	v_mov_b32_e32 v31, v54
	s_mov_b64 s[8:9], s[24:25]
	s_mov_b32 s12, s26
	v_ashrrev_i32_e32 v71, 31, v70
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo5Order13showOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo5Order13showOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_lshlrev_b64 v[0:1], 2, v[70:71]
	v_add_co_u32 v0, vcc_lo, v64, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v55, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, 0x1000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_clause 0x1
	flat_load_b32 v70, v[0:1] offset:3144
	flat_load_b32 v0, v[68:69]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v70, v0
	s_or_b32 s35, vcc_lo, s35
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB4_29
.LBB4_30:                               ; %Flow111
	s_or_b32 exec_lo, exec_lo, s34
.LBB4_31:                               ; %Flow126
	s_and_not1_saveexec_b32 s18, s27
	s_cbranch_execz .LBB4_60
; %bb.32:
	v_mov_b32_e32 v4, v65
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB4_38
; %bb.33:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[5:6], v0, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB4_37
; %bb.34:                               ; %.preheader3.i.i.i6.preheader
	s_mov_b32 s3, 0
.LBB4_35:                               ; %.preheader3.i.i.i6
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[10:11], v0, s[28:29]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB4_35
; %bb.36:                               ; %Flow123
	s_or_b32 exec_lo, exec_lo, s3
.LBB4_37:                               ; %Flow125
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB4_38:                               ; %.loopexit4.i.i.i1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[28:29] offset:40
	global_load_b128 v[0:3], v5, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB4_40
; %bb.39:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB4_40:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB4_48
; %bb.41:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v10, s[28:29] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB4_44
; %bb.42:                               ; %.preheader1.i.i.i4.preheader
	s_mov_b32 s8, 0
.LBB4_43:                               ; %.preheader1.i.i.i4
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB4_43
.LBB4_44:                               ; %Flow121
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB4_46
; %bb.45:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB4_46:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB4_48
; %bb.47:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB4_48:                               ; %Flow122
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB4_49:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB4_51
; %bb.50:                               ;   in Loop: Header=BB4_49 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB4_51:                               ;   in Loop: Header=BB4_49 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB4_53
; %bb.52:                               ;   in Loop: Header=BB4_49 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB4_54
.LBB4_53:                               ;   in Loop: Header=BB4_49 Depth=1
	s_mov_b32 s1, -1
.LBB4_54:                               ; %Flow116
                                        ;   in Loop: Header=BB4_49 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB4_49
; %bb.55:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB4_59
; %bb.56:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[28:29] offset:40
	global_load_b64 v[9:10], v8, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v8, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB4_59
; %bb.57:                               ; %.preheader.i.i.i3.preheader
	s_mov_b32 s0, 0
.LBB4_58:                               ; %.preheader.i.i.i3
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB4_58
.LBB4_59:                               ; %__ockl_printf_begin.exit7
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.20@rel32@lo+4
	s_addc_u32 s1, s1, .str.20@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 26, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[24:25]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
.LBB4_60:                               ; %Flow127
	s_or_b32 exec_lo, exec_lo, s18
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v65
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v65
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB4_66
; %bb.61:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v0, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[3:4], v0, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v6
	v_and_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[6:7]
	s_cbranch_execz .LBB4_65
; %bb.62:                               ; %.preheader3.i.i.i13.preheader
	s_mov_b32 s3, 0
.LBB4_63:                               ; %.preheader3.i.i.i13
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[8:9], v0, s[28:29]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v1, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, v4 :: v_dual_and_b32 v2, v2, v7
	v_mad_u64_u32 v[4:5], null, v2, 24, v[1:2]
	global_load_b64 v[4:5], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB4_63
; %bb.64:                               ; %Flow107
	s_or_b32 exec_lo, exec_lo, s3
.LBB4_65:                               ; %Flow109
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB4_66:                               ; %.loopexit4.i.i.i8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v66, 0
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[6:7], v66, s[28:29] offset:40
	global_load_b128 v[0:3], v66, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB4_68
; %bb.67:
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, v66
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v6, 2 :: v_dual_mov_b32 v7, 1
	global_store_b128 v[8:9], v[4:7], off offset:8
.LBB4_68:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[65:66]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v65, 33 :: v_dual_mov_b32 v68, v66
	v_dual_mov_b32 v67, v66 :: v_dual_mov_b32 v2, s8
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	v_mov_b32_e32 v5, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[65:68], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB4_76
; %bb.69:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v10, s[28:29] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB4_72
; %bb.70:                               ; %.preheader1.i.i.i11.preheader
	s_mov_b32 s8, 0
.LBB4_71:                               ; %.preheader1.i.i.i11
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB4_71
.LBB4_72:                               ; %Flow105
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB4_74
; %bb.73:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB4_74:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB4_76
; %bb.75:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB4_76:                               ; %Flow106
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB4_77:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB4_79
; %bb.78:                               ;   in Loop: Header=BB4_77 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB4_79:                               ;   in Loop: Header=BB4_77 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB4_81
; %bb.80:                               ;   in Loop: Header=BB4_77 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB4_82
.LBB4_81:                               ;   in Loop: Header=BB4_77 Depth=1
	s_mov_b32 s1, -1
.LBB4_82:                               ; %Flow100
                                        ;   in Loop: Header=BB4_77 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB4_77
; %bb.83:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB4_87
; %bb.84:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[28:29] offset:40
	global_load_b64 v[9:10], v8, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v8, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB4_87
; %bb.85:                               ; %.preheader.i.i.i10.preheader
	s_mov_b32 s0, 0
.LBB4_86:                               ; %.preheader.i.i.i10
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB4_86
.LBB4_87:                               ; %__ockl_printf_begin.exit14
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b32 v40, off, s33          ; 4-byte Folded Reload
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.16@rel32@lo+4
	s_addc_u32 s1, s1, .str.16@rel32@hi+12
	v_readlane_b32 s30, v41, 2
	s_cmp_lg_u64 s[0:1], 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v2, s0
	s_cselect_b32 s4, 38, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v4, s4
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[24:25]
	v_readlane_b32 s31, v41, 3
	v_readlane_b32 s35, v41, 1
	v_readlane_b32 s34, v41, 0
	v_readlane_b32 s0, v41, 4
	s_or_saveexec_b32 s1, -1
	scratch_load_b32 v41, off, s33 offset:4 ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s1
	s_add_i32 s32, s32, -16
	s_mov_b32 s33, s0
	s_setpc_b64 s[2:3]
.Lfunc_end4:
	.size	_ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv, .Lfunc_end4-_ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 4828
; NumSgprs: 38
; NumVgprs: 72
; ScratchSize: 32
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv
	.type	_ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv,@function
_ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv: ; @_ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_mov_b32 s0, s33
	s_mov_b32 s33, s32
	s_or_saveexec_b32 s1, -1
	scratch_store_b32 off, v41, s33 offset:4 ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s1
	v_writelane_b32 v41, s0, 4
	s_add_i32 s32, s32, 16
	scratch_store_b32 off, v40, s33         ; 4-byte Folded Spill
	v_writelane_b32 v41, s34, 0
	v_writelane_b32 v41, s35, 1
	v_writelane_b32 v41, s30, 2
	v_writelane_b32 v41, s31, 3
	s_load_b64 s[28:29], s[8:9], 0x50
	v_mbcnt_lo_u32_b32 v65, -1, 0
	v_mov_b32_e32 v6, 0
	v_dual_mov_b32 v54, v31 :: v_dual_mov_b32 v55, v1
	v_dual_mov_b32 v64, v0 :: v_dual_mov_b32 v7, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v65
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_mov_b64 s[24:25], s[8:9]
	s_mov_b32 s26, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB5_6
; %bb.1:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[5:6], v0, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB5_5
; %bb.2:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB5_3:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[10:11], v0, s[28:29]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB5_3
; %bb.4:                                ; %Flow139
	s_or_b32 exec_lo, exec_lo, s3
.LBB5_5:                                ; %Flow141
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB5_6:                                ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[28:29] offset:40
	global_load_b128 v[0:3], v5, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB5_8
; %bb.7:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB5_8:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB5_15
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v10, s[28:29] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB5_11
.LBB5_10:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB5_10
.LBB5_11:                               ; %Flow137
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB5_13
; %bb.12:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB5_13:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB5_15
; %bb.14:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB5_15:                               ; %Flow138
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB5_16:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB5_18
; %bb.17:                               ;   in Loop: Header=BB5_16 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB5_18:                               ;   in Loop: Header=BB5_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB5_20
; %bb.19:                               ;   in Loop: Header=BB5_16 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB5_21
.LBB5_20:                               ;   in Loop: Header=BB5_16 Depth=1
	s_mov_b32 s1, -1
.LBB5_21:                               ; %Flow132
                                        ;   in Loop: Header=BB5_16 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB5_16
; %bb.22:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB5_26
; %bb.23:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[28:29] offset:40
	global_load_b64 v[9:10], v8, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v8, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB5_26
; %bb.24:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB5_25:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB5_25
.LBB5_26:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.21@rel32@lo+4
	s_addc_u32 s1, s1, .str.21@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 40, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[24:25]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_add_co_u32 v0, vcc_lo, 0x2000, v64
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v55, vcc_lo
	s_mov_b32 s0, exec_lo
	flat_load_b32 v0, v[0:1] offset:3900
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v0
	s_xor_b32 s27, exec_lo, s0
	s_cbranch_execz .LBB5_31
; %bb.27:
	v_add_co_u32 v66, vcc_lo, 0x1f80, v64
	v_add_co_ci_u32_e32 v67, vcc_lo, 0, v55, vcc_lo
	s_mov_b32 s34, exec_lo
	flat_load_b64 v[0:1], v[66:67] offset:4020
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v3, 31, v0
	v_mov_b32_e32 v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, v66, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v67, v3, vcc_lo
	flat_load_b32 v70, v[2:3] offset:3208
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v70, v1
	s_cbranch_execz .LBB5_30
; %bb.28:                               ; %.lr.ph.preheader
	v_add_co_u32 v68, vcc_lo, 0x2f38, v64
	v_add_co_ci_u32_e32 v69, vcc_lo, 0, v55, vcc_lo
	s_mov_b32 s35, 0
.LBB5_29:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_mad_i64_i32 v[0:1], null, v70, 28, v[66:67]
	v_mov_b32_e32 v31, v54
	s_mov_b64 s[8:9], s[24:25]
	s_mov_b32 s12, s26
	v_ashrrev_i32_e32 v71, 31, v70
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo5Order13showOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo5Order13showOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_lshlrev_b64 v[0:1], 2, v[70:71]
	v_add_co_u32 v0, vcc_lo, v64, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v55, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, 0x2000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_clause 0x1
	flat_load_b32 v70, v[0:1] offset:3080
	flat_load_b32 v0, v[68:69]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v70, v0
	s_or_b32 s35, vcc_lo, s35
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB5_29
.LBB5_30:                               ; %Flow111
	s_or_b32 exec_lo, exec_lo, s34
.LBB5_31:                               ; %Flow126
	s_and_not1_saveexec_b32 s18, s27
	s_cbranch_execz .LBB5_60
; %bb.32:
	v_mov_b32_e32 v4, v65
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB5_38
; %bb.33:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[5:6], v0, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB5_37
; %bb.34:                               ; %.preheader3.i.i.i6.preheader
	s_mov_b32 s3, 0
.LBB5_35:                               ; %.preheader3.i.i.i6
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[10:11], v0, s[28:29]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB5_35
; %bb.36:                               ; %Flow123
	s_or_b32 exec_lo, exec_lo, s3
.LBB5_37:                               ; %Flow125
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB5_38:                               ; %.loopexit4.i.i.i1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[28:29] offset:40
	global_load_b128 v[0:3], v5, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB5_40
; %bb.39:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB5_40:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB5_48
; %bb.41:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v10, s[28:29] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB5_44
; %bb.42:                               ; %.preheader1.i.i.i4.preheader
	s_mov_b32 s8, 0
.LBB5_43:                               ; %.preheader1.i.i.i4
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB5_43
.LBB5_44:                               ; %Flow121
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB5_46
; %bb.45:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB5_46:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB5_48
; %bb.47:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB5_48:                               ; %Flow122
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB5_49:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB5_51
; %bb.50:                               ;   in Loop: Header=BB5_49 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB5_51:                               ;   in Loop: Header=BB5_49 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB5_53
; %bb.52:                               ;   in Loop: Header=BB5_49 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB5_54
.LBB5_53:                               ;   in Loop: Header=BB5_49 Depth=1
	s_mov_b32 s1, -1
.LBB5_54:                               ; %Flow116
                                        ;   in Loop: Header=BB5_49 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB5_49
; %bb.55:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB5_59
; %bb.56:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[28:29] offset:40
	global_load_b64 v[9:10], v8, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v8, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB5_59
; %bb.57:                               ; %.preheader.i.i.i3.preheader
	s_mov_b32 s0, 0
.LBB5_58:                               ; %.preheader.i.i.i3
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB5_58
.LBB5_59:                               ; %__ockl_printf_begin.exit7
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.22@rel32@lo+4
	s_addc_u32 s1, s1, .str.22@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 29, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[24:25]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
.LBB5_60:                               ; %Flow127
	s_or_b32 exec_lo, exec_lo, s18
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v65
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v65
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB5_66
; %bb.61:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v0, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[3:4], v0, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v6
	v_and_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[6:7]
	s_cbranch_execz .LBB5_65
; %bb.62:                               ; %.preheader3.i.i.i13.preheader
	s_mov_b32 s3, 0
.LBB5_63:                               ; %.preheader3.i.i.i13
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[8:9], v0, s[28:29]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v1, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, v4 :: v_dual_and_b32 v2, v2, v7
	v_mad_u64_u32 v[4:5], null, v2, 24, v[1:2]
	global_load_b64 v[4:5], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB5_63
; %bb.64:                               ; %Flow107
	s_or_b32 exec_lo, exec_lo, s3
.LBB5_65:                               ; %Flow109
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB5_66:                               ; %.loopexit4.i.i.i8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v66, 0
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[6:7], v66, s[28:29] offset:40
	global_load_b128 v[0:3], v66, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB5_68
; %bb.67:
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, v66
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v6, 2 :: v_dual_mov_b32 v7, 1
	global_store_b128 v[8:9], v[4:7], off offset:8
.LBB5_68:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[65:66]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v65, 33 :: v_dual_mov_b32 v68, v66
	v_dual_mov_b32 v67, v66 :: v_dual_mov_b32 v2, s8
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	v_mov_b32_e32 v5, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[65:68], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB5_76
; %bb.69:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v10, s[28:29] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB5_72
; %bb.70:                               ; %.preheader1.i.i.i11.preheader
	s_mov_b32 s8, 0
.LBB5_71:                               ; %.preheader1.i.i.i11
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB5_71
.LBB5_72:                               ; %Flow105
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB5_74
; %bb.73:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB5_74:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB5_76
; %bb.75:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB5_76:                               ; %Flow106
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB5_77:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB5_79
; %bb.78:                               ;   in Loop: Header=BB5_77 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB5_79:                               ;   in Loop: Header=BB5_77 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB5_81
; %bb.80:                               ;   in Loop: Header=BB5_77 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB5_82
.LBB5_81:                               ;   in Loop: Header=BB5_77 Depth=1
	s_mov_b32 s1, -1
.LBB5_82:                               ; %Flow100
                                        ;   in Loop: Header=BB5_77 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB5_77
; %bb.83:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB5_87
; %bb.84:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[28:29] offset:40
	global_load_b64 v[9:10], v8, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v8, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB5_87
; %bb.85:                               ; %.preheader.i.i.i10.preheader
	s_mov_b32 s0, 0
.LBB5_86:                               ; %.preheader.i.i.i10
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB5_86
.LBB5_87:                               ; %__ockl_printf_begin.exit14
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b32 v40, off, s33          ; 4-byte Folded Reload
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.16@rel32@lo+4
	s_addc_u32 s1, s1, .str.16@rel32@hi+12
	v_readlane_b32 s30, v41, 2
	s_cmp_lg_u64 s[0:1], 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v2, s0
	s_cselect_b32 s4, 38, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v4, s4
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[24:25]
	v_readlane_b32 s31, v41, 3
	v_readlane_b32 s35, v41, 1
	v_readlane_b32 s34, v41, 0
	v_readlane_b32 s0, v41, 4
	s_or_saveexec_b32 s1, -1
	scratch_load_b32 v41, off, s33 offset:4 ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s1
	s_add_i32 s32, s32, -16
	s_mov_b32 s33, s0
	s_setpc_b64 s[2:3]
.Lfunc_end5:
	.size	_ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv, .Lfunc_end5-_ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 4828
; NumSgprs: 38
; NumVgprs: 72
; ScratchSize: 32
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv
	.type	_ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv,@function
_ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv: ; @_ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_mov_b32 s22, s33
	s_mov_b32 s33, s32
	s_xor_saveexec_b32 s0, -1
	scratch_store_b32 off, v38, s33         ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s0
	v_writelane_b32 v38, s30, 0
	s_add_i32 s32, s32, 16
	v_writelane_b32 v38, s31, 1
	s_load_b64 s[20:21], s[8:9], 0x50
	v_mbcnt_lo_u32_b32 v48, -1, 0
	v_mov_b32_e32 v6, 0
	v_dual_mov_b32 v36, v1 :: v_dual_mov_b32 v37, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v48
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_mov_b64 s[18:19], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_6
; %bb.1:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB6_5
; %bb.2:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB6_3:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB6_3
; %bb.4:                                ; %Flow224
	s_or_b32 exec_lo, exec_lo, s3
.LBB6_5:                                ; %Flow226
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB6_6:                                ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB6_8
; %bb.7:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB6_8:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB6_15
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB6_11
.LBB6_10:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB6_10
.LBB6_11:                               ; %Flow222
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB6_13
; %bb.12:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB6_13:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB6_15
; %bb.14:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB6_15:                               ; %Flow223
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB6_16:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_18
; %bb.17:                               ;   in Loop: Header=BB6_16 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB6_18:                               ;   in Loop: Header=BB6_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB6_20
; %bb.19:                               ;   in Loop: Header=BB6_16 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB6_21
.LBB6_20:                               ;   in Loop: Header=BB6_16 Depth=1
	s_mov_b32 s1, -1
.LBB6_21:                               ; %Flow217
                                        ;   in Loop: Header=BB6_16 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB6_16
; %bb.22:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_26
; %bb.23:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB6_26
; %bb.24:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB6_25:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB6_25
.LBB6_26:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.23@rel32@lo+4
	s_addc_u32 s1, s1, .str.23@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 41, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_add_co_u32 v0, vcc_lo, 0x2000, v37
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v36, vcc_lo
	v_mov_b32_e32 v4, v48
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	flat_load_b64 v[36:37], v[0:1] offset:3912
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_32
; %bb.27:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB6_31
; %bb.28:                               ; %.preheader3.i.i.i6.preheader
	s_mov_b32 s3, 0
.LBB6_29:                               ; %.preheader3.i.i.i6
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB6_29
; %bb.30:                               ; %Flow210
	s_or_b32 exec_lo, exec_lo, s3
.LBB6_31:                               ; %Flow212
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB6_32:                               ; %.loopexit4.i.i.i1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB6_34
; %bb.33:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB6_34:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB6_42
; %bb.35:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB6_38
; %bb.36:                               ; %.preheader1.i.i.i4.preheader
	s_mov_b32 s8, 0
.LBB6_37:                               ; %.preheader1.i.i.i4
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB6_37
.LBB6_38:                               ; %Flow208
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB6_40
; %bb.39:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB6_40:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB6_42
; %bb.41:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB6_42:                               ; %Flow209
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB6_43:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_45
; %bb.44:                               ;   in Loop: Header=BB6_43 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB6_45:                               ;   in Loop: Header=BB6_43 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB6_47
; %bb.46:                               ;   in Loop: Header=BB6_43 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB6_48
.LBB6_47:                               ;   in Loop: Header=BB6_43 Depth=1
	s_mov_b32 s1, -1
.LBB6_48:                               ; %Flow203
                                        ;   in Loop: Header=BB6_43 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB6_43
; %bb.49:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_53
; %bb.50:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB6_53
; %bb.51:                               ; %.preheader.i.i.i3.preheader
	s_mov_b32 s0, 0
.LBB6_52:                               ; %.preheader.i.i.i3
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB6_52
.LBB6_53:                               ; %__ockl_printf_begin.exit7
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.24@rel32@lo+4
	s_addc_u32 s1, s1, .str.24@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s4, 40, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v2, v48
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v2
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_59
; %bb.54:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v3, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[20:21] offset:40
	global_load_b64 v[8:9], v3, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB6_58
; %bb.55:                               ; %.preheader3.i.i.i13.preheader
	s_mov_b32 s3, 0
.LBB6_56:                               ; %.preheader3.i.i.i13
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[20:21] offset:40
	global_load_b64 v[10:11], v3, s[20:21]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB6_56
; %bb.57:                               ; %Flow196
	s_or_b32 exec_lo, exec_lo, s3
.LBB6_58:                               ; %Flow198
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB6_59:                               ; %.loopexit4.i.i.i8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s2, v8
	v_readfirstlane_b32 s3, v9
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[20:21] offset:40
	global_load_b128 v[4:7], v3, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB6_61
; %bb.60:
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, v3
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v13, vcc_lo, s8, v5, vcc_lo
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB6_61:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v0, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_mov_b32_e32 v2, v36
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v11, s11
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB6_69
; %bb.62:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[0:1], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB6_65
; %bb.63:                               ; %.preheader1.i.i.i11.preheader
	s_mov_b32 s8, 0
.LBB6_64:                               ; %.preheader1.i.i.i11
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB6_64
.LBB6_65:                               ; %Flow194
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB6_67
; %bb.66:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB6_67:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB6_69
; %bb.68:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB6_69:                               ; %Flow195
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB6_70:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_72
; %bb.71:                               ;   in Loop: Header=BB6_70 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB6_72:                               ;   in Loop: Header=BB6_70 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB6_74
; %bb.73:                               ;   in Loop: Header=BB6_70 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB6_75
.LBB6_74:                               ;   in Loop: Header=BB6_70 Depth=1
	s_mov_b32 s1, -1
.LBB6_75:                               ; %Flow189
                                        ;   in Loop: Header=BB6_70 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB6_70
; %bb.76:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_80
; %bb.77:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB6_80
; %bb.78:                               ; %.preheader.i.i.i10.preheader
	s_mov_b32 s0, 0
.LBB6_79:                               ; %.preheader.i.i.i10
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB6_79
.LBB6_80:                               ; %__ockl_printf_append_args.exit
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v2, v48
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v2
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_86
; %bb.81:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v3, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[20:21] offset:40
	global_load_b64 v[8:9], v3, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB6_85
; %bb.82:                               ; %.preheader3.i.i.i19.preheader
	s_mov_b32 s3, 0
.LBB6_83:                               ; %.preheader3.i.i.i19
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[20:21] offset:40
	global_load_b64 v[10:11], v3, s[20:21]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB6_83
; %bb.84:                               ; %Flow182
	s_or_b32 exec_lo, exec_lo, s3
.LBB6_85:                               ; %Flow184
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB6_86:                               ; %.loopexit4.i.i.i14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s2, v8
	v_readfirstlane_b32 s3, v9
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[20:21] offset:40
	global_load_b128 v[4:7], v3, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB6_88
; %bb.87:
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, v3
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v13, vcc_lo, s8, v5, vcc_lo
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB6_88:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v6, v8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_mov_b32_e32 v2, v37
	v_and_or_b32 v0, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v11, vcc_lo, v7, v9, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v9, s11
	v_dual_mov_b32 v7, s9 :: v_dual_mov_b32 v8, s10
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB6_96
; %bb.89:
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[20:21] offset:32 glc
	global_load_b64 v[0:1], v8, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[11:12]
	s_cbranch_execz .LBB6_92
; %bb.90:                               ; %.preheader1.i.i.i17.preheader
	s_mov_b32 s8, 0
.LBB6_91:                               ; %.preheader1.i.i.i17
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[6:7], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB6_91
.LBB6_92:                               ; %Flow180
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB6_94
; %bb.93:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB6_94:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB6_96
; %bb.95:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB6_96:                               ; %Flow181
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB6_97:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_99
; %bb.98:                               ;   in Loop: Header=BB6_97 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB6_99:                               ;   in Loop: Header=BB6_97 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB6_101
; %bb.100:                              ;   in Loop: Header=BB6_97 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB6_102
.LBB6_101:                              ;   in Loop: Header=BB6_97 Depth=1
	s_mov_b32 s1, -1
.LBB6_102:                              ; %Flow175
                                        ;   in Loop: Header=BB6_97 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB6_97
; %bb.103:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_107
; %bb.104:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB6_107
; %bb.105:                              ; %.preheader.i.i.i16.preheader
	s_mov_b32 s0, 0
.LBB6_106:                              ; %.preheader.i.i.i16
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB6_106
.LBB6_107:                              ; %__ockl_printf_append_args.exit20
	s_or_b32 exec_lo, exec_lo, s1
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v48
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v48
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_113
; %bb.108:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[3:4], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v6
	v_and_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[6:7]
	s_cbranch_execz .LBB6_112
; %bb.109:                              ; %.preheader3.i.i.i26.preheader
	s_mov_b32 s3, 0
.LBB6_110:                              ; %.preheader3.i.i.i26
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[8:9], v0, s[20:21]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v1, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, v4 :: v_dual_and_b32 v2, v2, v7
	v_mad_u64_u32 v[4:5], null, v2, 24, v[1:2]
	global_load_b64 v[4:5], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB6_110
; %bb.111:                              ; %Flow168
	s_or_b32 exec_lo, exec_lo, s3
.LBB6_112:                              ; %Flow170
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB6_113:                              ; %.loopexit4.i.i.i21
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v49, 0
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[6:7], v49, s[20:21] offset:40
	global_load_b128 v[0:3], v49, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB6_115
; %bb.114:
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, v49
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v6, 2 :: v_dual_mov_b32 v7, 1
	global_store_b128 v[8:9], v[4:7], off offset:8
.LBB6_115:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[48:49]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v48, 33 :: v_dual_mov_b32 v51, v49
	v_mov_b32_e32 v50, v49
	v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v5, s11
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[48:51], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB6_123
; %bb.116:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB6_119
; %bb.117:                              ; %.preheader1.i.i.i24.preheader
	s_mov_b32 s8, 0
.LBB6_118:                              ; %.preheader1.i.i.i24
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB6_118
.LBB6_119:                              ; %Flow166
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB6_121
; %bb.120:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB6_121:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB6_123
; %bb.122:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB6_123:                              ; %Flow167
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB6_124:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_126
; %bb.125:                              ;   in Loop: Header=BB6_124 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB6_126:                              ;   in Loop: Header=BB6_124 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB6_128
; %bb.127:                              ;   in Loop: Header=BB6_124 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB6_129
.LBB6_128:                              ;   in Loop: Header=BB6_124 Depth=1
	s_mov_b32 s1, -1
.LBB6_129:                              ; %Flow161
                                        ;   in Loop: Header=BB6_124 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB6_124
; %bb.130:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_134
; %bb.131:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB6_134
; %bb.132:                              ; %.preheader.i.i.i23.preheader
	s_mov_b32 s0, 0
.LBB6_133:                              ; %.preheader.i.i.i23
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB6_133
.LBB6_134:                              ; %__ockl_printf_begin.exit27
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.13@rel32@lo+4
	s_addc_u32 s1, s1, .str.13@rel32@hi+12
	v_readlane_b32 s30, v38, 0
	s_cmp_lg_u64 s[0:1], 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v2, s0
	s_cselect_b32 s4, 39, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v4, s4
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[18:19]
	v_readlane_b32 s31, v38, 1
	s_xor_saveexec_b32 s0, -1
	scratch_load_b32 v38, off, s33          ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s0
	s_add_i32 s32, s32, -16
	s_mov_b32 s33, s22
	s_setpc_b64 s[2:3]
.Lfunc_end6:
	.size	_ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv, .Lfunc_end6-_ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 7172
; NumSgprs: 36
; NumVgprs: 52
; ScratchSize: 16
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi
	.type	_ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi,@function
_ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi: ; @_ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	flat_load_b64 v[4:5], v[0:1] offset:4020
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v7, 31, v4
	v_mov_b32_e32 v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, v0, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v7, vcc_lo
	flat_load_b32 v27, v[6:7] offset:3208
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v27, v5
	s_cbranch_execz .LBB7_19
; %bb.1:                                ; %.lr.ph
	v_add_co_u32 v4, vcc_lo, 0x2000, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v7, vcc_lo, 0x2f50, v0
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v1, vcc_lo
	flat_load_b32 v32, v[4:5] offset:4008
	v_add_co_u32 v9, vcc_lo, 0x1f80, v0
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v33, vcc_lo, 0x2da0, v0
	v_add_co_ci_u32_e32 v34, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v11, vcc_lo, 0x2f30, v0
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v13, vcc_lo, 0x2f38, v0
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v15, vcc_lo, 0x2f3c, v0
	v_add_co_ci_u32_e32 v16, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v17, vcc_lo, 0xfc0, v0
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v35, vcc_lo, 0x1de0, v0
	v_add_co_ci_u32_e32 v36, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v19, vcc_lo, 0x1f70, v0
	v_add_co_ci_u32_e32 v20, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v21, vcc_lo, 0x1f78, v0
	v_add_co_ci_u32_e32 v22, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v23, vcc_lo, 0x1f7c, v0
	v_add_co_ci_u32_e32 v24, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v37, vcc_lo, 0xe20, v0
	v_add_co_ci_u32_e32 v38, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v48, vcc_lo, 0x2a70, v0
	v_add_co_ci_u32_e32 v49, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v50, vcc_lo, 0x2c08, v0
	v_mov_b32_e32 v39, -1
	v_add_co_ci_u32_e32 v51, vcc_lo, 0, v1, vcc_lo
	s_mov_b32 s1, 0
.LBB7_2:                                ; =>This Inner Loop Header: Depth=1
	v_mad_i64_i32 v[4:5], null, v27, 28, v[0:1]
	v_ashrrev_i32_e32 v28, 31, v27
	v_mov_b32_e32 v52, v27
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b64 v[25:26], 2, v[27:28]
	flat_load_b32 v5, v[4:5] offset:20
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_nlt_f32_e32 v5, v32
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB7_4
; %bb.3:                                ;   in Loop: Header=BB7_2 Depth=1
	v_add_co_u32 v4, vcc_lo, v0, v25
	v_add_co_ci_u32_e32 v5, vcc_lo, v1, v26, vcc_lo
                                        ; implicit-def: $vgpr25_vgpr26
                                        ; implicit-def: $vgpr52
	flat_load_b32 v27, v[4:5] offset:3208
                                        ; implicit-def: $vgpr5
.LBB7_4:                                ; %Flow20
                                        ;   in Loop: Header=BB7_2 Depth=1
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB7_18
; %bb.5:                                ;   in Loop: Header=BB7_2 Depth=1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mad_i64_i32 v[28:29], null, v27, 28, v[0:1]
	s_mov_b32 s3, exec_lo
	s_clause 0x1
	flat_load_b32 v4, v[28:29]
	flat_load_b32 v6, v[7:8]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v30, v4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v31, 31, v30
	v_lshlrev_b64 v[30:31], 2, v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v53, vcc_lo, v2, v30
	v_add_co_ci_u32_e32 v54, vcc_lo, v3, v31, vcc_lo
	v_add_co_u32 v27, vcc_lo, v0, v30
	flat_load_b32 v6, v[53:54]
	v_add_co_ci_u32_e32 v53, vcc_lo, v1, v31, vcc_lo
	v_add_co_u32 v30, vcc_lo, 0x2000, v27
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v31, vcc_lo, 0, v53, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[28:29], v6 offset:8
	flat_load_b32 v6, v[30:31] offset:3964
	v_add_co_u32 v30, vcc_lo, 0x2f7c, v27
	v_add_co_ci_u32_e32 v31, vcc_lo, 0, v53, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 -1, v6
	s_cbranch_execz .LBB7_7
; %bb.6:                                ;   in Loop: Header=BB7_2 Depth=1
	flat_store_b32 v[28:29], v6 offset:16
	flat_load_b32 v6, v[30:31]
.LBB7_7:                                ; %_ZN10gpu_ginkgo5Order8getAckedERKiS2_.exit.i
                                        ;   in Loop: Header=BB7_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	flat_load_b32 v27, v[28:29] offset:4
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v6, v27, v6
	flat_store_b32 v[30:31], v6
	flat_load_b32 v6, v[7:8]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v30, v4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v31, 31, v30
	v_lshlrev_b64 v[30:31], 2, v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v0, v30
	v_add_co_ci_u32_e32 v6, vcc_lo, v1, v31, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v30, vcc_lo, 0x2000, v4
	v_add_co_ci_u32_e32 v31, vcc_lo, 0, v6, vcc_lo
	flat_load_b32 v4, v[30:31] offset:3924
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_gt_i32_e32 1, v4
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB7_9
; %bb.8:                                ;   in Loop: Header=BB7_2 Depth=1
	s_clause 0x2
	flat_load_b32 v6, v[11:12]
	flat_load_b32 v30, v[13:14]
	flat_load_b32 v4, v[28:29] offset:16
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_add_nc_u32_e32 v53, -1, v6
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v31, 31, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v54, 31, v53
	v_lshlrev_b64 v[30:31], 2, v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[54:55], 2, v[53:54]
	v_add_co_u32 v54, vcc_lo, v33, v54
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v55, vcc_lo, v34, v55, vcc_lo
	v_add_co_u32 v30, vcc_lo, v48, v30
	v_add_co_ci_u32_e32 v31, vcc_lo, v49, v31, vcc_lo
	s_clause 0x2
	flat_load_b32 v54, v[54:55]
	flat_load_b32 v64, v[30:31]
	flat_load_b32 v6, v[28:29] offset:24
	flat_store_b32 v[11:12], v53
	flat_load_b128 v[27:30], v[28:29]
	s_waitcnt vmcnt(3) lgkmcnt(4)
	v_ashrrev_i32_e32 v55, 31, v54
	v_mad_i64_i32 v[65:66], null, v54, 28, v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[67:68], 2, v[54:55]
	v_add_co_u32 v69, vcc_lo, v48, v67
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v70, vcc_lo, v49, v68, vcc_lo
	s_waitcnt vmcnt(1) lgkmcnt(2)
	flat_store_b96 v[65:66], v[4:6] offset:16
	s_waitcnt vmcnt(0) lgkmcnt(1)
	s_clause 0x1
	flat_store_b128 v[65:66], v[27:30]
	flat_store_b32 v[69:70], v64
	flat_load_b32 v4, v[13:14]
	v_ashrrev_i32_e32 v65, 31, v64
	v_add_co_u32 v29, vcc_lo, v50, v67
	v_add_co_ci_u32_e32 v30, vcc_lo, v51, v68, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[27:28], 2, v[64:65]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[5:6], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v48, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, v49, v6, vcc_lo
	v_add_co_u32 v27, vcc_lo, v50, v27
	v_add_co_ci_u32_e32 v28, vcc_lo, v51, v28, vcc_lo
	s_clause 0x2
	flat_store_b32 v[29:30], v4
	flat_store_b32 v[5:6], v54
	flat_store_b32 v[27:28], v54
                                        ; implicit-def: $vgpr28_vgpr29
                                        ; implicit-def: $vgpr5
.LBB7_9:                                ; %Flow18
                                        ;   in Loop: Header=BB7_2 Depth=1
	s_or_saveexec_b32 s3, s3
	v_dual_mov_b32 v31, v16 :: v_dual_mov_b32 v30, v15
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB7_11
; %bb.10:                               ;   in Loop: Header=BB7_2 Depth=1
	s_clause 0x2
	flat_load_b32 v6, v[19:20]
	flat_load_b32 v30, v[21:22]
	flat_load_b32 v4, v[28:29] offset:16
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_add_nc_u32_e32 v53, -1, v6
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v31, 31, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v54, 31, v53
	v_lshlrev_b64 v[30:31], 2, v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[54:55], 2, v[53:54]
	v_add_co_u32 v54, vcc_lo, v35, v54
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v55, vcc_lo, v36, v55, vcc_lo
	v_add_co_u32 v71, vcc_lo, 0x1ab0, v0
	v_add_co_ci_u32_e32 v80, vcc_lo, 0, v1, vcc_lo
	flat_load_b32 v54, v[54:55]
	v_add_co_u32 v30, vcc_lo, v71, v30
	v_add_co_ci_u32_e32 v31, vcc_lo, v80, v31, vcc_lo
	s_clause 0x1
	flat_load_b32 v64, v[30:31]
	flat_load_b32 v6, v[28:29] offset:24
	flat_store_b32 v[19:20], v53
	flat_load_b128 v[27:30], v[28:29]
	s_waitcnt vmcnt(3) lgkmcnt(4)
	v_ashrrev_i32_e32 v55, 31, v54
	v_mad_i64_i32 v[65:66], null, v54, 28, v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[67:68], 2, v[54:55]
	v_add_co_u32 v69, vcc_lo, v71, v67
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v70, vcc_lo, v80, v68, vcc_lo
	s_waitcnt vmcnt(1) lgkmcnt(2)
	flat_store_b96 v[65:66], v[4:6] offset:16
	s_waitcnt vmcnt(0) lgkmcnt(1)
	s_clause 0x1
	flat_store_b128 v[65:66], v[27:30]
	flat_store_b32 v[69:70], v64
	flat_load_b32 v4, v[21:22]
	v_ashrrev_i32_e32 v65, 31, v64
	v_add_co_u32 v29, vcc_lo, 0x1c48, v0
	v_add_co_ci_u32_e32 v30, vcc_lo, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[27:28], 2, v[64:65]
	v_add_co_u32 v64, vcc_lo, v29, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v65, vcc_lo, v30, v68, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[5:6], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v71, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, v80, v6, vcc_lo
	v_add_co_u32 v27, vcc_lo, v29, v27
	v_add_co_ci_u32_e32 v28, vcc_lo, v30, v28, vcc_lo
	v_dual_mov_b32 v31, v24 :: v_dual_mov_b32 v30, v23
	s_clause 0x2
	flat_store_b32 v[64:65], v4
	flat_store_b32 v[5:6], v54
	flat_store_b32 v[27:28], v54
.LBB7_11:                               ;   in Loop: Header=BB7_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	flat_load_b32 v4, v[30:31]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v6, 1, v4
	v_add_co_u32 v4, vcc_lo, v0, v25
	v_add_co_ci_u32_e32 v5, vcc_lo, v1, v26, vcc_lo
	flat_store_b32 v[30:31], v6
	flat_load_b32 v27, v[4:5] offset:3208
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e64 s3, -1, v27
	v_cmpx_ne_u32_e32 -1, v27
	s_cbranch_execz .LBB7_15
; %bb.12:                               ;   in Loop: Header=BB7_2 Depth=1
	flat_load_b32 v25, v[4:5] offset:2800
	s_mov_b32 s6, -1
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 -1, v25
	s_cbranch_execz .LBB7_14
; %bb.13:                               ;   in Loop: Header=BB7_2 Depth=1
	v_ashrrev_i32_e32 v28, 31, v27
	v_ashrrev_i32_e32 v26, 31, v25
	v_add_co_u32 v30, vcc_lo, 0xc88, v4
	v_add_co_ci_u32_e32 v31, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[28:29], 2, v[27:28]
	v_lshlrev_b64 v[53:54], 2, v[25:26]
	s_xor_b32 s6, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v28, vcc_lo, v0, v28
	v_add_co_ci_u32_e32 v29, vcc_lo, v1, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v53, vcc_lo, v0, v53
	v_add_co_ci_u32_e32 v54, vcc_lo, v1, v54, vcc_lo
	v_add_co_u32 v4, vcc_lo, 0xaf0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_clause 0x3
	flat_store_b32 v[28:29], v25 offset:2800
	flat_store_b32 v[53:54], v27 offset:3208
	flat_store_b32 v[30:31], v39
	flat_store_b32 v[4:5], v39
	s_clause 0x1
	flat_load_b32 v4, v[0:1] offset:4016
	flat_load_b32 v6, v[0:1] offset:4028
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v5, 31, v4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v6, -1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, v37, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v38, v5, vcc_lo
	s_clause 0x1
	flat_store_b32 v[0:1], v6 offset:4028
	flat_store_b32 v[4:5], v52
	flat_load_b32 v4, v[0:1] offset:4016
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v4, 1, v4
	flat_store_b32 v[0:1], v4 offset:4016
.LBB7_14:                               ; %Flow15
                                        ;   in Loop: Header=BB7_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s3, s3, exec_lo
	s_and_b32 s5, s6, exec_lo
	s_or_b32 s3, s3, s5
.LBB7_15:                               ; %Flow
                                        ;   in Loop: Header=BB7_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB7_17
; %bb.16:                               ;   in Loop: Header=BB7_2 Depth=1
	flat_load_b32 v4, v[0:1] offset:4020
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, v0, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v1, v5, vcc_lo
	flat_load_b32 v27, v[4:5] offset:3208
.LBB7_17:                               ; %Flow16
                                        ;   in Loop: Header=BB7_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
.LBB7_18:                               ; %Flow21
                                        ;   in Loop: Header=BB7_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	flat_load_b32 v4, v[0:1] offset:4024
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v27, v4
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB7_2
.LBB7_19:                               ; %Flow23
	s_or_b32 exec_lo, exec_lo, s0
	s_setpc_b64 s[30:31]
.Lfunc_end7:
	.size	_ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi, .Lfunc_end7-_ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 1928
; NumSgprs: 34
; NumVgprs: 81
; ScratchSize: 0
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi
	.type	_ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi,@function
_ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi: ; @_ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, 0x1f80, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v1, vcc_lo
	s_mov_b32 s3, exec_lo
	flat_load_b64 v[8:9], v[6:7] offset:4020
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v11, 31, v8
	v_mov_b32_e32 v10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	v_add_co_u32 v10, vcc_lo, v6, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, v7, v11, vcc_lo
	flat_load_b32 v22, v[10:11] offset:3208
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v22, v9
	s_cbranch_execz .LBB8_29
; %bb.1:                                ; %.lr.ph
	v_add_co_u32 v8, vcc_lo, 0x2000, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, 0xfb4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_clause 0x1
	flat_load_u8 v23, v[8:9] offset:3904
	flat_load_b32 v30, v[8:9] offset:4008
	v_add_co_u32 v8, vcc_lo, 0x1f80, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v10, vcc_lo, 0x2f38, v0
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v12, vcc_lo, 0x2f50, v0
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v14, vcc_lo, 0x2f44, v0
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v16, vcc_lo, 0x2f48, v0
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v18, vcc_lo, 0x2f3c, v0
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v31, vcc_lo, 0x2da0, v0
	v_add_co_ci_u32_e32 v32, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v20, vcc_lo, 0x2f30, v0
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v1, vcc_lo
	v_mov_b32_e32 v33, -1
	s_mov_b32 s4, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_cmp_eq_u16_e32 vcc_lo, 0, v23
	v_cmp_ne_u16_e64 s0, 0, v23
.LBB8_2:                                ; =>This Inner Loop Header: Depth=1
	v_mad_i64_i32 v[23:24], null, v22, 28, v[8:9]
	s_mov_b32 s2, exec_lo
	s_clause 0x1
	flat_load_b32 v25, v[23:24] offset:24
	flat_load_b32 v26, v[23:24]
	v_ashrrev_i32_e32 v23, 31, v22
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_cmpx_nlt_f32_e32 v25, v30
	s_xor_b32 s5, exec_lo, s2
	s_cbranch_execz .LBB8_20
; %bb.3:                                ;   in Loop: Header=BB8_2 Depth=1
	flat_load_b32 v24, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_gt_i32_e64 s1, v26, v24
	v_cmp_lt_i32_e64 s2, v26, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s1, vcc_lo, s1
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s2
	s_xor_b32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB8_11
; %bb.4:                                ;   in Loop: Header=BB8_2 Depth=1
	flat_load_b32 v24, v[12:13]
	s_mov_b32 s7, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v24, v26, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v25, 31, v24
	v_lshlrev_b64 v[24:25], 2, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v27, s1, v0, v24
	v_add_co_ci_u32_e64 v28, s1, v1, v25, s1
	v_mad_i64_i32 v[24:25], null, v22, 28, v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v27, s1, 0x2000, v27
	v_add_co_ci_u32_e64 v28, s1, 0, v28, s1
	s_clause 0x1
	flat_load_b32 v29, v[24:25] offset:4
	flat_load_b32 v24, v[27:28] offset:3924
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v24, v24, v29
	flat_store_b32 v[27:28], v24 offset:3924
	s_clause 0x1
	flat_load_b32 v24, v[12:13]
	flat_load_b32 v27, v[14:15]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_sub_nc_u32_e32 v24, v26, v24
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v27, v27, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v25, 31, v24
	flat_store_b32 v[14:15], v27
	v_lshlrev_b64 v[24:25], 2, v[24:25]
	v_add_co_u32 v24, s1, v0, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v25, s1, v1, v25, s1
	v_add_co_u32 v24, s1, 0x2000, v24
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v25, s1, 0, v25, s1
	flat_load_b32 v27, v[24:25] offset:3964
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v27, v27, v29
	flat_store_b32 v[24:25], v27 offset:3964
	flat_load_b64 v[24:25], v[16:17]
	v_lshlrev_b64 v[27:28], 2, v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v27, s1, v0, v27
	v_add_co_ci_u32_e64 v28, s1, v1, v28, s1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mad_u64_u32 v[34:35], null, v29, v26, v[25:26]
	v_add_nc_u32_e32 v35, v24, v29
	v_add_co_u32 v24, s1, 0x2000, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v25, s1, 0, v28, s1
	v_mov_b32_e32 v36, v34
	flat_store_b64 v[16:17], v[35:36]
	flat_load_b32 v23, v[24:25] offset:3080
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e64 s6, -1, v23
	v_cmpx_ne_u32_e32 -1, v23
	s_cbranch_execz .LBB8_8
; %bb.5:                                ;   in Loop: Header=BB8_2 Depth=1
	flat_load_b32 v25, v[24:25] offset:2672
	s_mov_b32 s9, -1
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 -1, v25
	s_cbranch_execz .LBB8_7
; %bb.6:                                ;   in Loop: Header=BB8_2 Depth=1
	v_ashrrev_i32_e32 v24, 31, v23
	v_ashrrev_i32_e32 v26, 31, v25
	v_add_co_u32 v36, s1, 0x2c08, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v37, s1, 0, v28, s1
	v_lshlrev_b64 v[34:35], 2, v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[38:39], 2, v[25:26]
	s_xor_b32 s9, exec_lo, -1
	v_add_co_u32 v34, s1, v8, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v35, s1, v9, v35, s1
	v_add_co_u32 v38, s1, v8, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v39, s1, v9, v39, s1
	v_add_co_u32 v26, s1, 0x2a70, v27
	v_add_co_ci_u32_e64 v27, s1, 0, v28, s1
	s_clause 0x3
	flat_store_b32 v[34:35], v25 offset:2800
	flat_store_b32 v[38:39], v23 offset:3208
	flat_store_b32 v[36:37], v33
	flat_store_b32 v[26:27], v33
	s_clause 0x1
	flat_load_b32 v24, v[20:21]
	flat_load_b32 v26, v[18:19]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v25, 31, v24
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v26, -1, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[24:25], 2, v[24:25]
	v_add_co_u32 v24, s1, v31, v24
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v25, s1, v32, v25, s1
	s_clause 0x1
	flat_store_b32 v[18:19], v26
	flat_store_b32 v[24:25], v22
	flat_load_b32 v22, v[20:21]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v22, 1, v22
	flat_store_b32 v[20:21], v22
.LBB8_7:                                ; %Flow24
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s6, exec_lo
	s_and_b32 s6, s9, exec_lo
	s_or_b32 s6, s1, s6
.LBB8_8:                                ; %Flow
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB8_10
; %bb.9:                                ;   in Loop: Header=BB8_2 Depth=1
	flat_load_b32 v22, v[6:7]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v23, 31, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	v_add_co_u32 v22, s1, v0, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v23, s1, v1, v23, s1
	v_add_co_u32 v22, s1, 0x2000, v22
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v23, s1, 0, v23, s1
	flat_load_b32 v23, v[22:23] offset:3080
.LBB8_10:                               ; %Flow25
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mov_b32_e32 v22, v23
                                        ; implicit-def: $vgpr26
.LBB8_11:                               ; %Flow30
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB8_19
; %bb.12:                               ;   in Loop: Header=BB8_2 Depth=1
	flat_load_b32 v27, v[12:13]
	v_mad_i64_i32 v[24:25], null, v22, 28, v[8:9]
	s_mov_b32 s6, exec_lo
	flat_load_b64 v[28:29], v[24:25] offset:8
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_sub_nc_u32_e32 v26, v26, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v27, 31, v26
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v29, v29, v28
	v_lshlrev_b64 v[26:27], 2, v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v26, s1, v4, v26
	v_add_co_ci_u32_e64 v27, s1, v5, v27, s1
	flat_load_b32 v34, v[26:27]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v34, v29
	s_cbranch_execz .LBB8_18
; %bb.13:                               ;   in Loop: Header=BB8_2 Depth=1
	s_mov_b32 s7, exec_lo
                                        ; implicit-def: $vgpr35
	v_cmpx_le_i32_e64 v34, v29
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB8_15
; %bb.14:                               ;   in Loop: Header=BB8_2 Depth=1
	v_ashrrev_i32_e32 v35, 31, v29
	v_mul_lo_u32 v28, v34, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v29, v29, v35
	v_xor_b32_e32 v29, v29, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v36, v29
	v_sub_nc_u32_e32 v37, 0, v29
	v_rcp_iflag_f32_e32 v36, v36
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v36, 0x4f7ffffe, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v36, v36
	v_mul_lo_u32 v34, v37, v36
	v_ashrrev_i32_e32 v37, 31, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v28, v28, v37
	v_xor_b32_e32 v35, v37, v35
	v_mul_hi_u32 v34, v36, v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v28, v28, v37
	v_add_nc_u32_e32 v34, v36, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v34, v28, v34
	v_mul_lo_u32 v36, v34, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v28, v28, v36
	v_add_nc_u32_e32 v36, 1, v34
	v_sub_nc_u32_e32 v38, v28, v29
	v_cmp_ge_u32_e64 s1, v28, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v34, v34, v36, s1
	v_cndmask_b32_e64 v28, v28, v38, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v36, 1, v34
	v_cmp_ge_u32_e64 s1, v28, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v28, v34, v36, s1
	v_xor_b32_e32 v34, v28, v35
	v_add_co_u32 v28, s1, v24, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v29, s1, 0, v25, s1
	v_sub_nc_u32_e32 v34, v34, v35
	flat_store_b32 v[28:29], v34
	flat_load_b32 v26, v[26:27]
                                        ; implicit-def: $vgpr28_vgpr29
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v35, v26, v34
                                        ; implicit-def: $vgpr34
.LBB8_15:                               ; %Flow27
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_and_not1_saveexec_b32 s1, s7
; %bb.16:                               ;   in Loop: Header=BB8_2 Depth=1
	v_sub_nc_u32_e32 v35, v34, v28
; %bb.17:                               ; %.sink.split.i
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	flat_store_b32 v[24:25], v35 offset:12
.LBB8_18:                               ; %Flow29
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v22, s1, v0, v22
	v_add_co_ci_u32_e64 v23, s1, v1, v23, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v22, s1, 0x2000, v22
	v_add_co_ci_u32_e64 v23, s1, 0, v23, s1
	flat_load_b32 v22, v[22:23] offset:3080
.LBB8_19:                               ; %Flow31
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr26
.LBB8_20:                               ; %Flow38
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_and_not1_saveexec_b32 s2, s5
	s_cbranch_execz .LBB8_28
; %bb.21:                               ;   in Loop: Header=BB8_2 Depth=1
	flat_load_b32 v24, v[12:13]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v24, v26, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v25, 31, v24
	v_lshlrev_b64 v[24:25], 2, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v27, s1, v0, v24
	v_add_co_ci_u32_e64 v28, s1, v1, v25, s1
	v_mad_i64_i32 v[24:25], null, v22, 28, v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v27, s1, 0x2000, v27
	v_add_co_ci_u32_e64 v28, s1, 0, v28, s1
	s_clause 0x1
	flat_load_b32 v29, v[24:25] offset:4
	flat_load_b32 v24, v[27:28] offset:3924
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v24, v24, v29
	flat_store_b32 v[27:28], v24 offset:3924
	flat_load_b32 v24, v[12:13]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v24, v26, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v25, 31, v24
	v_lshlrev_b64 v[24:25], 2, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v24, s1, v0, v24
	v_add_co_ci_u32_e64 v25, s1, v1, v25, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v24, s1, 0x2000, v24
	v_add_co_ci_u32_e64 v25, s1, 0, v25, s1
	flat_load_b32 v26, v[24:25] offset:3964
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v26, v26, v29
	flat_store_b32 v[24:25], v26 offset:3964
	flat_load_b32 v25, v[14:15]
	v_lshlrev_b64 v[23:24], 2, v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v27, s1, v0, v23
	v_add_co_ci_u32_e64 v28, s1, v1, v24, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_u32 v24, s1, 0x2000, v27
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v23, v25, v29
	v_add_co_ci_u32_e64 v25, s1, 0, v28, s1
	flat_store_b32 v[14:15], v23
	flat_load_b32 v23, v[24:25] offset:3080
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e64 s5, -1, v23
	v_cmpx_ne_u32_e32 -1, v23
	s_cbranch_execz .LBB8_25
; %bb.22:                               ;   in Loop: Header=BB8_2 Depth=1
	flat_load_b32 v25, v[24:25] offset:2672
	s_mov_b32 s8, -1
	s_mov_b32 s7, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 -1, v25
	s_cbranch_execz .LBB8_24
; %bb.23:                               ;   in Loop: Header=BB8_2 Depth=1
	v_ashrrev_i32_e32 v24, 31, v23
	v_ashrrev_i32_e32 v26, 31, v25
	v_add_co_u32 v36, s1, 0x2c08, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v37, s1, 0, v28, s1
	v_lshlrev_b64 v[34:35], 2, v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[38:39], 2, v[25:26]
	s_xor_b32 s8, exec_lo, -1
	v_add_co_u32 v34, s1, v8, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v35, s1, v9, v35, s1
	v_add_co_u32 v38, s1, v8, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v39, s1, v9, v39, s1
	v_add_co_u32 v26, s1, 0x2a70, v27
	v_add_co_ci_u32_e64 v27, s1, 0, v28, s1
	s_clause 0x3
	flat_store_b32 v[34:35], v25 offset:2800
	flat_store_b32 v[38:39], v23 offset:3208
	flat_store_b32 v[36:37], v33
	flat_store_b32 v[26:27], v33
	s_clause 0x1
	flat_load_b32 v24, v[20:21]
	flat_load_b32 v26, v[18:19]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v25, 31, v24
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v26, -1, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[24:25], 2, v[24:25]
	v_add_co_u32 v24, s1, v31, v24
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v25, s1, v32, v25, s1
	s_clause 0x1
	flat_store_b32 v[18:19], v26
	flat_store_b32 v[24:25], v22
	flat_load_b32 v22, v[20:21]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v22, 1, v22
	flat_store_b32 v[20:21], v22
.LBB8_24:                               ; %Flow35
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s5, exec_lo
	s_and_b32 s5, s8, exec_lo
	s_or_b32 s5, s1, s5
.LBB8_25:                               ; %Flow34
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB8_27
; %bb.26:                               ;   in Loop: Header=BB8_2 Depth=1
	flat_load_b32 v22, v[6:7]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v23, 31, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	v_add_co_u32 v22, s1, v0, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v23, s1, v1, v23, s1
	v_add_co_u32 v22, s1, 0x2000, v22
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v23, s1, 0, v23, s1
	flat_load_b32 v23, v[22:23] offset:3080
.LBB8_27:                               ; %Flow36
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mov_b32_e32 v22, v23
.LBB8_28:                               ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE11cancelOrderERi.exit
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	flat_load_b32 v23, v[10:11]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e64 s1, v22, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s4, s1, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB8_2
.LBB8_29:                               ; %Flow40
	s_or_b32 exec_lo, exec_lo, s3
	s_setpc_b64 s[30:31]
.Lfunc_end8:
	.size	_ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi, .Lfunc_end8-_ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 2480
; NumSgprs: 34
; NumVgprs: 40
; ScratchSize: 0
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function _ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE17showOrderBookInfoEv
	.type	_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE17showOrderBookInfoEv,@function
_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE17showOrderBookInfoEv: ; @_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE17showOrderBookInfoEv
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_mov_b32 s0, s33
	s_mov_b32 s33, s32
	s_or_saveexec_b32 s1, -1
	scratch_store_b32 off, v42, s33         ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s1
	v_writelane_b32 v42, s0, 2
	v_writelane_b32 v42, s30, 0
	s_add_i32 s32, s32, 16
	v_writelane_b32 v42, s31, 1
	s_load_b64 s[40:41], s[8:9], 0x50
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_mov_b32_e32 v6, 0
	v_dual_mov_b32 v82, v31 :: v_dual_mov_b32 v83, v1
	v_dual_mov_b32 v84, v0 :: v_dual_mov_b32 v7, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v96
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_mov_b64 s[36:37], s[8:9]
	s_mov_b32 s38, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_6
; %bb.1:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[40:41] offset:40
	global_load_b64 v[5:6], v0, s[40:41]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB9_5
; %bb.2:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB9_3:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[40:41] offset:40
	global_load_b64 v[10:11], v0, s[40:41]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB9_3
; %bb.4:                                ; %Flow181
	s_or_b32 exec_lo, exec_lo, s3
.LBB9_5:                                ; %Flow183
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB9_6:                                ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[40:41] offset:40
	global_load_b128 v[0:3], v5, s[40:41]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB9_8
; %bb.7:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB9_8:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB9_15
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[40:41] offset:32 glc
	global_load_b64 v[2:3], v10, s[40:41] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[40:41] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB9_11
.LBB9_10:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[40:41] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB9_10
.LBB9_11:                               ; %Flow179
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[40:41] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB9_13
; %bb.12:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB9_13:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB9_15
; %bb.14:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB9_15:                               ; %Flow180
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB9_16:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_18
; %bb.17:                               ;   in Loop: Header=BB9_16 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB9_18:                               ;   in Loop: Header=BB9_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB9_20
; %bb.19:                               ;   in Loop: Header=BB9_16 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB9_21
.LBB9_20:                               ;   in Loop: Header=BB9_16 Depth=1
	s_mov_b32 s1, -1
.LBB9_21:                               ; %Flow174
                                        ;   in Loop: Header=BB9_16 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB9_16
; %bb.22:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_26
; %bb.23:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[40:41] offset:40
	global_load_b64 v[9:10], v8, s[40:41] offset:24 glc
	global_load_b64 v[6:7], v8, s[40:41]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB9_26
; %bb.24:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB9_25:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB9_25
.LBB9_26:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.3@rel32@lo+4
	s_addc_u32 s1, s1, .str.3@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 61, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[36:37]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v4, v96
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_32
; %bb.27:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[40:41] offset:40
	global_load_b64 v[5:6], v0, s[40:41]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB9_31
; %bb.28:                               ; %.preheader3.i.i.i6.preheader
	s_mov_b32 s3, 0
.LBB9_29:                               ; %.preheader3.i.i.i6
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[40:41] offset:40
	global_load_b64 v[10:11], v0, s[40:41]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB9_29
; %bb.30:                               ; %Flow167
	s_or_b32 exec_lo, exec_lo, s3
.LBB9_31:                               ; %Flow169
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB9_32:                               ; %.loopexit4.i.i.i1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[40:41] offset:40
	global_load_b128 v[0:3], v5, s[40:41]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB9_34
; %bb.33:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB9_34:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB9_42
; %bb.35:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[40:41] offset:32 glc
	global_load_b64 v[2:3], v10, s[40:41] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[40:41] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB9_38
; %bb.36:                               ; %.preheader1.i.i.i4.preheader
	s_mov_b32 s8, 0
.LBB9_37:                               ; %.preheader1.i.i.i4
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[40:41] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB9_37
.LBB9_38:                               ; %Flow165
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[40:41] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB9_40
; %bb.39:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB9_40:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB9_42
; %bb.41:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB9_42:                               ; %Flow166
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB9_43:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_45
; %bb.44:                               ;   in Loop: Header=BB9_43 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB9_45:                               ;   in Loop: Header=BB9_43 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB9_47
; %bb.46:                               ;   in Loop: Header=BB9_43 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB9_48
.LBB9_47:                               ;   in Loop: Header=BB9_43 Depth=1
	s_mov_b32 s1, -1
.LBB9_48:                               ; %Flow160
                                        ;   in Loop: Header=BB9_43 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB9_43
; %bb.49:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_53
; %bb.50:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[40:41] offset:40
	global_load_b64 v[9:10], v8, s[40:41] offset:24 glc
	global_load_b64 v[6:7], v8, s[40:41]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB9_53
; %bb.51:                               ; %.preheader.i.i.i3.preheader
	s_mov_b32 s0, 0
.LBB9_52:                               ; %.preheader.i.i.i3
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB9_52
.LBB9_53:                               ; %__ockl_printf_begin.exit7
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.4@rel32@lo+4
	s_addc_u32 s1, s1, .str.4@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 31, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[36:37]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v0, v84 :: v_dual_mov_b32 v1, v83
	s_mov_b64 s[8:9], s[36:37]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v82 :: v_dual_mov_b32 v0, v84
	v_mov_b32_e32 v1, v83
	s_mov_b64 s[8:9], s[36:37]
	s_mov_b32 s12, s38
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v82 :: v_dual_mov_b32 v0, v84
	v_mov_b32_e32 v1, v83
	s_mov_b64 s[8:9], s[36:37]
	s_mov_b32 s12, s38
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v82 :: v_dual_mov_b32 v0, v84
	v_mov_b32_e32 v1, v83
	s_mov_b64 s[8:9], s[36:37]
	s_mov_b32 s12, s38
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, v84 :: v_dual_mov_b32 v1, v83
	s_mov_b64 s[8:9], s[36:37]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v4, v96
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_59
; %bb.54:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[40:41] offset:40
	global_load_b64 v[5:6], v0, s[40:41]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB9_58
; %bb.55:                               ; %.preheader3.i.i.i13.preheader
	s_mov_b32 s3, 0
.LBB9_56:                               ; %.preheader3.i.i.i13
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[40:41] offset:40
	global_load_b64 v[10:11], v0, s[40:41]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB9_56
; %bb.57:                               ; %Flow153
	s_or_b32 exec_lo, exec_lo, s3
.LBB9_58:                               ; %Flow155
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB9_59:                               ; %.loopexit4.i.i.i8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[40:41] offset:40
	global_load_b128 v[0:3], v5, s[40:41]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB9_61
; %bb.60:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB9_61:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB9_69
; %bb.62:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[40:41] offset:32 glc
	global_load_b64 v[2:3], v10, s[40:41] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[40:41] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB9_65
; %bb.63:                               ; %.preheader1.i.i.i11.preheader
	s_mov_b32 s8, 0
.LBB9_64:                               ; %.preheader1.i.i.i11
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[40:41] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB9_64
.LBB9_65:                               ; %Flow151
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[40:41] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB9_67
; %bb.66:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB9_67:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB9_69
; %bb.68:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB9_69:                               ; %Flow152
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB9_70:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_72
; %bb.71:                               ;   in Loop: Header=BB9_70 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB9_72:                               ;   in Loop: Header=BB9_70 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB9_74
; %bb.73:                               ;   in Loop: Header=BB9_70 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB9_75
.LBB9_74:                               ;   in Loop: Header=BB9_70 Depth=1
	s_mov_b32 s1, -1
.LBB9_75:                               ; %Flow146
                                        ;   in Loop: Header=BB9_70 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB9_70
; %bb.76:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_80
; %bb.77:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[40:41] offset:40
	global_load_b64 v[9:10], v8, s[40:41] offset:24 glc
	global_load_b64 v[6:7], v8, s[40:41]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB9_80
; %bb.78:                               ; %.preheader.i.i.i10.preheader
	s_mov_b32 s0, 0
.LBB9_79:                               ; %.preheader.i.i.i10
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB9_79
.LBB9_80:                               ; %__ockl_printf_begin.exit14
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.5@rel32@lo+4
	s_addc_u32 s1, s1, .str.5@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 30, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[36:37]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_swappc_b64 s[30:31], s[2:3]
	v_add_co_u32 v84, vcc_lo, 0x2fb0, v84
	v_add_co_ci_u32_e32 v83, vcc_lo, 0, v83, vcc_lo
	s_mov_b64 s[8:9], s[36:37]
	v_mov_b32_e32 v0, v84
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@hi+12
	v_mov_b32_e32 v1, v83
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v82 :: v_dual_mov_b32 v0, v84
	v_mov_b32_e32 v1, v83
	s_mov_b64 s[8:9], s[36:37]
	s_mov_b32 s12, s38
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v82 :: v_dual_mov_b32 v0, v84
	v_mov_b32_e32 v1, v83
	s_mov_b64 s[8:9], s[36:37]
	s_mov_b32 s12, s38
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v82 :: v_dual_mov_b32 v0, v84
	v_mov_b32_e32 v1, v83
	s_mov_b64 s[8:9], s[36:37]
	s_mov_b32 s12, s38
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, v84 :: v_dual_mov_b32 v1, v83
	s_mov_b64 s[8:9], s[36:37]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[0:1]
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v96
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v96
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_86
; %bb.81:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v0, s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[40:41] offset:40
	global_load_b64 v[3:4], v0, s[40:41]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v6
	v_and_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[6:7]
	s_cbranch_execz .LBB9_85
; %bb.82:                               ; %.preheader3.i.i.i20.preheader
	s_mov_b32 s3, 0
.LBB9_83:                               ; %.preheader3.i.i.i20
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[40:41] offset:40
	global_load_b64 v[8:9], v0, s[40:41]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v1, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, v4 :: v_dual_and_b32 v2, v2, v7
	v_mad_u64_u32 v[4:5], null, v2, 24, v[1:2]
	global_load_b64 v[4:5], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB9_83
; %bb.84:                               ; %Flow139
	s_or_b32 exec_lo, exec_lo, s3
.LBB9_85:                               ; %Flow141
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB9_86:                               ; %.loopexit4.i.i.i15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v97, 0
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[6:7], v97, s[40:41] offset:40
	global_load_b128 v[0:3], v97, s[40:41]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB9_88
; %bb.87:
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, v97
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v6, 2 :: v_dual_mov_b32 v7, 1
	global_store_b128 v[8:9], v[4:7], off offset:8
.LBB9_88:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[96:97]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v96, 33 :: v_dual_mov_b32 v99, v97
	v_mov_b32_e32 v98, v97
	v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v5, s11
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[96:99], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB9_96
; %bb.89:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[40:41] offset:32 glc
	global_load_b64 v[2:3], v10, s[40:41] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[40:41] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB9_92
; %bb.90:                               ; %.preheader1.i.i.i18.preheader
	s_mov_b32 s8, 0
.LBB9_91:                               ; %.preheader1.i.i.i18
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[40:41] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB9_91
.LBB9_92:                               ; %Flow137
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[40:41] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB9_94
; %bb.93:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB9_94:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB9_96
; %bb.95:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB9_96:                               ; %Flow138
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB9_97:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_99
; %bb.98:                               ;   in Loop: Header=BB9_97 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB9_99:                               ;   in Loop: Header=BB9_97 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB9_101
; %bb.100:                              ;   in Loop: Header=BB9_97 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB9_102
.LBB9_101:                              ;   in Loop: Header=BB9_97 Depth=1
	s_mov_b32 s1, -1
.LBB9_102:                              ; %Flow132
                                        ;   in Loop: Header=BB9_97 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB9_97
; %bb.103:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_107
; %bb.104:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[40:41] offset:40
	global_load_b64 v[9:10], v8, s[40:41] offset:24 glc
	global_load_b64 v[6:7], v8, s[40:41]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB9_107
; %bb.105:                              ; %.preheader.i.i.i17.preheader
	s_mov_b32 s0, 0
.LBB9_106:                              ; %.preheader.i.i.i17
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[40:41] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB9_106
.LBB9_107:                              ; %__ockl_printf_begin.exit21
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.6@rel32@lo+4
	s_addc_u32 s1, s1, .str.6@rel32@hi+12
	v_readlane_b32 s30, v42, 0
	s_cmp_lg_u64 s[0:1], 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v2, s0
	s_cselect_b32 s4, 61, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v4, s4
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[36:37]
	v_readlane_b32 s31, v42, 1
	v_readlane_b32 s0, v42, 2
	s_or_saveexec_b32 s1, -1
	scratch_load_b32 v42, off, s33          ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s1
	s_add_i32 s32, s32, -16
	s_mov_b32 s33, s0
	s_setpc_b64 s[2:3]
.Lfunc_end9:
	.size	_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE17showOrderBookInfoEv, .Lfunc_end9-_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE17showOrderBookInfoEv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 6364
; NumSgprs: 44
; NumVgprs: 100
; ScratchSize: 48
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function __ockl_printf_begin
	.type	__ockl_printf_begin,@function
__ockl_printf_begin:                    ; @__ockl_printf_begin
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_load_b64 s[2:3], s[8:9], 0x50
	v_mbcnt_lo_u32_b32 v4, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s0, v4
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB10_6
; %bb.1:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[2:3] offset:40
	global_load_b64 v[5:6], v0, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB10_5
; %bb.2:                                ; %.preheader3.i.i.preheader
	s_mov_b32 s5, 0
.LBB10_3:                               ; %.preheader3.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[2:3] offset:40
	global_load_b64 v[10:11], v0, s[2:3]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB10_3
; %bb.4:                                ; %Flow23
	s_or_b32 exec_lo, exec_lo, s5
.LBB10_5:                               ; %Flow25
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB10_6:                               ; %.loopexit4.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_mov_b32 s10, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[2:3] offset:40
	global_load_b128 v[0:3], v5, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v8
	v_readfirstlane_b32 s7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB10_8
; %bb.7:
	s_add_i32 s12, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v11, vcc_lo, s12, v1, vcc_lo
	v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB10_8:
	s_or_b32 exec_lo, exec_lo, s11
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_mov_b32_e32 v6, v5
	v_dual_mov_b32 v10, s12 :: v_dual_mov_b32 v13, s15
	v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v12, s14
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB10_16
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[2:3], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s5, v3
	v_and_b32_e32 v2, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB10_12
; %bb.10:                               ; %.preheader1.i.i.preheader
	s_mov_b32 s10, 0
.LBB10_11:                              ; %.preheader1.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB10_11
.LBB10_12:                              ; %Flow21
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v5, 0
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v4, s10, 0
	global_load_b64 v[2:3], v5, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB10_14
; %bb.13:
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s10
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB10_14:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB10_16
; %bb.15:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB10_16:                              ; %Flow22
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v0, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v1, vcc_lo, s8, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB10_17:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB10_19
; %bb.18:                               ;   in Loop: Header=BB10_17 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB10_19:                              ;   in Loop: Header=BB10_17 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB10_21
; %bb.20:                               ;   in Loop: Header=BB10_17 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB10_22
.LBB10_21:                              ;   in Loop: Header=BB10_17 Depth=1
	s_mov_b32 s1, -1
.LBB10_22:                              ; %Flow16
                                        ;   in Loop: Header=BB10_17 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB10_17
; %bb.23:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB10_27
; %bb.24:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB10_27
; %bb.25:                               ; %.preheader.i.i.preheader
	s_mov_b32 s0, 0
.LBB10_26:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB10_26
.LBB10_27:                              ; %__ockl_hostcall_preview.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end10:
	.size	__ockl_printf_begin, .Lfunc_end10-__ockl_printf_begin
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 1408
; NumSgprs: 34
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function _ZN10gpu_ginkgo9OrderListILi100ELi10EE16getTradedThroughERiiPi
	.type	_ZN10gpu_ginkgo9OrderListILi100ELi10EE16getTradedThroughERiiPi,@function
_ZN10gpu_ginkgo9OrderListILi100ELi10EE16getTradedThroughERiiPi: ; @_ZN10gpu_ginkgo9OrderListILi100ELi10EE16getTradedThroughERiiPi
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_mov_b32 s0, s33
	s_mov_b32 s33, s32
	s_or_saveexec_b32 s1, -1
	scratch_store_b32 off, v40, s33         ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s1
	v_writelane_b32 v40, s0, 6
	s_add_i32 s32, s32, 16
	v_writelane_b32 v40, s34, 0
	v_writelane_b32 v40, s35, 1
	v_writelane_b32 v40, s36, 2
	v_writelane_b32 v40, s37, 3
	v_writelane_b32 v40, s30, 4
	v_writelane_b32 v40, s31, 5
	v_dual_mov_b32 v53, v6 :: v_dual_mov_b32 v52, v0
	v_dual_mov_b32 v51, v1 :: v_dual_mov_b32 v50, v4
	v_dual_mov_b32 v54, v5 :: v_dual_mov_b32 v49, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, 0x2000, v52
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v51, vcc_lo
	v_mov_b32_e32 v48, v2
	s_mov_b32 s26, exec_lo
	flat_load_b32 v0, v[0:1] offset:3920
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v0, v50, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v52, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, v51, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x2000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_load_b32 v2, v[2:3] offset:3924
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB11_212
; %bb.1:
	v_add_co_u32 v70, vcc_lo, 0x2f50, v52
	v_add_co_ci_u32_e32 v71, vcc_lo, 0, v51, vcc_lo
	s_mov_b64 s[18:19], s[8:9]
                                        ; implicit-def: $vgpr55
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_i32_e32 1, v2
	s_xor_b32 s27, exec_lo, s0
	s_cbranch_execz .LBB11_106
; %bb.2:
	v_add_co_u32 v84, vcc_lo, 0x1f80, v52
	v_add_co_ci_u32_e32 v85, vcc_lo, 0, v51, vcc_lo
	s_mov_b32 s28, exec_lo
	v_mov_b32_e32 v55, 0
	flat_load_b64 v[2:3], v[84:85] offset:4020
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v5, 31, v2
	v_mov_b32_e32 v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, v84, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v85, v5, vcc_lo
	flat_load_b32 v112, v[4:5] offset:3208
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v112, v3
	s_cbranch_execz .LBB11_105
; %bb.3:                                ; %.lr.ph
	v_add_co_u32 v86, vcc_lo, 0xfb4, v84
	v_add_co_ci_u32_e32 v87, vcc_lo, 0, v85, vcc_lo
	v_add_co_u32 v96, vcc_lo, 0x2f38, v52
	v_add_co_ci_u32_e32 v97, vcc_lo, 0, v51, vcc_lo
	v_add_co_u32 v98, vcc_lo, 0x2f3c, v52
	v_add_co_ci_u32_e32 v99, vcc_lo, 0, v51, vcc_lo
	v_add_co_u32 v116, vcc_lo, 0x2da0, v52
	v_dual_mov_b32 v65, 0 :: v_dual_mov_b32 v68, 2
	v_add_co_ci_u32_e32 v117, vcc_lo, 0, v51, vcc_lo
	v_add_co_u32 v100, vcc_lo, 0x2f30, v52
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.29@rel32@lo+4
	s_addc_u32 s1, s1, .str.29@rel32@hi+12
	v_add_co_ci_u32_e32 v101, vcc_lo, 0, v51, vcc_lo
	v_mbcnt_lo_u32_b32 v118, -1, 0
	v_dual_mov_b32 v103, 0 :: v_dual_mov_b32 v64, 33
	v_dual_mov_b32 v119, -1 :: v_dual_mov_b32 v128, v65
	v_mov_b32_e32 v69, 1
	v_mov_b32_e32 v129, v65
	v_mov_b32_e32 v55, v65
	s_cmp_lg_u64 s[0:1], 0
	s_mov_b32 s20, 0
	s_cselect_b32 s34, 0x50, 0
	s_mov_b32 s29, 0
.LBB11_4:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB11_12 Depth 2
                                        ;     Child Loop BB11_20 Depth 2
                                        ;     Child Loop BB11_26 Depth 2
                                        ;     Child Loop BB11_35 Depth 2
                                        ;     Child Loop BB11_39 Depth 2
                                        ;     Child Loop BB11_47 Depth 2
                                        ;     Child Loop BB11_53 Depth 2
                                        ;     Child Loop BB11_62 Depth 2
                                        ;     Child Loop BB11_66 Depth 2
                                        ;     Child Loop BB11_74 Depth 2
                                        ;     Child Loop BB11_80 Depth 2
                                        ;     Child Loop BB11_89 Depth 2
	v_mad_i64_i32 v[0:1], null, v112, 28, v[84:85]
	v_ashrrev_i32_e32 v113, 31, v112
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v0, v50
                                        ; implicit-def: $vgpr0
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB11_6
; %bb.5:                                ;   in Loop: Header=BB11_4 Depth=1
	v_lshlrev_b64 v[0:1], 2, v[112:113]
                                        ; implicit-def: $vgpr112_vgpr113
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v52, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v51, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, 0x2000, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_load_b32 v0, v[0:1] offset:3080
.LBB11_6:                               ; %Flow335
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_and_not1_saveexec_b32 s35, s0
	s_cbranch_execz .LBB11_103
; %bb.7:                                ;   in Loop: Header=BB11_4 Depth=1
	v_mad_i64_i32 v[6:7], null, v112, 28, v[84:85]
	s_mov_b32 s0, -1
	s_mov_b32 s36, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_load_b32 v0, v[6:7] offset:8
	flat_load_b32 v2, v[6:7] offset:16
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_sub_nc_u32_e32 v1, v0, v129
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v0, v2, v128
	s_clause 0x1
	flat_store_b32 v[6:7], v1 offset:8
	flat_store_b32 v[6:7], v0 offset:16
	flat_load_b32 v2, v[48:49]
                                        ; implicit-def: $vgpr0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB11_100
; %bb.8:                                ;   in Loop: Header=BB11_4 Depth=1
	flat_load_b32 v3, v[70:71]
	v_min_i32_e32 v130, v1, v2
	v_add_co_u32 v0, vcc_lo, v6, 8
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_sub_nc_u32_e32 v2, v2, v130
	s_mov_b32 s2, 0
	s_mov_b32 s37, exec_lo
	flat_store_b32 v[48:49], v2
	flat_load_b32 v4, v[0:1]
	s_waitcnt vmcnt(1) lgkmcnt(2)
	v_sub_nc_u32_e32 v2, v50, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v4, v4, v130
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, v54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, v53, v3, vcc_lo
	flat_store_b32 v[0:1], v4
	flat_load_b32 v0, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v0, v0, v130
	flat_store_b32 v[2:3], v0
	flat_load_b32 v0, v[48:49]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v0
	s_cbranch_execz .LBB11_91
; %bb.9:                                ;   in Loop: Header=BB11_4 Depth=1
	flat_load_b32 v1, v[6:7] offset:4
	v_mov_b32_e32 v102, v118
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_min_i32_e32 v38, v1, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v38
	flat_store_b32 v[48:49], v0
	flat_load_b32 v0, v[6:7] offset:4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v82, v0, v38
	flat_store_b32 v[6:7], v82 offset:4
	s_load_b64 s[24:25], s[18:19], 0x50
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v102
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v102
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_15
; %bb.10:                               ;   in Loop: Header=BB11_4 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[2:3], v103, s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v103, s[24:25] offset:40
	global_load_b64 v[4:5], v103, s[24:25]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v8, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v8, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB11_14
; %bb.11:                               ; %.preheader3.i.i.i.i50.preheader
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_mov_b32 s3, 0
.LBB11_12:                              ; %.preheader3.i.i.i.i50
                                        ;   Parent Loop BB11_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v103, s[24:25] offset:40
	global_load_b64 v[8:9], v103, s[24:25]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[8:9]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v1, 24, v[0:1]
	v_mov_b32_e32 v5, v8
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB11_12
; %bb.13:                               ; %Flow328
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB11_14:                              ; %Flow330
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB11_15:                              ; %.loopexit4.i.i.i.i27
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v103, s[24:25] offset:40
	global_load_b128 v[0:3], v103, s[24:25]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB11_17
; %bb.16:                               ;   in Loop: Header=BB11_4 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v66, s8 :: v_dual_mov_b32 v67, v65
	global_store_b128 v[4:5], v[66:69], off offset:8
.LBB11_17:                              ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[102:103]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s21, s20
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v4
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v5, vcc_lo
	v_mov_b32_e32 v66, v65
	v_dual_mov_b32 v67, v65 :: v_dual_mov_b32 v2, s20
	v_dual_mov_b32 v3, s21 :: v_dual_mov_b32 v4, s22
	v_mov_b32_e32 v5, s23
	s_clause 0x3
	global_store_b128 v[8:9], v[64:67], off
	global_store_b128 v[8:9], v[2:5], off offset:16
	global_store_b128 v[8:9], v[2:5], off offset:32
	global_store_b128 v[8:9], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB11_25
; %bb.18:                               ;   in Loop: Header=BB11_4 Depth=1
	s_clause 0x1
	global_load_b64 v[14:15], v103, s[24:25] offset:32 glc
	global_load_b64 v[2:3], v103, s[24:25] offset:40
	s_mov_b32 s5, exec_lo
	v_dual_mov_b32 v12, s2 :: v_dual_mov_b32 v13, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v10, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[10:11], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v103, v[12:15], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[14:15]
	s_cbranch_execz .LBB11_21
; %bb.19:                               ; %.preheader1.i.i.i.i48.preheader
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_mov_b32 s8, 0
.LBB11_20:                              ; %.preheader1.i.i.i.i48
                                        ;   Parent Loop BB11_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[10:11], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v103, v[2:5], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB11_20
.LBB11_21:                              ; %Flow326
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v103, s[24:25] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB11_23
; %bb.22:                               ;   in Loop: Header=BB11_4 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v5, v65 :: v_dual_mov_b32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB11_23:                              ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB11_25
; %bb.24:                               ;   in Loop: Header=BB11_4 Depth=1
	global_load_b32 v102, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v102
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[102:103], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB11_25:                              ; %Flow327
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_add_co_u32 v114, vcc_lo, v6, 4
	v_add_co_ci_u32_e32 v115, vcc_lo, 0, v7, vcc_lo
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB11_26:                              ;   Parent Loop BB11_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_28
; %bb.27:                               ;   in Loop: Header=BB11_26 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB11_28:                              ;   in Loop: Header=BB11_26 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB11_30
; %bb.29:                               ;   in Loop: Header=BB11_26 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB11_31
.LBB11_30:                              ;   in Loop: Header=BB11_26 Depth=2
	s_mov_b32 s1, -1
.LBB11_31:                              ; %Flow321
                                        ;   in Loop: Header=BB11_26 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB11_26
; %bb.32:                               ;   in Loop: Header=BB11_4 Depth=1
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_36
; %bb.33:                               ;   in Loop: Header=BB11_4 Depth=1
	s_clause 0x2
	global_load_b64 v[4:5], v103, s[24:25] offset:40
	global_load_b64 v[8:9], v103, s[24:25] offset:24 glc
	global_load_b64 v[6:7], v103, s[24:25]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v103, v[2:5], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB11_36
; %bb.34:                               ; %.preheader.i.i.i.i47.preheader
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_mov_b32 s0, 0
.LBB11_35:                              ; %.preheader.i.i.i.i47
                                        ;   Parent Loop BB11_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v103, v[2:5], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB11_35
.LBB11_36:                              ; %__ockl_printf_begin.exit.i29
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.29@rel32@lo+4
	s_addc_u32 s1, s1, .str.29@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s34 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v6, 0
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v5, v118
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v5
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, 0
	v_mov_b32_e32 v7, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_42
; %bb.37:                               ;   in Loop: Header=BB11_4 Depth=1
	global_load_b64 v[3:4], v103, s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v103, s[24:25] offset:40
	global_load_b64 v[6:7], v103, s[24:25]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v8, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v8, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v7, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v103, v[1:4], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[3:4]
	s_cbranch_execz .LBB11_41
; %bb.38:                               ; %.preheader3.i.i.i32.i46.preheader
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_mov_b32 s3, 0
.LBB11_39:                              ; %.preheader3.i.i.i32.i46
                                        ;   Parent Loop BB11_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v103, s[24:25] offset:40
	global_load_b64 v[8:9], v103, s[24:25]
	v_dual_mov_b32 v3, v6 :: v_dual_mov_b32 v4, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v1, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, v7 :: v_dual_and_b32 v2, v2, v4
	v_mad_u64_u32 v[7:8], null, v2, 24, v[1:2]
	global_load_b64 v[1:2], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v103, v[1:4], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[3:4]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB11_39
; %bb.40:                               ; %Flow314
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB11_41:                              ; %Flow316
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB11_42:                              ; %.loopexit4.i.i.i27.i31
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v103, s[24:25] offset:40
	global_load_b128 v[1:4], v103, s[24:25]
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB11_44
; %bb.43:                               ;   in Loop: Header=BB11_4 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v7, vcc_lo, s10, v2, vcc_lo
	v_dual_mov_b32 v66, s8 :: v_dual_mov_b32 v67, v65
	global_store_b128 v[6:7], v[66:69], off offset:8
.LBB11_44:                              ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s21, s20
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_mov_b32_e32 v6, v65
	s_lshl_b64 s[4:5], s[4:5], 12
	v_and_or_b32 v36, 0xffffff1f, v0, 32
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_lshlrev_b64 v[5:6], 6, v[5:6]
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	v_mov_b32_e32 v39, v65
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, v3, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v6, vcc_lo
	v_dual_mov_b32 v3, s20 :: v_dual_mov_b32 v6, s23
	v_dual_mov_b32 v4, s21 :: v_dual_mov_b32 v5, s22
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB11_52
; %bb.45:                               ;   in Loop: Header=BB11_4 Depth=1
	s_clause 0x1
	global_load_b64 v[13:14], v103, s[24:25] offset:32 glc
	global_load_b64 v[3:4], v103, s[24:25] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v9, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[9:10], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v103, v[11:14], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[13:14]
	s_cbranch_execz .LBB11_48
; %bb.46:                               ; %.preheader1.i.i.i30.i44.preheader
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_mov_b32 s8, 0
.LBB11_47:                              ; %.preheader1.i.i.i30.i44
                                        ;   Parent Loop BB11_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[9:10], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v103, v[3:6], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB11_47
.LBB11_48:                              ; %Flow312
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[3:4], v103, s[24:25] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB11_50
; %bb.49:                               ;   in Loop: Header=BB11_4 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v6, v65 :: v_dual_mov_b32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB11_50:                              ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB11_52
; %bb.51:                               ;   in Loop: Header=BB11_4 Depth=1
	global_load_b32 v102, v[3:4], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v102
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[102:103], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB11_52:                              ; %Flow313
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB11_53:                              ;   Parent Loop BB11_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_55
; %bb.54:                               ;   in Loop: Header=BB11_53 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB11_55:                              ;   in Loop: Header=BB11_53 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB11_57
; %bb.56:                               ;   in Loop: Header=BB11_53 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB11_58
.LBB11_57:                              ;   in Loop: Header=BB11_53 Depth=2
	s_mov_b32 s1, -1
.LBB11_58:                              ; %Flow307
                                        ;   in Loop: Header=BB11_53 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB11_53
; %bb.59:                               ;   in Loop: Header=BB11_4 Depth=1
	global_load_b64 v[80:81], v[7:8], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_63
; %bb.60:                               ;   in Loop: Header=BB11_4 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v103, s[24:25] offset:40
	global_load_b64 v[6:7], v103, s[24:25] offset:24 glc
	global_load_b64 v[4:5], v103, s[24:25]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB11_63
; %bb.61:                               ; %.preheader.i.i.i29.i43.preheader
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_mov_b32 s0, 0
.LBB11_62:                              ; %.preheader.i.i.i29.i43
                                        ;   Parent Loop BB11_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB11_62
.LBB11_63:                              ; %__ockl_printf_append_args.exit.i33
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v4, v118 :: v_dual_mov_b32 v5, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v4
	v_mov_b32_e32 v6, 0
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_69
; %bb.64:                               ;   in Loop: Header=BB11_4 Depth=1
	global_load_b64 v[2:3], v103, s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v103, s[24:25] offset:40
	global_load_b64 v[5:6], v103, s[24:25]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v7, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v7, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v5, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v6, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[5:6], v[2:3]
	s_cbranch_execz .LBB11_68
; %bb.65:                               ; %.preheader3.i.i.i38.i42.preheader
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_mov_b32 s3, 0
.LBB11_66:                              ; %.preheader3.i.i.i38.i42
                                        ;   Parent Loop BB11_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v103, s[24:25] offset:40
	global_load_b64 v[7:8], v103, s[24:25]
	v_dual_mov_b32 v2, v5 :: v_dual_mov_b32 v3, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, v0, v2
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[5:6], null, v0, 24, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v0, v6 :: v_dual_and_b32 v1, v1, v3
	v_mad_u64_u32 v[6:7], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB11_66
; %bb.67:                               ; %Flow300
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB11_68:                              ; %Flow302
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB11_69:                              ; %.loopexit4.i.i.i33.i34
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[7:8], v103, s[24:25] offset:40
	global_load_b128 v[0:3], v103, s[24:25]
	v_readfirstlane_b32 s2, v5
	v_readfirstlane_b32 s3, v6
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v7
	v_readfirstlane_b32 s5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB11_71
; %bb.70:                               ;   in Loop: Header=BB11_4 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v5, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v6, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v66, s8 :: v_dual_mov_b32 v67, v65
	global_store_b128 v[5:6], v[66:69], off offset:8
.LBB11_71:                              ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s21, s20
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_mov_b32_e32 v5, v65
	s_lshl_b64 s[4:5], s[4:5], 12
	v_and_or_b32 v80, 0xffffff1d, v80, 34
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_lshlrev_b64 v[4:5], 6, v[4:5]
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	v_mov_b32_e32 v83, v65
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v2, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v2, s20 :: v_dual_mov_b32 v3, s21
	v_dual_mov_b32 v4, s22 :: v_dual_mov_b32 v5, s23
	s_clause 0x3
	global_store_b128 v[6:7], v[80:83], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB11_79
; %bb.72:                               ;   in Loop: Header=BB11_4 Depth=1
	s_clause 0x1
	global_load_b64 v[10:11], v103, s[24:25] offset:32 glc
	global_load_b64 v[2:3], v103, s[24:25] offset:40
	v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v103, v[8:11], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[10:11]
	s_cbranch_execz .LBB11_75
; %bb.73:                               ; %.preheader1.i.i.i36.i40.preheader
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_mov_b32 s8, 0
.LBB11_74:                              ; %.preheader1.i.i.i36.i40
                                        ;   Parent Loop BB11_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v103, v[2:5], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB11_74
.LBB11_75:                              ; %Flow298
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v103, s[24:25] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB11_77
; %bb.76:                               ;   in Loop: Header=BB11_4 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v5, v65 :: v_dual_mov_b32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB11_77:                              ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB11_79
; %bb.78:                               ;   in Loop: Header=BB11_4 Depth=1
	global_load_b32 v102, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v102
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[102:103], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB11_79:                              ; %Flow299
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB11_80:                              ;   Parent Loop BB11_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_82
; %bb.81:                               ;   in Loop: Header=BB11_80 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB11_82:                              ;   in Loop: Header=BB11_80 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB11_84
; %bb.83:                               ;   in Loop: Header=BB11_80 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB11_85
.LBB11_84:                              ;   in Loop: Header=BB11_80 Depth=2
	s_mov_b32 s1, -1
.LBB11_85:                              ; %Flow293
                                        ;   in Loop: Header=BB11_80 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB11_80
; %bb.86:                               ;   in Loop: Header=BB11_4 Depth=1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_90
; %bb.87:                               ;   in Loop: Header=BB11_4 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v103, s[24:25] offset:40
	global_load_b64 v[6:7], v103, s[24:25] offset:24 glc
	global_load_b64 v[4:5], v103, s[24:25]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB11_90
; %bb.88:                               ; %.preheader.i.i.i35.i39.preheader
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_mov_b32 s0, 0
.LBB11_89:                              ; %.preheader.i.i.i35.i39
                                        ;   Parent Loop BB11_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB11_89
.LBB11_90:                              ; %__ockl_printf_append_args.exit39.i36
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	flat_load_b32 v0, v[114:115]
	v_add_nc_u32_e32 v128, v38, v128
	v_add_nc_u32_e32 v55, v38, v55
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s2, vcc_lo, exec_lo
.LBB11_91:                              ; %Flow331
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s37
	v_add_nc_u32_e32 v129, v130, v129
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB11_99
; %bb.92:                               ;   in Loop: Header=BB11_4 Depth=1
	v_lshlrev_b64 v[0:1], 2, v[112:113]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v52, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, v51, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, 0x2000, v4
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v5, vcc_lo
	flat_load_b32 v0, v[1:2] offset:3080
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e64 s1, -1, v0
	v_cmpx_ne_u32_e32 -1, v0
	s_cbranch_execz .LBB11_96
; %bb.93:                               ;   in Loop: Header=BB11_4 Depth=1
	flat_load_b32 v2, v[1:2] offset:2672
	s_mov_b32 s4, -1
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 -1, v2
	s_cbranch_execz .LBB11_95
; %bb.94:                               ;   in Loop: Header=BB11_4 Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_co_u32 v8, vcc_lo, 0x2c08, v4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[6:7], 2, v[0:1]
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_xor_b32 s4, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v84, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v85, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v10, vcc_lo, v84, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, v85, v11, vcc_lo
	v_add_co_u32 v3, vcc_lo, 0x2a70, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v5, vcc_lo
	s_clause 0x3
	flat_store_b32 v[6:7], v2 offset:2800
	flat_store_b32 v[10:11], v0 offset:3208
	flat_store_b32 v[8:9], v119
	flat_store_b32 v[3:4], v119
	s_clause 0x1
	flat_load_b32 v1, v[100:101]
	flat_load_b32 v3, v[98:99]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, -1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, v116, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v117, v2, vcc_lo
	s_clause 0x1
	flat_store_b32 v[98:99], v3
	flat_store_b32 v[1:2], v112
	flat_load_b32 v1, v[100:101]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, 1, v1
	flat_store_b32 v[100:101], v1
.LBB11_95:                              ; %Flow287
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s3, s4, exec_lo
	s_or_b32 s1, s1, s3
.LBB11_96:                              ; %Flow
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s1, exec_lo, s2
	s_cbranch_execz .LBB11_98
; %bb.97:                               ;   in Loop: Header=BB11_4 Depth=1
	flat_load_b32 v0, v[86:87]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v52, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v51, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, 0x2000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_load_b32 v0, v[0:1] offset:3080
.LBB11_98:                              ; %Flow288
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, -1
.LBB11_99:                              ; %Flow333
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s0, s1, exec_lo
.LBB11_100:                             ; %Flow332
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s36
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s1
	s_cbranch_execz .LBB11_102
; %bb.101:                              ;   in Loop: Header=BB11_4 Depth=1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_lshlrev_b64 v[0:1], 2, v[112:113]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v52, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v51, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, 0x2000, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_load_b32 v0, v[0:1] offset:3080
.LBB11_102:                             ; %Flow334
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB11_103:                             ; %.backedge113
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s35
	flat_load_b32 v1, v[96:97]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_mov_b32_e32 v112, v0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	s_or_b32 s29, vcc_lo, s29
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s29
	s_cbranch_execnz .LBB11_4
; %bb.104:                              ; %._crit_edge.loopexit
	s_or_b32 exec_lo, exec_lo, s29
	flat_load_b32 v0, v[70:71]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v0, v50, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
.LBB11_105:                             ; %Flow336
	s_or_b32 exec_lo, exec_lo, s28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr54
                                        ; implicit-def: $vgpr53
	v_add_co_u32 v0, vcc_lo, v52, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v51, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, 0x2000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_load_b32 v2, v[0:1] offset:3924
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v2, v2, v55
	flat_store_b32 v[0:1], v2 offset:3924
                                        ; implicit-def: $vgpr0_vgpr1
.LBB11_106:                             ; %Flow391
	s_and_not1_saveexec_b32 s27, s27
	s_cbranch_execz .LBB11_211
; %bb.107:
	v_add_co_u32 v84, vcc_lo, 0xfc0, v52
	v_add_co_ci_u32_e32 v85, vcc_lo, 0, v51, vcc_lo
	s_mov_b32 s28, exec_lo
	v_mov_b32_e32 v55, 0
	flat_load_b64 v[2:3], v[84:85] offset:4020
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v5, 31, v2
	v_mov_b32_e32 v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, v84, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v85, v5, vcc_lo
	flat_load_b32 v112, v[4:5] offset:3208
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v112, v3
	s_cbranch_execz .LBB11_210
; %bb.108:                              ; %.lr.ph132
	v_add_co_u32 v86, vcc_lo, 0xfb4, v84
	v_add_co_ci_u32_e32 v87, vcc_lo, 0, v85, vcc_lo
	v_add_co_u32 v96, vcc_lo, 0x1f78, v52
	v_add_co_ci_u32_e32 v97, vcc_lo, 0, v51, vcc_lo
	v_add_co_u32 v98, vcc_lo, 0x1f7c, v52
	v_add_co_ci_u32_e32 v99, vcc_lo, 0, v51, vcc_lo
	v_add_co_u32 v116, vcc_lo, 0x1de0, v52
	v_dual_mov_b32 v65, 0 :: v_dual_mov_b32 v68, 2
	v_add_co_ci_u32_e32 v117, vcc_lo, 0, v51, vcc_lo
	v_add_co_u32 v100, vcc_lo, 0x1f70, v52
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.29@rel32@lo+4
	s_addc_u32 s1, s1, .str.29@rel32@hi+12
	v_add_co_ci_u32_e32 v101, vcc_lo, 0, v51, vcc_lo
	v_mbcnt_lo_u32_b32 v118, -1, 0
	v_dual_mov_b32 v103, 0 :: v_dual_mov_b32 v64, 33
	v_dual_mov_b32 v119, -1 :: v_dual_mov_b32 v128, v65
	v_mov_b32_e32 v69, 1
	v_mov_b32_e32 v129, v65
	v_mov_b32_e32 v55, v65
	s_cmp_lg_u64 s[0:1], 0
	s_mov_b32 s20, 0
	s_cselect_b32 s34, 0x50, 0
	s_mov_b32 s29, 0
.LBB11_109:                             ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB11_117 Depth 2
                                        ;     Child Loop BB11_125 Depth 2
                                        ;     Child Loop BB11_131 Depth 2
                                        ;     Child Loop BB11_140 Depth 2
                                        ;     Child Loop BB11_144 Depth 2
                                        ;     Child Loop BB11_152 Depth 2
                                        ;     Child Loop BB11_158 Depth 2
                                        ;     Child Loop BB11_167 Depth 2
                                        ;     Child Loop BB11_171 Depth 2
                                        ;     Child Loop BB11_179 Depth 2
                                        ;     Child Loop BB11_185 Depth 2
                                        ;     Child Loop BB11_194 Depth 2
	v_mad_i64_i32 v[0:1], null, v112, 28, v[84:85]
	v_ashrrev_i32_e32 v113, 31, v112
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v0, v50
                                        ; implicit-def: $vgpr0
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB11_111
; %bb.110:                              ;   in Loop: Header=BB11_109 Depth=1
	v_lshlrev_b64 v[0:1], 2, v[112:113]
                                        ; implicit-def: $vgpr112_vgpr113
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v52, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v51, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, 0x1000, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_load_b32 v0, v[0:1] offset:3144
.LBB11_111:                             ; %Flow388
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_and_not1_saveexec_b32 s35, s0
	s_cbranch_execz .LBB11_208
; %bb.112:                              ;   in Loop: Header=BB11_109 Depth=1
	v_mad_i64_i32 v[6:7], null, v112, 28, v[84:85]
	s_mov_b32 s0, -1
	s_mov_b32 s36, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_load_b32 v0, v[6:7] offset:8
	flat_load_b32 v2, v[6:7] offset:16
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_sub_nc_u32_e32 v1, v0, v129
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v0, v2, v128
	s_clause 0x1
	flat_store_b32 v[6:7], v1 offset:8
	flat_store_b32 v[6:7], v0 offset:16
	flat_load_b32 v2, v[48:49]
                                        ; implicit-def: $vgpr0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB11_205
; %bb.113:                              ;   in Loop: Header=BB11_109 Depth=1
	flat_load_b32 v3, v[70:71]
	v_min_i32_e32 v130, v1, v2
	v_add_co_u32 v0, vcc_lo, v6, 8
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_sub_nc_u32_e32 v2, v2, v130
	s_mov_b32 s2, 0
	s_mov_b32 s37, exec_lo
	flat_store_b32 v[48:49], v2
	flat_load_b32 v4, v[0:1]
	s_waitcnt vmcnt(1) lgkmcnt(2)
	v_sub_nc_u32_e32 v2, v50, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v4, v4, v130
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, v54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, v53, v3, vcc_lo
	flat_store_b32 v[0:1], v4
	flat_load_b32 v0, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v0, v0, v130
	flat_store_b32 v[2:3], v0
	flat_load_b32 v0, v[48:49]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v0
	s_cbranch_execz .LBB11_196
; %bb.114:                              ;   in Loop: Header=BB11_109 Depth=1
	flat_load_b32 v1, v[6:7] offset:4
	v_mov_b32_e32 v102, v118
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_min_i32_e32 v38, v1, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v38
	flat_store_b32 v[48:49], v0
	flat_load_b32 v0, v[6:7] offset:4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v82, v0, v38
	flat_store_b32 v[6:7], v82 offset:4
	s_load_b64 s[24:25], s[18:19], 0x50
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v102
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v102
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_120
; %bb.115:                              ;   in Loop: Header=BB11_109 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[2:3], v103, s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v103, s[24:25] offset:40
	global_load_b64 v[4:5], v103, s[24:25]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v8, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v8, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB11_119
; %bb.116:                              ; %.preheader3.i.i.i.i.preheader
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_mov_b32 s3, 0
.LBB11_117:                             ; %.preheader3.i.i.i.i
                                        ;   Parent Loop BB11_109 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v103, s[24:25] offset:40
	global_load_b64 v[8:9], v103, s[24:25]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[8:9]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v1, 24, v[0:1]
	v_mov_b32_e32 v5, v8
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB11_117
; %bb.118:                              ; %Flow381
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB11_119:                             ; %Flow383
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB11_120:                             ; %.loopexit4.i.i.i.i
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v103, s[24:25] offset:40
	global_load_b128 v[0:3], v103, s[24:25]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB11_122
; %bb.121:                              ;   in Loop: Header=BB11_109 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v66, s8 :: v_dual_mov_b32 v67, v65
	global_store_b128 v[4:5], v[66:69], off offset:8
.LBB11_122:                             ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[102:103]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s21, s20
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v4
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v5, vcc_lo
	v_mov_b32_e32 v66, v65
	v_dual_mov_b32 v67, v65 :: v_dual_mov_b32 v2, s20
	v_dual_mov_b32 v3, s21 :: v_dual_mov_b32 v4, s22
	v_mov_b32_e32 v5, s23
	s_clause 0x3
	global_store_b128 v[8:9], v[64:67], off
	global_store_b128 v[8:9], v[2:5], off offset:16
	global_store_b128 v[8:9], v[2:5], off offset:32
	global_store_b128 v[8:9], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB11_130
; %bb.123:                              ;   in Loop: Header=BB11_109 Depth=1
	s_clause 0x1
	global_load_b64 v[14:15], v103, s[24:25] offset:32 glc
	global_load_b64 v[2:3], v103, s[24:25] offset:40
	s_mov_b32 s5, exec_lo
	v_dual_mov_b32 v12, s2 :: v_dual_mov_b32 v13, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v10, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[10:11], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v103, v[12:15], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[14:15]
	s_cbranch_execz .LBB11_126
; %bb.124:                              ; %.preheader1.i.i.i.i.preheader
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_mov_b32 s8, 0
.LBB11_125:                             ; %.preheader1.i.i.i.i
                                        ;   Parent Loop BB11_109 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[10:11], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v103, v[2:5], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB11_125
.LBB11_126:                             ; %Flow379
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v103, s[24:25] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB11_128
; %bb.127:                              ;   in Loop: Header=BB11_109 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v5, v65 :: v_dual_mov_b32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB11_128:                             ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB11_130
; %bb.129:                              ;   in Loop: Header=BB11_109 Depth=1
	global_load_b32 v102, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v102
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[102:103], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB11_130:                             ; %Flow380
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_add_co_u32 v114, vcc_lo, v6, 4
	v_add_co_ci_u32_e32 v115, vcc_lo, 0, v7, vcc_lo
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB11_131:                             ;   Parent Loop BB11_109 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_133
; %bb.132:                              ;   in Loop: Header=BB11_131 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB11_133:                             ;   in Loop: Header=BB11_131 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB11_135
; %bb.134:                              ;   in Loop: Header=BB11_131 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB11_136
.LBB11_135:                             ;   in Loop: Header=BB11_131 Depth=2
	s_mov_b32 s1, -1
.LBB11_136:                             ; %Flow374
                                        ;   in Loop: Header=BB11_131 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB11_131
; %bb.137:                              ;   in Loop: Header=BB11_109 Depth=1
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_141
; %bb.138:                              ;   in Loop: Header=BB11_109 Depth=1
	s_clause 0x2
	global_load_b64 v[4:5], v103, s[24:25] offset:40
	global_load_b64 v[8:9], v103, s[24:25] offset:24 glc
	global_load_b64 v[6:7], v103, s[24:25]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v103, v[2:5], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB11_141
; %bb.139:                              ; %.preheader.i.i.i.i.preheader
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_mov_b32 s0, 0
.LBB11_140:                             ; %.preheader.i.i.i.i
                                        ;   Parent Loop BB11_109 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v103, v[2:5], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB11_140
.LBB11_141:                             ; %__ockl_printf_begin.exit.i
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.29@rel32@lo+4
	s_addc_u32 s1, s1, .str.29@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s34 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v6, 0
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v5, v118
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v5
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, 0
	v_mov_b32_e32 v7, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_147
; %bb.142:                              ;   in Loop: Header=BB11_109 Depth=1
	global_load_b64 v[3:4], v103, s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v103, s[24:25] offset:40
	global_load_b64 v[6:7], v103, s[24:25]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v8, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v8, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v7, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v103, v[1:4], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[3:4]
	s_cbranch_execz .LBB11_146
; %bb.143:                              ; %.preheader3.i.i.i32.i.preheader
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_mov_b32 s3, 0
.LBB11_144:                             ; %.preheader3.i.i.i32.i
                                        ;   Parent Loop BB11_109 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v103, s[24:25] offset:40
	global_load_b64 v[8:9], v103, s[24:25]
	v_dual_mov_b32 v3, v6 :: v_dual_mov_b32 v4, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v1, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, v7 :: v_dual_and_b32 v2, v2, v4
	v_mad_u64_u32 v[7:8], null, v2, 24, v[1:2]
	global_load_b64 v[1:2], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v103, v[1:4], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[3:4]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB11_144
; %bb.145:                              ; %Flow367
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB11_146:                             ; %Flow369
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB11_147:                             ; %.loopexit4.i.i.i27.i
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v103, s[24:25] offset:40
	global_load_b128 v[1:4], v103, s[24:25]
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB11_149
; %bb.148:                              ;   in Loop: Header=BB11_109 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v7, vcc_lo, s10, v2, vcc_lo
	v_dual_mov_b32 v66, s8 :: v_dual_mov_b32 v67, v65
	global_store_b128 v[6:7], v[66:69], off offset:8
.LBB11_149:                             ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s21, s20
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_mov_b32_e32 v6, v65
	s_lshl_b64 s[4:5], s[4:5], 12
	v_and_or_b32 v36, 0xffffff1f, v0, 32
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_lshlrev_b64 v[5:6], 6, v[5:6]
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	v_mov_b32_e32 v39, v65
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, v3, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v6, vcc_lo
	v_dual_mov_b32 v3, s20 :: v_dual_mov_b32 v6, s23
	v_dual_mov_b32 v4, s21 :: v_dual_mov_b32 v5, s22
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB11_157
; %bb.150:                              ;   in Loop: Header=BB11_109 Depth=1
	s_clause 0x1
	global_load_b64 v[13:14], v103, s[24:25] offset:32 glc
	global_load_b64 v[3:4], v103, s[24:25] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v9, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[9:10], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v103, v[11:14], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[13:14]
	s_cbranch_execz .LBB11_153
; %bb.151:                              ; %.preheader1.i.i.i30.i.preheader
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_mov_b32 s8, 0
.LBB11_152:                             ; %.preheader1.i.i.i30.i
                                        ;   Parent Loop BB11_109 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[9:10], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v103, v[3:6], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB11_152
.LBB11_153:                             ; %Flow365
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[3:4], v103, s[24:25] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB11_155
; %bb.154:                              ;   in Loop: Header=BB11_109 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v6, v65 :: v_dual_mov_b32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB11_155:                             ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB11_157
; %bb.156:                              ;   in Loop: Header=BB11_109 Depth=1
	global_load_b32 v102, v[3:4], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v102
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[102:103], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB11_157:                             ; %Flow366
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB11_158:                             ;   Parent Loop BB11_109 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_160
; %bb.159:                              ;   in Loop: Header=BB11_158 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB11_160:                             ;   in Loop: Header=BB11_158 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB11_162
; %bb.161:                              ;   in Loop: Header=BB11_158 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB11_163
.LBB11_162:                             ;   in Loop: Header=BB11_158 Depth=2
	s_mov_b32 s1, -1
.LBB11_163:                             ; %Flow360
                                        ;   in Loop: Header=BB11_158 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB11_158
; %bb.164:                              ;   in Loop: Header=BB11_109 Depth=1
	global_load_b64 v[80:81], v[7:8], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_168
; %bb.165:                              ;   in Loop: Header=BB11_109 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v103, s[24:25] offset:40
	global_load_b64 v[6:7], v103, s[24:25] offset:24 glc
	global_load_b64 v[4:5], v103, s[24:25]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB11_168
; %bb.166:                              ; %.preheader.i.i.i29.i.preheader
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_mov_b32 s0, 0
.LBB11_167:                             ; %.preheader.i.i.i29.i
                                        ;   Parent Loop BB11_109 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB11_167
.LBB11_168:                             ; %__ockl_printf_append_args.exit.i
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v4, v118 :: v_dual_mov_b32 v5, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v4
	v_mov_b32_e32 v6, 0
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_174
; %bb.169:                              ;   in Loop: Header=BB11_109 Depth=1
	global_load_b64 v[2:3], v103, s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v103, s[24:25] offset:40
	global_load_b64 v[5:6], v103, s[24:25]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v7, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v7, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v5, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v6, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[5:6], v[2:3]
	s_cbranch_execz .LBB11_173
; %bb.170:                              ; %.preheader3.i.i.i38.i.preheader
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_mov_b32 s3, 0
.LBB11_171:                             ; %.preheader3.i.i.i38.i
                                        ;   Parent Loop BB11_109 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v103, s[24:25] offset:40
	global_load_b64 v[7:8], v103, s[24:25]
	v_dual_mov_b32 v2, v5 :: v_dual_mov_b32 v3, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, v0, v2
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[5:6], null, v0, 24, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v0, v6 :: v_dual_and_b32 v1, v1, v3
	v_mad_u64_u32 v[6:7], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB11_171
; %bb.172:                              ; %Flow353
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB11_173:                             ; %Flow355
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB11_174:                             ; %.loopexit4.i.i.i33.i
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[7:8], v103, s[24:25] offset:40
	global_load_b128 v[0:3], v103, s[24:25]
	v_readfirstlane_b32 s2, v5
	v_readfirstlane_b32 s3, v6
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v7
	v_readfirstlane_b32 s5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB11_176
; %bb.175:                              ;   in Loop: Header=BB11_109 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v5, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v6, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v66, s8 :: v_dual_mov_b32 v67, v65
	global_store_b128 v[5:6], v[66:69], off offset:8
.LBB11_176:                             ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s21, s20
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_mov_b32_e32 v5, v65
	s_lshl_b64 s[4:5], s[4:5], 12
	v_and_or_b32 v80, 0xffffff1d, v80, 34
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_lshlrev_b64 v[4:5], 6, v[4:5]
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	v_mov_b32_e32 v83, v65
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v2, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v2, s20 :: v_dual_mov_b32 v3, s21
	v_dual_mov_b32 v4, s22 :: v_dual_mov_b32 v5, s23
	s_clause 0x3
	global_store_b128 v[6:7], v[80:83], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB11_184
; %bb.177:                              ;   in Loop: Header=BB11_109 Depth=1
	s_clause 0x1
	global_load_b64 v[10:11], v103, s[24:25] offset:32 glc
	global_load_b64 v[2:3], v103, s[24:25] offset:40
	v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v103, v[8:11], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[10:11]
	s_cbranch_execz .LBB11_180
; %bb.178:                              ; %.preheader1.i.i.i36.i.preheader
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_mov_b32 s8, 0
.LBB11_179:                             ; %.preheader1.i.i.i36.i
                                        ;   Parent Loop BB11_109 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v103, v[2:5], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB11_179
.LBB11_180:                             ; %Flow351
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v103, s[24:25] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB11_182
; %bb.181:                              ;   in Loop: Header=BB11_109 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v5, v65 :: v_dual_mov_b32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB11_182:                             ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB11_184
; %bb.183:                              ;   in Loop: Header=BB11_109 Depth=1
	global_load_b32 v102, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v102
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[102:103], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB11_184:                             ; %Flow352
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB11_185:                             ;   Parent Loop BB11_109 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_187
; %bb.186:                              ;   in Loop: Header=BB11_185 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB11_187:                             ;   in Loop: Header=BB11_185 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB11_189
; %bb.188:                              ;   in Loop: Header=BB11_185 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB11_190
.LBB11_189:                             ;   in Loop: Header=BB11_185 Depth=2
	s_mov_b32 s1, -1
.LBB11_190:                             ; %Flow346
                                        ;   in Loop: Header=BB11_185 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB11_185
; %bb.191:                              ;   in Loop: Header=BB11_109 Depth=1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_195
; %bb.192:                              ;   in Loop: Header=BB11_109 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v103, s[24:25] offset:40
	global_load_b64 v[6:7], v103, s[24:25] offset:24 glc
	global_load_b64 v[4:5], v103, s[24:25]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB11_195
; %bb.193:                              ; %.preheader.i.i.i35.i.preheader
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_mov_b32 s0, 0
.LBB11_194:                             ; %.preheader.i.i.i35.i
                                        ;   Parent Loop BB11_109 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v103, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB11_194
.LBB11_195:                             ; %__ockl_printf_append_args.exit39.i
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	flat_load_b32 v0, v[114:115]
	v_add_nc_u32_e32 v128, v38, v128
	v_add_nc_u32_e32 v55, v38, v55
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s2, vcc_lo, exec_lo
.LBB11_196:                             ; %Flow384
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s37
	v_add_nc_u32_e32 v129, v130, v129
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB11_204
; %bb.197:                              ;   in Loop: Header=BB11_109 Depth=1
	v_lshlrev_b64 v[0:1], 2, v[112:113]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v52, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, v51, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, 0x1000, v4
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v5, vcc_lo
	flat_load_b32 v0, v[1:2] offset:3144
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e64 s1, -1, v0
	v_cmpx_ne_u32_e32 -1, v0
	s_cbranch_execz .LBB11_201
; %bb.198:                              ;   in Loop: Header=BB11_109 Depth=1
	flat_load_b32 v2, v[1:2] offset:2736
	s_mov_b32 s4, -1
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 -1, v2
	s_cbranch_execz .LBB11_200
; %bb.199:                              ;   in Loop: Header=BB11_109 Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_co_u32 v8, vcc_lo, 0x1c48, v4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[6:7], 2, v[0:1]
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_xor_b32 s4, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v84, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v85, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v10, vcc_lo, v84, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, v85, v11, vcc_lo
	v_add_co_u32 v3, vcc_lo, 0x1ab0, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v5, vcc_lo
	s_clause 0x3
	flat_store_b32 v[6:7], v2 offset:2800
	flat_store_b32 v[10:11], v0 offset:3208
	flat_store_b32 v[8:9], v119
	flat_store_b32 v[3:4], v119
	s_clause 0x1
	flat_load_b32 v1, v[100:101]
	flat_load_b32 v3, v[98:99]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, -1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, v116, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v117, v2, vcc_lo
	s_clause 0x1
	flat_store_b32 v[98:99], v3
	flat_store_b32 v[1:2], v112
	flat_load_b32 v1, v[100:101]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, 1, v1
	flat_store_b32 v[100:101], v1
.LBB11_200:                             ; %Flow340
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s3, s4, exec_lo
	s_or_b32 s1, s1, s3
.LBB11_201:                             ; %Flow339
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s1, exec_lo, s2
	s_cbranch_execz .LBB11_203
; %bb.202:                              ;   in Loop: Header=BB11_109 Depth=1
	flat_load_b32 v0, v[86:87]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v52, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v51, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, 0x1000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_load_b32 v0, v[0:1] offset:3144
.LBB11_203:                             ; %Flow341
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, -1
.LBB11_204:                             ; %Flow386
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s0, s1, exec_lo
.LBB11_205:                             ; %Flow385
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s36
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s1
	s_cbranch_execz .LBB11_207
; %bb.206:                              ;   in Loop: Header=BB11_109 Depth=1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_lshlrev_b64 v[0:1], 2, v[112:113]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v52, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v51, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, 0x1000, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_load_b32 v0, v[0:1] offset:3144
.LBB11_207:                             ; %Flow387
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB11_208:                             ; %.backedge
                                        ;   in Loop: Header=BB11_109 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s35
	flat_load_b32 v1, v[96:97]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_mov_b32_e32 v112, v0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	s_or_b32 s29, vcc_lo, s29
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s29
	s_cbranch_execnz .LBB11_109
; %bb.209:                              ; %._crit_edge133.loopexit
	s_or_b32 exec_lo, exec_lo, s29
	flat_load_b32 v0, v[70:71]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v0, v50, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
.LBB11_210:                             ; %Flow389
	s_or_b32 exec_lo, exec_lo, s28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v52, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v51, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, 0x2000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_load_b32 v2, v[0:1] offset:3924
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v2, v2, v55
	flat_store_b32 v[0:1], v2 offset:3924
.LBB11_211:                             ; %Flow392
	s_or_b32 exec_lo, exec_lo, s27
	flat_load_b32 v0, v[70:71]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v0, v50, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v52, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v51, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, 0x2000, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v3, vcc_lo, 0x2000, v52
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v51, vcc_lo
	flat_load_b32 v2, v[0:1] offset:3964
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v2, v2, v55
	flat_store_b32 v[0:1], v2 offset:3964
	flat_load_b96 v[0:2], v[3:4] offset:3908
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mad_u64_u32 v[5:6], null, v55, v50, v[2:3]
	v_sub_nc_u32_e32 v0, v0, v55
	v_add_nc_u32_e32 v1, v1, v55
	s_delay_alu instid0(VALU_DEP_3)
	v_mov_b32_e32 v2, v5
	flat_store_b96 v[3:4], v[0:2] offset:3908
.LBB11_212:                             ; %Flow393
	s_or_b32 exec_lo, exec_lo, s26
	v_readlane_b32 s30, v40, 4
	v_readlane_b32 s31, v40, 5
	v_readlane_b32 s37, v40, 3
	v_readlane_b32 s36, v40, 2
	v_readlane_b32 s35, v40, 1
	v_readlane_b32 s34, v40, 0
	v_readlane_b32 s0, v40, 6
	s_or_saveexec_b32 s1, -1
	scratch_load_b32 v40, off, s33          ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s1
	s_add_i32 s32, s32, -16
	s_mov_b32 s33, s0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end11:
	.size	_ZN10gpu_ginkgo9OrderListILi100ELi10EE16getTradedThroughERiiPi, .Lfunc_end11-_ZN10gpu_ginkgo9OrderListILi100ELi10EE16getTradedThroughERiiPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 11584
; NumSgprs: 40
; NumVgprs: 131
; ScratchSize: 16
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function _ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE12processTradeERKbRKiRi
	.type	_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE12processTradeERKbRKiRi,@function
_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE12processTradeERKbRKiRi: ; @_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE12processTradeERKbRKiRi
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_mov_b32 s0, s33
	s_mov_b32 s33, s32
	s_or_saveexec_b32 s1, -1
	scratch_store_b32 off, v41, s33         ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s1
	v_writelane_b32 v41, s0, 2
	v_writelane_b32 v41, s30, 0
	s_add_i32 s32, s32, 16
	v_writelane_b32 v41, s31, 1
	v_dual_mov_b32 v132, v1 :: v_dual_mov_b32 v131, v0
	v_dual_mov_b32 v145, v5 :: v_dual_mov_b32 v84, v3
	v_dual_mov_b32 v83, v2 :: v_dual_mov_b32 v144, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v135, vcc_lo, 0x5f78, v131
	v_add_co_ci_u32_e32 v146, vcc_lo, 0, v132, vcc_lo
	v_dual_mov_b32 v134, v7 :: v_dual_mov_b32 v133, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, v135 :: v_dual_mov_b32 v3, v146
	s_mov_b64 s[38:39], s[8:9]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@hi+12
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v81, vcc_lo, 0x5f74, v131
	v_add_co_ci_u32_e32 v82, vcc_lo, 0, v132, vcc_lo
	v_dual_mov_b32 v4, v135 :: v_dual_mov_b32 v5, v146
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, v81 :: v_dual_mov_b32 v3, v82
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@hi+12
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v0, vcc_lo, 0xfc0, v131
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v132, vcc_lo
	v_add_co_u32 v4, vcc_lo, 0x2000, v131
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v132, vcc_lo
	flat_load_b64 v[2:3], v[0:1] offset:4020
	s_mov_b32 s4, 0
	s_mov_b32 s3, exec_lo
	flat_load_u8 v6, v[4:5] offset:3904
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v5, 31, v2
	v_mov_b32_e32 v4, v2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v24, 0xff, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, v0, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v1, v5, vcc_lo
	v_add_co_u32 v149, vcc_lo, 0x2f40, v131
	v_add_co_ci_u32_e32 v150, vcc_lo, 0, v132, vcc_lo
	flat_load_b32 v16, v[4:5] offset:3208
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v16, v3
	s_cbranch_execz .LBB12_19
; %bb.1:                                ; %.lr.ph.i
	v_add_co_u32 v6, s1, 0x2f50, v131
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s1, 0, v132, s1
	v_add_co_u32 v8, s1, 0x2f44, v131
	v_add_co_ci_u32_e64 v9, s1, 0, v132, s1
	v_add_co_u32 v10, s1, 0x2f48, v131
	v_add_co_u32 v0, vcc_lo, 0xfb4, v0
	v_add_co_ci_u32_e64 v11, s1, 0, v132, s1
	v_add_co_u32 v12, s1, 0x1f7c, v131
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, 0xfc0, v131
	v_add_co_ci_u32_e64 v13, s1, 0, v132, s1
	v_add_co_u32 v25, s1, 0x1de0, v131
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v132, vcc_lo
	v_add_co_u32 v4, vcc_lo, 0x1f78, v131
	v_add_co_ci_u32_e64 v26, s1, 0, v132, s1
	v_add_co_u32 v14, s1, 0x1f70, v131
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v132, vcc_lo
	v_cmp_eq_u16_e32 vcc_lo, 0, v24
	v_cmp_ne_u16_e64 s0, 0, v24
	v_add_co_ci_u32_e64 v15, s1, 0, v132, s1
	v_mov_b32_e32 v27, -1
.LBB12_2:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_i64_i32 v[17:18], null, v16, 28, v[2:3]
                                        ; implicit-def: $vgpr20
	s_clause 0x1
	flat_load_b32 v28, v[17:18]
	flat_load_b32 v17, v[81:82]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_gt_i32_e64 s1, v28, v17
	v_cmp_lt_i32_e64 s2, v28, v17
	v_ashrrev_i32_e32 v17, 31, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_or_b32 s1, vcc_lo, s1
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[18:19], 2, v[16:17]
	s_and_b32 s1, s1, s2
	s_xor_b32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB12_10
; %bb.3:                                ;   in Loop: Header=BB12_2 Depth=1
	flat_load_b32 v17, v[6:7]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v20, v28, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v21, 31, v20
	v_lshlrev_b64 v[20:21], 2, v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s1, v131, v20
	v_add_co_ci_u32_e64 v23, s1, v132, v21, s1
	v_mad_i64_i32 v[20:21], null, v16, 28, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v22, s1, 0x2000, v17
	v_add_co_ci_u32_e64 v23, s1, 0, v23, s1
	s_clause 0x1
	flat_load_b32 v29, v[20:21] offset:4
	flat_load_b32 v17, v[22:23] offset:3924
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v17, v17, v29
	flat_store_b32 v[22:23], v17 offset:3924
	s_clause 0x1
	flat_load_b32 v17, v[6:7]
	flat_load_b32 v22, v[8:9]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_sub_nc_u32_e32 v20, v28, v17
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v22, v22, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v21, 31, v20
	flat_store_b32 v[8:9], v22
	v_lshlrev_b64 v[20:21], 2, v[20:21]
	v_add_co_u32 v17, s1, v131, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v21, s1, v132, v21, s1
	v_add_co_u32 v20, s1, 0x2000, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v21, s1, 0, v21, s1
	flat_load_b32 v17, v[20:21] offset:3964
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v17, v17, v29
	flat_store_b32 v[20:21], v17 offset:3964
	flat_load_b64 v[20:21], v[10:11]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v17, v21 :: v_dual_add_nc_u32 v20, v20, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, v29, v28, v[17:18]
	v_add_co_u32 v22, s1, v131, v18
	v_add_co_ci_u32_e64 v19, s1, v132, v19, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s1, 0x1000, v22
	v_add_co_ci_u32_e64 v18, s1, 0, v19, s1
	flat_store_b64 v[10:11], v[20:21]
	flat_load_b32 v20, v[17:18] offset:3144
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e64 s5, -1, v20
	v_cmpx_ne_u32_e32 -1, v20
	s_cbranch_execz .LBB12_7
; %bb.4:                                ;   in Loop: Header=BB12_2 Depth=1
	flat_load_b32 v17, v[17:18] offset:2736
	s_mov_b32 s8, -1
	s_mov_b32 s7, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 -1, v17
	s_cbranch_execz .LBB12_6
; %bb.5:                                ;   in Loop: Header=BB12_2 Depth=1
	v_ashrrev_i32_e32 v21, 31, v20
	v_ashrrev_i32_e32 v18, 31, v17
	v_add_co_u32 v30, s1, 0x1c48, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v31, s1, 0, v19, s1
	v_lshlrev_b64 v[28:29], 2, v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[32:33], 2, v[17:18]
	s_xor_b32 s8, exec_lo, -1
	v_add_co_u32 v28, s1, v2, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v29, s1, v3, v29, s1
	v_add_co_u32 v32, s1, v2, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v33, s1, v3, v33, s1
	v_add_co_u32 v18, s1, 0x1ab0, v22
	v_add_co_ci_u32_e64 v19, s1, 0, v19, s1
	s_clause 0x3
	flat_store_b32 v[28:29], v17 offset:2800
	flat_store_b32 v[32:33], v20 offset:3208
	flat_store_b32 v[30:31], v27
	flat_store_b32 v[18:19], v27
	s_clause 0x1
	flat_load_b32 v17, v[14:15]
	flat_load_b32 v19, v[12:13]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v18, 31, v17
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v19, -1, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	v_add_co_u32 v17, s1, v25, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v18, s1, v26, v18, s1
	s_clause 0x1
	flat_store_b32 v[12:13], v19
	flat_store_b32 v[17:18], v16
	flat_load_b32 v16, v[14:15]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v16, 1, v16
	flat_store_b32 v[14:15], v16
.LBB12_6:                               ; %Flow186
                                        ;   in Loop: Header=BB12_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s5, exec_lo
	s_and_b32 s5, s8, exec_lo
	s_or_b32 s5, s1, s5
.LBB12_7:                               ; %Flow185
                                        ;   in Loop: Header=BB12_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB12_9
; %bb.8:                                ;   in Loop: Header=BB12_2 Depth=1
	flat_load_b32 v16, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v17, 31, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	v_add_co_u32 v16, s1, v131, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v17, s1, v132, v17, s1
	v_add_co_u32 v16, s1, 0x1000, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v17, s1, 0, v17, s1
	flat_load_b32 v20, v[16:17] offset:3144
.LBB12_9:                               ; %Flow187
                                        ;   in Loop: Header=BB12_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
                                        ; implicit-def: $vgpr18_vgpr19
                                        ; implicit-def: $vgpr28
                                        ; implicit-def: $vgpr16_vgpr17
.LBB12_10:                              ; %Flow192
                                        ;   in Loop: Header=BB12_2 Depth=1
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB12_18
; %bb.11:                               ;   in Loop: Header=BB12_2 Depth=1
	flat_load_b32 v17, v[6:7]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_mad_i64_i32 v[20:21], null, v16, 28, v[2:3]
	s_mov_b32 s5, exec_lo
	flat_load_b64 v[22:23], v[20:21] offset:8
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_sub_nc_u32_e32 v16, v28, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v17, 31, v16
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v23, v23, v22
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v16, s1, v135, v16
	v_add_co_ci_u32_e64 v17, s1, v146, v17, s1
	flat_load_b32 v28, v[16:17]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v28, v23
	s_cbranch_execz .LBB12_17
; %bb.12:                               ;   in Loop: Header=BB12_2 Depth=1
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr29
	v_cmpx_le_i32_e64 v28, v23
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB12_14
; %bb.13:                               ;   in Loop: Header=BB12_2 Depth=1
	v_ashrrev_i32_e32 v29, 31, v23
	v_mul_lo_u32 v22, v28, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v23, v23, v29
	v_xor_b32_e32 v23, v23, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v30, v23
	v_sub_nc_u32_e32 v31, 0, v23
	v_rcp_iflag_f32_e32 v30, v30
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v30, 0x4f7ffffe, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v30, v30
	v_mul_lo_u32 v28, v31, v30
	v_ashrrev_i32_e32 v31, 31, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v22, v22, v31
	v_xor_b32_e32 v29, v31, v29
	v_mul_hi_u32 v28, v30, v28
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v22, v22, v31
	v_add_nc_u32_e32 v28, v30, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v28, v22, v28
	v_mul_lo_u32 v30, v28, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v22, v22, v30
	v_add_nc_u32_e32 v30, 1, v28
	v_sub_nc_u32_e32 v32, v22, v23
	v_cmp_ge_u32_e64 s1, v22, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v28, v28, v30, s1
	v_cndmask_b32_e64 v22, v22, v32, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v30, 1, v28
	v_cmp_ge_u32_e64 s1, v22, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v22, v28, v30, s1
	v_xor_b32_e32 v28, v22, v29
	v_add_co_u32 v22, s1, v20, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v23, s1, 0, v21, s1
	v_sub_nc_u32_e32 v28, v28, v29
	flat_store_b32 v[22:23], v28
	flat_load_b32 v16, v[16:17]
                                        ; implicit-def: $vgpr22_vgpr23
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v29, v16, v28
                                        ; implicit-def: $vgpr28
.LBB12_14:                              ; %Flow189
                                        ;   in Loop: Header=BB12_2 Depth=1
	s_and_not1_saveexec_b32 s1, s6
; %bb.15:                               ;   in Loop: Header=BB12_2 Depth=1
	v_sub_nc_u32_e32 v29, v28, v22
; %bb.16:                               ; %.sink.split.i.i
                                        ;   in Loop: Header=BB12_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	flat_store_b32 v[20:21], v29 offset:12
.LBB12_17:                              ; %Flow191
                                        ;   in Loop: Header=BB12_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_add_co_u32 v16, s1, v131, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v17, s1, v132, v19, s1
	v_add_co_u32 v16, s1, 0x1000, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v17, s1, 0, v17, s1
	flat_load_b32 v20, v[16:17] offset:3144
.LBB12_18:                              ; %Flow193
                                        ;   in Loop: Header=BB12_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	flat_load_b32 v16, v[4:5]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e64 s1, v20, v16
	v_mov_b32_e32 v16, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s4, s1, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB12_2
.LBB12_19:                              ; %Flow195
	s_or_b32 exec_lo, exec_lo, s3
	v_add_co_u32 v9, vcc_lo, 0x2000, v131
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v132, vcc_lo
	v_add_co_u32 v85, vcc_lo, 0x5000, v131
	v_add_co_ci_u32_e32 v86, vcc_lo, 0, v132, vcc_lo
	flat_load_b96 v[0:2], v[9:10] offset:3912
	v_add_co_u32 v160, vcc_lo, 0x5f60, v131
	s_clause 0x1
	flat_load_b96 v[6:8], v[85:86] offset:3936
	flat_load_b32 v3, v[85:86] offset:4036
	v_add_co_ci_u32_e32 v161, vcc_lo, 0, v132, vcc_lo
	v_cmp_eq_u16_e32 vcc_lo, 0, v24
	v_add_co_u32 v164, s0, 0x2f48, v131
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v165, s0, 0, v132, s0
	v_add_co_u32 v162, s1, 0x5fc4, v131
	v_add_co_ci_u32_e64 v163, s1, 0, v132, s1
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_sub_nc_u32_e32 v4, 0, v0
	v_mov_b32_e32 v11, 0
	v_sub_nc_u32_e32 v13, 0, v1
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_add_nc_u32_e32 v7, v7, v0
	v_dual_cndmask_b32 v4, v4, v0 :: v_dual_add_nc_u32 v5, 10, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v12, v11 :: v_dual_cndmask_b32 v1, v1, v13
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v3, v2
	v_cmp_lt_i32_e64 s0, v3, v5
	v_add_nc_u32_e32 v8, v8, v4
	v_add_nc_u32_e32 v6, v6, v1
	s_clause 0x1
	flat_store_b96 v[85:86], v[6:8] offset:3936
	flat_store_b64 v[9:10], v[11:12] offset:3912
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB12_24
; %bb.20:                               ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit.preheader
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v1, 31, v2
	v_mov_b32_e32 v0, v2
                                        ; implicit-def: $sgpr3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 2, v[3:4]
	v_add_nc_u32_e32 v3, 1, v3
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v0, vcc_lo, v6, v0
	v_sub_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, v131
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v132, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, 0x2f54, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB12_21:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit
                                        ; =>This Inner Loop Header: Depth=1
	flat_load_b32 v4, v[0:1]
	s_or_b32 s3, s3, exec_lo
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB12_23
; %bb.22:                               ;   in Loop: Header=BB12_21 Depth=1
	v_cmp_lt_i32_e32 vcc_lo, v3, v2
	v_cmp_ge_i32_e64 s0, v3, v5
	flat_store_b32 v[162:163], v3
	v_add_nc_u32_e32 v3, 1, v3
	s_and_not1_b32 s3, s3, exec_lo
	s_or_b32 s0, vcc_lo, s0
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s3, s3, s0
.LBB12_23:                              ; %Flow180
                                        ;   in Loop: Header=BB12_21 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s3
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB12_21
.LBB12_24:                              ; %Flow182
	s_or_b32 exec_lo, exec_lo, s2
	v_add_co_u32 v147, vcc_lo, 0x2fb0, v131
	v_add_co_ci_u32_e32 v148, vcc_lo, 0, v132, vcc_lo
	v_dual_mov_b32 v2, v135 :: v_dual_mov_b32 v3, v146
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v0, v147 :: v_dual_mov_b32 v1, v148
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@hi+12
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x5f70, v131
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v132, vcc_lo
	v_dual_mov_b32 v4, v135 :: v_dual_mov_b32 v5, v146
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v0, vcc_lo, 0x3f70, v131
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v132, vcc_lo
	s_mov_b32 s4, 0
	s_mov_b32 s3, exec_lo
	s_clause 0x1
	flat_load_b64 v[4:5], v[0:1] offset:4020
	flat_load_u8 v26, v[85:86] offset:3824
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v7, 31, v4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v6, v4 :: v_dual_and_b32 v27, 0xff, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, v0, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v7, vcc_lo
	v_add_co_u32 v166, vcc_lo, 0x5ef0, v131
	v_add_co_ci_u32_e32 v167, vcc_lo, 0, v132, vcc_lo
	flat_load_b32 v18, v[6:7] offset:3208
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v18, v5
	s_cbranch_execz .LBB12_43
; %bb.25:                               ; %.lr.ph.i31
	v_add_co_u32 v8, s1, 0x5f00, v131
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s1, 0, v132, s1
	v_add_co_u32 v10, s1, 0x5ef4, v131
	v_add_co_ci_u32_e64 v11, s1, 0, v132, s1
	v_add_co_u32 v12, s1, 0x5ef8, v131
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s1, 0, v132, s1
	v_add_co_u32 v14, s1, 0x4f2c, v131
	v_add_co_u32 v4, vcc_lo, 0xfb4, v0
	v_add_co_ci_u32_e64 v15, s1, 0, v132, s1
	v_add_co_u32 v28, s1, 0x4d90, v131
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, 0x4f28, v131
	v_add_co_ci_u32_e64 v29, s1, 0, v132, s1
	v_add_co_u32 v16, s1, 0x4f20, v131
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v132, vcc_lo
	v_cmp_eq_u16_e32 vcc_lo, 0, v27
	v_cmp_ne_u16_e64 s0, 0, v27
	v_add_co_ci_u32_e64 v17, s1, 0, v132, s1
	v_mov_b32_e32 v30, -1
.LBB12_26:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_i64_i32 v[19:20], null, v18, 28, v[0:1]
                                        ; implicit-def: $vgpr22
	s_clause 0x1
	flat_load_b32 v31, v[19:20]
	flat_load_b32 v19, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_gt_i32_e64 s1, v31, v19
	v_cmp_lt_i32_e64 s2, v31, v19
	v_ashrrev_i32_e32 v19, 31, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_or_b32 s1, vcc_lo, s1
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[20:21], 2, v[18:19]
	s_and_b32 s1, s1, s2
	s_xor_b32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB12_34
; %bb.27:                               ;   in Loop: Header=BB12_26 Depth=1
	flat_load_b32 v19, v[8:9]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v22, v31, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v23, 31, v22
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v19, s1, v147, v22
	v_add_co_ci_u32_e64 v25, s1, v148, v23, s1
	v_mad_i64_i32 v[22:23], null, v18, 28, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v24, s1, 0x2000, v19
	v_add_co_ci_u32_e64 v25, s1, 0, v25, s1
	s_clause 0x1
	flat_load_b32 v32, v[22:23] offset:4
	flat_load_b32 v19, v[24:25] offset:3924
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v19, v19, v32
	flat_store_b32 v[24:25], v19 offset:3924
	s_clause 0x1
	flat_load_b32 v19, v[8:9]
	flat_load_b32 v24, v[10:11]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_sub_nc_u32_e32 v22, v31, v19
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v24, v24, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v23, 31, v22
	flat_store_b32 v[10:11], v24
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	v_add_co_u32 v19, s1, v147, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v23, s1, v148, v23, s1
	v_add_co_u32 v22, s1, 0x2000, v19
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v23, s1, 0, v23, s1
	flat_load_b32 v19, v[22:23] offset:3964
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v19, v19, v32
	flat_store_b32 v[22:23], v19 offset:3964
	flat_load_b64 v[22:23], v[12:13]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v19, v23 :: v_dual_add_nc_u32 v22, v22, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[23:24], null, v32, v31, v[19:20]
	v_add_co_u32 v24, s1, v147, v20
	v_add_co_ci_u32_e64 v25, s1, v148, v21, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v31, s1, 0x1000, v24
	v_add_co_ci_u32_e64 v32, s1, 0, v25, s1
	flat_store_b64 v[12:13], v[22:23]
	flat_load_b32 v22, v[31:32] offset:3144
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e64 s5, -1, v22
	v_cmpx_ne_u32_e32 -1, v22
	s_cbranch_execz .LBB12_31
; %bb.28:                               ;   in Loop: Header=BB12_26 Depth=1
	v_add_co_u32 v31, s1, v131, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v21, s1, v132, v21, s1
	s_mov_b32 s8, -1
	v_add_co_u32 v19, s1, 0x4000, v31
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v20, s1, 0, v21, s1
	s_mov_b32 s7, exec_lo
	flat_load_b32 v19, v[19:20] offset:2656
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 -1, v19
	s_cbranch_execz .LBB12_30
; %bb.29:                               ;   in Loop: Header=BB12_26 Depth=1
	v_ashrrev_i32_e32 v23, 31, v22
	v_ashrrev_i32_e32 v20, 31, v19
	s_xor_b32 s8, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[32:33], 2, v[22:23]
	v_add_co_u32 v23, s1, 0x1c48, v24
	v_lshlrev_b64 v[34:35], 2, v[19:20]
	v_add_co_ci_u32_e64 v24, s1, 0, v25, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v32, s1, v0, v32
	v_add_co_ci_u32_e64 v33, s1, v1, v33, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v34, s1, v0, v34
	v_add_co_ci_u32_e64 v35, s1, v1, v35, s1
	v_add_co_u32 v20, s1, 0x4a60, v31
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v21, s1, 0, v21, s1
	s_clause 0x3
	flat_store_b32 v[32:33], v19 offset:2800
	flat_store_b32 v[34:35], v22 offset:3208
	flat_store_b32 v[23:24], v30
	flat_store_b32 v[20:21], v30
	s_clause 0x1
	flat_load_b32 v19, v[16:17]
	flat_load_b32 v21, v[14:15]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v20, 31, v19
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v21, -1, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 2, v[19:20]
	v_add_co_u32 v19, s1, v28, v19
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v20, s1, v29, v20, s1
	s_clause 0x1
	flat_store_b32 v[14:15], v21
	flat_store_b32 v[19:20], v18
	flat_load_b32 v18, v[16:17]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v18, 1, v18
	flat_store_b32 v[16:17], v18
.LBB12_30:                              ; %Flow170
                                        ;   in Loop: Header=BB12_26 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s5, exec_lo
	s_and_b32 s5, s8, exec_lo
	s_or_b32 s5, s1, s5
.LBB12_31:                              ; %Flow169
                                        ;   in Loop: Header=BB12_26 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB12_33
; %bb.32:                               ;   in Loop: Header=BB12_26 Depth=1
	flat_load_b32 v18, v[4:5]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v19, 31, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[18:19], 2, v[18:19]
	v_add_co_u32 v18, s1, v131, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v19, s1, v132, v19, s1
	v_add_co_u32 v18, s1, 0x4000, v18
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v19, s1, 0, v19, s1
	flat_load_b32 v22, v[18:19] offset:3064
.LBB12_33:                              ; %Flow171
                                        ;   in Loop: Header=BB12_26 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
                                        ; implicit-def: $vgpr20_vgpr21
                                        ; implicit-def: $vgpr31
                                        ; implicit-def: $vgpr18_vgpr19
.LBB12_34:                              ; %Flow176
                                        ;   in Loop: Header=BB12_26 Depth=1
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB12_42
; %bb.35:                               ;   in Loop: Header=BB12_26 Depth=1
	flat_load_b32 v19, v[8:9]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_mad_i64_i32 v[22:23], null, v18, 28, v[0:1]
	s_mov_b32 s5, exec_lo
	flat_load_b64 v[24:25], v[22:23] offset:8
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_sub_nc_u32_e32 v18, v31, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v19, 31, v18
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v25, v25, v24
	v_lshlrev_b64 v[18:19], 2, v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v18, s1, v135, v18
	v_add_co_ci_u32_e64 v19, s1, v146, v19, s1
	flat_load_b32 v31, v[18:19]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v31, v25
	s_cbranch_execz .LBB12_41
; %bb.36:                               ;   in Loop: Header=BB12_26 Depth=1
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr32
	v_cmpx_le_i32_e64 v31, v25
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB12_38
; %bb.37:                               ;   in Loop: Header=BB12_26 Depth=1
	v_ashrrev_i32_e32 v32, 31, v25
	v_mul_lo_u32 v24, v31, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v25, v25, v32
	v_xor_b32_e32 v25, v25, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v33, v25
	v_sub_nc_u32_e32 v34, 0, v25
	v_rcp_iflag_f32_e32 v33, v33
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v33, 0x4f7ffffe, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v33, v33
	v_mul_lo_u32 v31, v34, v33
	v_ashrrev_i32_e32 v34, 31, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v24, v24, v34
	v_xor_b32_e32 v32, v34, v32
	v_mul_hi_u32 v31, v33, v31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v24, v24, v34
	v_add_nc_u32_e32 v31, v33, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v31, v24, v31
	v_mul_lo_u32 v33, v31, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v24, v24, v33
	v_add_nc_u32_e32 v33, 1, v31
	v_sub_nc_u32_e32 v35, v24, v25
	v_cmp_ge_u32_e64 s1, v24, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v31, v31, v33, s1
	v_cndmask_b32_e64 v24, v24, v35, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v33, 1, v31
	v_cmp_ge_u32_e64 s1, v24, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v24, v31, v33, s1
	v_xor_b32_e32 v31, v24, v32
	v_add_co_u32 v24, s1, v22, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v25, s1, 0, v23, s1
	v_sub_nc_u32_e32 v31, v31, v32
	flat_store_b32 v[24:25], v31
	flat_load_b32 v18, v[18:19]
                                        ; implicit-def: $vgpr24_vgpr25
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v32, v18, v31
                                        ; implicit-def: $vgpr31
.LBB12_38:                              ; %Flow173
                                        ;   in Loop: Header=BB12_26 Depth=1
	s_and_not1_saveexec_b32 s1, s6
; %bb.39:                               ;   in Loop: Header=BB12_26 Depth=1
	v_sub_nc_u32_e32 v32, v31, v24
; %bb.40:                               ; %.sink.split.i.i43
                                        ;   in Loop: Header=BB12_26 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	flat_store_b32 v[22:23], v32 offset:12
.LBB12_41:                              ; %Flow175
                                        ;   in Loop: Header=BB12_26 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_add_co_u32 v18, s1, v131, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v19, s1, v132, v21, s1
	v_add_co_u32 v18, s1, 0x4000, v18
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v19, s1, 0, v19, s1
	flat_load_b32 v22, v[18:19] offset:3064
.LBB12_42:                              ; %Flow177
                                        ;   in Loop: Header=BB12_26 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	flat_load_b32 v18, v[6:7]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e64 s1, v22, v18
	v_mov_b32_e32 v18, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s4, s1, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB12_26
.LBB12_43:                              ; %Flow179
	s_or_b32 exec_lo, exec_lo, s3
	s_clause 0x2
	flat_load_b96 v[4:6], v[85:86] offset:3832
	flat_load_b96 v[7:9], v[160:161]
	flat_load_b32 v0, v[85:86] offset:4040
	v_mov_b32_e32 v11, 0
	v_cmp_eq_u16_e32 vcc_lo, 0, v27
	v_add_co_u32 v178, s0, 0x5ef8, v131
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v179, s0, 0, v132, s0
	v_add_co_u32 v176, s1, 0x5fc8, v131
	v_add_co_ci_u32_e64 v177, s1, 0, v132, s1
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_add_nc_u32_e32 v10, 10, v6
	v_sub_nc_u32_e32 v1, 0, v4
	v_sub_nc_u32_e32 v13, 0, v5
	v_mov_b32_e32 v12, v11
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_add_nc_u32_e32 v8, v8, v4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_lt_i32_e64 s0, v0, v10
	v_cndmask_b32_e32 v1, v1, v4, vcc_lo
	v_cndmask_b32_e32 v5, v5, v13, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v0, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v9, v9, v1
	v_add_nc_u32_e32 v7, v7, v5
	s_and_b32 s0, vcc_lo, s0
	s_clause 0x1
	flat_store_b96 v[160:161], v[7:9]
	flat_store_b64 v[85:86], v[11:12] offset:3832
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB12_49
; %bb.44:                               ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit51.preheader
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v5, 31, v6
	v_mov_b32_e32 v4, v6
                                        ; implicit-def: $sgpr3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[0:1]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v1, vcc_lo, v11, v4
	v_sub_co_ci_u32_e32 v4, vcc_lo, v12, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, v1, v131
	v_add_co_ci_u32_e32 v5, vcc_lo, v4, v132, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, 0x5f04, v1
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
.LBB12_45:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit51
                                        ; =>This Inner Loop Header: Depth=1
	flat_load_b32 v1, v[4:5]
	s_or_b32 s3, s3, exec_lo
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB12_47
; %bb.46:                               ;   in Loop: Header=BB12_45 Depth=1
	v_add_nc_u32_e32 v1, -1, v0
	v_cmp_le_i32_e32 vcc_lo, v0, v6
	v_add_co_u32 v4, s0, v4, -4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v5, s0, -1, v5, s0
	v_mov_b32_e32 v0, v1
	s_and_not1_b32 s0, s3, exec_lo
	s_and_b32 s3, vcc_lo, exec_lo
	flat_store_b32 v[176:177], v1
	s_or_b32 s3, s0, s3
.LBB12_47:                              ; %Flow165
                                        ;   in Loop: Header=BB12_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s3
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB12_45
; %bb.48:                               ; %Flow166
	s_or_b32 exec_lo, exec_lo, s1
.LBB12_49:                              ; %Flow167
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	flat_load_u8 v1, v[83:84]
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u16_e32 0, v1
	s_xor_b32 s40, exec_lo, s0
	s_cbranch_execz .LBB12_60
; %bb.50:
	flat_load_b32 v2, v[81:82]
	flat_load_b32 v1, v[144:145]
	flat_load_b32 v3, v[133:134]
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, 0
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_max_i32_e32 v149, v2, v0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e64 s0, 0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, v149, v1
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s41, s0
	s_cbranch_execz .LBB12_54
; %bb.51:                               ; %.lr.ph.preheader
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v3, 31, v2
	s_mov_b32 s42, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_cndmask_b32 v1, v3, v1 :: v_dual_cndmask_b32 v0, v2, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, v131
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v132, vcc_lo
	v_add_co_u32 v150, vcc_lo, 0x5f00, v131
	v_add_co_ci_u32_e32 v151, vcc_lo, 0, v132, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v162, vcc_lo, 0x5f78, v0
	v_add_co_ci_u32_e32 v163, vcc_lo, 0, v1, vcc_lo
.LBB12_52:                              ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	flat_load_b32 v164, v[150:151]
	v_dual_mov_b32 v0, v147 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, v133 :: v_dual_mov_b32 v3, v134
	v_dual_mov_b32 v4, v149 :: v_dual_mov_b32 v5, v135
	v_mov_b32_e32 v6, v146
	s_mov_b64 s[8:9], s[38:39]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16getTradedThroughERiiPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16getTradedThroughERiiPi@rel32@hi+12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v165, 31, v164
	s_swappc_b64 s[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[164:165]
	v_sub_co_u32 v0, vcc_lo, v162, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_co_ci_u32_e32 v1, vcc_lo, v163, v1, vcc_lo
	v_add_co_u32 v162, s1, v162, -4
	flat_load_b32 v2, v[133:134]
	flat_load_b32 v3, v[0:1]
	v_add_co_ci_u32_e64 v163, s1, -1, v163, s1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_min_i32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v2
	flat_store_b32 v[0:1], v3
	flat_load_b32 v0, v[133:134]
	v_add_nc_u32_e32 v3, -1, v149
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v1, v0, v2
	v_cmp_eq_u32_e32 vcc_lo, v0, v2
	flat_store_b32 v[133:134], v1
	flat_load_b32 v1, v[144:145]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_le_i32_e64 s0, v149, v1
	v_mov_b32_e32 v149, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, vcc_lo
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s42, s0, s42
	s_and_not1_b32 exec_lo, exec_lo, s42
	s_cbranch_execnz .LBB12_52
; %bb.53:                               ; %.critedge.loopexit
	s_or_b32 exec_lo, exec_lo, s42
	s_clause 0x3
	flat_load_b96 v[4:6], v[178:179]
	flat_load_u8 v26, v[166:167]
	flat_load_b96 v[7:9], v[160:161]
	flat_load_b32 v0, v[176:177]
	s_waitcnt vmcnt(3) lgkmcnt(3)
	v_add_nc_u32_e32 v10, 10, v6
.LBB12_54:                              ; %Flow158
	s_or_b32 exec_lo, exec_lo, s41
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_and_b32_e32 v1, 0xff, v26
	v_sub_nc_u32_e32 v3, 0, v4
	v_sub_nc_u32_e32 v11, 0, v5
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_lt_i32_e64 s0, v0, v10
	s_mov_b32 s1, 0
	v_cmp_eq_u16_e32 vcc_lo, 0, v1
	v_dual_cndmask_b32 v5, v5, v11 :: v_dual_add_nc_u32 v2, v8, v4
	v_dual_cndmask_b32 v1, v3, v4 :: v_dual_mov_b32 v4, 0
	v_cmp_ge_i32_e32 vcc_lo, v0, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v3, v9, v1
	v_add_nc_u32_e32 v1, v7, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_mov_b32_e32 v5, v4
	s_and_b32 s0, vcc_lo, s0
	s_clause 0x1
	flat_store_b96 v[160:161], v[1:3]
	flat_store_b64 v[178:179], v[4:5]
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB12_59
; %bb.55:                               ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit56.preheader
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v3, 31, v6
	v_mov_b32_e32 v2, v6
                                        ; implicit-def: $sgpr3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v1, vcc_lo, v4, v1
	v_sub_co_ci_u32_e32 v2, vcc_lo, v5, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, v1, v131
	v_add_co_ci_u32_e32 v3, vcc_lo, v2, v132, vcc_lo
	v_add_nc_u32_e32 v2, 1, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, 0x5f04, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v3, vcc_lo
.LBB12_56:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit56
                                        ; =>This Inner Loop Header: Depth=1
	flat_load_b32 v3, v[0:1]
	s_or_b32 s3, s3, exec_lo
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB12_58
; %bb.57:                               ;   in Loop: Header=BB12_56 Depth=1
	v_add_nc_u32_e32 v3, -2, v2
	v_add_nc_u32_e32 v2, -1, v2
	v_add_co_u32 v0, s0, v0, -4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v1, s0, -1, v1, s0
	v_cmp_le_i32_e32 vcc_lo, v2, v6
	s_and_not1_b32 s0, s3, exec_lo
	flat_store_b32 v[176:177], v3
	s_and_b32 s3, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s3, s0, s3
.LBB12_58:                              ; %Flow
                                        ;   in Loop: Header=BB12_56 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s3
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB12_56
.LBB12_59:                              ; %Flow157
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr149_vgpr150
                                        ; implicit-def: $vgpr160_vgpr161
                                        ; implicit-def: $vgpr164_vgpr165
                                        ; implicit-def: $vgpr162_vgpr163
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr133
                                        ; implicit-def: $vgpr131_vgpr132
                                        ; implicit-def: $vgpr144_vgpr145
                                        ; implicit-def: $vgpr135
                                        ; implicit-def: $vgpr146
.LBB12_60:                              ; %Flow163
	s_and_not1_saveexec_b32 s40, s40
	s_cbranch_execz .LBB12_71
; %bb.61:
	s_clause 0x1
	flat_load_b32 v0, v[2:3]
	flat_load_b32 v3, v[162:163]
	flat_load_b32 v1, v[144:145]
	flat_load_b32 v2, v[133:134]
	s_mov_b32 s42, 0
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_min_i32_e32 v147, v0, v3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e64 s0, 0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e32 vcc_lo, v147, v1
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s41, s0
	s_cbranch_execz .LBB12_65
; %bb.62:                               ; %.lr.ph100.preheader
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_i64_e32 vcc_lo, v[3:4], v[0:1]
	v_dual_cndmask_b32 v1, v1, v4 :: v_dual_cndmask_b32 v0, v0, v3
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, v131
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v132, vcc_lo
	v_add_co_u32 v166, vcc_lo, 0x2f50, v131
	v_add_co_ci_u32_e32 v167, vcc_lo, 0, v132, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v148, vcc_lo, 0x5f78, v0
	v_add_co_ci_u32_e32 v151, vcc_lo, 0, v1, vcc_lo
.LBB12_63:                              ; %.lr.ph100
                                        ; =>This Inner Loop Header: Depth=1
	flat_load_b32 v176, v[166:167]
	v_dual_mov_b32 v0, v131 :: v_dual_mov_b32 v1, v132
	v_dual_mov_b32 v2, v133 :: v_dual_mov_b32 v3, v134
	v_mov_b32_e32 v4, v147
	v_dual_mov_b32 v5, v135 :: v_dual_mov_b32 v6, v146
	s_mov_b64 s[8:9], s[38:39]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16getTradedThroughERiiPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16getTradedThroughERiiPi@rel32@hi+12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v177, 31, v176
	s_swappc_b64 s[30:31], s[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[176:177]
	v_sub_co_u32 v0, vcc_lo, v148, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_co_ci_u32_e32 v1, vcc_lo, v151, v1, vcc_lo
	v_add_co_u32 v148, s1, v148, 4
	flat_load_b32 v2, v[133:134]
	flat_load_b32 v3, v[0:1]
	v_add_co_ci_u32_e64 v151, s1, 0, v151, s1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_min_i32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v2
	flat_store_b32 v[0:1], v3
	flat_load_b32 v0, v[133:134]
	v_add_nc_u32_e32 v3, 1, v147
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v1, v0, v2
	v_cmp_eq_u32_e32 vcc_lo, v0, v2
	flat_store_b32 v[133:134], v1
	flat_load_b32 v1, v[144:145]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ge_i32_e64 s0, v147, v1
	v_mov_b32_e32 v147, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, vcc_lo
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s42, s0, s42
	s_and_not1_b32 exec_lo, exec_lo, s42
	s_cbranch_execnz .LBB12_63
; %bb.64:                               ; %.critedge2.loopexit
	s_or_b32 exec_lo, exec_lo, s42
	s_clause 0x1
	flat_load_b96 v[7:9], v[160:161]
	flat_load_b32 v3, v[162:163]
.LBB12_65:                              ; %Flow162
	s_or_b32 exec_lo, exec_lo, s41
	s_clause 0x1
	flat_load_b96 v[0:2], v[164:165]
	flat_load_u8 v4, v[149:150]
	v_mov_b32_e32 v10, 0
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_add_nc_u32_e32 v5, 10, v2
	v_sub_nc_u32_e32 v6, 0, v0
	v_sub_nc_u32_e32 v11, 0, v1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v4
	v_add_nc_u32_e32 v8, v8, v0
	v_cmp_lt_i32_e64 s0, v3, v5
	v_dual_cndmask_b32 v4, v6, v0 :: v_dual_cndmask_b32 v1, v1, v11
	v_cmp_ge_i32_e32 vcc_lo, v3, v2
	v_mov_b32_e32 v11, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v9, v9, v4
	v_add_nc_u32_e32 v7, v7, v1
	s_and_b32 s0, vcc_lo, s0
	s_clause 0x1
	flat_store_b96 v[160:161], v[7:9]
	flat_store_b64 v[164:165], v[10:11]
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB12_70
; %bb.66:                               ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit61.preheader
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v1, 31, v2
	v_mov_b32_e32 v0, v2
                                        ; implicit-def: $sgpr3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 2, v[3:4]
	v_add_nc_u32_e32 v3, 1, v3
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v0, vcc_lo, v6, v0
	v_sub_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, v131
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v132, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, 0x2f54, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB12_67:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit61
                                        ; =>This Inner Loop Header: Depth=1
	flat_load_b32 v4, v[0:1]
	s_or_b32 s3, s3, exec_lo
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB12_69
; %bb.68:                               ;   in Loop: Header=BB12_67 Depth=1
	v_cmp_lt_i32_e32 vcc_lo, v3, v2
	v_cmp_ge_i32_e64 s0, v3, v5
	flat_store_b32 v[162:163], v3
	v_add_nc_u32_e32 v3, 1, v3
	s_and_not1_b32 s3, s3, exec_lo
	s_or_b32 s0, vcc_lo, s0
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s3, s3, s0
.LBB12_69:                              ; %Flow159
                                        ;   in Loop: Header=BB12_67 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s3
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB12_67
.LBB12_70:                              ; %Flow161
	s_or_b32 exec_lo, exec_lo, s2
.LBB12_71:                              ; %Flow164
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s40
	v_readlane_b32 s30, v41, 0
	v_readlane_b32 s31, v41, 1
	v_readlane_b32 s0, v41, 2
	s_or_saveexec_b32 s1, -1
	scratch_load_b32 v41, off, s33          ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s1
	s_add_i32 s32, s32, -16
	s_mov_b32 s33, s0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end12:
	.size	_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE12processTradeERKbRKiRi, .Lfunc_end12-_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE12processTradeERKbRKiRi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 6236
; NumSgprs: 45
; NumVgprs: 180
; ScratchSize: 32
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function _ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE22cancelAndSendNewOrdersEv
	.type	_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE22cancelAndSendNewOrdersEv,@function
_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE22cancelAndSendNewOrdersEv: ; @_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE22cancelAndSendNewOrdersEv
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	flat_load_b64 v[2:3], v[0:1] offset:4020
	v_add_co_u32 v4, vcc_lo, 0x5000, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v1, vcc_lo
	s_mov_b32 s2, 0
	s_mov_b32 s1, exec_lo
	flat_load_b64 v[11:12], v[4:5] offset:3952
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v7, 31, v2
	v_mov_b32_e32 v6, v2
	flat_load_b32 v2, v[4:5] offset:4040
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	flat_store_b64 v[4:5], v[11:12] offset:4000
	v_add_nc_u32_e32 v12, 4, v11
	v_add_co_u32 v6, vcc_lo, v0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v7, vcc_lo
	v_add_co_u32 v9, vcc_lo, 0x5fc8, v0
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v1, vcc_lo
	flat_load_b32 v6, v[6:7] offset:3208
	s_waitcnt vmcnt(1) lgkmcnt(2)
	v_add_nc_u32_e32 v13, 1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_max_i32_e32 v68, v11, v13
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v6, v3
	s_cbranch_execz .LBB13_19
; %bb.1:                                ; %.lr.ph.i
	v_add_co_u32 v2, vcc_lo, 0x2000, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v1, vcc_lo
	v_mov_b32_e32 v21, -1
	flat_load_b64 v[7:8], v[2:3] offset:4008
	v_add_co_u32 v2, vcc_lo, 0x2f50, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, 0x2f44, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v18, vcc_lo, 0xe20, v0
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v1, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v20, v7, v8
.LBB13_2:                               ; =>This Inner Loop Header: Depth=1
	v_mad_i64_i32 v[14:15], null, v6, 28, v[0:1]
	v_ashrrev_i32_e32 v7, 31, v6
	v_mov_b32_e32 v22, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[6:7]
	flat_load_b32 v16, v[14:15]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v16, v68
	v_cmp_le_i32_e64 s0, v16, v12
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s0
	s_xor_b32 s0, exec_lo, s3
	s_cbranch_execz .LBB13_4
; %bb.3:                                ;   in Loop: Header=BB13_2 Depth=1
	v_add_co_u32 v6, vcc_lo, v0, v7
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v8, vcc_lo
                                        ; implicit-def: $vgpr16
                                        ; implicit-def: $vgpr14_vgpr15
                                        ; implicit-def: $vgpr22
	flat_load_b32 v6, v[6:7] offset:3208
                                        ; implicit-def: $vgpr7_vgpr8
.LBB13_4:                               ; %Flow151
                                        ;   in Loop: Header=BB13_2 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB13_18
; %bb.5:                                ;   in Loop: Header=BB13_2 Depth=1
	flat_load_b32 v17, v[2:3]
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v17, 31, v16
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v16, vcc_lo, v0, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, v1, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v23, vcc_lo, 0x2000, v16
	v_add_co_ci_u32_e32 v24, vcc_lo, 0, v17, vcc_lo
	flat_load_b32 v23, v[23:24] offset:3924
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 0, v23
	s_cbranch_execz .LBB13_7
; %bb.6:                                ;   in Loop: Header=BB13_2 Depth=1
	v_add_co_u32 v16, vcc_lo, 0x2f54, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v17, vcc_lo
	v_sub_nc_u32_e32 v23, 0, v23
	flat_store_b32 v[16:17], v23
.LBB13_7:                               ;   in Loop: Header=BB13_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_i64_i32 v[16:17], null, v6, 28, v[0:1]
	flat_load_b32 v6, v[16:17] offset:20
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_nlt_f32_e32 vcc_lo, v6, v20
                                        ; implicit-def: $vgpr6
	s_and_saveexec_b32 s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB13_15
; %bb.8:                                ;   in Loop: Header=BB13_2 Depth=1
	s_clause 0x1
	flat_load_b64 v[14:15], v[14:15]
	flat_load_b32 v6, v[2:3]
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v23, v14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v24, 31, v23
	v_lshlrev_b64 v[23:24], 2, v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v0, v23
	v_add_co_ci_u32_e32 v14, vcc_lo, v1, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v23, vcc_lo, 0x2000, v6
	v_add_co_ci_u32_e32 v24, vcc_lo, 0, v14, vcc_lo
	flat_load_b32 v6, v[23:24] offset:3924
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v6, v6, v15
	flat_store_b32 v[23:24], v6 offset:3924
	s_clause 0x1
	flat_load_b32 v6, v[16:17] offset:4
	flat_load_b32 v14, v[4:5]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v6, v14, v6
	v_add_co_u32 v14, vcc_lo, v0, v7
	v_add_co_ci_u32_e32 v15, vcc_lo, v1, v8, vcc_lo
	flat_store_b32 v[4:5], v6
	flat_load_b32 v6, v[14:15] offset:3208
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e64 s4, -1, v6
	v_cmpx_ne_u32_e32 -1, v6
	s_cbranch_execz .LBB13_12
; %bb.9:                                ;   in Loop: Header=BB13_2 Depth=1
	flat_load_b32 v16, v[14:15] offset:2800
	s_mov_b32 s7, -1
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 -1, v16
	s_cbranch_execz .LBB13_11
; %bb.10:                               ;   in Loop: Header=BB13_2 Depth=1
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v17, 31, v16
	v_add_co_u32 v23, vcc_lo, 0xc88, v14
	v_add_co_ci_u32_e32 v24, vcc_lo, 0, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[7:8], 2, v[6:7]
	v_lshlrev_b64 v[25:26], 2, v[16:17]
	s_xor_b32 s7, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, v0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, v1, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v25, vcc_lo, v0, v25
	v_add_co_ci_u32_e32 v26, vcc_lo, v1, v26, vcc_lo
	v_add_co_u32 v14, vcc_lo, 0xaf0, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v15, vcc_lo
	s_clause 0x3
	flat_store_b32 v[7:8], v16 offset:2800
	flat_store_b32 v[25:26], v6 offset:3208
	flat_store_b32 v[23:24], v21
	flat_store_b32 v[14:15], v21
	s_clause 0x1
	flat_load_b32 v7, v[0:1] offset:4016
	flat_load_b32 v14, v[0:1] offset:4028
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v8, 31, v7
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v14, -1, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v7, vcc_lo, v18, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, v19, v8, vcc_lo
	s_clause 0x1
	flat_store_b32 v[0:1], v14 offset:4028
	flat_store_b32 v[7:8], v22
	flat_load_b32 v7, v[0:1] offset:4016
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v7, 1, v7
	flat_store_b32 v[0:1], v7 offset:4016
.LBB13_11:                              ; %Flow146
                                        ;   in Loop: Header=BB13_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s6, s7, exec_lo
	s_or_b32 s4, s4, s6
.LBB13_12:                              ; %Flow145
                                        ;   in Loop: Header=BB13_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB13_14
; %bb.13:                               ;   in Loop: Header=BB13_2 Depth=1
	flat_load_b32 v6, v[0:1] offset:4020
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, v0, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v7, vcc_lo
	flat_load_b32 v6, v[6:7] offset:3208
.LBB13_14:                              ; %Flow147
                                        ;   in Loop: Header=BB13_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr16_vgpr17
                                        ; implicit-def: $vgpr7_vgpr8
.LBB13_15:                              ; %Flow149
                                        ;   in Loop: Header=BB13_2 Depth=1
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB13_17
; %bb.16:                               ;   in Loop: Header=BB13_2 Depth=1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, v0, v7
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v8, vcc_lo
	flat_store_b32 v[16:17], v20 offset:24
	flat_load_b32 v6, v[6:7] offset:3208
.LBB13_17:                              ; %Flow150
                                        ;   in Loop: Header=BB13_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB13_18:                              ; %Flow152
                                        ;   in Loop: Header=BB13_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	flat_load_b32 v7, v[0:1] offset:4024
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v6, v7
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB13_2
.LBB13_19:                              ; %Flow154
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v14, vcc_lo, 0xfc0, v0
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v1, vcc_lo
	s_mov_b32 s1, exec_lo
	flat_load_b64 v[3:4], v[14:15] offset:4020
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v6, 31, v3
	v_mov_b32_e32 v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	v_add_co_u32 v2, vcc_lo, v14, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v15, v3, vcc_lo
	flat_load_b32 v3, v[2:3] offset:3208
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v3, v4
	s_cbranch_execz .LBB13_34
; %bb.20:                               ; %.lr.ph32.i
	v_add_co_u32 v4, vcc_lo, 0x2000, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v16, vcc_lo, 0xfb4, v14
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v15, vcc_lo
	flat_load_b64 v[4:5], v[4:5] offset:4008
	v_add_co_u32 v18, vcc_lo, 0x1f78, v0
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v20, vcc_lo, 0x2f50, v0
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v22, vcc_lo, 0x1f80, v0
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v36, vcc_lo, 0x2da0, v0
	v_add_co_ci_u32_e32 v37, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v24, vcc_lo, 0x2f30, v0
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v26, vcc_lo, 0x2f38, v0
	v_add_co_ci_u32_e32 v27, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v28, vcc_lo, 0x2f3c, v0
	v_add_co_ci_u32_e32 v29, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v30, vcc_lo, 0x1f7c, v0
	v_add_co_ci_u32_e32 v31, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v38, vcc_lo, 0x1de0, v0
	v_add_co_ci_u32_e32 v39, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v32, vcc_lo, 0x1f70, v0
	v_add_co_ci_u32_e32 v33, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v49, vcc_lo, 0x2a70, v0
	v_add_co_ci_u32_e32 v50, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v51, vcc_lo, 0x2c08, v0
	v_mov_b32_e32 v48, -1
	v_add_co_ci_u32_e32 v52, vcc_lo, 0, v1, vcc_lo
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v8, v4, v5
.LBB13_21:                              ; =>This Inner Loop Header: Depth=1
	v_mad_i64_i32 v[5:6], null, v3, 28, v[14:15]
	v_ashrrev_i32_e32 v4, 31, v3
	v_mov_b32_e32 v53, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[34:35], 2, v[3:4]
	flat_load_b32 v2, v[5:6]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v2, v68
	v_cmp_le_i32_e64 s0, v2, v12
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s0
	s_xor_b32 s0, exec_lo, s3
	s_cbranch_execz .LBB13_23
; %bb.22:                               ;   in Loop: Header=BB13_21 Depth=1
	v_add_co_u32 v2, vcc_lo, v0, v34
	v_add_co_ci_u32_e32 v3, vcc_lo, v1, v35, vcc_lo
                                        ; implicit-def: $vgpr34_vgpr35
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_load_b32 v3, v[2:3] offset:3144
                                        ; implicit-def: $vgpr2
.LBB13_23:                              ; %Flow139
                                        ;   in Loop: Header=BB13_21 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB13_33
; %bb.24:                               ;   in Loop: Header=BB13_21 Depth=1
	flat_load_b32 v4, v[20:21]
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v54, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v55, 31, v54
	v_lshlrev_b64 v[54:55], 2, v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v0, v54
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v55, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v54, vcc_lo, 0x2000, v4
	v_add_co_ci_u32_e32 v55, vcc_lo, 0, v7, vcc_lo
	flat_load_b32 v54, v[54:55] offset:3924
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 0, v54
	s_cbranch_execz .LBB13_26
; %bb.25:                               ;   in Loop: Header=BB13_21 Depth=1
	v_add_co_u32 v64, vcc_lo, 0x2f54, v4
	v_add_co_ci_u32_e32 v65, vcc_lo, 0, v7, vcc_lo
	v_sub_nc_u32_e32 v2, 0, v54
	flat_store_b32 v[64:65], v2
	flat_load_b32 v2, v[5:6]
.LBB13_26:                              ;   in Loop: Header=BB13_21 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_clause 0x1
	flat_load_b32 v5, v[24:25]
	flat_load_b32 v4, v[26:27]
	v_mad_i64_i32 v[54:55], null, v3, 28, v[14:15]
	s_mov_b32 s4, exec_lo
	flat_load_b32 v7, v[54:55] offset:20
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_add_nc_u32_e32 v64, -1, v5
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v65, 31, v64
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[65:66], 2, v[64:65]
	v_add_co_u32 v5, vcc_lo, v36, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v6, vcc_lo, v37, v66, vcc_lo
	v_add_co_u32 v3, vcc_lo, v49, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v50, v4, vcc_lo
	s_clause 0x1
	flat_load_b32 v65, v[5:6]
	flat_load_b32 v69, v[3:4]
	flat_store_b32 v[24:25], v64
	flat_load_b128 v[3:6], v[54:55] offset:4
	s_waitcnt vmcnt(2) lgkmcnt(3)
	v_ashrrev_i32_e32 v66, 31, v65
	v_mad_i64_i32 v[70:71], null, v65, 28, v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[66:67], 2, v[65:66]
	v_add_co_u32 v80, vcc_lo, v49, v66
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v81, vcc_lo, v50, v67, vcc_lo
	flat_store_b32 v[54:55], v8 offset:24
	s_waitcnt vmcnt(0) lgkmcnt(1)
	s_clause 0x2
	flat_store_b128 v[70:71], v[2:5]
	flat_store_b96 v[70:71], v[6:8] offset:16
	flat_store_b32 v[80:81], v69
	flat_load_b32 v2, v[26:27]
	v_ashrrev_i32_e32 v70, 31, v69
	v_add_co_u32 v54, vcc_lo, v51, v66
	v_add_co_ci_u32_e32 v55, vcc_lo, v52, v67, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[69:70]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v49, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v50, v7, vcc_lo
	v_add_co_u32 v3, vcc_lo, v51, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, v52, v5, vcc_lo
	s_clause 0x2
	flat_store_b32 v[54:55], v2
	flat_store_b32 v[6:7], v65
	flat_store_b32 v[3:4], v65
	flat_load_b32 v3, v[28:29]
	v_add_co_u32 v2, vcc_lo, v0, v34
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v35, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v7, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, 1, v3
	flat_store_b32 v[28:29], v3
	flat_load_b32 v3, v[4:5] offset:3144
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e64 s3, -1, v3
	v_cmpx_ne_u32_e32 -1, v3
	s_cbranch_execz .LBB13_30
; %bb.27:                               ;   in Loop: Header=BB13_21 Depth=1
	flat_load_b32 v5, v[4:5] offset:2736
	s_mov_b32 s6, -1
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 -1, v5
	s_cbranch_execz .LBB13_29
; %bb.28:                               ;   in Loop: Header=BB13_21 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v6, 31, v5
	v_add_co_u32 v54, vcc_lo, 0x1c48, v2
	v_add_co_ci_u32_e32 v55, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[34:35], 2, v[3:4]
	v_lshlrev_b64 v[64:65], 2, v[5:6]
	s_xor_b32 s6, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v34, vcc_lo, v14, v34
	v_add_co_ci_u32_e32 v35, vcc_lo, v15, v35, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v64, vcc_lo, v14, v64
	v_add_co_ci_u32_e32 v65, vcc_lo, v15, v65, vcc_lo
	v_add_co_u32 v6, vcc_lo, 0x1ab0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_clause 0x3
	flat_store_b32 v[34:35], v5 offset:2800
	flat_store_b32 v[64:65], v3 offset:3208
	flat_store_b32 v[54:55], v48
	flat_store_b32 v[6:7], v48
	s_clause 0x1
	flat_load_b32 v4, v[32:33]
	flat_load_b32 v2, v[30:31]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v5, 31, v4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v2, -1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, v38, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v39, v5, vcc_lo
	s_clause 0x1
	flat_store_b32 v[30:31], v2
	flat_store_b32 v[4:5], v53
	flat_load_b32 v2, v[32:33]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v2, 1, v2
	flat_store_b32 v[32:33], v2
.LBB13_29:                              ; %Flow137
                                        ;   in Loop: Header=BB13_21 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s3, s3, exec_lo
	s_and_b32 s5, s6, exec_lo
	s_or_b32 s3, s3, s5
.LBB13_30:                              ; %Flow136
                                        ;   in Loop: Header=BB13_21 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB13_32
; %bb.31:                               ;   in Loop: Header=BB13_21 Depth=1
	flat_load_b32 v2, v[16:17]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_load_b32 v3, v[2:3] offset:3144
.LBB13_32:                              ; %Flow138
                                        ;   in Loop: Header=BB13_21 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
.LBB13_33:                              ; %Flow140
                                        ;   in Loop: Header=BB13_21 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	flat_load_b32 v2, v[18:19]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v3, v2
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB13_21
.LBB13_34:                              ; %Flow142
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v27, vcc_lo, 0x5000, v0
	v_add_co_ci_u32_e32 v28, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v23, vcc_lo, 0x2fb0, v0
	v_add_co_ci_u32_e32 v24, vcc_lo, 0, v1, vcc_lo
	s_mov_b32 s2, 0
	s_clause 0x3
	flat_load_b32 v6, v[27:28] offset:4036
	flat_load_b64 v[2:3], v[23:24] offset:4020
	flat_load_b32 v17, v[27:28] offset:3956
	flat_load_b32 v19, v[27:28] offset:4004
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(3) lgkmcnt(3)
	v_add_nc_u32_e32 v15, -1, v6
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_ashrrev_i32_e32 v5, 31, v2
	v_mov_b32_e32 v4, v2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v70, -4, v19
	v_min3_i32 v69, v19, v17, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, v23, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v24, v5, vcc_lo
	v_add_co_u32 v21, vcc_lo, 0x5fc4, v0
	v_add_co_ci_u32_e32 v22, vcc_lo, 0, v1, vcc_lo
	flat_load_b32 v33, v[4:5] offset:3208
	v_add_co_u32 v25, vcc_lo, 0x3f68, v0
	v_add_co_ci_u32_e32 v26, vcc_lo, 0, v1, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v33, v3
	s_cbranch_execz .LBB13_53
; %bb.35:                               ; %.lr.ph.i3
	flat_load_b64 v[34:35], v[27:28] offset:3928
	v_add_co_u32 v2, vcc_lo, 0xfb4, v23
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v24, vcc_lo
	v_add_co_u32 v4, vcc_lo, 0x5f00, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, 0x5ef4, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v29, vcc_lo, 0x3f6c, v0
	v_add_co_ci_u32_e32 v30, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v8, vcc_lo, 0x3dd0, v0
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v31, vcc_lo, 0x3f60, v0
	v_add_co_ci_u32_e32 v32, vcc_lo, 0, v1, vcc_lo
	v_mov_b32_e32 v16, -1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v14, v34, v35
.LBB13_36:                              ; =>This Inner Loop Header: Depth=1
	v_mad_i64_i32 v[36:37], null, v33, 28, v[23:24]
	v_ashrrev_i32_e32 v34, 31, v33
	v_mov_b32_e32 v18, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[34:35], 2, v[33:34]
	flat_load_b32 v20, v[36:37]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v20, v70
	v_cmp_le_i32_e64 s0, v20, v69
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s0
	s_xor_b32 s0, exec_lo, s3
	s_cbranch_execz .LBB13_38
; %bb.37:                               ;   in Loop: Header=BB13_36 Depth=1
	v_add_co_u32 v33, vcc_lo, v23, v34
	v_add_co_ci_u32_e32 v34, vcc_lo, v24, v35, vcc_lo
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr36_vgpr37
                                        ; implicit-def: $vgpr18
	flat_load_b32 v33, v[33:34] offset:3208
                                        ; implicit-def: $vgpr34_vgpr35
.LBB13_38:                              ; %Flow130
                                        ;   in Loop: Header=BB13_36 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB13_52
; %bb.39:                               ;   in Loop: Header=BB13_36 Depth=1
	flat_load_b32 v38, v[4:5]
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v38, v20, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v39, 31, v38
	v_lshlrev_b64 v[38:39], 2, v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v20, vcc_lo, v0, v38
	v_add_co_ci_u32_e32 v38, vcc_lo, v1, v39, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v48, vcc_lo, 0x5000, v20
	v_add_co_ci_u32_e32 v49, vcc_lo, 0, v38, vcc_lo
	flat_load_b32 v39, v[48:49] offset:3844
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 0, v39
	s_cbranch_execz .LBB13_41
; %bb.40:                               ;   in Loop: Header=BB13_36 Depth=1
	v_add_co_u32 v48, vcc_lo, 0x5f04, v20
	v_add_co_ci_u32_e32 v49, vcc_lo, 0, v38, vcc_lo
	v_sub_nc_u32_e32 v20, 0, v39
	flat_store_b32 v[48:49], v20
.LBB13_41:                              ;   in Loop: Header=BB13_36 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_i64_i32 v[38:39], null, v33, 28, v[23:24]
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr33
	flat_load_b32 v20, v[38:39] offset:20
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_nlt_f32_e32 v20, v14
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB13_49
; %bb.42:                               ;   in Loop: Header=BB13_36 Depth=1
	s_clause 0x1
	flat_load_b64 v[36:37], v[36:37]
	flat_load_b32 v20, v[4:5]
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v48, v36, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v49, 31, v48
	v_lshlrev_b64 v[48:49], 2, v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v20, vcc_lo, v0, v48
	v_add_co_ci_u32_e32 v33, vcc_lo, v1, v49, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v48, vcc_lo, 0x5000, v20
	v_add_co_ci_u32_e32 v49, vcc_lo, 0, v33, vcc_lo
	v_add_co_u32 v36, vcc_lo, v23, v34
	flat_load_b32 v20, v[48:49] offset:3844
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v20, v20, v37
	v_add_co_ci_u32_e32 v37, vcc_lo, v24, v35, vcc_lo
	flat_store_b32 v[48:49], v20 offset:3844
	s_clause 0x1
	flat_load_b32 v20, v[38:39] offset:4
	flat_load_b32 v33, v[6:7]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v20, v33, v20
	flat_store_b32 v[6:7], v20
	flat_load_b32 v33, v[36:37] offset:3208
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e64 s4, -1, v33
	v_cmpx_ne_u32_e32 -1, v33
	s_cbranch_execz .LBB13_46
; %bb.43:                               ;   in Loop: Header=BB13_36 Depth=1
	flat_load_b32 v38, v[36:37] offset:2800
	s_mov_b32 s7, -1
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 -1, v38
	s_cbranch_execz .LBB13_45
; %bb.44:                               ;   in Loop: Header=BB13_36 Depth=1
	v_ashrrev_i32_e32 v34, 31, v33
	v_ashrrev_i32_e32 v39, 31, v38
	v_add_co_u32 v48, vcc_lo, 0xc88, v36
	v_add_co_ci_u32_e32 v49, vcc_lo, 0, v37, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[34:35], 2, v[33:34]
	v_lshlrev_b64 v[50:51], 2, v[38:39]
	s_xor_b32 s7, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v34, vcc_lo, v23, v34
	v_add_co_ci_u32_e32 v35, vcc_lo, v24, v35, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v50, vcc_lo, v23, v50
	v_add_co_ci_u32_e32 v51, vcc_lo, v24, v51, vcc_lo
	v_add_co_u32 v36, vcc_lo, 0xaf0, v36
	v_add_co_ci_u32_e32 v37, vcc_lo, 0, v37, vcc_lo
	s_clause 0x3
	flat_store_b32 v[34:35], v38 offset:2800
	flat_store_b32 v[50:51], v33 offset:3208
	flat_store_b32 v[48:49], v16
	flat_store_b32 v[36:37], v16
	s_clause 0x1
	flat_load_b32 v34, v[31:32]
	flat_load_b32 v20, v[29:30]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v35, 31, v34
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v20, -1, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[34:35], 2, v[34:35]
	v_add_co_u32 v34, vcc_lo, v8, v34
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v35, vcc_lo, v12, v35, vcc_lo
	s_clause 0x1
	flat_store_b32 v[29:30], v20
	flat_store_b32 v[34:35], v18
	flat_load_b32 v18, v[31:32]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v18, 1, v18
	flat_store_b32 v[31:32], v18
.LBB13_45:                              ; %Flow125
                                        ;   in Loop: Header=BB13_36 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s6, s7, exec_lo
	s_or_b32 s4, s4, s6
.LBB13_46:                              ; %Flow124
                                        ;   in Loop: Header=BB13_36 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB13_48
; %bb.47:                               ;   in Loop: Header=BB13_36 Depth=1
	flat_load_b32 v33, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v34, 31, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[33:34], 2, v[33:34]
	v_add_co_u32 v33, vcc_lo, v23, v33
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v34, vcc_lo, v24, v34, vcc_lo
	flat_load_b32 v33, v[33:34] offset:3208
.LBB13_48:                              ; %Flow126
                                        ;   in Loop: Header=BB13_36 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr38_vgpr39
                                        ; implicit-def: $vgpr34_vgpr35
.LBB13_49:                              ; %Flow128
                                        ;   in Loop: Header=BB13_36 Depth=1
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB13_51
; %bb.50:                               ;   in Loop: Header=BB13_36 Depth=1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_co_u32 v33, vcc_lo, v23, v34
	v_add_co_ci_u32_e32 v34, vcc_lo, v24, v35, vcc_lo
	flat_store_b32 v[38:39], v14 offset:24
	flat_load_b32 v33, v[33:34] offset:3208
.LBB13_51:                              ; %Flow129
                                        ;   in Loop: Header=BB13_36 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB13_52:                              ; %Flow131
                                        ;   in Loop: Header=BB13_36 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	flat_load_b32 v18, v[25:26]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v33, v18
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB13_36
.LBB13_53:                              ; %Flow133
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v29, vcc_lo, 0x3f70, v0
	v_add_co_ci_u32_e32 v30, vcc_lo, 0, v1, vcc_lo
	s_mov_b32 s1, exec_lo
	flat_load_b64 v[3:4], v[29:30] offset:4020
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v6, 31, v3
	v_mov_b32_e32 v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	v_add_co_u32 v2, vcc_lo, v29, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v30, v3, vcc_lo
	flat_load_b32 v3, v[2:3] offset:3208
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v3, v4
	s_cbranch_execz .LBB13_68
; %bb.54:                               ; %.lr.ph32.i11
	flat_load_b64 v[4:5], v[27:28] offset:3928
	v_add_co_u32 v31, vcc_lo, 0xfb4, v29
	v_add_co_ci_u32_e32 v32, vcc_lo, 0, v30, vcc_lo
	v_add_co_u32 v33, vcc_lo, 0x4f28, v0
	v_add_co_ci_u32_e32 v34, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v35, vcc_lo, 0x5f00, v0
	v_add_co_ci_u32_e32 v36, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v37, vcc_lo, 0x4f30, v0
	v_add_co_ci_u32_e32 v38, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v12, vcc_lo, 0x5d50, v0
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v48, vcc_lo, 0x5ee0, v0
	v_add_co_ci_u32_e32 v49, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v50, vcc_lo, 0x5ee8, v0
	v_add_co_ci_u32_e32 v51, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v52, vcc_lo, 0x5eec, v0
	v_add_co_ci_u32_e32 v53, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v54, vcc_lo, 0x4f2c, v0
	v_add_co_ci_u32_e32 v55, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v16, vcc_lo, 0x4d90, v0
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v64, vcc_lo, 0x4f20, v0
	v_add_co_ci_u32_e32 v65, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v39, vcc_lo, 0x5a20, v0
	v_add_co_ci_u32_e32 v71, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v80, vcc_lo, 0x5bb8, v0
	v_mov_b32_e32 v20, -1
	v_add_co_ci_u32_e32 v81, vcc_lo, 0, v1, vcc_lo
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v8, v4, v5
.LBB13_55:                              ; =>This Inner Loop Header: Depth=1
	v_mad_i64_i32 v[5:6], null, v3, 28, v[29:30]
	v_ashrrev_i32_e32 v4, 31, v3
	v_mov_b32_e32 v82, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[66:67], 2, v[3:4]
	flat_load_b32 v2, v[5:6]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v2, v70
	v_cmp_le_i32_e64 s0, v2, v69
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s0
	s_xor_b32 s0, exec_lo, s3
	s_cbranch_execz .LBB13_57
; %bb.56:                               ;   in Loop: Header=BB13_55 Depth=1
	v_add_co_u32 v2, vcc_lo, v0, v66
	v_add_co_ci_u32_e32 v3, vcc_lo, v1, v67, vcc_lo
                                        ; implicit-def: $vgpr66_vgpr67
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr82
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x4000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_load_b32 v3, v[2:3] offset:3064
                                        ; implicit-def: $vgpr2
.LBB13_57:                              ; %Flow118
                                        ;   in Loop: Header=BB13_55 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB13_67
; %bb.58:                               ;   in Loop: Header=BB13_55 Depth=1
	flat_load_b32 v4, v[35:36]
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v83, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v84, 31, v83
	v_lshlrev_b64 v[83:84], 2, v[83:84]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v0, v83
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v84, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v83, vcc_lo, 0x5000, v4
	v_add_co_ci_u32_e32 v84, vcc_lo, 0, v7, vcc_lo
	flat_load_b32 v83, v[83:84] offset:3844
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 0, v83
	s_cbranch_execz .LBB13_60
; %bb.59:                               ;   in Loop: Header=BB13_55 Depth=1
	v_add_co_u32 v84, vcc_lo, 0x5f04, v4
	v_add_co_ci_u32_e32 v85, vcc_lo, 0, v7, vcc_lo
	v_sub_nc_u32_e32 v2, 0, v83
	flat_store_b32 v[84:85], v2
	flat_load_b32 v2, v[5:6]
.LBB13_60:                              ;   in Loop: Header=BB13_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_clause 0x1
	flat_load_b32 v5, v[48:49]
	flat_load_b32 v4, v[50:51]
	v_mad_i64_i32 v[83:84], null, v3, 28, v[29:30]
	s_mov_b32 s4, exec_lo
	flat_load_b32 v7, v[83:84] offset:20
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_add_nc_u32_e32 v85, -1, v5
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v86, 31, v85
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[86:87], 2, v[85:86]
	v_add_co_u32 v5, vcc_lo, v12, v86
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v6, vcc_lo, v14, v87, vcc_lo
	v_add_co_u32 v3, vcc_lo, v39, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v71, v4, vcc_lo
	s_clause 0x1
	flat_load_b32 v86, v[5:6]
	flat_load_b32 v96, v[3:4]
	flat_store_b32 v[48:49], v85
	flat_load_b128 v[3:6], v[83:84] offset:4
	s_waitcnt vmcnt(2) lgkmcnt(3)
	v_ashrrev_i32_e32 v87, 31, v86
	v_mad_i64_i32 v[97:98], null, v86, 28, v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[99:100], 2, v[86:87]
	v_add_co_u32 v101, vcc_lo, v39, v99
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v102, vcc_lo, v71, v100, vcc_lo
	flat_store_b32 v[83:84], v8 offset:24
	s_waitcnt vmcnt(0) lgkmcnt(1)
	s_clause 0x2
	flat_store_b128 v[97:98], v[2:5]
	flat_store_b96 v[97:98], v[6:8] offset:16
	flat_store_b32 v[101:102], v96
	flat_load_b32 v2, v[50:51]
	v_ashrrev_i32_e32 v97, 31, v96
	v_add_co_u32 v83, vcc_lo, v80, v99
	v_add_co_ci_u32_e32 v84, vcc_lo, v81, v100, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[96:97]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v39, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v71, v7, vcc_lo
	v_add_co_u32 v3, vcc_lo, v80, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, v81, v5, vcc_lo
	s_clause 0x2
	flat_store_b32 v[83:84], v2
	flat_store_b32 v[6:7], v86
	flat_store_b32 v[3:4], v86
	flat_load_b32 v3, v[52:53]
	v_add_co_u32 v2, vcc_lo, v0, v66
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v67, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, 0x4000, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v7, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, 1, v3
	flat_store_b32 v[52:53], v3
	flat_load_b32 v3, v[4:5] offset:3064
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e64 s3, -1, v3
	v_cmpx_ne_u32_e32 -1, v3
	s_cbranch_execz .LBB13_64
; %bb.61:                               ;   in Loop: Header=BB13_55 Depth=1
	flat_load_b32 v5, v[4:5] offset:2656
	s_mov_b32 s6, -1
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 -1, v5
	s_cbranch_execz .LBB13_63
; %bb.62:                               ;   in Loop: Header=BB13_55 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v6, 31, v5
	v_add_co_u32 v83, vcc_lo, 0x4bf8, v2
	v_add_co_ci_u32_e32 v84, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[66:67], 2, v[3:4]
	v_lshlrev_b64 v[85:86], 2, v[5:6]
	s_xor_b32 s6, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v66, vcc_lo, v29, v66
	v_add_co_ci_u32_e32 v67, vcc_lo, v30, v67, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v85, vcc_lo, v29, v85
	v_add_co_ci_u32_e32 v86, vcc_lo, v30, v86, vcc_lo
	v_add_co_u32 v6, vcc_lo, 0x4a60, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_clause 0x3
	flat_store_b32 v[66:67], v5 offset:2800
	flat_store_b32 v[85:86], v3 offset:3208
	flat_store_b32 v[83:84], v20
	flat_store_b32 v[6:7], v20
	s_clause 0x1
	flat_load_b32 v4, v[64:65]
	flat_load_b32 v2, v[54:55]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v5, 31, v4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v2, -1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, v16, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v18, v5, vcc_lo
	s_clause 0x1
	flat_store_b32 v[54:55], v2
	flat_store_b32 v[4:5], v82
	flat_load_b32 v2, v[64:65]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v2, 1, v2
	flat_store_b32 v[64:65], v2
.LBB13_63:                              ; %Flow116
                                        ;   in Loop: Header=BB13_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s3, s3, exec_lo
	s_and_b32 s5, s6, exec_lo
	s_or_b32 s3, s3, s5
.LBB13_64:                              ; %Flow115
                                        ;   in Loop: Header=BB13_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB13_66
; %bb.65:                               ;   in Loop: Header=BB13_55 Depth=1
	flat_load_b32 v2, v[31:32]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, 0x4000, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_load_b32 v3, v[2:3] offset:3064
.LBB13_66:                              ; %Flow117
                                        ;   in Loop: Header=BB13_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
.LBB13_67:                              ; %Flow119
                                        ;   in Loop: Header=BB13_55 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	flat_load_b32 v2, v[33:34]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v3, v2
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB13_55
.LBB13_68:                              ; %Flow121
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v3, vcc_lo, 0x2000, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v1, vcc_lo
	v_add_nc_u32_e32 v16, 5, v11
	v_add_co_u32 v29, vcc_lo, 0x2f50, v0
	s_clause 0x2
	flat_load_b64 v[6:7], v[27:28] offset:3944
	flat_load_b32 v31, v[3:4] offset:3920
	flat_load_b32 v2, v[3:4] offset:3908
	v_add_co_ci_u32_e32 v30, vcc_lo, 0, v1, vcc_lo
	v_ashrrev_i32_e32 v12, 31, v11
	v_ashrrev_i32_e32 v14, 31, v13
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_add_nc_u32_e32 v5, v6, v7
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_add_nc_u32_e32 v8, 10, v31
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v18, v5, v2
	v_max_i32_e32 v2, v68, v31
	v_min_i32_e32 v5, v16, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e64 s0, 0, v18
	v_cmp_lt_i32_e32 vcc_lo, v2, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB13_76
; %bb.69:                               ; %.lr.ph.i19
	flat_load_b64 v[5:6], v[3:4] offset:4008
	v_ashrrev_i32_e32 v32, 31, v31
	v_add_co_u32 v33, s0, 0x5f68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v34, s0, 0, v1, s0
	v_cmp_gt_i64_e32 vcc_lo, v[11:12], v[31:32]
	v_add_co_u32 v37, s0, 0x2fa4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v38, s0, 0, v1, s0
	v_mov_b32_e32 v8, -1.0
	v_dual_cndmask_b32 v4, v32, v12 :: v_dual_cndmask_b32 v3, v31, v11
	v_add_co_u32 v35, vcc_lo, 0x2f44, v0
	v_add_co_ci_u32_e32 v36, vcc_lo, 0, v1, vcc_lo
	v_cmp_gt_i64_e32 vcc_lo, v[3:4], v[13:14]
	v_dual_cndmask_b32 v4, v14, v4 :: v_dual_cndmask_b32 v3, v13, v3
	v_add_co_u32 v20, vcc_lo, 0xe20, v0
	v_add_co_ci_u32_e32 v39, vcc_lo, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v48, vcc_lo, 0xaf0, v0
	v_add_co_ci_u32_e32 v49, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v3, vcc_lo, v3, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, v4, v1, vcc_lo
	v_mov_b32_e32 v4, 0
	v_add_co_u32 v50, vcc_lo, 0x2f54, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v51, vcc_lo, 0, v7, vcc_lo
	v_add_co_u32 v52, vcc_lo, 0xc88, v0
	v_add_co_ci_u32_e32 v53, vcc_lo, 0, v1, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v7, v5, v6
.LBB13_70:                              ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v32, 31, v31
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[31:32]
	v_sub_co_u32 v5, vcc_lo, v50, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_co_ci_u32_e32 v6, vcc_lo, v51, v6, vcc_lo
	flat_load_b32 v6, v[5:6]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 -1, v6
	s_cbranch_execz .LBB13_74
; %bb.71:                               ;   in Loop: Header=BB13_70 Depth=1
	flat_load_b32 v3, v[37:38]
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v3, v6
	s_cbranch_execz .LBB13_73
; %bb.72:                               ;   in Loop: Header=BB13_70 Depth=1
	s_clause 0x1
	flat_load_b32 v5, v[0:1] offset:4016
	flat_load_b32 v31, v[0:1] offset:4024
	v_sub_nc_u32_e32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_i32_e32 v3, v18, v3
	v_sub_nc_u32_e32 v18, v18, v3
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_dual_mov_b32 v5, v4 :: v_dual_add_nc_u32 v54, -1, v5
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v32, 31, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v55, 31, v54
	v_lshlrev_b64 v[31:32], 2, v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[64:65], 2, v[54:55]
	v_add_co_u32 v64, vcc_lo, v20, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v65, vcc_lo, v39, v65, vcc_lo
	v_add_co_u32 v31, vcc_lo, v48, v31
	v_add_co_ci_u32_e32 v32, vcc_lo, v49, v32, vcc_lo
	s_clause 0x1
	flat_load_b32 v64, v[64:65]
	flat_load_b32 v31, v[31:32]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v65, 31, v64
	v_mad_i64_i32 v[80:81], null, v64, 28, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v32, 31, v31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[65:66], 2, v[64:65]
	v_add_co_u32 v82, vcc_lo, v48, v65
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v83, vcc_lo, v49, v66, vcc_lo
	s_clause 0x3
	flat_store_b32 v[0:1], v54 offset:4016
	flat_store_b128 v[80:81], v[2:5]
	flat_store_b96 v[80:81], v[6:8] offset:16
	flat_store_b32 v[82:83], v31
	flat_load_b32 v5, v[0:1] offset:4024
	v_lshlrev_b64 v[31:32], 2, v[31:32]
	v_add_co_u32 v65, vcc_lo, v52, v65
	v_add_co_ci_u32_e32 v66, vcc_lo, v53, v66, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[54:55], 2, v[5:6]
	v_add_co_u32 v54, vcc_lo, v48, v54
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v55, vcc_lo, v49, v55, vcc_lo
	v_add_co_u32 v31, vcc_lo, v52, v31
	v_add_co_ci_u32_e32 v32, vcc_lo, v53, v32, vcc_lo
	s_clause 0x2
	flat_store_b32 v[65:66], v5
	flat_store_b32 v[54:55], v64
	flat_store_b32 v[31:32], v64
	s_clause 0x1
	flat_load_b32 v5, v[29:30]
	flat_load_b32 v31, v[0:1] offset:4028
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v31, 1, v31
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	flat_store_b32 v[0:1], v31 offset:4028
	v_sub_co_u32 v5, vcc_lo, v50, v5
	v_sub_co_ci_u32_e32 v6, vcc_lo, v51, v6, vcc_lo
	flat_load_b32 v31, v[5:6]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v31, v31, v3
	flat_store_b32 v[5:6], v31
	s_clause 0x1
	flat_load_b32 v5, v[35:36]
	flat_load_b32 v31, v[29:30]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_add_nc_u32_e32 v5, v5, v3
	flat_store_b32 v[35:36], v5
.LBB13_73:                              ; %Flow112
                                        ;   in Loop: Header=BB13_70 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB13_74:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE12sendNewOrderERKiRi.exit.i
                                        ;   in Loop: Header=BB13_70 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0) lgkmcnt(1)
	v_add_nc_u32_e32 v3, 10, v31
	v_add_nc_u32_e32 v2, 1, v2
	v_cmp_eq_u32_e32 vcc_lo, 0, v18
	v_min_i32_e32 v3, v16, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e64 s0, v2, v3
	s_or_b32 s0, s0, vcc_lo
	v_add_co_u32 v50, vcc_lo, v50, 4
	v_add_co_ci_u32_e32 v51, vcc_lo, 0, v51, vcc_lo
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s0, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB13_70
; %bb.75:                               ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE20sendNewSellingOrdersERKiS3_Ri.exit.loopexit
	s_or_b32 exec_lo, exec_lo, s2
	flat_load_b64 v[6:7], v[33:34]
.LBB13_76:                              ; %Flow113
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	flat_load_b32 v5, v[27:28] offset:3840
	flat_load_b32 v2, v[27:28] offset:3828
	v_ashrrev_i32_e32 v18, 31, v17
	v_ashrrev_i32_e32 v20, 31, v19
	v_ashrrev_i32_e32 v16, 31, v15
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_add_nc_u32_e32 v3, 9, v5
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v4, v6, v2
	v_max_i32_e32 v6, v70, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_min_i32_e32 v2, v69, v3
	v_sub_nc_u32_e32 v39, v7, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, v2, v6
	v_cmp_lt_i32_e64 s0, 0, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB13_84
; %bb.77:                               ; %.lr.ph.i22
	flat_load_b64 v[6:7], v[27:28] offset:3928
	v_cmp_lt_i64_e32 vcc_lo, v[17:18], v[19:20]
	v_ashrrev_i32_e32 v4, 31, v3
	v_add_co_u32 v27, s0, 0x5ef4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v28, s0, 0, v1, s0
	v_dual_cndmask_b32 v36, v20, v18 :: v_dual_cndmask_b32 v35, v19, v17
	v_add_co_u32 v31, vcc_lo, 0x5f00, v0
	v_add_co_ci_u32_e32 v32, vcc_lo, 0, v1, vcc_lo
	v_cmp_lt_i64_e32 vcc_lo, v[35:36], v[15:16]
	v_add_co_u32 v33, s0, 0x5f54, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v34, s0, 0, v1, s0
	v_mov_b32_e32 v8, -1.0
	v_dual_cndmask_b32 v38, v16, v36 :: v_dual_cndmask_b32 v37, v15, v35
	v_add_co_u32 v48, vcc_lo, 0x3dd0, v0
	v_add_co_ci_u32_e32 v49, vcc_lo, 0, v1, vcc_lo
	v_cmp_lt_i64_e32 vcc_lo, v[37:38], v[3:4]
	v_add_co_u32 v35, s0, 0x3f60, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v36, s0, 0, v1, s0
	v_dual_cndmask_b32 v4, v4, v38 :: v_dual_cndmask_b32 v3, v3, v37
	v_add_co_u32 v37, vcc_lo, 0x3f6c, v0
	v_add_co_ci_u32_e32 v38, vcc_lo, 0, v1, vcc_lo
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v50, vcc_lo, 0xaf0, v23
	v_add_co_ci_u32_e32 v51, vcc_lo, 0, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, v3, v0
	v_add_co_ci_u32_e32 v53, vcc_lo, v4, v1, vcc_lo
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v52, vcc_lo, 0x5f04, v3
	v_add_co_ci_u32_e32 v53, vcc_lo, 0, v53, vcc_lo
	v_add_co_u32 v54, vcc_lo, 0xc88, v23
	v_add_co_ci_u32_e32 v55, vcc_lo, 0, v24, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v7, v6, v7
.LBB13_78:                              ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v6, 31, v5
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[64:65], 2, v[5:6]
	v_sub_co_u32 v64, vcc_lo, v52, v64
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_co_ci_u32_e32 v65, vcc_lo, v53, v65, vcc_lo
	flat_load_b32 v6, v[64:65]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 -1, v6
	s_cbranch_execz .LBB13_82
; %bb.79:                               ;   in Loop: Header=BB13_78 Depth=1
	flat_load_b32 v3, v[33:34]
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v3, v6
	s_cbranch_execz .LBB13_81
; %bb.80:                               ;   in Loop: Header=BB13_78 Depth=1
	s_clause 0x1
	flat_load_b32 v5, v[35:36]
	flat_load_b32 v64, v[25:26]
	v_sub_nc_u32_e32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_i32_e32 v3, v39, v3
	v_sub_nc_u32_e32 v39, v39, v3
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_dual_mov_b32 v5, v4 :: v_dual_add_nc_u32 v66, -1, v5
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v65, 31, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v67, 31, v66
	v_lshlrev_b64 v[64:65], 2, v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[80:81], 2, v[66:67]
	v_add_co_u32 v80, vcc_lo, v48, v80
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v81, vcc_lo, v49, v81, vcc_lo
	v_add_co_u32 v64, vcc_lo, v50, v64
	v_add_co_ci_u32_e32 v65, vcc_lo, v51, v65, vcc_lo
	s_clause 0x1
	flat_load_b32 v80, v[80:81]
	flat_load_b32 v64, v[64:65]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v81, 31, v80
	v_mad_i64_i32 v[83:84], null, v80, 28, v[23:24]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v65, 31, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[81:82], 2, v[80:81]
	v_add_co_u32 v85, vcc_lo, v50, v81
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v86, vcc_lo, v51, v82, vcc_lo
	s_clause 0x3
	flat_store_b32 v[35:36], v66
	flat_store_b128 v[83:84], v[2:5]
	flat_store_b96 v[83:84], v[6:8] offset:16
	flat_store_b32 v[85:86], v64
	flat_load_b32 v5, v[25:26]
	v_lshlrev_b64 v[64:65], 2, v[64:65]
	v_add_co_u32 v81, vcc_lo, v54, v81
	v_add_co_ci_u32_e32 v82, vcc_lo, v55, v82, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[66:67], 2, v[5:6]
	v_add_co_u32 v66, vcc_lo, v50, v66
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v67, vcc_lo, v51, v67, vcc_lo
	v_add_co_u32 v64, vcc_lo, v54, v64
	v_add_co_ci_u32_e32 v65, vcc_lo, v55, v65, vcc_lo
	s_clause 0x2
	flat_store_b32 v[81:82], v5
	flat_store_b32 v[66:67], v80
	flat_store_b32 v[64:65], v80
	s_clause 0x1
	flat_load_b32 v5, v[31:32]
	flat_load_b32 v64, v[37:38]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v64, 1, v64
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	flat_store_b32 v[37:38], v64
	v_sub_co_u32 v5, vcc_lo, v52, v5
	v_sub_co_ci_u32_e32 v6, vcc_lo, v53, v6, vcc_lo
	flat_load_b32 v64, v[5:6]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v64, v64, v3
	flat_store_b32 v[5:6], v64
	s_clause 0x1
	flat_load_b32 v6, v[27:28]
	flat_load_b32 v5, v[31:32]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_add_nc_u32_e32 v6, v6, v3
	flat_store_b32 v[27:28], v6
.LBB13_81:                              ; %Flow110
                                        ;   in Loop: Header=BB13_78 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB13_82:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE12sendNewOrderERKiRi.exit.i24
                                        ;   in Loop: Header=BB13_78 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0) lgkmcnt(1)
	v_max_i32_e32 v3, v70, v5
	v_cmp_eq_u32_e32 vcc_lo, 0, v39
	v_cmp_le_i32_e64 s0, v2, v3
	v_add_nc_u32_e32 v2, -1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, vcc_lo
	v_add_co_u32 v52, vcc_lo, v52, -4
	v_add_co_ci_u32_e32 v53, vcc_lo, -1, v53, vcc_lo
	s_and_b32 s0, exec_lo, s0
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB13_78
; %bb.83:                               ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE19sendNewBuyingOrdersERKiS3_Ri.exit.loopexit
	s_or_b32 exec_lo, exec_lo, s2
	flat_load_b32 v31, v[29:30]
.LBB13_84:                              ; %Flow111
	s_or_b32 exec_lo, exec_lo, s1
	flat_load_b32 v2, v[21:22]
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_add_nc_u32_e32 v4, 10, v31
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_min_i32_e32 v6, v2, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_ge_i32_e32 vcc_lo, v6, v31
	v_cmp_lt_i32_e64 s0, v6, v4
	flat_store_b32 v[21:22], v6
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB13_89
; %bb.85:                               ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit.preheader
	v_cmp_gt_i64_e32 vcc_lo, v[11:12], v[13:14]
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v32, 31, v31
	v_add_nc_u32_e32 v6, 1, v6
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr3
	v_dual_cndmask_b32 v8, v14, v12 :: v_dual_cndmask_b32 v7, v13, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_lt_i64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_cndmask_b32 v3, v3, v8 :: v_dual_cndmask_b32 v2, v2, v7
	v_lshlrev_b64 v[7:8], 2, v[31:32]
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v2, vcc_lo, v2, v7
	v_sub_co_ci_u32_e32 v3, vcc_lo, v3, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v2, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x2f54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
.LBB13_86:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit
                                        ; =>This Inner Loop Header: Depth=1
	flat_load_b32 v7, v[2:3]
	s_or_b32 s3, s3, exec_lo
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 0, v7
	s_cbranch_execz .LBB13_88
; %bb.87:                               ;   in Loop: Header=BB13_86 Depth=1
	v_cmp_lt_i32_e32 vcc_lo, v6, v31
	v_cmp_ge_i32_e64 s0, v6, v4
	flat_store_b32 v[21:22], v6
	v_add_nc_u32_e32 v6, 1, v6
	s_and_not1_b32 s3, s3, exec_lo
	s_or_b32 s0, vcc_lo, s0
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s3, s3, s0
.LBB13_88:                              ; %Flow107
                                        ;   in Loop: Header=BB13_86 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s3
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB13_86
.LBB13_89:                              ; %Flow109
	s_or_b32 exec_lo, exec_lo, s1
	flat_load_b32 v2, v[9:10]
	v_add_nc_u32_e32 v3, 10, v5
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_max_i32_e32 v4, v2, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_ge_i32_e32 vcc_lo, v4, v5
	v_cmp_lt_i32_e64 s0, v4, v3
	flat_store_b32 v[9:10], v4
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB13_94
; %bb.90:                               ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit33.preheader
	v_cmp_lt_i64_e32 vcc_lo, v[17:18], v[19:20]
	v_ashrrev_i32_e32 v3, 31, v2
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr3
	v_dual_cndmask_b32 v7, v20, v18 :: v_dual_cndmask_b32 v6, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_lt_i64_e32 vcc_lo, v[6:7], v[15:16]
	v_dual_cndmask_b32 v8, v16, v7 :: v_dual_cndmask_b32 v7, v15, v6
	v_ashrrev_i32_e32 v6, 31, v5
	v_cmp_gt_i64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_cndmask_b32 v3, v3, v8 :: v_dual_cndmask_b32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v2, vcc_lo, v2, v6
	v_sub_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v3, v1, vcc_lo
	v_add_nc_u32_e32 v2, 1, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, 0x5f04, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB13_91:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit33
                                        ; =>This Inner Loop Header: Depth=1
	flat_load_b32 v3, v[0:1]
	s_or_b32 s3, s3, exec_lo
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB13_93
; %bb.92:                               ;   in Loop: Header=BB13_91 Depth=1
	v_add_nc_u32_e32 v3, -2, v2
	v_add_nc_u32_e32 v2, -1, v2
	v_add_co_u32 v0, s0, v0, -4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v1, s0, -1, v1, s0
	v_cmp_le_i32_e32 vcc_lo, v2, v5
	s_and_not1_b32 s0, s3, exec_lo
	flat_store_b32 v[9:10], v3
	s_and_b32 s3, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s3, s0, s3
.LBB13_93:                              ; %Flow
                                        ;   in Loop: Header=BB13_91 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s3
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB13_91
.LBB13_94:                              ; %Flow106
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end13:
	.size	_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE22cancelAndSendNewOrdersEv, .Lfunc_end13-_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE22cancelAndSendNewOrdersEv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 7768
; NumSgprs: 34
; NumVgprs: 103
; ScratchSize: 0
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function _ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE13showBasicInfoEv
	.type	_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE13showBasicInfoEv,@function
_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE13showBasicInfoEv: ; @_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE13showBasicInfoEv
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_mov_b32 s22, s33
	s_mov_b32 s33, s32
	s_or_saveexec_b32 s0, -1
	scratch_store_b32 off, v40, s33         ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s0
	v_writelane_b32 v40, s30, 0
	s_add_i32 s32, s32, 16
	v_writelane_b32 v40, s31, 1
	s_load_b64 s[20:21], s[8:9], 0x50
	v_mbcnt_lo_u32_b32 v48, -1, 0
	v_mov_b32_e32 v6, 0
	v_dual_mov_b32 v36, v1 :: v_dual_mov_b32 v37, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v48
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_mov_b64 s[18:19], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_6
; %bb.1:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB14_5
; %bb.2:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB14_3:                               ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB14_3
; %bb.4:                                ; %Flow376
	s_or_b32 exec_lo, exec_lo, s3
.LBB14_5:                               ; %Flow378
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB14_6:                               ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB14_8
; %bb.7:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB14_8:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB14_15
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB14_11
.LBB14_10:                              ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB14_10
.LBB14_11:                              ; %Flow374
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB14_13
; %bb.12:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB14_13:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB14_15
; %bb.14:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB14_15:                              ; %Flow375
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB14_16:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_18
; %bb.17:                               ;   in Loop: Header=BB14_16 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB14_18:                              ;   in Loop: Header=BB14_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB14_20
; %bb.19:                               ;   in Loop: Header=BB14_16 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB14_21
.LBB14_20:                              ;   in Loop: Header=BB14_16 Depth=1
	s_mov_b32 s1, -1
.LBB14_21:                              ; %Flow369
                                        ;   in Loop: Header=BB14_16 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB14_16
; %bb.22:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_26
; %bb.23:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB14_26
; %bb.24:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB14_25:                              ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB14_25
.LBB14_26:                              ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.25@rel32@lo+4
	s_addc_u32 s1, s1, .str.25@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 61, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_add_co_u32 v49, vcc_lo, 0x5000, v37
	v_add_co_ci_u32_e32 v50, vcc_lo, 0, v36, vcc_lo
	v_mov_b32_e32 v4, v48
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	flat_load_b32 v38, v[49:50] offset:3944
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_32
; %bb.27:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB14_31
; %bb.28:                               ; %.preheader3.i.i.i6.preheader
	s_mov_b32 s3, 0
.LBB14_29:                              ; %.preheader3.i.i.i6
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB14_29
; %bb.30:                               ; %Flow362
	s_or_b32 exec_lo, exec_lo, s3
.LBB14_31:                              ; %Flow364
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB14_32:                              ; %.loopexit4.i.i.i1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB14_34
; %bb.33:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB14_34:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB14_42
; %bb.35:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB14_38
; %bb.36:                               ; %.preheader1.i.i.i4.preheader
	s_mov_b32 s8, 0
.LBB14_37:                              ; %.preheader1.i.i.i4
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB14_37
.LBB14_38:                              ; %Flow360
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB14_40
; %bb.39:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB14_40:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB14_42
; %bb.41:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB14_42:                              ; %Flow361
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB14_43:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_45
; %bb.44:                               ;   in Loop: Header=BB14_43 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB14_45:                              ;   in Loop: Header=BB14_43 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB14_47
; %bb.46:                               ;   in Loop: Header=BB14_43 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB14_48
.LBB14_47:                              ;   in Loop: Header=BB14_43 Depth=1
	s_mov_b32 s1, -1
.LBB14_48:                              ; %Flow355
                                        ;   in Loop: Header=BB14_43 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB14_43
; %bb.49:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_53
; %bb.50:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB14_53
; %bb.51:                               ; %.preheader.i.i.i3.preheader
	s_mov_b32 s0, 0
.LBB14_52:                              ; %.preheader.i.i.i3
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB14_52
.LBB14_53:                              ; %__ockl_printf_begin.exit7
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.26@rel32@lo+4
	s_addc_u32 s1, s1, .str.26@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s4, 23, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v5, v48
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v5
	v_mov_b32_e32 v7, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_59
; %bb.54:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[9:10], v1, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[6:7], v1, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v3, v3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v3, v3, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[7:8], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[9:10]
	s_cbranch_execz .LBB14_58
; %bb.55:                               ; %.preheader3.i.i.i13.preheader
	s_mov_b32 s3, 0
.LBB14_56:                              ; %.preheader3.i.i.i13
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[11:12], v1, s[20:21]
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v8, v3, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v2, 24, v[11:12]
	v_mov_b32_e32 v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v8, 24, v[2:3]
	v_mov_b32_e32 v7, v3
	global_load_b64 v[7:8], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB14_56
; %bb.57:                               ; %Flow348
	s_or_b32 exec_lo, exec_lo, s3
.LBB14_58:                              ; %Flow350
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB14_59:                              ; %.loopexit4.i.i.i8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v6, 0
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[9:10], v6, s[20:21] offset:40
	global_load_b128 v[1:4], v6, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB14_61
; %bb.60:
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, v6
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s8, v2, vcc_lo
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB14_61:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[7:8], 6, v[5:6]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v7
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v8, vcc_lo
	v_mov_b32_e32 v39, v6
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v6, s11
	v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB14_69
; %bb.62:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v0, s[20:21] offset:32 glc
	global_load_b64 v[3:4], v0, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v7, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[7:8], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v0, v[9:12], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[11:12]
	s_cbranch_execz .LBB14_65
; %bb.63:                               ; %.preheader1.i.i.i11.preheader
	s_mov_b32 s8, 0
.LBB14_64:                              ; %.preheader1.i.i.i11
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB14_64
.LBB14_65:                              ; %Flow346
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB14_67
; %bb.66:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB14_67:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB14_69
; %bb.68:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB14_69:                              ; %Flow347
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB14_70:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_72
; %bb.71:                               ;   in Loop: Header=BB14_70 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB14_72:                              ;   in Loop: Header=BB14_70 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB14_74
; %bb.73:                               ;   in Loop: Header=BB14_70 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB14_75
.LBB14_74:                              ;   in Loop: Header=BB14_70 Depth=1
	s_mov_b32 s1, -1
.LBB14_75:                              ; %Flow341
                                        ;   in Loop: Header=BB14_70 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB14_70
; %bb.76:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_80
; %bb.77:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB14_80
; %bb.78:                               ; %.preheader.i.i.i10.preheader
	s_mov_b32 s0, 0
.LBB14_79:                              ; %.preheader.i.i.i10
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB14_79
.LBB14_80:                              ; %__ockl_printf_append_args.exit
	s_or_b32 exec_lo, exec_lo, s1
	flat_load_b32 v38, v[49:50] offset:3936
	v_mov_b32_e32 v4, v48
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_86
; %bb.81:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB14_85
; %bb.82:                               ; %.preheader3.i.i.i19.preheader
	s_mov_b32 s3, 0
.LBB14_83:                              ; %.preheader3.i.i.i19
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB14_83
; %bb.84:                               ; %Flow334
	s_or_b32 exec_lo, exec_lo, s3
.LBB14_85:                              ; %Flow336
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB14_86:                              ; %.loopexit4.i.i.i14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB14_88
; %bb.87:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB14_88:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB14_96
; %bb.89:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB14_92
; %bb.90:                               ; %.preheader1.i.i.i17.preheader
	s_mov_b32 s8, 0
.LBB14_91:                              ; %.preheader1.i.i.i17
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB14_91
.LBB14_92:                              ; %Flow332
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB14_94
; %bb.93:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB14_94:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB14_96
; %bb.95:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB14_96:                              ; %Flow333
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB14_97:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_99
; %bb.98:                               ;   in Loop: Header=BB14_97 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB14_99:                              ;   in Loop: Header=BB14_97 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB14_101
; %bb.100:                              ;   in Loop: Header=BB14_97 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB14_102
.LBB14_101:                             ;   in Loop: Header=BB14_97 Depth=1
	s_mov_b32 s1, -1
.LBB14_102:                             ; %Flow327
                                        ;   in Loop: Header=BB14_97 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB14_97
; %bb.103:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_107
; %bb.104:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB14_107
; %bb.105:                              ; %.preheader.i.i.i16.preheader
	s_mov_b32 s0, 0
.LBB14_106:                             ; %.preheader.i.i.i16
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB14_106
.LBB14_107:                             ; %__ockl_printf_begin.exit20
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.27@rel32@lo+4
	s_addc_u32 s1, s1, .str.27@rel32@hi+12
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v5, 0
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s2, -1, 0
	s_mov_b64 s[8:9], s[18:19]
	v_cndmask_b32_e64 v2, 0, 1, s2
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, s1 :: v_dual_lshlrev_b32 v4, 4, v2
	v_mov_b32_e32 v2, s0
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, v48
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v6
	v_mov_b32_e32 v7, 0
	v_mov_b32_e32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v6
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_113
; %bb.108:
	global_load_b64 v[3:4], v36, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[20:21] offset:40
	global_load_b64 v[7:8], v36, s[20:21]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v7, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v8, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v36, v[1:4], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[3:4]
	s_cbranch_execz .LBB14_112
; %bb.109:                              ; %.preheader3.i.i.i26.preheader
	v_mov_b32_e32 v1, 0
	s_mov_b32 s3, 0
.LBB14_110:                             ; %.preheader3.i.i.i26
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[9:10], v1, s[20:21]
	v_dual_mov_b32 v4, v7 :: v_dual_mov_b32 v5, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v2, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v2, 24, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, v8 :: v_dual_and_b32 v3, v3, v5
	v_mad_u64_u32 v[8:9], null, v3, 24, v[2:3]
	global_load_b64 v[2:3], v[7:8], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB14_110
; %bb.111:                              ; %Flow320
	s_or_b32 exec_lo, exec_lo, s3
.LBB14_112:                             ; %Flow322
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB14_113:                             ; %.loopexit4.i.i.i21
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[9:10], v36, s[20:21] offset:40
	global_load_b128 v[1:4], v36, s[20:21]
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB14_115
; %bb.114:
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, 0
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s8, v2, vcc_lo
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB14_115:
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s8, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_mov_b32_e32 v7, 0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 6, v[6:7]
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_u32 v8, vcc_lo, v3, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, v4, v6, vcc_lo
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9
	v_dual_mov_b32 v39, v7 :: v_dual_mov_b32 v6, s11
	v_mov_b32_e32 v5, s10
	s_clause 0x3
	global_store_b128 v[8:9], v[36:39], off
	global_store_b128 v[8:9], v[3:6], off offset:16
	global_store_b128 v[8:9], v[3:6], off offset:32
	global_store_b128 v[8:9], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB14_123
; %bb.116:
	s_clause 0x1
	global_load_b64 v[12:13], v7, s[20:21] offset:32 glc
	global_load_b64 v[3:4], v7, s[20:21] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v7, v[10:13], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[12:13]
	s_cbranch_execz .LBB14_119
; %bb.117:                              ; %.preheader1.i.i.i24.preheader
	s_mov_b32 s8, 0
.LBB14_118:                             ; %.preheader1.i.i.i24
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[8:9], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v7, v[3:6], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB14_118
.LBB14_119:                             ; %Flow318
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB14_121
; %bb.120:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB14_121:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB14_123
; %bb.122:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB14_123:                             ; %Flow319
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB14_124:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_126
; %bb.125:                              ;   in Loop: Header=BB14_124 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB14_126:                             ;   in Loop: Header=BB14_124 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB14_128
; %bb.127:                              ;   in Loop: Header=BB14_124 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB14_129
.LBB14_128:                             ;   in Loop: Header=BB14_124 Depth=1
	s_mov_b32 s1, -1
.LBB14_129:                             ; %Flow313
                                        ;   in Loop: Header=BB14_124 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB14_124
; %bb.130:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_134
; %bb.131:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB14_134
; %bb.132:                              ; %.preheader.i.i.i23.preheader
	s_mov_b32 s0, 0
.LBB14_133:                             ; %.preheader.i.i.i23
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB14_133
.LBB14_134:                             ; %__ockl_printf_append_args.exit27
	s_or_b32 exec_lo, exec_lo, s1
	flat_load_b32 v38, v[49:50] offset:3940
	v_mov_b32_e32 v4, v48
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_140
; %bb.135:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB14_139
; %bb.136:                              ; %.preheader3.i.i.i33.preheader
	s_mov_b32 s3, 0
.LBB14_137:                             ; %.preheader3.i.i.i33
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB14_137
; %bb.138:                              ; %Flow306
	s_or_b32 exec_lo, exec_lo, s3
.LBB14_139:                             ; %Flow308
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB14_140:                             ; %.loopexit4.i.i.i28
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB14_142
; %bb.141:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB14_142:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB14_150
; %bb.143:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB14_146
; %bb.144:                              ; %.preheader1.i.i.i31.preheader
	s_mov_b32 s8, 0
.LBB14_145:                             ; %.preheader1.i.i.i31
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB14_145
.LBB14_146:                             ; %Flow304
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB14_148
; %bb.147:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB14_148:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB14_150
; %bb.149:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB14_150:                             ; %Flow305
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB14_151:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_153
; %bb.152:                              ;   in Loop: Header=BB14_151 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB14_153:                             ;   in Loop: Header=BB14_151 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB14_155
; %bb.154:                              ;   in Loop: Header=BB14_151 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB14_156
.LBB14_155:                             ;   in Loop: Header=BB14_151 Depth=1
	s_mov_b32 s1, -1
.LBB14_156:                             ; %Flow299
                                        ;   in Loop: Header=BB14_151 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB14_151
; %bb.157:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_161
; %bb.158:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB14_161
; %bb.159:                              ; %.preheader.i.i.i30.preheader
	s_mov_b32 s0, 0
.LBB14_160:                             ; %.preheader.i.i.i30
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB14_160
.LBB14_161:                             ; %__ockl_printf_begin.exit34
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.28@rel32@lo+4
	s_addc_u32 s1, s1, .str.28@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s4, 22, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v5, v48
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v5
	v_mov_b32_e32 v7, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_167
; %bb.162:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[9:10], v1, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[6:7], v1, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v3, v3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v3, v3, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[7:8], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[9:10]
	s_cbranch_execz .LBB14_166
; %bb.163:                              ; %.preheader3.i.i.i40.preheader
	s_mov_b32 s3, 0
.LBB14_164:                             ; %.preheader3.i.i.i40
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[11:12], v1, s[20:21]
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v8, v3, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v2, 24, v[11:12]
	v_mov_b32_e32 v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v8, 24, v[2:3]
	v_mov_b32_e32 v7, v3
	global_load_b64 v[7:8], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB14_164
; %bb.165:                              ; %Flow292
	s_or_b32 exec_lo, exec_lo, s3
.LBB14_166:                             ; %Flow294
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB14_167:                             ; %.loopexit4.i.i.i35
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v6, 0
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[9:10], v6, s[20:21] offset:40
	global_load_b128 v[1:4], v6, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB14_169
; %bb.168:
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, v6
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s8, v2, vcc_lo
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB14_169:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[7:8], 6, v[5:6]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v7
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v8, vcc_lo
	v_mov_b32_e32 v39, v6
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v6, s11
	v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB14_177
; %bb.170:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v0, s[20:21] offset:32 glc
	global_load_b64 v[3:4], v0, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v7, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[7:8], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v0, v[9:12], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[11:12]
	s_cbranch_execz .LBB14_173
; %bb.171:                              ; %.preheader1.i.i.i38.preheader
	s_mov_b32 s8, 0
.LBB14_172:                             ; %.preheader1.i.i.i38
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB14_172
.LBB14_173:                             ; %Flow290
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB14_175
; %bb.174:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB14_175:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB14_177
; %bb.176:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB14_177:                             ; %Flow291
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB14_178:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_180
; %bb.179:                              ;   in Loop: Header=BB14_178 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB14_180:                             ;   in Loop: Header=BB14_178 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB14_182
; %bb.181:                              ;   in Loop: Header=BB14_178 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB14_183
.LBB14_182:                             ;   in Loop: Header=BB14_178 Depth=1
	s_mov_b32 s1, -1
.LBB14_183:                             ; %Flow285
                                        ;   in Loop: Header=BB14_178 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB14_178
; %bb.184:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_188
; %bb.185:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB14_188
; %bb.186:                              ; %.preheader.i.i.i37.preheader
	s_mov_b32 s0, 0
.LBB14_187:                             ; %.preheader.i.i.i37
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB14_187
.LBB14_188:                             ; %__ockl_printf_append_args.exit41
	s_or_b32 exec_lo, exec_lo, s1
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v48
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v48
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_194
; %bb.189:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[3:4], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v6
	v_and_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[6:7]
	s_cbranch_execz .LBB14_193
; %bb.190:                              ; %.preheader3.i.i.i47.preheader
	s_mov_b32 s3, 0
.LBB14_191:                             ; %.preheader3.i.i.i47
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[8:9], v0, s[20:21]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v1, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, v4 :: v_dual_and_b32 v2, v2, v7
	v_mad_u64_u32 v[4:5], null, v2, 24, v[1:2]
	global_load_b64 v[4:5], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB14_191
; %bb.192:                              ; %Flow278
	s_or_b32 exec_lo, exec_lo, s3
.LBB14_193:                             ; %Flow280
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB14_194:                             ; %.loopexit4.i.i.i42
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v49, 0
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[6:7], v49, s[20:21] offset:40
	global_load_b128 v[0:3], v49, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB14_196
; %bb.195:
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, v49
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v6, 2 :: v_dual_mov_b32 v7, 1
	global_store_b128 v[8:9], v[4:7], off offset:8
.LBB14_196:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[48:49]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v48, 33 :: v_dual_mov_b32 v51, v49
	v_mov_b32_e32 v50, v49
	v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v5, s11
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[48:51], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB14_204
; %bb.197:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB14_200
; %bb.198:                              ; %.preheader1.i.i.i45.preheader
	s_mov_b32 s8, 0
.LBB14_199:                             ; %.preheader1.i.i.i45
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB14_199
.LBB14_200:                             ; %Flow276
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB14_202
; %bb.201:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB14_202:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB14_204
; %bb.203:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB14_204:                             ; %Flow277
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB14_205:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_207
; %bb.206:                              ;   in Loop: Header=BB14_205 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB14_207:                             ;   in Loop: Header=BB14_205 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB14_209
; %bb.208:                              ;   in Loop: Header=BB14_205 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB14_210
.LBB14_209:                             ;   in Loop: Header=BB14_205 Depth=1
	s_mov_b32 s1, -1
.LBB14_210:                             ; %Flow271
                                        ;   in Loop: Header=BB14_205 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB14_205
; %bb.211:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_215
; %bb.212:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB14_215
; %bb.213:                              ; %.preheader.i.i.i44.preheader
	s_mov_b32 s0, 0
.LBB14_214:                             ; %.preheader.i.i.i44
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB14_214
.LBB14_215:                             ; %__ockl_printf_begin.exit48
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.6@rel32@lo+4
	s_addc_u32 s1, s1, .str.6@rel32@hi+12
	v_readlane_b32 s30, v40, 0
	s_cmp_lg_u64 s[0:1], 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v2, s0
	s_cselect_b32 s4, 61, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v4, s4
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[18:19]
	v_readlane_b32 s31, v40, 1
	s_or_saveexec_b32 s0, -1
	scratch_load_b32 v40, off, s33          ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s0
	s_add_i32 s32, s32, -16
	s_mov_b32 s33, s22
	s_setpc_b64 s[2:3]
.Lfunc_end14:
	.size	_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE13showBasicInfoEv, .Lfunc_end14-_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE13showBasicInfoEv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 11436
; NumSgprs: 36
; NumVgprs: 52
; ScratchSize: 16
; MemoryBound: 0
	.text
	.protected	_Z4testv                ; -- Begin function _Z4testv
	.globl	_Z4testv
	.p2align	8
	.type	_Z4testv,@function
_Z4testv:                               ; @_Z4testv
; %bb.0:
	v_dual_mov_b32 v43, v0 :: v_dual_mov_b32 v0, 0
	s_mov_b32 s43, s15
	s_mov_b64 s[44:45], s[2:3]
	s_mov_b64 s[36:37], s[0:1]
	s_mov_b64 s[0:1], 0xaf0
	s_mov_b32 s2, 0
	s_movk_i32 s32, 0x6070
.LBB15_1:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v1, v0
	v_mov_b32_e32 v3, v0
	v_add_nc_u32_e64 v4, s2, 16
	v_mov_b32_e32 v2, v0
	s_add_i32 s3, s2, 16
	s_add_i32 s2, s2, 28
	s_add_u32 s0, s0, 0xffffffe4
	s_addc_u32 s1, s1, -1
	scratch_store_b128 off, v[0:3], s3
	v_add_nc_u32_e32 v3, 16, v4
	s_cmp_lg_u64 s[0:1], 0
	scratch_store_b96 v3, v[0:2], off
	s_cbranch_scc1 .LBB15_1
; %bb.2:
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v3, 0x64
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0xff
	v_mov_b32_e32 v4, 0x65
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v0, 0xaf0, v0
	s_movk_i32 s0, 0xfe68
	v_mov_b32_e32 v5, v2
	s_mov_b32 s1, -1
	scratch_store_b128 off, v[2:5], off offset:4032
.LBB15_3:                               ; %.lr.ph.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v0, v1, off
	scratch_store_b8 v0, v1, off offset:1
	scratch_store_b8 v0, v1, off offset:2
	scratch_store_b8 v0, v1, off offset:3
	v_add_nc_u32_e32 v0, 4, v0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_3
; %bb.4:                                ; %_ZL6memsetPvim.exit.i.i.i
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, 0xff
	s_movk_i32 s0, 0xfe68
	s_mov_b32 s1, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v0, 0xc88, v0
.LBB15_5:                               ; %.lr.ph.i.i2.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v0, v1, off
	scratch_store_b8 v0, v1, off offset:1
	scratch_store_b8 v0, v1, off offset:2
	scratch_store_b8 v0, v1, off offset:3
	v_add_nc_u32_e32 v0, 4, v0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_5
; %bb.6:                                ; %_ZL6memsetPvim.exit6.i.i.i
	scratch_load_b32 v0, off, off offset:4032
	v_mov_b32_e32 v1, 0x65
	s_mov_b32 s42, 16
	v_mov_b32_e32 v2, 0x64
	s_addk_i32 s42, 0xe20
	s_mov_b32 s0, 0
	s_clause 0x1
	scratch_store_b32 off, v1, off offset:3624
	scratch_store_b32 off, v2, off offset:3220
.LBB15_7:                               ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v0, v0, 2, s42
	v_mov_b32_e32 v1, s0
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s0, 0x64
	scratch_store_b32 v0, v1, off
	scratch_load_b32 v0, off, off offset:4032
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 off, v0, off offset:4032
	s_cbranch_scc1 .LBB15_7
; %bb.8:                                ; %_ZN18gpu_linearized_stl4listIN10gpu_ginkgo5OrderELi100EEC2Ev.exit.i.i
	v_mov_b32_e32 v0, 0
	s_mov_b64 s[0:1], 0xaf0
	s_mov_b32 s2, 0
.LBB15_9:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e64 v4, s2, 16
	s_add_i32 s2, s2, 28
	v_mov_b32_e32 v1, v0
	v_mov_b32_e32 v2, v0
	v_mov_b32_e32 v3, v0
	v_add_nc_u32_e32 v5, 0xfc0, v4
	s_add_u32 s0, s0, 0xffffffe4
	v_add_nc_u32_e32 v4, 0xfd0, v4
	s_addc_u32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_clause 0x1
	scratch_store_b128 v5, v[0:3], off
	scratch_store_b96 v4, v[0:2], off
	s_cbranch_scc1 .LBB15_9
; %bb.10:
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v3, 0x64
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0xff
	s_movk_i32 s0, 0x1f70
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v0, 0x1ab0, v0
	v_add_nc_u32_e64 v83, s0, 16
	v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, 0x65
	v_mov_b32_e32 v6, 0x1000
	s_movk_i32 s0, 0xfe68
	s_mov_b32 s1, -1
	scratch_store_b128 v6, v[2:5], off offset:3968
.LBB15_11:                              ; %.lr.ph.i.i.i7.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v0, v1, off
	scratch_store_b8 v0, v1, off offset:1
	scratch_store_b8 v0, v1, off offset:2
	scratch_store_b8 v0, v1, off offset:3
	v_add_nc_u32_e32 v0, 4, v0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_11
; %bb.12:                               ; %_ZL6memsetPvim.exit.i11.i.i
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, 0xff
	s_movk_i32 s0, 0xfe68
	s_mov_b32 s1, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v0, 0x1c48, v0
.LBB15_13:                              ; %.lr.ph.i.i2.i12.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v0, v1, off
	scratch_store_b8 v0, v1, off offset:1
	scratch_store_b8 v0, v1, off offset:2
	scratch_store_b8 v0, v1, off offset:3
	v_add_nc_u32_e32 v0, 4, v0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_13
; %bb.14:                               ; %_ZL6memsetPvim.exit6.i16.i.i
	scratch_load_b32 v0, v83, off
	v_dual_mov_b32 v1, 16 :: v_dual_mov_b32 v2, 0x65
	s_movk_i32 s0, 0xfc0
	v_mov_b32_e32 v3, 0x64
	s_add_i32 s1, s0, 16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v85, 0x1de0, v1
	s_mov_b32 s0, 0
	s_clause 0x1
	scratch_store_b32 off, v2, s1 offset:3608
	scratch_store_b32 off, v3, s1 offset:3204
.LBB15_15:                              ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v0, v0, 2, v85
	v_mov_b32_e32 v1, s0
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s0, 0x64
	scratch_store_b32 v0, v1, off
	scratch_load_b32 v0, v83, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v83, v0, off
	s_cbranch_scc1 .LBB15_15
; %bb.16:                               ; %_ZN18gpu_linearized_stl4listIN10gpu_ginkgo5OrderELi100EEC2Ev.exit20.i.i
	v_mov_b32_e32 v0, 0
	s_mov_b64 s[0:1], 0xaf0
	s_mov_b32 s2, 0
.LBB15_17:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e64 v4, s2, 16
	s_add_i32 s2, s2, 28
	v_mov_b32_e32 v1, v0
	v_mov_b32_e32 v2, v0
	v_mov_b32_e32 v3, v0
	v_add_nc_u32_e32 v5, 0x1f80, v4
	s_add_u32 s0, s0, 0xffffffe4
	v_add_nc_u32_e32 v4, 0x1f90, v4
	s_addc_u32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_clause 0x1
	scratch_store_b128 v5, v[0:3], off
	scratch_store_b96 v4, v[0:2], off
	s_cbranch_scc1 .LBB15_17
; %bb.18:
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v3, 0x64
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0xff
	s_movk_i32 s0, 0x2f30
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v0, 0x2a70, v0
	v_add_nc_u32_e64 v87, s0, 16
	v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, 0x65
	v_mov_b32_e32 v6, 0x2000
	s_movk_i32 s0, 0xfe68
	s_mov_b32 s1, -1
	scratch_store_b128 v6, v[2:5], off offset:3904
.LBB15_19:                              ; %.lr.ph.i.i.i24.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v0, v1, off
	scratch_store_b8 v0, v1, off offset:1
	scratch_store_b8 v0, v1, off offset:2
	scratch_store_b8 v0, v1, off offset:3
	v_add_nc_u32_e32 v0, 4, v0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_19
; %bb.20:                               ; %_ZL6memsetPvim.exit.i28.i.i
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, 0xff
	s_movk_i32 s0, 0xfe68
	s_mov_b32 s1, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v0, 0x2c08, v0
.LBB15_21:                              ; %.lr.ph.i.i2.i29.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v0, v1, off
	scratch_store_b8 v0, v1, off offset:1
	scratch_store_b8 v0, v1, off offset:2
	scratch_store_b8 v0, v1, off offset:3
	v_add_nc_u32_e32 v0, 4, v0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_21
; %bb.22:                               ; %_ZL6memsetPvim.exit6.i33.i.i
	scratch_load_b32 v0, v87, off
	v_mov_b32_e32 v1, 0x65
	s_mov_b32 s50, 16
	s_movk_i32 s0, 0x1f80
	v_mov_b32_e32 v2, 0x64
	s_addk_i32 s50, 0x2da0
	s_add_i32 s1, s0, 16
	s_mov_b32 s0, 0
	s_clause 0x1
	scratch_store_b32 off, v1, s1 offset:3608
	scratch_store_b32 off, v2, s1 offset:3204
.LBB15_23:                              ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v0, v0, 2, s50
	v_mov_b32_e32 v1, s0
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s0, 0x64
	scratch_store_b32 v0, v1, off
	scratch_load_b32 v0, v87, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v87, v0, off
	s_cbranch_scc1 .LBB15_23
; %bb.24:                               ; %_ZN18gpu_linearized_stl4listIN10gpu_ginkgo5OrderELi100EEC2Ev.exit37.i.i
	v_dual_mov_b32 v1, 16 :: v_dual_mov_b32 v8, 0x2000
	v_dual_mov_b32 v9, 1 :: v_dual_mov_b32 v0, 0
	s_movk_i32 s0, 0x2f44
	s_movk_i32 s2, 0x2f54
	v_add_nc_u32_e64 v75, s0, 16
	s_movk_i32 s0, 0x2fa4
	v_dual_mov_b32 v2, v0 :: v_dual_add_nc_u32 v91, 0x2f40, v1
	v_add_nc_u32_e64 v76, s0, 16
	v_add_nc_u32_e64 v4, s2, 16
	v_dual_mov_b32 v3, 0x400 :: v_dual_mov_b32 v6, v0
	v_mov_b32_e32 v1, v0
	v_mov_b32_e32 v5, 10
	v_mov_b32_e32 v7, v0
	s_movk_i32 s0, 0xffd8
	s_mov_b32 s1, -1
	s_clause 0x2
	scratch_store_b8 v8, v9, off offset:3920
	scratch_store_b128 v8, v[0:3], off offset:3924
	scratch_store_b96 v8, v[5:7], off offset:4020
.LBB15_25:                              ; %.lr.ph.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v4, v0, off
	scratch_store_b8 v4, v0, off offset:1
	scratch_store_b8 v4, v0, off offset:2
	scratch_store_b8 v4, v0, off offset:3
	v_add_nc_u32_e32 v4, 4, v4
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_25
; %bb.26:                               ; %_ZL6memsetPvim.exit.i.i
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, 0
	s_movk_i32 s0, 0xffd8
	s_mov_b32 s1, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v0, 0x2f7c, v0
.LBB15_27:                              ; %.lr.ph.i.i38.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v0, v1, off
	scratch_store_b8 v0, v1, off offset:1
	scratch_store_b8 v0, v1, off offset:2
	scratch_store_b8 v0, v1, off offset:3
	v_add_nc_u32_e32 v0, 4, v0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_27
; %bb.28:                               ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EEC2ERKbRKiS5_.exit.i
	v_mov_b32_e32 v0, 0
	s_mov_b64 s[0:1], 0xaf0
	s_mov_b32 s2, 0
.LBB15_29:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e64 v4, s2, 16
	s_add_i32 s2, s2, 28
	v_mov_b32_e32 v1, v0
	v_mov_b32_e32 v2, v0
	v_mov_b32_e32 v3, v0
	v_add_nc_u32_e32 v5, 0x2fb0, v4
	s_add_u32 s0, s0, 0xffffffe4
	v_add_nc_u32_e32 v4, 0x2fc0, v4
	s_addc_u32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_clause 0x1
	scratch_store_b128 v5, v[0:3], off
	scratch_store_b96 v4, v[0:2], off
	s_cbranch_scc1 .LBB15_29
; %bb.30:
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v3, 0x64
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0xff
	s_movk_i32 s0, 0x3f60
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v0, 0x3aa0, v0
	v_add_nc_u32_e64 v74, s0, 16
	v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, 0x65
	v_mov_b32_e32 v6, 0x3000
	s_movk_i32 s0, 0xfe68
	s_mov_b32 s1, -1
	scratch_store_b128 v6, v[2:5], off offset:3952
.LBB15_31:                              ; %.lr.ph.i.i.i.i13.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v0, v1, off
	scratch_store_b8 v0, v1, off offset:1
	scratch_store_b8 v0, v1, off offset:2
	scratch_store_b8 v0, v1, off offset:3
	v_add_nc_u32_e32 v0, 4, v0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_31
; %bb.32:                               ; %_ZL6memsetPvim.exit.i.i17.i
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, 0xff
	s_movk_i32 s0, 0xfe68
	s_mov_b32 s1, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v0, 0x3c38, v0
.LBB15_33:                              ; %.lr.ph.i.i2.i.i18.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v0, v1, off
	scratch_store_b8 v0, v1, off offset:1
	scratch_store_b8 v0, v1, off offset:2
	scratch_store_b8 v0, v1, off offset:3
	v_add_nc_u32_e32 v0, 4, v0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_33
; %bb.34:                               ; %_ZL6memsetPvim.exit6.i.i22.i
	scratch_load_b32 v0, v74, off
	v_mov_b32_e32 v1, 0x65
	s_mov_b32 s48, 16
	s_movk_i32 s0, 0x2fb0
	v_mov_b32_e32 v2, 0x64
	s_addk_i32 s48, 0x3dd0
	s_add_i32 s1, s0, 16
	s_mov_b32 s0, 0
	s_clause 0x1
	scratch_store_b32 off, v1, s1 offset:3608
	scratch_store_b32 off, v2, s1 offset:3204
.LBB15_35:                              ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v0, v0, 2, s48
	v_mov_b32_e32 v1, s0
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s0, 0x64
	scratch_store_b32 v0, v1, off
	scratch_load_b32 v0, v74, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v74, v0, off
	s_cbranch_scc1 .LBB15_35
; %bb.36:                               ; %_ZN18gpu_linearized_stl4listIN10gpu_ginkgo5OrderELi100EEC2Ev.exit.i26.i
	v_mov_b32_e32 v0, 0
	s_mov_b64 s[0:1], 0xaf0
	s_mov_b32 s2, 0
.LBB15_37:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e64 v4, s2, 16
	s_add_i32 s2, s2, 28
	v_mov_b32_e32 v1, v0
	v_mov_b32_e32 v2, v0
	v_mov_b32_e32 v3, v0
	v_add_nc_u32_e32 v5, 0x3f70, v4
	s_add_u32 s0, s0, 0xffffffe4
	v_add_nc_u32_e32 v4, 0x3f80, v4
	s_addc_u32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_clause 0x1
	scratch_store_b128 v5, v[0:3], off
	scratch_store_b96 v4, v[0:2], off
	s_cbranch_scc1 .LBB15_37
; %bb.38:
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v3, 0x64
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0xff
	s_movk_i32 s0, 0x4f20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v0, 0x4a60, v0
	v_add_nc_u32_e64 v82, s0, 16
	v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, 0x65
	v_mov_b32_e32 v6, 0x4000
	s_movk_i32 s0, 0xfe68
	s_mov_b32 s1, -1
	scratch_store_b128 v6, v[2:5], off offset:3888
.LBB15_39:                              ; %.lr.ph.i.i.i7.i30.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v0, v1, off
	scratch_store_b8 v0, v1, off offset:1
	scratch_store_b8 v0, v1, off offset:2
	scratch_store_b8 v0, v1, off offset:3
	v_add_nc_u32_e32 v0, 4, v0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_39
; %bb.40:                               ; %_ZL6memsetPvim.exit.i11.i34.i
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, 0xff
	s_movk_i32 s0, 0xfe68
	s_mov_b32 s1, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v0, 0x4bf8, v0
.LBB15_41:                              ; %.lr.ph.i.i2.i12.i35.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v0, v1, off
	scratch_store_b8 v0, v1, off offset:1
	scratch_store_b8 v0, v1, off offset:2
	scratch_store_b8 v0, v1, off offset:3
	v_add_nc_u32_e32 v0, 4, v0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_41
; %bb.42:                               ; %_ZL6memsetPvim.exit6.i16.i39.i
	scratch_load_b32 v0, v82, off
	v_dual_mov_b32 v1, 16 :: v_dual_mov_b32 v2, 0x65
	s_movk_i32 s0, 0x3f70
	v_mov_b32_e32 v3, 0x64
	s_add_i32 s1, s0, 16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v84, 0x4d90, v1
	s_mov_b32 s0, 0
	s_clause 0x1
	scratch_store_b32 off, v2, s1 offset:3608
	scratch_store_b32 off, v3, s1 offset:3204
.LBB15_43:                              ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v0, v0, 2, v84
	v_mov_b32_e32 v1, s0
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s0, 0x64
	scratch_store_b32 v0, v1, off
	scratch_load_b32 v0, v82, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v82, v0, off
	s_cbranch_scc1 .LBB15_43
; %bb.44:                               ; %_ZN18gpu_linearized_stl4listIN10gpu_ginkgo5OrderELi100EEC2Ev.exit20.i43.i
	v_mov_b32_e32 v0, 0
	s_mov_b64 s[0:1], 0xaf0
	s_mov_b32 s2, 0
.LBB15_45:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e64 v4, s2, 16
	s_add_i32 s2, s2, 28
	v_mov_b32_e32 v1, v0
	v_mov_b32_e32 v2, v0
	v_mov_b32_e32 v3, v0
	v_add_nc_u32_e32 v5, 0x4f30, v4
	s_add_u32 s0, s0, 0xffffffe4
	v_add_nc_u32_e32 v4, 0x4f40, v4
	s_addc_u32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_clause 0x1
	scratch_store_b128 v5, v[0:3], off
	scratch_store_b96 v4, v[0:2], off
	s_cbranch_scc1 .LBB15_45
; %bb.46:
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v3, 0x64
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0xff
	s_movk_i32 s0, 0x5ee0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v0, 0x5a20, v0
	v_add_nc_u32_e64 v86, s0, 16
	v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, 0x65
	v_mov_b32_e32 v6, 0x5000
	s_movk_i32 s0, 0xfe68
	s_mov_b32 s1, -1
	scratch_store_b128 v6, v[2:5], off offset:3824
.LBB15_47:                              ; %.lr.ph.i.i.i24.i47.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v0, v1, off
	scratch_store_b8 v0, v1, off offset:1
	scratch_store_b8 v0, v1, off offset:2
	scratch_store_b8 v0, v1, off offset:3
	v_add_nc_u32_e32 v0, 4, v0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_47
; %bb.48:                               ; %_ZL6memsetPvim.exit.i28.i51.i
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, 0xff
	s_movk_i32 s0, 0xfe68
	s_mov_b32 s1, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v0, 0x5bb8, v0
.LBB15_49:                              ; %.lr.ph.i.i2.i29.i52.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v0, v1, off
	scratch_store_b8 v0, v1, off offset:1
	scratch_store_b8 v0, v1, off offset:2
	scratch_store_b8 v0, v1, off offset:3
	v_add_nc_u32_e32 v0, 4, v0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_49
; %bb.50:                               ; %_ZL6memsetPvim.exit6.i33.i56.i
	scratch_load_b32 v0, v86, off
	v_mov_b32_e32 v1, 0x65
	s_mov_b32 s49, 16
	s_movk_i32 s0, 0x4f30
	v_mov_b32_e32 v2, 0x64
	s_addk_i32 s49, 0x5d50
	s_add_i32 s1, s0, 16
	s_mov_b32 s0, 0
	s_clause 0x1
	scratch_store_b32 off, v1, s1 offset:3608
	scratch_store_b32 off, v2, s1 offset:3204
.LBB15_51:                              ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v0, v0, 2, s49
	v_mov_b32_e32 v1, s0
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s0, 0x64
	scratch_store_b32 v0, v1, off
	scratch_load_b32 v0, v86, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v86, v0, off
	s_cbranch_scc1 .LBB15_51
; %bb.52:                               ; %_ZN18gpu_linearized_stl4listIN10gpu_ginkgo5OrderELi100EEC2Ev.exit37.i60.i
	v_dual_mov_b32 v1, 16 :: v_dual_mov_b32 v0, 0
	s_movk_i32 s0, 0x5ef4
	s_movk_i32 s2, 0x5f04
	v_add_nc_u32_e64 v78, s0, 16
	s_movk_i32 s0, 0x5f54
	v_mov_b32_e32 v8, 0x5000
	v_dual_mov_b32 v5, 10 :: v_dual_add_nc_u32 v92, 0x5ef0, v1
	v_dual_mov_b32 v3, 0x400 :: v_dual_mov_b32 v2, v0
	v_mov_b32_e32 v1, v0
	v_add_nc_u32_e64 v79, s0, 16
	v_add_nc_u32_e64 v4, s2, 16
	v_mov_b32_e32 v6, v0
	v_mov_b32_e32 v7, v0
	s_movk_i32 s0, 0xffd8
	s_mov_b32 s1, -1
	s_clause 0x2
	scratch_store_b8 v8, v0, off offset:3840
	scratch_store_b128 v8, v[0:3], off offset:3844
	scratch_store_b96 v8, v[5:7], off offset:3940
.LBB15_53:                              ; %.lr.ph.i.i.i61.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v4, v0, off
	scratch_store_b8 v4, v0, off offset:1
	scratch_store_b8 v4, v0, off offset:2
	scratch_store_b8 v4, v0, off offset:3
	v_add_nc_u32_e32 v4, 4, v4
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_53
; %bb.54:                               ; %_ZL6memsetPvim.exit.i65.i
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, 0
	s_movk_i32 s0, 0xffd8
	s_mov_b32 s1, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v0, 0x5f2c, v0
.LBB15_55:                              ; %.lr.ph.i.i38.i66.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v0, v1, off
	scratch_store_b8 v0, v1, off offset:1
	scratch_store_b8 v0, v1, off offset:2
	scratch_store_b8 v0, v1, off offset:3
	v_add_nc_u32_e32 v0, 4, v0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_55
; %bb.56:                               ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EEC2ERKbRKiS5_.exit70.i
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v9, 0x5000
	s_mov_b32 s0, 0
	v_mov_b32_e32 v3, 0x40a
	s_mov_b32 s3, s0
	s_mov_b32 s1, s0
	s_mov_b32 s2, s0
	v_dual_mov_b32 v8, s3 :: v_dual_add_nc_u32 v63, 0x5f60, v0
	v_dual_mov_b32 v7, s2 :: v_dual_mov_b32 v6, s1
	v_dual_mov_b32 v5, s0 :: v_dual_mov_b32 v4, 0x3ff
	s_movk_i32 s0, 0x5f70
	v_mov_b32_e32 v0, 0
	v_add_nc_u32_e64 v88, s0, 16
	s_movk_i32 s0, 0x5fa0
	s_movk_i32 s1, 0x5fc8
	v_add_nc_u32_e64 v89, s0, 16
	s_movk_i32 s0, 0x5f78
	s_clause 0x1
	scratch_store_b128 v9, v[5:8], off offset:3952
	scratch_store_b64 v9, v[3:4], off offset:3968
	v_add_nc_u32_e64 v90, s0, 16
	v_add_nc_u32_e64 v77, s1, 16
	v_dual_mov_b32 v10, 1 :: v_dual_mov_b32 v1, v0
	v_mov_b32_e32 v2, 0x400
	s_delay_alu instid0(VALU_DEP_4)
	v_mov_b32_e32 v4, v90
	s_movk_i32 s0, 0xffd8
	s_mov_b32 s1, -1
	s_clause 0x4
	scratch_store_b128 v9, v[5:8], off offset:4016
	scratch_store_b32 v9, v0, off offset:4032
	scratch_store_b8 v9, v10, off offset:4036
	scratch_store_b128 v9, v[0:3], off offset:4040
	scratch_store_b32 v9, v2, off offset:4056
.LBB15_57:                              ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x3
	scratch_store_b8 v4, v0, off
	scratch_store_b8 v4, v0, off offset:1
	scratch_store_b8 v4, v0, off offset:2
	scratch_store_b8 v4, v0, off offset:3
	v_add_nc_u32_e32 v4, 4, v4
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_cbranch_scc1 .LBB15_57
; %bb.58:                               ; %_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EEC2ERKiS3_.exit
	s_load_b64 s[38:39], s[44:45], 0x50
	v_mbcnt_lo_u32_b32 v58, -1, 0
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v58
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_64
; %bb.59:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_63
; %bb.60:                               ; %.preheader3.i.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB15_61:                              ; %.preheader3.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_61
; %bb.62:                               ; %Flow2759
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_63:                              ; %Flow2761
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_64:                              ; %.loopexit4.i.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_66
; %bb.65:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_66:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_73
; %bb.67:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_69
.LBB15_68:                              ; %.preheader1.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_68
.LBB15_69:                              ; %Flow2757
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_71
; %bb.70:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_71:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_73
; %bb.72:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_73:                              ; %Flow2758
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_74:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_76
; %bb.75:                               ;   in Loop: Header=BB15_74 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_76:                              ;   in Loop: Header=BB15_74 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_78
; %bb.77:                               ;   in Loop: Header=BB15_74 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_79
.LBB15_78:                              ;   in Loop: Header=BB15_74 Depth=1
	s_mov_b32 s1, -1
.LBB15_79:                              ; %Flow2752
                                        ;   in Loop: Header=BB15_74 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_74
; %bb.80:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_84
; %bb.81:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_84
; %bb.82:                               ; %.preheader.i.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB15_83:                              ; %.preheader.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_83
.LBB15_84:                              ; %__ockl_printf_begin.exit.i
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.3@rel32@lo+4
	s_addc_u32 s1, s1, .str.3@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s55, 61, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s55
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v4, v58
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_90
; %bb.85:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_89
; %bb.86:                               ; %.preheader3.i.i.i6.i.preheader
	s_mov_b32 s3, 0
.LBB15_87:                              ; %.preheader3.i.i.i6.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_87
; %bb.88:                               ; %Flow2745
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_89:                              ; %Flow2747
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_90:                              ; %.loopexit4.i.i.i1.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_92
; %bb.91:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_92:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_100
; %bb.93:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_96
; %bb.94:                               ; %.preheader1.i.i.i4.i.preheader
	s_mov_b32 s8, 0
.LBB15_95:                              ; %.preheader1.i.i.i4.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_95
.LBB15_96:                              ; %Flow2743
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_98
; %bb.97:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_98:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_100
; %bb.99:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_100:                             ; %Flow2744
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_101:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_103
; %bb.102:                              ;   in Loop: Header=BB15_101 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_103:                             ;   in Loop: Header=BB15_101 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_105
; %bb.104:                              ;   in Loop: Header=BB15_101 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_106
.LBB15_105:                             ;   in Loop: Header=BB15_101 Depth=1
	s_mov_b32 s1, -1
.LBB15_106:                             ; %Flow2738
                                        ;   in Loop: Header=BB15_101 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_101
; %bb.107:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_111
; %bb.108:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_111
; %bb.109:                              ; %.preheader.i.i.i3.i.preheader
	s_mov_b32 s0, 0
.LBB15_110:                             ; %.preheader.i.i.i3.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_110
.LBB15_111:                             ; %__ockl_printf_begin.exit7.i
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.4@rel32@lo+4
	s_addc_u32 s1, s1, .str.4@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s54, 31, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s54
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b64 s[46:47], src_private_base
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, 16
	v_mov_b32_e32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, 16
	v_mov_b32_e32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, 16
	v_mov_b32_e32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v4, v58
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_117
; %bb.112:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_116
; %bb.113:                              ; %.preheader3.i.i.i13.i.preheader
	s_mov_b32 s3, 0
.LBB15_114:                             ; %.preheader3.i.i.i13.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_114
; %bb.115:                              ; %Flow2731
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_116:                             ; %Flow2733
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_117:                             ; %.loopexit4.i.i.i8.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_119
; %bb.118:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_119:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_127
; %bb.120:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_123
; %bb.121:                              ; %.preheader1.i.i.i11.i.preheader
	s_mov_b32 s8, 0
.LBB15_122:                             ; %.preheader1.i.i.i11.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_122
.LBB15_123:                             ; %Flow2729
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_125
; %bb.124:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_125:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_127
; %bb.126:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_127:                             ; %Flow2730
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_128:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_130
; %bb.129:                              ;   in Loop: Header=BB15_128 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_130:                             ;   in Loop: Header=BB15_128 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_132
; %bb.131:                              ;   in Loop: Header=BB15_128 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_133
.LBB15_132:                             ;   in Loop: Header=BB15_128 Depth=1
	s_mov_b32 s1, -1
.LBB15_133:                             ; %Flow2724
                                        ;   in Loop: Header=BB15_128 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_128
; %bb.134:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_138
; %bb.135:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_138
; %bb.136:                              ; %.preheader.i.i.i10.i.preheader
	s_mov_b32 s0, 0
.LBB15_137:                             ; %.preheader.i.i.i10.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_137
.LBB15_138:                             ; %__ockl_printf_begin.exit14.i
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.5@rel32@lo+4
	s_addc_u32 s1, s1, .str.5@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s53, 30, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s53
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	s_movk_i32 s0, 0x2fb0
	s_mov_b64 s[8:9], s[44:45]
	s_add_u32 s46, 16, s0
	s_addc_u32 s51, s47, 0
	v_dual_mov_b32 v0, s46 :: v_dual_mov_b32 v1, s51
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, s46
	v_mov_b32_e32 v1, s51
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, s46
	v_mov_b32_e32 v1, s51
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, s46
	v_mov_b32_e32 v1, s51
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, s46 :: v_dual_mov_b32 v1, s51
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v4, v58
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_144
; %bb.139:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_143
; %bb.140:                              ; %.preheader3.i.i.i20.i.preheader
	s_mov_b32 s3, 0
.LBB15_141:                             ; %.preheader3.i.i.i20.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_141
; %bb.142:                              ; %Flow2717
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_143:                             ; %Flow2719
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_144:                             ; %.loopexit4.i.i.i15.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_146
; %bb.145:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_146:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_154
; %bb.147:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_150
; %bb.148:                              ; %.preheader1.i.i.i18.i.preheader
	s_mov_b32 s8, 0
.LBB15_149:                             ; %.preheader1.i.i.i18.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_149
.LBB15_150:                             ; %Flow2715
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_152
; %bb.151:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_152:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_154
; %bb.153:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_154:                             ; %Flow2716
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_155:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_157
; %bb.156:                              ;   in Loop: Header=BB15_155 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_157:                             ;   in Loop: Header=BB15_155 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_159
; %bb.158:                              ;   in Loop: Header=BB15_155 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_160
.LBB15_159:                             ;   in Loop: Header=BB15_155 Depth=1
	s_mov_b32 s1, -1
.LBB15_160:                             ; %Flow2710
                                        ;   in Loop: Header=BB15_155 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_155
; %bb.161:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_165
; %bb.162:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_165
; %bb.163:                              ; %.preheader.i.i.i17.i.preheader
	s_mov_b32 s0, 0
.LBB15_164:                             ; %.preheader.i.i.i17.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_164
.LBB15_165:                             ; %_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE17showOrderBookInfoEv.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.6@rel32@lo+4
	s_addc_u32 s1, s1, .str.6@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s41, 61, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s41
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v1, 33
	v_mov_b32_e32 v0, 0x5000
	v_dual_mov_b32 v6, v58 :: v_dual_mov_b32 v7, 0
	v_dual_mov_b32 v5, v4 :: v_dual_mov_b32 v8, 0
	s_clause 0x1
	scratch_store_b32 v0, v1, off offset:3964
	scratch_store_b64 v0, v[4:5], off offset:4028
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v6
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_171
; %bb.166:
	global_load_b64 v[2:3], v4, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v4, s[38:39] offset:40
	global_load_b64 v[7:8], v4, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v5, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v5, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v7, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v4, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[2:3]
	s_cbranch_execz .LBB15_170
; %bb.167:                              ; %.preheader3.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB15_168:                             ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v4, s[38:39] offset:40
	global_load_b64 v[9:10], v4, s[38:39]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, v0, v2
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v0, 24, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v0, v8 :: v_dual_and_b32 v1, v1, v3
	v_mad_u64_u32 v[8:9], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[7:8], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v4, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_168
; %bb.169:                              ; %Flow2703
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_170:                             ; %Flow2705
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_171:                             ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[9:10], v4, s[38:39] offset:40
	global_load_b128 v[0:3], v4, s[38:39]
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_173
; %bb.172:
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, 0
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB15_173:
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v7, v4
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_lshlrev_b64 v[4:5], 6, v[6:7]
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_mov_b32_e32 v3, 0
	v_add_co_u32 v8, vcc_lo, v2, v4
	v_dual_mov_b32 v13, s11 :: v_dual_mov_b32 v12, s10
	v_add_co_ci_u32_e32 v9, vcc_lo, v6, v5, vcc_lo
	v_mov_b32_e32 v2, 33
	v_dual_mov_b32 v4, v3 :: v_dual_mov_b32 v11, s9
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[2:5], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_181
; %bb.174:
	s_clause 0x1
	global_load_b64 v[14:15], v3, s[38:39] offset:32 glc
	global_load_b64 v[4:5], v3, s[38:39] offset:40
	v_dual_mov_b32 v12, s2 :: v_dual_mov_b32 v13, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v4
	v_readfirstlane_b32 s9, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v10, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v11, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[10:11], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v3, v[12:15], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[6:7], v[14:15]
	s_cbranch_execz .LBB15_177
; %bb.175:                              ; %.preheader1.i.i.i.preheader
	s_mov_b32 s8, 0
.LBB15_176:                             ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v4, s2 :: v_dual_mov_b32 v5, s3
	s_sleep 1
	global_store_b64 v[10:11], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v3, v[4:7], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_176
.LBB15_177:                             ; %Flow2701
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_179
; %bb.178:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_179:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_181
; %bb.180:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_181:                             ; %Flow2702
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_182:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_184
; %bb.183:                              ;   in Loop: Header=BB15_182 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_184:                             ;   in Loop: Header=BB15_182 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_186
; %bb.185:                              ;   in Loop: Header=BB15_182 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_187
.LBB15_186:                             ;   in Loop: Header=BB15_182 Depth=1
	s_mov_b32 s1, -1
.LBB15_187:                             ; %Flow2696
                                        ;   in Loop: Header=BB15_182 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_182
; %bb.188:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_192
; %bb.189:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_192
; %bb.190:                              ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB15_191:                             ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_191
.LBB15_192:                             ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str@rel32@lo+4
	s_addc_u32 s1, s1, .str@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v36, 16 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s56, 46, 0
	v_dual_mov_b32 v2, s0 :: v_dual_add_nc_u32 v73, 0x5f58, v36
	v_dual_mov_b32 v4, s56 :: v_dual_mov_b32 v5, 0
	s_movk_i32 s2, 0x2fa8
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s18, 0
	v_add_nc_u32_e64 v72, s2, 16
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v3, 4
	v_dual_mov_b32 v4, 5 :: v_dual_mov_b32 v1, 2
	v_mov_b32_e32 v2, 3
	s_movk_i32 s0, 0x5fe0
	v_readfirstlane_b32 s2, v36
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v5, v4 :: v_dual_mov_b32 v6, v3
	v_mov_b32_e32 v7, v2
	scratch_store_b128 off, v[0:3], s0
	s_mov_b32 s0, 1.0
	s_mov_b32 s1, 0x3e4ccccd
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, v0 :: v_dual_mov_b32 v9, s1
	v_mov_b32_e32 v0, 0x2000
	v_dual_mov_b32 v8, s0 :: v_dual_mov_b32 v3, 0x5000
	s_movk_i32 s0, 0x5fe0
	s_clause 0x1
	scratch_store_b128 off, v[4:7], s0 offset:16
	scratch_store_b64 off, v[1:2], s0 offset:32
	s_mov_b64 s[0:1], 11
	s_clause 0x1
	scratch_store_b64 v0, v[8:9], s2 offset:4008
	scratch_store_b64 v3, v[8:9], s2 offset:3928
.LBB15_193:                             ; %.lr.ph.i.i.i.i.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_add_i32 s2, s18, 0x5fe0
	v_add_nc_u32_e64 v1, s18, 16
	scratch_load_b32 v0, off, s2
	s_add_i32 s18, s18, 4
	s_add_u32 s0, s0, -1
	s_addc_u32 s1, s1, -1
	v_add_nc_u32_e32 v1, 0x5f78, v1
	v_cmp_gt_u64_e64 s2, s[0:1], 1
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	scratch_store_b32 v1, v0, off
	s_cbranch_vccnz .LBB15_193
; %bb.194:                              ; %_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE11getBookInfoEPiRKiS4_RKf.exit.i
	s_movk_i32 s0, 0xfc0
	s_movk_i32 s1, 0x2f48
	v_dual_mov_b32 v2, 16 :: v_dual_mov_b32 v1, 0x404
	v_cmp_ne_u32_e32 vcc_lo, -1, v90
	v_add_nc_u32_e64 v60, s0, 16
	v_add_nc_u32_e64 v106, s1, 16
	s_add_i32 s12, s0, 16
	s_movk_i32 s0, 0x1f78
	s_movk_i32 s1, 0x1f7c
	v_add_nc_u32_e64 v101, s0, 16
	v_add_nc_u32_e64 v102, s1, 16
	s_mov_b64 s[0:1], src_private_base
	s_movk_i32 s2, 0x2f50
	v_add_nc_u32_e32 v99, 0x5f74, v2
	v_cndmask_b32_e64 v42, 0, s1, vcc_lo
	v_mov_b32_e32 v0, 0x405
	v_dual_mov_b32 v3, 0x5000 :: v_dual_cndmask_b32 v44, 0, v90
	v_add_nc_u32_e64 v93, s2, 16
	v_mov_b32_e32 v4, 0x44809000
	v_readfirstlane_b32 s2, v2
	v_add_nc_u32_e32 v100, 0xfb4, v60
	s_clause 0x1
	scratch_store_b64 v88, v[0:1], off
	scratch_store_b32 v3, v4, s2 offset:4008
	v_dual_mov_b32 v1, s47 :: v_dual_mov_b32 v0, 16
	v_cmp_ne_u32_e64 s0, -1, v99
	v_dual_mov_b32 v2, v44 :: v_dual_mov_b32 v3, v42
	s_movk_i32 s10, 0x5fa8
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v45, 0, v99, s0
	v_cndmask_b32_e64 v46, 0, s1, s0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@hi+12
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v3, v46
	v_dual_mov_b32 v2, v45 :: v_dual_mov_b32 v5, v42
	v_mov_b32_e32 v4, v44
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_clause 0x1
	scratch_load_b64 v[0:1], off, s12 offset:4020
	scratch_load_u8 v2, v91, off
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, 0xff, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v0, v60, v0, 0xc88
	scratch_load_b32 v5, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v5, v1
	s_cbranch_execz .LBB15_213
; %bb.195:                              ; %.lr.ph.i.i
	v_cmp_eq_u16_e32 vcc_lo, 0, v3
	v_cmp_ne_u16_e64 s0, 0, v3
	v_mov_b32_e32 v4, -1
	s_movk_i32 s4, 0x2f54
	s_movk_i32 s5, 0x2f7c
.LBB15_196:                             ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[0:1], null, v5, 28, v[60:61]
	v_lshlrev_b32_e32 v1, 2, v5
	s_clause 0x1
	scratch_load_b32 v7, v0, off
	scratch_load_b32 v0, v99, off
	v_add3_u32 v6, v60, v1, 0xc88
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e64 s1, v7, v0
	v_cmp_lt_i32_e64 s2, v7, v0
                                        ; implicit-def: $vgpr0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s1, vcc_lo, s1
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s2
	s_xor_b32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB15_204
; %bb.197:                              ;   in Loop: Header=BB15_196 Depth=1
	scratch_load_b32 v0, v93, off
	v_mad_u64_u32 v[8:9], null, v5, 28, v[60:61]
	s_mov_b32 s7, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v7, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, 16, v0, s4
	s_clause 0x1
	scratch_load_b32 v2, v8, off offset:4
	scratch_load_b32 v8, v0, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v8, v8, v2
	scratch_store_b32 v0, v8, off
	s_clause 0x1
	scratch_load_b32 v0, v93, off
	scratch_load_b32 v8, v75, off
	s_waitcnt vmcnt(1)
	v_sub_nc_u32_e32 v0, v7, v0
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v8, v8, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 2, v0
	scratch_store_b32 v75, v8, off
	v_add3_u32 v0, 16, v0, s5
	scratch_load_b32 v8, v0, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v8, v8, v2
	scratch_store_b32 v0, v8, off
	scratch_load_b64 v[8:9], v106, off
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v2, v7, v[0:1]
	v_dual_mov_b32 v8, v9 :: v_dual_add_nc_u32 v7, v8, v2
	scratch_store_b64 v106, v[7:8], off
	scratch_load_b32 v0, v6, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s6, -1, v0
	v_cmpx_ne_u32_e32 -1, v0
	s_cbranch_execz .LBB15_201
; %bb.198:                              ;   in Loop: Header=BB15_196 Depth=1
	v_add3_u32 v1, v60, v1, 0xaf0
	s_mov_b32 s9, -1
	s_mov_b32 s8, exec_lo
	scratch_load_b32 v2, v1, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v2
	s_cbranch_execz .LBB15_200
; %bb.199:                              ;   in Loop: Header=BB15_196 Depth=1
	v_lshlrev_b32_e32 v7, 2, v0
	v_lshlrev_b32_e32 v8, 2, v2
	s_xor_b32 s9, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v7, v60, v7, 0xaf0
	v_add3_u32 v8, v60, v8, 0xc88
	s_clause 0x3
	scratch_store_b32 v7, v2, off
	scratch_store_b32 v8, v0, off
	scratch_store_b32 v6, v4, off
	scratch_store_b32 v1, v4, off
	s_clause 0x1
	scratch_load_b32 v1, v102, off
	scratch_load_b32 v2, v83, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v1, -1, v1
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v2, 2, v85
	s_clause 0x1
	scratch_store_b32 v102, v1, off
	scratch_store_b32 v2, v5, off
	scratch_load_b32 v1, v83, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 1, v1
	scratch_store_b32 v83, v1, off
.LBB15_200:                             ; %Flow2681
                                        ;   in Loop: Header=BB15_196 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s6, exec_lo
	s_and_b32 s6, s9, exec_lo
	s_or_b32 s6, s1, s6
.LBB15_201:                             ; %Flow2680
                                        ;   in Loop: Header=BB15_196 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s1, s6
	s_cbranch_execz .LBB15_203
; %bb.202:                              ;   in Loop: Header=BB15_196 Depth=1
	scratch_load_b32 v0, v100, off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v60, v0, 0xc88
	scratch_load_b32 v0, v0, off
.LBB15_203:                             ; %Flow2682
                                        ;   in Loop: Header=BB15_196 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr5
.LBB15_204:                             ; %Flow2687
                                        ;   in Loop: Header=BB15_196 Depth=1
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB15_212
; %bb.205:                              ;   in Loop: Header=BB15_196 Depth=1
	scratch_load_b32 v8, v93, off
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[0:1], null, v5, 28, v[60:61]
	s_mov_b32 s6, exec_lo
	scratch_load_b64 v[1:2], v0, off offset:8
	s_waitcnt vmcnt(1)
	v_sub_nc_u32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v7, v7, 2, v90
	scratch_load_b32 v8, v7, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v2, v2, v1
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v8, v2
	s_cbranch_execz .LBB15_211
; %bb.206:                              ;   in Loop: Header=BB15_196 Depth=1
	s_mov_b32 s7, exec_lo
                                        ; implicit-def: $vgpr9
	v_cmpx_le_i32_e64 v8, v2
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB15_208
; %bb.207:                              ;   in Loop: Header=BB15_196 Depth=1
	v_ashrrev_i32_e32 v9, 31, v2
	v_mul_lo_u32 v1, v8, v1
	v_add_nc_u32_e32 v0, 8, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v9
	v_xor_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v10, v2
	v_sub_nc_u32_e32 v11, 0, v2
	v_rcp_iflag_f32_e32 v10, v10
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v10, 0x4f7ffffe, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v10, v10
	v_mul_lo_u32 v8, v11, v10
	v_ashrrev_i32_e32 v11, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v1, v1, v11
	v_xor_b32_e32 v9, v11, v9
	v_mul_hi_u32 v8, v10, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v1, v11
	v_add_nc_u32_e32 v8, v10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v8, v1, v8
	v_mul_lo_u32 v10, v8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v1, v10
	v_add_nc_u32_e32 v10, 1, v8
	v_sub_nc_u32_e32 v12, v1, v2
	v_cmp_ge_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v8, v8, v10, s1
	v_cndmask_b32_e64 v1, v1, v12, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, 1, v8
	v_cmp_ge_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v1, v8, v10, s1
                                        ; implicit-def: $vgpr8
	v_xor_b32_e32 v1, v1, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v9
	scratch_store_b32 v0, v1, off
	scratch_load_b32 v0, v7, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v9, v0, v1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB15_208:                             ; %Flow2684
                                        ;   in Loop: Header=BB15_196 Depth=1
	s_and_not1_saveexec_b32 s1, s7
; %bb.209:                              ;   in Loop: Header=BB15_196 Depth=1
	v_sub_nc_u32_e32 v9, v8, v1
; %bb.210:                              ; %.sink.split.i.i.i
                                        ;   in Loop: Header=BB15_196 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[0:1], null, v5, 28, v[60:61]
	scratch_store_b32 v0, v9, off offset:12
.LBB15_211:                             ; %Flow2686
                                        ;   in Loop: Header=BB15_196 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	scratch_load_b32 v0, v6, off
.LBB15_212:                             ; %Flow2688
                                        ;   in Loop: Header=BB15_196 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	scratch_load_b32 v1, v101, off
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v5, v0
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s1, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s11, s1, s11
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB15_196
.LBB15_213:                             ; %Flow2690
	s_or_b32 exec_lo, exec_lo, s3
	scratch_load_b96 v[0:2], v106, off
	v_dual_mov_b32 v4, 0x5000 :: v_dual_mov_b32 v11, 16
	v_cmp_eq_u16_e32 vcc_lo, 0, v3
	s_clause 0x1
	scratch_load_b96 v[5:7], v63, off
	scratch_load_b32 v4, v4, off offset:4052
	v_mov_b32_e32 v8, 0
	v_add_nc_u32_e64 v113, s10, 16
	s_mov_b32 s1, 0
	v_add_nc_u32_e32 v94, 0x5fc4, v11
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v3, 10, v2
	v_sub_nc_u32_e32 v9, 0, v0
	v_sub_nc_u32_e32 v10, 0, v1
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v6, v6, v0
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e64 s0, v4, v3
	v_cndmask_b32_e32 v9, v9, v0, vcc_lo
	v_cndmask_b32_e32 v1, v1, v10, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, v7, v9
	v_add_nc_u32_e32 v5, v5, v1
	v_mov_b32_e32 v9, v8
	s_and_b32 s0, vcc_lo, s0
	s_clause 0x1
	scratch_store_b96 v63, v[5:7], off
	scratch_store_b64 v106, v[8:9], off
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB15_218
; %bb.214:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit.i.preheader
	v_lshlrev_b32_e32 v0, 2, v4
	v_lshlrev_b32_e32 v1, 2, v2
	s_movk_i32 s0, 0x2f54
                                        ; implicit-def: $sgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v0, v1
	v_add_nc_u32_e32 v0, 1, v4
	v_add3_u32 v1, 16, v1, s0
.LBB15_215:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit.i
                                        ; =>This Inner Loop Header: Depth=1
	scratch_load_b32 v4, v1, off
	s_or_b32 s3, s3, exec_lo
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_217
; %bb.216:                              ;   in Loop: Header=BB15_215 Depth=1
	v_cmp_lt_i32_e32 vcc_lo, v0, v2
	v_cmp_ge_i32_e64 s0, v0, v3
	scratch_store_b32 v94, v0, off
	v_add_nc_u32_e32 v0, 1, v0
	v_add_nc_u32_e32 v1, 4, v1
	s_and_not1_b32 s3, s3, exec_lo
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s3, s3, s0
.LBB15_217:                             ; %Flow2675
                                        ;   in Loop: Header=BB15_215 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s3
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB15_215
.LBB15_218:                             ; %Flow2677
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_ne_u32_e32 vcc_lo, -1, v88
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, s51
	s_mov_b64 s[0:1], src_private_base
	s_movk_i32 s0, 0x3f70
	v_dual_cndmask_b32 v56, 0, v88 :: v_dual_mov_b32 v3, v42
	v_add_nc_u32_e64 v59, s0, 16
	v_dual_mov_b32 v0, s46 :: v_dual_add_nc_u32 v107, 0x5ef8, v0
	v_mov_b32_e32 v2, v44
	v_cndmask_b32_e64 v47, 0, s1, vcc_lo
	s_movk_i32 s1, 0x5f00
	s_add_i32 s11, s0, 16
	v_add_nc_u32_e64 v95, s1, 16
	s_movk_i32 s0, 0x4f28
	s_movk_i32 s1, 0x4f2c
	s_mov_b32 s10, 0
	v_add_nc_u32_e32 v96, 0xfb4, v59
	v_add_nc_u32_e64 v97, s0, 16
	v_add_nc_u32_e64 v98, s1, 16
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v2, v56 :: v_dual_mov_b32 v3, v47
	v_dual_mov_b32 v4, v44 :: v_dual_mov_b32 v5, v42
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_clause 0x1
	scratch_load_b64 v[0:1], off, s11 offset:4020
	scratch_load_u8 v2, v92, off
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, 0xff, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v0, v59, v0, 0xc88
	scratch_load_b32 v6, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v6, v1
	s_cbranch_execz .LBB15_237
; %bb.219:                              ; %.lr.ph.i9.i
	s_movk_i32 s1, 0x2fb0
	v_cmp_eq_u16_e32 vcc_lo, 0, v3
	v_cmp_ne_u16_e64 s0, 0, v3
	v_add_nc_u32_e64 v4, s1, 16
	v_mov_b32_e32 v5, -1
.LBB15_220:                             ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[0:1], null, v6, 28, v[59:60]
	v_lshlrev_b32_e32 v1, 2, v6
	s_clause 0x1
	scratch_load_b32 v8, v0, off
	scratch_load_b32 v0, v88, off
	v_add3_u32 v7, v59, v1, 0xc88
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e64 s1, v8, v0
	v_cmp_lt_i32_e64 s2, v8, v0
                                        ; implicit-def: $vgpr0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s1, vcc_lo, s1
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s2
	s_xor_b32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB15_228
; %bb.221:                              ;   in Loop: Header=BB15_220 Depth=1
	scratch_load_b32 v0, v95, off
	v_mad_u64_u32 v[9:10], null, v6, 28, v[59:60]
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, v4, v0, 0x2f54
	s_clause 0x1
	scratch_load_b32 v2, v9, off offset:4
	scratch_load_b32 v9, v0, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v9, v9, v2
	scratch_store_b32 v0, v9, off
	s_clause 0x1
	scratch_load_b32 v0, v95, off
	scratch_load_b32 v9, v78, off
	s_waitcnt vmcnt(1)
	v_sub_nc_u32_e32 v0, v8, v0
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v9, v9, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 2, v0
	scratch_store_b32 v78, v9, off
	v_add3_u32 v0, v4, v0, 0x2f7c
	scratch_load_b32 v9, v0, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v9, v9, v2
	scratch_store_b32 v0, v9, off
	scratch_load_b64 v[9:10], v107, off
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v0, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v2, v8, v[0:1]
	v_dual_mov_b32 v9, v10 :: v_dual_add_nc_u32 v8, v9, v2
	scratch_store_b64 v107, v[8:9], off
	scratch_load_b32 v0, v7, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s4, -1, v0
	v_cmpx_ne_u32_e32 -1, v0
	s_cbranch_execz .LBB15_225
; %bb.222:                              ;   in Loop: Header=BB15_220 Depth=1
	v_add3_u32 v1, v59, v1, 0xaf0
	s_mov_b32 s7, -1
	s_mov_b32 s6, exec_lo
	scratch_load_b32 v2, v1, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v2
	s_cbranch_execz .LBB15_224
; %bb.223:                              ;   in Loop: Header=BB15_220 Depth=1
	v_lshlrev_b32_e32 v8, 2, v0
	v_lshlrev_b32_e32 v9, 2, v2
	s_xor_b32 s7, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v8, v59, v8, 0xaf0
	v_add3_u32 v9, v59, v9, 0xc88
	s_clause 0x3
	scratch_store_b32 v8, v2, off
	scratch_store_b32 v9, v0, off
	scratch_store_b32 v7, v5, off
	scratch_store_b32 v1, v5, off
	s_clause 0x1
	scratch_load_b32 v1, v98, off
	scratch_load_b32 v2, v82, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v1, -1, v1
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v2, 2, v84
	s_clause 0x1
	scratch_store_b32 v98, v1, off
	scratch_store_b32 v2, v6, off
	scratch_load_b32 v1, v82, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 1, v1
	scratch_store_b32 v82, v1, off
.LBB15_224:                             ; %Flow2665
                                        ;   in Loop: Header=BB15_220 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s4, exec_lo
	s_and_b32 s4, s7, exec_lo
	s_or_b32 s4, s1, s4
.LBB15_225:                             ; %Flow2664
                                        ;   in Loop: Header=BB15_220 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s1, s4
	s_cbranch_execz .LBB15_227
; %bb.226:                              ;   in Loop: Header=BB15_220 Depth=1
	scratch_load_b32 v0, v96, off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v59, v0, 0xc88
	scratch_load_b32 v0, v0, off
.LBB15_227:                             ; %Flow2666
                                        ;   in Loop: Header=BB15_220 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr6
.LBB15_228:                             ; %Flow2671
                                        ;   in Loop: Header=BB15_220 Depth=1
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB15_236
; %bb.229:                              ;   in Loop: Header=BB15_220 Depth=1
	scratch_load_b32 v9, v95, off
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[0:1], null, v6, 28, v[59:60]
	s_mov_b32 s4, exec_lo
	scratch_load_b64 v[1:2], v0, off offset:8
	s_waitcnt vmcnt(1)
	v_sub_nc_u32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v8, v8, 2, v90
	scratch_load_b32 v9, v8, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v2, v2, v1
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v9, v2
	s_cbranch_execz .LBB15_235
; %bb.230:                              ;   in Loop: Header=BB15_220 Depth=1
	s_mov_b32 s5, exec_lo
                                        ; implicit-def: $vgpr10
	v_cmpx_le_i32_e64 v9, v2
	s_xor_b32 s5, exec_lo, s5
	s_cbranch_execz .LBB15_232
; %bb.231:                              ;   in Loop: Header=BB15_220 Depth=1
	v_ashrrev_i32_e32 v10, 31, v2
	v_mul_lo_u32 v1, v9, v1
	v_add_nc_u32_e32 v0, 8, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v10
	v_xor_b32_e32 v2, v2, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v11, v2
	v_sub_nc_u32_e32 v12, 0, v2
	v_rcp_iflag_f32_e32 v11, v11
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v11, 0x4f7ffffe, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v11, v11
	v_mul_lo_u32 v9, v12, v11
	v_ashrrev_i32_e32 v12, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v1, v1, v12
	v_xor_b32_e32 v10, v12, v10
	v_mul_hi_u32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v1, v12
	v_add_nc_u32_e32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v9, v1, v9
	v_mul_lo_u32 v11, v9, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v1, v11
	v_add_nc_u32_e32 v11, 1, v9
	v_sub_nc_u32_e32 v13, v1, v2
	v_cmp_ge_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v9, v9, v11, s1
	v_cndmask_b32_e64 v1, v1, v13, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, 1, v9
	v_cmp_ge_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v1, v9, v11, s1
                                        ; implicit-def: $vgpr9
	v_xor_b32_e32 v1, v1, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v10
	scratch_store_b32 v0, v1, off
	scratch_load_b32 v0, v8, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v10, v0, v1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB15_232:                             ; %Flow2668
                                        ;   in Loop: Header=BB15_220 Depth=1
	s_and_not1_saveexec_b32 s1, s5
; %bb.233:                              ;   in Loop: Header=BB15_220 Depth=1
	v_sub_nc_u32_e32 v10, v9, v1
; %bb.234:                              ; %.sink.split.i.i21.i
                                        ;   in Loop: Header=BB15_220 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[0:1], null, v6, 28, v[59:60]
	scratch_store_b32 v0, v10, off offset:12
.LBB15_235:                             ; %Flow2670
                                        ;   in Loop: Header=BB15_220 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	scratch_load_b32 v0, v7, off
.LBB15_236:                             ; %Flow2672
                                        ;   in Loop: Header=BB15_220 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	scratch_load_b32 v1, v97, off
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v6, v0
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s1, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s10, s1, s10
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB15_220
.LBB15_237:                             ; %Flow2674
	s_or_b32 exec_lo, exec_lo, s3
	s_clause 0x2
	scratch_load_b96 v[0:2], v107, off
	scratch_load_b96 v[5:7], v63, off
	scratch_load_b32 v4, v77, off
	v_cmp_eq_u16_e32 vcc_lo, 0, v3
	v_mov_b32_e32 v8, 0
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v3, 10, v2
	v_sub_nc_u32_e32 v9, 0, v0
	v_sub_nc_u32_e32 v10, 0, v1
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v6, v6, v0
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e64 s0, v4, v3
	v_cndmask_b32_e32 v9, v9, v0, vcc_lo
	v_cndmask_b32_e32 v1, v1, v10, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, v7, v9
	v_add_nc_u32_e32 v5, v5, v1
	v_mov_b32_e32 v9, v8
	s_and_b32 s2, vcc_lo, s0
	s_clause 0x1
	scratch_store_b96 v63, v[5:7], off
	scratch_store_b64 v107, v[8:9], off
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB15_243
; %bb.238:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit29.i.preheader
	v_lshlrev_b32_e32 v0, 2, v4
	v_lshlrev_b32_e32 v1, 2, v2
                                        ; implicit-def: $sgpr2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v1
	v_mov_b32_e32 v1, 16
	v_add3_u32 v0, v0, v1, 0x5f04
.LBB15_239:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit29.i
                                        ; =>This Inner Loop Header: Depth=1
	scratch_load_b32 v1, v0, off
	s_or_b32 s2, s2, exec_lo
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB15_241
; %bb.240:                              ;   in Loop: Header=BB15_239 Depth=1
	v_add_nc_u32_e32 v1, -1, v4
	v_cmp_le_i32_e32 vcc_lo, v4, v2
	v_add_nc_u32_e32 v0, -4, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_mov_b32_e32 v4, v1
	s_and_b32 s4, vcc_lo, exec_lo
	scratch_store_b32 v77, v1, off
	s_or_b32 s2, s2, s4
.LBB15_241:                             ; %Flow2659
                                        ;   in Loop: Header=BB15_239 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, exec_lo, s2
	s_or_b32 s1, s3, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB15_239
; %bb.242:                              ; %Flow2660
	s_or_b32 exec_lo, exec_lo, s1
.LBB15_243:                             ; %Flow2661
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b64 v[0:1], off, off offset:4036
	scratch_load_b64 v[7:8], v88, off
	v_mov_b32_e32 v2, 16
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v9, 4, v7
	scratch_store_b64 v89, v[7:8], off
	v_add3_u32 v0, v2, v0, 0xc88
	scratch_load_b32 v5, v0, off
	v_add_nc_u32_e32 v0, 1, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_max_i32_e32 v8, v7, v0
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v5, v1
	s_cbranch_execz .LBB15_262
; %bb.244:                              ; %.lr.ph.i.i4
	scratch_load_b64 v[0:1], v72, off
	s_mov_b32 s3, 0
	s_mov_b32 s2, 16
	s_movk_i32 s4, 0x2f54
	s_movk_i32 s5, 0xaf0
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v4, -1 :: v_dual_add_f32 v3, v0, v1
.LBB15_245:                             ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[0:1], null, v5, 28, s[2:3]
	v_dual_mov_b32 v6, v5 :: v_dual_lshlrev_b32 v1, 2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add3_u32 v10, v2, v1, 0xc88
	scratch_load_b32 v11, v0, off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v11, v8
	v_cmp_le_i32_e64 s0, v11, v9
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s6, s0
	s_xor_b32 s0, exec_lo, s6
	s_cbranch_execz .LBB15_247
; %bb.246:                              ;   in Loop: Header=BB15_245 Depth=1
	scratch_load_b32 v5, v10, off
                                        ; implicit-def: $vgpr0_vgpr1
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr10
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr1
.LBB15_247:                             ; %Flow2654
                                        ;   in Loop: Header=BB15_245 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB15_261
; %bb.248:                              ;   in Loop: Header=BB15_245 Depth=1
	scratch_load_b32 v5, v93, off
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v5, v11, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v5, 2, v5
	v_add3_u32 v5, 16, v5, s4
	scratch_load_b32 v11, v5, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v11
	s_cbranch_execz .LBB15_250
; %bb.249:                              ;   in Loop: Header=BB15_245 Depth=1
	v_sub_nc_u32_e32 v11, 0, v11
	scratch_store_b32 v5, v11, off
.LBB15_250:                             ;   in Loop: Header=BB15_245 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mad_u64_u32 v[11:12], null, v6, 28, s[2:3]
	scratch_load_b32 v5, v11, off offset:20
	s_waitcnt vmcnt(0)
	v_cmp_nlt_f32_e32 vcc_lo, v5, v3
                                        ; implicit-def: $vgpr5
	s_and_saveexec_b32 s6, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB15_258
; %bb.251:                              ;   in Loop: Header=BB15_245 Depth=1
	s_clause 0x1
	scratch_load_b64 v[11:12], v0, off
	scratch_load_b32 v0, v93, off
	v_mad_u64_u32 v[13:14], null, v6, 28, s[2:3]
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, 16, v0, s4
	scratch_load_b32 v5, v0, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v5, v12
	scratch_store_b32 v0, v5, off
	s_clause 0x1
	scratch_load_b32 v0, v13, off offset:4
	scratch_load_b32 v5, v75, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v5, v0
	scratch_store_b32 v75, v0, off
	scratch_load_b32 v5, v10, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s7, -1, v5
	v_cmpx_ne_u32_e32 -1, v5
	s_cbranch_execz .LBB15_255
; %bb.252:                              ;   in Loop: Header=BB15_245 Depth=1
	v_add3_u32 v0, 16, v1, s5
	s_mov_b32 s10, -1
	s_mov_b32 s9, exec_lo
	scratch_load_b32 v1, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v1
	s_cbranch_execz .LBB15_254
; %bb.253:                              ;   in Loop: Header=BB15_245 Depth=1
	v_lshlrev_b32_e32 v11, 2, v5
	v_lshlrev_b32_e32 v12, 2, v1
	s_xor_b32 s10, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v11, 16, v11, s5
	v_add3_u32 v12, v2, v12, 0xc88
	s_clause 0x3
	scratch_store_b32 v11, v1, off
	scratch_store_b32 v12, v5, off
	scratch_store_b32 v10, v4, off
	scratch_store_b32 v0, v4, off
	s_clause 0x1
	scratch_load_b32 v0, off, off offset:4044
	scratch_load_b32 v1, off, off offset:4032
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, -1, v0
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v1, v1, 2, s42
	scratch_store_b32 off, v0, off offset:4044
	scratch_store_b32 v1, v6, off
	scratch_load_b32 v0, off, off offset:4032
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 off, v0, off offset:4032
.LBB15_254:                             ; %Flow2649
                                        ;   in Loop: Header=BB15_245 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s7, s7, exec_lo
	s_and_b32 s9, s10, exec_lo
	s_or_b32 s7, s7, s9
.LBB15_255:                             ; %Flow2648
                                        ;   in Loop: Header=BB15_245 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s8, s7
	s_cbranch_execz .LBB15_257
; %bb.256:                              ;   in Loop: Header=BB15_245 Depth=1
	scratch_load_b32 v0, off, off offset:4036
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v2, v0, 0xc88
	scratch_load_b32 v5, v0, off
.LBB15_257:                             ; %Flow2650
                                        ;   in Loop: Header=BB15_245 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr10
.LBB15_258:                             ; %Flow2652
                                        ;   in Loop: Header=BB15_245 Depth=1
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB15_260
; %bb.259:                              ;   in Loop: Header=BB15_245 Depth=1
	scratch_load_b32 v5, v10, off
	v_mad_u64_u32 v[0:1], null, v6, 28, s[2:3]
	scratch_store_b32 v0, v3, off offset:24
.LBB15_260:                             ; %Flow2653
                                        ;   in Loop: Header=BB15_245 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB15_261:                             ; %Flow2655
                                        ;   in Loop: Header=BB15_245 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b32 v0, off, off offset:4040
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v5, v0
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_245
.LBB15_262:                             ; %Flow2657
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b64 v[0:1], v100, off
	s_movk_i32 s0, 0xfc0
	s_movk_i32 s1, 0x2f3c
	v_add_nc_u32_e64 v10, s0, 16
	s_movk_i32 s0, 0x1f80
	v_add_nc_u32_e64 v109, s1, 16
	v_add_nc_u32_e64 v61, s0, 16
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add3_u32 v0, v10, v0, 0xc88
	scratch_load_b32 v3, v0, off
	v_mov_b32_e32 v0, 16
	v_add_nc_u32_e32 v108, 0x2f38, v0
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v3, v1
	s_cbranch_execz .LBB15_277
; %bb.263:                              ; %.lr.ph32.i.i
	scratch_load_b64 v[0:1], v72, off
	s_movk_i32 s0, 0x2a70
	s_movk_i32 s2, 0x2c08
	v_add_nc_u32_e64 v11, s0, 16
	v_add_nc_u32_e64 v12, s2, 16
	s_add_i32 s2, s50, -4
	s_mov_b32 s3, 0
	s_movk_i32 s4, 0x2f54
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v13, -1 :: v_dual_add_f32 v6, v0, v1
.LBB15_264:                             ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[1:2], null, v3, 28, v[60:61]
	v_lshlrev_b32_e32 v16, 2, v3
	v_mov_b32_e32 v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add3_u32 v15, v10, v16, 0xc88
	scratch_load_b32 v0, v1, off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v0, v8
	v_cmp_le_i32_e64 s0, v0, v9
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s5, s0
	s_xor_b32 s0, exec_lo, s5
	s_cbranch_execz .LBB15_266
; %bb.265:                              ;   in Loop: Header=BB15_264 Depth=1
	scratch_load_b32 v3, v15, off
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr14
                                        ; implicit-def: $vgpr15
                                        ; implicit-def: $vgpr1_vgpr2
                                        ; implicit-def: $vgpr16
.LBB15_266:                             ; %Flow2642
                                        ;   in Loop: Header=BB15_264 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB15_276
; %bb.267:                              ;   in Loop: Header=BB15_264 Depth=1
	scratch_load_b32 v2, v93, off
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 2, v2
	v_add3_u32 v2, 16, v2, s4
	scratch_load_b32 v3, v2, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v3
	s_cbranch_execz .LBB15_269
; %bb.268:                              ;   in Loop: Header=BB15_264 Depth=1
	v_sub_nc_u32_e32 v0, 0, v3
	scratch_store_b32 v2, v0, off
	scratch_load_b32 v0, v1, off
.LBB15_269:                             ;   in Loop: Header=BB15_264 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_clause 0x1
	scratch_load_b32 v1, v87, off
	scratch_load_b32 v2, v108, off
	v_mad_u64_u32 v[17:18], null, v14, 28, v[60:61]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_lshl_add_u32 v3, v1, 2, s2
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v2, 2, v11
	v_add_nc_u32_e32 v1, -1, v1
	s_clause 0x1
	scratch_load_b32 v20, v3, off
	scratch_load_b32 v21, v2, off
	scratch_store_b32 v87, v1, off
	s_clause 0x1
	scratch_load_b128 v[1:4], v17, off offset:4
	scratch_load_b32 v5, v17, off offset:20
	s_waitcnt vmcnt(3)
	v_mad_u64_u32 v[18:19], null, v20, 28, v[61:62]
	v_lshlrev_b32_e32 v19, 2, v20
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v22, v11, v19
	scratch_store_b32 v17, v6, off offset:24
	s_waitcnt vmcnt(1)
	scratch_store_b128 v18, v[0:3], off
	s_waitcnt vmcnt(0)
	s_clause 0x1
	scratch_store_b96 v18, v[4:6], off offset:16
	scratch_store_b32 v22, v21, off
	scratch_load_b32 v0, v108, off
	v_add_nc_u32_e32 v1, v12, v19
	v_lshl_add_u32 v3, v21, 2, v12
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v0, 2, v11
	s_clause 0x2
	scratch_store_b32 v1, v0, off
	scratch_store_b32 v2, v20, off
	scratch_store_b32 v3, v20, off
	scratch_load_b32 v0, v109, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v109, v0, off
	scratch_load_b32 v3, v15, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s5, -1, v3
	v_cmpx_ne_u32_e32 -1, v3
	s_cbranch_execz .LBB15_273
; %bb.270:                              ;   in Loop: Header=BB15_264 Depth=1
	v_add3_u32 v0, v10, v16, 0xaf0
	s_mov_b32 s8, -1
	s_mov_b32 s7, exec_lo
	scratch_load_b32 v1, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v1
	s_cbranch_execz .LBB15_272
; %bb.271:                              ;   in Loop: Header=BB15_264 Depth=1
	v_lshlrev_b32_e32 v2, 2, v3
	v_lshlrev_b32_e32 v4, 2, v1
	s_xor_b32 s8, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v2, v10, v2, 0xaf0
	v_add3_u32 v4, v10, v4, 0xc88
	s_clause 0x3
	scratch_store_b32 v2, v1, off
	scratch_store_b32 v4, v3, off
	scratch_store_b32 v15, v13, off
	scratch_store_b32 v0, v13, off
	s_clause 0x1
	scratch_load_b32 v0, v102, off
	scratch_load_b32 v1, v83, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, -1, v0
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v1, v1, 2, v85
	s_clause 0x1
	scratch_store_b32 v102, v0, off
	scratch_store_b32 v1, v14, off
	scratch_load_b32 v0, v83, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v83, v0, off
.LBB15_272:                             ; %Flow2640
                                        ;   in Loop: Header=BB15_264 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s7, s8, exec_lo
	s_or_b32 s5, s5, s7
.LBB15_273:                             ; %Flow2639
                                        ;   in Loop: Header=BB15_264 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB15_275
; %bb.274:                              ;   in Loop: Header=BB15_264 Depth=1
	scratch_load_b32 v0, v100, off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v10, v0, 0xc88
	scratch_load_b32 v3, v0, off
.LBB15_275:                             ; %Flow2641
                                        ;   in Loop: Header=BB15_264 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB15_276:                             ; %Flow2643
                                        ;   in Loop: Header=BB15_264 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b32 v0, v101, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v3, v0
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_264
.LBB15_277:                             ; %Flow2645
	s_or_b32 exec_lo, exec_lo, s1
	s_movk_i32 s0, 0x2fb0
	v_mov_b32_e32 v2, 0x5000
	s_add_i32 s1, s0, 16
	s_clause 0x1
	scratch_load_b32 v3, v94, off
	scratch_load_b64 v[0:1], off, s1 offset:4020
	s_mov_b32 s1, 16
	s_movk_i32 s2, 0x3f6c
	s_add_i32 s40, s1, 0x2fb0
	s_movk_i32 s1, 0x3f68
	v_add_nc_u32_e64 v105, s2, 16
	v_add_nc_u32_e64 v104, s1, 16
	s_add_i32 s52, s40, 0xfb4
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, s40, v0, 0xc88
	s_clause 0x2
	scratch_load_b32 v4, v2, off offset:4020
	scratch_load_b32 v5, v99, off
	scratch_load_b32 v6, v0, off
	v_add_nc_u32_e32 v0, -1, v3
	v_mov_b32_e32 v2, 16
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v10, -4, v4
	s_waitcnt vmcnt(1)
	v_min3_i32 v9, v4, v5, v0
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v6, v1
	s_cbranch_execz .LBB15_296
; %bb.278:                              ; %.lr.ph.i3.i
	scratch_load_b64 v[0:1], v73, off
	v_add_nc_u32_e64 v3, s0, 16
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v5, -1 :: v_dual_add_f32 v4, v0, v1
.LBB15_279:                             ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[0:1], null, v6, 28, s[40:41]
	v_lshlrev_b32_e32 v1, 2, v6
	v_mov_b32_e32 v11, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add3_u32 v12, s40, v1, 0xc88
	scratch_load_b32 v13, v0, off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v13, v10
	v_cmp_le_i32_e64 s0, v13, v9
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s0
	s_xor_b32 s0, exec_lo, s3
	s_cbranch_execz .LBB15_281
; %bb.280:                              ;   in Loop: Header=BB15_279 Depth=1
	scratch_load_b32 v6, v12, off
                                        ; implicit-def: $vgpr0_vgpr1
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr1
.LBB15_281:                             ; %Flow2633
                                        ;   in Loop: Header=BB15_279 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB15_295
; %bb.282:                              ;   in Loop: Header=BB15_279 Depth=1
	scratch_load_b32 v6, v95, off
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v6, v13, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v6, 2, v6
	v_add3_u32 v6, v3, v6, 0x2f54
	scratch_load_b32 v13, v6, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v13
	s_cbranch_execz .LBB15_284
; %bb.283:                              ;   in Loop: Header=BB15_279 Depth=1
	v_sub_nc_u32_e32 v13, 0, v13
	scratch_store_b32 v6, v13, off
.LBB15_284:                             ;   in Loop: Header=BB15_279 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[13:14], null, v11, 28, s[40:41]
	scratch_load_b32 v6, v13, off offset:20
	s_waitcnt vmcnt(0)
	v_cmp_nlt_f32_e32 vcc_lo, v6, v4
                                        ; implicit-def: $vgpr6
	s_and_saveexec_b32 s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB15_292
; %bb.285:                              ;   in Loop: Header=BB15_279 Depth=1
	s_clause 0x1
	scratch_load_b64 v[13:14], v0, off
	scratch_load_b32 v0, v95, off
	v_mad_u64_u32 v[15:16], null, v11, 28, s[40:41]
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v13, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, v3, v0, 0x2f54
	scratch_load_b32 v6, v0, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v6, v6, v14
	scratch_store_b32 v0, v6, off
	s_clause 0x1
	scratch_load_b32 v0, v15, off offset:4
	scratch_load_b32 v6, v78, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v6, v0
	scratch_store_b32 v78, v0, off
	scratch_load_b32 v6, v12, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s4, -1, v6
	v_cmpx_ne_u32_e32 -1, v6
	s_cbranch_execz .LBB15_289
; %bb.286:                              ;   in Loop: Header=BB15_279 Depth=1
	v_add3_u32 v0, s40, v1, 0xaf0
	s_mov_b32 s7, -1
	s_mov_b32 s6, exec_lo
	scratch_load_b32 v1, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v1
	s_cbranch_execz .LBB15_288
; %bb.287:                              ;   in Loop: Header=BB15_279 Depth=1
	v_lshlrev_b32_e32 v13, 2, v6
	v_lshlrev_b32_e32 v14, 2, v1
	s_xor_b32 s7, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v13, s40, v13, 0xaf0
	v_add3_u32 v14, s40, v14, 0xc88
	s_clause 0x3
	scratch_store_b32 v13, v1, off
	scratch_store_b32 v14, v6, off
	scratch_store_b32 v12, v5, off
	scratch_store_b32 v0, v5, off
	s_clause 0x1
	scratch_load_b32 v0, v105, off
	scratch_load_b32 v1, v74, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, -1, v0
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v1, v1, 2, s48
	s_clause 0x1
	scratch_store_b32 v105, v0, off
	scratch_store_b32 v1, v11, off
	scratch_load_b32 v0, v74, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v74, v0, off
.LBB15_288:                             ; %Flow2628
                                        ;   in Loop: Header=BB15_279 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s6, s7, exec_lo
	s_or_b32 s4, s4, s6
.LBB15_289:                             ; %Flow2627
                                        ;   in Loop: Header=BB15_279 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB15_291
; %bb.290:                              ;   in Loop: Header=BB15_279 Depth=1
	scratch_load_b32 v0, off, s52
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, s40, v0, 0xc88
	scratch_load_b32 v6, v0, off
.LBB15_291:                             ; %Flow2629
                                        ;   in Loop: Header=BB15_279 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr12
.LBB15_292:                             ; %Flow2631
                                        ;   in Loop: Header=BB15_279 Depth=1
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB15_294
; %bb.293:                              ;   in Loop: Header=BB15_279 Depth=1
	scratch_load_b32 v6, v12, off
	v_mad_u64_u32 v[0:1], null, v11, 28, s[40:41]
	scratch_store_b32 v0, v4, off offset:24
.LBB15_294:                             ; %Flow2632
                                        ;   in Loop: Header=BB15_279 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_295:                             ; %Flow2634
                                        ;   in Loop: Header=BB15_279 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b32 v0, v104, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v6, v0
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB15_279
.LBB15_296:                             ; %Flow2636
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b64 v[0:1], v96, off
	s_movk_i32 s0, 0x3f70
	s_movk_i32 s1, 0x5eec
	v_add_nc_u32_e64 v11, s0, 16
	s_movk_i32 s0, 0x4f30
	v_add_nc_u32_e32 v112, 0x5fa4, v2
	v_add_nc_u32_e64 v62, s0, 16
	v_add_nc_u32_e64 v111, s1, 16
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add3_u32 v0, v11, v0, 0xc88
	scratch_load_b32 v3, v0, off
	v_mov_b32_e32 v0, 16
	v_add_nc_u32_e32 v110, 0x5ee8, v0
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v3, v1
	s_cbranch_execz .LBB15_311
; %bb.297:                              ; %.lr.ph32.i11.i
	scratch_load_b64 v[0:1], v73, off
	s_movk_i32 s0, 0x2fb0
	s_movk_i32 s2, 0x5a20
	s_movk_i32 s3, 0x5bb8
	v_add_nc_u32_e64 v12, s0, 16
	v_add_nc_u32_e64 v13, s2, 16
	v_add_nc_u32_e64 v14, s3, 16
	s_add_i32 s2, s49, -4
	s_mov_b32 s3, 0
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v15, -1 :: v_dual_add_f32 v6, v0, v1
.LBB15_298:                             ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[1:2], null, v3, 28, v[59:60]
	v_lshlrev_b32_e32 v18, 2, v3
	v_mov_b32_e32 v16, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v11, v18, 0xc88
	scratch_load_b32 v0, v1, off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v0, v10
	v_cmp_le_i32_e64 s0, v0, v9
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s0
	s_xor_b32 s0, exec_lo, s4
	s_cbranch_execz .LBB15_300
; %bb.299:                              ;   in Loop: Header=BB15_298 Depth=1
	scratch_load_b32 v3, v17, off
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr16
                                        ; implicit-def: $vgpr17
                                        ; implicit-def: $vgpr1_vgpr2
                                        ; implicit-def: $vgpr18
.LBB15_300:                             ; %Flow2621
                                        ;   in Loop: Header=BB15_298 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB15_310
; %bb.301:                              ;   in Loop: Header=BB15_298 Depth=1
	scratch_load_b32 v2, v95, off
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 2, v2
	v_add3_u32 v2, v12, v2, 0x2f54
	scratch_load_b32 v3, v2, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v3
	s_cbranch_execz .LBB15_303
; %bb.302:                              ;   in Loop: Header=BB15_298 Depth=1
	v_sub_nc_u32_e32 v0, 0, v3
	scratch_store_b32 v2, v0, off
	scratch_load_b32 v0, v1, off
.LBB15_303:                             ;   in Loop: Header=BB15_298 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_clause 0x1
	scratch_load_b32 v1, v86, off
	scratch_load_b32 v2, v110, off
	v_mad_u64_u32 v[19:20], null, v16, 28, v[59:60]
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_lshl_add_u32 v3, v1, 2, s2
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v2, 2, v13
	v_add_nc_u32_e32 v1, -1, v1
	s_clause 0x1
	scratch_load_b32 v22, v3, off
	scratch_load_b32 v23, v2, off
	scratch_store_b32 v86, v1, off
	s_clause 0x1
	scratch_load_b128 v[1:4], v19, off offset:4
	scratch_load_b32 v5, v19, off offset:20
	s_waitcnt vmcnt(3)
	v_mad_u64_u32 v[20:21], null, v22, 28, v[62:63]
	v_lshlrev_b32_e32 v21, 2, v22
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v24, v13, v21
	scratch_store_b32 v19, v6, off offset:24
	s_waitcnt vmcnt(1)
	scratch_store_b128 v20, v[0:3], off
	s_waitcnt vmcnt(0)
	s_clause 0x1
	scratch_store_b96 v20, v[4:6], off offset:16
	scratch_store_b32 v24, v23, off
	scratch_load_b32 v0, v110, off
	v_add_nc_u32_e32 v1, v14, v21
	v_lshl_add_u32 v3, v23, 2, v14
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v0, 2, v13
	s_clause 0x2
	scratch_store_b32 v1, v0, off
	scratch_store_b32 v2, v22, off
	scratch_store_b32 v3, v22, off
	scratch_load_b32 v0, v111, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v111, v0, off
	scratch_load_b32 v3, v17, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s4, -1, v3
	v_cmpx_ne_u32_e32 -1, v3
	s_cbranch_execz .LBB15_307
; %bb.304:                              ;   in Loop: Header=BB15_298 Depth=1
	v_add3_u32 v0, v11, v18, 0xaf0
	s_mov_b32 s7, -1
	s_mov_b32 s6, exec_lo
	scratch_load_b32 v1, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v1
	s_cbranch_execz .LBB15_306
; %bb.305:                              ;   in Loop: Header=BB15_298 Depth=1
	v_lshlrev_b32_e32 v2, 2, v3
	v_lshlrev_b32_e32 v4, 2, v1
	s_xor_b32 s7, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v2, v11, v2, 0xaf0
	v_add3_u32 v4, v11, v4, 0xc88
	s_clause 0x3
	scratch_store_b32 v2, v1, off
	scratch_store_b32 v4, v3, off
	scratch_store_b32 v17, v15, off
	scratch_store_b32 v0, v15, off
	s_clause 0x1
	scratch_load_b32 v0, v98, off
	scratch_load_b32 v1, v82, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, -1, v0
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v1, v1, 2, v84
	s_clause 0x1
	scratch_store_b32 v98, v0, off
	scratch_store_b32 v1, v16, off
	scratch_load_b32 v0, v82, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v82, v0, off
.LBB15_306:                             ; %Flow2619
                                        ;   in Loop: Header=BB15_298 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s6, s7, exec_lo
	s_or_b32 s4, s4, s6
.LBB15_307:                             ; %Flow2618
                                        ;   in Loop: Header=BB15_298 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB15_309
; %bb.308:                              ;   in Loop: Header=BB15_298 Depth=1
	scratch_load_b32 v0, v96, off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v11, v0, 0xc88
	scratch_load_b32 v3, v0, off
.LBB15_309:                             ; %Flow2620
                                        ;   in Loop: Header=BB15_298 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB15_310:                             ; %Flow2622
                                        ;   in Loop: Header=BB15_298 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b32 v0, v97, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v3, v0
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_298
.LBB15_311:                             ; %Flow2624
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v0, 0x5000 :: v_dual_add_nc_u32 v7, 5, v7
	s_mov_b32 s3, 0
	s_clause 0x2
	scratch_load_b32 v11, v93, off
	scratch_load_b64 v[1:2], v0, off offset:3960
	scratch_load_b32 v3, v75, off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v4, 10, v11
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v5, v1, v2
	v_max_i32_e32 v0, v8, v11
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v12, v5, v3
	v_mov_b32_e32 v3, 16
	v_min_i32_e32 v4, v7, v4
	v_cmp_lt_i32_e64 s0, 0, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v103, 0x5f68, v3
	v_cmp_lt_i32_e32 vcc_lo, v0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_319
; %bb.312:                              ; %.lr.ph.i19.i
	scratch_load_b64 v[1:2], v72, off
	v_dual_mov_b32 v6, -1.0 :: v_dual_lshlrev_b32 v3, 2, v0
	s_movk_i32 s0, 0x2f54
	s_movk_i32 s2, 0xaf0
	s_movk_i32 s4, 0xc88
	v_add_nc_u32_e64 v13, s2, 16
	v_add_nc_u32_e64 v14, s4, 16
	v_add3_u32 v15, 16, v3, s0
	s_add_i32 s4, s42, -4
	s_mov_b32 s2, 16
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v5, v1, v2 :: v_dual_mov_b32 v2, 0
.LBB15_313:                             ; =>This Inner Loop Header: Depth=1
	v_lshlrev_b32_e32 v1, 2, v11
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v15, v1
	scratch_load_b32 v4, v1, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 -1, v4
	s_cbranch_execz .LBB15_317
; %bb.314:                              ;   in Loop: Header=BB15_313 Depth=1
	scratch_load_b32 v1, v76, off
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v1, v4
	s_cbranch_execz .LBB15_316
; %bb.315:                              ;   in Loop: Header=BB15_313 Depth=1
	s_clause 0x1
	scratch_load_b32 v11, off, off offset:4032
	scratch_load_b32 v3, off, off offset:4040
	v_sub_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_i32_e32 v1, v12, v1
	v_sub_nc_u32_e32 v12, v12, v1
	s_waitcnt vmcnt(1)
	v_lshl_add_u32 v16, v11, 2, s4
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v3, v3, 2, v13
	v_add_nc_u32_e32 v11, -1, v11
	s_clause 0x1
	scratch_load_b32 v18, v16, off
	scratch_load_b32 v19, v3, off
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[16:17], null, v18, 28, s[2:3]
	v_lshlrev_b32_e32 v17, 2, v18
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v2 :: v_dual_add_nc_u32 v20, v13, v17
	scratch_store_b32 off, v11, off offset:4032
	s_clause 0x1
	scratch_store_b128 v16, v[0:3], off
	scratch_store_b96 v16, v[4:6], off offset:16
	s_waitcnt vmcnt(0)
	scratch_store_b32 v20, v19, off
	scratch_load_b32 v3, off, off offset:4040
	v_add_nc_u32_e32 v4, v14, v17
	v_lshl_add_u32 v16, v19, 2, v14
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v11, v3, 2, v13
	s_clause 0x2
	scratch_store_b32 v4, v3, off
	scratch_store_b32 v11, v18, off
	scratch_store_b32 v16, v18, off
	scratch_load_b32 v3, v93, off
	scratch_load_b32 v4, off, off offset:4044
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v15, v3
	scratch_store_b32 off, v4, off offset:4044
	scratch_load_b32 v4, v3, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v4, v1
	scratch_store_b32 v3, v4, off
	s_clause 0x1
	scratch_load_b32 v3, v75, off
	scratch_load_b32 v11, v93, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v3, v3, v1
	scratch_store_b32 v75, v3, off
.LBB15_316:                             ; %Flow2613
                                        ;   in Loop: Header=BB15_313 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB15_317:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE12sendNewOrderERKiRi.exit.i.i
                                        ;   in Loop: Header=BB15_313 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 10, v11
	v_add_nc_u32_e32 v0, 1, v0
	v_cmp_eq_u32_e64 s0, 0, v12
	v_add_nc_u32_e32 v15, 4, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_i32_e32 v1, v7, v1
	v_cmp_ge_i32_e32 vcc_lo, v0, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s0, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_313
; %bb.318:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE20sendNewSellingOrdersERKiS3_Ri.exit.loopexit.i
	s_or_b32 exec_lo, exec_lo, s3
	scratch_load_b64 v[1:2], v103, off
.LBB15_319:                             ; %Flow2615
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	scratch_load_b32 v3, v95, off
	scratch_load_b32 v0, v78, off
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v4, 9, v3
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v1, v0
	v_max_i32_e32 v5, v10, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_min_i32_e32 v0, v9, v4
	v_sub_nc_u32_e32 v7, v2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, v0, v5
	v_cmp_lt_i32_e64 s0, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_327
; %bb.320:                              ; %.lr.ph.i22.i
	scratch_load_b64 v[1:2], v73, off
	v_dual_mov_b32 v5, 16 :: v_dual_lshlrev_b32 v4, 2, v0
	v_mov_b32_e32 v6, -1.0
	s_add_i32 s3, s48, -4
	s_add_i32 s4, s40, 0xaf0
	s_add_i32 s5, s40, 0xc88
	v_add3_u32 v11, v4, v5, 0x5f04
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v5, v1, v2 :: v_dual_mov_b32 v2, 0
.LBB15_321:                             ; =>This Inner Loop Header: Depth=1
	v_lshlrev_b32_e32 v1, 2, v3
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v11, v1
	scratch_load_b32 v4, v1, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 -1, v4
	s_cbranch_execz .LBB15_325
; %bb.322:                              ;   in Loop: Header=BB15_321 Depth=1
	scratch_load_b32 v1, v79, off
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v1, v4
	s_cbranch_execz .LBB15_324
; %bb.323:                              ;   in Loop: Header=BB15_321 Depth=1
	s_clause 0x1
	scratch_load_b32 v14, v74, off
	scratch_load_b32 v3, v104, off
	v_sub_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_i32_e32 v1, v7, v1
	v_sub_nc_u32_e32 v7, v7, v1
	s_waitcnt vmcnt(1)
	v_lshl_add_u32 v12, v14, 2, s3
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v3, v3, 2, s4
	v_add_nc_u32_e32 v14, -1, v14
	s_clause 0x1
	scratch_load_b32 v15, v12, off
	scratch_load_b32 v16, v3, off
	v_mov_b32_e32 v3, v2
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[12:13], null, v15, 28, s[40:41]
	v_lshlrev_b32_e32 v13, 2, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v17, s4, v13
	s_clause 0x2
	scratch_store_b32 v74, v14, off
	scratch_store_b128 v12, v[0:3], off
	scratch_store_b96 v12, v[4:6], off offset:16
	s_waitcnt vmcnt(0)
	scratch_store_b32 v17, v16, off
	scratch_load_b32 v3, v104, off
	v_add_nc_u32_e32 v4, s5, v13
	v_lshl_add_u32 v13, v16, 2, s5
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v12, v3, 2, s4
	s_clause 0x2
	scratch_store_b32 v4, v3, off
	scratch_store_b32 v12, v15, off
	scratch_store_b32 v13, v15, off
	s_clause 0x1
	scratch_load_b32 v3, v95, off
	scratch_load_b32 v4, v105, off
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v11, v3
	scratch_store_b32 v105, v4, off
	scratch_load_b32 v4, v3, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v4, v1
	scratch_store_b32 v3, v4, off
	s_clause 0x1
	scratch_load_b32 v4, v78, off
	scratch_load_b32 v3, v95, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v4, v4, v1
	scratch_store_b32 v78, v4, off
.LBB15_324:                             ; %Flow2609
                                        ;   in Loop: Header=BB15_321 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB15_325:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE12sendNewOrderERKiRi.exit.i24.i
                                        ;   in Loop: Header=BB15_321 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	v_max_i32_e32 v1, v10, v3
	v_cmp_eq_u32_e32 vcc_lo, 0, v7
	v_add_nc_u32_e32 v11, -4, v11
	v_cmp_le_i32_e64 s0, v0, v1
	v_add_nc_u32_e32 v0, -1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, vcc_lo
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s0, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB15_321
; %bb.326:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE19sendNewBuyingOrdersERKiS3_Ri.exit.loopexit.i
	s_or_b32 exec_lo, exec_lo, s2
	scratch_load_b32 v11, v93, off
.LBB15_327:                             ; %Flow2611
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b32 v0, v94, off
	s_waitcnt vmcnt(0)
	v_min_i32_e32 v1, v0, v8
	v_add_nc_u32_e32 v0, 10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, v1, v11
	v_cmp_lt_i32_e64 s0, v1, v0
	scratch_store_b32 v94, v1, off
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_332
; %bb.328:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit.i15.preheader
	v_lshlrev_b32_e32 v2, 2, v1
	v_lshlrev_b32_e32 v4, 2, v11
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr3
	v_add_nc_u32_e32 v1, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v4
	v_mov_b32_e32 v4, 16
	v_add3_u32 v2, v2, v4, 0x2f54
.LBB15_329:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit.i15
                                        ; =>This Inner Loop Header: Depth=1
	scratch_load_b32 v4, v2, off
	s_or_b32 s3, s3, exec_lo
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_331
; %bb.330:                              ;   in Loop: Header=BB15_329 Depth=1
	v_cmp_lt_i32_e32 vcc_lo, v1, v11
	v_cmp_ge_i32_e64 s0, v1, v0
	scratch_store_b32 v94, v1, off
	v_add_nc_u32_e32 v1, 1, v1
	v_add_nc_u32_e32 v2, 4, v2
	s_and_not1_b32 s3, s3, exec_lo
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s3, s3, s0
.LBB15_331:                             ; %Flow2605
                                        ;   in Loop: Header=BB15_329 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s3
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB15_329
.LBB15_332:                             ; %Flow2607
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b32 v0, v77, off
	v_add_nc_u32_e32 v1, 10, v3
	s_waitcnt vmcnt(0)
	v_max_i32_e32 v0, v0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_ge_i32_e32 vcc_lo, v0, v3
	v_cmp_lt_i32_e64 s0, v0, v1
	scratch_store_b32 v77, v0, off
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB15_337
; %bb.333:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit33.i.preheader
	v_lshlrev_b32_e32 v1, 2, v0
	v_lshlrev_b32_e32 v2, 2, v3
	v_add_nc_u32_e32 v0, 1, v0
	s_mov_b32 s1, 0
                                        ; implicit-def: $sgpr2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v2
	v_mov_b32_e32 v2, 16
	v_add3_u32 v1, v1, v2, 0x5f04
.LBB15_334:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit33.i
                                        ; =>This Inner Loop Header: Depth=1
	scratch_load_b32 v2, v1, off
	s_or_b32 s2, s2, exec_lo
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB15_336
; %bb.335:                              ;   in Loop: Header=BB15_334 Depth=1
	v_add_nc_u32_e32 v2, -2, v0
	v_add_nc_u32_e32 v0, -1, v0
	v_add_nc_u32_e32 v1, -4, v1
	s_and_not1_b32 s2, s2, exec_lo
	scratch_store_b32 v77, v2, off
	v_cmp_le_i32_e32 vcc_lo, v0, v3
	s_and_b32 s4, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s4
.LBB15_336:                             ; %Flow2602
                                        ;   in Loop: Header=BB15_334 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, exec_lo, s2
	s_or_b32 s1, s3, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB15_334
.LBB15_337:                             ; %Flow2604
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v4, v58
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_343
; %bb.338:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_342
; %bb.339:                              ; %.preheader3.i.i.i.i36.preheader
	s_mov_b32 s3, 0
.LBB15_340:                             ; %.preheader3.i.i.i.i36
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_340
; %bb.341:                              ; %Flow2598
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_342:                             ; %Flow2600
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_343:                             ; %.loopexit4.i.i.i.i16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_345
; %bb.344:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_345:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_353
; %bb.346:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_349
; %bb.347:                              ; %.preheader1.i.i.i.i34.preheader
	s_mov_b32 s8, 0
.LBB15_348:                             ; %.preheader1.i.i.i.i34
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_348
.LBB15_349:                             ; %Flow2596
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_351
; %bb.350:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_351:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_353
; %bb.352:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_353:                             ; %Flow2597
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_354:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_356
; %bb.355:                              ;   in Loop: Header=BB15_354 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_356:                             ;   in Loop: Header=BB15_354 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_358
; %bb.357:                              ;   in Loop: Header=BB15_354 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_359
.LBB15_358:                             ;   in Loop: Header=BB15_354 Depth=1
	s_mov_b32 s1, -1
.LBB15_359:                             ; %Flow2591
                                        ;   in Loop: Header=BB15_354 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_354
; %bb.360:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_364
; %bb.361:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_364
; %bb.362:                              ; %.preheader.i.i.i.i33.preheader
	s_mov_b32 s0, 0
.LBB15_363:                             ; %.preheader.i.i.i.i33
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_363
.LBB15_364:                             ; %__ockl_printf_begin.exit.i18
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.25@rel32@lo+4
	s_addc_u32 s1, s1, .str.25@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s58, 61, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s58
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	scratch_load_b32 v38, v103, off
	v_mov_b32_e32 v4, v58
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_370
; %bb.365:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_369
; %bb.366:                              ; %.preheader3.i.i.i6.i32.preheader
	s_mov_b32 s3, 0
.LBB15_367:                             ; %.preheader3.i.i.i6.i32
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_367
; %bb.368:                              ; %Flow2584
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_369:                             ; %Flow2586
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_370:                             ; %.loopexit4.i.i.i1.i20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_372
; %bb.371:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_372:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_380
; %bb.373:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_376
; %bb.374:                              ; %.preheader1.i.i.i4.i30.preheader
	s_mov_b32 s8, 0
.LBB15_375:                             ; %.preheader1.i.i.i4.i30
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_375
.LBB15_376:                             ; %Flow2582
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_378
; %bb.377:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_378:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_380
; %bb.379:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_380:                             ; %Flow2583
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_381:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_383
; %bb.382:                              ;   in Loop: Header=BB15_381 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_383:                             ;   in Loop: Header=BB15_381 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_385
; %bb.384:                              ;   in Loop: Header=BB15_381 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_386
.LBB15_385:                             ;   in Loop: Header=BB15_381 Depth=1
	s_mov_b32 s1, -1
.LBB15_386:                             ; %Flow2577
                                        ;   in Loop: Header=BB15_381 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_381
; %bb.387:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_391
; %bb.388:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_391
; %bb.389:                              ; %.preheader.i.i.i3.i29.preheader
	s_mov_b32 s0, 0
.LBB15_390:                             ; %.preheader.i.i.i3.i29
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_390
.LBB15_391:                             ; %__ockl_printf_begin.exit7.i22
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.26@rel32@lo+4
	s_addc_u32 s1, s1, .str.26@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s57, 23, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s57
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v5, v58
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v5
	v_mov_b32_e32 v7, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_397
; %bb.392:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[9:10], v1, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	global_load_b64 v[6:7], v1, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v3, v3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v3, v3, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[7:8], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[9:10]
	s_cbranch_execz .LBB15_396
; %bb.393:                              ; %.preheader3.i.i.i13.i28.preheader
	s_mov_b32 s3, 0
.LBB15_394:                             ; %.preheader3.i.i.i13.i28
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	global_load_b64 v[11:12], v1, s[38:39]
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v8, v3, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v2, 24, v[11:12]
	v_mov_b32_e32 v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v8, 24, v[2:3]
	v_mov_b32_e32 v7, v3
	global_load_b64 v[7:8], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_394
; %bb.395:                              ; %Flow2570
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_396:                             ; %Flow2572
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_397:                             ; %.loopexit4.i.i.i8.i23
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v6, 0
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[9:10], v6, s[38:39] offset:40
	global_load_b128 v[1:4], v6, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_399
; %bb.398:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s10, v2, vcc_lo
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, v6
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB15_399:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[7:8], 6, v[5:6]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v7
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v8, vcc_lo
	v_mov_b32_e32 v39, v6
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v6, s11
	v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_407
; %bb.400:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v0, s[38:39] offset:32 glc
	global_load_b64 v[3:4], v0, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v7, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[7:8], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v0, v[9:12], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[11:12]
	s_cbranch_execz .LBB15_403
; %bb.401:                              ; %.preheader1.i.i.i11.i26.preheader
	s_mov_b32 s8, 0
.LBB15_402:                             ; %.preheader1.i.i.i11.i26
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_402
.LBB15_403:                             ; %Flow2568
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB15_405
; %bb.404:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB15_405:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB15_407
; %bb.406:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_407:                             ; %Flow2569
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_408:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_410
; %bb.409:                              ;   in Loop: Header=BB15_408 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_410:                             ;   in Loop: Header=BB15_408 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_412
; %bb.411:                              ;   in Loop: Header=BB15_408 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_413
.LBB15_412:                             ;   in Loop: Header=BB15_408 Depth=1
	s_mov_b32 s1, -1
.LBB15_413:                             ; %Flow2563
                                        ;   in Loop: Header=BB15_408 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_408
; %bb.414:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_418
; %bb.415:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[38:39] offset:40
	global_load_b64 v[7:8], v6, s[38:39] offset:24 glc
	global_load_b64 v[4:5], v6, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_418
; %bb.416:                              ; %.preheader.i.i.i10.i25.preheader
	s_mov_b32 s0, 0
.LBB15_417:                             ; %.preheader.i.i.i10.i25
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_417
.LBB15_418:                             ; %__ockl_printf_append_args.exit.i
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b32 v38, v63, off
	v_mov_b32_e32 v4, v58
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_424
; %bb.419:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_423
; %bb.420:                              ; %.preheader3.i.i.i19.i.preheader
	s_mov_b32 s3, 0
.LBB15_421:                             ; %.preheader3.i.i.i19.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_421
; %bb.422:                              ; %Flow2556
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_423:                             ; %Flow2558
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_424:                             ; %.loopexit4.i.i.i14.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_426
; %bb.425:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_426:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_434
; %bb.427:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_430
; %bb.428:                              ; %.preheader1.i.i.i17.i.preheader
	s_mov_b32 s8, 0
.LBB15_429:                             ; %.preheader1.i.i.i17.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_429
.LBB15_430:                             ; %Flow2554
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_432
; %bb.431:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_432:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_434
; %bb.433:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_434:                             ; %Flow2555
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_435:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_437
; %bb.436:                              ;   in Loop: Header=BB15_435 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_437:                             ;   in Loop: Header=BB15_435 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_439
; %bb.438:                              ;   in Loop: Header=BB15_435 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_440
.LBB15_439:                             ;   in Loop: Header=BB15_435 Depth=1
	s_mov_b32 s1, -1
.LBB15_440:                             ; %Flow2549
                                        ;   in Loop: Header=BB15_435 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_435
; %bb.441:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_445
; %bb.442:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_445
; %bb.443:                              ; %.preheader.i.i.i16.i.preheader
	s_mov_b32 s0, 0
.LBB15_444:                             ; %.preheader.i.i.i16.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_444
.LBB15_445:                             ; %__ockl_printf_begin.exit20.i
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.27@rel32@lo+4
	s_addc_u32 s1, s1, .str.27@rel32@hi+12
	v_mov_b32_e32 v5, 0
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s2, -1, 0
	s_mov_b64 s[8:9], s[44:45]
	v_cndmask_b32_e64 v2, 0, 1, s2
	v_mov_b32_e32 v36, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	v_dual_mov_b32 v2, s0 :: v_dual_lshlrev_b32 v57, 4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v4, v57
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, v58
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v6
	v_mov_b32_e32 v7, 0
	v_mov_b32_e32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v6
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_451
; %bb.446:
	global_load_b64 v[3:4], v36, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[38:39] offset:40
	global_load_b64 v[7:8], v36, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v7, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v8, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v36, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[3:4]
	s_cbranch_execz .LBB15_450
; %bb.447:                              ; %.preheader3.i.i.i26.i.preheader
	v_mov_b32_e32 v1, 0
	s_mov_b32 s3, 0
.LBB15_448:                             ; %.preheader3.i.i.i26.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	global_load_b64 v[9:10], v1, s[38:39]
	v_dual_mov_b32 v4, v7 :: v_dual_mov_b32 v5, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v2, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v2, 24, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, v8 :: v_dual_and_b32 v3, v3, v5
	v_mad_u64_u32 v[8:9], null, v3, 24, v[2:3]
	global_load_b64 v[2:3], v[7:8], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_448
; %bb.449:                              ; %Flow2542
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_450:                             ; %Flow2544
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_451:                             ; %.loopexit4.i.i.i21.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[9:10], v36, s[38:39] offset:40
	global_load_b128 v[1:4], v36, s[38:39]
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_453
; %bb.452:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s10, v2, vcc_lo
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, 0
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB15_453:
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s8, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_mov_b32_e32 v7, 0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 6, v[6:7]
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_u32 v8, vcc_lo, v3, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, v4, v6, vcc_lo
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9
	v_dual_mov_b32 v39, v7 :: v_dual_mov_b32 v6, s11
	v_mov_b32_e32 v5, s10
	s_clause 0x3
	global_store_b128 v[8:9], v[36:39], off
	global_store_b128 v[8:9], v[3:6], off offset:16
	global_store_b128 v[8:9], v[3:6], off offset:32
	global_store_b128 v[8:9], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_461
; %bb.454:
	s_clause 0x1
	global_load_b64 v[12:13], v7, s[38:39] offset:32 glc
	global_load_b64 v[3:4], v7, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v7, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[12:13]
	s_cbranch_execz .LBB15_457
; %bb.455:                              ; %.preheader1.i.i.i24.i.preheader
	s_mov_b32 s8, 0
.LBB15_456:                             ; %.preheader1.i.i.i24.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[8:9], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v7, v[3:6], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_456
.LBB15_457:                             ; %Flow2540
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB15_459
; %bb.458:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB15_459:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB15_461
; %bb.460:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_461:                             ; %Flow2541
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_462:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_464
; %bb.463:                              ;   in Loop: Header=BB15_462 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_464:                             ;   in Loop: Header=BB15_462 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_466
; %bb.465:                              ;   in Loop: Header=BB15_462 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_467
.LBB15_466:                             ;   in Loop: Header=BB15_462 Depth=1
	s_mov_b32 s1, -1
.LBB15_467:                             ; %Flow2535
                                        ;   in Loop: Header=BB15_462 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_462
; %bb.468:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_472
; %bb.469:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[38:39] offset:40
	global_load_b64 v[7:8], v6, s[38:39] offset:24 glc
	global_load_b64 v[4:5], v6, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_472
; %bb.470:                              ; %.preheader.i.i.i23.i.preheader
	s_mov_b32 s0, 0
.LBB15_471:                             ; %.preheader.i.i.i23.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_471
.LBB15_472:                             ; %__ockl_printf_append_args.exit27.i
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v0, 0x5000
	v_mov_b32_e32 v6, 0
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v58
	scratch_load_b32 v38, v0, off offset:3956
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_478
; %bb.473:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_477
; %bb.474:                              ; %.preheader3.i.i.i33.i.preheader
	s_mov_b32 s3, 0
.LBB15_475:                             ; %.preheader3.i.i.i33.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_475
; %bb.476:                              ; %Flow2528
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_477:                             ; %Flow2530
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_478:                             ; %.loopexit4.i.i.i28.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_480
; %bb.479:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_480:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_movk_i32 s4, 0x5f64
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s5, s0
	s_cbranch_execz .LBB15_488
; %bb.481:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s9, s9, 24
	s_mul_hi_u32 s10, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s10, s10, s9
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s10, v1, vcc_lo
	s_mov_b32 s8, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_484
; %bb.482:                              ; %.preheader1.i.i.i31.i.preheader
	s_mov_b32 s9, 0
.LBB15_483:                             ; %.preheader1.i.i.i31.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB15_483
.LBB15_484:                             ; %Flow2526
	s_or_b32 exec_lo, exec_lo, s8
	v_mov_b32_e32 v5, 0
	s_mov_b32 s9, exec_lo
	s_mov_b32 s8, exec_lo
	v_mbcnt_lo_u32_b32 v4, s9, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_486
; %bb.485:
	s_bcnt1_i32_b32 s9, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s9
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_486:
	s_or_b32 exec_lo, exec_lo, s8
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_488
; %bb.487:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s8, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_488:                             ; %Flow2527
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	v_add_nc_u32_e64 v114, s4, 16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_489:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_491
; %bb.490:                              ;   in Loop: Header=BB15_489 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_491:                             ;   in Loop: Header=BB15_489 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_493
; %bb.492:                              ;   in Loop: Header=BB15_489 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_494
.LBB15_493:                             ;   in Loop: Header=BB15_489 Depth=1
	s_mov_b32 s1, -1
.LBB15_494:                             ; %Flow2521
                                        ;   in Loop: Header=BB15_489 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_489
; %bb.495:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_499
; %bb.496:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_499
; %bb.497:                              ; %.preheader.i.i.i30.i.preheader
	s_mov_b32 s0, 0
.LBB15_498:                             ; %.preheader.i.i.i30.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_498
.LBB15_499:                             ; %__ockl_printf_begin.exit34.i
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.28@rel32@lo+4
	s_addc_u32 s1, s1, .str.28@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s59, 22, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s59
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v5, v58
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v5
	v_mov_b32_e32 v7, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_505
; %bb.500:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[9:10], v1, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	global_load_b64 v[6:7], v1, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v3, v3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v3, v3, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[7:8], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[9:10]
	s_cbranch_execz .LBB15_504
; %bb.501:                              ; %.preheader3.i.i.i40.i.preheader
	s_mov_b32 s3, 0
.LBB15_502:                             ; %.preheader3.i.i.i40.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	global_load_b64 v[11:12], v1, s[38:39]
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v8, v3, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v2, 24, v[11:12]
	v_mov_b32_e32 v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v8, 24, v[2:3]
	v_mov_b32_e32 v7, v3
	global_load_b64 v[7:8], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_502
; %bb.503:                              ; %Flow2514
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_504:                             ; %Flow2516
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_505:                             ; %.loopexit4.i.i.i35.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v6, 0
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[9:10], v6, s[38:39] offset:40
	global_load_b128 v[1:4], v6, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_507
; %bb.506:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s10, v2, vcc_lo
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, v6
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB15_507:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[7:8], 6, v[5:6]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v7
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v8, vcc_lo
	v_mov_b32_e32 v39, v6
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v6, s11
	v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_515
; %bb.508:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v0, s[38:39] offset:32 glc
	global_load_b64 v[3:4], v0, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v7, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[7:8], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v0, v[9:12], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[11:12]
	s_cbranch_execz .LBB15_511
; %bb.509:                              ; %.preheader1.i.i.i38.i.preheader
	s_mov_b32 s8, 0
.LBB15_510:                             ; %.preheader1.i.i.i38.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_510
.LBB15_511:                             ; %Flow2512
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB15_513
; %bb.512:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB15_513:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB15_515
; %bb.514:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_515:                             ; %Flow2513
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_516:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_518
; %bb.517:                              ;   in Loop: Header=BB15_516 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_518:                             ;   in Loop: Header=BB15_516 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_520
; %bb.519:                              ;   in Loop: Header=BB15_516 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_521
.LBB15_520:                             ;   in Loop: Header=BB15_516 Depth=1
	s_mov_b32 s1, -1
.LBB15_521:                             ; %Flow2507
                                        ;   in Loop: Header=BB15_516 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_516
; %bb.522:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_526
; %bb.523:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[38:39] offset:40
	global_load_b64 v[7:8], v6, s[38:39] offset:24 glc
	global_load_b64 v[4:5], v6, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_526
; %bb.524:                              ; %.preheader.i.i.i37.i.preheader
	s_mov_b32 s0, 0
.LBB15_525:                             ; %.preheader.i.i.i37.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_525
.LBB15_526:                             ; %__ockl_printf_append_args.exit41.i
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v4, v58
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_532
; %bb.527:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_531
; %bb.528:                              ; %.preheader3.i.i.i47.i.preheader
	s_mov_b32 s3, 0
.LBB15_529:                             ; %.preheader3.i.i.i47.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_529
; %bb.530:                              ; %Flow2500
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_531:                             ; %Flow2502
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_532:                             ; %.loopexit4.i.i.i42.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_534
; %bb.533:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_534:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_542
; %bb.535:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_538
; %bb.536:                              ; %.preheader1.i.i.i45.i.preheader
	s_mov_b32 s8, 0
.LBB15_537:                             ; %.preheader1.i.i.i45.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_537
.LBB15_538:                             ; %Flow2498
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_540
; %bb.539:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_540:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_542
; %bb.541:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_542:                             ; %Flow2499
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_543:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_545
; %bb.544:                              ;   in Loop: Header=BB15_543 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_545:                             ;   in Loop: Header=BB15_543 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_547
; %bb.546:                              ;   in Loop: Header=BB15_543 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_548
.LBB15_547:                             ;   in Loop: Header=BB15_543 Depth=1
	s_mov_b32 s1, -1
.LBB15_548:                             ; %Flow2493
                                        ;   in Loop: Header=BB15_543 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_543
; %bb.549:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_553
; %bb.550:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_553
; %bb.551:                              ; %.preheader.i.i.i44.i.preheader
	s_mov_b32 s0, 0
.LBB15_552:                             ; %.preheader.i.i.i44.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_552
.LBB15_553:                             ; %_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE13showBasicInfoEv.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.6@rel32@lo+4
	s_addc_u32 s1, s1, .str.6@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v4, s41
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v0, v58 :: v_dual_mov_b32 v1, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_559
; %bb.554:
	global_load_b64 v[3:4], v36, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[38:39] offset:40
	global_load_b64 v[5:6], v36, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v36, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[1:2], v[3:4]
	s_cbranch_execz .LBB15_558
; %bb.555:                              ; %.preheader3.i.i.i.i67.preheader
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
.LBB15_556:                             ; %.preheader3.i.i.i.i67
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[38:39] offset:40
	global_load_b64 v[8:9], v3, s[38:39]
	v_dual_mov_b32 v7, v2 :: v_dual_mov_b32 v6, v1
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[1:2], null, v4, 24, v[8:9]
	v_and_b32_e32 v8, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v8, 24, v[2:3]
	v_mov_b32_e32 v2, v4
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v3, v[4:7], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_556
; %bb.557:                              ; %Flow2486
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_558:                             ; %Flow2488
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_559:                             ; %.loopexit4.i.i.i.i37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v36, s[38:39] offset:40
	global_load_b128 v[4:7], v36, s[38:39]
	v_readfirstlane_b32 s2, v1
	v_readfirstlane_b32 s3, v2
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_561
; %bb.560:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v2, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, 0
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[1:2], v[8:11], off offset:8
.LBB15_561:
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s9, s8
	v_lshlrev_b64 v[2:3], 6, v[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v0, v2
	v_mov_b32_e32 v0, 33
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	v_mov_b32_e32 v2, v1
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v8, s8
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	v_mov_b32_e32 v11, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_569
; %bb.562:
	s_clause 0x1
	global_load_b64 v[12:13], v1, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v1, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[12:13]
	s_cbranch_execz .LBB15_565
; %bb.563:                              ; %.preheader1.i.i.i.i65.preheader
	v_mov_b32_e32 v10, 0
	s_mov_b32 s8, 0
.LBB15_564:                             ; %.preheader1.i.i.i.i65
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_564
.LBB15_565:                             ; %Flow2484
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB15_567
; %bb.566:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB15_567:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB15_569
; %bb.568:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_569:                             ; %Flow2485
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_570:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_572
; %bb.571:                              ;   in Loop: Header=BB15_570 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_572:                             ;   in Loop: Header=BB15_570 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_574
; %bb.573:                              ;   in Loop: Header=BB15_570 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_575
.LBB15_574:                             ;   in Loop: Header=BB15_570 Depth=1
	s_mov_b32 s1, -1
.LBB15_575:                             ; %Flow2479
                                        ;   in Loop: Header=BB15_570 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_570
; %bb.576:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_580
; %bb.577:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_580
; %bb.578:                              ; %.preheader.i.i.i.i64.preheader
	s_mov_b32 s0, 0
.LBB15_579:                             ; %.preheader.i.i.i.i64
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_579
.LBB15_580:                             ; %__ockl_printf_begin.exit.i39
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.3@rel32@lo+4
	s_addc_u32 s1, s1, .str.3@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v4, s55
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v0, v58 :: v_dual_mov_b32 v1, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_586
; %bb.581:
	global_load_b64 v[3:4], v36, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[38:39] offset:40
	global_load_b64 v[5:6], v36, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v36, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[1:2], v[3:4]
	s_cbranch_execz .LBB15_585
; %bb.582:                              ; %.preheader3.i.i.i6.i63.preheader
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
.LBB15_583:                             ; %.preheader3.i.i.i6.i63
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[38:39] offset:40
	global_load_b64 v[8:9], v3, s[38:39]
	v_dual_mov_b32 v7, v2 :: v_dual_mov_b32 v6, v1
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[1:2], null, v4, 24, v[8:9]
	v_and_b32_e32 v8, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v8, 24, v[2:3]
	v_mov_b32_e32 v2, v4
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v3, v[4:7], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_583
; %bb.584:                              ; %Flow2472
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_585:                             ; %Flow2474
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_586:                             ; %.loopexit4.i.i.i1.i41
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v36, s[38:39] offset:40
	global_load_b128 v[4:7], v36, s[38:39]
	v_readfirstlane_b32 s2, v1
	v_readfirstlane_b32 s3, v2
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_588
; %bb.587:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v2, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, 0
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[1:2], v[8:11], off offset:8
.LBB15_588:
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s9, s8
	v_lshlrev_b64 v[2:3], 6, v[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v0, v2
	v_mov_b32_e32 v0, 33
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	v_mov_b32_e32 v2, v1
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v8, s8
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	v_mov_b32_e32 v11, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_596
; %bb.589:
	s_clause 0x1
	global_load_b64 v[12:13], v1, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v1, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[12:13]
	s_cbranch_execz .LBB15_592
; %bb.590:                              ; %.preheader1.i.i.i4.i61.preheader
	v_mov_b32_e32 v10, 0
	s_mov_b32 s8, 0
.LBB15_591:                             ; %.preheader1.i.i.i4.i61
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_591
.LBB15_592:                             ; %Flow2470
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB15_594
; %bb.593:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB15_594:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB15_596
; %bb.595:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_596:                             ; %Flow2471
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_597:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_599
; %bb.598:                              ;   in Loop: Header=BB15_597 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_599:                             ;   in Loop: Header=BB15_597 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_601
; %bb.600:                              ;   in Loop: Header=BB15_597 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_602
.LBB15_601:                             ;   in Loop: Header=BB15_597 Depth=1
	s_mov_b32 s1, -1
.LBB15_602:                             ; %Flow2465
                                        ;   in Loop: Header=BB15_597 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_597
; %bb.603:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_607
; %bb.604:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_607
; %bb.605:                              ; %.preheader.i.i.i3.i60.preheader
	s_mov_b32 s0, 0
.LBB15_606:                             ; %.preheader.i.i.i3.i60
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_606
.LBB15_607:                             ; %__ockl_printf_begin.exit7.i43
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.4@rel32@lo+4
	s_addc_u32 s1, s1, .str.4@rel32@hi+12
	v_dual_mov_b32 v115, 0 :: v_dual_mov_b32 v2, s0
	v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v4, s54
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v6, 1
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, 16
	v_mov_b32_e32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, 16
	v_mov_b32_e32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, 16
	v_mov_b32_e32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, v58 :: v_dual_mov_b32 v1, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_613
; %bb.608:
	global_load_b64 v[3:4], v115, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v115, s[38:39] offset:40
	global_load_b64 v[5:6], v115, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v115, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[1:2], v[3:4]
	s_cbranch_execz .LBB15_612
; %bb.609:                              ; %.preheader3.i.i.i13.i59.preheader
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
.LBB15_610:                             ; %.preheader3.i.i.i13.i59
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[38:39] offset:40
	global_load_b64 v[8:9], v3, s[38:39]
	v_dual_mov_b32 v7, v2 :: v_dual_mov_b32 v6, v1
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[1:2], null, v4, 24, v[8:9]
	v_and_b32_e32 v8, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v8, 24, v[2:3]
	v_mov_b32_e32 v2, v4
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v3, v[4:7], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_610
; %bb.611:                              ; %Flow2458
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_612:                             ; %Flow2460
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_613:                             ; %.loopexit4.i.i.i8.i45
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v115, s[38:39] offset:40
	global_load_b128 v[4:7], v115, s[38:39]
	v_readfirstlane_b32 s2, v1
	v_readfirstlane_b32 s3, v2
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_615
; %bb.614:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v2, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, 0
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[1:2], v[8:11], off offset:8
.LBB15_615:
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s9, s8
	v_lshlrev_b64 v[2:3], 6, v[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v0, v2
	v_mov_b32_e32 v0, 33
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	v_mov_b32_e32 v2, v1
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v8, s8
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	v_mov_b32_e32 v11, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_623
; %bb.616:
	s_clause 0x1
	global_load_b64 v[12:13], v1, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v1, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[12:13]
	s_cbranch_execz .LBB15_619
; %bb.617:                              ; %.preheader1.i.i.i11.i57.preheader
	v_mov_b32_e32 v10, 0
	s_mov_b32 s8, 0
.LBB15_618:                             ; %.preheader1.i.i.i11.i57
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_618
.LBB15_619:                             ; %Flow2456
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB15_621
; %bb.620:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB15_621:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB15_623
; %bb.622:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_623:                             ; %Flow2457
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_624:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_626
; %bb.625:                              ;   in Loop: Header=BB15_624 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_626:                             ;   in Loop: Header=BB15_624 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_628
; %bb.627:                              ;   in Loop: Header=BB15_624 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_629
.LBB15_628:                             ;   in Loop: Header=BB15_624 Depth=1
	s_mov_b32 s1, -1
.LBB15_629:                             ; %Flow2451
                                        ;   in Loop: Header=BB15_624 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_624
; %bb.630:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_634
; %bb.631:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_634
; %bb.632:                              ; %.preheader.i.i.i10.i56.preheader
	s_mov_b32 s0, 0
.LBB15_633:                             ; %.preheader.i.i.i10.i56
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_633
.LBB15_634:                             ; %__ockl_printf_begin.exit14.i47
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.5@rel32@lo+4
	s_addc_u32 s1, s1, .str.5@rel32@hi+12
	v_dual_mov_b32 v115, 0 :: v_dual_mov_b32 v2, s0
	v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v4, s53
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v6, 1
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v0, s46 :: v_dual_mov_b32 v1, s51
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, s46
	v_mov_b32_e32 v1, s51
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, s46
	v_mov_b32_e32 v1, s51
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, s46
	v_mov_b32_e32 v1, s51
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, s46 :: v_dual_mov_b32 v1, s51
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, v58 :: v_dual_mov_b32 v1, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_640
; %bb.635:
	global_load_b64 v[3:4], v115, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v115, s[38:39] offset:40
	global_load_b64 v[5:6], v115, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v115, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[1:2], v[3:4]
	s_cbranch_execz .LBB15_639
; %bb.636:                              ; %.preheader3.i.i.i20.i55.preheader
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
.LBB15_637:                             ; %.preheader3.i.i.i20.i55
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[38:39] offset:40
	global_load_b64 v[8:9], v3, s[38:39]
	v_dual_mov_b32 v7, v2 :: v_dual_mov_b32 v6, v1
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[1:2], null, v4, 24, v[8:9]
	v_and_b32_e32 v8, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v8, 24, v[2:3]
	v_mov_b32_e32 v2, v4
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v3, v[4:7], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_637
; %bb.638:                              ; %Flow2444
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_639:                             ; %Flow2446
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_640:                             ; %.loopexit4.i.i.i15.i49
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v115, s[38:39] offset:40
	global_load_b128 v[4:7], v115, s[38:39]
	v_readfirstlane_b32 s2, v1
	v_readfirstlane_b32 s3, v2
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_642
; %bb.641:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v2, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, 0
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[1:2], v[8:11], off offset:8
.LBB15_642:
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s9, s8
	v_lshlrev_b64 v[2:3], 6, v[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v0, v2
	v_mov_b32_e32 v0, 33
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	v_mov_b32_e32 v2, v1
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v8, s8
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	v_mov_b32_e32 v11, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_650
; %bb.643:
	s_clause 0x1
	global_load_b64 v[12:13], v1, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v1, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[12:13]
	s_cbranch_execz .LBB15_646
; %bb.644:                              ; %.preheader1.i.i.i18.i53.preheader
	v_mov_b32_e32 v10, 0
	s_mov_b32 s8, 0
.LBB15_645:                             ; %.preheader1.i.i.i18.i53
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_645
.LBB15_646:                             ; %Flow2442
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB15_648
; %bb.647:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB15_648:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB15_650
; %bb.649:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_650:                             ; %Flow2443
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_651:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_653
; %bb.652:                              ;   in Loop: Header=BB15_651 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_653:                             ;   in Loop: Header=BB15_651 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_655
; %bb.654:                              ;   in Loop: Header=BB15_651 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_656
.LBB15_655:                             ;   in Loop: Header=BB15_651 Depth=1
	s_mov_b32 s1, -1
.LBB15_656:                             ; %Flow2437
                                        ;   in Loop: Header=BB15_651 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_651
; %bb.657:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_661
; %bb.658:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_661
; %bb.659:                              ; %.preheader.i.i.i17.i52.preheader
	s_mov_b32 s0, 0
.LBB15_660:                             ; %.preheader.i.i.i17.i52
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_660
.LBB15_661:                             ; %_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE17showOrderBookInfoEv.exit68
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.6@rel32@lo+4
	s_addc_u32 s1, s1, .str.6@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v4, s41
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v0, v58 :: v_dual_mov_b32 v1, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_667
; %bb.662:
	global_load_b64 v[3:4], v36, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[38:39] offset:40
	global_load_b64 v[5:6], v36, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v36, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[1:2], v[3:4]
	s_cbranch_execz .LBB15_666
; %bb.663:                              ; %.preheader3.i.i.i74.preheader
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
.LBB15_664:                             ; %.preheader3.i.i.i74
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[38:39] offset:40
	global_load_b64 v[8:9], v3, s[38:39]
	v_dual_mov_b32 v7, v2 :: v_dual_mov_b32 v6, v1
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[1:2], null, v4, 24, v[8:9]
	v_and_b32_e32 v8, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v8, 24, v[2:3]
	v_mov_b32_e32 v2, v4
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v3, v[4:7], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_664
; %bb.665:                              ; %Flow2430
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_666:                             ; %Flow2432
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_667:                             ; %.loopexit4.i.i.i69
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v36, s[38:39] offset:40
	global_load_b128 v[4:7], v36, s[38:39]
	v_readfirstlane_b32 s2, v1
	v_readfirstlane_b32 s3, v2
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_669
; %bb.668:
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, 0
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v2, vcc_lo, s8, v5, vcc_lo
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[1:2], v[8:11], off offset:8
.LBB15_669:
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s9, s8
	v_lshlrev_b64 v[2:3], 6, v[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v0, v2
	v_mov_b32_e32 v0, 33
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	v_mov_b32_e32 v2, v1
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v8, s8
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	v_mov_b32_e32 v11, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_677
; %bb.670:
	s_clause 0x1
	global_load_b64 v[12:13], v1, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v1, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[12:13]
	s_cbranch_execz .LBB15_673
; %bb.671:                              ; %.preheader1.i.i.i72.preheader
	v_mov_b32_e32 v10, 0
	s_mov_b32 s8, 0
.LBB15_672:                             ; %.preheader1.i.i.i72
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_672
.LBB15_673:                             ; %Flow2428
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB15_675
; %bb.674:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB15_675:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB15_677
; %bb.676:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_677:                             ; %Flow2429
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_678:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_680
; %bb.679:                              ;   in Loop: Header=BB15_678 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_680:                             ;   in Loop: Header=BB15_678 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_682
; %bb.681:                              ;   in Loop: Header=BB15_678 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_683
.LBB15_682:                             ;   in Loop: Header=BB15_678 Depth=1
	s_mov_b32 s1, -1
.LBB15_683:                             ; %Flow2423
                                        ;   in Loop: Header=BB15_678 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_678
; %bb.684:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_688
; %bb.685:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_688
; %bb.686:                              ; %.preheader.i.i.i71.preheader
	s_mov_b32 s0, 0
.LBB15_687:                             ; %.preheader.i.i.i71
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_687
.LBB15_688:                             ; %__ockl_printf_begin.exit75
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str@rel32@lo+4
	s_addc_u32 s1, s1, .str@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s56 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 3
	v_dual_mov_b32 v2, 5 :: v_dual_mov_b32 v5, 11
	v_dual_mov_b32 v4, 9 :: v_dual_mov_b32 v3, 7
	s_movk_i32 s0, 0x5fe0
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v7, v4
	scratch_store_b128 off, v[0:3], s0 offset:48
	s_mov_b32 s0, 0x3fa66666
	s_mov_b32 s1, 0x3e4ccccd
	v_mov_b32_e32 v1, v3
	v_dual_mov_b32 v9, s1 :: v_dual_mov_b32 v8, s0
	s_movk_i32 s0, 0x5fe0
	s_clause 0x1
	scratch_store_b128 off, v[4:7], s0 offset:64
	scratch_store_b64 off, v[1:2], s0 offset:80
	s_mov_b64 s[0:1], 11
	s_clause 0x1
	scratch_store_b64 v72, v[8:9], off
	scratch_store_b64 v73, v[8:9], off
.LBB15_689:                             ; %.lr.ph.i.i.i.i.i.i.i.i.i.i76
                                        ; =>This Inner Loop Header: Depth=1
	s_add_i32 s3, s2, 0x6010
	v_add_nc_u32_e64 v1, s2, 16
	scratch_load_b32 v0, off, s3
	s_add_i32 s2, s2, 4
	s_add_u32 s0, s0, -1
	s_addc_u32 s1, s1, -1
	v_add_nc_u32_e32 v1, 0x5f78, v1
	v_cmp_gt_u64_e64 s3, s[0:1], 1
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	scratch_store_b32 v1, v0, off
	s_cbranch_vccnz .LBB15_689
; %bb.690:                              ; %_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE11getBookInfoEPiRKiS4_RKf.exit.i80
	v_mov_b32_e32 v0, 0x406
	v_mov_b32_e32 v1, 0x405
	v_dual_mov_b32 v2, 0x4480b000 :: v_dual_mov_b32 v3, v42
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@hi+12
	s_clause 0x1
	scratch_store_b64 v88, v[0:1], off
	scratch_store_b32 v113, v2, off
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, s47
	v_mov_b32_e32 v2, v44
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v3, v46
	v_dual_mov_b32 v2, v45 :: v_dual_mov_b32 v5, v42
	v_mov_b32_e32 v4, v44
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	scratch_load_b64 v[0:1], v100, off
	v_mov_b32_e32 v2, 16
	s_mov_b32 s3, exec_lo
	v_add_nc_u32_e32 v4, 0xfc0, v2
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v4, v0, 0xc88
	s_clause 0x1
	scratch_load_b32 v6, v0, off
	scratch_load_u8 v0, v91, off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, 0xff, v0
	v_cmpx_ne_u32_e64 v6, v1
	s_cbranch_execz .LBB15_709
; %bb.691:                              ; %.lr.ph.i.i84
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_eq_u16_e32 vcc_lo, 0, v3
	v_cmp_ne_u16_e64 s0, 0, v3
	v_mov_b32_e32 v5, -1
	s_mov_b32 s4, 0
	s_movk_i32 s5, 0x2f54
	s_movk_i32 s6, 0x2f7c
.LBB15_692:                             ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[0:1], null, v6, 28, v[60:61]
	v_lshlrev_b32_e32 v1, 2, v6
	s_clause 0x1
	scratch_load_b32 v8, v0, off
	scratch_load_b32 v0, v99, off
	v_add3_u32 v7, v4, v1, 0xc88
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e64 s1, v8, v0
	v_cmp_lt_i32_e64 s2, v8, v0
                                        ; implicit-def: $vgpr0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s1, vcc_lo, s1
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s2
	s_xor_b32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB15_700
; %bb.693:                              ;   in Loop: Header=BB15_692 Depth=1
	scratch_load_b32 v0, v93, off
	v_mad_u64_u32 v[9:10], null, v6, 28, v[60:61]
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, 16, v0, s5
	s_clause 0x1
	scratch_load_b32 v2, v9, off offset:4
	scratch_load_b32 v9, v0, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v9, v9, v2
	scratch_store_b32 v0, v9, off
	s_clause 0x1
	scratch_load_b32 v0, v93, off
	scratch_load_b32 v9, v75, off
	s_waitcnt vmcnt(1)
	v_sub_nc_u32_e32 v0, v8, v0
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v9, v9, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 2, v0
	scratch_store_b32 v75, v9, off
	v_add3_u32 v0, 16, v0, s6
	scratch_load_b32 v9, v0, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v9, v9, v2
	scratch_store_b32 v0, v9, off
	scratch_load_b64 v[9:10], v106, off
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v0, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v2, v8, v[0:1]
	v_dual_mov_b32 v9, v10 :: v_dual_add_nc_u32 v8, v9, v2
	scratch_store_b64 v106, v[8:9], off
	scratch_load_b32 v0, v7, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s7, -1, v0
	v_cmpx_ne_u32_e32 -1, v0
	s_cbranch_execz .LBB15_697
; %bb.694:                              ;   in Loop: Header=BB15_692 Depth=1
	v_add3_u32 v1, v4, v1, 0xaf0
	s_mov_b32 s10, -1
	s_mov_b32 s9, exec_lo
	scratch_load_b32 v2, v1, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v2
	s_cbranch_execz .LBB15_696
; %bb.695:                              ;   in Loop: Header=BB15_692 Depth=1
	v_lshlrev_b32_e32 v8, 2, v0
	v_lshlrev_b32_e32 v9, 2, v2
	s_xor_b32 s10, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v8, v4, v8, 0xaf0
	v_add3_u32 v9, v4, v9, 0xc88
	s_clause 0x3
	scratch_store_b32 v8, v2, off
	scratch_store_b32 v9, v0, off
	scratch_store_b32 v7, v5, off
	scratch_store_b32 v1, v5, off
	s_clause 0x1
	scratch_load_b32 v1, v102, off
	scratch_load_b32 v2, v83, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v1, -1, v1
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v2, 2, v85
	s_clause 0x1
	scratch_store_b32 v102, v1, off
	scratch_store_b32 v2, v6, off
	scratch_load_b32 v1, v83, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 1, v1
	scratch_store_b32 v83, v1, off
.LBB15_696:                             ; %Flow2408
                                        ;   in Loop: Header=BB15_692 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s7, exec_lo
	s_and_b32 s7, s10, exec_lo
	s_or_b32 s7, s1, s7
.LBB15_697:                             ; %Flow2407
                                        ;   in Loop: Header=BB15_692 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s1, s7
	s_cbranch_execz .LBB15_699
; %bb.698:                              ;   in Loop: Header=BB15_692 Depth=1
	scratch_load_b32 v0, v100, off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v4, v0, 0xc88
	scratch_load_b32 v0, v0, off
.LBB15_699:                             ; %Flow2409
                                        ;   in Loop: Header=BB15_692 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr6
.LBB15_700:                             ; %Flow2414
                                        ;   in Loop: Header=BB15_692 Depth=1
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB15_708
; %bb.701:                              ;   in Loop: Header=BB15_692 Depth=1
	scratch_load_b32 v9, v93, off
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[0:1], null, v6, 28, v[60:61]
	s_mov_b32 s7, exec_lo
	scratch_load_b64 v[1:2], v0, off offset:8
	s_waitcnt vmcnt(1)
	v_sub_nc_u32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v8, v8, 2, v90
	scratch_load_b32 v9, v8, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v2, v2, v1
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v9, v2
	s_cbranch_execz .LBB15_707
; %bb.702:                              ;   in Loop: Header=BB15_692 Depth=1
	s_mov_b32 s8, exec_lo
                                        ; implicit-def: $vgpr10
	v_cmpx_le_i32_e64 v9, v2
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB15_704
; %bb.703:                              ;   in Loop: Header=BB15_692 Depth=1
	v_ashrrev_i32_e32 v10, 31, v2
	v_mul_lo_u32 v1, v9, v1
	v_add_nc_u32_e32 v0, 8, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v10
	v_xor_b32_e32 v2, v2, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v11, v2
	v_sub_nc_u32_e32 v12, 0, v2
	v_rcp_iflag_f32_e32 v11, v11
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v11, 0x4f7ffffe, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v11, v11
	v_mul_lo_u32 v9, v12, v11
	v_ashrrev_i32_e32 v12, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v1, v1, v12
	v_xor_b32_e32 v10, v12, v10
	v_mul_hi_u32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v1, v12
	v_add_nc_u32_e32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v9, v1, v9
	v_mul_lo_u32 v11, v9, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v1, v11
	v_add_nc_u32_e32 v11, 1, v9
	v_sub_nc_u32_e32 v13, v1, v2
	v_cmp_ge_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v9, v9, v11, s1
	v_cndmask_b32_e64 v1, v1, v13, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, 1, v9
	v_cmp_ge_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v1, v9, v11, s1
                                        ; implicit-def: $vgpr9
	v_xor_b32_e32 v1, v1, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v10
	scratch_store_b32 v0, v1, off
	scratch_load_b32 v0, v8, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v10, v0, v1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB15_704:                             ; %Flow2411
                                        ;   in Loop: Header=BB15_692 Depth=1
	s_and_not1_saveexec_b32 s1, s8
; %bb.705:                              ;   in Loop: Header=BB15_692 Depth=1
	v_sub_nc_u32_e32 v10, v9, v1
; %bb.706:                              ; %.sink.split.i.i.i130
                                        ;   in Loop: Header=BB15_692 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[0:1], null, v6, 28, v[60:61]
	scratch_store_b32 v0, v10, off offset:12
.LBB15_707:                             ; %Flow2413
                                        ;   in Loop: Header=BB15_692 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	scratch_load_b32 v0, v7, off
.LBB15_708:                             ; %Flow2415
                                        ;   in Loop: Header=BB15_692 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	scratch_load_b32 v1, v101, off
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v6, v0
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s1, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s4, s1, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB15_692
.LBB15_709:                             ; %Flow2417
	s_or_b32 exec_lo, exec_lo, s3
	s_clause 0x2
	scratch_load_b96 v[0:2], v106, off
	scratch_load_b96 v[5:7], v63, off
	scratch_load_b32 v4, v94, off
	v_cmp_eq_u16_e32 vcc_lo, 0, v3
	v_mov_b32_e32 v8, 0
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v3, 10, v2
	v_sub_nc_u32_e32 v9, 0, v0
	v_sub_nc_u32_e32 v10, 0, v1
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v6, v6, v0
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e64 s0, v4, v3
	v_cndmask_b32_e32 v9, v9, v0, vcc_lo
	v_cndmask_b32_e32 v1, v1, v10, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, v7, v9
	v_add_nc_u32_e32 v5, v5, v1
	v_mov_b32_e32 v9, v8
	s_and_b32 s0, vcc_lo, s0
	s_clause 0x1
	scratch_store_b96 v63, v[5:7], off
	scratch_store_b64 v106, v[8:9], off
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB15_714
; %bb.710:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit.i127.preheader
	v_dual_mov_b32 v5, 16 :: v_dual_lshlrev_b32 v0, 2, v4
	v_lshlrev_b32_e32 v1, 2, v2
                                        ; implicit-def: $sgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v0, v1
	v_add_nc_u32_e32 v0, 1, v4
	v_add3_u32 v1, v1, v5, 0x2f54
.LBB15_711:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit.i127
                                        ; =>This Inner Loop Header: Depth=1
	scratch_load_b32 v4, v1, off
	s_or_b32 s3, s3, exec_lo
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_713
; %bb.712:                              ;   in Loop: Header=BB15_711 Depth=1
	v_cmp_lt_i32_e32 vcc_lo, v0, v2
	v_cmp_ge_i32_e64 s0, v0, v3
	scratch_store_b32 v94, v0, off
	v_add_nc_u32_e32 v0, 1, v0
	v_add_nc_u32_e32 v1, 4, v1
	s_and_not1_b32 s3, s3, exec_lo
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s3, s3, s0
.LBB15_713:                             ; %Flow2402
                                        ;   in Loop: Header=BB15_711 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s3
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB15_711
.LBB15_714:                             ; %Flow2404
	s_or_b32 exec_lo, exec_lo, s2
	v_dual_mov_b32 v0, s46 :: v_dual_mov_b32 v1, s51
	v_dual_mov_b32 v2, v44 :: v_dual_mov_b32 v3, v42
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v2, v56 :: v_dual_mov_b32 v3, v47
	v_dual_mov_b32 v4, v44 :: v_dual_mov_b32 v5, v42
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	scratch_load_b64 v[0:1], v96, off
	v_mov_b32_e32 v2, 16
	s_mov_b32 s3, exec_lo
	v_add_nc_u32_e32 v4, 0x3f70, v2
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v4, v0, 0xc88
	s_clause 0x1
	scratch_load_b32 v7, v0, off
	scratch_load_u8 v0, v92, off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, 0xff, v0
	v_cmpx_ne_u32_e64 v7, v1
	s_cbranch_execz .LBB15_733
; %bb.715:                              ; %.lr.ph.i9.i105
	s_movk_i32 s1, 0x2fb0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_eq_u16_e32 vcc_lo, 0, v3
	v_cmp_ne_u16_e64 s0, 0, v3
	v_add_nc_u32_e64 v5, s1, 16
	v_mov_b32_e32 v6, -1
	s_mov_b32 s4, 0
.LBB15_716:                             ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[0:1], null, v7, 28, v[59:60]
	v_lshlrev_b32_e32 v1, 2, v7
	s_clause 0x1
	scratch_load_b32 v9, v0, off
	scratch_load_b32 v0, v88, off
	v_add3_u32 v8, v4, v1, 0xc88
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e64 s1, v9, v0
	v_cmp_lt_i32_e64 s2, v9, v0
                                        ; implicit-def: $vgpr0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s1, vcc_lo, s1
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s2
	s_xor_b32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB15_724
; %bb.717:                              ;   in Loop: Header=BB15_716 Depth=1
	scratch_load_b32 v0, v95, off
	v_mad_u64_u32 v[10:11], null, v7, 28, v[59:60]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v9, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, v5, v0, 0x2f54
	s_clause 0x1
	scratch_load_b32 v2, v10, off offset:4
	scratch_load_b32 v10, v0, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v10, v10, v2
	scratch_store_b32 v0, v10, off
	s_clause 0x1
	scratch_load_b32 v0, v95, off
	scratch_load_b32 v10, v78, off
	s_waitcnt vmcnt(1)
	v_sub_nc_u32_e32 v0, v9, v0
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v10, v10, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 2, v0
	scratch_store_b32 v78, v10, off
	v_add3_u32 v0, v5, v0, 0x2f7c
	scratch_load_b32 v10, v0, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v10, v10, v2
	scratch_store_b32 v0, v10, off
	scratch_load_b64 v[10:11], v107, off
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v0, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v2, v9, v[0:1]
	v_dual_mov_b32 v10, v11 :: v_dual_add_nc_u32 v9, v10, v2
	scratch_store_b64 v107, v[9:10], off
	scratch_load_b32 v0, v8, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s5, -1, v0
	v_cmpx_ne_u32_e32 -1, v0
	s_cbranch_execz .LBB15_721
; %bb.718:                              ;   in Loop: Header=BB15_716 Depth=1
	v_add3_u32 v1, v4, v1, 0xaf0
	s_mov_b32 s8, -1
	s_mov_b32 s7, exec_lo
	scratch_load_b32 v2, v1, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v2
	s_cbranch_execz .LBB15_720
; %bb.719:                              ;   in Loop: Header=BB15_716 Depth=1
	v_lshlrev_b32_e32 v9, 2, v0
	v_lshlrev_b32_e32 v10, 2, v2
	s_xor_b32 s8, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v9, v4, v9, 0xaf0
	v_add3_u32 v10, v4, v10, 0xc88
	s_clause 0x3
	scratch_store_b32 v9, v2, off
	scratch_store_b32 v10, v0, off
	scratch_store_b32 v8, v6, off
	scratch_store_b32 v1, v6, off
	s_clause 0x1
	scratch_load_b32 v1, v98, off
	scratch_load_b32 v2, v82, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v1, -1, v1
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v2, 2, v84
	s_clause 0x1
	scratch_store_b32 v98, v1, off
	scratch_store_b32 v2, v7, off
	scratch_load_b32 v1, v82, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 1, v1
	scratch_store_b32 v82, v1, off
.LBB15_720:                             ; %Flow2392
                                        ;   in Loop: Header=BB15_716 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s5, exec_lo
	s_and_b32 s5, s8, exec_lo
	s_or_b32 s5, s1, s5
.LBB15_721:                             ; %Flow2391
                                        ;   in Loop: Header=BB15_716 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s1, s5
	s_cbranch_execz .LBB15_723
; %bb.722:                              ;   in Loop: Header=BB15_716 Depth=1
	scratch_load_b32 v0, v96, off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v4, v0, 0xc88
	scratch_load_b32 v0, v0, off
.LBB15_723:                             ; %Flow2393
                                        ;   in Loop: Header=BB15_716 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr7
.LBB15_724:                             ; %Flow2398
                                        ;   in Loop: Header=BB15_716 Depth=1
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB15_732
; %bb.725:                              ;   in Loop: Header=BB15_716 Depth=1
	scratch_load_b32 v10, v95, off
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[0:1], null, v7, 28, v[59:60]
	s_mov_b32 s5, exec_lo
	scratch_load_b64 v[1:2], v0, off offset:8
	s_waitcnt vmcnt(1)
	v_sub_nc_u32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v9, v9, 2, v90
	scratch_load_b32 v10, v9, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v2, v2, v1
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v10, v2
	s_cbranch_execz .LBB15_731
; %bb.726:                              ;   in Loop: Header=BB15_716 Depth=1
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr11
	v_cmpx_le_i32_e64 v10, v2
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB15_728
; %bb.727:                              ;   in Loop: Header=BB15_716 Depth=1
	v_ashrrev_i32_e32 v11, 31, v2
	v_mul_lo_u32 v1, v10, v1
	v_add_nc_u32_e32 v0, 8, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v11
	v_xor_b32_e32 v2, v2, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v12, v2
	v_sub_nc_u32_e32 v13, 0, v2
	v_rcp_iflag_f32_e32 v12, v12
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v12, 0x4f7ffffe, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v12, v12
	v_mul_lo_u32 v10, v13, v12
	v_ashrrev_i32_e32 v13, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v1, v1, v13
	v_xor_b32_e32 v11, v13, v11
	v_mul_hi_u32 v10, v12, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v1, v13
	v_add_nc_u32_e32 v10, v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v10, v1, v10
	v_mul_lo_u32 v12, v10, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v1, v12
	v_add_nc_u32_e32 v12, 1, v10
	v_sub_nc_u32_e32 v14, v1, v2
	v_cmp_ge_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v10, v10, v12, s1
	v_cndmask_b32_e64 v1, v1, v14, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v12, 1, v10
	v_cmp_ge_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v1, v10, v12, s1
                                        ; implicit-def: $vgpr10
	v_xor_b32_e32 v1, v1, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v11
	scratch_store_b32 v0, v1, off
	scratch_load_b32 v0, v9, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v11, v0, v1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB15_728:                             ; %Flow2395
                                        ;   in Loop: Header=BB15_716 Depth=1
	s_and_not1_saveexec_b32 s1, s6
; %bb.729:                              ;   in Loop: Header=BB15_716 Depth=1
	v_sub_nc_u32_e32 v11, v10, v1
; %bb.730:                              ; %.sink.split.i.i21.i124
                                        ;   in Loop: Header=BB15_716 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[0:1], null, v7, 28, v[59:60]
	scratch_store_b32 v0, v11, off offset:12
.LBB15_731:                             ; %Flow2397
                                        ;   in Loop: Header=BB15_716 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	scratch_load_b32 v0, v8, off
.LBB15_732:                             ; %Flow2399
                                        ;   in Loop: Header=BB15_716 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	scratch_load_b32 v1, v97, off
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v7, v0
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s1, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s4, s1, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB15_716
.LBB15_733:                             ; %Flow2401
	s_or_b32 exec_lo, exec_lo, s3
	s_clause 0x2
	scratch_load_b96 v[0:2], v107, off
	scratch_load_b96 v[5:7], v63, off
	scratch_load_b32 v4, v77, off
	v_cmp_eq_u16_e32 vcc_lo, 0, v3
	v_mov_b32_e32 v8, 0
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v3, 10, v2
	v_sub_nc_u32_e32 v9, 0, v0
	v_sub_nc_u32_e32 v10, 0, v1
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v6, v6, v0
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e64 s0, v4, v3
	v_cndmask_b32_e32 v9, v9, v0, vcc_lo
	v_cndmask_b32_e32 v1, v1, v10, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, v7, v9
	v_add_nc_u32_e32 v5, v5, v1
	v_mov_b32_e32 v9, v8
	s_and_b32 s2, vcc_lo, s0
	s_clause 0x1
	scratch_store_b96 v63, v[5:7], off
	scratch_store_b64 v107, v[8:9], off
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB15_739
; %bb.734:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit29.i123.preheader
	v_lshlrev_b32_e32 v0, 2, v4
	v_lshlrev_b32_e32 v1, 2, v2
                                        ; implicit-def: $sgpr2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v1
	v_mov_b32_e32 v1, 16
	v_add3_u32 v0, v0, v1, 0x5f04
.LBB15_735:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit29.i123
                                        ; =>This Inner Loop Header: Depth=1
	scratch_load_b32 v1, v0, off
	s_or_b32 s2, s2, exec_lo
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB15_737
; %bb.736:                              ;   in Loop: Header=BB15_735 Depth=1
	v_add_nc_u32_e32 v1, -1, v4
	v_cmp_le_i32_e32 vcc_lo, v4, v2
	v_add_nc_u32_e32 v0, -4, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_mov_b32_e32 v4, v1
	s_and_b32 s4, vcc_lo, exec_lo
	scratch_store_b32 v77, v1, off
	s_or_b32 s2, s2, s4
.LBB15_737:                             ; %Flow2386
                                        ;   in Loop: Header=BB15_735 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, exec_lo, s2
	s_or_b32 s1, s3, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB15_735
; %bb.738:                              ; %Flow2387
	s_or_b32 exec_lo, exec_lo, s1
.LBB15_739:                             ; %Flow2388
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b64 v[0:1], off, off offset:4036
	scratch_load_b64 v[7:8], v88, off
	v_mov_b32_e32 v2, 16
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v9, 4, v7
	scratch_store_b64 v89, v[7:8], off
	v_add3_u32 v0, v2, v0, 0xc88
	scratch_load_b32 v5, v0, off
	v_add_nc_u32_e32 v0, 1, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_max_i32_e32 v8, v7, v0
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v5, v1
	s_cbranch_execz .LBB15_758
; %bb.740:                              ; %.lr.ph.i.i135
	scratch_load_b64 v[0:1], v72, off
	s_mov_b32 s3, 0
	s_mov_b32 s2, 16
	s_movk_i32 s4, 0x2f54
	s_movk_i32 s5, 0xaf0
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v4, -1 :: v_dual_add_f32 v3, v0, v1
.LBB15_741:                             ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[0:1], null, v5, 28, s[2:3]
	v_dual_mov_b32 v6, v5 :: v_dual_lshlrev_b32 v1, 2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add3_u32 v10, v2, v1, 0xc88
	scratch_load_b32 v11, v0, off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v11, v8
	v_cmp_le_i32_e64 s0, v11, v9
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s6, s0
	s_xor_b32 s0, exec_lo, s6
	s_cbranch_execz .LBB15_743
; %bb.742:                              ;   in Loop: Header=BB15_741 Depth=1
	scratch_load_b32 v5, v10, off
                                        ; implicit-def: $vgpr0_vgpr1
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr10
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr1
.LBB15_743:                             ; %Flow2381
                                        ;   in Loop: Header=BB15_741 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB15_757
; %bb.744:                              ;   in Loop: Header=BB15_741 Depth=1
	scratch_load_b32 v5, v93, off
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v5, v11, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v5, 2, v5
	v_add3_u32 v5, 16, v5, s4
	scratch_load_b32 v11, v5, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v11
	s_cbranch_execz .LBB15_746
; %bb.745:                              ;   in Loop: Header=BB15_741 Depth=1
	v_sub_nc_u32_e32 v11, 0, v11
	scratch_store_b32 v5, v11, off
.LBB15_746:                             ;   in Loop: Header=BB15_741 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mad_u64_u32 v[11:12], null, v6, 28, s[2:3]
	scratch_load_b32 v5, v11, off offset:20
	s_waitcnt vmcnt(0)
	v_cmp_nlt_f32_e32 vcc_lo, v5, v3
                                        ; implicit-def: $vgpr5
	s_and_saveexec_b32 s6, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB15_754
; %bb.747:                              ;   in Loop: Header=BB15_741 Depth=1
	s_clause 0x1
	scratch_load_b64 v[11:12], v0, off
	scratch_load_b32 v0, v93, off
	v_mad_u64_u32 v[13:14], null, v6, 28, s[2:3]
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, 16, v0, s4
	scratch_load_b32 v5, v0, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v5, v12
	scratch_store_b32 v0, v5, off
	s_clause 0x1
	scratch_load_b32 v0, v13, off offset:4
	scratch_load_b32 v5, v75, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v5, v0
	scratch_store_b32 v75, v0, off
	scratch_load_b32 v5, v10, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s7, -1, v5
	v_cmpx_ne_u32_e32 -1, v5
	s_cbranch_execz .LBB15_751
; %bb.748:                              ;   in Loop: Header=BB15_741 Depth=1
	v_add3_u32 v0, 16, v1, s5
	s_mov_b32 s10, -1
	s_mov_b32 s9, exec_lo
	scratch_load_b32 v1, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v1
	s_cbranch_execz .LBB15_750
; %bb.749:                              ;   in Loop: Header=BB15_741 Depth=1
	v_lshlrev_b32_e32 v11, 2, v5
	v_lshlrev_b32_e32 v12, 2, v1
	s_xor_b32 s10, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v11, 16, v11, s5
	v_add3_u32 v12, v2, v12, 0xc88
	s_clause 0x3
	scratch_store_b32 v11, v1, off
	scratch_store_b32 v12, v5, off
	scratch_store_b32 v10, v4, off
	scratch_store_b32 v0, v4, off
	s_clause 0x1
	scratch_load_b32 v0, off, off offset:4044
	scratch_load_b32 v1, off, off offset:4032
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, -1, v0
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v1, v1, 2, s42
	scratch_store_b32 off, v0, off offset:4044
	scratch_store_b32 v1, v6, off
	scratch_load_b32 v0, off, off offset:4032
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 off, v0, off offset:4032
.LBB15_750:                             ; %Flow2376
                                        ;   in Loop: Header=BB15_741 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s7, s7, exec_lo
	s_and_b32 s9, s10, exec_lo
	s_or_b32 s7, s7, s9
.LBB15_751:                             ; %Flow2375
                                        ;   in Loop: Header=BB15_741 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s8, s7
	s_cbranch_execz .LBB15_753
; %bb.752:                              ;   in Loop: Header=BB15_741 Depth=1
	scratch_load_b32 v0, off, off offset:4036
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v2, v0, 0xc88
	scratch_load_b32 v5, v0, off
.LBB15_753:                             ; %Flow2377
                                        ;   in Loop: Header=BB15_741 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr10
.LBB15_754:                             ; %Flow2379
                                        ;   in Loop: Header=BB15_741 Depth=1
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB15_756
; %bb.755:                              ;   in Loop: Header=BB15_741 Depth=1
	scratch_load_b32 v5, v10, off
	v_mad_u64_u32 v[0:1], null, v6, 28, s[2:3]
	scratch_store_b32 v0, v3, off offset:24
.LBB15_756:                             ; %Flow2380
                                        ;   in Loop: Header=BB15_741 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB15_757:                             ; %Flow2382
                                        ;   in Loop: Header=BB15_741 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b32 v0, off, off offset:4040
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v5, v0
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_741
.LBB15_758:                             ; %Flow2384
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b64 v[0:1], v100, off
	v_mov_b32_e32 v2, 16
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v10, 0xfc0, v2
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, v10, v0, 0xc88
	scratch_load_b32 v3, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v3, v1
	s_cbranch_execz .LBB15_773
; %bb.759:                              ; %.lr.ph32.i.i143
	scratch_load_b64 v[0:1], v72, off
	s_movk_i32 s0, 0x2a70
	s_movk_i32 s2, 0x2c08
	v_add_nc_u32_e64 v11, s0, 16
	v_add_nc_u32_e64 v12, s2, 16
	s_add_i32 s2, s50, -4
	s_mov_b32 s3, 0
	s_movk_i32 s4, 0x2f54
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v13, -1 :: v_dual_add_f32 v6, v0, v1
.LBB15_760:                             ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[1:2], null, v3, 28, v[60:61]
	v_lshlrev_b32_e32 v16, 2, v3
	v_mov_b32_e32 v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add3_u32 v15, v10, v16, 0xc88
	scratch_load_b32 v0, v1, off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v0, v8
	v_cmp_le_i32_e64 s0, v0, v9
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s5, s0
	s_xor_b32 s0, exec_lo, s5
	s_cbranch_execz .LBB15_762
; %bb.761:                              ;   in Loop: Header=BB15_760 Depth=1
	scratch_load_b32 v3, v15, off
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr14
                                        ; implicit-def: $vgpr15
                                        ; implicit-def: $vgpr1_vgpr2
                                        ; implicit-def: $vgpr16
.LBB15_762:                             ; %Flow2369
                                        ;   in Loop: Header=BB15_760 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB15_772
; %bb.763:                              ;   in Loop: Header=BB15_760 Depth=1
	scratch_load_b32 v2, v93, off
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 2, v2
	v_add3_u32 v2, 16, v2, s4
	scratch_load_b32 v3, v2, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v3
	s_cbranch_execz .LBB15_765
; %bb.764:                              ;   in Loop: Header=BB15_760 Depth=1
	v_sub_nc_u32_e32 v0, 0, v3
	scratch_store_b32 v2, v0, off
	scratch_load_b32 v0, v1, off
.LBB15_765:                             ;   in Loop: Header=BB15_760 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_clause 0x1
	scratch_load_b32 v1, v87, off
	scratch_load_b32 v2, v108, off
	v_mad_u64_u32 v[17:18], null, v14, 28, v[60:61]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_lshl_add_u32 v3, v1, 2, s2
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v2, 2, v11
	v_add_nc_u32_e32 v1, -1, v1
	s_clause 0x1
	scratch_load_b32 v20, v3, off
	scratch_load_b32 v21, v2, off
	scratch_store_b32 v87, v1, off
	s_clause 0x1
	scratch_load_b128 v[1:4], v17, off offset:4
	scratch_load_b32 v5, v17, off offset:20
	s_waitcnt vmcnt(3)
	v_mad_u64_u32 v[18:19], null, v20, 28, v[61:62]
	v_lshlrev_b32_e32 v19, 2, v20
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v22, v11, v19
	scratch_store_b32 v17, v6, off offset:24
	s_waitcnt vmcnt(1)
	scratch_store_b128 v18, v[0:3], off
	s_waitcnt vmcnt(0)
	s_clause 0x1
	scratch_store_b96 v18, v[4:6], off offset:16
	scratch_store_b32 v22, v21, off
	scratch_load_b32 v0, v108, off
	v_add_nc_u32_e32 v1, v12, v19
	v_lshl_add_u32 v3, v21, 2, v12
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v0, 2, v11
	s_clause 0x2
	scratch_store_b32 v1, v0, off
	scratch_store_b32 v2, v20, off
	scratch_store_b32 v3, v20, off
	scratch_load_b32 v0, v109, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v109, v0, off
	scratch_load_b32 v3, v15, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s5, -1, v3
	v_cmpx_ne_u32_e32 -1, v3
	s_cbranch_execz .LBB15_769
; %bb.766:                              ;   in Loop: Header=BB15_760 Depth=1
	v_add3_u32 v0, v10, v16, 0xaf0
	s_mov_b32 s8, -1
	s_mov_b32 s7, exec_lo
	scratch_load_b32 v1, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v1
	s_cbranch_execz .LBB15_768
; %bb.767:                              ;   in Loop: Header=BB15_760 Depth=1
	v_lshlrev_b32_e32 v2, 2, v3
	v_lshlrev_b32_e32 v4, 2, v1
	s_xor_b32 s8, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v2, v10, v2, 0xaf0
	v_add3_u32 v4, v10, v4, 0xc88
	s_clause 0x3
	scratch_store_b32 v2, v1, off
	scratch_store_b32 v4, v3, off
	scratch_store_b32 v15, v13, off
	scratch_store_b32 v0, v13, off
	s_clause 0x1
	scratch_load_b32 v0, v102, off
	scratch_load_b32 v1, v83, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, -1, v0
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v1, v1, 2, v85
	s_clause 0x1
	scratch_store_b32 v102, v0, off
	scratch_store_b32 v1, v14, off
	scratch_load_b32 v0, v83, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v83, v0, off
.LBB15_768:                             ; %Flow2367
                                        ;   in Loop: Header=BB15_760 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s7, s8, exec_lo
	s_or_b32 s5, s5, s7
.LBB15_769:                             ; %Flow2366
                                        ;   in Loop: Header=BB15_760 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB15_771
; %bb.770:                              ;   in Loop: Header=BB15_760 Depth=1
	scratch_load_b32 v0, v100, off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v10, v0, 0xc88
	scratch_load_b32 v3, v0, off
.LBB15_771:                             ; %Flow2368
                                        ;   in Loop: Header=BB15_760 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB15_772:                             ; %Flow2370
                                        ;   in Loop: Header=BB15_760 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b32 v0, v101, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v3, v0
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_760
.LBB15_773:                             ; %Flow2372
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x2
	scratch_load_b32 v2, v99, off
	scratch_load_b64 v[0:1], off, s52
	scratch_load_b32 v3, v94, off
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, s40, v0, 0xc88
	s_clause 0x1
	scratch_load_b32 v4, v112, off
	scratch_load_b32 v5, v0, off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v0, -1, v3
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1)
	v_min3_i32 v9, v4, v2, v0
	v_add_nc_u32_e32 v10, -4, v4
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v5, v1
	s_cbranch_execz .LBB15_792
; %bb.774:                              ; %.lr.ph.i3.i151
	scratch_load_b64 v[0:1], v73, off
	v_mov_b32_e32 v2, 16
	v_mov_b32_e32 v4, -1
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_add_f32 v3, v0, v1 :: v_dual_add_nc_u32 v2, 0x2fb0, v2
.LBB15_775:                             ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[0:1], null, v5, 28, s[40:41]
	v_dual_mov_b32 v6, v5 :: v_dual_lshlrev_b32 v1, 2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add3_u32 v11, s40, v1, 0xc88
	scratch_load_b32 v12, v0, off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v12, v10
	v_cmp_le_i32_e64 s0, v12, v9
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s0
	s_xor_b32 s0, exec_lo, s3
	s_cbranch_execz .LBB15_777
; %bb.776:                              ;   in Loop: Header=BB15_775 Depth=1
	scratch_load_b32 v5, v11, off
                                        ; implicit-def: $vgpr0_vgpr1
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr1
.LBB15_777:                             ; %Flow2360
                                        ;   in Loop: Header=BB15_775 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB15_791
; %bb.778:                              ;   in Loop: Header=BB15_775 Depth=1
	scratch_load_b32 v5, v95, off
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v5, v12, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v5, 2, v5
	v_add3_u32 v5, v2, v5, 0x2f54
	scratch_load_b32 v12, v5, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v12
	s_cbranch_execz .LBB15_780
; %bb.779:                              ;   in Loop: Header=BB15_775 Depth=1
	v_sub_nc_u32_e32 v12, 0, v12
	scratch_store_b32 v5, v12, off
.LBB15_780:                             ;   in Loop: Header=BB15_775 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[12:13], null, v6, 28, s[40:41]
	scratch_load_b32 v5, v12, off offset:20
	s_waitcnt vmcnt(0)
	v_cmp_nlt_f32_e32 vcc_lo, v5, v3
                                        ; implicit-def: $vgpr5
	s_and_saveexec_b32 s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB15_788
; %bb.781:                              ;   in Loop: Header=BB15_775 Depth=1
	s_clause 0x1
	scratch_load_b64 v[12:13], v0, off
	scratch_load_b32 v0, v95, off
	v_mad_u64_u32 v[14:15], null, v6, 28, s[40:41]
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, v2, v0, 0x2f54
	scratch_load_b32 v5, v0, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v5, v13
	scratch_store_b32 v0, v5, off
	s_clause 0x1
	scratch_load_b32 v0, v14, off offset:4
	scratch_load_b32 v5, v78, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v5, v0
	scratch_store_b32 v78, v0, off
	scratch_load_b32 v5, v11, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s4, -1, v5
	v_cmpx_ne_u32_e32 -1, v5
	s_cbranch_execz .LBB15_785
; %bb.782:                              ;   in Loop: Header=BB15_775 Depth=1
	v_add3_u32 v0, s40, v1, 0xaf0
	s_mov_b32 s7, -1
	s_mov_b32 s6, exec_lo
	scratch_load_b32 v1, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v1
	s_cbranch_execz .LBB15_784
; %bb.783:                              ;   in Loop: Header=BB15_775 Depth=1
	v_lshlrev_b32_e32 v12, 2, v5
	v_lshlrev_b32_e32 v13, 2, v1
	s_xor_b32 s7, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v12, s40, v12, 0xaf0
	v_add3_u32 v13, s40, v13, 0xc88
	s_clause 0x3
	scratch_store_b32 v12, v1, off
	scratch_store_b32 v13, v5, off
	scratch_store_b32 v11, v4, off
	scratch_store_b32 v0, v4, off
	s_clause 0x1
	scratch_load_b32 v0, v105, off
	scratch_load_b32 v1, v74, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, -1, v0
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v1, v1, 2, s48
	s_clause 0x1
	scratch_store_b32 v105, v0, off
	scratch_store_b32 v1, v6, off
	scratch_load_b32 v0, v74, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v74, v0, off
.LBB15_784:                             ; %Flow2355
                                        ;   in Loop: Header=BB15_775 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s6, s7, exec_lo
	s_or_b32 s4, s4, s6
.LBB15_785:                             ; %Flow2354
                                        ;   in Loop: Header=BB15_775 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB15_787
; %bb.786:                              ;   in Loop: Header=BB15_775 Depth=1
	scratch_load_b32 v0, off, s52
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, s40, v0, 0xc88
	scratch_load_b32 v5, v0, off
.LBB15_787:                             ; %Flow2356
                                        ;   in Loop: Header=BB15_775 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr11
.LBB15_788:                             ; %Flow2358
                                        ;   in Loop: Header=BB15_775 Depth=1
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB15_790
; %bb.789:                              ;   in Loop: Header=BB15_775 Depth=1
	scratch_load_b32 v5, v11, off
	v_mad_u64_u32 v[0:1], null, v6, 28, s[40:41]
	scratch_store_b32 v0, v3, off offset:24
.LBB15_790:                             ; %Flow2359
                                        ;   in Loop: Header=BB15_775 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_791:                             ; %Flow2361
                                        ;   in Loop: Header=BB15_775 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b32 v0, v104, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v5, v0
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB15_775
.LBB15_792:                             ; %Flow2363
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b64 v[0:1], v96, off
	v_mov_b32_e32 v2, 16
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v11, 0x3f70, v2
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, v11, v0, 0xc88
	scratch_load_b32 v3, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v3, v1
	s_cbranch_execz .LBB15_807
; %bb.793:                              ; %.lr.ph32.i11.i159
	scratch_load_b64 v[0:1], v73, off
	s_movk_i32 s0, 0x2fb0
	s_movk_i32 s2, 0x5a20
	s_movk_i32 s3, 0x5bb8
	v_add_nc_u32_e64 v12, s0, 16
	v_add_nc_u32_e64 v13, s2, 16
	v_add_nc_u32_e64 v14, s3, 16
	s_add_i32 s2, s49, -4
	s_mov_b32 s3, 0
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v15, -1 :: v_dual_add_f32 v6, v0, v1
.LBB15_794:                             ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[1:2], null, v3, 28, v[59:60]
	v_lshlrev_b32_e32 v18, 2, v3
	v_mov_b32_e32 v16, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v11, v18, 0xc88
	scratch_load_b32 v0, v1, off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v0, v10
	v_cmp_le_i32_e64 s0, v0, v9
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s0
	s_xor_b32 s0, exec_lo, s4
	s_cbranch_execz .LBB15_796
; %bb.795:                              ;   in Loop: Header=BB15_794 Depth=1
	scratch_load_b32 v3, v17, off
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr16
                                        ; implicit-def: $vgpr17
                                        ; implicit-def: $vgpr1_vgpr2
                                        ; implicit-def: $vgpr18
.LBB15_796:                             ; %Flow2348
                                        ;   in Loop: Header=BB15_794 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB15_806
; %bb.797:                              ;   in Loop: Header=BB15_794 Depth=1
	scratch_load_b32 v2, v95, off
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 2, v2
	v_add3_u32 v2, v12, v2, 0x2f54
	scratch_load_b32 v3, v2, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v3
	s_cbranch_execz .LBB15_799
; %bb.798:                              ;   in Loop: Header=BB15_794 Depth=1
	v_sub_nc_u32_e32 v0, 0, v3
	scratch_store_b32 v2, v0, off
	scratch_load_b32 v0, v1, off
.LBB15_799:                             ;   in Loop: Header=BB15_794 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_clause 0x1
	scratch_load_b32 v1, v86, off
	scratch_load_b32 v2, v110, off
	v_mad_u64_u32 v[19:20], null, v16, 28, v[59:60]
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_lshl_add_u32 v3, v1, 2, s2
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v2, 2, v13
	v_add_nc_u32_e32 v1, -1, v1
	s_clause 0x1
	scratch_load_b32 v22, v3, off
	scratch_load_b32 v23, v2, off
	scratch_store_b32 v86, v1, off
	s_clause 0x1
	scratch_load_b128 v[1:4], v19, off offset:4
	scratch_load_b32 v5, v19, off offset:20
	s_waitcnt vmcnt(3)
	v_mad_u64_u32 v[20:21], null, v22, 28, v[62:63]
	v_lshlrev_b32_e32 v21, 2, v22
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v24, v13, v21
	scratch_store_b32 v19, v6, off offset:24
	s_waitcnt vmcnt(1)
	scratch_store_b128 v20, v[0:3], off
	s_waitcnt vmcnt(0)
	s_clause 0x1
	scratch_store_b96 v20, v[4:6], off offset:16
	scratch_store_b32 v24, v23, off
	scratch_load_b32 v0, v110, off
	v_add_nc_u32_e32 v1, v14, v21
	v_lshl_add_u32 v3, v23, 2, v14
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v0, 2, v13
	s_clause 0x2
	scratch_store_b32 v1, v0, off
	scratch_store_b32 v2, v22, off
	scratch_store_b32 v3, v22, off
	scratch_load_b32 v0, v111, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v111, v0, off
	scratch_load_b32 v3, v17, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s4, -1, v3
	v_cmpx_ne_u32_e32 -1, v3
	s_cbranch_execz .LBB15_803
; %bb.800:                              ;   in Loop: Header=BB15_794 Depth=1
	v_add3_u32 v0, v11, v18, 0xaf0
	s_mov_b32 s7, -1
	s_mov_b32 s6, exec_lo
	scratch_load_b32 v1, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v1
	s_cbranch_execz .LBB15_802
; %bb.801:                              ;   in Loop: Header=BB15_794 Depth=1
	v_lshlrev_b32_e32 v2, 2, v3
	v_lshlrev_b32_e32 v4, 2, v1
	s_xor_b32 s7, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v2, v11, v2, 0xaf0
	v_add3_u32 v4, v11, v4, 0xc88
	s_clause 0x3
	scratch_store_b32 v2, v1, off
	scratch_store_b32 v4, v3, off
	scratch_store_b32 v17, v15, off
	scratch_store_b32 v0, v15, off
	s_clause 0x1
	scratch_load_b32 v0, v98, off
	scratch_load_b32 v1, v82, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, -1, v0
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v1, v1, 2, v84
	s_clause 0x1
	scratch_store_b32 v98, v0, off
	scratch_store_b32 v1, v16, off
	scratch_load_b32 v0, v82, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v82, v0, off
.LBB15_802:                             ; %Flow2346
                                        ;   in Loop: Header=BB15_794 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s6, s7, exec_lo
	s_or_b32 s4, s4, s6
.LBB15_803:                             ; %Flow2345
                                        ;   in Loop: Header=BB15_794 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB15_805
; %bb.804:                              ;   in Loop: Header=BB15_794 Depth=1
	scratch_load_b32 v0, v96, off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v11, v0, 0xc88
	scratch_load_b32 v3, v0, off
.LBB15_805:                             ; %Flow2347
                                        ;   in Loop: Header=BB15_794 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB15_806:                             ; %Flow2349
                                        ;   in Loop: Header=BB15_794 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b32 v0, v97, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v3, v0
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_794
.LBB15_807:                             ; %Flow2351
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x2
	scratch_load_b32 v11, v93, off
	scratch_load_b64 v[1:2], v103, off
	scratch_load_b32 v3, v75, off
	v_add_nc_u32_e32 v7, 5, v7
	s_mov_b32 s3, 0
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v4, 10, v11
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v5, v1, v2
	v_max_i32_e32 v0, v8, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_i32_e32 v4, v7, v4
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v12, v5, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e32 vcc_lo, v0, v4
	v_cmp_lt_i32_e64 s0, 0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_815
; %bb.808:                              ; %.lr.ph.i19.i168
	scratch_load_b64 v[1:2], v72, off
	v_dual_mov_b32 v4, 16 :: v_dual_lshlrev_b32 v3, 2, v0
	s_movk_i32 s0, 0xaf0
	s_movk_i32 s2, 0xc88
	v_mov_b32_e32 v6, -1.0
	v_add_nc_u32_e64 v13, s0, 16
	v_add_nc_u32_e64 v14, s2, 16
	v_add3_u32 v15, v3, v4, 0x2f54
	s_add_i32 s4, s42, -4
	s_mov_b32 s2, 16
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v5, v1, v2 :: v_dual_mov_b32 v2, 0
.LBB15_809:                             ; =>This Inner Loop Header: Depth=1
	v_lshlrev_b32_e32 v1, 2, v11
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v15, v1
	scratch_load_b32 v4, v1, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 -1, v4
	s_cbranch_execz .LBB15_813
; %bb.810:                              ;   in Loop: Header=BB15_809 Depth=1
	scratch_load_b32 v1, v76, off
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v1, v4
	s_cbranch_execz .LBB15_812
; %bb.811:                              ;   in Loop: Header=BB15_809 Depth=1
	s_clause 0x1
	scratch_load_b32 v11, off, off offset:4032
	scratch_load_b32 v3, off, off offset:4040
	v_sub_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_i32_e32 v1, v12, v1
	v_sub_nc_u32_e32 v12, v12, v1
	s_waitcnt vmcnt(1)
	v_lshl_add_u32 v16, v11, 2, s4
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v3, v3, 2, v13
	v_add_nc_u32_e32 v11, -1, v11
	s_clause 0x1
	scratch_load_b32 v18, v16, off
	scratch_load_b32 v19, v3, off
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[16:17], null, v18, 28, s[2:3]
	v_lshlrev_b32_e32 v17, 2, v18
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v2 :: v_dual_add_nc_u32 v20, v13, v17
	scratch_store_b32 off, v11, off offset:4032
	s_clause 0x1
	scratch_store_b128 v16, v[0:3], off
	scratch_store_b96 v16, v[4:6], off offset:16
	s_waitcnt vmcnt(0)
	scratch_store_b32 v20, v19, off
	scratch_load_b32 v3, off, off offset:4040
	v_add_nc_u32_e32 v4, v14, v17
	v_lshl_add_u32 v16, v19, 2, v14
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v11, v3, 2, v13
	s_clause 0x2
	scratch_store_b32 v4, v3, off
	scratch_store_b32 v11, v18, off
	scratch_store_b32 v16, v18, off
	scratch_load_b32 v3, v93, off
	scratch_load_b32 v4, off, off offset:4044
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v15, v3
	scratch_store_b32 off, v4, off offset:4044
	scratch_load_b32 v4, v3, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v4, v1
	scratch_store_b32 v3, v4, off
	s_clause 0x1
	scratch_load_b32 v3, v75, off
	scratch_load_b32 v11, v93, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v3, v3, v1
	scratch_store_b32 v75, v3, off
.LBB15_812:                             ; %Flow2340
                                        ;   in Loop: Header=BB15_809 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB15_813:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE12sendNewOrderERKiRi.exit.i.i172
                                        ;   in Loop: Header=BB15_809 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 10, v11
	v_add_nc_u32_e32 v0, 1, v0
	v_cmp_eq_u32_e64 s0, 0, v12
	v_add_nc_u32_e32 v15, 4, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_i32_e32 v1, v7, v1
	v_cmp_ge_i32_e32 vcc_lo, v0, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s0, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_809
; %bb.814:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE20sendNewSellingOrdersERKiS3_Ri.exit.loopexit.i176
	s_or_b32 exec_lo, exec_lo, s3
	scratch_load_b64 v[1:2], v103, off
.LBB15_815:                             ; %Flow2342
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	scratch_load_b32 v3, v95, off
	scratch_load_b32 v0, v78, off
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v4, 9, v3
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v1, v0
	v_max_i32_e32 v5, v10, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_min_i32_e32 v0, v9, v4
	v_sub_nc_u32_e32 v7, v2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, v0, v5
	v_cmp_lt_i32_e64 s0, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_823
; %bb.816:                              ; %.lr.ph.i22.i183
	scratch_load_b64 v[1:2], v73, off
	v_dual_mov_b32 v5, 16 :: v_dual_lshlrev_b32 v4, 2, v0
	v_mov_b32_e32 v6, -1.0
	s_add_i32 s3, s48, -4
	s_add_i32 s4, s40, 0xaf0
	s_add_i32 s5, s40, 0xc88
	v_add3_u32 v11, v4, v5, 0x5f04
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v5, v1, v2 :: v_dual_mov_b32 v2, 0
.LBB15_817:                             ; =>This Inner Loop Header: Depth=1
	v_lshlrev_b32_e32 v1, 2, v3
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v11, v1
	scratch_load_b32 v4, v1, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 -1, v4
	s_cbranch_execz .LBB15_821
; %bb.818:                              ;   in Loop: Header=BB15_817 Depth=1
	scratch_load_b32 v1, v79, off
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v1, v4
	s_cbranch_execz .LBB15_820
; %bb.819:                              ;   in Loop: Header=BB15_817 Depth=1
	s_clause 0x1
	scratch_load_b32 v14, v74, off
	scratch_load_b32 v3, v104, off
	v_sub_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_i32_e32 v1, v7, v1
	v_sub_nc_u32_e32 v7, v7, v1
	s_waitcnt vmcnt(1)
	v_lshl_add_u32 v12, v14, 2, s3
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v3, v3, 2, s4
	v_add_nc_u32_e32 v14, -1, v14
	s_clause 0x1
	scratch_load_b32 v15, v12, off
	scratch_load_b32 v16, v3, off
	v_mov_b32_e32 v3, v2
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[12:13], null, v15, 28, s[40:41]
	v_lshlrev_b32_e32 v13, 2, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v17, s4, v13
	s_clause 0x2
	scratch_store_b32 v74, v14, off
	scratch_store_b128 v12, v[0:3], off
	scratch_store_b96 v12, v[4:6], off offset:16
	s_waitcnt vmcnt(0)
	scratch_store_b32 v17, v16, off
	scratch_load_b32 v3, v104, off
	v_add_nc_u32_e32 v4, s5, v13
	v_lshl_add_u32 v13, v16, 2, s5
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v12, v3, 2, s4
	s_clause 0x2
	scratch_store_b32 v4, v3, off
	scratch_store_b32 v12, v15, off
	scratch_store_b32 v13, v15, off
	s_clause 0x1
	scratch_load_b32 v3, v95, off
	scratch_load_b32 v4, v105, off
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v11, v3
	scratch_store_b32 v105, v4, off
	scratch_load_b32 v4, v3, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v4, v1
	scratch_store_b32 v3, v4, off
	s_clause 0x1
	scratch_load_b32 v4, v78, off
	scratch_load_b32 v3, v95, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v4, v4, v1
	scratch_store_b32 v78, v4, off
.LBB15_820:                             ; %Flow2336
                                        ;   in Loop: Header=BB15_817 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB15_821:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE12sendNewOrderERKiRi.exit.i24.i187
                                        ;   in Loop: Header=BB15_817 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	v_max_i32_e32 v1, v10, v3
	v_cmp_eq_u32_e32 vcc_lo, 0, v7
	v_add_nc_u32_e32 v11, -4, v11
	v_cmp_le_i32_e64 s0, v0, v1
	v_add_nc_u32_e32 v0, -1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, vcc_lo
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s0, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB15_817
; %bb.822:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE19sendNewBuyingOrdersERKiS3_Ri.exit.loopexit.i192
	s_or_b32 exec_lo, exec_lo, s2
	scratch_load_b32 v11, v93, off
.LBB15_823:                             ; %Flow2338
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b32 v0, v94, off
	s_waitcnt vmcnt(0)
	v_min_i32_e32 v1, v0, v8
	v_add_nc_u32_e32 v0, 10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, v1, v11
	v_cmp_lt_i32_e64 s0, v1, v0
	scratch_store_b32 v94, v1, off
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_828
; %bb.824:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit.i203.preheader
	v_lshlrev_b32_e32 v2, 2, v1
	v_lshlrev_b32_e32 v4, 2, v11
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr3
	v_add_nc_u32_e32 v1, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v4
	v_mov_b32_e32 v4, 16
	v_add3_u32 v2, v2, v4, 0x2f54
.LBB15_825:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit.i203
                                        ; =>This Inner Loop Header: Depth=1
	scratch_load_b32 v4, v2, off
	s_or_b32 s3, s3, exec_lo
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_827
; %bb.826:                              ;   in Loop: Header=BB15_825 Depth=1
	v_cmp_lt_i32_e32 vcc_lo, v1, v11
	v_cmp_ge_i32_e64 s0, v1, v0
	scratch_store_b32 v94, v1, off
	v_add_nc_u32_e32 v1, 1, v1
	v_add_nc_u32_e32 v2, 4, v2
	s_and_not1_b32 s3, s3, exec_lo
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s3, s3, s0
.LBB15_827:                             ; %Flow2332
                                        ;   in Loop: Header=BB15_825 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s3
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB15_825
.LBB15_828:                             ; %Flow2334
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b32 v0, v77, off
	v_add_nc_u32_e32 v1, 10, v3
	s_waitcnt vmcnt(0)
	v_max_i32_e32 v0, v0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_ge_i32_e32 vcc_lo, v0, v3
	v_cmp_lt_i32_e64 s0, v0, v1
	scratch_store_b32 v77, v0, off
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB15_833
; %bb.829:                              ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit33.i201.preheader
	v_lshlrev_b32_e32 v1, 2, v0
	v_lshlrev_b32_e32 v2, 2, v3
	v_add_nc_u32_e32 v0, 1, v0
	s_mov_b32 s1, 0
                                        ; implicit-def: $sgpr2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v2
	v_mov_b32_e32 v2, 16
	v_add3_u32 v1, v1, v2, 0x5f04
.LBB15_830:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit33.i201
                                        ; =>This Inner Loop Header: Depth=1
	scratch_load_b32 v2, v1, off
	s_or_b32 s2, s2, exec_lo
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB15_832
; %bb.831:                              ;   in Loop: Header=BB15_830 Depth=1
	v_add_nc_u32_e32 v2, -2, v0
	v_add_nc_u32_e32 v0, -1, v0
	v_add_nc_u32_e32 v1, -4, v1
	s_and_not1_b32 s2, s2, exec_lo
	scratch_store_b32 v77, v2, off
	v_cmp_le_i32_e32 vcc_lo, v0, v3
	s_and_b32 s4, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s4
.LBB15_832:                             ; %Flow2329
                                        ;   in Loop: Header=BB15_830 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, exec_lo, s2
	s_or_b32 s1, s3, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB15_830
.LBB15_833:                             ; %Flow2331
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v4, v58
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_839
; %bb.834:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_838
; %bb.835:                              ; %.preheader3.i.i.i.i269.preheader
	s_mov_b32 s3, 0
.LBB15_836:                             ; %.preheader3.i.i.i.i269
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_836
; %bb.837:                              ; %Flow2325
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_838:                             ; %Flow2327
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_839:                             ; %.loopexit4.i.i.i.i210
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_841
; %bb.840:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_841:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_849
; %bb.842:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_845
; %bb.843:                              ; %.preheader1.i.i.i.i267.preheader
	s_mov_b32 s8, 0
.LBB15_844:                             ; %.preheader1.i.i.i.i267
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_844
.LBB15_845:                             ; %Flow2323
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_847
; %bb.846:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_847:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_849
; %bb.848:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_849:                             ; %Flow2324
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_850:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_852
; %bb.851:                              ;   in Loop: Header=BB15_850 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_852:                             ;   in Loop: Header=BB15_850 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_854
; %bb.853:                              ;   in Loop: Header=BB15_850 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_855
.LBB15_854:                             ;   in Loop: Header=BB15_850 Depth=1
	s_mov_b32 s1, -1
.LBB15_855:                             ; %Flow2318
                                        ;   in Loop: Header=BB15_850 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_850
; %bb.856:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_860
; %bb.857:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_860
; %bb.858:                              ; %.preheader.i.i.i.i266.preheader
	s_mov_b32 s0, 0
.LBB15_859:                             ; %.preheader.i.i.i.i266
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_859
.LBB15_860:                             ; %__ockl_printf_begin.exit.i212
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.25@rel32@lo+4
	s_addc_u32 s1, s1, .str.25@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v4, s58
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	scratch_load_b32 v38, v103, off
	v_dual_mov_b32 v0, v58 :: v_dual_mov_b32 v1, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_866
; %bb.861:
	global_load_b64 v[3:4], v36, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[38:39] offset:40
	global_load_b64 v[5:6], v36, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v36, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[1:2], v[3:4]
	s_cbranch_execz .LBB15_865
; %bb.862:                              ; %.preheader3.i.i.i6.i265.preheader
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
.LBB15_863:                             ; %.preheader3.i.i.i6.i265
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[38:39] offset:40
	global_load_b64 v[8:9], v3, s[38:39]
	v_dual_mov_b32 v7, v2 :: v_dual_mov_b32 v6, v1
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[1:2], null, v4, 24, v[8:9]
	v_and_b32_e32 v8, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v8, 24, v[2:3]
	v_mov_b32_e32 v2, v4
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v3, v[4:7], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_863
; %bb.864:                              ; %Flow2311
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_865:                             ; %Flow2313
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_866:                             ; %.loopexit4.i.i.i1.i214
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v36, s[38:39] offset:40
	global_load_b128 v[4:7], v36, s[38:39]
	v_readfirstlane_b32 s2, v1
	v_readfirstlane_b32 s3, v2
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_868
; %bb.867:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v2, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, 0
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[1:2], v[8:11], off offset:8
.LBB15_868:
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s9, s8
	v_lshlrev_b64 v[2:3], 6, v[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v0, v2
	v_mov_b32_e32 v0, 33
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	v_mov_b32_e32 v2, v1
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v8, s8
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	v_mov_b32_e32 v11, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_876
; %bb.869:
	s_clause 0x1
	global_load_b64 v[12:13], v1, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v1, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[12:13]
	s_cbranch_execz .LBB15_872
; %bb.870:                              ; %.preheader1.i.i.i4.i263.preheader
	v_mov_b32_e32 v10, 0
	s_mov_b32 s8, 0
.LBB15_871:                             ; %.preheader1.i.i.i4.i263
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_871
.LBB15_872:                             ; %Flow2309
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB15_874
; %bb.873:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB15_874:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB15_876
; %bb.875:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_876:                             ; %Flow2310
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_877:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_879
; %bb.878:                              ;   in Loop: Header=BB15_877 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_879:                             ;   in Loop: Header=BB15_877 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_881
; %bb.880:                              ;   in Loop: Header=BB15_877 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_882
.LBB15_881:                             ;   in Loop: Header=BB15_877 Depth=1
	s_mov_b32 s1, -1
.LBB15_882:                             ; %Flow2304
                                        ;   in Loop: Header=BB15_877 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_877
; %bb.883:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_887
; %bb.884:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_887
; %bb.885:                              ; %.preheader.i.i.i3.i262.preheader
	s_mov_b32 s0, 0
.LBB15_886:                             ; %.preheader.i.i.i3.i262
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_886
.LBB15_887:                             ; %__ockl_printf_begin.exit7.i216
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.26@rel32@lo+4
	s_addc_u32 s1, s1, .str.26@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v4, s57
	v_mov_b32_e32 v6, 0
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, v58
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v6
	v_mov_b32_e32 v7, 0
	v_mov_b32_e32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v6
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_893
; %bb.888:
	global_load_b64 v[3:4], v36, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[38:39] offset:40
	global_load_b64 v[7:8], v36, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v7, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v8, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v36, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[3:4]
	s_cbranch_execz .LBB15_892
; %bb.889:                              ; %.preheader3.i.i.i13.i261.preheader
	v_mov_b32_e32 v1, 0
	s_mov_b32 s3, 0
.LBB15_890:                             ; %.preheader3.i.i.i13.i261
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	global_load_b64 v[9:10], v1, s[38:39]
	v_dual_mov_b32 v4, v7 :: v_dual_mov_b32 v5, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v2, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v2, 24, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, v8 :: v_dual_and_b32 v3, v3, v5
	v_mad_u64_u32 v[8:9], null, v3, 24, v[2:3]
	global_load_b64 v[2:3], v[7:8], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_890
; %bb.891:                              ; %Flow2297
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_892:                             ; %Flow2299
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_893:                             ; %.loopexit4.i.i.i8.i218
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[9:10], v36, s[38:39] offset:40
	global_load_b128 v[1:4], v36, s[38:39]
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_895
; %bb.894:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s10, v2, vcc_lo
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, 0
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB15_895:
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s8, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_mov_b32_e32 v7, 0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 6, v[6:7]
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_u32 v8, vcc_lo, v3, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, v4, v6, vcc_lo
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9
	v_dual_mov_b32 v39, v7 :: v_dual_mov_b32 v6, s11
	v_mov_b32_e32 v5, s10
	s_clause 0x3
	global_store_b128 v[8:9], v[36:39], off
	global_store_b128 v[8:9], v[3:6], off offset:16
	global_store_b128 v[8:9], v[3:6], off offset:32
	global_store_b128 v[8:9], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_903
; %bb.896:
	s_clause 0x1
	global_load_b64 v[12:13], v7, s[38:39] offset:32 glc
	global_load_b64 v[3:4], v7, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v7, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[12:13]
	s_cbranch_execz .LBB15_899
; %bb.897:                              ; %.preheader1.i.i.i11.i259.preheader
	s_mov_b32 s8, 0
.LBB15_898:                             ; %.preheader1.i.i.i11.i259
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[8:9], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v7, v[3:6], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_898
.LBB15_899:                             ; %Flow2295
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB15_901
; %bb.900:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB15_901:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB15_903
; %bb.902:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_903:                             ; %Flow2296
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_904:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_906
; %bb.905:                              ;   in Loop: Header=BB15_904 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_906:                             ;   in Loop: Header=BB15_904 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_908
; %bb.907:                              ;   in Loop: Header=BB15_904 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_909
.LBB15_908:                             ;   in Loop: Header=BB15_904 Depth=1
	s_mov_b32 s1, -1
.LBB15_909:                             ; %Flow2290
                                        ;   in Loop: Header=BB15_904 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_904
; %bb.910:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_914
; %bb.911:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[38:39] offset:40
	global_load_b64 v[7:8], v6, s[38:39] offset:24 glc
	global_load_b64 v[4:5], v6, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_914
; %bb.912:                              ; %.preheader.i.i.i10.i258.preheader
	s_mov_b32 s0, 0
.LBB15_913:                             ; %.preheader.i.i.i10.i258
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_913
.LBB15_914:                             ; %__ockl_printf_append_args.exit.i220
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b32 v38, v63, off
	v_mov_b32_e32 v4, v58
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_920
; %bb.915:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_919
; %bb.916:                              ; %.preheader3.i.i.i19.i257.preheader
	s_mov_b32 s3, 0
.LBB15_917:                             ; %.preheader3.i.i.i19.i257
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_917
; %bb.918:                              ; %Flow2283
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_919:                             ; %Flow2285
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_920:                             ; %.loopexit4.i.i.i14.i221
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_922
; %bb.921:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_922:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_930
; %bb.923:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_926
; %bb.924:                              ; %.preheader1.i.i.i17.i255.preheader
	s_mov_b32 s8, 0
.LBB15_925:                             ; %.preheader1.i.i.i17.i255
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_925
.LBB15_926:                             ; %Flow2281
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_928
; %bb.927:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_928:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_930
; %bb.929:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_930:                             ; %Flow2282
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_931:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_933
; %bb.932:                              ;   in Loop: Header=BB15_931 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_933:                             ;   in Loop: Header=BB15_931 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_935
; %bb.934:                              ;   in Loop: Header=BB15_931 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_936
.LBB15_935:                             ;   in Loop: Header=BB15_931 Depth=1
	s_mov_b32 s1, -1
.LBB15_936:                             ; %Flow2276
                                        ;   in Loop: Header=BB15_931 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_931
; %bb.937:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_941
; %bb.938:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_941
; %bb.939:                              ; %.preheader.i.i.i16.i254.preheader
	s_mov_b32 s0, 0
.LBB15_940:                             ; %.preheader.i.i.i16.i254
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_940
.LBB15_941:                             ; %__ockl_printf_begin.exit20.i223
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.27@rel32@lo+4
	s_addc_u32 s1, s1, .str.27@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v4, v57
	v_mov_b32_e32 v6, 0
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, v58
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v6
	v_mov_b32_e32 v7, 0
	v_mov_b32_e32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v6
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_947
; %bb.942:
	global_load_b64 v[3:4], v36, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[38:39] offset:40
	global_load_b64 v[7:8], v36, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v7, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v8, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v36, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[3:4]
	s_cbranch_execz .LBB15_946
; %bb.943:                              ; %.preheader3.i.i.i26.i253.preheader
	v_mov_b32_e32 v1, 0
	s_mov_b32 s3, 0
.LBB15_944:                             ; %.preheader3.i.i.i26.i253
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	global_load_b64 v[9:10], v1, s[38:39]
	v_dual_mov_b32 v4, v7 :: v_dual_mov_b32 v5, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v2, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v2, 24, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, v8 :: v_dual_and_b32 v3, v3, v5
	v_mad_u64_u32 v[8:9], null, v3, 24, v[2:3]
	global_load_b64 v[2:3], v[7:8], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_944
; %bb.945:                              ; %Flow2269
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_946:                             ; %Flow2271
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_947:                             ; %.loopexit4.i.i.i21.i225
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[9:10], v36, s[38:39] offset:40
	global_load_b128 v[1:4], v36, s[38:39]
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_949
; %bb.948:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s10, v2, vcc_lo
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, 0
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB15_949:
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s8, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_mov_b32_e32 v7, 0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 6, v[6:7]
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_u32 v8, vcc_lo, v3, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, v4, v6, vcc_lo
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9
	v_dual_mov_b32 v39, v7 :: v_dual_mov_b32 v6, s11
	v_mov_b32_e32 v5, s10
	s_clause 0x3
	global_store_b128 v[8:9], v[36:39], off
	global_store_b128 v[8:9], v[3:6], off offset:16
	global_store_b128 v[8:9], v[3:6], off offset:32
	global_store_b128 v[8:9], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_957
; %bb.950:
	s_clause 0x1
	global_load_b64 v[12:13], v7, s[38:39] offset:32 glc
	global_load_b64 v[3:4], v7, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v7, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[12:13]
	s_cbranch_execz .LBB15_953
; %bb.951:                              ; %.preheader1.i.i.i24.i251.preheader
	s_mov_b32 s8, 0
.LBB15_952:                             ; %.preheader1.i.i.i24.i251
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[8:9], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v7, v[3:6], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_952
.LBB15_953:                             ; %Flow2267
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB15_955
; %bb.954:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB15_955:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB15_957
; %bb.956:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_957:                             ; %Flow2268
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_958:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_960
; %bb.959:                              ;   in Loop: Header=BB15_958 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_960:                             ;   in Loop: Header=BB15_958 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_962
; %bb.961:                              ;   in Loop: Header=BB15_958 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_963
.LBB15_962:                             ;   in Loop: Header=BB15_958 Depth=1
	s_mov_b32 s1, -1
.LBB15_963:                             ; %Flow2262
                                        ;   in Loop: Header=BB15_958 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_958
; %bb.964:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_968
; %bb.965:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[38:39] offset:40
	global_load_b64 v[7:8], v6, s[38:39] offset:24 glc
	global_load_b64 v[4:5], v6, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_968
; %bb.966:                              ; %.preheader.i.i.i23.i250.preheader
	s_mov_b32 s0, 0
.LBB15_967:                             ; %.preheader.i.i.i23.i250
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_967
.LBB15_968:                             ; %__ockl_printf_append_args.exit27.i227
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b32 v38, v114, off
	v_mov_b32_e32 v4, v58
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_974
; %bb.969:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_973
; %bb.970:                              ; %.preheader3.i.i.i33.i249.preheader
	s_mov_b32 s3, 0
.LBB15_971:                             ; %.preheader3.i.i.i33.i249
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_971
; %bb.972:                              ; %Flow2255
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_973:                             ; %Flow2257
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_974:                             ; %.loopexit4.i.i.i28.i228
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_976
; %bb.975:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_976:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_984
; %bb.977:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_980
; %bb.978:                              ; %.preheader1.i.i.i31.i247.preheader
	s_mov_b32 s8, 0
.LBB15_979:                             ; %.preheader1.i.i.i31.i247
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_979
.LBB15_980:                             ; %Flow2253
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_982
; %bb.981:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_982:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_984
; %bb.983:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_984:                             ; %Flow2254
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_985:                             ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_987
; %bb.986:                              ;   in Loop: Header=BB15_985 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_987:                             ;   in Loop: Header=BB15_985 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_989
; %bb.988:                              ;   in Loop: Header=BB15_985 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_990
.LBB15_989:                             ;   in Loop: Header=BB15_985 Depth=1
	s_mov_b32 s1, -1
.LBB15_990:                             ; %Flow2248
                                        ;   in Loop: Header=BB15_985 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_985
; %bb.991:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_995
; %bb.992:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_995
; %bb.993:                              ; %.preheader.i.i.i30.i246.preheader
	s_mov_b32 s0, 0
.LBB15_994:                             ; %.preheader.i.i.i30.i246
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_994
.LBB15_995:                             ; %__ockl_printf_begin.exit34.i230
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.28@rel32@lo+4
	s_addc_u32 s1, s1, .str.28@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v4, s59
	v_mov_b32_e32 v6, 0
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, v58
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v6
	v_mov_b32_e32 v7, 0
	v_mov_b32_e32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v6
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1001
; %bb.996:
	global_load_b64 v[3:4], v36, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[38:39] offset:40
	global_load_b64 v[7:8], v36, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v7, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v8, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v36, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[3:4]
	s_cbranch_execz .LBB15_1000
; %bb.997:                              ; %.preheader3.i.i.i40.i245.preheader
	v_mov_b32_e32 v1, 0
	s_mov_b32 s3, 0
.LBB15_998:                             ; %.preheader3.i.i.i40.i245
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	global_load_b64 v[9:10], v1, s[38:39]
	v_dual_mov_b32 v4, v7 :: v_dual_mov_b32 v5, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v2, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v2, 24, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, v8 :: v_dual_and_b32 v3, v3, v5
	v_mad_u64_u32 v[8:9], null, v3, 24, v[2:3]
	global_load_b64 v[2:3], v[7:8], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_998
; %bb.999:                              ; %Flow2241
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1000:                            ; %Flow2243
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_1001:                            ; %.loopexit4.i.i.i35.i232
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[9:10], v36, s[38:39] offset:40
	global_load_b128 v[1:4], v36, s[38:39]
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_1003
; %bb.1002:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s10, v2, vcc_lo
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, 0
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB15_1003:
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s8, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_mov_b32_e32 v7, 0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 6, v[6:7]
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_u32 v8, vcc_lo, v3, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, v4, v6, vcc_lo
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9
	v_dual_mov_b32 v39, v7 :: v_dual_mov_b32 v6, s11
	v_mov_b32_e32 v5, s10
	s_clause 0x3
	global_store_b128 v[8:9], v[36:39], off
	global_store_b128 v[8:9], v[3:6], off offset:16
	global_store_b128 v[8:9], v[3:6], off offset:32
	global_store_b128 v[8:9], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_1011
; %bb.1004:
	s_clause 0x1
	global_load_b64 v[12:13], v7, s[38:39] offset:32 glc
	global_load_b64 v[3:4], v7, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v7, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[12:13]
	s_cbranch_execz .LBB15_1007
; %bb.1005:                             ; %.preheader1.i.i.i38.i243.preheader
	s_mov_b32 s8, 0
.LBB15_1006:                            ; %.preheader1.i.i.i38.i243
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[8:9], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v7, v[3:6], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_1006
.LBB15_1007:                            ; %Flow2239
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB15_1009
; %bb.1008:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB15_1009:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB15_1011
; %bb.1010:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_1011:                            ; %Flow2240
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_1012:                            ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1014
; %bb.1013:                             ;   in Loop: Header=BB15_1012 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_1014:                            ;   in Loop: Header=BB15_1012 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_1016
; %bb.1015:                             ;   in Loop: Header=BB15_1012 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_1017
.LBB15_1016:                            ;   in Loop: Header=BB15_1012 Depth=1
	s_mov_b32 s1, -1
.LBB15_1017:                            ; %Flow2234
                                        ;   in Loop: Header=BB15_1012 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_1012
; %bb.1018:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1022
; %bb.1019:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[38:39] offset:40
	global_load_b64 v[7:8], v6, s[38:39] offset:24 glc
	global_load_b64 v[4:5], v6, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_1022
; %bb.1020:                             ; %.preheader.i.i.i37.i242.preheader
	s_mov_b32 s0, 0
.LBB15_1021:                            ; %.preheader.i.i.i37.i242
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_1021
.LBB15_1022:                            ; %__ockl_printf_append_args.exit41.i234
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v4, v58
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1028
; %bb.1023:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_1027
; %bb.1024:                             ; %.preheader3.i.i.i47.i241.preheader
	s_mov_b32 s3, 0
.LBB15_1025:                            ; %.preheader3.i.i.i47.i241
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1025
; %bb.1026:                             ; %Flow2227
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1027:                            ; %Flow2229
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_1028:                            ; %.loopexit4.i.i.i42.i235
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_1030
; %bb.1029:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_1030:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_1038
; %bb.1031:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_1034
; %bb.1032:                             ; %.preheader1.i.i.i45.i239.preheader
	s_mov_b32 s8, 0
.LBB15_1033:                            ; %.preheader1.i.i.i45.i239
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_1033
.LBB15_1034:                            ; %Flow2225
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_1036
; %bb.1035:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_1036:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_1038
; %bb.1037:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_1038:                            ; %Flow2226
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_1039:                            ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1041
; %bb.1040:                             ;   in Loop: Header=BB15_1039 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_1041:                            ;   in Loop: Header=BB15_1039 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_1043
; %bb.1042:                             ;   in Loop: Header=BB15_1039 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_1044
.LBB15_1043:                            ;   in Loop: Header=BB15_1039 Depth=1
	s_mov_b32 s1, -1
.LBB15_1044:                            ; %Flow2220
                                        ;   in Loop: Header=BB15_1039 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_1039
; %bb.1045:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1049
; %bb.1046:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_1049
; %bb.1047:                             ; %.preheader.i.i.i44.i238.preheader
	s_mov_b32 s0, 0
.LBB15_1048:                            ; %.preheader.i.i.i44.i238
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_1048
.LBB15_1049:                            ; %_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE13showBasicInfoEv.exit270
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.6@rel32@lo+4
	s_addc_u32 s1, s1, .str.6@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v4, s41
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v0, v58 :: v_dual_mov_b32 v1, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1055
; %bb.1050:
	global_load_b64 v[3:4], v36, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[38:39] offset:40
	global_load_b64 v[5:6], v36, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v36, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[1:2], v[3:4]
	s_cbranch_execz .LBB15_1054
; %bb.1051:                             ; %.preheader3.i.i.i.i301.preheader
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
.LBB15_1052:                            ; %.preheader3.i.i.i.i301
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[38:39] offset:40
	global_load_b64 v[8:9], v3, s[38:39]
	v_dual_mov_b32 v7, v2 :: v_dual_mov_b32 v6, v1
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[1:2], null, v4, 24, v[8:9]
	v_and_b32_e32 v8, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v8, 24, v[2:3]
	v_mov_b32_e32 v2, v4
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v3, v[4:7], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1052
; %bb.1053:                             ; %Flow2213
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1054:                            ; %Flow2215
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_1055:                            ; %.loopexit4.i.i.i.i271
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v36, s[38:39] offset:40
	global_load_b128 v[4:7], v36, s[38:39]
	v_readfirstlane_b32 s2, v1
	v_readfirstlane_b32 s3, v2
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_1057
; %bb.1056:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v2, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, 0
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[1:2], v[8:11], off offset:8
.LBB15_1057:
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s9, s8
	v_lshlrev_b64 v[2:3], 6, v[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v0, v2
	v_mov_b32_e32 v0, 33
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	v_mov_b32_e32 v2, v1
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v8, s8
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	v_mov_b32_e32 v11, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_1065
; %bb.1058:
	s_clause 0x1
	global_load_b64 v[12:13], v1, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v1, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[12:13]
	s_cbranch_execz .LBB15_1061
; %bb.1059:                             ; %.preheader1.i.i.i.i299.preheader
	v_mov_b32_e32 v10, 0
	s_mov_b32 s8, 0
.LBB15_1060:                            ; %.preheader1.i.i.i.i299
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_1060
.LBB15_1061:                            ; %Flow2211
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB15_1063
; %bb.1062:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB15_1063:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB15_1065
; %bb.1064:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_1065:                            ; %Flow2212
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_1066:                            ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1068
; %bb.1067:                             ;   in Loop: Header=BB15_1066 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_1068:                            ;   in Loop: Header=BB15_1066 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_1070
; %bb.1069:                             ;   in Loop: Header=BB15_1066 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_1071
.LBB15_1070:                            ;   in Loop: Header=BB15_1066 Depth=1
	s_mov_b32 s1, -1
.LBB15_1071:                            ; %Flow2206
                                        ;   in Loop: Header=BB15_1066 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_1066
; %bb.1072:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1076
; %bb.1073:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_1076
; %bb.1074:                             ; %.preheader.i.i.i.i298.preheader
	s_mov_b32 s0, 0
.LBB15_1075:                            ; %.preheader.i.i.i.i298
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_1075
.LBB15_1076:                            ; %__ockl_printf_begin.exit.i273
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.3@rel32@lo+4
	s_addc_u32 s1, s1, .str.3@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v4, s55
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v0, v58 :: v_dual_mov_b32 v1, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1082
; %bb.1077:
	global_load_b64 v[3:4], v36, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[38:39] offset:40
	global_load_b64 v[5:6], v36, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v36, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[1:2], v[3:4]
	s_cbranch_execz .LBB15_1081
; %bb.1078:                             ; %.preheader3.i.i.i6.i297.preheader
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
.LBB15_1079:                            ; %.preheader3.i.i.i6.i297
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[38:39] offset:40
	global_load_b64 v[8:9], v3, s[38:39]
	v_dual_mov_b32 v7, v2 :: v_dual_mov_b32 v6, v1
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[1:2], null, v4, 24, v[8:9]
	v_and_b32_e32 v8, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v8, 24, v[2:3]
	v_mov_b32_e32 v2, v4
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v3, v[4:7], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1079
; %bb.1080:                             ; %Flow2199
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1081:                            ; %Flow2201
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_1082:                            ; %.loopexit4.i.i.i1.i275
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v36, s[38:39] offset:40
	global_load_b128 v[4:7], v36, s[38:39]
	v_readfirstlane_b32 s2, v1
	v_readfirstlane_b32 s3, v2
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_1084
; %bb.1083:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v2, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, 0
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[1:2], v[8:11], off offset:8
.LBB15_1084:
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s9, s8
	v_lshlrev_b64 v[2:3], 6, v[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v0, v2
	v_mov_b32_e32 v0, 33
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	v_mov_b32_e32 v2, v1
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v8, s8
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	v_mov_b32_e32 v11, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_1092
; %bb.1085:
	s_clause 0x1
	global_load_b64 v[12:13], v1, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v1, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[12:13]
	s_cbranch_execz .LBB15_1088
; %bb.1086:                             ; %.preheader1.i.i.i4.i295.preheader
	v_mov_b32_e32 v10, 0
	s_mov_b32 s8, 0
.LBB15_1087:                            ; %.preheader1.i.i.i4.i295
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_1087
.LBB15_1088:                            ; %Flow2197
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB15_1090
; %bb.1089:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB15_1090:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB15_1092
; %bb.1091:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_1092:                            ; %Flow2198
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_1093:                            ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1095
; %bb.1094:                             ;   in Loop: Header=BB15_1093 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_1095:                            ;   in Loop: Header=BB15_1093 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_1097
; %bb.1096:                             ;   in Loop: Header=BB15_1093 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_1098
.LBB15_1097:                            ;   in Loop: Header=BB15_1093 Depth=1
	s_mov_b32 s1, -1
.LBB15_1098:                            ; %Flow2192
                                        ;   in Loop: Header=BB15_1093 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_1093
; %bb.1099:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1103
; %bb.1100:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_1103
; %bb.1101:                             ; %.preheader.i.i.i3.i294.preheader
	s_mov_b32 s0, 0
.LBB15_1102:                            ; %.preheader.i.i.i3.i294
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_1102
.LBB15_1103:                            ; %__ockl_printf_begin.exit7.i277
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.4@rel32@lo+4
	s_addc_u32 s1, s1, .str.4@rel32@hi+12
	v_dual_mov_b32 v115, 0 :: v_dual_mov_b32 v2, s0
	v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v4, s54
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v6, 1
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, 16
	v_mov_b32_e32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, 16
	v_mov_b32_e32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, 16
	v_mov_b32_e32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, v58 :: v_dual_mov_b32 v1, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1109
; %bb.1104:
	global_load_b64 v[3:4], v115, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v115, s[38:39] offset:40
	global_load_b64 v[5:6], v115, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v115, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[1:2], v[3:4]
	s_cbranch_execz .LBB15_1108
; %bb.1105:                             ; %.preheader3.i.i.i13.i293.preheader
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
.LBB15_1106:                            ; %.preheader3.i.i.i13.i293
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[38:39] offset:40
	global_load_b64 v[8:9], v3, s[38:39]
	v_dual_mov_b32 v7, v2 :: v_dual_mov_b32 v6, v1
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[1:2], null, v4, 24, v[8:9]
	v_and_b32_e32 v8, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v8, 24, v[2:3]
	v_mov_b32_e32 v2, v4
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v3, v[4:7], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1106
; %bb.1107:                             ; %Flow2185
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1108:                            ; %Flow2187
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_1109:                            ; %.loopexit4.i.i.i8.i279
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v115, s[38:39] offset:40
	global_load_b128 v[4:7], v115, s[38:39]
	v_readfirstlane_b32 s2, v1
	v_readfirstlane_b32 s3, v2
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_1111
; %bb.1110:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v2, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, 0
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[1:2], v[8:11], off offset:8
.LBB15_1111:
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s9, s8
	v_lshlrev_b64 v[2:3], 6, v[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v0, v2
	v_mov_b32_e32 v0, 33
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	v_mov_b32_e32 v2, v1
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v8, s8
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	v_mov_b32_e32 v11, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_1119
; %bb.1112:
	s_clause 0x1
	global_load_b64 v[12:13], v1, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v1, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[12:13]
	s_cbranch_execz .LBB15_1115
; %bb.1113:                             ; %.preheader1.i.i.i11.i291.preheader
	v_mov_b32_e32 v10, 0
	s_mov_b32 s8, 0
.LBB15_1114:                            ; %.preheader1.i.i.i11.i291
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_1114
.LBB15_1115:                            ; %Flow2183
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB15_1117
; %bb.1116:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB15_1117:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB15_1119
; %bb.1118:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_1119:                            ; %Flow2184
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_1120:                            ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1122
; %bb.1121:                             ;   in Loop: Header=BB15_1120 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_1122:                            ;   in Loop: Header=BB15_1120 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_1124
; %bb.1123:                             ;   in Loop: Header=BB15_1120 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_1125
.LBB15_1124:                            ;   in Loop: Header=BB15_1120 Depth=1
	s_mov_b32 s1, -1
.LBB15_1125:                            ; %Flow2178
                                        ;   in Loop: Header=BB15_1120 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_1120
; %bb.1126:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1130
; %bb.1127:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_1130
; %bb.1128:                             ; %.preheader.i.i.i10.i290.preheader
	s_mov_b32 s0, 0
.LBB15_1129:                            ; %.preheader.i.i.i10.i290
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_1129
.LBB15_1130:                            ; %__ockl_printf_begin.exit14.i281
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.5@rel32@lo+4
	s_addc_u32 s1, s1, .str.5@rel32@hi+12
	v_dual_mov_b32 v115, 0 :: v_dual_mov_b32 v2, s0
	v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v4, s53
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v6, 1
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v0, s46 :: v_dual_mov_b32 v1, s51
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE16showLevelQtyInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, s46
	v_mov_b32_e32 v1, s51
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE20showPendingOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, s46
	v_mov_b32_e32 v1, s51
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18showAckedOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, s46
	v_mov_b32_e32 v1, s51
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE21showCanceledOrderInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, s46 :: v_dual_mov_b32 v1, s51
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE14showUpdateInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, v58 :: v_dual_mov_b32 v1, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1136
; %bb.1131:
	global_load_b64 v[3:4], v115, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v115, s[38:39] offset:40
	global_load_b64 v[5:6], v115, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v115, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[1:2], v[3:4]
	s_cbranch_execz .LBB15_1135
; %bb.1132:                             ; %.preheader3.i.i.i20.i289.preheader
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
.LBB15_1133:                            ; %.preheader3.i.i.i20.i289
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[38:39] offset:40
	global_load_b64 v[8:9], v3, s[38:39]
	v_dual_mov_b32 v7, v2 :: v_dual_mov_b32 v6, v1
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[1:2], null, v4, 24, v[8:9]
	v_and_b32_e32 v8, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v8, 24, v[2:3]
	v_mov_b32_e32 v2, v4
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v3, v[4:7], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1133
; %bb.1134:                             ; %Flow2171
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1135:                            ; %Flow2173
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_1136:                            ; %.loopexit4.i.i.i15.i283
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v115, s[38:39] offset:40
	global_load_b128 v[4:7], v115, s[38:39]
	v_readfirstlane_b32 s2, v1
	v_readfirstlane_b32 s3, v2
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_1138
; %bb.1137:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v2, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, 0
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[1:2], v[8:11], off offset:8
.LBB15_1138:
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s9, s8
	v_lshlrev_b64 v[2:3], 6, v[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v0, v2
	v_mov_b32_e32 v0, 33
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	v_mov_b32_e32 v2, v1
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v8, s8
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	v_mov_b32_e32 v11, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_1146
; %bb.1139:
	s_clause 0x1
	global_load_b64 v[12:13], v1, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v1, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[12:13]
	s_cbranch_execz .LBB15_1142
; %bb.1140:                             ; %.preheader1.i.i.i18.i287.preheader
	v_mov_b32_e32 v10, 0
	s_mov_b32 s8, 0
.LBB15_1141:                            ; %.preheader1.i.i.i18.i287
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_1141
.LBB15_1142:                            ; %Flow2169
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB15_1144
; %bb.1143:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB15_1144:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB15_1146
; %bb.1145:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_1146:                            ; %Flow2170
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_1147:                            ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1149
; %bb.1148:                             ;   in Loop: Header=BB15_1147 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_1149:                            ;   in Loop: Header=BB15_1147 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_1151
; %bb.1150:                             ;   in Loop: Header=BB15_1147 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_1152
.LBB15_1151:                            ;   in Loop: Header=BB15_1147 Depth=1
	s_mov_b32 s1, -1
.LBB15_1152:                            ; %Flow2164
                                        ;   in Loop: Header=BB15_1147 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_1147
; %bb.1153:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1157
; %bb.1154:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_1157
; %bb.1155:                             ; %.preheader.i.i.i17.i286.preheader
	s_mov_b32 s0, 0
.LBB15_1156:                            ; %.preheader.i.i.i17.i286
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_1156
.LBB15_1157:                            ; %_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE17showOrderBookInfoEv.exit302
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.6@rel32@lo+4
	s_addc_u32 s1, s1, .str.6@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v4, s41
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v0, v58 :: v_dual_mov_b32 v1, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1163
; %bb.1158:
	global_load_b64 v[3:4], v36, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[38:39] offset:40
	global_load_b64 v[5:6], v36, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v36, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[1:2], v[3:4]
	s_cbranch_execz .LBB15_1162
; %bb.1159:                             ; %.preheader3.i.i.i308.preheader
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
.LBB15_1160:                            ; %.preheader3.i.i.i308
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[38:39] offset:40
	global_load_b64 v[8:9], v3, s[38:39]
	v_dual_mov_b32 v7, v2 :: v_dual_mov_b32 v6, v1
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[1:2], null, v4, 24, v[8:9]
	v_and_b32_e32 v8, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v8, 24, v[2:3]
	v_mov_b32_e32 v2, v4
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v3, v[4:7], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1160
; %bb.1161:                             ; %Flow2157
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1162:                            ; %Flow2159
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_1163:                            ; %.loopexit4.i.i.i303
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v36, s[38:39] offset:40
	global_load_b128 v[4:7], v36, s[38:39]
	v_readfirstlane_b32 s2, v1
	v_readfirstlane_b32 s3, v2
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_1165
; %bb.1164:
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, 0
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v2, vcc_lo, s8, v5, vcc_lo
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[1:2], v[8:11], off offset:8
.LBB15_1165:
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s9, s8
	v_lshlrev_b64 v[2:3], 6, v[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v0, v2
	v_mov_b32_e32 v0, 33
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	v_mov_b32_e32 v2, v1
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v8, s8
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	v_mov_b32_e32 v11, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_1173
; %bb.1166:
	s_clause 0x1
	global_load_b64 v[12:13], v1, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v1, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[12:13]
	s_cbranch_execz .LBB15_1169
; %bb.1167:                             ; %.preheader1.i.i.i306.preheader
	v_mov_b32_e32 v10, 0
	s_mov_b32 s8, 0
.LBB15_1168:                            ; %.preheader1.i.i.i306
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_1168
.LBB15_1169:                            ; %Flow2155
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB15_1171
; %bb.1170:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB15_1171:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB15_1173
; %bb.1172:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_1173:                            ; %Flow2156
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_1174:                            ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1176
; %bb.1175:                             ;   in Loop: Header=BB15_1174 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_1176:                            ;   in Loop: Header=BB15_1174 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_1178
; %bb.1177:                             ;   in Loop: Header=BB15_1174 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_1179
.LBB15_1178:                            ;   in Loop: Header=BB15_1174 Depth=1
	s_mov_b32 s1, -1
.LBB15_1179:                            ; %Flow2150
                                        ;   in Loop: Header=BB15_1174 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_1174
; %bb.1180:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1184
; %bb.1181:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_1184
; %bb.1182:                             ; %.preheader.i.i.i305.preheader
	s_mov_b32 s0, 0
.LBB15_1183:                            ; %.preheader.i.i.i305
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_1183
.LBB15_1184:                            ; %__ockl_printf_begin.exit309
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str@rel32@lo+4
	s_addc_u32 s1, s1, .str@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s56 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v0, 3 :: v_dual_mov_b32 v1, 23
	v_dual_mov_b32 v2, 4 :: v_dual_mov_b32 v3, 2
	s_movk_i32 s0, 0x5fe0
	v_dual_mov_b32 v4, 7 :: v_dual_mov_b32 v5, 5
	s_mov_b32 s2, 0
	scratch_store_b128 off, v[0:3], s0 offset:96
	v_dual_mov_b32 v2, 9 :: v_dual_mov_b32 v1, 1
	s_mov_b32 s0, 0x3fa66666
	s_mov_b32 s1, 0x3e4ccccd
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v3, v2
	v_dual_mov_b32 v7, s1 :: v_dual_mov_b32 v6, s0
	s_movk_i32 s0, 0x5fe0
	s_clause 0x1
	scratch_store_b64 off, v[4:5], s0 offset:128
	scratch_store_b128 off, v[0:3], s0 offset:112
	s_mov_b64 s[0:1], 11
	s_clause 0x1
	scratch_store_b64 v72, v[6:7], off
	scratch_store_b64 v73, v[6:7], off
.LBB15_1185:                            ; %.lr.ph.i.i.i.i.i.i.i.i.i.i310
                                        ; =>This Inner Loop Header: Depth=1
	s_add_i32 s3, s2, 0x6040
	v_add_nc_u32_e64 v1, s2, 16
	scratch_load_b32 v0, off, s3
	s_add_i32 s2, s2, 4
	s_add_u32 s0, s0, -1
	s_addc_u32 s1, s1, -1
	v_add_nc_u32_e32 v1, 0x5f78, v1
	v_cmp_gt_u64_e64 s3, s[0:1], 1
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	scratch_store_b32 v1, v0, off
	s_cbranch_vccnz .LBB15_1185
; %bb.1186:                             ; %_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE11getBookInfoEPiRKiS4_RKf.exit.i314
	v_mov_b32_e32 v0, 0x408
	v_mov_b32_e32 v1, 0x407
	v_dual_mov_b32 v2, 0x4480f000 :: v_dual_mov_b32 v3, v42
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@hi+12
	s_clause 0x1
	scratch_store_b64 v88, v[0:1], off
	scratch_store_b32 v113, v2, off
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, s47
	v_mov_b32_e32 v2, v44
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v3, v46
	v_dual_mov_b32 v2, v45 :: v_dual_mov_b32 v5, v42
	v_mov_b32_e32 v4, v44
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	scratch_load_b64 v[0:1], v100, off
	v_mov_b32_e32 v2, 16
	s_mov_b32 s3, exec_lo
	v_add_nc_u32_e32 v4, 0xfc0, v2
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v4, v0, 0xc88
	s_clause 0x1
	scratch_load_b32 v6, v0, off
	scratch_load_u8 v0, v91, off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, 0xff, v0
	v_cmpx_ne_u32_e64 v6, v1
	s_cbranch_execz .LBB15_1205
; %bb.1187:                             ; %.lr.ph.i.i318
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_eq_u16_e32 vcc_lo, 0, v3
	v_cmp_ne_u16_e64 s0, 0, v3
	v_mov_b32_e32 v5, -1
	s_mov_b32 s4, 0
	s_movk_i32 s5, 0x2f54
	s_movk_i32 s6, 0x2f7c
.LBB15_1188:                            ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[0:1], null, v6, 28, v[60:61]
	v_lshlrev_b32_e32 v1, 2, v6
	s_clause 0x1
	scratch_load_b32 v8, v0, off
	scratch_load_b32 v0, v99, off
	v_add3_u32 v7, v4, v1, 0xc88
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e64 s1, v8, v0
	v_cmp_lt_i32_e64 s2, v8, v0
                                        ; implicit-def: $vgpr0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s1, vcc_lo, s1
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s2
	s_xor_b32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB15_1196
; %bb.1189:                             ;   in Loop: Header=BB15_1188 Depth=1
	scratch_load_b32 v0, v93, off
	v_mad_u64_u32 v[9:10], null, v6, 28, v[60:61]
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, 16, v0, s5
	s_clause 0x1
	scratch_load_b32 v2, v9, off offset:4
	scratch_load_b32 v9, v0, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v9, v9, v2
	scratch_store_b32 v0, v9, off
	s_clause 0x1
	scratch_load_b32 v0, v93, off
	scratch_load_b32 v9, v75, off
	s_waitcnt vmcnt(1)
	v_sub_nc_u32_e32 v0, v8, v0
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v9, v9, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 2, v0
	scratch_store_b32 v75, v9, off
	v_add3_u32 v0, 16, v0, s6
	scratch_load_b32 v9, v0, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v9, v9, v2
	scratch_store_b32 v0, v9, off
	scratch_load_b64 v[9:10], v106, off
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v0, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v2, v8, v[0:1]
	v_dual_mov_b32 v9, v10 :: v_dual_add_nc_u32 v8, v9, v2
	scratch_store_b64 v106, v[8:9], off
	scratch_load_b32 v0, v7, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s7, -1, v0
	v_cmpx_ne_u32_e32 -1, v0
	s_cbranch_execz .LBB15_1193
; %bb.1190:                             ;   in Loop: Header=BB15_1188 Depth=1
	v_add3_u32 v1, v4, v1, 0xaf0
	s_mov_b32 s10, -1
	s_mov_b32 s9, exec_lo
	scratch_load_b32 v2, v1, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v2
	s_cbranch_execz .LBB15_1192
; %bb.1191:                             ;   in Loop: Header=BB15_1188 Depth=1
	v_lshlrev_b32_e32 v8, 2, v0
	v_lshlrev_b32_e32 v9, 2, v2
	s_xor_b32 s10, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v8, v4, v8, 0xaf0
	v_add3_u32 v9, v4, v9, 0xc88
	s_clause 0x3
	scratch_store_b32 v8, v2, off
	scratch_store_b32 v9, v0, off
	scratch_store_b32 v7, v5, off
	scratch_store_b32 v1, v5, off
	s_clause 0x1
	scratch_load_b32 v1, v102, off
	scratch_load_b32 v2, v83, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v1, -1, v1
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v2, 2, v85
	s_clause 0x1
	scratch_store_b32 v102, v1, off
	scratch_store_b32 v2, v6, off
	scratch_load_b32 v1, v83, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 1, v1
	scratch_store_b32 v83, v1, off
.LBB15_1192:                            ; %Flow2135
                                        ;   in Loop: Header=BB15_1188 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s7, exec_lo
	s_and_b32 s7, s10, exec_lo
	s_or_b32 s7, s1, s7
.LBB15_1193:                            ; %Flow2134
                                        ;   in Loop: Header=BB15_1188 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s1, s7
	s_cbranch_execz .LBB15_1195
; %bb.1194:                             ;   in Loop: Header=BB15_1188 Depth=1
	scratch_load_b32 v0, v100, off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v4, v0, 0xc88
	scratch_load_b32 v0, v0, off
.LBB15_1195:                            ; %Flow2136
                                        ;   in Loop: Header=BB15_1188 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr6
.LBB15_1196:                            ; %Flow2141
                                        ;   in Loop: Header=BB15_1188 Depth=1
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB15_1204
; %bb.1197:                             ;   in Loop: Header=BB15_1188 Depth=1
	scratch_load_b32 v9, v93, off
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[0:1], null, v6, 28, v[60:61]
	s_mov_b32 s7, exec_lo
	scratch_load_b64 v[1:2], v0, off offset:8
	s_waitcnt vmcnt(1)
	v_sub_nc_u32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v8, v8, 2, v90
	scratch_load_b32 v9, v8, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v2, v2, v1
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v9, v2
	s_cbranch_execz .LBB15_1203
; %bb.1198:                             ;   in Loop: Header=BB15_1188 Depth=1
	s_mov_b32 s8, exec_lo
                                        ; implicit-def: $vgpr10
	v_cmpx_le_i32_e64 v9, v2
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB15_1200
; %bb.1199:                             ;   in Loop: Header=BB15_1188 Depth=1
	v_ashrrev_i32_e32 v10, 31, v2
	v_mul_lo_u32 v1, v9, v1
	v_add_nc_u32_e32 v0, 8, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v10
	v_xor_b32_e32 v2, v2, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v11, v2
	v_sub_nc_u32_e32 v12, 0, v2
	v_rcp_iflag_f32_e32 v11, v11
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v11, 0x4f7ffffe, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v11, v11
	v_mul_lo_u32 v9, v12, v11
	v_ashrrev_i32_e32 v12, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v1, v1, v12
	v_xor_b32_e32 v10, v12, v10
	v_mul_hi_u32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v1, v12
	v_add_nc_u32_e32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v9, v1, v9
	v_mul_lo_u32 v11, v9, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v1, v11
	v_add_nc_u32_e32 v11, 1, v9
	v_sub_nc_u32_e32 v13, v1, v2
	v_cmp_ge_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v9, v9, v11, s1
	v_cndmask_b32_e64 v1, v1, v13, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, 1, v9
	v_cmp_ge_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v1, v9, v11, s1
                                        ; implicit-def: $vgpr9
	v_xor_b32_e32 v1, v1, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v10
	scratch_store_b32 v0, v1, off
	scratch_load_b32 v0, v8, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v10, v0, v1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB15_1200:                            ; %Flow2138
                                        ;   in Loop: Header=BB15_1188 Depth=1
	s_and_not1_saveexec_b32 s1, s8
; %bb.1201:                             ;   in Loop: Header=BB15_1188 Depth=1
	v_sub_nc_u32_e32 v10, v9, v1
; %bb.1202:                             ; %.sink.split.i.i.i364
                                        ;   in Loop: Header=BB15_1188 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[0:1], null, v6, 28, v[60:61]
	scratch_store_b32 v0, v10, off offset:12
.LBB15_1203:                            ; %Flow2140
                                        ;   in Loop: Header=BB15_1188 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	scratch_load_b32 v0, v7, off
.LBB15_1204:                            ; %Flow2142
                                        ;   in Loop: Header=BB15_1188 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	scratch_load_b32 v1, v101, off
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v6, v0
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s1, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s4, s1, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB15_1188
.LBB15_1205:                            ; %Flow2144
	s_or_b32 exec_lo, exec_lo, s3
	s_clause 0x2
	scratch_load_b96 v[0:2], v106, off
	scratch_load_b96 v[5:7], v63, off
	scratch_load_b32 v4, v94, off
	v_cmp_eq_u16_e32 vcc_lo, 0, v3
	v_mov_b32_e32 v8, 0
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v3, 10, v2
	v_sub_nc_u32_e32 v9, 0, v0
	v_sub_nc_u32_e32 v10, 0, v1
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v6, v6, v0
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e64 s0, v4, v3
	v_cndmask_b32_e32 v9, v9, v0, vcc_lo
	v_cndmask_b32_e32 v1, v1, v10, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, v7, v9
	v_add_nc_u32_e32 v5, v5, v1
	v_mov_b32_e32 v9, v8
	s_and_b32 s0, vcc_lo, s0
	s_clause 0x1
	scratch_store_b96 v63, v[5:7], off
	scratch_store_b64 v106, v[8:9], off
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB15_1210
; %bb.1206:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit.i361.preheader
	v_dual_mov_b32 v5, 16 :: v_dual_lshlrev_b32 v0, 2, v4
	v_lshlrev_b32_e32 v1, 2, v2
                                        ; implicit-def: $sgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v0, v1
	v_add_nc_u32_e32 v0, 1, v4
	v_add3_u32 v1, v1, v5, 0x2f54
.LBB15_1207:                            ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit.i361
                                        ; =>This Inner Loop Header: Depth=1
	scratch_load_b32 v4, v1, off
	s_or_b32 s3, s3, exec_lo
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_1209
; %bb.1208:                             ;   in Loop: Header=BB15_1207 Depth=1
	v_cmp_lt_i32_e32 vcc_lo, v0, v2
	v_cmp_ge_i32_e64 s0, v0, v3
	scratch_store_b32 v94, v0, off
	v_add_nc_u32_e32 v0, 1, v0
	v_add_nc_u32_e32 v1, 4, v1
	s_and_not1_b32 s3, s3, exec_lo
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s3, s3, s0
.LBB15_1209:                            ; %Flow2129
                                        ;   in Loop: Header=BB15_1207 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s3
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB15_1207
.LBB15_1210:                            ; %Flow2131
	s_or_b32 exec_lo, exec_lo, s2
	v_dual_mov_b32 v0, s46 :: v_dual_mov_b32 v1, s51
	v_dual_mov_b32 v2, v44 :: v_dual_mov_b32 v3, v42
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE19updatePendingOrdersEPi@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v2, v56 :: v_dual_mov_b32 v3, v47
	v_dual_mov_b32 v4, v44 :: v_dual_mov_b32 v5, v42
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo9OrderListILi100ELi10EE18updateCancelOrdersERKiPi@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	scratch_load_b64 v[0:1], v96, off
	v_mov_b32_e32 v2, 16
	s_mov_b32 s3, exec_lo
	v_add_nc_u32_e32 v4, 0x3f70, v2
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v4, v0, 0xc88
	s_clause 0x1
	scratch_load_b32 v7, v0, off
	scratch_load_u8 v0, v92, off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, 0xff, v0
	v_cmpx_ne_u32_e64 v7, v1
	s_cbranch_execz .LBB15_1229
; %bb.1211:                             ; %.lr.ph.i9.i339
	s_movk_i32 s1, 0x2fb0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_eq_u16_e32 vcc_lo, 0, v3
	v_cmp_ne_u16_e64 s0, 0, v3
	v_add_nc_u32_e64 v5, s1, 16
	v_mov_b32_e32 v6, -1
	s_mov_b32 s4, 0
.LBB15_1212:                            ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[0:1], null, v7, 28, v[59:60]
	v_lshlrev_b32_e32 v1, 2, v7
	s_clause 0x1
	scratch_load_b32 v9, v0, off
	scratch_load_b32 v0, v88, off
	v_add3_u32 v8, v4, v1, 0xc88
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e64 s1, v9, v0
	v_cmp_lt_i32_e64 s2, v9, v0
                                        ; implicit-def: $vgpr0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s1, vcc_lo, s1
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s2
	s_xor_b32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB15_1220
; %bb.1213:                             ;   in Loop: Header=BB15_1212 Depth=1
	scratch_load_b32 v0, v95, off
	v_mad_u64_u32 v[10:11], null, v7, 28, v[59:60]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v9, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, v5, v0, 0x2f54
	s_clause 0x1
	scratch_load_b32 v2, v10, off offset:4
	scratch_load_b32 v10, v0, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v10, v10, v2
	scratch_store_b32 v0, v10, off
	s_clause 0x1
	scratch_load_b32 v0, v95, off
	scratch_load_b32 v10, v78, off
	s_waitcnt vmcnt(1)
	v_sub_nc_u32_e32 v0, v9, v0
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v10, v10, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 2, v0
	scratch_store_b32 v78, v10, off
	v_add3_u32 v0, v5, v0, 0x2f7c
	scratch_load_b32 v10, v0, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v10, v10, v2
	scratch_store_b32 v0, v10, off
	scratch_load_b64 v[10:11], v107, off
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v0, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v2, v9, v[0:1]
	v_dual_mov_b32 v10, v11 :: v_dual_add_nc_u32 v9, v10, v2
	scratch_store_b64 v107, v[9:10], off
	scratch_load_b32 v0, v8, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s5, -1, v0
	v_cmpx_ne_u32_e32 -1, v0
	s_cbranch_execz .LBB15_1217
; %bb.1214:                             ;   in Loop: Header=BB15_1212 Depth=1
	v_add3_u32 v1, v4, v1, 0xaf0
	s_mov_b32 s8, -1
	s_mov_b32 s7, exec_lo
	scratch_load_b32 v2, v1, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v2
	s_cbranch_execz .LBB15_1216
; %bb.1215:                             ;   in Loop: Header=BB15_1212 Depth=1
	v_lshlrev_b32_e32 v9, 2, v0
	v_lshlrev_b32_e32 v10, 2, v2
	s_xor_b32 s8, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v9, v4, v9, 0xaf0
	v_add3_u32 v10, v4, v10, 0xc88
	s_clause 0x3
	scratch_store_b32 v9, v2, off
	scratch_store_b32 v10, v0, off
	scratch_store_b32 v8, v6, off
	scratch_store_b32 v1, v6, off
	s_clause 0x1
	scratch_load_b32 v1, v98, off
	scratch_load_b32 v2, v82, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v1, -1, v1
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v2, 2, v84
	s_clause 0x1
	scratch_store_b32 v98, v1, off
	scratch_store_b32 v2, v7, off
	scratch_load_b32 v1, v82, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 1, v1
	scratch_store_b32 v82, v1, off
.LBB15_1216:                            ; %Flow2119
                                        ;   in Loop: Header=BB15_1212 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s5, exec_lo
	s_and_b32 s5, s8, exec_lo
	s_or_b32 s5, s1, s5
.LBB15_1217:                            ; %Flow2118
                                        ;   in Loop: Header=BB15_1212 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s1, s5
	s_cbranch_execz .LBB15_1219
; %bb.1218:                             ;   in Loop: Header=BB15_1212 Depth=1
	scratch_load_b32 v0, v96, off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v4, v0, 0xc88
	scratch_load_b32 v0, v0, off
.LBB15_1219:                            ; %Flow2120
                                        ;   in Loop: Header=BB15_1212 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr7
.LBB15_1220:                            ; %Flow2125
                                        ;   in Loop: Header=BB15_1212 Depth=1
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB15_1228
; %bb.1221:                             ;   in Loop: Header=BB15_1212 Depth=1
	scratch_load_b32 v10, v95, off
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[0:1], null, v7, 28, v[59:60]
	s_mov_b32 s5, exec_lo
	scratch_load_b64 v[1:2], v0, off offset:8
	s_waitcnt vmcnt(1)
	v_sub_nc_u32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v9, v9, 2, v90
	scratch_load_b32 v10, v9, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v2, v2, v1
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v10, v2
	s_cbranch_execz .LBB15_1227
; %bb.1222:                             ;   in Loop: Header=BB15_1212 Depth=1
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr11
	v_cmpx_le_i32_e64 v10, v2
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB15_1224
; %bb.1223:                             ;   in Loop: Header=BB15_1212 Depth=1
	v_ashrrev_i32_e32 v11, 31, v2
	v_mul_lo_u32 v1, v10, v1
	v_add_nc_u32_e32 v0, 8, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v11
	v_xor_b32_e32 v2, v2, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v12, v2
	v_sub_nc_u32_e32 v13, 0, v2
	v_rcp_iflag_f32_e32 v12, v12
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v12, 0x4f7ffffe, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v12, v12
	v_mul_lo_u32 v10, v13, v12
	v_ashrrev_i32_e32 v13, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v1, v1, v13
	v_xor_b32_e32 v11, v13, v11
	v_mul_hi_u32 v10, v12, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v1, v13
	v_add_nc_u32_e32 v10, v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v10, v1, v10
	v_mul_lo_u32 v12, v10, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v1, v12
	v_add_nc_u32_e32 v12, 1, v10
	v_sub_nc_u32_e32 v14, v1, v2
	v_cmp_ge_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v10, v10, v12, s1
	v_cndmask_b32_e64 v1, v1, v14, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v12, 1, v10
	v_cmp_ge_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v1, v10, v12, s1
                                        ; implicit-def: $vgpr10
	v_xor_b32_e32 v1, v1, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v11
	scratch_store_b32 v0, v1, off
	scratch_load_b32 v0, v9, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v11, v0, v1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB15_1224:                            ; %Flow2122
                                        ;   in Loop: Header=BB15_1212 Depth=1
	s_and_not1_saveexec_b32 s1, s6
; %bb.1225:                             ;   in Loop: Header=BB15_1212 Depth=1
	v_sub_nc_u32_e32 v11, v10, v1
; %bb.1226:                             ; %.sink.split.i.i21.i358
                                        ;   in Loop: Header=BB15_1212 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[0:1], null, v7, 28, v[59:60]
	scratch_store_b32 v0, v11, off offset:12
.LBB15_1227:                            ; %Flow2124
                                        ;   in Loop: Header=BB15_1212 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	scratch_load_b32 v0, v8, off
.LBB15_1228:                            ; %Flow2126
                                        ;   in Loop: Header=BB15_1212 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	scratch_load_b32 v1, v97, off
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v7, v0
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s1, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s4, s1, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB15_1212
.LBB15_1229:                            ; %Flow2128
	s_or_b32 exec_lo, exec_lo, s3
	s_clause 0x2
	scratch_load_b96 v[0:2], v107, off
	scratch_load_b96 v[5:7], v63, off
	scratch_load_b32 v4, v77, off
	v_cmp_eq_u16_e32 vcc_lo, 0, v3
	v_mov_b32_e32 v8, 0
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v3, 10, v2
	v_sub_nc_u32_e32 v9, 0, v0
	v_sub_nc_u32_e32 v10, 0, v1
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v6, v6, v0
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e64 s0, v4, v3
	v_cndmask_b32_e32 v9, v9, v0, vcc_lo
	v_cndmask_b32_e32 v1, v1, v10, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, v7, v9
	v_add_nc_u32_e32 v5, v5, v1
	v_mov_b32_e32 v9, v8
	s_and_b32 s2, vcc_lo, s0
	s_clause 0x1
	scratch_store_b96 v63, v[5:7], off
	scratch_store_b64 v107, v[8:9], off
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB15_1235
; %bb.1230:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit29.i357.preheader
	v_lshlrev_b32_e32 v0, 2, v4
	v_lshlrev_b32_e32 v1, 2, v2
                                        ; implicit-def: $sgpr2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v1
	v_mov_b32_e32 v1, 16
	v_add3_u32 v0, v0, v1, 0x5f04
.LBB15_1231:                            ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit29.i357
                                        ; =>This Inner Loop Header: Depth=1
	scratch_load_b32 v1, v0, off
	s_or_b32 s2, s2, exec_lo
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB15_1233
; %bb.1232:                             ;   in Loop: Header=BB15_1231 Depth=1
	v_add_nc_u32_e32 v1, -1, v4
	v_cmp_le_i32_e32 vcc_lo, v4, v2
	v_add_nc_u32_e32 v0, -4, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_mov_b32_e32 v4, v1
	s_and_b32 s4, vcc_lo, exec_lo
	scratch_store_b32 v77, v1, off
	s_or_b32 s2, s2, s4
.LBB15_1233:                            ; %Flow2113
                                        ;   in Loop: Header=BB15_1231 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, exec_lo, s2
	s_or_b32 s1, s3, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB15_1231
; %bb.1234:                             ; %Flow2114
	s_or_b32 exec_lo, exec_lo, s1
.LBB15_1235:                            ; %Flow2115
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b64 v[0:1], off, off offset:4036
	scratch_load_b64 v[7:8], v88, off
	v_mov_b32_e32 v2, 16
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v9, 4, v7
	scratch_store_b64 v89, v[7:8], off
	v_add3_u32 v0, v2, v0, 0xc88
	scratch_load_b32 v5, v0, off
	v_add_nc_u32_e32 v0, 1, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_max_i32_e32 v8, v7, v0
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v5, v1
	s_cbranch_execz .LBB15_1254
; %bb.1236:                             ; %.lr.ph.i.i369
	scratch_load_b64 v[0:1], v72, off
	s_mov_b32 s3, 0
	s_mov_b32 s2, 16
	s_movk_i32 s4, 0x2f54
	s_movk_i32 s5, 0xaf0
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v4, -1 :: v_dual_add_f32 v3, v0, v1
.LBB15_1237:                            ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[0:1], null, v5, 28, s[2:3]
	v_dual_mov_b32 v6, v5 :: v_dual_lshlrev_b32 v1, 2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add3_u32 v10, v2, v1, 0xc88
	scratch_load_b32 v11, v0, off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v11, v8
	v_cmp_le_i32_e64 s0, v11, v9
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s6, s0
	s_xor_b32 s0, exec_lo, s6
	s_cbranch_execz .LBB15_1239
; %bb.1238:                             ;   in Loop: Header=BB15_1237 Depth=1
	scratch_load_b32 v5, v10, off
                                        ; implicit-def: $vgpr0_vgpr1
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr10
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr1
.LBB15_1239:                            ; %Flow2108
                                        ;   in Loop: Header=BB15_1237 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB15_1253
; %bb.1240:                             ;   in Loop: Header=BB15_1237 Depth=1
	scratch_load_b32 v5, v93, off
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v5, v11, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v5, 2, v5
	v_add3_u32 v5, 16, v5, s4
	scratch_load_b32 v11, v5, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v11
	s_cbranch_execz .LBB15_1242
; %bb.1241:                             ;   in Loop: Header=BB15_1237 Depth=1
	v_sub_nc_u32_e32 v11, 0, v11
	scratch_store_b32 v5, v11, off
.LBB15_1242:                            ;   in Loop: Header=BB15_1237 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mad_u64_u32 v[11:12], null, v6, 28, s[2:3]
	scratch_load_b32 v5, v11, off offset:20
	s_waitcnt vmcnt(0)
	v_cmp_nlt_f32_e32 vcc_lo, v5, v3
                                        ; implicit-def: $vgpr5
	s_and_saveexec_b32 s6, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB15_1250
; %bb.1243:                             ;   in Loop: Header=BB15_1237 Depth=1
	s_clause 0x1
	scratch_load_b64 v[11:12], v0, off
	scratch_load_b32 v0, v93, off
	v_mad_u64_u32 v[13:14], null, v6, 28, s[2:3]
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, 16, v0, s4
	scratch_load_b32 v5, v0, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v5, v12
	scratch_store_b32 v0, v5, off
	s_clause 0x1
	scratch_load_b32 v0, v13, off offset:4
	scratch_load_b32 v5, v75, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v5, v0
	scratch_store_b32 v75, v0, off
	scratch_load_b32 v5, v10, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s7, -1, v5
	v_cmpx_ne_u32_e32 -1, v5
	s_cbranch_execz .LBB15_1247
; %bb.1244:                             ;   in Loop: Header=BB15_1237 Depth=1
	v_add3_u32 v0, 16, v1, s5
	s_mov_b32 s10, -1
	s_mov_b32 s9, exec_lo
	scratch_load_b32 v1, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v1
	s_cbranch_execz .LBB15_1246
; %bb.1245:                             ;   in Loop: Header=BB15_1237 Depth=1
	v_lshlrev_b32_e32 v11, 2, v5
	v_lshlrev_b32_e32 v12, 2, v1
	s_xor_b32 s10, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v11, 16, v11, s5
	v_add3_u32 v12, v2, v12, 0xc88
	s_clause 0x3
	scratch_store_b32 v11, v1, off
	scratch_store_b32 v12, v5, off
	scratch_store_b32 v10, v4, off
	scratch_store_b32 v0, v4, off
	s_clause 0x1
	scratch_load_b32 v0, off, off offset:4044
	scratch_load_b32 v1, off, off offset:4032
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, -1, v0
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v1, v1, 2, s42
	scratch_store_b32 off, v0, off offset:4044
	scratch_store_b32 v1, v6, off
	scratch_load_b32 v0, off, off offset:4032
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 off, v0, off offset:4032
.LBB15_1246:                            ; %Flow2103
                                        ;   in Loop: Header=BB15_1237 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s7, s7, exec_lo
	s_and_b32 s9, s10, exec_lo
	s_or_b32 s7, s7, s9
.LBB15_1247:                            ; %Flow2102
                                        ;   in Loop: Header=BB15_1237 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s8, s7
	s_cbranch_execz .LBB15_1249
; %bb.1248:                             ;   in Loop: Header=BB15_1237 Depth=1
	scratch_load_b32 v0, off, off offset:4036
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v2, v0, 0xc88
	scratch_load_b32 v5, v0, off
.LBB15_1249:                            ; %Flow2104
                                        ;   in Loop: Header=BB15_1237 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr10
.LBB15_1250:                            ; %Flow2106
                                        ;   in Loop: Header=BB15_1237 Depth=1
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB15_1252
; %bb.1251:                             ;   in Loop: Header=BB15_1237 Depth=1
	scratch_load_b32 v5, v10, off
	v_mad_u64_u32 v[0:1], null, v6, 28, s[2:3]
	scratch_store_b32 v0, v3, off offset:24
.LBB15_1252:                            ; %Flow2107
                                        ;   in Loop: Header=BB15_1237 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB15_1253:                            ; %Flow2109
                                        ;   in Loop: Header=BB15_1237 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b32 v0, off, off offset:4040
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v5, v0
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1237
.LBB15_1254:                            ; %Flow2111
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b64 v[0:1], v100, off
	v_mov_b32_e32 v2, 16
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v10, 0xfc0, v2
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, v10, v0, 0xc88
	scratch_load_b32 v3, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v3, v1
	s_cbranch_execz .LBB15_1269
; %bb.1255:                             ; %.lr.ph32.i.i377
	scratch_load_b64 v[0:1], v72, off
	s_movk_i32 s0, 0x2a70
	s_movk_i32 s2, 0x2c08
	v_add_nc_u32_e64 v11, s0, 16
	v_add_nc_u32_e64 v12, s2, 16
	s_add_i32 s50, s50, -4
	s_mov_b32 s2, 0
	s_movk_i32 s3, 0x2f54
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v13, -1 :: v_dual_add_f32 v6, v0, v1
.LBB15_1256:                            ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[1:2], null, v3, 28, v[60:61]
	v_lshlrev_b32_e32 v16, 2, v3
	v_mov_b32_e32 v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add3_u32 v15, v10, v16, 0xc88
	scratch_load_b32 v0, v1, off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v0, v8
	v_cmp_le_i32_e64 s0, v0, v9
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s0
	s_xor_b32 s0, exec_lo, s4
	s_cbranch_execz .LBB15_1258
; %bb.1257:                             ;   in Loop: Header=BB15_1256 Depth=1
	scratch_load_b32 v3, v15, off
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr14
                                        ; implicit-def: $vgpr15
                                        ; implicit-def: $vgpr1_vgpr2
                                        ; implicit-def: $vgpr16
.LBB15_1258:                            ; %Flow2096
                                        ;   in Loop: Header=BB15_1256 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB15_1268
; %bb.1259:                             ;   in Loop: Header=BB15_1256 Depth=1
	scratch_load_b32 v2, v93, off
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 2, v2
	v_add3_u32 v2, 16, v2, s3
	scratch_load_b32 v3, v2, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v3
	s_cbranch_execz .LBB15_1261
; %bb.1260:                             ;   in Loop: Header=BB15_1256 Depth=1
	v_sub_nc_u32_e32 v0, 0, v3
	scratch_store_b32 v2, v0, off
	scratch_load_b32 v0, v1, off
.LBB15_1261:                            ;   in Loop: Header=BB15_1256 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_clause 0x1
	scratch_load_b32 v1, v87, off
	scratch_load_b32 v2, v108, off
	v_mad_u64_u32 v[17:18], null, v14, 28, v[60:61]
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_lshl_add_u32 v3, v1, 2, s50
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v2, 2, v11
	v_add_nc_u32_e32 v1, -1, v1
	s_clause 0x1
	scratch_load_b32 v20, v3, off
	scratch_load_b32 v21, v2, off
	scratch_store_b32 v87, v1, off
	s_clause 0x1
	scratch_load_b128 v[1:4], v17, off offset:4
	scratch_load_b32 v5, v17, off offset:20
	s_waitcnt vmcnt(3)
	v_mad_u64_u32 v[18:19], null, v20, 28, v[61:62]
	v_lshlrev_b32_e32 v19, 2, v20
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v22, v11, v19
	scratch_store_b32 v17, v6, off offset:24
	s_waitcnt vmcnt(1)
	scratch_store_b128 v18, v[0:3], off
	s_waitcnt vmcnt(0)
	s_clause 0x1
	scratch_store_b96 v18, v[4:6], off offset:16
	scratch_store_b32 v22, v21, off
	scratch_load_b32 v0, v108, off
	v_add_nc_u32_e32 v1, v12, v19
	v_lshl_add_u32 v3, v21, 2, v12
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v0, 2, v11
	s_clause 0x2
	scratch_store_b32 v1, v0, off
	scratch_store_b32 v2, v20, off
	scratch_store_b32 v3, v20, off
	scratch_load_b32 v0, v109, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v109, v0, off
	scratch_load_b32 v3, v15, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s4, -1, v3
	v_cmpx_ne_u32_e32 -1, v3
	s_cbranch_execz .LBB15_1265
; %bb.1262:                             ;   in Loop: Header=BB15_1256 Depth=1
	v_add3_u32 v0, v10, v16, 0xaf0
	s_mov_b32 s7, -1
	s_mov_b32 s6, exec_lo
	scratch_load_b32 v1, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v1
	s_cbranch_execz .LBB15_1264
; %bb.1263:                             ;   in Loop: Header=BB15_1256 Depth=1
	v_lshlrev_b32_e32 v2, 2, v3
	v_lshlrev_b32_e32 v4, 2, v1
	s_xor_b32 s7, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v2, v10, v2, 0xaf0
	v_add3_u32 v4, v10, v4, 0xc88
	s_clause 0x3
	scratch_store_b32 v2, v1, off
	scratch_store_b32 v4, v3, off
	scratch_store_b32 v15, v13, off
	scratch_store_b32 v0, v13, off
	s_clause 0x1
	scratch_load_b32 v0, v102, off
	scratch_load_b32 v1, v83, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, -1, v0
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v1, v1, 2, v85
	s_clause 0x1
	scratch_store_b32 v102, v0, off
	scratch_store_b32 v1, v14, off
	scratch_load_b32 v0, v83, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v83, v0, off
.LBB15_1264:                            ; %Flow2094
                                        ;   in Loop: Header=BB15_1256 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s6, s7, exec_lo
	s_or_b32 s4, s4, s6
.LBB15_1265:                            ; %Flow2093
                                        ;   in Loop: Header=BB15_1256 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB15_1267
; %bb.1266:                             ;   in Loop: Header=BB15_1256 Depth=1
	scratch_load_b32 v0, v100, off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v10, v0, 0xc88
	scratch_load_b32 v3, v0, off
.LBB15_1267:                            ; %Flow2095
                                        ;   in Loop: Header=BB15_1256 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB15_1268:                            ; %Flow2097
                                        ;   in Loop: Header=BB15_1256 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b32 v0, v101, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v3, v0
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB15_1256
.LBB15_1269:                            ; %Flow2099
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x2
	scratch_load_b32 v2, v99, off
	scratch_load_b64 v[0:1], off, s52
	scratch_load_b32 v3, v94, off
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, s40, v0, 0xc88
	s_clause 0x1
	scratch_load_b32 v4, v112, off
	scratch_load_b32 v5, v0, off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v0, -1, v3
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1)
	v_min3_i32 v9, v4, v2, v0
	v_add_nc_u32_e32 v10, -4, v4
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v5, v1
	s_cbranch_execz .LBB15_1288
; %bb.1270:                             ; %.lr.ph.i3.i385
	scratch_load_b64 v[0:1], v73, off
	v_mov_b32_e32 v2, 16
	v_mov_b32_e32 v4, -1
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_add_f32 v3, v0, v1 :: v_dual_add_nc_u32 v2, 0x2fb0, v2
.LBB15_1271:                            ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[0:1], null, v5, 28, s[40:41]
	v_dual_mov_b32 v6, v5 :: v_dual_lshlrev_b32 v1, 2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add3_u32 v11, s40, v1, 0xc88
	scratch_load_b32 v12, v0, off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v12, v10
	v_cmp_le_i32_e64 s0, v12, v9
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s0
	s_xor_b32 s0, exec_lo, s3
	s_cbranch_execz .LBB15_1273
; %bb.1272:                             ;   in Loop: Header=BB15_1271 Depth=1
	scratch_load_b32 v5, v11, off
                                        ; implicit-def: $vgpr0_vgpr1
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr1
.LBB15_1273:                            ; %Flow2087
                                        ;   in Loop: Header=BB15_1271 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB15_1287
; %bb.1274:                             ;   in Loop: Header=BB15_1271 Depth=1
	scratch_load_b32 v5, v95, off
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v5, v12, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v5, 2, v5
	v_add3_u32 v5, v2, v5, 0x2f54
	scratch_load_b32 v12, v5, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v12
	s_cbranch_execz .LBB15_1276
; %bb.1275:                             ;   in Loop: Header=BB15_1271 Depth=1
	v_sub_nc_u32_e32 v12, 0, v12
	scratch_store_b32 v5, v12, off
.LBB15_1276:                            ;   in Loop: Header=BB15_1271 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[12:13], null, v6, 28, s[40:41]
	scratch_load_b32 v5, v12, off offset:20
	s_waitcnt vmcnt(0)
	v_cmp_nlt_f32_e32 vcc_lo, v5, v3
                                        ; implicit-def: $vgpr5
	s_and_saveexec_b32 s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB15_1284
; %bb.1277:                             ;   in Loop: Header=BB15_1271 Depth=1
	s_clause 0x1
	scratch_load_b64 v[12:13], v0, off
	scratch_load_b32 v0, v95, off
	v_mad_u64_u32 v[14:15], null, v6, 28, s[40:41]
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, v2, v0, 0x2f54
	scratch_load_b32 v5, v0, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v5, v13
	scratch_store_b32 v0, v5, off
	s_clause 0x1
	scratch_load_b32 v0, v14, off offset:4
	scratch_load_b32 v5, v78, off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v5, v0
	scratch_store_b32 v78, v0, off
	scratch_load_b32 v5, v11, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s4, -1, v5
	v_cmpx_ne_u32_e32 -1, v5
	s_cbranch_execz .LBB15_1281
; %bb.1278:                             ;   in Loop: Header=BB15_1271 Depth=1
	v_add3_u32 v0, s40, v1, 0xaf0
	s_mov_b32 s7, -1
	s_mov_b32 s6, exec_lo
	scratch_load_b32 v1, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v1
	s_cbranch_execz .LBB15_1280
; %bb.1279:                             ;   in Loop: Header=BB15_1271 Depth=1
	v_lshlrev_b32_e32 v12, 2, v5
	v_lshlrev_b32_e32 v13, 2, v1
	s_xor_b32 s7, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v12, s40, v12, 0xaf0
	v_add3_u32 v13, s40, v13, 0xc88
	s_clause 0x3
	scratch_store_b32 v12, v1, off
	scratch_store_b32 v13, v5, off
	scratch_store_b32 v11, v4, off
	scratch_store_b32 v0, v4, off
	s_clause 0x1
	scratch_load_b32 v0, v105, off
	scratch_load_b32 v1, v74, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, -1, v0
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v1, v1, 2, s48
	s_clause 0x1
	scratch_store_b32 v105, v0, off
	scratch_store_b32 v1, v6, off
	scratch_load_b32 v0, v74, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v74, v0, off
.LBB15_1280:                            ; %Flow2082
                                        ;   in Loop: Header=BB15_1271 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s6, s7, exec_lo
	s_or_b32 s4, s4, s6
.LBB15_1281:                            ; %Flow2081
                                        ;   in Loop: Header=BB15_1271 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB15_1283
; %bb.1282:                             ;   in Loop: Header=BB15_1271 Depth=1
	scratch_load_b32 v0, off, s52
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, s40, v0, 0xc88
	scratch_load_b32 v5, v0, off
.LBB15_1283:                            ; %Flow2083
                                        ;   in Loop: Header=BB15_1271 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr11
.LBB15_1284:                            ; %Flow2085
                                        ;   in Loop: Header=BB15_1271 Depth=1
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB15_1286
; %bb.1285:                             ;   in Loop: Header=BB15_1271 Depth=1
	scratch_load_b32 v5, v11, off
	v_mad_u64_u32 v[0:1], null, v6, 28, s[40:41]
	scratch_store_b32 v0, v3, off offset:24
.LBB15_1286:                            ; %Flow2086
                                        ;   in Loop: Header=BB15_1271 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1287:                            ; %Flow2088
                                        ;   in Loop: Header=BB15_1271 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b32 v0, v104, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v5, v0
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB15_1271
.LBB15_1288:                            ; %Flow2090
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b64 v[0:1], v96, off
	v_mov_b32_e32 v2, 16
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v11, 0x3f70, v2
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	v_add3_u32 v0, v11, v0, 0xc88
	scratch_load_b32 v3, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v3, v1
	s_cbranch_execz .LBB15_1303
; %bb.1289:                             ; %.lr.ph32.i11.i393
	scratch_load_b64 v[0:1], v73, off
	s_movk_i32 s0, 0x2fb0
	s_movk_i32 s2, 0x5a20
	s_movk_i32 s3, 0x5bb8
	v_add_nc_u32_e64 v12, s0, 16
	v_add_nc_u32_e64 v13, s2, 16
	v_add_nc_u32_e64 v14, s3, 16
	s_add_i32 s49, s49, -4
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v15, -1 :: v_dual_add_f32 v6, v0, v1
.LBB15_1290:                            ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[1:2], null, v3, 28, v[59:60]
	v_lshlrev_b32_e32 v18, 2, v3
	v_mov_b32_e32 v16, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v11, v18, 0xc88
	scratch_load_b32 v0, v1, off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v0, v10
	v_cmp_le_i32_e64 s0, v0, v9
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s0
	s_xor_b32 s0, exec_lo, s3
	s_cbranch_execz .LBB15_1292
; %bb.1291:                             ;   in Loop: Header=BB15_1290 Depth=1
	scratch_load_b32 v3, v17, off
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr16
                                        ; implicit-def: $vgpr17
                                        ; implicit-def: $vgpr1_vgpr2
                                        ; implicit-def: $vgpr18
.LBB15_1292:                            ; %Flow2075
                                        ;   in Loop: Header=BB15_1290 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB15_1302
; %bb.1293:                             ;   in Loop: Header=BB15_1290 Depth=1
	scratch_load_b32 v2, v95, off
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 2, v2
	v_add3_u32 v2, v12, v2, 0x2f54
	scratch_load_b32 v3, v2, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v3
	s_cbranch_execz .LBB15_1295
; %bb.1294:                             ;   in Loop: Header=BB15_1290 Depth=1
	v_sub_nc_u32_e32 v0, 0, v3
	scratch_store_b32 v2, v0, off
	scratch_load_b32 v0, v1, off
.LBB15_1295:                            ;   in Loop: Header=BB15_1290 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_clause 0x1
	scratch_load_b32 v1, v86, off
	scratch_load_b32 v2, v110, off
	v_mad_u64_u32 v[19:20], null, v16, 28, v[59:60]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_lshl_add_u32 v3, v1, 2, s49
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v2, 2, v13
	v_add_nc_u32_e32 v1, -1, v1
	s_clause 0x1
	scratch_load_b32 v22, v3, off
	scratch_load_b32 v23, v2, off
	scratch_store_b32 v86, v1, off
	s_clause 0x1
	scratch_load_b128 v[1:4], v19, off offset:4
	scratch_load_b32 v5, v19, off offset:20
	s_waitcnt vmcnt(3)
	v_mad_u64_u32 v[20:21], null, v22, 28, v[62:63]
	v_lshlrev_b32_e32 v21, 2, v22
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v24, v13, v21
	scratch_store_b32 v19, v6, off offset:24
	s_waitcnt vmcnt(1)
	scratch_store_b128 v20, v[0:3], off
	s_waitcnt vmcnt(0)
	s_clause 0x1
	scratch_store_b96 v20, v[4:6], off offset:16
	scratch_store_b32 v24, v23, off
	scratch_load_b32 v0, v110, off
	v_add_nc_u32_e32 v1, v14, v21
	v_lshl_add_u32 v3, v23, 2, v14
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v0, 2, v13
	s_clause 0x2
	scratch_store_b32 v1, v0, off
	scratch_store_b32 v2, v22, off
	scratch_store_b32 v3, v22, off
	scratch_load_b32 v0, v111, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v111, v0, off
	scratch_load_b32 v3, v17, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s3, -1, v3
	v_cmpx_ne_u32_e32 -1, v3
	s_cbranch_execz .LBB15_1299
; %bb.1296:                             ;   in Loop: Header=BB15_1290 Depth=1
	v_add3_u32 v0, v11, v18, 0xaf0
	s_mov_b32 s6, -1
	s_mov_b32 s5, exec_lo
	scratch_load_b32 v1, v0, off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v1
	s_cbranch_execz .LBB15_1298
; %bb.1297:                             ;   in Loop: Header=BB15_1290 Depth=1
	v_lshlrev_b32_e32 v2, 2, v3
	v_lshlrev_b32_e32 v4, 2, v1
	s_xor_b32 s6, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v2, v11, v2, 0xaf0
	v_add3_u32 v4, v11, v4, 0xc88
	s_clause 0x3
	scratch_store_b32 v2, v1, off
	scratch_store_b32 v4, v3, off
	scratch_store_b32 v17, v15, off
	scratch_store_b32 v0, v15, off
	s_clause 0x1
	scratch_load_b32 v0, v98, off
	scratch_load_b32 v1, v82, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, -1, v0
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v1, v1, 2, v84
	s_clause 0x1
	scratch_store_b32 v98, v0, off
	scratch_store_b32 v1, v16, off
	scratch_load_b32 v0, v82, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	scratch_store_b32 v82, v0, off
.LBB15_1298:                            ; %Flow2073
                                        ;   in Loop: Header=BB15_1290 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s3, s3, exec_lo
	s_and_b32 s5, s6, exec_lo
	s_or_b32 s3, s3, s5
.LBB15_1299:                            ; %Flow2072
                                        ;   in Loop: Header=BB15_1290 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB15_1301
; %bb.1300:                             ;   in Loop: Header=BB15_1290 Depth=1
	scratch_load_b32 v0, v96, off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v11, v0, 0xc88
	scratch_load_b32 v3, v0, off
.LBB15_1301:                            ; %Flow2074
                                        ;   in Loop: Header=BB15_1290 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
.LBB15_1302:                            ; %Flow2076
                                        ;   in Loop: Header=BB15_1290 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b32 v0, v97, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v3, v0
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB15_1290
.LBB15_1303:                            ; %Flow2078
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x2
	scratch_load_b32 v11, v93, off
	scratch_load_b64 v[1:2], v103, off
	scratch_load_b32 v3, v75, off
	v_add_nc_u32_e32 v7, 5, v7
	s_mov_b32 s3, 0
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v4, 10, v11
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v5, v1, v2
	v_max_i32_e32 v0, v8, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_i32_e32 v4, v7, v4
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v12, v5, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e32 vcc_lo, v0, v4
	v_cmp_lt_i32_e64 s0, 0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1311
; %bb.1304:                             ; %.lr.ph.i19.i402
	scratch_load_b64 v[1:2], v72, off
	v_dual_mov_b32 v4, 16 :: v_dual_lshlrev_b32 v3, 2, v0
	s_movk_i32 s0, 0xaf0
	s_movk_i32 s2, 0xc88
	v_mov_b32_e32 v6, -1.0
	v_add_nc_u32_e64 v13, s0, 16
	v_add_nc_u32_e64 v14, s2, 16
	v_add3_u32 v15, v3, v4, 0x2f54
	s_add_i32 s42, s42, -4
	s_mov_b32 s2, 16
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v5, v1, v2 :: v_dual_mov_b32 v2, 0
.LBB15_1305:                            ; =>This Inner Loop Header: Depth=1
	v_lshlrev_b32_e32 v1, 2, v11
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v15, v1
	scratch_load_b32 v4, v1, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 -1, v4
	s_cbranch_execz .LBB15_1309
; %bb.1306:                             ;   in Loop: Header=BB15_1305 Depth=1
	scratch_load_b32 v1, v76, off
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v1, v4
	s_cbranch_execz .LBB15_1308
; %bb.1307:                             ;   in Loop: Header=BB15_1305 Depth=1
	s_clause 0x1
	scratch_load_b32 v11, off, off offset:4032
	scratch_load_b32 v3, off, off offset:4040
	v_sub_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_i32_e32 v1, v12, v1
	v_sub_nc_u32_e32 v12, v12, v1
	s_waitcnt vmcnt(1)
	v_lshl_add_u32 v16, v11, 2, s42
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v3, v3, 2, v13
	v_add_nc_u32_e32 v11, -1, v11
	s_clause 0x1
	scratch_load_b32 v18, v16, off
	scratch_load_b32 v19, v3, off
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[16:17], null, v18, 28, s[2:3]
	v_lshlrev_b32_e32 v17, 2, v18
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v2 :: v_dual_add_nc_u32 v20, v13, v17
	scratch_store_b32 off, v11, off offset:4032
	s_clause 0x1
	scratch_store_b128 v16, v[0:3], off
	scratch_store_b96 v16, v[4:6], off offset:16
	s_waitcnt vmcnt(0)
	scratch_store_b32 v20, v19, off
	scratch_load_b32 v3, off, off offset:4040
	v_add_nc_u32_e32 v4, v14, v17
	v_lshl_add_u32 v16, v19, 2, v14
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v11, v3, 2, v13
	s_clause 0x2
	scratch_store_b32 v4, v3, off
	scratch_store_b32 v11, v18, off
	scratch_store_b32 v16, v18, off
	scratch_load_b32 v3, v93, off
	scratch_load_b32 v4, off, off offset:4044
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v15, v3
	scratch_store_b32 off, v4, off offset:4044
	scratch_load_b32 v4, v3, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v4, v1
	scratch_store_b32 v3, v4, off
	s_clause 0x1
	scratch_load_b32 v3, v75, off
	scratch_load_b32 v11, v93, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v3, v3, v1
	scratch_store_b32 v75, v3, off
.LBB15_1308:                            ; %Flow2067
                                        ;   in Loop: Header=BB15_1305 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
.LBB15_1309:                            ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE12sendNewOrderERKiRi.exit.i.i406
                                        ;   in Loop: Header=BB15_1305 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 10, v11
	v_add_nc_u32_e32 v0, 1, v0
	v_cmp_eq_u32_e64 s0, 0, v12
	v_add_nc_u32_e32 v15, 4, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_i32_e32 v1, v7, v1
	v_cmp_ge_i32_e32 vcc_lo, v0, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s0, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1305
; %bb.1310:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE20sendNewSellingOrdersERKiS3_Ri.exit.loopexit.i410
	s_or_b32 exec_lo, exec_lo, s3
	scratch_load_b64 v[1:2], v103, off
.LBB15_1311:                            ; %Flow2069
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	scratch_load_b32 v3, v95, off
	scratch_load_b32 v0, v78, off
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v4, 9, v3
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v1, v0
	v_max_i32_e32 v5, v10, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_min_i32_e32 v0, v9, v4
	v_sub_nc_u32_e32 v7, v2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, v0, v5
	v_cmp_lt_i32_e64 s0, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1319
; %bb.1312:                             ; %.lr.ph.i22.i417
	scratch_load_b64 v[1:2], v73, off
	v_dual_mov_b32 v5, 16 :: v_dual_lshlrev_b32 v4, 2, v0
	v_mov_b32_e32 v6, -1.0
	s_add_i32 s48, s48, -4
	s_add_i32 s3, s40, 0xaf0
	s_add_i32 s4, s40, 0xc88
	v_add3_u32 v11, v4, v5, 0x5f04
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v5, v1, v2 :: v_dual_mov_b32 v2, 0
.LBB15_1313:                            ; =>This Inner Loop Header: Depth=1
	v_lshlrev_b32_e32 v1, 2, v3
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v11, v1
	scratch_load_b32 v4, v1, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 -1, v4
	s_cbranch_execz .LBB15_1317
; %bb.1314:                             ;   in Loop: Header=BB15_1313 Depth=1
	scratch_load_b32 v1, v79, off
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v1, v4
	s_cbranch_execz .LBB15_1316
; %bb.1315:                             ;   in Loop: Header=BB15_1313 Depth=1
	s_clause 0x1
	scratch_load_b32 v14, v74, off
	scratch_load_b32 v3, v104, off
	v_sub_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_i32_e32 v1, v7, v1
	v_sub_nc_u32_e32 v7, v7, v1
	s_waitcnt vmcnt(1)
	v_lshl_add_u32 v12, v14, 2, s48
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v3, v3, 2, s3
	v_add_nc_u32_e32 v14, -1, v14
	s_clause 0x1
	scratch_load_b32 v15, v12, off
	scratch_load_b32 v16, v3, off
	v_mov_b32_e32 v3, v2
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[12:13], null, v15, 28, s[40:41]
	v_lshlrev_b32_e32 v13, 2, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v17, s3, v13
	s_clause 0x2
	scratch_store_b32 v74, v14, off
	scratch_store_b128 v12, v[0:3], off
	scratch_store_b96 v12, v[4:6], off offset:16
	s_waitcnt vmcnt(0)
	scratch_store_b32 v17, v16, off
	scratch_load_b32 v3, v104, off
	v_add_nc_u32_e32 v4, s4, v13
	v_lshl_add_u32 v13, v16, 2, s4
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v12, v3, 2, s3
	s_clause 0x2
	scratch_store_b32 v4, v3, off
	scratch_store_b32 v12, v15, off
	scratch_store_b32 v13, v15, off
	s_clause 0x1
	scratch_load_b32 v3, v95, off
	scratch_load_b32 v4, v105, off
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v11, v3
	scratch_store_b32 v105, v4, off
	scratch_load_b32 v4, v3, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v4, v1
	scratch_store_b32 v3, v4, off
	s_clause 0x1
	scratch_load_b32 v4, v78, off
	scratch_load_b32 v3, v95, off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v4, v4, v1
	scratch_store_b32 v78, v4, off
.LBB15_1316:                            ; %Flow2063
                                        ;   in Loop: Header=BB15_1313 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB15_1317:                            ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE12sendNewOrderERKiRi.exit.i24.i421
                                        ;   in Loop: Header=BB15_1313 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	v_max_i32_e32 v1, v10, v3
	v_cmp_eq_u32_e32 vcc_lo, 0, v7
	v_add_nc_u32_e32 v11, -4, v11
	v_cmp_le_i32_e64 s0, v0, v1
	v_add_nc_u32_e32 v0, -1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, vcc_lo
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s0, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB15_1313
; %bb.1318:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE19sendNewBuyingOrdersERKiS3_Ri.exit.loopexit.i426
	s_or_b32 exec_lo, exec_lo, s2
	scratch_load_b32 v11, v93, off
.LBB15_1319:                            ; %Flow2065
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b32 v0, v94, off
	s_waitcnt vmcnt(0)
	v_min_i32_e32 v1, v0, v8
	v_add_nc_u32_e32 v0, 10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, v1, v11
	v_cmp_lt_i32_e64 s0, v1, v0
	scratch_store_b32 v94, v1, off
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1324
; %bb.1320:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit.i437.preheader
	v_lshlrev_b32_e32 v2, 2, v1
	v_lshlrev_b32_e32 v4, 2, v11
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr3
	v_add_nc_u32_e32 v1, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v4
	v_mov_b32_e32 v4, 16
	v_add3_u32 v2, v2, v4, 0x2f54
.LBB15_1321:                            ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit.i437
                                        ; =>This Inner Loop Header: Depth=1
	scratch_load_b32 v4, v2, off
	s_or_b32 s3, s3, exec_lo
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_1323
; %bb.1322:                             ;   in Loop: Header=BB15_1321 Depth=1
	v_cmp_lt_i32_e32 vcc_lo, v1, v11
	v_cmp_ge_i32_e64 s0, v1, v0
	scratch_store_b32 v94, v1, off
	v_add_nc_u32_e32 v1, 1, v1
	v_add_nc_u32_e32 v2, 4, v2
	s_and_not1_b32 s3, s3, exec_lo
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s3, s3, s0
.LBB15_1323:                            ; %Flow2059
                                        ;   in Loop: Header=BB15_1321 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s3
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB15_1321
.LBB15_1324:                            ; %Flow2061
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b32 v0, v77, off
	v_add_nc_u32_e32 v1, 10, v3
	s_waitcnt vmcnt(0)
	v_max_i32_e32 v0, v0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_ge_i32_e32 vcc_lo, v0, v3
	v_cmp_lt_i32_e64 s0, v0, v1
	scratch_store_b32 v77, v0, off
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB15_1329
; %bb.1325:                             ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit33.i435.preheader
	v_lshlrev_b32_e32 v1, 2, v0
	v_lshlrev_b32_e32 v2, 2, v3
	v_add_nc_u32_e32 v0, 1, v0
	s_mov_b32 s1, 0
                                        ; implicit-def: $sgpr2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v2
	v_mov_b32_e32 v2, 16
	v_add3_u32 v1, v1, v2, 0x5f04
.LBB15_1326:                            ; %_ZN10gpu_ginkgo9OrderListILi100ELi10EE10levelEmptyERKi.exit33.i435
                                        ; =>This Inner Loop Header: Depth=1
	scratch_load_b32 v2, v1, off
	s_or_b32 s2, s2, exec_lo
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB15_1328
; %bb.1327:                             ;   in Loop: Header=BB15_1326 Depth=1
	v_add_nc_u32_e32 v2, -2, v0
	v_add_nc_u32_e32 v0, -1, v0
	v_add_nc_u32_e32 v1, -4, v1
	s_and_not1_b32 s2, s2, exec_lo
	scratch_store_b32 v77, v2, off
	v_cmp_le_i32_e32 vcc_lo, v0, v3
	s_and_b32 s4, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s4
.LBB15_1328:                            ; %Flow2056
                                        ;   in Loop: Header=BB15_1326 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, exec_lo, s2
	s_or_b32 s1, s3, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB15_1326
.LBB15_1329:                            ; %Flow2058
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v4, v58
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1335
; %bb.1330:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_1334
; %bb.1331:                             ; %.preheader3.i.i.i.i503.preheader
	s_mov_b32 s3, 0
.LBB15_1332:                            ; %.preheader3.i.i.i.i503
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1332
; %bb.1333:                             ; %Flow2052
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1334:                            ; %Flow2054
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_1335:                            ; %.loopexit4.i.i.i.i444
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_1337
; %bb.1336:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_1337:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_1345
; %bb.1338:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_1341
; %bb.1339:                             ; %.preheader1.i.i.i.i501.preheader
	s_mov_b32 s8, 0
.LBB15_1340:                            ; %.preheader1.i.i.i.i501
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_1340
.LBB15_1341:                            ; %Flow2050
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_1343
; %bb.1342:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_1343:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_1345
; %bb.1344:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_1345:                            ; %Flow2051
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_1346:                            ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1348
; %bb.1347:                             ;   in Loop: Header=BB15_1346 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_1348:                            ;   in Loop: Header=BB15_1346 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_1350
; %bb.1349:                             ;   in Loop: Header=BB15_1346 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_1351
.LBB15_1350:                            ;   in Loop: Header=BB15_1346 Depth=1
	s_mov_b32 s1, -1
.LBB15_1351:                            ; %Flow2045
                                        ;   in Loop: Header=BB15_1346 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_1346
; %bb.1352:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1356
; %bb.1353:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_1356
; %bb.1354:                             ; %.preheader.i.i.i.i500.preheader
	s_mov_b32 s0, 0
.LBB15_1355:                            ; %.preheader.i.i.i.i500
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_1355
.LBB15_1356:                            ; %__ockl_printf_begin.exit.i446
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.25@rel32@lo+4
	s_addc_u32 s1, s1, .str.25@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v4, s58
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	scratch_load_b32 v38, v103, off
	v_dual_mov_b32 v0, v58 :: v_dual_mov_b32 v1, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1362
; %bb.1357:
	global_load_b64 v[3:4], v36, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[38:39] offset:40
	global_load_b64 v[5:6], v36, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v36, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[1:2], v[3:4]
	s_cbranch_execz .LBB15_1361
; %bb.1358:                             ; %.preheader3.i.i.i6.i499.preheader
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
.LBB15_1359:                            ; %.preheader3.i.i.i6.i499
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[38:39] offset:40
	global_load_b64 v[8:9], v3, s[38:39]
	v_dual_mov_b32 v7, v2 :: v_dual_mov_b32 v6, v1
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[1:2], null, v4, 24, v[8:9]
	v_and_b32_e32 v8, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v8, 24, v[2:3]
	v_mov_b32_e32 v2, v4
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[1:2], v3, v[4:7], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1359
; %bb.1360:                             ; %Flow2038
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1361:                            ; %Flow2040
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_1362:                            ; %.loopexit4.i.i.i1.i448
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v36, s[38:39] offset:40
	global_load_b128 v[4:7], v36, s[38:39]
	v_readfirstlane_b32 s2, v1
	v_readfirstlane_b32 s3, v2
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_1364
; %bb.1363:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v2, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, 0
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[1:2], v[8:11], off offset:8
.LBB15_1364:
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s9, s8
	v_lshlrev_b64 v[2:3], 6, v[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v0, v2
	v_mov_b32_e32 v0, 33
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	v_mov_b32_e32 v2, v1
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v8, s8
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	v_mov_b32_e32 v11, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_1372
; %bb.1365:
	s_clause 0x1
	global_load_b64 v[12:13], v1, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v1, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[12:13]
	s_cbranch_execz .LBB15_1368
; %bb.1366:                             ; %.preheader1.i.i.i4.i497.preheader
	v_mov_b32_e32 v10, 0
	s_mov_b32 s8, 0
.LBB15_1367:                            ; %.preheader1.i.i.i4.i497
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_1367
.LBB15_1368:                            ; %Flow2036
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB15_1370
; %bb.1369:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB15_1370:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB15_1372
; %bb.1371:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_1372:                            ; %Flow2037
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_1373:                            ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1375
; %bb.1374:                             ;   in Loop: Header=BB15_1373 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_1375:                            ;   in Loop: Header=BB15_1373 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_1377
; %bb.1376:                             ;   in Loop: Header=BB15_1373 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_1378
.LBB15_1377:                            ;   in Loop: Header=BB15_1373 Depth=1
	s_mov_b32 s1, -1
.LBB15_1378:                            ; %Flow2031
                                        ;   in Loop: Header=BB15_1373 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_1373
; %bb.1379:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1383
; %bb.1380:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_1383
; %bb.1381:                             ; %.preheader.i.i.i3.i496.preheader
	s_mov_b32 s0, 0
.LBB15_1382:                            ; %.preheader.i.i.i3.i496
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_1382
.LBB15_1383:                            ; %__ockl_printf_begin.exit7.i450
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.26@rel32@lo+4
	s_addc_u32 s1, s1, .str.26@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v4, s57
	v_mov_b32_e32 v6, 0
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, v58
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v6
	v_mov_b32_e32 v7, 0
	v_mov_b32_e32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v6
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1389
; %bb.1384:
	global_load_b64 v[3:4], v36, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[38:39] offset:40
	global_load_b64 v[7:8], v36, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v7, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v8, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v36, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[3:4]
	s_cbranch_execz .LBB15_1388
; %bb.1385:                             ; %.preheader3.i.i.i13.i495.preheader
	v_mov_b32_e32 v1, 0
	s_mov_b32 s3, 0
.LBB15_1386:                            ; %.preheader3.i.i.i13.i495
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	global_load_b64 v[9:10], v1, s[38:39]
	v_dual_mov_b32 v4, v7 :: v_dual_mov_b32 v5, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v2, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v2, 24, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, v8 :: v_dual_and_b32 v3, v3, v5
	v_mad_u64_u32 v[8:9], null, v3, 24, v[2:3]
	global_load_b64 v[2:3], v[7:8], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1386
; %bb.1387:                             ; %Flow2024
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1388:                            ; %Flow2026
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_1389:                            ; %.loopexit4.i.i.i8.i452
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[9:10], v36, s[38:39] offset:40
	global_load_b128 v[1:4], v36, s[38:39]
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_1391
; %bb.1390:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s10, v2, vcc_lo
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, 0
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB15_1391:
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s8, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_mov_b32_e32 v7, 0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 6, v[6:7]
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_u32 v8, vcc_lo, v3, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, v4, v6, vcc_lo
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9
	v_dual_mov_b32 v39, v7 :: v_dual_mov_b32 v6, s11
	v_mov_b32_e32 v5, s10
	s_clause 0x3
	global_store_b128 v[8:9], v[36:39], off
	global_store_b128 v[8:9], v[3:6], off offset:16
	global_store_b128 v[8:9], v[3:6], off offset:32
	global_store_b128 v[8:9], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_1399
; %bb.1392:
	s_clause 0x1
	global_load_b64 v[12:13], v7, s[38:39] offset:32 glc
	global_load_b64 v[3:4], v7, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v7, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[12:13]
	s_cbranch_execz .LBB15_1395
; %bb.1393:                             ; %.preheader1.i.i.i11.i493.preheader
	s_mov_b32 s8, 0
.LBB15_1394:                            ; %.preheader1.i.i.i11.i493
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[8:9], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v7, v[3:6], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_1394
.LBB15_1395:                            ; %Flow2022
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB15_1397
; %bb.1396:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB15_1397:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB15_1399
; %bb.1398:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_1399:                            ; %Flow2023
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_1400:                            ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1402
; %bb.1401:                             ;   in Loop: Header=BB15_1400 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_1402:                            ;   in Loop: Header=BB15_1400 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_1404
; %bb.1403:                             ;   in Loop: Header=BB15_1400 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_1405
.LBB15_1404:                            ;   in Loop: Header=BB15_1400 Depth=1
	s_mov_b32 s1, -1
.LBB15_1405:                            ; %Flow2017
                                        ;   in Loop: Header=BB15_1400 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_1400
; %bb.1406:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1410
; %bb.1407:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[38:39] offset:40
	global_load_b64 v[7:8], v6, s[38:39] offset:24 glc
	global_load_b64 v[4:5], v6, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_1410
; %bb.1408:                             ; %.preheader.i.i.i10.i492.preheader
	s_mov_b32 s0, 0
.LBB15_1409:                            ; %.preheader.i.i.i10.i492
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_1409
.LBB15_1410:                            ; %__ockl_printf_append_args.exit.i454
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b32 v38, v63, off
	v_mov_b32_e32 v4, v58
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1416
; %bb.1411:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_1415
; %bb.1412:                             ; %.preheader3.i.i.i19.i491.preheader
	s_mov_b32 s3, 0
.LBB15_1413:                            ; %.preheader3.i.i.i19.i491
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1413
; %bb.1414:                             ; %Flow2010
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1415:                            ; %Flow2012
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_1416:                            ; %.loopexit4.i.i.i14.i455
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_1418
; %bb.1417:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_1418:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_1426
; %bb.1419:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_1422
; %bb.1420:                             ; %.preheader1.i.i.i17.i489.preheader
	s_mov_b32 s8, 0
.LBB15_1421:                            ; %.preheader1.i.i.i17.i489
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_1421
.LBB15_1422:                            ; %Flow2008
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_1424
; %bb.1423:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_1424:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_1426
; %bb.1425:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_1426:                            ; %Flow2009
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_1427:                            ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1429
; %bb.1428:                             ;   in Loop: Header=BB15_1427 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_1429:                            ;   in Loop: Header=BB15_1427 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_1431
; %bb.1430:                             ;   in Loop: Header=BB15_1427 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_1432
.LBB15_1431:                            ;   in Loop: Header=BB15_1427 Depth=1
	s_mov_b32 s1, -1
.LBB15_1432:                            ; %Flow2003
                                        ;   in Loop: Header=BB15_1427 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_1427
; %bb.1433:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1437
; %bb.1434:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_1437
; %bb.1435:                             ; %.preheader.i.i.i16.i488.preheader
	s_mov_b32 s0, 0
.LBB15_1436:                            ; %.preheader.i.i.i16.i488
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_1436
.LBB15_1437:                            ; %__ockl_printf_begin.exit20.i457
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.27@rel32@lo+4
	s_addc_u32 s1, s1, .str.27@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v4, v57
	v_mov_b32_e32 v6, 0
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, v58
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v6
	v_mov_b32_e32 v7, 0
	v_mov_b32_e32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v6
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1443
; %bb.1438:
	global_load_b64 v[3:4], v36, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[38:39] offset:40
	global_load_b64 v[7:8], v36, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v7, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v8, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v36, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[3:4]
	s_cbranch_execz .LBB15_1442
; %bb.1439:                             ; %.preheader3.i.i.i26.i487.preheader
	v_mov_b32_e32 v1, 0
	s_mov_b32 s3, 0
.LBB15_1440:                            ; %.preheader3.i.i.i26.i487
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	global_load_b64 v[9:10], v1, s[38:39]
	v_dual_mov_b32 v4, v7 :: v_dual_mov_b32 v5, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v2, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v2, 24, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, v8 :: v_dual_and_b32 v3, v3, v5
	v_mad_u64_u32 v[8:9], null, v3, 24, v[2:3]
	global_load_b64 v[2:3], v[7:8], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1440
; %bb.1441:                             ; %Flow1996
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1442:                            ; %Flow1998
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_1443:                            ; %.loopexit4.i.i.i21.i459
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[9:10], v36, s[38:39] offset:40
	global_load_b128 v[1:4], v36, s[38:39]
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_1445
; %bb.1444:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s10, v2, vcc_lo
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, 0
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB15_1445:
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s8, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_mov_b32_e32 v7, 0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 6, v[6:7]
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_u32 v8, vcc_lo, v3, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, v4, v6, vcc_lo
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9
	v_dual_mov_b32 v39, v7 :: v_dual_mov_b32 v6, s11
	v_mov_b32_e32 v5, s10
	s_clause 0x3
	global_store_b128 v[8:9], v[36:39], off
	global_store_b128 v[8:9], v[3:6], off offset:16
	global_store_b128 v[8:9], v[3:6], off offset:32
	global_store_b128 v[8:9], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_1453
; %bb.1446:
	s_clause 0x1
	global_load_b64 v[12:13], v7, s[38:39] offset:32 glc
	global_load_b64 v[3:4], v7, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v7, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[12:13]
	s_cbranch_execz .LBB15_1449
; %bb.1447:                             ; %.preheader1.i.i.i24.i485.preheader
	s_mov_b32 s8, 0
.LBB15_1448:                            ; %.preheader1.i.i.i24.i485
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[8:9], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v7, v[3:6], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_1448
.LBB15_1449:                            ; %Flow1994
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB15_1451
; %bb.1450:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB15_1451:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB15_1453
; %bb.1452:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_1453:                            ; %Flow1995
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_1454:                            ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1456
; %bb.1455:                             ;   in Loop: Header=BB15_1454 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_1456:                            ;   in Loop: Header=BB15_1454 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_1458
; %bb.1457:                             ;   in Loop: Header=BB15_1454 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_1459
.LBB15_1458:                            ;   in Loop: Header=BB15_1454 Depth=1
	s_mov_b32 s1, -1
.LBB15_1459:                            ; %Flow1989
                                        ;   in Loop: Header=BB15_1454 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_1454
; %bb.1460:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1464
; %bb.1461:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[38:39] offset:40
	global_load_b64 v[7:8], v6, s[38:39] offset:24 glc
	global_load_b64 v[4:5], v6, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_1464
; %bb.1462:                             ; %.preheader.i.i.i23.i484.preheader
	s_mov_b32 s0, 0
.LBB15_1463:                            ; %.preheader.i.i.i23.i484
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_1463
.LBB15_1464:                            ; %__ockl_printf_append_args.exit27.i461
	s_or_b32 exec_lo, exec_lo, s1
	scratch_load_b32 v38, v114, off
	v_mov_b32_e32 v4, v58
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1470
; %bb.1465:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[5:6], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB15_1469
; %bb.1466:                             ; %.preheader3.i.i.i33.i483.preheader
	s_mov_b32 s3, 0
.LBB15_1467:                            ; %.preheader3.i.i.i33.i483
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[10:11], v0, s[38:39]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1467
; %bb.1468:                             ; %Flow1982
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1469:                            ; %Flow1984
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_1470:                            ; %.loopexit4.i.i.i28.i462
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[38:39] offset:40
	global_load_b128 v[0:3], v5, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_1472
; %bb.1471:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB15_1472:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_1480
; %bb.1473:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_1476
; %bb.1474:                             ; %.preheader1.i.i.i31.i481.preheader
	s_mov_b32 s8, 0
.LBB15_1475:                            ; %.preheader1.i.i.i31.i481
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_1475
.LBB15_1476:                            ; %Flow1980
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_1478
; %bb.1477:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_1478:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_1480
; %bb.1479:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_1480:                            ; %Flow1981
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_1481:                            ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1483
; %bb.1482:                             ;   in Loop: Header=BB15_1481 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_1483:                            ;   in Loop: Header=BB15_1481 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_1485
; %bb.1484:                             ;   in Loop: Header=BB15_1481 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_1486
.LBB15_1485:                            ;   in Loop: Header=BB15_1481 Depth=1
	s_mov_b32 s1, -1
.LBB15_1486:                            ; %Flow1975
                                        ;   in Loop: Header=BB15_1481 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_1481
; %bb.1487:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1491
; %bb.1488:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_1491
; %bb.1489:                             ; %.preheader.i.i.i30.i480.preheader
	s_mov_b32 s0, 0
.LBB15_1490:                            ; %.preheader.i.i.i30.i480
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_1490
.LBB15_1491:                            ; %__ockl_printf_begin.exit34.i464
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.28@rel32@lo+4
	s_addc_u32 s1, s1, .str.28@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v4, s59
	v_mov_b32_e32 v6, 0
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, v58
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v6
	v_mov_b32_e32 v7, 0
	v_mov_b32_e32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v6
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1497
; %bb.1492:
	global_load_b64 v[3:4], v36, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[38:39] offset:40
	global_load_b64 v[7:8], v36, s[38:39]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v7, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v8, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v36, v[1:4], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[3:4]
	s_cbranch_execz .LBB15_1496
; %bb.1493:                             ; %.preheader3.i.i.i40.i479.preheader
	v_mov_b32_e32 v1, 0
	s_mov_b32 s3, 0
.LBB15_1494:                            ; %.preheader3.i.i.i40.i479
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[38:39] offset:40
	global_load_b64 v[9:10], v1, s[38:39]
	v_dual_mov_b32 v4, v7 :: v_dual_mov_b32 v5, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v2, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v2, 24, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, v8 :: v_dual_and_b32 v3, v3, v5
	v_mad_u64_u32 v[8:9], null, v3, 24, v[2:3]
	global_load_b64 v[2:3], v[7:8], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1494
; %bb.1495:                             ; %Flow1968
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1496:                            ; %Flow1970
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_1497:                            ; %.loopexit4.i.i.i35.i466
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[9:10], v36, s[38:39] offset:40
	global_load_b128 v[1:4], v36, s[38:39]
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_1499
; %bb.1498:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s10, v2, vcc_lo
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, 0
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB15_1499:
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s8, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_mov_b32_e32 v7, 0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 6, v[6:7]
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_u32 v8, vcc_lo, v3, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, v4, v6, vcc_lo
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9
	v_dual_mov_b32 v39, v7 :: v_dual_mov_b32 v6, s11
	v_mov_b32_e32 v5, s10
	s_clause 0x3
	global_store_b128 v[8:9], v[36:39], off
	global_store_b128 v[8:9], v[3:6], off offset:16
	global_store_b128 v[8:9], v[3:6], off offset:32
	global_store_b128 v[8:9], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_1507
; %bb.1500:
	s_clause 0x1
	global_load_b64 v[12:13], v7, s[38:39] offset:32 glc
	global_load_b64 v[3:4], v7, s[38:39] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v7, v[10:13], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[12:13]
	s_cbranch_execz .LBB15_1503
; %bb.1501:                             ; %.preheader1.i.i.i38.i477.preheader
	s_mov_b32 s8, 0
.LBB15_1502:                            ; %.preheader1.i.i.i38.i477
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[8:9], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v7, v[3:6], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_1502
.LBB15_1503:                            ; %Flow1966
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB15_1505
; %bb.1504:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB15_1505:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB15_1507
; %bb.1506:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_1507:                            ; %Flow1967
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_1508:                            ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1510
; %bb.1509:                             ;   in Loop: Header=BB15_1508 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_1510:                            ;   in Loop: Header=BB15_1508 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_1512
; %bb.1511:                             ;   in Loop: Header=BB15_1508 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_1513
.LBB15_1512:                            ;   in Loop: Header=BB15_1508 Depth=1
	s_mov_b32 s1, -1
.LBB15_1513:                            ; %Flow1961
                                        ;   in Loop: Header=BB15_1508 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_1508
; %bb.1514:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1518
; %bb.1515:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[38:39] offset:40
	global_load_b64 v[7:8], v6, s[38:39] offset:24 glc
	global_load_b64 v[4:5], v6, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_1518
; %bb.1516:                             ; %.preheader.i.i.i37.i476.preheader
	s_mov_b32 s0, 0
.LBB15_1517:                            ; %.preheader.i.i.i37.i476
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_1517
.LBB15_1518:                            ; %__ockl_printf_append_args.exit41.i468
	s_or_b32 exec_lo, exec_lo, s1
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v58
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v58
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1524
; %bb.1519:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v0, s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[3:4], v0, s[38:39]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v6
	v_and_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[6:7]
	s_cbranch_execz .LBB15_1523
; %bb.1520:                             ; %.preheader3.i.i.i47.i475.preheader
	s_mov_b32 s3, 0
.LBB15_1521:                            ; %.preheader3.i.i.i47.i475
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[38:39] offset:40
	global_load_b64 v[8:9], v0, s[38:39]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v1, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, v4 :: v_dual_and_b32 v2, v2, v7
	v_mad_u64_u32 v[4:5], null, v2, 24, v[1:2]
	global_load_b64 v[4:5], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB15_1521
; %bb.1522:                             ; %Flow1954
	s_or_b32 exec_lo, exec_lo, s3
.LBB15_1523:                            ; %Flow1956
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_1524:                            ; %.loopexit4.i.i.i42.i469
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v59, 0
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[6:7], v59, s[38:39] offset:40
	global_load_b128 v[0:3], v59, s[38:39]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB15_1526
; %bb.1525:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v9, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, v59
	v_dual_mov_b32 v6, 2 :: v_dual_mov_b32 v7, 1
	global_store_b128 v[8:9], v[4:7], off offset:8
.LBB15_1526:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[58:59]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v58, 33 :: v_dual_mov_b32 v61, v59
	v_mov_b32_e32 v60, v59
	v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v5, s11
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[58:61], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB15_1534
; %bb.1527:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[38:39] offset:32 glc
	global_load_b64 v[2:3], v10, s[38:39] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB15_1530
; %bb.1528:                             ; %.preheader1.i.i.i45.i473.preheader
	s_mov_b32 s8, 0
.LBB15_1529:                            ; %.preheader1.i.i.i45.i473
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[38:39] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB15_1529
.LBB15_1530:                            ; %Flow1952
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[38:39] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB15_1532
; %bb.1531:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB15_1532:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB15_1534
; %bb.1533:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB15_1534:                            ; %Flow1953
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB15_1535:                            ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1537
; %bb.1536:                             ;   in Loop: Header=BB15_1535 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB15_1537:                            ;   in Loop: Header=BB15_1535 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB15_1539
; %bb.1538:                             ;   in Loop: Header=BB15_1535 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB15_1540
.LBB15_1539:                            ;   in Loop: Header=BB15_1535 Depth=1
	s_mov_b32 s1, -1
.LBB15_1540:                            ; %Flow1947
                                        ;   in Loop: Header=BB15_1535 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_1535
; %bb.1541:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB15_1545
; %bb.1542:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[38:39] offset:40
	global_load_b64 v[9:10], v8, s[38:39] offset:24 glc
	global_load_b64 v[6:7], v8, s[38:39]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB15_1545
; %bb.1543:                             ; %.preheader.i.i.i44.i472.preheader
	s_mov_b32 s0, 0
.LBB15_1544:                            ; %.preheader.i.i.i44.i472
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[38:39] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB15_1544
.LBB15_1545:                            ; %_ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE13showBasicInfoEv.exit504
	s_or_b32 exec_lo, exec_lo, s1
	s_load_b64 s[0:1], s[36:37], 0x4
	v_dual_mov_b32 v5, 0 :: v_dual_and_b32 v2, 0x3ff, v43
	v_bfe_u32 v3, v43, 10, 10
	v_bfe_u32 v4, v43, 20, 10
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[2:3], src_shared_base
	s_mov_b64 s[8:9], s[44:45]
	v_mov_b32_e32 v60, 1
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s0, 16
	v_mul_u32_u24_e32 v3, s1, v3
	s_mul_i32 s0, s0, s1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, .str.6@rel32@lo+4
	s_addc_u32 s5, s5, .str.6@rel32@hi+12
	v_mul_lo_u32 v2, s0, v2
	s_getpc_b64 s[48:49]
	s_add_u32 s48, s48, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s49, s49, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v58, v2, v3, v4
	v_dual_mov_b32 v4, s41 :: v_dual_lshlrev_b32 v59, 2, v58
	v_add_nc_u32_e32 v2, 0x1000, v58
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, 0x1400, v59
	v_cmp_ne_u32_e32 vcc_lo, -1, v59
	v_cmp_ne_u32_e64 s1, -1, v3
	v_cndmask_b32_e32 v44, 0, v59, vcc_lo
	v_cndmask_b32_e64 v46, 0, s3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v47, 0, v3, s1
	v_mov_b32_e32 v3, s5
	v_cmp_ne_u32_e64 s0, -1, v2
	v_cndmask_b32_e64 v57, 0, s3, s1
	v_cndmask_b32_e64 v45, 0, v2, s0
	v_mov_b32_e32 v2, s4
	v_cndmask_b32_e64 v56, 0, s3, s0
	s_swappc_b64 s[30:31], s[48:49]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, 16
	v_mov_b32_e32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_getpc_b64 s[50:51]
	s_add_u32 s50, s50, _ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE17showOrderBookInfoEv@rel32@lo+4
	s_addc_u32 s51, s51, _ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE17showOrderBookInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[50:51]
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[52:53]
	s_add_u32 s52, s52, __ockl_printf_begin@rel32@lo+4
	s_addc_u32 s53, s53, __ockl_printf_begin@rel32@hi+12
	s_swappc_b64 s[30:31], s[52:53]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.1@rel32@lo+4
	s_addc_u32 s1, s1, .str.1@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s2, 42, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s2
	s_mov_b64 s[8:9], s[44:45]
	s_swappc_b64 s[30:31], s[48:49]
	s_mov_b32 s0, 0x3fcccccd
	s_mov_b32 s1, 0x3e4ccccd
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
	v_dual_mov_b32 v2, 32 :: v_dual_mov_b32 v3, 0x404
	v_dual_mov_b32 v4, v44 :: v_dual_mov_b32 v5, v46
	s_clause 0x1
	scratch_store_b64 v72, v[0:1], off
	scratch_store_b64 v73, v[0:1], off
	ds_store_b8 v58, v60 offset:4096
	ds_store_2addr_stride64_b32 v59, v3, v2 offset1:20
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, s47
	v_dual_mov_b32 v2, v45 :: v_dual_mov_b32 v3, v56
	v_dual_mov_b32 v6, v47 :: v_dual_mov_b32 v7, v57
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE12processTradeERKbRKiRi@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE12processTradeERKbRKiRi@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, s47
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE22cancelAndSendNewOrdersEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE22cancelAndSendNewOrdersEv@rel32@hi+12
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE13showBasicInfoEv@rel32@lo+4
	s_addc_u32 s1, s1, _ZN10gpu_ginkgo12OrderHandlerILi100ELi10EE13showBasicInfoEv@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v31, v43 :: v_dual_mov_b32 v0, 16
	v_mov_b32_e32 v1, s47
	s_mov_b64 s[8:9], s[44:45]
	s_mov_b32 s12, s43
	s_swappc_b64 s[30:31], s[50:51]
	s_mov_b64 s[8:9], s[44:45]
	s_swappc_b64 s[30:31], s[52:53]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.2@rel32@lo+4
	s_addc_u32 s1, s1, .str.2@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s2, 29, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s2
	s_mov_b64 s[8:9], s[44:45]
	s_swappc_b64 s[30:31], s[48:49]
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4testv
		.amdhsa_group_segment_fixed_size 9216
		.amdhsa_private_segment_fixed_size 24736
		.amdhsa_kernarg_size 256
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 1
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 180
		.amdhsa_next_free_sgpr 60
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end15:
	.size	_Z4testv, .Lfunc_end15-_Z4testv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 87120
; NumSgprs: 62
; NumVgprs: 180
; ScratchSize: 24736
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 9216 bytes/workgroup (compile time only)
; SGPRBlocks: 7
; VGPRBlocks: 22
; NumSGPRsForWavesPerEU: 62
; NumVGPRsForWavesPerEU: 180
; Occupancy: 8
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,"axG",@progbits,_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,comdat
	.protected	_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ ; -- Begin function _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_
	.globl	_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_
	.p2align	8
	.type	_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,@function
_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_: ; @_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x10
	s_lshl_b32 s2, s15, 8
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s2, s6
	s_addc_u32 s3, 0, s7
	s_sub_u32 s4, s4, s2
	s_subb_u32 s5, s5, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s5, 0x100, s[4:5]
	s_and_b32 s5, s5, exec_lo
	s_cselect_b32 s4, s4, 0x100
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s4, v0
	s_cmpk_eq_i32 s4, 0x100
	s_cselect_b32 s4, -1, 0
	s_or_b32 s4, s4, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB16_2
; %bb.1:                                ; %.critedge24.sink.split
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x0
	s_load_b32 s6, s[0:1], 0x8
	v_lshlrev_b32_e32 v0, 2, v0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	v_add_co_u32 v0, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s1, 0, s0
	v_mov_b32_e32 v2, s6
	flat_store_b32 v[0:1], v2
.LBB16_2:                               ; %.critedge24
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,"axG",@progbits,_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,comdat
.Lfunc_end16:
	.size	_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_, .Lfunc_end16-_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 168
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	.str,@object                    ; @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.str:
	.asciz	"{{{{{{{{{{{{{  NEW BOOK UPDATE }}}}}}}}}}}}}\n"
	.size	.str, 46

	.type	.str.1,@object                  ; @.str.1
.str.1:
	.asciz	"{{{{{{{{{{{{{  TRADE COMES }}}}}}}}}}}}}\n"
	.size	.str.1, 42

	.type	.str.2,@object                  ; @.str.2
.str.2:
	.asciz	"\n <<< TEST FINISHED !!! >>>\n"
	.size	.str.2, 29

	.type	.str.3,@object                  ; @.str.3
.str.3:
	.asciz	"\n======================= ORDER BOOK =======================\n"
	.size	.str.3, 61

	.type	.str.4,@object                  ; @.str.4
.str.4:
	.asciz	"\n<<<<<  SELLING ORDERS  >>>>>\n"
	.size	.str.4, 31

	.type	.str.5,@object                  ; @.str.5
.str.5:
	.asciz	"\n<<<<<  BUYING ORDERS  >>>>>\n"
	.size	.str.5, 30

	.type	.str.6,@object                  ; @.str.6
.str.6:
	.asciz	"\n========================== END ===========================\n"
	.size	.str.6, 61

	.type	.str.7,@object                  ; @.str.7
.str.7:
	.asciz	"\n***** Showing LevelQty Information *****\n"
	.size	.str.7, 43

	.type	.str.8,@object                  ; @.str.8
.str.8:
	.asciz	"SELL\n"
	.size	.str.8, 6

	.type	.str.9,@object                  ; @.str.9
.str.9:
	.asciz	"BUY\n"
	.size	.str.9, 5

	.type	.str.10,@object                 ; @.str.10
.str.10:
	.asciz	"Total qty: %d\n"
	.size	.str.10, 15

	.type	.str.11,@object                 ; @.str.11
.str.11:
	.asciz	"price:\tlevel qty:\tlevel acked qty\n"
	.size	.str.11, 35

	.type	.str.12,@object                 ; @.str.12
.str.12:
	.asciz	"%d :\t%d :\t%d\n"
	.size	.str.12, 14

	.type	.str.13,@object                 ; @.str.13
.str.13:
	.asciz	"*************************************\n"
	.size	.str.13, 39

	.type	.str.14,@object                 ; @.str.14
.str.14:
	.asciz	"\n****** Showing Pending Orders ******\n"
	.size	.str.14, 39

	.type	.str.15,@object                 ; @.str.15
.str.15:
	.asciz	"There is no pending orders\n"
	.size	.str.15, 28

	.type	.str.16,@object                 ; @.str.16
.str.16:
	.asciz	"************************************\n"
	.size	.str.16, 38

	.type	.str.17,@object                 ; @.str.17
.str.17:
	.asciz	"From block #%d and thread #%d: \n"
	.size	.str.17, 33

	.type	.str.18,@object                 ; @.str.18
.str.18:
	.asciz	"Getting Order Info: \nprice: %d, qty: %d, q_befor: %d, q_after: %d, q_self: %d, acked_time: %.2f, cancel_time %.2f\n"
	.size	.str.18, 115

	.type	.str.19,@object                 ; @.str.19
.str.19:
	.asciz	"\n******* Showing Acked Orders *******\n"
	.size	.str.19, 39

	.type	.str.20,@object                 ; @.str.20
.str.20:
	.asciz	"There is no acked orders\n"
	.size	.str.20, 26

	.type	.str.21,@object                 ; @.str.21
.str.21:
	.asciz	"\n****** Showing Canceled Orders ******\n"
	.size	.str.21, 40

	.type	.str.22,@object                 ; @.str.22
.str.22:
	.asciz	"There is no canceled orders\n"
	.size	.str.22, 29

	.type	.str.23,@object                 ; @.str.23
.str.23:
	.asciz	"\n***** Showing Update Information *****\n"
	.size	.str.23, 41

	.type	.str.24,@object                 ; @.str.24
.str.24:
	.asciz	"Total filled qty = %d, filled pnl = %d\n"
	.size	.str.24, 40

	.type	.str.25,@object                 ; @.str.25
.str.25:
	.asciz	"\n======================= ORDER Info =======================\n"
	.size	.str.25, 61

	.type	.str.26,@object                 ; @.str.26
.str.26:
	.asciz	"Current Position = %d\n"
	.size	.str.26, 23

	.type	.str.27,@object                 ; @.str.27
.str.27:
	.asciz	"Total Pnl = %d\n"
	.size	.str.27, 16

	.type	.str.28,@object                 ; @.str.28
.str.28:
	.asciz	"Total Trade qty = %d\n"
	.size	.str.28, 22

	.type	.str.29,@object                 ; @.str.29
.str.29:
	.asciz	"An order is filled against a aggressive trade:filled_qty = %d, qty_left = %d; \n"
	.size	.str.29, 80

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         4
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         12
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         14
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         16
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         18
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         20
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         22
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         40
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         64
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         80
        .size:           8
        .value_kind:     hidden_hostcall_buffer
    .group_segment_fixed_size: 9216
    .kernarg_segment_align: 8
    .kernarg_segment_size: 256
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4testv
    .private_segment_fixed_size: 24736
    .sgpr_count:     62
    .sgpr_spill_count: 0
    .symbol:         _Z4testv.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     180
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           16
        .value_kind:     by_value
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           8
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 256
    .name:           _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
