#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/time.h>
#include <stdbool.h>

#define min(a,b) ((a) < (b) ? (a) : (b))
#define bufferSize 1024
#define NUMTHREAD 256
#define NUMBLOCK 64

char buffer[bufferSize];
// why deviceNum is 1 for default, it should be zero!!!!
int deviceNum = 1, debug = 0, randGen = 0, lenS, *m;
int nConInputStreams =1; // the number of concurrent streams of input
int nStream =4; //the number of streams
unsigned char *rS;
unsigned *lenC, *lenD, *n, power2[32];
unsigned bitMask[32] = {
  0x00000000, 0x80000000, 0xC0000000, 0xE0000000,
  0xF0000000, 0xF8000000, 0xFC000000, 0xFE000000,
  0xFF000000, 0xFF800000, 0xFFC00000, 0xFFE00000,
  0xFFF00000, 0xFFF80000, 0xFFFC0000, 0xFFFE0000,
  0xFFFF0000, 0xFFFF8000, 0xFFFFC000, 0xFFFFE000,
  0xFFFFF000, 0xFFFFF800, 0xFFFFFC00, 0xFFFFFE00,
  0xFFFFFF00, 0xFFFFFF80, 0xFFFFFFC0, 0xFFFFFFE0,
  0xFFFFFFF0, 0xFFFFFFF8, 0xFFFFFFFC, 0xFFFFFFFE,
};

/* the way of defining these array must change */
unsigned ***bitRS, *bitLenS, **bitC, *bitLenC, **bitD, **bitTmp;
unsigned ***gpuBitRS, **gpuBitC, **gpuBitD, **gpuBitTmp, **gpuParity;
cudaStream_t *streams; // streams

void bitPrint(unsigned *bitX, int length){
  int i, j, bitPos, tmp;

  bitPos = 31;
  j = 0;
  for(i=0;i<length;i++){
    tmp = bitX[j] & power2[bitPos];
    printf("%1d ",tmp?1:0);
    bitPos--;
    if (bitPos == -1) bitPos = 31, j++;
  }
  printf("\n");
}

void init(int argc, char* argv[]){
  int i, j, bitPos;
  FILE *fp = NULL;
  char* token;
  unsigned short randData[3];
  struct timeval tv;

  /* add nother input named (nConInputStreams) that determines the number of input streams */  
  if (argc < 3){
    printf("Usage: ./gpuBitStream filename length -c NumberofInputStreams -ns NumberofStreams -b debugLvl -d deviceNum\n");
    printf("\tto generate random string: ./gpuBitStream randGen length\n");
    exit(1);
  }
  if (argc > 3){
    i = 3;
    while (i<argc){
      if (!strcmp(argv[i],"-c")) sscanf(argv[i+1],"%d",&nConInputStreams);
	  if (!strcmp(argv[i],"-ns")) sscanf(argv[i+1],"%d",&nStream);
	  if (!strcmp(argv[i],"-b")) sscanf(argv[i+1],"%d",&debug);
      if (!strcmp(argv[i],"-d")) sscanf(argv[i+1],"%d",&deviceNum);	  
      i += 2;
    }
  }   
  if (strcmp(argv[1],"randGen") == 0) randGen = 1;
  else{
    randGen = 0;
    fp = fopen(argv[1],"r");
    if (!fp){
      printf("%s doesn't exist\n",argv[1]);
      exit(1);
    }
  }
  sscanf(argv[2],"%d",&lenS);
  if (lenS <= 0){
    printf("positive length needed\n");
    exit(1);
  }
  rS = (unsigned char*)malloc(sizeof(unsigned char)*lenS);
  if (randGen){
    gettimeofday(&tv,NULL);
    randData[0] = (unsigned short) tv.tv_usec;
    randData[1] = (unsigned short) tv.tv_sec;
    randData[2] = (unsigned short) (tv.tv_sec >> 16);
    rS[lenS-1] = 1;
    for(i=2;i<=lenS;i++) rS[lenS-i] = (erand48(randData) > 0.5) ? 1 : 0;
  }
  else{
    i = 0;
    while (fgets(buffer,bufferSize,fp) && i<lenS){
      token = strtok(buffer," ");
      while (token){
		rS[lenS-i-1] = atoi(token);
		i++;
		token = strtok(NULL," ");
      }
    }
    fclose(fp);
    if (i != lenS){
      printf("file has only %d bits\n",i);
      exit(1);
    }
  }

  power2[0] = 1;
  for(i=1;i<32;i++) power2[i] = 2*power2[i-1];  
  
  /* we have to have nConInputStreams array's for n streams*/
  bitRS = new unsigned**[nConInputStreams];
  bitC = new unsigned*[nConInputStreams];
  bitD = new unsigned*[nConInputStreams];
  bitTmp = new unsigned*[nConInputStreams];
  bitLenS = new unsigned[nConInputStreams];
  bitLenC = new unsigned[nConInputStreams];
  
  for(i=0; i<nConInputStreams; i++){
	// bitLenS is same for all streams for now... later might change
	bitLenS[i] = (lenS+31)/32;
	bitRS[i] = new unsigned*[32];
	for(j=0; j<32;j++)
		bitRS[i][j] = (unsigned*)malloc(sizeof(unsigned)*(bitLenS[i]+1));
	bitC[i] = (unsigned*)malloc(sizeof(unsigned)*bitLenS[i]);
	bitD[i] = (unsigned*)malloc(sizeof(unsigned)*(bitLenS[i]+1));
	bitD[i][0] = 0;
	bitD[i]++;
	bitTmp[i] = (unsigned*)malloc(sizeof(unsigned)*bitLenS[i]);
	j = 0;
	bitRS[i][0][j] = 0;
	bitPos = 31;
	int ix;
	for(ix=0;ix<lenS;ix++){
		if (rS[ix]) bitRS[i][0][j] |= power2[bitPos];
		bitPos--;
		if (bitPos == -1){
		  bitPos = 31;
		  j++;
		  bitRS[i][0][j] = 0;
		}
	}
	bitRS[i][0][bitLenS[i]] = 0;
	for(ix=1;ix<32;ix++){
		for(j=0;j<bitLenS[i];j++)
		  bitRS[i][ix][j] = (bitRS[i][0][j] << ix) |
		((bitRS[i][0][j+1] & bitMask[ix]) >> (32-ix));
		bitRS[i][ix][bitLenS[i]] = 0;
	}
  }                  
  
}

void initGPU(void){
  int i,j;
  int num_devices=0;
  cudaGetDeviceCount(&num_devices);
  // check if the command-line chosen device ID is within range, exit if not
  if( deviceNum >= num_devices )
  {
	printf("choose device ID between 0 and %d\n", num_devices-1);
	exit(1);
  }
  cudaSetDevice(deviceNum);
  cudaDeviceProp deviceProp;	
  cudaGetDeviceProperties(&deviceProp, deviceNum);
  printf("> Device name : %s\n", deviceProp.name );
  printf("> CUDA Capable SM %d.%d hardware with %d multi-processors\n", deviceProp.major, deviceProp.minor, deviceProp.multiProcessorCount); 
  
  // allocate and initialize an array of stream handles
  streams = (cudaStream_t*) malloc(nStream * sizeof(cudaStream_t));
  for(i=0; i<nStream; i++)
	cudaStreamCreate(&(streams[i])); 
	
  /* we have to change the memory allocation for gpu as well as we done for cpu */
  gpuBitRS = new unsigned**[nConInputStreams];
  gpuBitC = new unsigned*[nConInputStreams];
  gpuBitD = new unsigned*[nConInputStreams];
  gpuBitTmp = new unsigned*[nConInputStreams];
  gpuParity = new unsigned*[nConInputStreams];
  
  for(j=0; j<nConInputStreams; j++){	
	gpuBitRS[j] = new unsigned*[32];
	for(i=0;i<32;i++){
		cudaMalloc((void**)&gpuBitRS[j][i],sizeof(unsigned)*(bitLenS[j]+1));
		cudaMemcpy(gpuBitRS[j][i],bitRS[j][i],sizeof(unsigned)*(bitLenS[j]+1),cudaMemcpyHostToDevice);
	}
	cudaMalloc((void**)&gpuBitC[j],sizeof(unsigned)*bitLenS[j]);
	cudaMalloc((void**)&gpuBitD[j],sizeof(unsigned)*(bitLenS[j]+1));
	cudaMalloc((void**)&gpuBitTmp[j],sizeof(unsigned)*bitLenS[j]);
	cudaMalloc((void**)&gpuParity[j],sizeof(unsigned)*NUMBLOCK);
  }
  
}

__global__ void kernel1(unsigned* rS, unsigned* C, unsigned* parity, int lenC){
  __shared__ unsigned sParity[NUMTHREAD];
  int myC = blockIdx.x*blockDim.x + threadIdx.x;

  sParity[threadIdx.x] = 0;
  if (myC > lenC) return;
  while (myC <= lenC){
    sParity[threadIdx.x] ^= C[myC] & rS[myC];
    myC += NUMTHREAD*NUMBLOCK;
  }
  __syncthreads();
  if (NUMTHREAD >= 1024){
    if (threadIdx.x < 512)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+512];
    __syncthreads();
  }
  if (NUMTHREAD >= 512){
    if (threadIdx.x < 256)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+256];
    __syncthreads();
  }
  if (NUMTHREAD >= 256){
    if (threadIdx.x < 128)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+128];
    __syncthreads();
  }
  if (NUMTHREAD >= 128){
    if (threadIdx.x < 64)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+64];
    __syncthreads();
  }
  if (threadIdx.x < 32){
    volatile unsigned *tmem = sParity;
    if (NUMTHREAD >= 64)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+32];
    if (NUMTHREAD >= 32)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+16];
    if (NUMTHREAD >= 16)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+8];
    if (NUMTHREAD >= 8)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+4];
    if (NUMTHREAD >= 4)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+2];
    if (NUMTHREAD >= 2)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+1];
  }
  if (threadIdx.x == 0) parity[blockIdx.x] = sParity[0];
}

__global__ void kernel2(unsigned* parity, int num){
  __shared__ unsigned sParity[NUMBLOCK];

  sParity[threadIdx.x] = (threadIdx.x < num) ? parity[threadIdx.x] : 0;
  __syncthreads();
  if (NUMBLOCK >= 1024){
    if (threadIdx.x < 512)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+512];
    __syncthreads();
  }
  if (NUMBLOCK >= 512){
    if (threadIdx.x < 256)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+256];
    __syncthreads();
  }
  if (NUMBLOCK >= 256){
    if (threadIdx.x < 128)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+128];
    __syncthreads();
  }
  if (NUMBLOCK >= 128){
    if (threadIdx.x < 64)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+64];
    __syncthreads();
  }
  if (threadIdx.x < 32){
    volatile unsigned *tmem = sParity;
    if (NUMBLOCK >= 64)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+32];
    if (NUMBLOCK >= 32)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+16];
    if (NUMBLOCK >= 16)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+8];
    if (NUMBLOCK >= 8)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+4];
    if (NUMBLOCK >= 4)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+2];
    if (NUMBLOCK >= 2)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+1];
  }
  if (threadIdx.x == 0) parity[0] = sParity[0];
}

__global__ void
kernel3(unsigned* C, unsigned *D, int shiftD, unsigned mask, int num){
  int myIndex = blockIdx.x*blockDim.x + threadIdx.x;

  while (myIndex < num){
    C[myIndex] ^= ((D[myIndex-1] & ~mask) << (32-shiftD)) |
      ((D[myIndex] & mask) >> shiftD);
    myIndex += NUMTHREAD*NUMBLOCK;
  }
}

__global__ void kernel4(unsigned* C, unsigned* D, int num){
  int myIndex = blockIdx.x*blockDim.x + threadIdx.x;

  while (myIndex < num){
    C[myIndex] ^= D[myIndex];
    myIndex += NUMTHREAD*NUMBLOCK;
  }
}

void gpuBitStream(void){
  int i,j,t,index, *numBlock, *q, *r, *upperBound, *wordCnt, *shiftD, *startC, word, bitPos;
  unsigned *d;
  bool cond = true;
  
  d = new unsigned[nConInputStreams];
  n = new unsigned[nConInputStreams];
  lenC = new unsigned[nConInputStreams];
  lenD = new unsigned[nConInputStreams];
  m = new int[nConInputStreams];  
  q = new int[nConInputStreams];
  r = new int[nConInputStreams];
  upperBound = new int[nConInputStreams];
  numBlock = new int[nConInputStreams];
  startC = new int[nConInputStreams];
  shiftD = new int[nConInputStreams];
  wordCnt = new int[nConInputStreams];    
  
  for(i=0; i<nConInputStreams; i++){
	bitD[i][0] = bitC[i][0] = power2[31];
	for(j=1;j<bitLenS[i];j++) bitD[i][j] = bitC[i][j] = 0;			
	n[i] = lenC[i] = lenD[i] = 0;
	m[i] = -1;
	d[i] = 0;
  }   
   
  for(i=0;i<(nConInputStreams/nStream);i++){ 
	cond = true;
    // for now all the inputs have the same length (lenS)	
	for(j=0; j<nStream; j++){
		index = (i*nStream)+j;
		cudaMemcpyAsync(gpuBitC[index],bitC[index],sizeof(int)*bitLenS[index],cudaMemcpyHostToDevice,streams[j]);
		cudaMemcpyAsync(gpuBitD[index],bitD[index]-1,sizeof(int)*(bitLenS[index]+1),cudaMemcpyHostToDevice,streams[j]);
		gpuBitD[index]++;
	}
	
	while (cond == true){
		
		for(j=0; j<nStream; j++){
			// this part is serial in host CPU
			index = (i*nStream)+j;
			if(n[index]<lenS-1)
				cond = cond || true;
			else 
				cond = cond && false;
			
			q[index] = (lenS-1-n[index]) >> 5;
			r[index] = (lenS-1-n[index]) & ~bitMask[27];
			bitLenC[index] = (lenC[index]+1+31)>>5;
			numBlock[index] = (bitLenC[index]+NUMTHREAD-1)/NUMTHREAD * nStream;
			numBlock[index] = min(numBlock[index],NUMBLOCK);
		}											
		
		// executing the kernel1 for each stream		
		for(j=0; j<nStream; j++){
			index = (i*nStream)+j;
			kernel1<<<numBlock[index],NUMTHREAD, 0, streams[j]>>>(gpuBitRS[index][r[index]]+q[index],gpuBitC[index],gpuParity[index],bitLenC[index]);			
		}				
		// executing the kernel2 for each stream		
		for(j=0; j<nStream; j++){
			index = (i*nStream)+j;
			kernel2<<<1,NUMBLOCK, 0, streams[j]>>>(gpuParity[index],numBlock[index]);			
		}				
		for(j=0; j<nStream; j++){
			index = (i*nStream)+j;
			cudaMemcpyAsync(&d[index],gpuParity[index],sizeof(unsigned),cudaMemcpyDeviceToHost, streams[j]);			
		}		
		for(j=0; j<nStream; j++){
			index = (i*nStream)+j;
			d[index] = d[index]  - ((d[index] >> 1) & 0x55555555);
			d[index] = (d[index] & 0x33333333) + ((d[index] >> 2) & 0x33333333);
			d[index] = (((d[index] + (d[index] >> 4)) & 0xF0F0F0F) * 0x1010101) >> 24;
			
			if (d[index] & power2[0]){
				if (lenC[index]<=(n[index]>>1))
					cudaMemcpyAsync(gpuBitTmp[index],gpuBitC[index],sizeof(unsigned)*bitLenC[index],cudaMemcpyDeviceToDevice, streams[j]);					
				upperBound[index] = min(lenD[index]+1,lenS+m[index]-n[index]);
				startC[index] = (n[index]-m[index]) >> 5;
				shiftD[index] = (n[index]-m[index]) & ~bitMask[27];
				wordCnt[index] = 0;
				if (shiftD[index]){
					upperBound[index] -= (32-shiftD[index]);
					wordCnt[index]++;
				}
				wordCnt[index] += (upperBound[index]+31) >> 5;
				numBlock[index] = (wordCnt[index]+NUMTHREAD-1)/NUMTHREAD * nStream;
				numBlock[index] = min(numBlock[index],NUMBLOCK);
			}
		}
		
		for(j=0; j<nStream; j++){
			index = (i*nStream)+j;
			if (d[index] & power2[0]){
				if (shiftD[index])
					kernel3<<<numBlock[index],NUMTHREAD, 0, streams[j]>>>(gpuBitC[index]+startC[index],gpuBitD[index],shiftD[index],bitMask[32-shiftD[index]],wordCnt[index]);					
				else
					kernel4<<<numBlock[index],NUMTHREAD, 0, streams[j]>>>(gpuBitC[index]+startC[index],gpuBitD[index],wordCnt[index]);					
			}
		}		
		for(j=0; j<nStream; j++){
			index = (i*nStream)+j;
			if (d[index] & power2[0]){
				if (lenC[index]<=(n[index]>>1)){
					cudaMemcpyAsync(gpuBitD[index],gpuBitTmp[index],sizeof(unsigned)*bitLenC[index],cudaMemcpyDeviceToDevice,streams[j]);					
					lenD[index]= lenC[index];
					lenC[index] = n[index]+1-lenC[index];
					m[index] = n[index];
				}	
			}			
			n[index]++;			
		}		
	}
	
	for(j=0; j<nStream; j++){
		index = (i*nStream)+j;
		cudaMemcpyAsync(bitC[index],gpuBitC[index],sizeof(int)*bitLenS[index],cudaMemcpyDeviceToHost,streams[j]);			
	}
	
  }
  t = (nConInputStreams/nStream)*nStream;
  for(i=t; i<nConInputStreams; i++){
	// the remaining ...	
	for(j=0; j<(nConInputStreams - t); j++){
		index = i;
		cudaMemcpyAsync(gpuBitC[index],bitC[index],sizeof(int)*bitLenS[index],cudaMemcpyHostToDevice,streams[j]);
		cudaMemcpyAsync(gpuBitD[index],bitD[index]-1,sizeof(int)*(bitLenS[index]+1),cudaMemcpyHostToDevice,streams[j]);
		gpuBitD[index]++;
	}
	
	while (cond == true){		
		for(j=0; j<(nConInputStreams - t); j++){
			// this part is serial in host CPU
			index = i;
			if(n[index]<lenS-1)
				cond = cond || true;
			else 
				cond = cond && false;
			
			q[index] = (lenS-1-n[index]) >> 5;
			r[index] = (lenS-1-n[index]) & ~bitMask[27];
			bitLenC[index] = (lenC[index]+1+31)>>5;
			numBlock[index] = (bitLenC[index]+NUMTHREAD-1)/NUMTHREAD * nStream;
			numBlock[index] = min(numBlock[index],NUMBLOCK);
		}											
		
		// executing the kernel1 for each stream		
		for(j=0; j<(nConInputStreams - t); j++){
			index = i;
			kernel1<<<numBlock[index],NUMTHREAD, 0, streams[j]>>>(gpuBitRS[index][r[index]]+q[index],gpuBitC[index],gpuParity[index],bitLenC[index]);			
		}				
		// executing the kernel2 for each stream		
		for(j=0; j<(nConInputStreams - t); j++){
			index = i;
			kernel2<<<1,NUMBLOCK, 0, streams[j]>>>(gpuParity[index],numBlock[index]);			
		}				
		for(j=0; j<(nConInputStreams - t); j++){
			index = i;
			cudaMemcpyAsync(&d[index],gpuParity[index],sizeof(unsigned),cudaMemcpyDeviceToHost, streams[j]);			
		}		
		for(j=0; j<(nConInputStreams - t); j++){
			index = i;
			d[index] = d[index]  - ((d[index] >> 1) & 0x55555555);
			d[index] = (d[index] & 0x33333333) + ((d[index] >> 2) & 0x33333333);
			d[index] = (((d[index] + (d[index] >> 4)) & 0xF0F0F0F) * 0x1010101) >> 24;
			
			if (d[index] & power2[0]){
				if (lenC[index]<=(n[index]>>1))
					cudaMemcpyAsync(gpuBitTmp[index],gpuBitC[index],sizeof(unsigned)*bitLenC[index],cudaMemcpyDeviceToDevice, streams[j]);					
				upperBound[index] = min(lenD[index]+1,lenS+m[index]-n[index]);
				startC[index] = (n[index]-m[index]) >> 5;
				shiftD[index] = (n[index]-m[index]) & ~bitMask[27];
				wordCnt[index] = 0;
				if (shiftD[index]){
					upperBound[index] -= (32-shiftD[index]);
					wordCnt[index]++;
				}
				wordCnt[index] += (upperBound[index]+31) >> 5;
				numBlock[index] = (wordCnt[index]+NUMTHREAD-1)/NUMTHREAD * nStream;
				numBlock[index] = min(numBlock[index],NUMBLOCK);
			}
		}
		
		for(j=0; j<(nConInputStreams - t); j++){
			index = i;
			if (d[index] & power2[0]){
				if (shiftD[index])
					kernel3<<<numBlock[index],NUMTHREAD, 0, streams[j]>>>(gpuBitC[index]+startC[index],gpuBitD[index],shiftD[index],bitMask[32-shiftD[index]],wordCnt[index]);					
				else
					kernel4<<<numBlock[index],NUMTHREAD, 0, streams[j]>>>(gpuBitC[index]+startC[index],gpuBitD[index],wordCnt[index]);					
			}
		}
		
		for(j=0; j<(nConInputStreams - t); j++){
			index = i;
			if (lenC[index]<=(n[index]>>1)){
				cudaMemcpyAsync(gpuBitD[index],gpuBitTmp[index],sizeof(unsigned)*bitLenC[index],cudaMemcpyDeviceToDevice,streams[j]);				
				lenD[index]= lenC[index];
				lenC[index] = n[index]+1-lenC[index];
				m[index] = n[index];
			}			
			n[index]++;			
		}				
	}
	
	for(j=0; j<(nConInputStreams - t); j++){
		index = i;
		cudaMemcpyAsync(bitC[index],gpuBitC[index],sizeof(int)*bitLenS[index],cudaMemcpyDeviceToHost,streams[j]);			
	}
	
  }// end of remaining loop   
  
  for(i=0; i<nConInputStreams; i++){
	word = (lenC[i]+1) >> 5;
	bitPos = 32 - ((lenC[i]+1) & ~bitMask[27]);
	if (bitPos == 32){
		bitPos = 0;
		word--;
	}
	while(1){
		if ((bitC[i][word] & power2[bitPos]) == 0) lenC[i]--;
		else break;
		bitPos++;
		if (bitPos == 32){
		  bitPos = 0;
		  word--;
		}
	}
	if (debug){
		printf("gpuBitStream: degree is %d for input: %d\n",lenC[i],i);
		bitPrint(bitC[i],lenC[i]+1);
	}
  }
    
}

int main(int argc, char *argv[]){
  struct timeval tv1, tv2;
  int sec, usec,i;

  init(argc,argv);
  initGPU();
  printf("input length %d\n",lenS);

  gettimeofday(&tv1,NULL);
  gpuBitStream();
  gettimeofday(&tv2,NULL);
  sec = (int) (tv2.tv_sec-tv1.tv_sec);
  usec = (int) (tv2.tv_usec-tv1.tv_usec);
  if (usec < 0){
    sec--;
    usec += 1000000;
  }
  printf("gpuBitStream for %d inputs and %d streams: %f sec\n",nConInputStreams,nStream,sec+usec/1000000.0);
  
  // release resources
  for(i = 0; i < nStream; i++)
      cudaStreamDestroy(streams[i]);

  return 0;
}

	.file	"tmpxft_00397c89_00000000-6_gpuBitStream.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%1d "
.LC1:
	.string	"\n"
	.text
	.globl	_Z8bitPrintPji
	.type	_Z8bitPrintPji, @function
_Z8bitPrintPji:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	power2(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	$31, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 64
.L3:
	cmpl	%ebp, %r12d
	jge	.L8
	movslq	%ebx, %rdx
	movslq	%r13d, %rax
	movl	$2, %edi
	movl	(%r14,%rax,4), %eax
	andl	(%r15,%rdx,4), %eax
	leaq	.LC0(%rip), %rsi
	setne	%dl
	xorl	%eax, %eax
	movzbl	%dl, %edx
	call	__printf_chk@PLT
	subl	$1, %ebx
	jnb	.L4
	incl	%r13d
	movl	$31, %ebx
.L4:
	incl	%r12d
	jmp	.L3
.L8:
	popq	%rdx
	.cfi_def_cfa_offset 56
	leaq	.LC1(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z8bitPrintPji, .-_Z8bitPrintPji
	.section	.rodata.str1.1
.LC2:
	.string	"Usage: ./gpuBitStream filename length -c NumberofInputStreams -ns NumberofStreams -b debugLvl -d deviceNum\n"
.LC3:
	.string	"\tto generate random string: ./gpuBitStream randGen length\n"
.LC4:
	.string	"randGen"
.LC5:
	.string	"-c"
.LC6:
	.string	"%d"
.LC7:
	.string	"-ns"
.LC8:
	.string	"-b"
.LC9:
	.string	"-d"
.LC10:
	.string	"r"
.LC11:
	.string	"%s doesn't exist\n"
.LC12:
	.string	"positive length needed\n"
.LC14:
	.string	" "
.LC15:
	.string	"file has only %d bits\n"
	.text
	.globl	_Z4initiPPc
	.type	_Z4initiPPc, @function
_Z4initiPPc:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	jg	.L10
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC3(%rip), %rsi
	jmp	.L59
.L10:
	movl	%edi, %r12d
	movq	%rsi, %rbx
	movl	$3, %ebp
	leaq	.LC5(%rip), %r13
	cmpl	$3, %edi
	jne	.L11
.L18:
	movq	8(%rbx), %rbp
	leaq	.LC4(%rip), %rsi
	movq	%rbp, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L60
	movl	$1, randGen(%rip)
	xorl	%ebp, %ebp
	jmp	.L19
.L14:
	movq	(%rbx,%rbp,8), %rdi
	leaq	.LC7(%rip), %rsi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L15
	movq	8(%rbx,%rbp,8), %rdi
	leaq	nStream(%rip), %rdx
	leaq	.LC6(%rip), %rsi
	call	__isoc23_sscanf@PLT
.L15:
	movq	(%rbx,%rbp,8), %rdi
	leaq	.LC8(%rip), %rsi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L16
	movq	8(%rbx,%rbp,8), %rdi
	leaq	debug(%rip), %rdx
	leaq	.LC6(%rip), %rsi
	call	__isoc23_sscanf@PLT
.L16:
	movq	(%rbx,%rbp,8), %rdi
	leaq	.LC9(%rip), %rsi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L17
	movq	8(%rbx,%rbp,8), %rdi
	leaq	deviceNum(%rip), %rdx
	leaq	.LC6(%rip), %rsi
	call	__isoc23_sscanf@PLT
.L17:
	addq	$2, %rbp
	cmpl	%ebp, %r12d
	jle	.L18
.L11:
	movq	(%rbx,%rbp,8), %rdi
	movq	%r13, %rsi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L14
	movq	8(%rbx,%rbp,8), %rdi
	leaq	nConInputStreams(%rip), %rdx
	leaq	.LC6(%rip), %rsi
	call	__isoc23_sscanf@PLT
	jmp	.L14
.L60:
	xorl	%r10d, %r10d
	movq	%rbp, %rdi
	leaq	.LC10(%rip), %rsi
	movl	%r10d, randGen(%rip)
	call	fopen@PLT
	movq	%rax, %rbp
	testq	%rax, %rax
	jne	.L19
	movq	8(%rbx), %rdx
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L57:
	movl	$1, %edi
	call	exit@PLT
.L19:
	movq	16(%rbx), %rdi
	leaq	lenS(%rip), %rdx
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	call	__isoc23_sscanf@PLT
	movslq	lenS(%rip), %rdi
	testl	%edi, %edi
	jg	.L20
	leaq	.LC12(%rip), %rsi
.L59:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L57
.L20:
	call	malloc@PLT
	movl	randGen(%rip), %ebx
	leaq	buffer(%rip), %r12
	movq	%rax, rS(%rip)
	testl	%ebx, %ebx
	je	.L21
	movq	%rsp, %rdi
	xorl	%esi, %esi
	leaq	18(%rsp), %rbp
	movl	$2, %ebx
	call	gettimeofday@PLT
	movq	8(%rsp), %rax
	movq	rS(%rip), %rdx
	movw	%ax, 18(%rsp)
	movl	(%rsp), %eax
	movl	%eax, 20(%rsp)
	movslq	lenS(%rip), %rax
	movb	$1, -1(%rdx,%rax)
.L22:
	cmpl	%ebx, lenS(%rip)
	jl	.L24
	movq	%rbp, %rdi
	call	erand48@PLT
	movl	lenS(%rip), %eax
	movq	rS(%rip), %rdx
	subl	%ebx, %eax
	comisd	.LC13(%rip), %xmm0
	cltq
	seta	(%rdx,%rax)
	incl	%ebx
	jmp	.L22
.L21:
	movq	%rbp, %rcx
	movl	$1024, %edx
	movl	$1024, %esi
	movq	%r12, %rdi
	call	__fgets_chk@PLT
	testq	%rax, %rax
	je	.L26
	cmpl	%ebx, lenS(%rip)
	jle	.L26
	leaq	.LC14(%rip), %r13
	movq	%r12, %rdi
	movq	%r13, %rsi
.L56:
	call	strtok@PLT
	testq	%rax, %rax
	je	.L21
	movq	%rax, %rdi
	call	atoi@PLT
	movq	rS(%rip), %rdx
	movq	%r13, %rsi
	xorl	%edi, %edi
	movl	%eax, %ecx
	movl	lenS(%rip), %eax
	subl	%ebx, %eax
	incl	%ebx
	cltq
	movb	%cl, -1(%rdx,%rax)
	jmp	.L56
.L26:
	movq	%rbp, %rdi
	call	fclose@PLT
	cmpl	%ebx, lenS(%rip)
	je	.L24
	movl	%ebx, %edx
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L57
.L24:
	movl	$1, power2(%rip)
	leaq	power2(%rip), %rax
	leaq	124(%rax), %rcx
.L28:
	movl	(%rax), %ebx
	addq	$4, %rax
	leal	(%rbx,%rbx), %edx
	movl	%edx, (%rax)
	cmpq	%rax, %rcx
	jne	.L28
	movslq	nConInputStreams(%rip), %rdi
	movabsq	$1152921504606846975, %rbx
	cmpq	%rdi, %rbx
	jb	.L29
	salq	$3, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, bitRS(%rip)
	cmpq	%rdi, %rbx
	jnb	.L30
.L29:
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L58
	call	__cxa_throw_bad_array_new_length@PLT
.L30:
	salq	$3, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, bitC(%rip)
	cmpq	%rdi, %rbx
	jb	.L29
	salq	$3, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, bitD(%rip)
	cmpq	%rdi, %rbx
	jb	.L29
	movabsq	$2305843009213693950, %rbx
	salq	$3, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, bitTmp(%rip)
	cmpq	%rdi, %rbx
	jb	.L29
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, bitLenS(%rip)
	cmpq	%rdi, %rbx
	jb	.L29
	salq	$2, %rdi
	xorl	%r14d, %r14d
	leaq	bitMask(%rip), %r12
	call	_Znam@PLT
	movq	%rax, bitLenC(%rip)
.L32:
	cmpl	%r14d, nConInputStreams(%rip)
	jle	.L61
	movl	lenS(%rip), %eax
	movl	$32, %ecx
	movq	bitRS(%rip), %r15
	leaq	0(,%r14,8), %r13
	movl	$256, %edi
	leaq	0(,%r14,4), %rbx
	addl	$31, %eax
	addq	%r13, %r15
	cltd
	idivl	%ecx
	movq	bitLenS(%rip), %rdx
	movl	%eax, (%rdx,%r14,4)
	call	_Znam@PLT
	movq	%rax, (%r15)
	xorl	%r15d, %r15d
.L33:
	movq	bitRS(%rip), %rax
	movq	(%rax,%r13), %rbp
	movq	bitLenS(%rip), %rax
	movl	(%rax,%rbx), %eax
	leal	1(%rax), %edi
	salq	$2, %rdi
	call	malloc@PLT
	movq	%rax, 0(%rbp,%r15)
	addq	$8, %r15
	cmpq	$256, %r15
	jne	.L33
	movq	bitLenS(%rip), %rax
	movq	bitC(%rip), %r15
	movl	(%rax,%rbx), %edi
	addq	%r13, %r15
	salq	$2, %rdi
	call	malloc@PLT
	movq	%rax, (%r15)
	movq	bitLenS(%rip), %rax
	movq	bitD(%rip), %r15
	movl	(%rax,%rbx), %eax
	addq	%r13, %r15
	leal	1(%rax), %edi
	salq	$2, %rdi
	call	malloc@PLT
	xorl	%r8d, %r8d
	addq	bitTmp(%rip), %r13
	movl	%r8d, (%rax)
	addq	$4, %rax
	movq	%rax, (%r15)
	movq	bitLenS(%rip), %rax
	movl	(%rax,%rbx), %edi
	salq	$2, %rdi
	call	malloc@PLT
	xorl	%r9d, %r9d
	xorl	%ecx, %ecx
	movl	$31, %edx
	movq	%rax, 0(%r13)
	movq	0(%rbp), %rax
	xorl	%esi, %esi
	movl	%r9d, (%rax)
	movq	rS(%rip), %r9
.L34:
	cmpl	%ecx, lenS(%rip)
	jle	.L62
	cmpb	$0, (%r9,%rcx)
	je	.L35
	movslq	%esi, %rdi
	movslq	%edx, %r10
	leaq	power2(%rip), %r8
	movl	(%r8,%r10,4), %r10d
	orl	%r10d, (%rax,%rdi,4)
.L35:
	subl	$1, %edx
	jnb	.L36
	incl	%esi
	xorl	%edi, %edi
	movslq	%esi, %rdx
	movl	%edi, (%rax,%rdx,4)
	movl	$31, %edx
.L36:
	incq	%rcx
	jmp	.L34
.L62:
	addq	bitLenS(%rip), %rbx
	xorl	%esi, %esi
	movl	$1, %edi
	movl	$32, %r13d
	movl	(%rbx), %edx
	movl	%esi, (%rax,%rdx,4)
.L38:
	movl	%r13d, %r11d
	movq	0(%rbp,%rdi,8), %r10
	movl	%edi, %r9d
	xorl	%esi, %esi
	subl	%edi, %r11d
.L41:
	movl	(%rbx), %edx
	cmpl	%edx, %esi
	jnb	.L63
	movl	4(%rax,%rsi,4), %edx
	movl	(%rax,%rsi,4), %r8d
	movl	%r11d, %ecx
	andl	(%r12,%rdi,4), %edx
	shrl	%cl, %edx
	movl	%r9d, %ecx
	sall	%cl, %r8d
	orl	%r8d, %edx
	movl	%edx, (%r10,%rsi,4)
	incq	%rsi
	jmp	.L41
.L63:
	xorl	%ecx, %ecx
	incq	%rdi
	movl	%ecx, (%r10,%rdx,4)
	cmpq	$32, %rdi
	jne	.L38
	incq	%r14
	jmp	.L32
.L61:
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
.L58:
	call	__stack_chk_fail@PLT
.L43:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z4initiPPc, .-_Z4initiPPc
	.section	.rodata.str1.1
.LC16:
	.string	"choose device ID between 0 and %d\n"
.LC17:
	.string	"> Device name : %s\n"
.LC18:
	.string	"> CUDA Capable SM %d.%d hardware with %d multi-processors\n"
	.text
	.globl	_Z7initGPUv
	.type	_Z7initGPUv, @function
_Z7initGPUv:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$1064, %rsp
	.cfi_def_cfa_offset 1104
	movq	%fs:40, %rax
	movq	%rax, 1048(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rdi
	xorl	%eax, %eax
	movl	%eax, 12(%rsp)
	call	cudaGetDeviceCount@PLT
	movl	deviceNum(%rip), %edi
	movl	12(%rsp), %edx
	cmpl	%edx, %edi
	jl	.L65
	movl	$2, %edi
	decl	%edx
	leaq	.LC16(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L65:
	call	cudaSetDevice@PLT
	leaq	16(%rsp), %rbx
	movl	deviceNum(%rip), %esi
	movq	%rbx, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movq	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC17(%rip), %rsi
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
	movl	404(%rsp), %r8d
	xorl	%eax, %eax
	movl	380(%rsp), %ecx
	movl	376(%rsp), %edx
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movslq	nStream(%rip), %rdi
	salq	$3, %rdi
	call	malloc@PLT
	movq	%rax, streams(%rip)
.L66:
	cmpl	%ebx, nStream(%rip)
	jle	.L78
	movq	streams(%rip), %rax
	leaq	(%rax,%rbx,8), %rdi
	incq	%rbx
	call	cudaStreamCreate@PLT
	jmp	.L66
.L78:
	movslq	nConInputStreams(%rip), %rdi
	movabsq	$1152921504606846975, %rbx
	cmpq	%rdi, %rbx
	jb	.L68
	salq	$3, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, gpuBitRS(%rip)
	cmpq	%rdi, %rbx
	jnb	.L69
.L68:
	movq	1048(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L77
	call	__cxa_throw_bad_array_new_length@PLT
.L69:
	salq	$3, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, gpuBitC(%rip)
	cmpq	%rdi, %rbx
	jb	.L68
	salq	$3, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, gpuBitD(%rip)
	cmpq	%rdi, %rbx
	jb	.L68
	salq	$3, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, gpuBitTmp(%rip)
	cmpq	%rdi, %rbx
	jb	.L68
	salq	$3, %rdi
	xorl	%r12d, %r12d
	call	_Znam@PLT
	movq	%rax, gpuParity(%rip)
.L71:
	cmpl	%r12d, nConInputStreams(%rip)
	jle	.L79
	movq	gpuBitRS(%rip), %rbp
	leaq	0(,%r12,8), %rbx
	movl	$256, %edi
	leaq	0(,%r12,4), %r13
	call	_Znam@PLT
	addq	%rbx, %rbp
	movq	%rax, 0(%rbp)
	xorl	%ebp, %ebp
.L72:
	movq	bitLenS(%rip), %rax
	movl	(%rax,%r13), %eax
	leal	1(%rax), %esi
	movq	gpuBitRS(%rip), %rax
	salq	$2, %rsi
	movq	(%rax,%rbx), %rdi
	addq	%rbp, %rdi
	call	cudaMalloc@PLT
	movq	bitLenS(%rip), %rax
	movl	$1, %ecx
	movl	(%rax,%r13), %eax
	leal	1(%rax), %edx
	movq	bitRS(%rip), %rax
	salq	$2, %rdx
	movq	(%rax,%rbx), %rax
	movq	(%rax,%rbp), %rsi
	movq	gpuBitRS(%rip), %rax
	movq	(%rax,%rbx), %rax
	movq	(%rax,%rbp), %rdi
	addq	$8, %rbp
	call	cudaMemcpy@PLT
	cmpq	$256, %rbp
	jne	.L72
	movq	bitLenS(%rip), %rax
	movq	gpuBitC(%rip), %rdi
	incq	%r12
	movl	(%rax,%r13), %esi
	addq	%rbx, %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movq	bitLenS(%rip), %rax
	movq	gpuBitD(%rip), %rdi
	movl	(%rax,%r13), %eax
	addq	%rbx, %rdi
	leal	1(%rax), %esi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movq	bitLenS(%rip), %rax
	movq	gpuBitTmp(%rip), %rdi
	movl	(%rax,%r13), %esi
	addq	%rbx, %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	addq	gpuParity(%rip), %rbx
	movl	$256, %esi
	movq	%rbx, %rdi
	call	cudaMalloc@PLT
	jmp	.L71
.L79:
	movq	1048(%rsp), %rax
	subq	%fs:40, %rax
	je	.L74
.L77:
	call	__stack_chk_fail@PLT
.L74:
	addq	$1064, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z7initGPUv, .-_Z7initGPUv
	.globl	_Z31__device_stub__Z7kernel1PjS_S_iPjS_S_i
	.type	_Z31__device_stub__Z7kernel1PjS_S_iPjS_S_i, @function
_Z31__device_stub__Z7kernel1PjS_S_iPjS_S_i:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L80
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7kernel1PjS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L80:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L82
	call	__stack_chk_fail@PLT
.L82:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z31__device_stub__Z7kernel1PjS_S_iPjS_S_i, .-_Z31__device_stub__Z7kernel1PjS_S_iPjS_S_i
	.globl	_Z7kernel1PjS_S_i
	.type	_Z7kernel1PjS_S_i, @function
_Z7kernel1PjS_S_i:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z7kernel1PjS_S_iPjS_S_i
	.cfi_endproc
.LFE2057:
	.size	_Z7kernel1PjS_S_i, .-_Z7kernel1PjS_S_i
	.globl	_Z27__device_stub__Z7kernel2PjiPji
	.type	_Z27__device_stub__Z7kernel2PjiPji, @function
_Z27__device_stub__Z7kernel2PjiPji:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L85
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7kernel2Pji(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L85:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L87
	call	__stack_chk_fail@PLT
.L87:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z27__device_stub__Z7kernel2PjiPji, .-_Z27__device_stub__Z7kernel2PjiPji
	.globl	_Z7kernel2Pji
	.type	_Z7kernel2Pji, @function
_Z7kernel2Pji:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z7kernel2PjiPji
	.cfi_endproc
.LFE2059:
	.size	_Z7kernel2Pji, .-_Z7kernel2Pji
	.globl	_Z31__device_stub__Z7kernel3PjS_ijiPjS_iji
	.type	_Z31__device_stub__Z7kernel3PjS_ijiPjS_iji, @function
_Z31__device_stub__Z7kernel3PjS_ijiPjS_iji:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L90
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7kernel3PjS_iji(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L90:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L92
	call	__stack_chk_fail@PLT
.L92:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z31__device_stub__Z7kernel3PjS_ijiPjS_iji, .-_Z31__device_stub__Z7kernel3PjS_ijiPjS_iji
	.globl	_Z7kernel3PjS_iji
	.type	_Z7kernel3PjS_iji, @function
_Z7kernel3PjS_iji:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z7kernel3PjS_ijiPjS_iji
	.cfi_endproc
.LFE2061:
	.size	_Z7kernel3PjS_iji, .-_Z7kernel3PjS_iji
	.globl	_Z29__device_stub__Z7kernel4PjS_iPjS_i
	.type	_Z29__device_stub__Z7kernel4PjS_iPjS_i, @function
_Z29__device_stub__Z7kernel4PjS_iPjS_i:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L95
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7kernel4PjS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L95:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L97
	call	__stack_chk_fail@PLT
.L97:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z29__device_stub__Z7kernel4PjS_iPjS_i, .-_Z29__device_stub__Z7kernel4PjS_iPjS_i
	.globl	_Z7kernel4PjS_i
	.type	_Z7kernel4PjS_i, @function
_Z7kernel4PjS_i:
.LFB2063:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z7kernel4PjS_iPjS_i
	.cfi_endproc
.LFE2063:
	.size	_Z7kernel4PjS_i, .-_Z7kernel4PjS_i
	.section	.rodata.str1.1
.LC19:
	.string	"gpuBitStream: degree is %d for input: %d\n"
	.text
	.globl	_Z12gpuBitStreamv
	.type	_Z12gpuBitStreamv, @function
_Z12gpuBitStreamv:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movabsq	$2305843009213693950, %rbx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movslq	nConInputStreams(%rip), %rdi
	cmpq	%rdi, %rbx
	jb	.L101
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, %rbp
	cmpq	%rdi, %rbx
	jnb	.L102
.L101:
	call	__cxa_throw_bad_array_new_length@PLT
.L102:
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, n(%rip)
	cmpq	%rdi, %rbx
	jb	.L101
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, lenC(%rip)
	cmpq	%rdi, %rbx
	jb	.L101
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, lenD(%rip)
	cmpq	%rdi, %rbx
	jb	.L101
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, m(%rip)
	cmpq	%rdi, %rbx
	jb	.L101
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, 40(%rsp)
	cmpq	%rdi, %rbx
	jb	.L101
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, 48(%rsp)
	cmpq	%rdi, %rbx
	jb	.L101
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, 56(%rsp)
	cmpq	%rdi, %rbx
	jb	.L101
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, %r13
	cmpq	%rdi, %rbx
	jb	.L101
	movabsq	$2305843009213693950, %rbx
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, 16(%rsp)
	cmpq	%rdi, %rbx
	jb	.L101
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	nConInputStreams(%rip), %rdi
	movq	%rax, 64(%rsp)
	cmpq	%rdi, %rbx
	jb	.L101
	salq	$2, %rdi
	call	_Znam@PLT
	movq	bitC(%rip), %rdi
	movq	bitD(%rip), %r8
	movq	bitLenS(%rip), %r9
	movq	lenD(%rip), %r10
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movq	lenC(%rip), %r11
	movq	n(%rip), %rbx
	movq	m(%rip), %r12
.L103:
	cmpl	%eax, nConInputStreams(%rip)
	jle	.L200
	movl	124+power2(%rip), %edx
	movq	(%rdi,%rax,8), %rcx
	movq	(%r8,%rax,8), %rsi
	movl	%edx, (%rcx)
	movl	%edx, (%rsi)
	xorl	%edx, %edx
.L104:
	incq	%rdx
	cmpl	(%r9,%rax,4), %edx
	jnb	.L201
	xorl	%r15d, %r15d
	movl	%r15d, (%rcx,%rdx,4)
	movl	%r15d, (%rsi,%rdx,4)
	jmp	.L104
.L201:
	xorl	%esi, %esi
	xorl	%r14d, %r14d
	movl	%esi, (%r10,%rax,4)
	movl	%esi, (%r11,%rax,4)
	movl	%esi, (%rbx,%rax,4)
	movl	$-1, (%r12,%rax,4)
	movl	%r14d, 0(%rbp,%rax,4)
	incq	%rax
	jmp	.L103
.L200:
	movb	$1, 24(%rsp)
	xorl	%ebx, %ebx
	movabsq	$4294967552, %r14
.L107:
	movl	nConInputStreams(%rip), %eax
	movl	nStream(%rip), %r12d
	cltd
	idivl	%r12d
	cmpl	%ebx, %eax
	jle	.L202
	xorl	%r15d, %r15d
.L136:
	movl	nStream(%rip), %r12d
	cmpl	%r15d, %r12d
	jle	.L109
	imull	%ebx, %r12d
	movq	bitLenS(%rip), %rax
	movl	$1, %ecx
	addl	%r15d, %r12d
	movslq	%r12d, %r12
	movl	(%rax,%r12,4), %edx
	movq	bitC(%rip), %rax
	leaq	0(,%r12,8), %r9
	movq	%r9, 24(%rsp)
	movq	(%rax,%r12,8), %rsi
	movq	gpuBitC(%rip), %rax
	salq	$2, %rdx
	movq	(%rax,%r12,8), %rdi
	movq	streams(%rip), %rax
	movq	(%rax,%r15,8), %r8
	call	cudaMemcpyAsync@PLT
	movq	bitLenS(%rip), %rax
	movl	$1, %ecx
	movl	(%rax,%r12,4), %eax
	leal	1(%rax), %edx
	movq	bitD(%rip), %rax
	salq	$2, %rdx
	movq	(%rax,%r12,8), %rsi
	movq	gpuBitD(%rip), %rax
	movq	(%rax,%r12,8), %rdi
	movq	streams(%rip), %rax
	subq	$4, %rsi
	movq	(%rax,%r15,8), %r8
	incq	%r15
	call	cudaMemcpyAsync@PLT
	movq	24(%rsp), %rax
	addq	gpuBitD(%rip), %rax
	addq	$4, (%rax)
	jmp	.L136
.L109:
	movb	$1, 24(%rsp)
	movq	n(%rip), %r8
	xorl	%ecx, %ecx
	movq	lenC(%rip), %rdi
	movq	bitLenC(%rip), %rsi
.L134:
	movl	nStream(%rip), %edx
	cmpl	%ecx, %edx
	jle	.L203
	imull	%ebx, %edx
	movl	lenS(%rip), %eax
	movq	40(%rsp), %r11
	decl	%eax
	addl	%ecx, %edx
	movslq	%edx, %rdx
	movl	(%r8,%rdx,4), %r9d
	cmpl	%eax, %r9d
	setb	24(%rsp)
	subl	%r9d, %eax
	movl	%eax, %r9d
	shrl	$5, %r9d
	movl	%r9d, (%r11,%rdx,4)
	movl	108+bitMask(%rip), %r9d
	movq	48(%rsp), %r11
	notl	%r9d
	andl	%r9d, %eax
	movl	$64, %r9d
	movl	%eax, (%r11,%rdx,4)
	movl	(%rdi,%rdx,4), %eax
	addl	$32, %eax
	shrl	$5, %eax
	movl	%eax, (%rsi,%rdx,4)
	addl	$255, %eax
	shrl	$8, %eax
	imull	nStream(%rip), %eax
	cmpl	%r9d, %eax
	cmovg	%r9d, %eax
	incl	%ecx
	movl	%eax, 0(%r13,%rdx,4)
	jmp	.L134
.L203:
	xorl	%r15d, %r15d
.L111:
	movl	nStream(%rip), %r12d
	cmpl	%r15d, %r12d
	jle	.L204
	imull	%ebx, %r12d
	xorl	%r8d, %r8d
	movq	%r14, %rdx
	movl	$1, %ecx
	movq	%r14, 100(%rsp)
	movl	$1, 108(%rsp)
	addl	%r15d, %r12d
	movslq	%r12d, %r12
	movl	0(%r13,%r12,4), %eax
	movl	%eax, 88(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 92(%rsp)
	movq	streams(%rip), %rax
	movq	88(%rsp), %rdi
	movl	96(%rsp), %esi
	movq	(%rax,%r15,8), %r9
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L112
	movq	bitLenC(%rip), %rax
	movq	40(%rsp), %rdi
	movl	(%rax,%r12,4), %ecx
	movq	gpuParity(%rip), %rax
	movslq	(%rdi,%r12,4), %rdi
	movq	(%rax,%r12,8), %rdx
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%r12,8), %rsi
	movq	48(%rsp), %rax
	movslq	(%rax,%r12,4), %r8
	movq	gpuBitRS(%rip), %rax
	movq	(%rax,%r12,8), %rax
	movq	(%rax,%r8,8), %rax
	leaq	(%rax,%rdi,4), %rdi
	call	_Z31__device_stub__Z7kernel1PjS_S_iPjS_S_i
.L112:
	incq	%r15
	jmp	.L111
.L204:
	movabsq	$4294967360, %r12
	xorl	%r15d, %r15d
.L114:
	movl	nStream(%rip), %r10d
	cmpl	%r15d, %r10d
	jle	.L205
	xorl	%r8d, %r8d
	movq	%r12, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movq	streams(%rip), %rax
	movl	%r10d, 32(%rsp)
	movabsq	$4294967297, %rdi
	movq	%r12, 100(%rsp)
	movq	(%rax,%r15,8), %r9
	movl	$1, 108(%rsp)
	movq	%rdi, 88(%rsp)
	movl	$1, 96(%rsp)
	call	__cudaPushCallConfiguration@PLT
	movl	32(%rsp), %r10d
	testl	%eax, %eax
	jne	.L115
	movl	%r10d, %eax
	movq	gpuParity(%rip), %rdx
	imull	%ebx, %eax
	addl	%r15d, %eax
	cltq
	movl	0(%r13,%rax,4), %esi
	movq	(%rdx,%rax,8), %rdi
	call	_Z27__device_stub__Z7kernel2PjiPji
.L115:
	incq	%r15
	jmp	.L114
.L205:
	xorl	%r12d, %r12d
.L117:
	movl	nStream(%rip), %eax
	cmpl	%r12d, %eax
	jle	.L206
	imull	%ebx, %eax
	movq	gpuParity(%rip), %rdx
	movl	$2, %ecx
	addl	%r12d, %eax
	cltq
	movq	(%rdx,%rax,8), %rsi
	leaq	0(%rbp,%rax,4), %rdi
	movq	streams(%rip), %rax
	movl	$4, %edx
	movq	(%rax,%r12,8), %r8
	incq	%r12
	call	cudaMemcpyAsync@PLT
	jmp	.L117
.L206:
	xorl	%r12d, %r12d
.L119:
	movl	nStream(%rip), %r15d
	cmpl	%r12d, %r15d
	jle	.L207
	imull	%ebx, %r15d
	addl	%r12d, %r15d
	movslq	%r15d, %r15
	leaq	0(,%r15,4), %r10
	leaq	0(%rbp,%r10), %rdx
	movl	(%rdx), %eax
	movl	%eax, %ecx
	shrl	%ecx
	andl	$1431655765, %ecx
	subl	%ecx, %eax
	movl	%eax, %ecx
	andl	$858993459, %eax
	shrl	$2, %ecx
	andl	$858993459, %ecx
	addl	%eax, %ecx
	movl	%ecx, %eax
	shrl	$4, %eax
	addl	%ecx, %eax
	andl	$252645135, %eax
	imull	$16843009, %eax, %eax
	shrl	$24, %eax
	movl	%eax, (%rdx)
	andl	power2(%rip), %eax
	je	.L120
	movq	n(%rip), %rax
	movq	lenC(%rip), %rdx
	movl	(%rax,%r15,4), %eax
	shrl	%eax
	cmpl	(%rdx,%r15,4), %eax
	jb	.L121
	movq	bitLenC(%rip), %rax
	movl	$3, %ecx
	movq	%r10, 32(%rsp)
	movl	(%rax,%r15,4), %edx
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%r15,8), %rsi
	movq	gpuBitTmp(%rip), %rax
	salq	$2, %rdx
	movq	(%rax,%r15,8), %rdi
	movq	streams(%rip), %rax
	movq	(%rax,%r12,8), %r8
	call	cudaMemcpyAsync@PLT
	movq	32(%rsp), %r10
.L121:
	movq	m(%rip), %rax
	movl	(%rax,%r15,4), %edi
	movq	n(%rip), %rax
	movl	(%rax,%r15,4), %ecx
	movq	56(%rsp), %rax
	leaq	(%rax,%r10), %rsi
	movq	lenD(%rip), %rax
	movl	(%rax,%r15,4), %edx
	movl	lenS(%rip), %eax
	addl	%edi, %eax
	incl	%edx
	subl	%ecx, %eax
	cmpl	%eax, %edx
	cmova	%eax, %edx
	subl	%edi, %ecx
	movq	16(%rsp), %rdi
	movl	%ecx, %eax
	shrl	$5, %eax
	movl	%edx, (%rsi)
	movl	%eax, (%rdi,%r15,4)
	movl	108+bitMask(%rip), %eax
	notl	%eax
	andl	%ecx, %eax
	movq	64(%rsp), %rcx
	movl	%eax, (%rcx,%r15,4)
	movq	8(%rsp), %rcx
	addq	%rcx, %r10
	xorl	%ecx, %ecx
	movl	%ecx, (%r10)
	testl	%eax, %eax
	je	.L122
	leal	-32(%rdx,%rax), %eax
	movl	$1, (%r10)
	movl	%eax, (%rsi)
.L122:
	movl	(%rsi), %eax
	movl	$256, %esi
	addl	$31, %eax
	sarl	$5, %eax
	addl	(%r10), %eax
	movl	%eax, (%r10)
	addl	$255, %eax
	cltd
	idivl	%esi
	movl	$64, %edx
	imull	nStream(%rip), %eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	%eax, 0(%r13,%r15,4)
.L120:
	incq	%r12
	jmp	.L119
.L207:
	xorl	%r12d, %r12d
.L124:
	movl	nStream(%rip), %r15d
	cmpl	%r12d, %r15d
	jle	.L208
	imull	%ebx, %r15d
	addl	%r12d, %r15d
	movslq	%r15d, %r15
	movl	0(%rbp,%r15,4), %eax
	andl	power2(%rip), %eax
	je	.L125
	movq	64(%rsp), %rax
	movq	%r14, 100(%rsp)
	movl	$0, %r8d
	movq	%r14, %rdx
	movl	$1, 108(%rsp)
	movl	$1, %ecx
	movl	(%rax,%r15,4), %r10d
	movq	streams(%rip), %rax
	movq	(%rax,%r12,8), %r9
	movl	0(%r13,%r15,4), %eax
	testl	%r10d, %r10d
	movl	%r10d, 32(%rsp)
	movl	%eax, 88(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 92(%rsp)
	movq	88(%rsp), %rdi
	movl	96(%rsp), %esi
	je	.L126
	call	__cudaPushCallConfiguration@PLT
	movl	32(%rsp), %r10d
	testl	%eax, %eax
	jne	.L125
	movl	$32, %eax
	leaq	bitMask(%rip), %rdx
	subl	%r10d, %eax
	cltq
	movl	(%rdx,%rax,4), %ecx
	movq	gpuBitD(%rip), %rax
	movq	(%rax,%r15,8), %rsi
	movq	16(%rsp), %rax
	movslq	(%rax,%r15,4), %rdx
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%r15,8), %rax
	leaq	(%rax,%rdx,4), %rdi
	movq	8(%rsp), %rax
	movl	%r10d, %edx
	movl	(%rax,%r15,4), %r8d
	call	_Z31__device_stub__Z7kernel3PjS_ijiPjS_iji
	jmp	.L125
.L126:
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L125
	movq	8(%rsp), %rax
	movl	(%rax,%r15,4), %edx
	movq	gpuBitD(%rip), %rax
	movq	(%rax,%r15,8), %rsi
	movq	16(%rsp), %rax
	movslq	(%rax,%r15,4), %rcx
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%r15,8), %rax
	leaq	(%rax,%rcx,4), %rdi
	call	_Z29__device_stub__Z7kernel4PjS_iPjS_i
.L125:
	incq	%r12
	jmp	.L124
.L208:
	xorl	%r12d, %r12d
.L130:
	movl	nStream(%rip), %eax
	cmpl	%r12d, %eax
	jle	.L209
	imull	%ebx, %eax
	addl	%r12d, %eax
	movslq	%eax, %r15
	movl	0(%rbp,%r15,4), %eax
	andl	power2(%rip), %eax
	leaq	0(,%r15,4), %r9
	je	.L131
	movq	n(%rip), %rax
	movq	lenC(%rip), %rdx
	movl	(%rax,%r15,4), %eax
	shrl	%eax
	cmpl	(%rdx,%r15,4), %eax
	jb	.L131
	movq	bitLenC(%rip), %rax
	movl	$3, %ecx
	movq	%r9, 32(%rsp)
	movl	(%rax,%r15,4), %edx
	movq	gpuBitTmp(%rip), %rax
	movq	(%rax,%r15,8), %rsi
	movq	gpuBitD(%rip), %rax
	salq	$2, %rdx
	movq	(%rax,%r15,8), %rdi
	movq	streams(%rip), %rax
	movq	(%rax,%r12,8), %r8
	call	cudaMemcpyAsync@PLT
	movq	lenC(%rip), %rcx
	movq	32(%rsp), %r9
	movq	n(%rip), %rdx
	movq	lenD(%rip), %rax
	addq	%r9, %rcx
	movl	(%rcx), %esi
	addq	%r9, %rdx
	movl	%esi, (%rax,%r15,4)
	movl	(%rdx), %eax
	incl	%eax
	subl	%esi, %eax
	movl	%eax, (%rcx)
	movq	m(%rip), %rax
	movl	(%rdx), %edx
	movl	%edx, (%rax,%r15,4)
.L131:
	movq	n(%rip), %rax
	incq	%r12
	addq	%r9, %rax
	incl	(%rax)
	jmp	.L130
.L209:
	cmpb	$0, 24(%rsp)
	jne	.L109
	xorl	%r12d, %r12d
.L133:
	movl	nStream(%rip), %eax
	cmpl	%r12d, %eax
	jle	.L210
	imull	%ebx, %eax
	movq	gpuBitC(%rip), %rcx
	movq	bitLenS(%rip), %rdx
	addl	%r12d, %eax
	cltq
	movq	(%rcx,%rax,8), %rsi
	movq	bitC(%rip), %rcx
	movl	(%rdx,%rax,4), %edx
	movq	(%rcx,%rax,8), %rdi
	movq	streams(%rip), %rax
	movl	$2, %ecx
	salq	$2, %rdx
	movq	(%rax,%r12,8), %r8
	incq	%r12
	call	cudaMemcpyAsync@PLT
	jmp	.L133
.L210:
	incl	%ebx
	jmp	.L107
.L202:
	imull	%eax, %r12d
	movslq	%r12d, %r14
	leaq	0(%rbp,%r14,4), %rax
	movq	%rax, 32(%rsp)
.L137:
	cmpl	%r14d, nConInputStreams(%rip)
	jle	.L177
	leaq	0(,%r14,4), %rbx
	leaq	0(,%r14,8), %rbp
	xorl	%r15d, %r15d
.L167:
	movl	nConInputStreams(%rip), %eax
	subl	%r12d, %eax
	cmpl	%r15d, %eax
	jle	.L139
	movq	bitLenS(%rip), %rax
	movl	$1, %ecx
	movl	(%rax,%rbx), %edx
	movq	bitC(%rip), %rax
	movq	(%rax,%rbp), %rsi
	movq	gpuBitC(%rip), %rax
	salq	$2, %rdx
	movq	(%rax,%rbp), %rdi
	movq	streams(%rip), %rax
	movq	(%rax,%r15,8), %r8
	call	cudaMemcpyAsync@PLT
	movq	bitLenS(%rip), %rax
	movl	$1, %ecx
	movl	(%rax,%rbx), %eax
	leal	1(%rax), %edx
	movq	bitD(%rip), %rax
	salq	$2, %rdx
	movq	(%rax,%rbp), %rsi
	movq	gpuBitD(%rip), %rax
	movq	(%rax,%rbp), %rdi
	movq	streams(%rip), %rax
	subq	$4, %rsi
	movq	(%rax,%r15,8), %r8
	incq	%r15
	call	cudaMemcpyAsync@PLT
	movq	gpuBitD(%rip), %rax
	addq	%rbp, %rax
	addq	$4, (%rax)
	jmp	.L167
.L214:
	xorl	%r15d, %r15d
.L149:
	movl	nConInputStreams(%rip), %eax
	subl	%r12d, %eax
	cmpl	%r15d, %eax
	jg	.L153
	xorl	%r15d, %r15d
.L154:
	movl	nConInputStreams(%rip), %eax
	subl	%r12d, %eax
	cmpl	%r15d, %eax
	jg	.L159
	xorl	%r15d, %r15d
.L160:
	movl	nConInputStreams(%rip), %eax
	subl	%r12d, %eax
	cmpl	%r15d, %eax
	jg	.L162
.L139:
	cmpb	$0, 24(%rsp)
	je	.L176
	movq	n(%rip), %rdi
	movq	lenC(%rip), %rsi
	xorl	%edx, %edx
	movq	bitLenC(%rip), %rcx
	addq	%rbx, %rdi
	addq	%rbx, %rsi
	addq	%rbx, %rcx
.L164:
	movl	nConInputStreams(%rip), %eax
	subl	%r12d, %eax
	cmpl	%edx, %eax
	jle	.L211
	movl	lenS(%rip), %eax
	movl	(%rdi), %r8d
	movq	40(%rsp), %r11
	decl	%eax
	cmpl	%eax, %r8d
	setb	24(%rsp)
	subl	%r8d, %eax
	movl	%eax, %r8d
	shrl	$5, %r8d
	movl	%r8d, (%r11,%r14,4)
	movl	108+bitMask(%rip), %r8d
	movq	48(%rsp), %r11
	notl	%r8d
	andl	%r8d, %eax
	movl	$64, %r8d
	movl	%eax, (%r11,%r14,4)
	movl	(%rsi), %eax
	addl	$32, %eax
	shrl	$5, %eax
	movl	%eax, (%rcx)
	addl	$255, %eax
	shrl	$8, %eax
	imull	nStream(%rip), %eax
	cmpl	%r8d, %eax
	cmovg	%r8d, %eax
	incl	%edx
	movl	%eax, 0(%r13,%r14,4)
	jmp	.L164
.L211:
	xorl	%r15d, %r15d
.L141:
	movl	nConInputStreams(%rip), %eax
	subl	%r12d, %eax
	cmpl	%r15d, %eax
	jle	.L212
	movl	$16777217, %eax
	movl	$16777217, %edx
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$8, %rax
	salq	$8, %rdx
	movl	$1, 108(%rsp)
	movq	%rax, 100(%rsp)
	movl	0(%r13,%r14,4), %eax
	movl	%eax, 88(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 92(%rsp)
	movq	streams(%rip), %rax
	movq	88(%rsp), %rdi
	movl	96(%rsp), %esi
	movq	(%rax,%r15,8), %r9
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L142
	movq	bitLenC(%rip), %rax
	movq	40(%rsp), %rdi
	movl	(%rax,%rbx), %ecx
	movq	gpuParity(%rip), %rax
	movslq	(%rdi,%r14,4), %rdi
	movq	(%rax,%rbp), %rdx
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%rbp), %rsi
	movq	48(%rsp), %rax
	movslq	(%rax,%r14,4), %r8
	movq	gpuBitRS(%rip), %rax
	movq	(%rax,%rbp), %rax
	movq	(%rax,%r8,8), %rax
	leaq	(%rax,%rdi,4), %rdi
	call	_Z31__device_stub__Z7kernel1PjS_S_iPjS_S_i
.L142:
	incq	%r15
	jmp	.L141
.L212:
	xorl	%r15d, %r15d
.L144:
	movl	nConInputStreams(%rip), %eax
	subl	%r12d, %eax
	cmpl	%r15d, %eax
	jle	.L213
	movl	$67108865, %eax
	movl	$67108865, %edx
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$6, %rax
	salq	$6, %rdx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rax, 100(%rsp)
	movq	streams(%rip), %rax
	movl	$1, 108(%rsp)
	movq	(%rax,%r15,8), %r9
	movq	%rdi, 88(%rsp)
	movl	$1, 96(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L145
	movq	gpuParity(%rip), %rax
	movl	0(%r13,%r14,4), %esi
	movq	(%rax,%rbp), %rdi
	call	_Z27__device_stub__Z7kernel2PjiPji
.L145:
	incq	%r15
	jmp	.L144
.L213:
	xorl	%r15d, %r15d
.L147:
	movl	nConInputStreams(%rip), %eax
	subl	%r12d, %eax
	cmpl	%r15d, %eax
	jle	.L214
	movq	32(%rsp), %rdi
	movl	$2, %ecx
	movl	$4, %edx
	movq	gpuParity(%rip), %rax
	movq	(%rax,%rbp), %rsi
	movq	streams(%rip), %rax
	movq	(%rax,%r15,8), %r8
	incq	%r15
	call	cudaMemcpyAsync@PLT
	jmp	.L147
.L153:
	movq	32(%rsp), %rax
	movq	32(%rsp), %rsi
	movl	(%rax), %eax
	movl	%eax, %edx
	shrl	%edx
	andl	$1431655765, %edx
	subl	%edx, %eax
	movl	%eax, %edx
	andl	$858993459, %eax
	shrl	$2, %edx
	andl	$858993459, %edx
	addl	%eax, %edx
	movl	%edx, %eax
	shrl	$4, %eax
	addl	%edx, %eax
	andl	$252645135, %eax
	imull	$16843009, %eax, %eax
	shrl	$24, %eax
	movl	%eax, (%rsi)
	andl	power2(%rip), %eax
	je	.L150
	movq	n(%rip), %rax
	movq	lenC(%rip), %rdx
	movl	(%rax,%rbx), %eax
	shrl	%eax
	cmpl	(%rdx,%rbx), %eax
	jb	.L151
	movq	bitLenC(%rip), %rax
	movl	$3, %ecx
	movl	(%rax,%rbx), %edx
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%rbp), %rsi
	movq	gpuBitTmp(%rip), %rax
	salq	$2, %rdx
	movq	(%rax,%rbp), %rdi
	movq	streams(%rip), %rax
	movq	(%rax,%r15,8), %r8
	call	cudaMemcpyAsync@PLT
.L151:
	movq	m(%rip), %rax
	movl	(%rax,%rbx), %esi
	movq	n(%rip), %rax
	movl	(%rax,%rbx), %ecx
	movq	lenD(%rip), %rax
	movl	(%rax,%rbx), %edx
	movl	lenS(%rip), %eax
	addl	%esi, %eax
	incl	%edx
	subl	%ecx, %eax
	cmpl	%eax, %edx
	cmova	%eax, %edx
	movq	56(%rsp), %rax
	subl	%esi, %ecx
	movq	16(%rsp), %rsi
	movl	%edx, (%rax,%r14,4)
	movl	%ecx, %eax
	shrl	$5, %eax
	movl	%eax, (%rsi,%r14,4)
	movl	108+bitMask(%rip), %eax
	movq	64(%rsp), %rsi
	notl	%eax
	andl	%ecx, %eax
	movq	8(%rsp), %rcx
	movl	%eax, (%rsi,%r14,4)
	movl	$0, (%rcx,%r14,4)
	je	.L152
	movq	56(%rsp), %rsi
	leal	-32(%rdx,%rax), %eax
	movl	$1, (%rcx,%r14,4)
	movl	%eax, (%rsi,%r14,4)
.L152:
	movq	56(%rsp), %rax
	movq	8(%rsp), %rcx
	movl	(%rax,%r14,4), %eax
	movl	%eax, 76(%rsp)
	addl	$31, %eax
	sarl	$5, %eax
	addl	(%rcx,%r14,4), %eax
	movl	%eax, (%rcx,%r14,4)
	addl	$255, %eax
	movl	$256, %ecx
	cltd
	idivl	%ecx
	movl	$64, %edx
	imull	nStream(%rip), %eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	%eax, 0(%r13,%r14,4)
.L150:
	incq	%r15
	jmp	.L149
.L159:
	movq	32(%rsp), %rax
	movl	(%rax), %eax
	andl	power2(%rip), %eax
	je	.L155
	movq	64(%rsp), %rax
	movl	(%rax,%r14,4), %r11d
	movq	streams(%rip), %rax
	testl	%r11d, %r11d
	movq	(%rax,%r15,8), %r9
	movl	%r11d, 76(%rsp)
	movl	0(%r13,%r14,4), %eax
	je	.L156
	movl	$16777217, %esi
	movl	%eax, 88(%rsp)
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	salq	$8, %rsi
	movq	%rax, 92(%rsp)
	movq	88(%rsp), %rdi
	movl	$1, %ecx
	movq	%rsi, 100(%rsp)
	movq	%rsi, %rdx
	movl	96(%rsp), %esi
	movl	$1, 108(%rsp)
	call	__cudaPushCallConfiguration@PLT
	movl	76(%rsp), %r11d
	testl	%eax, %eax
	jne	.L155
	movl	$32, %eax
	leaq	bitMask(%rip), %rdx
	subl	%r11d, %eax
	cltq
	movl	(%rdx,%rax,4), %ecx
	movq	gpuBitD(%rip), %rax
	movq	(%rax,%rbp), %rsi
	movq	16(%rsp), %rax
	movslq	(%rax,%r14,4), %rdx
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%rbp), %rax
	leaq	(%rax,%rdx,4), %rdi
	movq	8(%rsp), %rax
	movl	%r11d, %edx
	movl	(%rax,%r14,4), %r8d
	call	_Z31__device_stub__Z7kernel3PjS_ijiPjS_iji
	jmp	.L155
.L156:
	movl	%eax, 88(%rsp)
	movl	$16777217, %ecx
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	salq	$8, %rcx
	movq	%rax, 92(%rsp)
	movq	88(%rsp), %rdi
	movl	96(%rsp), %esi
	movq	%rcx, 100(%rsp)
	movq	%rcx, %rdx
	movl	$1, %ecx
	movl	$1, 108(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L155
	movq	8(%rsp), %rax
	movl	(%rax,%r14,4), %edx
	movq	gpuBitD(%rip), %rax
	movq	(%rax,%rbp), %rsi
	movq	16(%rsp), %rax
	movslq	(%rax,%r14,4), %rcx
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%rbp), %rax
	leaq	(%rax,%rcx,4), %rdi
	call	_Z29__device_stub__Z7kernel4PjS_iPjS_i
.L155:
	incq	%r15
	jmp	.L154
.L162:
	movq	n(%rip), %rax
	movq	lenC(%rip), %rdx
	movl	(%rax,%rbx), %eax
	shrl	%eax
	cmpl	(%rdx,%rbx), %eax
	jb	.L161
	movq	bitLenC(%rip), %rax
	movl	$3, %ecx
	movl	(%rax,%rbx), %edx
	movq	gpuBitTmp(%rip), %rax
	movq	(%rax,%rbp), %rsi
	movq	gpuBitD(%rip), %rax
	salq	$2, %rdx
	movq	(%rax,%rbp), %rdi
	movq	streams(%rip), %rax
	movq	(%rax,%r15,8), %r8
	call	cudaMemcpyAsync@PLT
	movq	lenC(%rip), %rcx
	movq	n(%rip), %rdx
	movq	lenD(%rip), %rax
	addq	%rbx, %rcx
	addq	%rbx, %rdx
	movl	(%rcx), %esi
	movl	%esi, (%rax,%rbx)
	movl	(%rdx), %eax
	incl	%eax
	subl	%esi, %eax
	movl	%eax, (%rcx)
	movq	m(%rip), %rax
	movl	(%rdx), %edx
	movl	%edx, (%rax,%rbx)
.L161:
	movq	n(%rip), %rax
	incq	%r15
	addq	%rbx, %rax
	incl	(%rax)
	jmp	.L160
.L176:
	xorl	%r15d, %r15d
.L163:
	movl	nConInputStreams(%rip), %eax
	subl	%r12d, %eax
	cmpl	%r15d, %eax
	jle	.L215
	movq	bitLenS(%rip), %rax
	movl	$2, %ecx
	movl	(%rax,%rbx), %edx
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%rbp), %rsi
	movq	bitC(%rip), %rax
	salq	$2, %rdx
	movq	(%rax,%rbp), %rdi
	movq	streams(%rip), %rax
	movq	(%rax,%r15,8), %r8
	incq	%r15
	call	cudaMemcpyAsync@PLT
	jmp	.L163
.L215:
	addq	$4, 32(%rsp)
	incq	%r14
	jmp	.L137
.L177:
	xorl	%ebx, %ebx
	leaq	power2(%rip), %rbp
.L166:
	cmpl	%ebx, nConInputStreams(%rip)
	jle	.L216
	movq	lenC(%rip), %rsi
	leaq	0(,%rbx,4), %r12
	movl	108+bitMask(%rip), %ecx
	addq	%r12, %rsi
	notl	%ecx
	movl	(%rsi), %eax
	incl	%eax
	movl	%eax, %edx
	andl	%eax, %ecx
	movl	$32, %eax
	subl	%ecx, %eax
	shrl	$5, %edx
	cmpl	$32, %eax
	jne	.L168
	decl	%edx
	xorl	%eax, %eax
.L168:
	movq	bitC(%rip), %rcx
	leaq	0(,%rbx,8), %r13
	movq	(%rcx,%rbx,8), %r8
.L169:
	movslq	%edx, %rcx
	movslq	%eax, %rdi
	movl	(%r8,%rcx,4), %ecx
	andl	0(%rbp,%rdi,4), %ecx
	jne	.L170
	incl	%eax
	decl	(%rsi)
	cmpl	$32, %eax
	jne	.L169
	decl	%edx
	xorl	%eax, %eax
	jmp	.L169
.L170:
	cmpl	$0, debug(%rip)
	je	.L172
	movl	(%rsi), %edx
	movl	$2, %edi
	leaq	.LC19(%rip), %rsi
	movl	%ebx, %ecx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	lenC(%rip), %rax
	movl	(%rax,%r12), %esi
	movq	bitC(%rip), %rax
	movq	(%rax,%r13), %rdi
	incl	%esi
	call	_Z8bitPrintPji
.L172:
	incq	%rbx
	jmp	.L166
.L216:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z12gpuBitStreamv, .-_Z12gpuBitStreamv
	.section	.rodata.str1.1
.LC20:
	.string	"input length %d\n"
.LC22:
	.string	"gpuBitStream for %d inputs and %d streams: %f sec\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	subq	$48, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	_Z4initiPPc
	call	_Z7initGPUv
	movl	lenS(%rip), %edx
	leaq	.LC20(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	8(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	call	_Z12gpuBitStreamv
	leaq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movq	24(%rsp), %rdx
	movq	32(%rsp), %rax
	subl	8(%rsp), %edx
	subl	16(%rsp), %eax
	jns	.L218
	decl	%edx
	addl	$1000000, %eax
.L218:
	cvtsi2sdl	%edx, %xmm1
	movl	nStream(%rip), %ecx
	xorl	%ebx, %ebx
	movl	nConInputStreams(%rip), %edx
	cvtsi2sdl	%eax, %xmm0
	divsd	.LC21(%rip), %xmm0
	leaq	.LC22(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	addsd	%xmm1, %xmm0
	call	__printf_chk@PLT
.L219:
	cmpl	%ebx, nStream(%rip)
	jle	.L223
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %rdi
	incq	%rbx
	call	cudaStreamDestroy@PLT
	jmp	.L219
.L223:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L221
	call	__stack_chk_fail@PLT
.L221:
	addq	$48, %rsp
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC23:
	.string	"_Z7kernel4PjS_i"
.LC24:
	.string	"_Z7kernel3PjS_iji"
.LC25:
	.string	"_Z7kernel2Pji"
.LC26:
	.string	"_Z7kernel1PjS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2065:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC23(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7kernel4PjS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC24(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7kernel3PjS_iji(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC25(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7kernel2Pji(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC26(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7kernel1PjS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2065:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	streams
	.bss
	.align 8
	.type	streams, @object
	.size	streams, 8
streams:
	.zero	8
	.globl	gpuParity
	.align 8
	.type	gpuParity, @object
	.size	gpuParity, 8
gpuParity:
	.zero	8
	.globl	gpuBitTmp
	.align 8
	.type	gpuBitTmp, @object
	.size	gpuBitTmp, 8
gpuBitTmp:
	.zero	8
	.globl	gpuBitD
	.align 8
	.type	gpuBitD, @object
	.size	gpuBitD, 8
gpuBitD:
	.zero	8
	.globl	gpuBitC
	.align 8
	.type	gpuBitC, @object
	.size	gpuBitC, 8
gpuBitC:
	.zero	8
	.globl	gpuBitRS
	.align 8
	.type	gpuBitRS, @object
	.size	gpuBitRS, 8
gpuBitRS:
	.zero	8
	.globl	bitTmp
	.align 8
	.type	bitTmp, @object
	.size	bitTmp, 8
bitTmp:
	.zero	8
	.globl	bitD
	.align 8
	.type	bitD, @object
	.size	bitD, 8
bitD:
	.zero	8
	.globl	bitLenC
	.align 8
	.type	bitLenC, @object
	.size	bitLenC, 8
bitLenC:
	.zero	8
	.globl	bitC
	.align 8
	.type	bitC, @object
	.size	bitC, 8
bitC:
	.zero	8
	.globl	bitLenS
	.align 8
	.type	bitLenS, @object
	.size	bitLenS, 8
bitLenS:
	.zero	8
	.globl	bitRS
	.align 8
	.type	bitRS, @object
	.size	bitRS, 8
bitRS:
	.zero	8
	.globl	bitMask
	.data
	.align 32
	.type	bitMask, @object
	.size	bitMask, 128
bitMask:
	.long	0
	.long	-2147483648
	.long	-1073741824
	.long	-536870912
	.long	-268435456
	.long	-134217728
	.long	-67108864
	.long	-33554432
	.long	-16777216
	.long	-8388608
	.long	-4194304
	.long	-2097152
	.long	-1048576
	.long	-524288
	.long	-262144
	.long	-131072
	.long	-65536
	.long	-32768
	.long	-16384
	.long	-8192
	.long	-4096
	.long	-2048
	.long	-1024
	.long	-512
	.long	-256
	.long	-128
	.long	-64
	.long	-32
	.long	-16
	.long	-8
	.long	-4
	.long	-2
	.globl	power2
	.bss
	.align 32
	.type	power2, @object
	.size	power2, 128
power2:
	.zero	128
	.globl	n
	.align 8
	.type	n, @object
	.size	n, 8
n:
	.zero	8
	.globl	lenD
	.align 8
	.type	lenD, @object
	.size	lenD, 8
lenD:
	.zero	8
	.globl	lenC
	.align 8
	.type	lenC, @object
	.size	lenC, 8
lenC:
	.zero	8
	.globl	rS
	.align 8
	.type	rS, @object
	.size	rS, 8
rS:
	.zero	8
	.globl	nStream
	.data
	.align 4
	.type	nStream, @object
	.size	nStream, 4
nStream:
	.long	4
	.globl	nConInputStreams
	.align 4
	.type	nConInputStreams, @object
	.size	nConInputStreams, 4
nConInputStreams:
	.long	1
	.globl	m
	.bss
	.align 8
	.type	m, @object
	.size	m, 8
m:
	.zero	8
	.globl	lenS
	.align 4
	.type	lenS, @object
	.size	lenS, 4
lenS:
	.zero	4
	.globl	randGen
	.align 4
	.type	randGen, @object
	.size	randGen, 4
randGen:
	.zero	4
	.globl	debug
	.align 4
	.type	debug, @object
	.size	debug, 4
debug:
	.zero	4
	.globl	deviceNum
	.data
	.align 4
	.type	deviceNum, @object
	.size	deviceNum, 4
deviceNum:
	.long	1
	.globl	buffer
	.bss
	.align 32
	.type	buffer, @object
	.size	buffer, 1024
buffer:
	.zero	1024
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC13:
	.long	0
	.long	1071644672
	.align 8
.LC21:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/time.h>
#include <stdbool.h>

#define min(a,b) ((a) < (b) ? (a) : (b))
#define bufferSize 1024
#define NUMTHREAD 256
#define NUMBLOCK 64

char buffer[bufferSize];
// why deviceNum is 1 for default, it should be zero!!!!
int deviceNum = 1, debug = 0, randGen = 0, lenS, *m;
int nConInputStreams =1; // the number of concurrent streams of input
int nStream =4; //the number of streams
unsigned char *rS;
unsigned *lenC, *lenD, *n, power2[32];
unsigned bitMask[32] = {
  0x00000000, 0x80000000, 0xC0000000, 0xE0000000,
  0xF0000000, 0xF8000000, 0xFC000000, 0xFE000000,
  0xFF000000, 0xFF800000, 0xFFC00000, 0xFFE00000,
  0xFFF00000, 0xFFF80000, 0xFFFC0000, 0xFFFE0000,
  0xFFFF0000, 0xFFFF8000, 0xFFFFC000, 0xFFFFE000,
  0xFFFFF000, 0xFFFFF800, 0xFFFFFC00, 0xFFFFFE00,
  0xFFFFFF00, 0xFFFFFF80, 0xFFFFFFC0, 0xFFFFFFE0,
  0xFFFFFFF0, 0xFFFFFFF8, 0xFFFFFFFC, 0xFFFFFFFE,
};

/* the way of defining these array must change */
unsigned ***bitRS, *bitLenS, **bitC, *bitLenC, **bitD, **bitTmp;
unsigned ***gpuBitRS, **gpuBitC, **gpuBitD, **gpuBitTmp, **gpuParity;
hipStream_t *streams; // streams

void bitPrint(unsigned *bitX, int length){
  int i, j, bitPos, tmp;

  bitPos = 31;
  j = 0;
  for(i=0;i<length;i++){
    tmp = bitX[j] & power2[bitPos];
    printf("%1d ",tmp?1:0);
    bitPos--;
    if (bitPos == -1) bitPos = 31, j++;
  }
  printf("\n");
}

void init(int argc, char* argv[]){
  int i, j, bitPos;
  FILE *fp = NULL;
  char* token;
  unsigned short randData[3];
  struct timeval tv;

  /* add nother input named (nConInputStreams) that determines the number of input streams */  
  if (argc < 3){
    printf("Usage: ./gpuBitStream filename length -c NumberofInputStreams -ns NumberofStreams -b debugLvl -d deviceNum\n");
    printf("\tto generate random string: ./gpuBitStream randGen length\n");
    exit(1);
  }
  if (argc > 3){
    i = 3;
    while (i<argc){
      if (!strcmp(argv[i],"-c")) sscanf(argv[i+1],"%d",&nConInputStreams);
	  if (!strcmp(argv[i],"-ns")) sscanf(argv[i+1],"%d",&nStream);
	  if (!strcmp(argv[i],"-b")) sscanf(argv[i+1],"%d",&debug);
      if (!strcmp(argv[i],"-d")) sscanf(argv[i+1],"%d",&deviceNum);	  
      i += 2;
    }
  }   
  if (strcmp(argv[1],"randGen") == 0) randGen = 1;
  else{
    randGen = 0;
    fp = fopen(argv[1],"r");
    if (!fp){
      printf("%s doesn't exist\n",argv[1]);
      exit(1);
    }
  }
  sscanf(argv[2],"%d",&lenS);
  if (lenS <= 0){
    printf("positive length needed\n");
    exit(1);
  }
  rS = (unsigned char*)malloc(sizeof(unsigned char)*lenS);
  if (randGen){
    gettimeofday(&tv,NULL);
    randData[0] = (unsigned short) tv.tv_usec;
    randData[1] = (unsigned short) tv.tv_sec;
    randData[2] = (unsigned short) (tv.tv_sec >> 16);
    rS[lenS-1] = 1;
    for(i=2;i<=lenS;i++) rS[lenS-i] = (erand48(randData) > 0.5) ? 1 : 0;
  }
  else{
    i = 0;
    while (fgets(buffer,bufferSize,fp) && i<lenS){
      token = strtok(buffer," ");
      while (token){
		rS[lenS-i-1] = atoi(token);
		i++;
		token = strtok(NULL," ");
      }
    }
    fclose(fp);
    if (i != lenS){
      printf("file has only %d bits\n",i);
      exit(1);
    }
  }

  power2[0] = 1;
  for(i=1;i<32;i++) power2[i] = 2*power2[i-1];  
  
  /* we have to have nConInputStreams array's for n streams*/
  bitRS = new unsigned**[nConInputStreams];
  bitC = new unsigned*[nConInputStreams];
  bitD = new unsigned*[nConInputStreams];
  bitTmp = new unsigned*[nConInputStreams];
  bitLenS = new unsigned[nConInputStreams];
  bitLenC = new unsigned[nConInputStreams];
  
  for(i=0; i<nConInputStreams; i++){
	// bitLenS is same for all streams for now... later might change
	bitLenS[i] = (lenS+31)/32;
	bitRS[i] = new unsigned*[32];
	for(j=0; j<32;j++)
		bitRS[i][j] = (unsigned*)malloc(sizeof(unsigned)*(bitLenS[i]+1));
	bitC[i] = (unsigned*)malloc(sizeof(unsigned)*bitLenS[i]);
	bitD[i] = (unsigned*)malloc(sizeof(unsigned)*(bitLenS[i]+1));
	bitD[i][0] = 0;
	bitD[i]++;
	bitTmp[i] = (unsigned*)malloc(sizeof(unsigned)*bitLenS[i]);
	j = 0;
	bitRS[i][0][j] = 0;
	bitPos = 31;
	int ix;
	for(ix=0;ix<lenS;ix++){
		if (rS[ix]) bitRS[i][0][j] |= power2[bitPos];
		bitPos--;
		if (bitPos == -1){
		  bitPos = 31;
		  j++;
		  bitRS[i][0][j] = 0;
		}
	}
	bitRS[i][0][bitLenS[i]] = 0;
	for(ix=1;ix<32;ix++){
		for(j=0;j<bitLenS[i];j++)
		  bitRS[i][ix][j] = (bitRS[i][0][j] << ix) |
		((bitRS[i][0][j+1] & bitMask[ix]) >> (32-ix));
		bitRS[i][ix][bitLenS[i]] = 0;
	}
  }                  
  
}

void initGPU(void){
  int i,j;
  int num_devices=0;
  hipGetDeviceCount(&num_devices);
  // check if the command-line chosen device ID is within range, exit if not
  if( deviceNum >= num_devices )
  {
	printf("choose device ID between 0 and %d\n", num_devices-1);
	exit(1);
  }
  hipSetDevice(deviceNum);
  hipDeviceProp_t deviceProp;	
  hipGetDeviceProperties(&deviceProp, deviceNum);
  printf("> Device name : %s\n", deviceProp.name );
  printf("> CUDA Capable SM %d.%d hardware with %d multi-processors\n", deviceProp.major, deviceProp.minor, deviceProp.multiProcessorCount); 
  
  // allocate and initialize an array of stream handles
  streams = (hipStream_t*) malloc(nStream * sizeof(hipStream_t));
  for(i=0; i<nStream; i++)
	hipStreamCreate(&(streams[i])); 
	
  /* we have to change the memory allocation for gpu as well as we done for cpu */
  gpuBitRS = new unsigned**[nConInputStreams];
  gpuBitC = new unsigned*[nConInputStreams];
  gpuBitD = new unsigned*[nConInputStreams];
  gpuBitTmp = new unsigned*[nConInputStreams];
  gpuParity = new unsigned*[nConInputStreams];
  
  for(j=0; j<nConInputStreams; j++){	
	gpuBitRS[j] = new unsigned*[32];
	for(i=0;i<32;i++){
		hipMalloc((void**)&gpuBitRS[j][i],sizeof(unsigned)*(bitLenS[j]+1));
		hipMemcpy(gpuBitRS[j][i],bitRS[j][i],sizeof(unsigned)*(bitLenS[j]+1),hipMemcpyHostToDevice);
	}
	hipMalloc((void**)&gpuBitC[j],sizeof(unsigned)*bitLenS[j]);
	hipMalloc((void**)&gpuBitD[j],sizeof(unsigned)*(bitLenS[j]+1));
	hipMalloc((void**)&gpuBitTmp[j],sizeof(unsigned)*bitLenS[j]);
	hipMalloc((void**)&gpuParity[j],sizeof(unsigned)*NUMBLOCK);
  }
  
}

__global__ void kernel1(unsigned* rS, unsigned* C, unsigned* parity, int lenC){
  __shared__ unsigned sParity[NUMTHREAD];
  int myC = blockIdx.x*blockDim.x + threadIdx.x;

  sParity[threadIdx.x] = 0;
  if (myC > lenC) return;
  while (myC <= lenC){
    sParity[threadIdx.x] ^= C[myC] & rS[myC];
    myC += NUMTHREAD*NUMBLOCK;
  }
  __syncthreads();
  if (NUMTHREAD >= 1024){
    if (threadIdx.x < 512)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+512];
    __syncthreads();
  }
  if (NUMTHREAD >= 512){
    if (threadIdx.x < 256)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+256];
    __syncthreads();
  }
  if (NUMTHREAD >= 256){
    if (threadIdx.x < 128)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+128];
    __syncthreads();
  }
  if (NUMTHREAD >= 128){
    if (threadIdx.x < 64)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+64];
    __syncthreads();
  }
  if (threadIdx.x < 32){
    volatile unsigned *tmem = sParity;
    if (NUMTHREAD >= 64)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+32];
    if (NUMTHREAD >= 32)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+16];
    if (NUMTHREAD >= 16)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+8];
    if (NUMTHREAD >= 8)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+4];
    if (NUMTHREAD >= 4)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+2];
    if (NUMTHREAD >= 2)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+1];
  }
  if (threadIdx.x == 0) parity[blockIdx.x] = sParity[0];
}

__global__ void kernel2(unsigned* parity, int num){
  __shared__ unsigned sParity[NUMBLOCK];

  sParity[threadIdx.x] = (threadIdx.x < num) ? parity[threadIdx.x] : 0;
  __syncthreads();
  if (NUMBLOCK >= 1024){
    if (threadIdx.x < 512)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+512];
    __syncthreads();
  }
  if (NUMBLOCK >= 512){
    if (threadIdx.x < 256)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+256];
    __syncthreads();
  }
  if (NUMBLOCK >= 256){
    if (threadIdx.x < 128)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+128];
    __syncthreads();
  }
  if (NUMBLOCK >= 128){
    if (threadIdx.x < 64)
      sParity[threadIdx.x] ^= sParity[threadIdx.x+64];
    __syncthreads();
  }
  if (threadIdx.x < 32){
    volatile unsigned *tmem = sParity;
    if (NUMBLOCK >= 64)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+32];
    if (NUMBLOCK >= 32)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+16];
    if (NUMBLOCK >= 16)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+8];
    if (NUMBLOCK >= 8)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+4];
    if (NUMBLOCK >= 4)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+2];
    if (NUMBLOCK >= 2)
      tmem[threadIdx.x] ^= tmem[threadIdx.x+1];
  }
  if (threadIdx.x == 0) parity[0] = sParity[0];
}

__global__ void
kernel3(unsigned* C, unsigned *D, int shiftD, unsigned mask, int num){
  int myIndex = blockIdx.x*blockDim.x + threadIdx.x;

  while (myIndex < num){
    C[myIndex] ^= ((D[myIndex-1] & ~mask) << (32-shiftD)) |
      ((D[myIndex] & mask) >> shiftD);
    myIndex += NUMTHREAD*NUMBLOCK;
  }
}

__global__ void kernel4(unsigned* C, unsigned* D, int num){
  int myIndex = blockIdx.x*blockDim.x + threadIdx.x;

  while (myIndex < num){
    C[myIndex] ^= D[myIndex];
    myIndex += NUMTHREAD*NUMBLOCK;
  }
}

void gpuBitStream(void){
  int i,j,t,index, *numBlock, *q, *r, *upperBound, *wordCnt, *shiftD, *startC, word, bitPos;
  unsigned *d;
  bool cond = true;
  
  d = new unsigned[nConInputStreams];
  n = new unsigned[nConInputStreams];
  lenC = new unsigned[nConInputStreams];
  lenD = new unsigned[nConInputStreams];
  m = new int[nConInputStreams];  
  q = new int[nConInputStreams];
  r = new int[nConInputStreams];
  upperBound = new int[nConInputStreams];
  numBlock = new int[nConInputStreams];
  startC = new int[nConInputStreams];
  shiftD = new int[nConInputStreams];
  wordCnt = new int[nConInputStreams];    
  
  for(i=0; i<nConInputStreams; i++){
	bitD[i][0] = bitC[i][0] = power2[31];
	for(j=1;j<bitLenS[i];j++) bitD[i][j] = bitC[i][j] = 0;			
	n[i] = lenC[i] = lenD[i] = 0;
	m[i] = -1;
	d[i] = 0;
  }   
   
  for(i=0;i<(nConInputStreams/nStream);i++){ 
	cond = true;
    // for now all the inputs have the same length (lenS)	
	for(j=0; j<nStream; j++){
		index = (i*nStream)+j;
		hipMemcpyAsync(gpuBitC[index],bitC[index],sizeof(int)*bitLenS[index],hipMemcpyHostToDevice,streams[j]);
		hipMemcpyAsync(gpuBitD[index],bitD[index]-1,sizeof(int)*(bitLenS[index]+1),hipMemcpyHostToDevice,streams[j]);
		gpuBitD[index]++;
	}
	
	while (cond == true){
		
		for(j=0; j<nStream; j++){
			// this part is serial in host CPU
			index = (i*nStream)+j;
			if(n[index]<lenS-1)
				cond = cond || true;
			else 
				cond = cond && false;
			
			q[index] = (lenS-1-n[index]) >> 5;
			r[index] = (lenS-1-n[index]) & ~bitMask[27];
			bitLenC[index] = (lenC[index]+1+31)>>5;
			numBlock[index] = (bitLenC[index]+NUMTHREAD-1)/NUMTHREAD * nStream;
			numBlock[index] = min(numBlock[index],NUMBLOCK);
		}											
		
		// executing the kernel1 for each stream		
		for(j=0; j<nStream; j++){
			index = (i*nStream)+j;
			kernel1<<<numBlock[index],NUMTHREAD, 0, streams[j]>>>(gpuBitRS[index][r[index]]+q[index],gpuBitC[index],gpuParity[index],bitLenC[index]);			
		}				
		// executing the kernel2 for each stream		
		for(j=0; j<nStream; j++){
			index = (i*nStream)+j;
			kernel2<<<1,NUMBLOCK, 0, streams[j]>>>(gpuParity[index],numBlock[index]);			
		}				
		for(j=0; j<nStream; j++){
			index = (i*nStream)+j;
			hipMemcpyAsync(&d[index],gpuParity[index],sizeof(unsigned),hipMemcpyDeviceToHost, streams[j]);			
		}		
		for(j=0; j<nStream; j++){
			index = (i*nStream)+j;
			d[index] = d[index]  - ((d[index] >> 1) & 0x55555555);
			d[index] = (d[index] & 0x33333333) + ((d[index] >> 2) & 0x33333333);
			d[index] = (((d[index] + (d[index] >> 4)) & 0xF0F0F0F) * 0x1010101) >> 24;
			
			if (d[index] & power2[0]){
				if (lenC[index]<=(n[index]>>1))
					hipMemcpyAsync(gpuBitTmp[index],gpuBitC[index],sizeof(unsigned)*bitLenC[index],hipMemcpyDeviceToDevice, streams[j]);					
				upperBound[index] = min(lenD[index]+1,lenS+m[index]-n[index]);
				startC[index] = (n[index]-m[index]) >> 5;
				shiftD[index] = (n[index]-m[index]) & ~bitMask[27];
				wordCnt[index] = 0;
				if (shiftD[index]){
					upperBound[index] -= (32-shiftD[index]);
					wordCnt[index]++;
				}
				wordCnt[index] += (upperBound[index]+31) >> 5;
				numBlock[index] = (wordCnt[index]+NUMTHREAD-1)/NUMTHREAD * nStream;
				numBlock[index] = min(numBlock[index],NUMBLOCK);
			}
		}
		
		for(j=0; j<nStream; j++){
			index = (i*nStream)+j;
			if (d[index] & power2[0]){
				if (shiftD[index])
					kernel3<<<numBlock[index],NUMTHREAD, 0, streams[j]>>>(gpuBitC[index]+startC[index],gpuBitD[index],shiftD[index],bitMask[32-shiftD[index]],wordCnt[index]);					
				else
					kernel4<<<numBlock[index],NUMTHREAD, 0, streams[j]>>>(gpuBitC[index]+startC[index],gpuBitD[index],wordCnt[index]);					
			}
		}		
		for(j=0; j<nStream; j++){
			index = (i*nStream)+j;
			if (d[index] & power2[0]){
				if (lenC[index]<=(n[index]>>1)){
					hipMemcpyAsync(gpuBitD[index],gpuBitTmp[index],sizeof(unsigned)*bitLenC[index],hipMemcpyDeviceToDevice,streams[j]);					
					lenD[index]= lenC[index];
					lenC[index] = n[index]+1-lenC[index];
					m[index] = n[index];
				}	
			}			
			n[index]++;			
		}		
	}
	
	for(j=0; j<nStream; j++){
		index = (i*nStream)+j;
		hipMemcpyAsync(bitC[index],gpuBitC[index],sizeof(int)*bitLenS[index],hipMemcpyDeviceToHost,streams[j]);			
	}
	
  }
  t = (nConInputStreams/nStream)*nStream;
  for(i=t; i<nConInputStreams; i++){
	// the remaining ...	
	for(j=0; j<(nConInputStreams - t); j++){
		index = i;
		hipMemcpyAsync(gpuBitC[index],bitC[index],sizeof(int)*bitLenS[index],hipMemcpyHostToDevice,streams[j]);
		hipMemcpyAsync(gpuBitD[index],bitD[index]-1,sizeof(int)*(bitLenS[index]+1),hipMemcpyHostToDevice,streams[j]);
		gpuBitD[index]++;
	}
	
	while (cond == true){		
		for(j=0; j<(nConInputStreams - t); j++){
			// this part is serial in host CPU
			index = i;
			if(n[index]<lenS-1)
				cond = cond || true;
			else 
				cond = cond && false;
			
			q[index] = (lenS-1-n[index]) >> 5;
			r[index] = (lenS-1-n[index]) & ~bitMask[27];
			bitLenC[index] = (lenC[index]+1+31)>>5;
			numBlock[index] = (bitLenC[index]+NUMTHREAD-1)/NUMTHREAD * nStream;
			numBlock[index] = min(numBlock[index],NUMBLOCK);
		}											
		
		// executing the kernel1 for each stream		
		for(j=0; j<(nConInputStreams - t); j++){
			index = i;
			kernel1<<<numBlock[index],NUMTHREAD, 0, streams[j]>>>(gpuBitRS[index][r[index]]+q[index],gpuBitC[index],gpuParity[index],bitLenC[index]);			
		}				
		// executing the kernel2 for each stream		
		for(j=0; j<(nConInputStreams - t); j++){
			index = i;
			kernel2<<<1,NUMBLOCK, 0, streams[j]>>>(gpuParity[index],numBlock[index]);			
		}				
		for(j=0; j<(nConInputStreams - t); j++){
			index = i;
			hipMemcpyAsync(&d[index],gpuParity[index],sizeof(unsigned),hipMemcpyDeviceToHost, streams[j]);			
		}		
		for(j=0; j<(nConInputStreams - t); j++){
			index = i;
			d[index] = d[index]  - ((d[index] >> 1) & 0x55555555);
			d[index] = (d[index] & 0x33333333) + ((d[index] >> 2) & 0x33333333);
			d[index] = (((d[index] + (d[index] >> 4)) & 0xF0F0F0F) * 0x1010101) >> 24;
			
			if (d[index] & power2[0]){
				if (lenC[index]<=(n[index]>>1))
					hipMemcpyAsync(gpuBitTmp[index],gpuBitC[index],sizeof(unsigned)*bitLenC[index],hipMemcpyDeviceToDevice, streams[j]);					
				upperBound[index] = min(lenD[index]+1,lenS+m[index]-n[index]);
				startC[index] = (n[index]-m[index]) >> 5;
				shiftD[index] = (n[index]-m[index]) & ~bitMask[27];
				wordCnt[index] = 0;
				if (shiftD[index]){
					upperBound[index] -= (32-shiftD[index]);
					wordCnt[index]++;
				}
				wordCnt[index] += (upperBound[index]+31) >> 5;
				numBlock[index] = (wordCnt[index]+NUMTHREAD-1)/NUMTHREAD * nStream;
				numBlock[index] = min(numBlock[index],NUMBLOCK);
			}
		}
		
		for(j=0; j<(nConInputStreams - t); j++){
			index = i;
			if (d[index] & power2[0]){
				if (shiftD[index])
					kernel3<<<numBlock[index],NUMTHREAD, 0, streams[j]>>>(gpuBitC[index]+startC[index],gpuBitD[index],shiftD[index],bitMask[32-shiftD[index]],wordCnt[index]);					
				else
					kernel4<<<numBlock[index],NUMTHREAD, 0, streams[j]>>>(gpuBitC[index]+startC[index],gpuBitD[index],wordCnt[index]);					
			}
		}
		
		for(j=0; j<(nConInputStreams - t); j++){
			index = i;
			if (lenC[index]<=(n[index]>>1)){
				hipMemcpyAsync(gpuBitD[index],gpuBitTmp[index],sizeof(unsigned)*bitLenC[index],hipMemcpyDeviceToDevice,streams[j]);				
				lenD[index]= lenC[index];
				lenC[index] = n[index]+1-lenC[index];
				m[index] = n[index];
			}			
			n[index]++;			
		}				
	}
	
	for(j=0; j<(nConInputStreams - t); j++){
		index = i;
		hipMemcpyAsync(bitC[index],gpuBitC[index],sizeof(int)*bitLenS[index],hipMemcpyDeviceToHost,streams[j]);			
	}
	
  }// end of remaining loop   
  
  for(i=0; i<nConInputStreams; i++){
	word = (lenC[i]+1) >> 5;
	bitPos = 32 - ((lenC[i]+1) & ~bitMask[27]);
	if (bitPos == 32){
		bitPos = 0;
		word--;
	}
	while(1){
		if ((bitC[i][word] & power2[bitPos]) == 0) lenC[i]--;
		else break;
		bitPos++;
		if (bitPos == 32){
		  bitPos = 0;
		  word--;
		}
	}
	if (debug){
		printf("gpuBitStream: degree is %d for input: %d\n",lenC[i],i);
		bitPrint(bitC[i],lenC[i]+1);
	}
  }
    
}

int main(int argc, char *argv[]){
  struct timeval tv1, tv2;
  int sec, usec,i;

  init(argc,argv);
  initGPU();
  printf("input length %d\n",lenS);

  gettimeofday(&tv1,NULL);
  gpuBitStream();
  gettimeofday(&tv2,NULL);
  sec = (int) (tv2.tv_sec-tv1.tv_sec);
  usec = (int) (tv2.tv_usec-tv1.tv_usec);
  if (usec < 0){
    sec--;
    usec += 1000000;
  }
  printf("gpuBitStream for %d inputs and %d streams: %f sec\n",nConInputStreams,nStream,sec+usec/1000000.0);
  
  // release resources
  for(i = 0; i < nStream; i++)
      hipStreamDestroy(streams[i]);

  return 0;
}

	.text
	.file	"gpuBitStream.hip"
	.globl	_Z8bitPrintPji                  # -- Begin function _Z8bitPrintPji
	.type	_Z8bitPrintPji,@function
_Z8bitPrintPji:                         # @_Z8bitPrintPji
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movq	%rdi, %r14
	movl	$31, %ebp
	movl	$31, %r15d
	xorl	%r12d, %r12d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	cmpl	$1, %r15d
	movl	%r12d, %eax
	adcl	$0, %r12d
	movslq	%r15d, %rcx
	subl	$1, %r15d
	movl	power2(,%rcx,4), %ecx
	cmovbl	%ebp, %r15d
	xorl	%esi, %esi
	testl	%ecx, (%r14,%rax,4)
	setne	%sil
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	decl	%ebx
	jne	.LBB0_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB0_4:                                # %._crit_edge
	movl	$10, %edi
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end0:
	.size	_Z8bitPrintPji, .Lfunc_end0-_Z8bitPrintPji
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z4initiPPc
.LCPI1_0:
	.quad	0x3fe0000000000000              # double 0.5
	.text
	.globl	_Z4initiPPc
	.type	_Z4initiPPc,@function
_Z4initiPPc:                            # @_Z4initiPPc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jle	.LBB1_52
# %bb.1:
	movq	%rsi, %rbx
	movl	%edi, %ebp
	cmpl	$3, %edi
	je	.LBB1_12
# %bb.2:                                # %.lr.ph.preheader
	movl	$3, %r15d
.LBB1_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rbx,%r15,8), %r14
	movl	$.L.str.4, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	jne	.LBB1_5
# %bb.4:                                #   in Loop: Header=BB1_3 Depth=1
	movq	8(%rbx,%r15,8), %rdi
	movl	$.L.str.5, %esi
	movl	$nConInputStreams, %edx
	xorl	%eax, %eax
	callq	__isoc23_sscanf
	movq	(%rbx,%r15,8), %r14
.LBB1_5:                                #   in Loop: Header=BB1_3 Depth=1
	movl	$.L.str.6, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.6:                                #   in Loop: Header=BB1_3 Depth=1
	movq	8(%rbx,%r15,8), %rdi
	movl	$.L.str.5, %esi
	movl	$nStream, %edx
	xorl	%eax, %eax
	callq	__isoc23_sscanf
	movq	(%rbx,%r15,8), %r14
.LBB1_7:                                #   in Loop: Header=BB1_3 Depth=1
	movl	$.L.str.7, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:                                #   in Loop: Header=BB1_3 Depth=1
	movq	8(%rbx,%r15,8), %rdi
	movl	$.L.str.5, %esi
	movl	$debug, %edx
	xorl	%eax, %eax
	callq	__isoc23_sscanf
	movq	(%rbx,%r15,8), %r14
.LBB1_9:                                #   in Loop: Header=BB1_3 Depth=1
	movl	$.L.str.8, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.10:                               #   in Loop: Header=BB1_3 Depth=1
	movq	8(%rbx,%r15,8), %rdi
	movl	$.L.str.5, %esi
	movl	$deviceNum, %edx
	xorl	%eax, %eax
	callq	__isoc23_sscanf
.LBB1_11:                               #   in Loop: Header=BB1_3 Depth=1
	addq	$2, %r15
	cmpl	%ebp, %r15d
	jl	.LBB1_3
.LBB1_12:                               # %.loopexit121
	movq	8(%rbx), %r14
	movl	$.L.str.9, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB1_15
# %bb.13:
	movl	$0, randGen(%rip)
	movl	$.L.str.10, %esi
	movq	%r14, %rdi
	callq	fopen
	movq	%rax, %r14
	testq	%rax, %rax
	jne	.LBB1_16
# %bb.14:
	movq	8(%rbx), %rsi
	movl	$.L.str.11, %edi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB1_55
.LBB1_15:
	movl	$1, randGen(%rip)
	xorl	%r14d, %r14d
.LBB1_16:
	movq	16(%rbx), %rdi
	movl	$.L.str.5, %esi
	movl	$lenS, %edx
	xorl	%eax, %eax
	callq	__isoc23_sscanf
	movl	lenS(%rip), %edi
	testl	%edi, %edi
	jle	.LBB1_53
# %bb.17:
	callq	malloc
	movq	%rax, rS(%rip)
	cmpl	$0, randGen(%rip)
	je	.LBB1_21
# %bb.18:
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movzwl	8(%rbx), %eax
	movw	%ax, 10(%rsp)
	movl	(%rbx), %eax
	movl	%eax, 12(%rsp)
	movq	rS(%rip), %rax
	movslq	lenS(%rip), %rcx
	movb	$1, -1(%rax,%rcx)
	cmpl	$2, lenS(%rip)
	jl	.LBB1_31
# %bb.19:                               # %.lr.ph125.preheader
	movl	$1, %ebp
	movq	$-2, %r14
	leaq	10(%rsp), %rbx
.LBB1_20:                               # %.lr.ph125
                                        # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	callq	erand48
	movslq	lenS(%rip), %rax
	addq	rS(%rip), %rax
	ucomisd	.LCPI1_0(%rip), %xmm0
	seta	(%r14,%rax)
	incl	%ebp
	decq	%r14
	cmpl	lenS(%rip), %ebp
	jl	.LBB1_20
	jmp	.LBB1_31
.LBB1_21:                               # %.preheader118
	movl	$buffer, %edi
	movl	$1024, %esi                     # imm = 0x400
	movq	%r14, %rdx
	callq	fgets
	xorl	%ebx, %ebx
	testq	%rax, %rax
	je	.LBB1_30
# %bb.22:                               # %.preheader118
	cmpl	$0, lenS(%rip)
	jle	.LBB1_30
# %bb.23:                               # %.lr.ph131.preheader
	xorl	%ebx, %ebx
.LBB1_24:                               # %.lr.ph131
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_26 Depth 2
	movl	$buffer, %edi
	movl	$.L.str.13, %esi
	callq	strtok
	testq	%rax, %rax
	je	.LBB1_28
# %bb.25:                               # %.lr.ph129.preheader
                                        #   in Loop: Header=BB1_24 Depth=1
	negl	%ebx
.LBB1_26:                               # %.lr.ph129
                                        #   Parent Loop BB1_24 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rax, %rdi
	callq	atoi
	movq	rS(%rip), %rcx
	decl	%ebx
	movl	lenS(%rip), %edx
	addl	%ebx, %edx
	movslq	%edx, %rdx
	movb	%al, (%rcx,%rdx)
	movl	$.L.str.13, %esi
	xorl	%edi, %edi
	callq	strtok
	testq	%rax, %rax
	jne	.LBB1_26
# %bb.27:                               # %.loopexit.loopexit
                                        #   in Loop: Header=BB1_24 Depth=1
	negl	%ebx
.LBB1_28:                               # %.loopexit
                                        #   in Loop: Header=BB1_24 Depth=1
	movl	$buffer, %edi
	movl	$1024, %esi                     # imm = 0x400
	movq	%r14, %rdx
	callq	fgets
	testq	%rax, %rax
	je	.LBB1_30
# %bb.29:                               # %.loopexit
                                        #   in Loop: Header=BB1_24 Depth=1
	cmpl	lenS(%rip), %ebx
	jl	.LBB1_24
.LBB1_30:                               # %._crit_edge
	movq	%r14, %rdi
	callq	fclose
	cmpl	lenS(%rip), %ebx
	jne	.LBB1_56
.LBB1_31:                               # %.loopexit119
	movl	$1, power2(%rip)
	movl	$1, %eax
	movq	$-124, %rcx
.LBB1_32:                               # =>This Inner Loop Header: Depth=1
	addl	%eax, %eax
	movl	%eax, power2+128(%rcx)
	addq	$4, %rcx
	jne	.LBB1_32
# %bb.33:
	movslq	nConInputStreams(%rip), %r12
	leaq	(,%r12,8), %r14
	testq	%r12, %r12
	movq	$-1, %rax
	cmovsq	%rax, %r14
	leaq	(,%r12,4), %r15
	cmovsq	%rax, %r15
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, %rbx
	movq	%rax, bitRS(%rip)
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, bitC(%rip)
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, bitD(%rip)
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, bitTmp(%rip)
	movq	%r15, %rdi
	callq	_Znam
	movq	%rax, %r14
	movq	%rax, bitLenS(%rip)
	movq	%r15, %rdi
	callq	_Znam
	movq	%rax, bitLenC(%rip)
	testq	%r12, %r12
	jle	.LBB1_51
# %bb.34:                               # %.lr.ph148.preheader
	xorl	%r15d, %r15d
	xorl	%r12d, %r12d
.LBB1_35:                               # %.lr.ph148
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_36 Depth 2
                                        #     Child Loop BB1_39 Depth 2
                                        #     Child Loop BB1_45 Depth 2
                                        #       Child Loop BB1_47 Depth 3
	movl	lenS(%rip), %eax
	leal	31(%rax), %ecx
	addl	$62, %eax
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$5, %eax
	movl	%eax, (%r14,%r12,4)
	movl	$256, %edi                      # imm = 0x100
	callq	_Znam
	movq	%rax, (%rbx,%r12,8)
	xorl	%ebx, %ebx
.LBB1_36:                               #   Parent Loop BB1_35 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	bitLenS(%rip), %rax
	movl	(%rax,%r12,4), %edi
	incl	%edi
	shlq	$2, %rdi
	callq	malloc
	movq	bitRS(%rip), %rcx
	movq	(%rcx,%r12,8), %rcx
	movq	%rax, (%rcx,%rbx,8)
	incq	%rbx
	cmpq	$32, %rbx
	jne	.LBB1_36
# %bb.37:                               #   in Loop: Header=BB1_35 Depth=1
	movq	bitLenS(%rip), %rax
	movl	(%rax,%r12,4), %edi
	shlq	$2, %rdi
	callq	malloc
	movq	bitC(%rip), %rcx
	movq	%rax, (%rcx,%r12,8)
	movq	bitLenS(%rip), %rax
	movl	(%rax,%r12,4), %edi
	incl	%edi
	shlq	$2, %rdi
	callq	malloc
	movq	bitD(%rip), %rcx
	movq	%rax, (%rcx,%r12,8)
	movq	bitD(%rip), %rax
	movq	(%rax,%r12,8), %rcx
	movl	%r15d, (%rcx)
	addq	$4, %rcx
	movq	%rcx, (%rax,%r12,8)
	movq	bitLenS(%rip), %rax
	movl	(%rax,%r12,4), %edi
	shlq	$2, %rdi
	callq	malloc
	movq	bitTmp(%rip), %rcx
	movq	%rax, (%rcx,%r12,8)
	movq	bitRS(%rip), %rbx
	movq	(%rbx,%r12,8), %rax
	movq	(%rax), %rdx
	movl	%r15d, (%rdx)
	cmpl	%r15d, lenS(%rip)
	jle	.LBB1_44
# %bb.38:                               # %.lr.ph139
                                        #   in Loop: Header=BB1_35 Depth=1
	xorl	%ecx, %ecx
	movl	$31, %edi
	movq	rS(%rip), %rsi
	xorl	%r8d, %r8d
.LBB1_39:                               #   Parent Loop BB1_35 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpb	$0, (%rsi,%rcx)
	movslq	%r8d, %r9
	je	.LBB1_41
# %bb.40:                               #   in Loop: Header=BB1_39 Depth=2
	movslq	%edi, %r10
	movl	power2(,%r10,4), %r10d
	orl	%r10d, (%rdx,%r9,4)
.LBB1_41:                               #   in Loop: Header=BB1_39 Depth=2
	subl	$1, %edi
	jae	.LBB1_43
# %bb.42:                               #   in Loop: Header=BB1_39 Depth=2
	leal	1(%r9), %r8d
	movl	$0, 4(%rdx,%r9,4)
	movl	$31, %edi
.LBB1_43:                               #   in Loop: Header=BB1_39 Depth=2
	incq	%rcx
	movslq	lenS(%rip), %r9
	cmpq	%r9, %rcx
	jl	.LBB1_39
.LBB1_44:                               # %._crit_edge140
                                        #   in Loop: Header=BB1_35 Depth=1
	movq	bitLenS(%rip), %r14
	movl	(%r14,%r12,4), %ecx
	movl	$0, (%rdx,%rcx,4)
	movl	$1, %ecx
.LBB1_45:                               # %.preheader
                                        #   Parent Loop BB1_35 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_47 Depth 3
	cmpl	$0, (%r14,%r12,4)
	je	.LBB1_48
# %bb.46:                               # %.lr.ph142
                                        #   in Loop: Header=BB1_45 Depth=2
	movq	(%rax,%rcx,8), %rsi
	xorl	%r8d, %r8d
.LBB1_47:                               #   Parent Loop BB1_35 Depth=1
                                        #     Parent Loop BB1_45 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%rdx,%r8,4), %edi
	movl	bitMask(,%rcx,4), %r9d
	andl	4(%rdx,%r8,4), %r9d
	shldl	%cl, %r9d, %edi
	movl	%edi, (%rsi,%r8,4)
	leaq	1(%r8), %r9
	movl	(%r14,%r12,4), %edi
	movq	%r9, %r8
	cmpq	%rdi, %r9
	jb	.LBB1_47
	jmp	.LBB1_49
.LBB1_48:                               # %.preheader.._crit_edge143_crit_edge
                                        #   in Loop: Header=BB1_45 Depth=2
	movq	(%rax,%rcx,8), %rsi
	xorl	%edi, %edi
.LBB1_49:                               # %._crit_edge143
                                        #   in Loop: Header=BB1_45 Depth=2
	movl	%edi, %edi
	movl	$0, (%rsi,%rdi,4)
	incq	%rcx
	cmpq	$32, %rcx
	jne	.LBB1_45
# %bb.50:                               #   in Loop: Header=BB1_35 Depth=1
	incq	%r12
	movslq	nConInputStreams(%rip), %rax
	cmpq	%rax, %r12
	jl	.LBB1_35
.LBB1_51:                               # %._crit_edge149
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_52:
	.cfi_def_cfa_offset 80
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$.Lstr.2, %edi
	jmp	.LBB1_54
.LBB1_53:
	movl	$.Lstr, %edi
.LBB1_54:
	callq	puts@PLT
.LBB1_55:
	movl	$1, %edi
	callq	exit
.LBB1_56:
	movl	$.L.str.14, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB1_55
.Lfunc_end1:
	.size	_Z4initiPPc, .Lfunc_end1-_Z4initiPPc
	.cfi_endproc
                                        # -- End function
	.globl	_Z7initGPUv                     # -- Begin function _Z7initGPUv
	.type	_Z7initGPUv,@function
_Z7initGPUv:                            # @_Z7initGPUv
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$1480, %rsp                     # imm = 0x5C8
	.cfi_def_cfa_offset 1504
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	4(%rsp), %rbx
	movl	$0, (%rbx)
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	movl	deviceNum(%rip), %edi
	movl	(%rbx), %esi
	cmpl	%esi, %edi
	jge	.LBB2_10
# %bb.1:
	callq	hipSetDevice
	movl	deviceNum(%rip), %esi
	leaq	8(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDevicePropertiesR0600
	movl	$.L.str.16, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	360(%rbx), %esi
	movl	364(%rbx), %edx
	movl	388(%rbx), %ecx
	movl	$.L.str.17, %edi
	xorl	%eax, %eax
	callq	printf
	movslq	nStream(%rip), %rbx
	leaq	(,%rbx,8), %rdi
	callq	malloc
	movq	%rax, streams(%rip)
	testq	%rbx, %rbx
	jle	.LBB2_4
# %bb.2:                                # %.lr.ph.preheader
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB2_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	streams(%rip), %rdi
	addq	%rbx, %rdi
	callq	hipStreamCreate
	incq	%r14
	movslq	nStream(%rip), %rax
	addq	$8, %rbx
	cmpq	%rax, %r14
	jl	.LBB2_3
.LBB2_4:                                # %._crit_edge
	movslq	nConInputStreams(%rip), %r14
	leaq	(,%r14,8), %rax
	testq	%r14, %r14
	movq	$-1, %rbx
	cmovnsq	%rax, %rbx
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, gpuBitRS(%rip)
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, gpuBitC(%rip)
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, gpuBitD(%rip)
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, gpuBitTmp(%rip)
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, gpuParity(%rip)
	testq	%r14, %r14
	jle	.LBB2_9
# %bb.5:                                # %.lr.ph30.preheader
	xorl	%r14d, %r14d
.LBB2_6:                                # %.lr.ph30
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_7 Depth 2
	movl	$256, %edi                      # imm = 0x100
	callq	_Znam
	movq	gpuBitRS(%rip), %rcx
	movq	%rax, (%rcx,%r14,8)
	xorl	%ebx, %ebx
.LBB2_7:                                #   Parent Loop BB2_6 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	gpuBitRS(%rip), %rax
	movq	(%rax,%r14,8), %rdi
	addq	%rbx, %rdi
	movq	bitLenS(%rip), %rax
	movl	(%rax,%r14,4), %esi
	incl	%esi
	shlq	$2, %rsi
	callq	hipMalloc
	movq	gpuBitRS(%rip), %rax
	movq	(%rax,%r14,8), %rax
	movq	(%rax,%rbx), %rdi
	movq	bitRS(%rip), %rax
	movq	(%rax,%r14,8), %rax
	movq	(%rax,%rbx), %rsi
	movq	bitLenS(%rip), %rax
	movl	(%rax,%r14,4), %edx
	incl	%edx
	shlq	$2, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	addq	$8, %rbx
	cmpq	$256, %rbx                      # imm = 0x100
	jne	.LBB2_7
# %bb.8:                                #   in Loop: Header=BB2_6 Depth=1
	leaq	(,%r14,8), %rbx
	movq	gpuBitC(%rip), %rdi
	addq	%rbx, %rdi
	movq	bitLenS(%rip), %rax
	movl	(%rax,%r14,4), %esi
	shlq	$2, %rsi
	callq	hipMalloc
	movq	gpuBitD(%rip), %rdi
	addq	%rbx, %rdi
	movq	bitLenS(%rip), %rax
	movl	(%rax,%r14,4), %esi
	incl	%esi
	shlq	$2, %rsi
	callq	hipMalloc
	movq	gpuBitTmp(%rip), %rdi
	addq	%rbx, %rdi
	movq	bitLenS(%rip), %rax
	movl	(%rax,%r14,4), %esi
	shlq	$2, %rsi
	callq	hipMalloc
	addq	gpuParity(%rip), %rbx
	movl	$256, %esi                      # imm = 0x100
	movq	%rbx, %rdi
	callq	hipMalloc
	incq	%r14
	movslq	nConInputStreams(%rip), %rax
	cmpq	%rax, %r14
	jl	.LBB2_6
.LBB2_9:                                # %._crit_edge31
	addq	$1480, %rsp                     # imm = 0x5C8
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB2_10:
	.cfi_def_cfa_offset 1504
	decl	%esi
	movl	$.L.str.15, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	_Z7initGPUv, .Lfunc_end2-_Z7initGPUv
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__kernel1PjS_S_i # -- Begin function _Z22__device_stub__kernel1PjS_S_i
	.type	_Z22__device_stub__kernel1PjS_S_i,@function
_Z22__device_stub__kernel1PjS_S_i:      # @_Z22__device_stub__kernel1PjS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7kernel1PjS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z22__device_stub__kernel1PjS_S_i, .Lfunc_end3-_Z22__device_stub__kernel1PjS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__kernel2Pji   # -- Begin function _Z22__device_stub__kernel2Pji
	.type	_Z22__device_stub__kernel2Pji,@function
_Z22__device_stub__kernel2Pji:          # @_Z22__device_stub__kernel2Pji
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7kernel2Pji, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z22__device_stub__kernel2Pji, .Lfunc_end4-_Z22__device_stub__kernel2Pji
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__kernel3PjS_iji # -- Begin function _Z22__device_stub__kernel3PjS_iji
	.type	_Z22__device_stub__kernel3PjS_iji,@function
_Z22__device_stub__kernel3PjS_iji:      # @_Z22__device_stub__kernel3PjS_iji
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7kernel3PjS_iji, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z22__device_stub__kernel3PjS_iji, .Lfunc_end5-_Z22__device_stub__kernel3PjS_iji
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__kernel4PjS_i # -- Begin function _Z22__device_stub__kernel4PjS_i
	.type	_Z22__device_stub__kernel4PjS_i,@function
_Z22__device_stub__kernel4PjS_i:        # @_Z22__device_stub__kernel4PjS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7kernel4PjS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z22__device_stub__kernel4PjS_i, .Lfunc_end6-_Z22__device_stub__kernel4PjS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z12gpuBitStreamv               # -- Begin function _Z12gpuBitStreamv
	.type	_Z12gpuBitStreamv,@function
_Z12gpuBitStreamv:                      # @_Z12gpuBitStreamv
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movslq	nConInputStreams(%rip), %rbp
	leaq	(,%rbp,4), %rax
	testq	%rbp, %rbp
	movq	$-1, %rbx
	cmovnsq	%rax, %rbx
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %r12
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %r14
	movq	%rax, n(%rip)
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %r15
	movq	%rax, lenC(%rip)
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%rax, lenD(%rip)
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %r13
	movq	%rax, m(%rip)
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	testq	%rbp, %rbp
	jle	.LBB7_6
# %bb.1:                                # %.lr.ph607
	movq	bitC(%rip), %rax
	movq	bitD(%rip), %rcx
	movq	bitLenS(%rip), %rdx
	xorl	%esi, %esi
	xorl	%edi, %edi
	movq	16(%rsp), %rbx                  # 8-byte Reload
.LBB7_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_4 Depth 2
	movl	power2+124(%rip), %r10d
	movq	(%rax,%rdi,8), %r8
	movl	%r10d, (%r8)
	movq	(%rcx,%rdi,8), %r9
	movl	%r10d, (%r9)
	cmpl	$2, (%rdx,%rdi,4)
	jb	.LBB7_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB7_2 Depth=1
	movl	$1, %r10d
.LBB7_4:                                # %.lr.ph
                                        #   Parent Loop BB7_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%esi, (%r8,%r10,4)
	movl	%esi, (%r9,%r10,4)
	incq	%r10
	movl	(%rdx,%rdi,4), %r11d
	cmpq	%r11, %r10
	jb	.LBB7_4
.LBB7_5:                                # %._crit_edge
                                        #   in Loop: Header=BB7_2 Depth=1
	movl	%esi, (%rbx,%rdi,4)
	movl	%esi, (%r15,%rdi,4)
	movl	%esi, (%r14,%rdi,4)
	movl	$-1, (%r13,%rdi,4)
	movl	%esi, (%r12,%rdi,4)
	incq	%rdi
	movslq	nConInputStreams(%rip), %rbp
	cmpq	%rbp, %rdi
	jl	.LBB7_2
.LBB7_6:                                # %.preheader602
	movl	nStream(%rip), %r15d
	movl	%ebp, %eax
	cltd
	idivl	%r15d
	testl	%eax, %eax
	movq	24(%rsp), %r13                  # 8-byte Reload
	movq	%r12, 64(%rsp)                  # 8-byte Spill
	jle	.LBB7_7
# %bb.47:                               # %.preheader601.preheader
	xorl	%r14d, %r14d
.LBB7_48:                               # %.preheader601
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_51 Depth 2
                                        #     Child Loop BB7_53 Depth 2
                                        #       Child Loop BB7_67 Depth 3
                                        #       Child Loop BB7_61 Depth 3
                                        #       Child Loop BB7_87 Depth 3
                                        #       Child Loop BB7_70 Depth 3
                                        #       Child Loop BB7_73 Depth 3
                                        #       Child Loop BB7_82 Depth 3
                                        #       Child Loop BB7_96 Depth 3
                                        #     Child Loop BB7_57 Depth 2
	testl	%r15d, %r15d
	jle	.LBB7_49
# %bb.50:                               # %.lr.ph609.preheader
                                        #   in Loop: Header=BB7_48 Depth=1
	xorl	%ebx, %ebx
	movq	32(%rsp), %rbp                  # 8-byte Reload
.LBB7_51:                               # %.lr.ph609
                                        #   Parent Loop BB7_48 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	gpuBitC(%rip), %rax
	imull	%r14d, %r15d
	movslq	%r15d, %r15
	addq	%rbx, %r15
	movq	(%rax,%r15,8), %rdi
	movq	bitC(%rip), %rax
	movq	(%rax,%r15,8), %rsi
	movq	bitLenS(%rip), %rax
	movl	(%rax,%r15,4), %edx
	shlq	$2, %rdx
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %r8
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	gpuBitD(%rip), %rax
	movq	(%rax,%r15,8), %rdi
	movq	bitD(%rip), %rax
	movq	(%rax,%r15,8), %rsi
	addq	$-4, %rsi
	movq	bitLenS(%rip), %rax
	movl	(%rax,%r15,4), %edx
	incl	%edx
	shlq	$2, %rdx
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %r8
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	gpuBitD(%rip), %rax
	addq	$4, (%rax,%r15,8)
	incq	%rbx
	movslq	nStream(%rip), %r15
	cmpq	%r15, %rbx
	jl	.LBB7_51
	jmp	.LBB7_52
.LBB7_49:                               #   in Loop: Header=BB7_48 Depth=1
	movq	32(%rsp), %rbp                  # 8-byte Reload
.LBB7_52:                               # %.preheader598.preheader
                                        #   in Loop: Header=BB7_48 Depth=1
	movb	$1, %al
	movq	8(%rsp), %rbx                   # 8-byte Reload
.LBB7_53:                               # %.preheader598
                                        #   Parent Loop BB7_48 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB7_67 Depth 3
                                        #       Child Loop BB7_61 Depth 3
                                        #       Child Loop BB7_87 Depth 3
                                        #       Child Loop BB7_70 Depth 3
                                        #       Child Loop BB7_73 Depth 3
                                        #       Child Loop BB7_82 Depth 3
                                        #       Child Loop BB7_96 Depth 3
	testl	%r15d, %r15d
	jle	.LBB7_54
# %bb.66:                               # %.lr.ph611
                                        #   in Loop: Header=BB7_53 Depth=2
	movq	n(%rip), %rax
	movq	lenC(%rip), %rcx
	movq	bitLenC(%rip), %rdx
	xorl	%esi, %esi
	movl	$64, %r12d
.LBB7_67:                               #   Parent Loop BB7_48 Depth=1
                                        #     Parent Loop BB7_53 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	imull	%r14d, %r15d
	movslq	%r15d, %r9
	addq	%rsi, %r9
	movl	(%rax,%r9,4), %edi
	movl	lenS(%rip), %r8d
	movl	%edi, %r10d
	notl	%r10d
	addl	%r8d, %r10d
	movl	bitMask+108(%rip), %r11d
	notl	%r11d
	andl	%r10d, %r11d
	shrl	$5, %r10d
	movl	%r10d, (%rbp,%r9,4)
	movl	%r11d, (%r13,%r9,4)
	movl	(%rcx,%r9,4), %r10d
	addl	$32, %r10d
	shrl	$5, %r10d
	movl	%r10d, (%rdx,%r9,4)
	addl	$255, %r10d
	shrl	$8, %r10d
	movl	nStream(%rip), %r15d
	imull	%r15d, %r10d
	cmpl	$64, %r10d
	cmovgel	%r12d, %r10d
	movl	%r10d, (%rbx,%r9,4)
	incq	%rsi
	cmpl	%r15d, %esi
	jl	.LBB7_67
# %bb.59:                               # %.preheader597
                                        #   in Loop: Header=BB7_53 Depth=2
	decl	%r8d
	cmpl	%r8d, %edi
	setb	%al
	testl	%r15d, %r15d
	movq	64(%rsp), %r12                  # 8-byte Reload
	jle	.LBB7_54
# %bb.60:                               # %.lr.ph617.preheader
                                        #   in Loop: Header=BB7_53 Depth=2
	movb	%al, 16(%rsp)                   # 1-byte Spill
	xorl	%ebx, %ebx
.LBB7_61:                               # %.lr.ph617
                                        #   Parent Loop BB7_48 Depth=1
                                        #     Parent Loop BB7_53 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	imull	%r14d, %r15d
	movslq	%r15d, %r15
	addq	%rbx, %r15
	movq	8(%rsp), %rax                   # 8-byte Reload
	movl	(%rax,%r15,4), %edi
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %r9
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	leaq	256(%rax), %r13
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_63
# %bb.62:                               #   in Loop: Header=BB7_61 Depth=3
	movq	gpuBitRS(%rip), %rax
	movq	(%rax,%r15,8), %rax
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movslq	(%rcx,%r15,4), %rcx
	movslq	(%rbp,%r15,4), %rdi
	shlq	$2, %rdi
	addq	(%rax,%rcx,8), %rdi
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%r15,8), %rsi
	movq	gpuParity(%rip), %rax
	movq	(%rax,%r15,8), %rdx
	movq	bitLenC(%rip), %rax
	movl	(%rax,%r15,4), %ecx
	callq	_Z22__device_stub__kernel1PjS_S_i
.LBB7_63:                               #   in Loop: Header=BB7_61 Depth=3
	incq	%rbx
	movslq	nStream(%rip), %r15
	cmpq	%r15, %rbx
	jl	.LBB7_61
# %bb.64:                               # %.preheader596
                                        #   in Loop: Header=BB7_53 Depth=2
	testl	%r15d, %r15d
	jle	.LBB7_65
# %bb.86:                               # %.lr.ph619.preheader
                                        #   in Loop: Header=BB7_53 Depth=2
	xorl	%ebx, %ebx
.LBB7_87:                               # %.lr.ph619
                                        #   Parent Loop BB7_48 Depth=1
                                        #     Parent Loop BB7_53 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %r9
	movabsq	$4294967296, %rax               # imm = 0x100000000
	leaq	1(%rax), %rdi
	leaq	64(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_89
# %bb.88:                               #   in Loop: Header=BB7_87 Depth=3
	imull	%r14d, %r15d
	addl	%ebx, %r15d
	movq	gpuParity(%rip), %rax
	movslq	%r15d, %rcx
	movq	(%rax,%rcx,8), %rdi
	movq	8(%rsp), %rax                   # 8-byte Reload
	movl	(%rax,%rcx,4), %esi
	callq	_Z22__device_stub__kernel2Pji
.LBB7_89:                               #   in Loop: Header=BB7_87 Depth=3
	incq	%rbx
	movslq	nStream(%rip), %r15
	cmpq	%r15, %rbx
	jl	.LBB7_87
# %bb.68:                               # %.preheader595
                                        #   in Loop: Header=BB7_53 Depth=2
	testl	%r15d, %r15d
	jle	.LBB7_65
# %bb.69:                               # %.lr.ph621.preheader
                                        #   in Loop: Header=BB7_53 Depth=2
	xorl	%ebx, %ebx
.LBB7_70:                               # %.lr.ph621
                                        #   Parent Loop BB7_48 Depth=1
                                        #     Parent Loop BB7_53 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	imull	%r14d, %r15d
	movslq	%r15d, %rax
	addq	%rbx, %rax
	leaq	(%r12,%rax,4), %rdi
	movq	gpuParity(%rip), %rcx
	movq	(%rcx,%rax,8), %rsi
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %r8
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	incq	%rbx
	movslq	nStream(%rip), %r15
	cmpq	%r15, %rbx
	jl	.LBB7_70
# %bb.71:                               # %.preheader594
                                        #   in Loop: Header=BB7_53 Depth=2
	testl	%r15d, %r15d
	jle	.LBB7_65
# %bb.72:                               # %.lr.ph624.preheader
                                        #   in Loop: Header=BB7_53 Depth=2
	movl	power2(%rip), %eax
	xorl	%ebx, %ebx
.LBB7_73:                               # %.lr.ph624
                                        #   Parent Loop BB7_48 Depth=1
                                        #     Parent Loop BB7_53 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%r14d, %ecx
	imull	%r15d, %ecx
	movslq	%ecx, %rbp
	addq	%rbx, %rbp
	movl	(%r12,%rbp,4), %ecx
	movl	%ecx, %edx
	shrl	%edx
	andl	$1431655765, %edx               # imm = 0x55555555
	subl	%edx, %ecx
	movl	%ecx, %edx
	movl	$858993459, %esi                # imm = 0x33333333
	andl	%esi, %edx
	shrl	$2, %ecx
	andl	%esi, %ecx
	addl	%edx, %ecx
	movl	%ecx, %edx
	shrl	$4, %edx
	addl	%ecx, %edx
	andl	$252645135, %edx                # imm = 0xF0F0F0F
	imull	$16843009, %edx, %ecx           # imm = 0x1010101
	shrl	$24, %ecx
	movl	%ecx, (%r12,%rbp,4)
	testl	%ecx, %eax
	je	.LBB7_79
# %bb.74:                               #   in Loop: Header=BB7_73 Depth=3
	movq	lenC(%rip), %rdx
	movq	n(%rip), %rcx
	movl	(%rcx,%rbp,4), %ecx
	movl	%ecx, %esi
	shrl	%esi
	cmpl	%esi, (%rdx,%rbp,4)
	ja	.LBB7_76
# %bb.75:                               #   in Loop: Header=BB7_73 Depth=3
	movq	gpuBitTmp(%rip), %rax
	movq	(%rax,%rbp,8), %rdi
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%rbp,8), %rsi
	movq	bitLenC(%rip), %rax
	movl	(%rax,%rbp,4), %edx
	shlq	$2, %rdx
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %r8
	movl	$3, %ecx
	callq	hipMemcpyAsync
	movl	power2(%rip), %eax
	movq	n(%rip), %rcx
	movl	(%rcx,%rbp,4), %ecx
.LBB7_76:                               #   in Loop: Header=BB7_73 Depth=3
	movq	lenD(%rip), %rdx
	movl	(%rdx,%rbp,4), %edx
	incl	%edx
	movq	m(%rip), %rsi
	movl	(%rsi,%rbp,4), %esi
	movl	lenS(%rip), %edi
	addl	%esi, %edi
	subl	%ecx, %edi
	cmpl	%edi, %edx
	cmovbl	%edx, %edi
	subl	%esi, %ecx
	movl	%ecx, %edx
	shrl	$5, %edx
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movl	%edx, (%rsi,%rbp,4)
	movl	bitMask+108(%rip), %edx
	notl	%edx
	xorl	%esi, %esi
	andl	%ecx, %edx
	movq	56(%rsp), %rcx                  # 8-byte Reload
	movl	%edx, (%rcx,%rbp,4)
	setne	%sil
	leal	-32(%rdi,%rdx), %ecx
	cmovel	%edi, %ecx
	addl	$31, %ecx
	sarl	$5, %ecx
	leal	(%rcx,%rsi), %edx
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movl	%edx, (%rdi,%rbp,4)
	leal	(%rcx,%rsi), %edx
	addl	$255, %edx
	addl	%esi, %ecx
	addl	$510, %ecx                      # imm = 0x1FE
	testl	%edx, %edx
	cmovnsl	%edx, %ecx
	sarl	$8, %ecx
	movl	nStream(%rip), %r15d
	imull	%r15d, %ecx
	cmpl	$64, %ecx
	jl	.LBB7_78
# %bb.77:                               #   in Loop: Header=BB7_73 Depth=3
	movl	$64, %ecx
.LBB7_78:                               #   in Loop: Header=BB7_73 Depth=3
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movl	%ecx, (%rdx,%rbp,4)
.LBB7_79:                               #   in Loop: Header=BB7_73 Depth=3
	incq	%rbx
	movslq	%r15d, %rcx
	cmpq	%rcx, %rbx
	jl	.LBB7_73
# %bb.80:                               # %.preheader593
                                        #   in Loop: Header=BB7_53 Depth=2
	testl	%r15d, %r15d
	jle	.LBB7_90
# %bb.81:                               # %.lr.ph626.preheader
                                        #   in Loop: Header=BB7_53 Depth=2
	xorl	%ebp, %ebp
.LBB7_82:                               # %.lr.ph626
                                        #   Parent Loop BB7_48 Depth=1
                                        #     Parent Loop BB7_53 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	imull	%r14d, %r15d
	movslq	%r15d, %r15
	addq	%rbp, %r15
	movl	power2(%rip), %eax
	testl	%eax, (%r12,%r15,4)
	je	.LBB7_94
# %bb.83:                               #   in Loop: Header=BB7_82 Depth=3
	movq	56(%rsp), %rax                  # 8-byte Reload
	movslq	(%rax,%r15,4), %rbx
	movq	8(%rsp), %rax                   # 8-byte Reload
	movl	(%rax,%r15,4), %edi
	movq	streams(%rip), %rax
	movq	(%rax,%rbp,8), %r9
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testq	%rbx, %rbx
	je	.LBB7_92
# %bb.84:                               #   in Loop: Header=BB7_82 Depth=3
	testl	%eax, %eax
	jne	.LBB7_94
# %bb.85:                               #   in Loop: Header=BB7_82 Depth=3
	movq	gpuBitC(%rip), %rax
	movq	48(%rsp), %rcx                  # 8-byte Reload
	movslq	(%rcx,%r15,4), %rdi
	shlq	$2, %rdi
	addq	(%rax,%r15,8), %rdi
	movq	gpuBitD(%rip), %rax
	movq	(%rax,%r15,8), %rsi
	movl	$32, %eax
	subq	%rbx, %rax
	movl	bitMask(,%rax,4), %ecx
	movq	40(%rsp), %rax                  # 8-byte Reload
	movl	(%rax,%r15,4), %r8d
	movl	%ebx, %edx
	callq	_Z22__device_stub__kernel3PjS_iji
	jmp	.LBB7_94
.LBB7_92:                               #   in Loop: Header=BB7_82 Depth=3
	testl	%eax, %eax
	jne	.LBB7_94
# %bb.93:                               #   in Loop: Header=BB7_82 Depth=3
	movq	gpuBitC(%rip), %rax
	movq	48(%rsp), %rcx                  # 8-byte Reload
	movslq	(%rcx,%r15,4), %rdi
	shlq	$2, %rdi
	addq	(%rax,%r15,8), %rdi
	movq	gpuBitD(%rip), %rax
	movq	(%rax,%r15,8), %rsi
	movq	40(%rsp), %rax                  # 8-byte Reload
	movl	(%rax,%r15,4), %edx
	callq	_Z22__device_stub__kernel4PjS_i
.LBB7_94:                               #   in Loop: Header=BB7_82 Depth=3
	incq	%rbp
	movslq	nStream(%rip), %r15
	cmpq	%r15, %rbp
	jl	.LBB7_82
.LBB7_90:                               # %.preheader591
                                        #   in Loop: Header=BB7_53 Depth=2
	testl	%r15d, %r15d
	jle	.LBB7_91
# %bb.95:                               # %.lr.ph628.preheader
                                        #   in Loop: Header=BB7_53 Depth=2
	movq	n(%rip), %rax
	xorl	%ebx, %ebx
	movq	32(%rsp), %rbp                  # 8-byte Reload
	movq	24(%rsp), %r13                  # 8-byte Reload
.LBB7_96:                               # %.lr.ph628
                                        #   Parent Loop BB7_48 Depth=1
                                        #     Parent Loop BB7_53 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	imull	%r14d, %r15d
	movslq	%r15d, %r15
	addq	%rbx, %r15
	movl	power2(%rip), %ecx
	testl	%ecx, (%r12,%r15,4)
	je	.LBB7_97
# %bb.98:                               #   in Loop: Header=BB7_96 Depth=3
	movq	lenC(%rip), %rdx
	movl	(%rax,%r15,4), %ecx
	movl	%ecx, %esi
	shrl	%esi
	cmpl	%esi, (%rdx,%r15,4)
	ja	.LBB7_100
# %bb.99:                               #   in Loop: Header=BB7_96 Depth=3
	movq	gpuBitD(%rip), %rax
	movq	(%rax,%r15,8), %rdi
	movq	gpuBitTmp(%rip), %rax
	movq	(%rax,%r15,8), %rsi
	movq	bitLenC(%rip), %rax
	movl	(%rax,%r15,4), %edx
	shlq	$2, %rdx
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %r8
	movl	$3, %ecx
	callq	hipMemcpyAsync
	movq	lenC(%rip), %rcx
	movl	(%rcx,%r15,4), %edx
	movq	lenD(%rip), %rax
	movl	%edx, (%rax,%r15,4)
	movq	n(%rip), %rax
	movl	(%rax,%r15,4), %esi
	subl	%edx, %esi
	incl	%esi
	movl	%esi, (%rcx,%r15,4)
	movl	(%rax,%r15,4), %ecx
	movq	m(%rip), %rdx
	movl	%ecx, (%rdx,%r15,4)
	jmp	.LBB7_100
.LBB7_97:                               # %.lr.ph628._crit_edge
                                        #   in Loop: Header=BB7_96 Depth=3
	movl	(%rax,%r15,4), %ecx
.LBB7_100:                              #   in Loop: Header=BB7_96 Depth=3
	incl	%ecx
	movl	%ecx, (%rax,%r15,4)
	incq	%rbx
	movslq	nStream(%rip), %r15
	cmpq	%r15, %rbx
	jl	.LBB7_96
	jmp	.LBB7_101
.LBB7_91:                               #   in Loop: Header=BB7_53 Depth=2
	movq	32(%rsp), %rbp                  # 8-byte Reload
.LBB7_65:                               #   in Loop: Header=BB7_53 Depth=2
	movq	24(%rsp), %r13                  # 8-byte Reload
.LBB7_101:                              #   in Loop: Header=BB7_53 Depth=2
	movq	8(%rsp), %rbx                   # 8-byte Reload
	movb	16(%rsp), %al                   # 1-byte Reload
.LBB7_54:                               # %.loopexit592
                                        #   in Loop: Header=BB7_53 Depth=2
	testb	$1, %al
	jne	.LBB7_53
# %bb.55:                               # %.preheader599
                                        #   in Loop: Header=BB7_48 Depth=1
	movb	%al, 16(%rsp)                   # 1-byte Spill
	testl	%r15d, %r15d
	jle	.LBB7_58
# %bb.56:                               # %.lr.ph631.preheader
                                        #   in Loop: Header=BB7_48 Depth=1
	xorl	%ebx, %ebx
.LBB7_57:                               # %.lr.ph631
                                        #   Parent Loop BB7_48 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	bitC(%rip), %rax
	imull	%r14d, %r15d
	movslq	%r15d, %rcx
	addq	%rbx, %rcx
	movq	(%rax,%rcx,8), %rdi
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%rcx,8), %rsi
	movq	bitLenS(%rip), %rax
	movl	(%rax,%rcx,4), %edx
	shlq	$2, %rdx
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %r8
	movl	$2, %ecx
	callq	hipMemcpyAsync
	incq	%rbx
	movslq	nStream(%rip), %r15
	cmpq	%r15, %rbx
	jl	.LBB7_57
.LBB7_58:                               # %._crit_edge632
                                        #   in Loop: Header=BB7_48 Depth=1
	incl	%r14d
	movl	nConInputStreams(%rip), %ebp
	movl	%ebp, %eax
	cltd
	idivl	%r15d
	cmpl	%eax, %r14d
	jl	.LBB7_48
	jmp	.LBB7_8
.LBB7_7:
	movb	$1, 16(%rsp)                    # 1-byte Folded Spill
.LBB7_8:                                # %._crit_edge634
	imull	%eax, %r15d
	cmpl	%ebp, %r15d
	jge	.LBB7_102
# %bb.9:                                # %.preheader590.preheader
	movslq	%r15d, %r14
.LBB7_10:                               # %.preheader590
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_12 Depth 2
                                        #     Child Loop BB7_15 Depth 2
                                        #       Child Loop BB7_17 Depth 3
                                        #       Child Loop BB7_21 Depth 3
                                        #       Child Loop BB7_26 Depth 3
                                        #       Child Loop BB7_31 Depth 3
                                        #       Child Loop BB7_34 Depth 3
                                        #       Child Loop BB7_43 Depth 3
                                        #       Child Loop BB7_118 Depth 3
                                        #     Child Loop BB7_114 Depth 2
	cmpl	%r15d, %ebp
	jle	.LBB7_13
# %bb.11:                               # %.lr.ph638.preheader
                                        #   in Loop: Header=BB7_10 Depth=1
	xorl	%ebx, %ebx
.LBB7_12:                               # %.lr.ph638
                                        #   Parent Loop BB7_10 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%r14,8), %rdi
	movq	bitC(%rip), %rax
	movq	(%rax,%r14,8), %rsi
	movq	bitLenS(%rip), %rax
	movl	(%rax,%r14,4), %edx
	shlq	$2, %rdx
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %r8
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	gpuBitD(%rip), %rax
	movq	(%rax,%r14,8), %rdi
	movq	bitD(%rip), %rax
	movq	(%rax,%r14,8), %rsi
	addq	$-4, %rsi
	movq	bitLenS(%rip), %rax
	movl	(%rax,%r14,4), %edx
	incl	%edx
	shlq	$2, %rdx
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %r8
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	gpuBitD(%rip), %rax
	addq	$4, (%rax,%r14,8)
	incq	%rbx
	movl	nConInputStreams(%rip), %ebp
	movl	%ebp, %eax
	subl	%r15d, %eax
	cltq
	cmpq	%rax, %rbx
	jl	.LBB7_12
.LBB7_13:                               # %.preheader589
                                        #   in Loop: Header=BB7_10 Depth=1
	movb	16(%rsp), %al                   # 1-byte Reload
	testb	$1, %al
	je	.LBB7_112
# %bb.14:                               # %.preheader587.lr.ph
                                        #   in Loop: Header=BB7_10 Depth=1
	leaq	(%r12,%r14,4), %r13
.LBB7_15:                               # %.preheader587
                                        #   Parent Loop BB7_10 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB7_17 Depth 3
                                        #       Child Loop BB7_21 Depth 3
                                        #       Child Loop BB7_26 Depth 3
                                        #       Child Loop BB7_31 Depth 3
                                        #       Child Loop BB7_34 Depth 3
                                        #       Child Loop BB7_43 Depth 3
                                        #       Child Loop BB7_118 Depth 3
	cmpl	%r15d, %ebp
	jle	.LBB7_19
# %bb.16:                               # %.lr.ph640
                                        #   in Loop: Header=BB7_15 Depth=2
	movq	n(%rip), %rdi
	movq	lenC(%rip), %r8
	xorl	%r9d, %r9d
	movq	bitLenC(%rip), %r10
	movq	8(%rsp), %rbx                   # 8-byte Reload
.LBB7_17:                               #   Parent Loop BB7_10 Depth=1
                                        #     Parent Loop BB7_15 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%rdi,%r14,4), %eax
	movl	lenS(%rip), %ecx
	movl	bitMask+108(%rip), %esi
	movl	(%r8,%r14,4), %edx
	addl	$32, %edx
	shrl	$5, %edx
	movl	%edx, (%r10,%r14,4)
	incl	%r9d
	movl	nConInputStreams(%rip), %ebp
	movl	%ebp, %r11d
	subl	%r15d, %r11d
	cmpl	%r11d, %r9d
	jl	.LBB7_17
# %bb.18:                               # %..preheader586_crit_edge
                                        #   in Loop: Header=BB7_15 Depth=2
	movl	%eax, %edi
	notl	%edi
	addl	%ecx, %edi
	notl	%esi
	andl	%edi, %esi
	shrl	$5, %edi
	addl	$255, %edx
	shrl	$8, %edx
	imull	nStream(%rip), %edx
	cmpl	$64, %edx
	movl	$64, %r8d
	cmovgel	%r8d, %edx
	movq	32(%rsp), %r8                   # 8-byte Reload
	movl	%edi, (%r8,%r14,4)
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	%esi, (%rdi,%r14,4)
	movl	%edx, (%rbx,%r14,4)
	decl	%ecx
	cmpl	%ecx, %eax
	setb	%al
.LBB7_19:                               # %.preheader586
                                        #   in Loop: Header=BB7_15 Depth=2
	movb	%al, 16(%rsp)                   # 1-byte Spill
	cmpl	%r15d, %ebp
	jle	.LBB7_24
# %bb.20:                               # %.lr.ph650
                                        #   in Loop: Header=BB7_15 Depth=2
	movq	8(%rsp), %rax                   # 8-byte Reload
	movl	(%rax,%r14,4), %ebx
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rbx
	xorl	%r12d, %r12d
.LBB7_21:                               #   Parent Loop BB7_10 Depth=1
                                        #     Parent Loop BB7_15 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	streams(%rip), %rax
	movq	(%rax,%r12,8), %r9
	movabsq	$4294967296, %rax               # imm = 0x100000000
	leaq	256(%rax), %rdx
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_23
# %bb.22:                               #   in Loop: Header=BB7_21 Depth=3
	movq	gpuBitRS(%rip), %rax
	movq	(%rax,%r14,8), %rax
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movslq	(%rcx,%r14,4), %rcx
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movslq	(%rdx,%r14,4), %rdi
	shlq	$2, %rdi
	addq	(%rax,%rcx,8), %rdi
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%r14,8), %rsi
	movq	gpuParity(%rip), %rax
	movq	(%rax,%r14,8), %rdx
	movq	bitLenC(%rip), %rax
	movl	(%rax,%r14,4), %ecx
	callq	_Z22__device_stub__kernel1PjS_S_i
.LBB7_23:                               #   in Loop: Header=BB7_21 Depth=3
	incq	%r12
	movl	nConInputStreams(%rip), %ebp
	movl	%ebp, %eax
	subl	%r15d, %eax
	cltq
	cmpq	%rax, %r12
	jl	.LBB7_21
.LBB7_24:                               # %.preheader585
                                        #   in Loop: Header=BB7_15 Depth=2
	cmpl	%r15d, %ebp
	movl	$858993459, %r12d               # imm = 0x33333333
	jle	.LBB7_29
# %bb.25:                               # %.lr.ph652.preheader
                                        #   in Loop: Header=BB7_15 Depth=2
	xorl	%ebx, %ebx
.LBB7_26:                               # %.lr.ph652
                                        #   Parent Loop BB7_10 Depth=1
                                        #     Parent Loop BB7_15 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %r9
	movabsq	$4294967296, %rax               # imm = 0x100000000
	leaq	1(%rax), %rdi
	leaq	64(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_28
# %bb.27:                               #   in Loop: Header=BB7_26 Depth=3
	movq	gpuParity(%rip), %rax
	movq	(%rax,%r14,8), %rdi
	movq	8(%rsp), %rax                   # 8-byte Reload
	movl	(%rax,%r14,4), %esi
	callq	_Z22__device_stub__kernel2Pji
.LBB7_28:                               #   in Loop: Header=BB7_26 Depth=3
	incq	%rbx
	movl	nConInputStreams(%rip), %ebp
	movl	%ebp, %eax
	subl	%r15d, %eax
	cltq
	cmpq	%rax, %rbx
	jl	.LBB7_26
.LBB7_29:                               # %.preheader584
                                        #   in Loop: Header=BB7_15 Depth=2
	cmpl	%r15d, %ebp
	jle	.LBB7_32
# %bb.30:                               # %.lr.ph654.preheader
                                        #   in Loop: Header=BB7_15 Depth=2
	xorl	%ebx, %ebx
.LBB7_31:                               # %.lr.ph654
                                        #   Parent Loop BB7_10 Depth=1
                                        #     Parent Loop BB7_15 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	gpuParity(%rip), %rax
	movq	(%rax,%r14,8), %rsi
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %r8
	movl	$4, %edx
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpyAsync
	incq	%rbx
	movl	nConInputStreams(%rip), %ebp
	movl	%ebp, %eax
	subl	%r15d, %eax
	cltq
	cmpq	%rax, %rbx
	jl	.LBB7_31
.LBB7_32:                               # %.preheader583
                                        #   in Loop: Header=BB7_15 Depth=2
	cmpl	%r15d, %ebp
	jle	.LBB7_41
# %bb.33:                               # %.lr.ph657.preheader
                                        #   in Loop: Header=BB7_15 Depth=2
	movl	power2(%rip), %eax
	xorl	%ebx, %ebx
.LBB7_34:                               # %.lr.ph657
                                        #   Parent Loop BB7_10 Depth=1
                                        #     Parent Loop BB7_15 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r13), %ecx
	movl	%ecx, %edx
	shrl	%edx
	andl	$1431655765, %edx               # imm = 0x55555555
	subl	%edx, %ecx
	movl	%ecx, %edx
	andl	%r12d, %edx
	shrl	$2, %ecx
	andl	%r12d, %ecx
	addl	%edx, %ecx
	movl	%ecx, %edx
	shrl	$4, %edx
	addl	%ecx, %edx
	andl	$252645135, %edx                # imm = 0xF0F0F0F
	imull	$16843009, %edx, %ecx           # imm = 0x1010101
	shrl	$24, %ecx
	movl	%ecx, (%r13)
	testl	%ecx, %eax
	je	.LBB7_40
# %bb.35:                               #   in Loop: Header=BB7_34 Depth=3
	movq	lenC(%rip), %rdx
	movq	n(%rip), %rcx
	movl	(%rcx,%r14,4), %ecx
	movl	%ecx, %esi
	shrl	%esi
	cmpl	%esi, (%rdx,%r14,4)
	ja	.LBB7_37
# %bb.36:                               #   in Loop: Header=BB7_34 Depth=3
	movq	gpuBitTmp(%rip), %rax
	movq	(%rax,%r14,8), %rdi
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%r14,8), %rsi
	movq	bitLenC(%rip), %rax
	movl	(%rax,%r14,4), %edx
	shlq	$2, %rdx
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %r8
	movl	$3, %ecx
	callq	hipMemcpyAsync
	movl	power2(%rip), %eax
	movq	n(%rip), %rcx
	movl	(%rcx,%r14,4), %ecx
.LBB7_37:                               #   in Loop: Header=BB7_34 Depth=3
	movq	lenD(%rip), %rdx
	movl	(%rdx,%r14,4), %edx
	incl	%edx
	movq	m(%rip), %rsi
	movl	(%rsi,%r14,4), %esi
	movl	lenS(%rip), %edi
	addl	%esi, %edi
	subl	%ecx, %edi
	cmpl	%edi, %edx
	cmovbl	%edx, %edi
	subl	%esi, %ecx
	movl	%ecx, %edx
	shrl	$5, %edx
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movl	%edx, (%rsi,%r14,4)
	movl	bitMask+108(%rip), %edx
	notl	%edx
	xorl	%esi, %esi
	andl	%ecx, %edx
	movq	56(%rsp), %rcx                  # 8-byte Reload
	movl	%edx, (%rcx,%r14,4)
	setne	%sil
	leal	-32(%rdi,%rdx), %ecx
	cmovel	%edi, %ecx
	addl	$31, %ecx
	sarl	$5, %ecx
	leal	(%rcx,%rsi), %edx
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movl	%edx, (%rdi,%r14,4)
	leal	(%rcx,%rsi), %edx
	addl	$255, %edx
	addl	%esi, %ecx
	addl	$510, %ecx                      # imm = 0x1FE
	testl	%edx, %edx
	cmovnsl	%edx, %ecx
	sarl	$8, %ecx
	imull	nStream(%rip), %ecx
	cmpl	$64, %ecx
	jl	.LBB7_39
# %bb.38:                               #   in Loop: Header=BB7_34 Depth=3
	movl	$64, %ecx
.LBB7_39:                               #   in Loop: Header=BB7_34 Depth=3
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movl	%ecx, (%rdx,%r14,4)
	movl	nConInputStreams(%rip), %ebp
.LBB7_40:                               #   in Loop: Header=BB7_34 Depth=3
	incq	%rbx
	movl	%ebp, %ecx
	subl	%r15d, %ecx
	movslq	%ecx, %rcx
	cmpq	%rcx, %rbx
	jl	.LBB7_34
.LBB7_41:                               # %.preheader582
                                        #   in Loop: Header=BB7_15 Depth=2
	cmpl	%r15d, %ebp
	jle	.LBB7_116
# %bb.42:                               # %.lr.ph659.preheader
                                        #   in Loop: Header=BB7_15 Depth=2
	xorl	%r12d, %r12d
.LBB7_43:                               # %.lr.ph659
                                        #   Parent Loop BB7_10 Depth=1
                                        #     Parent Loop BB7_15 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	power2(%rip), %eax
	testl	%eax, (%r13)
	je	.LBB7_123
# %bb.44:                               #   in Loop: Header=BB7_43 Depth=3
	movq	56(%rsp), %rax                  # 8-byte Reload
	movslq	(%rax,%r14,4), %rbx
	movq	8(%rsp), %rax                   # 8-byte Reload
	movl	(%rax,%r14,4), %edi
	movq	streams(%rip), %rax
	movq	(%rax,%r12,8), %r9
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	leaq	256(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testq	%rbx, %rbx
	je	.LBB7_121
# %bb.45:                               #   in Loop: Header=BB7_43 Depth=3
	testl	%eax, %eax
	jne	.LBB7_123
# %bb.46:                               #   in Loop: Header=BB7_43 Depth=3
	movq	gpuBitC(%rip), %rax
	movq	48(%rsp), %rcx                  # 8-byte Reload
	movslq	(%rcx,%r14,4), %rdi
	shlq	$2, %rdi
	addq	(%rax,%r14,8), %rdi
	movq	gpuBitD(%rip), %rax
	movq	(%rax,%r14,8), %rsi
	movl	$32, %eax
	subq	%rbx, %rax
	movl	bitMask(,%rax,4), %ecx
	movq	40(%rsp), %rax                  # 8-byte Reload
	movl	(%rax,%r14,4), %r8d
	movl	%ebx, %edx
	callq	_Z22__device_stub__kernel3PjS_iji
	jmp	.LBB7_123
.LBB7_121:                              #   in Loop: Header=BB7_43 Depth=3
	testl	%eax, %eax
	jne	.LBB7_123
# %bb.122:                              #   in Loop: Header=BB7_43 Depth=3
	movq	gpuBitC(%rip), %rax
	movq	48(%rsp), %rcx                  # 8-byte Reload
	movslq	(%rcx,%r14,4), %rdi
	shlq	$2, %rdi
	addq	(%rax,%r14,8), %rdi
	movq	gpuBitD(%rip), %rax
	movq	(%rax,%r14,8), %rsi
	movq	40(%rsp), %rax                  # 8-byte Reload
	movl	(%rax,%r14,4), %edx
	callq	_Z22__device_stub__kernel4PjS_i
.LBB7_123:                              #   in Loop: Header=BB7_43 Depth=3
	incq	%r12
	movl	nConInputStreams(%rip), %ebp
	movl	%ebp, %eax
	subl	%r15d, %eax
	cltq
	cmpq	%rax, %r12
	jl	.LBB7_43
.LBB7_116:                              # %.preheader581
                                        #   in Loop: Header=BB7_15 Depth=2
	cmpl	%r15d, %ebp
	movq	64(%rsp), %r12                  # 8-byte Reload
	jle	.LBB7_111
# %bb.117:                              # %.lr.ph661.preheader
                                        #   in Loop: Header=BB7_15 Depth=2
	movq	lenC(%rip), %rax
	movq	n(%rip), %rcx
	movl	(%rcx,%r14,4), %edx
	xorl	%ebx, %ebx
.LBB7_118:                              # %.lr.ph661
                                        #   Parent Loop BB7_10 Depth=1
                                        #     Parent Loop BB7_15 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%edx, %esi
	shrl	%esi
	cmpl	%esi, (%rax,%r14,4)
	ja	.LBB7_120
# %bb.119:                              #   in Loop: Header=BB7_118 Depth=3
	movq	gpuBitD(%rip), %rax
	movq	(%rax,%r14,8), %rdi
	movq	gpuBitTmp(%rip), %rax
	movq	(%rax,%r14,8), %rsi
	movq	bitLenC(%rip), %rax
	movl	(%rax,%r14,4), %edx
	shlq	$2, %rdx
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %r8
	movl	$3, %ecx
	callq	hipMemcpyAsync
	movq	lenC(%rip), %rax
	movl	(%rax,%r14,4), %edx
	movq	lenD(%rip), %rcx
	movl	%edx, (%rcx,%r14,4)
	movq	n(%rip), %rcx
	movl	(%rcx,%r14,4), %esi
	subl	%edx, %esi
	incl	%esi
	movl	%esi, (%rax,%r14,4)
	movl	(%rcx,%r14,4), %edx
	movq	m(%rip), %rsi
	movl	%edx, (%rsi,%r14,4)
.LBB7_120:                              # %.lr.ph661._crit_edge
                                        #   in Loop: Header=BB7_118 Depth=3
	incl	%edx
	movl	%edx, (%rcx,%r14,4)
	incq	%rbx
	movl	nConInputStreams(%rip), %ebp
	movl	%ebp, %esi
	subl	%r15d, %esi
	movslq	%esi, %rsi
	cmpq	%rsi, %rbx
	jl	.LBB7_118
.LBB7_111:                              # %.loopexit
                                        #   in Loop: Header=BB7_15 Depth=2
	movb	16(%rsp), %al                   # 1-byte Reload
	testb	$1, %al
	jne	.LBB7_15
.LBB7_112:                              # %.preheader588
                                        #   in Loop: Header=BB7_10 Depth=1
	movb	%al, 16(%rsp)                   # 1-byte Spill
	cmpl	%r15d, %ebp
	jle	.LBB7_115
# %bb.113:                              # %.lr.ph672.preheader
                                        #   in Loop: Header=BB7_10 Depth=1
	xorl	%ebx, %ebx
.LBB7_114:                              # %.lr.ph672
                                        #   Parent Loop BB7_10 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	bitC(%rip), %rax
	movq	(%rax,%r14,8), %rdi
	movq	gpuBitC(%rip), %rax
	movq	(%rax,%r14,8), %rsi
	movq	bitLenS(%rip), %rax
	movl	(%rax,%r14,4), %edx
	shlq	$2, %rdx
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %r8
	movl	$2, %ecx
	callq	hipMemcpyAsync
	incq	%rbx
	movl	nConInputStreams(%rip), %ebp
	movl	%ebp, %eax
	subl	%r15d, %eax
	cltq
	cmpq	%rax, %rbx
	jl	.LBB7_114
.LBB7_115:                              # %._crit_edge673
                                        #   in Loop: Header=BB7_10 Depth=1
	incq	%r14
	movslq	%ebp, %rax
	cmpq	%rax, %r14
	jl	.LBB7_10
.LBB7_102:                              # %.preheader
	testl	%ebp, %ebp
	jle	.LBB7_110
# %bb.103:                              # %.lr.ph683.preheader
	movq	lenC(%rip), %rax
	movq	bitC(%rip), %rcx
	xorl	%r14d, %r14d
	xorl	%ebx, %ebx
.LBB7_104:                              # %.lr.ph683
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_106 Depth 2
	movl	(%rax,%rbx,4), %esi
	leal	1(%rsi), %edx
	movl	bitMask+108(%rip), %r8d
	notl	%r8d
	andl	%edx, %r8d
	shrl	$5, %edx
	movl	$32, %edi
	subl	%r8d, %edi
	xorl	%r9d, %r9d
	testl	%r8d, %r8d
	cmovel	%r8d, %edi
	sete	%r9b
	subl	%r9d, %edx
	movq	(%rcx,%rbx,8), %r8
.LBB7_106:                              # %.lr.ph680
                                        #   Parent Loop BB7_104 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	%edx, %r9
	movslq	%edi, %r10
	movl	power2(,%r10,4), %r10d
	testl	%r10d, (%r8,%r9,4)
	jne	.LBB7_107
# %bb.105:                              # %.lr.ph680
                                        #   in Loop: Header=BB7_106 Depth=2
	decl	%esi
	movl	%esi, (%rax,%rbx,4)
	incl	%edi
	xorl	%r9d, %r9d
	cmpl	$32, %edi
	sete	%r9b
	cmovel	%r14d, %edi
	subl	%r9d, %edx
	jmp	.LBB7_106
.LBB7_107:                              # %._crit_edge681
                                        #   in Loop: Header=BB7_104 Depth=1
	cmpl	$0, debug(%rip)
	je	.LBB7_109
# %bb.108:                              #   in Loop: Header=BB7_104 Depth=1
	movl	$.L.str.18, %edi
                                        # kill: def $esi killed $esi killed $rsi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	printf
	movq	bitC(%rip), %rax
	movq	(%rax,%rbx,8), %rdi
	movq	lenC(%rip), %rax
	movl	(%rax,%rbx,4), %esi
	incl	%esi
	callq	_Z8bitPrintPji
	movq	lenC(%rip), %rax
	movq	bitC(%rip), %rcx
.LBB7_109:                              #   in Loop: Header=BB7_104 Depth=1
	incq	%rbx
	movslq	nConInputStreams(%rip), %rdx
	cmpq	%rdx, %rbx
	jl	.LBB7_104
.LBB7_110:                              # %._crit_edge684
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z12gpuBitStreamv, .Lfunc_end7-_Z12gpuBitStreamv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI8_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$40, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	callq	_Z4initiPPc
	callq	_Z7initGPUv
	movl	lenS(%rip), %esi
	movl	$.L.str.19, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	24(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	callq	_Z12gpuBitStreamv
	leaq	8(%rsp), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movl	(%r14), %eax
	movl	8(%r14), %ecx
	subl	(%rbx), %eax
	subl	8(%rbx), %ecx
	leal	1000000(%rcx), %edx
	movl	%ecx, %edi
	sarl	$31, %edi
	addl	%eax, %edi
	testl	%ecx, %ecx
	cmovnsl	%ecx, %edx
	movl	nConInputStreams(%rip), %esi
	cvtsi2sd	%edi, %xmm1
	cvtsi2sd	%edx, %xmm0
	movl	nStream(%rip), %edx
	divsd	.LCPI8_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	movl	$.L.str.20, %edi
	movb	$1, %al
	callq	printf
	cmpl	$0, nStream(%rip)
	jle	.LBB8_3
# %bb.1:                                # %.lr.ph.preheader
	xorl	%ebx, %ebx
.LBB8_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	streams(%rip), %rax
	movq	(%rax,%rbx,8), %rdi
	callq	hipStreamDestroy
	incq	%rbx
	movslq	nStream(%rip), %rax
	cmpq	%rax, %rbx
	jl	.LBB8_2
.LBB8_3:                                # %._crit_edge
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	main, .Lfunc_end8-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel1PjS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel2Pji, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel3PjS_iji, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel4PjS_i, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	buffer,@object                  # @buffer
	.bss
	.globl	buffer
	.p2align	4, 0x0
buffer:
	.zero	1024
	.size	buffer, 1024

	.type	deviceNum,@object               # @deviceNum
	.data
	.globl	deviceNum
	.p2align	2, 0x0
deviceNum:
	.long	1                               # 0x1
	.size	deviceNum, 4

	.type	debug,@object                   # @debug
	.bss
	.globl	debug
	.p2align	2, 0x0
debug:
	.long	0                               # 0x0
	.size	debug, 4

	.type	randGen,@object                 # @randGen
	.globl	randGen
	.p2align	2, 0x0
randGen:
	.long	0                               # 0x0
	.size	randGen, 4

	.type	lenS,@object                    # @lenS
	.globl	lenS
	.p2align	2, 0x0
lenS:
	.long	0                               # 0x0
	.size	lenS, 4

	.type	m,@object                       # @m
	.globl	m
	.p2align	3, 0x0
m:
	.quad	0
	.size	m, 8

	.type	nConInputStreams,@object        # @nConInputStreams
	.data
	.globl	nConInputStreams
	.p2align	2, 0x0
nConInputStreams:
	.long	1                               # 0x1
	.size	nConInputStreams, 4

	.type	nStream,@object                 # @nStream
	.globl	nStream
	.p2align	2, 0x0
nStream:
	.long	4                               # 0x4
	.size	nStream, 4

	.type	rS,@object                      # @rS
	.bss
	.globl	rS
	.p2align	3, 0x0
rS:
	.quad	0
	.size	rS, 8

	.type	lenC,@object                    # @lenC
	.globl	lenC
	.p2align	3, 0x0
lenC:
	.quad	0
	.size	lenC, 8

	.type	lenD,@object                    # @lenD
	.globl	lenD
	.p2align	3, 0x0
lenD:
	.quad	0
	.size	lenD, 8

	.type	n,@object                       # @n
	.globl	n
	.p2align	3, 0x0
n:
	.quad	0
	.size	n, 8

	.type	power2,@object                  # @power2
	.globl	power2
	.p2align	4, 0x0
power2:
	.zero	128
	.size	power2, 128

	.type	bitMask,@object                 # @bitMask
	.data
	.globl	bitMask
	.p2align	4, 0x0
bitMask:
	.long	0                               # 0x0
	.long	2147483648                      # 0x80000000
	.long	3221225472                      # 0xc0000000
	.long	3758096384                      # 0xe0000000
	.long	4026531840                      # 0xf0000000
	.long	4160749568                      # 0xf8000000
	.long	4227858432                      # 0xfc000000
	.long	4261412864                      # 0xfe000000
	.long	4278190080                      # 0xff000000
	.long	4286578688                      # 0xff800000
	.long	4290772992                      # 0xffc00000
	.long	4292870144                      # 0xffe00000
	.long	4293918720                      # 0xfff00000
	.long	4294443008                      # 0xfff80000
	.long	4294705152                      # 0xfffc0000
	.long	4294836224                      # 0xfffe0000
	.long	4294901760                      # 0xffff0000
	.long	4294934528                      # 0xffff8000
	.long	4294950912                      # 0xffffc000
	.long	4294959104                      # 0xffffe000
	.long	4294963200                      # 0xfffff000
	.long	4294965248                      # 0xfffff800
	.long	4294966272                      # 0xfffffc00
	.long	4294966784                      # 0xfffffe00
	.long	4294967040                      # 0xffffff00
	.long	4294967168                      # 0xffffff80
	.long	4294967232                      # 0xffffffc0
	.long	4294967264                      # 0xffffffe0
	.long	4294967280                      # 0xfffffff0
	.long	4294967288                      # 0xfffffff8
	.long	4294967292                      # 0xfffffffc
	.long	4294967294                      # 0xfffffffe
	.size	bitMask, 128

	.type	bitRS,@object                   # @bitRS
	.bss
	.globl	bitRS
	.p2align	3, 0x0
bitRS:
	.quad	0
	.size	bitRS, 8

	.type	bitLenS,@object                 # @bitLenS
	.globl	bitLenS
	.p2align	3, 0x0
bitLenS:
	.quad	0
	.size	bitLenS, 8

	.type	bitC,@object                    # @bitC
	.globl	bitC
	.p2align	3, 0x0
bitC:
	.quad	0
	.size	bitC, 8

	.type	bitLenC,@object                 # @bitLenC
	.globl	bitLenC
	.p2align	3, 0x0
bitLenC:
	.quad	0
	.size	bitLenC, 8

	.type	bitD,@object                    # @bitD
	.globl	bitD
	.p2align	3, 0x0
bitD:
	.quad	0
	.size	bitD, 8

	.type	bitTmp,@object                  # @bitTmp
	.globl	bitTmp
	.p2align	3, 0x0
bitTmp:
	.quad	0
	.size	bitTmp, 8

	.type	gpuBitRS,@object                # @gpuBitRS
	.globl	gpuBitRS
	.p2align	3, 0x0
gpuBitRS:
	.quad	0
	.size	gpuBitRS, 8

	.type	gpuBitC,@object                 # @gpuBitC
	.globl	gpuBitC
	.p2align	3, 0x0
gpuBitC:
	.quad	0
	.size	gpuBitC, 8

	.type	gpuBitD,@object                 # @gpuBitD
	.globl	gpuBitD
	.p2align	3, 0x0
gpuBitD:
	.quad	0
	.size	gpuBitD, 8

	.type	gpuBitTmp,@object               # @gpuBitTmp
	.globl	gpuBitTmp
	.p2align	3, 0x0
gpuBitTmp:
	.quad	0
	.size	gpuBitTmp, 8

	.type	gpuParity,@object               # @gpuParity
	.globl	gpuParity
	.p2align	3, 0x0
gpuParity:
	.quad	0
	.size	gpuParity, 8

	.type	streams,@object                 # @streams
	.globl	streams
	.p2align	3, 0x0
streams:
	.quad	0
	.size	streams, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%1d "
	.size	.L.str, 5

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"-c"
	.size	.L.str.4, 3

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d"
	.size	.L.str.5, 3

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"-ns"
	.size	.L.str.6, 4

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"-b"
	.size	.L.str.7, 3

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"-d"
	.size	.L.str.8, 3

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"randGen"
	.size	.L.str.9, 8

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"r"
	.size	.L.str.10, 2

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"%s doesn't exist\n"
	.size	.L.str.11, 18

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	" "
	.size	.L.str.13, 2

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"file has only %d bits\n"
	.size	.L.str.14, 23

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"choose device ID between 0 and %d\n"
	.size	.L.str.15, 35

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"> Device name : %s\n"
	.size	.L.str.16, 20

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"> CUDA Capable SM %d.%d hardware with %d multi-processors\n"
	.size	.L.str.17, 59

	.type	_Z7kernel1PjS_S_i,@object       # @_Z7kernel1PjS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z7kernel1PjS_S_i
	.p2align	3, 0x0
_Z7kernel1PjS_S_i:
	.quad	_Z22__device_stub__kernel1PjS_S_i
	.size	_Z7kernel1PjS_S_i, 8

	.type	_Z7kernel2Pji,@object           # @_Z7kernel2Pji
	.globl	_Z7kernel2Pji
	.p2align	3, 0x0
_Z7kernel2Pji:
	.quad	_Z22__device_stub__kernel2Pji
	.size	_Z7kernel2Pji, 8

	.type	_Z7kernel3PjS_iji,@object       # @_Z7kernel3PjS_iji
	.globl	_Z7kernel3PjS_iji
	.p2align	3, 0x0
_Z7kernel3PjS_iji:
	.quad	_Z22__device_stub__kernel3PjS_iji
	.size	_Z7kernel3PjS_iji, 8

	.type	_Z7kernel4PjS_i,@object         # @_Z7kernel4PjS_i
	.globl	_Z7kernel4PjS_i
	.p2align	3, 0x0
_Z7kernel4PjS_i:
	.quad	_Z22__device_stub__kernel4PjS_i
	.size	_Z7kernel4PjS_i, 8

	.type	.L.str.18,@object               # @.str.18
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.18:
	.asciz	"gpuBitStream: degree is %d for input: %d\n"
	.size	.L.str.18, 42

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"input length %d\n"
	.size	.L.str.19, 17

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"gpuBitStream for %d inputs and %d streams: %f sec\n"
	.size	.L.str.20, 51

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7kernel1PjS_S_i"
	.size	.L__unnamed_1, 18

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z7kernel2Pji"
	.size	.L__unnamed_2, 14

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z7kernel3PjS_iji"
	.size	.L__unnamed_3, 18

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z7kernel4PjS_i"
	.size	.L__unnamed_4, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"positive length needed"
	.size	.Lstr, 23

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Usage: ./gpuBitStream filename length -c NumberofInputStreams -ns NumberofStreams -b debugLvl -d deviceNum"
	.size	.Lstr.1, 107

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\tto generate random string: ./gpuBitStream randGen length"
	.size	.Lstr.2, 58

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__kernel1PjS_S_i
	.addrsig_sym _Z22__device_stub__kernel2Pji
	.addrsig_sym _Z22__device_stub__kernel3PjS_iji
	.addrsig_sym _Z22__device_stub__kernel4PjS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym buffer
	.addrsig_sym deviceNum
	.addrsig_sym debug
	.addrsig_sym lenS
	.addrsig_sym nConInputStreams
	.addrsig_sym nStream
	.addrsig_sym _Z7kernel1PjS_S_i
	.addrsig_sym _Z7kernel2Pji
	.addrsig_sym _Z7kernel3PjS_iji
	.addrsig_sym _Z7kernel4PjS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7kernel1PjS_S_i       ; -- Begin function _Z7kernel1PjS_S_i
	.globl	_Z7kernel1PjS_S_i
	.p2align	8
	.type	_Z7kernel1PjS_S_i,@function
_Z7kernel1PjS_S_i:                      ; @_Z7kernel1PjS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_mov_b32 s2, s15
	v_dual_mov_b32 v7, 0 :: v_dual_lshlrev_b32 v6, 2, v0
	ds_store_b32 v6, v7
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s2, s4, v[0:1]
	s_mov_b32 s4, exec_lo
	v_cmpx_ge_i32_e64 s3, v1
	s_cbranch_execz .LBB0_11
; %bb.1:                                ; %.preheader.preheader
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[4:5], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s10, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
.LBB0_2:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v8, v[2:3], off
	global_load_b32 v9, v[4:5], off
	v_add_nc_u32_e32 v1, 0x4000, v1
	v_add_co_u32 v2, vcc_lo, 0x10000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, 0x10000, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e64 s0, s3, v1
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_or_b32 s1, s0, s1
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v8, v9, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_xor_b32_e32 v7, v7, v8
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_2
; %bb.3:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	ds_store_b32 v6, v7
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x80, v0
	s_cbranch_execz .LBB0_5
; %bb.4:
	ds_load_b32 v1, v6 offset:512
	ds_load_b32 v2, v6
	s_waitcnt lgkmcnt(0)
	v_xor_b32_e32 v1, v2, v1
	ds_store_b32 v6, v1
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 64, v0
	s_cbranch_execz .LBB0_7
; %bb.6:
	ds_load_b32 v1, v6 offset:256
	ds_load_b32 v2, v6
	s_waitcnt lgkmcnt(0)
	v_xor_b32_e32 v1, v2, v1
	ds_store_b32 v6, v1
.LBB0_7:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB0_9
; %bb.8:
	v_add_nc_u32_e32 v1, 0x80, v6
	v_cmp_ne_u32_e64 s0, -1, v6
	s_mov_b64 s[6:7], src_shared_base
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e64 v2, 0, s7, s0
	v_cndmask_b32_e32 v3, 0, v1, vcc_lo
	v_cndmask_b32_e64 v4, 0, s7, vcc_lo
	v_cndmask_b32_e64 v1, 0, v6, s0
	flat_load_b32 v4, v[3:4] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v5, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 64, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v3
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_xor_b32_e32 v5, v5, v4
	v_cndmask_b32_e64 v4, 0, s7, vcc_lo
	flat_store_b32 v[1:2], v5 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v4, v[3:4] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v5, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 32, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v3
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_xor_b32_e32 v5, v5, v4
	v_cndmask_b32_e64 v4, 0, s7, vcc_lo
	flat_store_b32 v[1:2], v5 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v4, v[3:4] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v5, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 16, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v3
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_xor_b32_e32 v5, v5, v4
	v_cndmask_b32_e64 v4, 0, s7, vcc_lo
	flat_store_b32 v[1:2], v5 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v4, v[3:4] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v5, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 8, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v3
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_xor_b32_e32 v5, v5, v4
	v_cndmask_b32_e64 v4, 0, s7, vcc_lo
	flat_store_b32 v[1:2], v5 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v4, v[3:4] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v5, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 4, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v3
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_xor_b32_e32 v5, v5, v4
	v_cndmask_b32_e64 v4, 0, s7, vcc_lo
	flat_store_b32 v[1:2], v5 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v3, v[3:4] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v4, v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v3, v4, v3
	flat_store_b32 v[1:2], v3 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_9:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_mov_b32 s3, 0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_11
; %bb.10:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB0_11:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel1PjS_S_i
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7kernel1PjS_S_i, .Lfunc_end0-_Z7kernel1PjS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 932
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7kernel2Pji           ; -- Begin function _Z7kernel2Pji
	.globl	_Z7kernel2Pji
	.p2align	8
	.type	_Z7kernel2Pji,@function
_Z7kernel2Pji:                          ; @_Z7kernel2Pji
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x0
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_u32_e64 s4, v0
	s_cbranch_execz .LBB1_2
; %bb.1:
	global_load_b32 v2, v1, s[2:3]
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB1_4
; %bb.3:
	v_add_nc_u32_e32 v2, 0x80, v1
	v_cmp_ne_u32_e64 s0, -1, v1
	s_mov_b64 s[4:5], src_shared_base
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v2
	v_cndmask_b32_e64 v3, 0, s5, s0
	v_cndmask_b32_e32 v4, 0, v2, vcc_lo
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	v_cndmask_b32_e64 v2, 0, v1, s0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 64, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_xor_b32_e32 v6, v6, v5
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 32, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_xor_b32_e32 v6, v6, v5
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_xor_b32_e32 v6, v6, v5
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 8, v1
	v_add_nc_u32_e32 v1, 4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_xor_b32_e32 v6, v6, v5
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e32 v4, 0, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_xor_b32_e32 v1, v6, v5
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	flat_store_b32 v[2:3], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v4, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v1, v4, v1
	flat_store_b32 v[2:3], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB1_4:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_6
; %bb.5:
	v_mov_b32_e32 v0, 0
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[2:3]
.LBB1_6:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel2Pji
		.amdhsa_group_segment_fixed_size 256
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 12
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 6
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z7kernel2Pji, .Lfunc_end1-_Z7kernel2Pji
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 584
; NumSgprs: 8
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 256 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7kernel3PjS_iji       ; -- Begin function _Z7kernel3PjS_iji
	.globl	_Z7kernel3PjS_iji
	.p2align	8
	.type	_Z7kernel3PjS_iji,@function
_Z7kernel3PjS_iji:                      ; @_Z7kernel3PjS_iji
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s6, v1
	s_cbranch_execz .LBB2_3
; %bb.1:                                ; %.lr.ph
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, v2, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, v0, -4
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, -1, v5, vcc_lo
	s_not_b32 s1, s5
	s_sub_i32 s2, 32, s4
	s_mov_b32 s3, 0
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[6:7], v[4:5], off
	global_load_b32 v0, v[2:3], off
	v_add_nc_u32_e32 v1, 0x4000, v1
	v_add_co_u32 v4, vcc_lo, 0x10000, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e32 vcc_lo, s6, v1
	s_or_b32 s3, vcc_lo, s3
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v7, s5, v7
	v_and_b32_e32 v6, s1, v6
	v_lshrrev_b32_e32 v7, s4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshl_or_b32 v6, v6, s2, v7
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v0, v6, v0
	global_store_b32 v[2:3], v0, off
	v_add_co_u32 v2, s0, 0x10000, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, 0, v3, s0
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_2
.LBB2_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel3PjS_iji
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z7kernel3PjS_iji, .Lfunc_end2-_Z7kernel3PjS_iji
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 284
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7kernel4PjS_i         ; -- Begin function _Z7kernel4PjS_i
	.globl	_Z7kernel4PjS_i
	.p2align	8
	.type	_Z7kernel4PjS_i,@function
_Z7kernel4PjS_i:                        ; @_Z7kernel4PjS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x24
	s_load_b32 s2, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB3_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
.LBB3_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v0, v[2:3], off
	global_load_b32 v6, v[4:5], off
	v_add_nc_u32_e32 v1, 0x4000, v1
	v_add_co_u32 v2, vcc_lo, 0x10000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_le_i32_e32 vcc_lo, s2, v1
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v0, v6, v0
	global_store_b32 v[4:5], v0, off
	v_add_co_u32 v4, s0, 0x10000, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB3_2
.LBB3_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel4PjS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z7kernel4PjS_i, .Lfunc_end3-_Z7kernel4PjS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 232
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel1PjS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel1PjS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 256
    .kernarg_segment_align: 8
    .kernarg_segment_size: 12
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel2Pji
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel2Pji.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel3PjS_iji
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel3PjS_iji.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel4PjS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel4PjS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
