#include<iostream>
#include<fstream>
#include<strstream>
#include <cuda.h>
#include <math.h>
#include<stdio.h>
#include<stdlib.h>

using namespace std;

int min2(int,int);
int min1(int,int,int);



__global__ void initialisation(int* G1, int* G2, int* D1, int* I2, int ge, int gi, int n)
{
    	int j = threadIdx.x;
    	if(j>0)
    	{
    		G1[j]=gi+ge*j;
       		D1[j]=G1[j]+ge;
	}
        if(j==0)
        {
		G1[0]=0;
    		G2[0]=gi+ge*n;
               	I2[0]=G2[0]+ge;
     	}

}

__global__ void copy_array(float* A, float* B)
{
    int i = threadIdx.x;
    B[i] = A[i];
}

int main(int argc, char** argv)
{
	int i,j,n;
	
	char buffer1[2048];								//--- taking input from file
	char buffer2[2048];								//--- n,s1,s2 are the corresponding three lines of input
	char buffer3[2048];
	istrstream str1(buffer1, 2048);
	istrstream str2(buffer2, 2048);
	istrstream str3(buffer3, 2048);
	ifstream indata("rand-1024-in.txt");		
	indata.getline(buffer1, 2048);
	indata.getline(buffer2, 2048);
	indata.getline(buffer3, 2048);
	str1>>n;

	size_t size = (n) * sizeof(char);
	size_t size1 = (n)*sizeof(int);

	char* h_s1 = (char*)malloc(size);
	char* h_s2 = (char*)malloc(size);

	for(i=0;i<n;i++)
	{
		str2>>h_s1[i];
		str3>>h_s2[i];
	}												//--- end of input
		
	
	int* h_D1 = (int*)malloc(size1);
	int* h_D2 = (int*)malloc(size1);
	int* h_G1 = (int*)malloc(size1);
	int* h_G2 = (int*)malloc(size1);
	int* h_I1 = (int*)malloc(size1);
	int* h_I2 = (int*)malloc(size1);
	int* h_u = (int*)malloc(size1);
	int* h_v = (int*)malloc(size1);
	int* h_se = (int*)malloc(size1);


//	int h_D1[n], h_D2[n],h_G1[n], h_G2[n],h_I1[n+1],h_I2[n+1],h_u[n],h_v[n],h_se[n];	
	int gi,ge,s,cost;
	gi=2;ge=1;

	int *d_D1, *d_D2;
    	cudaMalloc(&d_D1, size1);
	cudaMalloc(&d_D2, size1);
    	int *d_G1, *d_G2;
    	cudaMalloc(&d_G1, size1);
	cudaMalloc(&d_G2, size1);
    	int *d_I1, *d_I2;
    	cudaMalloc(&d_I1, size1);
	cudaMalloc(&d_I2, size1);
    	int *d_u, *d_v, *d_se;
    	cudaMalloc(&d_u, size1);
	cudaMalloc(&d_v, size1);
	cudaMalloc(&d_se, size1);
    
/*	char *d_s1, *d_s2;
	cudaMalloc(&d_s1, size);
	cudaMalloc(&d_s2, size);

    	cudaMemcpy(d_s1, h_s1, size, cudaMemcpyHostToDevice);
	cudaMemcpy(d_s2, h_s2, size, cudaMemcpyHostToDevice);
*/
	
//	d_G1[0]=0;
	initialisation<<<1, n>>>(d_G1, d_G2, d_D1, d_I2, gi, ge, n);



/*	h_G1[0]=0;										
		for(j=0;j<n;j++)
		{
			if(j>0)
			{
				h_G1[j]=gi+ge*j;
				h_D1[j]=h_G1[j]+ge;
			}
			if(j==0)
			{
				h_G2[0]=gi+ge*i;
				h_I2[0]=h_G2[0]+ge;
			}
		}
*/


	cudaMemcpy(h_D1, d_D1, size1, cudaMemcpyDeviceToHost);
    	cudaMemcpy(h_G1, d_G1, size1, cudaMemcpyDeviceToHost);
   	cudaMemcpy(h_G2, d_G2, size1, cudaMemcpyDeviceToHost);
	cudaMemcpy(h_I2, d_I2, size1, cudaMemcpyDeviceToHost);	
	
	for(i=1;i<n;i++)								//--- calculation of D,I,G
	{
		for(j=1;j<n;j++)
		{
			
			if(i>0 && j>0)
			{
				h_D2[j]=min(h_D1[j],h_G1[j]+gi)+ge;
				
				if(h_s1[i]!=h_s2[j])
					s=1;
				else
					s=0;
				
				h_u[j] = min(h_D2[j],h_G1[j-1]+s);
				
				h_v[j] = h_u[j]+gi-j*ge;
				
				h_G2[j]=min(h_u[j],h_I2[j]);
				
				h_se[j]=h_v[j];
				for(int k=1; k<=j;k++)
				{
					if(h_se[j] > h_v[k])
						h_se[j]=h_v[k];
				}
				
				h_I2[j+1]=h_se[j]+(j+1)*ge;
				if(j==1)
					h_I2[1]=min(h_I2[0],h_G2[0]+gi) + ge;
		
				h_G2[j]=min1(h_D2[j],h_I2[j],h_G1[j-1]+s);
			}
		}
	
	
	

		for(int t=0;t<n;t++)
		{
			h_D1[t]=h_D2[t];
			h_I1[t]=h_I2[t];
			h_G1[t]=h_G2[t];
		}
	
	}													//--- end of loop for calculation
	
	cost=min1(h_D2[n-1],h_I2[n-1],h_G2[n-1]);			//--- allignment cost
	
	cout<<"Optimal Allignment cost: "<<cost<<endl;
	
	return 0;
}
int min2(int a,int b)
{
	if(a>b)
		return b;
	else
		return a;
}

int min1(int a,int b,int c)
{
	int m=a;
    if(m>b)
		m=b;
    if(m>c)
		m=c;
    return m;
}

	.file	"tmpxft_00279e9c_00000000-6_prob.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3787:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3787:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0:
.LFB4525:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE4525:
	.size	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	.align 2
	.type	_ZNSi7getlineEPcl.isra.0, @function
_ZNSi7getlineEPcl.isra.0:
.LFB4526:
	.cfi_startproc
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	movq	240(%rdi,%rax), %rbx
	testq	%rbx, %rbx
	jne	.L4
	call	_ZSt16__throw_bad_castv@PLT
.L4:
	cmpb	$0, 56(%rbx)
	movq	%rdi, %rbp
	movq	%rsi, %r12
	je	.L5
	movb	67(%rbx), %al
	jmp	.L6
.L5:
	movq	%rbx, %rdi
	movq	%rdx, 8(%rsp)
	call	_ZNKSt5ctypeIcE13_M_widen_initEv@PLT
	movq	(%rbx), %rax
	movl	$10, %esi
	movq	%rbx, %rdi
	call	*48(%rax)
	movq	8(%rsp), %rdx
.L6:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	movq	%r12, %rsi
	movq	%rbp, %rdi
	movsbl	%al, %ecx
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_ZNSi7getlineEPclc@PLT
	.cfi_endproc
.LFE4526:
	.size	_ZNSi7getlineEPcl.isra.0, .-_ZNSi7getlineEPcl.isra.0
	.globl	_Z4min2ii
	.type	_Z4min2ii, @function
_Z4min2ii:
.LFB3783:
	.cfi_startproc
	endbr64
	cmpl	%esi, %edi
	movl	%esi, %eax
	cmovle	%edi, %eax
	ret
	.cfi_endproc
.LFE3783:
	.size	_Z4min2ii, .-_Z4min2ii
	.globl	_Z4min1iii
	.type	_Z4min1iii, @function
_Z4min1iii:
.LFB3784:
	.cfi_startproc
	endbr64
	cmpl	%edx, %esi
	movl	%edi, %eax
	cmovg	%edx, %esi
	cmpl	%edi, %esi
	cmovle	%esi, %eax
	ret
	.cfi_endproc
.LFE3784:
	.size	_Z4min1iii, .-_Z4min1iii
	.globl	_Z43__device_stub__Z14initialisationPiS_S_S_iiiPiS_S_S_iii
	.type	_Z43__device_stub__Z14initialisationPiS_S_S_iiiPiS_S_S_iii, @function
_Z43__device_stub__Z14initialisationPiS_S_S_iiiPiS_S_S_iii:
.LFB3809:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z14initialisationPiS_S_S_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L11:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3809:
	.size	_Z43__device_stub__Z14initialisationPiS_S_S_iiiPiS_S_S_iii, .-_Z43__device_stub__Z14initialisationPiS_S_S_iiiPiS_S_S_iii
	.globl	_Z14initialisationPiS_S_S_iii
	.type	_Z14initialisationPiS_S_S_iii, @function
_Z14initialisationPiS_S_S_iii:
.LFB3810:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z14initialisationPiS_S_S_iiiPiS_S_S_iii
	.cfi_endproc
.LFE3810:
	.size	_Z14initialisationPiS_S_S_iii, .-_Z14initialisationPiS_S_S_iii
	.globl	_Z32__device_stub__Z10copy_arrayPfS_PfS_
	.type	_Z32__device_stub__Z10copy_arrayPfS_PfS_, @function
_Z32__device_stub__Z10copy_arrayPfS_PfS_:
.LFB3811:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10copy_arrayPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L16:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3811:
	.size	_Z32__device_stub__Z10copy_arrayPfS_PfS_, .-_Z32__device_stub__Z10copy_arrayPfS_PfS_
	.globl	_Z10copy_arrayPfS_
	.type	_Z10copy_arrayPfS_, @function
_Z10copy_arrayPfS_:
.LFB3812:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z10copy_arrayPfS_PfS_
	.cfi_endproc
.LFE3812:
	.size	_Z10copy_arrayPfS_, .-_Z10copy_arrayPfS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z10copy_arrayPfS_"
.LC1:
	.string	"_Z14initialisationPiS_S_S_iii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3814:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10copy_arrayPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14initialisationPiS_S_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3814:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC2:
	.string	"rand-1024-in.txt"
.LC3:
	.string	"Optimal Allignment cost: "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3782:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3782
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$4096, %rsp
	orq	$0, (%rsp)
	subq	$3864, %rsp
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movl	$2048, %edx
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	leaq	-6200(%rbp), %r15
	leaq	-7824(%rbp), %r12
	movq	%r15, %rsi
	movq	%r12, %rdi
	leaq	-4152(%rbp), %r14
.LEHB0:
	call	_ZNSt10istrstreamC1EPcl@PLT
.LEHE0:
	leaq	-7456(%rbp), %rax
	movl	$2048, %edx
	movq	%r14, %rsi
	movq	%rax, %rdi
	movq	%rax, -7952(%rbp)
.LEHB1:
	call	_ZNSt10istrstreamC1EPcl@PLT
.LEHE1:
	leaq	-7088(%rbp), %rax
	leaq	-2104(%rbp), %r13
	movl	$2048, %edx
	movq	%r13, %rsi
	movq	%rax, %rdi
	movq	%rax, -7960(%rbp)
.LEHB2:
	call	_ZNSt10istrstreamC1EPcl@PLT
.LEHE2:
	leaq	-6720(%rbp), %rbx
	movl	$8, %edx
	leaq	.LC2(%rip), %rsi
	movq	%rbx, %rdi
.LEHB3:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE3:
	movl	$2048, %edx
	movq	%r15, %rsi
	movq	%rbx, %rdi
.LEHB4:
	call	_ZNSi7getlineEPcl.isra.0
	movl	$2048, %edx
	movq	%r14, %rsi
	movq	%rbx, %rdi
	call	_ZNSi7getlineEPcl.isra.0
	movl	$2048, %edx
	movq	%r13, %rsi
	movq	%rbx, %rdi
	call	_ZNSi7getlineEPcl.isra.0
	leaq	-7924(%rbp), %rsi
	movq	%r12, %rdi
	call	_ZNSirsERi@PLT
	movslq	-7924(%rbp), %r12
	leaq	0(,%r12,4), %rax
	movq	%r12, %rdi
	movq	%rax, -7944(%rbp)
	call	malloc@PLT
	movq	%r12, %rdi
	xorl	%r12d, %r12d
	movq	%rax, -7968(%rbp)
	call	malloc@PLT
	movq	%rax, -7976(%rbp)
.L24:
	cmpl	%r12d, -7924(%rbp)
	jle	.L47
	movq	-7968(%rbp), %rax
	movq	-7952(%rbp), %rdi
	leaq	(%rax,%r12), %rsi
	call	_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_@PLT
	movq	-7976(%rbp), %rax
	movq	-7960(%rbp), %rdi
	leaq	(%rax,%r12), %rsi
	call	_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_@PLT
	incq	%r12
	jmp	.L24
.L47:
	movq	-7944(%rbp), %rdi
	call	malloc@PLT
	movq	-7944(%rbp), %rdi
	movq	%rax, -7960(%rbp)
	call	malloc@PLT
	movq	-7944(%rbp), %rdi
	movq	%rax, %rbx
	call	malloc@PLT
	movq	-7944(%rbp), %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	-7944(%rbp), %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	-7944(%rbp), %rdi
	movq	%rax, -7984(%rbp)
	call	malloc@PLT
	movq	-7944(%rbp), %rdi
	movq	%rax, -7952(%rbp)
	call	malloc@PLT
	movq	-7944(%rbp), %rdi
	movq	%rax, -7992(%rbp)
	call	malloc@PLT
	movq	-7944(%rbp), %rdi
	movq	%rax, %r15
	call	malloc@PLT
	movq	-7944(%rbp), %rsi
	leaq	-7920(%rbp), %rdi
	movq	%rax, %r14
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	-7944(%rbp), %rsi
	leaq	-7912(%rbp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	-7944(%rbp), %rsi
	leaq	-7904(%rbp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	-7944(%rbp), %rsi
	leaq	-7896(%rbp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	-7944(%rbp), %rsi
	leaq	-7888(%rbp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	-7944(%rbp), %rsi
	leaq	-7880(%rbp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	-7944(%rbp), %rsi
	leaq	-7872(%rbp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	-7944(%rbp), %rsi
	leaq	-7864(%rbp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	-7944(%rbp), %rsi
	leaq	-7856(%rbp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movl	-7924(%rbp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movq	%rdi, -7832(%rbp)
	movl	-7828(%rbp), %ecx
	movl	%eax, -7836(%rbp)
	movq	-7836(%rbp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movq	-7920(%rbp), %rdx
	testl	%eax, %eax
	jne	.L26
	pushq	%rcx
	movl	-7924(%rbp), %eax
	movl	$1, %r9d
	movl	$2, %r8d
	movq	-7880(%rbp), %rcx
	movq	-7896(%rbp), %rsi
	pushq	%rax
	movq	-7904(%rbp), %rdi
	.cfi_escape 0x2e,0x10
	call	_Z43__device_stub__Z14initialisationPiS_S_S_iiiPiS_S_S_iii
	popq	%rax
	popq	%rdx
.L26:
	movq	-7944(%rbp), %rdx
	movq	-7920(%rbp), %rsi
	movl	$2, %ecx
	movq	-7960(%rbp), %rdi
	.cfi_escape 0x2e,0
	call	cudaMemcpy@PLT
	movq	-7944(%rbp), %rdx
	movq	-7904(%rbp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	-7944(%rbp), %rdx
	movq	-7896(%rbp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movq	-7944(%rbp), %rdx
	movq	-7880(%rbp), %rsi
	movl	$2, %ecx
	movq	-7952(%rbp), %rdi
	call	cudaMemcpy@PLT
	movslq	-7924(%rbp), %r8
	movl	$1, %r10d
	leal	-1(%r8), %eax
	leaq	4(,%rax,4), %r9
.L27:
	cmpl	%r10d, %r8d
	jle	.L48
	movq	-7968(%rbp), %rax
	movb	(%rax,%r10), %sil
	movl	$1, %eax
.L31:
	movl	0(%r13,%rax,4), %edx
	movq	-7952(%rbp), %r11
	movl	%eax, %edi
	leal	2(%rdx), %ecx
	movq	-7960(%rbp), %rdx
	movl	(%r11,%rax,4), %r11d
	movl	(%rdx,%rax,4), %edx
	cmpl	%edx, %ecx
	cmovg	%edx, %ecx
	movq	-7976(%rbp), %rdx
	incl	%ecx
	cmpb	%sil, (%rdx,%rax)
	setne	%dl
	movl	%ecx, (%rbx,%rax,4)
	movzbl	%dl, %edx
	addl	-4(%r13,%rax,4), %edx
	cmpl	%ecx, %edx
	cmovg	%ecx, %edx
	movq	-7992(%rbp), %rcx
	movl	%edx, (%rcx,%rax,4)
	leal	2(%rdx), %ecx
	subl	%eax, %ecx
	cmpl	%edx, %r11d
	cmovg	%edx, %r11d
	movl	%ecx, (%r15,%rax,4)
	movl	%ecx, (%r14,%rax,4)
	movl	$1, %ecx
	movl	%r11d, (%r12,%rax,4)
.L29:
	movl	(%r15,%rcx,4), %r11d
	cmpl	%r11d, (%r14,%rax,4)
	jle	.L28
	movl	%r11d, (%r14,%rax,4)
.L28:
	incq	%rcx
	cmpl	%ecx, %eax
	jge	.L29
	movl	(%r14,%rax,4), %ecx
	leal	1(%rdi,%rcx), %ecx
	movq	-7952(%rbp), %rdi
	movl	%ecx, 4(%rdi,%rax,4)
	cmpl	$1, %eax
	jne	.L30
	movl	(%r12), %ecx
	movl	(%rdi), %edi
	addl	$2, %ecx
	cmpl	%edi, %ecx
	cmovg	%edi, %ecx
	movq	-7952(%rbp), %rdi
	incl	%ecx
	movl	%ecx, 4(%rdi)
.L30:
	movq	-7952(%rbp), %rcx
	movl	(%rcx,%rax,4), %ecx
	cmpl	%edx, %ecx
	cmovg	%edx, %ecx
	movl	%ecx, (%r12,%rax,4)
	incq	%rax
	cmpl	%eax, %r8d
	jg	.L31
	movq	-7960(%rbp), %rdi
	movq	%rbx, %rsi
	movq	%r9, %rcx
	incq	%r10
	rep movsb
	movq	-7984(%rbp), %rdi
	movq	-7952(%rbp), %rsi
	movq	%r9, %rcx
	rep movsb
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r9, %rcx
	rep movsb
	jmp	.L27
.L48:
	movq	-7952(%rbp), %rdx
	salq	$2, %r8
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movl	-4(%r12,%r8), %eax
	movl	-4(%rdx,%r8), %edx
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	-4(%rbx,%r8), %edx
	cmpl	%edx, %eax
	movl	%edx, %ebx
	cmovle	%eax, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%ebx, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.LEHE4:
	leaq	-6720(%rbp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	leaq	-7088(%rbp), %rdi
	call	_ZNSt10istrstreamD1Ev@PLT
	leaq	-7456(%rbp), %rdi
	call	_ZNSt10istrstreamD1Ev@PLT
	leaq	-7824(%rbp), %rdi
	call	_ZNSt10istrstreamD1Ev@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L38
	jmp	.L45
.L42:
	endbr64
	movq	%rax, %rbx
.L33:
	leaq	-6720(%rbp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L34
.L41:
	endbr64
	movq	%rax, %rbx
.L34:
	leaq	-7088(%rbp), %rdi
	call	_ZNSt10istrstreamD1Ev@PLT
	jmp	.L35
.L40:
	endbr64
	movq	%rax, %rbx
.L35:
	leaq	-7456(%rbp), %rdi
	call	_ZNSt10istrstreamD1Ev@PLT
	jmp	.L36
.L39:
	endbr64
	movq	%rax, %rbx
.L36:
	leaq	-7824(%rbp), %rdi
	call	_ZNSt10istrstreamD1Ev@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L45
	movq	%rbx, %rdi
.LEHB5:
	call	_Unwind_Resume@PLT
.LEHE5:
.L45:
	call	__stack_chk_fail@PLT
.L38:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3782:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3782:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3782-.LLSDACSB3782
.LLSDACSB3782:
	.uleb128 .LEHB0-.LFB3782
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3782
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L39-.LFB3782
	.uleb128 0
	.uleb128 .LEHB2-.LFB3782
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L40-.LFB3782
	.uleb128 0
	.uleb128 .LEHB3-.LFB3782
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L41-.LFB3782
	.uleb128 0
	.uleb128 .LEHB4-.LFB3782
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L42-.LFB3782
	.uleb128 0
	.uleb128 .LEHB5-.LFB3782
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
.LLSDACSE3782:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include<iostream>
#include<fstream>
#include<strstream>
#include <hip/hip_runtime.h>
#include <math.h>
#include<stdio.h>
#include<stdlib.h>

using namespace std;

int min2(int,int);
int min1(int,int,int);



__global__ void initialisation(int* G1, int* G2, int* D1, int* I2, int ge, int gi, int n)
{
    	int j = threadIdx.x;
    	if(j>0)
    	{
    		G1[j]=gi+ge*j;
       		D1[j]=G1[j]+ge;
	}
        if(j==0)
        {
		G1[0]=0;
    		G2[0]=gi+ge*n;
               	I2[0]=G2[0]+ge;
     	}

}

__global__ void copy_array(float* A, float* B)
{
    int i = threadIdx.x;
    B[i] = A[i];
}

int main(int argc, char** argv)
{
	int i,j,n;
	
	char buffer1[2048];								//--- taking input from file
	char buffer2[2048];								//--- n,s1,s2 are the corresponding three lines of input
	char buffer3[2048];
	istrstream str1(buffer1, 2048);
	istrstream str2(buffer2, 2048);
	istrstream str3(buffer3, 2048);
	ifstream indata("rand-1024-in.txt");		
	indata.getline(buffer1, 2048);
	indata.getline(buffer2, 2048);
	indata.getline(buffer3, 2048);
	str1>>n;

	size_t size = (n) * sizeof(char);
	size_t size1 = (n)*sizeof(int);

	char* h_s1 = (char*)malloc(size);
	char* h_s2 = (char*)malloc(size);

	for(i=0;i<n;i++)
	{
		str2>>h_s1[i];
		str3>>h_s2[i];
	}												//--- end of input
		
	
	int* h_D1 = (int*)malloc(size1);
	int* h_D2 = (int*)malloc(size1);
	int* h_G1 = (int*)malloc(size1);
	int* h_G2 = (int*)malloc(size1);
	int* h_I1 = (int*)malloc(size1);
	int* h_I2 = (int*)malloc(size1);
	int* h_u = (int*)malloc(size1);
	int* h_v = (int*)malloc(size1);
	int* h_se = (int*)malloc(size1);


//	int h_D1[n], h_D2[n],h_G1[n], h_G2[n],h_I1[n+1],h_I2[n+1],h_u[n],h_v[n],h_se[n];	
	int gi,ge,s,cost;
	gi=2;ge=1;

	int *d_D1, *d_D2;
    	hipMalloc(&d_D1, size1);
	hipMalloc(&d_D2, size1);
    	int *d_G1, *d_G2;
    	hipMalloc(&d_G1, size1);
	hipMalloc(&d_G2, size1);
    	int *d_I1, *d_I2;
    	hipMalloc(&d_I1, size1);
	hipMalloc(&d_I2, size1);
    	int *d_u, *d_v, *d_se;
    	hipMalloc(&d_u, size1);
	hipMalloc(&d_v, size1);
	hipMalloc(&d_se, size1);
    
/*	char *d_s1, *d_s2;
	cudaMalloc(&d_s1, size);
	cudaMalloc(&d_s2, size);

    	cudaMemcpy(d_s1, h_s1, size, cudaMemcpyHostToDevice);
	cudaMemcpy(d_s2, h_s2, size, cudaMemcpyHostToDevice);
*/
	
//	d_G1[0]=0;
	initialisation<<<1, n>>>(d_G1, d_G2, d_D1, d_I2, gi, ge, n);



/*	h_G1[0]=0;										
		for(j=0;j<n;j++)
		{
			if(j>0)
			{
				h_G1[j]=gi+ge*j;
				h_D1[j]=h_G1[j]+ge;
			}
			if(j==0)
			{
				h_G2[0]=gi+ge*i;
				h_I2[0]=h_G2[0]+ge;
			}
		}
*/


	hipMemcpy(h_D1, d_D1, size1, hipMemcpyDeviceToHost);
    	hipMemcpy(h_G1, d_G1, size1, hipMemcpyDeviceToHost);
   	hipMemcpy(h_G2, d_G2, size1, hipMemcpyDeviceToHost);
	hipMemcpy(h_I2, d_I2, size1, hipMemcpyDeviceToHost);	
	
	for(i=1;i<n;i++)								//--- calculation of D,I,G
	{
		for(j=1;j<n;j++)
		{
			
			if(i>0 && j>0)
			{
				h_D2[j]=min(h_D1[j],h_G1[j]+gi)+ge;
				
				if(h_s1[i]!=h_s2[j])
					s=1;
				else
					s=0;
				
				h_u[j] = min(h_D2[j],h_G1[j-1]+s);
				
				h_v[j] = h_u[j]+gi-j*ge;
				
				h_G2[j]=min(h_u[j],h_I2[j]);
				
				h_se[j]=h_v[j];
				for(int k=1; k<=j;k++)
				{
					if(h_se[j] > h_v[k])
						h_se[j]=h_v[k];
				}
				
				h_I2[j+1]=h_se[j]+(j+1)*ge;
				if(j==1)
					h_I2[1]=min(h_I2[0],h_G2[0]+gi) + ge;
		
				h_G2[j]=min1(h_D2[j],h_I2[j],h_G1[j-1]+s);
			}
		}
	
	
	

		for(int t=0;t<n;t++)
		{
			h_D1[t]=h_D2[t];
			h_I1[t]=h_I2[t];
			h_G1[t]=h_G2[t];
		}
	
	}													//--- end of loop for calculation
	
	cost=min1(h_D2[n-1],h_I2[n-1],h_G2[n-1]);			//--- allignment cost
	
	cout<<"Optimal Allignment cost: "<<cost<<endl;
	
	return 0;
}
int min2(int a,int b)
{
	if(a>b)
		return b;
	else
		return a;
}

int min1(int a,int b,int c)
{
	int m=a;
    if(m>b)
		m=b;
    if(m>c)
		m=c;
    return m;
}

	.text
	.file	"prob.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z29__device_stub__initialisationPiS_S_S_iii # -- Begin function _Z29__device_stub__initialisationPiS_S_S_iii
	.type	_Z29__device_stub__initialisationPiS_S_S_iii,@function
_Z29__device_stub__initialisationPiS_S_S_iii: # @_Z29__device_stub__initialisationPiS_S_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14initialisationPiS_S_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__initialisationPiS_S_S_iii, .Lfunc_end0-_Z29__device_stub__initialisationPiS_S_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__copy_arrayPfS_ # -- Begin function _Z25__device_stub__copy_arrayPfS_
	.type	_Z25__device_stub__copy_arrayPfS_,@function
_Z25__device_stub__copy_arrayPfS_:      # @_Z25__device_stub__copy_arrayPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10copy_arrayPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__copy_arrayPfS_, .Lfunc_end1-_Z25__device_stub__copy_arrayPfS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$7912, %rsp                     # imm = 0x1EE8
	.cfi_def_cfa_offset 7968
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	1392(%rsp), %rdi
	leaq	5856(%rsp), %rsi
	movl	$2048, %edx                     # imm = 0x800
	callq	_ZNSt10istrstreamC1EPcl
.Ltmp0:
	leaq	1024(%rsp), %rdi
	leaq	3808(%rsp), %rsi
	movl	$2048, %edx                     # imm = 0x800
	callq	_ZNSt10istrstreamC1EPcl
.Ltmp1:
# %bb.1:
.Ltmp3:
	leaq	656(%rsp), %rdi
	leaq	1760(%rsp), %rsi
	movl	$2048, %edx                     # imm = 0x800
	callq	_ZNSt10istrstreamC1EPcl
.Ltmp4:
# %bb.2:
.Ltmp6:
	leaq	136(%rsp), %rbx
	movl	$.L.str, %esi
	movq	%rbx, %rdi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
.Ltmp7:
# %bb.3:
	movq	136(%rsp), %rax
	addq	-24(%rax), %rbx
.Ltmp9:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp10:
# %bb.4:                                # %.noexc
.Ltmp11:
	movsbl	%al, %ecx
	leaq	136(%rsp), %rbx
	leaq	5856(%rsp), %rsi
	movl	$2048, %edx                     # imm = 0x800
	movq	%rbx, %rdi
	callq	_ZNSi7getlineEPclc
.Ltmp12:
# %bb.5:                                # %_ZNSi7getlineEPcl.exit
	movq	136(%rsp), %rax
	addq	-24(%rax), %rbx
.Ltmp13:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp14:
# %bb.6:                                # %.noexc161
.Ltmp15:
	movsbl	%al, %ecx
	leaq	136(%rsp), %rbx
	leaq	3808(%rsp), %rsi
	movl	$2048, %edx                     # imm = 0x800
	movq	%rbx, %rdi
	callq	_ZNSi7getlineEPclc
.Ltmp16:
# %bb.7:                                # %_ZNSi7getlineEPcl.exit163
	movq	136(%rsp), %rax
	addq	-24(%rax), %rbx
.Ltmp17:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp18:
# %bb.8:                                # %.noexc164
.Ltmp19:
	movsbl	%al, %ecx
	leaq	136(%rsp), %rdi
	leaq	1760(%rsp), %rsi
	movl	$2048, %edx                     # imm = 0x800
	callq	_ZNSi7getlineEPclc
.Ltmp20:
# %bb.9:                                # %_ZNSi7getlineEPcl.exit166
.Ltmp21:
	leaq	1392(%rsp), %rdi
	leaq	12(%rsp), %rsi
	callq	_ZNSirsERi
.Ltmp22:
# %bb.10:
	movslq	12(%rsp), %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	%rbx, %r13
	testq	%rbx, %rbx
	jle	.LBB2_15
# %bb.11:                               # %.lr.ph.preheader
	xorl	%r15d, %r15d
	leaq	1024(%rsp), %rbx
	leaq	656(%rsp), %r14
.LBB2_12:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%r12,%r15), %rsi
.Ltmp24:
	movq	%rbx, %rdi
	callq	_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_
.Ltmp25:
# %bb.13:                               #   in Loop: Header=BB2_12 Depth=1
	movq	24(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%r15), %rsi
.Ltmp26:
	movq	%r14, %rdi
	callq	_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_
.Ltmp27:
# %bb.14:                               #   in Loop: Header=BB2_12 Depth=1
	incq	%r15
	movslq	12(%rsp), %rax
	cmpq	%rax, %r15
	jl	.LBB2_12
.LBB2_15:                               # %._crit_edge
	movq	%r12, 80(%rsp)                  # 8-byte Spill
	movq	%r13, %r15
	shlq	$2, %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %rbp
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r14
.Ltmp29:
	leaq	56(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp30:
# %bb.16:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
.Ltmp31:
	leaq	128(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp32:
# %bb.17:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit169
.Ltmp34:
	leaq	48(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp35:
# %bb.18:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit171
.Ltmp36:
	leaq	40(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp37:
# %bb.19:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit173
.Ltmp39:
	leaq	120(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp40:
# %bb.20:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit175
.Ltmp41:
	leaq	32(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp42:
# %bb.21:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit177
.Ltmp44:
	leaq	112(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp45:
# %bb.22:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit179
.Ltmp46:
	leaq	104(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp47:
# %bb.23:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit181
.Ltmp48:
	leaq	96(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp49:
# %bb.24:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit183
	movl	12(%rsp), %edx
	btsq	$32, %rdx
.Ltmp50:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp51:
# %bb.25:
	testl	%eax, %eax
	jne	.LBB2_27
# %bb.26:
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	56(%rsp), %rdx
	movq	32(%rsp), %rcx
	movl	12(%rsp), %eax
.Ltmp52:
	movl	%eax, (%rsp)
	movl	$2, %r8d
	movl	$1, %r9d
	callq	_Z29__device_stub__initialisationPiS_S_S_iii
.Ltmp53:
.LBB2_27:
	movq	56(%rsp), %rsi
.Ltmp54:
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp55:
# %bb.28:
	movq	48(%rsp), %rsi
.Ltmp56:
	movq	%rbp, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp57:
# %bb.29:
	movq	40(%rsp), %rsi
.Ltmp58:
	movq	%r13, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp59:
# %bb.30:
	movq	32(%rsp), %rsi
.Ltmp60:
	movq	%rbx, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp61:
# %bb.31:                               # %.preheader195
	movl	12(%rsp), %r15d
	cmpl	$2, %r15d
	jl	.LBB2_40
# %bb.32:                               # %.preheader194.lr.ph
	leaq	(,%r15,4), %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movl	$1, %ecx
	movq	%r12, 64(%rsp)                  # 8-byte Spill
.LBB2_33:                               # %.lr.ph200
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_34 Depth 2
                                        #       Child Loop BB2_35 Depth 3
	movq	80(%rsp), %rax                  # 8-byte Reload
	movq	%rcx, 88(%rsp)                  # 8-byte Spill
	movb	(%rax,%rcx), %al
	movl	$1, %r8d
	movq	24(%rsp), %r11                  # 8-byte Reload
.LBB2_34:                               #   Parent Loop BB2_33 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_35 Depth 3
	movq	%r8, %rcx
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	(%rdx,%r8,4), %esi
	movl	(%rbp,%r8,4), %edx
	addl	$2, %edx
	cmpl	%edx, %esi
	cmovll	%esi, %edx
	incl	%edx
	movl	%edx, (%r12,%r8,4)
	xorl	%esi, %esi
	cmpb	(%r11,%r8), %al
	setne	%sil
	addl	-4(%rbp,%r8,4), %esi
	cmpl	%esi, %edx
	movl	%esi, %r8d
	cmovll	%edx, %r8d
	movl	%r8d, %r9d
	subl	%ecx, %r9d
	addl	$2, %r9d
	movl	%r9d, (%r14,%rcx,4)
	movl	(%rbx,%rcx,4), %edi
	cmpl	%edi, %r8d
	cmovgel	%edi, %r8d
	movl	%r8d, (%r13,%rcx,4)
	xorl	%r8d, %r8d
.LBB2_35:                               #   Parent Loop BB2_33 Depth=1
                                        #     Parent Loop BB2_34 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%r9d, %r10d
	movl	4(%r14,%r8,4), %r9d
	cmpl	%r9d, %r10d
	cmovll	%r10d, %r9d
	incq	%r8
	cmpq	%r8, %rcx
	jne	.LBB2_35
# %bb.36:                               #   in Loop: Header=BB2_34 Depth=2
	leaq	1(%rcx), %r8
	addl	%r8d, %r9d
	movl	%r9d, 4(%rbx,%rcx,4)
	cmpq	$1, %rcx
	jne	.LBB2_38
# %bb.37:                               #   in Loop: Header=BB2_34 Depth=2
	movl	(%rbx), %edi
	movl	(%r13), %r9d
	addl	$2, %r9d
	cmpl	%r9d, %edi
	cmovll	%edi, %r9d
	incl	%r9d
	movl	%r9d, 4(%rbx)
	movl	(%rbx,%rcx,4), %edi
.LBB2_38:                               #   in Loop: Header=BB2_34 Depth=2
	cmpl	%edi, %edx
	cmovll	%edx, %edi
	cmpl	%esi, %edi
	cmovgel	%esi, %edi
	movl	%edi, (%r13,%rcx,4)
	cmpq	%r15, %r8
	jne	.LBB2_34
# %bb.39:                               # %._crit_edge203
                                        #   in Loop: Header=BB2_33 Depth=1
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%r12, %rsi
	movq	72(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdx
	callq	memcpy@PLT
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movq	64(%rsp), %r12                  # 8-byte Reload
	callq	memcpy@PLT
	movq	88(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	cmpq	%r15, %rcx
	jne	.LBB2_33
.LBB2_40:                               # %._crit_edge205
	movslq	%r15d, %rax
	movl	-4(%r12,%rax,4), %r14d
	movl	-4(%rbx,%rax,4), %ebx
	movl	-4(%r13,%rax,4), %ebp
.Ltmp62:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$25, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp63:
# %bb.41:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	cmpl	%ebx, %r14d
	cmovll	%r14d, %ebx
	cmpl	%ebp, %ebx
	cmovgel	%ebp, %ebx
.Ltmp64:
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
.Ltmp65:
# %bb.42:
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp66:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp67:
# %bb.43:                               # %.noexc188
.Ltmp68:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp69:
# %bb.44:                               # %.noexc189
.Ltmp70:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp71:
# %bb.45:                               # %_ZNSolsEPFRSoS_E.exit
	leaq	136(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	leaq	656(%rsp), %rdi
	callq	_ZNSt10istrstreamD1Ev
	leaq	1024(%rsp), %rdi
	callq	_ZNSt10istrstreamD1Ev
	leaq	1392(%rsp), %rdi
	callq	_ZNSt10istrstreamD1Ev
	xorl	%eax, %eax
	addq	$7912, %rsp                     # imm = 0x1EE8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_48:
	.cfi_def_cfa_offset 7968
.Ltmp8:
	movq	%rax, %rbx
	jmp	.LBB2_56
.LBB2_47:
.Ltmp5:
	movq	%rax, %rbx
	jmp	.LBB2_57
.LBB2_46:
.Ltmp2:
	movq	%rax, %rbx
	jmp	.LBB2_58
.LBB2_54:
.Ltmp43:
	jmp	.LBB2_55
.LBB2_52:
.Ltmp38:
	jmp	.LBB2_55
.LBB2_51:
.Ltmp33:
	jmp	.LBB2_55
.LBB2_49:
.Ltmp23:
	jmp	.LBB2_55
.LBB2_53:
.Ltmp72:
	jmp	.LBB2_55
.LBB2_50:
.Ltmp28:
.LBB2_55:
	movq	%rax, %rbx
	leaq	136(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
.LBB2_56:
	leaq	656(%rsp), %rdi
	callq	_ZNSt10istrstreamD1Ev
.LBB2_57:
	leaq	1024(%rsp), %rdi
	callq	_ZNSt10istrstreamD1Ev
.LBB2_58:
	leaq	1392(%rsp), %rdi
	callq	_ZNSt10istrstreamD1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp22-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp22
	.uleb128 .Ltmp23-.Lfunc_begin0          #     jumps to .Ltmp23
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp24-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp27-.Ltmp24                #   Call between .Ltmp24 and .Ltmp27
	.uleb128 .Ltmp28-.Lfunc_begin0          #     jumps to .Ltmp28
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp29-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp32-.Ltmp29                #   Call between .Ltmp29 and .Ltmp32
	.uleb128 .Ltmp33-.Lfunc_begin0          #     jumps to .Ltmp33
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp34-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp37-.Ltmp34                #   Call between .Ltmp34 and .Ltmp37
	.uleb128 .Ltmp38-.Lfunc_begin0          #     jumps to .Ltmp38
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp39-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp42-.Ltmp39                #   Call between .Ltmp39 and .Ltmp42
	.uleb128 .Ltmp43-.Lfunc_begin0          #     jumps to .Ltmp43
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp44-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp61-.Ltmp44                #   Call between .Ltmp44 and .Ltmp61
	.uleb128 .Ltmp72-.Lfunc_begin0          #     jumps to .Ltmp72
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp61-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp62-.Ltmp61                #   Call between .Ltmp61 and .Ltmp62
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp62-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Ltmp71-.Ltmp62                #   Call between .Ltmp62 and .Ltmp71
	.uleb128 .Ltmp72-.Lfunc_begin0          #     jumps to .Ltmp72
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp71-.Lfunc_begin0          # >> Call Site 13 <<
	.uleb128 .Lfunc_end2-.Ltmp71            #   Call between .Ltmp71 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_Z4min1iii                      # -- Begin function _Z4min1iii
	.type	_Z4min1iii,@function
_Z4min1iii:                             # @_Z4min1iii
	.cfi_startproc
# %bb.0:
	movl	%esi, %eax
	cmpl	%esi, %edi
	cmovll	%edi, %eax
	cmpl	%edx, %eax
	cmovgel	%edx, %eax
	retq
.Lfunc_end3:
	.size	_Z4min1iii, .Lfunc_end3-_Z4min1iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z4min2ii                       # -- Begin function _Z4min2ii
	.type	_Z4min2ii,@function
_Z4min2ii:                              # @_Z4min2ii
	.cfi_startproc
# %bb.0:
	movl	%esi, %eax
	cmpl	%esi, %edi
	cmovll	%edi, %eax
	retq
.Lfunc_end4:
	.size	_Z4min2ii, .Lfunc_end4-_Z4min2ii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14initialisationPiS_S_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10copy_arrayPfS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14initialisationPiS_S_S_iii,@object # @_Z14initialisationPiS_S_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z14initialisationPiS_S_S_iii
	.p2align	3, 0x0
_Z14initialisationPiS_S_S_iii:
	.quad	_Z29__device_stub__initialisationPiS_S_S_iii
	.size	_Z14initialisationPiS_S_S_iii, 8

	.type	_Z10copy_arrayPfS_,@object      # @_Z10copy_arrayPfS_
	.globl	_Z10copy_arrayPfS_
	.p2align	3, 0x0
_Z10copy_arrayPfS_:
	.quad	_Z25__device_stub__copy_arrayPfS_
	.size	_Z10copy_arrayPfS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"rand-1024-in.txt"
	.size	.L.str, 17

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Optimal Allignment cost: "
	.size	.L.str.1, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14initialisationPiS_S_S_iii"
	.size	.L__unnamed_1, 30

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10copy_arrayPfS_"
	.size	.L__unnamed_2, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__initialisationPiS_S_S_iii
	.addrsig_sym _Z25__device_stub__copy_arrayPfS_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z14initialisationPiS_S_S_iii
	.addrsig_sym _Z10copy_arrayPfS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14initialisationPiS_S_S_iii ; -- Begin function _Z14initialisationPiS_S_S_iii
	.globl	_Z14initialisationPiS_S_S_iii
	.p2align	8
	.type	_Z14initialisationPiS_S_S_iii,@function
_Z14initialisationPiS_S_S_iii:          ; @_Z14initialisationPiS_S_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b128 s[0:3], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s3, exec_lo
	v_cmpx_ne_u32_e32 0, v0
	s_xor_b32 s3, exec_lo, s3
; %bb.1:
	s_mov_b32 s12, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, v0, s0, s[12:13]
	v_lshlrev_b32_e32 v0, 2, v0
	v_add_nc_u32_e32 v2, s0, v1
	s_clause 0x1
	global_store_b32 v0, v1, s[4:5]
	global_store_b32 v0, v2, s[8:9]
; %bb.2:                                ; %Flow
	s_and_not1_saveexec_b32 s3, s3
; %bb.3:
	s_mul_i32 s2, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s1, s2, s1
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s1
	s_add_i32 s0, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s0
	s_clause 0x2
	global_store_b32 v0, v0, s[4:5]
	global_store_b32 v0, v1, s[6:7]
	global_store_b32 v0, v2, s[10:11]
; %bb.4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14initialisationPiS_S_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 14
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14initialisationPiS_S_S_iii, .Lfunc_end0-_Z14initialisationPiS_S_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 14
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 14
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10copy_arrayPfS_      ; -- Begin function _Z10copy_arrayPfS_
	.globl	_Z10copy_arrayPfS_
	.p2align	8
	.type	_Z10copy_arrayPfS_,@function
_Z10copy_arrayPfS_:                     ; @_Z10copy_arrayPfS_
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_load_b32 v1, v0, s[0:1]
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[2:3]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10copy_arrayPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 4
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10copy_arrayPfS_, .Lfunc_end1-_Z10copy_arrayPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 48
; NumSgprs: 4
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 4
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 44
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14initialisationPiS_S_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     14
    .sgpr_spill_count: 0
    .symbol:         _Z14initialisationPiS_S_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10copy_arrayPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     4
    .sgpr_spill_count: 0
    .symbol:         _Z10copy_arrayPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
