#include<stdlib.h>
#include<math.h>
#include<iostream>
#include<time.h>

#define omega 1.5

using namespace std;

__global__ void calculateU(double* u, double* f, double* pu, int N, double h2, int rb, double * e)
{
	__shared__ double s_u[10][10];
	e[0]=0;
	int i = blockIdx.x*blockDim.x + threadIdx.x; //  "" 
	int j = blockIdx.y*blockDim.y + threadIdx.y; //  "" 
	int tx = threadIdx.x+1;
	int ty = threadIdx.y+1;
	int k = j*N + i;		 //  "" 
	if(i<N && j<N)
	{
	    s_u[ty][tx] = u[k];
	    if(ty==1 && j>0)
		s_u[ty-1][tx] = u[k-N];
	    if(ty==8 && j<N-1)
		s_u[ty+1][tx] = u[k+N];
	    if(tx==1 && i>0)
		s_u[ty][tx-1] = u[k-1];
	    if(tx==8 && i<N-1)
		s_u[ty][tx+1] = u[k+1];
		
	    if(i==0)
		s_u[ty][tx-1] = u[k+N-2];
	    if(i==N-1)
		s_u[ty][tx+1] = u[k-N+2];
	}
	__syncthreads();
	if((i>0)&&(i<N-1)&&(j>0)&&(j<N-1)&&(k<N*N)&&(i+j)%2==rb){
	    u[k] = omega*0.25*(h2*f[k] +s_u[ty-1][tx] + s_u[ty+1][tx] + s_u[ty][tx-1] + s_u[ty][tx+1] - 4*s_u[ty][tx])+ s_u[ty][tx];
	    if(e[0]<abs(pu[k]-u[k]))
		e[0] = abs(pu[k]-u[k]);
	}
}

int main( int argc, char *  argv [] )
{
	double h =(double)1/(double)1024;
	double h2=h*h;
	int numBytes = sizeof(double)*1024*1024;
	double* U;
	double* f;
	double* pU;
	double* eps;
	U = (double*)malloc(numBytes);
	f = (double*)malloc(numBytes);
	pU = (double*)malloc(numBytes);
	eps = (double*)malloc(sizeof(double));
	eps[0]=1;
	//    

	for(int i=0; i<1024; i++)
	{
		double x = i*h;
		for(int j=0; j<1024; j++)
		{
		    double y = j*h;
		    f[i*1024+j] = 4;
		    U[i*1024+j] = 0;
		    pU[i*1024+j] = -x*x -y*y +x +y;
		}

	}
	// 
	for(int i=0; i<1024 ; i++)
	{
		double x = i*h;
		U[i*1024] = - x*x + x;
		U[i] = - x*x + x;
		U[i*1024+1023] = - x*x + x;
		U[1023*1024+i] = - x*x + x;
		pU[i*1024] = - x*x + x;
		pU[i] = - x*x + x;
		pU[i*1024+1023] = - x*x + x;
		pU[1024*1023+i] = - x*x + x;
	}
	// allocate device memory
	double * devU = NULL;
	double * devpU = NULL;
	double * devF = NULL;
	double * devE = NULL;
	
	cudaMalloc ( (void**)&devU, numBytes );
	cudaMalloc ( (void**)&devpU, numBytes );
	cudaMalloc ( (void**)&devF, numBytes );
	cudaMalloc ( (void**)&devE, sizeof(double));
	
	// set kernel launch configuration
	dim3 threads = dim3(128, 128,1);
	dim3 blocks  = dim3(8, 8,1);
	
	cudaMemcpy(devU,U,numBytes,cudaMemcpyHostToDevice);
	cudaMemcpy(devpU,pU,numBytes,cudaMemcpyHostToDevice);
	cudaMemcpy(devF,f,numBytes,cudaMemcpyHostToDevice);
	cudaMemcpy(devE,eps,sizeof(double),cudaMemcpyHostToDevice);
	//  
	int count = 0;
	clock();
	for(int i = 0; (i<50000)&&(eps[0]>0.0005); i++){
    	    //eps[0]=0;
    	    calculateU<<<threads,blocks,0>>>(devU,devF,devpU,1024,h2,0,devE);
    	    calculateU<<<threads,blocks,0>>>(devU,devF,devpU,1024,h2,1,devE);
    	    cudaMemcpy(eps,devE,sizeof(double),cudaMemcpyDeviceToHost);
    	    count = i;
	}
	// 
	cudaMemcpy(U,devU,numBytes,cudaMemcpyDeviceToHost);
	cudaMemcpy(pU,devpU,numBytes,cudaMemcpyDeviceToHost);
	cudaMemcpy(f,devF,numBytes,cudaMemcpyDeviceToHost);

	clock_t c2 = clock();
	cerr << "Время: " << ((double)c2)/CLOCKS_PER_SEC << "мс" << endl << "Погрешность: " << eps[0] << ",  кол-во итераций:" <<count << endl;;
	for(int i=0; i<1024 ; i++)
	{
		for(int j=0; j<1024 ; j++){
			cout << i*h << " " << j*h << " " << U[i*1024+j]<< "\n";
		}
	}
	return 0;
}

	.file	"tmpxft_002e56f4_00000000-6_relax.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z39__device_stub__Z10calculateUPdS_S_idiS_PdS_S_idiS_
	.type	_Z39__device_stub__Z10calculateUPdS_S_idiS_PdS_S_idiS_, @function
_Z39__device_stub__Z10calculateUPdS_S_idiS_PdS_S_idiS_:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movq	%r9, (%rsp)
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z10calculateUPdS_S_idiS_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z39__device_stub__Z10calculateUPdS_S_idiS_PdS_S_idiS_, .-_Z39__device_stub__Z10calculateUPdS_S_idiS_PdS_S_idiS_
	.globl	_Z10calculateUPdS_S_idiS_
	.type	_Z10calculateUPdS_S_idiS_, @function
_Z10calculateUPdS_S_idiS_:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z10calculateUPdS_S_idiS_PdS_S_idiS_
	.cfi_endproc
.LFE3661:
	.size	_Z10calculateUPdS_S_idiS_, .-_Z10calculateUPdS_S_idiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC6:
	.string	"\320\222\321\200\320\265\320\274\321\217: "
.LC8:
	.string	"\320\274\321\201"
.LC9:
	.string	"\320\237\320\276\320\263\321\200\320\265\321\210\320\275\320\276\321\201\321\202\321\214: "
.LC10:
	.string	",  \320\272\320\276\320\273-\320\262\320\276 \320\270\321\202\320\265\321\200\320\260\321\206\320\270\320\271:"
.LC11:
	.string	" "
.LC12:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$8388608, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$8388608, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$8388608, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$8, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	.LC2(%rip), %xmm4
	movsd	.LC3(%rip), %xmm5
	movq	%rax, %r12
	movq	.LC0(%rip), %rax
	movq	%rax, (%r12)
	xorl	%eax, %eax
.L10:
	cvtsi2sdl	%eax, %xmm2
	mulsd	.LC1(%rip), %xmm2
	movq	%rax, %rcx
	xorl	%edx, %edx
	salq	$13, %rcx
	movaps	%xmm2, %xmm3
	xorps	%xmm4, %xmm3
	mulsd	%xmm2, %xmm3
.L9:
	cvtsi2sdl	%edx, %xmm1
	movaps	%xmm3, %xmm0
	incl	%edx
	movsd	%xmm5, 0(%r13,%rcx)
	mulsd	.LC1(%rip), %xmm1
	movaps	%xmm1, %xmm6
	mulsd	%xmm1, %xmm6
	subsd	%xmm6, %xmm0
	addsd	%xmm2, %xmm0
	addsd	%xmm1, %xmm0
	movsd	%xmm0, 0(%rbp,%rcx)
	addq	$8, %rcx
	cmpl	$1024, %edx
	jne	.L9
	incq	%rax
	cmpq	$1024, %rax
	jne	.L10
	xorl	%eax, %eax
	movl	$2097152, %ecx
	movq	%rbx, %rdi
	xorl	%edx, %edx
	rep stosl
	xorl	%eax, %eax
.L13:
	cvtsi2sdl	%eax, %xmm0
	mulsd	.LC1(%rip), %xmm0
	movaps	%xmm0, %xmm1
	mulsd	%xmm0, %xmm1
	subsd	%xmm1, %xmm0
	movsd	%xmm0, (%rbx,%rdx)
	movsd	%xmm0, 0(%rbp,%rdx)
	movsd	%xmm0, (%rbx,%rax,8)
	movsd	%xmm0, 0(%rbp,%rax,8)
	movsd	%xmm0, 8184(%rbx,%rdx)
	movsd	%xmm0, 8184(%rbp,%rdx)
	addq	$8192, %rdx
	movsd	%xmm0, 8380416(%rbx,%rax,8)
	movsd	%xmm0, 8380416(%rbp,%rax,8)
	incq	%rax
	cmpq	$1024, %rax
	jne	.L13
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	movl	$8388608, %esi
	xorl	%r15d, %r15d
	movq	%rax, 16(%rsp)
	xorl	%r14d, %r14d
	movq	%rax, 24(%rsp)
	movq	%rax, 32(%rsp)
	movq	%rax, 40(%rsp)
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$8388608, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$8388608, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$8, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movabsq	$549755814016, %rax
	movl	$8388608, %edx
	movl	$1, 56(%rsp)
	movq	%rax, 48(%rsp)
	movabsq	$34359738376, %rax
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$8388608, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$8388608, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$8, %edx
	call	cudaMemcpy@PLT
	call	clock@PLT
.L14:
	movsd	(%r12), %xmm0
	comisd	.LC5(%rip), %xmm0
	jbe	.L17
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	40(%rsp), %r9
	movsd	.LC4(%rip), %xmm0
	xorl	%r8d, %r8d
	movl	$1024, %ecx
	movq	24(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z39__device_stub__Z10calculateUPdS_S_idiS_PdS_S_idiS_
.L15:
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	40(%rsp), %r9
	movq	24(%rsp), %rdx
	movl	$1, %r8d
	movl	$1024, %ecx
	movsd	.LC4(%rip), %xmm0
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z39__device_stub__Z10calculateUPdS_S_idiS_PdS_S_idiS_
.L16:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	%r15d, %r14d
	movl	$8, %edx
	call	cudaMemcpy@PLT
	leal	1(%r15), %eax
	cmpl	$49999, %r15d
	je	.L23
	movl	%eax, %r15d
	jmp	.L14
.L23:
	movl	$49999, %r14d
.L17:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$8388608, %edx
	movq	%rbx, %rdi
	leaq	_ZSt4cout(%rip), %r15
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$2, %ecx
	movl	$8388608, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	movl	$8388608, %edx
	call	cudaMemcpy@PLT
	call	clock@PLT
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	movq	%rax, %rbp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtsi2sdq	%rbp, %xmm0
	divsd	.LC7(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC8(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	(%r12), %xmm0
	xorl	%r12d, %r12d
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC10(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r14d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
.L19:
	cvtsi2sdl	%r12d, %xmm0
	mulsd	.LC1(%rip), %xmm0
	movq	%r12, %r13
	xorl	%ebp, %ebp
	salq	$13, %r13
	addq	%rbx, %r13
	movsd	%xmm0, 8(%rsp)
.L20:
	movsd	8(%rsp), %xmm0
	movq	%r15, %rdi
	leaq	.LC11(%rip), %r14
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtsi2sdl	%ebp, %xmm0
	mulsd	.LC1(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	0(%r13,%rbp,8), %xmm0
	incq	%rbp
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC12(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$1024, %rbp
	jne	.L20
	incq	%r12
	cmpq	$1024, %r12
	jne	.L19
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC13:
	.string	"_Z10calculateUPdS_S_idiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10calculateUPdS_S_idiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1072693248
	.align 8
.LC1:
	.long	0
	.long	1062207488
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC2:
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.section	.rodata.cst8
	.align 8
.LC3:
	.long	0
	.long	1074790400
	.align 8
.LC4:
	.long	0
	.long	1051721728
	.align 8
.LC5:
	.long	-755914244
	.long	1061184077
	.align 8
.LC7:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<stdlib.h>
#include<math.h>
#include<iostream>
#include<time.h>

#define omega 1.5

using namespace std;

__global__ void calculateU(double* u, double* f, double* pu, int N, double h2, int rb, double * e)
{
	__shared__ double s_u[10][10];
	e[0]=0;
	int i = blockIdx.x*blockDim.x + threadIdx.x; //  "" 
	int j = blockIdx.y*blockDim.y + threadIdx.y; //  "" 
	int tx = threadIdx.x+1;
	int ty = threadIdx.y+1;
	int k = j*N + i;		 //  "" 
	if(i<N && j<N)
	{
	    s_u[ty][tx] = u[k];
	    if(ty==1 && j>0)
		s_u[ty-1][tx] = u[k-N];
	    if(ty==8 && j<N-1)
		s_u[ty+1][tx] = u[k+N];
	    if(tx==1 && i>0)
		s_u[ty][tx-1] = u[k-1];
	    if(tx==8 && i<N-1)
		s_u[ty][tx+1] = u[k+1];
		
	    if(i==0)
		s_u[ty][tx-1] = u[k+N-2];
	    if(i==N-1)
		s_u[ty][tx+1] = u[k-N+2];
	}
	__syncthreads();
	if((i>0)&&(i<N-1)&&(j>0)&&(j<N-1)&&(k<N*N)&&(i+j)%2==rb){
	    u[k] = omega*0.25*(h2*f[k] +s_u[ty-1][tx] + s_u[ty+1][tx] + s_u[ty][tx-1] + s_u[ty][tx+1] - 4*s_u[ty][tx])+ s_u[ty][tx];
	    if(e[0]<abs(pu[k]-u[k]))
		e[0] = abs(pu[k]-u[k]);
	}
}

int main( int argc, char *  argv [] )
{
	double h =(double)1/(double)1024;
	double h2=h*h;
	int numBytes = sizeof(double)*1024*1024;
	double* U;
	double* f;
	double* pU;
	double* eps;
	U = (double*)malloc(numBytes);
	f = (double*)malloc(numBytes);
	pU = (double*)malloc(numBytes);
	eps = (double*)malloc(sizeof(double));
	eps[0]=1;
	//    

	for(int i=0; i<1024; i++)
	{
		double x = i*h;
		for(int j=0; j<1024; j++)
		{
		    double y = j*h;
		    f[i*1024+j] = 4;
		    U[i*1024+j] = 0;
		    pU[i*1024+j] = -x*x -y*y +x +y;
		}

	}
	// 
	for(int i=0; i<1024 ; i++)
	{
		double x = i*h;
		U[i*1024] = - x*x + x;
		U[i] = - x*x + x;
		U[i*1024+1023] = - x*x + x;
		U[1023*1024+i] = - x*x + x;
		pU[i*1024] = - x*x + x;
		pU[i] = - x*x + x;
		pU[i*1024+1023] = - x*x + x;
		pU[1024*1023+i] = - x*x + x;
	}
	// allocate device memory
	double * devU = NULL;
	double * devpU = NULL;
	double * devF = NULL;
	double * devE = NULL;
	
	hipMalloc ( (void**)&devU, numBytes );
	hipMalloc ( (void**)&devpU, numBytes );
	hipMalloc ( (void**)&devF, numBytes );
	hipMalloc ( (void**)&devE, sizeof(double));
	
	// set kernel launch configuration
	dim3 threads = dim3(128, 128,1);
	dim3 blocks  = dim3(8, 8,1);
	
	hipMemcpy(devU,U,numBytes,hipMemcpyHostToDevice);
	hipMemcpy(devpU,pU,numBytes,hipMemcpyHostToDevice);
	hipMemcpy(devF,f,numBytes,hipMemcpyHostToDevice);
	hipMemcpy(devE,eps,sizeof(double),hipMemcpyHostToDevice);
	//  
	int count = 0;
	clock();
	for(int i = 0; (i<50000)&&(eps[0]>0.0005); i++){
    	    //eps[0]=0;
    	    calculateU<<<threads,blocks,0>>>(devU,devF,devpU,1024,h2,0,devE);
    	    calculateU<<<threads,blocks,0>>>(devU,devF,devpU,1024,h2,1,devE);
    	    hipMemcpy(eps,devE,sizeof(double),hipMemcpyDeviceToHost);
    	    count = i;
	}
	// 
	hipMemcpy(U,devU,numBytes,hipMemcpyDeviceToHost);
	hipMemcpy(pU,devpU,numBytes,hipMemcpyDeviceToHost);
	hipMemcpy(f,devF,numBytes,hipMemcpyDeviceToHost);

	clock_t c2 = clock();
	cerr << "Время: " << ((double)c2)/CLOCKS_PER_SEC << "мс" << endl << "Погрешность: " << eps[0] << ",  кол-во итераций:" <<count << endl;;
	for(int i=0; i<1024 ; i++)
	{
		for(int j=0; j<1024 ; j++){
			cout << i*h << " " << j*h << " " << U[i*1024+j]<< "\n";
		}
	}
	return 0;
}

	.text
	.file	"relax.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z25__device_stub__calculateUPdS_S_idiS_ # -- Begin function _Z25__device_stub__calculateUPdS_S_idiS_
	.type	_Z25__device_stub__calculateUPdS_S_idiS_,@function
_Z25__device_stub__calculateUPdS_S_idiS_: # @_Z25__device_stub__calculateUPdS_S_idiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	movq	%rsp, %r10
	movl	%r8d, (%r10)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r10, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10calculateUPdS_S_idiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__calculateUPdS_S_idiS_, .Lfunc_end0-_Z25__device_stub__calculateUPdS_S_idiS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x3f50000000000000              # double 9.765625E-4
.LCPI1_2:
	.quad	0x3f40624dd2f1a9fc              # double 5.0000000000000001E-4
.LCPI1_3:
	.quad	0x3eb0000000000000              # double 9.5367431640625E-7
.LCPI1_4:
	.quad	0x412e848000000000              # double 1.0E+6
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI1_1:
	.quad	0x8000000000000000              # double -0
	.quad	0x8000000000000000              # double -0
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1, %edi
	movl	$8388608, %esi                  # imm = 0x800000
	callq	calloc@PLT
	movq	%rax, %rbx
	movl	$8388608, %edi                  # imm = 0x800000
	callq	malloc
	movq	%rax, %r15
	movl	$8388608, %edi                  # imm = 0x800000
	callq	malloc
	movq	%rax, %r12
	movl	$8, %edi
	callq	malloc
	movq	%rax, %r14
	movabsq	$4607182418800017408, %rax      # imm = 0x3FF0000000000000
	movq	%rax, (%r14)
	xorl	%eax, %eax
	movsd	.LCPI1_0(%rip), %xmm6           # xmm6 = mem[0],zero
	movapd	.LCPI1_1(%rip), %xmm0           # xmm0 = [-0.0E+0,-0.0E+0]
	movabsq	$4616189618054758400, %rcx      # imm = 0x4010000000000000
	movl	$8192, %edx                     # imm = 0x2000
	movq	%r15, 8(%rsp)                   # 8-byte Spill
	movq	%r12, %rdi
.LBB1_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorps	%xmm1, %xmm1
	cvtsi2sd	%eax, %xmm1
	mulsd	%xmm6, %xmm1
	movapd	%xmm1, %xmm2
	xorpd	%xmm0, %xmm2
	mulsd	%xmm1, %xmm2
	xorl	%r8d, %r8d
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm3, %xmm3
	cvtsi2sd	%r8d, %xmm3
	mulsd	%xmm6, %xmm3
	movq	%rcx, (%r15,%r8,8)
	movapd	%xmm3, %xmm4
	mulsd	%xmm3, %xmm4
	movapd	%xmm2, %xmm5
	subsd	%xmm4, %xmm5
	addsd	%xmm1, %xmm5
	addsd	%xmm3, %xmm5
	movsd	%xmm5, (%rdi,%r8,8)
	incq	%r8
	cmpq	$1024, %r8                      # imm = 0x400
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%rax
	addq	%rdx, %rdi
	addq	%rdx, %r15
	cmpq	$1024, %rax                     # imm = 0x400
	jne	.LBB1_1
# %bb.4:                                # %.preheader137.preheader
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.LBB1_5:                                # %.preheader137
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ecx, %xmm0
	mulsd	%xmm6, %xmm0
	movapd	%xmm0, %xmm1
	mulsd	%xmm0, %xmm1
	subsd	%xmm1, %xmm0
	movsd	%xmm0, (%rbx,%rax)
	movsd	%xmm0, (%rbx,%rcx,8)
	movsd	%xmm0, 8184(%rbx,%rax)
	movsd	%xmm0, 8380416(%rbx,%rcx,8)
	movsd	%xmm0, (%r12,%rax)
	movsd	%xmm0, (%r12,%rcx,8)
	movsd	%xmm0, 8184(%r12,%rax)
	movsd	%xmm0, 8380416(%r12,%rcx,8)
	incq	%rcx
	addq	$8192, %rax                     # imm = 0x2000
	cmpq	$1024, %rcx                     # imm = 0x400
	jne	.LBB1_5
# %bb.6:
	xorl	%r13d, %r13d
	leaq	16(%rsp), %rax
	movq	%r13, (%rax)
	movq	%rax, %rdi
	leaq	32(%rsp), %rbp
	movq	%r13, (%rbp)
	leaq	24(%rsp), %r15
	movq	%r13, (%r15)
	movq	%rsp, %rax
	movq	%r13, (%rax)
	movl	$8388608, %esi                  # imm = 0x800000
	callq	hipMalloc
	movl	$8388608, %esi                  # imm = 0x800000
	movq	%rbp, %rdi
	callq	hipMalloc
	movl	$8388608, %esi                  # imm = 0x800000
	movq	%r15, %rdi
	callq	hipMalloc
	movl	$8, %esi
	movq	%rsp, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movl	$8388608, %edx                  # imm = 0x800000
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rsp, %rax
	movq	(%rax), %rdi
	movl	$8, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	clock
	movsd	(%r14), %xmm0                   # xmm0 = mem[0],zero
	ucomisd	.LCPI1_2(%rip), %xmm0
	jbe	.LBB1_14
# %bb.7:                                # %.lr.ph.preheader
	movabsq	$549755814016, %rbp             # imm = 0x8000000080
	movl	$-1, %r13d
	movabsq	$34359738376, %r15              # imm = 0x800000008
.LBB1_8:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.9:                                #   in Loop: Header=BB1_8 Depth=1
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdx
	movq	(%rsp), %r9
	movl	$1024, %ecx                     # imm = 0x400
	movsd	.LCPI1_3(%rip), %xmm0           # xmm0 = mem[0],zero
	xorl	%r8d, %r8d
	callq	_Z25__device_stub__calculateUPdS_S_idiS_
.LBB1_10:                               #   in Loop: Header=BB1_8 Depth=1
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:                               #   in Loop: Header=BB1_8 Depth=1
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdx
	movq	(%rsp), %r9
	movl	$1024, %ecx                     # imm = 0x400
	movsd	.LCPI1_3(%rip), %xmm0           # xmm0 = mem[0],zero
	movl	$1, %r8d
	callq	_Z25__device_stub__calculateUPdS_S_idiS_
.LBB1_12:                               #   in Loop: Header=BB1_8 Depth=1
	movq	(%rsp), %rsi
	movl	$8, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$49998, %r13d                   # imm = 0xC34E
	je	.LBB1_19
# %bb.13:                               #   in Loop: Header=BB1_8 Depth=1
	movsd	(%r14), %xmm0                   # xmm0 = mem[0],zero
	incl	%r13d
	ucomisd	.LCPI1_2(%rip), %xmm0
	ja	.LBB1_8
	jmp	.LBB1_14
.LBB1_19:
	movl	$49999, %r13d                   # imm = 0xC34F
.LBB1_14:                               # %.critedge
	movq	16(%rsp), %rsi
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rsi
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movl	$8388608, %edx                  # imm = 0x800000
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	movq	%rax, %r15
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r15, %xmm0
	divsd	.LCPI1_4(%rip), %xmm0
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.1, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r15), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rax, %r15
	movl	$.L.str.2, %esi
	movl	$24, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	(%r14), %xmm0                   # xmm0 = mem[0],zero
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.3, %esi
	movl	$32, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movl	%r13d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%r15d, %r15d
.LBB1_15:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_16 Depth 2
	xorps	%xmm1, %xmm1
	cvtsi2sd	%r15d, %xmm1
	movsd	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, 8(%rsp)                  # 8-byte Spill
	xorl	%r12d, %r12d
.LBB1_16:                               #   Parent Loop BB1_15 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$_ZSt4cout, %edi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r12d, %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	(%rbx,%r12,8), %xmm0            # xmm0 = mem[0],zero
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.5, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r12
	cmpq	$1024, %r12                     # imm = 0x400
	jne	.LBB1_16
# %bb.17:                               #   in Loop: Header=BB1_15 Depth=1
	incq	%r15
	addq	$8192, %rbx                     # imm = 0x2000
	cmpq	$1024, %r15                     # imm = 0x400
	jne	.LBB1_15
# %bb.18:
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10calculateUPdS_S_idiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10calculateUPdS_S_idiS_,@object # @_Z10calculateUPdS_S_idiS_
	.section	.rodata,"a",@progbits
	.globl	_Z10calculateUPdS_S_idiS_
	.p2align	3, 0x0
_Z10calculateUPdS_S_idiS_:
	.quad	_Z25__device_stub__calculateUPdS_S_idiS_
	.size	_Z10calculateUPdS_S_idiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\320\222\321\200\320\265\320\274\321\217: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\320\274\321\201"
	.size	.L.str.1, 5

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\320\237\320\276\320\263\321\200\320\265\321\210\320\275\320\276\321\201\321\202\321\214: "
	.size	.L.str.2, 25

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	",  \320\272\320\276\320\273-\320\262\320\276 \320\270\321\202\320\265\321\200\320\260\321\206\320\270\320\271:"
	.size	.L.str.3, 33

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" "
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\n"
	.size	.L.str.5, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10calculateUPdS_S_idiS_"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__calculateUPdS_S_idiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10calculateUPdS_S_idiS_
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10calculateUPdS_S_idiS_ ; -- Begin function _Z10calculateUPdS_S_idiS_
	.globl	_Z10calculateUPdS_S_idiS_
	.p2align	8
	.type	_Z10calculateUPdS_S_idiS_,@function
_Z10calculateUPdS_S_idiS_:              ; @_Z10calculateUPdS_S_idiS_
; %bb.0:
	s_load_b64 s[8:9], s[0:1], 0x30
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v2, v1
	s_waitcnt lgkmcnt(0)
	global_store_b64 v1, v[1:2], s[8:9]
	v_and_b32_e32 v1, 0x3ff, v0
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x44
	s_load_b32 s12, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[10:11], s[0:1], 0x10
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[5:6], null, s15, s3, v[0:1]
	s_mov_b32 s3, exec_lo
	v_mad_u64_u32 v[2:3], null, v5, s12, v[4:5]
	v_max_i32_e32 v10, v4, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v10
	s_cbranch_execz .LBB0_13
; %bb.1:
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b32_e32 v11, 3, v1
	v_cmp_lt_i32_e64 s2, 0, v5
	v_lshlrev_b64 v[6:7], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u32_u24 v3, 0x50, v0, v11
	v_add_co_u32 v8, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v7, vcc_lo
	v_subrev_nc_u32_e32 v6, s12, v2
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	global_load_b64 v[12:13], v[8:9], off
	v_ashrrev_i32_e32 v7, 31, v6
	s_and_b32 s13, vcc_lo, s2
	s_waitcnt vmcnt(0)
	ds_store_b64 v3, v[12:13] offset:88
	s_and_saveexec_b32 s2, s13
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_lshlrev_b64 v[12:13], 3, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, s4, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v11, v[12:13] offset:8
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s14, s12, -1
	v_cmp_eq_u32_e32 vcc_lo, 7, v0
	v_cmp_gt_i32_e64 s2, s14, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s13, vcc_lo, s2
	s_and_saveexec_b32 s2, s13
	s_cbranch_execz .LBB0_5
; %bb.4:
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[16:17], s[12:13], 3
	v_add_co_u32 v12, vcc_lo, v8, s16
	v_add_co_ci_u32_e32 v13, vcc_lo, s17, v9, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v11, v[12:13] offset:728
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	v_cmp_lt_i32_e64 s2, 0, v4
	v_mul_u32_u24_e32 v11, 0x50, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s13, vcc_lo, s2
	s_and_saveexec_b32 s2, s13
	s_cbranch_execz .LBB0_7
; %bb.6:
	global_load_b64 v[12:13], v[8:9], off offset:-8
	s_waitcnt vmcnt(0)
	ds_store_b64 v11, v[12:13] offset:80
.LBB0_7:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_eq_u32_e32 vcc_lo, 7, v1
	v_cmp_gt_i32_e64 s2, s14, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s13, vcc_lo, s2
	s_and_saveexec_b32 s2, s13
	s_cbranch_execz .LBB0_9
; %bb.8:
	global_load_b64 v[12:13], v[8:9], off offset:8
	s_waitcnt vmcnt(0)
	ds_store_b64 v11, v[12:13] offset:152
.LBB0_9:
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_11
; %bb.10:
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[16:17], s[12:13], 3
	v_add_co_u32 v8, vcc_lo, v8, s16
	v_add_co_ci_u32_e32 v9, vcc_lo, s17, v9, vcc_lo
	global_load_b64 v[8:9], v[8:9], off offset:-16
	s_waitcnt vmcnt(0)
	ds_store_b64 v3, v[8:9] offset:80
.LBB0_11:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_eq_u32_e32 vcc_lo, s14, v4
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_13
; %bb.12:
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b64 v[6:7], v[6:7], off offset:16
	s_waitcnt vmcnt(0)
	ds_store_b64 v3, v[6:7] offset:96
.LBB0_13:                               ; %Flow137
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s2, exec_lo
	v_cmpx_lt_i32_e32 0, v4
	s_cbranch_execz .LBB0_18
; %bb.14:
	s_add_i32 s2, s12, -1
	s_mul_i32 s3, s12, s12
	v_cmp_gt_i32_e32 vcc_lo, s2, v10
	v_cmp_gt_i32_e64 s2, s3, v2
	v_cmp_lt_i32_e64 s3, 0, v5
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_18
; %bb.15:
	s_load_b32 s2, s[0:1], 0x28
	v_add_nc_u32_e32 v3, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, 1, v3
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, s2, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_18
; %bb.16:
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b32_e32 v1, 3, v1
	s_load_b64 s[0:1], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[8:9], 3, v[2:3]
	v_mad_u32_u24 v6, 0x50, v0, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s6, v8
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v9, vcc_lo
	global_load_b64 v[4:5], v[2:3], off
	ds_load_2addr_b64 v[0:3], v6 offset0:1 offset1:12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fma_f64 v[0:1], v[4:5], s[0:1], v[0:1]
	ds_load_b64 v[10:11], v6 offset:168
	ds_load_2addr_b64 v[4:7], v6 offset0:10 offset1:11
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[0:1], v[0:1], v[10:11]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[4:5]
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_add_co_u32 v2, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v9, vcc_lo
	v_add_co_u32 v4, vcc_lo, s10, v8
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v9, vcc_lo
	v_fma_f64 v[0:1], v[6:7], -4.0, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], 0x3fd80000, v[0:1], v[6:7]
	global_store_b64 v[2:3], v[0:1], off
	v_mov_b32_e32 v2, 0
	global_load_b64 v[3:4], v[4:5], off
	global_load_b64 v[5:6], v2, s[8:9]
	s_waitcnt vmcnt(1)
	v_add_f64 v[0:1], v[3:4], -v[0:1]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f64_e64 s0, v[5:6], |v[0:1]|
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_18
; %bb.17:
	v_and_b32_e32 v1, 0x7fffffff, v1
	global_store_b64 v2, v[0:1], s[8:9]
.LBB0_18:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10calculateUPdS_S_idiS_
		.amdhsa_group_segment_fixed_size 800
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10calculateUPdS_S_idiS_, .Lfunc_end0-_Z10calculateUPdS_S_idiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1020
; NumSgprs: 20
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 800 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           8
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 800
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10calculateUPdS_S_idiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z10calculateUPdS_S_idiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
