/*

 *	FileName:	RayTracer_Kernel.cu

 *

 *	Programmer:	Jiayin Cao

 */



//the sum for scan

int*	g_ScanSum[2];



//some helper functions

__device__ void d_normalize( float4* v )

{

	float s = v->x * v->x + v->y * v->y + v->z * v->z;

	s = sqrt(s);



	v->x /= s;

	v->y /= s;

	v->z /= s;

}



//cross product

__device__ float4 d_cross( const float4& v1 , const float4& v2 )

{

	float4 r;



	r.x = v1.y * v2.z - v1.z * v2.y;

	r.y = v1.z * v2.x - v1.x * v2.z;

	r.z = v1.x * v2.y - v1.y * v2.x;

	r.w = 0.0f;



	return r;

}



//clamp the value

__device__ float d_clamp( const float v )

{

	if( v > 1.0f )

		return 1.0f;

	if( v < 0.0f )

		return 0.0f;



	return v;

}



//clamp the float4

__device__ float4 d_saturate( const float4& v )

{

	return make_float4( d_clamp( v.x ) , d_clamp( v.y ) , d_clamp( v.z ) , d_clamp( v.w ) );

}



//dot product

__device__ float d_dot( const float4& v1 , const float4& v2 )

{

	return v1.x * v2.x + v1.y * v2.y + v1.z * v2.z ;

}



//the length of the vector

__device__ float d_length( const float4& v )

{

	return sqrt( v.x * v.x + v.y * v.y + v.z * v.z );

}



//define some useful operators for float4

__device__ float4 operator+ ( const float4& v1 , const float4& v2 )

{

	return make_float4( v1.x + v2.x , v1.y + v2.y , v1.z + v2.z , v1.w + v2.w );

}



__device__ float4 operator- ( const float4& v1 , const float4& v2 )

{

	return make_float4( v1.x - v2.x , v1.y - v2.y , v1.z - v2.z , v1.w - v2.w );

}



__device__ float4 operator* ( const float4& v , const float d )

{

	return make_float4( v.x * d , v.y * d , v.z * d , v.w * d );

}



__device__ float4 operator* ( const float d , const float4& v )

{

	return make_float4( v.x * d , v.y * d , v.z * d , v.w * d ); 

}



__device__ float4 operator* ( const float4& v1 , const float4& v2 )

{

	return make_float4( v1.x * v2.x , v1.y * v2.y , v1.z * v2.z , v1.w * v2.w );

}



__device__ float4 operator+= ( float4& v1 , const float4& v2 )

{

	v1 = v1 + v2;



	return v1;

}



__device__ float2 operator * ( const float d , const float2& v )

{

	return make_float2( d * v.x , d * v.y );

}



__device__ float2 operator + ( const float2& v1 , const float2& v2 )

{

	return make_float2( v1.x + v2.x , v1.y + v2.y );

}



__device__ float2 operator - ( const float2& v1 , const float2& v2 )

{

	return make_float2( v1.x - v2.x , v1.y - v2.y );

}



__device__ float2 floor( const float2& v )

{

	int x = (int) v.x ;

	int y = (int) v.y ;

	return make_float2( x , y );

}



//reflect direction

__device__ float4 d_reflect( const float4& dir , const float4& normal )

{

	float dotProduct = ( -2.0f ) * d_dot( dir , normal );



	float4 r = dir + dotProduct * normal;



	return make_float4( r.x , r.y , r.z , 0.0f );

}



//refraction direction

__device__ float4	d_refract( const float4& dir , float4 normal , float rate )

{

	float4 r;



	if( d_dot( dir , normal ) > 0 )

	{

		normal = -1.0f * normal;

		rate = 1.0f / rate;

	}



	float cos = -1.0f * d_dot( dir , normal );

	float t = 1 - rate * rate * ( 1 - cos * cos );



	if( t < 0 )

	{

		r = d_reflect( dir , normal );

	}else

	{

		float cos2 = sqrt( t );

		r = rate * dir + ( rate * cos - cos2 ) * normal ;

	}



	return r;

}





//check if the ray intersects with bounding box

__device__ float4 kernelIntersectBoundingBox( float4& ori , float4& dir , float4& min , float4& max , float length )

{

	//the result

	float4 result = make_float4( 0.0f , 9999999.0f , 0.0f , 0.0f );



	//limit the maxium value

	if( length > 0 )

		result.y = length;



	//the variables

	float t1 , t2;



	if( fabs( dir.x ) < 0.0000001f )

	{

		if( ori.x > max.x || ori.x < min.x )

			return result;

	}else

	{

		t1 = ( max.x - ori.x ) / dir.x;

		t2 = ( min.x - ori.x ) / dir.x;



		if( t1 > t2 ) { float t = t1; t1 = t2; t2 = t; }



		//clamp

		if( t1 > result.x ) result.x = t1;

		if( t2 < result.y ) result.y = t2;



		if( result.x > result.y )

			return result;

	}



	if( fabs( dir.y ) < 0.0000001f )

	{

		if( ori.y > max.y || ori.y < min.y )

			return result;

	}else

	{

		t1 = ( max.y - ori.y ) / dir.y;

		t2 = ( min.y - ori.y ) / dir.y;



		if( t1 > t2 ) { float t = t1; t1 = t2; t2 = t; }



		//clamp

		if( t1 > result.x ) result.x = t1;

		if( t2 < result.y ) result.y = t2;



		if( result.x > result.y )

			return result;

	}



	if( fabs( dir.y ) < 0.0000001f )

	{

		if( ori.z > max.z || ori.z < min.z )

			return result;

	}else

	{

		t1 = ( max.z - ori.z ) / dir.z;

		t2 = ( min.z - ori.z ) / dir.z;



		if( t1 > t2 ) { float t = t1; t1 = t2; t2 = t; }



		//clamp

		if( t1 > result.x ) result.x = t1;

		if( t2 < result.y ) result.y = t2;



		if( result.x > result.y )

			return result;

	}



	//enable the intersected point

	result.z = 1.0f;



	return result;

}



//check if the ray intersects with a plane

__device__ float4 kernelIntersectPlane( const float4& v1 , const float4& v2 , const float4& v3 , const float4& ori , const float4& dir )

{

	//w : >= 0 ( intersected point enable ) , < 0 ( disable )

	float4 result = make_float4( 0.0f , 0.0f , 0.0f , 0.0f );

	

	//get the normal of the plane

	float4 normal = d_cross( v2 - v1 , v3 - v1 );



	//get the factor

	float t = d_dot( normal , ori - v1 ) / d_dot( normal , dir );



	//set the result

	result = ori - t * dir;



	if( t <= 0.0f )

		result.w = -t;

	else

		result.w = -1;



	return result;

}



//check if the ray intersects with a triangle

__device__ float4 kernelIntersectTriangle( const float4& v1 , const float4& v2 , const float4& v3 , const float4& ori , const float4& dir )

{

	//the result

	float4 result = kernelIntersectPlane( v1 , v2 , v3 , ori , dir );



	if( result.w < 0 )

		return result;



	//get the factor

	float4 d1 = d_cross( result - v2 , v1 - v2 );

	float4 d2 = d_cross( result - v3 , v2 - v3 );

	float4 d3 = d_cross( result - v1 , v3 - v1 );



	float f1 = d_dot( d1 , d2 );

	float f2 = d_dot( d2 , d3 );



	if( !( f1 >= -0.000000000000001f && f2 >= -0.000000000000001f ) )

		result.w = -1.0f;



	return result;

}



//check if the current point is in the bounding box

__device__ int kernelPointInBoundingBox( const float4& p , const float4& min , const float4& max )

{

	float threshold = 0.00001f;



	if( p.x < min.x - threshold || p.y < min.y - threshold || p.z < min.z - threshold ||

		p.x > max.x + threshold || p.y > max.y + threshold || p.z > max.z + threshold )

		return false;



	return true;

}



//do interplotation

__device__ float4 kernelInterploted( const float4& v1 , const float4& v2 , const float4& v3 , const float4& intersected )

{

	//get the vectors

	float4 e1 = intersected - v1;

	float4 e2 = intersected - v2;

	float4 e3 = intersected - v3;



	//compute the areas

	float4 area;

	area.x = d_length( d_cross( e2 , e3 ) );

	area.y = d_length( d_cross( e3 , e1 ) );

	area.z = d_length( d_cross( e1 , e2 ) );



	float d = 1.0f / ( area.x + area.y + area.z );



	return area * d;

}



//clear and initialize buffer

__global__ void kernelInitBuffer(	float4* buffer , 

									int*	markedBuffer , 

									int		pixelNum )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= pixelNum )

		return;



	buffer[tid] = make_float4( 0.0f , 0.0f , 0.0f , 0.0f );

	markedBuffer[tid] = tid;

}



//generate primary ray intersected result

__global__ void kernelGenerateIntersectedPoint( float4* rayOri , 

												float4* rayDir ,

												float4*	vertexBuffer ,

												int		rayNum ,

												int*	index , 

												float4*	result )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= rayNum )

		return;



	//Load the vertex

	int triId = index[tid];



	//get the vertex

	int id = 3 * triId;

	float4 v1 = vertexBuffer[id];

	float4 v2 = vertexBuffer[id+1];

	float4 v3 = vertexBuffer[id+2];



	//ray ori and dir

	float4 ori = rayOri[tid];

	float4 dir = rayDir[tid];



	//get the intersected result

	result[tid] = kernelIntersectPlane( v1 , v2 , v3 , ori , dir );

	result[tid].w = triId;

}



//Generate primary rays

__global__ void kernelGeneratePrimaryRays(	float4	viewInfo ,	

											float*	invViewMatrix ,

											float4*	rayOri , 

											float4* rayDir )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= (int)viewInfo.x * (int)viewInfo.y )

		return;



	// get the pixel coorindate first

	uint2 coord;

	coord.x = tid % (int) viewInfo.x;

	coord.y = tid / (int)viewInfo.x;



	// compute the vector of the ray in screen space

	float2 v;

	v.x = ( ( ( 2.0f * coord.x ) / viewInfo.x ) - 1.0f ) / viewInfo.z;

	v.y = -1.0f * ( ( ( 2.0f * coord.y ) / viewInfo.y ) - 1.0f ) / viewInfo.w;



	//copy the original point of the rays

	rayOri[tid] = make_float4( invViewMatrix[12] , invViewMatrix[13] , invViewMatrix[14] , tid ); 



	//compute the direction of the ray

	float4 dir;

	dir.x = ( v.x * invViewMatrix[0] + v.y * invViewMatrix[4] + invViewMatrix[8] );

	dir.y = ( v.x * invViewMatrix[1] + v.y * invViewMatrix[5] + invViewMatrix[9] );

	dir.z = ( v.x * invViewMatrix[2] + v.y * invViewMatrix[6] + invViewMatrix[10] );

	dir.w = 0.0f;

	d_normalize( &dir );



	rayDir[tid] = make_float4( dir.x , dir.y , dir.z , 1.0f );

}



//traverse the ray through kd-tree

__device__ float4 kernelTraverseRay(	float4*	kdTree , 

										int*	indexMap , 

										int*	offsetBuffer ,

										float4*	vertexBuffer ,

										float4&	rayOri , 

										float4&	rayDir ,

										float	length )

{

	//the intersected result

	float4 result = make_float4( 0.0f , 0.0f , 0.0f , -1.0f );



	//tree node information

	float4 header;

	float4 splitInfo;



	//the bounding box

	float4 minBB = kdTree[2];

	float4 maxBB = kdTree[3];



	//check if the ray intersects with the current bounding box of the root

	result = kernelIntersectBoundingBox( rayOri , rayDir , minBB , maxBB , length );



	//if the ray doesn't cross the kd-tree , just return

	if( result.z < 0.5f )

	{

		result = make_float4( 0.0f , 0.0f , 0.0f , -1.0f );

		return result;

	}



	//current traversing node

	int currentNodeIndex = 0;



	//the mask to mark the traversed node

	unsigned int	mask = 0;

	//current traverse depth

	int				currentTraverseDepth = 0;



	//current inPonit when traversing the node

	float4 inPoint = rayOri + result.x * rayDir ;



	while( currentTraverseDepth >= 0 )

	{

		//traverse the current node

		do

		{

			//the current node offset

			int currentNodeOffset = currentNodeIndex * 4;



			//get the current node information

			header = kdTree[ currentNodeOffset ];

			splitInfo = kdTree[currentNodeOffset + 1 ];



			//check if it's a leaf node

			if( splitInfo.x < 0 )

				break;



			//get the split axis

			int splitAxis = (int) splitInfo.x;



			//get the pointer of the inPoint

			float sPos = 0.0f;



			if( splitAxis == 0 )

				sPos = inPoint.x;

			else if( splitAxis == 1 )

				sPos = inPoint.y;

			else if( splitAxis == 2 )

				sPos = inPoint.z;



			//update the virtual stack and traverse the node

			if( splitInfo.y > sPos )

				currentNodeIndex = (int)header.y;

			else

				currentNodeIndex = (int)header.z;



			//increase the current traverse depth

			currentTraverseDepth++;



		}while( true );



		//get the offset and triangle number

		int triOffset = offsetBuffer[currentNodeIndex];

		int triNumber = (int)header.w;



		//min value

		float minFactor = 9999999.0f;

		if( length > 0 )

			minFactor = length;



		//triangle index

		int oriTriIndex = -1;

		//the bounding box

		minBB = kdTree[currentNodeIndex*4+2];

		maxBB = kdTree[currentNodeIndex*4+3];

		//intersect with the current triangles

		for( int i = 0 ; i < triNumber ; i++ )

		{

			//get the triangles

			int triIndex = indexMap[triOffset+i];



			//get the vertex

			float4 v1 = vertexBuffer[3*triIndex];

			float4 v2 = vertexBuffer[3*triIndex+1];

			float4 v3 = vertexBuffer[3*triIndex+2];



			//get the intersected point

			result = kernelIntersectTriangle( v1 , v2 , v3 , rayOri , rayDir );



			//limit the factor

			if( result.w > 0.0f && result.w < minFactor )

			{

				if( kernelPointInBoundingBox( result , minBB , maxBB ) )

				{

					minFactor = result.w;

					oriTriIndex = triIndex;



					if( length > 0 )

						break;

				}

			}

		}



		if( oriTriIndex >= 0 )

		{

			result = rayOri + minFactor * rayDir;

			result.w = (float)oriTriIndex;

			return result;

		}



		//back track here

		while( currentTraverseDepth >= 0 )

		{

			if( currentTraverseDepth == 0 )

				return make_float4( 0 , 0 , 0 , -1.0f );



			//get the current mask

			if( mask & ( 0x00000001 << currentTraverseDepth ) )

			{

				//update the mask

				mask &= ~(0x00000001 << currentTraverseDepth );



				//decrease the current depth;

				currentTraverseDepth--;



				//get to the father node

				currentNodeIndex = (int)kdTree[ 4 * currentNodeIndex ].x;



				//continue to next level

				continue;

			}



			//check the other node

			int otherNode = currentNodeIndex + 1;

			if( currentNodeIndex % 2 == 0 )

				otherNode -= 2;



			//get the bounding box of the other node

			int otherNodeOffset = 4 * otherNode;

			minBB = kdTree[ otherNodeOffset + 2 ];

			maxBB = kdTree[ otherNodeOffset + 3 ];



			//get the intersected result

			float4 bi = kernelIntersectBoundingBox( rayOri , rayDir , minBB , maxBB , length );



			if( bi.z > 0.5f )

			{

				//update the current traverse node

				currentNodeIndex = otherNode;



				//update the inPoint

				inPoint = rayOri + bi.x * rayDir ;



				//update the mask

				mask |= 0x00000001 << currentTraverseDepth;



				break;

			}else

			{

				//update the mask

				mask &= ~( 0x00000001 << currentTraverseDepth );



				//decrease current depth

				currentTraverseDepth--;



				//get to the father node

				currentNodeIndex = (int) kdTree[ 4 * currentNodeIndex ].x;

			}

		}

	}



	result.w = -1.0f;

	return result;

}



//get the interseced point

__global__ void kernelGetIntersectedPoint(	float4*	rayOri , 

											float4*	rayDir ,

											float4*	kdTree ,

											int*	indexMap ,

											int*	offsetBuffer ,

											float4*	vertexBuffer ,

											int		rayNumber , 

											float4*	result )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= rayNumber )

		return;



	//get the triangle

	result[tid] = kernelTraverseRay( kdTree , indexMap , offsetBuffer , vertexBuffer , rayOri[tid] , rayDir[tid] , -1.0f );

}



//do pixel shader here

__global__ void kernelPixelShader(	float4*	intersected , 

									float4*	vertexBuffer , 

									float4*	normalBuffer ,

									float2*	texCoordinateBuffer , 

									float4*	kdTree ,

									int*	indexMap ,

									int*	offsetIndexBuffer,

									float4*	lightBuffer ,

									int*	attributeBuffer , 

									float4*	materialBuffer ,

									int*	textureOffset , 

									float4*	customTexture , 

									int		pixelNum , 

									float4*	rayDir ,

									int*	offsetBuffer ,

									float4*	destNormalBuffer , 

									float4*	imageBuffer )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= pixelNum )

		return;



	//get the triangle index

	int triIndex = (int)intersected[tid].w;

	int triOffset = 3 * triIndex;



	float4 color = make_float4( 0.0f , 0.0f , 0.0f , 0.0f );



	//load the density of the pixel

	if( triIndex < 0 )

		return;



	//get the material index

	int	matIndex = attributeBuffer[triIndex];



	//the material buffer

	float4 ambient = materialBuffer[ 4 * matIndex ];

	float4 diffuse = materialBuffer[ 4 * matIndex + 1 ];

	float4 specular = materialBuffer[ 4 * matIndex + 2 ];

	float4 matprop = materialBuffer[ 4 * matIndex + 3 ];

	

	//load the vertex

	float4 v1 = vertexBuffer[ triOffset ];

	float4 v2 = vertexBuffer[ triOffset + 1 ];

	float4 v3 = vertexBuffer[ triOffset + 2 ];



	//get the interploted

	float4 interploted = kernelInterploted( v1 , v2 , v3 , intersected[tid] );



	//get the normal

	float4 n1 = normalBuffer[ triOffset ];

	float4 n2 = normalBuffer[ triOffset + 1 ];

	float4 n3 = normalBuffer[ triOffset + 2 ];

	float4 normal = n1 * interploted.x + n2 * interploted.y + n3 * interploted.z;

	d_normalize( &normal );



	//update the normal buffer

	destNormalBuffer[tid] = normal;

	destNormalBuffer[tid].w = matIndex;



	//the density for the pixel

	float density = rayDir[tid].w;



	if( matprop.x > -0.5f )

	{

		//load the texture coordinate

		float2 t1 = texCoordinateBuffer[ triOffset ];

		float2 t2 = texCoordinateBuffer[ triOffset + 1 ];

		float2 t3 = texCoordinateBuffer[ triOffset + 2 ];

		float2 texCoord = interploted.x * t1 + interploted.y * t2 + interploted.z * t3;

		texCoord = texCoord - floor( texCoord );

		if( texCoord.x < 0.0f ) texCoord.x += 1.0f;

		if( texCoord.y < 0.0f ) texCoord.y += 1.0f;



		//load the texture

		float4* imgData = customTexture + textureOffset[(int)matprop.x];



		int x = imgData[0].y * texCoord.x ;

		int y = imgData[0].z * texCoord.y ;



		int texOffset = y * imgData[0].y + x + 1;



		diffuse = diffuse * (*(imgData + texOffset)) ;

	}



	//initialize the image buffer

	color = ambient;



	//shade the pixels

	for( int i = 0 ; i < 2 ; i++ )

	{

		if( lightBuffer[i].w < 0.01f )

			continue;



		//the light direction

		float4 lightDir = intersected[tid] - lightBuffer[i];



		//check if the point is in the shadow

		float shadowLen = 0.98f * d_length(lightDir);

		d_normalize( &lightDir );



		//the dot product

		float	dotProduct = d_dot( lightDir , normal );



		if( dotProduct > 0.0f )

			continue;



		{

			float4 shadowFactor = kernelTraverseRay( kdTree , indexMap , offsetIndexBuffer , vertexBuffer , lightBuffer[i] , lightDir , shadowLen );

			if( shadowFactor.w >= 0.0f )

				continue;

		}



		//the light density

		float lightDensity = d_clamp( -1.0f * dotProduct ) * lightBuffer[i].w;



		//load the density of current pixel

		color += diffuse * lightDensity ;



		//add specular if possible

		if( specular.w > 0 )

		{

			//reflect direction

			float4 reflectDir = d_reflect( lightDir , normal );

			d_normalize( &reflectDir );



			//get the dot product

			float d = d_clamp(-d_dot( reflectDir , rayDir[tid] ));



			if( d > 0 )

				color += pow( d , specular.w ) * specular;

		}

	}



	int offset = offsetBuffer[tid];

	imageBuffer[offset] = d_saturate( imageBuffer[offset] + d_saturate( color * density ) );

}



//generate next level rays

__global__ void kernelGenerateNextLevelRays(	float4* materialInfo , 

												float4*	intersected , 

												float4*	backNormalBuffer , 

												float4*	rayOri ,

												float4*	rayDir ,

												int		rayNumber ,

												float4*	destRayOri , 

												float4*	destRayDir ,

												int*	markedBuffer )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= rayNumber )

		return;



	//set marked buffer zero

	markedBuffer[tid] = 0;



	//load the intersected point

	float4 intersectedPoint = intersected[tid];



	//get the intersected triangle index

	int triIndex = (int)intersectedPoint.w;

	if( triIndex < 0 )

		return;



	//load the normal

	float4 normal = backNormalBuffer[tid];



	//get the material index

	int matIndex = (int)normal.w;



	//get the material

	float4 matInfo = materialInfo[4*matIndex+3];



	//load the ray direction

	float4 ori = rayOri[tid];

	float4 dir = rayDir[tid];



	//if there is reflection , mark result as true

	if( matInfo.y > 0 )

	{

		float4 reflectDir = d_reflect( dir , normal );

		d_normalize( &reflectDir );

		reflectDir.w = dir.w * matInfo.y;



		destRayDir[tid] = reflectDir;

		destRayOri[tid] = intersectedPoint + reflectDir * 0.1f;

		destRayOri[tid].w = ori.w;



		markedBuffer[tid] = 1;

	}else if( matInfo.z > 0 )

	{

		float4 refractDir = d_refract( dir , normal , 1.0f / matInfo.w );

		d_normalize( &refractDir );

		refractDir.w = dir.w * matInfo.z;



		destRayDir[tid] = refractDir;

		destRayOri[tid] = intersectedPoint + refractDir * 0.02f;

		destRayOri[tid].w = ori.w;



		markedBuffer[tid] = 1;

	}

}



//copy new rays

__global__ void kernelCopyNewRays(	float4* srcRayOri , 

									float4* srcRayDir ,

									int*	scanResult , 

									int		rayNumber , 

									float4* destRayOri ,

									float4* destRayDir ,

									int*	offsets )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= rayNumber )

		return;



	//load the offset

	int offset = scanResult[tid];



	if( offset != scanResult[tid+1] )

	{

		//set the result

		destRayOri[offset] = srcRayOri[tid];

		destRayDir[offset] = srcRayDir[tid];

		offsets[offset] = (int)srcRayOri[tid].w;

	}

}



//Do scan on GPU

__global__ void kernelScan( int* data , int number , int oBlockRes , int* blockRes )

{

	//the shared memory

	__shared__ int sharedMem[512];



	//get the thread id

	int ltid = threadIdx.x;

	int gtid = ltid + blockDim.x * blockIdx.x;



	//the block sum

	int blocksum = 0;



	//zero the rest of the memory

	if( 2 * gtid >= number )

	{

		data[ 2 * gtid ] = 0;

		data[ 2 * gtid + 1 ] = 0;

	}else if( 2 * gtid == number - 1 )

		data[ 2 * gtid + 1 ] = 0;



	//Load the data into the shared memory

	sharedMem[2*ltid] = data[2*gtid];

	sharedMem[2*ltid+1] = data[2*gtid+1];



	//the offset

	int offset = 1;



	for( int d = 256 ; d > 1 ; d >>= 1 )

	{

		//sync the threads in a group

		__syncthreads();



		if( ltid < d )

		{

			int ai = offset * ( 2 * ltid + 1 ) - 1;

			int bi = ai + offset;



			sharedMem[bi] += sharedMem[ai];

		}



		offset *= 2;

	}



	//the block sum

	blocksum = sharedMem[511] + sharedMem[255];



	//clear the last element

	if( ltid == 0 )

	{

		sharedMem[511] = sharedMem[255];

		sharedMem[255] = 0;

	}



	for( int d = 2 ; d < 512 ; d *= 2 )

	{

		__syncthreads();



		offset >>= 1;



		if( ltid < d )

		{

			int ai = offset * ( 2 * ltid + 1 ) - 1 ;

			int bi = ai + offset ;



			int t = sharedMem[ai];

			sharedMem[ai] = sharedMem[bi];

			sharedMem[bi] += t;

		}

	}



	__syncthreads();



	data[ 2 * gtid ] = sharedMem[ 2 * ltid ];

	data[ 2 * gtid + 1 ] = sharedMem[ 2 * ltid + 1 ];



	//Output Block Result

	if( oBlockRes > 0 )

	{

		if( ltid == 0 )

		{

			//copy the result

			blockRes[blockIdx.x] = blocksum;

		}

	}

}



//Add the block result to the segmented scan result

__global__ void kernelUniformAdd( int* data , int* blockResult )

{

	//get the thread id

	int ltid = threadIdx.x;

	int gtid = ltid + blockDim.x * blockIdx.x;

	

	//add the result

	data[gtid] += blockResult[gtid/512];

}



//clear the noise of the image

__global__ void kernelClearNoise(	float4* imgData , 

									int		width ,

									int		height ,

									float4* targetData )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= width * height )

		return;



	//threshold

	float threshold = 0.4f;



	//the difference

	int difference = 0;



	//current index

	int	currentIndex = tid;

	int leftIndex = tid - 1;

	int rightIndex = tid + 1;

	int upIndex = tid - width ;

	int downIndex = tid + width ;



	//the coordinate

	int i = tid % width;

	int j = tid / width;



	//current color

	float4 color = imgData[currentIndex];



	float4 sum = make_float4( 0 , 0 , 0 , 0 );

	if( i > 0 )

	{

		if( d_length( color - imgData[leftIndex] ) > threshold )

			difference++;

		sum += imgData[leftIndex];

	}

	if( i < width - 1 )

	{

		if( d_length( color - imgData[rightIndex] ) > threshold )

			difference++;

		sum += imgData[rightIndex];

	}

	if( j > 0 )

	{

		if( d_length( color - imgData[upIndex] ) > threshold )

			difference++;

		sum += imgData[upIndex];

	}

	if( j < height - 1 )

	{

		if( d_length( color - imgData[downIndex] ) > threshold )

			difference++;

		sum += imgData[downIndex];

	}



	if( difference >= 2 )

		color = sum * 0.25f;



	targetData[tid] = color;

}



////////////////////////////////////////////////////////////////////////////////////////////////////



//initialize buffer

extern "C" void cudaInitBuffer(	float4* buffer , 

								int*	markedBuffer , 

								int		pixelNum )

{

	//the block number

	int threadNum = 256;

	int blockNum = ( pixelNum + threadNum - 1 ) / threadNum;



	//call the kenrel

	kernelInitBuffer<<<blockNum,threadNum>>>( buffer , markedBuffer , pixelNum );

}



//generate primary ray intersected result

extern "C" void cudaGenerateIntersectedPoint(	float4* rayOri , 

												float4* rayDir ,

												float4*	vertexBuffer ,

												int		rayNum ,

												int*	index , 

												float4*	result )

{

	//the block number

	int threadNum = 256;

	int blockNum = ( rayNum + threadNum - 1 ) / threadNum;



	//call the kernel

	kernelGenerateIntersectedPoint<<<blockNum , threadNum>>>( rayOri , rayDir , vertexBuffer , rayNum , index , result );

}



//Generate primary rays

extern "C" void cudaGeneratePrimaryRays(	float4	viewInfo ,	

											float*	invViewMatrix ,

											float4*	rayOri , 

											float4* rayDir )

{

	//get the number of data

	int rayNum = (int)( viewInfo.x * viewInfo.y );



	//the block number

	int threadNum = 256;

	int blockNum = ( rayNum + threadNum - 1 ) / threadNum;



	//call the kernel

	kernelGeneratePrimaryRays<<<blockNum , threadNum>>>( viewInfo , invViewMatrix , rayOri , rayDir );

}



//get intersected point

extern "C" void cudaGetIntersectedPoint(	float4*	rayOri , 

											float4*	rayDir ,

											float4*	kdTree ,

											int*	indexMap ,

											int*	offsetBuffer ,

											float4*	vertexBuffer ,

											int		rayNumber , 

											float4*	result )

{

	//the block and thread number

	int threadNum = 256;

	int blockNum = ( rayNumber + threadNum - 1 ) / threadNum ;



	//call the kernel

	kernelGetIntersectedPoint<<<blockNum , threadNum>>>( rayOri , rayDir , kdTree , indexMap , offsetBuffer , vertexBuffer , rayNumber , result );

}



//do pixel shader

extern "C" void cudaPixelShader(	float4*	interseced , 

									float4*	vertexBuffer , 

									float4*	normalBuffer ,

									float2*	texCoordinateBuffer , 

									float4*	kdTree ,

									int*	indexMap ,

									int*	offsetIndexBuffer ,

									float4*	lightBuffer ,

									int*	attributeBuffer , 

									float4*	materialBuffer ,

									int*	textureOffset , 

									float4*	customTexture ,

									int		pixelNum , 

									float4*	rayDir ,

									int*	offsetBuffer ,

									float4*	destNormalBuffer , 

									float4*	imageBuffer )

{

	//the block and thread number

	int threadNum = 256;

	int blockNum = ( pixelNum + threadNum - 1 ) / threadNum ;



	//call the kernel

	kernelPixelShader<<<blockNum , threadNum>>>(	interseced , vertexBuffer , normalBuffer , texCoordinateBuffer , 

													kdTree , indexMap , offsetIndexBuffer , lightBuffer , attributeBuffer , materialBuffer , 

													textureOffset , customTexture , pixelNum , rayDir , offsetBuffer , destNormalBuffer , imageBuffer );

}



//generate next level rays

extern "C" void cudaGenerateNextLevelRays(	float4* materialInfo , 

											float4*	intersected , 

											float4*	backNormalBuffer , 

											float4*	rayOri ,

											float4*	rayDir ,

											int		rayNumber ,

											float4*	destRayOri , 

											float4*	destRayDir ,

											int*	markedBuffer )

{

	//the block and thread number

	int threadNum = 256;

	int blockNum = ( rayNumber + threadNum - 1 ) / threadNum ;



	//call the kernel

	kernelGenerateNextLevelRays<<<blockNum , threadNum>>>(	materialInfo , intersected , backNormalBuffer , rayOri , rayDir , 

															rayNumber , destRayOri , destRayDir , markedBuffer );

}



//do scan on gpu

extern "C" void cudaScan( int* data , int num , int level )

{

/*	//allocate the number of data

	int* cpuData = new int[num];



	//pass the data from gpu to cpu

	cudaMemcpy( cpuData , data , sizeof( int ) * ( num - 1 ) , cudaMemcpyDeviceToHost );



	int last = 0;

	for( int i = 0 ; i < num ; i++ )

	{

		int oldLast = last;

		last += cpuData[i];

		cpuData[i] = oldLast;

	}



	//pass the data back from cpu to gpu

	cudaMemcpy( data , cpuData , sizeof( int ) * num , cudaMemcpyHostToDevice );



	//delete the data

	delete[] cpuData;*/



	//the dimension of the kernel

	dim3 threads( 256 );

	dim3 blocks( ( num + 511 ) / 512 );



	//call the kernel

	kernelScan<<<blocks , threads>>>( data , num , 1 , g_ScanSum[level] );



	//scan the block Result

	if( num <= 262144 )

		kernelScan<<<1 , threads>>>( g_ScanSum[level] , blocks.x , -1 , data );

	else

		cudaScan( g_ScanSum[level] , blocks.x , level + 1 );



	//add the offset

	threads.x = 512;

	kernelUniformAdd<<< blocks , threads >>> ( data , g_ScanSum[level] );

}



//copy new rays

extern "C" void cudaCopyNewRays(	float4* srcRayOri , 

									float4* srcRayDir ,

									int*	scanResult , 

									int		rayNumber , 

									float4* destRayOri ,

									float4* destRayDir ,

									int*	offsets )

{

	//the block and thread number

	int threadNum = 256;

	int blockNum = ( rayNumber + threadNum - 1 ) / threadNum ;



	//call the kernel

	kernelCopyNewRays<<<blockNum , threadNum>>>( srcRayOri , srcRayDir , scanResult , rayNumber , destRayOri , destRayDir , offsets );

}



//clear the noise of the image

extern "C" void cudaClearNoise(	float4* imgData , 

								int		width ,

								int		height ,

								float4* targetData )

{

	//the block and thread number

	int threadNum = 256;

	int blockNum = ( width * height + 255 ) / 256;



	//call the kernel

	kernelClearNoise<<<blockNum , threadNum>>>( imgData , width , height , targetData );

}
	.file	"tmpxft_00256d18_00000000-6_RayTracer_Kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2043:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2043:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11d_normalizeP6float4
	.type	_Z11d_normalizeP6float4, @function
_Z11d_normalizeP6float4:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2008:
	.size	_Z11d_normalizeP6float4, .-_Z11d_normalizeP6float4
	.globl	_Z7d_crossRK6float4S1_
	.type	_Z7d_crossRK6float4S1_, @function
_Z7d_crossRK6float4S1_:
.LFB2009:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2009:
	.size	_Z7d_crossRK6float4S1_, .-_Z7d_crossRK6float4S1_
	.globl	_Z7d_clampf
	.type	_Z7d_clampf, @function
_Z7d_clampf:
.LFB2010:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2010:
	.size	_Z7d_clampf, .-_Z7d_clampf
	.globl	_Z10d_saturateRK6float4
	.type	_Z10d_saturateRK6float4, @function
_Z10d_saturateRK6float4:
.LFB2011:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2011:
	.size	_Z10d_saturateRK6float4, .-_Z10d_saturateRK6float4
	.globl	_Z5d_dotRK6float4S1_
	.type	_Z5d_dotRK6float4S1_, @function
_Z5d_dotRK6float4S1_:
.LFB2012:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2012:
	.size	_Z5d_dotRK6float4S1_, .-_Z5d_dotRK6float4S1_
	.globl	_Z8d_lengthRK6float4
	.type	_Z8d_lengthRK6float4, @function
_Z8d_lengthRK6float4:
.LFB2013:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2013:
	.size	_Z8d_lengthRK6float4, .-_Z8d_lengthRK6float4
	.globl	_ZplRK6float4S1_
	.type	_ZplRK6float4S1_, @function
_ZplRK6float4S1_:
.LFB2204:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2204:
	.size	_ZplRK6float4S1_, .-_ZplRK6float4S1_
	.globl	_ZmiRK6float4S1_
	.type	_ZmiRK6float4S1_, @function
_ZmiRK6float4S1_:
.LFB2206:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2206:
	.size	_ZmiRK6float4S1_, .-_ZmiRK6float4S1_
	.globl	_ZmlRK6float4f
	.type	_ZmlRK6float4f, @function
_ZmlRK6float4f:
.LFB2016:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2016:
	.size	_ZmlRK6float4f, .-_ZmlRK6float4f
	.globl	_ZmlfRK6float4
	.type	_ZmlfRK6float4, @function
_ZmlfRK6float4:
.LFB2017:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2017:
	.size	_ZmlfRK6float4, .-_ZmlfRK6float4
	.globl	_ZmlRK6float4S1_
	.type	_ZmlRK6float4S1_, @function
_ZmlRK6float4S1_:
.LFB2208:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2208:
	.size	_ZmlRK6float4S1_, .-_ZmlRK6float4S1_
	.globl	_ZpLR6float4RKS_
	.type	_ZpLR6float4RKS_, @function
_ZpLR6float4RKS_:
.LFB2210:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2210:
	.size	_ZpLR6float4RKS_, .-_ZpLR6float4RKS_
	.globl	_ZmlfRK6float2
	.type	_ZmlfRK6float2, @function
_ZmlfRK6float2:
.LFB2020:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2020:
	.size	_ZmlfRK6float2, .-_ZmlfRK6float2
	.globl	_ZplRK6float2S1_
	.type	_ZplRK6float2S1_, @function
_ZplRK6float2S1_:
.LFB2021:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2021:
	.size	_ZplRK6float2S1_, .-_ZplRK6float2S1_
	.globl	_ZmiRK6float2S1_
	.type	_ZmiRK6float2S1_, @function
_ZmiRK6float2S1_:
.LFB2214:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_ZplRK6float2S1_
	.cfi_endproc
.LFE2214:
	.size	_ZmiRK6float2S1_, .-_ZmiRK6float2S1_
	.globl	_Z5floorRK6float2
	.type	_Z5floorRK6float2, @function
_Z5floorRK6float2:
.LFB2023:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2023:
	.size	_Z5floorRK6float2, .-_Z5floorRK6float2
	.globl	_Z9d_reflectRK6float4S1_
	.type	_Z9d_reflectRK6float4S1_, @function
_Z9d_reflectRK6float4S1_:
.LFB2212:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2212:
	.size	_Z9d_reflectRK6float4S1_, .-_Z9d_reflectRK6float4S1_
	.globl	_Z9d_refractRK6float4S_f
	.type	_Z9d_refractRK6float4S_f, @function
_Z9d_refractRK6float4S_f:
.LFB2025:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2025:
	.size	_Z9d_refractRK6float4S_f, .-_Z9d_refractRK6float4S_f
	.globl	_Z26kernelIntersectBoundingBoxR6float4S0_S0_S0_f
	.type	_Z26kernelIntersectBoundingBoxR6float4S0_S0_S0_f, @function
_Z26kernelIntersectBoundingBoxR6float4S0_S0_S0_f:
.LFB2026:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2026:
	.size	_Z26kernelIntersectBoundingBoxR6float4S0_S0_S0_f, .-_Z26kernelIntersectBoundingBoxR6float4S0_S0_S0_f
	.globl	_Z20kernelIntersectPlaneRK6float4S1_S1_S1_S1_
	.type	_Z20kernelIntersectPlaneRK6float4S1_S1_S1_S1_, @function
_Z20kernelIntersectPlaneRK6float4S1_S1_S1_S1_:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z20kernelIntersectPlaneRK6float4S1_S1_S1_S1_, .-_Z20kernelIntersectPlaneRK6float4S1_S1_S1_S1_
	.globl	_Z23kernelIntersectTriangleRK6float4S1_S1_S1_S1_
	.type	_Z23kernelIntersectTriangleRK6float4S1_S1_S1_S1_, @function
_Z23kernelIntersectTriangleRK6float4S1_S1_S1_S1_:
.LFB2216:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2216:
	.size	_Z23kernelIntersectTriangleRK6float4S1_S1_S1_S1_, .-_Z23kernelIntersectTriangleRK6float4S1_S1_S1_S1_
	.globl	_Z24kernelPointInBoundingBoxRK6float4S1_S1_
	.type	_Z24kernelPointInBoundingBoxRK6float4S1_S1_, @function
_Z24kernelPointInBoundingBoxRK6float4S1_S1_:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z24kernelPointInBoundingBoxRK6float4S1_S1_, .-_Z24kernelPointInBoundingBoxRK6float4S1_S1_
	.globl	_Z17kernelInterplotedRK6float4S1_S1_S1_
	.type	_Z17kernelInterplotedRK6float4S1_S1_S1_, @function
_Z17kernelInterplotedRK6float4S1_S1_S1_:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z17kernelInterplotedRK6float4S1_S1_S1_, .-_Z17kernelInterplotedRK6float4S1_S1_S1_
	.globl	_Z17kernelTraverseRayP6float4PiS1_S0_RS_S2_f
	.type	_Z17kernelTraverseRayP6float4PiS1_S0_RS_S2_f, @function
_Z17kernelTraverseRayP6float4PiS1_S0_RS_S2_f:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z17kernelTraverseRayP6float4PiS1_S0_RS_S2_f, .-_Z17kernelTraverseRayP6float4PiS1_S0_RS_S2_f
	.globl	_Z45__device_stub__Z16kernelInitBufferP6float4PiiP6float4Pii
	.type	_Z45__device_stub__Z16kernelInitBufferP6float4PiiP6float4Pii, @function
_Z45__device_stub__Z16kernelInitBufferP6float4PiiP6float4Pii:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L50
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16kernelInitBufferP6float4Pii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L50:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L52
	call	__stack_chk_fail@PLT
.L52:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z45__device_stub__Z16kernelInitBufferP6float4PiiP6float4Pii, .-_Z45__device_stub__Z16kernelInitBufferP6float4PiiP6float4Pii
	.globl	_Z16kernelInitBufferP6float4Pii
	.type	_Z16kernelInitBufferP6float4Pii, @function
_Z16kernelInitBufferP6float4Pii:
.LFB2066:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z16kernelInitBufferP6float4PiiP6float4Pii
	.cfi_endproc
.LFE2066:
	.size	_Z16kernelInitBufferP6float4Pii, .-_Z16kernelInitBufferP6float4Pii
	.globl	cudaInitBuffer
	.type	cudaInitBuffer, @function
cudaInitBuffer:
.LFB2032:
	.cfi_startproc
	endbr64
	leal	255(%rdx), %eax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$256, %ecx
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%edx, %ebx
	cltd
	idivl	%ecx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movl	$16777217, %edx
	movl	$1, %ecx
	salq	$8, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	addq	$32, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	movl	%ebx, %edx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z45__device_stub__Z16kernelInitBufferP6float4PiiP6float4Pii
.L56:
	.cfi_restore_state
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	cudaInitBuffer, .-cudaInitBuffer
	.globl	_Z68__device_stub__Z30kernelGenerateIntersectedPointP6float4S0_S0_iPiS0_P6float4S0_S0_iPiS0_
	.type	_Z68__device_stub__Z30kernelGenerateIntersectedPointP6float4S0_S0_iPiS0_P6float4S0_S0_iPiS0_, @function
_Z68__device_stub__Z30kernelGenerateIntersectedPointP6float4S0_S0_iPiS0_P6float4S0_S0_iPiS0_:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z30kernelGenerateIntersectedPointP6float4S0_S0_iPiS0_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L59:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L61
	call	__stack_chk_fail@PLT
.L61:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z68__device_stub__Z30kernelGenerateIntersectedPointP6float4S0_S0_iPiS0_P6float4S0_S0_iPiS0_, .-_Z68__device_stub__Z30kernelGenerateIntersectedPointP6float4S0_S0_iPiS0_P6float4S0_S0_iPiS0_
	.globl	_Z30kernelGenerateIntersectedPointP6float4S0_S0_iPiS0_
	.type	_Z30kernelGenerateIntersectedPointP6float4S0_S0_iPiS0_, @function
_Z30kernelGenerateIntersectedPointP6float4S0_S0_iPiS0_:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z68__device_stub__Z30kernelGenerateIntersectedPointP6float4S0_S0_iPiS0_P6float4S0_S0_iPiS0_
	.cfi_endproc
.LFE2068:
	.size	_Z30kernelGenerateIntersectedPointP6float4S0_S0_iPiS0_, .-_Z30kernelGenerateIntersectedPointP6float4S0_S0_iPiS0_
	.globl	cudaGenerateIntersectedPoint
	.type	cudaGenerateIntersectedPoint, @function
cudaGenerateIntersectedPoint:
.LFB2033:
	.cfi_startproc
	endbr64
	leal	255(%rcx), %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r9, %r15
	xorl	%r9d, %r9d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	xorl	%r8d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	cltd
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	movl	$256, %ecx
	idivl	%ecx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	$16777217, %edx
	movl	$1, %ecx
	salq	$8, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movq	%r15, %r9
	movq	%r14, %r8
	movl	%ebx, %ecx
	movq	%r13, %rdx
	popq	%rbx
	.cfi_def_cfa_offset 48
	movq	%r12, %rsi
	movq	%rbp, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z68__device_stub__Z30kernelGenerateIntersectedPointP6float4S0_S0_iPiS0_P6float4S0_S0_iPiS0_
.L64:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	cudaGenerateIntersectedPoint, .-cudaGenerateIntersectedPoint
	.globl	_Z58__device_stub__Z25kernelGeneratePrimaryRays6float4PfPS_S1_R6float4PfPS_S2_
	.type	_Z58__device_stub__Z25kernelGeneratePrimaryRays6float4PfPS_S1_R6float4PfPS_S2_, @function
_Z58__device_stub__Z25kernelGeneratePrimaryRays6float4PfPS_S1_R6float4PfPS_S2_:
.LFB2069:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rsi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movq	%rdi, 104(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L67
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z25kernelGeneratePrimaryRays6float4PfPS_S1_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L67:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L69
	call	__stack_chk_fail@PLT
.L69:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2069:
	.size	_Z58__device_stub__Z25kernelGeneratePrimaryRays6float4PfPS_S1_R6float4PfPS_S2_, .-_Z58__device_stub__Z25kernelGeneratePrimaryRays6float4PfPS_S1_R6float4PfPS_S2_
	.globl	_Z25kernelGeneratePrimaryRays6float4PfPS_S1_
	.type	_Z25kernelGeneratePrimaryRays6float4PfPS_S1_, @function
_Z25kernelGeneratePrimaryRays6float4PfPS_S1_:
.LFB2070:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	movq	%rsi, %rdx
	movq	%rdi, %rsi
	movq	%rsp, %rax
	movq	%xmm0, (%rsp)
	movq	%rax, %rdi
	movq	%xmm1, 8(%rsp)
	call	_Z58__device_stub__Z25kernelGeneratePrimaryRays6float4PfPS_S1_R6float4PfPS_S2_
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2070:
	.size	_Z25kernelGeneratePrimaryRays6float4PfPS_S1_, .-_Z25kernelGeneratePrimaryRays6float4PfPS_S1_
	.globl	cudaGeneratePrimaryRays
	.type	cudaGeneratePrimaryRays, @function
cudaGeneratePrimaryRays:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$256, %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%xmm0, %r13
	movq	%xmm1, %r14
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	movq	%r13, %rax
	shrq	$32, %rax
	movd	%eax, %xmm2
	mulss	%xmm2, %xmm0
	cvttss2sil	%xmm0, %eax
	addl	$255, %eax
	cltd
	idivl	%ecx
	movl	$16777217, %edx
	movl	$1, %ecx
	salq	$8, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L73
	leaq	32(%rsp), %rdi
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movq	%r13, 32(%rsp)
	movq	%r14, 40(%rsp)
	call	_Z58__device_stub__Z25kernelGeneratePrimaryRays6float4PfPS_S1_R6float4PfPS_S2_
.L73:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L75
	call	__stack_chk_fail@PLT
.L75:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	cudaGeneratePrimaryRays, .-cudaGeneratePrimaryRays
	.globl	_Z69__device_stub__Z25kernelGetIntersectedPointP6float4S0_S0_PiS1_S0_iS0_P6float4S0_S0_PiS1_S0_iS0_
	.type	_Z69__device_stub__Z25kernelGetIntersectedPointP6float4S0_S0_PiS1_S0_iS0_P6float4S0_S0_PiS1_S0_iS0_, @function
_Z69__device_stub__Z25kernelGetIntersectedPointP6float4S0_S0_PiS1_S0_iS0_P6float4S0_S0_PiS1_S0_iS0_:
.LFB2071:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	232(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L77
	pushq	80(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z25kernelGetIntersectedPointP6float4S0_S0_PiS1_S0_iS0_(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 240
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L77:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L79
	call	__stack_chk_fail@PLT
.L79:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2071:
	.size	_Z69__device_stub__Z25kernelGetIntersectedPointP6float4S0_S0_PiS1_S0_iS0_P6float4S0_S0_PiS1_S0_iS0_, .-_Z69__device_stub__Z25kernelGetIntersectedPointP6float4S0_S0_PiS1_S0_iS0_P6float4S0_S0_PiS1_S0_iS0_
	.globl	_Z25kernelGetIntersectedPointP6float4S0_S0_PiS1_S0_iS0_
	.type	_Z25kernelGetIntersectedPointP6float4S0_S0_PiS1_S0_iS0_, @function
_Z25kernelGetIntersectedPointP6float4S0_S0_PiS1_S0_iS0_:
.LFB2072:
	.cfi_startproc
	endbr64
	jmp	_Z69__device_stub__Z25kernelGetIntersectedPointP6float4S0_S0_PiS1_S0_iS0_P6float4S0_S0_PiS1_S0_iS0_
	.cfi_endproc
.LFE2072:
	.size	_Z25kernelGetIntersectedPointP6float4S0_S0_PiS1_S0_iS0_, .-_Z25kernelGetIntersectedPointP6float4S0_S0_PiS1_S0_iS0_
	.globl	cudaGetIntersectedPoint
	.type	cudaGetIntersectedPoint, @function
cudaGetIntersectedPoint:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r9, %r15
	xorl	%r9d, %r9d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	xorl	%r8d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	movl	$256, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	112(%rsp), %ebx
	movq	120(%rsp), %rbp
	movq	%rdi, (%rsp)
	movq	%rsi, 8(%rsp)
	leal	255(%rbx), %eax
	cltd
	idivl	%ecx
	movl	$16777217, %edx
	movl	$1, %ecx
	salq	$8, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L82
	movq	%rbp, 120(%rsp)
	movq	8(%rsp), %rsi
	movq	%r15, %r9
	movq	%r14, %r8
	movl	%ebx, 112(%rsp)
	movq	(%rsp), %rdi
	addq	$56, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movq	%r13, %rcx
	popq	%rbx
	.cfi_def_cfa_offset 48
	movq	%r12, %rdx
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z69__device_stub__Z25kernelGetIntersectedPointP6float4S0_S0_PiS1_S0_iS0_P6float4S0_S0_PiS1_S0_iS0_
.L82:
	.cfi_restore_state
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	cudaGetIntersectedPoint, .-cudaGetIntersectedPoint
	.globl	_Z93__device_stub__Z17kernelPixelShaderP6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_P6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_
	.type	_Z93__device_stub__Z17kernelPixelShaderP6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_P6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_, @function
_Z93__device_stub__Z17kernelPixelShaderP6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_P6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_:
.LFB2073:
	.cfi_startproc
	endbr64
	subq	$344, %rsp
	.cfi_def_cfa_offset 352
	movq	352(%rsp), %rax
	movq	%rdi, 120(%rsp)
	leaq	144(%rsp), %rdi
	movq	%rsi, 112(%rsp)
	leaq	156(%rsp), %rsi
	movq	%rax, 72(%rsp)
	movq	360(%rsp), %rax
	movq	%rdx, 104(%rsp)
	leaq	128(%rsp), %rdx
	movq	%rax, 64(%rsp)
	movq	368(%rsp), %rax
	movq	%rcx, 96(%rsp)
	leaq	136(%rsp), %rcx
	movq	%rax, 56(%rsp)
	movq	376(%rsp), %rax
	movq	%r8, 88(%rsp)
	movq	%rax, 48(%rsp)
	movq	384(%rsp), %rax
	movq	%r9, 80(%rsp)
	movq	%rax, 40(%rsp)
	movq	392(%rsp), %rax
	movq	%rax, 32(%rsp)
	movq	408(%rsp), %rax
	movq	%rax, 24(%rsp)
	movq	416(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	424(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	432(%rsp), %rax
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 328(%rsp)
	xorl	%eax, %eax
	leaq	120(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	400(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 304(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 312(%rsp)
	movq	%rsp, %rax
	movq	%rax, 320(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 144(%rsp)
	movl	$1, 152(%rsp)
	movq	%rax, 156(%rsp)
	movl	$1, 164(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L85
	pushq	136(%rsp)
	.cfi_def_cfa_offset 360
	leaq	_Z17kernelPixelShaderP6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_(%rip), %rdi
	pushq	136(%rsp)
	.cfi_def_cfa_offset 368
	movq	172(%rsp), %rcx
	movl	180(%rsp), %r8d
	movq	160(%rsp), %rsi
	movl	168(%rsp), %edx
	leaq	208(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 360
	popq	%rdx
	.cfi_def_cfa_offset 352
.L85:
	movq	328(%rsp), %rax
	subq	%fs:40, %rax
	je	.L87
	call	__stack_chk_fail@PLT
.L87:
	addq	$344, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2073:
	.size	_Z93__device_stub__Z17kernelPixelShaderP6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_P6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_, .-_Z93__device_stub__Z17kernelPixelShaderP6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_P6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_
	.globl	_Z17kernelPixelShaderP6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_
	.type	_Z17kernelPixelShaderP6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_, @function
_Z17kernelPixelShaderP6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_:
.LFB2074:
	.cfi_startproc
	endbr64
	jmp	_Z93__device_stub__Z17kernelPixelShaderP6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_P6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_
	.cfi_endproc
.LFE2074:
	.size	_Z17kernelPixelShaderP6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_, .-_Z17kernelPixelShaderP6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_
	.globl	cudaPixelShader
	.type	cudaPixelShader, @function
cudaPixelShader:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	208(%rsp), %rax
	movl	240(%rsp), %r12d
	movq	%rdx, 24(%rsp)
	movq	%rcx, 32(%rsp)
	movl	$256, %ecx
	movq	192(%rsp), %rbx
	movq	%rax, 56(%rsp)
	movq	216(%rsp), %rax
	movq	%rdi, 8(%rsp)
	movq	200(%rsp), %rbp
	movq	%rax, 64(%rsp)
	movq	224(%rsp), %rax
	movq	%rsi, 16(%rsp)
	movq	232(%rsp), %r13
	movq	%rax, 72(%rsp)
	leal	255(%r12), %eax
	movq	248(%rsp), %r14
	cltd
	movq	%r8, 40(%rsp)
	movq	256(%rsp), %r15
	xorl	%r8d, %r8d
	idivl	%ecx
	movq	%r9, 48(%rsp)
	movq	264(%rsp), %r10
	movq	272(%rsp), %r11
	movq	%r10, 88(%rsp)
	movq	%r11, 80(%rsp)
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	salq	$8, %rdx
	movl	%eax, 104(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 108(%rsp)
	movq	104(%rsp), %rdi
	movl	112(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movq	80(%rsp), %r11
	movq	88(%rsp), %r10
	testl	%eax, %eax
	jne	.L90
	movq	72(%rsp), %rax
	movq	%r14, 248(%rsp)
	movl	%r12d, 240(%rsp)
	movq	48(%rsp), %r9
	movq	%rax, 224(%rsp)
	movq	64(%rsp), %rax
	movq	%r13, 232(%rsp)
	movq	40(%rsp), %r8
	movq	%rax, 216(%rsp)
	movq	56(%rsp), %rax
	movq	%rbp, 200(%rsp)
	movq	32(%rsp), %rcx
	movq	%rbx, 192(%rsp)
	movq	24(%rsp), %rdx
	movq	%r11, 272(%rsp)
	movq	16(%rsp), %rsi
	movq	%r10, 264(%rsp)
	movq	8(%rsp), %rdi
	movq	%r15, 256(%rsp)
	movq	%rax, 208(%rsp)
	addq	$136, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z93__device_stub__Z17kernelPixelShaderP6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_P6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_
.L90:
	.cfi_restore_state
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	cudaPixelShader, .-cudaPixelShader
	.globl	_Z74__device_stub__Z27kernelGenerateNextLevelRaysP6float4S0_S0_S0_S0_iS0_S0_PiP6float4S0_S0_S0_S0_iS0_S0_Pi
	.type	_Z74__device_stub__Z27kernelGenerateNextLevelRaysP6float4S0_S0_S0_S0_iS0_S0_PiP6float4S0_S0_S0_S0_iS0_S0_Pi, @function
_Z74__device_stub__Z27kernelGenerateNextLevelRaysP6float4S0_S0_S0_S0_iS0_S0_PiP6float4S0_S0_S0_S0_iS0_S0_Pi:
.LFB2075:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	240(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	108(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	248(%rsp), %rax
	movq	%rdx, 56(%rsp)
	leaq	80(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	256(%rsp), %rax
	movq	%rcx, 48(%rsp)
	leaq	88(%rsp), %rcx
	movq	%r8, 40(%rsp)
	movl	%r9d, 36(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movl	$1, 104(%rsp)
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L93
	pushq	88(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z27kernelGenerateNextLevelRaysP6float4S0_S0_S0_S0_iS0_S0_Pi(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 256
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	160(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L93:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L95
	call	__stack_chk_fail@PLT
.L95:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2075:
	.size	_Z74__device_stub__Z27kernelGenerateNextLevelRaysP6float4S0_S0_S0_S0_iS0_S0_PiP6float4S0_S0_S0_S0_iS0_S0_Pi, .-_Z74__device_stub__Z27kernelGenerateNextLevelRaysP6float4S0_S0_S0_S0_iS0_S0_PiP6float4S0_S0_S0_S0_iS0_S0_Pi
	.globl	_Z27kernelGenerateNextLevelRaysP6float4S0_S0_S0_S0_iS0_S0_Pi
	.type	_Z27kernelGenerateNextLevelRaysP6float4S0_S0_S0_S0_iS0_S0_Pi, @function
_Z27kernelGenerateNextLevelRaysP6float4S0_S0_S0_S0_iS0_S0_Pi:
.LFB2076:
	.cfi_startproc
	endbr64
	jmp	_Z74__device_stub__Z27kernelGenerateNextLevelRaysP6float4S0_S0_S0_S0_iS0_S0_PiP6float4S0_S0_S0_S0_iS0_S0_Pi
	.cfi_endproc
.LFE2076:
	.size	_Z27kernelGenerateNextLevelRaysP6float4S0_S0_S0_S0_iS0_S0_Pi, .-_Z27kernelGenerateNextLevelRaysP6float4S0_S0_S0_S0_iS0_S0_Pi
	.globl	cudaGenerateNextLevelRays
	.type	cudaGenerateNextLevelRays, @function
cudaGenerateNextLevelRays:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leal	255(%r9), %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	xorl	%r8d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	movl	$256, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r9d, %ebx
	xorl	%r9d, %r9d
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdx, 24(%rsp)
	cltd
	movq	128(%rsp), %r15
	idivl	%ecx
	movq	%rdi, 8(%rsp)
	movq	136(%rsp), %rbp
	movq	%rsi, 16(%rsp)
	movq	144(%rsp), %r12
	movl	$16777217, %edx
	movl	$1, %ecx
	salq	$8, %rdx
	movl	%eax, 40(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 44(%rsp)
	movq	40(%rsp), %rdi
	movl	48(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L98
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	%ebx, %r9d
	movq	%r14, %r8
	movq	%r12, 144(%rsp)
	movq	8(%rsp), %rdi
	movq	%r13, %rcx
	movq	%rbp, 136(%rsp)
	movq	%r15, 128(%rsp)
	addq	$72, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z74__device_stub__Z27kernelGenerateNextLevelRaysP6float4S0_S0_S0_S0_iS0_S0_PiP6float4S0_S0_S0_S0_iS0_S0_Pi
.L98:
	.cfi_restore_state
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2037:
	.size	cudaGenerateNextLevelRays, .-cudaGenerateNextLevelRays
	.globl	_Z58__device_stub__Z17kernelCopyNewRaysP6float4S0_PiiS0_S0_S1_P6float4S0_PiiS0_S0_S1_
	.type	_Z58__device_stub__Z17kernelCopyNewRaysP6float4S0_PiiS0_S0_S1_P6float4S0_PiiS0_S0_S1_, @function
_Z58__device_stub__Z17kernelCopyNewRaysP6float4S0_PiiS0_S0_S1_P6float4S0_PiiS0_S0_S1_:
.LFB2077:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movl	%ecx, 36(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L101
	pushq	72(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z17kernelCopyNewRaysP6float4S0_PiiS0_S0_S1_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 224
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L101:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L103
	call	__stack_chk_fail@PLT
.L103:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2077:
	.size	_Z58__device_stub__Z17kernelCopyNewRaysP6float4S0_PiiS0_S0_S1_P6float4S0_PiiS0_S0_S1_, .-_Z58__device_stub__Z17kernelCopyNewRaysP6float4S0_PiiS0_S0_S1_P6float4S0_PiiS0_S0_S1_
	.globl	_Z17kernelCopyNewRaysP6float4S0_PiiS0_S0_S1_
	.type	_Z17kernelCopyNewRaysP6float4S0_PiiS0_S0_S1_, @function
_Z17kernelCopyNewRaysP6float4S0_PiiS0_S0_S1_:
.LFB2078:
	.cfi_startproc
	endbr64
	jmp	_Z58__device_stub__Z17kernelCopyNewRaysP6float4S0_PiiS0_S0_S1_P6float4S0_PiiS0_S0_S1_
	.cfi_endproc
.LFE2078:
	.size	_Z17kernelCopyNewRaysP6float4S0_PiiS0_S0_S1_, .-_Z17kernelCopyNewRaysP6float4S0_PiiS0_S0_S1_
	.globl	cudaCopyNewRays
	.type	cudaCopyNewRays, @function
cudaCopyNewRays:
.LFB2039:
	.cfi_startproc
	endbr64
	leal	255(%rcx), %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r9, %r15
	xorl	%r9d, %r9d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	xorl	%r8d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	cltd
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	movl	$256, %ecx
	idivl	%ecx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	$16777217, %edx
	movl	$1, %ecx
	movq	%rdi, 8(%rsp)
	salq	$8, %rdx
	movq	112(%rsp), %rbp
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L106
	movq	%rbp, 112(%rsp)
	movq	8(%rsp), %rdi
	addq	$56, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movl	%ebx, %ecx
	movq	%r15, %r9
	popq	%rbx
	.cfi_def_cfa_offset 48
	movq	%r14, %r8
	popq	%rbp
	.cfi_def_cfa_offset 40
	movq	%r13, %rdx
	movq	%r12, %rsi
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z58__device_stub__Z17kernelCopyNewRaysP6float4S0_PiiS0_S0_S1_P6float4S0_PiiS0_S0_S1_
.L106:
	.cfi_restore_state
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2039:
	.size	cudaCopyNewRays, .-cudaCopyNewRays
	.globl	_Z34__device_stub__Z10kernelScanPiiiS_PiiiS_
	.type	_Z34__device_stub__Z10kernelScanPiiiS_PiiiS_, @function
_Z34__device_stub__Z10kernelScanPiiiS_PiiiS_:
.LFB2079:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L109
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10kernelScanPiiiS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L109:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L111
	call	__stack_chk_fail@PLT
.L111:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2079:
	.size	_Z34__device_stub__Z10kernelScanPiiiS_PiiiS_, .-_Z34__device_stub__Z10kernelScanPiiiS_PiiiS_
	.globl	_Z10kernelScanPiiiS_
	.type	_Z10kernelScanPiiiS_, @function
_Z10kernelScanPiiiS_:
.LFB2080:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z10kernelScanPiiiS_PiiiS_
	.cfi_endproc
.LFE2080:
	.size	_Z10kernelScanPiiiS_, .-_Z10kernelScanPiiiS_
	.globl	_Z38__device_stub__Z16kernelUniformAddPiS_PiS_
	.type	_Z38__device_stub__Z16kernelUniformAddPiS_PiS_, @function
_Z38__device_stub__Z16kernelUniformAddPiS_PiS_:
.LFB2081:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L114
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z16kernelUniformAddPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L114:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L116
	call	__stack_chk_fail@PLT
.L116:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2081:
	.size	_Z38__device_stub__Z16kernelUniformAddPiS_PiS_, .-_Z38__device_stub__Z16kernelUniformAddPiS_PiS_
	.globl	_Z16kernelUniformAddPiS_
	.type	_Z16kernelUniformAddPiS_, @function
_Z16kernelUniformAddPiS_:
.LFB2082:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z16kernelUniformAddPiS_PiS_
	.cfi_endproc
.LFE2082:
	.size	_Z16kernelUniformAddPiS_, .-_Z16kernelUniformAddPiS_
	.globl	cudaScan
	.type	cudaScan, @function
cudaScan:
.LFB2038:
	.cfi_startproc
	endbr64
	leal	511(%rsi), %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%esi, %r13d
	movl	$512, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	$16777217, %ecx
	movq	%rdi, %r12
	xorl	%r9d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	salq	$8, %rcx
	xorl	%r8d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movslq	%edx, %rbx
	cltd
	idivl	%esi
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movq	%rcx, %rdx
	movq	%rcx, 12(%rsp)
	movl	$1, %ecx
	movl	$1, 20(%rsp)
	movl	%eax, %ebp
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movl	32(%rsp), %esi
	movl	%ebp, 24(%rsp)
	movq	24(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L120
	leaq	g_ScanSum(%rip), %rdx
	movslq	%ebx, %rax
	movl	%r13d, %esi
	movq	%r12, %rdi
	movq	(%rdx,%rax,8), %rcx
	movl	$1, %edx
	call	_Z34__device_stub__Z10kernelScanPiiiS_PiiiS_
.L120:
	cmpl	$262144, %r13d
	jg	.L121
	movl	20(%rsp), %ecx
	movq	12(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L123
	movslq	%ebx, %rax
	leaq	g_ScanSum(%rip), %rdx
	movq	%r12, %rcx
	movl	%ebp, %esi
	movq	(%rdx,%rax,8), %rdi
	orl	$-1, %edx
	call	_Z34__device_stub__Z10kernelScanPiiiS_PiiiS_
	jmp	.L123
.L121:
	movslq	%ebx, %rax
	leaq	g_ScanSum(%rip), %rcx
	leal	1(%rbx), %edx
	movl	%ebp, %esi
	movq	(%rcx,%rax,8), %rdi
	call	cudaScan
.L123:
	movl	20(%rsp), %ecx
	movq	24(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$512, 12(%rsp)
	movl	32(%rsp), %esi
	movq	12(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L119
	leaq	g_ScanSum(%rip), %rax
	movq	%r12, %rdi
	movq	(%rax,%rbx,8), %rsi
	addq	$56, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z38__device_stub__Z16kernelUniformAddPiS_PiS_
.L119:
	.cfi_restore_state
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2038:
	.size	cudaScan, .-cudaScan
	.globl	_Z47__device_stub__Z16kernelClearNoiseP6float4iiS0_P6float4iiS0_
	.type	_Z47__device_stub__Z16kernelClearNoiseP6float4iiS0_P6float4iiS0_, @function
_Z47__device_stub__Z16kernelClearNoiseP6float4iiS0_P6float4iiS0_:
.LFB2083:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L126
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16kernelClearNoiseP6float4iiS0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L126:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L128
	call	__stack_chk_fail@PLT
.L128:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2083:
	.size	_Z47__device_stub__Z16kernelClearNoiseP6float4iiS0_P6float4iiS0_, .-_Z47__device_stub__Z16kernelClearNoiseP6float4iiS0_P6float4iiS0_
	.globl	_Z16kernelClearNoiseP6float4iiS0_
	.type	_Z16kernelClearNoiseP6float4iiS0_, @function
_Z16kernelClearNoiseP6float4iiS0_:
.LFB2084:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z16kernelClearNoiseP6float4iiS0_P6float4iiS0_
	.cfi_endproc
.LFE2084:
	.size	_Z16kernelClearNoiseP6float4iiS0_, .-_Z16kernelClearNoiseP6float4iiS0_
	.globl	cudaClearNoise
	.type	cudaClearNoise, @function
cudaClearNoise:
.LFB2040:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%edx, %r13d
	xorl	%r9d, %r9d
	imull	%edx, %eax
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rcx, %r12
	movl	$256, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	xorl	%r8d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%esi, %ebx
	addl	$255, %eax
	cltd
	idivl	%ecx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	$16777217, %edx
	movl	$1, %ecx
	salq	$8, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L131
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	movq	%r12, %rcx
	movl	%r13d, %edx
	movl	%ebx, %esi
	movq	%rbp, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z47__device_stub__Z16kernelClearNoiseP6float4iiS0_P6float4iiS0_
.L131:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	cudaClearNoise, .-cudaClearNoise
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z16kernelClearNoiseP6float4iiS0_"
.LC1:
	.string	"_Z16kernelUniformAddPiS_"
.LC2:
	.string	"_Z10kernelScanPiiiS_"
.LC3:
	.string	"_Z17kernelCopyNewRaysP6float4S0_PiiS0_S0_S1_"
.LC4:
	.string	"_Z27kernelGenerateNextLevelRaysP6float4S0_S0_S0_S0_iS0_S0_Pi"
.LC5:
	.string	"_Z17kernelPixelShaderP6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_"
.LC6:
	.string	"_Z25kernelGetIntersectedPointP6float4S0_S0_PiS1_S0_iS0_"
.LC7:
	.string	"_Z25kernelGeneratePrimaryRays6float4PfPS_S1_"
.LC8:
	.string	"_Z30kernelGenerateIntersectedPointP6float4S0_S0_iPiS0_"
.LC9:
	.string	"_Z16kernelInitBufferP6float4Pii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2086:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z16kernelClearNoiseP6float4iiS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernelUniformAddPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernelScanPiiiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernelCopyNewRaysP6float4S0_PiiS0_S0_S1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z27kernelGenerateNextLevelRaysP6float4S0_S0_S0_S0_iS0_S0_Pi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernelPixelShaderP6float4S0_S0_P6float2S0_PiS3_S0_S3_S0_S3_S0_iS0_S3_S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z25kernelGetIntersectedPointP6float4S0_S0_PiS1_S0_iS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z25kernelGeneratePrimaryRays6float4PfPS_S1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC8(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	movq	%rdx, %rcx
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z30kernelGenerateIntersectedPointP6float4S0_S0_iPiS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16kernelInitBufferP6float4Pii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2086:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	g_ScanSum
	.bss
	.align 16
	.type	g_ScanSum, @object
	.size	g_ScanSum, 16
g_ScanSum:
	.zero	16
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
/*

 *	FileName:	RayTracer_Kernel.cu

 *

 *	Programmer:	Jiayin Cao

 */



//the sum for scan

int*	g_ScanSum[2];



//some helper functions

__device__ void d_normalize( float4* v )

{

	float s = v->x * v->x + v->y * v->y + v->z * v->z;

	s = sqrt(s);



	v->x /= s;

	v->y /= s;

	v->z /= s;

}



//cross product

__device__ float4 d_cross( const float4& v1 , const float4& v2 )

{

	float4 r;



	r.x = v1.y * v2.z - v1.z * v2.y;

	r.y = v1.z * v2.x - v1.x * v2.z;

	r.z = v1.x * v2.y - v1.y * v2.x;

	r.w = 0.0f;



	return r;

}



//clamp the value

__device__ float d_clamp( const float v )

{

	if( v > 1.0f )

		return 1.0f;

	if( v < 0.0f )

		return 0.0f;



	return v;

}



//clamp the float4

__device__ float4 d_saturate( const float4& v )

{

	return make_float4( d_clamp( v.x ) , d_clamp( v.y ) , d_clamp( v.z ) , d_clamp( v.w ) );

}



//dot product

__device__ float d_dot( const float4& v1 , const float4& v2 )

{

	return v1.x * v2.x + v1.y * v2.y + v1.z * v2.z ;

}



//the length of the vector

__device__ float d_length( const float4& v )

{

	return sqrt( v.x * v.x + v.y * v.y + v.z * v.z );

}



//define some useful operators for float4

__device__ float4 operator+ ( const float4& v1 , const float4& v2 )

{

	return make_float4( v1.x + v2.x , v1.y + v2.y , v1.z + v2.z , v1.w + v2.w );

}



__device__ float4 operator- ( const float4& v1 , const float4& v2 )

{

	return make_float4( v1.x - v2.x , v1.y - v2.y , v1.z - v2.z , v1.w - v2.w );

}



__device__ float4 operator* ( const float4& v , const float d )

{

	return make_float4( v.x * d , v.y * d , v.z * d , v.w * d );

}



__device__ float4 operator* ( const float d , const float4& v )

{

	return make_float4( v.x * d , v.y * d , v.z * d , v.w * d ); 

}



__device__ float4 operator* ( const float4& v1 , const float4& v2 )

{

	return make_float4( v1.x * v2.x , v1.y * v2.y , v1.z * v2.z , v1.w * v2.w );

}



__device__ float4 operator+= ( float4& v1 , const float4& v2 )

{

	v1 = v1 + v2;



	return v1;

}



__device__ float2 operator * ( const float d , const float2& v )

{

	return make_float2( d * v.x , d * v.y );

}



__device__ float2 operator + ( const float2& v1 , const float2& v2 )

{

	return make_float2( v1.x + v2.x , v1.y + v2.y );

}



__device__ float2 operator - ( const float2& v1 , const float2& v2 )

{

	return make_float2( v1.x - v2.x , v1.y - v2.y );

}



__device__ float2 floor( const float2& v )

{

	int x = (int) v.x ;

	int y = (int) v.y ;

	return make_float2( x , y );

}



//reflect direction

__device__ float4 d_reflect( const float4& dir , const float4& normal )

{

	float dotProduct = ( -2.0f ) * d_dot( dir , normal );



	float4 r = dir + dotProduct * normal;



	return make_float4( r.x , r.y , r.z , 0.0f );

}



//refraction direction

__device__ float4	d_refract( const float4& dir , float4 normal , float rate )

{

	float4 r;



	if( d_dot( dir , normal ) > 0 )

	{

		normal = -1.0f * normal;

		rate = 1.0f / rate;

	}



	float cos = -1.0f * d_dot( dir , normal );

	float t = 1 - rate * rate * ( 1 - cos * cos );



	if( t < 0 )

	{

		r = d_reflect( dir , normal );

	}else

	{

		float cos2 = sqrt( t );

		r = rate * dir + ( rate * cos - cos2 ) * normal ;

	}



	return r;

}





//check if the ray intersects with bounding box

__device__ float4 kernelIntersectBoundingBox( float4& ori , float4& dir , float4& min , float4& max , float length )

{

	//the result

	float4 result = make_float4( 0.0f , 9999999.0f , 0.0f , 0.0f );



	//limit the maxium value

	if( length > 0 )

		result.y = length;



	//the variables

	float t1 , t2;



	if( fabs( dir.x ) < 0.0000001f )

	{

		if( ori.x > max.x || ori.x < min.x )

			return result;

	}else

	{

		t1 = ( max.x - ori.x ) / dir.x;

		t2 = ( min.x - ori.x ) / dir.x;



		if( t1 > t2 ) { float t = t1; t1 = t2; t2 = t; }



		//clamp

		if( t1 > result.x ) result.x = t1;

		if( t2 < result.y ) result.y = t2;



		if( result.x > result.y )

			return result;

	}



	if( fabs( dir.y ) < 0.0000001f )

	{

		if( ori.y > max.y || ori.y < min.y )

			return result;

	}else

	{

		t1 = ( max.y - ori.y ) / dir.y;

		t2 = ( min.y - ori.y ) / dir.y;



		if( t1 > t2 ) { float t = t1; t1 = t2; t2 = t; }



		//clamp

		if( t1 > result.x ) result.x = t1;

		if( t2 < result.y ) result.y = t2;



		if( result.x > result.y )

			return result;

	}



	if( fabs( dir.y ) < 0.0000001f )

	{

		if( ori.z > max.z || ori.z < min.z )

			return result;

	}else

	{

		t1 = ( max.z - ori.z ) / dir.z;

		t2 = ( min.z - ori.z ) / dir.z;



		if( t1 > t2 ) { float t = t1; t1 = t2; t2 = t; }



		//clamp

		if( t1 > result.x ) result.x = t1;

		if( t2 < result.y ) result.y = t2;



		if( result.x > result.y )

			return result;

	}



	//enable the intersected point

	result.z = 1.0f;



	return result;

}



//check if the ray intersects with a plane

__device__ float4 kernelIntersectPlane( const float4& v1 , const float4& v2 , const float4& v3 , const float4& ori , const float4& dir )

{

	//w : >= 0 ( intersected point enable ) , < 0 ( disable )

	float4 result = make_float4( 0.0f , 0.0f , 0.0f , 0.0f );

	

	//get the normal of the plane

	float4 normal = d_cross( v2 - v1 , v3 - v1 );



	//get the factor

	float t = d_dot( normal , ori - v1 ) / d_dot( normal , dir );



	//set the result

	result = ori - t * dir;



	if( t <= 0.0f )

		result.w = -t;

	else

		result.w = -1;



	return result;

}



//check if the ray intersects with a triangle

__device__ float4 kernelIntersectTriangle( const float4& v1 , const float4& v2 , const float4& v3 , const float4& ori , const float4& dir )

{

	//the result

	float4 result = kernelIntersectPlane( v1 , v2 , v3 , ori , dir );



	if( result.w < 0 )

		return result;



	//get the factor

	float4 d1 = d_cross( result - v2 , v1 - v2 );

	float4 d2 = d_cross( result - v3 , v2 - v3 );

	float4 d3 = d_cross( result - v1 , v3 - v1 );



	float f1 = d_dot( d1 , d2 );

	float f2 = d_dot( d2 , d3 );



	if( !( f1 >= -0.000000000000001f && f2 >= -0.000000000000001f ) )

		result.w = -1.0f;



	return result;

}



//check if the current point is in the bounding box

__device__ int kernelPointInBoundingBox( const float4& p , const float4& min , const float4& max )

{

	float threshold = 0.00001f;



	if( p.x < min.x - threshold || p.y < min.y - threshold || p.z < min.z - threshold ||

		p.x > max.x + threshold || p.y > max.y + threshold || p.z > max.z + threshold )

		return false;



	return true;

}



//do interplotation

__device__ float4 kernelInterploted( const float4& v1 , const float4& v2 , const float4& v3 , const float4& intersected )

{

	//get the vectors

	float4 e1 = intersected - v1;

	float4 e2 = intersected - v2;

	float4 e3 = intersected - v3;



	//compute the areas

	float4 area;

	area.x = d_length( d_cross( e2 , e3 ) );

	area.y = d_length( d_cross( e3 , e1 ) );

	area.z = d_length( d_cross( e1 , e2 ) );



	float d = 1.0f / ( area.x + area.y + area.z );



	return area * d;

}



//clear and initialize buffer

__global__ void kernelInitBuffer(	float4* buffer , 

									int*	markedBuffer , 

									int		pixelNum )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= pixelNum )

		return;



	buffer[tid] = make_float4( 0.0f , 0.0f , 0.0f , 0.0f );

	markedBuffer[tid] = tid;

}



//generate primary ray intersected result

__global__ void kernelGenerateIntersectedPoint( float4* rayOri , 

												float4* rayDir ,

												float4*	vertexBuffer ,

												int		rayNum ,

												int*	index , 

												float4*	result )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= rayNum )

		return;



	//Load the vertex

	int triId = index[tid];



	//get the vertex

	int id = 3 * triId;

	float4 v1 = vertexBuffer[id];

	float4 v2 = vertexBuffer[id+1];

	float4 v3 = vertexBuffer[id+2];



	//ray ori and dir

	float4 ori = rayOri[tid];

	float4 dir = rayDir[tid];



	//get the intersected result

	result[tid] = kernelIntersectPlane( v1 , v2 , v3 , ori , dir );

	result[tid].w = triId;

}



//Generate primary rays

__global__ void kernelGeneratePrimaryRays(	float4	viewInfo ,	

											float*	invViewMatrix ,

											float4*	rayOri , 

											float4* rayDir )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= (int)viewInfo.x * (int)viewInfo.y )

		return;



	// get the pixel coorindate first

	uint2 coord;

	coord.x = tid % (int) viewInfo.x;

	coord.y = tid / (int)viewInfo.x;



	// compute the vector of the ray in screen space

	float2 v;

	v.x = ( ( ( 2.0f * coord.x ) / viewInfo.x ) - 1.0f ) / viewInfo.z;

	v.y = -1.0f * ( ( ( 2.0f * coord.y ) / viewInfo.y ) - 1.0f ) / viewInfo.w;



	//copy the original point of the rays

	rayOri[tid] = make_float4( invViewMatrix[12] , invViewMatrix[13] , invViewMatrix[14] , tid ); 



	//compute the direction of the ray

	float4 dir;

	dir.x = ( v.x * invViewMatrix[0] + v.y * invViewMatrix[4] + invViewMatrix[8] );

	dir.y = ( v.x * invViewMatrix[1] + v.y * invViewMatrix[5] + invViewMatrix[9] );

	dir.z = ( v.x * invViewMatrix[2] + v.y * invViewMatrix[6] + invViewMatrix[10] );

	dir.w = 0.0f;

	d_normalize( &dir );



	rayDir[tid] = make_float4( dir.x , dir.y , dir.z , 1.0f );

}



//traverse the ray through kd-tree

__device__ float4 kernelTraverseRay(	float4*	kdTree , 

										int*	indexMap , 

										int*	offsetBuffer ,

										float4*	vertexBuffer ,

										float4&	rayOri , 

										float4&	rayDir ,

										float	length )

{

	//the intersected result

	float4 result = make_float4( 0.0f , 0.0f , 0.0f , -1.0f );



	//tree node information

	float4 header;

	float4 splitInfo;



	//the bounding box

	float4 minBB = kdTree[2];

	float4 maxBB = kdTree[3];



	//check if the ray intersects with the current bounding box of the root

	result = kernelIntersectBoundingBox( rayOri , rayDir , minBB , maxBB , length );



	//if the ray doesn't cross the kd-tree , just return

	if( result.z < 0.5f )

	{

		result = make_float4( 0.0f , 0.0f , 0.0f , -1.0f );

		return result;

	}



	//current traversing node

	int currentNodeIndex = 0;



	//the mask to mark the traversed node

	unsigned int	mask = 0;

	//current traverse depth

	int				currentTraverseDepth = 0;



	//current inPonit when traversing the node

	float4 inPoint = rayOri + result.x * rayDir ;



	while( currentTraverseDepth >= 0 )

	{

		//traverse the current node

		do

		{

			//the current node offset

			int currentNodeOffset = currentNodeIndex * 4;



			//get the current node information

			header = kdTree[ currentNodeOffset ];

			splitInfo = kdTree[currentNodeOffset + 1 ];



			//check if it's a leaf node

			if( splitInfo.x < 0 )

				break;



			//get the split axis

			int splitAxis = (int) splitInfo.x;



			//get the pointer of the inPoint

			float sPos = 0.0f;



			if( splitAxis == 0 )

				sPos = inPoint.x;

			else if( splitAxis == 1 )

				sPos = inPoint.y;

			else if( splitAxis == 2 )

				sPos = inPoint.z;



			//update the virtual stack and traverse the node

			if( splitInfo.y > sPos )

				currentNodeIndex = (int)header.y;

			else

				currentNodeIndex = (int)header.z;



			//increase the current traverse depth

			currentTraverseDepth++;



		}while( true );



		//get the offset and triangle number

		int triOffset = offsetBuffer[currentNodeIndex];

		int triNumber = (int)header.w;



		//min value

		float minFactor = 9999999.0f;

		if( length > 0 )

			minFactor = length;



		//triangle index

		int oriTriIndex = -1;

		//the bounding box

		minBB = kdTree[currentNodeIndex*4+2];

		maxBB = kdTree[currentNodeIndex*4+3];

		//intersect with the current triangles

		for( int i = 0 ; i < triNumber ; i++ )

		{

			//get the triangles

			int triIndex = indexMap[triOffset+i];



			//get the vertex

			float4 v1 = vertexBuffer[3*triIndex];

			float4 v2 = vertexBuffer[3*triIndex+1];

			float4 v3 = vertexBuffer[3*triIndex+2];



			//get the intersected point

			result = kernelIntersectTriangle( v1 , v2 , v3 , rayOri , rayDir );



			//limit the factor

			if( result.w > 0.0f && result.w < minFactor )

			{

				if( kernelPointInBoundingBox( result , minBB , maxBB ) )

				{

					minFactor = result.w;

					oriTriIndex = triIndex;



					if( length > 0 )

						break;

				}

			}

		}



		if( oriTriIndex >= 0 )

		{

			result = rayOri + minFactor * rayDir;

			result.w = (float)oriTriIndex;

			return result;

		}



		//back track here

		while( currentTraverseDepth >= 0 )

		{

			if( currentTraverseDepth == 0 )

				return make_float4( 0 , 0 , 0 , -1.0f );



			//get the current mask

			if( mask & ( 0x00000001 << currentTraverseDepth ) )

			{

				//update the mask

				mask &= ~(0x00000001 << currentTraverseDepth );



				//decrease the current depth;

				currentTraverseDepth--;



				//get to the father node

				currentNodeIndex = (int)kdTree[ 4 * currentNodeIndex ].x;



				//continue to next level

				continue;

			}



			//check the other node

			int otherNode = currentNodeIndex + 1;

			if( currentNodeIndex % 2 == 0 )

				otherNode -= 2;



			//get the bounding box of the other node

			int otherNodeOffset = 4 * otherNode;

			minBB = kdTree[ otherNodeOffset + 2 ];

			maxBB = kdTree[ otherNodeOffset + 3 ];



			//get the intersected result

			float4 bi = kernelIntersectBoundingBox( rayOri , rayDir , minBB , maxBB , length );



			if( bi.z > 0.5f )

			{

				//update the current traverse node

				currentNodeIndex = otherNode;



				//update the inPoint

				inPoint = rayOri + bi.x * rayDir ;



				//update the mask

				mask |= 0x00000001 << currentTraverseDepth;



				break;

			}else

			{

				//update the mask

				mask &= ~( 0x00000001 << currentTraverseDepth );



				//decrease current depth

				currentTraverseDepth--;



				//get to the father node

				currentNodeIndex = (int) kdTree[ 4 * currentNodeIndex ].x;

			}

		}

	}



	result.w = -1.0f;

	return result;

}



//get the interseced point

__global__ void kernelGetIntersectedPoint(	float4*	rayOri , 

											float4*	rayDir ,

											float4*	kdTree ,

											int*	indexMap ,

											int*	offsetBuffer ,

											float4*	vertexBuffer ,

											int		rayNumber , 

											float4*	result )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= rayNumber )

		return;



	//get the triangle

	result[tid] = kernelTraverseRay( kdTree , indexMap , offsetBuffer , vertexBuffer , rayOri[tid] , rayDir[tid] , -1.0f );

}



//do pixel shader here

__global__ void kernelPixelShader(	float4*	intersected , 

									float4*	vertexBuffer , 

									float4*	normalBuffer ,

									float2*	texCoordinateBuffer , 

									float4*	kdTree ,

									int*	indexMap ,

									int*	offsetIndexBuffer,

									float4*	lightBuffer ,

									int*	attributeBuffer , 

									float4*	materialBuffer ,

									int*	textureOffset , 

									float4*	customTexture , 

									int		pixelNum , 

									float4*	rayDir ,

									int*	offsetBuffer ,

									float4*	destNormalBuffer , 

									float4*	imageBuffer )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= pixelNum )

		return;



	//get the triangle index

	int triIndex = (int)intersected[tid].w;

	int triOffset = 3 * triIndex;



	float4 color = make_float4( 0.0f , 0.0f , 0.0f , 0.0f );



	//load the density of the pixel

	if( triIndex < 0 )

		return;



	//get the material index

	int	matIndex = attributeBuffer[triIndex];



	//the material buffer

	float4 ambient = materialBuffer[ 4 * matIndex ];

	float4 diffuse = materialBuffer[ 4 * matIndex + 1 ];

	float4 specular = materialBuffer[ 4 * matIndex + 2 ];

	float4 matprop = materialBuffer[ 4 * matIndex + 3 ];

	

	//load the vertex

	float4 v1 = vertexBuffer[ triOffset ];

	float4 v2 = vertexBuffer[ triOffset + 1 ];

	float4 v3 = vertexBuffer[ triOffset + 2 ];



	//get the interploted

	float4 interploted = kernelInterploted( v1 , v2 , v3 , intersected[tid] );



	//get the normal

	float4 n1 = normalBuffer[ triOffset ];

	float4 n2 = normalBuffer[ triOffset + 1 ];

	float4 n3 = normalBuffer[ triOffset + 2 ];

	float4 normal = n1 * interploted.x + n2 * interploted.y + n3 * interploted.z;

	d_normalize( &normal );



	//update the normal buffer

	destNormalBuffer[tid] = normal;

	destNormalBuffer[tid].w = matIndex;



	//the density for the pixel

	float density = rayDir[tid].w;



	if( matprop.x > -0.5f )

	{

		//load the texture coordinate

		float2 t1 = texCoordinateBuffer[ triOffset ];

		float2 t2 = texCoordinateBuffer[ triOffset + 1 ];

		float2 t3 = texCoordinateBuffer[ triOffset + 2 ];

		float2 texCoord = interploted.x * t1 + interploted.y * t2 + interploted.z * t3;

		texCoord = texCoord - floor( texCoord );

		if( texCoord.x < 0.0f ) texCoord.x += 1.0f;

		if( texCoord.y < 0.0f ) texCoord.y += 1.0f;



		//load the texture

		float4* imgData = customTexture + textureOffset[(int)matprop.x];



		int x = imgData[0].y * texCoord.x ;

		int y = imgData[0].z * texCoord.y ;



		int texOffset = y * imgData[0].y + x + 1;



		diffuse = diffuse * (*(imgData + texOffset)) ;

	}



	//initialize the image buffer

	color = ambient;



	//shade the pixels

	for( int i = 0 ; i < 2 ; i++ )

	{

		if( lightBuffer[i].w < 0.01f )

			continue;



		//the light direction

		float4 lightDir = intersected[tid] - lightBuffer[i];



		//check if the point is in the shadow

		float shadowLen = 0.98f * d_length(lightDir);

		d_normalize( &lightDir );



		//the dot product

		float	dotProduct = d_dot( lightDir , normal );



		if( dotProduct > 0.0f )

			continue;



		{

			float4 shadowFactor = kernelTraverseRay( kdTree , indexMap , offsetIndexBuffer , vertexBuffer , lightBuffer[i] , lightDir , shadowLen );

			if( shadowFactor.w >= 0.0f )

				continue;

		}



		//the light density

		float lightDensity = d_clamp( -1.0f * dotProduct ) * lightBuffer[i].w;



		//load the density of current pixel

		color += diffuse * lightDensity ;



		//add specular if possible

		if( specular.w > 0 )

		{

			//reflect direction

			float4 reflectDir = d_reflect( lightDir , normal );

			d_normalize( &reflectDir );



			//get the dot product

			float d = d_clamp(-d_dot( reflectDir , rayDir[tid] ));



			if( d > 0 )

				color += pow( d , specular.w ) * specular;

		}

	}



	int offset = offsetBuffer[tid];

	imageBuffer[offset] = d_saturate( imageBuffer[offset] + d_saturate( color * density ) );

}



//generate next level rays

__global__ void kernelGenerateNextLevelRays(	float4* materialInfo , 

												float4*	intersected , 

												float4*	backNormalBuffer , 

												float4*	rayOri ,

												float4*	rayDir ,

												int		rayNumber ,

												float4*	destRayOri , 

												float4*	destRayDir ,

												int*	markedBuffer )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= rayNumber )

		return;



	//set marked buffer zero

	markedBuffer[tid] = 0;



	//load the intersected point

	float4 intersectedPoint = intersected[tid];



	//get the intersected triangle index

	int triIndex = (int)intersectedPoint.w;

	if( triIndex < 0 )

		return;



	//load the normal

	float4 normal = backNormalBuffer[tid];



	//get the material index

	int matIndex = (int)normal.w;



	//get the material

	float4 matInfo = materialInfo[4*matIndex+3];



	//load the ray direction

	float4 ori = rayOri[tid];

	float4 dir = rayDir[tid];



	//if there is reflection , mark result as true

	if( matInfo.y > 0 )

	{

		float4 reflectDir = d_reflect( dir , normal );

		d_normalize( &reflectDir );

		reflectDir.w = dir.w * matInfo.y;



		destRayDir[tid] = reflectDir;

		destRayOri[tid] = intersectedPoint + reflectDir * 0.1f;

		destRayOri[tid].w = ori.w;



		markedBuffer[tid] = 1;

	}else if( matInfo.z > 0 )

	{

		float4 refractDir = d_refract( dir , normal , 1.0f / matInfo.w );

		d_normalize( &refractDir );

		refractDir.w = dir.w * matInfo.z;



		destRayDir[tid] = refractDir;

		destRayOri[tid] = intersectedPoint + refractDir * 0.02f;

		destRayOri[tid].w = ori.w;



		markedBuffer[tid] = 1;

	}

}



//copy new rays

__global__ void kernelCopyNewRays(	float4* srcRayOri , 

									float4* srcRayDir ,

									int*	scanResult , 

									int		rayNumber , 

									float4* destRayOri ,

									float4* destRayDir ,

									int*	offsets )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= rayNumber )

		return;



	//load the offset

	int offset = scanResult[tid];



	if( offset != scanResult[tid+1] )

	{

		//set the result

		destRayOri[offset] = srcRayOri[tid];

		destRayDir[offset] = srcRayDir[tid];

		offsets[offset] = (int)srcRayOri[tid].w;

	}

}



//Do scan on GPU

__global__ void kernelScan( int* data , int number , int oBlockRes , int* blockRes )

{

	//the shared memory

	__shared__ int sharedMem[512];



	//get the thread id

	int ltid = threadIdx.x;

	int gtid = ltid + blockDim.x * blockIdx.x;



	//the block sum

	int blocksum = 0;



	//zero the rest of the memory

	if( 2 * gtid >= number )

	{

		data[ 2 * gtid ] = 0;

		data[ 2 * gtid + 1 ] = 0;

	}else if( 2 * gtid == number - 1 )

		data[ 2 * gtid + 1 ] = 0;



	//Load the data into the shared memory

	sharedMem[2*ltid] = data[2*gtid];

	sharedMem[2*ltid+1] = data[2*gtid+1];



	//the offset

	int offset = 1;



	for( int d = 256 ; d > 1 ; d >>= 1 )

	{

		//sync the threads in a group

		__syncthreads();



		if( ltid < d )

		{

			int ai = offset * ( 2 * ltid + 1 ) - 1;

			int bi = ai + offset;



			sharedMem[bi] += sharedMem[ai];

		}



		offset *= 2;

	}



	//the block sum

	blocksum = sharedMem[511] + sharedMem[255];



	//clear the last element

	if( ltid == 0 )

	{

		sharedMem[511] = sharedMem[255];

		sharedMem[255] = 0;

	}



	for( int d = 2 ; d < 512 ; d *= 2 )

	{

		__syncthreads();



		offset >>= 1;



		if( ltid < d )

		{

			int ai = offset * ( 2 * ltid + 1 ) - 1 ;

			int bi = ai + offset ;



			int t = sharedMem[ai];

			sharedMem[ai] = sharedMem[bi];

			sharedMem[bi] += t;

		}

	}



	__syncthreads();



	data[ 2 * gtid ] = sharedMem[ 2 * ltid ];

	data[ 2 * gtid + 1 ] = sharedMem[ 2 * ltid + 1 ];



	//Output Block Result

	if( oBlockRes > 0 )

	{

		if( ltid == 0 )

		{

			//copy the result

			blockRes[blockIdx.x] = blocksum;

		}

	}

}



//Add the block result to the segmented scan result

__global__ void kernelUniformAdd( int* data , int* blockResult )

{

	//get the thread id

	int ltid = threadIdx.x;

	int gtid = ltid + blockDim.x * blockIdx.x;

	

	//add the result

	data[gtid] += blockResult[gtid/512];

}



//clear the noise of the image

__global__ void kernelClearNoise(	float4* imgData , 

									int		width ,

									int		height ,

									float4* targetData )

{

	//get the thread id

	int tid = threadIdx.x + blockIdx.x * blockDim.x;



	//limit the thread id

	if( tid >= width * height )

		return;



	//threshold

	float threshold = 0.4f;



	//the difference

	int difference = 0;



	//current index

	int	currentIndex = tid;

	int leftIndex = tid - 1;

	int rightIndex = tid + 1;

	int upIndex = tid - width ;

	int downIndex = tid + width ;



	//the coordinate

	int i = tid % width;

	int j = tid / width;



	//current color

	float4 color = imgData[currentIndex];



	float4 sum = make_float4( 0 , 0 , 0 , 0 );

	if( i > 0 )

	{

		if( d_length( color - imgData[leftIndex] ) > threshold )

			difference++;

		sum += imgData[leftIndex];

	}

	if( i < width - 1 )

	{

		if( d_length( color - imgData[rightIndex] ) > threshold )

			difference++;

		sum += imgData[rightIndex];

	}

	if( j > 0 )

	{

		if( d_length( color - imgData[upIndex] ) > threshold )

			difference++;

		sum += imgData[upIndex];

	}

	if( j < height - 1 )

	{

		if( d_length( color - imgData[downIndex] ) > threshold )

			difference++;

		sum += imgData[downIndex];

	}



	if( difference >= 2 )

		color = sum * 0.25f;



	targetData[tid] = color;

}



////////////////////////////////////////////////////////////////////////////////////////////////////



//initialize buffer

extern "C" void cudaInitBuffer(	float4* buffer , 

								int*	markedBuffer , 

								int		pixelNum )

{

	//the block number

	int threadNum = 256;

	int blockNum = ( pixelNum + threadNum - 1 ) / threadNum;



	//call the kenrel

	kernelInitBuffer<<<blockNum,threadNum>>>( buffer , markedBuffer , pixelNum );

}



//generate primary ray intersected result

extern "C" void cudaGenerateIntersectedPoint(	float4* rayOri , 

												float4* rayDir ,

												float4*	vertexBuffer ,

												int		rayNum ,

												int*	index , 

												float4*	result )

{

	//the block number

	int threadNum = 256;

	int blockNum = ( rayNum + threadNum - 1 ) / threadNum;



	//call the kernel

	kernelGenerateIntersectedPoint<<<blockNum , threadNum>>>( rayOri , rayDir , vertexBuffer , rayNum , index , result );

}



//Generate primary rays

extern "C" void cudaGeneratePrimaryRays(	float4	viewInfo ,	

											float*	invViewMatrix ,

											float4*	rayOri , 

											float4* rayDir )

{

	//get the number of data

	int rayNum = (int)( viewInfo.x * viewInfo.y );



	//the block number

	int threadNum = 256;

	int blockNum = ( rayNum + threadNum - 1 ) / threadNum;



	//call the kernel

	kernelGeneratePrimaryRays<<<blockNum , threadNum>>>( viewInfo , invViewMatrix , rayOri , rayDir );

}



//get intersected point

extern "C" void cudaGetIntersectedPoint(	float4*	rayOri , 

											float4*	rayDir ,

											float4*	kdTree ,

											int*	indexMap ,

											int*	offsetBuffer ,

											float4*	vertexBuffer ,

											int		rayNumber , 

											float4*	result )

{

	//the block and thread number

	int threadNum = 256;

	int blockNum = ( rayNumber + threadNum - 1 ) / threadNum ;



	//call the kernel

	kernelGetIntersectedPoint<<<blockNum , threadNum>>>( rayOri , rayDir , kdTree , indexMap , offsetBuffer , vertexBuffer , rayNumber , result );

}



//do pixel shader

extern "C" void cudaPixelShader(	float4*	interseced , 

									float4*	vertexBuffer , 

									float4*	normalBuffer ,

									float2*	texCoordinateBuffer , 

									float4*	kdTree ,

									int*	indexMap ,

									int*	offsetIndexBuffer ,

									float4*	lightBuffer ,

									int*	attributeBuffer , 

									float4*	materialBuffer ,

									int*	textureOffset , 

									float4*	customTexture ,

									int		pixelNum , 

									float4*	rayDir ,

									int*	offsetBuffer ,

									float4*	destNormalBuffer , 

									float4*	imageBuffer )

{

	//the block and thread number

	int threadNum = 256;

	int blockNum = ( pixelNum + threadNum - 1 ) / threadNum ;



	//call the kernel

	kernelPixelShader<<<blockNum , threadNum>>>(	interseced , vertexBuffer , normalBuffer , texCoordinateBuffer , 

													kdTree , indexMap , offsetIndexBuffer , lightBuffer , attributeBuffer , materialBuffer , 

													textureOffset , customTexture , pixelNum , rayDir , offsetBuffer , destNormalBuffer , imageBuffer );

}



//generate next level rays

extern "C" void cudaGenerateNextLevelRays(	float4* materialInfo , 

											float4*	intersected , 

											float4*	backNormalBuffer , 

											float4*	rayOri ,

											float4*	rayDir ,

											int		rayNumber ,

											float4*	destRayOri , 

											float4*	destRayDir ,

											int*	markedBuffer )

{

	//the block and thread number

	int threadNum = 256;

	int blockNum = ( rayNumber + threadNum - 1 ) / threadNum ;



	//call the kernel

	kernelGenerateNextLevelRays<<<blockNum , threadNum>>>(	materialInfo , intersected , backNormalBuffer , rayOri , rayDir , 

															rayNumber , destRayOri , destRayDir , markedBuffer );

}



//do scan on gpu

extern "C" void cudaScan( int* data , int num , int level )

{

/*	//allocate the number of data

	int* cpuData = new int[num];



	//pass the data from gpu to cpu

	cudaMemcpy( cpuData , data , sizeof( int ) * ( num - 1 ) , cudaMemcpyDeviceToHost );



	int last = 0;

	for( int i = 0 ; i < num ; i++ )

	{

		int oldLast = last;

		last += cpuData[i];

		cpuData[i] = oldLast;

	}



	//pass the data back from cpu to gpu

	cudaMemcpy( data , cpuData , sizeof( int ) * num , cudaMemcpyHostToDevice );



	//delete the data

	delete[] cpuData;*/



	//the dimension of the kernel

	dim3 threads( 256 );

	dim3 blocks( ( num + 511 ) / 512 );



	//call the kernel

	kernelScan<<<blocks , threads>>>( data , num , 1 , g_ScanSum[level] );



	//scan the block Result

	if( num <= 262144 )

		kernelScan<<<1 , threads>>>( g_ScanSum[level] , blocks.x , -1 , data );

	else

		cudaScan( g_ScanSum[level] , blocks.x , level + 1 );



	//add the offset

	threads.x = 512;

	kernelUniformAdd<<< blocks , threads >>> ( data , g_ScanSum[level] );

}



//copy new rays

extern "C" void cudaCopyNewRays(	float4* srcRayOri , 

									float4* srcRayDir ,

									int*	scanResult , 

									int		rayNumber , 

									float4* destRayOri ,

									float4* destRayDir ,

									int*	offsets )

{

	//the block and thread number

	int threadNum = 256;

	int blockNum = ( rayNumber + threadNum - 1 ) / threadNum ;



	//call the kernel

	kernelCopyNewRays<<<blockNum , threadNum>>>( srcRayOri , srcRayDir , scanResult , rayNumber , destRayOri , destRayDir , offsets );

}



//clear the noise of the image

extern "C" void cudaClearNoise(	float4* imgData , 

								int		width ,

								int		height ,

								float4* targetData )

{

	//the block and thread number

	int threadNum = 256;

	int blockNum = ( width * height + 255 ) / 256;



	//call the kernel

	kernelClearNoise<<<blockNum , threadNum>>>( imgData , width , height , targetData );

}
	.text
	.file	"RayTracer_Kernel.hip"
	.globl	_Z31__device_stub__kernelInitBufferP15HIP_vector_typeIfLj4EEPii # -- Begin function _Z31__device_stub__kernelInitBufferP15HIP_vector_typeIfLj4EEPii
	.type	_Z31__device_stub__kernelInitBufferP15HIP_vector_typeIfLj4EEPii,@function
_Z31__device_stub__kernelInitBufferP15HIP_vector_typeIfLj4EEPii: # @_Z31__device_stub__kernelInitBufferP15HIP_vector_typeIfLj4EEPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__kernelInitBufferP15HIP_vector_typeIfLj4EEPii, .Lfunc_end0-_Z31__device_stub__kernelInitBufferP15HIP_vector_typeIfLj4EEPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z45__device_stub__kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_ # -- Begin function _Z45__device_stub__kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_
	.type	_Z45__device_stub__kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_,@function
_Z45__device_stub__kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_: # @_Z45__device_stub__kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z45__device_stub__kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_, .Lfunc_end1-_Z45__device_stub__kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z40__device_stub__kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_ # -- Begin function _Z40__device_stub__kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_
	.type	_Z40__device_stub__kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_,@function
_Z40__device_stub__kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_: # @_Z40__device_stub__kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movsd	%xmm0, (%rax)
	movsd	%xmm1, 8(%rax)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z40__device_stub__kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_, .Lfunc_end2-_Z40__device_stub__kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_
	.cfi_endproc
                                        # -- End function
	.globl	_Z40__device_stub__kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_ # -- Begin function _Z40__device_stub__kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_
	.type	_Z40__device_stub__kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_,@function
_Z40__device_stub__kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_: # @_Z40__device_stub__kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z40__device_stub__kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_, .Lfunc_end3-_Z40__device_stub__kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_ # -- Begin function _Z32__device_stub__kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_
	.type	_Z32__device_stub__kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_,@function
_Z32__device_stub__kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_: # @_Z32__device_stub__kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$240, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$256, %rsp                      # imm = 0x100
	.cfi_adjust_cfa_offset -256
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z32__device_stub__kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_, .Lfunc_end4-_Z32__device_stub__kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z42__device_stub__kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi # -- Begin function _Z42__device_stub__kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi
	.type	_Z42__device_stub__kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi,@function
_Z42__device_stub__kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi: # @_Z42__device_stub__kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z42__device_stub__kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi, .Lfunc_end5-_Z42__device_stub__kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_ # -- Begin function _Z32__device_stub__kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_
	.type	_Z32__device_stub__kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_,@function
_Z32__device_stub__kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_: # @_Z32__device_stub__kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z32__device_stub__kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_, .Lfunc_end6-_Z32__device_stub__kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__kernelScanPiiiS_ # -- Begin function _Z25__device_stub__kernelScanPiiiS_
	.type	_Z25__device_stub__kernelScanPiiiS_,@function
_Z25__device_stub__kernelScanPiiiS_:    # @_Z25__device_stub__kernelScanPiiiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernelScanPiiiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z25__device_stub__kernelScanPiiiS_, .Lfunc_end7-_Z25__device_stub__kernelScanPiiiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__kernelUniformAddPiS_ # -- Begin function _Z31__device_stub__kernelUniformAddPiS_
	.type	_Z31__device_stub__kernelUniformAddPiS_,@function
_Z31__device_stub__kernelUniformAddPiS_: # @_Z31__device_stub__kernelUniformAddPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernelUniformAddPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z31__device_stub__kernelUniformAddPiS_, .Lfunc_end8-_Z31__device_stub__kernelUniformAddPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_ # -- Begin function _Z31__device_stub__kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_
	.type	_Z31__device_stub__kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_,@function
_Z31__device_stub__kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_: # @_Z31__device_stub__kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z31__device_stub__kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_, .Lfunc_end9-_Z31__device_stub__kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_
	.cfi_endproc
                                        # -- End function
	.globl	cudaInitBuffer                  # -- Begin function cudaInitBuffer
	.type	cudaInitBuffer,@function
cudaInitBuffer:                         # @cudaInitBuffer
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%edx, %ebx
	movq	%rsi, %r14
	movq	%rdi, %r15
	leal	255(%rbx), %eax
	leal	510(%rbx), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$8, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB10_2
# %bb.1:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB10_2:
	.cfi_def_cfa_offset 32
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z31__device_stub__kernelInitBufferP15HIP_vector_typeIfLj4EEPii # TAILCALL
.Lfunc_end10:
	.size	cudaInitBuffer, .Lfunc_end10-cudaInitBuffer
	.cfi_endproc
                                        # -- End function
	.globl	cudaGenerateIntersectedPoint    # -- Begin function cudaGenerateIntersectedPoint
	.type	cudaGenerateIntersectedPoint,@function
cudaGenerateIntersectedPoint:           # @cudaGenerateIntersectedPoint
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movl	%ecx, %r15d
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbp
	leal	255(%r15), %eax
	leal	510(%r15), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$8, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB11_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB11_2:
	.cfi_def_cfa_offset 64
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movl	%r15d, %ecx
	movq	%r14, %r8
	movq	%rbx, %r9
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z45__device_stub__kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_ # TAILCALL
.Lfunc_end11:
	.size	cudaGenerateIntersectedPoint, .Lfunc_end11-cudaGenerateIntersectedPoint
	.cfi_endproc
                                        # -- End function
	.globl	cudaGeneratePrimaryRays         # -- Begin function cudaGeneratePrimaryRays
	.type	cudaGeneratePrimaryRays,@function
cudaGeneratePrimaryRays:                # @cudaGeneratePrimaryRays
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	movsd	%xmm1, 8(%rsp)                  # 8-byte Spill
	movq	%xmm0, (%rsp)                   # 8-byte Folded Spill
	movq	%xmm0, %rax
	movd	%eax, %xmm0
	shrq	$32, %rax
	movd	%eax, %xmm1
	mulss	%xmm0, %xmm1
	cvttss2si	%xmm1, %edi
	leal	255(%rdi), %eax
	addl	$510, %edi                      # imm = 0x1FE
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$8, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB12_2
# %bb.1:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB12_2:
	.cfi_def_cfa_offset 48
	movsd	(%rsp), %xmm0                   # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	8(%rsp), %xmm1                  # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z40__device_stub__kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_ # TAILCALL
.Lfunc_end12:
	.size	cudaGeneratePrimaryRays, .Lfunc_end12-cudaGeneratePrimaryRays
	.cfi_endproc
                                        # -- End function
	.globl	cudaGetIntersectedPoint         # -- Begin function cudaGetIntersectedPoint
	.type	cudaGetIntersectedPoint,@function
cudaGetIntersectedPoint:                # @cudaGetIntersectedPoint
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbp
	movl	64(%rsp), %edi
	leal	255(%rdi), %eax
	addl	$510, %edi                      # imm = 0x1FE
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$8, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB13_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB13_2:
	.cfi_def_cfa_offset 64
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movq	%r15, %rcx
	movq	%r14, %r8
	movq	%rbx, %r9
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z40__device_stub__kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_ # TAILCALL
.Lfunc_end13:
	.size	cudaGetIntersectedPoint, .Lfunc_end13-cudaGetIntersectedPoint
	.cfi_endproc
                                        # -- End function
	.globl	cudaPixelShader                 # -- Begin function cudaPixelShader
	.type	cudaPixelShader,@function
cudaPixelShader:                        # @cudaPixelShader
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbp
	movl	112(%rsp), %edi
	leal	255(%rdi), %eax
	addl	$510, %edi                      # imm = 0x1FE
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$8, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB14_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB14_2:
	.cfi_def_cfa_offset 64
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movq	%r15, %rcx
	movq	%r14, %r8
	movq	%rbx, %r9
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z32__device_stub__kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_ # TAILCALL
.Lfunc_end14:
	.size	cudaPixelShader, .Lfunc_end14-cudaPixelShader
	.cfi_endproc
                                        # -- End function
	.globl	cudaGenerateNextLevelRays       # -- Begin function cudaGenerateNextLevelRays
	.type	cudaGenerateNextLevelRays,@function
cudaGenerateNextLevelRays:              # @cudaGenerateNextLevelRays
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbp
	leal	255(%rbx), %eax
	leal	510(%rbx), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$8, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB15_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB15_2:
	.cfi_def_cfa_offset 64
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movq	%r15, %rcx
	movq	%r14, %r8
	movl	%ebx, %r9d
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z42__device_stub__kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi # TAILCALL
.Lfunc_end15:
	.size	cudaGenerateNextLevelRays, .Lfunc_end15-cudaGenerateNextLevelRays
	.cfi_endproc
                                        # -- End function
	.globl	cudaScan                        # -- Begin function cudaScan
	.type	cudaScan,@function
cudaScan:                               # @cudaScan
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %r14d
	movl	%esi, %ebp
	movq	%rdi, %rbx
	movabsq	$4294967552, %r15               # imm = 0x100000100
	leal	511(%rbp), %eax
	leal	1022(%rbp), %r13d
	testl	%eax, %eax
	cmovnsl	%eax, %r13d
	sarl	$9, %r13d
	leaq	(%r15,%r13), %r12
	addq	$-256, %r12
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB16_2
# %bb.1:
	movslq	%r14d, %rax
	movq	g_ScanSum(,%rax,8), %rcx
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movl	$1, %edx
	callq	_Z25__device_stub__kernelScanPiiiS_
.LBB16_2:
	cmpl	$262144, %ebp                   # imm = 0x40000
	jg	.LBB16_5
# %bb.3:
	leaq	-255(%r15), %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB16_6
# %bb.4:
	movslq	%r14d, %rax
	movq	g_ScanSum(,%rax,8), %rdi
	movl	%r13d, %esi
	movl	$-1, %edx
	movq	%rbx, %rcx
	callq	_Z25__device_stub__kernelScanPiiiS_
	jmp	.LBB16_6
.LBB16_5:
	movslq	%r14d, %rax
	movq	g_ScanSum(,%rax,8), %rdi
	leal	1(%r14), %edx
	movl	%r13d, %esi
	callq	cudaScan
.LBB16_6:
	addq	$256, %r15                      # imm = 0x100
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB16_8
# %bb.7:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB16_8:
	.cfi_def_cfa_offset 64
	movslq	%r14d, %rax
	movq	g_ScanSum(,%rax,8), %rsi
	movq	%rbx, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z31__device_stub__kernelUniformAddPiS_ # TAILCALL
.Lfunc_end16:
	.size	cudaScan, .Lfunc_end16-cudaScan
	.cfi_endproc
                                        # -- End function
	.globl	cudaCopyNewRays                 # -- Begin function cudaCopyNewRays
	.type	cudaCopyNewRays,@function
cudaCopyNewRays:                        # @cudaCopyNewRays
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movl	%ecx, %r15d
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbp
	leal	255(%r15), %eax
	leal	510(%r15), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$8, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB17_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB17_2:
	.cfi_def_cfa_offset 64
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movl	%r15d, %ecx
	movq	%r14, %r8
	movq	%rbx, %r9
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z32__device_stub__kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_ # TAILCALL
.Lfunc_end17:
	.size	cudaCopyNewRays, .Lfunc_end17-cudaCopyNewRays
	.cfi_endproc
                                        # -- End function
	.globl	cudaClearNoise                  # -- Begin function cudaClearNoise
	.type	cudaClearNoise,@function
cudaClearNoise:                         # @cudaClearNoise
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %rbx
	movl	%edx, %ebp
	movl	%esi, %r14d
	movq	%rdi, %r15
	movl	%edx, %edi
	imull	%esi, %edi
	leal	255(%rdi), %eax
	addl	$510, %edi                      # imm = 0x1FE
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$8, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB18_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB18_2:
	.cfi_def_cfa_offset 48
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%ebp, %edx
	movq	%rbx, %rcx
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z31__device_stub__kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_ # TAILCALL
.Lfunc_end18:
	.size	cudaClearNoise, .Lfunc_end18-cudaClearNoise
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB19_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB19_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10kernelScanPiiiS_, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16kernelUniformAddPiS_, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end19:
	.size	__hip_module_ctor, .Lfunc_end19-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB20_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB20_2:
	retq
.Lfunc_end20:
	.size	__hip_module_dtor, .Lfunc_end20-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	g_ScanSum,@object               # @g_ScanSum
	.bss
	.globl	g_ScanSum
	.p2align	4, 0x0
g_ScanSum:
	.zero	16
	.size	g_ScanSum, 16

	.type	_Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii,@object # @_Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii
	.section	.rodata,"a",@progbits
	.globl	_Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii
	.p2align	3, 0x0
_Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii:
	.quad	_Z31__device_stub__kernelInitBufferP15HIP_vector_typeIfLj4EEPii
	.size	_Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii, 8

	.type	_Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_,@object # @_Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_
	.globl	_Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_
	.p2align	3, 0x0
_Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_:
	.quad	_Z45__device_stub__kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_
	.size	_Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_, 8

	.type	_Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_,@object # @_Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_
	.globl	_Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_
	.p2align	3, 0x0
_Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_:
	.quad	_Z40__device_stub__kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_
	.size	_Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_, 8

	.type	_Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_,@object # @_Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_
	.globl	_Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_
	.p2align	3, 0x0
_Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_:
	.quad	_Z40__device_stub__kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_
	.size	_Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_, 8

	.type	_Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_,@object # @_Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_
	.globl	_Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_
	.p2align	3, 0x0
_Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_:
	.quad	_Z32__device_stub__kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_
	.size	_Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_, 8

	.type	_Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi,@object # @_Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi
	.globl	_Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi
	.p2align	3, 0x0
_Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi:
	.quad	_Z42__device_stub__kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi
	.size	_Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi, 8

	.type	_Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_,@object # @_Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_
	.globl	_Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_
	.p2align	3, 0x0
_Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_:
	.quad	_Z32__device_stub__kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_
	.size	_Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_, 8

	.type	_Z10kernelScanPiiiS_,@object    # @_Z10kernelScanPiiiS_
	.globl	_Z10kernelScanPiiiS_
	.p2align	3, 0x0
_Z10kernelScanPiiiS_:
	.quad	_Z25__device_stub__kernelScanPiiiS_
	.size	_Z10kernelScanPiiiS_, 8

	.type	_Z16kernelUniformAddPiS_,@object # @_Z16kernelUniformAddPiS_
	.globl	_Z16kernelUniformAddPiS_
	.p2align	3, 0x0
_Z16kernelUniformAddPiS_:
	.quad	_Z31__device_stub__kernelUniformAddPiS_
	.size	_Z16kernelUniformAddPiS_, 8

	.type	_Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_,@object # @_Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_
	.globl	_Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_
	.p2align	3, 0x0
_Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_:
	.quad	_Z31__device_stub__kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_
	.size	_Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii"
	.size	.L__unnamed_1, 49

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_"
	.size	.L__unnamed_2, 72

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_"
	.size	.L__unnamed_3, 63

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_"
	.size	.L__unnamed_4, 73

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_"
	.size	.L__unnamed_5, 99

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi"
	.size	.L__unnamed_6, 78

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_"
	.size	.L__unnamed_7, 62

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z10kernelScanPiiiS_"
	.size	.L__unnamed_8, 21

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z16kernelUniformAddPiS_"
	.size	.L__unnamed_9, 25

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"_Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_"
	.size	.L__unnamed_10, 51

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__kernelInitBufferP15HIP_vector_typeIfLj4EEPii
	.addrsig_sym _Z45__device_stub__kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_
	.addrsig_sym _Z40__device_stub__kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_
	.addrsig_sym _Z40__device_stub__kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_
	.addrsig_sym _Z32__device_stub__kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_
	.addrsig_sym _Z42__device_stub__kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi
	.addrsig_sym _Z32__device_stub__kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_
	.addrsig_sym _Z25__device_stub__kernelScanPiiiS_
	.addrsig_sym _Z31__device_stub__kernelUniformAddPiS_
	.addrsig_sym _Z31__device_stub__kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii
	.addrsig_sym _Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_
	.addrsig_sym _Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_
	.addrsig_sym _Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_
	.addrsig_sym _Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_
	.addrsig_sym _Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi
	.addrsig_sym _Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_
	.addrsig_sym _Z10kernelScanPiiiS_
	.addrsig_sym _Z16kernelUniformAddPiS_
	.addrsig_sym _Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii ; -- Begin function _Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii
	.globl	_Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii
	.p2align	8
	.type	_Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii,@function
_Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii: ; @_Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 4, v[1:2]
	v_lshlrev_b64 v[9:10], 2, v[1:2]
	v_mov_b32_e32 v4, v3
	v_mov_b32_e32 v5, v3
	v_mov_b32_e32 v6, v3
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	v_add_co_u32 v9, vcc_lo, s2, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
	global_store_b128 v[7:8], v[3:6], off
	global_store_b32 v[9:10], v1, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii, .Lfunc_end0-_Z16kernelInitBufferP15HIP_vector_typeIfLj4EEPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_ ; -- Begin function _Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_
	.globl	_Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_
	.p2align	8
	.type	_Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_,@function
_Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_: ; @_Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x20
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_lshlrev_b64 v[16:17], 4, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	global_load_b32 v18, v[3:4], off
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v3, v18, 1, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 4, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v16
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	s_clause 0x2
	global_load_b96 v[7:9], v[3:4], off
	global_load_b96 v[10:12], v[3:4], off offset:16
	global_load_b96 v[13:15], v[3:4], off offset:32
	s_mov_b32 s0, -1.0
	global_load_b128 v[0:3], v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, s2, v16
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v17, vcc_lo
	global_load_b128 v[3:6], v[3:4], off
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v6, v10, v7 :: v_dual_sub_f32 v11, v11, v8
	v_dual_sub_f32 v10, v15, v9 :: v_dual_sub_f32 v13, v13, v7
	v_sub_f32_e32 v12, v12, v9
	v_dual_sub_f32 v14, v14, v8 :: v_dual_sub_f32 v7, v0, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v15, v6, v10 :: v_dual_sub_f32 v8, v1, v8
	v_sub_f32_e32 v9, v2, v9
	v_mul_f32_e32 v19, v12, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v12, v12, v13, -v15
	v_mul_f32_e32 v13, v11, v13
	v_fma_f32 v10, v11, v10, -v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v8, v12, v8
	v_mul_f32_e32 v11, v12, v4
	v_fma_f32 v6, v6, v14, -v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v8, v7, v10 :: v_dual_fmac_f32 v11, v10, v3
	v_fmac_f32_e32 v8, v6, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v6, v5
	v_div_scale_f32 v6, null, v11, v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v6, v7, 1.0
	v_fmac_f32_e32 v7, v9, v7
	v_div_scale_f32 v10, vcc_lo, v8, v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, v10, v7
	v_fma_f32 v12, -v6, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v12, v7
	v_fma_f32 v6, -v6, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v6, v6, v7, v9
	v_mov_b32_e32 v9, s0
	v_div_fixup_f32 v8, v6, v11, v8
	v_add_co_u32 v6, vcc_lo, s6, v16
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_xor_b32_e32 v10, 0x80000000, v8
	v_cmp_nge_f32_e32 vcc_lo, 0, v8
	v_fma_f32 v0, -v3, v8, v0
	v_fma_f32 v1, -v4, v8, v1
	v_fma_f32 v2, -v5, v8, v2
	v_cvt_f32_i32_e32 v4, v18
	v_cndmask_b32_e32 v3, v10, v9, vcc_lo
	s_clause 0x1
	global_store_b128 v[6:7], v[0:3], off
	global_store_b32 v[6:7], v4, off offset:12
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_, .Lfunc_end1-_Z30kernelGenerateIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_iPiS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 572
; NumSgprs: 18
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_ ; -- Begin function _Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_
	.globl	_Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_
	.p2align	8
	.type	_Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_,@function
_Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_: ; @_Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b32 s4, s[0:1], 0x34
	s_waitcnt lgkmcnt(0)
	v_cvt_i32_f32_e32 v3, s2
	v_cvt_i32_f32_e32 v4, s3
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_mul_lo_u32 v0, v4, v3
	v_readfirstlane_b32 s8, v3
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_lt_i32_e64 v1, v0
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	v_cvt_f32_i32_e32 v6, v1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	s_load_b64 s[10:11], s[4:5], 0x30
	s_load_b32 s9, s[4:5], 0x38
	v_lshlrev_b64 v[12:13], 4, v[1:2]
	v_dual_mov_b32 v0, 0 :: v_dual_add_nc_u32 v15, v1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v12
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_xor_b32_e32 v15, v15, v2
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v3, s10 :: v_dual_mov_b32 v4, s11
	v_mov_b32_e32 v5, s9
	global_store_b128 v[7:8], v[3:6], off
	s_clause 0x2
	global_load_b96 v[3:5], v0, s[4:5] offset:16
	global_load_b96 v[6:8], v0, s[4:5]
	global_load_b96 v[9:11], v0, s[4:5] offset:32
	s_ashr_i32 s4, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_i32 s5, s8, s4
	v_xor_b32_e32 v2, s4, v2
	s_xor_b32 s5, s5, s4
	v_cvt_f32_u32_e32 v0, s5
	s_sub_i32 s6, 0, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v14, s6, v0
	v_mul_hi_u32 v14, v0, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v14
	v_mul_hi_u32 v0, v15, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v14, v0, s5
	v_sub_nc_u32_e32 v14, v15, v14
	v_add_nc_u32_e32 v15, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v16, s5, v14
	v_cmp_le_u32_e32 vcc_lo, s5, v14
	v_cndmask_b32_e32 v0, v0, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v14, v14, v16, vcc_lo
	v_add_nc_u32_e32 v15, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e32 vcc_lo, s5, v14
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x20
	v_cndmask_b32_e32 v0, v0, v15, vcc_lo
	v_xor_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v2
	v_mul_lo_u32 v2, v0, s8
	v_cvt_f32_u32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v0, v0, v0
	v_sub_nc_u32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, v1
	v_add_f32_e32 v1, v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v2, null, s2, s2, v1
	v_div_scale_f32 v16, vcc_lo, v1, s2, v1
	v_rcp_f32_e32 v14, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v15, -v2, v14, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, v15, v14
	v_mul_f32_e32 v15, v16, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v17, -v2, v15, v16
	v_fmac_f32_e32 v15, v17, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, -v2, v15, v16
	v_div_fmas_f32 v2, v2, v14, v15
	v_div_scale_f32 v14, null, s3, s3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v1, v2, s2, v1
	v_rcp_f32_e32 v16, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, -1.0, v1
	s_waitcnt lgkmcnt(0)
	v_div_scale_f32 v2, null, s4, s4, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v18, -v14, v16, 1.0
	v_div_scale_f32 v19, vcc_lo, v1, s4, v1
	v_rcp_f32_e32 v15, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v18, v16
	s_waitcnt_depctr 0xfff
	v_fma_f32 v17, -v2, v15, 1.0
	v_fmac_f32_e32 v15, v17, v15
	v_div_scale_f32 v17, s2, v0, s3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v18, v19, v15
	v_mul_f32_e32 v20, v17, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v21, -v2, v18, v19
	v_fma_f32 v22, -v14, v20, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v18, v21, v15
	v_fmac_f32_e32 v20, v22, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v2, -v2, v18, v19
	v_fma_f32 v14, -v14, v20, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v2, v2, v15, v18
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f32 v14, v14, v16, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v1, v2, s4, v1
	v_div_fixup_f32 v0, v14, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, -1.0, v0
	v_div_scale_f32 v14, null, s5, s5, -v0
	v_div_scale_f32 v17, vcc_lo, -v0, s5, -v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v15, v14
	s_waitcnt_depctr 0xfff
	v_fma_f32 v16, -v14, v15, 1.0
	v_fmac_f32_e32 v15, v16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v17, v15
	v_fma_f32 v18, -v14, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v18, v15
	v_fma_f32 v14, -v14, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v14, v14, v15, v16
	v_div_fixup_f32 v0, v14, s5, -v0
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v2, v0, v4
	v_mul_f32_e32 v3, v0, v3
	v_mul_f32_e32 v0, v0, v5
	s_waitcnt vmcnt(1)
	v_fmac_f32_e32 v2, v1, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v3, v1, v6
	v_fmac_f32_e32 v0, v1, v8
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v2, v10, v2 :: v_dual_add_f32 v1, v9, v3
	v_dual_add_f32 v6, v11, v0 :: v_dual_mul_f32 v3, v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v1, v1
	v_fmac_f32_e32 v3, v6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v0, 0x4f800000, v3
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v3
	v_cndmask_b32_e32 v0, v3, v0, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v3, v0
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v4, -1, v3
	v_add_nc_u32_e32 v5, 1, v3
	v_fma_f32 v7, -v4, v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v8, -v5, v3, v0
	v_cmp_ge_f32_e64 s2, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, v3, v4, s2
	v_cmp_lt_f32_e64 s2, 0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v3, v5, s2
	v_mul_f32_e32 v4, 0x37800000, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v0, 0x260
	v_cndmask_b32_e32 v3, v3, v0, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_scale_f32 v5, null, v3, v3, v6
	v_div_scale_f32 v0, null, v3, v3, v1
	v_div_scale_f32 v10, vcc_lo, v1, v3, v1
	v_rcp_f32_e32 v9, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v7, v0
	v_div_scale_f32 v17, s3, v6, v3, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v16, -v5, v9, 1.0
	v_fma_f32 v14, -v0, v7, 1.0
	v_fmac_f32_e32 v9, v16, v9
	v_div_scale_f32 v4, null, v3, v3, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v7, v14, v7
	v_div_scale_f32 v11, s2, v2, v3, v2
	v_rcp_f32_e32 v8, v4
	v_mul_f32_e32 v16, v17, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v14, v10, v7
	v_fma_f32 v20, -v5, v16, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f32 v18, -v0, v14, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v15, -v4, v8, 1.0
	v_fmac_f32_e32 v16, v20, v9
	v_fmac_f32_e32 v14, v18, v7
	v_fmac_f32_e32 v8, v15, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v5, -v5, v16, v17
	v_fma_f32 v0, -v0, v14, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v15, v11, v8
	v_div_fmas_f32 v0, v0, v7, v14
	s_mov_b32 vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v19, -v4, v15, v11
	v_div_fixup_f32 v0, v0, v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v19, v8
	v_fma_f32 v4, -v4, v15, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fmas_f32 v7, v4, v8, v15
	s_mov_b32 vcc_lo, s3
	v_div_fmas_f32 v8, v5, v9, v16
	v_add_co_u32 v4, vcc_lo, s0, v12
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v13, vcc_lo
	v_div_fixup_f32 v1, v7, v3, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_div_fixup_f32 v2, v8, v3, v6
	v_mov_b32_e32 v3, 1.0
	global_store_b128 v[4:5], v[0:3], off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_, .Lfunc_end2-_Z25kernelGeneratePrimaryRays15HIP_vector_typeIfLj4EEPfPS0_S2_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1348
; NumSgprs: 18
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2align	2                               ; -- Begin function _Z17kernelTraverseRayP15HIP_vector_typeIfLj4EEPiS2_S1_RS0_S3_f
	.type	_Z17kernelTraverseRayP15HIP_vector_typeIfLj4EEPiS2_S1_RS0_S3_f,@function
_Z17kernelTraverseRayP15HIP_vector_typeIfLj4EEPiS2_S1_RS0_S3_f: ; @_Z17kernelTraverseRayP15HIP_vector_typeIfLj4EEPiS2_S1_RS0_S3_f
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	flat_load_b32 v50, v[10:11]
	s_clause 0x1
	flat_load_b96 v[13:15], v[0:1] offset:32
	flat_load_b96 v[24:26], v[0:1] offset:48
	flat_load_b32 v51, v[8:9]
	v_mov_b32_e32 v16, 0
	v_cmp_lt_f32_e64 s0, 0, v12
	s_mov_b32 s3, 0
                                        ; implicit-def: $vgpr20_vgpr21_vgpr22_vgpr23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v18, v16
	v_cndmask_b32_e64 v17, 0x4b18967f, v12, s0
	v_mov_b32_e32 v19, v16
	s_waitcnt vmcnt(3) lgkmcnt(3)
	v_cmp_ngt_f32_e64 s4, 0x33d6bf95, |v50|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s4
	s_xor_b32 s2, exec_lo, s1
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_f32_e32 v12, v24, v51
	v_sub_f32_e32 v20, v13, v51
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v21, null, v50, v50, v12
	v_div_scale_f32 v22, null, v50, v50, v20
	v_div_scale_f32 v30, vcc_lo, v12, v50, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v23, v21
	v_rcp_f32_e32 v27, v22
	s_waitcnt_depctr 0xfff
	v_fma_f32 v28, -v21, v23, 1.0
	v_fma_f32 v29, -v22, v27, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v23, v28, v23
	v_div_scale_f32 v28, s1, v20, v50, v20
	v_fmac_f32_e32 v27, v29, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v29, v30, v23
	v_mul_f32_e32 v31, v28, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v32, -v21, v29, v30
	v_fma_f32 v33, -v22, v31, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v29, v32, v23
	v_fmac_f32_e32 v31, v33, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v21, -v21, v29, v30
	v_fma_f32 v22, -v22, v31, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v21, v21, v23, v29
	s_mov_b32 vcc_lo, s1
	v_mov_b32_e32 v23, 0
	v_div_fmas_f32 v22, v22, v27, v31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v12, v21, v50, v12
	v_div_fixup_f32 v20, v22, v50, v20
	v_mov_b32_e32 v22, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, v12, v20
	v_cndmask_b32_e32 v21, v20, v12, vcc_lo
	v_cndmask_b32_e32 v12, v12, v20, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, 0, v12
	v_cndmask_b32_e32 v20, 0, v12, vcc_lo
	v_cndmask_b32_e32 v12, v17, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e32 vcc_lo, v21, v12
	v_cndmask_b32_e32 v21, v12, v21, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, v20, v21
	s_and_b32 s3, vcc_lo, exec_lo
.LBB3_2:                                ; %Flow180
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB3_4
; %bb.3:
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v51, v24
	v_cmp_nlt_f32_e64 s1, v51, v13
	v_dual_mov_b32 v23, v19 :: v_dual_mov_b32 v22, v18
	v_dual_mov_b32 v21, v17 :: v_dual_mov_b32 v20, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_not1_b32 s3, s3, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s3, s3, s1
.LBB3_4:                                ; %Flow181
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB3_18
; %bb.5:
	flat_load_b32 v12, v[10:11] offset:4
	s_waitcnt vmcnt(3) lgkmcnt(3)
	flat_load_b32 v13, v[8:9] offset:4
	s_mov_b32 s6, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_cmp_ngt_f32_e64 s5, 0x33d6bf95, |v12|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s5
	s_xor_b32 s3, exec_lo, s1
	s_cbranch_execz .LBB3_7
; %bb.6:
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_f32_e32 v24, v25, v13
	v_sub_f32_e32 v13, v14, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v27, null, v12, v12, v24
	v_div_scale_f32 v28, null, v12, v12, v13
	v_div_scale_f32 v33, vcc_lo, v24, v12, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v29, v27
	v_rcp_f32_e32 v30, v28
	s_waitcnt_depctr 0xfff
	v_fma_f32 v31, -v27, v29, 1.0
	v_fma_f32 v32, -v28, v30, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v30, v32, v30 :: v_dual_fmac_f32 v29, v31, v29
	v_div_scale_f32 v31, s1, v13, v12, v13
	v_mul_f32_e32 v34, v31, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v36, -v28, v34, v31
	v_fmac_f32_e32 v34, v36, v30
	v_mul_f32_e32 v32, v33, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v28, -v28, v34, v31
	v_fma_f32 v35, -v27, v32, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v32, v35, v29
	v_fma_f32 v27, -v27, v32, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v27, v27, v29, v32
	s_mov_b32 vcc_lo, s1
	v_div_fmas_f32 v28, v28, v30, v34
	v_div_fixup_f32 v24, v27, v12, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_div_fixup_f32 v12, v28, v12, v13
	v_mov_b32_e32 v30, v23
	v_dual_mov_b32 v28, v21 :: v_dual_mov_b32 v29, v22
	v_mov_b32_e32 v27, v20
	v_cmp_gt_f32_e32 vcc_lo, v24, v12
	v_cndmask_b32_e32 v13, v12, v24, vcc_lo
	v_cndmask_b32_e32 v12, v24, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_cmp_gt_f32_e32 vcc_lo, v12, v20
	v_cndmask_b32_e32 v23, v23, v30, vcc_lo
	v_cndmask_b32_e32 v21, v21, v28, vcc_lo
	v_cndmask_b32_e32 v20, v20, v12, vcc_lo
                                        ; kill: def $vgpr12 killed $vgpr12
	v_cndmask_b32_e32 v22, v22, v29, vcc_lo
	v_cmp_lt_f32_e64 s1, v13, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v21, v21, v13, s1
                                        ; implicit-def: $vgpr13
	v_cmp_ngt_f32_e64 s1, v20, v21
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s6, s1, exec_lo
.LBB3_7:                                ; %Flow176
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB3_9
; %bb.8:
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v13, v25
	v_cmp_nlt_f32_e64 s1, v13, v14
	s_and_not1_b32 s6, s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_b32 s1, s1, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s6, s6, s1
.LBB3_9:                                ; %Flow177
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s6
	s_cbranch_execz .LBB3_17
; %bb.10:
	flat_load_b32 v12, v[8:9] offset:8
	s_mov_b32 s6, 0
	s_and_saveexec_b32 s1, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, exec_lo, s1
	s_cbranch_execz .LBB3_12
; %bb.11:
	s_waitcnt vmcnt(1) lgkmcnt(1)
	flat_load_b32 v13, v[10:11] offset:8
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_sub_f32_e32 v14, v26, v12
	v_sub_f32_e32 v12, v15, v12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v15, null, v13, v13, v14
	v_div_scale_f32 v24, null, v13, v13, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v25, v15
	v_rcp_f32_e32 v26, v24
	s_waitcnt_depctr 0xfff
	v_fma_f32 v27, -v15, v25, 1.0
	v_fma_f32 v28, -v24, v26, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v25, v27, v25
	v_div_scale_f32 v29, vcc_lo, v14, v13, v14
	v_div_scale_f32 v27, s1, v12, v13, v12
	v_fmac_f32_e32 v26, v28, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v28, v29, v25
	v_mul_f32_e32 v30, v27, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v31, -v15, v28, v29
	v_fma_f32 v32, -v24, v30, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v28, v31, v25
	v_fmac_f32_e32 v30, v32, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v15, -v15, v28, v29
	v_fma_f32 v24, -v24, v30, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v15, v15, v25, v28
	s_mov_b32 vcc_lo, s1
	v_div_fmas_f32 v24, v24, v26, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v14, v15, v13, v14
	v_div_fixup_f32 v12, v24, v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cmp_gt_f32_e32 vcc_lo, v14, v12
	v_dual_cndmask_b32 v25, v14, v12 :: v_dual_cndmask_b32 v24, v12, v14
	v_dual_mov_b32 v12, v20 :: v_dual_mov_b32 v13, v21
	v_mov_b32_e32 v14, v22
	v_cmp_gt_f32_e32 vcc_lo, v25, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v15, v23 :: v_dual_cndmask_b32 v12, v21, v13
	v_cndmask_b32_e32 v22, v22, v14, vcc_lo
	v_cndmask_b32_e32 v20, v20, v25, vcc_lo
                                        ; kill: def $vgpr25 killed $vgpr25
                                        ; implicit-def: $vgpr13_vgpr14_vgpr15
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e32 vcc_lo, v24, v12
	v_cndmask_b32_e32 v21, v12, v24, vcc_lo
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr24_vgpr25_vgpr26
	v_cmp_ngt_f32_e32 vcc_lo, v20, v21
	s_and_b32 s6, vcc_lo, exec_lo
.LBB3_12:                               ; %Flow172
	s_and_not1_saveexec_b32 s5, s5
	s_cbranch_execz .LBB3_14
; %bb.13:
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v12, v26
	v_cmp_nlt_f32_e64 s1, v12, v15
	s_and_not1_b32 s6, s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_b32 s1, s1, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s6, s6, s1
.LBB3_14:                               ; %Flow173
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s1, s6
; %bb.15:
	s_mov_b32 s5, 1.0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v22, s5
; %bb.16:                               ; %Flow174
	s_or_b32 exec_lo, exec_lo, s1
.LBB3_17:                               ; %Flow178
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_18:                               ; %_Z26kernelIntersectBoundingBoxR15HIP_vector_typeIfLj4EES1_S1_S1_f.exit
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v12, -1.0 :: v_dual_mov_b32 v13, 0
	v_dual_mov_b32 v14, 0 :: v_dual_mov_b32 v15, 0
	s_mov_b32 s6, 0
	s_mov_b32 s5, exec_lo
	v_cmpx_ngt_f32_e32 0.5, v22
	s_cbranch_execz .LBB3_94
; %bb.19:
	flat_load_b96 v[28:30], v[10:11] offset:4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b96 v[30:32], v[8:9] offset:4
	v_fma_f32 v52, v50, v20, v51
	v_dual_mov_b32 v55, 0 :: v_dual_mov_b32 v38, 0
	v_mov_b32_e32 v27, 0
	s_mov_b32 s9, 1.0
	s_mov_b32 s10, -1.0
                                        ; implicit-def: $sgpr7
                                        ; implicit-def: $sgpr12
                                        ; implicit-def: $sgpr11
                                        ; implicit-def: $vgpr15
                                        ; implicit-def: $vgpr14
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr12
	v_cmp_ngt_f32_e64 s8, 0x33d6bf95, |v28|
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fma_f32 v53, v20, v28, v30
	v_fma_f32 v54, v20, v29, v31
.LBB3_20:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_22 Depth 2
                                        ;     Child Loop BB3_39 Depth 2
                                        ;     Child Loop BB3_53 Depth 2
                                        ;       Child Loop BB3_56 Depth 3
	v_dual_mov_b32 v8, v20 :: v_dual_mov_b32 v9, v21
	v_dual_mov_b32 v10, v22 :: v_dual_mov_b32 v11, v23
	s_or_b32 s11, s11, exec_lo
	s_or_b32 s12, s12, exec_lo
	s_mov_b32 s13, exec_lo
                                        ; implicit-def: $vgpr20_vgpr21_vgpr22_vgpr23
	v_cmpx_lt_i32_e32 -1, v55
	s_cbranch_execz .LBB3_90
; %bb.21:                               ; %.preheader296
                                        ;   in Loop: Header=BB3_20 Depth=1
	s_mov_b32 s2, 0
.LBB3_22:                               ;   Parent Loop BB3_20 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_lshlrev_b32_e32 v20, 2, v38
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v21, 31, v20
	v_lshlrev_b64 v[20:21], 4, v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v20, vcc_lo, v0, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, v1, v21, vcc_lo
	flat_load_b64 v[22:23], v[20:21] offset:16
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, 0, v22
	v_cmpx_ngt_f32_e32 0, v22
	s_cbranch_execz .LBB3_36
; %bb.23:                               ; %NodeBlock123
                                        ;   in Loop: Header=BB3_22 Depth=2
	flat_load_b64 v[24:25], v[20:21] offset:4
	v_cvt_i32_f32_e32 v26, v22
	s_mov_b32 s14, exec_lo
                                        ; implicit-def: $vgpr22
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 0, v26
	s_xor_b32 s14, exec_lo, s14
	s_cbranch_execz .LBB3_31
; %bb.24:                               ; %NodeBlock
                                        ;   in Loop: Header=BB3_22 Depth=2
	s_mov_b32 s15, exec_lo
                                        ; implicit-def: $vgpr22
	v_cmpx_lt_i32_e32 1, v26
	s_xor_b32 s15, exec_lo, s15
	s_cbranch_execz .LBB3_28
; %bb.25:                               ; %LeafBlock121
                                        ;   in Loop: Header=BB3_22 Depth=2
	v_mov_b32_e32 v22, 0
	s_mov_b32 s16, exec_lo
	v_cmpx_eq_u32_e32 2, v26
; %bb.26:                               ;   in Loop: Header=BB3_22 Depth=2
	v_mov_b32_e32 v22, v54
; %bb.27:                               ; %Flow161
                                        ;   in Loop: Header=BB3_22 Depth=2
	s_or_b32 exec_lo, exec_lo, s16
.LBB3_28:                               ; %Flow162
                                        ;   in Loop: Header=BB3_22 Depth=2
	s_and_not1_saveexec_b32 s1, s15
; %bb.29:                               ;   in Loop: Header=BB3_22 Depth=2
	v_mov_b32_e32 v22, v53
; %bb.30:                               ; %Flow163
                                        ;   in Loop: Header=BB3_22 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr26
.LBB3_31:                               ; %Flow165
                                        ;   in Loop: Header=BB3_22 Depth=2
	s_and_not1_saveexec_b32 s14, s14
	s_cbranch_execz .LBB3_35
; %bb.32:                               ; %LeafBlock
                                        ;   in Loop: Header=BB3_22 Depth=2
	v_mov_b32_e32 v22, 0
	s_mov_b32 s15, exec_lo
	v_cmpx_eq_u32_e32 0, v26
; %bb.33:                               ;   in Loop: Header=BB3_22 Depth=2
	v_mov_b32_e32 v22, v52
; %bb.34:                               ; %Flow164
                                        ;   in Loop: Header=BB3_22 Depth=2
	s_or_b32 exec_lo, exec_lo, s15
.LBB3_35:                               ;   in Loop: Header=BB3_22 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s14
	v_cmp_gt_f32_e64 s1, v23, v22
	v_add_nc_u32_e32 v55, 1, v55
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v22, v25, v24, s1
	v_cvt_i32_f32_e32 v38, v22
.LBB3_36:                               ; %Flow166
                                        ;   in Loop: Header=BB3_22 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, vcc_lo
	s_or_b32 s2, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB3_22
; %bb.37:                               ;   in Loop: Header=BB3_20 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	flat_load_b32 v20, v[20:21] offset:12
	v_dual_mov_b32 v39, -1 :: v_dual_mov_b32 v64, v17
	s_mov_b32 s14, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cvt_i32_f32_e32 v65, v20
	v_dual_mov_b32 v23, v11 :: v_dual_mov_b32 v22, v10
	v_dual_mov_b32 v21, v9 :: v_dual_mov_b32 v20, v8
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_lt_i32_e32 0, v65
	s_cbranch_execz .LBB3_51
; %bb.38:                               ; %.lr.ph
                                        ;   in Loop: Header=BB3_20 Depth=1
	v_lshlrev_b32_e32 v20, 2, v38
	v_ashrrev_i32_e32 v39, 31, v38
	s_mov_b32 s16, 1
	s_mov_b32 s15, 0
	v_mov_b32_e32 v64, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[22:23], 2, v[38:39]
	v_mov_b32_e32 v39, -1
	v_ashrrev_i32_e32 v21, 31, v20
	v_add_co_u32 v22, vcc_lo, v4, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[20:21], 4, v[20:21]
	v_add_co_ci_u32_e32 v23, vcc_lo, v5, v23, vcc_lo
	v_add_co_u32 v24, vcc_lo, v0, v20
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v25, vcc_lo, v1, v21, vcc_lo
	flat_load_b32 v32, v[22:23]
	s_clause 0x1
	flat_load_b96 v[20:22], v[24:25] offset:32
	flat_load_b96 v[23:25], v[24:25] offset:48
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_ashrrev_i32_e32 v33, 31, v32
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_dual_add_f32 v11, 0xb727c5ac, v20 :: v_dual_add_f32 v66, 0xb727c5ac, v21
	v_add_f32_e32 v67, 0xb727c5ac, v22
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_add_f32 v68, 0x3727c5ac, v23 :: v_dual_add_f32 v69, 0x3727c5ac, v24
	v_lshlrev_b64 v[20:21], 2, v[32:33]
	v_add_f32_e32 v70, 0x3727c5ac, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v48, vcc_lo, v2, v20
	v_add_co_ci_u32_e32 v49, vcc_lo, v3, v21, vcc_lo
.LBB3_39:                               ;   Parent Loop BB3_20 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_b32 v71, v[48:49]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_lshl_add_u32 v20, v71, 1, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v21, 31, v20
	v_lshlrev_b64 v[20:21], 4, v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v20, vcc_lo, v6, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, v7, v21, vcc_lo
	s_clause 0x2
	flat_load_b96 v[24:26], v[20:21]
	flat_load_b96 v[32:34], v[20:21] offset:16
	flat_load_b96 v[35:37], v[20:21] offset:32
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_sub_f32 v21, v34, v26 :: v_dual_sub_f32 v82, v35, v24
	v_sub_f32_e32 v23, v33, v25
	v_sub_f32_e32 v80, v36, v25
	v_dual_sub_f32 v20, v32, v24 :: v_dual_sub_f32 v81, v37, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v85, v23, v82
	v_dual_sub_f32 v83, v30, v25 :: v_dual_mul_f32 v84, v21, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v23, v23, v81, -v84
	v_mul_f32_e32 v22, v20, v81
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v20, v20, v80, -v85
	v_sub_f32_e32 v84, v31, v26
	v_fma_f32 v21, v21, v82, -v22
	v_sub_f32_e32 v22, v51, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v83, v83, v21
	v_mul_f32_e32 v21, v28, v21
	v_fmac_f32_e32 v83, v22, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v21, v50, v23
	v_fmac_f32_e32 v83, v84, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v21, v29, v20
	v_div_scale_f32 v20, null, v21, v21, v83
	v_div_scale_f32 v84, vcc_lo, v83, v21, v83
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v22, v20
	s_waitcnt_depctr 0xfff
	v_fma_f32 v23, -v20, v22, 1.0
	v_fmac_f32_e32 v22, v23, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v23, v84, v22
	v_fma_f32 v85, -v20, v23, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, v85, v22
	v_fma_f32 v20, -v20, v23, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v20, v20, v22, v23
	v_div_fixup_f32 v22, v20, v21, v83
	v_mov_b32_e32 v21, s10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v20, 0x80000000, v22
	v_cmp_nge_f32_e32 vcc_lo, 0, v22
	v_cndmask_b32_e32 v23, v20, v21, vcc_lo
	v_fma_f32 v20, -v50, v22, v51
	v_fma_f32 v21, -v28, v22, v30
	v_fma_f32 v22, -v29, v22, v31
	s_delay_alu instid0(VALU_DEP_4)
	v_cmpx_ngt_f32_e32 0, v23
	s_cbranch_execz .LBB3_41
; %bb.40:                               ;   in Loop: Header=BB3_39 Depth=2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v83, v20, v32 :: v_dual_sub_f32 v84, v22, v34
	v_dual_sub_f32 v85, v25, v33 :: v_dual_sub_f32 v86, v26, v34
	v_dual_sub_f32 v87, v21, v33 :: v_dual_sub_f32 v96, v24, v32
	v_dual_sub_f32 v33, v33, v36 :: v_dual_sub_f32 v32, v32, v35
	v_dual_mul_f32 v97, v85, v84 :: v_dual_mul_f32 v98, v86, v83
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v99, v96, v87 :: v_dual_sub_f32 v34, v34, v37
	v_sub_f32_e32 v24, v20, v24
	v_fma_f32 v86, v86, v87, -v97
	v_sub_f32_e32 v87, v20, v35
	v_sub_f32_e32 v97, v22, v37
	v_fma_f32 v84, v96, v84, -v98
	v_sub_f32_e32 v96, v21, v36
	v_sub_f32_e32 v26, v22, v26
	v_dual_mul_f32 v36, v34, v87 :: v_dual_mul_f32 v37, v81, v24
	v_mul_f32_e32 v35, v33, v97
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v25, v21, v25 :: v_dual_mul_f32 v98, v80, v26
	v_fma_f32 v26, v82, v26, -v37
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_fma_f32 v34, v34, v96, -v35
	v_fma_f32 v35, v32, v97, -v36
	v_mul_f32_e32 v32, v32, v96
	v_fma_f32 v36, v81, v25, -v98
	v_mul_f32_e32 v25, v82, v25
	v_dual_mul_f32 v37, v84, v35 :: v_dual_mul_f32 v26, v35, v26
	v_fma_f32 v35, v85, v83, -v99
	v_fma_f32 v32, v33, v87, -v32
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v24, v80, v24, -v25
	v_fmac_f32_e32 v26, v34, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v37, v86, v34 :: v_dual_fmac_f32 v26, v32, v24
	v_dual_fmac_f32 v37, v35, v32 :: v_dual_mov_b32 v24, s10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_f32_e64 s1, 0xa6901d7d, v26
	v_cmp_le_f32_e32 vcc_lo, 0xa6901d7d, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_and_b32 vcc_lo, vcc_lo, s1
	v_dual_cndmask_b32 v23, v24, v23 :: v_dual_cndmask_b32 v22, v22, v22
	v_dual_cndmask_b32 v21, v21, v21 :: v_dual_cndmask_b32 v20, v20, v20
.LBB3_41:                               ; %_Z23kernelIntersectTriangleRK15HIP_vector_typeIfLj4EES2_S2_S2_S2_.exit
                                        ;   in Loop: Header=BB3_39 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e32 vcc_lo, 0, v23
	v_cmp_lt_f32_e64 s1, v23, v64
	s_and_b32 s2, vcc_lo, s1
	s_mov_b32 s1, -1
	s_and_saveexec_b32 s17, s2
	s_cbranch_execz .LBB3_49
; %bb.42:                               ;   in Loop: Header=BB3_39 Depth=2
	v_mov_b32_e32 v24, 0
	s_mov_b32 s18, exec_lo
	v_cmpx_nlt_f32_e32 v20, v11
	s_cbranch_execz .LBB3_46
; %bb.43:                               ;   in Loop: Header=BB3_39 Depth=2
	v_mov_b32_e32 v24, 0
	s_mov_b32 s19, exec_lo
	v_cmpx_nlt_f32_e32 v21, v66
; %bb.44:                               ;   in Loop: Header=BB3_39 Depth=2
	v_cmp_ngt_f32_e32 vcc_lo, v20, v68
	v_cmp_ngt_f32_e64 s1, v21, v69
	v_cmp_nlt_f32_e64 s2, v22, v67
	v_cmp_ngt_f32_e64 s3, v22, v70
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 s1, vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v24, 0, 1, s1
; %bb.45:                               ; %Flow157
                                        ;   in Loop: Header=BB3_39 Depth=2
	s_or_b32 exec_lo, exec_lo, s19
.LBB3_46:                               ; %_Z24kernelPointInBoundingBoxRK15HIP_vector_typeIfLj4EES2_S2_.exit
                                        ;   in Loop: Header=BB3_39 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s18
	v_cmp_eq_u32_e64 s1, 0, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v64, v23, v64, s1
	v_cndmask_b32_e64 v39, v71, v39, s1
	s_or_b32 s2, s0, s1
	s_xor_b32 s3, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s3
; %bb.47:                               ;   in Loop: Header=BB3_39 Depth=2
	v_mov_b32_e32 v39, v71
	v_mov_b32_e32 v64, v23
	s_or_b32 s1, s1, exec_lo
; %bb.48:                               ; %Flow156
                                        ;   in Loop: Header=BB3_39 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s1, s1, exec_lo
.LBB3_49:                               ; %Flow158
                                        ;   in Loop: Header=BB3_39 Depth=2
	s_or_b32 exec_lo, exec_lo, s17
	v_cmp_ge_i32_e32 vcc_lo, s16, v65
	s_xor_b32 s1, s1, -1
	s_add_i32 s16, s16, 1
	s_or_b32 s1, s1, vcc_lo
	v_add_co_u32 v48, vcc_lo, v48, 4
	v_add_co_ci_u32_e32 v49, vcc_lo, 0, v49, vcc_lo
	s_and_b32 s1, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s15, s1, s15
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB3_39
; %bb.50:                               ; %Flow159
                                        ;   in Loop: Header=BB3_20 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
.LBB3_51:                               ; %Flow160
                                        ;   in Loop: Header=BB3_20 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s14
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $sgpr1
                                        ; implicit-def: $vgpr24
                                        ; implicit-def: $vgpr25
                                        ; implicit-def: $vgpr26
                                        ; implicit-def: $vgpr32
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr34
	v_cmpx_gt_i32_e32 0, v39
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB3_87
; %bb.52:                               ; %.outer.preheader
                                        ;   in Loop: Header=BB3_20 Depth=1
	v_mov_b32_e32 v33, v55
	v_mov_b32_e32 v11, v38
	s_mov_b32 s3, 0
                                        ; implicit-def: $sgpr14
                                        ; implicit-def: $sgpr15
                                        ; implicit-def: $sgpr16
.LBB3_53:                               ; %.outer
                                        ;   Parent Loop BB3_20 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_56 Depth 3
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v25, v13
	v_mov_b32_e32 v26, v14
	v_mov_b32_e32 v32, v15
	s_or_b32 s16, s16, exec_lo
	s_or_b32 s15, s15, exec_lo
	s_mov_b32 s17, exec_lo
                                        ; implicit-def: $vgpr39
	v_cmpx_lt_i32_e32 -1, v33
	s_cbranch_execz .LBB3_85
; %bb.54:                               ; %.lr.ph316.preheader
                                        ;   in Loop: Header=BB3_53 Depth=2
	v_dual_mov_b32 v24, -1.0 :: v_dual_mov_b32 v25, 0
	v_mov_b32_e32 v34, 0
	v_mov_b32_e32 v26, 0
	v_mov_b32_e32 v32, 0
	s_mov_b32 s20, 0
	s_mov_b32 s19, -1
	s_mov_b32 s1, 0
	s_mov_b32 s18, exec_lo
                                        ; implicit-def: $vgpr39
	v_cmpx_ne_u32_e32 0, v33
	s_xor_b32 s18, exec_lo, s18
	s_cbranch_execz .LBB3_84
; %bb.55:                               ; %.lr.ph11.preheader
                                        ;   in Loop: Header=BB3_53 Depth=2
                                        ; implicit-def: $sgpr19
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr22
                                        ; implicit-def: $sgpr21
.LBB3_56:                               ; %.lr.ph11
                                        ;   Parent Loop BB3_20 Depth=1
                                        ;     Parent Loop BB3_53 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v39, v33 :: v_dual_mov_b32 v48, v27
	v_mov_b32_e32 v64, v11
	s_or_b32 s21, s21, exec_lo
	s_or_b32 s22, s22, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e64 v49, v39, 1
	s_mov_b32 s24, exec_lo
                                        ; implicit-def: $vgpr33
                                        ; implicit-def: $sgpr23
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $sgpr25
	v_and_b32_e32 v24, v48, v49
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v24
	s_cbranch_execz .LBB3_58
; %bb.57:                               ; %.lr.ph316
                                        ;   in Loop: Header=BB3_56 Depth=3
	v_lshlrev_b32_e32 v24, 2, v64
	v_add_nc_u32_e32 v33, -1, v39
	s_and_not1_b32 s22, s22, exec_lo
	s_mov_b32 s23, 0
	s_mov_b32 s25, -1.0
	v_ashrrev_i32_e32 v25, 31, v24
	s_and_not1_b32 s21, s21, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[24:25], 4, v[24:25]
	v_add_co_u32 v24, vcc_lo, v0, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v1, v25, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v33
	flat_load_b32 v11, v[24:25]
	v_not_b32_e32 v24, v49
	s_and_b32 s26, vcc_lo, exec_lo
	s_or_b32 s22, s22, s26
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v27, v48, v24
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cvt_i32_f32_e32 v11, v11
.LBB3_58:                               ; %Flow149
                                        ;   in Loop: Header=BB3_56 Depth=3
	s_or_b32 exec_lo, exec_lo, s24
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s24, exec_lo, s22
	v_dual_mov_b32 v34, s23 :: v_dual_mov_b32 v25, s23
	s_or_b32 s1, s24, s1
	v_mov_b32_e32 v24, s25
	s_and_not1_b32 s20, s20, exec_lo
	s_and_b32 s24, s21, exec_lo
	s_and_not1_b32 s19, s19, exec_lo
	s_and_b32 s23, s23, exec_lo
	s_or_b32 s20, s20, s24
	s_or_b32 s19, s19, s23
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB3_56
; %bb.59:                               ; %loop.exit.guard128
                                        ;   in Loop: Header=BB3_53 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v26, v25
	v_mov_b32_e32 v32, v25
	s_mov_b32 s1, -1
	s_and_saveexec_b32 s21, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s20, exec_lo, s21
	s_cbranch_execz .LBB3_83
; %bb.60:                               ;   in Loop: Header=BB3_53 Depth=2
	v_and_b32_e32 v11, 1, v64
	s_mov_b32 s22, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v11
	v_cndmask_b32_e64 v11, 1, -1, vcc_lo
	v_add_nc_u32_e32 v11, v11, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v24, 2, v11
	v_ashrrev_i32_e32 v25, 31, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[24:25], 4, v[24:25]
	v_add_co_u32 v24, vcc_lo, v0, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v1, v25, vcc_lo
	flat_load_b96 v[32:34], v[24:25] offset:32
	s_waitcnt vmcnt(1) lgkmcnt(1)
	flat_load_b96 v[35:37], v[24:25] offset:48
                                        ; implicit-def: $vgpr24_vgpr25_vgpr26_vgpr27
	s_and_saveexec_b32 s1, s4
	s_xor_b32 s21, exec_lo, s1
	s_cbranch_execz .LBB3_62
; %bb.61:                               ;   in Loop: Header=BB3_53 Depth=2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_f32_e32 v24, v35, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v26, null, v50, v50, v24
	v_div_scale_f32 v69, vcc_lo, v24, v50, v24
	v_rcp_f32_e32 v65, v26
	s_waitcnt_depctr 0xfff
	v_fma_f32 v67, -v26, v65, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v65, v67, v65
	v_sub_f32_e32 v25, v32, v51
	v_div_scale_f32 v27, null, v50, v50, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v66, v27
	s_waitcnt_depctr 0xfff
	v_fma_f32 v68, -v27, v66, 1.0
	v_fmac_f32_e32 v66, v68, v66
	v_mul_f32_e32 v68, v69, v65
	v_div_scale_f32 v67, s1, v25, v50, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v71, -v26, v68, v69
	v_mul_f32_e32 v70, v67, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v68, v71, v65
	v_fma_f32 v80, -v27, v70, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v26, -v26, v68, v69
	v_fmac_f32_e32 v70, v80, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v26, v26, v65, v68
	v_fma_f32 v27, -v27, v70, v67
	s_mov_b32 vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v24, v26, v50, v24
	v_div_fmas_f32 v27, v27, v66, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v25, v27, v50, v25
	v_mov_b32_e32 v27, 0
	v_cmp_gt_f32_e32 vcc_lo, v24, v25
	v_cndmask_b32_e32 v26, v25, v24, vcc_lo
	v_cndmask_b32_e32 v24, v24, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e32 vcc_lo, 0, v24
	v_dual_cndmask_b32 v25, v17, v17 :: v_dual_cndmask_b32 v24, 0, v24
	v_cmp_lt_f32_e32 vcc_lo, v26, v25
	v_dual_cndmask_b32 v25, v25, v26 :: v_dual_mov_b32 v26, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f32_e32 vcc_lo, v24, v25
	s_and_b32 s22, vcc_lo, exec_lo
.LBB3_62:                               ; %Flow147
                                        ;   in Loop: Header=BB3_53 Depth=2
	s_and_not1_saveexec_b32 s21, s21
	s_cbranch_execz .LBB3_64
; %bb.63:                               ;   in Loop: Header=BB3_53 Depth=2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v51, v35
	v_cmp_nlt_f32_e64 s1, v51, v32
	v_dual_mov_b32 v27, v19 :: v_dual_mov_b32 v26, v18
	v_dual_mov_b32 v25, v17 :: v_dual_mov_b32 v24, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_not1_b32 s22, s22, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s22, s22, s1
.LBB3_64:                               ; %Flow148
                                        ;   in Loop: Header=BB3_53 Depth=2
	s_or_b32 exec_lo, exec_lo, s21
	s_and_saveexec_b32 s21, s22
	s_cbranch_execz .LBB3_78
; %bb.65:                               ;   in Loop: Header=BB3_53 Depth=2
	s_mov_b32 s23, 0
	s_and_saveexec_b32 s1, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s22, exec_lo, s1
	s_cbranch_execz .LBB3_67
; %bb.66:                               ;   in Loop: Header=BB3_53 Depth=2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_f32_e32 v32, v36, v30
	v_sub_f32_e32 v35, v33, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v65, null, v28, v28, v32
	v_div_scale_f32 v66, null, v28, v28, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v67, v65
	v_rcp_f32_e32 v68, v66
	s_waitcnt_depctr 0xfff
	v_fma_f32 v69, -v65, v67, 1.0
	v_fma_f32 v70, -v66, v68, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v67, v69, v67
	v_div_scale_f32 v71, vcc_lo, v32, v28, v32
	v_fmac_f32_e32 v68, v70, v68
	v_div_scale_f32 v69, s1, v35, v28, v35
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v70, v71, v67
	v_mul_f32_e32 v80, v69, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v81, -v65, v70, v71
	v_fma_f32 v82, -v66, v80, v69
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v70, v81, v67
	v_fmac_f32_e32 v80, v82, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v65, -v65, v70, v71
	v_fma_f32 v66, -v66, v80, v69
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v65, v65, v67, v70
	s_mov_b32 vcc_lo, s1
	v_div_fmas_f32 v66, v66, v68, v80
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v32, v65, v28, v32
	v_div_fixup_f32 v35, v66, v28, v35
	v_mov_b32_e32 v68, v27
	v_dual_mov_b32 v66, v25 :: v_dual_mov_b32 v67, v26
	v_mov_b32_e32 v65, v24
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, v32, v35
	v_dual_cndmask_b32 v69, v35, v32 :: v_dual_cndmask_b32 v32, v32, v35
	v_cmp_gt_f32_e32 vcc_lo, v32, v24
	v_cndmask_b32_e32 v27, v27, v68, vcc_lo
	v_dual_cndmask_b32 v25, v25, v66 :: v_dual_cndmask_b32 v24, v24, v32
                                        ; kill: def $vgpr32 killed $vgpr32
	v_cndmask_b32_e32 v26, v26, v67, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s1, v69, v25
	v_cndmask_b32_e64 v25, v25, v69, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ngt_f32_e64 s1, v24, v25
	s_and_b32 s23, s1, exec_lo
.LBB3_67:                               ; %Flow142
                                        ;   in Loop: Header=BB3_53 Depth=2
	s_and_not1_saveexec_b32 s22, s22
	s_cbranch_execz .LBB3_69
; %bb.68:                               ;   in Loop: Header=BB3_53 Depth=2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v30, v36
	v_cmp_nlt_f32_e64 s1, v30, v33
	s_and_not1_b32 s23, s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_b32 s1, s1, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s23, s23, s1
.LBB3_69:                               ; %Flow143
                                        ;   in Loop: Header=BB3_53 Depth=2
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s23
	s_cbranch_execz .LBB3_77
; %bb.70:                               ;   in Loop: Header=BB3_53 Depth=2
	s_mov_b32 s24, 0
	s_and_saveexec_b32 s1, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s23, exec_lo, s1
	s_cbranch_execz .LBB3_72
; %bb.71:                               ;   in Loop: Header=BB3_53 Depth=2
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_sub_f32_e32 v33, v34, v31
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_f32_e32 v32, v37, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v35, null, v29, v29, v33
	v_rcp_f32_e32 v37, v35
	s_waitcnt_depctr 0xfff
	v_fma_f32 v66, -v35, v37, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v37, v66, v37
	v_div_scale_f32 v34, null, v29, v29, v32
	v_div_scale_f32 v67, vcc_lo, v32, v29, v32
	v_rcp_f32_e32 v36, v34
	s_waitcnt_depctr 0xfff
	v_fma_f32 v65, -v34, v36, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v36, v65, v36
	v_div_scale_f32 v65, s1, v33, v29, v33
	v_mul_f32_e32 v66, v67, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v68, v65, v37
	v_fma_f32 v69, -v34, v66, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v70, -v35, v68, v65
	v_fmac_f32_e32 v66, v69, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v68, v70, v37
	v_fma_f32 v34, -v34, v66, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v35, -v35, v68, v65
	v_div_fmas_f32 v34, v34, v36, v66
	s_mov_b32 vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v35, v35, v37, v68
	v_div_fixup_f32 v32, v34, v29, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v33, v35, v29, v33
	v_cmp_gt_f32_e32 vcc_lo, v32, v33
	v_dual_cndmask_b32 v37, v32, v33 :: v_dual_cndmask_b32 v36, v33, v32
	v_mov_b32_e32 v35, v27
	v_dual_mov_b32 v33, v25 :: v_dual_mov_b32 v32, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f32_e32 vcc_lo, v37, v24
	v_dual_mov_b32 v34, v26 :: v_dual_cndmask_b32 v25, v25, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v26, v26, v34, vcc_lo
	v_cndmask_b32_e32 v24, v24, v37, vcc_lo
                                        ; kill: def $vgpr37 killed $vgpr37
                                        ; implicit-def: $vgpr32_vgpr33_vgpr34
	v_cmp_lt_f32_e32 vcc_lo, v36, v25
	v_cndmask_b32_e32 v25, v25, v36, vcc_lo
                                        ; implicit-def: $vgpr35_vgpr36_vgpr37
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f32_e32 vcc_lo, v24, v25
	s_and_b32 s24, vcc_lo, exec_lo
.LBB3_72:                               ; %Flow138
                                        ;   in Loop: Header=BB3_53 Depth=2
	s_and_not1_saveexec_b32 s23, s23
	s_cbranch_execz .LBB3_74
; %bb.73:                               ;   in Loop: Header=BB3_53 Depth=2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v31, v37
	v_cmp_nlt_f32_e64 s1, v31, v34
	s_and_not1_b32 s24, s24, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_b32 s1, s1, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s24, s24, s1
.LBB3_74:                               ; %Flow139
                                        ;   in Loop: Header=BB3_53 Depth=2
	s_or_b32 exec_lo, exec_lo, s23
	s_and_saveexec_b32 s1, s24
; %bb.75:                               ;   in Loop: Header=BB3_53 Depth=2
	v_mov_b32_e32 v26, s9
; %bb.76:                               ; %Flow140
                                        ;   in Loop: Header=BB3_53 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
.LBB3_77:                               ; %Flow144
                                        ;   in Loop: Header=BB3_53 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s22
.LBB3_78:                               ; %_Z26kernelIntersectBoundingBoxR15HIP_vector_typeIfLj4EES1_S1_S1_f.exit199
                                        ;   in Loop: Header=BB3_53 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s21
	v_cmp_lt_f32_e32 vcc_lo, 0.5, v26
                                        ; implicit-def: $vgpr27
	s_and_saveexec_b32 s1, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s1
; %bb.79:                               ;   in Loop: Header=BB3_53 Depth=2
	v_fma_f32 v52, v50, v24, v51
	v_fma_f32 v53, v28, v24, v30
	v_fma_f32 v54, v29, v24, v31
	v_or_b32_e32 v27, v48, v49
; %bb.80:                               ; %Flow135
                                        ;   in Loop: Header=BB3_53 Depth=2
	s_and_not1_saveexec_b32 s21, s1
	s_cbranch_execz .LBB3_82
; %bb.81:                               ;   in Loop: Header=BB3_53 Depth=2
	v_lshlrev_b32_e32 v24, 2, v64
	v_add_nc_u32_e32 v39, -1, v39
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v25, 31, v24
	v_lshlrev_b64 v[24:25], 4, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v24, s1, v0, v24
	v_add_co_ci_u32_e64 v25, s1, v1, v25, s1
	flat_load_b32 v11, v[24:25]
	v_not_b32_e32 v24, v49
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v27, v48, v24
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cvt_i32_f32_e32 v11, v11
.LBB3_82:                               ;   in Loop: Header=BB3_53 Depth=2
	s_or_b32 exec_lo, exec_lo, s21
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v25, v13
	v_mov_b32_e32 v26, v14
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_mov_b32_e32 v32, v15
	v_mov_b32_e32 v34, v39
	s_or_b32 s19, s19, exec_lo
	s_or_not1_b32 s1, vcc_lo, exec_lo
.LBB3_83:                               ; %Flow153
                                        ;   in Loop: Header=BB3_53 Depth=2
	s_or_b32 exec_lo, exec_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s20, s19, exec_lo
	s_or_not1_b32 s19, s1, exec_lo
.LBB3_84:                               ; %Flow152
                                        ;   in Loop: Header=BB3_53 Depth=2
	s_or_b32 exec_lo, exec_lo, s18
	v_mov_b32_e32 v33, v34
	s_and_not1_b32 s1, s16, exec_lo
	s_and_b32 s16, s20, exec_lo
	s_and_not1_b32 s15, s15, exec_lo
	s_and_b32 s18, s19, exec_lo
	s_or_b32 s16, s1, s16
	s_or_b32 s15, s15, s18
.LBB3_85:                               ; %Flow151
                                        ;   in Loop: Header=BB3_53 Depth=2
	s_or_b32 exec_lo, exec_lo, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s15
	v_dual_mov_b32 v34, v33 :: v_dual_mov_b32 v33, v39
	s_or_b32 s3, s1, s3
	s_and_not1_b32 s1, s14, exec_lo
	s_and_b32 s14, s16, exec_lo
	s_or_b32 s14, s1, s14
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_53
; %bb.86:                               ; %Flow154
                                        ;   in Loop: Header=BB3_20 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s14, exec_lo
                                        ; implicit-def: $vgpr64
                                        ; implicit-def: $vgpr39
.LBB3_87:                               ; %Flow155
                                        ;   in Loop: Header=BB3_20 Depth=1
	s_and_not1_saveexec_b32 s2, s2
; %bb.88:                               ;   in Loop: Header=BB3_20 Depth=1
	v_fma_f32 v20, v50, v64, v51
	v_fma_f32 v21, v28, v64, v30
	v_fma_f32 v22, v29, v64, v31
	v_cvt_f32_i32_e32 v24, v39
	v_dual_mov_b32 v34, v55 :: v_dual_mov_b32 v11, v38
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v32, v20 :: v_dual_mov_b32 v25, v22
	v_mov_b32_e32 v26, v21
	s_and_not1_b32 s1, s1, exec_lo
; %bb.89:                               ; %.loopexit
                                        ;   in Loop: Header=BB3_20 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_xor_b32 s1, s1, -1
	v_dual_mov_b32 v38, v11 :: v_dual_mov_b32 v55, v34
	v_dual_mov_b32 v15, v32 :: v_dual_mov_b32 v14, v26
	v_dual_mov_b32 v13, v25 :: v_dual_mov_b32 v12, v24
	s_and_not1_b32 s2, s12, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_and_not1_b32 s11, s11, exec_lo
	s_or_b32 s12, s2, s1
.LBB3_90:                               ; %Flow167
                                        ;   in Loop: Header=BB3_20 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s12
	s_or_b32 s6, s1, s6
	s_and_not1_b32 s1, s7, exec_lo
	s_and_b32 s2, s11, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s7, s1, s2
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB3_20
; %bb.91:                               ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s0, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
; %bb.92:
	v_dual_mov_b32 v12, -1.0 :: v_dual_mov_b32 v13, v10
	v_dual_mov_b32 v14, v9 :: v_dual_mov_b32 v15, v8
; %bb.93:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_94:                               ; %Flow169
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_dual_mov_b32 v0, v15 :: v_dual_mov_b32 v1, v14
	v_dual_mov_b32 v2, v13 :: v_dual_mov_b32 v3, v12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end3:
	.size	_Z17kernelTraverseRayP15HIP_vector_typeIfLj4EEPiS2_S1_RS0_S3_f, .Lfunc_end3-_Z17kernelTraverseRayP15HIP_vector_typeIfLj4EEPiS2_S1_RS0_S3_f
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 4800
; NumSgprs: 34
; NumVgprs: 100
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_ ; -- Begin function _Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_
	.globl	_Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_
	.p2align	8
	.type	_Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_,@function
_Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_: ; @_Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b32 s3, s[0:1], 0x30
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB4_2
; %bb.1:
	s_clause 0x2
	s_load_b64 s[12:13], s[0:1], 0x38
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b128 s[0:3], s[0:1], 0x20
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v12, -1.0
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, _Z17kernelTraverseRayP15HIP_vector_typeIfLj4EEPiS2_S1_RS0_S3_f@rel32@lo+4
	s_addc_u32 s15, s15, _Z17kernelTraverseRayP15HIP_vector_typeIfLj4EEPiS2_S1_RS0_S3_f@rel32@hi+12
	v_lshlrev_b64 v[0:1], 4, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v40, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v41, vcc_lo, s13, v1, vcc_lo
	v_add_co_u32 v10, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v8, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v1, vcc_lo
	v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s9
	v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11
	v_dual_mov_b32 v4, s0 :: v_dual_mov_b32 v5, s1
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v7, s3
	s_swappc_b64 s[30:31], s[14:15]
	global_store_b128 v[40:41], v[0:3], off
.LBB4_2:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 100
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_, .Lfunc_end4-_Z25kernelGetIntersectedPointP15HIP_vector_typeIfLj4EES1_S1_PiS2_S1_iS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 220
; NumSgprs: 35
; NumVgprs: 100
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 12
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 100
; Occupancy: 12
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_ ; -- Begin function _Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_
	.globl	_Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_
	.p2align	8
	.type	_Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_,@function
_Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_: ; @_Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x94
	s_load_b32 s3, s[0:1], 0x60
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[33:34], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v33
	s_cbranch_execz .LBB5_109
; %bb.1:
	s_load_b512 s[4:19], s[0:1], 0x0
	v_ashrrev_i32_e32 v34, 31, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 4, v[33:34]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v35, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v36, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v0, v[35:36], off offset:12
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v5, v0
	v_cmp_lt_i32_e32 vcc_lo, -1, v5
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB5_109
; %bb.2:
	v_mov_b32_e32 v0, 0
	v_lshl_add_u32 v1, v5, 1, v5
	s_clause 0x1
	s_load_b256 s[36:43], s[0:1], 0x40
	s_load_b256 s[20:27], s[0:1], 0x68
	s_mov_b32 s5, 1.0
	v_mov_b32_e32 v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 4, v[1:2]
	v_add_co_u32 v8, vcc_lo, s6, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v7, vcc_lo
	v_add_co_u32 v15, vcc_lo, s8, v6
	global_load_b96 v[19:21], v[35:36], off
	s_clause 0x2
	global_load_b96 v[22:24], v[8:9], off
	global_load_b96 v[25:27], v[8:9], off offset:16
	global_load_b96 v[28:30], v[8:9], off offset:32
	v_add_co_ci_u32_e32 v16, vcc_lo, s9, v7, vcc_lo
	v_mov_b32_e32 v6, v0
	s_clause 0x2
	global_load_b128 v[7:10], v[15:16], off offset:16
	global_load_b128 v[11:14], v[15:16], off
	global_load_b128 v[15:18], v[15:16], off offset:32
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s36, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s37, v6, vcc_lo
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(6)
	v_sub_f32_e32 v6, v19, v22
	s_waitcnt vmcnt(5)
	v_dual_sub_f32 v22, v19, v25 :: v_dual_sub_f32 v25, v20, v26
	s_waitcnt vmcnt(4)
	v_dual_sub_f32 v19, v19, v28 :: v_dual_sub_f32 v26, v21, v27
	v_sub_f32_e32 v27, v20, v29
	v_sub_f32_e32 v29, v21, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v21, v21, v24 :: v_dual_mul_f32 v32, v6, v27
	v_mul_f32_e32 v24, v22, v29
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mul_f32 v31, v19, v21 :: v_dual_sub_f32 v20, v20, v23
	v_mul_f32_e32 v23, v27, v26
	v_mul_f32_e32 v28, v19, v25
	v_mul_f32_e32 v37, v25, v21
	v_fma_f32 v24, v19, v26, -v24
	v_dual_mul_f32 v39, v22, v20 :: v_dual_mul_f32 v30, v20, v29
	v_fma_f32 v23, v25, v29, -v23
	v_fma_f32 v29, v6, v29, -v31
	v_mul_f32_e32 v38, v6, v26
	v_fma_f32 v28, v22, v27, -v28
	v_fma_f32 v26, v20, v26, -v37
	v_fma_f32 v19, v19, v20, -v32
	v_fma_f32 v6, v6, v25, -v39
	v_fma_f32 v22, v22, v21, -v38
	v_fma_f32 v21, v27, v21, -v30
	v_dual_mul_f32 v27, v29, v29 :: v_dual_mul_f32 v24, v24, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v22, v22, v22 :: v_dual_fmac_f32 v27, v21, v21
	v_dual_fmac_f32 v22, v26, v26 :: v_dual_fmac_f32 v27, v19, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v22, v6, v6 :: v_dual_mul_f32 v19, 0x4f800000, v27
	v_cmp_gt_f32_e64 s2, 0xf800000, v27
	v_mul_f32_e32 v20, 0x4f800000, v22
	v_cmp_gt_f32_e64 s3, 0xf800000, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v19, v27, v19, s2
	v_cndmask_b32_e64 v20, v22, v20, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v22, v19
	v_fmac_f32_e32 v24, v23, v23
	v_sqrt_f32_e32 v23, v20
	s_waitcnt_depctr 0xfff
	v_dual_fmac_f32 v24, v28, v28 :: v_dual_add_nc_u32 v27, 1, v22
	v_add_nc_u32_e32 v26, -1, v22
	v_add_nc_u32_e32 v28, -1, v23
	v_add_nc_u32_e32 v29, 1, v23
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f32 v37, -v27, v22, v19
	v_mul_f32_e32 v6, 0x4f800000, v24
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v24
	v_fma_f32 v32, -v26, v22, v19
	v_fma_f32 v38, -v28, v23, v20
	v_fma_f32 v39, -v29, v23, v20
	v_cndmask_b32_e32 v6, v24, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v21, v6
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v24, -1, v21
	v_add_nc_u32_e32 v25, 1, v21
	v_fma_f32 v30, -v24, v21, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v31, -v25, v21, v6
	v_cmp_ge_f32_e64 s4, 0, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v21, v21, v24, s4
	v_cmp_ge_f32_e64 s4, 0, v32
	v_cndmask_b32_e64 v22, v22, v26, s4
	v_cmp_ge_f32_e64 s4, 0, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v23, v23, v28, s4
	v_cmp_lt_f32_e64 s4, 0, v31
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v31, v5
	v_cndmask_b32_e64 v21, v21, v25, s4
	v_cmp_lt_f32_e64 s4, 0, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v24, 0x37800000, v21
	v_cndmask_b32_e64 v22, v22, v27, s4
	v_cmp_lt_f32_e64 s4, 0, v39
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v21, v21, v24, vcc_lo
	v_mul_f32_e32 v25, 0x37800000, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v23, v23, v29, s4
	v_cmp_class_f32_e64 vcc_lo, v6, 0x260
	v_cndmask_b32_e64 v22, v22, v25, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v26, 0x37800000, v23
	v_cndmask_b32_e32 v6, v21, v6, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v19, 0x260
	v_cndmask_b32_e64 v23, v23, v26, s3
	v_cndmask_b32_e32 v19, v22, v19, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v20, 0x260
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v22, v23, v20, vcc_lo
	v_add_f32_e32 v20, v6, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v20, v22, v20
	v_div_scale_f32 v21, null, v20, v20, 1.0
	v_div_scale_f32 v25, vcc_lo, 1.0, v20, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v23, v21
	s_waitcnt_depctr 0xfff
	v_fma_f32 v24, -v21, v23, 1.0
	v_fmac_f32_e32 v23, v24, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v24, v25, v23
	v_fma_f32 v26, -v21, v24, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v24, v26, v23
	v_fma_f32 v21, -v21, v24, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v21, v21, v23, v24
	v_div_fixup_f32 v23, v21, v20, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v21, v19, v23
	v_mul_f32_e32 v20, v6, v23
	v_dual_mul_f32 v22, v22, v23 :: v_dual_mul_f32 v19, v8, v21
	v_mul_f32_e32 v7, v7, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v19, v12, v20 :: v_dual_mul_f32 v12, v9, v21
	v_fmac_f32_e32 v7, v11, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v19, v16, v22 :: v_dual_fmac_f32 v12, v13, v20
	v_fmac_f32_e32 v7, v15, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v6, v19, v19
	v_fmac_f32_e32 v12, v17, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v7, v7
	v_fmac_f32_e32 v6, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v8, 0x4f800000, v6
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v6
	v_cndmask_b32_e32 v6, v6, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v8, v6
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v9, -1, v8
	v_add_nc_u32_e32 v11, 1, v8
	v_fma_f32 v13, -v9, v8, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v15, -v11, v8, v6
	v_cmp_ge_f32_e64 s2, 0, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v8, v8, v9, s2
	v_cmp_lt_f32_e64 s2, 0, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, v8, v11, s2
	v_add_co_u32 v37, s2, s20, v3
	v_add_co_ci_u32_e64 v38, s2, s21, v4, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, 0x37800000, v8
	v_cndmask_b32_e32 v8, v8, v9, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v6, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v13, v8, v6, vcc_lo
	v_add_co_u32 v23, vcc_lo, s24, v3
	v_add_co_ci_u32_e32 v24, vcc_lo, s25, v4, vcc_lo
	v_div_scale_f32 v6, null, v13, v13, v7
	v_div_scale_f32 v8, null, v13, v13, v19
	v_div_scale_f32 v9, null, v13, v13, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v15, v6
	v_rcp_f32_e32 v16, v8
	v_div_scale_f32 v25, vcc_lo, v7, v13, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(TRANS32_DEP_3)
	v_rcp_f32_e32 v17, v9
	v_div_scale_f32 v26, s0, v19, v13, v19
	v_div_scale_f32 v29, s1, v12, v13, v12
	v_lshlrev_b32_e32 v3, 2, v5
	v_fma_f32 v11, -v6, v15, 1.0
	s_delay_alu instid0(TRANS32_DEP_2)
	v_fma_f32 v27, -v8, v16, 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v28, -v9, v17, 1.0
	v_fmac_f32_e32 v15, v11, v15
	v_fmac_f32_e32 v16, v27, v16
	v_ashrrev_i32_e32 v4, 31, v3
	v_mul_f32_e32 v11, v10, v21
	v_fmac_f32_e32 v17, v28, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v27, v25, v15 :: v_dual_mul_f32 v28, v26, v16
	v_lshlrev_b64 v[3:4], 4, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v11, v14, v20 :: v_dual_mul_f32 v30, v29, v17
	v_fma_f32 v5, -v6, v27, v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v32, -v8, v28, v26
	v_fmac_f32_e32 v11, v22, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v39, -v9, v30, v29
	v_dual_fmac_f32 v27, v5, v15 :: v_dual_fmac_f32 v28, v32, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v30, v39, v17
	v_fma_f32 v5, -v6, v27, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v6, -v8, v28, v26
	v_fma_f32 v8, -v9, v30, v29
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fmas_f32 v9, v5, v15, v27
	s_mov_b32 vcc_lo, s0
	s_mov_b32 s0, exec_lo
	v_div_fmas_f32 v10, v6, v16, v28
	s_mov_b32 vcc_lo, s1
	v_div_fmas_f32 v14, v8, v17, v30
	v_add_co_u32 v5, vcc_lo, s38, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s39, v4, vcc_lo
	v_div_fixup_f32 v8, v9, v13, v7
	v_div_fixup_f32 v9, v10, v13, v19
	v_div_fixup_f32 v10, v14, v13, v12
	s_clause 0x3
	global_load_b32 v3, v[5:6], off offset:48
	global_load_b128 v[12:15], v[5:6], off offset:32
	global_load_b128 v[16:19], v[5:6], off offset:16
	global_load_b128 v[4:7], v[5:6], off
	s_clause 0x1
	global_store_b128 v[23:24], v[8:11], off
	global_store_b32 v[23:24], v31, off offset:12
	global_load_b32 v11, v[37:38], off offset:12
	s_waitcnt vmcnt(4)
	v_cmpx_lt_f32_e32 -0.5, v3
	s_cbranch_execz .LBB5_4
; %bb.3:
	v_cvt_i32_f32_e32 v23, v3
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v24, 31, v23
	v_lshlrev_b64 v[23:24], 2, v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v23, vcc_lo, s40, v23
	v_add_co_ci_u32_e32 v24, vcc_lo, s41, v24, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	global_load_b32 v27, v[23:24], off
	s_clause 0x1
	global_load_b128 v[23:26], v[1:2], off
	global_load_b64 v[1:2], v[1:2], off offset:16
	s_waitcnt vmcnt(2)
	v_ashrrev_i32_e32 v28, 31, v27
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v3, v21, v26
	v_mul_f32_e32 v21, v21, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[27:28], 4, v[27:28]
	v_add_co_u32 v27, vcc_lo, s42, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v28, vcc_lo, s43, v28, vcc_lo
	global_load_b64 v[29:30], v[27:28], off offset:4
	v_fmac_f32_e32 v21, v20, v23
	s_waitcnt vmcnt(1)
	v_fmac_f32_e32 v21, v22, v1
	v_fmac_f32_e32 v3, v20, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v3, v22, v2
	v_cvt_i32_f32_e32 v2, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v1, v3
	v_cvt_f32_i32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v1, v1
	v_dual_sub_f32 v2, v21, v2 :: v_dual_sub_f32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_add_f32 v20, 1.0, v2 :: v_dual_add_f32 v3, 1.0, v1
	v_cmp_gt_f32_e32 vcc_lo, 0, v1
	v_cndmask_b32_e32 v1, v1, v3, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v20, vcc_lo
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v1, v30, v1 :: v_dual_mul_f32 v2, v29, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v1, v1
	v_cvt_i32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v1, v1
	v_cvt_f32_i32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v29, v1
	v_add_f32_e32 v1, 1.0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v1, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 4, v[1:2]
	v_add_co_u32 v1, vcc_lo, v27, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v28, v2, vcc_lo
	global_load_b128 v[20:23], v[1:2], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v18, v18, v22
	v_dual_mul_f32 v16, v16, v20 :: v_dual_mul_f32 v17, v17, v21
	v_mul_f32_e32 v19, v19, v23
.LBB5_4:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(3)
	v_cmp_lt_f32_e64 s0, 0, v15
	s_mov_b64 s[2:3], 0
	s_mov_b32 s10, -1
	s_mov_b32 s8, -1.0
	s_mov_b32 s9, 0x3e76c4e1
.LBB5_5:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB5_27 Depth 2
                                        ;       Child Loop BB5_29 Depth 3
                                        ;       Child Loop BB5_46 Depth 3
                                        ;       Child Loop BB5_60 Depth 3
                                        ;         Child Loop BB5_63 Depth 4
	s_lshl_b64 s[2:3], s[2:3], 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s18, s2
	s_addc_u32 s3, s19, s3
	global_load_b32 v45, v0, s[2:3] offset:12
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, 0x3c23d70a, v45
	s_cbranch_vccnz .LBB5_107
; %bb.6:                                ;   in Loop: Header=BB5_5 Depth=1
	global_load_b128 v[20:23], v[35:36], off
	global_load_b96 v[24:26], v0, s[2:3]
	s_mov_b32 s11, exec_lo
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v2, v21, v25 :: v_dual_sub_f32 v3, v20, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, v2, v2
	v_dual_sub_f32 v20, v22, v26 :: v_dual_fmac_f32 v1, v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v1, v20, v20
	v_mul_f32_e32 v21, 0x4f800000, v1
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, v1, v21, vcc_lo
	v_sqrt_f32_e32 v21, v1
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v22, -1, v21
	v_add_nc_u32_e32 v23, 1, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v27, -v22, v21, v1
	v_fma_f32 v28, -v23, v21, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s1, 0, v27
	v_cndmask_b32_e64 v21, v21, v22, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s1, 0, v28
	v_cndmask_b32_e64 v21, v21, v23, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v22, 0x37800000, v21
	v_cndmask_b32_e32 v21, v21, v22, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v1, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, v21, v1, vcc_lo
	v_div_scale_f32 v21, null, v1, v1, v3
	v_div_scale_f32 v22, null, v1, v1, v2
	v_div_scale_f32 v27, null, v1, v1, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v23, v21
	v_rcp_f32_e32 v28, v22
	v_div_scale_f32 v39, s1, v2, v1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_3)
	v_rcp_f32_e32 v29, v27
	v_fma_f32 v30, -v21, v23, 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v32, -v22, v28, 1.0
	v_fmac_f32_e32 v23, v30, v23
	v_fma_f32 v30, -v27, v29, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v28, v32, v28 :: v_dual_fmac_f32 v29, v30, v29
	v_mul_f32_e32 v30, v39, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v42, -v22, v30, v39
	v_fmac_f32_e32 v30, v42, v28
	v_div_scale_f32 v31, vcc_lo, v3, v1, v3
	v_div_scale_f32 v32, s2, v20, v1, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v22, -v22, v30, v39
	v_mul_f32_e32 v40, v31, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v41, -v21, v40, v31
	v_fmac_f32_e32 v40, v41, v23
	v_mul_f32_e32 v44, v32, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v21, -v21, v40, v31
	v_fma_f32 v41, -v27, v44, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v44, v41, v29
	v_div_fmas_f32 v21, v21, v23, v40
	s_mov_b32 vcc_lo, s1
	v_div_fmas_f32 v22, v22, v28, v30
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f32 v23, -v27, v44, v32
	s_mov_b32 vcc_lo, s2
	v_div_fixup_f32 v42, v21, v1, v3
	v_div_fixup_f32 v43, v22, v1, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v2, v23, v29, v44
	v_mul_f32_e32 v46, v9, v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v44, v2, v1, v20
	v_fmac_f32_e32 v46, v8, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v46, v10, v44
	v_cmpx_nlt_f32_e32 0, v46
	s_cbranch_execz .LBB5_106
; %bb.7:                                ;   in Loop: Header=BB5_5 Depth=1
	s_clause 0x1
	global_load_b96 v[27:29], v0, s[12:13] offset:32
	global_load_b96 v[30:32], v0, s[12:13] offset:48
	v_dual_mul_f32 v1, 0x3f7ae148, v1 :: v_dual_mov_b32 v2, v0
	v_mov_b32_e32 v3, v0
	v_cmp_ngt_f32_e64 s20, 0x33d6bf95, |v42|
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s1, 0, v1
                                        ; implicit-def: $vgpr20_vgpr21_vgpr22_vgpr23
	v_cndmask_b32_e64 v1, 0x4b18967f, v1, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s20
	s_xor_b32 s3, exec_lo, s2
	s_cbranch_execz .LBB5_9
; %bb.8:                                ;   in Loop: Header=BB5_5 Depth=1
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v20, v30, v24
	v_sub_f32_e32 v21, v27, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v22, null, v42, v42, v20
	v_div_scale_f32 v23, null, v42, v42, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v39, v22
	v_rcp_f32_e32 v40, v23
	s_waitcnt_depctr 0xfff
	v_fma_f32 v41, -v22, v39, 1.0
	v_fma_f32 v47, -v23, v40, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v39, v41, v39
	v_div_scale_f32 v48, vcc_lo, v20, v42, v20
	v_fmac_f32_e32 v40, v47, v40
	v_div_scale_f32 v41, s2, v21, v42, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v47, v48, v39
	v_fma_f32 v50, -v22, v47, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v47, v50, v39
	v_fma_f32 v22, -v22, v47, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v22, v22, v39, v47
	s_mov_b32 vcc_lo, s2
	v_div_fixup_f32 v20, v22, v42, v20
	v_mul_f32_e32 v49, v41, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v51, -v23, v49, v41
	v_fmac_f32_e32 v49, v51, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v23, -v23, v49, v41
	v_div_fmas_f32 v23, v23, v40, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v21, v23, v42, v21
	v_mov_b32_e32 v23, 0
	v_cmp_gt_f32_e32 vcc_lo, v20, v21
	v_cndmask_b32_e32 v22, v21, v20, vcc_lo
	v_cndmask_b32_e32 v20, v20, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e32 vcc_lo, 0, v20
	v_dual_cndmask_b32 v20, 0, v20 :: v_dual_cndmask_b32 v21, v1, v1
	v_cmp_lt_f32_e32 vcc_lo, v22, v21
	v_dual_cndmask_b32 v21, v21, v22 :: v_dual_mov_b32 v22, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f32_e32 vcc_lo, v20, v21
	s_and_b32 s4, vcc_lo, exec_lo
.LBB5_9:                                ; %Flow672
                                        ;   in Loop: Header=BB5_5 Depth=1
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB5_11
; %bb.10:                               ;   in Loop: Header=BB5_5 Depth=1
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v24, v30
	v_cmp_nlt_f32_e64 s2, v24, v27
	v_dual_mov_b32 v23, v3 :: v_dual_mov_b32 v22, v2
	v_dual_mov_b32 v21, v1 :: v_dual_mov_b32 v20, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_or_b32 s4, s4, s2
.LBB5_11:                               ; %Flow673
                                        ;   in Loop: Header=BB5_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s4
	s_cbranch_execz .LBB5_25
; %bb.12:                               ;   in Loop: Header=BB5_5 Depth=1
	v_cmp_ngt_f32_e64 s21, 0x33d6bf95, |v43|
	s_mov_b32 s24, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s21
	s_xor_b32 s4, exec_lo, s2
	s_cbranch_execz .LBB5_14
; %bb.13:                               ;   in Loop: Header=BB5_5 Depth=1
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v27, v31, v25
	v_sub_f32_e32 v30, v28, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v39, null, v43, v43, v27
	v_div_scale_f32 v40, null, v43, v43, v30
	v_div_scale_f32 v50, vcc_lo, v27, v43, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v41, v39
	v_rcp_f32_e32 v47, v40
	s_waitcnt_depctr 0xfff
	v_fma_f32 v48, -v39, v41, 1.0
	v_fma_f32 v49, -v40, v47, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v41, v48, v41
	v_fmac_f32_e32 v47, v49, v47
	v_div_scale_f32 v48, s2, v30, v43, v30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v49, v50, v41
	v_mul_f32_e32 v51, v48, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v52, -v39, v49, v50
	v_fma_f32 v53, -v40, v51, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v49, v52, v41
	v_fmac_f32_e32 v51, v53, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v39, -v39, v49, v50
	v_fma_f32 v40, -v40, v51, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v39, v39, v41, v49
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f32 v40, v40, v47, v51
	v_mov_b32_e32 v50, v23
	v_mov_b32_e32 v48, v21
	v_div_fixup_f32 v27, v39, v43, v27
	v_mov_b32_e32 v49, v22
	v_div_fixup_f32 v30, v40, v43, v30
	v_mov_b32_e32 v47, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, v27, v30
	v_cndmask_b32_e32 v39, v30, v27, vcc_lo
	v_cndmask_b32_e32 v27, v27, v30, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, v27, v20
	v_dual_cndmask_b32 v22, v22, v49 :: v_dual_cndmask_b32 v21, v21, v48
	v_dual_cndmask_b32 v20, v20, v27 :: v_dual_cndmask_b32 v23, v23, v50
                                        ; kill: def $vgpr27 killed $vgpr27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, v39, v21
	v_cndmask_b32_e64 v21, v21, v39, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ngt_f32_e64 s2, v20, v21
	s_and_b32 s24, s2, exec_lo
.LBB5_14:                               ; %Flow668
                                        ;   in Loop: Header=BB5_5 Depth=1
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB5_16
; %bb.15:                               ;   in Loop: Header=BB5_5 Depth=1
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v25, v31
	v_cmp_nlt_f32_e64 s2, v25, v28
	s_and_not1_b32 s24, s24, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_b32 s2, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s24, s24, s2
.LBB5_16:                               ; %Flow669
                                        ;   in Loop: Header=BB5_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s4, s24
	s_cbranch_execz .LBB5_24
; %bb.17:                               ;   in Loop: Header=BB5_5 Depth=1
	s_mov_b32 s24, 0
	s_and_saveexec_b32 s2, s21
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s21, exec_lo, s2
	s_cbranch_execz .LBB5_19
; %bb.18:                               ;   in Loop: Header=BB5_5 Depth=1
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v27, v32, v26
	v_sub_f32_e32 v28, v29, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v29, null, v44, v44, v27
	v_div_scale_f32 v41, vcc_lo, v27, v44, v27
	v_rcp_f32_e32 v31, v29
	s_waitcnt_depctr 0xfff
	v_fma_f32 v39, -v29, v31, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v31, v39, v31
	v_div_scale_f32 v30, null, v44, v44, v28
	v_div_scale_f32 v39, s2, v28, v44, v28
	v_rcp_f32_e32 v32, v30
	s_waitcnt_depctr 0xfff
	v_fma_f32 v40, -v30, v32, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v32, v40, v32
	v_mul_f32_e32 v40, v41, v31
	v_fma_f32 v48, -v29, v40, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v47, v39, v32 :: v_dual_fmac_f32 v40, v48, v31
	v_fma_f32 v49, -v30, v47, v39
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v29, -v29, v40, v41
	v_fmac_f32_e32 v47, v49, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v29, v29, v31, v40
	v_fma_f32 v30, -v30, v47, v39
	s_mov_b32 vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v27, v29, v44, v27
	v_div_fmas_f32 v30, v30, v32, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v28, v30, v44, v28
	v_cmp_gt_f32_e32 vcc_lo, v27, v28
	v_dual_cndmask_b32 v31, v28, v27 :: v_dual_cndmask_b32 v32, v27, v28
	v_dual_mov_b32 v30, v23 :: v_dual_mov_b32 v29, v22
	v_dual_mov_b32 v28, v21 :: v_dual_mov_b32 v27, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f32_e32 vcc_lo, v32, v20
	v_dual_cndmask_b32 v22, v22, v29 :: v_dual_cndmask_b32 v21, v21, v28
	v_cndmask_b32_e32 v20, v20, v32, vcc_lo
                                        ; kill: def $vgpr32 killed $vgpr32
                                        ; implicit-def: $vgpr27_vgpr28_vgpr29
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e32 vcc_lo, v31, v21
	v_cndmask_b32_e32 v21, v21, v31, vcc_lo
                                        ; implicit-def: $vgpr30_vgpr31_vgpr32
	v_cmp_ngt_f32_e32 vcc_lo, v20, v21
	s_and_b32 s24, vcc_lo, exec_lo
.LBB5_19:                               ; %Flow664
                                        ;   in Loop: Header=BB5_5 Depth=1
	s_and_not1_saveexec_b32 s21, s21
	s_cbranch_execz .LBB5_21
; %bb.20:                               ;   in Loop: Header=BB5_5 Depth=1
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v26, v32
	v_cmp_nlt_f32_e64 s2, v26, v29
	s_and_not1_b32 s24, s24, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_b32 s2, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s24, s24, s2
.LBB5_21:                               ; %Flow665
                                        ;   in Loop: Header=BB5_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s21
	s_and_saveexec_b32 s2, s24
; %bb.22:                               ;   in Loop: Header=BB5_5 Depth=1
	v_mov_b32_e32 v22, s5
; %bb.23:                               ; %Flow666
                                        ;   in Loop: Header=BB5_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB5_24:                               ; %Flow670
                                        ;   in Loop: Header=BB5_5 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB5_25:                               ; %_Z26kernelIntersectBoundingBoxR15HIP_vector_typeIfLj4EES1_S1_S1_f.exit.i
                                        ;   in Loop: Header=BB5_5 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v21, -1.0
	s_mov_b32 s21, exec_lo
	v_cmpx_ngt_f32_e32 0.5, v22
	s_cbranch_execz .LBB5_99
; %bb.26:                               ;   in Loop: Header=BB5_5 Depth=1
	v_fma_f32 v47, v42, v20, v24
	v_fma_f32 v48, v43, v20, v25
	v_fma_f32 v49, v44, v20, v26
	v_cmp_ngt_f32_e64 s24, 0x33d6bf95, |v43|
	v_dual_mov_b32 v50, 0 :: v_dual_mov_b32 v39, 0
	v_mov_b32_e32 v52, 0
	s_mov_b32 s25, 0
                                        ; implicit-def: $sgpr28
                                        ; implicit-def: $vgpr51
.LBB5_27:                               ;   Parent Loop BB5_5 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB5_29 Depth 3
                                        ;       Child Loop BB5_46 Depth 3
                                        ;       Child Loop BB5_60 Depth 3
                                        ;         Child Loop BB5_63 Depth 4
	v_mov_b32_e32 v21, -1.0
	s_or_b32 s28, s28, exec_lo
	s_mov_b32 s29, exec_lo
	v_cmpx_lt_i32_e32 -1, v50
	s_cbranch_execz .LBB5_97
; %bb.28:                               ; %.preheader296.i
                                        ;   in Loop: Header=BB5_27 Depth=2
	s_mov_b32 s3, 0
.LBB5_29:                               ;   Parent Loop BB5_5 Depth=1
                                        ;     Parent Loop BB5_27 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_lshlrev_b32_e32 v20, 2, v39
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v21, 31, v20
	v_lshlrev_b64 v[20:21], 4, v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v20, vcc_lo, s12, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, s13, v21, vcc_lo
	global_load_b64 v[22:23], v[20:21], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, 0, v22
	v_cmpx_ngt_f32_e32 0, v22
	s_cbranch_execz .LBB5_43
; %bb.30:                               ; %NodeBlock618
                                        ;   in Loop: Header=BB5_29 Depth=3
	global_load_b64 v[27:28], v[20:21], off offset:4
	v_cvt_i32_f32_e32 v29, v22
	s_mov_b32 s30, exec_lo
                                        ; implicit-def: $vgpr22
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 0, v29
	s_xor_b32 s30, exec_lo, s30
	s_cbranch_execz .LBB5_38
; %bb.31:                               ; %NodeBlock
                                        ;   in Loop: Header=BB5_29 Depth=3
	s_mov_b32 s31, exec_lo
                                        ; implicit-def: $vgpr22
	v_cmpx_lt_i32_e32 1, v29
	s_xor_b32 s31, exec_lo, s31
	s_cbranch_execz .LBB5_35
; %bb.32:                               ; %LeafBlock616
                                        ;   in Loop: Header=BB5_29 Depth=3
	v_mov_b32_e32 v22, 0
	s_mov_b32 s33, exec_lo
	v_cmpx_eq_u32_e32 2, v29
; %bb.33:                               ;   in Loop: Header=BB5_29 Depth=3
	v_mov_b32_e32 v22, v49
; %bb.34:                               ; %Flow652
                                        ;   in Loop: Header=BB5_29 Depth=3
	s_or_b32 exec_lo, exec_lo, s33
.LBB5_35:                               ; %Flow653
                                        ;   in Loop: Header=BB5_29 Depth=3
	s_and_not1_saveexec_b32 s2, s31
; %bb.36:                               ;   in Loop: Header=BB5_29 Depth=3
	v_mov_b32_e32 v22, v48
; %bb.37:                               ; %Flow654
                                        ;   in Loop: Header=BB5_29 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr29
.LBB5_38:                               ; %Flow656
                                        ;   in Loop: Header=BB5_29 Depth=3
	s_and_not1_saveexec_b32 s30, s30
	s_cbranch_execz .LBB5_42
; %bb.39:                               ; %LeafBlock
                                        ;   in Loop: Header=BB5_29 Depth=3
	v_mov_b32_e32 v22, 0
	s_mov_b32 s31, exec_lo
	v_cmpx_eq_u32_e32 0, v29
; %bb.40:                               ;   in Loop: Header=BB5_29 Depth=3
	v_mov_b32_e32 v22, v47
; %bb.41:                               ; %Flow655
                                        ;   in Loop: Header=BB5_29 Depth=3
	s_or_b32 exec_lo, exec_lo, s31
.LBB5_42:                               ;   in Loop: Header=BB5_29 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s30
	v_cmp_gt_f32_e64 s2, v23, v22
	v_add_nc_u32_e32 v50, 1, v50
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v22, v28, v27, s2
	v_cvt_i32_f32_e32 v39, v22
.LBB5_43:                               ; %Flow657
                                        ;   in Loop: Header=BB5_29 Depth=3
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, exec_lo, vcc_lo
	s_or_b32 s3, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB5_29
; %bb.44:                               ;   in Loop: Header=BB5_27 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v20, v[20:21], off offset:12
	v_mov_b32_e32 v23, -1
	s_mov_b32 s30, exec_lo
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v53, v20
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 0, v53
	s_cbranch_execz .LBB5_58
; %bb.45:                               ; %.lr.ph.i
                                        ;   in Loop: Header=BB5_27 Depth=2
	v_lshlrev_b32_e32 v20, 2, v39
	v_ashrrev_i32_e32 v40, 31, v39
	s_mov_b32 s33, 1
	s_mov_b32 s31, 0
	v_mov_b32_e32 v60, v1
	v_ashrrev_i32_e32 v21, 31, v20
	v_lshlrev_b64 v[22:23], 2, v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[20:21], 4, v[20:21]
	v_add_co_u32 v22, vcc_lo, s16, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v23, vcc_lo, s17, v23, vcc_lo
	v_add_co_u32 v27, vcc_lo, s12, v20
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v28, vcc_lo, s13, v21, vcc_lo
	global_load_b32 v30, v[22:23], off
	s_clause 0x1
	global_load_b96 v[20:22], v[27:28], off offset:32
	global_load_b96 v[27:29], v[27:28], off offset:48
	v_mov_b32_e32 v23, -1
	s_waitcnt vmcnt(2)
	v_ashrrev_i32_e32 v31, 31, v30
	s_waitcnt vmcnt(1)
	v_dual_add_f32 v54, 0xb727c5ac, v20 :: v_dual_add_f32 v55, 0xb727c5ac, v21
	v_add_f32_e32 v56, 0xb727c5ac, v22
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v57, 0x3727c5ac, v27 :: v_dual_add_f32 v58, 0x3727c5ac, v28
	v_lshlrev_b64 v[20:21], 2, v[30:31]
	v_add_f32_e32 v59, 0x3727c5ac, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v40, vcc_lo, s14, v20
	v_add_co_ci_u32_e32 v41, vcc_lo, s15, v21, vcc_lo
.LBB5_46:                               ;   Parent Loop BB5_5 Depth=1
                                        ;     Parent Loop BB5_27 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v61, v[40:41], off
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v20, v61, 1, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v21, 31, v20
	v_lshlrev_b64 v[20:21], 4, v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v30, vcc_lo, s6, v20
	v_add_co_ci_u32_e32 v31, vcc_lo, s7, v21, vcc_lo
	s_clause 0x2
	global_load_b96 v[20:22], v[30:31], off
	global_load_b96 v[27:29], v[30:31], off offset:16
	global_load_b96 v[30:32], v[30:31], off offset:32
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v62, v27, v20 :: v_dual_sub_f32 v67, v32, v22
	v_dual_sub_f32 v63, v29, v22 :: v_dual_sub_f32 v68, v30, v20
	v_sub_f32_e32 v65, v28, v21
	v_sub_f32_e32 v66, v31, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v64, v62, v67 :: v_dual_mul_f32 v71, v65, v68
	v_dual_sub_f32 v69, v25, v21 :: v_dual_mul_f32 v70, v63, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v63, v63, v68, -v64
	v_sub_f32_e32 v64, v24, v20
	v_fma_f32 v62, v62, v66, -v71
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v65, v65, v67, -v70
	v_mul_f32_e32 v69, v69, v63
	v_dual_mul_f32 v63, v43, v63 :: v_dual_sub_f32 v70, v26, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v69, v64, v65
	v_fmac_f32_e32 v63, v42, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v69, v70, v62
	v_fmac_f32_e32 v63, v44, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v62, null, v63, v63, v69
	v_div_scale_f32 v70, vcc_lo, v69, v63, v69
	v_rcp_f32_e32 v64, v62
	s_waitcnt_depctr 0xfff
	v_fma_f32 v65, -v62, v64, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v64, v65, v64
	v_mul_f32_e32 v65, v70, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v71, -v62, v65, v70
	v_fmac_f32_e32 v65, v71, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v62, -v62, v65, v70
	v_div_fmas_f32 v62, v62, v64, v65
	v_mov_b32_e32 v64, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v63, v62, v63, v69
	v_xor_b32_e32 v62, 0x80000000, v63
	v_cmp_nge_f32_e32 vcc_lo, 0, v63
	v_fma_f32 v65, -v43, v63, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v62, v62, v64, vcc_lo
	v_fma_f32 v64, -v42, v63, v24
	v_fma_f32 v63, -v44, v63, v26
	v_cmpx_ngt_f32_e32 0, v62
	s_cbranch_execz .LBB5_48
; %bb.47:                               ;   in Loop: Header=BB5_46 Depth=3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v69, v64, v27 :: v_dual_sub_f32 v70, v63, v29
	v_dual_sub_f32 v71, v21, v28 :: v_dual_sub_f32 v72, v22, v29
	v_dual_sub_f32 v73, v65, v28 :: v_dual_sub_f32 v74, v20, v27
	v_dual_sub_f32 v29, v29, v32 :: v_dual_sub_f32 v22, v63, v22
	v_dual_mul_f32 v75, v71, v70 :: v_dual_mul_f32 v76, v72, v69
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v77, v74, v73 :: v_dual_sub_f32 v28, v28, v31
	v_dual_sub_f32 v20, v64, v20 :: v_dual_sub_f32 v27, v27, v30
	v_fma_f32 v72, v72, v73, -v75
	v_sub_f32_e32 v73, v64, v30
	v_sub_f32_e32 v75, v63, v32
	v_fma_f32 v70, v74, v70, -v76
	v_sub_f32_e32 v74, v65, v31
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v32, v67, v20 :: v_dual_mul_f32 v31, v29, v73
	v_dual_mul_f32 v30, v28, v75 :: v_dual_sub_f32 v21, v65, v21
	v_mul_f32_e32 v76, v66, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v22, v68, v22, -v32
	v_fma_f32 v29, v29, v74, -v30
	v_fma_f32 v30, v27, v75, -v31
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v31, v67, v21, -v76
	v_dual_mul_f32 v21, v68, v21 :: v_dual_mul_f32 v32, v70, v30
	v_mul_f32_e32 v27, v27, v74
	v_mul_f32_e32 v22, v30, v22
	v_fma_f32 v30, v71, v69, -v77
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f32 v20, v66, v20, -v21
	v_fmac_f32_e32 v32, v72, v29
	v_fma_f32 v27, v28, v73, -v27
	v_fmac_f32_e32 v22, v29, v31
	v_fmac_f32_e32 v32, v30, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v22, v27, v20
	v_mov_b32_e32 v20, s8
	v_cmp_le_f32_e32 vcc_lo, 0xa6901d7d, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_f32_e64 s2, 0xa6901d7d, v22
	s_and_b32 vcc_lo, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_cndmask_b32 v65, v65, v65 :: v_dual_cndmask_b32 v62, v20, v62
	v_dual_cndmask_b32 v63, v63, v63 :: v_dual_cndmask_b32 v64, v64, v64
.LBB5_48:                               ; %_Z23kernelIntersectTriangleRK15HIP_vector_typeIfLj4EES2_S2_S2_S2_.exit.i
                                        ;   in Loop: Header=BB5_46 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e32 vcc_lo, 0, v62
	v_cmp_lt_f32_e64 s2, v62, v60
	s_and_b32 s3, vcc_lo, s2
	s_mov_b32 s2, -1
	s_and_saveexec_b32 s34, s3
	s_cbranch_execz .LBB5_56
; %bb.49:                               ;   in Loop: Header=BB5_46 Depth=3
	v_mov_b32_e32 v20, 0
	s_mov_b32 s35, exec_lo
	v_cmpx_nlt_f32_e32 v64, v54
	s_cbranch_execz .LBB5_53
; %bb.50:                               ;   in Loop: Header=BB5_46 Depth=3
	v_mov_b32_e32 v20, 0
	s_mov_b32 s36, exec_lo
	v_cmpx_nlt_f32_e32 v65, v55
; %bb.51:                               ;   in Loop: Header=BB5_46 Depth=3
	v_cmp_ngt_f32_e32 vcc_lo, v64, v57
	v_cmp_ngt_f32_e64 s2, v65, v58
	v_cmp_nlt_f32_e64 s3, v63, v56
	v_cmp_ngt_f32_e64 s4, v63, v59
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v20, 0, 1, s2
; %bb.52:                               ; %Flow648
                                        ;   in Loop: Header=BB5_46 Depth=3
	s_or_b32 exec_lo, exec_lo, s36
.LBB5_53:                               ; %_Z24kernelPointInBoundingBoxRK15HIP_vector_typeIfLj4EES2_S2_.exit.i
                                        ;   in Loop: Header=BB5_46 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s35
	v_cmp_eq_u32_e64 s2, 0, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v60, v62, v60, s2
	v_cndmask_b32_e64 v23, v61, v23, s2
	s_or_b32 s3, s1, s2
	s_xor_b32 s4, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s4
; %bb.54:                               ;   in Loop: Header=BB5_46 Depth=3
	v_dual_mov_b32 v23, v61 :: v_dual_mov_b32 v60, v62
	s_or_b32 s2, s2, exec_lo
; %bb.55:                               ; %Flow647
                                        ;   in Loop: Header=BB5_46 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s2, s2, exec_lo
.LBB5_56:                               ; %Flow649
                                        ;   in Loop: Header=BB5_46 Depth=3
	s_or_b32 exec_lo, exec_lo, s34
	v_cmp_ge_i32_e32 vcc_lo, s33, v53
	s_xor_b32 s2, s2, -1
	s_add_i32 s33, s33, 1
	s_or_b32 s2, s2, vcc_lo
	v_add_co_u32 v40, vcc_lo, v40, 4
	v_add_co_ci_u32_e32 v41, vcc_lo, 0, v41, vcc_lo
	s_and_b32 s2, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s31, s2, s31
	s_and_not1_b32 exec_lo, exec_lo, s31
	s_cbranch_execnz .LBB5_46
; %bb.57:                               ; %Flow650
                                        ;   in Loop: Header=BB5_27 Depth=2
	s_or_b32 exec_lo, exec_lo, s31
.LBB5_58:                               ; %Flow651
                                        ;   in Loop: Header=BB5_27 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s30
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $vgpr40
                                        ; implicit-def: $vgpr22
	v_cmpx_gt_i32_e32 0, v23
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB5_94
; %bb.59:                               ; %.outer.i.preheader
                                        ;   in Loop: Header=BB5_27 Depth=2
	v_mov_b32_e32 v20, v50
	v_mov_b32_e32 v40, v39
	s_mov_b32 s4, 0
                                        ; implicit-def: $sgpr30
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr33
.LBB5_60:                               ; %.outer.i
                                        ;   Parent Loop BB5_5 Depth=1
                                        ;     Parent Loop BB5_27 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB5_63 Depth 4
	v_mov_b32_e32 v21, v51
	s_or_b32 s33, s33, exec_lo
	s_or_b32 s31, s31, exec_lo
	s_mov_b32 s34, exec_lo
                                        ; implicit-def: $vgpr41
	v_cmpx_lt_i32_e32 -1, v20
	s_cbranch_execz .LBB5_92
; %bb.61:                               ; %.lr.ph316.i.preheader
                                        ;   in Loop: Header=BB5_60 Depth=3
	v_dual_mov_b32 v21, -1.0 :: v_dual_mov_b32 v22, 0
	s_mov_b32 s36, 0
	s_mov_b32 s2, -1
	s_mov_b32 s35, exec_lo
                                        ; implicit-def: $vgpr41
	v_cmpx_ne_u32_e32 0, v20
	s_xor_b32 s35, exec_lo, s35
	s_cbranch_execz .LBB5_91
; %bb.62:                               ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB5_60 Depth=3
	s_mov_b32 s37, 0
                                        ; implicit-def: $sgpr36
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $sgpr39
                                        ; implicit-def: $sgpr38
.LBB5_63:                               ; %.lr.ph
                                        ;   Parent Loop BB5_5 Depth=1
                                        ;     Parent Loop BB5_27 Depth=2
                                        ;       Parent Loop BB5_60 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_mov_b32_e32 v53, v52
	v_mov_b32_e32 v41, v20
	v_mov_b32_e32 v55, v40
	s_or_b32 s38, s38, exec_lo
	s_or_b32 s39, s39, exec_lo
                                        ; implicit-def: $sgpr40
                                        ; implicit-def: $vgpr52
                                        ; implicit-def: $vgpr40
                                        ; implicit-def: $sgpr42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e64 v54, v41, 1
	v_and_b32_e32 v20, v54, v53
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, 0, v20
                                        ; implicit-def: $vgpr20
	s_and_saveexec_b32 s41, vcc_lo
	s_cbranch_execz .LBB5_65
; %bb.64:                               ; %.lr.ph316.i
                                        ;   in Loop: Header=BB5_63 Depth=4
	v_lshlrev_b32_e32 v20, 2, v55
	v_not_b32_e32 v22, v54
	s_and_not1_b32 s39, s39, exec_lo
	s_mov_b32 s40, 0
	s_mov_b32 s42, -1.0
	v_ashrrev_i32_e32 v21, 31, v20
	v_and_b32_e32 v52, v53, v22
	s_and_not1_b32 s38, s38, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 4, v[20:21]
	v_add_co_u32 v20, vcc_lo, s12, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v21, vcc_lo, s13, v21, vcc_lo
	global_load_b32 v21, v[20:21], off
	v_add_nc_u32_e32 v20, -1, v41
	v_cmp_eq_u32_e32 vcc_lo, 0, v20
	s_and_b32 s43, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s39, s39, s43
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v40, v21
.LBB5_65:                               ; %Flow640
                                        ;   in Loop: Header=BB5_63 Depth=4
	s_or_b32 exec_lo, exec_lo, s41
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s41, exec_lo, s39
	v_dual_mov_b32 v22, s40 :: v_dual_mov_b32 v21, s42
	s_or_b32 s37, s41, s37
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s41, s38, exec_lo
	s_and_not1_b32 s36, s36, exec_lo
	s_and_b32 s40, s40, exec_lo
	s_or_b32 s2, s2, s41
	s_or_b32 s36, s36, s40
	s_and_not1_b32 exec_lo, exec_lo, s37
	s_cbranch_execnz .LBB5_63
; %bb.66:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB5_60 Depth=3
	s_or_b32 exec_lo, exec_lo, s37
	s_mov_b32 s38, -1
	s_and_saveexec_b32 s37, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s37, exec_lo, s37
	s_cbranch_execz .LBB5_90
; %bb.67:                               ;   in Loop: Header=BB5_60 Depth=3
	v_and_b32_e32 v20, 1, v55
	s_mov_b32 s39, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v20
	v_cndmask_b32_e64 v20, 1, -1, vcc_lo
	v_add_nc_u32_e32 v40, v20, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v20, 2, v40
	v_ashrrev_i32_e32 v21, 31, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 4, v[20:21]
	v_add_co_u32 v20, vcc_lo, s12, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v21, vcc_lo, s13, v21, vcc_lo
	s_clause 0x1
	global_load_b96 v[27:29], v[20:21], off offset:32
	global_load_b96 v[30:32], v[20:21], off offset:48
                                        ; implicit-def: $vgpr20_vgpr21_vgpr22_vgpr23
	s_and_saveexec_b32 s2, s20
	s_xor_b32 s38, exec_lo, s2
	s_cbranch_execz .LBB5_69
; %bb.68:                               ;   in Loop: Header=BB5_60 Depth=3
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v20, v30, v24
	v_sub_f32_e32 v21, v27, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v22, null, v42, v42, v20
	v_div_scale_f32 v23, null, v42, v42, v21
	v_div_scale_f32 v59, vcc_lo, v20, v42, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v52, v22
	v_rcp_f32_e32 v56, v23
	s_waitcnt_depctr 0xfff
	v_fma_f32 v57, -v22, v52, 1.0
	v_fma_f32 v58, -v23, v56, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v52, v57, v52
	v_div_scale_f32 v57, s2, v21, v42, v21
	v_fmac_f32_e32 v56, v58, v56
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v58, v59, v52
	v_mul_f32_e32 v60, v57, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v61, -v22, v58, v59
	v_fma_f32 v62, -v23, v60, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v58, v61, v52
	v_fmac_f32_e32 v60, v62, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v22, -v22, v58, v59
	v_fma_f32 v23, -v23, v60, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v22, v22, v52, v58
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f32 v23, v23, v56, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v20, v22, v42, v20
	v_div_fixup_f32 v21, v23, v42, v21
	v_mov_b32_e32 v23, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, v20, v21
	v_cndmask_b32_e32 v22, v21, v20, vcc_lo
	v_cndmask_b32_e32 v20, v20, v21, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, 0, v20
	v_dual_cndmask_b32 v21, v1, v1 :: v_dual_cndmask_b32 v20, 0, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e32 vcc_lo, v22, v21
	v_dual_cndmask_b32 v21, v21, v22 :: v_dual_mov_b32 v22, 0
	v_cmp_ngt_f32_e32 vcc_lo, v20, v21
	s_and_b32 s39, vcc_lo, exec_lo
.LBB5_69:                               ; %Flow638
                                        ;   in Loop: Header=BB5_60 Depth=3
	s_and_not1_saveexec_b32 s38, s38
	s_cbranch_execz .LBB5_71
; %bb.70:                               ;   in Loop: Header=BB5_60 Depth=3
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v24, v30
	v_cmp_nlt_f32_e64 s2, v24, v27
	v_dual_mov_b32 v23, v3 :: v_dual_mov_b32 v22, v2
	v_dual_mov_b32 v21, v1 :: v_dual_mov_b32 v20, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_not1_b32 s39, s39, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_or_b32 s39, s39, s2
.LBB5_71:                               ; %Flow639
                                        ;   in Loop: Header=BB5_60 Depth=3
	s_or_b32 exec_lo, exec_lo, s38
	s_and_saveexec_b32 s38, s39
	s_cbranch_execz .LBB5_85
; %bb.72:                               ;   in Loop: Header=BB5_60 Depth=3
	s_mov_b32 s40, 0
	s_and_saveexec_b32 s2, s24
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s39, exec_lo, s2
	s_cbranch_execz .LBB5_74
; %bb.73:                               ;   in Loop: Header=BB5_60 Depth=3
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v30, v28, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v56, null, v43, v43, v30
	v_rcp_f32_e32 v58, v56
	s_waitcnt_depctr 0xfff
	v_fma_f32 v60, -v56, v58, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v27, v31, v25 :: v_dual_fmac_f32 v58, v60, v58
	v_div_scale_f32 v52, null, v43, v43, v27
	v_div_scale_f32 v61, vcc_lo, v27, v43, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v57, v52
	s_waitcnt_depctr 0xfff
	v_fma_f32 v59, -v52, v57, 1.0
	v_fmac_f32_e32 v57, v59, v57
	v_div_scale_f32 v59, s2, v30, v43, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v62, v59, v58
	v_fma_f32 v64, -v56, v62, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v62, v64, v58
	v_mul_f32_e32 v60, v61, v57
	v_fma_f32 v56, -v56, v62, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v63, -v52, v60, v61
	v_fmac_f32_e32 v60, v63, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v52, -v52, v60, v61
	v_div_fmas_f32 v52, v52, v57, v60
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f32 v56, v56, v58, v62
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v27, v52, v43, v27
	v_div_fixup_f32 v30, v56, v43, v30
	v_mov_b32_e32 v59, v23
	v_dual_mov_b32 v57, v21 :: v_dual_mov_b32 v56, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, v27, v30
	v_dual_cndmask_b32 v52, v30, v27 :: v_dual_cndmask_b32 v27, v27, v30
	v_cmp_gt_f32_e32 vcc_lo, v27, v20
	v_dual_mov_b32 v58, v22 :: v_dual_cndmask_b32 v23, v23, v59
	v_dual_cndmask_b32 v21, v21, v57 :: v_dual_cndmask_b32 v20, v20, v27
                                        ; kill: def $vgpr27 killed $vgpr27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v22, v22, v58, vcc_lo
	v_cmp_lt_f32_e64 s2, v52, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v21, v21, v52, s2
	v_cmp_ngt_f32_e64 s2, v20, v21
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s40, s2, exec_lo
.LBB5_74:                               ; %Flow633
                                        ;   in Loop: Header=BB5_60 Depth=3
	s_and_not1_saveexec_b32 s39, s39
	s_cbranch_execz .LBB5_76
; %bb.75:                               ;   in Loop: Header=BB5_60 Depth=3
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v25, v31
	v_cmp_nlt_f32_e64 s2, v25, v28
	s_and_not1_b32 s40, s40, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_b32 s2, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s40, s40, s2
.LBB5_76:                               ; %Flow634
                                        ;   in Loop: Header=BB5_60 Depth=3
	s_or_b32 exec_lo, exec_lo, s39
	s_and_saveexec_b32 s39, s40
	s_cbranch_execz .LBB5_84
; %bb.77:                               ;   in Loop: Header=BB5_60 Depth=3
	s_mov_b32 s41, 0
	s_and_saveexec_b32 s2, s24
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s40, exec_lo, s2
	s_cbranch_execz .LBB5_79
; %bb.78:                               ;   in Loop: Header=BB5_60 Depth=3
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v27, v32, v26
	v_sub_f32_e32 v28, v29, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v29, null, v44, v44, v27
	v_div_scale_f32 v57, vcc_lo, v27, v44, v27
	v_rcp_f32_e32 v31, v29
	s_waitcnt_depctr 0xfff
	v_fma_f32 v52, -v29, v31, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v31, v52, v31
	v_div_scale_f32 v30, null, v44, v44, v28
	v_div_scale_f32 v52, s2, v28, v44, v28
	v_rcp_f32_e32 v32, v30
	s_waitcnt_depctr 0xfff
	v_fma_f32 v56, -v30, v32, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v32, v56, v32
	v_mul_f32_e32 v56, v57, v31
	v_mul_f32_e32 v58, v52, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v59, -v29, v56, v57
	v_fma_f32 v60, -v30, v58, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v56, v59, v31
	v_fmac_f32_e32 v58, v60, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v29, -v29, v56, v57
	v_fma_f32 v30, -v30, v58, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v29, v29, v31, v56
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f32 v30, v30, v32, v58
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v27, v29, v44, v27
	v_div_fixup_f32 v28, v30, v44, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cmp_gt_f32_e32 vcc_lo, v27, v28
	v_dual_cndmask_b32 v31, v28, v27 :: v_dual_cndmask_b32 v32, v27, v28
	v_dual_mov_b32 v30, v23 :: v_dual_mov_b32 v29, v22
	v_dual_mov_b32 v28, v21 :: v_dual_mov_b32 v27, v20
	v_cmp_gt_f32_e32 vcc_lo, v32, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v22, v22, v29 :: v_dual_cndmask_b32 v21, v21, v28
	v_cndmask_b32_e32 v20, v20, v32, vcc_lo
                                        ; kill: def $vgpr32 killed $vgpr32
                                        ; implicit-def: $vgpr27_vgpr28_vgpr29
	v_cmp_lt_f32_e32 vcc_lo, v31, v21
	v_cndmask_b32_e32 v21, v21, v31, vcc_lo
                                        ; implicit-def: $vgpr30_vgpr31_vgpr32
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f32_e32 vcc_lo, v20, v21
	s_and_b32 s41, vcc_lo, exec_lo
.LBB5_79:                               ; %Flow629
                                        ;   in Loop: Header=BB5_60 Depth=3
	s_and_not1_saveexec_b32 s40, s40
	s_cbranch_execz .LBB5_81
; %bb.80:                               ;   in Loop: Header=BB5_60 Depth=3
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v26, v32
	v_cmp_nlt_f32_e64 s2, v26, v29
	s_and_not1_b32 s41, s41, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_b32 s2, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s41, s41, s2
.LBB5_81:                               ; %Flow630
                                        ;   in Loop: Header=BB5_60 Depth=3
	s_or_b32 exec_lo, exec_lo, s40
	s_and_saveexec_b32 s2, s41
; %bb.82:                               ;   in Loop: Header=BB5_60 Depth=3
	v_mov_b32_e32 v22, s5
; %bb.83:                               ; %Flow631
                                        ;   in Loop: Header=BB5_60 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
.LBB5_84:                               ; %Flow635
                                        ;   in Loop: Header=BB5_60 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s39
.LBB5_85:                               ; %_Z26kernelIntersectBoundingBoxR15HIP_vector_typeIfLj4EES1_S1_S1_f.exit199.i
                                        ;   in Loop: Header=BB5_60 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s38
	v_cmp_lt_f32_e32 vcc_lo, 0.5, v22
                                        ; implicit-def: $vgpr52
	s_and_saveexec_b32 s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s2
; %bb.86:                               ;   in Loop: Header=BB5_60 Depth=3
	v_fma_f32 v47, v42, v20, v24
	v_fma_f32 v48, v43, v20, v25
	v_fma_f32 v49, v44, v20, v26
	v_or_b32_e32 v52, v54, v53
; %bb.87:                               ; %Flow626
                                        ;   in Loop: Header=BB5_60 Depth=3
	s_and_not1_saveexec_b32 s38, s2
	s_cbranch_execz .LBB5_89
; %bb.88:                               ;   in Loop: Header=BB5_60 Depth=3
	v_lshlrev_b32_e32 v20, 2, v55
	v_add_nc_u32_e32 v41, -1, v41
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v21, 31, v20
	v_lshlrev_b64 v[20:21], 4, v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s2, s12, v20
	v_add_co_ci_u32_e64 v21, s2, s13, v21, s2
	global_load_b32 v20, v[20:21], off
	v_not_b32_e32 v21, v54
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v52, v53, v21
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v40, v20
.LBB5_89:                               ;   in Loop: Header=BB5_60 Depth=3
	s_or_b32 exec_lo, exec_lo, s38
	v_dual_mov_b32 v21, v51 :: v_dual_mov_b32 v22, v41
	s_or_b32 s36, s36, exec_lo
	s_or_not1_b32 s38, vcc_lo, exec_lo
.LBB5_90:                               ; %Flow644
                                        ;   in Loop: Header=BB5_60 Depth=3
	s_or_b32 exec_lo, exec_lo, s37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s36, s36, exec_lo
	s_or_not1_b32 s2, s38, exec_lo
.LBB5_91:                               ; %Flow643
                                        ;   in Loop: Header=BB5_60 Depth=3
	s_or_b32 exec_lo, exec_lo, s35
	v_mov_b32_e32 v20, v22
	s_and_not1_b32 s33, s33, exec_lo
	s_and_b32 s35, s36, exec_lo
	s_and_not1_b32 s31, s31, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_or_b32 s33, s33, s35
	s_or_b32 s31, s31, s2
.LBB5_92:                               ; %Flow642
                                        ;   in Loop: Header=BB5_60 Depth=3
	s_or_b32 exec_lo, exec_lo, s34
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, exec_lo, s31
	v_mov_b32_e32 v22, v20
	s_or_b32 s4, s2, s4
	v_mov_b32_e32 v20, v41
	s_and_not1_b32 s2, s30, exec_lo
	s_and_b32 s30, s33, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s30, s2, s30
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB5_60
; %bb.93:                               ; %Flow645
                                        ;   in Loop: Header=BB5_27 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, s30, exec_lo
                                        ; implicit-def: $vgpr23
.LBB5_94:                               ; %Flow646
                                        ;   in Loop: Header=BB5_27 Depth=2
	s_and_not1_saveexec_b32 s3, s3
; %bb.95:                               ;   in Loop: Header=BB5_27 Depth=2
	v_cvt_f32_i32_e32 v21, v23
	v_mov_b32_e32 v22, v50
	v_mov_b32_e32 v40, v39
	s_and_not1_b32 s2, s2, exec_lo
; %bb.96:                               ; %.loopexit.i
                                        ;   in Loop: Header=BB5_27 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_xor_b32 s2, s2, -1
	v_dual_mov_b32 v51, v21 :: v_dual_mov_b32 v50, v22
	v_mov_b32_e32 v39, v40
	s_and_not1_b32 s3, s28, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s28, s3, s2
.LBB5_97:                               ; %Flow658
                                        ;   in Loop: Header=BB5_27 Depth=2
	s_or_b32 exec_lo, exec_lo, s29
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, exec_lo, s28
	s_or_b32 s25, s2, s25
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s25
	s_cbranch_execnz .LBB5_27
; %bb.98:                               ; %Flow659
                                        ;   in Loop: Header=BB5_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s25
.LBB5_99:                               ; %Flow661
                                        ;   in Loop: Header=BB5_5 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s21
	s_mov_b32 s4, exec_lo
	v_cmpx_nle_f32_e32 0, v21
	s_cbranch_execz .LBB5_105
; %bb.100:                              ;   in Loop: Header=BB5_5 Depth=1
	v_cmp_nlt_f32_e32 vcc_lo, 0x80000000, v46
	v_cndmask_b32_e64 v1, 0, -v46, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, -1.0, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, 1.0, v1, vcc_lo
	v_mul_f32_e32 v1, v45, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f32 v4, v16, v1, v4
	v_fma_f32 v5, v17, v1, v5
	v_fma_f32 v6, v18, v1, v6
	v_fmac_f32_e32 v7, v19, v1
	s_and_saveexec_b32 s20, s0
	s_cbranch_execz .LBB5_104
; %bb.101:                              ;   in Loop: Header=BB5_5 Depth=1
	global_load_b96 v[1:3], v[37:38], off
	v_mul_f32_e32 v20, -2.0, v46
	s_mov_b32 s21, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v43, v9, v20
	v_dual_mul_f32 v21, v43, v43 :: v_dual_fmac_f32 v42, v8, v20
	v_fmac_f32_e32 v44, v10, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v21, v42, v42
	v_fmac_f32_e32 v21, v44, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v20, 0x4f800000, v21
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v21
	v_cndmask_b32_e32 v20, v21, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v21, v20
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v22, -1, v21
	v_add_nc_u32_e32 v23, 1, v21
	v_fma_f32 v24, -v22, v21, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v25, -v23, v21, v20
	v_cmp_ge_f32_e64 s1, 0, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v21, v21, v22, s1
	v_cmp_lt_f32_e64 s1, 0, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v21, v21, v23, s1
	v_mul_f32_e32 v22, 0x37800000, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v21, v21, v22, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v20, 0x260
	v_cndmask_b32_e32 v20, v21, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_scale_f32 v21, null, v20, v20, v42
	v_div_scale_f32 v22, null, v20, v20, v43
	v_div_scale_f32 v24, null, v20, v20, v44
	v_rcp_f32_e32 v23, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(TRANS32_DEP_3)
	v_rcp_f32_e32 v25, v22
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v30, s1, v43, v20, v43
	v_rcp_f32_e32 v26, v24
	v_fma_f32 v27, -v21, v23, 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v29, -v22, v25, 1.0
	v_fmac_f32_e32 v23, v27, v23
	v_fma_f32 v27, -v24, v26, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v25, v29, v25 :: v_dual_fmac_f32 v26, v27, v26
	v_mul_f32_e32 v27, v30, v25
	v_div_scale_f32 v28, vcc_lo, v42, v20, v42
	v_div_scale_f32 v29, s2, v44, v20, v44
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v40, -v22, v27, v30
	v_mul_f32_e32 v31, v28, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v39, v29, v26
	v_fmac_f32_e32 v27, v40, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v32, -v21, v31, v28
	v_fma_f32 v22, -v22, v27, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v31, v32, v23
	v_fma_f32 v32, -v24, v39, v29
	v_fma_f32 v21, -v21, v31, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v39, v32, v26
	v_div_fmas_f32 v21, v21, v23, v31
	s_mov_b32 vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f32 v23, -v24, v39, v29
	v_div_fmas_f32 v22, v22, v25, v27
	s_mov_b32 vcc_lo, s2
	v_div_fixup_f32 v21, v21, v20, v42
	v_div_fmas_f32 v23, v23, v26, v39
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v22, v22, v20, v43
	v_div_fixup_f32 v20, v23, v20, v44
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v22, v2
	v_fmac_f32_e32 v2, v21, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v20, v3
	v_cmp_nlt_f32_e32 vcc_lo, 0x80000000, v2
	v_cndmask_b32_e64 v1, 0, -v2, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, -1.0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, 1.0, v1, vcc_lo
	v_cmpx_lt_f32_e32 0, v1
	s_cbranch_execz .LBB5_103
; %bb.102:                              ;   in Loop: Header=BB5_5 Depth=1
	v_cmp_neq_f32_e32 vcc_lo, 1.0, v1
	v_cndmask_b32_e32 v2, 1.0, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_neq_f32_e32 vcc_lo, 0, v2
	v_cndmask_b32_e32 v1, 1.0, v1, vcc_lo
	v_cmp_neq_f32_e64 s24, v2, |v2|
	v_frexp_mant_f32_e64 v3, |v1|
	v_cmp_lt_f32_e64 s25, |v1|, 1.0
	v_cmp_eq_f32_e64 s3, 0, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v3
	s_xor_b32 s24, s24, s25
	v_cndmask_b32_e64 v20, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v3, v3, v20
	v_add_f32_e32 v22, -1.0, v3
	v_add_f32_e32 v20, 1.0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v21, v20
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v23, v22, v21 :: v_dual_add_f32 v24, -1.0, v20
	v_mul_f32_e32 v25, v20, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v3, v3, v24
	v_fma_f32 v20, v23, v20, -v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v20, v23, v3
	v_add_f32_e32 v3, v25, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v24, v22, v3 :: v_dual_sub_f32 v25, v3, v25
	v_sub_f32_e32 v20, v25, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v22, v22, v24
	v_sub_f32_e32 v3, v22, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v20, v3
	v_add_f32_e32 v3, v24, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, v21, v3
	v_add_f32_e32 v20, v23, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v22, v20, v20
	v_sub_f32_e32 v21, v20, v23
	v_sub_f32_e32 v3, v3, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v21, v20, v20, -v22
	v_add_f32_e32 v23, v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v21, v20, v23
	v_add_f32_e32 v23, v22, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmaak_f32 v24, s9, v23, 0x3e91f4c4
	v_sub_f32_e32 v22, v23, v22
	v_dual_fmaak_f32 v24, v23, v24, 0x3ecccdef :: v_dual_sub_f32 v21, v21, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v25, v23, v24
	v_fma_f32 v22, v23, v24, -v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v22, v21, v24 :: v_dual_mul_f32 v27, v20, v23
	v_add_f32_e32 v24, v25, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v28, v23, v20, -v27
	v_dual_sub_f32 v25, v24, v25 :: v_dual_fmac_f32 v28, v23, v3
	v_add_f32_e32 v26, 0x3f2aaaaa, v24
	v_ldexp_f32 v3, v3, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v22, v22, v25
	v_fmac_f32_e32 v28, v21, v20
	v_ldexp_f32 v20, v20, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v22, 0x31739010, v22
	v_add_f32_e32 v25, 0xbf2aaaaa, v26
	v_sub_f32_e32 v24, v24, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v22, v22, v24
	v_add_f32_e32 v21, v26, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v23, v27, v28 :: v_dual_sub_f32 v24, v26, v21
	v_mul_f32_e32 v25, v23, v21
	v_sub_f32_e32 v26, v23, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v22, v22, v24
	v_fma_f32 v24, v23, v21, -v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v26, v28, v26
	v_fmac_f32_e32 v24, v23, v22
	v_frexp_exp_i32_f32_e32 v22, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v24, v26, v21
	v_subrev_co_ci_u32_e32 v21, vcc_lo, 0, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v22, v25, v24
	v_cvt_f32_i32_e32 v21, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v25, v22, v25
	v_add_f32_e32 v23, v20, v22
	v_sub_f32_e32 v24, v24, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v26, 0x3f317218, v21 :: v_dual_add_f32 v3, v3, v24
	v_fma_f32 v25, 0x3f317218, v21, -v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v25, 0xb102e308, v21 :: v_dual_sub_f32 v20, v23, v20
	v_sub_f32_e32 v20, v22, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v20
	v_dual_add_f32 v21, v23, v3 :: v_dual_add_f32 v20, v26, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v23, v21, v23 :: v_dual_add_f32 v22, v20, v21
	v_dual_sub_f32 v3, v3, v23 :: v_dual_sub_f32 v24, v22, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v21, v21, v24 :: v_dual_sub_f32 v26, v20, v26
	v_sub_f32_e32 v27, v22, v24
	v_sub_f32_e32 v25, v25, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v23, v25, v3
	v_sub_f32_e32 v20, v20, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v20, v21, v20 :: v_dual_sub_f32 v21, v23, v25
	v_sub_f32_e32 v3, v3, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v20, v23, v20
	v_sub_f32_e32 v23, v23, v21
	v_dual_sub_f32 v21, v25, v23 :: v_dual_add_f32 v24, v22, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v3, v3, v21 :: v_dual_sub_f32 v22, v24, v22
	v_sub_f32_e32 v20, v20, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v20
	v_add_f32_e32 v20, v24, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v21, v20, v24
	v_dual_mul_f32 v22, v2, v20 :: v_dual_sub_f32 v3, v3, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v20, v2, v20, -v22
	v_cmp_class_f32_e64 vcc_lo, v22, 0x204
	v_fmac_f32_e32 v20, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v22, v20
	v_cndmask_b32_e32 v21, v3, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v21
	v_cndmask_b32_e64 v23, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v21|
	v_sub_f32_e32 v24, v21, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v25, 0x3fb8aa3b, v24
	v_cmp_nlt_f32_e64 s1, 0x42b17218, v24
	v_fma_f32 v26, 0x3fb8aa3b, v24, -v25
	v_rndne_f32_e32 v27, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v26, 0x32a5705f, v24 :: v_dual_sub_f32 v25, v25, v27
	v_add_f32_e32 v25, v25, v26
	v_sub_f32_e32 v3, v3, v22
	v_cvt_i32_f32_e32 v22, v27
	v_trunc_f32_e32 v26, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_exp_f32_e32 v25, v25
	v_dual_sub_f32 v3, v20, v3 :: v_dual_mul_f32 v20, 0.5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v24
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v22, v25, v22
	v_add_f32_e32 v3, v23, v3
	v_cndmask_b32_e32 v21, 0, v22, vcc_lo
	v_trunc_f32_e32 v22, v20
	v_cmp_gt_f32_e32 vcc_lo, 0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v21, 0x7f800000, v21, s1
	v_cmp_eq_f32_e64 s1, v26, v2
	v_cmp_neq_f32_e64 s2, v22, v20
	v_cndmask_b32_e64 v20, |v2|, 0, s24
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v3, v21, v3, v21
	s_and_b32 s1, s1, s2
	v_cmp_eq_f32_e64 s2, 0x7f800000, v21
	v_cndmask_b32_e64 v22, 1.0, v1, s1
	v_cndmask_b32_e64 v23, 0, v1, s1
	v_cmp_eq_f32_e64 s1, |v1|, 1.0
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v3, v3, v21, s2
	s_xor_b32 s2, vcc_lo, s3
	v_cmp_class_f32_e64 vcc_lo, v2, 0x204
	v_cndmask_b32_e64 v21, 0x7f800000, 0, s2
	v_cndmask_b32_e64 v20, v20, |v1|, s1
	v_bfi_b32 v3, 0x7fffffff, v3, v22
	v_cmp_class_f32_e64 s1, v1, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfi_b32 v21, 0x7fffffff, v21, v23
	v_cndmask_b32_e32 v3, v3, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 vcc_lo, s3, s1
	v_cndmask_b32_e32 v3, v3, v21, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, 0x7fc00000, v3, vcc_lo
	v_fmac_f32_e32 v4, v12, v1
	v_fmac_f32_e32 v5, v13, v1
	v_fmac_f32_e32 v6, v14, v1
	v_fmac_f32_e32 v7, v15, v1
.LBB5_103:                              ; %Flow
                                        ;   in Loop: Header=BB5_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s21
.LBB5_104:                              ; %Flow624
                                        ;   in Loop: Header=BB5_5 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s20
.LBB5_105:                              ; %Flow625
                                        ;   in Loop: Header=BB5_5 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB5_106:                              ; %Flow675
                                        ;   in Loop: Header=BB5_5 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s11
.LBB5_107:                              ;   in Loop: Header=BB5_5 Depth=1
	s_xor_b32 s1, s10, -1
	s_mov_b64 s[2:3], 1
	s_and_b32 vcc_lo, exec_lo, s1
	s_mov_b32 s10, 0
	s_cbranch_vccz .LBB5_5
; %bb.108:
	v_lshlrev_b64 v[0:1], 2, v[33:34]
	v_mul_f32_e32 v5, v11, v5
	v_mul_f32_e32 v4, v11, v4
	v_mul_f32_e32 v7, v11, v7
	v_mul_f32_e32 v6, v11, v6
	v_add_co_u32 v0, vcc_lo, s22, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s23, v1, vcc_lo
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 4, v[0:1]
	v_add_co_u32 v8, vcc_lo, s26, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s27, v1, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0, v4
	global_load_b128 v[0:3], v[8:9], off
	v_cndmask_b32_e32 v10, 0, v4, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0, v5
	v_cndmask_b32_e32 v11, 0, v5, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0, v6
	v_cndmask_b32_e32 v12, 0, v6, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0, v7
	v_cndmask_b32_e32 v13, 0, v7, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 1.0, v4
	v_cndmask_b32_e32 v4, 1.0, v10, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 1.0, v5
	v_cndmask_b32_e32 v5, 1.0, v11, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 1.0, v6
	v_cndmask_b32_e32 v6, 1.0, v12, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 1.0, v7
	s_waitcnt vmcnt(0)
	v_dual_cndmask_b32 v7, 1.0, v13 :: v_dual_add_f32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v1, v5, v1 :: v_dual_add_f32 v2, v6, v2
	v_add_f32_e32 v3, v7, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_ngt_f32_e32 vcc_lo, 0, v0
	v_cndmask_b32_e32 v4, 0, v0, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0, v1
	v_cndmask_b32_e32 v5, 0, v1, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0, v2
	v_cndmask_b32_e32 v6, 0, v2, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v7, 0, v3, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 1.0, v0
	v_cndmask_b32_e32 v0, 1.0, v4, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 1.0, v1
	v_cndmask_b32_e32 v1, 1.0, v5, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 1.0, v2
	v_cndmask_b32_e32 v2, 1.0, v6, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 1.0, v3
	v_cndmask_b32_e32 v3, 1.0, v7, vcc_lo
	global_store_b128 v[8:9], v[0:3], off
.LBB5_109:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 392
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 78
		.amdhsa_next_free_sgpr 44
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_, .Lfunc_end5-_Z17kernelPixelShaderP15HIP_vector_typeIfLj4EES1_S1_PS_IfLj2EES1_PiS4_S1_S4_S1_S4_S1_iS1_S4_S1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 9080
; NumSgprs: 46
; NumVgprs: 78
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 9
; NumSGPRsForWavesPerEU: 46
; NumVGPRsForWavesPerEU: 78
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi ; -- Begin function _Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi
	.globl	_Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi
	.p2align	8
	.type	_Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi,@function
_Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi: ; @_Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x54
	s_load_b32 s3, s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB6_16
; %bb.1:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x40
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_lshlrev_b64 v[16:17], 4, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v14, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v15, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v17, vcc_lo
	global_store_b32 v[14:15], v5, off
	global_load_b128 v[0:3], v[0:1], off
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v4, v3
	v_cmp_lt_i32_e32 vcc_lo, -1, v4
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB6_16
; %bb.2:
	v_add_co_u32 v4, vcc_lo, s8, v16
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v17, vcc_lo
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x20
	s_load_b128 s[12:15], s[0:1], 0x30
                                        ; implicit-def: $vgpr19
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $vgpr22
	s_mov_b32 s0, exec_lo
	global_load_b128 v[8:11], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 2, v4
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 4, v[4:5]
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, s10, v16
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v17, vcc_lo
	global_load_b96 v[11:13], v[4:5], off offset:52
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s2, v16
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v17, vcc_lo
	global_load_b32 v18, v[6:7], off offset:12
	global_load_b128 v[4:7], v[4:5], off
	s_mov_b32 s3, 0
	s_waitcnt vmcnt(2)
	v_cmpx_nlt_f32_e32 0, v11
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB6_12
; %bb.3:
	s_mov_b32 s4, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr19
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $vgpr22
	v_cmpx_lt_f32_e32 0, v12
	s_cbranch_execz .LBB6_11
; %bb.4:
	v_div_scale_f32 v19, null, v13, v13, 1.0
	v_div_scale_f32 v21, vcc_lo, 1.0, v13, 1.0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v20, v19
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v19, v20, 1.0
	v_fmac_f32_e32 v20, v11, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v22, v21, v20
	v_fma_f32 v11, -v19, v22, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v22, v11, v20
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v11, v8, v4
	v_fma_f32 v19, -v19, v22, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v21, v9, v5, v11
	v_fmac_f32_e32 v21, v10, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v19, v19, v20, v22
	v_div_fixup_f32 v20, v19, v13, 1.0
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_lt_f32_e32 0, v21
	s_cbranch_execz .LBB6_6
; %bb.5:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_scale_f32 v13, null, v20, v20, 1.0
	v_div_scale_f32 v22, vcc_lo, 1.0, v20, 1.0
	v_fma_f32 v11, v5, -v9, -v11
	v_rcp_f32_e32 v19, v13
	v_xor_b32_e32 v9, 0x80000000, v9
	v_xor_b32_e32 v8, 0x80000000, v8
	s_waitcnt_depctr 0xfff
	v_fma_f32 v21, -v13, v19, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v19, v21, v19
	v_mul_f32_e32 v21, v22, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v23, -v13, v21, v22
	v_fmac_f32_e32 v21, v23, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f32 v13, -v13, v21, v22
	v_mul_f32_e32 v22, v10, v6
	v_xor_b32_e32 v10, 0x80000000, v10
	v_div_fmas_f32 v13, v13, v19, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v21, v11, v22
	v_div_fixup_f32 v20, v13, v20, 1.0
.LBB6_6:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v11, v20, v20
	v_fma_f32 v13, -v21, v21, 1.0
                                        ; implicit-def: $vgpr19
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v22, -v13, v11, 1.0
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr11
	v_cmpx_ngt_f32_e32 0, v22
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB6_8
; %bb.7:
	v_mul_f32_e32 v11, 0x4f800000, v22
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v11, v22, v11, vcc_lo
	v_sqrt_f32_e32 v13, v11
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v22, 1, v13
	v_add_nc_u32_e32 v19, -1, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v24, -v22, v13, v11
	v_fma_f32 v23, -v19, v13, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v23
	v_cndmask_b32_e64 v13, v13, v19, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v24
	v_cndmask_b32_e64 v13, v13, v22, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v19, 0x37800000, v13
	v_cndmask_b32_e32 v13, v13, v19, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v11, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v11, v13, v11, vcc_lo
	v_fma_f32 v19, v20, -v21, -v11
                                        ; implicit-def: $vgpr21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v11, v8, v19
	v_mul_f32_e32 v13, v9, v19
	v_mul_f32_e32 v19, v10, v19
                                        ; implicit-def: $vgpr8
	v_fmac_f32_e32 v11, v4, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v13, v5, v20
	v_fmac_f32_e32 v19, v6, v20
.LBB6_8:                                ; %Flow
	s_and_not1_saveexec_b32 s0, s1
; %bb.9:
	v_mul_f32_e32 v19, -2.0, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f32 v11, v19, v8, v4
	v_fma_f32 v13, v19, v9, v5
	v_fma_f32 v19, v10, v19, v6
; %bb.10:                               ; %_Z9d_refractRK15HIP_vector_typeIfLj4EES0_f.exit
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v4, v13, v13
	s_mov_b32 s4, exec_lo
	v_mul_f32_e32 v7, v12, v7
	v_fmac_f32_e32 v4, v11, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v19, v19
	v_mul_f32_e32 v5, 0x4f800000, v4
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	v_sqrt_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v6, -1, v5
	v_add_nc_u32_e32 v8, 1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v9, -v6, v5, v4
	v_fma_f32 v10, -v8, v5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v9
	v_cndmask_b32_e64 v5, v5, v6, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v10
	v_cndmask_b32_e64 v5, v5, v8, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, 0x37800000, v5
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v4, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v6, v5, v4, vcc_lo
	v_div_scale_f32 v4, null, v6, v6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v9, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v23, -v4, v9, 1.0
	v_fmac_f32_e32 v9, v23, v9
	v_div_scale_f32 v5, null, v6, v6, v13
	v_div_scale_f32 v8, null, v6, v6, v19
	v_div_scale_f32 v21, vcc_lo, v11, v6, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v10, v5
	v_rcp_f32_e32 v20, v8
	v_div_scale_f32 v22, s0, v13, v6, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v23, v21, v9
	v_div_scale_f32 v26, s1, v19, v6, v19
	v_fma_f32 v27, -v4, v23, v21
	s_waitcnt_depctr 0xfff
	v_fma_f32 v24, -v5, v10, 1.0
	v_fma_f32 v25, -v8, v20, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v23, v27, v9 :: v_dual_fmac_f32 v10, v24, v10
	v_fmac_f32_e32 v20, v25, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v4, -v4, v23, v21
	v_mul_f32_e32 v24, v22, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v25, v26, v20
	v_div_fmas_f32 v4, v4, v9, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v28, -v5, v24, v22
	v_fma_f32 v29, -v8, v25, v26
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v4, v4, v6, v11
	v_dual_fmac_f32 v24, v28, v10 :: v_dual_fmac_f32 v25, v29, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v5, -v5, v24, v22
	v_fma_f32 v8, -v8, v25, v26
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v22, 0x3ca3d70a, v4
	v_div_fmas_f32 v5, v5, v10, v24
	s_mov_b32 vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v8, v8, v20, v25
	v_div_fixup_f32 v5, v5, v6, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v6, v8, v6, v19
	v_add_co_u32 v8, vcc_lo, s14, v16
	v_mul_f32_e32 v21, 0x3ca3d70a, v5
	v_add_co_ci_u32_e32 v9, vcc_lo, s15, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mul_f32 v20, 0x3ca3d70a, v6 :: v_dual_mul_f32 v19, 0x3ca3d70a, v7
	global_store_b128 v[8:9], v[4:7], off
.LBB6_11:                               ; %Flow166
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s3, s4, exec_lo
                                        ; implicit-def: $vgpr8_vgpr9_vgpr10_vgpr11
                                        ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13
.LBB6_12:                               ; %Flow165
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB6_14
; %bb.13:
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v12, v9, v5
	s_or_b32 s3, s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v7, v11, v7 :: v_dual_fmac_f32 v12, v8, v4
	v_fmac_f32_e32 v12, v10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, -2.0, v12
	v_fma_f32 v5, v9, v12, v5
	v_fma_f32 v4, v8, v12, v4
	v_fma_f32 v6, v10, v12, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v5, v5
	v_fmac_f32_e32 v8, v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v6, v6
	v_mul_f32_e32 v9, 0x4f800000, v8
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v8, v9, vcc_lo
	v_sqrt_f32_e32 v9, v8
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v10, -1, v9
	v_add_nc_u32_e32 v12, 1, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v13, -v10, v9, v8
	v_fma_f32 v19, -v12, v9, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v13
	v_cndmask_b32_e64 v9, v9, v10, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v19
	v_cndmask_b32_e64 v9, v9, v12, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, 0x37800000, v9
	v_cndmask_b32_e32 v9, v9, v10, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v8, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v9, v8, vcc_lo
	v_div_scale_f32 v9, null, v8, v8, v4
	v_div_scale_f32 v10, null, v8, v8, v5
	v_div_scale_f32 v21, vcc_lo, v4, v8, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v13, v9
	v_rcp_f32_e32 v19, v10
	v_div_scale_f32 v22, s0, v5, v8, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v23, -v9, v13, 1.0
	v_fma_f32 v24, -v10, v19, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v13, v23, v13
	v_fmac_f32_e32 v19, v24, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v23, v21, v13 :: v_dual_mul_f32 v24, v22, v19
	v_fma_f32 v27, -v9, v23, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v28, -v10, v24, v22
	v_dual_fmac_f32 v23, v27, v13 :: v_dual_fmac_f32 v24, v28, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v9, -v9, v23, v21
	v_fma_f32 v10, -v10, v24, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v9, v9, v13, v23
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f32 v10, v10, v19, v24
	v_mul_f32_e32 v19, 0x3dcccccd, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v5, v10, v8, v5
	v_mul_f32_e32 v21, 0x3dcccccd, v5
	v_div_scale_f32 v12, null, v8, v8, v6
	v_div_scale_f32 v26, s1, v6, v8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_mov_b32 vcc_lo, s1
	v_rcp_f32_e32 v20, v12
	v_div_fixup_f32 v4, v9, v8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v22, 0x3dcccccd, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v25, -v12, v20, 1.0
	v_fmac_f32_e32 v20, v25, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v25, v26, v20
	v_fma_f32 v29, -v12, v25, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v25, v29, v20
	v_fma_f32 v12, -v12, v25, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v12, v12, v20, v25
	v_div_fixup_f32 v6, v12, v8, v6
	v_add_co_u32 v8, vcc_lo, s14, v16
	v_add_co_ci_u32_e32 v9, vcc_lo, s15, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f32_e32 v20, 0x3dcccccd, v6
	global_store_b128 v[8:9], v[4:7], off
.LBB6_14:                               ; %Flow167
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB6_16
; %bb.15:                               ; %.sink.split
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, s12, v16
	v_dual_add_f32 v0, v0, v22 :: v_dual_add_f32 v1, v1, v21
	v_dual_add_f32 v2, v2, v20 :: v_dual_add_f32 v3, v3, v19
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v17, vcc_lo
	v_mov_b32_e32 v6, 1
	s_clause 0x1
	global_store_b128 v[4:5], v[0:3], off
	global_store_b32 v[4:5], v18, off offset:12
	global_store_b32 v[14:15], v6, off
.LBB6_16:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 30
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi, .Lfunc_end6-_Z27kernelGenerateNextLevelRaysP15HIP_vector_typeIfLj4EES1_S1_S1_S1_iS1_S1_Pi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2052
; NumSgprs: 18
; NumVgprs: 30
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 30
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_ ; -- Begin function _Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_
	.globl	_Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_
	.p2align	8
	.type	_Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_,@function
_Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_: ; @_Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v2
	s_cbranch_execz .LBB7_3
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x10
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v0, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB7_3
; %bb.2:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b128 s[8:11], s[0:1], 0x20
	v_lshlrev_b64 v[6:7], 4, v[2:3]
	v_ashrrev_i32_e32 v1, 31, v0
	s_load_b64 s[0:1], s[0:1], 0x30
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[10:11], 4, v[0:1]
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v7, vcc_lo
	v_add_co_u32 v12, vcc_lo, s8, v10
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v11, vcc_lo
	global_load_b128 v[2:5], v[8:9], off
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b128 v[12:13], v[2:5], off
	global_load_b128 v[2:5], v[6:7], off
	v_add_co_u32 v6, vcc_lo, s10, v10
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v11, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b128 v[6:7], v[2:5], off
	global_load_b32 v2, v[8:9], off offset:12
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v2, v2
	global_store_b32 v[0:1], v2, off
.LBB7_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_, .Lfunc_end7-_Z17kernelCopyNewRaysP15HIP_vector_typeIfLj4EES1_PiiS1_S1_S2_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 328
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10kernelScanPiiiS_    ; -- Begin function _Z10kernelScanPiiiS_
	.globl	_Z10kernelScanPiiiS_
	.p2align	8
	.type	_Z10kernelScanPiiiS_,@function
_Z10kernelScanPiiiS_:                   ; @_Z10kernelScanPiiiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s8, s15
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s2, s15, s2
	v_add_lshl_u32 v3, s2, v0, 1
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_or_b32_e32 v1, 1, v3
	v_cmpx_le_i32_e64 s6, v3
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB8_2
; %bb.1:
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_mov_b32_e32 v7, 0
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_store_b32 v[5:6], v7, off
.LBB8_2:                                ; %Flow
	s_and_not1_saveexec_b32 s3, s3
; %bb.3:
	s_add_i32 s6, s6, -1
	v_ashrrev_i32_e32 v2, 31, v1
	v_cmp_eq_u32_e32 vcc_lo, s6, v3
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s6
; %bb.4:                                ; %Flow76
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB8_6
; %bb.5:                                ; %._crit_edge.sink.split
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_mov_b32_e32 v7, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_store_b32 v[5:6], v7, off
.LBB8_6:                                ; %._crit_edge
	s_or_b32 exec_lo, exec_lo, s3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_lshlrev_b32_e32 v7, 3, v0
	v_lshl_or_b32 v8, v0, 1, 1
	s_mov_b32 s2, 1
	s_movk_i32 s3, 0x100
	v_add_co_u32 v1, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v6, vcc_lo
	s_clause 0x1
	global_load_b32 v5, v[1:2], off
	global_load_b32 v6, v[3:4], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v7, v[5:6]
.LBB8_7:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s3, v0
	s_cbranch_execz .LBB8_9
; %bb.8:                                ;   in Loop: Header=BB8_7 Depth=1
	v_mul_lo_u32 v5, s2, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v5, v5, 2, -4
	v_lshl_add_u32 v6, s2, 2, v5
	ds_load_b32 v5, v5
	ds_load_b32 v9, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v5, v9, v5
	ds_store_b32 v6, v5
.LBB8_9:                                ;   in Loop: Header=BB8_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_lshr_b32 s4, s3, 1
	s_lshl_b32 s2, s2, 1
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s4
	s_cbranch_scc0 .LBB8_7
; %bb.10:
	v_add_nc_u32_e64 v9, 0xfc, 0
	v_mov_b32_e32 v10, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	ds_load_2addr_stride64_b32 v[5:6], v9 offset0:3 offset1:7
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB8_12
; %bb.11:
	s_waitcnt lgkmcnt(0)
	ds_store_2addr_stride64_b32 v9, v10, v5 offset0:3 offset1:7
.LBB8_12:                               ; %.preheader
	s_or_b32 exec_lo, exec_lo, s2
	s_mov_b32 s4, 2
	s_movk_i32 s3, 0x100
.LBB8_13:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshr_b32 s3, s3, 1
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s4, v0
	s_cbranch_execz .LBB8_15
; %bb.14:                               ;   in Loop: Header=BB8_13 Depth=1
	v_mul_u32_u24_e32 v9, s3, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v9, v9, 2, -4
	v_lshl_add_u32 v10, s3, 2, v9
	ds_load_b32 v11, v9
	ds_load_b32 v12, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v11, v12, v11
	ds_store_b32 v9, v12
	ds_store_b32 v10, v11
.LBB8_15:                               ;   in Loop: Header=BB8_13 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_lshl_b32 s2, s4, 1
	s_cmpk_gt_u32 s4, 0xff
	s_mov_b32 s4, s2
	s_cbranch_scc0 .LBB8_13
; %bb.16:
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b64 v[7:8], v7
	s_cmp_gt_i32 s7, 0
	s_mov_b32 s9, 0
	s_cselect_b32 s2, -1, 0
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b32 v[1:2], v7, off
	global_store_b32 v[3:4], v8, off
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB8_18
; %bb.17:
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v5, v6
	s_lshl_b64 s[2:3], s[8:9], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_store_b32 v1, v0, s[0:1]
.LBB8_18:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernelScanPiiiS_
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	_Z10kernelScanPiiiS_, .Lfunc_end8-_Z10kernelScanPiiiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 740
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16kernelUniformAddPiS_ ; -- Begin function _Z16kernelUniformAddPiS_
	.globl	_Z16kernelUniformAddPiS_
	.p2align	8
	.type	_Z16kernelUniformAddPiS_,@function
_Z16kernelUniformAddPiS_:               ; @_Z16kernelUniformAddPiS_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v0, 23, v2
	v_add_nc_u32_e32 v0, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 9, v0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernelUniformAddPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end9:
	.size	_Z16kernelUniformAddPiS_, .Lfunc_end9-_Z16kernelUniformAddPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_ ; -- Begin function _Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_
	.globl	_Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_
	.p2align	8
	.type	_Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_,@function
_Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_: ; @_Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[8:9], null, s15, s2, v[0:1]
	s_mul_i32 s2, s5, s4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v8
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB10_10
; %bb.1:
	s_load_b64 s[6:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v9, 31, v8
	s_ashr_i32 s3, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s2, s4, s3
	v_lshlrev_b64 v[4:5], 4, v[8:9]
	s_xor_b32 s2, s2, s3
	v_add_nc_u32_e32 v12, v8, v9
	v_cvt_f32_u32_e32 v10, s2
	s_sub_i32 s8, 0, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v12, v12, v9
	v_rcp_iflag_f32_e32 v10, v10
	v_xor_b32_e32 v9, s3, v9
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v5, vcc_lo
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v10, 0x4f7ffffe, v10
	global_load_b128 v[0:3], v[6:7], off
	v_cvt_u32_f32_e32 v10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, s8, v10
	s_mov_b32 s8, exec_lo
	v_mul_hi_u32 v11, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v10, v10, v11
	v_mul_hi_u32 v10, v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, v10, s2
	v_sub_nc_u32_e32 v11, v12, v11
	v_add_nc_u32_e32 v12, 1, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v13, s2, v11
	v_cmp_le_u32_e32 vcc_lo, s2, v11
	v_cndmask_b32_e32 v11, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v13, 0 :: v_dual_cndmask_b32 v10, v10, v12
	v_cmp_le_u32_e32 vcc_lo, s2, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v11, 0 :: v_dual_add_nc_u32 v12, 1, v10
	v_cndmask_b32_e32 v10, v10, v12, vcc_lo
	v_mov_b32_e32 v12, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v10, v10, v9
	v_sub_nc_u32_e32 v14, v10, v9
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v9, v14, s4
	v_sub_nc_u32_e32 v15, v8, v9
	v_mov_b32_e32 v9, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_lt_i32_e32 0, v15
	s_cbranch_execz .LBB10_3
; %bb.2:
	global_load_b128 v[10:13], v[6:7], off offset:-16
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v9, v1, v11 :: v_dual_sub_f32 v16, v0, v10
	v_sub_f32_e32 v17, v2, v12
	v_add_f32_e32 v11, 0, v11
	v_add_f32_e32 v13, 0, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v9, v9, v9 :: v_dual_add_f32 v12, 0, v12
	v_fmac_f32_e32 v9, v16, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v17, v17
	v_mul_f32_e32 v16, 0x4f800000, v9
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v9, v9, v16, vcc_lo
	v_sqrt_f32_e32 v16, v9
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v17, -1, v16
	v_add_nc_u32_e32 v18, 1, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v19, -v17, v16, v9
	v_fma_f32 v20, -v18, v16, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v19
	v_cndmask_b32_e64 v16, v16, v17, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v20
	v_cndmask_b32_e64 v16, v16, v18, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, 0x37800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v9, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v16, v16, v9 :: v_dual_add_f32 v9, 0, v10
	v_cmp_lt_f32_e32 vcc_lo, 0x3ecccccd, v16
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v10, 0, 1, vcc_lo
.LBB10_3:
	s_or_b32 exec_lo, exec_lo, s8
	s_add_i32 s2, s4, -1
	s_mov_b32 s8, exec_lo
	v_cmpx_gt_i32_e64 s2, v15
	s_cbranch_execz .LBB10_5
; %bb.4:
	global_load_b128 v[15:18], v[6:7], off offset:16
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v19, v1, v16 :: v_dual_sub_f32 v20, v0, v15
	v_sub_f32_e32 v21, v2, v17
	v_add_f32_e32 v9, v9, v15
	v_add_f32_e32 v11, v11, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v19, v19, v19
	v_dual_add_f32 v13, v13, v18 :: v_dual_add_f32 v12, v12, v17
	v_fmac_f32_e32 v19, v20, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v19, v21, v21
	v_mul_f32_e32 v20, 0x4f800000, v19
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v19, v19, v20, vcc_lo
	v_sqrt_f32_e32 v20, v19
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v21, -1, v20
	v_add_nc_u32_e32 v22, 1, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v23, -v21, v20, v19
	v_fma_f32 v24, -v22, v20, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v23
	v_cndmask_b32_e64 v20, v20, v21, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v24
	v_cndmask_b32_e64 v20, v20, v22, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v21, 0x37800000, v20
	v_cndmask_b32_e32 v20, v20, v21, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v19, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v19, v20, v19, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, 0x3ecccccd, v19
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
.LBB10_5:
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s8, exec_lo
	v_cmpx_lt_i32_e32 0, v14
	s_cbranch_execz .LBB10_7
; %bb.6:
	v_subrev_nc_u32_e32 v15, s4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v16, 31, v15
	v_lshlrev_b64 v[15:16], 4, v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v15, vcc_lo, s6, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s7, v16, vcc_lo
	global_load_b128 v[15:18], v[15:16], off
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v8, v1, v16 :: v_dual_sub_f32 v19, v0, v15
	v_sub_f32_e32 v20, v2, v17
	v_dual_add_f32 v12, v12, v17 :: v_dual_add_f32 v13, v13, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v8, v8, v8 :: v_dual_add_f32 v9, v9, v15
	v_add_f32_e32 v11, v11, v16
	v_fmac_f32_e32 v8, v19, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v20, v20
	v_mul_f32_e32 v19, 0x4f800000, v8
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v8, v19, vcc_lo
	v_sqrt_f32_e32 v19, v8
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v20, -1, v19
	v_add_nc_u32_e32 v21, 1, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v22, -v20, v19, v8
	v_fma_f32 v23, -v21, v19, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v22
	v_cndmask_b32_e64 v19, v19, v20, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v23
	v_cndmask_b32_e64 v19, v19, v21, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v20, 0x37800000, v19
	v_cndmask_b32_e32 v19, v19, v20, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v8, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v19, v8, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, 0x3ecccccd, v8
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
.LBB10_7:
	s_or_b32 exec_lo, exec_lo, s8
	s_add_i32 s2, s5, -1
	s_mov_b32 s6, exec_lo
	v_cmpx_gt_i32_e64 s2, v14
	s_cbranch_execz .LBB10_9
; %bb.8:
	s_mov_b32 s5, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[4:5], 4
	v_add_co_u32 v6, vcc_lo, v6, s2
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	global_load_b128 v[14:17], v[6:7], off
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v6, v1, v15 :: v_dual_sub_f32 v7, v0, v14
	v_sub_f32_e32 v8, v2, v16
	v_dual_add_f32 v12, v12, v16 :: v_dual_add_f32 v9, v9, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v6, v6, v6 :: v_dual_add_f32 v11, v11, v15
	v_dual_add_f32 v13, v13, v17 :: v_dual_fmac_f32 v6, v7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v8, v8
	v_mul_f32_e32 v7, 0x4f800000, v6
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v6, v6, v7, vcc_lo
	v_sqrt_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v8, -1, v7
	v_add_nc_u32_e32 v18, 1, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v19, -v8, v7, v6
	v_fma_f32 v20, -v18, v7, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v19
	v_cndmask_b32_e64 v7, v7, v8, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v20
	v_cndmask_b32_e64 v7, v7, v18, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, 0x37800000, v7
	v_cndmask_b32_e32 v7, v7, v8, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v6, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v6, v7, v6, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, 0x3ecccccd, v6
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
.LBB10_9:
	s_or_b32 exec_lo, exec_lo, s6
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mul_f32 v6, 0x3e800000, v12 :: v_dual_mul_f32 v7, 0x3e800000, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e32 vcc_lo, 1, v10
	v_dual_mul_f32 v8, 0x3e800000, v11 :: v_dual_mul_f32 v9, 0x3e800000, v9
	s_waitcnt vmcnt(0)
	v_dual_cndmask_b32 v3, v3, v7 :: v_dual_cndmask_b32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v1, v1, v8 :: v_dual_cndmask_b32 v0, v0, v9
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	global_store_b128 v[4:5], v[0:3], off
.LBB10_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end10:
	.size	_Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_, .Lfunc_end10-_Z16kernelClearNoiseP15HIP_vector_typeIfLj4EEiiS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1400
; NumSgprs: 18
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	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
