/* Voxel sampling GPU implementation
 * Author Zhaoyu SU
 * All Rights Reserved. Sep., 2019.
 */
#include <stdio.h>
#include <time.h>
#include <sys/time.h>
#include <iostream>
#include <vector>
#define USECPSEC 1000000ULL

__device__ inline int binary_search(const long long* input_voxel_idx,
                             int start_id,
                             int stop_id,
                             long long target_voxel_id) {
//    if (threadIdx.x==0)
    if (input_voxel_idx[start_id] > target_voxel_id || input_voxel_idx[stop_id] < target_voxel_id)
        return -1;
    while (start_id <= stop_id) {
        int m = start_id + (stop_id - start_id) / 2;
        if (input_voxel_idx[m] == target_voxel_id)
            return m;
        if (input_voxel_idx[m] < target_voxel_id)
            start_id = m + 1;
        else
            stop_id = m - 1;
    }
    return -1;
}

//__device__ int start_loc_search(const long long* input_voxel_idx,
//                                int grid_buffer_size,
//                                int start_id, int loc) {
//    long long input_idx = input_voxel_idx[loc];
//    long long query_idx = input_idx;
//    int start_loc = loc;
//    int count = 0;
//    while(query_idx == input_idx && start_loc > start_id && count < grid_buffer_size) {
//        query_idx = input_voxel_idx[--start_loc];
//        count += 1;
//    }
//    if (query_idx != input_idx)
//        start_loc += 1;
//    return start_loc;
//}

__device__ inline int start_loc_search(const long long* input_voxel_idx,
                               int grid_buffer_size,
                               int start_loc, int loc) {
    long long input_idx = input_voxel_idx[loc];
    int count = 0;
//    printf("%d, %d\n", ret_loc, loc);
    int ret_loc = loc;
    for (ret_loc = loc; ret_loc > start_loc && count < grid_buffer_size; --ret_loc) {
//    while(query_idx == input_idx && ret_loc < stop_loc && count < grid_buffer_size) {
        if (input_voxel_idx[ret_loc] != input_idx) {
            ret_loc++;
            break;
        }
//        printf("%lld@%d, %lld@%d\n", input_idx, loc, query_idx, ret_loc);
        count++;
    }
//    if (query_idx != input_idx)
//        ret_loc -= 1;
    return ret_loc;
}

__device__ inline int stop_loc_search(const long long* input_voxel_idx,
                               int grid_buffer_size,
                               int stop_loc, int loc) {
    long long input_idx = input_voxel_idx[loc];
    int count = 0;
    int ret_loc = loc;
//    printf("%d, %d\n", ret_loc, loc);
    for (ret_loc = loc; ret_loc < stop_loc && count < grid_buffer_size; ++ret_loc) {
//    while(query_idx == input_idx && ret_loc < stop_loc && count < grid_buffer_size) {
        if (input_voxel_idx[ret_loc] != input_idx) {
            ret_loc--;
            break;
        }
//        printf("%d@%d, %d@%d\n", input_idx, loc, query_idx, ret_loc);
        count += 1;
    }
//    if (query_idx != input_idx)
//        ret_loc -= 1;
    return ret_loc;
}


__global__ void voxel_sampling_idx_binary_gpu_kernel(int batch_size, int input_npoint,
                                                     int center_num, int kernel_size,
                                                     float dim_w, float dim_l, float dim_h,
                                                     float resolution_w, float resolution_l, float resolution_h,
                                                     int grid_buffer_size, int output_pooling_size, bool with_rpn,
                                                     const float* input_coors,
                                                     const long long* input_voxel_idx,
                                                     const int* input_num_list,
                                                     const float* center_coors,
                                                     const int* center_num_list,
                                                     int* input_accu_list,
                                                     int* center_accu_list,
                                                     int* output_idx,
                                                     int* output_idx_count,
                                                     int* valid_idx) {

    if (batch_size*input_npoint <=0 || center_num <= 0) {
//        printf("Voxel sample Op exited unexpectedly.\n");
        return;
    }

	const int half_kernel_size = (kernel_size - 1) / 2;
	const float radius_x = 1.5 * resolution_w;
	const float radius_y = 1.5 * resolution_l;
	const float radius_z = 1.5 * resolution_h;
	const float r_x2 = radius_x * radius_x;
	const float r_y2 = radius_y * radius_y;
	const float r_z2 = radius_z * radius_z;
	const int kernel_num = kernel_size * kernel_size * kernel_size;
	const int center_offset = kernel_size * kernel_size * half_kernel_size + \
                              kernel_size * half_kernel_size + \
                              half_kernel_size;
	const float EPS = 1e-6;
	int grid_w = dim_w / resolution_w;
	int grid_l = dim_l / resolution_l;
	int grid_h = dim_h / resolution_h;
//	printf("%f, %f, %f\n", dim_w, dim_l, dim_h);

	for (int b=blockIdx.x; b<batch_size; b+=gridDim.x) {
	    for (int i=threadIdx.x; i<center_num_list[b]; i+=blockDim.x) {
	        for (int j=0; j<kernel_num; j++) {
	            int voxel_coor = center_accu_list[b]*kernel_num + i*kernel_num + j;
	            for (int p=0; p<output_pooling_size; p++)
	                output_idx[voxel_coor*output_pooling_size + p] = -1;
	        }
	    }
	    __syncthreads();


	    for (int i=threadIdx.x; i<center_num_list[b]; i+=blockDim.x) {
	        float x_c = center_coors[center_accu_list[b]*3 + i*3 + 0];
	        float y_c = center_coors[center_accu_list[b]*3 + i*3 + 1];
	        float z_c = center_coors[center_accu_list[b]*3 + i*3 + 2];
	        int grid_coor_w = x_c / resolution_w;
	        int grid_coor_l = y_c / resolution_l;
	        int grid_coor_h = z_c / resolution_h;
//	        long long grid_idx_c = grid_coor_h * grid_w * grid_l + grid_coor_l * grid_w + grid_coor_w;
            int grid_search_w_min, grid_search_w_max;
            int grid_search_l_min, grid_search_l_max;
            int grid_search_h_min, grid_search_h_max;
	        if (grid_coor_w * resolution_w + 0.5 * resolution_w > x_c) {
	            grid_search_w_min = grid_coor_w - 2;
	            grid_search_w_max = grid_coor_w + 1;
	        }else{
	            grid_search_w_min = grid_coor_w - 1;
	            grid_search_w_max = grid_coor_w + 2;
            }
            if (grid_coor_l * resolution_l + 0.5 * resolution_l > y_c) {
	            grid_search_l_min = grid_coor_l - 2;
	            grid_search_l_max = grid_coor_l + 1;
	        }else{
	            grid_search_l_min = grid_coor_l - 1;
	            grid_search_l_max = grid_coor_l + 2;
            }
            if (grid_coor_h * resolution_h + 0.5 * resolution_h > z_c) {
	            grid_search_h_min = grid_coor_h - 2;
	            grid_search_h_max = grid_coor_h + 1;
	        }else{
	            grid_search_h_min = grid_coor_h - 1;
	            grid_search_h_max = grid_coor_h + 2;
            }

	        for (int w=max(0, grid_search_w_min); w<=min(grid_search_w_max, grid_w-1); w++) {
	            for (int l=max(0, grid_search_l_min); l<=min(grid_search_l_max, grid_l-1); l++) {
	                for (int h=max(0, grid_search_h_min); h<=min(grid_search_h_max, grid_h-1); h++) {
                        long long target_grid_id = h * grid_w * grid_l + l * grid_w + w;
                        int batch_start_id = input_accu_list[b];
                        int batch_stop_id = input_accu_list[b] + input_num_list[b] - 1;
                        int target_id = binary_search(input_voxel_idx,
                                                      batch_start_id,
                                                      batch_stop_id,
                                                      target_grid_id);
//                        if (id > 100000)
//                            printf("************VoxelSamplingBinaryOpId: %d\n", id);
                        if (target_id>=0) {
//                            printf("%d, %d\n", batch_start_id, batch_stop_id);
//                            int i = id;
                            int target_start_id = start_loc_search(input_voxel_idx, grid_buffer_size, batch_start_id, target_id);
                            int target_stop_id = stop_loc_search(input_voxel_idx, grid_buffer_size, batch_stop_id, target_id);
//                            if (stop_id > start_id)
//                            printf("%lld, %lld, %lld\n", input_voxel_idx[target_start_id-1], input_voxel_idx[target_id], input_voxel_idx[target_stop_id+1]);
                            for (int id=target_start_id; id<=target_stop_id; id++) {
                                float x_i = input_coors[id*3 + 0];
                                float y_i = input_coors[id*3 + 1];
                                float z_i = input_coors[id*3 + 2];
                                float dx = x_i - x_c + EPS;
                                float dy = y_i - y_c + EPS;
                                float dz = z_i - z_c + EPS;
                                float dx2 = dx * dx;
                                float dy2 = dy * dy;
                                float dz2 = dz * dz;
                                if (dx2 < r_x2 && dy2 < r_y2 && dz2 < r_z2) {
                                    int x_coor = __float2int_rz(dx / resolution_w + 0.5 * fabsf(dx) / dx);
                                    int y_coor = __float2int_rz(dy / resolution_l + 0.5 * fabsf(dy) / dy);
                                    int z_coor = __float2int_rz(dz / resolution_h + 0.5 * fabsf(dz) / dz);
                                    int voxel_coor = center_accu_list[b] * kernel_num + i * kernel_num + center_offset + \
                                                     kernel_size * kernel_size * x_coor + \
                                                     kernel_size * y_coor + \
                                                     z_coor;
                                    int pooling_count = atomicAdd(&output_idx_count[voxel_coor], 1);
                                    if (pooling_count < output_pooling_size) {
                                        output_idx[voxel_coor*output_pooling_size + pooling_count] = id;
                                        if (with_rpn)
                                            valid_idx[center_accu_list[b] + i]++;
                                    }
                                }
                            }
                        }
	                }
	            }
	        }
	    }
	}
}


void voxel_sampling_idx_binary_gpu_launcher(int batch_size, int input_npoint,
                                            int center_num, int kernel_size,
                                            std::vector<float> dimension, std::vector<float> resolution,
                                            int grid_buffer_size, int output_pooling_size, bool with_rpn,
                                            const float* input_coors,
                                            const long long* input_voxel_idx,
                                            const int* input_num_list,
                                            const float* center_coors,
                                            const int* center_num_list,
                                            int* input_accu_list,
                                            int* center_accu_list,
                                            int* output_idx,
                                            int* output_idx_count,
                                            int* valid_idx) {
//    printf("*********** Here ***********\n");
    voxel_sampling_idx_binary_gpu_kernel<<<16,512>>>(batch_size, input_npoint,
                                                     center_num, kernel_size,
                                                     dimension[0], dimension[1], dimension[2],
                                                     resolution[0], resolution[1], resolution[2],
                                                     grid_buffer_size, output_pooling_size, with_rpn,
                                                     input_coors,
                                                     input_voxel_idx,
                                                     input_num_list,
                                                     center_coors,
                                                     center_num_list,
                                                     input_accu_list,
                                                     center_accu_list,
                                                     output_idx,
                                                     output_idx_count,
                                                     valid_idx);
}

	.file	"tmpxft_00266b60_00000000-6_voxel_sampling_idx_binary.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4004:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4004:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z96__device_stub__Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_iiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	.type	_Z96__device_stub__Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_iiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_, @function
_Z96__device_stub__Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_iiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_:
.LFB4026:
	.cfi_startproc
	endbr64
	subq	$408, %rsp
	.cfi_def_cfa_offset 416
	movl	416(%rsp), %eax
	movl	%edi, 140(%rsp)
	leaq	160(%rsp), %rdi
	movl	%esi, 136(%rsp)
	leaq	172(%rsp), %rsi
	movb	%al, 92(%rsp)
	movq	424(%rsp), %rax
	movl	%edx, 132(%rsp)
	leaq	144(%rsp), %rdx
	movq	%rax, 80(%rsp)
	movq	432(%rsp), %rax
	movl	%ecx, 128(%rsp)
	leaq	152(%rsp), %rcx
	movq	%rax, 72(%rsp)
	movq	440(%rsp), %rax
	movl	%r8d, 100(%rsp)
	movq	%rax, 64(%rsp)
	movq	448(%rsp), %rax
	movl	%r9d, 96(%rsp)
	movq	%rax, 56(%rsp)
	movq	456(%rsp), %rax
	movss	%xmm0, 124(%rsp)
	movq	%rax, 48(%rsp)
	movq	464(%rsp), %rax
	movss	%xmm1, 120(%rsp)
	movq	%rax, 40(%rsp)
	movq	472(%rsp), %rax
	movss	%xmm2, 116(%rsp)
	movq	%rax, 32(%rsp)
	movq	480(%rsp), %rax
	movss	%xmm3, 112(%rsp)
	movq	%rax, 24(%rsp)
	movss	%xmm4, 108(%rsp)
	movss	%xmm5, 104(%rsp)
	movq	488(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	496(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 392(%rsp)
	xorl	%eax, %eax
	leaq	140(%rsp), %rax
	movl	$1, 168(%rsp)
	movq	%rax, 208(%rsp)
	leaq	136(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	132(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	128(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	124(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	120(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	116(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	108(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	100(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	92(%rsp), %rax
	movq	%rax, 304(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 312(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 320(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 328(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 336(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 344(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 352(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 360(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 368(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 376(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 384(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 160(%rsp)
	movq	%rax, 172(%rsp)
	movl	$1, 180(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	152(%rsp)
	.cfi_def_cfa_offset 424
	leaq	_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_(%rip), %rdi
	pushq	152(%rsp)
	.cfi_def_cfa_offset 432
	movq	188(%rsp), %rcx
	movl	196(%rsp), %r8d
	movq	176(%rsp), %rsi
	movl	184(%rsp), %edx
	leaq	224(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 424
	popq	%rdx
	.cfi_def_cfa_offset 416
.L2:
	movq	392(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$408, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4026:
	.size	_Z96__device_stub__Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_iiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_, .-_Z96__device_stub__Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_iiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	.globl	_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	.type	_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_, @function
_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_:
.LFB4027:
	.cfi_startproc
	endbr64
	movzbl	8(%rsp), %eax
	movl	%eax, 8(%rsp)
	jmp	_Z96__device_stub__Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_iiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	.cfi_endproc
.LFE4027:
	.size	_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_, .-_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	.globl	_Z38voxel_sampling_idx_binary_gpu_launcheriiiiSt6vectorIfSaIfEES1_iibPKfPKxPKiS3_S7_PiS8_S8_S8_S8_
	.type	_Z38voxel_sampling_idx_binary_gpu_launcheriiiiSt6vectorIfSaIfEES1_iibPKfPKxPKiS3_S7_PiS8_S8_S8_S8_, @function
_Z38voxel_sampling_idx_binary_gpu_launcheriiiiSt6vectorIfSaIfEES1_iibPKfPKxPKiS3_S7_PiS8_S8_S8_S8_:
.LFB4001:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r9, %rbp
	xorl	%r9d, %r9d
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%r8, %rbx
	xorl	%r8d, %r8d
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movl	176(%rsp), %eax
	movl	%edi, 4(%rsp)
	movl	$268435457, %edi
	movl	%esi, 8(%rsp)
	movq	200(%rsp), %r13
	salq	$4, %rdi
	movl	$1, %esi
	movl	%eax, 20(%rsp)
	movl	184(%rsp), %eax
	movl	%edx, 12(%rsp)
	movq	208(%rsp), %r12
	movl	$8388609, %edx
	movl	%eax, 24(%rsp)
	movl	192(%rsp), %eax
	salq	$9, %rdx
	movl	%ecx, 16(%rsp)
	movl	$1, %ecx
	movl	%eax, 28(%rsp)
	movq	216(%rsp), %rax
	movq	%rax, 32(%rsp)
	movq	224(%rsp), %rax
	movq	%rax, 40(%rsp)
	movq	232(%rsp), %rax
	movq	%rax, 48(%rsp)
	movq	240(%rsp), %rax
	movq	264(%rsp), %r10
	movq	272(%rsp), %r11
	movq	%rdx, 100(%rsp)
	movq	%rax, 56(%rsp)
	movq	248(%rsp), %r14
	movq	%r10, 72(%rsp)
	movq	256(%rsp), %r15
	movq	%r11, 64(%rsp)
	movl	$1, 108(%rsp)
	movq	%rdi, 88(%rsp)
	movl	$1, 96(%rsp)
	call	__cudaPushCallConfiguration@PLT
	movq	64(%rsp), %r11
	movq	72(%rsp), %r10
	testl	%eax, %eax
	jne	.L8
	movq	0(%rbp), %rdx
	movq	(%rbx), %rax
	movq	56(%rsp), %rbx
	movq	40(%rsp), %rsi
	movss	8(%rdx), %xmm5
	movss	4(%rdx), %xmm4
	movss	8(%rax), %xmm2
	movss	4(%rax), %xmm1
	movq	%rbx, 224(%rsp)
	movq	48(%rsp), %rbx
	movzbl	28(%rsp), %ecx
	movq	%r15, 240(%rsp)
	movq	%r14, 232(%rsp)
	movl	24(%rsp), %r9d
	movq	%rbx, 216(%rsp)
	movq	32(%rsp), %rbx
	movq	%rsi, 208(%rsp)
	movl	20(%rsp), %r8d
	movq	%r12, 192(%rsp)
	movl	8(%rsp), %esi
	movq	%r13, 184(%rsp)
	movl	4(%rsp), %edi
	movl	%ecx, 176(%rsp)
	movl	16(%rsp), %ecx
	movq	%r11, 256(%rsp)
	movq	%r10, 248(%rsp)
	movq	%rbx, 200(%rsp)
	movss	(%rdx), %xmm3
	movss	(%rax), %xmm0
	movl	12(%rsp), %edx
	addq	$120, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z96__device_stub__Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_iiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
.L8:
	.cfi_restore_state
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4001:
	.size	_Z38voxel_sampling_idx_binary_gpu_launcheriiiiSt6vectorIfSaIfEES1_iibPKfPKxPKiS3_S7_PiS8_S8_S8_S8_, .-_Z38voxel_sampling_idx_binary_gpu_launcheriiiiSt6vectorIfSaIfEES1_iibPKfPKxPKiS3_S7_PiS8_S8_S8_S8_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4029:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* Voxel sampling GPU implementation
 * Author Zhaoyu SU
 * All Rights Reserved. Sep., 2019.
 */

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>
#include <sys/time.h>
#include <iostream>
#include <vector>
#define USECPSEC 1000000ULL

__device__ inline int binary_search(const long long* input_voxel_idx,
                             int start_id,
                             int stop_id,
                             long long target_voxel_id) {
//    if (threadIdx.x==0)
    if (input_voxel_idx[start_id] > target_voxel_id || input_voxel_idx[stop_id] < target_voxel_id)
        return -1;
    while (start_id <= stop_id) {
        int m = start_id + (stop_id - start_id) / 2;
        if (input_voxel_idx[m] == target_voxel_id)
            return m;
        if (input_voxel_idx[m] < target_voxel_id)
            start_id = m + 1;
        else
            stop_id = m - 1;
    }
    return -1;
}

//__device__ int start_loc_search(const long long* input_voxel_idx,
//                                int grid_buffer_size,
//                                int start_id, int loc) {
//    long long input_idx = input_voxel_idx[loc];
//    long long query_idx = input_idx;
//    int start_loc = loc;
//    int count = 0;
//    while(query_idx == input_idx && start_loc > start_id && count < grid_buffer_size) {
//        query_idx = input_voxel_idx[--start_loc];
//        count += 1;
//    }
//    if (query_idx != input_idx)
//        start_loc += 1;
//    return start_loc;
//}

__device__ inline int start_loc_search(const long long* input_voxel_idx,
                               int grid_buffer_size,
                               int start_loc, int loc) {
    long long input_idx = input_voxel_idx[loc];
    int count = 0;
//    printf("%d, %d\n", ret_loc, loc);
    int ret_loc = loc;
    for (ret_loc = loc; ret_loc > start_loc && count < grid_buffer_size; --ret_loc) {
//    while(query_idx == input_idx && ret_loc < stop_loc && count < grid_buffer_size) {
        if (input_voxel_idx[ret_loc] != input_idx) {
            ret_loc++;
            break;
        }
//        printf("%lld@%d, %lld@%d\n", input_idx, loc, query_idx, ret_loc);
        count++;
    }
//    if (query_idx != input_idx)
//        ret_loc -= 1;
    return ret_loc;
}

__device__ inline int stop_loc_search(const long long* input_voxel_idx,
                               int grid_buffer_size,
                               int stop_loc, int loc) {
    long long input_idx = input_voxel_idx[loc];
    int count = 0;
    int ret_loc = loc;
//    printf("%d, %d\n", ret_loc, loc);
    for (ret_loc = loc; ret_loc < stop_loc && count < grid_buffer_size; ++ret_loc) {
//    while(query_idx == input_idx && ret_loc < stop_loc && count < grid_buffer_size) {
        if (input_voxel_idx[ret_loc] != input_idx) {
            ret_loc--;
            break;
        }
//        printf("%d@%d, %d@%d\n", input_idx, loc, query_idx, ret_loc);
        count += 1;
    }
//    if (query_idx != input_idx)
//        ret_loc -= 1;
    return ret_loc;
}


__global__ void voxel_sampling_idx_binary_gpu_kernel(int batch_size, int input_npoint,
                                                     int center_num, int kernel_size,
                                                     float dim_w, float dim_l, float dim_h,
                                                     float resolution_w, float resolution_l, float resolution_h,
                                                     int grid_buffer_size, int output_pooling_size, bool with_rpn,
                                                     const float* input_coors,
                                                     const long long* input_voxel_idx,
                                                     const int* input_num_list,
                                                     const float* center_coors,
                                                     const int* center_num_list,
                                                     int* input_accu_list,
                                                     int* center_accu_list,
                                                     int* output_idx,
                                                     int* output_idx_count,
                                                     int* valid_idx) {

    if (batch_size*input_npoint <=0 || center_num <= 0) {
//        printf("Voxel sample Op exited unexpectedly.\n");
        return;
    }

	const int half_kernel_size = (kernel_size - 1) / 2;
	const float radius_x = 1.5 * resolution_w;
	const float radius_y = 1.5 * resolution_l;
	const float radius_z = 1.5 * resolution_h;
	const float r_x2 = radius_x * radius_x;
	const float r_y2 = radius_y * radius_y;
	const float r_z2 = radius_z * radius_z;
	const int kernel_num = kernel_size * kernel_size * kernel_size;
	const int center_offset = kernel_size * kernel_size * half_kernel_size + \
                              kernel_size * half_kernel_size + \
                              half_kernel_size;
	const float EPS = 1e-6;
	int grid_w = dim_w / resolution_w;
	int grid_l = dim_l / resolution_l;
	int grid_h = dim_h / resolution_h;
//	printf("%f, %f, %f\n", dim_w, dim_l, dim_h);

	for (int b=blockIdx.x; b<batch_size; b+=gridDim.x) {
	    for (int i=threadIdx.x; i<center_num_list[b]; i+=blockDim.x) {
	        for (int j=0; j<kernel_num; j++) {
	            int voxel_coor = center_accu_list[b]*kernel_num + i*kernel_num + j;
	            for (int p=0; p<output_pooling_size; p++)
	                output_idx[voxel_coor*output_pooling_size + p] = -1;
	        }
	    }
	    __syncthreads();


	    for (int i=threadIdx.x; i<center_num_list[b]; i+=blockDim.x) {
	        float x_c = center_coors[center_accu_list[b]*3 + i*3 + 0];
	        float y_c = center_coors[center_accu_list[b]*3 + i*3 + 1];
	        float z_c = center_coors[center_accu_list[b]*3 + i*3 + 2];
	        int grid_coor_w = x_c / resolution_w;
	        int grid_coor_l = y_c / resolution_l;
	        int grid_coor_h = z_c / resolution_h;
//	        long long grid_idx_c = grid_coor_h * grid_w * grid_l + grid_coor_l * grid_w + grid_coor_w;
            int grid_search_w_min, grid_search_w_max;
            int grid_search_l_min, grid_search_l_max;
            int grid_search_h_min, grid_search_h_max;
	        if (grid_coor_w * resolution_w + 0.5 * resolution_w > x_c) {
	            grid_search_w_min = grid_coor_w - 2;
	            grid_search_w_max = grid_coor_w + 1;
	        }else{
	            grid_search_w_min = grid_coor_w - 1;
	            grid_search_w_max = grid_coor_w + 2;
            }
            if (grid_coor_l * resolution_l + 0.5 * resolution_l > y_c) {
	            grid_search_l_min = grid_coor_l - 2;
	            grid_search_l_max = grid_coor_l + 1;
	        }else{
	            grid_search_l_min = grid_coor_l - 1;
	            grid_search_l_max = grid_coor_l + 2;
            }
            if (grid_coor_h * resolution_h + 0.5 * resolution_h > z_c) {
	            grid_search_h_min = grid_coor_h - 2;
	            grid_search_h_max = grid_coor_h + 1;
	        }else{
	            grid_search_h_min = grid_coor_h - 1;
	            grid_search_h_max = grid_coor_h + 2;
            }

	        for (int w=max(0, grid_search_w_min); w<=min(grid_search_w_max, grid_w-1); w++) {
	            for (int l=max(0, grid_search_l_min); l<=min(grid_search_l_max, grid_l-1); l++) {
	                for (int h=max(0, grid_search_h_min); h<=min(grid_search_h_max, grid_h-1); h++) {
                        long long target_grid_id = h * grid_w * grid_l + l * grid_w + w;
                        int batch_start_id = input_accu_list[b];
                        int batch_stop_id = input_accu_list[b] + input_num_list[b] - 1;
                        int target_id = binary_search(input_voxel_idx,
                                                      batch_start_id,
                                                      batch_stop_id,
                                                      target_grid_id);
//                        if (id > 100000)
//                            printf("************VoxelSamplingBinaryOpId: %d\n", id);
                        if (target_id>=0) {
//                            printf("%d, %d\n", batch_start_id, batch_stop_id);
//                            int i = id;
                            int target_start_id = start_loc_search(input_voxel_idx, grid_buffer_size, batch_start_id, target_id);
                            int target_stop_id = stop_loc_search(input_voxel_idx, grid_buffer_size, batch_stop_id, target_id);
//                            if (stop_id > start_id)
//                            printf("%lld, %lld, %lld\n", input_voxel_idx[target_start_id-1], input_voxel_idx[target_id], input_voxel_idx[target_stop_id+1]);
                            for (int id=target_start_id; id<=target_stop_id; id++) {
                                float x_i = input_coors[id*3 + 0];
                                float y_i = input_coors[id*3 + 1];
                                float z_i = input_coors[id*3 + 2];
                                float dx = x_i - x_c + EPS;
                                float dy = y_i - y_c + EPS;
                                float dz = z_i - z_c + EPS;
                                float dx2 = dx * dx;
                                float dy2 = dy * dy;
                                float dz2 = dz * dz;
                                if (dx2 < r_x2 && dy2 < r_y2 && dz2 < r_z2) {
                                    int x_coor = __float2int_rz(dx / resolution_w + 0.5 * fabsf(dx) / dx);
                                    int y_coor = __float2int_rz(dy / resolution_l + 0.5 * fabsf(dy) / dy);
                                    int z_coor = __float2int_rz(dz / resolution_h + 0.5 * fabsf(dz) / dz);
                                    int voxel_coor = center_accu_list[b] * kernel_num + i * kernel_num + center_offset + \
                                                     kernel_size * kernel_size * x_coor + \
                                                     kernel_size * y_coor + \
                                                     z_coor;
                                    int pooling_count = atomicAdd(&output_idx_count[voxel_coor], 1);
                                    if (pooling_count < output_pooling_size) {
                                        output_idx[voxel_coor*output_pooling_size + pooling_count] = id;
                                        if (with_rpn)
                                            valid_idx[center_accu_list[b] + i]++;
                                    }
                                }
                            }
                        }
	                }
	            }
	        }
	    }
	}
}


void voxel_sampling_idx_binary_gpu_launcher(int batch_size, int input_npoint,
                                            int center_num, int kernel_size,
                                            std::vector<float> dimension, std::vector<float> resolution,
                                            int grid_buffer_size, int output_pooling_size, bool with_rpn,
                                            const float* input_coors,
                                            const long long* input_voxel_idx,
                                            const int* input_num_list,
                                            const float* center_coors,
                                            const int* center_num_list,
                                            int* input_accu_list,
                                            int* center_accu_list,
                                            int* output_idx,
                                            int* output_idx_count,
                                            int* valid_idx) {
//    printf("*********** Here ***********\n");
    voxel_sampling_idx_binary_gpu_kernel<<<16,512>>>(batch_size, input_npoint,
                                                     center_num, kernel_size,
                                                     dimension[0], dimension[1], dimension[2],
                                                     resolution[0], resolution[1], resolution[2],
                                                     grid_buffer_size, output_pooling_size, with_rpn,
                                                     input_coors,
                                                     input_voxel_idx,
                                                     input_num_list,
                                                     center_coors,
                                                     center_num_list,
                                                     input_accu_list,
                                                     center_accu_list,
                                                     output_idx,
                                                     output_idx_count,
                                                     valid_idx);
}

	.text
	.file	"voxel_sampling_idx_binary.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z51__device_stub__voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_ # -- Begin function _Z51__device_stub__voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	.type	_Z51__device_stub__voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_,@function
_Z51__device_stub__voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_: # @_Z51__device_stub__voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$296, %rsp                      # imm = 0x128
	.cfi_def_cfa_offset 352
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movb	352(%rsp), %al
	leaq	60(%rsp), %r10
	movl	%edi, (%r10)
	leaq	56(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	52(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	48(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	44(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	40(%rsp), %r11
	movss	%xmm1, (%r11)
	leaq	36(%rsp), %r14
	movss	%xmm2, (%r14)
	leaq	32(%rsp), %r15
	movss	%xmm3, (%r15)
	leaq	28(%rsp), %r12
	movss	%xmm4, (%r12)
	leaq	24(%rsp), %r13
	movss	%xmm5, (%r13)
	leaq	20(%rsp), %rbp
	movl	%r8d, (%rbp)
	leaq	16(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	15(%rsp), %r9
	movb	%al, (%r9)
	leaq	112(%rsp), %rbx
	movq	%r10, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r11, 40(%rbx)
	movq	%r14, 48(%rbx)
	movq	%r15, 56(%rbx)
	movq	%r12, 64(%rbx)
	movq	%r13, 72(%rbx)
	movq	%rbp, 80(%rbx)
	movq	%r8, 88(%rbx)
	movq	%r9, 96(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	376(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	384(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	392(%rsp), %rax
	movq	%rax, 136(%rbx)
	leaq	400(%rsp), %rax
	movq	%rax, 144(%rbx)
	leaq	408(%rsp), %rax
	movq	%rax, 152(%rbx)
	leaq	416(%rsp), %rax
	movq	%rax, 160(%rbx)
	leaq	424(%rsp), %rax
	movq	%rax, 168(%rbx)
	leaq	432(%rsp), %rax
	movq	%rax, 176(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	72(%rsp), %r12
	leaq	64(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$312, %rsp                      # imm = 0x138
	.cfi_adjust_cfa_offset -312
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z51__device_stub__voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_, .Lfunc_end0-_Z51__device_stub__voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	.cfi_endproc
                                        # -- End function
	.globl	_Z38voxel_sampling_idx_binary_gpu_launcheriiiiSt6vectorIfSaIfEES1_iibPKfPKxPKiS3_S7_PiS8_S8_S8_S8_ # -- Begin function _Z38voxel_sampling_idx_binary_gpu_launcheriiiiSt6vectorIfSaIfEES1_iibPKfPKxPKiS3_S7_PiS8_S8_S8_S8_
	.type	_Z38voxel_sampling_idx_binary_gpu_launcheriiiiSt6vectorIfSaIfEES1_iibPKfPKxPKiS3_S7_PiS8_S8_S8_S8_,@function
_Z38voxel_sampling_idx_binary_gpu_launcheriiiiSt6vectorIfSaIfEES1_iibPKfPKxPKiS3_S7_PiS8_S8_S8_S8_: # @_Z38voxel_sampling_idx_binary_gpu_launcheriiiiSt6vectorIfSaIfEES1_iibPKfPKxPKiS3_S7_PiS8_S8_S8_S8_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r12
	movq	%r8, %r13
	movl	%ecx, %ebx
	movl	%edx, %ebp
	movl	%esi, %r14d
	movl	%edi, %r15d
	movabsq	$4294967312, %rdi               # imm = 0x100000010
	leaq	496(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB1_1
# %bb.2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	jmp	.LBB1_3
.LBB1_1:
	.cfi_def_cfa_offset 64
	movb	80(%rsp), %al
	movl	72(%rsp), %r9d
	movl	64(%rsp), %r8d
	movq	(%r13), %rcx
	movss	(%rcx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	4(%rcx), %xmm1                  # xmm1 = mem[0],zero,zero,zero
	movss	8(%rcx), %xmm2                  # xmm2 = mem[0],zero,zero,zero
	movq	(%r12), %rcx
	movss	(%rcx), %xmm3                   # xmm3 = mem[0],zero,zero,zero
	movss	4(%rcx), %xmm4                  # xmm4 = mem[0],zero,zero,zero
	movss	8(%rcx), %xmm5                  # xmm5 = mem[0],zero,zero,zero
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movzbl	%al, %eax
	movl	%r15d, %edi
	movl	%r14d, %esi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z51__device_stub__voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	addq	$104, %rsp
	.cfi_adjust_cfa_offset -104
.LBB1_3:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z38voxel_sampling_idx_binary_gpu_launcheriiiiSt6vectorIfSaIfEES1_iibPKfPKxPKiS3_S7_PiS8_S8_S8_S8_, .Lfunc_end1-_Z38voxel_sampling_idx_binary_gpu_launcheriiiiSt6vectorIfSaIfEES1_iibPKfPKxPKiS3_S7_PiS8_S8_S8_S8_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_,@object # @_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	.section	.rodata,"a",@progbits
	.globl	_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	.p2align	3, 0x0
_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_:
	.quad	_Z51__device_stub__voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	.size	_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_"
	.size	.L__unnamed_1, 83

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z51__device_stub__voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_ ; -- Begin function _Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	.globl	_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
	.p2align	8
	.type	_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_,@function
_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_: ; @_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
; %bb.0:
	s_load_b256 s[24:31], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s25, s24
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_min_i32 s2, s2, s26
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_59
; %bb.1:
	s_mov_b32 s34, s15
	s_cmp_ge_i32 s15, s24
	s_cbranch_scc1 .LBB0_59
; %bb.2:                                ; %.lr.ph280
	s_clause 0x1
	s_load_b128 s[36:39], s[0:1], 0x20
	s_load_b32 s4, s[0:1], 0x30
	v_div_scale_f32 v3, null, s31, s31, s28
	v_cvt_f64_f32_e32 v[1:2], s31
	v_mul_f32_e64 v5, 0x3fc00000, s31
	v_div_scale_f32 v10, vcc_lo, s28, s31, s28
	s_delay_alu instid0(VALU_DEP_4)
	v_rcp_f32_e32 v4, v3
	s_add_i32 s2, s27, -1
	s_load_b512 s[8:23], s[0:1], 0x38
	s_lshr_b32 s3, s2, 31
	s_mul_i32 s7, s27, s27
	s_add_i32 s2, s2, s3
	s_add_i32 s5, s27, s7
	s_ashr_i32 s6, s2, 1
	s_add_i32 s53, s5, 1
	s_mul_i32 s25, s7, s27
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v3, v4, 1.0
	v_mov_b32_e32 v29, 0
	s_waitcnt lgkmcnt(0)
	v_div_scale_f32 v13, null, s37, s37, s30
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v21, v5, v5 :: v_dual_fmac_f32 v4, v11, v4
	v_cvt_f64_f32_e32 v[8:9], s37
	v_rcp_f32_e32 v14, v13
	v_cvt_f64_f32_e32 v[6:7], s36
	v_div_scale_f32 v12, null, s36, s36, s29
	v_mul_f32_e64 v15, 0x3fc00000, s36
	v_div_scale_f32 v16, s2, s29, s36, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(TRANS32_DEP_2)
	v_rcp_f32_e32 v11, v12
	v_div_scale_f32 v20, s3, s30, s37, s30
	v_fma_f32 v19, -v13, v14, 1.0
	v_mul_f32_e32 v5, v10, v4
	s_bitcmp1_b32 s4, 0
	v_mov_b32_e32 v31, 1
	s_cselect_b32 s26, -1, 0
	v_fmac_f32_e32 v14, v19, v14
	v_fma_f32 v17, -v3, v5, v10
	s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f32 v18, -v12, v11, 1.0
	s_cmp_gt_i32 s25, 0
	s_mul_i32 s53, s53, s6
	v_dual_mul_f32 v22, v15, v15 :: v_dual_fmac_f32 v5, v17, v4
	v_mul_f32_e64 v17, 0x3fc00000, s37
	s_cselect_b32 s33, -1, 0
	s_cmp_gt_i32 s39, 0
	v_mov_b32_e32 v30, -1
	v_fma_f32 v3, -v3, v5, v10
	v_mul_f32_e32 v23, v17, v17
	s_cselect_b32 s52, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v3, v3, v4, v5
	v_mul_f64 v[4:5], v[1:2], 0.5
	s_mov_b32 vcc_lo, s2
	v_div_fixup_f32 v1, v3, s31, s28
	v_mul_f64 v[8:9], v[8:9], 0.5
	s_add_u32 s28, s0, 0x88
	v_mul_f64 v[6:7], v[6:7], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v24, v1
	v_dual_fmac_f32 v11, v18, v11 :: v_dual_add_nc_u32 v26, -1, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v16, v11
	v_fma_f32 v18, -v12, v10, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v15, v20, v14 :: v_dual_fmac_f32 v10, v18, v11
	v_fma_f32 v19, -v13, v15, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v2, -v12, v10, v16
	v_fmac_f32_e32 v15, v19, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v2, v2, v11, v10
	v_fma_f32 v1, -v13, v15, v20
	s_mov_b32 vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v2, v2, s36, s29
	v_div_fmas_f32 v1, v1, v14, v15
	s_addc_u32 s29, s1, 0
	s_cmp_gt_i32 s38, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v25, v2
	v_div_fixup_f32 v1, v1, s37, s30
	s_clause 0x1
	s_load_b128 s[40:43], s[0:1], 0x78
	s_load_b32 s30, s[0:1], 0x88
	s_cselect_b32 s54, -1, 0
	v_add_nc_u32_e32 v27, -1, v25
	v_cvt_i32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v28, -1, v1
.LBB0_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;       Child Loop BB0_7 Depth 3
                                        ;         Child Loop BB0_9 Depth 4
                                        ;     Child Loop BB0_15 Depth 2
                                        ;       Child Loop BB0_17 Depth 3
                                        ;         Child Loop BB0_19 Depth 4
                                        ;           Child Loop BB0_21 Depth 5
                                        ;             Child Loop BB0_24 Depth 6
                                        ;             Child Loop BB0_32 Depth 6
                                        ;             Child Loop BB0_40 Depth 6
                                        ;             Child Loop BB0_48 Depth 6
	s_ashr_i32 s35, s34, 31
	s_mov_b32 s5, exec_lo
	s_lshl_b64 s[0:1], s[34:35], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s44, s16, s0
	s_addc_u32 s45, s17, s1
	global_load_b32 v1, v29, s[44:45]
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v0, v1
	s_cbranch_execz .LBB0_13
; %bb.4:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_load_b32 s4, s[28:29], 0xc
	v_mov_b32_e32 v3, v0
	s_add_u32 s2, s20, s0
	s_addc_u32 s3, s21, s1
	s_mov_b32 s35, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s4, 0xffff
.LBB0_5:                                ; %.preheader
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_7 Depth 3
                                        ;         Child Loop BB0_9 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s33
	s_cbranch_vccnz .LBB0_12
; %bb.6:                                ; %.lr.ph251.preheader
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_mov_b32 s4, 0
.LBB0_7:                                ; %.lr.ph251
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_5 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_9 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s52
	s_cbranch_vccnz .LBB0_10
; %bb.8:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_7 Depth=3
	global_load_b32 v1, v29, s[2:3]
	s_mov_b32 s46, s39
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v10, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s25, v10, s[4:5]
	v_mul_lo_u32 v1, s39, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s22, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s23, v2, vcc_lo
.LBB0_9:                                ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_5 Depth=2
                                        ;       Parent Loop BB0_7 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	global_store_b32 v[1:2], v30, off
	v_add_co_u32 v1, vcc_lo, v1, 4
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_add_i32 s46, s46, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s46, 0
	s_cbranch_scc0 .LBB0_9
.LBB0_10:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_7 Depth=3
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s4, s25
	s_cbranch_scc0 .LBB0_7
; %bb.11:                               ; %._crit_edge252.loopexit
                                        ;   in Loop: Header=BB0_5 Depth=2
	global_load_b32 v1, v29, s[44:45]
.LBB0_12:                               ; %._crit_edge252
                                        ;   in Loop: Header=BB0_5 Depth=2
	v_add_nc_u32_e32 v3, s6, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v3, v1
	s_or_b32 s35, vcc_lo, s35
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB0_5
.LBB0_13:                               ; %Flow409
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b32 v11, v29, s[44:45]
	s_mov_b32 s35, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v0, v11
	s_cbranch_execz .LBB0_58
; %bb.14:                               ; %.lr.ph276
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_load_b32 s2, s[28:29], 0xc
	s_add_u32 s46, s20, s0
	s_addc_u32 s47, s21, s1
	v_mov_b32_e32 v32, v0
	s_add_u32 s48, s18, s0
	s_addc_u32 s49, s19, s1
	s_add_u32 s50, s12, s0
	s_addc_u32 s51, s13, s1
	s_mov_b32 s56, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s55, s2, 0xffff
.LBB0_15:                               ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_17 Depth 3
                                        ;         Child Loop BB0_19 Depth 4
                                        ;           Child Loop BB0_21 Depth 5
                                        ;             Child Loop BB0_24 Depth 6
                                        ;             Child Loop BB0_32 Depth 6
                                        ;             Child Loop BB0_40 Depth 6
                                        ;             Child Loop BB0_48 Depth 6
	global_load_b32 v1, v29, s[46:47]
	s_mov_b32 s57, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v1, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 1, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s14, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s15, v2, vcc_lo
	global_load_b96 v[1:3], v[1:2], off
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v10, null, s31, s31, v1
	v_div_scale_f32 v14, vcc_lo, v1, s31, v1
	v_rcp_f32_e32 v12, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v10, v12, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v13, v12
	v_mul_f32_e32 v13, v14, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v15, -v10, v13, v14
	v_fmac_f32_e32 v13, v15, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v10, -v10, v13, v14
	v_cvt_f64_f32_e32 v[14:15], v1
	v_div_fmas_f32 v10, v10, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v10, v10, s31, v1
	v_cvt_i32_f32_e32 v10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v12, v10
	v_mul_f32_e32 v12, s31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[12:13], v12
	v_add_f64 v[12:13], v[4:5], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, v[12:13], v[14:15]
	v_cndmask_b32_e64 v12, 2, 1, vcc_lo
	v_cndmask_b32_e64 v13, -1, -2, vcc_lo
	v_add_nc_u32_e32 v12, v12, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v13, v13, v10
	v_min_i32_e32 v33, v12, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v10, 0, v13
	v_cmpx_le_i32_e64 v10, v33
	s_cbranch_execz .LBB0_57
; %bb.16:                               ; %.lr.ph272
                                        ;   in Loop: Header=BB0_15 Depth=2
	v_div_scale_f32 v11, null, s37, s37, v3
	v_div_scale_f32 v12, null, s36, s36, v2
	v_div_scale_f32 v17, vcc_lo, v3, s37, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v13, v11
	v_rcp_f32_e32 v14, v12
	s_mov_b32 s58, 0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v15, -v11, v13, 1.0
	v_fma_f32 v16, -v12, v14, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v13, v15, v13 :: v_dual_fmac_f32 v14, v16, v14
	v_div_scale_f32 v15, s0, v2, s36, v2
	v_mul_f32_e32 v16, v17, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v18, v15, v14
	v_fma_f32 v19, -v11, v16, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v20, -v12, v18, v15
	v_fmac_f32_e32 v16, v19, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v18, v20, v14
	v_fma_f32 v11, -v11, v16, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, -v12, v18, v15
	v_div_fmas_f32 v11, v11, v13, v16
	s_mov_b32 vcc_lo, s0
	v_cvt_f64_f32_e32 v[15:16], v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v12, v12, v14, v18
	v_cvt_f64_f32_e32 v[17:18], v2
	v_div_fixup_f32 v11, v11, s37, v3
	v_div_fixup_f32 v12, v12, s36, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v20, v11
	v_cvt_i32_f32_e32 v19, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v12, v20
	v_cvt_f32_i32_e32 v11, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v13, s37, v12
	v_mul_f32_e32 v11, s36, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_f32_e32 v[13:14], v13
	v_cvt_f64_f32_e32 v[11:12], v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[8:9], v[13:14]
	v_add_f64 v[11:12], v[6:7], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, v[13:14], v[15:16]
	v_cmp_gt_f64_e32 vcc_lo, v[11:12], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v11, -1, -2, s0
	v_cndmask_b32_e64 v14, 2, 1, s0
	v_cndmask_b32_e64 v12, -1, -2, vcc_lo
	v_cndmask_b32_e64 v13, 2, 1, vcc_lo
	v_add_nc_u32_e32 v11, v11, v20
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v14, v14, v20
	v_add_nc_u32_e32 v12, v12, v19
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v13, v13, v19
	v_max_i32_e32 v34, 0, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_min_i32_e32 v37, v14, v28
	v_max_i32_e32 v35, 0, v12
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_min_i32_e32 v36, v13, v27
	v_cmp_le_i32_e64 s1, v34, v37
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_le_i32_e64 s0, v35, v36
.LBB0_17:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_15 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_19 Depth 4
                                        ;           Child Loop BB0_21 Depth 5
                                        ;             Child Loop BB0_24 Depth 6
                                        ;             Child Loop BB0_32 Depth 6
                                        ;             Child Loop BB0_40 Depth 6
                                        ;             Child Loop BB0_48 Depth 6
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s59, s0
	s_cbranch_execz .LBB0_55
; %bb.18:                               ; %.lr.ph267.preheader
                                        ;   in Loop: Header=BB0_17 Depth=3
	v_mov_b32_e32 v11, v35
	s_mov_b32 s60, 0
.LBB0_19:                               ; %.lr.ph267
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_15 Depth=2
                                        ;       Parent Loop BB0_17 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_21 Depth 5
                                        ;             Child Loop BB0_24 Depth 6
                                        ;             Child Loop BB0_32 Depth 6
                                        ;             Child Loop BB0_40 Depth 6
                                        ;             Child Loop BB0_48 Depth 6
	s_and_saveexec_b32 s61, s1
	s_cbranch_execz .LBB0_54
; %bb.20:                               ; %.lr.ph262.preheader
                                        ;   in Loop: Header=BB0_19 Depth=4
	v_mov_b32_e32 v38, v34
	s_mov_b32 s62, 0
.LBB0_21:                               ; %.lr.ph262
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_15 Depth=2
                                        ;       Parent Loop BB0_17 Depth=3
                                        ;         Parent Loop BB0_19 Depth=4
                                        ; =>        This Loop Header: Depth=5
                                        ;             Child Loop BB0_24 Depth 6
                                        ;             Child Loop BB0_32 Depth 6
                                        ;             Child Loop BB0_40 Depth 6
                                        ;             Child Loop BB0_48 Depth 6
	s_clause 0x1
	global_load_b32 v14, v29, s[48:49]
	global_load_b32 v19, v29, s[50:51]
	s_waitcnt vmcnt(1)
	v_ashrrev_i32_e32 v15, 31, v14
	v_readfirstlane_b32 s2, v14
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s3, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[12:13], 3, v[14:15]
	s_add_i32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s4, s2, -1
	v_add_co_u32 v12, vcc_lo, s10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v13, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[17:18], null, v38, v25, v[11:12]
	v_mad_u64_u32 v[15:16], null, v17, v24, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v16, 31, v15
	v_cmp_le_i64_e32 vcc_lo, v[12:13], v[15:16]
	v_mov_b32_e32 v12, -1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_29
; %bb.22:                               ;   in Loop: Header=BB0_21 Depth=5
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[64:65], s[4:5], 3
	s_add_u32 s64, s10, s64
	s_addc_u32 s65, s11, s65
	global_load_b64 v[12:13], v29, s[64:65]
	s_waitcnt vmcnt(0)
	v_cmp_ge_i64_e32 vcc_lo, v[12:13], v[15:16]
	v_mov_b32_e32 v12, -1
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB0_28
; %bb.23:                               ; %.preheader.i.preheader
                                        ;   in Loop: Header=BB0_21 Depth=5
	v_dual_mov_b32 v17, s4 :: v_dual_mov_b32 v18, v14
	s_mov_b32 s6, 0
                                        ; implicit-def: $sgpr63
.LBB0_24:                               ; %.preheader.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_15 Depth=2
                                        ;       Parent Loop BB0_17 Depth=3
                                        ;         Parent Loop BB0_19 Depth=4
                                        ;           Parent Loop BB0_21 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v12, -1
	s_or_b32 s63, s63, exec_lo
	s_mov_b32 s64, exec_lo
	v_cmpx_ge_i32_e64 v17, v18
	s_cbranch_execz .LBB0_26
; %bb.25:                               ;   in Loop: Header=BB0_24 Depth=6
	v_sub_nc_u32_e32 v12, v17, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v13, 31, v12
	v_add_nc_u32_e32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v12, 1, v12
	v_add_nc_u32_e32 v12, v12, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v13, 31, v12
	v_add_nc_u32_e32 v39, -1, v12
	v_lshlrev_b64 v[19:20], 3, v[12:13]
	v_add_nc_u32_e32 v13, 1, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v19, vcc_lo, s10, v19
	v_add_co_ci_u32_e32 v20, vcc_lo, s11, v20, vcc_lo
	global_load_b64 v[19:20], v[19:20], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i64_e64 s2, v[19:20], v[15:16]
	v_cmp_eq_u64_e32 vcc_lo, v[19:20], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v18, v18, v13, s2
	v_cmp_gt_i64_e64 s2, v[19:20], v[15:16]
	v_cndmask_b32_e64 v17, v17, v39, s2
	s_and_not1_b32 s2, s63, exec_lo
	s_and_b32 s63, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s63, s2, s63
.LBB0_26:                               ; %Flow391
                                        ;   in Loop: Header=BB0_24 Depth=6
	s_or_b32 exec_lo, exec_lo, s64
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, exec_lo, s63
	s_or_b32 s6, s2, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_24
; %bb.27:                               ; %Flow392
                                        ;   in Loop: Header=BB0_21 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_28:                               ; %Flow394
                                        ;   in Loop: Header=BB0_21 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_29:                               ; %_Z13binary_searchPKxiix.exit
                                        ;   in Loop: Header=BB0_21 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_mov_b32 s63, exec_lo
	v_cmpx_lt_i32_e32 -1, v12
	s_cbranch_execz .LBB0_53
; %bb.30:                               ;   in Loop: Header=BB0_21 Depth=5
	v_mov_b32_e32 v13, v29
	v_mov_b32_e32 v39, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], 3, v[12:13]
	v_add_co_u32 v15, vcc_lo, s10, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v16, vcc_lo, s11, v16, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, v12, v14
	global_load_b64 v[17:18], v[15:16], off
	s_and_b32 s2, s54, vcc_lo
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_38
; %bb.31:                               ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB0_21 Depth=5
	v_ashrrev_i32_e32 v13, 31, v12
	v_mov_b32_e32 v39, v12
	s_mov_b32 s64, 1
	s_mov_b32 s5, 0
                                        ; implicit-def: $sgpr6
                                        ; implicit-def: $sgpr66
                                        ; implicit-def: $sgpr65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 3, v[12:13]
	v_add_co_u32 v19, vcc_lo, s10, v19
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v20, vcc_lo, s11, v20, vcc_lo
.LBB0_32:                               ; %.lr.ph.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_15 Depth=2
                                        ;       Parent Loop BB0_17 Depth=3
                                        ;         Parent Loop BB0_19 Depth=4
                                        ;           Parent Loop BB0_21 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	global_load_b64 v[40:41], v[19:20], off
	v_mov_b32_e32 v13, v39
	s_or_b32 s65, s65, exec_lo
	s_or_b32 s66, s66, exec_lo
	s_mov_b32 s67, exec_lo
                                        ; implicit-def: $vgpr39
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u64_e64 v[40:41], v[17:18]
	s_cbranch_execz .LBB0_34
; %bb.33:                               ;   in Loop: Header=BB0_32 Depth=6
	v_add_nc_u32_e32 v39, -1, v13
	s_cmp_ge_i32 s64, s38
	v_add_co_u32 v19, s2, v19, -8
	s_cselect_b32 s68, -1, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_le_i32_e32 vcc_lo, v39, v14
	v_add_co_ci_u32_e64 v20, s2, -1, v20, s2
	s_and_not1_b32 s66, s66, exec_lo
	s_add_i32 s64, s64, 1
	s_or_b32 s2, vcc_lo, s68
	s_and_not1_b32 s65, s65, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s66, s66, s2
.LBB0_34:                               ; %Flow388
                                        ;   in Loop: Header=BB0_32 Depth=6
	s_or_b32 exec_lo, exec_lo, s67
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, exec_lo, s66
	s_or_b32 s5, s2, s5
	s_and_not1_b32 s2, s6, exec_lo
	s_and_b32 s6, s65, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s6, s2, s6
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_32
; %bb.35:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB0_21 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s2, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s2
; %bb.36:                               ;   in Loop: Header=BB0_21 Depth=5
	v_add_nc_u32_e32 v39, 1, v13
; %bb.37:                               ; %Flow386
                                        ;   in Loop: Header=BB0_21 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_38:                               ; %Flow389
                                        ;   in Loop: Header=BB0_21 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_gt_i32_e32 vcc_lo, s4, v12
	s_and_b32 s3, s54, vcc_lo
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_46
; %bb.39:                               ; %.lr.ph.i239.preheader
                                        ;   in Loop: Header=BB0_21 Depth=5
	s_mov_b32 s3, 0
	s_mov_b32 s6, 0
                                        ; implicit-def: $sgpr5
                                        ; implicit-def: $sgpr65
                                        ; implicit-def: $sgpr64
.LBB0_40:                               ; %.lr.ph.i239
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_15 Depth=2
                                        ;       Parent Loop BB0_17 Depth=3
                                        ;         Parent Loop BB0_19 Depth=4
                                        ;           Parent Loop BB0_21 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	global_load_b64 v[13:14], v[15:16], off
	s_or_b32 s64, s64, exec_lo
	s_or_b32 s65, s65, exec_lo
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[13:14], v[17:18]
	v_add_nc_u32_e32 v13, s6, v12
                                        ; implicit-def: $vgpr14
	s_and_saveexec_b32 s66, vcc_lo
	s_cbranch_execz .LBB0_42
; %bb.41:                               ;   in Loop: Header=BB0_40 Depth=6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v14, 1, v13
	s_add_i32 s6, s6, 1
	s_cmp_ge_i32 s6, s38
	s_cselect_b32 s67, -1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_le_i32_e32 vcc_lo, s4, v14
	s_and_not1_b32 s65, s65, exec_lo
	v_add_nc_u32_e32 v14, s6, v12
	s_and_not1_b32 s64, s64, exec_lo
	s_or_b32 s67, vcc_lo, s67
	v_add_co_u32 v15, vcc_lo, v15, 8
	s_and_b32 s67, s67, exec_lo
	v_add_co_ci_u32_e32 v16, vcc_lo, 0, v16, vcc_lo
	s_or_b32 s65, s65, s67
.LBB0_42:                               ; %Flow384
                                        ;   in Loop: Header=BB0_40 Depth=6
	s_or_b32 exec_lo, exec_lo, s66
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s66, exec_lo, s65
	s_or_b32 s3, s66, s3
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s66, s64, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s5, s5, s66
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_40
; %bb.43:                               ; %loop.exit.guard378
                                        ;   in Loop: Header=BB0_21 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s3
; %bb.44:                               ;   in Loop: Header=BB0_21 Depth=5
	v_add_nc_u32_e32 v14, -1, v13
; %bb.45:                               ; %Flow383
                                        ;   in Loop: Header=BB0_21 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v12, v14
.LBB0_46:                               ; %Flow385
                                        ;   in Loop: Header=BB0_21 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_le_i32_e32 vcc_lo, v39, v12
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_53
; %bb.47:                               ; %.lr.ph258.preheader
                                        ;   in Loop: Header=BB0_21 Depth=5
	v_lshl_add_u32 v13, v39, 1, v39
	s_mov_b32 s64, 0
.LBB0_48:                               ; %.lr.ph258
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_15 Depth=2
                                        ;       Parent Loop BB0_17 Depth=3
                                        ;         Parent Loop BB0_19 Depth=4
                                        ;           Parent Loop BB0_21 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v14, 31, v13
	v_lshlrev_b64 v[14:15], 2, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, s8, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s9, v15, vcc_lo
	global_load_b96 v[14:16], v[14:15], off
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v14, v14, v1 :: v_dual_sub_f32 v17, v15, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v18, v16, v3 :: v_dual_add_f32 v15, 0x358637bd, v14
	v_add_f32_e32 v16, 0x358637bd, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v14, 0x358637bd, v18 :: v_dual_mul_f32 v17, v15, v15
	v_dual_mul_f32 v18, v16, v16 :: v_dual_mul_f32 v19, v14, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e32 vcc_lo, v17, v21
	v_cmp_lt_f32_e64 s2, v18, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e64 s3, v19, v23
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s65, s2
	s_cbranch_execz .LBB0_52
; %bb.49:                               ;   in Loop: Header=BB0_48 Depth=6
	v_cvt_f64_f32_e64 v[17:18], |v15|
	v_cvt_f64_f32_e64 v[19:20], |v16|
	v_cvt_f64_f32_e64 v[40:41], |v14|
	v_cvt_f64_f32_e32 v[42:43], v15
	v_cvt_f64_f32_e32 v[44:45], v16
	v_cvt_f64_f32_e32 v[46:47], v14
	global_load_b32 v72, v29, s[46:47]
	v_div_scale_f32 v73, null, s31, s31, v15
	v_div_scale_f32 v74, null, s36, s36, v16
	v_div_scale_f32 v76, null, s37, s37, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v75, v73
	v_rcp_f32_e32 v77, v74
	s_waitcnt_depctr 0xfff
	v_fma_f32 v78, -v73, v75, 1.0
	v_mul_f64 v[17:18], v[17:18], 0.5
	v_mul_f64 v[19:20], v[19:20], 0.5
	v_mul_f64 v[40:41], v[40:41], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_scale_f64 v[48:49], null, v[42:43], v[42:43], v[17:18]
	v_div_scale_f64 v[50:51], null, v[44:45], v[44:45], v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[52:53], null, v[46:47], v[46:47], v[40:41]
	v_div_scale_f64 v[66:67], s2, v[17:18], v[42:43], v[17:18]
	v_rcp_f64_e32 v[54:55], v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[56:57], v[50:51]
	v_rcp_f64_e32 v[58:59], v[52:53]
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], -v[48:49], v[54:55], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[62:63], -v[50:51], v[56:57], 1.0
	v_fma_f64 v[64:65], -v[52:53], v[58:59], 1.0
	v_fma_f64 v[54:55], v[54:55], v[60:61], v[54:55]
	v_fma_f64 v[56:57], v[56:57], v[62:63], v[56:57]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[58:59], v[58:59], v[64:65], v[58:59]
	v_fma_f64 v[60:61], -v[48:49], v[54:55], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], -v[50:51], v[56:57], 1.0
	v_fma_f64 v[64:65], -v[52:53], v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[54:55], v[54:55], v[60:61], v[54:55]
	v_div_scale_f64 v[60:61], s3, v[19:20], v[44:45], v[19:20]
	v_fma_f64 v[56:57], v[56:57], v[62:63], v[56:57]
	v_div_scale_f64 v[62:63], s4, v[40:41], v[46:47], v[40:41]
	v_fma_f64 v[58:59], v[58:59], v[64:65], v[58:59]
	v_mul_f64 v[64:65], v[66:67], v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[68:69], v[60:61], v[56:57]
	v_mul_f64 v[70:71], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[48:49], -v[48:49], v[64:65], v[66:67]
	v_rcp_f32_e32 v66, v76
	v_div_scale_f32 v67, vcc_lo, v15, s31, v15
	v_fma_f64 v[50:51], -v[50:51], v[68:69], v[60:61]
	v_fma_f32 v60, -v74, v77, 1.0
	v_div_scale_f32 v61, s5, v16, s36, v16
	v_fma_f64 v[52:53], -v[52:53], v[70:71], v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(TRANS32_DEP_1)
	v_fmac_f32_e32 v77, v60, v77
	v_fmac_f32_e32 v75, v78, v75
	v_fma_f32 v78, -v76, v66, 1.0
	v_div_scale_f32 v60, s6, v14, s37, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v66, v78, v66
	v_dual_mul_f32 v78, v61, v77 :: v_dual_mul_f32 v63, v60, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v80, -v74, v78, v61
	v_dual_mul_f32 v79, v67, v75 :: v_dual_fmac_f32 v78, v80, v77
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v62, -v73, v79, v67
	v_fma_f32 v61, -v74, v78, v61
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v79, v62, v75
	v_fma_f32 v62, -v76, v63, v60
	v_fma_f32 v67, -v73, v79, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v63, v62, v66
	v_div_fmas_f32 v62, v67, v75, v79
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f64 v[48:49], v[48:49], v[54:55], v[64:65]
	s_mov_b32 vcc_lo, s5
	v_fma_f32 v55, -v76, v63, v60
	v_div_fmas_f32 v54, v61, v77, v78
	s_mov_b32 vcc_lo, s3
	v_div_fixup_f32 v15, v62, s31, v15
	v_div_fmas_f64 v[50:51], v[50:51], v[56:57], v[68:69]
	s_mov_b32 vcc_lo, s6
	v_div_fixup_f32 v54, v54, s36, v16
	v_div_fmas_f32 v56, v55, v66, v63
	s_mov_b32 vcc_lo, s4
	v_cvt_f64_f32_e32 v[15:16], v15
	v_div_fmas_f64 v[52:53], v[52:53], v[58:59], v[70:71]
	v_cvt_f64_f32_e32 v[54:55], v54
	v_div_fixup_f32 v14, v56, s37, v14
	v_div_fixup_f64 v[17:18], v[48:49], v[42:43], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cvt_f64_f32_e32 v[42:43], v14
	v_div_fixup_f64 v[19:20], v[50:51], v[44:45], v[19:20]
	v_div_fixup_f64 v[40:41], v[52:53], v[46:47], v[40:41]
	v_add_f64 v[14:15], v[17:18], v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[19:20], v[54:55]
	v_add_f64 v[18:19], v[40:41], v[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f32_f64_e32 v14, v[14:15]
	v_cvt_f32_f64_e32 v15, v[16:17]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v17, v72, v32
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_f64_e32 v16, v[18:19]
	v_mul_lo_u32 v17, v17, s25
	v_trunc_f32_e32 v14, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v14, v14
	v_trunc_f32_e32 v15, v15
	v_mul_lo_u32 v14, s7, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v15, v15
	v_trunc_f32_e32 v16, v16
	v_mul_lo_u32 v15, v15, s27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v16, v16
	v_add3_u32 v14, v14, s53, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v14, v14, v16, v17
	v_ashrrev_i32_e32 v15, 31, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], 2, v[14:15]
	v_add_co_u32 v15, vcc_lo, s40, v15
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v16, vcc_lo, s41, v16, vcc_lo
	global_atomic_add_u32 v15, v[15:16], v31, off glc
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s39, v15
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_52
; %bb.50:                               ;   in Loop: Header=BB0_48 Depth=6
	v_mad_u64_u32 v[16:17], null, v14, s39, v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v17, 31, v16
	v_lshlrev_b64 v[14:15], 2, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, s22, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s23, v15, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s26
	global_store_b32 v[14:15], v39, off
	s_cbranch_vccnz .LBB0_52
; %bb.51:                               ;   in Loop: Header=BB0_48 Depth=6
	global_load_b32 v14, v29, s[46:47]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v14, v14, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v15, 31, v14
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, s42, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s43, v15, vcc_lo
	global_load_b32 v16, v[14:15], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v16, 1, v16
	global_store_b32 v[14:15], v16, off
.LBB0_52:                               ;   in Loop: Header=BB0_48 Depth=6
	s_or_b32 exec_lo, exec_lo, s65
	v_add_nc_u32_e32 v14, 1, v39
	v_cmp_ge_i32_e32 vcc_lo, v39, v12
	v_add_nc_u32_e32 v13, 3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v39, v14
	s_or_b32 s64, vcc_lo, s64
	s_and_not1_b32 exec_lo, exec_lo, s64
	s_cbranch_execnz .LBB0_48
.LBB0_53:                               ; %Flow390
                                        ;   in Loop: Header=BB0_21 Depth=5
	s_or_b32 exec_lo, exec_lo, s63
	v_add_nc_u32_e32 v12, 1, v38
	v_cmp_ge_i32_e32 vcc_lo, v38, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v38, v12
	s_or_b32 s62, vcc_lo, s62
	s_and_not1_b32 exec_lo, exec_lo, s62
	s_cbranch_execnz .LBB0_21
.LBB0_54:                               ; %Flow397
                                        ;   in Loop: Header=BB0_19 Depth=4
	s_or_b32 exec_lo, exec_lo, s61
	v_add_nc_u32_e32 v12, 1, v11
	v_cmp_ge_i32_e32 vcc_lo, v11, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v11, v12
	s_or_b32 s60, vcc_lo, s60
	s_and_not1_b32 exec_lo, exec_lo, s60
	s_cbranch_execnz .LBB0_19
.LBB0_55:                               ; %Flow399
                                        ;   in Loop: Header=BB0_17 Depth=3
	s_or_b32 exec_lo, exec_lo, s59
	v_add_nc_u32_e32 v11, 1, v10
	v_cmp_ge_i32_e32 vcc_lo, v10, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v10, v11
	s_or_b32 s58, vcc_lo, s58
	s_and_not1_b32 exec_lo, exec_lo, s58
	s_cbranch_execnz .LBB0_17
; %bb.56:                               ; %._crit_edge273.loopexit
                                        ;   in Loop: Header=BB0_15 Depth=2
	s_or_b32 exec_lo, exec_lo, s58
	global_load_b32 v11, v29, s[44:45]
.LBB0_57:                               ; %Flow400
                                        ;   in Loop: Header=BB0_15 Depth=2
	s_or_b32 exec_lo, exec_lo, s57
	v_add_nc_u32_e32 v32, s55, v32
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v32, v11
	s_or_b32 s56, vcc_lo, s56
	s_and_not1_b32 exec_lo, exec_lo, s56
	s_cbranch_execnz .LBB0_15
.LBB0_58:                               ; %Flow403
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s35
	s_add_i32 s34, s30, s34
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s34, s24
	s_cbranch_scc0 .LBB0_3
.LBB0_59:                               ; %.loopexit243
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 392
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 81
		.amdhsa_next_free_sgpr 69
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_, .Lfunc_end0-_Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3868
; NumSgprs: 71
; NumVgprs: 81
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 8
; VGPRBlocks: 10
; NumSGPRsForWavesPerEU: 71
; NumVGPRsForWavesPerEU: 81
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           1
        .value_kind:     by_value
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         96
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         112
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         120
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         128
        .size:           8
        .value_kind:     global_buffer
      - .offset:         136
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         140
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         144
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         148
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         150
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         152
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         154
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         156
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         158
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         176
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         184
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         192
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         200
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 392
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_
    .private_segment_fixed_size: 0
    .sgpr_count:     71
    .sgpr_spill_count: 0
    .symbol:         _Z36voxel_sampling_idx_binary_gpu_kerneliiiiffffffiibPKfPKxPKiS0_S4_PiS5_S5_S5_S5_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     81
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
