#include <stdio.h>
#define STREAM_COUNT 3
#define ELEMENT_COUNT 300000

__global__ 
void kernel0() {
	float sum = 0.0;
	for (int x = 0; x < ELEMENT_COUNT; x++) {
		for (int y = 0; y < ELEMENT_COUNT; y++) {
			sum = sum + tan(0.1) * tan(0.1);
		}
	}
}

__global__ 
void kernel1() {
	float sum = 0.0;
	for (int x = 0; x < ELEMENT_COUNT; x++) {
		for (int y = 0; y < ELEMENT_COUNT; y++) {
			sum = sum + tan(0.1) * tan(0.1);
		}
	}
}

__global__ 
void kernel2() {
	float sum = 0.0;
	for (int x = 0; x < ELEMENT_COUNT; x++) {
		for (int y = 0; y < ELEMENT_COUNT; y++) {
			sum = sum + tan(0.1) * tan(0.1);
		}
	}
}

void warmUp(dim3 block, dim3 grid) {
	kernel0<<<grid,block>>>();
	kernel1<<<grid,block>>>();
	kernel2<<<grid,block>>>();
}

void createArraysNullStream(dim3 block, dim3 grid) {

}

void createArrayNonNullStream(dim3 block, dim3 grid) {
	cudaStream_t* streams = (cudaStream_t*)malloc(STREAM_COUNT*sizeof(cudaStream_t));
	for (int x = 0; x < STREAM_COUNT; x++) {
		cudaStreamCreate(&streams[x]);
	}

	for (int x = 0; x < STREAM_COUNT; x++) {
		kernel0<<<grid,block,0,streams[x]>>>();
		kernel1<<<grid,block,0,streams[x]>>>();
		kernel2<<<grid,block,0,streams[x]>>>();
	}

	for (int x = 0; x < STREAM_COUNT; x++) {
		cudaStreamDestroy(streams[x]);
	}
}

int main(void) {
	dim3 block(1);
	dim3 grid(1);

	warmUp(block, grid);
	createArraysNullStream(block, grid);
	createArrayNonNullStream(block, grid);
	cudaDeviceReset();
}
	.file	"tmpxft_002b7f13_00000000-6_streams_events.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z22createArraysNullStream4dim3S_
	.type	_Z22createArraysNullStream4dim3S_, @function
_Z22createArraysNullStream4dim3S_:
.LFB2028:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z22createArraysNullStream4dim3S_, .-_Z22createArraysNullStream4dim3S_
	.globl	_Z25__device_stub__Z7kernel0vv
	.type	_Z25__device_stub__Z7kernel0vv, @function
_Z25__device_stub__Z7kernel0vv:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z7kernel0v(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L3:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z25__device_stub__Z7kernel0vv, .-_Z25__device_stub__Z7kernel0vv
	.globl	_Z7kernel0v
	.type	_Z7kernel0v, @function
_Z7kernel0v:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z7kernel0vv
	.cfi_endproc
.LFE2056:
	.size	_Z7kernel0v, .-_Z7kernel0v
	.globl	_Z25__device_stub__Z7kernel1vv
	.type	_Z25__device_stub__Z7kernel1vv, @function
_Z25__device_stub__Z7kernel1vv:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z7kernel1v(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L9:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z25__device_stub__Z7kernel1vv, .-_Z25__device_stub__Z7kernel1vv
	.globl	_Z7kernel1v
	.type	_Z7kernel1v, @function
_Z7kernel1v:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z7kernel1vv
	.cfi_endproc
.LFE2058:
	.size	_Z7kernel1v, .-_Z7kernel1v
	.globl	_Z25__device_stub__Z7kernel2vv
	.type	_Z25__device_stub__Z7kernel2vv, @function
_Z25__device_stub__Z7kernel2vv:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z7kernel2v(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L14:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z25__device_stub__Z7kernel2vv, .-_Z25__device_stub__Z7kernel2vv
	.globl	_Z7kernel2v
	.type	_Z7kernel2v, @function
_Z7kernel2v:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z7kernel2vv
	.cfi_endproc
.LFE2060:
	.size	_Z7kernel2v, .-_Z7kernel2v
	.globl	_Z6warmUp4dim3S_
	.type	_Z6warmUp4dim3S_, @function
_Z6warmUp4dim3S_:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, %rax
	movl	%ecx, %r10d
	movq	%rdx, %rdi
	movl	%esi, 24(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rdx, (%rsp)
	movq	%rax, %rdx
	movl	%ecx, 8(%rsp)
	movl	%esi, %ecx
	movl	%r10d, %esi
	movq	%rax, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	call	_Z25__device_stub__Z7kernel0vv
.L20:
	movl	24(%rsp), %ecx
	movq	16(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	(%rsp), %rdi
	movl	8(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	call	_Z25__device_stub__Z7kernel1vv
.L21:
	movl	24(%rsp), %ecx
	movq	16(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	(%rsp), %rdi
	movl	8(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	_Z25__device_stub__Z7kernel2vv
.L19:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z6warmUp4dim3S_, .-_Z6warmUp4dim3S_
	.globl	_Z24createArrayNonNullStream4dim3S_
	.type	_Z24createArrayNonNullStream4dim3S_, @function
_Z24createArrayNonNullStream4dim3S_:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$40, %rsp
	.cfi_def_cfa_offset 64
	movq	%rdi, 16(%rsp)
	movl	$24, %edi
	movl	%esi, 24(%rsp)
	movq	%rdx, (%rsp)
	movl	%ecx, 8(%rsp)
	call	malloc@PLT
	movq	%rax, %rbx
	movq	%rax, %rdi
	call	cudaStreamCreate@PLT
	leaq	8(%rbx), %rdi
	call	cudaStreamCreate@PLT
	leaq	16(%rbx), %rdi
	call	cudaStreamCreate@PLT
.L28:
	movl	24(%rsp), %ecx
	movq	(%rbx,%rbp,8), %r9
	xorl	%r8d, %r8d
	movq	16(%rsp), %rdx
	movq	(%rsp), %rdi
	movl	8(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	call	_Z25__device_stub__Z7kernel0vv
.L25:
	movl	24(%rsp), %ecx
	movq	(%rbx,%rbp,8), %r9
	xorl	%r8d, %r8d
	movq	16(%rsp), %rdx
	movq	(%rsp), %rdi
	movl	8(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	call	_Z25__device_stub__Z7kernel1vv
.L26:
	movl	24(%rsp), %ecx
	movq	(%rbx,%rbp,8), %r9
	xorl	%r8d, %r8d
	movq	16(%rsp), %rdx
	movq	(%rsp), %rdi
	movl	8(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	call	_Z25__device_stub__Z7kernel2vv
.L27:
	incq	%rbp
	cmpq	$3, %rbp
	jne	.L28
	movq	(%rbx), %rdi
	call	cudaStreamDestroy@PLT
	movq	8(%rbx), %rdi
	call	cudaStreamDestroy@PLT
	movq	16(%rbx), %rdi
	addq	$40, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	cudaStreamDestroy@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z24createArrayNonNullStream4dim3S_, .-_Z24createArrayNonNullStream4dim3S_
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movq	%rdi, %rdx
	movq	%rdi, 8(%rsp)
	movq	%rdi, 20(%rsp)
	movl	$1, 16(%rsp)
	movl	$1, 28(%rsp)
	call	_Z6warmUp4dim3S_
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	_Z24createArrayNonNullStream4dim3S_
	call	cudaDeviceReset@PLT
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z7kernel2v"
.LC1:
	.string	"_Z7kernel1v"
.LC2:
	.string	"_Z7kernel0v"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2062:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7kernel2v(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7kernel1v(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7kernel0v(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2062:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#define STREAM_COUNT 3
#define ELEMENT_COUNT 300000

__global__ 
void kernel0() {
	float sum = 0.0;
	for (int x = 0; x < ELEMENT_COUNT; x++) {
		for (int y = 0; y < ELEMENT_COUNT; y++) {
			sum = sum + tan(0.1) * tan(0.1);
		}
	}
}

__global__ 
void kernel1() {
	float sum = 0.0;
	for (int x = 0; x < ELEMENT_COUNT; x++) {
		for (int y = 0; y < ELEMENT_COUNT; y++) {
			sum = sum + tan(0.1) * tan(0.1);
		}
	}
}

__global__ 
void kernel2() {
	float sum = 0.0;
	for (int x = 0; x < ELEMENT_COUNT; x++) {
		for (int y = 0; y < ELEMENT_COUNT; y++) {
			sum = sum + tan(0.1) * tan(0.1);
		}
	}
}

void warmUp(dim3 block, dim3 grid) {
	kernel0<<<grid,block>>>();
	kernel1<<<grid,block>>>();
	kernel2<<<grid,block>>>();
}

void createArraysNullStream(dim3 block, dim3 grid) {

}

void createArrayNonNullStream(dim3 block, dim3 grid) {
	hipStream_t* streams = (hipStream_t*)malloc(STREAM_COUNT*sizeof(hipStream_t));
	for (int x = 0; x < STREAM_COUNT; x++) {
		hipStreamCreate(&streams[x]);
	}

	for (int x = 0; x < STREAM_COUNT; x++) {
		kernel0<<<grid,block,0,streams[x]>>>();
		kernel1<<<grid,block,0,streams[x]>>>();
		kernel2<<<grid,block,0,streams[x]>>>();
	}

	for (int x = 0; x < STREAM_COUNT; x++) {
		hipStreamDestroy(streams[x]);
	}
}

int main(void) {
	dim3 block(1);
	dim3 grid(1);

	warmUp(block, grid);
	createArraysNullStream(block, grid);
	createArrayNonNullStream(block, grid);
	hipDeviceReset();
}
	.text
	.file	"streams_events.hip"
	.globl	_Z22__device_stub__kernel0v     # -- Begin function _Z22__device_stub__kernel0v
	.type	_Z22__device_stub__kernel0v,@function
_Z22__device_stub__kernel0v:            # @_Z22__device_stub__kernel0v
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_Z7kernel0v, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__kernel0v, .Lfunc_end0-_Z22__device_stub__kernel0v
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__kernel1v     # -- Begin function _Z22__device_stub__kernel1v
	.type	_Z22__device_stub__kernel1v,@function
_Z22__device_stub__kernel1v:            # @_Z22__device_stub__kernel1v
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_Z7kernel1v, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__kernel1v, .Lfunc_end1-_Z22__device_stub__kernel1v
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__kernel2v     # -- Begin function _Z22__device_stub__kernel2v
	.type	_Z22__device_stub__kernel2v,@function
_Z22__device_stub__kernel2v:            # @_Z22__device_stub__kernel2v
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_Z7kernel2v, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z22__device_stub__kernel2v, .Lfunc_end2-_Z22__device_stub__kernel2v
	.cfi_endproc
                                        # -- End function
	.globl	_Z6warmUp4dim3S_                # -- Begin function _Z6warmUp4dim3S_
	.type	_Z6warmUp4dim3S_,@function
_Z6warmUp4dim3S_:                       # @_Z6warmUp4dim3S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movq	%rdx, %r15
	movl	%esi, %ebx
	movq	%rdi, %r14
	movq	%rdx, %rdi
	movl	%ecx, %esi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	callq	_Z22__device_stub__kernel0v
.LBB3_2:
	movq	%r15, %rdi
	movl	%ebp, %esi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	callq	_Z22__device_stub__kernel1v
.LBB3_4:
	movq	%r15, %rdi
	movl	%ebp, %esi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	addq	$8, %rsp
	testl	%eax, %eax
	je	.LBB3_6
# %bb.5:
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_6:
	.cfi_def_cfa_offset 48
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z22__device_stub__kernel2v     # TAILCALL
.Lfunc_end3:
	.size	_Z6warmUp4dim3S_, .Lfunc_end3-_Z6warmUp4dim3S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z22createArraysNullStream4dim3S_ # -- Begin function _Z22createArraysNullStream4dim3S_
	.type	_Z22createArraysNullStream4dim3S_,@function
_Z22createArraysNullStream4dim3S_:      # @_Z22createArraysNullStream4dim3S_
	.cfi_startproc
# %bb.0:
	retq
.Lfunc_end4:
	.size	_Z22createArraysNullStream4dim3S_, .Lfunc_end4-_Z22createArraysNullStream4dim3S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z24createArrayNonNullStream4dim3S_ # -- Begin function _Z24createArrayNonNullStream4dim3S_
	.type	_Z24createArrayNonNullStream4dim3S_,@function
_Z24createArrayNonNullStream4dim3S_:    # @_Z24createArrayNonNullStream4dim3S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movq	%rdx, %r14
	movl	%esi, %r15d
	movq	%rdi, %r12
	movl	$24, %edi
	callq	malloc
	movq	%rax, %rbx
	xorl	%r13d, %r13d
.LBB5_1:                                # =>This Inner Loop Header: Depth=1
	leaq	(%rbx,%r13), %rdi
	callq	hipStreamCreate
	addq	$8, %r13
	cmpq	$24, %r13
	jne	.LBB5_1
# %bb.2:                                # %.preheader56.preheader
	xorl	%r13d, %r13d
.LBB5_3:                                # %.preheader56
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rbx,%r13,8), %r9
	movq	%r14, %rdi
	movl	%ebp, %esi
	movq	%r12, %rdx
	movl	%r15d, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_5
# %bb.4:                                #   in Loop: Header=BB5_3 Depth=1
	callq	_Z22__device_stub__kernel0v
.LBB5_5:                                #   in Loop: Header=BB5_3 Depth=1
	movq	(%rbx,%r13,8), %r9
	movq	%r14, %rdi
	movl	%ebp, %esi
	movq	%r12, %rdx
	movl	%r15d, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_7
# %bb.6:                                #   in Loop: Header=BB5_3 Depth=1
	callq	_Z22__device_stub__kernel1v
.LBB5_7:                                #   in Loop: Header=BB5_3 Depth=1
	movq	(%rbx,%r13,8), %r9
	movq	%r14, %rdi
	movl	%ebp, %esi
	movq	%r12, %rdx
	movl	%r15d, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_9
# %bb.8:                                #   in Loop: Header=BB5_3 Depth=1
	callq	_Z22__device_stub__kernel2v
.LBB5_9:                                #   in Loop: Header=BB5_3 Depth=1
	incq	%r13
	cmpq	$3, %r13
	jne	.LBB5_3
# %bb.10:                               # %.preheader.preheader
	xorl	%r14d, %r14d
.LBB5_11:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rbx,%r14,8), %rdi
	callq	hipStreamDestroy
	incq	%r14
	cmpq	$3, %r14
	jne	.LBB5_11
# %bb.12:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z24createArrayNonNullStream4dim3S_, .Lfunc_end5-_Z24createArrayNonNullStream4dim3S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	_Z6warmUp4dim3S_
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	_Z24createArrayNonNullStream4dim3S_
	callq	hipDeviceReset
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel0v, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel1v, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel2v, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7kernel0v,@object             # @_Z7kernel0v
	.section	.rodata,"a",@progbits
	.globl	_Z7kernel0v
	.p2align	3, 0x0
_Z7kernel0v:
	.quad	_Z22__device_stub__kernel0v
	.size	_Z7kernel0v, 8

	.type	_Z7kernel1v,@object             # @_Z7kernel1v
	.globl	_Z7kernel1v
	.p2align	3, 0x0
_Z7kernel1v:
	.quad	_Z22__device_stub__kernel1v
	.size	_Z7kernel1v, 8

	.type	_Z7kernel2v,@object             # @_Z7kernel2v
	.globl	_Z7kernel2v
	.p2align	3, 0x0
_Z7kernel2v:
	.quad	_Z22__device_stub__kernel2v
	.size	_Z7kernel2v, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z7kernel0v"
	.size	.L__unnamed_1, 12

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z7kernel1v"
	.size	.L__unnamed_2, 12

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z7kernel2v"
	.size	.L__unnamed_3, 12

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__kernel0v
	.addrsig_sym _Z22__device_stub__kernel1v
	.addrsig_sym _Z22__device_stub__kernel2v
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7kernel0v
	.addrsig_sym _Z7kernel1v
	.addrsig_sym _Z7kernel2v
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7kernel0v             ; -- Begin function _Z7kernel0v
	.globl	_Z7kernel0v
	.p2align	8
	.type	_Z7kernel0v,@function
_Z7kernel0v:                            ; @_Z7kernel0v
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel0v
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 0
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 0
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7kernel0v, .Lfunc_end0-_Z7kernel0v
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7kernel1v             ; -- Begin function _Z7kernel1v
	.globl	_Z7kernel1v
	.p2align	8
	.type	_Z7kernel1v,@function
_Z7kernel1v:                            ; @_Z7kernel1v
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel1v
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 0
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 0
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z7kernel1v, .Lfunc_end1-_Z7kernel1v
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7kernel2v             ; -- Begin function _Z7kernel2v
	.globl	_Z7kernel2v
	.p2align	8
	.type	_Z7kernel2v,@function
_Z7kernel2v:                            ; @_Z7kernel2v
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel2v
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 0
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 0
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z7kernel2v, .Lfunc_end2-_Z7kernel2v
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:           []
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 4
    .kernarg_segment_size: 0
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel0v
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel0v.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:           []
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 4
    .kernarg_segment_size: 0
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel1v
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel1v.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:           []
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 4
    .kernarg_segment_size: 0
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel2v
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel2v.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
