
#include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <vector>
#include <iostream>

using namespace std;

__global__ void vecadd(const int* A, const int* B, int* C) {
	//get block index
	unsigned int block_idx = blockIdx.x;
	//get thread index
	unsigned int thread_idx = threadIdx.x;
	//get the number of threads per block
	unsigned int block_dim = blockDim.x;
	//get the thread's unique ID (block_idx * block_dim)
	unsigned int idx = (block_idx * block_dim) + thread_idx;
	//add corresponding locations of A and B and store in C
	C[idx] = A[idx] + B[idx];
}

constexpr int ELEMENTS = 1024;

int main(int argc, char** argv) {

	//create host memory
	auto data_size = sizeof(int) * ELEMENTS;
	vector<int> A(ELEMENTS);
	vector<int> B(ELEMENTS);
	vector<int> C(ELEMENTS);

	//initialize input data
	for (size_t i = 0; i < ELEMENTS; ++i) {
		A[i] = B[i] = i;
	}

	//declare buffers
	int* buff_A, * buff_B, * buff_C;

	//initialize the buffers
	cudaMalloc((void**)&buff_A, data_size);
	cudaMalloc((void**)&buff_B, data_size);
	cudaMalloc((void**)&buff_C, data_size);

	cudaMemcpy(buff_A, &A[0], data_size, cudaMemcpyKind::cudaMemcpyHostToDevice);
	cudaMemcpy(buff_B, &B[0], data_size, cudaMemcpyKind::cudaMemcpyHostToDevice);

	//run kernel with one thread for each element
	//first value is number of blocks, secnod is threads per block. max 1024 threads per block
	vecadd<<<ELEMENTS / 1024, 1024>>>(buff_A, buff_B, buff_C);
	
	//wait for kernel to complete
	cudaDeviceSynchronize();

	//read output buffer back to the host
	cudaMemcpy(&C[0], buff_C, data_size, cudaMemcpyKind::cudaMemcpyDeviceToHost);
	
	for (auto element : C)
		cout << element << endl;

	//clean resources
	cudaFree(buff_A);
	cudaFree(buff_B);
	cudaFree(buff_C);
	return 0;
}
	.file	"tmpxft_0036a70e_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4001:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4001:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z31__device_stub__Z6vecaddPKiS0_PiPKiS0_Pi
	.type	_Z31__device_stub__Z6vecaddPKiS0_PiPKiS0_Pi, @function
_Z31__device_stub__Z6vecaddPKiS0_PiPKiS0_Pi:
.LFB4023:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6vecaddPKiS0_Pi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4023:
	.size	_Z31__device_stub__Z6vecaddPKiS0_PiPKiS0_Pi, .-_Z31__device_stub__Z6vecaddPKiS0_PiPKiS0_Pi
	.globl	_Z6vecaddPKiS0_Pi
	.type	_Z6vecaddPKiS0_Pi, @function
_Z6vecaddPKiS0_Pi:
.LFB4024:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z6vecaddPKiS0_PiPKiS0_Pi
	.cfi_endproc
.LFE4024:
	.size	_Z6vecaddPKiS0_Pi, .-_Z6vecaddPKiS0_Pi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z6vecaddPKiS0_Pi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4026:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6vecaddPKiS0_Pi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4026:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZNSt6vectorIiSaIiEEC2EmRKS0_.str1.1,"aMS",@progbits,1
.LC1:
	.string	"cannot create std::vector larger than max_size()"
	.section	.text._ZNSt6vectorIiSaIiEEC2EmRKS0_,"axG",@progbits,_ZNSt6vectorIiSaIiEEC5EmRKS0_,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEEC2EmRKS0_
	.type	_ZNSt6vectorIiSaIiEEC2EmRKS0_, @function
_ZNSt6vectorIiSaIiEEC2EmRKS0_:
.LFB4333:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693951, %rax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	cmpq	%rsi, %rax
	jnb	.L11
	leaq	.LC1(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L11:
	movq	%rsi, %rbp
	xorl	%esi, %esi
	movq	%rdi, %rbx
	xorl	%eax, %eax
	movq	%rsi, (%rdi)
	leaq	0(,%rbp,4), %r12
	movq	%rsi, 8(%rdi)
	movq	%rsi, 16(%rdi)
	testq	%rbp, %rbp
	je	.L12
	movq	%r12, %rdi
	call	_Znwm@PLT
.L12:
	addq	%rax, %r12
	movq	%rax, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%r12, 16(%rbx)
	testq	%rbp, %rbp
	je	.L13
	xorl	%ecx, %ecx
	addq	$4, %rax
	movl	%ecx, -4(%rax)
	decq	%rbp
	je	.L13
.L14:
	cmpq	%rax, %r12
	je	.L13
	xorl	%edx, %edx
	addq	$4, %rax
	movl	%edx, -4(%rax)
	jmp	.L14
.L13:
	movq	%rax, 8(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4333:
	.size	_ZNSt6vectorIiSaIiEEC2EmRKS0_, .-_ZNSt6vectorIiSaIiEEC2EmRKS0_
	.weak	_ZNSt6vectorIiSaIiEEC1EmRKS0_
	.set	_ZNSt6vectorIiSaIiEEC1EmRKS0_,_ZNSt6vectorIiSaIiEEC2EmRKS0_
	.section	.text._ZNSt6vectorIiSaIiEED2Ev,"axG",@progbits,_ZNSt6vectorIiSaIiEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEED2Ev
	.type	_ZNSt6vectorIiSaIiEED2Ev, @function
_ZNSt6vectorIiSaIiEED2Ev:
.LFB4336:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L25
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L25:
	ret
	.cfi_endproc
.LFE4336:
	.size	_ZNSt6vectorIiSaIiEED2Ev, .-_ZNSt6vectorIiSaIiEED2Ev
	.weak	_ZNSt6vectorIiSaIiEED1Ev
	.set	_ZNSt6vectorIiSaIiEED1Ev,_ZNSt6vectorIiSaIiEED2Ev
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3998:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3998
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$1024, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	96(%rsp), %r13
	leaq	48(%rsp), %rbp
	movq	%r13, %rdx
	movq	%rbp, %rdi
	leaq	72(%rsp), %r12
.LEHB0:
	call	_ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE0:
	movq	%r13, %rdx
	movl	$1024, %esi
	movq	%r12, %rdi
.LEHB1:
	call	_ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE1:
	leaq	36(%rsp), %rdx
	movl	$1024, %esi
	movq	%r13, %rdi
.LEHB2:
	call	_ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE2:
	movq	72(%rsp), %rbx
	movq	48(%rsp), %r14
	xorl	%eax, %eax
.L28:
	movl	%eax, (%rbx,%rax,4)
	movl	%eax, (%r14,%rax,4)
	incq	%rax
	cmpq	$1024, %rax
	jne	.L28
	movq	%rsp, %rdi
	movl	$4096, %esi
.LEHB3:
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$4096, %edx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$4096, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$10, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 44(%rsp)
	movq	%rdx, 36(%rsp)
	movq	%rdi, 24(%rsp)
	movl	$1, 32(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L29
.L31:
	call	cudaDeviceSynchronize@PLT
	jmp	.L46
.L29:
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z31__device_stub__Z6vecaddPKiS0_PiPKiS0_Pi
	jmp	.L31
.L46:
	movq	96(%rsp), %rbx
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$4096, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movq	104(%rsp), %r14
	leaq	_ZSt4cout(%rip), %r15
.L32:
	cmpq	%rbx, %r14
	je	.L47
	movl	(%rbx), %esi
	movq	%r15, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	addq	$4, %rbx
	jmp	.L32
.L47:
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
.LEHE3:
	movq	%r13, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	%r12, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	%rbp, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	jmp	.L44
.L41:
	endbr64
	movq	%rax, %rbx
.L34:
	movq	%r13, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L35
.L40:
	endbr64
	movq	%rax, %rbx
.L35:
	movq	%r12, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L36
.L39:
	endbr64
	movq	%rax, %rbx
.L36:
	movq	%rbp, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L44
	movq	%rbx, %rdi
.LEHB4:
	call	_Unwind_Resume@PLT
.LEHE4:
.L44:
	call	__stack_chk_fail@PLT
.L38:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3998:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3998:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3998-.LLSDACSB3998
.LLSDACSB3998:
	.uleb128 .LEHB0-.LFB3998
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3998
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L39-.LFB3998
	.uleb128 0
	.uleb128 .LEHB2-.LFB3998
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L40-.LFB3998
	.uleb128 0
	.uleb128 .LEHB3-.LFB3998
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L41-.LFB3998
	.uleb128 0
	.uleb128 .LEHB4-.LFB3998
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE3998:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>

#include <vector>
#include <iostream>

using namespace std;

__global__ void vecadd(const int* A, const int* B, int* C) {
	//get block index
	unsigned int block_idx = blockIdx.x;
	//get thread index
	unsigned int thread_idx = threadIdx.x;
	//get the number of threads per block
	unsigned int block_dim = blockDim.x;
	//get the thread's unique ID (block_idx * block_dim)
	unsigned int idx = (block_idx * block_dim) + thread_idx;
	//add corresponding locations of A and B and store in C
	C[idx] = A[idx] + B[idx];
}

constexpr int ELEMENTS = 1024;

int main(int argc, char** argv) {

	//create host memory
	auto data_size = sizeof(int) * ELEMENTS;
	vector<int> A(ELEMENTS);
	vector<int> B(ELEMENTS);
	vector<int> C(ELEMENTS);

	//initialize input data
	for (size_t i = 0; i < ELEMENTS; ++i) {
		A[i] = B[i] = i;
	}

	//declare buffers
	int* buff_A, * buff_B, * buff_C;

	//initialize the buffers
	hipMalloc((void**)&buff_A, data_size);
	hipMalloc((void**)&buff_B, data_size);
	hipMalloc((void**)&buff_C, data_size);

	hipMemcpy(buff_A, &A[0], data_size, hipMemcpyKind::hipMemcpyHostToDevice);
	hipMemcpy(buff_B, &B[0], data_size, hipMemcpyKind::hipMemcpyHostToDevice);

	//run kernel with one thread for each element
	//first value is number of blocks, secnod is threads per block. max 1024 threads per block
	vecadd<<<ELEMENTS / 1024, 1024>>>(buff_A, buff_B, buff_C);
	
	//wait for kernel to complete
	hipDeviceSynchronize();

	//read output buffer back to the host
	hipMemcpy(&C[0], buff_C, data_size, hipMemcpyKind::hipMemcpyDeviceToHost);
	
	for (auto element : C)
		cout << element << endl;

	//clean resources
	hipFree(buff_A);
	hipFree(buff_B);
	hipFree(buff_C);
	return 0;
}
	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__vecaddPKiS0_Pi # -- Begin function _Z21__device_stub__vecaddPKiS0_Pi
	.type	_Z21__device_stub__vecaddPKiS0_Pi,@function
_Z21__device_stub__vecaddPKiS0_Pi:      # @_Z21__device_stub__vecaddPKiS0_Pi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6vecaddPKiS0_Pi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__vecaddPKiS0_Pi, .Lfunc_end0-_Z21__device_stub__vecaddPKiS0_Pi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$4096, %edi                     # imm = 0x1000
	callq	_Znwm
	movq	%rax, %rbx
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.Ltmp0:
	movl	$4096, %edi                     # imm = 0x1000
	callq	_Znwm
.Ltmp1:
# %bb.1:
	movq	%rax, %r14
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.Ltmp3:
	movl	$4096, %edi                     # imm = 0x1000
	callq	_Znwm
.Ltmp4:
# %bb.2:
	movq	%rax, %r15
	xorl	%r12d, %r12d
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB1_3:                                # =>This Inner Loop Header: Depth=1
	movl	%r12d, (%r14,%r12,4)
	movl	%r12d, (%rbx,%r12,4)
	incq	%r12
	cmpq	$1024, %r12                     # imm = 0x400
	jne	.LBB1_3
# %bb.4:
.Ltmp6:
	leaq	24(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
.Ltmp7:
# %bb.5:
.Ltmp8:
	leaq	16(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
.Ltmp9:
# %bb.6:
.Ltmp10:
	leaq	8(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
.Ltmp11:
# %bb.7:
	movq	24(%rsp), %rdi
.Ltmp12:
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp13:
# %bb.8:
	movq	16(%rsp), %rdi
.Ltmp14:
	movl	$4096, %edx                     # imm = 0x1000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp15:
# %bb.9:
.Ltmp16:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$4294968320, %rdx               # imm = 0x100000400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp17:
# %bb.10:
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
.Ltmp18:
	callq	_Z21__device_stub__vecaddPKiS0_Pi
.Ltmp19:
.LBB1_12:
.Ltmp20:
	callq	hipDeviceSynchronize
.Ltmp21:
# %bb.13:
	movq	8(%rsp), %rsi
.Ltmp22:
	movl	$4096, %edx                     # imm = 0x1000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp23:
# %bb.14:                               # %.preheader.preheader
	xorl	%r13d, %r13d
.LBB1_15:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r15,%r13), %esi
.Ltmp24:
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
.Ltmp25:
# %bb.16:                               #   in Loop: Header=BB1_15 Depth=1
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
.Ltmp26:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp27:
# %bb.17:                               # %.noexc
                                        #   in Loop: Header=BB1_15 Depth=1
.Ltmp28:
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
.Ltmp29:
# %bb.18:                               # %.noexc41
                                        #   in Loop: Header=BB1_15 Depth=1
.Ltmp30:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp31:
# %bb.19:                               # %_ZNSolsEPFRSoS_E.exit
                                        #   in Loop: Header=BB1_15 Depth=1
	addq	$4, %r13
	cmpq	$4096, %r13                     # imm = 0x1000
	jne	.LBB1_15
# %bb.20:
	movq	24(%rsp), %rdi
.Ltmp33:
	callq	hipFree
.Ltmp34:
# %bb.21:
	movq	16(%rsp), %rdi
.Ltmp35:
	callq	hipFree
.Ltmp36:
# %bb.22:
	movq	8(%rsp), %rdi
.Ltmp37:
	callq	hipFree
.Ltmp38:
# %bb.23:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit32
	movq	%r15, %rdi
	callq	_ZdlPv
	movq	%r14, %rdi
	callq	_ZdlPv
	movq	%rbx, %rdi
	callq	_ZdlPv
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_25:
	.cfi_def_cfa_offset 80
.Ltmp5:
	movq	%rax, %r12
	jmp	.LBB1_28
.LBB1_24:
.Ltmp2:
	movq	%rax, %r12
	jmp	.LBB1_29
.LBB1_26:
.Ltmp39:
	jmp	.LBB1_27
.LBB1_30:
.Ltmp32:
.LBB1_27:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit34
	movq	%rax, %r12
	movq	%r15, %rdi
	callq	_ZdlPv
.LBB1_28:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit36
	movq	%r14, %rdi
	callq	_ZdlPv
.LBB1_29:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit38
	movq	%rbx, %rdi
	callq	_ZdlPv
	movq	%r12, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp1-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp3-.Ltmp1                  #   Call between .Ltmp1 and .Ltmp3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp4-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp6-.Ltmp4                  #   Call between .Ltmp4 and .Ltmp6
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 6 <<
	.uleb128 .Ltmp23-.Ltmp6                 #   Call between .Ltmp6 and .Ltmp23
	.uleb128 .Ltmp39-.Lfunc_begin0          #     jumps to .Ltmp39
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp24-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp31-.Ltmp24                #   Call between .Ltmp24 and .Ltmp31
	.uleb128 .Ltmp32-.Lfunc_begin0          #     jumps to .Ltmp32
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp33-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp38-.Ltmp33                #   Call between .Ltmp33 and .Ltmp38
	.uleb128 .Ltmp39-.Lfunc_begin0          #     jumps to .Ltmp39
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp38-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Lfunc_end1-.Ltmp38            #   Call between .Ltmp38 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6vecaddPKiS0_Pi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6vecaddPKiS0_Pi,@object       # @_Z6vecaddPKiS0_Pi
	.section	.rodata,"a",@progbits
	.globl	_Z6vecaddPKiS0_Pi
	.p2align	3, 0x0
_Z6vecaddPKiS0_Pi:
	.quad	_Z21__device_stub__vecaddPKiS0_Pi
	.size	_Z6vecaddPKiS0_Pi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z6vecaddPKiS0_Pi"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__vecaddPKiS0_Pi
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z6vecaddPKiS0_Pi
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6vecaddPKiS0_Pi       ; -- Begin function _Z6vecaddPKiS0_Pi
	.globl	_Z6vecaddPKiS0_Pi
	.p2align	8
	.type	_Z6vecaddPKiS0_Pi,@function
_Z6vecaddPKiS0_Pi:                      ; @_Z6vecaddPKiS0_Pi
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6vecaddPKiS0_Pi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6vecaddPKiS0_Pi, .Lfunc_end0-_Z6vecaddPKiS0_Pi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6vecaddPKiS0_Pi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6vecaddPKiS0_Pi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
