#include <iostream>
#include <math.h>
//#include <cuda_runtime.h>


// function to copy the elements of an array and decrement to the compiler not override it
__global__
void newtonKernel(int n, float4* x, float4* y, float4* z){
	float4 result = make_float4 (1.0f,1.0f,1.0f,1.0f);
        int index = blockIdx.x * blockDim.x + threadIdx.x;
        int stride = blockDim.x * gridDim.x;
        for (int i = index; i < n; i += stride){

		for (int k =0; k < 40; k++){
			result.x = result.x * k * x[i].x * y[i].x + x[i].x + y[i].x;
			result.y = result.y * k * x[i].y * y[i].y + x[i].y + y[i].y;
			result.z = result.z * k * x[i].z * y[i].z + x[i].z + y[i].z;
			result.w = result.w * k * x[i].w * y[i].w + x[i].w + y[i].w;
		}
	      z[i] = result  ;
	      y[i].x = z[i].x ;
	      y[i].y = z[i].y ;
	      y[i].z = z[i].z ;
	      y[i].w = z[i].w ;
	      x[i].x = y[i].x ;
	      x[i].y = y[i].y ;
	      x[i].z = y[i].z ;
	      x[i].w = y[i].w ;

  	}
}


int main(void){

  int N = 1<<20;

  int blockSize = 256;
  int numBlocks = (N + blockSize - 1) / blockSize;
 
  float4 *x, *y, *z;
  //variable allocation on GPU memory
  cudaMallocManaged (&x, N*sizeof(float4));
  cudaMallocManaged (&y, N* sizeof(float4));
  cudaMallocManaged (&z, N*sizeof(float4));

  
  // initialize x and y arrays on the device
  //float val = 3.0f;

  // initialize x and y arrays on the host
  for (int i = 0; i < N; i++) {
    x[i] = make_float4(1.0f,1.0f,1.0f, 1.0f);
    y[i] = make_float4(2.0f,2.0f,2.0f, 2.0f);
    z[i] = make_float4(1.0f,1.0f,1.0f, 1.0f);;
  }

  // Run kernel on 1M parallel elements on the GPU  
  newtonKernel<<<numBlocks, blockSize>>>(N, x, y, z);

  // wait for the GPU to finish the results
  cudaDeviceSynchronize();

  // Check for errors (all values should be 3.0f)
  float maxError = 0.0f;
  for (int i = 0; i < N; i++){
   maxError = fmax(maxError, fabs(x[i].x - 1.0f));
    maxError = fmax(maxError, fabs(x[i].y - 1.0f));
    maxError = fmax(maxError, fabs(x[i].z - 1.0f));
    maxError = fmax(maxError, fabs(x[i].w - 1.0f));
   maxError = fmax(maxError, fabs(y[i].x - 1.0f));
    maxError = fmax(maxError, fabs(y[i].y - 1.0f));
    maxError = fmax(maxError, fabs(y[i].z - 1.0f));
    maxError = fmax(maxError, fabs(y[i].w - 1.0f));
    maxError = fmax(maxError, fabs(z[i].x - 1.0f));
    maxError = fmax(maxError, fabs(z[i].y - 1.0f));
    maxError = fmax(maxError, fabs(z[i].z - 1.0f));
    maxError = fmax(maxError, fabs(z[i].w - 1.0f));
}
  std::cout << "Max error: " << maxError << std::endl;

  // Free GPU memory
  cudaFree(x);
  cudaFree(y);
  cudaFree(z);



  return 0;
}

	.file	"tmpxft_0032c4de_00000000-6_24.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z45__device_stub__Z12newtonKerneliP6float4S0_S0_iP6float4S0_S0_
	.type	_Z45__device_stub__Z12newtonKerneliP6float4S0_S0_iP6float4S0_S0_, @function
_Z45__device_stub__Z12newtonKerneliP6float4S0_S0_iP6float4S0_S0_:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12newtonKerneliP6float4S0_S0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z45__device_stub__Z12newtonKerneliP6float4S0_S0_iP6float4S0_S0_, .-_Z45__device_stub__Z12newtonKerneliP6float4S0_S0_iP6float4S0_S0_
	.globl	_Z12newtonKerneliP6float4S0_S0_
	.type	_Z12newtonKerneliP6float4S0_S0_, @function
_Z12newtonKerneliP6float4S0_S0_:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z12newtonKerneliP6float4S0_S0_iP6float4S0_S0_
	.cfi_endproc
.LFE3661:
	.size	_Z12newtonKerneliP6float4S0_S0_, .-_Z12newtonKerneliP6float4S0_S0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"Max error: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$1, %edx
	movl	$16777216, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	call	cudaMallocManaged@PLT
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	movl	$16777216, %esi
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	movl	$16777216, %esi
	leaq	40(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movq	24(%rsp), %rsi
	xorl	%eax, %eax
	movq	32(%rsp), %rcx
	movq	40(%rsp), %rdx
	movss	.LC2(%rip), %xmm0
.L9:
	movl	$0x3f800000, (%rsi,%rax)
	movl	$0x3f800000, 4(%rsi,%rax)
	movl	$0x3f800000, 8(%rsi,%rax)
	movl	$0x3f800000, 12(%rsi,%rax)
	movss	%xmm0, (%rcx,%rax)
	movss	%xmm0, 4(%rcx,%rax)
	movss	%xmm0, 8(%rcx,%rax)
	movss	%xmm0, 12(%rcx,%rax)
	movl	$0x3f800000, (%rdx,%rax)
	movl	$0x3f800000, 4(%rdx,%rax)
	movl	$0x3f800000, 8(%rdx,%rax)
	movl	$0x3f800000, 12(%rdx,%rax)
	addq	$16, %rax
	cmpq	$16777216, %rax
	jne	.L9
	movl	$16777217, %edx
	movl	$1048577, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	salq	$12, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movl	$1048576, %edi
	movq	24(%rsp), %rsi
	call	_Z45__device_stub__Z12newtonKerneliP6float4S0_S0_iP6float4S0_S0_
.L10:
	call	cudaDeviceSynchronize@PLT
	movq	24(%rsp), %r13
	xorl	%ebx, %ebx
	xorps	%xmm1, %xmm1
	movq	32(%rsp), %r12
	movq	40(%rsp), %rbp
.L11:
	movss	0(%r13,%rbx), %xmm0
	subss	.LC1(%rip), %xmm0
	andps	.LC3(%rip), %xmm0
	call	fmaxf@PLT
	movss	4(%r13,%rbx), %xmm1
	subss	.LC1(%rip), %xmm1
	andps	.LC3(%rip), %xmm1
	call	fmaxf@PLT
	movss	8(%r13,%rbx), %xmm1
	subss	.LC1(%rip), %xmm1
	andps	.LC3(%rip), %xmm1
	call	fmaxf@PLT
	movss	12(%r13,%rbx), %xmm1
	subss	.LC1(%rip), %xmm1
	andps	.LC3(%rip), %xmm1
	call	fmaxf@PLT
	movss	(%r12,%rbx), %xmm1
	subss	.LC1(%rip), %xmm1
	andps	.LC3(%rip), %xmm1
	call	fmaxf@PLT
	movss	4(%r12,%rbx), %xmm1
	subss	.LC1(%rip), %xmm1
	andps	.LC3(%rip), %xmm1
	call	fmaxf@PLT
	movss	8(%r12,%rbx), %xmm1
	subss	.LC1(%rip), %xmm1
	andps	.LC3(%rip), %xmm1
	call	fmaxf@PLT
	movss	12(%r12,%rbx), %xmm1
	subss	.LC1(%rip), %xmm1
	andps	.LC3(%rip), %xmm1
	call	fmaxf@PLT
	movss	0(%rbp,%rbx), %xmm1
	subss	.LC1(%rip), %xmm1
	andps	.LC3(%rip), %xmm1
	call	fmaxf@PLT
	movss	4(%rbp,%rbx), %xmm1
	subss	.LC1(%rip), %xmm1
	andps	.LC3(%rip), %xmm1
	call	fmaxf@PLT
	movss	8(%rbp,%rbx), %xmm1
	subss	.LC1(%rip), %xmm1
	andps	.LC3(%rip), %xmm1
	call	fmaxf@PLT
	movss	12(%rbp,%rbx), %xmm1
	addq	$16, %rbx
	subss	.LC1(%rip), %xmm1
	andps	.LC3(%rip), %xmm1
	call	fmaxf@PLT
	movaps	%xmm0, %xmm1
	cmpq	$16777216, %rbx
	jne	.L11
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movss	%xmm0, 12(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	12(%rsp), %xmm1
	movq	%rax, %rdi
	cvtss2sd	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z12newtonKerneliP6float4S0_S0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12newtonKerneliP6float4S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.align 4
.LC2:
	.long	1073741824
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC3:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>
//#include <cuda_runtime.h>


// function to copy the elements of an array and decrement to the compiler not override it
__global__
void newtonKernel(int n, float4* x, float4* y, float4* z){
	float4 result = make_float4 (1.0f,1.0f,1.0f,1.0f);
        int index = blockIdx.x * blockDim.x + threadIdx.x;
        int stride = blockDim.x * gridDim.x;
        for (int i = index; i < n; i += stride){

		for (int k =0; k < 40; k++){
			result.x = result.x * k * x[i].x * y[i].x + x[i].x + y[i].x;
			result.y = result.y * k * x[i].y * y[i].y + x[i].y + y[i].y;
			result.z = result.z * k * x[i].z * y[i].z + x[i].z + y[i].z;
			result.w = result.w * k * x[i].w * y[i].w + x[i].w + y[i].w;
		}
	      z[i] = result  ;
	      y[i].x = z[i].x ;
	      y[i].y = z[i].y ;
	      y[i].z = z[i].z ;
	      y[i].w = z[i].w ;
	      x[i].x = y[i].x ;
	      x[i].y = y[i].y ;
	      x[i].z = y[i].z ;
	      x[i].w = y[i].w ;

  	}
}


int main(void){

  int N = 1<<20;

  int blockSize = 256;
  int numBlocks = (N + blockSize - 1) / blockSize;
 
  float4 *x, *y, *z;
  //variable allocation on GPU memory
  hipMallocManaged (&x, N*sizeof(float4));
  hipMallocManaged (&y, N* sizeof(float4));
  hipMallocManaged (&z, N*sizeof(float4));

  
  // initialize x and y arrays on the device
  //float val = 3.0f;

  // initialize x and y arrays on the host
  for (int i = 0; i < N; i++) {
    x[i] = make_float4(1.0f,1.0f,1.0f, 1.0f);
    y[i] = make_float4(2.0f,2.0f,2.0f, 2.0f);
    z[i] = make_float4(1.0f,1.0f,1.0f, 1.0f);;
  }

  // Run kernel on 1M parallel elements on the GPU  
  newtonKernel<<<numBlocks, blockSize>>>(N, x, y, z);

  // wait for the GPU to finish the results
  hipDeviceSynchronize();

  // Check for errors (all values should be 3.0f)
  float maxError = 0.0f;
  for (int i = 0; i < N; i++){
   maxError = fmax(maxError, fabs(x[i].x - 1.0f));
    maxError = fmax(maxError, fabs(x[i].y - 1.0f));
    maxError = fmax(maxError, fabs(x[i].z - 1.0f));
    maxError = fmax(maxError, fabs(x[i].w - 1.0f));
   maxError = fmax(maxError, fabs(y[i].x - 1.0f));
    maxError = fmax(maxError, fabs(y[i].y - 1.0f));
    maxError = fmax(maxError, fabs(y[i].z - 1.0f));
    maxError = fmax(maxError, fabs(y[i].w - 1.0f));
    maxError = fmax(maxError, fabs(z[i].x - 1.0f));
    maxError = fmax(maxError, fabs(z[i].y - 1.0f));
    maxError = fmax(maxError, fabs(z[i].z - 1.0f));
    maxError = fmax(maxError, fabs(z[i].w - 1.0f));
}
  std::cout << "Max error: " << maxError << std::endl;

  // Free GPU memory
  hipFree(x);
  hipFree(y);
  hipFree(z);



  return 0;
}

	.text
	.file	"24.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z27__device_stub__newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_ # -- Begin function _Z27__device_stub__newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_
	.type	_Z27__device_stub__newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_,@function
_Z27__device_stub__newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_: # @_Z27__device_stub__newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_, .Lfunc_end0-_Z27__device_stub__newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0xbf800000                      # float -1
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI1_1:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$48, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -16
	leaq	24(%rsp), %rdi
	movl	$16777216, %esi                 # imm = 0x1000000
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movl	$16777216, %esi                 # imm = 0x1000000
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %rdi
	movl	$16777216, %esi                 # imm = 0x1000000
	movl	$1, %edx
	callq	hipMallocManaged
	xorl	%eax, %eax
	movabsq	$4575657222473777152, %rcx      # imm = 0x3F8000003F800000
	movabsq	$4611686019501129728, %rdx      # imm = 0x4000000040000000
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movq	24(%rsp), %rsi
	movq	%rcx, (%rsi,%rax)
	movq	%rcx, 8(%rsi,%rax)
	movq	16(%rsp), %rsi
	movq	%rdx, (%rsi,%rax)
	movq	%rdx, 8(%rsi,%rax)
	movq	8(%rsp), %rsi
	movq	%rcx, (%rsi,%rax)
	movq	%rcx, 8(%rsi,%rax)
	addq	$16, %rax
	cmpq	$16777216, %rax                 # imm = 0x1000000
	jne	.LBB1_1
# %bb.2:
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	leaq	3840(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	$1048576, %edi                  # imm = 0x100000
	callq	_Z27__device_stub__newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_
.LBB1_4:
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rax
	movq	16(%rsp), %rcx
	xorps	%xmm2, %xmm2
	xorl	%edx, %edx
	movq	8(%rsp), %rsi
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movaps	.LCPI1_1(%rip), %xmm1           # xmm1 = [NaN,NaN,NaN,NaN]
	movaps	%xmm2, %xmm5
.LBB1_5:                                # =>This Inner Loop Header: Depth=1
	movss	(%rax,%rdx), %xmm3              # xmm3 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm3
	andps	%xmm1, %xmm3
	cmpunordss	%xmm5, %xmm5
	movaps	%xmm5, %xmm4
	andps	%xmm3, %xmm4
	maxss	%xmm2, %xmm3
	andnps	%xmm3, %xmm5
	orps	%xmm4, %xmm5
	movss	4(%rax,%rdx), %xmm2             # xmm2 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm2
	andps	%xmm1, %xmm2
	movaps	%xmm2, %xmm3
	maxss	%xmm5, %xmm3
	cmpunordss	%xmm5, %xmm5
	movaps	%xmm5, %xmm4
	andnps	%xmm3, %xmm4
	andps	%xmm2, %xmm5
	orps	%xmm4, %xmm5
	movss	8(%rax,%rdx), %xmm2             # xmm2 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm2
	andps	%xmm1, %xmm2
	movaps	%xmm2, %xmm3
	maxss	%xmm5, %xmm3
	cmpunordss	%xmm5, %xmm5
	movaps	%xmm5, %xmm4
	andnps	%xmm3, %xmm4
	andps	%xmm2, %xmm5
	orps	%xmm4, %xmm5
	movss	12(%rax,%rdx), %xmm2            # xmm2 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm2
	andps	%xmm1, %xmm2
	movaps	%xmm2, %xmm3
	maxss	%xmm5, %xmm3
	cmpunordss	%xmm5, %xmm5
	movaps	%xmm5, %xmm4
	andnps	%xmm3, %xmm4
	andps	%xmm2, %xmm5
	orps	%xmm4, %xmm5
	movss	(%rcx,%rdx), %xmm2              # xmm2 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm2
	andps	%xmm1, %xmm2
	movaps	%xmm2, %xmm3
	maxss	%xmm5, %xmm3
	cmpunordss	%xmm5, %xmm5
	movaps	%xmm5, %xmm4
	andnps	%xmm3, %xmm4
	andps	%xmm2, %xmm5
	orps	%xmm4, %xmm5
	movss	4(%rcx,%rdx), %xmm2             # xmm2 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm2
	andps	%xmm1, %xmm2
	movaps	%xmm2, %xmm3
	maxss	%xmm5, %xmm3
	cmpunordss	%xmm5, %xmm5
	movaps	%xmm5, %xmm4
	andnps	%xmm3, %xmm4
	andps	%xmm2, %xmm5
	orps	%xmm4, %xmm5
	movss	8(%rcx,%rdx), %xmm2             # xmm2 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm2
	andps	%xmm1, %xmm2
	movaps	%xmm2, %xmm3
	maxss	%xmm5, %xmm3
	cmpunordss	%xmm5, %xmm5
	movaps	%xmm5, %xmm4
	andnps	%xmm3, %xmm4
	andps	%xmm2, %xmm5
	orps	%xmm4, %xmm5
	movss	12(%rcx,%rdx), %xmm2            # xmm2 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm2
	andps	%xmm1, %xmm2
	movaps	%xmm2, %xmm3
	maxss	%xmm5, %xmm3
	cmpunordss	%xmm5, %xmm5
	movaps	%xmm5, %xmm4
	andnps	%xmm3, %xmm4
	andps	%xmm2, %xmm5
	orps	%xmm4, %xmm5
	movss	(%rsi,%rdx), %xmm2              # xmm2 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm2
	andps	%xmm1, %xmm2
	movaps	%xmm2, %xmm3
	maxss	%xmm5, %xmm3
	cmpunordss	%xmm5, %xmm5
	movaps	%xmm5, %xmm4
	andnps	%xmm3, %xmm4
	andps	%xmm2, %xmm5
	orps	%xmm4, %xmm5
	movss	4(%rsi,%rdx), %xmm2             # xmm2 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm2
	andps	%xmm1, %xmm2
	movaps	%xmm2, %xmm3
	maxss	%xmm5, %xmm3
	cmpunordss	%xmm5, %xmm5
	movaps	%xmm5, %xmm4
	andnps	%xmm3, %xmm4
	andps	%xmm2, %xmm5
	orps	%xmm4, %xmm5
	movss	8(%rsi,%rdx), %xmm2             # xmm2 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm2
	andps	%xmm1, %xmm2
	movaps	%xmm2, %xmm3
	maxss	%xmm5, %xmm3
	cmpunordss	%xmm5, %xmm5
	movaps	%xmm5, %xmm4
	andnps	%xmm3, %xmm4
	andps	%xmm2, %xmm5
	orps	%xmm4, %xmm5
	movss	12(%rsi,%rdx), %xmm2            # xmm2 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm2
	andps	%xmm1, %xmm2
	movaps	%xmm2, %xmm3
	maxss	%xmm5, %xmm3
	cmpunordss	%xmm5, %xmm5
	movaps	%xmm5, %xmm4
	andnps	%xmm3, %xmm4
	andps	%xmm2, %xmm5
	orps	%xmm4, %xmm5
	addq	$16, %rdx
	movaps	%xmm5, %xmm2
	cmpq	$16777216, %rdx                 # imm = 0x1000000
	jne	.LBB1_5
# %bb.6:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$11, %edx
	movaps	%xmm5, 32(%rsp)                 # 16-byte Spill
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	32(%rsp), %xmm0                 # 16-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$48, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_,@object # @_Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_
	.section	.rodata,"a",@progbits
	.globl	_Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_
	.p2align	3, 0x0
_Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_:
	.quad	_Z27__device_stub__newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_
	.size	_Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Max error: "
	.size	.L.str, 12

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_"
	.size	.L__unnamed_1, 49

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_ ; -- Begin function _Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_
	.globl	_Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_
	.p2align	8
	.type	_Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_,@function
_Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_: ; @_Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s8, s[0:1], 0x0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[12:13], null, s15, s9, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s8, v12
	s_cbranch_execz .LBB0_5
; %bb.1:                                ; %.preheader.preheader
	s_load_b32 s2, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x18
	v_mov_b32_e32 v0, 1.0
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v1, v0
	v_mov_b32_e32 v2, v0
	v_mov_b32_e32 v3, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s9
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	v_ashrrev_i32_e32 v13, 31, v12
	s_mov_b32 s9, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[17:18], 4, v[12:13]
	v_add_co_u32 v13, vcc_lo, s4, v17
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v18, vcc_lo
	v_add_co_u32 v15, vcc_lo, s6, v17
	v_add_co_ci_u32_e32 v16, vcc_lo, s7, v18, vcc_lo
	global_load_b128 v[4:7], v[13:14], off
	global_load_b128 v[8:11], v[15:16], off
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_cvt_f32_i32_e32 v19, s9
	s_add_i32 s9, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s9, 40
	v_mul_f32_e32 v1, v1, v19
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v0, v0, v19 :: v_dual_mul_f32 v1, v1, v5
	v_mul_f32_e32 v0, v0, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v1, v1, v9, v5
	v_mul_f32_e32 v2, v2, v19
	v_fma_f32 v0, v0, v8, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v1, v9, v1
	v_dual_mul_f32 v3, v3, v19 :: v_dual_mul_f32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v0, v8, v0 :: v_dual_mul_f32 v3, v3, v7
	v_fma_f32 v2, v2, v10, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, v3, v11, v7
	v_dual_add_f32 v2, v10, v2 :: v_dual_add_f32 v3, v11, v3
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_co_u32 v4, vcc_lo, s0, v17
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v18, vcc_lo
	v_add_nc_u32_e32 v12, s2, v12
	global_store_b128 v[4:5], v[0:3], off
	global_store_b32 v[15:16], v0, off
	global_load_b32 v6, v[4:5], off offset:4
	v_cmp_le_i32_e32 vcc_lo, s8, v12
	s_or_b32 s3, vcc_lo, s3
	s_waitcnt vmcnt(0)
	global_store_b32 v[15:16], v6, off offset:4
	global_load_b32 v6, v[4:5], off offset:8
	s_waitcnt vmcnt(0)
	global_store_b32 v[15:16], v6, off offset:8
	global_load_b32 v4, v[4:5], off offset:12
	s_waitcnt vmcnt(0)
	global_store_b32 v[15:16], v4, off offset:12
	global_store_b32 v[13:14], v0, off
	global_load_b32 v4, v[15:16], off offset:4
	s_waitcnt vmcnt(0)
	global_store_b32 v[13:14], v4, off offset:4
	global_load_b32 v4, v[15:16], off offset:8
	s_waitcnt vmcnt(0)
	global_store_b32 v[13:14], v4, off offset:8
	global_load_b32 v4, v[15:16], off offset:12
	s_waitcnt vmcnt(0)
	global_store_b32 v[13:14], v4, off offset:12
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_2
.LBB0_5:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_, .Lfunc_end0-_Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 508
; NumSgprs: 18
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12newtonKerneliP15HIP_vector_typeIfLj4EES1_S1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     20
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
