#include "includes.h"
__global__ void GaussianEliminationShared(const int clusterSize,float *x, const float *diagonal_values , const float *non_diagonal_values ,float *y )
{
const int index = blockIdx.x ;

__shared__ float shared_m[9][9]; // size of cluster
for (int i = 0; i < clusterSize;++i)
{
for (int j = 0; j < clusterSize;++j)
{
shared_m[i][j]=0;
}
}
for(int i = 0; i < clusterSize; ++i)
{
shared_m[i][i] = diagonal_values[clusterSize * index + i];
}
for(int i = 0; i < clusterSize-1;++i)
{
shared_m[i][i+1] = non_diagonal_values[clusterSize * index * 2 + 2*i+1];
shared_m[i+1][i] = non_diagonal_values[clusterSize * index * 2 + 2*i+2];
}

// triangle form
for (int i = 0 ; i < clusterSize; ++i)
{
//for every row...
for (int j = i+1; j < clusterSize; ++j)
{
//calculate ratio for every row below it using the triangular
double ratio = shared_m[j][i] / shared_m[i][i];
for(int k = 0; k < clusterSize; ++k)
{
//Eliminate every column based on that ratio
shared_m[j][k] = shared_m[j][k] - (shared_m[i][k] * ratio);
}
//elimination on the coefficient vector
y[clusterSize * index +j] = y[clusterSize * index +j] - (y[clusterSize * index +i] * ratio);
}
}
__syncthreads();

//Back substitution
for (int i = clusterSize-1; i > -1; --i)
{
double current = 0;
for (unsigned int j = i; j < clusterSize; ++j)
{
current = current + (shared_m[i][j] * x[clusterSize * index +j]);
}
x[clusterSize * index +i] = (y[clusterSize * index +i] - current) / shared_m[i][i];
}

}
	.file	"tmpxft_003a8d9f_00000000-6_GaussianEliminationShared.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z54__device_stub__Z25GaussianEliminationSharediPfPKfS1_S_iPfPKfS1_S_
	.type	_Z54__device_stub__Z25GaussianEliminationSharediPfPKfS1_S_iPfPKfS1_S_, @function
_Z54__device_stub__Z25GaussianEliminationSharediPfPKfS1_S_iPfPKfS1_S_:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 44(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z25GaussianEliminationSharediPfPKfS1_S_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z54__device_stub__Z25GaussianEliminationSharediPfPKfS1_S_iPfPKfS1_S_, .-_Z54__device_stub__Z25GaussianEliminationSharediPfPKfS1_S_iPfPKfS1_S_
	.globl	_Z25GaussianEliminationSharediPfPKfS1_S_
	.type	_Z25GaussianEliminationSharediPfPKfS1_S_, @function
_Z25GaussianEliminationSharediPfPKfS1_S_:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z25GaussianEliminationSharediPfPKfS1_S_iPfPKfS1_S_
	.cfi_endproc
.LFE2033:
	.size	_Z25GaussianEliminationSharediPfPKfS1_S_, .-_Z25GaussianEliminationSharediPfPKfS1_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z25GaussianEliminationSharediPfPKfS1_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z25GaussianEliminationSharediPfPKfS1_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void GaussianEliminationShared(const int clusterSize,float *x, const float *diagonal_values , const float *non_diagonal_values ,float *y )
{
const int index = blockIdx.x ;

__shared__ float shared_m[9][9]; // size of cluster
for (int i = 0; i < clusterSize;++i)
{
for (int j = 0; j < clusterSize;++j)
{
shared_m[i][j]=0;
}
}
for(int i = 0; i < clusterSize; ++i)
{
shared_m[i][i] = diagonal_values[clusterSize * index + i];
}
for(int i = 0; i < clusterSize-1;++i)
{
shared_m[i][i+1] = non_diagonal_values[clusterSize * index * 2 + 2*i+1];
shared_m[i+1][i] = non_diagonal_values[clusterSize * index * 2 + 2*i+2];
}

// triangle form
for (int i = 0 ; i < clusterSize; ++i)
{
//for every row...
for (int j = i+1; j < clusterSize; ++j)
{
//calculate ratio for every row below it using the triangular
double ratio = shared_m[j][i] / shared_m[i][i];
for(int k = 0; k < clusterSize; ++k)
{
//Eliminate every column based on that ratio
shared_m[j][k] = shared_m[j][k] - (shared_m[i][k] * ratio);
}
//elimination on the coefficient vector
y[clusterSize * index +j] = y[clusterSize * index +j] - (y[clusterSize * index +i] * ratio);
}
}
__syncthreads();

//Back substitution
for (int i = clusterSize-1; i > -1; --i)
{
double current = 0;
for (unsigned int j = i; j < clusterSize; ++j)
{
current = current + (shared_m[i][j] * x[clusterSize * index +j]);
}
x[clusterSize * index +i] = (y[clusterSize * index +i] - current) / shared_m[i][i];
}

}
	.text
	.file	"GaussianEliminationShared.hip"
	.globl	_Z40__device_stub__GaussianEliminationSharediPfPKfS1_S_ # -- Begin function _Z40__device_stub__GaussianEliminationSharediPfPKfS1_S_
	.type	_Z40__device_stub__GaussianEliminationSharediPfPKfS1_S_,@function
_Z40__device_stub__GaussianEliminationSharediPfPKfS1_S_: # @_Z40__device_stub__GaussianEliminationSharediPfPKfS1_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z25GaussianEliminationSharediPfPKfS1_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z40__device_stub__GaussianEliminationSharediPfPKfS1_S_, .Lfunc_end0-_Z40__device_stub__GaussianEliminationSharediPfPKfS1_S_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z25GaussianEliminationSharediPfPKfS1_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z25GaussianEliminationSharediPfPKfS1_S_,@object # @_Z25GaussianEliminationSharediPfPKfS1_S_
	.section	.rodata,"a",@progbits
	.globl	_Z25GaussianEliminationSharediPfPKfS1_S_
	.p2align	3, 0x0
_Z25GaussianEliminationSharediPfPKfS1_S_:
	.quad	_Z40__device_stub__GaussianEliminationSharediPfPKfS1_S_
	.size	_Z25GaussianEliminationSharediPfPKfS1_S_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z25GaussianEliminationSharediPfPKfS1_S_"
	.size	.L__unnamed_1, 41

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z40__device_stub__GaussianEliminationSharediPfPKfS1_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z25GaussianEliminationSharediPfPKfS1_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z25GaussianEliminationSharediPfPKfS1_S_ ; -- Begin function _Z25GaussianEliminationSharediPfPKfS1_S_
	.globl	_Z25GaussianEliminationSharediPfPKfS1_S_
	.p2align	8
	.type	_Z25GaussianEliminationSharediPfPKfS1_S_,@function
_Z25GaussianEliminationSharediPfPKfS1_S_: ; @_Z25GaussianEliminationSharediPfPKfS1_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s12, s[0:1], 0x0
	s_load_b256 s[4:11], s[0:1], 0x8
	s_mov_b32 s0, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s12, 0
	s_mul_i32 s2, s15, s12
	s_cselect_b32 s13, -1, 0
	s_cmp_lt_i32 s12, 1
	s_cbranch_scc1 .LBB0_7
; %bb.1:                                ; %.preheader108.preheader
	v_mov_b32_e32 v0, 0
	s_mov_b32 s1, 0
.LBB0_2:                                ; %.preheader108
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_mov_b32 s3, s0
	s_mov_b32 s14, s12
.LBB0_3:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v1, s3
	s_add_i32 s14, s14, -1
	s_add_i32 s3, s3, 4
	s_cmp_eq_u32 s14, 0
	ds_store_b32 v1, v0
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s1, s1, 1
	s_add_i32 s0, s0, 36
	s_cmp_eq_u32 s1, s12
	s_cbranch_scc0 .LBB0_2
; %bb.5:                                ; %.preheader107
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[2:3], 2
	s_mov_b32 s3, 0
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	s_mov_b32 s6, s12
.LBB0_6:                                ; =>This Inner Loop Header: Depth=1
	s_load_b32 s7, s[0:1], 0x0
	v_mov_b32_e32 v0, s3
	s_add_i32 s6, s6, -1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_add_i32 s3, s3, 40
	s_cmp_eq_u32 s6, 0
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v1, s7
	ds_store_b32 v0, v1
	s_cbranch_scc0 .LBB0_6
.LBB0_7:                                ; %.preheader106
	s_add_i32 s3, s12, -1
	s_cmp_lt_i32 s12, 2
	s_cbranch_scc1 .LBB0_10
; %bb.8:                                ; %.lr.ph114
	s_lshl_b32 s0, s2, 1
	s_mov_b32 s6, 4
	s_mov_b32 s7, s3
.LBB0_9:                                ; =>This Inner Loop Header: Depth=1
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[16:17], s[0:1], 2
	s_add_u32 s16, s8, s16
	s_addc_u32 s17, s9, s17
	s_add_i32 s7, s7, -1
	s_load_b64 s[16:17], s[16:17], 0x4
	v_mov_b32_e32 v0, s6
	s_add_i32 s6, s6, 40
	s_add_i32 s0, s0, 2
	s_cmp_eq_u32 s7, 0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v1, s16 :: v_dual_mov_b32 v2, s17
	ds_store_2addr_b32 v0, v1, v2 offset1:8
	s_cbranch_scc0 .LBB0_9
.LBB0_10:                               ; %.preheader105
	v_cndmask_b32_e64 v0, 0, 1, s13
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 1, v0
	s_cbranch_vccnz .LBB0_18
; %bb.11:                               ; %.lr.ph123
	v_mov_b32_e32 v2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s9, 0
	s_mov_b32 s8, 36
.LBB0_12:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_14 Depth 2
                                        ;       Child Loop BB0_15 Depth 3
	s_mov_b32 s6, s9
	s_add_i32 s9, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s9, s12
	s_cbranch_scc1 .LBB0_17
; %bb.13:                               ; %.lr.ph121
                                        ;   in Loop: Header=BB0_12 Depth=1
	s_add_i32 s16, s6, s2
	s_lshl_b32 s13, s6, 2
	s_mul_i32 s14, s6, 36
	s_ashr_i32 s17, s16, 31
	s_add_i32 s14, s14, s13
	s_lshl_b64 s[6:7], s[16:17], 2
	v_mov_b32_e32 v3, s14
	s_add_u32 s6, s10, s6
	s_addc_u32 s7, s11, s7
	s_mov_b32 s14, s8
	s_mov_b32 s16, s9
.LBB0_14:                               ; %.lr.ph117.preheader
                                        ;   Parent Loop BB0_12 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_15 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s17, s16, 36
	s_mov_b32 s18, s14
	s_add_i32 s17, s17, s13
	s_mov_b32 s19, s12
	v_mov_b32_e32 v0, s17
	s_mov_b32 s17, s1
	ds_load_b32 v0, v0
	ds_load_b32 v1, v3
	s_waitcnt lgkmcnt(0)
	v_div_scale_f32 v4, null, v1, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v4, v5, 1.0
	v_fmac_f32_e32 v5, v6, v5
	v_div_scale_f32 v6, vcc_lo, v0, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v6, v5
	v_fma_f32 v8, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v5
	v_fma_f32 v4, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v4, v4, v5, v7
	v_div_fixup_f32 v0, v4, v1, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[0:1], v0
.LBB0_15:                               ; %.lr.ph117
                                        ;   Parent Loop BB0_12 Depth=1
                                        ;     Parent Loop BB0_14 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v8, s18
	v_mov_b32_e32 v4, s17
	s_add_i32 s19, s19, -1
	s_add_i32 s18, s18, 4
	s_add_i32 s17, s17, 4
	ds_load_b32 v5, v8
	ds_load_b32 v6, v4
	s_cmp_eq_u32 s19, 0
	s_waitcnt lgkmcnt(1)
	v_cvt_f64_f32_e32 v[4:5], v5
	s_waitcnt lgkmcnt(0)
	v_cvt_f64_f32_e32 v[6:7], v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[0:1], v[6:7], v[4:5]
	v_cvt_f32_f64_e32 v4, v[4:5]
	ds_store_b32 v8, v4
	s_cbranch_scc0 .LBB0_15
; %bb.16:                               ; %._crit_edge118
                                        ;   in Loop: Header=BB0_14 Depth=2
	s_add_i32 s18, s16, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s19, s18, 31
	s_lshl_b64 s[18:19], s[18:19], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s18, s10, s18
	s_addc_u32 s19, s11, s19
	s_add_i32 s16, s16, 1
	s_clause 0x1
	global_load_b32 v4, v2, s[18:19]
	global_load_b32 v6, v2, s[6:7]
	s_add_i32 s14, s14, 36
	s_cmp_ge_i32 s16, s12
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[4:5], v4
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[6:7], v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], -v[0:1], v[6:7], v[4:5]
	v_cvt_f32_f64_e32 v0, v[0:1]
	global_store_b32 v2, v0, s[18:19]
	s_cbranch_scc0 .LBB0_14
.LBB0_17:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_12 Depth=1
	s_add_i32 s8, s8, 36
	s_add_i32 s1, s1, 36
	s_cmp_lg_u32 s9, s12
	s_cbranch_scc1 .LBB0_12
.LBB0_18:                               ; %._crit_edge124
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_24
; %bb.19:                               ; %.preheader.lr.ph
	v_mov_b32_e32 v1, 0
	s_add_i32 s15, s15, 1
	s_mul_i32 s1, s12, 40
	s_mul_i32 s0, s12, s15
	s_sub_i32 s1, s1, 40
	s_mov_b32 s6, -1
.LBB0_20:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_22 Depth 2
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_cmp_ge_u32 s3, s12
	s_cbranch_scc1 .LBB0_23
; %bb.21:                               ; %.lr.ph127.preheader
                                        ;   in Loop: Header=BB0_20 Depth=1
	v_mov_b32_e32 v2, 0
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, s6
	s_mov_b32 s7, s1
.LBB0_22:                               ; %.lr.ph127
                                        ;   Parent Loop BB0_20 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, s0, v4
	v_add_co_u32 v4, s8, v4, 1
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	s_and_b32 vcc_lo, exec_lo, s8
	global_load_b32 v0, v[5:6], off
	v_mov_b32_e32 v5, s7
	s_add_i32 s7, s7, 4
	ds_load_b32 v5, v5
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v0, v5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[5:6], v0
	v_add_f64 v[2:3], v[2:3], v[5:6]
	s_cbranch_vccz .LBB0_22
.LBB0_23:                               ; %._crit_edge128
                                        ;   in Loop: Header=BB0_20 Depth=1
	s_add_i32 s8, s3, s2
	s_mul_i32 s7, s3, 36
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[8:9], s[8:9], 2
	s_add_u32 s14, s10, s8
	s_addc_u32 s15, s11, s9
	s_lshl_b32 s13, s3, 2
	global_load_b32 v0, v1, s[14:15]
	s_add_i32 s7, s7, s13
	s_add_u32 s8, s4, s8
	s_addc_u32 s9, s5, s9
	s_add_i32 s6, s6, -1
	s_sub_i32 s1, s1, 40
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[4:5], v0
	v_mov_b32_e32 v0, s7
	s_add_i32 s7, s3, -1
	s_cmp_lt_i32 s3, 1
	s_mov_b32 s3, s7
	ds_load_b32 v0, v0
	s_waitcnt lgkmcnt(0)
	v_cvt_f64_f32_e32 v[6:7], v0
	v_add_f64 v[2:3], v[4:5], -v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[4:5], null, v[6:7], v[6:7], v[2:3]
	v_rcp_f64_e32 v[8:9], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[4:5], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_fma_f64 v[10:11], -v[4:5], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_div_scale_f64 v[10:11], vcc_lo, v[2:3], v[6:7], v[2:3]
	v_mul_f64 v[12:13], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[4:5], v[12:13], v[10:11]
	v_div_fmas_f64 v[4:5], v[4:5], v[8:9], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[2:3], v[4:5], v[6:7], v[2:3]
	v_cvt_f32_f64_e32 v0, v[2:3]
	global_store_b32 v1, v0, s[8:9]
	s_cbranch_scc0 .LBB0_20
.LBB0_24:                               ; %._crit_edge131
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z25GaussianEliminationSharediPfPKfS1_S_
		.amdhsa_group_segment_fixed_size 324
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 40
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z25GaussianEliminationSharediPfPKfS1_S_, .Lfunc_end0-_Z25GaussianEliminationSharediPfPKfS1_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1172
; NumSgprs: 22
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 324 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 324
    .kernarg_segment_align: 8
    .kernarg_segment_size: 40
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z25GaussianEliminationSharediPfPKfS1_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z25GaussianEliminationSharediPfPKfS1_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
