// Triangle counting algorithm implementation on GPU using CUDA C in CSR format

#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <inttypes.h>

__global__ void count_triangles(uint32_t *IA_d,
                                uint32_t *JA_d,
                                int *delta_d,
                                int *IA_size_d,
                                int *JA_size_d){

    int i = blockIdx.x * blockDim.x + threadIdx.x;
    int N = *IA_size_d - 1;
    // printf("\n size: \t %d", N);

    if (i > 0 && i < (N-1)){
        // printf("\n i: \t %d", i);
        uint32_t *a10T_row = IA_d + i;
        uint32_t *A20_row = IA_d + i + 1;

        uint32_t num_nnz_curr_row_a10T =  *A20_row - *a10T_row;

        uint32_t *a10T_start_col = JA_d + *a10T_row;
        uint32_t *a10T_end_col = a10T_start_col;

        // DEBUGGING TOOL
        // printf("\nthis is the %d th thread\n", i); 
        // printf("\nand a10T_row value is %d\n", *a10T_row);
        // printf("\n a10T_start_col \t %d", a10T_start_col);
        // printf("\n *a10T_start_col \t %d", *a10T_start_col);

        while (*a10T_end_col < i && (a10T_end_col - a10T_start_col) < num_nnz_curr_row_a10T -1){
            a10T_end_col++;
        }

        if (*a10T_end_col > i || (a10T_end_col - a10T_start_col) == num_nnz_curr_row_a10T){
            a10T_end_col--;
        }

        uint32_t *a12T_start_col = a10T_end_col + 1;
        uint32_t *a12T_end_col = a10T_start_col + num_nnz_curr_row_a10T - 1;

        uint32_t num_nnz_a12T = a12T_end_col - a12T_start_col + 1;
        uint32_t num_nnz_a10T = num_nnz_curr_row_a10T - num_nnz_a12T;

        // Adding number of triangles for each iteration 
        for(uint32_t k = 0;  k < num_nnz_a12T; k++){
            uint32_t a12T_select_location = *(a12T_start_col+k) - *a12T_start_col;
            uint32_t selected_row = *a12T_start_col + a12T_select_location - (i+1);
            uint32_t *A_row = A20_row + selected_row;
            uint32_t num_nnz_row_A20 = *(A_row + 1) - *A_row;

            uint32_t n = 0;
            uint32_t m = 0;
            while(n < num_nnz_a10T && m < num_nnz_row_A20){
                uint32_t *A20_u_col = JA_d + *A_row + m;
                uint32_t *a10T_u_col = a10T_start_col + n;
                if (*A20_u_col == *a10T_u_col){
                    atomicAdd(delta_d, 1);
                    m++;
                    n++;
                }
                else if (*A20_u_col > *a10T_u_col){
                    n++;
                }
                else {
                    m ++;
                }
            }
        }
    }
}
int main(){

    FILE *IA_ptr;
    FILE *JA_ptr;
    int IA_size[1];
    int JA_size[1];

    IA_ptr = fopen("/mnt/large/graph-datasets/ca-AstroPh_adj_IA.txt.bin", "rb");
    JA_ptr = fopen("/mnt/large/graph-datasets/ca-AstroPh_adj_JA.txt.bin", "rb");
    fread(IA_size, sizeof(IA_size), 1, IA_ptr);
    fread(JA_size, sizeof(JA_size), 1, JA_ptr);
    
    // STORE MATRICES IN HEAP MEMORY USING MALLOC
    uint32_t *IA = (uint32_t *)malloc(IA_size[0]*sizeof(uint32_t));
    uint32_t *JA = (uint32_t *)malloc(JA_size[0]*sizeof(uint32_t));
    size_t IA_size_t = IA_size[0];
    size_t JA_size_t = JA_size[0];
    fseek(IA_ptr, 4, SEEK_SET);
    fseek(JA_ptr, 4, SEEK_SET);
    fread(IA, sizeof(IA), IA_size_t, IA_ptr);
    fread(JA, sizeof(JA), JA_size_t, JA_ptr);

    for(int i = 0; i<10; i++){
        printf("\n %d", IA[i]);
    }

    //test case 1
    // uint32_t IA[] = {0,3,6,8,12,14};
    // uint32_t JA[] = {1,2,3,0,3,4,0,3,0,1,2,4,1,3};
    // int IA_size[1] = {6};
    // int JA_size[1] = {14};

    // test case 2
    // uint32_t IA[] = {0,4,6,10,12,17,19,22};
    // uint32_t JA[] = {1,2,4,6,0,2,0,1,3,4,2,4,0,2,3,5,6,4,6,0,4,5};
    // int IA_size[1] = {8};
    // int JA_size[1] = {22};

    //Allocatee Host Memory
    uint32_t delta[1] = {0};
    uint32_t *IA_d, *JA_d;
    int *delta_d, *IA_size_d, *JA_size_d;

    //Dynamically Allocate Device Memory
    cudaMalloc((void**) &IA_d, IA_size[0]*sizeof(uint32_t));
    cudaMalloc((void**) &JA_d, JA_size[0]*sizeof(uint32_t));
    cudaMalloc((void**) &delta_d, sizeof(int));
    cudaMalloc((void**) &IA_size_d, sizeof(int));
    cudaMalloc((void**) &JA_size_d, sizeof(int));

    //Copy host memory to device memory
    cudaMemcpy(IA_d, IA, IA_size[0]*sizeof(uint32_t), cudaMemcpyHostToDevice);
    cudaMemcpy(JA_d, JA, JA_size[0]*sizeof(uint32_t), cudaMemcpyHostToDevice);
    cudaMemcpy(delta_d, delta, sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(IA_size_d, IA_size, sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(JA_size_d, JA_size, sizeof(int), cudaMemcpyHostToDevice);

    //execute kernel
    int threadsPerBlock = 32;
    int blocksPerGrid = IA_size[0] / 32 + 1;
    count_triangles<<<blocksPerGrid,threadsPerBlock>>>(IA_d, JA_d, delta_d, IA_size_d, JA_size_d);

    //Write GPU results in device memory back to host memory
    cudaMemcpy(delta, delta_d, sizeof(int), cudaMemcpyDeviceToHost);

    printf("\ndelta is %d\n", delta[0]);

    //Free device memory
    cudaFree(IA_d);
    cudaFree(JA_d);
    cudaFree(delta_d);
    cudaFree(IA_size_d);
    cudaFree(JA_size_d);

    //Free host memory
    free(IA);
    free(JA);


}
	.file	"tmpxft_00332021_00000000-6_count_triangles_C.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z45__device_stub__Z15count_trianglesPjS_PiS0_S0_PjS_PiS0_S0_
	.type	_Z45__device_stub__Z15count_trianglesPjS_PiS0_S0_PjS_PiS0_S0_, @function
_Z45__device_stub__Z15count_trianglesPjS_PiS0_S0_PjS_PiS0_S0_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z15count_trianglesPjS_PiS0_S0_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z45__device_stub__Z15count_trianglesPjS_PiS0_S0_PjS_PiS0_S0_, .-_Z45__device_stub__Z15count_trianglesPjS_PiS0_S0_PjS_PiS0_S0_
	.globl	_Z15count_trianglesPjS_PiS0_S0_
	.type	_Z15count_trianglesPjS_PiS0_S0_, @function
_Z15count_trianglesPjS_PiS0_S0_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z15count_trianglesPjS_PiS0_S0_PjS_PiS0_S0_
	.cfi_endproc
.LFE2053:
	.size	_Z15count_trianglesPjS_PiS0_S0_, .-_Z15count_trianglesPjS_PiS0_S0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"rb"
.LC1:
	.string	"/mnt/large/graph-datasets/ca-AstroPh_adj_IA.txt.bin"
.LC2:
	.string	"/mnt/large/graph-datasets/ca-AstroPh_adj_JA.txt.bin"
.LC3:
	.string	"\n %d"
.LC4:
	.string	"\ndelta is %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC1(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	.LC0(%rip), %rbx
	movq	%rbx, %rsi
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	108(%rsp), %r13
	call	fopen@PLT
	movq	%rbx, %rsi
	leaq	.LC2(%rip), %rdi
	movq	%rax, %r12
	call	fopen@PLT
	movq	%r12, %r8
	movl	$1, %ecx
	movq	%r13, %rdi
	movl	$4, %edx
	movl	$4, %esi
	movq	%rax, 8(%rsp)
	call	__fread_chk@PLT
	movq	8(%rsp), %r8
	leaq	112(%rsp), %rax
	movl	$4, %edx
	movl	$4, %esi
	movl	$1, %ecx
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	__fread_chk@PLT
	movslq	108(%rsp), %rcx
	leaq	0(,%rcx,4), %r15
	movq	%rcx, 24(%rsp)
	movq	%r15, %rdi
	call	malloc@PLT
	movslq	112(%rsp), %rbp
	movq	%rax, %rbx
	leaq	0(,%rbp,4), %r14
	movq	%r14, %rdi
	call	malloc@PLT
	movq	%r12, %rdi
	xorl	%edx, %edx
	movl	$4, %esi
	movq	%rax, (%rsp)
	call	fseek@PLT
	movq	8(%rsp), %rdi
	xorl	%edx, %edx
	movl	$4, %esi
	call	fseek@PLT
	movq	24(%rsp), %rcx
	movq	%r12, %r8
	movq	%r15, %rsi
	movl	$8, %edx
	movq	%rbx, %rdi
	leaq	.LC3(%rip), %r12
	call	__fread_chk@PLT
	movq	8(%rsp), %r8
	movq	%rbp, %rcx
	movq	%r14, %rsi
	movq	(%rsp), %rdi
	movl	$8, %edx
	xorl	%ebp, %ebp
	call	__fread_chk@PLT
.L9:
	movl	(%rbx,%rbp,4), %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	cmpq	$10, %rbp
	jne	.L9
	movslq	108(%rsp), %rsi
	xorl	%eax, %eax
	leaq	40(%rsp), %rdi
	leaq	116(%rsp), %rbp
	movl	%eax, 116(%rsp)
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	112(%rsp), %rsi
	leaq	48(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movslq	108(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	112(%rsp), %rdx
	movq	(%rsp), %rsi
	movl	$1, %ecx
	movq	48(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	movq	72(%rsp), %rdi
	movl	$1, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	108(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$32, %ecx
	cltd
	idivl	%ecx
	movl	$134217729, %edx
	movl	$1, %ecx
	salq	$5, %rdx
	incl	%eax
	movl	%eax, 84(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	84(%rsp), %rdi
	movl	92(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	72(%rsp), %r8
	movq	64(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z45__device_stub__Z15count_trianglesPjS_PiS0_S0_PjS_PiS0_S0_
.L10:
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movl	116(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC4(%rip), %rsi
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	free@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z15count_trianglesPjS_PiS0_S0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15count_trianglesPjS_PiS0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Triangle counting algorithm implementation on GPU using CUDA C in CSR format


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <inttypes.h>

__global__ void count_triangles(uint32_t *IA_d,
                                uint32_t *JA_d,
                                int *delta_d,
                                int *IA_size_d,
                                int *JA_size_d){

    int i = blockIdx.x * blockDim.x + threadIdx.x;
    int N = *IA_size_d - 1;
    // printf("\n size: \t %d", N);

    if (i > 0 && i < (N-1)){
        // printf("\n i: \t %d", i);
        uint32_t *a10T_row = IA_d + i;
        uint32_t *A20_row = IA_d + i + 1;

        uint32_t num_nnz_curr_row_a10T =  *A20_row - *a10T_row;

        uint32_t *a10T_start_col = JA_d + *a10T_row;
        uint32_t *a10T_end_col = a10T_start_col;

        // DEBUGGING TOOL
        // printf("\nthis is the %d th thread\n", i); 
        // printf("\nand a10T_row value is %d\n", *a10T_row);
        // printf("\n a10T_start_col \t %d", a10T_start_col);
        // printf("\n *a10T_start_col \t %d", *a10T_start_col);

        while (*a10T_end_col < i && (a10T_end_col - a10T_start_col) < num_nnz_curr_row_a10T -1){
            a10T_end_col++;
        }

        if (*a10T_end_col > i || (a10T_end_col - a10T_start_col) == num_nnz_curr_row_a10T){
            a10T_end_col--;
        }

        uint32_t *a12T_start_col = a10T_end_col + 1;
        uint32_t *a12T_end_col = a10T_start_col + num_nnz_curr_row_a10T - 1;

        uint32_t num_nnz_a12T = a12T_end_col - a12T_start_col + 1;
        uint32_t num_nnz_a10T = num_nnz_curr_row_a10T - num_nnz_a12T;

        // Adding number of triangles for each iteration 
        for(uint32_t k = 0;  k < num_nnz_a12T; k++){
            uint32_t a12T_select_location = *(a12T_start_col+k) - *a12T_start_col;
            uint32_t selected_row = *a12T_start_col + a12T_select_location - (i+1);
            uint32_t *A_row = A20_row + selected_row;
            uint32_t num_nnz_row_A20 = *(A_row + 1) - *A_row;

            uint32_t n = 0;
            uint32_t m = 0;
            while(n < num_nnz_a10T && m < num_nnz_row_A20){
                uint32_t *A20_u_col = JA_d + *A_row + m;
                uint32_t *a10T_u_col = a10T_start_col + n;
                if (*A20_u_col == *a10T_u_col){
                    atomicAdd(delta_d, 1);
                    m++;
                    n++;
                }
                else if (*A20_u_col > *a10T_u_col){
                    n++;
                }
                else {
                    m ++;
                }
            }
        }
    }
}
int main(){

    FILE *IA_ptr;
    FILE *JA_ptr;
    int IA_size[1];
    int JA_size[1];

    IA_ptr = fopen("/mnt/large/graph-datasets/ca-AstroPh_adj_IA.txt.bin", "rb");
    JA_ptr = fopen("/mnt/large/graph-datasets/ca-AstroPh_adj_JA.txt.bin", "rb");
    fread(IA_size, sizeof(IA_size), 1, IA_ptr);
    fread(JA_size, sizeof(JA_size), 1, JA_ptr);
    
    // STORE MATRICES IN HEAP MEMORY USING MALLOC
    uint32_t *IA = (uint32_t *)malloc(IA_size[0]*sizeof(uint32_t));
    uint32_t *JA = (uint32_t *)malloc(JA_size[0]*sizeof(uint32_t));
    size_t IA_size_t = IA_size[0];
    size_t JA_size_t = JA_size[0];
    fseek(IA_ptr, 4, SEEK_SET);
    fseek(JA_ptr, 4, SEEK_SET);
    fread(IA, sizeof(IA), IA_size_t, IA_ptr);
    fread(JA, sizeof(JA), JA_size_t, JA_ptr);

    for(int i = 0; i<10; i++){
        printf("\n %d", IA[i]);
    }

    //test case 1
    // uint32_t IA[] = {0,3,6,8,12,14};
    // uint32_t JA[] = {1,2,3,0,3,4,0,3,0,1,2,4,1,3};
    // int IA_size[1] = {6};
    // int JA_size[1] = {14};

    // test case 2
    // uint32_t IA[] = {0,4,6,10,12,17,19,22};
    // uint32_t JA[] = {1,2,4,6,0,2,0,1,3,4,2,4,0,2,3,5,6,4,6,0,4,5};
    // int IA_size[1] = {8};
    // int JA_size[1] = {22};

    //Allocatee Host Memory
    uint32_t delta[1] = {0};
    uint32_t *IA_d, *JA_d;
    int *delta_d, *IA_size_d, *JA_size_d;

    //Dynamically Allocate Device Memory
    hipMalloc((void**) &IA_d, IA_size[0]*sizeof(uint32_t));
    hipMalloc((void**) &JA_d, JA_size[0]*sizeof(uint32_t));
    hipMalloc((void**) &delta_d, sizeof(int));
    hipMalloc((void**) &IA_size_d, sizeof(int));
    hipMalloc((void**) &JA_size_d, sizeof(int));

    //Copy host memory to device memory
    hipMemcpy(IA_d, IA, IA_size[0]*sizeof(uint32_t), hipMemcpyHostToDevice);
    hipMemcpy(JA_d, JA, JA_size[0]*sizeof(uint32_t), hipMemcpyHostToDevice);
    hipMemcpy(delta_d, delta, sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(IA_size_d, IA_size, sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(JA_size_d, JA_size, sizeof(int), hipMemcpyHostToDevice);

    //execute kernel
    int threadsPerBlock = 32;
    int blocksPerGrid = IA_size[0] / 32 + 1;
    count_triangles<<<blocksPerGrid,threadsPerBlock>>>(IA_d, JA_d, delta_d, IA_size_d, JA_size_d);

    //Write GPU results in device memory back to host memory
    hipMemcpy(delta, delta_d, sizeof(int), hipMemcpyDeviceToHost);

    printf("\ndelta is %d\n", delta[0]);

    //Free device memory
    hipFree(IA_d);
    hipFree(JA_d);
    hipFree(delta_d);
    hipFree(IA_size_d);
    hipFree(JA_size_d);

    //Free host memory
    free(IA);
    free(JA);


}
	.text
	.file	"count_triangles_C.hip"
	.globl	_Z30__device_stub__count_trianglesPjS_PiS0_S0_ # -- Begin function _Z30__device_stub__count_trianglesPjS_PiS0_S0_
	.type	_Z30__device_stub__count_trianglesPjS_PiS0_S0_,@function
_Z30__device_stub__count_trianglesPjS_PiS0_S0_: # @_Z30__device_stub__count_trianglesPjS_PiS0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15count_trianglesPjS_PiS0_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__count_trianglesPjS_PiS0_S0_, .Lfunc_end0-_Z30__device_stub__count_trianglesPjS_PiS0_S0_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbp
	movl	$.L.str.2, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %r13
	leaq	44(%rsp), %rbx
	movl	$4, %esi
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%rbp, %rcx
	callq	fread
	leaq	40(%rsp), %r15
	movl	$4, %esi
	movl	$1, %edx
	movq	%r15, %rdi
	movq	%r13, %rcx
	callq	fread
	movslq	(%rbx), %r14
	leaq	(,%r14,4), %rdi
	movq	%rdi, 72(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %rbx
	movslq	(%r15), %r15
	leaq	(,%r15,4), %rdi
	movq	%rdi, 64(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %r12
	movl	$4, %esi
	movq	%rbp, %rdi
	xorl	%edx, %edx
	callq	fseek
	movl	$4, %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	fseek
	movl	$8, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movq	%rbp, %rcx
	callq	fread
	movl	$8, %esi
	movq	%r12, 80(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	movq	%r15, %rdx
	movq	%r13, %rcx
	callq	fread
	xorl	%r14d, %r14d
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r14,4), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	$10, %r14
	jne	.LBB1_1
# %bb.2:
	leaq	12(%rsp), %rax
	movl	$0, (%rax)
	leaq	56(%rsp), %rbp
	movq	%rbp, %rdi
	movq	72(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %r15
	movq	%r15, %rdi
	movq	64(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %r13
	movl	$4, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movq	80(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$4, %edx
	leaq	12(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	leaq	44(%rsp), %r14
	movl	$4, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	leaq	40(%rsp), %rsi
	movl	$4, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	(%r14), %eax
	leal	31(%rax), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$5, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	56(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rcx
	movq	16(%rsp), %r8
	callq	_Z30__device_stub__count_trianglesPjS_PiS0_S0_
.LBB1_4:
	movq	32(%rsp), %rsi
	leaq	12(%rsp), %r14
	movl	$4, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	(%r14), %esi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15count_trianglesPjS_PiS0_S0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15count_trianglesPjS_PiS0_S0_,@object # @_Z15count_trianglesPjS_PiS0_S0_
	.section	.rodata,"a",@progbits
	.globl	_Z15count_trianglesPjS_PiS0_S0_
	.p2align	3, 0x0
_Z15count_trianglesPjS_PiS0_S0_:
	.quad	_Z30__device_stub__count_trianglesPjS_PiS0_S0_
	.size	_Z15count_trianglesPjS_PiS0_S0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"/mnt/large/graph-datasets/ca-AstroPh_adj_IA.txt.bin"
	.size	.L.str, 52

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"rb"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"/mnt/large/graph-datasets/ca-AstroPh_adj_JA.txt.bin"
	.size	.L.str.2, 52

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\n %d"
	.size	.L.str.3, 5

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\ndelta is %d\n"
	.size	.L.str.4, 14

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15count_trianglesPjS_PiS0_S0_"
	.size	.L__unnamed_1, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__count_trianglesPjS_PiS0_S0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15count_trianglesPjS_PiS0_S0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15count_trianglesPjS_PiS0_S0_ ; -- Begin function _Z15count_trianglesPjS_PiS0_S0_
	.globl	_Z15count_trianglesPjS_PiS0_S0_
	.p2align	8
	.type	_Z15count_trianglesPjS_PiS0_S0_,@function
_Z15count_trianglesPjS_PiS0_S0_:        ; @_Z15count_trianglesPjS_PiS0_S0_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x34
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_lt_i32_e32 0, v2
	s_cbranch_execz .LBB0_32
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_load_b32 s6, s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s6, s6, -2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s6, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_32
; %bb.2:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v6, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v1, vcc_lo
	s_mov_b32 s1, 0
	global_load_b64 v[0:1], v[6:7], off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v4, v1, v0
	v_mov_b32_e32 v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s2, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v12, vcc_lo
	global_load_b32 v3, v[0:1], off
	v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
	s_waitcnt vmcnt(0)
	v_cmpx_lt_u32_e64 v3, v2
	s_cbranch_execz .LBB0_10
; %bb.3:                                ; %.lr.ph
	v_dual_mov_b32 v9, v1 :: v_dual_add_nc_u32 v10, -1, v4
	v_mov_b32_e32 v8, v0
	s_mov_b32 s8, 0
	s_mov_b32 s7, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_ne_u32_e32 0, v10
	s_cbranch_execz .LBB0_9
; %bb.4:                                ; %.lr.ph91.preheader
	v_add_co_u32 v3, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v12, vcc_lo
	v_mov_b32_e32 v11, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v12, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v5, vcc_lo
                                        ; implicit-def: $sgpr9
.LBB0_5:                                ; %.lr.ph91
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v3, v[12:13], off
	v_dual_mov_b32 v8, v12 :: v_dual_mov_b32 v9, v13
	s_or_b32 s9, s9, exec_lo
	s_mov_b32 s10, exec_lo
                                        ; implicit-def: $vgpr12_vgpr13
	s_waitcnt vmcnt(0)
	v_cmpx_lt_u32_e64 v3, v2
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	v_sub_co_u32 v12, vcc_lo, v8, v0
	v_sub_co_ci_u32_e32 v13, vcc_lo, v9, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i64 v[12:13], 2, v[12:13]
	v_cmp_ge_i64_e32 vcc_lo, v[12:13], v[10:11]
	v_add_co_u32 v12, s0, v8, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v13, s0, 0, v9, s0
	s_and_not1_b32 s0, s9, exec_lo
	s_and_b32 s9, vcc_lo, exec_lo
	s_or_b32 s9, s0, s9
; %bb.7:                                ; %Flow134
                                        ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s9
	s_or_b32 s8, s0, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_5
; %bb.8:                                ; %Flow135
	s_or_b32 exec_lo, exec_lo, s8
.LBB0_9:                                ; %Flow136
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_10:                               ; %.critedge
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_mov_b32 s0, exec_lo
	v_cmpx_le_u32_e64 v3, v2
	s_xor_b32 s0, exec_lo, s0
; %bb.11:
	v_sub_co_u32 v10, vcc_lo, v8, v0
	v_sub_co_ci_u32_e32 v11, vcc_lo, v9, v1, vcc_lo
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i64 v[10:11], 2, v[10:11]
	v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[4:5]
	s_and_b32 s1, vcc_lo, exec_lo
; %bb.12:                               ; %Flow131
	s_and_not1_saveexec_b32 s0, s0
; %bb.13:                               ; %.critedge._crit_edge
	v_mov_b32_e32 v5, 0
	s_or_b32 s1, s1, exec_lo
; %bb.14:                               ; %Flow132
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.15:
	v_add_co_u32 v8, vcc_lo, v8, -4
	v_add_co_ci_u32_e32 v9, vcc_lo, -1, v9, vcc_lo
; %bb.16:
	s_or_b32 exec_lo, exec_lo, s0
	v_lshlrev_b64 v[12:13], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v10, vcc_lo, v8, 4
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, v0, v12
	v_add_co_ci_u32_e32 v5, vcc_lo, v1, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v3, vcc_lo, v3, v10
	v_sub_co_ci_u32_e32 v5, vcc_lo, v5, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, -4
	v_add_co_ci_u32_e32 v5, vcc_lo, -1, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_alignbit_b32 v12, v5, v3, 2
	v_add_co_u32 v3, s0, v12, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s0, s0, -1
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_32
; %bb.17:                               ; %.lr.ph88
	v_add_co_u32 v14, vcc_lo, v6, 4
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v7, vcc_lo
	v_sub_nc_u32_e32 v13, v4, v3
	v_not_b32_e32 v16, v2
	v_cmp_ne_u32_e32 vcc_lo, v4, v3
	v_mov_b32_e32 v3, 0
	s_mov_b32 s7, 0
	s_mov_b32 s8, 0
	s_mov_b32 s6, s7
.LBB0_18:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_20 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[6:7], 2
	v_add_co_u32 v4, s0, v10, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s1, v11, s0
	global_load_b32 v2, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v2, v16
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, s0, v14, v4
	v_add_co_ci_u32_e64 v5, s0, v15, v5, s0
	global_load_b64 v[6:7], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s0, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB0_31
; %bb.19:                               ; %.lr.ph85.preheader
                                        ;   in Loop: Header=BB0_18 Depth=1
	v_sub_nc_u32_e32 v17, v7, v6
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v8, 0
	s_mov_b32 s10, 0
.LBB0_20:                               ; %.lr.ph85
                                        ;   Parent Loop BB0_18 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v2, v[4:5], off
	v_mov_b32_e32 v7, v3
	v_mov_b32_e32 v9, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[6:7]
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[18:19], 2, v[2:3]
	v_add_co_u32 v2, s0, s2, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v7, s0, s3, v19, s0
	v_lshlrev_b64 v[18:19], 2, v[8:9]
	v_add_co_u32 v20, s0, v2, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v21, s0, v7, v21, s0
	v_add_co_u32 v18, s0, v0, v18
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v19, s0, v1, v19, s0
	s_clause 0x1
	global_load_b32 v2, v[20:21], off
	global_load_b32 v7, v[18:19], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s0, v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_26
; %bb.21:                               ;   in Loop: Header=BB0_20 Depth=2
	v_cmp_le_u32_e64 s0, v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s11, s0
	s_xor_b32 s0, exec_lo, s11
; %bb.22:                               ;   in Loop: Header=BB0_20 Depth=2
	v_add_nc_u32_e32 v6, 1, v6
; %bb.23:                               ; %Flow
                                        ;   in Loop: Header=BB0_20 Depth=2
	s_and_not1_saveexec_b32 s0, s0
; %bb.24:                               ;   in Loop: Header=BB0_20 Depth=2
	v_add_nc_u32_e32 v8, 1, v8
; %bb.25:                               ; %Flow123
                                        ;   in Loop: Header=BB0_20 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_26:                               ; %Flow124
                                        ;   in Loop: Header=BB0_20 Depth=2
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB0_30
; %bb.27:                               ;   in Loop: Header=BB0_20 Depth=2
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v2, s12, 0
	v_cmp_eq_u32_e64 s0, 0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB0_29
; %bb.28:                               ;   in Loop: Header=BB0_20 Depth=2
	s_bcnt1_i32_b32 s0, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s0
	global_atomic_add_u32 v3, v2, s[4:5]
.LBB0_29:                               ;   in Loop: Header=BB0_20 Depth=2
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v6, 1, v6
	v_add_nc_u32_e32 v8, 1, v8
.LBB0_30:                               ; %Flow125
                                        ;   in Loop: Header=BB0_20 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_ge_u32_e64 s0, v8, v13
	v_cmp_ge_u32_e64 s1, v6, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, s1
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s10, s0, s10
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_20
.LBB0_31:                               ; %Flow127
                                        ;   in Loop: Header=BB0_18 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	v_cmp_eq_u32_e64 s0, s6, v12
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s8, s0, s8
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_18
.LBB0_32:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15count_trianglesPjS_PiS0_S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15count_trianglesPjS_PiS0_S0_, .Lfunc_end0-_Z15count_trianglesPjS_PiS0_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1140
; NumSgprs: 18
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15count_trianglesPjS_PiS0_S0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15count_trianglesPjS_PiS0_S0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     22
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
