#ifndef uint32_t
#define uint32_t unsigned int
#endif

#define H0 0x6a09e667
#define H1 0xbb67ae85
#define H2 0x3c6ef372
#define H3 0xa54ff53a
#define H4 0x510e527f
#define H5 0x9b05688c
#define H6 0x1f83d9ab
#define H7 0x5be0cd19

__device__
uint rotr(uint x, int n) {
  if (n < 32) return (x >> n) | (x << (32 - n));
  return x;
}

__device__
uint ch(uint x, uint y, uint z) {
  return (x & y) ^ (~x & z);
}

__device__
uint maj(uint x, uint y, uint z) {
  return (x & y) ^ (x & z) ^ (y & z);
}

__device__
uint sigma0(uint x) {
  return rotr(x, 2) ^ rotr(x, 13) ^ rotr(x, 22);
}

__device__
uint sigma1(uint x) {
  return rotr(x, 6) ^ rotr(x, 11) ^ rotr(x, 25);
}

__device__
uint gamma0(uint x) {
  return rotr(x, 7) ^ rotr(x, 18) ^ (x >> 3);
}

__device__
uint gamma1(uint x) {
  return rotr(x, 17) ^ rotr(x, 19) ^ (x >> 10);
}

__constant__ uint K[64]={
  0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5,
  0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174,
  0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
  0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967,
  0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85,
  0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
  0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3,
  0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
};

__device__
uint get_global_id() {
  uint blockId, threadsPerBlock;
  blockId = blockIdx.z * gridDim.x * gridDim.y
          + blockIdx.y * gridDim.x
          + blockIdx.x;
  threadsPerBlock = blockDim.x;
  return threadIdx.x + threadsPerBlock * blockId;
}

__global__ void crypt_kernel(ulong start, uint *prefix, ulong plen, uint mask, uint *match){
  int t;
  uint W[80], rnd, id, A,B,C,D,E,F,G,H,T1,T2;
  uint Ws[16];

  id = get_global_id();

  //if (id == 0) {
  //  printf("%08x\n", start);
  //}

  // brutforce is build up as: prefix | thr_id:04x | <rnd>:04x | start:08x
  for (t = 0; t < plen; ++t) {
    Ws[t] = prefix[t];
  //  printf("%04x", prefix[t]);
  }
  // printf("%04x\n", id);


  T1 = (id & 0xf) | (((id >> 4) & 0xf) << 8) | (((id >> 8) & 0xf) << 16) | (((id >> 12) & 0xf) << 24);
  T2 = (T1 & 0xe0e0e0e);
  T2 = ((((T2 >> 1) & T2) >> 2) | (((T2 >> 2) & T2) >> 1)) & 0x1010101;
  Ws[plen] = T1 + 0x30303030 + T2 * 0x27;

  T1 = (uint)(start >> 32);
  T1 = (T1 & 0xf) | (((T1 >> 4) & 0xf) << 8) | (((T1 >> 8) & 0xf) << 16) | (((T1 >> 12) & 0xf) << 24);
  T2 = (T1 & 0xe0e0e0e);
  T2 = ((((T2 >> 1) & T2) >> 2) | (((T2 >> 2) & T2) >> 1)) & 0x1010101;
  Ws[plen + 2] = T1 + 0x30303030 + T2 * 0x27;

  T1 = (uint)start;
  T1 = (T1 & 0xf) | (((T1 >> 4) & 0xf) << 8) | (((T1 >> 8) & 0xf) << 16) | (((T1 >> 12) & 0xf) << 24);
  T2 = (T1 & 0xe0e0e0e);
  T2 = ((((T2 >> 1) & T2) >> 2) | (((T2 >> 2) & T2) >> 1)) & 0x1010101;
  Ws[plen + 3] = T1 + 0x30303030 + T2 * 0x27;

  Ws[plen + 4] = 0x80000000;

  for (t = plen + 5; t < 15; ++t) {
    Ws[t] = 0;
  }

  Ws[15] = 128 + 32 * plen;
  // preparing buffer done

  /*
  if (id == 0) {
    printf("%016x: ", start);
    for (t = 0; t < 16; ++t) {
      printf("%08x", Ws[t]);
    }
    printf(" - %u\n", Ws[15]);
  }
  */

  for (rnd = 0; rnd < 0x10000; ++rnd) {
    uint digest[8] = {H0, H1, H2, H3, H4, H5, H6, H7};

#pragma unroll
    for (t = 0; t < 16; ++t) {
      W[t] = Ws[t];
    }

    T1 = (rnd & 0xf) | (((rnd >> 4) & 0xf) << 8) | (((rnd >> 8) & 0xf) << 16) | (((rnd >> 12) & 0xf) << 24);
    T2 = (T1 & 0xe0e0e0e);
    T2 = ((((T2 >> 1) & T2) >> 2) | (((T2 >> 2) & T2) >> 1)) & 0x1010101;
    W[plen + 1] = T1 + 0x30303030 + T2 * 0x27;

    A = digest[0] = H0;
    B = digest[1] = H1;
    C = digest[2] = H2;
    D = digest[3] = H3;
    E = digest[4] = H4;
    F = digest[5] = H5;
    G = digest[6] = H6;
    H = digest[7] = H7;

    for (t = 16; t < 64; t++) {
      W[t] = gamma1(W[t - 2]) + W[t - 7] + gamma0(W[t - 15]) + W[t - 16];
    }

    for (t = 0; t < 64; t++) {
      T1 = H + sigma1(E) + ch(E, F, G) + K[t] + W[t];
      T2 = sigma0(A) + maj(A, B, C);
      H = G; G = F; F = E; E = D + T1; D = C; C = B; B = A; A = T1 + T2;
    }

    digest[0] += A;

    if ((digest[0] & mask) == 0) {
      /*
      for (t = 0; t < 16; ++t) {
        printf("%08x", Ws[t]);
      }
      printf(" - %u\n", Ws[15]);
      */

      match[0] = 1;
      match[1] = id;
      match[2] = rnd;
    }
  }
}
	.file	"tmpxft_00396eab_00000000-6_sha256.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2018:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2018:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z4rotrji
	.type	_Z4rotrji, @function
_Z4rotrji:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2008:
	.size	_Z4rotrji, .-_Z4rotrji
	.globl	_Z2chjjj
	.type	_Z2chjjj, @function
_Z2chjjj:
.LFB2009:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2009:
	.size	_Z2chjjj, .-_Z2chjjj
	.globl	_Z3majjjj
	.type	_Z3majjjj, @function
_Z3majjjj:
.LFB2160:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2160:
	.size	_Z3majjjj, .-_Z3majjjj
	.globl	_Z6sigma0j
	.type	_Z6sigma0j, @function
_Z6sigma0j:
.LFB2011:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2011:
	.size	_Z6sigma0j, .-_Z6sigma0j
	.globl	_Z6sigma1j
	.type	_Z6sigma1j, @function
_Z6sigma1j:
.LFB2162:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z6sigma0j
	.cfi_endproc
.LFE2162:
	.size	_Z6sigma1j, .-_Z6sigma1j
	.globl	_Z6gamma0j
	.type	_Z6gamma0j, @function
_Z6gamma0j:
.LFB2164:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z6sigma0j
	.cfi_endproc
.LFE2164:
	.size	_Z6gamma0j, .-_Z6gamma0j
	.globl	_Z6gamma1j
	.type	_Z6gamma1j, @function
_Z6gamma1j:
.LFB2166:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z6sigma0j
	.cfi_endproc
.LFE2166:
	.size	_Z6gamma1j, .-_Z6gamma1j
	.globl	_Z13get_global_idv
	.type	_Z13get_global_idv, @function
_Z13get_global_idv:
.LFB2015:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2015:
	.size	_Z13get_global_idv, .-_Z13get_global_idv
	.globl	_Z37__device_stub__Z12crypt_kernelmPjmjS_mPjmjS_
	.type	_Z37__device_stub__Z12crypt_kernelmPjmjS_mPjmjS_, @function
_Z37__device_stub__Z12crypt_kernelmPjmjS_mPjmjS_:
.LFB2040:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z12crypt_kernelmPjmjS_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L18:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z37__device_stub__Z12crypt_kernelmPjmjS_mPjmjS_, .-_Z37__device_stub__Z12crypt_kernelmPjmjS_mPjmjS_
	.globl	_Z12crypt_kernelmPjmjS_
	.type	_Z12crypt_kernelmPjmjS_, @function
_Z12crypt_kernelmPjmjS_:
.LFB2041:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z12crypt_kernelmPjmjS_mPjmjS_
	.cfi_endproc
.LFE2041:
	.size	_Z12crypt_kernelmPjmjS_, .-_Z12crypt_kernelmPjmjS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z12crypt_kernelmPjmjS_"
.LC1:
	.string	"K"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2043:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12crypt_kernelmPjmjS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	movl	$256, %r9d
	leaq	_ZL1K(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2043:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL1K
	.comm	_ZL1K,256,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#ifndef uint32_t
#define uint32_t unsigned int
#endif

#define H0 0x6a09e667
#define H1 0xbb67ae85
#define H2 0x3c6ef372
#define H3 0xa54ff53a
#define H4 0x510e527f
#define H5 0x9b05688c
#define H6 0x1f83d9ab
#define H7 0x5be0cd19

__device__
uint rotr(uint x, int n) {
  if (n < 32) return (x >> n) | (x << (32 - n));
  return x;
}

__device__
uint ch(uint x, uint y, uint z) {
  return (x & y) ^ (~x & z);
}

__device__
uint maj(uint x, uint y, uint z) {
  return (x & y) ^ (x & z) ^ (y & z);
}

__device__
uint sigma0(uint x) {
  return rotr(x, 2) ^ rotr(x, 13) ^ rotr(x, 22);
}

__device__
uint sigma1(uint x) {
  return rotr(x, 6) ^ rotr(x, 11) ^ rotr(x, 25);
}

__device__
uint gamma0(uint x) {
  return rotr(x, 7) ^ rotr(x, 18) ^ (x >> 3);
}

__device__
uint gamma1(uint x) {
  return rotr(x, 17) ^ rotr(x, 19) ^ (x >> 10);
}

__constant__ uint K[64]={
  0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5,
  0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174,
  0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
  0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967,
  0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85,
  0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
  0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3,
  0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
};

__device__
uint get_global_id() {
  uint blockId, threadsPerBlock;
  blockId = blockIdx.z * gridDim.x * gridDim.y
          + blockIdx.y * gridDim.x
          + blockIdx.x;
  threadsPerBlock = blockDim.x;
  return threadIdx.x + threadsPerBlock * blockId;
}

__global__ void crypt_kernel(ulong start, uint *prefix, ulong plen, uint mask, uint *match){
  int t;
  uint W[80], rnd, id, A,B,C,D,E,F,G,H,T1,T2;
  uint Ws[16];

  id = get_global_id();

  //if (id == 0) {
  //  printf("%08x\n", start);
  //}

  // brutforce is build up as: prefix | thr_id:04x | <rnd>:04x | start:08x
  for (t = 0; t < plen; ++t) {
    Ws[t] = prefix[t];
  //  printf("%04x", prefix[t]);
  }
  // printf("%04x\n", id);


  T1 = (id & 0xf) | (((id >> 4) & 0xf) << 8) | (((id >> 8) & 0xf) << 16) | (((id >> 12) & 0xf) << 24);
  T2 = (T1 & 0xe0e0e0e);
  T2 = ((((T2 >> 1) & T2) >> 2) | (((T2 >> 2) & T2) >> 1)) & 0x1010101;
  Ws[plen] = T1 + 0x30303030 + T2 * 0x27;

  T1 = (uint)(start >> 32);
  T1 = (T1 & 0xf) | (((T1 >> 4) & 0xf) << 8) | (((T1 >> 8) & 0xf) << 16) | (((T1 >> 12) & 0xf) << 24);
  T2 = (T1 & 0xe0e0e0e);
  T2 = ((((T2 >> 1) & T2) >> 2) | (((T2 >> 2) & T2) >> 1)) & 0x1010101;
  Ws[plen + 2] = T1 + 0x30303030 + T2 * 0x27;

  T1 = (uint)start;
  T1 = (T1 & 0xf) | (((T1 >> 4) & 0xf) << 8) | (((T1 >> 8) & 0xf) << 16) | (((T1 >> 12) & 0xf) << 24);
  T2 = (T1 & 0xe0e0e0e);
  T2 = ((((T2 >> 1) & T2) >> 2) | (((T2 >> 2) & T2) >> 1)) & 0x1010101;
  Ws[plen + 3] = T1 + 0x30303030 + T2 * 0x27;

  Ws[plen + 4] = 0x80000000;

  for (t = plen + 5; t < 15; ++t) {
    Ws[t] = 0;
  }

  Ws[15] = 128 + 32 * plen;
  // preparing buffer done

  /*
  if (id == 0) {
    printf("%016x: ", start);
    for (t = 0; t < 16; ++t) {
      printf("%08x", Ws[t]);
    }
    printf(" - %u\n", Ws[15]);
  }
  */

  for (rnd = 0; rnd < 0x10000; ++rnd) {
    uint digest[8] = {H0, H1, H2, H3, H4, H5, H6, H7};

#pragma unroll
    for (t = 0; t < 16; ++t) {
      W[t] = Ws[t];
    }

    T1 = (rnd & 0xf) | (((rnd >> 4) & 0xf) << 8) | (((rnd >> 8) & 0xf) << 16) | (((rnd >> 12) & 0xf) << 24);
    T2 = (T1 & 0xe0e0e0e);
    T2 = ((((T2 >> 1) & T2) >> 2) | (((T2 >> 2) & T2) >> 1)) & 0x1010101;
    W[plen + 1] = T1 + 0x30303030 + T2 * 0x27;

    A = digest[0] = H0;
    B = digest[1] = H1;
    C = digest[2] = H2;
    D = digest[3] = H3;
    E = digest[4] = H4;
    F = digest[5] = H5;
    G = digest[6] = H6;
    H = digest[7] = H7;

    for (t = 16; t < 64; t++) {
      W[t] = gamma1(W[t - 2]) + W[t - 7] + gamma0(W[t - 15]) + W[t - 16];
    }

    for (t = 0; t < 64; t++) {
      T1 = H + sigma1(E) + ch(E, F, G) + K[t] + W[t];
      T2 = sigma0(A) + maj(A, B, C);
      H = G; G = F; F = E; E = D + T1; D = C; C = B; B = A; A = T1 + T2;
    }

    digest[0] += A;

    if ((digest[0] & mask) == 0) {
      /*
      for (t = 0; t < 16; ++t) {
        printf("%08x", Ws[t]);
      }
      printf(" - %u\n", Ws[15]);
      */

      match[0] = 1;
      match[1] = id;
      match[2] = rnd;
    }
  }
}
	.text
	.file	"sha256.hip"
	.globl	_Z27__device_stub__crypt_kernelmPjmjS_ # -- Begin function _Z27__device_stub__crypt_kernelmPjmjS_
	.type	_Z27__device_stub__crypt_kernelmPjmjS_,@function
_Z27__device_stub__crypt_kernelmPjmjS_: # @_Z27__device_stub__crypt_kernelmPjmjS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12crypt_kernelmPjmjS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__crypt_kernelmPjmjS_, .Lfunc_end0-_Z27__device_stub__crypt_kernelmPjmjS_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12crypt_kernelmPjmjS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$K, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movl	$256, %r9d                      # imm = 0x100
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	K,@object                       # @K
	.local	K
	.comm	K,256,16
	.type	_Z12crypt_kernelmPjmjS_,@object # @_Z12crypt_kernelmPjmjS_
	.section	.rodata,"a",@progbits
	.globl	_Z12crypt_kernelmPjmjS_
	.p2align	3, 0x0
_Z12crypt_kernelmPjmjS_:
	.quad	_Z27__device_stub__crypt_kernelmPjmjS_
	.size	_Z12crypt_kernelmPjmjS_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z12crypt_kernelmPjmjS_"
	.size	.L__unnamed_1, 24

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"K"
	.size	.L__unnamed_2, 2

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__crypt_kernelmPjmjS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym K
	.addrsig_sym _Z12crypt_kernelmPjmjS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12crypt_kernelmPjmjS_ ; -- Begin function _Z12crypt_kernelmPjmjS_
	.globl	_Z12crypt_kernelmPjmjS_
	.p2align	8
	.type	_Z12crypt_kernelmPjmjS_,@function
_Z12crypt_kernelmPjmjS_:                ; @_Z12crypt_kernelmPjmjS_
; %bb.0:
	s_load_b64 s[8:9], s[0:1], 0x28
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_mov_b64 s[10:11], 0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_u32 s13, s8
	s_cselect_b32 s4, 12, 18
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v1, s4
	global_load_u16 v17, v1, s[2:3]
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u64 s[2:3], 0
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
                                        ; implicit-def: $vgpr1
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_load_b32 s12, s[6:7], 0x0
	s_mov_b32 m0, s10
	s_add_u32 s10, s10, 1
	s_addc_u32 s11, s11, 0
	s_add_u32 s6, s6, 4
	v_cmp_lt_u64_e64 s16, s[10:11], s[2:3]
	s_addc_u32 s7, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s16
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v1, s12
	s_cbranch_vccnz .LBB0_2
	s_branch .LBB0_4
.LBB0_3:
                                        ; implicit-def: $vgpr16
.LBB0_4:                                ; %._crit_edge
	s_mul_i32 s3, s9, s15
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v17, 0xffff, v17
	s_add_i32 s3, s3, s14
	s_lshl_b32 s6, s5, 4
	s_mul_i32 s3, s3, s8
	s_lshl_b32 s7, s5, 8
	s_add_i32 s3, s3, s13
	s_lshl_b32 s10, s4, 4
	v_mad_u64_u32 v[18:19], null, s3, v17, v[0:1]
	s_and_b32 s3, s5, 15
	s_and_b32 s6, s6, 0xf00
	s_lshl_b32 s5, s5, 12
	s_and_b32 s9, s4, 15
	s_lshl_b32 s11, s4, 8
	s_and_b32 s7, s7, 0xf0000
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v0, 15, v18
	v_lshlrev_b32_e32 v17, 4, v18
	v_lshlrev_b32_e32 v19, 8, v18
	v_lshlrev_b32_e32 v20, 12, v18
	s_and_b32 s10, s10, 0xf00
	s_or_b32 s3, s6, s3
	v_and_or_b32 v0, 0xf00, v17, v0
	v_and_b32_e32 v17, 0xf0000, v19
	v_and_b32_e32 v19, 0xf000000, v20
	s_lshl_b32 s4, s4, 12
	s_and_b32 s5, s5, 0xf000000
	s_and_b32 s11, s11, 0xf0000
	s_or_b32 s6, s10, s9
	v_or3_b32 v0, v0, v17, v19
	s_or_b32 s3, s3, s7
	s_and_b32 s4, s4, 0xf000000
	s_or_b32 s6, s6, s11
	s_or_b32 s3, s3, s5
	v_lshrrev_b32_e32 v17, 2, v0
	v_lshrrev_b32_e32 v19, 1, v0
	v_lshrrev_b32_e32 v20, 3, v0
	s_or_b32 s4, s6, s4
	s_lshr_b32 s6, s3, 2
	s_lshr_b32 s7, s3, 1
	v_or_b32_e32 v17, v17, v19
	s_lshr_b32 s5, s3, 3
	s_or_b32 s6, s6, s7
	s_lshr_b32 s10, s4, 2
	s_lshr_b32 s11, s4, 1
	v_and_b32_e32 v17, v20, v17
	s_and_b32 s5, s5, s6
	s_lshr_b32 s9, s4, 3
	s_or_b32 s7, s10, s11
	s_and_b32 s5, s5, 0x1010101
	v_and_b32_e32 v17, 0x1010101, v17
	s_and_b32 s6, s9, s7
	s_mul_i32 s5, s5, 39
	s_add_i32 s8, s2, 2
	s_and_b32 s6, s6, 0x1010101
	v_mul_lo_u32 v17, v17, 39
	s_add_i32 s3, s5, s3
	s_mov_b32 m0, s2
	s_mul_i32 s6, s6, 39
	s_add_i32 s3, s3, 0x30303030
	s_add_i32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s4, s4, 0x30303030
	v_add3_u32 v0, v17, v0, 0x30303030
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_movreld_b32_e32 v1, v0
	s_mov_b32 m0, s8
	v_movreld_b32_e32 v1, s3
	s_add_i32 s3, s2, 3
	s_mov_b32 m0, s3
	s_add_i32 s3, s2, 4
	v_movreld_b32_e32 v1, s4
	s_add_i32 s4, s2, 5
	s_mov_b32 m0, s3
	s_cmp_gt_i32 s4, 14
	v_movreld_b32_e32 v1, 0x80000000
	s_cbranch_scc1 .LBB0_7
; %bb.5:                                ; %.lr.ph128.preheader
	s_ashr_i32 s5, s4, 31
.LBB0_6:                                ; %.lr.ph128
                                        ; =>This Inner Loop Header: Depth=1
	s_add_i32 s3, s3, 1
	s_mov_b32 m0, s4
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	s_cmp_lt_i32 s3, 14
	v_movreld_b32_e32 v1, 0
	s_cbranch_scc1 .LBB0_6
.LBB0_7:                                ; %._crit_edge129
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x18
	s_load_b64 s[0:1], s[0:1], 0x20
	s_lshl_b32 s5, s2, 5
	s_lshl_b32 s2, s2, 2
	v_dual_mov_b32 v0, 16 :: v_dual_mov_b32 v17, 1
	v_add_nc_u32_e64 v20, s2, 16
	v_mov_b32_e32 v21, 0
	s_addk_i32 s5, 0x80
	s_mov_b32 s6, 0
.LBB0_8:                                ; %.preheader122
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_9 Depth 2
                                        ;     Child Loop BB0_11 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s2, s6, 4
	s_and_b32 s3, s6, 15
	s_and_b32 s2, s2, 0xf00
	s_lshl_b32 s7, s6, 8
	s_or_b32 s2, s2, s3
	s_and_b32 s3, s7, 0xf0000
	s_lshl_b32 s7, s6, 12
	s_or_b32 s2, s2, s3
	s_and_b32 s3, s7, 0xf000000
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s2, s3
	s_lshr_b32 s3, s2, 2
	s_lshr_b32 s7, s2, 1
	s_lshr_b32 s8, s2, 3
	s_or_b32 s3, s3, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s8, s3
	s_and_b32 s3, s3, 0x1010101
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s3, s3, 39
	s_add_i32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, 0x30303030
	v_dual_mov_b32 v16, s5 :: v_dual_mov_b32 v19, s2
	s_clause 0x3
	scratch_store_b128 off, v[1:4], off offset:16
	scratch_store_b128 off, v[5:8], off offset:32
	scratch_store_b128 off, v[9:12], off offset:48
	scratch_store_b128 off, v[13:16], off offset:64
	scratch_store_b32 v20, v19, off offset:4
	scratch_load_b32 v16, off, off offset:16
	s_mov_b32 s2, 0
.LBB0_9:                                ;   Parent Loop BB0_8 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_readfirstlane_b32 s3, v0
	s_delay_alu instid0(VALU_DEP_1)
	s_add_i32 s3, s3, s2
	s_add_i32 s2, s2, 4
	s_add_i32 s7, s3, 56
	s_add_i32 s8, s3, 4
	scratch_load_b32 v19, off, s7
	s_add_i32 s7, s3, 36
	s_clause 0x1
	scratch_load_b32 v22, off, s8
	scratch_load_b32 v23, off, s7
	s_add_i32 s3, s3, 64
	s_cmpk_lg_i32 s2, 0xc0
	s_waitcnt vmcnt(2)
	v_alignbit_b32 v24, v19, v19, 17
	v_alignbit_b32 v25, v19, v19, 19
	v_lshrrev_b32_e32 v19, 10, v19
	s_waitcnt vmcnt(1)
	v_alignbit_b32 v26, v22, v22, 7
	v_alignbit_b32 v27, v22, v22, 18
	v_lshrrev_b32_e32 v28, 3, v22
	v_xor_b32_e32 v24, v24, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor3_b32 v25, v26, v27, v28
	s_waitcnt vmcnt(0)
	v_xad_u32 v19, v24, v19, v23
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v19, v19, v16, v25
	v_mov_b32_e32 v16, v22
	scratch_store_b32 off, v19, s3
	s_cbranch_scc1 .LBB0_9
; %bb.10:                               ; %.preheader.preheader
                                        ;   in Loop: Header=BB0_8 Depth=1
	v_mov_b32_e32 v26, 0x5be0cd19
	v_mov_b32_e32 v16, 0x1f83d9ab
	v_mov_b32_e32 v19, 0x9b05688c
	v_mov_b32_e32 v25, 0x510e527f
	v_mov_b32_e32 v23, 0xa54ff53a
	v_mov_b32_e32 v22, 0x3c6ef372
	v_mov_b32_e32 v24, 0xbb67ae85
	v_mov_b32_e32 v27, 0x6a09e667
	s_mov_b32 s7, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, K@rel32@lo+4
	s_addc_u32 s3, s3, K@rel32@hi+12
.LBB0_11:                               ; %.preheader
                                        ;   Parent Loop BB0_8 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_add_i32 s8, s7, 16
	v_alignbit_b32 v29, v25, v25, 6
	scratch_load_b32 v28, off, s8
	v_alignbit_b32 v30, v25, v25, 11
	s_load_b32 s8, s[2:3], 0x0
	v_alignbit_b32 v31, v25, v25, 25
	v_and_b32_e32 v32, v19, v25
	v_not_b32_e32 v33, v25
	v_mov_b32_e32 v34, v27
	v_xor_b32_e32 v27, v29, v30
	v_xor_b32_e32 v29, v22, v24
	v_and_b32_e32 v30, v22, v24
	v_and_b32_e32 v33, v16, v33
	v_alignbit_b32 v35, v34, v34, 22
	v_xad_u32 v27, v27, v31, v32
	v_alignbit_b32 v31, v34, v34, 2
	v_alignbit_b32 v32, v34, v34, 13
	s_add_i32 s7, s7, 4
	s_add_u32 s2, s2, 4
	v_add3_u32 v26, v27, v26, v33
	v_and_b32_e32 v27, v29, v34
	v_xor3_b32 v29, v31, v32, v35
	s_addc_u32 s3, s3, 0
	s_cmpk_lg_i32 s7, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add3_u32 v28, v26, s8, v28
	v_mov_b32_e32 v26, v16
	v_xor_b32_e32 v27, v27, v30
	v_dual_mov_b32 v16, v19 :: v_dual_mov_b32 v19, v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v25, v28, v23
	v_dual_mov_b32 v23, v22 :: v_dual_mov_b32 v22, v24
	v_add3_u32 v27, v27, v29, v28
	v_mov_b32_e32 v24, v34
	s_cbranch_scc1 .LBB0_11
; %bb.12:                               ;   in Loop: Header=BB0_8 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v16, 0x6a09e667, v27
	s_mov_b32 s2, exec_lo
	v_and_b32_e32 v16, s4, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v16
	s_cbranch_execz .LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_8 Depth=1
	v_mov_b32_e32 v19, s6
	global_store_b96 v21, v[17:19], s[0:1]
.LBB0_14:                               ;   in Loop: Header=BB0_8 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s6, 0x10000
	s_cbranch_scc1 .LBB0_8
; %bb.15:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12crypt_kernelmPjmjS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 336
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 36
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12crypt_kernelmPjmjS_, .Lfunc_end0-_Z12crypt_kernelmPjmjS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1336
; NumSgprs: 19
; NumVgprs: 36
; ScratchSize: 336
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 36
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	K                       ; @K
	.type	K,@object
	.data
	.globl	K
	.p2align	4, 0x0
K:
	.long	1116352408                      ; 0x428a2f98
	.long	1899447441                      ; 0x71374491
	.long	3049323471                      ; 0xb5c0fbcf
	.long	3921009573                      ; 0xe9b5dba5
	.long	961987163                       ; 0x3956c25b
	.long	1508970993                      ; 0x59f111f1
	.long	2453635748                      ; 0x923f82a4
	.long	2870763221                      ; 0xab1c5ed5
	.long	3624381080                      ; 0xd807aa98
	.long	310598401                       ; 0x12835b01
	.long	607225278                       ; 0x243185be
	.long	1426881987                      ; 0x550c7dc3
	.long	1925078388                      ; 0x72be5d74
	.long	2162078206                      ; 0x80deb1fe
	.long	2614888103                      ; 0x9bdc06a7
	.long	3248222580                      ; 0xc19bf174
	.long	3835390401                      ; 0xe49b69c1
	.long	4022224774                      ; 0xefbe4786
	.long	264347078                       ; 0xfc19dc6
	.long	604807628                       ; 0x240ca1cc
	.long	770255983                       ; 0x2de92c6f
	.long	1249150122                      ; 0x4a7484aa
	.long	1555081692                      ; 0x5cb0a9dc
	.long	1996064986                      ; 0x76f988da
	.long	2554220882                      ; 0x983e5152
	.long	2821834349                      ; 0xa831c66d
	.long	2952996808                      ; 0xb00327c8
	.long	3210313671                      ; 0xbf597fc7
	.long	3336571891                      ; 0xc6e00bf3
	.long	3584528711                      ; 0xd5a79147
	.long	113926993                       ; 0x6ca6351
	.long	338241895                       ; 0x14292967
	.long	666307205                       ; 0x27b70a85
	.long	773529912                       ; 0x2e1b2138
	.long	1294757372                      ; 0x4d2c6dfc
	.long	1396182291                      ; 0x53380d13
	.long	1695183700                      ; 0x650a7354
	.long	1986661051                      ; 0x766a0abb
	.long	2177026350                      ; 0x81c2c92e
	.long	2456956037                      ; 0x92722c85
	.long	2730485921                      ; 0xa2bfe8a1
	.long	2820302411                      ; 0xa81a664b
	.long	3259730800                      ; 0xc24b8b70
	.long	3345764771                      ; 0xc76c51a3
	.long	3516065817                      ; 0xd192e819
	.long	3600352804                      ; 0xd6990624
	.long	4094571909                      ; 0xf40e3585
	.long	275423344                       ; 0x106aa070
	.long	430227734                       ; 0x19a4c116
	.long	506948616                       ; 0x1e376c08
	.long	659060556                       ; 0x2748774c
	.long	883997877                       ; 0x34b0bcb5
	.long	958139571                       ; 0x391c0cb3
	.long	1322822218                      ; 0x4ed8aa4a
	.long	1537002063                      ; 0x5b9cca4f
	.long	1747873779                      ; 0x682e6ff3
	.long	1955562222                      ; 0x748f82ee
	.long	2024104815                      ; 0x78a5636f
	.long	2227730452                      ; 0x84c87814
	.long	2361852424                      ; 0x8cc70208
	.long	2428436474                      ; 0x90befffa
	.long	2756734187                      ; 0xa4506ceb
	.long	3204031479                      ; 0xbef9a3f7
	.long	3329325298                      ; 0xc67178f2
	.size	K, 256

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym K
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12crypt_kernelmPjmjS_
    .private_segment_fixed_size: 336
    .sgpr_count:     19
    .sgpr_spill_count: 0
    .symbol:         _Z12crypt_kernelmPjmjS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     36
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
