/* -----------------------------------------------------------------------------------------------
Name: Anand Jhunjhunwala
Roll No: 17EC30041
CUDA
Assignment 1: 2D convolution operation for a 2D Matrix of floating point numbers. 
------------------------------------------------------------------------------------------------*/

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <cuda.h>
#include <cuda_runtime.h>

__host__ void RUN(cudaError_t call)
{
	cudaError_t err = call;
	if(err != cudaSuccess)
	{
		fprintf(stderr, " Failed with error code %s\n", cudaGetErrorString(err));
		exit(EXIT_FAILURE);
	}
}

__device__ float value(int i, int j, float *data, int N)
{
	if(i<0 || i>=N)
	{
		return 0;
	}
	else if(j<0 || j>=N)
	{
		return 0;
	}
	else
	{
		return data[i*N + j];
	}
}

__global__ void conv_2D(float *in, float *out, int N)
{
	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	unsigned int j = blockIdx.y*blockDim.y + threadIdx.y;
	if(i<N && j<N)
	{
		out[i*N + j] = (1.0/9.0)*(value(i-1,j-1,in,N) + value(i-1, j, in, N) + value(i-1, j+1, in, N) + value(i,j-1,in,N) + value(i,j,in,N) + value(i,j+1,in,N) + value(i+1,j-1,in,N) + value(i+1,j,in,N) + value(i+1,j+1,in,N));
	}
}
int main()
{
	cudaEvent_t startEvent, stopEvent;
	int max_x = 32; //maximum_thread_per_block 1024
	int test_case, N, k=1;
	long int i,j; 
	float *d_A, *h_A, *d_B, *h_B, ms;
	printf("\n Enter the number of test cases:");
	scanf("%d", &test_case);
	printf(" %d\n", test_case);

	RUN(cudaSetDevice(0));
	while(test_case)
	{
		RUN(cudaEventCreate(&startEvent));
		RUN(cudaEventCreate(&stopEvent));
		printf("\nRunning test case: %d",k);
		printf("\n Enter dimention of Matrix:");
		scanf("%d", &N);
		printf(" %d\n", N);
		h_A = (float *)malloc(N*N*sizeof(float));
    	h_B = (float *)malloc(N*N*sizeof(float));
		printf("\n Enter entries of input matrix:\n");
		for(i=0; i<N*N; i++)
		{
			scanf("%f", &h_A[i]);
		}
		RUN(cudaMalloc((void **)&d_A, N*N*sizeof(float)));
		RUN(cudaMalloc((void **)&d_B, N*N*sizeof(float)));
		RUN(cudaMemcpy(d_A, h_A, N*N*sizeof(float), cudaMemcpyHostToDevice));
		if(N <= max_x)
		{
			dim3 grid(1,1,1);
			dim3 block(N, N, 1);
	      	printf("\nLaunching kernel ");
	      	RUN(cudaEventRecord(startEvent,0));
		  	conv_2D<<<grid,block>>>(d_A, d_B, N);
		  	RUN(cudaEventRecord(stopEvent,0));
		  	RUN(cudaEventSynchronize(stopEvent));
		  	RUN(cudaEventElapsedTime(&ms, startEvent, stopEvent));
		}
		else
		{
			if(N%max_x == 0)
			{
				dim3 grid(N/max_x, N/max_x, 1);
				dim3 block(max_x,max_x,1);
        		printf("\nLaunching kernel ");
	    		RUN(cudaEventRecord(startEvent,0));
			  	conv_2D<<<grid,block>>>(d_A, d_B, N);
			  	RUN(cudaEventRecord(stopEvent,0));
			  	RUN(cudaEventSynchronize(stopEvent));
			  	RUN(cudaEventElapsedTime(&ms, startEvent, stopEvent));
			}
			else
			{
				dim3 grid(N/max_x + 1, N/max_x +1, 1);
				dim3 block(max_x,max_x,1);
        		printf("\nLaunching kernel ");
		    	RUN(cudaEventRecord(startEvent,0));
			  	conv_2D<<<grid,block>>>(d_A, d_B, N);
			  	RUN(cudaEventRecord(stopEvent,0));
			  	RUN(cudaEventSynchronize(stopEvent));
			  	RUN(cudaEventElapsedTime(&ms, startEvent, stopEvent));
			}
		}
		
		RUN(cudaGetLastError());
		RUN(cudaMemcpy(h_B, d_B, N*N*sizeof(float), cudaMemcpyDeviceToHost));
		printf("\n Kernel launch complete \n time taken: %.6f ms\n", ms);
		printf("\nPrinting Output:\n");
		for(i=0; i<N; i++)
		{
			for(j=0; j<N; j++)
			{
				printf("%.2f ", h_B[i*N + j]);
			}
			printf("\n");
		}
		printf("\n End of test case: %d\n", k);
		free(h_A);
		free(h_B);
		cudaFree(d_A);
		cudaFree(d_B);
		test_case = test_case -1;
		k = k+1;
		RUN(cudaEventDestroy(startEvent));
		RUN(cudaEventDestroy(stopEvent));
	}
	printf("\n All test cases complete\n");
	return 0;
}
	.file	"tmpxft_0038dd92_00000000-6_Parallel_Convolution.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" Failed with error code %s\n"
	.text
	.globl	_Z3RUN9cudaError
	.type	_Z3RUN9cudaError, @function
_Z3RUN9cudaError:
.LFB2027:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z3RUN9cudaError, .-_Z3RUN9cudaError
	.globl	_Z5valueiiPfi
	.type	_Z5valueiiPfi, @function
_Z5valueiiPfi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z5valueiiPfi, .-_Z5valueiiPfi
	.globl	_Z29__device_stub__Z7conv_2DPfS_iPfS_i
	.type	_Z29__device_stub__Z7conv_2DPfS_iPfS_i, @function
_Z29__device_stub__Z7conv_2DPfS_iPfS_i:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7conv_2DPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L10:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z29__device_stub__Z7conv_2DPfS_iPfS_i, .-_Z29__device_stub__Z7conv_2DPfS_iPfS_i
	.globl	_Z7conv_2DPfS_i
	.type	_Z7conv_2DPfS_i, @function
_Z7conv_2DPfS_i:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z7conv_2DPfS_iPfS_i
	.cfi_endproc
.LFE2055:
	.size	_Z7conv_2DPfS_i, .-_Z7conv_2DPfS_i
	.section	.rodata.str1.1
.LC1:
	.string	"\n Enter the number of test cases:"
.LC2:
	.string	"%d"
.LC3:
	.string	" %d\n"
.LC4:
	.string	"\nRunning test case: %d"
.LC5:
	.string	"\n Enter dimention of Matrix:"
.LC6:
	.string	"\n Enter entries of input matrix:\n"
.LC7:
	.string	"%f"
.LC8:
	.string	"\nLaunching kernel "
.LC9:
	.string	"\n Kernel launch complete \n time taken: %.6f ms\n"
.LC10:
	.string	"\nPrinting Output:\n"
.LC11:
	.string	"%.2f "
.LC12:
	.string	"\n"
.LC13:
	.string	"\n End of test case: %d\n"
.LC14:
	.string	"\n All test cases complete\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	leaq	.LC4(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	$1, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	4(%rsp), %rsi
	leaq	.LC2(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	4(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rsi
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movl	%eax, %edi
	call	_Z3RUN9cudaError
.L16:
	cmpl	$0, 4(%rsp)
	je	.L35
	leaq	16(%rsp), %rdi
	xorl	%r14d, %r14d
	leaq	.LC7(%rip), %r13
	call	cudaEventCreate@PLT
	movl	%eax, %edi
	call	_Z3RUN9cudaError
	leaq	24(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	%eax, %edi
	call	_Z3RUN9cudaError
	movl	%r12d, %edx
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	8(%rsp), %rsi
	leaq	.LC2(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	8(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rsi
	call	__printf_chk@PLT
	movl	8(%rsp), %ebx
	imull	%ebx, %ebx
	movslq	%ebx, %rbx
	salq	$2, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rbx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L17:
	movl	8(%rsp), %esi
	imull	%esi, %esi
	movslq	%esi, %rsi
	cmpq	%r14, %rsi
	jle	.L36
	leaq	0(%rbp,%r14,4), %rsi
	movq	%r13, %rdi
	xorl	%eax, %eax
	incq	%r14
	call	__isoc23_scanf@PLT
	jmp	.L17
.L36:
	salq	$2, %rsi
	leaq	32(%rsp), %rdi
	leaq	12(%rsp), %r13
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z3RUN9cudaError
	movl	8(%rsp), %esi
	leaq	40(%rsp), %rdi
	imull	%esi, %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z3RUN9cudaError
	movl	8(%rsp), %edx
	movq	32(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	imull	%edx, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z3RUN9cudaError
	movl	8(%rsp), %edx
	leaq	.LC8(%rip), %rsi
	cmpl	$32, %edx
	jg	.L19
	movabsq	$4294967297, %rax
	movl	$1, 56(%rsp)
	movq	%rax, 48(%rsp)
	movl	%edx, 60(%rsp)
	movl	%edx, 64(%rsp)
	jmp	.L34
.L19:
	movl	%edx, %eax
	sarl	$5, %eax
	andb	$31, %dl
	je	.L33
	incl	%eax
.L33:
	movl	%eax, 48(%rsp)
	movl	%eax, 52(%rsp)
	movabsq	$137438953504, %rax
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
.L34:
	movl	$2, %edi
	xorl	%eax, %eax
	movl	$1, 68(%rsp)
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%eax, %edi
	call	_Z3RUN9cudaError
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movl	8(%rsp), %edx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z29__device_stub__Z7conv_2DPfS_iPfS_i
.L24:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%eax, %edi
	call	_Z3RUN9cudaError
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movl	%eax, %edi
	call	_Z3RUN9cudaError
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	%r13, %rdi
	xorl	%r13d, %r13d
	call	cudaEventElapsedTime@PLT
	movl	%eax, %edi
	call	_Z3RUN9cudaError
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	_Z3RUN9cudaError
	movl	8(%rsp), %edx
	movq	40(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	imull	%edx, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z3RUN9cudaError
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC10(%rip), %rsi
	call	__printf_chk@PLT
.L25:
	movslq	8(%rsp), %rax
	cmpq	%r13, %rax
	jle	.L37
	xorl	%r14d, %r14d
.L27:
	movslq	8(%rsp), %rax
	cmpq	%r14, %rax
	jle	.L38
	imulq	%r13, %rax
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	addq	%r14, %rax
	incq	%r14
	cvtss2sd	(%rbx,%rax,4), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
	jmp	.L27
.L38:
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r13
	call	__printf_chk@PLT
	jmp	.L25
.L37:
	movl	%r12d, %edx
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	incl	%r12d
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	decl	4(%rsp)
	call	cudaEventDestroy@PLT
	movl	%eax, %edi
	call	_Z3RUN9cudaError
	movq	24(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movl	%eax, %edi
	call	_Z3RUN9cudaError
	jmp	.L16
.L35:
	xorl	%eax, %eax
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC15:
	.string	"_Z7conv_2DPfS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7conv_2DPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* -----------------------------------------------------------------------------------------------
Name: Anand Jhunjhunwala
Roll No: 17EC30041
CUDA
Assignment 1: 2D convolution operation for a 2D Matrix of floating point numbers. 
------------------------------------------------------------------------------------------------*/

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <hip/hip_runtime.h>


__host__ void RUN(hipError_t call)
{
	hipError_t err = call;
	if(err != hipSuccess)
	{
		fprintf(stderr, " Failed with error code %s\n", hipGetErrorString(err));
		exit(EXIT_FAILURE);
	}
}

__device__ float value(int i, int j, float *data, int N)
{
	if(i<0 || i>=N)
	{
		return 0;
	}
	else if(j<0 || j>=N)
	{
		return 0;
	}
	else
	{
		return data[i*N + j];
	}
}

__global__ void conv_2D(float *in, float *out, int N)
{
	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	unsigned int j = blockIdx.y*blockDim.y + threadIdx.y;
	if(i<N && j<N)
	{
		out[i*N + j] = (1.0/9.0)*(value(i-1,j-1,in,N) + value(i-1, j, in, N) + value(i-1, j+1, in, N) + value(i,j-1,in,N) + value(i,j,in,N) + value(i,j+1,in,N) + value(i+1,j-1,in,N) + value(i+1,j,in,N) + value(i+1,j+1,in,N));
	}
}
int main()
{
	hipEvent_t startEvent, stopEvent;
	int max_x = 32; //maximum_thread_per_block 1024
	int test_case, N, k=1;
	long int i,j; 
	float *d_A, *h_A, *d_B, *h_B, ms;
	printf("\n Enter the number of test cases:");
	scanf("%d", &test_case);
	printf(" %d\n", test_case);

	RUN(hipSetDevice(0));
	while(test_case)
	{
		RUN(hipEventCreate(&startEvent));
		RUN(hipEventCreate(&stopEvent));
		printf("\nRunning test case: %d",k);
		printf("\n Enter dimention of Matrix:");
		scanf("%d", &N);
		printf(" %d\n", N);
		h_A = (float *)malloc(N*N*sizeof(float));
    	h_B = (float *)malloc(N*N*sizeof(float));
		printf("\n Enter entries of input matrix:\n");
		for(i=0; i<N*N; i++)
		{
			scanf("%f", &h_A[i]);
		}
		RUN(hipMalloc((void **)&d_A, N*N*sizeof(float)));
		RUN(hipMalloc((void **)&d_B, N*N*sizeof(float)));
		RUN(hipMemcpy(d_A, h_A, N*N*sizeof(float), hipMemcpyHostToDevice));
		if(N <= max_x)
		{
			dim3 grid(1,1,1);
			dim3 block(N, N, 1);
	      	printf("\nLaunching kernel ");
	      	RUN(hipEventRecord(startEvent,0));
		  	conv_2D<<<grid,block>>>(d_A, d_B, N);
		  	RUN(hipEventRecord(stopEvent,0));
		  	RUN(hipEventSynchronize(stopEvent));
		  	RUN(hipEventElapsedTime(&ms, startEvent, stopEvent));
		}
		else
		{
			if(N%max_x == 0)
			{
				dim3 grid(N/max_x, N/max_x, 1);
				dim3 block(max_x,max_x,1);
        		printf("\nLaunching kernel ");
	    		RUN(hipEventRecord(startEvent,0));
			  	conv_2D<<<grid,block>>>(d_A, d_B, N);
			  	RUN(hipEventRecord(stopEvent,0));
			  	RUN(hipEventSynchronize(stopEvent));
			  	RUN(hipEventElapsedTime(&ms, startEvent, stopEvent));
			}
			else
			{
				dim3 grid(N/max_x + 1, N/max_x +1, 1);
				dim3 block(max_x,max_x,1);
        		printf("\nLaunching kernel ");
		    	RUN(hipEventRecord(startEvent,0));
			  	conv_2D<<<grid,block>>>(d_A, d_B, N);
			  	RUN(hipEventRecord(stopEvent,0));
			  	RUN(hipEventSynchronize(stopEvent));
			  	RUN(hipEventElapsedTime(&ms, startEvent, stopEvent));
			}
		}
		
		RUN(hipGetLastError());
		RUN(hipMemcpy(h_B, d_B, N*N*sizeof(float), hipMemcpyDeviceToHost));
		printf("\n Kernel launch complete \n time taken: %.6f ms\n", ms);
		printf("\nPrinting Output:\n");
		for(i=0; i<N; i++)
		{
			for(j=0; j<N; j++)
			{
				printf("%.2f ", h_B[i*N + j]);
			}
			printf("\n");
		}
		printf("\n End of test case: %d\n", k);
		free(h_A);
		free(h_B);
		hipFree(d_A);
		hipFree(d_B);
		test_case = test_case -1;
		k = k+1;
		RUN(hipEventDestroy(startEvent));
		RUN(hipEventDestroy(stopEvent));
	}
	printf("\n All test cases complete\n");
	return 0;
}
	.text
	.file	"Parallel_Convolution.hip"
	.globl	_Z3RUN10hipError_t              # -- Begin function _Z3RUN10hipError_t
	.type	_Z3RUN10hipError_t,@function
_Z3RUN10hipError_t:                     # @_Z3RUN10hipError_t
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB0_2
# %bb.1:
	retq
.LBB0_2:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	stderr(%rip), %rbx
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z3RUN10hipError_t, .Lfunc_end0-_Z3RUN10hipError_t
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__conv_2DPfS_i # -- Begin function _Z22__device_stub__conv_2DPfS_i
	.type	_Z22__device_stub__conv_2DPfS_i,@function
_Z22__device_stub__conv_2DPfS_i:        # @_Z22__device_stub__conv_2DPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7conv_2DPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__conv_2DPfS_i, .Lfunc_end1-_Z22__device_stub__conv_2DPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	52(%rsp), %rbx
	movl	$.L.str.2, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%rbx), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	xorl	%edi, %edi
	callq	hipSetDevice
	movl	%eax, %edi
	callq	_Z3RUN10hipError_t
	cmpl	$0, (%rbx)
	je	.LBB2_21
# %bb.1:                                # %.lr.ph84.preheader
	movl	$1, %ebp
.LBB2_2:                                # %.lr.ph84
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_5 Depth 2
                                        #     Child Loop BB2_16 Depth 2
                                        #       Child Loop BB2_18 Depth 3
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	movl	%eax, %edi
	callq	_Z3RUN10hipError_t
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	%eax, %edi
	callq	_Z3RUN10hipError_t
	movl	$.L.str.4, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.2, %edi
	leaq	4(%rsp), %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	4(%rsp), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	4(%rsp), %ebx
	imull	%ebx, %ebx
	shlq	$2, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r13
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	4(%rsp), %esi
	testl	%esi, %esi
	je	.LBB2_3
# %bb.4:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	%r12, %rbx
	xorl	%r14d, %r14d
.LBB2_5:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.7, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	incq	%r14
	movl	4(%rsp), %esi
	imull	%esi, %esi
	addq	$4, %rbx
	cmpq	%rsi, %r14
	jb	.LBB2_5
	jmp	.LBB2_6
.LBB2_3:                                #   in Loop: Header=BB2_2 Depth=1
	imull	%esi, %esi
.LBB2_6:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	shlq	$2, %rsi
	leaq	40(%rsp), %rdi
	callq	hipMalloc
	movl	%eax, %edi
	callq	_Z3RUN10hipError_t
	movl	4(%rsp), %esi
	imull	%esi, %esi
	shlq	$2, %rsi
	leaq	32(%rsp), %rdi
	callq	hipMalloc
	movl	%eax, %edi
	callq	_Z3RUN10hipError_t
	movq	40(%rsp), %rdi
	movl	4(%rsp), %edx
	imull	%edx, %edx
	shlq	$2, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_Z3RUN10hipError_t
	movl	4(%rsp), %eax
	cmpl	$32, %eax
	jg	.LBB2_8
# %bb.7:                                #   in Loop: Header=BB2_2 Depth=1
	movq	%rax, %rbx
	shlq	$32, %rbx
	orq	%rax, %rbx
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%eax, %edi
	callq	_Z3RUN10hipError_t
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rbx, %rdx
	jmp	.LBB2_12
.LBB2_8:                                #   in Loop: Header=BB2_2 Depth=1
	movl	%eax, %ebx
	shrl	$5, %ebx
	testb	$31, %al
	je	.LBB2_9
# %bb.10:                               #   in Loop: Header=BB2_2 Depth=1
	incl	%ebx
	jmp	.LBB2_11
.LBB2_9:                                #   in Loop: Header=BB2_2 Depth=1
	movl	%ebx, %ebx
.LBB2_11:                               #   in Loop: Header=BB2_2 Depth=1
	movabsq	$4294967297, %rax               # imm = 0x100000001
	imulq	%rax, %rbx
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%eax, %edi
	callq	_Z3RUN10hipError_t
	movq	%rbx, %rdi
	movl	$1, %esi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
.LBB2_12:                               #   in Loop: Header=BB2_2 Depth=1
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_14
# %bb.13:                               #   in Loop: Header=BB2_2 Depth=1
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	4(%rsp), %edx
	callq	_Z22__device_stub__conv_2DPfS_i
.LBB2_14:                               #   in Loop: Header=BB2_2 Depth=1
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%eax, %edi
	callq	_Z3RUN10hipError_t
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movl	%eax, %edi
	callq	_Z3RUN10hipError_t
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	28(%rsp), %rdi
	callq	hipEventElapsedTime
	movl	%eax, %edi
	callq	_Z3RUN10hipError_t
	callq	hipGetLastError
	movl	%eax, %edi
	callq	_Z3RUN10hipError_t
	movq	32(%rsp), %rsi
	movl	4(%rsp), %edx
	imull	%edx, %edx
	shlq	$2, %rdx
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_Z3RUN10hipError_t
	cvtss2sd	28(%rsp), %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	4(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB2_20
# %bb.15:                               # %.preheader.preheader
                                        #   in Loop: Header=BB2_2 Depth=1
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB2_16:                               # %.preheader
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_18 Depth 3
	testl	%eax, %eax
	jle	.LBB2_19
# %bb.17:                               # %.lr.ph71.preheader
                                        #   in Loop: Header=BB2_16 Depth=2
	movl	%eax, %eax
	xorl	%r15d, %r15d
.LBB2_18:                               # %.lr.ph71
                                        #   Parent Loop BB2_2 Depth=1
                                        #     Parent Loop BB2_16 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	imulq	%rbx, %rax
	addq	%r13, %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r15,4), %xmm0
	movl	$.L.str.11, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	movslq	4(%rsp), %rax
	cmpq	%rax, %r15
	jl	.LBB2_18
.LBB2_19:                               # %._crit_edge72
                                        #   in Loop: Header=BB2_16 Depth=2
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	movslq	4(%rsp), %rax
	addq	$4, %rbx
	cmpq	%rax, %r14
	jl	.LBB2_16
.LBB2_20:                               # %._crit_edge74
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	$.L.str.13, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movq	%r12, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	decl	52(%rsp)
	incl	%ebp
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movl	%eax, %edi
	callq	_Z3RUN10hipError_t
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movl	%eax, %edi
	callq	_Z3RUN10hipError_t
	cmpl	$0, 52(%rsp)
	jne	.LBB2_2
.LBB2_21:                               # %._crit_edge85
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7conv_2DPfS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" Failed with error code %s\n"
	.size	.L.str, 28

	.type	_Z7conv_2DPfS_i,@object         # @_Z7conv_2DPfS_i
	.section	.rodata,"a",@progbits
	.globl	_Z7conv_2DPfS_i
	.p2align	3, 0x0
_Z7conv_2DPfS_i:
	.quad	_Z22__device_stub__conv_2DPfS_i
	.size	_Z7conv_2DPfS_i, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"\n Enter the number of test cases:"
	.size	.L.str.1, 34

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%d"
	.size	.L.str.2, 3

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" %d\n"
	.size	.L.str.3, 5

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\nRunning test case: %d"
	.size	.L.str.4, 23

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\n Enter dimention of Matrix:"
	.size	.L.str.5, 29

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%f"
	.size	.L.str.7, 3

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"\nLaunching kernel "
	.size	.L.str.8, 19

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"\n Kernel launch complete \n time taken: %.6f ms\n"
	.size	.L.str.9, 48

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"%.2f "
	.size	.L.str.11, 6

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"\n End of test case: %d\n"
	.size	.L.str.13, 24

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7conv_2DPfS_i"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n All test cases complete"
	.size	.Lstr, 26

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\n Enter entries of input matrix:"
	.size	.Lstr.1, 33

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\nPrinting Output:"
	.size	.Lstr.2, 18

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__conv_2DPfS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7conv_2DPfS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7conv_2DPfS_i         ; -- Begin function _Z7conv_2DPfS_i
	.globl	_Z7conv_2DPfS_i
	.p2align	8
	.type	_Z7conv_2DPfS_i,@function
_Z7conv_2DPfS_i:                        ; @_Z7conv_2DPfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x24
	s_load_b32 s2, s[0:1], 0x10
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_u32_e32 v2, v0, v1
	v_cmpx_gt_u32_e64 s2, v2
	s_cbranch_execz .LBB0_38
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_dual_mov_b32 v5, 0 :: v_dual_add_nc_u32 v8, -1, v0
	v_add_nc_u32_e32 v2, -1, v1
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v8
	v_cmp_gt_i32_e64 s0, s2, v8
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB0_5
; %bb.2:
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	v_cmp_gt_i32_e64 s0, s2, v2
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, vcc_lo, s0
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_mad_u64_u32 v[5:6], null, v8, s2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b32 v5, v[5:6], off
.LBB0_4:                                ; %Flow112
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_5:                                ; %_Z5valueiiPfi.exit
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB0_9
; %bb.6:
	v_cmp_lt_i32_e32 vcc_lo, -1, v1
	v_cmp_gt_i32_e64 s0, s2, v1
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, vcc_lo, s0
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB0_8
; %bb.7:
	v_mad_u64_u32 v[3:4], null, v8, s2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v4, v[3:4], off
.LBB0_8:                                ; %Flow111
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_9:                                ; %_Z5valueiiPfi.exit53
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v6, 0 :: v_dual_add_nc_u32 v3, 1, v1
	v_mov_b32_e32 v7, 0
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB0_13
; %bb.10:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e32 vcc_lo, -1, v3
	v_cmp_gt_i32_e64 s0, s2, v3
	v_mov_b32_e32 v7, 0
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_12
; %bb.11:
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, v8, s2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[7:8], 2, v[9:10]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
.LBB0_12:                               ; %Flow110
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_13:                               ; %_Z5valueiiPfi.exit59
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_lt_i32_e32 vcc_lo, -1, v0
	v_cmp_gt_i32_e64 s0, s2, v0
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB0_17
; %bb.14:
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	v_cmp_gt_i32_e64 s0, s2, v2
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, vcc_lo, s0
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB0_16
; %bb.15:
	v_mad_u64_u32 v[8:9], null, v0, s2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v6, v[8:9], off
.LBB0_16:                               ; %Flow109
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_17:                               ; %_Z5valueiiPfi.exit65
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, 0
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB0_21
; %bb.18:
	v_cmp_lt_i32_e32 vcc_lo, -1, v1
	v_cmp_gt_i32_e64 s0, s2, v1
	v_mov_b32_e32 v9, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, vcc_lo, s0
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB0_20
; %bb.19:
	v_mad_u64_u32 v[9:10], null, v0, s2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s4, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	global_load_b32 v9, v[9:10], off
.LBB0_20:                               ; %Flow108
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_21:                               ; %_Z5valueiiPfi.exit71
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB0_25
; %bb.22:
	v_cmp_lt_i32_e32 vcc_lo, -1, v3
	v_cmp_gt_i32_e64 s0, s2, v3
	v_mov_b32_e32 v8, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s0
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_24
; %bb.23:
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[10:11], null, v0, s2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	global_load_b32 v8, v[10:11], off
.LBB0_24:                               ; %Flow107
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_25:                               ; %_Z5valueiiPfi.exit77
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v11, 0 :: v_dual_add_nc_u32 v12, 1, v0
	v_mov_b32_e32 v10, 0
	v_cmp_lt_i32_e32 vcc_lo, -1, v12
	v_cmp_gt_i32_e64 s0, s2, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s0
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB0_29
; %bb.26:
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	v_cmp_gt_i32_e64 s0, s2, v2
	v_mov_b32_e32 v11, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, vcc_lo, s0
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB0_28
; %bb.27:
	v_mad_u64_u32 v[13:14], null, v12, s2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v14, 31, v13
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, s4, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
	global_load_b32 v11, v[13:14], off
.LBB0_28:                               ; %Flow106
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_29:                               ; %_Z5valueiiPfi.exit83
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB0_33
; %bb.30:
	v_cmp_lt_i32_e32 vcc_lo, -1, v1
	v_cmp_gt_i32_e64 s0, s2, v1
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, vcc_lo, s0
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB0_32
; %bb.31:
	v_mad_u64_u32 v[13:14], null, v12, s2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v14, 31, v13
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, s4, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
	global_load_b32 v10, v[13:14], off
.LBB0_32:                               ; %Flow105
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_33:                               ; %_Z5valueiiPfi.exit89
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v13, 0
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB0_37
; %bb.34:
	v_cmp_lt_i32_e32 vcc_lo, -1, v3
	v_cmp_gt_i32_e64 s0, s2, v3
	v_mov_b32_e32 v13, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s0
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_36
; %bb.35:
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[13:14], null, v12, s2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v14, 31, v13
	v_lshlrev_b64 v[12:13], 2, v[13:14]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, s4, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
	global_load_b32 v13, v[12:13], off
.LBB0_36:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_37:                               ; %_Z5valueiiPfi.exit95
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v3, v5, v4
	s_mov_b32 s0, 0x1c71c71c
	s_mov_b32 s1, 0x3fbc71c7
	v_add_f32_e32 v3, v3, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v6
	v_add_f32_e32 v3, v3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v8
	v_add_f32_e32 v3, v3, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v10
	v_add_f32_e32 v3, v3, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[3:4], v3
	v_mul_f64 v[3:4], v[3:4], s[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v5, v[3:4]
	v_mad_u64_u32 v[3:4], null, v0, s2, v[1:2]
	v_mov_b32_e32 v4, v2
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v5, off
.LBB0_38:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7conv_2DPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7conv_2DPfS_i, .Lfunc_end0-_Z7conv_2DPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1324
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7conv_2DPfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7conv_2DPfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
