#include "includes.h"
__global__ void histDupeKernel(const float* data1, const float* data2, const float* confidence1, const float* confidence2, int* ids1, int* ids2, int* results_id1, int* results_id2, float* results_similarity, int* result_count, const int N1, const int N2, const int max_results) {

const unsigned int thread = threadIdx.x; // Thread index within block
const unsigned int block = blockIdx.x; // Block index
const unsigned int block_size = blockDim.x; // Size of each block

const unsigned int block_start = block_size * block; // Index of the start of the block
const unsigned int index = block_start + thread; // Index of this thread

//__shared__ float conf[64]; // Shared array of confidence values for all histograms owned by this block
//conf[thread] = confidence1[index]; // Coalesced read of confidence values
float conf = confidence1[index];
int id = ids1[index];

__shared__ float hists[128 * 64]; // Shared array of all histograms owned by this block
for (unsigned int i = 0; i < 64; i++) {
hists[i * 128 + thread] = data1[(block_start + i) * 128 + thread]; // Coalesced read of first half of histogram
hists[i * 128 + thread + 64] = data1[(block_start + i) * 128 + 64 + thread]; // Coalesced read of second half of histogram
}

__shared__ float other[128]; // Histogram to compare all owned histograms against parallely
for (unsigned int i = 0; i < N2 && *result_count < max_results; i++) {

other[thread] = data2[i * 128 + thread]; // Coalesced read of first half of other histogram
other[thread + 64] = data2[i * 128 + thread + 64]; // Second half

__syncthreads(); // Ensure all values read

if (index < N1) {
float d = 0;
for (unsigned int k = 0; k < 128; k++) { // Compute sum of distances between thread-owned histogram and shared histogram
d += fabsf(hists[thread * 128 + k] - other[k]);
}
d = 1 - (d / 8); // Massage the difference into a nice % similarity number, between 0 and 1

int other_id = ids2[i];

if (other_id != id && d > fmaxf(conf, confidence2[i])) { // Don't compare against self, only compare using highest confidence
int result_index = atomicAdd(result_count, 1); // Increment result count by one atomically (returns value before increment)
if (result_index < max_results) {
// Store resulting pair
results_similarity[result_index] = d;
results_id1[result_index] = id;
results_id2[result_index] = other_id;
}
}
}

__syncthreads(); // Ensure all threads have finished before looping and reading new shared histogram
}

}
	.file	"tmpxft_002e7e51_00000000-6_histDupeKernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z63__device_stub__Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iiiPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
	.type	_Z63__device_stub__Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iiiPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii, @function
_Z63__device_stub__Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iiiPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$264, %rsp
	.cfi_def_cfa_offset 272
	movq	272(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	108(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	280(%rsp), %rax
	movq	%rdx, 56(%rsp)
	leaq	80(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	288(%rsp), %rax
	movq	%rcx, 48(%rsp)
	leaq	88(%rsp), %rcx
	movq	%rax, 8(%rsp)
	movq	296(%rsp), %rax
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 248(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 208(%rsp)
	movq	%rsp, %rax
	movq	%rax, 216(%rsp)
	leaq	304(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	312(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	320(%rsp), %rax
	movq	%rax, 240(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movl	$1, 104(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	88(%rsp)
	.cfi_def_cfa_offset 280
	leaq	_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 288
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	160(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 280
	popq	%rdx
	.cfi_def_cfa_offset 272
.L2:
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$264, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z63__device_stub__Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iiiPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii, .-_Z63__device_stub__Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iiiPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
	.globl	_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
	.type	_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii, @function
_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z63__device_stub__Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iiiPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
	.cfi_endproc
.LFE2033:
	.size	_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii, .-_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void histDupeKernel(const float* data1, const float* data2, const float* confidence1, const float* confidence2, int* ids1, int* ids2, int* results_id1, int* results_id2, float* results_similarity, int* result_count, const int N1, const int N2, const int max_results) {

const unsigned int thread = threadIdx.x; // Thread index within block
const unsigned int block = blockIdx.x; // Block index
const unsigned int block_size = blockDim.x; // Size of each block

const unsigned int block_start = block_size * block; // Index of the start of the block
const unsigned int index = block_start + thread; // Index of this thread

//__shared__ float conf[64]; // Shared array of confidence values for all histograms owned by this block
//conf[thread] = confidence1[index]; // Coalesced read of confidence values
float conf = confidence1[index];
int id = ids1[index];

__shared__ float hists[128 * 64]; // Shared array of all histograms owned by this block
for (unsigned int i = 0; i < 64; i++) {
hists[i * 128 + thread] = data1[(block_start + i) * 128 + thread]; // Coalesced read of first half of histogram
hists[i * 128 + thread + 64] = data1[(block_start + i) * 128 + 64 + thread]; // Coalesced read of second half of histogram
}

__shared__ float other[128]; // Histogram to compare all owned histograms against parallely
for (unsigned int i = 0; i < N2 && *result_count < max_results; i++) {

other[thread] = data2[i * 128 + thread]; // Coalesced read of first half of other histogram
other[thread + 64] = data2[i * 128 + thread + 64]; // Second half

__syncthreads(); // Ensure all values read

if (index < N1) {
float d = 0;
for (unsigned int k = 0; k < 128; k++) { // Compute sum of distances between thread-owned histogram and shared histogram
d += fabsf(hists[thread * 128 + k] - other[k]);
}
d = 1 - (d / 8); // Massage the difference into a nice % similarity number, between 0 and 1

int other_id = ids2[i];

if (other_id != id && d > fmaxf(conf, confidence2[i])) { // Don't compare against self, only compare using highest confidence
int result_index = atomicAdd(result_count, 1); // Increment result count by one atomically (returns value before increment)
if (result_index < max_results) {
// Store resulting pair
results_similarity[result_index] = d;
results_id1[result_index] = id;
results_id2[result_index] = other_id;
}
}
}

__syncthreads(); // Ensure all threads have finished before looping and reading new shared histogram
}

}
	.text
	.file	"histDupeKernel.hip"
	.globl	_Z29__device_stub__histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii # -- Begin function _Z29__device_stub__histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
	.type	_Z29__device_stub__histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii,@function
_Z29__device_stub__histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii: # @_Z29__device_stub__histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii, .Lfunc_end0-_Z29__device_stub__histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii,@object # @_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
	.section	.rodata,"a",@progbits
	.globl	_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
	.p2align	3, 0x0
_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii:
	.quad	_Z29__device_stub__histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
	.size	_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii"
	.size	.L__unnamed_1, 50

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii ; -- Begin function _Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
	.globl	_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
	.p2align	8
	.type	_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii,@function
_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii: ; @_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x6c
	s_load_b512 s[16:31], s[0:1], 0x0
	v_mov_b32_e32 v3, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, v3 :: v_dual_add_nc_u32 v1, s15, v0
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_lshl_add_u32 v2, s15, 7, v0
	v_add_co_u32 v6, vcc_lo, s20, v4
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, s21, v5, vcc_lo
	v_add_co_u32 v8, vcc_lo, s24, v4
	v_add_co_ci_u32_e32 v9, vcc_lo, s25, v5, vcc_lo
	global_load_b32 v4, v[6:7], off
	global_load_b32 v5, v[8:9], off
	v_lshlrev_b32_e32 v6, 2, v0
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v8, v3 :: v_dual_add_nc_u32 v7, 64, v2
	v_lshlrev_b64 v[9:10], 2, v[2:3]
	v_add_nc_u32_e32 v2, 0x80, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v9, vcc_lo, s16, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, s17, v10, vcc_lo
	v_add_co_u32 v7, vcc_lo, s16, v7
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v8, vcc_lo, s17, v8, vcc_lo
	s_clause 0x1
	global_load_b32 v9, v[9:10], off
	global_load_b32 v7, v[7:8], off
	v_add_nc_u32_e32 v8, s2, v6
	s_addk_i32 s2, 0x200
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_u32 s2, 0x8000
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v8, v9, v7 offset1:1
	s_cbranch_scc0 .LBB0_1
; %bb.2:                                ; %.preheader81
	s_load_b128 s[4:7], s[0:1], 0x50
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_16
; %bb.3:                                ; %.lr.ph
	s_load_b128 s[8:11], s[0:1], 0x40
	v_lshl_or_b32 v6, v0, 2, 0x8000
	v_cmp_gt_u32_e64 s0, s4, v1
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v7, 9, v0
	v_max_f32_e32 v8, v4, v4
	s_mov_b32 s2, s3
.LBB0_4:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_7 Depth 2
	s_waitcnt lgkmcnt(0)
	global_load_b32 v1, v2, s[10:11]
	s_mov_b32 s1, -1
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s6, v1
	s_cbranch_vccz .LBB0_15
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	v_lshl_add_u32 v1, s2, 7, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_nc_u32_e32 v1, 64, v1
	v_lshlrev_b64 v[9:10], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s18, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s19, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s18, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s19, v10, vcc_lo
	s_clause 0x1
	global_load_b32 v1, v[3:4], off
	global_load_b32 v3, v[9:10], off
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v6, v1, v3 offset1:1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_14
; %bb.6:                                ; %.preheader.preheader
                                        ;   in Loop: Header=BB0_4 Depth=1
	v_mov_b32_e32 v3, 0
	s_mov_b32 s4, 0
.LBB0_7:                                ; %.preheader
                                        ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v4, s4 :: v_dual_add_nc_u32 v1, s4, v7
	s_add_i32 s4, s4, 4
	ds_load_b32 v1, v1
	ds_load_b32 v4, v4 offset:32768
	s_cmpk_eq_i32 s4, 0x200
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e64 v3, v3, |v1|
	s_cbranch_scc0 .LBB0_7
; %bb.8:                                ;   in Loop: Header=BB0_4 Depth=1
	s_lshl_b64 s[12:13], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s14, s26, s12
	s_addc_u32 s15, s27, s13
	global_load_b32 v1, v2, s[14:15]
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v1, v5
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_14
; %bb.9:                                ;   in Loop: Header=BB0_4 Depth=1
	s_add_u32 s12, s22, s12
	s_addc_u32 s13, s23, s13
	v_fma_f32 v9, 0xbe000000, v3, 1.0
	global_load_b32 v4, v2, s[12:13]
	s_waitcnt vmcnt(0)
	v_max_f32_e32 v4, v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_f32_e32 v3, v8, v4
	v_cmp_gt_f32_e32 vcc_lo, v9, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_14
; %bb.10:                               ;   in Loop: Header=BB0_4 Depth=1
	s_mov_b32 s7, exec_lo
	s_mov_b32 s4, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
                                        ; implicit-def: $vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_4 Depth=1
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	global_atomic_add_u32 v4, v2, v4, s[10:11] glc
.LBB0_12:                               ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, s4, v3
	v_cmp_gt_i32_e32 vcc_lo, s6, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_4 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v10, vcc_lo, s28, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s29, v4, vcc_lo
	v_add_co_u32 v12, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s30, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s31, v4, vcc_lo
	global_store_b32 v[12:13], v9, off
	global_store_b32 v[10:11], v5, off
	global_store_b32 v[3:4], v1, off
.LBB0_14:                               ; %Flow140
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s2, s2, 1
	s_waitcnt_vscnt null, 0x0
	s_cmp_eq_u32 s2, s5
	s_barrier
	s_cselect_b32 s1, -1, 0
	buffer_gl0_inv
.LBB0_15:                               ; %Flow141
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_4
.LBB0_16:                               ; %.critedge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
		.amdhsa_group_segment_fixed_size 33280
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 352
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii, .Lfunc_end0-_Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 832
; NumSgprs: 34
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 33280 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .offset:         80
        .size:           4
        .value_kind:     by_value
      - .offset:         84
        .size:           4
        .value_kind:     by_value
      - .offset:         88
        .size:           4
        .value_kind:     by_value
      - .offset:         96
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         100
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         104
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         108
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         110
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         112
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         114
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         116
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         118
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         160
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 33280
    .kernarg_segment_align: 8
    .kernarg_segment_size: 352
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     34
    .sgpr_spill_count: 0
    .symbol:         _Z14histDupeKernelPKfS0_S0_S0_PiS1_S1_S1_PfS1_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
