#include <stdio.h>

__global__ void compute_primitive_vars_kernel (double *vx, double *vy, double *vz, double *u, int nelt, int nxyz,int ntot,int irpu, int irpv, int irpw, int iret, int irg, int toteq,int if3d,double *scr, double* energy, double *vtrans, int irho, double *phig, int lx1, int ly1, int lz1, int *lglel, double *xm1, double *ym1, double *zm1, double *t,int ldimt, int npscal, double *pr, double p0th, double *sii, double *siii, double *vdiff, int ifield,char *cb, int icv, int icp, double *csound, int imu,int ilam, double cpgref, double cvgref, double gmaref, double rgasref,  int ltot,int lxy){    
	int id = blockIdx.x*blockDim.x+threadIdx.x;
	if(id<nelt*nxyz){


		int e = id/nxyz;
		int i = id%nxyz;
		int e_offset = toteq*nxyz;
		double c = u[e*e_offset+(irg-1)*nxyz+i];
		vx[id] = u[e*e_offset+(irpu-1)*nxyz+i]/c;//invcol3
		vy[id] = u[e*e_offset+(irpv-1)*nxyz+i]/c;
		vz[id] = u[e*e_offset+(irpw-1)*nxyz+i]/c;

		if(if3d){
			//Compute a Cartesian vector dot product. 3-d version  vdot3
			scr[id] = u[e*e_offset+(irpu-1)*nxyz+i]*u[e*e_offset+(irpu-1)*nxyz+i]+u[e*e_offset+(irpv-1)*nxyz+i]*u[e*e_offset+(irpv-1)*nxyz+i]+u[e*e_offset+(irpw-1)*nxyz+i]*u[e*e_offset+(irpw-1)*nxyz+i];

		}
		else{
			// compute vector dot product 2d version vdot2
			scr[id] = u[e*e_offset+(irpu-1)*nxyz+i]*u[e*e_offset+(irpu-1)*nxyz+i]+u[e*e_offset+(irpv-1)*nxyz+i]*u[e*e_offset+(irpv-1)*nxyz+i];


		}
  
                scr[id] = scr[id]/c; //invcol2
                scr[id] = scr[id] * 0.5; //cmult
	
		energy[id] =  u[e*e_offset+(iret-1)*nxyz+i] -scr[id];// sub3	
		energy[id] = energy[id]/c;// invcol2
		
		vtrans[(irho-1)*ltot+id ] = c / phig[id];  //invcol3

                // subroutine tdstate

		int eg= lglel[e]; // this never uses.  Check with Dr.Tania
		int k =  (id / (lx1*ly1))%lz1;
		int j =  (id/lx1)%ly1;
		int newi = id % lx1;

		double x = xm1[e*nxyz+k*lxy+j*lx1+newi];
		double y = ym1[e*nxyz+k*lxy+j*lx1+newi];
		double z = zm1[e*nxyz+k*lxy+j*lx1+newi];
		double r = x*x+y*y;
		double theta=0.0;
		if (r>0.0){ r = sqrtf(r);}
		if ( x != 0.0 || y!= 0.0){theta = atan2(y,x);	}
		double ux= vx[e*nxyz+k*lxy+j*lx1+newi];
		double uy= vy[e*nxyz+k*lxy+j*lx1+newi];
		double uz= vz[e*nxyz+k*lxy+j*lx1+newi];
		double temp = t [ e*nxyz+k*lxy+j*lx1+newi ];
		int ips;
		double ps[10]; // ps is size of ldimt which is 3. Not sure npscal is also 3. Need to check with Dr.Tania
		for (ips=0;ips<npscal;ips++){
			ps[ips]=t[(ips+1)*ltot+e*nxyz+k*lxy+j*lx1+newi ]; // 5 th dimension of t is idlmt which is 3. Not sure how the  nekasgn access ips+1. Need to check with Dr.Tania
		}
		double pa = pr [e*nxyz+k*lxy+j*lx1+newi];
		double p0= p0th;
		double si2 =  sii[e*nxyz+k*lxy+j*lx1+newi];
		double si3 =  siii[e*nxyz+k*lxy+j*lx1+newi];
		double udiff =  vdiff[(ifield-1)*ltot+e*nxyz+k*lxy+j*lx1+newi];
		double utrans =  vtrans[(ifield-1)*ltot+e*nxyz+k*lxy+j*lx1+newi];
		char cbu1 = cb[0];
		char cbu2 = cb[1];
		char cbu3 = cb[2];
		
		// subroutine cmtasgn
		int eqnum;
		double varsic[10];
		for (eqnum=0;eqnum<toteq;eqnum++){
			varsic[eqnum] = u[e*e_offset+eqnum*nxyz+k*lxy+j*lx1+newi];

		}
		double phi = phig[e*nxyz+k*lxy+j*lx1+newi];
		double rho = vtrans[(irho-1)*ltot +e*nxyz+k*lxy+j*lx1+newi];
		double pres = pr[e*nxyz+k*lxy+j*lx1+newi];
		double cv=0.0,cp=0.0;
		if(rho!=0){
			cv=vtrans[(icv-1)*ltot +e*nxyz+k*lxy+j*lx1+newi]/rho;
			cp=vtrans[(icp-1)*ltot +e*nxyz+k*lxy+j*lx1+newi]/rho;
		}
		double asnd = csound [e*nxyz+k*lxy+j*lx1+newi];
		double mu = vdiff[(imu-1)*ltot+e*nxyz+k*lxy+j*lx1+newi];
		udiff = vdiff[(imu-1)*ltot+e*nxyz+k*lxy+j*lx1+newi];// this overrides the udiff in nekasgn (line 63 in this function). Need to check withDr.Tania
		double lambda = vdiff[(ilam-1)*ltot+e*nxyz+k*lxy+j*lx1+newi];
	
		double e_internal = energy[e*nxyz+k*lxy+j*lx1+newi];
		//subroutine cmt_userEOS
		cp=cpgref;
      		cv=cvgref;
      		temp=e_internal/cv; // overrides
		// function MixtPerf_C_GRT
      		asnd=sqrtf(gmaref*rgasref*temp);  //overrides
		// function MixtPerf_P_DRT
      		pres=rho*rgasref*temp;//overrides
		
		vtrans[(icp-1)*ltot +e*nxyz+k*lxy+j*lx1+newi]=cp*rho;
		vtrans[(icv-1)*ltot +e*nxyz+k*lxy+j*lx1+newi]=cv*rho;
		t [ e*nxyz+k*lxy+j*lx1+newi ]= temp;
		csound [e*nxyz+k*lxy+j*lx1+newi]=asnd;
		
	}
}

extern "C" void compute_primitive_vars_gpu_wrapper_(int *glbblockSize1,double *d_vx, double *d_vy, double *d_vz, double *d_u, int *nxyz, int *ntot, int *nelt,int *irpu, int *irpv, int *irpw, int* iret,  int *irg, int *toteq, int *if3d, double *d_vtrans, int *irho, double *d_phig, int *lx1, int *ly1, int *lz1, int *d_lglel, double *d_xm1, double *d_ym1, double *d_zm1, double *d_t,int *ldimt, int *npscal, double *d_pr, double *p0th, double *d_sii, double *d_siii, double *d_vdiff, int *ifield,char *d_cb, int *icv, int *icp, double *d_csound, int *imu,int *ilam, double *cpgref, double *cvgref, double *gmaref, double *rgasref, int *ltot){

 cudaError_t code1 = cudaPeekAtLastError();

printf("CUDA: Start compute_primitive_vars_gpu_wrapper cuda status: %s\n",cudaGetErrorString(code1));

printf("CUDA: Start compute_primitive_vars_gpu_wrapper values nxyz = %d,ntot = %d,nelt = %d,irpu = %d,irpv = %d,irpw = %d,iret = %d,irg=%d ,toteq = %d,if3d = %d,irho = %d,lx1 = %d,ly1 = %d,lz1 = %d,ldimt = %d,npscal = %d,p0th = %lf,ifield = %d,icv = %d,icp = %d,imu = %d,ilam = %d,cpgref = %lf,cvgref = %lf,gmaref = %lf,rgasref = %lf,ltot = %d,  \n", nxyz[0],ntot[0],nelt[0],irpu[0],irpv[0],irpw[0],iret[0],irg[0],toteq[0],if3d[0],irho[0],lx1[0],ly1[0],lz1[0],ldimt[0],npscal[0],p0th[0],ifield[0],icv[0],icp[0],imu[0],ilam[0],cpgref[0],cvgref[0],gmaref[0],rgasref[0],ltot[0]);

	double *d_scr;  // I think this is a tempory variable. need to check with Dr.Tania. adeesha
	double *d_energy;
	cudaMalloc((void**)&d_scr,ntot[0] *  sizeof(double));
	cudaMalloc((void**)&d_energy,ntot[0] *  sizeof(double));

	int lxy=lx1[0]*ly1[0];
	int blockSize =glbblockSize1[0], gridSize;
	gridSize = (int)ceil((float)nelt[0]*nxyz[0]/blockSize);
	compute_primitive_vars_kernel<<<gridSize, blockSize>>>(d_vx, d_vy, d_vz, d_u, nelt[0], nxyz[0],ntot[0],  irpu[0], irpv[0], irpw[0], iret[0],irg[0],toteq[0],if3d[0],d_scr,d_energy,d_vtrans, irho[0],d_phig ,lx1[0], ly1[0],lz1[0], d_lglel, d_xm1, d_ym1,d_zm1, d_t,ldimt[0], npscal[0], d_pr,p0th[0], d_sii,d_siii,d_vdiff, ifield[0],d_cb, icv[0], icp[0],d_csound,imu[0],ilam[0],  cpgref[0], cvgref[0], gmaref[0], rgasref[0],ltot[0],lxy);


        cudaFree(d_scr);
	cudaFree(d_energy);
cudaError_t code2 = cudaPeekAtLastError();

printf("CUDA: End compute_primitive_vars_gpu_wrapper cuda status: %s\n",cudaGetErrorString(code2));



}

	.file	"tmpxft_00367649_00000000-6_driver3_cmt_cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z113__device_stub__Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddiiPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	.type	_Z113__device_stub__Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddiiPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii, @function
_Z113__device_stub__Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddiiPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$664, %rsp
	.cfi_def_cfa_offset 672
	movq	736(%rsp), %rax
	movq	%rdi, 200(%rsp)
	leaq	224(%rsp), %rdi
	movq	%rsi, 192(%rsp)
	leaq	236(%rsp), %rsi
	movq	%rax, 160(%rsp)
	movq	744(%rsp), %rax
	movq	%rdx, 184(%rsp)
	leaq	208(%rsp), %rdx
	movq	%rax, 152(%rsp)
	movq	752(%rsp), %rax
	movq	%rcx, 176(%rsp)
	leaq	216(%rsp), %rcx
	movq	%rax, 144(%rsp)
	movq	768(%rsp), %rax
	movl	%r8d, 172(%rsp)
	movq	%rax, 136(%rsp)
	movq	800(%rsp), %rax
	movl	%r9d, 168(%rsp)
	movq	%rax, 128(%rsp)
	movq	808(%rsp), %rax
	movsd	%xmm0, 80(%rsp)
	movq	%rax, 120(%rsp)
	movq	816(%rsp), %rax
	movsd	%xmm1, 32(%rsp)
	movq	%rax, 112(%rsp)
	movq	824(%rsp), %rax
	movsd	%xmm2, 24(%rsp)
	movq	%rax, 104(%rsp)
	movq	832(%rsp), %rax
	movsd	%xmm3, 16(%rsp)
	movq	%rax, 96(%rsp)
	movq	856(%rsp), %rax
	movsd	%xmm4, 8(%rsp)
	movq	%rax, 88(%rsp)
	movq	864(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	872(%rsp), %rax
	movq	%rax, 64(%rsp)
	movq	880(%rsp), %rax
	movq	%rax, 56(%rsp)
	movq	896(%rsp), %rax
	movq	%rax, 48(%rsp)
	movq	920(%rsp), %rax
	movq	%rax, 40(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 648(%rsp)
	xorl	%eax, %eax
	leaq	200(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	172(%rsp), %rax
	movq	%rax, 304(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 312(%rsp)
	leaq	672(%rsp), %rax
	movq	%rax, 320(%rsp)
	leaq	680(%rsp), %rax
	movq	%rax, 328(%rsp)
	leaq	688(%rsp), %rax
	movq	%rax, 336(%rsp)
	leaq	696(%rsp), %rax
	movq	%rax, 344(%rsp)
	leaq	704(%rsp), %rax
	movq	%rax, 352(%rsp)
	leaq	712(%rsp), %rax
	movq	%rax, 360(%rsp)
	leaq	720(%rsp), %rax
	movq	%rax, 368(%rsp)
	leaq	728(%rsp), %rax
	movq	%rax, 376(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 384(%rsp)
	leaq	152(%rsp), %rax
	movq	%rax, 392(%rsp)
	leaq	144(%rsp), %rax
	movq	%rax, 400(%rsp)
	leaq	760(%rsp), %rax
	movq	%rax, 408(%rsp)
	leaq	136(%rsp), %rax
	movq	%rax, 416(%rsp)
	leaq	776(%rsp), %rax
	movq	%rax, 424(%rsp)
	leaq	784(%rsp), %rax
	movq	%rax, 432(%rsp)
	leaq	792(%rsp), %rax
	movq	%rax, 440(%rsp)
	leaq	128(%rsp), %rax
	movq	%rax, 448(%rsp)
	leaq	120(%rsp), %rax
	movq	%rax, 456(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 464(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 472(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 480(%rsp)
	leaq	840(%rsp), %rax
	movq	%rax, 488(%rsp)
	leaq	848(%rsp), %rax
	movq	%rax, 496(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 504(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 512(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 520(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 528(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 536(%rsp)
	leaq	888(%rsp), %rax
	movq	%rax, 544(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 552(%rsp)
	leaq	904(%rsp), %rax
	movq	%rax, 560(%rsp)
	leaq	912(%rsp), %rax
	movq	%rax, 568(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 576(%rsp)
	leaq	928(%rsp), %rax
	movq	%rax, 584(%rsp)
	leaq	936(%rsp), %rax
	movq	%rax, 592(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 600(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 608(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 616(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 624(%rsp)
	leaq	944(%rsp), %rax
	movq	%rax, 632(%rsp)
	leaq	952(%rsp), %rax
	movq	%rax, 640(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 224(%rsp)
	movl	$1, 232(%rsp)
	movq	%rax, 236(%rsp)
	movl	$1, 244(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	216(%rsp)
	.cfi_def_cfa_offset 680
	leaq	_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii(%rip), %rdi
	pushq	216(%rsp)
	.cfi_def_cfa_offset 688
	movq	252(%rsp), %rcx
	movl	260(%rsp), %r8d
	movq	240(%rsp), %rsi
	movl	248(%rsp), %edx
	leaq	288(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 680
	popq	%rdx
	.cfi_def_cfa_offset 672
.L2:
	movq	648(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$664, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z113__device_stub__Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddiiPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii, .-_Z113__device_stub__Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddiiPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	.globl	_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	.type	_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii, @function
_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z113__device_stub__Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddiiPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	.cfi_endproc
.LFE2053:
	.size	_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii, .-_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA: Start compute_primitive_vars_gpu_wrapper cuda status: %s\n"
.LC1:
	.ascii	"CUDA: Start compute_primitive_vars_gpu_wrapper values nxyz ="
	.ascii	" %d,ntot = %d,nelt = %d"
	.string	",irpu = %d,irpv = %d,irpw = %d,iret = %d,irg=%d ,toteq = %d,if3d = %d,irho = %d,lx1 = %d,ly1 = %d,lz1 = %d,ldimt = %d,npscal = %d,p0th = %lf,ifield = %d,icv = %d,icp = %d,imu = %d,ilam = %d,cpgref = %lf,cvgref = %lf,gmaref = %lf,rgasref = %lf,ltot = %d,  \n"
.LC2:
	.string	"CUDA: End compute_primitive_vars_gpu_wrapper cuda status: %s\n"
	.text
	.globl	compute_primitive_vars_gpu_wrapper_
	.type	compute_primitive_vars_gpu_wrapper_, @function
compute_primitive_vars_gpu_wrapper_:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$392, %rsp
	.cfi_def_cfa_offset 448
	movq	456(%rsp), %rax
	movq	%rcx, 200(%rsp)
	movq	%r8, 208(%rsp)
	movq	448(%rsp), %r12
	movq	%rax, 16(%rsp)
	movq	464(%rsp), %rax
	movq	%r9, 8(%rsp)
	movq	%rax, 24(%rsp)
	movq	472(%rsp), %rax
	movq	%rsi, 184(%rsp)
	movq	%rax, 32(%rsp)
	movq	480(%rsp), %rax
	movq	%rdx, 192(%rsp)
	movq	%rax, 40(%rsp)
	movq	488(%rsp), %rax
	movq	%rdi, 176(%rsp)
	movq	%rax, 48(%rsp)
	movq	496(%rsp), %rax
	movq	%rax, 56(%rsp)
	movq	504(%rsp), %rax
	movq	544(%rsp), %r13
	movq	552(%rsp), %rbx
	movq	%rax, 64(%rsp)
	movq	512(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	520(%rsp), %rax
	movq	%rax, 216(%rsp)
	movq	528(%rsp), %rax
	movq	%rax, 80(%rsp)
	movq	536(%rsp), %rax
	movq	%rax, 224(%rsp)
	movq	560(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	568(%rsp), %rax
	movq	%rax, 232(%rsp)
	movq	576(%rsp), %rax
	movq	%rax, 240(%rsp)
	movq	584(%rsp), %rax
	movq	%rax, 248(%rsp)
	movq	592(%rsp), %rax
	movq	%rax, 256(%rsp)
	movq	600(%rsp), %rax
	movq	%rax, 264(%rsp)
	movq	608(%rsp), %rax
	movq	%rax, 96(%rsp)
	movq	616(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	624(%rsp), %rax
	movq	%rax, 272(%rsp)
	movq	632(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	640(%rsp), %rax
	movq	752(%rsp), %r10
	movq	704(%rsp), %r14
	movq	%rax, 280(%rsp)
	movq	648(%rsp), %rax
	movq	%r10, 320(%rsp)
	movq	712(%rsp), %r15
	movq	%rax, 288(%rsp)
	movq	656(%rsp), %rax
	movq	%rax, 296(%rsp)
	movq	664(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	672(%rsp), %rax
	movq	%rax, 304(%rsp)
	movq	680(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	688(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	696(%rsp), %rax
	movq	%rax, 312(%rsp)
	movq	720(%rsp), %rax
	movq	%rax, 144(%rsp)
	movq	728(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	736(%rsp), %rax
	movq	%rax, 160(%rsp)
	movq	744(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 376(%rsp)
	xorl	%eax, %eax
	call	cudaPeekAtLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	320(%rsp), %r10
	movl	$2, %edi
	leaq	.LC1(%rip), %rsi
	movl	(%r10), %eax
	movq	%r10, 328(%rsp)
	pushq	%rax
	.cfi_def_cfa_offset 456
	movl	(%r15), %eax
	pushq	%rax
	.cfi_def_cfa_offset 464
	movl	(%r14), %eax
	pushq	%rax
	.cfi_def_cfa_offset 472
	movq	160(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 480
	movq	160(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 488
	movq	160(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 496
	movq	152(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 504
	movq	152(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 512
	movq	152(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 520
	movl	(%rbx), %eax
	pushq	%rax
	.cfi_def_cfa_offset 528
	movl	0(%r13), %eax
	pushq	%rax
	.cfi_def_cfa_offset 536
	movq	168(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 544
	movq	168(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 552
	movq	168(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 560
	movq	168(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 568
	movq	168(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 576
	movq	168(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 584
	movq	168(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 592
	movq	312(%rsp), %rax
	movl	(%r12), %ecx
	movsd	(%rax), %xmm4
	movq	304(%rsp), %rax
	movsd	(%rax), %xmm3
	movq	296(%rsp), %rax
	movsd	(%rax), %xmm2
	movq	288(%rsp), %rax
	movsd	(%rax), %xmm1
	movq	256(%rsp), %rax
	movsd	(%rax), %xmm0
	movq	168(%rsp), %rax
	movl	(%rax), %r9d
	movq	160(%rsp), %rax
	movl	(%rax), %r8d
	movq	152(%rsp), %rax
	movl	(%rax), %edx
	movb	$5, %al
	call	__printf_chk@PLT
	movslq	(%r12), %rsi
	addq	$144, %rsp
	.cfi_def_cfa_offset 448
	leaq	336(%rsp), %rdi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movslq	(%r12), %rsi
	leaq	344(%rsp), %rdi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rcx
	movl	(%rbx), %r11d
	movq	176(%rsp), %rax
	movl	0(%r13), %ebp
	cvtsi2ssl	(%rcx), %xmm0
	movq	8(%rsp), %rcx
	movl	%r11d, 320(%rsp)
	movl	(%rax), %eax
	cvtsi2ssl	(%rcx), %xmm1
	movl	%eax, 176(%rsp)
	mulss	%xmm1, %xmm0
	cvtsi2ssl	%eax, %xmm1
	divss	%xmm1, %xmm0
	call	ceilf@PLT
	movl	176(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2sil	%xmm0, %edx
	movl	%eax, 364(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 368(%rsp)
	movl	372(%rsp), %ecx
	movq	%rax, 356(%rsp)
	movl	360(%rsp), %esi
	movl	%edx, 352(%rsp)
	movq	364(%rsp), %rdx
	movq	352(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	movl	320(%rsp), %r11d
	movq	328(%rsp), %r10
	testl	%eax, %eax
	jne	.L9
	imull	%r11d, %ebp
	pushq	%rbp
	.cfi_def_cfa_offset 456
	movl	(%r10), %eax
	pushq	%rax
	.cfi_def_cfa_offset 464
	movl	(%r15), %eax
	pushq	%rax
	.cfi_def_cfa_offset 472
	movl	(%r14), %eax
	pushq	%rax
	.cfi_def_cfa_offset 480
	pushq	344(%rsp)
	.cfi_def_cfa_offset 488
	movq	176(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 496
	movq	176(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 504
	pushq	360(%rsp)
	.cfi_def_cfa_offset 512
	movq	184(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 520
	pushq	368(%rsp)
	.cfi_def_cfa_offset 528
	pushq	368(%rsp)
	.cfi_def_cfa_offset 536
	pushq	368(%rsp)
	.cfi_def_cfa_offset 544
	pushq	368(%rsp)
	.cfi_def_cfa_offset 552
	movq	208(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 560
	movq	208(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 568
	pushq	384(%rsp)
	.cfi_def_cfa_offset 576
	pushq	384(%rsp)
	.cfi_def_cfa_offset 584
	pushq	384(%rsp)
	.cfi_def_cfa_offset 592
	pushq	384(%rsp)
	.cfi_def_cfa_offset 600
	pushq	384(%rsp)
	.cfi_def_cfa_offset 608
	movq	248(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 616
	movl	(%rbx), %eax
	pushq	%rax
	.cfi_def_cfa_offset 624
	movl	0(%r13), %eax
	pushq	%rax
	.cfi_def_cfa_offset 632
	pushq	408(%rsp)
	.cfi_def_cfa_offset 640
	movq	272(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 648
	pushq	416(%rsp)
	.cfi_def_cfa_offset 656
	pushq	552(%rsp)
	.cfi_def_cfa_offset 664
	pushq	552(%rsp)
	.cfi_def_cfa_offset 672
	movq	296(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 680
	movq	296(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 688
	movq	296(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 696
	movq	296(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 704
	movq	296(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 712
	movq	296(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 720
	movq	296(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_def_cfa_offset 728
	movl	(%r12), %eax
	pushq	%rax
	.cfi_def_cfa_offset 736
	movq	456(%rsp), %rax
	movsd	(%rax), %xmm4
	movq	448(%rsp), %rax
	movsd	(%rax), %xmm3
	movq	440(%rsp), %rax
	movsd	(%rax), %xmm2
	movq	432(%rsp), %rax
	movsd	(%rax), %xmm1
	movq	400(%rsp), %rax
	movq	496(%rsp), %rcx
	movq	488(%rsp), %rdx
	movsd	(%rax), %xmm0
	movq	296(%rsp), %rax
	movq	480(%rsp), %rsi
	movq	472(%rsp), %rdi
	movl	(%rax), %r9d
	movq	304(%rsp), %rax
	movl	(%rax), %r8d
	call	_Z113__device_stub__Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddiiPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	addq	$288, %rsp
	.cfi_def_cfa_offset 448
.L9:
	movq	336(%rsp), %rdi
	call	cudaFree@PLT
	movq	344(%rsp), %rdi
	call	cudaFree@PLT
	call	cudaPeekAtLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	376(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$392, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	compute_primitive_vars_gpu_wrapper_, .-compute_primitive_vars_gpu_wrapper_
	.section	.rodata.str1.1
.LC3:
	.string	"_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>

__global__ void compute_primitive_vars_kernel (double *vx, double *vy, double *vz, double *u, int nelt, int nxyz,int ntot,int irpu, int irpv, int irpw, int iret, int irg, int toteq,int if3d,double *scr, double* energy, double *vtrans, int irho, double *phig, int lx1, int ly1, int lz1, int *lglel, double *xm1, double *ym1, double *zm1, double *t,int ldimt, int npscal, double *pr, double p0th, double *sii, double *siii, double *vdiff, int ifield,char *cb, int icv, int icp, double *csound, int imu,int ilam, double cpgref, double cvgref, double gmaref, double rgasref,  int ltot,int lxy){    
	int id = blockIdx.x*blockDim.x+threadIdx.x;
	if(id<nelt*nxyz){


		int e = id/nxyz;
		int i = id%nxyz;
		int e_offset = toteq*nxyz;
		double c = u[e*e_offset+(irg-1)*nxyz+i];
		vx[id] = u[e*e_offset+(irpu-1)*nxyz+i]/c;//invcol3
		vy[id] = u[e*e_offset+(irpv-1)*nxyz+i]/c;
		vz[id] = u[e*e_offset+(irpw-1)*nxyz+i]/c;

		if(if3d){
			//Compute a Cartesian vector dot product. 3-d version  vdot3
			scr[id] = u[e*e_offset+(irpu-1)*nxyz+i]*u[e*e_offset+(irpu-1)*nxyz+i]+u[e*e_offset+(irpv-1)*nxyz+i]*u[e*e_offset+(irpv-1)*nxyz+i]+u[e*e_offset+(irpw-1)*nxyz+i]*u[e*e_offset+(irpw-1)*nxyz+i];

		}
		else{
			// compute vector dot product 2d version vdot2
			scr[id] = u[e*e_offset+(irpu-1)*nxyz+i]*u[e*e_offset+(irpu-1)*nxyz+i]+u[e*e_offset+(irpv-1)*nxyz+i]*u[e*e_offset+(irpv-1)*nxyz+i];


		}
  
                scr[id] = scr[id]/c; //invcol2
                scr[id] = scr[id] * 0.5; //cmult
	
		energy[id] =  u[e*e_offset+(iret-1)*nxyz+i] -scr[id];// sub3	
		energy[id] = energy[id]/c;// invcol2
		
		vtrans[(irho-1)*ltot+id ] = c / phig[id];  //invcol3

                // subroutine tdstate

		int eg= lglel[e]; // this never uses.  Check with Dr.Tania
		int k =  (id / (lx1*ly1))%lz1;
		int j =  (id/lx1)%ly1;
		int newi = id % lx1;

		double x = xm1[e*nxyz+k*lxy+j*lx1+newi];
		double y = ym1[e*nxyz+k*lxy+j*lx1+newi];
		double z = zm1[e*nxyz+k*lxy+j*lx1+newi];
		double r = x*x+y*y;
		double theta=0.0;
		if (r>0.0){ r = sqrtf(r);}
		if ( x != 0.0 || y!= 0.0){theta = atan2(y,x);	}
		double ux= vx[e*nxyz+k*lxy+j*lx1+newi];
		double uy= vy[e*nxyz+k*lxy+j*lx1+newi];
		double uz= vz[e*nxyz+k*lxy+j*lx1+newi];
		double temp = t [ e*nxyz+k*lxy+j*lx1+newi ];
		int ips;
		double ps[10]; // ps is size of ldimt which is 3. Not sure npscal is also 3. Need to check with Dr.Tania
		for (ips=0;ips<npscal;ips++){
			ps[ips]=t[(ips+1)*ltot+e*nxyz+k*lxy+j*lx1+newi ]; // 5 th dimension of t is idlmt which is 3. Not sure how the  nekasgn access ips+1. Need to check with Dr.Tania
		}
		double pa = pr [e*nxyz+k*lxy+j*lx1+newi];
		double p0= p0th;
		double si2 =  sii[e*nxyz+k*lxy+j*lx1+newi];
		double si3 =  siii[e*nxyz+k*lxy+j*lx1+newi];
		double udiff =  vdiff[(ifield-1)*ltot+e*nxyz+k*lxy+j*lx1+newi];
		double utrans =  vtrans[(ifield-1)*ltot+e*nxyz+k*lxy+j*lx1+newi];
		char cbu1 = cb[0];
		char cbu2 = cb[1];
		char cbu3 = cb[2];
		
		// subroutine cmtasgn
		int eqnum;
		double varsic[10];
		for (eqnum=0;eqnum<toteq;eqnum++){
			varsic[eqnum] = u[e*e_offset+eqnum*nxyz+k*lxy+j*lx1+newi];

		}
		double phi = phig[e*nxyz+k*lxy+j*lx1+newi];
		double rho = vtrans[(irho-1)*ltot +e*nxyz+k*lxy+j*lx1+newi];
		double pres = pr[e*nxyz+k*lxy+j*lx1+newi];
		double cv=0.0,cp=0.0;
		if(rho!=0){
			cv=vtrans[(icv-1)*ltot +e*nxyz+k*lxy+j*lx1+newi]/rho;
			cp=vtrans[(icp-1)*ltot +e*nxyz+k*lxy+j*lx1+newi]/rho;
		}
		double asnd = csound [e*nxyz+k*lxy+j*lx1+newi];
		double mu = vdiff[(imu-1)*ltot+e*nxyz+k*lxy+j*lx1+newi];
		udiff = vdiff[(imu-1)*ltot+e*nxyz+k*lxy+j*lx1+newi];// this overrides the udiff in nekasgn (line 63 in this function). Need to check withDr.Tania
		double lambda = vdiff[(ilam-1)*ltot+e*nxyz+k*lxy+j*lx1+newi];
	
		double e_internal = energy[e*nxyz+k*lxy+j*lx1+newi];
		//subroutine cmt_userEOS
		cp=cpgref;
      		cv=cvgref;
      		temp=e_internal/cv; // overrides
		// function MixtPerf_C_GRT
      		asnd=sqrtf(gmaref*rgasref*temp);  //overrides
		// function MixtPerf_P_DRT
      		pres=rho*rgasref*temp;//overrides
		
		vtrans[(icp-1)*ltot +e*nxyz+k*lxy+j*lx1+newi]=cp*rho;
		vtrans[(icv-1)*ltot +e*nxyz+k*lxy+j*lx1+newi]=cv*rho;
		t [ e*nxyz+k*lxy+j*lx1+newi ]= temp;
		csound [e*nxyz+k*lxy+j*lx1+newi]=asnd;
		
	}
}

extern "C" void compute_primitive_vars_gpu_wrapper_(int *glbblockSize1,double *d_vx, double *d_vy, double *d_vz, double *d_u, int *nxyz, int *ntot, int *nelt,int *irpu, int *irpv, int *irpw, int* iret,  int *irg, int *toteq, int *if3d, double *d_vtrans, int *irho, double *d_phig, int *lx1, int *ly1, int *lz1, int *d_lglel, double *d_xm1, double *d_ym1, double *d_zm1, double *d_t,int *ldimt, int *npscal, double *d_pr, double *p0th, double *d_sii, double *d_siii, double *d_vdiff, int *ifield,char *d_cb, int *icv, int *icp, double *d_csound, int *imu,int *ilam, double *cpgref, double *cvgref, double *gmaref, double *rgasref, int *ltot){

 hipError_t code1 = hipPeekAtLastError();

printf("CUDA: Start compute_primitive_vars_gpu_wrapper cuda status: %s\n",hipGetErrorString(code1));

printf("CUDA: Start compute_primitive_vars_gpu_wrapper values nxyz = %d,ntot = %d,nelt = %d,irpu = %d,irpv = %d,irpw = %d,iret = %d,irg=%d ,toteq = %d,if3d = %d,irho = %d,lx1 = %d,ly1 = %d,lz1 = %d,ldimt = %d,npscal = %d,p0th = %lf,ifield = %d,icv = %d,icp = %d,imu = %d,ilam = %d,cpgref = %lf,cvgref = %lf,gmaref = %lf,rgasref = %lf,ltot = %d,  \n", nxyz[0],ntot[0],nelt[0],irpu[0],irpv[0],irpw[0],iret[0],irg[0],toteq[0],if3d[0],irho[0],lx1[0],ly1[0],lz1[0],ldimt[0],npscal[0],p0th[0],ifield[0],icv[0],icp[0],imu[0],ilam[0],cpgref[0],cvgref[0],gmaref[0],rgasref[0],ltot[0]);

	double *d_scr;  // I think this is a tempory variable. need to check with Dr.Tania. adeesha
	double *d_energy;
	hipMalloc((void**)&d_scr,ntot[0] *  sizeof(double));
	hipMalloc((void**)&d_energy,ntot[0] *  sizeof(double));

	int lxy=lx1[0]*ly1[0];
	int blockSize =glbblockSize1[0], gridSize;
	gridSize = (int)ceil((float)nelt[0]*nxyz[0]/blockSize);
	compute_primitive_vars_kernel<<<gridSize, blockSize>>>(d_vx, d_vy, d_vz, d_u, nelt[0], nxyz[0],ntot[0],  irpu[0], irpv[0], irpw[0], iret[0],irg[0],toteq[0],if3d[0],d_scr,d_energy,d_vtrans, irho[0],d_phig ,lx1[0], ly1[0],lz1[0], d_lglel, d_xm1, d_ym1,d_zm1, d_t,ldimt[0], npscal[0], d_pr,p0th[0], d_sii,d_siii,d_vdiff, ifield[0],d_cb, icv[0], icp[0],d_csound,imu[0],ilam[0],  cpgref[0], cvgref[0], gmaref[0], rgasref[0],ltot[0],lxy);


        hipFree(d_scr);
	hipFree(d_energy);
hipError_t code2 = hipPeekAtLastError();

printf("CUDA: End compute_primitive_vars_gpu_wrapper cuda status: %s\n",hipGetErrorString(code2));



}

	.text
	.file	"driver3_cmt_cuda.hip"
	.globl	_Z44__device_stub__compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii # -- Begin function _Z44__device_stub__compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	.type	_Z44__device_stub__compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii,@function
_Z44__device_stub__compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii: # @_Z44__device_stub__compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$512, %rsp                      # imm = 0x200
	.cfi_def_cfa_offset 560
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	88(%rsp), %r10
	movq	%rdi, (%r10)
	leaq	80(%rsp), %r11
	movq	%rsi, (%r11)
	leaq	72(%rsp), %r14
	movq	%rdx, (%r14)
	leaq	64(%rsp), %r15
	movq	%rcx, (%r15)
	leaq	4(%rsp), %r12
	movl	%r8d, (%r12)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	56(%rsp), %rdi
	movsd	%xmm0, (%rdi)
	leaq	48(%rsp), %rax
	movsd	%xmm1, (%rax)
	leaq	40(%rsp), %rcx
	movsd	%xmm2, (%rcx)
	leaq	32(%rsp), %rdx
	movsd	%xmm3, (%rdx)
	leaq	24(%rsp), %rsi
	movsd	%xmm4, (%rsi)
	leaq	128(%rsp), %rbx
	movq	%r10, (%rbx)
	movq	%r11, 8(%rbx)
	movq	%r14, 16(%rbx)
	movq	%r15, 24(%rbx)
	movq	%r12, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	560(%rsp), %r8
	movq	%r8, 48(%rbx)
	leaq	568(%rsp), %r8
	movq	%r8, 56(%rbx)
	leaq	576(%rsp), %r8
	movq	%r8, 64(%rbx)
	leaq	584(%rsp), %r8
	movq	%r8, 72(%rbx)
	leaq	592(%rsp), %r8
	movq	%r8, 80(%rbx)
	leaq	600(%rsp), %r8
	movq	%r8, 88(%rbx)
	leaq	608(%rsp), %r8
	movq	%r8, 96(%rbx)
	leaq	616(%rsp), %r8
	movq	%r8, 104(%rbx)
	leaq	624(%rsp), %r8
	movq	%r8, 112(%rbx)
	leaq	632(%rsp), %r8
	movq	%r8, 120(%rbx)
	leaq	640(%rsp), %r8
	movq	%r8, 128(%rbx)
	leaq	648(%rsp), %r8
	movq	%r8, 136(%rbx)
	leaq	656(%rsp), %r8
	movq	%r8, 144(%rbx)
	leaq	664(%rsp), %r8
	movq	%r8, 152(%rbx)
	leaq	672(%rsp), %r8
	movq	%r8, 160(%rbx)
	leaq	680(%rsp), %r8
	movq	%r8, 168(%rbx)
	leaq	688(%rsp), %r8
	movq	%r8, 176(%rbx)
	leaq	696(%rsp), %r8
	movq	%r8, 184(%rbx)
	leaq	704(%rsp), %r8
	movq	%r8, 192(%rbx)
	leaq	712(%rsp), %r8
	movq	%r8, 200(%rbx)
	leaq	720(%rsp), %r8
	movq	%r8, 208(%rbx)
	leaq	728(%rsp), %r8
	movq	%r8, 216(%rbx)
	leaq	736(%rsp), %r8
	movq	%r8, 224(%rbx)
	leaq	744(%rsp), %r8
	movq	%r8, 232(%rbx)
	movq	%rdi, 240(%rbx)
	leaq	752(%rsp), %rdi
	movq	%rdi, 248(%rbx)
	leaq	760(%rsp), %rdi
	movq	%rdi, 256(%rbx)
	leaq	768(%rsp), %rdi
	movq	%rdi, 264(%rbx)
	leaq	776(%rsp), %rdi
	movq	%rdi, 272(%rbx)
	leaq	784(%rsp), %rdi
	movq	%rdi, 280(%rbx)
	leaq	792(%rsp), %rdi
	movq	%rdi, 288(%rbx)
	leaq	800(%rsp), %rdi
	movq	%rdi, 296(%rbx)
	leaq	808(%rsp), %rdi
	movq	%rdi, 304(%rbx)
	leaq	816(%rsp), %rdi
	movq	%rdi, 312(%rbx)
	leaq	824(%rsp), %rdi
	movq	%rdi, 320(%rbx)
	movq	%rax, 328(%rbx)
	movq	%rcx, 336(%rbx)
	movq	%rdx, 344(%rbx)
	movq	%rsi, 352(%rbx)
	leaq	832(%rsp), %rax
	movq	%rax, 360(%rbx)
	leaq	840(%rsp), %rax
	movq	%rax, 368(%rbx)
	leaq	112(%rsp), %r14
	leaq	96(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$528, %rsp                      # imm = 0x210
	.cfi_adjust_cfa_offset -528
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z44__device_stub__compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii, .Lfunc_end0-_Z44__device_stub__compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	.cfi_endproc
                                        # -- End function
	.globl	compute_primitive_vars_gpu_wrapper_ # -- Begin function compute_primitive_vars_gpu_wrapper_
	.type	compute_primitive_vars_gpu_wrapper_,@function
compute_primitive_vars_gpu_wrapper_:    # @compute_primitive_vars_gpu_wrapper_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbp
	movq	%r9, 8(%rsp)                    # 8-byte Spill
	movq	%r8, 144(%rsp)                  # 8-byte Spill
	movq	%rcx, 136(%rsp)                 # 8-byte Spill
	movq	%rdx, 128(%rsp)                 # 8-byte Spill
	movq	%rsi, 120(%rsp)                 # 8-byte Spill
	movq	%rdi, 88(%rsp)                  # 8-byte Spill
	movq	240(%rsp), %r13
	movq	232(%rsp), %r15
	movq	224(%rsp), %r12
	movq	216(%rsp), %r14
	movq	208(%rsp), %rbx
	callq	hipPeekAtLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	(%rbp), %esi
	movl	(%rbx), %edx
	movl	(%r14), %ecx
	movl	(%r12), %r8d
	movl	(%r15), %r9d
	movl	(%r13), %eax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movq	248(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movq	256(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movq	264(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	272(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	288(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movq	304(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	312(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	320(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	368(%rsp), %rax
	movl	(%rax), %r11d
	movq	392(%rsp), %rax
	movsd	(%rax), %xmm0                   # xmm0 = mem[0],zero
	movq	480(%rsp), %rax
	movsd	(%rax), %xmm1                   # xmm1 = mem[0],zero
	movq	488(%rsp), %rax
	movsd	(%rax), %xmm2                   # xmm2 = mem[0],zero
	movq	496(%rsp), %rax
	movsd	(%rax), %xmm3                   # xmm3 = mem[0],zero
	movq	504(%rsp), %rax
	movsd	(%rax), %xmm4                   # xmm4 = mem[0],zero
	movq	376(%rsp), %rax
	movl	(%rax), %ebx
	movq	424(%rsp), %rax
	movl	(%rax), %r14d
	movq	440(%rsp), %rax
	movl	(%rax), %r12d
	movq	448(%rsp), %rax
	movl	(%rax), %r15d
	movq	464(%rsp), %rax
	movl	(%rax), %r13d
	movq	472(%rsp), %rax
	movl	(%rax), %r10d
	movq	512(%rsp), %rax
	movl	(%rax), %ebp
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$.L.str.1, %edi
	movb	$5, %al
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	movq	48(%rsp), %r15                  # 8-byte Reload
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	movq	360(%rsp), %r12
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	88(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	120(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	136(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	152(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	184(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	200(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	216(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	printf
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	movq	208(%rsp), %rbx
	movslq	(%rbx), %rsi
	shlq	$3, %rsi
	leaq	104(%rsp), %rdi
	callq	hipMalloc
	movslq	(%rbx), %rsi
	shlq	$3, %rsi
	leaq	96(%rsp), %rdi
	callq	hipMalloc
	movq	304(%rsp), %rax
	movl	(%rax), %r14d
	movl	(%r12), %ebx
	movq	88(%rsp), %rax                  # 8-byte Reload
	movl	(%rax), %ebp
	movq	216(%rsp), %rax
	movq	%rax, %r13
	cvtsi2ssl	(%rax), %xmm1
	cvtsi2ssl	(%r15), %xmm0
	mulss	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ebp, %xmm1
	divss	%xmm1, %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %edi
	btsq	$32, %rdi
	btsq	$32, %rbp
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	imull	%r14d, %ebx
	movq	392(%rsp), %rax
	movsd	(%rax), %xmm0                   # xmm0 = mem[0],zero
	movq	480(%rsp), %rax
	movsd	(%rax), %xmm1                   # xmm1 = mem[0],zero
	movq	488(%rsp), %rax
	movsd	(%rax), %xmm2                   # xmm2 = mem[0],zero
	movq	496(%rsp), %rax
	movsd	(%rax), %xmm3                   # xmm3 = mem[0],zero
	movq	504(%rsp), %rax
	movsd	(%rax), %xmm4                   # xmm4 = mem[0],zero
	movl	(%r13), %r8d
	movl	(%r15), %r9d
	movq	208(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	movq	224(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movq	232(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movq	240(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movq	248(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	256(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	264(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movq	272(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	288(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	304(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	(%r12), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	320(%rsp), %rax
	movl	(%rax), %eax
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	movq	368(%rsp), %rax
	movl	(%rax), %r12d
	movq	376(%rsp), %rax
	movl	(%rax), %r13d
	movq	424(%rsp), %rax
	movl	(%rax), %ebp
	movq	440(%rsp), %rax
	movl	(%rax), %eax
	movq	448(%rsp), %rcx
	movl	(%rcx), %r10d
	movq	464(%rsp), %rcx
	movl	(%rcx), %r14d
	movq	472(%rsp), %rcx
	movl	(%rcx), %r11d
	movq	512(%rsp), %rcx
	movl	(%rcx), %r15d
	movq	120(%rsp), %rdi                 # 8-byte Reload
	movq	128(%rsp), %rsi                 # 8-byte Reload
	movq	136(%rsp), %rdx                 # 8-byte Reload
	movq	144(%rsp), %rcx                 # 8-byte Reload
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	488(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	488(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	pushq	488(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	488(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	488(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	480(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	480(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	480(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	480(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	480(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	480(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	272(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	176(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	192(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	480(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	216(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	480(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	304(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	320(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	256(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	272(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	288(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	304(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	320(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	336(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	352(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	368(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z44__device_stub__compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	addq	$288, %rsp                      # imm = 0x120
	.cfi_adjust_cfa_offset -288
.LBB1_2:
	movq	104(%rsp), %rdi
	callq	hipFree
	movq	96(%rsp), %rdi
	callq	hipFree
	callq	hipPeekAtLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	compute_primitive_vars_gpu_wrapper_, .Lfunc_end1-compute_primitive_vars_gpu_wrapper_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii,@object # @_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	.section	.rodata,"a",@progbits
	.globl	_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	.p2align	3, 0x0
_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii:
	.quad	_Z44__device_stub__compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	.size	_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA: Start compute_primitive_vars_gpu_wrapper cuda status: %s\n"
	.size	.L.str, 64

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"CUDA: Start compute_primitive_vars_gpu_wrapper values nxyz = %d,ntot = %d,nelt = %d,irpu = %d,irpv = %d,irpw = %d,iret = %d,irg=%d ,toteq = %d,if3d = %d,irho = %d,lx1 = %d,ly1 = %d,lz1 = %d,ldimt = %d,npscal = %d,p0th = %lf,ifield = %d,icv = %d,icp = %d,imu = %d,ilam = %d,cpgref = %lf,cvgref = %lf,gmaref = %lf,rgasref = %lf,ltot = %d,  \n"
	.size	.L.str.1, 340

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"CUDA: End compute_primitive_vars_gpu_wrapper cuda status: %s\n"
	.size	.L.str.2, 62

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii"
	.size	.L__unnamed_1, 100

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z44__device_stub__compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii ; -- Begin function _Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	.globl	_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
	.p2align	8
	.type	_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii,@function
_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii: ; @_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x134
	s_load_b64 s[2:3], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_mul_i32 s2, s3, s2
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_4
; %bb.1:
	s_ashr_i32 s2, s3, 31
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s4, s3, s2
	s_load_b256 s[12:19], s[0:1], 0x2c
	s_xor_b32 s4, s4, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v1, v2
	v_cvt_f32_u32_e32 v0, s4
	s_sub_i32 s5, 0, s4
	v_xor_b32_e32 v12, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, s5, v0
	v_mul_hi_u32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v3
	v_mul_hi_u32 v0, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v0, s4
	v_add_nc_u32_e32 v4, 1, v0
	v_sub_nc_u32_e32 v3, v12, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s4, v3
	v_cmp_le_u32_e32 vcc_lo, s4, v3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
	v_xor_b32_e32 v5, s2, v2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s16, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e32 vcc_lo, s4, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_load_b256 s[4:11], s[0:1], 0x0
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v5
	v_sub_nc_u32_e32 v0, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, v0, s3
	v_sub_nc_u32_e32 v3, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v0, s17, v[3:4]
	v_mad_u64_u32 v[3:4], null, s2, s3, v[5:6]
	s_add_i32 s2, s12, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[6:7], null, s2, s3, v[5:6]
	s_add_i32 s2, s13, -1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	v_add_co_u32 v8, vcc_lo, s10, v6
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v7, vcc_lo
	s_clause 0x1
	global_load_b64 v[3:4], v[3:4], off
	global_load_b64 v[6:7], v[8:9], off
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[10:11], null, v[3:4], v[3:4], v[6:7]
	v_div_scale_f64 v[17:18], vcc_lo, v[6:7], v[3:4], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[13:14], v[10:11]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[15:16], -v[10:11], v[13:14], 1.0
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], -v[10:11], v[13:14], 1.0
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[15:16], v[17:18], v[13:14]
	v_fma_f64 v[10:11], -v[10:11], v[15:16], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[10:11], v[10:11], v[13:14], v[15:16]
	v_mad_u64_u32 v[13:14], null, s2, s3, v[5:6]
	s_add_i32 s2, s14, -1
	s_cmp_eq_u32 s18, 0
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	v_div_fixup_f64 v[10:11], v[10:11], v[3:4], v[6:7]
	v_lshlrev_b64 v[6:7], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v15, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v7, vcc_lo
	v_add_co_u32 v13, vcc_lo, s10, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s11, v14, vcc_lo
	global_store_b64 v[15:16], v[10:11], off
	global_load_b64 v[10:11], v[13:14], off
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[15:16], null, v[3:4], v[3:4], v[10:11]
	v_div_scale_f64 v[21:22], vcc_lo, v[10:11], v[3:4], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[17:18], v[15:16]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[19:20], -v[15:16], v[17:18], 1.0
	v_fma_f64 v[17:18], v[17:18], v[19:20], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], -v[15:16], v[17:18], 1.0
	v_fma_f64 v[17:18], v[17:18], v[19:20], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[19:20], v[21:22], v[17:18]
	v_fma_f64 v[15:16], -v[15:16], v[19:20], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[15:16], v[15:16], v[17:18], v[19:20]
	v_add_co_u32 v17, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v18, vcc_lo, s7, v7, vcc_lo
	v_div_fixup_f64 v[15:16], v[15:16], v[3:4], v[10:11]
	v_mad_u64_u32 v[10:11], null, s2, s3, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[10:11], 3, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, s10, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v11, vcc_lo
	global_store_b64 v[17:18], v[15:16], off
	global_load_b64 v[15:16], v[10:11], off
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[17:18], null, v[3:4], v[3:4], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[19:20], v[17:18]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[21:22], -v[17:18], v[19:20], 1.0
	v_fma_f64 v[19:20], v[19:20], v[21:22], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[21:22], -v[17:18], v[19:20], 1.0
	v_fma_f64 v[19:20], v[19:20], v[21:22], v[19:20]
	v_div_scale_f64 v[21:22], vcc_lo, v[15:16], v[3:4], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[23:24], v[21:22], v[19:20]
	v_fma_f64 v[17:18], -v[17:18], v[23:24], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[17:18], v[17:18], v[19:20], v[23:24]
	v_div_fixup_f64 v[15:16], v[17:18], v[3:4], v[15:16]
	v_add_co_u32 v17, vcc_lo, s8, v6
	v_add_co_ci_u32_e32 v18, vcc_lo, s9, v7, vcc_lo
	global_store_b64 v[17:18], v[15:16], off
	s_clause 0x1
	global_load_b64 v[13:14], v[13:14], off
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt vmcnt(1)
	v_mul_f64 v[13:14], v[13:14], v[13:14]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[8:9], v[13:14]
	s_cbranch_scc1 .LBB0_3
; %bb.2:
	global_load_b64 v[10:11], v[10:11], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[8:9], v[10:11], v[10:11], v[8:9]
.LBB0_3:                                ; %.preheader.preheader
	s_delay_alu instid0(VALU_DEP_1)
	v_div_scale_f64 v[10:11], null, v[3:4], v[3:4], v[8:9]
	v_div_scale_f64 v[17:18], vcc_lo, v[8:9], v[3:4], v[8:9]
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x48
	s_load_b64 s[12:13], s[0:1], 0x58
	s_add_i32 s2, s15, -1
	s_load_b64 s[16:17], s[0:1], 0x120
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[13:14], v[10:11]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[15:16], -v[10:11], v[13:14], 1.0
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], -v[10:11], v[13:14], 1.0
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[15:16], v[17:18], v[13:14]
	v_fma_f64 v[10:11], -v[10:11], v[15:16], v[17:18]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fmas_f64 v[10:11], v[10:11], v[13:14], v[15:16]
	v_mad_u64_u32 v[13:14], null, s2, s3, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v15, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v7, vcc_lo
	s_load_b64 s[2:3], s[0:1], 0x68
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v14, 31, v13
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, s10, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s11, v14, vcc_lo
	v_div_fixup_f64 v[8:9], v[10:11], v[3:4], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[8:9], 0.5
	global_store_b64 v[15:16], v[10:11], off
	global_load_b64 v[10:11], v[13:14], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[8:9], v[8:9], -0.5, v[10:11]
	v_div_scale_f64 v[10:11], null, v[3:4], v[3:4], v[8:9]
	v_div_scale_f64 v[17:18], vcc_lo, v[8:9], v[3:4], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[13:14], v[10:11]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[15:16], -v[10:11], v[13:14], 1.0
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], -v[10:11], v[13:14], 1.0
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[15:16], v[17:18], v[13:14]
	v_fma_f64 v[10:11], -v[10:11], v[15:16], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[10:11], v[10:11], v[13:14], v[15:16]
	v_div_fixup_f64 v[8:9], v[10:11], v[3:4], v[8:9]
	v_add_co_u32 v10, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v7, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v7, vcc_lo
	global_store_b64 v[10:11], v[8:9], off
	global_load_b64 v[5:6], v[5:6], off
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x70
	s_load_b64 s[14:15], s[0:1], 0xa0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s3, s8, 31
	s_mul_i32 s2, s9, s8
	s_add_i32 s5, s8, s3
	s_ashr_i32 s4, s2, 31
	s_xor_b32 s5, s5, s3
	s_add_i32 s2, s2, s4
	v_cvt_f32_u32_e32 v11, s5
	s_xor_b32 s11, s2, s4
	s_sub_i32 s2, 0, s5
	v_xor_b32_e32 v22, s3, v2
	v_xor_b32_e32 v2, s4, v2
	v_rcp_iflag_f32_e32 v11, v11
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v11, 0x4f7ffffe, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v11, v11
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[7:8], null, v[5:6], v[5:6], v[3:4]
	v_div_scale_f64 v[15:16], vcc_lo, v[3:4], v[5:6], v[3:4]
	v_rcp_f64_e32 v[9:10], v[7:8]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[13:14], -v[7:8], v[9:10], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[9:10], v[13:14], v[9:10]
	v_fma_f64 v[13:14], -v[7:8], v[9:10], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[9:10], v[13:14], v[9:10]
	v_cvt_f32_u32_e32 v13, s11
	v_rcp_iflag_f32_e32 v13, v13
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v13, 0x4f7ffffe, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_u32_f32_e32 v17, v13
	v_mul_lo_u32 v13, s2, v11
	s_sub_i32 s2, 0, s11
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v14, s2, v17
	s_ashr_i32 s2, s10, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_add_i32 s10, s10, s2
	v_mul_hi_u32 v18, v11, v13
	s_xor_b32 s10, s10, s2
	s_ashr_i32 s2, s9, 31
	s_sub_i32 s4, 0, s10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_hi_u32 v19, v17, v14
	s_add_i32 s9, s9, s2
	s_xor_b32 s9, s9, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v11, v18
	v_mul_f64 v[13:14], v[15:16], v[9:10]
	v_cvt_f32_u32_e32 v20, s9
	v_cvt_f32_u32_e32 v18, s10
	v_add_nc_u32_e32 v17, v17, v19
	v_mul_hi_u32 v11, v12, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_iflag_f32_e32 v20, v20
	v_rcp_iflag_f32_e32 v18, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v17, v12, v17
	v_mul_lo_u32 v19, v11, s5
	v_add_nc_u32_e32 v23, 1, v11
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_lo_u32 v21, v17, s11
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v20, 0x4f7ffffe, v20
	v_mul_f32_e32 v18, 0x4f7ffffe, v18
	v_sub_nc_u32_e32 v19, v12, v19
	v_sub_nc_u32_e32 v12, v12, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e64 s2, s5, v19
	v_add_nc_u32_e32 v21, 1, v17
	v_subrev_nc_u32_e32 v24, s11, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v11, v11, v23, s2
	v_subrev_nc_u32_e32 v23, s5, v19
	v_cmp_le_u32_e64 s3, s11, v12
	v_cndmask_b32_e64 v19, v19, v23, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v17, v17, v21, s3
	v_add_nc_u32_e32 v21, 1, v11
	v_cndmask_b32_e64 v12, v12, v24, s3
	v_fma_f64 v[7:8], -v[7:8], v[13:14], v[15:16]
	v_cmp_le_u32_e64 s2, s5, v19
	v_add_nc_u32_e32 v23, 1, v17
	v_cvt_u32_f32_e32 v15, v20
	v_cvt_u32_f32_e32 v16, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, v11, v21, s2
	v_cmp_le_u32_e64 s2, s11, v12
	v_mul_lo_u32 v18, s4, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v11, v11, v22
	v_cndmask_b32_e64 v12, v17, v23, s2
	s_sub_i32 s2, 0, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v17, s2, v15
	v_sub_nc_u32_e32 v11, v11, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v12, v12, v2
	v_mul_hi_u32 v18, v16, v18
	s_load_b32 s2, s[0:1], 0x60
	v_sub_nc_u32_e32 v2, v12, v2
	v_ashrrev_i32_e32 v12, 31, v11
	v_mul_hi_u32 v17, v15, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v16, v16, v18
	v_ashrrev_i32_e32 v19, 31, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v20, v11, v12
	v_add_nc_u32_e32 v2, v2, v19
	v_add_nc_u32_e32 v15, v15, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v17, v20, v12
	v_xor_b32_e32 v2, v2, v19
	v_div_fmas_f64 v[7:8], v[7:8], v[9:10], v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v15, v17, v15
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	v_mul_hi_u32 v16, v2, v16
	s_mul_i32 s2, s2, s16
	v_mul_lo_u32 v9, v15, s9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v16, s10
	v_sub_nc_u32_e32 v9, v17, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v10
	v_subrev_nc_u32_e32 v10, s9, v9
	v_cmp_le_u32_e32 vcc_lo, s9, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v13, s10, v2
	v_cndmask_b32_e32 v9, v9, v10, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s10, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_subrev_nc_u32_e32 v10, s9, v9
	v_cndmask_b32_e32 v2, v2, v13, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s9, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_subrev_nc_u32_e32 v13, s10, v2
	v_cndmask_b32_e32 v9, v9, v10, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s10, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v9, v9, v12
	v_cndmask_b32_e32 v2, v2, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v10, v2, v19
	v_div_fixup_f64 v[2:3], v[7:8], v[5:6], v[3:4]
	v_sub_nc_u32_e32 v4, v9, v12
	v_mul_lo_u32 v6, v11, s8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v7, v10, v19
	v_mul_lo_u32 v8, v4, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[4:5], null, v7, s17, v[0:1]
	v_sub_nc_u32_e32 v5, v1, v6
	v_add_nc_u32_e32 v0, s2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v4, v4, v8, v5
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_add_nc_u32_e32 v11, s2, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[5:6], 3, v[4:5]
	v_add_co_u32 v0, vcc_lo, s12, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
	v_add_co_u32 v7, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v6, vcc_lo
	s_load_b256 s[4:11], s[0:1], 0x100
	global_store_b64 v[0:1], v[2:3], off
	v_ashrrev_i32_e32 v12, 31, v11
	global_load_b64 v[0:1], v[7:8], off
	v_lshlrev_b64 v[11:12], 3, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s12, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s13, v12, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_div_scale_f64 v[2:3], null, s[6:7], s[6:7], v[0:1]
	v_div_scale_f64 v[13:14], vcc_lo, v[0:1], s[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[7:8], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[9:10], -v[2:3], v[7:8], 1.0
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[2:3], v[7:8], 1.0
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	global_load_b64 v[9:10], v[11:12], off
	v_mul_f64 v[11:12], v[13:14], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], -v[2:3], v[11:12], v[13:14]
	v_div_fmas_f64 v[2:3], v[2:3], v[7:8], v[11:12]
	v_mul_f64 v[7:8], s[8:9], s[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[0:1], v[2:3], s[6:7], v[0:1]
	v_mul_f64 v[2:3], v[7:8], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v2, v[2:3]
	v_mul_f32_e32 v3, 0x4f800000, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_sqrt_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v7, -1, v3
	v_add_nc_u32_e32 v8, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v11, -v7, v3, v2
	v_fma_f32 v12, -v8, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v11
	v_cndmask_b32_e64 v3, v3, v7, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v12
	v_cndmask_b32_e64 v3, v3, v8, s2
	s_load_b128 s[0:3], s[0:1], 0xe8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, 0x37800000, v3
	v_cndmask_b32_e32 v3, v3, v7, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	s_waitcnt vmcnt(0)
	v_mul_f64 v[7:8], v[9:10], s[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v11, v3, v2, vcc_lo
	v_mul_f64 v[2:3], v[9:10], s[4:5]
	v_add_co_u32 v15, vcc_lo, s14, v5
	v_add_co_ci_u32_e32 v16, vcc_lo, s15, v6, vcc_lo
	v_cvt_f64_f32_e32 v[9:10], v11
	s_waitcnt lgkmcnt(0)
	s_add_i32 s1, s1, -1
	s_add_i32 s0, s0, -1
	v_mad_u64_u32 v[11:12], null, s1, s16, v[4:5]
	v_mad_u64_u32 v[13:14], null, s0, s16, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v12, 31, v11
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 3, v[11:12]
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s12, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s13, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v13, vcc_lo, s12, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s13, v14, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v6, vcc_lo
	s_clause 0x1
	global_store_b64 v[11:12], v[2:3], off
	global_store_b64 v[13:14], v[7:8], off
	global_store_b64 v[15:16], v[0:1], off
	global_store_b64 v[4:5], v[9:10], off
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 552
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii, .Lfunc_end0-_Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2788
; NumSgprs: 22
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         60
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     by_value
      - .offset:         68
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .offset:         96
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .offset:         112
        .size:           4
        .value_kind:     by_value
      - .offset:         116
        .size:           4
        .value_kind:     by_value
      - .offset:         120
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         128
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         136
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         144
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         152
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         160
        .size:           8
        .value_kind:     global_buffer
      - .offset:         168
        .size:           4
        .value_kind:     by_value
      - .offset:         172
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         176
        .size:           8
        .value_kind:     global_buffer
      - .offset:         184
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         192
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         200
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         208
        .size:           8
        .value_kind:     global_buffer
      - .offset:         216
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         224
        .size:           8
        .value_kind:     global_buffer
      - .offset:         232
        .size:           4
        .value_kind:     by_value
      - .offset:         236
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         240
        .size:           8
        .value_kind:     global_buffer
      - .offset:         248
        .size:           4
        .value_kind:     by_value
      - .offset:         252
        .size:           4
        .value_kind:     by_value
      - .offset:         256
        .size:           8
        .value_kind:     by_value
      - .offset:         264
        .size:           8
        .value_kind:     by_value
      - .offset:         272
        .size:           8
        .value_kind:     by_value
      - .offset:         280
        .size:           8
        .value_kind:     by_value
      - .offset:         288
        .size:           4
        .value_kind:     by_value
      - .offset:         292
        .size:           4
        .value_kind:     by_value
      - .offset:         296
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         300
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         304
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         308
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         310
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         312
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         314
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         316
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         318
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         336
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         344
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         352
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         360
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 552
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z29compute_primitive_vars_kernelPdS_S_S_iiiiiiiiiiS_S_S_iS_iiiPiS_S_S_S_iiS_dS_S_S_iPciiS_iiddddii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     25
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
