#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <cuda.h>

#define N 8
// NRUNS should be < N.
#define NRUNS 2
#define NBLOCKS 2
// NTHREADS*NBLOCKS should equal N
#define NTHREADS (N/NBLOCKS)
// Also, NBLOCKS should equal NTHREADS.

// Sums an array.
__global__ void sum(int* g_idata, int* g_odata) {
      extern __shared__ int shared[];
      int i, tid = threadIdx.x;

      shared[tid] = g_idata[blockIdx.x * blockDim.x + tid];
      
      __syncthreads();

      if (tid < blockDim.x/2) {
            shared[tid] += shared[blockDim.x/2 + tid];
      }

      //__syncthreads();

      if (tid == 0) {
            for (i = 1; i != blockDim.x/2 + !!(blockDim.x % 2); ++i) {
                  shared[0] += shared[i];
            }

            g_odata[blockIdx.x] = shared[0];
      }
}

int main(int argc, char** argv) {
      int* d_idata, *d_odata, *d_scratch;
      int i;
      int h_data[N];

      // Use a different stream for every run. 
      cudaStream_t streams[NRUNS];

      printf("INPUT: ");
      for(i = 0; i != N; ++i) {
            h_data[i] = (11 + i * i) % 7;
            printf(" %d ", h_data[i]);
      }
      printf("\n");

      cudaMalloc(&d_scratch, NBLOCKS * NRUNS * sizeof(int));
      cudaMalloc(&d_idata, N * sizeof(int));
      cudaMalloc(&d_odata, NRUNS * sizeof(int));

      cudaMemcpy(d_idata, h_data, N * sizeof(int), cudaMemcpyHostToDevice);

      cudaMemset(d_odata, 0, NRUNS * sizeof(int));
      // Initializing scratch so as to test racechecking (otherwise we might
      // get errors about accessing uninitialized memory).
      //cudaMemset(d_scratch, 0, NBLOCKS * NRUNS * sizeof(int));
      
      printf("Launching %d blocks of %d threads each " 
             "to asychronously sum the list above %d times.\n", 
             NBLOCKS, NTHREADS, NRUNS);

      cudaDeviceSynchronize();
      for (i = 0; i != NRUNS; ++i) {
            cudaStreamCreate(&streams[i]);
            sum<<< NBLOCKS, NTHREADS, NTHREADS * sizeof(int), streams[i] >>>
                  (d_idata, &d_scratch[NBLOCKS * i]);
            sum<<< 1, NBLOCKS, NBLOCKS * sizeof(int), streams[i] >>>
                  (&d_scratch[NBLOCKS * i], &d_odata[i]);
      }
      cudaDeviceSynchronize();

      cudaMemcpyAsync(h_data, d_odata, NRUNS * sizeof(int), cudaMemcpyDeviceToHost, streams[0]);

      cudaStreamSynchronize(streams[0]);
      cudaDeviceSynchronize();

      printf("OUTPUT: ");
      for(i = 0; i != NRUNS; ++i) {
            cudaStreamDestroy(streams[i]);
            printf(" %d ", h_data[i]);
      }
      printf("\n");

      cudaFree(d_idata);
      cudaFree(d_odata);
      cudaFree(d_scratch);
}

	.file	"tmpxft_002ebd12_00000000-6_sum.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z24__device_stub__Z3sumPiS_PiS_
	.type	_Z24__device_stub__Z3sumPiS_PiS_, @function
_Z24__device_stub__Z3sumPiS_PiS_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z3sumPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z24__device_stub__Z3sumPiS_PiS_, .-_Z24__device_stub__Z3sumPiS_PiS_
	.globl	_Z3sumPiS_
	.type	_Z3sumPiS_, @function
_Z3sumPiS_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z24__device_stub__Z3sumPiS_PiS_
	.cfi_endproc
.LFE2053:
	.size	_Z3sumPiS_, .-_Z3sumPiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"INPUT: "
.LC1:
	.string	" %d "
.LC2:
	.string	"\n"
.LC3:
	.string	"Launching %d blocks of %d threads each to asychronously sum the list above %d times.\n"
.LC4:
	.string	"OUTPUT: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	.LC1(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L9:
	movl	%ebx, %eax
	movl	$7, %ecx
	leaq	72(%rsp), %r14
	movq	%r12, %rsi
	imull	%ebx, %eax
	movl	$2, %edi
	addl	$11, %eax
	cltd
	idivl	%ecx
	xorl	%eax, %eax
	movl	%edx, (%r14,%rbx,4)
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$8, %rbx
	jne	.L9
	leaq	.LC2(%rip), %r15
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	movq	%r15, %rsi
	leaq	56(%rsp), %rbp
	movabsq	$4294967298, %r13
	call	__printf_chk@PLT
	leaq	24(%rsp), %rdi
	movl	$16, %esi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$32, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$8, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	movl	$32, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$8, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$2, %r8d
	xorl	%eax, %eax
	movl	$4, %ecx
	movl	$2, %edx
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	call	cudaDeviceSynchronize@PLT
.L12:
	movq	%rbp, %rdi
	call	cudaStreamCreate@PLT
	movl	$1073741825, %edx
	movq	0(%rbp), %r9
	movq	%r13, %rdi
	salq	$2, %rdx
	movl	$16, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 44(%rsp)
	movl	$1, 52(%rsp)
	movq	%r13, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	8(%rsp), %rdi
	leaq	(%rbx,%rbx), %rsi
	addq	24(%rsp), %rsi
	call	_Z24__device_stub__Z3sumPiS_PiS_
.L10:
	movq	0(%rbp), %r9
	movq	%r13, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$8, %r8d
	movq	%r13, 44(%rsp)
	movl	$1, 52(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	movq	16(%rsp), %rsi
	leaq	(%rbx,%rbx), %rdi
	addq	24(%rsp), %rdi
	addq	%rbx, %rsi
	call	_Z24__device_stub__Z3sumPiS_PiS_
.L11:
	addq	$4, %rbx
	addq	$8, %rbp
	cmpq	$8, %rbx
	jne	.L12
	call	cudaDeviceSynchronize@PLT
	movq	56(%rsp), %r8
	movq	16(%rsp), %rsi
	movq	%r14, %rdi
	movl	$2, %ecx
	movl	$8, %edx
	call	cudaMemcpyAsync@PLT
	movq	56(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
	call	cudaDeviceSynchronize@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	56(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movl	72(%rsp), %edx
	movq	%r12, %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	64(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movl	76(%rsp), %edx
	movq	%r12, %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z3sumPiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3sumPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>

#define N 8
// NRUNS should be < N.
#define NRUNS 2
#define NBLOCKS 2
// NTHREADS*NBLOCKS should equal N
#define NTHREADS (N/NBLOCKS)
// Also, NBLOCKS should equal NTHREADS.

// Sums an array.
__global__ void sum(int* g_idata, int* g_odata) {
      extern __shared__ int shared[];
      int i, tid = threadIdx.x;

      shared[tid] = g_idata[blockIdx.x * blockDim.x + tid];
      
      __syncthreads();

      if (tid < blockDim.x/2) {
            shared[tid] += shared[blockDim.x/2 + tid];
      }

      //__syncthreads();

      if (tid == 0) {
            for (i = 1; i != blockDim.x/2 + !!(blockDim.x % 2); ++i) {
                  shared[0] += shared[i];
            }

            g_odata[blockIdx.x] = shared[0];
      }
}

int main(int argc, char** argv) {
      int* d_idata, *d_odata, *d_scratch;
      int i;
      int h_data[N];

      // Use a different stream for every run. 
      hipStream_t streams[NRUNS];

      printf("INPUT: ");
      for(i = 0; i != N; ++i) {
            h_data[i] = (11 + i * i) % 7;
            printf(" %d ", h_data[i]);
      }
      printf("\n");

      hipMalloc(&d_scratch, NBLOCKS * NRUNS * sizeof(int));
      hipMalloc(&d_idata, N * sizeof(int));
      hipMalloc(&d_odata, NRUNS * sizeof(int));

      hipMemcpy(d_idata, h_data, N * sizeof(int), hipMemcpyHostToDevice);

      hipMemset(d_odata, 0, NRUNS * sizeof(int));
      // Initializing scratch so as to test racechecking (otherwise we might
      // get errors about accessing uninitialized memory).
      //cudaMemset(d_scratch, 0, NBLOCKS * NRUNS * sizeof(int));
      
      printf("Launching %d blocks of %d threads each " 
             "to asychronously sum the list above %d times.\n", 
             NBLOCKS, NTHREADS, NRUNS);

      hipDeviceSynchronize();
      for (i = 0; i != NRUNS; ++i) {
            hipStreamCreate(&streams[i]);
            sum<<< NBLOCKS, NTHREADS, NTHREADS * sizeof(int), streams[i] >>>
                  (d_idata, &d_scratch[NBLOCKS * i]);
            sum<<< 1, NBLOCKS, NBLOCKS * sizeof(int), streams[i] >>>
                  (&d_scratch[NBLOCKS * i], &d_odata[i]);
      }
      hipDeviceSynchronize();

      hipMemcpyAsync(h_data, d_odata, NRUNS * sizeof(int), hipMemcpyDeviceToHost, streams[0]);

      hipStreamSynchronize(streams[0]);
      hipDeviceSynchronize();

      printf("OUTPUT: ");
      for(i = 0; i != NRUNS; ++i) {
            hipStreamDestroy(streams[i]);
            printf(" %d ", h_data[i]);
      }
      printf("\n");

      hipFree(d_idata);
      hipFree(d_odata);
      hipFree(d_scratch);
}

	.text
	.file	"sum.hip"
	.globl	_Z18__device_stub__sumPiS_      # -- Begin function _Z18__device_stub__sumPiS_
	.type	_Z18__device_stub__sumPiS_,@function
_Z18__device_stub__sumPiS_:             # @_Z18__device_stub__sumPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3sumPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__sumPiS_, .Lfunc_end0-_Z18__device_stub__sumPiS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	xorl	%ebx, %ebx
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%ebx, %eax
	imull	%eax, %eax
	leal	11(%rax), %ecx
	imulq	$613566757, %rcx, %rdx          # imm = 0x24924925
	shrq	$32, %rdx
	subl	%edx, %ecx
	shrl	%ecx
	addl	%edx, %ecx
	shrl	$2, %ecx
	leal	(,%rcx,8), %edx
	subl	%edx, %ecx
	leal	(%rax,%rcx), %esi
	addl	$11, %esi
	movl	%esi, 48(%rsp,%rbx,4)
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$8, %rbx
	jne	.LBB1_1
# %bb.2:
	movabsq	$4294967298, %rbx               # imm = 0x100000002
	movl	$10, %edi
	callq	putchar@PLT
	movq	%rsp, %rdi
	movl	$16, %esi
	callq	hipMalloc
	leaq	40(%rsp), %r14
	movl	$32, %esi
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %r15
	movl	$8, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r14), %rdi
	leaq	48(%rsp), %rsi
	movl	$32, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	xorl	%r12d, %r12d
	movl	$8, %edx
	xorl	%esi, %esi
	callq	hipMemset
	movl	$.L.str.3, %edi
	movl	$2, %esi
	movl	$4, %edx
	movl	$2, %ecx
	xorl	%eax, %eax
	callq	printf
	callq	hipDeviceSynchronize
	leaq	2(%rbx), %r14
	leaq	-1(%rbx), %r15
	xorl	%r13d, %r13d
.LBB1_3:                                # =>This Inner Loop Header: Depth=1
	leaq	(%rsp,%r12), %rdi
	addq	$16, %rdi
	callq	hipStreamCreate
	movq	16(%rsp,%r13,2), %r9
	movl	$16, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_5
# %bb.4:                                #   in Loop: Header=BB1_3 Depth=1
	movq	40(%rsp), %rdi
	movq	(%rsp), %rsi
	addq	%r12, %rsi
	callq	_Z18__device_stub__sumPiS_
.LBB1_5:                                #   in Loop: Header=BB1_3 Depth=1
	movq	16(%rsp,%r13,2), %r9
	movl	$8, %r8d
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.6:                                #   in Loop: Header=BB1_3 Depth=1
	movq	(%rsp), %rdi
	addq	%r12, %rdi
	movq	8(%rsp), %rsi
	addq	%r13, %rsi
	callq	_Z18__device_stub__sumPiS_
.LBB1_7:                                #   in Loop: Header=BB1_3 Depth=1
	addq	$4, %r13
	addq	$8, %r12
	cmpq	$8, %r13
	jne	.LBB1_3
# %bb.8:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	16(%rsp), %r8
	leaq	48(%rsp), %rdi
	movl	$8, %edx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movq	16(%rsp), %rdi
	callq	hipStreamSynchronize
	callq	hipDeviceSynchronize
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	xorl	%ebx, %ebx
.LBB1_9:                                # =>This Inner Loop Header: Depth=1
	movq	16(%rsp,%rbx,8), %rdi
	callq	hipStreamDestroy
	movl	48(%rsp,%rbx,4), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$2, %rbx
	jne	.LBB1_9
# %bb.10:
	movl	$10, %edi
	callq	putchar@PLT
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3sumPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3sumPiS_,@object              # @_Z3sumPiS_
	.section	.rodata,"a",@progbits
	.globl	_Z3sumPiS_
	.p2align	3, 0x0
_Z3sumPiS_:
	.quad	_Z18__device_stub__sumPiS_
	.size	_Z3sumPiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"INPUT: "
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" %d "
	.size	.L.str.1, 5

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Launching %d blocks of %d threads each to asychronously sum the list above %d times.\n"
	.size	.L.str.3, 86

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"OUTPUT: "
	.size	.L.str.4, 9

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3sumPiS_"
	.size	.L__unnamed_1, 11

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__sumPiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3sumPiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3sumPiS_              ; -- Begin function _Z3sumPiS_
	.globl	_Z3sumPiS_
	.p2align	8
	.type	_Z3sumPiS_,@function
_Z3sumPiS_:                             ; @_Z3sumPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s6, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_bfe_u32 s0, s6, 0xf0001
	s_mov_b32 s1, exec_lo
	global_load_b32 v2, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_8
; %bb.3:                                ; %.preheader
	v_mov_b32_e32 v0, 0
	s_and_b32 s1, s5, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s1, s0, s1
	s_cmp_eq_u32 s1, 1
	ds_load_b32 v0, v0
	s_cbranch_scc1 .LBB0_7
; %bb.4:                                ; %.lr.ph.preheader
	s_add_i32 s0, 0, 4
	s_add_i32 s1, s1, -1
.LBB0_5:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v1, s0
	s_add_i32 s1, s1, -1
	s_add_i32 s0, s0, 4
	s_cmp_lg_u32 s1, 0
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v0, v0, v1
	s_cbranch_scc1 .LBB0_5
; %bb.6:                                ; %._crit_edge
	v_mov_b32_e32 v1, 0
	ds_store_b32 v1, v0
.LBB0_7:
	s_mov_b32 s5, 0
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v1, v0, s[0:1]
.LBB0_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3sumPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3sumPiS_, .Lfunc_end0-_Z3sumPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3sumPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3sumPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
