#include <stdio.h>
#include <cuda_runtime.h>

#define blockSize 32

__global__ void matrixMul (float *A, float *B, float *C, int N) {
    float sum = 0.0;
    extern __shared__ float shared_A[];
    const int tid = threadIdx.x;
    const int row = blockIdx.x;
    const int column = threadIdx.x;
    int i, j;
    // 矩阵分块
    
    for (i = tid; i < N; i += blockDim.x) {
        shared_A[i] = A[row * N + i];
    }
    __syncthreads();

    for (i = tid; i < N; i += blockDim.x) {
        sum = 0.0;
        for (j = 0; j < N; j += 8) {
            sum += shared_A[j] * B[j * N + i];
            sum += shared_A[j + 1] * B[(j + 1)* N + i];
            sum += shared_A[j + 2] * B[(j + 2)* N + i];
            sum += shared_A[j + 3] * B[(j + 3)* N + i];
            sum += shared_A[j + 4] * B[(j + 4)* N + i];
            sum += shared_A[j + 5] * B[(j + 5)* N + i];
            sum += shared_A[j + 6] * B[(j + 6)* N + i];
            sum += shared_A[j + 7] * B[(j + 7)* N + i];
        }
        C[row * N + i] = sum;
    }

}

__host__ float matrixCPU(float *A, float *B, float *C, int N) {
    float sum;
    float wucha = 0.0;
    for (int i = 0; i < N; i++) {
        for (int j = 0; j < N; j++) {
            sum = 0.0;
            for (int k = 0; k < N; k++) {
                sum += A[i * N + k] * B[k * N + j];
            }
            wucha += (sum - C[i * N + j]) * (sum - C[i * N + j]);
        }
    }
    return wucha;
}

int main() {
    float *matrixA, *matrixB, *matrixC;
    float *dev_A, *dev_B, *dev_C;
    int N = 1024;
    int i, j;
    float milliseconds;
    int dimGrids, dimBlocks, sharedSize;
    cudaEvent_t start, stop;

    cudaEventCreate(&start);
    cudaEventCreate(&stop);

    matrixA = (float*)malloc(N*N*sizeof(float));
    matrixB = (float*)malloc(N*N*sizeof(float));
    matrixC = (float*)malloc(N*N*sizeof(float));

    cudaMalloc(&dev_A, N * N * sizeof(float));
    cudaMalloc(&dev_B, N * N * sizeof(float));
    cudaMalloc(&dev_C, N * N * sizeof(float));

    for (i = 0; i < N; i++) {
        for (j = 0; j < N; j++) {
            matrixA[i * N + j] = 1.0;
            matrixB[i * N + j] = 1.0;
        }
    }

    if (N <= 1024) {
        dimBlocks = N;
        dimGrids = N;
    } else {
        dimGrids = N * N / 1024;
        dimBlocks = 1024;
    }
    sharedSize = N * sizeof(float); 

    cudaMemcpy(dev_A, matrixA, N * N * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(dev_B, matrixB, N * N * sizeof(float), cudaMemcpyHostToDevice);

    dim3 blocks(N / blockSize, N / blockSize);
    dim3 threads(blockSize, blockSize);

    cudaEventRecord(start);
    matrixMul<<<dimGrids, dimBlocks, sharedSize>>>(dev_A, dev_B, dev_C, N);
    cudaEventRecord(stop);
    cudaEventSynchronize(stop);
    cudaEventElapsedTime(&milliseconds, start, stop);

    cudaMemcpy(matrixC, dev_C, N * N * sizeof(float), cudaMemcpyDeviceToHost);
    printf("C[0,0] is %f\n", matrixC[2]);
    printf("The time used is %fms\n", milliseconds);
    // printf("wucha is %f\n", matrixCPU(matrixA, matrixB, matrixC, N));
    cudaFree(dev_A);
    cudaFree(dev_B);
    cudaFree(dev_C);
    free(matrixA);
    free(matrixB);
    free(matrixC);

}

	.file	"tmpxft_00235a8f_00000000-6_matrixMul-v1.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9matrixCPUPfS_S_i
	.type	_Z9matrixCPUPfS_S_i, @function
_Z9matrixCPUPfS_S_i:
.LFB2027:
	.cfi_startproc
	endbr64
	movq	%rsi, %r11
	xorl	%r9d, %r9d
	movslq	%ecx, %rsi
	movq	%rdi, %r10
	salq	$2, %rsi
	xorl	%edi, %edi
	xorps	%xmm1, %xmm1
	cmpl	%ecx, %r9d
	jl	.L12
	movaps	%xmm1, %xmm0
	ret
.L12:
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
.L7:
	xorl	%eax, %eax
	leaq	(%r10,%rdi), %rbp
	leaq	(%rdx,%rdi), %r12
.L6:
	leaq	(%r11,%rax,4), %rbx
	xorl	%r8d, %r8d
	xorps	%xmm0, %xmm0
.L4:
	movss	0(%rbp,%r8,4), %xmm2
	mulss	(%rbx), %xmm2
	incq	%r8
	addq	%rsi, %rbx
	addss	%xmm2, %xmm0
	cmpl	%r8d, %ecx
	jg	.L4
	subss	(%r12,%rax,4), %xmm0
	incq	%rax
	mulss	%xmm0, %xmm0
	addss	%xmm0, %xmm1
	cmpl	%eax, %ecx
	jg	.L6
	incl	%r9d
	addq	%rsi, %rdi
	cmpl	%ecx, %r9d
	jl	.L7
	popq	%rbx
	.cfi_def_cfa_offset 24
	movaps	%xmm1, %xmm0
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z9matrixCPUPfS_S_i, .-_Z9matrixCPUPfS_S_i
	.globl	_Z33__device_stub__Z9matrixMulPfS_S_iPfS_S_i
	.type	_Z33__device_stub__Z9matrixMulPfS_S_iPfS_S_i, @function
_Z33__device_stub__Z9matrixMulPfS_S_iPfS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9matrixMulPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L14:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z33__device_stub__Z9matrixMulPfS_S_iPfS_S_i, .-_Z33__device_stub__Z9matrixMulPfS_S_iPfS_S_i
	.globl	_Z9matrixMulPfS_S_i
	.type	_Z9matrixMulPfS_S_i, @function
_Z9matrixMulPfS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z9matrixMulPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2054:
	.size	_Z9matrixMulPfS_S_i, .-_Z9matrixMulPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"C[0,0] is %f\n"
.LC3:
	.string	"The time used is %fms\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$4194304, %edi
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$4194304, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	movss	.LC1(%rip), %xmm0
	xorl	%edx, %edx
.L20:
	movq	%rdx, %rax
	xorl	%ecx, %ecx
.L21:
	incl	%ecx
	movss	%xmm0, (%r12,%rax)
	movss	%xmm0, 0(%rbp,%rax)
	addq	$4, %rax
	cmpl	$1024, %ecx
	jne	.L21
	addq	$4096, %rdx
	cmpq	$4194304, %rdx
	jne	.L20
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$4194304, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	movl	$4096, %r8d
	salq	$10, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 68(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 60(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1024, %ecx
	movq	8(%rsp), %rdi
	call	_Z33__device_stub__Z9matrixMulPfS_S_iPfS_S_i
.L23:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	60(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	8(%rbx), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	leaq	.LC3(%rip), %rsi
	movb	$1, %al
	cvtss2sd	60(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z9matrixMulPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9matrixMulPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>

#define blockSize 32

__global__ void matrixMul (float *A, float *B, float *C, int N) {
    float sum = 0.0;
    extern __shared__ float shared_A[];
    const int tid = threadIdx.x;
    const int row = blockIdx.x;
    const int column = threadIdx.x;
    int i, j;
    // 矩阵分块
    
    for (i = tid; i < N; i += blockDim.x) {
        shared_A[i] = A[row * N + i];
    }
    __syncthreads();

    for (i = tid; i < N; i += blockDim.x) {
        sum = 0.0;
        for (j = 0; j < N; j += 8) {
            sum += shared_A[j] * B[j * N + i];
            sum += shared_A[j + 1] * B[(j + 1)* N + i];
            sum += shared_A[j + 2] * B[(j + 2)* N + i];
            sum += shared_A[j + 3] * B[(j + 3)* N + i];
            sum += shared_A[j + 4] * B[(j + 4)* N + i];
            sum += shared_A[j + 5] * B[(j + 5)* N + i];
            sum += shared_A[j + 6] * B[(j + 6)* N + i];
            sum += shared_A[j + 7] * B[(j + 7)* N + i];
        }
        C[row * N + i] = sum;
    }

}

__host__ float matrixCPU(float *A, float *B, float *C, int N) {
    float sum;
    float wucha = 0.0;
    for (int i = 0; i < N; i++) {
        for (int j = 0; j < N; j++) {
            sum = 0.0;
            for (int k = 0; k < N; k++) {
                sum += A[i * N + k] * B[k * N + j];
            }
            wucha += (sum - C[i * N + j]) * (sum - C[i * N + j]);
        }
    }
    return wucha;
}

int main() {
    float *matrixA, *matrixB, *matrixC;
    float *dev_A, *dev_B, *dev_C;
    int N = 1024;
    int i, j;
    float milliseconds;
    int dimGrids, dimBlocks, sharedSize;
    hipEvent_t start, stop;

    hipEventCreate(&start);
    hipEventCreate(&stop);

    matrixA = (float*)malloc(N*N*sizeof(float));
    matrixB = (float*)malloc(N*N*sizeof(float));
    matrixC = (float*)malloc(N*N*sizeof(float));

    hipMalloc(&dev_A, N * N * sizeof(float));
    hipMalloc(&dev_B, N * N * sizeof(float));
    hipMalloc(&dev_C, N * N * sizeof(float));

    for (i = 0; i < N; i++) {
        for (j = 0; j < N; j++) {
            matrixA[i * N + j] = 1.0;
            matrixB[i * N + j] = 1.0;
        }
    }

    if (N <= 1024) {
        dimBlocks = N;
        dimGrids = N;
    } else {
        dimGrids = N * N / 1024;
        dimBlocks = 1024;
    }
    sharedSize = N * sizeof(float); 

    hipMemcpy(dev_A, matrixA, N * N * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(dev_B, matrixB, N * N * sizeof(float), hipMemcpyHostToDevice);

    dim3 blocks(N / blockSize, N / blockSize);
    dim3 threads(blockSize, blockSize);

    hipEventRecord(start);
    matrixMul<<<dimGrids, dimBlocks, sharedSize>>>(dev_A, dev_B, dev_C, N);
    hipEventRecord(stop);
    hipEventSynchronize(stop);
    hipEventElapsedTime(&milliseconds, start, stop);

    hipMemcpy(matrixC, dev_C, N * N * sizeof(float), hipMemcpyDeviceToHost);
    printf("C[0,0] is %f\n", matrixC[2]);
    printf("The time used is %fms\n", milliseconds);
    // printf("wucha is %f\n", matrixCPU(matrixA, matrixB, matrixC, N));
    hipFree(dev_A);
    hipFree(dev_B);
    hipFree(dev_C);
    free(matrixA);
    free(matrixB);
    free(matrixC);

}

	.text
	.file	"matrixMul-v1.hip"
	.globl	_Z24__device_stub__matrixMulPfS_S_i # -- Begin function _Z24__device_stub__matrixMulPfS_S_i
	.type	_Z24__device_stub__matrixMulPfS_S_i,@function
_Z24__device_stub__matrixMulPfS_S_i:    # @_Z24__device_stub__matrixMulPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9matrixMulPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__matrixMulPfS_S_i, .Lfunc_end0-_Z24__device_stub__matrixMulPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z9matrixCPUPfS_S_i             # -- Begin function _Z9matrixCPUPfS_S_i
	.type	_Z9matrixCPUPfS_S_i,@function
_Z9matrixCPUPfS_S_i:                    # @_Z9matrixCPUPfS_S_i
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB1_1
# %bb.3:                                # %.preheader34.lr.ph
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%ecx, %eax
	leaq	(,%rax,4), %r8
	xorps	%xmm0, %xmm0
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
.LBB1_4:                                # %.preheader.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_5 Depth 2
                                        #       Child Loop BB1_6 Depth 3
	movl	%r9d, %r11d
	leaq	(%rdi,%r11,4), %r11
	movq	%r10, %rbx
	imulq	%rax, %rbx
	leaq	(%rdx,%rbx,4), %rbx
	movq	%rsi, %r14
	xorl	%r15d, %r15d
.LBB1_5:                                # %.preheader
                                        #   Parent Loop BB1_4 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_6 Depth 3
	xorps	%xmm1, %xmm1
	movq	%r14, %r12
	xorl	%r13d, %r13d
.LBB1_6:                                #   Parent Loop BB1_4 Depth=1
                                        #     Parent Loop BB1_5 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r11,%r13,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	mulss	(%r12), %xmm2
	addss	%xmm2, %xmm1
	incq	%r13
	addq	%r8, %r12
	cmpq	%r13, %rax
	jne	.LBB1_6
# %bb.7:                                # %._crit_edge
                                        #   in Loop: Header=BB1_5 Depth=2
	subss	(%rbx,%r15,4), %xmm1
	mulss	%xmm1, %xmm1
	addss	%xmm1, %xmm0
	incq	%r15
	addq	$4, %r14
	cmpq	%rax, %r15
	jne	.LBB1_5
# %bb.8:                                # %._crit_edge39
                                        #   in Loop: Header=BB1_4 Depth=1
	incq	%r10
	addl	%ecx, %r9d
	cmpq	%rax, %r10
	jne	.LBB1_4
# %bb.9:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	retq
.LBB1_1:
	xorps	%xmm0, %xmm0
	retq
.Lfunc_end1:
	.size	_Z9matrixCPUPfS_S_i, .Lfunc_end1-_Z9matrixCPUPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %rbx
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r14
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r15
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	xorl	%eax, %eax
	movl	$1065353216, %ecx               # imm = 0x3F800000
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rsi
	movq	%r14, %rdi
.LBB2_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	xorl	%r8d, %r8d
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%ecx, (%rsi,%r8,4)
	movl	%ecx, (%rdi,%r8,4)
	incq	%r8
	cmpq	$1024, %r8                      # imm = 0x400
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%rax
	addq	%rdx, %rdi
	addq	%rdx, %rsi
	cmpq	$1024, %rax                     # imm = 0x400
	jne	.LBB2_1
# %bb.4:
	movq	32(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$4294968320, %rdi               # imm = 0x100000400
	movl	$4096, %r8d                     # imm = 0x1000
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	$1024, %ecx                     # imm = 0x400
	callq	_Z24__device_stub__matrixMulPfS_S_i
.LBB2_6:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	40(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	52(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movq	16(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	cvtss2sd	8(%r15), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9matrixMulPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9matrixMulPfS_S_i,@object     # @_Z9matrixMulPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z9matrixMulPfS_S_i
	.p2align	3, 0x0
_Z9matrixMulPfS_S_i:
	.quad	_Z24__device_stub__matrixMulPfS_S_i
	.size	_Z9matrixMulPfS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"C[0,0] is %f\n"
	.size	.L.str, 14

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"The time used is %fms\n"
	.size	.L.str.1, 23

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9matrixMulPfS_S_i"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__matrixMulPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9matrixMulPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9matrixMulPfS_S_i     ; -- Begin function _Z9matrixMulPfS_S_i
	.globl	_Z9matrixMulPfS_S_i
	.p2align	8
	.type	_Z9matrixMulPfS_S_i,@function
_Z9matrixMulPfS_S_i:                    ; @_Z9matrixMulPfS_S_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s3, v0
	s_mul_i32 s15, s15, s3
	s_and_saveexec_b32 s10, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s2, s[0:1], 0x2c
	v_lshl_add_u32 v1, v0, 2, 0
	v_mov_b32_e32 v2, v0
	s_mov_b32 s12, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s11, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s13, s11, 2
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v3, s15, v2
	v_add_nc_u32_e32 v2, s11, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s2, s4, v3
	v_add_co_ci_u32_e64 v4, s2, s5, v4, s2
	v_cmp_le_i32_e64 s2, s3, v2
	global_load_b32 v3, v[3:4], off
	s_or_b32 s12, s2, s12
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v3
	v_add_nc_u32_e32 v1, s13, v1
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow105
	s_or_b32 exec_lo, exec_lo, s10
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_8
; %bb.4:                                ; %.preheader.lr.ph
	s_load_b32 s0, s[0:1], 0x2c
	s_lshl_b32 s1, s3, 3
	s_lshl_b32 s2, s3, 1
	s_mul_i32 s4, s3, 3
	s_lshl_b32 s5, s3, 2
	s_mul_i32 s10, s3, 5
	s_mul_i32 s11, s3, 6
	s_mul_i32 s12, s3, 7
	s_mov_b32 s14, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s13, s0, 0xffff
.LBB0_5:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v1, v0
	s_mov_b32 s0, 0
	s_mov_b32 s16, 0
.LBB0_6:                                ; %.lr.ph78
                                        ;   Parent Loop BB0_5 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_nc_u32_e32 v4, s3, v1
	v_add_nc_u32_e32 v12, s10, v1
	v_add_nc_u32_e32 v16, s12, v1
	s_add_i32 s16, s16, 8
	v_lshlrev_b64 v[18:19], 2, v[1:2]
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v13, 31, v12
	v_ashrrev_i32_e32 v17, 31, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v18, vcc_lo, s6, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s7, v19, vcc_lo
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_u32 v4, vcc_lo, s6, v4
	global_load_b32 v2, v[18:19], off
	v_add_nc_u32_e32 v6, s2, v1
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	global_load_b32 v18, v[4:5], off
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, s6, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	global_load_b32 v19, v[6:7], off
	v_add_nc_u32_e32 v8, s4, v1
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v4, vcc_lo, s6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v9, vcc_lo
	global_load_b32 v20, v[4:5], off
	v_add_nc_u32_e32 v10, s5, v1
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	v_add_co_u32 v6, vcc_lo, s6, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v11, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v12
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v13, vcc_lo
	s_clause 0x1
	global_load_b32 v12, v[6:7], off
	global_load_b32 v13, v[4:5], off
	v_add_nc_u32_e32 v14, s11, v1
	v_dual_mov_b32 v10, s0 :: v_dual_add_nc_u32 v1, s1, v1
	s_add_i32 s0, s0, 32
	s_cmp_lt_i32 s16, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v15, 31, v14
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s6, v14
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v15, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v16
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v17, vcc_lo
	s_clause 0x1
	global_load_b32 v14, v[6:7], off
	global_load_b32 v15, v[4:5], off
	ds_load_2addr_b32 v[4:5], v10 offset1:1
	ds_load_2addr_b32 v[6:7], v10 offset0:2 offset1:3
	ds_load_2addr_b32 v[8:9], v10 offset0:4 offset1:5
	ds_load_2addr_b32 v[10:11], v10 offset0:6 offset1:7
	s_waitcnt vmcnt(7) lgkmcnt(3)
	v_fmac_f32_e32 v3, v4, v2
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v5, v18
	s_waitcnt vmcnt(5) lgkmcnt(2)
	v_fmac_f32_e32 v3, v6, v19
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v7, v20
	s_waitcnt vmcnt(3) lgkmcnt(1)
	v_fmac_f32_e32 v3, v8, v12
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v9, v13
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_fmac_f32_e32 v3, v10, v14
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v3, v11, v15
	s_cbranch_scc1 .LBB0_6
; %bb.7:                                ; %._crit_edge79
                                        ;   in Loop: Header=BB0_5 Depth=1
	v_add_nc_u32_e32 v1, s15, v0
	v_add_nc_u32_e32 v0, s13, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_cmp_le_i32_e32 vcc_lo, s3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_or_b32 s14, vcc_lo, s14
	v_add_co_u32 v1, s0, s8, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s0, s9, v2, s0
	global_store_b32 v[1:2], v3, off
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB0_5
.LBB0_8:                                ; %._crit_edge81
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9matrixMulPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 21
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9matrixMulPfS_S_i, .Lfunc_end0-_Z9matrixMulPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 828
; NumSgprs: 19
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 21
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9matrixMulPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     19
    .sgpr_spill_count: 0
    .symbol:         _Z9matrixMulPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     21
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
