/* This program implements the histogram functionality efficiently.
 * In this implementation, each block maintains a table in which each thread keeps
 * count for each BIN_COUNT individually.
 * Threads then calculate the sum of each BIN_COUNT and store it in a shared array, of size BIN_COUNT,
 * holding block's output. 
 * Each BIN_COUNT's sum is atomically added to the final output array holding final count
 * of each bin.
 * The maximum performance was observed for number of blocks as 8 x multiprocessors on GPU and number
 * of threads as the BIN_COUNT. 
 * Restriction - BIN_COUNT max can be 64, due to shared memory restriction.
 *
 *
 * 
 * code by Anand Goyal. Dated : 12/13/2014
*/

#include<stdio.h>
#include<cuda.h>
#include<time.h>
#include<sys/time.h>

#define SIZE 10000000
#define BIN_COUNT 64

__global__ void histKernel(char *inData, long size, unsigned int *histo)
{
	__shared__ unsigned int temp[BIN_COUNT][BIN_COUNT];
	__shared__ unsigned int blockSum[BIN_COUNT];
	int i = 0;

	while(i < BIN_COUNT) 
		temp[i++][threadIdx.x] = 0;

	__syncthreads();

	int tid = threadIdx.x + blockIdx.x * blockDim.x;
	int offset = blockDim.x * gridDim.x;

	while(tid < size) {
		temp[(int)inData[tid]][threadIdx.x]++;
		tid += offset;
	}

	__syncthreads();

	i = 0;
	while(i < BIN_COUNT)
		blockSum[threadIdx.x] += temp[threadIdx.x][i++];

	__syncthreads();

	atomicAdd(&(histo[threadIdx.x]), blockSum[threadIdx.x]);
}

int main()
{
	char *buffer, *dev_buf;
	unsigned int *hist, *dev_hist;
	int i, block; 
	long count = 0;
	float timer;

	cudaEvent_t start, stop;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);

	buffer = (char *)malloc(sizeof(char) * SIZE);
	hist = (unsigned int *)malloc(sizeof(unsigned int) * BIN_COUNT);
	cudaMalloc((void **)&dev_buf, sizeof(char) * SIZE);
	cudaMalloc((void **)&dev_hist, sizeof(unsigned int) * BIN_COUNT);
	cudaMemset(dev_hist, 0, BIN_COUNT * sizeof(unsigned int));

	srand(time(NULL));
	for(i = 0; i < SIZE; i++) {
		buffer[i] = (char)(rand()%64);
	}

	cudaDeviceProp prop;
	cudaGetDeviceProperties(&prop, 0);
	block = prop.multiProcessorCount;

	cudaEventRecord(start, 0);

	cudaMemcpy(dev_buf, buffer, SIZE * sizeof(char), cudaMemcpyHostToDevice);
	histKernel<<<block*8, BIN_COUNT>>>(dev_buf, SIZE, dev_hist);
	cudaMemcpy(hist, dev_hist, BIN_COUNT * sizeof(unsigned int), cudaMemcpyDeviceToHost);

	cudaEventRecord(stop, 0);
	cudaEventSynchronize(stop);
	cudaEventElapsedTime(&timer, start, stop);

	for(i = 0; i < BIN_COUNT; i++) {
		if(hist[i] != 0) {
//			printf("Hist[%d] = %d\n", i, hist[i]); 
			count += hist[i];
		}
	}

//	printf("Hist count = %ld\n", count);
	printf("Time to scan matrix:  %3.1f ms \n", timer);
	cudaFree(dev_buf);
	cudaFree(dev_hist);
	free(buffer);
	free(hist);
	
	return 0;
}

	.file	"tmpxft_002ce2af_00000000-6_histogram.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z33__device_stub__Z10histKernelPclPjPclPj
	.type	_Z33__device_stub__Z10histKernelPclPjPclPj, @function
_Z33__device_stub__Z10histKernelPclPjPclPj:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10histKernelPclPj(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z33__device_stub__Z10histKernelPclPjPclPj, .-_Z33__device_stub__Z10histKernelPclPjPclPj
	.globl	_Z10histKernelPclPj
	.type	_Z10histKernelPclPj, @function
_Z10histKernelPclPj:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z10histKernelPclPjPclPj
	.cfi_endproc
.LFE2053:
	.size	_Z10histKernelPclPj, .-_Z10histKernelPclPj
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Time to scan matrix:  %3.1f ms \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$64, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$1112, %rsp
	.cfi_def_cfa_offset 1152
	movq	%fs:40, %rax
	movq	%rax, 1096(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$10000000, %edi
	call	malloc@PLT
	movl	$256, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$10000000, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$256, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$256, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L9:
	call	rand@PLT
	cltd
	idivl	%r13d
	movb	%dl, (%rbx,%r12)
	incq	%r12
	cmpq	$10000000, %r12
	jne	.L9
	xorl	%esi, %esi
	leaq	64(%rsp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	movl	452(%rsp), %r12d
	call	cudaEventRecord@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$10000000, %edx
	sall	$3, %r12d
	call	cudaMemcpy@PLT
	movl	%r12d, 40(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$67108865, %edx
	movl	$1, %ecx
	movl	$1, 60(%rsp)
	movq	%rax, 44(%rsp)
	movq	40(%rsp), %rdi
	salq	$6, %rdx
	movl	48(%rsp), %esi
	movq	%rdx, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rdi
	movl	$10000000, %esi
	call	_Z33__device_stub__Z10histKernelPclPjPclPj
.L10:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$256, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	32(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	leaq	52(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	52(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	1096(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$1112, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC1:
	.string	"_Z10histKernelPclPj"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10histKernelPclPj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* This program implements the histogram functionality efficiently.
 * In this implementation, each block maintains a table in which each thread keeps
 * count for each BIN_COUNT individually.
 * Threads then calculate the sum of each BIN_COUNT and store it in a shared array, of size BIN_COUNT,
 * holding block's output. 
 * Each BIN_COUNT's sum is atomically added to the final output array holding final count
 * of each bin.
 * The maximum performance was observed for number of blocks as 8 x multiprocessors on GPU and number
 * of threads as the BIN_COUNT. 
 * Restriction - BIN_COUNT max can be 64, due to shared memory restriction.
 *
 *
 * 
 * code by Anand Goyal. Dated : 12/13/2014
*/

#include<stdio.h>
#include<hip/hip_runtime.h>
#include<time.h>
#include<sys/time.h>

#define SIZE 10000000
#define BIN_COUNT 64

__global__ void histKernel(char *inData, long size, unsigned int *histo)
{
	__shared__ unsigned int temp[BIN_COUNT][BIN_COUNT];
	__shared__ unsigned int blockSum[BIN_COUNT];
	int i = 0;

	while(i < BIN_COUNT) 
		temp[i++][threadIdx.x] = 0;

	__syncthreads();

	int tid = threadIdx.x + blockIdx.x * blockDim.x;
	int offset = blockDim.x * gridDim.x;

	while(tid < size) {
		temp[(int)inData[tid]][threadIdx.x]++;
		tid += offset;
	}

	__syncthreads();

	i = 0;
	while(i < BIN_COUNT)
		blockSum[threadIdx.x] += temp[threadIdx.x][i++];

	__syncthreads();

	atomicAdd(&(histo[threadIdx.x]), blockSum[threadIdx.x]);
}

int main()
{
	char *buffer, *dev_buf;
	unsigned int *hist, *dev_hist;
	int i, block; 
	long count = 0;
	float timer;

	hipEvent_t start, stop;
	hipEventCreate(&start);
	hipEventCreate(&stop);

	buffer = (char *)malloc(sizeof(char) * SIZE);
	hist = (unsigned int *)malloc(sizeof(unsigned int) * BIN_COUNT);
	hipMalloc((void **)&dev_buf, sizeof(char) * SIZE);
	hipMalloc((void **)&dev_hist, sizeof(unsigned int) * BIN_COUNT);
	hipMemset(dev_hist, 0, BIN_COUNT * sizeof(unsigned int));

	srand(time(NULL));
	for(i = 0; i < SIZE; i++) {
		buffer[i] = (char)(rand()%64);
	}

	hipDeviceProp_t prop;
	hipGetDeviceProperties(&prop, 0);
	block = prop.multiProcessorCount;

	hipEventRecord(start, 0);

	hipMemcpy(dev_buf, buffer, SIZE * sizeof(char), hipMemcpyHostToDevice);
	histKernel<<<block*8, BIN_COUNT>>>(dev_buf, SIZE, dev_hist);
	hipMemcpy(hist, dev_hist, BIN_COUNT * sizeof(unsigned int), hipMemcpyDeviceToHost);

	hipEventRecord(stop, 0);
	hipEventSynchronize(stop);
	hipEventElapsedTime(&timer, start, stop);

	for(i = 0; i < BIN_COUNT; i++) {
		if(hist[i] != 0) {
//			printf("Hist[%d] = %d\n", i, hist[i]); 
			count += hist[i];
		}
	}

//	printf("Hist count = %ld\n", count);
	printf("Time to scan matrix:  %3.1f ms \n", timer);
	hipFree(dev_buf);
	hipFree(dev_hist);
	free(buffer);
	free(hist);
	
	return 0;
}

	.text
	.file	"histogram.hip"
	.globl	_Z25__device_stub__histKernelPclPj # -- Begin function _Z25__device_stub__histKernelPclPj
	.type	_Z25__device_stub__histKernelPclPj,@function
_Z25__device_stub__histKernelPclPj:     # @_Z25__device_stub__histKernelPclPj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10histKernelPclPj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__histKernelPclPj, .Lfunc_end0-_Z25__device_stub__histKernelPclPj
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$1520, %rsp                     # imm = 0x5F0
	.cfi_def_cfa_offset 1552
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	32(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$10000000, %edi                 # imm = 0x989680
	callq	malloc
	movq	%rax, %rbx
	movl	$256, %edi                      # imm = 0x100
	callq	malloc
	movq	%rax, %r14
	leaq	24(%rsp), %rdi
	movl	$10000000, %esi                 # imm = 0x989680
	callq	hipMalloc
	leaq	16(%rsp), %r15
	movl	$256, %esi                      # imm = 0x100
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	xorl	%r15d, %r15d
	movl	$256, %edx                      # imm = 0x100
	xorl	%esi, %esi
	callq	hipMemset
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	63(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$192, %ecx
	subl	%ecx, %eax
	movb	%al, (%rbx,%r15)
	incq	%r15
	cmpq	$10000000, %r15                 # imm = 0x989680
	jne	.LBB1_1
# %bb.2:
	leaq	48(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movl	388(%r15), %r15d
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	movl	$10000000, %edx                 # imm = 0x989680
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	shll	$3, %r15d
	btsq	$32, %r15
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$64, %rdx
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rdx
	movl	$10000000, %esi                 # imm = 0x989680
	callq	_Z25__device_stub__histKernelPclPj
.LBB1_4:
	movq	16(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	44(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$1520, %rsp                     # imm = 0x5F0
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10histKernelPclPj, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10histKernelPclPj,@object     # @_Z10histKernelPclPj
	.section	.rodata,"a",@progbits
	.globl	_Z10histKernelPclPj
	.p2align	3, 0x0
_Z10histKernelPclPj:
	.quad	_Z25__device_stub__histKernelPclPj
	.size	_Z10histKernelPclPj, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Time to scan matrix:  %3.1f ms \n"
	.size	.L.str, 33

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10histKernelPclPj"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__histKernelPclPj
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10histKernelPclPj
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10histKernelPclPj     ; -- Begin function _Z10histKernelPclPj
	.globl	_Z10histKernelPclPj
	.p2align	8
	.type	_Z10histKernelPclPj,@function
_Z10histKernelPclPj:                    ; @_Z10histKernelPclPj
; %bb.0:
	v_lshlrev_b32_e32 v5, 2, v0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, 0
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v2, s2, v5
	s_addk_i32 s2, 0x100
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s2, 0x4000
	ds_store_b32 v2, v1
	s_cbranch_scc1 .LBB0_1
; %bb.2:
	s_clause 0x2
	s_load_b32 s8, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_add_u32 s0, s0, 24
	s_addc_u32 s1, s1, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 s9, s8, 0xffff
	s_mov_b32 s8, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_cmpx_gt_i64_e64 s[6:7], v[1:2]
	s_cbranch_execz .LBB0_5
; %bb.3:                                ; %.lr.ph.preheader
	s_load_b32 s0, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s15, s15, s0
	s_mul_i32 s0, s0, s9
	v_mad_u64_u32 v[3:4], null, s15, s9, v[0:1]
	s_ashr_i32 s1, s0, 31
	s_mov_b32 s9, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_sub_co_u32 v3, vcc_lo, v3, s0
	v_subrev_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
.LBB0_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, v3, s0
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_i8 v1, v[1:2], off
	v_ashrrev_i32_e32 v2, 31, v3
	v_cmp_le_i64_e32 vcc_lo, s[6:7], v[3:4]
	s_or_b32 s9, vcc_lo, s9
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v6, v1, 8, v5
	ds_load_b32 v1, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v7, 1, v1
	v_mov_b32_e32 v1, v3
	ds_store_b32 v6, v7
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_4
.LBB0_5:                                ; %Flow34
	s_or_b32 exec_lo, exec_lo, s8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v2, v5 offset:16384
	v_or_b32_e32 v1, 0x4000, v5
	v_lshlrev_b32_e32 v0, 8, v0
	s_mov_b32 s0, 0
.LBB0_6:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v3, s0, v0
	s_add_i32 s0, s0, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s0, 0x100
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v2, v3
	s_cbranch_scc1 .LBB0_6
; %bb.7:
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v0, v1
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u32 v5, v0, s[2:3]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10histKernelPclPj
		.amdhsa_group_segment_fixed_size 16640
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10histKernelPclPj, .Lfunc_end0-_Z10histKernelPclPj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 428
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 16640 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 16640
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10histKernelPclPj
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10histKernelPclPj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
