#include <iostream>
#include <fstream>
#include <cuda.h>
#include <time.h>
#include <stdlib.h>
#include <math.h>
using namespace std;

#define PI 3.14159265
__host__ void readdata(double **ArrayX,double **ArrayF,double *Arrayq)
{
    
    
}
__device__ double sinc(double x)
{
	if(x==0)
		return 1;
	else return sin(x)/x;
}
//since max number of threads is 1024 per block which is smaller than 214*214
//so separate the calculation,214 x blocks and 214 threads for each of 60 y blocks
//by which I can use shared memory to do reducation
 
__global__ void cal_output_first(double *ArrayF,double *Arrayq,double *dist,double *output_first)
{
    int i,j,k;
    i=threadIdx.x;
    j=blockIdx.x;
    k=blockIdx.y;
    __shared__ double sdata[214];

    int tid=threadIdx.x;
	if(threadIdx.x<214&&blockIdx.y<60&&blockIdx.x<214)
{
	sdata[tid]=ArrayF[i+214*k]*ArrayF[j+214*k]*sinc(Arrayq[k]*dist[i+214*j]);
    __syncthreads();
    double sum=0;

    for(int m=0;m<214;m++)
    {
        sum+=sdata[m];
        __syncthreads();
    }
    if(tid==0)
	output_first[blockIdx.x+blockIdx.y*blockDim.x]=sum;
}
}
//calculate sum of remaining 214 value for outputq[60]
//214 threads and 60 x blocks
__global__ void cal_output_second(double *output_first,double *outputQ)
{
    int i,k;
    i=threadIdx.x;
    k=blockIdx.x;
    __shared__ double sdata[214]; 
if(threadIdx.x<214&&blockIdx.x<60)
{
    int tid=threadIdx.x;
        sdata[tid]=output_first[i+214*k];
    __syncthreads();
    double sum=0;

    for(int m=0;m<214;m++)
    {
        sum+=sdata[m];
        __syncthreads();
    }
    if(tid==0)
        outputQ[blockIdx.x]=sum;
}
}
__global__ void cal_dist(double *ArrayX,double *dist)
{
    int i,j;
    i=threadIdx.x;
    j=blockIdx.x;
if(i<214&&j<214)
{
    double temp1,temp2,temp3;
    temp1=(ArrayX[i]-ArrayX[j])*(ArrayX[i]-ArrayX[j]);
    temp2=(ArrayX[i+214]-ArrayX[j+214])*(ArrayX[i+214]-ArrayX[j+214]);
    temp3=(ArrayX[i+428]-ArrayX[j+428])*(ArrayX[i+428]-ArrayX[j+428]);
	
    dist[i+214*j]=sqrt(temp1+temp2+temp3);

//printf("temp is %d",temp);
}
}
int main()
{
    cudaEvent_t start = 0;
    cudaEvent_t stop = 0;
    float time = 0;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);
    double ArrayF[214*60],Arrayq[60],ArrayX[214*3],outputQ[60];
    int i,j;
    int sizeF=214*60,sizeq=60,sizeX=214*3;
    int sizeQ=60,sizedist=214*214;
    ifstream F("dataF.txt"),q("dataq.txt"),X("dataX.txt");
   
    for(j=0;j<3;j++)
        for(i=0;i<214;i++)
        {
            X>>ArrayX[i+j*214];
        }
    for(j=0;j<60;j++)
        for(i=0;i<214;i++)
        {
            
            F>>ArrayF[i+214*j];
        }
    
    for(j=0;j<60;j++)
    {
        q>>Arrayq[j];
        //cout<<Arrayq[1][j]<<endl;
    }
    //calculate distance dist[214*214]
    int dsizeX=sizeX*sizeof(double);
    int dsizedist=sizedist*sizeof(double);
    int dsizeF=sizeF*sizeof(double);
    int dsizeq=sizeq*sizeof(double);
    int dsizeQ=sizeQ*sizeof(double);
    int dsize_first=214*60*sizeof(double);
    double *d_dist,*d_ArrayX,*d_ArrayF,*d_Arrayq,*d_outputQ;
    double *d_output_first;
    //cudaEventRecord(start,0);
    cudaMalloc((void**)&d_dist,dsizedist);
    cudaMalloc((void**)&d_ArrayX,dsizeX);
    cudaMalloc((void**)&d_ArrayF,dsizeF);
    cudaMalloc((void**)&d_Arrayq,dsizeq);
    cudaMalloc((void**)&d_outputQ,dsizeQ);
    //allocate memory for output_first
    cudaMalloc((void**)&d_output_first,dsize_first);
    cudaMemcpy(d_ArrayX,&ArrayX,dsizeX,cudaMemcpyHostToDevice);
    cudaMemcpy(d_ArrayF,&ArrayF,dsizeF,cudaMemcpyHostToDevice);
    cudaMemcpy(d_Arrayq,&Arrayq,dsizeq,cudaMemcpyHostToDevice);
    cudaMemcpy(d_outputQ,&outputQ,dsizeQ,cudaMemcpyHostToDevice);
    dim3 DimGrid1(256,1,1);
    dim3 DimBlock1(256, 1,1);
    dim3 DimGrid2(256,64,1);
    dim3 DimBlock2(256, 1,1);
    dim3 DimGrid3(64,1,1);
    dim3 DimBlock3(256, 1,1);
    cudaEventRecord(start,0);
    cal_dist<<<DimGrid1,DimBlock1>>>(d_ArrayX,d_dist);
    //cudaEventRecord(stop,0);
    //cudaEventSynchronize(stop);
    cudaThreadSynchronize();
    cal_output_first<<<DimGrid2,DimBlock2>>>(d_ArrayF,d_Arrayq,d_dist,d_output_first);
    //output_first size 214*60
    //calculate output
    cal_output_second<<<DimGrid3,DimBlock3>>>(d_output_first,d_outputQ);
    //cudaMemcpy(&outputQ,d_outputQ,dsizeQ,cudaMemcpyDeviceToHost);
    cudaEventRecord(stop,0);
    cudaEventSynchronize(stop);
    cudaMemcpy(&outputQ,d_outputQ,dsizeQ,cudaMemcpyDeviceToHost);
    cudaFree(d_dist);
    cudaFree(d_ArrayX);
    cudaFree(d_ArrayF);
    cudaFree(d_Arrayq);
    cudaFree(d_outputQ);
    //Free memory for output_first
    cudaFree(d_output_first);

    for(i=0;i<60;i++)
    {
	cout<<outputQ[i]<<endl;
    }
    /*
    for(j=0;j<214;j++)
	{
		for(i=0;i<214;i++)
	cout<<i<<","<<j<<"__"<<dist[i+j*214]<<endl;
	cout<<endl;
	}
    */
    	cudaEventElapsedTime(&time,start,stop);
        cout<<"Time for the kernel: "<<time<<endl;
    return EXIT_SUCCESS;
     
}


	.file	"tmpxft_00325510_00000000-6_cuda_2.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3771:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3771:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8readdataPPdS0_S_
	.type	_Z8readdataPPdS0_S_, @function
_Z8readdataPPdS0_S_:
.LFB3766:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE3766:
	.size	_Z8readdataPPdS0_S_, .-_Z8readdataPPdS0_S_
	.globl	_Z4sincd
	.type	_Z4sincd, @function
_Z4sincd:
.LFB3767:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3767:
	.size	_Z4sincd, .-_Z4sincd
	.globl	_Z42__device_stub__Z16cal_output_firstPdS_S_S_PdS_S_S_
	.type	_Z42__device_stub__Z16cal_output_firstPdS_S_S_PdS_S_S_, @function
_Z42__device_stub__Z16cal_output_firstPdS_S_S_PdS_S_S_:
.LFB3793:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L5
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16cal_output_firstPdS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L5:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3793:
	.size	_Z42__device_stub__Z16cal_output_firstPdS_S_S_PdS_S_S_, .-_Z42__device_stub__Z16cal_output_firstPdS_S_S_PdS_S_S_
	.globl	_Z16cal_output_firstPdS_S_S_
	.type	_Z16cal_output_firstPdS_S_S_, @function
_Z16cal_output_firstPdS_S_S_:
.LFB3794:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z16cal_output_firstPdS_S_S_PdS_S_S_
	.cfi_endproc
.LFE3794:
	.size	_Z16cal_output_firstPdS_S_S_, .-_Z16cal_output_firstPdS_S_S_
	.globl	_Z39__device_stub__Z17cal_output_secondPdS_PdS_
	.type	_Z39__device_stub__Z17cal_output_secondPdS_PdS_, @function
_Z39__device_stub__Z17cal_output_secondPdS_PdS_:
.LFB3795:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17cal_output_secondPdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L11:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3795:
	.size	_Z39__device_stub__Z17cal_output_secondPdS_PdS_, .-_Z39__device_stub__Z17cal_output_secondPdS_PdS_
	.globl	_Z17cal_output_secondPdS_
	.type	_Z17cal_output_secondPdS_, @function
_Z17cal_output_secondPdS_:
.LFB3796:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z17cal_output_secondPdS_PdS_
	.cfi_endproc
.LFE3796:
	.size	_Z17cal_output_secondPdS_, .-_Z17cal_output_secondPdS_
	.globl	_Z29__device_stub__Z8cal_distPdS_PdS_
	.type	_Z29__device_stub__Z8cal_distPdS_PdS_, @function
_Z29__device_stub__Z8cal_distPdS_PdS_:
.LFB3797:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z8cal_distPdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L16:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3797:
	.size	_Z29__device_stub__Z8cal_distPdS_PdS_, .-_Z29__device_stub__Z8cal_distPdS_PdS_
	.globl	_Z8cal_distPdS_
	.type	_Z8cal_distPdS_, @function
_Z8cal_distPdS_:
.LFB3798:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z8cal_distPdS_PdS_
	.cfi_endproc
.LFE3798:
	.size	_Z8cal_distPdS_, .-_Z8cal_distPdS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z8cal_distPdS_"
.LC1:
	.string	"_Z17cal_output_secondPdS_"
.LC2:
	.string	"_Z16cal_output_firstPdS_S_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3800:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8cal_distPdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17cal_output_secondPdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16cal_output_firstPdS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3800:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC4:
	.string	"dataF.txt"
.LC5:
	.string	"dataq.txt"
.LC6:
	.string	"dataX.txt"
.LC7:
	.string	"Time for the kernel: "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3768:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3768
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-106496(%rsp), %r11
	.cfi_def_cfa 11, 106552
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$4072, %rsp
	.cfi_def_cfa_offset 110624
	movq	%fs:40, %rax
	movq	%rax, 110552(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rdi
	xorl	%eax, %eax
	movl	$0x00000000, 36(%rsp)
	movq	%rax, 40(%rsp)
	movq	%rax, 48(%rsp)
.LEHB0:
	call	cudaEventCreate@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	1136(%rsp), %rax
	movl	$8, %edx
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE0:
	leaq	1656(%rsp), %rax
	movl	$8, %edx
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
.LEHB1:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE1:
	leaq	2176(%rsp), %rax
	movl	$8, %edx
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
.LEHB2:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE2:
	leaq	2696(%rsp), %rbp
	xorl	%r13d, %r13d
	movq	%rbp, %r15
.L26:
	movq	%rbp, %r12
	movl	$214, %ebx
.L25:
	movq	24(%rsp), %rdi
	movq	%r12, %rsi
.LEHB3:
	call	_ZNSi10_M_extractIdEERSiRT_@PLT
	addq	$8, %r12
	decl	%ebx
	jne	.L25
	addl	$214, %r13d
	addq	$1712, %rbp
	cmpl	$642, %r13d
	jne	.L26
	leaq	7832(%rsp), %rbp
	movq	%rbp, %r14
.L27:
	movq	%rbp, %r13
	movl	$214, %r12d
.L28:
	movq	8(%rsp), %rdi
	movq	%r13, %rsi
	call	_ZNSi10_M_extractIdEERSiRT_@PLT
	addq	$8, %r13
	decl	%r12d
	jne	.L28
	addl	$214, %ebx
	addq	$1712, %rbp
	cmpl	$12840, %ebx
	jne	.L27
	leaq	176(%rsp), %rbx
	leaq	656(%rsp), %rbp
	movq	%rbx, %r12
.L30:
	movq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	_ZNSi10_M_extractIdEERSiRT_@PLT
	addq	$8, %rbx
	cmpq	%rbp, %rbx
	jne	.L30
	leaq	56(%rsp), %rdi
	movl	$366368, %esi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$5136, %esi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	$102720, %esi
	call	cudaMalloc@PLT
	leaq	80(%rsp), %rdi
	movl	$480, %esi
	call	cudaMalloc@PLT
	leaq	88(%rsp), %rdi
	movl	$480, %esi
	call	cudaMalloc@PLT
	leaq	96(%rsp), %rdi
	movl	$102720, %esi
	call	cudaMalloc@PLT
	movq	64(%rsp), %rdi
	movl	$1, %ecx
	movl	$5136, %edx
	movq	%r15, %rsi
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	movl	$1, %ecx
	movl	$102720, %edx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movq	80(%rsp), %rdi
	movl	$1, %ecx
	movl	$480, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rdi
	movl	$1, %ecx
	movl	$480, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movl	$1073741825, %edx
	movl	$16777217, %eax
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	salq	$8, %rdx
	salq	$8, %rax
	movl	$1, 112(%rsp)
	movq	%rdx, 128(%rsp)
	movl	$67108865, %edx
	salq	$6, %rdx
	movq	%rax, 104(%rsp)
	movq	%rax, 116(%rsp)
	movl	$1, 124(%rsp)
	movl	$1, 136(%rsp)
	movq	%rax, 140(%rsp)
	movl	$1, 148(%rsp)
	movq	%rdx, 152(%rsp)
	movl	$1, 160(%rsp)
	movq	%rax, 164(%rsp)
	movl	$1, 172(%rsp)
	call	cudaEventRecord@PLT
	movl	124(%rsp), %ecx
	movq	116(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	104(%rsp), %rdi
	movl	112(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L31
.L33:
	call	cudaThreadSynchronize@PLT
	jmp	.L59
.L31:
	movq	56(%rsp), %rsi
	movq	64(%rsp), %rdi
	call	_Z29__device_stub__Z8cal_distPdS_PdS_
	jmp	.L33
.L59:
	movl	148(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	140(%rsp), %rdx
	movq	128(%rsp), %rdi
	movl	136(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L34
.L36:
	movl	172(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	164(%rsp), %rdx
	movq	152(%rsp), %rdi
	movl	160(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L37
	jmp	.L39
.L34:
	movq	96(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	72(%rsp), %rdi
	call	_Z42__device_stub__Z16cal_output_firstPdS_S_S_PdS_S_S_
	jmp	.L36
.L37:
	movq	88(%rsp), %rsi
	movq	96(%rsp), %rdi
	call	_Z39__device_stub__Z17cal_output_secondPdS_PdS_
.L39:
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	88(%rsp), %rsi
	movl	$2, %ecx
	movl	$480, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%ebx, %ebx
	leaq	_ZSt4cout(%rip), %rbp
.L40:
	movsd	656(%rsp,%rbx,8), %xmm0
	movq	%rbp, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	incq	%rbx
	cmpq	$60, %rbx
	jne	.L40
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	leaq	36(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	cvtss2sd	36(%rsp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.LEHE3:
	leaq	2176(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	leaq	1656(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	leaq	1136(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	110552(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	jmp	.L57
.L48:
	endbr64
	movq	%rax, %rbx
.L41:
	movq	24(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L42
.L47:
	endbr64
	movq	%rax, %rbx
.L42:
	movq	16(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L43
.L46:
	endbr64
	movq	%rax, %rbx
.L43:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	110552(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L57
	movq	%rbx, %rdi
.LEHB4:
	call	_Unwind_Resume@PLT
.LEHE4:
.L57:
	call	__stack_chk_fail@PLT
.L45:
	addq	$110568, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3768:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3768:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3768-.LLSDACSB3768
.LLSDACSB3768:
	.uleb128 .LEHB0-.LFB3768
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3768
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L46-.LFB3768
	.uleb128 0
	.uleb128 .LEHB2-.LFB3768
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L47-.LFB3768
	.uleb128 0
	.uleb128 .LEHB3-.LFB3768
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L48-.LFB3768
	.uleb128 0
	.uleb128 .LEHB4-.LFB3768
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE3768:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <fstream>
#include <hip/hip_runtime.h>
#include <time.h>
#include <stdlib.h>
#include <math.h>
using namespace std;

#define PI 3.14159265
__host__ void readdata(double **ArrayX,double **ArrayF,double *Arrayq)
{
    
    
}
__device__ double sinc(double x)
{
	if(x==0)
		return 1;
	else return sin(x)/x;
}
//since max number of threads is 1024 per block which is smaller than 214*214
//so separate the calculation,214 x blocks and 214 threads for each of 60 y blocks
//by which I can use shared memory to do reducation
 
__global__ void cal_output_first(double *ArrayF,double *Arrayq,double *dist,double *output_first)
{
    int i,j,k;
    i=threadIdx.x;
    j=blockIdx.x;
    k=blockIdx.y;
    __shared__ double sdata[214];

    int tid=threadIdx.x;
	if(threadIdx.x<214&&blockIdx.y<60&&blockIdx.x<214)
{
	sdata[tid]=ArrayF[i+214*k]*ArrayF[j+214*k]*sinc(Arrayq[k]*dist[i+214*j]);
    __syncthreads();
    double sum=0;

    for(int m=0;m<214;m++)
    {
        sum+=sdata[m];
        __syncthreads();
    }
    if(tid==0)
	output_first[blockIdx.x+blockIdx.y*blockDim.x]=sum;
}
}
//calculate sum of remaining 214 value for outputq[60]
//214 threads and 60 x blocks
__global__ void cal_output_second(double *output_first,double *outputQ)
{
    int i,k;
    i=threadIdx.x;
    k=blockIdx.x;
    __shared__ double sdata[214]; 
if(threadIdx.x<214&&blockIdx.x<60)
{
    int tid=threadIdx.x;
        sdata[tid]=output_first[i+214*k];
    __syncthreads();
    double sum=0;

    for(int m=0;m<214;m++)
    {
        sum+=sdata[m];
        __syncthreads();
    }
    if(tid==0)
        outputQ[blockIdx.x]=sum;
}
}
__global__ void cal_dist(double *ArrayX,double *dist)
{
    int i,j;
    i=threadIdx.x;
    j=blockIdx.x;
if(i<214&&j<214)
{
    double temp1,temp2,temp3;
    temp1=(ArrayX[i]-ArrayX[j])*(ArrayX[i]-ArrayX[j]);
    temp2=(ArrayX[i+214]-ArrayX[j+214])*(ArrayX[i+214]-ArrayX[j+214]);
    temp3=(ArrayX[i+428]-ArrayX[j+428])*(ArrayX[i+428]-ArrayX[j+428]);
	
    dist[i+214*j]=sqrt(temp1+temp2+temp3);

//printf("temp is %d",temp);
}
}
int main()
{
    hipEvent_t start = 0;
    hipEvent_t stop = 0;
    float time = 0;
    hipEventCreate(&start);
    hipEventCreate(&stop);
    double ArrayF[214*60],Arrayq[60],ArrayX[214*3],outputQ[60];
    int i,j;
    int sizeF=214*60,sizeq=60,sizeX=214*3;
    int sizeQ=60,sizedist=214*214;
    ifstream F("dataF.txt"),q("dataq.txt"),X("dataX.txt");
   
    for(j=0;j<3;j++)
        for(i=0;i<214;i++)
        {
            X>>ArrayX[i+j*214];
        }
    for(j=0;j<60;j++)
        for(i=0;i<214;i++)
        {
            
            F>>ArrayF[i+214*j];
        }
    
    for(j=0;j<60;j++)
    {
        q>>Arrayq[j];
        //cout<<Arrayq[1][j]<<endl;
    }
    //calculate distance dist[214*214]
    int dsizeX=sizeX*sizeof(double);
    int dsizedist=sizedist*sizeof(double);
    int dsizeF=sizeF*sizeof(double);
    int dsizeq=sizeq*sizeof(double);
    int dsizeQ=sizeQ*sizeof(double);
    int dsize_first=214*60*sizeof(double);
    double *d_dist,*d_ArrayX,*d_ArrayF,*d_Arrayq,*d_outputQ;
    double *d_output_first;
    //cudaEventRecord(start,0);
    hipMalloc((void**)&d_dist,dsizedist);
    hipMalloc((void**)&d_ArrayX,dsizeX);
    hipMalloc((void**)&d_ArrayF,dsizeF);
    hipMalloc((void**)&d_Arrayq,dsizeq);
    hipMalloc((void**)&d_outputQ,dsizeQ);
    //allocate memory for output_first
    hipMalloc((void**)&d_output_first,dsize_first);
    hipMemcpy(d_ArrayX,&ArrayX,dsizeX,hipMemcpyHostToDevice);
    hipMemcpy(d_ArrayF,&ArrayF,dsizeF,hipMemcpyHostToDevice);
    hipMemcpy(d_Arrayq,&Arrayq,dsizeq,hipMemcpyHostToDevice);
    hipMemcpy(d_outputQ,&outputQ,dsizeQ,hipMemcpyHostToDevice);
    dim3 DimGrid1(256,1,1);
    dim3 DimBlock1(256, 1,1);
    dim3 DimGrid2(256,64,1);
    dim3 DimBlock2(256, 1,1);
    dim3 DimGrid3(64,1,1);
    dim3 DimBlock3(256, 1,1);
    hipEventRecord(start,0);
    cal_dist<<<DimGrid1,DimBlock1>>>(d_ArrayX,d_dist);
    //cudaEventRecord(stop,0);
    //cudaEventSynchronize(stop);
    hipDeviceSynchronize();
    cal_output_first<<<DimGrid2,DimBlock2>>>(d_ArrayF,d_Arrayq,d_dist,d_output_first);
    //output_first size 214*60
    //calculate output
    cal_output_second<<<DimGrid3,DimBlock3>>>(d_output_first,d_outputQ);
    //cudaMemcpy(&outputQ,d_outputQ,dsizeQ,cudaMemcpyDeviceToHost);
    hipEventRecord(stop,0);
    hipEventSynchronize(stop);
    hipMemcpy(&outputQ,d_outputQ,dsizeQ,hipMemcpyDeviceToHost);
    hipFree(d_dist);
    hipFree(d_ArrayX);
    hipFree(d_ArrayF);
    hipFree(d_Arrayq);
    hipFree(d_outputQ);
    //Free memory for output_first
    hipFree(d_output_first);

    for(i=0;i<60;i++)
    {
	cout<<outputQ[i]<<endl;
    }
    /*
    for(j=0;j<214;j++)
	{
		for(i=0;i<214;i++)
	cout<<i<<","<<j<<"__"<<dist[i+j*214]<<endl;
	cout<<endl;
	}
    */
    	hipEventElapsedTime(&time,start,stop);
        cout<<"Time for the kernel: "<<time<<endl;
    return EXIT_SUCCESS;
     
}


	.text
	.file	"cuda_2.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z8readdataPPdS0_S_             # -- Begin function _Z8readdataPPdS0_S_
	.type	_Z8readdataPPdS0_S_,@function
_Z8readdataPPdS0_S_:                    # @_Z8readdataPPdS0_S_
	.cfi_startproc
# %bb.0:
	retq
.Lfunc_end0:
	.size	_Z8readdataPPdS0_S_, .Lfunc_end0-_Z8readdataPPdS0_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__cal_output_firstPdS_S_S_ # -- Begin function _Z31__device_stub__cal_output_firstPdS_S_S_
	.type	_Z31__device_stub__cal_output_firstPdS_S_S_,@function
_Z31__device_stub__cal_output_firstPdS_S_S_: # @_Z31__device_stub__cal_output_firstPdS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16cal_output_firstPdS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__cal_output_firstPdS_S_S_, .Lfunc_end1-_Z31__device_stub__cal_output_firstPdS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__cal_output_secondPdS_ # -- Begin function _Z32__device_stub__cal_output_secondPdS_
	.type	_Z32__device_stub__cal_output_secondPdS_,@function
_Z32__device_stub__cal_output_secondPdS_: # @_Z32__device_stub__cal_output_secondPdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17cal_output_secondPdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z32__device_stub__cal_output_secondPdS_, .Lfunc_end2-_Z32__device_stub__cal_output_secondPdS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__cal_distPdS_ # -- Begin function _Z23__device_stub__cal_distPdS_
	.type	_Z23__device_stub__cal_distPdS_,@function
_Z23__device_stub__cal_distPdS_:        # @_Z23__device_stub__cal_distPdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8cal_distPdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z23__device_stub__cal_distPdS_, .Lfunc_end3-_Z23__device_stub__cal_distPdS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$110456, %rsp                   # imm = 0x1AF78
	.cfi_def_cfa_offset 110496
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%eax, %eax
	leaq	64(%rsp), %rdi
	movq	%rax, (%rdi)
	leaq	56(%rsp), %rbx
	movq	%rax, (%rbx)
	movl	$0, 4(%rsp)
	callq	hipEventCreate
	movq	%rbx, %rdi
	callq	hipEventCreate
	leaq	1112(%rsp), %rdi
	movl	$.L.str, %esi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
.Ltmp0:
	leaq	592(%rsp), %rdi
	movl	$.L.str.1, %esi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
.Ltmp1:
# %bb.1:
.Ltmp3:
	leaq	72(%rsp), %rdi
	movl	$.L.str.2, %esi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
.Ltmp4:
# %bb.2:                                # %.preheader105.preheader
	leaq	2592(%rsp), %r14
	xorl	%r15d, %r15d
	leaq	72(%rsp), %rbx
.LBB4_3:                                # %.preheader105
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_4 Depth 2
	xorl	%r12d, %r12d
.LBB4_4:                                #   Parent Loop BB4_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leaq	(%r14,%r12), %rsi
.Ltmp6:
	movq	%rbx, %rdi
	callq	_ZNSi10_M_extractIdEERSiRT_
.Ltmp7:
# %bb.5:                                # %_ZNSirsERd.exit
                                        #   in Loop: Header=BB4_4 Depth=2
	addq	$8, %r12
	cmpq	$1712, %r12                     # imm = 0x6B0
	jne	.LBB4_4
# %bb.6:                                #   in Loop: Header=BB4_3 Depth=1
	incq	%r15
	addq	$1712, %r14                     # imm = 0x6B0
	cmpq	$3, %r15
	jne	.LBB4_3
# %bb.7:                                # %.preheader100.preheader
	leaq	7728(%rsp), %r14
	xorl	%r15d, %r15d
	leaq	1112(%rsp), %rbx
.LBB4_8:                                # %.preheader100
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_9 Depth 2
	xorl	%r12d, %r12d
.LBB4_9:                                #   Parent Loop BB4_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leaq	(%r14,%r12), %rsi
.Ltmp9:
	movq	%rbx, %rdi
	callq	_ZNSi10_M_extractIdEERSiRT_
.Ltmp10:
# %bb.10:                               # %_ZNSirsERd.exit75
                                        #   in Loop: Header=BB4_9 Depth=2
	addq	$8, %r12
	cmpq	$1712, %r12                     # imm = 0x6B0
	jne	.LBB4_9
# %bb.11:                               #   in Loop: Header=BB4_8 Depth=1
	incq	%r15
	addq	$1712, %r14                     # imm = 0x6B0
	cmpq	$60, %r15
	jne	.LBB4_8
# %bb.12:                               # %.preheader94.preheader
	xorl	%r14d, %r14d
	leaq	592(%rsp), %rbx
.LBB4_13:                               # %.preheader94
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%rsp,%r14), %rsi
	addq	$2112, %rsi                     # imm = 0x840
.Ltmp12:
	movq	%rbx, %rdi
	callq	_ZNSi10_M_extractIdEERSiRT_
.Ltmp13:
# %bb.14:                               # %_ZNSirsERd.exit76
                                        #   in Loop: Header=BB4_13 Depth=1
	addq	$8, %r14
	cmpq	$480, %r14                      # imm = 0x1E0
	jne	.LBB4_13
# %bb.15:
.Ltmp15:
	leaq	48(%rsp), %rdi
	movl	$366368, %esi                   # imm = 0x59720
	callq	hipMalloc
.Ltmp16:
# %bb.16:
.Ltmp17:
	leaq	40(%rsp), %rdi
	movl	$5136, %esi                     # imm = 0x1410
	callq	hipMalloc
.Ltmp18:
# %bb.17:
.Ltmp19:
	leaq	32(%rsp), %rdi
	movl	$102720, %esi                   # imm = 0x19140
	callq	hipMalloc
.Ltmp20:
# %bb.18:
.Ltmp21:
	leaq	24(%rsp), %rdi
	movl	$480, %esi                      # imm = 0x1E0
	callq	hipMalloc
.Ltmp22:
# %bb.19:
.Ltmp23:
	leaq	8(%rsp), %rdi
	movl	$480, %esi                      # imm = 0x1E0
	callq	hipMalloc
.Ltmp24:
# %bb.20:
.Ltmp25:
	leaq	16(%rsp), %rdi
	movl	$102720, %esi                   # imm = 0x19140
	callq	hipMalloc
.Ltmp26:
# %bb.21:
	movq	40(%rsp), %rdi
.Ltmp27:
	leaq	2592(%rsp), %rsi
	movl	$5136, %edx                     # imm = 0x1410
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp28:
# %bb.22:
	movq	32(%rsp), %rdi
.Ltmp29:
	leaq	7728(%rsp), %rsi
	movl	$102720, %edx                   # imm = 0x19140
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp30:
# %bb.23:
	movq	24(%rsp), %rdi
.Ltmp31:
	leaq	2112(%rsp), %rsi
	movl	$480, %edx                      # imm = 0x1E0
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp32:
# %bb.24:
	movq	8(%rsp), %rdi
.Ltmp33:
	leaq	1632(%rsp), %rsi
	movl	$480, %edx                      # imm = 0x1E0
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp34:
# %bb.25:
	movq	64(%rsp), %rdi
.Ltmp36:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp37:
# %bb.26:
.Ltmp38:
	movabsq	$4294967552, %rdi               # imm = 0x100000100
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp39:
# %bb.27:
	testl	%eax, %eax
	jne	.LBB4_29
# %bb.28:
	movq	40(%rsp), %rdi
	movq	48(%rsp), %rsi
.Ltmp40:
	callq	_Z23__device_stub__cal_distPdS_
.Ltmp41:
.LBB4_29:
.Ltmp42:
	callq	hipDeviceSynchronize
.Ltmp43:
# %bb.30:
.Ltmp44:
	movabsq	$274877907200, %rdi             # imm = 0x4000000100
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp45:
# %bb.31:
	testl	%eax, %eax
	jne	.LBB4_33
# %bb.32:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	48(%rsp), %rdx
	movq	16(%rsp), %rcx
.Ltmp46:
	callq	_Z31__device_stub__cal_output_firstPdS_S_S_
.Ltmp47:
.LBB4_33:
.Ltmp48:
	movabsq	$4294967360, %rdi               # imm = 0x100000040
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp49:
# %bb.34:
	testl	%eax, %eax
	jne	.LBB4_36
# %bb.35:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
.Ltmp50:
	callq	_Z32__device_stub__cal_output_secondPdS_
.Ltmp51:
.LBB4_36:
	movq	56(%rsp), %rdi
.Ltmp52:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp53:
# %bb.37:
	movq	56(%rsp), %rdi
.Ltmp54:
	callq	hipEventSynchronize
.Ltmp55:
# %bb.38:
	movq	8(%rsp), %rsi
.Ltmp56:
	leaq	1632(%rsp), %rdi
	movl	$480, %edx                      # imm = 0x1E0
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp57:
# %bb.39:
	movq	48(%rsp), %rdi
.Ltmp58:
	callq	hipFree
.Ltmp59:
# %bb.40:
	movq	40(%rsp), %rdi
.Ltmp60:
	callq	hipFree
.Ltmp61:
# %bb.41:
	movq	32(%rsp), %rdi
.Ltmp62:
	callq	hipFree
.Ltmp63:
# %bb.42:
	movq	24(%rsp), %rdi
.Ltmp64:
	callq	hipFree
.Ltmp65:
# %bb.43:
	movq	8(%rsp), %rdi
.Ltmp66:
	callq	hipFree
.Ltmp67:
# %bb.44:
	movq	16(%rsp), %rdi
.Ltmp68:
	callq	hipFree
.Ltmp69:
# %bb.45:                               # %.preheader.preheader
	xorl	%r14d, %r14d
.LBB4_46:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movsd	1632(%rsp,%r14,8), %xmm0        # xmm0 = mem[0],zero
.Ltmp70:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp71:
# %bb.47:                               # %_ZNSolsEd.exit
                                        #   in Loop: Header=BB4_46 Depth=1
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp72:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp73:
# %bb.48:                               # %.noexc
                                        #   in Loop: Header=BB4_46 Depth=1
.Ltmp74:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp75:
# %bb.49:                               # %.noexc78
                                        #   in Loop: Header=BB4_46 Depth=1
.Ltmp76:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp77:
# %bb.50:                               # %_ZNSolsEPFRSoS_E.exit
                                        #   in Loop: Header=BB4_46 Depth=1
	incq	%r14
	cmpq	$60, %r14
	jne	.LBB4_46
# %bb.51:
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdx
.Ltmp79:
	leaq	4(%rsp), %rdi
	callq	hipEventElapsedTime
.Ltmp80:
# %bb.52:
.Ltmp81:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$21, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp82:
# %bb.53:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rsp), %xmm0
.Ltmp83:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp84:
# %bb.54:                               # %_ZNSolsEf.exit
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp85:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp86:
# %bb.55:                               # %.noexc80
.Ltmp87:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp88:
# %bb.56:                               # %.noexc81
.Ltmp89:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp90:
# %bb.57:                               # %_ZNSolsEPFRSoS_E.exit77
	leaq	72(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	leaq	592(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	leaq	1112(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	xorl	%eax, %eax
	addq	$110456, %rsp                   # imm = 0x1AF78
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB4_59:
	.cfi_def_cfa_offset 110496
.Ltmp5:
	movq	%rax, %rbx
	jmp	.LBB4_67
.LBB4_58:
.Ltmp2:
	movq	%rax, %rbx
	jmp	.LBB4_68
.LBB4_65:
.Ltmp35:
	jmp	.LBB4_66
.LBB4_64:                               # %.loopexit.split-lp
.Ltmp91:
	jmp	.LBB4_66
.LBB4_60:                               # %.loopexit95
.Ltmp14:
	jmp	.LBB4_66
.LBB4_63:                               # %.loopexit
.Ltmp78:
	jmp	.LBB4_66
.LBB4_61:                               # %.loopexit.split-lp96.loopexit
.Ltmp11:
	jmp	.LBB4_66
.LBB4_62:                               # %.loopexit.split-lp96.loopexit.split-lp
.Ltmp8:
.LBB4_66:                               # %.loopexit.split-lp96
	movq	%rax, %rbx
	leaq	72(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
.LBB4_67:
	leaq	592(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
.LBB4_68:
	leaq	1112(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table4:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp10-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin0          #     jumps to .Ltmp11
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp13-.Ltmp12                #   Call between .Ltmp12 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin0          #     jumps to .Ltmp14
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp15-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp34-.Ltmp15                #   Call between .Ltmp15 and .Ltmp34
	.uleb128 .Ltmp35-.Lfunc_begin0          #     jumps to .Ltmp35
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp36-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp69-.Ltmp36                #   Call between .Ltmp36 and .Ltmp69
	.uleb128 .Ltmp91-.Lfunc_begin0          #     jumps to .Ltmp91
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp70-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp77-.Ltmp70                #   Call between .Ltmp70 and .Ltmp77
	.uleb128 .Ltmp78-.Lfunc_begin0          #     jumps to .Ltmp78
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp79-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp90-.Ltmp79                #   Call between .Ltmp79 and .Ltmp90
	.uleb128 .Ltmp91-.Lfunc_begin0          #     jumps to .Ltmp91
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp90-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Lfunc_end4-.Ltmp90            #   Call between .Ltmp90 and .Lfunc_end4
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16cal_output_firstPdS_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17cal_output_secondPdS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8cal_distPdS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16cal_output_firstPdS_S_S_,@object # @_Z16cal_output_firstPdS_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z16cal_output_firstPdS_S_S_
	.p2align	3, 0x0
_Z16cal_output_firstPdS_S_S_:
	.quad	_Z31__device_stub__cal_output_firstPdS_S_S_
	.size	_Z16cal_output_firstPdS_S_S_, 8

	.type	_Z17cal_output_secondPdS_,@object # @_Z17cal_output_secondPdS_
	.globl	_Z17cal_output_secondPdS_
	.p2align	3, 0x0
_Z17cal_output_secondPdS_:
	.quad	_Z32__device_stub__cal_output_secondPdS_
	.size	_Z17cal_output_secondPdS_, 8

	.type	_Z8cal_distPdS_,@object         # @_Z8cal_distPdS_
	.globl	_Z8cal_distPdS_
	.p2align	3, 0x0
_Z8cal_distPdS_:
	.quad	_Z23__device_stub__cal_distPdS_
	.size	_Z8cal_distPdS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"dataF.txt"
	.size	.L.str, 10

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"dataq.txt"
	.size	.L.str.1, 10

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"dataX.txt"
	.size	.L.str.2, 10

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Time for the kernel: "
	.size	.L.str.3, 22

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16cal_output_firstPdS_S_S_"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z17cal_output_secondPdS_"
	.size	.L__unnamed_2, 26

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z8cal_distPdS_"
	.size	.L__unnamed_3, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__cal_output_firstPdS_S_S_
	.addrsig_sym _Z32__device_stub__cal_output_secondPdS_
	.addrsig_sym _Z23__device_stub__cal_distPdS_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z16cal_output_firstPdS_S_S_
	.addrsig_sym _Z17cal_output_secondPdS_
	.addrsig_sym _Z8cal_distPdS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16cal_output_firstPdS_S_S_ ; -- Begin function _Z16cal_output_firstPdS_S_S_
	.globl	_Z16cal_output_firstPdS_S_S_
	.p2align	8
	.type	_Z16cal_output_firstPdS_S_S_,@function
_Z16cal_output_firstPdS_S_S_:           ; @_Z16cal_output_firstPdS_S_S_
; %bb.0:
	v_cmp_gt_u32_e32 vcc_lo, 0xd6, v0
	s_cmp_lt_u32 s15, 60
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_cmpk_lt_u32 s14, 0xd6
	s_cselect_b32 s3, -1, 0
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_11
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_mul_i32 s2, s15, 0xd6
	v_mov_b32_e32 v2, 0
	v_mad_u64_u32 v[3:4], null, 0xd6, s14, v[0:1]
	v_add_nc_u32_e32 v1, s2, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, v2
	s_mov_b32 s3, 0
	s_add_i32 s2, s2, s14
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_mov_b32 s12, s15
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_mov_b32 s13, s3
	v_mov_b32_e32 v6, 0x3ff00000
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s8, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_lshl_b64 s[8:9], s[2:3], 3
	global_load_b64 v[1:2], v[1:2], off
	s_add_u32 s2, s4, s8
	s_addc_u32 s3, s5, s9
	s_lshl_b64 s[4:5], s[12:13], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s4, s6, s4
	s_addc_u32 s5, s7, s5
	s_load_b64 s[4:5], s[4:5], 0x0
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_mul_f64 v[3:4], s[4:5], v[3:4]
	s_load_b64 s[4:5], s[2:3], 0x0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_neq_f64_e32 0, v[3:4]
	s_cbranch_execz .LBB0_7
; %bb.2:
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr7_vgpr8
	v_cmpx_ngt_f64_e64 0x41d00000, |v[3:4]|
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_ldexp_f64 v[5:6], |v[3:4]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[3:4]|
	v_trig_preop_f64 v[7:8], |v[3:4]|, 0
	v_and_b32_e32 v9, 0x7fffffff, v4
	v_trig_preop_f64 v[19:20], |v[3:4]|, 2
	v_mov_b32_e32 v27, 0
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s16, 0x33145c07
	s_mov_b32 s17, 0x3c91a626
	v_dual_cndmask_b32 v6, v9, v6 :: v_dual_cndmask_b32 v5, v3, v5
	v_trig_preop_f64 v[9:10], |v[3:4]|, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[11:12], v[7:8], v[5:6]
	v_mul_f64 v[25:26], v[19:20], v[5:6]
	v_mul_f64 v[13:14], v[9:10], v[5:6]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[7:8], v[7:8], v[5:6], -v[11:12]
	v_fma_f64 v[9:10], v[9:10], v[5:6], -v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[5:6], v[19:20], v[5:6], -v[25:26]
	v_add_f64 v[15:16], v[13:14], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[15:16], -v[13:14]
	v_add_f64 v[23:24], v[11:12], v[15:16]
	v_add_f64 v[21:22], v[15:16], -v[17:18]
	v_add_f64 v[7:8], v[7:8], -v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[17:18], v[23:24], -2
	v_add_f64 v[11:12], v[23:24], -v[11:12]
	v_add_f64 v[13:14], v[13:14], -v[21:22]
	v_add_f64 v[21:22], v[25:26], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[17:18]|
	v_add_f64 v[11:12], v[15:16], -v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[7:8], v[13:14]
	v_fract_f64_e32 v[13:14], v[17:18]
	v_add_f64 v[15:16], v[21:22], v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v14, 0, v14 :: v_dual_cndmask_b32 v13, 0, v13
	v_ldexp_f64 v[13:14], v[13:14], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[11:12], v[15:16]
	v_add_f64 v[23:24], v[17:18], v[13:14]
	v_add_f64 v[11:12], v[17:18], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[23:24]
	v_add_f64 v[23:24], v[21:22], -v[25:26]
	v_cndmask_b32_e64 v28, 0, 0x40100000, vcc_lo
	v_add_f64 v[32:33], v[21:22], -v[23:24]
	v_add_f64 v[9:10], v[9:10], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[13:14], v[13:14], v[27:28]
	v_add_f64 v[28:29], v[15:16], -v[21:22]
	v_add_f64 v[23:24], v[25:26], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[17:18], v[13:14]
	v_add_f64 v[34:35], v[15:16], -v[28:29]
	v_add_f64 v[7:8], v[7:8], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[9:10], v[23:24]
	v_cvt_i32_f64_e32 v30, v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[21:22], -v[34:35]
	v_cvt_f64_i32_e32 v[28:29], v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[7:8], v[21:22]
	v_add_f64 v[13:14], v[13:14], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[9:10], v[7:8]
	v_add_f64 v[9:10], v[15:16], -v[11:12]
	v_add_f64 v[19:20], v[17:18], v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_add_f64 v[7:8], v[19:20], -v[13:14]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[9:10], v[5:6]
	v_add_f64 v[7:8], v[17:18], -v[7:8]
	v_cndmask_b32_e64 v28, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v9, s2, 0, v30, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_add_f64 v[7:8], v[19:20], -v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[7:8], v[5:6]
	v_mul_f64 v[12:13], v[10:11], s[8:9]
	v_add_f64 v[7:8], v[10:11], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[10:11], s[8:9], -v[12:13]
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[10:11], s[16:17], v[14:15]
	v_fma_f64 v[7:8], v[5:6], s[8:9], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[12:13], v[7:8]
	v_add_f64 v[10:11], v[5:6], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[10:11]
.LBB0_4:                                ; %Flow37
	s_and_not1_saveexec_b32 s2, s6
	s_cbranch_execz .LBB0_6
; %bb.5:
	s_mov_b32 s6, 0x6dc9c883
	s_mov_b32 s7, 0x3fe45f30
	s_mov_b32 s9, 0xbc91a626
	v_mul_f64 v[5:6], |v[3:4]|, s[6:7]
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0xbff921fb
	s_mov_b32 s8, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[9:10], v[5:6]
	v_fma_f64 v[5:6], v[9:10], s[6:7], |v[3:4]|
	v_mul_f64 v[7:8], v[9:10], s[8:9]
	s_mov_b32 s6, 0x252049c0
	s_mov_b32 s7, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[9:10], s[8:9], v[5:6]
	v_add_f64 v[11:12], v[5:6], v[7:8]
	s_mov_b32 s9, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[5:6], -v[11:12]
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_fma_f64 v[7:8], v[9:10], s[8:9], v[7:8]
	v_add_f64 v[5:6], v[11:12], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	v_fma_f64 v[7:8], v[9:10], s[6:7], v[5:6]
	v_cvt_i32_f64_e32 v9, v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[13:14], v[7:8]
	v_add_f64 v[11:12], v[5:6], -v[13:14]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[11:12]
.LBB0_6:                                ; %_ZL3sind.exit.i
	s_or_b32 exec_lo, exec_lo, s2
	v_mul_f64 v[10:11], v[5:6], v[5:6]
	s_mov_b32 s6, 0xb42fdfa7
	s_mov_b32 s8, 0xf9a43bb8
	s_mov_b32 s7, 0xbe5ae600
	s_mov_b32 s9, 0x3de5e0b2
	s_mov_b32 s16, 0x796cde01
	s_mov_b32 s17, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[20:21], v[7:8], 0.5
	v_cmp_class_f64_e64 s2, v[3:4], 0x1f8
	v_fma_f64 v[12:13], v[10:11], s[8:9], s[6:7]
	s_mov_b32 s6, 0x9037ab78
	s_mov_b32 s8, 0x46cc5e42
	s_mov_b32 s7, 0x3e21eeb6
	s_mov_b32 s9, 0xbda907db
	v_mul_f64 v[16:17], v[10:11], 0.5
	v_fma_f64 v[14:15], v[10:11], s[8:9], s[6:7]
	s_mov_b32 s6, 0xa17f65f6
	s_mov_b32 s8, 0x19e83e5c
	s_mov_b32 s7, 0xbe927e4f
	s_mov_b32 s9, 0xbf2a01a0
	v_mul_f64 v[22:23], v[5:6], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[16:17]
	v_add_f64 v[18:19], -v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[6:7]
	s_mov_b32 s6, 0x19f4ec90
	s_mov_b32 s7, 0x3efa01a0
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[8:9]
	s_mov_b32 s8, 0x11110bb3
	s_mov_b32 s9, 0x3f811111
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], -v[18:19], 1.0
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[6:7]
	s_mov_b32 s6, 0x16c16967
	s_mov_b32 s7, 0xbf56c16c
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[8:9]
	v_add_f64 v[16:17], v[24:25], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[6:7]
	s_mov_b32 s7, 0x3fa55555
	s_mov_b32 s6, 0x55555555
	v_fma_f64 v[12:13], v[22:23], v[12:13], v[20:21]
	v_mul_f64 v[20:21], v[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[16:17], v[5:6], -v[7:8], v[16:17]
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[6:7]
	s_mov_b32 s7, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[7:8], v[10:11], v[12:13], -v[7:8]
	v_fma_f64 v[10:11], v[20:21], v[14:15], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[7:8], v[22:23], s[6:7], v[7:8]
	v_add_f64 v[10:11], v[18:19], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	v_and_b32_e32 v7, 1, v9
	v_cmp_eq_u32_e32 vcc_lo, 0, v7
	v_lshlrev_b32_e32 v7, 30, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v7, v7, v4
	v_dual_cndmask_b32 v6, v11, v6 :: v_dual_and_b32 v7, 0x80000000, v7
	v_cndmask_b32_e32 v5, v10, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v6, v6, v7
	v_cndmask_b32_e64 v5, 0, v5, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v6, 0x7ff80000, v6, s2
	v_div_scale_f64 v[7:8], null, v[3:4], v[3:4], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[9:10], v[7:8]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	v_div_scale_f64 v[11:12], vcc_lo, v[5:6], v[3:4], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[13:14], v[11:12], v[9:10]
	v_fma_f64 v[7:8], -v[7:8], v[13:14], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[7:8], v[7:8], v[9:10], v[13:14]
	v_div_fixup_f64 v[5:6], v[7:8], v[3:4], v[5:6]
.LBB0_7:                                ; %Flow38
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f64 v[1:2], v[1:2], s[4:5]
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[3:4], v[1:2], v[5:6]
	v_mov_b32_e32 v1, 0
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v5, 3, v0
	ds_store_b64 v5, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_8:                                ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v3, s2
	s_add_i32 s2, s2, 8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_i32 s2, 0x6b0
	ds_load_b64 v[3:4], v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_f64 v[1:2], v[1:2], v[3:4]
	s_cbranch_scc0 .LBB0_8
; %bb.9:
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_mov_b32 s3, 0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_11
; %bb.10:
	s_load_b32 s0, s[0:1], 0x2c
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s0, s12, s0
	s_add_i32 s2, s0, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[2:3], 3
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	global_store_b64 v0, v[1:2], s[0:1]
.LBB0_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16cal_output_firstPdS_S_S_
		.amdhsa_group_segment_fixed_size 1712
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 36
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16cal_output_firstPdS_S_S_, .Lfunc_end0-_Z16cal_output_firstPdS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2032
; NumSgprs: 20
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1712 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 36
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17cal_output_secondPdS_ ; -- Begin function _Z17cal_output_secondPdS_
	.globl	_Z17cal_output_secondPdS_
	.p2align	8
	.type	_Z17cal_output_secondPdS_,@function
_Z17cal_output_secondPdS_:              ; @_Z17cal_output_secondPdS_
; %bb.0:
	v_cmp_gt_u32_e32 vcc_lo, 0xd6, v0
	s_cmp_lt_u32 s15, 60
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_5
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	v_lshlrev_b32_e32 v5, 3, v0
	v_mad_u64_u32 v[1:2], null, 0xd6, s4, v[0:1]
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_mov_b32 s0, 0
	global_load_b64 v[3:4], v[1:2], off
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(0)
	ds_store_b64 v5, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v3, s0
	s_add_i32 s0, s0, 8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_i32 s0, 0x6b0
	ds_load_b64 v[3:4], v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_f64 v[1:2], v[1:2], v[3:4]
	s_cbranch_scc0 .LBB1_2
; %bb.3:
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_mov_b32 s5, 0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_5
; %bb.4:
	s_lshl_b64 s[0:1], s[4:5], 3
	v_mov_b32_e32 v0, 0
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	global_store_b64 v0, v[1:2], s[0:1]
.LBB1_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17cal_output_secondPdS_
		.amdhsa_group_segment_fixed_size 1712
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z17cal_output_secondPdS_, .Lfunc_end1-_Z17cal_output_secondPdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1712 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8cal_distPdS_         ; -- Begin function _Z8cal_distPdS_
	.globl	_Z8cal_distPdS_
	.p2align	8
	.type	_Z8cal_distPdS_,@function
_Z8cal_distPdS_:                        ; @_Z8cal_distPdS_
; %bb.0:
	v_cmp_gt_u32_e32 vcc_lo, 0xd6, v0
	s_cmpk_lt_i32 s15, 0xd6
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v5, 3, v0
	s_mov_b32 s4, s15
	s_ashr_i32 s5, s15, 31
	s_waitcnt lgkmcnt(0)
	s_clause 0x2
	global_load_b64 v[1:2], v5, s[0:1] offset:1712
	global_load_b64 v[3:4], v5, s[0:1]
	global_load_b64 v[5:6], v5, s[0:1] offset:3424
	s_lshl_b64 s[6:7], s[4:5], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
	s_clause 0x2
	s_load_b64 s[6:7], s[0:1], 0x6b0
	s_load_b64 s[8:9], s[0:1], 0xd60
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt vmcnt(2) lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], -s[6:7]
	s_waitcnt vmcnt(1)
	v_add_f64 v[3:4], v[3:4], -s[0:1]
	s_waitcnt vmcnt(0)
	v_add_f64 v[5:6], v[5:6], -s[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[1:2], v[1:2], v[1:2]
	v_fma_f64 v[1:2], v[3:4], v[3:4], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[1:2], v[5:6], v[5:6], v[1:2]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[1:2]
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 8, v3
	v_ldexp_f64 v[1:2], v[1:2], v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[3:4], v[1:2]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[5:6], v[1:2], v[3:4]
	v_mul_f64 v[3:4], v[3:4], 0.5
	v_fma_f64 v[7:8], -v[3:4], v[5:6], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[5:6], v[5:6], v[7:8], v[5:6]
	v_fma_f64 v[3:4], v[3:4], v[7:8], v[3:4]
	v_fma_f64 v[7:8], -v[5:6], v[5:6], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], v[7:8], v[3:4], v[5:6]
	v_fma_f64 v[7:8], -v[5:6], v[5:6], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[3:4], v[7:8], v[3:4], v[5:6]
	v_cndmask_b32_e64 v5, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[1:2], 0x260
	v_ldexp_f64 v[3:4], v[3:4], v5
	v_mad_u64_u32 v[5:6], null, 0xd6, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v2, v4, v2 :: v_dual_cndmask_b32 v1, v3, v1
	v_add_co_u32 v3, vcc_lo, s2, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v6, vcc_lo
	global_store_b64 v[3:4], v[1:2], off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8cal_distPdS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z8cal_distPdS_, .Lfunc_end2-_Z8cal_distPdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 432
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1712
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16cal_output_firstPdS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z16cal_output_firstPdS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     36
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 1712
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17cal_output_secondPdS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17cal_output_secondPdS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8cal_distPdS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8cal_distPdS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
