#include <iostream>
#include <stdio.h>
#include <stdlib.h>
#include <cmath>
#include <cstdlib>
#include <time.h>
#include "cuda_runtime.h"


__global__ void parInterweavedSOE(int * a, int n, int sqrt_N) {

	int index = blockIdx.x * blockDim.x + threadIdx.x;

	if (threadIdx.x == 0 && threadIdx.y == 0) {
		a[0] = 1;
		a[1] = 1;
	}
	if (index * index <= n + 1) {
		for (int i = 2; i * i <= n + 1; i++) {
			if (a[i] != 1) {
				for (int j = 2; (index + j)*i < n + 1; j += sqrt_N) {
					if (index + j >= i) {
						a[(index + j) * i] = 1;
					}
				}
				__syncthreads();
			}
		}
	}
}


// Create random matrices given row and column sizes
// Right now for testing, only fills in incremented values
// Needs to be float values
int ** randMat(int row, int col) {
	int i, j, count;
	int **arr = (int **)malloc(row * sizeof(int *));
	for (i = 0; i<row; i++)
		arr[i] = (int *)malloc(col * sizeof(int));

	// Note that arr[i][j] is same as *(*(arr+i)+j)
	count = 0;
	for (i = 0; i < row; i++)
		for (j = 0; j < col; j++)
			arr[i][j] = ++count;  // OR *(*(arr+i)+j) = ++count

	return arr;
}

// The sequential matrix multiplication version
// Runs in O(lmnd)
// Where l is the number of rows in the first matrix
// m is the number of columns in the first matrix
// n is the number of columns in the second matrix
// d is the number of matrices to multiply
int ** seqMult(int * dimVect, int dimNum, int ***b) {
	int i, j, k;
	int **output = b[0];
	int **mat1;
	int **mat2;
	for (k = 0; k < dimNum - 3; k++) {
		int tempRow;
		if (k == 0) {
			mat1 = b[k];
			tempRow = dimVect[k];
		}
		else {
			mat1 = output;
		}

		mat2 = b[k + 1];

		int tempCol = dimVect[k + 2];
		int commonDim = dimVect[k + 1];
		output = (int **)malloc(tempRow * sizeof(int *));
		for (i = 0; i < dimVect[k]; i++) {
			output[i] = (int *)malloc(tempCol * sizeof(int));
		}

		for (i = 0; i < tempRow; i++) {
			for (j = 0; j < tempCol; j++) {
				int total = 0;
				for (int multNum = 0; multNum < commonDim; multNum++) {
					total += mat1[i][multNum] * mat2[multNum][j];
				}
				output[i][j] = total;
			}
		}

	}
	return output;
}

int main(int argc, const char * argv[]) {
	
	// Check to see if there is at least one matrix
	if (argc < 3) {
		printf("The argument is wrong! Execute your program with a vector with at least two integers.\n");
		return 1;
	}
	
	int i, j, k;

	// Arary holding all the dimensions
	int * dimVect = (int *)malloc((argc - 1) * sizeof(int));
	for (i = 1; i < argc; i++) {
		dimVect[i - 1] = atoi(argv[i]);
	
	}

	int **a; // Temporary 2D array to hold current matrix
	int ***b = (int ***)malloc((argc - 1) * sizeof(int**)); // Array holding all matrices
	for (i = 0; i < argc-2; i++) {
		a = randMat(dimVect[i], dimVect[i+1]);
		b[i] = a;
	}


	// Print out all matrices
	for (k = 0; k < argc - 2; k++) {
		a = b[k];
		int tempRow = dimVect[k];
		int tempCol = dimVect[k + 1];
		for (i = 0; i < tempRow; i++)
			for (j = 0; j < tempCol; j++)
				printf("%d ", a[i][j]);
		printf("\n");
	}


	// Call Sequential Multiplication
	int **result = seqMult(dimVect, argc, b);

	
	// Check Results
	for (i = 0; i < dimVect[0]; i++)
		for (j = 0; j < dimVect[argc-2]; j++)
			printf("%d ", result[i][j]);
	printf("\n");

	free(a);
	free(dimVect);
	free(b);
	return 0;	
}

	.file	"tmpxft_0032f4cf_00000000-6_hw4.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z7randMatii
	.type	_Z7randMatii, @function
_Z7randMatii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movslq	%edi, %rdi
	movslq	%esi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	salq	$3, %rdi
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%r14, %rbx
	salq	$2, %r14
	call	malloc@PLT
	movq	%rax, %rbp
.L3:
	cmpl	%r13d, %r12d
	jle	.L11
	movq	%r14, %rdi
	call	malloc@PLT
	movq	%rax, 0(%rbp,%r13,8)
	incq	%r13
	jmp	.L3
.L11:
	xorl	%esi, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	testl	%ebx, %ebx
	cmovns	%ebx, %esi
.L5:
	cmpl	%edx, %r12d
	jle	.L12
	xorl	%eax, %eax
	leal	1(%rcx), %edi
.L7:
	cmpl	%eax, %ebx
	jle	.L13
	movq	0(%rbp,%rdx,8), %r8
	leal	(%rdi,%rax), %r9d
	movl	%r9d, (%r8,%rax,4)
	incq	%rax
	jmp	.L7
.L13:
	addl	%esi, %ecx
	incq	%rdx
	jmp	.L5
.L12:
	popq	%rbx
	.cfi_def_cfa_offset 40
	movq	%rbp, %rax
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z7randMatii, .-_Z7randMatii
	.globl	_Z7seqMultPiiPPS_
	.type	_Z7seqMultPiiPPS_, @function
_Z7seqMultPiiPPS_:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdx), %rax
	movq	%rax, 8(%rsp)
	movq	%rax, %r12
	leal	-3(%rsi), %eax
	movl	%eax, 36(%rsp)
.L15:
	cmpl	%r13d, 36(%rsp)
	jle	.L27
	testq	%r13, %r13
	jne	.L16
	movl	(%r14), %eax
	movq	8(%rsp), %r12
	movl	%eax, 16(%rsp)
.L16:
	movl	8(%r14,%r13,4), %eax
	movslq	16(%rsp), %rdi
	movq	8(%rbx,%r13,8), %r15
	movl	%eax, 20(%rsp)
	movl	4(%r14,%r13,4), %eax
	salq	$3, %rdi
	movl	%eax, 32(%rsp)
	call	malloc@PLT
	movslq	20(%rsp), %rbp
	movq	%rax, %rsi
	leaq	0(,%rbp,4), %rax
	xorl	%ebp, %ebp
	movq	%rax, 24(%rsp)
.L17:
	cmpl	%ebp, (%r14,%r13,4)
	jle	.L28
	movq	24(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	call	malloc@PLT
	movq	40(%rsp), %rsi
	movq	%rax, (%rsi,%rbp,8)
	incq	%rbp
	jmp	.L17
.L28:
	xorl	%eax, %eax
.L19:
	cmpl	%eax, 16(%rsp)
	jle	.L29
	xorl	%r9d, %r9d
.L23:
	cmpl	%r9d, 20(%rsp)
	jle	.L21
	leaq	0(,%r9,4), %rbp
	xorl	%edi, %edi
	xorl	%r10d, %r10d
.L22:
	cmpl	%edi, 32(%rsp)
	jle	.L30
	movq	(%r15,%rdi,8), %rcx
	movq	(%r12,%rax,8), %r11
	movl	(%r11,%rdi,4), %r11d
	imull	(%rcx,%rbp), %r11d
	incq	%rdi
	addl	%r11d, %r10d
	jmp	.L22
.L30:
	movq	(%rsi,%rax,8), %rdi
	incq	%r9
	movl	%r10d, (%rdi,%rbp)
	jmp	.L23
.L21:
	incq	%rax
	jmp	.L19
.L29:
	incq	%r13
	movq	%rsi, %r12
	jmp	.L15
.L27:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%r12, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z7seqMultPiiPPS_, .-_Z7seqMultPiiPPS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"The argument is wrong! Execute your program with a vector with at least two integers.\n"
.LC1:
	.string	"%d "
.LC2:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	cmpl	$2, %edi
	jg	.L32
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L31
.L32:
	leal	-1(%rdi), %r12d
	movl	%edi, %ebp
	movq	%rsi, %r14
	movl	$1, %r13d
	movslq	%r12d, %r12
	leaq	0(,%r12,4), %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	%rax, %rbx
.L34:
	movq	(%r14,%r13,8), %rdi
	call	atoi@PLT
	movl	%eax, -4(%rbx,%r13,4)
	incq	%r13
	cmpl	%r13d, %ebp
	jg	.L34
	leaq	0(,%r12,8), %rdi
	leal	-2(%rbp), %r15d
	xorl	%r13d, %r13d
	call	malloc@PLT
	movq	%rax, %r12
.L35:
	movl	4(%rbx,%r13,4), %esi
	movl	(%rbx,%r13,4), %edi
	call	_Z7randMatii
	movq	%rax, (%r12,%r13,8)
	incq	%r13
	cmpl	%r13d, %r15d
	jg	.L35
	xorl	%r14d, %r14d
.L39:
	movl	(%rbx,%r14,4), %eax
	movq	(%r12,%r14,8), %r13
	xorl	%r8d, %r8d
	movl	%eax, 8(%rsp)
	movl	4(%rbx,%r14,4), %eax
	movl	%eax, 12(%rsp)
.L36:
	cmpl	%r8d, 8(%rsp)
	jle	.L49
	xorl	%r9d, %r9d
.L38:
	cmpl	%r9d, 12(%rsp)
	jle	.L50
	movq	0(%r13,%r8,8), %rax
	movl	$2, %edi
	movq	%r8, 24(%rsp)
	leaq	.LC1(%rip), %rsi
	movq	%r9, 16(%rsp)
	movl	(%rax,%r9,4), %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	16(%rsp), %r9
	movq	24(%rsp), %r8
	incq	%r9
	jmp	.L38
.L50:
	incq	%r8
	jmp	.L36
.L49:
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r14
	call	__printf_chk@PLT
	cmpl	%r14d, %r15d
	jg	.L39
	movl	%ebp, %esi
	movq	%r12, %rdx
	movq	%rbx, %rdi
	xorl	%ebp, %ebp
	call	_Z7seqMultPiiPPS_
	movq	%rax, %r15
	movq	(%rsp), %rax
	leaq	-4(%rbx,%rax), %r14
.L40:
	cmpl	%ebp, (%rbx)
	jle	.L51
	xorl	%ecx, %ecx
.L42:
	cmpl	%ecx, (%r14)
	jle	.L52
	movq	(%r15,%rbp,8), %rax
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movq	%rcx, (%rsp)
	movl	(%rax,%rcx,4), %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%rsp), %rcx
	incq	%rcx
	jmp	.L42
.L52:
	incq	%rbp
	jmp	.L40
.L51:
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	xorl	%eax, %eax
.L31:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.text
	.globl	_Z39__device_stub__Z17parInterweavedSOEPiiiPiii
	.type	_Z39__device_stub__Z17parInterweavedSOEPiiiPiii, @function
_Z39__device_stub__Z17parInterweavedSOEPiiiPiii:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L53
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17parInterweavedSOEPiii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L53:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L55
	call	__stack_chk_fail@PLT
.L55:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z39__device_stub__Z17parInterweavedSOEPiiiPiii, .-_Z39__device_stub__Z17parInterweavedSOEPiiiPiii
	.globl	_Z17parInterweavedSOEPiii
	.type	_Z17parInterweavedSOEPiii, @function
_Z17parInterweavedSOEPiii:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z17parInterweavedSOEPiiiPiii
	.cfi_endproc
.LFE3663:
	.size	_Z17parInterweavedSOEPiii, .-_Z17parInterweavedSOEPiii
	.section	.rodata.str1.1
.LC3:
	.string	"_Z17parInterweavedSOEPiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z17parInterweavedSOEPiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <stdio.h>
#include <stdlib.h>
#include <cmath>
#include <cstdlib>
#include <time.h>
#include "hip/hip_runtime.h"


__global__ void parInterweavedSOE(int * a, int n, int sqrt_N) {

	int index = blockIdx.x * blockDim.x + threadIdx.x;

	if (threadIdx.x == 0 && threadIdx.y == 0) {
		a[0] = 1;
		a[1] = 1;
	}
	if (index * index <= n + 1) {
		for (int i = 2; i * i <= n + 1; i++) {
			if (a[i] != 1) {
				for (int j = 2; (index + j)*i < n + 1; j += sqrt_N) {
					if (index + j >= i) {
						a[(index + j) * i] = 1;
					}
				}
				__syncthreads();
			}
		}
	}
}


// Create random matrices given row and column sizes
// Right now for testing, only fills in incremented values
// Needs to be float values
int ** randMat(int row, int col) {
	int i, j, count;
	int **arr = (int **)malloc(row * sizeof(int *));
	for (i = 0; i<row; i++)
		arr[i] = (int *)malloc(col * sizeof(int));

	// Note that arr[i][j] is same as *(*(arr+i)+j)
	count = 0;
	for (i = 0; i < row; i++)
		for (j = 0; j < col; j++)
			arr[i][j] = ++count;  // OR *(*(arr+i)+j) = ++count

	return arr;
}

// The sequential matrix multiplication version
// Runs in O(lmnd)
// Where l is the number of rows in the first matrix
// m is the number of columns in the first matrix
// n is the number of columns in the second matrix
// d is the number of matrices to multiply
int ** seqMult(int * dimVect, int dimNum, int ***b) {
	int i, j, k;
	int **output = b[0];
	int **mat1;
	int **mat2;
	for (k = 0; k < dimNum - 3; k++) {
		int tempRow;
		if (k == 0) {
			mat1 = b[k];
			tempRow = dimVect[k];
		}
		else {
			mat1 = output;
		}

		mat2 = b[k + 1];

		int tempCol = dimVect[k + 2];
		int commonDim = dimVect[k + 1];
		output = (int **)malloc(tempRow * sizeof(int *));
		for (i = 0; i < dimVect[k]; i++) {
			output[i] = (int *)malloc(tempCol * sizeof(int));
		}

		for (i = 0; i < tempRow; i++) {
			for (j = 0; j < tempCol; j++) {
				int total = 0;
				for (int multNum = 0; multNum < commonDim; multNum++) {
					total += mat1[i][multNum] * mat2[multNum][j];
				}
				output[i][j] = total;
			}
		}

	}
	return output;
}

int main(int argc, const char * argv[]) {
	
	// Check to see if there is at least one matrix
	if (argc < 3) {
		printf("The argument is wrong! Execute your program with a vector with at least two integers.\n");
		return 1;
	}
	
	int i, j, k;

	// Arary holding all the dimensions
	int * dimVect = (int *)malloc((argc - 1) * sizeof(int));
	for (i = 1; i < argc; i++) {
		dimVect[i - 1] = atoi(argv[i]);
	
	}

	int **a; // Temporary 2D array to hold current matrix
	int ***b = (int ***)malloc((argc - 1) * sizeof(int**)); // Array holding all matrices
	for (i = 0; i < argc-2; i++) {
		a = randMat(dimVect[i], dimVect[i+1]);
		b[i] = a;
	}


	// Print out all matrices
	for (k = 0; k < argc - 2; k++) {
		a = b[k];
		int tempRow = dimVect[k];
		int tempCol = dimVect[k + 1];
		for (i = 0; i < tempRow; i++)
			for (j = 0; j < tempCol; j++)
				printf("%d ", a[i][j]);
		printf("\n");
	}


	// Call Sequential Multiplication
	int **result = seqMult(dimVect, argc, b);

	
	// Check Results
	for (i = 0; i < dimVect[0]; i++)
		for (j = 0; j < dimVect[argc-2]; j++)
			printf("%d ", result[i][j]);
	printf("\n");

	free(a);
	free(dimVect);
	free(b);
	return 0;	
}

	.text
	.file	"hw4.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z32__device_stub__parInterweavedSOEPiii # -- Begin function _Z32__device_stub__parInterweavedSOEPiii
	.type	_Z32__device_stub__parInterweavedSOEPiii,@function
_Z32__device_stub__parInterweavedSOEPiii: # @_Z32__device_stub__parInterweavedSOEPiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17parInterweavedSOEPiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__parInterweavedSOEPiii, .Lfunc_end0-_Z32__device_stub__parInterweavedSOEPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z7randMatii                    # -- Begin function _Z7randMatii
	.type	_Z7randMatii,@function
_Z7randMatii:                           # @_Z7randMatii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movl	%edi, %ebp
	movslq	%edi, %r15
	leaq	(,%r15,8), %rdi
	callq	malloc
	movq	%rax, %r14
	testl	%r15d, %r15d
	jle	.LBB1_9
# %bb.1:                                # %.lr.ph
	movslq	%ebx, %r15
	shlq	$2, %r15
	movl	%ebp, %r12d
	xorl	%r13d, %r13d
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, (%r14,%r13,8)
	incq	%r13
	cmpq	%r13, %r12
	jne	.LBB1_2
# %bb.3:                                # %.preheader21
	testl	%ebp, %ebp
	jle	.LBB1_9
# %bb.4:                                # %.preheader.lr.ph
	movl	%ebx, %eax
	shlq	$2, %rax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB1_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_7 Depth 2
	testl	%ebx, %ebx
	jle	.LBB1_8
# %bb.6:                                # %.lr.ph25
                                        #   in Loop: Header=BB1_5 Depth=1
	movq	(%r14,%rcx,8), %rsi
	xorl	%edi, %edi
.LBB1_7:                                #   Parent Loop BB1_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	incl	%edx
	movl	%edx, (%rsi,%rdi)
	addq	$4, %rdi
	cmpq	%rdi, %rax
	jne	.LBB1_7
.LBB1_8:                                # %._crit_edge
                                        #   in Loop: Header=BB1_5 Depth=1
	incq	%rcx
	cmpq	%r12, %rcx
	jne	.LBB1_5
.LBB1_9:                                # %._crit_edge28
	movq	%r14, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z7randMatii, .Lfunc_end1-_Z7randMatii
	.cfi_endproc
                                        # -- End function
	.globl	_Z7seqMultPiiPPS_               # -- Begin function _Z7seqMultPiiPPS_
	.type	_Z7seqMultPiiPPS_,@function
_Z7seqMultPiiPPS_:                      # @_Z7seqMultPiiPPS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $esi killed $esi def $rsi
	movq	%rdi, 24(%rsp)                  # 8-byte Spill
	movq	%rdx, 48(%rsp)                  # 8-byte Spill
	movq	(%rdx), %rax
	cmpl	$4, %esi
	jl	.LBB2_18
# %bb.1:                                # %.lr.ph65.preheader
	addl	$-3, %esi
	xorl	%r15d, %r15d
                                        # implicit-def: $r13d
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	%rsi, 40(%rsp)                  # 8-byte Spill
.LBB2_3:                                # %.lr.ph65
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_7 Depth 2
                                        #     Child Loop BB2_10 Depth 2
                                        #       Child Loop BB2_12 Depth 3
                                        #         Child Loop BB2_17 Depth 4
	movq	%rax, %r12
	testq	%r15, %r15
	jne	.LBB2_5
# %bb.4:                                #   in Loop: Header=BB2_3 Depth=1
	movq	24(%rsp), %rax                  # 8-byte Reload
	movl	(%rax), %r13d
	movq	32(%rsp), %r12                  # 8-byte Reload
.LBB2_5:                                #   in Loop: Header=BB2_3 Depth=1
	movq	48(%rsp), %rax                  # 8-byte Reload
	movq	8(%rax,%r15,8), %rbx
	movq	24(%rsp), %r14                  # 8-byte Reload
	movslq	8(%r14,%r15,4), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	4(%r14,%r15,4), %ebp
	movl	%r13d, 20(%rsp)                 # 4-byte Spill
	movslq	%r13d, %rdi
	shlq	$3, %rdi
	callq	malloc
	movq	%rax, %rcx
	movq	%r15, 56(%rsp)                  # 8-byte Spill
	movl	(%r14,%r15,4), %r13d
	testl	%r13d, %r13d
	jle	.LBB2_8
# %bb.6:                                # %.lr.ph
                                        #   in Loop: Header=BB2_3 Depth=1
	movq	8(%rsp), %rax                   # 8-byte Reload
	leaq	(,%rax,4), %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
.LBB2_7:                                #   Parent Loop BB2_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	%rcx, %r15
	callq	malloc
	movq	%r15, %rcx
	movq	%rax, (%r15,%r14,8)
	incq	%r14
	cmpq	%r14, %r13
	jne	.LBB2_7
.LBB2_8:                                # %.preheader53
                                        #   in Loop: Header=BB2_3 Depth=1
	movl	20(%rsp), %r13d                 # 4-byte Reload
	testl	%r13d, %r13d
	movq	56(%rsp), %r15                  # 8-byte Reload
	movq	%rcx, %rax
	jle	.LBB2_2
# %bb.9:                                # %.preheader52.lr.ph
                                        #   in Loop: Header=BB2_3 Depth=1
	movl	%r13d, %r14d
	movl	8(%rsp), %ecx                   # 4-byte Reload
	xorl	%edx, %edx
.LBB2_10:                               # %.preheader52
                                        #   Parent Loop BB2_3 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_12 Depth 3
                                        #         Child Loop BB2_17 Depth 4
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	jle	.LBB2_15
# %bb.11:                               # %.preheader.lr.ph
                                        #   in Loop: Header=BB2_10 Depth=2
	movq	(%rax,%rdx,8), %rsi
	xorl	%edi, %edi
.LBB2_12:                               # %.preheader
                                        #   Parent Loop BB2_3 Depth=1
                                        #     Parent Loop BB2_10 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB2_17 Depth 4
	testl	%ebp, %ebp
	jle	.LBB2_13
# %bb.16:                               # %.lr.ph57
                                        #   in Loop: Header=BB2_12 Depth=3
	movq	(%r12,%rdx,8), %r9
	xorl	%r10d, %r10d
	xorl	%r8d, %r8d
.LBB2_17:                               #   Parent Loop BB2_3 Depth=1
                                        #     Parent Loop BB2_10 Depth=2
                                        #       Parent Loop BB2_12 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movq	(%rbx,%r10,8), %r11
	movl	(%r11,%rdi,4), %r11d
	imull	(%r9,%r10,4), %r11d
	addl	%r11d, %r8d
	incq	%r10
	cmpq	%r10, %rbp
	jne	.LBB2_17
	jmp	.LBB2_14
.LBB2_13:                               #   in Loop: Header=BB2_12 Depth=3
	xorl	%r8d, %r8d
.LBB2_14:                               # %._crit_edge
                                        #   in Loop: Header=BB2_12 Depth=3
	movl	%r8d, (%rsi,%rdi,4)
	incq	%rdi
	cmpq	%rcx, %rdi
	jne	.LBB2_12
.LBB2_15:                               # %._crit_edge59
                                        #   in Loop: Header=BB2_10 Depth=2
	incq	%rdx
	cmpq	%r14, %rdx
	jne	.LBB2_10
.LBB2_2:                                # %.loopexit
                                        #   in Loop: Header=BB2_3 Depth=1
	incq	%r15
	movq	40(%rsp), %rsi                  # 8-byte Reload
	cmpq	%rsi, %r15
	jne	.LBB2_3
.LBB2_18:                               # %._crit_edge66
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z7seqMultPiiPPS_, .Lfunc_end2-_Z7seqMultPiiPPS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jg	.LBB3_2
# %bb.1:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$1, %eax
	jmp	.LBB3_21
.LBB3_2:
	movq	%rsi, %r14
	movl	%edi, %ebx
	leal	-1(%rbx), %r12d
	leaq	(,%r12,4), %rdi
	callq	malloc
	movq	%rax, %rbp
	movl	%ebx, %r15d
	decq	%r15
	xorl	%r13d, %r13d
.LBB3_3:                                # =>This Inner Loop Header: Depth=1
	movq	8(%r14,%r13,8), %rdi
	callq	atoi
	movl	%eax, (%rbp,%r13,4)
	incq	%r13
	cmpq	%r13, %r15
	jne	.LBB3_3
# %bb.4:                                # %.lr.ph.preheader
	shlq	$3, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
	leal	-2(%rbx), %r15d
	movl	(%rbp), %edi
	xorl	%r14d, %r14d
	movq	%rbp, (%rsp)                    # 8-byte Spill
.LBB3_5:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leaq	1(%r14), %rbx
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	4(%rax,%r14,4), %ebp
	movl	%ebp, %esi
	callq	_Z7randMatii
	movq	%rax, (%r13,%r14,8)
	movl	%ebp, %edi
	movq	(%rsp), %rbp                    # 8-byte Reload
	movq	%rbx, %r14
	cmpq	%rbx, %r15
	jne	.LBB3_5
# %bb.6:                                # %.lr.ph73.preheader
	cmpl	$2, %r15d
	movl	$1, %ecx
	movq	%r15, %rax
	movq	%r15, 16(%rsp)                  # 8-byte Spill
	cmovgel	%r15d, %ecx
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movl	(%rbp), %eax
	xorl	%r15d, %r15d
	movq	%r13, 8(%rsp)                   # 8-byte Spill
.LBB3_7:                                # %.lr.ph73
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_9 Depth 2
                                        #       Child Loop BB3_11 Depth 3
	movq	(%r13,%r15,8), %r12
	movl	4(%rbp,%r15,4), %r13d
	testl	%eax, %eax
	jle	.LBB3_13
# %bb.8:                                # %.preheader63.lr.ph
                                        #   in Loop: Header=BB3_7 Depth=1
	movl	%eax, %r14d
	xorl	%ebp, %ebp
.LBB3_9:                                # %.preheader63
                                        #   Parent Loop BB3_7 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_11 Depth 3
	testl	%r13d, %r13d
	jle	.LBB3_12
# %bb.10:                               # %.lr.ph69
                                        #   in Loop: Header=BB3_9 Depth=2
	xorl	%ebx, %ebx
.LBB3_11:                               #   Parent Loop BB3_7 Depth=1
                                        #     Parent Loop BB3_9 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	(%r12,%rbp,8), %rax
	movl	(%rax,%rbx,4), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	%rbx, %r13
	jne	.LBB3_11
.LBB3_12:                               # %._crit_edge
                                        #   in Loop: Header=BB3_9 Depth=2
	incq	%rbp
	cmpq	%r14, %rbp
	jne	.LBB3_9
.LBB3_13:                               # %._crit_edge71
                                        #   in Loop: Header=BB3_7 Depth=1
	incq	%r15
	movl	$10, %edi
	callq	putchar@PLT
	movl	%r13d, %eax
	cmpq	32(%rsp), %r15                  # 8-byte Folded Reload
	movq	(%rsp), %rbp                    # 8-byte Reload
	movq	8(%rsp), %r13                   # 8-byte Reload
	jne	.LBB3_7
# %bb.14:                               # %._crit_edge74
	movq	%rbp, %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movq	%r13, %rdx
	callq	_Z7seqMultPiiPPS_
	movl	(%rbp), %r13d
	testl	%r13d, %r13d
	jle	.LBB3_20
# %bb.15:                               # %.preheader.lr.ph
	movq	%rax, %r15
	movq	(%rsp), %rax                    # 8-byte Reload
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movl	(%rax,%rcx,4), %ebp
	xorl	%r14d, %r14d
.LBB3_16:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_18 Depth 2
	testl	%ebp, %ebp
	jle	.LBB3_19
# %bb.17:                               # %.lr.ph77
                                        #   in Loop: Header=BB3_16 Depth=1
	xorl	%ebx, %ebx
.LBB3_18:                               #   Parent Loop BB3_16 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%r15,%r14,8), %rax
	movl	(%rax,%rbx,4), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	%rbx, %rbp
	jne	.LBB3_18
.LBB3_19:                               # %._crit_edge78
                                        #   in Loop: Header=BB3_16 Depth=1
	incq	%r14
	cmpq	%r13, %r14
	jne	.LBB3_16
.LBB3_20:                               # %._crit_edge80
	movl	$10, %edi
	callq	putchar@PLT
	movq	%r12, %rdi
	callq	free
	movq	(%rsp), %rdi                    # 8-byte Reload
	callq	free
	movq	8(%rsp), %rdi                   # 8-byte Reload
	callq	free
	xorl	%eax, %eax
.LBB3_21:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17parInterweavedSOEPiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17parInterweavedSOEPiii,@object # @_Z17parInterweavedSOEPiii
	.section	.rodata,"a",@progbits
	.globl	_Z17parInterweavedSOEPiii
	.p2align	3, 0x0
_Z17parInterweavedSOEPiii:
	.quad	_Z32__device_stub__parInterweavedSOEPiii
	.size	_Z17parInterweavedSOEPiii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%d "
	.size	.L.str.1, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17parInterweavedSOEPiii"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"The argument is wrong! Execute your program with a vector with at least two integers."
	.size	.Lstr, 86

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__parInterweavedSOEPiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17parInterweavedSOEPiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17parInterweavedSOEPiii ; -- Begin function _Z17parInterweavedSOEPiii
	.globl	_Z17parInterweavedSOEPiii
	.p2align	8
	.type	_Z17parInterweavedSOEPiii,@function
_Z17parInterweavedSOEPiii:              ; @_Z17parInterweavedSOEPiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b32 s4, s[0:1], 0x1c
	v_lshrrev_b32_e32 v1, 10, v0
	v_and_b32_e32 v2, 0x3ff, v0
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v1, v0, v1
	v_and_b32_e32 v1, 0x3ff, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b64 v3, v[0:1], s[2:3]
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s5
	s_load_b64 s[0:1], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, 0xffff, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, s15, s4, v[2:3]
	s_mov_b32 s4, 2
	v_mul_lo_u32 v1, v0, v0
	s_add_i32 s6, s0, 1
	s_cmp_gt_i32 s0, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, s6, v1
	s_cselect_b32 s5, -1, 0
	s_and_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s7, s5
	s_cbranch_execz .LBB0_12
; %bb.3:                                ; %.lr.ph37
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, 2, v0
	v_mov_b32_e32 v5, 1
	s_mov_b32 s5, 0
.LBB0_4:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_7 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[8:9], s[4:5], 2
	s_add_u32 s8, s2, s8
	s_addc_u32 s9, s3, s9
	global_load_b32 v1, v4, s[8:9]
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 1, v1
	s_cbranch_vccnz .LBB0_11
; %bb.5:                                ; %.preheader
                                        ;   in Loop: Header=BB0_4 Depth=1
	v_mul_lo_u32 v1, v3, s4
	s_mov_b32 s7, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ge_i32_e64 s0, v1
	s_cbranch_execz .LBB0_10
; %bb.6:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_4 Depth=1
	v_mov_b32_e32 v6, v3
	s_mov_b32 s8, 2
	s_mov_b32 s9, 0
.LBB0_7:                                ; %.lr.ph
                                        ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_le_i32_e64 s4, v6
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_store_b32 v[1:2], v5, off
.LBB0_9:                                ;   in Loop: Header=BB0_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
	s_add_i32 s8, s8, s1
	v_add_nc_u32_e32 v6, s1, v6
	v_add_nc_u32_e32 v1, s8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, v1, s4
	v_cmp_lt_i32_e32 vcc_lo, s0, v1
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_7
.LBB0_10:                               ; %Flow46
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB0_11:                               ;   in Loop: Header=BB0_4 Depth=1
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s4, s4
	s_cmp_le_i32 s7, s6
	s_cbranch_scc1 .LBB0_4
.LBB0_12:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17parInterweavedSOEPiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17parInterweavedSOEPiii, .Lfunc_end0-_Z17parInterweavedSOEPiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 428
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17parInterweavedSOEPiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17parInterweavedSOEPiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
