// source: http://cacs.usc.edu/education/cs596/src/cuda/pi.cu

// Using CUDA device to calculate pi

#include <stdio.h>
#include <cuda.h>
#include <time.h>

#define NBIN 268435456	  // Number of bins
#define NUM_BLOCK  30  // Number of thread blocks
#define NUM_THREAD  8  // Number of threads per block
#define PI 3.1415926535
//
// #Ifdef DOUBLE_PRECISION
//
// #else
//
// #endif
int tid;
float pi = 0;
double pi_dp = 0;

// Kernel that executes on the CUDA device
__global__
void cal_pi(float *sum, int nbin, float step, int nthreads, int nblocks) {
	int i;

	float x;
	int idx = blockIdx.x*blockDim.x+threadIdx.x;  // Sequential thread index across the blocks

	for (i=idx; i<nbin; i+=nthreads*nblocks) {
		x = (i+0.5)*step;
		sum[idx] += 4.0/(1.0+x*x);
	}

}
__global__
void cal_pi_dp(double *sum, int nbin, double step, int nthreads, int nblocks) {
	int i;

	double x;
	int idx = blockIdx.x*blockDim.x+threadIdx.x;  // Sequential thread index across the blocks

	for (i=idx; i<nbin; i+=nthreads*nblocks) {
		x = (i+0.5)*step;
		sum[idx] += 4.0/(1.0+x*x);
	}

}

// Main routine that executes on the host
int main(void) {
	dim3 dimGrid(NUM_BLOCK,1,1);  // Grid dimensions
	dim3 dimBlock(NUM_THREAD,1,1);  // Block dimensions
	float *sumHost, *sumDev;  // Pointer to host & device arrays
	double *sumHost_dp,*sumDev_dp;
	clock_t start, stop;
	long N[4] = {1,16777216,67108864,268435456};

	size_t size = NUM_BLOCK*NUM_THREAD*sizeof(float);  //Array memory size
	for(int n=0;n<4;n++){
			if(n>0){
			printf("=====================SINGLE PRECISION===============================\n");
			printf("\n" );
			printf("\n" );
			printf("# of Bins = %li, # of blocks = %i, # of threads/block = %d.\n", N[n],NUM_BLOCK, NUM_THREAD);
			printf("\n" );
		}


	float step = 1.0/N[n];  // Step size
	start = clock();
	sumHost = (float *)malloc(size);  //  Allocate array on host
	cudaMalloc((void **) &sumDev, size);  // Allocate array on device
	// Initialize array in device to 0
	cudaMemset(sumDev, 0, size);
	// Do calculation on device

	cal_pi <<<dimGrid, dimBlock>>> (sumDev, NBIN, step, NUM_THREAD, NUM_BLOCK); // call CUDA kernel

	// Retrieve result from device and store it in host array
	cudaMemcpy(sumHost, sumDev, size, cudaMemcpyDeviceToHost);
	for(tid=0; tid<NUM_THREAD*NUM_BLOCK; tid++)
		pi += sumHost[tid];
	pi *= step;

	stop = clock();

	if(n>0){
		// Print results
		printf("CUDA Estimated PI  = %f [error %f] \n",pi,pi-PI);
		printf("GPU pi calculated in %f ms.\n", 1000*(stop-start)/(float)CLOCKS_PER_SEC);
		// Cleanup
	}
	free(sumHost);
	cudaFree(sumDev);
	if(n>0){
		printf("=====================DOUBLE PRECISION===============================\n");
		printf("\n" );
		printf("\n" );
		printf("# of Bins = %li, # of blocks = %i, # of threads/block = %d.\n", N[n],NUM_BLOCK, NUM_THREAD);
		printf("\n" );
	}
	double step_dp = 1.0/N[n];  // Step size
	start = clock();
	size = NUM_BLOCK*NUM_THREAD*sizeof(double);
	sumHost_dp = (double *)malloc(size);  //  Allocate array on host
	cudaMalloc((void **) &sumDev_dp, size);  // Allocate array on device
	// Initialize array in device to 0
	cudaMemset(sumDev, 0, size);
	// Do calculation on device

	cal_pi_dp <<<dimGrid, dimBlock>>> (sumDev_dp, N[n], step_dp, NUM_THREAD, NUM_BLOCK); // call CUDA kernel

	// Retrieve result from device and store it in host array
	cudaMemcpy(sumHost_dp, sumDev_dp, size, cudaMemcpyDeviceToHost);
	for(tid=0; tid<NUM_THREAD*NUM_BLOCK; tid++)
		pi += sumHost_dp[tid];
	pi *= step_dp;

	stop = clock();

	if(n>0){
		// Print results
		printf("CUDA Estmated PI =  %f [error %f] \n",pi,pi-PI);
		printf("GPU pi calculated in %f ms.\n", 1000*(stop-start)/(double)CLOCKS_PER_SEC);
		// Cleanup
	}
	free(sumHost_dp);
	cudaFree(sumDev_dp);
}
	return 0;
}

	.file	"tmpxft_00333d08_00000000-6_pi-mystery_modified.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z29__device_stub__Z6cal_piPfifiiPfifii
	.type	_Z29__device_stub__Z6cal_piPfifiiPfifii, @function
_Z29__device_stub__Z6cal_piPfifiiPfifii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movss	%xmm0, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6cal_piPfifii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z29__device_stub__Z6cal_piPfifiiPfifii, .-_Z29__device_stub__Z6cal_piPfifiiPfifii
	.globl	_Z6cal_piPfifii
	.type	_Z6cal_piPfifii, @function
_Z6cal_piPfifii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6cal_piPfifiiPfifii
	.cfi_endproc
.LFE2053:
	.size	_Z6cal_piPfifii, .-_Z6cal_piPfifii
	.globl	_Z32__device_stub__Z9cal_pi_dpPdidiiPdidii
	.type	_Z32__device_stub__Z9cal_pi_dpPdidiiPdidii, @function
_Z32__device_stub__Z9cal_pi_dpPdidiiPdidii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9cal_pi_dpPdidii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z32__device_stub__Z9cal_pi_dpPdidiiPdidii, .-_Z32__device_stub__Z9cal_pi_dpPdidiiPdidii
	.globl	_Z9cal_pi_dpPdidii
	.type	_Z9cal_pi_dpPdidii, @function
_Z9cal_pi_dpPdidii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z9cal_pi_dpPdidiiPdidii
	.cfi_endproc
.LFE2055:
	.size	_Z9cal_pi_dpPdidii, .-_Z9cal_pi_dpPdidii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"=====================SINGLE PRECISION===============================\n"
.LC1:
	.string	"\n"
.LC2:
	.string	"# of Bins = %li, # of blocks = %i, # of threads/block = %d.\n"
.LC5:
	.string	"CUDA Estimated PI  = %f [error %f] \n"
.LC7:
	.string	"GPU pi calculated in %f ms.\n"
.LC8:
	.string	"=====================DOUBLE PRECISION===============================\n"
.LC9:
	.string	"CUDA Estmated PI =  %f [error %f] \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leaq	.LC0(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	$960, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	movabsq	$4294967326, %rax
	movl	$1, 40(%rsp)
	movl	$1, 52(%rsp)
	movq	$1, 56(%rsp)
	movq	$16777216, 64(%rsp)
	movq	$67108864, 72(%rsp)
	movq	$268435456, 80(%rsp)
	movq	%rax, 32(%rsp)
	subq	$22, %rax
	movq	%rax, 44(%rsp)
.L22:
	testq	%rbx, %rbx
	leaq	56(%rsp), %r14
	je	.L14
	leaq	.LC1(%rip), %r12
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%r14,%rbx,8), %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC2(%rip), %rsi
	movl	$8, %r8d
	movl	$30, %ecx
	call	__printf_chk@PLT
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L14:
	movq	(%r14,%rbx,8), %r14
	movsd	.LC3(%rip), %xmm1
	cvtsi2sdq	%r14, %xmm0
	divsd	%xmm0, %xmm1
	cvtsd2ss	%xmm1, %xmm2
	movsd	%xmm1, (%rsp)
	movss	%xmm2, 12(%rsp)
	call	clock@PLT
	movq	%rbp, %rdi
	movq	%rax, %r15
	call	malloc@PLT
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbp, %rdx
	call	cudaMemset@PLT
	movl	52(%rsp), %ecx
	movl	40(%rsp), %esi
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	movq	32(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movss	12(%rsp), %xmm0
	movq	16(%rsp), %rdi
	movl	$30, %ecx
	movl	$8, %edx
	movl	$268435456, %esi
	call	_Z29__device_stub__Z6cal_piPfifiiPfifii
.L15:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movss	pi(%rip), %xmm0
	xorl	%eax, %eax
.L16:
	addss	(%r12,%rax,4), %xmm0
	incq	%rax
	cmpq	$240, %rax
	jne	.L16
	movl	$240, tid(%rip)
	mulss	12(%rsp), %xmm0
	movss	%xmm0, pi(%rip)
	call	clock@PLT
	movq	%rax, %rbp
	testq	%rbx, %rbx
	je	.L17
	cvtss2sd	pi(%rip), %xmm0
	subq	%r15, %rbp
	movaps	%xmm0, %xmm1
	movb	$2, %al
	subsd	.LC4(%rip), %xmm1
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	imulq	$1000, %rbp, %rbp
	call	__printf_chk@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtsi2ssq	%rbp, %xmm0
	divss	.LC6(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
.L17:
	movq	%r12, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	testq	%rbx, %rbx
	je	.L18
	leaq	.LC1(%rip), %rbp
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$2, %edi
	movq	%r14, %rdx
	xorl	%eax, %eax
	leaq	.LC2(%rip), %rsi
	movl	$8, %r8d
	movl	$30, %ecx
	call	__printf_chk@PLT
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L18:
	call	clock@PLT
	movl	$1920, %edi
	movq	%rax, %r12
	call	malloc@PLT
	leaq	24(%rsp), %rdi
	movl	$1920, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	movl	$1920, %edx
	call	cudaMemset@PLT
	movl	52(%rsp), %ecx
	movl	40(%rsp), %esi
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	movq	32(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movsd	(%rsp), %xmm0
	movq	24(%rsp), %rdi
	movl	$30, %ecx
	movl	%r14d, %esi
	movl	$8, %edx
	call	_Z32__device_stub__Z9cal_pi_dpPdidiiPdidii
.L19:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$1920, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movss	pi(%rip), %xmm0
	xorl	%eax, %eax
.L20:
	cvtss2sd	%xmm0, %xmm0
	addsd	0(%rbp,%rax,8), %xmm0
	incq	%rax
	cvtsd2ss	%xmm0, %xmm0
	cmpq	$240, %rax
	jne	.L20
	movl	$240, tid(%rip)
	cvtss2sd	%xmm0, %xmm0
	mulsd	(%rsp), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, pi(%rip)
	call	clock@PLT
	movq	%rax, %r14
	testq	%rbx, %rbx
	je	.L21
	cvtss2sd	pi(%rip), %xmm0
	subq	%r12, %r14
	movaps	%xmm0, %xmm1
	movb	$2, %al
	subsd	.LC4(%rip), %xmm1
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	imulq	$1000, %r14, %r14
	call	__printf_chk@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtsi2sdq	%r14, %xmm0
	divsd	.LC10(%rip), %xmm0
	call	__printf_chk@PLT
.L21:
	movq	%rbp, %rdi
	incq	%rbx
	movl	$1920, %ebp
	call	free@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	cmpq	$4, %rbx
	jne	.L22
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z9cal_pi_dpPdidii"
.LC12:
	.string	"_Z6cal_piPfifii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9cal_pi_dpPdidii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6cal_piPfifii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	pi_dp
	.bss
	.align 8
	.type	pi_dp, @object
	.size	pi_dp, 8
pi_dp:
	.zero	8
	.globl	pi
	.align 4
	.type	pi, @object
	.size	pi, 4
pi:
	.zero	4
	.globl	tid
	.align 4
	.type	tid, @object
	.size	tid, 4
tid:
	.zero	4
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	0
	.long	1072693248
	.align 8
.LC4:
	.long	1413551940
	.long	1074340347
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	1232348160
	.section	.rodata.cst8
	.align 8
.LC10:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// source: http://cacs.usc.edu/education/cs596/src/cuda/pi.cu

// Using CUDA device to calculate pi

#include <stdio.h>
#include <hip/hip_runtime.h>
#include <time.h>

#define NBIN 268435456	  // Number of bins
#define NUM_BLOCK  30  // Number of thread blocks
#define NUM_THREAD  8  // Number of threads per block
#define PI 3.1415926535
//
// #Ifdef DOUBLE_PRECISION
//
// #else
//
// #endif
int tid;
float pi = 0;
double pi_dp = 0;

// Kernel that executes on the CUDA device
__global__
void cal_pi(float *sum, int nbin, float step, int nthreads, int nblocks) {
	int i;

	float x;
	int idx = blockIdx.x*blockDim.x+threadIdx.x;  // Sequential thread index across the blocks

	for (i=idx; i<nbin; i+=nthreads*nblocks) {
		x = (i+0.5)*step;
		sum[idx] += 4.0/(1.0+x*x);
	}

}
__global__
void cal_pi_dp(double *sum, int nbin, double step, int nthreads, int nblocks) {
	int i;

	double x;
	int idx = blockIdx.x*blockDim.x+threadIdx.x;  // Sequential thread index across the blocks

	for (i=idx; i<nbin; i+=nthreads*nblocks) {
		x = (i+0.5)*step;
		sum[idx] += 4.0/(1.0+x*x);
	}

}

// Main routine that executes on the host
int main(void) {
	dim3 dimGrid(NUM_BLOCK,1,1);  // Grid dimensions
	dim3 dimBlock(NUM_THREAD,1,1);  // Block dimensions
	float *sumHost, *sumDev;  // Pointer to host & device arrays
	double *sumHost_dp,*sumDev_dp;
	clock_t start, stop;
	long N[4] = {1,16777216,67108864,268435456};

	size_t size = NUM_BLOCK*NUM_THREAD*sizeof(float);  //Array memory size
	for(int n=0;n<4;n++){
			if(n>0){
			printf("=====================SINGLE PRECISION===============================\n");
			printf("\n" );
			printf("\n" );
			printf("# of Bins = %li, # of blocks = %i, # of threads/block = %d.\n", N[n],NUM_BLOCK, NUM_THREAD);
			printf("\n" );
		}


	float step = 1.0/N[n];  // Step size
	start = clock();
	sumHost = (float *)malloc(size);  //  Allocate array on host
	hipMalloc((void **) &sumDev, size);  // Allocate array on device
	// Initialize array in device to 0
	hipMemset(sumDev, 0, size);
	// Do calculation on device

	cal_pi <<<dimGrid, dimBlock>>> (sumDev, NBIN, step, NUM_THREAD, NUM_BLOCK); // call CUDA kernel

	// Retrieve result from device and store it in host array
	hipMemcpy(sumHost, sumDev, size, hipMemcpyDeviceToHost);
	for(tid=0; tid<NUM_THREAD*NUM_BLOCK; tid++)
		pi += sumHost[tid];
	pi *= step;

	stop = clock();

	if(n>0){
		// Print results
		printf("CUDA Estimated PI  = %f [error %f] \n",pi,pi-PI);
		printf("GPU pi calculated in %f ms.\n", 1000*(stop-start)/(float)CLOCKS_PER_SEC);
		// Cleanup
	}
	free(sumHost);
	hipFree(sumDev);
	if(n>0){
		printf("=====================DOUBLE PRECISION===============================\n");
		printf("\n" );
		printf("\n" );
		printf("# of Bins = %li, # of blocks = %i, # of threads/block = %d.\n", N[n],NUM_BLOCK, NUM_THREAD);
		printf("\n" );
	}
	double step_dp = 1.0/N[n];  // Step size
	start = clock();
	size = NUM_BLOCK*NUM_THREAD*sizeof(double);
	sumHost_dp = (double *)malloc(size);  //  Allocate array on host
	hipMalloc((void **) &sumDev_dp, size);  // Allocate array on device
	// Initialize array in device to 0
	hipMemset(sumDev, 0, size);
	// Do calculation on device

	cal_pi_dp <<<dimGrid, dimBlock>>> (sumDev_dp, N[n], step_dp, NUM_THREAD, NUM_BLOCK); // call CUDA kernel

	// Retrieve result from device and store it in host array
	hipMemcpy(sumHost_dp, sumDev_dp, size, hipMemcpyDeviceToHost);
	for(tid=0; tid<NUM_THREAD*NUM_BLOCK; tid++)
		pi += sumHost_dp[tid];
	pi *= step_dp;

	stop = clock();

	if(n>0){
		// Print results
		printf("CUDA Estmated PI =  %f [error %f] \n",pi,pi-PI);
		printf("GPU pi calculated in %f ms.\n", 1000*(stop-start)/(double)CLOCKS_PER_SEC);
		// Cleanup
	}
	free(sumHost_dp);
	hipFree(sumDev_dp);
}
	return 0;
}

	.text
	.file	"pi-mystery_modified.hip"
	.globl	_Z21__device_stub__cal_piPfifii # -- Begin function _Z21__device_stub__cal_piPfifii
	.type	_Z21__device_stub__cal_piPfifii,@function
_Z21__device_stub__cal_piPfifii:        # @_Z21__device_stub__cal_piPfifii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	12(%rsp), %r8
	movl	%edx, (%r8)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%r8, 24(%rbx)
	movq	%rdx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6cal_piPfifii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__cal_piPfifii, .Lfunc_end0-_Z21__device_stub__cal_piPfifii
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__cal_pi_dpPdidii # -- Begin function _Z24__device_stub__cal_pi_dpPdidii
	.type	_Z24__device_stub__cal_pi_dpPdidii,@function
_Z24__device_stub__cal_pi_dpPdidii:     # @_Z24__device_stub__cal_pi_dpPdidii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	32(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	8(%rsp), %r8
	movl	%edx, (%r8)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%r8, 24(%rbx)
	movq	%rdx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9cal_pi_dpPdidii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__cal_pi_dpPdidii, .Lfunc_end1-_Z24__device_stub__cal_pi_dpPdidii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x3ff0000000000000              # double 1
.LCPI2_1:
	.quad	0xc00921fb54411744              # double -3.1415926535000001
.LCPI2_3:
	.quad	0x412e848000000000              # double 1.0E+6
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI2_2:
	.long	0x49742400                      # float 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967304, %rax               # imm = 0x100000008
	movq	$16777216, 40(%rsp)             # imm = 0x1000000
	movq	$67108864, 48(%rsp)             # imm = 0x4000000
	movq	$268435456, 56(%rsp)            # imm = 0x10000000
	movl	$960, %ebp                      # imm = 0x3C0
	leaq	22(%rax), %r15
	xorl	%ebx, %ebx
.LBB2_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_7 Depth 2
                                        #     Child Loop BB2_14 Depth 2
	testq	%rbx, %rbx
	je	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$10, %edi
	callq	putchar@PLT
	movl	$10, %edi
	callq	putchar@PLT
	movq	32(%rsp,%rbx,8), %r13
	movl	$.L.str.2, %edi
	movq	%r13, %rsi
	movl	$30, %edx
	movl	$8, %ecx
	xorl	%eax, %eax
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	jmp	.LBB2_4
.LBB2_2:                                #   in Loop: Header=BB2_1 Depth=1
	movl	$1, %r13d
.LBB2_4:                                # %._crit_edge
                                        #   in Loop: Header=BB2_1 Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r13, %xmm0
	movsd	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	movsd	%xmm1, 24(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsd2ss	%xmm1, %xmm0
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	callq	clock
	movq	%rax, %r12
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%rsp, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbp, %rdx
	callq	hipMemset
	movq	%r15, %rdi
	movl	$1, %esi
	movabsq	$4294967304, %rdx               # imm = 0x100000008
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:                                #   in Loop: Header=BB2_1 Depth=1
	movq	(%rsp), %rdi
	movl	$268435456, %esi                # imm = 0x10000000
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	$8, %edx
	movl	$30, %ecx
	callq	_Z21__device_stub__cal_piPfifii
.LBB2_6:                                #   in Loop: Header=BB2_1 Depth=1
	movq	(%rsp), %rsi
	movq	%r14, %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movss	pi(%rip), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	xorl	%eax, %eax
.LBB2_7:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	addss	(%r14,%rax,4), %xmm0
	incq	%rax
	cmpq	$240, %rax
	jne	.LBB2_7
# %bb.8:                                #   in Loop: Header=BB2_1 Depth=1
	movl	$240, tid(%rip)
	mulss	12(%rsp), %xmm0                 # 4-byte Folded Reload
	movss	%xmm0, pi(%rip)
	callq	clock
	testq	%rbx, %rbx
	je	.LBB2_10
# %bb.9:                                #   in Loop: Header=BB2_1 Depth=1
	movq	%rax, %rbp
	xorps	%xmm0, %xmm0
	cvtss2sd	pi(%rip), %xmm0
	movaps	%xmm0, %xmm1
	addsd	.LCPI2_1(%rip), %xmm1
	movl	$.L.str.3, %edi
	movb	$2, %al
	callq	printf
	subq	%r12, %rbp
	imulq	$1000, %rbp, %rax               # imm = 0x3E8
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI2_2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movq	%r14, %rdi
	callq	free
	movq	(%rsp), %rdi
	callq	hipFree
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$10, %edi
	callq	putchar@PLT
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.L.str.2, %edi
	movq	%r13, %rsi
	movl	$30, %edx
	movl	$8, %ecx
	xorl	%eax, %eax
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	jmp	.LBB2_11
.LBB2_10:                               # %.critedge
                                        #   in Loop: Header=BB2_1 Depth=1
	movq	%r14, %rdi
	callq	free
	movq	(%rsp), %rdi
	callq	hipFree
.LBB2_11:                               #   in Loop: Header=BB2_1 Depth=1
	callq	clock
	movq	%rax, %r14
	movl	$1920, %edi                     # imm = 0x780
	callq	malloc
	movq	%rax, %rbp
	movl	$1920, %esi                     # imm = 0x780
	leaq	16(%rsp), %rdi
	callq	hipMalloc
	movq	(%rsp), %rdi
	movl	$1920, %edx                     # imm = 0x780
	xorl	%esi, %esi
	callq	hipMemset
	movq	%r15, %rdi
	movl	$1, %esi
	movabsq	$4294967304, %rdx               # imm = 0x100000008
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_13
# %bb.12:                               #   in Loop: Header=BB2_1 Depth=1
	movq	16(%rsp), %rdi
	movl	%r13d, %esi
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	$8, %edx
	movl	$30, %ecx
	callq	_Z24__device_stub__cal_pi_dpPdidii
.LBB2_13:                               #   in Loop: Header=BB2_1 Depth=1
	movq	16(%rsp), %rsi
	movl	$1920, %edx                     # imm = 0x780
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movss	pi(%rip), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	xorl	%eax, %eax
.LBB2_14:                               #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cvtss2sd	%xmm0, %xmm0
	addsd	(%rbp,%rax,8), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	incq	%rax
	cmpq	$240, %rax
	jne	.LBB2_14
# %bb.15:                               #   in Loop: Header=BB2_1 Depth=1
	movl	$240, tid(%rip)
	cvtss2sd	%xmm0, %xmm0
	movsd	24(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	mulsd	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtsd2ss	%xmm1, %xmm0
	movss	%xmm0, pi(%rip)
	callq	clock
	testq	%rbx, %rbx
	je	.LBB2_17
# %bb.16:                               #   in Loop: Header=BB2_1 Depth=1
	movq	%rax, %r12
	xorps	%xmm0, %xmm0
	cvtss2sd	pi(%rip), %xmm0
	movaps	%xmm0, %xmm1
	addsd	.LCPI2_1(%rip), %xmm1
	movl	$.L.str.6, %edi
	movb	$2, %al
	callq	printf
	subq	%r14, %r12
	imulq	$1000, %r12, %rax               # imm = 0x3E8
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI2_3(%rip), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
.LBB2_17:                               #   in Loop: Header=BB2_1 Depth=1
	movq	%rbp, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	incq	%rbx
	movl	$1920, %ebp                     # imm = 0x780
	cmpq	$4, %rbx
	jne	.LBB2_1
# %bb.18:
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6cal_piPfifii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9cal_pi_dpPdidii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	tid,@object                     # @tid
	.bss
	.globl	tid
	.p2align	2, 0x0
tid:
	.long	0                               # 0x0
	.size	tid, 4

	.type	pi,@object                      # @pi
	.globl	pi
	.p2align	2, 0x0
pi:
	.long	0x00000000                      # float 0
	.size	pi, 4

	.type	pi_dp,@object                   # @pi_dp
	.globl	pi_dp
	.p2align	3, 0x0
pi_dp:
	.quad	0x0000000000000000              # double 0
	.size	pi_dp, 8

	.type	_Z6cal_piPfifii,@object         # @_Z6cal_piPfifii
	.section	.rodata,"a",@progbits
	.globl	_Z6cal_piPfifii
	.p2align	3, 0x0
_Z6cal_piPfifii:
	.quad	_Z21__device_stub__cal_piPfifii
	.size	_Z6cal_piPfifii, 8

	.type	_Z9cal_pi_dpPdidii,@object      # @_Z9cal_pi_dpPdidii
	.globl	_Z9cal_pi_dpPdidii
	.p2align	3, 0x0
_Z9cal_pi_dpPdidii:
	.quad	_Z24__device_stub__cal_pi_dpPdidii
	.size	_Z9cal_pi_dpPdidii, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"# of Bins = %li, # of blocks = %i, # of threads/block = %d.\n"
	.size	.L.str.2, 61

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"CUDA Estimated PI  = %f [error %f] \n"
	.size	.L.str.3, 37

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"GPU pi calculated in %f ms.\n"
	.size	.L.str.4, 29

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"CUDA Estmated PI =  %f [error %f] \n"
	.size	.L.str.6, 36

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6cal_piPfifii"
	.size	.L__unnamed_1, 16

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9cal_pi_dpPdidii"
	.size	.L__unnamed_2, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"=====================SINGLE PRECISION==============================="
	.size	.Lstr, 69

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"=====================DOUBLE PRECISION==============================="
	.size	.Lstr.1, 69

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__cal_piPfifii
	.addrsig_sym _Z24__device_stub__cal_pi_dpPdidii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6cal_piPfifii
	.addrsig_sym _Z9cal_pi_dpPdidii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6cal_piPfifii         ; -- Begin function _Z6cal_piPfifii
	.globl	_Z6cal_piPfifii
	.p2align	8
	.type	_Z6cal_piPfifii,@function
_Z6cal_piPfifii:                        ; @_Z6cal_piPfifii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB0_4
; %bb.1:                                ; %.lr.ph
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	v_cvt_f64_f32_e32 v[4:5], s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_mul_i32 s1, s7, s6
	s_mov_b32 s0, 0
	global_load_b32 v0, v[2:3], off
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_cvt_f64_i32_e32 v[6:7], v1
	v_add_nc_u32_e32 v1, s1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], 0.5
	v_mul_f64 v[6:7], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v6, v[6:7]
	v_mul_f32_e32 v6, v6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[6:7], v6
	v_add_f64 v[6:7], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[8:9], null, v[6:7], v[6:7], 4.0
	v_div_scale_f64 v[14:15], vcc_lo, 4.0, v[6:7], 4.0
	v_rcp_f64_e32 v[10:11], v[8:9]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
	v_mul_f64 v[12:13], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[8:9], v[12:13], v[14:15]
	v_div_fmas_f64 v[8:9], v[8:9], v[10:11], v[12:13]
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[10:11], v0
	v_cmp_le_i32_e32 vcc_lo, s4, v1
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[6:7], v[8:9], v[6:7], 4.0
	v_add_f64 v[6:7], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[6:7]
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_2
; %bb.3:                                ; %._crit_edge
	s_or_b32 exec_lo, exec_lo, s0
	global_store_b32 v[2:3], v0, off
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6cal_piPfifii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6cal_piPfifii, .Lfunc_end0-_Z6cal_piPfifii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 352
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9cal_pi_dpPdidii      ; -- Begin function _Z9cal_pi_dpPdidii
	.globl	_Z9cal_pi_dpPdidii
	.p2align	8
	.type	_Z9cal_pi_dpPdidii,@function
_Z9cal_pi_dpPdidii:                     ; @_Z9cal_pi_dpPdidii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s4, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB1_4
; %bb.1:                                ; %.lr.ph
	s_load_b64 s[6:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b128 s[0:3], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_mul_i32 s3, s3, s2
	s_mov_b32 s2, 0
	global_load_b64 v[4:5], v[2:3], off
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	v_cvt_f64_i32_e32 v[6:7], v1
	v_add_nc_u32_e32 v1, s3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], 0.5
	v_mul_f64 v[6:7], v[6:7], s[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[6:7], 1.0
	v_div_scale_f64 v[8:9], null, v[6:7], v[6:7], 4.0
	v_div_scale_f64 v[14:15], vcc_lo, 4.0, v[6:7], 4.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[10:11], v[8:9]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[14:15], v[10:11]
	v_fma_f64 v[8:9], -v[8:9], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[8:9], v[8:9], v[10:11], v[12:13]
	v_cmp_le_i32_e32 vcc_lo, s4, v1
	s_or_b32 s2, vcc_lo, s2
	v_div_fixup_f64 v[6:7], v[8:9], v[6:7], 4.0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[4:5], v[6:7], v[4:5]
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB1_2
; %bb.3:                                ; %._crit_edge
	s_or_b32 exec_lo, exec_lo, s2
	global_store_b64 v[2:3], v[4:5], off
.LBB1_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9cal_pi_dpPdidii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9cal_pi_dpPdidii, .Lfunc_end1-_Z9cal_pi_dpPdidii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 328
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6cal_piPfifii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6cal_piPfifii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9cal_pi_dpPdidii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9cal_pi_dpPdidii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
