#include <iostream>

// Everything done by Rolf Andreassen!

using namespace std;

__device__ bool* syncArray = 0;

__device__ void device_vector_reduce_blocks_recursive (double* toBeReduced, int workingLength) {

  syncArray[blockDim.x] = false;

  // First reduce this block

  // Copy from global to shared memory for local reduction

  __shared__ double localResults[1024];

  int localIndex = blockDim.x * blockIdx.x + threadIdx.x;

  localResults[threadIdx.x] = toBeReduced[localIndex];

  // Reduce local block of (at most) 1024 entries

  int len = blockDim.x;

  if (len > workingLength) len = workingLength;

  while (len > 1) {

    if ((localIndex < workingLength) && (threadIdx.x < (len - (len % 2)) / 2)) {

      localResults[threadIdx.x] += localResults[threadIdx.x + (len + (len % 2)) / 2];

    }

    len = (len + (len % 2)) / 2;

    __syncthreads();

  }

 

  // Need to synchronise over blocks! Otherwise we may overwrite

  // data another block is still working on.

  syncArray[blockDim.x] = true;

  bool everyoneDone = false;

  while (!everyoneDone) {

    everyoneDone = true;

    for (int i = 0; i < blockDim.x; ++i) {

      if (syncArray[i]) continue;

      everyoneDone = false;

      break;

    }

  }

 

  if ((0 == threadIdx.x) && (localIndex < workingLength)) toBeReduced[blockIdx.x] = localResults[threadIdx.x];

  // First blockDim.x entries of toBeReduced are now sums for individual blocks

 

  // Now repeat reduction just on the first part of the vector.

  int newWorkingLength = (workingLength + blockDim.x - 1) / blockDim.x;

  if (newWorkingLength > 1) device_vector_reduce_blocks_recursive(toBeReduced, newWorkingLength);

}

__global__ void device_vector_reduce_blocks (double* toBeReduced, int workingLength) {
  // Global function cannot recurse, outsource actual algorithm to device function
  device_vector_reduce_blocks_recursive(toBeReduced, workingLength);
}

int main (int argc, char** argv) {
  int sizeOfVector = 100;
  if (argc > 1) sizeOfVector = atoi(argv[1]);

  double* host_numbers = new double[sizeOfVector];
  double checkSum = 0;
  srand(42);
  for (int i = 0; i < sizeOfVector; ++i) {
    host_numbers[i] = rand() % 10;
    checkSum += host_numbers[i];
  }

  std::cout << "CPU result: " << checkSum << std::endl;
  double* dev_numbers;
  cudaMalloc((void**) &dev_numbers, sizeOfVector*sizeof(double));
  cudaMemcpy(dev_numbers, host_numbers, sizeOfVector*sizeof(double), cudaMemcpyHostToDevice);

  int numThreads = min(1024, sizeOfVector);
  int numBlocks  = (1023 + sizeOfVector) / 1024;
  std::cout << "Blocks and threads: " << numBlocks << " " << numThreads << std::endl;
  cudaMalloc((void**) syncArray, numBlocks * sizeof(bool));

  device_vector_reduce_blocks<<<numBlocks, numThreads>>>(dev_numbers, sizeOfVector);
  cudaDeviceSynchronize(); // Ensure that kernel is done before copying result
  cudaMemcpy(&checkSum, dev_numbers, sizeof(double), cudaMemcpyDeviceToHost);

  std::cout << "GPU result: " << checkSum << std::endl;

  return 0;
}
	.file	"tmpxft_003862e3_00000000-6_ex2_solution.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z37device_vector_reduce_blocks_recursivePdi
	.type	_Z37device_vector_reduce_blocks_recursivePdi, @function
_Z37device_vector_reduce_blocks_recursivePdi:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z37device_vector_reduce_blocks_recursivePdi, .-_Z37device_vector_reduce_blocks_recursivePdi
	.globl	_Z48__device_stub__Z27device_vector_reduce_blocksPdiPdi
	.type	_Z48__device_stub__Z27device_vector_reduce_blocksPdiPdi, @function
_Z48__device_stub__Z27device_vector_reduce_blocksPdiPdi:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z27device_vector_reduce_blocksPdi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L4:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z48__device_stub__Z27device_vector_reduce_blocksPdiPdi, .-_Z48__device_stub__Z27device_vector_reduce_blocksPdiPdi
	.globl	_Z27device_vector_reduce_blocksPdi
	.type	_Z27device_vector_reduce_blocksPdi, @function
_Z27device_vector_reduce_blocksPdi:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z27device_vector_reduce_blocksPdiPdi
	.cfi_endproc
.LFE3662:
	.size	_Z27device_vector_reduce_blocksPdi, .-_Z27device_vector_reduce_blocksPdi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"CPU result: "
.LC2:
	.string	"Blocks and threads: "
.LC3:
	.string	" "
.LC4:
	.string	"GPU result: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jle	.L18
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movslq	%eax, %rdi
	movabsq	$1152921504606846975, %rax
	movq	%rdi, %rbx
	cmpq	%rdi, %rax
	jnb	.L11
	jmp	.L21
.L18:
	movl	$100, %edi
	movl	$100, %ebx
.L11:
	salq	$3, %rdi
	movslq	%ebx, %r12
	movl	$10, %r14d
	call	_Znam@PLT
	movl	$42, %edi
	movq	$0x000000000, (%rsp)
	movq	%rax, %rbp
	call	srand@PLT
	movq	%rbp, %r13
	leaq	0(%rbp,%r12,8), %r15
	jmp	.L13
.L21:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L20
	call	__cxa_throw_bad_array_new_length@PLT
.L13:
	cmpq	%r15, %r13
	je	.L22
	call	rand@PLT
	addq	$8, %r13
	cltd
	idivl	%r14d
	cvtsi2sdl	%edx, %xmm0
	movsd	%xmm0, -8(%r13)
	addsd	(%rsp), %xmm0
	movsd	%xmm0, (%rsp)
	jmp	.L13
.L22:
	leaq	_ZSt4cout(%rip), %r13
	leaq	.LC1(%rip), %rsi
	salq	$3, %r12
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	%r12, %rsi
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$1024, %r12d
	leal	1023(%rbx), %ebp
	call	cudaMemcpy@PLT
	cmpl	%r12d, %ebx
	leaq	.LC2(%rip), %rsi
	movq	%r13, %rdi
	cmovle	%ebx, %r12d
	sarl	$10, %ebp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	_ZL9syncArray(%rip), %rdi
	movslq	%ebp, %rsi
	call	cudaMalloc@PLT
	movl	%r12d, 28(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%ebp, 16(%rsp)
	movq	%rax, 32(%rsp)
	movl	36(%rsp), %ecx
	movq	%rax, 20(%rsp)
	movq	28(%rsp), %rdx
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	8(%rsp), %rdi
	movl	%ebx, %esi
	call	_Z48__device_stub__Z27device_vector_reduce_blocksPdiPdi
.L16:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rsp, %rdi
	movl	$8, %edx
	call	cudaMemcpy@PLT
	leaq	.LC4(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
.L20:
	call	__stack_chk_fail@PLT
.L17:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z27device_vector_reduce_blocksPdi"
.LC6:
	.string	"syncArray"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z27device_vector_reduce_blocksPdi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movl	$8, %r9d
	leaq	_ZL9syncArray(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL9syncArray
	.comm	_ZL9syncArray,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>

// Everything done by Rolf Andreassen!

using namespace std;

__device__ bool* syncArray = 0;

__device__ void device_vector_reduce_blocks_recursive (double* toBeReduced, int workingLength) {

  syncArray[blockDim.x] = false;

  // First reduce this block

  // Copy from global to shared memory for local reduction

  __shared__ double localResults[1024];

  int localIndex = blockDim.x * blockIdx.x + threadIdx.x;

  localResults[threadIdx.x] = toBeReduced[localIndex];

  // Reduce local block of (at most) 1024 entries

  int len = blockDim.x;

  if (len > workingLength) len = workingLength;

  while (len > 1) {

    if ((localIndex < workingLength) && (threadIdx.x < (len - (len % 2)) / 2)) {

      localResults[threadIdx.x] += localResults[threadIdx.x + (len + (len % 2)) / 2];

    }

    len = (len + (len % 2)) / 2;

    __syncthreads();

  }

 

  // Need to synchronise over blocks! Otherwise we may overwrite

  // data another block is still working on.

  syncArray[blockDim.x] = true;

  bool everyoneDone = false;

  while (!everyoneDone) {

    everyoneDone = true;

    for (int i = 0; i < blockDim.x; ++i) {

      if (syncArray[i]) continue;

      everyoneDone = false;

      break;

    }

  }

 

  if ((0 == threadIdx.x) && (localIndex < workingLength)) toBeReduced[blockIdx.x] = localResults[threadIdx.x];

  // First blockDim.x entries of toBeReduced are now sums for individual blocks

 

  // Now repeat reduction just on the first part of the vector.

  int newWorkingLength = (workingLength + blockDim.x - 1) / blockDim.x;

  if (newWorkingLength > 1) device_vector_reduce_blocks_recursive(toBeReduced, newWorkingLength);

}

__global__ void device_vector_reduce_blocks (double* toBeReduced, int workingLength) {
  // Global function cannot recurse, outsource actual algorithm to device function
  device_vector_reduce_blocks_recursive(toBeReduced, workingLength);
}

int main (int argc, char** argv) {
  int sizeOfVector = 100;
  if (argc > 1) sizeOfVector = atoi(argv[1]);

  double* host_numbers = new double[sizeOfVector];
  double checkSum = 0;
  srand(42);
  for (int i = 0; i < sizeOfVector; ++i) {
    host_numbers[i] = rand() % 10;
    checkSum += host_numbers[i];
  }

  std::cout << "CPU result: " << checkSum << std::endl;
  double* dev_numbers;
  hipMalloc((void**) &dev_numbers, sizeOfVector*sizeof(double));
  hipMemcpy(dev_numbers, host_numbers, sizeOfVector*sizeof(double), hipMemcpyHostToDevice);

  int numThreads = min(1024, sizeOfVector);
  int numBlocks  = (1023 + sizeOfVector) / 1024;
  std::cout << "Blocks and threads: " << numBlocks << " " << numThreads << std::endl;
  hipMalloc((void**) syncArray, numBlocks * sizeof(bool));

  device_vector_reduce_blocks<<<numBlocks, numThreads>>>(dev_numbers, sizeOfVector);
  hipDeviceSynchronize(); // Ensure that kernel is done before copying result
  hipMemcpy(&checkSum, dev_numbers, sizeof(double), hipMemcpyDeviceToHost);

  std::cout << "GPU result: " << checkSum << std::endl;

  return 0;
}
	.text
	.file	"ex2_solution.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z42__device_stub__device_vector_reduce_blocksPdi # -- Begin function _Z42__device_stub__device_vector_reduce_blocksPdi
	.type	_Z42__device_stub__device_vector_reduce_blocksPdi,@function
_Z42__device_stub__device_vector_reduce_blocksPdi: # @_Z42__device_stub__device_vector_reduce_blocksPdi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27device_vector_reduce_blocksPdi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z42__device_stub__device_vector_reduce_blocksPdi, .Lfunc_end0-_Z42__device_stub__device_vector_reduce_blocksPdi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	cmpl	$2, %edi
	jl	.LBB1_1
# %bb.2:
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	cltq
	leaq	(,%rax,8), %r14
	testl	%eax, %eax
	movq	$-1, %rdi
	cmovnsq	%r14, %rdi
	jmp	.LBB1_3
.LBB1_1:
	movl	$100, %ebx
	movl	$800, %r14d                     # imm = 0x320
	movl	$800, %edi                      # imm = 0x320
.LBB1_3:                                # %.thread
	callq	_Znam
	movq	%rax, %r15
	movl	$42, %edi
	callq	srand
	testl	%ebx, %ebx
	jle	.LBB1_4
# %bb.8:                                # %.lr.ph.preheader
	movl	%ebx, %r12d
	xorps	%xmm0, %xmm0
	xorl	%r13d, %r13d
.LBB1_9:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	%xmm0, (%r15,%r13,8)
	movsd	8(%rsp), %xmm1                  # 8-byte Reload
                                        # xmm1 = mem[0],zero
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 8(%rsp)                  # 8-byte Spill
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	incq	%r13
	cmpq	%r13, %r12
	jne	.LBB1_9
	jmp	.LBB1_5
.LBB1_4:
	xorps	%xmm0, %xmm0
.LBB1_5:                                # %._crit_edge
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movsd	%xmm0, 24(%rsp)
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	leaq	16(%rsp), %r12
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$1024, %r14d                    # imm = 0x400
	cmpl	%r14d, %ebx
	cmovll	%ebx, %r14d
	leal	1023(%rbx), %eax
	leal	2046(%rbx), %r15d
	testl	%eax, %eax
	cmovnsl	%eax, %r15d
	sarl	$10, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r15d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r12
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r12, %rdi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	syncArray(%rip), %rdi
	movslq	%r15d, %rsi
	callq	hipMalloc
	btsq	$32, %r15
	btsq	$32, %r14
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.6:
	movq	16(%rsp), %rdi
	movl	%ebx, %esi
	callq	_Z42__device_stub__device_vector_reduce_blocksPdi
.LBB1_7:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	leaq	24(%rsp), %rbx
	movl	$8, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	(%rbx), %xmm0                   # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z27device_vector_reduce_blocksPdi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$syncArray, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	syncArray,@object               # @syncArray
	.local	syncArray
	.comm	syncArray,8,8
	.type	_Z27device_vector_reduce_blocksPdi,@object # @_Z27device_vector_reduce_blocksPdi
	.section	.rodata,"a",@progbits
	.globl	_Z27device_vector_reduce_blocksPdi
	.p2align	3, 0x0
_Z27device_vector_reduce_blocksPdi:
	.quad	_Z42__device_stub__device_vector_reduce_blocksPdi
	.size	_Z27device_vector_reduce_blocksPdi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CPU result: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Blocks and threads: "
	.size	.L.str.1, 21

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" "
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"GPU result: "
	.size	.L.str.3, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z27device_vector_reduce_blocksPdi"
	.size	.L__unnamed_1, 35

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"syncArray"
	.size	.L__unnamed_2, 10

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z42__device_stub__device_vector_reduce_blocksPdi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym syncArray
	.addrsig_sym _Z27device_vector_reduce_blocksPdi
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z27device_vector_reduce_blocksPdi ; -- Begin function _Z27device_vector_reduce_blocksPdi
	.globl	_Z27device_vector_reduce_blocksPdi
	.p2align	8
	.type	_Z27device_vector_reduce_blocksPdi,@function
_Z27device_vector_reduce_blocksPdi:     ; @_Z27device_vector_reduce_blocksPdi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b64 s[8:9], s[0:1], 0x0
	s_mov_b32 s6, s15
	s_mov_b32 s7, 0
	s_load_b32 s5, s[0:1], 0x8
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v8, 1
	v_lshlrev_b32_e32 v6, 3, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s2, 0xffff
	s_lshl_b64 s[2:3], s[6:7], 3
	v_cvt_f32_u32_e32 v1, s4
	s_add_u32 s2, s8, s2
	s_addc_u32 s3, s9, s3
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, syncArray@rel32@lo+4
	s_addc_u32 s1, s1, syncArray@rel32@hi+12
	v_rcp_iflag_f32_e32 v3, v1
	v_mad_u64_u32 v[1:2], null, s6, s4, v[0:1]
	s_load_b64 s[6:7], s[0:1], 0x0
	s_sub_i32 s1, 0, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x4f7ffffe, v3
	v_cvt_u32_f32_e32 v4, v3
	v_lshlrev_b64 v[2:3], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s10, v4
	v_add_co_u32 v2, s0, s8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v3, s0, s9, v3, s0
	s_mul_i32 s1, s1, s10
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v4, s6 :: v_dual_mov_b32 v5, s7
	s_mul_hi_u32 s0, s10, s1
	s_add_i32 s6, s4, -1
	s_add_i32 s7, s10, s0
.LBB0_1:                                ; %tailrecurse.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_2 Depth 2
	global_load_b64 v[9:10], v[2:3], off
	v_add_co_u32 v11, s0, v4, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s0, 0, v5, s0
	v_cmp_gt_i32_e64 s0, s5, v1
	s_min_i32 s8, s4, s5
	s_cmp_lt_i32 s8, 2
	flat_store_b8 v[11:12], v7
	s_waitcnt vmcnt(0)
	ds_store_b64 v6, v[9:10]
	s_cbranch_scc1 .LBB0_6
.LBB0_2:                                ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshr_b32 s1, s8, 1
	s_and_b32 s9, s8, 1
	v_cmp_gt_u32_e64 s1, s1, v0
	s_add_i32 s9, s9, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshr_b32 s8, s9, 1
	s_and_b32 s10, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s10
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=2
	v_lshl_add_u32 v4, s8, 3, v6
	ds_load_b64 v[4:5], v4
	ds_load_b64 v[9:10], v6
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[4:5], v[4:5], v[9:10]
	ds_store_b64 v6, v[4:5]
.LBB0_4:                                ; %._crit_edge.i
                                        ;   in Loop: Header=BB0_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_cmp_gt_u32 s9, 3
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_2
; %bb.5:                                ; %.critedge.loopexit.i
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, syncArray@rel32@lo+4
	s_addc_u32 s1, s1, syncArray@rel32@hi+12
	global_load_b64 v[4:5], v7, s[0:1]
.LBB0_6:                                ; %.critedge.i
                                        ;   in Loop: Header=BB0_1 Depth=1
	v_cmp_gt_i32_e64 s0, s5, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, s1, v4, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v10, s1, 0, v5, s1
	s_and_b32 s1, vcc_lo, s0
	flat_store_b8 v[9:10], v8
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_1 Depth=1
	ds_load_b64 v[9:10], v6
	s_waitcnt lgkmcnt(0)
	global_store_b64 v7, v[9:10], s[2:3]
.LBB0_8:                                ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s0, s6, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s1, s0, s7
	s_mul_i32 s5, s1, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s0, s0, s5
	s_add_i32 s5, s1, 1
	s_sub_i32 s8, s0, s4
	s_cmp_ge_u32 s0, s4
	s_cselect_b32 s1, s5, s1
	s_cselect_b32 s0, s8, s0
	s_add_i32 s5, s1, 1
	s_cmp_ge_u32 s0, s4
	s_cselect_b32 s5, s5, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_i32 s5, 1
	s_cbranch_scc1 .LBB0_1
; %bb.9:                                ; %_Z37device_vector_reduce_blocks_recursivePdi.exit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27device_vector_reduce_blocksPdi
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z27device_vector_reduce_blocksPdi, .Lfunc_end0-_Z27device_vector_reduce_blocksPdi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 576
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	syncArray               ; @syncArray
	.type	syncArray,@object
	.section	.bss,"aw",@nobits
	.globl	syncArray
	.p2align	3, 0x0
syncArray:
	.quad	0
	.size	syncArray, 8

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym syncArray
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z27device_vector_reduce_blocksPdi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z27device_vector_reduce_blocksPdi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
