/*-
 * Copyright 2015 Grammarly, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
#include <algorithm>
#include <cuda_runtime.h>


#define MAX_NUM_THREADS_PER_BLOCK 512
#define MAX_NUM_BLOCKS_PER_KERNEL 128
#define FLT_MAX 3.402823466E+38F


__global__  void sliceColumns(int nrows,
                              int ncols,
                              const int* __restrict__ embedding_column_indxs,
                              const float* __restrict__ embedding_matrix,
                              float* __restrict__ dense_matrix) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int dense_column_idx;
    int row_idx;
    int embedding_offset;
    for (int i = start_i; i < nelems; i += nthreads) {
        dense_column_idx = i / nrows;
        row_idx = i % nrows;
        embedding_offset = embedding_column_indxs[dense_column_idx] * nrows + row_idx;
        dense_matrix[i] = embedding_matrix[embedding_offset];
    }
}


__global__  void sliceColumnsAndTranspose(int nrows,
                                          int ncols,
                                          const int* __restrict__ embedding_column_indxs,
                                          const float* __restrict__ embedding_matrix,
                                          float* __restrict__ dense_matrix) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;
    int dense_row_idx;
    int dense_col_idx;
    int dense_offset;
    int embedding_offset;
    for (int i = start_i; i < nelems; i += nthreads) {
        dense_row_idx = i / ncols;
        dense_col_idx = i % ncols;
        dense_offset = dense_col_idx * nrows + dense_row_idx;
        embedding_offset = embedding_column_indxs[dense_row_idx] * ncols + dense_col_idx;
        dense_matrix[dense_offset] = embedding_matrix[embedding_offset];
    }
}


template <typename T>
__global__  void sliceRows(int embedding_matrix_nrows,
                           const int* __restrict__ embedding_row_indxs,
                           const T* __restrict__ embedding_matrix,
                           int nrows,
                           int ncols,
                           T* __restrict__ dense_matrix) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int dense_column_idx;
    int row_idx;
    int embedding_offset;
    for (int i = start_i; i < nelems; i += nthreads) {
        dense_column_idx = i / nrows;
        row_idx = i % nrows;
        embedding_offset = dense_column_idx * embedding_matrix_nrows + embedding_row_indxs[row_idx];
        dense_matrix[i] = embedding_matrix[embedding_offset];
    }
}


__global__  void sliceRowsBatch(const int* embd_rows_indxs,
                                int nrows,
                                int ncols,
                                const float* __restrict__ embd_matrix,
                                int embd_nrows,
                                int embd_ncols,
                                float* __restrict__ dense_matrices[]) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * embd_ncols;
    const int total_nelems = nelems * ncols;

    int k, dense_offset, embd_row_idx, embd_col_idx, embd_offset;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        k = i / nelems;
        dense_offset = i % nelems;
        embd_row_idx = embd_rows_indxs[k * nrows + i % nrows];
        embd_col_idx = dense_offset / nrows;
        embd_offset = embd_col_idx * embd_nrows + embd_row_idx;
        dense_matrices[k][dense_offset] = embd_matrix[embd_offset];
    }
}


__global__  void slicedRowsBatchScaledAdd(const int* embd_rows_indxs,
                                          int nrows,
                                          int ncols,
                                          float alpha,
                                          const float* __restrict__ dense_matrices[],
                                          int embd_nrows,
                                          int embd_ncols,
                                          float* __restrict__ embd_matrix) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * embd_ncols;
    const int total_nelems = nelems * ncols;

    int k, dense_offset, embd_row_idx, embd_col_idx, embd_offset;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        k = i / nelems;
        dense_offset = i % nelems;
        embd_row_idx = embd_rows_indxs[k * nrows + i % nrows];
        embd_col_idx = dense_offset / nrows;
        embd_offset = embd_col_idx * embd_nrows + embd_row_idx;
        atomicAdd(embd_matrix + embd_offset, alpha * dense_matrices[k][dense_offset]);
    }
}


__global__ void columnArgmax(int nrows,
                             int ncols,
                             const float* __restrict__ a,
                             int* __restrict__ indxs) {
    __shared__ float maxVals[32];
    __shared__ int maxIndxs[32];
    float max_val = -FLT_MAX;
    int max_idx = 0;
    float val = 0;
    for (int i = threadIdx.x; i < ncols; i += 32) {
        val = a[blockIdx.x + i * nrows];
        if (val > max_val) {
            max_val = val;
            max_idx = i;
        }
    }
    maxVals[threadIdx.x] = max_val;
    maxIndxs[threadIdx.x] = max_idx;
    __syncthreads();

    if (threadIdx.x == 0) {
        max_val = -FLT_MAX;
        max_idx = 0;
        for (int i = 0; i < 32; i++)
            if (maxVals[i] > max_val) {
                max_val = maxVals[i];
                max_idx = maxIndxs[i];
            }
        indxs[blockIdx.x] = max_idx;
    }
}


__global__ void hprodSum(int nelems,
                         int nrows,
                         const float* __restrict__ A,
                         const float* __restrict__ B,
                         float* __restrict__ C) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        atomicAdd(C + i % nrows, A[i] * B[i]);
    }
}


__global__ void sumHprod(int nelems,
                         const float* __restrict__ A,
                         const float* __restrict__ B,
                         const float* __restrict__ C,
                         const float* __restrict__ D,
                         float* __restrict__ E) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        E[i] = A[i] * B[i] + C[i] * D[i];
    }
}


__global__ void sumHprod(int nelems,
                         const float* __restrict__ A,
                         const float* __restrict__ B,
                         const float* __restrict__ C,
                         const float* __restrict__ D,
                         const float* __restrict__ E,
                         float* __restrict__ F) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        F[i] = A[i] * B[i] * C[i] + D[i] * E[i];
    }
}


__global__ void sumHprod(int nelems,
                         const float* __restrict__ A,
                         const float* __restrict__ B,
                         const float* __restrict__ C,
                         const float* __restrict__ D,
                         const float* __restrict__ E,
                         const float* __restrict__ F,
                         const float* __restrict__ G,
                         const float* __restrict__ H,
                         const float* __restrict__ I,
                         const float* __restrict__ J,
                         const float* __restrict__ K,
                         float* __restrict__ L) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        L[i] = A[i] * B[i] * C[i] + D[i] * E[i] + F[i] * G[i] + H[i] * I[i] + J[i] * K[i];
    }
}


__global__  void hadamardProduct(int nelems,
                                 const float* __restrict__ a,
                                 const float* __restrict__ b,
                                 float* __restrict__ c) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        c[i] = a[i] * b[i];
    }
}


__global__  void hadamardProduct(int nelems,
                                 const float* __restrict__ a,
                                 const float* __restrict__ b,
                                 const float* __restrict__ c,
                                 float* __restrict__ d) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        d[i] = a[i] * b[i] * c[i];
    }
}


__global__  void addHadamardProduct(int nelems,
                                    const float* __restrict__ a,
                                    const float* __restrict__ b,
                                    float alpha,
                                    float* __restrict__ c) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        c[i] = a[i] * b[i] + alpha * c[i];
    }
}


__global__  void addHadamardProduct(int nelems,
                                    const float* __restrict__ a,
                                    const float* __restrict__ b,
                                    const float* __restrict__ c,
                                    float alpha,
                                    float* __restrict__ d) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        d[i] = a[i] * b[i] * c[i] + alpha * d[i];
    }
}


__global__  void addScaledHadamardProduct(int nelems,
                                          const float* __restrict__ a,
                                          const float* __restrict__ b,
                                          float alpha,
                                          float beta,
                                          float* __restrict__ c) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        c[i] = alpha * c[i] + beta * a[i] * b[i];
    }
}



__global__  void addScaledColumnsSlice(int nrows,
                                       int ncols,
                                       float alpha,
                                       const float* __restrict__ dense_matrix,
                                       const int* __restrict__ embedding_column_indxs,
                                       float* __restrict__ embedding_matrix) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int dense_column_idx;
    int row_idx;
    int embedding_offset;
    for (int i = start_i; i < nelems; i += nthreads) {
        dense_column_idx = i / nrows;
        row_idx = i % nrows;
        embedding_offset = embedding_column_indxs[dense_column_idx] * nrows + row_idx;
        atomicAdd(embedding_matrix + embedding_offset, alpha * dense_matrix[i]);
    }
}


__global__  void addScaledRowsSlice(int nrows,
                                    int ncols,
                                    float alpha,
                                    const float* __restrict__ dense_matrix,
                                    const int* __restrict__ embedding_row_indxs,
                                    int embd_nrows,
                                    float* __restrict__ embedding_matrix) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int embd_col_idx;
    int embd_row_idx;
    int embd_offset;
    for (int i = start_i; i < nelems; i += nthreads) {
        embd_row_idx = embedding_row_indxs[i % nrows];
        embd_col_idx = i / nrows;
        embd_offset = embd_col_idx * embd_nrows + embd_row_idx;
        atomicAdd(embedding_matrix + embd_offset, alpha * dense_matrix[i]);
    }
}


__global__ void assignSum(int nelems,
                          const float* matrices[],
                          int n,
                          float* __restrict__ s) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        s[i] = 0.0f;
        for (int k = 0; k < n; k++) {
            s[i] += matrices[k][i];
        }
    }
}


__global__ void addSum(int nelems,
                       const float* matrices[],
                       int n,
                       float* __restrict__ s) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        for (int k = 0; k < n; k++) {
            s[i] += matrices[k][i];
        }
    }
}


__global__ void scale(int nelems,
                      const float* __restrict__ data,
                      float alpha,
                      float* __restrict__ out_data) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out_data[i] = alpha * data[i];
    }
}


__global__ void fill(int nelems,
                     float value,
                     float* __restrict__ out_data) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out_data[i] = value;
    }
}


__global__ void maskedFill(int nelems,
                           float value,
                           const float* __restrict__ mask,
                           float true_value,
                           float* __restrict__ out_data) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out_data[i] = (mask[i] == true_value) * value +
                      (mask[i] != true_value) * out_data[i];
    }
}


__global__ void matrixVectorRowAddition(int nrows,
                                        int ncols,
                                        const float* __restrict__ matrix,
                                        float alpha,
                                        const float* __restrict__ vector,
                                        float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = matrix[i] + alpha * vector[i / nrows];
    }
}


__global__ void assignScaledAddition(int nelems,
                                     float alpha,
                                     const float* __restrict__ a,
                                     const float* __restrict__ b,
                                     float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = alpha * (a[i] + b[i]);
    }
}


__global__ void assignScaledSubtraction(int nelems,
                                        float alpha,
                                        const float* __restrict__ a,
                                        const float* __restrict__ b,
                                        float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = alpha * (a[i] - b[i]);
    }
}


__global__ void addScaledSubtraction(int nelems,
                                     float alpha,
                                     const float* __restrict__ a,
                                     const float* __restrict__ b,
                                     float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] += alpha * (a[i] - b[i]);
    }
}


__global__ void softmaxCeDerivative(int batchSize,
                                    int numClasses,
                                    const float* __restrict__ probs,
                                    const int* __restrict__ targetClasses,
                                    float* __restrict__ derivatives) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = batchSize * numClasses;

    for (int i = start_i; i < nelems; i += nthreads) {
        derivatives[i] = (probs[i] - (i / batchSize == targetClasses[i % batchSize])) / batchSize;
    }
}


__global__ void addSoftmaxCeDerivative(int batchSize,
                                       int numClasses,
                                       const float* __restrict__ probs,
                                       const int* __restrict__ targetClasses,
                                       float* __restrict__ derivatives) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = batchSize * numClasses;

    for (int i = start_i; i < nelems; i += nthreads) {
        derivatives[i] += (probs[i] - (i / batchSize == targetClasses[i % batchSize])) / batchSize;
    }
}



__global__ void assignSequentialMeanPooling(int nrows,
                                            int ncols,
                                            const float* matrices[],
                                            int n,
                                            float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;
    const int total_nelems = nelems * n;

    int k, m;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        k = i / nelems;
        m = i % nelems;
        atomicAdd(out + m, matrices[k][m] / n);
    }
}


__global__ void assignSequentialSumPooling(int nrows,
                                           int ncols,
                                           const float* matrices[],
                                           int n,
                                           float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;
    const int total_nelems = nelems * n;

    int k, m;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        k = i / nelems;
        m = i % nelems;
        atomicAdd(out + m, matrices[k][m]);
    }
}


__global__ void assignSequentialWeightedSum(int nrows,
                                            int ncols,
                                            const float* matrices[],
                                            const float* __restrict__ weights,
                                            int n,
                                            float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;
    const int total_nelems = nelems * n;

    int k, m;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        k = i / nelems;
        m = i % nelems;
        atomicAdd(out + m, matrices[k][m] * weights[k * nrows + i % nrows]);
    }
}


__global__ void sequentiallyTile(int nelems,
                                 const float* __restrict__ a,
                                 float* matrices[],
                                 int n) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int total_nelems = nelems * n;

    int k, m;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        k = i / nelems;
        m = i % nelems;
        matrices[k][m] = a[m];
    }
}


__global__ void assignDLDprea(int nrows,
                              int ncols,
                              const float* matrices[],
                              const float* __restrict__ derivative,
                              const float* __restrict__ weights,
                              int n,
                              float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;
    const unsigned long long total_nelems = (unsigned long long) nelems * n * n;

    int ii, jj;
    for (unsigned long long i = start_i; i < total_nelems; i += nthreads) {
        jj = i / nelems % n;
        ii = i / nelems / n;
        atomicAdd(out + ii * nrows + i % nrows,
                  matrices[jj][i % nelems] * derivative[i % nelems] *
                  ((ii == jj) - weights[ii * nrows + i % nrows]) *
                                weights[jj * nrows + i % nrows]);
    }
}


__global__ void addAttentionDerivative(int nrows,
                                       int ncols,
                                       const float* matrices[],
                                       const float* __restrict__ derivative,
                                       int n,
                                       float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;
    const int total_nelems = nelems * n;

    int ii;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        ii = i / nelems % n;
        atomicAdd(out + i % nelems / nrows, matrices[ii][i % nelems] * derivative[ii * nrows + i % nrows]);
    }
}


__global__ void addAttentionTile(int nrows,
                                 int ncols,
                                 const float* __restrict__ derivative,
                                 const float* __restrict__ a,
                                 const float* __restrict__ dL_dpre_a,
                                 const float* __restrict__ u,
                                 int n,
                                 float* matrices_derivs[]) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;
    const int total_nelems = nelems * n;

    int ii;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        ii = i / nelems % n;
        matrices_derivs[ii][i % nelems] +=
                    a[ii * nrows + i % nrows] * derivative[i % nelems] +
                    dL_dpre_a[ii * nrows + i % nrows] * u[i % nelems / nrows];
    }
}


__global__ void dropout(int nelems,
                        float dropout_prob,
                        const float* __restrict__ data,
                        const float* __restrict__ uniform_data,
                        float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = data[i] * (uniform_data[i] > dropout_prob);
    }
}


__global__ void maskZeros(int nelems,
                          const float* __restrict__ a,
                          const float* __restrict__ b,
                          float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = a[i] * (b[i] != 0.0f);
    }
}


__global__ void addMaskZeros(int nelems,
                            const float* __restrict__ a,
                             const float* __restrict__ b,
                             float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] += a[i] * (b[i] != 0.0f);
    }
}


__global__ void assignMaskedAddition(int nelems,
                                     const float* __restrict__ mask,
                                     const float* __restrict__ a,
                                     const float* __restrict__ b,
                                     float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = mask[i] * a[i] + (1.0f - mask[i]) * b[i];
    }
}


__global__ void assignMaskedAdditionColumnBroadcasted(int nrows,
                                                      int ncols,
                                                      const float* __restrict__ mask,
                                                      const float* __restrict__ a,
                                                      const float* __restrict__ b,
                                                      float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    float m;
    for (int i = start_i; i < nelems; i += nthreads) {
        m = mask[i % nrows];
        out[i] = m * a[i] + (1.0f - m) * b[i];
    }
}


__global__ void addHprodOneMinusMask(int nelems,
                                     const float* __restrict__ mask,
                                     const float* __restrict__ a,
                                     float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] += (1.0f - mask[i]) * a[i];
    }
}


__global__ void addHprodOneMinusMaskColumnBroadcasted(int nrows,
                                                      int ncols,
                                                      const float* __restrict__ mask,
                                                      const float* __restrict__ a,
                                                      float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] += (1.0f - mask[i % nrows]) * a[i];
    }
}


__global__ void matrixVectorColumnHprod(int nrows,
                                        int ncols,
                                        const float* __restrict__ matrix,
                                        const float* __restrict__ vector,
                                        float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = matrix[i] * vector[i % nrows];
    }
}


__global__ void maskColumnNumbersRowWise(int nrows,
                                         int ncols,
                                         const int* __restrict__ numbers,
                                         float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = (i / nrows < numbers[i % nrows]);
    }
}


__global__ void batchHorizontalStack(int n,
                                     int nrows,
                                     int xNcols,
                                     int yNcols,
                                     const float* xMatrices[],
                                     const float* yMatrices[],
                                     float* outMatrices[]) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int xNelems = nrows * xNcols;
    const int yNelems = nrows * yNcols;
    const int outNelems = xNelems + yNelems;
    const int totalNelems = n * outNelems;

    int k;
    int m;
    for (int i = start_i; i < totalNelems; i += nthreads) {
        k = i / outNelems;
        m = i % outNelems;
        if (m < xNelems) {
            outMatrices[k][m] = xMatrices[k][m];
        } else {
            outMatrices[k][m] = yMatrices[k][m - xNelems];
        }
    }
}


__global__ void batchHorizontalSplit(int n,
                                     int nrows,
                                     int xNcols,
                                     int yNcols,
                                     const float* matrices[],
                                     float* xMatrices[],
                                     float* yMatrices[]) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int xNelems = nrows * xNcols;
    const int yNelems = nrows * yNcols;
    const int outNelems = xNelems + yNelems;
    const int totalNelems = n * outNelems;

    int k;
    int m;
    for (int i = start_i; i < totalNelems; i += nthreads) {
        k = i / outNelems;
        m = i % outNelems;
        if (m < xNelems) {
            xMatrices[k][m] = matrices[k][m];
        } else {
            yMatrices[k][m - xNelems] = matrices[k][m];
        }
    }
}


__global__ void repeatAlongRow(int repeats,
                               int nrows,
                               int ncols,
                               const float* __restrict__ a,
                               float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int row_idx;
    int col_idx;
    int offset;
    int col_stride = repeats * nrows;
    for (int j = 0; j < repeats; j++) {
        offset = nrows * j;
        for (int i = start_i; i < nelems; i += nthreads) {
            row_idx = i % nrows;
            col_idx = i / nrows;
            out[offset + col_stride * col_idx + row_idx] = a[i];
        }
    }
}


__global__ void addRepeatAlongRowDerivative(int repeats,
                                            const float* __restrict__ a,
                                            int nrows,
                                            int ncols,
                                            float* __restrict__ derivative) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int row_idx;
    int col_idx;
    int offset;
    int col_stride = repeats * nrows;
    for (int j = 0; j < repeats; j++) {
        offset = nrows * j;
        for (int i = start_i; i < nelems; i += nthreads) {
            row_idx = i % nrows;
            col_idx = i / nrows;
            derivative[i] += a[offset + col_stride * col_idx + row_idx];
        }
    }
}


__global__ void repeatAlongCol(int repeats,
                               int nrows,
                               int ncols,
                               const float* __restrict__ a,
                               float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int offset;
    for (int j = 0; j < repeats; j++) {
        offset = nelems * j;
        for (int i = start_i; i < nelems; i += nthreads) {
            out[offset + i] = a[i];
        }
    }
}


__global__ void addRepeatAlongColDerivative(int repeats,
                                            const float* __restrict__ a,
                                            int nrows,
                                            int ncols,
                                            float* __restrict__ derivative) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int offset;
    for (int j = 0; j < repeats; j++) {
        offset = nelems * j;
        for (int i = start_i; i < nelems; i += nthreads) {
            derivative[i] += a[offset + i];
        }
    }
}

__global__  void addScaledDivSqrt(int nelems,
                                  float alpha,
                                  const float* __restrict__ a,
                                  const float* __restrict__ b,
                                  float epsilon,
                                  float* __restrict__ c) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        c[i] += alpha * a[i] / sqrtf(b[i] + epsilon);
    }
}


__global__ void clip(int nelems,
                     float min_value,
                     float max_value,
                     const float* __restrict__ data,
                     float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = (min_value > data[i]) * min_value + (data[i] > max_value) * max_value + (min_value <= data[i] && data[i] <= max_value) * data[i];
    }
}

template <typename T>
__global__ void transpose(int nrows,
                          int ncols,
                          const T* __restrict__ in,
                          T* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int out_row_idx;
    int out_col_idx;
    for (int i = start_i; i < nelems; i += nthreads) {
        out_col_idx= i % nrows;
        out_row_idx = i / nrows;
        out[out_col_idx * ncols + out_row_idx] = in[i];
    }
}


extern "C" {
    cudaError_t _transposeFloat(cudaStream_t stream,
                                int nrows,
                                int ncols,
                                const float* __restrict__ in,
                                float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        transpose<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, in, out);
        return cudaGetLastError();
    }


    cudaError_t _transposeInt(cudaStream_t stream,
                              int nrows,
                              int ncols,
                              const int* __restrict__ in,
                              int* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        transpose<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, in, out);
        return cudaGetLastError();
    }


    cudaError_t _clip(cudaStream_t stream,
                      int nelems,
                      float min_value,
                      float max_value,
                      const float* __restrict__ data,
                      float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        clip<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, min_value, max_value, data, out);
        return cudaGetLastError();
    }

    cudaError_t _addScaledDivSqrt(cudaStream_t stream,
                                  int nelems,
                                  float alpha,
                                  const float* __restrict__ a,
                                  const float* __restrict__ b,
                                  float epsilon,
                                  float* __restrict__ c) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addScaledDivSqrt<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, alpha, a, b, epsilon, c);
        return cudaGetLastError();
    }


    cudaError_t _repeatAlongRow(cudaStream_t stream,
                                int repeats,
                                int nrows,
                                int ncols,
                                const float* __restrict__ a,
                                float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        repeatAlongRow<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(repeats, nrows, ncols, a, out);
        return cudaGetLastError();
    }

    cudaError_t _addRepeatAlongRowDerivative(cudaStream_t stream,
                                             int repeats,
                                             const float* __restrict__ a,
                                             int nrows,
                                             int ncols,
                                             float* __restrict__ derivative) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addRepeatAlongRowDerivative<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(repeats, a, nrows, ncols, derivative);
        return cudaGetLastError();
    }

    cudaError_t _repeatAlongCol(cudaStream_t stream,
                                int repeats,
                                int nrows,
                                int ncols,
                                const float* __restrict__ a,
                                float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        repeatAlongCol<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(repeats, nrows, ncols, a, out);
        return cudaGetLastError();
    }

    cudaError_t _addRepeatAlongColDerivative(cudaStream_t stream,
                                             int repeats,
                                             const float* __restrict__ a,
                                             int nrows,
                                             int ncols,
                                             float* __restrict__ derivative) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addRepeatAlongColDerivative<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(repeats, a, nrows, ncols, derivative);
        return cudaGetLastError();
    }

    cudaError_t _batchHorizontalSplit(cudaStream_t stream,
                                      int n,
                                      int nrows,
                                      int xNcols,
                                      int yNcols,
                                      const float* matrices[],
                                      float* xMatrices[],
                                      float* yMatrices[]) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (n * (nrows * xNcols + nrows * yNcols) - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
           batchHorizontalSplit<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(n, nrows, xNcols, yNcols, matrices, xMatrices, yMatrices);
        return cudaGetLastError();
    }


    cudaError_t _batchHorizontalStack(cudaStream_t stream,
                                      int n,
                                      int nrows,
                                      int xNcols,
                                      int yNcols,
                                      const float* xMatrices[],
                                      const float* yMatrices[],
                                      float* outMatrices[]) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (n * (nrows * xNcols + nrows * yNcols) - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
           batchHorizontalStack<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(n, nrows, xNcols, yNcols, xMatrices, yMatrices, outMatrices);
        return cudaGetLastError();
    }


    cudaError_t _maskColumnNumbersRowWise(cudaStream_t stream,
                                          int nrows,
                                          int ncols,
                                          const int* __restrict__ numbers,
                                          float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        maskColumnNumbersRowWise<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, numbers, out);
        return cudaGetLastError();
    }


    cudaError_t _maskZeros(cudaStream_t stream,
                           int nelems,
                           const float* __restrict__ a,
                           const float* __restrict__ b,
                           float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        maskZeros<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, out);
        return cudaGetLastError();
    }


    cudaError_t _addMaskZeros(cudaStream_t stream,
                              int nelems,
                              const float* __restrict__ a,
                              const float* __restrict__ b,
                              float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addMaskZeros<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, out);
        return cudaGetLastError();
    }


    cudaError_t _dropout(cudaStream_t stream,
                         int nelems,
                         float dropout_prob,
                         const float* __restrict__ data,
                         const float* __restrict__ uniform_data,
                         float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        dropout<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, dropout_prob, data, uniform_data, out);
        return cudaGetLastError();
    }


    cudaError_t _assignMaskedAddition(cudaStream_t stream,
                                      int nelems,
                                      const float* __restrict__ mask,
                                      const float* __restrict__ a,
                                      const float* __restrict__ b,
                                      float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignMaskedAddition<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, mask, a, b, out);
        return cudaGetLastError();
    }


    cudaError_t _assignMaskedAdditionColumnBroadcasted(cudaStream_t stream,
                                                       int nrows,
                                                       int ncols,
                                                       const float* __restrict__ mask,
                                                       const float* __restrict__ a,
                                                       const float* __restrict__ b,
                                                       float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignMaskedAdditionColumnBroadcasted<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, mask, a, b, out);
        return cudaGetLastError();
    }


    cudaError_t _addHprodOneMinusMask(cudaStream_t stream,
                                      int nelems,
                                      const float* __restrict__ mask,
                                      const float* __restrict__ a,
                                      float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addHprodOneMinusMask<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, mask, a, out);
        return cudaGetLastError();
    }


    cudaError_t _addHprodOneMinusMaskColumnBroadcasted(cudaStream_t stream,
                                                       int nrows,
                                                       int ncols,
                                                       const float* __restrict__ mask,
                                                       const float* __restrict__ a,
                                                       float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols- 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addHprodOneMinusMaskColumnBroadcasted<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, mask, a, out);
        return cudaGetLastError();
    }


    cudaError_t _horizontalSliceSplit(cudaStream_t stream,
                                      int n,
                                      int* col_slices,
                                      int nrows,
                                      float** matrices,
                                      float* stacked) {
        size_t float_size = sizeof(float);
        int nelems;
        int offset = 0;

        for (int i = 0; i < n; i++) {
            nelems = (col_slices[i*2+1] - col_slices[i*2]) * nrows;
            offset = col_slices[i*2] * nrows;
            cudaMemcpyAsync(matrices[i], stacked + offset, float_size * nelems, cudaMemcpyDeviceToDevice, stream);
        }
        return cudaGetLastError();
    }

    cudaError_t _horizontalSplit(cudaStream_t stream,
                                 int n,
                                 int* ncols,
                                 int nrows,
                                 float** matrices,
                                 float* stacked) {
        size_t float_size = sizeof(float);
        int nelems;
        int offset = 0;

        for (int i = 0; i < n; i++) {
            nelems = ncols[i] * nrows;
            cudaMemcpyAsync(matrices[i], stacked + offset, float_size * nelems, cudaMemcpyDeviceToDevice, stream);
            offset += nelems;
        }
        return cudaGetLastError();
    }

    cudaError_t _horizontalStack(cudaStream_t stream,
                                 int n,
                                 int* ncols,
                                 int nrows,
                                 float** matrices,
                                 float* stacked) {
        size_t float_size = sizeof(float);
        int nelems;
        int offset = 0;

        for (int i = 0; i < n; i++) {
            nelems = ncols[i] * nrows;
            cudaMemcpyAsync(stacked + offset, matrices[i], float_size * nelems, cudaMemcpyDeviceToDevice, stream);
            offset += nelems;
        }
        return cudaGetLastError();
    }


    cudaError_t _verticalSliceSplit(cudaStream_t stream,
                                    int n,
                                    int* row_slices,
                                    int nrows,
                                    int ncols,
                                    float** matrices,
                                    float* stacked) {
        size_t float_size = sizeof(float);
        float* column_address;
        int offset = 0;
        int k;

        for (int i = 0; i < ncols; i++) {
            for (int j = 0; j < n; j++) {
                k = row_slices[j*2+1] - row_slices[j*2];
                column_address = matrices[j] + k * i;
                offset = nrows * i + row_slices[j*2];
                cudaMemcpyAsync(column_address, stacked + offset, float_size * k, cudaMemcpyDeviceToDevice, stream);
            }
        }

        return cudaGetLastError();
    }

    cudaError_t _verticalSplit(cudaStream_t stream,
                               int n,
                               int* nrows,
                               int ncols,
                               float** matrices,
                               float* stacked) {
        size_t float_size = sizeof(float);
        float* column_address;
        int offset = 0;

        for (int i = 0; i < ncols; i++) {
            for (int j = 0; j < n; j++) {
                column_address = matrices[j] + nrows[j] * i;
                cudaMemcpyAsync(column_address, stacked + offset, float_size * nrows[j], cudaMemcpyDeviceToDevice, stream);
                offset += nrows[j];
            }
        }
        return cudaGetLastError();
    }


    cudaError_t _verticalStack(cudaStream_t stream,
                               int n,
                               int* nrows,
                               int ncols,
                               float** matrices,
                               float* stacked) {
        size_t float_size = sizeof(float);
        float* column_address;
        int offset = 0;

        for (int i = 0; i < ncols; i++) {
            for (int j = 0; j < n; j++) {
                column_address = matrices[j] + nrows[j] * i;
                cudaMemcpyAsync(stacked + offset, column_address, float_size * nrows[j], cudaMemcpyDeviceToDevice, stream);
                offset += nrows[j];
            }
        }

        return cudaGetLastError();
    }


    cudaError_t _sliceColumns(cudaStream_t stream,
                              int nrows,
                              int ncols,
                              const int* __restrict__ embedding_column_indxs,
                              const float* __restrict__ embedding_matrix,
                              float* __restrict__ dense_matrix) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols  - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sliceColumns<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, embedding_column_indxs, embedding_matrix, dense_matrix);
        return cudaGetLastError();
    }


    cudaError_t _sliceColumnsAndTranspose(cudaStream_t stream,
                                          int nrows,
                                          int ncols,
                                          const int* __restrict__ embedding_column_indxs,
                                          const float* __restrict__ embedding_matrix,
                                          float* __restrict__ dense_matrix) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols  - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sliceColumnsAndTranspose<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, embedding_column_indxs, embedding_matrix, dense_matrix);
        return cudaGetLastError();
    }


    cudaError_t _sliceRowsFloat(cudaStream_t stream,
                                int embedding_matrix_nrows,
                                const int* __restrict__ embedding_row_indxs,
                                const float* __restrict__ embedding_matrix,
                                int nrows,
                                int ncols,
                                float* __restrict__ dense_matrix) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols  - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sliceRows<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(embedding_matrix_nrows, embedding_row_indxs, embedding_matrix, nrows, ncols, dense_matrix);
        return cudaGetLastError();
    }


    cudaError_t _sliceRowsInt(cudaStream_t stream,
                              int embedding_matrix_nrows,
                              const int* __restrict__ embedding_row_indxs,
                              const int* __restrict__ embedding_matrix,
                              int nrows,
                              int ncols,
                              int* __restrict__ dense_matrix) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols  - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sliceRows<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(embedding_matrix_nrows, embedding_row_indxs, embedding_matrix, nrows, ncols, dense_matrix);
        return cudaGetLastError();
    }


    cudaError_t _sliceRowsBatch(cudaStream_t stream,
                                const int* embd_rows_indxs,
                                int nrows,
                                int ncols,
                                const float* __restrict__ embd_matrix,
                                int embd_nrows,
                                int embd_ncols,
                                float* __restrict__ dense_matrices[]) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * embd_ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sliceRowsBatch<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(embd_rows_indxs, nrows, ncols, embd_matrix, embd_nrows, embd_ncols, dense_matrices);
        return cudaGetLastError();
    }

    cudaError_t _slicedRowsBatchScaledAdd(cudaStream_t stream,
                                          const int* embd_rows_indxs,
                                          int nrows,
                                          int ncols,
                                          float alpha,
                                          const float* __restrict__ dense_matrices[],
                                          int embd_nrows,
                                          int embd_ncols,
                                          float* __restrict__ embd_matrix) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * embd_ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        slicedRowsBatchScaledAdd<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(embd_rows_indxs, nrows, ncols, alpha, dense_matrices, embd_nrows, embd_ncols, embd_matrix);
        return cudaGetLastError();
    }


    cudaError_t _columnArgmax(cudaStream_t stream,
                              int nrows,
                              int ncols,
                              const float* __restrict__ a,
                              int* __restrict__ indxs) {
        columnArgmax<<<nrows, 32, 32 * sizeof(float), stream>>>(nrows, ncols, a, indxs);
        return cudaGetLastError();
    }


    cudaError_t _hprodSum(cudaStream_t stream,
                          int nrows,
                          int ncols,
                          const float* __restrict__ a,
                          const float* __restrict__ b,
                          float* __restrict__ c) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        fill<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, 0.0, c);
        int nelems = nrows * ncols;
        num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        hprodSum<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, nrows, a, b, c);
        return cudaGetLastError();
    }


    cudaError_t _sumHprod4(cudaStream_t stream,
                           int nelems,
                           const float* __restrict__ a,
                           const float* __restrict__ b,
                           const float* __restrict__ c,
                           const float* __restrict__ d,
                           float* __restrict__ e) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sumHprod<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, c, d, e);
        return cudaGetLastError();
    }


    cudaError_t _sumHprod5(cudaStream_t stream,
                           int nelems,
                           const float* __restrict__ a,
                           const float* __restrict__ b,
                           const float* __restrict__ c,
                           const float* __restrict__ d,
                           const float* __restrict__ e,
                           float* __restrict__ f) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sumHprod<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, c, d, e, f);
        return cudaGetLastError();
    }


    cudaError_t _sumHprod11(cudaStream_t stream,
                            int nelems,
                            const float* __restrict__ a,
                            const float* __restrict__ b,
                            const float* __restrict__ c,
                            const float* __restrict__ d,
                            const float* __restrict__ e,
                            const float* __restrict__ f,
                            const float* __restrict__ g,
                            const float* __restrict__ h,
                            const float* __restrict__ i,
                            const float* __restrict__ j,
                            const float* __restrict__ k,
                            float* __restrict__ l) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sumHprod<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, c, d, e, f, g, h, i, j, k, l);
        return cudaGetLastError();
    }


    cudaError_t _hadamardProduct2(cudaStream_t stream,
                                  int nelems,
                                  const float* __restrict__ a,
                                  const float* __restrict__ b,
                                  float* __restrict__ c) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        hadamardProduct<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, c);
        return cudaGetLastError();
    }


    cudaError_t _hadamardProduct3(cudaStream_t stream,
                                  int nelems,
                                  const float* __restrict__ a,
                                  const float* __restrict__ b,
                                  const float* __restrict__ c,
                                  float* __restrict__ d) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        hadamardProduct<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, c, d);
        return cudaGetLastError();
    }


    cudaError_t _addHadamardProduct2(cudaStream_t stream,
                                     int nelems,
                                     const float* __restrict__ a,
                                     const float* __restrict__ b,
                                     float alpha,
                                     float* __restrict__ c) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addHadamardProduct<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, alpha, c);
        return cudaGetLastError();
    }


    cudaError_t _addHadamardProduct3(cudaStream_t stream,
                                     int nelems,
                                     const float* __restrict__ a,
                                     const float* __restrict__ b,
                                     const float* __restrict__ c,
                                     float alpha,
                                     float* __restrict__ d) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addHadamardProduct<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, c, alpha, d);
        return cudaGetLastError();
    }


    cudaError_t _addScaledHadamardProduct(cudaStream_t stream,
                                          int nelems,
                                          const float* __restrict__ a,
                                          const float* __restrict__ b,
                                          float alpha,
                                          float beta,
                                          float* __restrict__ c) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addScaledHadamardProduct<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, alpha, beta, c);
        return cudaGetLastError();
    }


    cudaError_t _addScaledColumnsSlice(cudaStream_t stream,
                                       int nrows,
                                       int ncols,
                                       float alpha,
                                       const float* __restrict__ dense_matrix,
                                       const int* __restrict__ embedding_column_indxs,
                                       float* __restrict__ embedding_matrix) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addScaledColumnsSlice<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, alpha, dense_matrix, embedding_column_indxs, embedding_matrix);
        return cudaGetLastError();
    }


    cudaError_t _addScaledRowsSlice(cudaStream_t stream,
                                    int nrows,
                                    int ncols,
                                    float alpha,
                                    const float* __restrict__ dense_matrix,
                                    const int* __restrict__ embedding_row_indxs,
                                    int embd_nrows,
                                    float* __restrict__ embedding_matrix) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addScaledRowsSlice<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, alpha, dense_matrix, embedding_row_indxs, embd_nrows, embedding_matrix);
        return cudaGetLastError();
    }


    cudaError_t _add_sum(cudaStream_t stream,
                         int nelems,
                         const float* matrices[],
                         int n,
                         float* __restrict__ s) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addSum<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, matrices, n, s);
        return cudaGetLastError();
    }


    cudaError_t _assign_sum(cudaStream_t stream,
                            int nelems,
                            const float* matrices[],
                            int n,
                            float* __restrict__ s) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignSum<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, matrices, n, s);
        return cudaGetLastError();
    }


    cudaError_t _scale(cudaStream_t stream,
                       int nelems,
                       float alpha,
                       const float* __restrict__ data,
                       float* __restrict__ out_data) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        scale<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, data, alpha, out_data);
        return cudaGetLastError();
    }


    cudaError_t _fill(cudaStream_t stream,
                      int nelems,
                      float value,
                      float* __restrict__ out_data) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        fill<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, value, out_data);
        return cudaGetLastError();
    }

    cudaError_t _maskedFill(cudaStream_t stream,
                            int nelems,
                            float value,
                            const float* __restrict__ mask,
                            float true_value,
                            float* __restrict__ out_data) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        maskedFill<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, value, mask, true_value, out_data);
        return cudaGetLastError();
    }

    cudaError_t _matrixVectorRowAddition(cudaStream_t stream,
                                         int nrows,
                                         int ncols,
                                         const float* __restrict__ matrix,
                                         float alpha,
                                         const float* __restrict__ vector,
                                         float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        matrixVectorRowAddition<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, matrix, alpha, vector, out);
        return cudaGetLastError();
    }


    cudaError_t _assignSequentialMeanPooling(cudaStream_t stream,
                                             int nrows,
                                             int ncols,
                                             const float* matrices[],
                                             int n,
                                             float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignSequentialMeanPooling<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, matrices, n, out);
        return cudaGetLastError();
    }

    cudaError_t _assignSequentialSumPooling(cudaStream_t stream,
                                            int nrows,
                                            int ncols,
                                            const float* matrices[],
                                            int n,
                                            float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignSequentialSumPooling<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, matrices, n, out);
        return cudaGetLastError();
    }

    cudaError_t _assignSequentialWeightedSum(cudaStream_t stream,
                                             int nrows,
                                             int ncols,
                                             const float* matrices[],
                                             const float* __restrict__ weights,
                                             int n,
                                             float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignSequentialWeightedSum<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, matrices, weights, n, out);
        return cudaGetLastError();
    }

    cudaError_t _sequentiallyTile(cudaStream_t stream,
                                  int nelems,
                                  const float* __restrict__ a,
                                  float* matrices[],
                                  int n) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sequentiallyTile<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, matrices, n);
        return cudaGetLastError();
    }

    cudaError_t _assignDLDprea(cudaStream_t stream,
                               int nrows,
                               int ncols,
                               const float* matrices[],
                               const float* __restrict__ derivative,
                               const float* __restrict__ weights,
                               int n,
                               float* __restrict__ out) {
        int num_blocks = std::min((long long)MAX_NUM_BLOCKS_PER_KERNEL, ((long long)nrows * ncols * n * n - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignDLDprea<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, matrices, derivative, weights, n, out);
        return cudaGetLastError();
    }

    cudaError_t _addAttentionDerivative(cudaStream_t stream,
                                        int nrows,
                                        int ncols,
                                        const float* matrices[],
                                        const float* __restrict__ derivative,
                                        int n,
                                        float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols * n - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addAttentionDerivative<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, matrices, derivative, n, out);
        return cudaGetLastError();
    }

    cudaError_t _addAttentionTile(cudaStream_t stream,
                                  int nrows,
                                  int ncols,
                                  const float* __restrict__ derivative,
                                  const float* __restrict__ a,
                                  const float* __restrict__ dL_dpre_a,
                                  const float* __restrict__ u,
                                  int n,
                                  float* matrices_derivs[]) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols * n - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addAttentionTile<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, derivative, a, dL_dpre_a, u, n, matrices_derivs);
        return cudaGetLastError();
    }

    cudaError_t _assignScaledAddition(cudaStream_t stream,
                                      int nelems,
                                      float alpha,
                                      const float* __restrict__ a,
                                      const float* __restrict__ b,
                                      float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignScaledAddition<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, alpha, a, b, out);
        return cudaGetLastError();
    }


    cudaError_t _assignScaledSubtraction(cudaStream_t stream,
                                         int nelems,
                                         float alpha,
                                         const float* __restrict__ a,
                                         const float* __restrict__ b,
                                         float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignScaledSubtraction<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, alpha, a, b, out);
        return cudaGetLastError();
    }


    cudaError_t _addScaledSubtraction(cudaStream_t stream,
                                      int nelems,
                                      float alpha,
                                      const float* __restrict__ a,
                                      const float* __restrict__ b,
                                      float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addScaledSubtraction<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, alpha, a, b, out);
        return cudaGetLastError();
    }


    cudaError_t _softmaxCeDerivative(cudaStream_t stream,
                                     int batchSize,
                                     int numClasses,
                                     const float* __restrict__ probs,
                                     const int* __restrict__ targetClasses,
                                     float* __restrict__ derivatives) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (batchSize * numClasses - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        softmaxCeDerivative<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(batchSize, numClasses, probs, targetClasses, derivatives);
        return cudaGetLastError();
    }


    cudaError_t _addSoftmaxCeDerivative(cudaStream_t stream,
                                        int batchSize,
                                        int numClasses,
                                        const float* __restrict__ probs,
                                        const int* __restrict__ targetClasses,
                                        float* __restrict__ derivatives) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (batchSize * numClasses - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addSoftmaxCeDerivative<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(batchSize, numClasses, probs, targetClasses, derivatives);
        return cudaGetLastError();
    }


    cudaError_t _matrixVectorColumnHprod(cudaStream_t stream,
                                         int nrows,
                                         int ncols,
                                         const float* __restrict__ matrix,
                                         const float* __restrict__ vector,
                                         float* out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        matrixVectorColumnHprod<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, matrix, vector, out);
        return cudaGetLastError();
    }
}
	.file	"tmpxft_002790dc_00000000-6_gpu_matrix_kernels.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2355:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2355:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function
_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0:
.LFB2610:
	.cfi_startproc
	jmp	cudaLaunchKernel@PLT
	.cfi_endproc
.LFE2610:
	.size	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	.type	_ZL44__device_stub__Z9sliceRowsIiEviPKiPKT_iiPS2_iPKiS0_iiPi, @function
_ZL44__device_stub__Z9sliceRowsIiEviPKiPKT_iiPS2_iPKiS0_iiPi:
.LFB2485:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 12(%rsp)
	leaq	64(%rsp), %rdi
	movl	%ecx, 8(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%r9, 40(%rsp)
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9sliceRowsIiEviPKiPKT_iiPS2_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L3:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2485:
	.size	_ZL44__device_stub__Z9sliceRowsIiEviPKiPKT_iiPS2_iPKiS0_iiPi, .-_ZL44__device_stub__Z9sliceRowsIiEviPKiPKT_iiPS2_iPKiS0_iiPi
	.type	_ZL44__device_stub__Z9sliceRowsIfEviPKiPKT_iiPS2_iPKiPKfiiPf, @function
_ZL44__device_stub__Z9sliceRowsIfEviPKiPKT_iiPS2_iPKiPKfiiPf:
.LFB2483:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 12(%rsp)
	leaq	64(%rsp), %rdi
	movl	%ecx, 8(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%r9, 40(%rsp)
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9sliceRowsIfEviPKiPKT_iiPS2_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2483:
	.size	_ZL44__device_stub__Z9sliceRowsIfEviPKiPKT_iiPS2_iPKiPKfiiPf, .-_ZL44__device_stub__Z9sliceRowsIfEviPKiPKT_iiPS2_iPKiPKfiiPf
	.type	_ZL40__device_stub__Z9transposeIiEviiPKT_PS0_iiPKiPi, @function
_ZL40__device_stub__Z9transposeIiEviiPKT_PS0_iiPKiPi:
.LFB2481:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	60(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rax, 72(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9transposeIiEviiPKT_PS0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L12:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2481:
	.size	_ZL40__device_stub__Z9transposeIiEviiPKT_PS0_iiPKiPi, .-_ZL40__device_stub__Z9transposeIiEviiPKT_PS0_iiPKiPi
	.type	_ZL40__device_stub__Z9transposeIfEviiPKT_PS0_iiPKfPf, @function
_ZL40__device_stub__Z9transposeIfEviiPKT_PS0_iiPKfPf:
.LFB2479:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	60(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rax, 72(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9transposeIfEviiPKT_PS0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L16:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2479:
	.size	_ZL40__device_stub__Z9transposeIfEviiPKT_PS0_iiPKfPf, .-_ZL40__device_stub__Z9transposeIfEviiPKT_PS0_iiPKfPf
	.section	.text._Z9transposeIiEviiPKT_PS0_,"axG",@progbits,_Z9transposeIiEviiPKT_PS0_,comdat
	.weak	_Z9transposeIiEviiPKT_PS0_
	.type	_Z9transposeIiEviiPKT_PS0_, @function
_Z9transposeIiEviiPKT_PS0_:
.LFB2536:
	.cfi_startproc
	endbr64
	jmp	_ZL40__device_stub__Z9transposeIiEviiPKT_PS0_iiPKiPi
	.cfi_endproc
.LFE2536:
	.size	_Z9transposeIiEviiPKT_PS0_, .-_Z9transposeIiEviiPKT_PS0_
	.section	.text._Z9transposeIfEviiPKT_PS0_,"axG",@progbits,_Z9transposeIfEviiPKT_PS0_,comdat
	.weak	_Z9transposeIfEviiPKT_PS0_
	.type	_Z9transposeIfEviiPKT_PS0_, @function
_Z9transposeIfEviiPKT_PS0_:
.LFB2535:
	.cfi_startproc
	endbr64
	jmp	_ZL40__device_stub__Z9transposeIfEviiPKT_PS0_iiPKfPf
	.cfi_endproc
.LFE2535:
	.size	_Z9transposeIfEviiPKT_PS0_, .-_Z9transposeIfEviiPKT_PS0_
	.section	.text._Z9sliceRowsIiEviPKiPKT_iiPS2_,"axG",@progbits,_Z9sliceRowsIiEviPKiPKT_iiPS2_,comdat
	.weak	_Z9sliceRowsIiEviPKiPKT_iiPS2_
	.type	_Z9sliceRowsIiEviPKiPKT_iiPS2_, @function
_Z9sliceRowsIiEviPKiPKT_iiPS2_:
.LFB2538:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z9sliceRowsIiEviPKiPKT_iiPS2_iPKiS0_iiPi
	.cfi_endproc
.LFE2538:
	.size	_Z9sliceRowsIiEviPKiPKT_iiPS2_, .-_Z9sliceRowsIiEviPKiPKT_iiPS2_
	.section	.text._Z9sliceRowsIfEviPKiPKT_iiPS2_,"axG",@progbits,_Z9sliceRowsIfEviPKiPKT_iiPS2_,comdat
	.weak	_Z9sliceRowsIfEviPKiPKT_iiPS2_
	.type	_Z9sliceRowsIfEviPKiPKT_iiPS2_, @function
_Z9sliceRowsIfEviPKiPKT_iiPS2_:
.LFB2537:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z9sliceRowsIfEviPKiPKT_iiPS2_iPKiPKfiiPf
	.cfi_endproc
.LFE2537:
	.size	_Z9sliceRowsIfEviPKiPKT_iiPS2_, .-_Z9sliceRowsIfEviPKiPKT_iiPS2_
	.text
	.globl	_transposeFloat
	.type	_transposeFloat, @function
_transposeFloat:
.LFB2292:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%edx, %r13d
	movq	%rdi, %r9
	imull	%edx, %eax
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%r8, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rcx, %rbx
	movl	$512, %ecx
	decl	%eax
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	%rbp, %rcx
	movq	%rbx, %rdx
	movl	%r13d, %esi
	movl	%r12d, %edi
	call	_ZL40__device_stub__Z9transposeIfEviiPKT_PS0_iiPKfPf
.L25:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2292:
	.size	_transposeFloat, .-_transposeFloat
	.globl	_transposeInt
	.type	_transposeInt, @function
_transposeInt:
.LFB2293:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%edx, %r13d
	movq	%rdi, %r9
	imull	%edx, %eax
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%r8, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rcx, %rbx
	movl	$512, %ecx
	decl	%eax
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movq	%rbp, %rcx
	movq	%rbx, %rdx
	movl	%r13d, %esi
	movl	%r12d, %edi
	call	_ZL40__device_stub__Z9transposeIiEviiPKT_PS0_iiPKiPi
.L28:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2293:
	.size	_transposeInt, .-_transposeInt
	.globl	_horizontalSliceSplit
	.type	_horizontalSliceSplit, @function
_horizontalSliceSplit:
.LFB2310:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r8, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%ecx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L31:
	cmpl	%ebx, %r12d
	jle	.L34
	movl	0(%rbp,%rbx,8), %eax
	movl	4(%rbp,%rbx,8), %edx
	movq	%r13, %r8
	movl	$3, %ecx
	movq	(%r15,%rbx,8), %rdi
	movq	%r9, 8(%rsp)
	incq	%rbx
	subl	%eax, %edx
	imull	%r14d, %eax
	imull	%r14d, %edx
	cltq
	movslq	%edx, %rdx
	leaq	(%r9,%rax,4), %rsi
	salq	$2, %rdx
	call	cudaMemcpyAsync@PLT
	movq	8(%rsp), %r9
	jmp	.L31
.L34:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2310:
	.size	_horizontalSliceSplit, .-_horizontalSliceSplit
	.globl	_horizontalSplit
	.type	_horizontalSplit, @function
_horizontalSplit:
.LFB2311:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%ecx, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	movl	%esi, 20(%rsp)
.L36:
	cmpl	%ebx, 20(%rsp)
	jle	.L39
	movl	(%r14,%rbx,4), %ebp
	movslq	%r12d, %rax
	movq	0(%r13,%rbx,8), %rdi
	movl	$3, %ecx
	movq	8(%rsp), %r8
	leaq	(%r9,%rax,4), %rsi
	movq	%r9, 24(%rsp)
	incq	%rbx
	imull	%r15d, %ebp
	movslq	%ebp, %rdx
	addl	%ebp, %r12d
	salq	$2, %rdx
	call	cudaMemcpyAsync@PLT
	movq	24(%rsp), %r9
	jmp	.L36
.L39:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2311:
	.size	_horizontalSplit, .-_horizontalSplit
	.globl	_horizontalStack
	.type	_horizontalStack, @function
_horizontalStack:
.LFB2312:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%ecx, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	movl	%esi, 20(%rsp)
.L41:
	cmpl	%ebx, 20(%rsp)
	jle	.L44
	movl	(%r14,%rbx,4), %ebp
	movslq	%r12d, %rax
	movq	0(%r13,%rbx,8), %rsi
	movl	$3, %ecx
	movq	8(%rsp), %r8
	leaq	(%r9,%rax,4), %rdi
	movq	%r9, 24(%rsp)
	incq	%rbx
	imull	%r15d, %ebp
	movslq	%ebp, %rdx
	addl	%ebp, %r12d
	salq	$2, %rdx
	call	cudaMemcpyAsync@PLT
	movq	24(%rsp), %r9
	jmp	.L41
.L44:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2312:
	.size	_horizontalStack, .-_horizontalStack
	.globl	_verticalSliceSplit
	.type	_verticalSliceSplit, @function
_verticalSliceSplit:
.LFB2313:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%ecx, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r8d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, (%rsp)
	movq	96(%rsp), %r11
	movl	%esi, 12(%rsp)
.L46:
	cmpl	%r14d, %ebp
	jge	.L48
	xorl	%ebx, %ebx
.L49:
	cmpl	%ebx, 12(%rsp)
	jle	.L51
	movl	(%r12,%rbx,8), %ecx
	movl	4(%r12,%rbx,8), %eax
	movq	%r11, 24(%rsp)
	movq	(%rsp), %r8
	movq	%r9, 16(%rsp)
	subl	%ecx, %eax
	addl	%r13d, %ecx
	movslq	%eax, %rdx
	imull	%ebp, %eax
	movslq	%ecx, %rcx
	leaq	(%r11,%rcx,4), %rsi
	movq	(%r9,%rbx,8), %rcx
	salq	$2, %rdx
	incq	%rbx
	cltq
	leaq	(%rcx,%rax,4), %rdi
	movl	$3, %ecx
	call	cudaMemcpyAsync@PLT
	movq	24(%rsp), %r11
	movq	16(%rsp), %r9
	jmp	.L49
.L51:
	incl	%ebp
	addl	%r15d, %r13d
	jmp	.L46
.L48:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2313:
	.size	_verticalSliceSplit, .-_verticalSliceSplit
	.globl	_verticalSplit
	.type	_verticalSplit, @function
_verticalSplit:
.LFB2314:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r8, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%ecx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	movl	%esi, 20(%rsp)
.L53:
	cmpl	%r13d, %ebp
	jge	.L58
	xorl	%ebx, %ebx
.L55:
	cmpl	%ebx, 20(%rsp)
	jle	.L59
	movslq	(%r12,%rbx,4), %rdx
	movslq	%r14d, %rcx
	movq	8(%rsp), %r8
	movq	%r9, 24(%rsp)
	leaq	(%r9,%rcx,4), %rsi
	movq	(%r15,%rbx,8), %rcx
	movq	%rdx, %rax
	salq	$2, %rdx
	imull	%ebp, %eax
	cltq
	leaq	(%rcx,%rax,4), %rdi
	movl	$3, %ecx
	call	cudaMemcpyAsync@PLT
	addl	(%r12,%rbx,4), %r14d
	movq	24(%rsp), %r9
	incq	%rbx
	jmp	.L55
.L59:
	incl	%ebp
	jmp	.L53
.L58:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2314:
	.size	_verticalSplit, .-_verticalSplit
	.globl	_verticalStack
	.type	_verticalStack, @function
_verticalStack:
.LFB2315:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r8, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%ecx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	movl	%esi, 20(%rsp)
.L61:
	cmpl	%r13d, %ebp
	jge	.L66
	xorl	%ebx, %ebx
.L63:
	cmpl	%ebx, 20(%rsp)
	jle	.L67
	movslq	(%r12,%rbx,4), %rdx
	movq	(%r15,%rbx,8), %rcx
	movq	%r9, 24(%rsp)
	movq	8(%rsp), %r8
	movq	%rdx, %rax
	salq	$2, %rdx
	imull	%ebp, %eax
	cltq
	leaq	(%rcx,%rax,4), %rsi
	movslq	%r14d, %rax
	movl	$3, %ecx
	leaq	(%r9,%rax,4), %rdi
	call	cudaMemcpyAsync@PLT
	addl	(%r12,%rbx,4), %r14d
	movq	24(%rsp), %r9
	incq	%rbx
	jmp	.L63
.L67:
	incl	%ebp
	jmp	.L61
.L66:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2315:
	.size	_verticalStack, .-_verticalStack
	.globl	_sliceRowsFloat
	.type	_sliceRowsFloat, @function
_sliceRowsFloat:
.LFB2318:
	.cfi_startproc
	endbr64
	movl	%r8d, %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r9d, %r15d
	imull	%r9d, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r9
	movl	%r8d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	movl	$512, %ecx
	decl	%eax
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	cltd
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	idivl	%ecx
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	$1, %ecx
	movq	96(%rsp), %r13
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L69
	movq	%r13, %r9
	movl	%r15d, %r8d
	movl	%r14d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	%ebx, %edi
	call	_ZL44__device_stub__Z9sliceRowsIfEviPKiPKT_iiPS2_iPKiPKfiiPf
.L69:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2318:
	.size	_sliceRowsFloat, .-_sliceRowsFloat
	.globl	_sliceRowsInt
	.type	_sliceRowsInt, @function
_sliceRowsInt:
.LFB2319:
	.cfi_startproc
	endbr64
	movl	%r8d, %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r9d, %r15d
	imull	%r9d, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r9
	movl	%r8d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	movl	$512, %ecx
	decl	%eax
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	cltd
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	idivl	%ecx
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	$1, %ecx
	movq	96(%rsp), %r13
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L72
	movq	%r13, %r9
	movl	%r15d, %r8d
	movl	%r14d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	%ebx, %edi
	call	_ZL44__device_stub__Z9sliceRowsIiEviPKiPKT_iiPS2_iPKiS0_iiPi
.L72:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2319:
	.size	_sliceRowsInt, .-_sliceRowsInt
	.globl	_Z40__device_stub__Z12sliceColumnsiiPKiPKfPfiiPKiPKfPf
	.type	_Z40__device_stub__Z12sliceColumnsiiPKiPKfPfiiPKiPKfPf, @function
_Z40__device_stub__Z12sliceColumnsiiPKiPKfPfiiPKiPKfPf:
.LFB2377:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	68(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 32(%rsp)
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L74
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12sliceColumnsiiPKiPKfPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L74:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L76
	call	__stack_chk_fail@PLT
.L76:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2377:
	.size	_Z40__device_stub__Z12sliceColumnsiiPKiPKfPfiiPKiPKfPf, .-_Z40__device_stub__Z12sliceColumnsiiPKiPKfPfiiPKiPKfPf
	.globl	_Z12sliceColumnsiiPKiPKfPf
	.type	_Z12sliceColumnsiiPKiPKfPf, @function
_Z12sliceColumnsiiPKiPKfPf:
.LFB2378:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z12sliceColumnsiiPKiPKfPfiiPKiPKfPf
	.cfi_endproc
.LFE2378:
	.size	_Z12sliceColumnsiiPKiPKfPf, .-_Z12sliceColumnsiiPKiPKfPf
	.globl	_sliceColumns
	.type	_sliceColumns, @function
_sliceColumns:
.LFB2316:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%edx, %r14d
	imull	%edx, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r9, %r12
	movq	%rdi, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%r8, %rbp
	decl	%eax
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rcx, %rbx
	movl	$512, %ecx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L80
	movq	%r12, %r8
	movq	%rbp, %rcx
	movq	%rbx, %rdx
	movl	%r14d, %esi
	movl	%r13d, %edi
	call	_Z40__device_stub__Z12sliceColumnsiiPKiPKfPfiiPKiPKfPf
.L80:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2316:
	.size	_sliceColumns, .-_sliceColumns
	.globl	_Z52__device_stub__Z24sliceColumnsAndTransposeiiPKiPKfPfiiPKiPKfPf
	.type	_Z52__device_stub__Z24sliceColumnsAndTransposeiiPKiPKfPfiiPKiPKfPf, @function
_Z52__device_stub__Z24sliceColumnsAndTransposeiiPKiPKfPfiiPKiPKfPf:
.LFB2379:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	68(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 32(%rsp)
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L82
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z24sliceColumnsAndTransposeiiPKiPKfPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L82:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L84
	call	__stack_chk_fail@PLT
.L84:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2379:
	.size	_Z52__device_stub__Z24sliceColumnsAndTransposeiiPKiPKfPfiiPKiPKfPf, .-_Z52__device_stub__Z24sliceColumnsAndTransposeiiPKiPKfPfiiPKiPKfPf
	.globl	_Z24sliceColumnsAndTransposeiiPKiPKfPf
	.type	_Z24sliceColumnsAndTransposeiiPKiPKfPf, @function
_Z24sliceColumnsAndTransposeiiPKiPKfPf:
.LFB2380:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z24sliceColumnsAndTransposeiiPKiPKfPfiiPKiPKfPf
	.cfi_endproc
.LFE2380:
	.size	_Z24sliceColumnsAndTransposeiiPKiPKfPf, .-_Z24sliceColumnsAndTransposeiiPKiPKfPf
	.globl	_sliceColumnsAndTranspose
	.type	_sliceColumnsAndTranspose, @function
_sliceColumnsAndTranspose:
.LFB2317:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%edx, %r14d
	imull	%edx, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r9, %r12
	movq	%rdi, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%r8, %rbp
	decl	%eax
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rcx, %rbx
	movl	$512, %ecx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L88
	movq	%r12, %r8
	movq	%rbp, %rcx
	movq	%rbx, %rdx
	movl	%r14d, %esi
	movl	%r13d, %edi
	call	_Z52__device_stub__Z24sliceColumnsAndTransposeiiPKiPKfPfiiPKiPKfPf
.L88:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2317:
	.size	_sliceColumnsAndTranspose, .-_sliceColumnsAndTranspose
	.globl	_Z46__device_stub__Z14sliceRowsBatchPKiiiPKfiiPrPfPKiiiPKfiiPrPf
	.type	_Z46__device_stub__Z14sliceRowsBatchPKiiiPKfiiPrPfPKiiiPKfiiPrPf, @function
_Z46__device_stub__Z14sliceRowsBatchPKiiiPKfiiPrPfPKiiiPKfiiPrPf:
.LFB2381:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	160(%rsp), %rax
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movq	%rcx, 32(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 80(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L90
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14sliceRowsBatchPKiiiPKfiiPrPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L90:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L92
	call	__stack_chk_fail@PLT
.L92:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2381:
	.size	_Z46__device_stub__Z14sliceRowsBatchPKiiiPKfiiPrPfPKiiiPKfiiPrPf, .-_Z46__device_stub__Z14sliceRowsBatchPKiiiPKfiiPrPfPKiiiPKfiiPrPf
	.globl	_Z14sliceRowsBatchPKiiiPKfiiPrPf
	.type	_Z14sliceRowsBatchPKiiiPKfiiPrPf, @function
_Z14sliceRowsBatchPKiiiPKfiiPrPf:
.LFB2382:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z14sliceRowsBatchPKiiiPKfiiPrPfPKiiiPKfiiPrPf
	.cfi_endproc
.LFE2382:
	.size	_Z14sliceRowsBatchPKiiiPKfiiPrPf, .-_Z14sliceRowsBatchPKiiiPKfiiPrPf
	.globl	_sliceRowsBatch
	.type	_sliceRowsBatch, @function
_sliceRowsBatch:
.LFB2320:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edx, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r9d, %r14d
	movq	%rdi, %r9
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	movl	$512, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	112(%rsp), %r15d
	movq	120(%rsp), %rbp
	movq	%rsi, 8(%rsp)
	imull	%r15d, %eax
	decl	%eax
	cltd
	idivl	%ecx
	movl	$128, %edx
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L96
	pushq	%rax
	.cfi_def_cfa_offset 120
	movq	%r13, %rcx
	movl	%r12d, %edx
	movl	%r15d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdi
	movl	%r14d, %r8d
	movl	%ebx, %esi
	call	_Z46__device_stub__Z14sliceRowsBatchPKiiiPKfiiPrPfPKiiiPKfiiPrPf
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L96:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2320:
	.size	_sliceRowsBatch, .-_sliceRowsBatch
	.globl	_Z57__device_stub__Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPfPKiiifPrPKfiiPf
	.type	_Z57__device_stub__Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPfPKiiifPrPKfiiPf, @function
_Z57__device_stub__Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPfPKiiifPrPKfiiPf:
.LFB2383:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	80(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	92(%rsp), %rsi
	movl	%edx, 32(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	72(%rsp), %rcx
	movl	%r8d, 24(%rsp)
	movl	%r9d, 12(%rsp)
	movss	%xmm0, 28(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 104(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	192(%rsp), %rax
	movl	$1, 100(%rsp)
	movq	%rax, 56(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L98
	pushq	72(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 208
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L98:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L100
	call	__stack_chk_fail@PLT
.L100:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2383:
	.size	_Z57__device_stub__Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPfPKiiifPrPKfiiPf, .-_Z57__device_stub__Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPfPKiiifPrPKfiiPf
	.globl	_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf
	.type	_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf, @function
_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf:
.LFB2384:
	.cfi_startproc
	endbr64
	jmp	_Z57__device_stub__Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPfPKiiifPrPKfiiPf
	.cfi_endproc
.LFE2384:
	.size	_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf, .-_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf
	.globl	_slicedRowsBatchScaledAdd
	.type	_slicedRowsBatchScaledAdd, @function
_slicedRowsBatchScaledAdd:
.LFB2321:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edx, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r9d, %r14d
	movq	%rdi, %r9
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	movl	$512, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	112(%rsp), %r15d
	movss	%xmm0, 12(%rsp)
	movq	120(%rsp), %rbp
	movq	%rsi, (%rsp)
	imull	%r15d, %eax
	decl	%eax
	cltd
	idivl	%ecx
	movl	$128, %edx
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L104
	pushq	%rax
	.cfi_def_cfa_offset 120
	movq	%r13, %rcx
	movl	%r12d, %edx
	movl	%r15d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 128
	movq	16(%rsp), %rdi
	movl	%r14d, %r8d
	movl	%ebx, %esi
	call	_Z57__device_stub__Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPfPKiiifPrPKfiiPf
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L104:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2321:
	.size	_slicedRowsBatchScaledAdd, .-_slicedRowsBatchScaledAdd
	.globl	_Z37__device_stub__Z12columnArgmaxiiPKfPiiiPKfPi
	.type	_Z37__device_stub__Z12columnArgmaxiiPKfPiiiPKfPi, @function
_Z37__device_stub__Z12columnArgmaxiiPKfPiiiPKfPi:
.LFB2385:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	60(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rax, 72(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L106
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12columnArgmaxiiPKfPi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L106:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L108
	call	__stack_chk_fail@PLT
.L108:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2385:
	.size	_Z37__device_stub__Z12columnArgmaxiiPKfPiiiPKfPi, .-_Z37__device_stub__Z12columnArgmaxiiPKfPiiiPKfPi
	.globl	_Z12columnArgmaxiiPKfPi
	.type	_Z12columnArgmaxiiPKfPi, @function
_Z12columnArgmaxiiPKfPi:
.LFB2386:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z12columnArgmaxiiPKfPiiiPKfPi
	.cfi_endproc
.LFE2386:
	.size	_Z12columnArgmaxiiPKfPi, .-_Z12columnArgmaxiiPKfPi
	.globl	_columnArgmax
	.type	_columnArgmax, @function
_columnArgmax:
.LFB2322:
	.cfi_startproc
	endbr64
	movabsq	$4294967297, %rax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	$128, %r8d
	movq	%rcx, %r12
	movl	$1, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%edx, %ebp
	movl	$134217729, %edx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%esi, %ebx
	salq	$5, %rdx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	%esi, 8(%rsp)
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L112
	movq	%r13, %rcx
	movq	%r12, %rdx
	movl	%ebp, %esi
	movl	%ebx, %edi
	call	_Z37__device_stub__Z12columnArgmaxiiPKfPiiiPKfPi
.L112:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2322:
	.size	_columnArgmax, .-_columnArgmax
	.globl	_Z35__device_stub__Z8hprodSumiiPKfS0_PfiiPKfS0_Pf
	.type	_Z35__device_stub__Z8hprodSumiiPKfS0_PfiiPKfS0_Pf, @function
_Z35__device_stub__Z8hprodSumiiPKfS0_PfiiPKfS0_Pf:
.LFB2387:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	68(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 32(%rsp)
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L114
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8hprodSumiiPKfS0_Pf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L114:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L116
	call	__stack_chk_fail@PLT
.L116:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2387:
	.size	_Z35__device_stub__Z8hprodSumiiPKfS0_PfiiPKfS0_Pf, .-_Z35__device_stub__Z8hprodSumiiPKfS0_PfiiPKfS0_Pf
	.globl	_Z8hprodSumiiPKfS0_Pf
	.type	_Z8hprodSumiiPKfS0_Pf, @function
_Z8hprodSumiiPKfS0_Pf:
.LFB2388:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z8hprodSumiiPKfS0_PfiiPKfS0_Pf
	.cfi_endproc
.LFE2388:
	.size	_Z8hprodSumiiPKfS0_Pf, .-_Z8hprodSumiiPKfS0_Pf
	.globl	_Z40__device_stub__Z8sumHprodiPKfS0_S0_S0_PfiPKfS0_S0_S0_Pf
	.type	_Z40__device_stub__Z8sumHprodiPKfS0_S0_S0_PfiPKfS0_S0_S0_Pf, @function
_Z40__device_stub__Z8sumHprodiPKfS0_S0_S0_PfiPKfS0_S0_S0_Pf:
.LFB2389:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 12(%rsp)
	leaq	80(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	56(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 40(%rsp)
	leaq	72(%rsp), %rcx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 48(%rsp)
	movq	%r9, 56(%rsp)
	movq	%rax, 80(%rsp)
	movl	$1, 88(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L119
	pushq	72(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z8sumHprodiPKfS0_S0_S0_Pf(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 192
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L119:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L121
	call	__stack_chk_fail@PLT
.L121:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2389:
	.size	_Z40__device_stub__Z8sumHprodiPKfS0_S0_S0_PfiPKfS0_S0_S0_Pf, .-_Z40__device_stub__Z8sumHprodiPKfS0_S0_S0_PfiPKfS0_S0_S0_Pf
	.globl	_Z8sumHprodiPKfS0_S0_S0_Pf
	.type	_Z8sumHprodiPKfS0_S0_S0_Pf, @function
_Z8sumHprodiPKfS0_S0_S0_Pf:
.LFB2390:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z8sumHprodiPKfS0_S0_S0_PfiPKfS0_S0_S0_Pf
	.cfi_endproc
.LFE2390:
	.size	_Z8sumHprodiPKfS0_S0_S0_Pf, .-_Z8sumHprodiPKfS0_S0_S0_Pf
	.globl	_sumHprod4
	.type	_sumHprod4, @function
_sumHprod4:
.LFB2324:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%esi, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	movq	%rdi, %r9
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	$1, %ecx
	movq	96(%rsp), %r14
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L125
	movq	%r14, %r9
	movq	%r13, %r8
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r15d, %edi
	call	_Z40__device_stub__Z8sumHprodiPKfS0_S0_S0_PfiPKfS0_S0_S0_Pf
.L125:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2324:
	.size	_sumHprod4, .-_sumHprod4
	.globl	_Z43__device_stub__Z8sumHprodiPKfS0_S0_S0_S0_PfiPKfS0_S0_S0_S0_Pf
	.type	_Z43__device_stub__Z8sumHprodiPKfS0_S0_S0_S0_PfiPKfS0_S0_S0_S0_Pf, @function
_Z43__device_stub__Z8sumHprodiPKfS0_S0_S0_S0_PfiPKfS0_S0_S0_S0_Pf:
.LFB2391:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 12(%rsp)
	leaq	88(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	192(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rax, 64(%rsp)
	leaq	64(%rsp), %rax
	movq	%rcx, 40(%rsp)
	leaq	80(%rsp), %rcx
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 48(%rsp)
	movq	%r9, 56(%rsp)
	movq	%rax, 88(%rsp)
	movl	$1, 96(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L127
	pushq	80(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z8sumHprodiPKfS0_S0_S0_S0_Pf(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 208
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	128(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L127:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L129
	call	__stack_chk_fail@PLT
.L129:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2391:
	.size	_Z43__device_stub__Z8sumHprodiPKfS0_S0_S0_S0_PfiPKfS0_S0_S0_S0_Pf, .-_Z43__device_stub__Z8sumHprodiPKfS0_S0_S0_S0_PfiPKfS0_S0_S0_S0_Pf
	.globl	_Z8sumHprodiPKfS0_S0_S0_S0_Pf
	.type	_Z8sumHprodiPKfS0_S0_S0_S0_Pf, @function
_Z8sumHprodiPKfS0_S0_S0_S0_Pf:
.LFB2392:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z8sumHprodiPKfS0_S0_S0_S0_PfiPKfS0_S0_S0_S0_Pf
	.cfi_endproc
.LFE2392:
	.size	_Z8sumHprodiPKfS0_S0_S0_S0_Pf, .-_Z8sumHprodiPKfS0_S0_S0_S0_Pf
	.globl	_sumHprod5
	.type	_sumHprod5, @function
_sumHprod5:
.LFB2325:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leal	-1(%rsi), %eax
	movl	%esi, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	movq	%rdi, %r9
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	112(%rsp), %r14
	movq	120(%rsp), %rbx
	movq	%rdx, 8(%rsp)
	cltd
	idivl	%ecx
	movl	$128, %edx
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L133
	pushq	%rax
	.cfi_def_cfa_offset 120
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%r14, %r9
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movq	%r13, %r8
	movl	%r15d, %edi
	call	_Z43__device_stub__Z8sumHprodiPKfS0_S0_S0_S0_PfiPKfS0_S0_S0_S0_Pf
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L133:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2325:
	.size	_sumHprod5, .-_sumHprod5
	.globl	_Z61__device_stub__Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PfiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	.type	_Z61__device_stub__Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PfiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf, @function
_Z61__device_stub__Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PfiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf:
.LFB2393:
	.cfi_startproc
	endbr64
	subq	$280, %rsp
	.cfi_def_cfa_offset 288
	movl	%edi, 12(%rsp)
	leaq	136(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 264(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	148(%rsp), %rsi
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 200(%rsp)
	movq	288(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	120(%rsp), %rdx
	movq	%rax, 64(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 208(%rsp)
	movq	296(%rsp), %rax
	movq	%rcx, 40(%rsp)
	leaq	128(%rsp), %rcx
	movq	%rax, 72(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 216(%rsp)
	movq	304(%rsp), %rax
	movq	%r8, 48(%rsp)
	movq	%rax, 80(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 224(%rsp)
	movq	312(%rsp), %rax
	movq	%r9, 56(%rsp)
	movq	%rax, 88(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 232(%rsp)
	movq	320(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 240(%rsp)
	movq	328(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 248(%rsp)
	movq	336(%rsp), %rax
	movl	$1, 144(%rsp)
	movq	%rax, 112(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 256(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 136(%rsp)
	movq	%rax, 148(%rsp)
	movl	$1, 156(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L135
	pushq	128(%rsp)
	.cfi_def_cfa_offset 296
	leaq	_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf(%rip), %rdi
	pushq	128(%rsp)
	.cfi_def_cfa_offset 304
	movq	164(%rsp), %rcx
	movl	172(%rsp), %r8d
	movq	152(%rsp), %rsi
	movl	160(%rsp), %edx
	leaq	176(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 296
	popq	%rdx
	.cfi_def_cfa_offset 288
.L135:
	movq	264(%rsp), %rax
	subq	%fs:40, %rax
	je	.L137
	call	__stack_chk_fail@PLT
.L137:
	addq	$280, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2393:
	.size	_Z61__device_stub__Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PfiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf, .-_Z61__device_stub__Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PfiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	.globl	_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	.type	_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf, @function
_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf:
.LFB2394:
	.cfi_startproc
	endbr64
	jmp	_Z61__device_stub__Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PfiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	.cfi_endproc
.LFE2394:
	.size	_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf, .-_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	.globl	_sumHprod11
	.type	_sumHprod11, @function
_sumHprod11:
.LFB2326:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	160(%rsp), %rax
	movq	%rdx, 8(%rsp)
	movq	%rcx, 16(%rsp)
	movl	$512, %ecx
	movq	208(%rsp), %r10
	movq	%rax, 40(%rsp)
	leal	-1(%rsi), %eax
	movq	216(%rsp), %r11
	cltd
	movq	%r10, 56(%rsp)
	movq	168(%rsp), %rbp
	idivl	%ecx
	movq	%r11, 48(%rsp)
	movq	176(%rsp), %r12
	movq	%r8, 24(%rsp)
	movq	184(%rsp), %r13
	movq	%r9, 32(%rsp)
	movq	192(%rsp), %r14
	movq	200(%rsp), %r15
	movl	$128, %edx
	movq	%rdi, %r9
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 72(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 76(%rsp)
	movq	72(%rsp), %rdi
	movl	80(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movq	48(%rsp), %r11
	movq	56(%rsp), %r10
	testl	%eax, %eax
	jne	.L141
	pushq	%rax
	.cfi_def_cfa_offset 168
	movl	%ebx, %edi
	pushq	%r11
	.cfi_def_cfa_offset 176
	pushq	%r10
	.cfi_def_cfa_offset 184
	pushq	%r15
	.cfi_def_cfa_offset 192
	pushq	%r14
	.cfi_def_cfa_offset 200
	pushq	%r13
	.cfi_def_cfa_offset 208
	pushq	%r12
	.cfi_def_cfa_offset 216
	pushq	%rbp
	.cfi_def_cfa_offset 224
	movq	104(%rsp), %r9
	movq	96(%rsp), %r8
	movq	88(%rsp), %rcx
	movq	80(%rsp), %rdx
	movq	72(%rsp), %rsi
	call	_Z61__device_stub__Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_PfiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	addq	$64, %rsp
	.cfi_def_cfa_offset 160
.L141:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2326:
	.size	_sumHprod11, .-_sumHprod11
	.globl	_Z42__device_stub__Z15hadamardProductiPKfS0_PfiPKfS0_Pf
	.type	_Z42__device_stub__Z15hadamardProductiPKfS0_PfiPKfS0_Pf, @function
_Z42__device_stub__Z15hadamardProductiPKfS0_PfiPKfS0_Pf:
.LFB2395:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	64(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	40(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 40(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L143
	pushq	56(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15hadamardProductiPKfS0_Pf(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 160
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L143:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L145
	call	__stack_chk_fail@PLT
.L145:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2395:
	.size	_Z42__device_stub__Z15hadamardProductiPKfS0_PfiPKfS0_Pf, .-_Z42__device_stub__Z15hadamardProductiPKfS0_PfiPKfS0_Pf
	.globl	_Z15hadamardProductiPKfS0_Pf
	.type	_Z15hadamardProductiPKfS0_Pf, @function
_Z15hadamardProductiPKfS0_Pf:
.LFB2396:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z15hadamardProductiPKfS0_PfiPKfS0_Pf
	.cfi_endproc
.LFE2396:
	.size	_Z15hadamardProductiPKfS0_Pf, .-_Z15hadamardProductiPKfS0_Pf
	.globl	_hadamardProduct2
	.type	_hadamardProduct2, @function
_hadamardProduct2:
.LFB2327:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L149
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r13d, %edi
	call	_Z42__device_stub__Z15hadamardProductiPKfS0_PfiPKfS0_Pf
.L149:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2327:
	.size	_hadamardProduct2, .-_hadamardProduct2
	.globl	_Z45__device_stub__Z15hadamardProductiPKfS0_S0_PfiPKfS0_S0_Pf
	.type	_Z45__device_stub__Z15hadamardProductiPKfS0_S0_PfiPKfS0_S0_Pf, @function
_Z45__device_stub__Z15hadamardProductiPKfS0_S0_PfiPKfS0_S0_Pf:
.LFB2397:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 12(%rsp)
	leaq	72(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	48(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 40(%rsp)
	leaq	64(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 48(%rsp)
	movq	%rax, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L151
	pushq	64(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15hadamardProductiPKfS0_S0_Pf(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 176
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L151:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L153
	call	__stack_chk_fail@PLT
.L153:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2397:
	.size	_Z45__device_stub__Z15hadamardProductiPKfS0_S0_PfiPKfS0_S0_Pf, .-_Z45__device_stub__Z15hadamardProductiPKfS0_S0_PfiPKfS0_S0_Pf
	.globl	_Z15hadamardProductiPKfS0_S0_Pf
	.type	_Z15hadamardProductiPKfS0_S0_Pf, @function
_Z15hadamardProductiPKfS0_S0_Pf:
.LFB2398:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z15hadamardProductiPKfS0_S0_PfiPKfS0_S0_Pf
	.cfi_endproc
.LFE2398:
	.size	_Z15hadamardProductiPKfS0_S0_Pf, .-_Z15hadamardProductiPKfS0_S0_Pf
	.globl	_hadamardProduct3
	.type	_hadamardProduct3, @function
_hadamardProduct3:
.LFB2328:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%r9, %r13
	movq	%rdi, %r9
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L157
	movq	%r13, %r8
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r14d, %edi
	call	_Z45__device_stub__Z15hadamardProductiPKfS0_S0_PfiPKfS0_S0_Pf
.L157:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2328:
	.size	_hadamardProduct3, .-_hadamardProduct3
	.globl	_Z46__device_stub__Z18addHadamardProductiPKfS0_fPfiPKfS0_fPf
	.type	_Z46__device_stub__Z18addHadamardProductiPKfS0_fPfiPKfS0_fPf, @function
_Z46__device_stub__Z18addHadamardProductiPKfS0_fPfiPKfS0_fPf:
.LFB2399:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movss	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rdx, 24(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L159
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z18addHadamardProductiPKfS0_fPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L159:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L161
	call	__stack_chk_fail@PLT
.L161:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2399:
	.size	_Z46__device_stub__Z18addHadamardProductiPKfS0_fPfiPKfS0_fPf, .-_Z46__device_stub__Z18addHadamardProductiPKfS0_fPfiPKfS0_fPf
	.globl	_Z18addHadamardProductiPKfS0_fPf
	.type	_Z18addHadamardProductiPKfS0_fPf, @function
_Z18addHadamardProductiPKfS0_fPf:
.LFB2400:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z18addHadamardProductiPKfS0_fPfiPKfS0_fPf
	.cfi_endproc
.LFE2400:
	.size	_Z18addHadamardProductiPKfS0_fPf, .-_Z18addHadamardProductiPKfS0_fPf
	.globl	_addHadamardProduct2
	.type	_addHadamardProduct2, @function
_addHadamardProduct2:
.LFB2329:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movl	$1, %ecx
	movss	%xmm0, 12(%rsp)
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L165
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r13d, %edi
	call	_Z46__device_stub__Z18addHadamardProductiPKfS0_fPfiPKfS0_fPf
.L165:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2329:
	.size	_addHadamardProduct2, .-_addHadamardProduct2
	.globl	_Z49__device_stub__Z18addHadamardProductiPKfS0_S0_fPfiPKfS0_S0_fPf
	.type	_Z49__device_stub__Z18addHadamardProductiPKfS0_S0_fPfiPKfS0_S0_fPf, @function
_Z49__device_stub__Z18addHadamardProductiPKfS0_S0_fPfiPKfS0_S0_fPf:
.LFB2401:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 12(%rsp)
	leaq	64(%rsp), %rdi
	movss	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 40(%rsp)
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L167
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z18addHadamardProductiPKfS0_S0_fPf(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L167:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L169
	call	__stack_chk_fail@PLT
.L169:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2401:
	.size	_Z49__device_stub__Z18addHadamardProductiPKfS0_S0_fPfiPKfS0_S0_fPf, .-_Z49__device_stub__Z18addHadamardProductiPKfS0_S0_fPfiPKfS0_S0_fPf
	.globl	_Z18addHadamardProductiPKfS0_S0_fPf
	.type	_Z18addHadamardProductiPKfS0_S0_fPf, @function
_Z18addHadamardProductiPKfS0_S0_fPf:
.LFB2402:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z18addHadamardProductiPKfS0_S0_fPfiPKfS0_S0_fPf
	.cfi_endproc
.LFE2402:
	.size	_Z18addHadamardProductiPKfS0_S0_fPf, .-_Z18addHadamardProductiPKfS0_S0_fPf
	.globl	_addHadamardProduct3
	.type	_addHadamardProduct3, @function
_addHadamardProduct3:
.LFB2330:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%r9, %r13
	movq	%rdi, %r9
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movl	$1, %ecx
	movss	%xmm0, 12(%rsp)
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L173
	movq	%r13, %r8
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r14d, %edi
	call	_Z49__device_stub__Z18addHadamardProductiPKfS0_S0_fPfiPKfS0_S0_fPf
.L173:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2330:
	.size	_addHadamardProduct3, .-_addHadamardProduct3
	.globl	_Z53__device_stub__Z24addScaledHadamardProductiPKfS0_ffPfiPKfS0_ffPf
	.type	_Z53__device_stub__Z24addScaledHadamardProductiPKfS0_ffPfiPKfS0_ffPf, @function
_Z53__device_stub__Z24addScaledHadamardProductiPKfS0_ffPfiPKfS0_ffPf:
.LFB2403:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 12(%rsp)
	leaq	64(%rsp), %rdi
	movss	%xmm0, 8(%rsp)
	movss	%xmm1, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 40(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L175
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z24addScaledHadamardProductiPKfS0_ffPf(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L175:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L177
	call	__stack_chk_fail@PLT
.L177:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2403:
	.size	_Z53__device_stub__Z24addScaledHadamardProductiPKfS0_ffPfiPKfS0_ffPf, .-_Z53__device_stub__Z24addScaledHadamardProductiPKfS0_ffPfiPKfS0_ffPf
	.globl	_Z24addScaledHadamardProductiPKfS0_ffPf
	.type	_Z24addScaledHadamardProductiPKfS0_ffPf, @function
_Z24addScaledHadamardProductiPKfS0_ffPf:
.LFB2404:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z24addScaledHadamardProductiPKfS0_ffPfiPKfS0_ffPf
	.cfi_endproc
.LFE2404:
	.size	_Z24addScaledHadamardProductiPKfS0_ffPf, .-_Z24addScaledHadamardProductiPKfS0_ffPf
	.globl	_addScaledHadamardProduct
	.type	_addScaledHadamardProduct, @function
_addScaledHadamardProduct:
.LFB2331:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movl	$1, %ecx
	movss	%xmm0, 12(%rsp)
	movss	%xmm1, 8(%rsp)
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	8(%rsp), %xmm1
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L181
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r13d, %edi
	call	_Z53__device_stub__Z24addScaledHadamardProductiPKfS0_ffPfiPKfS0_ffPf
.L181:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2331:
	.size	_addScaledHadamardProduct, .-_addScaledHadamardProduct
	.globl	_Z50__device_stub__Z21addScaledColumnsSliceiifPKfPKiPfiifPKfPKiPf
	.type	_Z50__device_stub__Z21addScaledColumnsSliceiifPKfPKiPfiifPKfPKiPf, @function
_Z50__device_stub__Z21addScaledColumnsSliceiifPKfPKiPfiifPKfPKiPf:
.LFB2405:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 12(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	76(%rsp), %rsi
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rcx, 32(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 40(%rsp)
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L183
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z21addScaledColumnsSliceiifPKfPKiPf(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L183:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L185
	call	__stack_chk_fail@PLT
.L185:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2405:
	.size	_Z50__device_stub__Z21addScaledColumnsSliceiifPKfPKiPfiifPKfPKiPf, .-_Z50__device_stub__Z21addScaledColumnsSliceiifPKfPKiPfiifPKfPKiPf
	.globl	_Z21addScaledColumnsSliceiifPKfPKiPf
	.type	_Z21addScaledColumnsSliceiifPKfPKiPf, @function
_Z21addScaledColumnsSliceiifPKfPKiPf:
.LFB2406:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z21addScaledColumnsSliceiifPKfPKiPfiifPKfPKiPf
	.cfi_endproc
.LFE2406:
	.size	_Z21addScaledColumnsSliceiifPKfPKiPf, .-_Z21addScaledColumnsSliceiifPKfPKiPf
	.globl	_addScaledColumnsSlice
	.type	_addScaledColumnsSlice, @function
_addScaledColumnsSlice:
.LFB2332:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%edx, %r14d
	imull	%edx, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r9, %r12
	movq	%rdi, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%r8, %rbp
	decl	%eax
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rcx, %rbx
	movl	$512, %ecx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movl	$1, %ecx
	movss	%xmm0, 12(%rsp)
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L189
	movq	%r12, %r8
	movq	%rbp, %rcx
	movq	%rbx, %rdx
	movl	%r14d, %esi
	movl	%r13d, %edi
	call	_Z50__device_stub__Z21addScaledColumnsSliceiifPKfPKiPfiifPKfPKiPf
.L189:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2332:
	.size	_addScaledColumnsSlice, .-_addScaledColumnsSlice
	.globl	_Z48__device_stub__Z18addScaledRowsSliceiifPKfPKiiPfiifPKfPKiiPf
	.type	_Z48__device_stub__Z18addScaledRowsSliceiifPKfPKiiPfiifPKfPKiiPf, @function
_Z48__device_stub__Z18addScaledRowsSliceiifPKfPKiiPfiifPKfPKiiPf:
.LFB2407:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	68(%rsp), %rsi
	movl	%r8d, (%rsp)
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%r9, 32(%rsp)
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L191
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z18addScaledRowsSliceiifPKfPKiiPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L191:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L193
	call	__stack_chk_fail@PLT
.L193:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2407:
	.size	_Z48__device_stub__Z18addScaledRowsSliceiifPKfPKiiPfiifPKfPKiiPf, .-_Z48__device_stub__Z18addScaledRowsSliceiifPKfPKiiPfiifPKfPKiiPf
	.globl	_Z18addScaledRowsSliceiifPKfPKiiPf
	.type	_Z18addScaledRowsSliceiifPKfPKiiPf, @function
_Z18addScaledRowsSliceiifPKfPKiiPf:
.LFB2408:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z18addScaledRowsSliceiifPKfPKiiPfiifPKfPKiiPf
	.cfi_endproc
.LFE2408:
	.size	_Z18addScaledRowsSliceiifPKfPKiiPf, .-_Z18addScaledRowsSliceiifPKfPKiiPf
	.globl	_addScaledRowsSlice
	.type	_addScaledRowsSlice, @function
_addScaledRowsSlice:
.LFB2333:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edx, %r15d
	imull	%edx, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r9d, %r12d
	movq	%rdi, %r9
	decl	%eax
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r8, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	cltd
	movq	%rcx, %rbx
	movl	$512, %ecx
	idivl	%ecx
	movl	$128, %edx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	$1, %ecx
	movss	%xmm0, 12(%rsp)
	movq	112(%rsp), %r13
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L197
	movq	%r13, %r9
	movl	%r12d, %r8d
	movq	%rbp, %rcx
	movq	%rbx, %rdx
	movl	%r15d, %esi
	movl	%r14d, %edi
	call	_Z48__device_stub__Z18addScaledRowsSliceiifPKfPKiiPfiifPKfPKiiPf
.L197:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2333:
	.size	_addScaledRowsSlice, .-_addScaledRowsSlice
	.globl	_Z34__device_stub__Z9assignSumiPPKfiPfiPPKfiPf
	.type	_Z34__device_stub__Z9assignSumiPPKfiPfiPPKfiPf, @function
_Z34__device_stub__Z9assignSumiPPKfiPfiPPKfiPf:
.LFB2409:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 72(%rsp)
	movq	%rsp, %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L199
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9assignSumiPPKfiPf(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L199:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L201
	call	__stack_chk_fail@PLT
.L201:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2409:
	.size	_Z34__device_stub__Z9assignSumiPPKfiPfiPPKfiPf, .-_Z34__device_stub__Z9assignSumiPPKfiPfiPPKfiPf
	.globl	_Z9assignSumiPPKfiPf
	.type	_Z9assignSumiPPKfiPf, @function
_Z9assignSumiPPKfiPf:
.LFB2410:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z9assignSumiPPKfiPfiPPKfiPf
	.cfi_endproc
.LFE2410:
	.size	_Z9assignSumiPPKfiPf, .-_Z9assignSumiPPKfiPf
	.globl	_assign_sum
	.type	_assign_sum, @function
_assign_sum:
.LFB2335:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%ecx, %ebp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L205
	movq	%r12, %rcx
	movl	%ebp, %edx
	movq	%rbx, %rsi
	movl	%r13d, %edi
	call	_Z34__device_stub__Z9assignSumiPPKfiPfiPPKfiPf
.L205:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2335:
	.size	_assign_sum, .-_assign_sum
	.globl	_Z31__device_stub__Z6addSumiPPKfiPfiPPKfiPf
	.type	_Z31__device_stub__Z6addSumiPPKfiPfiPPKfiPf, @function
_Z31__device_stub__Z6addSumiPPKfiPfiPPKfiPf:
.LFB2411:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 72(%rsp)
	movq	%rsp, %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L207
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z6addSumiPPKfiPf(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L207:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L209
	call	__stack_chk_fail@PLT
.L209:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2411:
	.size	_Z31__device_stub__Z6addSumiPPKfiPfiPPKfiPf, .-_Z31__device_stub__Z6addSumiPPKfiPfiPPKfiPf
	.globl	_Z6addSumiPPKfiPf
	.type	_Z6addSumiPPKfiPf, @function
_Z6addSumiPPKfiPf:
.LFB2412:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z6addSumiPPKfiPfiPPKfiPf
	.cfi_endproc
.LFE2412:
	.size	_Z6addSumiPPKfiPf, .-_Z6addSumiPPKfiPf
	.globl	_add_sum
	.type	_add_sum, @function
_add_sum:
.LFB2334:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%ecx, %ebp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L213
	movq	%r12, %rcx
	movl	%ebp, %edx
	movq	%rbx, %rsi
	movl	%r13d, %edi
	call	_Z31__device_stub__Z6addSumiPPKfiPfiPPKfiPf
.L213:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2334:
	.size	_add_sum, .-_add_sum
	.globl	_Z29__device_stub__Z5scaleiPKffPfiPKffPf
	.type	_Z29__device_stub__Z5scaleiPKffPfiPKffPf, @function
_Z29__device_stub__Z5scaleiPKffPfiPKffPf:
.LFB2413:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movss	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rdx, 24(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L215
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z5scaleiPKffPf(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L215:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L217
	call	__stack_chk_fail@PLT
.L217:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2413:
	.size	_Z29__device_stub__Z5scaleiPKffPfiPKffPf, .-_Z29__device_stub__Z5scaleiPKffPfiPKffPf
	.globl	_Z5scaleiPKffPf
	.type	_Z5scaleiPKffPf, @function
_Z5scaleiPKffPf:
.LFB2414:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z5scaleiPKffPfiPKffPf
	.cfi_endproc
.LFE2414:
	.size	_Z5scaleiPKffPf, .-_Z5scaleiPKffPf
	.globl	_scale
	.type	_scale, @function
_scale:
.LFB2336:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r9
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	movss	%xmm0, 12(%rsp)
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L221
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r12d, %edi
	call	_Z29__device_stub__Z5scaleiPKffPfiPKffPf
.L221:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2336:
	.size	_scale, .-_scale
	.globl	_Z25__device_stub__Z4fillifPfifPf
	.type	_Z25__device_stub__Z4fillifPfifPf, @function
_Z25__device_stub__Z4fillifPfifPf:
.LFB2415:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movl	%edi, 12(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movss	%xmm0, 8(%rsp)
	leaq	40(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rax, 64(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L223
	pushq	32(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z4fillifPf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 128
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L223:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L225
	call	__stack_chk_fail@PLT
.L225:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2415:
	.size	_Z25__device_stub__Z4fillifPfifPf, .-_Z25__device_stub__Z4fillifPfifPf
	.globl	_Z4fillifPf
	.type	_Z4fillifPf, @function
_Z4fillifPf:
.LFB2416:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z4fillifPfifPf
	.cfi_endproc
.LFE2416:
	.size	_Z4fillifPf, .-_Z4fillifPf
	.globl	_hprodSum
	.type	_hprodSum, @function
_hprodSum:
.LFB2323:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edx, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	cltd
	movq	%r8, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	movl	$8388609, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	salq	$9, %rcx
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r9, %rbp
	movq	%rdi, %r9
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	movl	$512, %esi
	idivl	%esi
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rcx, 20(%rsp)
	movl	$1, 28(%rsp)
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r8d, %r8d
	movq	%rcx, %rdx
	movl	$1, %ecx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L229
	movq	%rbp, %rsi
	xorps	%xmm0, %xmm0
	movl	%ebx, %edi
	call	_Z25__device_stub__Z4fillifPfifPf
.L229:
	imull	%ebx, %r15d
	movl	$512, %esi
	movl	$8388609, %ecx
	movq	%r12, %r9
	salq	$9, %rcx
	movl	$1, 28(%rsp)
	movq	%rcx, 20(%rsp)
	leal	-1(%r15), %eax
	cltd
	idivl	%esi
	movl	$128, %edx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r8d, %r8d
	movq	%rcx, %rdx
	movl	$1, %ecx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L230
	movq	%rbp, %r8
	movq	%r14, %rcx
	movq	%r13, %rdx
	movl	%ebx, %esi
	movl	%r15d, %edi
	call	_Z35__device_stub__Z8hprodSumiiPKfS0_PfiiPKfS0_Pf
.L230:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2323:
	.size	_hprodSum, .-_hprodSum
	.globl	_fill
	.type	_fill, @function
_fill:
.LFB2337:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$512, %ecx
	movq	%rdx, %rbp
	cltd
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %r9
	movl	%esi, %ebx
	idivl	%ecx
	movl	$128, %edx
	subq	$56, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	movss	%xmm0, 12(%rsp)
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L233
	movq	%rbp, %rsi
	movl	%ebx, %edi
	call	_Z25__device_stub__Z4fillifPfifPf
.L233:
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2337:
	.size	_fill, .-_fill
	.globl	_Z36__device_stub__Z10maskedFillifPKffPfifPKffPf
	.type	_Z36__device_stub__Z10maskedFillifPKffPfifPKffPf, @function
_Z36__device_stub__Z10maskedFillifPKffPfifPKffPf:
.LFB2417:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movss	%xmm0, 8(%rsp)
	movss	%xmm1, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L235
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10maskedFillifPKffPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L235:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L237
	call	__stack_chk_fail@PLT
.L237:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2417:
	.size	_Z36__device_stub__Z10maskedFillifPKffPfifPKffPf, .-_Z36__device_stub__Z10maskedFillifPKffPfifPKffPf
	.globl	_Z10maskedFillifPKffPf
	.type	_Z10maskedFillifPKffPf, @function
_Z10maskedFillifPKffPf:
.LFB2418:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z10maskedFillifPKffPfifPKffPf
	.cfi_endproc
.LFE2418:
	.size	_Z10maskedFillifPKffPf, .-_Z10maskedFillifPKffPf
	.globl	_maskedFill
	.type	_maskedFill, @function
_maskedFill:
.LFB2338:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r9
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	movss	%xmm0, 12(%rsp)
	movss	%xmm1, 8(%rsp)
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	8(%rsp), %xmm1
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L241
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r12d, %edi
	call	_Z36__device_stub__Z10maskedFillifPKffPfifPKffPf
.L241:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2338:
	.size	_maskedFill, .-_maskedFill
	.globl	_Z52__device_stub__Z23matrixVectorRowAdditioniiPKffS0_PfiiPKffS0_Pf
	.type	_Z52__device_stub__Z23matrixVectorRowAdditioniiPKffS0_PfiiPKffS0_Pf, @function
_Z52__device_stub__Z23matrixVectorRowAdditioniiPKffS0_PfiiPKffS0_Pf:
.LFB2419:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 12(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	76(%rsp), %rsi
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rcx, 32(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 40(%rsp)
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L243
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z23matrixVectorRowAdditioniiPKffS0_Pf(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L243:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L245
	call	__stack_chk_fail@PLT
.L245:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2419:
	.size	_Z52__device_stub__Z23matrixVectorRowAdditioniiPKffS0_PfiiPKffS0_Pf, .-_Z52__device_stub__Z23matrixVectorRowAdditioniiPKffS0_PfiiPKffS0_Pf
	.globl	_Z23matrixVectorRowAdditioniiPKffS0_Pf
	.type	_Z23matrixVectorRowAdditioniiPKffS0_Pf, @function
_Z23matrixVectorRowAdditioniiPKffS0_Pf:
.LFB2420:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z23matrixVectorRowAdditioniiPKffS0_PfiiPKffS0_Pf
	.cfi_endproc
.LFE2420:
	.size	_Z23matrixVectorRowAdditioniiPKffS0_Pf, .-_Z23matrixVectorRowAdditioniiPKffS0_Pf
	.globl	_matrixVectorRowAddition
	.type	_matrixVectorRowAddition, @function
_matrixVectorRowAddition:
.LFB2339:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%edx, %r14d
	imull	%edx, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r9, %r12
	movq	%rdi, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%r8, %rbp
	decl	%eax
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rcx, %rbx
	movl	$512, %ecx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movl	$1, %ecx
	movss	%xmm0, 12(%rsp)
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L249
	movq	%r12, %r8
	movq	%rbp, %rcx
	movq	%rbx, %rdx
	movl	%r14d, %esi
	movl	%r13d, %edi
	call	_Z52__device_stub__Z23matrixVectorRowAdditioniiPKffS0_PfiiPKffS0_Pf
.L249:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2339:
	.size	_matrixVectorRowAddition, .-_matrixVectorRowAddition
	.globl	_Z48__device_stub__Z20assignScaledAdditionifPKfS0_PfifPKfS0_Pf
	.type	_Z48__device_stub__Z20assignScaledAdditionifPKfS0_PfifPKfS0_Pf, @function
_Z48__device_stub__Z20assignScaledAdditionifPKfS0_PfifPKfS0_Pf:
.LFB2421:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movss	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rdx, 24(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L251
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z20assignScaledAdditionifPKfS0_Pf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L251:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L253
	call	__stack_chk_fail@PLT
.L253:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2421:
	.size	_Z48__device_stub__Z20assignScaledAdditionifPKfS0_PfifPKfS0_Pf, .-_Z48__device_stub__Z20assignScaledAdditionifPKfS0_PfifPKfS0_Pf
	.globl	_Z20assignScaledAdditionifPKfS0_Pf
	.type	_Z20assignScaledAdditionifPKfS0_Pf, @function
_Z20assignScaledAdditionifPKfS0_Pf:
.LFB2422:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z20assignScaledAdditionifPKfS0_PfifPKfS0_Pf
	.cfi_endproc
.LFE2422:
	.size	_Z20assignScaledAdditionifPKfS0_Pf, .-_Z20assignScaledAdditionifPKfS0_Pf
	.globl	_assignScaledAddition
	.type	_assignScaledAddition, @function
_assignScaledAddition:
.LFB2347:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movl	$1, %ecx
	movss	%xmm0, 12(%rsp)
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L257
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r13d, %edi
	call	_Z48__device_stub__Z20assignScaledAdditionifPKfS0_PfifPKfS0_Pf
.L257:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2347:
	.size	_assignScaledAddition, .-_assignScaledAddition
	.globl	_Z51__device_stub__Z23assignScaledSubtractionifPKfS0_PfifPKfS0_Pf
	.type	_Z51__device_stub__Z23assignScaledSubtractionifPKfS0_PfifPKfS0_Pf, @function
_Z51__device_stub__Z23assignScaledSubtractionifPKfS0_PfifPKfS0_Pf:
.LFB2423:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movss	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rdx, 24(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L259
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z23assignScaledSubtractionifPKfS0_Pf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L259:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L261
	call	__stack_chk_fail@PLT
.L261:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2423:
	.size	_Z51__device_stub__Z23assignScaledSubtractionifPKfS0_PfifPKfS0_Pf, .-_Z51__device_stub__Z23assignScaledSubtractionifPKfS0_PfifPKfS0_Pf
	.globl	_Z23assignScaledSubtractionifPKfS0_Pf
	.type	_Z23assignScaledSubtractionifPKfS0_Pf, @function
_Z23assignScaledSubtractionifPKfS0_Pf:
.LFB2424:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z23assignScaledSubtractionifPKfS0_PfifPKfS0_Pf
	.cfi_endproc
.LFE2424:
	.size	_Z23assignScaledSubtractionifPKfS0_Pf, .-_Z23assignScaledSubtractionifPKfS0_Pf
	.globl	_assignScaledSubtraction
	.type	_assignScaledSubtraction, @function
_assignScaledSubtraction:
.LFB2348:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movl	$1, %ecx
	movss	%xmm0, 12(%rsp)
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L265
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r13d, %edi
	call	_Z51__device_stub__Z23assignScaledSubtractionifPKfS0_PfifPKfS0_Pf
.L265:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2348:
	.size	_assignScaledSubtraction, .-_assignScaledSubtraction
	.globl	_Z48__device_stub__Z20addScaledSubtractionifPKfS0_PfifPKfS0_Pf
	.type	_Z48__device_stub__Z20addScaledSubtractionifPKfS0_PfifPKfS0_Pf, @function
_Z48__device_stub__Z20addScaledSubtractionifPKfS0_PfifPKfS0_Pf:
.LFB2425:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movss	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rdx, 24(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L267
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z20addScaledSubtractionifPKfS0_Pf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L267:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L269
	call	__stack_chk_fail@PLT
.L269:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2425:
	.size	_Z48__device_stub__Z20addScaledSubtractionifPKfS0_PfifPKfS0_Pf, .-_Z48__device_stub__Z20addScaledSubtractionifPKfS0_PfifPKfS0_Pf
	.globl	_Z20addScaledSubtractionifPKfS0_Pf
	.type	_Z20addScaledSubtractionifPKfS0_Pf, @function
_Z20addScaledSubtractionifPKfS0_Pf:
.LFB2426:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z20addScaledSubtractionifPKfS0_PfifPKfS0_Pf
	.cfi_endproc
.LFE2426:
	.size	_Z20addScaledSubtractionifPKfS0_Pf, .-_Z20addScaledSubtractionifPKfS0_Pf
	.globl	_addScaledSubtraction
	.type	_addScaledSubtraction, @function
_addScaledSubtraction:
.LFB2349:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movl	$1, %ecx
	movss	%xmm0, 12(%rsp)
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L273
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r13d, %edi
	call	_Z48__device_stub__Z20addScaledSubtractionifPKfS0_PfifPKfS0_Pf
.L273:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2349:
	.size	_addScaledSubtraction, .-_addScaledSubtraction
	.globl	_Z47__device_stub__Z19softmaxCeDerivativeiiPKfPKiPfiiPKfPKiPf
	.type	_Z47__device_stub__Z19softmaxCeDerivativeiiPKfPKiPfiiPKfPKiPf, @function
_Z47__device_stub__Z19softmaxCeDerivativeiiPKfPKiPfiiPKfPKiPf:
.LFB2427:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	68(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 32(%rsp)
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L275
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z19softmaxCeDerivativeiiPKfPKiPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L275:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L277
	call	__stack_chk_fail@PLT
.L277:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2427:
	.size	_Z47__device_stub__Z19softmaxCeDerivativeiiPKfPKiPfiiPKfPKiPf, .-_Z47__device_stub__Z19softmaxCeDerivativeiiPKfPKiPfiiPKfPKiPf
	.globl	_Z19softmaxCeDerivativeiiPKfPKiPf
	.type	_Z19softmaxCeDerivativeiiPKfPKiPf, @function
_Z19softmaxCeDerivativeiiPKfPKiPf:
.LFB2428:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z19softmaxCeDerivativeiiPKfPKiPfiiPKfPKiPf
	.cfi_endproc
.LFE2428:
	.size	_Z19softmaxCeDerivativeiiPKfPKiPf, .-_Z19softmaxCeDerivativeiiPKfPKiPf
	.globl	_softmaxCeDerivative
	.type	_softmaxCeDerivative, @function
_softmaxCeDerivative:
.LFB2350:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%edx, %r14d
	imull	%edx, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r9, %r12
	movq	%rdi, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%r8, %rbp
	decl	%eax
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rcx, %rbx
	movl	$512, %ecx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L281
	movq	%r12, %r8
	movq	%rbp, %rcx
	movq	%rbx, %rdx
	movl	%r14d, %esi
	movl	%r13d, %edi
	call	_Z47__device_stub__Z19softmaxCeDerivativeiiPKfPKiPfiiPKfPKiPf
.L281:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2350:
	.size	_softmaxCeDerivative, .-_softmaxCeDerivative
	.globl	_Z50__device_stub__Z22addSoftmaxCeDerivativeiiPKfPKiPfiiPKfPKiPf
	.type	_Z50__device_stub__Z22addSoftmaxCeDerivativeiiPKfPKiPfiiPKfPKiPf, @function
_Z50__device_stub__Z22addSoftmaxCeDerivativeiiPKfPKiPfiiPKfPKiPf:
.LFB2429:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	68(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 32(%rsp)
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L283
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z22addSoftmaxCeDerivativeiiPKfPKiPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L283:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L285
	call	__stack_chk_fail@PLT
.L285:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2429:
	.size	_Z50__device_stub__Z22addSoftmaxCeDerivativeiiPKfPKiPfiiPKfPKiPf, .-_Z50__device_stub__Z22addSoftmaxCeDerivativeiiPKfPKiPfiiPKfPKiPf
	.globl	_Z22addSoftmaxCeDerivativeiiPKfPKiPf
	.type	_Z22addSoftmaxCeDerivativeiiPKfPKiPf, @function
_Z22addSoftmaxCeDerivativeiiPKfPKiPf:
.LFB2430:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z22addSoftmaxCeDerivativeiiPKfPKiPfiiPKfPKiPf
	.cfi_endproc
.LFE2430:
	.size	_Z22addSoftmaxCeDerivativeiiPKfPKiPf, .-_Z22addSoftmaxCeDerivativeiiPKfPKiPf
	.globl	_addSoftmaxCeDerivative
	.type	_addSoftmaxCeDerivative, @function
_addSoftmaxCeDerivative:
.LFB2351:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%edx, %r14d
	imull	%edx, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r9, %r12
	movq	%rdi, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%r8, %rbp
	decl	%eax
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rcx, %rbx
	movl	$512, %ecx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L289
	movq	%r12, %r8
	movq	%rbp, %rcx
	movq	%rbx, %rdx
	movl	%r14d, %esi
	movl	%r13d, %edi
	call	_Z50__device_stub__Z22addSoftmaxCeDerivativeiiPKfPKiPfiiPKfPKiPf
.L289:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2351:
	.size	_addSoftmaxCeDerivative, .-_addSoftmaxCeDerivative
	.globl	_Z54__device_stub__Z27assignSequentialMeanPoolingiiPPKfiPfiiPPKfiPf
	.type	_Z54__device_stub__Z27assignSequentialMeanPoolingiiPPKfiPfiiPPKfiPf, @function
_Z54__device_stub__Z27assignSequentialMeanPoolingiiPPKfiPfiiPPKfiPf:
.LFB2431:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movq	%r8, 32(%rsp)
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L291
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z27assignSequentialMeanPoolingiiPPKfiPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L291:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L293
	call	__stack_chk_fail@PLT
.L293:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2431:
	.size	_Z54__device_stub__Z27assignSequentialMeanPoolingiiPPKfiPfiiPPKfiPf, .-_Z54__device_stub__Z27assignSequentialMeanPoolingiiPPKfiPfiiPPKfiPf
	.globl	_Z27assignSequentialMeanPoolingiiPPKfiPf
	.type	_Z27assignSequentialMeanPoolingiiPPKfiPf, @function
_Z27assignSequentialMeanPoolingiiPPKfiPf:
.LFB2432:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z27assignSequentialMeanPoolingiiPPKfiPfiiPPKfiPf
	.cfi_endproc
.LFE2432:
	.size	_Z27assignSequentialMeanPoolingiiPPKfiPf, .-_Z27assignSequentialMeanPoolingiiPPKfiPf
	.globl	_assignSequentialMeanPooling
	.type	_assignSequentialMeanPooling, @function
_assignSequentialMeanPooling:
.LFB2340:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%edx, %r14d
	imull	%edx, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r9, %r12
	movq	%rdi, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%r8d, %ebp
	decl	%eax
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rcx, %rbx
	movl	$512, %ecx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L297
	movq	%r12, %r8
	movl	%ebp, %ecx
	movq	%rbx, %rdx
	movl	%r14d, %esi
	movl	%r13d, %edi
	call	_Z54__device_stub__Z27assignSequentialMeanPoolingiiPPKfiPfiiPPKfiPf
.L297:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2340:
	.size	_assignSequentialMeanPooling, .-_assignSequentialMeanPooling
	.globl	_Z53__device_stub__Z26assignSequentialSumPoolingiiPPKfiPfiiPPKfiPf
	.type	_Z53__device_stub__Z26assignSequentialSumPoolingiiPPKfiPfiiPPKfiPf, @function
_Z53__device_stub__Z26assignSequentialSumPoolingiiPPKfiPfiiPPKfiPf:
.LFB2433:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movq	%r8, 32(%rsp)
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L299
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z26assignSequentialSumPoolingiiPPKfiPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L299:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L301
	call	__stack_chk_fail@PLT
.L301:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2433:
	.size	_Z53__device_stub__Z26assignSequentialSumPoolingiiPPKfiPfiiPPKfiPf, .-_Z53__device_stub__Z26assignSequentialSumPoolingiiPPKfiPfiiPPKfiPf
	.globl	_Z26assignSequentialSumPoolingiiPPKfiPf
	.type	_Z26assignSequentialSumPoolingiiPPKfiPf, @function
_Z26assignSequentialSumPoolingiiPPKfiPf:
.LFB2434:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z26assignSequentialSumPoolingiiPPKfiPfiiPPKfiPf
	.cfi_endproc
.LFE2434:
	.size	_Z26assignSequentialSumPoolingiiPPKfiPf, .-_Z26assignSequentialSumPoolingiiPPKfiPf
	.globl	_assignSequentialSumPooling
	.type	_assignSequentialSumPooling, @function
_assignSequentialSumPooling:
.LFB2341:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%edx, %r14d
	imull	%edx, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r9, %r12
	movq	%rdi, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%r8d, %ebp
	decl	%eax
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rcx, %rbx
	movl	$512, %ecx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L305
	movq	%r12, %r8
	movl	%ebp, %ecx
	movq	%rbx, %rdx
	movl	%r14d, %esi
	movl	%r13d, %edi
	call	_Z53__device_stub__Z26assignSequentialSumPoolingiiPPKfiPfiiPPKfiPf
.L305:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2341:
	.size	_assignSequentialSumPooling, .-_assignSequentialSumPooling
	.globl	_Z57__device_stub__Z27assignSequentialWeightedSumiiPPKfS0_iPfiiPPKfS0_iPf
	.type	_Z57__device_stub__Z27assignSequentialWeightedSumiiPPKfS0_iPfiiPPKfS0_iPf, @function
_Z57__device_stub__Z27assignSequentialWeightedSumiiPPKfS0_iPfiiPPKfS0_iPf:
.LFB2435:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	48(%rsp), %rdx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movq	%rcx, 32(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%r9, 40(%rsp)
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L307
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z27assignSequentialWeightedSumiiPPKfS0_iPf(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L307:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L309
	call	__stack_chk_fail@PLT
.L309:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2435:
	.size	_Z57__device_stub__Z27assignSequentialWeightedSumiiPPKfS0_iPfiiPPKfS0_iPf, .-_Z57__device_stub__Z27assignSequentialWeightedSumiiPPKfS0_iPfiiPPKfS0_iPf
	.globl	_Z27assignSequentialWeightedSumiiPPKfS0_iPf
	.type	_Z27assignSequentialWeightedSumiiPPKfS0_iPf, @function
_Z27assignSequentialWeightedSumiiPPKfS0_iPf:
.LFB2436:
	.cfi_startproc
	endbr64
	jmp	_Z57__device_stub__Z27assignSequentialWeightedSumiiPPKfS0_iPfiiPPKfS0_iPf
	.cfi_endproc
.LFE2436:
	.size	_Z27assignSequentialWeightedSumiiPPKfS0_iPf, .-_Z27assignSequentialWeightedSumiiPPKfS0_iPf
	.globl	_assignSequentialWeightedSum
	.type	_assignSequentialWeightedSum, @function
_assignSequentialWeightedSum:
.LFB2342:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edx, %r15d
	imull	%edx, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r9d, %r12d
	movq	%rdi, %r9
	decl	%eax
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r8, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	cltd
	movq	%rcx, %rbx
	movl	$512, %ecx
	idivl	%ecx
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	$1, %ecx
	movq	96(%rsp), %r13
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L313
	movq	%r13, %r9
	movl	%r12d, %r8d
	movq	%rbp, %rcx
	movq	%rbx, %rdx
	movl	%r15d, %esi
	movl	%r14d, %edi
	call	_Z57__device_stub__Z27assignSequentialWeightedSumiiPPKfS0_iPfiiPPKfS0_iPf
.L313:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2342:
	.size	_assignSequentialWeightedSum, .-_assignSequentialWeightedSum
	.globl	_Z42__device_stub__Z16sequentiallyTileiPKfPPfiiPKfPPfi
	.type	_Z42__device_stub__Z16sequentiallyTileiPKfPPfiiPKfPPfi, @function
_Z42__device_stub__Z16sequentiallyTileiPKfPPfiiPKfPPfi:
.LFB2437:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	movq	%rsp, %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L315
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z16sequentiallyTileiPKfPPfi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L315:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L317
	call	__stack_chk_fail@PLT
.L317:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2437:
	.size	_Z42__device_stub__Z16sequentiallyTileiPKfPPfiiPKfPPfi, .-_Z42__device_stub__Z16sequentiallyTileiPKfPPfiiPKfPPfi
	.globl	_Z16sequentiallyTileiPKfPPfi
	.type	_Z16sequentiallyTileiPKfPPfi, @function
_Z16sequentiallyTileiPKfPPfi:
.LFB2438:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z16sequentiallyTileiPKfPPfiiPKfPPfi
	.cfi_endproc
.LFE2438:
	.size	_Z16sequentiallyTileiPKfPPfi, .-_Z16sequentiallyTileiPKfPPfi
	.globl	_sequentiallyTile
	.type	_sequentiallyTile, @function
_sequentiallyTile:
.LFB2343:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L321
	movl	%r12d, %ecx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r13d, %edi
	call	_Z42__device_stub__Z16sequentiallyTileiPKfPPfiiPKfPPfi
.L321:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2343:
	.size	_sequentiallyTile, .-_sequentiallyTile
	.globl	_Z46__device_stub__Z13assignDLDpreaiiPPKfS0_S0_iPfiiPPKfS0_S0_iPf
	.type	_Z46__device_stub__Z13assignDLDpreaiiPPKfS0_S0_iPfiiPPKfS0_S0_iPf, @function
_Z46__device_stub__Z13assignDLDpreaiiPPKfS0_S0_iPfiiPPKfS0_S0_iPf:
.LFB2439:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 28(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	56(%rsp), %rdx
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movq	%rcx, 32(%rsp)
	leaq	64(%rsp), %rcx
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	176(%rsp), %rax
	movq	%r8, 40(%rsp)
	movq	%rax, 48(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L323
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z13assignDLDpreaiiPPKfS0_S0_iPf(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L323:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L325
	call	__stack_chk_fail@PLT
.L325:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2439:
	.size	_Z46__device_stub__Z13assignDLDpreaiiPPKfS0_S0_iPfiiPPKfS0_S0_iPf, .-_Z46__device_stub__Z13assignDLDpreaiiPPKfS0_S0_iPfiiPPKfS0_S0_iPf
	.globl	_Z13assignDLDpreaiiPPKfS0_S0_iPf
	.type	_Z13assignDLDpreaiiPPKfS0_S0_iPf, @function
_Z13assignDLDpreaiiPPKfS0_S0_iPf:
.LFB2440:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z13assignDLDpreaiiPPKfS0_S0_iPfiiPPKfS0_S0_iPf
	.cfi_endproc
.LFE2440:
	.size	_Z13assignDLDpreaiiPPKfS0_S0_iPf, .-_Z13assignDLDpreaiiPPKfS0_S0_iPf
	.globl	_assignDLDprea
	.type	_assignDLDprea, @function
_assignDLDprea:
.LFB2344:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%esi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r9, %r14
	movq	%rdi, %r9
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rax, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movslq	112(%rsp), %rdx
	movq	120(%rsp), %r12
	movq	%rcx, 8(%rsp)
	movslq	%ebp, %rcx
	imulq	%rcx, %rax
	movl	$512, %ecx
	movq	%rdx, %r15
	imulq	%rdx, %rax
	imulq	%rdx, %rax
	decq	%rax
	cqto
	idivq	%rcx
	movl	$128, %edx
	movl	$1, %ecx
	incq	%rax
	cmpq	%rdx, %rax
	cmovg	%rdx, %rax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L329
	pushq	%rax
	.cfi_def_cfa_offset 120
	movq	%r13, %rcx
	movl	%r15d, %r9d
	movq	%r14, %r8
	pushq	%r12
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdx
	movl	%ebp, %esi
	movl	%ebx, %edi
	call	_Z46__device_stub__Z13assignDLDpreaiiPPKfS0_S0_iPfiiPPKfS0_S0_iPf
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L329:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2344:
	.size	_assignDLDprea, .-_assignDLDprea
	.globl	_Z52__device_stub__Z22addAttentionDerivativeiiPPKfS0_iPfiiPPKfS0_iPf
	.type	_Z52__device_stub__Z22addAttentionDerivativeiiPPKfS0_iPfiiPPKfS0_iPf, @function
_Z52__device_stub__Z22addAttentionDerivativeiiPPKfS0_iPfiiPPKfS0_iPf:
.LFB2441:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	48(%rsp), %rdx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movq	%rcx, 32(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%r9, 40(%rsp)
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L331
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z22addAttentionDerivativeiiPPKfS0_iPf(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L331:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L333
	call	__stack_chk_fail@PLT
.L333:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2441:
	.size	_Z52__device_stub__Z22addAttentionDerivativeiiPPKfS0_iPfiiPPKfS0_iPf, .-_Z52__device_stub__Z22addAttentionDerivativeiiPPKfS0_iPfiiPPKfS0_iPf
	.globl	_Z22addAttentionDerivativeiiPPKfS0_iPf
	.type	_Z22addAttentionDerivativeiiPPKfS0_iPf, @function
_Z22addAttentionDerivativeiiPPKfS0_iPf:
.LFB2442:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z22addAttentionDerivativeiiPPKfS0_iPfiiPPKfS0_iPf
	.cfi_endproc
.LFE2442:
	.size	_Z22addAttentionDerivativeiiPPKfS0_iPf, .-_Z22addAttentionDerivativeiiPPKfS0_iPf
	.globl	_addAttentionDerivative
	.type	_addAttentionDerivative, @function
_addAttentionDerivative:
.LFB2345:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r9d, %r15d
	imull	%edx, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	imull	%r9d, %eax
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %r9
	movl	%esi, %ebx
	decl	%eax
	cltd
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	idivl	%ecx
	movq	96(%rsp), %r13
	movl	$128, %edx
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L337
	movq	%r13, %r9
	movl	%r15d, %r8d
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movl	%r14d, %esi
	movl	%ebx, %edi
	call	_Z52__device_stub__Z22addAttentionDerivativeiiPPKfS0_iPfiiPPKfS0_iPf
.L337:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2345:
	.size	_addAttentionDerivative, .-_addAttentionDerivative
	.globl	_Z52__device_stub__Z16addAttentionTileiiPKfS0_S0_S0_iPPfiiPKfS0_S0_S0_iPPf
	.type	_Z52__device_stub__Z16addAttentionTileiiPKfS0_S0_S0_iPPfiiPKfS0_S0_S0_iPPf, @function
_Z52__device_stub__Z16addAttentionTileiiPKfS0_S0_S0_iPPfiiPKfS0_S0_S0_iPPf:
.LFB2443:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	184(%rsp), %rax
	movl	%edi, 12(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 16(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rcx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 32(%rsp)
	movq	%r9, 40(%rsp)
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L339
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z16addAttentionTileiiPKfS0_S0_S0_iPPf(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L339:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L341
	call	__stack_chk_fail@PLT
.L341:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2443:
	.size	_Z52__device_stub__Z16addAttentionTileiiPKfS0_S0_S0_iPPfiiPKfS0_S0_S0_iPPf, .-_Z52__device_stub__Z16addAttentionTileiiPKfS0_S0_S0_iPPfiiPKfS0_S0_S0_iPPf
	.globl	_Z16addAttentionTileiiPKfS0_S0_S0_iPPf
	.type	_Z16addAttentionTileiiPKfS0_S0_S0_iPPf, @function
_Z16addAttentionTileiiPKfS0_S0_S0_iPPf:
.LFB2444:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z16addAttentionTileiiPKfS0_S0_S0_iPPfiiPKfS0_S0_S0_iPPf
	.cfi_endproc
.LFE2444:
	.size	_Z16addAttentionTileiiPKfS0_S0_S0_iPPf, .-_Z16addAttentionTileiiPKfS0_S0_S0_iPPf
	.globl	_addAttentionTile
	.type	_addAttentionTile, @function
_addAttentionTile:
.LFB2346:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%esi, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	imull	%edx, %eax
	movq	%r9, %r14
	movq	%rdi, %r9
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	120(%rsp), %r12d
	movq	112(%rsp), %r15
	movq	%rcx, (%rsp)
	movl	$512, %ecx
	movq	%r8, 8(%rsp)
	movq	128(%rsp), %r13
	imull	%r12d, %eax
	decl	%eax
	cltd
	idivl	%ecx
	movl	$128, %edx
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L345
	pushq	%r13
	.cfi_def_cfa_offset 120
	movq	%r15, %r9
	movq	%r14, %r8
	movl	%ebp, %esi
	pushq	%r12
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rcx
	movl	%ebx, %edi
	movq	16(%rsp), %rdx
	call	_Z52__device_stub__Z16addAttentionTileiiPKfS0_S0_S0_iPPfiiPKfS0_S0_S0_iPPf
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L345:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2346:
	.size	_addAttentionTile, .-_addAttentionTile
	.globl	_Z34__device_stub__Z7dropoutifPKfS0_PfifPKfS0_Pf
	.type	_Z34__device_stub__Z7dropoutifPKfS0_PfifPKfS0_Pf, @function
_Z34__device_stub__Z7dropoutifPKfS0_PfifPKfS0_Pf:
.LFB2445:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movss	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rdx, 24(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L347
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7dropoutifPKfS0_Pf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L347:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L349
	call	__stack_chk_fail@PLT
.L349:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2445:
	.size	_Z34__device_stub__Z7dropoutifPKfS0_PfifPKfS0_Pf, .-_Z34__device_stub__Z7dropoutifPKfS0_PfifPKfS0_Pf
	.globl	_Z7dropoutifPKfS0_Pf
	.type	_Z7dropoutifPKfS0_Pf, @function
_Z7dropoutifPKfS0_Pf:
.LFB2446:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z7dropoutifPKfS0_PfifPKfS0_Pf
	.cfi_endproc
.LFE2446:
	.size	_Z7dropoutifPKfS0_Pf, .-_Z7dropoutifPKfS0_Pf
	.globl	_dropout
	.type	_dropout, @function
_dropout:
.LFB2305:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movl	$1, %ecx
	movss	%xmm0, 12(%rsp)
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L353
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r13d, %edi
	call	_Z34__device_stub__Z7dropoutifPKfS0_PfifPKfS0_Pf
.L353:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2305:
	.size	_dropout, .-_dropout
	.globl	_Z35__device_stub__Z9maskZerosiPKfS0_PfiPKfS0_Pf
	.type	_Z35__device_stub__Z9maskZerosiPKfS0_PfiPKfS0_Pf, @function
_Z35__device_stub__Z9maskZerosiPKfS0_PfiPKfS0_Pf:
.LFB2447:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	64(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	40(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 40(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L355
	pushq	56(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9maskZerosiPKfS0_Pf(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 160
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L355:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L357
	call	__stack_chk_fail@PLT
.L357:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2447:
	.size	_Z35__device_stub__Z9maskZerosiPKfS0_PfiPKfS0_Pf, .-_Z35__device_stub__Z9maskZerosiPKfS0_PfiPKfS0_Pf
	.globl	_Z9maskZerosiPKfS0_Pf
	.type	_Z9maskZerosiPKfS0_Pf, @function
_Z9maskZerosiPKfS0_Pf:
.LFB2448:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z9maskZerosiPKfS0_PfiPKfS0_Pf
	.cfi_endproc
.LFE2448:
	.size	_Z9maskZerosiPKfS0_Pf, .-_Z9maskZerosiPKfS0_Pf
	.globl	_maskZeros
	.type	_maskZeros, @function
_maskZeros:
.LFB2303:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L361
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r13d, %edi
	call	_Z35__device_stub__Z9maskZerosiPKfS0_PfiPKfS0_Pf
.L361:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2303:
	.size	_maskZeros, .-_maskZeros
	.globl	_Z39__device_stub__Z12addMaskZerosiPKfS0_PfiPKfS0_Pf
	.type	_Z39__device_stub__Z12addMaskZerosiPKfS0_PfiPKfS0_Pf, @function
_Z39__device_stub__Z12addMaskZerosiPKfS0_PfiPKfS0_Pf:
.LFB2449:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	64(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	40(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 40(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L363
	pushq	56(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12addMaskZerosiPKfS0_Pf(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 160
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L363:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L365
	call	__stack_chk_fail@PLT
.L365:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2449:
	.size	_Z39__device_stub__Z12addMaskZerosiPKfS0_PfiPKfS0_Pf, .-_Z39__device_stub__Z12addMaskZerosiPKfS0_PfiPKfS0_Pf
	.globl	_Z12addMaskZerosiPKfS0_Pf
	.type	_Z12addMaskZerosiPKfS0_Pf, @function
_Z12addMaskZerosiPKfS0_Pf:
.LFB2450:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z12addMaskZerosiPKfS0_PfiPKfS0_Pf
	.cfi_endproc
.LFE2450:
	.size	_Z12addMaskZerosiPKfS0_Pf, .-_Z12addMaskZerosiPKfS0_Pf
	.globl	_addMaskZeros
	.type	_addMaskZeros, @function
_addMaskZeros:
.LFB2304:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L369
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r13d, %edi
	call	_Z39__device_stub__Z12addMaskZerosiPKfS0_PfiPKfS0_Pf
.L369:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2304:
	.size	_addMaskZeros, .-_addMaskZeros
	.globl	_Z50__device_stub__Z20assignMaskedAdditioniPKfS0_S0_PfiPKfS0_S0_Pf
	.type	_Z50__device_stub__Z20assignMaskedAdditioniPKfS0_S0_PfiPKfS0_S0_Pf, @function
_Z50__device_stub__Z20assignMaskedAdditioniPKfS0_S0_PfiPKfS0_S0_Pf:
.LFB2451:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 12(%rsp)
	leaq	72(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	48(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 40(%rsp)
	leaq	64(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 48(%rsp)
	movq	%rax, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L371
	pushq	64(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z20assignMaskedAdditioniPKfS0_S0_Pf(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 176
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L371:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L373
	call	__stack_chk_fail@PLT
.L373:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2451:
	.size	_Z50__device_stub__Z20assignMaskedAdditioniPKfS0_S0_PfiPKfS0_S0_Pf, .-_Z50__device_stub__Z20assignMaskedAdditioniPKfS0_S0_PfiPKfS0_S0_Pf
	.globl	_Z20assignMaskedAdditioniPKfS0_S0_Pf
	.type	_Z20assignMaskedAdditioniPKfS0_S0_Pf, @function
_Z20assignMaskedAdditioniPKfS0_S0_Pf:
.LFB2452:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z20assignMaskedAdditioniPKfS0_S0_PfiPKfS0_S0_Pf
	.cfi_endproc
.LFE2452:
	.size	_Z20assignMaskedAdditioniPKfS0_S0_Pf, .-_Z20assignMaskedAdditioniPKfS0_S0_Pf
	.globl	_assignMaskedAddition
	.type	_assignMaskedAddition, @function
_assignMaskedAddition:
.LFB2306:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%r9, %r13
	movq	%rdi, %r9
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L377
	movq	%r13, %r8
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r14d, %edi
	call	_Z50__device_stub__Z20assignMaskedAdditioniPKfS0_S0_PfiPKfS0_S0_Pf
.L377:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2306:
	.size	_assignMaskedAddition, .-_assignMaskedAddition
	.globl	_Z68__device_stub__Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_PfiiPKfS0_S0_Pf
	.type	_Z68__device_stub__Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_PfiiPKfS0_S0_Pf, @function
_Z68__device_stub__Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_PfiiPKfS0_S0_Pf:
.LFB2453:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 12(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	76(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 16(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 32(%rsp)
	movq	%r9, 40(%rsp)
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L379
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L379:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L381
	call	__stack_chk_fail@PLT
.L381:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2453:
	.size	_Z68__device_stub__Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_PfiiPKfS0_S0_Pf, .-_Z68__device_stub__Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_PfiiPKfS0_S0_Pf
	.globl	_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
	.type	_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf, @function
_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf:
.LFB2454:
	.cfi_startproc
	endbr64
	jmp	_Z68__device_stub__Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_PfiiPKfS0_S0_Pf
	.cfi_endproc
.LFE2454:
	.size	_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf, .-_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
	.globl	_assignMaskedAdditionColumnBroadcasted
	.type	_assignMaskedAdditionColumnBroadcasted, @function
_assignMaskedAdditionColumnBroadcasted:
.LFB2307:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edx, %r15d
	imull	%edx, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r9, %r12
	movq	%rdi, %r9
	decl	%eax
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r8, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	cltd
	movq	%rcx, %rbx
	movl	$512, %ecx
	idivl	%ecx
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	$1, %ecx
	movq	96(%rsp), %r13
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L385
	movq	%r13, %r9
	movq	%r12, %r8
	movq	%rbp, %rcx
	movq	%rbx, %rdx
	movl	%r15d, %esi
	movl	%r14d, %edi
	call	_Z68__device_stub__Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_PfiiPKfS0_S0_Pf
.L385:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2307:
	.size	_assignMaskedAdditionColumnBroadcasted, .-_assignMaskedAdditionColumnBroadcasted
	.globl	_Z47__device_stub__Z20addHprodOneMinusMaskiPKfS0_PfiPKfS0_Pf
	.type	_Z47__device_stub__Z20addHprodOneMinusMaskiPKfS0_PfiPKfS0_Pf, @function
_Z47__device_stub__Z20addHprodOneMinusMaskiPKfS0_PfiPKfS0_Pf:
.LFB2455:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	64(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	40(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 40(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L387
	pushq	56(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z20addHprodOneMinusMaskiPKfS0_Pf(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 160
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L387:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L389
	call	__stack_chk_fail@PLT
.L389:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2455:
	.size	_Z47__device_stub__Z20addHprodOneMinusMaskiPKfS0_PfiPKfS0_Pf, .-_Z47__device_stub__Z20addHprodOneMinusMaskiPKfS0_PfiPKfS0_Pf
	.globl	_Z20addHprodOneMinusMaskiPKfS0_Pf
	.type	_Z20addHprodOneMinusMaskiPKfS0_Pf, @function
_Z20addHprodOneMinusMaskiPKfS0_Pf:
.LFB2456:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z20addHprodOneMinusMaskiPKfS0_PfiPKfS0_Pf
	.cfi_endproc
.LFE2456:
	.size	_Z20addHprodOneMinusMaskiPKfS0_Pf, .-_Z20addHprodOneMinusMaskiPKfS0_Pf
	.globl	_addHprodOneMinusMask
	.type	_addHprodOneMinusMask, @function
_addHprodOneMinusMask:
.LFB2308:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L393
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r13d, %edi
	call	_Z47__device_stub__Z20addHprodOneMinusMaskiPKfS0_PfiPKfS0_Pf
.L393:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2308:
	.size	_addHprodOneMinusMask, .-_addHprodOneMinusMask
	.globl	_Z65__device_stub__Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_PfiiPKfS0_Pf
	.type	_Z65__device_stub__Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_PfiiPKfS0_Pf, @function
_Z65__device_stub__Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_PfiiPKfS0_Pf:
.LFB2457:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	68(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 32(%rsp)
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L395
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L395:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L397
	call	__stack_chk_fail@PLT
.L397:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2457:
	.size	_Z65__device_stub__Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_PfiiPKfS0_Pf, .-_Z65__device_stub__Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_PfiiPKfS0_Pf
	.globl	_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
	.type	_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf, @function
_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf:
.LFB2458:
	.cfi_startproc
	endbr64
	jmp	_Z65__device_stub__Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_PfiiPKfS0_Pf
	.cfi_endproc
.LFE2458:
	.size	_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf, .-_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
	.globl	_addHprodOneMinusMaskColumnBroadcasted
	.type	_addHprodOneMinusMaskColumnBroadcasted, @function
_addHprodOneMinusMaskColumnBroadcasted:
.LFB2309:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%edx, %r14d
	imull	%edx, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r9, %r12
	movq	%rdi, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%r8, %rbp
	decl	%eax
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rcx, %rbx
	movl	$512, %ecx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L401
	movq	%r12, %r8
	movq	%rbp, %rcx
	movq	%rbx, %rdx
	movl	%r14d, %esi
	movl	%r13d, %edi
	call	_Z65__device_stub__Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_PfiiPKfS0_Pf
.L401:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2309:
	.size	_addHprodOneMinusMaskColumnBroadcasted, .-_addHprodOneMinusMaskColumnBroadcasted
	.globl	_Z51__device_stub__Z23matrixVectorColumnHprodiiPKfS0_PfiiPKfS0_Pf
	.type	_Z51__device_stub__Z23matrixVectorColumnHprodiiPKfS0_PfiiPKfS0_Pf, @function
_Z51__device_stub__Z23matrixVectorColumnHprodiiPKfS0_PfiiPKfS0_Pf:
.LFB2459:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	68(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 32(%rsp)
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L403
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z23matrixVectorColumnHprodiiPKfS0_Pf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L403:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L405
	call	__stack_chk_fail@PLT
.L405:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2459:
	.size	_Z51__device_stub__Z23matrixVectorColumnHprodiiPKfS0_PfiiPKfS0_Pf, .-_Z51__device_stub__Z23matrixVectorColumnHprodiiPKfS0_PfiiPKfS0_Pf
	.globl	_Z23matrixVectorColumnHprodiiPKfS0_Pf
	.type	_Z23matrixVectorColumnHprodiiPKfS0_Pf, @function
_Z23matrixVectorColumnHprodiiPKfS0_Pf:
.LFB2460:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z23matrixVectorColumnHprodiiPKfS0_PfiiPKfS0_Pf
	.cfi_endproc
.LFE2460:
	.size	_Z23matrixVectorColumnHprodiiPKfS0_Pf, .-_Z23matrixVectorColumnHprodiiPKfS0_Pf
	.globl	_matrixVectorColumnHprod
	.type	_matrixVectorColumnHprod, @function
_matrixVectorColumnHprod:
.LFB2352:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%edx, %r14d
	imull	%edx, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r9, %r12
	movq	%rdi, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%r8, %rbp
	decl	%eax
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rcx, %rbx
	movl	$512, %ecx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L409
	movq	%r12, %r8
	movq	%rbp, %rcx
	movq	%rbx, %rdx
	movl	%r14d, %esi
	movl	%r13d, %edi
	call	_Z51__device_stub__Z23matrixVectorColumnHprodiiPKfS0_PfiiPKfS0_Pf
.L409:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2352:
	.size	_matrixVectorColumnHprod, .-_matrixVectorColumnHprod
	.globl	_Z49__device_stub__Z24maskColumnNumbersRowWiseiiPKiPfiiPKiPf
	.type	_Z49__device_stub__Z24maskColumnNumbersRowWiseiiPKiPfiiPKiPf, @function
_Z49__device_stub__Z24maskColumnNumbersRowWiseiiPKiPfiiPKiPf:
.LFB2461:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	60(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rax, 72(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L411
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z24maskColumnNumbersRowWiseiiPKiPf(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L411:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L413
	call	__stack_chk_fail@PLT
.L413:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2461:
	.size	_Z49__device_stub__Z24maskColumnNumbersRowWiseiiPKiPfiiPKiPf, .-_Z49__device_stub__Z24maskColumnNumbersRowWiseiiPKiPfiiPKiPf
	.globl	_Z24maskColumnNumbersRowWiseiiPKiPf
	.type	_Z24maskColumnNumbersRowWiseiiPKiPf, @function
_Z24maskColumnNumbersRowWiseiiPKiPf:
.LFB2462:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z24maskColumnNumbersRowWiseiiPKiPfiiPKiPf
	.cfi_endproc
.LFE2462:
	.size	_Z24maskColumnNumbersRowWiseiiPKiPf, .-_Z24maskColumnNumbersRowWiseiiPKiPf
	.globl	_maskColumnNumbersRowWise
	.type	_maskColumnNumbersRowWise, @function
_maskColumnNumbersRowWise:
.LFB2302:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%edx, %r13d
	movq	%rdi, %r9
	imull	%edx, %eax
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%r8, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rcx, %rbx
	movl	$512, %ecx
	decl	%eax
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L417
	movq	%rbp, %rcx
	movq	%rbx, %rdx
	movl	%r13d, %esi
	movl	%r12d, %edi
	call	_Z49__device_stub__Z24maskColumnNumbersRowWiseiiPKiPfiiPKiPf
.L417:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2302:
	.size	_maskColumnNumbersRowWise, .-_maskColumnNumbersRowWise
	.globl	_Z52__device_stub__Z20batchHorizontalStackiiiiPPKfS1_PPfiiiiPPKfS1_PPf
	.type	_Z52__device_stub__Z20batchHorizontalStackiiiiPPKfS1_PPfiiiiPPKfS1_PPf, @function
_Z52__device_stub__Z20batchHorizontalStackiiiiPPKfS1_PPfiiiiPPKfS1_PPf:
.LFB2463:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	176(%rsp), %rax
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 36(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 32(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L419
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z20batchHorizontalStackiiiiPPKfS1_PPf(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L419:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L421
	call	__stack_chk_fail@PLT
.L421:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2463:
	.size	_Z52__device_stub__Z20batchHorizontalStackiiiiPPKfS1_PPfiiiiPPKfS1_PPf, .-_Z52__device_stub__Z20batchHorizontalStackiiiiPPKfS1_PPfiiiiPPKfS1_PPf
	.globl	_Z20batchHorizontalStackiiiiPPKfS1_PPf
	.type	_Z20batchHorizontalStackiiiiPPKfS1_PPf, @function
_Z20batchHorizontalStackiiiiPPKfS1_PPf:
.LFB2464:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z20batchHorizontalStackiiiiPPKfS1_PPfiiiiPPKfS1_PPf
	.cfi_endproc
.LFE2464:
	.size	_Z20batchHorizontalStackiiiiPPKfS1_PPf, .-_Z20batchHorizontalStackiiiiPPKfS1_PPf
	.globl	_batchHorizontalStack
	.type	_batchHorizontalStack, @function
_batchHorizontalStack:
.LFB2301:
	.cfi_startproc
	endbr64
	leal	(%r8,%rcx), %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r8d, %r15d
	imull	%edx, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	movl	$512, %ecx
	imull	%esi, %eax
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	decl	%eax
	cltd
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	idivl	%ecx
	movq	%r9, 8(%rsp)
	movq	112(%rsp), %r14
	movq	120(%rsp), %r13
	movl	$128, %edx
	movq	%rdi, %r9
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L425
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	%r15d, %ecx
	movl	%r12d, %edx
	movq	%r14, %r9
	pushq	%r13
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %r8
	movl	%ebp, %esi
	movl	%ebx, %edi
	call	_Z52__device_stub__Z20batchHorizontalStackiiiiPPKfS1_PPfiiiiPPKfS1_PPf
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L425:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2301:
	.size	_batchHorizontalStack, .-_batchHorizontalStack
	.globl	_Z52__device_stub__Z20batchHorizontalSplitiiiiPPKfPPfS3_iiiiPPKfPPfS3_
	.type	_Z52__device_stub__Z20batchHorizontalSplitiiiiPPKfPPfS3_iiiiPPKfPPfS3_, @function
_Z52__device_stub__Z20batchHorizontalSplitiiiiPPKfPPfS3_iiiiPPKfPPfS3_:
.LFB2465:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	176(%rsp), %rax
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 36(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 32(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L427
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z20batchHorizontalSplitiiiiPPKfPPfS3_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L427:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L429
	call	__stack_chk_fail@PLT
.L429:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2465:
	.size	_Z52__device_stub__Z20batchHorizontalSplitiiiiPPKfPPfS3_iiiiPPKfPPfS3_, .-_Z52__device_stub__Z20batchHorizontalSplitiiiiPPKfPPfS3_iiiiPPKfPPfS3_
	.globl	_Z20batchHorizontalSplitiiiiPPKfPPfS3_
	.type	_Z20batchHorizontalSplitiiiiPPKfPPfS3_, @function
_Z20batchHorizontalSplitiiiiPPKfPPfS3_:
.LFB2466:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z20batchHorizontalSplitiiiiPPKfPPfS3_iiiiPPKfPPfS3_
	.cfi_endproc
.LFE2466:
	.size	_Z20batchHorizontalSplitiiiiPPKfPPfS3_, .-_Z20batchHorizontalSplitiiiiPPKfPPfS3_
	.globl	_batchHorizontalSplit
	.type	_batchHorizontalSplit, @function
_batchHorizontalSplit:
.LFB2300:
	.cfi_startproc
	endbr64
	leal	(%r8,%rcx), %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r8d, %r15d
	imull	%edx, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	movl	$512, %ecx
	imull	%esi, %eax
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	decl	%eax
	cltd
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	idivl	%ecx
	movq	%r9, 8(%rsp)
	movq	112(%rsp), %r14
	movq	120(%rsp), %r13
	movl	$128, %edx
	movq	%rdi, %r9
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L433
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	%r15d, %ecx
	movl	%r12d, %edx
	movq	%r14, %r9
	pushq	%r13
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %r8
	movl	%ebp, %esi
	movl	%ebx, %edi
	call	_Z52__device_stub__Z20batchHorizontalSplitiiiiPPKfPPfS3_iiiiPPKfPPfS3_
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L433:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2300:
	.size	_batchHorizontalSplit, .-_batchHorizontalSplit
	.globl	_Z40__device_stub__Z14repeatAlongRowiiiPKfPfiiiPKfPf
	.type	_Z40__device_stub__Z14repeatAlongRowiiiPKfPfiiiPKfPf, @function
_Z40__device_stub__Z14repeatAlongRowiiiPKfPfiiiPKfPf:
.LFB2467:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 32(%rsp)
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L435
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14repeatAlongRowiiiPKfPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L435:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L437
	call	__stack_chk_fail@PLT
.L437:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2467:
	.size	_Z40__device_stub__Z14repeatAlongRowiiiPKfPfiiiPKfPf, .-_Z40__device_stub__Z14repeatAlongRowiiiPKfPfiiiPKfPf
	.globl	_Z14repeatAlongRowiiiPKfPf
	.type	_Z14repeatAlongRowiiiPKfPf, @function
_Z14repeatAlongRowiiiPKfPf:
.LFB2468:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z14repeatAlongRowiiiPKfPfiiiPKfPf
	.cfi_endproc
.LFE2468:
	.size	_Z14repeatAlongRowiiiPKfPf, .-_Z14repeatAlongRowiiiPKfPf
	.globl	_repeatAlongRow
	.type	_repeatAlongRow, @function
_repeatAlongRow:
.LFB2296:
	.cfi_startproc
	endbr64
	movl	%edx, %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%ecx, %r14d
	imull	%ecx, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	$512, %ecx
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r9, %r12
	movq	%rdi, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%r8, %rbp
	decl	%eax
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%esi, %ebx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L441
	movq	%r12, %r8
	movq	%rbp, %rcx
	movl	%r14d, %edx
	movl	%r13d, %esi
	movl	%ebx, %edi
	call	_Z40__device_stub__Z14repeatAlongRowiiiPKfPfiiiPKfPf
.L441:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2296:
	.size	_repeatAlongRow, .-_repeatAlongRow
	.globl	_Z53__device_stub__Z27addRepeatAlongRowDerivativeiPKfiiPfiPKfiiPf
	.type	_Z53__device_stub__Z27addRepeatAlongRowDerivativeiPKfiiPfiPKfiiPf, @function
_Z53__device_stub__Z27addRepeatAlongRowDerivativeiPKfiiPfiPKfiiPf:
.LFB2469:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movl	%edx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 32(%rsp)
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L443
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z27addRepeatAlongRowDerivativeiPKfiiPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L443:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L445
	call	__stack_chk_fail@PLT
.L445:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2469:
	.size	_Z53__device_stub__Z27addRepeatAlongRowDerivativeiPKfiiPfiPKfiiPf, .-_Z53__device_stub__Z27addRepeatAlongRowDerivativeiPKfiiPfiPKfiiPf
	.globl	_Z27addRepeatAlongRowDerivativeiPKfiiPf
	.type	_Z27addRepeatAlongRowDerivativeiPKfiiPf, @function
_Z27addRepeatAlongRowDerivativeiPKfiiPf:
.LFB2470:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z27addRepeatAlongRowDerivativeiPKfiiPfiPKfiiPf
	.cfi_endproc
.LFE2470:
	.size	_Z27addRepeatAlongRowDerivativeiPKfiiPf, .-_Z27addRepeatAlongRowDerivativeiPKfiiPf
	.globl	_addRepeatAlongRowDerivative
	.type	_addRepeatAlongRowDerivative, @function
_addRepeatAlongRowDerivative:
.LFB2297:
	.cfi_startproc
	endbr64
	movl	%ecx, %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%r8d, %r14d
	imull	%r8d, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%ecx, %r13d
	movl	$512, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r9, %r12
	movq	%rdi, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdx, %rbp
	decl	%eax
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%esi, %ebx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L449
	movq	%r12, %r8
	movl	%r14d, %ecx
	movl	%r13d, %edx
	movq	%rbp, %rsi
	movl	%ebx, %edi
	call	_Z53__device_stub__Z27addRepeatAlongRowDerivativeiPKfiiPfiPKfiiPf
.L449:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2297:
	.size	_addRepeatAlongRowDerivative, .-_addRepeatAlongRowDerivative
	.globl	_Z40__device_stub__Z14repeatAlongColiiiPKfPfiiiPKfPf
	.type	_Z40__device_stub__Z14repeatAlongColiiiPKfPfiiiPKfPf, @function
_Z40__device_stub__Z14repeatAlongColiiiPKfPfiiiPKfPf:
.LFB2471:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rcx, 24(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 32(%rsp)
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L451
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14repeatAlongColiiiPKfPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L451:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L453
	call	__stack_chk_fail@PLT
.L453:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2471:
	.size	_Z40__device_stub__Z14repeatAlongColiiiPKfPfiiiPKfPf, .-_Z40__device_stub__Z14repeatAlongColiiiPKfPfiiiPKfPf
	.globl	_Z14repeatAlongColiiiPKfPf
	.type	_Z14repeatAlongColiiiPKfPf, @function
_Z14repeatAlongColiiiPKfPf:
.LFB2472:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z14repeatAlongColiiiPKfPfiiiPKfPf
	.cfi_endproc
.LFE2472:
	.size	_Z14repeatAlongColiiiPKfPf, .-_Z14repeatAlongColiiiPKfPf
	.globl	_repeatAlongCol
	.type	_repeatAlongCol, @function
_repeatAlongCol:
.LFB2298:
	.cfi_startproc
	endbr64
	movl	%edx, %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%ecx, %r14d
	imull	%ecx, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	$512, %ecx
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r9, %r12
	movq	%rdi, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%r8, %rbp
	decl	%eax
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%esi, %ebx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L457
	movq	%r12, %r8
	movq	%rbp, %rcx
	movl	%r14d, %edx
	movl	%r13d, %esi
	movl	%ebx, %edi
	call	_Z40__device_stub__Z14repeatAlongColiiiPKfPfiiiPKfPf
.L457:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2298:
	.size	_repeatAlongCol, .-_repeatAlongCol
	.globl	_Z53__device_stub__Z27addRepeatAlongColDerivativeiPKfiiPfiPKfiiPf
	.type	_Z53__device_stub__Z27addRepeatAlongColDerivativeiPKfiiPfiPKfiiPf, @function
_Z53__device_stub__Z27addRepeatAlongColDerivativeiPKfiiPfiPKfiiPf:
.LFB2473:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movl	%edx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 32(%rsp)
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L459
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z27addRepeatAlongColDerivativeiPKfiiPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L459:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L461
	call	__stack_chk_fail@PLT
.L461:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2473:
	.size	_Z53__device_stub__Z27addRepeatAlongColDerivativeiPKfiiPfiPKfiiPf, .-_Z53__device_stub__Z27addRepeatAlongColDerivativeiPKfiiPfiPKfiiPf
	.globl	_Z27addRepeatAlongColDerivativeiPKfiiPf
	.type	_Z27addRepeatAlongColDerivativeiPKfiiPf, @function
_Z27addRepeatAlongColDerivativeiPKfiiPf:
.LFB2474:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z27addRepeatAlongColDerivativeiPKfiiPfiPKfiiPf
	.cfi_endproc
.LFE2474:
	.size	_Z27addRepeatAlongColDerivativeiPKfiiPf, .-_Z27addRepeatAlongColDerivativeiPKfiiPf
	.globl	_addRepeatAlongColDerivative
	.type	_addRepeatAlongColDerivative, @function
_addRepeatAlongColDerivative:
.LFB2299:
	.cfi_startproc
	endbr64
	movl	%ecx, %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%r8d, %r14d
	imull	%r8d, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%ecx, %r13d
	movl	$512, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r9, %r12
	movq	%rdi, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdx, %rbp
	decl	%eax
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%esi, %ebx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L465
	movq	%r12, %r8
	movl	%r14d, %ecx
	movl	%r13d, %edx
	movq	%rbp, %rsi
	movl	%ebx, %edi
	call	_Z53__device_stub__Z27addRepeatAlongColDerivativeiPKfiiPfiPKfiiPf
.L465:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2299:
	.size	_addRepeatAlongColDerivative, .-_addRepeatAlongColDerivative
	.globl	_Z45__device_stub__Z16addScaledDivSqrtifPKfS0_fPfifPKfS0_fPf
	.type	_Z45__device_stub__Z16addScaledDivSqrtifPKfS0_fPfifPKfS0_fPf, @function
_Z45__device_stub__Z16addScaledDivSqrtifPKfS0_fPfifPKfS0_fPf:
.LFB2475:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 12(%rsp)
	leaq	64(%rsp), %rdi
	movss	%xmm0, 8(%rsp)
	movss	%xmm1, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 40(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L467
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16addScaledDivSqrtifPKfS0_fPf(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L467:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L469
	call	__stack_chk_fail@PLT
.L469:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2475:
	.size	_Z45__device_stub__Z16addScaledDivSqrtifPKfS0_fPfifPKfS0_fPf, .-_Z45__device_stub__Z16addScaledDivSqrtifPKfS0_fPfifPKfS0_fPf
	.globl	_Z16addScaledDivSqrtifPKfS0_fPf
	.type	_Z16addScaledDivSqrtifPKfS0_fPf, @function
_Z16addScaledDivSqrtifPKfS0_fPf:
.LFB2476:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z16addScaledDivSqrtifPKfS0_fPfifPKfS0_fPf
	.cfi_endproc
.LFE2476:
	.size	_Z16addScaledDivSqrtifPKfS0_fPf, .-_Z16addScaledDivSqrtifPKfS0_fPf
	.globl	_addScaledDivSqrt
	.type	_addScaledDivSqrt, @function
_addScaledDivSqrt:
.LFB2295:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r9
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movl	$1, %ecx
	movss	%xmm0, 12(%rsp)
	movss	%xmm1, 8(%rsp)
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	8(%rsp), %xmm1
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L473
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r13d, %edi
	call	_Z45__device_stub__Z16addScaledDivSqrtifPKfS0_fPfifPKfS0_fPf
.L473:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2295:
	.size	_addScaledDivSqrt, .-_addScaledDivSqrt
	.globl	_Z29__device_stub__Z4clipiffPKfPfiffPKfPf
	.type	_Z29__device_stub__Z4clipiffPKfPfiffPKfPf, @function
_Z29__device_stub__Z4clipiffPKfPfiffPKfPf:
.LFB2477:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movss	%xmm0, 8(%rsp)
	movss	%xmm1, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L475
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z4clipiffPKfPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L475:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L477
	call	__stack_chk_fail@PLT
.L477:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2477:
	.size	_Z29__device_stub__Z4clipiffPKfPfiffPKfPf, .-_Z29__device_stub__Z4clipiffPKfPfiffPKfPf
	.globl	_Z4clipiffPKfPf
	.type	_Z4clipiffPKfPf, @function
_Z4clipiffPKfPf:
.LFB2478:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z4clipiffPKfPfiffPKfPf
	.cfi_endproc
.LFE2478:
	.size	_Z4clipiffPKfPf, .-_Z4clipiffPKfPf
	.globl	_clip
	.type	_clip, @function
_clip:
.LFB2294:
	.cfi_startproc
	endbr64
	leal	-1(%rsi), %eax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r9
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	movl	$512, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	cltd
	idivl	%ecx
	movl	$128, %edx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movl	$1, %ecx
	movss	%xmm0, 12(%rsp)
	movss	%xmm1, 8(%rsp)
	incl	%eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	$8388609, %edx
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movss	8(%rsp), %xmm1
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L481
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%r12d, %edi
	call	_Z29__device_stub__Z4clipiffPKfPfiffPKfPf
.L481:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	cudaGetLastError@PLT
	.cfi_endproc
.LFE2294:
	.size	_clip, .-_clip
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"_Z9sliceRowsIiEviPKiPKT_iiPS2_"
.LC2:
	.string	"_Z9sliceRowsIfEviPKiPKT_iiPS2_"
.LC3:
	.string	"_Z9transposeIiEviiPKT_PS0_"
.LC4:
	.string	"_Z9transposeIfEviiPKT_PS0_"
.LC5:
	.string	"_Z4clipiffPKfPf"
.LC6:
	.string	"_Z16addScaledDivSqrtifPKfS0_fPf"
.LC7:
	.string	"_Z27addRepeatAlongColDerivativeiPKfiiPf"
.LC8:
	.string	"_Z14repeatAlongColiiiPKfPf"
.LC9:
	.string	"_Z27addRepeatAlongRowDerivativeiPKfiiPf"
.LC10:
	.string	"_Z14repeatAlongRowiiiPKfPf"
.LC11:
	.string	"_Z20batchHorizontalSplitiiiiPPKfPPfS3_"
.LC12:
	.string	"_Z20batchHorizontalStackiiiiPPKfS1_PPf"
.LC13:
	.string	"_Z24maskColumnNumbersRowWiseiiPKiPf"
.LC14:
	.string	"_Z23matrixVectorColumnHprodiiPKfS0_Pf"
.LC15:
	.string	"_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf"
.LC16:
	.string	"_Z20addHprodOneMinusMaskiPKfS0_Pf"
.LC17:
	.string	"_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf"
.LC18:
	.string	"_Z20assignMaskedAdditioniPKfS0_S0_Pf"
.LC19:
	.string	"_Z12addMaskZerosiPKfS0_Pf"
.LC20:
	.string	"_Z9maskZerosiPKfS0_Pf"
.LC21:
	.string	"_Z7dropoutifPKfS0_Pf"
.LC22:
	.string	"_Z16addAttentionTileiiPKfS0_S0_S0_iPPf"
.LC23:
	.string	"_Z22addAttentionDerivativeiiPPKfS0_iPf"
.LC24:
	.string	"_Z13assignDLDpreaiiPPKfS0_S0_iPf"
.LC25:
	.string	"_Z16sequentiallyTileiPKfPPfi"
.LC26:
	.string	"_Z27assignSequentialWeightedSumiiPPKfS0_iPf"
.LC27:
	.string	"_Z26assignSequentialSumPoolingiiPPKfiPf"
.LC28:
	.string	"_Z27assignSequentialMeanPoolingiiPPKfiPf"
.LC29:
	.string	"_Z22addSoftmaxCeDerivativeiiPKfPKiPf"
.LC30:
	.string	"_Z19softmaxCeDerivativeiiPKfPKiPf"
.LC31:
	.string	"_Z20addScaledSubtractionifPKfS0_Pf"
.LC32:
	.string	"_Z23assignScaledSubtractionifPKfS0_Pf"
.LC33:
	.string	"_Z20assignScaledAdditionifPKfS0_Pf"
.LC34:
	.string	"_Z23matrixVectorRowAdditioniiPKffS0_Pf"
.LC35:
	.string	"_Z10maskedFillifPKffPf"
.LC36:
	.string	"_Z4fillifPf"
.LC37:
	.string	"_Z5scaleiPKffPf"
.LC38:
	.string	"_Z6addSumiPPKfiPf"
.LC39:
	.string	"_Z9assignSumiPPKfiPf"
.LC40:
	.string	"_Z18addScaledRowsSliceiifPKfPKiiPf"
.LC41:
	.string	"_Z21addScaledColumnsSliceiifPKfPKiPf"
.LC42:
	.string	"_Z24addScaledHadamardProductiPKfS0_ffPf"
.LC43:
	.string	"_Z18addHadamardProductiPKfS0_S0_fPf"
.LC44:
	.string	"_Z18addHadamardProductiPKfS0_fPf"
.LC45:
	.string	"_Z15hadamardProductiPKfS0_S0_Pf"
.LC46:
	.string	"_Z15hadamardProductiPKfS0_Pf"
.LC47:
	.string	"_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf"
.LC48:
	.string	"_Z8sumHprodiPKfS0_S0_S0_S0_Pf"
.LC49:
	.string	"_Z8sumHprodiPKfS0_S0_S0_Pf"
.LC50:
	.string	"_Z8hprodSumiiPKfS0_Pf"
.LC51:
	.string	"_Z12columnArgmaxiiPKfPi"
.LC52:
	.string	"_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf"
.LC53:
	.string	"_Z14sliceRowsBatchPKiiiPKfiiPrPf"
.LC54:
	.string	"_Z24sliceColumnsAndTransposeiiPKiPKfPf"
.LC55:
	.string	"_Z12sliceColumnsiiPKiPKfPf"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2488:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9sliceRowsIiEviPKiPKT_iiPS2_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9sliceRowsIfEviPKiPKT_iiPS2_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9transposeIiEviiPKT_PS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9transposeIfEviiPKT_PS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z4clipiffPKfPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16addScaledDivSqrtifPKfS0_fPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z27addRepeatAlongColDerivativeiPKfiiPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14repeatAlongColiiiPKfPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC9(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z27addRepeatAlongRowDerivativeiPKfiiPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14repeatAlongRowiiiPKfPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20batchHorizontalSplitiiiiPPKfPPfS3_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20batchHorizontalStackiiiiPPKfS1_PPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z24maskColumnNumbersRowWiseiiPKiPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z23matrixVectorColumnHprodiiPKfS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20addHprodOneMinusMaskiPKfS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC17(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20assignMaskedAdditioniPKfS0_S0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12addMaskZerosiPKfS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9maskZerosiPKfS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7dropoutifPKfS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC22(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16addAttentionTileiiPKfS0_S0_S0_iPPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC23(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z22addAttentionDerivativeiiPPKfS0_iPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC24(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13assignDLDpreaiiPPKfS0_S0_iPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC25(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z16sequentiallyTileiPKfPPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC26(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z27assignSequentialWeightedSumiiPPKfS0_iPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC27(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z26assignSequentialSumPoolingiiPPKfiPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC28(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z27assignSequentialMeanPoolingiiPPKfiPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC29(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z22addSoftmaxCeDerivativeiiPKfPKiPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC30(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z19softmaxCeDerivativeiiPKfPKiPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC31(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20addScaledSubtractionifPKfS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC32(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z23assignScaledSubtractionifPKfS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC33(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z20assignScaledAdditionifPKfS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC34(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z23matrixVectorRowAdditioniiPKffS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC35(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10maskedFillifPKffPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC36(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z4fillifPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC37(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z5scaleiPKffPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC38(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z6addSumiPPKfiPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC39(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9assignSumiPPKfiPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC40(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z18addScaledRowsSliceiifPKfPKiiPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC41(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z21addScaledColumnsSliceiifPKfPKiPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC42(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z24addScaledHadamardProductiPKfS0_ffPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC43(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z18addHadamardProductiPKfS0_S0_fPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC44(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z18addHadamardProductiPKfS0_fPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC45(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15hadamardProductiPKfS0_S0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC46(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15hadamardProductiPKfS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC47(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC48(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z8sumHprodiPKfS0_S0_S0_S0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC49(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	movq	%rdx, %rcx
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z8sumHprodiPKfS0_S0_S0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC50(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8hprodSumiiPKfS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC51(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12columnArgmaxiiPKfPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC52(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC53(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14sliceRowsBatchPKiiiPKfiiPrPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC54(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z24sliceColumnsAndTransposeiiPKiPKfPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC55(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12sliceColumnsiiPKiPKfPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2488:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*-
 * Copyright 2015 Grammarly, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
#include <algorithm>
#include <hip/hip_runtime.h>


#define MAX_NUM_THREADS_PER_BLOCK 512
#define MAX_NUM_BLOCKS_PER_KERNEL 128
#define FLT_MAX 3.402823466E+38F


__global__  void sliceColumns(int nrows,
                              int ncols,
                              const int* __restrict__ embedding_column_indxs,
                              const float* __restrict__ embedding_matrix,
                              float* __restrict__ dense_matrix) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int dense_column_idx;
    int row_idx;
    int embedding_offset;
    for (int i = start_i; i < nelems; i += nthreads) {
        dense_column_idx = i / nrows;
        row_idx = i % nrows;
        embedding_offset = embedding_column_indxs[dense_column_idx] * nrows + row_idx;
        dense_matrix[i] = embedding_matrix[embedding_offset];
    }
}


__global__  void sliceColumnsAndTranspose(int nrows,
                                          int ncols,
                                          const int* __restrict__ embedding_column_indxs,
                                          const float* __restrict__ embedding_matrix,
                                          float* __restrict__ dense_matrix) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;
    int dense_row_idx;
    int dense_col_idx;
    int dense_offset;
    int embedding_offset;
    for (int i = start_i; i < nelems; i += nthreads) {
        dense_row_idx = i / ncols;
        dense_col_idx = i % ncols;
        dense_offset = dense_col_idx * nrows + dense_row_idx;
        embedding_offset = embedding_column_indxs[dense_row_idx] * ncols + dense_col_idx;
        dense_matrix[dense_offset] = embedding_matrix[embedding_offset];
    }
}


template <typename T>
__global__  void sliceRows(int embedding_matrix_nrows,
                           const int* __restrict__ embedding_row_indxs,
                           const T* __restrict__ embedding_matrix,
                           int nrows,
                           int ncols,
                           T* __restrict__ dense_matrix) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int dense_column_idx;
    int row_idx;
    int embedding_offset;
    for (int i = start_i; i < nelems; i += nthreads) {
        dense_column_idx = i / nrows;
        row_idx = i % nrows;
        embedding_offset = dense_column_idx * embedding_matrix_nrows + embedding_row_indxs[row_idx];
        dense_matrix[i] = embedding_matrix[embedding_offset];
    }
}


__global__  void sliceRowsBatch(const int* embd_rows_indxs,
                                int nrows,
                                int ncols,
                                const float* __restrict__ embd_matrix,
                                int embd_nrows,
                                int embd_ncols,
                                float* __restrict__ dense_matrices[]) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * embd_ncols;
    const int total_nelems = nelems * ncols;

    int k, dense_offset, embd_row_idx, embd_col_idx, embd_offset;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        k = i / nelems;
        dense_offset = i % nelems;
        embd_row_idx = embd_rows_indxs[k * nrows + i % nrows];
        embd_col_idx = dense_offset / nrows;
        embd_offset = embd_col_idx * embd_nrows + embd_row_idx;
        dense_matrices[k][dense_offset] = embd_matrix[embd_offset];
    }
}


__global__  void slicedRowsBatchScaledAdd(const int* embd_rows_indxs,
                                          int nrows,
                                          int ncols,
                                          float alpha,
                                          const float* __restrict__ dense_matrices[],
                                          int embd_nrows,
                                          int embd_ncols,
                                          float* __restrict__ embd_matrix) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * embd_ncols;
    const int total_nelems = nelems * ncols;

    int k, dense_offset, embd_row_idx, embd_col_idx, embd_offset;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        k = i / nelems;
        dense_offset = i % nelems;
        embd_row_idx = embd_rows_indxs[k * nrows + i % nrows];
        embd_col_idx = dense_offset / nrows;
        embd_offset = embd_col_idx * embd_nrows + embd_row_idx;
        atomicAdd(embd_matrix + embd_offset, alpha * dense_matrices[k][dense_offset]);
    }
}


__global__ void columnArgmax(int nrows,
                             int ncols,
                             const float* __restrict__ a,
                             int* __restrict__ indxs) {
    __shared__ float maxVals[32];
    __shared__ int maxIndxs[32];
    float max_val = -FLT_MAX;
    int max_idx = 0;
    float val = 0;
    for (int i = threadIdx.x; i < ncols; i += 32) {
        val = a[blockIdx.x + i * nrows];
        if (val > max_val) {
            max_val = val;
            max_idx = i;
        }
    }
    maxVals[threadIdx.x] = max_val;
    maxIndxs[threadIdx.x] = max_idx;
    __syncthreads();

    if (threadIdx.x == 0) {
        max_val = -FLT_MAX;
        max_idx = 0;
        for (int i = 0; i < 32; i++)
            if (maxVals[i] > max_val) {
                max_val = maxVals[i];
                max_idx = maxIndxs[i];
            }
        indxs[blockIdx.x] = max_idx;
    }
}


__global__ void hprodSum(int nelems,
                         int nrows,
                         const float* __restrict__ A,
                         const float* __restrict__ B,
                         float* __restrict__ C) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        atomicAdd(C + i % nrows, A[i] * B[i]);
    }
}


__global__ void sumHprod(int nelems,
                         const float* __restrict__ A,
                         const float* __restrict__ B,
                         const float* __restrict__ C,
                         const float* __restrict__ D,
                         float* __restrict__ E) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        E[i] = A[i] * B[i] + C[i] * D[i];
    }
}


__global__ void sumHprod(int nelems,
                         const float* __restrict__ A,
                         const float* __restrict__ B,
                         const float* __restrict__ C,
                         const float* __restrict__ D,
                         const float* __restrict__ E,
                         float* __restrict__ F) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        F[i] = A[i] * B[i] * C[i] + D[i] * E[i];
    }
}


__global__ void sumHprod(int nelems,
                         const float* __restrict__ A,
                         const float* __restrict__ B,
                         const float* __restrict__ C,
                         const float* __restrict__ D,
                         const float* __restrict__ E,
                         const float* __restrict__ F,
                         const float* __restrict__ G,
                         const float* __restrict__ H,
                         const float* __restrict__ I,
                         const float* __restrict__ J,
                         const float* __restrict__ K,
                         float* __restrict__ L) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        L[i] = A[i] * B[i] * C[i] + D[i] * E[i] + F[i] * G[i] + H[i] * I[i] + J[i] * K[i];
    }
}


__global__  void hadamardProduct(int nelems,
                                 const float* __restrict__ a,
                                 const float* __restrict__ b,
                                 float* __restrict__ c) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        c[i] = a[i] * b[i];
    }
}


__global__  void hadamardProduct(int nelems,
                                 const float* __restrict__ a,
                                 const float* __restrict__ b,
                                 const float* __restrict__ c,
                                 float* __restrict__ d) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        d[i] = a[i] * b[i] * c[i];
    }
}


__global__  void addHadamardProduct(int nelems,
                                    const float* __restrict__ a,
                                    const float* __restrict__ b,
                                    float alpha,
                                    float* __restrict__ c) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        c[i] = a[i] * b[i] + alpha * c[i];
    }
}


__global__  void addHadamardProduct(int nelems,
                                    const float* __restrict__ a,
                                    const float* __restrict__ b,
                                    const float* __restrict__ c,
                                    float alpha,
                                    float* __restrict__ d) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        d[i] = a[i] * b[i] * c[i] + alpha * d[i];
    }
}


__global__  void addScaledHadamardProduct(int nelems,
                                          const float* __restrict__ a,
                                          const float* __restrict__ b,
                                          float alpha,
                                          float beta,
                                          float* __restrict__ c) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        c[i] = alpha * c[i] + beta * a[i] * b[i];
    }
}



__global__  void addScaledColumnsSlice(int nrows,
                                       int ncols,
                                       float alpha,
                                       const float* __restrict__ dense_matrix,
                                       const int* __restrict__ embedding_column_indxs,
                                       float* __restrict__ embedding_matrix) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int dense_column_idx;
    int row_idx;
    int embedding_offset;
    for (int i = start_i; i < nelems; i += nthreads) {
        dense_column_idx = i / nrows;
        row_idx = i % nrows;
        embedding_offset = embedding_column_indxs[dense_column_idx] * nrows + row_idx;
        atomicAdd(embedding_matrix + embedding_offset, alpha * dense_matrix[i]);
    }
}


__global__  void addScaledRowsSlice(int nrows,
                                    int ncols,
                                    float alpha,
                                    const float* __restrict__ dense_matrix,
                                    const int* __restrict__ embedding_row_indxs,
                                    int embd_nrows,
                                    float* __restrict__ embedding_matrix) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int embd_col_idx;
    int embd_row_idx;
    int embd_offset;
    for (int i = start_i; i < nelems; i += nthreads) {
        embd_row_idx = embedding_row_indxs[i % nrows];
        embd_col_idx = i / nrows;
        embd_offset = embd_col_idx * embd_nrows + embd_row_idx;
        atomicAdd(embedding_matrix + embd_offset, alpha * dense_matrix[i]);
    }
}


__global__ void assignSum(int nelems,
                          const float* matrices[],
                          int n,
                          float* __restrict__ s) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        s[i] = 0.0f;
        for (int k = 0; k < n; k++) {
            s[i] += matrices[k][i];
        }
    }
}


__global__ void addSum(int nelems,
                       const float* matrices[],
                       int n,
                       float* __restrict__ s) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        for (int k = 0; k < n; k++) {
            s[i] += matrices[k][i];
        }
    }
}


__global__ void scale(int nelems,
                      const float* __restrict__ data,
                      float alpha,
                      float* __restrict__ out_data) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out_data[i] = alpha * data[i];
    }
}


__global__ void fill(int nelems,
                     float value,
                     float* __restrict__ out_data) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out_data[i] = value;
    }
}


__global__ void maskedFill(int nelems,
                           float value,
                           const float* __restrict__ mask,
                           float true_value,
                           float* __restrict__ out_data) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out_data[i] = (mask[i] == true_value) * value +
                      (mask[i] != true_value) * out_data[i];
    }
}


__global__ void matrixVectorRowAddition(int nrows,
                                        int ncols,
                                        const float* __restrict__ matrix,
                                        float alpha,
                                        const float* __restrict__ vector,
                                        float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = matrix[i] + alpha * vector[i / nrows];
    }
}


__global__ void assignScaledAddition(int nelems,
                                     float alpha,
                                     const float* __restrict__ a,
                                     const float* __restrict__ b,
                                     float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = alpha * (a[i] + b[i]);
    }
}


__global__ void assignScaledSubtraction(int nelems,
                                        float alpha,
                                        const float* __restrict__ a,
                                        const float* __restrict__ b,
                                        float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = alpha * (a[i] - b[i]);
    }
}


__global__ void addScaledSubtraction(int nelems,
                                     float alpha,
                                     const float* __restrict__ a,
                                     const float* __restrict__ b,
                                     float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] += alpha * (a[i] - b[i]);
    }
}


__global__ void softmaxCeDerivative(int batchSize,
                                    int numClasses,
                                    const float* __restrict__ probs,
                                    const int* __restrict__ targetClasses,
                                    float* __restrict__ derivatives) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = batchSize * numClasses;

    for (int i = start_i; i < nelems; i += nthreads) {
        derivatives[i] = (probs[i] - (i / batchSize == targetClasses[i % batchSize])) / batchSize;
    }
}


__global__ void addSoftmaxCeDerivative(int batchSize,
                                       int numClasses,
                                       const float* __restrict__ probs,
                                       const int* __restrict__ targetClasses,
                                       float* __restrict__ derivatives) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = batchSize * numClasses;

    for (int i = start_i; i < nelems; i += nthreads) {
        derivatives[i] += (probs[i] - (i / batchSize == targetClasses[i % batchSize])) / batchSize;
    }
}



__global__ void assignSequentialMeanPooling(int nrows,
                                            int ncols,
                                            const float* matrices[],
                                            int n,
                                            float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;
    const int total_nelems = nelems * n;

    int k, m;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        k = i / nelems;
        m = i % nelems;
        atomicAdd(out + m, matrices[k][m] / n);
    }
}


__global__ void assignSequentialSumPooling(int nrows,
                                           int ncols,
                                           const float* matrices[],
                                           int n,
                                           float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;
    const int total_nelems = nelems * n;

    int k, m;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        k = i / nelems;
        m = i % nelems;
        atomicAdd(out + m, matrices[k][m]);
    }
}


__global__ void assignSequentialWeightedSum(int nrows,
                                            int ncols,
                                            const float* matrices[],
                                            const float* __restrict__ weights,
                                            int n,
                                            float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;
    const int total_nelems = nelems * n;

    int k, m;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        k = i / nelems;
        m = i % nelems;
        atomicAdd(out + m, matrices[k][m] * weights[k * nrows + i % nrows]);
    }
}


__global__ void sequentiallyTile(int nelems,
                                 const float* __restrict__ a,
                                 float* matrices[],
                                 int n) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int total_nelems = nelems * n;

    int k, m;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        k = i / nelems;
        m = i % nelems;
        matrices[k][m] = a[m];
    }
}


__global__ void assignDLDprea(int nrows,
                              int ncols,
                              const float* matrices[],
                              const float* __restrict__ derivative,
                              const float* __restrict__ weights,
                              int n,
                              float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;
    const unsigned long long total_nelems = (unsigned long long) nelems * n * n;

    int ii, jj;
    for (unsigned long long i = start_i; i < total_nelems; i += nthreads) {
        jj = i / nelems % n;
        ii = i / nelems / n;
        atomicAdd(out + ii * nrows + i % nrows,
                  matrices[jj][i % nelems] * derivative[i % nelems] *
                  ((ii == jj) - weights[ii * nrows + i % nrows]) *
                                weights[jj * nrows + i % nrows]);
    }
}


__global__ void addAttentionDerivative(int nrows,
                                       int ncols,
                                       const float* matrices[],
                                       const float* __restrict__ derivative,
                                       int n,
                                       float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;
    const int total_nelems = nelems * n;

    int ii;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        ii = i / nelems % n;
        atomicAdd(out + i % nelems / nrows, matrices[ii][i % nelems] * derivative[ii * nrows + i % nrows]);
    }
}


__global__ void addAttentionTile(int nrows,
                                 int ncols,
                                 const float* __restrict__ derivative,
                                 const float* __restrict__ a,
                                 const float* __restrict__ dL_dpre_a,
                                 const float* __restrict__ u,
                                 int n,
                                 float* matrices_derivs[]) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;
    const int total_nelems = nelems * n;

    int ii;
    for (int i = start_i; i < total_nelems; i += nthreads) {
        ii = i / nelems % n;
        matrices_derivs[ii][i % nelems] +=
                    a[ii * nrows + i % nrows] * derivative[i % nelems] +
                    dL_dpre_a[ii * nrows + i % nrows] * u[i % nelems / nrows];
    }
}


__global__ void dropout(int nelems,
                        float dropout_prob,
                        const float* __restrict__ data,
                        const float* __restrict__ uniform_data,
                        float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = data[i] * (uniform_data[i] > dropout_prob);
    }
}


__global__ void maskZeros(int nelems,
                          const float* __restrict__ a,
                          const float* __restrict__ b,
                          float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = a[i] * (b[i] != 0.0f);
    }
}


__global__ void addMaskZeros(int nelems,
                            const float* __restrict__ a,
                             const float* __restrict__ b,
                             float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] += a[i] * (b[i] != 0.0f);
    }
}


__global__ void assignMaskedAddition(int nelems,
                                     const float* __restrict__ mask,
                                     const float* __restrict__ a,
                                     const float* __restrict__ b,
                                     float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = mask[i] * a[i] + (1.0f - mask[i]) * b[i];
    }
}


__global__ void assignMaskedAdditionColumnBroadcasted(int nrows,
                                                      int ncols,
                                                      const float* __restrict__ mask,
                                                      const float* __restrict__ a,
                                                      const float* __restrict__ b,
                                                      float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    float m;
    for (int i = start_i; i < nelems; i += nthreads) {
        m = mask[i % nrows];
        out[i] = m * a[i] + (1.0f - m) * b[i];
    }
}


__global__ void addHprodOneMinusMask(int nelems,
                                     const float* __restrict__ mask,
                                     const float* __restrict__ a,
                                     float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] += (1.0f - mask[i]) * a[i];
    }
}


__global__ void addHprodOneMinusMaskColumnBroadcasted(int nrows,
                                                      int ncols,
                                                      const float* __restrict__ mask,
                                                      const float* __restrict__ a,
                                                      float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] += (1.0f - mask[i % nrows]) * a[i];
    }
}


__global__ void matrixVectorColumnHprod(int nrows,
                                        int ncols,
                                        const float* __restrict__ matrix,
                                        const float* __restrict__ vector,
                                        float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = matrix[i] * vector[i % nrows];
    }
}


__global__ void maskColumnNumbersRowWise(int nrows,
                                         int ncols,
                                         const int* __restrict__ numbers,
                                         float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = (i / nrows < numbers[i % nrows]);
    }
}


__global__ void batchHorizontalStack(int n,
                                     int nrows,
                                     int xNcols,
                                     int yNcols,
                                     const float* xMatrices[],
                                     const float* yMatrices[],
                                     float* outMatrices[]) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int xNelems = nrows * xNcols;
    const int yNelems = nrows * yNcols;
    const int outNelems = xNelems + yNelems;
    const int totalNelems = n * outNelems;

    int k;
    int m;
    for (int i = start_i; i < totalNelems; i += nthreads) {
        k = i / outNelems;
        m = i % outNelems;
        if (m < xNelems) {
            outMatrices[k][m] = xMatrices[k][m];
        } else {
            outMatrices[k][m] = yMatrices[k][m - xNelems];
        }
    }
}


__global__ void batchHorizontalSplit(int n,
                                     int nrows,
                                     int xNcols,
                                     int yNcols,
                                     const float* matrices[],
                                     float* xMatrices[],
                                     float* yMatrices[]) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int xNelems = nrows * xNcols;
    const int yNelems = nrows * yNcols;
    const int outNelems = xNelems + yNelems;
    const int totalNelems = n * outNelems;

    int k;
    int m;
    for (int i = start_i; i < totalNelems; i += nthreads) {
        k = i / outNelems;
        m = i % outNelems;
        if (m < xNelems) {
            xMatrices[k][m] = matrices[k][m];
        } else {
            yMatrices[k][m - xNelems] = matrices[k][m];
        }
    }
}


__global__ void repeatAlongRow(int repeats,
                               int nrows,
                               int ncols,
                               const float* __restrict__ a,
                               float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int row_idx;
    int col_idx;
    int offset;
    int col_stride = repeats * nrows;
    for (int j = 0; j < repeats; j++) {
        offset = nrows * j;
        for (int i = start_i; i < nelems; i += nthreads) {
            row_idx = i % nrows;
            col_idx = i / nrows;
            out[offset + col_stride * col_idx + row_idx] = a[i];
        }
    }
}


__global__ void addRepeatAlongRowDerivative(int repeats,
                                            const float* __restrict__ a,
                                            int nrows,
                                            int ncols,
                                            float* __restrict__ derivative) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int row_idx;
    int col_idx;
    int offset;
    int col_stride = repeats * nrows;
    for (int j = 0; j < repeats; j++) {
        offset = nrows * j;
        for (int i = start_i; i < nelems; i += nthreads) {
            row_idx = i % nrows;
            col_idx = i / nrows;
            derivative[i] += a[offset + col_stride * col_idx + row_idx];
        }
    }
}


__global__ void repeatAlongCol(int repeats,
                               int nrows,
                               int ncols,
                               const float* __restrict__ a,
                               float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int offset;
    for (int j = 0; j < repeats; j++) {
        offset = nelems * j;
        for (int i = start_i; i < nelems; i += nthreads) {
            out[offset + i] = a[i];
        }
    }
}


__global__ void addRepeatAlongColDerivative(int repeats,
                                            const float* __restrict__ a,
                                            int nrows,
                                            int ncols,
                                            float* __restrict__ derivative) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int offset;
    for (int j = 0; j < repeats; j++) {
        offset = nelems * j;
        for (int i = start_i; i < nelems; i += nthreads) {
            derivative[i] += a[offset + i];
        }
    }
}

__global__  void addScaledDivSqrt(int nelems,
                                  float alpha,
                                  const float* __restrict__ a,
                                  const float* __restrict__ b,
                                  float epsilon,
                                  float* __restrict__ c) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        c[i] += alpha * a[i] / sqrtf(b[i] + epsilon);
    }
}


__global__ void clip(int nelems,
                     float min_value,
                     float max_value,
                     const float* __restrict__ data,
                     float* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;

    for (int i = start_i; i < nelems; i += nthreads) {
        out[i] = (min_value > data[i]) * min_value + (data[i] > max_value) * max_value + (min_value <= data[i] && data[i] <= max_value) * data[i];
    }
}

template <typename T>
__global__ void transpose(int nrows,
                          int ncols,
                          const T* __restrict__ in,
                          T* __restrict__ out) {
    const int nthreads = blockDim.x * gridDim.x;
    const int start_i = blockIdx.x * blockDim.x + threadIdx.x;
    const int nelems = nrows * ncols;

    int out_row_idx;
    int out_col_idx;
    for (int i = start_i; i < nelems; i += nthreads) {
        out_col_idx= i % nrows;
        out_row_idx = i / nrows;
        out[out_col_idx * ncols + out_row_idx] = in[i];
    }
}


extern "C" {
    hipError_t _transposeFloat(hipStream_t stream,
                                int nrows,
                                int ncols,
                                const float* __restrict__ in,
                                float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        transpose<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, in, out);
        return hipGetLastError();
    }


    hipError_t _transposeInt(hipStream_t stream,
                              int nrows,
                              int ncols,
                              const int* __restrict__ in,
                              int* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        transpose<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, in, out);
        return hipGetLastError();
    }


    hipError_t _clip(hipStream_t stream,
                      int nelems,
                      float min_value,
                      float max_value,
                      const float* __restrict__ data,
                      float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        clip<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, min_value, max_value, data, out);
        return hipGetLastError();
    }

    hipError_t _addScaledDivSqrt(hipStream_t stream,
                                  int nelems,
                                  float alpha,
                                  const float* __restrict__ a,
                                  const float* __restrict__ b,
                                  float epsilon,
                                  float* __restrict__ c) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addScaledDivSqrt<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, alpha, a, b, epsilon, c);
        return hipGetLastError();
    }


    hipError_t _repeatAlongRow(hipStream_t stream,
                                int repeats,
                                int nrows,
                                int ncols,
                                const float* __restrict__ a,
                                float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        repeatAlongRow<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(repeats, nrows, ncols, a, out);
        return hipGetLastError();
    }

    hipError_t _addRepeatAlongRowDerivative(hipStream_t stream,
                                             int repeats,
                                             const float* __restrict__ a,
                                             int nrows,
                                             int ncols,
                                             float* __restrict__ derivative) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addRepeatAlongRowDerivative<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(repeats, a, nrows, ncols, derivative);
        return hipGetLastError();
    }

    hipError_t _repeatAlongCol(hipStream_t stream,
                                int repeats,
                                int nrows,
                                int ncols,
                                const float* __restrict__ a,
                                float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        repeatAlongCol<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(repeats, nrows, ncols, a, out);
        return hipGetLastError();
    }

    hipError_t _addRepeatAlongColDerivative(hipStream_t stream,
                                             int repeats,
                                             const float* __restrict__ a,
                                             int nrows,
                                             int ncols,
                                             float* __restrict__ derivative) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addRepeatAlongColDerivative<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(repeats, a, nrows, ncols, derivative);
        return hipGetLastError();
    }

    hipError_t _batchHorizontalSplit(hipStream_t stream,
                                      int n,
                                      int nrows,
                                      int xNcols,
                                      int yNcols,
                                      const float* matrices[],
                                      float* xMatrices[],
                                      float* yMatrices[]) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (n * (nrows * xNcols + nrows * yNcols) - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
           batchHorizontalSplit<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(n, nrows, xNcols, yNcols, matrices, xMatrices, yMatrices);
        return hipGetLastError();
    }


    hipError_t _batchHorizontalStack(hipStream_t stream,
                                      int n,
                                      int nrows,
                                      int xNcols,
                                      int yNcols,
                                      const float* xMatrices[],
                                      const float* yMatrices[],
                                      float* outMatrices[]) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (n * (nrows * xNcols + nrows * yNcols) - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
           batchHorizontalStack<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(n, nrows, xNcols, yNcols, xMatrices, yMatrices, outMatrices);
        return hipGetLastError();
    }


    hipError_t _maskColumnNumbersRowWise(hipStream_t stream,
                                          int nrows,
                                          int ncols,
                                          const int* __restrict__ numbers,
                                          float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        maskColumnNumbersRowWise<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, numbers, out);
        return hipGetLastError();
    }


    hipError_t _maskZeros(hipStream_t stream,
                           int nelems,
                           const float* __restrict__ a,
                           const float* __restrict__ b,
                           float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        maskZeros<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, out);
        return hipGetLastError();
    }


    hipError_t _addMaskZeros(hipStream_t stream,
                              int nelems,
                              const float* __restrict__ a,
                              const float* __restrict__ b,
                              float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addMaskZeros<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, out);
        return hipGetLastError();
    }


    hipError_t _dropout(hipStream_t stream,
                         int nelems,
                         float dropout_prob,
                         const float* __restrict__ data,
                         const float* __restrict__ uniform_data,
                         float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        dropout<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, dropout_prob, data, uniform_data, out);
        return hipGetLastError();
    }


    hipError_t _assignMaskedAddition(hipStream_t stream,
                                      int nelems,
                                      const float* __restrict__ mask,
                                      const float* __restrict__ a,
                                      const float* __restrict__ b,
                                      float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignMaskedAddition<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, mask, a, b, out);
        return hipGetLastError();
    }


    hipError_t _assignMaskedAdditionColumnBroadcasted(hipStream_t stream,
                                                       int nrows,
                                                       int ncols,
                                                       const float* __restrict__ mask,
                                                       const float* __restrict__ a,
                                                       const float* __restrict__ b,
                                                       float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignMaskedAdditionColumnBroadcasted<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, mask, a, b, out);
        return hipGetLastError();
    }


    hipError_t _addHprodOneMinusMask(hipStream_t stream,
                                      int nelems,
                                      const float* __restrict__ mask,
                                      const float* __restrict__ a,
                                      float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addHprodOneMinusMask<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, mask, a, out);
        return hipGetLastError();
    }


    hipError_t _addHprodOneMinusMaskColumnBroadcasted(hipStream_t stream,
                                                       int nrows,
                                                       int ncols,
                                                       const float* __restrict__ mask,
                                                       const float* __restrict__ a,
                                                       float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols- 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addHprodOneMinusMaskColumnBroadcasted<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, mask, a, out);
        return hipGetLastError();
    }


    hipError_t _horizontalSliceSplit(hipStream_t stream,
                                      int n,
                                      int* col_slices,
                                      int nrows,
                                      float** matrices,
                                      float* stacked) {
        size_t float_size = sizeof(float);
        int nelems;
        int offset = 0;

        for (int i = 0; i < n; i++) {
            nelems = (col_slices[i*2+1] - col_slices[i*2]) * nrows;
            offset = col_slices[i*2] * nrows;
            hipMemcpyAsync(matrices[i], stacked + offset, float_size * nelems, hipMemcpyDeviceToDevice, stream);
        }
        return hipGetLastError();
    }

    hipError_t _horizontalSplit(hipStream_t stream,
                                 int n,
                                 int* ncols,
                                 int nrows,
                                 float** matrices,
                                 float* stacked) {
        size_t float_size = sizeof(float);
        int nelems;
        int offset = 0;

        for (int i = 0; i < n; i++) {
            nelems = ncols[i] * nrows;
            hipMemcpyAsync(matrices[i], stacked + offset, float_size * nelems, hipMemcpyDeviceToDevice, stream);
            offset += nelems;
        }
        return hipGetLastError();
    }

    hipError_t _horizontalStack(hipStream_t stream,
                                 int n,
                                 int* ncols,
                                 int nrows,
                                 float** matrices,
                                 float* stacked) {
        size_t float_size = sizeof(float);
        int nelems;
        int offset = 0;

        for (int i = 0; i < n; i++) {
            nelems = ncols[i] * nrows;
            hipMemcpyAsync(stacked + offset, matrices[i], float_size * nelems, hipMemcpyDeviceToDevice, stream);
            offset += nelems;
        }
        return hipGetLastError();
    }


    hipError_t _verticalSliceSplit(hipStream_t stream,
                                    int n,
                                    int* row_slices,
                                    int nrows,
                                    int ncols,
                                    float** matrices,
                                    float* stacked) {
        size_t float_size = sizeof(float);
        float* column_address;
        int offset = 0;
        int k;

        for (int i = 0; i < ncols; i++) {
            for (int j = 0; j < n; j++) {
                k = row_slices[j*2+1] - row_slices[j*2];
                column_address = matrices[j] + k * i;
                offset = nrows * i + row_slices[j*2];
                hipMemcpyAsync(column_address, stacked + offset, float_size * k, hipMemcpyDeviceToDevice, stream);
            }
        }

        return hipGetLastError();
    }

    hipError_t _verticalSplit(hipStream_t stream,
                               int n,
                               int* nrows,
                               int ncols,
                               float** matrices,
                               float* stacked) {
        size_t float_size = sizeof(float);
        float* column_address;
        int offset = 0;

        for (int i = 0; i < ncols; i++) {
            for (int j = 0; j < n; j++) {
                column_address = matrices[j] + nrows[j] * i;
                hipMemcpyAsync(column_address, stacked + offset, float_size * nrows[j], hipMemcpyDeviceToDevice, stream);
                offset += nrows[j];
            }
        }
        return hipGetLastError();
    }


    hipError_t _verticalStack(hipStream_t stream,
                               int n,
                               int* nrows,
                               int ncols,
                               float** matrices,
                               float* stacked) {
        size_t float_size = sizeof(float);
        float* column_address;
        int offset = 0;

        for (int i = 0; i < ncols; i++) {
            for (int j = 0; j < n; j++) {
                column_address = matrices[j] + nrows[j] * i;
                hipMemcpyAsync(stacked + offset, column_address, float_size * nrows[j], hipMemcpyDeviceToDevice, stream);
                offset += nrows[j];
            }
        }

        return hipGetLastError();
    }


    hipError_t _sliceColumns(hipStream_t stream,
                              int nrows,
                              int ncols,
                              const int* __restrict__ embedding_column_indxs,
                              const float* __restrict__ embedding_matrix,
                              float* __restrict__ dense_matrix) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols  - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sliceColumns<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, embedding_column_indxs, embedding_matrix, dense_matrix);
        return hipGetLastError();
    }


    hipError_t _sliceColumnsAndTranspose(hipStream_t stream,
                                          int nrows,
                                          int ncols,
                                          const int* __restrict__ embedding_column_indxs,
                                          const float* __restrict__ embedding_matrix,
                                          float* __restrict__ dense_matrix) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols  - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sliceColumnsAndTranspose<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, embedding_column_indxs, embedding_matrix, dense_matrix);
        return hipGetLastError();
    }


    hipError_t _sliceRowsFloat(hipStream_t stream,
                                int embedding_matrix_nrows,
                                const int* __restrict__ embedding_row_indxs,
                                const float* __restrict__ embedding_matrix,
                                int nrows,
                                int ncols,
                                float* __restrict__ dense_matrix) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols  - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sliceRows<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(embedding_matrix_nrows, embedding_row_indxs, embedding_matrix, nrows, ncols, dense_matrix);
        return hipGetLastError();
    }


    hipError_t _sliceRowsInt(hipStream_t stream,
                              int embedding_matrix_nrows,
                              const int* __restrict__ embedding_row_indxs,
                              const int* __restrict__ embedding_matrix,
                              int nrows,
                              int ncols,
                              int* __restrict__ dense_matrix) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols  - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sliceRows<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(embedding_matrix_nrows, embedding_row_indxs, embedding_matrix, nrows, ncols, dense_matrix);
        return hipGetLastError();
    }


    hipError_t _sliceRowsBatch(hipStream_t stream,
                                const int* embd_rows_indxs,
                                int nrows,
                                int ncols,
                                const float* __restrict__ embd_matrix,
                                int embd_nrows,
                                int embd_ncols,
                                float* __restrict__ dense_matrices[]) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * embd_ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sliceRowsBatch<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(embd_rows_indxs, nrows, ncols, embd_matrix, embd_nrows, embd_ncols, dense_matrices);
        return hipGetLastError();
    }

    hipError_t _slicedRowsBatchScaledAdd(hipStream_t stream,
                                          const int* embd_rows_indxs,
                                          int nrows,
                                          int ncols,
                                          float alpha,
                                          const float* __restrict__ dense_matrices[],
                                          int embd_nrows,
                                          int embd_ncols,
                                          float* __restrict__ embd_matrix) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * embd_ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        slicedRowsBatchScaledAdd<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(embd_rows_indxs, nrows, ncols, alpha, dense_matrices, embd_nrows, embd_ncols, embd_matrix);
        return hipGetLastError();
    }


    hipError_t _columnArgmax(hipStream_t stream,
                              int nrows,
                              int ncols,
                              const float* __restrict__ a,
                              int* __restrict__ indxs) {
        columnArgmax<<<nrows, 32, 32 * sizeof(float), stream>>>(nrows, ncols, a, indxs);
        return hipGetLastError();
    }


    hipError_t _hprodSum(hipStream_t stream,
                          int nrows,
                          int ncols,
                          const float* __restrict__ a,
                          const float* __restrict__ b,
                          float* __restrict__ c) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        fill<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, 0.0, c);
        int nelems = nrows * ncols;
        num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        hprodSum<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, nrows, a, b, c);
        return hipGetLastError();
    }


    hipError_t _sumHprod4(hipStream_t stream,
                           int nelems,
                           const float* __restrict__ a,
                           const float* __restrict__ b,
                           const float* __restrict__ c,
                           const float* __restrict__ d,
                           float* __restrict__ e) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sumHprod<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, c, d, e);
        return hipGetLastError();
    }


    hipError_t _sumHprod5(hipStream_t stream,
                           int nelems,
                           const float* __restrict__ a,
                           const float* __restrict__ b,
                           const float* __restrict__ c,
                           const float* __restrict__ d,
                           const float* __restrict__ e,
                           float* __restrict__ f) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sumHprod<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, c, d, e, f);
        return hipGetLastError();
    }


    hipError_t _sumHprod11(hipStream_t stream,
                            int nelems,
                            const float* __restrict__ a,
                            const float* __restrict__ b,
                            const float* __restrict__ c,
                            const float* __restrict__ d,
                            const float* __restrict__ e,
                            const float* __restrict__ f,
                            const float* __restrict__ g,
                            const float* __restrict__ h,
                            const float* __restrict__ i,
                            const float* __restrict__ j,
                            const float* __restrict__ k,
                            float* __restrict__ l) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sumHprod<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, c, d, e, f, g, h, i, j, k, l);
        return hipGetLastError();
    }


    hipError_t _hadamardProduct2(hipStream_t stream,
                                  int nelems,
                                  const float* __restrict__ a,
                                  const float* __restrict__ b,
                                  float* __restrict__ c) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        hadamardProduct<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, c);
        return hipGetLastError();
    }


    hipError_t _hadamardProduct3(hipStream_t stream,
                                  int nelems,
                                  const float* __restrict__ a,
                                  const float* __restrict__ b,
                                  const float* __restrict__ c,
                                  float* __restrict__ d) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        hadamardProduct<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, c, d);
        return hipGetLastError();
    }


    hipError_t _addHadamardProduct2(hipStream_t stream,
                                     int nelems,
                                     const float* __restrict__ a,
                                     const float* __restrict__ b,
                                     float alpha,
                                     float* __restrict__ c) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addHadamardProduct<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, alpha, c);
        return hipGetLastError();
    }


    hipError_t _addHadamardProduct3(hipStream_t stream,
                                     int nelems,
                                     const float* __restrict__ a,
                                     const float* __restrict__ b,
                                     const float* __restrict__ c,
                                     float alpha,
                                     float* __restrict__ d) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addHadamardProduct<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, c, alpha, d);
        return hipGetLastError();
    }


    hipError_t _addScaledHadamardProduct(hipStream_t stream,
                                          int nelems,
                                          const float* __restrict__ a,
                                          const float* __restrict__ b,
                                          float alpha,
                                          float beta,
                                          float* __restrict__ c) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addScaledHadamardProduct<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, b, alpha, beta, c);
        return hipGetLastError();
    }


    hipError_t _addScaledColumnsSlice(hipStream_t stream,
                                       int nrows,
                                       int ncols,
                                       float alpha,
                                       const float* __restrict__ dense_matrix,
                                       const int* __restrict__ embedding_column_indxs,
                                       float* __restrict__ embedding_matrix) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addScaledColumnsSlice<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, alpha, dense_matrix, embedding_column_indxs, embedding_matrix);
        return hipGetLastError();
    }


    hipError_t _addScaledRowsSlice(hipStream_t stream,
                                    int nrows,
                                    int ncols,
                                    float alpha,
                                    const float* __restrict__ dense_matrix,
                                    const int* __restrict__ embedding_row_indxs,
                                    int embd_nrows,
                                    float* __restrict__ embedding_matrix) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addScaledRowsSlice<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, alpha, dense_matrix, embedding_row_indxs, embd_nrows, embedding_matrix);
        return hipGetLastError();
    }


    hipError_t _add_sum(hipStream_t stream,
                         int nelems,
                         const float* matrices[],
                         int n,
                         float* __restrict__ s) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addSum<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, matrices, n, s);
        return hipGetLastError();
    }


    hipError_t _assign_sum(hipStream_t stream,
                            int nelems,
                            const float* matrices[],
                            int n,
                            float* __restrict__ s) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignSum<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, matrices, n, s);
        return hipGetLastError();
    }


    hipError_t _scale(hipStream_t stream,
                       int nelems,
                       float alpha,
                       const float* __restrict__ data,
                       float* __restrict__ out_data) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        scale<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, data, alpha, out_data);
        return hipGetLastError();
    }


    hipError_t _fill(hipStream_t stream,
                      int nelems,
                      float value,
                      float* __restrict__ out_data) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        fill<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, value, out_data);
        return hipGetLastError();
    }

    hipError_t _maskedFill(hipStream_t stream,
                            int nelems,
                            float value,
                            const float* __restrict__ mask,
                            float true_value,
                            float* __restrict__ out_data) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        maskedFill<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, value, mask, true_value, out_data);
        return hipGetLastError();
    }

    hipError_t _matrixVectorRowAddition(hipStream_t stream,
                                         int nrows,
                                         int ncols,
                                         const float* __restrict__ matrix,
                                         float alpha,
                                         const float* __restrict__ vector,
                                         float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        matrixVectorRowAddition<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, matrix, alpha, vector, out);
        return hipGetLastError();
    }


    hipError_t _assignSequentialMeanPooling(hipStream_t stream,
                                             int nrows,
                                             int ncols,
                                             const float* matrices[],
                                             int n,
                                             float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignSequentialMeanPooling<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, matrices, n, out);
        return hipGetLastError();
    }

    hipError_t _assignSequentialSumPooling(hipStream_t stream,
                                            int nrows,
                                            int ncols,
                                            const float* matrices[],
                                            int n,
                                            float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignSequentialSumPooling<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, matrices, n, out);
        return hipGetLastError();
    }

    hipError_t _assignSequentialWeightedSum(hipStream_t stream,
                                             int nrows,
                                             int ncols,
                                             const float* matrices[],
                                             const float* __restrict__ weights,
                                             int n,
                                             float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignSequentialWeightedSum<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, matrices, weights, n, out);
        return hipGetLastError();
    }

    hipError_t _sequentiallyTile(hipStream_t stream,
                                  int nelems,
                                  const float* __restrict__ a,
                                  float* matrices[],
                                  int n) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        sequentiallyTile<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, a, matrices, n);
        return hipGetLastError();
    }

    hipError_t _assignDLDprea(hipStream_t stream,
                               int nrows,
                               int ncols,
                               const float* matrices[],
                               const float* __restrict__ derivative,
                               const float* __restrict__ weights,
                               int n,
                               float* __restrict__ out) {
        int num_blocks = std::min((long long)MAX_NUM_BLOCKS_PER_KERNEL, ((long long)nrows * ncols * n * n - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignDLDprea<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, matrices, derivative, weights, n, out);
        return hipGetLastError();
    }

    hipError_t _addAttentionDerivative(hipStream_t stream,
                                        int nrows,
                                        int ncols,
                                        const float* matrices[],
                                        const float* __restrict__ derivative,
                                        int n,
                                        float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols * n - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addAttentionDerivative<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, matrices, derivative, n, out);
        return hipGetLastError();
    }

    hipError_t _addAttentionTile(hipStream_t stream,
                                  int nrows,
                                  int ncols,
                                  const float* __restrict__ derivative,
                                  const float* __restrict__ a,
                                  const float* __restrict__ dL_dpre_a,
                                  const float* __restrict__ u,
                                  int n,
                                  float* matrices_derivs[]) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols * n - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addAttentionTile<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, derivative, a, dL_dpre_a, u, n, matrices_derivs);
        return hipGetLastError();
    }

    hipError_t _assignScaledAddition(hipStream_t stream,
                                      int nelems,
                                      float alpha,
                                      const float* __restrict__ a,
                                      const float* __restrict__ b,
                                      float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignScaledAddition<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, alpha, a, b, out);
        return hipGetLastError();
    }


    hipError_t _assignScaledSubtraction(hipStream_t stream,
                                         int nelems,
                                         float alpha,
                                         const float* __restrict__ a,
                                         const float* __restrict__ b,
                                         float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        assignScaledSubtraction<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, alpha, a, b, out);
        return hipGetLastError();
    }


    hipError_t _addScaledSubtraction(hipStream_t stream,
                                      int nelems,
                                      float alpha,
                                      const float* __restrict__ a,
                                      const float* __restrict__ b,
                                      float* __restrict__ out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nelems - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addScaledSubtraction<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nelems, alpha, a, b, out);
        return hipGetLastError();
    }


    hipError_t _softmaxCeDerivative(hipStream_t stream,
                                     int batchSize,
                                     int numClasses,
                                     const float* __restrict__ probs,
                                     const int* __restrict__ targetClasses,
                                     float* __restrict__ derivatives) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (batchSize * numClasses - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        softmaxCeDerivative<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(batchSize, numClasses, probs, targetClasses, derivatives);
        return hipGetLastError();
    }


    hipError_t _addSoftmaxCeDerivative(hipStream_t stream,
                                        int batchSize,
                                        int numClasses,
                                        const float* __restrict__ probs,
                                        const int* __restrict__ targetClasses,
                                        float* __restrict__ derivatives) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (batchSize * numClasses - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        addSoftmaxCeDerivative<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(batchSize, numClasses, probs, targetClasses, derivatives);
        return hipGetLastError();
    }


    hipError_t _matrixVectorColumnHprod(hipStream_t stream,
                                         int nrows,
                                         int ncols,
                                         const float* __restrict__ matrix,
                                         const float* __restrict__ vector,
                                         float* out) {
        int num_blocks = std::min(MAX_NUM_BLOCKS_PER_KERNEL, (nrows * ncols - 1) / MAX_NUM_THREADS_PER_BLOCK + 1);
        matrixVectorColumnHprod<<<num_blocks, MAX_NUM_THREADS_PER_BLOCK, 0, stream>>>(nrows, ncols, matrix, vector, out);
        return hipGetLastError();
    }
}
	.text
	.file	"gpu_matrix_kernels.hip"
	.globl	_Z27__device_stub__sliceColumnsiiPKiPKfPf # -- Begin function _Z27__device_stub__sliceColumnsiiPKiPKfPf
	.type	_Z27__device_stub__sliceColumnsiiPKiPKfPf,@function
_Z27__device_stub__sliceColumnsiiPKiPKfPf: # @_Z27__device_stub__sliceColumnsiiPKiPKfPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12sliceColumnsiiPKiPKfPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__sliceColumnsiiPKiPKfPf, .Lfunc_end0-_Z27__device_stub__sliceColumnsiiPKiPKfPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z39__device_stub__sliceColumnsAndTransposeiiPKiPKfPf # -- Begin function _Z39__device_stub__sliceColumnsAndTransposeiiPKiPKfPf
	.type	_Z39__device_stub__sliceColumnsAndTransposeiiPKiPKfPf,@function
_Z39__device_stub__sliceColumnsAndTransposeiiPKiPKfPf: # @_Z39__device_stub__sliceColumnsAndTransposeiiPKiPKfPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24sliceColumnsAndTransposeiiPKiPKfPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z39__device_stub__sliceColumnsAndTransposeiiPKiPKfPf, .Lfunc_end1-_Z39__device_stub__sliceColumnsAndTransposeiiPKiPKfPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__sliceRowsBatchPKiiiPKfiiPrPf # -- Begin function _Z29__device_stub__sliceRowsBatchPKiiiPKfiiPrPf
	.type	_Z29__device_stub__sliceRowsBatchPKiiiPKfiiPrPf,@function
_Z29__device_stub__sliceRowsBatchPKiiiPKfiiPrPf: # @_Z29__device_stub__sliceRowsBatchPKiiiPKfiiPrPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14sliceRowsBatchPKiiiPKfiiPrPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z29__device_stub__sliceRowsBatchPKiiiPKfiiPrPf, .Lfunc_end2-_Z29__device_stub__sliceRowsBatchPKiiiPKfiiPrPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z39__device_stub__slicedRowsBatchScaledAddPKiiifPrPKfiiPf # -- Begin function _Z39__device_stub__slicedRowsBatchScaledAddPKiiifPrPKfiiPf
	.type	_Z39__device_stub__slicedRowsBatchScaledAddPKiiifPrPKfiiPf,@function
_Z39__device_stub__slicedRowsBatchScaledAddPKiiifPrPKfiiPf: # @_Z39__device_stub__slicedRowsBatchScaledAddPKiiifPrPKfiiPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	28(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	24(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	20(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	48(%rsp), %r10
	movq	%rcx, (%r10)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r10, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	40(%rsp), %r12
	leaq	32(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z39__device_stub__slicedRowsBatchScaledAddPKiiifPrPKfiiPf, .Lfunc_end3-_Z39__device_stub__slicedRowsBatchScaledAddPKiiifPrPKfiiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__columnArgmaxiiPKfPi # -- Begin function _Z27__device_stub__columnArgmaxiiPKfPi
	.type	_Z27__device_stub__columnArgmaxiiPKfPi,@function
_Z27__device_stub__columnArgmaxiiPKfPi: # @_Z27__device_stub__columnArgmaxiiPKfPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12columnArgmaxiiPKfPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z27__device_stub__columnArgmaxiiPKfPi, .Lfunc_end4-_Z27__device_stub__columnArgmaxiiPKfPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__hprodSumiiPKfS0_Pf # -- Begin function _Z23__device_stub__hprodSumiiPKfS0_Pf
	.type	_Z23__device_stub__hprodSumiiPKfS0_Pf,@function
_Z23__device_stub__hprodSumiiPKfS0_Pf:  # @_Z23__device_stub__hprodSumiiPKfS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8hprodSumiiPKfS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z23__device_stub__hprodSumiiPKfS0_Pf, .Lfunc_end5-_Z23__device_stub__hprodSumiiPKfS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__sumHprodiPKfS0_S0_S0_Pf # -- Begin function _Z23__device_stub__sumHprodiPKfS0_S0_S0_Pf
	.type	_Z23__device_stub__sumHprodiPKfS0_S0_S0_Pf,@function
_Z23__device_stub__sumHprodiPKfS0_S0_S0_Pf: # @_Z23__device_stub__sumHprodiPKfS0_S0_S0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8sumHprodiPKfS0_S0_S0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z23__device_stub__sumHprodiPKfS0_S0_S0_Pf, .Lfunc_end6-_Z23__device_stub__sumHprodiPKfS0_S0_S0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_Pf # -- Begin function _Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_Pf
	.type	_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_Pf,@function
_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_Pf: # @_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8sumHprodiPKfS0_S0_S0_S0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_Pf, .Lfunc_end7-_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf # -- Begin function _Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	.type	_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf,@function
_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf: # @_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf, .Lfunc_end8-_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__hadamardProductiPKfS0_Pf # -- Begin function _Z30__device_stub__hadamardProductiPKfS0_Pf
	.type	_Z30__device_stub__hadamardProductiPKfS0_Pf,@function
_Z30__device_stub__hadamardProductiPKfS0_Pf: # @_Z30__device_stub__hadamardProductiPKfS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15hadamardProductiPKfS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z30__device_stub__hadamardProductiPKfS0_Pf, .Lfunc_end9-_Z30__device_stub__hadamardProductiPKfS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__hadamardProductiPKfS0_S0_Pf # -- Begin function _Z30__device_stub__hadamardProductiPKfS0_S0_Pf
	.type	_Z30__device_stub__hadamardProductiPKfS0_S0_Pf,@function
_Z30__device_stub__hadamardProductiPKfS0_S0_Pf: # @_Z30__device_stub__hadamardProductiPKfS0_S0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15hadamardProductiPKfS0_S0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z30__device_stub__hadamardProductiPKfS0_S0_Pf, .Lfunc_end10-_Z30__device_stub__hadamardProductiPKfS0_S0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__addHadamardProductiPKfS0_fPf # -- Begin function _Z33__device_stub__addHadamardProductiPKfS0_fPf
	.type	_Z33__device_stub__addHadamardProductiPKfS0_fPf,@function
_Z33__device_stub__addHadamardProductiPKfS0_fPf: # @_Z33__device_stub__addHadamardProductiPKfS0_fPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rsp, %rdx
	movss	%xmm0, (%rdx)
	leaq	24(%rsp), %r8
	movq	%rcx, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r8, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18addHadamardProductiPKfS0_fPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z33__device_stub__addHadamardProductiPKfS0_fPf, .Lfunc_end11-_Z33__device_stub__addHadamardProductiPKfS0_fPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__addHadamardProductiPKfS0_S0_fPf # -- Begin function _Z33__device_stub__addHadamardProductiPKfS0_S0_fPf
	.type	_Z33__device_stub__addHadamardProductiPKfS0_S0_fPf,@function
_Z33__device_stub__addHadamardProductiPKfS0_S0_fPf: # @_Z33__device_stub__addHadamardProductiPKfS0_S0_fPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	8(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	32(%rsp), %r9
	movq	%r8, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r9, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18addHadamardProductiPKfS0_S0_fPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z33__device_stub__addHadamardProductiPKfS0_S0_fPf, .Lfunc_end12-_Z33__device_stub__addHadamardProductiPKfS0_S0_fPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z39__device_stub__addScaledHadamardProductiPKfS0_ffPf # -- Begin function _Z39__device_stub__addScaledHadamardProductiPKfS0_ffPf
	.type	_Z39__device_stub__addScaledHadamardProductiPKfS0_ffPf,@function
_Z39__device_stub__addScaledHadamardProductiPKfS0_ffPf: # @_Z39__device_stub__addScaledHadamardProductiPKfS0_ffPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	12(%rsp), %r8
	movss	%xmm1, (%r8)
	leaq	40(%rsp), %r9
	movq	%rcx, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r8, 32(%rbx)
	movq	%r9, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24addScaledHadamardProductiPKfS0_ffPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z39__device_stub__addScaledHadamardProductiPKfS0_ffPf, .Lfunc_end13-_Z39__device_stub__addScaledHadamardProductiPKfS0_ffPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z36__device_stub__addScaledColumnsSliceiifPKfPKiPf # -- Begin function _Z36__device_stub__addScaledColumnsSliceiifPKfPKiPf
	.type	_Z36__device_stub__addScaledColumnsSliceiifPKfPKiPf,@function
_Z36__device_stub__addScaledColumnsSliceiifPKfPKiPf: # @_Z36__device_stub__addScaledColumnsSliceiifPKfPKiPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	56(%rsp), %r9
	movq	%rdx, (%r9)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%r9, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21addScaledColumnsSliceiifPKfPKiPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	_Z36__device_stub__addScaledColumnsSliceiifPKfPKiPf, .Lfunc_end14-_Z36__device_stub__addScaledColumnsSliceiifPKfPKiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__addScaledRowsSliceiifPKfPKiiPf # -- Begin function _Z33__device_stub__addScaledRowsSliceiifPKfPKiiPf
	.type	_Z33__device_stub__addScaledRowsSliceiifPKfPKiiPf,@function
_Z33__device_stub__addScaledRowsSliceiifPKfPKiiPf: # @_Z33__device_stub__addScaledRowsSliceiifPKfPKiiPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	56(%rsp), %r10
	movq	%rdx, (%r10)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%r10, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18addScaledRowsSliceiifPKfPKiiPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end15:
	.size	_Z33__device_stub__addScaledRowsSliceiifPKfPKiiPf, .Lfunc_end15-_Z33__device_stub__addScaledRowsSliceiifPKfPKiiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__assignSumiPPKfiPf # -- Begin function _Z24__device_stub__assignSumiPPKfiPf
	.type	_Z24__device_stub__assignSumiPPKfiPf,@function
_Z24__device_stub__assignSumiPPKfiPf:   # @_Z24__device_stub__assignSumiPPKfiPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9assignSumiPPKfiPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end16:
	.size	_Z24__device_stub__assignSumiPPKfiPf, .Lfunc_end16-_Z24__device_stub__assignSumiPPKfiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__addSumiPPKfiPf # -- Begin function _Z21__device_stub__addSumiPPKfiPf
	.type	_Z21__device_stub__addSumiPPKfiPf,@function
_Z21__device_stub__addSumiPPKfiPf:      # @_Z21__device_stub__addSumiPPKfiPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6addSumiPPKfiPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end17:
	.size	_Z21__device_stub__addSumiPPKfiPf, .Lfunc_end17-_Z21__device_stub__addSumiPPKfiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__scaleiPKffPf # -- Begin function _Z20__device_stub__scaleiPKffPf
	.type	_Z20__device_stub__scaleiPKffPf,@function
_Z20__device_stub__scaleiPKffPf:        # @_Z20__device_stub__scaleiPKffPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	8(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5scaleiPKffPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end18:
	.size	_Z20__device_stub__scaleiPKffPf, .Lfunc_end18-_Z20__device_stub__scaleiPKffPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__fillifPf     # -- Begin function _Z19__device_stub__fillifPf
	.type	_Z19__device_stub__fillifPf,@function
_Z19__device_stub__fillifPf:            # @_Z19__device_stub__fillifPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rcx
	movss	%xmm0, (%rcx)
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4fillifPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end19:
	.size	_Z19__device_stub__fillifPf, .Lfunc_end19-_Z19__device_stub__fillifPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__maskedFillifPKffPf # -- Begin function _Z25__device_stub__maskedFillifPKffPf
	.type	_Z25__device_stub__maskedFillifPKffPf,@function
_Z25__device_stub__maskedFillifPKffPf:  # @_Z25__device_stub__maskedFillifPKffPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movss	%xmm1, (%rsi)
	leaq	32(%rsp), %r8
	movq	%rdx, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%r8, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10maskedFillifPKffPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end20:
	.size	_Z25__device_stub__maskedFillifPKffPf, .Lfunc_end20-_Z25__device_stub__maskedFillifPKffPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__matrixVectorRowAdditioniiPKffS0_Pf # -- Begin function _Z38__device_stub__matrixVectorRowAdditioniiPKffS0_Pf
	.type	_Z38__device_stub__matrixVectorRowAdditioniiPKffS0_Pf,@function
_Z38__device_stub__matrixVectorRowAdditioniiPKffS0_Pf: # @_Z38__device_stub__matrixVectorRowAdditioniiPKffS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	48(%rsp), %r9
	movq	%rcx, (%r9)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r9, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23matrixVectorRowAdditioniiPKffS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end21:
	.size	_Z38__device_stub__matrixVectorRowAdditioniiPKffS0_Pf, .Lfunc_end21-_Z38__device_stub__matrixVectorRowAdditioniiPKffS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__assignScaledAdditionifPKfS0_Pf # -- Begin function _Z35__device_stub__assignScaledAdditionifPKfS0_Pf
	.type	_Z35__device_stub__assignScaledAdditionifPKfS0_Pf,@function
_Z35__device_stub__assignScaledAdditionifPKfS0_Pf: # @_Z35__device_stub__assignScaledAdditionifPKfS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movss	%xmm0, (%rdi)
	leaq	40(%rsp), %r8
	movq	%rsi, (%r8)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%r8, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20assignScaledAdditionifPKfS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end22:
	.size	_Z35__device_stub__assignScaledAdditionifPKfS0_Pf, .Lfunc_end22-_Z35__device_stub__assignScaledAdditionifPKfS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__assignScaledSubtractionifPKfS0_Pf # -- Begin function _Z38__device_stub__assignScaledSubtractionifPKfS0_Pf
	.type	_Z38__device_stub__assignScaledSubtractionifPKfS0_Pf,@function
_Z38__device_stub__assignScaledSubtractionifPKfS0_Pf: # @_Z38__device_stub__assignScaledSubtractionifPKfS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movss	%xmm0, (%rdi)
	leaq	40(%rsp), %r8
	movq	%rsi, (%r8)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%r8, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23assignScaledSubtractionifPKfS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end23:
	.size	_Z38__device_stub__assignScaledSubtractionifPKfS0_Pf, .Lfunc_end23-_Z38__device_stub__assignScaledSubtractionifPKfS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__addScaledSubtractionifPKfS0_Pf # -- Begin function _Z35__device_stub__addScaledSubtractionifPKfS0_Pf
	.type	_Z35__device_stub__addScaledSubtractionifPKfS0_Pf,@function
_Z35__device_stub__addScaledSubtractionifPKfS0_Pf: # @_Z35__device_stub__addScaledSubtractionifPKfS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movss	%xmm0, (%rdi)
	leaq	40(%rsp), %r8
	movq	%rsi, (%r8)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%r8, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20addScaledSubtractionifPKfS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end24:
	.size	_Z35__device_stub__addScaledSubtractionifPKfS0_Pf, .Lfunc_end24-_Z35__device_stub__addScaledSubtractionifPKfS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z34__device_stub__softmaxCeDerivativeiiPKfPKiPf # -- Begin function _Z34__device_stub__softmaxCeDerivativeiiPKfPKiPf
	.type	_Z34__device_stub__softmaxCeDerivativeiiPKfPKiPf,@function
_Z34__device_stub__softmaxCeDerivativeiiPKfPKiPf: # @_Z34__device_stub__softmaxCeDerivativeiiPKfPKiPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19softmaxCeDerivativeiiPKfPKiPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end25:
	.size	_Z34__device_stub__softmaxCeDerivativeiiPKfPKiPf, .Lfunc_end25-_Z34__device_stub__softmaxCeDerivativeiiPKfPKiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__addSoftmaxCeDerivativeiiPKfPKiPf # -- Begin function _Z37__device_stub__addSoftmaxCeDerivativeiiPKfPKiPf
	.type	_Z37__device_stub__addSoftmaxCeDerivativeiiPKfPKiPf,@function
_Z37__device_stub__addSoftmaxCeDerivativeiiPKfPKiPf: # @_Z37__device_stub__addSoftmaxCeDerivativeiiPKfPKiPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22addSoftmaxCeDerivativeiiPKfPKiPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end26:
	.size	_Z37__device_stub__addSoftmaxCeDerivativeiiPKfPKiPf, .Lfunc_end26-_Z37__device_stub__addSoftmaxCeDerivativeiiPKfPKiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z42__device_stub__assignSequentialMeanPoolingiiPPKfiPf # -- Begin function _Z42__device_stub__assignSequentialMeanPoolingiiPPKfiPf
	.type	_Z42__device_stub__assignSequentialMeanPoolingiiPPKfiPf,@function
_Z42__device_stub__assignSequentialMeanPoolingiiPPKfiPf: # @_Z42__device_stub__assignSequentialMeanPoolingiiPPKfiPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27assignSequentialMeanPoolingiiPPKfiPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end27:
	.size	_Z42__device_stub__assignSequentialMeanPoolingiiPPKfiPf, .Lfunc_end27-_Z42__device_stub__assignSequentialMeanPoolingiiPPKfiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z41__device_stub__assignSequentialSumPoolingiiPPKfiPf # -- Begin function _Z41__device_stub__assignSequentialSumPoolingiiPPKfiPf
	.type	_Z41__device_stub__assignSequentialSumPoolingiiPPKfiPf,@function
_Z41__device_stub__assignSequentialSumPoolingiiPPKfiPf: # @_Z41__device_stub__assignSequentialSumPoolingiiPPKfiPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z26assignSequentialSumPoolingiiPPKfiPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end28:
	.size	_Z41__device_stub__assignSequentialSumPoolingiiPPKfiPf, .Lfunc_end28-_Z41__device_stub__assignSequentialSumPoolingiiPPKfiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z42__device_stub__assignSequentialWeightedSumiiPPKfS0_iPf # -- Begin function _Z42__device_stub__assignSequentialWeightedSumiiPPKfS0_iPf
	.type	_Z42__device_stub__assignSequentialWeightedSumiiPPKfS0_iPf,@function
_Z42__device_stub__assignSequentialWeightedSumiiPPKfS0_iPf: # @_Z42__device_stub__assignSequentialWeightedSumiiPPKfS0_iPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27assignSequentialWeightedSumiiPPKfS0_iPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end29:
	.size	_Z42__device_stub__assignSequentialWeightedSumiiPPKfS0_iPf, .Lfunc_end29-_Z42__device_stub__assignSequentialWeightedSumiiPPKfS0_iPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__sequentiallyTileiPKfPPfi # -- Begin function _Z31__device_stub__sequentiallyTileiPKfPPfi
	.type	_Z31__device_stub__sequentiallyTileiPKfPPfi,@function
_Z31__device_stub__sequentiallyTileiPKfPPfi: # @_Z31__device_stub__sequentiallyTileiPKfPPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16sequentiallyTileiPKfPPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end30:
	.size	_Z31__device_stub__sequentiallyTileiPKfPPfi, .Lfunc_end30-_Z31__device_stub__sequentiallyTileiPKfPPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__assignDLDpreaiiPPKfS0_S0_iPf # -- Begin function _Z28__device_stub__assignDLDpreaiiPPKfS0_S0_iPf
	.type	_Z28__device_stub__assignDLDpreaiiPPKfS0_S0_iPf,@function
_Z28__device_stub__assignDLDpreaiiPPKfS0_S0_iPf: # @_Z28__device_stub__assignDLDpreaiiPPKfS0_S0_iPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13assignDLDpreaiiPPKfS0_S0_iPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end31:
	.size	_Z28__device_stub__assignDLDpreaiiPPKfS0_S0_iPf, .Lfunc_end31-_Z28__device_stub__assignDLDpreaiiPPKfS0_S0_iPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__addAttentionDerivativeiiPPKfS0_iPf # -- Begin function _Z37__device_stub__addAttentionDerivativeiiPPKfS0_iPf
	.type	_Z37__device_stub__addAttentionDerivativeiiPPKfS0_iPf,@function
_Z37__device_stub__addAttentionDerivativeiiPPKfS0_iPf: # @_Z37__device_stub__addAttentionDerivativeiiPPKfS0_iPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22addAttentionDerivativeiiPPKfS0_iPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end32:
	.size	_Z37__device_stub__addAttentionDerivativeiiPPKfS0_iPf, .Lfunc_end32-_Z37__device_stub__addAttentionDerivativeiiPPKfS0_iPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__addAttentionTileiiPKfS0_S0_S0_iPPf # -- Begin function _Z31__device_stub__addAttentionTileiiPKfS0_S0_S0_iPPf
	.type	_Z31__device_stub__addAttentionTileiiPKfS0_S0_S0_iPPf,@function
_Z31__device_stub__addAttentionTileiiPKfS0_S0_S0_iPPf: # @_Z31__device_stub__addAttentionTileiiPKfS0_S0_S0_iPPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16addAttentionTileiiPKfS0_S0_S0_iPPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end33:
	.size	_Z31__device_stub__addAttentionTileiiPKfS0_S0_S0_iPPf, .Lfunc_end33-_Z31__device_stub__addAttentionTileiiPKfS0_S0_S0_iPPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__dropoutifPKfS0_Pf # -- Begin function _Z22__device_stub__dropoutifPKfS0_Pf
	.type	_Z22__device_stub__dropoutifPKfS0_Pf,@function
_Z22__device_stub__dropoutifPKfS0_Pf:   # @_Z22__device_stub__dropoutifPKfS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movss	%xmm0, (%rdi)
	leaq	40(%rsp), %r8
	movq	%rsi, (%r8)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%r8, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7dropoutifPKfS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end34:
	.size	_Z22__device_stub__dropoutifPKfS0_Pf, .Lfunc_end34-_Z22__device_stub__dropoutifPKfS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__maskZerosiPKfS0_Pf # -- Begin function _Z24__device_stub__maskZerosiPKfS0_Pf
	.type	_Z24__device_stub__maskZerosiPKfS0_Pf,@function
_Z24__device_stub__maskZerosiPKfS0_Pf:  # @_Z24__device_stub__maskZerosiPKfS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9maskZerosiPKfS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end35:
	.size	_Z24__device_stub__maskZerosiPKfS0_Pf, .Lfunc_end35-_Z24__device_stub__maskZerosiPKfS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__addMaskZerosiPKfS0_Pf # -- Begin function _Z27__device_stub__addMaskZerosiPKfS0_Pf
	.type	_Z27__device_stub__addMaskZerosiPKfS0_Pf,@function
_Z27__device_stub__addMaskZerosiPKfS0_Pf: # @_Z27__device_stub__addMaskZerosiPKfS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12addMaskZerosiPKfS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end36:
	.size	_Z27__device_stub__addMaskZerosiPKfS0_Pf, .Lfunc_end36-_Z27__device_stub__addMaskZerosiPKfS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__assignMaskedAdditioniPKfS0_S0_Pf # -- Begin function _Z35__device_stub__assignMaskedAdditioniPKfS0_S0_Pf
	.type	_Z35__device_stub__assignMaskedAdditioniPKfS0_S0_Pf,@function
_Z35__device_stub__assignMaskedAdditioniPKfS0_S0_Pf: # @_Z35__device_stub__assignMaskedAdditioniPKfS0_S0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20assignMaskedAdditioniPKfS0_S0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end37:
	.size	_Z35__device_stub__assignMaskedAdditioniPKfS0_S0_Pf, .Lfunc_end37-_Z35__device_stub__assignMaskedAdditioniPKfS0_S0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z52__device_stub__assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf # -- Begin function _Z52__device_stub__assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
	.type	_Z52__device_stub__assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf,@function
_Z52__device_stub__assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf: # @_Z52__device_stub__assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end38:
	.size	_Z52__device_stub__assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf, .Lfunc_end38-_Z52__device_stub__assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__addHprodOneMinusMaskiPKfS0_Pf # -- Begin function _Z35__device_stub__addHprodOneMinusMaskiPKfS0_Pf
	.type	_Z35__device_stub__addHprodOneMinusMaskiPKfS0_Pf,@function
_Z35__device_stub__addHprodOneMinusMaskiPKfS0_Pf: # @_Z35__device_stub__addHprodOneMinusMaskiPKfS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20addHprodOneMinusMaskiPKfS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end39:
	.size	_Z35__device_stub__addHprodOneMinusMaskiPKfS0_Pf, .Lfunc_end39-_Z35__device_stub__addHprodOneMinusMaskiPKfS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z52__device_stub__addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf # -- Begin function _Z52__device_stub__addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
	.type	_Z52__device_stub__addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf,@function
_Z52__device_stub__addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf: # @_Z52__device_stub__addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end40:
	.size	_Z52__device_stub__addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf, .Lfunc_end40-_Z52__device_stub__addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__matrixVectorColumnHprodiiPKfS0_Pf # -- Begin function _Z38__device_stub__matrixVectorColumnHprodiiPKfS0_Pf
	.type	_Z38__device_stub__matrixVectorColumnHprodiiPKfS0_Pf,@function
_Z38__device_stub__matrixVectorColumnHprodiiPKfS0_Pf: # @_Z38__device_stub__matrixVectorColumnHprodiiPKfS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23matrixVectorColumnHprodiiPKfS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end41:
	.size	_Z38__device_stub__matrixVectorColumnHprodiiPKfS0_Pf, .Lfunc_end41-_Z38__device_stub__matrixVectorColumnHprodiiPKfS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z39__device_stub__maskColumnNumbersRowWiseiiPKiPf # -- Begin function _Z39__device_stub__maskColumnNumbersRowWiseiiPKiPf
	.type	_Z39__device_stub__maskColumnNumbersRowWiseiiPKiPf,@function
_Z39__device_stub__maskColumnNumbersRowWiseiiPKiPf: # @_Z39__device_stub__maskColumnNumbersRowWiseiiPKiPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24maskColumnNumbersRowWiseiiPKiPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end42:
	.size	_Z39__device_stub__maskColumnNumbersRowWiseiiPKiPf, .Lfunc_end42-_Z39__device_stub__maskColumnNumbersRowWiseiiPKiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__batchHorizontalStackiiiiPPKfS1_PPf # -- Begin function _Z35__device_stub__batchHorizontalStackiiiiPPKfS1_PPf
	.type	_Z35__device_stub__batchHorizontalStackiiiiPPKfS1_PPf,@function
_Z35__device_stub__batchHorizontalStackiiiiPPKfS1_PPf: # @_Z35__device_stub__batchHorizontalStackiiiiPPKfS1_PPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20batchHorizontalStackiiiiPPKfS1_PPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end43:
	.size	_Z35__device_stub__batchHorizontalStackiiiiPPKfS1_PPf, .Lfunc_end43-_Z35__device_stub__batchHorizontalStackiiiiPPKfS1_PPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__batchHorizontalSplitiiiiPPKfPPfS3_ # -- Begin function _Z35__device_stub__batchHorizontalSplitiiiiPPKfPPfS3_
	.type	_Z35__device_stub__batchHorizontalSplitiiiiPPKfPPfS3_,@function
_Z35__device_stub__batchHorizontalSplitiiiiPPKfPPfS3_: # @_Z35__device_stub__batchHorizontalSplitiiiiPPKfPPfS3_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20batchHorizontalSplitiiiiPPKfPPfS3_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end44:
	.size	_Z35__device_stub__batchHorizontalSplitiiiiPPKfPPfS3_, .Lfunc_end44-_Z35__device_stub__batchHorizontalSplitiiiiPPKfPPfS3_
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__repeatAlongRowiiiPKfPf # -- Begin function _Z29__device_stub__repeatAlongRowiiiPKfPf
	.type	_Z29__device_stub__repeatAlongRowiiiPKfPf,@function
_Z29__device_stub__repeatAlongRowiiiPKfPf: # @_Z29__device_stub__repeatAlongRowiiiPKfPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14repeatAlongRowiiiPKfPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end45:
	.size	_Z29__device_stub__repeatAlongRowiiiPKfPf, .Lfunc_end45-_Z29__device_stub__repeatAlongRowiiiPKfPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z42__device_stub__addRepeatAlongRowDerivativeiPKfiiPf # -- Begin function _Z42__device_stub__addRepeatAlongRowDerivativeiPKfiiPf
	.type	_Z42__device_stub__addRepeatAlongRowDerivativeiPKfiiPf,@function
_Z42__device_stub__addRepeatAlongRowDerivativeiPKfiiPf: # @_Z42__device_stub__addRepeatAlongRowDerivativeiPKfiiPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27addRepeatAlongRowDerivativeiPKfiiPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end46:
	.size	_Z42__device_stub__addRepeatAlongRowDerivativeiPKfiiPf, .Lfunc_end46-_Z42__device_stub__addRepeatAlongRowDerivativeiPKfiiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__repeatAlongColiiiPKfPf # -- Begin function _Z29__device_stub__repeatAlongColiiiPKfPf
	.type	_Z29__device_stub__repeatAlongColiiiPKfPf,@function
_Z29__device_stub__repeatAlongColiiiPKfPf: # @_Z29__device_stub__repeatAlongColiiiPKfPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14repeatAlongColiiiPKfPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end47:
	.size	_Z29__device_stub__repeatAlongColiiiPKfPf, .Lfunc_end47-_Z29__device_stub__repeatAlongColiiiPKfPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z42__device_stub__addRepeatAlongColDerivativeiPKfiiPf # -- Begin function _Z42__device_stub__addRepeatAlongColDerivativeiPKfiiPf
	.type	_Z42__device_stub__addRepeatAlongColDerivativeiPKfiiPf,@function
_Z42__device_stub__addRepeatAlongColDerivativeiPKfiiPf: # @_Z42__device_stub__addRepeatAlongColDerivativeiPKfiiPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27addRepeatAlongColDerivativeiPKfiiPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end48:
	.size	_Z42__device_stub__addRepeatAlongColDerivativeiPKfiiPf, .Lfunc_end48-_Z42__device_stub__addRepeatAlongColDerivativeiPKfiiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__addScaledDivSqrtifPKfS0_fPf # -- Begin function _Z31__device_stub__addScaledDivSqrtifPKfS0_fPf
	.type	_Z31__device_stub__addScaledDivSqrtifPKfS0_fPf,@function
_Z31__device_stub__addScaledDivSqrtifPKfS0_fPf: # @_Z31__device_stub__addScaledDivSqrtifPKfS0_fPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movss	%xmm0, (%rdi)
	leaq	56(%rsp), %r8
	movq	%rsi, (%r8)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movss	%xmm1, (%rdx)
	leaq	40(%rsp), %r9
	movq	%rcx, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%r8, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r9, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16addScaledDivSqrtifPKfS0_fPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end49:
	.size	_Z31__device_stub__addScaledDivSqrtifPKfS0_fPf, .Lfunc_end49-_Z31__device_stub__addScaledDivSqrtifPKfS0_fPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__clipiffPKfPf # -- Begin function _Z19__device_stub__clipiffPKfPf
	.type	_Z19__device_stub__clipiffPKfPf,@function
_Z19__device_stub__clipiffPKfPf:        # @_Z19__device_stub__clipiffPKfPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	4(%rsp), %rdi
	movss	%xmm1, (%rdi)
	leaq	40(%rsp), %r8
	movq	%rsi, (%r8)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%r8, 24(%rbx)
	movq	%rsi, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4clipiffPKfPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end50:
	.size	_Z19__device_stub__clipiffPKfPf, .Lfunc_end50-_Z19__device_stub__clipiffPKfPf
	.cfi_endproc
                                        # -- End function
	.globl	_transposeFloat                 # -- Begin function _transposeFloat
	.type	_transposeFloat,@function
_transposeFloat:                        # @_transposeFloat
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movl	%edx, %ebp
	movl	%esi, %r15d
	movq	%rdi, %r9
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB51_2
# %bb.1:
	movl	%r15d, %edi
	movl	%ebp, %esi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	callq	_Z24__device_stub__transposeIfEviiPKT_PS0_
.LBB51_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end51:
	.size	_transposeFloat, .Lfunc_end51-_transposeFloat
	.cfi_endproc
                                        # -- End function
	.section	.text._Z24__device_stub__transposeIfEviiPKT_PS0_,"axG",@progbits,_Z24__device_stub__transposeIfEviiPKT_PS0_,comdat
	.weak	_Z24__device_stub__transposeIfEviiPKT_PS0_ # -- Begin function _Z24__device_stub__transposeIfEviiPKT_PS0_
	.type	_Z24__device_stub__transposeIfEviiPKT_PS0_,@function
_Z24__device_stub__transposeIfEviiPKT_PS0_: # @_Z24__device_stub__transposeIfEviiPKT_PS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9transposeIfEviiPKT_PS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end52:
	.size	_Z24__device_stub__transposeIfEviiPKT_PS0_, .Lfunc_end52-_Z24__device_stub__transposeIfEviiPKT_PS0_
	.cfi_endproc
                                        # -- End function
	.text
	.globl	_transposeInt                   # -- Begin function _transposeInt
	.type	_transposeInt,@function
_transposeInt:                          # @_transposeInt
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movl	%edx, %ebp
	movl	%esi, %r15d
	movq	%rdi, %r9
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB53_2
# %bb.1:
	movl	%r15d, %edi
	movl	%ebp, %esi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	callq	_Z24__device_stub__transposeIiEviiPKT_PS0_
.LBB53_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end53:
	.size	_transposeInt, .Lfunc_end53-_transposeInt
	.cfi_endproc
                                        # -- End function
	.section	.text._Z24__device_stub__transposeIiEviiPKT_PS0_,"axG",@progbits,_Z24__device_stub__transposeIiEviiPKT_PS0_,comdat
	.weak	_Z24__device_stub__transposeIiEviiPKT_PS0_ # -- Begin function _Z24__device_stub__transposeIiEviiPKT_PS0_
	.type	_Z24__device_stub__transposeIiEviiPKT_PS0_,@function
_Z24__device_stub__transposeIiEviiPKT_PS0_: # @_Z24__device_stub__transposeIiEviiPKT_PS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9transposeIiEviiPKT_PS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end54:
	.size	_Z24__device_stub__transposeIiEviiPKT_PS0_, .Lfunc_end54-_Z24__device_stub__transposeIiEviiPKT_PS0_
	.cfi_endproc
                                        # -- End function
	.text
	.globl	_clip                           # -- Begin function _clip
	.type	_clip,@function
_clip:                                  # @_clip
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movss	%xmm1, 12(%rsp)                 # 4-byte Spill
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movl	%esi, %r15d
	movq	%rdi, %r9
	leal	-1(%r15), %eax
	leal	510(%r15), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB55_2
# %bb.1:
	movl	%r15d, %edi
	movss	8(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	12(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movq	%r14, %rsi
	movq	%rbx, %rdx
	callq	_Z19__device_stub__clipiffPKfPf
.LBB55_2:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end55:
	.size	_clip, .Lfunc_end55-_clip
	.cfi_endproc
                                        # -- End function
	.globl	_addScaledDivSqrt               # -- Begin function _addScaledDivSqrt
	.type	_addScaledDivSqrt,@function
_addScaledDivSqrt:                      # @_addScaledDivSqrt
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r8, %rbx
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movss	%xmm0, (%rsp)                   # 4-byte Spill
	movl	%esi, %r12d
	movq	%rdi, %r9
	leal	-1(%r12), %eax
	leal	510(%r12), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB56_2
# %bb.1:
	movl	%r12d, %edi
	movss	(%rsp), %xmm0                   # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%r15, %rsi
	movq	%r14, %rdx
	movss	4(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movq	%rbx, %rcx
	callq	_Z31__device_stub__addScaledDivSqrtifPKfS0_fPf
.LBB56_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end56:
	.size	_addScaledDivSqrt, .Lfunc_end56-_addScaledDivSqrt
	.cfi_endproc
                                        # -- End function
	.globl	_repeatAlongRow                 # -- Begin function _repeatAlongRow
	.type	_repeatAlongRow,@function
_repeatAlongRow:                        # @_repeatAlongRow
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movl	%ecx, %ebp
	movl	%edx, %r15d
	movl	%esi, %r12d
	movq	%rdi, %r9
	movl	%ecx, %eax
	imull	%edx, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB57_2
# %bb.1:
	movl	%r12d, %edi
	movl	%r15d, %esi
	movl	%ebp, %edx
	movq	%r14, %rcx
	movq	%rbx, %r8
	callq	_Z29__device_stub__repeatAlongRowiiiPKfPf
.LBB57_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end57:
	.size	_repeatAlongRow, .Lfunc_end57-_repeatAlongRow
	.cfi_endproc
                                        # -- End function
	.globl	_addRepeatAlongRowDerivative    # -- Begin function _addRepeatAlongRowDerivative
	.type	_addRepeatAlongRowDerivative,@function
_addRepeatAlongRowDerivative:           # @_addRepeatAlongRowDerivative
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movl	%r8d, %ebp
	movl	%ecx, %r14d
	movq	%rdx, %r15
	movl	%esi, %r12d
	movq	%rdi, %r9
	movl	%r8d, %eax
	imull	%ecx, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB58_2
# %bb.1:
	movl	%r12d, %edi
	movq	%r15, %rsi
	movl	%r14d, %edx
	movl	%ebp, %ecx
	movq	%rbx, %r8
	callq	_Z42__device_stub__addRepeatAlongRowDerivativeiPKfiiPf
.LBB58_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end58:
	.size	_addRepeatAlongRowDerivative, .Lfunc_end58-_addRepeatAlongRowDerivative
	.cfi_endproc
                                        # -- End function
	.globl	_repeatAlongCol                 # -- Begin function _repeatAlongCol
	.type	_repeatAlongCol,@function
_repeatAlongCol:                        # @_repeatAlongCol
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movl	%ecx, %ebp
	movl	%edx, %r15d
	movl	%esi, %r12d
	movq	%rdi, %r9
	movl	%ecx, %eax
	imull	%edx, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB59_2
# %bb.1:
	movl	%r12d, %edi
	movl	%r15d, %esi
	movl	%ebp, %edx
	movq	%r14, %rcx
	movq	%rbx, %r8
	callq	_Z29__device_stub__repeatAlongColiiiPKfPf
.LBB59_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end59:
	.size	_repeatAlongCol, .Lfunc_end59-_repeatAlongCol
	.cfi_endproc
                                        # -- End function
	.globl	_addRepeatAlongColDerivative    # -- Begin function _addRepeatAlongColDerivative
	.type	_addRepeatAlongColDerivative,@function
_addRepeatAlongColDerivative:           # @_addRepeatAlongColDerivative
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movl	%r8d, %ebp
	movl	%ecx, %r14d
	movq	%rdx, %r15
	movl	%esi, %r12d
	movq	%rdi, %r9
	movl	%r8d, %eax
	imull	%ecx, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB60_2
# %bb.1:
	movl	%r12d, %edi
	movq	%r15, %rsi
	movl	%r14d, %edx
	movl	%ebp, %ecx
	movq	%rbx, %r8
	callq	_Z42__device_stub__addRepeatAlongColDerivativeiPKfiiPf
.LBB60_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end60:
	.size	_addRepeatAlongColDerivative, .Lfunc_end60-_addRepeatAlongColDerivative
	.cfi_endproc
                                        # -- End function
	.globl	_batchHorizontalSplit           # -- Begin function _batchHorizontalSplit
	.type	_batchHorizontalSplit,@function
_batchHorizontalSplit:                  # @_batchHorizontalSplit
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movl	%r8d, %r14d
	movl	%ecx, %r15d
	movl	%edx, %ebp
	movl	%esi, %r13d
	movq	%rdi, %r9
	movq	88(%rsp), %rbx
	movq	80(%rsp), %r12
	leal	(%r14,%r15), %eax
	movl	%edx, %ecx
	imull	%esi, %ecx
	imull	%eax, %ecx
	leal	-1(%rcx), %eax
	addl	$510, %ecx                      # imm = 0x1FE
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB61_2
# %bb.1:
	movq	%rbx, (%rsp)
	movl	%r13d, %edi
	movl	%ebp, %esi
	movl	%r15d, %edx
	movl	%r14d, %ecx
	movq	16(%rsp), %r8                   # 8-byte Reload
	movq	%r12, %r9
	callq	_Z35__device_stub__batchHorizontalSplitiiiiPPKfPPfS3_
.LBB61_2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end61:
	.size	_batchHorizontalSplit, .Lfunc_end61-_batchHorizontalSplit
	.cfi_endproc
                                        # -- End function
	.globl	_batchHorizontalStack           # -- Begin function _batchHorizontalStack
	.type	_batchHorizontalStack,@function
_batchHorizontalStack:                  # @_batchHorizontalStack
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movl	%r8d, %r14d
	movl	%ecx, %r15d
	movl	%edx, %ebp
	movl	%esi, %r13d
	movq	%rdi, %r9
	movq	88(%rsp), %rbx
	movq	80(%rsp), %r12
	leal	(%r14,%r15), %eax
	movl	%edx, %ecx
	imull	%esi, %ecx
	imull	%eax, %ecx
	leal	-1(%rcx), %eax
	addl	$510, %ecx                      # imm = 0x1FE
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB62_2
# %bb.1:
	movq	%rbx, (%rsp)
	movl	%r13d, %edi
	movl	%ebp, %esi
	movl	%r15d, %edx
	movl	%r14d, %ecx
	movq	16(%rsp), %r8                   # 8-byte Reload
	movq	%r12, %r9
	callq	_Z35__device_stub__batchHorizontalStackiiiiPPKfS1_PPf
.LBB62_2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end62:
	.size	_batchHorizontalStack, .Lfunc_end62-_batchHorizontalStack
	.cfi_endproc
                                        # -- End function
	.globl	_maskColumnNumbersRowWise       # -- Begin function _maskColumnNumbersRowWise
	.type	_maskColumnNumbersRowWise,@function
_maskColumnNumbersRowWise:              # @_maskColumnNumbersRowWise
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movl	%edx, %ebp
	movl	%esi, %r15d
	movq	%rdi, %r9
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB63_2
# %bb.1:
	movl	%r15d, %edi
	movl	%ebp, %esi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	callq	_Z39__device_stub__maskColumnNumbersRowWiseiiPKiPf
.LBB63_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end63:
	.size	_maskColumnNumbersRowWise, .Lfunc_end63-_maskColumnNumbersRowWise
	.cfi_endproc
                                        # -- End function
	.globl	_maskZeros                      # -- Begin function _maskZeros
	.type	_maskZeros,@function
_maskZeros:                             # @_maskZeros
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	%esi, %r12d
	movq	%rdi, %r9
	leal	-1(%r12), %eax
	leal	510(%r12), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB64_2
# %bb.1:
	movl	%r12d, %edi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	callq	_Z24__device_stub__maskZerosiPKfS0_Pf
.LBB64_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end64:
	.size	_maskZeros, .Lfunc_end64-_maskZeros
	.cfi_endproc
                                        # -- End function
	.globl	_addMaskZeros                   # -- Begin function _addMaskZeros
	.type	_addMaskZeros,@function
_addMaskZeros:                          # @_addMaskZeros
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	%esi, %r12d
	movq	%rdi, %r9
	leal	-1(%r12), %eax
	leal	510(%r12), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB65_2
# %bb.1:
	movl	%r12d, %edi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	callq	_Z27__device_stub__addMaskZerosiPKfS0_Pf
.LBB65_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end65:
	.size	_addMaskZeros, .Lfunc_end65-_addMaskZeros
	.cfi_endproc
                                        # -- End function
	.globl	_dropout                        # -- Begin function _dropout
	.type	_dropout,@function
_dropout:                               # @_dropout
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movl	%esi, %r12d
	movq	%rdi, %r9
	leal	-1(%r12), %eax
	leal	510(%r12), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB66_2
# %bb.1:
	movl	%r12d, %edi
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	callq	_Z22__device_stub__dropoutifPKfS0_Pf
.LBB66_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end66:
	.size	_dropout, .Lfunc_end66-_dropout
	.cfi_endproc
                                        # -- End function
	.globl	_assignMaskedAddition           # -- Begin function _assignMaskedAddition
	.type	_assignMaskedAddition,@function
_assignMaskedAddition:                  # @_assignMaskedAddition
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	%esi, %r13d
	movq	%rdi, %r9
	leal	-1(%r13), %eax
	leal	510(%r13), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB67_2
# %bb.1:
	movl	%r13d, %edi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movq	%rbx, %r8
	callq	_Z35__device_stub__assignMaskedAdditioniPKfS0_S0_Pf
.LBB67_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end67:
	.size	_assignMaskedAddition, .Lfunc_end67-_assignMaskedAddition
	.cfi_endproc
                                        # -- End function
	.globl	_assignMaskedAdditionColumnBroadcasted # -- Begin function _assignMaskedAdditionColumnBroadcasted
	.type	_assignMaskedAdditionColumnBroadcasted,@function
_assignMaskedAdditionColumnBroadcasted: # @_assignMaskedAdditionColumnBroadcasted
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movl	%edx, %ebp
	movl	%esi, %r13d
	movq	%rdi, %r9
	movq	64(%rsp), %r12
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB68_2
# %bb.1:
	movl	%r13d, %edi
	movl	%ebp, %esi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movq	%rbx, %r8
	movq	%r12, %r9
	callq	_Z52__device_stub__assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
.LBB68_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end68:
	.size	_assignMaskedAdditionColumnBroadcasted, .Lfunc_end68-_assignMaskedAdditionColumnBroadcasted
	.cfi_endproc
                                        # -- End function
	.globl	_addHprodOneMinusMask           # -- Begin function _addHprodOneMinusMask
	.type	_addHprodOneMinusMask,@function
_addHprodOneMinusMask:                  # @_addHprodOneMinusMask
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	%esi, %r12d
	movq	%rdi, %r9
	leal	-1(%r12), %eax
	leal	510(%r12), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB69_2
# %bb.1:
	movl	%r12d, %edi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	callq	_Z35__device_stub__addHprodOneMinusMaskiPKfS0_Pf
.LBB69_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end69:
	.size	_addHprodOneMinusMask, .Lfunc_end69-_addHprodOneMinusMask
	.cfi_endproc
                                        # -- End function
	.globl	_addHprodOneMinusMaskColumnBroadcasted # -- Begin function _addHprodOneMinusMaskColumnBroadcasted
	.type	_addHprodOneMinusMaskColumnBroadcasted,@function
_addHprodOneMinusMaskColumnBroadcasted: # @_addHprodOneMinusMaskColumnBroadcasted
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movl	%edx, %ebp
	movl	%esi, %r12d
	movq	%rdi, %r9
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB70_2
# %bb.1:
	movl	%r12d, %edi
	movl	%ebp, %esi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movq	%rbx, %r8
	callq	_Z52__device_stub__addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
.LBB70_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end70:
	.size	_addHprodOneMinusMaskColumnBroadcasted, .Lfunc_end70-_addHprodOneMinusMaskColumnBroadcasted
	.cfi_endproc
                                        # -- End function
	.globl	_horizontalSliceSplit           # -- Begin function _horizontalSliceSplit
	.type	_horizontalSliceSplit,@function
_horizontalSliceSplit:                  # @_horizontalSliceSplit
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	hipGetLastError                 # TAILCALL
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r14
	movq	%r8, %r12
	movl	%ecx, %ebp
	movq	%rdx, %r15
	movq	%rdi, %r13
	movl	%esi, %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	xorl	%ebx, %ebx
.LBB71_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r15,%rbx,8), %eax
	movl	4(%r15,%rbx,8), %ecx
	subl	%eax, %ecx
	imull	%ebp, %ecx
	imull	%ebp, %eax
	movq	(%r12,%rbx,8), %rdi
	cltq
	leaq	(%r14,%rax,4), %rsi
	movslq	%ecx, %rdx
	shlq	$2, %rdx
	movl	$3, %ecx
	movq	%r13, %r8
	callq	hipMemcpyAsync
	incq	%rbx
	cmpq	%rbx, (%rsp)                    # 8-byte Folded Reload
	jne	.LBB71_2
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end71:
	.size	_horizontalSliceSplit, .Lfunc_end71-_horizontalSliceSplit
	.cfi_endproc
                                        # -- End function
	.globl	_horizontalSplit                # -- Begin function _horizontalSplit
	.type	_horizontalSplit,@function
_horizontalSplit:                       # @_horizontalSplit
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	hipGetLastError                 # TAILCALL
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r12
	movq	%r8, %r13
	movq	%rdi, %rbx
	movl	%esi, %esi
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	xorl	%ebp, %ebp
	movslq	%ecx, %rcx
	movq	%rcx, (%rsp)                    # 8-byte Spill
	xorl	%r14d, %r14d
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
.LBB72_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movslq	(%rdx,%rbp,4), %r15
	imulq	(%rsp), %r15                    # 8-byte Folded Reload
	movq	(%r13,%rbp,8), %rdi
	movslq	%r14d, %r14
	leaq	(%r12,%r14,4), %rsi
	movq	%r15, %rdx
	shlq	$2, %rdx
	movl	$3, %ecx
	movq	%rbx, %r8
	callq	hipMemcpyAsync
	movq	16(%rsp), %rdx                  # 8-byte Reload
	addl	%r15d, %r14d
	incq	%rbp
	cmpq	%rbp, 8(%rsp)                   # 8-byte Folded Reload
	jne	.LBB72_2
# %bb.3:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end72:
	.size	_horizontalSplit, .Lfunc_end72-_horizontalSplit
	.cfi_endproc
                                        # -- End function
	.globl	_horizontalStack                # -- Begin function _horizontalStack
	.type	_horizontalStack,@function
_horizontalStack:                       # @_horizontalStack
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	hipGetLastError                 # TAILCALL
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r12
	movq	%r8, %r13
	movq	%rdi, %rbx
	movl	%esi, %esi
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	xorl	%ebp, %ebp
	movslq	%ecx, %rcx
	movq	%rcx, (%rsp)                    # 8-byte Spill
	xorl	%r14d, %r14d
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
.LBB73_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movslq	(%rdx,%rbp,4), %r15
	imulq	(%rsp), %r15                    # 8-byte Folded Reload
	movslq	%r14d, %r14
	leaq	(%r12,%r14,4), %rdi
	movq	(%r13,%rbp,8), %rsi
	movq	%r15, %rdx
	shlq	$2, %rdx
	movl	$3, %ecx
	movq	%rbx, %r8
	callq	hipMemcpyAsync
	movq	16(%rsp), %rdx                  # 8-byte Reload
	addl	%r15d, %r14d
	incq	%rbp
	cmpq	%rbp, 8(%rsp)                   # 8-byte Folded Reload
	jne	.LBB73_2
# %bb.3:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end73:
	.size	_horizontalStack, .Lfunc_end73-_horizontalStack
	.cfi_endproc
                                        # -- End function
	.globl	_verticalSliceSplit             # -- Begin function _verticalSliceSplit
	.type	_verticalSliceSplit,@function
_verticalSliceSplit:                    # @_verticalSliceSplit
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, 16(%rsp)                  # 4-byte Spill
	movl	%esi, 12(%rsp)                  # 4-byte Spill
	movl	%r8d, 20(%rsp)                  # 4-byte Spill
	testl	%r8d, %r8d
	jle	.LBB74_6
# %bb.1:                                # %.preheader.lr.ph
	movq	%r9, %r14
	movq	%rdx, %r12
	movq	%rdi, %rbp
	movq	96(%rsp), %rbx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	xorl	%r15d, %r15d
	movq	%rcx, 24(%rsp)                  # 8-byte Spill
.LBB74_2:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB74_4 Depth 2
	cmpl	$0, 12(%rsp)                    # 4-byte Folded Reload
	jle	.LBB74_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB74_2 Depth=1
	movl	%r15d, %eax
	imull	16(%rsp), %eax                  # 4-byte Folded Reload
	cltq
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	xorl	%r13d, %r13d
.LBB74_4:                               #   Parent Loop BB74_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	4(%r12,%r13,8), %rdx
	movslq	(%r12,%r13,8), %rax
	subq	%rax, %rdx
	movl	%edx, %ecx
	imull	%r15d, %ecx
	movslq	%ecx, %rdi
	shlq	$2, %rdi
	addq	(%r14,%r13,8), %rdi
	addq	32(%rsp), %rax                  # 8-byte Folded Reload
	leaq	(%rbx,%rax,4), %rsi
	shlq	$2, %rdx
	movl	$3, %ecx
	movq	%rbp, %r8
	callq	hipMemcpyAsync
	movq	24(%rsp), %rcx                  # 8-byte Reload
	incq	%r13
	cmpq	%r13, %rcx
	jne	.LBB74_4
.LBB74_5:                               # %._crit_edge
                                        #   in Loop: Header=BB74_2 Depth=1
	incl	%r15d
	cmpl	20(%rsp), %r15d                 # 4-byte Folded Reload
	jne	.LBB74_2
.LBB74_6:                               # %._crit_edge26
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end74:
	.size	_verticalSliceSplit, .Lfunc_end74-_verticalSliceSplit
	.cfi_endproc
                                        # -- End function
	.globl	_verticalSplit                  # -- Begin function _verticalSplit
	.type	_verticalSplit,@function
_verticalSplit:                         # @_verticalSplit
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, 8(%rsp)                   # 4-byte Spill
	movl	%ecx, 12(%rsp)                  # 4-byte Spill
	testl	%ecx, %ecx
	jle	.LBB75_6
# %bb.1:                                # %.preheader.lr.ph
	movq	%r9, %r13
	movq	%r8, %rbp
	movq	%rdi, %rbx
	movl	8(%rsp), %r15d                  # 4-byte Reload
	xorl	%esi, %esi
	xorl	%r12d, %r12d
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
.LBB75_2:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB75_4 Depth 2
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	movq	%rsi, 24(%rsp)                  # 8-byte Spill
	jle	.LBB75_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB75_2 Depth=1
	movslq	%esi, %rsi
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
.LBB75_4:                               # %.lr.ph
                                        #   Parent Loop BB75_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movslq	(%rdx,%r14,4), %rdx
	movq	%rdx, %rdi
	imulq	32(%rsp), %rdi                  # 8-byte Folded Reload
	shlq	$2, %rdi
	addq	(%rbp,%r14,8), %rdi
	movslq	%r12d, %r12
	leaq	(,%r12,4), %rsi
	addq	%r13, %rsi
	shlq	$2, %rdx
	movl	$3, %ecx
	movq	%rbx, %r8
	callq	hipMemcpyAsync
	movq	16(%rsp), %rdx                  # 8-byte Reload
	addl	(%rdx,%r14,4), %r12d
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB75_4
.LBB75_5:                               # %._crit_edge
                                        #   in Loop: Header=BB75_2 Depth=1
	movq	24(%rsp), %rsi                  # 8-byte Reload
	incl	%esi
	cmpl	12(%rsp), %esi                  # 4-byte Folded Reload
	jne	.LBB75_2
.LBB75_6:                               # %._crit_edge26
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end75:
	.size	_verticalSplit, .Lfunc_end75-_verticalSplit
	.cfi_endproc
                                        # -- End function
	.globl	_verticalStack                  # -- Begin function _verticalStack
	.type	_verticalStack,@function
_verticalStack:                         # @_verticalStack
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, 8(%rsp)                   # 4-byte Spill
	movl	%ecx, 12(%rsp)                  # 4-byte Spill
	testl	%ecx, %ecx
	jle	.LBB76_6
# %bb.1:                                # %.preheader.lr.ph
	movq	%r9, %r13
	movq	%r8, %rbp
	movq	%rdi, %rbx
	movl	8(%rsp), %r15d                  # 4-byte Reload
	xorl	%esi, %esi
	xorl	%r12d, %r12d
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
.LBB76_2:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB76_4 Depth 2
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	movq	%rsi, 24(%rsp)                  # 8-byte Spill
	jle	.LBB76_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB76_2 Depth=1
	movslq	%esi, %rsi
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
.LBB76_4:                               # %.lr.ph
                                        #   Parent Loop BB76_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movslq	(%rdx,%r14,4), %rdx
	movq	%rdx, %rsi
	imulq	32(%rsp), %rsi                  # 8-byte Folded Reload
	shlq	$2, %rsi
	addq	(%rbp,%r14,8), %rsi
	movslq	%r12d, %r12
	leaq	(,%r12,4), %rdi
	addq	%r13, %rdi
	shlq	$2, %rdx
	movl	$3, %ecx
	movq	%rbx, %r8
	callq	hipMemcpyAsync
	movq	16(%rsp), %rdx                  # 8-byte Reload
	addl	(%rdx,%r14,4), %r12d
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB76_4
.LBB76_5:                               # %._crit_edge
                                        #   in Loop: Header=BB76_2 Depth=1
	movq	24(%rsp), %rsi                  # 8-byte Reload
	incl	%esi
	cmpl	12(%rsp), %esi                  # 4-byte Folded Reload
	jne	.LBB76_2
.LBB76_6:                               # %._crit_edge26
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end76:
	.size	_verticalStack, .Lfunc_end76-_verticalStack
	.cfi_endproc
                                        # -- End function
	.globl	_sliceColumns                   # -- Begin function _sliceColumns
	.type	_sliceColumns,@function
_sliceColumns:                          # @_sliceColumns
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movl	%edx, %ebp
	movl	%esi, %r12d
	movq	%rdi, %r9
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB77_2
# %bb.1:
	movl	%r12d, %edi
	movl	%ebp, %esi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movq	%rbx, %r8
	callq	_Z27__device_stub__sliceColumnsiiPKiPKfPf
.LBB77_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end77:
	.size	_sliceColumns, .Lfunc_end77-_sliceColumns
	.cfi_endproc
                                        # -- End function
	.globl	_sliceColumnsAndTranspose       # -- Begin function _sliceColumnsAndTranspose
	.type	_sliceColumnsAndTranspose,@function
_sliceColumnsAndTranspose:              # @_sliceColumnsAndTranspose
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movl	%edx, %ebp
	movl	%esi, %r12d
	movq	%rdi, %r9
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB78_2
# %bb.1:
	movl	%r12d, %edi
	movl	%ebp, %esi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movq	%rbx, %r8
	callq	_Z39__device_stub__sliceColumnsAndTransposeiiPKiPKfPf
.LBB78_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end78:
	.size	_sliceColumnsAndTranspose, .Lfunc_end78-_sliceColumnsAndTranspose
	.cfi_endproc
                                        # -- End function
	.globl	_sliceRowsFloat                 # -- Begin function _sliceRowsFloat
	.type	_sliceRowsFloat,@function
_sliceRowsFloat:                        # @_sliceRowsFloat
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r12
	movl	%esi, %r13d
	movq	%rdi, %r9
	movq	64(%rsp), %r15
	movl	%ebx, %eax
	imull	%r8d, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB79_2
# %bb.1:
	movl	%r13d, %edi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	%ebp, %ecx
	movl	%ebx, %r8d
	movq	%r15, %r9
	callq	_Z24__device_stub__sliceRowsIfEviPKiPKT_iiPS2_
.LBB79_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end79:
	.size	_sliceRowsFloat, .Lfunc_end79-_sliceRowsFloat
	.cfi_endproc
                                        # -- End function
	.section	.text._Z24__device_stub__sliceRowsIfEviPKiPKT_iiPS2_,"axG",@progbits,_Z24__device_stub__sliceRowsIfEviPKiPKT_iiPS2_,comdat
	.weak	_Z24__device_stub__sliceRowsIfEviPKiPKT_iiPS2_ # -- Begin function _Z24__device_stub__sliceRowsIfEviPKiPKT_iiPS2_
	.type	_Z24__device_stub__sliceRowsIfEviPKiPKT_iiPS2_,@function
_Z24__device_stub__sliceRowsIfEviPKiPKT_iiPS2_: # @_Z24__device_stub__sliceRowsIfEviPKiPKT_iiPS2_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9sliceRowsIfEviPKiPKT_iiPS2_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end80:
	.size	_Z24__device_stub__sliceRowsIfEviPKiPKT_iiPS2_, .Lfunc_end80-_Z24__device_stub__sliceRowsIfEviPKiPKT_iiPS2_
	.cfi_endproc
                                        # -- End function
	.text
	.globl	_sliceRowsInt                   # -- Begin function _sliceRowsInt
	.type	_sliceRowsInt,@function
_sliceRowsInt:                          # @_sliceRowsInt
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r12
	movl	%esi, %r13d
	movq	%rdi, %r9
	movq	64(%rsp), %r15
	movl	%ebx, %eax
	imull	%r8d, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB81_2
# %bb.1:
	movl	%r13d, %edi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	%ebp, %ecx
	movl	%ebx, %r8d
	movq	%r15, %r9
	callq	_Z24__device_stub__sliceRowsIiEviPKiPKT_iiPS2_
.LBB81_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end81:
	.size	_sliceRowsInt, .Lfunc_end81-_sliceRowsInt
	.cfi_endproc
                                        # -- End function
	.section	.text._Z24__device_stub__sliceRowsIiEviPKiPKT_iiPS2_,"axG",@progbits,_Z24__device_stub__sliceRowsIiEviPKiPKT_iiPS2_,comdat
	.weak	_Z24__device_stub__sliceRowsIiEviPKiPKT_iiPS2_ # -- Begin function _Z24__device_stub__sliceRowsIiEviPKiPKT_iiPS2_
	.type	_Z24__device_stub__sliceRowsIiEviPKiPKT_iiPS2_,@function
_Z24__device_stub__sliceRowsIiEviPKiPKT_iiPS2_: # @_Z24__device_stub__sliceRowsIiEviPKiPKT_iiPS2_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9sliceRowsIiEviPKiPKT_iiPS2_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end82:
	.size	_Z24__device_stub__sliceRowsIiEviPKiPKT_iiPS2_, .Lfunc_end82-_Z24__device_stub__sliceRowsIiEviPKiPKT_iiPS2_
	.cfi_endproc
                                        # -- End function
	.text
	.globl	_sliceRowsBatch                 # -- Begin function _sliceRowsBatch
	.type	_sliceRowsBatch,@function
_sliceRowsBatch:                        # @_sliceRowsBatch
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 20(%rsp)                  # 4-byte Spill
	movq	%r8, %r14
	movl	%ecx, %ebp
	movl	%edx, %r15d
	movq	%rsi, %r13
	movq	%rdi, %r9
	movq	88(%rsp), %rbx
	movl	80(%rsp), %r12d
	movl	%r12d, %eax
	imull	%edx, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB83_2
# %bb.1:
	movq	%rbx, (%rsp)
	movq	%r13, %rdi
	movl	%r15d, %esi
	movl	%ebp, %edx
	movq	%r14, %rcx
	movl	20(%rsp), %r8d                  # 4-byte Reload
	movl	%r12d, %r9d
	callq	_Z29__device_stub__sliceRowsBatchPKiiiPKfiiPrPf
.LBB83_2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end83:
	.size	_sliceRowsBatch, .Lfunc_end83-_sliceRowsBatch
	.cfi_endproc
                                        # -- End function
	.globl	_slicedRowsBatchScaledAdd       # -- Begin function _slicedRowsBatchScaledAdd
	.type	_slicedRowsBatchScaledAdd,@function
_slicedRowsBatchScaledAdd:              # @_slicedRowsBatchScaledAdd
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 20(%rsp)                  # 4-byte Spill
	movq	%r8, %r14
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	movl	%ecx, %ebp
	movl	%edx, %r12d
	movq	%rsi, %r13
	movq	%rdi, %r9
	movq	88(%rsp), %rbx
	movl	80(%rsp), %r15d
	movl	%r15d, %eax
	imull	%edx, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB84_2
# %bb.1:
	movq	%rbx, (%rsp)
	movq	%r13, %rdi
	movl	%r12d, %esi
	movl	%ebp, %edx
	movss	16(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%r14, %rcx
	movl	20(%rsp), %r8d                  # 4-byte Reload
	movl	%r15d, %r9d
	callq	_Z39__device_stub__slicedRowsBatchScaledAddPKiiifPrPKfiiPf
.LBB84_2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end84:
	.size	_slicedRowsBatchScaledAdd, .Lfunc_end84-_slicedRowsBatchScaledAdd
	.cfi_endproc
                                        # -- End function
	.globl	_columnArgmax                   # -- Begin function _columnArgmax
	.type	_columnArgmax,@function
_columnArgmax:                          # @_columnArgmax
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movl	%edx, %ebp
	movl	%esi, %r15d
	movq	%rdi, %r9
	movl	%esi, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$32, %rdx
	movl	$128, %r8d
	movl	$1, %esi
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB85_2
# %bb.1:
	movl	%r15d, %edi
	movl	%ebp, %esi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	callq	_Z27__device_stub__columnArgmaxiiPKfPi
.LBB85_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end85:
	.size	_columnArgmax, .Lfunc_end85-_columnArgmax
	.cfi_endproc
                                        # -- End function
	.globl	_hprodSum                       # -- Begin function _hprodSum
	.type	_hprodSum,@function
_hprodSum:                              # @_hprodSum
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, 16(%rsp)                   # 8-byte Spill
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	movl	%edx, %r13d
	movl	%esi, %r12d
	movq	%rdi, %rbp
	leal	-1(%r12), %eax
	leal	510(%r12), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$9, %edi
	cmpl	$127, %edi
	movl	$127, %r14d
	cmovgel	%r14d, %edi
	movabsq	$4294967296, %r15               # imm = 0x100000000
	incl	%edi
	btsq	$32, %rdi
	leaq	512(%r15), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%rbp, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB86_2
# %bb.1:
	xorps	%xmm0, %xmm0
	movl	%r12d, %edi
	movq	%rbx, %rsi
	callq	_Z19__device_stub__fillifPf
.LBB86_2:
	imull	%r12d, %r13d
	leal	-1(%r13), %eax
	leal	510(%r13), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	cmovll	%ecx, %r14d
	incl	%r14d
	orq	%r15, %r14
	addq	$512, %r15                      # imm = 0x200
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%rbp, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB86_4
# %bb.3:
	movl	%r13d, %edi
	movl	%r12d, %esi
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%rbx, %r8
	callq	_Z23__device_stub__hprodSumiiPKfS0_Pf
.LBB86_4:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end86:
	.size	_hprodSum, .Lfunc_end86-_hprodSum
	.cfi_endproc
                                        # -- End function
	.globl	_sumHprod4                      # -- Begin function _sumHprod4
	.type	_sumHprod4,@function
_sumHprod4:                             # @_sumHprod4
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r13
	movl	%esi, %ebp
	movq	%rdi, %r9
	movq	64(%rsp), %r12
	leal	-1(%rbp), %eax
	leal	510(%rbp), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB87_2
# %bb.1:
	movl	%ebp, %edi
	movq	%r13, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movq	%rbx, %r8
	movq	%r12, %r9
	callq	_Z23__device_stub__sumHprodiPKfS0_S0_S0_Pf
.LBB87_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end87:
	.size	_sumHprod4, .Lfunc_end87-_sumHprod4
	.cfi_endproc
                                        # -- End function
	.globl	_sumHprod5                      # -- Begin function _sumHprod5
	.type	_sumHprod5,@function
_sumHprod5:                             # @_sumHprod5
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	%esi, %ebp
	movq	%rdi, %r9
	movq	88(%rsp), %rbx
	movq	80(%rsp), %r13
	leal	-1(%rbp), %eax
	leal	510(%rbp), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB88_2
# %bb.1:
	movq	%rbx, (%rsp)
	movl	%ebp, %edi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movq	16(%rsp), %r8                   # 8-byte Reload
	movq	%r13, %r9
	callq	_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_Pf
.LBB88_2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end88:
	.size	_sumHprod5, .Lfunc_end88-_sumHprod5
	.cfi_endproc
                                        # -- End function
	.globl	_sumHprod11                     # -- Begin function _sumHprod11
	.type	_sumHprod11,@function
_sumHprod11:                            # @_sumHprod11
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 32(%rsp)                   # 8-byte Spill
	movq	%r8, 8(%rsp)                    # 8-byte Spill
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	%esi, %r13d
	movq	%rdi, %r9
	movq	168(%rsp), %r14
	movq	160(%rsp), %rbx
	movq	152(%rsp), %rax
	movq	%rax, (%rsp)                    # 8-byte Spill
	movq	144(%rsp), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	136(%rsp), %rax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	128(%rsp), %rax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movq	120(%rsp), %rax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	leal	-1(%r13), %eax
	leal	510(%r13), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movq	112(%rsp), %rbp
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB89_2
# %bb.1:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	%r13d, %edi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	40(%rsp), %r8                   # 8-byte Reload
	movq	%rbp, %r9
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	88(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB89_2:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end89:
	.size	_sumHprod11, .Lfunc_end89-_sumHprod11
	.cfi_endproc
                                        # -- End function
	.globl	_hadamardProduct2               # -- Begin function _hadamardProduct2
	.type	_hadamardProduct2,@function
_hadamardProduct2:                      # @_hadamardProduct2
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	%esi, %r12d
	movq	%rdi, %r9
	leal	-1(%r12), %eax
	leal	510(%r12), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB90_2
# %bb.1:
	movl	%r12d, %edi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	callq	_Z30__device_stub__hadamardProductiPKfS0_Pf
.LBB90_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end90:
	.size	_hadamardProduct2, .Lfunc_end90-_hadamardProduct2
	.cfi_endproc
                                        # -- End function
	.globl	_hadamardProduct3               # -- Begin function _hadamardProduct3
	.type	_hadamardProduct3,@function
_hadamardProduct3:                      # @_hadamardProduct3
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	%esi, %r13d
	movq	%rdi, %r9
	leal	-1(%r13), %eax
	leal	510(%r13), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB91_2
# %bb.1:
	movl	%r13d, %edi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movq	%rbx, %r8
	callq	_Z30__device_stub__hadamardProductiPKfS0_S0_Pf
.LBB91_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end91:
	.size	_hadamardProduct3, .Lfunc_end91-_hadamardProduct3
	.cfi_endproc
                                        # -- End function
	.globl	_addHadamardProduct2            # -- Begin function _addHadamardProduct2
	.type	_addHadamardProduct2,@function
_addHadamardProduct2:                   # @_addHadamardProduct2
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r8, %rbx
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	%esi, %r12d
	movq	%rdi, %r9
	leal	-1(%r12), %eax
	leal	510(%r12), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB92_2
# %bb.1:
	movl	%r12d, %edi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%rbx, %rcx
	callq	_Z33__device_stub__addHadamardProductiPKfS0_fPf
.LBB92_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end92:
	.size	_addHadamardProduct2, .Lfunc_end92-_addHadamardProduct2
	.cfi_endproc
                                        # -- End function
	.globl	_addHadamardProduct3            # -- Begin function _addHadamardProduct3
	.type	_addHadamardProduct3,@function
_addHadamardProduct3:                   # @_addHadamardProduct3
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r9, %rbx
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	%esi, %r13d
	movq	%rdi, %r9
	leal	-1(%r13), %eax
	leal	510(%r13), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB93_2
# %bb.1:
	movl	%r13d, %edi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%rbx, %r8
	callq	_Z33__device_stub__addHadamardProductiPKfS0_S0_fPf
.LBB93_2:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end93:
	.size	_addHadamardProduct3, .Lfunc_end93-_addHadamardProduct3
	.cfi_endproc
                                        # -- End function
	.globl	_addScaledHadamardProduct       # -- Begin function _addScaledHadamardProduct
	.type	_addScaledHadamardProduct,@function
_addScaledHadamardProduct:              # @_addScaledHadamardProduct
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r8, %rbx
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	movss	%xmm0, (%rsp)                   # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	%esi, %r12d
	movq	%rdi, %r9
	leal	-1(%r12), %eax
	leal	510(%r12), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB94_2
# %bb.1:
	movl	%r12d, %edi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movss	(%rsp), %xmm0                   # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	4(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movq	%rbx, %rcx
	callq	_Z39__device_stub__addScaledHadamardProductiPKfS0_ffPf
.LBB94_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end94:
	.size	_addScaledHadamardProduct, .Lfunc_end94-_addScaledHadamardProduct
	.cfi_endproc
                                        # -- End function
	.globl	_addScaledColumnsSlice          # -- Begin function _addScaledColumnsSlice
	.type	_addScaledColumnsSlice,@function
_addScaledColumnsSlice:                 # @_addScaledColumnsSlice
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movl	%edx, %ebp
	movl	%esi, %r12d
	movq	%rdi, %r9
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB95_2
# %bb.1:
	movl	%r12d, %edi
	movl	%ebp, %esi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%r15, %rdx
	movq	%r14, %rcx
	movq	%rbx, %r8
	callq	_Z36__device_stub__addScaledColumnsSliceiifPKfPKiPf
.LBB95_2:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end95:
	.size	_addScaledColumnsSlice, .Lfunc_end95-_addScaledColumnsSlice
	.cfi_endproc
                                        # -- End function
	.globl	_addScaledRowsSlice             # -- Begin function _addScaledRowsSlice
	.type	_addScaledRowsSlice,@function
_addScaledRowsSlice:                    # @_addScaledRowsSlice
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movl	%edx, %ebp
	movl	%esi, %r13d
	movq	%rdi, %r9
	movq	64(%rsp), %r12
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB96_2
# %bb.1:
	movl	%r13d, %edi
	movl	%ebp, %esi
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%r15, %rdx
	movq	%r14, %rcx
	movl	%ebx, %r8d
	movq	%r12, %r9
	callq	_Z33__device_stub__addScaledRowsSliceiifPKfPKiiPf
.LBB96_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end96:
	.size	_addScaledRowsSlice, .Lfunc_end96-_addScaledRowsSlice
	.cfi_endproc
                                        # -- End function
	.globl	_add_sum                        # -- Begin function _add_sum
	.type	_add_sum,@function
_add_sum:                               # @_add_sum
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %rbx
	movl	%ecx, %ebp
	movq	%rdx, %r14
	movl	%esi, %r15d
	movq	%rdi, %r9
	leal	-1(%r15), %eax
	leal	510(%r15), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB97_2
# %bb.1:
	movl	%r15d, %edi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movq	%rbx, %rcx
	callq	_Z21__device_stub__addSumiPPKfiPf
.LBB97_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end97:
	.size	_add_sum, .Lfunc_end97-_add_sum
	.cfi_endproc
                                        # -- End function
	.globl	_assign_sum                     # -- Begin function _assign_sum
	.type	_assign_sum,@function
_assign_sum:                            # @_assign_sum
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %rbx
	movl	%ecx, %ebp
	movq	%rdx, %r14
	movl	%esi, %r15d
	movq	%rdi, %r9
	leal	-1(%r15), %eax
	leal	510(%r15), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB98_2
# %bb.1:
	movl	%r15d, %edi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movq	%rbx, %rcx
	callq	_Z24__device_stub__assignSumiPPKfiPf
.LBB98_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end98:
	.size	_assign_sum, .Lfunc_end98-_assign_sum
	.cfi_endproc
                                        # -- End function
	.globl	_scale                          # -- Begin function _scale
	.type	_scale,@function
_scale:                                 # @_scale
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movl	%esi, %r15d
	movq	%rdi, %r9
	leal	-1(%r15), %eax
	leal	510(%r15), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB99_2
# %bb.1:
	movl	%r15d, %edi
	movq	%r14, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%rbx, %rdx
	callq	_Z20__device_stub__scaleiPKffPf
.LBB99_2:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end99:
	.size	_scale, .Lfunc_end99-_scale
	.cfi_endproc
                                        # -- End function
	.globl	_fill                           # -- Begin function _fill
	.type	_fill,@function
_fill:                                  # @_fill
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdx, %rbx
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movl	%esi, %r14d
	movq	%rdi, %r9
	leal	-1(%r14), %eax
	leal	510(%r14), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB100_2
# %bb.1:
	movl	%r14d, %edi
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%rbx, %rsi
	callq	_Z19__device_stub__fillifPf
.LBB100_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end100:
	.size	_fill, .Lfunc_end100-_fill
	.cfi_endproc
                                        # -- End function
	.globl	_maskedFill                     # -- Begin function _maskedFill
	.type	_maskedFill,@function
_maskedFill:                            # @_maskedFill
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rcx, %rbx
	movss	%xmm1, 12(%rsp)                 # 4-byte Spill
	movq	%rdx, %r14
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movl	%esi, %r15d
	movq	%rdi, %r9
	leal	-1(%r15), %eax
	leal	510(%r15), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB101_2
# %bb.1:
	movl	%r15d, %edi
	movss	8(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%r14, %rsi
	movss	12(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movq	%rbx, %rdx
	callq	_Z25__device_stub__maskedFillifPKffPf
.LBB101_2:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end101:
	.size	_maskedFill, .Lfunc_end101-_maskedFill
	.cfi_endproc
                                        # -- End function
	.globl	_matrixVectorRowAddition        # -- Begin function _matrixVectorRowAddition
	.type	_matrixVectorRowAddition,@function
_matrixVectorRowAddition:               # @_matrixVectorRowAddition
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rcx, %r15
	movl	%edx, %ebp
	movl	%esi, %r12d
	movq	%rdi, %r9
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB102_2
# %bb.1:
	movl	%r12d, %edi
	movl	%ebp, %esi
	movq	%r15, %rdx
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%r14, %rcx
	movq	%rbx, %r8
	callq	_Z38__device_stub__matrixVectorRowAdditioniiPKffS0_Pf
.LBB102_2:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end102:
	.size	_matrixVectorRowAddition, .Lfunc_end102-_matrixVectorRowAddition
	.cfi_endproc
                                        # -- End function
	.globl	_assignSequentialMeanPooling    # -- Begin function _assignSequentialMeanPooling
	.type	_assignSequentialMeanPooling,@function
_assignSequentialMeanPooling:           # @_assignSequentialMeanPooling
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movl	%edx, %r15d
	movl	%esi, %r12d
	movq	%rdi, %r9
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB103_2
# %bb.1:
	movl	%r12d, %edi
	movl	%r15d, %esi
	movq	%r14, %rdx
	movl	%ebp, %ecx
	movq	%rbx, %r8
	callq	_Z42__device_stub__assignSequentialMeanPoolingiiPPKfiPf
.LBB103_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end103:
	.size	_assignSequentialMeanPooling, .Lfunc_end103-_assignSequentialMeanPooling
	.cfi_endproc
                                        # -- End function
	.globl	_assignSequentialSumPooling     # -- Begin function _assignSequentialSumPooling
	.type	_assignSequentialSumPooling,@function
_assignSequentialSumPooling:            # @_assignSequentialSumPooling
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movl	%edx, %r15d
	movl	%esi, %r12d
	movq	%rdi, %r9
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB104_2
# %bb.1:
	movl	%r12d, %edi
	movl	%r15d, %esi
	movq	%r14, %rdx
	movl	%ebp, %ecx
	movq	%rbx, %r8
	callq	_Z41__device_stub__assignSequentialSumPoolingiiPPKfiPf
.LBB104_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end104:
	.size	_assignSequentialSumPooling, .Lfunc_end104-_assignSequentialSumPooling
	.cfi_endproc
                                        # -- End function
	.globl	_assignSequentialWeightedSum    # -- Begin function _assignSequentialWeightedSum
	.type	_assignSequentialWeightedSum,@function
_assignSequentialWeightedSum:           # @_assignSequentialWeightedSum
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movl	%edx, %ebp
	movl	%esi, %r13d
	movq	%rdi, %r9
	movq	64(%rsp), %r12
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB105_2
# %bb.1:
	movl	%r13d, %edi
	movl	%ebp, %esi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movl	%ebx, %r8d
	movq	%r12, %r9
	callq	_Z42__device_stub__assignSequentialWeightedSumiiPPKfS0_iPf
.LBB105_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end105:
	.size	_assignSequentialWeightedSum, .Lfunc_end105-_assignSequentialWeightedSum
	.cfi_endproc
                                        # -- End function
	.globl	_sequentiallyTile               # -- Begin function _sequentiallyTile
	.type	_sequentiallyTile,@function
_sequentiallyTile:                      # @_sequentiallyTile
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	%esi, %r12d
	movq	%rdi, %r9
	leal	-1(%r12), %eax
	leal	510(%r12), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB106_2
# %bb.1:
	movl	%r12d, %edi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z31__device_stub__sequentiallyTileiPKfPPfi
.LBB106_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end106:
	.size	_sequentiallyTile, .Lfunc_end106-_sequentiallyTile
	.cfi_endproc
                                        # -- End function
	.globl	_assignDLDprea                  # -- Begin function _assignDLDprea
	.type	_assignDLDprea,@function
_assignDLDprea:                         # @_assignDLDprea
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movl	%edx, %ebp
	movl	%esi, %r13d
	movq	%rdi, %r9
	movslq	80(%rsp), %r12
	movq	88(%rsp), %rbx
	movslq	%esi, %rax
	movslq	%edx, %rcx
	imulq	%rax, %rcx
	imulq	%r12, %rcx
	imulq	%r12, %rcx
	leaq	-1(%rcx), %rax
	addq	$510, %rcx                      # imm = 0x1FE
	testq	%rax, %rax
	cmovnsq	%rax, %rcx
	sarq	$9, %rcx
	cmpq	$127, %rcx
	movl	$127, %edi
	cmovlq	%rcx, %rdi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB107_2
# %bb.1:
	movq	%rbx, (%rsp)
	movl	%r13d, %edi
	movl	%ebp, %esi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movq	16(%rsp), %r8                   # 8-byte Reload
	movl	%r12d, %r9d
	callq	_Z28__device_stub__assignDLDpreaiiPPKfS0_S0_iPf
.LBB107_2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end107:
	.size	_assignDLDprea, .Lfunc_end107-_assignDLDprea
	.cfi_endproc
                                        # -- End function
	.globl	_addAttentionDerivative         # -- Begin function _addAttentionDerivative
	.type	_addAttentionDerivative,@function
_addAttentionDerivative:                # @_addAttentionDerivative
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movl	%edx, %ebp
	movl	%esi, %r13d
	movq	%rdi, %r9
	movq	64(%rsp), %r12
	movl	%edx, %eax
	imull	%esi, %eax
	imull	%ebx, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB108_2
# %bb.1:
	movl	%r13d, %edi
	movl	%ebp, %esi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movl	%ebx, %r8d
	movq	%r12, %r9
	callq	_Z37__device_stub__addAttentionDerivativeiiPPKfS0_iPf
.LBB108_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end108:
	.size	_addAttentionDerivative, .Lfunc_end108-_addAttentionDerivative
	.cfi_endproc
                                        # -- End function
	.globl	_addAttentionTile               # -- Begin function _addAttentionTile
	.type	_addAttentionTile,@function
_addAttentionTile:                      # @_addAttentionTile
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, 8(%rsp)                    # 8-byte Spill
	movq	%rcx, %r15
	movl	%edx, %ebp
	movl	%esi, %r13d
	movq	%rdi, %r9
	movq	96(%rsp), %r14
	movl	88(%rsp), %ebx
	movq	80(%rsp), %r12
	movl	%edx, %eax
	imull	%esi, %eax
	imull	%ebx, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB109_2
# %bb.1:
	movl	%r13d, %edi
	movl	%ebp, %esi
	movq	%r15, %rdx
	movq	8(%rsp), %rcx                   # 8-byte Reload
	movq	16(%rsp), %r8                   # 8-byte Reload
	movq	%r12, %r9
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	callq	_Z31__device_stub__addAttentionTileiiPKfS0_S0_S0_iPPf
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB109_2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end109:
	.size	_addAttentionTile, .Lfunc_end109-_addAttentionTile
	.cfi_endproc
                                        # -- End function
	.globl	_assignScaledAddition           # -- Begin function _assignScaledAddition
	.type	_assignScaledAddition,@function
_assignScaledAddition:                  # @_assignScaledAddition
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movl	%esi, %r12d
	movq	%rdi, %r9
	leal	-1(%r12), %eax
	leal	510(%r12), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB110_2
# %bb.1:
	movl	%r12d, %edi
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	callq	_Z35__device_stub__assignScaledAdditionifPKfS0_Pf
.LBB110_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end110:
	.size	_assignScaledAddition, .Lfunc_end110-_assignScaledAddition
	.cfi_endproc
                                        # -- End function
	.globl	_assignScaledSubtraction        # -- Begin function _assignScaledSubtraction
	.type	_assignScaledSubtraction,@function
_assignScaledSubtraction:               # @_assignScaledSubtraction
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movl	%esi, %r12d
	movq	%rdi, %r9
	leal	-1(%r12), %eax
	leal	510(%r12), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB111_2
# %bb.1:
	movl	%r12d, %edi
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	callq	_Z38__device_stub__assignScaledSubtractionifPKfS0_Pf
.LBB111_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end111:
	.size	_assignScaledSubtraction, .Lfunc_end111-_assignScaledSubtraction
	.cfi_endproc
                                        # -- End function
	.globl	_addScaledSubtraction           # -- Begin function _addScaledSubtraction
	.type	_addScaledSubtraction,@function
_addScaledSubtraction:                  # @_addScaledSubtraction
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movl	%esi, %r12d
	movq	%rdi, %r9
	leal	-1(%r12), %eax
	leal	510(%r12), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$9, %ecx
	cmpl	$127, %ecx
	movl	$127, %edi
	cmovll	%ecx, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB112_2
# %bb.1:
	movl	%r12d, %edi
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	callq	_Z35__device_stub__addScaledSubtractionifPKfS0_Pf
.LBB112_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end112:
	.size	_addScaledSubtraction, .Lfunc_end112-_addScaledSubtraction
	.cfi_endproc
                                        # -- End function
	.globl	_softmaxCeDerivative            # -- Begin function _softmaxCeDerivative
	.type	_softmaxCeDerivative,@function
_softmaxCeDerivative:                   # @_softmaxCeDerivative
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movl	%edx, %ebp
	movl	%esi, %r12d
	movq	%rdi, %r9
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB113_2
# %bb.1:
	movl	%r12d, %edi
	movl	%ebp, %esi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movq	%rbx, %r8
	callq	_Z34__device_stub__softmaxCeDerivativeiiPKfPKiPf
.LBB113_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end113:
	.size	_softmaxCeDerivative, .Lfunc_end113-_softmaxCeDerivative
	.cfi_endproc
                                        # -- End function
	.globl	_addSoftmaxCeDerivative         # -- Begin function _addSoftmaxCeDerivative
	.type	_addSoftmaxCeDerivative,@function
_addSoftmaxCeDerivative:                # @_addSoftmaxCeDerivative
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movl	%edx, %ebp
	movl	%esi, %r12d
	movq	%rdi, %r9
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB114_2
# %bb.1:
	movl	%r12d, %edi
	movl	%ebp, %esi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movq	%rbx, %r8
	callq	_Z37__device_stub__addSoftmaxCeDerivativeiiPKfPKiPf
.LBB114_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end114:
	.size	_addSoftmaxCeDerivative, .Lfunc_end114-_addSoftmaxCeDerivative
	.cfi_endproc
                                        # -- End function
	.globl	_matrixVectorColumnHprod        # -- Begin function _matrixVectorColumnHprod
	.type	_matrixVectorColumnHprod,@function
_matrixVectorColumnHprod:               # @_matrixVectorColumnHprod
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movl	%edx, %ebp
	movl	%esi, %r12d
	movq	%rdi, %r9
	movl	%edx, %eax
	imull	%esi, %eax
	leal	-1(%rax), %ecx
	addl	$510, %eax                      # imm = 0x1FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$9, %eax
	cmpl	$127, %eax
	movl	$127, %edi
	cmovll	%eax, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB115_2
# %bb.1:
	movl	%r12d, %edi
	movl	%ebp, %esi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movq	%rbx, %r8
	callq	_Z38__device_stub__matrixVectorColumnHprodiiPKfS0_Pf
.LBB115_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipGetLastError                 # TAILCALL
.Lfunc_end115:
	.size	_matrixVectorColumnHprod, .Lfunc_end115-_matrixVectorColumnHprod
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB116_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB116_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12sliceColumnsiiPKiPKfPf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24sliceColumnsAndTransposeiiPKiPKfPf, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14sliceRowsBatchPKiiiPKfiiPrPf, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12columnArgmaxiiPKfPi, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8hprodSumiiPKfS0_Pf, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8sumHprodiPKfS0_S0_S0_Pf, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8sumHprodiPKfS0_S0_S0_S0_Pf, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15hadamardProductiPKfS0_Pf, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15hadamardProductiPKfS0_S0_Pf, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18addHadamardProductiPKfS0_fPf, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18addHadamardProductiPKfS0_S0_fPf, %esi
	movl	$.L__unnamed_13, %edx
	movl	$.L__unnamed_13, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24addScaledHadamardProductiPKfS0_ffPf, %esi
	movl	$.L__unnamed_14, %edx
	movl	$.L__unnamed_14, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21addScaledColumnsSliceiifPKfPKiPf, %esi
	movl	$.L__unnamed_15, %edx
	movl	$.L__unnamed_15, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18addScaledRowsSliceiifPKfPKiiPf, %esi
	movl	$.L__unnamed_16, %edx
	movl	$.L__unnamed_16, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9assignSumiPPKfiPf, %esi
	movl	$.L__unnamed_17, %edx
	movl	$.L__unnamed_17, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6addSumiPPKfiPf, %esi
	movl	$.L__unnamed_18, %edx
	movl	$.L__unnamed_18, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5scaleiPKffPf, %esi
	movl	$.L__unnamed_19, %edx
	movl	$.L__unnamed_19, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4fillifPf, %esi
	movl	$.L__unnamed_20, %edx
	movl	$.L__unnamed_20, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10maskedFillifPKffPf, %esi
	movl	$.L__unnamed_21, %edx
	movl	$.L__unnamed_21, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23matrixVectorRowAdditioniiPKffS0_Pf, %esi
	movl	$.L__unnamed_22, %edx
	movl	$.L__unnamed_22, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20assignScaledAdditionifPKfS0_Pf, %esi
	movl	$.L__unnamed_23, %edx
	movl	$.L__unnamed_23, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23assignScaledSubtractionifPKfS0_Pf, %esi
	movl	$.L__unnamed_24, %edx
	movl	$.L__unnamed_24, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20addScaledSubtractionifPKfS0_Pf, %esi
	movl	$.L__unnamed_25, %edx
	movl	$.L__unnamed_25, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19softmaxCeDerivativeiiPKfPKiPf, %esi
	movl	$.L__unnamed_26, %edx
	movl	$.L__unnamed_26, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22addSoftmaxCeDerivativeiiPKfPKiPf, %esi
	movl	$.L__unnamed_27, %edx
	movl	$.L__unnamed_27, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z27assignSequentialMeanPoolingiiPPKfiPf, %esi
	movl	$.L__unnamed_28, %edx
	movl	$.L__unnamed_28, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z26assignSequentialSumPoolingiiPPKfiPf, %esi
	movl	$.L__unnamed_29, %edx
	movl	$.L__unnamed_29, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z27assignSequentialWeightedSumiiPPKfS0_iPf, %esi
	movl	$.L__unnamed_30, %edx
	movl	$.L__unnamed_30, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16sequentiallyTileiPKfPPfi, %esi
	movl	$.L__unnamed_31, %edx
	movl	$.L__unnamed_31, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13assignDLDpreaiiPPKfS0_S0_iPf, %esi
	movl	$.L__unnamed_32, %edx
	movl	$.L__unnamed_32, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22addAttentionDerivativeiiPPKfS0_iPf, %esi
	movl	$.L__unnamed_33, %edx
	movl	$.L__unnamed_33, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16addAttentionTileiiPKfS0_S0_S0_iPPf, %esi
	movl	$.L__unnamed_34, %edx
	movl	$.L__unnamed_34, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7dropoutifPKfS0_Pf, %esi
	movl	$.L__unnamed_35, %edx
	movl	$.L__unnamed_35, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9maskZerosiPKfS0_Pf, %esi
	movl	$.L__unnamed_36, %edx
	movl	$.L__unnamed_36, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12addMaskZerosiPKfS0_Pf, %esi
	movl	$.L__unnamed_37, %edx
	movl	$.L__unnamed_37, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20assignMaskedAdditioniPKfS0_S0_Pf, %esi
	movl	$.L__unnamed_38, %edx
	movl	$.L__unnamed_38, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf, %esi
	movl	$.L__unnamed_39, %edx
	movl	$.L__unnamed_39, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20addHprodOneMinusMaskiPKfS0_Pf, %esi
	movl	$.L__unnamed_40, %edx
	movl	$.L__unnamed_40, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf, %esi
	movl	$.L__unnamed_41, %edx
	movl	$.L__unnamed_41, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23matrixVectorColumnHprodiiPKfS0_Pf, %esi
	movl	$.L__unnamed_42, %edx
	movl	$.L__unnamed_42, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24maskColumnNumbersRowWiseiiPKiPf, %esi
	movl	$.L__unnamed_43, %edx
	movl	$.L__unnamed_43, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20batchHorizontalStackiiiiPPKfS1_PPf, %esi
	movl	$.L__unnamed_44, %edx
	movl	$.L__unnamed_44, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20batchHorizontalSplitiiiiPPKfPPfS3_, %esi
	movl	$.L__unnamed_45, %edx
	movl	$.L__unnamed_45, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14repeatAlongRowiiiPKfPf, %esi
	movl	$.L__unnamed_46, %edx
	movl	$.L__unnamed_46, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z27addRepeatAlongRowDerivativeiPKfiiPf, %esi
	movl	$.L__unnamed_47, %edx
	movl	$.L__unnamed_47, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14repeatAlongColiiiPKfPf, %esi
	movl	$.L__unnamed_48, %edx
	movl	$.L__unnamed_48, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z27addRepeatAlongColDerivativeiPKfiiPf, %esi
	movl	$.L__unnamed_49, %edx
	movl	$.L__unnamed_49, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16addScaledDivSqrtifPKfS0_fPf, %esi
	movl	$.L__unnamed_50, %edx
	movl	$.L__unnamed_50, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4clipiffPKfPf, %esi
	movl	$.L__unnamed_51, %edx
	movl	$.L__unnamed_51, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9transposeIfEviiPKT_PS0_, %esi
	movl	$.L__unnamed_52, %edx
	movl	$.L__unnamed_52, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movq	$0, 24(%rsp)
	movq	$0, 16(%rsp)
	movq	$0, 8(%rsp)
	movq	$0, (%rsp)
	movl	$_Z9transposeIiEviiPKT_PS0_, %esi
	movl	$.L__unnamed_53, %edx
	movl	$.L__unnamed_53, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movq	$0, 24(%rsp)
	movq	$0, 16(%rsp)
	movq	$0, 8(%rsp)
	movq	$0, (%rsp)
	movl	$_Z9sliceRowsIfEviPKiPKT_iiPS2_, %esi
	movl	$.L__unnamed_54, %edx
	movl	$.L__unnamed_54, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movq	$0, 24(%rsp)
	movq	$0, 16(%rsp)
	movq	$0, 8(%rsp)
	movq	$0, (%rsp)
	movl	$_Z9sliceRowsIiEviPKiPKT_iiPS2_, %esi
	movl	$.L__unnamed_55, %edx
	movl	$.L__unnamed_55, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end116:
	.size	__hip_module_ctor, .Lfunc_end116-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB117_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB117_2:
	retq
.Lfunc_end117:
	.size	__hip_module_dtor, .Lfunc_end117-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12sliceColumnsiiPKiPKfPf,@object # @_Z12sliceColumnsiiPKiPKfPf
	.section	.rodata,"a",@progbits
	.globl	_Z12sliceColumnsiiPKiPKfPf
	.p2align	3, 0x0
_Z12sliceColumnsiiPKiPKfPf:
	.quad	_Z27__device_stub__sliceColumnsiiPKiPKfPf
	.size	_Z12sliceColumnsiiPKiPKfPf, 8

	.type	_Z24sliceColumnsAndTransposeiiPKiPKfPf,@object # @_Z24sliceColumnsAndTransposeiiPKiPKfPf
	.globl	_Z24sliceColumnsAndTransposeiiPKiPKfPf
	.p2align	3, 0x0
_Z24sliceColumnsAndTransposeiiPKiPKfPf:
	.quad	_Z39__device_stub__sliceColumnsAndTransposeiiPKiPKfPf
	.size	_Z24sliceColumnsAndTransposeiiPKiPKfPf, 8

	.type	_Z14sliceRowsBatchPKiiiPKfiiPrPf,@object # @_Z14sliceRowsBatchPKiiiPKfiiPrPf
	.globl	_Z14sliceRowsBatchPKiiiPKfiiPrPf
	.p2align	3, 0x0
_Z14sliceRowsBatchPKiiiPKfiiPrPf:
	.quad	_Z29__device_stub__sliceRowsBatchPKiiiPKfiiPrPf
	.size	_Z14sliceRowsBatchPKiiiPKfiiPrPf, 8

	.type	_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf,@object # @_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf
	.globl	_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf
	.p2align	3, 0x0
_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf:
	.quad	_Z39__device_stub__slicedRowsBatchScaledAddPKiiifPrPKfiiPf
	.size	_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf, 8

	.type	_Z12columnArgmaxiiPKfPi,@object # @_Z12columnArgmaxiiPKfPi
	.globl	_Z12columnArgmaxiiPKfPi
	.p2align	3, 0x0
_Z12columnArgmaxiiPKfPi:
	.quad	_Z27__device_stub__columnArgmaxiiPKfPi
	.size	_Z12columnArgmaxiiPKfPi, 8

	.type	_Z8hprodSumiiPKfS0_Pf,@object   # @_Z8hprodSumiiPKfS0_Pf
	.globl	_Z8hprodSumiiPKfS0_Pf
	.p2align	3, 0x0
_Z8hprodSumiiPKfS0_Pf:
	.quad	_Z23__device_stub__hprodSumiiPKfS0_Pf
	.size	_Z8hprodSumiiPKfS0_Pf, 8

	.type	_Z8sumHprodiPKfS0_S0_S0_Pf,@object # @_Z8sumHprodiPKfS0_S0_S0_Pf
	.globl	_Z8sumHprodiPKfS0_S0_S0_Pf
	.p2align	3, 0x0
_Z8sumHprodiPKfS0_S0_S0_Pf:
	.quad	_Z23__device_stub__sumHprodiPKfS0_S0_S0_Pf
	.size	_Z8sumHprodiPKfS0_S0_S0_Pf, 8

	.type	_Z8sumHprodiPKfS0_S0_S0_S0_Pf,@object # @_Z8sumHprodiPKfS0_S0_S0_S0_Pf
	.globl	_Z8sumHprodiPKfS0_S0_S0_S0_Pf
	.p2align	3, 0x0
_Z8sumHprodiPKfS0_S0_S0_S0_Pf:
	.quad	_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_Pf
	.size	_Z8sumHprodiPKfS0_S0_S0_S0_Pf, 8

	.type	_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf,@object # @_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	.globl	_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	.p2align	3, 0x0
_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf:
	.quad	_Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	.size	_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf, 8

	.type	_Z15hadamardProductiPKfS0_Pf,@object # @_Z15hadamardProductiPKfS0_Pf
	.globl	_Z15hadamardProductiPKfS0_Pf
	.p2align	3, 0x0
_Z15hadamardProductiPKfS0_Pf:
	.quad	_Z30__device_stub__hadamardProductiPKfS0_Pf
	.size	_Z15hadamardProductiPKfS0_Pf, 8

	.type	_Z15hadamardProductiPKfS0_S0_Pf,@object # @_Z15hadamardProductiPKfS0_S0_Pf
	.globl	_Z15hadamardProductiPKfS0_S0_Pf
	.p2align	3, 0x0
_Z15hadamardProductiPKfS0_S0_Pf:
	.quad	_Z30__device_stub__hadamardProductiPKfS0_S0_Pf
	.size	_Z15hadamardProductiPKfS0_S0_Pf, 8

	.type	_Z18addHadamardProductiPKfS0_fPf,@object # @_Z18addHadamardProductiPKfS0_fPf
	.globl	_Z18addHadamardProductiPKfS0_fPf
	.p2align	3, 0x0
_Z18addHadamardProductiPKfS0_fPf:
	.quad	_Z33__device_stub__addHadamardProductiPKfS0_fPf
	.size	_Z18addHadamardProductiPKfS0_fPf, 8

	.type	_Z18addHadamardProductiPKfS0_S0_fPf,@object # @_Z18addHadamardProductiPKfS0_S0_fPf
	.globl	_Z18addHadamardProductiPKfS0_S0_fPf
	.p2align	3, 0x0
_Z18addHadamardProductiPKfS0_S0_fPf:
	.quad	_Z33__device_stub__addHadamardProductiPKfS0_S0_fPf
	.size	_Z18addHadamardProductiPKfS0_S0_fPf, 8

	.type	_Z24addScaledHadamardProductiPKfS0_ffPf,@object # @_Z24addScaledHadamardProductiPKfS0_ffPf
	.globl	_Z24addScaledHadamardProductiPKfS0_ffPf
	.p2align	3, 0x0
_Z24addScaledHadamardProductiPKfS0_ffPf:
	.quad	_Z39__device_stub__addScaledHadamardProductiPKfS0_ffPf
	.size	_Z24addScaledHadamardProductiPKfS0_ffPf, 8

	.type	_Z21addScaledColumnsSliceiifPKfPKiPf,@object # @_Z21addScaledColumnsSliceiifPKfPKiPf
	.globl	_Z21addScaledColumnsSliceiifPKfPKiPf
	.p2align	3, 0x0
_Z21addScaledColumnsSliceiifPKfPKiPf:
	.quad	_Z36__device_stub__addScaledColumnsSliceiifPKfPKiPf
	.size	_Z21addScaledColumnsSliceiifPKfPKiPf, 8

	.type	_Z18addScaledRowsSliceiifPKfPKiiPf,@object # @_Z18addScaledRowsSliceiifPKfPKiiPf
	.globl	_Z18addScaledRowsSliceiifPKfPKiiPf
	.p2align	3, 0x0
_Z18addScaledRowsSliceiifPKfPKiiPf:
	.quad	_Z33__device_stub__addScaledRowsSliceiifPKfPKiiPf
	.size	_Z18addScaledRowsSliceiifPKfPKiiPf, 8

	.type	_Z9assignSumiPPKfiPf,@object    # @_Z9assignSumiPPKfiPf
	.globl	_Z9assignSumiPPKfiPf
	.p2align	3, 0x0
_Z9assignSumiPPKfiPf:
	.quad	_Z24__device_stub__assignSumiPPKfiPf
	.size	_Z9assignSumiPPKfiPf, 8

	.type	_Z6addSumiPPKfiPf,@object       # @_Z6addSumiPPKfiPf
	.globl	_Z6addSumiPPKfiPf
	.p2align	3, 0x0
_Z6addSumiPPKfiPf:
	.quad	_Z21__device_stub__addSumiPPKfiPf
	.size	_Z6addSumiPPKfiPf, 8

	.type	_Z5scaleiPKffPf,@object         # @_Z5scaleiPKffPf
	.globl	_Z5scaleiPKffPf
	.p2align	3, 0x0
_Z5scaleiPKffPf:
	.quad	_Z20__device_stub__scaleiPKffPf
	.size	_Z5scaleiPKffPf, 8

	.type	_Z4fillifPf,@object             # @_Z4fillifPf
	.globl	_Z4fillifPf
	.p2align	3, 0x0
_Z4fillifPf:
	.quad	_Z19__device_stub__fillifPf
	.size	_Z4fillifPf, 8

	.type	_Z10maskedFillifPKffPf,@object  # @_Z10maskedFillifPKffPf
	.globl	_Z10maskedFillifPKffPf
	.p2align	3, 0x0
_Z10maskedFillifPKffPf:
	.quad	_Z25__device_stub__maskedFillifPKffPf
	.size	_Z10maskedFillifPKffPf, 8

	.type	_Z23matrixVectorRowAdditioniiPKffS0_Pf,@object # @_Z23matrixVectorRowAdditioniiPKffS0_Pf
	.globl	_Z23matrixVectorRowAdditioniiPKffS0_Pf
	.p2align	3, 0x0
_Z23matrixVectorRowAdditioniiPKffS0_Pf:
	.quad	_Z38__device_stub__matrixVectorRowAdditioniiPKffS0_Pf
	.size	_Z23matrixVectorRowAdditioniiPKffS0_Pf, 8

	.type	_Z20assignScaledAdditionifPKfS0_Pf,@object # @_Z20assignScaledAdditionifPKfS0_Pf
	.globl	_Z20assignScaledAdditionifPKfS0_Pf
	.p2align	3, 0x0
_Z20assignScaledAdditionifPKfS0_Pf:
	.quad	_Z35__device_stub__assignScaledAdditionifPKfS0_Pf
	.size	_Z20assignScaledAdditionifPKfS0_Pf, 8

	.type	_Z23assignScaledSubtractionifPKfS0_Pf,@object # @_Z23assignScaledSubtractionifPKfS0_Pf
	.globl	_Z23assignScaledSubtractionifPKfS0_Pf
	.p2align	3, 0x0
_Z23assignScaledSubtractionifPKfS0_Pf:
	.quad	_Z38__device_stub__assignScaledSubtractionifPKfS0_Pf
	.size	_Z23assignScaledSubtractionifPKfS0_Pf, 8

	.type	_Z20addScaledSubtractionifPKfS0_Pf,@object # @_Z20addScaledSubtractionifPKfS0_Pf
	.globl	_Z20addScaledSubtractionifPKfS0_Pf
	.p2align	3, 0x0
_Z20addScaledSubtractionifPKfS0_Pf:
	.quad	_Z35__device_stub__addScaledSubtractionifPKfS0_Pf
	.size	_Z20addScaledSubtractionifPKfS0_Pf, 8

	.type	_Z19softmaxCeDerivativeiiPKfPKiPf,@object # @_Z19softmaxCeDerivativeiiPKfPKiPf
	.globl	_Z19softmaxCeDerivativeiiPKfPKiPf
	.p2align	3, 0x0
_Z19softmaxCeDerivativeiiPKfPKiPf:
	.quad	_Z34__device_stub__softmaxCeDerivativeiiPKfPKiPf
	.size	_Z19softmaxCeDerivativeiiPKfPKiPf, 8

	.type	_Z22addSoftmaxCeDerivativeiiPKfPKiPf,@object # @_Z22addSoftmaxCeDerivativeiiPKfPKiPf
	.globl	_Z22addSoftmaxCeDerivativeiiPKfPKiPf
	.p2align	3, 0x0
_Z22addSoftmaxCeDerivativeiiPKfPKiPf:
	.quad	_Z37__device_stub__addSoftmaxCeDerivativeiiPKfPKiPf
	.size	_Z22addSoftmaxCeDerivativeiiPKfPKiPf, 8

	.type	_Z27assignSequentialMeanPoolingiiPPKfiPf,@object # @_Z27assignSequentialMeanPoolingiiPPKfiPf
	.globl	_Z27assignSequentialMeanPoolingiiPPKfiPf
	.p2align	3, 0x0
_Z27assignSequentialMeanPoolingiiPPKfiPf:
	.quad	_Z42__device_stub__assignSequentialMeanPoolingiiPPKfiPf
	.size	_Z27assignSequentialMeanPoolingiiPPKfiPf, 8

	.type	_Z26assignSequentialSumPoolingiiPPKfiPf,@object # @_Z26assignSequentialSumPoolingiiPPKfiPf
	.globl	_Z26assignSequentialSumPoolingiiPPKfiPf
	.p2align	3, 0x0
_Z26assignSequentialSumPoolingiiPPKfiPf:
	.quad	_Z41__device_stub__assignSequentialSumPoolingiiPPKfiPf
	.size	_Z26assignSequentialSumPoolingiiPPKfiPf, 8

	.type	_Z27assignSequentialWeightedSumiiPPKfS0_iPf,@object # @_Z27assignSequentialWeightedSumiiPPKfS0_iPf
	.globl	_Z27assignSequentialWeightedSumiiPPKfS0_iPf
	.p2align	3, 0x0
_Z27assignSequentialWeightedSumiiPPKfS0_iPf:
	.quad	_Z42__device_stub__assignSequentialWeightedSumiiPPKfS0_iPf
	.size	_Z27assignSequentialWeightedSumiiPPKfS0_iPf, 8

	.type	_Z16sequentiallyTileiPKfPPfi,@object # @_Z16sequentiallyTileiPKfPPfi
	.globl	_Z16sequentiallyTileiPKfPPfi
	.p2align	3, 0x0
_Z16sequentiallyTileiPKfPPfi:
	.quad	_Z31__device_stub__sequentiallyTileiPKfPPfi
	.size	_Z16sequentiallyTileiPKfPPfi, 8

	.type	_Z13assignDLDpreaiiPPKfS0_S0_iPf,@object # @_Z13assignDLDpreaiiPPKfS0_S0_iPf
	.globl	_Z13assignDLDpreaiiPPKfS0_S0_iPf
	.p2align	3, 0x0
_Z13assignDLDpreaiiPPKfS0_S0_iPf:
	.quad	_Z28__device_stub__assignDLDpreaiiPPKfS0_S0_iPf
	.size	_Z13assignDLDpreaiiPPKfS0_S0_iPf, 8

	.type	_Z22addAttentionDerivativeiiPPKfS0_iPf,@object # @_Z22addAttentionDerivativeiiPPKfS0_iPf
	.globl	_Z22addAttentionDerivativeiiPPKfS0_iPf
	.p2align	3, 0x0
_Z22addAttentionDerivativeiiPPKfS0_iPf:
	.quad	_Z37__device_stub__addAttentionDerivativeiiPPKfS0_iPf
	.size	_Z22addAttentionDerivativeiiPPKfS0_iPf, 8

	.type	_Z16addAttentionTileiiPKfS0_S0_S0_iPPf,@object # @_Z16addAttentionTileiiPKfS0_S0_S0_iPPf
	.globl	_Z16addAttentionTileiiPKfS0_S0_S0_iPPf
	.p2align	3, 0x0
_Z16addAttentionTileiiPKfS0_S0_S0_iPPf:
	.quad	_Z31__device_stub__addAttentionTileiiPKfS0_S0_S0_iPPf
	.size	_Z16addAttentionTileiiPKfS0_S0_S0_iPPf, 8

	.type	_Z7dropoutifPKfS0_Pf,@object    # @_Z7dropoutifPKfS0_Pf
	.globl	_Z7dropoutifPKfS0_Pf
	.p2align	3, 0x0
_Z7dropoutifPKfS0_Pf:
	.quad	_Z22__device_stub__dropoutifPKfS0_Pf
	.size	_Z7dropoutifPKfS0_Pf, 8

	.type	_Z9maskZerosiPKfS0_Pf,@object   # @_Z9maskZerosiPKfS0_Pf
	.globl	_Z9maskZerosiPKfS0_Pf
	.p2align	3, 0x0
_Z9maskZerosiPKfS0_Pf:
	.quad	_Z24__device_stub__maskZerosiPKfS0_Pf
	.size	_Z9maskZerosiPKfS0_Pf, 8

	.type	_Z12addMaskZerosiPKfS0_Pf,@object # @_Z12addMaskZerosiPKfS0_Pf
	.globl	_Z12addMaskZerosiPKfS0_Pf
	.p2align	3, 0x0
_Z12addMaskZerosiPKfS0_Pf:
	.quad	_Z27__device_stub__addMaskZerosiPKfS0_Pf
	.size	_Z12addMaskZerosiPKfS0_Pf, 8

	.type	_Z20assignMaskedAdditioniPKfS0_S0_Pf,@object # @_Z20assignMaskedAdditioniPKfS0_S0_Pf
	.globl	_Z20assignMaskedAdditioniPKfS0_S0_Pf
	.p2align	3, 0x0
_Z20assignMaskedAdditioniPKfS0_S0_Pf:
	.quad	_Z35__device_stub__assignMaskedAdditioniPKfS0_S0_Pf
	.size	_Z20assignMaskedAdditioniPKfS0_S0_Pf, 8

	.type	_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf,@object # @_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
	.globl	_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
	.p2align	3, 0x0
_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf:
	.quad	_Z52__device_stub__assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
	.size	_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf, 8

	.type	_Z20addHprodOneMinusMaskiPKfS0_Pf,@object # @_Z20addHprodOneMinusMaskiPKfS0_Pf
	.globl	_Z20addHprodOneMinusMaskiPKfS0_Pf
	.p2align	3, 0x0
_Z20addHprodOneMinusMaskiPKfS0_Pf:
	.quad	_Z35__device_stub__addHprodOneMinusMaskiPKfS0_Pf
	.size	_Z20addHprodOneMinusMaskiPKfS0_Pf, 8

	.type	_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf,@object # @_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
	.globl	_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
	.p2align	3, 0x0
_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf:
	.quad	_Z52__device_stub__addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
	.size	_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf, 8

	.type	_Z23matrixVectorColumnHprodiiPKfS0_Pf,@object # @_Z23matrixVectorColumnHprodiiPKfS0_Pf
	.globl	_Z23matrixVectorColumnHprodiiPKfS0_Pf
	.p2align	3, 0x0
_Z23matrixVectorColumnHprodiiPKfS0_Pf:
	.quad	_Z38__device_stub__matrixVectorColumnHprodiiPKfS0_Pf
	.size	_Z23matrixVectorColumnHprodiiPKfS0_Pf, 8

	.type	_Z24maskColumnNumbersRowWiseiiPKiPf,@object # @_Z24maskColumnNumbersRowWiseiiPKiPf
	.globl	_Z24maskColumnNumbersRowWiseiiPKiPf
	.p2align	3, 0x0
_Z24maskColumnNumbersRowWiseiiPKiPf:
	.quad	_Z39__device_stub__maskColumnNumbersRowWiseiiPKiPf
	.size	_Z24maskColumnNumbersRowWiseiiPKiPf, 8

	.type	_Z20batchHorizontalStackiiiiPPKfS1_PPf,@object # @_Z20batchHorizontalStackiiiiPPKfS1_PPf
	.globl	_Z20batchHorizontalStackiiiiPPKfS1_PPf
	.p2align	3, 0x0
_Z20batchHorizontalStackiiiiPPKfS1_PPf:
	.quad	_Z35__device_stub__batchHorizontalStackiiiiPPKfS1_PPf
	.size	_Z20batchHorizontalStackiiiiPPKfS1_PPf, 8

	.type	_Z20batchHorizontalSplitiiiiPPKfPPfS3_,@object # @_Z20batchHorizontalSplitiiiiPPKfPPfS3_
	.globl	_Z20batchHorizontalSplitiiiiPPKfPPfS3_
	.p2align	3, 0x0
_Z20batchHorizontalSplitiiiiPPKfPPfS3_:
	.quad	_Z35__device_stub__batchHorizontalSplitiiiiPPKfPPfS3_
	.size	_Z20batchHorizontalSplitiiiiPPKfPPfS3_, 8

	.type	_Z14repeatAlongRowiiiPKfPf,@object # @_Z14repeatAlongRowiiiPKfPf
	.globl	_Z14repeatAlongRowiiiPKfPf
	.p2align	3, 0x0
_Z14repeatAlongRowiiiPKfPf:
	.quad	_Z29__device_stub__repeatAlongRowiiiPKfPf
	.size	_Z14repeatAlongRowiiiPKfPf, 8

	.type	_Z27addRepeatAlongRowDerivativeiPKfiiPf,@object # @_Z27addRepeatAlongRowDerivativeiPKfiiPf
	.globl	_Z27addRepeatAlongRowDerivativeiPKfiiPf
	.p2align	3, 0x0
_Z27addRepeatAlongRowDerivativeiPKfiiPf:
	.quad	_Z42__device_stub__addRepeatAlongRowDerivativeiPKfiiPf
	.size	_Z27addRepeatAlongRowDerivativeiPKfiiPf, 8

	.type	_Z14repeatAlongColiiiPKfPf,@object # @_Z14repeatAlongColiiiPKfPf
	.globl	_Z14repeatAlongColiiiPKfPf
	.p2align	3, 0x0
_Z14repeatAlongColiiiPKfPf:
	.quad	_Z29__device_stub__repeatAlongColiiiPKfPf
	.size	_Z14repeatAlongColiiiPKfPf, 8

	.type	_Z27addRepeatAlongColDerivativeiPKfiiPf,@object # @_Z27addRepeatAlongColDerivativeiPKfiiPf
	.globl	_Z27addRepeatAlongColDerivativeiPKfiiPf
	.p2align	3, 0x0
_Z27addRepeatAlongColDerivativeiPKfiiPf:
	.quad	_Z42__device_stub__addRepeatAlongColDerivativeiPKfiiPf
	.size	_Z27addRepeatAlongColDerivativeiPKfiiPf, 8

	.type	_Z16addScaledDivSqrtifPKfS0_fPf,@object # @_Z16addScaledDivSqrtifPKfS0_fPf
	.globl	_Z16addScaledDivSqrtifPKfS0_fPf
	.p2align	3, 0x0
_Z16addScaledDivSqrtifPKfS0_fPf:
	.quad	_Z31__device_stub__addScaledDivSqrtifPKfS0_fPf
	.size	_Z16addScaledDivSqrtifPKfS0_fPf, 8

	.type	_Z4clipiffPKfPf,@object         # @_Z4clipiffPKfPf
	.globl	_Z4clipiffPKfPf
	.p2align	3, 0x0
_Z4clipiffPKfPf:
	.quad	_Z19__device_stub__clipiffPKfPf
	.size	_Z4clipiffPKfPf, 8

	.type	_Z9transposeIfEviiPKT_PS0_,@object # @_Z9transposeIfEviiPKT_PS0_
	.section	.rodata._Z9transposeIfEviiPKT_PS0_,"aG",@progbits,_Z9transposeIfEviiPKT_PS0_,comdat
	.weak	_Z9transposeIfEviiPKT_PS0_
	.p2align	3, 0x0
_Z9transposeIfEviiPKT_PS0_:
	.quad	_Z24__device_stub__transposeIfEviiPKT_PS0_
	.size	_Z9transposeIfEviiPKT_PS0_, 8

	.type	_Z9transposeIiEviiPKT_PS0_,@object # @_Z9transposeIiEviiPKT_PS0_
	.section	.rodata._Z9transposeIiEviiPKT_PS0_,"aG",@progbits,_Z9transposeIiEviiPKT_PS0_,comdat
	.weak	_Z9transposeIiEviiPKT_PS0_
	.p2align	3, 0x0
_Z9transposeIiEviiPKT_PS0_:
	.quad	_Z24__device_stub__transposeIiEviiPKT_PS0_
	.size	_Z9transposeIiEviiPKT_PS0_, 8

	.type	_Z9sliceRowsIfEviPKiPKT_iiPS2_,@object # @_Z9sliceRowsIfEviPKiPKT_iiPS2_
	.section	.rodata._Z9sliceRowsIfEviPKiPKT_iiPS2_,"aG",@progbits,_Z9sliceRowsIfEviPKiPKT_iiPS2_,comdat
	.weak	_Z9sliceRowsIfEviPKiPKT_iiPS2_
	.p2align	3, 0x0
_Z9sliceRowsIfEviPKiPKT_iiPS2_:
	.quad	_Z24__device_stub__sliceRowsIfEviPKiPKT_iiPS2_
	.size	_Z9sliceRowsIfEviPKiPKT_iiPS2_, 8

	.type	_Z9sliceRowsIiEviPKiPKT_iiPS2_,@object # @_Z9sliceRowsIiEviPKiPKT_iiPS2_
	.section	.rodata._Z9sliceRowsIiEviPKiPKT_iiPS2_,"aG",@progbits,_Z9sliceRowsIiEviPKiPKT_iiPS2_,comdat
	.weak	_Z9sliceRowsIiEviPKiPKT_iiPS2_
	.p2align	3, 0x0
_Z9sliceRowsIiEviPKiPKT_iiPS2_:
	.quad	_Z24__device_stub__sliceRowsIiEviPKiPKT_iiPS2_
	.size	_Z9sliceRowsIiEviPKiPKT_iiPS2_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z12sliceColumnsiiPKiPKfPf"
	.size	.L__unnamed_1, 27

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z24sliceColumnsAndTransposeiiPKiPKfPf"
	.size	.L__unnamed_2, 39

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z14sliceRowsBatchPKiiiPKfiiPrPf"
	.size	.L__unnamed_3, 33

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf"
	.size	.L__unnamed_4, 44

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z12columnArgmaxiiPKfPi"
	.size	.L__unnamed_5, 24

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z8hprodSumiiPKfS0_Pf"
	.size	.L__unnamed_6, 22

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z8sumHprodiPKfS0_S0_S0_Pf"
	.size	.L__unnamed_7, 27

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z8sumHprodiPKfS0_S0_S0_S0_Pf"
	.size	.L__unnamed_8, 30

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf"
	.size	.L__unnamed_9, 48

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"_Z15hadamardProductiPKfS0_Pf"
	.size	.L__unnamed_10, 29

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"_Z15hadamardProductiPKfS0_S0_Pf"
	.size	.L__unnamed_11, 32

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"_Z18addHadamardProductiPKfS0_fPf"
	.size	.L__unnamed_12, 33

	.type	.L__unnamed_13,@object          # @12
.L__unnamed_13:
	.asciz	"_Z18addHadamardProductiPKfS0_S0_fPf"
	.size	.L__unnamed_13, 36

	.type	.L__unnamed_14,@object          # @13
.L__unnamed_14:
	.asciz	"_Z24addScaledHadamardProductiPKfS0_ffPf"
	.size	.L__unnamed_14, 40

	.type	.L__unnamed_15,@object          # @14
.L__unnamed_15:
	.asciz	"_Z21addScaledColumnsSliceiifPKfPKiPf"
	.size	.L__unnamed_15, 37

	.type	.L__unnamed_16,@object          # @15
.L__unnamed_16:
	.asciz	"_Z18addScaledRowsSliceiifPKfPKiiPf"
	.size	.L__unnamed_16, 35

	.type	.L__unnamed_17,@object          # @16
.L__unnamed_17:
	.asciz	"_Z9assignSumiPPKfiPf"
	.size	.L__unnamed_17, 21

	.type	.L__unnamed_18,@object          # @17
.L__unnamed_18:
	.asciz	"_Z6addSumiPPKfiPf"
	.size	.L__unnamed_18, 18

	.type	.L__unnamed_19,@object          # @18
.L__unnamed_19:
	.asciz	"_Z5scaleiPKffPf"
	.size	.L__unnamed_19, 16

	.type	.L__unnamed_20,@object          # @19
.L__unnamed_20:
	.asciz	"_Z4fillifPf"
	.size	.L__unnamed_20, 12

	.type	.L__unnamed_21,@object          # @20
.L__unnamed_21:
	.asciz	"_Z10maskedFillifPKffPf"
	.size	.L__unnamed_21, 23

	.type	.L__unnamed_22,@object          # @21
.L__unnamed_22:
	.asciz	"_Z23matrixVectorRowAdditioniiPKffS0_Pf"
	.size	.L__unnamed_22, 39

	.type	.L__unnamed_23,@object          # @22
.L__unnamed_23:
	.asciz	"_Z20assignScaledAdditionifPKfS0_Pf"
	.size	.L__unnamed_23, 35

	.type	.L__unnamed_24,@object          # @23
.L__unnamed_24:
	.asciz	"_Z23assignScaledSubtractionifPKfS0_Pf"
	.size	.L__unnamed_24, 38

	.type	.L__unnamed_25,@object          # @24
.L__unnamed_25:
	.asciz	"_Z20addScaledSubtractionifPKfS0_Pf"
	.size	.L__unnamed_25, 35

	.type	.L__unnamed_26,@object          # @25
.L__unnamed_26:
	.asciz	"_Z19softmaxCeDerivativeiiPKfPKiPf"
	.size	.L__unnamed_26, 34

	.type	.L__unnamed_27,@object          # @26
.L__unnamed_27:
	.asciz	"_Z22addSoftmaxCeDerivativeiiPKfPKiPf"
	.size	.L__unnamed_27, 37

	.type	.L__unnamed_28,@object          # @27
.L__unnamed_28:
	.asciz	"_Z27assignSequentialMeanPoolingiiPPKfiPf"
	.size	.L__unnamed_28, 41

	.type	.L__unnamed_29,@object          # @28
.L__unnamed_29:
	.asciz	"_Z26assignSequentialSumPoolingiiPPKfiPf"
	.size	.L__unnamed_29, 40

	.type	.L__unnamed_30,@object          # @29
.L__unnamed_30:
	.asciz	"_Z27assignSequentialWeightedSumiiPPKfS0_iPf"
	.size	.L__unnamed_30, 44

	.type	.L__unnamed_31,@object          # @30
.L__unnamed_31:
	.asciz	"_Z16sequentiallyTileiPKfPPfi"
	.size	.L__unnamed_31, 29

	.type	.L__unnamed_32,@object          # @31
.L__unnamed_32:
	.asciz	"_Z13assignDLDpreaiiPPKfS0_S0_iPf"
	.size	.L__unnamed_32, 33

	.type	.L__unnamed_33,@object          # @32
.L__unnamed_33:
	.asciz	"_Z22addAttentionDerivativeiiPPKfS0_iPf"
	.size	.L__unnamed_33, 39

	.type	.L__unnamed_34,@object          # @33
.L__unnamed_34:
	.asciz	"_Z16addAttentionTileiiPKfS0_S0_S0_iPPf"
	.size	.L__unnamed_34, 39

	.type	.L__unnamed_35,@object          # @34
.L__unnamed_35:
	.asciz	"_Z7dropoutifPKfS0_Pf"
	.size	.L__unnamed_35, 21

	.type	.L__unnamed_36,@object          # @35
.L__unnamed_36:
	.asciz	"_Z9maskZerosiPKfS0_Pf"
	.size	.L__unnamed_36, 22

	.type	.L__unnamed_37,@object          # @36
.L__unnamed_37:
	.asciz	"_Z12addMaskZerosiPKfS0_Pf"
	.size	.L__unnamed_37, 26

	.type	.L__unnamed_38,@object          # @37
.L__unnamed_38:
	.asciz	"_Z20assignMaskedAdditioniPKfS0_S0_Pf"
	.size	.L__unnamed_38, 37

	.type	.L__unnamed_39,@object          # @38
.L__unnamed_39:
	.asciz	"_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf"
	.size	.L__unnamed_39, 55

	.type	.L__unnamed_40,@object          # @39
.L__unnamed_40:
	.asciz	"_Z20addHprodOneMinusMaskiPKfS0_Pf"
	.size	.L__unnamed_40, 34

	.type	.L__unnamed_41,@object          # @40
.L__unnamed_41:
	.asciz	"_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf"
	.size	.L__unnamed_41, 52

	.type	.L__unnamed_42,@object          # @41
.L__unnamed_42:
	.asciz	"_Z23matrixVectorColumnHprodiiPKfS0_Pf"
	.size	.L__unnamed_42, 38

	.type	.L__unnamed_43,@object          # @42
.L__unnamed_43:
	.asciz	"_Z24maskColumnNumbersRowWiseiiPKiPf"
	.size	.L__unnamed_43, 36

	.type	.L__unnamed_44,@object          # @43
.L__unnamed_44:
	.asciz	"_Z20batchHorizontalStackiiiiPPKfS1_PPf"
	.size	.L__unnamed_44, 39

	.type	.L__unnamed_45,@object          # @44
.L__unnamed_45:
	.asciz	"_Z20batchHorizontalSplitiiiiPPKfPPfS3_"
	.size	.L__unnamed_45, 39

	.type	.L__unnamed_46,@object          # @45
.L__unnamed_46:
	.asciz	"_Z14repeatAlongRowiiiPKfPf"
	.size	.L__unnamed_46, 27

	.type	.L__unnamed_47,@object          # @46
.L__unnamed_47:
	.asciz	"_Z27addRepeatAlongRowDerivativeiPKfiiPf"
	.size	.L__unnamed_47, 40

	.type	.L__unnamed_48,@object          # @47
.L__unnamed_48:
	.asciz	"_Z14repeatAlongColiiiPKfPf"
	.size	.L__unnamed_48, 27

	.type	.L__unnamed_49,@object          # @48
.L__unnamed_49:
	.asciz	"_Z27addRepeatAlongColDerivativeiPKfiiPf"
	.size	.L__unnamed_49, 40

	.type	.L__unnamed_50,@object          # @49
.L__unnamed_50:
	.asciz	"_Z16addScaledDivSqrtifPKfS0_fPf"
	.size	.L__unnamed_50, 32

	.type	.L__unnamed_51,@object          # @50
.L__unnamed_51:
	.asciz	"_Z4clipiffPKfPf"
	.size	.L__unnamed_51, 16

	.type	.L__unnamed_52,@object          # @51
.L__unnamed_52:
	.asciz	"_Z9transposeIfEviiPKT_PS0_"
	.size	.L__unnamed_52, 27

	.type	.L__unnamed_53,@object          # @52
.L__unnamed_53:
	.asciz	"_Z9transposeIiEviiPKT_PS0_"
	.size	.L__unnamed_53, 27

	.type	.L__unnamed_54,@object          # @53
.L__unnamed_54:
	.asciz	"_Z9sliceRowsIfEviPKiPKT_iiPS2_"
	.size	.L__unnamed_54, 31

	.type	.L__unnamed_55,@object          # @54
.L__unnamed_55:
	.asciz	"_Z9sliceRowsIiEviPKiPKT_iiPS2_"
	.size	.L__unnamed_55, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__sliceColumnsiiPKiPKfPf
	.addrsig_sym _Z39__device_stub__sliceColumnsAndTransposeiiPKiPKfPf
	.addrsig_sym _Z29__device_stub__sliceRowsBatchPKiiiPKfiiPrPf
	.addrsig_sym _Z39__device_stub__slicedRowsBatchScaledAddPKiiifPrPKfiiPf
	.addrsig_sym _Z27__device_stub__columnArgmaxiiPKfPi
	.addrsig_sym _Z23__device_stub__hprodSumiiPKfS0_Pf
	.addrsig_sym _Z23__device_stub__sumHprodiPKfS0_S0_S0_Pf
	.addrsig_sym _Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_Pf
	.addrsig_sym _Z23__device_stub__sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	.addrsig_sym _Z30__device_stub__hadamardProductiPKfS0_Pf
	.addrsig_sym _Z30__device_stub__hadamardProductiPKfS0_S0_Pf
	.addrsig_sym _Z33__device_stub__addHadamardProductiPKfS0_fPf
	.addrsig_sym _Z33__device_stub__addHadamardProductiPKfS0_S0_fPf
	.addrsig_sym _Z39__device_stub__addScaledHadamardProductiPKfS0_ffPf
	.addrsig_sym _Z36__device_stub__addScaledColumnsSliceiifPKfPKiPf
	.addrsig_sym _Z33__device_stub__addScaledRowsSliceiifPKfPKiiPf
	.addrsig_sym _Z24__device_stub__assignSumiPPKfiPf
	.addrsig_sym _Z21__device_stub__addSumiPPKfiPf
	.addrsig_sym _Z20__device_stub__scaleiPKffPf
	.addrsig_sym _Z19__device_stub__fillifPf
	.addrsig_sym _Z25__device_stub__maskedFillifPKffPf
	.addrsig_sym _Z38__device_stub__matrixVectorRowAdditioniiPKffS0_Pf
	.addrsig_sym _Z35__device_stub__assignScaledAdditionifPKfS0_Pf
	.addrsig_sym _Z38__device_stub__assignScaledSubtractionifPKfS0_Pf
	.addrsig_sym _Z35__device_stub__addScaledSubtractionifPKfS0_Pf
	.addrsig_sym _Z34__device_stub__softmaxCeDerivativeiiPKfPKiPf
	.addrsig_sym _Z37__device_stub__addSoftmaxCeDerivativeiiPKfPKiPf
	.addrsig_sym _Z42__device_stub__assignSequentialMeanPoolingiiPPKfiPf
	.addrsig_sym _Z41__device_stub__assignSequentialSumPoolingiiPPKfiPf
	.addrsig_sym _Z42__device_stub__assignSequentialWeightedSumiiPPKfS0_iPf
	.addrsig_sym _Z31__device_stub__sequentiallyTileiPKfPPfi
	.addrsig_sym _Z28__device_stub__assignDLDpreaiiPPKfS0_S0_iPf
	.addrsig_sym _Z37__device_stub__addAttentionDerivativeiiPPKfS0_iPf
	.addrsig_sym _Z31__device_stub__addAttentionTileiiPKfS0_S0_S0_iPPf
	.addrsig_sym _Z22__device_stub__dropoutifPKfS0_Pf
	.addrsig_sym _Z24__device_stub__maskZerosiPKfS0_Pf
	.addrsig_sym _Z27__device_stub__addMaskZerosiPKfS0_Pf
	.addrsig_sym _Z35__device_stub__assignMaskedAdditioniPKfS0_S0_Pf
	.addrsig_sym _Z52__device_stub__assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
	.addrsig_sym _Z35__device_stub__addHprodOneMinusMaskiPKfS0_Pf
	.addrsig_sym _Z52__device_stub__addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
	.addrsig_sym _Z38__device_stub__matrixVectorColumnHprodiiPKfS0_Pf
	.addrsig_sym _Z39__device_stub__maskColumnNumbersRowWiseiiPKiPf
	.addrsig_sym _Z35__device_stub__batchHorizontalStackiiiiPPKfS1_PPf
	.addrsig_sym _Z35__device_stub__batchHorizontalSplitiiiiPPKfPPfS3_
	.addrsig_sym _Z29__device_stub__repeatAlongRowiiiPKfPf
	.addrsig_sym _Z42__device_stub__addRepeatAlongRowDerivativeiPKfiiPf
	.addrsig_sym _Z29__device_stub__repeatAlongColiiiPKfPf
	.addrsig_sym _Z42__device_stub__addRepeatAlongColDerivativeiPKfiiPf
	.addrsig_sym _Z31__device_stub__addScaledDivSqrtifPKfS0_fPf
	.addrsig_sym _Z19__device_stub__clipiffPKfPf
	.addrsig_sym _Z24__device_stub__transposeIfEviiPKT_PS0_
	.addrsig_sym _Z24__device_stub__transposeIiEviiPKT_PS0_
	.addrsig_sym _Z24__device_stub__sliceRowsIfEviPKiPKT_iiPS2_
	.addrsig_sym _Z24__device_stub__sliceRowsIiEviPKiPKT_iiPS2_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12sliceColumnsiiPKiPKfPf
	.addrsig_sym _Z24sliceColumnsAndTransposeiiPKiPKfPf
	.addrsig_sym _Z14sliceRowsBatchPKiiiPKfiiPrPf
	.addrsig_sym _Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf
	.addrsig_sym _Z12columnArgmaxiiPKfPi
	.addrsig_sym _Z8hprodSumiiPKfS0_Pf
	.addrsig_sym _Z8sumHprodiPKfS0_S0_S0_Pf
	.addrsig_sym _Z8sumHprodiPKfS0_S0_S0_S0_Pf
	.addrsig_sym _Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	.addrsig_sym _Z15hadamardProductiPKfS0_Pf
	.addrsig_sym _Z15hadamardProductiPKfS0_S0_Pf
	.addrsig_sym _Z18addHadamardProductiPKfS0_fPf
	.addrsig_sym _Z18addHadamardProductiPKfS0_S0_fPf
	.addrsig_sym _Z24addScaledHadamardProductiPKfS0_ffPf
	.addrsig_sym _Z21addScaledColumnsSliceiifPKfPKiPf
	.addrsig_sym _Z18addScaledRowsSliceiifPKfPKiiPf
	.addrsig_sym _Z9assignSumiPPKfiPf
	.addrsig_sym _Z6addSumiPPKfiPf
	.addrsig_sym _Z5scaleiPKffPf
	.addrsig_sym _Z4fillifPf
	.addrsig_sym _Z10maskedFillifPKffPf
	.addrsig_sym _Z23matrixVectorRowAdditioniiPKffS0_Pf
	.addrsig_sym _Z20assignScaledAdditionifPKfS0_Pf
	.addrsig_sym _Z23assignScaledSubtractionifPKfS0_Pf
	.addrsig_sym _Z20addScaledSubtractionifPKfS0_Pf
	.addrsig_sym _Z19softmaxCeDerivativeiiPKfPKiPf
	.addrsig_sym _Z22addSoftmaxCeDerivativeiiPKfPKiPf
	.addrsig_sym _Z27assignSequentialMeanPoolingiiPPKfiPf
	.addrsig_sym _Z26assignSequentialSumPoolingiiPPKfiPf
	.addrsig_sym _Z27assignSequentialWeightedSumiiPPKfS0_iPf
	.addrsig_sym _Z16sequentiallyTileiPKfPPfi
	.addrsig_sym _Z13assignDLDpreaiiPPKfS0_S0_iPf
	.addrsig_sym _Z22addAttentionDerivativeiiPPKfS0_iPf
	.addrsig_sym _Z16addAttentionTileiiPKfS0_S0_S0_iPPf
	.addrsig_sym _Z7dropoutifPKfS0_Pf
	.addrsig_sym _Z9maskZerosiPKfS0_Pf
	.addrsig_sym _Z12addMaskZerosiPKfS0_Pf
	.addrsig_sym _Z20assignMaskedAdditioniPKfS0_S0_Pf
	.addrsig_sym _Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
	.addrsig_sym _Z20addHprodOneMinusMaskiPKfS0_Pf
	.addrsig_sym _Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
	.addrsig_sym _Z23matrixVectorColumnHprodiiPKfS0_Pf
	.addrsig_sym _Z24maskColumnNumbersRowWiseiiPKiPf
	.addrsig_sym _Z20batchHorizontalStackiiiiPPKfS1_PPf
	.addrsig_sym _Z20batchHorizontalSplitiiiiPPKfPPfS3_
	.addrsig_sym _Z14repeatAlongRowiiiPKfPf
	.addrsig_sym _Z27addRepeatAlongRowDerivativeiPKfiiPf
	.addrsig_sym _Z14repeatAlongColiiiPKfPf
	.addrsig_sym _Z27addRepeatAlongColDerivativeiPKfiiPf
	.addrsig_sym _Z16addScaledDivSqrtifPKfS0_fPf
	.addrsig_sym _Z4clipiffPKfPf
	.addrsig_sym _Z9transposeIfEviiPKT_PS0_
	.addrsig_sym _Z9transposeIiEviiPKT_PS0_
	.addrsig_sym _Z9sliceRowsIfEviPKiPKT_iiPS2_
	.addrsig_sym _Z9sliceRowsIiEviPKiPKT_iiPS2_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12sliceColumnsiiPKiPKfPf ; -- Begin function _Z12sliceColumnsiiPKiPKfPf
	.globl	_Z12sliceColumnsiiPKiPKfPf
	.p2align	8
	.type	_Z12sliceColumnsiiPKiPKfPf,@function
_Z12sliceColumnsiiPKiPKfPf:             ; @_Z12sliceColumnsiiPKiPKfPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s6, 0xffff
	s_mul_i32 s3, s3, s2
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s10, s2, 31
	s_load_b32 s13, s[4:5], 0x0
	s_add_i32 s6, s2, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s11, s6, s10
	v_cvt_f32_u32_e32 v0, s11
	s_sub_i32 s6, 0, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v2, s6, v0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s13, s12
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v0, v2
	v_add_nc_u32_e32 v0, v0, v2
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v1, v2
	v_xor_b32_e32 v3, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v0
	v_mul_lo_u32 v5, v4, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v5
	v_add_nc_u32_e32 v5, 1, v4
	v_subrev_nc_u32_e32 v6, s11, v3
	v_cmp_le_u32_e32 vcc_lo, s11, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v4, v4, v5 :: v_dual_cndmask_b32 v3, v3, v6
	v_xor_b32_e32 v6, s10, v2
	v_add_nc_u32_e32 v5, 1, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s11, v3
	v_cndmask_b32_e32 v3, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v3, v6
	v_sub_nc_u32_e32 v3, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v3, v5
	v_mad_u64_u32 v[3:4], null, s2, v5, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v4, v[3:4], off
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_i32_e32 vcc_lo, s3, v1
	v_add_co_u32 v2, s0, s8, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s9, v3, s0
	s_or_b32 s12, vcc_lo, s12
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v4, off
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow28
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12sliceColumnsiiPKiPKfPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12sliceColumnsiiPKiPKfPf, .Lfunc_end0-_Z12sliceColumnsiiPKiPKfPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 468
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z24sliceColumnsAndTransposeiiPKiPKfPf ; -- Begin function _Z24sliceColumnsAndTransposeiiPKiPKfPf
	.globl	_Z24sliceColumnsAndTransposeiiPKiPKfPf
	.p2align	8
	.type	_Z24sliceColumnsAndTransposeiiPKiPKfPf,@function
_Z24sliceColumnsAndTransposeiiPKiPKfPf: ; @_Z24sliceColumnsAndTransposeiiPKiPKfPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s13, s6, 0xffff
	s_mul_i32 s10, s3, s2
	v_mad_u64_u32 v[1:2], null, s15, s13, v[0:1]
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s10, v1
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s11, s3, 31
	s_load_b32 s14, s[4:5], 0x0
	s_add_i32 s6, s3, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s12, s6, s11
	v_cvt_f32_u32_e32 v0, s12
	s_sub_i32 s4, 0, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v2, s4, v0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s14, s13
	s_mov_b32 s13, 0
	s_sub_i32 s14, 0, s3
	v_mul_hi_u32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v2
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v1, v2
	v_xor_b32_e32 v6, s11, v2
	v_xor_b32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v2, v0
	v_mul_lo_u32 v4, v3, s12
	v_add_nc_u32_e32 v5, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v4
	v_subrev_nc_u32_e32 v4, s12, v2
	v_cmp_le_u32_e32 vcc_lo, s12, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v2, v2, v4
	v_add_nc_u32_e32 v4, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s12, v2
	v_cndmask_b32_e32 v2, v3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v7, v2, v6
	v_sub_nc_u32_e32 v2, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s14, v2, v[1:2]
	v_mad_u64_u32 v[4:5], null, v3, s2, v[2:3]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v2, v6
	v_sub_nc_u32_e32 v5, v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[2:3], null, s3, v5, v[1:2]
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_nc_u32_e32 v1, s1, v1
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e64 s0, s10, v1
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s13, s0, s13
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v6, v[2:3], off
	v_lshlrev_b64 v[2:3], 2, v[4:5]
	v_add_co_u32 v2, vcc_lo, s8, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v6, off
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_2
.LBB1_3:                                ; %Flow31
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24sliceColumnsAndTransposeiiPKiPKfPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z24sliceColumnsAndTransposeiiPKiPKfPf, .Lfunc_end1-_Z24sliceColumnsAndTransposeiiPKiPKfPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 496
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14sliceRowsBatchPKiiiPKfiiPrPf ; -- Begin function _Z14sliceRowsBatchPKiiiPKfiiPrPf
	.globl	_Z14sliceRowsBatchPKiiiPKfiiPrPf
	.p2align	8
	.type	_Z14sliceRowsBatchPKiiiPKfiiPrPf,@function
_Z14sliceRowsBatchPKiiiPKfiiPrPf:       ; @_Z14sliceRowsBatchPKiiiPKfiiPrPf
; %bb.0:
	s_clause 0x2
	s_load_b32 s6, s[0:1], 0x34
	s_load_b64 s[2:3], s[0:1], 0x8
	s_load_b64 s[4:5], s[0:1], 0x18
	s_add_u32 s8, s0, 40
	s_addc_u32 s9, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s16, s6, 0xffff
	s_mov_b32 s6, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
	s_mul_i32 s5, s5, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s3, s5, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB2_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s12, s5, 31
	s_ashr_i32 s13, s2, 31
	s_add_i32 s6, s5, s12
	s_add_i32 s7, s2, s13
	s_xor_b32 s14, s6, s12
	s_xor_b32 s15, s7, s13
	v_cvt_f32_u32_e32 v0, s14
	v_cvt_f32_u32_e32 v2, s15
	s_load_b32 s17, s[8:9], 0x0
	s_sub_i32 s8, 0, s14
	s_sub_i32 s9, 0, s15
	v_rcp_iflag_f32_e32 v0, v0
	v_rcp_iflag_f32_e32 v2, v2
	s_load_b64 s[6:7], s[0:1], 0x20
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v0, v0
	v_cvt_u32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, s8, v0
	v_mul_lo_u32 v4, s9, v2
	s_clause 0x1
	s_load_b64 s[8:9], s[0:1], 0x10
	s_load_b64 s[10:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s17, s16
	s_mov_b32 s16, 0
	s_sub_i32 s17, 0, s5
	v_mul_hi_u32 v3, v0, v3
	v_mul_hi_u32 v4, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v0, v3
	v_add_nc_u32_e32 v2, v2, v4
.LBB2_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v4, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v1, v4
	v_xor_b32_e32 v5, s12, v4
	v_xor_b32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, v2
	v_mul_hi_u32 v7, v3, v0
	v_mul_lo_u32 v6, v6, s15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v8, v7, s14
	v_add_nc_u32_e32 v9, 1, v7
	v_sub_nc_u32_e32 v6, v3, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v8
	v_subrev_nc_u32_e32 v8, s15, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_subrev_nc_u32_e32 v10, s14, v3
	v_cmp_le_u32_e32 vcc_lo, s14, v3
	v_cmp_le_u32_e64 s0, s15, v6
	v_cndmask_b32_e32 v7, v7, v9, vcc_lo
	v_cndmask_b32_e32 v3, v3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v6, v6, v8, s0
	v_add_nc_u32_e32 v8, 1, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s14, v3
	v_subrev_nc_u32_e32 v9, s15, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v7, v8, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s15, v6
	v_xor_b32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v6, v6, v9, vcc_lo
	v_sub_nc_u32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v6, v6, v4
	v_mul_lo_u32 v8, v3, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v6, v4
	v_mad_u64_u32 v[5:6], null, v3, s2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[4:5], 2, v[5:6]
	v_mad_u64_u32 v[6:7], null, s17, v3, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v7, 31, v6
	global_load_b32 v5, v[4:5], off
	v_ashrrev_i32_e32 v4, 31, v3
	v_sub_nc_u32_e32 v8, v7, v8
	v_xor_b32_e32 v9, s13, v7
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, v1, v8
	v_add_nc_u32_e32 v1, s1, v1
	v_xor_b32_e32 v8, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v10, v8, v2
	v_add_nc_u32_e32 v12, 1, v10
	v_mul_lo_u32 v11, v10, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v8, v11
	v_subrev_nc_u32_e32 v11, s15, v8
	v_cmp_le_u32_e32 vcc_lo, s15, v8
	v_cndmask_b32_e32 v10, v10, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v8, v8, v11 :: v_dual_add_nc_u32 v11, 1, v10
	v_cmp_le_u32_e32 vcc_lo, s15, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v8, v10, v11, vcc_lo
	v_add_co_u32 v3, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	v_xor_b32_e32 v8, v8, v9
	global_load_b64 v[3:4], v[3:4], off
	v_sub_nc_u32_e32 v10, v8, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[8:9], null, v10, s4, v[5:6]
	v_lshlrev_b64 v[5:6], 2, v[6:7]
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v8, vcc_lo, s8, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v9, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s3, v1
	global_load_b32 v8, v[8:9], off
	s_or_b32 s16, vcc_lo, s16
	s_waitcnt vmcnt(1)
	v_add_co_u32 v3, s0, v3, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, v4, v6, s0
	s_waitcnt vmcnt(0)
	global_store_b32 v[3:4], v8, off
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB2_2
.LBB2_3:                                ; %Flow48
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14sliceRowsBatchPKiiiPKfiiPrPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z14sliceRowsBatchPKiiiPKfiiPrPf, .Lfunc_end2-_Z14sliceRowsBatchPKiiiPKfiiPrPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 780
; NumSgprs: 20
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf ; -- Begin function _Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf
	.globl	_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf
	.p2align	8
	.type	_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf,@function
_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf: ; @_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf
; %bb.0:
	s_clause 0x2
	s_load_b32 s8, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x20
	s_add_u32 s10, s0, 48
	s_addc_u32 s11, s1, 0
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s7, exec_lo
	s_and_b32 s17, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s17, v[0:1]
	s_mul_i32 s3, s3, s4
	s_mul_i32 s5, s3, s5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB3_5
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s7, s3, 31
	s_ashr_i32 s14, s4, 31
	s_add_i32 s8, s3, s7
	s_add_i32 s9, s4, s14
	s_xor_b32 s15, s8, s7
	s_xor_b32 s16, s9, s14
	v_cvt_f32_u32_e32 v0, s15
	v_cvt_f32_u32_e32 v2, s16
	s_load_b32 s18, s[10:11], 0x0
	s_sub_i32 s10, 0, s15
	s_sub_i32 s11, 0, s16
	v_rcp_iflag_f32_e32 v0, v0
	v_rcp_iflag_f32_e32 v2, v2
	s_load_b64 s[8:9], s[0:1], 0x0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v0, v0
	v_cvt_u32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, s10, v0
	v_mul_lo_u32 v4, s11, v2
	s_clause 0x1
	s_load_b64 s[10:11], s[0:1], 0x28
	s_load_b64 s[12:13], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s18, s17
	s_mov_b32 s17, 0
	v_mul_hi_u32 v3, v0, v3
	v_mul_hi_u32 v4, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v0, v3
	v_add_nc_u32_e32 v6, v2, v4
.LBB3_2:                                ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_3 Depth 2
	v_ashrrev_i32_e32 v3, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v1, v3
	v_xor_b32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v4, v2, v6
	v_mul_hi_u32 v5, v2, v0
	v_mul_lo_u32 v4, v4, s16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v7, v5, s15
	v_sub_nc_u32_e32 v4, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v7
	v_subrev_nc_u32_e32 v8, s16, v4
	v_cmp_le_u32_e64 s0, s16, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v9, s15, v2
	v_cmp_le_u32_e32 vcc_lo, s15, v2
	v_cndmask_b32_e64 v4, v4, v8, s0
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v9, vcc_lo
	v_xor_b32_e32 v9, s7, v3
	v_subrev_nc_u32_e32 v8, s16, v4
	v_add_nc_u32_e32 v7, 1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v5, v5, v7, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s15, v2
	v_add_nc_u32_e32 v7, 1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v5, v7, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s16, v4
	v_xor_b32_e32 v2, v2, v9
	v_cndmask_b32_e32 v4, v4, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v9
	v_xor_b32_e32 v4, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v4, v3
	v_mad_u64_u32 v[4:5], null, v2, s4, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v4, vcc_lo
	v_ashrrev_i32_e32 v3, 31, v2
	global_load_b32 v4, v[7:8], off
	v_lshlrev_b64 v[7:8], 3, v[2:3]
	v_mul_lo_u32 v2, v2, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s12, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s13, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v1, v2
	global_load_b64 v[7:8], v[7:8], off
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_nc_u32_e32 v5, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v5, v3
	v_mul_hi_u32 v9, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v10, v9, s16
	v_sub_nc_u32_e32 v5, v5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v11, s16, v5
	v_cmp_le_u32_e32 vcc_lo, s16, v5
	v_dual_cndmask_b32 v5, v5, v11 :: v_dual_add_nc_u32 v10, 1, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v9, v9, v10, vcc_lo
	v_xor_b32_e32 v11, s14, v3
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_cmp_le_u32_e32 vcc_lo, s16, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v10, 1, v9
	v_cndmask_b32_e32 v5, v9, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v5, v11
	v_sub_nc_u32_e32 v5, v5, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, s2, v[4:5]
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[4:5], 2, v[9:10]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v7, vcc_lo, v7, v2
	v_add_co_ci_u32_e32 v8, vcc_lo, v8, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s10, v4
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v5, vcc_lo
	global_load_b32 v4, v[7:8], off
	global_load_b32 v5, v[2:3], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v7, s6, v4
.LBB3_3:                                ; %atomicrmw.start
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v4, v5, v7
	global_atomic_cmpswap_b32 v4, v[2:3], v[4:5], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v4, v5
	v_mov_b32_e32 v5, v4
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_3
; %bb.4:                                ; %atomicrmw.end
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v1, s1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s5, v1
	s_or_b32 s17, vcc_lo, s17
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB3_2
.LBB3_5:                                ; %Flow52
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 19
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf, .Lfunc_end3-_Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 820
; NumSgprs: 21
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12columnArgmaxiiPKfPi ; -- Begin function _Z12columnArgmaxiiPKfPi
	.globl	_Z12columnArgmaxiiPKfPi
	.p2align	8
	.type	_Z12columnArgmaxiiPKfPi,@function
_Z12columnArgmaxiiPKfPi:                ; @_Z12columnArgmaxiiPKfPi
; %bb.0:
	s_clause 0x1
	s_load_b64 s[6:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, 0xff7fffff
	s_mov_b32 s4, s15
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s7, v0
	s_cbranch_execz .LBB4_4
; %bb.1:                                ; %.lr.ph
	s_load_b64 s[0:1], s[0:1], 0x8
	v_mad_u64_u32 v[1:2], null, v0, s6, s[4:5]
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, 0xff7fffff
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v5, v0
	s_lshl_b32 s8, s6, 5
	s_mov_b32 s6, 0
.LBB4_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_add_nc_u32_e32 v1, s8, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s0, v6
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, v6, v4
	v_dual_cndmask_b32 v4, v4, v6 :: v_dual_cndmask_b32 v3, v3, v5
	v_add_nc_u32_e32 v5, 32, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s7, v5
	s_or_b32 s6, vcc_lo, s6
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB4_2
; %bb.3:                                ; %Flow46
	s_or_b32 exec_lo, exec_lo, s6
.LBB4_4:                                ; %Flow47
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_lshlrev_b32_e32 v1, 2, v0
	s_mov_b32 s0, 0
	s_mov_b32 s1, exec_lo
	ds_store_2addr_b32 v1, v4, v3 offset1:32
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB4_10
; %bb.5:                                ; %.preheader.preheader
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0xff7fffff
.LBB4_6:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, s0
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v2, v1
	s_cbranch_vccnz .LBB4_8
; %bb.7:                                ;   in Loop: Header=BB4_6 Depth=1
	v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, v2
	ds_load_b32 v0, v0 offset:128
.LBB4_8:                                ;   in Loop: Header=BB4_6 Depth=1
	s_add_i32 s0, s0, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_i32 s0, 0x80
	s_cbranch_scc0 .LBB4_6
; %bb.9:
	s_mov_b32 s5, 0
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v1, v0, s[0:1]
.LBB4_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12columnArgmaxiiPKfPi
		.amdhsa_group_segment_fixed_size 256
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z12columnArgmaxiiPKfPi, .Lfunc_end4-_Z12columnArgmaxiiPKfPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 356
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 256 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8hprodSumiiPKfS0_Pf   ; -- Begin function _Z8hprodSumiiPKfS0_Pf
	.globl	_Z8hprodSumiiPKfS0_Pf
	.p2align	8
	.type	_Z8hprodSumiiPKfS0_Pf,@function
_Z8hprodSumiiPKfS0_Pf:                  ; @_Z8hprodSumiiPKfS0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s6, 0xffff
	s_mov_b32 s6, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB5_5
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s6, s3, 31
	s_load_b32 s9, s[4:5], 0x0
	s_add_i32 s3, s3, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s6
	v_cvt_f32_u32_e32 v0, s3
	s_sub_i32 s6, 0, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, s8
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_mov_b32 s9, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s6, v0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v0, v2
	v_add_nc_u32_e32 v0, v0, v2
.LBB5_2:                                ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB5_3 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v1, v2
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_xor_b32_e32 v3, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v0
	v_mul_lo_u32 v4, v4, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s3, v3
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s3, v3
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
	v_xor_b32_e32 v3, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	v_add_co_u32 v4, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v6, vcc_lo
	global_load_b32 v6, v[7:8], off
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b32 v4, v[4:5], off
	global_load_b32 v5, v[2:3], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v6, v6, v4
.LBB5_3:                                ; %atomicrmw.start
                                        ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v4, v5, v6
	global_atomic_cmpswap_b32 v4, v[2:3], v[4:5], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v4, v5
	v_mov_b32_e32 v5, v4
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB5_3
; %bb.4:                                ; %atomicrmw.end
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	v_add_nc_u32_e32 v1, s8, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s2, v1
	s_or_b32 s9, vcc_lo, s9
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB5_2
.LBB5_5:                                ; %Flow20
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8hprodSumiiPKfS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z8hprodSumiiPKfS0_Pf, .Lfunc_end5-_Z8hprodSumiiPKfS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 452
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8sumHprodiPKfS0_S0_S0_Pf ; -- Begin function _Z8sumHprodiPKfS0_S0_S0_Pf
	.globl	_Z8sumHprodiPKfS0_S0_S0_Pf
	.p2align	8
	.type	_Z8sumHprodiPKfS0_S0_S0_Pf,@function
_Z8sumHprodiPKfS0_S0_S0_Pf:             ; @_Z8sumHprodiPKfS0_S0_S0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x3c
	s_load_b32 s16, s[0:1], 0x0
	s_add_u32 s2, s0, 48
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s16, v1
	s_cbranch_execz .LBB6_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s13, s[2:3], 0x0
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x28
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s12, s13, s12
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[14:15], s[12:13], 2
.LBB6_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v3, vcc_lo
	v_add_co_u32 v10, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v0, v[6:7], off
	global_load_b32 v6, v[8:9], off
	global_load_b32 v7, v[4:5], off
	global_load_b32 v8, v[10:11], off
	v_add_nc_u32_e32 v1, s12, v1
	v_add_co_u32 v4, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s14
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v3, vcc_lo
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v0, v0, v6
	v_cmp_le_i32_e64 s0, s16, v1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v0, v7, v8
	s_or_b32 s1, s0, s1
	global_store_b32 v[4:5], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB6_2
.LBB6_3:                                ; %Flow25
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8sumHprodiPKfS0_S0_S0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z8sumHprodiPKfS0_S0_S0_Pf, .Lfunc_end6-_Z8sumHprodiPKfS0_S0_S0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 308
; NumSgprs: 19
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8sumHprodiPKfS0_S0_S0_S0_Pf ; -- Begin function _Z8sumHprodiPKfS0_S0_S0_S0_Pf
	.globl	_Z8sumHprodiPKfS0_S0_S0_S0_Pf
	.p2align	8
	.type	_Z8sumHprodiPKfS0_S0_S0_S0_Pf,@function
_Z8sumHprodiPKfS0_S0_S0_S0_Pf:          ; @_Z8sumHprodiPKfS0_S0_S0_S0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x44
	s_load_b32 s18, s[0:1], 0x0
	s_add_u32 s2, s0, 56
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s16, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s18, v1
	s_cbranch_execz .LBB7_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s2, s[2:3], 0x0
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x8
	s_load_b128 s[12:15], s[0:1], 0x28
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s16
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[16:17], s[2:3], 2
.LBB7_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v3, vcc_lo
	v_add_co_u32 v10, vcc_lo, s12, v2
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v3, vcc_lo
	v_add_co_u32 v12, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v6, v[6:7], off
	global_load_b32 v7, v[8:9], off
	global_load_b32 v8, v[10:11], off
	global_load_b32 v9, v[12:13], off
	v_add_nc_u32_e32 v1, s2, v1
	v_add_co_u32 v4, vcc_lo, s14, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s15, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s16
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v3, vcc_lo
	s_waitcnt vmcnt(3)
	v_mul_f32_e32 v0, v0, v6
	v_cmp_le_i32_e64 s0, s18, v1
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v6, v7, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 s1, s0, s1
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v0, v9
	global_store_b32 v[4:5], v6, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB7_2
.LBB7_3:                                ; %Flow29
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8sumHprodiPKfS0_S0_S0_S0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 19
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z8sumHprodiPKfS0_S0_S0_S0_Pf, .Lfunc_end7-_Z8sumHprodiPKfS0_S0_S0_S0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 336
; NumSgprs: 21
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf ; -- Begin function _Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	.globl	_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
	.p2align	8
	.type	_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf,@function
_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf: ; @_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x74
	s_load_b32 s28, s[0:1], 0x0
	s_add_u32 s2, s0, 0x68
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s29, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s29, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s28, v1
	s_cbranch_execz .LBB8_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s2, s[2:3], 0x0
	s_clause 0x2
	s_load_b256 s[4:11], s[0:1], 0x48
	s_load_b256 s[12:19], s[0:1], 0x28
	s_load_b256 s[20:27], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s0, s2, s29
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[0:1], 2
	s_mov_b32 s1, 0
.LBB8_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v4, vcc_lo, s20, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s21, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s22, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s23, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, s24, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s25, v3, vcc_lo
	v_add_co_u32 v10, vcc_lo, s26, v2
	v_add_co_ci_u32_e32 v11, vcc_lo, s27, v3, vcc_lo
	v_add_co_u32 v12, vcc_lo, s12, v2
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v3, vcc_lo
	v_add_co_u32 v14, vcc_lo, s14, v2
	v_add_co_ci_u32_e32 v15, vcc_lo, s15, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v22, v[6:7], off
	global_load_b32 v10, v[10:11], off
	global_load_b32 v11, v[12:13], off
	v_add_co_u32 v16, vcc_lo, s16, v2
	v_add_co_ci_u32_e32 v17, vcc_lo, s17, v3, vcc_lo
	v_add_co_u32 v18, vcc_lo, s18, v2
	global_load_b32 v8, v[8:9], off
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v3, vcc_lo
	v_add_co_u32 v20, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v21, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v2
	global_load_b32 v9, v[14:15], off
	global_load_b32 v12, v[16:17], off
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v13, v[18:19], off
	global_load_b32 v14, v[20:21], off
	global_load_b32 v15, v[4:5], off
	global_load_b32 v6, v[6:7], off
	s_add_u32 s20, s20, s2
	v_add_nc_u32_e32 v1, s0, v1
	s_addc_u32 s21, s21, s3
	s_add_u32 s22, s22, s2
	s_addc_u32 s23, s23, s3
	s_add_u32 s24, s24, s2
	s_addc_u32 s25, s25, s3
	s_add_u32 s26, s26, s2
	s_addc_u32 s27, s27, s3
	s_add_u32 s12, s12, s2
	s_addc_u32 s13, s13, s3
	s_add_u32 s14, s14, s2
	s_addc_u32 s15, s15, s3
	s_add_u32 s16, s16, s2
	s_addc_u32 s17, s17, s3
	s_add_u32 s18, s18, s2
	s_addc_u32 s19, s19, s3
	v_add_co_u32 v4, vcc_lo, s10, v2
	s_add_u32 s4, s4, s2
	s_addc_u32 s5, s5, s3
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v3, vcc_lo
	s_add_u32 s6, s6, s2
	s_addc_u32 s7, s7, s3
	s_add_u32 s8, s8, s2
	s_addc_u32 s9, s9, s3
	s_add_u32 s10, s10, s2
	s_addc_u32 s11, s11, s3
	s_waitcnt vmcnt(9)
	v_mul_f32_e32 v0, v0, v22
	v_cmp_le_i32_e32 vcc_lo, s28, v1
	s_waitcnt vmcnt(7)
	v_mul_f32_e32 v7, v10, v11
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v0, v8
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v7, v9, v12
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v13, v14
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v7, v15, v6
	global_store_b32 v[4:5], v7, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB8_2
.LBB8_3:                                ; %Flow76
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 360
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 30
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf, .Lfunc_end8-_Z8sumHprodiPKfS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 572
; NumSgprs: 32
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 32
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15hadamardProductiPKfS0_Pf ; -- Begin function _Z15hadamardProductiPKfS0_Pf
	.globl	_Z15hadamardProductiPKfS0_Pf
	.p2align	8
	.type	_Z15hadamardProductiPKfS0_Pf,@function
_Z15hadamardProductiPKfS0_Pf:           ; @_Z15hadamardProductiPKfS0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s12, s[0:1], 0x0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v1
	s_cbranch_execz .LBB9_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s9, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, s8
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[8:9], 2
.LBB9_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v6, v[6:7], off
	v_add_nc_u32_e32 v1, s8, v1
	v_add_co_u32 v4, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s10
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v0, v0, v6
	v_cmp_le_i32_e64 s0, s12, v1
	global_store_b32 v[4:5], v0, off
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB9_2
.LBB9_3:                                ; %Flow17
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15hadamardProductiPKfS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end9:
	.size	_Z15hadamardProductiPKfS0_Pf, .Lfunc_end9-_Z15hadamardProductiPKfS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 260
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15hadamardProductiPKfS0_S0_Pf ; -- Begin function _Z15hadamardProductiPKfS0_S0_Pf
	.globl	_Z15hadamardProductiPKfS0_S0_Pf
	.p2align	8
	.type	_Z15hadamardProductiPKfS0_S0_Pf,@function
_Z15hadamardProductiPKfS0_S0_Pf:        ; @_Z15hadamardProductiPKfS0_S0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x34
	s_load_b32 s14, s[0:1], 0x0
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s14, v1
	s_cbranch_execz .LBB10_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s2, s[2:3], 0x0
	s_load_b256 s[4:11], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s12
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[2:3], 2
.LBB10_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v6, v[6:7], off
	global_load_b32 v7, v[8:9], off
	v_add_nc_u32_e32 v1, s2, v1
	v_add_co_u32 v4, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s12
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v0, v0, v6
	v_cmp_le_i32_e64 s0, s14, v1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v0, v0, v7
	s_or_b32 s1, s0, s1
	global_store_b32 v[4:5], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB10_2
.LBB10_3:                               ; %Flow21
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15hadamardProductiPKfS0_S0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end10:
	.size	_Z15hadamardProductiPKfS0_S0_Pf, .Lfunc_end10-_Z15hadamardProductiPKfS0_S0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 276
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z18addHadamardProductiPKfS0_fPf ; -- Begin function _Z18addHadamardProductiPKfS0_fPf
	.globl	_Z18addHadamardProductiPKfS0_fPf
	.p2align	8
	.type	_Z18addHadamardProductiPKfS0_fPf,@function
_Z18addHadamardProductiPKfS0_fPf:       ; @_Z18addHadamardProductiPKfS0_fPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x34
	s_load_b32 s12, s[0:1], 0x0
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v1
	s_cbranch_execz .LBB11_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s9, s[2:3], 0x0
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b32 s1, s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, s8
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[8:9], 2
	s_mov_b32 s9, 0
.LBB11_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v0, v[6:7], off
	global_load_b32 v4, v[4:5], off
	global_load_b32 v5, v[8:9], off
	v_add_nc_u32_e32 v1, s8, v1
	v_add_co_u32 v2, vcc_lo, v2, s10
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v0, s1, v0
	v_cmp_le_i32_e64 s0, s12, v1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v0, v4, v5
	s_or_b32 s9, s0, s9
	global_store_b32 v[6:7], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB11_2
.LBB11_3:                               ; %Flow22
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18addHadamardProductiPKfS0_fPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end11:
	.size	_Z18addHadamardProductiPKfS0_fPf, .Lfunc_end11-_Z18addHadamardProductiPKfS0_fPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z18addHadamardProductiPKfS0_S0_fPf ; -- Begin function _Z18addHadamardProductiPKfS0_S0_fPf
	.globl	_Z18addHadamardProductiPKfS0_S0_fPf
	.p2align	8
	.type	_Z18addHadamardProductiPKfS0_S0_fPf,@function
_Z18addHadamardProductiPKfS0_S0_fPf:    ; @_Z18addHadamardProductiPKfS0_S0_fPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x3c
	s_load_b32 s14, s[0:1], 0x0
	s_add_u32 s2, s0, 48
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s14, v1
	s_cbranch_execz .LBB12_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s11, s[2:3], 0x0
	s_clause 0x3
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x18
	s_load_b64 s[8:9], s[0:1], 0x28
	s_load_b32 s1, s[0:1], 0x20
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s11, s10
	s_ashr_i32 s11, s10, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[10:11], 2
	s_mov_b32 s11, 0
.LBB12_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v3, vcc_lo
	v_add_co_u32 v10, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v11, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v4, v[6:7], off
	global_load_b32 v5, v[8:9], off
	global_load_b32 v6, v[10:11], off
	v_add_nc_u32_e32 v1, s10, v1
	v_add_co_u32 v2, vcc_lo, v2, s12
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v0, v0, v4
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v4, s1, v5
	v_cmp_le_i32_e64 s0, s14, v1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v0, v6
	s_or_b32 s11, s0, s11
	global_store_b32 v[8:9], v4, off
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB12_2
.LBB12_3:                               ; %Flow26
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18addHadamardProductiPKfS0_S0_fPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end12:
	.size	_Z18addHadamardProductiPKfS0_S0_fPf, .Lfunc_end12-_Z18addHadamardProductiPKfS0_S0_fPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 316
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z24addScaledHadamardProductiPKfS0_ffPf ; -- Begin function _Z24addScaledHadamardProductiPKfS0_ffPf
	.globl	_Z24addScaledHadamardProductiPKfS0_ffPf
	.p2align	8
	.type	_Z24addScaledHadamardProductiPKfS0_ffPf,@function
_Z24addScaledHadamardProductiPKfS0_ffPf: ; @_Z24addScaledHadamardProductiPKfS0_ffPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x34
	s_load_b32 s14, s[0:1], 0x0
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s14, v1
	s_cbranch_execz .LBB13_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s2, s[2:3], 0x0
	s_load_b256 s[4:11], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s12
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[2:3], 2
.LBB13_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v3, vcc_lo
	global_load_b32 v6, v[6:7], off
	global_load_b32 v7, v[4:5], off
	v_add_co_u32 v2, vcc_lo, v2, s12
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	v_add_nc_u32_e32 v1, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s14, v1
	s_or_b32 s1, s0, s1
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v0, s9, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v0, v0, v6
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v0, s8, v7
	global_store_b32 v[4:5], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB13_2
.LBB13_3:                               ; %Flow27
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24addScaledHadamardProductiPKfS0_ffPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end13:
	.size	_Z24addScaledHadamardProductiPKfS0_ffPf, .Lfunc_end13-_Z24addScaledHadamardProductiPKfS0_ffPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 276
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z21addScaledColumnsSliceiifPKfPKiPf ; -- Begin function _Z21addScaledColumnsSliceiifPKfPKiPf
	.globl	_Z21addScaledColumnsSliceiifPKfPKiPf
	.p2align	8
	.type	_Z21addScaledColumnsSliceiifPKfPKiPf,@function
_Z21addScaledColumnsSliceiifPKfPKiPf:   ; @_Z21addScaledColumnsSliceiifPKfPKiPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x0
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s7, exec_lo
	s_and_b32 s13, s8, 0xffff
	s_mul_i32 s5, s5, s4
	v_mad_u64_u32 v[1:2], null, s15, s13, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB14_5
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s7, s4, 31
	s_load_b32 s2, s[2:3], 0x0
	s_add_i32 s8, s4, s7
	s_mov_b32 s3, 0
	s_xor_b32 s12, s8, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, s12
	s_sub_i32 s8, 0, s12
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s13
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s8, v0
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x10
	s_load_b64 s[0:1], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v0, v2
	v_add_nc_u32_e32 v0, v0, v2
.LBB14_2:                               ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB14_3 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s13, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v1, v2
	v_xor_b32_e32 v3, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v0
	v_mul_lo_u32 v5, v4, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v5
	v_add_nc_u32_e32 v5, 1, v4
	v_subrev_nc_u32_e32 v6, s12, v3
	v_cmp_le_u32_e32 vcc_lo, s12, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v4, v4, v5 :: v_dual_cndmask_b32 v3, v3, v6
	v_xor_b32_e32 v6, s7, v2
	v_add_nc_u32_e32 v5, 1, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s12, v3
	v_cndmask_b32_e32 v3, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v6
	v_sub_nc_u32_e32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	v_mul_lo_u32 v3, v3, s4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v1, v3
	global_load_b32 v6, v[4:5], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[4:5], null, v6, s4, v[3:4]
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v6, vcc_lo, s8, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v2, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v5, vcc_lo
	global_load_b32 v4, v[6:7], off
	global_load_b32 v5, v[2:3], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v6, s6, v4
.LBB14_3:                               ; %atomicrmw.start
                                        ;   Parent Loop BB14_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v4, v5, v6
	global_atomic_cmpswap_b32 v4, v[2:3], v[4:5], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v4, v5
	v_mov_b32_e32 v5, v4
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB14_3
; %bb.4:                                ; %atomicrmw.end
                                        ;   in Loop: Header=BB14_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v1, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s5, v1
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB14_2
.LBB14_5:                               ; %Flow32
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21addScaledColumnsSliceiifPKfPKiPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end14:
	.size	_Z21addScaledColumnsSliceiifPKfPKiPf, .Lfunc_end14-_Z21addScaledColumnsSliceiifPKfPKiPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 520
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z18addScaledRowsSliceiifPKfPKiiPf ; -- Begin function _Z18addScaledRowsSliceiifPKfPKiiPf
	.globl	_Z18addScaledRowsSliceiifPKfPKiiPf
	.p2align	8
	.type	_Z18addScaledRowsSliceiifPKfPKiiPf,@function
_Z18addScaledRowsSliceiifPKfPKiiPf:     ; @_Z18addScaledRowsSliceiifPKfPKiiPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x0
	s_add_u32 s8, s0, 48
	s_addc_u32 s9, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s13, s2, 0xffff
	s_mul_i32 s5, s5, s4
	v_mad_u64_u32 v[1:2], null, s15, s13, v[0:1]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB15_5
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s7, s4, 31
	s_load_b32 s14, s[8:9], 0x0
	s_add_i32 s2, s4, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_xor_b32 s12, s2, s7
	s_load_b64 s[2:3], s[0:1], 0x28
	v_cvt_f32_u32_e32 v0, s12
	s_sub_i32 s10, 0, s12
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s10, v0
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x10
	s_load_b32 s0, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s14, s13
	s_mov_b32 s13, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v0, v2
	v_add_nc_u32_e32 v0, v0, v2
.LBB15_2:                               ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB15_3 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v1, v2
	v_xor_b32_e32 v3, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v0
	v_mul_lo_u32 v5, v4, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v5
	v_add_nc_u32_e32 v5, 1, v4
	v_subrev_nc_u32_e32 v6, s12, v3
	v_cmp_le_u32_e32 vcc_lo, s12, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v4, v4, v5 :: v_dual_cndmask_b32 v3, v3, v6
	v_xor_b32_e32 v6, s7, v2
	v_add_nc_u32_e32 v5, 1, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s12, v3
	v_cndmask_b32_e32 v3, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v6
	v_sub_nc_u32_e32 v6, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v6, s4
	v_sub_nc_u32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[4:5], null, v6, s0, v[3:4]
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s8, v2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v3, vcc_lo
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v4, v[6:7], off
	global_load_b32 v5, v[2:3], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v6, s6, v4
.LBB15_3:                               ; %atomicrmw.start
                                        ;   Parent Loop BB15_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v4, v5, v6
	global_atomic_cmpswap_b32 v4, v[2:3], v[4:5], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v4, v5
	v_mov_b32_e32 v5, v4
	s_or_b32 s14, vcc_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB15_3
; %bb.4:                                ; %atomicrmw.end
                                        ;   in Loop: Header=BB15_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_add_nc_u32_e32 v1, s1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s5, v1
	s_or_b32 s13, vcc_lo, s13
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB15_2
.LBB15_5:                               ; %Flow34
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18addScaledRowsSliceiifPKfPKiiPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end15:
	.size	_Z18addScaledRowsSliceiifPKfPKiiPf, .Lfunc_end15-_Z18addScaledRowsSliceiifPKfPKiiPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 524
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9assignSumiPPKfiPf    ; -- Begin function _Z9assignSumiPPKfiPf
	.globl	_Z9assignSumiPPKfiPf
	.p2align	8
	.type	_Z9assignSumiPPKfiPf,@function
_Z9assignSumiPPKfiPf:                   ; @_Z9assignSumiPPKfiPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s6, s[0:1], 0x0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmpx_gt_i32_e64 s6, v1
	s_cbranch_execz .LBB16_7
; %bb.1:                                ; %.lr.ph20
	s_load_b32 s7, s[0:1], 0x10
	s_load_b32 s9, s[2:3], 0x0
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x18
	s_load_b64 s[0:1], s[0:1], 0x8
	v_mov_b32_e32 v0, 0
	s_mov_b32 s10, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s7, 0
	s_mul_i32 s9, s9, s4
	s_cselect_b32 s8, -1, 0
.LBB16_2:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB16_4 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v4, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s8
	global_store_b32 v[4:5], v0, off
	s_cbranch_vccnz .LBB16_6
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB16_2 Depth=1
	v_mov_b32_e32 v6, 0
	s_mov_b64 s[4:5], s[0:1]
	s_mov_b32 s11, s7
.LBB16_4:                               ; %.lr.ph
                                        ;   Parent Loop BB16_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_load_b64 s[12:13], s[4:5], 0x0
	s_add_i32 s11, s11, -1
	s_add_u32 s4, s4, 8
	s_addc_u32 s5, s5, 0
	s_cmp_eq_u32 s11, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s12, v2
	v_add_co_ci_u32_e32 v8, vcc_lo, s13, v3, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v6, v7, v6
	s_cbranch_scc0 .LBB16_4
; %bb.5:                                ; %._crit_edge
                                        ;   in Loop: Header=BB16_2 Depth=1
	global_store_b32 v[4:5], v6, off
.LBB16_6:                               ;   in Loop: Header=BB16_2 Depth=1
	v_add_nc_u32_e32 v1, s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s6, v1
	s_or_b32 s10, vcc_lo, s10
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB16_2
.LBB16_7:                               ; %Flow29
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9assignSumiPPKfiPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end16:
	.size	_Z9assignSumiPPKfiPf, .Lfunc_end16-_Z9assignSumiPPKfiPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 292
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6addSumiPPKfiPf       ; -- Begin function _Z6addSumiPPKfiPf
	.globl	_Z6addSumiPPKfiPf
	.p2align	8
	.type	_Z6addSumiPPKfiPf,@function
_Z6addSumiPPKfiPf:                      ; @_Z6addSumiPPKfiPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s6, s[0:1], 0x0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmpx_gt_i32_e64 s6, v1
	s_cbranch_execz .LBB17_7
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b32 s7, s[0:1], 0x10
	s_load_b32 s9, s[2:3], 0x0
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x18
	s_load_b64 s[0:1], s[0:1], 0x8
	s_mov_b32 s10, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s7, 0
	s_mul_i32 s9, s9, s4
	s_cselect_b32 s8, -1, 0
.LBB17_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB17_4 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB17_6
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB17_2 Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b64 s[4:5], s[0:1]
	s_mov_b32 s11, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s2, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v0, v[2:3], off
.LBB17_4:                               ;   Parent Loop BB17_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_load_b64 s[12:13], s[4:5], 0x0
	s_add_i32 s11, s11, -1
	s_add_u32 s4, s4, 8
	s_addc_u32 s5, s5, 0
	s_cmp_eq_u32 s11, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s12, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v5, vcc_lo
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v6, v0
	s_cbranch_scc0 .LBB17_4
; %bb.5:                                ; %._crit_edge
                                        ;   in Loop: Header=BB17_2 Depth=1
	global_store_b32 v[2:3], v0, off
.LBB17_6:                               ;   in Loop: Header=BB17_2 Depth=1
	v_add_nc_u32_e32 v1, s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s6, v1
	s_or_b32 s10, vcc_lo, s10
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB17_2
.LBB17_7:                               ; %._crit_edge17
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6addSumiPPKfiPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end17:
	.size	_Z6addSumiPPKfiPf, .Lfunc_end17-_Z6addSumiPPKfiPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 288
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z5scaleiPKffPf         ; -- Begin function _Z5scaleiPKffPf
	.globl	_Z5scaleiPKffPf
	.p2align	8
	.type	_Z5scaleiPKffPf,@function
_Z5scaleiPKffPf:                        ; @_Z5scaleiPKffPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s10, s[0:1], 0x0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s10, v1
	s_cbranch_execz .LBB18_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s7, s[2:3], 0x0
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x8
	s_load_b64 s[4:5], s[0:1], 0x18
	s_load_b32 s1, s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s6, s7, s6
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[8:9], s[6:7], 2
	s_mov_b32 s7, 0
.LBB18_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v4, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	v_add_nc_u32_e32 v1, s6, v1
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s8
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v0, s1, v0
	v_cmp_le_i32_e64 s0, s10, v1
	global_store_b32 v[4:5], v0, off
	s_or_b32 s7, s0, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB18_2
.LBB18_3:                               ; %Flow16
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5scaleiPKffPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end18:
	.size	_Z5scaleiPKffPf, .Lfunc_end18-_Z5scaleiPKffPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 244
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z4fillifPf             ; -- Begin function _Z4fillifPf
	.globl	_Z4fillifPf
	.p2align	8
	.type	_Z4fillifPf,@function
_Z4fillifPf:                            ; @_Z4fillifPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 16
	s_addc_u32 s5, s1, 0
	s_mov_b32 s7, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s6, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s6, v[0:1]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB19_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s4, s[4:5], 0x0
	s_load_b64 s[0:1], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v0, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s4, s4, s6
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_ashr_i32 s5, s4, 31
	s_mov_b32 s1, 0
	s_lshl_b64 s[6:7], s[4:5], 2
.LBB19_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v1, s4, v1
	global_store_b32 v[2:3], v0, off
	v_add_co_u32 v2, s0, v2, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
	v_cmp_le_i32_e32 vcc_lo, s2, v1
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB19_2
.LBB19_3:                               ; %Flow15
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4fillifPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end19:
	.size	_Z4fillifPf, .Lfunc_end19-_Z4fillifPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 200
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10maskedFillifPKffPf  ; -- Begin function _Z10maskedFillifPKffPf
	.globl	_Z10maskedFillifPKffPf
	.p2align	8
	.type	_Z10maskedFillifPKffPf,@function
_Z10maskedFillifPKffPf:                 ; @_Z10maskedFillifPKffPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s6, 0xffff
	s_mov_b32 s6, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB20_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s9, s[4:5], 0x0
	s_clause 0x2
	s_load_b64 s[4:5], s[0:1], 0x8
	s_load_b64 s[6:7], s[0:1], 0x18
	s_load_b32 s1, s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, s8
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[8:9], 2
	s_mov_b32 s9, 0
.LBB20_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v4, v[6:7], off
	s_waitcnt vmcnt(1)
	v_cmp_neq_f32_e32 vcc_lo, s1, v0
	v_cndmask_b32_e64 v5, 0, 1.0, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, s1, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v4, v4, v5
	v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
	v_add_nc_u32_e32 v1, s8, v1
	v_add_co_u32 v2, vcc_lo, v2, s10
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	v_fmac_f32_e32 v4, s3, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e64 s0, s2, v1
	global_store_b32 v[6:7], v4, off
	s_or_b32 s9, s0, s9
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB20_2
.LBB20_3:                               ; %Flow26
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10maskedFillifPKffPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end20:
	.size	_Z10maskedFillifPKffPf, .Lfunc_end20-_Z10maskedFillifPKffPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 288
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z23matrixVectorRowAdditioniiPKffS0_Pf ; -- Begin function _Z23matrixVectorRowAdditioniiPKffS0_Pf
	.globl	_Z23matrixVectorRowAdditioniiPKffS0_Pf
	.p2align	8
	.type	_Z23matrixVectorRowAdditioniiPKffS0_Pf,@function
_Z23matrixVectorRowAdditioniiPKffS0_Pf: ; @_Z23matrixVectorRowAdditioniiPKffS0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x34
	s_load_b64 s[4:5], s[0:1], 0x0
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s6, 0xffff
	s_mul_i32 s12, s5, s4
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v1
	s_cbranch_execz .LBB21_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s13, s4, 31
	s_load_b32 s9, s[2:3], 0x0
	s_add_i32 s4, s4, s13
	s_mov_b32 s15, 0
	s_xor_b32 s14, s4, s13
	s_load_b128 s[4:7], s[0:1], 0x18
	v_cvt_f32_u32_e32 v0, s14
	s_sub_i32 s2, 0, s14
	s_delay_alu instid0(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, s8
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[10:11], s[8:9], 2
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, s2, v0
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x8
	s_load_b32 s1, s[0:1], 0x10
	v_mul_hi_u32 v4, v0, v2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_nc_u32_e32 v0, v0, v4
.LBB21_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v4, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v1, v4
	v_add_nc_u32_e32 v1, s8, v1
	v_xor_b32_e32 v5, v5, v4
	v_xor_b32_e32 v4, s13, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_i32_e64 s0, s12, v1
	v_mul_hi_u32 v6, v5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s15, s0, s15
	v_mul_lo_u32 v7, v6, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v5, v7
	v_subrev_nc_u32_e32 v7, s14, v5
	v_cmp_le_u32_e32 vcc_lo, s14, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v5, v7 :: v_dual_add_nc_u32 v8, 1, v6
	v_cndmask_b32_e32 v6, v6, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s14, v5
	v_add_nc_u32_e32 v7, 1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v5, v6, v7, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v3, vcc_lo
	v_xor_b32_e32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v5, v4
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v6, v[6:7], off
	global_load_b32 v7, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s10
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, s1, v7
	global_store_b32 v[4:5], v6, off
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB21_2
.LBB21_3:                               ; %Flow26
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23matrixVectorRowAdditioniiPKffS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end21:
	.size	_Z23matrixVectorRowAdditioniiPKffS0_Pf, .Lfunc_end21-_Z23matrixVectorRowAdditioniiPKffS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z20assignScaledAdditionifPKfS0_Pf ; -- Begin function _Z20assignScaledAdditionifPKfS0_Pf
	.globl	_Z20assignScaledAdditionifPKfS0_Pf
	.p2align	8
	.type	_Z20assignScaledAdditionifPKfS0_Pf,@function
_Z20assignScaledAdditionifPKfS0_Pf:     ; @_Z20assignScaledAdditionifPKfS0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s6, 0xffff
	s_mov_b32 s6, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB22_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s11, s[4:5], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s11, s10
	s_ashr_i32 s11, s10, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[10:11], 2
.LBB22_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v6, v[6:7], off
	v_add_nc_u32_e32 v1, s10, v1
	v_add_co_u32 v4, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s12
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v6
	v_cmp_le_i32_e64 s0, s2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v0, s3, v0
	s_or_b32 s1, s0, s1
	global_store_b32 v[4:5], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB22_2
.LBB22_3:                               ; %Flow22
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20assignScaledAdditionifPKfS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end22:
	.size	_Z20assignScaledAdditionifPKfS0_Pf, .Lfunc_end22-_Z20assignScaledAdditionifPKfS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 264
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z23assignScaledSubtractionifPKfS0_Pf ; -- Begin function _Z23assignScaledSubtractionifPKfS0_Pf
	.globl	_Z23assignScaledSubtractionifPKfS0_Pf
	.p2align	8
	.type	_Z23assignScaledSubtractionifPKfS0_Pf,@function
_Z23assignScaledSubtractionifPKfS0_Pf:  ; @_Z23assignScaledSubtractionifPKfS0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s6, 0xffff
	s_mov_b32 s6, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB23_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s11, s[4:5], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s11, s10
	s_ashr_i32 s11, s10, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[10:11], 2
.LBB23_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v6, v[6:7], off
	v_add_nc_u32_e32 v1, s10, v1
	v_add_co_u32 v4, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s12
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v0, v0, v6
	v_cmp_le_i32_e64 s0, s2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v0, s3, v0
	s_or_b32 s1, s0, s1
	global_store_b32 v[4:5], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB23_2
.LBB23_3:                               ; %Flow22
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23assignScaledSubtractionifPKfS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end23:
	.size	_Z23assignScaledSubtractionifPKfS0_Pf, .Lfunc_end23-_Z23assignScaledSubtractionifPKfS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 264
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z20addScaledSubtractionifPKfS0_Pf ; -- Begin function _Z20addScaledSubtractionifPKfS0_Pf
	.globl	_Z20addScaledSubtractionifPKfS0_Pf
	.p2align	8
	.type	_Z20addScaledSubtractionifPKfS0_Pf,@function
_Z20addScaledSubtractionifPKfS0_Pf:     ; @_Z20addScaledSubtractionifPKfS0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s6, 0xffff
	s_mov_b32 s6, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB24_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s11, s[4:5], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s11, s10
	s_ashr_i32 s11, s10, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[10:11], 2
.LBB24_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v4, v[6:7], off
	global_load_b32 v5, v[8:9], off
	v_add_nc_u32_e32 v1, s10, v1
	v_add_co_u32 v2, vcc_lo, v2, s12
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v0, v0, v4
	v_cmp_le_i32_e64 s0, s2, v1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v5, s3, v0
	s_or_b32 s1, s0, s1
	global_store_b32 v[8:9], v5, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB24_2
.LBB24_3:                               ; %Flow22
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20addScaledSubtractionifPKfS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end24:
	.size	_Z20addScaledSubtractionifPKfS0_Pf, .Lfunc_end24-_Z20addScaledSubtractionifPKfS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 276
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z19softmaxCeDerivativeiiPKfPKiPf ; -- Begin function _Z19softmaxCeDerivativeiiPKfPKiPf
	.globl	_Z19softmaxCeDerivativeiiPKfPKiPf
	.p2align	8
	.type	_Z19softmaxCeDerivativeiiPKfPKiPf,@function
_Z19softmaxCeDerivativeiiPKfPKiPf:      ; @_Z19softmaxCeDerivativeiiPKfPKiPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[8:9], s[0:1], 0x0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s4, 0xffff
	s_mul_i32 s9, s9, s8
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s9, v1
	s_cbranch_execz .LBB25_3
; %bb.1:                                ; %.lr.ph
	s_ashr_i32 s10, s8, 31
	s_load_b32 s13, s[2:3], 0x0
	s_add_i32 s4, s8, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s11, s4, s10
	v_cvt_f32_u32_e32 v0, s11
	s_sub_i32 s2, 0, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v0, s2, v2
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s13, s12
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v2, v0
	v_cvt_f32_i32_e32 v0, s8
	s_sub_i32 s8, 0, s8
	v_add_nc_u32_e32 v3, v2, v3
.LBB25_2:                               ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v1, v2
	v_xor_b32_e32 v4, v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v4, v3
	v_mul_lo_u32 v6, v5, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v4, v4, v6
	v_add_nc_u32_e32 v6, 1, v5
	v_subrev_nc_u32_e32 v7, s11, v4
	v_cmp_le_u32_e32 vcc_lo, s11, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v5, v5, v6 :: v_dual_cndmask_b32 v4, v4, v7
	v_xor_b32_e32 v7, s10, v2
	v_add_nc_u32_e32 v6, 1, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s11, v4
	v_cndmask_b32_e32 v4, v5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v7
	v_sub_nc_u32_e32 v8, v4, v7
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[4:5], null, s8, v8, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	global_load_b32 v2, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_cmp_eq_u32_e32 vcc_lo, v8, v2
	v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v2, v4, v2
	v_div_scale_f32 v4, null, v0, v0, v2
	v_div_scale_f32 v9, vcc_lo, v2, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v4, v5, 1.0
	v_fmac_f32_e32 v5, v8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v9, v5
	v_fma_f32 v10, -v4, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v10, v5
	v_fma_f32 v4, -v4, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v4, v4, v5, v8
	v_cmp_le_i32_e32 vcc_lo, s9, v1
	v_div_fixup_f32 v2, v4, v0, v2
	v_add_co_u32 v4, s0, s2, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s3, v7, s0
	s_or_b32 s12, vcc_lo, s12
	global_store_b32 v[4:5], v2, off
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB25_2
.LBB25_3:                               ; %Flow26
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19softmaxCeDerivativeiiPKfPKiPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end25:
	.size	_Z19softmaxCeDerivativeiiPKfPKiPf, .Lfunc_end25-_Z19softmaxCeDerivativeiiPKfPKiPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 556
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z22addSoftmaxCeDerivativeiiPKfPKiPf ; -- Begin function _Z22addSoftmaxCeDerivativeiiPKfPKiPf
	.globl	_Z22addSoftmaxCeDerivativeiiPKfPKiPf
	.p2align	8
	.type	_Z22addSoftmaxCeDerivativeiiPKfPKiPf,@function
_Z22addSoftmaxCeDerivativeiiPKfPKiPf:   ; @_Z22addSoftmaxCeDerivativeiiPKfPKiPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s6, 0xffff
	s_mul_i32 s3, s3, s2
	v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB26_3
; %bb.1:                                ; %.lr.ph
	s_ashr_i32 s8, s2, 31
	s_load_b32 s11, s[4:5], 0x0
	s_add_i32 s6, s2, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s9, s6, s8
	v_cvt_f32_u32_e32 v0, s9
	s_sub_i32 s4, 0, s9
	s_delay_alu instid0(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s11, s10
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v2, v0
	v_mul_lo_u32 v0, s4, v2
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v2, v0
	v_cvt_f32_i32_e32 v0, s2
	s_sub_i32 s2, 0, s2
	v_add_nc_u32_e32 v3, v2, v3
.LBB26_2:                               ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v1, v2
	v_xor_b32_e32 v4, v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v4, v3
	v_mul_lo_u32 v6, v5, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v4, v4, v6
	v_add_nc_u32_e32 v6, 1, v5
	v_subrev_nc_u32_e32 v7, s9, v4
	v_cmp_le_u32_e32 vcc_lo, s9, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v5, v5, v6 :: v_dual_cndmask_b32 v4, v4, v7
	v_xor_b32_e32 v7, s8, v2
	v_add_nc_u32_e32 v6, 1, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s9, v4
	v_cndmask_b32_e32 v4, v5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v7
	v_sub_nc_u32_e32 v8, v4, v7
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[4:5], null, s2, v8, v[1:2]
	v_add_nc_u32_e32 v1, s10, v1
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	global_load_b32 v2, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v9, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v7, vcc_lo
	global_load_b32 v6, v[4:5], off
	s_waitcnt vmcnt(2)
	v_cmp_eq_u32_e32 vcc_lo, v8, v2
	v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v2, v9, v2
	v_div_scale_f32 v7, null, v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v7, v8, 1.0
	v_fmac_f32_e32 v8, v9, v8
	v_div_scale_f32 v9, vcc_lo, v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v9, v8
	v_fma_f32 v11, -v7, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v11, v8
	v_fma_f32 v7, -v7, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v7, v7, v8, v10
	v_cmp_le_i32_e32 vcc_lo, s3, v1
	v_div_fixup_f32 v2, v7, v0, v2
	s_or_b32 s11, vcc_lo, s11
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, v6, v2
	global_store_b32 v[4:5], v2, off
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB26_2
.LBB26_3:                               ; %Flow26
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22addSoftmaxCeDerivativeiiPKfPKiPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end26:
	.size	_Z22addSoftmaxCeDerivativeiiPKfPKiPf, .Lfunc_end26-_Z22addSoftmaxCeDerivativeiiPKfPKiPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 572
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z27assignSequentialMeanPoolingiiPPKfiPf ; -- Begin function _Z27assignSequentialMeanPoolingiiPPKfiPf
	.globl	_Z27assignSequentialMeanPoolingiiPPKfiPf
	.p2align	8
	.type	_Z27assignSequentialMeanPoolingiiPPKfiPf,@function
_Z27assignSequentialMeanPoolingiiPPKfiPf: ; @_Z27assignSequentialMeanPoolingiiPPKfiPf
; %bb.0:
	s_clause 0x2
	s_load_b32 s6, s[0:1], 0x2c
	s_load_b64 s[4:5], s[0:1], 0x0
	s_load_b32 s8, s[0:1], 0x10
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s6, 0xffff
	s_mul_i32 s4, s5, s4
	v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
	s_mul_i32 s5, s4, s8
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB27_5
; %bb.1:                                ; %.lr.ph
	s_ashr_i32 s6, s4, 31
	s_load_b32 s11, s[2:3], 0x0
	s_add_i32 s7, s4, s6
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x18
	s_load_b64 s[0:1], s[0:1], 0x8
	s_xor_b32 s7, s7, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, s7
	s_sub_i32 s10, 0, s7
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v2, v0
	v_mul_lo_u32 v0, s10, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v2, v0
	v_cvt_f32_i32_e32 v0, s8
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s11, s9
	s_mov_b32 s9, 0
	v_add_nc_u32_e32 v6, v2, v3
.LBB27_2:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB27_3 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v1, v2
	v_xor_b32_e32 v3, v3, v2
	v_xor_b32_e32 v2, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v6
	v_mul_lo_u32 v5, v4, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v5
	v_add_nc_u32_e32 v5, 1, v4
	v_subrev_nc_u32_e32 v7, s7, v3
	v_cmp_le_u32_e32 vcc_lo, s7, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, v4, v5 :: v_dual_cndmask_b32 v3, v3, v7
	v_add_nc_u32_e32 v5, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s7, v3
	v_cndmask_b32_e32 v3, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v2
	v_sub_nc_u32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[3:4], 3, v[2:3]
	v_mul_lo_u32 v2, v2, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v7, v1, v2
	global_load_b64 v[3:4], v[3:4], off
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v3, v7
	v_add_co_ci_u32_e32 v3, vcc_lo, v4, v8, vcc_lo
	global_load_b32 v4, v[2:3], off
	v_add_co_u32 v2, vcc_lo, s2, v7
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v7, null, v0, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v7, v8, 1.0
	v_fmac_f32_e32 v8, v9, v8
	v_div_scale_f32 v9, vcc_lo, v4, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v9, v8
	v_fma_f32 v11, -v7, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v11, v8
	v_fma_f32 v7, -v7, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v7, v7, v8, v10
	v_div_fixup_f32 v7, v7, v0, v4
.LBB27_3:                               ; %atomicrmw.start
                                        ;   Parent Loop BB27_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v4, v5, v7
	global_atomic_cmpswap_b32 v4, v[2:3], v[4:5], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v4, v5
	v_mov_b32_e32 v5, v4
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB27_3
; %bb.4:                                ; %atomicrmw.end
                                        ;   in Loop: Header=BB27_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	v_add_nc_u32_e32 v1, s8, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s5, v1
	s_or_b32 s9, vcc_lo, s9
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB27_2
.LBB27_5:                               ; %Flow32
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27assignSequentialMeanPoolingiiPPKfiPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end27:
	.size	_Z27assignSequentialMeanPoolingiiPPKfiPf, .Lfunc_end27-_Z27assignSequentialMeanPoolingiiPPKfiPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 596
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z26assignSequentialSumPoolingiiPPKfiPf ; -- Begin function _Z26assignSequentialSumPoolingiiPPKfiPf
	.globl	_Z26assignSequentialSumPoolingiiPPKfiPf
	.p2align	8
	.type	_Z26assignSequentialSumPoolingiiPPKfiPf,@function
_Z26assignSequentialSumPoolingiiPPKfiPf: ; @_Z26assignSequentialSumPoolingiiPPKfiPf
; %bb.0:
	s_clause 0x2
	s_load_b32 s6, s[0:1], 0x2c
	s_load_b64 s[4:5], s[0:1], 0x0
	s_load_b32 s7, s[0:1], 0x10
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s6, 0xffff
	s_mul_i32 s4, s5, s4
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_mul_i32 s5, s4, s7
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB28_5
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s6, s4, 31
	s_load_b32 s10, s[2:3], 0x0
	s_add_i32 s7, s4, s6
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x18
	s_load_b64 s[0:1], s[0:1], 0x8
	s_xor_b32 s7, s7, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, s7
	s_sub_i32 s9, 0, s7
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s10, s8
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s9, v0
	s_mov_b32 s9, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v0, v2
	v_add_nc_u32_e32 v0, v0, v2
.LBB28_2:                               ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB28_3 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v1, v2
	v_xor_b32_e32 v3, v3, v2
	v_xor_b32_e32 v2, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v0
	v_mul_lo_u32 v5, v4, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v5
	v_add_nc_u32_e32 v5, 1, v4
	v_subrev_nc_u32_e32 v6, s7, v3
	v_cmp_le_u32_e32 vcc_lo, s7, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, v4, v5 :: v_dual_cndmask_b32 v3, v3, v6
	v_add_nc_u32_e32 v5, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s7, v3
	v_cndmask_b32_e32 v3, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v2
	v_sub_nc_u32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[3:4], 3, v[2:3]
	v_mul_lo_u32 v2, v2, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v1, v2
	global_load_b64 v[3:4], v[3:4], off
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v6, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v6, vcc_lo
	global_load_b32 v6, v[7:8], off
	global_load_b32 v5, v[2:3], off
.LBB28_3:                               ; %atomicrmw.start
                                        ;   Parent Loop BB28_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v4, v5, v6
	global_atomic_cmpswap_b32 v4, v[2:3], v[4:5], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v4, v5
	v_mov_b32_e32 v5, v4
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB28_3
; %bb.4:                                ; %atomicrmw.end
                                        ;   in Loop: Header=BB28_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	v_add_nc_u32_e32 v1, s8, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s5, v1
	s_or_b32 s9, vcc_lo, s9
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB28_2
.LBB28_5:                               ; %Flow31
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z26assignSequentialSumPoolingiiPPKfiPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end28:
	.size	_Z26assignSequentialSumPoolingiiPPKfiPf, .Lfunc_end28-_Z26assignSequentialSumPoolingiiPPKfiPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 492
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z27assignSequentialWeightedSumiiPPKfS0_iPf ; -- Begin function _Z27assignSequentialWeightedSumiiPPKfS0_iPf
	.globl	_Z27assignSequentialWeightedSumiiPPKfS0_iPf
	.p2align	8
	.type	_Z27assignSequentialWeightedSumiiPPKfS0_iPf,@function
_Z27assignSequentialWeightedSumiiPPKfS0_iPf: ; @_Z27assignSequentialWeightedSumiiPPKfS0_iPf
; %bb.0:
	s_clause 0x2
	s_load_b32 s6, s[0:1], 0x34
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b32 s7, s[0:1], 0x18
	s_add_u32 s4, s0, 40
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s6, 0xffff
	s_mul_i32 s3, s3, s2
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_mul_i32 s8, s3, s7
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB29_5
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s9, s3, 31
	s_ashr_i32 s6, s2, 31
	s_add_i32 s7, s3, s9
	s_add_i32 s11, s2, s6
	s_xor_b32 s10, s7, s9
	s_xor_b32 s11, s11, s6
	v_cvt_f32_u32_e32 v0, s10
	v_cvt_f32_u32_e32 v2, s11
	s_load_b32 s13, s[4:5], 0x0
	s_sub_i32 s4, 0, s10
	s_sub_i32 s5, 0, s11
	v_rcp_iflag_f32_e32 v0, v0
	v_rcp_iflag_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v0, v0
	v_cvt_u32_f32_e32 v2, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s12, s13, s12
	s_mov_b32 s13, 0
	v_mul_lo_u32 v3, s4, v0
	v_mul_lo_u32 v4, s5, v2
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v0, v3
	v_mul_hi_u32 v4, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v0, v3
	v_add_nc_u32_e32 v6, v2, v4
.LBB29_2:                               ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB29_3 Depth 2
	v_ashrrev_i32_e32 v5, 31, v1
	s_mov_b32 s14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v1, v5
	v_xor_b32_e32 v7, v2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v7, v0
	v_mul_lo_u32 v3, v2, s10
	v_add_nc_u32_e32 v4, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v7, v3
	v_subrev_nc_u32_e32 v8, s10, v3
	v_cmp_le_u32_e32 vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_cndmask_b32_e32 v3, v3, v8, vcc_lo
	v_xor_b32_e32 v8, s9, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v4, 1, v2
	v_cmp_le_u32_e32 vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_xor_b32_e32 v2, v2, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v8
	v_mul_hi_u32 v8, v7, v6
	v_ashrrev_i32_e32 v3, 31, v2
	v_mul_lo_u32 v9, v2, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v8, v8, s11
	v_lshlrev_b64 v[3:4], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v9, v1, v9
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	v_sub_nc_u32_e32 v7, v7, v8
	v_ashrrev_i32_e32 v10, 31, v9
	global_load_b64 v[3:4], v[3:4], off
	v_subrev_nc_u32_e32 v8, s11, v7
	v_cmp_le_u32_e32 vcc_lo, s11, v7
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v8, vcc_lo
	v_subrev_nc_u32_e32 v8, s11, v7
	v_cmp_le_u32_e32 vcc_lo, s11, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v8, vcc_lo
	v_xor_b32_e32 v7, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v7, v5
	v_mad_u64_u32 v[7:8], null, v2, s2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v3, v9
	v_add_co_ci_u32_e32 v12, vcc_lo, v4, v10, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v9
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v10, vcc_lo
	global_load_b32 v4, v[11:12], off
	global_load_b32 v7, v[7:8], off
	global_load_b32 v5, v[2:3], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v7, v4, v7
.LBB29_3:                               ; %atomicrmw.start
                                        ;   Parent Loop BB29_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v4, v5, v7
	global_atomic_cmpswap_b32 v4, v[2:3], v[4:5], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v4, v5
	v_mov_b32_e32 v5, v4
	s_or_b32 s14, vcc_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB29_3
; %bb.4:                                ; %atomicrmw.end
                                        ;   in Loop: Header=BB29_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_add_nc_u32_e32 v1, s12, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s8, v1
	s_or_b32 s13, vcc_lo, s13
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB29_2
.LBB29_5:                               ; %Flow37
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27assignSequentialWeightedSumiiPPKfS0_iPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end29:
	.size	_Z27assignSequentialWeightedSumiiPPKfS0_iPf, .Lfunc_end29-_Z27assignSequentialWeightedSumiiPPKfS0_iPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 676
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16sequentiallyTileiPKfPPfi ; -- Begin function _Z16sequentiallyTileiPKfPPfi
	.globl	_Z16sequentiallyTileiPKfPPfi
	.p2align	8
	.type	_Z16sequentiallyTileiPKfPPfi,@function
_Z16sequentiallyTileiPKfPPfi:           ; @_Z16sequentiallyTileiPKfPPfi
; %bb.0:
	s_clause 0x2
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s11, s[0:1], 0x0
	s_load_b32 s8, s[0:1], 0x18
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_mul_i32 s8, s8, s11
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB30_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s9, s11, 31
	s_load_b32 s2, s[2:3], 0x0
	s_add_i32 s4, s11, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_xor_b32 s10, s4, s9
	s_load_b128 s[4:7], s[0:1], 0x8
	v_cvt_f32_u32_e32 v0, s10
	s_sub_i32 s3, 0, s10
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s2, s12
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s3, v0
	s_sub_i32 s3, 0, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v0, v2
	v_add_nc_u32_e32 v0, v0, v2
.LBB30_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v1, v2
	v_xor_b32_e32 v4, s9, v2
	v_xor_b32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v2, v0
	v_mul_lo_u32 v5, v3, s10
	v_add_nc_u32_e32 v6, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v5
	v_subrev_nc_u32_e32 v5, s10, v2
	v_cmp_le_u32_e32 vcc_lo, s10, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v2, v2, v5 :: v_dual_cndmask_b32 v3, v3, v6
	v_cmp_le_u32_e32 vcc_lo, s10, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, 1, v3
	v_cndmask_b32_e32 v2, v3, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v4
	v_sub_nc_u32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[4:5], null, s3, v2, v[1:2]
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_nc_u32_e32 v1, s1, v1
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	v_add_co_u32 v6, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v5, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s8, v1
	global_load_b32 v6, v[6:7], off
	s_or_b32 s2, vcc_lo, s2
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, s0, v2, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, v3, v5, s0
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v6, off
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB30_2
.LBB30_3:                               ; %Flow24
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16sequentiallyTileiPKfPPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end30:
	.size	_Z16sequentiallyTileiPKfPPfi, .Lfunc_end30-_Z16sequentiallyTileiPKfPPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 436
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13assignDLDpreaiiPPKfS0_S0_iPf ; -- Begin function _Z13assignDLDpreaiiPPKfS0_S0_iPf
	.globl	_Z13assignDLDpreaiiPPKfS0_S0_iPf
	.p2align	8
	.type	_Z13assignDLDpreaiiPPKfS0_S0_iPf,@function
_Z13assignDLDpreaiiPPKfS0_S0_iPf:       ; @_Z13assignDLDpreaiiPPKfS0_S0_iPf
; %bb.0:
	s_clause 0x2
	s_load_b32 s14, s[0:1], 0x20
	s_load_b32 s6, s[0:1], 0x3c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s16, s14, 31
	s_add_u32 s4, s0, 48
	s_addc_u32 s5, s1, 0
	s_and_b32 s18, s6, 0xffff
	s_mul_i32 s3, s3, s2
	v_mad_u64_u32 v[1:2], null, s15, s18, v[0:1]
	s_mul_i32 s6, s14, s3
	s_mul_hi_i32 s9, s14, s3
	s_mul_i32 s7, s6, s16
	s_mul_hi_u32 s8, s6, s14
	s_mul_i32 s9, s9, s14
	s_add_i32 s7, s8, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s9, s7, s9
	s_mul_i32 s8, s6, s14
	s_mov_b32 s6, exec_lo
	v_cmpx_gt_u64_e64 s[8:9], v[1:2]
	s_cbranch_execz .LBB31_5
; %bb.1:                                ; %.lr.ph
	s_ashr_i32 s15, s3, 31
	s_ashr_i32 s17, s2, 31
	v_cvt_f32_u32_e32 v0, s3
	v_cvt_f32_u32_e32 v3, s15
	v_cvt_f32_u32_e32 v4, s14
	v_cvt_f32_u32_e32 v5, s16
	v_cvt_f32_u32_e32 v6, s2
	v_cvt_f32_u32_e32 v7, s17
	v_fmac_f32_e32 v0, 0x4f800000, v3
	s_load_b32 s19, s[4:5], 0x0
	v_fmac_f32_e32 v4, 0x4f800000, v5
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[10:11], s[0:1], 0x18
	v_fmac_f32_e32 v6, 0x4f800000, v7
	v_rcp_f32_e32 v0, v0
	s_load_b64 s[12:13], s[0:1], 0x28
	v_rcp_f32_e32 v3, v4
	s_mov_b32 s20, 0
	v_rcp_f32_e32 v4, v6
	s_delay_alu instid0(TRANS32_DEP_3)
	v_mul_f32_e32 v5, 0x5f7ffffc, v0
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v3, 0x5f7ffffc, v3 :: v_dual_mul_f32 v4, 0x5f7ffffc, v4
	v_mul_f32_e32 v6, 0x2f800000, v5
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s18, s19, s18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v0, 0x2f800000, v3
	s_ashr_i32 s19, s18, 31
	v_mul_f32_e32 v7, 0x2f800000, v4
	v_trunc_f32_e32 v6, v6
	v_trunc_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_trunc_f32_e32 v11, v7
	v_fmac_f32_e32 v5, 0xcf800000, v6
	v_cvt_u32_f32_e32 v7, v6
	s_delay_alu instid0(VALU_DEP_4)
	v_fmac_f32_e32 v3, 0xcf800000, v0
	v_cvt_u32_f32_e32 v0, v0
	v_fmac_f32_e32 v4, 0xcf800000, v11
	v_cvt_u32_f32_e32 v9, v5
	v_cvt_u32_f32_e32 v11, v11
	v_cvt_u32_f32_e32 v8, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_cvt_u32_f32_e32 v10, v4
.LBB31_2:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB31_3 Depth 2
	s_sub_u32 s0, 0, s3
	s_subb_u32 s1, 0, s15
	v_mul_hi_u32 v3, s0, v9
	v_mul_lo_u32 v4, s0, v7
	v_mul_lo_u32 v5, s1, v9
	s_sub_u32 s21, 0, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v15, s21, v8
	v_add_nc_u32_e32 v3, v3, v4
	v_mul_lo_u32 v4, s0, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v17, v8, v15
	v_add_nc_u32_e32 v3, v3, v5
	v_mul_hi_u32 v19, v0, v15
	v_mul_lo_u32 v15, v0, v15
	v_mul_hi_u32 v5, v9, v4
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_lo_u32 v6, v9, v3
	v_mul_hi_u32 v12, v9, v3
	v_mul_hi_u32 v13, v7, v4
	v_mul_lo_u32 v4, v7, v4
	v_mul_hi_u32 v14, v7, v3
	v_mul_lo_u32 v3, v7, v3
	v_add_co_u32 v5, vcc_lo, v5, v6
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v5, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, v6, v13, vcc_lo
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v14, vcc_lo
	v_mul_hi_u32 v13, s21, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, v4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v5, vcc_lo
	v_mul_lo_u32 v14, s21, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, v9, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v7, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v5, s0, v3
	v_mul_lo_u32 v12, s1, v3
	v_mul_lo_u32 v6, s0, v4
	v_add_nc_u32_e32 v13, v13, v14
	s_subb_u32 s1, 0, s16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v5, v6
	v_mul_lo_u32 v6, s0, v3
	v_add_nc_u32_e32 v5, v5, v12
	v_mul_lo_u32 v12, s1, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v14, v3, v6
	v_mul_lo_u32 v16, v3, v5
	v_mul_hi_u32 v18, v3, v5
	v_mul_hi_u32 v20, v4, v6
	v_mul_lo_u32 v6, v4, v6
	v_mul_hi_u32 v21, v4, v5
	v_mul_lo_u32 v5, v4, v5
	v_add_nc_u32_e32 v12, v13, v12
	v_add_co_u32 v14, vcc_lo, v14, v16
	v_add_co_ci_u32_e32 v16, vcc_lo, 0, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v18, v8, v12
	v_add_co_u32 v6, vcc_lo, v14, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, v16, v20, vcc_lo
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v21, vcc_lo
	v_mul_hi_u32 v16, v8, v12
	v_add_co_u32 v5, vcc_lo, v6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v14, vcc_lo
	v_mul_hi_u32 v21, v0, v12
	v_add_co_u32 v13, vcc_lo, v3, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v4, v6, vcc_lo
	v_mul_lo_u32 v22, v0, v12
	v_mul_hi_u32 v20, v1, v13
	v_mad_u64_u32 v[5:6], null, v2, v13, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, v1, v14, 0
	v_mad_u64_u32 v[12:13], null, v2, v14, 0
	v_add_co_u32 v3, vcc_lo, v20, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	v_add_co_u32 v14, vcc_lo, v17, v18
	v_add_co_ci_u32_e32 v16, vcc_lo, 0, v16, vcc_lo
	v_add_co_u32 v3, vcc_lo, v3, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, v4, v6, vcc_lo
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v13, vcc_lo
	v_add_co_u32 v5, vcc_lo, v14, v15
	v_add_co_u32 v6, s0, v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v12, s0, 0, v4, s0
	v_add_co_ci_u32_e32 v5, vcc_lo, v16, v19, vcc_lo
	v_mul_lo_u32 v14, s15, v6
	v_mad_u64_u32 v[3:4], null, s3, v6, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v15, s3, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v21, vcc_lo
	v_add_co_u32 v5, vcc_lo, v5, v22
	v_add_co_u32 v16, s0, v6, 2
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	v_add3_u32 v4, v4, v15, v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, v8, v5
	v_add_co_ci_u32_e32 v13, vcc_lo, v0, v13, vcc_lo
	v_add_co_u32 v15, vcc_lo, v6, 1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_sub_nc_u32_e32 v22, v2, v4
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v12, vcc_lo
	v_sub_co_u32 v3, vcc_lo, v1, v3
	v_add_co_ci_u32_e64 v17, s0, 0, v12, s0
	v_subrev_co_ci_u32_e64 v22, s0, s15, v22, vcc_lo
	v_sub_co_ci_u32_e32 v4, vcc_lo, v2, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_co_u32 v24, vcc_lo, v3, s3
	v_subrev_co_ci_u32_e32 v22, vcc_lo, 0, v22, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	v_mul_hi_u32 v19, s21, v5
	v_mul_lo_u32 v21, s21, v13
	v_mul_lo_u32 v20, s1, v5
	v_mul_lo_u32 v14, s21, v5
	v_cndmask_b32_e64 v3, 0, -1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s3, v24
	v_add_nc_u32_e32 v19, v19, v21
	v_cndmask_b32_e64 v21, 0, -1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s15, v22
	v_mul_hi_u32 v23, v13, v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v19, v19, v20
	v_cndmask_b32_e64 v24, 0, -1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s15, v4
	v_cndmask_b32_e64 v25, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s15, v22
	v_cndmask_b32_e32 v20, v24, v21, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s15, v4
	v_mul_hi_u32 v21, v5, v14
	v_mul_lo_u32 v4, v5, v19
	v_mul_lo_u32 v14, v13, v14
	v_cmp_ne_u32_e64 s0, 0, v20
	v_cndmask_b32_e32 v3, v25, v3, vcc_lo
	v_mul_hi_u32 v20, v13, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v17, v18, v17, s0
	v_mul_hi_u32 v18, v5, v19
	v_cmp_ne_u32_e64 s1, 0, v3
	v_add_co_u32 v3, vcc_lo, v21, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v22, v12, v17, s1
	v_mul_lo_u32 v12, v13, v19
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v18, vcc_lo
	v_add_co_u32 v3, vcc_lo, v3, v14
	v_cndmask_b32_e64 v14, v15, v16, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, v4, v23, vcc_lo
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v20, vcc_lo
	v_cndmask_b32_e64 v18, v6, v14, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, v3, v12
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, v5, v3
	v_add_co_ci_u32_e32 v13, vcc_lo, v13, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v14, v18, v12
	v_mad_u64_u32 v[5:6], null, v22, v12, 0
	v_mad_u64_u32 v[3:4], null, v18, v13, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, v14, v3
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v4, vcc_lo
	v_mad_u64_u32 v[3:4], null, v22, v13, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, v12, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, v14, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, v5, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v4, vcc_lo
	v_mul_lo_u32 v12, s16, v5
	v_mad_u64_u32 v[3:4], null, s14, v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v6, s14, v6
	v_sub_co_u32 v3, vcc_lo, v18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v4, v4, v6, v12
	v_add_co_u32 v12, s0, v5, 2
	v_sub_nc_u32_e32 v6, v22, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e64 v6, s0, s16, v6, vcc_lo
	v_sub_co_u32 v13, s0, v3, s14
	v_sub_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	v_subrev_co_ci_u32_e64 v6, s0, 0, v6, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s14, v13
	s_sub_u32 s0, 0, s2
	s_subb_u32 s1, 0, s17
	v_cndmask_b32_e64 v13, 0, -1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s16, v6
	v_cndmask_b32_e64 v14, 0, -1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s14, v3
	v_cndmask_b32_e64 v3, 0, -1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s16, v4
	v_cndmask_b32_e64 v15, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s16, v6
	v_cndmask_b32_e32 v6, v14, v13, vcc_lo
	v_add_co_u32 v13, vcc_lo, v5, 1
	v_cmp_eq_u32_e32 vcc_lo, s16, v4
	v_cndmask_b32_e32 v3, v15, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_ne_u32_e32 vcc_lo, 0, v6
	v_cndmask_b32_e32 v4, v13, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	v_mul_lo_u32 v13, s1, v10
	v_mul_lo_u32 v12, s0, v11
	v_cndmask_b32_e32 v25, v5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v25, s14, 0
	v_sub_co_u32 v5, null, v18, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[3:4], 3, v[5:6]
	v_mul_hi_u32 v6, s0, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, v6, v12
	v_mul_lo_u32 v12, s0, v10
	global_load_b64 v[3:4], v[3:4], off
	v_add_nc_u32_e32 v6, v6, v13
	v_mul_hi_u32 v13, v10, v12
	v_mul_lo_u32 v14, v10, v6
	v_mul_hi_u32 v15, v10, v6
	v_mul_hi_u32 v16, v11, v12
	v_mul_lo_u32 v12, v11, v12
	v_mul_hi_u32 v17, v11, v6
	v_mul_lo_u32 v6, v11, v6
	v_add_co_u32 v13, vcc_lo, v13, v14
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, v13, v12
	v_add_co_ci_u32_e32 v12, vcc_lo, v14, v16, vcc_lo
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v12, v6
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v10, v6
	v_add_co_ci_u32_e32 v12, vcc_lo, v11, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v13, s0, v6
	v_mul_lo_u32 v15, s1, v6
	v_mul_lo_u32 v14, s0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v13, v13, v14
	v_mul_lo_u32 v14, s0, v6
	v_add_nc_u32_e32 v13, v13, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v15, v6, v14
	v_mul_lo_u32 v16, v6, v13
	v_mul_hi_u32 v17, v6, v13
	v_mul_hi_u32 v19, v12, v14
	v_mul_lo_u32 v14, v12, v14
	v_mul_hi_u32 v20, v12, v13
	v_mul_lo_u32 v13, v12, v13
	v_add_co_u32 v15, vcc_lo, v15, v16
	v_add_co_ci_u32_e32 v16, vcc_lo, 0, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, v15, v14
	v_add_co_ci_u32_e32 v14, vcc_lo, v16, v19, vcc_lo
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, v14, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v6, v13
	v_add_co_ci_u32_e32 v19, vcc_lo, v12, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v20, v1, v6
	v_mad_u64_u32 v[14:15], null, v2, v6, 0
	v_mad_u64_u32 v[12:13], null, v1, v19, 0
	v_mad_u64_u32 v[16:17], null, v2, v19, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v20, v12
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v6, v14
	v_add_co_ci_u32_e32 v6, vcc_lo, v12, v15, vcc_lo
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v6, v16
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v12, vcc_lo
	v_mul_lo_u32 v16, v18, s15
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v15, s17, v6
	v_mad_u64_u32 v[12:13], null, s2, v6, 0
	v_mul_lo_u32 v6, s2, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add3_u32 v6, v13, v6, v15
	v_mad_u64_u32 v[13:14], null, v18, s3, 0
	v_sub_co_u32 v18, vcc_lo, v1, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v17, v2, v6
	v_mul_lo_u32 v15, v22, s3
	v_subrev_co_ci_u32_e64 v12, s0, s17, v17, vcc_lo
	v_sub_co_ci_u32_e32 v6, vcc_lo, v2, v6, vcc_lo
	v_sub_co_u32 v17, vcc_lo, v18, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_subrev_co_ci_u32_e64 v19, s0, 0, v12, vcc_lo
	v_cmp_le_u32_e64 s0, s2, v18
	v_subrev_co_ci_u32_e32 v12, vcc_lo, s17, v12, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s17, v6
	v_add3_u32 v14, v14, v16, v15
	v_cndmask_b32_e64 v20, 0, -1, s0
	v_cmp_le_u32_e64 s0, s2, v17
	v_cndmask_b32_e64 v23, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s17, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v21, 0, -1, s0
	v_cmp_le_u32_e64 s0, s17, v19
	v_cndmask_b32_e64 v22, 0, -1, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v21, v22, v21, vcc_lo
	v_sub_co_u32 v22, vcc_lo, v17, s2
	v_subrev_co_ci_u32_e32 v24, vcc_lo, 0, v12, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s17, v6
	v_mul_lo_u32 v12, v25, s2
	v_cndmask_b32_e32 v20, v23, v20, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cmp_ne_u32_e64 s0, 0, v20
	v_cndmask_b32_e32 v15, v19, v24, vcc_lo
	v_cndmask_b32_e32 v17, v17, v22, vcc_lo
	v_sub_co_u32 v13, vcc_lo, v1, v13
	v_sub_co_ci_u32_e32 v14, vcc_lo, v2, v14, vcc_lo
	v_cndmask_b32_e64 v16, v6, v15, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v15, v18, v17, s0
	s_mov_b32 s0, 0
	v_lshlrev_b64 v[17:18], 2, v[13:14]
	v_ashrrev_i32_e32 v13, 31, v12
	v_mul_lo_u32 v14, v5, s2
	v_lshlrev_b64 v[19:20], 2, v[15:16]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_co_u32 v21, vcc_lo, s6, v17
	v_add_co_ci_u32_e32 v22, vcc_lo, s7, v18, vcc_lo
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_u32 v6, vcc_lo, s10, v19
	v_add_co_ci_u32_e32 v16, vcc_lo, s11, v20, vcc_lo
	v_ashrrev_i32_e32 v15, 31, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v23, vcc_lo, v6, v12
	v_add_co_ci_u32_e32 v24, vcc_lo, v16, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, v17
	v_add_co_ci_u32_e32 v4, vcc_lo, v4, v18, vcc_lo
	global_load_b32 v17, v[21:22], off
	global_load_b32 v18, v[23:24], off
	global_load_b32 v21, v[3:4], off
	v_add_co_u32 v3, vcc_lo, s12, v12
	v_add_co_ci_u32_e32 v4, vcc_lo, s13, v13, vcc_lo
	v_add_co_u32 v12, vcc_lo, v6, v14
	v_add_co_ci_u32_e32 v13, vcc_lo, v16, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, v3, v19
	v_add_co_ci_u32_e32 v4, vcc_lo, v4, v20, vcc_lo
	global_load_b32 v12, v[12:13], off
	global_load_b32 v6, v[3:4], off
	v_cmp_eq_u32_e32 vcc_lo, v25, v5
	v_cndmask_b32_e64 v5, 0, 1.0, vcc_lo
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v5, v5, v18
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v13, v21, v17
	v_mul_f32_e32 v5, v13, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v12, v12, v5
.LBB31_3:                               ; %atomicrmw.start
                                        ;   Parent Loop BB31_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v5, v6, v12
	global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v5, v6
	v_mov_b32_e32 v6, v5
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB31_3
; %bb.4:                                ; %atomicrmw.end
                                        ;   in Loop: Header=BB31_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v1, vcc_lo, v1, s18
	v_add_co_ci_u32_e32 v2, vcc_lo, s19, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_u64_e32 vcc_lo, s[8:9], v[1:2]
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB31_2
.LBB31_5:                               ; %Flow56
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13assignDLDpreaiiPPKfS0_S0_iPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end31:
	.size	_Z13assignDLDpreaiiPPKfS0_S0_iPf, .Lfunc_end31-_Z13assignDLDpreaiiPPKfS0_S0_iPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2760
; NumSgprs: 24
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z22addAttentionDerivativeiiPPKfS0_iPf ; -- Begin function _Z22addAttentionDerivativeiiPPKfS0_iPf
	.globl	_Z22addAttentionDerivativeiiPPKfS0_iPf
	.p2align	8
	.type	_Z22addAttentionDerivativeiiPPKfS0_iPf,@function
_Z22addAttentionDerivativeiiPPKfS0_iPf: ; @_Z22addAttentionDerivativeiiPPKfS0_iPf
; %bb.0:
	s_clause 0x2
	s_load_b32 s7, s[0:1], 0x34
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b32 s6, s[0:1], 0x18
	s_add_u32 s4, s0, 40
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s14, s7, 0xffff
	s_mul_i32 s3, s3, s2
	v_mad_u64_u32 v[1:2], null, s15, s14, v[0:1]
	s_mul_i32 s8, s3, s6
	s_mov_b32 s7, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB32_5
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s9, s3, 31
	s_ashr_i32 s10, s2, 31
	s_add_i32 s11, s3, s9
	s_add_i32 s13, s2, s10
	s_xor_b32 s11, s11, s9
	s_xor_b32 s13, s13, s10
	v_cvt_f32_u32_e32 v0, s11
	v_cvt_f32_u32_e32 v3, s13
	s_ashr_i32 s7, s6, 31
	s_load_b32 s15, s[4:5], 0x0
	s_add_i32 s6, s6, s7
	v_rcp_iflag_f32_e32 v0, v0
	v_rcp_iflag_f32_e32 v3, v3
	s_xor_b32 s12, s6, s7
	s_sub_i32 s6, 0, s13
	v_cvt_f32_u32_e32 v2, s12
	s_sub_i32 s4, 0, s11
	s_sub_i32 s5, 0, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v0, 0x4f7ffffe, v0 :: v_dual_mul_f32 v3, 0x4f7ffffe, v3
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_cvt_u32_f32_e32 v3, v3
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s14, s15, s14
	s_mov_b32 s15, 0
	v_mul_lo_u32 v4, s4, v0
	v_mul_lo_u32 v6, s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v4, v0, v4
	v_mul_hi_u32 v7, v3, v6
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v0, v0, v4
	v_add_nc_u32_e32 v7, v3, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v2, v2
	v_mul_lo_u32 v5, s5, v2
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v2, v5
	v_add_nc_u32_e32 v6, v2, v5
.LBB32_2:                               ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB32_3 Depth 2
	v_ashrrev_i32_e32 v5, 31, v1
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v1, v5
	v_xor_b32_e32 v10, v2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v2, v10, v0
	v_mul_hi_u32 v11, v10, v7
	v_mul_lo_u32 v3, v2, s11
	v_add_nc_u32_e32 v4, 1, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v11, v11, s13
	v_sub_nc_u32_e32 v3, v10, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v10, v10, v11
	v_subrev_nc_u32_e32 v8, s11, v3
	v_cmp_le_u32_e32 vcc_lo, s11, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v13, s13, v10
	v_cndmask_b32_e32 v3, v3, v8, vcc_lo
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_xor_b32_e32 v8, s9, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s11, v3
	v_add_nc_u32_e32 v4, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_xor_b32_e32 v2, v2, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v2, v8
	v_ashrrev_i32_e32 v2, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v8, v2
	v_mul_lo_u32 v8, v8, s3
	v_xor_b32_e32 v3, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v8, v1, v8
	v_mul_hi_u32 v4, v3, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v9, 31, v8
	v_mul_lo_u32 v4, v4, s12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v12, v8, v9
	v_xor_b32_e32 v12, v12, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v4
	v_mul_hi_u32 v11, v12, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v4, s12, v3
	v_cmp_le_u32_e32 vcc_lo, s12, v3
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v14, v11, s13
	v_subrev_nc_u32_e32 v4, s12, v3
	v_cmp_le_u32_e32 vcc_lo, s12, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v12, v12, v14
	v_dual_cndmask_b32 v3, v3, v4 :: v_dual_add_nc_u32 v14, 1, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v2
	v_sub_nc_u32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[3:4], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s13, v10
	global_load_b64 v[3:4], v[3:4], off
	v_cndmask_b32_e32 v10, v10, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v13, s13, v10
	v_cmp_le_u32_e32 vcc_lo, s13, v10
	v_cndmask_b32_e32 v10, v10, v13, vcc_lo
	v_subrev_nc_u32_e32 v13, s13, v12
	v_cmp_le_u32_e32 vcc_lo, s13, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v10, v10, v5
	v_dual_cndmask_b32 v11, v11, v14 :: v_dual_cndmask_b32 v12, v12, v13
	v_xor_b32_e32 v14, s10, v9
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_nc_u32_e32 v5, v10, v5
	v_add_nc_u32_e32 v13, 1, v11
	v_cmp_le_u32_e32 vcc_lo, s13, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v12, v11, v13, vcc_lo
	v_mad_u64_u32 v[10:11], null, v2, s2, v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v2, v12, v14
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v12, v2, v14
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v13, 31, v12
	v_add_co_u32 v10, vcc_lo, s6, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v3, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, v4, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s0, v12
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v13, vcc_lo
	global_load_b32 v4, v[8:9], off
	global_load_b32 v8, v[10:11], off
	global_load_b32 v5, v[2:3], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v8, v4, v8
.LBB32_3:                               ; %atomicrmw.start
                                        ;   Parent Loop BB32_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v4, v5, v8
	global_atomic_cmpswap_b32 v4, v[2:3], v[4:5], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v4, v5
	v_mov_b32_e32 v5, v4
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB32_3
; %bb.4:                                ; %atomicrmw.end
                                        ;   in Loop: Header=BB32_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v1, s14, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s8, v1
	s_or_b32 s15, vcc_lo, s15
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB32_2
.LBB32_5:                               ; %Flow39
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22addAttentionDerivativeiiPPKfS0_iPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end32:
	.size	_Z22addAttentionDerivativeiiPPKfS0_iPf, .Lfunc_end32-_Z22addAttentionDerivativeiiPPKfS0_iPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 940
; NumSgprs: 19
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16addAttentionTileiiPKfS0_S0_S0_iPPf ; -- Begin function _Z16addAttentionTileiiPKfS0_S0_S0_iPPf
	.globl	_Z16addAttentionTileiiPKfS0_S0_S0_iPPf
	.p2align	8
	.type	_Z16addAttentionTileiiPKfS0_S0_S0_iPPf,@function
_Z16addAttentionTileiiPKfS0_S0_S0_iPPf: ; @_Z16addAttentionTileiiPKfS0_S0_S0_iPPf
; %bb.0:
	s_clause 0x2
	s_load_b32 s5, s[0:1], 0x44
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b32 s4, s[0:1], 0x28
	s_add_u32 s12, s0, 56
	s_addc_u32 s13, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s20, s5, 0xffff
	s_mul_i32 s3, s3, s2
	v_mad_u64_u32 v[1:2], null, s15, s20, v[0:1]
	s_mul_i32 s14, s3, s4
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s14, v1
	s_cbranch_execz .LBB33_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s15, s3, 31
	s_ashr_i32 s5, s4, 31
	s_add_i32 s6, s3, s15
	s_ashr_i32 s16, s2, 31
	s_xor_b32 s17, s6, s15
	s_add_i32 s4, s4, s5
	s_add_i32 s6, s2, s16
	s_xor_b32 s18, s4, s5
	s_xor_b32 s19, s6, s16
	v_cvt_f32_u32_e32 v0, s17
	v_cvt_f32_u32_e32 v2, s18
	v_cvt_f32_u32_e32 v3, s19
	s_load_b32 s12, s[12:13], 0x0
	s_sub_i32 s13, 0, s17
	v_rcp_iflag_f32_e32 v0, v0
	v_rcp_iflag_f32_e32 v2, v2
	v_rcp_iflag_f32_e32 v3, v3
	s_sub_i32 s21, 0, s18
	s_sub_i32 s22, 0, s19
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x30
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v2, 0x4f7ffffe, v2 :: v_dual_mul_f32 v3, 0x4f7ffffe, v3
	v_cvt_u32_f32_e32 v0, v0
	v_cvt_u32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_u32_f32_e32 v3, v3
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s12, s12, s20
	s_sub_i32 s20, 0, s3
	v_mul_lo_u32 v4, s13, v0
	v_mul_lo_u32 v5, s21, v2
	v_mul_lo_u32 v6, s22, v3
	s_mov_b32 s13, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v4, v0, v4
	v_mul_hi_u32 v5, v2, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v6, v3, v6
	v_add_nc_u32_e32 v0, v0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, v2, v5
	v_add_nc_u32_e32 v3, v3, v6
.LBB33_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v9, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v1, v9
	v_xor_b32_e32 v5, s15, v9
	v_xor_b32_e32 v7, v4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v7, v0
	v_mul_lo_u32 v6, v4, s17
	v_add_nc_u32_e32 v8, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v6, v7, v6
	v_subrev_nc_u32_e32 v10, s17, v6
	v_cmp_le_u32_e32 vcc_lo, s17, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v4, v4, v8, vcc_lo
	v_cndmask_b32_e32 v6, v6, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, 1, v4
	v_cmp_le_u32_e32 vcc_lo, s17, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v4, v8, vcc_lo
	v_mul_hi_u32 v8, v7, v3
	v_xor_b32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v8, v8, s19
	v_sub_nc_u32_e32 v10, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v4, 31, v10
	v_sub_nc_u32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v4
	v_subrev_nc_u32_e32 v8, s19, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v5, v4
	v_mul_hi_u32 v6, v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, v6, s18
	v_sub_nc_u32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v6, s18, v5
	v_cmp_le_u32_e32 vcc_lo, s18, v5
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v6, s18, v5
	v_cmp_le_u32_e32 vcc_lo, s18, v5
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v5, v4
	v_sub_nc_u32_e32 v4, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[5:6], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s19, v7
	global_load_b64 v[5:6], v[5:6], off
	v_cndmask_b32_e32 v7, v7, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v8, s19, v7
	v_cmp_le_u32_e32 vcc_lo, s19, v7
	v_cndmask_b32_e32 v7, v7, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v11, v7, v9
	v_mad_u64_u32 v[7:8], null, s20, v10, v[1:2]
	v_mul_lo_u32 v10, v10, s3
	v_sub_nc_u32_e32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_sub_nc_u32_e32 v12, v8, v10
	v_lshlrev_b64 v[10:11], 2, v[7:8]
	v_xor_b32_e32 v14, s16, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v7, v1, v12
	v_add_nc_u32_e32 v1, s12, v1
	v_add_co_u32 v12, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v7, v7, v8
	global_load_b32 v16, v[12:13], off
	v_mul_hi_u32 v8, v7, v3
	v_mul_lo_u32 v12, v8, s19
	v_add_nc_u32_e32 v13, 1, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v7, v7, v12
	v_subrev_nc_u32_e32 v12, s19, v7
	v_cmp_le_u32_e32 vcc_lo, s19, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v8, v8, v13 :: v_dual_cndmask_b32 v7, v7, v12
	v_add_nc_u32_e32 v12, 1, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s19, v7
	v_cndmask_b32_e32 v7, v8, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v12, v7, v14
	v_mad_u64_u32 v[7:8], null, v4, s2, v[9:10]
	v_sub_nc_u32_e32 v12, v12, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v14, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v15, vcc_lo, s9, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s10, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v13, vcc_lo
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v9, v[14:15], off
	global_load_b32 v12, v[12:13], off
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(4)
	v_add_co_u32 v4, vcc_lo, v5, v10
	v_add_co_ci_u32_e32 v5, vcc_lo, v6, v11, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s14, v1
	global_load_b32 v6, v[4:5], off
	s_or_b32 s13, vcc_lo, s13
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v8, v9, v12
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v7, v16
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v6, v6, v8
	global_store_b32 v[4:5], v6, off
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB33_2
.LBB33_3:                               ; %Flow49
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16addAttentionTileiiPKfS0_S0_S0_iPPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 23
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end33:
	.size	_Z16addAttentionTileiiPKfS0_S0_S0_iPPf, .Lfunc_end33-_Z16addAttentionTileiiPKfS0_S0_S0_iPPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 964
; NumSgprs: 25
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 25
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7dropoutifPKfS0_Pf    ; -- Begin function _Z7dropoutifPKfS0_Pf
	.globl	_Z7dropoutifPKfS0_Pf
	.p2align	8
	.type	_Z7dropoutifPKfS0_Pf,@function
_Z7dropoutifPKfS0_Pf:                   ; @_Z7dropoutifPKfS0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 32
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s6, 0xffff
	s_mov_b32 s6, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB34_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s11, s[4:5], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s11, s10
	s_ashr_i32 s11, s10, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[10:11], 2
.LBB34_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v6, v[6:7], off
	v_add_co_u32 v4, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v3, vcc_lo
	s_waitcnt vmcnt(1)
	v_cmp_lt_f32_e32 vcc_lo, s3, v0
	v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
	v_add_nc_u32_e32 v1, s10, v1
	v_add_co_u32 v2, vcc_lo, v2, s12
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v0, v6, v0
	v_cmp_le_i32_e64 s0, s2, v1
	global_store_b32 v[4:5], v0, off
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB34_2
.LBB34_3:                               ; %Flow22
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7dropoutifPKfS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end34:
	.size	_Z7dropoutifPKfS0_Pf, .Lfunc_end34-_Z7dropoutifPKfS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 276
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9maskZerosiPKfS0_Pf   ; -- Begin function _Z9maskZerosiPKfS0_Pf
	.globl	_Z9maskZerosiPKfS0_Pf
	.p2align	8
	.type	_Z9maskZerosiPKfS0_Pf,@function
_Z9maskZerosiPKfS0_Pf:                  ; @_Z9maskZerosiPKfS0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s12, s[0:1], 0x0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v1
	s_cbranch_execz .LBB35_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s9, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, s8
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[8:9], 2
.LBB35_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v6, v[6:7], off
	v_add_co_u32 v4, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
	s_waitcnt vmcnt(1)
	v_cmp_neq_f32_e32 vcc_lo, 0, v0
	v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
	v_add_nc_u32_e32 v1, s8, v1
	v_add_co_u32 v2, vcc_lo, v2, s10
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v0, v6, v0
	v_cmp_le_i32_e64 s0, s12, v1
	global_store_b32 v[4:5], v0, off
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB35_2
.LBB35_3:                               ; %Flow17
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9maskZerosiPKfS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end35:
	.size	_Z9maskZerosiPKfS0_Pf, .Lfunc_end35-_Z9maskZerosiPKfS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 276
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12addMaskZerosiPKfS0_Pf ; -- Begin function _Z12addMaskZerosiPKfS0_Pf
	.globl	_Z12addMaskZerosiPKfS0_Pf
	.p2align	8
	.type	_Z12addMaskZerosiPKfS0_Pf,@function
_Z12addMaskZerosiPKfS0_Pf:              ; @_Z12addMaskZerosiPKfS0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s12, s[0:1], 0x0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v1
	s_cbranch_execz .LBB36_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s9, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, s8
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[8:9], 2
.LBB36_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v0, v[6:7], off
	global_load_b32 v4, v[4:5], off
	global_load_b32 v5, v[8:9], off
	v_add_nc_u32_e32 v1, s8, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s12, v1
	s_or_b32 s1, s0, s1
	s_waitcnt vmcnt(2)
	v_cmp_neq_f32_e32 vcc_lo, 0, v0
	v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s10
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v5, v4, v0
	global_store_b32 v[8:9], v5, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB36_2
.LBB36_3:                               ; %Flow17
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12addMaskZerosiPKfS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end36:
	.size	_Z12addMaskZerosiPKfS0_Pf, .Lfunc_end36-_Z12addMaskZerosiPKfS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 288
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z20assignMaskedAdditioniPKfS0_S0_Pf ; -- Begin function _Z20assignMaskedAdditioniPKfS0_S0_Pf
	.globl	_Z20assignMaskedAdditioniPKfS0_S0_Pf
	.p2align	8
	.type	_Z20assignMaskedAdditioniPKfS0_S0_Pf,@function
_Z20assignMaskedAdditioniPKfS0_S0_Pf:   ; @_Z20assignMaskedAdditioniPKfS0_S0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x34
	s_load_b32 s14, s[0:1], 0x0
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s14, v1
	s_cbranch_execz .LBB37_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s2, s[2:3], 0x0
	s_load_b256 s[4:11], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s12
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[2:3], 2
.LBB37_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v6, v[6:7], off
	global_load_b32 v7, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s12
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	v_add_nc_u32_e32 v1, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s14, v1
	s_or_b32 s1, s0, s1
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v8, 1.0, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v8, v6
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v0, v7
	global_store_b32 v[4:5], v6, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB37_2
.LBB37_3:                               ; %Flow23
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20assignMaskedAdditioniPKfS0_S0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end37:
	.size	_Z20assignMaskedAdditioniPKfS0_S0_Pf, .Lfunc_end37-_Z20assignMaskedAdditioniPKfS0_S0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 288
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf ; -- Begin function _Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
	.globl	_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
	.p2align	8
	.type	_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf,@function
_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf: ; @_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x34
	s_load_b64 s[4:5], s[0:1], 0x0
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s6, 0xffff
	s_mul_i32 s14, s5, s4
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s14, v1
	s_cbranch_execz .LBB38_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s5, s4, 31
	s_load_b32 s2, s[2:3], 0x0
	s_add_i32 s4, s4, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_xor_b32 s15, s4, s5
	s_load_b256 s[4:11], s[0:1], 0x8
	v_cvt_f32_u32_e32 v0, s15
	s_sub_i32 s3, 0, s15
	s_mov_b32 s1, 0
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s12
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s3, v0
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[12:13], s[2:3], 2
	v_mul_hi_u32 v4, v0, v2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_nc_u32_e32 v0, v0, v4
.LBB38_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v4, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v1, v4
	v_xor_b32_e32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v6, v5, v0
	v_mul_lo_u32 v6, v6, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v5, v6
	v_subrev_nc_u32_e32 v6, s15, v5
	v_cmp_le_u32_e32 vcc_lo, s15, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	v_subrev_nc_u32_e32 v6, s15, v5
	v_cmp_le_u32_e32 vcc_lo, s15, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	v_xor_b32_e32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v5, v4
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v8, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v6, v[6:7], off
	global_load_b32 v7, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s12
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v9, 1.0, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v6, v9, v6 :: v_dual_add_nc_u32 v1, s2, v1
	v_cmp_le_i32_e64 s0, s14, v1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, v8, v7
	s_or_b32 s1, s0, s1
	global_store_b32 v[4:5], v6, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB38_2
.LBB38_3:                               ; %Flow29
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end38:
	.size	_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf, .Lfunc_end38-_Z37assignMaskedAdditionColumnBroadcastediiPKfS0_S0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z20addHprodOneMinusMaskiPKfS0_Pf ; -- Begin function _Z20addHprodOneMinusMaskiPKfS0_Pf
	.globl	_Z20addHprodOneMinusMaskiPKfS0_Pf
	.p2align	8
	.type	_Z20addHprodOneMinusMaskiPKfS0_Pf,@function
_Z20addHprodOneMinusMaskiPKfS0_Pf:      ; @_Z20addHprodOneMinusMaskiPKfS0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s12, s[0:1], 0x0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v1
	s_cbranch_execz .LBB39_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s9, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, s8
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[8:9], 2
.LBB39_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v4, v[6:7], off
	global_load_b32 v5, v[8:9], off
	v_add_nc_u32_e32 v1, s8, v1
	v_add_co_u32 v2, vcc_lo, v2, s10
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v0, 1.0, v0
	v_cmp_le_i32_e64 s0, s12, v1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v5, v0, v4
	s_or_b32 s1, s0, s1
	global_store_b32 v[8:9], v5, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB39_2
.LBB39_3:                               ; %Flow17
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20addHprodOneMinusMaskiPKfS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end39:
	.size	_Z20addHprodOneMinusMaskiPKfS0_Pf, .Lfunc_end39-_Z20addHprodOneMinusMaskiPKfS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 276
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf ; -- Begin function _Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
	.globl	_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
	.p2align	8
	.type	_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf,@function
_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf: ; @_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x2c
	s_load_b64 s[4:5], s[0:1], 0x0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s6, 0xffff
	s_mul_i32 s12, s5, s4
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v1
	s_cbranch_execz .LBB40_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s5, s4, 31
	s_load_b32 s9, s[2:3], 0x0
	s_add_i32 s4, s4, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s13, s4, s5
	v_cvt_f32_u32_e32 v0, s13
	s_sub_i32 s2, 0, s13
	s_delay_alu instid0(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, s8
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[10:11], s[8:9], 2
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, s2, v0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x18
	s_mov_b32 s1, 0
	v_mul_hi_u32 v4, v0, v2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_nc_u32_e32 v0, v0, v4
.LBB40_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v4, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v1, v4
	v_add_nc_u32_e32 v1, s8, v1
	v_xor_b32_e32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e64 s0, s12, v1
	v_mul_hi_u32 v6, v5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s1, s0, s1
	v_mul_lo_u32 v6, v6, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v5, v6
	v_subrev_nc_u32_e32 v6, s13, v5
	v_cmp_le_u32_e32 vcc_lo, s13, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	v_subrev_nc_u32_e32 v6, s13, v5
	v_cmp_le_u32_e32 vcc_lo, s13, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_xor_b32_e32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v5, v4
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	v_add_co_u32 v8, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v4, v[4:5], off
	global_load_b32 v5, v[6:7], off
	global_load_b32 v6, v[8:9], off
	v_add_co_u32 v2, vcc_lo, v2, s10
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v4, 1.0, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v4, v5
	global_store_b32 v[8:9], v6, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB40_2
.LBB40_3:                               ; %Flow23
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end40:
	.size	_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf, .Lfunc_end40-_Z37addHprodOneMinusMaskColumnBroadcastediiPKfS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z23matrixVectorColumnHprodiiPKfS0_Pf ; -- Begin function _Z23matrixVectorColumnHprodiiPKfS0_Pf
	.globl	_Z23matrixVectorColumnHprodiiPKfS0_Pf
	.p2align	8
	.type	_Z23matrixVectorColumnHprodiiPKfS0_Pf,@function
_Z23matrixVectorColumnHprodiiPKfS0_Pf:  ; @_Z23matrixVectorColumnHprodiiPKfS0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x2c
	s_load_b64 s[4:5], s[0:1], 0x0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s6, 0xffff
	s_mul_i32 s12, s5, s4
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v1
	s_cbranch_execz .LBB41_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s5, s4, 31
	s_load_b32 s9, s[2:3], 0x0
	s_add_i32 s4, s4, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s13, s4, s5
	v_cvt_f32_u32_e32 v0, s13
	s_sub_i32 s2, 0, s13
	s_delay_alu instid0(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, s8
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[10:11], s[8:9], 2
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, s2, v0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x18
	s_mov_b32 s1, 0
	v_mul_hi_u32 v4, v0, v2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_nc_u32_e32 v0, v0, v4
.LBB41_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v4, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v1, v4
	v_add_nc_u32_e32 v1, s8, v1
	v_xor_b32_e32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e64 s0, s12, v1
	v_mul_hi_u32 v6, v5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s1, s0, s1
	v_mul_lo_u32 v6, v6, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v5, v6
	v_subrev_nc_u32_e32 v6, s13, v5
	v_cmp_le_u32_e32 vcc_lo, s13, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	v_subrev_nc_u32_e32 v6, s13, v5
	v_cmp_le_u32_e32 vcc_lo, s13, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
	v_xor_b32_e32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v5, v4
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	global_load_b32 v6, v[6:7], off
	global_load_b32 v7, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s10
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[4:5], v6, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB41_2
.LBB41_3:                               ; %Flow23
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23matrixVectorColumnHprodiiPKfS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end41:
	.size	_Z23matrixVectorColumnHprodiiPKfS0_Pf, .Lfunc_end41-_Z23matrixVectorColumnHprodiiPKfS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 444
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z24maskColumnNumbersRowWiseiiPKiPf ; -- Begin function _Z24maskColumnNumbersRowWiseiiPKiPf
	.globl	_Z24maskColumnNumbersRowWiseiiPKiPf
	.p2align	8
	.type	_Z24maskColumnNumbersRowWiseiiPKiPf,@function
_Z24maskColumnNumbersRowWiseiiPKiPf:    ; @_Z24maskColumnNumbersRowWiseiiPKiPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s6, 0xffff
	s_mul_i32 s3, s3, s2
	v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB42_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s8, s2, 31
	s_load_b32 s11, s[4:5], 0x0
	s_add_i32 s6, s2, s8
	s_sub_i32 s2, 0, s2
	s_xor_b32 s9, s6, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, s9
	s_sub_i32 s4, 0, s9
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s4, v0
	s_load_b128 s[4:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s11, s10
	s_mov_b32 s10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v0, v2
	v_add_nc_u32_e32 v0, v0, v2
.LBB42_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v1, v2
	v_xor_b32_e32 v3, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v0
	v_mul_lo_u32 v5, v4, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v5
	v_add_nc_u32_e32 v5, 1, v4
	v_subrev_nc_u32_e32 v6, s9, v3
	v_cmp_le_u32_e32 vcc_lo, s9, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v4, v4, v5 :: v_dual_cndmask_b32 v3, v3, v6
	v_xor_b32_e32 v6, s8, v2
	v_add_nc_u32_e32 v5, 1, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s9, v3
	v_cndmask_b32_e32 v3, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v6
	v_sub_nc_u32_e32 v5, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s2, v5, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v4, v[3:4], off
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	v_cmp_le_i32_e32 vcc_lo, s3, v1
	s_or_b32 s10, vcc_lo, s10
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e64 s0, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, 0, 1.0, s0
	v_add_co_u32 v2, s0, s6, v2
	v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
	global_store_b32 v[2:3], v4, off
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB42_2
.LBB42_3:                               ; %Flow22
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24maskColumnNumbersRowWiseiiPKiPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end42:
	.size	_Z24maskColumnNumbersRowWiseiiPKiPf, .Lfunc_end42-_Z24maskColumnNumbersRowWiseiiPKiPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 416
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z20batchHorizontalStackiiiiPPKfS1_PPf ; -- Begin function _Z20batchHorizontalStackiiiiPPKfS1_PPf
	.globl	_Z20batchHorizontalStackiiiiPPKfS1_PPf
	.p2align	8
	.type	_Z20batchHorizontalStackiiiiPPKfS1_PPf,@function
_Z20batchHorizontalStackiiiiPPKfS1_PPf: ; @_Z20batchHorizontalStackiiiiPPKfS1_PPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x0
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s14, s8, 0xffff
	s_add_i32 s7, s7, s6
	v_mad_u64_u32 v[1:2], null, s15, s14, v[0:1]
	s_mul_i32 s15, s7, s5
	s_mov_b32 s8, exec_lo
	s_mul_i32 s4, s15, s4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB43_7
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s12, s15, 31
	s_load_b32 s2, s[2:3], 0x0
	s_add_i32 s8, s15, s12
	s_sub_i32 s15, 0, s15
	s_xor_b32 s13, s8, s12
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x10
	s_load_b64 s[0:1], s[0:1], 0x20
	v_cvt_f32_u32_e32 v0, s13
	s_sub_i32 s3, 0, s13
	s_delay_alu instid0(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s14
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_mov_b32 s14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s3, v0
	s_mul_i32 s3, s6, s5
	s_sub_i32 s6, 0, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v0, v2
	v_add_nc_u32_e32 v0, v0, v2
.LBB43_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v1, v2
	v_xor_b32_e32 v3, v3, v2
	v_xor_b32_e32 v2, s12, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v0
	v_mul_lo_u32 v5, v4, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v5
	v_add_nc_u32_e32 v5, 1, v4
	v_subrev_nc_u32_e32 v6, s13, v3
	v_cmp_le_u32_e32 vcc_lo, s13, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, v4, v5 :: v_dual_cndmask_b32 v3, v3, v6
	v_add_nc_u32_e32 v5, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s13, v3
	v_cndmask_b32_e32 v3, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v2
	v_sub_nc_u32_e32 v6, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, v6, v[1:2]
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[4:5], 3, v[6:7]
	s_delay_alu instid0(VALU_DEP_3)
	v_ashrrev_i32_e32 v3, 31, v2
	v_cmpx_le_i32_e64 s3, v2
	s_xor_b32 s16, exec_lo, s16
	s_cbranch_execz .LBB43_4
; %bb.3:                                ;   in Loop: Header=BB43_2 Depth=1
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v5, vcc_lo
	v_mul_lo_u32 v6, s7, v6
	v_add_co_u32 v4, vcc_lo, s0, v4
	global_load_b64 v[7:8], v[7:8], off
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_sub_nc_u32_e32 v6, s6, v6
	global_load_b64 v[4:5], v[4:5], off
	v_mad_u64_u32 v[9:10], null, s5, v6, v[1:2]
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v7, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v8, v10, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, v2
	global_load_b32 v6, v[6:7], off
	v_add_co_ci_u32_e32 v3, vcc_lo, v5, v3, vcc_lo
                                        ; implicit-def: $vgpr4_vgpr5
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v6, off
                                        ; implicit-def: $vgpr2_vgpr3
.LBB43_4:                               ; %Flow
                                        ;   in Loop: Header=BB43_2 Depth=1
	s_and_not1_saveexec_b32 s16, s16
	s_cbranch_execz .LBB43_6
; %bb.5:                                ;   in Loop: Header=BB43_2 Depth=1
	v_add_co_u32 v6, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	global_load_b64 v[6:7], v[6:7], off
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v6, vcc_lo, v6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, v2
	global_load_b32 v6, v[6:7], off
	v_add_co_ci_u32_e32 v3, vcc_lo, v5, v3, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v6, off
.LBB43_6:                               ;   in Loop: Header=BB43_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v1, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s4, v1
	s_or_b32 s14, vcc_lo, s14
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB43_2
.LBB43_7:                               ; %Flow65
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20batchHorizontalStackiiiiPPKfS1_PPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end43:
	.size	_Z20batchHorizontalStackiiiiPPKfS1_PPf, .Lfunc_end43-_Z20batchHorizontalStackiiiiPPKfS1_PPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 648
; NumSgprs: 19
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z20batchHorizontalSplitiiiiPPKfPPfS3_ ; -- Begin function _Z20batchHorizontalSplitiiiiPPKfPPfS3_
	.globl	_Z20batchHorizontalSplitiiiiPPKfPPfS3_
	.p2align	8
	.type	_Z20batchHorizontalSplitiiiiPPKfPPfS3_,@function
_Z20batchHorizontalSplitiiiiPPKfPPfS3_: ; @_Z20batchHorizontalSplitiiiiPPKfPPfS3_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x0
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s14, s8, 0xffff
	s_add_i32 s7, s7, s6
	v_mad_u64_u32 v[1:2], null, s15, s14, v[0:1]
	s_mul_i32 s15, s7, s5
	s_mov_b32 s8, exec_lo
	s_mul_i32 s4, s15, s4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB44_7
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s12, s15, 31
	s_load_b32 s2, s[2:3], 0x0
	s_add_i32 s8, s15, s12
	s_sub_i32 s15, 0, s15
	s_xor_b32 s13, s8, s12
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x10
	s_load_b64 s[0:1], s[0:1], 0x20
	v_cvt_f32_u32_e32 v0, s13
	s_sub_i32 s3, 0, s13
	s_delay_alu instid0(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s14
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_mov_b32 s14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s3, v0
	s_mul_i32 s3, s6, s5
	s_sub_i32 s6, 0, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v0, v2
	v_add_nc_u32_e32 v0, v0, v2
.LBB44_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v1, v2
	v_xor_b32_e32 v3, v3, v2
	v_xor_b32_e32 v2, s12, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v0
	v_mul_lo_u32 v5, v4, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v5
	v_add_nc_u32_e32 v5, 1, v4
	v_subrev_nc_u32_e32 v6, s13, v3
	v_cmp_le_u32_e32 vcc_lo, s13, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, v4, v5 :: v_dual_cndmask_b32 v3, v3, v6
	v_add_nc_u32_e32 v5, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s13, v3
	v_cndmask_b32_e32 v3, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v2
	v_sub_nc_u32_e32 v6, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[2:3], 3, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v3, vcc_lo
	v_mad_u64_u32 v[10:11], null, s15, v6, v[1:2]
	global_load_b64 v[4:5], v[4:5], off
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[10:11]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v8, vcc_lo
	global_load_b32 v9, v[4:5], off
                                        ; implicit-def: $vgpr4_vgpr5
	v_cmpx_le_i32_e64 s3, v10
	s_xor_b32 s16, exec_lo, s16
	s_cbranch_execz .LBB44_4
; %bb.3:                                ;   in Loop: Header=BB44_2 Depth=1
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_mul_lo_u32 v4, s7, v6
                                        ; implicit-def: $vgpr7_vgpr8
	global_load_b64 v[2:3], v[2:3], off
	v_sub_nc_u32_e32 v6, s6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s5, v6, v[1:2]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, v2, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v3, v5, vcc_lo
                                        ; implicit-def: $vgpr2_vgpr3
.LBB44_4:                               ; %Flow
                                        ;   in Loop: Header=BB44_2 Depth=1
	s_and_not1_saveexec_b32 s16, s16
	s_cbranch_execz .LBB44_6
; %bb.5:                                ;   in Loop: Header=BB44_2 Depth=1
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v3, v8, vcc_lo
.LBB44_6:                               ;   in Loop: Header=BB44_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v1, s2, v1
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v9, off
	v_cmp_le_i32_e32 vcc_lo, s4, v1
	s_or_b32 s14, vcc_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB44_2
.LBB44_7:                               ; %Flow65
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20batchHorizontalSplitiiiiPPKfPPfS3_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end44:
	.size	_Z20batchHorizontalSplitiiiiPPKfPPfS3_, .Lfunc_end44-_Z20batchHorizontalSplitiiiiPPKfPPfS3_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 592
; NumSgprs: 19
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14repeatAlongRowiiiPKfPf ; -- Begin function _Z14repeatAlongRowiiiPKfPf
	.globl	_Z14repeatAlongRowiiiPKfPf
	.p2align	8
	.type	_Z14repeatAlongRowiiiPKfPf,@function
_Z14repeatAlongRowiiiPKfPf:             ; @_Z14repeatAlongRowiiiPKfPf
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB45_6
; %bb.1:                                ; %.lr.ph30
	s_ashr_i32 s2, s5, 31
	s_clause 0x1
	s_load_b32 s7, s[0:1], 0x2c
	s_load_b32 s12, s[0:1], 0x20
	s_add_i32 s3, s5, s2
	s_mul_i32 s6, s6, s5
	s_xor_b32 s3, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s3
	s_sub_i32 s8, 0, s3
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v3, v1
	v_mul_lo_u32 v4, s8, v3
	s_load_b128 s[8:11], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s7, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_mul_i32 s7, s12, s0
	s_mov_b32 s12, 0
	v_mul_hi_u32 v0, v3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s6, v1
	v_add_nc_u32_e32 v0, v3, v0
.LBB45_2:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB45_4 Depth 2
	s_and_saveexec_b32 s13, vcc_lo
	s_cbranch_execz .LBB45_5
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB45_2 Depth=1
	v_mov_b32_e32 v2, v1
	s_mov_b32 s14, 0
.LBB45_4:                               ; %.lr.ph
                                        ;   Parent Loop BB45_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, s0, s8, v4
	v_add_co_ci_u32_e64 v5, s0, s9, v5, s0
	global_load_b32 v5, v[4:5], off
	v_add_nc_u32_e32 v4, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v4, v3
	v_xor_b32_e32 v3, s2, v3
	v_mul_hi_u32 v6, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, v6, s3
	v_sub_nc_u32_e32 v4, v4, v7
	v_add_nc_u32_e32 v7, 1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v8, s3, v4
	v_cmp_le_u32_e64 s0, s3, v4
	v_cndmask_b32_e64 v6, v6, v7, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, v4, v8, s0
	v_add_nc_u32_e32 v7, 1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s0, s3, v4
	v_cndmask_b32_e64 v4, v6, v7, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v3
	v_sub_nc_u32_e32 v6, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, v6, s4
	v_add3_u32 v3, s12, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v6, v3, v4
	v_mad_u64_u32 v[3:4], null, s5, v6, v[2:3]
	v_add_nc_u32_e32 v2, s7, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_i32_e64 s0, s6, v2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s14, s0, s14
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s1, s10, v3
	v_add_co_ci_u32_e64 v4, s1, s11, v4, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v[3:4], v5, off
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB45_4
.LBB45_5:                               ; %Flow41
                                        ;   in Loop: Header=BB45_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_add_i32 s12, s12, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s12, s4
	s_cbranch_scc0 .LBB45_2
.LBB45_6:                               ; %._crit_edge31
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14repeatAlongRowiiiPKfPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end45:
	.size	_Z14repeatAlongRowiiiPKfPf, .Lfunc_end45-_Z14repeatAlongRowiiiPKfPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 480
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z27addRepeatAlongRowDerivativeiPKfiiPf ; -- Begin function _Z27addRepeatAlongRowDerivativeiPKfiiPf
	.globl	_Z27addRepeatAlongRowDerivativeiPKfiiPf
	.p2align	8
	.type	_Z27addRepeatAlongRowDerivativeiPKfiiPf,@function
_Z27addRepeatAlongRowDerivativeiPKfiiPf: ; @_Z27addRepeatAlongRowDerivativeiPKfiiPf
; %bb.0:
	s_load_b32 s8, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s8, 1
	s_cbranch_scc1 .LBB46_6
; %bb.1:                                ; %.lr.ph30
	s_clause 0x3
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x18
	s_load_b32 s11, s[0:1], 0x2c
	s_load_b32 s0, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s9, s6, 31
	s_and_b32 s11, s11, 0xffff
	s_add_i32 s10, s6, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s10, s10, s9
	v_cvt_f32_u32_e32 v1, s10
	s_sub_i32 s1, 0, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v3, v1
	v_mad_u64_u32 v[1:2], null, s15, s11, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, s1, v3
	s_mul_i32 s1, s7, s6
	s_mul_i32 s7, s0, s11
	s_mov_b32 s11, 0
	v_cmp_gt_i32_e32 vcc_lo, s1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v0, v3, v4
	v_add_nc_u32_e32 v0, v3, v0
.LBB46_2:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB46_4 Depth 2
	s_and_saveexec_b32 s12, vcc_lo
	s_cbranch_execz .LBB46_5
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB46_2 Depth=1
	v_mov_b32_e32 v2, v1
	s_mov_b32 s13, 0
.LBB46_4:                               ; %.lr.ph
                                        ;   Parent Loop BB46_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_nc_u32_e32 v4, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v3
	v_mul_hi_u32 v5, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, v5, s10
	v_sub_nc_u32_e32 v4, v4, v6
	v_add_nc_u32_e32 v6, 1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v7, s10, v4
	v_cmp_le_u32_e64 s0, s10, v4
	v_cndmask_b32_e64 v5, v5, v6, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v4, v4, v7, s0
	v_xor_b32_e32 v7, s9, v3
	v_add_nc_u32_e32 v6, 1, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s0, s10, v4
	v_cndmask_b32_e64 v4, v5, v6, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v7
	v_sub_nc_u32_e32 v5, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, v5, s8
	v_add3_u32 v5, s11, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v6, v5, v4
	v_mad_u64_u32 v[4:5], null, s6, v6, v[2:3]
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_add_nc_u32_e32 v2, s7, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s0, s4, v4
	v_add_co_ci_u32_e64 v4, s0, s5, v5, s0
	v_add_co_u32 v5, s0, s2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, s3, v7, s0
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[5:6], off
	v_cmp_le_i32_e64 s0, s1, v2
	s_or_b32 s13, s0, s13
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v3, v3, v4
	global_store_b32 v[5:6], v3, off
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB46_4
.LBB46_5:                               ; %Flow40
                                        ;   in Loop: Header=BB46_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_add_i32 s11, s11, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s11, s8
	s_cbranch_scc0 .LBB46_2
.LBB46_6:                               ; %._crit_edge31
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27addRepeatAlongRowDerivativeiPKfiiPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end46:
	.size	_Z27addRepeatAlongRowDerivativeiPKfiiPf, .Lfunc_end46-_Z27addRepeatAlongRowDerivativeiPKfiiPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 496
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14repeatAlongColiiiPKfPf ; -- Begin function _Z14repeatAlongColiiiPKfPf
	.globl	_Z14repeatAlongColiiiPKfPf
	.p2align	8
	.type	_Z14repeatAlongColiiiPKfPf,@function
_Z14repeatAlongColiiiPKfPf:             ; @_Z14repeatAlongColiiiPKfPf
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB47_6
; %bb.1:                                ; %.lr.ph22
	s_clause 0x2
	s_load_b32 s7, s[0:1], 0x2c
	s_load_b32 s8, s[0:1], 0x20
	s_load_b128 s[0:3], s[0:1], 0x10
	s_mul_i32 s5, s6, s5
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s7, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s7, v[0:1]
	s_mul_i32 s8, s8, s7
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_lshl_b64 s[6:7], s[8:9], 2
	s_mov_b32 s9, 0
	v_ashrrev_i32_e32 v2, 31, v1
	v_cmp_gt_i32_e32 vcc_lo, s5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v0, s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s1, v3, s0
	v_mov_b32_e32 v2, v1
.LBB47_2:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB47_4 Depth 2
	s_and_saveexec_b32 s12, vcc_lo
	s_cbranch_execz .LBB47_5
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB47_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_mov_b64 s[10:11], 0
	s_mov_b32 s13, 0
	v_lshlrev_b64 v[5:6], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s0, s2, v5
	v_add_co_ci_u32_e64 v5, s0, s3, v6, s0
	v_mov_b32_e32 v6, v1
.LBB47_4:                               ; %.lr.ph
                                        ;   Parent Loop BB47_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v7, s0, v0, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s0, s11, v4, s0
	v_add_nc_u32_e32 v6, s8, v6
	global_load_b32 v9, v[7:8], off
	v_add_co_u32 v7, s0, v3, s10
	v_cmp_le_i32_e64 s1, s5, v6
	v_add_co_ci_u32_e64 v8, s0, s11, v5, s0
	s_add_u32 s10, s10, s6
	s_addc_u32 s11, s11, s7
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s13, s1, s13
	s_waitcnt vmcnt(0)
	global_store_b32 v[7:8], v9, off
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB47_4
.LBB47_5:                               ; %Flow37
                                        ;   in Loop: Header=BB47_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v2, s5, v2
	s_add_i32 s9, s9, 1
	s_cmp_eq_u32 s9, s4
	s_cbranch_scc0 .LBB47_2
.LBB47_6:                               ; %._crit_edge23
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14repeatAlongColiiiPKfPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end47:
	.size	_Z14repeatAlongColiiiPKfPf, .Lfunc_end47-_Z14repeatAlongColiiiPKfPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 324
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z27addRepeatAlongColDerivativeiPKfiiPf ; -- Begin function _Z27addRepeatAlongColDerivativeiPKfiiPf
	.globl	_Z27addRepeatAlongColDerivativeiPKfiiPf
	.p2align	8
	.type	_Z27addRepeatAlongColDerivativeiPKfiiPf,@function
_Z27addRepeatAlongColDerivativeiPKfiiPf: ; @_Z27addRepeatAlongColDerivativeiPKfiiPf
; %bb.0:
	s_load_b32 s10, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s10, 1
	s_cbranch_scc1 .LBB48_6
; %bb.1:                                ; %.lr.ph22
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_mul_i32 s2, s3, s0
	s_mul_i32 s1, s7, s6
	s_ashr_i32 s3, s2, 31
	s_lshl_b64 s[6:7], s[2:3], 2
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_cmp_gt_i32_e32 vcc_lo, s1, v1
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, s0, s8, v2
	v_add_co_ci_u32_e64 v4, s0, s9, v3, s0
	v_mov_b32_e32 v2, v1
.LBB48_2:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB48_4 Depth 2
	s_and_saveexec_b32 s11, vcc_lo
	s_cbranch_execz .LBB48_5
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB48_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_mov_b64 s[8:9], 0
	s_mov_b32 s12, 0
	v_lshlrev_b64 v[5:6], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s0, s4, v5
	v_add_co_ci_u32_e64 v5, s0, s5, v6, s0
	v_mov_b32_e32 v6, v1
.LBB48_4:                               ; %.lr.ph
                                        ;   Parent Loop BB48_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s0, v3, s8
	v_add_co_ci_u32_e64 v8, s0, s9, v5, s0
	v_add_co_u32 v9, s0, v0, s8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s0, s9, v4, s0
	s_add_u32 s8, s8, s6
	global_load_b32 v7, v[7:8], off
	global_load_b32 v8, v[9:10], off
	v_add_nc_u32_e32 v6, s2, v6
	s_addc_u32 s9, s9, s7
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e64 s0, s1, v6
	global_store_b32 v[9:10], v7, off
	s_or_b32 s12, s0, s12
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB48_4
.LBB48_5:                               ; %Flow36
                                        ;   in Loop: Header=BB48_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v2, s1, v2
	s_add_i32 s3, s3, 1
	s_cmp_eq_u32 s3, s10
	s_cbranch_scc0 .LBB48_2
.LBB48_6:                               ; %._crit_edge23
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27addRepeatAlongColDerivativeiPKfiiPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end48:
	.size	_Z27addRepeatAlongColDerivativeiPKfiiPf, .Lfunc_end48-_Z27addRepeatAlongColDerivativeiPKfiiPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 344
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16addScaledDivSqrtifPKfS0_fPf ; -- Begin function _Z16addScaledDivSqrtifPKfS0_fPf
	.globl	_Z16addScaledDivSqrtifPKfS0_fPf
	.p2align	8
	.type	_Z16addScaledDivSqrtifPKfS0_fPf,@function
_Z16addScaledDivSqrtifPKfS0_fPf:        ; @_Z16addScaledDivSqrtifPKfS0_fPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x34
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 40
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s6, 0xffff
	s_mov_b32 s6, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB49_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s11, s[4:5], 0x0
	s_clause 0x2
	s_load_b64 s[8:9], s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b32 s1, s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s11, s10
	s_ashr_i32 s11, s10, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[10:11], 2
	s_mov_b32 s11, 0
.LBB49_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v4, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	v_add_nc_u32_e32 v1, s10, v1
	global_load_b32 v0, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v6, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v7, v[4:5], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v0, s1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v8, 0x4f800000, v0
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v0
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v6, s3, v6
	v_cndmask_b32_e32 v0, v0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v8, v0
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v9, -1, v8
	v_add_nc_u32_e32 v10, 1, v8
	v_fma_f32 v11, -v9, v8, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, -v10, v8, v0
	v_cmp_ge_f32_e64 s0, 0, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_cmp_lt_f32_e64 s0, 0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, v8, v10, s0
	v_cmp_le_i32_e64 s0, s2, v1
	v_mul_f32_e32 v9, 0x37800000, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s11, s0, s11
	v_cndmask_b32_e32 v8, v8, v9, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v0, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v8, v0, vcc_lo
	v_div_scale_f32 v8, null, v0, v0, v6
	v_div_scale_f32 v11, vcc_lo, v6, v0, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v9, v8
	s_waitcnt_depctr 0xfff
	v_fma_f32 v10, -v8, v9, 1.0
	v_fmac_f32_e32 v9, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v11, v9
	v_fma_f32 v12, -v8, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v12, v9
	v_fma_f32 v8, -v8, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v8, v8, v9, v10
	v_add_co_u32 v2, vcc_lo, v2, s12
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	v_div_fixup_f32 v0, v8, v0, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v7, v0
	global_store_b32 v[4:5], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB49_2
.LBB49_3:                               ; %Flow25
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16addScaledDivSqrtifPKfS0_fPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end49:
	.size	_Z16addScaledDivSqrtifPKfS0_fPf, .Lfunc_end49-_Z16addScaledDivSqrtifPKfS0_fPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 520
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z4clipiffPKfPf         ; -- Begin function _Z4clipiffPKfPf
	.globl	_Z4clipiffPKfPf
	.p2align	8
	.type	_Z4clipiffPKfPf,@function
_Z4clipiffPKfPf:                        ; @_Z4clipiffPKfPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s8, 0xffff
	s_mov_b32 s8, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB50_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s2, s[2:3], 0x0
	s_load_b128 s[8:11], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s7
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[2:3], 2
	s_mov_b32 s3, 0
.LBB50_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v4, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v3, vcc_lo
	v_add_nc_u32_e32 v1, s2, v1
	global_load_b32 v0, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, s6, v0
	v_cmp_gt_f32_e64 s1, s5, v0
	v_cmp_ge_f32_e64 s0, s6, v0
	v_cndmask_b32_e64 v6, 0, 1.0, vcc_lo
	v_cmp_le_f32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v7, 0, 1.0, s1
	v_mul_f32_e32 v6, s6, v6
	s_and_b32 s0, vcc_lo, s0
	v_add_co_u32 v2, vcc_lo, v2, s12
	v_cndmask_b32_e64 v8, 0, 1.0, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v6, s5, v7
	v_cmp_le_i32_e64 s0, s4, v1
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	v_fmac_f32_e32 v6, v0, v8
	s_delay_alu instid0(VALU_DEP_3)
	s_or_b32 s3, s0, s3
	global_store_b32 v[4:5], v6, off
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB50_2
.LBB50_3:                               ; %Flow35
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4clipiffPKfPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end50:
	.size	_Z4clipiffPKfPf, .Lfunc_end50-_Z4clipiffPKfPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 292
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z9transposeIfEviiPKT_PS0_,"axG",@progbits,_Z9transposeIfEviiPKT_PS0_,comdat
	.protected	_Z9transposeIfEviiPKT_PS0_ ; -- Begin function _Z9transposeIfEviiPKT_PS0_
	.globl	_Z9transposeIfEviiPKT_PS0_
	.p2align	8
	.type	_Z9transposeIfEviiPKT_PS0_,@function
_Z9transposeIfEviiPKT_PS0_:             ; @_Z9transposeIfEviiPKT_PS0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s11, s6, 0xffff
	s_mul_i32 s8, s3, s2
	v_mad_u64_u32 v[1:2], null, s15, s11, v[0:1]
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB51_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s9, s2, 31
	s_load_b32 s12, s[4:5], 0x0
	s_add_i32 s6, s2, s9
	s_sub_i32 s2, 0, s2
	s_xor_b32 s10, s6, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, s10
	s_sub_i32 s4, 0, s10
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s4, v0
	s_load_b128 s[4:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s12, s11
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v0, v2
	v_add_nc_u32_e32 v0, v0, v2
.LBB51_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v7, v[3:4], off
	v_add_nc_u32_e32 v3, v1, v2
	v_xor_b32_e32 v3, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v0
	v_mul_lo_u32 v5, v4, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v5
	v_add_nc_u32_e32 v5, 1, v4
	v_subrev_nc_u32_e32 v6, s10, v3
	v_cmp_le_u32_e32 vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v4, v4, v5 :: v_dual_cndmask_b32 v3, v3, v6
	v_xor_b32_e32 v6, s9, v2
	v_add_nc_u32_e32 v5, 1, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s10, v3
	v_cndmask_b32_e32 v3, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v6
	v_sub_nc_u32_e32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s2, v3, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	v_cmp_le_i32_e32 vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v4, s3, v[3:4]
	s_or_b32 s11, vcc_lo, s11
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	v_add_co_u32 v2, s0, s6, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v7, off
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB51_2
.LBB51_3:                               ; %Flow25
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9transposeIfEviiPKT_PS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z9transposeIfEviiPKT_PS0_,"axG",@progbits,_Z9transposeIfEviiPKT_PS0_,comdat
.Lfunc_end51:
	.size	_Z9transposeIfEviiPKT_PS0_, .Lfunc_end51-_Z9transposeIfEviiPKT_PS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 412
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z9transposeIiEviiPKT_PS0_,"axG",@progbits,_Z9transposeIiEviiPKT_PS0_,comdat
	.protected	_Z9transposeIiEviiPKT_PS0_ ; -- Begin function _Z9transposeIiEviiPKT_PS0_
	.globl	_Z9transposeIiEviiPKT_PS0_
	.p2align	8
	.type	_Z9transposeIiEviiPKT_PS0_,@function
_Z9transposeIiEviiPKT_PS0_:             ; @_Z9transposeIiEviiPKT_PS0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s11, s6, 0xffff
	s_mul_i32 s8, s3, s2
	v_mad_u64_u32 v[1:2], null, s15, s11, v[0:1]
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB52_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s9, s2, 31
	s_load_b32 s12, s[4:5], 0x0
	s_add_i32 s6, s2, s9
	s_sub_i32 s2, 0, s2
	s_xor_b32 s10, s6, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, s10
	s_sub_i32 s4, 0, s10
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s4, v0
	s_load_b128 s[4:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s12, s11
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v0, v2
	v_add_nc_u32_e32 v0, v0, v2
.LBB52_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v7, v[3:4], off
	v_add_nc_u32_e32 v3, v1, v2
	v_xor_b32_e32 v3, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v0
	v_mul_lo_u32 v5, v4, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v5
	v_add_nc_u32_e32 v5, 1, v4
	v_subrev_nc_u32_e32 v6, s10, v3
	v_cmp_le_u32_e32 vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v4, v4, v5 :: v_dual_cndmask_b32 v3, v3, v6
	v_xor_b32_e32 v6, s9, v2
	v_add_nc_u32_e32 v5, 1, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s10, v3
	v_cndmask_b32_e32 v3, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v6
	v_sub_nc_u32_e32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s2, v3, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	v_cmp_le_i32_e32 vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v4, s3, v[3:4]
	s_or_b32 s11, vcc_lo, s11
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	v_add_co_u32 v2, s0, s6, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v7, off
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB52_2
.LBB52_3:                               ; %Flow25
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9transposeIiEviiPKT_PS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z9transposeIiEviiPKT_PS0_,"axG",@progbits,_Z9transposeIiEviiPKT_PS0_,comdat
.Lfunc_end52:
	.size	_Z9transposeIiEviiPKT_PS0_, .Lfunc_end52-_Z9transposeIiEviiPKT_PS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 412
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z9sliceRowsIfEviPKiPKT_iiPS2_,"axG",@progbits,_Z9sliceRowsIfEviPKiPKT_iiPS2_,comdat
	.protected	_Z9sliceRowsIfEviPKiPKT_iiPS2_ ; -- Begin function _Z9sliceRowsIfEviPKiPKT_iiPS2_
	.globl	_Z9sliceRowsIfEviPKiPKT_iiPS2_
	.p2align	8
	.type	_Z9sliceRowsIfEviPKiPKT_iiPS2_,@function
_Z9sliceRowsIfEviPKiPKT_iiPS2_:         ; @_Z9sliceRowsIfEviPKiPKT_iiPS2_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x34
	s_load_b64 s[8:9], s[0:1], 0x18
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s4, 0xffff
	s_mul_i32 s9, s9, s8
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s9, v1
	s_cbranch_execz .LBB53_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s10, s8, 31
	s_load_b32 s13, s[2:3], 0x0
	s_add_i32 s4, s8, s10
	s_load_b64 s[2:3], s[0:1], 0x20
	s_xor_b32 s11, s4, s10
	s_sub_i32 s8, 0, s8
	v_cvt_f32_u32_e32 v0, s11
	s_sub_i32 s4, 0, s11
	s_delay_alu instid0(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s12, s13, s12
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_mov_b32 s13, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s4, v0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b32 s1, s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v0, v2
	v_add_nc_u32_e32 v0, v0, v2
.LBB53_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v1, v2
	v_xor_b32_e32 v3, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v0
	v_mul_lo_u32 v5, v4, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v5
	v_add_nc_u32_e32 v5, 1, v4
	v_subrev_nc_u32_e32 v6, s11, v3
	v_cmp_le_u32_e32 vcc_lo, s11, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v4, v4, v5 :: v_dual_cndmask_b32 v3, v3, v6
	v_xor_b32_e32 v6, s10, v2
	v_add_nc_u32_e32 v5, 1, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s11, v3
	v_cndmask_b32_e32 v3, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v6
	v_sub_nc_u32_e32 v6, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s8, v6, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[4:5], null, v6, s1, v[3:4]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v4, v[3:4], off
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_nc_u32_e32 v1, s12, v1
	v_cmp_le_i32_e32 vcc_lo, s9, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s0, s2, v2
	v_add_co_ci_u32_e64 v3, s0, s3, v3, s0
	s_or_b32 s13, vcc_lo, s13
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v4, off
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB53_2
.LBB53_3:                               ; %Flow30
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9sliceRowsIfEviPKiPKT_iiPS2_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z9sliceRowsIfEviPKiPKT_iiPS2_,"axG",@progbits,_Z9sliceRowsIfEviPKiPKT_iiPS2_,comdat
.Lfunc_end53:
	.size	_Z9sliceRowsIfEviPKiPKT_iiPS2_, .Lfunc_end53-_Z9sliceRowsIfEviPKiPKT_iiPS2_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 476
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z9sliceRowsIiEviPKiPKT_iiPS2_,"axG",@progbits,_Z9sliceRowsIiEviPKiPKT_iiPS2_,comdat
	.protected	_Z9sliceRowsIiEviPKiPKT_iiPS2_ ; -- Begin function _Z9sliceRowsIiEviPKiPKT_iiPS2_
	.globl	_Z9sliceRowsIiEviPKiPKT_iiPS2_
	.p2align	8
	.type	_Z9sliceRowsIiEviPKiPKT_iiPS2_,@function
_Z9sliceRowsIiEviPKiPKT_iiPS2_:         ; @_Z9sliceRowsIiEviPKiPKT_iiPS2_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x34
	s_load_b64 s[8:9], s[0:1], 0x18
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s4, 0xffff
	s_mul_i32 s9, s9, s8
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s9, v1
	s_cbranch_execz .LBB54_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s10, s8, 31
	s_load_b32 s13, s[2:3], 0x0
	s_add_i32 s4, s8, s10
	s_load_b64 s[2:3], s[0:1], 0x20
	s_xor_b32 s11, s4, s10
	s_sub_i32 s8, 0, s8
	v_cvt_f32_u32_e32 v0, s11
	s_sub_i32 s4, 0, s11
	s_delay_alu instid0(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s12, s13, s12
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_mov_b32 s13, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s4, v0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b32 s1, s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v0, v2
	v_add_nc_u32_e32 v0, v0, v2
.LBB54_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v1, v2
	v_xor_b32_e32 v3, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v0
	v_mul_lo_u32 v5, v4, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v5
	v_add_nc_u32_e32 v5, 1, v4
	v_subrev_nc_u32_e32 v6, s11, v3
	v_cmp_le_u32_e32 vcc_lo, s11, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v4, v4, v5 :: v_dual_cndmask_b32 v3, v3, v6
	v_xor_b32_e32 v6, s10, v2
	v_add_nc_u32_e32 v5, 1, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s11, v3
	v_cndmask_b32_e32 v3, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v6
	v_sub_nc_u32_e32 v6, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s8, v6, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[4:5], null, v6, s1, v[3:4]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v4, v[3:4], off
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_nc_u32_e32 v1, s12, v1
	v_cmp_le_i32_e32 vcc_lo, s9, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s0, s2, v2
	v_add_co_ci_u32_e64 v3, s0, s3, v3, s0
	s_or_b32 s13, vcc_lo, s13
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v4, off
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB54_2
.LBB54_3:                               ; %Flow30
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9sliceRowsIiEviPKiPKT_iiPS2_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z9sliceRowsIiEviPKiPKT_iiPS2_,"axG",@progbits,_Z9sliceRowsIiEviPKiPKT_iiPS2_,comdat
.Lfunc_end54:
	.size	_Z9sliceRowsIiEviPKiPKT_iiPS2_, .Lfunc_end54-_Z9sliceRowsIiEviPKiPKT_iiPS2_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 476
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .actual_access:  read_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  write_only
        .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12sliceColumnsiiPKiPKfPf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12sliceColumnsiiPKiPKfPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .actual_access:  read_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  write_only
        .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z24sliceColumnsAndTransposeiiPKiPKfPf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z24sliceColumnsAndTransposeiiPKiPKfPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
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        .size:           4
        .value_kind:     by_value
      - .actual_access:  read_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
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        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
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        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
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        .size:           2
        .value_kind:     hidden_group_size_y
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        .size:           2
        .value_kind:     hidden_group_size_z
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        .size:           2
        .value_kind:     hidden_remainder_x
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        .size:           2
        .value_kind:     hidden_remainder_y
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        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
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        .size:           8
        .value_kind:     hidden_global_offset_y
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        .size:           8
        .value_kind:     hidden_global_offset_z
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        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14sliceRowsBatchPKiiiPKfiiPrPf
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z14sliceRowsBatchPKiiiPKfiiPrPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
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        .size:           4
        .value_kind:     by_value
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        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
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        .size:           2
        .value_kind:     hidden_remainder_y
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        .size:           2
        .value_kind:     hidden_remainder_z
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        .size:           8
        .value_kind:     hidden_global_offset_y
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        .value_kind:     hidden_global_offset_z
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        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf
    .private_segment_fixed_size: 0
    .sgpr_count:     21
    .sgpr_spill_count: 0
    .symbol:         _Z24slicedRowsBatchScaledAddPKiiifPrPKfiiPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .value_kind:     by_value
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        .size:           4
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      - .actual_access:  read_only
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    .group_segment_fixed_size: 256
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12columnArgmaxiiPKfPi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12columnArgmaxiiPKfPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
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    .language:       OpenCL C
    .language_version:
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    .name:           _Z8hprodSumiiPKfS0_Pf
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    .language:       OpenCL C
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    .name:           _Z8sumHprodiPKfS0_S0_S0_S0_Pf
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        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9sliceRowsIiEviPKiPKT_iiPS2_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9sliceRowsIiEviPKiPKT_iiPS2_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
