#include <assert.h>
#include <errno.h>
#ifndef WIN32
#include <getopt.h>
#endif
#include <limits.h>
#include <math.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#include <cuda_runtime.h>
#include <device_launch_parameters.h>

#include "c63cpu.cuh"


// Motion estimation for 8x8 block 
static void me_block_8x8_CPU(struct c63_common_cpu *cm, int mb_x, int mb_y,
    uint8_t *orig, uint8_t *ref, int cc)
{
  struct macroblock *mb = &cm->mbs[cc][mb_y * cm->padw[cc]/8 + mb_x];

  int range = cm->me_search_range;

  // Half resolution for chroma channels.
  if (cc > 0) { range /= 2; }

  int left = mb_x * 8 - range;
  int top = mb_y * 8 - range;
  int right = mb_x * 8 + range;
  int bottom = mb_y * 8 + range;

  int w = cm->padw[cc];
  int h = cm->padh[cc];

  // Make sure we are within bounds of reference frame. TODO: Support partial frame bounds. 
  if (left < 0) { left = 0; }
  if (top < 0) { top = 0; }
  if (right > (w - 8)) { right = w - 8; }
  if (bottom > (h - 8)) { bottom = h - 8; }

  int x, y;

  int mx = mb_x * 8;
  int my = mb_y * 8;

  int best_sad = INT_MAX;

  for (y = top; y < bottom; ++y)
  {
    for (x = left; x < right; ++x)
    {
      int sad;
      sad_block_8x8(orig + my*w+mx, ref + y*w+x, w, &sad);

      if (sad < best_sad)
      {
        mb->mv_x = x - mx;
        mb->mv_y = y - my;
        best_sad = sad;
      }
    }
  }

  // Here, there should be a threshold on SAD that checks if the motion vector
   //  is cheaper than intraprediction. We always assume MV to be beneficial 

   //printf("Using motion vector (%d, %d) with SAD %d\n", mb->mv_x, mb->mv_y,
   //  best_sad); 

  mb->use_mv = 1;
}

void c63_motion_estimate(struct c63_common_cpu *cm)
{
  // Compare this frame with previous reconstructed frame
  int mb_x, mb_y;

  //Luma
  for (mb_y = 0; mb_y < cm->mb_rows; ++mb_y)
  {
    for (mb_x = 0; mb_x < cm->mb_cols; ++mb_x)
    {
      me_block_8x8_CPU(cm, mb_x, mb_y, cm->curframe->orig->Y,
          cm->refframe->recons->Y, 0);
    }
  }

  //Chroma 
  for (mb_y = 0; mb_y < cm->mb_rows / 2; ++mb_y)
  {
    for (mb_x = 0; mb_x < cm->mb_cols / 2; ++mb_x)
    {
      me_block_8x8_CPU(cm, mb_x, mb_y, cm->curframe->orig->U,
          cm->refframe->recons->U, 1);
      me_block_8x8_CPU(cm, mb_x, mb_y, cm->curframe->orig->V,
          cm->refframe->recons->V, 2);
    }
  }
}

void c63_motion_estimate_Y_CPU(struct c63_common_cpu *cm, int cpu_start)
{
	// Compare this frame with previous reconstructed frame
	int mb_x, mb_y;

	//Luma
	#pragma omp parallel for private(mb_x)
	for (mb_y = cpu_start; mb_y < cm->mb_rows; ++mb_y)
	{
		for (mb_x = 0; mb_x < cm->mb_cols; ++mb_x)
		{
			me_block_8x8_CPU(cm, mb_x, mb_y, cm->orig->Y, cm->ref_recons->Y, 0);
		}
	}
}

void c63_motion_estimate_U_CPU(struct c63_common_cpu *cm, int cpu_start)
{
	// Compare this frame with previous reconstructed frame
	int mb_x, mb_y;

	//Luma
	#pragma omp parallel for private(mb_x)
	for (mb_y = cpu_start; mb_y < cm->mb_rows / 2; ++mb_y)
	{
		for (mb_x = 0; mb_x < cm->mb_cols / 2; ++mb_x)
		{
			me_block_8x8_CPU(cm, mb_x, mb_y, cm->orig->U, cm->ref_recons->U, 1);
		}
	}
}

void c63_motion_estimate_V_CPU(struct c63_common_cpu *cm, int cpu_start)
{
	// Compare this frame with previous reconstructed frame
	int mb_x, mb_y;

	//Luma
	#pragma omp parallel for private(mb_x)
	for (mb_y = cpu_start; mb_y < cm->mb_rows / 2; ++mb_y)
	{
		for (mb_x = 0; mb_x < cm->mb_cols / 2; ++mb_x)
		{
			me_block_8x8_CPU(cm, mb_x, mb_y, cm->orig->V, cm->ref_recons->V, 2);
		}
	}
}

// Motion compensation for 8x8 block 
static void mc_block_8x8(struct c63_common_cpu *cm, int mb_x, int mb_y,
    uint8_t *predicted, uint8_t *ref, int cc)
{
  struct macroblock *mb = &cm->curframe->mbs[cc][mb_y * cm->padw[cc]/8 + mb_x];

  if (!mb->use_mv) { return; }

  int left = mb_x * 8;
  int top = mb_y * 8;
  int right = left + 8;
  int bottom = top + 8;

  int w = cm->padw[cc];

  // Copy block from ref mandated by MV 
  int x, y;

  for (y = top; y < bottom; ++y)
  {
    for (x = left; x < right; ++x)
    {
      predicted[y*w+x] = ref[(y + mb->mv_y) * w + (x + mb->mv_x)];
    }
  }
}

void c63_motion_compensate(struct c63_common_cpu *cm)
{
  int mb_x, mb_y;

  // Luma *
  for (mb_y = 0; mb_y < cm->mb_rows; ++mb_y)
  {
    for (mb_x = 0; mb_x < cm->mb_cols; ++mb_x)
    {
      mc_block_8x8(cm, mb_x, mb_y, cm->curframe->predicted->Y,
          cm->refframe->recons->Y, 0);
    }
  }

   //Chroma 
  for (mb_y = 0; mb_y < cm->mb_rows / 2; ++mb_y)
  {
    for (mb_x = 0; mb_x < cm->mb_cols / 2; ++mb_x)
    {
      mc_block_8x8(cm, mb_x, mb_y, cm->curframe->predicted->U,
          cm->refframe->recons->U, 1);
      mc_block_8x8(cm, mb_x, mb_y, cm->curframe->predicted->V,
          cm->refframe->recons->V, 2);
    }
  }
}
	.file	"tmpxft_002d94f0_00000000-6_me.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i, @function
_ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i:
.LFB2032:
	.cfi_startproc
	movslq	%r9d, %r9
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %rax
	movl	%edx, %r10d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	$8, %r11d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	32(%rdi,%r9,4), %edi
	movq	320(%rax), %rbx
	movl	%edi, %eax
	imull	%edx, %eax
	cltd
	idivl	%r11d
	movq	32(%rbx,%r9,8), %rdx
	addl	%esi, %eax
	cltq
	leaq	(%rdx,%rax,8), %rbp
	cmpl	$0, 0(%rbp)
	je	.L1
	sall	$3, %r10d
	sall	$3, %esi
	xorl	%r9d, %r9d
	movl	%r10d, %ebx
	movslq	%esi, %rsi
	imull	%edi, %ebx
	leaq	9(%rsi), %r13
.L3:
	movslq	%ebx, %r11
	leal	(%r10,%r9), %r12d
	movq	%rsi, %rdx
	addq	%rcx, %r11
.L5:
	movl	%edx, %r15d
	incq	%rdx
	cmpq	%r13, %rdx
	je	.L11
	movsbl	5(%rbp), %eax
	movsbl	4(%rbp), %r14d
	addl	%r12d, %eax
	addl	%r15d, %r14d
	imull	%edi, %eax
	addl	%r14d, %eax
	cltq
	movb	(%r8,%rax), %al
	movb	%al, -1(%r11,%rdx)
	jmp	.L5
.L11:
	incl	%r9d
	addl	%edi, %ebx
	cmpl	$8, %r9d
	jne	.L3
.L1:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i, .-_ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i
	.type	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i, @function
_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i:
.LFB2027:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r11
	movq	%r8, %r15
	movl	%esi, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edx, %esi
	movl	$8, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%r9d, %rbx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movl	32(%r11,%rbx,4), %ebp
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	movl	%ebp, %eax
	imull	%edx, %eax
	cltd
	idivl	%r8d
	movq	288(%r11,%rbx,8), %rdx
	addl	%edi, %eax
	cltq
	leaq	(%rdx,%rax,8), %r14
	movl	68(%r11), %eax
	testl	%r9d, %r9d
	je	.L13
	movl	$2, %r8d
	cltd
	idivl	%r8d
.L13:
	movl	44(%r11,%rbx,4), %r11d
	leal	0(,%rdi,8), %r8d
	leal	0(,%rsi,8), %edx
	movl	$0, %ebx
	movl	%r8d, %r12d
	leal	(%r8,%rax), %r9d
	leal	(%rdx,%rax), %r10d
	subl	%eax, %r12d
	cmovs	%ebx, %r12d
	movl	%edx, %ebx
	subl	%eax, %ebx
	movl	$0, %eax
	cmovs	%eax, %ebx
	leal	-7(%rbp), %eax
	cmpl	%r9d, %eax
	jg	.L14
	leal	-8(%rbp), %r9d
.L14:
	leal	-7(%r11), %eax
	cmpl	%r10d, %eax
	jg	.L15
	leal	-8(%r11), %r10d
.L15:
	imull	%ebp, %edx
	movslq	%r8d, %r8
	movslq	%r12d, %r11
	movslq	%edx, %rdx
	addq	%r8, %rdx
	movl	%ebx, %r8d
	imull	%ebp, %r8d
	leaq	(%rcx,%rdx), %rax
	movb	$-8, %dl
	movq	%rax, 16(%rsp)
	movl	%edi, %eax
	imull	%edx, %eax
	movb	%al, 30(%rsp)
	movl	%esi, %eax
	imull	%edx, %eax
	movb	%al, 31(%rsp)
	movl	$2147483647, %eax
.L16:
	cmpl	%ebx, %r10d
	jle	.L19
	movslq	%r8d, %rdx
	movb	31(%rsp), %cl
	movl	%r12d, %r13d
	addq	%r11, %rdx
	leaq	(%r15,%rdx), %rsi
	leal	(%rcx,%rbx), %edi
	movq	%rsi, 8(%rsp)
	leaq	68(%rsp), %rsi
	movb	%dil, 29(%rsp)
	movq	%rsi, 32(%rsp)
.L20:
	cmpl	%r13d, %r9d
	jle	.L26
	movq	32(%rsp), %rcx
	movq	8(%rsp), %rsi
	movl	%ebp, %edx
	movl	%eax, 48(%rsp)
	movq	16(%rsp), %rdi
	movq	%r11, 56(%rsp)
	movl	%r8d, 52(%rsp)
	movl	%r10d, 44(%rsp)
	movl	%r9d, 40(%rsp)
	call	_Z13sad_block_8x8PhS_iPi@PLT
	movl	68(%rsp), %edx
	movl	48(%rsp), %eax
	movl	40(%rsp), %r9d
	movl	44(%rsp), %r10d
	cmpl	%eax, %edx
	movl	52(%rsp), %r8d
	movq	56(%rsp), %r11
	jge	.L17
	movb	30(%rsp), %al
	addl	%r13d, %eax
	movb	%al, 4(%r14)
	movb	29(%rsp), %al
	movb	%al, 5(%r14)
	movl	%edx, %eax
.L17:
	incq	8(%rsp)
	incl	%r13d
	jmp	.L20
.L26:
	incl	%ebx
	addl	%ebp, %r8d
	jmp	.L16
.L19:
	movl	$1, (%r14)
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i, .-_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2036:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z19c63_motion_estimateP14c63_common_cpu
	.type	_Z19c63_motion_estimateP14c63_common_cpu, @function
_Z19c63_motion_estimateP14c63_common_cpu:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L29:
	cmpl	%ebp, 60(%rbx)
	jle	.L38
	xorl	%r12d, %r12d
.L31:
	cmpl	%r12d, 56(%rbx)
	jle	.L39
	movq	312(%rbx), %rax
	movl	%r12d, %esi
	xorl	%r9d, %r9d
	movq	%rbx, %rdi
	incl	%r12d
	movq	8(%rax), %rdx
	movq	320(%rbx), %rax
	movq	(%rax), %rax
	movq	(%rdx), %r8
	movl	%ebp, %edx
	movq	(%rax), %rcx
	call	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
	jmp	.L31
.L39:
	incl	%ebp
	jmp	.L29
.L38:
	xorl	%ebp, %ebp
	movl	$2, %r13d
.L32:
	movl	60(%rbx), %eax
	cltd
	idivl	%r13d
	cmpl	%ebp, %eax
	jle	.L40
	xorl	%r12d, %r12d
.L34:
	movl	56(%rbx), %eax
	cltd
	idivl	%r13d
	cmpl	%r12d, %eax
	jle	.L41
	movq	312(%rbx), %rax
	movq	320(%rbx), %rdx
	movl	%r12d, %esi
	movq	%rbx, %rdi
	movl	$1, %r9d
	movq	8(%rax), %rax
	movq	(%rdx), %rdx
	movq	8(%rax), %r8
	movq	8(%rdx), %rcx
	movl	%ebp, %edx
	call	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
	movq	312(%rbx), %rax
	movl	%r12d, %esi
	movq	320(%rbx), %rdx
	movl	$2, %r9d
	movq	%rbx, %rdi
	incl	%r12d
	movq	(%rdx), %rdx
	movq	8(%rax), %rax
	movq	16(%rdx), %rcx
	movq	16(%rax), %r8
	movl	%ebp, %edx
	call	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
	jmp	.L34
.L41:
	incl	%ebp
	jmp	.L32
.L40:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z19c63_motion_estimateP14c63_common_cpu, .-_Z19c63_motion_estimateP14c63_common_cpu
	.globl	_Z25c63_motion_estimate_Y_CPUP14c63_common_cpui
	.type	_Z25c63_motion_estimate_Y_CPUP14c63_common_cpui, @function
_Z25c63_motion_estimate_Y_CPUP14c63_common_cpui:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
.L43:
	cmpl	%ebp, 60(%rbx)
	jle	.L48
	xorl	%r12d, %r12d
.L45:
	cmpl	%r12d, 56(%rbx)
	jle	.L49
	movq	272(%rbx), %rdx
	movl	%r12d, %esi
	xorl	%r9d, %r9d
	movq	%rbx, %rdi
	movq	264(%rbx), %rax
	incl	%r12d
	movq	(%rdx), %r8
	movl	%ebp, %edx
	movq	(%rax), %rcx
	call	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
	jmp	.L45
.L49:
	incl	%ebp
	jmp	.L43
.L48:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z25c63_motion_estimate_Y_CPUP14c63_common_cpui, .-_Z25c63_motion_estimate_Y_CPUP14c63_common_cpui
	.globl	_Z25c63_motion_estimate_U_CPUP14c63_common_cpui
	.type	_Z25c63_motion_estimate_U_CPUP14c63_common_cpui, @function
_Z25c63_motion_estimate_U_CPUP14c63_common_cpui:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	$2, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L51:
	movl	60(%rbx), %eax
	cltd
	idivl	%r12d
	cmpl	%ebp, %eax
	jle	.L56
	xorl	%r13d, %r13d
.L53:
	movl	56(%rbx), %eax
	cltd
	idivl	%r12d
	cmpl	%r13d, %eax
	jle	.L57
	movq	264(%rbx), %rdx
	movq	272(%rbx), %rax
	movl	%r13d, %esi
	movq	%rbx, %rdi
	movl	$1, %r9d
	incl	%r13d
	movq	8(%rdx), %rcx
	movq	8(%rax), %r8
	movl	%ebp, %edx
	call	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
	jmp	.L53
.L57:
	incl	%ebp
	jmp	.L51
.L56:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z25c63_motion_estimate_U_CPUP14c63_common_cpui, .-_Z25c63_motion_estimate_U_CPUP14c63_common_cpui
	.globl	_Z25c63_motion_estimate_V_CPUP14c63_common_cpui
	.type	_Z25c63_motion_estimate_V_CPUP14c63_common_cpui, @function
_Z25c63_motion_estimate_V_CPUP14c63_common_cpui:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	$2, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L59:
	movl	60(%rbx), %eax
	cltd
	idivl	%r12d
	cmpl	%ebp, %eax
	jle	.L64
	xorl	%r13d, %r13d
.L61:
	movl	56(%rbx), %eax
	cltd
	idivl	%r12d
	cmpl	%r13d, %eax
	jle	.L65
	movq	264(%rbx), %rdx
	movq	272(%rbx), %rax
	movl	%r13d, %esi
	movq	%rbx, %rdi
	movl	$2, %r9d
	incl	%r13d
	movq	16(%rdx), %rcx
	movq	16(%rax), %r8
	movl	%ebp, %edx
	call	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
	jmp	.L61
.L65:
	incl	%ebp
	jmp	.L59
.L64:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z25c63_motion_estimate_V_CPUP14c63_common_cpui, .-_Z25c63_motion_estimate_V_CPUP14c63_common_cpui
	.globl	_Z21c63_motion_compensateP14c63_common_cpu
	.type	_Z21c63_motion_compensateP14c63_common_cpu, @function
_Z21c63_motion_compensateP14c63_common_cpu:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
.L67:
	cmpl	%ebp, 60(%rbx)
	jle	.L76
	xorl	%r12d, %r12d
.L69:
	cmpl	%r12d, 56(%rbx)
	jle	.L77
	movq	312(%rbx), %rax
	movl	%r12d, %esi
	xorl	%r9d, %r9d
	movq	%rbx, %rdi
	incl	%r12d
	movq	8(%rax), %rdx
	movq	320(%rbx), %rax
	movq	16(%rax), %rax
	movq	(%rdx), %r8
	movl	%ebp, %edx
	movq	(%rax), %rcx
	call	_ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i
	jmp	.L69
.L77:
	incl	%ebp
	jmp	.L67
.L76:
	xorl	%ebp, %ebp
	movl	$2, %r13d
.L70:
	movl	60(%rbx), %eax
	cltd
	idivl	%r13d
	cmpl	%ebp, %eax
	jle	.L78
	xorl	%r12d, %r12d
.L72:
	movl	56(%rbx), %eax
	cltd
	idivl	%r13d
	cmpl	%r12d, %eax
	jle	.L79
	movq	312(%rbx), %rax
	movq	320(%rbx), %rdx
	movl	%r12d, %esi
	movq	%rbx, %rdi
	movl	$1, %r9d
	movq	8(%rax), %rax
	movq	16(%rdx), %rdx
	movq	8(%rax), %r8
	movq	8(%rdx), %rcx
	movl	%ebp, %edx
	call	_ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i
	movq	312(%rbx), %rax
	movl	%r12d, %esi
	movq	320(%rbx), %rdx
	movl	$2, %r9d
	movq	%rbx, %rdi
	incl	%r12d
	movq	16(%rdx), %rdx
	movq	8(%rax), %rax
	movq	16(%rdx), %rcx
	movq	16(%rax), %r8
	movl	%ebp, %edx
	call	_ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i
	jmp	.L72
.L79:
	incl	%ebp
	jmp	.L70
.L78:
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z21c63_motion_compensateP14c63_common_cpu, .-_Z21c63_motion_compensateP14c63_common_cpu
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <assert.h>
#include <errno.h>
#ifndef WIN32
#include <getopt.h>
#endif
#include <limits.h>
#include <math.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#include <hip/hip_runtime.h>


#include "c63cpu.cuh"


// Motion estimation for 8x8 block 
static void me_block_8x8_CPU(struct c63_common_cpu *cm, int mb_x, int mb_y,
    uint8_t *orig, uint8_t *ref, int cc)
{
  struct macroblock *mb = &cm->mbs[cc][mb_y * cm->padw[cc]/8 + mb_x];

  int range = cm->me_search_range;

  // Half resolution for chroma channels.
  if (cc > 0) { range /= 2; }

  int left = mb_x * 8 - range;
  int top = mb_y * 8 - range;
  int right = mb_x * 8 + range;
  int bottom = mb_y * 8 + range;

  int w = cm->padw[cc];
  int h = cm->padh[cc];

  // Make sure we are within bounds of reference frame. TODO: Support partial frame bounds. 
  if (left < 0) { left = 0; }
  if (top < 0) { top = 0; }
  if (right > (w - 8)) { right = w - 8; }
  if (bottom > (h - 8)) { bottom = h - 8; }

  int x, y;

  int mx = mb_x * 8;
  int my = mb_y * 8;

  int best_sad = INT_MAX;

  for (y = top; y < bottom; ++y)
  {
    for (x = left; x < right; ++x)
    {
      int sad;
      sad_block_8x8(orig + my*w+mx, ref + y*w+x, w, &sad);

      if (sad < best_sad)
      {
        mb->mv_x = x - mx;
        mb->mv_y = y - my;
        best_sad = sad;
      }
    }
  }

  // Here, there should be a threshold on SAD that checks if the motion vector
   //  is cheaper than intraprediction. We always assume MV to be beneficial 

   //printf("Using motion vector (%d, %d) with SAD %d\n", mb->mv_x, mb->mv_y,
   //  best_sad); 

  mb->use_mv = 1;
}

void c63_motion_estimate(struct c63_common_cpu *cm)
{
  // Compare this frame with previous reconstructed frame
  int mb_x, mb_y;

  //Luma
  for (mb_y = 0; mb_y < cm->mb_rows; ++mb_y)
  {
    for (mb_x = 0; mb_x < cm->mb_cols; ++mb_x)
    {
      me_block_8x8_CPU(cm, mb_x, mb_y, cm->curframe->orig->Y,
          cm->refframe->recons->Y, 0);
    }
  }

  //Chroma 
  for (mb_y = 0; mb_y < cm->mb_rows / 2; ++mb_y)
  {
    for (mb_x = 0; mb_x < cm->mb_cols / 2; ++mb_x)
    {
      me_block_8x8_CPU(cm, mb_x, mb_y, cm->curframe->orig->U,
          cm->refframe->recons->U, 1);
      me_block_8x8_CPU(cm, mb_x, mb_y, cm->curframe->orig->V,
          cm->refframe->recons->V, 2);
    }
  }
}

void c63_motion_estimate_Y_CPU(struct c63_common_cpu *cm, int cpu_start)
{
	// Compare this frame with previous reconstructed frame
	int mb_x, mb_y;

	//Luma
	#pragma omp parallel for private(mb_x)
	for (mb_y = cpu_start; mb_y < cm->mb_rows; ++mb_y)
	{
		for (mb_x = 0; mb_x < cm->mb_cols; ++mb_x)
		{
			me_block_8x8_CPU(cm, mb_x, mb_y, cm->orig->Y, cm->ref_recons->Y, 0);
		}
	}
}

void c63_motion_estimate_U_CPU(struct c63_common_cpu *cm, int cpu_start)
{
	// Compare this frame with previous reconstructed frame
	int mb_x, mb_y;

	//Luma
	#pragma omp parallel for private(mb_x)
	for (mb_y = cpu_start; mb_y < cm->mb_rows / 2; ++mb_y)
	{
		for (mb_x = 0; mb_x < cm->mb_cols / 2; ++mb_x)
		{
			me_block_8x8_CPU(cm, mb_x, mb_y, cm->orig->U, cm->ref_recons->U, 1);
		}
	}
}

void c63_motion_estimate_V_CPU(struct c63_common_cpu *cm, int cpu_start)
{
	// Compare this frame with previous reconstructed frame
	int mb_x, mb_y;

	//Luma
	#pragma omp parallel for private(mb_x)
	for (mb_y = cpu_start; mb_y < cm->mb_rows / 2; ++mb_y)
	{
		for (mb_x = 0; mb_x < cm->mb_cols / 2; ++mb_x)
		{
			me_block_8x8_CPU(cm, mb_x, mb_y, cm->orig->V, cm->ref_recons->V, 2);
		}
	}
}

// Motion compensation for 8x8 block 
static void mc_block_8x8(struct c63_common_cpu *cm, int mb_x, int mb_y,
    uint8_t *predicted, uint8_t *ref, int cc)
{
  struct macroblock *mb = &cm->curframe->mbs[cc][mb_y * cm->padw[cc]/8 + mb_x];

  if (!mb->use_mv) { return; }

  int left = mb_x * 8;
  int top = mb_y * 8;
  int right = left + 8;
  int bottom = top + 8;

  int w = cm->padw[cc];

  // Copy block from ref mandated by MV 
  int x, y;

  for (y = top; y < bottom; ++y)
  {
    for (x = left; x < right; ++x)
    {
      predicted[y*w+x] = ref[(y + mb->mv_y) * w + (x + mb->mv_x)];
    }
  }
}

void c63_motion_compensate(struct c63_common_cpu *cm)
{
  int mb_x, mb_y;

  // Luma *
  for (mb_y = 0; mb_y < cm->mb_rows; ++mb_y)
  {
    for (mb_x = 0; mb_x < cm->mb_cols; ++mb_x)
    {
      mc_block_8x8(cm, mb_x, mb_y, cm->curframe->predicted->Y,
          cm->refframe->recons->Y, 0);
    }
  }

   //Chroma 
  for (mb_y = 0; mb_y < cm->mb_rows / 2; ++mb_y)
  {
    for (mb_x = 0; mb_x < cm->mb_cols / 2; ++mb_x)
    {
      mc_block_8x8(cm, mb_x, mb_y, cm->curframe->predicted->U,
          cm->refframe->recons->U, 1);
      mc_block_8x8(cm, mb_x, mb_y, cm->curframe->predicted->V,
          cm->refframe->recons->V, 2);
    }
  }
}
	.text
	.file	"me.hip"
	.globl	_Z19c63_motion_estimateP14c63_common_cpu # -- Begin function _Z19c63_motion_estimateP14c63_common_cpu
	.type	_Z19c63_motion_estimateP14c63_common_cpu,@function
_Z19c63_motion_estimateP14c63_common_cpu: # @_Z19c63_motion_estimateP14c63_common_cpu
	.cfi_startproc
# %bb.0:
	movl	60(%rdi), %eax
	testl	%eax, %eax
	jle	.LBB0_15
# %bb.1:                                # %.preheader29.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movl	56(%rdi), %ecx
	xorl	%ebp, %ebp
.LBB0_2:                                # %.preheader29
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	testl	%ecx, %ecx
	jle	.LBB0_6
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB0_2 Depth=1
	xorl	%r14d, %r14d
.LBB0_4:                                # %.lr.ph
                                        #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	312(%rbx), %rax
	movq	320(%rbx), %rcx
	movq	(%rcx), %rcx
	movq	(%rcx), %rcx
	movq	8(%rax), %rax
	movq	(%rax), %r8
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%ebp, %edx
	xorl	%r9d, %r9d
	callq	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
	incl	%r14d
	movl	56(%rbx), %ecx
	cmpl	%ecx, %r14d
	jl	.LBB0_4
# %bb.5:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB0_2 Depth=1
	movl	60(%rbx), %eax
.LBB0_6:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	incl	%ebp
	cmpl	%eax, %ebp
	jl	.LBB0_2
# %bb.7:                                # %.preheader28
	cmpl	$2, %eax
	jl	.LBB0_14
# %bb.8:                                # %.preheader.lr.ph
	movl	56(%rbx), %ecx
	xorl	%ebp, %ebp
.LBB0_9:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_11 Depth 2
	cmpl	$2, %ecx
	jl	.LBB0_13
# %bb.10:                               # %.lr.ph33.preheader
                                        #   in Loop: Header=BB0_9 Depth=1
	xorl	%r14d, %r14d
.LBB0_11:                               # %.lr.ph33
                                        #   Parent Loop BB0_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	312(%rbx), %rax
	movq	320(%rbx), %rcx
	movq	(%rcx), %rcx
	movq	8(%rcx), %rcx
	movq	8(%rax), %rax
	movq	8(%rax), %r8
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%ebp, %edx
	movl	$1, %r9d
	callq	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
	movq	312(%rbx), %rax
	movq	320(%rbx), %rcx
	movq	(%rcx), %rcx
	movq	16(%rcx), %rcx
	movq	8(%rax), %rax
	movq	16(%rax), %r8
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%ebp, %edx
	movl	$2, %r9d
	callq	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
	incl	%r14d
	movl	56(%rbx), %ecx
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
	cmpl	%eax, %r14d
	jl	.LBB0_11
# %bb.12:                               # %._crit_edge34.loopexit
                                        #   in Loop: Header=BB0_9 Depth=1
	movl	60(%rbx), %eax
.LBB0_13:                               # %._crit_edge34
                                        #   in Loop: Header=BB0_9 Depth=1
	incl	%ebp
	movl	%eax, %edx
	shrl	$31, %edx
	addl	%eax, %edx
	sarl	%edx
	cmpl	%edx, %ebp
	jl	.LBB0_9
.LBB0_14:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %rbp
.LBB0_15:                               # %._crit_edge36
	retq
.Lfunc_end0:
	.size	_Z19c63_motion_estimateP14c63_common_cpu, .Lfunc_end0-_Z19c63_motion_estimateP14c63_common_cpu
	.cfi_endproc
                                        # -- End function
	.type	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i,@function # -- Begin function _ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i: # @_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $edx killed $edx def $rdx
                                        # kill: def $esi killed $esi def $rsi
	movl	%r9d, %r10d
	movq	288(%rdi,%r10,8), %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movslq	32(%rdi,%r10,4), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
                                        # kill: def $eax killed $eax killed $rax def $rax
	imull	%edx, %eax
	leal	7(%rax), %r11d
	testl	%eax, %eax
	cmovnsl	%eax, %r11d
	sarl	$3, %r11d
	addl	%esi, %r11d
	movslq	%r11d, %rax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	68(%rdi), %eax
	movl	%eax, %r11d
	shrl	$31, %r11d
	addl	%eax, %r11d
	sarl	%r11d
	testl	%r9d, %r9d
	cmovlel	%eax, %r11d
	leal	(,%rdx,8), %eax
	movl	%eax, 4(%rsp)                   # 4-byte Spill
	subl	%r11d, %eax
	leal	(%r11,%rdx,8), %r9d
	movl	44(%rdi,%r10,4), %edx
	xorl	%edi, %edi
	testl	%eax, %eax
	cmovlel	%edi, %eax
	addl	$-8, %edx
	cmpl	%edx, %r9d
	cmovll	%r9d, %edx
	cmpl	%edx, %eax
	jge	.LBB1_8
# %bb.1:                                # %.preheader.lr.ph
	movq	%r8, %r13
	leal	(,%rsi,8), %edi
	leal	(%r11,%rdi), %r9d
	movq	8(%rsp), %r10                   # 8-byte Reload
	leal	-8(%r10), %ebx
	cmpl	%ebx, %r9d
	cmovll	%r9d, %ebx
	movslq	%edi, %r9
	subl	%r11d, %edi
	testl	%edi, %edi
	movl	$0, %r11d
	cmovgl	%edi, %r11d
	movl	%r10d, %edi
	imull	4(%rsp), %edi                   # 4-byte Folded Reload
	movslq	%edi, %rdi
	movq	%rcx, %r15
	addq	%r9, %r15
	addq	%rdi, %r15
	movl	%eax, %ecx
	movl	%edx, %eax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	shlb	$3, %sil
	movl	%r11d, %eax
	subb	%sil, %al
	movb	%al, 3(%rsp)                    # 1-byte Spill
	movq	%r10, %rax
	imulq	%rcx, %rax
	addq	%r11, %r13
	addq	%rax, %r13
	movq	%rbx, 56(%rsp)                  # 8-byte Spill
	movq	%r11, 64(%rsp)                  # 8-byte Spill
	subq	%r11, %rbx
	movq	%rbx, 40(%rsp)                  # 8-byte Spill
	movl	$2147483647, %r12d              # imm = 0x7FFFFFFF
.LBB1_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	movq	56(%rsp), %rax                  # 8-byte Reload
	cmpl	%eax, 64(%rsp)                  # 4-byte Folded Reload
	movq	%r13, 80(%rsp)                  # 8-byte Spill
	movq	%rcx, 72(%rsp)                  # 8-byte Spill
	jge	.LBB1_7
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%ecx, %r14d
	subl	4(%rsp), %r14d                  # 4-byte Folded Reload
	movq	40(%rsp), %rbp                  # 8-byte Reload
	movb	3(%rsp), %bl                    # 1-byte Reload
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%r15, %rdi
	movq	%r13, %rsi
	movq	8(%rsp), %rdx                   # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	leaq	20(%rsp), %rcx
	callq	_Z13sad_block_8x8PhS_iPi
	movl	20(%rsp), %eax
	cmpl	%r12d, %eax
	jge	.LBB1_6
# %bb.5:                                #   in Loop: Header=BB1_4 Depth=2
	movq	32(%rsp), %rcx                  # 8-byte Reload
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movb	%bl, 4(%rcx,%rdx,8)
	movb	%r14b, 5(%rcx,%rdx,8)
	movl	%eax, %r12d
.LBB1_6:                                #   in Loop: Header=BB1_4 Depth=2
	incb	%bl
	incq	%r13
	decq	%rbp
	jne	.LBB1_4
.LBB1_7:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	movq	72(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	movq	80(%rsp), %r13                  # 8-byte Reload
	addq	8(%rsp), %r13                   # 8-byte Folded Reload
	cmpq	48(%rsp), %rcx                  # 8-byte Folded Reload
	jne	.LBB1_2
.LBB1_8:                                # %._crit_edge69
	movq	32(%rsp), %rax                  # 8-byte Reload
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movl	$1, (%rax,%rcx,8)
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i, .Lfunc_end1-_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z25c63_motion_estimate_Y_CPUP14c63_common_cpui # -- Begin function _Z25c63_motion_estimate_Y_CPUP14c63_common_cpui
	.type	_Z25c63_motion_estimate_Y_CPUP14c63_common_cpui,@function
_Z25c63_motion_estimate_Y_CPUP14c63_common_cpui: # @_Z25c63_motion_estimate_Y_CPUP14c63_common_cpui
	.cfi_startproc
# %bb.0:
	movl	60(%rdi), %ecx
	cmpl	%esi, %ecx
	jle	.LBB2_8
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movq	%rdi, %r14
	movl	56(%rdi), %eax
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%eax, %eax
	jle	.LBB2_6
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_2 Depth=1
	xorl	%ebp, %ebp
.LBB2_4:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	264(%r14), %rax
	movq	272(%r14), %rdx
	movq	(%rax), %rcx
	movq	(%rdx), %r8
	movq	%r14, %rdi
	movl	%ebp, %esi
	movl	%ebx, %edx
	xorl	%r9d, %r9d
	callq	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
	incl	%ebp
	movl	56(%r14), %eax
	cmpl	%eax, %ebp
	jl	.LBB2_4
# %bb.5:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	60(%r14), %ecx
.LBB2_6:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incl	%ebx
	cmpl	%ecx, %ebx
	jl	.LBB2_2
# %bb.7:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %rbp
.LBB2_8:                                # %._crit_edge14
	retq
.Lfunc_end2:
	.size	_Z25c63_motion_estimate_Y_CPUP14c63_common_cpui, .Lfunc_end2-_Z25c63_motion_estimate_Y_CPUP14c63_common_cpui
	.cfi_endproc
                                        # -- End function
	.globl	_Z25c63_motion_estimate_U_CPUP14c63_common_cpui # -- Begin function _Z25c63_motion_estimate_U_CPUP14c63_common_cpui
	.type	_Z25c63_motion_estimate_U_CPUP14c63_common_cpui,@function
_Z25c63_motion_estimate_U_CPUP14c63_common_cpui: # @_Z25c63_motion_estimate_U_CPUP14c63_common_cpui
	.cfi_startproc
# %bb.0:
	movl	60(%rdi), %ecx
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
	cmpl	%esi, %eax
	jle	.LBB3_8
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movq	%rdi, %r14
	movl	56(%rdi), %eax
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	cmpl	$2, %eax
	jl	.LBB3_6
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB3_2 Depth=1
	xorl	%ebp, %ebp
.LBB3_4:                                # %.lr.ph
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	264(%r14), %rax
	movq	272(%r14), %rdx
	movq	8(%rax), %rcx
	movq	8(%rdx), %r8
	movq	%r14, %rdi
	movl	%ebp, %esi
	movl	%ebx, %edx
	movl	$1, %r9d
	callq	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
	incl	%ebp
	movl	56(%r14), %eax
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
	cmpl	%ecx, %ebp
	jl	.LBB3_4
# %bb.5:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	60(%r14), %ecx
.LBB3_6:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incl	%ebx
	movl	%ecx, %edx
	shrl	$31, %edx
	addl	%ecx, %edx
	sarl	%edx
	cmpl	%edx, %ebx
	jl	.LBB3_2
# %bb.7:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %rbp
.LBB3_8:                                # %._crit_edge14
	retq
.Lfunc_end3:
	.size	_Z25c63_motion_estimate_U_CPUP14c63_common_cpui, .Lfunc_end3-_Z25c63_motion_estimate_U_CPUP14c63_common_cpui
	.cfi_endproc
                                        # -- End function
	.globl	_Z25c63_motion_estimate_V_CPUP14c63_common_cpui # -- Begin function _Z25c63_motion_estimate_V_CPUP14c63_common_cpui
	.type	_Z25c63_motion_estimate_V_CPUP14c63_common_cpui,@function
_Z25c63_motion_estimate_V_CPUP14c63_common_cpui: # @_Z25c63_motion_estimate_V_CPUP14c63_common_cpui
	.cfi_startproc
# %bb.0:
	movl	60(%rdi), %ecx
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
	cmpl	%esi, %eax
	jle	.LBB4_8
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movq	%rdi, %r14
	movl	56(%rdi), %eax
.LBB4_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_4 Depth 2
	cmpl	$2, %eax
	jl	.LBB4_6
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB4_2 Depth=1
	xorl	%ebp, %ebp
.LBB4_4:                                # %.lr.ph
                                        #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	264(%r14), %rax
	movq	272(%r14), %rdx
	movq	16(%rax), %rcx
	movq	16(%rdx), %r8
	movq	%r14, %rdi
	movl	%ebp, %esi
	movl	%ebx, %edx
	movl	$2, %r9d
	callq	_ZL16me_block_8x8_CPUP14c63_common_cpuiiPhS1_i
	incl	%ebp
	movl	56(%r14), %eax
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
	cmpl	%ecx, %ebp
	jl	.LBB4_4
# %bb.5:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB4_2 Depth=1
	movl	60(%r14), %ecx
.LBB4_6:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	incl	%ebx
	movl	%ecx, %edx
	shrl	$31, %edx
	addl	%ecx, %edx
	sarl	%edx
	cmpl	%edx, %ebx
	jl	.LBB4_2
# %bb.7:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %rbp
.LBB4_8:                                # %._crit_edge14
	retq
.Lfunc_end4:
	.size	_Z25c63_motion_estimate_V_CPUP14c63_common_cpui, .Lfunc_end4-_Z25c63_motion_estimate_V_CPUP14c63_common_cpui
	.cfi_endproc
                                        # -- End function
	.globl	_Z21c63_motion_compensateP14c63_common_cpu # -- Begin function _Z21c63_motion_compensateP14c63_common_cpu
	.type	_Z21c63_motion_compensateP14c63_common_cpu,@function
_Z21c63_motion_compensateP14c63_common_cpu: # @_Z21c63_motion_compensateP14c63_common_cpu
	.cfi_startproc
# %bb.0:
	movl	60(%rdi), %eax
	testl	%eax, %eax
	jle	.LBB5_15
# %bb.1:                                # %.preheader29.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movl	56(%rdi), %ecx
	xorl	%ebp, %ebp
.LBB5_2:                                # %.preheader29
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_4 Depth 2
	testl	%ecx, %ecx
	jle	.LBB5_6
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB5_2 Depth=1
	xorl	%r14d, %r14d
.LBB5_4:                                # %.lr.ph
                                        #   Parent Loop BB5_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	312(%rbx), %rax
	movq	320(%rbx), %rcx
	movq	16(%rcx), %rcx
	movq	(%rcx), %rcx
	movq	8(%rax), %rax
	movq	(%rax), %r8
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%ebp, %edx
	xorl	%r9d, %r9d
	callq	_ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i
	incl	%r14d
	movl	56(%rbx), %ecx
	cmpl	%ecx, %r14d
	jl	.LBB5_4
# %bb.5:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB5_2 Depth=1
	movl	60(%rbx), %eax
.LBB5_6:                                # %._crit_edge
                                        #   in Loop: Header=BB5_2 Depth=1
	incl	%ebp
	cmpl	%eax, %ebp
	jl	.LBB5_2
# %bb.7:                                # %.preheader28
	cmpl	$2, %eax
	jl	.LBB5_14
# %bb.8:                                # %.preheader.lr.ph
	movl	56(%rbx), %ecx
	xorl	%ebp, %ebp
.LBB5_9:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_11 Depth 2
	cmpl	$2, %ecx
	jl	.LBB5_13
# %bb.10:                               # %.lr.ph33.preheader
                                        #   in Loop: Header=BB5_9 Depth=1
	xorl	%r14d, %r14d
.LBB5_11:                               # %.lr.ph33
                                        #   Parent Loop BB5_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	312(%rbx), %rax
	movq	320(%rbx), %rcx
	movq	16(%rcx), %rcx
	movq	8(%rcx), %rcx
	movq	8(%rax), %rax
	movq	8(%rax), %r8
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%ebp, %edx
	movl	$1, %r9d
	callq	_ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i
	movq	312(%rbx), %rax
	movq	320(%rbx), %rcx
	movq	16(%rcx), %rcx
	movq	16(%rcx), %rcx
	movq	8(%rax), %rax
	movq	16(%rax), %r8
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%ebp, %edx
	movl	$2, %r9d
	callq	_ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i
	incl	%r14d
	movl	56(%rbx), %ecx
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
	cmpl	%eax, %r14d
	jl	.LBB5_11
# %bb.12:                               # %._crit_edge34.loopexit
                                        #   in Loop: Header=BB5_9 Depth=1
	movl	60(%rbx), %eax
.LBB5_13:                               # %._crit_edge34
                                        #   in Loop: Header=BB5_9 Depth=1
	incl	%ebp
	movl	%eax, %edx
	shrl	$31, %edx
	addl	%eax, %edx
	sarl	%edx
	cmpl	%edx, %ebp
	jl	.LBB5_9
.LBB5_14:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %rbp
.LBB5_15:                               # %._crit_edge36
	retq
.Lfunc_end5:
	.size	_Z21c63_motion_compensateP14c63_common_cpu, .Lfunc_end5-_Z21c63_motion_compensateP14c63_common_cpu
	.cfi_endproc
                                        # -- End function
	.type	_ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i,@function # -- Begin function _ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i
_ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i: # @_ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
                                        # kill: def $edx killed $edx def $rdx
                                        # kill: def $esi killed $esi def $rsi
	movq	320(%rdi), %rax
	movl	%r9d, %r9d
	movq	32(%rax,%r9,8), %rax
	movslq	32(%rdi,%r9,4), %rdi
	movl	%edi, %r9d
	imull	%edx, %r9d
	leal	7(%r9), %r10d
	testl	%r9d, %r9d
	cmovnsl	%r9d, %r10d
	sarl	$3, %r10d
	addl	%esi, %r10d
	movslq	%r10d, %r9
	cmpl	$0, (%rax,%r9,8)
	je	.LBB6_5
# %bb.1:
	shll	$3, %esi
	leal	(,%rdx,8), %r10d
	movslq	%esi, %r11
	movslq	%r10d, %r10
	leal	8(,%rdx,8), %edx
	movq	%rdi, %rbx
	imulq	%r10, %rbx
	addq	%r11, %rcx
	addq	%rbx, %rcx
.LBB6_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_3 Depth 2
	xorl	%r11d, %r11d
.LBB6_3:                                #   Parent Loop BB6_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsbl	5(%rax,%r9,8), %ebx
	movsbl	4(%rax,%r9,8), %ebp
	addl	%r10d, %ebx
	imull	%edi, %ebx
	addl	%ebp, %ebx
	addl	%esi, %ebx
	addl	%r11d, %ebx
	movslq	%ebx, %rbx
	movb	(%r8,%rbx), %bl
	movb	%bl, (%rcx,%r11)
	incq	%r11
	cmpl	$8, %r11d
	jne	.LBB6_3
# %bb.4:                                #   in Loop: Header=BB6_2 Depth=1
	incq	%r10
	addq	%rdi, %rcx
	cmpl	%r10d, %edx
	jne	.LBB6_2
.LBB6_5:                                # %.loopexit
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i, .Lfunc_end6-_ZL12mc_block_8x8P14c63_common_cpuiiPhS1_i
	.cfi_endproc
                                        # -- End function
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
