
#include <cstdio>
#include <cstdlib>
#include <random>
#include <sys/time.h>

#define cudaErrChk(ans) { cudaAssert((ans), __FILE__, __LINE__); }
inline void cudaAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
   if (code != cudaSuccess) 
   {
      fprintf(stderr,"CUDA assert: %s %s %d\n", cudaGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}

struct config {
    int AH;
    int AW;
    int BH;
    int BW;
    int CH;
    int CW;
    float alpha;
    float beta;
    bool do_test;
};


/***************************************
  * Device code "matmul"
  **************************************/

template <int BLOCK_SIZE> 
__global__ void sgemm (const float* A, const float* B, float* C, const int CH, const int CW, const int AW, const int BW, const float alpha, const float beta) {

    int y = blockIdx.y*blockDim.y + threadIdx.y;
    int x = blockIdx.x*blockDim.x + threadIdx.x;
    int sy = threadIdx.y;
    int sx = threadIdx.x;

    __shared__ float sA[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ float sB[BLOCK_SIZE][BLOCK_SIZE];
    int num_tiles = (AW+(BLOCK_SIZE-1))/BLOCK_SIZE;

    float sum=0.0f;
    for (int t=0; t<num_tiles; t++) {
        if (y<CH && (sx+t*BLOCK_SIZE)<AW) {
            sA[sy][sx] = A[y*AW+(sx+t*BLOCK_SIZE)];
        } else {
            sA[sy][sx] = 0.0f;
        }

        if (x<CW && (sy+t*BLOCK_SIZE)<AW) {
            sB[sy][sx] = B[(sy+t*BLOCK_SIZE)*BW+x];
        } else {
            sB[sy][sx] = 0.0f;
        }
        __syncthreads();

        #pragma unroll
        for (int k=0; k<BLOCK_SIZE; k++) {
            sum += sA[sy][k]*sB[k][sx];
        }
        __syncthreads();
    }

    if (x<CW && y<CH) {
        C[y*CW+x] = alpha*sum + beta*C[y*CW+x];
    }

}


/***************************************
  * Host code "matmul"
  **************************************/
float* host_mat_mul(const float* A, const float* B, const float* C, const struct config conf) {

    printf("[Kernel] Run kernal\n");
    /*** Initialize device memory ***/
    const int num_executions = 1;
    const int block_size = 16;
    size_t size_A = sizeof(float)*conf.AH*conf.AW;
    size_t size_B = sizeof(float)*conf.BH*conf.BW;
    size_t size_C = sizeof(float)*conf.CH*conf.CW;
    float *d_A, *d_B, *d_C;
    float *result = (float *) malloc (conf.CH*conf.CW*sizeof(float));
    cudaErrChk (cudaMalloc ((void**)(&d_A), size_A));
    cudaErrChk (cudaMalloc ((void**)(&d_B), size_B));
    cudaErrChk (cudaMalloc ((void**)(&d_C), size_C));
    cudaErrChk (cudaMemcpy (d_A, A, size_A, cudaMemcpyHostToDevice));
    cudaErrChk (cudaMemcpy (d_B, B, size_B, cudaMemcpyHostToDevice));
    cudaErrChk (cudaMemcpy (d_C, C, size_C, cudaMemcpyHostToDevice));
    cudaErrChk (cudaDeviceSynchronize ())

    /*** Setup execution config ***/
    dim3 threads(block_size, block_size);
    dim3 blocks((conf.CW+threads.x-1)/threads.x, (conf.CH+threads.y-1)/threads.y);

    /*** Run CUDA kernel ***/
    cudaEvent_t start, stop;
    cudaErrChk(cudaEventCreate(&start));
    cudaErrChk(cudaEventCreate(&stop));
    cudaErrChk(cudaEventRecord(start, NULL));
    // Main body
    for (int i=0; i<num_executions; i++) {
        sgemm<block_size><<<blocks, threads>>>(d_A, d_B, d_C, conf.CH, conf.CW, conf.AW, conf.BW, conf.alpha, conf.beta);
        cudaErrChk (cudaDeviceSynchronize ())
        cudaErrChk( cudaGetLastError() );
    }
    // End of main body
    cudaErrChk(cudaEventRecord(stop, NULL));
    cudaErrChk(cudaEventSynchronize(stop));
    float msec_total = 0.0f;
    float gflo = num_executions*conf.CH*conf.CW*(2.0*conf.AW+2)*1e-9;
    cudaErrChk(cudaEventElapsedTime(&msec_total, start, stop));
    printf("    Elaped time: %.4f msec\n", msec_total);
    printf("    gFlops : %.4f gflops\n", gflo/(msec_total*1e-3));

    cudaErrChk (cudaMemcpy(result, d_C, size_C, cudaMemcpyDeviceToHost));
    cudaErrChk (cudaDeviceSynchronize ())
    cudaErrChk (cudaFree (d_A));
    cudaErrChk (cudaFree (d_B));
    cudaErrChk (cudaFree (d_C));

    return result;
}



/****************************************
  * Helper functions for host
  ****************************************/

const struct config host_get_cmd_args(int argc, char** argv) {

    int a=100, b=100, c=100;
    float alpha=1.0f, beta=0.0f;
    bool do_test = false;

    if (argc >= 2)
        do_test = (bool)atoi(argv[1]);
    if (argc >= 7) {
        a = atoi(argv[2]);
        b = atoi(argv[3]);
        c = atoi(argv[4]);
        alpha = atof(argv[5]);
        beta = atof(argv[6]);
    }

    struct config conf = {
        a,
        b,
        b,
        c,
        a,
        c,
        alpha,
        beta,
        do_test
    };
    printf("\n================================================\n");
    printf("CUDA implementaion of SGEMM\n");
    printf("    args: ./matmul [test] [a, b, c, alpha, beta]\n");
    printf("    C[a, c] = alpha * A[a, b] @ B[b, c] + beta * C[a, c]\n");
    printf("    C[%d, %d] = %f * A[%d, %d] @ B[%d, %d] + %f * C[%d, %d]\n", a,c,alpha,a,b,b,c,beta,a,c);
    printf("================================================\n\n");
    return conf;
}


void host_initialize(float *mem, const int H, const int W) {
    for (int i=0; i<H; i++) {
        for (int j=0; j<W; j++) {
            mem[i*W+j] = (float)(rand()%100);
        }
    }
}

void host_test(const float *A, const float *B, const float *C, const float * result, const struct config conf) {

    if (conf.do_test == false) {
        printf("[TEST] Test skipped..\n");
        return;
    }

    printf("[TEST] Test start..\n");

    float alpha=conf.alpha, beta=conf.beta;
    int len_k = conf.AW;
    for (int i=0; i<conf.CH; i++) {
        for (int j=0; j<conf.CW; j++) {
            float sum = 0;
            for (int k=0; k<len_k; k++) {
                sum += A[i*conf.AW+k]*B[k*conf.BW+j];
            }
            sum = alpha*sum+beta*C[i*conf.CW+j];
            if (sum != result[i*conf.CW+j]){
                printf("    [ERROR] C[%d][%d] = %.f != %f\n", i, j, result[i*conf.CW+j], sum);
                printf("    Test failed...!\n");
                return;
            }
        }
    }
    printf("    Test passed!!\n");
    return;
}


/***************************************
  * Main function
  **************************************/
int main(int argc, char** argv) {

    /*** Program configuration ***/
    const struct config conf = host_get_cmd_args(argc, argv);
    srand(0);

    /*** Initialize Data ***/
    float *A = (float *) malloc (conf.AH*conf.AW*sizeof(float));
    float *B = (float *) malloc (conf.BH*conf.BW*sizeof(float));
    float *C = (float *) calloc (conf.CH*conf.CW,sizeof(float));
    host_initialize(A, conf.AH, conf.AW);
    host_initialize(B, conf.BH, conf.BW);
    host_initialize(C, conf.CH, conf.CW);
    size_t total_size = (size_t)(conf.AH*conf.AW*sizeof(float) + conf.BH*conf.BW*sizeof(float) + 2.0*conf.CH*conf.CW*sizeof(float));
    printf("[Mem] Total size of matrices : %.3fGB\n", total_size*1e-9);

    /*** Run matmul ***/
    float* result = host_mat_mul (A, B, C, conf); 

    /*** Test result ***/
    host_test(A, B, C, result, conf);

    /*** Finalize ***/
    free (A);
    free (B);
    free (C);
    free (result);

    return 0;
}



	.file	"tmpxft_0023c69d_00000000-6_sgemm.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4118:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4118:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL44__device_stub__Z5sgemmILi16EEvPKfS1_PfiiiiffPKfS0_Pfiiiiff, @function
_ZL44__device_stub__Z5sgemmILi16EEvPKfS1_PfiiiiffPKfS0_Pfiiiiff:
.LFB4140:
	.cfi_startproc
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movss	%xmm0, 8(%rsp)
	movss	%xmm1, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z5sgemmILi16EEvPKfS1_Pfiiiiff(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4140:
	.size	_ZL44__device_stub__Z5sgemmILi16EEvPKfS1_PfiiiiffPKfS0_Pfiiiiff, .-_ZL44__device_stub__Z5sgemmILi16EEvPKfS1_PfiiiiffPKfS0_Pfiiiiff
	.section	.text._Z5sgemmILi16EEvPKfS1_Pfiiiiff,"axG",@progbits,_Z5sgemmILi16EEvPKfS1_Pfiiiiff,comdat
	.weak	_Z5sgemmILi16EEvPKfS1_Pfiiiiff
	.type	_Z5sgemmILi16EEvPKfS1_Pfiiiiff, @function
_Z5sgemmILi16EEvPKfS1_Pfiiiiff:
.LFB4454:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z5sgemmILi16EEvPKfS1_PfiiiiffPKfS0_Pfiiiiff
	.cfi_endproc
.LFE4454:
	.size	_Z5sgemmILi16EEvPKfS1_Pfiiiiff, .-_Z5sgemmILi16EEvPKfS1_Pfiiiiff
	.section	.rodata._Z10cudaAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA assert: %s %s %d\n"
	.section	.text._Z10cudaAssert9cudaErrorPKcib,"axG",@progbits,_Z10cudaAssert9cudaErrorPKcib,comdat
	.weak	_Z10cudaAssert9cudaErrorPKcib
	.type	_Z10cudaAssert9cudaErrorPKcib, @function
_Z10cudaAssert9cudaErrorPKcib:
.LFB4108:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L14
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L8
	movl	%ebx, %edi
	call	exit@PLT
.L8:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L14:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE4108:
	.size	_Z10cudaAssert9cudaErrorPKcib, .-_Z10cudaAssert9cudaErrorPKcib
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"[Kernel] Run kernal\n"
.LC2:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/jhson989/cuda_study/main/jhBLAS/gemm/sgemm.cu"
.LC6:
	.string	"    Elaped time: %.4f msec\n"
.LC8:
	.string	"    gFlops : %.4f gflops\n"
	.text
	.globl	_Z12host_mat_mulPKfS0_S0_6config
	.type	_Z12host_mat_mulPKfS0_S0_6config, @function
_Z12host_mat_mulPKfS0_S0_6config:
.LFB4111:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	movl	$2, %edi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%rsi, 32(%rsp)
	movl	196(%rsp), %r12d
	leaq	.LC1(%rip), %rsi
	movq	%rdx, 40(%rsp)
	movl	208(%rsp), %ebx
	movl	212(%rsp), %ebp
	movl	204(%rsp), %r14d
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	movl	%ebp, %r15d
	imull	%ebx, %r15d
	call	__printf_chk@PLT
	movslq	192(%rsp), %rax
	movslq	%r12d, %rdx
	imulq	%rdx, %rax
	movslq	%r14d, %rdx
	salq	$2, %rax
	movq	%rax, 8(%rsp)
	movslq	200(%rsp), %rax
	imulq	%rdx, %rax
	movslq	%ebp, %rdx
	salq	$2, %rax
	movq	%rax, 16(%rsp)
	movslq	%ebx, %rax
	imulq	%rdx, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rsi
	leaq	56(%rsp), %rdi
	movq	%rax, 24(%rsp)
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$89, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	movq	16(%rsp), %rsi
	leaq	64(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$90, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	movq	(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$91, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$92, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	movq	16(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movq	64(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$93, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	movq	(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movq	72(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$94, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movl	$1, %ecx
	movl	$95, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	leal	15(%rbp), %eax
	leaq	80(%rsp), %rdi
	movl	$1, 116(%rsp)
	shrl	$4, %eax
	movl	%eax, 108(%rsp)
	leal	15(%rbx), %eax
	shrl	$4, %eax
	movl	%eax, 112(%rsp)
	call	cudaEventCreate@PLT
	movl	$1, %ecx
	movl	$103, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	leaq	88(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$1, %ecx
	movl	$104, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$1, %ecx
	movl	$105, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	movq	108(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	116(%rsp), %esi
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	%rax
	.cfi_def_cfa_offset 200
	movl	%ebx, %ecx
	movl	%r12d, %r9d
	movl	%ebp, %r8d
	pushq	%r14
	.cfi_def_cfa_offset 208
	movq	88(%rsp), %rdx
	movss	236(%rsp), %xmm1
	movq	80(%rsp), %rsi
	movss	232(%rsp), %xmm0
	movq	72(%rsp), %rdi
	call	_ZL44__device_stub__Z5sgemmILi16EEvPKfS1_PfiiiiffPKfS0_Pfiiiiff
	popq	%rdx
	.cfi_def_cfa_offset 200
	popq	%rcx
	.cfi_def_cfa_offset 192
.L18:
	call	cudaDeviceSynchronize@PLT
	movl	$1, %ecx
	movl	$109, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	call	cudaGetLastError@PLT
	movl	$1, %ecx
	movl	$110, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$1, %ecx
	movl	$113, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	movq	88(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movl	$1, %ecx
	movl	$114, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	cvtsi2sdl	%r12d, %xmm0
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rsi
	cvtsi2sdl	%r15d, %xmm1
	leaq	52(%rsp), %rdi
	movl	$0x00000000, 52(%rsp)
	addsd	%xmm0, %xmm0
	addsd	.LC4(%rip), %xmm0
	mulsd	%xmm1, %xmm0
	mulsd	.LC5(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm2
	movd	%xmm2, %ebx
	call	cudaEventElapsedTime@PLT
	movl	$1, %ecx
	movl	$117, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	52(%rsp), %xmm0
	call	__printf_chk@PLT
	movd	%ebx, %xmm3
	movb	$1, %al
	cvtss2sd	52(%rsp), %xmm1
	cvtss2sd	%xmm3, %xmm0
	movl	$2, %edi
	leaq	.LC8(%rip), %rsi
	mulsd	.LC7(%rip), %xmm1
	divsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rdx
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	24(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$121, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movl	$1, %ecx
	movl	$122, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$123, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$124, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$125, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cudaAssert9cudaErrorPKcib
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	movq	24(%rsp), %rax
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4111:
	.size	_Z12host_mat_mulPKfS0_S0_6config, .-_Z12host_mat_mulPKfS0_S0_6config
	.section	.rodata.str1.1
.LC10:
	.string	"\n================================================\n"
.LC11:
	.string	"CUDA implementaion of SGEMM\n"
.LC12:
	.string	"    args: ./matmul [test] [a, b, c, alpha, beta]\n"
.LC13:
	.string	"    C[a, c] = alpha * A[a, b] @ B[b, c] + beta * C[a, c]\n"
.LC14:
	.string	"    C[%d, %d] = %f * A[%d, %d] @ B[%d, %d] + %f * C[%d, %d]\n"
.LC15:
	.string	"================================================\n\n"
	.text
	.globl	_Z17host_get_cmd_argsiPPc
	.type	_Z17host_get_cmd_argsiPPc, @function
_Z17host_get_cmd_argsiPPc:
.LFB4112:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	cmpl	$1, %esi
	jle	.L23
	movq	8(%rdx), %rdi
	movl	%esi, %ebp
	movq	%rdx, %r14
	call	atoi@PLT
	testl	%eax, %eax
	setne	%r15b
	cmpl	$6, %ebp
	jle	.L24
	movq	16(%r14), %rdi
	call	atoi@PLT
	movq	24(%r14), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	movq	32(%r14), %rdi
	movl	%eax, %r13d
	call	atoi@PLT
	movq	40(%r14), %rdi
	movl	%eax, %r12d
	call	atof@PLT
	movq	48(%r14), %rdi
	cvtsd2ss	%xmm0, %xmm2
	movss	%xmm2, 8(%rsp)
	call	atof@PLT
	movss	8(%rsp), %xmm2
	cvtsd2ss	%xmm0, %xmm1
	jmp	.L22
.L23:
	xorl	%r15d, %r15d
.L24:
	movss	.LC9(%rip), %xmm2
	xorps	%xmm1, %xmm1
	movl	$100, %ebp
	movl	$100, %r12d
	movl	$100, %r13d
.L22:
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movl	%ebp, (%rbx)
	movss	%xmm2, 12(%rsp)
	movss	%xmm1, 8(%rsp)
	movss	%xmm2, 24(%rbx)
	movss	%xmm1, 28(%rbx)
	movl	%r13d, 4(%rbx)
	movl	%r13d, 8(%rbx)
	movl	%r12d, 12(%rbx)
	movl	%ebp, 16(%rbx)
	movl	%r12d, 20(%rbx)
	movb	%r15b, 32(%rbx)
	call	__printf_chk@PLT
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movss	12(%rsp), %xmm2
	pushq	%r12
	.cfi_def_cfa_offset 88
	movl	%r13d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 96
	movl	%ebp, %r8d
	movl	%r12d, %ecx
	movl	%ebp, %edx
	pushq	%r12
	.cfi_def_cfa_offset 104
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	movb	$2, %al
	pushq	%r13
	.cfi_def_cfa_offset 112
	movss	40(%rsp), %xmm1
	cvtss2sd	%xmm2, %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC15(%rip), %rsi
	call	__printf_chk@PLT
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4112:
	.size	_Z17host_get_cmd_argsiPPc, .-_Z17host_get_cmd_argsiPPc
	.globl	_Z15host_initializePfii
	.type	_Z15host_initializePfii, @function
_Z15host_initializePfii:
.LFB4113:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L27:
	cmpl	%esi, %r14d
	jge	.L26
	movslq	%r13d, %rax
	xorl	%ebx, %ebx
	leaq	(%r12,%rax,4), %r15
.L30:
	cmpl	%ebx, %ebp
	jle	.L32
	movl	%esi, 12(%rsp)
	call	rand@PLT
	movl	$100, %ecx
	movl	12(%rsp), %esi
	cltd
	idivl	%ecx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%r15,%rbx,4)
	incq	%rbx
	jmp	.L30
.L32:
	incl	%r14d
	addl	%ebp, %r13d
	jmp	.L27
.L26:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4113:
	.size	_Z15host_initializePfii, .-_Z15host_initializePfii
	.section	.rodata.str1.1
.LC16:
	.string	"[TEST] Test skipped..\n"
.LC17:
	.string	"[TEST] Test start..\n"
.LC18:
	.string	"    [ERROR] C[%d][%d] = %.f != %f\n"
.LC19:
	.string	"    Test failed...!\n"
.LC20:
	.string	"    Test passed!!\n"
	.text
	.globl	_Z9host_testPKfS0_S0_S0_6config
	.type	_Z9host_testPKfS0_S0_S0_6config, @function
_Z9host_testPKfS0_S0_S0_6config:
.LFB4114:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	cmpb	$0, 112(%rsp)
	movl	84(%rsp), %r14d
	movl	100(%rsp), %r15d
	jne	.L34
	leaq	.LC16(%rip), %rsi
	jmp	.L45
.L34:
	movq	%rdi, %rbx
	movq	%rsi, %r13
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC17(%rip), %rsi
	movq	%rdx, %r12
	movq	%rcx, %rbp
	call	__printf_chk@PLT
	movl	96(%rsp), %eax
	movslq	92(%rsp), %r8
	xorl	%esi, %esi
	movss	104(%rsp), %xmm2
	movss	108(%rsp), %xmm3
	xorl	%edi, %edi
	xorl	%edx, %edx
	movl	%eax, 4(%rsp)
	salq	$2, %r8
.L35:
	cmpl	%edx, 4(%rsp)
	jle	.L41
	movslq	%edi, %rax
	salq	$2, %rax
	leaq	(%r12,%rax), %r11
	addq	%rbp, %rax
	movq	%rax, 8(%rsp)
	movslq	%esi, %rax
	leaq	(%rbx,%rax,4), %r10
	xorl	%eax, %eax
.L37:
	cmpl	%eax, %r15d
	jle	.L39
	leaq	0(%r13,%rax,4), %r9
	xorl	%ecx, %ecx
	xorps	%xmm1, %xmm1
.L40:
	cmpl	%ecx, %r14d
	jle	.L46
	movss	(%r10,%rcx,4), %xmm0
	mulss	(%r9), %xmm0
	incq	%rcx
	addq	%r8, %r9
	addss	%xmm0, %xmm1
	jmp	.L40
.L46:
	movss	(%r11,%rax,4), %xmm0
	mulss	%xmm2, %xmm1
	movq	8(%rsp), %r9
	leaq	1(%rax), %rcx
	mulss	%xmm3, %xmm0
	addss	%xmm0, %xmm1
	movss	-4(%r9,%rcx,4), %xmm0
	ucomiss	%xmm1, %xmm0
	jp	.L43
	je	.L42
.L43:
	movl	%eax, %ecx
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	leaq	.LC18(%rip), %rsi
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	leaq	.LC19(%rip), %rsi
	jmp	.L45
.L42:
	movq	%rcx, %rax
	jmp	.L37
.L39:
	incl	%edx
	addl	%r15d, %edi
	addl	%r14d, %esi
	jmp	.L35
.L41:
	leaq	.LC20(%rip), %rsi
.L45:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE4114:
	.size	_Z9host_testPKfS0_S0_S0_6config, .-_Z9host_testPKfS0_S0_S0_6config
	.section	.rodata.str1.1
.LC23:
	.string	"[Mem] Total size of matrices : %.3fGB\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4115:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %rdx
	movl	%edi, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	52(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 32(%rsp)
	call	_Z17host_get_cmd_argsiPPc
	xorl	%edi, %edi
	call	srand@PLT
	movl	52(%rsp), %r11d
	movl	56(%rsp), %edx
	movl	%r11d, %ecx
	movl	%r11d, 44(%rsp)
	imull	%edx, %ecx
	movl	%edx, 40(%rsp)
	movslq	%ecx, %rbp
	leaq	0(,%rbp,4), %rdi
	call	malloc@PLT
	movl	60(%rsp), %r12d
	movl	64(%rsp), %r13d
	movq	%rax, 8(%rsp)
	movl	%r12d, %r8d
	imull	%r13d, %r8d
	movslq	%r8d, %rbx
	leaq	0(,%rbx,4), %rdi
	call	malloc@PLT
	movl	68(%rsp), %r15d
	movl	72(%rsp), %r14d
	movl	$4, %esi
	movq	%rax, 16(%rsp)
	movl	%r15d, %edi
	imull	%r14d, %edi
	movslq	%edi, %rdi
	call	calloc@PLT
	movl	40(%rsp), %edx
	movl	44(%rsp), %esi
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	call	_Z15host_initializePfii
	movq	16(%rsp), %rdi
	movl	%r13d, %edx
	movl	%r12d, %esi
	call	_Z15host_initializePfii
	movq	24(%rsp), %rdi
	movl	%r14d, %edx
	movl	%r15d, %esi
	call	_Z15host_initializePfii
	cvtsi2sdl	%r15d, %xmm0
	leaq	0(%rbp,%rbx), %rcx
	cvtsi2sdl	%r14d, %xmm1
	salq	$2, %rcx
	addsd	%xmm0, %xmm0
	mulsd	%xmm1, %xmm0
	mulsd	.LC21(%rip), %xmm0
	js	.L48
	cvtsi2sdq	%rcx, %xmm1
	jmp	.L49
.L48:
	shrq	%rcx
	cvtsi2sdq	%rcx, %xmm1
	addsd	%xmm1, %xmm1
.L49:
	addsd	%xmm1, %xmm0
	movsd	.LC22(%rip), %xmm1
	comisd	%xmm1, %xmm0
	jnb	.L50
	cvttsd2siq	%xmm0, %rax
	jmp	.L51
.L50:
	subsd	%xmm1, %xmm0
	cvttsd2siq	%xmm0, %rax
	btcq	$63, %rax
.L51:
	testq	%rax, %rax
	js	.L52
	cvtsi2sdq	%rax, %xmm0
	jmp	.L53
.L52:
	movq	%rax, %rdx
	andl	$1, %eax
	shrq	%rdx
	orq	%rax, %rdx
	cvtsi2sdq	%rdx, %xmm0
	addsd	%xmm0, %xmm0
.L53:
	mulsd	.LC5(%rip), %xmm0
	leaq	.LC23(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	subq	$48, %rsp
	.cfi_def_cfa_offset 208
	movl	$9, %ecx
	movq	80(%rsp), %rsi
	movq	%rsp, %rdi
	rep movsl
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z12host_mat_mulPKfS0_S0_6config
	leaq	100(%rsp), %rsi
	movq	%rsp, %rdi
	movl	$9, %ecx
	rep movsl
	movq	%rax, %rcx
	movq	%rax, %r13
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z9host_testPKfS0_S0_S0_6config
	movq	56(%rsp), %rdi
	addq	$48, %rsp
	.cfi_def_cfa_offset 160
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L54
	call	__stack_chk_fail@PLT
.L54:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4115:
	.size	main, .-main
	.section	.rodata.str1.1
.LC24:
	.string	"_Z5sgemmILi16EEvPKfS1_Pfiiiiff"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4143:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC24(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z5sgemmILi16EEvPKfS1_Pfiiiiff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4143:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	1073741824
	.align 8
.LC5:
	.long	-400107883
	.long	1041313291
	.align 8
.LC7:
	.long	-755914244
	.long	1062232653
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC9:
	.long	1065353216
	.section	.rodata.cst8
	.align 8
.LC21:
	.long	0
	.long	1074790400
	.align 8
.LC22:
	.long	0
	.long	1138753536
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:



#include <hip/hip_runtime.h>
#include <cstdio>
#include <cstdlib>
#include <random>
#include <sys/time.h>

#define cudaErrChk(ans) { cudaAssert((ans), __FILE__, __LINE__); }
inline void cudaAssert(hipError_t code, const char *file, int line, bool abort=true)
{
   if (code != hipSuccess) 
   {
      fprintf(stderr,"CUDA assert: %s %s %d\n", hipGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}

struct config {
    int AH;
    int AW;
    int BH;
    int BW;
    int CH;
    int CW;
    float alpha;
    float beta;
    bool do_test;
};


/***************************************
  * Device code "matmul"
  **************************************/

template <int BLOCK_SIZE> 
__global__ void sgemm (const float* A, const float* B, float* C, const int CH, const int CW, const int AW, const int BW, const float alpha, const float beta) {

    int y = blockIdx.y*blockDim.y + threadIdx.y;
    int x = blockIdx.x*blockDim.x + threadIdx.x;
    int sy = threadIdx.y;
    int sx = threadIdx.x;

    __shared__ float sA[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ float sB[BLOCK_SIZE][BLOCK_SIZE];
    int num_tiles = (AW+(BLOCK_SIZE-1))/BLOCK_SIZE;

    float sum=0.0f;
    for (int t=0; t<num_tiles; t++) {
        if (y<CH && (sx+t*BLOCK_SIZE)<AW) {
            sA[sy][sx] = A[y*AW+(sx+t*BLOCK_SIZE)];
        } else {
            sA[sy][sx] = 0.0f;
        }

        if (x<CW && (sy+t*BLOCK_SIZE)<AW) {
            sB[sy][sx] = B[(sy+t*BLOCK_SIZE)*BW+x];
        } else {
            sB[sy][sx] = 0.0f;
        }
        __syncthreads();

        #pragma unroll
        for (int k=0; k<BLOCK_SIZE; k++) {
            sum += sA[sy][k]*sB[k][sx];
        }
        __syncthreads();
    }

    if (x<CW && y<CH) {
        C[y*CW+x] = alpha*sum + beta*C[y*CW+x];
    }

}


/***************************************
  * Host code "matmul"
  **************************************/
float* host_mat_mul(const float* A, const float* B, const float* C, const struct config conf) {

    printf("[Kernel] Run kernal\n");
    /*** Initialize device memory ***/
    const int num_executions = 1;
    const int block_size = 16;
    size_t size_A = sizeof(float)*conf.AH*conf.AW;
    size_t size_B = sizeof(float)*conf.BH*conf.BW;
    size_t size_C = sizeof(float)*conf.CH*conf.CW;
    float *d_A, *d_B, *d_C;
    float *result = (float *) malloc (conf.CH*conf.CW*sizeof(float));
    cudaErrChk (hipMalloc ((void**)(&d_A), size_A));
    cudaErrChk (hipMalloc ((void**)(&d_B), size_B));
    cudaErrChk (hipMalloc ((void**)(&d_C), size_C));
    cudaErrChk (hipMemcpy (d_A, A, size_A, hipMemcpyHostToDevice));
    cudaErrChk (hipMemcpy (d_B, B, size_B, hipMemcpyHostToDevice));
    cudaErrChk (hipMemcpy (d_C, C, size_C, hipMemcpyHostToDevice));
    cudaErrChk (hipDeviceSynchronize ())

    /*** Setup execution config ***/
    dim3 threads(block_size, block_size);
    dim3 blocks((conf.CW+threads.x-1)/threads.x, (conf.CH+threads.y-1)/threads.y);

    /*** Run CUDA kernel ***/
    hipEvent_t start, stop;
    cudaErrChk(hipEventCreate(&start));
    cudaErrChk(hipEventCreate(&stop));
    cudaErrChk(hipEventRecord(start, NULL));
    // Main body
    for (int i=0; i<num_executions; i++) {
        sgemm<block_size><<<blocks, threads>>>(d_A, d_B, d_C, conf.CH, conf.CW, conf.AW, conf.BW, conf.alpha, conf.beta);
        cudaErrChk (hipDeviceSynchronize ())
        cudaErrChk( hipGetLastError() );
    }
    // End of main body
    cudaErrChk(hipEventRecord(stop, NULL));
    cudaErrChk(hipEventSynchronize(stop));
    float msec_total = 0.0f;
    float gflo = num_executions*conf.CH*conf.CW*(2.0*conf.AW+2)*1e-9;
    cudaErrChk(hipEventElapsedTime(&msec_total, start, stop));
    printf("    Elaped time: %.4f msec\n", msec_total);
    printf("    gFlops : %.4f gflops\n", gflo/(msec_total*1e-3));

    cudaErrChk (hipMemcpy(result, d_C, size_C, hipMemcpyDeviceToHost));
    cudaErrChk (hipDeviceSynchronize ())
    cudaErrChk (hipFree (d_A));
    cudaErrChk (hipFree (d_B));
    cudaErrChk (hipFree (d_C));

    return result;
}



/****************************************
  * Helper functions for host
  ****************************************/

const struct config host_get_cmd_args(int argc, char** argv) {

    int a=100, b=100, c=100;
    float alpha=1.0f, beta=0.0f;
    bool do_test = false;

    if (argc >= 2)
        do_test = (bool)atoi(argv[1]);
    if (argc >= 7) {
        a = atoi(argv[2]);
        b = atoi(argv[3]);
        c = atoi(argv[4]);
        alpha = atof(argv[5]);
        beta = atof(argv[6]);
    }

    struct config conf = {
        a,
        b,
        b,
        c,
        a,
        c,
        alpha,
        beta,
        do_test
    };
    printf("\n================================================\n");
    printf("CUDA implementaion of SGEMM\n");
    printf("    args: ./matmul [test] [a, b, c, alpha, beta]\n");
    printf("    C[a, c] = alpha * A[a, b] @ B[b, c] + beta * C[a, c]\n");
    printf("    C[%d, %d] = %f * A[%d, %d] @ B[%d, %d] + %f * C[%d, %d]\n", a,c,alpha,a,b,b,c,beta,a,c);
    printf("================================================\n\n");
    return conf;
}


void host_initialize(float *mem, const int H, const int W) {
    for (int i=0; i<H; i++) {
        for (int j=0; j<W; j++) {
            mem[i*W+j] = (float)(rand()%100);
        }
    }
}

void host_test(const float *A, const float *B, const float *C, const float * result, const struct config conf) {

    if (conf.do_test == false) {
        printf("[TEST] Test skipped..\n");
        return;
    }

    printf("[TEST] Test start..\n");

    float alpha=conf.alpha, beta=conf.beta;
    int len_k = conf.AW;
    for (int i=0; i<conf.CH; i++) {
        for (int j=0; j<conf.CW; j++) {
            float sum = 0;
            for (int k=0; k<len_k; k++) {
                sum += A[i*conf.AW+k]*B[k*conf.BW+j];
            }
            sum = alpha*sum+beta*C[i*conf.CW+j];
            if (sum != result[i*conf.CW+j]){
                printf("    [ERROR] C[%d][%d] = %.f != %f\n", i, j, result[i*conf.CW+j], sum);
                printf("    Test failed...!\n");
                return;
            }
        }
    }
    printf("    Test passed!!\n");
    return;
}


/***************************************
  * Main function
  **************************************/
int main(int argc, char** argv) {

    /*** Program configuration ***/
    const struct config conf = host_get_cmd_args(argc, argv);
    srand(0);

    /*** Initialize Data ***/
    float *A = (float *) malloc (conf.AH*conf.AW*sizeof(float));
    float *B = (float *) malloc (conf.BH*conf.BW*sizeof(float));
    float *C = (float *) calloc (conf.CH*conf.CW,sizeof(float));
    host_initialize(A, conf.AH, conf.AW);
    host_initialize(B, conf.BH, conf.BW);
    host_initialize(C, conf.CH, conf.CW);
    size_t total_size = (size_t)(conf.AH*conf.AW*sizeof(float) + conf.BH*conf.BW*sizeof(float) + 2.0*conf.CH*conf.CW*sizeof(float));
    printf("[Mem] Total size of matrices : %.3fGB\n", total_size*1e-9);

    /*** Run matmul ***/
    float* result = host_mat_mul (A, B, C, conf); 

    /*** Test result ***/
    host_test(A, B, C, result, conf);

    /*** Finalize ***/
    free (A);
    free (B);
    free (C);
    free (result);

    return 0;
}



	.text
	.file	"sgemm.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z12host_mat_mulPKfS0_S0_6config
.LCPI0_0:
	.quad	0x4000000000000000              # double 2
.LCPI0_1:
	.quad	0x3e112e0be826d695              # double 1.0000000000000001E-9
.LCPI0_2:
	.quad	0x3f50624dd2f1a9fc              # double 0.001
	.text
	.globl	_Z12host_mat_mulPKfS0_S0_6config
	.type	_Z12host_mat_mulPKfS0_S0_6config,@function
_Z12host_mat_mulPKfS0_S0_6config:       # @_Z12host_mat_mulPKfS0_S0_6config
	.cfi_startproc
# %bb.0:                                # %.critedge
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, 88(%rsp)                  # 8-byte Spill
	movq	%rsi, 96(%rsp)                  # 8-byte Spill
	movq	%rdi, 104(%rsp)                 # 8-byte Spill
	movl	$.Lstr, %edi
	callq	puts@PLT
	movslq	176(%rsp), %rbx
	movslq	180(%rsp), %r12
	imulq	%r12, %rbx
	shlq	$2, %rbx
	movslq	184(%rsp), %r14
	movslq	188(%rsp), %r13
	movslq	192(%rsp), %rax
	movslq	196(%rsp), %rcx
	movq	%rcx, 112(%rsp)                 # 8-byte Spill
	movl	%ecx, %ebp
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	imull	%eax, %ebp
	movslq	%ebp, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB0_1
# %bb.3:                                # %_Z10cudaAssert10hipError_tPKcib.exit
	movl	%ebp, 60(%rsp)                  # 4-byte Spill
	movq	%r13, 80(%rsp)                  # 8-byte Spill
	imulq	%r13, %r14
	shlq	$2, %r14
	leaq	40(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB0_4
# %bb.5:                                # %_Z10cudaAssert10hipError_tPKcib.exit21
	movq	16(%rsp), %r15                  # 8-byte Reload
	movq	112(%rsp), %r13                 # 8-byte Reload
	imulq	%r13, %r15
	shlq	$2, %r15
	leaq	24(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB0_44
# %bb.6:                                # %_Z10cudaAssert10hipError_tPKcib.exit23
	movq	48(%rsp), %rdi
	movq	104(%rsp), %rsi                 # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_7
# %bb.9:                                # %_Z10cudaAssert10hipError_tPKcib.exit25
	movq	40(%rsp), %rdi
	movq	96(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_10
# %bb.11:                               # %_Z10cudaAssert10hipError_tPKcib.exit27
	movq	24(%rsp), %rdi
	movq	88(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	movq	80(%rsp), %r14                  # 8-byte Reload
	jne	.LBB0_12
# %bb.13:                               # %_Z10cudaAssert10hipError_tPKcib.exit29
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB0_14
# %bb.15:                               # %_Z10cudaAssert10hipError_tPKcib.exit31
	leaq	64(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB0_16
# %bb.17:                               # %_Z10cudaAssert10hipError_tPKcib.exit33
	leaq	32(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB0_18
# %bb.19:                               # %_Z10cudaAssert10hipError_tPKcib.exit35
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB0_20
# %bb.21:                               # %_Z10cudaAssert10hipError_tPKcib.exit37
	leal	15(%r13), %eax
	shrl	$4, %eax
	movq	16(%rsp), %rbx                  # 8-byte Reload
	leal	15(%rbx), %edi
	shrl	$4, %edi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_23
# %bb.22:
	leaq	176(%rsp), %rax
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdx
	movss	24(%rax), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	28(%rax), %xmm1                 # xmm1 = mem[0],zero,zero,zero
	movl	%r14d, (%rsp)
	movl	%ebx, %ecx
	movl	%r13d, %r8d
	movl	%r12d, %r9d
	callq	_Z20__device_stub__sgemmILi16EEvPKfS1_Pfiiiiff
.LBB0_23:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB0_24
# %bb.25:                               # %_Z10cudaAssert10hipError_tPKcib.exit39
	callq	hipGetLastError
	testl	%eax, %eax
	movq	72(%rsp), %r14                  # 8-byte Reload
	jne	.LBB0_26
# %bb.27:                               # %_Z10cudaAssert10hipError_tPKcib.exit41
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB0_28
# %bb.29:                               # %_Z10cudaAssert10hipError_tPKcib.exit43
	movq	32(%rsp), %rdi
	callq	hipEventSynchronize
	testl	%eax, %eax
	jne	.LBB0_30
# %bb.31:                               # %_Z10cudaAssert10hipError_tPKcib.exit45
	leaq	12(%rsp), %rdi
	movl	$0, (%rdi)
	movq	64(%rsp), %rsi
	movq	32(%rsp), %rdx
	callq	hipEventElapsedTime
	testl	%eax, %eax
	jne	.LBB0_32
# %bb.33:                               # %_Z10cudaAssert10hipError_tPKcib.exit47
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r12d, %xmm0
	addsd	%xmm0, %xmm0
	addsd	.LCPI0_0(%rip), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdl	60(%rsp), %xmm1         # 4-byte Folded Reload
	mulsd	%xmm0, %xmm1
	mulsd	.LCPI0_1(%rip), %xmm1
	xorps	%xmm0, %xmm0
	cvtsd2ss	%xmm1, %xmm0
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm1, %xmm1
	cvtss2sd	12(%rsp), %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	16(%rsp), %xmm0                 # 4-byte Folded Reload
	mulsd	.LCPI0_2(%rip), %xmm1
	divsd	%xmm1, %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rsi
	movq	%r14, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_34
# %bb.35:                               # %_Z10cudaAssert10hipError_tPKcib.exit49
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB0_36
# %bb.37:                               # %_Z10cudaAssert10hipError_tPKcib.exit51
	movq	48(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB0_38
# %bb.39:                               # %_Z10cudaAssert10hipError_tPKcib.exit53
	movq	40(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB0_40
# %bb.41:                               # %_Z10cudaAssert10hipError_tPKcib.exit55
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB0_42
# %bb.43:                               # %_Z10cudaAssert10hipError_tPKcib.exit57
	movq	%r14, %rax
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_1:
	.cfi_def_cfa_offset 176
	movl	%eax, %r15d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$91, %r8d
	jmp	.LBB0_2
.LBB0_4:
	movl	%eax, %r15d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$92, %r8d
.LBB0_2:
	xorl	%eax, %eax
	callq	fprintf
	movl	%r15d, %edi
	callq	exit
.LBB0_44:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$93, %r8d
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB0_7:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$94, %r8d
	jmp	.LBB0_8
.LBB0_10:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$95, %r8d
	jmp	.LBB0_8
.LBB0_12:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$96, %r8d
	jmp	.LBB0_8
.LBB0_14:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$97, %r8d
	jmp	.LBB0_8
.LBB0_16:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$105, %r8d
	jmp	.LBB0_8
.LBB0_18:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$106, %r8d
	jmp	.LBB0_8
.LBB0_20:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$107, %r8d
	jmp	.LBB0_8
.LBB0_24:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$111, %r8d
	jmp	.LBB0_8
.LBB0_26:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$112, %r8d
	jmp	.LBB0_8
.LBB0_28:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$115, %r8d
	jmp	.LBB0_8
.LBB0_30:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$116, %r8d
	jmp	.LBB0_8
.LBB0_32:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$119, %r8d
	jmp	.LBB0_8
.LBB0_34:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$123, %r8d
	jmp	.LBB0_8
.LBB0_36:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$124, %r8d
	jmp	.LBB0_8
.LBB0_38:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$125, %r8d
	jmp	.LBB0_8
.LBB0_40:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$126, %r8d
	jmp	.LBB0_8
.LBB0_42:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$127, %r8d
.LBB0_8:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z12host_mat_mulPKfS0_S0_6config, .Lfunc_end0-_Z12host_mat_mulPKfS0_S0_6config
	.cfi_endproc
                                        # -- End function
	.section	.text._Z20__device_stub__sgemmILi16EEvPKfS1_Pfiiiiff,"axG",@progbits,_Z20__device_stub__sgemmILi16EEvPKfS1_Pfiiiiff,comdat
	.weak	_Z20__device_stub__sgemmILi16EEvPKfS1_Pfiiiiff # -- Begin function _Z20__device_stub__sgemmILi16EEvPKfS1_Pfiiiiff
	.type	_Z20__device_stub__sgemmILi16EEvPKfS1_Pfiiiiff,@function
_Z20__device_stub__sgemmILi16EEvPKfS1_Pfiiiiff: # @_Z20__device_stub__sgemmILi16EEvPKfS1_Pfiiiiff
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	8(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	4(%rsp), %r10
	movss	%xmm1, (%r10)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	movq	%r9, 56(%rbx)
	movq	%r10, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5sgemmILi16EEvPKfS1_Pfiiiiff, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z20__device_stub__sgemmILi16EEvPKfS1_Pfiiiiff, .Lfunc_end1-_Z20__device_stub__sgemmILi16EEvPKfS1_Pfiiiiff
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z17host_get_cmd_argsiPPc
.LCPI2_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	_Z17host_get_cmd_argsiPPc
	.type	_Z17host_get_cmd_argsiPPc,@function
_Z17host_get_cmd_argsiPPc:              # @_Z17host_get_cmd_argsiPPc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	xorps	%xmm1, %xmm1
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rsp)                   # 4-byte Spill
	movl	$100, %r14d
	cmpl	$2, %esi
	jl	.LBB2_1
# %bb.2:
	movq	%rdx, %r12
	movl	%esi, %ebp
	movq	8(%rdx), %rdi
	callq	atoi
	testl	%eax, %eax
	setne	%r13b
	cmpl	$7, %ebp
	jb	.LBB2_3
# %bb.4:
	movq	16(%r12), %rdi
	callq	atoi
	movl	%eax, %r14d
	movq	24(%r12), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	32(%r12), %rdi
	callq	atoi
	movl	%eax, %r15d
	movq	40(%r12), %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rsp)                   # 4-byte Spill
	movq	48(%r12), %rdi
	callq	atof
	xorps	%xmm1, %xmm1
	cvtsd2ss	%xmm0, %xmm1
	jmp	.LBB2_5
.LBB2_1:
	xorl	%r13d, %r13d
	movl	$100, %ebp
	movl	$100, %r15d
	jmp	.LBB2_5
.LBB2_3:
	movl	$100, %ebp
	movl	$100, %r15d
	xorps	%xmm1, %xmm1
.LBB2_5:                                # %.thread
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	movl	%r14d, (%rbx)
	movl	%ebp, 4(%rbx)
	movl	%ebp, 8(%rbx)
	movl	%r15d, 12(%rbx)
	movl	%r14d, 16(%rbx)
	movl	%r15d, 20(%rbx)
	movss	(%rsp), %xmm0                   # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 24(%rbx)
	movss	%xmm1, 28(%rbx)
	movb	%r13b, 32(%rbx)
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsp), %xmm0                   # 4-byte Folded Reload
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%rsp), %xmm1                  # 4-byte Folded Reload
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$.L.str.8, %edi
	movl	%r14d, %esi
	movl	%r15d, %edx
	movl	%r14d, %ecx
	movl	%ebp, %r8d
	movl	%ebp, %r9d
	movb	$2, %al
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	callq	printf
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movq	%rbx, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z17host_get_cmd_argsiPPc, .Lfunc_end2-_Z17host_get_cmd_argsiPPc
	.cfi_endproc
                                        # -- End function
	.globl	_Z15host_initializePfii         # -- Begin function _Z15host_initializePfii
	.type	_Z15host_initializePfii,@function
_Z15host_initializePfii:                # @_Z15host_initializePfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB3_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %ebx
	movl	%esi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%edx, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB3_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%r15d, %r15d
.LBB3_4:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r14,%r15,4)
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB3_4
.LBB3_5:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%rbp
	addl	%ebx, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB3_2
.LBB3_6:                                # %._crit_edge13
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z15host_initializePfii, .Lfunc_end3-_Z15host_initializePfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9host_testPKfS0_S0_S0_6config # -- Begin function _Z9host_testPKfS0_S0_S0_6config
	.type	_Z9host_testPKfS0_S0_S0_6config,@function
_Z9host_testPKfS0_S0_S0_6config:        # @_Z9host_testPKfS0_S0_S0_6config
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	cmpb	$0, 112(%rsp)
	je	.LBB4_1
# %bb.2:
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rdi, %r12
	leaq	80(%rsp), %r15
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	movl	16(%r15), %eax
	movl	$.Lstr.8, %edi
	testl	%eax, %eax
	jle	.LBB4_13
# %bb.3:                                # %.preheader48.lr.ph
	movss	24(%r15), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	28(%r15), %xmm1                 # xmm1 = mem[0],zero,zero,zero
	movl	4(%r15), %ecx
	movl	20(%r15), %r8d
	movslq	12(%r15), %r9
	movslq	%ecx, %r10
	movslq	%r8d, %rdx
	movq	%rdx, 8(%rsp)                   # 8-byte Spill
	shlq	$2, %r10
	shlq	$2, %r9
	xorl	%esi, %esi
.LBB4_4:                                # %.preheader48
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_6 Depth 2
                                        #       Child Loop BB4_10 Depth 3
	testl	%r8d, %r8d
	jle	.LBB4_12
# %bb.5:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB4_4 Depth=1
	movq	%rsi, %r13
	imulq	8(%rsp), %r13                   # 8-byte Folded Reload
	movq	16(%rsp), %r15                  # 8-byte Reload
	xorl	%edx, %edx
.LBB4_6:                                # %.preheader
                                        #   Parent Loop BB4_4 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_10 Depth 3
	xorps	%xmm2, %xmm2
	testl	%ecx, %ecx
	jle	.LBB4_7
# %bb.9:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB4_6 Depth=2
	movq	%r15, %rbp
	xorl	%r11d, %r11d
.LBB4_10:                               # %.lr.ph
                                        #   Parent Loop BB4_4 Depth=1
                                        #     Parent Loop BB4_6 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r12,%r11,4), %xmm3            # xmm3 = mem[0],zero,zero,zero
	mulss	(%rbp), %xmm3
	addss	%xmm3, %xmm2
	incq	%r11
	addq	%r9, %rbp
	cmpq	%r11, %rcx
	jne	.LBB4_10
.LBB4_7:                                # %._crit_edge
                                        #   in Loop: Header=BB4_6 Depth=2
	mulss	%xmm0, %xmm2
	leaq	(%rdx,%r13), %r11
	movss	(%r14,%r11,4), %xmm3            # xmm3 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm3
	addss	%xmm2, %xmm3
	movss	(%rbx,%r11,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	ucomiss	%xmm2, %xmm3
	jne	.LBB4_8
	jp	.LBB4_8
# %bb.11:                               # %.critedge
                                        #   in Loop: Header=BB4_6 Depth=2
	incq	%rdx
	addq	$4, %r15
	cmpq	%r8, %rdx
	jne	.LBB4_6
.LBB4_12:                               # %.critedge45
                                        #   in Loop: Header=BB4_4 Depth=1
	incq	%rsi
	addq	%r10, %r12
	cmpq	%rax, %rsi
	jne	.LBB4_4
	jmp	.LBB4_13
.LBB4_1:
	movl	$.Lstr.9, %edi
	jmp	.LBB4_13
.LBB4_8:
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	%xmm3, %xmm1
	movl	$.L.str.12, %edi
                                        # kill: def $esi killed $esi killed $rsi
                                        # kill: def $edx killed $edx killed $rdx
	movb	$2, %al
	callq	printf
	movl	$.Lstr.7, %edi
.LBB4_13:                               # %.critedge47
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end4:
	.size	_Z9host_testPKfS0_S0_S0_6config, .Lfunc_end4-_Z9host_testPKfS0_S0_S0_6config
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI5_0:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI5_1:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI5_2:
	.quad	0x4010000000000000              # double 4
.LCPI5_3:
	.quad	0x43e0000000000000              # double 9.2233720368547758E+18
.LCPI5_4:
	.quad	0x3e112e0be826d695              # double 1.0000000000000001E-9
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rdx
	movl	%edi, %esi
	leaq	64(%rsp), %r14
	movq	%r14, %rdi
	callq	_Z17host_get_cmd_argsiPPc
	xorl	%edi, %edi
	callq	srand
	movl	(%r14), %ecx
	movl	%ecx, 48(%rsp)                  # 4-byte Spill
	movl	4(%r14), %eax
	movl	%eax, 52(%rsp)                  # 4-byte Spill
	imull	%ecx, %eax
	cltq
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	leaq	(,%rax,4), %rdi
	callq	malloc
	movq	%rax, %r15
	movl	8(%r14), %ecx
	movl	%ecx, 40(%rsp)                  # 4-byte Spill
	movl	12(%r14), %eax
	movl	%eax, 44(%rsp)                  # 4-byte Spill
	movq	%r14, %r13
	imull	%ecx, %eax
	movslq	%eax, %r14
	leaq	(,%r14,4), %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r13, %rax
	movl	16(%r13), %r13d
	movl	20(%rax), %ebp
	movl	%ebp, %eax
	imull	%r13d, %eax
	movslq	%eax, %rdi
	movl	$4, %esi
	callq	calloc
	movq	%rax, %rbx
	movq	%r15, %rdi
	movl	48(%rsp), %esi                  # 4-byte Reload
	movl	52(%rsp), %edx                  # 4-byte Reload
	callq	_Z15host_initializePfii
	movq	%r12, %rdi
	movl	40(%rsp), %esi                  # 4-byte Reload
	movl	44(%rsp), %edx                  # 4-byte Reload
	callq	_Z15host_initializePfii
	movq	%rbx, %rdi
	movl	%r13d, %esi
	movl	%ebp, %edx
	callq	_Z15host_initializePfii
	addq	56(%rsp), %r14                  # 8-byte Folded Reload
	shlq	$2, %r14
	movq	%r14, %xmm2
	movdqa	.LCPI5_0(%rip), %xmm0           # xmm0 = [1127219200,1160773632,0,0]
	punpckldq	%xmm0, %xmm2            # xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
	movapd	.LCPI5_1(%rip), %xmm1           # xmm1 = [4.503599627370496E+15,1.9342813113834067E+25]
	subpd	%xmm1, %xmm2
	cvtsi2sd	%r13d, %xmm3
	addsd	%xmm3, %xmm3
	cvtsi2sd	%ebp, %xmm4
	mulsd	%xmm3, %xmm4
	movapd	%xmm2, %xmm3
	unpckhpd	%xmm2, %xmm3                    # xmm3 = xmm3[1],xmm2[1]
	mulsd	.LCPI5_2(%rip), %xmm4
	addsd	%xmm2, %xmm3
	addsd	%xmm3, %xmm4
	cvttsd2si	%xmm4, %rax
	movq	%rax, %rcx
	sarq	$63, %rcx
	subsd	.LCPI5_3(%rip), %xmm4
	cvttsd2si	%xmm4, %rdx
	andq	%rcx, %rdx
	orq	%rax, %rdx
	movq	%rdx, %xmm2
	punpckldq	%xmm0, %xmm2            # xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
	subpd	%xmm1, %xmm2
	movapd	%xmm2, %xmm0
	unpckhpd	%xmm2, %xmm0                    # xmm0 = xmm0[1],xmm2[1]
	addsd	%xmm2, %xmm0
	mulsd	.LCPI5_4(%rip), %xmm0
	movl	$.L.str.15, %edi
	movb	$1, %al
	callq	printf
	leaq	64(%rsp), %r14
	movl	32(%r14), %eax
	movl	%eax, 32(%rsp)
	movups	(%r14), %xmm0
	movups	16(%r14), %xmm1
	movups	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	movq	%r15, %rdi
	movq	%r12, %rsi
	movq	%rbx, %r13
	movq	%rbx, %rdx
	callq	_Z12host_mat_mulPKfS0_S0_6config
	movq	%rax, %rbx
	movl	32(%r14), %eax
	movl	%eax, 32(%rsp)
	movups	(%r14), %xmm0
	movups	16(%r14), %xmm1
	movups	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	movq	%r15, %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movq	%rbx, %rcx
	callq	_Z9host_testPKfS0_S0_S0_6config
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5sgemmILi16EEvPKfS1_Pfiiiiff, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/jhson989/cuda_study/main/jhBLAS/gemm/sgemm.hip"
	.size	.L.str.1, 109

	.type	_Z5sgemmILi16EEvPKfS1_Pfiiiiff,@object # @_Z5sgemmILi16EEvPKfS1_Pfiiiiff
	.section	.rodata._Z5sgemmILi16EEvPKfS1_Pfiiiiff,"aG",@progbits,_Z5sgemmILi16EEvPKfS1_Pfiiiiff,comdat
	.weak	_Z5sgemmILi16EEvPKfS1_Pfiiiiff
	.p2align	3, 0x0
_Z5sgemmILi16EEvPKfS1_Pfiiiiff:
	.quad	_Z20__device_stub__sgemmILi16EEvPKfS1_Pfiiiiff
	.size	_Z5sgemmILi16EEvPKfS1_Pfiiiiff, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"    Elaped time: %.4f msec\n"
	.size	.L.str.2, 28

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"    gFlops : %.4f gflops\n"
	.size	.L.str.3, 26

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"    C[%d, %d] = %f * A[%d, %d] @ B[%d, %d] + %f * C[%d, %d]\n"
	.size	.L.str.8, 61

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"    [ERROR] C[%d][%d] = %.f != %f\n"
	.size	.L.str.12, 35

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"[Mem] Total size of matrices : %.3fGB\n"
	.size	.L.str.15, 39

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"CUDA assert: %s %s %d\n"
	.size	.L.str.16, 23

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z5sgemmILi16EEvPKfS1_Pfiiiiff"
	.size	.L__unnamed_1, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"[Kernel] Run kernal"
	.size	.Lstr, 20

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\n================================================"
	.size	.Lstr.1, 50

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"CUDA implementaion of SGEMM"
	.size	.Lstr.2, 28

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"    args: ./matmul [test] [a, b, c, alpha, beta]"
	.size	.Lstr.3, 49

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"    C[a, c] = alpha * A[a, b] @ B[b, c] + beta * C[a, c]"
	.size	.Lstr.4, 57

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"================================================\n"
	.size	.Lstr.5, 50

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"[TEST] Test start.."
	.size	.Lstr.6, 20

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"    Test failed...!"
	.size	.Lstr.7, 20

	.type	.Lstr.8,@object                 # @str.8
.Lstr.8:
	.asciz	"    Test passed!!"
	.size	.Lstr.8, 18

	.type	.Lstr.9,@object                 # @str.9
.Lstr.9:
	.asciz	"[TEST] Test skipped.."
	.size	.Lstr.9, 22

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__sgemmILi16EEvPKfS1_Pfiiiiff
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z5sgemmILi16EEvPKfS1_Pfiiiiff
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z5sgemmILi16EEvPKfS1_Pfiiiiff,"axG",@progbits,_Z5sgemmILi16EEvPKfS1_Pfiiiiff,comdat
	.protected	_Z5sgemmILi16EEvPKfS1_Pfiiiiff ; -- Begin function _Z5sgemmILi16EEvPKfS1_Pfiiiiff
	.globl	_Z5sgemmILi16EEvPKfS1_Pfiiiiff
	.p2align	8
	.type	_Z5sgemmILi16EEvPKfS1_Pfiiiiff,@function
_Z5sgemmILi16EEvPKfS1_Pfiiiiff:         ; @_Z5sgemmILi16EEvPKfS1_Pfiiiiff
; %bb.0:
	s_clause 0x4
	s_load_b32 s16, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x10
	s_load_b64 s[2:3], s[0:1], 0x28
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v5, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s16, 16
	s_and_b32 s1, s16, 0xffff
	v_mad_u64_u32 v[0:1], null, s15, s0, v[2:3]
	s_mul_i32 s14, s14, s1
	s_cmp_lt_i32 s6, 1
	v_add_nc_u32_e32 v1, s14, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s0, s5, v1
	s_cbranch_scc1 .LBB0_11
; %bb.1:                                ; %.lr.ph
	v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v3, 2, v5
	v_mul_lo_u32 v4, v2, s7
	v_lshlrev_b32_e32 v7, 6, v2
	v_mul_lo_u32 v9, v0, s6
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v8, 0x400, v3
	s_add_i32 s1, s6, 15
	s_lshl_b32 s7, s7, 4
	v_add_nc_u32_e32 v10, v7, v3
	v_add3_u32 v3, v5, v4, s14
	v_add_nc_u32_e32 v11, v8, v7
	s_lshr_b32 s14, s1, 4
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s15, vcc_lo
	s_cbranch_execz .LBB0_6
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v4, 0
	s_mov_b32 s16, exec_lo
	v_cmpx_gt_i32_e64 s6, v5
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v12, v9, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v12, s1, s8, v12
	v_add_co_ci_u32_e64 v13, s1, s9, v13, s1
	global_load_b32 v4, v[12:13], off
.LBB0_5:                                ; %Flow136
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s15
	v_mov_b32_e32 v12, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v4
	s_and_saveexec_b32 s15, s0
	s_cbranch_execz .LBB0_10
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v12, 0
	s_mov_b32 s16, exec_lo
	v_cmpx_gt_i32_e64 s6, v2
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[3:4]
	v_add_co_u32 v12, s1, s10, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s1, s11, v13, s1
	global_load_b32 v12, v[12:13], off
.LBB0_9:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
.LBB0_10:                               ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s15
	s_waitcnt vmcnt(0)
	ds_store_b32 v11, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[20:21], v8 offset1:16
	ds_load_b128 v[12:15], v7
	ds_load_2addr_b32 v[22:23], v8 offset0:32 offset1:48
	ds_load_b128 v[16:19], v7 offset:16
	ds_load_2addr_b32 v[24:25], v8 offset0:64 offset1:80
	v_add_nc_u32_e32 v2, 16, v2
	s_add_i32 s14, s14, -1
	v_add_nc_u32_e32 v5, 16, v5
	s_cmp_eq_u32 s14, 0
	s_waitcnt lgkmcnt(3)
	v_dual_fmac_f32 v6, v12, v20 :: v_dual_add_nc_u32 v3, s7, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v13, v21
	ds_load_2addr_b32 v[20:21], v8 offset0:96 offset1:112
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v14, v22
	v_fmac_f32_e32 v6, v15, v23
	ds_load_2addr_b32 v[22:23], v8 offset0:128 offset1:144
	ds_load_b128 v[12:15], v7 offset:32
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v16, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v17, v25
	ds_load_2addr_b32 v[24:25], v8 offset0:160 offset1:176
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v18, v20
	v_fmac_f32_e32 v6, v19, v21
	ds_load_b128 v[16:19], v7 offset:48
	ds_load_2addr_b32 v[20:21], v8 offset0:192 offset1:208
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v12, v22
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v13, v23
	ds_load_2addr_b32 v[12:13], v8 offset0:224 offset1:240
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_fmac_f32_e32 v6, v14, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v15, v25
	v_fmac_f32_e32 v6, v16, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v17, v21
	v_fmac_f32_e32 v6, v18, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v19, v13
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_12
.LBB0_11:
	v_mov_b32_e32 v6, 0
.LBB0_12:                               ; %Flow138
	v_cmp_gt_i32_e32 vcc_lo, s5, v1
	v_cmp_gt_i32_e64 s0, s4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, vcc_lo
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_14
; %bb.13:
	v_mad_u64_u32 v[2:3], null, v0, s5, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v2, s3, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v2, s2, v6
	global_store_b32 v[0:1], v2, off
.LBB0_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5sgemmILi16EEvPKfS1_Pfiiiiff
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z5sgemmILi16EEvPKfS1_Pfiiiiff,"axG",@progbits,_Z5sgemmILi16EEvPKfS1_Pfiiiiff,comdat
.Lfunc_end0:
	.size	_Z5sgemmILi16EEvPKfS1_Pfiiiiff, .Lfunc_end0-_Z5sgemmILi16EEvPKfS1_Pfiiiiff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 768
; NumSgprs: 19
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5sgemmILi16EEvPKfS1_Pfiiiiff
    .private_segment_fixed_size: 0
    .sgpr_count:     19
    .sgpr_spill_count: 0
    .symbol:         _Z5sgemmILi16EEvPKfS1_Pfiiiiff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     26
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
