//scalarvectorN.cu
#include <stdio.h>
#include <cuda.h>
#include <stdlib.h>
#include <math.h>
#include <sys/time.h>
#include <string.h>
//#include <omp.h>


#define SEED 1

double getclock();
void checkCUDAError(const char *);
__global__ void sVPN(float *vector, float* scalar, int* vlength, int *N);
__global__ void sVPNo(float *vector, float* scalar, int* vlength, int *N);






int main(int argc, char** argv){

        printf("\n\nARGC value: %d\n",argc);
        int N = atoi(argv[1]);
	int len = atoi(argv[2]);
	int tpb = atoi(argv[3]);
	if(argc<5){
	  srand(SEED);
	}else{
	  srand(atoi(argv[4]));
	}

	
	int i;


//	Get device information
	int count;
	cudaGetDeviceCount(&count);
	cudaDeviceProp prop;
	cudaGetDeviceProperties(&prop,0);
	printf("Compute capability: %d.%d\n",prop.major,prop.minor);
	printf("Number of GPUs: %d\n",count);
	printf("Multiprocessor count: %d\n",prop.multiProcessorCount);
	printf("Clock rate: %luKhz\n",prop.clockRate/1000);
	printf("Total Global Memory: %luMB\n",(unsigned int)prop.totalGlobalMem/1000000);
	printf("Total Constant Memory: %d\n",prop.totalConstMem);
	printf("Shared memory per block: %d\n",prop.sharedMemPerBlock);
	printf("1-D Texture Max size: %d\n",prop.maxTexture1D);
	printf("Number of registers per block: %d\n",prop.regsPerBlock);
	printf("Can I map host memory: %d\n",prop.canMapHostMemory);
	printf("Max number of threads per block: %d\n",prop.maxThreadsPerBlock);
	printf("Max number of blocks in a grid [0]: %d\n",prop.maxGridSize[0]);
	printf("Max number of blocks in a grid [1]: %d\n",prop.maxGridSize[1]);
	printf("Max number of blocks in a grid [2]: %d\n",prop.maxGridSize[2]);
	printf("Max Texture dimensions 2D: %lu\n",prop.maxTexture2D[2]);
	printf("Concurrent Kernels: %d\n",prop.concurrentKernels);
	printf("Threads in a warp: %d\n",prop.warpSize);

//	some general cpu info
	printf("size of float (cpu): %d\n",sizeof(float));
	printf("size of unsigned int (cpu): %d\n",sizeof(unsigned int));
	printf("size of unsigned long (cpu): %d\n",sizeof(unsigned long));


	float scalar=100.00/(rand()%100+1);

	float *vector;
	vector=(float*)malloc(len*sizeof(float));

	for(i=0;i<len;i++){
	    vector[i]=100.00/(rand()%100+1);
	}

	cudaError_t cudastatus0,cudastatus1;

	float* devVec;
	cudastatus0=cudaMalloc((void**)&devVec,len*sizeof(float));
	cudastatus1=cudaMemcpy(devVec,vector,len*sizeof(float),cudaMemcpyHostToDevice);
	if(cudastatus0!=cudaSuccess|cudastatus1!=cudaSuccess){
	  printf("Error in devVec memory allocation:\nstatus0: %s, status1: %s\n",
  			cudaGetErrorString(cudastatus0),
			cudaGetErrorString(cudastatus1));
	  if(devVec) cudaFree(devVec);
	  if(vector) free(vector);
          exit(1);
	}

	float* devScal;
	cudastatus0=cudaMalloc((void**)&devScal,sizeof(float));
	cudastatus1=cudaMemcpy(devScal,&scalar,sizeof(float),cudaMemcpyHostToDevice);
	if(cudastatus0!=cudaSuccess|cudastatus1!=cudaSuccess){
	  printf("Error in devScal memory allocation:\nstatus0: %s, status1: %s\n",
  			cudaGetErrorString(cudastatus0),
			cudaGetErrorString(cudastatus1));
	  if(devVec) cudaFree(devVec);
	  if(devScal) cudaFree(devScal);
	  if(vector) free(vector);
          exit(1);
	}

	int* devLen;
	cudastatus0=cudaMalloc((void**)&devLen,sizeof(int));
	cudastatus1=cudaMemcpy(devLen,&len,sizeof(int),cudaMemcpyHostToDevice);
	if(cudastatus0!=cudaSuccess|cudastatus1!=cudaSuccess){
	  printf("Error in devLen memory allocation:\nstatus0: %s, status1: %s\n",
  			cudaGetErrorString(cudastatus0),
			cudaGetErrorString(cudastatus1));
	  if(devVec) cudaFree(devVec);
	  if(devScal) cudaFree(devScal);
	  if(vector) free(vector);
          exit(1);
	}

	int* devN;
	cudastatus0=cudaMalloc((void**)&devN,sizeof(int));
	cudastatus1=cudaMemcpy(devN,&N,sizeof(int),cudaMemcpyHostToDevice);
	if(cudastatus0!=cudaSuccess|cudastatus1!=cudaSuccess){
	  printf("Error in devN memory allocation:\nstatus0: %s, status1: %s\n",
  			cudaGetErrorString(cudastatus0),
			cudaGetErrorString(cudastatus1));
	  if(devVec) cudaFree(devVec);
	  if(devScal) cudaFree(devScal);
	  if(devLen) cudaFree(devLen);
	  if(devN) cudaFree(devN);
	  if(vector) free(vector);
          exit(1);
	}


	printf("\n\nVector size: %dK Iterations: %dK Memory: %dKB\n",len/1000,N/1000,len*sizeof(float)/1024);

	int blocks=ceil((float)len/(float)tpb);
	int threads=tpb;
	printf("Number of blocks: %d, threads per block: %d\n",blocks,threads);

	cudastatus0=cudaDeviceSetCacheConfig(cudaFuncCachePreferShared);
	if(cudastatus0!=cudaSuccess){
	  printf("Error in setting L1 cache level to prefer Shared, status0: %s\n",
	  		cudaGetErrorString(cudastatus0));
	}

	float elapsedtime1;
	cudaEvent_t start1,stop1;
	cudaEventCreate(&start1);
	cudaEventCreate(&stop1);
	cudaEventRecord(start1,0);//begin recording kernel
  	sVPN<<<blocks,threads>>>(devVec,devScal,devLen,devN);
	cudaEventRecord(stop1,0);
	cudaEventSynchronize(stop1); // event barrier
	cudaEventElapsedTime(&elapsedtime1,start1,stop1);
        cudaEventDestroy(start1);
	cudaEventDestroy(stop1);


	float elapsedtime2;
	cudaEvent_t start2,stop2;
	cudaEventCreate(&start2);
	cudaEventCreate(&stop2);
	cudaEventRecord(start2,0);//begin recording kernel
  	sVPNo<<<blocks,threads>>>(devVec,devScal,devLen,devN);
	cudaEventRecord(stop2,0);
	cudaEventSynchronize(stop2); // event barrier
	cudaEventElapsedTime(&elapsedtime2,start2,stop2);
        cudaEventDestroy(start2);
	cudaEventDestroy(stop2);


	cudastatus0=cudaDeviceSetCacheConfig(cudaFuncCachePreferL1);
	if(cudastatus0!=cudaSuccess){
	  printf("Error in setting L1 cache level to Cache preferred, status0: %s\n",
	  		cudaGetErrorString(cudastatus0));
	}

	float elapsedtime3;
	cudaEvent_t start3,stop3;
	cudaEventCreate(&start3);
	cudaEventCreate(&stop3);
	cudaEventRecord(start3,0);//begin recording kernel
  	sVPN<<<blocks,threads>>>(devVec,devScal,devLen,devN);
	cudaEventRecord(stop3,0);
	cudaEventSynchronize(stop3); // event barrier
	cudaEventElapsedTime(&elapsedtime3,start3,stop3);
        cudaEventDestroy(start3);
	cudaEventDestroy(stop3);


	float elapsedtime4;
	cudaEvent_t start4,stop4;
	cudaEventCreate(&start4);
	cudaEventCreate(&stop4);
	cudaEventRecord(start4,0);//begin recording kernel
  	sVPNo<<<blocks,threads>>>(devVec,devScal,devLen,devN);
	cudaEventRecord(stop4,0);
	cudaEventSynchronize(stop4); // event barrier
	cudaEventElapsedTime(&elapsedtime4,start4,stop4);
        cudaEventDestroy(start4);
	cudaEventDestroy(stop4);



	printf("\nunoptimized kernel 16KB L1: %lf msec.\n",elapsedtime1);
	printf("optimized kernel 16KB L1: %lf msec.\n",elapsedtime2);
	printf("unoptimized kernel 48KB L1: %lf msec.\n",elapsedtime3);
	printf("optimized kernel 48KB L1: %lf msec.\n\n\n",elapsedtime4);

	if(devScal) cudaFree(devScal);
	if(devLen) cudaFree(devLen);
	if(devN) cudaFree(devN);
	if(devVec) cudaFree(devVec);
	if(vector) free(vector);
	checkCUDAError("cuda free operations");
	printf("Exiting...\n\n");
	exit(0);
}




// .................................................................
// Unoptimized code - kernel multiplies a vector by a scalar N times
// .................................................................
//
__global__ void sVPN(float *vector, float* scalar, int* vlength, int *N){

  int tid = blockDim.x*blockIdx.x+threadIdx.x;

  unsigned int i;// using unsigned type for loop counter will decrease performance
  
  for(i=0;i<*N;i++){// per loop global access of N if not in register
  	if(tid<*vlength)vector[tid]*=*scalar;//per loop global access of scalar and vlength 
  }
  
  //3N global memory accesses per thread or 4N if N is not in register
}




// .................................................................
// Optimized code - kernel multiplies a vector by a scalar N times
// 	 replacing global memory access with register(local) variables
// .................................................................
//
__global__ void sVPNo(float *vector, float* scalar, int* vlength, int *N){

  int tid = blockDim.x*blockIdx.x+threadIdx.x;

  //local variables added
  float local_scalar = *scalar;
  float local_N = *N;
  int local_vlength=*vlength;
  int local_vector= vector[tid];
  
  int i;// transform to int
  
  for(i=0;i< local_N;i++){
  	if(tid<local_vlength)local_vector*=local_scalar; 
  }
  vector[tid]=local_vector;
  //5 global memory accesses per thread
}



void checkCUDAError(const char *msg) {
  cudaError_t err = cudaGetLastError();
  if( cudaSuccess != err) {
    fprintf(stderr, "Cuda error: %s: %s.\n", msg, cudaGetErrorString( err) ); 
    exit(EXIT_FAILURE); 
  }
} 



double getclock(){
      struct timezone tzp;
      struct timeval tp;
      gettimeofday (&tp, &tzp);
      return (tp.tv_sec + tp.tv_usec*1.0e-6);
}

	.file	"tmpxft_002575f5_00000000-6_scalarvectorN.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Cuda error: %s: %s.\n"
	.text
	.globl	_Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc, @function
_Z14checkCUDAErrorPKc:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L2
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movq	%rbx, %rcx
	leaq	.LC0(%rip), %rdx
	movq	%rax, %r8
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z14checkCUDAErrorPKc, .-_Z14checkCUDAErrorPKc
	.globl	_Z8getclockv
	.type	_Z8getclockv, @function
_Z8getclockv:
.LFB2029:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC1(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z8getclockv, .-_Z8getclockv
	.globl	_Z30__device_stub__Z4sVPNPfS_PiS0_PfS_PiS0_
	.type	_Z30__device_stub__Z4sVPNPfS_PiS0_PfS_PiS0_, @function
_Z30__device_stub__Z4sVPNPfS_PiS0_PfS_PiS0_:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z4sVPNPfS_PiS0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L9:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z30__device_stub__Z4sVPNPfS_PiS0_PfS_PiS0_, .-_Z30__device_stub__Z4sVPNPfS_PiS0_PfS_PiS0_
	.globl	_Z4sVPNPfS_PiS0_
	.type	_Z4sVPNPfS_PiS0_, @function
_Z4sVPNPfS_PiS0_:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z4sVPNPfS_PiS0_PfS_PiS0_
	.cfi_endproc
.LFE2055:
	.size	_Z4sVPNPfS_PiS0_, .-_Z4sVPNPfS_PiS0_
	.globl	_Z31__device_stub__Z5sVPNoPfS_PiS0_PfS_PiS0_
	.type	_Z31__device_stub__Z5sVPNoPfS_PiS0_PfS_PiS0_, @function
_Z31__device_stub__Z5sVPNoPfS_PiS0_PfS_PiS0_:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z5sVPNoPfS_PiS0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L14:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z31__device_stub__Z5sVPNoPfS_PiS0_PfS_PiS0_, .-_Z31__device_stub__Z5sVPNoPfS_PiS0_PfS_PiS0_
	.globl	_Z5sVPNoPfS_PiS0_
	.type	_Z5sVPNoPfS_PiS0_, @function
_Z5sVPNoPfS_PiS0_:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z5sVPNoPfS_PiS0_PfS_PiS0_
	.cfi_endproc
.LFE2057:
	.size	_Z5sVPNoPfS_PiS0_, .-_Z5sVPNoPfS_PiS0_
	.section	.rodata.str1.1
.LC2:
	.string	"\n\nARGC value: %d\n"
.LC3:
	.string	"Compute capability: %d.%d\n"
.LC4:
	.string	"Number of GPUs: %d\n"
.LC5:
	.string	"Multiprocessor count: %d\n"
.LC6:
	.string	"Clock rate: %luKhz\n"
.LC7:
	.string	"Total Global Memory: %luMB\n"
.LC8:
	.string	"Total Constant Memory: %d\n"
.LC9:
	.string	"Shared memory per block: %d\n"
.LC10:
	.string	"1-D Texture Max size: %d\n"
.LC11:
	.string	"Number of registers per block: %d\n"
.LC12:
	.string	"Can I map host memory: %d\n"
.LC13:
	.string	"Max number of threads per block: %d\n"
.LC14:
	.string	"Max number of blocks in a grid [0]: %d\n"
.LC15:
	.string	"Max number of blocks in a grid [1]: %d\n"
.LC16:
	.string	"Max number of blocks in a grid [2]: %d\n"
.LC17:
	.string	"Max Texture dimensions 2D: %lu\n"
.LC18:
	.string	"Concurrent Kernels: %d\n"
.LC19:
	.string	"Threads in a warp: %d\n"
.LC20:
	.string	"size of float (cpu): %d\n"
.LC21:
	.string	"size of unsigned int (cpu): %d\n"
.LC22:
	.string	"size of unsigned long (cpu): %d\n"
.LC24:
	.string	"Error in devVec memory allocation:\nstatus0: %s, status1: %s\n"
.LC25:
	.string	"Error in devScal memory allocation:\nstatus0: %s, status1: %s\n"
.LC26:
	.string	"Error in devLen memory allocation:\nstatus0: %s, status1: %s\n"
.LC27:
	.string	"Error in devN memory allocation:\nstatus0: %s, status1: %s\n"
.LC28:
	.string	"\n\nVector size: %dK Iterations: %dK Memory: %dKB\n"
.LC29:
	.string	"Number of blocks: %d, threads per block: %d\n"
.LC30:
	.string	"Error in setting L1 cache level to prefer Shared, status0: %s\n"
.LC31:
	.string	"Error in setting L1 cache level to Cache preferred, status0: %s\n"
.LC32:
	.string	"\nunoptimized kernel 16KB L1: %lf msec.\n"
.LC33:
	.string	"optimized kernel 16KB L1: %lf msec.\n"
.LC34:
	.string	"unoptimized kernel 48KB L1: %lf msec.\n"
.LC35:
	.string	"optimized kernel 48KB L1: %lf msec.\n\n\n"
.LC36:
	.string	"cuda free operations"
.LC37:
	.string	"Exiting...\n\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%edi, %edx
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%edi, %r12d
	movl	$2, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rsi, %rbx
	leaq	.LC2(%rip), %rsi
	subq	$1208, %rsp
	.cfi_def_cfa_offset 1248
	movq	%fs:40, %rax
	movq	%rax, 1192(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movq	16(%rbx), %rdi
	movl	%eax, 12(%rsp)
	call	atoi@PLT
	movq	24(%rbx), %rdi
	movl	%eax, 16(%rsp)
	call	atoi@PLT
	movl	$1, %edi
	movl	%eax, %ebp
	cmpl	$4, %r12d
	jle	.L110
	movq	32(%rbx), %rdi
	call	atoi@PLT
	movl	%eax, %edi
.L110:
	call	srand@PLT
	leaq	20(%rsp), %rdi
	movl	$100, %r13d
	call	cudaGetDeviceCount@PLT
	xorl	%esi, %esi
	leaq	160(%rsp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	524(%rsp), %ecx
	movl	$2, %edi
	xorl	%eax, %eax
	movl	520(%rsp), %edx
	leaq	.LC3(%rip), %rsi
	call	__printf_chk@PLT
	movl	20(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC4(%rip), %rsi
	call	__printf_chk@PLT
	movl	548(%rsp), %edx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$1000, %ecx
	movl	$2, %edi
	movl	508(%rsp), %eax
	leaq	.LC6(%rip), %rsi
	cltd
	idivl	%ecx
	movl	%eax, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	448(%rsp), %eax
	xorl	%edx, %edx
	movl	$1000000, %ecx
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	divl	%ecx
	movl	%eax, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	512(%rsp), %rdx
	leaq	.LC8(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	456(%rsp), %rdx
	leaq	.LC9(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	568(%rsp), %edx
	leaq	.LC10(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	464(%rsp), %edx
	leaq	.LC11(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	560(%rsp), %edx
	leaq	.LC12(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	480(%rsp), %edx
	leaq	.LC13(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	496(%rsp), %edx
	leaq	.LC14(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	500(%rsp), %edx
	xorl	%eax, %eax
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	xorl	%r12d, %r12d
	call	__printf_chk@PLT
	movl	504(%rsp), %edx
	leaq	.LC16(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	588(%rsp), %edx
	leaq	.LC17(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	736(%rsp), %edx
	leaq	.LC18(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	468(%rsp), %edx
	leaq	.LC19(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$4, %edx
	leaq	.LC20(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$4, %edx
	leaq	.LC21(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$8, %edx
	leaq	.LC22(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	call	rand@PLT
	movl	$100, %ecx
	movslq	16(%rsp), %rdi
	movsd	.LC23(%rip), %xmm0
	cltd
	idivl	%ecx
	salq	$2, %rdi
	incl	%edx
	cvtsi2sdl	%edx, %xmm1
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 24(%rsp)
	call	malloc@PLT
	movq	%rax, %rbx
.L22:
	movslq	16(%rsp), %rsi
	cmpl	%r12d, %esi
	jle	.L124
	call	rand@PLT
	movsd	.LC23(%rip), %xmm0
	cltd
	idivl	%r13d
	incl	%edx
	cvtsi2sdl	%edx, %xmm1
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%r12,4)
	incq	%r12
	jmp	.L22
.L124:
	salq	$2, %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movslq	16(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	%eax, %r12d
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	%r12d, %eax
	orl	%edi, %eax
	je	.L24
	call	cudaGetErrorString@PLT
	movl	%r12d, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movq	%rbp, %rcx
	leaq	.LC24(%rip), %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
.L118:
	testq	%rdi, %rdi
	je	.L25
	call	cudaFree@PLT
.L25:
	testq	%rbx, %rbx
	je	.L27
	movq	%rbx, %rdi
	call	free@PLT
.L27:
	movl	$1, %edi
	jmp	.L112
.L24:
	leaq	48(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	48(%rsp), %rdi
	leaq	24(%rsp), %rsi
	movl	$1, %ecx
	movl	$4, %edx
	movl	%eax, %r12d
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	%r12d, %eax
	orl	%edi, %eax
	je	.L28
	call	cudaGetErrorString@PLT
	movl	%r12d, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rcx
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdx
	jmp	.L123
.L28:
	leaq	56(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	56(%rsp), %rdi
	leaq	16(%rsp), %rsi
	movl	$1, %ecx
	movl	$4, %edx
	movl	%eax, %r12d
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	%r12d, %eax
	orl	%edi, %eax
	je	.L32
	call	cudaGetErrorString@PLT
	movl	%r12d, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rcx
	leaq	.LC26(%rip), %rsi
	movq	%rax, %rdx
.L123:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L33
	call	cudaFree@PLT
.L33:
	movq	48(%rsp), %rdi
	jmp	.L118
.L32:
	leaq	64(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	64(%rsp), %rdi
	leaq	12(%rsp), %rsi
	movl	$1, %ecx
	movl	$4, %edx
	movl	%eax, %r12d
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	%r12d, %eax
	orl	%edi, %eax
	je	.L35
	call	cudaGetErrorString@PLT
	movl	%r12d, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movq	%rbp, %rcx
	leaq	.LC27(%rip), %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L36
	call	cudaFree@PLT
.L36:
	movq	48(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L37
	call	cudaFree@PLT
.L37:
	movq	56(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L38
	call	cudaFree@PLT
.L38:
	movq	64(%rsp), %rdi
	jmp	.L118
.L35:
	movl	12(%rsp), %eax
	movl	$1000, %esi
	movslq	16(%rsp), %r8
	movl	$2, %edi
	cltd
	salq	$2, %r8
	idivl	%esi
	shrq	$10, %r8
	movl	%eax, %ecx
	movl	16(%rsp), %eax
	cltd
	idivl	%esi
	leaq	.LC28(%rip), %rsi
	movl	%eax, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	cvtsi2ssl	%ebp, %xmm1
	cvtsi2ssl	16(%rsp), %xmm0
	divss	%xmm1, %xmm0
	call	ceilf@PLT
	movl	%ebp, %ecx
	leaq	.LC29(%rip), %rsi
	xorl	%eax, %eax
	cvttss2sil	%xmm0, %r12d
	movl	$2, %edi
	movl	%r12d, %edx
	call	__printf_chk@PLT
	movl	$1, %edi
	call	cudaDeviceSetCacheConfig@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L40
	call	cudaGetErrorString@PLT
	leaq	.LC30(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L40:
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	80(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%ebp, 148(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r12d, 136(%rsp)
	movq	%rax, 152(%rsp)
	movl	156(%rsp), %ecx
	movq	%rax, 140(%rsp)
	movq	148(%rsp), %rdx
	movq	136(%rsp), %rdi
	movl	144(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	movq	64(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z30__device_stub__Z4sVPNPfS_PiS0_PfS_PiS0_
.L41:
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	80(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	80(%rsp), %rdx
	movq	72(%rsp), %rsi
	leaq	28(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	72(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	80(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	88(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	96(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%ebp, 148(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r12d, 136(%rsp)
	movq	%rax, 152(%rsp)
	movl	156(%rsp), %ecx
	movq	%rax, 140(%rsp)
	movq	148(%rsp), %rdx
	movq	136(%rsp), %rdi
	movl	144(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	movq	64(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z31__device_stub__Z5sVPNoPfS_PiS0_PfS_PiS0_
.L42:
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	96(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rsi
	leaq	32(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	88(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	96(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movl	$2, %edi
	call	cudaDeviceSetCacheConfig@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L43
	call	cudaGetErrorString@PLT
	leaq	.LC31(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L43:
	leaq	104(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	112(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	104(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%ebp, 148(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r12d, 136(%rsp)
	movq	%rax, 152(%rsp)
	movl	156(%rsp), %ecx
	movq	%rax, 140(%rsp)
	movq	148(%rsp), %rdx
	movq	136(%rsp), %rdi
	movl	144(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	movq	64(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z30__device_stub__Z4sVPNPfS_PiS0_PfS_PiS0_
.L44:
	movq	112(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	112(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	112(%rsp), %rdx
	movq	104(%rsp), %rsi
	leaq	36(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	104(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	112(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	120(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	128(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	120(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%ebp, 148(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r12d, 136(%rsp)
	movq	%rax, 152(%rsp)
	movl	156(%rsp), %ecx
	movq	%rax, 140(%rsp)
	movq	148(%rsp), %rdx
	movq	136(%rsp), %rdi
	movl	144(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	movq	64(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z31__device_stub__Z5sVPNoPfS_PiS0_PfS_PiS0_
.L45:
	movq	128(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	128(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	128(%rsp), %rdx
	movq	120(%rsp), %rsi
	leaq	148(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	120(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	128(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC32(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	28(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC33(%rip), %rsi
	cvtss2sd	32(%rsp), %xmm0
	call	__printf_chk@PLT
	leaq	.LC34(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	36(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	148(%rsp), %xmm0
	leaq	.LC35(%rip), %rsi
	call	__printf_chk@PLT
	movq	48(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L46
	call	cudaFree@PLT
.L46:
	movq	56(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L47
	call	cudaFree@PLT
.L47:
	movq	64(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L48
	call	cudaFree@PLT
.L48:
	movq	40(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L49
	call	cudaFree@PLT
.L49:
	testq	%rbx, %rbx
	je	.L50
	movq	%rbx, %rdi
	call	free@PLT
.L50:
	leaq	.LC36(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	movl	$2, %edi
	leaq	.LC37(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edi, %edi
.L112:
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC38:
	.string	"_Z5sVPNoPfS_PiS0_"
.LC39:
	.string	"_Z4sVPNPfS_PiS0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC38(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z5sVPNoPfS_PiS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC39(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z4sVPNPfS_PiS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC23:
	.long	0
	.long	1079574528
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//scalarvectorN.cu
#include <stdio.h>
#include <hip/hip_runtime.h>
#include <stdlib.h>
#include <math.h>
#include <sys/time.h>
#include <string.h>
//#include <omp.h>


#define SEED 1

double getclock();
void checkCUDAError(const char *);
__global__ void sVPN(float *vector, float* scalar, int* vlength, int *N);
__global__ void sVPNo(float *vector, float* scalar, int* vlength, int *N);






int main(int argc, char** argv){

        printf("\n\nARGC value: %d\n",argc);
        int N = atoi(argv[1]);
	int len = atoi(argv[2]);
	int tpb = atoi(argv[3]);
	if(argc<5){
	  srand(SEED);
	}else{
	  srand(atoi(argv[4]));
	}

	
	int i;


//	Get device information
	int count;
	hipGetDeviceCount(&count);
	hipDeviceProp_t prop;
	hipGetDeviceProperties(&prop,0);
	printf("Compute capability: %d.%d\n",prop.major,prop.minor);
	printf("Number of GPUs: %d\n",count);
	printf("Multiprocessor count: %d\n",prop.multiProcessorCount);
	printf("Clock rate: %luKhz\n",prop.clockRate/1000);
	printf("Total Global Memory: %luMB\n",(unsigned int)prop.totalGlobalMem/1000000);
	printf("Total Constant Memory: %d\n",prop.totalConstMem);
	printf("Shared memory per block: %d\n",prop.sharedMemPerBlock);
	printf("1-D Texture Max size: %d\n",prop.maxTexture1D);
	printf("Number of registers per block: %d\n",prop.regsPerBlock);
	printf("Can I map host memory: %d\n",prop.canMapHostMemory);
	printf("Max number of threads per block: %d\n",prop.maxThreadsPerBlock);
	printf("Max number of blocks in a grid [0]: %d\n",prop.maxGridSize[0]);
	printf("Max number of blocks in a grid [1]: %d\n",prop.maxGridSize[1]);
	printf("Max number of blocks in a grid [2]: %d\n",prop.maxGridSize[2]);
	printf("Max Texture dimensions 2D: %lu\n",prop.maxTexture2D[2]);
	printf("Concurrent Kernels: %d\n",prop.concurrentKernels);
	printf("Threads in a warp: %d\n",prop.warpSize);

//	some general cpu info
	printf("size of float (cpu): %d\n",sizeof(float));
	printf("size of unsigned int (cpu): %d\n",sizeof(unsigned int));
	printf("size of unsigned long (cpu): %d\n",sizeof(unsigned long));


	float scalar=100.00/(rand()%100+1);

	float *vector;
	vector=(float*)malloc(len*sizeof(float));

	for(i=0;i<len;i++){
	    vector[i]=100.00/(rand()%100+1);
	}

	hipError_t cudastatus0,cudastatus1;

	float* devVec;
	cudastatus0=hipMalloc((void**)&devVec,len*sizeof(float));
	cudastatus1=hipMemcpy(devVec,vector,len*sizeof(float),hipMemcpyHostToDevice);
	if(cudastatus0!=hipSuccess|cudastatus1!=hipSuccess){
	  printf("Error in devVec memory allocation:\nstatus0: %s, status1: %s\n",
  			hipGetErrorString(cudastatus0),
			hipGetErrorString(cudastatus1));
	  if(devVec) hipFree(devVec);
	  if(vector) free(vector);
          exit(1);
	}

	float* devScal;
	cudastatus0=hipMalloc((void**)&devScal,sizeof(float));
	cudastatus1=hipMemcpy(devScal,&scalar,sizeof(float),hipMemcpyHostToDevice);
	if(cudastatus0!=hipSuccess|cudastatus1!=hipSuccess){
	  printf("Error in devScal memory allocation:\nstatus0: %s, status1: %s\n",
  			hipGetErrorString(cudastatus0),
			hipGetErrorString(cudastatus1));
	  if(devVec) hipFree(devVec);
	  if(devScal) hipFree(devScal);
	  if(vector) free(vector);
          exit(1);
	}

	int* devLen;
	cudastatus0=hipMalloc((void**)&devLen,sizeof(int));
	cudastatus1=hipMemcpy(devLen,&len,sizeof(int),hipMemcpyHostToDevice);
	if(cudastatus0!=hipSuccess|cudastatus1!=hipSuccess){
	  printf("Error in devLen memory allocation:\nstatus0: %s, status1: %s\n",
  			hipGetErrorString(cudastatus0),
			hipGetErrorString(cudastatus1));
	  if(devVec) hipFree(devVec);
	  if(devScal) hipFree(devScal);
	  if(vector) free(vector);
          exit(1);
	}

	int* devN;
	cudastatus0=hipMalloc((void**)&devN,sizeof(int));
	cudastatus1=hipMemcpy(devN,&N,sizeof(int),hipMemcpyHostToDevice);
	if(cudastatus0!=hipSuccess|cudastatus1!=hipSuccess){
	  printf("Error in devN memory allocation:\nstatus0: %s, status1: %s\n",
  			hipGetErrorString(cudastatus0),
			hipGetErrorString(cudastatus1));
	  if(devVec) hipFree(devVec);
	  if(devScal) hipFree(devScal);
	  if(devLen) hipFree(devLen);
	  if(devN) hipFree(devN);
	  if(vector) free(vector);
          exit(1);
	}


	printf("\n\nVector size: %dK Iterations: %dK Memory: %dKB\n",len/1000,N/1000,len*sizeof(float)/1024);

	int blocks=ceil((float)len/(float)tpb);
	int threads=tpb;
	printf("Number of blocks: %d, threads per block: %d\n",blocks,threads);

	cudastatus0=hipDeviceSetCacheConfig(hipFuncCachePreferShared);
	if(cudastatus0!=hipSuccess){
	  printf("Error in setting L1 cache level to prefer Shared, status0: %s\n",
	  		hipGetErrorString(cudastatus0));
	}

	float elapsedtime1;
	hipEvent_t start1,stop1;
	hipEventCreate(&start1);
	hipEventCreate(&stop1);
	hipEventRecord(start1,0);//begin recording kernel
  	sVPN<<<blocks,threads>>>(devVec,devScal,devLen,devN);
	hipEventRecord(stop1,0);
	hipEventSynchronize(stop1); // event barrier
	hipEventElapsedTime(&elapsedtime1,start1,stop1);
        hipEventDestroy(start1);
	hipEventDestroy(stop1);


	float elapsedtime2;
	hipEvent_t start2,stop2;
	hipEventCreate(&start2);
	hipEventCreate(&stop2);
	hipEventRecord(start2,0);//begin recording kernel
  	sVPNo<<<blocks,threads>>>(devVec,devScal,devLen,devN);
	hipEventRecord(stop2,0);
	hipEventSynchronize(stop2); // event barrier
	hipEventElapsedTime(&elapsedtime2,start2,stop2);
        hipEventDestroy(start2);
	hipEventDestroy(stop2);


	cudastatus0=hipDeviceSetCacheConfig(hipFuncCachePreferL1);
	if(cudastatus0!=hipSuccess){
	  printf("Error in setting L1 cache level to Cache preferred, status0: %s\n",
	  		hipGetErrorString(cudastatus0));
	}

	float elapsedtime3;
	hipEvent_t start3,stop3;
	hipEventCreate(&start3);
	hipEventCreate(&stop3);
	hipEventRecord(start3,0);//begin recording kernel
  	sVPN<<<blocks,threads>>>(devVec,devScal,devLen,devN);
	hipEventRecord(stop3,0);
	hipEventSynchronize(stop3); // event barrier
	hipEventElapsedTime(&elapsedtime3,start3,stop3);
        hipEventDestroy(start3);
	hipEventDestroy(stop3);


	float elapsedtime4;
	hipEvent_t start4,stop4;
	hipEventCreate(&start4);
	hipEventCreate(&stop4);
	hipEventRecord(start4,0);//begin recording kernel
  	sVPNo<<<blocks,threads>>>(devVec,devScal,devLen,devN);
	hipEventRecord(stop4,0);
	hipEventSynchronize(stop4); // event barrier
	hipEventElapsedTime(&elapsedtime4,start4,stop4);
        hipEventDestroy(start4);
	hipEventDestroy(stop4);



	printf("\nunoptimized kernel 16KB L1: %lf msec.\n",elapsedtime1);
	printf("optimized kernel 16KB L1: %lf msec.\n",elapsedtime2);
	printf("unoptimized kernel 48KB L1: %lf msec.\n",elapsedtime3);
	printf("optimized kernel 48KB L1: %lf msec.\n\n\n",elapsedtime4);

	if(devScal) hipFree(devScal);
	if(devLen) hipFree(devLen);
	if(devN) hipFree(devN);
	if(devVec) hipFree(devVec);
	if(vector) free(vector);
	checkCUDAError("cuda free operations");
	printf("Exiting...\n\n");
	exit(0);
}




// .................................................................
// Unoptimized code - kernel multiplies a vector by a scalar N times
// .................................................................
//
__global__ void sVPN(float *vector, float* scalar, int* vlength, int *N){

  int tid = blockDim.x*blockIdx.x+threadIdx.x;

  unsigned int i;// using unsigned type for loop counter will decrease performance
  
  for(i=0;i<*N;i++){// per loop global access of N if not in register
  	if(tid<*vlength)vector[tid]*=*scalar;//per loop global access of scalar and vlength 
  }
  
  //3N global memory accesses per thread or 4N if N is not in register
}




// .................................................................
// Optimized code - kernel multiplies a vector by a scalar N times
// 	 replacing global memory access with register(local) variables
// .................................................................
//
__global__ void sVPNo(float *vector, float* scalar, int* vlength, int *N){

  int tid = blockDim.x*blockIdx.x+threadIdx.x;

  //local variables added
  float local_scalar = *scalar;
  float local_N = *N;
  int local_vlength=*vlength;
  int local_vector= vector[tid];
  
  int i;// transform to int
  
  for(i=0;i< local_N;i++){
  	if(tid<local_vlength)local_vector*=local_scalar; 
  }
  vector[tid]=local_vector;
  //5 global memory accesses per thread
}



void checkCUDAError(const char *msg) {
  hipError_t err = hipGetLastError();
  if( hipSuccess != err) {
    fprintf(stderr, "Cuda error: %s: %s.\n", msg, hipGetErrorString( err) ); 
    exit(EXIT_FAILURE); 
  }
} 



double getclock(){
      struct timezone tzp;
      struct timeval tp;
      gettimeofday (&tp, &tzp);
      return (tp.tv_sec + tp.tv_usec*1.0e-6);
}

	.text
	.file	"scalarvectorN.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI0_0:
	.quad	0x4059000000000000              # double 100
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$1616, %rsp                     # imm = 0x650
	.cfi_def_cfa_offset 1664
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %r14d
	movl	$.L.str, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, 52(%rsp)
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, 12(%rsp)
	movq	24(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	movl	$1, %edi
	cmpl	$5, %r14d
	jl	.LBB0_2
# %bb.1:
	movq	32(%rbx), %rdi
	callq	atoi
	movl	%eax, %edi
.LBB0_2:
	callq	srand
	leaq	140(%rsp), %r14
	movq	%r14, %rdi
	callq	hipGetDeviceCount
	leaq	144(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movl	360(%rbx), %esi
	movl	364(%rbx), %edx
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	movl	(%r14), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	388(%rbx), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movslq	348(%rbx), %rax
	imulq	$274877907, %rax, %rsi          # imm = 0x10624DD3
	movq	%rsi, %rax
	shrq	$63, %rax
	sarq	$38, %rsi
	addl	%eax, %esi
	movl	$.L.str.4, %edi
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	callq	printf
	movl	288(%rbx), %eax
	imulq	$1125899907, %rax, %rsi         # imm = 0x431BDE83
	shrq	$50, %rsi
	movl	$.L.str.5, %edi
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	callq	printf
	movq	352(%rbx), %rsi
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	movq	296(%rbx), %rsi
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	movl	408(%rbx), %esi
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	callq	printf
	movl	304(%rbx), %esi
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	movl	400(%rbx), %esi
	movl	$.L.str.10, %edi
	xorl	%eax, %eax
	callq	printf
	movl	320(%rbx), %esi
	movl	$.L.str.11, %edi
	xorl	%eax, %eax
	callq	printf
	movl	336(%rbx), %esi
	movl	$.L.str.12, %edi
	xorl	%eax, %eax
	callq	printf
	movl	340(%rbx), %esi
	movl	$.L.str.13, %edi
	xorl	%eax, %eax
	callq	printf
	movl	344(%rbx), %esi
	movl	$.L.str.14, %edi
	xorl	%eax, %eax
	callq	printf
	movl	428(%rbx), %esi
	movl	$.L.str.15, %edi
	xorl	%eax, %eax
	callq	printf
	movl	576(%rbx), %esi
	movl	$.L.str.16, %edi
	xorl	%eax, %eax
	callq	printf
	movl	308(%rbx), %esi
	movl	$.L.str.17, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.18, %edi
	movl	$4, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.19, %edi
	movl	$4, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.20, %edi
	movl	$8, %esi
	xorl	%eax, %eax
	callq	printf
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	cvtsi2sd	%eax, %xmm0
	movsd	.LCPI0_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtsd2ss	%xmm1, %xmm0
	movss	%xmm0, 100(%rsp)
	movslq	12(%rsp), %r15
	leaq	(,%r15,4), %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %rbx
	testq	%r15, %r15
	jle	.LBB0_6
# %bb.3:                                # %.lr.ph.preheader
	xorl	%r15d, %r15d
.LBB0_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	.LCPI0_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtsd2ss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	movslq	12(%rsp), %r14
	cmpq	%r14, %r15
	jl	.LBB0_4
# %bb.5:                                # %._crit_edge.loopexit
	shlq	$2, %r14
.LBB0_6:                                # %._crit_edge
	leaq	16(%rsp), %r15
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	%eax, %r14d
	movq	(%r15), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %r15d
	orl	%r14d, %eax
	jne	.LBB0_7
# %bb.13:
	leaq	24(%rsp), %r15
	movl	$4, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	movl	%eax, %r14d
	movq	(%r15), %rdi
	leaq	100(%rsp), %rsi
	movl	$4, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %r15d
	orl	%r14d, %eax
	jne	.LBB0_14
# %bb.18:
	leaq	40(%rsp), %r15
	movl	$4, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	movl	%eax, %r14d
	movq	(%r15), %rdi
	leaq	12(%rsp), %rsi
	movl	$4, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %r15d
	orl	%r14d, %eax
	jne	.LBB0_19
# %bb.20:
	leaq	32(%rsp), %r15
	movl	$4, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	movl	%eax, %r14d
	movq	(%r15), %rdi
	leaq	52(%rsp), %rsi
	movl	$4, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %r15d
	orl	%r14d, %eax
	jne	.LBB0_21
# %bb.28:
	movslq	12(%rsp), %rax
	imulq	$274877907, %rax, %rsi          # imm = 0x10624DD3
	movq	%rsi, %rcx
	shrq	$63, %rcx
	sarq	$38, %rsi
	addl	%ecx, %esi
	movslq	52(%rsp), %rcx
	imulq	$274877907, %rcx, %rdx          # imm = 0x10624DD3
	movq	%rdx, %rcx
	shrq	$63, %rcx
	sarq	$38, %rdx
	addl	%ecx, %edx
	shrq	$8, %rax
	movabsq	$18014398509481983, %rcx        # imm = 0x3FFFFFFFFFFFFF
	andq	%rax, %rcx
	movl	$.L.str.25, %edi
                                        # kill: def $esi killed $esi killed $rsi
                                        # kill: def $edx killed $edx killed $rdx
	xorl	%eax, %eax
	callq	printf
	cvtsi2ssl	12(%rsp), %xmm0
	cvtsi2ss	%ebp, %xmm1
	divss	%xmm1, %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %r14d
	movl	$.L.str.26, %edi
	movl	%r14d, %esi
	movl	%ebp, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	hipDeviceSetCacheConfig
	testl	%eax, %eax
	je	.LBB0_30
# %bb.29:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB0_30:
	leaq	128(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	leaq	80(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%r14d, %r14d
	btsq	$32, %r14
	movl	%ebp, %r15d
	btsq	$32, %r15
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_32
# %bb.31:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rcx
	callq	_Z19__device_stub__sVPNPfS_PiS0_
.LBB0_32:
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	80(%rsp), %rdi
	callq	hipEventSynchronize
	movq	128(%rsp), %rsi
	movq	80(%rsp), %rdx
	leaq	96(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	128(%rsp), %rdi
	callq	hipEventDestroy
	movq	80(%rsp), %rdi
	callq	hipEventDestroy
	leaq	120(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	72(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_34
# %bb.33:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rcx
	callq	_Z20__device_stub__sVPNoPfS_PiS0_
.LBB0_34:
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	72(%rsp), %rdi
	callq	hipEventSynchronize
	movq	120(%rsp), %rsi
	movq	72(%rsp), %rdx
	leaq	92(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	120(%rsp), %rdi
	callq	hipEventDestroy
	movq	72(%rsp), %rdi
	callq	hipEventDestroy
	movl	$2, %edi
	callq	hipDeviceSetCacheConfig
	testl	%eax, %eax
	je	.LBB0_36
# %bb.35:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.28, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB0_36:
	leaq	112(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	64(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_38
# %bb.37:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rcx
	callq	_Z19__device_stub__sVPNPfS_PiS0_
.LBB0_38:
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	64(%rsp), %rdi
	callq	hipEventSynchronize
	movq	112(%rsp), %rsi
	movq	64(%rsp), %rdx
	leaq	88(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	112(%rsp), %rdi
	callq	hipEventDestroy
	movq	64(%rsp), %rdi
	callq	hipEventDestroy
	leaq	104(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	56(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_40
# %bb.39:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rcx
	callq	_Z20__device_stub__sVPNoPfS_PiS0_
.LBB0_40:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	56(%rsp), %rdi
	callq	hipEventSynchronize
	movq	104(%rsp), %rsi
	movq	56(%rsp), %rdx
	leaq	136(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	movq	104(%rsp), %rdi
	callq	hipEventDestroy
	movq	56(%rsp), %rdi
	callq	hipEventDestroy
	cvtss2sd	96(%rsp), %xmm0
	movl	$.L.str.29, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	92(%rsp), %xmm0
	movl	$.L.str.30, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	88(%rsp), %xmm0
	movl	$.L.str.31, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str.32, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_42
# %bb.41:
	callq	hipFree
.LBB0_42:
	movq	40(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_44
# %bb.43:
	callq	hipFree
.LBB0_44:
	movq	32(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_46
# %bb.45:
	callq	hipFree
.LBB0_46:
	movq	16(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_48
# %bb.47:
	callq	hipFree
.LBB0_48:
	testq	%rbx, %rbx
	je	.LBB0_50
# %bb.49:
	movq	%rbx, %rdi
	callq	free
.LBB0_50:
	movl	$.L.str.33, %edi
	callq	_Z14checkCUDAErrorPKc
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%edi, %edi
	callq	exit
.LBB0_7:
	movl	%r14d, %edi
	callq	hipGetErrorString
	movq	%rax, %r14
	movl	%r15d, %edi
	callq	hipGetErrorString
	movl	$.L.str.21, %edi
	movq	%r14, %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rdi
	jmp	.LBB0_8
.LBB0_14:
	movl	%r14d, %edi
	callq	hipGetErrorString
	movq	%rax, %r14
	movl	%r15d, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %edi
	jmp	.LBB0_15
.LBB0_19:
	movl	%r14d, %edi
	callq	hipGetErrorString
	movq	%rax, %r14
	movl	%r15d, %edi
	callq	hipGetErrorString
	movl	$.L.str.23, %edi
.LBB0_15:
	movq	%r14, %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_17
# %bb.16:
	callq	hipFree
.LBB0_17:
	movq	24(%rsp), %rdi
.LBB0_8:
	testq	%rdi, %rdi
	je	.LBB0_10
# %bb.9:
	callq	hipFree
.LBB0_10:
	testq	%rbx, %rbx
	je	.LBB0_12
# %bb.11:
	movq	%rbx, %rdi
	callq	free
.LBB0_12:
	movl	$1, %edi
	callq	exit
.LBB0_21:
	movl	%r14d, %edi
	callq	hipGetErrorString
	movq	%rax, %r14
	movl	%r15d, %edi
	callq	hipGetErrorString
	movl	$.L.str.24, %edi
	movq	%r14, %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_23
# %bb.22:
	callq	hipFree
.LBB0_23:
	movq	24(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_25
# %bb.24:
	callq	hipFree
.LBB0_25:
	movq	40(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_27
# %bb.26:
	callq	hipFree
.LBB0_27:
	movq	32(%rsp), %rdi
	jmp	.LBB0_8
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__sVPNPfS_PiS0_ # -- Begin function _Z19__device_stub__sVPNPfS_PiS0_
	.type	_Z19__device_stub__sVPNPfS_PiS0_,@function
_Z19__device_stub__sVPNPfS_PiS0_:       # @_Z19__device_stub__sVPNPfS_PiS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4sVPNPfS_PiS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z19__device_stub__sVPNPfS_PiS0_, .Lfunc_end1-_Z19__device_stub__sVPNPfS_PiS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__sVPNoPfS_PiS0_ # -- Begin function _Z20__device_stub__sVPNoPfS_PiS0_
	.type	_Z20__device_stub__sVPNoPfS_PiS0_,@function
_Z20__device_stub__sVPNoPfS_PiS0_:      # @_Z20__device_stub__sVPNoPfS_PiS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5sVPNoPfS_PiS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z20__device_stub__sVPNoPfS_PiS0_, .Lfunc_end2-_Z20__device_stub__sVPNoPfS_PiS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCUDAErrorPKc           # -- Begin function _Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc,@function
_Z14checkCUDAErrorPKc:                  # @_Z14checkCUDAErrorPKc
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB3_2:
	.cfi_def_cfa_offset 32
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.35, %esi
	movq	%r14, %rdi
	movq	%rbx, %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end3:
	.size	_Z14checkCUDAErrorPKc, .Lfunc_end3-_Z14checkCUDAErrorPKc
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z8getclockv
.LCPI4_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z8getclockv
	.type	_Z8getclockv,@function
_Z8getclockv:                           # @_Z8getclockv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	leaq	16(%rsp), %rbx
	leaq	8(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	mulsd	.LCPI4_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z8getclockv, .Lfunc_end4-_Z8getclockv
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4sVPNPfS_PiS0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5sVPNoPfS_PiS0_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\n\nARGC value: %d\n"
	.size	.L.str, 18

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Compute capability: %d.%d\n"
	.size	.L.str.1, 27

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Number of GPUs: %d\n"
	.size	.L.str.2, 20

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Multiprocessor count: %d\n"
	.size	.L.str.3, 26

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Clock rate: %luKhz\n"
	.size	.L.str.4, 20

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Total Global Memory: %luMB\n"
	.size	.L.str.5, 28

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Total Constant Memory: %d\n"
	.size	.L.str.6, 27

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Shared memory per block: %d\n"
	.size	.L.str.7, 29

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"1-D Texture Max size: %d\n"
	.size	.L.str.8, 26

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Number of registers per block: %d\n"
	.size	.L.str.9, 35

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Can I map host memory: %d\n"
	.size	.L.str.10, 27

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Max number of threads per block: %d\n"
	.size	.L.str.11, 37

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Max number of blocks in a grid [0]: %d\n"
	.size	.L.str.12, 40

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Max number of blocks in a grid [1]: %d\n"
	.size	.L.str.13, 40

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Max number of blocks in a grid [2]: %d\n"
	.size	.L.str.14, 40

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Max Texture dimensions 2D: %lu\n"
	.size	.L.str.15, 32

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"Concurrent Kernels: %d\n"
	.size	.L.str.16, 24

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"Threads in a warp: %d\n"
	.size	.L.str.17, 23

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"size of float (cpu): %d\n"
	.size	.L.str.18, 25

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"size of unsigned int (cpu): %d\n"
	.size	.L.str.19, 32

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"size of unsigned long (cpu): %d\n"
	.size	.L.str.20, 33

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"Error in devVec memory allocation:\nstatus0: %s, status1: %s\n"
	.size	.L.str.21, 61

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"Error in devScal memory allocation:\nstatus0: %s, status1: %s\n"
	.size	.L.str.22, 62

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"Error in devLen memory allocation:\nstatus0: %s, status1: %s\n"
	.size	.L.str.23, 61

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"Error in devN memory allocation:\nstatus0: %s, status1: %s\n"
	.size	.L.str.24, 59

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"\n\nVector size: %dK Iterations: %dK Memory: %dKB\n"
	.size	.L.str.25, 49

	.type	.L.str.26,@object               # @.str.26
.L.str.26:
	.asciz	"Number of blocks: %d, threads per block: %d\n"
	.size	.L.str.26, 45

	.type	.L.str.27,@object               # @.str.27
.L.str.27:
	.asciz	"Error in setting L1 cache level to prefer Shared, status0: %s\n"
	.size	.L.str.27, 63

	.type	_Z4sVPNPfS_PiS0_,@object        # @_Z4sVPNPfS_PiS0_
	.section	.rodata,"a",@progbits
	.globl	_Z4sVPNPfS_PiS0_
	.p2align	3, 0x0
_Z4sVPNPfS_PiS0_:
	.quad	_Z19__device_stub__sVPNPfS_PiS0_
	.size	_Z4sVPNPfS_PiS0_, 8

	.type	_Z5sVPNoPfS_PiS0_,@object       # @_Z5sVPNoPfS_PiS0_
	.globl	_Z5sVPNoPfS_PiS0_
	.p2align	3, 0x0
_Z5sVPNoPfS_PiS0_:
	.quad	_Z20__device_stub__sVPNoPfS_PiS0_
	.size	_Z5sVPNoPfS_PiS0_, 8

	.type	.L.str.28,@object               # @.str.28
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.28:
	.asciz	"Error in setting L1 cache level to Cache preferred, status0: %s\n"
	.size	.L.str.28, 65

	.type	.L.str.29,@object               # @.str.29
.L.str.29:
	.asciz	"\nunoptimized kernel 16KB L1: %lf msec.\n"
	.size	.L.str.29, 40

	.type	.L.str.30,@object               # @.str.30
.L.str.30:
	.asciz	"optimized kernel 16KB L1: %lf msec.\n"
	.size	.L.str.30, 37

	.type	.L.str.31,@object               # @.str.31
.L.str.31:
	.asciz	"unoptimized kernel 48KB L1: %lf msec.\n"
	.size	.L.str.31, 39

	.type	.L.str.32,@object               # @.str.32
.L.str.32:
	.asciz	"optimized kernel 48KB L1: %lf msec.\n\n\n"
	.size	.L.str.32, 39

	.type	.L.str.33,@object               # @.str.33
.L.str.33:
	.asciz	"cuda free operations"
	.size	.L.str.33, 21

	.type	.L.str.35,@object               # @.str.35
.L.str.35:
	.asciz	"Cuda error: %s: %s.\n"
	.size	.L.str.35, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4sVPNPfS_PiS0_"
	.size	.L__unnamed_1, 17

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z5sVPNoPfS_PiS0_"
	.size	.L__unnamed_2, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Exiting...\n"
	.size	.Lstr, 12

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__sVPNPfS_PiS0_
	.addrsig_sym _Z20__device_stub__sVPNoPfS_PiS0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4sVPNPfS_PiS0_
	.addrsig_sym _Z5sVPNoPfS_PiS0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4sVPNPfS_PiS0_        ; -- Begin function _Z4sVPNPfS_PiS0_
	.globl	_Z4sVPNPfS_PiS0_
	.p2align	8
	.type	_Z4sVPNPfS_PiS0_,@function
_Z4sVPNPfS_PiS0_:                       ; @_Z4sVPNPfS_PiS0_
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_load_b32 s2, s[10:11], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph
	s_load_b32 s0, s[0:1], 0x2c
	s_load_b32 s1, s[8:9], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	v_cmp_gt_i32_e32 vcc_lo, s1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v0, s0, s4, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s0, s5, v3, s0
	v_mov_b32_e32 v2, 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	global_load_b32 v3, v2, s[6:7]
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v3, v3, v4
	global_store_b32 v[0:1], v3, off
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s2, 0
	s_cbranch_scc1 .LBB0_2
.LBB0_5:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4sVPNPfS_PiS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4sVPNPfS_PiS0_, .Lfunc_end0-_Z4sVPNPfS_PiS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z5sVPNoPfS_PiS0_       ; -- Begin function _Z5sVPNoPfS_PiS0_
	.globl	_Z5sVPNoPfS_PiS0_
	.p2align	8
	.type	_Z5sVPNoPfS_PiS0_,@function
_Z5sVPNoPfS_PiS0_:                      ; @_Z5sVPNoPfS_PiS0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b256 s[0:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s8, v[0:1]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_load_b32 s0, s[6:7], 0x0
	s_mov_b32 s1, 1
	global_load_b32 v3, v[0:1], off
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s0, 1
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v3, v3
	s_cbranch_scc1 .LBB1_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s4, s[4:5], 0x0
	s_load_b32 s2, s[2:3], 0x0
	v_cvt_f32_i32_e32 v4, s0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e64 s0, s4, v2
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v2, v3
	v_cvt_f32_i32_e32 v5, s1
	s_add_i32 s1, s1, 1
	v_mul_f32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e32 vcc_lo, v5, v4
	v_cvt_i32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v3, v2, s0
	s_cbranch_vccnz .LBB1_2
.LBB1_3:                                ; %._crit_edge
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_i32_e32 v2, v3
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5sVPNoPfS_PiS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z5sVPNoPfS_PiS0_, .Lfunc_end1-_Z5sVPNoPfS_PiS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 224
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4sVPNPfS_PiS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4sVPNPfS_PiS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5sVPNoPfS_PiS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z5sVPNoPfS_PiS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
