#include "cp4Conv2dBackwardData.cuh"
#include "Tensor.cuh"
#include <iostream>
#include <stdlib.h>

using namespace std;

// Simple cuda error checking macro
#define ErrChk(ans) \
  { CudaAssert((ans), __FILE__, __LINE__); }
inline void
CudaAssert(cudaError_t code, const char* file, int line, bool abort = true) {
  if (code != cudaSuccess) {
    fprintf(
        stderr, "CudaAssert: %s %s %d\n", cudaGetErrorString(code), file, line);
    if (abort) exit(code);
  }
}

///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
float cp4_conv2d_backward_filter_full_gpu(tensor_shape s,
                                           float* FF,
                                           const float* In,
                                           const float* dLdO,
                                           unsigned     PROFCOUNT) {
  const unsigned sH = s.H+2*s.pad;
  const unsigned sW = s.W+2*s.pad;

  Tensor SharedInputTensor{ s.N, s.C, sH, sW };
  float* SHIn = SharedInputTensor.m_data;

  for (int n = 0; n < s.N; ++n)
  for (int c = 0; c < s.C; ++c)
  for (int h = 0; h < sH; ++h)
  for (int w = 0; w < sW; ++w) {
      SHIn[n*s.C*sH*sW + c*sH*sW + h*sW + w]
        = (h >= s.pad
            && h < s.H+s.pad
            && w >= s.pad
            && w < s.W+s.pad)
        ? In[n*s.C*s.H*s.W + c*s.H*s.W + (h-s.pad)*s.W + (w-s.pad)]
        : 0.0f;
  }

  for (int y = 0; y < s.Y; ++y)
  for (int x = 0; x < s.X; ++x)
  for (int n = 0; n < s.N; ++n)
  for (int t = 0; t < s.T; ++t)
  for (int c = 0; c < s.C; ++c)
  for (int h = 0; h < s.H; ++h)
  for (int w = 0; w < s.W; ++w)
    FF[t*s.C*s.X*s.Y + c*s.X*s.Y + y*s.X +x]
      += dLdO[n*s.T*s.H*s.W + t*s.H*s.W + h*s.W +w]
       * SHIn[n*s.C*sH*sW + c*sH*sW + (h+y)*sW + (w+x)];

  return 0;
}

///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
float cp4_conv2d_backward_filter_t_gpu(tensor_shape s,
                                       float* dFT,
                                       const float* In,
                                       const float* dLdO,
                                       const float* FC,
                                       const float* FY,
                                       const float* FX,
                                       unsigned     PROFCOUNT) {
  const unsigned sH = s.H+2*s.pad;
  const unsigned sW = s.W+2*s.pad;

  Tensor SharedInputTensor{ s.N, s.C, sH, sW };
  float* SHIn = SharedInputTensor.m_data;

  for (int n = 0; n < s.N; ++n)
  for (int c = 0; c < s.C; ++c)
  for (int h = 0; h < sH; ++h)
  for (int w = 0; w < sW; ++w) {
      SHIn[n*s.C*sH*sW + c*sH*sW + h*sW + w]
        = (h >= s.pad
            && h < s.H+s.pad
            && w >= s.pad
            && w < s.W+s.pad)
        ? In[n*s.C*s.H*s.W + c*s.H*s.W + (h-s.pad)*s.W + (w-s.pad)]
        : 0.0f;
  }

  for (int t = 0; t < s.T; ++t)
  for (int r = 0; r < s.Rank; ++r)
  for (int n = 0; n < s.N; ++n)
  for (int h = 0; h < s.H; ++h)
  for (int w = 0; w < s.W; ++w)
  for (int c = 0; c < s.C; ++c)
  for (int y = 0; y < s.Y; ++y)
  for (int x = 0; x < s.X; ++x)
    dFT[t*s.Rank + r] 
      += dLdO[n*s.T*s.H*s.W + t*s.H*s.W + h*s.W +w]
       * SHIn[n*s.C*sH*sW + c*sH*sW + (h+y)*sW + (w+x)]
       * FC[c*s.Rank + r]
       * FY[y*s.Rank + r]
       * FX[x*s.Rank + r];

  return 0;
}

///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
float cp4_conv2d_backward_filter_c_gpu(tensor_shape s,
                                       float* dFC,
                                       const float* In,
                                       const float* dLdO,
                                       const float* FT,
                                       const float* FY,
                                       const float* FX,
                                       unsigned     PROFCOUNT) {

  const unsigned sH = s.H+2*s.pad;
  const unsigned sW = s.W+2*s.pad;

  Tensor SharedInputTensor{ s.N, s.C, sH, sW };
  float* SHIn = SharedInputTensor.m_data;


  for (int n = 0; n < s.N; ++n)
  for (int c = 0; c < s.C; ++c)
  for (int h = 0; h < sH; ++h)
  for (int w = 0; w < sW; ++w) {
      SHIn[n*s.C*sH*sW + c*sH*sW + h*sW + w]
        = (h >= s.pad
            && h < s.H+s.pad
            && w >= s.pad
            && w < s.W+s.pad)
        ? In[n*s.C*s.H*s.W + c*s.H*s.W + (h-s.pad)*s.W + (w-s.pad)]
        : 0.0f;
  }


  for (int c = 0; c < s.C; ++c)
  for (int r = 0; r < s.Rank; ++r)
  for (int n = 0; n < s.N; ++n)
  for (int t = 0; t < s.T; ++t)
  for (int h = 0; h < s.H; ++h)
  for (int w = 0; w < s.W; ++w)
  for (int y = 0; y < s.Y; ++y)
  for (int x = 0; x < s.X; ++x)
    dFC[c*s.Rank + r] 
      += dLdO[n*s.T*s.H*s.W + t*s.H*s.W + h*s.W +w]
       * SHIn[n*s.C*sH*sW + c*sH*sW + (h+y)*sW + (w+x)]
      *FT[t*s.Rank + r]
      *FY[y*s.Rank + r]
      *FX[x*s.Rank + r];

  return 0;
}

///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
float cp4_conv2d_backward_filter_y_gpu(tensor_shape s,
                                       float* dFY,
                                       const float* In,
                                       const float* dLdO,
                                       const float* FT,
                                       const float* FC,
                                       const float* FX,
                                       unsigned     PROFCOUNT) {

  const unsigned sH = s.H+2*s.pad;
  const unsigned sW = s.W+2*s.pad;

  Tensor SharedInputTensor{ s.N, s.C, sH, sW };
  float* SHIn = SharedInputTensor.m_data;

  for (int n = 0; n < s.N; ++n)
  for (int c = 0; c < s.C; ++c)
  for (int h = 0; h < sH; ++h)
  for (int w = 0; w < sW; ++w) {
      SHIn[n*s.C*sH*sW + c*sH*sW + h*sW + w]
        = (h >= s.pad
            && h < s.H+s.pad
            && w >= s.pad
            && w < s.W+s.pad)
        ? In[n*s.C*s.H*s.W + c*s.H*s.W + (h-s.pad)*s.W + (w-s.pad)]
        : 0.0f;
  }


  for (int y = 0; y < s.Y; ++y)
  for (int r = 0; r < s.Rank; ++r)
  for (int n = 0; n < s.N; ++n)
  for (int h = 0; h < s.H; ++h)
  for (int w = 0; w < s.W; ++w)
  for (int c = 0; c < s.C; ++c)
  for (int t = 0; t < s.T; ++t)
  for (int x = 0; x < s.X; ++x)
    dFY[y*s.Rank + r] 
      += dLdO[n*s.T*s.H*s.W + t*s.H*s.W + h*s.W +w]
       * SHIn[n*s.C*sH*sW + c*sH*sW + (h+y)*sW + (w+x)]
      *FT[t*s.Rank + r]
      *FC[c*s.Rank + r]
      *FX[x*s.Rank + r];

  return 0;
}

///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
float cp4_conv2d_backward_filter_x_gpu(tensor_shape s,
                                       float* dFX,
                                       const float* In,
                                       const float* dLdO,
                                       const float* FT,
                                       const float* FC,
                                       const float* FY,
                                       unsigned     PROFCOUNT) {

  const unsigned sH = s.H+2*s.pad;
  const unsigned sW = s.W+2*s.pad;

  Tensor SharedInputTensor{ s.N, s.C, sH, sW };
  float* SHIn = SharedInputTensor.m_data;

  for (int n = 0; n < s.N; ++n)
  for (int c = 0; c < s.C; ++c)
  for (int h = 0; h < sH; ++h)
  for (int w = 0; w < sW; ++w) {
      SHIn[n*s.C*sH*sW + c*sH*sW + h*sW + w]
        = (h >= s.pad
            && h < s.H+s.pad
            && w >= s.pad
            && w < s.W+s.pad)
        ? In[n*s.C*s.H*s.W + c*s.H*s.W + (h-s.pad)*s.W + (w-s.pad)]
        : 0.0f;
  }

  for (int x = 0; x < s.X; ++x)
  for (int r = 0; r < s.Rank; ++r)
  for (int n = 0; n < s.N; ++n)
  for (int h = 0; h < s.H; ++h)
  for (int w = 0; w < s.W; ++w)
  for (int t = 0; t < s.T; ++t)
  for (int c = 0; c < s.C; ++c)
  for (int y = 0; y < s.Y; ++y)
    dFX[x*s.Rank + r] 
      += dLdO[n*s.T*s.H*s.W + t*s.H*s.W + h*s.W +w]
       * SHIn[n*s.C*sH*sW + c*sH*sW + (h+y)*sW + (w+x)]
      *FT[t*s.Rank + r]
      *FC[c*s.Rank + r]
      *FY[y*s.Rank + r];

  return 0;
}

	.file	"tmpxft_00295c00_00000000-6_cp4Conv2dBackwardFilter.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4668:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4668:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z35cp4_conv2d_backward_filter_full_gpu12tensor_shapePfPKfS2_j
	.type	_Z35cp4_conv2d_backward_filter_full_gpu12tensor_shapePfPKfS2_j, @function
_Z35cp4_conv2d_backward_filter_full_gpu12tensor_shapePfPKfS2_j:
.LFB4661:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%rdi, 96(%rsp)
	movl	252(%rsp), %ebp
	leaq	120(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	movl	248(%rsp), %r14d
	leaq	152(%rsp), %rsi
	movq	%rdx, 104(%rsp)
	movl	$4, %edx
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	movl	240(%rsp), %eax
	movl	%eax, 24(%rsp)
	movl	244(%rsp), %eax
	movl	%eax, 28(%rsp)
	movl	256(%rsp), %eax
	movl	%eax, 60(%rsp)
	movl	260(%rsp), %eax
	movl	%eax, 8(%rsp)
	movl	264(%rsp), %eax
	movl	%eax, 32(%rsp)
	movl	268(%rsp), %eax
	movl	%eax, 16(%rsp)
	movl	28(%rsp), %ecx
	leal	(%rbp,%rbp), %eax
	leal	(%rax,%r14), %r15d
	leal	(%rax,%rcx), %r12d
	movl	24(%rsp), %eax
	movl	%r15d, 164(%rsp)
	movl	%r12d, 160(%rsp)
	movl	%eax, 152(%rsp)
	movl	8(%rsp), %eax
	movl	%eax, 156(%rsp)
	call	_ZN6TensorC1ESt16initializer_listIjE@PLT
	movq	120(%rsp), %rax
	movl	8(%rsp), %esi
	xorl	%edi, %edi
	xorl	%r9d, %r9d
	movq	%rax, 48(%rsp)
	movl	%r12d, %eax
	imull	%r15d, %eax
	movl	%eax, 20(%rsp)
	imull	%esi, %eax
	movl	%eax, 80(%rsp)
	movl	28(%rsp), %eax
	imull	%r14d, %eax
	movl	%eax, 12(%rsp)
	imull	%esi, %eax
	movl	%eax, 56(%rsp)
	movl	%r14d, %eax
	imull	%ebp, %eax
	negl	%eax
	subl	%ebp, %eax
	movl	%eax, 36(%rsp)
	movl	%r12d, %eax
	subl	%ebp, %eax
	movl	%eax, 64(%rsp)
	movl	%r15d, %eax
	subl	%ebp, %eax
	movl	%eax, 68(%rsp)
.L3:
	movl	24(%rsp), %eax
	cmpl	%eax, %r9d
	jne	.L10
	movl	12(%rsp), %eax
	movl	60(%rsp), %ebx
	xorl	%edi, %edi
	movl	8(%rsp), %esi
	movl	16(%rsp), %ecx
	movl	%edi, 76(%rsp)
	imull	%ebx, %eax
	movl	%edi, 36(%rsp)
	movl	%eax, 92(%rsp)
	movl	32(%rsp), %eax
	imull	%esi, %eax
	xorl	%esi, %esi
	imull	%ecx, %eax
	movl	%eax, 88(%rsp)
	movl	32(%rsp), %eax
	imull	%ecx, %eax
	movl	%eax, 84(%rsp)
	jmp	.L11
.L10:
	movl	36(%rsp), %r8d
	movl	%edi, %esi
	xorl	%ecx, %ecx
.L12:
	movl	8(%rsp), %eax
	cmpl	%eax, %ecx
	je	.L8
	movl	%r8d, %r11d
	movl	%esi, %r10d
	xorl	%edx, %edx
.L9:
	cmpl	%r12d, %edx
	je	.L6
	xorl	%eax, %eax
.L7:
	cmpl	%r15d, %eax
	je	.L38
	xorps	%xmm0, %xmm0
	cmpl	%ebp, %edx
	jb	.L4
	movl	64(%rsp), %r13d
	cmpl	%r13d, %edx
	jnb	.L28
	cmpl	%ebp, %eax
	jb	.L28
	movl	68(%rsp), %r13d
	cmpl	%r13d, %eax
	jnb	.L4
	movq	40(%rsp), %rbx
	leal	(%rax,%r11), %r13d
	movss	(%rbx,%r13,4), %xmm0
	jmp	.L4
.L28:
	xorps	%xmm0, %xmm0
.L4:
	movq	48(%rsp), %rbx
	leal	(%rax,%r10), %r13d
	incl	%eax
	movss	%xmm0, (%rbx,%r13,4)
	jmp	.L7
.L38:
	incl	%edx
	addl	%r15d, %r10d
	addl	%r14d, %r11d
	jmp	.L9
.L6:
	movl	20(%rsp), %eax
	incl	%ecx
	addl	%eax, %esi
	movl	12(%rsp), %eax
	addl	%eax, %r8d
	jmp	.L12
.L8:
	movl	80(%rsp), %eax
	movl	56(%rsp), %ebx
	incl	%r9d
	addl	%ebx, 36(%rsp)
	addl	%eax, %edi
	jmp	.L3
.L22:
	incl	36(%rsp)
	movl	16(%rsp), %eax
	addl	%r15d, 76(%rsp)
	addl	%eax, %esi
.L11:
	movl	32(%rsp), %edx
	cmpl	%edx, 36(%rsp)
	je	.L24
	xorl	%eax, %eax
.L25:
	movl	16(%rsp), %edi
	cmpl	%edi, %eax
	je	.L22
	movl	76(%rsp), %edi
	xorl	%edx, %edx
	movl	%edx, 68(%rsp)
	leal	(%rax,%rdi), %ecx
	movl	%edx, 56(%rsp)
	movl	%ecx, 72(%rsp)
.L23:
	movl	24(%rsp), %edx
	cmpl	%edx, 56(%rsp)
	je	.L20
	movl	68(%rsp), %ebx
	xorl	%ecx, %ecx
	leal	(%rax,%rsi), %edi
	movl	%ecx, 40(%rsp)
	movl	%ebx, 64(%rsp)
.L21:
	movl	60(%rsp), %ecx
	cmpl	%ecx, 40(%rsp)
	je	.L18
	movl	72(%rsp), %r9d
	movl	%edi, %r10d
	xorl	%r8d, %r8d
.L19:
	movl	8(%rsp), %ecx
	cmpl	%ecx, %r8d
	je	.L16
	movq	96(%rsp), %rcx
	movl	%r10d, %edx
	movl	64(%rsp), %ebp
	movl	%r9d, %r12d
	xorl	%r11d, %r11d
	leaq	(%rcx,%rdx,4), %r13
.L17:
	movl	28(%rsp), %ecx
	cmpl	%ecx, %r11d
	je	.L14
	xorl	%edx, %edx
.L15:
	cmpl	%r14d, %edx
	je	.L39
	leal	(%rdx,%rbp), %ebx
	movq	%rbx, %rcx
	movq	104(%rsp), %rbx
	movss	(%rbx,%rcx,4), %xmm0
	movq	48(%rsp), %rcx
	leal	(%rdx,%r12), %ebx
	incl	%edx
	mulss	(%rcx,%rbx,4), %xmm0
	addss	0(%r13), %xmm0
	movss	%xmm0, 0(%r13)
	jmp	.L15
.L39:
	incl	%r11d
	addl	%r14d, %ebp
	addl	%r15d, %r12d
	jmp	.L17
.L14:
	movl	20(%rsp), %ecx
	incl	%r8d
	addl	%ecx, %r9d
	movl	84(%rsp), %ecx
	addl	%ecx, %r10d
	jmp	.L19
.L16:
	movl	88(%rsp), %ebx
	movl	12(%rsp), %ecx
	incl	40(%rsp)
	addl	%ecx, 64(%rsp)
	addl	%ebx, %edi
	jmp	.L21
.L18:
	movl	92(%rsp), %edx
	movl	80(%rsp), %ebx
	incl	56(%rsp)
	addl	%edx, 68(%rsp)
	addl	%ebx, 72(%rsp)
	jmp	.L23
.L20:
	incl	%eax
	jmp	.L25
.L24:
	leaq	120(%rsp), %rdi
	call	_ZN6TensorD1Ev@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	xorps	%xmm0, %xmm0
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4661:
	.size	_Z35cp4_conv2d_backward_filter_full_gpu12tensor_shapePfPKfS2_j, .-_Z35cp4_conv2d_backward_filter_full_gpu12tensor_shapePfPKfS2_j
	.globl	_Z32cp4_conv2d_backward_filter_t_gpu12tensor_shapePfPKfS2_S2_S2_S2_j
	.type	_Z32cp4_conv2d_backward_filter_t_gpu12tensor_shapePfPKfS2_S2_S2_S2_j, @function
_Z32cp4_conv2d_backward_filter_t_gpu12tensor_shapePfPKfS2_S2_S2_S2_j:
.LFB4662:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	movq	%r9, 152(%rsp)
	movl	300(%rsp), %ebx
	movq	%rdi, 120(%rsp)
	movl	296(%rsp), %r13d
	leaq	168(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	200(%rsp), %rsi
	movq	%rdx, 128(%rsp)
	movl	$4, %edx
	movq	%rcx, 136(%rsp)
	movq	%r8, 144(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	movl	288(%rsp), %eax
	movl	%eax, 16(%rsp)
	movl	292(%rsp), %eax
	movl	%eax, 20(%rsp)
	movl	304(%rsp), %eax
	movl	%eax, 56(%rsp)
	movl	308(%rsp), %eax
	movl	%eax, 4(%rsp)
	movl	320(%rsp), %eax
	movl	20(%rsp), %ecx
	movl	%eax, 8(%rsp)
	leal	(%rbx,%rbx), %eax
	leal	(%rax,%rcx), %ebp
	leal	(%rax,%r13), %r14d
	movl	16(%rsp), %eax
	movl	%ebp, 208(%rsp)
	movl	%eax, 200(%rsp)
	movl	4(%rsp), %eax
	movl	%r14d, 212(%rsp)
	movl	%eax, 204(%rsp)
	call	_ZN6TensorC1ESt16initializer_listIjE@PLT
	movq	168(%rsp), %rax
	xorl	%edi, %edi
	xorl	%r9d, %r9d
	movq	%rax, 48(%rsp)
	movl	%ebp, %eax
	imull	%r14d, %eax
	movl	%eax, 24(%rsp)
	movl	4(%rsp), %eax
	movl	24(%rsp), %ecx
	imull	%ecx, %eax
	movl	%eax, 104(%rsp)
	movl	20(%rsp), %eax
	imull	%r13d, %eax
	movl	%eax, 12(%rsp)
	movl	4(%rsp), %eax
	movl	12(%rsp), %esi
	imull	%esi, %eax
	movl	%eax, 40(%rsp)
	movl	%r13d, %eax
	imull	%ebx, %eax
	negl	%eax
	subl	%ebx, %eax
	movl	%eax, 28(%rsp)
	movl	%ebp, %eax
	subl	%ebx, %eax
	movl	%eax, 44(%rsp)
	movl	%r14d, %eax
	subl	%ebx, %eax
	movl	%eax, 60(%rsp)
.L41:
	movl	16(%rsp), %eax
	cmpl	%eax, %r9d
	je	.L48
	movl	28(%rsp), %r8d
	movl	%edi, %esi
	xorl	%ecx, %ecx
.L49:
	movl	4(%rsp), %eax
	cmpl	%eax, %ecx
	je	.L46
	movl	%r8d, %r11d
	movl	%esi, %r10d
	xorl	%edx, %edx
.L47:
	cmpl	%ebp, %edx
	je	.L44
	xorl	%eax, %eax
.L45:
	cmpl	%r14d, %eax
	je	.L77
	xorps	%xmm0, %xmm0
	cmpl	%ebx, %edx
	jb	.L42
	movl	44(%rsp), %r12d
	cmpl	%r12d, %edx
	jnb	.L68
	cmpl	%ebx, %eax
	jb	.L68
	movl	60(%rsp), %r12d
	cmpl	%r12d, %eax
	jnb	.L42
	movq	32(%rsp), %r15
	leal	(%rax,%r11), %r12d
	movss	(%r15,%r12,4), %xmm0
	jmp	.L42
.L68:
	xorps	%xmm0, %xmm0
.L42:
	movq	48(%rsp), %r15
	leal	(%rax,%r10), %r12d
	incl	%eax
	movss	%xmm0, (%r15,%r12,4)
	jmp	.L45
.L77:
	incl	%edx
	addl	%r14d, %r10d
	addl	%r13d, %r11d
	jmp	.L47
.L44:
	movl	24(%rsp), %eax
	incl	%ecx
	addl	%eax, %esi
	movl	12(%rsp), %eax
	addl	%eax, %r8d
	jmp	.L49
.L46:
	movl	104(%rsp), %eax
	movl	40(%rsp), %edx
	incl	%r9d
	addl	%edx, 28(%rsp)
	addl	%eax, %edi
	jmp	.L41
.L48:
	movl	312(%rsp), %eax
	movl	12(%rsp), %ebx
	xorl	%edi, %edi
	xorl	%r8d, %r8d
	movl	%edi, 76(%rsp)
	movl	%eax, 112(%rsp)
	movl	316(%rsp), %eax
	movl	%edi, 28(%rsp)
	movl	%eax, 108(%rsp)
	movl	56(%rsp), %eax
	imull	%ebx, %eax
	movl	%eax, 116(%rsp)
.L50:
	movl	56(%rsp), %edi
	cmpl	%edi, 28(%rsp)
	je	.L64
	xorl	%eax, %eax
.L65:
	movl	8(%rsp), %edi
	cmpl	%edi, %eax
	je	.L62
	movq	120(%rsp), %rdi
	leal	(%rax,%r8), %edx
	leaq	(%rdi,%rdx,4), %r9
	movl	76(%rsp), %edi
	xorl	%edx, %edx
	movl	%edx, 72(%rsp)
	movl	%edi, 68(%rsp)
	movl	%edx, 40(%rsp)
.L63:
	movl	16(%rsp), %edx
	cmpl	%edx, 40(%rsp)
	je	.L60
	movl	68(%rsp), %edx
	xorl	%ecx, %ecx
	movl	72(%rsp), %edi
	movl	%ecx, 32(%rsp)
	movl	%edx, 64(%rsp)
.L61:
	movl	20(%rsp), %ebx
	cmpl	%ebx, 32(%rsp)
	je	.L58
	xorl	%edx, %edx
.L59:
	cmpl	%r13d, %edx
	je	.L56
	movl	64(%rsp), %esi
	movq	128(%rsp), %rbx
	movl	%eax, 60(%rsp)
	leal	(%rdx,%rdi), %r10d
	leal	(%rdx,%rsi), %ecx
	xorl	%esi, %esi
	leaq	(%rbx,%rcx,4), %rcx
	movl	%esi, 44(%rsp)
	movq	%rcx, 80(%rsp)
.L57:
	movl	4(%rsp), %ecx
	cmpl	%ecx, 44(%rsp)
	je	.L54
	movl	60(%rsp), %ecx
	movq	136(%rsp), %rbx
	movl	%r10d, %ebp
	xorl	%r11d, %r11d
	leaq	(%rbx,%rcx,4), %rbx
	movq	%rbx, 88(%rsp)
	movl	%eax, %ebx
.L55:
	movl	112(%rsp), %ecx
	cmpl	%ecx, %r11d
	je	.L52
	movq	144(%rsp), %rsi
	movl	%ebx, %ecx
	movl	%eax, %r12d
	leaq	(%rsi,%rcx,4), %rcx
	movq	%rcx, 96(%rsp)
	xorl	%ecx, %ecx
.L53:
	movl	108(%rsp), %esi
	cmpl	%esi, %ecx
	je	.L78
	movq	48(%rsp), %rsi
	leal	(%rcx,%rbp), %r15d
	incl	%ecx
	movss	(%rsi,%r15,4), %xmm0
	movq	80(%rsp), %rsi
	movl	%r12d, %r15d
	mulss	(%rsi), %xmm0
	movq	88(%rsp), %rsi
	mulss	(%rsi), %xmm0
	movq	96(%rsp), %rsi
	mulss	(%rsi), %xmm0
	movq	152(%rsp), %rsi
	mulss	(%rsi,%r15,4), %xmm0
	movl	8(%rsp), %esi
	addss	(%r9), %xmm0
	addl	%esi, %r12d
	movss	%xmm0, (%r9)
	jmp	.L53
.L78:
	movl	8(%rsp), %ecx
	incl	%r11d
	addl	%r14d, %ebp
	addl	%ecx, %ebx
	jmp	.L55
.L52:
	movl	24(%rsp), %ebx
	movl	8(%rsp), %ecx
	incl	44(%rsp)
	addl	%ecx, 60(%rsp)
	addl	%ebx, %r10d
	jmp	.L57
.L54:
	incl	%edx
	jmp	.L59
.L56:
	incl	32(%rsp)
	addl	%r14d, %edi
	addl	%r13d, 64(%rsp)
	jmp	.L61
.L58:
	movl	116(%rsp), %edi
	movl	104(%rsp), %edx
	incl	40(%rsp)
	addl	%edi, 68(%rsp)
	addl	%edx, 72(%rsp)
	jmp	.L63
.L60:
	incl	%eax
	jmp	.L65
.L62:
	movl	8(%rsp), %eax
	movl	12(%rsp), %edx
	incl	28(%rsp)
	addl	%edx, 76(%rsp)
	addl	%eax, %r8d
	jmp	.L50
.L64:
	leaq	168(%rsp), %rdi
	call	_ZN6TensorD1Ev@PLT
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L66
	call	__stack_chk_fail@PLT
.L66:
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	xorps	%xmm0, %xmm0
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4662:
	.size	_Z32cp4_conv2d_backward_filter_t_gpu12tensor_shapePfPKfS2_S2_S2_S2_j, .-_Z32cp4_conv2d_backward_filter_t_gpu12tensor_shapePfPKfS2_S2_S2_S2_j
	.globl	_Z32cp4_conv2d_backward_filter_c_gpu12tensor_shapePfPKfS2_S2_S2_S2_j
	.type	_Z32cp4_conv2d_backward_filter_c_gpu12tensor_shapePfPKfS2_S2_S2_S2_j, @function
_Z32cp4_conv2d_backward_filter_c_gpu12tensor_shapePfPKfS2_S2_S2_S2_j:
.LFB4663:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	movq	%r9, 152(%rsp)
	movl	300(%rsp), %r12d
	movq	%rdi, 120(%rsp)
	movl	296(%rsp), %ebp
	leaq	168(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leal	(%r12,%r12), %ebx
	leaq	200(%rsp), %rsi
	movq	%rdx, 128(%rsp)
	movl	$4, %edx
	movq	%rcx, 136(%rsp)
	movq	%r8, 144(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	movl	288(%rsp), %eax
	movl	%eax, 16(%rsp)
	movl	292(%rsp), %eax
	movl	%eax, 20(%rsp)
	movl	304(%rsp), %eax
	movl	%eax, 56(%rsp)
	movl	308(%rsp), %eax
	movl	%eax, 4(%rsp)
	movl	320(%rsp), %eax
	movl	%eax, 8(%rsp)
	movl	20(%rsp), %eax
	leal	(%rbx,%rax), %r13d
	movl	16(%rsp), %eax
	addl	%ebp, %ebx
	movl	%r13d, 208(%rsp)
	movl	%eax, 200(%rsp)
	movl	4(%rsp), %eax
	movl	%ebx, 212(%rsp)
	movl	%eax, 204(%rsp)
	call	_ZN6TensorC1ESt16initializer_listIjE@PLT
	movl	4(%rsp), %r15d
	xorl	%edi, %edi
	xorl	%r9d, %r9d
	movq	168(%rsp), %rax
	movq	%rax, 48(%rsp)
	movl	%r13d, %eax
	imull	%ebx, %eax
	movl	%eax, 24(%rsp)
	movl	4(%rsp), %eax
	movl	24(%rsp), %esi
	imull	%esi, %eax
	movl	%eax, 104(%rsp)
	movl	20(%rsp), %eax
	imull	%ebp, %eax
	imull	%eax, %r15d
	movl	%eax, 12(%rsp)
	movl	%ebp, %eax
	imull	%r12d, %eax
	movl	%r15d, 40(%rsp)
	negl	%eax
	subl	%r12d, %eax
	movl	%eax, 28(%rsp)
	movl	%r13d, %eax
	subl	%r12d, %eax
	movl	%eax, 44(%rsp)
	movl	%ebx, %eax
	subl	%r12d, %eax
	movl	%eax, 60(%rsp)
.L80:
	movl	16(%rsp), %eax
	cmpl	%eax, %r9d
	je	.L87
	movl	28(%rsp), %r8d
	movl	%edi, %esi
	xorl	%ecx, %ecx
.L88:
	movl	4(%rsp), %eax
	cmpl	%eax, %ecx
	je	.L85
	movl	%r8d, %r11d
	movl	%esi, %r10d
	xorl	%edx, %edx
.L86:
	cmpl	%r13d, %edx
	je	.L83
	xorl	%eax, %eax
.L84:
	cmpl	%ebx, %eax
	je	.L116
	xorps	%xmm0, %xmm0
	cmpl	%r12d, %edx
	jb	.L81
	movl	44(%rsp), %r14d
	cmpl	%r14d, %edx
	jnb	.L107
	cmpl	%r12d, %eax
	jb	.L107
	movl	60(%rsp), %r14d
	cmpl	%r14d, %eax
	jnb	.L81
	movq	32(%rsp), %r15
	leal	(%rax,%r11), %r14d
	movss	(%r15,%r14,4), %xmm0
	jmp	.L81
.L107:
	xorps	%xmm0, %xmm0
.L81:
	movq	48(%rsp), %r15
	leal	(%rax,%r10), %r14d
	incl	%eax
	movss	%xmm0, (%r15,%r14,4)
	jmp	.L84
.L116:
	incl	%edx
	addl	%ebx, %r10d
	addl	%ebp, %r11d
	jmp	.L86
.L83:
	movl	24(%rsp), %eax
	incl	%ecx
	addl	%eax, %esi
	movl	12(%rsp), %eax
	addl	%eax, %r8d
	jmp	.L88
.L85:
	movl	104(%rsp), %eax
	movl	40(%rsp), %esi
	incl	%r9d
	addl	%esi, 28(%rsp)
	addl	%eax, %edi
	jmp	.L80
.L87:
	movl	312(%rsp), %eax
	movl	12(%rsp), %esi
	xorl	%r13d, %r13d
	xorl	%r14d, %r14d
	movl	%r13d, 76(%rsp)
	xorl	%r13d, %r13d
	movl	%eax, 112(%rsp)
	movl	316(%rsp), %eax
	movl	%eax, 108(%rsp)
	movl	56(%rsp), %eax
	imull	%esi, %eax
	movl	%eax, 116(%rsp)
.L89:
	movl	4(%rsp), %eax
	cmpl	%eax, %r13d
	je	.L103
	xorl	%eax, %eax
.L104:
	movl	8(%rsp), %edi
	cmpl	%edi, %eax
	je	.L101
	movl	76(%rsp), %edi
	movq	120(%rsp), %rcx
	movl	%r14d, 72(%rsp)
	leal	(%rax,%rdi), %edx
	leaq	(%rcx,%rdx,4), %r9
	xorl	%edx, %edx
	movl	%edx, 68(%rsp)
	movl	%edx, 28(%rsp)
.L102:
	movl	16(%rsp), %esi
	cmpl	%esi, 28(%rsp)
	je	.L99
	movl	68(%rsp), %edx
	xorl	%ecx, %ecx
	movl	%eax, 64(%rsp)
	movl	%ecx, 40(%rsp)
	movl	%edx, 60(%rsp)
.L100:
	movl	56(%rsp), %edx
	cmpl	%edx, 40(%rsp)
	je	.L97
	movq	136(%rsp), %rdi
	movl	64(%rsp), %edx
	xorl	%esi, %esi
	movl	%esi, 32(%rsp)
	movl	72(%rsp), %r8d
	leaq	(%rdi,%rdx,4), %rdx
	movl	60(%rsp), %edi
	movq	%rdx, 88(%rsp)
.L98:
	movl	20(%rsp), %ecx
	cmpl	%ecx, 32(%rsp)
	je	.L95
	xorl	%edx, %edx
.L96:
	cmpl	%ebp, %edx
	je	.L93
	leal	(%rdx,%rdi), %ecx
	xorl	%r12d, %r12d
	leal	(%rdx,%r8), %r11d
	movl	%eax, %r10d
	movq	128(%rsp), %rsi
	movl	%r12d, 44(%rsp)
	leaq	(%rsi,%rcx,4), %rcx
	movq	%rcx, 80(%rsp)
.L94:
	movl	112(%rsp), %esi
	cmpl	%esi, 44(%rsp)
	je	.L91
	movq	144(%rsp), %rsi
	movl	%r10d, %ecx
	movl	%eax, %r12d
	leaq	(%rsi,%rcx,4), %rcx
	movq	%rcx, 96(%rsp)
	xorl	%ecx, %ecx
.L92:
	movl	108(%rsp), %esi
	cmpl	%esi, %ecx
	je	.L117
	movq	48(%rsp), %rsi
	leal	(%rcx,%r11), %r15d
	incl	%ecx
	movss	(%rsi,%r15,4), %xmm0
	movq	80(%rsp), %rsi
	movl	%r12d, %r15d
	mulss	(%rsi), %xmm0
	movq	88(%rsp), %rsi
	mulss	(%rsi), %xmm0
	movq	96(%rsp), %rsi
	mulss	(%rsi), %xmm0
	movq	152(%rsp), %rsi
	mulss	(%rsi,%r15,4), %xmm0
	movl	8(%rsp), %esi
	addss	(%r9), %xmm0
	addl	%esi, %r12d
	movss	%xmm0, (%r9)
	jmp	.L92
.L117:
	movl	8(%rsp), %ecx
	incl	44(%rsp)
	addl	%ebx, %r11d
	addl	%ecx, %r10d
	jmp	.L94
.L91:
	incl	%edx
	jmp	.L96
.L93:
	incl	32(%rsp)
	addl	%ebp, %edi
	addl	%ebx, %r8d
	jmp	.L98
.L95:
	movl	12(%rsp), %edi
	movl	8(%rsp), %edx
	incl	40(%rsp)
	addl	%edi, 60(%rsp)
	addl	%edx, 64(%rsp)
	jmp	.L100
.L97:
	movl	116(%rsp), %edi
	movl	104(%rsp), %edx
	incl	28(%rsp)
	addl	%edi, 68(%rsp)
	addl	%edx, 72(%rsp)
	jmp	.L102
.L99:
	incl	%eax
	jmp	.L104
.L101:
	movl	24(%rsp), %eax
	incl	%r13d
	addl	%eax, %r14d
	movl	8(%rsp), %eax
	addl	%eax, 76(%rsp)
	jmp	.L89
.L103:
	leaq	168(%rsp), %rdi
	call	_ZN6TensorD1Ev@PLT
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L105
	call	__stack_chk_fail@PLT
.L105:
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	xorps	%xmm0, %xmm0
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4663:
	.size	_Z32cp4_conv2d_backward_filter_c_gpu12tensor_shapePfPKfS2_S2_S2_S2_j, .-_Z32cp4_conv2d_backward_filter_c_gpu12tensor_shapePfPKfS2_S2_S2_S2_j
	.globl	_Z32cp4_conv2d_backward_filter_y_gpu12tensor_shapePfPKfS2_S2_S2_S2_j
	.type	_Z32cp4_conv2d_backward_filter_y_gpu12tensor_shapePfPKfS2_S2_S2_S2_j, @function
_Z32cp4_conv2d_backward_filter_y_gpu12tensor_shapePfPKfS2_S2_S2_S2_j:
.LFB4664:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	movq	%r9, 152(%rsp)
	movl	300(%rsp), %ebx
	movq	%rdi, 120(%rsp)
	movl	296(%rsp), %r14d
	movq	%rsi, 32(%rsp)
	leaq	200(%rsp), %rsi
	movq	%rdx, 128(%rsp)
	movl	$4, %edx
	movq	%rcx, 136(%rsp)
	movq	%r8, 144(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	movl	288(%rsp), %eax
	movl	%eax, 16(%rsp)
	movl	292(%rsp), %eax
	movl	%eax, 20(%rsp)
	movl	304(%rsp), %eax
	movl	%eax, 56(%rsp)
	movl	308(%rsp), %eax
	movl	%eax, 4(%rsp)
	movl	320(%rsp), %eax
	movl	20(%rsp), %edi
	movl	%eax, 8(%rsp)
	leal	(%rbx,%rbx), %eax
	leal	(%rax,%rdi), %ebp
	leal	(%rax,%r14), %r13d
	movl	16(%rsp), %eax
	leaq	168(%rsp), %rdi
	movl	%ebp, 208(%rsp)
	movl	%eax, 200(%rsp)
	movl	4(%rsp), %eax
	movl	%r13d, 212(%rsp)
	movl	%eax, 204(%rsp)
	call	_ZN6TensorC1ESt16initializer_listIjE@PLT
	movq	168(%rsp), %rax
	xorl	%r9d, %r9d
	movq	%rax, 48(%rsp)
	movl	%ebp, %eax
	imull	%r13d, %eax
	movl	%eax, 24(%rsp)
	movl	4(%rsp), %eax
	movl	24(%rsp), %edi
	imull	%edi, %eax
	xorl	%edi, %edi
	movl	%eax, 104(%rsp)
	movl	20(%rsp), %eax
	imull	%r14d, %eax
	movl	%eax, 12(%rsp)
	movl	4(%rsp), %eax
	movl	12(%rsp), %esi
	imull	%esi, %eax
	movl	%eax, 40(%rsp)
	movl	%r14d, %eax
	imull	%ebx, %eax
	negl	%eax
	subl	%ebx, %eax
	movl	%eax, 28(%rsp)
	movl	%ebp, %eax
	subl	%ebx, %eax
	movl	%eax, 44(%rsp)
	movl	%r13d, %eax
	subl	%ebx, %eax
	movl	%eax, 60(%rsp)
.L119:
	movl	16(%rsp), %eax
	cmpl	%eax, %r9d
	je	.L126
	movl	28(%rsp), %r8d
	movl	%edi, %esi
	xorl	%ecx, %ecx
.L127:
	movl	4(%rsp), %eax
	cmpl	%eax, %ecx
	je	.L124
	movl	%r8d, %r11d
	movl	%esi, %r10d
	xorl	%edx, %edx
.L125:
	cmpl	%ebp, %edx
	je	.L122
	xorl	%eax, %eax
.L123:
	cmpl	%r13d, %eax
	je	.L155
	xorps	%xmm0, %xmm0
	cmpl	%ebx, %edx
	jb	.L120
	movl	44(%rsp), %r12d
	cmpl	%r12d, %edx
	jnb	.L146
	cmpl	%ebx, %eax
	jb	.L146
	movl	60(%rsp), %r12d
	cmpl	%r12d, %eax
	jnb	.L120
	movq	32(%rsp), %r15
	leal	(%rax,%r11), %r12d
	movss	(%r15,%r12,4), %xmm0
	jmp	.L120
.L146:
	xorps	%xmm0, %xmm0
.L120:
	movq	48(%rsp), %r15
	leal	(%rax,%r10), %r12d
	incl	%eax
	movss	%xmm0, (%r15,%r12,4)
	jmp	.L123
.L155:
	incl	%edx
	addl	%r13d, %r10d
	addl	%r14d, %r11d
	jmp	.L125
.L122:
	movl	24(%rsp), %eax
	incl	%ecx
	addl	%eax, %esi
	movl	12(%rsp), %eax
	addl	%eax, %r8d
	jmp	.L127
.L124:
	movl	104(%rsp), %eax
	movl	40(%rsp), %edx
	incl	%r9d
	addl	%edx, 28(%rsp)
	addl	%eax, %edi
	jmp	.L119
.L126:
	movl	316(%rsp), %eax
	movl	12(%rsp), %ecx
	xorl	%r12d, %r12d
	xorl	%edi, %edi
	movl	%r12d, 76(%rsp)
	xorl	%r12d, %r12d
	movl	%eax, 108(%rsp)
	movl	312(%rsp), %eax
	movl	%eax, 116(%rsp)
	movl	56(%rsp), %eax
	imull	%ecx, %eax
	movl	%eax, 112(%rsp)
.L128:
	movl	116(%rsp), %eax
	cmpl	%eax, %r12d
	je	.L142
	xorl	%eax, %eax
.L143:
	movl	8(%rsp), %edx
	cmpl	%edx, %eax
	je	.L140
	movq	120(%rsp), %rbx
	leal	(%rax,%rdi), %edx
	leaq	(%rbx,%rdx,4), %r8
	movl	76(%rsp), %edx
	movl	%edx, 68(%rsp)
	xorl	%edx, %edx
	movl	%edx, 72(%rsp)
	movl	%edx, 28(%rsp)
.L141:
	movl	16(%rsp), %ebx
	cmpl	%ebx, 28(%rsp)
	je	.L138
	movl	72(%rsp), %edx
	xorl	%ecx, %ecx
	movl	68(%rsp), %r10d
	movl	%ecx, 40(%rsp)
	movl	%edx, 64(%rsp)
.L139:
	movl	20(%rsp), %ebx
	cmpl	%ebx, 40(%rsp)
	je	.L136
	xorl	%edx, %edx
.L137:
	cmpl	%r14d, %edx
	je	.L134
	xorl	%esi, %esi
	movl	%eax, 60(%rsp)
	leal	(%rdx,%r10), %r9d
	movl	%esi, 32(%rsp)
.L135:
	movl	4(%rsp), %ecx
	cmpl	%ecx, 32(%rsp)
	je	.L132
	movl	60(%rsp), %ecx
	movq	144(%rsp), %rbx
	xorl	%ebp, %ebp
	movl	%eax, %r11d
	movl	%ebp, 44(%rsp)
	leaq	(%rbx,%rcx,4), %rbx
	movq	%rbx, 96(%rsp)
	movl	64(%rsp), %ebx
	addl	%edx, %ebx
.L133:
	movl	56(%rsp), %esi
	cmpl	%esi, 44(%rsp)
	je	.L130
	movq	128(%rsp), %rsi
	movl	%ebx, %ecx
	movl	%eax, %ebp
	leaq	(%rsi,%rcx,4), %rcx
	movq	136(%rsp), %rsi
	movq	%rcx, 80(%rsp)
	movl	%r11d, %ecx
	leaq	(%rsi,%rcx,4), %rcx
	movq	%rcx, 88(%rsp)
	xorl	%ecx, %ecx
.L131:
	movl	108(%rsp), %esi
	cmpl	%esi, %ecx
	je	.L156
	movq	48(%rsp), %rsi
	leal	(%rcx,%r9), %r15d
	incl	%ecx
	movss	(%rsi,%r15,4), %xmm0
	movq	80(%rsp), %rsi
	movl	%ebp, %r15d
	mulss	(%rsi), %xmm0
	movq	88(%rsp), %rsi
	mulss	(%rsi), %xmm0
	movq	96(%rsp), %rsi
	mulss	(%rsi), %xmm0
	movq	152(%rsp), %rsi
	mulss	(%rsi,%r15,4), %xmm0
	movl	8(%rsp), %esi
	addss	(%r8), %xmm0
	addl	%esi, %ebp
	movss	%xmm0, (%r8)
	jmp	.L131
.L156:
	movl	12(%rsp), %ecx
	incl	44(%rsp)
	addl	%ecx, %ebx
	movl	8(%rsp), %ecx
	addl	%ecx, %r11d
	jmp	.L133
.L130:
	movl	24(%rsp), %ebx
	movl	8(%rsp), %ecx
	incl	32(%rsp)
	addl	%ecx, 60(%rsp)
	addl	%ebx, %r9d
	jmp	.L135
.L132:
	incl	%edx
	jmp	.L137
.L134:
	incl	40(%rsp)
	addl	%r13d, %r10d
	addl	%r14d, 64(%rsp)
	jmp	.L139
.L136:
	movl	104(%rsp), %edx
	incl	28(%rsp)
	addl	%edx, 68(%rsp)
	movl	112(%rsp), %edx
	addl	%edx, 72(%rsp)
	jmp	.L141
.L138:
	incl	%eax
	jmp	.L143
.L140:
	movl	8(%rsp), %eax
	addl	%r13d, 76(%rsp)
	incl	%r12d
	addl	%eax, %edi
	jmp	.L128
.L142:
	leaq	168(%rsp), %rdi
	call	_ZN6TensorD1Ev@PLT
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L144
	call	__stack_chk_fail@PLT
.L144:
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	xorps	%xmm0, %xmm0
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4664:
	.size	_Z32cp4_conv2d_backward_filter_y_gpu12tensor_shapePfPKfS2_S2_S2_S2_j, .-_Z32cp4_conv2d_backward_filter_y_gpu12tensor_shapePfPKfS2_S2_S2_S2_j
	.globl	_Z32cp4_conv2d_backward_filter_x_gpu12tensor_shapePfPKfS2_S2_S2_S2_j
	.type	_Z32cp4_conv2d_backward_filter_x_gpu12tensor_shapePfPKfS2_S2_S2_S2_j, @function
_Z32cp4_conv2d_backward_filter_x_gpu12tensor_shapePfPKfS2_S2_S2_S2_j:
.LFB4665:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	movq	%r9, 152(%rsp)
	movl	300(%rsp), %ebx
	movq	%rdi, 120(%rsp)
	movl	296(%rsp), %r14d
	leaq	168(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	200(%rsp), %rsi
	movq	%rdx, 128(%rsp)
	movl	$4, %edx
	movq	%rcx, 136(%rsp)
	movq	%r8, 144(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	movl	288(%rsp), %eax
	movl	%eax, 16(%rsp)
	movl	292(%rsp), %eax
	movl	%eax, 20(%rsp)
	movl	304(%rsp), %eax
	movl	%eax, 52(%rsp)
	movl	308(%rsp), %eax
	movl	%eax, 4(%rsp)
	movl	320(%rsp), %eax
	movl	20(%rsp), %ecx
	movl	%eax, 8(%rsp)
	leal	(%rbx,%rbx), %eax
	leal	(%rax,%rcx), %ebp
	leal	(%rax,%r14), %r13d
	movl	16(%rsp), %eax
	movl	%ebp, 208(%rsp)
	movl	%eax, 200(%rsp)
	movl	4(%rsp), %eax
	movl	%r13d, 212(%rsp)
	movl	%eax, 204(%rsp)
	call	_ZN6TensorC1ESt16initializer_listIjE@PLT
	movq	168(%rsp), %rax
	xorl	%edi, %edi
	xorl	%r9d, %r9d
	movq	%rax, 40(%rsp)
	movl	%ebp, %eax
	imull	%r13d, %eax
	movl	%eax, 24(%rsp)
	movl	4(%rsp), %eax
	movl	24(%rsp), %ecx
	imull	%ecx, %eax
	movl	%eax, 104(%rsp)
	movl	20(%rsp), %eax
	imull	%r14d, %eax
	movl	%eax, 12(%rsp)
	movl	4(%rsp), %eax
	movl	12(%rsp), %esi
	imull	%esi, %eax
	movl	%eax, 48(%rsp)
	movl	%r14d, %eax
	imull	%ebx, %eax
	negl	%eax
	subl	%ebx, %eax
	movl	%eax, 28(%rsp)
	movl	%ebp, %eax
	subl	%ebx, %eax
	movl	%eax, 56(%rsp)
	movl	%r13d, %eax
	subl	%ebx, %eax
	movl	%eax, 60(%rsp)
.L158:
	movl	16(%rsp), %eax
	cmpl	%eax, %r9d
	je	.L165
	movl	28(%rsp), %r8d
	movl	%edi, %esi
	xorl	%ecx, %ecx
.L166:
	movl	4(%rsp), %eax
	cmpl	%eax, %ecx
	je	.L163
	movl	%r8d, %r11d
	movl	%esi, %r10d
	xorl	%edx, %edx
.L164:
	cmpl	%ebp, %edx
	je	.L161
	xorl	%eax, %eax
.L162:
	cmpl	%r13d, %eax
	je	.L194
	xorps	%xmm0, %xmm0
	cmpl	%ebx, %edx
	jb	.L159
	movl	56(%rsp), %r12d
	cmpl	%r12d, %edx
	jnb	.L185
	cmpl	%ebx, %eax
	jb	.L185
	movl	60(%rsp), %r12d
	cmpl	%r12d, %eax
	jnb	.L159
	movq	32(%rsp), %r15
	leal	(%rax,%r11), %r12d
	movss	(%r15,%r12,4), %xmm0
	jmp	.L159
.L185:
	xorps	%xmm0, %xmm0
.L159:
	movq	40(%rsp), %r15
	leal	(%rax,%r10), %r12d
	incl	%eax
	movss	%xmm0, (%r15,%r12,4)
	jmp	.L162
.L194:
	incl	%edx
	addl	%r13d, %r10d
	addl	%r14d, %r11d
	jmp	.L164
.L161:
	movl	24(%rsp), %eax
	incl	%ecx
	addl	%eax, %esi
	movl	12(%rsp), %eax
	addl	%eax, %r8d
	jmp	.L166
.L163:
	movl	104(%rsp), %eax
	movl	48(%rsp), %ecx
	incl	%r9d
	addl	%ecx, 28(%rsp)
	addl	%eax, %edi
	jmp	.L158
.L165:
	movl	312(%rsp), %eax
	movl	12(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r12d, %r12d
	movl	%r9d, 76(%rsp)
	movl	%eax, 108(%rsp)
	movl	316(%rsp), %eax
	movl	%eax, 116(%rsp)
	movl	52(%rsp), %eax
	imull	%esi, %eax
	movl	%eax, 112(%rsp)
.L167:
	movl	116(%rsp), %eax
	cmpl	%eax, %r12d
	je	.L181
	xorl	%eax, %eax
.L182:
	movl	8(%rsp), %esi
	cmpl	%esi, %eax
	je	.L179
	movl	76(%rsp), %esi
	movl	%r12d, 72(%rsp)
	leal	(%rax,%rsi), %edx
	movq	120(%rsp), %rsi
	leaq	(%rsi,%rdx,4), %rsi
	xorl	%edx, %edx
	movl	%edx, 68(%rsp)
	movl	%edx, 28(%rsp)
.L180:
	movl	16(%rsp), %edx
	cmpl	%edx, 28(%rsp)
	je	.L177
	xorl	%ecx, %ecx
	movl	72(%rsp), %r9d
	movl	68(%rsp), %edi
	movl	%ecx, 48(%rsp)
.L178:
	movl	20(%rsp), %ebx
	cmpl	%ebx, 48(%rsp)
	je	.L175
	xorl	%edx, %edx
.L176:
	cmpl	%r14d, %edx
	je	.L173
	leal	(%rdx,%rdi), %ecx
	xorl	%r8d, %r8d
	movl	%eax, 64(%rsp)
	movl	%ecx, 60(%rsp)
	movl	%r8d, 32(%rsp)
.L174:
	movl	52(%rsp), %ecx
	cmpl	%ecx, 32(%rsp)
	je	.L171
	movl	60(%rsp), %r8d
	movq	128(%rsp), %rbx
	movl	%eax, 56(%rsp)
	leal	(%rdx,%r9), %r10d
	leaq	(%rbx,%r8,4), %rcx
	movl	64(%rsp), %r8d
	movq	%rcx, 80(%rsp)
	movq	136(%rsp), %rcx
	leaq	(%rcx,%r8,4), %rbx
	xorl	%r8d, %r8d
	movq	%rbx, 88(%rsp)
.L172:
	movl	4(%rsp), %ebx
	cmpl	%ebx, %r8d
	je	.L169
	movl	56(%rsp), %r11d
	movq	144(%rsp), %rcx
	movl	%eax, %ebp
	leaq	(%rcx,%r11,4), %rbx
	xorl	%r11d, %r11d
	movq	%rbx, 96(%rsp)
	movl	%r10d, %ebx
.L170:
	movl	108(%rsp), %ecx
	cmpl	%ecx, %r11d
	je	.L195
	movq	40(%rsp), %rcx
	movl	%ebx, %r15d
	incl	%r11d
	addl	%r13d, %ebx
	movss	(%rcx,%r15,4), %xmm0
	movq	80(%rsp), %rcx
	movl	%ebp, %r15d
	mulss	(%rcx), %xmm0
	movq	88(%rsp), %rcx
	mulss	(%rcx), %xmm0
	movq	96(%rsp), %rcx
	mulss	(%rcx), %xmm0
	movq	152(%rsp), %rcx
	mulss	(%rcx,%r15,4), %xmm0
	movl	8(%rsp), %ecx
	addss	(%rsi), %xmm0
	addl	%ecx, %ebp
	movss	%xmm0, (%rsi)
	jmp	.L170
.L195:
	movl	24(%rsp), %ebx
	movl	8(%rsp), %ecx
	incl	%r8d
	addl	%ecx, 56(%rsp)
	addl	%ebx, %r10d
	jmp	.L172
.L169:
	movl	12(%rsp), %ecx
	incl	32(%rsp)
	addl	%ecx, 60(%rsp)
	movl	8(%rsp), %ecx
	addl	%ecx, 64(%rsp)
	jmp	.L174
.L171:
	incl	%edx
	jmp	.L176
.L173:
	incl	48(%rsp)
	addl	%r14d, %edi
	addl	%r13d, %r9d
	jmp	.L178
.L175:
	movl	112(%rsp), %edx
	movl	104(%rsp), %edi
	incl	28(%rsp)
	addl	%edx, 68(%rsp)
	addl	%edi, 72(%rsp)
	jmp	.L180
.L177:
	incl	%eax
	jmp	.L182
.L179:
	movl	8(%rsp), %eax
	incl	%r12d
	addl	%eax, 76(%rsp)
	jmp	.L167
.L181:
	leaq	168(%rsp), %rdi
	call	_ZN6TensorD1Ev@PLT
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L183
	call	__stack_chk_fail@PLT
.L183:
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	xorps	%xmm0, %xmm0
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4665:
	.size	_Z32cp4_conv2d_backward_filter_x_gpu12tensor_shapePfPKfS2_S2_S2_S2_j, .-_Z32cp4_conv2d_backward_filter_x_gpu12tensor_shapePfPKfS2_S2_S2_S2_j
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4691:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4691:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#ifndef CP4CONV2DBACKWARDFILTER_CUH
#define CP4CONV2DBACKWARDFILTER_CUH


#include "Tensor.cuh"

float cp4_conv2d_backward_filter_full_gpu(tensor_shape,
                                          float*,
                                          const float*,
                                          const float*,
                                          unsigned PROFCOUNT = 1);

float cp4_conv2d_backward_filter_t_gpu(tensor_shape,
                                       float*,
                                       const float*,
                                       const float*,
                                       const float*,
                                       const float*,
                                       const float*,
                                       unsigned PROFCOUNT = 1);

float cp4_conv2d_backward_filter_c_gpu(tensor_shape,
                                       float*,
                                       const float*,
                                       const float*,
                                       const float*,
                                       const float*,
                                       const float*,
                                       unsigned PROFCOUNT = 1);

float cp4_conv2d_backward_filter_y_gpu(tensor_shape,
                                       float*,
                                       const float*,
                                       const float*,
                                       const float*,
                                       const float*,
                                       const float*,
                                       unsigned PROFCOUNT = 1);

float cp4_conv2d_backward_filter_x_gpu(tensor_shape,
                                       float*,
                                       const float*,
                                       const float*,
                                       const float*,
                                       const float*,
                                       const float*,
                                       unsigned PROFCOUNT = 1);

#endif /* CP4CONV2DBACKWARDFILTER_CUH */

	.text
	.file	"cp4Conv2dBackwardFilter.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
