﻿/** Instrucciones
 *
 * El juego comienza con una configuracion al azar entre celdas vivas y muertas.
 *
 * Para modificar los valores de la ejecucion simplemente hay que modificar los
 * valores de las constantes declaradas mas abajo.
 *
 * N: Numero de filas que tendra la matriz que almacene el estado del juego.
 * M: Numero de columnas que tendra la matriz que almacene el estado del juego.
 *
 * BLOCK_SIZE: cantidad de threads que tendra cada bloque.
 * SRAND_VALUE: semilla que se ocupara para generar los numeros al azar.
 * GOLIF: Indicador en caso de que se quiera verificar la cantidad de celdas
 *        vecinas vivas usando solo IF's.
 * IMPRIMIR: Indicador en caso de que se necesite imprimir las matrices (esto
 *           afecta considerablemente el rendimiento de la solucion)
 */

#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <iostream>
#include <ctime>
#include <fstream>

 /* Declaración de constantes */
#define SRAND_VALUE 1998	// Semilla para generar numeros random
#define IMPRIMIR 0			// Imprimir o no las matrices de entrada y de salida
#define T_LIMIT 1			// Tiempo límite de cálculo

/* Declaración de funciones */
__global__ void GOL(int dimFilas, int dimColumnas, int *grid, int *newGrid);

__global__ void ghostRows(int dimFilas, int dimColumnas, int *grid);

__global__ void ghostCols(int dimFilas, int dimColumnas, int *grid);

__global__ void GOL_IF(int dimFilas, int dimColumnas, int *grid, int *newGrid);

void imprimir(int *matriz, int n, int m);

/* Método principal */
int main(int argc, char *argv[]) {

	// Carga NxM desde un archivo
	std::ifstream infile;
	infile.open("NxM.txt");
	int x;
	int N = 0;
	int M = 0;
	int jfile = 0;
	while (infile >> x) {
		if (jfile == 0) { N = x; }
		else { M = x; }
		jfile = 1;
	}
	infile.close();

	// Carga IF, ejecutar el juego preguntando con IF (0:Falso 1:Verdadero)
	infile.open("IF.txt");
	int GOLIF = 0;
	while (infile >> x) {
		GOLIF = x;
	}
	infile.close();

	// Carga el tamaño de bloque
	infile.open("BLOCK_SIZE.txt");
	int BLOCK_SIZE = 0;
	while (infile >> x) {
		BLOCK_SIZE = x;
	}
	infile.close();

	printf("Cargando matriz %dx%d\n", N, M);
	printf("BLOCK SIZE: %d\n", BLOCK_SIZE);
	if (GOLIF) {
		printf("IF activado\n\n");
	}
	else {
		printf("IF desactivado\n\n");
	}

	int i, j;
	int *h_grid; // Matriz en CPU
	int *d_grid; // Matriz en GPU
	int *d_newGrid; // Matriz auxiliar usada solo en GPU
	int *d_tmpGrid; // Puntero auxiliar para cambiar las matrices

	signed t0, t1; // Variables para medir tiempo
	double time = 0; //variables para medir tiempo
	double Noperaciones = 0; // Variable para medir cantidad de operaciones ejecutadas

	int dimFilas = N; // Dimensiones del juego de la vida (Filas), sin contar las filas fantasmas
	int dimColumnas = M; // Dimensiones del juego de la vida (Columnas), sin contar las columnas fantasmas

	size_t bytes = sizeof(int) * (dimFilas + 2) *
		(dimColumnas + 2);// Se annade mas espacio para dejar filas y columnas fantasmas

	// Solicitamos memoria para la matriz en la CPU
	h_grid = (int *)malloc(bytes);

	// Solicitamos memoria para las matrices en la GPU
	cudaMalloc(&d_grid, bytes);
	cudaMalloc(&d_newGrid, bytes);

	// Colocamos valores aleatorios en la matriz inicialmente
	srand(SRAND_VALUE);
	for (i = 1; i <= dimFilas; i++) {
		for (j = 1; j <= dimColumnas; j++) {
			h_grid[i * (dimColumnas + 2) + j] = rand() % 2;
		}
	}

	// Copiamos valores iniciales de la matriz a la GPU
	cudaMemcpy(d_grid, h_grid, bytes, cudaMemcpyHostToDevice);
	cudaMemcpy(d_newGrid, h_grid, bytes, cudaMemcpyHostToDevice);

	// Establecemos los tamannos de los bloques y la cantidad de bloques a utilizar
	dim3 blockSize(BLOCK_SIZE, BLOCK_SIZE, 1);
	int linGrid = (int)ceil((dimFilas * dimColumnas) / (float)(BLOCK_SIZE * BLOCK_SIZE));
	dim3 gridSize(linGrid, linGrid, 1);

	dim3 cpyBlockSize(BLOCK_SIZE, 1, 1);
	dim3 cpyGridRowsGridSize((int)ceil(dimFilas / (float)cpyBlockSize.x), 1, 1);
	dim3 cpyGridColsGridSize((int)ceil((dimColumnas + 2) / (float)cpyBlockSize.x), 1, 1);

	// Imprimimos de ser el caso
	if (IMPRIMIR) {
		imprimir(h_grid, N, M);
	}

	// Ciclo principal de ejecución
	t0 = static_cast<int>(clock());
	while (time < T_LIMIT) {
		ghostRows <<< cpyGridRowsGridSize, cpyBlockSize >>> (dimFilas, dimColumnas, d_grid);
		ghostCols <<< cpyGridColsGridSize, cpyBlockSize >>> (dimFilas, dimColumnas, d_grid);
		if (GOLIF) {
			GOL_IF <<< gridSize, blockSize >>> (dimFilas, dimColumnas, d_grid, d_newGrid);
		}
		else {
			GOL <<< gridSize, blockSize >>> (dimFilas, dimColumnas, d_grid, d_newGrid);
		}

		// Intercambiamos punteros
		d_tmpGrid = d_grid;
		d_grid = d_newGrid;
		d_newGrid = d_tmpGrid;

		Noperaciones += N * M;

		t1 = static_cast<int>(clock());
		time = (double(t1 - t0) / CLOCKS_PER_SEC);
	} // Fin del ciclo principal de ejecución

	// Pedimos los resultados de vuelta
	cudaMemcpy(h_grid, d_grid, bytes, cudaMemcpyDeviceToHost);

	// Imprimimos de ser el caso
	if (IMPRIMIR) {
		printf("\n");
		imprimir(h_grid, N, M);
	}

	// Imprimimos datos pedidos
	printf("Tiempo total: %f\n", time);
	printf("Numero de operaciones efectuadas: %.0f\n", Noperaciones);

	// Se borra memoria
	cudaFree(d_grid);
	cudaFree(d_newGrid);
	free(h_grid);

	// Retorna main()
	return 0;

}

__global__ void GOL(int dimFilas, int dimColumnas, int *grid, int *newGrid) {
	// Queremos id en [1,dim]
	int iy = blockDim.y * blockIdx.y + threadIdx.y + 1;
	int ix = blockDim.x * blockIdx.x + threadIdx.x + 1;
	int id = iy * (dimColumnas + 2) + ix;

	int numNeighbors;
	if (iy <= dimFilas && ix <= dimColumnas) {

		// Obtenemos la cantidad de vecinos vivos
		numNeighbors = grid[id + (dimColumnas + 2)] + grid[id - (dimColumnas + 2)] // upper lower
			+ grid[id + 1] + grid[id - 1] // right left
			+ grid[id + (dimColumnas + 3)] + grid[id - (dimColumnas + 3)] // diagonals
			+ grid[id - (dimColumnas + 1)] + grid[id + (dimColumnas + 1)];

		int cell = grid[id];

		// Ponemos las reglas del juego
		if (cell == 1 && (numNeighbors == 2 || numNeighbors == 3)) {
			newGrid[id] = 1;
		}
		else if (cell == 0 && numNeighbors == 3) {
			newGrid[id] = 1;
		}
		else {
			newGrid[id] = cell;
		}
	}
}

__global__ void GOL_IF(int dimFilas, int dimColumnas, int *grid, int *newGrid) {
	// Queremos id en [1, dim]
	int iy = blockDim.y * blockIdx.y + threadIdx.y + 1;
	int ix = blockDim.x * blockIdx.x + threadIdx.x + 1;
	int id = iy * (dimColumnas + 2) + ix;

	int numNeighbors = 0;

	if (iy <= dimFilas && ix <= dimColumnas) {

		// Obtenemos la cantidad de vecinos vivos
		if (grid[id + (dimColumnas + 2)]) { numNeighbors++; }
		if (grid[id - (dimColumnas + 2)]) { numNeighbors++; }
		if (grid[id + 1]) { numNeighbors++; }
		if (grid[id - 1]) { numNeighbors++; }
		if (grid[id + (dimColumnas + 3)]) { numNeighbors++; }
		if (grid[id - (dimColumnas + 3)]) { numNeighbors++; }
		if (grid[id - (dimColumnas + 1)]) { numNeighbors++; }
		if (grid[id + (dimColumnas + 1)]) { numNeighbors++; }

		int cell = grid[id];

		// Ponemos las reglas del juego
		if (cell == 1 && (numNeighbors == 2 || numNeighbors == 3)) {
			newGrid[id] = 1;
		}
		else if (cell == 0 && numNeighbors == 3) {
			newGrid[id] = 1;
		}
		else {
			newGrid[id] = cell;
		}
	}
}

__global__ void ghostRows(int dimFilas, int dimColumnas, int *grid) {
	// Queremos id en [1, dim]
	int id = blockDim.x * blockIdx.x + threadIdx.x + 1;
	if (id <= dimColumnas) {
		// Copiamos la primera fila real a la última fila
		grid[(dimColumnas + 2) * (dimFilas + 1) + id] = grid[(dimColumnas + 2) + id];
		// Copiamos la última fila real a la primera fila
		grid[id] = grid[(dimColumnas + 2) * dimFilas + id];
	}
}

__global__ void ghostCols(int dimFilas, int dimColumnas, int *grid) {
	// Queremos id en [0, dim+1]
	int id = blockDim.x * blockIdx.x + threadIdx.x;
	if (id <= dimFilas + 1) {
		// Copia la primera columna real a la ultima
		grid[id * (dimColumnas + 2) + dimFilas + 1] = grid[id * (dimColumnas + 2) + 1];
		// Copia la última columna real a la primera
		grid[id * (dimColumnas + 2)] = grid[id * (dimColumnas + 2) + dimFilas];
	}
}

void imprimir(int *matriz, int n, int m) {
	for (int i = 1; i < n - 1; i++) {
		for (int j = 1; j < m - 1; j++) {
			printf("%d ", matriz[i * m + j]);
		}
		printf("\n");
	}
}
	.file	"tmpxft_00272b16_00000000-6_GOL.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3770:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3770:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d "
.LC1:
	.string	"\n"
	.text
	.globl	_Z8imprimirPiii
	.type	_Z8imprimirPiii, @function
_Z8imprimirPiii:
.LFB3767:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	$1, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L3:
	leal	-1(%r14), %eax
	cmpl	%r13d, %eax
	jle	.L2
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,4), %r8
.L6:
	incq	%r15
	leal	-1(%rbx), %eax
	cmpl	%r15d, %eax
	jle	.L9
	movl	(%r8,%r15,4), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%r8, 8(%rsp)
	leaq	.LC0(%rip), %rsi
	call	__printf_chk@PLT
	movq	8(%rsp), %r8
	jmp	.L6
.L9:
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	incl	%r13d
	addl	%ebx, %r12d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L3
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3767:
	.size	_Z8imprimirPiii, .-_Z8imprimirPiii
	.globl	_Z26__device_stub__Z3GOLiiPiS_iiPiS_
	.type	_Z26__device_stub__Z3GOLiiPiS_iiPiS_, @function
_Z26__device_stub__Z3GOLiiPiS_iiPiS_:
.LFB3792:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3GOLiiPiS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L10:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3792:
	.size	_Z26__device_stub__Z3GOLiiPiS_iiPiS_, .-_Z26__device_stub__Z3GOLiiPiS_iiPiS_
	.globl	_Z3GOLiiPiS_
	.type	_Z3GOLiiPiS_, @function
_Z3GOLiiPiS_:
.LFB3793:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z3GOLiiPiS_iiPiS_
	.cfi_endproc
.LFE3793:
	.size	_Z3GOLiiPiS_, .-_Z3GOLiiPiS_
	.globl	_Z29__device_stub__Z6GOL_IFiiPiS_iiPiS_
	.type	_Z29__device_stub__Z6GOL_IFiiPiS_iiPiS_, @function
_Z29__device_stub__Z6GOL_IFiiPiS_iiPiS_:
.LFB3794:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6GOL_IFiiPiS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L15:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3794:
	.size	_Z29__device_stub__Z6GOL_IFiiPiS_iiPiS_, .-_Z29__device_stub__Z6GOL_IFiiPiS_iiPiS_
	.globl	_Z6GOL_IFiiPiS_
	.type	_Z6GOL_IFiiPiS_, @function
_Z6GOL_IFiiPiS_:
.LFB3795:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6GOL_IFiiPiS_iiPiS_
	.cfi_endproc
.LFE3795:
	.size	_Z6GOL_IFiiPiS_, .-_Z6GOL_IFiiPiS_
	.globl	_Z30__device_stub__Z9ghostRowsiiPiiiPi
	.type	_Z30__device_stub__Z9ghostRowsiiPiiiPi, @function
_Z30__device_stub__Z9ghostRowsiiPiiiPi:
.LFB3796:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	44(%rsp), %rsi
	movq	%rdx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9ghostRowsiiPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L20:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3796:
	.size	_Z30__device_stub__Z9ghostRowsiiPiiiPi, .-_Z30__device_stub__Z9ghostRowsiiPiiiPi
	.globl	_Z9ghostRowsiiPi
	.type	_Z9ghostRowsiiPi, @function
_Z9ghostRowsiiPi:
.LFB3797:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z9ghostRowsiiPiiiPi
	.cfi_endproc
.LFE3797:
	.size	_Z9ghostRowsiiPi, .-_Z9ghostRowsiiPi
	.globl	_Z30__device_stub__Z9ghostColsiiPiiiPi
	.type	_Z30__device_stub__Z9ghostColsiiPiiiPi, @function
_Z30__device_stub__Z9ghostColsiiPiiiPi:
.LFB3798:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	44(%rsp), %rsi
	movq	%rdx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9ghostColsiiPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L25:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3798:
	.size	_Z30__device_stub__Z9ghostColsiiPiiiPi, .-_Z30__device_stub__Z9ghostColsiiPiiiPi
	.globl	_Z9ghostColsiiPi
	.type	_Z9ghostColsiiPi, @function
_Z9ghostColsiiPi:
.LFB3799:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z9ghostColsiiPiiiPi
	.cfi_endproc
.LFE3799:
	.size	_Z9ghostColsiiPi, .-_Z9ghostColsiiPi
	.section	.rodata.str1.1
.LC2:
	.string	"_Z9ghostColsiiPi"
.LC3:
	.string	"_Z9ghostRowsiiPi"
.LC4:
	.string	"_Z6GOL_IFiiPiS_"
.LC5:
	.string	"_Z3GOLiiPiS_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3801:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9ghostColsiiPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9ghostRowsiiPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6GOL_IFiiPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z3GOLiiPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3801:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC7:
	.string	"NxM.txt"
.LC8:
	.string	"IF.txt"
.LC9:
	.string	"BLOCK_SIZE.txt"
.LC10:
	.string	"Cargando matriz %dx%d\n"
.LC11:
	.string	"BLOCK SIZE: %d\n"
.LC12:
	.string	"IF activado\n\n"
.LC13:
	.string	"IF desactivado\n\n"
.LC16:
	.string	"Tiempo total: %f\n"
.LC17:
	.string	"Numero de operaciones efectuadas: %.0f\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3766:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3766
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$680, %rsp
	.cfi_def_cfa_offset 736
	movq	%fs:40, %rax
	movq	%rax, 664(%rsp)
	xorl	%eax, %eax
	leaq	144(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
.LEHB0:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE0:
	movq	(%rsp), %rdi
	movl	$8, %edx
	leaq	.LC7(%rip), %rsi
.LEHB1:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	xorl	%r12d, %r12d
	xorl	%ebp, %ebp
	leaq	60(%rsp), %r13
	xorl	%ebx, %ebx
.L33:
	movq	(%rsp), %rdi
	movq	%r13, %rsi
	call	_ZNSirsERi@PLT
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	testb	$5, 32(%rax,%rdx)
	jne	.L68
	movl	60(%rsp), %eax
	testl	%r12d, %r12d
	jne	.L34
	movl	%eax, %ebx
	movl	%ebp, %eax
.L34:
	movl	%eax, %ebp
	movl	$1, %r12d
	jmp	.L33
.L68:
	movq	(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv@PLT
	movq	(%rsp), %rdi
	movl	$8, %edx
	leaq	.LC8(%rip), %rsi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	xorl	%r14d, %r14d
.L36:
	movq	(%rsp), %rdi
	movq	%r13, %rsi
	call	_ZNSirsERi@PLT
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	testb	$5, 32(%rax,%rdx)
	jne	.L69
	movl	60(%rsp), %r14d
	jmp	.L36
.L69:
	movq	(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv@PLT
	movq	(%rsp), %rdi
	movl	$8, %edx
	leaq	.LC9(%rip), %rsi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	xorl	%r12d, %r12d
.L38:
	movq	(%rsp), %rdi
	movq	%r13, %rsi
	call	_ZNSirsERi@PLT
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	testb	$5, 32(%rax,%rdx)
	jne	.L70
	movl	60(%rsp), %r12d
	jmp	.L38
.L70:
	movq	(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv@PLT
	movl	%ebp, %ecx
	movl	%ebx, %edx
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%r12d, %edx
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC12(%rip), %rsi
	testl	%r14d, %r14d
	jne	.L67
	leaq	.LC13(%rip), %rsi
.L67:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leal	2(%rbp), %r13d
	leal	2(%rbx), %eax
	movslq	%r13d, %rdx
	cltq
	imulq	%rdx, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rsi
	leaq	64(%rsp), %rdi
	movq	%rax, 16(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1998, %edi
	call	srand@PLT
	movl	%r13d, %esi
	movl	$1, %edi
.L42:
	cmpl	%edi, %ebx
	jl	.L44
	movq	16(%rsp), %rcx
	movslq	%esi, %rax
	xorl	%r15d, %r15d
	leaq	(%rcx,%rax,4), %r8
.L45:
	incq	%r15
	cmpl	%r15d, %ebp
	jl	.L71
	movl	%esi, 44(%rsp)
	movq	%r8, 32(%rsp)
	movl	%edi, 24(%rsp)
	call	rand@PLT
	movl	$2, %ecx
	movq	32(%rsp), %r8
	movl	44(%rsp), %esi
	cltd
	movl	24(%rsp), %edi
	idivl	%ecx
	movl	%edx, (%r8,%r15,4)
	jmp	.L45
.L71:
	incl	%edi
	addl	%r13d, %esi
	jmp	.L42
.L44:
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	64(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	72(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	%ebx, %r15d
	movl	%r12d, %eax
	movl	%r12d, 84(%rsp)
	imull	%r12d, %eax
	movl	%r12d, 88(%rsp)
	imull	%ebp, %r15d
	movl	$1, 92(%rsp)
	cvtsi2ssl	%eax, %xmm1
	cvtsi2ssl	%r15d, %xmm0
	divss	%xmm1, %xmm0
	call	ceilf@PLT
	movl	$1, 104(%rsp)
	cvttss2sil	%xmm0, %eax
	movl	$1, 112(%rsp)
	cvtsi2ssl	%ebx, %xmm0
	movl	$1, 116(%rsp)
	movl	%eax, 96(%rsp)
	movl	%eax, 100(%rsp)
	movl	%r12d, %eax
	cvtsi2ssq	%rax, %xmm1
	divss	%xmm1, %xmm0
	movss	%xmm1, 24(%rsp)
	call	ceilf@PLT
	movss	24(%rsp), %xmm1
	cvttss2sil	%xmm0, %eax
	cvtsi2ssl	%r13d, %xmm0
	movl	%eax, 120(%rsp)
	movabsq	$4294967297, %rax
	divss	%xmm1, %xmm0
	movq	%rax, 124(%rsp)
	call	ceilf@PLT
	movabsq	$4294967297, %rax
	cvttss2sil	%xmm0, %edx
	movq	%rax, 136(%rsp)
	movl	%edx, 132(%rsp)
	call	clock@PLT
	movq	$0x000000000, 24(%rsp)
	movl	%eax, %r13d
.L52:
	movl	%r12d, 108(%rsp)
	movl	116(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	108(%rsp), %rdx
	movq	120(%rsp), %rdi
	movl	128(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	movq	64(%rsp), %rdx
	movl	%ebp, %esi
	movl	%ebx, %edi
	call	_Z30__device_stub__Z9ghostRowsiiPiiiPi
.L48:
	movl	116(%rsp), %ecx
	movq	108(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	132(%rsp), %rdi
	movl	140(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	movq	64(%rsp), %rdx
	movl	%ebp, %esi
	movl	%ebx, %edi
	call	_Z30__device_stub__Z9ghostColsiiPiiiPi
.L49:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	testl	%r14d, %r14d
	movq	84(%rsp), %rdx
	movl	92(%rsp), %ecx
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	je	.L50
	call	__cudaPushCallConfiguration@PLT
	movq	72(%rsp), %rcx
	movq	64(%rsp), %rdx
	testl	%eax, %eax
	jne	.L51
	movl	%ebp, %esi
	movl	%ebx, %edi
	call	_Z29__device_stub__Z6GOL_IFiiPiS_iiPiS_
	jmp	.L51
.L50:
	call	__cudaPushCallConfiguration@PLT
	movq	72(%rsp), %rcx
	movq	64(%rsp), %rdx
	testl	%eax, %eax
	jne	.L51
	movl	%ebp, %esi
	movl	%ebx, %edi
	call	_Z26__device_stub__Z3GOLiiPiS_iiPiS_
.L51:
	cvtsi2sdl	%r15d, %xmm0
	addsd	24(%rsp), %xmm0
	movq	64(%rsp), %rax
	movq	72(%rsp), %rdx
	movq	%rax, 72(%rsp)
	movsd	%xmm0, 24(%rsp)
	movq	%rdx, 64(%rsp)
	call	clock@PLT
	subl	%r13d, %eax
	cvtsi2sdl	%eax, %xmm0
	divsd	.LC14(%rip), %xmm0
	movsd	%xmm0, 32(%rsp)
	movsd	.LC15(%rip), %xmm0
	comisd	32(%rsp), %xmm0
	ja	.L52
	movq	8(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movsd	32(%rsp), %xmm0
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movsd	24(%rsp), %xmm0
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
.LEHE1:
	movq	16(%rsp), %rdi
	call	free@PLT
	leaq	144(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	664(%rsp), %rax
	subq	%fs:40, %rax
	je	.L55
	jmp	.L64
.L59:
	endbr64
	movq	%rax, %rbx
.L53:
	movq	(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	664(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L64
	movq	%rbx, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L64:
	call	__stack_chk_fail@PLT
.L55:
	addq	$680, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3766:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3766:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3766-.LLSDACSB3766
.LLSDACSB3766:
	.uleb128 .LEHB0-.LFB3766
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3766
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L59-.LFB3766
	.uleb128 0
	.uleb128 .LEHB2-.LFB3766
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE3766:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC14:
	.long	0
	.long	1093567616
	.align 8
.LC15:
	.long	0
	.long	1072693248
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

﻿/** Instrucciones
 *
 * El juego comienza con una configuracion al azar entre celdas vivas y muertas.
 *
 * Para modificar los valores de la ejecucion simplemente hay que modificar los
 * valores de las constantes declaradas mas abajo.
 *
 * N: Numero de filas que tendra la matriz que almacene el estado del juego.
 * M: Numero de columnas que tendra la matriz que almacene el estado del juego.
 *
 * BLOCK_SIZE: cantidad de threads que tendra cada bloque.
 * SRAND_VALUE: semilla que se ocupara para generar los numeros al azar.
 * GOLIF: Indicador en caso de que se quiera verificar la cantidad de celdas
 *        vecinas vivas usando solo IF's.
 * IMPRIMIR: Indicador en caso de que se necesite imprimir las matrices (esto
 *           afecta considerablemente el rendimiento de la solucion)
 */

#include "hip/hip_runtime.h"

#include <stdio.h>
#include <iostream>
#include <ctime>
#include <fstream>

 /* Declaración de constantes */
#define SRAND_VALUE 1998	// Semilla para generar numeros random
#define IMPRIMIR 0			// Imprimir o no las matrices de entrada y de salida
#define T_LIMIT 1			// Tiempo límite de cálculo

/* Declaración de funciones */
__global__ void GOL(int dimFilas, int dimColumnas, int *grid, int *newGrid);

__global__ void ghostRows(int dimFilas, int dimColumnas, int *grid);

__global__ void ghostCols(int dimFilas, int dimColumnas, int *grid);

__global__ void GOL_IF(int dimFilas, int dimColumnas, int *grid, int *newGrid);

void imprimir(int *matriz, int n, int m);

/* Método principal */
int main(int argc, char *argv[]) {

	// Carga NxM desde un archivo
	std::ifstream infile;
	infile.open("NxM.txt");
	int x;
	int N = 0;
	int M = 0;
	int jfile = 0;
	while (infile >> x) {
		if (jfile == 0) { N = x; }
		else { M = x; }
		jfile = 1;
	}
	infile.close();

	// Carga IF, ejecutar el juego preguntando con IF (0:Falso 1:Verdadero)
	infile.open("IF.txt");
	int GOLIF = 0;
	while (infile >> x) {
		GOLIF = x;
	}
	infile.close();

	// Carga el tamaño de bloque
	infile.open("BLOCK_SIZE.txt");
	int BLOCK_SIZE = 0;
	while (infile >> x) {
		BLOCK_SIZE = x;
	}
	infile.close();

	printf("Cargando matriz %dx%d\n", N, M);
	printf("BLOCK SIZE: %d\n", BLOCK_SIZE);
	if (GOLIF) {
		printf("IF activado\n\n");
	}
	else {
		printf("IF desactivado\n\n");
	}

	int i, j;
	int *h_grid; // Matriz en CPU
	int *d_grid; // Matriz en GPU
	int *d_newGrid; // Matriz auxiliar usada solo en GPU
	int *d_tmpGrid; // Puntero auxiliar para cambiar las matrices

	signed t0, t1; // Variables para medir tiempo
	double time = 0; //variables para medir tiempo
	double Noperaciones = 0; // Variable para medir cantidad de operaciones ejecutadas

	int dimFilas = N; // Dimensiones del juego de la vida (Filas), sin contar las filas fantasmas
	int dimColumnas = M; // Dimensiones del juego de la vida (Columnas), sin contar las columnas fantasmas

	size_t bytes = sizeof(int) * (dimFilas + 2) *
		(dimColumnas + 2);// Se annade mas espacio para dejar filas y columnas fantasmas

	// Solicitamos memoria para la matriz en la CPU
	h_grid = (int *)malloc(bytes);

	// Solicitamos memoria para las matrices en la GPU
	hipMalloc(&d_grid, bytes);
	hipMalloc(&d_newGrid, bytes);

	// Colocamos valores aleatorios en la matriz inicialmente
	srand(SRAND_VALUE);
	for (i = 1; i <= dimFilas; i++) {
		for (j = 1; j <= dimColumnas; j++) {
			h_grid[i * (dimColumnas + 2) + j] = rand() % 2;
		}
	}

	// Copiamos valores iniciales de la matriz a la GPU
	hipMemcpy(d_grid, h_grid, bytes, hipMemcpyHostToDevice);
	hipMemcpy(d_newGrid, h_grid, bytes, hipMemcpyHostToDevice);

	// Establecemos los tamannos de los bloques y la cantidad de bloques a utilizar
	dim3 blockSize(BLOCK_SIZE, BLOCK_SIZE, 1);
	int linGrid = (int)ceil((dimFilas * dimColumnas) / (float)(BLOCK_SIZE * BLOCK_SIZE));
	dim3 gridSize(linGrid, linGrid, 1);

	dim3 cpyBlockSize(BLOCK_SIZE, 1, 1);
	dim3 cpyGridRowsGridSize((int)ceil(dimFilas / (float)cpyBlockSize.x), 1, 1);
	dim3 cpyGridColsGridSize((int)ceil((dimColumnas + 2) / (float)cpyBlockSize.x), 1, 1);

	// Imprimimos de ser el caso
	if (IMPRIMIR) {
		imprimir(h_grid, N, M);
	}

	// Ciclo principal de ejecución
	t0 = static_cast<int>(clock());
	while (time < T_LIMIT) {
		ghostRows <<< cpyGridRowsGridSize, cpyBlockSize >>> (dimFilas, dimColumnas, d_grid);
		ghostCols <<< cpyGridColsGridSize, cpyBlockSize >>> (dimFilas, dimColumnas, d_grid);
		if (GOLIF) {
			GOL_IF <<< gridSize, blockSize >>> (dimFilas, dimColumnas, d_grid, d_newGrid);
		}
		else {
			GOL <<< gridSize, blockSize >>> (dimFilas, dimColumnas, d_grid, d_newGrid);
		}

		// Intercambiamos punteros
		d_tmpGrid = d_grid;
		d_grid = d_newGrid;
		d_newGrid = d_tmpGrid;

		Noperaciones += N * M;

		t1 = static_cast<int>(clock());
		time = (double(t1 - t0) / CLOCKS_PER_SEC);
	} // Fin del ciclo principal de ejecución

	// Pedimos los resultados de vuelta
	hipMemcpy(h_grid, d_grid, bytes, hipMemcpyDeviceToHost);

	// Imprimimos de ser el caso
	if (IMPRIMIR) {
		printf("\n");
		imprimir(h_grid, N, M);
	}

	// Imprimimos datos pedidos
	printf("Tiempo total: %f\n", time);
	printf("Numero de operaciones efectuadas: %.0f\n", Noperaciones);

	// Se borra memoria
	hipFree(d_grid);
	hipFree(d_newGrid);
	free(h_grid);

	// Retorna main()
	return 0;

}

__global__ void GOL(int dimFilas, int dimColumnas, int *grid, int *newGrid) {
	// Queremos id en [1,dim]
	int iy = blockDim.y * blockIdx.y + threadIdx.y + 1;
	int ix = blockDim.x * blockIdx.x + threadIdx.x + 1;
	int id = iy * (dimColumnas + 2) + ix;

	int numNeighbors;
	if (iy <= dimFilas && ix <= dimColumnas) {

		// Obtenemos la cantidad de vecinos vivos
		numNeighbors = grid[id + (dimColumnas + 2)] + grid[id - (dimColumnas + 2)] // upper lower
			+ grid[id + 1] + grid[id - 1] // right left
			+ grid[id + (dimColumnas + 3)] + grid[id - (dimColumnas + 3)] // diagonals
			+ grid[id - (dimColumnas + 1)] + grid[id + (dimColumnas + 1)];

		int cell = grid[id];

		// Ponemos las reglas del juego
		if (cell == 1 && (numNeighbors == 2 || numNeighbors == 3)) {
			newGrid[id] = 1;
		}
		else if (cell == 0 && numNeighbors == 3) {
			newGrid[id] = 1;
		}
		else {
			newGrid[id] = cell;
		}
	}
}

__global__ void GOL_IF(int dimFilas, int dimColumnas, int *grid, int *newGrid) {
	// Queremos id en [1, dim]
	int iy = blockDim.y * blockIdx.y + threadIdx.y + 1;
	int ix = blockDim.x * blockIdx.x + threadIdx.x + 1;
	int id = iy * (dimColumnas + 2) + ix;

	int numNeighbors = 0;

	if (iy <= dimFilas && ix <= dimColumnas) {

		// Obtenemos la cantidad de vecinos vivos
		if (grid[id + (dimColumnas + 2)]) { numNeighbors++; }
		if (grid[id - (dimColumnas + 2)]) { numNeighbors++; }
		if (grid[id + 1]) { numNeighbors++; }
		if (grid[id - 1]) { numNeighbors++; }
		if (grid[id + (dimColumnas + 3)]) { numNeighbors++; }
		if (grid[id - (dimColumnas + 3)]) { numNeighbors++; }
		if (grid[id - (dimColumnas + 1)]) { numNeighbors++; }
		if (grid[id + (dimColumnas + 1)]) { numNeighbors++; }

		int cell = grid[id];

		// Ponemos las reglas del juego
		if (cell == 1 && (numNeighbors == 2 || numNeighbors == 3)) {
			newGrid[id] = 1;
		}
		else if (cell == 0 && numNeighbors == 3) {
			newGrid[id] = 1;
		}
		else {
			newGrid[id] = cell;
		}
	}
}

__global__ void ghostRows(int dimFilas, int dimColumnas, int *grid) {
	// Queremos id en [1, dim]
	int id = blockDim.x * blockIdx.x + threadIdx.x + 1;
	if (id <= dimColumnas) {
		// Copiamos la primera fila real a la última fila
		grid[(dimColumnas + 2) * (dimFilas + 1) + id] = grid[(dimColumnas + 2) + id];
		// Copiamos la última fila real a la primera fila
		grid[id] = grid[(dimColumnas + 2) * dimFilas + id];
	}
}

__global__ void ghostCols(int dimFilas, int dimColumnas, int *grid) {
	// Queremos id en [0, dim+1]
	int id = blockDim.x * blockIdx.x + threadIdx.x;
	if (id <= dimFilas + 1) {
		// Copia la primera columna real a la ultima
		grid[id * (dimColumnas + 2) + dimFilas + 1] = grid[id * (dimColumnas + 2) + 1];
		// Copia la última columna real a la primera
		grid[id * (dimColumnas + 2)] = grid[id * (dimColumnas + 2) + dimFilas];
	}
}

void imprimir(int *matriz, int n, int m) {
	for (int i = 1; i < n - 1; i++) {
		for (int j = 1; j < m - 1; j++) {
			printf("%d ", matriz[i * m + j]);
		}
		printf("\n");
	}
}
	.text
	.file	"GOL.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI0_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI0_1:
	.quad	0x3ff0000000000000              # double 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$616, %rsp                      # imm = 0x268
	.cfi_def_cfa_offset 672
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	96(%rsp), %rbx
	movq	%rbx, %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev
.Ltmp0:
	movl	$.L.str, %esi
	movq	%rbx, %rdi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp1:
# %bb.1:
	xorl	%r14d, %r14d
	movb	$1, %bpl
	leaq	96(%rsp), %r15
	leaq	12(%rsp), %r12
	xorl	%ebx, %ebx
.LBB0_2:                                # =>This Inner Loop Header: Depth=1
.Ltmp3:
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_ZNSirsERi
.Ltmp4:
# %bb.3:                                #   in Loop: Header=BB0_2 Depth=1
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	testb	$5, 32(%rax,%rcx)
	jne	.LBB0_8
# %bb.4:                                #   in Loop: Header=BB0_2 Depth=1
	movl	12(%rsp), %eax
	testb	$1, %bpl
	cmovel	%eax, %r14d
	cmovnel	%eax, %ebx
	xorl	%ebp, %ebp
	jmp	.LBB0_2
.LBB0_8:
.Ltmp6:
	leaq	96(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv
.Ltmp7:
# %bb.9:
.Ltmp8:
	leaq	96(%rsp), %rdi
	movl	$.L.str.1, %esi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp9:
# %bb.10:                               # %.preheader142.preheader
	xorl	%ebp, %ebp
	leaq	96(%rsp), %r15
	leaq	12(%rsp), %r12
.LBB0_11:                               # %.preheader142
                                        # =>This Inner Loop Header: Depth=1
.Ltmp11:
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_ZNSirsERi
.Ltmp12:
# %bb.12:                               #   in Loop: Header=BB0_11 Depth=1
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	testb	$5, 32(%rax,%rcx)
	jne	.LBB0_16
# %bb.13:                               #   in Loop: Header=BB0_11 Depth=1
	movl	12(%rsp), %ebp
	jmp	.LBB0_11
.LBB0_16:
.Ltmp14:
	leaq	96(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv
.Ltmp15:
# %bb.17:
.Ltmp16:
	leaq	96(%rsp), %rdi
	movl	$.L.str.2, %esi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp17:
# %bb.18:                               # %.preheader136.preheader
	xorl	%r12d, %r12d
	leaq	96(%rsp), %r15
	leaq	12(%rsp), %r13
.LBB0_19:                               # %.preheader136
                                        # =>This Inner Loop Header: Depth=1
.Ltmp19:
	movq	%r15, %rdi
	movq	%r13, %rsi
	callq	_ZNSirsERi
.Ltmp20:
# %bb.20:                               #   in Loop: Header=BB0_19 Depth=1
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	testb	$5, 32(%rax,%rcx)
	jne	.LBB0_24
# %bb.21:                               #   in Loop: Header=BB0_19 Depth=1
	movl	12(%rsp), %r12d
	jmp	.LBB0_19
.LBB0_24:
.Ltmp22:
	leaq	96(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv
.Ltmp23:
# %bb.25:
	movl	$.L.str.3, %edi
	movl	%ebx, %esi
	movl	%r14d, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.4, %edi
	movl	%r12d, 48(%rsp)                 # 4-byte Spill
	movl	%r12d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebp, 80(%rsp)                  # 4-byte Spill
	testl	%ebp, %ebp
	movl	$.Lstr, %eax
	movl	$.Lstr.1, %edi
	cmoveq	%rax, %rdi
	callq	puts@PLT
	movq	%rbx, 64(%rsp)                  # 8-byte Spill
	leal	2(%rbx), %eax
	cltq
	leal	2(%r14), %ecx
	movl	%ecx, 24(%rsp)                  # 4-byte Spill
	movslq	%ecx, %rbx
	imulq	%rax, %rbx
	shlq	$2, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 40(%rsp)                  # 8-byte Spill
.Ltmp25:
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
.Ltmp26:
# %bb.26:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
.Ltmp27:
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
.Ltmp28:
# %bb.27:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit120
	movq	%rbx, 88(%rsp)                  # 8-byte Spill
	movl	$1998, %edi                     # imm = 0x7CE
	callq	srand
	cmpl	$0, 64(%rsp)                    # 4-byte Folded Reload
	jle	.LBB0_33
# %bb.28:                               # %.preheader.lr.ph
	leal	1(%r14), %r15d
	movq	64(%rsp), %rax                  # 8-byte Reload
	incl	%eax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movl	$1, %ebp
	movl	24(%rsp), %r12d                 # 4-byte Reload
.LBB0_29:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_31 Depth 2
	movq	%r14, %r13
	testl	%r14d, %r14d
	jle	.LBB0_32
# %bb.30:                               # %.lr.ph
                                        #   in Loop: Header=BB0_29 Depth=1
	movl	%r12d, %eax
	movq	40(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	movl	$1, %ebx
.LBB0_31:                               #   Parent Loop BB0_29 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	andl	$-2, %ecx
	subl	%ecx, %eax
	movl	%eax, (%r14,%rbx,4)
	incq	%rbx
	cmpq	%rbx, %r15
	jne	.LBB0_31
.LBB0_32:                               # %._crit_edge
                                        #   in Loop: Header=BB0_29 Depth=1
	incq	%rbp
	addl	24(%rsp), %r12d                 # 4-byte Folded Reload
	cmpq	56(%rsp), %rbp                  # 8-byte Folded Reload
	movq	%r13, %r14
	jne	.LBB0_29
.LBB0_33:                               # %._crit_edge163
	movq	16(%rsp), %rdi
.Ltmp29:
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	88(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp30:
# %bb.34:
	movq	32(%rsp), %rdi
.Ltmp31:
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp32:
# %bb.35:
	movl	48(%rsp), %ecx                  # 4-byte Reload
	movl	%ecx, %r13d
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	orq	$1, %rbx
	movq	%r13, %rax
	imulq	%rbx, %rax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	64(%rsp), %r15                  # 8-byte Reload
	movl	%r15d, %r12d
	imull	%r14d, %r12d
	cvtsi2ss	%r12d, %xmm0
	imull	%ecx, %ecx
	cvtsi2ss	%ecx, %xmm1
	divss	%xmm1, %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r15d, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r13, %xmm1
	movss	%xmm1, 72(%rsp)                 # 4-byte Spill
	imulq	%rbx, %rax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	%r15, %rbx
	btsq	$32, %r13
	divss	%xmm1, %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %r15d
	btsq	$32, %r15
	xorps	%xmm0, %xmm0
	cvtsi2ssl	24(%rsp), %xmm0         # 4-byte Folded Reload
	divss	72(%rsp), %xmm0                 # 4-byte Folded Reload
	callq	ceilf@PLT
	cvttss2si	%xmm0, %ebp
	btsq	$32, %rbp
	callq	clock
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r12d, %xmm0
	movsd	%xmm0, 72(%rsp)                 # 8-byte Spill
	movq	%rax, %r12
	xorpd	%xmm0, %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
.LBB0_36:                               # =>This Inner Loop Header: Depth=1
.Ltmp34:
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp35:
# %bb.37:                               #   in Loop: Header=BB0_36 Depth=1
	testl	%eax, %eax
	jne	.LBB0_39
# %bb.38:                               #   in Loop: Header=BB0_36 Depth=1
	movq	16(%rsp), %rdx
.Ltmp36:
	movl	%ebx, %edi
	movl	%r14d, %esi
	callq	_Z24__device_stub__ghostRowsiiPi
.Ltmp37:
.LBB0_39:                               #   in Loop: Header=BB0_36 Depth=1
.Ltmp38:
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp39:
# %bb.40:                               #   in Loop: Header=BB0_36 Depth=1
	testl	%eax, %eax
	jne	.LBB0_42
# %bb.41:                               #   in Loop: Header=BB0_36 Depth=1
	movq	16(%rsp), %rdx
.Ltmp40:
	movl	%ebx, %edi
	movl	%r14d, %esi
	callq	_Z24__device_stub__ghostColsiiPi
.Ltmp41:
.LBB0_42:                               #   in Loop: Header=BB0_36 Depth=1
	cmpl	$0, 80(%rsp)                    # 4-byte Folded Reload
	je	.LBB0_48
# %bb.43:                               #   in Loop: Header=BB0_36 Depth=1
.Ltmp42:
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp43:
# %bb.44:                               #   in Loop: Header=BB0_36 Depth=1
	testl	%eax, %eax
	jne	.LBB0_51
# %bb.45:                               #   in Loop: Header=BB0_36 Depth=1
	movq	16(%rsp), %rdx
	movq	32(%rsp), %rcx
.Ltmp44:
	movl	%ebx, %edi
	movl	%r14d, %esi
	callq	_Z21__device_stub__GOL_IFiiPiS_
.Ltmp45:
	jmp	.LBB0_51
.LBB0_48:                               #   in Loop: Header=BB0_36 Depth=1
.Ltmp46:
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp47:
# %bb.49:                               #   in Loop: Header=BB0_36 Depth=1
	testl	%eax, %eax
	jne	.LBB0_51
# %bb.50:                               #   in Loop: Header=BB0_36 Depth=1
	movq	16(%rsp), %rdx
	movq	32(%rsp), %rcx
.Ltmp48:
	movl	%ebx, %edi
	movl	%r14d, %esi
	callq	_Z18__device_stub__GOLiiPiS_
.Ltmp49:
.LBB0_51:                               #   in Loop: Header=BB0_36 Depth=1
	movq	16(%rsp), %rax
	movq	32(%rsp), %rcx
	movq	%rcx, 16(%rsp)
	movq	%rax, 32(%rsp)
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	addsd	72(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	callq	clock
	subl	%r12d, %eax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%eax, %xmm1
	divsd	.LCPI0_0(%rip), %xmm1
	movsd	.LCPI0_1(%rip), %xmm0           # xmm0 = mem[0],zero
	ucomisd	%xmm1, %xmm0
	ja	.LBB0_36
# %bb.52:
	movsd	%xmm1, 80(%rsp)                 # 8-byte Spill
	movq	16(%rsp), %rsi
.Ltmp51:
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movq	88(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp52:
# %bb.53:
	movl	$.L.str.7, %edi
	movsd	80(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$.L.str.8, %edi
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
.Ltmp53:
	callq	hipFree
.Ltmp54:
# %bb.54:
	movq	32(%rsp), %rdi
.Ltmp55:
	callq	hipFree
.Ltmp56:
# %bb.55:
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	free
	leaq	96(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	xorl	%eax, %eax
	addq	$616, %rsp                      # imm = 0x268
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_23:                               # %.loopexit.split-lp138
	.cfi_def_cfa_offset 672
.Ltmp24:
	jmp	.LBB0_57
.LBB0_5:
.Ltmp2:
	jmp	.LBB0_57
.LBB0_15:                               # %.loopexit.split-lp144
.Ltmp18:
	jmp	.LBB0_57
.LBB0_7:                                # %.loopexit.split-lp149
.Ltmp10:
	jmp	.LBB0_57
.LBB0_47:                               # %.loopexit.split-lp
.Ltmp57:
	jmp	.LBB0_57
.LBB0_56:
.Ltmp33:
	jmp	.LBB0_57
.LBB0_22:                               # %.loopexit137
.Ltmp21:
	jmp	.LBB0_57
.LBB0_14:                               # %.loopexit143
.Ltmp13:
	jmp	.LBB0_57
.LBB0_6:                                # %.loopexit148
.Ltmp5:
	jmp	.LBB0_57
.LBB0_46:                               # %.loopexit
.Ltmp50:
.LBB0_57:
	movq	%rax, %rbx
	leaq	96(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table0:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp9-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp9
	.uleb128 .Ltmp10-.Lfunc_begin0          #     jumps to .Ltmp10
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp11-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp12-.Ltmp11                #   Call between .Ltmp11 and .Ltmp12
	.uleb128 .Ltmp13-.Lfunc_begin0          #     jumps to .Ltmp13
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp14-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp17-.Ltmp14                #   Call between .Ltmp14 and .Ltmp17
	.uleb128 .Ltmp18-.Lfunc_begin0          #     jumps to .Ltmp18
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp19-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp20-.Ltmp19                #   Call between .Ltmp19 and .Ltmp20
	.uleb128 .Ltmp21-.Lfunc_begin0          #     jumps to .Ltmp21
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp22-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp23-.Ltmp22                #   Call between .Ltmp22 and .Ltmp23
	.uleb128 .Ltmp24-.Lfunc_begin0          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp32-.Ltmp25                #   Call between .Ltmp25 and .Ltmp32
	.uleb128 .Ltmp33-.Lfunc_begin0          #     jumps to .Ltmp33
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp32-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp34-.Ltmp32                #   Call between .Ltmp32 and .Ltmp34
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp34-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp49-.Ltmp34                #   Call between .Ltmp34 and .Ltmp49
	.uleb128 .Ltmp50-.Lfunc_begin0          #     jumps to .Ltmp50
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp51-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Ltmp56-.Ltmp51                #   Call between .Ltmp51 and .Ltmp56
	.uleb128 .Ltmp57-.Lfunc_begin0          #     jumps to .Ltmp57
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp56-.Lfunc_begin0          # >> Call Site 13 <<
	.uleb128 .Lfunc_end0-.Ltmp56            #   Call between .Ltmp56 and .Lfunc_end0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_Z24__device_stub__ghostRowsiiPi # -- Begin function _Z24__device_stub__ghostRowsiiPi
	.type	_Z24__device_stub__ghostRowsiiPi,@function
_Z24__device_stub__ghostRowsiiPi:       # @_Z24__device_stub__ghostRowsiiPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rcx
	movl	%esi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9ghostRowsiiPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__ghostRowsiiPi, .Lfunc_end1-_Z24__device_stub__ghostRowsiiPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__ghostColsiiPi # -- Begin function _Z24__device_stub__ghostColsiiPi
	.type	_Z24__device_stub__ghostColsiiPi,@function
_Z24__device_stub__ghostColsiiPi:       # @_Z24__device_stub__ghostColsiiPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rcx
	movl	%esi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9ghostColsiiPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z24__device_stub__ghostColsiiPi, .Lfunc_end2-_Z24__device_stub__ghostColsiiPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__GOL_IFiiPiS_ # -- Begin function _Z21__device_stub__GOL_IFiiPiS_
	.type	_Z21__device_stub__GOL_IFiiPiS_,@function
_Z21__device_stub__GOL_IFiiPiS_:        # @_Z21__device_stub__GOL_IFiiPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6GOL_IFiiPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z21__device_stub__GOL_IFiiPiS_, .Lfunc_end3-_Z21__device_stub__GOL_IFiiPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__GOLiiPiS_    # -- Begin function _Z18__device_stub__GOLiiPiS_
	.type	_Z18__device_stub__GOLiiPiS_,@function
_Z18__device_stub__GOLiiPiS_:           # @_Z18__device_stub__GOLiiPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3GOLiiPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z18__device_stub__GOLiiPiS_, .Lfunc_end4-_Z18__device_stub__GOLiiPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z8imprimirPiii                 # -- Begin function _Z8imprimirPiii
	.type	_Z8imprimirPiii,@function
_Z8imprimirPiii:                        # @_Z8imprimirPiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $esi killed $esi def $rsi
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	cmpl	$3, %esi
	jl	.LBB5_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %ebx
	movq	8(%rsp), %rax                   # 8-byte Reload
	decl	%eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	leal	-1(%rbx), %r12d
	movl	$1, %r13d
	movl	%edx, %ebp
.LBB5_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_4 Depth 2
	cmpl	$3, %ebx
	jl	.LBB5_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB5_2 Depth=1
	movl	%ebp, %eax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
	movl	$1, %r14d
.LBB5_4:                                #   Parent Loop BB5_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r15,%r14,4), %esi
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	%r14, %r12
	jne	.LBB5_4
.LBB5_5:                                # %._crit_edge
                                        #   in Loop: Header=BB5_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r13
	addl	%ebx, %ebp
	cmpq	8(%rsp), %r13                   # 8-byte Folded Reload
	jne	.LBB5_2
.LBB5_6:                                # %._crit_edge12
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z8imprimirPiii, .Lfunc_end5-_Z8imprimirPiii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3GOLiiPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6GOL_IFiiPiS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9ghostRowsiiPi, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9ghostColsiiPi, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"NxM.txt"
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"IF.txt"
	.size	.L.str.1, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"BLOCK_SIZE.txt"
	.size	.L.str.2, 15

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Cargando matriz %dx%d\n"
	.size	.L.str.3, 23

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"BLOCK SIZE: %d\n"
	.size	.L.str.4, 16

	.type	_Z9ghostRowsiiPi,@object        # @_Z9ghostRowsiiPi
	.section	.rodata,"a",@progbits
	.globl	_Z9ghostRowsiiPi
	.p2align	3, 0x0
_Z9ghostRowsiiPi:
	.quad	_Z24__device_stub__ghostRowsiiPi
	.size	_Z9ghostRowsiiPi, 8

	.type	_Z9ghostColsiiPi,@object        # @_Z9ghostColsiiPi
	.globl	_Z9ghostColsiiPi
	.p2align	3, 0x0
_Z9ghostColsiiPi:
	.quad	_Z24__device_stub__ghostColsiiPi
	.size	_Z9ghostColsiiPi, 8

	.type	_Z6GOL_IFiiPiS_,@object         # @_Z6GOL_IFiiPiS_
	.globl	_Z6GOL_IFiiPiS_
	.p2align	3, 0x0
_Z6GOL_IFiiPiS_:
	.quad	_Z21__device_stub__GOL_IFiiPiS_
	.size	_Z6GOL_IFiiPiS_, 8

	.type	_Z3GOLiiPiS_,@object            # @_Z3GOLiiPiS_
	.globl	_Z3GOLiiPiS_
	.p2align	3, 0x0
_Z3GOLiiPiS_:
	.quad	_Z18__device_stub__GOLiiPiS_
	.size	_Z3GOLiiPiS_, 8

	.type	.L.str.7,@object                # @.str.7
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.7:
	.asciz	"Tiempo total: %f\n"
	.size	.L.str.7, 18

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Numero de operaciones efectuadas: %.0f\n"
	.size	.L.str.8, 40

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"%d "
	.size	.L.str.9, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3GOLiiPiS_"
	.size	.L__unnamed_1, 13

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z6GOL_IFiiPiS_"
	.size	.L__unnamed_2, 16

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z9ghostRowsiiPi"
	.size	.L__unnamed_3, 17

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z9ghostColsiiPi"
	.size	.L__unnamed_4, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"IF desactivado\n"
	.size	.Lstr, 16

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"IF activado\n"
	.size	.Lstr.1, 13

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _Z24__device_stub__ghostRowsiiPi
	.addrsig_sym _Z24__device_stub__ghostColsiiPi
	.addrsig_sym _Z21__device_stub__GOL_IFiiPiS_
	.addrsig_sym _Z18__device_stub__GOLiiPiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z9ghostRowsiiPi
	.addrsig_sym _Z9ghostColsiiPi
	.addrsig_sym _Z6GOL_IFiiPiS_
	.addrsig_sym _Z3GOLiiPiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3GOLiiPiS_            ; -- Begin function _Z3GOLiiPiS_
	.globl	_Z3GOLiiPiS_
	.p2align	8
	.type	_Z3GOLiiPiS_,@function
_Z3GOLiiPiS_:                           ; @_Z3GOLiiPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	v_mad_u64_u32 v[1:2], null, s14, s3, v[3:4]
	s_mul_i32 s15, s15, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v2, v0, s15, 1
	v_add_nc_u32_e32 v0, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, s4, v2
	v_cmp_ge_i32_e64 s2, s5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_9
; %bb.1:
	s_add_i32 s2, s5, 2
	s_ashr_i32 s4, s5, 31
	v_mul_lo_u32 v2, v2, s2
	s_load_b128 s[0:3], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v0, v2
	v_add_nc_u32_e32 v2, v2, v1
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_u32 v4, vcc_lo, v0, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s4, v1, vcc_lo
	v_sub_co_u32 v6, vcc_lo, v0, s5
	v_subrev_co_ci_u32_e32 v7, vcc_lo, s4, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v8, vcc_lo, s0, v6
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v7, vcc_lo
	v_add_co_u32 v10, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v12, vcc_lo, s0, v2
	s_clause 0x1
	global_load_b96 v[4:6], v[4:5], off offset:4
	global_load_b96 v[7:9], v[8:9], off offset:-12
	v_add_co_ci_u32_e32 v13, vcc_lo, s1, v3, vcc_lo
	s_clause 0x1
	global_load_b64 v[2:3], v[10:11], off
	global_load_b32 v10, v[12:13], off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v5, v8, v5
	s_waitcnt vmcnt(1)
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v5, v3, v10
	v_add3_u32 v3, v3, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v3, v9, v4
	v_and_b32_e32 v4, -2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 2, v4
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s4, exec_lo, s1
	s_cbranch_execz .LBB0_7
; %bb.2:
	v_cmp_ne_u32_e32 vcc_lo, 0, v2
	v_cmp_ne_u32_e64 s0, 3, v3
	v_add_co_u32 v0, s1, s2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v1, s1, s3, v1, s1
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s0, exec_lo, s1
	s_cbranch_execz .LBB0_4
; %bb.3:
	global_store_b32 v[0:1], v2, off
                                        ; implicit-def: $vgpr0_vgpr1
.LBB0_4:                                ; %Flow
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_6
; %bb.5:
	v_mov_b32_e32 v2, 1
	global_store_b32 v[0:1], v2, off
.LBB0_6:                                ; %Flow64
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr0_vgpr1
.LBB0_7:                                ; %Flow65
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB0_9
; %bb.8:
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_mov_b32_e32 v2, 1
	global_store_b32 v[0:1], v2, off
.LBB0_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3GOLiiPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3GOLiiPiS_, .Lfunc_end0-_Z3GOLiiPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 536
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z6GOL_IFiiPiS_         ; -- Begin function _Z6GOL_IFiiPiS_
	.globl	_Z6GOL_IFiiPiS_
	.p2align	8
	.type	_Z6GOL_IFiiPiS_,@function
_Z6GOL_IFiiPiS_:                        ; @_Z6GOL_IFiiPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	v_mad_u64_u32 v[1:2], null, s14, s3, v[3:4]
	s_mul_i32 s15, s15, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v2, v0, s15, 1
	v_add_nc_u32_e32 v0, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, s4, v2
	v_cmp_ge_i32_e64 s2, s5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_9
; %bb.1:
	s_add_i32 s2, s5, 2
	s_ashr_i32 s4, s5, 31
	v_mul_lo_u32 v2, v2, s2
	s_load_b128 s[0:3], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v0, v2
	v_add_nc_u32_e32 v2, v2, v1
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_u32 v4, vcc_lo, v0, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s4, v1, vcc_lo
	v_sub_co_u32 v6, vcc_lo, v0, s5
	v_subrev_co_ci_u32_e32 v7, vcc_lo, s4, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	v_lshlrev_b64 v[2:3], 2, v[6:7]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v10, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v1, vcc_lo
	global_load_b96 v[4:6], v[4:5], off offset:4
	v_add_co_u32 v12, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v13, vcc_lo, s1, v3, vcc_lo
	global_load_b64 v[2:3], v[10:11], off
	v_add_co_u32 v10, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v9, vcc_lo
	s_clause 0x1
	global_load_b96 v[7:9], v[12:13], off offset:-12
	global_load_b32 v10, v[10:11], off
	s_waitcnt vmcnt(3)
	v_cmp_ne_u32_e32 vcc_lo, 0, v5
	v_cndmask_b32_e64 v5, 0, 1, vcc_lo
	v_cndmask_b32_e64 v11, 1, 2, vcc_lo
	s_waitcnt vmcnt(2)
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_waitcnt vmcnt(1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	v_cndmask_b32_e32 v5, v11, v5, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v6
	v_cndmask_b32_e64 v6, 0, 1, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v10
	v_add_co_ci_u32_e32 v3, vcc_lo, v5, v3, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v6, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v9
	v_cndmask_b32_e64 v5, 0, 1, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v5, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, -2, v3
	v_cmp_ne_u32_e64 s0, 2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s1
	s_cbranch_execz .LBB1_7
; %bb.2:
	v_cmp_ne_u32_e32 vcc_lo, 0, v2
	v_cmp_ne_u32_e64 s0, 3, v3
	v_add_co_u32 v0, s1, s2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v1, s1, s3, v1, s1
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s0, exec_lo, s1
	s_cbranch_execz .LBB1_4
; %bb.3:
	global_store_b32 v[0:1], v2, off
                                        ; implicit-def: $vgpr0_vgpr1
.LBB1_4:                                ; %Flow
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB1_6
; %bb.5:
	v_mov_b32_e32 v2, 1
	global_store_b32 v[0:1], v2, off
.LBB1_6:                                ; %Flow81
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr0_vgpr1
.LBB1_7:                                ; %Flow82
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB1_9
; %bb.8:
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_mov_b32_e32 v2, 1
	global_store_b32 v[0:1], v2, off
.LBB1_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6GOL_IFiiPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z6GOL_IFiiPiS_, .Lfunc_end1-_Z6GOL_IFiiPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 592
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z9ghostRowsiiPi        ; -- Begin function _Z9ghostRowsiiPi
	.globl	_Z9ghostRowsiiPi
	.p2align	8
	.type	_Z9ghostRowsiiPi,@function
_Z9ghostRowsiiPi:                       ; @_Z9ghostRowsiiPi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s15, s15, s4
	s_mov_b32 s4, exec_lo
	v_add3_u32 v0, v0, s15, 1
	v_cmpx_ge_i32_e64 s3, v0
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x8
	v_ashrrev_i32_e32 v1, 31, v0
	s_mov_b32 s5, s3
	s_ashr_i32 s4, s3, 31
	v_add_co_u32 v2, vcc_lo, v0, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s4, v1, vcc_lo
	s_add_i32 s3, s3, 2
	s_add_i32 s4, s2, 1
	v_mad_u64_u32 v[4:5], null, s3, s2, v[0:1]
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	global_load_b32 v6, v[2:3], off offset:8
	v_mad_u64_u32 v[2:3], null, s3, s4, v[0:1]
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v6, off
	global_load_b32 v2, v[4:5], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9ghostRowsiiPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z9ghostRowsiiPi, .Lfunc_end2-_Z9ghostRowsiiPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 284
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9ghostColsiiPi        ; -- Begin function _Z9ghostColsiiPi
	.globl	_Z9ghostColsiiPi
	.p2align	8
	.type	_Z9ghostColsiiPi,@function
_Z9ghostColsiiPi:                       ; @_Z9ghostColsiiPi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_add_i32 s4, s2, 1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, s4, v1
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_add_i32 s3, s3, 2
	s_load_b64 s[0:1], s[0:1], 0x8
	v_mul_lo_u32 v0, v1, s3
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_co_u32 v2, vcc_lo, v0, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v[0:1], off offset:4
	global_load_b32 v5, v[2:3], off
	s_waitcnt vmcnt(1)
	global_store_b32 v[2:3], v4, off offset:4
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v5, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9ghostColsiiPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z9ghostColsiiPi, .Lfunc_end3-_Z9ghostColsiiPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 204
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3GOLiiPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3GOLiiPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6GOL_IFiiPiS_
    .private_segment_fixed_size: 0
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    .vgpr_spill_count: 0
    .wavefront_size: 32
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    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
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    .max_flat_workgroup_size: 1024
    .name:           _Z9ghostRowsiiPi
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    .sgpr_spill_count: 0
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    .vgpr_spill_count: 0
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
