/*
* @Author: jose
* @Date:   2020-08-24 00:00:00
* @Last Modified by:   jose
* @Last Modified time: 2020-08-24 00:00:00
*/

// local libs
#include "kernels.cuh"
#include <cufft.h>

// ===========================================
// Check Errors
// ===========================================
#define imart_assert_kernel(status, msg) \
    imart_assert_kernel_error((status), __FILE__, __LINE__, msg);

void imart_assert_kernel_error(cudaError_t code, const char *file, int line, const char* msg, bool abort=true)
{
   if (code != cudaSuccess) 
   {
      fprintf(stderr,"\n******* CUDA Error *******"\
                    "\n[Error] Information:\t%s"\
                    "\n[Error] Error code:\t%i"\
                    "\n[Error] Description:\t%s"\
                    "\n[Error] File:\t\t%s"\
                    "\n[Error] Line:\t\t%d\n",
                    msg, code, cudaGetErrorString(code), file, line);
      if (abort) exit(code); 
   };
};

// ===========================================
// Kernels
// ===========================================


// ===========================================
// Data Kernels
// ===========================================
template <typename type>
__global__ void kernel_assign(type * vin, type value, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vin[i] = value;
};

template <typename type>
__global__ void kernel_copy(const type * vin, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin[i];
};

template <typename typein, typename typeout>
__global__ void kernel_cast(const typein * vin, typeout * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = typeout(vin[i]);
};


// ===========================================
// Vector Kernels
// ===========================================
template <typename type>
__global__ void kernel_add_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin[i] + scalar;
};

template <typename type>
__global__ void kernel_sub_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin[i] - scalar;
};

template <typename type>
__global__ void kernel_sub_scalar_inv(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = scalar - vin[i];
};

template <typename type>
__global__ void kernel_mul_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin[i] * scalar;
};

template <typename type>
__global__ void kernel_div_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin[i] / scalar;
};

template <typename type>
__global__ void kernel_div_scalar_inv(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = scalar / vin[i];
};

template <typename type>
__global__ void kernel_pow_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = pow( vin[i], scalar );
};

template <typename type>
__global__ void kernel_pow_scalar_inv(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = pow( scalar, vin[i] );
};

template <typename type>
__global__ void kernel_add(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin1[i] + vin2[i];
};

template <typename type>
__global__ void kernel_sub(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin1[i] - vin2[i];
};

template <typename type>
__global__ void kernel_mul(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin1[i] * vin2[i];
};

template <typename type>
__global__ void kernel_div(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin1[i] / vin2[i];
};

template <typename type>
__global__ void kernel_pow(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = pow( vin1[i], vin2[i] );
};

template <typename type>
__global__ void kernel_equal(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin1[i] == vin2[i]);
};

template <typename type>
__global__ void kernel_greater(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin1[i] > vin2[i]);
};

template <typename type>
__global__ void kernel_less(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin1[i] < vin2[i]);
};

template <typename type>
__global__ void kernel_greater_equal(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin1[i] >= vin2[i];
};

template <typename type>
__global__ void kernel_less_equal(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin1[i] <= vin2[i];
};

template <typename type>
__global__ void kernel_equal_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin[i] == scalar);
};

template <typename type>
__global__ void kernel_greater_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin[i] > scalar);
};

template <typename type>
__global__ void kernel_less_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin[i] < scalar);
};

template <typename type>
__global__ void kernel_greater_equal_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin[i] >= scalar);
};

template <typename type>
__global__ void kernel_less_equal_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin[i] <= scalar);
};

template <typename type>
__global__ void kernel_replace(const type * idxs, const type * vin, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n)
    {
        if (idxs[i]) vout[i] = vin[i];
    };
};

template <typename type>
__global__ void kernel_replace_scalar(const type * idxs, type * vout, type value, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n)
    {
        if (idxs[i]) vout[i] = value;
    };
};

// ===========================================
// Reduction Kernels
// ===========================================
template <typename type>
__global__ void kernel_sum(const type *vin, type *vout, int n)
{
    __shared__ type sdata[256]; // Warning, threads should be 256
    unsigned int iii = blockIdx.x * blockDim.x + threadIdx.x;
    unsigned int tid = threadIdx.x;
    type sum = 0;

    for (unsigned int i = iii; i < n; i += gridDim.x * blockDim.x)
    {
        sum += vin[i];
    };
    
    sdata[tid] = sum;
    __syncthreads();

    for (unsigned int s = blockDim.x >> 1; s > 0; s >>= 1)
    {
        if (tid < s)
        {
            sdata[tid] += sdata[tid + s];
        };
        __syncthreads();
    };

    if (tid == 0) vout[blockIdx.x] = sdata[0];
};


template <typename type>
__global__ void kernel_min(const type *vin, type *vout, int n)
{
    __shared__ type sdata[256];
    unsigned int iii = blockIdx.x * blockDim.x + threadIdx.x;
    unsigned int tid = threadIdx.x;
    type thread_result = vin[0];

    for (unsigned int i = iii; i < n; i += gridDim.x * blockDim.x)
    {
        type tmp = vin[i];
        thread_result = thread_result < tmp ? thread_result : tmp;
    };

    sdata[tid] = thread_result;
    __syncthreads();

    for (unsigned int s = blockDim.x >> 1; s > 0; s >>= 1)
    {
        if (tid < s)
        {
            sdata[tid] =  sdata[tid] < sdata[tid + s]? sdata[tid] : sdata[tid + s];
        };
        __syncthreads();
    };

    if (tid == 0) vout[blockIdx.x] = sdata[0];
};

template <typename type>
__global__ void kernel_max(const type *vin, type *vout, int n)
{
    __shared__ type sdata[256];
    unsigned int iii = blockIdx.x * blockDim.x + threadIdx.x;
    unsigned int tid = threadIdx.x;
    type thread_result = vin[0];

    for (unsigned int i = iii; i < n; i += gridDim.x * blockDim.x)
    {
        type tmp = vin[i];
        thread_result = thread_result > tmp ? thread_result : tmp;
    };

    sdata[tid] = thread_result;
    __syncthreads();

    for (unsigned int s = blockDim.x >> 1; s > 0; s >>= 1)
    {
        if (tid < s)
        {
            sdata[tid] =  sdata[tid] > sdata[tid + s]? sdata[tid] : sdata[tid + s];
        };
        __syncthreads();
    };

    if (tid == 0) vout[blockIdx.x] = sdata[0];
};

// ===========================================
// Image Kernels
// ===========================================
template <typename type>
__global__ void kernel_pad_2d(const type * vin, type * vout, int start0, int start1,
                              int end0, int end1, int n0, int n1)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int j = blockDim.y * blockIdx.y + threadIdx.y;

    int wo = n0+start0+end0;

    if (i < n0 && j < n1) // width = n0, heigth = n1
    {
        vout[start0+i + (start1+j)*wo] = vin[i + j*n0];
    };
};

template <typename type>
__global__ void kernel_unpad_2d(const type * vin, type * vout, int start0, int start1,
                              int end0, int end1, int n0, int n1)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int j = blockDim.y * blockIdx.y + threadIdx.y;

    int wo = n0+start0+end0;

    if (i < n0 && j < n1) // width = n0, heigth = n1
    {
        vout[i + j*n0] = vin[start0+i + (start1+j)*wo];
    };
};

template <typename type>
__global__ void kernel_pad_3d(const type * vin, type * vout, int start0, int start1, int start2,
                              int end0, int end1, int end2, int n0, int n1, int n2)
{
    // int blockIdx_z = __float2int_rd(blockIdx.y * invBlocksInY);
    // int blockIdx_y = blockIdx.y - (blockIdx_z * blocksInY);
    // int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    // int j = (blockIdx_y * blockDim.y) + threadIdx.y;
    // int k = (blockIdx_z * blockDim.z) + threadIdx.z;
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    int wo = n0+start0+end0; //vout size
    int ho = n1+start1+end1; //vout size

    if (i < n0 && j < n1 && k < n2) // width = n0, height = n1, depth = n2
    {
        vout[start0+i + (start1+j)*wo + (start2+k)*wo*ho] = vin[i + j*n0 + k*n0*n1];
    };
};

template <typename type>
__global__ void kernel_unpad_3d(const type * vin, type * vout, int start0, int start1, int start2,
                              int end0, int end1, int end2, int n0, int n1, int n2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    int wo = n0+start0+end0; //vout size
    int ho = n1+start1+end1; //vout size

    if (i < n0 && j < n1 && k < n2) // width = n0, height = n1, depth = n2
    {
        vout[i + j*n0 + k*n0*n1] = vin[start0+i + (start1+j)*wo + (start2+k)*wo*ho];
    };
};

template <typename type>
__global__ void kernel_grid_2d( type * x, type * y, double * sod, 
                                int n0, int n1)
{
    // consider sod conversion to float to support all gpu
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int j = blockDim.y * blockIdx.y + threadIdx.y;

    double c0 = sod[0]; double c1 = sod[1];
    double o0 = sod[2]; double o1 = sod[3];
    double d0 = sod[4]; double d1 = sod[5];
    double d2 = sod[6]; double d3 = sod[7];

    if (i < n0 && j < n1) // width = n0, heigth = n1
    {
        x[i+j*n0] = (type)(d0*c0*i + d1*c1*j + o0);
        y[i+j*n0] = (type)(d2*c0*i + d3*c1*j + o1);
    };
};

template <typename type>
__global__ void kernel_grid_3d( type * x, type * y, type * z, double * sod, 
                                int n0, int n1, int n2)
{
    // consider sod conversion to float to support all gpu
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    double c0 = sod[0]; double c1 = sod[1]; double c2 = sod[2];
    double o0 = sod[3]; double o1 = sod[4]; double o2 = sod[5];
    double d0 = sod[6]; double d1 = sod[7]; double d2 = sod[8];
    double d3 = sod[9]; double d4 = sod[10]; double d5 = sod[11];
    double d6 = sod[12]; double d7 = sod[13]; double d8 = sod[14];

    if (i < n0 && j < n1 && k < n2) // width = n0, height = n1, depth = n2
    {
        x[i + j*n0 + k*n0*n1] = (type)(d0*c0*i + d1*c1*j + d2*c2*k + o0);
        y[i + j*n0 + k*n0*n1] = (type)(d3*c0*i + d4*c1*j + d5*c2*k + o1);
        z[i + j*n0 + k*n0*n1] = (type)(d6*c0*i + d7*c1*j + d8*c2*k + o2);
    };
};

template <typename type>
__global__ void kernel_affine_2d( const type * xin, const type * yin, 
                                  type * xout, type * yout, 
                                  const type * param, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x; // one dimension, buffer in and out xy equal size
    type a0 = param[0]; type a1 = param[1];
    type a2 = param[2]; type a3 = param[3];
    type t0 = param[4]; type t1 = param[5];
    if (i < n)
    {
        xout[i] = (type)(a0*xin[i] + a1*yin[i] + t0);
        yout[i] = (type)(a2*xin[i] + a3*yin[i] + t1);
    };
};

template <typename type>
__global__ void kernel_affine_3d( const type * xin, const type * yin, const type * zin,
                                  type * xout, type * yout, type * zout,
                                  const type * param, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x; // one dimension, buffer in and out xyz equal size
    type a0 = param[0]; type a1 = param[1]; type a2 = param[2];
    type a3 = param[3]; type a4 = param[4]; type a5 = param[5];
    type a6 = param[6]; type a7 = param[7]; type a8 = param[8];
    type t0 = param[9]; type t1 = param[10]; type t2 = param[11];
    if (i < n)
    {
        xout[i] = (type)(a0*xin[i] + a1*yin[i] + a2*zin[i] + t0);
        yout[i] = (type)(a3*xin[i] + a4*yin[i] + a5*zin[i] + t1);
        zout[i] = (type)(a6*xin[i] + a7*yin[i] + a8*zin[i] + t2);
    };
};

template <typename type>
__global__ void kernel_affine_sod_2d( const type * xin, const type * yin,
                                      type * xout, type * yout,
                                      const double * sod, int n)
{
    // consider sod conversion to float to support all gpu
    int i = blockDim.x * blockIdx.x + threadIdx.x; // one dimension, buffer in and out xy equal size
    double c0 = sod[0]; double c1 = sod[1];
    double o0 = sod[2]; double o1 = sod[3];
    double d0 = sod[4]; double d1 = sod[5];
    double d2 = sod[6]; double d3 = sod[7];
    if (i < n)
    {
        xout[i] = (type)(d0*c0*xin[i] + d1*c1*yin[i] + o0);
        yout[i] = (type)(d2*c0*xin[i] + d3*c1*yin[i] + o1);
    }
};

template <typename type>
__global__ void kernel_affine_sod_3d( const type * xin, const type * yin, const type * zin,
                                      type * xout, type * yout, type * zout,
                                      const double * sod, int n)
{
    // consider sod conversion to float to support all gpu
    int i = blockDim.x * blockIdx.x + threadIdx.x; // one dimension, buffer in and out xyz equal size
    double c0 = sod[0]; double c1 = sod[1]; double c2 = sod[2];
    double o0 = sod[3]; double o1 = sod[4]; double o2 = sod[5];
    double d0 = sod[6]; double d1 = sod[7]; double d2 = sod[8];
    double d3 = sod[9]; double d4 = sod[10]; double d5 = sod[11];
    double d6 = sod[12]; double d7 = sod[13]; double d8 = sod[14];
    if (i < n)
    {
        xout[i] = (type)(d0*c0*xin[i] + d1*c1*yin[i] + d2*c2*zin[i] + o0);
        yout[i] = (type)(d3*c0*xin[i] + d4*c1*yin[i] + d5*c2*zin[i] + o1);
        zout[i] = (type)(d6*c0*xin[i] + d7*c1*yin[i] + d8*c2*zin[i] + o2);
    };
};

template <typename type>
__global__ void kernel_dfield_2d( const type * xin, const type * yin,   // grid coordinates
                                  const type * x, const type * y,       // vector field
                                  type * xout, type * yout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x; // one dimension, buffer in and out xy equal size
    if (i < n)
    {
        xout[i] = xin[i] + x[i];
        yout[i] = yin[i] + y[i];
    };
};

template <typename type>
__global__ void kernel_dfield_3d( const type * xin, const type * yin, const type * zin, // grid coordinates
                                  const type * x, const type * y, const type * z,       // vector field
                                  type * xout, type * yout, type * zout,                // output coordinates
                                  int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x; // one dimension, buffer in and out xy equal size
    if (i < n)
    {
        xout[i] = xin[i] + x[i];
        yout[i] = yin[i] + y[i];
        zout[i] = zin[i] + z[i];
    };
};

template <typename type>
__global__ void kernel_nearest_interpolation_2d( const type * xo, const type * yo,
                                                 const type * imgr, type * imgo,
                                                 int w, int h,   //img ref width and height
                                                 int n0, int n1) //img out dims
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int j = blockDim.y * blockIdx.y + threadIdx.y;

    if (i < n0 && j < n1)
    {
        int x = round(xo[i + j*n0]);
        int y = round(yo[i + j*n0]);
        if(x >= 0 && x < w && y >= 0 && y < h)
        {
            imgo[i + j*n0] = imgr[x + y*w];
        };
    };
};

template <typename type>
__global__ void kernel_nearest_interpolation_3d( const type * xo, const type * yo, const type * zo, 
                                                 const type * imgr, type * imgo,
                                                int w, int h, int l,    //img ref width, height and length
                                                int n0, int n1, int n2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    if (i < n0 && j < n1 && k < n2)
    {
        int x = round(xo[i + j*n0 + k*n0*n1]);
        int y = round(yo[i + j*n0 + k*n0*n1]);
        int z = round(yo[i + j*n0 + k*n0*n1]);
        if(x >= 0 && x < w && y >= 0 && y < h && z >= 0 && z < l)
        {
            imgo[i + j*n0 + k*n0*n1] = imgr[x + y*w + z*w*h];
        };
    };
};

template <typename type>
__global__ void kernel_linear_interpolation_2d( const type * xo, const type * yo,
                                                const type * imgr, type * imgo,
                                                int w, int h,   //img ref width and height
                                                int n0, int n1) //img out dims
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int j = blockDim.y * blockIdx.y + threadIdx.y;

    if (i < n0 && j < n1)
    {
        type zero = 0.01;
        int idx = i + j*n0;
        type xt = xo[idx];
        type yt = yo[idx];
        int x = floor(xt);
        int y = floor(yt);
        if(x >= 0 && x < w && y >= 0 && y < h)
        {
            type dx = xt - (type)x;
            type dy = yt - (type)y;
            if (dx < zero && dy < zero)
            {
                imgo[idx] = imgr[x+y*w];
            }
            else if (dy < zero || y >= h - 1) // same y
            {
                imgo[idx] = imgr[x+y*w]*(1-dx) + imgr[x+1+y*w]*(dx);
            }
            else if (dx < zero || x >= w - 1) // same x
            {
                imgo[idx] = imgr[x+y*w]*(1-dy) + imgr[x+(y+1)*w]*(dy);
            }
            else
            {
                // compute case x & y
                type dxdy = dx*dy;
                type r = imgr[x+y*w]*(1-dx-dy+dxdy) + imgr[x+1+y*w]*(dx-dxdy) + imgr[x+(y+1)*w]*(dy-dxdy) + imgr[x+1+(y+1)*w]*dxdy;
                imgo[idx] = r;
            };
        };
    };
};

// template <typename type>
// __global__ void kernel_linear_interpolation_2d( const type * xo, const type * yo,
//                                                 const type * imgr, type * imgo,
//                                                 int w, int h,   //img ref width and height
//                                                 int n0, int n1) //img out dims
// {
//     int i = blockDim.x * blockIdx.x + threadIdx.x;
//     int j = blockDim.y * blockIdx.y + threadIdx.y;

//     if (i < n0 && j < n1)
//     {
//         type xt = xo[i + j*n0];
//         type yt = yo[i + j*n0];
//         int x = floor(xt);
//         int y = floor(yt);
//         if(x >= 0 && x < w && y >= 0 && y < h - 1)
//         {
//             // __shared__ iv[4];
//             type iv[4] = {imgr[x+y*w], imgr[x+1+y*w], imgr[x+(y+1)*w], imgr[x+1+(y+1)*w]};
//             type dx = xt - (type)x;
//             type dy = yt - (type)y;
//             type dxdy = dx*dy;
//             type r = iv[0]*(1-dx-dy+dxdy) + iv[1]*(dx-dxdy) + iv[2]*(dy-dxdy) + iv[3]*dxdy;
//             imgo[i + j*n0] = r;
//         }
//         else if(x >= 0 && x < w && y == h - 1) // border case
//         {
//             type iv[2] = {imgr[x+y*w], imgr[x+1+y*w]};
//             type dx = xt - (type)x;
//             type r = iv[0]*(1-dx) + iv[1]*(dx);
//             imgo[i + j*n0] = r;
//         };
//     };
// };

template <typename type>
__global__ void kernel_linear_interpolation_3d( const type * xo, const type * yo, const type * zo,
                                                const type * imgr, type * imgo,
                                                int w, int h, int l, //img ref width, height and length
                                                int n0, int n1, int n2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    if (i < n0 && j < n1 && k < n2)
    {
        type zero = 0.01;
        int idx = i + j*n0 + k*n0*n1;
        type xt = xo[idx];
        type yt = yo[idx];
        type zt = zo[idx];
        int x = floor(xt);
        int y = floor(yt);
        int z = floor(zt);
        if(x >= 0 && x < w && y >= 0 && y < h && z >= 0 && z < l)
        {
            type dx = xt - (type)x;
            type dy = yt - (type)y;
            type dz = zt - (type)z;
            if (dx <= zero && dy <= zero && dz <= zero)
            {
                imgo[idx] = imgr[x+y*w+z*w*h];
            }
            else if (dz <= zero || z >= l - 1) // same z
            {   
                if (dy <= zero || y >= h - 1) // same y
                {
                    imgo[idx] = imgr[x+y*w+z*w*h]*(1-dx) + imgr[x+1+y*w+z*w*h]*(dx);
                }
                else if (dx <= zero || x >= w - 1) // same x
                {
                    imgo[idx] = imgr[x+y*w+z*w*h]*(1-dy) + imgr[x+(y+1)*w+z*w*h]*(dy);
                }
                else
                {
                    // compute case x & y
                    type dxdy = dx*dy;
                    type r = imgr[x+y*w+z*w*h]*(1-dx-dy+dxdy) + imgr[x+1+y*w+z*w*h]*(dx-dxdy) + imgr[x+(y+1)*w+z*w*h]*(dy-dxdy) + imgr[x+1+(y+1)*w+z*w*h]*dxdy;
                    imgo[idx] = r;
                };
            }
            else if (dy <= zero || y >= h - 1) // same y
            {
                if (dx <= zero || x >= w - 1) // same x
                {
                    imgo[idx] = imgr[x+y*w+z*w*h]*(1-dz) + imgr[x+y*w+(z+1)*w*h]*(dz);
                }
                else
                {
                    // compute case x & z
                    type dxdz = dx*dz;
                    type r = imgr[x+y*w+z*w*h]*(1-dx-dz+dxdz) + imgr[x+1+y*w+z*w*h]*(dx-dxdz) + imgr[x+y*w+(z+1)*w*h]*(dz-dxdz) + imgr[x+1+y*w+(z+1)*w*h]*dxdz;
                    imgo[idx] = r;
                };
            }
            else if (dx <= zero || x >= w - 1) // same x
            {
                // compute case y & z
                type dydz = dy*dz;
                type r = imgr[x+y*w+z*w*h]*(1-dy-dz+dydz) + imgr[x+(y+1)*w+z*w*h]*(dy-dydz) + imgr[x+y*w+(z+1)*w*h]*(dz-dydz) + imgr[x+(y+1)*w+(z+1)*w*h]*dydz;
                imgo[idx] = r;
            }
            else
            {
                // compute case x & y & z
                type dxdy = dx*dy;
                type rv = imgr[x+y*w+z*w*h]*(1-dx-dy+dxdy) + imgr[x+1+y*w+z*w*h]*(dx-dxdy) + imgr[x+(y+1)*w+z*w*h]*(dy-dxdy) + imgr[x+1+(y+1)*w+z*w*h]*dxdy;
                type rw = imgr[x+y*w+(z+1)*w*h]*(1-dx-dy+dxdy) + imgr[x+1+y*w+(z+1)*w*h]*(dx-dxdy) + imgr[x+(y+1)*w+(z+1)*w*h]*(dy-dxdy) + imgr[x+1+(y+1)*w+(z+1)*w*h]*dxdy;
                type r = rv*(1-dz) + rw*dz;
                imgo[idx] = r;
            };
        };
    };
};

// template <typename type>
// __global__ void kernel_linear_interpolation_3d( const type * xo, const type * yo, const type * zo,
//                                                 const type * imgr, type * imgo,
//                                                 int w, int h, int l, //img ref width, height and length
//                                                 int n0, int n1, int n2)
// {
//     int i = (blockIdx.x * blockDim.x) + threadIdx.x;
//     int j = (blockIdx.y * blockDim.y) + threadIdx.y;
//     int k = (blockIdx.z * blockDim.z) + threadIdx.z;

//     if (i < n0 && j < n1 && k < n2)
//     {
//         type xt = xo[i + j*n0 + k*n0*n1];
//         type yt = yo[i + j*n0 + k*n0*n1];
//         type zt = zo[i + j*n0 + k*n0*n1];
//         int x = floor(xt);
//         int y = floor(yt);
//         int z = floor(zt);
//         if(x >= 0 && x < w && y >= 0 && y < h && z >= 0 && z < l-1)
//         {
//             type iv[4] = {imgr[x+y*w+z*w*h], imgr[x+1+y*w+z*w*h], imgr[x+(y+1)*w+z*w*h], imgr[x+1+(y+1)*w+z*w*h]};
//             type iw[4] = {imgr[x+y*w+(z+1)*w*h], imgr[x+1+y*w+(z+1)*w*h], imgr[x+(y+1)*w+(z+1)*w*h], imgr[x+1+(y+1)*w+(z+1)*w*h]};
//             type dx = xt - (type)x;
//             type dy = yt - (type)y;
//             type dxdy = dx*dy;
//             type rv = iv[0]*(1-dx-dy+dxdy) + iv[1]*(dx-dxdy) + iv[2]*(dy-dxdy) + iv[3]*dxdy;
//             type rw = iw[0]*(1-dx-dy+dxdy) + iw[1]*(dx-dxdy) + iw[2]*(dy-dxdy) + iw[3]*dxdy;
//             type dz = zt - (type)z;
//             type r = rv*(1-dz) + rw*dz;
//             imgo[i + j*n0 + k*n0*n1] = r;
//         }
//         else if(x >= 0 && x < w && y >= 0 && y < h && z == l-1) // border case
//         {
//             type iv[4] = {imgr[x+y*w+z*w*h], imgr[x+1+y*w+z*w*h], imgr[x+(y+1)*w+z*w*h], imgr[x+1+(y+1)*w+z*w*h]};
//             type dx = xt - (type)x;
//             type dy = yt - (type)y;
//             type dxdy = dx*dy;
//             type rv = iv[0]*(1-dx-dy+dxdy) + iv[1]*(dx-dxdy) + iv[2]*(dy-dxdy) + iv[3]*dxdy;
//             imgo[i + j*n0 + k*n0*n1] = rv;
//         };
//     };
// };


// template <typename type>
// __device__ void cubic(type p[4], type * x, type * out) 
// {
//     out[0] = p[1] + 0.5 * x[0]*(p[2] - p[0] + x[0]*(2.0*p[0] - 5.0*p[1] + 4.0*p[2] - p[3] + x[0]*(3.0*(p[1] - p[2]) + p[3] - p[0])));
// };

template <typename type>
__device__ type cubic(type p[4], type x) 
{
    return p[1] + 0.5 * x*(p[2] - p[0] + x*(2.0*p[0] - 5.0*p[1] + 4.0*p[2] - p[3] + x*(3.0*(p[1] - p[2]) + p[3] - p[0])));
};

template <typename type>
__global__ void kernel_cubic_interpolation_2d( const type * xo, const type * yo,
                                                const type * imgr, type * imgo,
                                                int w, int h,   //img ref width and height
                                                int n0, int n1) //img out dims
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int j = blockDim.y * blockIdx.y + threadIdx.y;

    if (i < n0 && j < n1)
    {
        type xt = xo[i + j*n0];
        type yt = yo[i + j*n0];
        int x = floor(xt);
        int y = floor(yt);
        if(x >= 1 && x < w - 2 && y >= 1 && y < h - 2)
        {
            type dx = xt - (type)x;
            type dy = yt - (type)y;

            type r0[4] = {imgr[x-1+(y-1)*w], imgr[x+(y-1)*w], imgr[x+1+(y-1)*w], imgr[x+2+(y-1)*w]};
            type r1[4] = {imgr[x-1+(y)*w]  , imgr[x+(y)*w]  , imgr[x+1+(y)*w]  , imgr[x+2+(y)*w]};
            type r2[4] = {imgr[x-1+(y+1)*w], imgr[x+(y+1)*w], imgr[x+1+(y+1)*w], imgr[x+2+(y+1)*w]};
            type r3[4] = {imgr[x-1+(y+2)*w], imgr[x+(y+2)*w], imgr[x+1+(y+2)*w], imgr[x+2+(y+2)*w]};

            type r[4] = {cubic(r0, dx), cubic(r1, dx), cubic(r2, dx), cubic(r3, dx) };
            imgo[i + j*n0] = cubic(r, dy);
        }
        else if(x >= 0 && x < w && y >= 0 && y < h - 1)
        {
            // __shared__ iv[4];
            type iv[4] = {imgr[x+y*w], imgr[x+1+y*w], imgr[x+(y+1)*w], imgr[x+1+(y+1)*w]};
            type dx = xt - (type)x;
            type dy = yt - (type)y;
            type dxdy = dx*dy;
            type r = iv[0]*(1-dx-dy+dxdy) + iv[1]*(dx-dxdy) + iv[2]*(dy-dxdy) + iv[3]*dxdy;
            imgo[i + j*n0] = r;
        }
        else if(x >= 0 && x < w && y == h - 1) // border case
        {
            type iv[2] = {imgr[x+y*w], imgr[x+1+y*w]};
            type dx = xt - (type)x;
            type r = iv[0]*(1-dx) + iv[1]*(dx);
            imgo[i + j*n0] = r;
        };
    };
};

template <typename type>
__global__ void kernel_cubic_interpolation_3d( const type * xo, const type * yo, const type * zo,
                                                const type * imgr, type * imgo,
                                                int w, int h, int l, //img ref width, height and length
                                                int n0, int n1, int n2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    if (i < n0 && j < n1 && k < n2)
    {
        type xt = xo[i + j*n0 + k*n0*n1];
        type yt = yo[i + j*n0 + k*n0*n1];
        type zt = zo[i + j*n0 + k*n0*n1];
        int x = floor(xt);
        int y = floor(yt);
        int z = floor(zt);
        if(x >= 1 && x < w - 2 && y >= 1 && y < h - 2 && z >= 1 && z < l - 2)
        {
            type dx = xt - (type)x;
            type dy = yt - (type)y;
            type dz = zt - (type)z;

            type r00[4] = {imgr[x-1+(y-1)*w+(z-1)*w*h], imgr[x+(y-1)*w+(z-1)*w*h], imgr[x+1+(y-1)*w+(z-1)*w*h], imgr[x+2+(y-1)*w+(z-1)*w*h]};
            type r01[4] = {imgr[x-1+(y)*w+(z-1)*w*h]  , imgr[x+(y)*w+(z-1)*w*h]  , imgr[x+1+(y)*w+(z-1)*w*h]  , imgr[x+2+(y)*w+(z-1)*w*h]};
            type r02[4] = {imgr[x-1+(y+1)*w+(z-1)*w*h], imgr[x+(y+1)*w+(z-1)*w*h], imgr[x+1+(y+1)*w+(z-1)*w*h], imgr[x+2+(y+1)*w+(z-1)*w*h]};
            type r03[4] = {imgr[x-1+(y+2)*w+(z-1)*w*h], imgr[x+(y+2)*w+(z-1)*w*h], imgr[x+1+(y+2)*w+(z-1)*w*h], imgr[x+2+(y+2)*w+(z-1)*w*h]};
            type rx0[4] = {cubic(r00, dx), cubic(r01, dx), cubic(r02, dx), cubic(r03, dx)};

            type r10[4] = {imgr[x-1+(y-1)*w+z*w*h], imgr[x+(y-1)*w+z*w*h], imgr[x+1+(y-1)*w+z*w*h], imgr[x+2+(y-1)*w+z*w*h]};
            type r11[4] = {imgr[x-1+(y)*w+z*w*h]  , imgr[x+(y)*w+z*w*h]  , imgr[x+1+(y)*w+z*w*h]  , imgr[x+2+(y)*w+z*w*h]};
            type r12[4] = {imgr[x-1+(y+1)*w+z*w*h], imgr[x+(y+1)*w+z*w*h], imgr[x+1+(y+1)*w+z*w*h], imgr[x+2+(y+1)*w+z*w*h]};
            type r13[4] = {imgr[x-1+(y+2)*w+z*w*h], imgr[x+(y+2)*w+z*w*h], imgr[x+1+(y+2)*w+z*w*h], imgr[x+2+(y+2)*w+z*w*h]};
            type rx1[4] = {cubic(r10, dx), cubic(r11, dx), cubic(r12, dx), cubic(r13, dx)};

            type r20[4] = {imgr[x-1+(y-1)*w+(z+1)*w*h], imgr[x+(y-1)*w+(z+1)*w*h], imgr[x+1+(y-1)*w+(z+1)*w*h], imgr[x+2+(y-1)*w+(z+1)*w*h]};
            type r21[4] = {imgr[x-1+(y)*w+(z+1)*w*h]  , imgr[x+(y)*w+(z+1)*w*h]  , imgr[x+1+(y)*w+(z+1)*w*h]  , imgr[x+2+(y)*w+(z+1)*w*h]};
            type r22[4] = {imgr[x-1+(y+1)*w+(z+1)*w*h], imgr[x+(y+1)*w+(z+1)*w*h], imgr[x+1+(y+1)*w+(z+1)*w*h], imgr[x+2+(y+1)*w+(z+1)*w*h]};
            type r23[4] = {imgr[x-1+(y+2)*w+(z+1)*w*h], imgr[x+(y+2)*w+(z+1)*w*h], imgr[x+1+(y+2)*w+(z+1)*w*h], imgr[x+2+(y+2)*w+(z+1)*w*h]};
            type rx2[4] = {cubic(r20, dx), cubic(r21, dx), cubic(r22, dx), cubic(r23, dx)};

            type r30[4] = {imgr[x-1+(y-1)*w+(z+2)*w*h], imgr[x+(y-1)*w+(z+2)*w*h], imgr[x+1+(y-1)*w+(z+2)*w*h], imgr[x+2+(y-1)*w+(z+2)*w*h]};
            type r31[4] = {imgr[x-1+(y)*w+(z+2)*w*h]  , imgr[x+(y)*w+(z+2)*w*h]  , imgr[x+1+(y)*w+(z+2)*w*h]  , imgr[x+2+(y)*w+(z+2)*w*h]};
            type r32[4] = {imgr[x-1+(y+1)*w+(z+2)*w*h], imgr[x+(y+1)*w+(z+2)*w*h], imgr[x+1+(y+1)*w+(z+2)*w*h], imgr[x+2+(y+1)*w+(z+2)*w*h]};
            type r33[4] = {imgr[x-1+(y+2)*w+(z+2)*w*h], imgr[x+(y+2)*w+(z+2)*w*h], imgr[x+1+(y+2)*w+(z+2)*w*h], imgr[x+2+(y+2)*w+(z+2)*w*h]};
            type rx3[4] = {cubic(r30, dx), cubic(r31, dx), cubic(r32, dx), cubic(r33, dx)};

            type ry[4] = {cubic(rx0, dy), cubic(rx1, dy), cubic(rx2, dy), cubic(rx3, dy)};
            imgo[i + j*n0 + k*n0*n1] = cubic(ry, dz);
        }
        else if(x >= 0 && x < w && y >= 0 && y < h && z >= 0 && z < l-1)
        {
            type iv[4] = {imgr[x+y*w+z*w*h], imgr[x+1+y*w+z*w*h], imgr[x+(y+1)*w+z*w*h], imgr[x+1+(y+1)*w+z*w*h]};
            type iw[4] = {imgr[x+y*w+(z+1)*w*h], imgr[x+1+y*w+(z+1)*w*h], imgr[x+(y+1)*w+(z+1)*w*h], imgr[x+1+(y+1)*w+(z+1)*w*h]};
            type dx = xt - (type)x;
            type dy = yt - (type)y;
            type dxdy = dx*dy;
            type rv = iv[0]*(1-dx-dy+dxdy) + iv[1]*(dx-dxdy) + iv[2]*(dy-dxdy) + iv[3]*dxdy;
            type rw = iw[0]*(1-dx-dy+dxdy) + iw[1]*(dx-dxdy) + iw[2]*(dy-dxdy) + iw[3]*dxdy;
            type dz = zt - (type)z;
            type r = rv*(1-dz) + rw*dz;
            imgo[i + j*n0 + k*n0*n1] = r;
        }
        else if(x >= 0 && x < w && y >= 0 && y < h && z == l-1) // border case
        {
            type iv[4] = {imgr[x+y*w+z*w*h], imgr[x+1+y*w+z*w*h], imgr[x+(y+1)*w+z*w*h], imgr[x+1+(y+1)*w+z*w*h]};
            type dx = xt - (type)x;
            type dy = yt - (type)y;
            type dxdy = dx*dy;
            type rv = iv[0]*(1-dx-dy+dxdy) + iv[1]*(dx-dxdy) + iv[2]*(dy-dxdy) + iv[3]*dxdy;
            imgo[i + j*n0 + k*n0*n1] = rv;
        };
    };
};

template <typename type>
__global__ void kernel_gradientx( const type * imgr, type * imgo, 
                                  int n0, int n1, int n2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    if (i < n0 && j < n1 && (k == 0 || k < n2))
    {
        if(i == 0)
        {
            imgo[i + j*n0 + k*n0*n1] = imgr[i+1 + j*n0 + k*n0*n1] - imgr[i + j*n0 + k*n0*n1];
        }
        else if(i == n0 - 1)
        {
            imgo[i + j*n0 + k*n0*n1] = imgr[i + j*n0 + k*n0*n1] - imgr[i-1 + j*n0 + k*n0*n1];
        }
        else
        {
            imgo[i + j*n0 + k*n0*n1] = 0.5*imgr[i+1 + j*n0 + k*n0*n1] - 0.5*imgr[i-1 + j*n0 + k*n0*n1];
        };
    };
};

template <typename type>
__global__ void kernel_gradienty( const type * imgr, type * imgo, 
                                  int n0, int n1, int n2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    if (i < n0 && j < n1 && (k == 0 || k < n2))
    {
        if(j == 0)
        {
            imgo[i + j*n0 + k*n0*n1] = imgr[i + (j+1)*n0 + k*n0*n1] - imgr[i + j*n0 + k*n0*n1];
        }
        else if(j == n1 - 1)
        {
            imgo[i + j*n0 + k*n0*n1] = imgr[i + j*n0 + k*n0*n1] - imgr[i + (j-1)*n0 + k*n0*n1];
        }
        else
        {
            imgo[i + j*n0 + k*n0*n1] = 0.5*imgr[i + (j+1)*n0 + k*n0*n1] - 0.5*imgr[i + (j-1)*n0 + k*n0*n1];
        };
    };
};

template <typename type>
__global__ void kernel_gradientz( const type * imgr, type * imgo, 
                                  int n0, int n1, int n2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    if (i < n0 && j < n1 && k < n2)
    {
        if(k == 0)
        {
            imgo[i + j*n0 + k*n0*n1] = imgr[i + j*n0 + (k+1)*n0*n1] - imgr[i + j*n0 + k*n0*n1];
        }
        else if(k == n2 - 1)
        {
            imgo[i + j*n0 + k*n0*n1] = imgr[i + j*n0 + k*n0*n1] - imgr[i + j*n0 + (k-1)*n0*n1];
        }
        else
        {
            imgo[i + j*n0 + k*n0*n1] = 0.5*imgr[i + j*n0 + (k+1)*n0*n1] - 0.5*imgr[i + j*n0 + (k-1)*n0*n1];
        };
    };
};

template <typename type>
__global__ void kernel_convolution_2d( const type * imgr, const type * kern, //kernel width
                                       type * imgo, int n0, int n1, int kw0, int kw1)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int j = blockDim.y * blockIdx.y + threadIdx.y;
    int off0 = kw0>>1; int off1 = kw1>>1;

    if(i >= off0 && i < n0 - off0 && j >= off1 && j < n1 - off1)
    {
        type sum = 0;
        for (int p = 0; p < kw1; p++)
        {
            for (int q = 0; q < kw0; q++)
            {
                sum += imgr[i+p-off0 + (j+q-off1)*n0] * kern[p*kw0 + q];
            };
        };
        imgo[i + j*n0] = sum;
    };
};

template <typename type>
__global__ void kernel_convolution_3d( const type * imgr, const type * kern, //kernel width
                                       type * imgo, int n0, int n1, int n2, int kw0, int kw1, int kw2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;
    
    int off0 = kw0>>1; int off1 = kw1>>1; int off2 = kw2>>1;

    if(i >= off0 && i < n0 - off0 && j >= off1 && j < n1 - off1 && k >= off2 && k < n2 - off2)
    {
        type sum = 0;
        for (int r = 0; r < kw2; r++)
        {
            for (int p = 0; p < kw1; p++)
            {
                for (int q = 0; q < kw0; q++)
                {
                    sum += imgr[i+q-off0 + (j+p-off1)*n0 + (k+r-off2)*n0*n1] * kern[r*kw0*kw1 + p*kw0 + q];
                };
            };
        };
        imgo[i + j*n0 + k*n0*n1] = sum;
    };
};


















// ===========================================
// Kernels Calls
// ===========================================


// ===========================================
// Data Kernels
// ===========================================
template <typename type>
void cuda_kernel_assign( std::vector<int> & grid, std::vector<int> & block, 
                         type * vin, type value, int n )
{
    // printf("kernel assign init\n");
    // printf("block: [%i, %i, %i]\n", block[0], block[1] , block[2]);
    // printf("grid: [%i, %i, %i]\n", grid[0], grid[1] , grid[2]);
    // printf("address: %x\n", vin);
    // printf("value: %f\n", value);
    // printf("size: %i\n", n);

    dim3 grd(grid[0]);
    dim3 blk(block[0]);

    kernel_assign<<<grd,blk>>>(vin, value, n);
    // kernel_assign<type><<<grd,blk>>>(vin, value, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel assign" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel assign" );
    // printf("kernel assign finish\n");
};

template <typename type>
void cuda_kernel_copy( std::vector<int> & grid, std::vector<int> & block,
                       const type * vin, type * vout, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_copy<<<grd,blk>>>(vin, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel copy" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel copy" );
};

template <typename typein, typename typeout>
void cuda_kernel_cast( std::vector<int> & grid, std::vector<int> & block, 
                       const typein * vin, typeout * vout, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_cast <typein,typeout><<<grd,blk>>>(vin, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel cast" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel cast" );
};

// ===========================================
// Vector Kernels
// ===========================================
template <typename type>
void cuda_kernel_add_scalar( std::vector<int> & grid, std::vector<int> & block, 
                             const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_add_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel add scalar" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel add scalar" );
};

template <typename type>
void cuda_kernel_sub_scalar( std::vector<int> & grid, std::vector<int> & block, 
                             const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_sub_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel sub scalar" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel sub scalar" );
};

template <typename type>
void cuda_kernel_sub_scalar_inv( std::vector<int> & grid, std::vector<int> & block, 
                             const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_sub_scalar_inv<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel sub scalar inv" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel sub scalar inv" );
};

template <typename type>
void cuda_kernel_mul_scalar( std::vector<int> & grid, std::vector<int> & block, 
                             const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_mul_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel mul scalar" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel mul scalar" );
};

template <typename type>
void cuda_kernel_div_scalar( std::vector<int> & grid, std::vector<int> & block, 
                             const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_div_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel div scalar" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel div scalar" );
};

template <typename type>
void cuda_kernel_div_scalar_inv( std::vector<int> & grid, std::vector<int> & block, 
                                 const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_div_scalar_inv<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel div scalar inv" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel div scalar inv" );
};

template <typename type>
void cuda_kernel_pow_scalar( std::vector<int> & grid, std::vector<int> & block, 
                             const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_pow_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel pow scalar" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel pow scalar" );
};

template <typename type>
void cuda_kernel_pow_scalar_inv( std::vector<int> & grid, std::vector<int> & block, 
                                 const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_pow_scalar_inv<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel pow scalar inv" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel pow scalar inv" );
};

template <typename type>
void cuda_kernel_add( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin1, const type * vin2, type * vout, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_add<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel add" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel add" );
};

template <typename type>
void cuda_kernel_sub( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin1, const type * vin2, type * vout, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_sub<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel sub" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel sub" );
};

template <typename type>
void cuda_kernel_mul( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin1, const type * vin2, type * vout, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_mul<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel mul" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel mul" );
};

template <typename type>
void cuda_kernel_div( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin1, const type * vin2, type * vout, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_div<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel div" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel div" );
};

template <typename type>
void cuda_kernel_pow( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin1, const type * vin2, type * vout, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_pow<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel pow" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel pow" );
};

template <typename type>
void cuda_kernel_equal( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin1, const type * vin2, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_equal<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel equal" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel equal" );
};

template <typename type>
void cuda_kernel_greater( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin1, const type * vin2, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_greater<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel" );
};

template <typename type>
void cuda_kernel_less( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin1, const type * vin2, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_less<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel" );
};

template <typename type>
void cuda_kernel_greater_equal( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin1, const type * vin2, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_greater_equal<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel greater equal" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel greater equal" );
};

template <typename type>
void cuda_kernel_less_equal( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin1, const type * vin2, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_less_equal<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel less equal" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel less equal" );
};

template <typename type>
void cuda_kernel_equal_scalar( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin, type * vout, type scalar, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_equal_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel equal scalar" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel equal scalar" );
};

template <typename type>
void cuda_kernel_greater_scalar( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin, type * vout, type scalar, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_greater_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel greater scalar" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel greater scalar" );
};

template <typename type>
void cuda_kernel_less_scalar( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin, type * vout, type scalar, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_less_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel less scalar" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel less scalar" );
};

template <typename type>
void cuda_kernel_greater_equal_scalar( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin, type * vout, type scalar, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_greater_equal_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel greater equal scalar" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel greater equal scalar" );
};

template <typename type>
void cuda_kernel_less_equal_scalar( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin, type * vout, type scalar, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_less_equal_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel less equal scalar" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel less equal scalar" );
};

template <typename type>
void cuda_kernel_replace( std::vector<int> & grid, std::vector<int> & block, 
                          const type * idxs, const type * vin, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_replace<<<grd,blk>>>(idxs, vin, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel replace" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel replace" );
};

template <typename type>
void cuda_kernel_replace_scalar( std::vector<int> & grid, std::vector<int> & block, 
                          const type * idxs, type * vout, type value, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_replace_scalar<<<grd,blk>>>(idxs, vout, value, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel replace" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel replace" );
};


// ===========================================
// Reduction Kernels
// ===========================================
template <typename type>
void cuda_kernel_sum( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin, type * vout, int n)
{
    // printf("kernel sum init\n");
    // printf("block: [%i, %i, %i]\n", block[0], block[1] , block[2]);
    // printf("grid: [%i, %i, %i]\n", grid[0], grid[1] , grid[2]);
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_sum<<<grd,blk>>>(vin, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel sum" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel sum" );
};

template <typename type>
void cuda_kernel_min( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_min<<<grd,blk>>>(vin, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel min" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel min" );
};

template <typename type>
void cuda_kernel_max( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_max<<<grd,blk>>>(vin, vout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel max" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel max" );
};

// ===========================================
// Image Kernels
// ===========================================
template <typename type>
void cuda_kernel_pad_2d( std::vector<int> & grid, std::vector<int> & block, 
                         const type * vin, type * vout, int start0, int start1,
                         int end0, int end1, int n0, int n1 )
{
    // printf("kernel pad init\n");
    // printf("block: [%i, %i, %i]\n", block[0], block[1] , block[2]);
    // printf("grid: [%i, %i, %i]\n", grid[0], grid[1] , grid[2]);
    dim3 grd(grid[0],grid[1]);
    dim3 blk(block[0],block[1]);
    kernel_pad_2d<<<grd,blk>>>(vin, vout, start0, start1, end0, end1, n0, n1);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel pad 2d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel pad 2d" );
};

template <typename type>
void cuda_kernel_unpad_2d( std::vector<int> & grid, std::vector<int> & block, 
                           const type * vin, type * vout, int start0, int start1,
                           int end0, int end1, int n0, int n1 )
{
    dim3 grd(grid[0],grid[1]);
    dim3 blk(block[0],block[1]);
    kernel_unpad_2d<<<grd,blk>>>(vin, vout, start0, start1, end0, end1, n0, n1);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel unpad 2d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel unpad 2d" );
};

template <typename type>
void cuda_kernel_pad_3d( std::vector<int> & grid, std::vector<int> & block, 
                         const type * vin, type * vout, int start0, int start1, int start2,
                         int end0, int end1, int end2, int n0, int n1, int n2 )
{
    // printf("kernel pad 3d init\n");
    // printf("block: [%i, %i, %i]\n", block[0], block[1] , block[2]);
    // printf("grid: [%i, %i, %i]\n", grid[0], grid[1] , grid[2]);
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_pad_3d<<<grd,blk>>>(vin, vout, start0, start1, start2, end0, end1, end2, n0, n1, n2);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel pad 3d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel pad 3d" );
};

template <typename type>
void cuda_kernel_unpad_3d( std::vector<int> & grid, std::vector<int> & block, 
                           const type * vin, type * vout, int start0, int start1, int start2,
                         int end0, int end1, int end2, int n0, int n1, int n2 )
{
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_unpad_3d<<<grd,blk>>>(vin, vout, start0, start1, start2, end0, end1, end2, n0, n1, n2);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel unpad 3d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel unpad 3d" );
};

template <typename type>
void cuda_kernel_grid_2d( std::vector<int> & grid, std::vector<int> & block, 
                          type * x, type * y, double * sod, 
                          int n0, int n1)
{
    dim3 grd(grid[0],grid[1]);
    dim3 blk(block[0],block[1]);
    kernel_grid_2d<<<grd,blk>>>(x, y, sod, n0, n1);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel grid 2d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel grid 2d" );
};

template <typename type>
void cuda_kernel_grid_3d( std::vector<int> & grid, std::vector<int> & block,
                          type * x, type * y, type * z, double * sod, 
                          int n0, int n1, int n2)
{
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_grid_3d<<<grd,blk>>>(x, y, z, sod, n0, n1, n2);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel grid 3d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel grid 3d" );
};

template <typename type>
void cuda_kernel_affine_2d( std::vector<int> & grid, std::vector<int> & block, 
                            const type * xin, const type * yin, 
                            type * xout, type * yout, 
                            const type * param, int n)
{
    // printf("kernel affine 2d init\n");
    // printf("block: [%i, %i, %i]\n", block[0], block[1] , block[2]);
    // printf("grid: [%i, %i, %i]\n", grid[0], grid[1] , grid[2]);
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_affine_2d<<<grd,blk>>>(xin, yin, xout, yout, param, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel affine 2d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel affine 2d" );
};

template <typename type>
void cuda_kernel_affine_3d( std::vector<int> & grid, std::vector<int> & block,
                            const type * xin, const type * yin, const type * zin,
                            type * xout, type * yout, type * zout,
                            const type * param, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_affine_3d<<<grd,blk>>>(xin, yin, zin, xout, yout, zout, param, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel affine 3d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel affine 3d" );
};

template <typename type>
void cuda_kernel_affine_sod_2d( std::vector<int> & grid, std::vector<int> & block,
                                const type * xin, const type * yin,
                                type * xout, type * yout,
                                const double * sod, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_affine_sod_2d<<<grd,blk>>>(xin, yin, xout, yout, sod, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel affine sod 2d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel affine sod 2d" );
};

template <typename type>
void cuda_kernel_affine_sod_3d( std::vector<int> & grid, std::vector<int> & block,
                                const type * xin, const type * yin, const type * zin,
                                type * xout, type * yout, type * zout,
                                const double * sod, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_affine_sod_3d<<<grd,blk>>>(xin, yin, zin, xout, yout, zout, sod, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel affine sod 3d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel affine sod 3d" );
};

template <typename type>
void cuda_kernel_dfield_2d( std::vector<int> & grid, std::vector<int> & block,
                            const type * xin, const type * yin,   // grid coordinates
                            const type * x, const type * y,       // vector field
                            type * xout, type * yout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_dfield_2d<<<grd,blk>>>(xin, yin, x, y, xout, yout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel dfield 2d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel dfield 2d" );
};

template <typename type>
void cuda_kernel_dfield_3d( std::vector<int> & grid, std::vector<int> & block,
                            const type * xin, const type * yin, const type * zin, // grid coordinates
                            const type * x, const type * y, const type * z,       // vector field
                            type * xout, type * yout, type * zout,                // output coordinates
                            int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_dfield_3d<<<grd,blk>>>(xin, yin, zin, x, y, z, xout, yout, zout, n);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel dfield 3d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel dfield 3d" );
};

template <typename type>
void cuda_kernel_nearest_interpolation_2d( std::vector<int> & grid, std::vector<int> & block,
                                           const type * xo, const type * yo,
                                           const type * imgr, type * imgo,
                                           int w, int h,   //img ref width and height
                                           int n0, int n1) //img out dims
{
    dim3 grd(grid[0],grid[1]);
    dim3 blk(block[0],block[1]);
    kernel_nearest_interpolation_2d<<<grd,blk>>>(xo, yo, imgr, imgo, w, h, n0, n1);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel nearest interpolation 2d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel nearest interpolation 2d" );
};

template <typename type>
void cuda_kernel_nearest_interpolation_3d( std::vector<int> & grid, std::vector<int> & block, 
                                           const type * xo, const type * yo, const type * zo, 
                                           const type * imgr, type * imgo,
                                           int w, int h, int l,    //img ref width, height and length
                                           int n0, int n1, int n2)
{
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_nearest_interpolation_3d<<<grd,blk>>>(xo, yo, zo, imgr, imgo, w, h, l, n0, n1, n2);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel nearest interpolation 3d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel nearest interpolation 3d" );
};

template <typename type>
void cuda_kernel_linear_interpolation_2d( std::vector<int> & grid, std::vector<int> & block,
                                          const type * xo, const type * yo,
                                          const type * imgr, type * imgo,
                                          int w, int h,   //img ref width and height
                                          int n0, int n1) //img out dims
{
    dim3 grd(grid[0],grid[1]);
    dim3 blk(block[0],block[1]);
    kernel_linear_interpolation_2d<<<grd,blk>>>(xo, yo, imgr, imgo, w, h, n0, n1);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel linear interpolation 2d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel linear interpolation 2d" );
};

template <typename type>
void cuda_kernel_linear_interpolation_3d( std::vector<int> & grid, std::vector<int> & block,
                                          const type * xo, const type * yo, const type * zo,
                                          const type * imgr, type * imgo,
                                          int w, int h, int l, //img ref width, height and length
                                          int n0, int n1, int n2)
{
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_linear_interpolation_3d<<<grd,blk>>>(xo, yo, zo, imgr, imgo, w, h, l, n0, n1, n2);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel linear interpolation 3d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel linear interpolation 3d" );
};

template <typename type>
void cuda_kernel_cubic_interpolation_2d( std::vector<int> & grid, std::vector<int> & block,
                                          const type * xo, const type * yo,
                                          const type * imgr, type * imgo,
                                          int w, int h,   //img ref width and height
                                          int n0, int n1) //img out dims
{
    dim3 grd(grid[0],grid[1]);
    dim3 blk(block[0],block[1]);
    kernel_cubic_interpolation_2d<<<grd,blk>>>(xo, yo, imgr, imgo, w, h, n0, n1);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel cubic interpolation 2d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel cubic interpolation 2d" );
};

template <typename type>
void cuda_kernel_cubic_interpolation_3d( std::vector<int> & grid, std::vector<int> & block,
                                          const type * xo, const type * yo, const type * zo,
                                          const type * imgr, type * imgo,
                                          int w, int h, int l, //img ref width, height and length
                                          int n0, int n1, int n2)
{
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_cubic_interpolation_3d<<<grd,blk>>>(xo, yo, zo, imgr, imgo, w, h, l, n0, n1, n2);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel cubic interpolation 3d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel cubic interpolation 3d" );
};

template <typename type>
void cuda_kernel_gradientx( std::vector<int> & grid, std::vector<int> & block,
                            const type * imgr, type * imgo, 
                            int n0, int n1, int n2)
{
    dim3 grd;
    dim3 blk;
    if (block[2] == 0)
    {
        grd = dim3(grid[0],grid[1]);
        blk = dim3(block[0],block[1]);
    }
    else
    {
        grd = dim3(grid[0],grid[1],grid[2]);
        blk = dim3(block[0],block[1],block[2]);
    };

    kernel_gradientx<<<grd,blk>>>(imgr, imgo, n0, n1, n2);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel gradient x" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel gradient x" );
};

template <typename type>
void cuda_kernel_gradienty( std::vector<int> & grid, std::vector<int> & block,
                            const type * imgr, type * imgo, 
                            int n0, int n1, int n2)
{
    dim3 grd;
    dim3 blk;
    if (block[2] == 0)
    {
        grd = dim3(grid[0],grid[1]);
        blk = dim3(block[0],block[1]);
    }
    else
    {
        grd = dim3(grid[0],grid[1],grid[2]);
        blk = dim3(block[0],block[1],block[2]);
    };
    kernel_gradienty<<<grd,blk>>>(imgr, imgo, n0, n1, n2);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel gradient y" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel gradient y" );
};

template <typename type>
void cuda_kernel_gradientz( std::vector<int> & grid, std::vector<int> & block,
                            const type * imgr, type * imgo, 
                            int n0, int n1, int n2)
{
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_gradientz<<<grd,blk>>>(imgr, imgo, n0, n1, n2);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel gradient z" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel gradient z" );
};

template <typename type>
void cuda_kernel_convolution_2d( std::vector<int> & grid, std::vector<int> & block,
                                 const type * imgr, const type * kern, //kernel width
                                 type * imgo, int n0, int n1, int kw0, int kw1)
{
    dim3 grd(grid[0],grid[1]);
    dim3 blk(block[0],block[1]);
    kernel_convolution_2d<<<grd,blk>>>(imgr, kern, imgo, n0, n1, kw0, kw1);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel convolution 2d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel convolution 2d" );
};

template <typename type>
void cuda_kernel_convolution_3d( std::vector<int> & grid, std::vector<int> & block,
                                 const type * imgr, const type * kern, //kernel width
                                 type * imgo, int n0, int n1, int n2, int kw0, int kw1, int kw2)
{
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_convolution_3d<<<grd,blk>>>(imgr, kern, imgo, n0, n1, n2, kw0, kw1, kw2);
    imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel convolution 3d" );
    imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel convolution 3d" );
};

template <typename type>
void cuda_kernel_fft_2d( std::vector<int> & grid, std::vector<int> & block, 
                        const type * in_real, const type * in_img,
                        type * out_real, type * out_img, int n0, int n1, bool forward )
{
    ;
};

// specialization
template <> void cuda_kernel_fft_2d<float>( std::vector<int> & grid, std::vector<int> & block, 
                        const float * in_real, const float * in_img,
                        float * out_real, float * out_img, int n0, int n1, bool forward )
{

    int N = n0*n1;

    cufftComplex *in;
    cufftComplex *out;
    
    cudaMalloc(&in, N*sizeof(cufftComplex));
    cudaMalloc(&out, N*sizeof(cufftComplex));

    float * tmpi = (float *) in;

    // COPY in_real and in_img to in
    imart_assert_kernel ( cudaMemcpy2D(tmpi, 2 * sizeof(tmpi[0]), 
                in_real, 1 * sizeof(in_real[0]), sizeof(in_real[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, real to complex");
    imart_assert_kernel ( cudaMemcpy2D(tmpi + 1, 2 * sizeof(tmpi[0]), 
                in_img, 1 * sizeof(in_img[0]), sizeof(in_img[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, imaginary to complex");
    
    cufftHandle p_fft;

    // std::cout << "input\n";
    cufftPlan2d(&p_fft, n1, n0, CUFFT_C2C);
    // std::cout << "plan\n";
    
    if (forward)
    {
        // Forward
        // std::cout << "execute\n";
        cufftExecC2C(p_fft, (cufftComplex *)in, (cufftComplex *)out, CUFFT_FORWARD);
    }
    else
    {
        // Inverse
        // std::cout << "execute\n";
        cufftExecC2C(p_fft, (cufftComplex *)in, (cufftComplex *)out, CUFFT_INVERSE);
    };

    float * tmpo = (float *) out;

    // COPY out to out_real and out_img
    imart_assert_kernel ( cudaMemcpy2D(out_real, 1 * sizeof(out_real[0]), 
                tmpo, 2 * sizeof(tmpo[0]), sizeof(out_real[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    imart_assert_kernel ( cudaMemcpy2D(out_img, 1 * sizeof(out_img[0]), 
                tmpo+1, 2 * sizeof(tmpo[0]), sizeof(out_img[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    cufftDestroy(p_fft);

    cudaFree(in);
    cudaFree(out);
};

// specialization
template <> void cuda_kernel_fft_2d<double>( std::vector<int> & grid, std::vector<int> & block, 
                        const double * in_real, const double * in_img,
                        double * out_real, double * out_img, int n0, int n1, bool forward )
{

    int N = n0*n1;

    cufftDoubleComplex *in;
    cufftDoubleComplex *out;
    
    cudaMalloc(&in, N*sizeof(cufftDoubleComplex));
    cudaMalloc(&out, N*sizeof(cufftDoubleComplex));

    double * tmpi = (double *) in;

    // COPY in_real and in_img to in
    imart_assert_kernel ( cudaMemcpy2D(tmpi, 2 * sizeof(tmpi[0]), 
                in_real, 1 * sizeof(in_real[0]), sizeof(in_real[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, real to complex");
    imart_assert_kernel ( cudaMemcpy2D(tmpi + 1, 2 * sizeof(tmpi[0]), 
                in_img, 1 * sizeof(in_img[0]), sizeof(in_img[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, imaginary to complex");
    
    cufftHandle p_fft;

    // std::cout << "input\n";
    cufftPlan2d(&p_fft, n1, n0, CUFFT_C2C);
    // std::cout << "plan\n";
    
    if (forward)
    {
        // Forward
        // std::cout << "execute\n";
        cufftExecZ2Z(p_fft, (cufftDoubleComplex *)in, (cufftDoubleComplex *)out, CUFFT_FORWARD);
    }
    else
    {
        // Inverse
        // std::cout << "execute\n";
        cufftExecZ2Z(p_fft, (cufftDoubleComplex *)in, (cufftDoubleComplex *)out, CUFFT_INVERSE);
    };

    double * tmpo = (double *) out;

    // COPY out to out_real and out_img
    imart_assert_kernel ( cudaMemcpy2D(out_real, 1 * sizeof(out_real[0]), 
                tmpo, 2 * sizeof(tmpo[0]), sizeof(out_real[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    imart_assert_kernel ( cudaMemcpy2D(out_img, 1 * sizeof(out_img[0]), 
                tmpo+1, 2 * sizeof(tmpo[0]), sizeof(out_img[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    cufftDestroy(p_fft);

    cudaFree(in);
    cudaFree(out);
};

template <typename type>
void cuda_kernel_fft_3d( std::vector<int> & grid, std::vector<int> & block, 
                        const type * in_real, const type * in_img,
                        type * out_real, type * out_img, int n0, int n1, int n2, bool forward )
{
    ;
};

// specialization
template <> void cuda_kernel_fft_3d<float>( std::vector<int> & grid, std::vector<int> & block, 
                        const float * in_real, const float * in_img,
                        float * out_real, float * out_img, int n0, int n1, int n2, bool forward )
{

    int N = n0*n1*n2;

    cufftComplex *in;
    cufftComplex *out;
    
    cudaMalloc(&in, N*sizeof(cufftComplex));
    cudaMalloc(&out, N*sizeof(cufftComplex));

    float * tmpi = (float *) in;

    // COPY in_real and in_img to in
    imart_assert_kernel ( cudaMemcpy2D(tmpi, 2 * sizeof(tmpi[0]), 
                in_real, 1 * sizeof(in_real[0]), sizeof(in_real[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, real to complex");
    imart_assert_kernel ( cudaMemcpy2D(tmpi + 1, 2 * sizeof(tmpi[0]), 
                in_img, 1 * sizeof(in_img[0]), sizeof(in_img[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, imaginary to complex");
    
    cufftHandle p_fft;

    // std::cout << "input\n";
    cufftPlan3d(&p_fft, n2, n1, n0, CUFFT_C2C);
    // std::cout << "plan\n";
    
    if (forward)
    {
        // Forward
        // std::cout << "execute\n";
        cufftExecC2C(p_fft, (cufftComplex *)in, (cufftComplex *)out, CUFFT_FORWARD);
    }
    else
    {
        // Inverse
        // std::cout << "execute\n";
        cufftExecC2C(p_fft, (cufftComplex *)in, (cufftComplex *)out, CUFFT_INVERSE);
    };

    float * tmpo = (float *) out;

    // COPY out to out_real and out_img
    imart_assert_kernel ( cudaMemcpy2D(out_real, 1 * sizeof(out_real[0]), 
                tmpo, 2 * sizeof(tmpo[0]), sizeof(out_real[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    imart_assert_kernel ( cudaMemcpy2D(out_img, 1 * sizeof(out_img[0]), 
                tmpo+1, 2 * sizeof(tmpo[0]), sizeof(out_img[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    cufftDestroy(p_fft);

    cudaFree(in);
    cudaFree(out);
};

// specialization
template <> void cuda_kernel_fft_3d<double>( std::vector<int> & grid, std::vector<int> & block, 
                        const double * in_real, const double * in_img,
                        double * out_real, double * out_img, int n0, int n1, int n2, bool forward )
{

    int N = n0*n1*n2;

    cufftDoubleComplex *in;
    cufftDoubleComplex *out;
    
    cudaMalloc(&in, N*sizeof(cufftDoubleComplex));
    cudaMalloc(&out, N*sizeof(cufftDoubleComplex));

    double * tmpi = (double *) in;

    // COPY in_real and in_img to in
    imart_assert_kernel ( cudaMemcpy2D(tmpi, 2 * sizeof(tmpi[0]), 
                in_real, 1 * sizeof(in_real[0]), sizeof(in_real[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, real to complex");
    imart_assert_kernel ( cudaMemcpy2D(tmpi + 1, 2 * sizeof(tmpi[0]), 
                in_img, 1 * sizeof(in_img[0]), sizeof(in_img[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, imaginary to complex");
    
    cufftHandle p_fft;

    // std::cout << "input\n";
    cufftPlan3d(&p_fft, n2, n1, n0, CUFFT_C2C);
    // std::cout << "plan\n";
    
    if (forward)
    {
        // Forward
        // std::cout << "execute\n";
        cufftExecZ2Z(p_fft, (cufftDoubleComplex *)in, (cufftDoubleComplex *)out, CUFFT_FORWARD);
    }
    else
    {
        // Inverse
        // std::cout << "execute\n";
        cufftExecZ2Z(p_fft, (cufftDoubleComplex *)in, (cufftDoubleComplex *)out, CUFFT_INVERSE);
    };

    double * tmpo = (double *) out;

    // COPY out to out_real and out_img
    imart_assert_kernel ( cudaMemcpy2D(out_real, 1 * sizeof(out_real[0]), 
                tmpo, 2 * sizeof(tmpo[0]), sizeof(out_real[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    imart_assert_kernel ( cudaMemcpy2D(out_img, 1 * sizeof(out_img[0]), 
                tmpo+1, 2 * sizeof(tmpo[0]), sizeof(out_img[0]), 
                N, cudaMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    cufftDestroy(p_fft);

    cudaFree(in);
    cudaFree(out);
};


// template <typename type>
// void cuda_kernel_( std::vector<int> & grid, std::vector<int> & block, 
//                      )
// {
//     dim3 grd(grid[0],grid[1],grid[2]);
//     dim3 blk(block[0],block[1],block[2]);
//     kernel_<<<grd,blk>>>();
//     imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel" );
//     imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel" );
// };



// ===========================================
// Explicit instanciation
// ===========================================

// CASTINGS
template void cuda_kernel_cast <float,double>( std::vector<int> & grid, std::vector<int> & block, 
                       const float * vin, double * vout, int n );

template void cuda_kernel_cast <double,float>( std::vector<int> & grid, std::vector<int> & block, 
                       const double * vin, float * vout, int n );


template void cuda_kernel_cast <int,float>( std::vector<int> & grid, std::vector<int> & block, 
                       const int * vin, float * vout, int n );

template void cuda_kernel_cast <float,int>( std::vector<int> & grid, std::vector<int> & block, 
                       const float * vin, int * vout, int n );

template void cuda_kernel_cast <int,double>( std::vector<int> & grid, std::vector<int> & block, 
                       const int * vin, double * vout, int n );

template void cuda_kernel_cast <double,int>( std::vector<int> & grid, std::vector<int> & block, 
                       const double * vin, int * vout, int n );


template void cuda_kernel_cast <float,unsigned short>( std::vector<int> & grid, std::vector<int> & block, 
                       const float * vin, unsigned short * vout, int n );

template void cuda_kernel_cast <unsigned short,float>( std::vector<int> & grid, std::vector<int> & block, 
                       const unsigned short * vin, float * vout, int n );

template void cuda_kernel_cast <double,unsigned short>( std::vector<int> & grid, std::vector<int> & block, 
                       const double * vin, unsigned short * vout, int n );

template void cuda_kernel_cast <unsigned short,double>( std::vector<int> & grid, std::vector<int> & block, 
                       const unsigned short * vin, double * vout, int n );


template void cuda_kernel_cast <float,unsigned int>( std::vector<int> & grid, std::vector<int> & block, 
                       const float * vin, unsigned int * vout, int n );

template void cuda_kernel_cast <unsigned int,float>( std::vector<int> & grid, std::vector<int> & block, 
                       const unsigned int * vin, float * vout, int n );

template void cuda_kernel_cast <double,unsigned int>( std::vector<int> & grid, std::vector<int> & block, 
                       const double * vin, unsigned int * vout, int n );

template void cuda_kernel_cast <unsigned int,double>( std::vector<int> & grid, std::vector<int> & block, 
                       const unsigned int * vin, double * vout, int n );


template void cuda_kernel_cast <float,unsigned char>( std::vector<int> & grid, std::vector<int> & block, 
                       const float * vin, unsigned char * vout, int n );

template void cuda_kernel_cast <unsigned char,float>( std::vector<int> & grid, std::vector<int> & block, 
                       const unsigned char * vin, float * vout, int n );

template void cuda_kernel_cast <double,unsigned char>( std::vector<int> & grid, std::vector<int> & block, 
                       const double * vin, unsigned char * vout, int n );

template void cuda_kernel_cast <unsigned char,double>( std::vector<int> & grid, std::vector<int> & block, 
                       const unsigned char * vin, double * vout, int n );


template void cuda_kernel_cast <float,float>( std::vector<int> & grid, std::vector<int> & block, 
                       const float * vin, float * vout, int n );

template void cuda_kernel_cast <double,double>( std::vector<int> & grid, std::vector<int> & block, 
                       const double * vin, double * vout, int n );


template void cuda_kernel_assign<float>( std::vector<int> & grid, std::vector<int> & block,
                                         float * vin, float value, int n );

template void cuda_kernel_copy<float>( std::vector<int> & grid, std::vector<int> & block,
                                       const float * vin, float * vout, int n );

template void cuda_kernel_add<float>( std::vector<int> & grid, std::vector<int> & block,
                                      const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_sub<float>( std::vector<int> & grid, std::vector<int> & block,
                                      const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_mul<float>( std::vector<int> & grid, std::vector<int> & block,
                                      const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_div<float>( std::vector<int> & grid, std::vector<int> & block,
                                      const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_pow<float>( std::vector<int> & grid, std::vector<int> & block,
                                      const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_add_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_sub_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_sub_scalar_inv<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_mul_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_div_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_div_scalar_inv<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_pow_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_pow_scalar_inv<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_equal<float>( std::vector<int> & grid, std::vector<int> & block,
                                        const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_greater<float>( std::vector<int> & grid, std::vector<int> & block,
                                        const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_less<float>( std::vector<int> & grid, std::vector<int> & block,
                                        const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_greater_equal<float>( std::vector<int> & grid, std::vector<int> & block,
                                        const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_less_equal<float>( std::vector<int> & grid, std::vector<int> & block,
                                        const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_equal_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                                        const float * vin, float * vout, float scalar, int n);

template void cuda_kernel_greater_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                        const float * vin, float * vout, float scalar, int n);

template void cuda_kernel_less_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                        const float * vin, float * vout, float scalar, int n);

template void cuda_kernel_greater_equal_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                        const float * vin, float * vout, float scalar, int n);

template void cuda_kernel_less_equal_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                        const float * vin, float * vout, float scalar, int n);

template void cuda_kernel_replace<float>( std::vector<int> & grid, std::vector<int> & block, 
                          const float * idxs, const float * vin, float * vout, int n);

template void cuda_kernel_replace_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                          const float * idxs, float * vout, float value, int n);


template void cuda_kernel_sum<float>( std::vector<int> & grid, std::vector<int> & block, const float * vin, float * vout, int n );

template void cuda_kernel_min<float>( std::vector<int> & grid, std::vector<int> & block, const float * vin, float * vout, int n );

template void cuda_kernel_max<float>( std::vector<int> & grid, std::vector<int> & block, const float * vin, float * vout, int n );


template void cuda_kernel_pad_2d<float>( std::vector<int> & grid, std::vector<int> & block, 
                            const float * vin, float * vout, int start0, int start1, 
                            int end0, int end1, int n0, int n1 );

template void cuda_kernel_unpad_2d<float>( std::vector<int> & grid, std::vector<int> & block, 
                            const float * vin, float * vout, int start0, int start1,
                            int end0, int end1, int n0, int n1);

template void cuda_kernel_pad_3d<float>( std::vector<int> & grid, std::vector<int> & block, 
                         const float * vin, float * vout, int start0, int start1, int start2,
                         int end0, int end1, int end2, int n0, int n1, int n2);

template void cuda_kernel_unpad_3d<float>( std::vector<int> & grid, std::vector<int> & block, 
                            const float * vin, float * vout, int start0, int start1, int start2,
                            int end0, int end1, int end2, int n0, int n1, int n2);

template void cuda_kernel_grid_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                          float * x, float * y, double * sod, 
                          int n0, int n1);

template void cuda_kernel_grid_3d<float>( std::vector<int> & grid, std::vector<int> & block,
                          float * x, float * y, float * z, double * sod, 
                          int n0, int n1, int n2);

template void cuda_kernel_affine_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                            const float * xin, const float * yin, 
                            float * xout, float * yout, 
                            const float * param, int n);

template void cuda_kernel_affine_3d<float>( std::vector<int> & grid, std::vector<int> & block,
                            const float * xin, const float * yin, const float * zin,
                            float * xout, float * yout, float * zout,
                            const float * param, int n) ;

template void cuda_kernel_affine_sod_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                                const float * xin, const float * yin,
                                float * xout, float * yout,
                                const double * sod, int n);

template void cuda_kernel_affine_sod_3d<float>( std::vector<int> & grid, std::vector<int> & block,
                                const float * xin, const float * yin, const float * zin,
                                float * xout, float * yout, float * zout,
                                const double * sod, int n);

template void cuda_kernel_dfield_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                            const float * xin, const float * yin,   // grid coordinates
                            const float * x, const float * y,       // vector field
                            float * xout, float * yout, int n);

template void cuda_kernel_dfield_3d<float>( std::vector<int> & grid, std::vector<int> & block,
                            const float * xin, const float * yin, const float * zin, // grid coordinates
                            const float * x, const float * y, const float * z,       // vector field
                            float * xout, float * yout, float * zout, int n);

template void cuda_kernel_nearest_interpolation_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                                           const float * xo, const float * yo,
                                           const float * imgr, float * imgo,
                                           int w, int h,   //img ref width and height
                                           int n0, int n1); //img out dims

template void cuda_kernel_nearest_interpolation_3d<float>( std::vector<int> & grid, std::vector<int> & block, 
                                           const float * xo, const float * yo, const float * zo, 
                                           const float * imgr, float * imgo,
                                           int w, int h, int l,    //img ref width, height and length
                                           int n0, int n1, int n2 );

template void cuda_kernel_linear_interpolation_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                                          const float * xo, const float * yo,
                                          const float * imgr, float * imgo,
                                          int w, int h,   //img ref width and height
                                          int n0, int n1); //img out dims

template void cuda_kernel_linear_interpolation_3d<float>( std::vector<int> & grid, std::vector<int> & block,
                                          const float * xo, const float * yo, const float * zo,
                                          const float * imgr, float * imgo,
                                          int w, int h, int l, //img ref width, height and length
                                          int n0, int n1, int n2);

template void cuda_kernel_cubic_interpolation_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                                          const float * xo, const float * yo,
                                          const float * imgr, float * imgo,
                                          int w, int h,   //img ref width and height
                                          int n0, int n1); //img out dims

// template void cuda_kernel_cubic_interpolation_3d<float>( std::vector<int> & grid, std::vector<int> & block,
//                                           const float * xo, const float * yo, const float * zo,
//                                           const float * imgr, float * imgo,
//                                           int w, int h, int l, //img ref width, height and length
//                                           int n0, int n1, int n2);

template void cuda_kernel_gradientx<float>( std::vector<int> & grid, std::vector<int> & block,
                            const float * imgr, float * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_gradienty<float>( std::vector<int> & grid, std::vector<int> & block,
                            const float * imgr, float * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_gradientz<float>( std::vector<int> & grid, std::vector<int> & block,
                            const float * imgr, float * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_convolution_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                                 const float * imgr, const float * kern, //kernel width
                                 float * imgo, int n0, int n1, int kw0, int kw1);

template void cuda_kernel_convolution_3d<float>( std::vector<int> & grid, std::vector<int> & block,
                                 const float * imgr, const float * kern, //kernel width
                                 float * imgo, int n0, int n1, int n2, int kw0, int kw1, int kw2);






template void cuda_kernel_assign<double>( std::vector<int> & grid, std::vector<int> & block,
                                         double * vin, double value, int n );

template void cuda_kernel_copy<double>( std::vector<int> & grid, std::vector<int> & block,
                                       const double * vin, double * vout, int n );

template void cuda_kernel_add<double>( std::vector<int> & grid, std::vector<int> & block,
                                      const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_sub<double>( std::vector<int> & grid, std::vector<int> & block,
                                      const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_mul<double>( std::vector<int> & grid, std::vector<int> & block,
                                      const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_div<double>( std::vector<int> & grid, std::vector<int> & block,
                                      const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_pow<double>( std::vector<int> & grid, std::vector<int> & block,
                                      const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_add_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_sub_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_sub_scalar_inv<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_mul_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_div_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_div_scalar_inv<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_pow_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_pow_scalar_inv<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_equal<double>( std::vector<int> & grid, std::vector<int> & block,
                                        const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_greater<double>( std::vector<int> & grid, std::vector<int> & block,
                                        const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_less<double>( std::vector<int> & grid, std::vector<int> & block,
                                        const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_greater_equal<double>( std::vector<int> & grid, std::vector<int> & block,
                                        const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_less_equal<double>( std::vector<int> & grid, std::vector<int> & block,
                                        const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_equal_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                                        const double * vin, double * vout, double scalar, int n);

template void cuda_kernel_greater_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                        const double * vin, double * vout, double scalar, int n);

template void cuda_kernel_less_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                        const double * vin, double * vout, double scalar, int n);

template void cuda_kernel_greater_equal_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                        const double * vin, double * vout, double scalar, int n);

template void cuda_kernel_less_equal_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                        const double * vin, double * vout, double scalar, int n);

template void cuda_kernel_replace<double>( std::vector<int> & grid, std::vector<int> & block, 
                          const double * idxs, const double * vin, double * vout, int n);

template void cuda_kernel_replace_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                          const double * idxs, double * vout, double value, int n);

template void cuda_kernel_sum<double>( std::vector<int> & grid, std::vector<int> & block, const double * vin, double * vout, int n );

template void cuda_kernel_min<double>( std::vector<int> & grid, std::vector<int> & block, const double * vin, double * vout, int n );

template void cuda_kernel_max<double>( std::vector<int> & grid, std::vector<int> & block, const double * vin, double * vout, int n );

template void cuda_kernel_pad_2d<double>( std::vector<int> & grid, std::vector<int> & block, 
                            const double * vin, double * vout, int start0, int start1, 
                            int end0, int end1, int n0, int n1 );

template void cuda_kernel_unpad_2d<double>( std::vector<int> & grid, std::vector<int> & block, 
                            const double * vin, double * vout, int start0, int start1,
                            int end0, int end1, int n0, int n1);

template void cuda_kernel_pad_3d<double>( std::vector<int> & grid, std::vector<int> & block, 
                         const double * vin, double * vout, int start0, int start1, int start2,
                         int end0, int end1, int end2, int n0, int n1, int n2);

template void cuda_kernel_unpad_3d<double>( std::vector<int> & grid, std::vector<int> & block, 
                            const double * vin, double * vout, int start0, int start1, int start2,
                            int end0, int end1, int end2, int n0, int n1, int n2);

template void cuda_kernel_grid_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                          double * x, double * y, double * sod, 
                          int n0, int n1);

template void cuda_kernel_grid_3d<double>( std::vector<int> & grid, std::vector<int> & block,
                          double * x, double * y, double * z, double * sod, 
                          int n0, int n1, int n2);

template void cuda_kernel_affine_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                            const double * xin, const double * yin, 
                            double * xout, double * yout, 
                            const double * param, int n);

template void cuda_kernel_affine_3d<double>( std::vector<int> & grid, std::vector<int> & block,
                            const double * xin, const double * yin, const double * zin,
                            double * xout, double * yout, double * zout,
                            const double * param, int n) ;

template void cuda_kernel_affine_sod_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                                const double * xin, const double * yin,
                                double * xout, double * yout,
                                const double * sod, int n);

template void cuda_kernel_affine_sod_3d<double>( std::vector<int> & grid, std::vector<int> & block,
                                const double * xin, const double * yin, const double * zin,
                                double * xout, double * yout, double * zout,
                                const double * sod, int n);

template void cuda_kernel_dfield_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                            const double * xin, const double * yin,   // grid coordinates
                            const double * x, const double * y,       // vector field
                            double * xout, double * yout, int n);

template void cuda_kernel_dfield_3d<double>( std::vector<int> & grid, std::vector<int> & block,
                            const double * xin, const double * yin, const double * zin, // grid coordinates
                            const double * x, const double * y, const double * z,       // vector field
                            double * xout, double * yout, double * zout, int n);

template void cuda_kernel_nearest_interpolation_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                                           const double * xo, const double * yo,
                                           const double * imgr, double * imgo,
                                           int w, int h,   //img ref width and height
                                           int n0, int n1); //img out dims

template void cuda_kernel_nearest_interpolation_3d<double>( std::vector<int> & grid, std::vector<int> & block, 
                                           const double * xo, const double * yo, const double * zo, 
                                           const double * imgr, double * imgo,
                                           int w, int h, int l,    //img ref width, height and length
                                           int n0, int n1, int n2);

template void cuda_kernel_linear_interpolation_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                                          const double * xo, const double * yo,
                                          const double * imgr, double * imgo,
                                          int w, int h,   //img ref width and height
                                          int n0, int n1); //img out dims

template void cuda_kernel_linear_interpolation_3d<double>( std::vector<int> & grid, std::vector<int> & block,
                                          const double * xo, const double * yo, const double * zo,
                                          const double * imgr, double * imgo,
                                          int w, int h, int l, //img ref width, height and length
                                          int n0, int n1, int n2);

template void cuda_kernel_cubic_interpolation_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                                          const double * xo, const double * yo,
                                          const double * imgr, double * imgo,
                                          int w, int h,   //img ref width and height
                                          int n0, int n1); //img out dims

template void cuda_kernel_cubic_interpolation_3d<double>( std::vector<int> & grid, std::vector<int> & block,
                                          const double * xo, const double * yo, const double * zo,
                                          const double * imgr, double * imgo,
                                          int w, int h, int l, //img ref width, height and length
                                          int n0, int n1, int n2);

template void cuda_kernel_gradientx<double>( std::vector<int> & grid, std::vector<int> & block,
                            const double * imgr, double * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_gradienty<double>( std::vector<int> & grid, std::vector<int> & block,
                            const double * imgr, double * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_gradientz<double>( std::vector<int> & grid, std::vector<int> & block,
                            const double * imgr, double * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_convolution_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                                 const double * imgr, const double * kern, //kernel width
                                 double * imgo, int n0, int n1, int kw0, int kw1);

template void cuda_kernel_convolution_3d<double>( std::vector<int> & grid, std::vector<int> & block,
                                 const double * imgr, const double * kern, //kernel width
                                 double * imgo, int n0, int n1, int n2, int kw0, int kw1, int kw2);





template void cuda_kernel_assign<int>( std::vector<int> & grid, std::vector<int> & block,
                                         int * vin, int value, int n );

template void cuda_kernel_copy<int>( std::vector<int> & grid, std::vector<int> & block,
                                       const int * vin, int * vout, int n );

template void cuda_kernel_add<int>( std::vector<int> & grid, std::vector<int> & block,
                                      const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_sub<int>( std::vector<int> & grid, std::vector<int> & block,
                                      const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_mul<int>( std::vector<int> & grid, std::vector<int> & block,
                                      const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_div<int>( std::vector<int> & grid, std::vector<int> & block,
                                      const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_pow<int>( std::vector<int> & grid, std::vector<int> & block,
                                      const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_add_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_sub_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_sub_scalar_inv<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_mul_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_div_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_div_scalar_inv<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_pow_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_pow_scalar_inv<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_equal<int>( std::vector<int> & grid, std::vector<int> & block,
                                        const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_greater<int>( std::vector<int> & grid, std::vector<int> & block,
                                        const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_less<int>( std::vector<int> & grid, std::vector<int> & block,
                                        const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_greater_equal<int>( std::vector<int> & grid, std::vector<int> & block,
                                        const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_less_equal<int>( std::vector<int> & grid, std::vector<int> & block,
                                        const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_equal_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                                        const int * vin, int * vout, int scalar, int n);

template void cuda_kernel_greater_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                        const int * vin, int * vout, int scalar, int n);

template void cuda_kernel_less_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                        const int * vin, int * vout, int scalar, int n);

template void cuda_kernel_greater_equal_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                        const int * vin, int * vout, int scalar, int n);

template void cuda_kernel_less_equal_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                        const int * vin, int * vout, int scalar, int n);

template void cuda_kernel_replace<int>( std::vector<int> & grid, std::vector<int> & block, 
                          const int * idxs, const int * vin, int * vout, int n);

template void cuda_kernel_replace_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                          const int * idxs, int * vout, int value, int n);

template void cuda_kernel_sum<int>( std::vector<int> & grid, std::vector<int> & block, const int * vin, int * vout, int n );

template void cuda_kernel_min<int>( std::vector<int> & grid, std::vector<int> & block, const int * vin, int * vout, int n );

template void cuda_kernel_max<int>( std::vector<int> & grid, std::vector<int> & block, const int * vin, int * vout, int n );


template void cuda_kernel_pad_2d<int>( std::vector<int> & grid, std::vector<int> & block, 
                            const int * vin, int * vout, int start0, int start1, 
                            int end0, int end1, int n0, int n1 );

template void cuda_kernel_unpad_2d<int>( std::vector<int> & grid, std::vector<int> & block, 
                            const int * vin, int * vout, int start0, int start1,
                            int end0, int end1, int n0, int n1 );

template void cuda_kernel_pad_3d<int>( std::vector<int> & grid, std::vector<int> & block, 
                         const int * vin, int * vout, int start0, int start1, int start2,
                         int end0, int end1, int end2, int n0, int n1, int n2 );

template void cuda_kernel_unpad_3d<int>( std::vector<int> & grid, std::vector<int> & block, 
                            const int * vin, int * vout, int start0, int start1, int start2,
                            int end0, int end1, int end2, int n0, int n1, int n2 );

template void cuda_kernel_grid_2d<int>( std::vector<int> & grid, std::vector<int> & block,
                          int * x, int * y, double * sod, 
                          int n0, int n1 );

template void cuda_kernel_grid_3d<int>( std::vector<int> & grid, std::vector<int> & block,
                          int * x, int * y, int * z, double * sod, 
                          int n0, int n1, int n2 );

template void cuda_kernel_affine_2d<int>( std::vector<int> & grid, std::vector<int> & block,
                            const int * xin, const int * yin, 
                            int * xout, int * yout, 
                            const int * param, int n );

template void cuda_kernel_affine_3d<int>( std::vector<int> & grid, std::vector<int> & block,
                            const int * xin, const int * yin, const int * zin,
                            int * xout, int * yout, int * zout,
                            const int * param, int n );

template void cuda_kernel_affine_sod_2d<int>( std::vector<int> & grid, std::vector<int> & block,
                                const int * xin, const int * yin,
                                int * xout, int * yout,
                                const double * sod, int n);

template void cuda_kernel_affine_sod_3d<int>( std::vector<int> & grid, std::vector<int> & block,
                                const int * xin, const int * yin, const int * zin,
                                int * xout, int * yout, int * zout,
                                const double * sod, int n );

template void cuda_kernel_dfield_2d<int>( std::vector<int> & grid, std::vector<int> & block,
                            const int * xin, const int * yin,   // grid coordinates
                            const int * x, const int * y,       // vector field
                            int * xout, int * yout, int n );

template void cuda_kernel_dfield_3d<int>( std::vector<int> & grid, std::vector<int> & block,
                            const int * xin, const int * yin, const int * zin, // grid coordinates
                            const int * x, const int * y, const int * z,       // vector field
                            int * xout, int * yout, int * zout, int n );

// template void cuda_kernel_nearest_interpolation_2d<int>( std::vector<int> & grid, std::vector<int> & block,
//                                            const int * xo, const int * yo,
//                                            const int * imgr, int * imgo,
//                                            int w, int h,   //img ref width and height
//                                            int n0, int n1); //img out dims

// template void cuda_kernel_nearest_interpolation_3d<int>( std::vector<int> & grid, std::vector<int> & block, 
//                                            const int * xo, const int * yo, const int * zo, 
//                                            const int * imgr, int * imgo,
//                                            int w, int h, int l,    //img ref width, height and length
//                                            int n0, int n1, int n2);

// template void cuda_kernel_linear_interpolation_2d<int>( std::vector<int> & grid, std::vector<int> & block,
//                                           const int * xo, const int * yo,
//                                           const int * imgr, int * imgo,
//                                           int w, int h,   //img ref width and height
//                                           int n0, int n1); //img out dims

// template void cuda_kernel_linear_interpolation_3d<int>( std::vector<int> & grid, std::vector<int> & block,
//                                           const int * xo, const int * yo, const int * zo,
//                                           const int * imgr, int * imgo,
//                                           int w, int h, int l, //img ref width, height and length
//                                           int n0, int n1, int n2);

template void cuda_kernel_gradientx<int>( std::vector<int> & grid, std::vector<int> & block,
                            const int * imgr, int * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_gradienty<int>( std::vector<int> & grid, std::vector<int> & block,
                            const int * imgr, int * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_gradientz<int>( std::vector<int> & grid, std::vector<int> & block,
                            const int * imgr, int * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_convolution_2d<int>( std::vector<int> & grid, std::vector<int> & block,
                                 const int * imgr, const int * kern, //kernel width
                                 int * imgo, int n0, int n1, int kw0, int kw1);

template void cuda_kernel_convolution_3d<int>( std::vector<int> & grid, std::vector<int> & block,
                                 const int * imgr, const int * kern, //kernel width
                                 int * imgo, int n0, int n1, int n2, int kw0, int kw1, int kw2);





template void cuda_kernel_assign<unsigned short>( std::vector<int> & grid, std::vector<int> & block,
                                         unsigned short * vin, unsigned short value, int n );

template void cuda_kernel_copy<unsigned short>( std::vector<int> & grid, std::vector<int> & block,
                                       const unsigned short * vin, unsigned short * vout, int n );


template void cuda_kernel_assign<unsigned int>( std::vector<int> & grid, std::vector<int> & block,
                                         unsigned int * vin, unsigned int value, int n );

template void cuda_kernel_copy<unsigned int>( std::vector<int> & grid, std::vector<int> & block,
                                       const unsigned int * vin, unsigned int * vout, int n );


template void cuda_kernel_assign<unsigned char>( std::vector<int> & grid, std::vector<int> & block,
                                         unsigned char * vin, unsigned char value, int n );

template void cuda_kernel_copy<unsigned char>( std::vector<int> & grid, std::vector<int> & block,
                                       const unsigned char * vin, unsigned char * vout, int n );


template void cuda_kernel_assign<short>( std::vector<int> & grid, std::vector<int> & block,
                                         short * vin, short value, int n );

template void cuda_kernel_copy<short>( std::vector<int> & grid, std::vector<int> & block,
                                       const short * vin, short * vout, int n );


template void cuda_kernel_assign<char>( std::vector<int> & grid, std::vector<int> & block,
                                         char * vin, char value, int n );

template void cuda_kernel_copy<char>( std::vector<int> & grid, std::vector<int> & block,
                                       const char * vin, char * vout, int n );

	.file	"tmpxft_002f6c50_00000000-6_kernels.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4193:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4193:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function
_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0:
.LFB5567:
	.cfi_startproc
	jmp	cudaLaunchKernel@PLT
	.cfi_endproc
.LFE5567:
	.size	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	.type	_ZL42__device_stub__Z11kernel_copyIcEvPKT_PS0_iPKcPci, @function
_ZL42__device_stub__Z11kernel_copyIcEvPKT_PS0_iPKcPci:
.LFB4577:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_copyIcEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L3:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4577:
	.size	_ZL42__device_stub__Z11kernel_copyIcEvPKT_PS0_iPKcPci, .-_ZL42__device_stub__Z11kernel_copyIcEvPKT_PS0_iPKcPci
	.type	_ZL42__device_stub__Z13kernel_assignIcEvPT_S0_iPcci, @function
_ZL42__device_stub__Z13kernel_assignIcEvPT_S0_iPcci:
.LFB4575:
	.cfi_startproc
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	40(%rsp), %rdi
	movl	%edx, (%rsp)
	leaq	24(%rsp), %rdx
	movb	%sil, 4(%rsp)
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 64(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	%rsp, %rax
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	32(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z13kernel_assignIcEvPT_S0_i(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 128
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L8:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4575:
	.size	_ZL42__device_stub__Z13kernel_assignIcEvPT_S0_iPcci, .-_ZL42__device_stub__Z13kernel_assignIcEvPT_S0_iPcci
	.type	_ZL42__device_stub__Z11kernel_copyIsEvPKT_PS0_iPKsPsi, @function
_ZL42__device_stub__Z11kernel_copyIsEvPKT_PS0_iPKsPsi:
.LFB4573:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_copyIsEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L12:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4573:
	.size	_ZL42__device_stub__Z11kernel_copyIsEvPKT_PS0_iPKsPsi, .-_ZL42__device_stub__Z11kernel_copyIsEvPKT_PS0_iPKsPsi
	.type	_ZL42__device_stub__Z13kernel_assignIsEvPT_S0_iPssi, @function
_ZL42__device_stub__Z13kernel_assignIsEvPT_S0_iPssi:
.LFB4571:
	.cfi_startproc
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	40(%rsp), %rdi
	movl	%edx, (%rsp)
	leaq	24(%rsp), %rdx
	movw	%si, 4(%rsp)
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 64(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	%rsp, %rax
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	32(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z13kernel_assignIsEvPT_S0_i(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 128
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L16:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4571:
	.size	_ZL42__device_stub__Z13kernel_assignIsEvPT_S0_iPssi, .-_ZL42__device_stub__Z13kernel_assignIsEvPT_S0_iPssi
	.type	_ZL42__device_stub__Z11kernel_copyIhEvPKT_PS0_iPKhPhi, @function
_ZL42__device_stub__Z11kernel_copyIhEvPKT_PS0_iPKhPhi:
.LFB4569:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_copyIhEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L20:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4569:
	.size	_ZL42__device_stub__Z11kernel_copyIhEvPKT_PS0_iPKhPhi, .-_ZL42__device_stub__Z11kernel_copyIhEvPKT_PS0_iPKhPhi
	.type	_ZL42__device_stub__Z13kernel_assignIhEvPT_S0_iPhhi, @function
_ZL42__device_stub__Z13kernel_assignIhEvPT_S0_iPhhi:
.LFB4567:
	.cfi_startproc
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	40(%rsp), %rdi
	movl	%edx, (%rsp)
	leaq	24(%rsp), %rdx
	movb	%sil, 4(%rsp)
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 64(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	%rsp, %rax
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	32(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z13kernel_assignIhEvPT_S0_i(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 128
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L24:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4567:
	.size	_ZL42__device_stub__Z13kernel_assignIhEvPT_S0_iPhhi, .-_ZL42__device_stub__Z13kernel_assignIhEvPT_S0_iPhhi
	.type	_ZL42__device_stub__Z11kernel_copyIjEvPKT_PS0_iPKjPji, @function
_ZL42__device_stub__Z11kernel_copyIjEvPKT_PS0_iPKjPji:
.LFB4565:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_copyIjEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L28:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4565:
	.size	_ZL42__device_stub__Z11kernel_copyIjEvPKT_PS0_iPKjPji, .-_ZL42__device_stub__Z11kernel_copyIjEvPKT_PS0_iPKjPji
	.type	_ZL42__device_stub__Z13kernel_assignIjEvPT_S0_iPjji, @function
_ZL42__device_stub__Z13kernel_assignIjEvPT_S0_iPjji:
.LFB4563:
	.cfi_startproc
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	40(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	52(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	24(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 64(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	%rsp, %rax
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	pushq	32(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z13kernel_assignIjEvPT_S0_i(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 128
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L32:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4563:
	.size	_ZL42__device_stub__Z13kernel_assignIjEvPT_S0_iPjji, .-_ZL42__device_stub__Z13kernel_assignIjEvPT_S0_iPjji
	.type	_ZL42__device_stub__Z11kernel_copyItEvPKT_PS0_iPKtPti, @function
_ZL42__device_stub__Z11kernel_copyItEvPKT_PS0_iPKtPti:
.LFB4561:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_copyItEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L36:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4561:
	.size	_ZL42__device_stub__Z11kernel_copyItEvPKT_PS0_iPKtPti, .-_ZL42__device_stub__Z11kernel_copyItEvPKT_PS0_iPKtPti
	.type	_ZL42__device_stub__Z13kernel_assignItEvPT_S0_iPtti, @function
_ZL42__device_stub__Z13kernel_assignItEvPT_S0_iPtti:
.LFB4559:
	.cfi_startproc
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	40(%rsp), %rdi
	movl	%edx, (%rsp)
	leaq	24(%rsp), %rdx
	movw	%si, 4(%rsp)
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 64(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	%rsp, %rax
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	pushq	32(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z13kernel_assignItEvPT_S0_i(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 128
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L40:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4559:
	.size	_ZL42__device_stub__Z13kernel_assignItEvPT_S0_iPtti, .-_ZL42__device_stub__Z13kernel_assignItEvPT_S0_iPtti
	.type	_ZL60__device_stub__Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiiiPKiS0_Piiiiiii, @function
_ZL60__device_stub__Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiiiPKiS0_Piiiiiii:
.LFB4557:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L44:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4557:
	.size	_ZL60__device_stub__Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiiiPKiS0_Piiiiiii, .-_ZL60__device_stub__Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiiiPKiS0_Piiiiiii
	.type	_ZL58__device_stub__Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiiiPKiS0_Piiiii, @function
_ZL58__device_stub__Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiiiPKiS0_Piiiii:
.LFB4555:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L48:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4555:
	.size	_ZL58__device_stub__Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiiiPKiS0_Piiiii, .-_ZL58__device_stub__Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiiiPKiS0_Piiiii
	.type	_ZL49__device_stub__Z16kernel_gradientzIiEvPKT_PS0_iiiPKiPiiii, @function
_ZL49__device_stub__Z16kernel_gradientzIiEvPKT_PS0_iiiPKiPiiii:
.LFB4553:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L52
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16kernel_gradientzIiEvPKT_PS0_iii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L52:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L54
	call	__stack_chk_fail@PLT
.L54:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4553:
	.size	_ZL49__device_stub__Z16kernel_gradientzIiEvPKT_PS0_iiiPKiPiiii, .-_ZL49__device_stub__Z16kernel_gradientzIiEvPKT_PS0_iiiPKiPiiii
	.type	_ZL49__device_stub__Z16kernel_gradientyIiEvPKT_PS0_iiiPKiPiiii, @function
_ZL49__device_stub__Z16kernel_gradientyIiEvPKT_PS0_iiiPKiPiiii:
.LFB4551:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16kernel_gradientyIiEvPKT_PS0_iii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L56:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L58
	call	__stack_chk_fail@PLT
.L58:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4551:
	.size	_ZL49__device_stub__Z16kernel_gradientyIiEvPKT_PS0_iiiPKiPiiii, .-_ZL49__device_stub__Z16kernel_gradientyIiEvPKT_PS0_iiiPKiPiiii
	.type	_ZL49__device_stub__Z16kernel_gradientxIiEvPKT_PS0_iiiPKiPiiii, @function
_ZL49__device_stub__Z16kernel_gradientxIiEvPKT_PS0_iiiPKiPiiii:
.LFB4549:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L60
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16kernel_gradientxIiEvPKT_PS0_iii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L60:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L62
	call	__stack_chk_fail@PLT
.L62:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4549:
	.size	_ZL49__device_stub__Z16kernel_gradientxIiEvPKT_PS0_iiiPKiPiiii, .-_ZL49__device_stub__Z16kernel_gradientxIiEvPKT_PS0_iiiPKiPiiii
	.type	_ZL68__device_stub__Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKiS0_S0_S0_S0_S0_PiS1_S1_i, @function
_ZL68__device_stub__Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKiS0_S0_S0_S0_S0_PiS1_S1_i:
.LFB4547:
	.cfi_startproc
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	108(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	232(%rsp), %rax
	movq	%rdx, 56(%rsp)
	leaq	80(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	240(%rsp), %rax
	movq	%rcx, 48(%rsp)
	leaq	88(%rsp), %rcx
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movl	$1, 104(%rsp)
	movq	%rax, 120(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	pushq	88(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 240
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	136(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L64:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L66
	call	__stack_chk_fail@PLT
.L66:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4547:
	.size	_ZL68__device_stub__Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKiS0_S0_S0_S0_S0_PiS1_S1_i, .-_ZL68__device_stub__Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKiS0_S0_S0_S0_S0_PiS1_S1_i
	.type	_ZL59__device_stub__Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_iPKiS0_S0_S0_PiS1_i, @function
_ZL59__device_stub__Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_iPKiS0_S0_S0_PiS1_i:
.LFB4545:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsp, %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L68
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L68:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L70
	call	__stack_chk_fail@PLT
.L70:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4545:
	.size	_ZL59__device_stub__Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_iPKiS0_S0_S0_PiS1_i, .-_ZL59__device_stub__Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_iPKiS0_S0_S0_PiS1_i
	.type	_ZL66__device_stub__Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdiPKiS0_S0_PiS1_S1_PKdi, @function
_ZL66__device_stub__Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdiPKiS0_S0_PiS1_S1_PKdi:
.LFB4543:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 104(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L72
	pushq	72(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 208
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L72:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L74
	call	__stack_chk_fail@PLT
.L74:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4543:
	.size	_ZL66__device_stub__Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdiPKiS0_S0_PiS1_S1_PKdi, .-_ZL66__device_stub__Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdiPKiS0_S0_PiS1_S1_PKdi
	.type	_ZL60__device_stub__Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdiPKiS0_PiS1_PKdi, @function
_ZL60__device_stub__Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdiPKiS0_PiS1_PKdi:
.LFB4541:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L76
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L76:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L78
	call	__stack_chk_fail@PLT
.L78:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4541:
	.size	_ZL60__device_stub__Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdiPKiS0_PiS1_PKdi, .-_ZL60__device_stub__Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdiPKiS0_PiS1_PKdi
	.type	_ZL62__device_stub__Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_iPKiS0_S0_PiS1_S1_S0_i, @function
_ZL62__device_stub__Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_iPKiS0_S0_PiS1_S1_S0_i:
.LFB4539:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 104(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L80
	pushq	72(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 208
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L80:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L82
	call	__stack_chk_fail@PLT
.L82:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4539:
	.size	_ZL62__device_stub__Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_iPKiS0_S0_PiS1_S1_S0_i, .-_ZL62__device_stub__Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_iPKiS0_S0_PiS1_S1_S0_i
	.type	_ZL56__device_stub__Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_iPKiS0_PiS1_S0_i, @function
_ZL56__device_stub__Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_iPKiS0_PiS1_S0_i:
.LFB4537:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L84
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L84:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L86
	call	__stack_chk_fail@PLT
.L86:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4537:
	.size	_ZL56__device_stub__Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_iPKiS0_PiS1_S0_i, .-_ZL56__device_stub__Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_iPKiS0_PiS1_S0_i
	.type	_ZL50__device_stub__Z14kernel_grid_3dIiEvPT_S1_S1_PdiiiPiS_S_Pdiii, @function
_ZL50__device_stub__Z14kernel_grid_3dIiEvPT_S1_S1_PdiiiPiS_S_Pdiii:
.LFB4535:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L88
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L88:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L90
	call	__stack_chk_fail@PLT
.L90:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4535:
	.size	_ZL50__device_stub__Z14kernel_grid_3dIiEvPT_S1_S1_PdiiiPiS_S_Pdiii, .-_ZL50__device_stub__Z14kernel_grid_3dIiEvPT_S1_S1_PdiiiPiS_S_Pdiii
	.type	_ZL46__device_stub__Z14kernel_grid_2dIiEvPT_S1_PdiiPiS_Pdii, @function
_ZL46__device_stub__Z14kernel_grid_2dIiEvPT_S1_PdiiPiS_Pdii:
.LFB4533:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L92
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14kernel_grid_2dIiEvPT_S1_Pdii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L92:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L94
	call	__stack_chk_fail@PLT
.L94:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4533:
	.size	_ZL46__device_stub__Z14kernel_grid_2dIiEvPT_S1_PdiiPiS_Pdii, .-_ZL46__device_stub__Z14kernel_grid_2dIiEvPT_S1_PdiiPiS_Pdii
	.type	_ZL54__device_stub__Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiiiPKiPiiiiiiiiii, @function
_ZL54__device_stub__Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiiiPKiPiiiiiiiiii:
.LFB4531:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L96
	pushq	48(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 208
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L96:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L98
	call	__stack_chk_fail@PLT
.L98:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4531:
	.size	_ZL54__device_stub__Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiiiPKiPiiiiiiiiii, .-_ZL54__device_stub__Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiiiPKiPiiiiiiiiii
	.type	_ZL52__device_stub__Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiiiPKiPiiiiiiiiii, @function
_ZL52__device_stub__Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiiiPKiPiiiiiiiiii:
.LFB4529:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L100
	pushq	48(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 208
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L100:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L102
	call	__stack_chk_fail@PLT
.L102:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4529:
	.size	_ZL52__device_stub__Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiiiPKiPiiiiiiiiii, .-_ZL52__device_stub__Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiiiPKiPiiiiiiiiii
	.type	_ZL51__device_stub__Z15kernel_unpad_2dIiEvPKT_PS0_iiiiiiPKiPiiiiiii, @function
_ZL51__device_stub__Z15kernel_unpad_2dIiEvPKT_PS0_iiiiiiPKiPiiiiiii:
.LFB4527:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L104
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L104:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L106
	call	__stack_chk_fail@PLT
.L106:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4527:
	.size	_ZL51__device_stub__Z15kernel_unpad_2dIiEvPKT_PS0_iiiiiiPKiPiiiiiii, .-_ZL51__device_stub__Z15kernel_unpad_2dIiEvPKT_PS0_iiiiiiPKiPiiiiiii
	.type	_ZL49__device_stub__Z13kernel_pad_2dIiEvPKT_PS0_iiiiiiPKiPiiiiiii, @function
_ZL49__device_stub__Z13kernel_pad_2dIiEvPKT_PS0_iiiiiiPKiPiiiiiii:
.LFB4525:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L108
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L108:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L110
	call	__stack_chk_fail@PLT
.L110:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4525:
	.size	_ZL49__device_stub__Z13kernel_pad_2dIiEvPKT_PS0_iiiiiiPKiPiiiiiii, .-_ZL49__device_stub__Z13kernel_pad_2dIiEvPKT_PS0_iiiiiiPKiPiiiiiii
	.type	_ZL41__device_stub__Z10kernel_maxIiEvPKT_PS0_iPKiPii, @function
_ZL41__device_stub__Z10kernel_maxIiEvPKT_PS0_iPKiPii:
.LFB4523:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L112
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_maxIiEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L112:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L114
	call	__stack_chk_fail@PLT
.L114:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4523:
	.size	_ZL41__device_stub__Z10kernel_maxIiEvPKT_PS0_iPKiPii, .-_ZL41__device_stub__Z10kernel_maxIiEvPKT_PS0_iPKiPii
	.type	_ZL41__device_stub__Z10kernel_minIiEvPKT_PS0_iPKiPii, @function
_ZL41__device_stub__Z10kernel_minIiEvPKT_PS0_iPKiPii:
.LFB4521:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L116
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_minIiEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L116:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L118
	call	__stack_chk_fail@PLT
.L118:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4521:
	.size	_ZL41__device_stub__Z10kernel_minIiEvPKT_PS0_iPKiPii, .-_ZL41__device_stub__Z10kernel_minIiEvPKT_PS0_iPKiPii
	.type	_ZL41__device_stub__Z10kernel_sumIiEvPKT_PS0_iPKiPii, @function
_ZL41__device_stub__Z10kernel_sumIiEvPKT_PS0_iPKiPii:
.LFB4519:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L120
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_sumIiEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L120:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L122
	call	__stack_chk_fail@PLT
.L122:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4519:
	.size	_ZL41__device_stub__Z10kernel_sumIiEvPKT_PS0_iPKiPii, .-_ZL41__device_stub__Z10kernel_sumIiEvPKT_PS0_iPKiPii
	.type	_ZL55__device_stub__Z21kernel_replace_scalarIiEvPKT_PS0_S0_iPKiPiii, @function
_ZL55__device_stub__Z21kernel_replace_scalarIiEvPKT_PS0_S0_iPKiPiii:
.LFB4517:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L124
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L124:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L126
	call	__stack_chk_fail@PLT
.L126:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4517:
	.size	_ZL55__device_stub__Z21kernel_replace_scalarIiEvPKT_PS0_S0_iPKiPiii, .-_ZL55__device_stub__Z21kernel_replace_scalarIiEvPKT_PS0_S0_iPKiPiii
	.type	_ZL48__device_stub__Z14kernel_replaceIiEvPKT_S2_PS0_iPKiS0_Pii, @function
_ZL48__device_stub__Z14kernel_replaceIiEvPKT_S2_PS0_iPKiS0_Pii:
.LFB4515:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L128
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14kernel_replaceIiEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L128:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L130
	call	__stack_chk_fail@PLT
.L130:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4515:
	.size	_ZL48__device_stub__Z14kernel_replaceIiEvPKT_S2_PS0_iPKiS0_Pii, .-_ZL48__device_stub__Z14kernel_replaceIiEvPKT_S2_PS0_iPKiS0_Pii
	.type	_ZL58__device_stub__Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_iPKiPiii, @function
_ZL58__device_stub__Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_iPKiPiii:
.LFB4513:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L132
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L132:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L134
	call	__stack_chk_fail@PLT
.L134:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4513:
	.size	_ZL58__device_stub__Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_iPKiPiii, .-_ZL58__device_stub__Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_iPKiPiii
	.type	_ZL61__device_stub__Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_iPKiPiii, @function
_ZL61__device_stub__Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_iPKiPiii:
.LFB4511:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L136
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L136:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L138
	call	__stack_chk_fail@PLT
.L138:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4511:
	.size	_ZL61__device_stub__Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_iPKiPiii, .-_ZL61__device_stub__Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_iPKiPiii
	.type	_ZL52__device_stub__Z18kernel_less_scalarIiEvPKT_PS0_S0_iPKiPiii, @function
_ZL52__device_stub__Z18kernel_less_scalarIiEvPKT_PS0_S0_iPKiPiii:
.LFB4509:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L140
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18kernel_less_scalarIiEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L140:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L142
	call	__stack_chk_fail@PLT
.L142:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4509:
	.size	_ZL52__device_stub__Z18kernel_less_scalarIiEvPKT_PS0_S0_iPKiPiii, .-_ZL52__device_stub__Z18kernel_less_scalarIiEvPKT_PS0_S0_iPKiPiii
	.type	_ZL55__device_stub__Z21kernel_greater_scalarIiEvPKT_PS0_S0_iPKiPiii, @function
_ZL55__device_stub__Z21kernel_greater_scalarIiEvPKT_PS0_S0_iPKiPiii:
.LFB4507:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L144
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L144:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L146
	call	__stack_chk_fail@PLT
.L146:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4507:
	.size	_ZL55__device_stub__Z21kernel_greater_scalarIiEvPKT_PS0_S0_iPKiPiii, .-_ZL55__device_stub__Z21kernel_greater_scalarIiEvPKT_PS0_S0_iPKiPiii
	.type	_ZL53__device_stub__Z19kernel_equal_scalarIiEvPKT_PS0_S0_iPKiPiii, @function
_ZL53__device_stub__Z19kernel_equal_scalarIiEvPKT_PS0_S0_iPKiPiii:
.LFB4505:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L148
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L148:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L150
	call	__stack_chk_fail@PLT
.L150:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4505:
	.size	_ZL53__device_stub__Z19kernel_equal_scalarIiEvPKT_PS0_S0_iPKiPiii, .-_ZL53__device_stub__Z19kernel_equal_scalarIiEvPKT_PS0_S0_iPKiPiii
	.type	_ZL51__device_stub__Z17kernel_less_equalIiEvPKT_S2_PS0_iPKiS0_Pii, @function
_ZL51__device_stub__Z17kernel_less_equalIiEvPKT_S2_PS0_iPKiS0_Pii:
.LFB4503:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L152
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_less_equalIiEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L152:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L154
	call	__stack_chk_fail@PLT
.L154:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4503:
	.size	_ZL51__device_stub__Z17kernel_less_equalIiEvPKT_S2_PS0_iPKiS0_Pii, .-_ZL51__device_stub__Z17kernel_less_equalIiEvPKT_S2_PS0_iPKiS0_Pii
	.type	_ZL54__device_stub__Z20kernel_greater_equalIiEvPKT_S2_PS0_iPKiS0_Pii, @function
_ZL54__device_stub__Z20kernel_greater_equalIiEvPKT_S2_PS0_iPKiS0_Pii:
.LFB4501:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L156
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20kernel_greater_equalIiEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L156:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L158
	call	__stack_chk_fail@PLT
.L158:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4501:
	.size	_ZL54__device_stub__Z20kernel_greater_equalIiEvPKT_S2_PS0_iPKiS0_Pii, .-_ZL54__device_stub__Z20kernel_greater_equalIiEvPKT_S2_PS0_iPKiS0_Pii
	.type	_ZL45__device_stub__Z11kernel_lessIiEvPKT_S2_PS0_iPKiS0_Pii, @function
_ZL45__device_stub__Z11kernel_lessIiEvPKT_S2_PS0_iPKiS0_Pii:
.LFB4499:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L160
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_lessIiEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L160:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L162
	call	__stack_chk_fail@PLT
.L162:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4499:
	.size	_ZL45__device_stub__Z11kernel_lessIiEvPKT_S2_PS0_iPKiS0_Pii, .-_ZL45__device_stub__Z11kernel_lessIiEvPKT_S2_PS0_iPKiS0_Pii
	.type	_ZL48__device_stub__Z14kernel_greaterIiEvPKT_S2_PS0_iPKiS0_Pii, @function
_ZL48__device_stub__Z14kernel_greaterIiEvPKT_S2_PS0_iPKiS0_Pii:
.LFB4497:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L164
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14kernel_greaterIiEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L164:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L166
	call	__stack_chk_fail@PLT
.L166:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4497:
	.size	_ZL48__device_stub__Z14kernel_greaterIiEvPKT_S2_PS0_iPKiS0_Pii, .-_ZL48__device_stub__Z14kernel_greaterIiEvPKT_S2_PS0_iPKiS0_Pii
	.type	_ZL46__device_stub__Z12kernel_equalIiEvPKT_S2_PS0_iPKiS0_Pii, @function
_ZL46__device_stub__Z12kernel_equalIiEvPKT_S2_PS0_iPKiS0_Pii:
.LFB4495:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L168
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12kernel_equalIiEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L168:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L170
	call	__stack_chk_fail@PLT
.L170:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4495:
	.size	_ZL46__device_stub__Z12kernel_equalIiEvPKT_S2_PS0_iPKiS0_Pii, .-_ZL46__device_stub__Z12kernel_equalIiEvPKT_S2_PS0_iPKiS0_Pii
	.type	_ZL55__device_stub__Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_iPKiPiii, @function
_ZL55__device_stub__Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_iPKiPiii:
.LFB4493:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L172
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L172:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L174
	call	__stack_chk_fail@PLT
.L174:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4493:
	.size	_ZL55__device_stub__Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_iPKiPiii, .-_ZL55__device_stub__Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_iPKiPiii
	.type	_ZL51__device_stub__Z17kernel_pow_scalarIiEvPKT_PS0_S0_iPKiPiii, @function
_ZL51__device_stub__Z17kernel_pow_scalarIiEvPKT_PS0_S0_iPKiPiii:
.LFB4491:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L176
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L176:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L178
	call	__stack_chk_fail@PLT
.L178:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4491:
	.size	_ZL51__device_stub__Z17kernel_pow_scalarIiEvPKT_PS0_S0_iPKiPiii, .-_ZL51__device_stub__Z17kernel_pow_scalarIiEvPKT_PS0_S0_iPKiPiii
	.type	_ZL55__device_stub__Z21kernel_div_scalar_invIiEvPKT_PS0_S0_iPKiPiii, @function
_ZL55__device_stub__Z21kernel_div_scalar_invIiEvPKT_PS0_S0_iPKiPiii:
.LFB4489:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L180
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L180:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L182
	call	__stack_chk_fail@PLT
.L182:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4489:
	.size	_ZL55__device_stub__Z21kernel_div_scalar_invIiEvPKT_PS0_S0_iPKiPiii, .-_ZL55__device_stub__Z21kernel_div_scalar_invIiEvPKT_PS0_S0_iPKiPiii
	.type	_ZL51__device_stub__Z17kernel_div_scalarIiEvPKT_PS0_S0_iPKiPiii, @function
_ZL51__device_stub__Z17kernel_div_scalarIiEvPKT_PS0_S0_iPKiPiii:
.LFB4487:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L184
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_div_scalarIiEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L184:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L186
	call	__stack_chk_fail@PLT
.L186:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4487:
	.size	_ZL51__device_stub__Z17kernel_div_scalarIiEvPKT_PS0_S0_iPKiPiii, .-_ZL51__device_stub__Z17kernel_div_scalarIiEvPKT_PS0_S0_iPKiPiii
	.type	_ZL51__device_stub__Z17kernel_mul_scalarIiEvPKT_PS0_S0_iPKiPiii, @function
_ZL51__device_stub__Z17kernel_mul_scalarIiEvPKT_PS0_S0_iPKiPiii:
.LFB4485:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L188
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L188:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L190
	call	__stack_chk_fail@PLT
.L190:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4485:
	.size	_ZL51__device_stub__Z17kernel_mul_scalarIiEvPKT_PS0_S0_iPKiPiii, .-_ZL51__device_stub__Z17kernel_mul_scalarIiEvPKT_PS0_S0_iPKiPiii
	.type	_ZL55__device_stub__Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_iPKiPiii, @function
_ZL55__device_stub__Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_iPKiPiii:
.LFB4483:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L192
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L192:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L194
	call	__stack_chk_fail@PLT
.L194:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4483:
	.size	_ZL55__device_stub__Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_iPKiPiii, .-_ZL55__device_stub__Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_iPKiPiii
	.type	_ZL51__device_stub__Z17kernel_sub_scalarIiEvPKT_PS0_S0_iPKiPiii, @function
_ZL51__device_stub__Z17kernel_sub_scalarIiEvPKT_PS0_S0_iPKiPiii:
.LFB4481:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L196
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L196:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L198
	call	__stack_chk_fail@PLT
.L198:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4481:
	.size	_ZL51__device_stub__Z17kernel_sub_scalarIiEvPKT_PS0_S0_iPKiPiii, .-_ZL51__device_stub__Z17kernel_sub_scalarIiEvPKT_PS0_S0_iPKiPiii
	.type	_ZL51__device_stub__Z17kernel_add_scalarIiEvPKT_PS0_S0_iPKiPiii, @function
_ZL51__device_stub__Z17kernel_add_scalarIiEvPKT_PS0_S0_iPKiPiii:
.LFB4479:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L200
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_add_scalarIiEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L200:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L202
	call	__stack_chk_fail@PLT
.L202:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4479:
	.size	_ZL51__device_stub__Z17kernel_add_scalarIiEvPKT_PS0_S0_iPKiPiii, .-_ZL51__device_stub__Z17kernel_add_scalarIiEvPKT_PS0_S0_iPKiPiii
	.type	_ZL44__device_stub__Z10kernel_powIiEvPKT_S2_PS0_iPKiS0_Pii, @function
_ZL44__device_stub__Z10kernel_powIiEvPKT_S2_PS0_iPKiS0_Pii:
.LFB4477:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L204
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_powIiEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L204:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L206
	call	__stack_chk_fail@PLT
.L206:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4477:
	.size	_ZL44__device_stub__Z10kernel_powIiEvPKT_S2_PS0_iPKiS0_Pii, .-_ZL44__device_stub__Z10kernel_powIiEvPKT_S2_PS0_iPKiS0_Pii
	.type	_ZL44__device_stub__Z10kernel_divIiEvPKT_S2_PS0_iPKiS0_Pii, @function
_ZL44__device_stub__Z10kernel_divIiEvPKT_S2_PS0_iPKiS0_Pii:
.LFB4475:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L208
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_divIiEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L208:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L210
	call	__stack_chk_fail@PLT
.L210:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4475:
	.size	_ZL44__device_stub__Z10kernel_divIiEvPKT_S2_PS0_iPKiS0_Pii, .-_ZL44__device_stub__Z10kernel_divIiEvPKT_S2_PS0_iPKiS0_Pii
	.type	_ZL44__device_stub__Z10kernel_mulIiEvPKT_S2_PS0_iPKiS0_Pii, @function
_ZL44__device_stub__Z10kernel_mulIiEvPKT_S2_PS0_iPKiS0_Pii:
.LFB4473:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L212
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_mulIiEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L212:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L214
	call	__stack_chk_fail@PLT
.L214:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4473:
	.size	_ZL44__device_stub__Z10kernel_mulIiEvPKT_S2_PS0_iPKiS0_Pii, .-_ZL44__device_stub__Z10kernel_mulIiEvPKT_S2_PS0_iPKiS0_Pii
	.type	_ZL44__device_stub__Z10kernel_subIiEvPKT_S2_PS0_iPKiS0_Pii, @function
_ZL44__device_stub__Z10kernel_subIiEvPKT_S2_PS0_iPKiS0_Pii:
.LFB4471:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L216
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_subIiEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L216:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L218
	call	__stack_chk_fail@PLT
.L218:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4471:
	.size	_ZL44__device_stub__Z10kernel_subIiEvPKT_S2_PS0_iPKiS0_Pii, .-_ZL44__device_stub__Z10kernel_subIiEvPKT_S2_PS0_iPKiS0_Pii
	.type	_ZL44__device_stub__Z10kernel_addIiEvPKT_S2_PS0_iPKiS0_Pii, @function
_ZL44__device_stub__Z10kernel_addIiEvPKT_S2_PS0_iPKiS0_Pii:
.LFB4469:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L220
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_addIiEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L220:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L222
	call	__stack_chk_fail@PLT
.L222:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4469:
	.size	_ZL44__device_stub__Z10kernel_addIiEvPKT_S2_PS0_iPKiS0_Pii, .-_ZL44__device_stub__Z10kernel_addIiEvPKT_S2_PS0_iPKiS0_Pii
	.type	_ZL42__device_stub__Z11kernel_copyIiEvPKT_PS0_iPKiPii, @function
_ZL42__device_stub__Z11kernel_copyIiEvPKT_PS0_iPKiPii:
.LFB4467:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L224
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_copyIiEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L224:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L226
	call	__stack_chk_fail@PLT
.L226:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4467:
	.size	_ZL42__device_stub__Z11kernel_copyIiEvPKT_PS0_iPKiPii, .-_ZL42__device_stub__Z11kernel_copyIiEvPKT_PS0_iPKiPii
	.type	_ZL42__device_stub__Z13kernel_assignIiEvPT_S0_iPiii, @function
_ZL42__device_stub__Z13kernel_assignIiEvPT_S0_iPiii:
.LFB4465:
	.cfi_startproc
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	40(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	52(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	24(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 64(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	%rsp, %rax
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L228
	pushq	32(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z13kernel_assignIiEvPT_S0_i(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 128
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L228:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L230
	call	__stack_chk_fail@PLT
.L230:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4465:
	.size	_ZL42__device_stub__Z13kernel_assignIiEvPT_S0_iPiii, .-_ZL42__device_stub__Z13kernel_assignIiEvPT_S0_iPiii
	.type	_ZL60__device_stub__Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiiiPKdS0_Pdiiiiii, @function
_ZL60__device_stub__Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiiiPKdS0_Pdiiiiii:
.LFB4463:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L232
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L232:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L234
	call	__stack_chk_fail@PLT
.L234:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4463:
	.size	_ZL60__device_stub__Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiiiPKdS0_Pdiiiiii, .-_ZL60__device_stub__Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiiiPKdS0_Pdiiiiii
	.type	_ZL58__device_stub__Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiiiPKdS0_Pdiiii, @function
_ZL58__device_stub__Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiiiPKdS0_Pdiiii:
.LFB4461:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L236
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L236:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L238
	call	__stack_chk_fail@PLT
.L238:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4461:
	.size	_ZL58__device_stub__Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiiiPKdS0_Pdiiii, .-_ZL58__device_stub__Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiiiPKdS0_Pdiiii
	.type	_ZL49__device_stub__Z16kernel_gradientzIdEvPKT_PS0_iiiPKdPdiii, @function
_ZL49__device_stub__Z16kernel_gradientzIdEvPKT_PS0_iiiPKdPdiii:
.LFB4459:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L240
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16kernel_gradientzIdEvPKT_PS0_iii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L240:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L242
	call	__stack_chk_fail@PLT
.L242:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4459:
	.size	_ZL49__device_stub__Z16kernel_gradientzIdEvPKT_PS0_iiiPKdPdiii, .-_ZL49__device_stub__Z16kernel_gradientzIdEvPKT_PS0_iiiPKdPdiii
	.type	_ZL49__device_stub__Z16kernel_gradientyIdEvPKT_PS0_iiiPKdPdiii, @function
_ZL49__device_stub__Z16kernel_gradientyIdEvPKT_PS0_iiiPKdPdiii:
.LFB4457:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L244
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16kernel_gradientyIdEvPKT_PS0_iii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L244:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L246
	call	__stack_chk_fail@PLT
.L246:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4457:
	.size	_ZL49__device_stub__Z16kernel_gradientyIdEvPKT_PS0_iiiPKdPdiii, .-_ZL49__device_stub__Z16kernel_gradientyIdEvPKT_PS0_iiiPKdPdiii
	.type	_ZL49__device_stub__Z16kernel_gradientxIdEvPKT_PS0_iiiPKdPdiii, @function
_ZL49__device_stub__Z16kernel_gradientxIdEvPKT_PS0_iiiPKdPdiii:
.LFB4455:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L248
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16kernel_gradientxIdEvPKT_PS0_iii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L248:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L250
	call	__stack_chk_fail@PLT
.L250:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4455:
	.size	_ZL49__device_stub__Z16kernel_gradientxIdEvPKT_PS0_iiiPKdPdiii, .-_ZL49__device_stub__Z16kernel_gradientxIdEvPKT_PS0_iiiPKdPdiii
	.type	_ZL74__device_stub__Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii, @function
_ZL74__device_stub__Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii:
.LFB4453:
	.cfi_startproc
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L252
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L252:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L254
	call	__stack_chk_fail@PLT
.L254:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4453:
	.size	_ZL74__device_stub__Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii, .-_ZL74__device_stub__Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii
	.type	_ZL69__device_stub__Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii, @function
_ZL69__device_stub__Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii:
.LFB4451:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L256
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L256:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L258
	call	__stack_chk_fail@PLT
.L258:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4451:
	.size	_ZL69__device_stub__Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii, .-_ZL69__device_stub__Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii
	.type	_ZL75__device_stub__Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii, @function
_ZL75__device_stub__Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii:
.LFB4449:
	.cfi_startproc
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L260
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L260:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L262
	call	__stack_chk_fail@PLT
.L262:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4449:
	.size	_ZL75__device_stub__Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii, .-_ZL75__device_stub__Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii
	.type	_ZL70__device_stub__Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii, @function
_ZL70__device_stub__Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii:
.LFB4447:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L264
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L264:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L266
	call	__stack_chk_fail@PLT
.L266:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4447:
	.size	_ZL70__device_stub__Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii, .-_ZL70__device_stub__Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii
	.type	_ZL76__device_stub__Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii, @function
_ZL76__device_stub__Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii:
.LFB4445:
	.cfi_startproc
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L268
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L268:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L270
	call	__stack_chk_fail@PLT
.L270:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4445:
	.size	_ZL76__device_stub__Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii, .-_ZL76__device_stub__Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii
	.type	_ZL71__device_stub__Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii, @function
_ZL71__device_stub__Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii:
.LFB4443:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L272
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L272:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L274
	call	__stack_chk_fail@PLT
.L274:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4443:
	.size	_ZL71__device_stub__Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii, .-_ZL71__device_stub__Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii
	.type	_ZL68__device_stub__Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKdS0_S0_S0_S0_S0_PdS1_S1_i, @function
_ZL68__device_stub__Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKdS0_S0_S0_S0_S0_PdS1_S1_i:
.LFB4441:
	.cfi_startproc
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	108(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	232(%rsp), %rax
	movq	%rdx, 56(%rsp)
	leaq	80(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	240(%rsp), %rax
	movq	%rcx, 48(%rsp)
	leaq	88(%rsp), %rcx
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movl	$1, 104(%rsp)
	movq	%rax, 120(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L276
	pushq	88(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 240
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	136(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L276:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L278
	call	__stack_chk_fail@PLT
.L278:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4441:
	.size	_ZL68__device_stub__Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKdS0_S0_S0_S0_S0_PdS1_S1_i, .-_ZL68__device_stub__Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKdS0_S0_S0_S0_S0_PdS1_S1_i
	.type	_ZL59__device_stub__Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_iPKdS0_S0_S0_PdS1_i, @function
_ZL59__device_stub__Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_iPKdS0_S0_S0_PdS1_i:
.LFB4439:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsp, %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L280
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L280:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L282
	call	__stack_chk_fail@PLT
.L282:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4439:
	.size	_ZL59__device_stub__Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_iPKdS0_S0_S0_PdS1_i, .-_ZL59__device_stub__Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_iPKdS0_S0_S0_PdS1_i
	.type	_ZL66__device_stub__Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdiPKdS0_S0_PdS1_S1_S0_i, @function
_ZL66__device_stub__Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdiPKdS0_S0_PdS1_S1_S0_i:
.LFB4437:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 104(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L284
	pushq	72(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 208
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L284:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L286
	call	__stack_chk_fail@PLT
.L286:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4437:
	.size	_ZL66__device_stub__Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdiPKdS0_S0_PdS1_S1_S0_i, .-_ZL66__device_stub__Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdiPKdS0_S0_PdS1_S1_S0_i
	.type	_ZL60__device_stub__Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdiPKdS0_PdS1_S0_i, @function
_ZL60__device_stub__Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdiPKdS0_PdS1_S0_i:
.LFB4435:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L288
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L288:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L290
	call	__stack_chk_fail@PLT
.L290:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4435:
	.size	_ZL60__device_stub__Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdiPKdS0_PdS1_S0_i, .-_ZL60__device_stub__Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdiPKdS0_PdS1_S0_i
	.type	_ZL62__device_stub__Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_iPKdS0_S0_PdS1_S1_S0_i, @function
_ZL62__device_stub__Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_iPKdS0_S0_PdS1_S1_S0_i:
.LFB4433:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 104(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L292
	pushq	72(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 208
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L292:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L294
	call	__stack_chk_fail@PLT
.L294:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4433:
	.size	_ZL62__device_stub__Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_iPKdS0_S0_PdS1_S1_S0_i, .-_ZL62__device_stub__Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_iPKdS0_S0_PdS1_S1_S0_i
	.type	_ZL56__device_stub__Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_iPKdS0_PdS1_S0_i, @function
_ZL56__device_stub__Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_iPKdS0_PdS1_S0_i:
.LFB4431:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L296
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L296:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L298
	call	__stack_chk_fail@PLT
.L298:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4431:
	.size	_ZL56__device_stub__Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_iPKdS0_PdS1_S0_i, .-_ZL56__device_stub__Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_iPKdS0_PdS1_S0_i
	.type	_ZL50__device_stub__Z14kernel_grid_3dIdEvPT_S1_S1_PdiiiPdS_S_S_iii, @function
_ZL50__device_stub__Z14kernel_grid_3dIdEvPT_S1_S1_PdiiiPdS_S_S_iii:
.LFB4429:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L300
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L300:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L302
	call	__stack_chk_fail@PLT
.L302:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4429:
	.size	_ZL50__device_stub__Z14kernel_grid_3dIdEvPT_S1_S1_PdiiiPdS_S_S_iii, .-_ZL50__device_stub__Z14kernel_grid_3dIdEvPT_S1_S1_PdiiiPdS_S_S_iii
	.type	_ZL46__device_stub__Z14kernel_grid_2dIdEvPT_S1_PdiiPdS_S_ii, @function
_ZL46__device_stub__Z14kernel_grid_2dIdEvPT_S1_PdiiPdS_S_ii:
.LFB4427:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L304
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14kernel_grid_2dIdEvPT_S1_Pdii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L304:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L306
	call	__stack_chk_fail@PLT
.L306:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4427:
	.size	_ZL46__device_stub__Z14kernel_grid_2dIdEvPT_S1_PdiiPdS_S_ii, .-_ZL46__device_stub__Z14kernel_grid_2dIdEvPT_S1_PdiiPdS_S_ii
	.type	_ZL54__device_stub__Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiiiPKdPdiiiiiiiii, @function
_ZL54__device_stub__Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiiiPKdPdiiiiiiiii:
.LFB4425:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L308
	pushq	48(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 208
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L308:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L310
	call	__stack_chk_fail@PLT
.L310:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4425:
	.size	_ZL54__device_stub__Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiiiPKdPdiiiiiiiii, .-_ZL54__device_stub__Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiiiPKdPdiiiiiiiii
	.type	_ZL52__device_stub__Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiiiPKdPdiiiiiiiii, @function
_ZL52__device_stub__Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiiiPKdPdiiiiiiiii:
.LFB4423:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L312
	pushq	48(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 208
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L312:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L314
	call	__stack_chk_fail@PLT
.L314:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4423:
	.size	_ZL52__device_stub__Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiiiPKdPdiiiiiiiii, .-_ZL52__device_stub__Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiiiPKdPdiiiiiiiii
	.type	_ZL51__device_stub__Z15kernel_unpad_2dIdEvPKT_PS0_iiiiiiPKdPdiiiiii, @function
_ZL51__device_stub__Z15kernel_unpad_2dIdEvPKT_PS0_iiiiiiPKdPdiiiiii:
.LFB4421:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L316
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L316:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L318
	call	__stack_chk_fail@PLT
.L318:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4421:
	.size	_ZL51__device_stub__Z15kernel_unpad_2dIdEvPKT_PS0_iiiiiiPKdPdiiiiii, .-_ZL51__device_stub__Z15kernel_unpad_2dIdEvPKT_PS0_iiiiiiPKdPdiiiiii
	.type	_ZL49__device_stub__Z13kernel_pad_2dIdEvPKT_PS0_iiiiiiPKdPdiiiiii, @function
_ZL49__device_stub__Z13kernel_pad_2dIdEvPKT_PS0_iiiiiiPKdPdiiiiii:
.LFB4419:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L320
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L320:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L322
	call	__stack_chk_fail@PLT
.L322:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4419:
	.size	_ZL49__device_stub__Z13kernel_pad_2dIdEvPKT_PS0_iiiiiiPKdPdiiiiii, .-_ZL49__device_stub__Z13kernel_pad_2dIdEvPKT_PS0_iiiiiiPKdPdiiiiii
	.type	_ZL41__device_stub__Z10kernel_maxIdEvPKT_PS0_iPKdPdi, @function
_ZL41__device_stub__Z10kernel_maxIdEvPKT_PS0_iPKdPdi:
.LFB4417:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L324
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_maxIdEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L324:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L326
	call	__stack_chk_fail@PLT
.L326:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4417:
	.size	_ZL41__device_stub__Z10kernel_maxIdEvPKT_PS0_iPKdPdi, .-_ZL41__device_stub__Z10kernel_maxIdEvPKT_PS0_iPKdPdi
	.type	_ZL41__device_stub__Z10kernel_minIdEvPKT_PS0_iPKdPdi, @function
_ZL41__device_stub__Z10kernel_minIdEvPKT_PS0_iPKdPdi:
.LFB4415:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L328
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_minIdEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L328:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L330
	call	__stack_chk_fail@PLT
.L330:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4415:
	.size	_ZL41__device_stub__Z10kernel_minIdEvPKT_PS0_iPKdPdi, .-_ZL41__device_stub__Z10kernel_minIdEvPKT_PS0_iPKdPdi
	.type	_ZL41__device_stub__Z10kernel_sumIdEvPKT_PS0_iPKdPdi, @function
_ZL41__device_stub__Z10kernel_sumIdEvPKT_PS0_iPKdPdi:
.LFB4413:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L332
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_sumIdEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L332:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L334
	call	__stack_chk_fail@PLT
.L334:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4413:
	.size	_ZL41__device_stub__Z10kernel_sumIdEvPKT_PS0_iPKdPdi, .-_ZL41__device_stub__Z10kernel_sumIdEvPKT_PS0_iPKdPdi
	.type	_ZL55__device_stub__Z21kernel_replace_scalarIdEvPKT_PS0_S0_iPKdPddi, @function
_ZL55__device_stub__Z21kernel_replace_scalarIdEvPKT_PS0_S0_iPKdPddi:
.LFB4411:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L336
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L336:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L338
	call	__stack_chk_fail@PLT
.L338:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4411:
	.size	_ZL55__device_stub__Z21kernel_replace_scalarIdEvPKT_PS0_S0_iPKdPddi, .-_ZL55__device_stub__Z21kernel_replace_scalarIdEvPKT_PS0_S0_iPKdPddi
	.type	_ZL48__device_stub__Z14kernel_replaceIdEvPKT_S2_PS0_iPKdS0_Pdi, @function
_ZL48__device_stub__Z14kernel_replaceIdEvPKT_S2_PS0_iPKdS0_Pdi:
.LFB4409:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L340
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14kernel_replaceIdEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L340:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L342
	call	__stack_chk_fail@PLT
.L342:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4409:
	.size	_ZL48__device_stub__Z14kernel_replaceIdEvPKT_S2_PS0_iPKdS0_Pdi, .-_ZL48__device_stub__Z14kernel_replaceIdEvPKT_S2_PS0_iPKdS0_Pdi
	.type	_ZL58__device_stub__Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_iPKdPddi, @function
_ZL58__device_stub__Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_iPKdPddi:
.LFB4407:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L344
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L344:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L346
	call	__stack_chk_fail@PLT
.L346:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4407:
	.size	_ZL58__device_stub__Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_iPKdPddi, .-_ZL58__device_stub__Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_iPKdPddi
	.type	_ZL61__device_stub__Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_iPKdPddi, @function
_ZL61__device_stub__Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_iPKdPddi:
.LFB4405:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L348
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L348:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L350
	call	__stack_chk_fail@PLT
.L350:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4405:
	.size	_ZL61__device_stub__Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_iPKdPddi, .-_ZL61__device_stub__Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_iPKdPddi
	.type	_ZL52__device_stub__Z18kernel_less_scalarIdEvPKT_PS0_S0_iPKdPddi, @function
_ZL52__device_stub__Z18kernel_less_scalarIdEvPKT_PS0_S0_iPKdPddi:
.LFB4403:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L352
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18kernel_less_scalarIdEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L352:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L354
	call	__stack_chk_fail@PLT
.L354:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4403:
	.size	_ZL52__device_stub__Z18kernel_less_scalarIdEvPKT_PS0_S0_iPKdPddi, .-_ZL52__device_stub__Z18kernel_less_scalarIdEvPKT_PS0_S0_iPKdPddi
	.type	_ZL55__device_stub__Z21kernel_greater_scalarIdEvPKT_PS0_S0_iPKdPddi, @function
_ZL55__device_stub__Z21kernel_greater_scalarIdEvPKT_PS0_S0_iPKdPddi:
.LFB4401:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L356
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L356:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L358
	call	__stack_chk_fail@PLT
.L358:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4401:
	.size	_ZL55__device_stub__Z21kernel_greater_scalarIdEvPKT_PS0_S0_iPKdPddi, .-_ZL55__device_stub__Z21kernel_greater_scalarIdEvPKT_PS0_S0_iPKdPddi
	.type	_ZL53__device_stub__Z19kernel_equal_scalarIdEvPKT_PS0_S0_iPKdPddi, @function
_ZL53__device_stub__Z19kernel_equal_scalarIdEvPKT_PS0_S0_iPKdPddi:
.LFB4399:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L360
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L360:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L362
	call	__stack_chk_fail@PLT
.L362:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4399:
	.size	_ZL53__device_stub__Z19kernel_equal_scalarIdEvPKT_PS0_S0_iPKdPddi, .-_ZL53__device_stub__Z19kernel_equal_scalarIdEvPKT_PS0_S0_iPKdPddi
	.type	_ZL51__device_stub__Z17kernel_less_equalIdEvPKT_S2_PS0_iPKdS0_Pdi, @function
_ZL51__device_stub__Z17kernel_less_equalIdEvPKT_S2_PS0_iPKdS0_Pdi:
.LFB4397:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L364
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_less_equalIdEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L364:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L366
	call	__stack_chk_fail@PLT
.L366:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4397:
	.size	_ZL51__device_stub__Z17kernel_less_equalIdEvPKT_S2_PS0_iPKdS0_Pdi, .-_ZL51__device_stub__Z17kernel_less_equalIdEvPKT_S2_PS0_iPKdS0_Pdi
	.type	_ZL54__device_stub__Z20kernel_greater_equalIdEvPKT_S2_PS0_iPKdS0_Pdi, @function
_ZL54__device_stub__Z20kernel_greater_equalIdEvPKT_S2_PS0_iPKdS0_Pdi:
.LFB4395:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L368
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20kernel_greater_equalIdEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L368:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L370
	call	__stack_chk_fail@PLT
.L370:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4395:
	.size	_ZL54__device_stub__Z20kernel_greater_equalIdEvPKT_S2_PS0_iPKdS0_Pdi, .-_ZL54__device_stub__Z20kernel_greater_equalIdEvPKT_S2_PS0_iPKdS0_Pdi
	.type	_ZL45__device_stub__Z11kernel_lessIdEvPKT_S2_PS0_iPKdS0_Pdi, @function
_ZL45__device_stub__Z11kernel_lessIdEvPKT_S2_PS0_iPKdS0_Pdi:
.LFB4393:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L372
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_lessIdEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L372:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L374
	call	__stack_chk_fail@PLT
.L374:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4393:
	.size	_ZL45__device_stub__Z11kernel_lessIdEvPKT_S2_PS0_iPKdS0_Pdi, .-_ZL45__device_stub__Z11kernel_lessIdEvPKT_S2_PS0_iPKdS0_Pdi
	.type	_ZL48__device_stub__Z14kernel_greaterIdEvPKT_S2_PS0_iPKdS0_Pdi, @function
_ZL48__device_stub__Z14kernel_greaterIdEvPKT_S2_PS0_iPKdS0_Pdi:
.LFB4391:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L376
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14kernel_greaterIdEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L376:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L378
	call	__stack_chk_fail@PLT
.L378:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4391:
	.size	_ZL48__device_stub__Z14kernel_greaterIdEvPKT_S2_PS0_iPKdS0_Pdi, .-_ZL48__device_stub__Z14kernel_greaterIdEvPKT_S2_PS0_iPKdS0_Pdi
	.type	_ZL46__device_stub__Z12kernel_equalIdEvPKT_S2_PS0_iPKdS0_Pdi, @function
_ZL46__device_stub__Z12kernel_equalIdEvPKT_S2_PS0_iPKdS0_Pdi:
.LFB4389:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L380
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12kernel_equalIdEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L380:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L382
	call	__stack_chk_fail@PLT
.L382:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4389:
	.size	_ZL46__device_stub__Z12kernel_equalIdEvPKT_S2_PS0_iPKdS0_Pdi, .-_ZL46__device_stub__Z12kernel_equalIdEvPKT_S2_PS0_iPKdS0_Pdi
	.type	_ZL55__device_stub__Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_iPKdPddi, @function
_ZL55__device_stub__Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_iPKdPddi:
.LFB4387:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L384
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L384:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L386
	call	__stack_chk_fail@PLT
.L386:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4387:
	.size	_ZL55__device_stub__Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_iPKdPddi, .-_ZL55__device_stub__Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_iPKdPddi
	.type	_ZL51__device_stub__Z17kernel_pow_scalarIdEvPKT_PS0_S0_iPKdPddi, @function
_ZL51__device_stub__Z17kernel_pow_scalarIdEvPKT_PS0_S0_iPKdPddi:
.LFB4385:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L388
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L388:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L390
	call	__stack_chk_fail@PLT
.L390:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4385:
	.size	_ZL51__device_stub__Z17kernel_pow_scalarIdEvPKT_PS0_S0_iPKdPddi, .-_ZL51__device_stub__Z17kernel_pow_scalarIdEvPKT_PS0_S0_iPKdPddi
	.type	_ZL55__device_stub__Z21kernel_div_scalar_invIdEvPKT_PS0_S0_iPKdPddi, @function
_ZL55__device_stub__Z21kernel_div_scalar_invIdEvPKT_PS0_S0_iPKdPddi:
.LFB4383:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L392
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L392:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L394
	call	__stack_chk_fail@PLT
.L394:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4383:
	.size	_ZL55__device_stub__Z21kernel_div_scalar_invIdEvPKT_PS0_S0_iPKdPddi, .-_ZL55__device_stub__Z21kernel_div_scalar_invIdEvPKT_PS0_S0_iPKdPddi
	.type	_ZL51__device_stub__Z17kernel_div_scalarIdEvPKT_PS0_S0_iPKdPddi, @function
_ZL51__device_stub__Z17kernel_div_scalarIdEvPKT_PS0_S0_iPKdPddi:
.LFB4381:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L396
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_div_scalarIdEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L396:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L398
	call	__stack_chk_fail@PLT
.L398:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4381:
	.size	_ZL51__device_stub__Z17kernel_div_scalarIdEvPKT_PS0_S0_iPKdPddi, .-_ZL51__device_stub__Z17kernel_div_scalarIdEvPKT_PS0_S0_iPKdPddi
	.type	_ZL51__device_stub__Z17kernel_mul_scalarIdEvPKT_PS0_S0_iPKdPddi, @function
_ZL51__device_stub__Z17kernel_mul_scalarIdEvPKT_PS0_S0_iPKdPddi:
.LFB4379:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L400
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L400:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L402
	call	__stack_chk_fail@PLT
.L402:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4379:
	.size	_ZL51__device_stub__Z17kernel_mul_scalarIdEvPKT_PS0_S0_iPKdPddi, .-_ZL51__device_stub__Z17kernel_mul_scalarIdEvPKT_PS0_S0_iPKdPddi
	.type	_ZL55__device_stub__Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_iPKdPddi, @function
_ZL55__device_stub__Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_iPKdPddi:
.LFB4377:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L404
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L404:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L406
	call	__stack_chk_fail@PLT
.L406:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4377:
	.size	_ZL55__device_stub__Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_iPKdPddi, .-_ZL55__device_stub__Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_iPKdPddi
	.type	_ZL51__device_stub__Z17kernel_sub_scalarIdEvPKT_PS0_S0_iPKdPddi, @function
_ZL51__device_stub__Z17kernel_sub_scalarIdEvPKT_PS0_S0_iPKdPddi:
.LFB4375:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L408
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L408:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L410
	call	__stack_chk_fail@PLT
.L410:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4375:
	.size	_ZL51__device_stub__Z17kernel_sub_scalarIdEvPKT_PS0_S0_iPKdPddi, .-_ZL51__device_stub__Z17kernel_sub_scalarIdEvPKT_PS0_S0_iPKdPddi
	.type	_ZL51__device_stub__Z17kernel_add_scalarIdEvPKT_PS0_S0_iPKdPddi, @function
_ZL51__device_stub__Z17kernel_add_scalarIdEvPKT_PS0_S0_iPKdPddi:
.LFB4373:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L412
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_add_scalarIdEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L412:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L414
	call	__stack_chk_fail@PLT
.L414:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4373:
	.size	_ZL51__device_stub__Z17kernel_add_scalarIdEvPKT_PS0_S0_iPKdPddi, .-_ZL51__device_stub__Z17kernel_add_scalarIdEvPKT_PS0_S0_iPKdPddi
	.type	_ZL44__device_stub__Z10kernel_powIdEvPKT_S2_PS0_iPKdS0_Pdi, @function
_ZL44__device_stub__Z10kernel_powIdEvPKT_S2_PS0_iPKdS0_Pdi:
.LFB4371:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L416
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_powIdEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L416:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L418
	call	__stack_chk_fail@PLT
.L418:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4371:
	.size	_ZL44__device_stub__Z10kernel_powIdEvPKT_S2_PS0_iPKdS0_Pdi, .-_ZL44__device_stub__Z10kernel_powIdEvPKT_S2_PS0_iPKdS0_Pdi
	.type	_ZL44__device_stub__Z10kernel_divIdEvPKT_S2_PS0_iPKdS0_Pdi, @function
_ZL44__device_stub__Z10kernel_divIdEvPKT_S2_PS0_iPKdS0_Pdi:
.LFB4369:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L420
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_divIdEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L420:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L422
	call	__stack_chk_fail@PLT
.L422:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4369:
	.size	_ZL44__device_stub__Z10kernel_divIdEvPKT_S2_PS0_iPKdS0_Pdi, .-_ZL44__device_stub__Z10kernel_divIdEvPKT_S2_PS0_iPKdS0_Pdi
	.type	_ZL44__device_stub__Z10kernel_mulIdEvPKT_S2_PS0_iPKdS0_Pdi, @function
_ZL44__device_stub__Z10kernel_mulIdEvPKT_S2_PS0_iPKdS0_Pdi:
.LFB4367:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L424
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_mulIdEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L424:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L426
	call	__stack_chk_fail@PLT
.L426:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4367:
	.size	_ZL44__device_stub__Z10kernel_mulIdEvPKT_S2_PS0_iPKdS0_Pdi, .-_ZL44__device_stub__Z10kernel_mulIdEvPKT_S2_PS0_iPKdS0_Pdi
	.type	_ZL44__device_stub__Z10kernel_subIdEvPKT_S2_PS0_iPKdS0_Pdi, @function
_ZL44__device_stub__Z10kernel_subIdEvPKT_S2_PS0_iPKdS0_Pdi:
.LFB4365:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L428
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_subIdEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L428:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L430
	call	__stack_chk_fail@PLT
.L430:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4365:
	.size	_ZL44__device_stub__Z10kernel_subIdEvPKT_S2_PS0_iPKdS0_Pdi, .-_ZL44__device_stub__Z10kernel_subIdEvPKT_S2_PS0_iPKdS0_Pdi
	.type	_ZL44__device_stub__Z10kernel_addIdEvPKT_S2_PS0_iPKdS0_Pdi, @function
_ZL44__device_stub__Z10kernel_addIdEvPKT_S2_PS0_iPKdS0_Pdi:
.LFB4363:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L432
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_addIdEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L432:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L434
	call	__stack_chk_fail@PLT
.L434:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4363:
	.size	_ZL44__device_stub__Z10kernel_addIdEvPKT_S2_PS0_iPKdS0_Pdi, .-_ZL44__device_stub__Z10kernel_addIdEvPKT_S2_PS0_iPKdS0_Pdi
	.type	_ZL42__device_stub__Z11kernel_copyIdEvPKT_PS0_iPKdPdi, @function
_ZL42__device_stub__Z11kernel_copyIdEvPKT_PS0_iPKdPdi:
.LFB4361:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L436
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_copyIdEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L436:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L438
	call	__stack_chk_fail@PLT
.L438:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4361:
	.size	_ZL42__device_stub__Z11kernel_copyIdEvPKT_PS0_iPKdPdi, .-_ZL42__device_stub__Z11kernel_copyIdEvPKT_PS0_iPKdPdi
	.type	_ZL42__device_stub__Z13kernel_assignIdEvPT_S0_iPddi, @function
_ZL42__device_stub__Z13kernel_assignIdEvPT_S0_iPddi:
.LFB4359:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	40(%rsp), %rdx
	movl	%esi, 12(%rsp)
	leaq	56(%rsp), %rdi
	leaq	68(%rsp), %rsi
	movsd	%xmm0, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L440
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z13kernel_assignIdEvPT_S0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L440:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L442
	call	__stack_chk_fail@PLT
.L442:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4359:
	.size	_ZL42__device_stub__Z13kernel_assignIdEvPT_S0_iPddi, .-_ZL42__device_stub__Z13kernel_assignIdEvPT_S0_iPddi
	.type	_ZL60__device_stub__Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiiiPKfS0_Pfiiiiii, @function
_ZL60__device_stub__Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiiiPKfS0_Pfiiiiii:
.LFB4357:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L444
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L444:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L446
	call	__stack_chk_fail@PLT
.L446:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4357:
	.size	_ZL60__device_stub__Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiiiPKfS0_Pfiiiiii, .-_ZL60__device_stub__Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiiiPKfS0_Pfiiiiii
	.type	_ZL58__device_stub__Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiiiPKfS0_Pfiiii, @function
_ZL58__device_stub__Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiiiPKfS0_Pfiiii:
.LFB4355:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L448
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L448:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L450
	call	__stack_chk_fail@PLT
.L450:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4355:
	.size	_ZL58__device_stub__Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiiiPKfS0_Pfiiii, .-_ZL58__device_stub__Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiiiPKfS0_Pfiiii
	.type	_ZL49__device_stub__Z16kernel_gradientzIfEvPKT_PS0_iiiPKfPfiii, @function
_ZL49__device_stub__Z16kernel_gradientzIfEvPKT_PS0_iiiPKfPfiii:
.LFB4353:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L452
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16kernel_gradientzIfEvPKT_PS0_iii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L452:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L454
	call	__stack_chk_fail@PLT
.L454:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4353:
	.size	_ZL49__device_stub__Z16kernel_gradientzIfEvPKT_PS0_iiiPKfPfiii, .-_ZL49__device_stub__Z16kernel_gradientzIfEvPKT_PS0_iiiPKfPfiii
	.type	_ZL49__device_stub__Z16kernel_gradientyIfEvPKT_PS0_iiiPKfPfiii, @function
_ZL49__device_stub__Z16kernel_gradientyIfEvPKT_PS0_iiiPKfPfiii:
.LFB4351:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L456
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16kernel_gradientyIfEvPKT_PS0_iii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L456:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L458
	call	__stack_chk_fail@PLT
.L458:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4351:
	.size	_ZL49__device_stub__Z16kernel_gradientyIfEvPKT_PS0_iiiPKfPfiii, .-_ZL49__device_stub__Z16kernel_gradientyIfEvPKT_PS0_iiiPKfPfiii
	.type	_ZL49__device_stub__Z16kernel_gradientxIfEvPKT_PS0_iiiPKfPfiii, @function
_ZL49__device_stub__Z16kernel_gradientxIfEvPKT_PS0_iiiPKfPfiii:
.LFB4349:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L460
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16kernel_gradientxIfEvPKT_PS0_iii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L460:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L462
	call	__stack_chk_fail@PLT
.L462:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4349:
	.size	_ZL49__device_stub__Z16kernel_gradientxIfEvPKT_PS0_iiiPKfPfiii, .-_ZL49__device_stub__Z16kernel_gradientxIfEvPKT_PS0_iiiPKfPfiii
	.type	_ZL69__device_stub__Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii, @function
_ZL69__device_stub__Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii:
.LFB4347:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L464
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L464:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L466
	call	__stack_chk_fail@PLT
.L466:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4347:
	.size	_ZL69__device_stub__Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii, .-_ZL69__device_stub__Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii
	.type	_ZL75__device_stub__Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiiiPKfS0_S0_S0_Pfiiiiii, @function
_ZL75__device_stub__Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiiiPKfS0_S0_S0_Pfiiiiii:
.LFB4345:
	.cfi_startproc
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L468
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L468:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L470
	call	__stack_chk_fail@PLT
.L470:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4345:
	.size	_ZL75__device_stub__Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiiiPKfS0_S0_S0_Pfiiiiii, .-_ZL75__device_stub__Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiiiPKfS0_S0_S0_Pfiiiiii
	.type	_ZL70__device_stub__Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii, @function
_ZL70__device_stub__Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii:
.LFB4343:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L472
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L472:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L474
	call	__stack_chk_fail@PLT
.L474:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4343:
	.size	_ZL70__device_stub__Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii, .-_ZL70__device_stub__Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii
	.type	_ZL76__device_stub__Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiiiPKfS0_S0_S0_Pfiiiiii, @function
_ZL76__device_stub__Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiiiPKfS0_S0_S0_Pfiiiiii:
.LFB4341:
	.cfi_startproc
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L476
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L476:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L478
	call	__stack_chk_fail@PLT
.L478:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4341:
	.size	_ZL76__device_stub__Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiiiPKfS0_S0_S0_Pfiiiiii, .-_ZL76__device_stub__Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiiiPKfS0_S0_S0_Pfiiiiii
	.type	_ZL71__device_stub__Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii, @function
_ZL71__device_stub__Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii:
.LFB4339:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L480
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L480:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L482
	call	__stack_chk_fail@PLT
.L482:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4339:
	.size	_ZL71__device_stub__Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii, .-_ZL71__device_stub__Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii
	.type	_ZL68__device_stub__Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKfS0_S0_S0_S0_S0_PfS1_S1_i, @function
_ZL68__device_stub__Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKfS0_S0_S0_S0_S0_PfS1_S1_i:
.LFB4337:
	.cfi_startproc
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	108(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	232(%rsp), %rax
	movq	%rdx, 56(%rsp)
	leaq	80(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	240(%rsp), %rax
	movq	%rcx, 48(%rsp)
	leaq	88(%rsp), %rcx
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movl	$1, 104(%rsp)
	movq	%rax, 120(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L484
	pushq	88(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 240
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	136(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L484:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L486
	call	__stack_chk_fail@PLT
.L486:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4337:
	.size	_ZL68__device_stub__Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKfS0_S0_S0_S0_S0_PfS1_S1_i, .-_ZL68__device_stub__Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKfS0_S0_S0_S0_S0_PfS1_S1_i
	.type	_ZL59__device_stub__Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_iPKfS0_S0_S0_PfS1_i, @function
_ZL59__device_stub__Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_iPKfS0_S0_S0_PfS1_i:
.LFB4335:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsp, %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L488
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L488:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L490
	call	__stack_chk_fail@PLT
.L490:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4335:
	.size	_ZL59__device_stub__Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_iPKfS0_S0_S0_PfS1_i, .-_ZL59__device_stub__Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_iPKfS0_S0_S0_PfS1_i
	.type	_ZL66__device_stub__Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdiPKfS0_S0_PfS1_S1_PKdi, @function
_ZL66__device_stub__Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdiPKfS0_S0_PfS1_S1_PKdi:
.LFB4333:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 104(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L492
	pushq	72(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 208
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L492:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L494
	call	__stack_chk_fail@PLT
.L494:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4333:
	.size	_ZL66__device_stub__Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdiPKfS0_S0_PfS1_S1_PKdi, .-_ZL66__device_stub__Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdiPKfS0_S0_PfS1_S1_PKdi
	.type	_ZL60__device_stub__Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdiPKfS0_PfS1_PKdi, @function
_ZL60__device_stub__Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdiPKfS0_PfS1_PKdi:
.LFB4331:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L496
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L496:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L498
	call	__stack_chk_fail@PLT
.L498:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4331:
	.size	_ZL60__device_stub__Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdiPKfS0_PfS1_PKdi, .-_ZL60__device_stub__Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdiPKfS0_PfS1_PKdi
	.type	_ZL62__device_stub__Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_iPKfS0_S0_PfS1_S1_S0_i, @function
_ZL62__device_stub__Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_iPKfS0_S0_PfS1_S1_S0_i:
.LFB4329:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 104(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L500
	pushq	72(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 208
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L500:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L502
	call	__stack_chk_fail@PLT
.L502:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4329:
	.size	_ZL62__device_stub__Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_iPKfS0_S0_PfS1_S1_S0_i, .-_ZL62__device_stub__Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_iPKfS0_S0_PfS1_S1_S0_i
	.type	_ZL56__device_stub__Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_iPKfS0_PfS1_S0_i, @function
_ZL56__device_stub__Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_iPKfS0_PfS1_S0_i:
.LFB4327:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L504
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L504:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L506
	call	__stack_chk_fail@PLT
.L506:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4327:
	.size	_ZL56__device_stub__Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_iPKfS0_PfS1_S0_i, .-_ZL56__device_stub__Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_iPKfS0_PfS1_S0_i
	.type	_ZL50__device_stub__Z14kernel_grid_3dIfEvPT_S1_S1_PdiiiPfS_S_Pdiii, @function
_ZL50__device_stub__Z14kernel_grid_3dIfEvPT_S1_S1_PdiiiPfS_S_Pdiii:
.LFB4325:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L508
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L508:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L510
	call	__stack_chk_fail@PLT
.L510:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4325:
	.size	_ZL50__device_stub__Z14kernel_grid_3dIfEvPT_S1_S1_PdiiiPfS_S_Pdiii, .-_ZL50__device_stub__Z14kernel_grid_3dIfEvPT_S1_S1_PdiiiPfS_S_Pdiii
	.type	_ZL46__device_stub__Z14kernel_grid_2dIfEvPT_S1_PdiiPfS_Pdii, @function
_ZL46__device_stub__Z14kernel_grid_2dIfEvPT_S1_PdiiPfS_Pdii:
.LFB4323:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L512
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14kernel_grid_2dIfEvPT_S1_Pdii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L512:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L514
	call	__stack_chk_fail@PLT
.L514:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4323:
	.size	_ZL46__device_stub__Z14kernel_grid_2dIfEvPT_S1_PdiiPfS_Pdii, .-_ZL46__device_stub__Z14kernel_grid_2dIfEvPT_S1_PdiiPfS_Pdii
	.type	_ZL54__device_stub__Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiiiPKfPfiiiiiiiii, @function
_ZL54__device_stub__Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiiiPKfPfiiiiiiiii:
.LFB4321:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L516
	pushq	48(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 208
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L516:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L518
	call	__stack_chk_fail@PLT
.L518:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4321:
	.size	_ZL54__device_stub__Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiiiPKfPfiiiiiiiii, .-_ZL54__device_stub__Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiiiPKfPfiiiiiiiii
	.type	_ZL52__device_stub__Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiiiPKfPfiiiiiiiii, @function
_ZL52__device_stub__Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiiiPKfPfiiiiiiiii:
.LFB4319:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L520
	pushq	48(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 208
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L520:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L522
	call	__stack_chk_fail@PLT
.L522:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4319:
	.size	_ZL52__device_stub__Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiiiPKfPfiiiiiiiii, .-_ZL52__device_stub__Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiiiPKfPfiiiiiiiii
	.type	_ZL51__device_stub__Z15kernel_unpad_2dIfEvPKT_PS0_iiiiiiPKfPfiiiiii, @function
_ZL51__device_stub__Z15kernel_unpad_2dIfEvPKT_PS0_iiiiiiPKfPfiiiiii:
.LFB4317:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L524
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L524:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L526
	call	__stack_chk_fail@PLT
.L526:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4317:
	.size	_ZL51__device_stub__Z15kernel_unpad_2dIfEvPKT_PS0_iiiiiiPKfPfiiiiii, .-_ZL51__device_stub__Z15kernel_unpad_2dIfEvPKT_PS0_iiiiiiPKfPfiiiiii
	.type	_ZL49__device_stub__Z13kernel_pad_2dIfEvPKT_PS0_iiiiiiPKfPfiiiiii, @function
_ZL49__device_stub__Z13kernel_pad_2dIfEvPKT_PS0_iiiiiiPKfPfiiiiii:
.LFB4315:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L528
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L528:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L530
	call	__stack_chk_fail@PLT
.L530:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4315:
	.size	_ZL49__device_stub__Z13kernel_pad_2dIfEvPKT_PS0_iiiiiiPKfPfiiiiii, .-_ZL49__device_stub__Z13kernel_pad_2dIfEvPKT_PS0_iiiiiiPKfPfiiiiii
	.type	_ZL41__device_stub__Z10kernel_maxIfEvPKT_PS0_iPKfPfi, @function
_ZL41__device_stub__Z10kernel_maxIfEvPKT_PS0_iPKfPfi:
.LFB4313:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L532
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_maxIfEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L532:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L534
	call	__stack_chk_fail@PLT
.L534:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4313:
	.size	_ZL41__device_stub__Z10kernel_maxIfEvPKT_PS0_iPKfPfi, .-_ZL41__device_stub__Z10kernel_maxIfEvPKT_PS0_iPKfPfi
	.type	_ZL41__device_stub__Z10kernel_minIfEvPKT_PS0_iPKfPfi, @function
_ZL41__device_stub__Z10kernel_minIfEvPKT_PS0_iPKfPfi:
.LFB4311:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L536
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_minIfEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L536:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L538
	call	__stack_chk_fail@PLT
.L538:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4311:
	.size	_ZL41__device_stub__Z10kernel_minIfEvPKT_PS0_iPKfPfi, .-_ZL41__device_stub__Z10kernel_minIfEvPKT_PS0_iPKfPfi
	.type	_ZL41__device_stub__Z10kernel_sumIfEvPKT_PS0_iPKfPfi, @function
_ZL41__device_stub__Z10kernel_sumIfEvPKT_PS0_iPKfPfi:
.LFB4309:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L540
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_sumIfEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L540:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L542
	call	__stack_chk_fail@PLT
.L542:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4309:
	.size	_ZL41__device_stub__Z10kernel_sumIfEvPKT_PS0_iPKfPfi, .-_ZL41__device_stub__Z10kernel_sumIfEvPKT_PS0_iPKfPfi
	.type	_ZL55__device_stub__Z21kernel_replace_scalarIfEvPKT_PS0_S0_iPKfPffi, @function
_ZL55__device_stub__Z21kernel_replace_scalarIfEvPKT_PS0_S0_iPKfPffi:
.LFB4307:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L544
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L544:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L546
	call	__stack_chk_fail@PLT
.L546:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4307:
	.size	_ZL55__device_stub__Z21kernel_replace_scalarIfEvPKT_PS0_S0_iPKfPffi, .-_ZL55__device_stub__Z21kernel_replace_scalarIfEvPKT_PS0_S0_iPKfPffi
	.type	_ZL48__device_stub__Z14kernel_replaceIfEvPKT_S2_PS0_iPKfS0_Pfi, @function
_ZL48__device_stub__Z14kernel_replaceIfEvPKT_S2_PS0_iPKfS0_Pfi:
.LFB4305:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L548
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14kernel_replaceIfEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L548:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L550
	call	__stack_chk_fail@PLT
.L550:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4305:
	.size	_ZL48__device_stub__Z14kernel_replaceIfEvPKT_S2_PS0_iPKfS0_Pfi, .-_ZL48__device_stub__Z14kernel_replaceIfEvPKT_S2_PS0_iPKfS0_Pfi
	.type	_ZL58__device_stub__Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_iPKfPffi, @function
_ZL58__device_stub__Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_iPKfPffi:
.LFB4303:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L552
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L552:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L554
	call	__stack_chk_fail@PLT
.L554:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4303:
	.size	_ZL58__device_stub__Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_iPKfPffi, .-_ZL58__device_stub__Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_iPKfPffi
	.type	_ZL61__device_stub__Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_iPKfPffi, @function
_ZL61__device_stub__Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_iPKfPffi:
.LFB4301:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L556
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L556:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L558
	call	__stack_chk_fail@PLT
.L558:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4301:
	.size	_ZL61__device_stub__Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_iPKfPffi, .-_ZL61__device_stub__Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_iPKfPffi
	.type	_ZL52__device_stub__Z18kernel_less_scalarIfEvPKT_PS0_S0_iPKfPffi, @function
_ZL52__device_stub__Z18kernel_less_scalarIfEvPKT_PS0_S0_iPKfPffi:
.LFB4299:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L560
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18kernel_less_scalarIfEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L560:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L562
	call	__stack_chk_fail@PLT
.L562:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4299:
	.size	_ZL52__device_stub__Z18kernel_less_scalarIfEvPKT_PS0_S0_iPKfPffi, .-_ZL52__device_stub__Z18kernel_less_scalarIfEvPKT_PS0_S0_iPKfPffi
	.type	_ZL55__device_stub__Z21kernel_greater_scalarIfEvPKT_PS0_S0_iPKfPffi, @function
_ZL55__device_stub__Z21kernel_greater_scalarIfEvPKT_PS0_S0_iPKfPffi:
.LFB4297:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L564
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L564:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L566
	call	__stack_chk_fail@PLT
.L566:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4297:
	.size	_ZL55__device_stub__Z21kernel_greater_scalarIfEvPKT_PS0_S0_iPKfPffi, .-_ZL55__device_stub__Z21kernel_greater_scalarIfEvPKT_PS0_S0_iPKfPffi
	.type	_ZL53__device_stub__Z19kernel_equal_scalarIfEvPKT_PS0_S0_iPKfPffi, @function
_ZL53__device_stub__Z19kernel_equal_scalarIfEvPKT_PS0_S0_iPKfPffi:
.LFB4295:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L568
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L568:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L570
	call	__stack_chk_fail@PLT
.L570:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4295:
	.size	_ZL53__device_stub__Z19kernel_equal_scalarIfEvPKT_PS0_S0_iPKfPffi, .-_ZL53__device_stub__Z19kernel_equal_scalarIfEvPKT_PS0_S0_iPKfPffi
	.type	_ZL51__device_stub__Z17kernel_less_equalIfEvPKT_S2_PS0_iPKfS0_Pfi, @function
_ZL51__device_stub__Z17kernel_less_equalIfEvPKT_S2_PS0_iPKfS0_Pfi:
.LFB4293:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L572
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_less_equalIfEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L572:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L574
	call	__stack_chk_fail@PLT
.L574:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4293:
	.size	_ZL51__device_stub__Z17kernel_less_equalIfEvPKT_S2_PS0_iPKfS0_Pfi, .-_ZL51__device_stub__Z17kernel_less_equalIfEvPKT_S2_PS0_iPKfS0_Pfi
	.type	_ZL54__device_stub__Z20kernel_greater_equalIfEvPKT_S2_PS0_iPKfS0_Pfi, @function
_ZL54__device_stub__Z20kernel_greater_equalIfEvPKT_S2_PS0_iPKfS0_Pfi:
.LFB4291:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L576
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20kernel_greater_equalIfEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L576:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L578
	call	__stack_chk_fail@PLT
.L578:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4291:
	.size	_ZL54__device_stub__Z20kernel_greater_equalIfEvPKT_S2_PS0_iPKfS0_Pfi, .-_ZL54__device_stub__Z20kernel_greater_equalIfEvPKT_S2_PS0_iPKfS0_Pfi
	.type	_ZL45__device_stub__Z11kernel_lessIfEvPKT_S2_PS0_iPKfS0_Pfi, @function
_ZL45__device_stub__Z11kernel_lessIfEvPKT_S2_PS0_iPKfS0_Pfi:
.LFB4289:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L580
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_lessIfEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L580:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L582
	call	__stack_chk_fail@PLT
.L582:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4289:
	.size	_ZL45__device_stub__Z11kernel_lessIfEvPKT_S2_PS0_iPKfS0_Pfi, .-_ZL45__device_stub__Z11kernel_lessIfEvPKT_S2_PS0_iPKfS0_Pfi
	.type	_ZL48__device_stub__Z14kernel_greaterIfEvPKT_S2_PS0_iPKfS0_Pfi, @function
_ZL48__device_stub__Z14kernel_greaterIfEvPKT_S2_PS0_iPKfS0_Pfi:
.LFB4287:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L584
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14kernel_greaterIfEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L584:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L586
	call	__stack_chk_fail@PLT
.L586:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4287:
	.size	_ZL48__device_stub__Z14kernel_greaterIfEvPKT_S2_PS0_iPKfS0_Pfi, .-_ZL48__device_stub__Z14kernel_greaterIfEvPKT_S2_PS0_iPKfS0_Pfi
	.type	_ZL46__device_stub__Z12kernel_equalIfEvPKT_S2_PS0_iPKfS0_Pfi, @function
_ZL46__device_stub__Z12kernel_equalIfEvPKT_S2_PS0_iPKfS0_Pfi:
.LFB4285:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L588
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12kernel_equalIfEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L588:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L590
	call	__stack_chk_fail@PLT
.L590:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4285:
	.size	_ZL46__device_stub__Z12kernel_equalIfEvPKT_S2_PS0_iPKfS0_Pfi, .-_ZL46__device_stub__Z12kernel_equalIfEvPKT_S2_PS0_iPKfS0_Pfi
	.type	_ZL55__device_stub__Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_iPKfPffi, @function
_ZL55__device_stub__Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_iPKfPffi:
.LFB4283:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L592
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L592:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L594
	call	__stack_chk_fail@PLT
.L594:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4283:
	.size	_ZL55__device_stub__Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_iPKfPffi, .-_ZL55__device_stub__Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_iPKfPffi
	.type	_ZL51__device_stub__Z17kernel_pow_scalarIfEvPKT_PS0_S0_iPKfPffi, @function
_ZL51__device_stub__Z17kernel_pow_scalarIfEvPKT_PS0_S0_iPKfPffi:
.LFB4281:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L596
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L596:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L598
	call	__stack_chk_fail@PLT
.L598:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4281:
	.size	_ZL51__device_stub__Z17kernel_pow_scalarIfEvPKT_PS0_S0_iPKfPffi, .-_ZL51__device_stub__Z17kernel_pow_scalarIfEvPKT_PS0_S0_iPKfPffi
	.type	_ZL55__device_stub__Z21kernel_div_scalar_invIfEvPKT_PS0_S0_iPKfPffi, @function
_ZL55__device_stub__Z21kernel_div_scalar_invIfEvPKT_PS0_S0_iPKfPffi:
.LFB4279:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L600
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L600:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L602
	call	__stack_chk_fail@PLT
.L602:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4279:
	.size	_ZL55__device_stub__Z21kernel_div_scalar_invIfEvPKT_PS0_S0_iPKfPffi, .-_ZL55__device_stub__Z21kernel_div_scalar_invIfEvPKT_PS0_S0_iPKfPffi
	.type	_ZL51__device_stub__Z17kernel_div_scalarIfEvPKT_PS0_S0_iPKfPffi, @function
_ZL51__device_stub__Z17kernel_div_scalarIfEvPKT_PS0_S0_iPKfPffi:
.LFB4277:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L604
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_div_scalarIfEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L604:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L606
	call	__stack_chk_fail@PLT
.L606:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4277:
	.size	_ZL51__device_stub__Z17kernel_div_scalarIfEvPKT_PS0_S0_iPKfPffi, .-_ZL51__device_stub__Z17kernel_div_scalarIfEvPKT_PS0_S0_iPKfPffi
	.type	_ZL51__device_stub__Z17kernel_mul_scalarIfEvPKT_PS0_S0_iPKfPffi, @function
_ZL51__device_stub__Z17kernel_mul_scalarIfEvPKT_PS0_S0_iPKfPffi:
.LFB4275:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L608
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L608:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L610
	call	__stack_chk_fail@PLT
.L610:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4275:
	.size	_ZL51__device_stub__Z17kernel_mul_scalarIfEvPKT_PS0_S0_iPKfPffi, .-_ZL51__device_stub__Z17kernel_mul_scalarIfEvPKT_PS0_S0_iPKfPffi
	.type	_ZL55__device_stub__Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_iPKfPffi, @function
_ZL55__device_stub__Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_iPKfPffi:
.LFB4273:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L612
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L612:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L614
	call	__stack_chk_fail@PLT
.L614:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4273:
	.size	_ZL55__device_stub__Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_iPKfPffi, .-_ZL55__device_stub__Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_iPKfPffi
	.type	_ZL51__device_stub__Z17kernel_sub_scalarIfEvPKT_PS0_S0_iPKfPffi, @function
_ZL51__device_stub__Z17kernel_sub_scalarIfEvPKT_PS0_S0_iPKfPffi:
.LFB4271:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L616
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L616:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L618
	call	__stack_chk_fail@PLT
.L618:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4271:
	.size	_ZL51__device_stub__Z17kernel_sub_scalarIfEvPKT_PS0_S0_iPKfPffi, .-_ZL51__device_stub__Z17kernel_sub_scalarIfEvPKT_PS0_S0_iPKfPffi
	.type	_ZL51__device_stub__Z17kernel_add_scalarIfEvPKT_PS0_S0_iPKfPffi, @function
_ZL51__device_stub__Z17kernel_add_scalarIfEvPKT_PS0_S0_iPKfPffi:
.LFB4269:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L620
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_add_scalarIfEvPKT_PS0_S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L620:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L622
	call	__stack_chk_fail@PLT
.L622:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4269:
	.size	_ZL51__device_stub__Z17kernel_add_scalarIfEvPKT_PS0_S0_iPKfPffi, .-_ZL51__device_stub__Z17kernel_add_scalarIfEvPKT_PS0_S0_iPKfPffi
	.type	_ZL44__device_stub__Z10kernel_powIfEvPKT_S2_PS0_iPKfS0_Pfi, @function
_ZL44__device_stub__Z10kernel_powIfEvPKT_S2_PS0_iPKfS0_Pfi:
.LFB4267:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L624
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_powIfEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L624:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L626
	call	__stack_chk_fail@PLT
.L626:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4267:
	.size	_ZL44__device_stub__Z10kernel_powIfEvPKT_S2_PS0_iPKfS0_Pfi, .-_ZL44__device_stub__Z10kernel_powIfEvPKT_S2_PS0_iPKfS0_Pfi
	.type	_ZL44__device_stub__Z10kernel_divIfEvPKT_S2_PS0_iPKfS0_Pfi, @function
_ZL44__device_stub__Z10kernel_divIfEvPKT_S2_PS0_iPKfS0_Pfi:
.LFB4265:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L628
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_divIfEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L628:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L630
	call	__stack_chk_fail@PLT
.L630:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4265:
	.size	_ZL44__device_stub__Z10kernel_divIfEvPKT_S2_PS0_iPKfS0_Pfi, .-_ZL44__device_stub__Z10kernel_divIfEvPKT_S2_PS0_iPKfS0_Pfi
	.type	_ZL44__device_stub__Z10kernel_mulIfEvPKT_S2_PS0_iPKfS0_Pfi, @function
_ZL44__device_stub__Z10kernel_mulIfEvPKT_S2_PS0_iPKfS0_Pfi:
.LFB4263:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L632
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_mulIfEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L632:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L634
	call	__stack_chk_fail@PLT
.L634:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4263:
	.size	_ZL44__device_stub__Z10kernel_mulIfEvPKT_S2_PS0_iPKfS0_Pfi, .-_ZL44__device_stub__Z10kernel_mulIfEvPKT_S2_PS0_iPKfS0_Pfi
	.type	_ZL44__device_stub__Z10kernel_subIfEvPKT_S2_PS0_iPKfS0_Pfi, @function
_ZL44__device_stub__Z10kernel_subIfEvPKT_S2_PS0_iPKfS0_Pfi:
.LFB4261:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L636
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_subIfEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L636:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L638
	call	__stack_chk_fail@PLT
.L638:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4261:
	.size	_ZL44__device_stub__Z10kernel_subIfEvPKT_S2_PS0_iPKfS0_Pfi, .-_ZL44__device_stub__Z10kernel_subIfEvPKT_S2_PS0_iPKfS0_Pfi
	.type	_ZL44__device_stub__Z10kernel_addIfEvPKT_S2_PS0_iPKfS0_Pfi, @function
_ZL44__device_stub__Z10kernel_addIfEvPKT_S2_PS0_iPKfS0_Pfi:
.LFB4259:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L640
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kernel_addIfEvPKT_S2_PS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L640:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L642
	call	__stack_chk_fail@PLT
.L642:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4259:
	.size	_ZL44__device_stub__Z10kernel_addIfEvPKT_S2_PS0_iPKfS0_Pfi, .-_ZL44__device_stub__Z10kernel_addIfEvPKT_S2_PS0_iPKfS0_Pfi
	.type	_ZL42__device_stub__Z11kernel_copyIfEvPKT_PS0_iPKfPfi, @function
_ZL42__device_stub__Z11kernel_copyIfEvPKT_PS0_iPKfPfi:
.LFB4257:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L644
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_copyIfEvPKT_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L644:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L646
	call	__stack_chk_fail@PLT
.L646:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4257:
	.size	_ZL42__device_stub__Z11kernel_copyIfEvPKT_PS0_iPKfPfi, .-_ZL42__device_stub__Z11kernel_copyIfEvPKT_PS0_iPKfPfi
	.type	_ZL42__device_stub__Z13kernel_assignIfEvPT_S0_iPffi, @function
_ZL42__device_stub__Z13kernel_assignIfEvPT_S0_iPffi:
.LFB4255:
	.cfi_startproc
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 64(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	%rsp, %rax
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L648
	pushq	32(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z13kernel_assignIfEvPT_S0_i(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 128
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L648:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L650
	call	__stack_chk_fail@PLT
.L650:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4255:
	.size	_ZL42__device_stub__Z13kernel_assignIfEvPT_S0_iPffi, .-_ZL42__device_stub__Z13kernel_assignIfEvPT_S0_iPffi
	.type	_ZL43__device_stub__Z11kernel_castIddEvPKT_PT0_iPKdPdi, @function
_ZL43__device_stub__Z11kernel_castIddEvPKT_PT0_iPKdPdi:
.LFB4253:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L652
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIddEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L652:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L654
	call	__stack_chk_fail@PLT
.L654:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4253:
	.size	_ZL43__device_stub__Z11kernel_castIddEvPKT_PT0_iPKdPdi, .-_ZL43__device_stub__Z11kernel_castIddEvPKT_PT0_iPKdPdi
	.type	_ZL43__device_stub__Z11kernel_castIffEvPKT_PT0_iPKfPfi, @function
_ZL43__device_stub__Z11kernel_castIffEvPKT_PT0_iPKfPfi:
.LFB4251:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L656
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIffEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L656:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L658
	call	__stack_chk_fail@PLT
.L658:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4251:
	.size	_ZL43__device_stub__Z11kernel_castIffEvPKT_PT0_iPKfPfi, .-_ZL43__device_stub__Z11kernel_castIffEvPKT_PT0_iPKfPfi
	.type	_ZL43__device_stub__Z11kernel_castIhdEvPKT_PT0_iPKhPdi, @function
_ZL43__device_stub__Z11kernel_castIhdEvPKT_PT0_iPKhPdi:
.LFB4249:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L660
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIhdEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L660:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L662
	call	__stack_chk_fail@PLT
.L662:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4249:
	.size	_ZL43__device_stub__Z11kernel_castIhdEvPKT_PT0_iPKhPdi, .-_ZL43__device_stub__Z11kernel_castIhdEvPKT_PT0_iPKhPdi
	.type	_ZL43__device_stub__Z11kernel_castIdhEvPKT_PT0_iPKdPhi, @function
_ZL43__device_stub__Z11kernel_castIdhEvPKT_PT0_iPKdPhi:
.LFB4247:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L664
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIdhEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L664:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L666
	call	__stack_chk_fail@PLT
.L666:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4247:
	.size	_ZL43__device_stub__Z11kernel_castIdhEvPKT_PT0_iPKdPhi, .-_ZL43__device_stub__Z11kernel_castIdhEvPKT_PT0_iPKdPhi
	.type	_ZL43__device_stub__Z11kernel_castIhfEvPKT_PT0_iPKhPfi, @function
_ZL43__device_stub__Z11kernel_castIhfEvPKT_PT0_iPKhPfi:
.LFB4245:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L668
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIhfEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L668:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L670
	call	__stack_chk_fail@PLT
.L670:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4245:
	.size	_ZL43__device_stub__Z11kernel_castIhfEvPKT_PT0_iPKhPfi, .-_ZL43__device_stub__Z11kernel_castIhfEvPKT_PT0_iPKhPfi
	.type	_ZL43__device_stub__Z11kernel_castIfhEvPKT_PT0_iPKfPhi, @function
_ZL43__device_stub__Z11kernel_castIfhEvPKT_PT0_iPKfPhi:
.LFB4243:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L672
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIfhEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L672:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L674
	call	__stack_chk_fail@PLT
.L674:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4243:
	.size	_ZL43__device_stub__Z11kernel_castIfhEvPKT_PT0_iPKfPhi, .-_ZL43__device_stub__Z11kernel_castIfhEvPKT_PT0_iPKfPhi
	.type	_ZL43__device_stub__Z11kernel_castIjdEvPKT_PT0_iPKjPdi, @function
_ZL43__device_stub__Z11kernel_castIjdEvPKT_PT0_iPKjPdi:
.LFB4241:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L676
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIjdEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L676:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L678
	call	__stack_chk_fail@PLT
.L678:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4241:
	.size	_ZL43__device_stub__Z11kernel_castIjdEvPKT_PT0_iPKjPdi, .-_ZL43__device_stub__Z11kernel_castIjdEvPKT_PT0_iPKjPdi
	.type	_ZL43__device_stub__Z11kernel_castIdjEvPKT_PT0_iPKdPji, @function
_ZL43__device_stub__Z11kernel_castIdjEvPKT_PT0_iPKdPji:
.LFB4239:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L680
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIdjEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L680:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L682
	call	__stack_chk_fail@PLT
.L682:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4239:
	.size	_ZL43__device_stub__Z11kernel_castIdjEvPKT_PT0_iPKdPji, .-_ZL43__device_stub__Z11kernel_castIdjEvPKT_PT0_iPKdPji
	.type	_ZL43__device_stub__Z11kernel_castIjfEvPKT_PT0_iPKjPfi, @function
_ZL43__device_stub__Z11kernel_castIjfEvPKT_PT0_iPKjPfi:
.LFB4237:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L684
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIjfEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L684:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L686
	call	__stack_chk_fail@PLT
.L686:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4237:
	.size	_ZL43__device_stub__Z11kernel_castIjfEvPKT_PT0_iPKjPfi, .-_ZL43__device_stub__Z11kernel_castIjfEvPKT_PT0_iPKjPfi
	.type	_ZL43__device_stub__Z11kernel_castIfjEvPKT_PT0_iPKfPji, @function
_ZL43__device_stub__Z11kernel_castIfjEvPKT_PT0_iPKfPji:
.LFB4235:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L688
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIfjEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L688:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L690
	call	__stack_chk_fail@PLT
.L690:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4235:
	.size	_ZL43__device_stub__Z11kernel_castIfjEvPKT_PT0_iPKfPji, .-_ZL43__device_stub__Z11kernel_castIfjEvPKT_PT0_iPKfPji
	.type	_ZL43__device_stub__Z11kernel_castItdEvPKT_PT0_iPKtPdi, @function
_ZL43__device_stub__Z11kernel_castItdEvPKT_PT0_iPKtPdi:
.LFB4233:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L692
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castItdEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L692:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L694
	call	__stack_chk_fail@PLT
.L694:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4233:
	.size	_ZL43__device_stub__Z11kernel_castItdEvPKT_PT0_iPKtPdi, .-_ZL43__device_stub__Z11kernel_castItdEvPKT_PT0_iPKtPdi
	.type	_ZL43__device_stub__Z11kernel_castIdtEvPKT_PT0_iPKdPti, @function
_ZL43__device_stub__Z11kernel_castIdtEvPKT_PT0_iPKdPti:
.LFB4231:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L696
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIdtEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L696:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L698
	call	__stack_chk_fail@PLT
.L698:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4231:
	.size	_ZL43__device_stub__Z11kernel_castIdtEvPKT_PT0_iPKdPti, .-_ZL43__device_stub__Z11kernel_castIdtEvPKT_PT0_iPKdPti
	.type	_ZL43__device_stub__Z11kernel_castItfEvPKT_PT0_iPKtPfi, @function
_ZL43__device_stub__Z11kernel_castItfEvPKT_PT0_iPKtPfi:
.LFB4229:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L700
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castItfEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L700:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L702
	call	__stack_chk_fail@PLT
.L702:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4229:
	.size	_ZL43__device_stub__Z11kernel_castItfEvPKT_PT0_iPKtPfi, .-_ZL43__device_stub__Z11kernel_castItfEvPKT_PT0_iPKtPfi
	.type	_ZL43__device_stub__Z11kernel_castIftEvPKT_PT0_iPKfPti, @function
_ZL43__device_stub__Z11kernel_castIftEvPKT_PT0_iPKfPti:
.LFB4227:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L704
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIftEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L704:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L706
	call	__stack_chk_fail@PLT
.L706:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4227:
	.size	_ZL43__device_stub__Z11kernel_castIftEvPKT_PT0_iPKfPti, .-_ZL43__device_stub__Z11kernel_castIftEvPKT_PT0_iPKfPti
	.type	_ZL43__device_stub__Z11kernel_castIdiEvPKT_PT0_iPKdPii, @function
_ZL43__device_stub__Z11kernel_castIdiEvPKT_PT0_iPKdPii:
.LFB4225:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L708
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIdiEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L708:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L710
	call	__stack_chk_fail@PLT
.L710:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4225:
	.size	_ZL43__device_stub__Z11kernel_castIdiEvPKT_PT0_iPKdPii, .-_ZL43__device_stub__Z11kernel_castIdiEvPKT_PT0_iPKdPii
	.type	_ZL43__device_stub__Z11kernel_castIidEvPKT_PT0_iPKiPdi, @function
_ZL43__device_stub__Z11kernel_castIidEvPKT_PT0_iPKiPdi:
.LFB4223:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L712
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIidEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L712:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L714
	call	__stack_chk_fail@PLT
.L714:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4223:
	.size	_ZL43__device_stub__Z11kernel_castIidEvPKT_PT0_iPKiPdi, .-_ZL43__device_stub__Z11kernel_castIidEvPKT_PT0_iPKiPdi
	.type	_ZL43__device_stub__Z11kernel_castIfiEvPKT_PT0_iPKfPii, @function
_ZL43__device_stub__Z11kernel_castIfiEvPKT_PT0_iPKfPii:
.LFB4221:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L716
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIfiEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L716:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L718
	call	__stack_chk_fail@PLT
.L718:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4221:
	.size	_ZL43__device_stub__Z11kernel_castIfiEvPKT_PT0_iPKfPii, .-_ZL43__device_stub__Z11kernel_castIfiEvPKT_PT0_iPKfPii
	.type	_ZL43__device_stub__Z11kernel_castIifEvPKT_PT0_iPKiPfi, @function
_ZL43__device_stub__Z11kernel_castIifEvPKT_PT0_iPKiPfi:
.LFB4219:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L720
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIifEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L720:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L722
	call	__stack_chk_fail@PLT
.L722:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4219:
	.size	_ZL43__device_stub__Z11kernel_castIifEvPKT_PT0_iPKiPfi, .-_ZL43__device_stub__Z11kernel_castIifEvPKT_PT0_iPKiPfi
	.type	_ZL43__device_stub__Z11kernel_castIdfEvPKT_PT0_iPKdPfi, @function
_ZL43__device_stub__Z11kernel_castIdfEvPKT_PT0_iPKdPfi:
.LFB4217:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L724
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIdfEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L724:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L726
	call	__stack_chk_fail@PLT
.L726:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4217:
	.size	_ZL43__device_stub__Z11kernel_castIdfEvPKT_PT0_iPKdPfi, .-_ZL43__device_stub__Z11kernel_castIdfEvPKT_PT0_iPKdPfi
	.type	_ZL43__device_stub__Z11kernel_castIfdEvPKT_PT0_iPKfPdi, @function
_ZL43__device_stub__Z11kernel_castIfdEvPKT_PT0_iPKfPdi:
.LFB4215:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L728
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_castIfdEvPKT_PT0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L728:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L730
	call	__stack_chk_fail@PLT
.L730:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4215:
	.size	_ZL43__device_stub__Z11kernel_castIfdEvPKT_PT0_iPKfPdi, .-_ZL43__device_stub__Z11kernel_castIfdEvPKT_PT0_iPKfPdi
	.type	_Z10cudaMallocI6float2E9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocI6float2E9cudaErrorPPT_m.isra.0:
.LFB5568:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE5568:
	.size	_Z10cudaMallocI6float2E9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocI6float2E9cudaErrorPPT_m.isra.0
	.section	.text._Z11kernel_copyIcEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIcEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyIcEvPKT_PS0_i
	.type	_Z11kernel_copyIcEvPKT_PS0_i, @function
_Z11kernel_copyIcEvPKT_PS0_i:
.LFB5246:
	.cfi_startproc
	endbr64
	jmp	_ZL42__device_stub__Z11kernel_copyIcEvPKT_PS0_iPKcPci
	.cfi_endproc
.LFE5246:
	.size	_Z11kernel_copyIcEvPKT_PS0_i, .-_Z11kernel_copyIcEvPKT_PS0_i
	.section	.text._Z11kernel_castIfdEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIfdEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIfdEvPKT_PT0_i
	.type	_Z11kernel_castIfdEvPKT_PT0_i, @function
_Z11kernel_castIfdEvPKT_PT0_i:
.LFB5064:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIfdEvPKT_PT0_iPKfPdi
	.cfi_endproc
.LFE5064:
	.size	_Z11kernel_castIfdEvPKT_PT0_i, .-_Z11kernel_castIfdEvPKT_PT0_i
	.section	.text._Z11kernel_castIdfEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIdfEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIdfEvPKT_PT0_i
	.type	_Z11kernel_castIdfEvPKT_PT0_i, @function
_Z11kernel_castIdfEvPKT_PT0_i:
.LFB5066:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIdfEvPKT_PT0_iPKdPfi
	.cfi_endproc
.LFE5066:
	.size	_Z11kernel_castIdfEvPKT_PT0_i, .-_Z11kernel_castIdfEvPKT_PT0_i
	.section	.text._Z11kernel_castIifEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIifEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIifEvPKT_PT0_i
	.type	_Z11kernel_castIifEvPKT_PT0_i, @function
_Z11kernel_castIifEvPKT_PT0_i:
.LFB5067:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIifEvPKT_PT0_iPKiPfi
	.cfi_endproc
.LFE5067:
	.size	_Z11kernel_castIifEvPKT_PT0_i, .-_Z11kernel_castIifEvPKT_PT0_i
	.section	.text._Z11kernel_castIfiEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIfiEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIfiEvPKT_PT0_i
	.type	_Z11kernel_castIfiEvPKT_PT0_i, @function
_Z11kernel_castIfiEvPKT_PT0_i:
.LFB5068:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIfiEvPKT_PT0_iPKfPii
	.cfi_endproc
.LFE5068:
	.size	_Z11kernel_castIfiEvPKT_PT0_i, .-_Z11kernel_castIfiEvPKT_PT0_i
	.section	.text._Z11kernel_castIidEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIidEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIidEvPKT_PT0_i
	.type	_Z11kernel_castIidEvPKT_PT0_i, @function
_Z11kernel_castIidEvPKT_PT0_i:
.LFB5069:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIidEvPKT_PT0_iPKiPdi
	.cfi_endproc
.LFE5069:
	.size	_Z11kernel_castIidEvPKT_PT0_i, .-_Z11kernel_castIidEvPKT_PT0_i
	.section	.text._Z11kernel_castIdiEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIdiEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIdiEvPKT_PT0_i
	.type	_Z11kernel_castIdiEvPKT_PT0_i, @function
_Z11kernel_castIdiEvPKT_PT0_i:
.LFB5070:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIdiEvPKT_PT0_iPKdPii
	.cfi_endproc
.LFE5070:
	.size	_Z11kernel_castIdiEvPKT_PT0_i, .-_Z11kernel_castIdiEvPKT_PT0_i
	.section	.text._Z11kernel_castIftEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIftEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIftEvPKT_PT0_i
	.type	_Z11kernel_castIftEvPKT_PT0_i, @function
_Z11kernel_castIftEvPKT_PT0_i:
.LFB5071:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIftEvPKT_PT0_iPKfPti
	.cfi_endproc
.LFE5071:
	.size	_Z11kernel_castIftEvPKT_PT0_i, .-_Z11kernel_castIftEvPKT_PT0_i
	.section	.text._Z11kernel_castItfEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castItfEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castItfEvPKT_PT0_i
	.type	_Z11kernel_castItfEvPKT_PT0_i, @function
_Z11kernel_castItfEvPKT_PT0_i:
.LFB5072:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castItfEvPKT_PT0_iPKtPfi
	.cfi_endproc
.LFE5072:
	.size	_Z11kernel_castItfEvPKT_PT0_i, .-_Z11kernel_castItfEvPKT_PT0_i
	.section	.text._Z11kernel_castIdtEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIdtEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIdtEvPKT_PT0_i
	.type	_Z11kernel_castIdtEvPKT_PT0_i, @function
_Z11kernel_castIdtEvPKT_PT0_i:
.LFB5073:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIdtEvPKT_PT0_iPKdPti
	.cfi_endproc
.LFE5073:
	.size	_Z11kernel_castIdtEvPKT_PT0_i, .-_Z11kernel_castIdtEvPKT_PT0_i
	.section	.text._Z11kernel_castItdEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castItdEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castItdEvPKT_PT0_i
	.type	_Z11kernel_castItdEvPKT_PT0_i, @function
_Z11kernel_castItdEvPKT_PT0_i:
.LFB5074:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castItdEvPKT_PT0_iPKtPdi
	.cfi_endproc
.LFE5074:
	.size	_Z11kernel_castItdEvPKT_PT0_i, .-_Z11kernel_castItdEvPKT_PT0_i
	.section	.text._Z11kernel_castIfjEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIfjEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIfjEvPKT_PT0_i
	.type	_Z11kernel_castIfjEvPKT_PT0_i, @function
_Z11kernel_castIfjEvPKT_PT0_i:
.LFB5075:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIfjEvPKT_PT0_iPKfPji
	.cfi_endproc
.LFE5075:
	.size	_Z11kernel_castIfjEvPKT_PT0_i, .-_Z11kernel_castIfjEvPKT_PT0_i
	.section	.text._Z11kernel_castIjfEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIjfEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIjfEvPKT_PT0_i
	.type	_Z11kernel_castIjfEvPKT_PT0_i, @function
_Z11kernel_castIjfEvPKT_PT0_i:
.LFB5076:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIjfEvPKT_PT0_iPKjPfi
	.cfi_endproc
.LFE5076:
	.size	_Z11kernel_castIjfEvPKT_PT0_i, .-_Z11kernel_castIjfEvPKT_PT0_i
	.section	.text._Z11kernel_castIdjEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIdjEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIdjEvPKT_PT0_i
	.type	_Z11kernel_castIdjEvPKT_PT0_i, @function
_Z11kernel_castIdjEvPKT_PT0_i:
.LFB5077:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIdjEvPKT_PT0_iPKdPji
	.cfi_endproc
.LFE5077:
	.size	_Z11kernel_castIdjEvPKT_PT0_i, .-_Z11kernel_castIdjEvPKT_PT0_i
	.section	.text._Z11kernel_castIjdEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIjdEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIjdEvPKT_PT0_i
	.type	_Z11kernel_castIjdEvPKT_PT0_i, @function
_Z11kernel_castIjdEvPKT_PT0_i:
.LFB5078:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIjdEvPKT_PT0_iPKjPdi
	.cfi_endproc
.LFE5078:
	.size	_Z11kernel_castIjdEvPKT_PT0_i, .-_Z11kernel_castIjdEvPKT_PT0_i
	.section	.text._Z11kernel_castIfhEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIfhEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIfhEvPKT_PT0_i
	.type	_Z11kernel_castIfhEvPKT_PT0_i, @function
_Z11kernel_castIfhEvPKT_PT0_i:
.LFB5079:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIfhEvPKT_PT0_iPKfPhi
	.cfi_endproc
.LFE5079:
	.size	_Z11kernel_castIfhEvPKT_PT0_i, .-_Z11kernel_castIfhEvPKT_PT0_i
	.section	.text._Z11kernel_castIhfEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIhfEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIhfEvPKT_PT0_i
	.type	_Z11kernel_castIhfEvPKT_PT0_i, @function
_Z11kernel_castIhfEvPKT_PT0_i:
.LFB5080:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIhfEvPKT_PT0_iPKhPfi
	.cfi_endproc
.LFE5080:
	.size	_Z11kernel_castIhfEvPKT_PT0_i, .-_Z11kernel_castIhfEvPKT_PT0_i
	.section	.text._Z11kernel_castIdhEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIdhEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIdhEvPKT_PT0_i
	.type	_Z11kernel_castIdhEvPKT_PT0_i, @function
_Z11kernel_castIdhEvPKT_PT0_i:
.LFB5081:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIdhEvPKT_PT0_iPKdPhi
	.cfi_endproc
.LFE5081:
	.size	_Z11kernel_castIdhEvPKT_PT0_i, .-_Z11kernel_castIdhEvPKT_PT0_i
	.section	.text._Z11kernel_castIhdEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIhdEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIhdEvPKT_PT0_i
	.type	_Z11kernel_castIhdEvPKT_PT0_i, @function
_Z11kernel_castIhdEvPKT_PT0_i:
.LFB5082:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIhdEvPKT_PT0_iPKhPdi
	.cfi_endproc
.LFE5082:
	.size	_Z11kernel_castIhdEvPKT_PT0_i, .-_Z11kernel_castIhdEvPKT_PT0_i
	.section	.text._Z11kernel_castIffEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIffEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIffEvPKT_PT0_i
	.type	_Z11kernel_castIffEvPKT_PT0_i, @function
_Z11kernel_castIffEvPKT_PT0_i:
.LFB5083:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIffEvPKT_PT0_iPKfPfi
	.cfi_endproc
.LFE5083:
	.size	_Z11kernel_castIffEvPKT_PT0_i, .-_Z11kernel_castIffEvPKT_PT0_i
	.section	.text._Z11kernel_castIddEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIddEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIddEvPKT_PT0_i
	.type	_Z11kernel_castIddEvPKT_PT0_i, @function
_Z11kernel_castIddEvPKT_PT0_i:
.LFB5084:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11kernel_castIddEvPKT_PT0_iPKdPdi
	.cfi_endproc
.LFE5084:
	.size	_Z11kernel_castIddEvPKT_PT0_i, .-_Z11kernel_castIddEvPKT_PT0_i
	.section	.text._Z13kernel_assignIfEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIfEvPT_S0_i,comdat
	.weak	_Z13kernel_assignIfEvPT_S0_i
	.type	_Z13kernel_assignIfEvPT_S0_i, @function
_Z13kernel_assignIfEvPT_S0_i:
.LFB5085:
	.cfi_startproc
	endbr64
	jmp	_ZL42__device_stub__Z13kernel_assignIfEvPT_S0_iPffi
	.cfi_endproc
.LFE5085:
	.size	_Z13kernel_assignIfEvPT_S0_i, .-_Z13kernel_assignIfEvPT_S0_i
	.section	.text._Z11kernel_copyIfEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIfEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyIfEvPKT_PS0_i
	.type	_Z11kernel_copyIfEvPKT_PS0_i, @function
_Z11kernel_copyIfEvPKT_PS0_i:
.LFB5086:
	.cfi_startproc
	endbr64
	jmp	_ZL42__device_stub__Z11kernel_copyIfEvPKT_PS0_iPKfPfi
	.cfi_endproc
.LFE5086:
	.size	_Z11kernel_copyIfEvPKT_PS0_i, .-_Z11kernel_copyIfEvPKT_PS0_i
	.section	.text._Z10kernel_addIfEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_addIfEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_addIfEvPKT_S2_PS0_i
	.type	_Z10kernel_addIfEvPKT_S2_PS0_i, @function
_Z10kernel_addIfEvPKT_S2_PS0_i:
.LFB5087:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z10kernel_addIfEvPKT_S2_PS0_iPKfS0_Pfi
	.cfi_endproc
.LFE5087:
	.size	_Z10kernel_addIfEvPKT_S2_PS0_i, .-_Z10kernel_addIfEvPKT_S2_PS0_i
	.section	.text._Z10kernel_subIfEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_subIfEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_subIfEvPKT_S2_PS0_i
	.type	_Z10kernel_subIfEvPKT_S2_PS0_i, @function
_Z10kernel_subIfEvPKT_S2_PS0_i:
.LFB5088:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z10kernel_subIfEvPKT_S2_PS0_iPKfS0_Pfi
	.cfi_endproc
.LFE5088:
	.size	_Z10kernel_subIfEvPKT_S2_PS0_i, .-_Z10kernel_subIfEvPKT_S2_PS0_i
	.section	.text._Z10kernel_mulIfEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_mulIfEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_mulIfEvPKT_S2_PS0_i
	.type	_Z10kernel_mulIfEvPKT_S2_PS0_i, @function
_Z10kernel_mulIfEvPKT_S2_PS0_i:
.LFB5089:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z10kernel_mulIfEvPKT_S2_PS0_iPKfS0_Pfi
	.cfi_endproc
.LFE5089:
	.size	_Z10kernel_mulIfEvPKT_S2_PS0_i, .-_Z10kernel_mulIfEvPKT_S2_PS0_i
	.section	.text._Z10kernel_divIfEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_divIfEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_divIfEvPKT_S2_PS0_i
	.type	_Z10kernel_divIfEvPKT_S2_PS0_i, @function
_Z10kernel_divIfEvPKT_S2_PS0_i:
.LFB5090:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z10kernel_divIfEvPKT_S2_PS0_iPKfS0_Pfi
	.cfi_endproc
.LFE5090:
	.size	_Z10kernel_divIfEvPKT_S2_PS0_i, .-_Z10kernel_divIfEvPKT_S2_PS0_i
	.section	.text._Z10kernel_powIfEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_powIfEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_powIfEvPKT_S2_PS0_i
	.type	_Z10kernel_powIfEvPKT_S2_PS0_i, @function
_Z10kernel_powIfEvPKT_S2_PS0_i:
.LFB5091:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z10kernel_powIfEvPKT_S2_PS0_iPKfS0_Pfi
	.cfi_endproc
.LFE5091:
	.size	_Z10kernel_powIfEvPKT_S2_PS0_i, .-_Z10kernel_powIfEvPKT_S2_PS0_i
	.section	.text._Z17kernel_add_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_add_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_add_scalarIfEvPKT_PS0_S0_i
	.type	_Z17kernel_add_scalarIfEvPKT_PS0_S0_i, @function
_Z17kernel_add_scalarIfEvPKT_PS0_S0_i:
.LFB5092:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_add_scalarIfEvPKT_PS0_S0_iPKfPffi
	.cfi_endproc
.LFE5092:
	.size	_Z17kernel_add_scalarIfEvPKT_PS0_S0_i, .-_Z17kernel_add_scalarIfEvPKT_PS0_S0_i
	.section	.text._Z17kernel_sub_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i
	.type	_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i, @function
_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i:
.LFB5093:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_sub_scalarIfEvPKT_PS0_S0_iPKfPffi
	.cfi_endproc
.LFE5093:
	.size	_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i, .-_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i
	.section	.text._Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i
	.type	_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i, @function
_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i:
.LFB5094:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_iPKfPffi
	.cfi_endproc
.LFE5094:
	.size	_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i, .-_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i
	.section	.text._Z17kernel_mul_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i
	.type	_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i, @function
_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i:
.LFB5095:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_mul_scalarIfEvPKT_PS0_S0_iPKfPffi
	.cfi_endproc
.LFE5095:
	.size	_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i, .-_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i
	.section	.text._Z17kernel_div_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_div_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_div_scalarIfEvPKT_PS0_S0_i
	.type	_Z17kernel_div_scalarIfEvPKT_PS0_S0_i, @function
_Z17kernel_div_scalarIfEvPKT_PS0_S0_i:
.LFB5096:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_div_scalarIfEvPKT_PS0_S0_iPKfPffi
	.cfi_endproc
.LFE5096:
	.size	_Z17kernel_div_scalarIfEvPKT_PS0_S0_i, .-_Z17kernel_div_scalarIfEvPKT_PS0_S0_i
	.section	.text._Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i
	.type	_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i, @function
_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i:
.LFB5097:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21kernel_div_scalar_invIfEvPKT_PS0_S0_iPKfPffi
	.cfi_endproc
.LFE5097:
	.size	_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i, .-_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i
	.section	.text._Z17kernel_pow_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i
	.type	_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i, @function
_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i:
.LFB5098:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_pow_scalarIfEvPKT_PS0_S0_iPKfPffi
	.cfi_endproc
.LFE5098:
	.size	_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i, .-_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i
	.section	.text._Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i
	.type	_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i, @function
_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i:
.LFB5099:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_iPKfPffi
	.cfi_endproc
.LFE5099:
	.size	_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i, .-_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i
	.section	.text._Z12kernel_equalIfEvPKT_S2_PS0_i,"axG",@progbits,_Z12kernel_equalIfEvPKT_S2_PS0_i,comdat
	.weak	_Z12kernel_equalIfEvPKT_S2_PS0_i
	.type	_Z12kernel_equalIfEvPKT_S2_PS0_i, @function
_Z12kernel_equalIfEvPKT_S2_PS0_i:
.LFB5100:
	.cfi_startproc
	endbr64
	jmp	_ZL46__device_stub__Z12kernel_equalIfEvPKT_S2_PS0_iPKfS0_Pfi
	.cfi_endproc
.LFE5100:
	.size	_Z12kernel_equalIfEvPKT_S2_PS0_i, .-_Z12kernel_equalIfEvPKT_S2_PS0_i
	.section	.text._Z14kernel_greaterIfEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_greaterIfEvPKT_S2_PS0_i,comdat
	.weak	_Z14kernel_greaterIfEvPKT_S2_PS0_i
	.type	_Z14kernel_greaterIfEvPKT_S2_PS0_i, @function
_Z14kernel_greaterIfEvPKT_S2_PS0_i:
.LFB5101:
	.cfi_startproc
	endbr64
	jmp	_ZL48__device_stub__Z14kernel_greaterIfEvPKT_S2_PS0_iPKfS0_Pfi
	.cfi_endproc
.LFE5101:
	.size	_Z14kernel_greaterIfEvPKT_S2_PS0_i, .-_Z14kernel_greaterIfEvPKT_S2_PS0_i
	.section	.text._Z11kernel_lessIfEvPKT_S2_PS0_i,"axG",@progbits,_Z11kernel_lessIfEvPKT_S2_PS0_i,comdat
	.weak	_Z11kernel_lessIfEvPKT_S2_PS0_i
	.type	_Z11kernel_lessIfEvPKT_S2_PS0_i, @function
_Z11kernel_lessIfEvPKT_S2_PS0_i:
.LFB5102:
	.cfi_startproc
	endbr64
	jmp	_ZL45__device_stub__Z11kernel_lessIfEvPKT_S2_PS0_iPKfS0_Pfi
	.cfi_endproc
.LFE5102:
	.size	_Z11kernel_lessIfEvPKT_S2_PS0_i, .-_Z11kernel_lessIfEvPKT_S2_PS0_i
	.section	.text._Z20kernel_greater_equalIfEvPKT_S2_PS0_i,"axG",@progbits,_Z20kernel_greater_equalIfEvPKT_S2_PS0_i,comdat
	.weak	_Z20kernel_greater_equalIfEvPKT_S2_PS0_i
	.type	_Z20kernel_greater_equalIfEvPKT_S2_PS0_i, @function
_Z20kernel_greater_equalIfEvPKT_S2_PS0_i:
.LFB5103:
	.cfi_startproc
	endbr64
	jmp	_ZL54__device_stub__Z20kernel_greater_equalIfEvPKT_S2_PS0_iPKfS0_Pfi
	.cfi_endproc
.LFE5103:
	.size	_Z20kernel_greater_equalIfEvPKT_S2_PS0_i, .-_Z20kernel_greater_equalIfEvPKT_S2_PS0_i
	.section	.text._Z17kernel_less_equalIfEvPKT_S2_PS0_i,"axG",@progbits,_Z17kernel_less_equalIfEvPKT_S2_PS0_i,comdat
	.weak	_Z17kernel_less_equalIfEvPKT_S2_PS0_i
	.type	_Z17kernel_less_equalIfEvPKT_S2_PS0_i, @function
_Z17kernel_less_equalIfEvPKT_S2_PS0_i:
.LFB5104:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_less_equalIfEvPKT_S2_PS0_iPKfS0_Pfi
	.cfi_endproc
.LFE5104:
	.size	_Z17kernel_less_equalIfEvPKT_S2_PS0_i, .-_Z17kernel_less_equalIfEvPKT_S2_PS0_i
	.section	.text._Z19kernel_equal_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i
	.type	_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i, @function
_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i:
.LFB5105:
	.cfi_startproc
	endbr64
	jmp	_ZL53__device_stub__Z19kernel_equal_scalarIfEvPKT_PS0_S0_iPKfPffi
	.cfi_endproc
.LFE5105:
	.size	_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i, .-_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i
	.section	.text._Z21kernel_greater_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i
	.type	_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i, @function
_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i:
.LFB5106:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21kernel_greater_scalarIfEvPKT_PS0_S0_iPKfPffi
	.cfi_endproc
.LFE5106:
	.size	_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i, .-_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i
	.section	.text._Z18kernel_less_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z18kernel_less_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z18kernel_less_scalarIfEvPKT_PS0_S0_i
	.type	_Z18kernel_less_scalarIfEvPKT_PS0_S0_i, @function
_Z18kernel_less_scalarIfEvPKT_PS0_S0_i:
.LFB5107:
	.cfi_startproc
	endbr64
	jmp	_ZL52__device_stub__Z18kernel_less_scalarIfEvPKT_PS0_S0_iPKfPffi
	.cfi_endproc
.LFE5107:
	.size	_Z18kernel_less_scalarIfEvPKT_PS0_S0_i, .-_Z18kernel_less_scalarIfEvPKT_PS0_S0_i
	.section	.text._Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i
	.type	_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i, @function
_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i:
.LFB5108:
	.cfi_startproc
	endbr64
	jmp	_ZL61__device_stub__Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_iPKfPffi
	.cfi_endproc
.LFE5108:
	.size	_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i, .-_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i
	.section	.text._Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i
	.type	_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i, @function
_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i:
.LFB5109:
	.cfi_startproc
	endbr64
	jmp	_ZL58__device_stub__Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_iPKfPffi
	.cfi_endproc
.LFE5109:
	.size	_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i, .-_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i
	.section	.text._Z14kernel_replaceIfEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_replaceIfEvPKT_S2_PS0_i,comdat
	.weak	_Z14kernel_replaceIfEvPKT_S2_PS0_i
	.type	_Z14kernel_replaceIfEvPKT_S2_PS0_i, @function
_Z14kernel_replaceIfEvPKT_S2_PS0_i:
.LFB5110:
	.cfi_startproc
	endbr64
	jmp	_ZL48__device_stub__Z14kernel_replaceIfEvPKT_S2_PS0_iPKfS0_Pfi
	.cfi_endproc
.LFE5110:
	.size	_Z14kernel_replaceIfEvPKT_S2_PS0_i, .-_Z14kernel_replaceIfEvPKT_S2_PS0_i
	.section	.text._Z21kernel_replace_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i
	.type	_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i, @function
_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i:
.LFB5111:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21kernel_replace_scalarIfEvPKT_PS0_S0_iPKfPffi
	.cfi_endproc
.LFE5111:
	.size	_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i, .-_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i
	.section	.text._Z10kernel_sumIfEvPKT_PS0_i,"axG",@progbits,_Z10kernel_sumIfEvPKT_PS0_i,comdat
	.weak	_Z10kernel_sumIfEvPKT_PS0_i
	.type	_Z10kernel_sumIfEvPKT_PS0_i, @function
_Z10kernel_sumIfEvPKT_PS0_i:
.LFB5112:
	.cfi_startproc
	endbr64
	jmp	_ZL41__device_stub__Z10kernel_sumIfEvPKT_PS0_iPKfPfi
	.cfi_endproc
.LFE5112:
	.size	_Z10kernel_sumIfEvPKT_PS0_i, .-_Z10kernel_sumIfEvPKT_PS0_i
	.section	.text._Z10kernel_minIfEvPKT_PS0_i,"axG",@progbits,_Z10kernel_minIfEvPKT_PS0_i,comdat
	.weak	_Z10kernel_minIfEvPKT_PS0_i
	.type	_Z10kernel_minIfEvPKT_PS0_i, @function
_Z10kernel_minIfEvPKT_PS0_i:
.LFB5113:
	.cfi_startproc
	endbr64
	jmp	_ZL41__device_stub__Z10kernel_minIfEvPKT_PS0_iPKfPfi
	.cfi_endproc
.LFE5113:
	.size	_Z10kernel_minIfEvPKT_PS0_i, .-_Z10kernel_minIfEvPKT_PS0_i
	.section	.text._Z10kernel_maxIfEvPKT_PS0_i,"axG",@progbits,_Z10kernel_maxIfEvPKT_PS0_i,comdat
	.weak	_Z10kernel_maxIfEvPKT_PS0_i
	.type	_Z10kernel_maxIfEvPKT_PS0_i, @function
_Z10kernel_maxIfEvPKT_PS0_i:
.LFB5114:
	.cfi_startproc
	endbr64
	jmp	_ZL41__device_stub__Z10kernel_maxIfEvPKT_PS0_iPKfPfi
	.cfi_endproc
.LFE5114:
	.size	_Z10kernel_maxIfEvPKT_PS0_i, .-_Z10kernel_maxIfEvPKT_PS0_i
	.section	.text._Z13kernel_assignIdEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIdEvPT_S0_i,comdat
	.weak	_Z13kernel_assignIdEvPT_S0_i
	.type	_Z13kernel_assignIdEvPT_S0_i, @function
_Z13kernel_assignIdEvPT_S0_i:
.LFB5137:
	.cfi_startproc
	endbr64
	jmp	_ZL42__device_stub__Z13kernel_assignIdEvPT_S0_iPddi
	.cfi_endproc
.LFE5137:
	.size	_Z13kernel_assignIdEvPT_S0_i, .-_Z13kernel_assignIdEvPT_S0_i
	.section	.text._Z11kernel_copyIdEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIdEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyIdEvPKT_PS0_i
	.type	_Z11kernel_copyIdEvPKT_PS0_i, @function
_Z11kernel_copyIdEvPKT_PS0_i:
.LFB5138:
	.cfi_startproc
	endbr64
	jmp	_ZL42__device_stub__Z11kernel_copyIdEvPKT_PS0_iPKdPdi
	.cfi_endproc
.LFE5138:
	.size	_Z11kernel_copyIdEvPKT_PS0_i, .-_Z11kernel_copyIdEvPKT_PS0_i
	.section	.text._Z10kernel_addIdEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_addIdEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_addIdEvPKT_S2_PS0_i
	.type	_Z10kernel_addIdEvPKT_S2_PS0_i, @function
_Z10kernel_addIdEvPKT_S2_PS0_i:
.LFB5139:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z10kernel_addIdEvPKT_S2_PS0_iPKdS0_Pdi
	.cfi_endproc
.LFE5139:
	.size	_Z10kernel_addIdEvPKT_S2_PS0_i, .-_Z10kernel_addIdEvPKT_S2_PS0_i
	.section	.text._Z10kernel_subIdEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_subIdEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_subIdEvPKT_S2_PS0_i
	.type	_Z10kernel_subIdEvPKT_S2_PS0_i, @function
_Z10kernel_subIdEvPKT_S2_PS0_i:
.LFB5140:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z10kernel_subIdEvPKT_S2_PS0_iPKdS0_Pdi
	.cfi_endproc
.LFE5140:
	.size	_Z10kernel_subIdEvPKT_S2_PS0_i, .-_Z10kernel_subIdEvPKT_S2_PS0_i
	.section	.text._Z10kernel_mulIdEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_mulIdEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_mulIdEvPKT_S2_PS0_i
	.type	_Z10kernel_mulIdEvPKT_S2_PS0_i, @function
_Z10kernel_mulIdEvPKT_S2_PS0_i:
.LFB5141:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z10kernel_mulIdEvPKT_S2_PS0_iPKdS0_Pdi
	.cfi_endproc
.LFE5141:
	.size	_Z10kernel_mulIdEvPKT_S2_PS0_i, .-_Z10kernel_mulIdEvPKT_S2_PS0_i
	.section	.text._Z10kernel_divIdEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_divIdEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_divIdEvPKT_S2_PS0_i
	.type	_Z10kernel_divIdEvPKT_S2_PS0_i, @function
_Z10kernel_divIdEvPKT_S2_PS0_i:
.LFB5142:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z10kernel_divIdEvPKT_S2_PS0_iPKdS0_Pdi
	.cfi_endproc
.LFE5142:
	.size	_Z10kernel_divIdEvPKT_S2_PS0_i, .-_Z10kernel_divIdEvPKT_S2_PS0_i
	.section	.text._Z10kernel_powIdEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_powIdEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_powIdEvPKT_S2_PS0_i
	.type	_Z10kernel_powIdEvPKT_S2_PS0_i, @function
_Z10kernel_powIdEvPKT_S2_PS0_i:
.LFB5143:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z10kernel_powIdEvPKT_S2_PS0_iPKdS0_Pdi
	.cfi_endproc
.LFE5143:
	.size	_Z10kernel_powIdEvPKT_S2_PS0_i, .-_Z10kernel_powIdEvPKT_S2_PS0_i
	.section	.text._Z17kernel_add_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_add_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_add_scalarIdEvPKT_PS0_S0_i
	.type	_Z17kernel_add_scalarIdEvPKT_PS0_S0_i, @function
_Z17kernel_add_scalarIdEvPKT_PS0_S0_i:
.LFB5144:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_add_scalarIdEvPKT_PS0_S0_iPKdPddi
	.cfi_endproc
.LFE5144:
	.size	_Z17kernel_add_scalarIdEvPKT_PS0_S0_i, .-_Z17kernel_add_scalarIdEvPKT_PS0_S0_i
	.section	.text._Z17kernel_sub_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i
	.type	_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i, @function
_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i:
.LFB5145:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_sub_scalarIdEvPKT_PS0_S0_iPKdPddi
	.cfi_endproc
.LFE5145:
	.size	_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i, .-_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i
	.section	.text._Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i
	.type	_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i, @function
_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i:
.LFB5146:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_iPKdPddi
	.cfi_endproc
.LFE5146:
	.size	_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i, .-_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i
	.section	.text._Z17kernel_mul_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i
	.type	_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i, @function
_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i:
.LFB5147:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_mul_scalarIdEvPKT_PS0_S0_iPKdPddi
	.cfi_endproc
.LFE5147:
	.size	_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i, .-_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i
	.section	.text._Z17kernel_div_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_div_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_div_scalarIdEvPKT_PS0_S0_i
	.type	_Z17kernel_div_scalarIdEvPKT_PS0_S0_i, @function
_Z17kernel_div_scalarIdEvPKT_PS0_S0_i:
.LFB5148:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_div_scalarIdEvPKT_PS0_S0_iPKdPddi
	.cfi_endproc
.LFE5148:
	.size	_Z17kernel_div_scalarIdEvPKT_PS0_S0_i, .-_Z17kernel_div_scalarIdEvPKT_PS0_S0_i
	.section	.text._Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i
	.type	_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i, @function
_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i:
.LFB5149:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21kernel_div_scalar_invIdEvPKT_PS0_S0_iPKdPddi
	.cfi_endproc
.LFE5149:
	.size	_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i, .-_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i
	.section	.text._Z17kernel_pow_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i
	.type	_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i, @function
_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i:
.LFB5150:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_pow_scalarIdEvPKT_PS0_S0_iPKdPddi
	.cfi_endproc
.LFE5150:
	.size	_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i, .-_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i
	.section	.text._Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i
	.type	_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i, @function
_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i:
.LFB5151:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_iPKdPddi
	.cfi_endproc
.LFE5151:
	.size	_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i, .-_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i
	.section	.text._Z12kernel_equalIdEvPKT_S2_PS0_i,"axG",@progbits,_Z12kernel_equalIdEvPKT_S2_PS0_i,comdat
	.weak	_Z12kernel_equalIdEvPKT_S2_PS0_i
	.type	_Z12kernel_equalIdEvPKT_S2_PS0_i, @function
_Z12kernel_equalIdEvPKT_S2_PS0_i:
.LFB5152:
	.cfi_startproc
	endbr64
	jmp	_ZL46__device_stub__Z12kernel_equalIdEvPKT_S2_PS0_iPKdS0_Pdi
	.cfi_endproc
.LFE5152:
	.size	_Z12kernel_equalIdEvPKT_S2_PS0_i, .-_Z12kernel_equalIdEvPKT_S2_PS0_i
	.section	.text._Z14kernel_greaterIdEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_greaterIdEvPKT_S2_PS0_i,comdat
	.weak	_Z14kernel_greaterIdEvPKT_S2_PS0_i
	.type	_Z14kernel_greaterIdEvPKT_S2_PS0_i, @function
_Z14kernel_greaterIdEvPKT_S2_PS0_i:
.LFB5153:
	.cfi_startproc
	endbr64
	jmp	_ZL48__device_stub__Z14kernel_greaterIdEvPKT_S2_PS0_iPKdS0_Pdi
	.cfi_endproc
.LFE5153:
	.size	_Z14kernel_greaterIdEvPKT_S2_PS0_i, .-_Z14kernel_greaterIdEvPKT_S2_PS0_i
	.section	.text._Z11kernel_lessIdEvPKT_S2_PS0_i,"axG",@progbits,_Z11kernel_lessIdEvPKT_S2_PS0_i,comdat
	.weak	_Z11kernel_lessIdEvPKT_S2_PS0_i
	.type	_Z11kernel_lessIdEvPKT_S2_PS0_i, @function
_Z11kernel_lessIdEvPKT_S2_PS0_i:
.LFB5154:
	.cfi_startproc
	endbr64
	jmp	_ZL45__device_stub__Z11kernel_lessIdEvPKT_S2_PS0_iPKdS0_Pdi
	.cfi_endproc
.LFE5154:
	.size	_Z11kernel_lessIdEvPKT_S2_PS0_i, .-_Z11kernel_lessIdEvPKT_S2_PS0_i
	.section	.text._Z20kernel_greater_equalIdEvPKT_S2_PS0_i,"axG",@progbits,_Z20kernel_greater_equalIdEvPKT_S2_PS0_i,comdat
	.weak	_Z20kernel_greater_equalIdEvPKT_S2_PS0_i
	.type	_Z20kernel_greater_equalIdEvPKT_S2_PS0_i, @function
_Z20kernel_greater_equalIdEvPKT_S2_PS0_i:
.LFB5155:
	.cfi_startproc
	endbr64
	jmp	_ZL54__device_stub__Z20kernel_greater_equalIdEvPKT_S2_PS0_iPKdS0_Pdi
	.cfi_endproc
.LFE5155:
	.size	_Z20kernel_greater_equalIdEvPKT_S2_PS0_i, .-_Z20kernel_greater_equalIdEvPKT_S2_PS0_i
	.section	.text._Z17kernel_less_equalIdEvPKT_S2_PS0_i,"axG",@progbits,_Z17kernel_less_equalIdEvPKT_S2_PS0_i,comdat
	.weak	_Z17kernel_less_equalIdEvPKT_S2_PS0_i
	.type	_Z17kernel_less_equalIdEvPKT_S2_PS0_i, @function
_Z17kernel_less_equalIdEvPKT_S2_PS0_i:
.LFB5156:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_less_equalIdEvPKT_S2_PS0_iPKdS0_Pdi
	.cfi_endproc
.LFE5156:
	.size	_Z17kernel_less_equalIdEvPKT_S2_PS0_i, .-_Z17kernel_less_equalIdEvPKT_S2_PS0_i
	.section	.text._Z19kernel_equal_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i
	.type	_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i, @function
_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i:
.LFB5157:
	.cfi_startproc
	endbr64
	jmp	_ZL53__device_stub__Z19kernel_equal_scalarIdEvPKT_PS0_S0_iPKdPddi
	.cfi_endproc
.LFE5157:
	.size	_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i, .-_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i
	.section	.text._Z21kernel_greater_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i
	.type	_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i, @function
_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i:
.LFB5158:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21kernel_greater_scalarIdEvPKT_PS0_S0_iPKdPddi
	.cfi_endproc
.LFE5158:
	.size	_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i, .-_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i
	.section	.text._Z18kernel_less_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z18kernel_less_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z18kernel_less_scalarIdEvPKT_PS0_S0_i
	.type	_Z18kernel_less_scalarIdEvPKT_PS0_S0_i, @function
_Z18kernel_less_scalarIdEvPKT_PS0_S0_i:
.LFB5159:
	.cfi_startproc
	endbr64
	jmp	_ZL52__device_stub__Z18kernel_less_scalarIdEvPKT_PS0_S0_iPKdPddi
	.cfi_endproc
.LFE5159:
	.size	_Z18kernel_less_scalarIdEvPKT_PS0_S0_i, .-_Z18kernel_less_scalarIdEvPKT_PS0_S0_i
	.section	.text._Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i
	.type	_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i, @function
_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i:
.LFB5160:
	.cfi_startproc
	endbr64
	jmp	_ZL61__device_stub__Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_iPKdPddi
	.cfi_endproc
.LFE5160:
	.size	_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i, .-_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i
	.section	.text._Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i
	.type	_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i, @function
_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i:
.LFB5161:
	.cfi_startproc
	endbr64
	jmp	_ZL58__device_stub__Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_iPKdPddi
	.cfi_endproc
.LFE5161:
	.size	_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i, .-_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i
	.section	.text._Z14kernel_replaceIdEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_replaceIdEvPKT_S2_PS0_i,comdat
	.weak	_Z14kernel_replaceIdEvPKT_S2_PS0_i
	.type	_Z14kernel_replaceIdEvPKT_S2_PS0_i, @function
_Z14kernel_replaceIdEvPKT_S2_PS0_i:
.LFB5162:
	.cfi_startproc
	endbr64
	jmp	_ZL48__device_stub__Z14kernel_replaceIdEvPKT_S2_PS0_iPKdS0_Pdi
	.cfi_endproc
.LFE5162:
	.size	_Z14kernel_replaceIdEvPKT_S2_PS0_i, .-_Z14kernel_replaceIdEvPKT_S2_PS0_i
	.section	.text._Z21kernel_replace_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i
	.type	_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i, @function
_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i:
.LFB5163:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21kernel_replace_scalarIdEvPKT_PS0_S0_iPKdPddi
	.cfi_endproc
.LFE5163:
	.size	_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i, .-_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i
	.section	.text._Z10kernel_sumIdEvPKT_PS0_i,"axG",@progbits,_Z10kernel_sumIdEvPKT_PS0_i,comdat
	.weak	_Z10kernel_sumIdEvPKT_PS0_i
	.type	_Z10kernel_sumIdEvPKT_PS0_i, @function
_Z10kernel_sumIdEvPKT_PS0_i:
.LFB5164:
	.cfi_startproc
	endbr64
	jmp	_ZL41__device_stub__Z10kernel_sumIdEvPKT_PS0_iPKdPdi
	.cfi_endproc
.LFE5164:
	.size	_Z10kernel_sumIdEvPKT_PS0_i, .-_Z10kernel_sumIdEvPKT_PS0_i
	.section	.text._Z10kernel_minIdEvPKT_PS0_i,"axG",@progbits,_Z10kernel_minIdEvPKT_PS0_i,comdat
	.weak	_Z10kernel_minIdEvPKT_PS0_i
	.type	_Z10kernel_minIdEvPKT_PS0_i, @function
_Z10kernel_minIdEvPKT_PS0_i:
.LFB5165:
	.cfi_startproc
	endbr64
	jmp	_ZL41__device_stub__Z10kernel_minIdEvPKT_PS0_iPKdPdi
	.cfi_endproc
.LFE5165:
	.size	_Z10kernel_minIdEvPKT_PS0_i, .-_Z10kernel_minIdEvPKT_PS0_i
	.section	.text._Z10kernel_maxIdEvPKT_PS0_i,"axG",@progbits,_Z10kernel_maxIdEvPKT_PS0_i,comdat
	.weak	_Z10kernel_maxIdEvPKT_PS0_i
	.type	_Z10kernel_maxIdEvPKT_PS0_i, @function
_Z10kernel_maxIdEvPKT_PS0_i:
.LFB5166:
	.cfi_startproc
	endbr64
	jmp	_ZL41__device_stub__Z10kernel_maxIdEvPKT_PS0_iPKdPdi
	.cfi_endproc
.LFE5166:
	.size	_Z10kernel_maxIdEvPKT_PS0_i, .-_Z10kernel_maxIdEvPKT_PS0_i
	.section	.text._Z13kernel_assignIiEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIiEvPT_S0_i,comdat
	.weak	_Z13kernel_assignIiEvPT_S0_i
	.type	_Z13kernel_assignIiEvPT_S0_i, @function
_Z13kernel_assignIiEvPT_S0_i:
.LFB5190:
	.cfi_startproc
	endbr64
	jmp	_ZL42__device_stub__Z13kernel_assignIiEvPT_S0_iPiii
	.cfi_endproc
.LFE5190:
	.size	_Z13kernel_assignIiEvPT_S0_i, .-_Z13kernel_assignIiEvPT_S0_i
	.section	.text._Z11kernel_copyIiEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIiEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyIiEvPKT_PS0_i
	.type	_Z11kernel_copyIiEvPKT_PS0_i, @function
_Z11kernel_copyIiEvPKT_PS0_i:
.LFB5191:
	.cfi_startproc
	endbr64
	jmp	_ZL42__device_stub__Z11kernel_copyIiEvPKT_PS0_iPKiPii
	.cfi_endproc
.LFE5191:
	.size	_Z11kernel_copyIiEvPKT_PS0_i, .-_Z11kernel_copyIiEvPKT_PS0_i
	.section	.text._Z10kernel_addIiEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_addIiEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_addIiEvPKT_S2_PS0_i
	.type	_Z10kernel_addIiEvPKT_S2_PS0_i, @function
_Z10kernel_addIiEvPKT_S2_PS0_i:
.LFB5192:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z10kernel_addIiEvPKT_S2_PS0_iPKiS0_Pii
	.cfi_endproc
.LFE5192:
	.size	_Z10kernel_addIiEvPKT_S2_PS0_i, .-_Z10kernel_addIiEvPKT_S2_PS0_i
	.section	.text._Z10kernel_subIiEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_subIiEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_subIiEvPKT_S2_PS0_i
	.type	_Z10kernel_subIiEvPKT_S2_PS0_i, @function
_Z10kernel_subIiEvPKT_S2_PS0_i:
.LFB5193:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z10kernel_subIiEvPKT_S2_PS0_iPKiS0_Pii
	.cfi_endproc
.LFE5193:
	.size	_Z10kernel_subIiEvPKT_S2_PS0_i, .-_Z10kernel_subIiEvPKT_S2_PS0_i
	.section	.text._Z10kernel_mulIiEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_mulIiEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_mulIiEvPKT_S2_PS0_i
	.type	_Z10kernel_mulIiEvPKT_S2_PS0_i, @function
_Z10kernel_mulIiEvPKT_S2_PS0_i:
.LFB5194:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z10kernel_mulIiEvPKT_S2_PS0_iPKiS0_Pii
	.cfi_endproc
.LFE5194:
	.size	_Z10kernel_mulIiEvPKT_S2_PS0_i, .-_Z10kernel_mulIiEvPKT_S2_PS0_i
	.section	.text._Z10kernel_divIiEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_divIiEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_divIiEvPKT_S2_PS0_i
	.type	_Z10kernel_divIiEvPKT_S2_PS0_i, @function
_Z10kernel_divIiEvPKT_S2_PS0_i:
.LFB5195:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z10kernel_divIiEvPKT_S2_PS0_iPKiS0_Pii
	.cfi_endproc
.LFE5195:
	.size	_Z10kernel_divIiEvPKT_S2_PS0_i, .-_Z10kernel_divIiEvPKT_S2_PS0_i
	.section	.text._Z10kernel_powIiEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_powIiEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_powIiEvPKT_S2_PS0_i
	.type	_Z10kernel_powIiEvPKT_S2_PS0_i, @function
_Z10kernel_powIiEvPKT_S2_PS0_i:
.LFB5196:
	.cfi_startproc
	endbr64
	jmp	_ZL44__device_stub__Z10kernel_powIiEvPKT_S2_PS0_iPKiS0_Pii
	.cfi_endproc
.LFE5196:
	.size	_Z10kernel_powIiEvPKT_S2_PS0_i, .-_Z10kernel_powIiEvPKT_S2_PS0_i
	.section	.text._Z17kernel_add_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_add_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_add_scalarIiEvPKT_PS0_S0_i
	.type	_Z17kernel_add_scalarIiEvPKT_PS0_S0_i, @function
_Z17kernel_add_scalarIiEvPKT_PS0_S0_i:
.LFB5197:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_add_scalarIiEvPKT_PS0_S0_iPKiPiii
	.cfi_endproc
.LFE5197:
	.size	_Z17kernel_add_scalarIiEvPKT_PS0_S0_i, .-_Z17kernel_add_scalarIiEvPKT_PS0_S0_i
	.section	.text._Z17kernel_sub_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i
	.type	_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i, @function
_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i:
.LFB5198:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_sub_scalarIiEvPKT_PS0_S0_iPKiPiii
	.cfi_endproc
.LFE5198:
	.size	_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i, .-_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i
	.section	.text._Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i
	.type	_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i, @function
_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i:
.LFB5199:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_iPKiPiii
	.cfi_endproc
.LFE5199:
	.size	_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i, .-_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i
	.section	.text._Z17kernel_mul_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i
	.type	_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i, @function
_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i:
.LFB5200:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_mul_scalarIiEvPKT_PS0_S0_iPKiPiii
	.cfi_endproc
.LFE5200:
	.size	_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i, .-_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i
	.section	.text._Z17kernel_div_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_div_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_div_scalarIiEvPKT_PS0_S0_i
	.type	_Z17kernel_div_scalarIiEvPKT_PS0_S0_i, @function
_Z17kernel_div_scalarIiEvPKT_PS0_S0_i:
.LFB5201:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_div_scalarIiEvPKT_PS0_S0_iPKiPiii
	.cfi_endproc
.LFE5201:
	.size	_Z17kernel_div_scalarIiEvPKT_PS0_S0_i, .-_Z17kernel_div_scalarIiEvPKT_PS0_S0_i
	.section	.text._Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i
	.type	_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i, @function
_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i:
.LFB5202:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21kernel_div_scalar_invIiEvPKT_PS0_S0_iPKiPiii
	.cfi_endproc
.LFE5202:
	.size	_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i, .-_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i
	.section	.text._Z17kernel_pow_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i
	.type	_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i, @function
_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i:
.LFB5203:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_pow_scalarIiEvPKT_PS0_S0_iPKiPiii
	.cfi_endproc
.LFE5203:
	.size	_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i, .-_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i
	.section	.text._Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i
	.type	_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i, @function
_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i:
.LFB5204:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_iPKiPiii
	.cfi_endproc
.LFE5204:
	.size	_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i, .-_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i
	.section	.text._Z12kernel_equalIiEvPKT_S2_PS0_i,"axG",@progbits,_Z12kernel_equalIiEvPKT_S2_PS0_i,comdat
	.weak	_Z12kernel_equalIiEvPKT_S2_PS0_i
	.type	_Z12kernel_equalIiEvPKT_S2_PS0_i, @function
_Z12kernel_equalIiEvPKT_S2_PS0_i:
.LFB5205:
	.cfi_startproc
	endbr64
	jmp	_ZL46__device_stub__Z12kernel_equalIiEvPKT_S2_PS0_iPKiS0_Pii
	.cfi_endproc
.LFE5205:
	.size	_Z12kernel_equalIiEvPKT_S2_PS0_i, .-_Z12kernel_equalIiEvPKT_S2_PS0_i
	.section	.text._Z14kernel_greaterIiEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_greaterIiEvPKT_S2_PS0_i,comdat
	.weak	_Z14kernel_greaterIiEvPKT_S2_PS0_i
	.type	_Z14kernel_greaterIiEvPKT_S2_PS0_i, @function
_Z14kernel_greaterIiEvPKT_S2_PS0_i:
.LFB5206:
	.cfi_startproc
	endbr64
	jmp	_ZL48__device_stub__Z14kernel_greaterIiEvPKT_S2_PS0_iPKiS0_Pii
	.cfi_endproc
.LFE5206:
	.size	_Z14kernel_greaterIiEvPKT_S2_PS0_i, .-_Z14kernel_greaterIiEvPKT_S2_PS0_i
	.section	.text._Z11kernel_lessIiEvPKT_S2_PS0_i,"axG",@progbits,_Z11kernel_lessIiEvPKT_S2_PS0_i,comdat
	.weak	_Z11kernel_lessIiEvPKT_S2_PS0_i
	.type	_Z11kernel_lessIiEvPKT_S2_PS0_i, @function
_Z11kernel_lessIiEvPKT_S2_PS0_i:
.LFB5207:
	.cfi_startproc
	endbr64
	jmp	_ZL45__device_stub__Z11kernel_lessIiEvPKT_S2_PS0_iPKiS0_Pii
	.cfi_endproc
.LFE5207:
	.size	_Z11kernel_lessIiEvPKT_S2_PS0_i, .-_Z11kernel_lessIiEvPKT_S2_PS0_i
	.section	.text._Z20kernel_greater_equalIiEvPKT_S2_PS0_i,"axG",@progbits,_Z20kernel_greater_equalIiEvPKT_S2_PS0_i,comdat
	.weak	_Z20kernel_greater_equalIiEvPKT_S2_PS0_i
	.type	_Z20kernel_greater_equalIiEvPKT_S2_PS0_i, @function
_Z20kernel_greater_equalIiEvPKT_S2_PS0_i:
.LFB5208:
	.cfi_startproc
	endbr64
	jmp	_ZL54__device_stub__Z20kernel_greater_equalIiEvPKT_S2_PS0_iPKiS0_Pii
	.cfi_endproc
.LFE5208:
	.size	_Z20kernel_greater_equalIiEvPKT_S2_PS0_i, .-_Z20kernel_greater_equalIiEvPKT_S2_PS0_i
	.section	.text._Z17kernel_less_equalIiEvPKT_S2_PS0_i,"axG",@progbits,_Z17kernel_less_equalIiEvPKT_S2_PS0_i,comdat
	.weak	_Z17kernel_less_equalIiEvPKT_S2_PS0_i
	.type	_Z17kernel_less_equalIiEvPKT_S2_PS0_i, @function
_Z17kernel_less_equalIiEvPKT_S2_PS0_i:
.LFB5209:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z17kernel_less_equalIiEvPKT_S2_PS0_iPKiS0_Pii
	.cfi_endproc
.LFE5209:
	.size	_Z17kernel_less_equalIiEvPKT_S2_PS0_i, .-_Z17kernel_less_equalIiEvPKT_S2_PS0_i
	.section	.text._Z19kernel_equal_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i
	.type	_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i, @function
_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i:
.LFB5210:
	.cfi_startproc
	endbr64
	jmp	_ZL53__device_stub__Z19kernel_equal_scalarIiEvPKT_PS0_S0_iPKiPiii
	.cfi_endproc
.LFE5210:
	.size	_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i, .-_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i
	.section	.text._Z21kernel_greater_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i
	.type	_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i, @function
_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i:
.LFB5211:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21kernel_greater_scalarIiEvPKT_PS0_S0_iPKiPiii
	.cfi_endproc
.LFE5211:
	.size	_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i, .-_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i
	.section	.text._Z18kernel_less_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z18kernel_less_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z18kernel_less_scalarIiEvPKT_PS0_S0_i
	.type	_Z18kernel_less_scalarIiEvPKT_PS0_S0_i, @function
_Z18kernel_less_scalarIiEvPKT_PS0_S0_i:
.LFB5212:
	.cfi_startproc
	endbr64
	jmp	_ZL52__device_stub__Z18kernel_less_scalarIiEvPKT_PS0_S0_iPKiPiii
	.cfi_endproc
.LFE5212:
	.size	_Z18kernel_less_scalarIiEvPKT_PS0_S0_i, .-_Z18kernel_less_scalarIiEvPKT_PS0_S0_i
	.section	.text._Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i
	.type	_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i, @function
_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i:
.LFB5213:
	.cfi_startproc
	endbr64
	jmp	_ZL61__device_stub__Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_iPKiPiii
	.cfi_endproc
.LFE5213:
	.size	_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i, .-_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i
	.section	.text._Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i
	.type	_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i, @function
_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i:
.LFB5214:
	.cfi_startproc
	endbr64
	jmp	_ZL58__device_stub__Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_iPKiPiii
	.cfi_endproc
.LFE5214:
	.size	_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i, .-_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i
	.section	.text._Z14kernel_replaceIiEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_replaceIiEvPKT_S2_PS0_i,comdat
	.weak	_Z14kernel_replaceIiEvPKT_S2_PS0_i
	.type	_Z14kernel_replaceIiEvPKT_S2_PS0_i, @function
_Z14kernel_replaceIiEvPKT_S2_PS0_i:
.LFB5215:
	.cfi_startproc
	endbr64
	jmp	_ZL48__device_stub__Z14kernel_replaceIiEvPKT_S2_PS0_iPKiS0_Pii
	.cfi_endproc
.LFE5215:
	.size	_Z14kernel_replaceIiEvPKT_S2_PS0_i, .-_Z14kernel_replaceIiEvPKT_S2_PS0_i
	.section	.text._Z21kernel_replace_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i
	.type	_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i, @function
_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i:
.LFB5216:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21kernel_replace_scalarIiEvPKT_PS0_S0_iPKiPiii
	.cfi_endproc
.LFE5216:
	.size	_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i, .-_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i
	.section	.text._Z10kernel_sumIiEvPKT_PS0_i,"axG",@progbits,_Z10kernel_sumIiEvPKT_PS0_i,comdat
	.weak	_Z10kernel_sumIiEvPKT_PS0_i
	.type	_Z10kernel_sumIiEvPKT_PS0_i, @function
_Z10kernel_sumIiEvPKT_PS0_i:
.LFB5217:
	.cfi_startproc
	endbr64
	jmp	_ZL41__device_stub__Z10kernel_sumIiEvPKT_PS0_iPKiPii
	.cfi_endproc
.LFE5217:
	.size	_Z10kernel_sumIiEvPKT_PS0_i, .-_Z10kernel_sumIiEvPKT_PS0_i
	.section	.text._Z10kernel_minIiEvPKT_PS0_i,"axG",@progbits,_Z10kernel_minIiEvPKT_PS0_i,comdat
	.weak	_Z10kernel_minIiEvPKT_PS0_i
	.type	_Z10kernel_minIiEvPKT_PS0_i, @function
_Z10kernel_minIiEvPKT_PS0_i:
.LFB5218:
	.cfi_startproc
	endbr64
	jmp	_ZL41__device_stub__Z10kernel_minIiEvPKT_PS0_iPKiPii
	.cfi_endproc
.LFE5218:
	.size	_Z10kernel_minIiEvPKT_PS0_i, .-_Z10kernel_minIiEvPKT_PS0_i
	.section	.text._Z10kernel_maxIiEvPKT_PS0_i,"axG",@progbits,_Z10kernel_maxIiEvPKT_PS0_i,comdat
	.weak	_Z10kernel_maxIiEvPKT_PS0_i
	.type	_Z10kernel_maxIiEvPKT_PS0_i, @function
_Z10kernel_maxIiEvPKT_PS0_i:
.LFB5219:
	.cfi_startproc
	endbr64
	jmp	_ZL41__device_stub__Z10kernel_maxIiEvPKT_PS0_iPKiPii
	.cfi_endproc
.LFE5219:
	.size	_Z10kernel_maxIiEvPKT_PS0_i, .-_Z10kernel_maxIiEvPKT_PS0_i
	.section	.text._Z13kernel_assignItEvPT_S0_i,"axG",@progbits,_Z13kernel_assignItEvPT_S0_i,comdat
	.weak	_Z13kernel_assignItEvPT_S0_i
	.type	_Z13kernel_assignItEvPT_S0_i, @function
_Z13kernel_assignItEvPT_S0_i:
.LFB5237:
	.cfi_startproc
	endbr64
	movzwl	%si, %esi
	jmp	_ZL42__device_stub__Z13kernel_assignItEvPT_S0_iPtti
	.cfi_endproc
.LFE5237:
	.size	_Z13kernel_assignItEvPT_S0_i, .-_Z13kernel_assignItEvPT_S0_i
	.section	.text._Z11kernel_copyItEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyItEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyItEvPKT_PS0_i
	.type	_Z11kernel_copyItEvPKT_PS0_i, @function
_Z11kernel_copyItEvPKT_PS0_i:
.LFB5238:
	.cfi_startproc
	endbr64
	jmp	_ZL42__device_stub__Z11kernel_copyItEvPKT_PS0_iPKtPti
	.cfi_endproc
.LFE5238:
	.size	_Z11kernel_copyItEvPKT_PS0_i, .-_Z11kernel_copyItEvPKT_PS0_i
	.section	.text._Z13kernel_assignIjEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIjEvPT_S0_i,comdat
	.weak	_Z13kernel_assignIjEvPT_S0_i
	.type	_Z13kernel_assignIjEvPT_S0_i, @function
_Z13kernel_assignIjEvPT_S0_i:
.LFB5239:
	.cfi_startproc
	endbr64
	jmp	_ZL42__device_stub__Z13kernel_assignIjEvPT_S0_iPjji
	.cfi_endproc
.LFE5239:
	.size	_Z13kernel_assignIjEvPT_S0_i, .-_Z13kernel_assignIjEvPT_S0_i
	.section	.text._Z11kernel_copyIjEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIjEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyIjEvPKT_PS0_i
	.type	_Z11kernel_copyIjEvPKT_PS0_i, @function
_Z11kernel_copyIjEvPKT_PS0_i:
.LFB5240:
	.cfi_startproc
	endbr64
	jmp	_ZL42__device_stub__Z11kernel_copyIjEvPKT_PS0_iPKjPji
	.cfi_endproc
.LFE5240:
	.size	_Z11kernel_copyIjEvPKT_PS0_i, .-_Z11kernel_copyIjEvPKT_PS0_i
	.section	.text._Z13kernel_assignIhEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIhEvPT_S0_i,comdat
	.weak	_Z13kernel_assignIhEvPT_S0_i
	.type	_Z13kernel_assignIhEvPT_S0_i, @function
_Z13kernel_assignIhEvPT_S0_i:
.LFB5241:
	.cfi_startproc
	endbr64
	movzbl	%sil, %esi
	jmp	_ZL42__device_stub__Z13kernel_assignIhEvPT_S0_iPhhi
	.cfi_endproc
.LFE5241:
	.size	_Z13kernel_assignIhEvPT_S0_i, .-_Z13kernel_assignIhEvPT_S0_i
	.section	.text._Z11kernel_copyIhEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIhEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyIhEvPKT_PS0_i
	.type	_Z11kernel_copyIhEvPKT_PS0_i, @function
_Z11kernel_copyIhEvPKT_PS0_i:
.LFB5242:
	.cfi_startproc
	endbr64
	jmp	_ZL42__device_stub__Z11kernel_copyIhEvPKT_PS0_iPKhPhi
	.cfi_endproc
.LFE5242:
	.size	_Z11kernel_copyIhEvPKT_PS0_i, .-_Z11kernel_copyIhEvPKT_PS0_i
	.section	.text._Z13kernel_assignIsEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIsEvPT_S0_i,comdat
	.weak	_Z13kernel_assignIsEvPT_S0_i
	.type	_Z13kernel_assignIsEvPT_S0_i, @function
_Z13kernel_assignIsEvPT_S0_i:
.LFB5243:
	.cfi_startproc
	endbr64
	movswl	%si, %esi
	jmp	_ZL42__device_stub__Z13kernel_assignIsEvPT_S0_iPssi
	.cfi_endproc
.LFE5243:
	.size	_Z13kernel_assignIsEvPT_S0_i, .-_Z13kernel_assignIsEvPT_S0_i
	.section	.text._Z11kernel_copyIsEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIsEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyIsEvPKT_PS0_i
	.type	_Z11kernel_copyIsEvPKT_PS0_i, @function
_Z11kernel_copyIsEvPKT_PS0_i:
.LFB5244:
	.cfi_startproc
	endbr64
	jmp	_ZL42__device_stub__Z11kernel_copyIsEvPKT_PS0_iPKsPsi
	.cfi_endproc
.LFE5244:
	.size	_Z11kernel_copyIsEvPKT_PS0_i, .-_Z11kernel_copyIsEvPKT_PS0_i
	.section	.text._Z13kernel_assignIcEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIcEvPT_S0_i,comdat
	.weak	_Z13kernel_assignIcEvPT_S0_i
	.type	_Z13kernel_assignIcEvPT_S0_i, @function
_Z13kernel_assignIcEvPT_S0_i:
.LFB5245:
	.cfi_startproc
	endbr64
	movsbl	%sil, %esi
	jmp	_ZL42__device_stub__Z13kernel_assignIcEvPT_S0_iPcci
	.cfi_endproc
.LFE5245:
	.size	_Z13kernel_assignIcEvPT_S0_i, .-_Z13kernel_assignIcEvPT_S0_i
	.section	.text._Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i,"axG",@progbits,_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i,comdat
	.weak	_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i
	.type	_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i, @function
_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i:
.LFB5173:
	.cfi_startproc
	endbr64
	jmp	_ZL56__device_stub__Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_iPKdS0_PdS1_S0_i
	.cfi_endproc
.LFE5173:
	.size	_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i, .-_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i
	.section	.text._Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi,comdat
	.weak	_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi
	.type	_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi, @function
_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi:
.LFB5175:
	.cfi_startproc
	endbr64
	jmp	_ZL60__device_stub__Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdiPKdS0_PdS1_S0_i
	.cfi_endproc
.LFE5175:
	.size	_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi, .-_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi
	.section	.text._Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i,"axG",@progbits,_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i,comdat
	.weak	_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i
	.type	_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i, @function
_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i:
.LFB5226:
	.cfi_startproc
	endbr64
	jmp	_ZL56__device_stub__Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_iPKiS0_PiS1_S0_i
	.cfi_endproc
.LFE5226:
	.size	_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i, .-_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i
	.section	.text._Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi,comdat
	.weak	_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi
	.type	_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi, @function
_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi:
.LFB5228:
	.cfi_startproc
	endbr64
	jmp	_ZL60__device_stub__Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdiPKiS0_PiS1_PKdi
	.cfi_endproc
.LFE5228:
	.size	_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi, .-_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi
	.section	.text._Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i,"axG",@progbits,_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i,comdat
	.weak	_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i
	.type	_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i, @function
_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i:
.LFB5121:
	.cfi_startproc
	endbr64
	jmp	_ZL56__device_stub__Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_iPKfS0_PfS1_S0_i
	.cfi_endproc
.LFE5121:
	.size	_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i, .-_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i
	.section	.text._Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi,comdat
	.weak	_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi
	.type	_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi, @function
_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi:
.LFB5123:
	.cfi_startproc
	endbr64
	jmp	_ZL60__device_stub__Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdiPKfS0_PfS1_PKdi
	.cfi_endproc
.LFE5123:
	.size	_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi, .-_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi
	.section	.text._Z14kernel_grid_2dIiEvPT_S1_Pdii,"axG",@progbits,_Z14kernel_grid_2dIiEvPT_S1_Pdii,comdat
	.weak	_Z14kernel_grid_2dIiEvPT_S1_Pdii
	.type	_Z14kernel_grid_2dIiEvPT_S1_Pdii, @function
_Z14kernel_grid_2dIiEvPT_S1_Pdii:
.LFB5224:
	.cfi_startproc
	endbr64
	jmp	_ZL46__device_stub__Z14kernel_grid_2dIiEvPT_S1_PdiiPiS_Pdii
	.cfi_endproc
.LFE5224:
	.size	_Z14kernel_grid_2dIiEvPT_S1_Pdii, .-_Z14kernel_grid_2dIiEvPT_S1_Pdii
	.section	.text._Z16kernel_gradientzIfEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientzIfEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientzIfEvPKT_PS0_iii
	.type	_Z16kernel_gradientzIfEvPKT_PS0_iii, @function
_Z16kernel_gradientzIfEvPKT_PS0_iii:
.LFB5134:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z16kernel_gradientzIfEvPKT_PS0_iiiPKfPfiii
	.cfi_endproc
.LFE5134:
	.size	_Z16kernel_gradientzIfEvPKT_PS0_iii, .-_Z16kernel_gradientzIfEvPKT_PS0_iii
	.section	.text._Z16kernel_gradientxIiEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientxIiEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientxIiEvPKT_PS0_iii
	.type	_Z16kernel_gradientxIiEvPKT_PS0_iii, @function
_Z16kernel_gradientxIiEvPKT_PS0_iii:
.LFB5232:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z16kernel_gradientxIiEvPKT_PS0_iiiPKiPiiii
	.cfi_endproc
.LFE5232:
	.size	_Z16kernel_gradientxIiEvPKT_PS0_iii, .-_Z16kernel_gradientxIiEvPKT_PS0_iii
	.section	.text._Z16kernel_gradientyIiEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientyIiEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientyIiEvPKT_PS0_iii
	.type	_Z16kernel_gradientyIiEvPKT_PS0_iii, @function
_Z16kernel_gradientyIiEvPKT_PS0_iii:
.LFB5233:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z16kernel_gradientyIiEvPKT_PS0_iiiPKiPiiii
	.cfi_endproc
.LFE5233:
	.size	_Z16kernel_gradientyIiEvPKT_PS0_iii, .-_Z16kernel_gradientyIiEvPKT_PS0_iii
	.section	.text._Z16kernel_gradientxIdEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientxIdEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientxIdEvPKT_PS0_iii
	.type	_Z16kernel_gradientxIdEvPKT_PS0_iii, @function
_Z16kernel_gradientxIdEvPKT_PS0_iii:
.LFB5185:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z16kernel_gradientxIdEvPKT_PS0_iiiPKdPdiii
	.cfi_endproc
.LFE5185:
	.size	_Z16kernel_gradientxIdEvPKT_PS0_iii, .-_Z16kernel_gradientxIdEvPKT_PS0_iii
	.section	.text._Z16kernel_gradientyIdEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientyIdEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientyIdEvPKT_PS0_iii
	.type	_Z16kernel_gradientyIdEvPKT_PS0_iii, @function
_Z16kernel_gradientyIdEvPKT_PS0_iii:
.LFB5186:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z16kernel_gradientyIdEvPKT_PS0_iiiPKdPdiii
	.cfi_endproc
.LFE5186:
	.size	_Z16kernel_gradientyIdEvPKT_PS0_iii, .-_Z16kernel_gradientyIdEvPKT_PS0_iii
	.section	.text._Z16kernel_gradientzIdEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientzIdEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientzIdEvPKT_PS0_iii
	.type	_Z16kernel_gradientzIdEvPKT_PS0_iii, @function
_Z16kernel_gradientzIdEvPKT_PS0_iii:
.LFB5187:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z16kernel_gradientzIdEvPKT_PS0_iiiPKdPdiii
	.cfi_endproc
.LFE5187:
	.size	_Z16kernel_gradientzIdEvPKT_PS0_iii, .-_Z16kernel_gradientzIdEvPKT_PS0_iii
	.section	.text._Z16kernel_gradientzIiEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientzIiEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientzIiEvPKT_PS0_iii
	.type	_Z16kernel_gradientzIiEvPKT_PS0_iii, @function
_Z16kernel_gradientzIiEvPKT_PS0_iii:
.LFB5234:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z16kernel_gradientzIiEvPKT_PS0_iiiPKiPiiii
	.cfi_endproc
.LFE5234:
	.size	_Z16kernel_gradientzIiEvPKT_PS0_iii, .-_Z16kernel_gradientzIiEvPKT_PS0_iii
	.section	.text._Z14kernel_grid_2dIdEvPT_S1_Pdii,"axG",@progbits,_Z14kernel_grid_2dIdEvPT_S1_Pdii,comdat
	.weak	_Z14kernel_grid_2dIdEvPT_S1_Pdii
	.type	_Z14kernel_grid_2dIdEvPT_S1_Pdii, @function
_Z14kernel_grid_2dIdEvPT_S1_Pdii:
.LFB5171:
	.cfi_startproc
	endbr64
	jmp	_ZL46__device_stub__Z14kernel_grid_2dIdEvPT_S1_PdiiPdS_S_ii
	.cfi_endproc
.LFE5171:
	.size	_Z14kernel_grid_2dIdEvPT_S1_Pdii, .-_Z14kernel_grid_2dIdEvPT_S1_Pdii
	.section	.text._Z14kernel_grid_2dIfEvPT_S1_Pdii,"axG",@progbits,_Z14kernel_grid_2dIfEvPT_S1_Pdii,comdat
	.weak	_Z14kernel_grid_2dIfEvPT_S1_Pdii
	.type	_Z14kernel_grid_2dIfEvPT_S1_Pdii, @function
_Z14kernel_grid_2dIfEvPT_S1_Pdii:
.LFB5119:
	.cfi_startproc
	endbr64
	jmp	_ZL46__device_stub__Z14kernel_grid_2dIfEvPT_S1_PdiiPfS_Pdii
	.cfi_endproc
.LFE5119:
	.size	_Z14kernel_grid_2dIfEvPT_S1_Pdii, .-_Z14kernel_grid_2dIfEvPT_S1_Pdii
	.section	.text._Z16kernel_gradientxIfEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientxIfEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientxIfEvPKT_PS0_iii
	.type	_Z16kernel_gradientxIfEvPKT_PS0_iii, @function
_Z16kernel_gradientxIfEvPKT_PS0_iii:
.LFB5132:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z16kernel_gradientxIfEvPKT_PS0_iiiPKfPfiii
	.cfi_endproc
.LFE5132:
	.size	_Z16kernel_gradientxIfEvPKT_PS0_iii, .-_Z16kernel_gradientxIfEvPKT_PS0_iii
	.section	.text._Z16kernel_gradientyIfEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientyIfEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientyIfEvPKT_PS0_iii
	.type	_Z16kernel_gradientyIfEvPKT_PS0_iii, @function
_Z16kernel_gradientyIfEvPKT_PS0_iii:
.LFB5133:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z16kernel_gradientyIfEvPKT_PS0_iiiPKfPfiii
	.cfi_endproc
.LFE5133:
	.size	_Z16kernel_gradientyIfEvPKT_PS0_iii, .-_Z16kernel_gradientyIfEvPKT_PS0_iii
	.section	.text._Z13kernel_pad_2dIiEvPKT_PS0_iiiiii,"axG",@progbits,_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii,comdat
	.weak	_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii
	.type	_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii, @function
_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii:
.LFB5220:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z13kernel_pad_2dIiEvPKT_PS0_iiiiiiPKiPiiiiiii
	.cfi_endproc
.LFE5220:
	.size	_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii, .-_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii
	.section	.text._Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii,"axG",@progbits,_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii,comdat
	.weak	_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii
	.type	_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii, @function
_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii:
.LFB5221:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z15kernel_unpad_2dIiEvPKT_PS0_iiiiiiPKiPiiiiiii
	.cfi_endproc
.LFE5221:
	.size	_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii, .-_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii
	.section	.text._Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i,"axG",@progbits,_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i,comdat
	.weak	_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i
	.type	_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i, @function
_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i:
.LFB5122:
	.cfi_startproc
	endbr64
	jmp	_ZL62__device_stub__Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_iPKfS0_S0_PfS1_S1_S0_i
	.cfi_endproc
.LFE5122:
	.size	_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i, .-_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i
	.section	.text._Z13kernel_pad_2dIdEvPKT_PS0_iiiiii,"axG",@progbits,_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii,comdat
	.weak	_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii
	.type	_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii, @function
_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii:
.LFB5167:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z13kernel_pad_2dIdEvPKT_PS0_iiiiiiPKdPdiiiiii
	.cfi_endproc
.LFE5167:
	.size	_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii, .-_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii
	.section	.text._Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii,"axG",@progbits,_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii,comdat
	.weak	_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii
	.type	_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii, @function
_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii:
.LFB5168:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z15kernel_unpad_2dIdEvPKT_PS0_iiiiiiPKdPdiiiiii
	.cfi_endproc
.LFE5168:
	.size	_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii, .-_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii
	.section	.text._Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi,comdat
	.weak	_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi
	.type	_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi, @function
_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi:
.LFB5176:
	.cfi_startproc
	endbr64
	jmp	_ZL66__device_stub__Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdiPKdS0_S0_PdS1_S1_S0_i
	.cfi_endproc
.LFE5176:
	.size	_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi, .-_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi
	.section	.text._Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.type	_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, @function
_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii:
.LFB5179:
	.cfi_startproc
	endbr64
	jmp	_ZL71__device_stub__Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii
	.cfi_endproc
.LFE5179:
	.size	_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, .-_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.section	.text._Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.type	_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, @function
_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii:
.LFB5181:
	.cfi_startproc
	endbr64
	jmp	_ZL70__device_stub__Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii
	.cfi_endproc
.LFE5181:
	.size	_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, .-_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.section	.text._Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi,comdat
	.weak	_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi
	.type	_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi, @function
_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi:
.LFB5229:
	.cfi_startproc
	endbr64
	jmp	_ZL66__device_stub__Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdiPKiS0_S0_PiS1_S1_PKdi
	.cfi_endproc
.LFE5229:
	.size	_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi, .-_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi
	.section	.text._Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.type	_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, @function
_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii:
.LFB5131:
	.cfi_startproc
	endbr64
	jmp	_ZL69__device_stub__Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii
	.cfi_endproc
.LFE5131:
	.size	_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, .-_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.section	.text._Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.type	_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, @function
_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii:
.LFB5127:
	.cfi_startproc
	endbr64
	jmp	_ZL71__device_stub__Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii
	.cfi_endproc
.LFE5127:
	.size	_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, .-_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.section	.text._Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.type	_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, @function
_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii:
.LFB5129:
	.cfi_startproc
	endbr64
	jmp	_ZL70__device_stub__Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii
	.cfi_endproc
.LFE5129:
	.size	_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, .-_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.section	.text._Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.type	_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, @function
_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii:
.LFB5183:
	.cfi_startproc
	endbr64
	jmp	_ZL69__device_stub__Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii
	.cfi_endproc
.LFE5183:
	.size	_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, .-_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.section	.text._Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i,"axG",@progbits,_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i,comdat
	.weak	_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i
	.type	_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i, @function
_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i:
.LFB5174:
	.cfi_startproc
	endbr64
	jmp	_ZL62__device_stub__Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_iPKdS0_S0_PdS1_S1_S0_i
	.cfi_endproc
.LFE5174:
	.size	_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i, .-_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i
	.section	.text._Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i,"axG",@progbits,_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i,comdat
	.weak	_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i
	.type	_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i, @function
_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i:
.LFB5227:
	.cfi_startproc
	endbr64
	jmp	_ZL62__device_stub__Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_iPKiS0_S0_PiS1_S1_S0_i
	.cfi_endproc
.LFE5227:
	.size	_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i, .-_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i
	.section	.text._Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi,comdat
	.weak	_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi
	.type	_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi, @function
_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi:
.LFB5124:
	.cfi_startproc
	endbr64
	jmp	_ZL66__device_stub__Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdiPKfS0_S0_PfS1_S1_PKdi
	.cfi_endproc
.LFE5124:
	.size	_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi, .-_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi
	.section	.text._Z13kernel_pad_2dIfEvPKT_PS0_iiiiii,"axG",@progbits,_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii,comdat
	.weak	_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii
	.type	_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii, @function
_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii:
.LFB5115:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z13kernel_pad_2dIfEvPKT_PS0_iiiiiiPKfPfiiiiii
	.cfi_endproc
.LFE5115:
	.size	_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii, .-_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii
	.section	.text._Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii,"axG",@progbits,_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii,comdat
	.weak	_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii
	.type	_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii, @function
_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii:
.LFB5116:
	.cfi_startproc
	endbr64
	jmp	_ZL51__device_stub__Z15kernel_unpad_2dIfEvPKT_PS0_iiiiiiPKfPfiiiiii
	.cfi_endproc
.LFE5116:
	.size	_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii, .-_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii
	.section	.text._Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i,"axG",@progbits,_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i,comdat
	.weak	_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i
	.type	_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i, @function
_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i:
.LFB5125:
	.cfi_startproc
	endbr64
	jmp	_ZL59__device_stub__Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_iPKfS0_S0_S0_PfS1_i
	.cfi_endproc
.LFE5125:
	.size	_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i, .-_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i
	.section	.text._Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii,"axG",@progbits,_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii,comdat
	.weak	_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii
	.type	_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii, @function
_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii:
.LFB5120:
	.cfi_startproc
	endbr64
	jmp	_ZL50__device_stub__Z14kernel_grid_3dIfEvPT_S1_S1_PdiiiPfS_S_Pdiii
	.cfi_endproc
.LFE5120:
	.size	_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii, .-_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii
	.section	.text._Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii,"axG",@progbits,_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii,comdat
	.weak	_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii
	.type	_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii, @function
_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii:
.LFB5135:
	.cfi_startproc
	endbr64
	jmp	_ZL58__device_stub__Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiiiPKfS0_Pfiiii
	.cfi_endproc
.LFE5135:
	.size	_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii, .-_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii
	.section	.text._Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii,"axG",@progbits,_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii,comdat
	.weak	_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii
	.type	_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii, @function
_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii:
.LFB5188:
	.cfi_startproc
	endbr64
	jmp	_ZL58__device_stub__Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiiiPKdS0_Pdiiii
	.cfi_endproc
.LFE5188:
	.size	_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii, .-_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii
	.section	.text._Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i,"axG",@progbits,_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i,comdat
	.weak	_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i
	.type	_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i, @function
_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i:
.LFB5177:
	.cfi_startproc
	endbr64
	jmp	_ZL59__device_stub__Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_iPKdS0_S0_S0_PdS1_i
	.cfi_endproc
.LFE5177:
	.size	_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i, .-_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i
	.section	.text._Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii,"axG",@progbits,_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii,comdat
	.weak	_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii
	.type	_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii, @function
_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii:
.LFB5225:
	.cfi_startproc
	endbr64
	jmp	_ZL50__device_stub__Z14kernel_grid_3dIiEvPT_S1_S1_PdiiiPiS_S_Pdiii
	.cfi_endproc
.LFE5225:
	.size	_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii, .-_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii
	.section	.text._Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i,"axG",@progbits,_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i,comdat
	.weak	_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i
	.type	_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i, @function
_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i:
.LFB5230:
	.cfi_startproc
	endbr64
	jmp	_ZL59__device_stub__Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_iPKiS0_S0_S0_PiS1_i
	.cfi_endproc
.LFE5230:
	.size	_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i, .-_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i
	.section	.text._Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii,"axG",@progbits,_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii,comdat
	.weak	_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii
	.type	_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii, @function
_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii:
.LFB5235:
	.cfi_startproc
	endbr64
	jmp	_ZL58__device_stub__Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiiiPKiS0_Piiiii
	.cfi_endproc
.LFE5235:
	.size	_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii, .-_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii
	.section	.text._Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii,"axG",@progbits,_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii,comdat
	.weak	_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii
	.type	_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii, @function
_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii:
.LFB5172:
	.cfi_startproc
	endbr64
	jmp	_ZL50__device_stub__Z14kernel_grid_3dIdEvPT_S1_S1_PdiiiPdS_S_S_iii
	.cfi_endproc
.LFE5172:
	.size	_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii, .-_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii
	.section	.text._Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,"axG",@progbits,_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,comdat
	.weak	_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.type	_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, @function
_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i:
.LFB5231:
	.cfi_startproc
	endbr64
	jmp	_ZL68__device_stub__Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKiS0_S0_S0_S0_S0_PiS1_S1_i
	.cfi_endproc
.LFE5231:
	.size	_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, .-_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.section	.text._Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,"axG",@progbits,_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,comdat
	.weak	_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.type	_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, @function
_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i:
.LFB5178:
	.cfi_startproc
	endbr64
	jmp	_ZL68__device_stub__Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKdS0_S0_S0_S0_S0_PdS1_S1_i
	.cfi_endproc
.LFE5178:
	.size	_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, .-_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.section	.text._Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,"axG",@progbits,_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,comdat
	.weak	_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.type	_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, @function
_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i:
.LFB5126:
	.cfi_startproc
	endbr64
	jmp	_ZL68__device_stub__Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKfS0_S0_S0_S0_S0_PfS1_S1_i
	.cfi_endproc
.LFE5126:
	.size	_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, .-_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.section	.text._Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii,"axG",@progbits,_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii,comdat
	.weak	_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii
	.type	_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii, @function
_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii:
.LFB5189:
	.cfi_startproc
	endbr64
	jmp	_ZL60__device_stub__Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiiiPKdS0_Pdiiiiii
	.cfi_endproc
.LFE5189:
	.size	_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii, .-_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii
	.section	.text._Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii,"axG",@progbits,_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii,comdat
	.weak	_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii
	.type	_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii, @function
_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii:
.LFB5236:
	.cfi_startproc
	endbr64
	jmp	_ZL60__device_stub__Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiiiPKiS0_Piiiiiii
	.cfi_endproc
.LFE5236:
	.size	_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii, .-_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii
	.section	.text._Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii,"axG",@progbits,_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii,comdat
	.weak	_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii
	.type	_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii, @function
_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii:
.LFB5136:
	.cfi_startproc
	endbr64
	jmp	_ZL60__device_stub__Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiiiPKfS0_Pfiiiiii
	.cfi_endproc
.LFE5136:
	.size	_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii, .-_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii
	.section	.text._Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.weak	_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.type	_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii, @function
_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii:
.LFB5130:
	.cfi_startproc
	endbr64
	jmp	_ZL75__device_stub__Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiiiPKfS0_S0_S0_Pfiiiiii
	.cfi_endproc
.LFE5130:
	.size	_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii, .-_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.section	.text._Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii
	.type	_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii, @function
_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii:
.LFB5118:
	.cfi_startproc
	endbr64
	jmp	_ZL54__device_stub__Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiiiPKfPfiiiiiiiii
	.cfi_endproc
.LFE5118:
	.size	_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii, .-_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii
	.section	.text._Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii
	.type	_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii, @function
_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii:
.LFB5222:
	.cfi_startproc
	endbr64
	jmp	_ZL52__device_stub__Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiiiPKiPiiiiiiiiii
	.cfi_endproc
.LFE5222:
	.size	_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii, .-_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii
	.section	.text._Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii
	.type	_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii, @function
_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii:
.LFB5223:
	.cfi_startproc
	endbr64
	jmp	_ZL54__device_stub__Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiiiPKiPiiiiiiiiii
	.cfi_endproc
.LFE5223:
	.size	_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii, .-_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii
	.section	.text._Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii
	.type	_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii, @function
_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii:
.LFB5170:
	.cfi_startproc
	endbr64
	jmp	_ZL54__device_stub__Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiiiPKdPdiiiiiiiii
	.cfi_endproc
.LFE5170:
	.size	_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii, .-_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii
	.section	.text._Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii
	.type	_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii, @function
_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii:
.LFB5169:
	.cfi_startproc
	endbr64
	jmp	_ZL52__device_stub__Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiiiPKdPdiiiiiiiii
	.cfi_endproc
.LFE5169:
	.size	_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii, .-_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii
	.section	.text._Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii
	.type	_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii, @function
_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii:
.LFB5117:
	.cfi_startproc
	endbr64
	jmp	_ZL52__device_stub__Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiiiPKfPfiiiiiiiii
	.cfi_endproc
.LFE5117:
	.size	_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii, .-_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii
	.section	.text._Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.weak	_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.type	_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, @function
_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii:
.LFB5180:
	.cfi_startproc
	endbr64
	jmp	_ZL76__device_stub__Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii
	.cfi_endproc
.LFE5180:
	.size	_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, .-_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.section	.text._Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.weak	_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.type	_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, @function
_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii:
.LFB5184:
	.cfi_startproc
	endbr64
	jmp	_ZL74__device_stub__Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii
	.cfi_endproc
.LFE5184:
	.size	_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, .-_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.section	.text._Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.weak	_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.type	_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii, @function
_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii:
.LFB5128:
	.cfi_startproc
	endbr64
	jmp	_ZL76__device_stub__Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiiiPKfS0_S0_S0_Pfiiiiii
	.cfi_endproc
.LFE5128:
	.size	_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii, .-_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.section	.text._Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.weak	_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.type	_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, @function
_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii:
.LFB5182:
	.cfi_startproc
	endbr64
	jmp	_ZL75__device_stub__Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii
	.cfi_endproc
.LFE5182:
	.size	_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, .-_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\n******* CUDA Error *******\n[Error] Information:\t%s\n[Error] Error code:\t%i\n[Error] Description:\t%s\n[Error] File:\t\t%s\n[Error] Line:\t\t%d\n"
	.text
	.globl	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.type	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b, @function
_Z25imart_assert_kernel_error9cudaErrorPKciS1_b:
.LFB4021:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L921
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%edx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%r8d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	movq	%rcx, 8(%rsp)
	call	cudaGetErrorString@PLT
	pushq	%r14
	.cfi_def_cfa_offset 72
	movl	%ebx, %r8d
	movl	$2, %esi
	pushq	%r13
	.cfi_def_cfa_offset 80
	movq	24(%rsp), %rcx
	movq	%rax, %r9
	xorl	%eax, %eax
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rdx
	call	__fprintf_chk@PLT
	popq	%rax
	.cfi_def_cfa_offset 72
	popq	%rdx
	.cfi_def_cfa_offset 64
	testb	%bpl, %bpl
	je	.L915
	movl	%ebx, %edi
	call	exit@PLT
.L915:
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
.L921:
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 13
	.cfi_restore 14
	ret
	.cfi_endproc
.LFE4021:
	.size	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b, .-_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.section	.rodata.str1.1
.LC1:
	.string	"Error copy device to device, real to complex"
.LC2:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/acamargosonosa/imart/main/src/cuda/kernels.cu"
.LC3:
	.string	"Error copy device to device, imaginary to complex"
.LC4:
	.string	"Error copy device to device, complex to real"
	.text
	.globl	_Z18cuda_kernel_fft_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib
	.type	_Z18cuda_kernel_fft_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib, @function
_Z18cuda_kernel_fft_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib:
.LFB4186:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rcx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	112(%rsp), %ebx
	imull	120(%rsp), %ebx
	movq	%rdx, 8(%rsp)
	leaq	24(%rsp), %rdi
	movq	%r9, (%rsp)
	movl	128(%rsp), %r13d
	movslq	%ebx, %rbx
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	0(,%rbx,8), %r12
	movq	%r12, %rsi
	call	_Z10cudaMallocI6float2E9cudaErrorPPT_m.isra.0
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	call	_Z10cudaMallocI6float2E9cudaErrorPPT_m.isra.0
	movq	24(%rsp), %r12
	movq	%rbx, %r9
	movl	$4, %r8d
	pushq	%r10
	.cfi_def_cfa_offset 120
	movl	$4, %ecx
	movl	$8, %esi
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdx
	movq	%r12, %rdi
	call	cudaMemcpy2D@PLT
	popq	%r11
	.cfi_def_cfa_offset 120
	popq	%rbp
	.cfi_def_cfa_offset 112
	movl	$1797, %edx
	leaq	.LC2(%rip), %rbp
	movl	%eax, %edi
	movl	$1, %r8d
	leaq	.LC1(%rip), %rcx
	movq	%rbp, %rsi
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	leaq	4(%r12), %rdi
	pushq	%r12
	.cfi_def_cfa_offset 120
	movq	%rbx, %r9
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	%r15, %rdx
	movl	$4, %r8d
	movl	$4, %ecx
	movl	$8, %esi
	call	cudaMemcpy2D@PLT
	popq	%r15
	.cfi_def_cfa_offset 120
	movl	$1, %r8d
	movq	%rbp, %rsi
	movl	%eax, %edi
	leaq	.LC3(%rip), %rcx
	popq	%rax
	.cfi_def_cfa_offset 112
	movl	$1800, %edx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	movl	112(%rsp), %edx
	movl	120(%rsp), %esi
	leaq	20(%rsp), %rdi
	movl	$41, %ecx
	call	cufftPlan2d@PLT
	orl	$-1, %ecx
	testb	%r13b, %r13b
	movl	20(%rsp), %edi
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdx
	jne	.L929
	movl	$1, %ecx
.L929:
	call	cufftExecC2C@PLT
	movq	32(%rsp), %r12
	movq	%rbx, %r9
	movq	%r14, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	$4, %r8d
	movl	$8, %ecx
	movl	$4, %esi
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	%r12, %rdx
	leaq	.LC4(%rip), %r14
	call	cudaMemcpy2D@PLT
	popq	%rdx
	.cfi_def_cfa_offset 120
	movq	%rbp, %rsi
	popq	%rcx
	.cfi_def_cfa_offset 112
	movl	%eax, %edi
	movl	$1, %r8d
	movq	%r14, %rcx
	movl	$1826, %edx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	leaq	4(%r12), %rdx
	movq	%rbx, %r9
	movl	$4, %r8d
	pushq	%rsi
	.cfi_def_cfa_offset 120
	movl	$8, %ecx
	movl	$4, %esi
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	16(%rsp), %rdi
	call	cudaMemcpy2D@PLT
	popq	%r8
	.cfi_def_cfa_offset 120
	movq	%r14, %rcx
	popq	%r9
	.cfi_def_cfa_offset 112
	movl	%eax, %edi
	movl	$1, %r8d
	movl	$1830, %edx
	movq	%rbp, %rsi
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	movl	20(%rsp), %edi
	call	cufftDestroy@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L927
	call	__stack_chk_fail@PLT
.L927:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4186:
	.size	_Z18cuda_kernel_fft_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib, .-_Z18cuda_kernel_fft_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib
	.globl	_Z18cuda_kernel_fft_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib
	.type	_Z18cuda_kernel_fft_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib, @function
_Z18cuda_kernel_fft_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib:
.LFB4187:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rcx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	112(%rsp), %ebx
	imull	120(%rsp), %ebx
	movq	%rdx, 8(%rsp)
	leaq	24(%rsp), %rdi
	movq	%r9, (%rsp)
	movl	128(%rsp), %r13d
	movslq	%ebx, %rbx
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movq	%rbx, %r12
	salq	$4, %r12
	movq	%r12, %rsi
	call	_Z10cudaMallocI6float2E9cudaErrorPPT_m.isra.0
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	call	_Z10cudaMallocI6float2E9cudaErrorPPT_m.isra.0
	movq	24(%rsp), %r12
	movq	%rbx, %r9
	movl	$8, %r8d
	pushq	%r10
	.cfi_def_cfa_offset 120
	movl	$8, %ecx
	movl	$16, %esi
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdx
	movq	%r12, %rdi
	call	cudaMemcpy2D@PLT
	popq	%r11
	.cfi_def_cfa_offset 120
	popq	%rbp
	.cfi_def_cfa_offset 112
	movl	$1857, %edx
	leaq	.LC2(%rip), %rbp
	movl	%eax, %edi
	movl	$1, %r8d
	leaq	.LC1(%rip), %rcx
	movq	%rbp, %rsi
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	leaq	8(%r12), %rdi
	pushq	%r12
	.cfi_def_cfa_offset 120
	movq	%rbx, %r9
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	%r15, %rdx
	movl	$8, %r8d
	movl	$8, %ecx
	movl	$16, %esi
	call	cudaMemcpy2D@PLT
	popq	%r15
	.cfi_def_cfa_offset 120
	movl	$1, %r8d
	movq	%rbp, %rsi
	movl	%eax, %edi
	leaq	.LC3(%rip), %rcx
	popq	%rax
	.cfi_def_cfa_offset 112
	movl	$1860, %edx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	movl	112(%rsp), %edx
	movl	120(%rsp), %esi
	leaq	20(%rsp), %rdi
	movl	$41, %ecx
	call	cufftPlan2d@PLT
	orl	$-1, %ecx
	testb	%r13b, %r13b
	movl	20(%rsp), %edi
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdx
	jne	.L935
	movl	$1, %ecx
.L935:
	call	cufftExecZ2Z@PLT
	movq	32(%rsp), %r12
	movq	%rbx, %r9
	movq	%r14, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	$8, %r8d
	movl	$16, %ecx
	movl	$8, %esi
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	%r12, %rdx
	leaq	.LC4(%rip), %r14
	call	cudaMemcpy2D@PLT
	popq	%rdx
	.cfi_def_cfa_offset 120
	movq	%rbp, %rsi
	popq	%rcx
	.cfi_def_cfa_offset 112
	movl	%eax, %edi
	movl	$1, %r8d
	movq	%r14, %rcx
	movl	$1886, %edx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	leaq	8(%r12), %rdx
	movq	%rbx, %r9
	movl	$8, %r8d
	pushq	%rsi
	.cfi_def_cfa_offset 120
	movl	$16, %ecx
	movl	$8, %esi
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	16(%rsp), %rdi
	call	cudaMemcpy2D@PLT
	popq	%r8
	.cfi_def_cfa_offset 120
	movq	%r14, %rcx
	popq	%r9
	.cfi_def_cfa_offset 112
	movl	%eax, %edi
	movl	$1, %r8d
	movl	$1890, %edx
	movq	%rbp, %rsi
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	movl	20(%rsp), %edi
	call	cufftDestroy@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L933
	call	__stack_chk_fail@PLT
.L933:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4187:
	.size	_Z18cuda_kernel_fft_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib, .-_Z18cuda_kernel_fft_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib
	.globl	_Z18cuda_kernel_fft_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib
	.type	_Z18cuda_kernel_fft_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib, @function
_Z18cuda_kernel_fft_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib:
.LFB4189:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rcx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	112(%rsp), %ebx
	imull	120(%rsp), %ebx
	movq	%rdx, 8(%rsp)
	leaq	24(%rsp), %rdi
	imull	128(%rsp), %ebx
	movq	%r9, (%rsp)
	movl	136(%rsp), %r13d
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movslq	%ebx, %rbx
	leaq	0(,%rbx,8), %r12
	movq	%r12, %rsi
	call	_Z10cudaMallocI6float2E9cudaErrorPPT_m.isra.0
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	call	_Z10cudaMallocI6float2E9cudaErrorPPT_m.isra.0
	movq	24(%rsp), %r12
	movq	%rbx, %r9
	movl	$4, %r8d
	pushq	%r10
	.cfi_def_cfa_offset 120
	movl	$4, %ecx
	movl	$8, %esi
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdx
	movq	%r12, %rdi
	call	cudaMemcpy2D@PLT
	popq	%r11
	.cfi_def_cfa_offset 120
	popq	%rbp
	.cfi_def_cfa_offset 112
	movl	$1925, %edx
	leaq	.LC2(%rip), %rbp
	movl	%eax, %edi
	movl	$1, %r8d
	leaq	.LC1(%rip), %rcx
	movq	%rbp, %rsi
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	leaq	4(%r12), %rdi
	pushq	%r12
	.cfi_def_cfa_offset 120
	movq	%rbx, %r9
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	%r15, %rdx
	movl	$4, %r8d
	movl	$4, %ecx
	movl	$8, %esi
	call	cudaMemcpy2D@PLT
	popq	%r15
	.cfi_def_cfa_offset 120
	movl	$1, %r8d
	movq	%rbp, %rsi
	movl	%eax, %edi
	leaq	.LC3(%rip), %rcx
	popq	%rax
	.cfi_def_cfa_offset 112
	movl	$1928, %edx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	movl	112(%rsp), %ecx
	movl	120(%rsp), %edx
	leaq	20(%rsp), %rdi
	movl	128(%rsp), %esi
	movl	$41, %r8d
	call	cufftPlan3d@PLT
	orl	$-1, %ecx
	testb	%r13b, %r13b
	movl	20(%rsp), %edi
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdx
	jne	.L941
	movl	$1, %ecx
.L941:
	call	cufftExecC2C@PLT
	movq	32(%rsp), %r12
	movq	%rbx, %r9
	movq	%r14, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	$4, %r8d
	movl	$8, %ecx
	movl	$4, %esi
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	%r12, %rdx
	leaq	.LC4(%rip), %r14
	call	cudaMemcpy2D@PLT
	popq	%rdx
	.cfi_def_cfa_offset 120
	movq	%rbp, %rsi
	popq	%rcx
	.cfi_def_cfa_offset 112
	movl	%eax, %edi
	movl	$1, %r8d
	movq	%r14, %rcx
	movl	$1954, %edx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	leaq	4(%r12), %rdx
	movq	%rbx, %r9
	movl	$4, %r8d
	pushq	%rsi
	.cfi_def_cfa_offset 120
	movl	$8, %ecx
	movl	$4, %esi
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	16(%rsp), %rdi
	call	cudaMemcpy2D@PLT
	popq	%r8
	.cfi_def_cfa_offset 120
	movq	%r14, %rcx
	popq	%r9
	.cfi_def_cfa_offset 112
	movl	%eax, %edi
	movl	$1, %r8d
	movl	$1958, %edx
	movq	%rbp, %rsi
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	movl	20(%rsp), %edi
	call	cufftDestroy@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L939
	call	__stack_chk_fail@PLT
.L939:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4189:
	.size	_Z18cuda_kernel_fft_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib, .-_Z18cuda_kernel_fft_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib
	.globl	_Z18cuda_kernel_fft_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib
	.type	_Z18cuda_kernel_fft_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib, @function
_Z18cuda_kernel_fft_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib:
.LFB4190:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rcx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	112(%rsp), %ebx
	imull	120(%rsp), %ebx
	movq	%rdx, 8(%rsp)
	leaq	24(%rsp), %rdi
	imull	128(%rsp), %ebx
	movq	%r9, (%rsp)
	movl	136(%rsp), %r13d
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movslq	%ebx, %rbx
	movq	%rbx, %r12
	salq	$4, %r12
	movq	%r12, %rsi
	call	_Z10cudaMallocI6float2E9cudaErrorPPT_m.isra.0
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	call	_Z10cudaMallocI6float2E9cudaErrorPPT_m.isra.0
	movq	24(%rsp), %r12
	movq	%rbx, %r9
	movl	$8, %r8d
	pushq	%r10
	.cfi_def_cfa_offset 120
	movl	$8, %ecx
	movl	$16, %esi
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdx
	movq	%r12, %rdi
	call	cudaMemcpy2D@PLT
	popq	%r11
	.cfi_def_cfa_offset 120
	popq	%rbp
	.cfi_def_cfa_offset 112
	movl	$1985, %edx
	leaq	.LC2(%rip), %rbp
	movl	%eax, %edi
	movl	$1, %r8d
	leaq	.LC1(%rip), %rcx
	movq	%rbp, %rsi
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	leaq	8(%r12), %rdi
	pushq	%r12
	.cfi_def_cfa_offset 120
	movq	%rbx, %r9
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	%r15, %rdx
	movl	$8, %r8d
	movl	$8, %ecx
	movl	$16, %esi
	call	cudaMemcpy2D@PLT
	popq	%r15
	.cfi_def_cfa_offset 120
	movl	$1, %r8d
	movq	%rbp, %rsi
	movl	%eax, %edi
	leaq	.LC3(%rip), %rcx
	popq	%rax
	.cfi_def_cfa_offset 112
	movl	$1988, %edx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	movl	112(%rsp), %ecx
	movl	120(%rsp), %edx
	leaq	20(%rsp), %rdi
	movl	128(%rsp), %esi
	movl	$41, %r8d
	call	cufftPlan3d@PLT
	orl	$-1, %ecx
	testb	%r13b, %r13b
	movl	20(%rsp), %edi
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdx
	jne	.L947
	movl	$1, %ecx
.L947:
	call	cufftExecZ2Z@PLT
	movq	32(%rsp), %r12
	movq	%rbx, %r9
	movq	%r14, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	$8, %r8d
	movl	$16, %ecx
	movl	$8, %esi
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	%r12, %rdx
	leaq	.LC4(%rip), %r14
	call	cudaMemcpy2D@PLT
	popq	%rdx
	.cfi_def_cfa_offset 120
	movq	%rbp, %rsi
	popq	%rcx
	.cfi_def_cfa_offset 112
	movl	%eax, %edi
	movl	$1, %r8d
	movq	%r14, %rcx
	movl	$2014, %edx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	leaq	8(%r12), %rdx
	movq	%rbx, %r9
	movl	$8, %r8d
	pushq	%rsi
	.cfi_def_cfa_offset 120
	movl	$16, %ecx
	movl	$8, %esi
	pushq	$3
	.cfi_def_cfa_offset 128
	movq	16(%rsp), %rdi
	call	cudaMemcpy2D@PLT
	popq	%r8
	.cfi_def_cfa_offset 120
	movq	%r14, %rcx
	popq	%r9
	.cfi_def_cfa_offset 112
	movl	%eax, %edi
	movl	$1, %r8d
	movl	$2018, %edx
	movq	%rbp, %rsi
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	movl	20(%rsp), %edi
	call	cufftDestroy@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L945
	call	__stack_chk_fail@PLT
.L945:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4190:
	.size	_Z18cuda_kernel_fft_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib, .-_Z18cuda_kernel_fft_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib
	.section	.rodata._Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i.str1.1,"aMS",@progbits,1
.LC5:
	.string	"Fail to run kernel cast"
.LC6:
	.string	"Fail to sync kernel cast"
	.section	.text._Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4882:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L949
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIfdEvPKT_PT0_iPKfPdi
.L949:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4882:
	.size	_Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4883:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L952
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIdfEvPKT_PT0_iPKdPfi
.L952:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4883:
	.size	_Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4884:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L955
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIifEvPKT_PT0_iPKiPfi
.L955:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4884:
	.size	_Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4885:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L958
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIfiEvPKT_PT0_iPKfPii
.L958:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4885:
	.size	_Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4886:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L961
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIidEvPKT_PT0_iPKiPdi
.L961:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4886:
	.size	_Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4887:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L964
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIdiEvPKT_PT0_iPKdPii
.L964:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4887:
	.size	_Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4888:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L967
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIftEvPKT_PT0_iPKfPti
.L967:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4888:
	.size	_Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4889:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L970
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castItfEvPKT_PT0_iPKtPfi
.L970:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4889:
	.size	_Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4890:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L973
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIdtEvPKT_PT0_iPKdPti
.L973:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4890:
	.size	_Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4891:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L976
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castItdEvPKT_PT0_iPKtPdi
.L976:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4891:
	.size	_Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4892:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L979
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIfjEvPKT_PT0_iPKfPji
.L979:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4892:
	.size	_Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4893:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L982
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIjfEvPKT_PT0_iPKjPfi
.L982:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4893:
	.size	_Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4894:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L985
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIdjEvPKT_PT0_iPKdPji
.L985:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4894:
	.size	_Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4895:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L988
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIjdEvPKT_PT0_iPKjPdi
.L988:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4895:
	.size	_Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4896:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L991
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIfhEvPKT_PT0_iPKfPhi
.L991:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4896:
	.size	_Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4897:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L994
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIhfEvPKT_PT0_iPKhPfi
.L994:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4897:
	.size	_Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4898:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L997
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIdhEvPKT_PT0_iPKdPhi
.L997:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4898:
	.size	_Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4899:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1000
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIhdEvPKT_PT0_iPKhPdi
.L1000:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4899:
	.size	_Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4900:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1003
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIffEvPKT_PT0_iPKfPfi
.L1003:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4900:
	.size	_Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.text._Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i, @function
_Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i:
.LFB4901:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1006
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL43__device_stub__Z11kernel_castIddEvPKT_PT0_iPKdPdi
.L1006:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1122, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC5(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1123, %edx
	leaq	.LC6(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4901:
	.size	_Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .-_Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.section	.rodata._Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i.str1.1,"aMS",@progbits,1
.LC7:
	.string	"Fail to run kernel assign"
.LC8:
	.string	"Fail to sync kernel assign"
	.section	.text._Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i, @function
_Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i:
.LFB4902:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdx, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movss	%xmm0, 12(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1009
	movl	%ebp, %esi
	movq	%rbx, %rdi
	call	_ZL42__device_stub__Z13kernel_assignIfEvPT_S0_iPffi
.L1009:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1099, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC7(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 16
	movl	%eax, %edi
	leaq	.LC8(%rip), %rcx
	movl	$1100, %edx
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4902:
	.size	_Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i, .-_Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i
	.section	.rodata._Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i.str1.1,"aMS",@progbits,1
.LC9:
	.string	"Fail to run kernel copy"
.LC10:
	.string	"Fail to sync kernel copy"
	.section	.text._Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB4903:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1012
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL42__device_stub__Z11kernel_copyIfEvPKT_PS0_iPKfPfi
.L1012:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1111, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC9(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1112, %edx
	leaq	.LC10(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4903:
	.size	_Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.rodata._Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i.str1.1,"aMS",@progbits,1
.LC11:
	.string	"Fail to run kernel add"
.LC12:
	.string	"Fail to sync kernel add"
	.section	.text._Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4904:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1015
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL44__device_stub__Z10kernel_addIfEvPKT_S2_PS0_iPKfS0_Pfi
.L1015:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1224, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC11(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1225, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC12(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4904:
	.size	_Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.rodata._Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i.str1.1,"aMS",@progbits,1
.LC13:
	.string	"Fail to run kernel sub"
.LC14:
	.string	"Fail to sync kernel sub"
	.section	.text._Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4905:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1018
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL44__device_stub__Z10kernel_subIfEvPKT_S2_PS0_iPKfS0_Pfi
.L1018:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1235, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC13(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1236, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC14(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4905:
	.size	_Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.rodata._Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i.str1.1,"aMS",@progbits,1
.LC15:
	.string	"Fail to run kernel mul"
.LC16:
	.string	"Fail to sync kernel mul"
	.section	.text._Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4906:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1021
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL44__device_stub__Z10kernel_mulIfEvPKT_S2_PS0_iPKfS0_Pfi
.L1021:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1246, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC15(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1247, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC16(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4906:
	.size	_Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.rodata._Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i.str1.1,"aMS",@progbits,1
.LC17:
	.string	"Fail to run kernel div"
.LC18:
	.string	"Fail to sync kernel div"
	.section	.text._Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4907:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1024
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL44__device_stub__Z10kernel_divIfEvPKT_S2_PS0_iPKfS0_Pfi
.L1024:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1257, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC17(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1258, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC18(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4907:
	.size	_Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.rodata._Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i.str1.1,"aMS",@progbits,1
.LC19:
	.string	"Fail to run kernel pow"
.LC20:
	.string	"Fail to sync kernel pow"
	.section	.text._Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4908:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1027
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL44__device_stub__Z10kernel_powIfEvPKT_S2_PS0_iPKfS0_Pfi
.L1027:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1268, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC19(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1269, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC20(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4908:
	.size	_Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.rodata._Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i.str1.1,"aMS",@progbits,1
.LC21:
	.string	"Fail to run kernel add scalar"
.LC22:
	.string	"Fail to sync kernel add scalar"
	.section	.text._Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4909:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movss	%xmm0, 12(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1030
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_add_scalarIfEvPKT_PS0_S0_iPKfPffi
.L1030:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1136, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC21(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1137, %edx
	leaq	.LC22(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4909:
	.size	_Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.rodata._Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i.str1.1,"aMS",@progbits,1
.LC23:
	.string	"Fail to run kernel sub scalar"
.LC24:
	.string	"Fail to sync kernel sub scalar"
	.section	.text._Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4910:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movss	%xmm0, 12(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1033
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_sub_scalarIfEvPKT_PS0_S0_iPKfPffi
.L1033:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1147, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC23(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1148, %edx
	leaq	.LC24(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4910:
	.size	_Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.rodata._Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i.str1.1,"aMS",@progbits,1
.LC25:
	.string	"Fail to run kernel sub scalar inv"
.LC26:
	.string	"Fail to sync kernel sub scalar inv"
	.section	.text._Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4911:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movss	%xmm0, 12(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1036
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL55__device_stub__Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_iPKfPffi
.L1036:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1158, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC25(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1159, %edx
	leaq	.LC26(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4911:
	.size	_Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.rodata._Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i.str1.1,"aMS",@progbits,1
.LC27:
	.string	"Fail to run kernel mul scalar"
.LC28:
	.string	"Fail to sync kernel mul scalar"
	.section	.text._Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4912:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movss	%xmm0, 12(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1039
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_mul_scalarIfEvPKT_PS0_S0_iPKfPffi
.L1039:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1169, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC27(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1170, %edx
	leaq	.LC28(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4912:
	.size	_Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.rodata._Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i.str1.1,"aMS",@progbits,1
.LC29:
	.string	"Fail to run kernel div scalar"
.LC30:
	.string	"Fail to sync kernel div scalar"
	.section	.text._Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4913:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movss	%xmm0, 12(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1042
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_div_scalarIfEvPKT_PS0_S0_iPKfPffi
.L1042:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1180, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC29(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1181, %edx
	leaq	.LC30(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4913:
	.size	_Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.rodata._Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i.str1.1,"aMS",@progbits,1
.LC31:
	.string	"Fail to run kernel div scalar inv"
.LC32:
	.string	"Fail to sync kernel div scalar inv"
	.section	.text._Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4914:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movss	%xmm0, 12(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1045
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL55__device_stub__Z21kernel_div_scalar_invIfEvPKT_PS0_S0_iPKfPffi
.L1045:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1191, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC31(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1192, %edx
	leaq	.LC32(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4914:
	.size	_Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.rodata._Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i.str1.1,"aMS",@progbits,1
.LC33:
	.string	"Fail to run kernel pow scalar"
.LC34:
	.string	"Fail to sync kernel pow scalar"
	.section	.text._Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4915:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movss	%xmm0, 12(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1048
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_pow_scalarIfEvPKT_PS0_S0_iPKfPffi
.L1048:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1202, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC33(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1203, %edx
	leaq	.LC34(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4915:
	.size	_Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.rodata._Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i.str1.1,"aMS",@progbits,1
.LC35:
	.string	"Fail to run kernel pow scalar inv"
.LC36:
	.string	"Fail to sync kernel pow scalar inv"
	.section	.text._Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4916:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movss	%xmm0, 12(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1051
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL55__device_stub__Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_iPKfPffi
.L1051:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1213, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC35(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1214, %edx
	leaq	.LC36(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4916:
	.size	_Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.rodata._Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i.str1.1,"aMS",@progbits,1
.LC37:
	.string	"Fail to run kernel equal"
.LC38:
	.string	"Fail to sync kernel equal"
	.section	.text._Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4917:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1054
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL46__device_stub__Z12kernel_equalIfEvPKT_S2_PS0_iPKfS0_Pfi
.L1054:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1279, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC37(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1280, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC38(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4917:
	.size	_Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.rodata._Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i.str1.1,"aMS",@progbits,1
.LC39:
	.string	"Fail to run kernel"
.LC40:
	.string	"Fail to sync kernel"
	.section	.text._Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4918:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1057
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL48__device_stub__Z14kernel_greaterIfEvPKT_S2_PS0_iPKfS0_Pfi
.L1057:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1290, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC39(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1291, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC40(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4918:
	.size	_Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4919:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1060
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL45__device_stub__Z11kernel_lessIfEvPKT_S2_PS0_iPKfS0_Pfi
.L1060:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1301, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC39(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1302, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC40(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4919:
	.size	_Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.rodata._Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i.str1.1,"aMS",@progbits,1
.LC41:
	.string	"Fail to run kernel greater equal"
.LC42:
	.string	"Fail to sync kernel greater equal"
	.section	.text._Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4920:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1063
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL54__device_stub__Z20kernel_greater_equalIfEvPKT_S2_PS0_iPKfS0_Pfi
.L1063:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1312, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC41(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1313, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC42(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4920:
	.size	_Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.rodata._Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i.str1.1,"aMS",@progbits,1
.LC43:
	.string	"Fail to run kernel less equal"
.LC44:
	.string	"Fail to sync kernel less equal"
	.section	.text._Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4921:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1066
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_less_equalIfEvPKT_S2_PS0_iPKfS0_Pfi
.L1066:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1323, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC43(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1324, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC44(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4921:
	.size	_Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.rodata._Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i.str1.1,"aMS",@progbits,1
.LC45:
	.string	"Fail to run kernel equal scalar"
.LC46:
	.string	"Fail to sync kernel equal scalar"
	.section	.text._Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4922:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movss	%xmm0, 12(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1069
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL53__device_stub__Z19kernel_equal_scalarIfEvPKT_PS0_S0_iPKfPffi
.L1069:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1334, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC45(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1335, %edx
	leaq	.LC46(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4922:
	.size	_Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.rodata._Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i.str1.1,"aMS",@progbits,1
.LC47:
	.string	"Fail to run kernel greater scalar"
.LC48:
	.string	"Fail to sync kernel greater scalar"
	.section	.text._Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4923:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movss	%xmm0, 12(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1072
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL55__device_stub__Z21kernel_greater_scalarIfEvPKT_PS0_S0_iPKfPffi
.L1072:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1345, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC47(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1346, %edx
	leaq	.LC48(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4923:
	.size	_Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.rodata._Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i.str1.1,"aMS",@progbits,1
.LC49:
	.string	"Fail to run kernel less scalar"
.LC50:
	.string	"Fail to sync kernel less scalar"
	.section	.text._Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4924:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movss	%xmm0, 12(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1075
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL52__device_stub__Z18kernel_less_scalarIfEvPKT_PS0_S0_iPKfPffi
.L1075:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1356, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC49(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1357, %edx
	leaq	.LC50(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4924:
	.size	_Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.rodata._Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i.str1.1,"aMS",@progbits,1
.LC51:
	.string	"Fail to run kernel greater equal scalar"
.LC52:
	.string	"Fail to sync kernel greater equal scalar"
	.section	.text._Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4925:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movss	%xmm0, 12(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1078
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL61__device_stub__Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_iPKfPffi
.L1078:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1367, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC51(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1368, %edx
	leaq	.LC52(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4925:
	.size	_Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.rodata._Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i.str1.1,"aMS",@progbits,1
.LC53:
	.string	"Fail to run kernel less equal scalar"
.LC54:
	.string	"Fail to sync kernel less equal scalar"
	.section	.text._Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4926:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movss	%xmm0, 12(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1081
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL58__device_stub__Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_iPKfPffi
.L1081:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1378, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC53(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1379, %edx
	leaq	.LC54(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4926:
	.size	_Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.rodata._Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i.str1.1,"aMS",@progbits,1
.LC55:
	.string	"Fail to run kernel replace"
.LC56:
	.string	"Fail to sync kernel replace"
	.section	.text._Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4927:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1084
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL48__device_stub__Z14kernel_replaceIfEvPKT_S2_PS0_iPKfS0_Pfi
.L1084:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1389, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC55(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1390, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC56(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4927:
	.size	_Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4928:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movss	%xmm0, 12(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1087
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL55__device_stub__Z21kernel_replace_scalarIfEvPKT_PS0_S0_iPKfPffi
.L1087:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1400, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC55(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1401, %edx
	leaq	.LC56(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4928:
	.size	_Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.rodata._Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i.str1.1,"aMS",@progbits,1
.LC57:
	.string	"Fail to run kernel sum"
.LC58:
	.string	"Fail to sync kernel sum"
	.section	.text._Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB4929:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1090
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL41__device_stub__Z10kernel_sumIfEvPKT_PS0_iPKfPfi
.L1090:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1418, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC57(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1419, %edx
	leaq	.LC58(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4929:
	.size	_Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.rodata._Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i.str1.1,"aMS",@progbits,1
.LC59:
	.string	"Fail to run kernel min"
.LC60:
	.string	"Fail to sync kernel min"
	.section	.text._Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB4930:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1093
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL41__device_stub__Z10kernel_minIfEvPKT_PS0_iPKfPfi
.L1093:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1429, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC59(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1430, %edx
	leaq	.LC60(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4930:
	.size	_Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.rodata._Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i.str1.1,"aMS",@progbits,1
.LC61:
	.string	"Fail to run kernel max"
.LC62:
	.string	"Fail to sync kernel max"
	.section	.text._Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB4931:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1096
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL41__device_stub__Z10kernel_maxIfEvPKT_PS0_iPKfPfi
.L1096:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1440, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC61(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1441, %edx
	leaq	.LC62(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4931:
	.size	_Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.rodata._Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii.str1.1,"aMS",@progbits,1
.LC63:
	.string	"Fail to run kernel pad 2d"
.LC64:
	.string	"Fail to sync kernel pad 2d"
	.section	.text._Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,"axG",@progbits,_Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,comdat
	.weak	_Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.type	_Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, @function
_Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii:
.LFB4932:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movl	120(%rsp), %r15d
	movq	%rdx, (%rsp)
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	%rcx, 8(%rsp)
	movl	$1, %esi
	movl	$1, %ecx
	movl	$1, 32(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movl	136(%rsp), %ebp
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1099
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movl	%r12d, %edx
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movl	%r13d, %ecx
	movq	16(%rsp), %rdi
	call	_ZL49__device_stub__Z13kernel_pad_2dIfEvPKT_PS0_iiiiiiPKfPfiiiiii
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1099:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1458, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC63(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1459, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC64(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4932:
	.size	_Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, .-_Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.section	.rodata._Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii.str1.1,"aMS",@progbits,1
.LC65:
	.string	"Fail to run kernel unpad 2d"
.LC66:
	.string	"Fail to sync kernel unpad 2d"
	.section	.text._Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,"axG",@progbits,_Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,comdat
	.weak	_Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.type	_Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, @function
_Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii:
.LFB4933:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movl	120(%rsp), %r15d
	movq	%rdx, (%rsp)
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	%rcx, 8(%rsp)
	movl	$1, %esi
	movl	$1, %ecx
	movl	$1, 32(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movl	136(%rsp), %ebp
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1102
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movl	%r12d, %edx
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movl	%r13d, %ecx
	movq	16(%rsp), %rdi
	call	_ZL51__device_stub__Z15kernel_unpad_2dIfEvPKT_PS0_iiiiiiPKfPfiiiiii
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1102:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1470, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC65(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1471, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC66(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4933:
	.size	_Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, .-_Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.section	.rodata._Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii.str1.1,"aMS",@progbits,1
.LC67:
	.string	"Fail to run kernel pad 3d"
.LC68:
	.string	"Fail to sync kernel pad 3d"
	.section	.text._Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,"axG",@progbits,_Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,comdat
	.weak	_Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.type	_Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, @function
_Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii:
.LFB4934:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	(%rax), %rax
	movq	%rdx, (%rsp)
	movq	(%rdi), %rdx
	movl	128(%rsp), %ebx
	movq	%rcx, 8(%rsp)
	movl	8(%rdx), %esi
	movq	(%rdx), %rdi
	movl	%r8d, 20(%rsp)
	xorl	%r8d, %r8d
	movl	%r9d, 24(%rsp)
	movl	136(%rsp), %r12d
	xorl	%r9d, %r9d
	movl	%ebx, 28(%rsp)
	movl	144(%rsp), %r13d
	movq	%rdi, 40(%rsp)
	movl	152(%rsp), %r14d
	movl	%esi, 48(%rsp)
	movl	160(%rsp), %r15d
	movl	168(%rsp), %ebx
	movl	176(%rsp), %ebp
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1105
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	%r12d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 144
	pushq	%rbx
	.cfi_def_cfa_offset 152
	pushq	%r15
	.cfi_def_cfa_offset 160
	pushq	%r14
	.cfi_def_cfa_offset 168
	pushq	%r13
	.cfi_def_cfa_offset 176
	movl	76(%rsp), %r8d
	movl	72(%rsp), %ecx
	movl	68(%rsp), %edx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_ZL52__device_stub__Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiiiPKfPfiiiiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 128
.L1105:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1485, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC67(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1486, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC68(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4934:
	.size	_Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, .-_Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.section	.rodata._Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii.str1.1,"aMS",@progbits,1
.LC69:
	.string	"Fail to run kernel unpad 3d"
.LC70:
	.string	"Fail to sync kernel unpad 3d"
	.section	.text._Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,"axG",@progbits,_Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,comdat
	.weak	_Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.type	_Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, @function
_Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii:
.LFB4935:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	(%rax), %rax
	movq	%rdx, (%rsp)
	movq	(%rdi), %rdx
	movl	128(%rsp), %ebx
	movq	%rcx, 8(%rsp)
	movl	8(%rdx), %esi
	movq	(%rdx), %rdi
	movl	%r8d, 20(%rsp)
	xorl	%r8d, %r8d
	movl	%r9d, 24(%rsp)
	movl	136(%rsp), %r12d
	xorl	%r9d, %r9d
	movl	%ebx, 28(%rsp)
	movl	144(%rsp), %r13d
	movq	%rdi, 40(%rsp)
	movl	152(%rsp), %r14d
	movl	%esi, 48(%rsp)
	movl	160(%rsp), %r15d
	movl	168(%rsp), %ebx
	movl	176(%rsp), %ebp
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1108
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	%r12d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 144
	pushq	%rbx
	.cfi_def_cfa_offset 152
	pushq	%r15
	.cfi_def_cfa_offset 160
	pushq	%r14
	.cfi_def_cfa_offset 168
	pushq	%r13
	.cfi_def_cfa_offset 176
	movl	76(%rsp), %r8d
	movl	72(%rsp), %ecx
	movl	68(%rsp), %edx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_ZL54__device_stub__Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiiiPKfPfiiiiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 128
.L1108:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1497, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC69(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1498, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC70(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4935:
	.size	_Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, .-_Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.section	.rodata._Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii.str1.1,"aMS",@progbits,1
.LC71:
	.string	"Fail to run kernel grid 2d"
.LC72:
	.string	"Fail to sync kernel grid 2d"
	.section	.text._Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii,"axG",@progbits,_Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii,comdat
	.weak	_Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii
	.type	_Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii, @function
_Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii:
.LFB4936:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	movl	$1, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movl	$1, 16(%rsp)
	movl	80(%rsp), %r14d
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movl	$1, %esi
	movq	(%rax), %rdx
	movq	%rdi, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1111
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL46__device_stub__Z14kernel_grid_2dIfEvPT_S1_PdiiPfS_Pdii
.L1111:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1509, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC71(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$1510, %edx
	popq	%r12
	.cfi_def_cfa_offset 24
	leaq	.LC72(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4936:
	.size	_Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii, .-_Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii
	.section	.rodata._Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii.str1.1,"aMS",@progbits,1
.LC73:
	.string	"Fail to run kernel grid 3d"
.LC74:
	.string	"Fail to sync kernel grid 3d"
	.section	.text._Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii,"axG",@progbits,_Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii,comdat
	.weak	_Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii
	.type	_Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii, @function
_Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii:
.LFB4937:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r11
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movq	%rdx, 8(%rsp)
	movl	8(%rax), %esi
	movq	(%rax), %rdi
	movq	(%r11), %rax
	movl	120(%rsp), %r15d
	movq	%rdi, 24(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	movl	%esi, 32(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1114
	pushq	%rax
	.cfi_def_cfa_offset 120
	movq	%r13, %rcx
	movq	%r12, %rdx
	movl	%r15d, %r9d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdi
	movl	%r14d, %r8d
	movq	%rbp, %rsi
	call	_ZL50__device_stub__Z14kernel_grid_3dIfEvPT_S1_S1_PdiiiPfS_S_Pdiii
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L1114:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1521, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC73(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1522, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC74(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4937:
	.size	_Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii, .-_Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii
	.section	.rodata._Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i.str1.1,"aMS",@progbits,1
.LC75:
	.string	"Fail to run kernel affine 2d"
.LC76:
	.string	"Fail to sync kernel affine 2d"
	.section	.text._Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i,"axG",@progbits,_Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i,comdat
	.weak	_Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i
	.type	_Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i, @function
_Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i:
.LFB4938:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movq	96(%rsp), %r14
	movl	104(%rsp), %r15d
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1117
	movl	%r15d, %r9d
	movq	%r14, %r8
	movq	%r13, %rcx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL56__device_stub__Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_iPKfS0_PfS1_S0_i
.L1117:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1537, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC75(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1538, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC76(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4938:
	.size	_Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i, .-_Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i
	.section	.rodata._Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i.str1.1,"aMS",@progbits,1
.LC77:
	.string	"Fail to run kernel affine 3d"
.LC78:
	.string	"Fail to sync kernel affine 3d"
	.section	.text._Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i,"axG",@progbits,_Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i,comdat
	.weak	_Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i
	.type	_Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i, @function
_Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i:
.LFB4939:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movq	112(%rsp), %r14
	movq	120(%rsp), %r15
	movq	%rdx, (%rsp)
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movq	%rcx, 8(%rsp)
	movq	128(%rsp), %rbx
	movl	136(%rsp), %ebp
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1120
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movq	%r12, %rdx
	movq	%r15, %r9
	movq	%r14, %r8
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movq	%r13, %rcx
	movq	16(%rsp), %rdi
	call	_ZL62__device_stub__Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_iPKfS0_S0_PfS1_S1_S0_i
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1120:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1550, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC77(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1551, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC78(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4939:
	.size	_Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i, .-_Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i
	.section	.rodata._Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi.str1.1,"aMS",@progbits,1
.LC79:
	.string	"Fail to run kernel affine sod 2d"
.LC80:
	.string	"Fail to sync kernel affine sod 2d"
	.section	.text._Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi,"axG",@progbits,_Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi,comdat
	.weak	_Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi
	.type	_Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi, @function
_Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi:
.LFB4940:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movq	96(%rsp), %r14
	movl	104(%rsp), %r15d
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1123
	movl	%r15d, %r9d
	movq	%r14, %r8
	movq	%r13, %rcx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL60__device_stub__Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdiPKfS0_PfS1_PKdi
.L1123:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1563, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC79(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1564, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC80(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4940:
	.size	_Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi, .-_Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi
	.section	.rodata._Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi.str1.1,"aMS",@progbits,1
.LC81:
	.string	"Fail to run kernel affine sod 3d"
.LC82:
	.string	"Fail to sync kernel affine sod 3d"
	.section	.text._Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi,"axG",@progbits,_Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi,comdat
	.weak	_Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi
	.type	_Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi, @function
_Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi:
.LFB4941:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movq	112(%rsp), %r14
	movq	120(%rsp), %r15
	movq	%rdx, (%rsp)
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movq	%rcx, 8(%rsp)
	movq	128(%rsp), %rbx
	movl	136(%rsp), %ebp
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1126
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movq	%r12, %rdx
	movq	%r15, %r9
	movq	%r14, %r8
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movq	%r13, %rcx
	movq	16(%rsp), %rdi
	call	_ZL66__device_stub__Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdiPKfS0_S0_PfS1_S1_PKdi
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1126:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1576, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC81(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1577, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC82(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4941:
	.size	_Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi, .-_Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi
	.section	.rodata._Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i.str1.1,"aMS",@progbits,1
.LC83:
	.string	"Fail to run kernel dfield 2d"
.LC84:
	.string	"Fail to sync kernel dfield 2d"
	.section	.text._Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i,"axG",@progbits,_Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i,comdat
	.weak	_Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i
	.type	_Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i, @function
_Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i:
.LFB4942:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movq	112(%rsp), %r14
	movq	%rdx, 8(%rsp)
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movq	120(%rsp), %r15
	movl	128(%rsp), %ebx
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1129
	pushq	%rax
	.cfi_def_cfa_offset 120
	movq	%r13, %rcx
	movq	%r12, %rdx
	movq	%r15, %r9
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdi
	movq	%r14, %r8
	movq	%rbp, %rsi
	call	_ZL59__device_stub__Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_iPKfS0_S0_S0_PfS1_i
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L1129:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1589, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC83(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1590, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC84(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4942:
	.size	_Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i, .-_Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i
	.section	.rodata._Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i.str1.1,"aMS",@progbits,1
.LC85:
	.string	"Fail to run kernel dfield 3d"
.LC86:
	.string	"Fail to sync kernel dfield 3d"
	.section	.text._Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i,"axG",@progbits,_Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i,comdat
	.weak	_Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i
	.type	_Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i, @function
_Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i:
.LFB4943:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	(%rdi), %rax
	movq	%rdx, (%rsp)
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movq	%r8, 16(%rsp)
	xorl	%r8d, %r8d
	movl	(%rdx), %edx
	movq	%r9, 24(%rsp)
	xorl	%r9d, %r9d
	movl	%eax, 40(%rsp)
	movq	128(%rsp), %r12
	movabsq	$4294967297, %rax
	movl	%edx, 52(%rsp)
	movq	136(%rsp), %r13
	movq	%rcx, 8(%rsp)
	movq	144(%rsp), %r14
	movq	%rax, 44(%rsp)
	movq	152(%rsp), %r15
	movq	%rax, 56(%rsp)
	movq	160(%rsp), %rbx
	movl	168(%rsp), %ebp
	movl	60(%rsp), %ecx
	movq	52(%rsp), %rdx
	movq	40(%rsp), %rdi
	movl	48(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1132
	pushq	%rbp
	.cfi_def_cfa_offset 136
	movq	%r13, %r9
	movq	%r12, %r8
	pushq	%rbx
	.cfi_def_cfa_offset 144
	pushq	%r15
	.cfi_def_cfa_offset 152
	pushq	%r14
	.cfi_def_cfa_offset 160
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_ZL68__device_stub__Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKfS0_S0_S0_S0_S0_PfS1_S1_i
	addq	$32, %rsp
	.cfi_def_cfa_offset 128
.L1132:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1603, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC85(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1604, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC86(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4943:
	.size	_Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i, .-_Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i
	.section	.rodata._Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii.str1.1,"aMS",@progbits,1
.LC87:
	.string	"Fail to run kernel nearest interpolation 2d"
.LC88:
	.string	"Fail to sync kernel nearest interpolation 2d"
	.section	.text._Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,"axG",@progbits,_Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,comdat
	.weak	_Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.type	_Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, @function
_Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii:
.LFB4944:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movl	120(%rsp), %r15d
	movq	%rdx, (%rsp)
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	%rcx, 8(%rsp)
	movl	$1, %esi
	movl	$1, %ecx
	movl	$1, 32(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movl	136(%rsp), %ebp
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1135
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movq	%r12, %rdx
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movq	%r13, %rcx
	movq	16(%rsp), %rdi
	call	_ZL71__device_stub__Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1135:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1617, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC87(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1618, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC88(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4944:
	.size	_Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, .-_Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.section	.rodata._Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii.str1.1,"aMS",@progbits,1
.LC89:
	.string	"Fail to run kernel nearest interpolation 3d"
.LC90:
	.string	"Fail to sync kernel nearest interpolation 3d"
	.section	.text._Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,"axG",@progbits,_Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,comdat
	.weak	_Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.type	_Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii, @function
_Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii:
.LFB4945:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	(%rax), %rax
	movq	%rdx, 8(%rsp)
	movq	(%rdi), %rdx
	movq	144(%rsp), %rbx
	movq	%rcx, 16(%rsp)
	movl	8(%rdx), %esi
	movq	(%rdx), %rdi
	movq	%r8, 24(%rsp)
	xorl	%r8d, %r8d
	movq	%r9, 32(%rsp)
	movl	152(%rsp), %r12d
	xorl	%r9d, %r9d
	movq	%rbx, 40(%rsp)
	movl	160(%rsp), %r13d
	movq	%rdi, 56(%rsp)
	movl	168(%rsp), %r14d
	movl	%esi, 64(%rsp)
	movl	176(%rsp), %r15d
	movl	184(%rsp), %ebx
	movl	192(%rsp), %ebp
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1138
	pushq	%rax
	.cfi_def_cfa_offset 152
	movl	%r12d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 160
	pushq	%rbx
	.cfi_def_cfa_offset 168
	pushq	%r15
	.cfi_def_cfa_offset 176
	pushq	%r14
	.cfi_def_cfa_offset 184
	pushq	%r13
	.cfi_def_cfa_offset 192
	movq	88(%rsp), %r8
	movq	80(%rsp), %rcx
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_ZL76__device_stub__Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiiiPKfS0_S0_S0_Pfiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 144
.L1138:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1631, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC89(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1632, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC90(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4945:
	.size	_Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii, .-_Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.section	.rodata._Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii.str1.1,"aMS",@progbits,1
.LC91:
	.string	"Fail to run kernel linear interpolation 2d"
.LC92:
	.string	"Fail to sync kernel linear interpolation 2d"
	.section	.text._Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,"axG",@progbits,_Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,comdat
	.weak	_Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.type	_Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, @function
_Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii:
.LFB4946:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movl	120(%rsp), %r15d
	movq	%rdx, (%rsp)
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	%rcx, 8(%rsp)
	movl	$1, %esi
	movl	$1, %ecx
	movl	$1, 32(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movl	136(%rsp), %ebp
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1141
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movq	%r12, %rdx
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movq	%r13, %rcx
	movq	16(%rsp), %rdi
	call	_ZL70__device_stub__Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1141:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1645, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC91(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1646, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC92(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4946:
	.size	_Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, .-_Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.section	.rodata._Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii.str1.1,"aMS",@progbits,1
.LC93:
	.string	"Fail to run kernel linear interpolation 3d"
.LC94:
	.string	"Fail to sync kernel linear interpolation 3d"
	.section	.text._Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,"axG",@progbits,_Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,comdat
	.weak	_Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.type	_Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii, @function
_Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii:
.LFB4947:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	(%rax), %rax
	movq	%rdx, 8(%rsp)
	movq	(%rdi), %rdx
	movq	144(%rsp), %rbx
	movq	%rcx, 16(%rsp)
	movl	8(%rdx), %esi
	movq	(%rdx), %rdi
	movq	%r8, 24(%rsp)
	xorl	%r8d, %r8d
	movq	%r9, 32(%rsp)
	movl	152(%rsp), %r12d
	xorl	%r9d, %r9d
	movq	%rbx, 40(%rsp)
	movl	160(%rsp), %r13d
	movq	%rdi, 56(%rsp)
	movl	168(%rsp), %r14d
	movl	%esi, 64(%rsp)
	movl	176(%rsp), %r15d
	movl	184(%rsp), %ebx
	movl	192(%rsp), %ebp
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1144
	pushq	%rax
	.cfi_def_cfa_offset 152
	movl	%r12d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 160
	pushq	%rbx
	.cfi_def_cfa_offset 168
	pushq	%r15
	.cfi_def_cfa_offset 176
	pushq	%r14
	.cfi_def_cfa_offset 184
	pushq	%r13
	.cfi_def_cfa_offset 192
	movq	88(%rsp), %r8
	movq	80(%rsp), %rcx
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_ZL75__device_stub__Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiiiPKfS0_S0_S0_Pfiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 144
.L1144:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1659, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC93(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1660, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC94(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4947:
	.size	_Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii, .-_Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.section	.rodata._Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii.str1.1,"aMS",@progbits,1
.LC95:
	.string	"Fail to run kernel cubic interpolation 2d"
.LC96:
	.string	"Fail to sync kernel cubic interpolation 2d"
	.section	.text._Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,"axG",@progbits,_Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,comdat
	.weak	_Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.type	_Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, @function
_Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii:
.LFB4948:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movl	120(%rsp), %r15d
	movq	%rdx, (%rsp)
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	%rcx, 8(%rsp)
	movl	$1, %esi
	movl	$1, %ecx
	movl	$1, 32(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movl	136(%rsp), %ebp
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1147
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movq	%r12, %rdx
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movq	%r13, %rcx
	movq	16(%rsp), %rdi
	call	_ZL69__device_stub__Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiiiPKfS0_S0_Pfiiii
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1147:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1673, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC95(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1674, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC96(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4948:
	.size	_Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, .-_Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.section	.rodata._Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii.str1.1,"aMS",@progbits,1
.LC97:
	.string	"Fail to run kernel gradient x"
.LC98:
	.string	"Fail to sync kernel gradient x"
	.section	.text._Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, @function
_Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii:
.LFB4949:
	.cfi_startproc
	endbr64
	movabsq	$4294967297, %rax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%r9d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rsi), %rdx
	movq	(%rdi), %rsi
	movq	%rax, 12(%rsp)
	movl	80(%rsp), %r14d
	movq	%rax, 20(%rsp)
	movl	8(%rdx), %eax
	movq	(%rsi), %rcx
	movq	(%rdx), %rdx
	movl	$1, 28(%rsp)
	testl	%eax, %eax
	jne	.L1150
	movq	%rcx, 8(%rsp)
	movq	%rdx, 20(%rsp)
	jmp	.L1151
.L1150:
	movl	8(%rsi), %esi
	movq	%rcx, 8(%rsp)
	movq	%rdx, 20(%rsp)
	movl	%esi, 16(%rsp)
	movl	%eax, 28(%rsp)
.L1151:
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1152
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL49__device_stub__Z16kernel_gradientxIfEvPKT_PS0_iiiPKfPfiii
.L1152:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1710, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC97(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$1711, %edx
	popq	%r12
	.cfi_def_cfa_offset 24
	leaq	.LC98(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4949:
	.size	_Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .-_Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.section	.rodata._Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii.str1.1,"aMS",@progbits,1
.LC99:
	.string	"Fail to run kernel gradient y"
.LC100:
	.string	"Fail to sync kernel gradient y"
	.section	.text._Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, @function
_Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii:
.LFB4950:
	.cfi_startproc
	endbr64
	movabsq	$4294967297, %rax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%r9d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rsi), %rdx
	movq	(%rdi), %rsi
	movq	%rax, 12(%rsp)
	movl	80(%rsp), %r14d
	movq	%rax, 20(%rsp)
	movl	8(%rdx), %eax
	movq	(%rsi), %rcx
	movq	(%rdx), %rdx
	movl	$1, 28(%rsp)
	testl	%eax, %eax
	jne	.L1155
	movq	%rcx, 8(%rsp)
	movq	%rdx, 20(%rsp)
	jmp	.L1156
.L1155:
	movl	8(%rsi), %esi
	movq	%rcx, 8(%rsp)
	movq	%rdx, 20(%rsp)
	movl	%esi, 16(%rsp)
	movl	%eax, 28(%rsp)
.L1156:
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1157
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL49__device_stub__Z16kernel_gradientyIfEvPKT_PS0_iiiPKfPfiii
.L1157:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1732, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC99(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$1733, %edx
	popq	%r12
	.cfi_def_cfa_offset 24
	leaq	.LC100(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4950:
	.size	_Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .-_Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.section	.rodata._Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii.str1.1,"aMS",@progbits,1
.LC101:
	.string	"Fail to run kernel gradient z"
.LC102:
	.string	"Fail to sync kernel gradient z"
	.section	.text._Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, @function
_Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii:
.LFB4951:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rsi, %r10
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movl	80(%rsp), %r14d
	movl	8(%rax), %esi
	movq	(%rax), %rdi
	movq	(%r10), %rax
	movq	%rdi, 8(%rsp)
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	movl	%esi, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1160
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL49__device_stub__Z16kernel_gradientzIfEvPKT_PS0_iiiPKfPfiii
.L1160:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1744, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC101(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$1745, %edx
	popq	%r12
	.cfi_def_cfa_offset 24
	leaq	.LC102(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4951:
	.size	_Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .-_Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.section	.rodata._Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii.str1.1,"aMS",@progbits,1
.LC103:
	.string	"Fail to run kernel convolution 2d"
.LC104:
	.string	"Fail to sync kernel convolution 2d"
	.section	.text._Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii,"axG",@progbits,_Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii,comdat
	.weak	_Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii
	.type	_Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii, @function
_Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii:
.LFB4952:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	movl	$1, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movl	120(%rsp), %r15d
	movq	%rdx, 8(%rsp)
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movl	$1, %esi
	movl	$1, 32(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1163
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movl	%r15d, %r9d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdi
	movl	%r14d, %r8d
	movq	%rbp, %rsi
	call	_ZL58__device_stub__Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiiiPKfS0_Pfiiii
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L1163:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1756, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC103(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1757, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC104(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4952:
	.size	_Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii, .-_Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii
	.section	.rodata._Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii.str1.1,"aMS",@progbits,1
.LC105:
	.string	"Fail to run kernel convolution 3d"
.LC106:
	.string	"Fail to sync kernel convolution 3d"
	.section	.text._Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii,"axG",@progbits,_Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii,comdat
	.weak	_Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii
	.type	_Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii, @function
_Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii:
.LFB4953:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r9d, %r12d
	xorl	%r9d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	(%rax), %rax
	movq	%rdx, 8(%rsp)
	movq	(%rdi), %rdx
	movq	%rcx, 16(%rsp)
	movl	8(%rax), %ecx
	movl	8(%rdx), %esi
	movq	(%rdx), %rdi
	movq	%r8, 24(%rsp)
	xorl	%r8d, %r8d
	movq	(%rax), %rdx
	movl	128(%rsp), %r13d
	movq	%rdi, 40(%rsp)
	movl	136(%rsp), %r14d
	movl	%esi, 48(%rsp)
	movl	144(%rsp), %r15d
	movl	152(%rsp), %ebx
	movl	160(%rsp), %ebp
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1166
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	%r14d, %r9d
	movl	%r13d, %r8d
	movl	%r12d, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 144
	pushq	%rbx
	.cfi_def_cfa_offset 152
	pushq	%r15
	.cfi_def_cfa_offset 160
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_ZL60__device_stub__Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiiiPKfS0_Pfiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 128
.L1166:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1768, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC105(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1769, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC106(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4953:
	.size	_Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii, .-_Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii
	.section	.text._Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i, @function
_Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i:
.LFB4954:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdx, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movsd	%xmm0, 8(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1169
	movl	%ebp, %esi
	movq	%rbx, %rdi
	call	_ZL42__device_stub__Z13kernel_assignIdEvPT_S0_iPddi
.L1169:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1099, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC7(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 16
	movl	%eax, %edi
	leaq	.LC8(%rip), %rcx
	movl	$1100, %edx
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4954:
	.size	_Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i, .-_Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i
	.section	.text._Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB4955:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1172
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL42__device_stub__Z11kernel_copyIdEvPKT_PS0_iPKdPdi
.L1172:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1111, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC9(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1112, %edx
	leaq	.LC10(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4955:
	.size	_Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.text._Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4956:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1175
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL44__device_stub__Z10kernel_addIdEvPKT_S2_PS0_iPKdS0_Pdi
.L1175:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1224, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC11(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1225, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC12(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4956:
	.size	_Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4957:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1178
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL44__device_stub__Z10kernel_subIdEvPKT_S2_PS0_iPKdS0_Pdi
.L1178:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1235, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC13(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1236, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC14(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4957:
	.size	_Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4958:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1181
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL44__device_stub__Z10kernel_mulIdEvPKT_S2_PS0_iPKdS0_Pdi
.L1181:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1246, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC15(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1247, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC16(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4958:
	.size	_Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4959:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1184
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL44__device_stub__Z10kernel_divIdEvPKT_S2_PS0_iPKdS0_Pdi
.L1184:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1257, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC17(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1258, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC18(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4959:
	.size	_Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4960:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1187
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL44__device_stub__Z10kernel_powIdEvPKT_S2_PS0_iPKdS0_Pdi
.L1187:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1268, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC19(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1269, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC20(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4960:
	.size	_Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4961:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movsd	%xmm0, 8(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1190
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_add_scalarIdEvPKT_PS0_S0_iPKdPddi
.L1190:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1136, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC21(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1137, %edx
	leaq	.LC22(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4961:
	.size	_Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4962:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movsd	%xmm0, 8(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1193
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_sub_scalarIdEvPKT_PS0_S0_iPKdPddi
.L1193:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1147, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC23(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1148, %edx
	leaq	.LC24(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4962:
	.size	_Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4963:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movsd	%xmm0, 8(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1196
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL55__device_stub__Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_iPKdPddi
.L1196:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1158, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC25(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1159, %edx
	leaq	.LC26(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4963:
	.size	_Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4964:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movsd	%xmm0, 8(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1199
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_mul_scalarIdEvPKT_PS0_S0_iPKdPddi
.L1199:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1169, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC27(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1170, %edx
	leaq	.LC28(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4964:
	.size	_Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4965:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movsd	%xmm0, 8(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1202
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_div_scalarIdEvPKT_PS0_S0_iPKdPddi
.L1202:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1180, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC29(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1181, %edx
	leaq	.LC30(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4965:
	.size	_Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4966:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movsd	%xmm0, 8(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1205
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL55__device_stub__Z21kernel_div_scalar_invIdEvPKT_PS0_S0_iPKdPddi
.L1205:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1191, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC31(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1192, %edx
	leaq	.LC32(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4966:
	.size	_Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4967:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movsd	%xmm0, 8(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1208
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_pow_scalarIdEvPKT_PS0_S0_iPKdPddi
.L1208:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1202, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC33(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1203, %edx
	leaq	.LC34(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4967:
	.size	_Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4968:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movsd	%xmm0, 8(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1211
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL55__device_stub__Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_iPKdPddi
.L1211:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1213, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC35(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1214, %edx
	leaq	.LC36(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4968:
	.size	_Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4969:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1214
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL46__device_stub__Z12kernel_equalIdEvPKT_S2_PS0_iPKdS0_Pdi
.L1214:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1279, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC37(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1280, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC38(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4969:
	.size	_Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4970:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1217
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL48__device_stub__Z14kernel_greaterIdEvPKT_S2_PS0_iPKdS0_Pdi
.L1217:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1290, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC39(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1291, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC40(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4970:
	.size	_Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4971:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1220
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL45__device_stub__Z11kernel_lessIdEvPKT_S2_PS0_iPKdS0_Pdi
.L1220:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1301, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC39(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1302, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC40(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4971:
	.size	_Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4972:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1223
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL54__device_stub__Z20kernel_greater_equalIdEvPKT_S2_PS0_iPKdS0_Pdi
.L1223:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1312, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC41(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1313, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC42(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4972:
	.size	_Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4973:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1226
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_less_equalIdEvPKT_S2_PS0_iPKdS0_Pdi
.L1226:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1323, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC43(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1324, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC44(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4973:
	.size	_Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4974:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movsd	%xmm0, 8(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1229
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL53__device_stub__Z19kernel_equal_scalarIdEvPKT_PS0_S0_iPKdPddi
.L1229:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1334, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC45(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1335, %edx
	leaq	.LC46(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4974:
	.size	_Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4975:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movsd	%xmm0, 8(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1232
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL55__device_stub__Z21kernel_greater_scalarIdEvPKT_PS0_S0_iPKdPddi
.L1232:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1345, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC47(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1346, %edx
	leaq	.LC48(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4975:
	.size	_Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4976:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movsd	%xmm0, 8(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1235
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL52__device_stub__Z18kernel_less_scalarIdEvPKT_PS0_S0_iPKdPddi
.L1235:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1356, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC49(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1357, %edx
	leaq	.LC50(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4976:
	.size	_Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4977:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movsd	%xmm0, 8(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1238
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL61__device_stub__Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_iPKdPddi
.L1238:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1367, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC51(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1368, %edx
	leaq	.LC52(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4977:
	.size	_Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4978:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movsd	%xmm0, 8(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1241
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL58__device_stub__Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_iPKdPddi
.L1241:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1378, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC53(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1379, %edx
	leaq	.LC54(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4978:
	.size	_Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB4979:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1244
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL48__device_stub__Z14kernel_replaceIdEvPKT_S2_PS0_iPKdS0_Pdi
.L1244:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1389, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC55(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1390, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC56(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4979:
	.size	_Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB4980:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movsd	%xmm0, 8(%rsp)
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L1247
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL55__device_stub__Z21kernel_replace_scalarIdEvPKT_PS0_S0_iPKdPddi
.L1247:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1400, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC55(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1401, %edx
	leaq	.LC56(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4980:
	.size	_Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB4981:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1250
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL41__device_stub__Z10kernel_sumIdEvPKT_PS0_iPKdPdi
.L1250:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1418, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC57(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1419, %edx
	leaq	.LC58(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4981:
	.size	_Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.text._Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB4982:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1253
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL41__device_stub__Z10kernel_minIdEvPKT_PS0_iPKdPdi
.L1253:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1429, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC59(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1430, %edx
	leaq	.LC60(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4982:
	.size	_Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.text._Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB4983:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1256
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL41__device_stub__Z10kernel_maxIdEvPKT_PS0_iPKdPdi
.L1256:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1440, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC61(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1441, %edx
	leaq	.LC62(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4983:
	.size	_Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.text._Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,"axG",@progbits,_Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,comdat
	.weak	_Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.type	_Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, @function
_Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii:
.LFB4984:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movl	120(%rsp), %r15d
	movq	%rdx, (%rsp)
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	%rcx, 8(%rsp)
	movl	$1, %esi
	movl	$1, %ecx
	movl	$1, 32(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movl	136(%rsp), %ebp
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1259
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movl	%r12d, %edx
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movl	%r13d, %ecx
	movq	16(%rsp), %rdi
	call	_ZL49__device_stub__Z13kernel_pad_2dIdEvPKT_PS0_iiiiiiPKdPdiiiiii
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1259:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1458, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC63(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1459, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC64(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4984:
	.size	_Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, .-_Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.section	.text._Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,"axG",@progbits,_Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,comdat
	.weak	_Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.type	_Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, @function
_Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii:
.LFB4985:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movl	120(%rsp), %r15d
	movq	%rdx, (%rsp)
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	%rcx, 8(%rsp)
	movl	$1, %esi
	movl	$1, %ecx
	movl	$1, 32(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movl	136(%rsp), %ebp
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1262
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movl	%r12d, %edx
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movl	%r13d, %ecx
	movq	16(%rsp), %rdi
	call	_ZL51__device_stub__Z15kernel_unpad_2dIdEvPKT_PS0_iiiiiiPKdPdiiiiii
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1262:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1470, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC65(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1471, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC66(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4985:
	.size	_Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, .-_Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.section	.text._Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,"axG",@progbits,_Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,comdat
	.weak	_Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.type	_Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, @function
_Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii:
.LFB4986:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	(%rax), %rax
	movq	%rdx, (%rsp)
	movq	(%rdi), %rdx
	movl	128(%rsp), %ebx
	movq	%rcx, 8(%rsp)
	movl	8(%rdx), %esi
	movq	(%rdx), %rdi
	movl	%r8d, 20(%rsp)
	xorl	%r8d, %r8d
	movl	%r9d, 24(%rsp)
	movl	136(%rsp), %r12d
	xorl	%r9d, %r9d
	movl	%ebx, 28(%rsp)
	movl	144(%rsp), %r13d
	movq	%rdi, 40(%rsp)
	movl	152(%rsp), %r14d
	movl	%esi, 48(%rsp)
	movl	160(%rsp), %r15d
	movl	168(%rsp), %ebx
	movl	176(%rsp), %ebp
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1265
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	%r12d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 144
	pushq	%rbx
	.cfi_def_cfa_offset 152
	pushq	%r15
	.cfi_def_cfa_offset 160
	pushq	%r14
	.cfi_def_cfa_offset 168
	pushq	%r13
	.cfi_def_cfa_offset 176
	movl	76(%rsp), %r8d
	movl	72(%rsp), %ecx
	movl	68(%rsp), %edx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_ZL52__device_stub__Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiiiPKdPdiiiiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 128
.L1265:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1485, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC67(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1486, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC68(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4986:
	.size	_Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, .-_Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.section	.text._Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,"axG",@progbits,_Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,comdat
	.weak	_Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.type	_Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, @function
_Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii:
.LFB4987:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	(%rax), %rax
	movq	%rdx, (%rsp)
	movq	(%rdi), %rdx
	movl	128(%rsp), %ebx
	movq	%rcx, 8(%rsp)
	movl	8(%rdx), %esi
	movq	(%rdx), %rdi
	movl	%r8d, 20(%rsp)
	xorl	%r8d, %r8d
	movl	%r9d, 24(%rsp)
	movl	136(%rsp), %r12d
	xorl	%r9d, %r9d
	movl	%ebx, 28(%rsp)
	movl	144(%rsp), %r13d
	movq	%rdi, 40(%rsp)
	movl	152(%rsp), %r14d
	movl	%esi, 48(%rsp)
	movl	160(%rsp), %r15d
	movl	168(%rsp), %ebx
	movl	176(%rsp), %ebp
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1268
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	%r12d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 144
	pushq	%rbx
	.cfi_def_cfa_offset 152
	pushq	%r15
	.cfi_def_cfa_offset 160
	pushq	%r14
	.cfi_def_cfa_offset 168
	pushq	%r13
	.cfi_def_cfa_offset 176
	movl	76(%rsp), %r8d
	movl	72(%rsp), %ecx
	movl	68(%rsp), %edx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_ZL54__device_stub__Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiiiPKdPdiiiiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 128
.L1268:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1497, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC69(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1498, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC70(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4987:
	.size	_Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, .-_Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.section	.text._Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii,"axG",@progbits,_Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii,comdat
	.weak	_Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii
	.type	_Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii, @function
_Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii:
.LFB4988:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	movl	$1, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movl	$1, 16(%rsp)
	movl	80(%rsp), %r14d
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movl	$1, %esi
	movq	(%rax), %rdx
	movq	%rdi, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1271
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL46__device_stub__Z14kernel_grid_2dIdEvPT_S1_PdiiPdS_S_ii
.L1271:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1509, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC71(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$1510, %edx
	popq	%r12
	.cfi_def_cfa_offset 24
	leaq	.LC72(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4988:
	.size	_Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii, .-_Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii
	.section	.text._Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii,"axG",@progbits,_Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii,comdat
	.weak	_Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii
	.type	_Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii, @function
_Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii:
.LFB4989:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r11
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movq	%rdx, 8(%rsp)
	movl	8(%rax), %esi
	movq	(%rax), %rdi
	movq	(%r11), %rax
	movl	120(%rsp), %r15d
	movq	%rdi, 24(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	movl	%esi, 32(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1274
	pushq	%rax
	.cfi_def_cfa_offset 120
	movq	%r13, %rcx
	movq	%r12, %rdx
	movl	%r15d, %r9d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdi
	movl	%r14d, %r8d
	movq	%rbp, %rsi
	call	_ZL50__device_stub__Z14kernel_grid_3dIdEvPT_S1_S1_PdiiiPdS_S_S_iii
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L1274:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1521, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC73(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1522, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC74(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4989:
	.size	_Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii, .-_Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii
	.section	.text._Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i,"axG",@progbits,_Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i,comdat
	.weak	_Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i
	.type	_Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i, @function
_Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i:
.LFB4990:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movq	96(%rsp), %r14
	movl	104(%rsp), %r15d
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1277
	movl	%r15d, %r9d
	movq	%r14, %r8
	movq	%r13, %rcx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL56__device_stub__Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_iPKdS0_PdS1_S0_i
.L1277:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1537, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC75(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1538, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC76(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4990:
	.size	_Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i, .-_Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i
	.section	.text._Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i,"axG",@progbits,_Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i,comdat
	.weak	_Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i
	.type	_Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i, @function
_Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i:
.LFB4991:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movq	112(%rsp), %r14
	movq	120(%rsp), %r15
	movq	%rdx, (%rsp)
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movq	%rcx, 8(%rsp)
	movq	128(%rsp), %rbx
	movl	136(%rsp), %ebp
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1280
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movq	%r12, %rdx
	movq	%r15, %r9
	movq	%r14, %r8
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movq	%r13, %rcx
	movq	16(%rsp), %rdi
	call	_ZL62__device_stub__Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_iPKdS0_S0_PdS1_S1_S0_i
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1280:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1550, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC77(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1551, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC78(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4991:
	.size	_Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i, .-_Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i
	.section	.text._Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi,"axG",@progbits,_Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi,comdat
	.weak	_Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi
	.type	_Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi, @function
_Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi:
.LFB4992:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movq	96(%rsp), %r14
	movl	104(%rsp), %r15d
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1283
	movl	%r15d, %r9d
	movq	%r14, %r8
	movq	%r13, %rcx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL60__device_stub__Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdiPKdS0_PdS1_S0_i
.L1283:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1563, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC79(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1564, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC80(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4992:
	.size	_Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi, .-_Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi
	.section	.text._Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi,"axG",@progbits,_Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi,comdat
	.weak	_Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi
	.type	_Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi, @function
_Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi:
.LFB4993:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movq	112(%rsp), %r14
	movq	120(%rsp), %r15
	movq	%rdx, (%rsp)
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movq	%rcx, 8(%rsp)
	movq	128(%rsp), %rbx
	movl	136(%rsp), %ebp
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1286
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movq	%r12, %rdx
	movq	%r15, %r9
	movq	%r14, %r8
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movq	%r13, %rcx
	movq	16(%rsp), %rdi
	call	_ZL66__device_stub__Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdiPKdS0_S0_PdS1_S1_S0_i
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1286:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1576, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC81(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1577, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC82(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4993:
	.size	_Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi, .-_Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi
	.section	.text._Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i,"axG",@progbits,_Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i,comdat
	.weak	_Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i
	.type	_Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i, @function
_Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i:
.LFB4994:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movq	112(%rsp), %r14
	movq	%rdx, 8(%rsp)
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movq	120(%rsp), %r15
	movl	128(%rsp), %ebx
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1289
	pushq	%rax
	.cfi_def_cfa_offset 120
	movq	%r13, %rcx
	movq	%r12, %rdx
	movq	%r15, %r9
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdi
	movq	%r14, %r8
	movq	%rbp, %rsi
	call	_ZL59__device_stub__Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_iPKdS0_S0_S0_PdS1_i
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L1289:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1589, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC83(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1590, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC84(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4994:
	.size	_Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i, .-_Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i
	.section	.text._Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i,"axG",@progbits,_Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i,comdat
	.weak	_Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i
	.type	_Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i, @function
_Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i:
.LFB4995:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	(%rdi), %rax
	movq	%rdx, (%rsp)
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movq	%r8, 16(%rsp)
	xorl	%r8d, %r8d
	movl	(%rdx), %edx
	movq	%r9, 24(%rsp)
	xorl	%r9d, %r9d
	movl	%eax, 40(%rsp)
	movq	128(%rsp), %r12
	movabsq	$4294967297, %rax
	movl	%edx, 52(%rsp)
	movq	136(%rsp), %r13
	movq	%rcx, 8(%rsp)
	movq	144(%rsp), %r14
	movq	%rax, 44(%rsp)
	movq	152(%rsp), %r15
	movq	%rax, 56(%rsp)
	movq	160(%rsp), %rbx
	movl	168(%rsp), %ebp
	movl	60(%rsp), %ecx
	movq	52(%rsp), %rdx
	movq	40(%rsp), %rdi
	movl	48(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1292
	pushq	%rbp
	.cfi_def_cfa_offset 136
	movq	%r13, %r9
	movq	%r12, %r8
	pushq	%rbx
	.cfi_def_cfa_offset 144
	pushq	%r15
	.cfi_def_cfa_offset 152
	pushq	%r14
	.cfi_def_cfa_offset 160
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_ZL68__device_stub__Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKdS0_S0_S0_S0_S0_PdS1_S1_i
	addq	$32, %rsp
	.cfi_def_cfa_offset 128
.L1292:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1603, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC85(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1604, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC86(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4995:
	.size	_Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i, .-_Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i
	.section	.text._Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,"axG",@progbits,_Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,comdat
	.weak	_Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.type	_Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, @function
_Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii:
.LFB4996:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movl	120(%rsp), %r15d
	movq	%rdx, (%rsp)
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	%rcx, 8(%rsp)
	movl	$1, %esi
	movl	$1, %ecx
	movl	$1, 32(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movl	136(%rsp), %ebp
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1295
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movq	%r12, %rdx
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movq	%r13, %rcx
	movq	16(%rsp), %rdi
	call	_ZL71__device_stub__Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1295:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1617, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC87(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1618, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC88(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4996:
	.size	_Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, .-_Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.section	.text._Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,"axG",@progbits,_Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,comdat
	.weak	_Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.type	_Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii, @function
_Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii:
.LFB4997:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	(%rax), %rax
	movq	%rdx, 8(%rsp)
	movq	(%rdi), %rdx
	movq	144(%rsp), %rbx
	movq	%rcx, 16(%rsp)
	movl	8(%rdx), %esi
	movq	(%rdx), %rdi
	movq	%r8, 24(%rsp)
	xorl	%r8d, %r8d
	movq	%r9, 32(%rsp)
	movl	152(%rsp), %r12d
	xorl	%r9d, %r9d
	movq	%rbx, 40(%rsp)
	movl	160(%rsp), %r13d
	movq	%rdi, 56(%rsp)
	movl	168(%rsp), %r14d
	movl	%esi, 64(%rsp)
	movl	176(%rsp), %r15d
	movl	184(%rsp), %ebx
	movl	192(%rsp), %ebp
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1298
	pushq	%rax
	.cfi_def_cfa_offset 152
	movl	%r12d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 160
	pushq	%rbx
	.cfi_def_cfa_offset 168
	pushq	%r15
	.cfi_def_cfa_offset 176
	pushq	%r14
	.cfi_def_cfa_offset 184
	pushq	%r13
	.cfi_def_cfa_offset 192
	movq	88(%rsp), %r8
	movq	80(%rsp), %rcx
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_ZL76__device_stub__Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 144
.L1298:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1631, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC89(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1632, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC90(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4997:
	.size	_Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii, .-_Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.section	.text._Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,"axG",@progbits,_Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,comdat
	.weak	_Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.type	_Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, @function
_Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii:
.LFB4998:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movl	120(%rsp), %r15d
	movq	%rdx, (%rsp)
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	%rcx, 8(%rsp)
	movl	$1, %esi
	movl	$1, %ecx
	movl	$1, 32(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movl	136(%rsp), %ebp
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1301
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movq	%r12, %rdx
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movq	%r13, %rcx
	movq	16(%rsp), %rdi
	call	_ZL70__device_stub__Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1301:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1645, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC91(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1646, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC92(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4998:
	.size	_Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, .-_Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.section	.text._Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,"axG",@progbits,_Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,comdat
	.weak	_Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.type	_Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii, @function
_Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii:
.LFB4999:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	(%rax), %rax
	movq	%rdx, 8(%rsp)
	movq	(%rdi), %rdx
	movq	144(%rsp), %rbx
	movq	%rcx, 16(%rsp)
	movl	8(%rdx), %esi
	movq	(%rdx), %rdi
	movq	%r8, 24(%rsp)
	xorl	%r8d, %r8d
	movq	%r9, 32(%rsp)
	movl	152(%rsp), %r12d
	xorl	%r9d, %r9d
	movq	%rbx, 40(%rsp)
	movl	160(%rsp), %r13d
	movq	%rdi, 56(%rsp)
	movl	168(%rsp), %r14d
	movl	%esi, 64(%rsp)
	movl	176(%rsp), %r15d
	movl	184(%rsp), %ebx
	movl	192(%rsp), %ebp
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1304
	pushq	%rax
	.cfi_def_cfa_offset 152
	movl	%r12d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 160
	pushq	%rbx
	.cfi_def_cfa_offset 168
	pushq	%r15
	.cfi_def_cfa_offset 176
	pushq	%r14
	.cfi_def_cfa_offset 184
	pushq	%r13
	.cfi_def_cfa_offset 192
	movq	88(%rsp), %r8
	movq	80(%rsp), %rcx
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_ZL75__device_stub__Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 144
.L1304:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1659, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC93(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1660, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC94(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE4999:
	.size	_Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii, .-_Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.section	.text._Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,"axG",@progbits,_Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,comdat
	.weak	_Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.type	_Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, @function
_Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii:
.LFB5000:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movl	120(%rsp), %r15d
	movq	%rdx, (%rsp)
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	%rcx, 8(%rsp)
	movl	$1, %esi
	movl	$1, %ecx
	movl	$1, 32(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movl	136(%rsp), %ebp
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1307
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movq	%r12, %rdx
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movq	%r13, %rcx
	movq	16(%rsp), %rdi
	call	_ZL69__device_stub__Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiiiPKdS0_S0_Pdiiii
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1307:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1673, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC95(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1674, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC96(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5000:
	.size	_Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, .-_Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.section	.rodata._Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii.str1.1,"aMS",@progbits,1
.LC107:
	.string	"Fail to run kernel cubic interpolation 3d"
.LC108:
	.string	"Fail to sync kernel cubic interpolation 3d"
	.section	.text._Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,"axG",@progbits,_Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,comdat
	.weak	_Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.type	_Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii, @function
_Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii:
.LFB5001:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	(%rax), %rax
	movq	%rdx, 8(%rsp)
	movq	(%rdi), %rdx
	movq	144(%rsp), %rbx
	movq	%rcx, 16(%rsp)
	movl	8(%rdx), %esi
	movq	(%rdx), %rdi
	movq	%r8, 24(%rsp)
	xorl	%r8d, %r8d
	movq	%r9, 32(%rsp)
	movl	152(%rsp), %r12d
	xorl	%r9d, %r9d
	movq	%rbx, 40(%rsp)
	movl	160(%rsp), %r13d
	movq	%rdi, 56(%rsp)
	movl	168(%rsp), %r14d
	movl	%esi, 64(%rsp)
	movl	176(%rsp), %r15d
	movl	184(%rsp), %ebx
	movl	192(%rsp), %ebp
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1310
	pushq	%rax
	.cfi_def_cfa_offset 152
	movl	%r12d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 160
	pushq	%rbx
	.cfi_def_cfa_offset 168
	pushq	%r15
	.cfi_def_cfa_offset 176
	pushq	%r14
	.cfi_def_cfa_offset 184
	pushq	%r13
	.cfi_def_cfa_offset 192
	movq	88(%rsp), %r8
	movq	80(%rsp), %rcx
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_ZL74__device_stub__Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiiiPKdS0_S0_S0_Pdiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 144
.L1310:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1687, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC107(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1688, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC108(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5001:
	.size	_Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii, .-_Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.section	.text._Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, @function
_Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii:
.LFB5002:
	.cfi_startproc
	endbr64
	movabsq	$4294967297, %rax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%r9d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rsi), %rdx
	movq	(%rdi), %rsi
	movq	%rax, 12(%rsp)
	movl	80(%rsp), %r14d
	movq	%rax, 20(%rsp)
	movl	8(%rdx), %eax
	movq	(%rsi), %rcx
	movq	(%rdx), %rdx
	movl	$1, 28(%rsp)
	testl	%eax, %eax
	jne	.L1313
	movq	%rcx, 8(%rsp)
	movq	%rdx, 20(%rsp)
	jmp	.L1314
.L1313:
	movl	8(%rsi), %esi
	movq	%rcx, 8(%rsp)
	movq	%rdx, 20(%rsp)
	movl	%esi, 16(%rsp)
	movl	%eax, 28(%rsp)
.L1314:
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1315
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL49__device_stub__Z16kernel_gradientxIdEvPKT_PS0_iiiPKdPdiii
.L1315:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1710, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC97(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$1711, %edx
	popq	%r12
	.cfi_def_cfa_offset 24
	leaq	.LC98(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5002:
	.size	_Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .-_Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.section	.text._Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, @function
_Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii:
.LFB5003:
	.cfi_startproc
	endbr64
	movabsq	$4294967297, %rax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%r9d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rsi), %rdx
	movq	(%rdi), %rsi
	movq	%rax, 12(%rsp)
	movl	80(%rsp), %r14d
	movq	%rax, 20(%rsp)
	movl	8(%rdx), %eax
	movq	(%rsi), %rcx
	movq	(%rdx), %rdx
	movl	$1, 28(%rsp)
	testl	%eax, %eax
	jne	.L1318
	movq	%rcx, 8(%rsp)
	movq	%rdx, 20(%rsp)
	jmp	.L1319
.L1318:
	movl	8(%rsi), %esi
	movq	%rcx, 8(%rsp)
	movq	%rdx, 20(%rsp)
	movl	%esi, 16(%rsp)
	movl	%eax, 28(%rsp)
.L1319:
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1320
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL49__device_stub__Z16kernel_gradientyIdEvPKT_PS0_iiiPKdPdiii
.L1320:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1732, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC99(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$1733, %edx
	popq	%r12
	.cfi_def_cfa_offset 24
	leaq	.LC100(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5003:
	.size	_Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .-_Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.section	.text._Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, @function
_Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii:
.LFB5004:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rsi, %r10
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movl	80(%rsp), %r14d
	movl	8(%rax), %esi
	movq	(%rax), %rdi
	movq	(%r10), %rax
	movq	%rdi, 8(%rsp)
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	movl	%esi, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1323
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL49__device_stub__Z16kernel_gradientzIdEvPKT_PS0_iiiPKdPdiii
.L1323:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1744, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC101(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$1745, %edx
	popq	%r12
	.cfi_def_cfa_offset 24
	leaq	.LC102(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5004:
	.size	_Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .-_Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.section	.text._Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii,"axG",@progbits,_Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii,comdat
	.weak	_Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii
	.type	_Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii, @function
_Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii:
.LFB5005:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	movl	$1, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movl	120(%rsp), %r15d
	movq	%rdx, 8(%rsp)
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movl	$1, %esi
	movl	$1, 32(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1326
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movl	%r15d, %r9d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdi
	movl	%r14d, %r8d
	movq	%rbp, %rsi
	call	_ZL58__device_stub__Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiiiPKdS0_Pdiiii
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L1326:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1756, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC103(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1757, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC104(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5005:
	.size	_Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii, .-_Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii
	.section	.text._Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii,"axG",@progbits,_Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii,comdat
	.weak	_Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii
	.type	_Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii, @function
_Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii:
.LFB5006:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r9d, %r12d
	xorl	%r9d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	(%rax), %rax
	movq	%rdx, 8(%rsp)
	movq	(%rdi), %rdx
	movq	%rcx, 16(%rsp)
	movl	8(%rax), %ecx
	movl	8(%rdx), %esi
	movq	(%rdx), %rdi
	movq	%r8, 24(%rsp)
	xorl	%r8d, %r8d
	movq	(%rax), %rdx
	movl	128(%rsp), %r13d
	movq	%rdi, 40(%rsp)
	movl	136(%rsp), %r14d
	movl	%esi, 48(%rsp)
	movl	144(%rsp), %r15d
	movl	152(%rsp), %ebx
	movl	160(%rsp), %ebp
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1329
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	%r14d, %r9d
	movl	%r13d, %r8d
	movl	%r12d, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 144
	pushq	%rbx
	.cfi_def_cfa_offset 152
	pushq	%r15
	.cfi_def_cfa_offset 160
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_ZL60__device_stub__Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiiiPKdS0_Pdiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 128
.L1329:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1768, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC105(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1769, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC106(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5006:
	.size	_Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii, .-_Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii
	.section	.text._Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i, @function
_Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i:
.LFB5007:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1332
	movl	%r12d, %edx
	movl	%ebp, %esi
	movq	%rbx, %rdi
	call	_ZL42__device_stub__Z13kernel_assignIiEvPT_S0_iPiii
.L1332:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1099, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC7(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1100, %edx
	leaq	.LC8(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5007:
	.size	_Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i, .-_Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i
	.section	.text._Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB5008:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1335
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL42__device_stub__Z11kernel_copyIiEvPKT_PS0_iPKiPii
.L1335:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1111, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC9(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1112, %edx
	leaq	.LC10(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5008:
	.size	_Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.text._Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB5009:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1338
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL44__device_stub__Z10kernel_addIiEvPKT_S2_PS0_iPKiS0_Pii
.L1338:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1224, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC11(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1225, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC12(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5009:
	.size	_Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB5010:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1341
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL44__device_stub__Z10kernel_subIiEvPKT_S2_PS0_iPKiS0_Pii
.L1341:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1235, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC13(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1236, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC14(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5010:
	.size	_Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB5011:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1344
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL44__device_stub__Z10kernel_mulIiEvPKT_S2_PS0_iPKiS0_Pii
.L1344:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1246, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC15(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1247, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC16(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5011:
	.size	_Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB5012:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1347
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL44__device_stub__Z10kernel_divIiEvPKT_S2_PS0_iPKiS0_Pii
.L1347:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1257, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC17(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1258, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC18(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5012:
	.size	_Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB5013:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1350
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL44__device_stub__Z10kernel_powIiEvPKT_S2_PS0_iPKiS0_Pii
.L1350:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1268, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC19(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1269, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC20(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5013:
	.size	_Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB5014:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1353
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_add_scalarIiEvPKT_PS0_S0_iPKiPiii
.L1353:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1136, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC21(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1137, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC22(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5014:
	.size	_Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB5015:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1356
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_sub_scalarIiEvPKT_PS0_S0_iPKiPiii
.L1356:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1147, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC23(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1148, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC24(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5015:
	.size	_Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB5016:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1359
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL55__device_stub__Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_iPKiPiii
.L1359:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1158, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC25(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1159, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC26(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5016:
	.size	_Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB5017:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1362
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_mul_scalarIiEvPKT_PS0_S0_iPKiPiii
.L1362:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1169, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC27(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1170, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC28(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5017:
	.size	_Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB5018:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1365
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_div_scalarIiEvPKT_PS0_S0_iPKiPiii
.L1365:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1180, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC29(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1181, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC30(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5018:
	.size	_Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB5019:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1368
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL55__device_stub__Z21kernel_div_scalar_invIiEvPKT_PS0_S0_iPKiPiii
.L1368:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1191, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC31(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1192, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC32(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5019:
	.size	_Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB5020:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1371
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_pow_scalarIiEvPKT_PS0_S0_iPKiPiii
.L1371:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1202, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC33(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1203, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC34(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5020:
	.size	_Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB5021:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1374
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL55__device_stub__Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_iPKiPiii
.L1374:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1213, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC35(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1214, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC36(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5021:
	.size	_Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB5022:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1377
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL46__device_stub__Z12kernel_equalIiEvPKT_S2_PS0_iPKiS0_Pii
.L1377:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1279, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC37(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1280, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC38(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5022:
	.size	_Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB5023:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1380
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL48__device_stub__Z14kernel_greaterIiEvPKT_S2_PS0_iPKiS0_Pii
.L1380:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1290, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC39(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1291, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC40(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5023:
	.size	_Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB5024:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1383
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL45__device_stub__Z11kernel_lessIiEvPKT_S2_PS0_iPKiS0_Pii
.L1383:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1301, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC39(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1302, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC40(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5024:
	.size	_Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB5025:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1386
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL54__device_stub__Z20kernel_greater_equalIiEvPKT_S2_PS0_iPKiS0_Pii
.L1386:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1312, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC41(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1313, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC42(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5025:
	.size	_Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB5026:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1389
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL51__device_stub__Z17kernel_less_equalIiEvPKT_S2_PS0_iPKiS0_Pii
.L1389:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1323, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC43(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1324, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC44(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5026:
	.size	_Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB5027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1392
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL53__device_stub__Z19kernel_equal_scalarIiEvPKT_PS0_S0_iPKiPiii
.L1392:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1334, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC45(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1335, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC46(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5027:
	.size	_Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB5028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1395
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL55__device_stub__Z21kernel_greater_scalarIiEvPKT_PS0_S0_iPKiPiii
.L1395:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1345, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC47(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1346, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC48(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5028:
	.size	_Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB5029:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1398
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL52__device_stub__Z18kernel_less_scalarIiEvPKT_PS0_S0_iPKiPiii
.L1398:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1356, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC49(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1357, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC50(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5029:
	.size	_Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB5030:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1401
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL61__device_stub__Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_iPKiPiii
.L1401:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1367, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC51(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1368, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC52(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5030:
	.size	_Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB5031:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1404
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL58__device_stub__Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_iPKiPiii
.L1404:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1378, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC53(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1379, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC54(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5031:
	.size	_Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, @function
_Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i:
.LFB5032:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1407
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL48__device_stub__Z14kernel_replaceIiEvPKT_S2_PS0_iPKiS0_Pii
.L1407:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1389, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC55(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1390, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC56(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5032:
	.size	_Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .-_Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.section	.text._Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, @function
_Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i:
.LFB5033:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1410
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL55__device_stub__Z21kernel_replace_scalarIiEvPKT_PS0_S0_iPKiPiii
.L1410:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1400, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC55(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$1401, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	leaq	.LC56(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5033:
	.size	_Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .-_Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.section	.text._Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB5034:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1413
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL41__device_stub__Z10kernel_sumIiEvPKT_PS0_iPKiPii
.L1413:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1418, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC57(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1419, %edx
	leaq	.LC58(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5034:
	.size	_Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.text._Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB5035:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1416
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL41__device_stub__Z10kernel_minIiEvPKT_PS0_iPKiPii
.L1416:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1429, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC59(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1430, %edx
	leaq	.LC60(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5035:
	.size	_Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.text._Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB5036:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1419
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL41__device_stub__Z10kernel_maxIiEvPKT_PS0_iPKiPii
.L1419:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1440, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC61(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1441, %edx
	leaq	.LC62(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5036:
	.size	_Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.text._Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,"axG",@progbits,_Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,comdat
	.weak	_Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.type	_Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, @function
_Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii:
.LFB5037:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movl	120(%rsp), %r15d
	movq	%rdx, (%rsp)
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	%rcx, 8(%rsp)
	movl	$1, %esi
	movl	$1, %ecx
	movl	$1, 32(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movl	136(%rsp), %ebp
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1422
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movl	%r12d, %edx
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movl	%r13d, %ecx
	movq	16(%rsp), %rdi
	call	_ZL49__device_stub__Z13kernel_pad_2dIiEvPKT_PS0_iiiiiiPKiPiiiiiii
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1422:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1458, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC63(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1459, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC64(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5037:
	.size	_Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, .-_Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.section	.text._Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,"axG",@progbits,_Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,comdat
	.weak	_Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.type	_Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, @function
_Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii:
.LFB5038:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movl	120(%rsp), %r15d
	movq	%rdx, (%rsp)
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	%rcx, 8(%rsp)
	movl	$1, %esi
	movl	$1, %ecx
	movl	$1, 32(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movl	136(%rsp), %ebp
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1425
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movl	%r12d, %edx
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movl	%r13d, %ecx
	movq	16(%rsp), %rdi
	call	_ZL51__device_stub__Z15kernel_unpad_2dIiEvPKT_PS0_iiiiiiPKiPiiiiiii
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1425:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1470, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC65(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1471, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC66(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5038:
	.size	_Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, .-_Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.section	.text._Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,"axG",@progbits,_Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,comdat
	.weak	_Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.type	_Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, @function
_Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii:
.LFB5039:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	(%rax), %rax
	movq	%rdx, (%rsp)
	movq	(%rdi), %rdx
	movl	128(%rsp), %ebx
	movq	%rcx, 8(%rsp)
	movl	8(%rdx), %esi
	movq	(%rdx), %rdi
	movl	%r8d, 20(%rsp)
	xorl	%r8d, %r8d
	movl	%r9d, 24(%rsp)
	movl	136(%rsp), %r12d
	xorl	%r9d, %r9d
	movl	%ebx, 28(%rsp)
	movl	144(%rsp), %r13d
	movq	%rdi, 40(%rsp)
	movl	152(%rsp), %r14d
	movl	%esi, 48(%rsp)
	movl	160(%rsp), %r15d
	movl	168(%rsp), %ebx
	movl	176(%rsp), %ebp
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1428
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	%r12d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 144
	pushq	%rbx
	.cfi_def_cfa_offset 152
	pushq	%r15
	.cfi_def_cfa_offset 160
	pushq	%r14
	.cfi_def_cfa_offset 168
	pushq	%r13
	.cfi_def_cfa_offset 176
	movl	76(%rsp), %r8d
	movl	72(%rsp), %ecx
	movl	68(%rsp), %edx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_ZL52__device_stub__Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiiiPKiPiiiiiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 128
.L1428:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1485, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC67(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1486, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC68(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5039:
	.size	_Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, .-_Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.section	.text._Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,"axG",@progbits,_Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,comdat
	.weak	_Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.type	_Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, @function
_Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii:
.LFB5040:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	(%rax), %rax
	movq	%rdx, (%rsp)
	movq	(%rdi), %rdx
	movl	128(%rsp), %ebx
	movq	%rcx, 8(%rsp)
	movl	8(%rdx), %esi
	movq	(%rdx), %rdi
	movl	%r8d, 20(%rsp)
	xorl	%r8d, %r8d
	movl	%r9d, 24(%rsp)
	movl	136(%rsp), %r12d
	xorl	%r9d, %r9d
	movl	%ebx, 28(%rsp)
	movl	144(%rsp), %r13d
	movq	%rdi, 40(%rsp)
	movl	152(%rsp), %r14d
	movl	%esi, 48(%rsp)
	movl	160(%rsp), %r15d
	movl	168(%rsp), %ebx
	movl	176(%rsp), %ebp
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1431
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	%r12d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 144
	pushq	%rbx
	.cfi_def_cfa_offset 152
	pushq	%r15
	.cfi_def_cfa_offset 160
	pushq	%r14
	.cfi_def_cfa_offset 168
	pushq	%r13
	.cfi_def_cfa_offset 176
	movl	76(%rsp), %r8d
	movl	72(%rsp), %ecx
	movl	68(%rsp), %edx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_ZL54__device_stub__Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiiiPKiPiiiiiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 128
.L1431:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1497, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC69(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1498, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC70(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5040:
	.size	_Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, .-_Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.section	.text._Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii,"axG",@progbits,_Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii,comdat
	.weak	_Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii
	.type	_Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii, @function
_Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii:
.LFB5041:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	movl	$1, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movl	$1, 16(%rsp)
	movl	80(%rsp), %r14d
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movl	$1, %esi
	movq	(%rax), %rdx
	movq	%rdi, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1434
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL46__device_stub__Z14kernel_grid_2dIiEvPT_S1_PdiiPiS_Pdii
.L1434:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1509, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC71(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$1510, %edx
	popq	%r12
	.cfi_def_cfa_offset 24
	leaq	.LC72(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5041:
	.size	_Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii, .-_Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii
	.section	.text._Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii,"axG",@progbits,_Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii,comdat
	.weak	_Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii
	.type	_Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii, @function
_Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii:
.LFB5042:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r11
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movq	%rdx, 8(%rsp)
	movl	8(%rax), %esi
	movq	(%rax), %rdi
	movq	(%r11), %rax
	movl	120(%rsp), %r15d
	movq	%rdi, 24(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	movl	%esi, 32(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1437
	pushq	%rax
	.cfi_def_cfa_offset 120
	movq	%r13, %rcx
	movq	%r12, %rdx
	movl	%r15d, %r9d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdi
	movl	%r14d, %r8d
	movq	%rbp, %rsi
	call	_ZL50__device_stub__Z14kernel_grid_3dIiEvPT_S1_S1_PdiiiPiS_S_Pdiii
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L1437:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1521, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC73(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1522, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC74(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5042:
	.size	_Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii, .-_Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii
	.section	.text._Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i,"axG",@progbits,_Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i,comdat
	.weak	_Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i
	.type	_Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i, @function
_Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i:
.LFB5043:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movq	96(%rsp), %r14
	movl	104(%rsp), %r15d
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1440
	movl	%r15d, %r9d
	movq	%r14, %r8
	movq	%r13, %rcx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL56__device_stub__Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_iPKiS0_PiS1_S0_i
.L1440:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1537, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC75(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1538, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC76(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5043:
	.size	_Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i, .-_Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i
	.section	.text._Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i,"axG",@progbits,_Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i,comdat
	.weak	_Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i
	.type	_Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i, @function
_Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i:
.LFB5044:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movq	112(%rsp), %r14
	movq	120(%rsp), %r15
	movq	%rdx, (%rsp)
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movq	%rcx, 8(%rsp)
	movq	128(%rsp), %rbx
	movl	136(%rsp), %ebp
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1443
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movq	%r12, %rdx
	movq	%r15, %r9
	movq	%r14, %r8
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movq	%r13, %rcx
	movq	16(%rsp), %rdi
	call	_ZL62__device_stub__Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_iPKiS0_S0_PiS1_S1_S0_i
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1443:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1550, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC77(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1551, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC78(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5044:
	.size	_Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i, .-_Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i
	.section	.text._Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi,"axG",@progbits,_Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi,comdat
	.weak	_Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi
	.type	_Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi, @function
_Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi:
.LFB5045:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movq	96(%rsp), %r14
	movl	104(%rsp), %r15d
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1446
	movl	%r15d, %r9d
	movq	%r14, %r8
	movq	%r13, %rcx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL60__device_stub__Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdiPKiS0_PiS1_PKdi
.L1446:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1563, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC79(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1564, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC80(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5045:
	.size	_Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi, .-_Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi
	.section	.text._Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi,"axG",@progbits,_Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi,comdat
	.weak	_Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi
	.type	_Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi, @function
_Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi:
.LFB5046:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movq	112(%rsp), %r14
	movq	120(%rsp), %r15
	movq	%rdx, (%rsp)
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movq	%rcx, 8(%rsp)
	movq	128(%rsp), %rbx
	movl	136(%rsp), %ebp
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1449
	pushq	%rbp
	.cfi_def_cfa_offset 120
	movq	%r12, %rdx
	movq	%r15, %r9
	movq	%r14, %r8
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rsi
	movq	%r13, %rcx
	movq	16(%rsp), %rdi
	call	_ZL66__device_stub__Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdiPKiS0_S0_PiS1_S1_PKdi
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L1449:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1576, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC81(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1577, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC82(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5046:
	.size	_Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi, .-_Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi
	.section	.text._Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i,"axG",@progbits,_Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i,comdat
	.weak	_Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i
	.type	_Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i, @function
_Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i:
.LFB5047:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movq	112(%rsp), %r14
	movq	%rdx, 8(%rsp)
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movq	120(%rsp), %r15
	movl	128(%rsp), %ebx
	movl	(%rdx), %edx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 36(%rsp)
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1452
	pushq	%rax
	.cfi_def_cfa_offset 120
	movq	%r13, %rcx
	movq	%r12, %rdx
	movq	%r15, %r9
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdi
	movq	%r14, %r8
	movq	%rbp, %rsi
	call	_ZL59__device_stub__Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_iPKiS0_S0_S0_PiS1_i
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L1452:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1589, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC83(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1590, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC84(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5047:
	.size	_Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i, .-_Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i
	.section	.text._Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i,"axG",@progbits,_Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i,comdat
	.weak	_Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i
	.type	_Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i, @function
_Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i:
.LFB5048:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	(%rdi), %rax
	movq	%rdx, (%rsp)
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movq	%r8, 16(%rsp)
	xorl	%r8d, %r8d
	movl	(%rdx), %edx
	movq	%r9, 24(%rsp)
	xorl	%r9d, %r9d
	movl	%eax, 40(%rsp)
	movq	128(%rsp), %r12
	movabsq	$4294967297, %rax
	movl	%edx, 52(%rsp)
	movq	136(%rsp), %r13
	movq	%rcx, 8(%rsp)
	movq	144(%rsp), %r14
	movq	%rax, 44(%rsp)
	movq	152(%rsp), %r15
	movq	%rax, 56(%rsp)
	movq	160(%rsp), %rbx
	movl	168(%rsp), %ebp
	movl	60(%rsp), %ecx
	movq	52(%rsp), %rdx
	movq	40(%rsp), %rdi
	movl	48(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1455
	pushq	%rbp
	.cfi_def_cfa_offset 136
	movq	%r13, %r9
	movq	%r12, %r8
	pushq	%rbx
	.cfi_def_cfa_offset 144
	pushq	%r15
	.cfi_def_cfa_offset 152
	pushq	%r14
	.cfi_def_cfa_offset 160
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_ZL68__device_stub__Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_iPKiS0_S0_S0_S0_S0_PiS1_S1_i
	addq	$32, %rsp
	.cfi_def_cfa_offset 128
.L1455:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1603, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC85(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1604, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC86(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5048:
	.size	_Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i, .-_Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i
	.section	.text._Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, @function
_Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii:
.LFB5049:
	.cfi_startproc
	endbr64
	movabsq	$4294967297, %rax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%r9d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rsi), %rdx
	movq	(%rdi), %rsi
	movq	%rax, 12(%rsp)
	movl	80(%rsp), %r14d
	movq	%rax, 20(%rsp)
	movl	8(%rdx), %eax
	movq	(%rsi), %rcx
	movq	(%rdx), %rdx
	movl	$1, 28(%rsp)
	testl	%eax, %eax
	jne	.L1458
	movq	%rcx, 8(%rsp)
	movq	%rdx, 20(%rsp)
	jmp	.L1459
.L1458:
	movl	8(%rsi), %esi
	movq	%rcx, 8(%rsp)
	movq	%rdx, 20(%rsp)
	movl	%esi, 16(%rsp)
	movl	%eax, 28(%rsp)
.L1459:
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1460
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL49__device_stub__Z16kernel_gradientxIiEvPKT_PS0_iiiPKiPiiii
.L1460:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1710, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC97(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$1711, %edx
	popq	%r12
	.cfi_def_cfa_offset 24
	leaq	.LC98(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5049:
	.size	_Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .-_Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.section	.text._Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, @function
_Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii:
.LFB5050:
	.cfi_startproc
	endbr64
	movabsq	$4294967297, %rax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%r9d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rsi), %rdx
	movq	(%rdi), %rsi
	movq	%rax, 12(%rsp)
	movl	80(%rsp), %r14d
	movq	%rax, 20(%rsp)
	movl	8(%rdx), %eax
	movq	(%rsi), %rcx
	movq	(%rdx), %rdx
	movl	$1, 28(%rsp)
	testl	%eax, %eax
	jne	.L1463
	movq	%rcx, 8(%rsp)
	movq	%rdx, 20(%rsp)
	jmp	.L1464
.L1463:
	movl	8(%rsi), %esi
	movq	%rcx, 8(%rsp)
	movq	%rdx, 20(%rsp)
	movl	%esi, 16(%rsp)
	movl	%eax, 28(%rsp)
.L1464:
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1465
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL49__device_stub__Z16kernel_gradientyIiEvPKT_PS0_iiiPKiPiiii
.L1465:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1732, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC99(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$1733, %edx
	popq	%r12
	.cfi_def_cfa_offset 24
	leaq	.LC100(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5050:
	.size	_Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .-_Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.section	.text._Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, @function
_Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii:
.LFB5051:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rsi, %r10
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	(%rdi), %rax
	movl	80(%rsp), %r14d
	movl	8(%rax), %esi
	movq	(%rax), %rdi
	movq	(%r10), %rax
	movq	%rdi, 8(%rsp)
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	movl	%esi, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1468
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL49__device_stub__Z16kernel_gradientzIiEvPKT_PS0_iiiPKiPiiii
.L1468:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1744, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC101(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$1745, %edx
	popq	%r12
	.cfi_def_cfa_offset 24
	leaq	.LC102(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5051:
	.size	_Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .-_Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.section	.text._Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii,"axG",@progbits,_Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii,comdat
	.weak	_Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii
	.type	_Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii, @function
_Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii:
.LFB5052:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r9d, %r13d
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	movl	$1, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	(%rdi), %rax
	movl	112(%rsp), %r14d
	movl	120(%rsp), %r15d
	movq	%rdx, 8(%rsp)
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movl	$1, %esi
	movl	$1, 32(%rsp)
	movl	128(%rsp), %ebx
	movq	(%rax), %rdx
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1471
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movl	%r15d, %r9d
	pushq	%rbx
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdi
	movl	%r14d, %r8d
	movq	%rbp, %rsi
	call	_ZL58__device_stub__Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiiiPKiS0_Piiiii
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L1471:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1756, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC103(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1757, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC104(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5052:
	.size	_Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii, .-_Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii
	.section	.text._Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii,"axG",@progbits,_Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii,comdat
	.weak	_Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii
	.type	_Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii, @function
_Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii:
.LFB5053:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r9d, %r12d
	xorl	%r9d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	(%rax), %rax
	movq	%rdx, 8(%rsp)
	movq	(%rdi), %rdx
	movq	%rcx, 16(%rsp)
	movl	8(%rax), %ecx
	movl	8(%rdx), %esi
	movq	(%rdx), %rdi
	movq	%r8, 24(%rsp)
	xorl	%r8d, %r8d
	movq	(%rax), %rdx
	movl	128(%rsp), %r13d
	movq	%rdi, 40(%rsp)
	movl	136(%rsp), %r14d
	movl	%esi, 48(%rsp)
	movl	144(%rsp), %r15d
	movl	152(%rsp), %ebx
	movl	160(%rsp), %ebp
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1474
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	%r14d, %r9d
	movl	%r13d, %r8d
	movl	%r12d, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 144
	pushq	%rbx
	.cfi_def_cfa_offset 152
	pushq	%r15
	.cfi_def_cfa_offset 160
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_ZL60__device_stub__Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiiiPKiS0_Piiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 128
.L1474:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1768, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC105(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$1769, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	leaq	.LC106(%rip), %rcx
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5053:
	.size	_Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii, .-_Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii
	.section	.text._Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i, @function
_Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i:
.LFB5054:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%ecx, %ebx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1477
	movzwl	%bx, %esi
	movl	%r12d, %edx
	movq	%rbp, %rdi
	call	_ZL42__device_stub__Z13kernel_assignItEvPT_S0_iPtti
.L1477:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1099, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC7(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1100, %edx
	leaq	.LC8(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5054:
	.size	_Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i, .-_Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i
	.section	.text._Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB5055:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1480
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL42__device_stub__Z11kernel_copyItEvPKT_PS0_iPKtPti
.L1480:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1111, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC9(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1112, %edx
	leaq	.LC10(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5055:
	.size	_Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.text._Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i, @function
_Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i:
.LFB5056:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1483
	movl	%r12d, %edx
	movl	%ebp, %esi
	movq	%rbx, %rdi
	call	_ZL42__device_stub__Z13kernel_assignIjEvPT_S0_iPjji
.L1483:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1099, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC7(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1100, %edx
	leaq	.LC8(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5056:
	.size	_Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i, .-_Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i
	.section	.text._Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB5057:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1486
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL42__device_stub__Z11kernel_copyIjEvPKT_PS0_iPKjPji
.L1486:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1111, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC9(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1112, %edx
	leaq	.LC10(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5057:
	.size	_Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.text._Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i, @function
_Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i:
.LFB5058:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%ecx, %ebx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1489
	movzbl	%bl, %esi
	movl	%r12d, %edx
	movq	%rbp, %rdi
	call	_ZL42__device_stub__Z13kernel_assignIhEvPT_S0_iPhhi
.L1489:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1099, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC7(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1100, %edx
	leaq	.LC8(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5058:
	.size	_Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i, .-_Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i
	.section	.text._Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB5059:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1492
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL42__device_stub__Z11kernel_copyIhEvPKT_PS0_iPKhPhi
.L1492:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1111, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC9(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1112, %edx
	leaq	.LC10(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5059:
	.size	_Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.text._Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i, @function
_Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i:
.LFB5060:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%ecx, %ebx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1495
	movswl	%bx, %esi
	movl	%r12d, %edx
	movq	%rbp, %rdi
	call	_ZL42__device_stub__Z13kernel_assignIsEvPT_S0_iPssi
.L1495:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1099, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC7(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1100, %edx
	leaq	.LC8(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5060:
	.size	_Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i, .-_Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i
	.section	.text._Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB5061:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1498
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL42__device_stub__Z11kernel_copyIsEvPKT_PS0_iPKsPsi
.L1498:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1111, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC9(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1112, %edx
	leaq	.LC10(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5061:
	.size	_Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.text._Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i, @function
_Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i:
.LFB5062:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%ecx, %ebx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1501
	movsbl	%bl, %esi
	movl	%r12d, %edx
	movq	%rbp, %rdi
	call	_ZL42__device_stub__Z13kernel_assignIcEvPT_S0_iPcci
.L1501:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1099, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC7(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1100, %edx
	leaq	.LC8(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5062:
	.size	_Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i, .-_Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i
	.section	.text._Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i, @function
_Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i:
.LFB5063:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	movl	%r8d, %r12d
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movl	(%rax), %eax
	movl	(%rdx), %edx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	16(%rsp), %esi
	movl	%edx, 20(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1504
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZL42__device_stub__Z11kernel_copyIcEvPKT_PS0_iPKcPci
.L1504:
	call	cudaPeekAtLastError@PLT
	movl	$1, %r8d
	movl	$1111, %edx
	leaq	.LC2(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	leaq	.LC9(%rip), %rcx
	call	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	call	cudaDeviceSynchronize@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rsi
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$1112, %edx
	leaq	.LC10(%rip), %rcx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error9cudaErrorPKciS1_b
	.cfi_endproc
.LFE5063:
	.size	_Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .-_Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.section	.rodata.str1.1
.LC109:
	.string	"_Z11kernel_copyIcEvPKT_PS0_i"
.LC110:
	.string	"_Z13kernel_assignIcEvPT_S0_i"
.LC111:
	.string	"_Z11kernel_copyIsEvPKT_PS0_i"
.LC112:
	.string	"_Z13kernel_assignIsEvPT_S0_i"
.LC113:
	.string	"_Z11kernel_copyIhEvPKT_PS0_i"
.LC114:
	.string	"_Z13kernel_assignIhEvPT_S0_i"
.LC115:
	.string	"_Z11kernel_copyIjEvPKT_PS0_i"
.LC116:
	.string	"_Z13kernel_assignIjEvPT_S0_i"
.LC117:
	.string	"_Z11kernel_copyItEvPKT_PS0_i"
.LC118:
	.string	"_Z13kernel_assignItEvPT_S0_i"
.LC119:
	.string	"_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii"
.LC120:
	.string	"_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii"
.LC121:
	.string	"_Z16kernel_gradientzIiEvPKT_PS0_iii"
.LC122:
	.string	"_Z16kernel_gradientyIiEvPKT_PS0_iii"
.LC123:
	.string	"_Z16kernel_gradientxIiEvPKT_PS0_iii"
.LC124:
	.string	"_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i"
.LC125:
	.string	"_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i"
.LC126:
	.string	"_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi"
.LC127:
	.string	"_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi"
.LC128:
	.string	"_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i"
.LC129:
	.string	"_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i"
.LC130:
	.string	"_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii"
.LC131:
	.string	"_Z14kernel_grid_2dIiEvPT_S1_Pdii"
.LC132:
	.string	"_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii"
.LC133:
	.string	"_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii"
.LC134:
	.string	"_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii"
.LC135:
	.string	"_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii"
.LC136:
	.string	"_Z10kernel_maxIiEvPKT_PS0_i"
.LC137:
	.string	"_Z10kernel_minIiEvPKT_PS0_i"
.LC138:
	.string	"_Z10kernel_sumIiEvPKT_PS0_i"
.LC139:
	.string	"_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i"
.LC140:
	.string	"_Z14kernel_replaceIiEvPKT_S2_PS0_i"
.LC141:
	.string	"_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i"
.LC142:
	.string	"_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i"
.LC143:
	.string	"_Z18kernel_less_scalarIiEvPKT_PS0_S0_i"
.LC144:
	.string	"_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i"
.LC145:
	.string	"_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i"
.LC146:
	.string	"_Z17kernel_less_equalIiEvPKT_S2_PS0_i"
.LC147:
	.string	"_Z20kernel_greater_equalIiEvPKT_S2_PS0_i"
.LC148:
	.string	"_Z11kernel_lessIiEvPKT_S2_PS0_i"
.LC149:
	.string	"_Z14kernel_greaterIiEvPKT_S2_PS0_i"
.LC150:
	.string	"_Z12kernel_equalIiEvPKT_S2_PS0_i"
.LC151:
	.string	"_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i"
.LC152:
	.string	"_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i"
.LC153:
	.string	"_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i"
.LC154:
	.string	"_Z17kernel_div_scalarIiEvPKT_PS0_S0_i"
.LC155:
	.string	"_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i"
.LC156:
	.string	"_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i"
.LC157:
	.string	"_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i"
.LC158:
	.string	"_Z17kernel_add_scalarIiEvPKT_PS0_S0_i"
.LC159:
	.string	"_Z10kernel_powIiEvPKT_S2_PS0_i"
.LC160:
	.string	"_Z10kernel_divIiEvPKT_S2_PS0_i"
.LC161:
	.string	"_Z10kernel_mulIiEvPKT_S2_PS0_i"
.LC162:
	.string	"_Z10kernel_subIiEvPKT_S2_PS0_i"
.LC163:
	.string	"_Z10kernel_addIiEvPKT_S2_PS0_i"
.LC164:
	.string	"_Z11kernel_copyIiEvPKT_PS0_i"
.LC165:
	.string	"_Z13kernel_assignIiEvPT_S0_i"
.LC166:
	.string	"_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii"
.LC167:
	.string	"_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii"
.LC168:
	.string	"_Z16kernel_gradientzIdEvPKT_PS0_iii"
.LC169:
	.string	"_Z16kernel_gradientyIdEvPKT_PS0_iii"
.LC170:
	.string	"_Z16kernel_gradientxIdEvPKT_PS0_iii"
.LC171:
	.string	"_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii"
.LC172:
	.string	"_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii"
.LC173:
	.string	"_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii"
.LC174:
	.string	"_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii"
.LC175:
	.string	"_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii"
.LC176:
	.string	"_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii"
.LC177:
	.string	"_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i"
.LC178:
	.string	"_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i"
.LC179:
	.string	"_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi"
.LC180:
	.string	"_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi"
.LC181:
	.string	"_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i"
.LC182:
	.string	"_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i"
.LC183:
	.string	"_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii"
.LC184:
	.string	"_Z14kernel_grid_2dIdEvPT_S1_Pdii"
.LC185:
	.string	"_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii"
.LC186:
	.string	"_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii"
.LC187:
	.string	"_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii"
.LC188:
	.string	"_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii"
.LC189:
	.string	"_Z10kernel_maxIdEvPKT_PS0_i"
.LC190:
	.string	"_Z10kernel_minIdEvPKT_PS0_i"
.LC191:
	.string	"_Z10kernel_sumIdEvPKT_PS0_i"
.LC192:
	.string	"_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i"
.LC193:
	.string	"_Z14kernel_replaceIdEvPKT_S2_PS0_i"
.LC194:
	.string	"_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i"
.LC195:
	.string	"_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i"
.LC196:
	.string	"_Z18kernel_less_scalarIdEvPKT_PS0_S0_i"
.LC197:
	.string	"_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i"
.LC198:
	.string	"_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i"
.LC199:
	.string	"_Z17kernel_less_equalIdEvPKT_S2_PS0_i"
.LC200:
	.string	"_Z20kernel_greater_equalIdEvPKT_S2_PS0_i"
.LC201:
	.string	"_Z11kernel_lessIdEvPKT_S2_PS0_i"
.LC202:
	.string	"_Z14kernel_greaterIdEvPKT_S2_PS0_i"
.LC203:
	.string	"_Z12kernel_equalIdEvPKT_S2_PS0_i"
.LC204:
	.string	"_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i"
.LC205:
	.string	"_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i"
.LC206:
	.string	"_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i"
.LC207:
	.string	"_Z17kernel_div_scalarIdEvPKT_PS0_S0_i"
.LC208:
	.string	"_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i"
.LC209:
	.string	"_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i"
.LC210:
	.string	"_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i"
.LC211:
	.string	"_Z17kernel_add_scalarIdEvPKT_PS0_S0_i"
.LC212:
	.string	"_Z10kernel_powIdEvPKT_S2_PS0_i"
.LC213:
	.string	"_Z10kernel_divIdEvPKT_S2_PS0_i"
.LC214:
	.string	"_Z10kernel_mulIdEvPKT_S2_PS0_i"
.LC215:
	.string	"_Z10kernel_subIdEvPKT_S2_PS0_i"
.LC216:
	.string	"_Z10kernel_addIdEvPKT_S2_PS0_i"
.LC217:
	.string	"_Z11kernel_copyIdEvPKT_PS0_i"
.LC218:
	.string	"_Z13kernel_assignIdEvPT_S0_i"
.LC219:
	.string	"_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii"
.LC220:
	.string	"_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii"
.LC221:
	.string	"_Z16kernel_gradientzIfEvPKT_PS0_iii"
.LC222:
	.string	"_Z16kernel_gradientyIfEvPKT_PS0_iii"
.LC223:
	.string	"_Z16kernel_gradientxIfEvPKT_PS0_iii"
.LC224:
	.string	"_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii"
.LC225:
	.string	"_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii"
.LC226:
	.string	"_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii"
.LC227:
	.string	"_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii"
.LC228:
	.string	"_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii"
.LC229:
	.string	"_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i"
.LC230:
	.string	"_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i"
.LC231:
	.string	"_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi"
.LC232:
	.string	"_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi"
.LC233:
	.string	"_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i"
.LC234:
	.string	"_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i"
.LC235:
	.string	"_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii"
.LC236:
	.string	"_Z14kernel_grid_2dIfEvPT_S1_Pdii"
.LC237:
	.string	"_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii"
.LC238:
	.string	"_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii"
.LC239:
	.string	"_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii"
.LC240:
	.string	"_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii"
.LC241:
	.string	"_Z10kernel_maxIfEvPKT_PS0_i"
.LC242:
	.string	"_Z10kernel_minIfEvPKT_PS0_i"
.LC243:
	.string	"_Z10kernel_sumIfEvPKT_PS0_i"
.LC244:
	.string	"_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i"
.LC245:
	.string	"_Z14kernel_replaceIfEvPKT_S2_PS0_i"
.LC246:
	.string	"_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i"
.LC247:
	.string	"_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i"
.LC248:
	.string	"_Z18kernel_less_scalarIfEvPKT_PS0_S0_i"
.LC249:
	.string	"_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i"
.LC250:
	.string	"_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i"
.LC251:
	.string	"_Z17kernel_less_equalIfEvPKT_S2_PS0_i"
.LC252:
	.string	"_Z20kernel_greater_equalIfEvPKT_S2_PS0_i"
.LC253:
	.string	"_Z11kernel_lessIfEvPKT_S2_PS0_i"
.LC254:
	.string	"_Z14kernel_greaterIfEvPKT_S2_PS0_i"
.LC255:
	.string	"_Z12kernel_equalIfEvPKT_S2_PS0_i"
.LC256:
	.string	"_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i"
.LC257:
	.string	"_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i"
.LC258:
	.string	"_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i"
.LC259:
	.string	"_Z17kernel_div_scalarIfEvPKT_PS0_S0_i"
.LC260:
	.string	"_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i"
.LC261:
	.string	"_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i"
.LC262:
	.string	"_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i"
.LC263:
	.string	"_Z17kernel_add_scalarIfEvPKT_PS0_S0_i"
.LC264:
	.string	"_Z10kernel_powIfEvPKT_S2_PS0_i"
.LC265:
	.string	"_Z10kernel_divIfEvPKT_S2_PS0_i"
.LC266:
	.string	"_Z10kernel_mulIfEvPKT_S2_PS0_i"
.LC267:
	.string	"_Z10kernel_subIfEvPKT_S2_PS0_i"
.LC268:
	.string	"_Z10kernel_addIfEvPKT_S2_PS0_i"
.LC269:
	.string	"_Z11kernel_copyIfEvPKT_PS0_i"
.LC270:
	.string	"_Z13kernel_assignIfEvPT_S0_i"
.LC271:
	.string	"_Z11kernel_castIddEvPKT_PT0_i"
.LC272:
	.string	"_Z11kernel_castIffEvPKT_PT0_i"
.LC273:
	.string	"_Z11kernel_castIhdEvPKT_PT0_i"
.LC274:
	.string	"_Z11kernel_castIdhEvPKT_PT0_i"
.LC275:
	.string	"_Z11kernel_castIhfEvPKT_PT0_i"
.LC276:
	.string	"_Z11kernel_castIfhEvPKT_PT0_i"
.LC277:
	.string	"_Z11kernel_castIjdEvPKT_PT0_i"
.LC278:
	.string	"_Z11kernel_castIdjEvPKT_PT0_i"
.LC279:
	.string	"_Z11kernel_castIjfEvPKT_PT0_i"
.LC280:
	.string	"_Z11kernel_castIfjEvPKT_PT0_i"
.LC281:
	.string	"_Z11kernel_castItdEvPKT_PT0_i"
.LC282:
	.string	"_Z11kernel_castIdtEvPKT_PT0_i"
.LC283:
	.string	"_Z11kernel_castItfEvPKT_PT0_i"
.LC284:
	.string	"_Z11kernel_castIftEvPKT_PT0_i"
.LC285:
	.string	"_Z11kernel_castIdiEvPKT_PT0_i"
.LC286:
	.string	"_Z11kernel_castIidEvPKT_PT0_i"
.LC287:
	.string	"_Z11kernel_castIfiEvPKT_PT0_i"
.LC288:
	.string	"_Z11kernel_castIifEvPKT_PT0_i"
.LC289:
	.string	"_Z11kernel_castIdfEvPKT_PT0_i"
.LC290:
	.string	"_Z11kernel_castIfdEvPKT_PT0_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4580:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC109(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11kernel_copyIcEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC110(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13kernel_assignIcEvPT_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC111(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_copyIsEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC112(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13kernel_assignIsEvPT_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC113(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_copyIhEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC114(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13kernel_assignIhEvPT_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC115(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_copyIjEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC116(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13kernel_assignIjEvPT_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC117(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z11kernel_copyItEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC118(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13kernel_assignItEvPT_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC119(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC120(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC121(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_gradientzIiEvPKT_PS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC122(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_gradientyIiEvPKT_PS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC123(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_gradientxIiEvPKT_PS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC124(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC125(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC126(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC127(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC128(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC129(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC130(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC131(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14kernel_grid_2dIiEvPT_S1_Pdii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC132(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC133(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC134(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC135(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC136(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_maxIiEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC137(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_minIiEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC138(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_sumIiEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC139(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC140(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14kernel_replaceIiEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC141(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC142(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC143(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z18kernel_less_scalarIiEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC144(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC145(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC146(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_less_equalIiEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC147(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20kernel_greater_equalIiEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC148(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_lessIiEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC149(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z14kernel_greaterIiEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC150(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12kernel_equalIiEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC151(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC152(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC153(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC154(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_div_scalarIiEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC155(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC156(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC157(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC158(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_add_scalarIiEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC159(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_powIiEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC160(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_divIiEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC161(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_mulIiEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC162(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_subIiEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC163(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_addIiEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC164(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_copyIiEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC165(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z13kernel_assignIiEvPT_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC166(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC167(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC168(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_gradientzIdEvPKT_PS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC169(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_gradientyIdEvPKT_PS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC170(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_gradientxIdEvPKT_PS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC171(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC172(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC173(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC174(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC175(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC176(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC177(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC178(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC179(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC180(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC181(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC182(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC183(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC184(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14kernel_grid_2dIdEvPT_S1_Pdii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC185(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC186(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC187(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC188(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC189(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z10kernel_maxIdEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC190(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_minIdEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC191(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_sumIdEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC192(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC193(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14kernel_replaceIdEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC194(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC195(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC196(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z18kernel_less_scalarIdEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC197(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC198(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC199(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_less_equalIdEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC200(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20kernel_greater_equalIdEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC201(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_lessIdEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC202(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14kernel_greaterIdEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC203(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12kernel_equalIdEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC204(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC205(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC206(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC207(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_div_scalarIdEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC208(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC209(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC210(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC211(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_add_scalarIdEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC212(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_powIdEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC213(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z10kernel_divIdEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC214(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_mulIdEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC215(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_subIdEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC216(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_addIdEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC217(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_copyIdEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC218(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13kernel_assignIdEvPT_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC219(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC220(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC221(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z16kernel_gradientzIfEvPKT_PS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC222(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_gradientyIfEvPKT_PS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC223(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_gradientxIfEvPKT_PS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC224(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC225(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC226(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC227(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC228(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC229(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC230(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC231(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC232(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC233(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC234(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC235(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC236(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14kernel_grid_2dIfEvPT_S1_Pdii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC237(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC238(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC239(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC240(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC241(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_maxIfEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC242(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_minIfEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC243(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_sumIfEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC244(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC245(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z14kernel_replaceIfEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC246(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC247(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC248(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z18kernel_less_scalarIfEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC249(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC250(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC251(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_less_equalIfEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC252(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20kernel_greater_equalIfEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC253(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z11kernel_lessIfEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC254(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14kernel_greaterIfEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC255(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12kernel_equalIfEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC256(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC257(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC258(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC259(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_div_scalarIfEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC260(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC261(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC262(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC263(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17kernel_add_scalarIfEvPKT_PS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC264(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_powIfEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC265(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_divIfEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC266(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_mulIfEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC267(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_subIfEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC268(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10kernel_addIfEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC269(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z11kernel_copyIfEvPKT_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC270(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13kernel_assignIfEvPT_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC271(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_castIddEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC272(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_castIffEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC273(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_castIhdEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC274(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_castIdhEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC275(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_castIhfEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC276(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_castIfhEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC277(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z11kernel_castIjdEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC278(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_castIdjEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC279(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_castIjfEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC280(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_castIfjEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC281(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_castItdEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC282(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_castIdtEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC283(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_castItfEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC284(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_castIftEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC285(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	movq	%rdx, %rcx
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z11kernel_castIdiEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC286(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11kernel_castIidEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC287(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11kernel_castIfiEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC288(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11kernel_castIifEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC289(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11kernel_castIdfEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC290(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11kernel_castIfdEvPKT_PT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4580:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
* @Author: jose
* @Date:   2020-08-24 00:00:00
* @Last Modified by:   jose
* @Last Modified time: 2020-08-24 00:00:00
*/

// local libs

#include <hip/hip_runtime.h>
#include "kernels.cuh"
#include <hipfft/hipfft.h>

// ===========================================
// Check Errors
// ===========================================
#define imart_assert_kernel(status, msg) \
    imart_assert_kernel_error((status), __FILE__, __LINE__, msg);

void imart_assert_kernel_error(hipError_t code, const char *file, int line, const char* msg, bool abort=true)
{
   if (code != hipSuccess) 
   {
      fprintf(stderr,"\n******* CUDA Error *******"\
                    "\n[Error] Information:\t%s"\
                    "\n[Error] Error code:\t%i"\
                    "\n[Error] Description:\t%s"\
                    "\n[Error] File:\t\t%s"\
                    "\n[Error] Line:\t\t%d\n",
                    msg, code, hipGetErrorString(code), file, line);
      if (abort) exit(code); 
   };
};

// ===========================================
// Kernels
// ===========================================


// ===========================================
// Data Kernels
// ===========================================
template <typename type>
__global__ void kernel_assign(type * vin, type value, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vin[i] = value;
};

template <typename type>
__global__ void kernel_copy(const type * vin, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin[i];
};

template <typename typein, typename typeout>
__global__ void kernel_cast(const typein * vin, typeout * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = typeout(vin[i]);
};


// ===========================================
// Vector Kernels
// ===========================================
template <typename type>
__global__ void kernel_add_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin[i] + scalar;
};

template <typename type>
__global__ void kernel_sub_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin[i] - scalar;
};

template <typename type>
__global__ void kernel_sub_scalar_inv(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = scalar - vin[i];
};

template <typename type>
__global__ void kernel_mul_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin[i] * scalar;
};

template <typename type>
__global__ void kernel_div_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin[i] / scalar;
};

template <typename type>
__global__ void kernel_div_scalar_inv(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = scalar / vin[i];
};

template <typename type>
__global__ void kernel_pow_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = pow( vin[i], scalar );
};

template <typename type>
__global__ void kernel_pow_scalar_inv(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = pow( scalar, vin[i] );
};

template <typename type>
__global__ void kernel_add(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin1[i] + vin2[i];
};

template <typename type>
__global__ void kernel_sub(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin1[i] - vin2[i];
};

template <typename type>
__global__ void kernel_mul(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin1[i] * vin2[i];
};

template <typename type>
__global__ void kernel_div(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin1[i] / vin2[i];
};

template <typename type>
__global__ void kernel_pow(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = pow( vin1[i], vin2[i] );
};

template <typename type>
__global__ void kernel_equal(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin1[i] == vin2[i]);
};

template <typename type>
__global__ void kernel_greater(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin1[i] > vin2[i]);
};

template <typename type>
__global__ void kernel_less(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin1[i] < vin2[i]);
};

template <typename type>
__global__ void kernel_greater_equal(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin1[i] >= vin2[i];
};

template <typename type>
__global__ void kernel_less_equal(const type * vin1, const type * vin2, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = vin1[i] <= vin2[i];
};

template <typename type>
__global__ void kernel_equal_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin[i] == scalar);
};

template <typename type>
__global__ void kernel_greater_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin[i] > scalar);
};

template <typename type>
__global__ void kernel_less_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin[i] < scalar);
};

template <typename type>
__global__ void kernel_greater_equal_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin[i] >= scalar);
};

template <typename type>
__global__ void kernel_less_equal_scalar(const type * vin, type * vout, type scalar, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) vout[i] = (vin[i] <= scalar);
};

template <typename type>
__global__ void kernel_replace(const type * idxs, const type * vin, type * vout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n)
    {
        if (idxs[i]) vout[i] = vin[i];
    };
};

template <typename type>
__global__ void kernel_replace_scalar(const type * idxs, type * vout, type value, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n)
    {
        if (idxs[i]) vout[i] = value;
    };
};

// ===========================================
// Reduction Kernels
// ===========================================
template <typename type>
__global__ void kernel_sum(const type *vin, type *vout, int n)
{
    __shared__ type sdata[256]; // Warning, threads should be 256
    unsigned int iii = blockIdx.x * blockDim.x + threadIdx.x;
    unsigned int tid = threadIdx.x;
    type sum = 0;

    for (unsigned int i = iii; i < n; i += gridDim.x * blockDim.x)
    {
        sum += vin[i];
    };
    
    sdata[tid] = sum;
    __syncthreads();

    for (unsigned int s = blockDim.x >> 1; s > 0; s >>= 1)
    {
        if (tid < s)
        {
            sdata[tid] += sdata[tid + s];
        };
        __syncthreads();
    };

    if (tid == 0) vout[blockIdx.x] = sdata[0];
};


template <typename type>
__global__ void kernel_min(const type *vin, type *vout, int n)
{
    __shared__ type sdata[256];
    unsigned int iii = blockIdx.x * blockDim.x + threadIdx.x;
    unsigned int tid = threadIdx.x;
    type thread_result = vin[0];

    for (unsigned int i = iii; i < n; i += gridDim.x * blockDim.x)
    {
        type tmp = vin[i];
        thread_result = thread_result < tmp ? thread_result : tmp;
    };

    sdata[tid] = thread_result;
    __syncthreads();

    for (unsigned int s = blockDim.x >> 1; s > 0; s >>= 1)
    {
        if (tid < s)
        {
            sdata[tid] =  sdata[tid] < sdata[tid + s]? sdata[tid] : sdata[tid + s];
        };
        __syncthreads();
    };

    if (tid == 0) vout[blockIdx.x] = sdata[0];
};

template <typename type>
__global__ void kernel_max(const type *vin, type *vout, int n)
{
    __shared__ type sdata[256];
    unsigned int iii = blockIdx.x * blockDim.x + threadIdx.x;
    unsigned int tid = threadIdx.x;
    type thread_result = vin[0];

    for (unsigned int i = iii; i < n; i += gridDim.x * blockDim.x)
    {
        type tmp = vin[i];
        thread_result = thread_result > tmp ? thread_result : tmp;
    };

    sdata[tid] = thread_result;
    __syncthreads();

    for (unsigned int s = blockDim.x >> 1; s > 0; s >>= 1)
    {
        if (tid < s)
        {
            sdata[tid] =  sdata[tid] > sdata[tid + s]? sdata[tid] : sdata[tid + s];
        };
        __syncthreads();
    };

    if (tid == 0) vout[blockIdx.x] = sdata[0];
};

// ===========================================
// Image Kernels
// ===========================================
template <typename type>
__global__ void kernel_pad_2d(const type * vin, type * vout, int start0, int start1,
                              int end0, int end1, int n0, int n1)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int j = blockDim.y * blockIdx.y + threadIdx.y;

    int wo = n0+start0+end0;

    if (i < n0 && j < n1) // width = n0, heigth = n1
    {
        vout[start0+i + (start1+j)*wo] = vin[i + j*n0];
    };
};

template <typename type>
__global__ void kernel_unpad_2d(const type * vin, type * vout, int start0, int start1,
                              int end0, int end1, int n0, int n1)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int j = blockDim.y * blockIdx.y + threadIdx.y;

    int wo = n0+start0+end0;

    if (i < n0 && j < n1) // width = n0, heigth = n1
    {
        vout[i + j*n0] = vin[start0+i + (start1+j)*wo];
    };
};

template <typename type>
__global__ void kernel_pad_3d(const type * vin, type * vout, int start0, int start1, int start2,
                              int end0, int end1, int end2, int n0, int n1, int n2)
{
    // int blockIdx_z = __float2int_rd(blockIdx.y * invBlocksInY);
    // int blockIdx_y = blockIdx.y - (blockIdx_z * blocksInY);
    // int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    // int j = (blockIdx_y * blockDim.y) + threadIdx.y;
    // int k = (blockIdx_z * blockDim.z) + threadIdx.z;
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    int wo = n0+start0+end0; //vout size
    int ho = n1+start1+end1; //vout size

    if (i < n0 && j < n1 && k < n2) // width = n0, height = n1, depth = n2
    {
        vout[start0+i + (start1+j)*wo + (start2+k)*wo*ho] = vin[i + j*n0 + k*n0*n1];
    };
};

template <typename type>
__global__ void kernel_unpad_3d(const type * vin, type * vout, int start0, int start1, int start2,
                              int end0, int end1, int end2, int n0, int n1, int n2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    int wo = n0+start0+end0; //vout size
    int ho = n1+start1+end1; //vout size

    if (i < n0 && j < n1 && k < n2) // width = n0, height = n1, depth = n2
    {
        vout[i + j*n0 + k*n0*n1] = vin[start0+i + (start1+j)*wo + (start2+k)*wo*ho];
    };
};

template <typename type>
__global__ void kernel_grid_2d( type * x, type * y, double * sod, 
                                int n0, int n1)
{
    // consider sod conversion to float to support all gpu
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int j = blockDim.y * blockIdx.y + threadIdx.y;

    double c0 = sod[0]; double c1 = sod[1];
    double o0 = sod[2]; double o1 = sod[3];
    double d0 = sod[4]; double d1 = sod[5];
    double d2 = sod[6]; double d3 = sod[7];

    if (i < n0 && j < n1) // width = n0, heigth = n1
    {
        x[i+j*n0] = (type)(d0*c0*i + d1*c1*j + o0);
        y[i+j*n0] = (type)(d2*c0*i + d3*c1*j + o1);
    };
};

template <typename type>
__global__ void kernel_grid_3d( type * x, type * y, type * z, double * sod, 
                                int n0, int n1, int n2)
{
    // consider sod conversion to float to support all gpu
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    double c0 = sod[0]; double c1 = sod[1]; double c2 = sod[2];
    double o0 = sod[3]; double o1 = sod[4]; double o2 = sod[5];
    double d0 = sod[6]; double d1 = sod[7]; double d2 = sod[8];
    double d3 = sod[9]; double d4 = sod[10]; double d5 = sod[11];
    double d6 = sod[12]; double d7 = sod[13]; double d8 = sod[14];

    if (i < n0 && j < n1 && k < n2) // width = n0, height = n1, depth = n2
    {
        x[i + j*n0 + k*n0*n1] = (type)(d0*c0*i + d1*c1*j + d2*c2*k + o0);
        y[i + j*n0 + k*n0*n1] = (type)(d3*c0*i + d4*c1*j + d5*c2*k + o1);
        z[i + j*n0 + k*n0*n1] = (type)(d6*c0*i + d7*c1*j + d8*c2*k + o2);
    };
};

template <typename type>
__global__ void kernel_affine_2d( const type * xin, const type * yin, 
                                  type * xout, type * yout, 
                                  const type * param, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x; // one dimension, buffer in and out xy equal size
    type a0 = param[0]; type a1 = param[1];
    type a2 = param[2]; type a3 = param[3];
    type t0 = param[4]; type t1 = param[5];
    if (i < n)
    {
        xout[i] = (type)(a0*xin[i] + a1*yin[i] + t0);
        yout[i] = (type)(a2*xin[i] + a3*yin[i] + t1);
    };
};

template <typename type>
__global__ void kernel_affine_3d( const type * xin, const type * yin, const type * zin,
                                  type * xout, type * yout, type * zout,
                                  const type * param, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x; // one dimension, buffer in and out xyz equal size
    type a0 = param[0]; type a1 = param[1]; type a2 = param[2];
    type a3 = param[3]; type a4 = param[4]; type a5 = param[5];
    type a6 = param[6]; type a7 = param[7]; type a8 = param[8];
    type t0 = param[9]; type t1 = param[10]; type t2 = param[11];
    if (i < n)
    {
        xout[i] = (type)(a0*xin[i] + a1*yin[i] + a2*zin[i] + t0);
        yout[i] = (type)(a3*xin[i] + a4*yin[i] + a5*zin[i] + t1);
        zout[i] = (type)(a6*xin[i] + a7*yin[i] + a8*zin[i] + t2);
    };
};

template <typename type>
__global__ void kernel_affine_sod_2d( const type * xin, const type * yin,
                                      type * xout, type * yout,
                                      const double * sod, int n)
{
    // consider sod conversion to float to support all gpu
    int i = blockDim.x * blockIdx.x + threadIdx.x; // one dimension, buffer in and out xy equal size
    double c0 = sod[0]; double c1 = sod[1];
    double o0 = sod[2]; double o1 = sod[3];
    double d0 = sod[4]; double d1 = sod[5];
    double d2 = sod[6]; double d3 = sod[7];
    if (i < n)
    {
        xout[i] = (type)(d0*c0*xin[i] + d1*c1*yin[i] + o0);
        yout[i] = (type)(d2*c0*xin[i] + d3*c1*yin[i] + o1);
    }
};

template <typename type>
__global__ void kernel_affine_sod_3d( const type * xin, const type * yin, const type * zin,
                                      type * xout, type * yout, type * zout,
                                      const double * sod, int n)
{
    // consider sod conversion to float to support all gpu
    int i = blockDim.x * blockIdx.x + threadIdx.x; // one dimension, buffer in and out xyz equal size
    double c0 = sod[0]; double c1 = sod[1]; double c2 = sod[2];
    double o0 = sod[3]; double o1 = sod[4]; double o2 = sod[5];
    double d0 = sod[6]; double d1 = sod[7]; double d2 = sod[8];
    double d3 = sod[9]; double d4 = sod[10]; double d5 = sod[11];
    double d6 = sod[12]; double d7 = sod[13]; double d8 = sod[14];
    if (i < n)
    {
        xout[i] = (type)(d0*c0*xin[i] + d1*c1*yin[i] + d2*c2*zin[i] + o0);
        yout[i] = (type)(d3*c0*xin[i] + d4*c1*yin[i] + d5*c2*zin[i] + o1);
        zout[i] = (type)(d6*c0*xin[i] + d7*c1*yin[i] + d8*c2*zin[i] + o2);
    };
};

template <typename type>
__global__ void kernel_dfield_2d( const type * xin, const type * yin,   // grid coordinates
                                  const type * x, const type * y,       // vector field
                                  type * xout, type * yout, int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x; // one dimension, buffer in and out xy equal size
    if (i < n)
    {
        xout[i] = xin[i] + x[i];
        yout[i] = yin[i] + y[i];
    };
};

template <typename type>
__global__ void kernel_dfield_3d( const type * xin, const type * yin, const type * zin, // grid coordinates
                                  const type * x, const type * y, const type * z,       // vector field
                                  type * xout, type * yout, type * zout,                // output coordinates
                                  int n)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x; // one dimension, buffer in and out xy equal size
    if (i < n)
    {
        xout[i] = xin[i] + x[i];
        yout[i] = yin[i] + y[i];
        zout[i] = zin[i] + z[i];
    };
};

template <typename type>
__global__ void kernel_nearest_interpolation_2d( const type * xo, const type * yo,
                                                 const type * imgr, type * imgo,
                                                 int w, int h,   //img ref width and height
                                                 int n0, int n1) //img out dims
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int j = blockDim.y * blockIdx.y + threadIdx.y;

    if (i < n0 && j < n1)
    {
        int x = round(xo[i + j*n0]);
        int y = round(yo[i + j*n0]);
        if(x >= 0 && x < w && y >= 0 && y < h)
        {
            imgo[i + j*n0] = imgr[x + y*w];
        };
    };
};

template <typename type>
__global__ void kernel_nearest_interpolation_3d( const type * xo, const type * yo, const type * zo, 
                                                 const type * imgr, type * imgo,
                                                int w, int h, int l,    //img ref width, height and length
                                                int n0, int n1, int n2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    if (i < n0 && j < n1 && k < n2)
    {
        int x = round(xo[i + j*n0 + k*n0*n1]);
        int y = round(yo[i + j*n0 + k*n0*n1]);
        int z = round(yo[i + j*n0 + k*n0*n1]);
        if(x >= 0 && x < w && y >= 0 && y < h && z >= 0 && z < l)
        {
            imgo[i + j*n0 + k*n0*n1] = imgr[x + y*w + z*w*h];
        };
    };
};

template <typename type>
__global__ void kernel_linear_interpolation_2d( const type * xo, const type * yo,
                                                const type * imgr, type * imgo,
                                                int w, int h,   //img ref width and height
                                                int n0, int n1) //img out dims
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int j = blockDim.y * blockIdx.y + threadIdx.y;

    if (i < n0 && j < n1)
    {
        type zero = 0.01;
        int idx = i + j*n0;
        type xt = xo[idx];
        type yt = yo[idx];
        int x = floor(xt);
        int y = floor(yt);
        if(x >= 0 && x < w && y >= 0 && y < h)
        {
            type dx = xt - (type)x;
            type dy = yt - (type)y;
            if (dx < zero && dy < zero)
            {
                imgo[idx] = imgr[x+y*w];
            }
            else if (dy < zero || y >= h - 1) // same y
            {
                imgo[idx] = imgr[x+y*w]*(1-dx) + imgr[x+1+y*w]*(dx);
            }
            else if (dx < zero || x >= w - 1) // same x
            {
                imgo[idx] = imgr[x+y*w]*(1-dy) + imgr[x+(y+1)*w]*(dy);
            }
            else
            {
                // compute case x & y
                type dxdy = dx*dy;
                type r = imgr[x+y*w]*(1-dx-dy+dxdy) + imgr[x+1+y*w]*(dx-dxdy) + imgr[x+(y+1)*w]*(dy-dxdy) + imgr[x+1+(y+1)*w]*dxdy;
                imgo[idx] = r;
            };
        };
    };
};

// template <typename type>
// __global__ void kernel_linear_interpolation_2d( const type * xo, const type * yo,
//                                                 const type * imgr, type * imgo,
//                                                 int w, int h,   //img ref width and height
//                                                 int n0, int n1) //img out dims
// {
//     int i = blockDim.x * blockIdx.x + threadIdx.x;
//     int j = blockDim.y * blockIdx.y + threadIdx.y;

//     if (i < n0 && j < n1)
//     {
//         type xt = xo[i + j*n0];
//         type yt = yo[i + j*n0];
//         int x = floor(xt);
//         int y = floor(yt);
//         if(x >= 0 && x < w && y >= 0 && y < h - 1)
//         {
//             // __shared__ iv[4];
//             type iv[4] = {imgr[x+y*w], imgr[x+1+y*w], imgr[x+(y+1)*w], imgr[x+1+(y+1)*w]};
//             type dx = xt - (type)x;
//             type dy = yt - (type)y;
//             type dxdy = dx*dy;
//             type r = iv[0]*(1-dx-dy+dxdy) + iv[1]*(dx-dxdy) + iv[2]*(dy-dxdy) + iv[3]*dxdy;
//             imgo[i + j*n0] = r;
//         }
//         else if(x >= 0 && x < w && y == h - 1) // border case
//         {
//             type iv[2] = {imgr[x+y*w], imgr[x+1+y*w]};
//             type dx = xt - (type)x;
//             type r = iv[0]*(1-dx) + iv[1]*(dx);
//             imgo[i + j*n0] = r;
//         };
//     };
// };

template <typename type>
__global__ void kernel_linear_interpolation_3d( const type * xo, const type * yo, const type * zo,
                                                const type * imgr, type * imgo,
                                                int w, int h, int l, //img ref width, height and length
                                                int n0, int n1, int n2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    if (i < n0 && j < n1 && k < n2)
    {
        type zero = 0.01;
        int idx = i + j*n0 + k*n0*n1;
        type xt = xo[idx];
        type yt = yo[idx];
        type zt = zo[idx];
        int x = floor(xt);
        int y = floor(yt);
        int z = floor(zt);
        if(x >= 0 && x < w && y >= 0 && y < h && z >= 0 && z < l)
        {
            type dx = xt - (type)x;
            type dy = yt - (type)y;
            type dz = zt - (type)z;
            if (dx <= zero && dy <= zero && dz <= zero)
            {
                imgo[idx] = imgr[x+y*w+z*w*h];
            }
            else if (dz <= zero || z >= l - 1) // same z
            {   
                if (dy <= zero || y >= h - 1) // same y
                {
                    imgo[idx] = imgr[x+y*w+z*w*h]*(1-dx) + imgr[x+1+y*w+z*w*h]*(dx);
                }
                else if (dx <= zero || x >= w - 1) // same x
                {
                    imgo[idx] = imgr[x+y*w+z*w*h]*(1-dy) + imgr[x+(y+1)*w+z*w*h]*(dy);
                }
                else
                {
                    // compute case x & y
                    type dxdy = dx*dy;
                    type r = imgr[x+y*w+z*w*h]*(1-dx-dy+dxdy) + imgr[x+1+y*w+z*w*h]*(dx-dxdy) + imgr[x+(y+1)*w+z*w*h]*(dy-dxdy) + imgr[x+1+(y+1)*w+z*w*h]*dxdy;
                    imgo[idx] = r;
                };
            }
            else if (dy <= zero || y >= h - 1) // same y
            {
                if (dx <= zero || x >= w - 1) // same x
                {
                    imgo[idx] = imgr[x+y*w+z*w*h]*(1-dz) + imgr[x+y*w+(z+1)*w*h]*(dz);
                }
                else
                {
                    // compute case x & z
                    type dxdz = dx*dz;
                    type r = imgr[x+y*w+z*w*h]*(1-dx-dz+dxdz) + imgr[x+1+y*w+z*w*h]*(dx-dxdz) + imgr[x+y*w+(z+1)*w*h]*(dz-dxdz) + imgr[x+1+y*w+(z+1)*w*h]*dxdz;
                    imgo[idx] = r;
                };
            }
            else if (dx <= zero || x >= w - 1) // same x
            {
                // compute case y & z
                type dydz = dy*dz;
                type r = imgr[x+y*w+z*w*h]*(1-dy-dz+dydz) + imgr[x+(y+1)*w+z*w*h]*(dy-dydz) + imgr[x+y*w+(z+1)*w*h]*(dz-dydz) + imgr[x+(y+1)*w+(z+1)*w*h]*dydz;
                imgo[idx] = r;
            }
            else
            {
                // compute case x & y & z
                type dxdy = dx*dy;
                type rv = imgr[x+y*w+z*w*h]*(1-dx-dy+dxdy) + imgr[x+1+y*w+z*w*h]*(dx-dxdy) + imgr[x+(y+1)*w+z*w*h]*(dy-dxdy) + imgr[x+1+(y+1)*w+z*w*h]*dxdy;
                type rw = imgr[x+y*w+(z+1)*w*h]*(1-dx-dy+dxdy) + imgr[x+1+y*w+(z+1)*w*h]*(dx-dxdy) + imgr[x+(y+1)*w+(z+1)*w*h]*(dy-dxdy) + imgr[x+1+(y+1)*w+(z+1)*w*h]*dxdy;
                type r = rv*(1-dz) + rw*dz;
                imgo[idx] = r;
            };
        };
    };
};

// template <typename type>
// __global__ void kernel_linear_interpolation_3d( const type * xo, const type * yo, const type * zo,
//                                                 const type * imgr, type * imgo,
//                                                 int w, int h, int l, //img ref width, height and length
//                                                 int n0, int n1, int n2)
// {
//     int i = (blockIdx.x * blockDim.x) + threadIdx.x;
//     int j = (blockIdx.y * blockDim.y) + threadIdx.y;
//     int k = (blockIdx.z * blockDim.z) + threadIdx.z;

//     if (i < n0 && j < n1 && k < n2)
//     {
//         type xt = xo[i + j*n0 + k*n0*n1];
//         type yt = yo[i + j*n0 + k*n0*n1];
//         type zt = zo[i + j*n0 + k*n0*n1];
//         int x = floor(xt);
//         int y = floor(yt);
//         int z = floor(zt);
//         if(x >= 0 && x < w && y >= 0 && y < h && z >= 0 && z < l-1)
//         {
//             type iv[4] = {imgr[x+y*w+z*w*h], imgr[x+1+y*w+z*w*h], imgr[x+(y+1)*w+z*w*h], imgr[x+1+(y+1)*w+z*w*h]};
//             type iw[4] = {imgr[x+y*w+(z+1)*w*h], imgr[x+1+y*w+(z+1)*w*h], imgr[x+(y+1)*w+(z+1)*w*h], imgr[x+1+(y+1)*w+(z+1)*w*h]};
//             type dx = xt - (type)x;
//             type dy = yt - (type)y;
//             type dxdy = dx*dy;
//             type rv = iv[0]*(1-dx-dy+dxdy) + iv[1]*(dx-dxdy) + iv[2]*(dy-dxdy) + iv[3]*dxdy;
//             type rw = iw[0]*(1-dx-dy+dxdy) + iw[1]*(dx-dxdy) + iw[2]*(dy-dxdy) + iw[3]*dxdy;
//             type dz = zt - (type)z;
//             type r = rv*(1-dz) + rw*dz;
//             imgo[i + j*n0 + k*n0*n1] = r;
//         }
//         else if(x >= 0 && x < w && y >= 0 && y < h && z == l-1) // border case
//         {
//             type iv[4] = {imgr[x+y*w+z*w*h], imgr[x+1+y*w+z*w*h], imgr[x+(y+1)*w+z*w*h], imgr[x+1+(y+1)*w+z*w*h]};
//             type dx = xt - (type)x;
//             type dy = yt - (type)y;
//             type dxdy = dx*dy;
//             type rv = iv[0]*(1-dx-dy+dxdy) + iv[1]*(dx-dxdy) + iv[2]*(dy-dxdy) + iv[3]*dxdy;
//             imgo[i + j*n0 + k*n0*n1] = rv;
//         };
//     };
// };


// template <typename type>
// __device__ void cubic(type p[4], type * x, type * out) 
// {
//     out[0] = p[1] + 0.5 * x[0]*(p[2] - p[0] + x[0]*(2.0*p[0] - 5.0*p[1] + 4.0*p[2] - p[3] + x[0]*(3.0*(p[1] - p[2]) + p[3] - p[0])));
// };

template <typename type>
__device__ type cubic(type p[4], type x) 
{
    return p[1] + 0.5 * x*(p[2] - p[0] + x*(2.0*p[0] - 5.0*p[1] + 4.0*p[2] - p[3] + x*(3.0*(p[1] - p[2]) + p[3] - p[0])));
};

template <typename type>
__global__ void kernel_cubic_interpolation_2d( const type * xo, const type * yo,
                                                const type * imgr, type * imgo,
                                                int w, int h,   //img ref width and height
                                                int n0, int n1) //img out dims
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int j = blockDim.y * blockIdx.y + threadIdx.y;

    if (i < n0 && j < n1)
    {
        type xt = xo[i + j*n0];
        type yt = yo[i + j*n0];
        int x = floor(xt);
        int y = floor(yt);
        if(x >= 1 && x < w - 2 && y >= 1 && y < h - 2)
        {
            type dx = xt - (type)x;
            type dy = yt - (type)y;

            type r0[4] = {imgr[x-1+(y-1)*w], imgr[x+(y-1)*w], imgr[x+1+(y-1)*w], imgr[x+2+(y-1)*w]};
            type r1[4] = {imgr[x-1+(y)*w]  , imgr[x+(y)*w]  , imgr[x+1+(y)*w]  , imgr[x+2+(y)*w]};
            type r2[4] = {imgr[x-1+(y+1)*w], imgr[x+(y+1)*w], imgr[x+1+(y+1)*w], imgr[x+2+(y+1)*w]};
            type r3[4] = {imgr[x-1+(y+2)*w], imgr[x+(y+2)*w], imgr[x+1+(y+2)*w], imgr[x+2+(y+2)*w]};

            type r[4] = {cubic(r0, dx), cubic(r1, dx), cubic(r2, dx), cubic(r3, dx) };
            imgo[i + j*n0] = cubic(r, dy);
        }
        else if(x >= 0 && x < w && y >= 0 && y < h - 1)
        {
            // __shared__ iv[4];
            type iv[4] = {imgr[x+y*w], imgr[x+1+y*w], imgr[x+(y+1)*w], imgr[x+1+(y+1)*w]};
            type dx = xt - (type)x;
            type dy = yt - (type)y;
            type dxdy = dx*dy;
            type r = iv[0]*(1-dx-dy+dxdy) + iv[1]*(dx-dxdy) + iv[2]*(dy-dxdy) + iv[3]*dxdy;
            imgo[i + j*n0] = r;
        }
        else if(x >= 0 && x < w && y == h - 1) // border case
        {
            type iv[2] = {imgr[x+y*w], imgr[x+1+y*w]};
            type dx = xt - (type)x;
            type r = iv[0]*(1-dx) + iv[1]*(dx);
            imgo[i + j*n0] = r;
        };
    };
};

template <typename type>
__global__ void kernel_cubic_interpolation_3d( const type * xo, const type * yo, const type * zo,
                                                const type * imgr, type * imgo,
                                                int w, int h, int l, //img ref width, height and length
                                                int n0, int n1, int n2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    if (i < n0 && j < n1 && k < n2)
    {
        type xt = xo[i + j*n0 + k*n0*n1];
        type yt = yo[i + j*n0 + k*n0*n1];
        type zt = zo[i + j*n0 + k*n0*n1];
        int x = floor(xt);
        int y = floor(yt);
        int z = floor(zt);
        if(x >= 1 && x < w - 2 && y >= 1 && y < h - 2 && z >= 1 && z < l - 2)
        {
            type dx = xt - (type)x;
            type dy = yt - (type)y;
            type dz = zt - (type)z;

            type r00[4] = {imgr[x-1+(y-1)*w+(z-1)*w*h], imgr[x+(y-1)*w+(z-1)*w*h], imgr[x+1+(y-1)*w+(z-1)*w*h], imgr[x+2+(y-1)*w+(z-1)*w*h]};
            type r01[4] = {imgr[x-1+(y)*w+(z-1)*w*h]  , imgr[x+(y)*w+(z-1)*w*h]  , imgr[x+1+(y)*w+(z-1)*w*h]  , imgr[x+2+(y)*w+(z-1)*w*h]};
            type r02[4] = {imgr[x-1+(y+1)*w+(z-1)*w*h], imgr[x+(y+1)*w+(z-1)*w*h], imgr[x+1+(y+1)*w+(z-1)*w*h], imgr[x+2+(y+1)*w+(z-1)*w*h]};
            type r03[4] = {imgr[x-1+(y+2)*w+(z-1)*w*h], imgr[x+(y+2)*w+(z-1)*w*h], imgr[x+1+(y+2)*w+(z-1)*w*h], imgr[x+2+(y+2)*w+(z-1)*w*h]};
            type rx0[4] = {cubic(r00, dx), cubic(r01, dx), cubic(r02, dx), cubic(r03, dx)};

            type r10[4] = {imgr[x-1+(y-1)*w+z*w*h], imgr[x+(y-1)*w+z*w*h], imgr[x+1+(y-1)*w+z*w*h], imgr[x+2+(y-1)*w+z*w*h]};
            type r11[4] = {imgr[x-1+(y)*w+z*w*h]  , imgr[x+(y)*w+z*w*h]  , imgr[x+1+(y)*w+z*w*h]  , imgr[x+2+(y)*w+z*w*h]};
            type r12[4] = {imgr[x-1+(y+1)*w+z*w*h], imgr[x+(y+1)*w+z*w*h], imgr[x+1+(y+1)*w+z*w*h], imgr[x+2+(y+1)*w+z*w*h]};
            type r13[4] = {imgr[x-1+(y+2)*w+z*w*h], imgr[x+(y+2)*w+z*w*h], imgr[x+1+(y+2)*w+z*w*h], imgr[x+2+(y+2)*w+z*w*h]};
            type rx1[4] = {cubic(r10, dx), cubic(r11, dx), cubic(r12, dx), cubic(r13, dx)};

            type r20[4] = {imgr[x-1+(y-1)*w+(z+1)*w*h], imgr[x+(y-1)*w+(z+1)*w*h], imgr[x+1+(y-1)*w+(z+1)*w*h], imgr[x+2+(y-1)*w+(z+1)*w*h]};
            type r21[4] = {imgr[x-1+(y)*w+(z+1)*w*h]  , imgr[x+(y)*w+(z+1)*w*h]  , imgr[x+1+(y)*w+(z+1)*w*h]  , imgr[x+2+(y)*w+(z+1)*w*h]};
            type r22[4] = {imgr[x-1+(y+1)*w+(z+1)*w*h], imgr[x+(y+1)*w+(z+1)*w*h], imgr[x+1+(y+1)*w+(z+1)*w*h], imgr[x+2+(y+1)*w+(z+1)*w*h]};
            type r23[4] = {imgr[x-1+(y+2)*w+(z+1)*w*h], imgr[x+(y+2)*w+(z+1)*w*h], imgr[x+1+(y+2)*w+(z+1)*w*h], imgr[x+2+(y+2)*w+(z+1)*w*h]};
            type rx2[4] = {cubic(r20, dx), cubic(r21, dx), cubic(r22, dx), cubic(r23, dx)};

            type r30[4] = {imgr[x-1+(y-1)*w+(z+2)*w*h], imgr[x+(y-1)*w+(z+2)*w*h], imgr[x+1+(y-1)*w+(z+2)*w*h], imgr[x+2+(y-1)*w+(z+2)*w*h]};
            type r31[4] = {imgr[x-1+(y)*w+(z+2)*w*h]  , imgr[x+(y)*w+(z+2)*w*h]  , imgr[x+1+(y)*w+(z+2)*w*h]  , imgr[x+2+(y)*w+(z+2)*w*h]};
            type r32[4] = {imgr[x-1+(y+1)*w+(z+2)*w*h], imgr[x+(y+1)*w+(z+2)*w*h], imgr[x+1+(y+1)*w+(z+2)*w*h], imgr[x+2+(y+1)*w+(z+2)*w*h]};
            type r33[4] = {imgr[x-1+(y+2)*w+(z+2)*w*h], imgr[x+(y+2)*w+(z+2)*w*h], imgr[x+1+(y+2)*w+(z+2)*w*h], imgr[x+2+(y+2)*w+(z+2)*w*h]};
            type rx3[4] = {cubic(r30, dx), cubic(r31, dx), cubic(r32, dx), cubic(r33, dx)};

            type ry[4] = {cubic(rx0, dy), cubic(rx1, dy), cubic(rx2, dy), cubic(rx3, dy)};
            imgo[i + j*n0 + k*n0*n1] = cubic(ry, dz);
        }
        else if(x >= 0 && x < w && y >= 0 && y < h && z >= 0 && z < l-1)
        {
            type iv[4] = {imgr[x+y*w+z*w*h], imgr[x+1+y*w+z*w*h], imgr[x+(y+1)*w+z*w*h], imgr[x+1+(y+1)*w+z*w*h]};
            type iw[4] = {imgr[x+y*w+(z+1)*w*h], imgr[x+1+y*w+(z+1)*w*h], imgr[x+(y+1)*w+(z+1)*w*h], imgr[x+1+(y+1)*w+(z+1)*w*h]};
            type dx = xt - (type)x;
            type dy = yt - (type)y;
            type dxdy = dx*dy;
            type rv = iv[0]*(1-dx-dy+dxdy) + iv[1]*(dx-dxdy) + iv[2]*(dy-dxdy) + iv[3]*dxdy;
            type rw = iw[0]*(1-dx-dy+dxdy) + iw[1]*(dx-dxdy) + iw[2]*(dy-dxdy) + iw[3]*dxdy;
            type dz = zt - (type)z;
            type r = rv*(1-dz) + rw*dz;
            imgo[i + j*n0 + k*n0*n1] = r;
        }
        else if(x >= 0 && x < w && y >= 0 && y < h && z == l-1) // border case
        {
            type iv[4] = {imgr[x+y*w+z*w*h], imgr[x+1+y*w+z*w*h], imgr[x+(y+1)*w+z*w*h], imgr[x+1+(y+1)*w+z*w*h]};
            type dx = xt - (type)x;
            type dy = yt - (type)y;
            type dxdy = dx*dy;
            type rv = iv[0]*(1-dx-dy+dxdy) + iv[1]*(dx-dxdy) + iv[2]*(dy-dxdy) + iv[3]*dxdy;
            imgo[i + j*n0 + k*n0*n1] = rv;
        };
    };
};

template <typename type>
__global__ void kernel_gradientx( const type * imgr, type * imgo, 
                                  int n0, int n1, int n2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    if (i < n0 && j < n1 && (k == 0 || k < n2))
    {
        if(i == 0)
        {
            imgo[i + j*n0 + k*n0*n1] = imgr[i+1 + j*n0 + k*n0*n1] - imgr[i + j*n0 + k*n0*n1];
        }
        else if(i == n0 - 1)
        {
            imgo[i + j*n0 + k*n0*n1] = imgr[i + j*n0 + k*n0*n1] - imgr[i-1 + j*n0 + k*n0*n1];
        }
        else
        {
            imgo[i + j*n0 + k*n0*n1] = 0.5*imgr[i+1 + j*n0 + k*n0*n1] - 0.5*imgr[i-1 + j*n0 + k*n0*n1];
        };
    };
};

template <typename type>
__global__ void kernel_gradienty( const type * imgr, type * imgo, 
                                  int n0, int n1, int n2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    if (i < n0 && j < n1 && (k == 0 || k < n2))
    {
        if(j == 0)
        {
            imgo[i + j*n0 + k*n0*n1] = imgr[i + (j+1)*n0 + k*n0*n1] - imgr[i + j*n0 + k*n0*n1];
        }
        else if(j == n1 - 1)
        {
            imgo[i + j*n0 + k*n0*n1] = imgr[i + j*n0 + k*n0*n1] - imgr[i + (j-1)*n0 + k*n0*n1];
        }
        else
        {
            imgo[i + j*n0 + k*n0*n1] = 0.5*imgr[i + (j+1)*n0 + k*n0*n1] - 0.5*imgr[i + (j-1)*n0 + k*n0*n1];
        };
    };
};

template <typename type>
__global__ void kernel_gradientz( const type * imgr, type * imgo, 
                                  int n0, int n1, int n2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;

    if (i < n0 && j < n1 && k < n2)
    {
        if(k == 0)
        {
            imgo[i + j*n0 + k*n0*n1] = imgr[i + j*n0 + (k+1)*n0*n1] - imgr[i + j*n0 + k*n0*n1];
        }
        else if(k == n2 - 1)
        {
            imgo[i + j*n0 + k*n0*n1] = imgr[i + j*n0 + k*n0*n1] - imgr[i + j*n0 + (k-1)*n0*n1];
        }
        else
        {
            imgo[i + j*n0 + k*n0*n1] = 0.5*imgr[i + j*n0 + (k+1)*n0*n1] - 0.5*imgr[i + j*n0 + (k-1)*n0*n1];
        };
    };
};

template <typename type>
__global__ void kernel_convolution_2d( const type * imgr, const type * kern, //kernel width
                                       type * imgo, int n0, int n1, int kw0, int kw1)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int j = blockDim.y * blockIdx.y + threadIdx.y;
    int off0 = kw0>>1; int off1 = kw1>>1;

    if(i >= off0 && i < n0 - off0 && j >= off1 && j < n1 - off1)
    {
        type sum = 0;
        for (int p = 0; p < kw1; p++)
        {
            for (int q = 0; q < kw0; q++)
            {
                sum += imgr[i+p-off0 + (j+q-off1)*n0] * kern[p*kw0 + q];
            };
        };
        imgo[i + j*n0] = sum;
    };
};

template <typename type>
__global__ void kernel_convolution_3d( const type * imgr, const type * kern, //kernel width
                                       type * imgo, int n0, int n1, int n2, int kw0, int kw1, int kw2)
{
    int i = (blockIdx.x * blockDim.x) + threadIdx.x;
    int j = (blockIdx.y * blockDim.y) + threadIdx.y;
    int k = (blockIdx.z * blockDim.z) + threadIdx.z;
    
    int off0 = kw0>>1; int off1 = kw1>>1; int off2 = kw2>>1;

    if(i >= off0 && i < n0 - off0 && j >= off1 && j < n1 - off1 && k >= off2 && k < n2 - off2)
    {
        type sum = 0;
        for (int r = 0; r < kw2; r++)
        {
            for (int p = 0; p < kw1; p++)
            {
                for (int q = 0; q < kw0; q++)
                {
                    sum += imgr[i+q-off0 + (j+p-off1)*n0 + (k+r-off2)*n0*n1] * kern[r*kw0*kw1 + p*kw0 + q];
                };
            };
        };
        imgo[i + j*n0 + k*n0*n1] = sum;
    };
};


















// ===========================================
// Kernels Calls
// ===========================================


// ===========================================
// Data Kernels
// ===========================================
template <typename type>
void cuda_kernel_assign( std::vector<int> & grid, std::vector<int> & block, 
                         type * vin, type value, int n )
{
    // printf("kernel assign init\n");
    // printf("block: [%i, %i, %i]\n", block[0], block[1] , block[2]);
    // printf("grid: [%i, %i, %i]\n", grid[0], grid[1] , grid[2]);
    // printf("address: %x\n", vin);
    // printf("value: %f\n", value);
    // printf("size: %i\n", n);

    dim3 grd(grid[0]);
    dim3 blk(block[0]);

    kernel_assign<<<grd,blk>>>(vin, value, n);
    // kernel_assign<type><<<grd,blk>>>(vin, value, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel assign" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel assign" );
    // printf("kernel assign finish\n");
};

template <typename type>
void cuda_kernel_copy( std::vector<int> & grid, std::vector<int> & block,
                       const type * vin, type * vout, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_copy<<<grd,blk>>>(vin, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel copy" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel copy" );
};

template <typename typein, typename typeout>
void cuda_kernel_cast( std::vector<int> & grid, std::vector<int> & block, 
                       const typein * vin, typeout * vout, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_cast <typein,typeout><<<grd,blk>>>(vin, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel cast" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel cast" );
};

// ===========================================
// Vector Kernels
// ===========================================
template <typename type>
void cuda_kernel_add_scalar( std::vector<int> & grid, std::vector<int> & block, 
                             const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_add_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel add scalar" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel add scalar" );
};

template <typename type>
void cuda_kernel_sub_scalar( std::vector<int> & grid, std::vector<int> & block, 
                             const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_sub_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel sub scalar" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel sub scalar" );
};

template <typename type>
void cuda_kernel_sub_scalar_inv( std::vector<int> & grid, std::vector<int> & block, 
                             const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_sub_scalar_inv<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel sub scalar inv" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel sub scalar inv" );
};

template <typename type>
void cuda_kernel_mul_scalar( std::vector<int> & grid, std::vector<int> & block, 
                             const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_mul_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel mul scalar" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel mul scalar" );
};

template <typename type>
void cuda_kernel_div_scalar( std::vector<int> & grid, std::vector<int> & block, 
                             const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_div_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel div scalar" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel div scalar" );
};

template <typename type>
void cuda_kernel_div_scalar_inv( std::vector<int> & grid, std::vector<int> & block, 
                                 const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_div_scalar_inv<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel div scalar inv" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel div scalar inv" );
};

template <typename type>
void cuda_kernel_pow_scalar( std::vector<int> & grid, std::vector<int> & block, 
                             const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_pow_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel pow scalar" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel pow scalar" );
};

template <typename type>
void cuda_kernel_pow_scalar_inv( std::vector<int> & grid, std::vector<int> & block, 
                                 const type * vin, type * vout, type scalar, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_pow_scalar_inv<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel pow scalar inv" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel pow scalar inv" );
};

template <typename type>
void cuda_kernel_add( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin1, const type * vin2, type * vout, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_add<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel add" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel add" );
};

template <typename type>
void cuda_kernel_sub( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin1, const type * vin2, type * vout, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_sub<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel sub" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel sub" );
};

template <typename type>
void cuda_kernel_mul( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin1, const type * vin2, type * vout, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_mul<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel mul" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel mul" );
};

template <typename type>
void cuda_kernel_div( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin1, const type * vin2, type * vout, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_div<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel div" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel div" );
};

template <typename type>
void cuda_kernel_pow( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin1, const type * vin2, type * vout, int n )
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_pow<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel pow" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel pow" );
};

template <typename type>
void cuda_kernel_equal( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin1, const type * vin2, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_equal<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel equal" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel equal" );
};

template <typename type>
void cuda_kernel_greater( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin1, const type * vin2, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_greater<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel" );
};

template <typename type>
void cuda_kernel_less( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin1, const type * vin2, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_less<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel" );
};

template <typename type>
void cuda_kernel_greater_equal( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin1, const type * vin2, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_greater_equal<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel greater equal" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel greater equal" );
};

template <typename type>
void cuda_kernel_less_equal( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin1, const type * vin2, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_less_equal<<<grd,blk>>>(vin1, vin2, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel less equal" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel less equal" );
};

template <typename type>
void cuda_kernel_equal_scalar( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin, type * vout, type scalar, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_equal_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel equal scalar" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel equal scalar" );
};

template <typename type>
void cuda_kernel_greater_scalar( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin, type * vout, type scalar, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_greater_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel greater scalar" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel greater scalar" );
};

template <typename type>
void cuda_kernel_less_scalar( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin, type * vout, type scalar, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_less_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel less scalar" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel less scalar" );
};

template <typename type>
void cuda_kernel_greater_equal_scalar( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin, type * vout, type scalar, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_greater_equal_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel greater equal scalar" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel greater equal scalar" );
};

template <typename type>
void cuda_kernel_less_equal_scalar( std::vector<int> & grid, std::vector<int> & block, 
                        const type * vin, type * vout, type scalar, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_less_equal_scalar<<<grd,blk>>>(vin, vout, scalar, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel less equal scalar" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel less equal scalar" );
};

template <typename type>
void cuda_kernel_replace( std::vector<int> & grid, std::vector<int> & block, 
                          const type * idxs, const type * vin, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_replace<<<grd,blk>>>(idxs, vin, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel replace" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel replace" );
};

template <typename type>
void cuda_kernel_replace_scalar( std::vector<int> & grid, std::vector<int> & block, 
                          const type * idxs, type * vout, type value, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_replace_scalar<<<grd,blk>>>(idxs, vout, value, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel replace" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel replace" );
};


// ===========================================
// Reduction Kernels
// ===========================================
template <typename type>
void cuda_kernel_sum( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin, type * vout, int n)
{
    // printf("kernel sum init\n");
    // printf("block: [%i, %i, %i]\n", block[0], block[1] , block[2]);
    // printf("grid: [%i, %i, %i]\n", grid[0], grid[1] , grid[2]);
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_sum<<<grd,blk>>>(vin, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel sum" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel sum" );
};

template <typename type>
void cuda_kernel_min( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_min<<<grd,blk>>>(vin, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel min" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel min" );
};

template <typename type>
void cuda_kernel_max( std::vector<int> & grid, std::vector<int> & block, 
                      const type * vin, type * vout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_max<<<grd,blk>>>(vin, vout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel max" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel max" );
};

// ===========================================
// Image Kernels
// ===========================================
template <typename type>
void cuda_kernel_pad_2d( std::vector<int> & grid, std::vector<int> & block, 
                         const type * vin, type * vout, int start0, int start1,
                         int end0, int end1, int n0, int n1 )
{
    // printf("kernel pad init\n");
    // printf("block: [%i, %i, %i]\n", block[0], block[1] , block[2]);
    // printf("grid: [%i, %i, %i]\n", grid[0], grid[1] , grid[2]);
    dim3 grd(grid[0],grid[1]);
    dim3 blk(block[0],block[1]);
    kernel_pad_2d<<<grd,blk>>>(vin, vout, start0, start1, end0, end1, n0, n1);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel pad 2d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel pad 2d" );
};

template <typename type>
void cuda_kernel_unpad_2d( std::vector<int> & grid, std::vector<int> & block, 
                           const type * vin, type * vout, int start0, int start1,
                           int end0, int end1, int n0, int n1 )
{
    dim3 grd(grid[0],grid[1]);
    dim3 blk(block[0],block[1]);
    kernel_unpad_2d<<<grd,blk>>>(vin, vout, start0, start1, end0, end1, n0, n1);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel unpad 2d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel unpad 2d" );
};

template <typename type>
void cuda_kernel_pad_3d( std::vector<int> & grid, std::vector<int> & block, 
                         const type * vin, type * vout, int start0, int start1, int start2,
                         int end0, int end1, int end2, int n0, int n1, int n2 )
{
    // printf("kernel pad 3d init\n");
    // printf("block: [%i, %i, %i]\n", block[0], block[1] , block[2]);
    // printf("grid: [%i, %i, %i]\n", grid[0], grid[1] , grid[2]);
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_pad_3d<<<grd,blk>>>(vin, vout, start0, start1, start2, end0, end1, end2, n0, n1, n2);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel pad 3d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel pad 3d" );
};

template <typename type>
void cuda_kernel_unpad_3d( std::vector<int> & grid, std::vector<int> & block, 
                           const type * vin, type * vout, int start0, int start1, int start2,
                         int end0, int end1, int end2, int n0, int n1, int n2 )
{
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_unpad_3d<<<grd,blk>>>(vin, vout, start0, start1, start2, end0, end1, end2, n0, n1, n2);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel unpad 3d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel unpad 3d" );
};

template <typename type>
void cuda_kernel_grid_2d( std::vector<int> & grid, std::vector<int> & block, 
                          type * x, type * y, double * sod, 
                          int n0, int n1)
{
    dim3 grd(grid[0],grid[1]);
    dim3 blk(block[0],block[1]);
    kernel_grid_2d<<<grd,blk>>>(x, y, sod, n0, n1);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel grid 2d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel grid 2d" );
};

template <typename type>
void cuda_kernel_grid_3d( std::vector<int> & grid, std::vector<int> & block,
                          type * x, type * y, type * z, double * sod, 
                          int n0, int n1, int n2)
{
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_grid_3d<<<grd,blk>>>(x, y, z, sod, n0, n1, n2);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel grid 3d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel grid 3d" );
};

template <typename type>
void cuda_kernel_affine_2d( std::vector<int> & grid, std::vector<int> & block, 
                            const type * xin, const type * yin, 
                            type * xout, type * yout, 
                            const type * param, int n)
{
    // printf("kernel affine 2d init\n");
    // printf("block: [%i, %i, %i]\n", block[0], block[1] , block[2]);
    // printf("grid: [%i, %i, %i]\n", grid[0], grid[1] , grid[2]);
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_affine_2d<<<grd,blk>>>(xin, yin, xout, yout, param, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel affine 2d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel affine 2d" );
};

template <typename type>
void cuda_kernel_affine_3d( std::vector<int> & grid, std::vector<int> & block,
                            const type * xin, const type * yin, const type * zin,
                            type * xout, type * yout, type * zout,
                            const type * param, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_affine_3d<<<grd,blk>>>(xin, yin, zin, xout, yout, zout, param, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel affine 3d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel affine 3d" );
};

template <typename type>
void cuda_kernel_affine_sod_2d( std::vector<int> & grid, std::vector<int> & block,
                                const type * xin, const type * yin,
                                type * xout, type * yout,
                                const double * sod, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_affine_sod_2d<<<grd,blk>>>(xin, yin, xout, yout, sod, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel affine sod 2d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel affine sod 2d" );
};

template <typename type>
void cuda_kernel_affine_sod_3d( std::vector<int> & grid, std::vector<int> & block,
                                const type * xin, const type * yin, const type * zin,
                                type * xout, type * yout, type * zout,
                                const double * sod, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_affine_sod_3d<<<grd,blk>>>(xin, yin, zin, xout, yout, zout, sod, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel affine sod 3d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel affine sod 3d" );
};

template <typename type>
void cuda_kernel_dfield_2d( std::vector<int> & grid, std::vector<int> & block,
                            const type * xin, const type * yin,   // grid coordinates
                            const type * x, const type * y,       // vector field
                            type * xout, type * yout, int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_dfield_2d<<<grd,blk>>>(xin, yin, x, y, xout, yout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel dfield 2d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel dfield 2d" );
};

template <typename type>
void cuda_kernel_dfield_3d( std::vector<int> & grid, std::vector<int> & block,
                            const type * xin, const type * yin, const type * zin, // grid coordinates
                            const type * x, const type * y, const type * z,       // vector field
                            type * xout, type * yout, type * zout,                // output coordinates
                            int n)
{
    dim3 grd(grid[0]);
    dim3 blk(block[0]);
    kernel_dfield_3d<<<grd,blk>>>(xin, yin, zin, x, y, z, xout, yout, zout, n);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel dfield 3d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel dfield 3d" );
};

template <typename type>
void cuda_kernel_nearest_interpolation_2d( std::vector<int> & grid, std::vector<int> & block,
                                           const type * xo, const type * yo,
                                           const type * imgr, type * imgo,
                                           int w, int h,   //img ref width and height
                                           int n0, int n1) //img out dims
{
    dim3 grd(grid[0],grid[1]);
    dim3 blk(block[0],block[1]);
    kernel_nearest_interpolation_2d<<<grd,blk>>>(xo, yo, imgr, imgo, w, h, n0, n1);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel nearest interpolation 2d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel nearest interpolation 2d" );
};

template <typename type>
void cuda_kernel_nearest_interpolation_3d( std::vector<int> & grid, std::vector<int> & block, 
                                           const type * xo, const type * yo, const type * zo, 
                                           const type * imgr, type * imgo,
                                           int w, int h, int l,    //img ref width, height and length
                                           int n0, int n1, int n2)
{
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_nearest_interpolation_3d<<<grd,blk>>>(xo, yo, zo, imgr, imgo, w, h, l, n0, n1, n2);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel nearest interpolation 3d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel nearest interpolation 3d" );
};

template <typename type>
void cuda_kernel_linear_interpolation_2d( std::vector<int> & grid, std::vector<int> & block,
                                          const type * xo, const type * yo,
                                          const type * imgr, type * imgo,
                                          int w, int h,   //img ref width and height
                                          int n0, int n1) //img out dims
{
    dim3 grd(grid[0],grid[1]);
    dim3 blk(block[0],block[1]);
    kernel_linear_interpolation_2d<<<grd,blk>>>(xo, yo, imgr, imgo, w, h, n0, n1);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel linear interpolation 2d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel linear interpolation 2d" );
};

template <typename type>
void cuda_kernel_linear_interpolation_3d( std::vector<int> & grid, std::vector<int> & block,
                                          const type * xo, const type * yo, const type * zo,
                                          const type * imgr, type * imgo,
                                          int w, int h, int l, //img ref width, height and length
                                          int n0, int n1, int n2)
{
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_linear_interpolation_3d<<<grd,blk>>>(xo, yo, zo, imgr, imgo, w, h, l, n0, n1, n2);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel linear interpolation 3d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel linear interpolation 3d" );
};

template <typename type>
void cuda_kernel_cubic_interpolation_2d( std::vector<int> & grid, std::vector<int> & block,
                                          const type * xo, const type * yo,
                                          const type * imgr, type * imgo,
                                          int w, int h,   //img ref width and height
                                          int n0, int n1) //img out dims
{
    dim3 grd(grid[0],grid[1]);
    dim3 blk(block[0],block[1]);
    kernel_cubic_interpolation_2d<<<grd,blk>>>(xo, yo, imgr, imgo, w, h, n0, n1);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel cubic interpolation 2d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel cubic interpolation 2d" );
};

template <typename type>
void cuda_kernel_cubic_interpolation_3d( std::vector<int> & grid, std::vector<int> & block,
                                          const type * xo, const type * yo, const type * zo,
                                          const type * imgr, type * imgo,
                                          int w, int h, int l, //img ref width, height and length
                                          int n0, int n1, int n2)
{
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_cubic_interpolation_3d<<<grd,blk>>>(xo, yo, zo, imgr, imgo, w, h, l, n0, n1, n2);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel cubic interpolation 3d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel cubic interpolation 3d" );
};

template <typename type>
void cuda_kernel_gradientx( std::vector<int> & grid, std::vector<int> & block,
                            const type * imgr, type * imgo, 
                            int n0, int n1, int n2)
{
    dim3 grd;
    dim3 blk;
    if (block[2] == 0)
    {
        grd = dim3(grid[0],grid[1]);
        blk = dim3(block[0],block[1]);
    }
    else
    {
        grd = dim3(grid[0],grid[1],grid[2]);
        blk = dim3(block[0],block[1],block[2]);
    };

    kernel_gradientx<<<grd,blk>>>(imgr, imgo, n0, n1, n2);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel gradient x" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel gradient x" );
};

template <typename type>
void cuda_kernel_gradienty( std::vector<int> & grid, std::vector<int> & block,
                            const type * imgr, type * imgo, 
                            int n0, int n1, int n2)
{
    dim3 grd;
    dim3 blk;
    if (block[2] == 0)
    {
        grd = dim3(grid[0],grid[1]);
        blk = dim3(block[0],block[1]);
    }
    else
    {
        grd = dim3(grid[0],grid[1],grid[2]);
        blk = dim3(block[0],block[1],block[2]);
    };
    kernel_gradienty<<<grd,blk>>>(imgr, imgo, n0, n1, n2);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel gradient y" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel gradient y" );
};

template <typename type>
void cuda_kernel_gradientz( std::vector<int> & grid, std::vector<int> & block,
                            const type * imgr, type * imgo, 
                            int n0, int n1, int n2)
{
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_gradientz<<<grd,blk>>>(imgr, imgo, n0, n1, n2);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel gradient z" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel gradient z" );
};

template <typename type>
void cuda_kernel_convolution_2d( std::vector<int> & grid, std::vector<int> & block,
                                 const type * imgr, const type * kern, //kernel width
                                 type * imgo, int n0, int n1, int kw0, int kw1)
{
    dim3 grd(grid[0],grid[1]);
    dim3 blk(block[0],block[1]);
    kernel_convolution_2d<<<grd,blk>>>(imgr, kern, imgo, n0, n1, kw0, kw1);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel convolution 2d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel convolution 2d" );
};

template <typename type>
void cuda_kernel_convolution_3d( std::vector<int> & grid, std::vector<int> & block,
                                 const type * imgr, const type * kern, //kernel width
                                 type * imgo, int n0, int n1, int n2, int kw0, int kw1, int kw2)
{
    dim3 grd(grid[0],grid[1],grid[2]);
    dim3 blk(block[0],block[1],block[2]);
    kernel_convolution_3d<<<grd,blk>>>(imgr, kern, imgo, n0, n1, n2, kw0, kw1, kw2);
    imart_assert_kernel( hipPeekAtLastError(), "Fail to run kernel convolution 3d" );
    imart_assert_kernel( hipDeviceSynchronize(), "Fail to sync kernel convolution 3d" );
};

template <typename type>
void cuda_kernel_fft_2d( std::vector<int> & grid, std::vector<int> & block, 
                        const type * in_real, const type * in_img,
                        type * out_real, type * out_img, int n0, int n1, bool forward )
{
    ;
};

// specialization
template <> void cuda_kernel_fft_2d<float>( std::vector<int> & grid, std::vector<int> & block, 
                        const float * in_real, const float * in_img,
                        float * out_real, float * out_img, int n0, int n1, bool forward )
{

    int N = n0*n1;

    hipfftComplex *in;
    hipfftComplex *out;
    
    hipMalloc(&in, N*sizeof(hipfftComplex));
    hipMalloc(&out, N*sizeof(hipfftComplex));

    float * tmpi = (float *) in;

    // COPY in_real and in_img to in
    imart_assert_kernel ( hipMemcpy2D(tmpi, 2 * sizeof(tmpi[0]), 
                in_real, 1 * sizeof(in_real[0]), sizeof(in_real[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, real to complex");
    imart_assert_kernel ( hipMemcpy2D(tmpi + 1, 2 * sizeof(tmpi[0]), 
                in_img, 1 * sizeof(in_img[0]), sizeof(in_img[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, imaginary to complex");
    
    hipfftHandle p_fft;

    // std::cout << "input\n";
    hipfftPlan2d(&p_fft, n1, n0, HIPFFT_C2C);
    // std::cout << "plan\n";
    
    if (forward)
    {
        // Forward
        // std::cout << "execute\n";
        hipfftExecC2C(p_fft, (hipfftComplex *)in, (hipfftComplex *)out, HIPFFT_FORWARD);
    }
    else
    {
        // Inverse
        // std::cout << "execute\n";
        hipfftExecC2C(p_fft, (hipfftComplex *)in, (hipfftComplex *)out, HIPFFT_BACKWARD);
    };

    float * tmpo = (float *) out;

    // COPY out to out_real and out_img
    imart_assert_kernel ( hipMemcpy2D(out_real, 1 * sizeof(out_real[0]), 
                tmpo, 2 * sizeof(tmpo[0]), sizeof(out_real[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    imart_assert_kernel ( hipMemcpy2D(out_img, 1 * sizeof(out_img[0]), 
                tmpo+1, 2 * sizeof(tmpo[0]), sizeof(out_img[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    hipfftDestroy(p_fft);

    hipFree(in);
    hipFree(out);
};

// specialization
template <> void cuda_kernel_fft_2d<double>( std::vector<int> & grid, std::vector<int> & block, 
                        const double * in_real, const double * in_img,
                        double * out_real, double * out_img, int n0, int n1, bool forward )
{

    int N = n0*n1;

    hipfftDoubleComplex *in;
    hipfftDoubleComplex *out;
    
    hipMalloc(&in, N*sizeof(hipfftDoubleComplex));
    hipMalloc(&out, N*sizeof(hipfftDoubleComplex));

    double * tmpi = (double *) in;

    // COPY in_real and in_img to in
    imart_assert_kernel ( hipMemcpy2D(tmpi, 2 * sizeof(tmpi[0]), 
                in_real, 1 * sizeof(in_real[0]), sizeof(in_real[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, real to complex");
    imart_assert_kernel ( hipMemcpy2D(tmpi + 1, 2 * sizeof(tmpi[0]), 
                in_img, 1 * sizeof(in_img[0]), sizeof(in_img[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, imaginary to complex");
    
    hipfftHandle p_fft;

    // std::cout << "input\n";
    hipfftPlan2d(&p_fft, n1, n0, HIPFFT_C2C);
    // std::cout << "plan\n";
    
    if (forward)
    {
        // Forward
        // std::cout << "execute\n";
        hipfftExecZ2Z(p_fft, (hipfftDoubleComplex *)in, (hipfftDoubleComplex *)out, HIPFFT_FORWARD);
    }
    else
    {
        // Inverse
        // std::cout << "execute\n";
        hipfftExecZ2Z(p_fft, (hipfftDoubleComplex *)in, (hipfftDoubleComplex *)out, HIPFFT_BACKWARD);
    };

    double * tmpo = (double *) out;

    // COPY out to out_real and out_img
    imart_assert_kernel ( hipMemcpy2D(out_real, 1 * sizeof(out_real[0]), 
                tmpo, 2 * sizeof(tmpo[0]), sizeof(out_real[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    imart_assert_kernel ( hipMemcpy2D(out_img, 1 * sizeof(out_img[0]), 
                tmpo+1, 2 * sizeof(tmpo[0]), sizeof(out_img[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    hipfftDestroy(p_fft);

    hipFree(in);
    hipFree(out);
};

template <typename type>
void cuda_kernel_fft_3d( std::vector<int> & grid, std::vector<int> & block, 
                        const type * in_real, const type * in_img,
                        type * out_real, type * out_img, int n0, int n1, int n2, bool forward )
{
    ;
};

// specialization
template <> void cuda_kernel_fft_3d<float>( std::vector<int> & grid, std::vector<int> & block, 
                        const float * in_real, const float * in_img,
                        float * out_real, float * out_img, int n0, int n1, int n2, bool forward )
{

    int N = n0*n1*n2;

    hipfftComplex *in;
    hipfftComplex *out;
    
    hipMalloc(&in, N*sizeof(hipfftComplex));
    hipMalloc(&out, N*sizeof(hipfftComplex));

    float * tmpi = (float *) in;

    // COPY in_real and in_img to in
    imart_assert_kernel ( hipMemcpy2D(tmpi, 2 * sizeof(tmpi[0]), 
                in_real, 1 * sizeof(in_real[0]), sizeof(in_real[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, real to complex");
    imart_assert_kernel ( hipMemcpy2D(tmpi + 1, 2 * sizeof(tmpi[0]), 
                in_img, 1 * sizeof(in_img[0]), sizeof(in_img[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, imaginary to complex");
    
    hipfftHandle p_fft;

    // std::cout << "input\n";
    hipfftPlan3d(&p_fft, n2, n1, n0, HIPFFT_C2C);
    // std::cout << "plan\n";
    
    if (forward)
    {
        // Forward
        // std::cout << "execute\n";
        hipfftExecC2C(p_fft, (hipfftComplex *)in, (hipfftComplex *)out, HIPFFT_FORWARD);
    }
    else
    {
        // Inverse
        // std::cout << "execute\n";
        hipfftExecC2C(p_fft, (hipfftComplex *)in, (hipfftComplex *)out, HIPFFT_BACKWARD);
    };

    float * tmpo = (float *) out;

    // COPY out to out_real and out_img
    imart_assert_kernel ( hipMemcpy2D(out_real, 1 * sizeof(out_real[0]), 
                tmpo, 2 * sizeof(tmpo[0]), sizeof(out_real[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    imart_assert_kernel ( hipMemcpy2D(out_img, 1 * sizeof(out_img[0]), 
                tmpo+1, 2 * sizeof(tmpo[0]), sizeof(out_img[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    hipfftDestroy(p_fft);

    hipFree(in);
    hipFree(out);
};

// specialization
template <> void cuda_kernel_fft_3d<double>( std::vector<int> & grid, std::vector<int> & block, 
                        const double * in_real, const double * in_img,
                        double * out_real, double * out_img, int n0, int n1, int n2, bool forward )
{

    int N = n0*n1*n2;

    hipfftDoubleComplex *in;
    hipfftDoubleComplex *out;
    
    hipMalloc(&in, N*sizeof(hipfftDoubleComplex));
    hipMalloc(&out, N*sizeof(hipfftDoubleComplex));

    double * tmpi = (double *) in;

    // COPY in_real and in_img to in
    imart_assert_kernel ( hipMemcpy2D(tmpi, 2 * sizeof(tmpi[0]), 
                in_real, 1 * sizeof(in_real[0]), sizeof(in_real[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, real to complex");
    imart_assert_kernel ( hipMemcpy2D(tmpi + 1, 2 * sizeof(tmpi[0]), 
                in_img, 1 * sizeof(in_img[0]), sizeof(in_img[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, imaginary to complex");
    
    hipfftHandle p_fft;

    // std::cout << "input\n";
    hipfftPlan3d(&p_fft, n2, n1, n0, HIPFFT_C2C);
    // std::cout << "plan\n";
    
    if (forward)
    {
        // Forward
        // std::cout << "execute\n";
        hipfftExecZ2Z(p_fft, (hipfftDoubleComplex *)in, (hipfftDoubleComplex *)out, HIPFFT_FORWARD);
    }
    else
    {
        // Inverse
        // std::cout << "execute\n";
        hipfftExecZ2Z(p_fft, (hipfftDoubleComplex *)in, (hipfftDoubleComplex *)out, HIPFFT_BACKWARD);
    };

    double * tmpo = (double *) out;

    // COPY out to out_real and out_img
    imart_assert_kernel ( hipMemcpy2D(out_real, 1 * sizeof(out_real[0]), 
                tmpo, 2 * sizeof(tmpo[0]), sizeof(out_real[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    imart_assert_kernel ( hipMemcpy2D(out_img, 1 * sizeof(out_img[0]), 
                tmpo+1, 2 * sizeof(tmpo[0]), sizeof(out_img[0]), 
                N, hipMemcpyDeviceToDevice), "Error copy device to device, complex to real");

    hipfftDestroy(p_fft);

    hipFree(in);
    hipFree(out);
};


// template <typename type>
// void cuda_kernel_( std::vector<int> & grid, std::vector<int> & block, 
//                      )
// {
//     dim3 grd(grid[0],grid[1],grid[2]);
//     dim3 blk(block[0],block[1],block[2]);
//     kernel_<<<grd,blk>>>();
//     imart_assert_kernel( cudaPeekAtLastError(), "Fail to run kernel" );
//     imart_assert_kernel( cudaDeviceSynchronize(), "Fail to sync kernel" );
// };



// ===========================================
// Explicit instanciation
// ===========================================

// CASTINGS
template void cuda_kernel_cast <float,double>( std::vector<int> & grid, std::vector<int> & block, 
                       const float * vin, double * vout, int n );

template void cuda_kernel_cast <double,float>( std::vector<int> & grid, std::vector<int> & block, 
                       const double * vin, float * vout, int n );


template void cuda_kernel_cast <int,float>( std::vector<int> & grid, std::vector<int> & block, 
                       const int * vin, float * vout, int n );

template void cuda_kernel_cast <float,int>( std::vector<int> & grid, std::vector<int> & block, 
                       const float * vin, int * vout, int n );

template void cuda_kernel_cast <int,double>( std::vector<int> & grid, std::vector<int> & block, 
                       const int * vin, double * vout, int n );

template void cuda_kernel_cast <double,int>( std::vector<int> & grid, std::vector<int> & block, 
                       const double * vin, int * vout, int n );


template void cuda_kernel_cast <float,unsigned short>( std::vector<int> & grid, std::vector<int> & block, 
                       const float * vin, unsigned short * vout, int n );

template void cuda_kernel_cast <unsigned short,float>( std::vector<int> & grid, std::vector<int> & block, 
                       const unsigned short * vin, float * vout, int n );

template void cuda_kernel_cast <double,unsigned short>( std::vector<int> & grid, std::vector<int> & block, 
                       const double * vin, unsigned short * vout, int n );

template void cuda_kernel_cast <unsigned short,double>( std::vector<int> & grid, std::vector<int> & block, 
                       const unsigned short * vin, double * vout, int n );


template void cuda_kernel_cast <float,unsigned int>( std::vector<int> & grid, std::vector<int> & block, 
                       const float * vin, unsigned int * vout, int n );

template void cuda_kernel_cast <unsigned int,float>( std::vector<int> & grid, std::vector<int> & block, 
                       const unsigned int * vin, float * vout, int n );

template void cuda_kernel_cast <double,unsigned int>( std::vector<int> & grid, std::vector<int> & block, 
                       const double * vin, unsigned int * vout, int n );

template void cuda_kernel_cast <unsigned int,double>( std::vector<int> & grid, std::vector<int> & block, 
                       const unsigned int * vin, double * vout, int n );


template void cuda_kernel_cast <float,unsigned char>( std::vector<int> & grid, std::vector<int> & block, 
                       const float * vin, unsigned char * vout, int n );

template void cuda_kernel_cast <unsigned char,float>( std::vector<int> & grid, std::vector<int> & block, 
                       const unsigned char * vin, float * vout, int n );

template void cuda_kernel_cast <double,unsigned char>( std::vector<int> & grid, std::vector<int> & block, 
                       const double * vin, unsigned char * vout, int n );

template void cuda_kernel_cast <unsigned char,double>( std::vector<int> & grid, std::vector<int> & block, 
                       const unsigned char * vin, double * vout, int n );


template void cuda_kernel_cast <float,float>( std::vector<int> & grid, std::vector<int> & block, 
                       const float * vin, float * vout, int n );

template void cuda_kernel_cast <double,double>( std::vector<int> & grid, std::vector<int> & block, 
                       const double * vin, double * vout, int n );


template void cuda_kernel_assign<float>( std::vector<int> & grid, std::vector<int> & block,
                                         float * vin, float value, int n );

template void cuda_kernel_copy<float>( std::vector<int> & grid, std::vector<int> & block,
                                       const float * vin, float * vout, int n );

template void cuda_kernel_add<float>( std::vector<int> & grid, std::vector<int> & block,
                                      const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_sub<float>( std::vector<int> & grid, std::vector<int> & block,
                                      const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_mul<float>( std::vector<int> & grid, std::vector<int> & block,
                                      const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_div<float>( std::vector<int> & grid, std::vector<int> & block,
                                      const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_pow<float>( std::vector<int> & grid, std::vector<int> & block,
                                      const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_add_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_sub_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_sub_scalar_inv<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_mul_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_div_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_div_scalar_inv<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_pow_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_pow_scalar_inv<float>( std::vector<int> & grid, std::vector<int> & block, 
                                             const float * vin, float * vout, float scalar, int n );

template void cuda_kernel_equal<float>( std::vector<int> & grid, std::vector<int> & block,
                                        const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_greater<float>( std::vector<int> & grid, std::vector<int> & block,
                                        const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_less<float>( std::vector<int> & grid, std::vector<int> & block,
                                        const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_greater_equal<float>( std::vector<int> & grid, std::vector<int> & block,
                                        const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_less_equal<float>( std::vector<int> & grid, std::vector<int> & block,
                                        const float * vin1, const float * vin2, float * vout, int n );

template void cuda_kernel_equal_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                                        const float * vin, float * vout, float scalar, int n);

template void cuda_kernel_greater_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                        const float * vin, float * vout, float scalar, int n);

template void cuda_kernel_less_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                        const float * vin, float * vout, float scalar, int n);

template void cuda_kernel_greater_equal_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                        const float * vin, float * vout, float scalar, int n);

template void cuda_kernel_less_equal_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                        const float * vin, float * vout, float scalar, int n);

template void cuda_kernel_replace<float>( std::vector<int> & grid, std::vector<int> & block, 
                          const float * idxs, const float * vin, float * vout, int n);

template void cuda_kernel_replace_scalar<float>( std::vector<int> & grid, std::vector<int> & block, 
                          const float * idxs, float * vout, float value, int n);


template void cuda_kernel_sum<float>( std::vector<int> & grid, std::vector<int> & block, const float * vin, float * vout, int n );

template void cuda_kernel_min<float>( std::vector<int> & grid, std::vector<int> & block, const float * vin, float * vout, int n );

template void cuda_kernel_max<float>( std::vector<int> & grid, std::vector<int> & block, const float * vin, float * vout, int n );


template void cuda_kernel_pad_2d<float>( std::vector<int> & grid, std::vector<int> & block, 
                            const float * vin, float * vout, int start0, int start1, 
                            int end0, int end1, int n0, int n1 );

template void cuda_kernel_unpad_2d<float>( std::vector<int> & grid, std::vector<int> & block, 
                            const float * vin, float * vout, int start0, int start1,
                            int end0, int end1, int n0, int n1);

template void cuda_kernel_pad_3d<float>( std::vector<int> & grid, std::vector<int> & block, 
                         const float * vin, float * vout, int start0, int start1, int start2,
                         int end0, int end1, int end2, int n0, int n1, int n2);

template void cuda_kernel_unpad_3d<float>( std::vector<int> & grid, std::vector<int> & block, 
                            const float * vin, float * vout, int start0, int start1, int start2,
                            int end0, int end1, int end2, int n0, int n1, int n2);

template void cuda_kernel_grid_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                          float * x, float * y, double * sod, 
                          int n0, int n1);

template void cuda_kernel_grid_3d<float>( std::vector<int> & grid, std::vector<int> & block,
                          float * x, float * y, float * z, double * sod, 
                          int n0, int n1, int n2);

template void cuda_kernel_affine_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                            const float * xin, const float * yin, 
                            float * xout, float * yout, 
                            const float * param, int n);

template void cuda_kernel_affine_3d<float>( std::vector<int> & grid, std::vector<int> & block,
                            const float * xin, const float * yin, const float * zin,
                            float * xout, float * yout, float * zout,
                            const float * param, int n) ;

template void cuda_kernel_affine_sod_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                                const float * xin, const float * yin,
                                float * xout, float * yout,
                                const double * sod, int n);

template void cuda_kernel_affine_sod_3d<float>( std::vector<int> & grid, std::vector<int> & block,
                                const float * xin, const float * yin, const float * zin,
                                float * xout, float * yout, float * zout,
                                const double * sod, int n);

template void cuda_kernel_dfield_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                            const float * xin, const float * yin,   // grid coordinates
                            const float * x, const float * y,       // vector field
                            float * xout, float * yout, int n);

template void cuda_kernel_dfield_3d<float>( std::vector<int> & grid, std::vector<int> & block,
                            const float * xin, const float * yin, const float * zin, // grid coordinates
                            const float * x, const float * y, const float * z,       // vector field
                            float * xout, float * yout, float * zout, int n);

template void cuda_kernel_nearest_interpolation_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                                           const float * xo, const float * yo,
                                           const float * imgr, float * imgo,
                                           int w, int h,   //img ref width and height
                                           int n0, int n1); //img out dims

template void cuda_kernel_nearest_interpolation_3d<float>( std::vector<int> & grid, std::vector<int> & block, 
                                           const float * xo, const float * yo, const float * zo, 
                                           const float * imgr, float * imgo,
                                           int w, int h, int l,    //img ref width, height and length
                                           int n0, int n1, int n2 );

template void cuda_kernel_linear_interpolation_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                                          const float * xo, const float * yo,
                                          const float * imgr, float * imgo,
                                          int w, int h,   //img ref width and height
                                          int n0, int n1); //img out dims

template void cuda_kernel_linear_interpolation_3d<float>( std::vector<int> & grid, std::vector<int> & block,
                                          const float * xo, const float * yo, const float * zo,
                                          const float * imgr, float * imgo,
                                          int w, int h, int l, //img ref width, height and length
                                          int n0, int n1, int n2);

template void cuda_kernel_cubic_interpolation_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                                          const float * xo, const float * yo,
                                          const float * imgr, float * imgo,
                                          int w, int h,   //img ref width and height
                                          int n0, int n1); //img out dims

// template void cuda_kernel_cubic_interpolation_3d<float>( std::vector<int> & grid, std::vector<int> & block,
//                                           const float * xo, const float * yo, const float * zo,
//                                           const float * imgr, float * imgo,
//                                           int w, int h, int l, //img ref width, height and length
//                                           int n0, int n1, int n2);

template void cuda_kernel_gradientx<float>( std::vector<int> & grid, std::vector<int> & block,
                            const float * imgr, float * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_gradienty<float>( std::vector<int> & grid, std::vector<int> & block,
                            const float * imgr, float * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_gradientz<float>( std::vector<int> & grid, std::vector<int> & block,
                            const float * imgr, float * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_convolution_2d<float>( std::vector<int> & grid, std::vector<int> & block,
                                 const float * imgr, const float * kern, //kernel width
                                 float * imgo, int n0, int n1, int kw0, int kw1);

template void cuda_kernel_convolution_3d<float>( std::vector<int> & grid, std::vector<int> & block,
                                 const float * imgr, const float * kern, //kernel width
                                 float * imgo, int n0, int n1, int n2, int kw0, int kw1, int kw2);






template void cuda_kernel_assign<double>( std::vector<int> & grid, std::vector<int> & block,
                                         double * vin, double value, int n );

template void cuda_kernel_copy<double>( std::vector<int> & grid, std::vector<int> & block,
                                       const double * vin, double * vout, int n );

template void cuda_kernel_add<double>( std::vector<int> & grid, std::vector<int> & block,
                                      const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_sub<double>( std::vector<int> & grid, std::vector<int> & block,
                                      const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_mul<double>( std::vector<int> & grid, std::vector<int> & block,
                                      const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_div<double>( std::vector<int> & grid, std::vector<int> & block,
                                      const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_pow<double>( std::vector<int> & grid, std::vector<int> & block,
                                      const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_add_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_sub_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_sub_scalar_inv<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_mul_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_div_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_div_scalar_inv<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_pow_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_pow_scalar_inv<double>( std::vector<int> & grid, std::vector<int> & block, 
                                             const double * vin, double * vout, double scalar, int n );

template void cuda_kernel_equal<double>( std::vector<int> & grid, std::vector<int> & block,
                                        const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_greater<double>( std::vector<int> & grid, std::vector<int> & block,
                                        const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_less<double>( std::vector<int> & grid, std::vector<int> & block,
                                        const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_greater_equal<double>( std::vector<int> & grid, std::vector<int> & block,
                                        const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_less_equal<double>( std::vector<int> & grid, std::vector<int> & block,
                                        const double * vin1, const double * vin2, double * vout, int n );

template void cuda_kernel_equal_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                                        const double * vin, double * vout, double scalar, int n);

template void cuda_kernel_greater_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                        const double * vin, double * vout, double scalar, int n);

template void cuda_kernel_less_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                        const double * vin, double * vout, double scalar, int n);

template void cuda_kernel_greater_equal_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                        const double * vin, double * vout, double scalar, int n);

template void cuda_kernel_less_equal_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                        const double * vin, double * vout, double scalar, int n);

template void cuda_kernel_replace<double>( std::vector<int> & grid, std::vector<int> & block, 
                          const double * idxs, const double * vin, double * vout, int n);

template void cuda_kernel_replace_scalar<double>( std::vector<int> & grid, std::vector<int> & block, 
                          const double * idxs, double * vout, double value, int n);

template void cuda_kernel_sum<double>( std::vector<int> & grid, std::vector<int> & block, const double * vin, double * vout, int n );

template void cuda_kernel_min<double>( std::vector<int> & grid, std::vector<int> & block, const double * vin, double * vout, int n );

template void cuda_kernel_max<double>( std::vector<int> & grid, std::vector<int> & block, const double * vin, double * vout, int n );

template void cuda_kernel_pad_2d<double>( std::vector<int> & grid, std::vector<int> & block, 
                            const double * vin, double * vout, int start0, int start1, 
                            int end0, int end1, int n0, int n1 );

template void cuda_kernel_unpad_2d<double>( std::vector<int> & grid, std::vector<int> & block, 
                            const double * vin, double * vout, int start0, int start1,
                            int end0, int end1, int n0, int n1);

template void cuda_kernel_pad_3d<double>( std::vector<int> & grid, std::vector<int> & block, 
                         const double * vin, double * vout, int start0, int start1, int start2,
                         int end0, int end1, int end2, int n0, int n1, int n2);

template void cuda_kernel_unpad_3d<double>( std::vector<int> & grid, std::vector<int> & block, 
                            const double * vin, double * vout, int start0, int start1, int start2,
                            int end0, int end1, int end2, int n0, int n1, int n2);

template void cuda_kernel_grid_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                          double * x, double * y, double * sod, 
                          int n0, int n1);

template void cuda_kernel_grid_3d<double>( std::vector<int> & grid, std::vector<int> & block,
                          double * x, double * y, double * z, double * sod, 
                          int n0, int n1, int n2);

template void cuda_kernel_affine_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                            const double * xin, const double * yin, 
                            double * xout, double * yout, 
                            const double * param, int n);

template void cuda_kernel_affine_3d<double>( std::vector<int> & grid, std::vector<int> & block,
                            const double * xin, const double * yin, const double * zin,
                            double * xout, double * yout, double * zout,
                            const double * param, int n) ;

template void cuda_kernel_affine_sod_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                                const double * xin, const double * yin,
                                double * xout, double * yout,
                                const double * sod, int n);

template void cuda_kernel_affine_sod_3d<double>( std::vector<int> & grid, std::vector<int> & block,
                                const double * xin, const double * yin, const double * zin,
                                double * xout, double * yout, double * zout,
                                const double * sod, int n);

template void cuda_kernel_dfield_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                            const double * xin, const double * yin,   // grid coordinates
                            const double * x, const double * y,       // vector field
                            double * xout, double * yout, int n);

template void cuda_kernel_dfield_3d<double>( std::vector<int> & grid, std::vector<int> & block,
                            const double * xin, const double * yin, const double * zin, // grid coordinates
                            const double * x, const double * y, const double * z,       // vector field
                            double * xout, double * yout, double * zout, int n);

template void cuda_kernel_nearest_interpolation_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                                           const double * xo, const double * yo,
                                           const double * imgr, double * imgo,
                                           int w, int h,   //img ref width and height
                                           int n0, int n1); //img out dims

template void cuda_kernel_nearest_interpolation_3d<double>( std::vector<int> & grid, std::vector<int> & block, 
                                           const double * xo, const double * yo, const double * zo, 
                                           const double * imgr, double * imgo,
                                           int w, int h, int l,    //img ref width, height and length
                                           int n0, int n1, int n2);

template void cuda_kernel_linear_interpolation_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                                          const double * xo, const double * yo,
                                          const double * imgr, double * imgo,
                                          int w, int h,   //img ref width and height
                                          int n0, int n1); //img out dims

template void cuda_kernel_linear_interpolation_3d<double>( std::vector<int> & grid, std::vector<int> & block,
                                          const double * xo, const double * yo, const double * zo,
                                          const double * imgr, double * imgo,
                                          int w, int h, int l, //img ref width, height and length
                                          int n0, int n1, int n2);

template void cuda_kernel_cubic_interpolation_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                                          const double * xo, const double * yo,
                                          const double * imgr, double * imgo,
                                          int w, int h,   //img ref width and height
                                          int n0, int n1); //img out dims

template void cuda_kernel_cubic_interpolation_3d<double>( std::vector<int> & grid, std::vector<int> & block,
                                          const double * xo, const double * yo, const double * zo,
                                          const double * imgr, double * imgo,
                                          int w, int h, int l, //img ref width, height and length
                                          int n0, int n1, int n2);

template void cuda_kernel_gradientx<double>( std::vector<int> & grid, std::vector<int> & block,
                            const double * imgr, double * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_gradienty<double>( std::vector<int> & grid, std::vector<int> & block,
                            const double * imgr, double * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_gradientz<double>( std::vector<int> & grid, std::vector<int> & block,
                            const double * imgr, double * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_convolution_2d<double>( std::vector<int> & grid, std::vector<int> & block,
                                 const double * imgr, const double * kern, //kernel width
                                 double * imgo, int n0, int n1, int kw0, int kw1);

template void cuda_kernel_convolution_3d<double>( std::vector<int> & grid, std::vector<int> & block,
                                 const double * imgr, const double * kern, //kernel width
                                 double * imgo, int n0, int n1, int n2, int kw0, int kw1, int kw2);





template void cuda_kernel_assign<int>( std::vector<int> & grid, std::vector<int> & block,
                                         int * vin, int value, int n );

template void cuda_kernel_copy<int>( std::vector<int> & grid, std::vector<int> & block,
                                       const int * vin, int * vout, int n );

template void cuda_kernel_add<int>( std::vector<int> & grid, std::vector<int> & block,
                                      const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_sub<int>( std::vector<int> & grid, std::vector<int> & block,
                                      const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_mul<int>( std::vector<int> & grid, std::vector<int> & block,
                                      const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_div<int>( std::vector<int> & grid, std::vector<int> & block,
                                      const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_pow<int>( std::vector<int> & grid, std::vector<int> & block,
                                      const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_add_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_sub_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_sub_scalar_inv<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_mul_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_div_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_div_scalar_inv<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_pow_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_pow_scalar_inv<int>( std::vector<int> & grid, std::vector<int> & block, 
                                             const int * vin, int * vout, int scalar, int n );

template void cuda_kernel_equal<int>( std::vector<int> & grid, std::vector<int> & block,
                                        const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_greater<int>( std::vector<int> & grid, std::vector<int> & block,
                                        const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_less<int>( std::vector<int> & grid, std::vector<int> & block,
                                        const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_greater_equal<int>( std::vector<int> & grid, std::vector<int> & block,
                                        const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_less_equal<int>( std::vector<int> & grid, std::vector<int> & block,
                                        const int * vin1, const int * vin2, int * vout, int n );

template void cuda_kernel_equal_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                                        const int * vin, int * vout, int scalar, int n);

template void cuda_kernel_greater_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                        const int * vin, int * vout, int scalar, int n);

template void cuda_kernel_less_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                        const int * vin, int * vout, int scalar, int n);

template void cuda_kernel_greater_equal_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                        const int * vin, int * vout, int scalar, int n);

template void cuda_kernel_less_equal_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                        const int * vin, int * vout, int scalar, int n);

template void cuda_kernel_replace<int>( std::vector<int> & grid, std::vector<int> & block, 
                          const int * idxs, const int * vin, int * vout, int n);

template void cuda_kernel_replace_scalar<int>( std::vector<int> & grid, std::vector<int> & block, 
                          const int * idxs, int * vout, int value, int n);

template void cuda_kernel_sum<int>( std::vector<int> & grid, std::vector<int> & block, const int * vin, int * vout, int n );

template void cuda_kernel_min<int>( std::vector<int> & grid, std::vector<int> & block, const int * vin, int * vout, int n );

template void cuda_kernel_max<int>( std::vector<int> & grid, std::vector<int> & block, const int * vin, int * vout, int n );


template void cuda_kernel_pad_2d<int>( std::vector<int> & grid, std::vector<int> & block, 
                            const int * vin, int * vout, int start0, int start1, 
                            int end0, int end1, int n0, int n1 );

template void cuda_kernel_unpad_2d<int>( std::vector<int> & grid, std::vector<int> & block, 
                            const int * vin, int * vout, int start0, int start1,
                            int end0, int end1, int n0, int n1 );

template void cuda_kernel_pad_3d<int>( std::vector<int> & grid, std::vector<int> & block, 
                         const int * vin, int * vout, int start0, int start1, int start2,
                         int end0, int end1, int end2, int n0, int n1, int n2 );

template void cuda_kernel_unpad_3d<int>( std::vector<int> & grid, std::vector<int> & block, 
                            const int * vin, int * vout, int start0, int start1, int start2,
                            int end0, int end1, int end2, int n0, int n1, int n2 );

template void cuda_kernel_grid_2d<int>( std::vector<int> & grid, std::vector<int> & block,
                          int * x, int * y, double * sod, 
                          int n0, int n1 );

template void cuda_kernel_grid_3d<int>( std::vector<int> & grid, std::vector<int> & block,
                          int * x, int * y, int * z, double * sod, 
                          int n0, int n1, int n2 );

template void cuda_kernel_affine_2d<int>( std::vector<int> & grid, std::vector<int> & block,
                            const int * xin, const int * yin, 
                            int * xout, int * yout, 
                            const int * param, int n );

template void cuda_kernel_affine_3d<int>( std::vector<int> & grid, std::vector<int> & block,
                            const int * xin, const int * yin, const int * zin,
                            int * xout, int * yout, int * zout,
                            const int * param, int n );

template void cuda_kernel_affine_sod_2d<int>( std::vector<int> & grid, std::vector<int> & block,
                                const int * xin, const int * yin,
                                int * xout, int * yout,
                                const double * sod, int n);

template void cuda_kernel_affine_sod_3d<int>( std::vector<int> & grid, std::vector<int> & block,
                                const int * xin, const int * yin, const int * zin,
                                int * xout, int * yout, int * zout,
                                const double * sod, int n );

template void cuda_kernel_dfield_2d<int>( std::vector<int> & grid, std::vector<int> & block,
                            const int * xin, const int * yin,   // grid coordinates
                            const int * x, const int * y,       // vector field
                            int * xout, int * yout, int n );

template void cuda_kernel_dfield_3d<int>( std::vector<int> & grid, std::vector<int> & block,
                            const int * xin, const int * yin, const int * zin, // grid coordinates
                            const int * x, const int * y, const int * z,       // vector field
                            int * xout, int * yout, int * zout, int n );

// template void cuda_kernel_nearest_interpolation_2d<int>( std::vector<int> & grid, std::vector<int> & block,
//                                            const int * xo, const int * yo,
//                                            const int * imgr, int * imgo,
//                                            int w, int h,   //img ref width and height
//                                            int n0, int n1); //img out dims

// template void cuda_kernel_nearest_interpolation_3d<int>( std::vector<int> & grid, std::vector<int> & block, 
//                                            const int * xo, const int * yo, const int * zo, 
//                                            const int * imgr, int * imgo,
//                                            int w, int h, int l,    //img ref width, height and length
//                                            int n0, int n1, int n2);

// template void cuda_kernel_linear_interpolation_2d<int>( std::vector<int> & grid, std::vector<int> & block,
//                                           const int * xo, const int * yo,
//                                           const int * imgr, int * imgo,
//                                           int w, int h,   //img ref width and height
//                                           int n0, int n1); //img out dims

// template void cuda_kernel_linear_interpolation_3d<int>( std::vector<int> & grid, std::vector<int> & block,
//                                           const int * xo, const int * yo, const int * zo,
//                                           const int * imgr, int * imgo,
//                                           int w, int h, int l, //img ref width, height and length
//                                           int n0, int n1, int n2);

template void cuda_kernel_gradientx<int>( std::vector<int> & grid, std::vector<int> & block,
                            const int * imgr, int * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_gradienty<int>( std::vector<int> & grid, std::vector<int> & block,
                            const int * imgr, int * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_gradientz<int>( std::vector<int> & grid, std::vector<int> & block,
                            const int * imgr, int * imgo, 
                            int n0, int n1, int n2);

template void cuda_kernel_convolution_2d<int>( std::vector<int> & grid, std::vector<int> & block,
                                 const int * imgr, const int * kern, //kernel width
                                 int * imgo, int n0, int n1, int kw0, int kw1);

template void cuda_kernel_convolution_3d<int>( std::vector<int> & grid, std::vector<int> & block,
                                 const int * imgr, const int * kern, //kernel width
                                 int * imgo, int n0, int n1, int n2, int kw0, int kw1, int kw2);





template void cuda_kernel_assign<unsigned short>( std::vector<int> & grid, std::vector<int> & block,
                                         unsigned short * vin, unsigned short value, int n );

template void cuda_kernel_copy<unsigned short>( std::vector<int> & grid, std::vector<int> & block,
                                       const unsigned short * vin, unsigned short * vout, int n );


template void cuda_kernel_assign<unsigned int>( std::vector<int> & grid, std::vector<int> & block,
                                         unsigned int * vin, unsigned int value, int n );

template void cuda_kernel_copy<unsigned int>( std::vector<int> & grid, std::vector<int> & block,
                                       const unsigned int * vin, unsigned int * vout, int n );


template void cuda_kernel_assign<unsigned char>( std::vector<int> & grid, std::vector<int> & block,
                                         unsigned char * vin, unsigned char value, int n );

template void cuda_kernel_copy<unsigned char>( std::vector<int> & grid, std::vector<int> & block,
                                       const unsigned char * vin, unsigned char * vout, int n );


template void cuda_kernel_assign<short>( std::vector<int> & grid, std::vector<int> & block,
                                         short * vin, short value, int n );

template void cuda_kernel_copy<short>( std::vector<int> & grid, std::vector<int> & block,
                                       const short * vin, short * vout, int n );


template void cuda_kernel_assign<char>( std::vector<int> & grid, std::vector<int> & block,
                                         char * vin, char value, int n );

template void cuda_kernel_copy<char>( std::vector<int> & grid, std::vector<int> & block,
                                       const char * vin, char * vout, int n );

	.text
	.file	"kernels.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # -- Begin function _Z25imart_assert_kernel_error10hipError_tPKciS1_b
	.type	_Z25imart_assert_kernel_error10hipError_tPKciS1_b,@function
_Z25imart_assert_kernel_error10hipError_tPKciS1_b: # @_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	testl	%edi, %edi
	jne	.LBB0_1
.LBB0_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_1:
	.cfi_def_cfa_offset 64
	movl	%r8d, %ebp
	movq	%rcx, %r15
	movl	%edx, %r12d
	movq	%rsi, %r14
	movl	%edi, %ebx
	movq	stderr(%rip), %r13
	callq	hipGetErrorString
	movl	%r12d, (%rsp)
	movl	$.L.str, %esi
	movq	%r13, %rdi
	movq	%r15, %rdx
	movl	%ebx, %ecx
	movq	%rax, %r8
	movq	%r14, %r9
	xorl	%eax, %eax
	callq	fprintf
	testb	%bpl, %bpl
	je	.LBB0_2
# %bb.3:
	movl	%ebx, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z25imart_assert_kernel_error10hipError_tPKciS1_b, .Lfunc_end0-_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	.cfi_endproc
                                        # -- End function
	.globl	_Z18cuda_kernel_fft_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib # -- Begin function _Z18cuda_kernel_fft_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib
	.type	_Z18cuda_kernel_fft_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib,@function
_Z18cuda_kernel_fft_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib: # @_Z18cuda_kernel_fft_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movq	%r8, 16(%rsp)                   # 8-byte Spill
	movq	%rcx, %rbp
	movq	%rdx, %r14
	movl	120(%rsp), %eax
	imull	112(%rsp), %eax
	movslq	%eax, %r12
	leaq	(,%r12,8), %rbx
	leaq	48(%rsp), %r13
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r13), %rbx
	movl	$3, %r15d
	movl	%r15d, (%rsp)
	movl	$8, %esi
	movl	$4, %ecx
	movl	$4, %r8d
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %ecx
	movl	%eax, %edi
	movl	$1801, %edx                     # imm = 0x709
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	addq	$4, %rbx
	movl	%r15d, (%rsp)
	movl	$8, %esi
	movl	$4, %ecx
	movl	$4, %r8d
	movq	%rbx, %rdi
	movq	%rbp, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.3, %ecx
	movl	%eax, %edi
	movl	$1804, %edx                     # imm = 0x70C
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	leaq	40(%rsp), %rbp
	movq	%rbp, %rdi
	movl	120(%rsp), %esi
	movl	112(%rsp), %edx
	movl	$41, %ecx
	callq	hipfftPlan2d
	movq	(%rbp), %rdi
	movq	(%r13), %rsi
	leaq	32(%rsp), %r14
	movq	(%r14), %rdx
	movzbl	128(%rsp), %ecx
	negl	%ecx
	orl	$1, %ecx
	callq	hipfftExecC2C
	movq	(%r14), %rbx
	movl	%r15d, (%rsp)
	movl	$4, %esi
	movl	$8, %ecx
	movl	$4, %r8d
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.4, %ecx
	movl	%eax, %edi
	movl	$1830, %edx                     # imm = 0x726
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	addq	$4, %rbx
	movl	%r15d, (%rsp)
	movl	$4, %esi
	movl	$8, %ecx
	movl	$4, %r8d
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.4, %ecx
	movl	%eax, %edi
	movl	$1834, %edx                     # imm = 0x72A
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	movq	(%rbp), %rdi
	callq	hipfftDestroy
	movq	(%r13), %rdi
	callq	hipFree
	movq	(%r14), %rdi
	callq	hipFree
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z18cuda_kernel_fft_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib, .Lfunc_end1-_Z18cuda_kernel_fft_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib
	.cfi_endproc
                                        # -- End function
	.globl	_Z18cuda_kernel_fft_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib # -- Begin function _Z18cuda_kernel_fft_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib
	.type	_Z18cuda_kernel_fft_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib,@function
_Z18cuda_kernel_fft_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib: # @_Z18cuda_kernel_fft_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movq	%r8, 16(%rsp)                   # 8-byte Spill
	movq	%rcx, %rbp
	movq	%rdx, %r15
	movl	120(%rsp), %eax
	imull	112(%rsp), %eax
	movslq	%eax, %r12
	movq	%r12, %rbx
	shlq	$4, %rbx
	leaq	48(%rsp), %r13
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r13), %rbx
	movl	$3, %r14d
	movl	%r14d, (%rsp)
	movl	$16, %esi
	movl	$8, %ecx
	movl	$8, %r8d
	movq	%rbx, %rdi
	movq	%r15, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %ecx
	movl	%eax, %edi
	movl	$1861, %edx                     # imm = 0x745
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	addq	$8, %rbx
	movl	%r14d, (%rsp)
	movl	$16, %esi
	movl	$8, %ecx
	movl	$8, %r8d
	movq	%rbx, %rdi
	movq	%rbp, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.3, %ecx
	movl	%eax, %edi
	movl	$1864, %edx                     # imm = 0x748
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	leaq	40(%rsp), %rbp
	movq	%rbp, %rdi
	movl	120(%rsp), %esi
	movl	112(%rsp), %edx
	movl	$41, %ecx
	callq	hipfftPlan2d
	movq	(%rbp), %rdi
	movq	(%r13), %rsi
	leaq	32(%rsp), %r15
	movq	(%r15), %rdx
	movzbl	128(%rsp), %ecx
	negl	%ecx
	orl	$1, %ecx
	callq	hipfftExecZ2Z
	movq	(%r15), %rbx
	movl	%r14d, (%rsp)
	movl	$8, %esi
	movl	$16, %ecx
	movl	$8, %r8d
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.4, %ecx
	movl	%eax, %edi
	movl	$1890, %edx                     # imm = 0x762
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	addq	$8, %rbx
	movl	%r14d, (%rsp)
	movl	$8, %esi
	movl	$16, %ecx
	movl	$8, %r8d
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.4, %ecx
	movl	%eax, %edi
	movl	$1894, %edx                     # imm = 0x766
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	movq	(%rbp), %rdi
	callq	hipfftDestroy
	movq	(%r13), %rdi
	callq	hipFree
	movq	(%r15), %rdi
	callq	hipFree
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z18cuda_kernel_fft_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib, .Lfunc_end2-_Z18cuda_kernel_fft_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iib
	.cfi_endproc
                                        # -- End function
	.globl	_Z18cuda_kernel_fft_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib # -- Begin function _Z18cuda_kernel_fft_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib
	.type	_Z18cuda_kernel_fft_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib,@function
_Z18cuda_kernel_fft_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib: # @_Z18cuda_kernel_fft_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movq	%r8, 16(%rsp)                   # 8-byte Spill
	movq	%rcx, %r15
	movq	%rdx, %r13
	movl	120(%rsp), %eax
	imull	112(%rsp), %eax
	imull	128(%rsp), %eax
	movslq	%eax, %r12
	leaq	(,%r12,8), %rbp
	leaq	32(%rsp), %rdi
	movq	%rdi, %rbx
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %r14
	movq	%r14, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%rbx), %rbp
	movl	$3, %ebx
	movl	%ebx, (%rsp)
	movl	$8, %esi
	movl	$4, %ecx
	movl	$4, %r8d
	movq	%rbp, %rdi
	movq	%r13, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %ecx
	movl	%eax, %edi
	movl	$1929, %edx                     # imm = 0x789
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	addq	$4, %rbp
	movl	%ebx, (%rsp)
	movl	$8, %esi
	movl	$4, %ecx
	movl	$4, %r8d
	movq	%rbp, %rdi
	movq	%r15, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.3, %ecx
	movl	%eax, %edi
	movl	$1932, %edx                     # imm = 0x78C
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	leaq	40(%rsp), %r15
	movq	%r15, %rdi
	movl	128(%rsp), %esi
	movl	120(%rsp), %edx
	movl	112(%rsp), %ecx
	movl	$41, %r8d
	callq	hipfftPlan3d
	movq	(%r15), %rdi
	leaq	32(%rsp), %r13
	movq	(%r13), %rsi
	movq	(%r14), %rdx
	movzbl	136(%rsp), %ecx
	negl	%ecx
	orl	$1, %ecx
	callq	hipfftExecC2C
	movq	(%r14), %rbp
	movl	%ebx, (%rsp)
	movl	$4, %esi
	movl	$8, %ecx
	movl	$4, %r8d
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%rbp, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.4, %ecx
	movl	%eax, %edi
	movl	$1958, %edx                     # imm = 0x7A6
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	addq	$4, %rbp
	movl	%ebx, (%rsp)
	movl	$4, %esi
	movl	$8, %ecx
	movl	$4, %r8d
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	%rbp, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.4, %ecx
	movl	%eax, %edi
	movl	$1962, %edx                     # imm = 0x7AA
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	movq	(%r15), %rdi
	callq	hipfftDestroy
	movq	(%r13), %rdi
	callq	hipFree
	movq	(%r14), %rdi
	callq	hipFree
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z18cuda_kernel_fft_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib, .Lfunc_end3-_Z18cuda_kernel_fft_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib
	.cfi_endproc
                                        # -- End function
	.globl	_Z18cuda_kernel_fft_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib # -- Begin function _Z18cuda_kernel_fft_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib
	.type	_Z18cuda_kernel_fft_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib,@function
_Z18cuda_kernel_fft_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib: # @_Z18cuda_kernel_fft_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movq	%r8, 16(%rsp)                   # 8-byte Spill
	movq	%rcx, %r15
	movq	%rdx, %r13
	movl	120(%rsp), %eax
	imull	112(%rsp), %eax
	imull	128(%rsp), %eax
	movslq	%eax, %r12
	movq	%r12, %rbp
	shlq	$4, %rbp
	leaq	32(%rsp), %rdi
	movq	%rdi, %rbx
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %r14
	movq	%r14, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%rbx), %rbp
	movl	$3, %ebx
	movl	%ebx, (%rsp)
	movl	$16, %esi
	movl	$8, %ecx
	movl	$8, %r8d
	movq	%rbp, %rdi
	movq	%r13, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %ecx
	movl	%eax, %edi
	movl	$1989, %edx                     # imm = 0x7C5
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	addq	$8, %rbp
	movl	%ebx, (%rsp)
	movl	$16, %esi
	movl	$8, %ecx
	movl	$8, %r8d
	movq	%rbp, %rdi
	movq	%r15, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.3, %ecx
	movl	%eax, %edi
	movl	$1992, %edx                     # imm = 0x7C8
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	leaq	40(%rsp), %r15
	movq	%r15, %rdi
	movl	128(%rsp), %esi
	movl	120(%rsp), %edx
	movl	112(%rsp), %ecx
	movl	$41, %r8d
	callq	hipfftPlan3d
	movq	(%r15), %rdi
	leaq	32(%rsp), %rbp
	movq	(%rbp), %rsi
	movq	(%r14), %rdx
	movzbl	136(%rsp), %ecx
	negl	%ecx
	orl	$1, %ecx
	callq	hipfftExecZ2Z
	movq	(%r14), %r13
	movl	%ebx, (%rsp)
	movl	$8, %esi
	movl	$16, %ecx
	movl	$8, %r8d
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%r13, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.4, %ecx
	movl	%eax, %edi
	movl	$2018, %edx                     # imm = 0x7E2
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	addq	$8, %r13
	movl	%ebx, (%rsp)
	movl	$8, %esi
	movl	$16, %ecx
	movl	$8, %r8d
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	%r13, %rdx
	movq	%r12, %r9
	callq	hipMemcpy2D
	movl	$.L.str.1, %esi
	movl	$.L.str.4, %ecx
	movl	%eax, %edi
	movl	$2022, %edx                     # imm = 0x7E6
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	movq	(%r15), %rdi
	callq	hipfftDestroy
	movq	(%rbp), %rdi
	callq	hipFree
	movq	(%r14), %rdi
	callq	hipFree
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z18cuda_kernel_fft_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib, .Lfunc_end4-_Z18cuda_kernel_fft_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_iiib
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIfdEvPKT_PT0_i
.LBB5_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end5:
	.size	_Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end5-_Z16cuda_kernel_castIfdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIfdEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIfdEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIfdEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIfdEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIfdEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIfdEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIfdEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIfdEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z26__device_stub__kernel_castIfdEvPKT_PT0_i, .Lfunc_end6-_Z26__device_stub__kernel_castIfdEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIdfEvPKT_PT0_i
.LBB7_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end7:
	.size	_Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end7-_Z16cuda_kernel_castIdfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIdfEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIdfEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIdfEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIdfEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIdfEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIdfEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIdfEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIdfEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z26__device_stub__kernel_castIdfEvPKT_PT0_i, .Lfunc_end8-_Z26__device_stub__kernel_castIdfEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIifEvPKT_PT0_i
.LBB9_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end9:
	.size	_Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end9-_Z16cuda_kernel_castIifEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIifEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIifEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIifEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIifEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIifEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIifEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIifEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIifEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z26__device_stub__kernel_castIifEvPKT_PT0_i, .Lfunc_end10-_Z26__device_stub__kernel_castIifEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB11_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIfiEvPKT_PT0_i
.LBB11_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end11:
	.size	_Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end11-_Z16cuda_kernel_castIfiEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIfiEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIfiEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIfiEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIfiEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIfiEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIfiEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIfiEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIfiEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z26__device_stub__kernel_castIfiEvPKT_PT0_i, .Lfunc_end12-_Z26__device_stub__kernel_castIfiEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIidEvPKT_PT0_i
.LBB13_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end13:
	.size	_Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end13-_Z16cuda_kernel_castIidEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIidEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIidEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIidEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIidEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIidEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIidEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIidEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIidEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	_Z26__device_stub__kernel_castIidEvPKT_PT0_i, .Lfunc_end14-_Z26__device_stub__kernel_castIidEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB15_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIdiEvPKT_PT0_i
.LBB15_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end15:
	.size	_Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end15-_Z16cuda_kernel_castIdiEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIdiEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIdiEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIdiEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIdiEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIdiEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIdiEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIdiEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIdiEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end16:
	.size	_Z26__device_stub__kernel_castIdiEvPKT_PT0_i, .Lfunc_end16-_Z26__device_stub__kernel_castIdiEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB17_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIftEvPKT_PT0_i
.LBB17_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end17:
	.size	_Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end17-_Z16cuda_kernel_castIftEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIftEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIftEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIftEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIftEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIftEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIftEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIftEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIftEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end18:
	.size	_Z26__device_stub__kernel_castIftEvPKT_PT0_i, .Lfunc_end18-_Z26__device_stub__kernel_castIftEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB19_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castItfEvPKT_PT0_i
.LBB19_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end19:
	.size	_Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end19-_Z16cuda_kernel_castItfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castItfEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castItfEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castItfEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castItfEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castItfEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castItfEvPKT_PT0_i: # @_Z26__device_stub__kernel_castItfEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castItfEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end20:
	.size	_Z26__device_stub__kernel_castItfEvPKT_PT0_i, .Lfunc_end20-_Z26__device_stub__kernel_castItfEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB21_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIdtEvPKT_PT0_i
.LBB21_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end21:
	.size	_Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end21-_Z16cuda_kernel_castIdtEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIdtEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIdtEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIdtEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIdtEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIdtEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIdtEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIdtEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIdtEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end22:
	.size	_Z26__device_stub__kernel_castIdtEvPKT_PT0_i, .Lfunc_end22-_Z26__device_stub__kernel_castIdtEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB23_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castItdEvPKT_PT0_i
.LBB23_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end23:
	.size	_Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end23-_Z16cuda_kernel_castItdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castItdEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castItdEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castItdEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castItdEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castItdEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castItdEvPKT_PT0_i: # @_Z26__device_stub__kernel_castItdEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castItdEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end24:
	.size	_Z26__device_stub__kernel_castItdEvPKT_PT0_i, .Lfunc_end24-_Z26__device_stub__kernel_castItdEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB25_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIfjEvPKT_PT0_i
.LBB25_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end25:
	.size	_Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end25-_Z16cuda_kernel_castIfjEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIfjEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIfjEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIfjEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIfjEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIfjEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIfjEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIfjEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIfjEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end26:
	.size	_Z26__device_stub__kernel_castIfjEvPKT_PT0_i, .Lfunc_end26-_Z26__device_stub__kernel_castIfjEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB27_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIjfEvPKT_PT0_i
.LBB27_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end27:
	.size	_Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end27-_Z16cuda_kernel_castIjfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIjfEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIjfEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIjfEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIjfEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIjfEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIjfEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIjfEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIjfEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end28:
	.size	_Z26__device_stub__kernel_castIjfEvPKT_PT0_i, .Lfunc_end28-_Z26__device_stub__kernel_castIjfEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB29_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIdjEvPKT_PT0_i
.LBB29_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end29:
	.size	_Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end29-_Z16cuda_kernel_castIdjEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIdjEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIdjEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIdjEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIdjEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIdjEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIdjEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIdjEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIdjEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end30:
	.size	_Z26__device_stub__kernel_castIdjEvPKT_PT0_i, .Lfunc_end30-_Z26__device_stub__kernel_castIdjEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB31_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIjdEvPKT_PT0_i
.LBB31_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end31:
	.size	_Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end31-_Z16cuda_kernel_castIjdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIjdEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIjdEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIjdEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIjdEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIjdEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIjdEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIjdEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIjdEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end32:
	.size	_Z26__device_stub__kernel_castIjdEvPKT_PT0_i, .Lfunc_end32-_Z26__device_stub__kernel_castIjdEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB33_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIfhEvPKT_PT0_i
.LBB33_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end33:
	.size	_Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end33-_Z16cuda_kernel_castIfhEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIfhEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIfhEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIfhEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIfhEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIfhEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIfhEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIfhEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIfhEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end34:
	.size	_Z26__device_stub__kernel_castIfhEvPKT_PT0_i, .Lfunc_end34-_Z26__device_stub__kernel_castIfhEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB35_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIhfEvPKT_PT0_i
.LBB35_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end35:
	.size	_Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end35-_Z16cuda_kernel_castIhfEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIhfEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIhfEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIhfEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIhfEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIhfEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIhfEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIhfEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIhfEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end36:
	.size	_Z26__device_stub__kernel_castIhfEvPKT_PT0_i, .Lfunc_end36-_Z26__device_stub__kernel_castIhfEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB37_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIdhEvPKT_PT0_i
.LBB37_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end37:
	.size	_Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end37-_Z16cuda_kernel_castIdhEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIdhEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIdhEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIdhEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIdhEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIdhEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIdhEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIdhEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIdhEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end38:
	.size	_Z26__device_stub__kernel_castIdhEvPKT_PT0_i, .Lfunc_end38-_Z26__device_stub__kernel_castIdhEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB39_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIhdEvPKT_PT0_i
.LBB39_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end39:
	.size	_Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end39-_Z16cuda_kernel_castIhdEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIhdEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIhdEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIhdEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIhdEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIhdEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIhdEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIhdEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIhdEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end40:
	.size	_Z26__device_stub__kernel_castIhdEvPKT_PT0_i, .Lfunc_end40-_Z26__device_stub__kernel_castIhdEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB41_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIffEvPKT_PT0_i
.LBB41_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end41:
	.size	_Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end41-_Z16cuda_kernel_castIffEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIffEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIffEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIffEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIffEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIffEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIffEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIffEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIffEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end42:
	.size	_Z26__device_stub__kernel_castIffEvPKT_PT0_i, .Lfunc_end42-_Z26__device_stub__kernel_castIffEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i,"axG",@progbits,_Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i,comdat
	.weak	_Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i # -- Begin function _Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.type	_Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i,@function
_Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i: # @_Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB43_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_castIddEvPKT_PT0_i
.LBB43_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.5, %ecx
	movl	%eax, %edi
	movl	$1124, %edx                     # imm = 0x464
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.6, %ecx
	movl	%eax, %edi
	movl	$1125, %edx                     # imm = 0x465
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end43:
	.size	_Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i, .Lfunc_end43-_Z16cuda_kernel_castIddEvRSt6vectorIiSaIiEES3_PKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_castIddEvPKT_PT0_i,"axG",@progbits,_Z26__device_stub__kernel_castIddEvPKT_PT0_i,comdat
	.weak	_Z26__device_stub__kernel_castIddEvPKT_PT0_i # -- Begin function _Z26__device_stub__kernel_castIddEvPKT_PT0_i
	.type	_Z26__device_stub__kernel_castIddEvPKT_PT0_i,@function
_Z26__device_stub__kernel_castIddEvPKT_PT0_i: # @_Z26__device_stub__kernel_castIddEvPKT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_castIddEvPKT_PT0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end44:
	.size	_Z26__device_stub__kernel_castIddEvPKT_PT0_i, .Lfunc_end44-_Z26__device_stub__kernel_castIddEvPKT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i # -- Begin function _Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i,@function
_Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i: # @_Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%ecx, %ebx
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movq	%rdx, %r14
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB45_2
# %bb.1:
	movq	%r14, %rdi
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %esi
	callq	_Z28__device_stub__kernel_assignIfEvPT_S0_i
.LBB45_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.7, %ecx
	movl	%eax, %edi
	movl	$1101, %edx                     # imm = 0x44D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.8, %ecx
	movl	%eax, %edi
	movl	$1102, %edx                     # imm = 0x44E
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end45:
	.size	_Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i, .Lfunc_end45-_Z18cuda_kernel_assignIfEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__kernel_assignIfEvPT_S0_i,"axG",@progbits,_Z28__device_stub__kernel_assignIfEvPT_S0_i,comdat
	.weak	_Z28__device_stub__kernel_assignIfEvPT_S0_i # -- Begin function _Z28__device_stub__kernel_assignIfEvPT_S0_i
	.type	_Z28__device_stub__kernel_assignIfEvPT_S0_i,@function
_Z28__device_stub__kernel_assignIfEvPT_S0_i: # @_Z28__device_stub__kernel_assignIfEvPT_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movss	%xmm0, (%rcx)
	movq	%rsp, %rdx
	movl	%esi, (%rdx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13kernel_assignIfEvPT_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end46:
	.size	_Z28__device_stub__kernel_assignIfEvPT_S0_i, .Lfunc_end46-_Z28__device_stub__kernel_assignIfEvPT_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB47_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_copyIfEvPKT_PS0_i
.LBB47_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.9, %ecx
	movl	%eax, %edi
	movl	$1113, %edx                     # imm = 0x459
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.10, %ecx
	movl	%eax, %edi
	movl	$1114, %edx                     # imm = 0x45A
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end47:
	.size	_Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end47-_Z16cuda_kernel_copyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_copyIfEvPKT_PS0_i,"axG",@progbits,_Z26__device_stub__kernel_copyIfEvPKT_PS0_i,comdat
	.weak	_Z26__device_stub__kernel_copyIfEvPKT_PS0_i # -- Begin function _Z26__device_stub__kernel_copyIfEvPKT_PS0_i
	.type	_Z26__device_stub__kernel_copyIfEvPKT_PS0_i,@function
_Z26__device_stub__kernel_copyIfEvPKT_PS0_i: # @_Z26__device_stub__kernel_copyIfEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_copyIfEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end48:
	.size	_Z26__device_stub__kernel_copyIfEvPKT_PS0_i, .Lfunc_end48-_Z26__device_stub__kernel_copyIfEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB49_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__kernel_addIfEvPKT_S2_PS0_i
.LBB49_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.11, %ecx
	movl	%eax, %edi
	movl	$1226, %edx                     # imm = 0x4CA
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.12, %ecx
	movl	%eax, %edi
	movl	$1227, %edx                     # imm = 0x4CB
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end49:
	.size	_Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end49-_Z15cuda_kernel_addIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_addIfEvPKT_S2_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_addIfEvPKT_S2_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_addIfEvPKT_S2_PS0_i # -- Begin function _Z25__device_stub__kernel_addIfEvPKT_S2_PS0_i
	.type	_Z25__device_stub__kernel_addIfEvPKT_S2_PS0_i,@function
_Z25__device_stub__kernel_addIfEvPKT_S2_PS0_i: # @_Z25__device_stub__kernel_addIfEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_addIfEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end50:
	.size	_Z25__device_stub__kernel_addIfEvPKT_S2_PS0_i, .Lfunc_end50-_Z25__device_stub__kernel_addIfEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB51_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__kernel_subIfEvPKT_S2_PS0_i
.LBB51_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.13, %ecx
	movl	%eax, %edi
	movl	$1237, %edx                     # imm = 0x4D5
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.14, %ecx
	movl	%eax, %edi
	movl	$1238, %edx                     # imm = 0x4D6
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end51:
	.size	_Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end51-_Z15cuda_kernel_subIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_subIfEvPKT_S2_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_subIfEvPKT_S2_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_subIfEvPKT_S2_PS0_i # -- Begin function _Z25__device_stub__kernel_subIfEvPKT_S2_PS0_i
	.type	_Z25__device_stub__kernel_subIfEvPKT_S2_PS0_i,@function
_Z25__device_stub__kernel_subIfEvPKT_S2_PS0_i: # @_Z25__device_stub__kernel_subIfEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_subIfEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end52:
	.size	_Z25__device_stub__kernel_subIfEvPKT_S2_PS0_i, .Lfunc_end52-_Z25__device_stub__kernel_subIfEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB53_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__kernel_mulIfEvPKT_S2_PS0_i
.LBB53_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.15, %ecx
	movl	%eax, %edi
	movl	$1248, %edx                     # imm = 0x4E0
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.16, %ecx
	movl	%eax, %edi
	movl	$1249, %edx                     # imm = 0x4E1
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end53:
	.size	_Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end53-_Z15cuda_kernel_mulIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_mulIfEvPKT_S2_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_mulIfEvPKT_S2_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_mulIfEvPKT_S2_PS0_i # -- Begin function _Z25__device_stub__kernel_mulIfEvPKT_S2_PS0_i
	.type	_Z25__device_stub__kernel_mulIfEvPKT_S2_PS0_i,@function
_Z25__device_stub__kernel_mulIfEvPKT_S2_PS0_i: # @_Z25__device_stub__kernel_mulIfEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_mulIfEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end54:
	.size	_Z25__device_stub__kernel_mulIfEvPKT_S2_PS0_i, .Lfunc_end54-_Z25__device_stub__kernel_mulIfEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB55_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__kernel_divIfEvPKT_S2_PS0_i
.LBB55_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.17, %ecx
	movl	%eax, %edi
	movl	$1259, %edx                     # imm = 0x4EB
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.18, %ecx
	movl	%eax, %edi
	movl	$1260, %edx                     # imm = 0x4EC
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end55:
	.size	_Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end55-_Z15cuda_kernel_divIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_divIfEvPKT_S2_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_divIfEvPKT_S2_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_divIfEvPKT_S2_PS0_i # -- Begin function _Z25__device_stub__kernel_divIfEvPKT_S2_PS0_i
	.type	_Z25__device_stub__kernel_divIfEvPKT_S2_PS0_i,@function
_Z25__device_stub__kernel_divIfEvPKT_S2_PS0_i: # @_Z25__device_stub__kernel_divIfEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_divIfEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end56:
	.size	_Z25__device_stub__kernel_divIfEvPKT_S2_PS0_i, .Lfunc_end56-_Z25__device_stub__kernel_divIfEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB57_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__kernel_powIfEvPKT_S2_PS0_i
.LBB57_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.19, %ecx
	movl	%eax, %edi
	movl	$1270, %edx                     # imm = 0x4F6
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.20, %ecx
	movl	%eax, %edi
	movl	$1271, %edx                     # imm = 0x4F7
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end57:
	.size	_Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end57-_Z15cuda_kernel_powIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_powIfEvPKT_S2_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_powIfEvPKT_S2_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_powIfEvPKT_S2_PS0_i # -- Begin function _Z25__device_stub__kernel_powIfEvPKT_S2_PS0_i
	.type	_Z25__device_stub__kernel_powIfEvPKT_S2_PS0_i,@function
_Z25__device_stub__kernel_powIfEvPKT_S2_PS0_i: # @_Z25__device_stub__kernel_powIfEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_powIfEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end58:
	.size	_Z25__device_stub__kernel_powIfEvPKT_S2_PS0_i, .Lfunc_end58-_Z25__device_stub__kernel_powIfEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB59_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %edx
	callq	_Z32__device_stub__kernel_add_scalarIfEvPKT_PS0_S0_i
.LBB59_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.21, %ecx
	movl	%eax, %edi
	movl	$1138, %edx                     # imm = 0x472
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.22, %ecx
	movl	%eax, %edi
	movl	$1139, %edx                     # imm = 0x473
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end59:
	.size	_Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end59-_Z22cuda_kernel_add_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_add_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z32__device_stub__kernel_add_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z32__device_stub__kernel_add_scalarIfEvPKT_PS0_S0_i # -- Begin function _Z32__device_stub__kernel_add_scalarIfEvPKT_PS0_S0_i
	.type	_Z32__device_stub__kernel_add_scalarIfEvPKT_PS0_S0_i,@function
_Z32__device_stub__kernel_add_scalarIfEvPKT_PS0_S0_i: # @_Z32__device_stub__kernel_add_scalarIfEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	8(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_add_scalarIfEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end60:
	.size	_Z32__device_stub__kernel_add_scalarIfEvPKT_PS0_S0_i, .Lfunc_end60-_Z32__device_stub__kernel_add_scalarIfEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB61_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %edx
	callq	_Z32__device_stub__kernel_sub_scalarIfEvPKT_PS0_S0_i
.LBB61_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.23, %ecx
	movl	%eax, %edi
	movl	$1149, %edx                     # imm = 0x47D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.24, %ecx
	movl	%eax, %edi
	movl	$1150, %edx                     # imm = 0x47E
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end61:
	.size	_Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end61-_Z22cuda_kernel_sub_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_sub_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z32__device_stub__kernel_sub_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z32__device_stub__kernel_sub_scalarIfEvPKT_PS0_S0_i # -- Begin function _Z32__device_stub__kernel_sub_scalarIfEvPKT_PS0_S0_i
	.type	_Z32__device_stub__kernel_sub_scalarIfEvPKT_PS0_S0_i,@function
_Z32__device_stub__kernel_sub_scalarIfEvPKT_PS0_S0_i: # @_Z32__device_stub__kernel_sub_scalarIfEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	8(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end62:
	.size	_Z32__device_stub__kernel_sub_scalarIfEvPKT_PS0_S0_i, .Lfunc_end62-_Z32__device_stub__kernel_sub_scalarIfEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB63_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %edx
	callq	_Z36__device_stub__kernel_sub_scalar_invIfEvPKT_PS0_S0_i
.LBB63_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.25, %ecx
	movl	%eax, %edi
	movl	$1160, %edx                     # imm = 0x488
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.26, %ecx
	movl	%eax, %edi
	movl	$1161, %edx                     # imm = 0x489
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end63:
	.size	_Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end63-_Z26cuda_kernel_sub_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_sub_scalar_invIfEvPKT_PS0_S0_i,"axG",@progbits,_Z36__device_stub__kernel_sub_scalar_invIfEvPKT_PS0_S0_i,comdat
	.weak	_Z36__device_stub__kernel_sub_scalar_invIfEvPKT_PS0_S0_i # -- Begin function _Z36__device_stub__kernel_sub_scalar_invIfEvPKT_PS0_S0_i
	.type	_Z36__device_stub__kernel_sub_scalar_invIfEvPKT_PS0_S0_i,@function
_Z36__device_stub__kernel_sub_scalar_invIfEvPKT_PS0_S0_i: # @_Z36__device_stub__kernel_sub_scalar_invIfEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	8(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end64:
	.size	_Z36__device_stub__kernel_sub_scalar_invIfEvPKT_PS0_S0_i, .Lfunc_end64-_Z36__device_stub__kernel_sub_scalar_invIfEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB65_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %edx
	callq	_Z32__device_stub__kernel_mul_scalarIfEvPKT_PS0_S0_i
.LBB65_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.27, %ecx
	movl	%eax, %edi
	movl	$1171, %edx                     # imm = 0x493
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.28, %ecx
	movl	%eax, %edi
	movl	$1172, %edx                     # imm = 0x494
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end65:
	.size	_Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end65-_Z22cuda_kernel_mul_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_mul_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z32__device_stub__kernel_mul_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z32__device_stub__kernel_mul_scalarIfEvPKT_PS0_S0_i # -- Begin function _Z32__device_stub__kernel_mul_scalarIfEvPKT_PS0_S0_i
	.type	_Z32__device_stub__kernel_mul_scalarIfEvPKT_PS0_S0_i,@function
_Z32__device_stub__kernel_mul_scalarIfEvPKT_PS0_S0_i: # @_Z32__device_stub__kernel_mul_scalarIfEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	8(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end66:
	.size	_Z32__device_stub__kernel_mul_scalarIfEvPKT_PS0_S0_i, .Lfunc_end66-_Z32__device_stub__kernel_mul_scalarIfEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB67_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %edx
	callq	_Z32__device_stub__kernel_div_scalarIfEvPKT_PS0_S0_i
.LBB67_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.29, %ecx
	movl	%eax, %edi
	movl	$1182, %edx                     # imm = 0x49E
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.30, %ecx
	movl	%eax, %edi
	movl	$1183, %edx                     # imm = 0x49F
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end67:
	.size	_Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end67-_Z22cuda_kernel_div_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_div_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z32__device_stub__kernel_div_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z32__device_stub__kernel_div_scalarIfEvPKT_PS0_S0_i # -- Begin function _Z32__device_stub__kernel_div_scalarIfEvPKT_PS0_S0_i
	.type	_Z32__device_stub__kernel_div_scalarIfEvPKT_PS0_S0_i,@function
_Z32__device_stub__kernel_div_scalarIfEvPKT_PS0_S0_i: # @_Z32__device_stub__kernel_div_scalarIfEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	8(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_div_scalarIfEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end68:
	.size	_Z32__device_stub__kernel_div_scalarIfEvPKT_PS0_S0_i, .Lfunc_end68-_Z32__device_stub__kernel_div_scalarIfEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB69_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %edx
	callq	_Z36__device_stub__kernel_div_scalar_invIfEvPKT_PS0_S0_i
.LBB69_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.31, %ecx
	movl	%eax, %edi
	movl	$1193, %edx                     # imm = 0x4A9
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.32, %ecx
	movl	%eax, %edi
	movl	$1194, %edx                     # imm = 0x4AA
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end69:
	.size	_Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end69-_Z26cuda_kernel_div_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_div_scalar_invIfEvPKT_PS0_S0_i,"axG",@progbits,_Z36__device_stub__kernel_div_scalar_invIfEvPKT_PS0_S0_i,comdat
	.weak	_Z36__device_stub__kernel_div_scalar_invIfEvPKT_PS0_S0_i # -- Begin function _Z36__device_stub__kernel_div_scalar_invIfEvPKT_PS0_S0_i
	.type	_Z36__device_stub__kernel_div_scalar_invIfEvPKT_PS0_S0_i,@function
_Z36__device_stub__kernel_div_scalar_invIfEvPKT_PS0_S0_i: # @_Z36__device_stub__kernel_div_scalar_invIfEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	8(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end70:
	.size	_Z36__device_stub__kernel_div_scalar_invIfEvPKT_PS0_S0_i, .Lfunc_end70-_Z36__device_stub__kernel_div_scalar_invIfEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB71_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %edx
	callq	_Z32__device_stub__kernel_pow_scalarIfEvPKT_PS0_S0_i
.LBB71_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.33, %ecx
	movl	%eax, %edi
	movl	$1204, %edx                     # imm = 0x4B4
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.34, %ecx
	movl	%eax, %edi
	movl	$1205, %edx                     # imm = 0x4B5
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end71:
	.size	_Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end71-_Z22cuda_kernel_pow_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_pow_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z32__device_stub__kernel_pow_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z32__device_stub__kernel_pow_scalarIfEvPKT_PS0_S0_i # -- Begin function _Z32__device_stub__kernel_pow_scalarIfEvPKT_PS0_S0_i
	.type	_Z32__device_stub__kernel_pow_scalarIfEvPKT_PS0_S0_i,@function
_Z32__device_stub__kernel_pow_scalarIfEvPKT_PS0_S0_i: # @_Z32__device_stub__kernel_pow_scalarIfEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	8(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end72:
	.size	_Z32__device_stub__kernel_pow_scalarIfEvPKT_PS0_S0_i, .Lfunc_end72-_Z32__device_stub__kernel_pow_scalarIfEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB73_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %edx
	callq	_Z36__device_stub__kernel_pow_scalar_invIfEvPKT_PS0_S0_i
.LBB73_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.35, %ecx
	movl	%eax, %edi
	movl	$1215, %edx                     # imm = 0x4BF
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.36, %ecx
	movl	%eax, %edi
	movl	$1216, %edx                     # imm = 0x4C0
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end73:
	.size	_Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end73-_Z26cuda_kernel_pow_scalar_invIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_pow_scalar_invIfEvPKT_PS0_S0_i,"axG",@progbits,_Z36__device_stub__kernel_pow_scalar_invIfEvPKT_PS0_S0_i,comdat
	.weak	_Z36__device_stub__kernel_pow_scalar_invIfEvPKT_PS0_S0_i # -- Begin function _Z36__device_stub__kernel_pow_scalar_invIfEvPKT_PS0_S0_i
	.type	_Z36__device_stub__kernel_pow_scalar_invIfEvPKT_PS0_S0_i,@function
_Z36__device_stub__kernel_pow_scalar_invIfEvPKT_PS0_S0_i: # @_Z36__device_stub__kernel_pow_scalar_invIfEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	8(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end74:
	.size	_Z36__device_stub__kernel_pow_scalar_invIfEvPKT_PS0_S0_i, .Lfunc_end74-_Z36__device_stub__kernel_pow_scalar_invIfEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB75_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z27__device_stub__kernel_equalIfEvPKT_S2_PS0_i
.LBB75_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.37, %ecx
	movl	%eax, %edi
	movl	$1281, %edx                     # imm = 0x501
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.38, %ecx
	movl	%eax, %edi
	movl	$1282, %edx                     # imm = 0x502
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end75:
	.size	_Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end75-_Z17cuda_kernel_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z27__device_stub__kernel_equalIfEvPKT_S2_PS0_i,"axG",@progbits,_Z27__device_stub__kernel_equalIfEvPKT_S2_PS0_i,comdat
	.weak	_Z27__device_stub__kernel_equalIfEvPKT_S2_PS0_i # -- Begin function _Z27__device_stub__kernel_equalIfEvPKT_S2_PS0_i
	.type	_Z27__device_stub__kernel_equalIfEvPKT_S2_PS0_i,@function
_Z27__device_stub__kernel_equalIfEvPKT_S2_PS0_i: # @_Z27__device_stub__kernel_equalIfEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12kernel_equalIfEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end76:
	.size	_Z27__device_stub__kernel_equalIfEvPKT_S2_PS0_i, .Lfunc_end76-_Z27__device_stub__kernel_equalIfEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB77_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z29__device_stub__kernel_greaterIfEvPKT_S2_PS0_i
.LBB77_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.39, %ecx
	movl	%eax, %edi
	movl	$1292, %edx                     # imm = 0x50C
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.40, %ecx
	movl	%eax, %edi
	movl	$1293, %edx                     # imm = 0x50D
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end77:
	.size	_Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end77-_Z19cuda_kernel_greaterIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__kernel_greaterIfEvPKT_S2_PS0_i,"axG",@progbits,_Z29__device_stub__kernel_greaterIfEvPKT_S2_PS0_i,comdat
	.weak	_Z29__device_stub__kernel_greaterIfEvPKT_S2_PS0_i # -- Begin function _Z29__device_stub__kernel_greaterIfEvPKT_S2_PS0_i
	.type	_Z29__device_stub__kernel_greaterIfEvPKT_S2_PS0_i,@function
_Z29__device_stub__kernel_greaterIfEvPKT_S2_PS0_i: # @_Z29__device_stub__kernel_greaterIfEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14kernel_greaterIfEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end78:
	.size	_Z29__device_stub__kernel_greaterIfEvPKT_S2_PS0_i, .Lfunc_end78-_Z29__device_stub__kernel_greaterIfEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB79_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z26__device_stub__kernel_lessIfEvPKT_S2_PS0_i
.LBB79_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.39, %ecx
	movl	%eax, %edi
	movl	$1303, %edx                     # imm = 0x517
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.40, %ecx
	movl	%eax, %edi
	movl	$1304, %edx                     # imm = 0x518
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end79:
	.size	_Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end79-_Z16cuda_kernel_lessIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_lessIfEvPKT_S2_PS0_i,"axG",@progbits,_Z26__device_stub__kernel_lessIfEvPKT_S2_PS0_i,comdat
	.weak	_Z26__device_stub__kernel_lessIfEvPKT_S2_PS0_i # -- Begin function _Z26__device_stub__kernel_lessIfEvPKT_S2_PS0_i
	.type	_Z26__device_stub__kernel_lessIfEvPKT_S2_PS0_i,@function
_Z26__device_stub__kernel_lessIfEvPKT_S2_PS0_i: # @_Z26__device_stub__kernel_lessIfEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_lessIfEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end80:
	.size	_Z26__device_stub__kernel_lessIfEvPKT_S2_PS0_i, .Lfunc_end80-_Z26__device_stub__kernel_lessIfEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB81_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z35__device_stub__kernel_greater_equalIfEvPKT_S2_PS0_i
.LBB81_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.41, %ecx
	movl	%eax, %edi
	movl	$1314, %edx                     # imm = 0x522
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.42, %ecx
	movl	%eax, %edi
	movl	$1315, %edx                     # imm = 0x523
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end81:
	.size	_Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end81-_Z25cuda_kernel_greater_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35__device_stub__kernel_greater_equalIfEvPKT_S2_PS0_i,"axG",@progbits,_Z35__device_stub__kernel_greater_equalIfEvPKT_S2_PS0_i,comdat
	.weak	_Z35__device_stub__kernel_greater_equalIfEvPKT_S2_PS0_i # -- Begin function _Z35__device_stub__kernel_greater_equalIfEvPKT_S2_PS0_i
	.type	_Z35__device_stub__kernel_greater_equalIfEvPKT_S2_PS0_i,@function
_Z35__device_stub__kernel_greater_equalIfEvPKT_S2_PS0_i: # @_Z35__device_stub__kernel_greater_equalIfEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20kernel_greater_equalIfEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end82:
	.size	_Z35__device_stub__kernel_greater_equalIfEvPKT_S2_PS0_i, .Lfunc_end82-_Z35__device_stub__kernel_greater_equalIfEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB83_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z32__device_stub__kernel_less_equalIfEvPKT_S2_PS0_i
.LBB83_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.43, %ecx
	movl	%eax, %edi
	movl	$1325, %edx                     # imm = 0x52D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.44, %ecx
	movl	%eax, %edi
	movl	$1326, %edx                     # imm = 0x52E
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end83:
	.size	_Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end83-_Z22cuda_kernel_less_equalIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_less_equalIfEvPKT_S2_PS0_i,"axG",@progbits,_Z32__device_stub__kernel_less_equalIfEvPKT_S2_PS0_i,comdat
	.weak	_Z32__device_stub__kernel_less_equalIfEvPKT_S2_PS0_i # -- Begin function _Z32__device_stub__kernel_less_equalIfEvPKT_S2_PS0_i
	.type	_Z32__device_stub__kernel_less_equalIfEvPKT_S2_PS0_i,@function
_Z32__device_stub__kernel_less_equalIfEvPKT_S2_PS0_i: # @_Z32__device_stub__kernel_less_equalIfEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_less_equalIfEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end84:
	.size	_Z32__device_stub__kernel_less_equalIfEvPKT_S2_PS0_i, .Lfunc_end84-_Z32__device_stub__kernel_less_equalIfEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB85_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %edx
	callq	_Z34__device_stub__kernel_equal_scalarIfEvPKT_PS0_S0_i
.LBB85_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.45, %ecx
	movl	%eax, %edi
	movl	$1336, %edx                     # imm = 0x538
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.46, %ecx
	movl	%eax, %edi
	movl	$1337, %edx                     # imm = 0x539
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end85:
	.size	_Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end85-_Z24cuda_kernel_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z34__device_stub__kernel_equal_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z34__device_stub__kernel_equal_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z34__device_stub__kernel_equal_scalarIfEvPKT_PS0_S0_i # -- Begin function _Z34__device_stub__kernel_equal_scalarIfEvPKT_PS0_S0_i
	.type	_Z34__device_stub__kernel_equal_scalarIfEvPKT_PS0_S0_i,@function
_Z34__device_stub__kernel_equal_scalarIfEvPKT_PS0_S0_i: # @_Z34__device_stub__kernel_equal_scalarIfEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	8(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end86:
	.size	_Z34__device_stub__kernel_equal_scalarIfEvPKT_PS0_S0_i, .Lfunc_end86-_Z34__device_stub__kernel_equal_scalarIfEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB87_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %edx
	callq	_Z36__device_stub__kernel_greater_scalarIfEvPKT_PS0_S0_i
.LBB87_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.47, %ecx
	movl	%eax, %edi
	movl	$1347, %edx                     # imm = 0x543
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.48, %ecx
	movl	%eax, %edi
	movl	$1348, %edx                     # imm = 0x544
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end87:
	.size	_Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end87-_Z26cuda_kernel_greater_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_greater_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z36__device_stub__kernel_greater_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z36__device_stub__kernel_greater_scalarIfEvPKT_PS0_S0_i # -- Begin function _Z36__device_stub__kernel_greater_scalarIfEvPKT_PS0_S0_i
	.type	_Z36__device_stub__kernel_greater_scalarIfEvPKT_PS0_S0_i,@function
_Z36__device_stub__kernel_greater_scalarIfEvPKT_PS0_S0_i: # @_Z36__device_stub__kernel_greater_scalarIfEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	8(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end88:
	.size	_Z36__device_stub__kernel_greater_scalarIfEvPKT_PS0_S0_i, .Lfunc_end88-_Z36__device_stub__kernel_greater_scalarIfEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB89_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %edx
	callq	_Z33__device_stub__kernel_less_scalarIfEvPKT_PS0_S0_i
.LBB89_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.49, %ecx
	movl	%eax, %edi
	movl	$1358, %edx                     # imm = 0x54E
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.50, %ecx
	movl	%eax, %edi
	movl	$1359, %edx                     # imm = 0x54F
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end89:
	.size	_Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end89-_Z23cuda_kernel_less_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z33__device_stub__kernel_less_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z33__device_stub__kernel_less_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z33__device_stub__kernel_less_scalarIfEvPKT_PS0_S0_i # -- Begin function _Z33__device_stub__kernel_less_scalarIfEvPKT_PS0_S0_i
	.type	_Z33__device_stub__kernel_less_scalarIfEvPKT_PS0_S0_i,@function
_Z33__device_stub__kernel_less_scalarIfEvPKT_PS0_S0_i: # @_Z33__device_stub__kernel_less_scalarIfEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	8(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18kernel_less_scalarIfEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end90:
	.size	_Z33__device_stub__kernel_less_scalarIfEvPKT_PS0_S0_i, .Lfunc_end90-_Z33__device_stub__kernel_less_scalarIfEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB91_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %edx
	callq	_Z42__device_stub__kernel_greater_equal_scalarIfEvPKT_PS0_S0_i
.LBB91_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.51, %ecx
	movl	%eax, %edi
	movl	$1369, %edx                     # imm = 0x559
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.52, %ecx
	movl	%eax, %edi
	movl	$1370, %edx                     # imm = 0x55A
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end91:
	.size	_Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end91-_Z32cuda_kernel_greater_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z42__device_stub__kernel_greater_equal_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z42__device_stub__kernel_greater_equal_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z42__device_stub__kernel_greater_equal_scalarIfEvPKT_PS0_S0_i # -- Begin function _Z42__device_stub__kernel_greater_equal_scalarIfEvPKT_PS0_S0_i
	.type	_Z42__device_stub__kernel_greater_equal_scalarIfEvPKT_PS0_S0_i,@function
_Z42__device_stub__kernel_greater_equal_scalarIfEvPKT_PS0_S0_i: # @_Z42__device_stub__kernel_greater_equal_scalarIfEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	8(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end92:
	.size	_Z42__device_stub__kernel_greater_equal_scalarIfEvPKT_PS0_S0_i, .Lfunc_end92-_Z42__device_stub__kernel_greater_equal_scalarIfEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB93_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %edx
	callq	_Z39__device_stub__kernel_less_equal_scalarIfEvPKT_PS0_S0_i
.LBB93_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.53, %ecx
	movl	%eax, %edi
	movl	$1380, %edx                     # imm = 0x564
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.54, %ecx
	movl	%eax, %edi
	movl	$1381, %edx                     # imm = 0x565
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end93:
	.size	_Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end93-_Z29cuda_kernel_less_equal_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z39__device_stub__kernel_less_equal_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z39__device_stub__kernel_less_equal_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z39__device_stub__kernel_less_equal_scalarIfEvPKT_PS0_S0_i # -- Begin function _Z39__device_stub__kernel_less_equal_scalarIfEvPKT_PS0_S0_i
	.type	_Z39__device_stub__kernel_less_equal_scalarIfEvPKT_PS0_S0_i,@function
_Z39__device_stub__kernel_less_equal_scalarIfEvPKT_PS0_S0_i: # @_Z39__device_stub__kernel_less_equal_scalarIfEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	8(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end94:
	.size	_Z39__device_stub__kernel_less_equal_scalarIfEvPKT_PS0_S0_i, .Lfunc_end94-_Z39__device_stub__kernel_less_equal_scalarIfEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB95_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z29__device_stub__kernel_replaceIfEvPKT_S2_PS0_i
.LBB95_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.55, %ecx
	movl	%eax, %edi
	movl	$1391, %edx                     # imm = 0x56F
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.56, %ecx
	movl	%eax, %edi
	movl	$1392, %edx                     # imm = 0x570
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end95:
	.size	_Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end95-_Z19cuda_kernel_replaceIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__kernel_replaceIfEvPKT_S2_PS0_i,"axG",@progbits,_Z29__device_stub__kernel_replaceIfEvPKT_S2_PS0_i,comdat
	.weak	_Z29__device_stub__kernel_replaceIfEvPKT_S2_PS0_i # -- Begin function _Z29__device_stub__kernel_replaceIfEvPKT_S2_PS0_i
	.type	_Z29__device_stub__kernel_replaceIfEvPKT_S2_PS0_i,@function
_Z29__device_stub__kernel_replaceIfEvPKT_S2_PS0_i: # @_Z29__device_stub__kernel_replaceIfEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14kernel_replaceIfEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end96:
	.size	_Z29__device_stub__kernel_replaceIfEvPKT_S2_PS0_i, .Lfunc_end96-_Z29__device_stub__kernel_replaceIfEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB97_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebx, %edx
	callq	_Z36__device_stub__kernel_replace_scalarIfEvPKT_PS0_S0_i
.LBB97_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.55, %ecx
	movl	%eax, %edi
	movl	$1402, %edx                     # imm = 0x57A
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.56, %ecx
	movl	%eax, %edi
	movl	$1403, %edx                     # imm = 0x57B
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end97:
	.size	_Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end97-_Z26cuda_kernel_replace_scalarIfEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_replace_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z36__device_stub__kernel_replace_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z36__device_stub__kernel_replace_scalarIfEvPKT_PS0_S0_i # -- Begin function _Z36__device_stub__kernel_replace_scalarIfEvPKT_PS0_S0_i
	.type	_Z36__device_stub__kernel_replace_scalarIfEvPKT_PS0_S0_i,@function
_Z36__device_stub__kernel_replace_scalarIfEvPKT_PS0_S0_i: # @_Z36__device_stub__kernel_replace_scalarIfEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	8(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end98:
	.size	_Z36__device_stub__kernel_replace_scalarIfEvPKT_PS0_S0_i, .Lfunc_end98-_Z36__device_stub__kernel_replace_scalarIfEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB99_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z25__device_stub__kernel_sumIfEvPKT_PS0_i
.LBB99_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.57, %ecx
	movl	%eax, %edi
	movl	$1420, %edx                     # imm = 0x58C
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.58, %ecx
	movl	%eax, %edi
	movl	$1421, %edx                     # imm = 0x58D
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end99:
	.size	_Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end99-_Z15cuda_kernel_sumIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_sumIfEvPKT_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_sumIfEvPKT_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_sumIfEvPKT_PS0_i # -- Begin function _Z25__device_stub__kernel_sumIfEvPKT_PS0_i
	.type	_Z25__device_stub__kernel_sumIfEvPKT_PS0_i,@function
_Z25__device_stub__kernel_sumIfEvPKT_PS0_i: # @_Z25__device_stub__kernel_sumIfEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_sumIfEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end100:
	.size	_Z25__device_stub__kernel_sumIfEvPKT_PS0_i, .Lfunc_end100-_Z25__device_stub__kernel_sumIfEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB101_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z25__device_stub__kernel_minIfEvPKT_PS0_i
.LBB101_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.59, %ecx
	movl	%eax, %edi
	movl	$1431, %edx                     # imm = 0x597
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.60, %ecx
	movl	%eax, %edi
	movl	$1432, %edx                     # imm = 0x598
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end101:
	.size	_Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end101-_Z15cuda_kernel_minIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_minIfEvPKT_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_minIfEvPKT_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_minIfEvPKT_PS0_i # -- Begin function _Z25__device_stub__kernel_minIfEvPKT_PS0_i
	.type	_Z25__device_stub__kernel_minIfEvPKT_PS0_i,@function
_Z25__device_stub__kernel_minIfEvPKT_PS0_i: # @_Z25__device_stub__kernel_minIfEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_minIfEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end102:
	.size	_Z25__device_stub__kernel_minIfEvPKT_PS0_i, .Lfunc_end102-_Z25__device_stub__kernel_minIfEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB103_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z25__device_stub__kernel_maxIfEvPKT_PS0_i
.LBB103_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.61, %ecx
	movl	%eax, %edi
	movl	$1442, %edx                     # imm = 0x5A2
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.62, %ecx
	movl	%eax, %edi
	movl	$1443, %edx                     # imm = 0x5A3
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end103:
	.size	_Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end103-_Z15cuda_kernel_maxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_maxIfEvPKT_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_maxIfEvPKT_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_maxIfEvPKT_PS0_i # -- Begin function _Z25__device_stub__kernel_maxIfEvPKT_PS0_i
	.type	_Z25__device_stub__kernel_maxIfEvPKT_PS0_i,@function
_Z25__device_stub__kernel_maxIfEvPKT_PS0_i: # @_Z25__device_stub__kernel_maxIfEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_maxIfEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end104:
	.size	_Z25__device_stub__kernel_maxIfEvPKT_PS0_i, .Lfunc_end104-_Z25__device_stub__kernel_maxIfEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,"axG",@progbits,_Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,comdat
	.weak	_Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii # -- Begin function _Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.type	_Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,@function
_Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii: # @_Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 12(%rsp)                  # 4-byte Spill
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	104(%rsp), %ebx
	movl	96(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	88(%rsp), %r12d
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB105_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%r12d, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__kernel_pad_2dIfEvPKT_PS0_iiiiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB105_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.63, %ecx
	movl	%eax, %edi
	movl	$1460, %edx                     # imm = 0x5B4
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.64, %ecx
	movl	%eax, %edi
	movl	$1461, %edx                     # imm = 0x5B5
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end105:
	.size	_Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, .Lfunc_end105-_Z18cuda_kernel_pad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__kernel_pad_2dIfEvPKT_PS0_iiiiii,"axG",@progbits,_Z28__device_stub__kernel_pad_2dIfEvPKT_PS0_iiiiii,comdat
	.weak	_Z28__device_stub__kernel_pad_2dIfEvPKT_PS0_iiiiii # -- Begin function _Z28__device_stub__kernel_pad_2dIfEvPKT_PS0_iiiiii
	.type	_Z28__device_stub__kernel_pad_2dIfEvPKT_PS0_iiiiii,@function
_Z28__device_stub__kernel_pad_2dIfEvPKT_PS0_iiiiii: # @_Z28__device_stub__kernel_pad_2dIfEvPKT_PS0_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	200(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end106:
	.size	_Z28__device_stub__kernel_pad_2dIfEvPKT_PS0_iiiiii, .Lfunc_end106-_Z28__device_stub__kernel_pad_2dIfEvPKT_PS0_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,"axG",@progbits,_Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,comdat
	.weak	_Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii # -- Begin function _Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.type	_Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,@function
_Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii: # @_Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 12(%rsp)                  # 4-byte Spill
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	104(%rsp), %ebx
	movl	96(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	88(%rsp), %r12d
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB107_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%r12d, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z30__device_stub__kernel_unpad_2dIfEvPKT_PS0_iiiiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB107_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.65, %ecx
	movl	%eax, %edi
	movl	$1472, %edx                     # imm = 0x5C0
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.66, %ecx
	movl	%eax, %edi
	movl	$1473, %edx                     # imm = 0x5C1
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end107:
	.size	_Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, .Lfunc_end107-_Z20cuda_kernel_unpad_2dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z30__device_stub__kernel_unpad_2dIfEvPKT_PS0_iiiiii,"axG",@progbits,_Z30__device_stub__kernel_unpad_2dIfEvPKT_PS0_iiiiii,comdat
	.weak	_Z30__device_stub__kernel_unpad_2dIfEvPKT_PS0_iiiiii # -- Begin function _Z30__device_stub__kernel_unpad_2dIfEvPKT_PS0_iiiiii
	.type	_Z30__device_stub__kernel_unpad_2dIfEvPKT_PS0_iiiiii,@function
_Z30__device_stub__kernel_unpad_2dIfEvPKT_PS0_iiiiii: # @_Z30__device_stub__kernel_unpad_2dIfEvPKT_PS0_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	200(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end108:
	.size	_Z30__device_stub__kernel_unpad_2dIfEvPKT_PS0_iiiiii, .Lfunc_end108-_Z30__device_stub__kernel_unpad_2dIfEvPKT_PS0_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,"axG",@progbits,_Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,comdat
	.weak	_Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii # -- Begin function _Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.type	_Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,@function
_Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii: # @_Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 4(%rsp)                   # 4-byte Spill
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	144(%rsp), %ebx
	movl	136(%rsp), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	128(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	120(%rsp), %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	112(%rsp), %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	104(%rsp), %r12d
	movl	96(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB109_2
# %bb.1:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%r12d, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__kernel_pad_3dIfEvPKT_PS0_iiiiiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB109_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.67, %ecx
	movl	%eax, %edi
	movl	$1487, %edx                     # imm = 0x5CF
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.68, %ecx
	movl	%eax, %edi
	movl	$1488, %edx                     # imm = 0x5D0
	movl	$1, %r8d
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end109:
	.size	_Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, .Lfunc_end109-_Z18cuda_kernel_pad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__kernel_pad_3dIfEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z28__device_stub__kernel_pad_3dIfEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z28__device_stub__kernel_pad_3dIfEvPKT_PS0_iiiiiiiii # -- Begin function _Z28__device_stub__kernel_pad_3dIfEvPKT_PS0_iiiiiiiii
	.type	_Z28__device_stub__kernel_pad_3dIfEvPKT_PS0_iiiiiiiii,@function
_Z28__device_stub__kernel_pad_3dIfEvPKT_PS0_iiiiiiiii: # @_Z28__device_stub__kernel_pad_3dIfEvPKT_PS0_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end110:
	.size	_Z28__device_stub__kernel_pad_3dIfEvPKT_PS0_iiiiiiiii, .Lfunc_end110-_Z28__device_stub__kernel_pad_3dIfEvPKT_PS0_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,"axG",@progbits,_Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,comdat
	.weak	_Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii # -- Begin function _Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.type	_Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,@function
_Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii: # @_Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 4(%rsp)                   # 4-byte Spill
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	144(%rsp), %ebx
	movl	136(%rsp), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	128(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	120(%rsp), %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	112(%rsp), %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	104(%rsp), %r12d
	movl	96(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB111_2
# %bb.1:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%r12d, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z30__device_stub__kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB111_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.69, %ecx
	movl	%eax, %edi
	movl	$1499, %edx                     # imm = 0x5DB
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.70, %ecx
	movl	%eax, %edi
	movl	$1500, %edx                     # imm = 0x5DC
	movl	$1, %r8d
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end111:
	.size	_Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, .Lfunc_end111-_Z20cuda_kernel_unpad_3dIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z30__device_stub__kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z30__device_stub__kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z30__device_stub__kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii # -- Begin function _Z30__device_stub__kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii
	.type	_Z30__device_stub__kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii,@function
_Z30__device_stub__kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii: # @_Z30__device_stub__kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end112:
	.size	_Z30__device_stub__kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii, .Lfunc_end112-_Z30__device_stub__kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii,"axG",@progbits,_Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii,comdat
	.weak	_Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii # -- Begin function _Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii
	.type	_Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii,@function
_Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii: # @_Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	48(%rsp), %ebp
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB113_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	movl	%ebp, %r8d
	callq	_Z29__device_stub__kernel_grid_2dIfEvPT_S1_Pdii
.LBB113_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.71, %ecx
	movl	%eax, %edi
	movl	$1511, %edx                     # imm = 0x5E7
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.72, %ecx
	movl	%eax, %edi
	movl	$1512, %edx                     # imm = 0x5E8
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end113:
	.size	_Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii, .Lfunc_end113-_Z19cuda_kernel_grid_2dIfEvRSt6vectorIiSaIiEES3_PT_S5_Pdii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__kernel_grid_2dIfEvPT_S1_Pdii,"axG",@progbits,_Z29__device_stub__kernel_grid_2dIfEvPT_S1_Pdii,comdat
	.weak	_Z29__device_stub__kernel_grid_2dIfEvPT_S1_Pdii # -- Begin function _Z29__device_stub__kernel_grid_2dIfEvPT_S1_Pdii
	.type	_Z29__device_stub__kernel_grid_2dIfEvPT_S1_Pdii,@function
_Z29__device_stub__kernel_grid_2dIfEvPT_S1_Pdii: # @_Z29__device_stub__kernel_grid_2dIfEvPT_S1_Pdii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14kernel_grid_2dIfEvPT_S1_Pdii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end114:
	.size	_Z29__device_stub__kernel_grid_2dIfEvPT_S1_Pdii, .Lfunc_end114-_Z29__device_stub__kernel_grid_2dIfEvPT_S1_Pdii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii,"axG",@progbits,_Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii,comdat
	.weak	_Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii # -- Begin function _Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii
	.type	_Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii,@function
_Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii: # @_Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	96(%rsp), %ebx
	movl	88(%rsp), %ebp
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB115_2
# %bb.1:
	movl	%ebx, (%rsp)
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	callq	_Z29__device_stub__kernel_grid_3dIfEvPT_S1_S1_Pdiii
.LBB115_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.73, %ecx
	movl	%eax, %edi
	movl	$1523, %edx                     # imm = 0x5F3
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.74, %ecx
	movl	%eax, %edi
	movl	$1524, %edx                     # imm = 0x5F4
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end115:
	.size	_Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii, .Lfunc_end115-_Z19cuda_kernel_grid_3dIfEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__kernel_grid_3dIfEvPT_S1_S1_Pdiii,"axG",@progbits,_Z29__device_stub__kernel_grid_3dIfEvPT_S1_S1_Pdiii,comdat
	.weak	_Z29__device_stub__kernel_grid_3dIfEvPT_S1_S1_Pdiii # -- Begin function _Z29__device_stub__kernel_grid_3dIfEvPT_S1_S1_Pdiii
	.type	_Z29__device_stub__kernel_grid_3dIfEvPT_S1_S1_Pdiii,@function
_Z29__device_stub__kernel_grid_3dIfEvPT_S1_S1_Pdiii: # @_Z29__device_stub__kernel_grid_3dIfEvPT_S1_S1_Pdiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end116:
	.size	_Z29__device_stub__kernel_grid_3dIfEvPT_S1_S1_Pdiii, .Lfunc_end116-_Z29__device_stub__kernel_grid_3dIfEvPT_S1_S1_Pdiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i,"axG",@progbits,_Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i,comdat
	.weak	_Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i # -- Begin function _Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i
	.type	_Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i,@function
_Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i: # @_Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	72(%rsp), %ebp
	movq	64(%rsp), %r13
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB117_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	movq	%r13, %r8
	movl	%ebp, %r9d
	callq	_Z31__device_stub__kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i
.LBB117_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.75, %ecx
	movl	%eax, %edi
	movl	$1539, %edx                     # imm = 0x603
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.76, %ecx
	movl	%eax, %edi
	movl	$1540, %edx                     # imm = 0x604
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end117:
	.size	_Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i, .Lfunc_end117-_Z21cuda_kernel_affine_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i,"axG",@progbits,_Z31__device_stub__kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i,comdat
	.weak	_Z31__device_stub__kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i # -- Begin function _Z31__device_stub__kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i
	.type	_Z31__device_stub__kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i,@function
_Z31__device_stub__kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i: # @_Z31__device_stub__kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end118:
	.size	_Z31__device_stub__kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i, .Lfunc_end118-_Z31__device_stub__kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i,"axG",@progbits,_Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i,comdat
	.weak	_Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i # -- Begin function _Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i
	.type	_Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i,@function
_Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i: # @_Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	104(%rsp), %ebx
	movq	96(%rsp), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	88(%rsp), %r13
	movq	80(%rsp), %rbp
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB119_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%rbp, %r8
	movq	%r13, %r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z31__device_stub__kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB119_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.77, %ecx
	movl	%eax, %edi
	movl	$1552, %edx                     # imm = 0x610
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.78, %ecx
	movl	%eax, %edi
	movl	$1553, %edx                     # imm = 0x611
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end119:
	.size	_Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i, .Lfunc_end119-_Z21cuda_kernel_affine_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i,"axG",@progbits,_Z31__device_stub__kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i,comdat
	.weak	_Z31__device_stub__kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i # -- Begin function _Z31__device_stub__kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i
	.type	_Z31__device_stub__kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i,@function
_Z31__device_stub__kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i: # @_Z31__device_stub__kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end120:
	.size	_Z31__device_stub__kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i, .Lfunc_end120-_Z31__device_stub__kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi,"axG",@progbits,_Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi,comdat
	.weak	_Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi # -- Begin function _Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi
	.type	_Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi,@function
_Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi: # @_Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	72(%rsp), %ebp
	movq	64(%rsp), %r13
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB121_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	movq	%r13, %r8
	movl	%ebp, %r9d
	callq	_Z35__device_stub__kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi
.LBB121_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.79, %ecx
	movl	%eax, %edi
	movl	$1565, %edx                     # imm = 0x61D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.80, %ecx
	movl	%eax, %edi
	movl	$1566, %edx                     # imm = 0x61E
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end121:
	.size	_Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi, .Lfunc_end121-_Z25cuda_kernel_affine_sod_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35__device_stub__kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi,"axG",@progbits,_Z35__device_stub__kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi,comdat
	.weak	_Z35__device_stub__kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi # -- Begin function _Z35__device_stub__kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi
	.type	_Z35__device_stub__kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi,@function
_Z35__device_stub__kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi: # @_Z35__device_stub__kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end122:
	.size	_Z35__device_stub__kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi, .Lfunc_end122-_Z35__device_stub__kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi,"axG",@progbits,_Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi,comdat
	.weak	_Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi # -- Begin function _Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi
	.type	_Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi,@function
_Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi: # @_Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	104(%rsp), %ebx
	movq	96(%rsp), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	88(%rsp), %r13
	movq	80(%rsp), %rbp
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB123_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%rbp, %r8
	movq	%r13, %r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z35__device_stub__kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB123_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.81, %ecx
	movl	%eax, %edi
	movl	$1578, %edx                     # imm = 0x62A
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.82, %ecx
	movl	%eax, %edi
	movl	$1579, %edx                     # imm = 0x62B
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end123:
	.size	_Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi, .Lfunc_end123-_Z25cuda_kernel_affine_sod_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35__device_stub__kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi,"axG",@progbits,_Z35__device_stub__kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi,comdat
	.weak	_Z35__device_stub__kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi # -- Begin function _Z35__device_stub__kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi
	.type	_Z35__device_stub__kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi,@function
_Z35__device_stub__kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi: # @_Z35__device_stub__kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end124:
	.size	_Z35__device_stub__kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi, .Lfunc_end124-_Z35__device_stub__kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i,"axG",@progbits,_Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i,comdat
	.weak	_Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i # -- Begin function _Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i
	.type	_Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i,@function
_Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i: # @_Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r13
	movl	96(%rsp), %ebx
	movq	88(%rsp), %r12
	movq	80(%rsp), %rbp
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB125_2
# %bb.1:
	movl	%ebx, (%rsp)
	movq	%r13, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%rbp, %r8
	movq	%r12, %r9
	callq	_Z31__device_stub__kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i
.LBB125_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.83, %ecx
	movl	%eax, %edi
	movl	$1591, %edx                     # imm = 0x637
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.84, %ecx
	movl	%eax, %edi
	movl	$1592, %edx                     # imm = 0x638
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end125:
	.size	_Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i, .Lfunc_end125-_Z21cuda_kernel_dfield_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i,"axG",@progbits,_Z31__device_stub__kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i,comdat
	.weak	_Z31__device_stub__kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i # -- Begin function _Z31__device_stub__kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i
	.type	_Z31__device_stub__kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i,@function
_Z31__device_stub__kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i: # @_Z31__device_stub__kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end126:
	.size	_Z31__device_stub__kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i, .Lfunc_end126-_Z31__device_stub__kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i,"axG",@progbits,_Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i,comdat
	.weak	_Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i # -- Begin function _Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i
	.type	_Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i,@function
_Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i: # @_Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	136(%rsp), %ebx
	movq	128(%rsp), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	120(%rsp), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	112(%rsp), %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	104(%rsp), %r13
	movq	96(%rsp), %rbp
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB127_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movq	%rbp, %r8
	movq	%r13, %r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z31__device_stub__kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB127_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.85, %ecx
	movl	%eax, %edi
	movl	$1605, %edx                     # imm = 0x645
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.86, %ecx
	movl	%eax, %edi
	movl	$1606, %edx                     # imm = 0x646
	movl	$1, %r8d
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end127:
	.size	_Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i, .Lfunc_end127-_Z21cuda_kernel_dfield_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,"axG",@progbits,_Z31__device_stub__kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,comdat
	.weak	_Z31__device_stub__kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i # -- Begin function _Z31__device_stub__kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.type	_Z31__device_stub__kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,@function
_Z31__device_stub__kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i: # @_Z31__device_stub__kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end128:
	.size	_Z31__device_stub__kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, .Lfunc_end128-_Z31__device_stub__kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,"axG",@progbits,_Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,comdat
	.weak	_Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii # -- Begin function _Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.type	_Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,@function
_Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii: # @_Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	104(%rsp), %ebx
	movl	96(%rsp), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	88(%rsp), %ebp
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB129_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z46__device_stub__kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB129_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.87, %ecx
	movl	%eax, %edi
	movl	$1619, %edx                     # imm = 0x653
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.88, %ecx
	movl	%eax, %edi
	movl	$1620, %edx                     # imm = 0x654
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end129:
	.size	_Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, .Lfunc_end129-_Z36cuda_kernel_nearest_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z46__device_stub__kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z46__device_stub__kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z46__device_stub__kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii # -- Begin function _Z46__device_stub__kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.type	_Z46__device_stub__kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,@function
_Z46__device_stub__kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii: # @_Z46__device_stub__kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end130:
	.size	_Z46__device_stub__kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, .Lfunc_end130-_Z46__device_stub__kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,"axG",@progbits,_Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,comdat
	.weak	_Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii # -- Begin function _Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.type	_Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,@function
_Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii: # @_Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 8(%rsp)                    # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	144(%rsp), %ebx
	movl	136(%rsp), %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	movl	128(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	120(%rsp), %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	112(%rsp), %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	104(%rsp), %ebp
	movq	96(%rsp), %r13
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB131_2
# %bb.1:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%r13, %r8
	movl	%ebp, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z46__device_stub__kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB131_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.89, %ecx
	movl	%eax, %edi
	movl	$1633, %edx                     # imm = 0x661
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.90, %ecx
	movl	%eax, %edi
	movl	$1634, %edx                     # imm = 0x662
	movl	$1, %r8d
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end131:
	.size	_Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii, .Lfunc_end131-_Z36cuda_kernel_nearest_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z46__device_stub__kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z46__device_stub__kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.weak	_Z46__device_stub__kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii # -- Begin function _Z46__device_stub__kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.type	_Z46__device_stub__kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,@function
_Z46__device_stub__kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii: # @_Z46__device_stub__kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end132:
	.size	_Z46__device_stub__kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii, .Lfunc_end132-_Z46__device_stub__kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,"axG",@progbits,_Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,comdat
	.weak	_Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii # -- Begin function _Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.type	_Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,@function
_Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii: # @_Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	104(%rsp), %ebx
	movl	96(%rsp), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	88(%rsp), %ebp
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB133_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z45__device_stub__kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB133_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.91, %ecx
	movl	%eax, %edi
	movl	$1647, %edx                     # imm = 0x66F
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.92, %ecx
	movl	%eax, %edi
	movl	$1648, %edx                     # imm = 0x670
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end133:
	.size	_Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, .Lfunc_end133-_Z35cuda_kernel_linear_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z45__device_stub__kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z45__device_stub__kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z45__device_stub__kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii # -- Begin function _Z45__device_stub__kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.type	_Z45__device_stub__kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,@function
_Z45__device_stub__kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii: # @_Z45__device_stub__kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end134:
	.size	_Z45__device_stub__kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, .Lfunc_end134-_Z45__device_stub__kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,"axG",@progbits,_Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,comdat
	.weak	_Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii # -- Begin function _Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.type	_Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,@function
_Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii: # @_Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 8(%rsp)                    # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	144(%rsp), %ebx
	movl	136(%rsp), %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	movl	128(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	120(%rsp), %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	112(%rsp), %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	104(%rsp), %ebp
	movq	96(%rsp), %r13
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB135_2
# %bb.1:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%r13, %r8
	movl	%ebp, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z45__device_stub__kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB135_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.93, %ecx
	movl	%eax, %edi
	movl	$1661, %edx                     # imm = 0x67D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.94, %ecx
	movl	%eax, %edi
	movl	$1662, %edx                     # imm = 0x67E
	movl	$1, %r8d
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end135:
	.size	_Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii, .Lfunc_end135-_Z35cuda_kernel_linear_interpolation_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z45__device_stub__kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z45__device_stub__kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.weak	_Z45__device_stub__kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii # -- Begin function _Z45__device_stub__kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.type	_Z45__device_stub__kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,@function
_Z45__device_stub__kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii: # @_Z45__device_stub__kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end136:
	.size	_Z45__device_stub__kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii, .Lfunc_end136-_Z45__device_stub__kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,"axG",@progbits,_Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,comdat
	.weak	_Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii # -- Begin function _Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.type	_Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,@function
_Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii: # @_Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	104(%rsp), %ebx
	movl	96(%rsp), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	88(%rsp), %ebp
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB137_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z44__device_stub__kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB137_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.95, %ecx
	movl	%eax, %edi
	movl	$1675, %edx                     # imm = 0x68B
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.96, %ecx
	movl	%eax, %edi
	movl	$1676, %edx                     # imm = 0x68C
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end137:
	.size	_Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, .Lfunc_end137-_Z34cuda_kernel_cubic_interpolation_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z44__device_stub__kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z44__device_stub__kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z44__device_stub__kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii # -- Begin function _Z44__device_stub__kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.type	_Z44__device_stub__kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,@function
_Z44__device_stub__kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii: # @_Z44__device_stub__kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end138:
	.size	_Z44__device_stub__kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, .Lfunc_end138-_Z44__device_stub__kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii # -- Begin function _Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,@function
_Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii: # @_Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rsi), %rax
	movl	8(%rax), %ecx
	movq	(%rdi), %rdx
	testl	%ecx, %ecx
	je	.LBB139_1
# %bb.2:
	movl	8(%rdx), %esi
	jmp	.LBB139_3
.LBB139_1:
	movl	$1, %ecx
	movl	$1, %esi
.LBB139_3:
	movl	48(%rsp), %r12d
	movq	(%rdx), %rdi
	movq	(%rax), %rdx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB139_5
# %bb.4:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	movl	%r12d, %r8d
	callq	_Z31__device_stub__kernel_gradientxIfEvPKT_PS0_iii
.LBB139_5:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.97, %ecx
	movl	%eax, %edi
	movl	$1712, %edx                     # imm = 0x6B0
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.98, %ecx
	movl	%eax, %edi
	movl	$1713, %edx                     # imm = 0x6B1
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end139:
	.size	_Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .Lfunc_end139-_Z21cuda_kernel_gradientxIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_gradientxIfEvPKT_PS0_iii,"axG",@progbits,_Z31__device_stub__kernel_gradientxIfEvPKT_PS0_iii,comdat
	.weak	_Z31__device_stub__kernel_gradientxIfEvPKT_PS0_iii # -- Begin function _Z31__device_stub__kernel_gradientxIfEvPKT_PS0_iii
	.type	_Z31__device_stub__kernel_gradientxIfEvPKT_PS0_iii,@function
_Z31__device_stub__kernel_gradientxIfEvPKT_PS0_iii: # @_Z31__device_stub__kernel_gradientxIfEvPKT_PS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_gradientxIfEvPKT_PS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end140:
	.size	_Z31__device_stub__kernel_gradientxIfEvPKT_PS0_iii, .Lfunc_end140-_Z31__device_stub__kernel_gradientxIfEvPKT_PS0_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii # -- Begin function _Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,@function
_Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii: # @_Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rsi), %rax
	movl	8(%rax), %ecx
	movq	(%rdi), %rdx
	testl	%ecx, %ecx
	je	.LBB141_1
# %bb.2:
	movl	8(%rdx), %esi
	jmp	.LBB141_3
.LBB141_1:
	movl	$1, %ecx
	movl	$1, %esi
.LBB141_3:
	movl	48(%rsp), %r12d
	movq	(%rdx), %rdi
	movq	(%rax), %rdx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB141_5
# %bb.4:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	movl	%r12d, %r8d
	callq	_Z31__device_stub__kernel_gradientyIfEvPKT_PS0_iii
.LBB141_5:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.99, %ecx
	movl	%eax, %edi
	movl	$1734, %edx                     # imm = 0x6C6
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.100, %ecx
	movl	%eax, %edi
	movl	$1735, %edx                     # imm = 0x6C7
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end141:
	.size	_Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .Lfunc_end141-_Z21cuda_kernel_gradientyIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_gradientyIfEvPKT_PS0_iii,"axG",@progbits,_Z31__device_stub__kernel_gradientyIfEvPKT_PS0_iii,comdat
	.weak	_Z31__device_stub__kernel_gradientyIfEvPKT_PS0_iii # -- Begin function _Z31__device_stub__kernel_gradientyIfEvPKT_PS0_iii
	.type	_Z31__device_stub__kernel_gradientyIfEvPKT_PS0_iii,@function
_Z31__device_stub__kernel_gradientyIfEvPKT_PS0_iii: # @_Z31__device_stub__kernel_gradientyIfEvPKT_PS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_gradientyIfEvPKT_PS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end142:
	.size	_Z31__device_stub__kernel_gradientyIfEvPKT_PS0_iii, .Lfunc_end142-_Z31__device_stub__kernel_gradientyIfEvPKT_PS0_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii # -- Begin function _Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,@function
_Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii: # @_Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r12
	movl	48(%rsp), %r15d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB143_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	movl	%r15d, %r8d
	callq	_Z31__device_stub__kernel_gradientzIfEvPKT_PS0_iii
.LBB143_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.101, %ecx
	movl	%eax, %edi
	movl	$1746, %edx                     # imm = 0x6D2
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.102, %ecx
	movl	%eax, %edi
	movl	$1747, %edx                     # imm = 0x6D3
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end143:
	.size	_Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .Lfunc_end143-_Z21cuda_kernel_gradientzIfEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_gradientzIfEvPKT_PS0_iii,"axG",@progbits,_Z31__device_stub__kernel_gradientzIfEvPKT_PS0_iii,comdat
	.weak	_Z31__device_stub__kernel_gradientzIfEvPKT_PS0_iii # -- Begin function _Z31__device_stub__kernel_gradientzIfEvPKT_PS0_iii
	.type	_Z31__device_stub__kernel_gradientzIfEvPKT_PS0_iii,@function
_Z31__device_stub__kernel_gradientzIfEvPKT_PS0_iii: # @_Z31__device_stub__kernel_gradientzIfEvPKT_PS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_gradientzIfEvPKT_PS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end144:
	.size	_Z31__device_stub__kernel_gradientzIfEvPKT_PS0_iii, .Lfunc_end144-_Z31__device_stub__kernel_gradientzIfEvPKT_PS0_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii,"axG",@progbits,_Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii,comdat
	.weak	_Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii # -- Begin function _Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii
	.type	_Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii,@function
_Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii: # @_Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 20(%rsp)                  # 4-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	96(%rsp), %ebx
	movl	88(%rsp), %ebp
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB145_2
# %bb.1:
	movl	%ebx, (%rsp)
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	20(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	callq	_Z36__device_stub__kernel_convolution_2dIfEvPKT_S2_PS0_iiii
.LBB145_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.103, %ecx
	movl	%eax, %edi
	movl	$1758, %edx                     # imm = 0x6DE
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.104, %ecx
	movl	%eax, %edi
	movl	$1759, %edx                     # imm = 0x6DF
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end145:
	.size	_Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii, .Lfunc_end145-_Z26cuda_kernel_convolution_2dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_convolution_2dIfEvPKT_S2_PS0_iiii,"axG",@progbits,_Z36__device_stub__kernel_convolution_2dIfEvPKT_S2_PS0_iiii,comdat
	.weak	_Z36__device_stub__kernel_convolution_2dIfEvPKT_S2_PS0_iiii # -- Begin function _Z36__device_stub__kernel_convolution_2dIfEvPKT_S2_PS0_iiii
	.type	_Z36__device_stub__kernel_convolution_2dIfEvPKT_S2_PS0_iiii,@function
_Z36__device_stub__kernel_convolution_2dIfEvPKT_S2_PS0_iiii: # @_Z36__device_stub__kernel_convolution_2dIfEvPKT_S2_PS0_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end146:
	.size	_Z36__device_stub__kernel_convolution_2dIfEvPKT_S2_PS0_iiii, .Lfunc_end146-_Z36__device_stub__kernel_convolution_2dIfEvPKT_S2_PS0_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii,"axG",@progbits,_Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii,comdat
	.weak	_Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii # -- Begin function _Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii
	.type	_Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii,@function
_Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii: # @_Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 4(%rsp)                   # 4-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	112(%rsp), %ebx
	movl	104(%rsp), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	96(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	88(%rsp), %ebp
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB147_2
# %bb.1:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z36__device_stub__kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB147_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.105, %ecx
	movl	%eax, %edi
	movl	$1770, %edx                     # imm = 0x6EA
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.106, %ecx
	movl	%eax, %edi
	movl	$1771, %edx                     # imm = 0x6EB
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end147:
	.size	_Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii, .Lfunc_end147-_Z26cuda_kernel_convolution_3dIfEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii,"axG",@progbits,_Z36__device_stub__kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii,comdat
	.weak	_Z36__device_stub__kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii # -- Begin function _Z36__device_stub__kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii
	.type	_Z36__device_stub__kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii,@function
_Z36__device_stub__kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii: # @_Z36__device_stub__kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end148:
	.size	_Z36__device_stub__kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii, .Lfunc_end148-_Z36__device_stub__kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i # -- Begin function _Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i,@function
_Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i: # @_Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%ecx, %ebx
	movsd	%xmm0, (%rsp)                   # 8-byte Spill
	movq	%rdx, %r14
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB149_2
# %bb.1:
	movq	%r14, %rdi
	movsd	(%rsp), %xmm0                   # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %esi
	callq	_Z28__device_stub__kernel_assignIdEvPT_S0_i
.LBB149_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.7, %ecx
	movl	%eax, %edi
	movl	$1101, %edx                     # imm = 0x44D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.8, %ecx
	movl	%eax, %edi
	movl	$1102, %edx                     # imm = 0x44E
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end149:
	.size	_Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i, .Lfunc_end149-_Z18cuda_kernel_assignIdEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__kernel_assignIdEvPT_S0_i,"axG",@progbits,_Z28__device_stub__kernel_assignIdEvPT_S0_i,comdat
	.weak	_Z28__device_stub__kernel_assignIdEvPT_S0_i # -- Begin function _Z28__device_stub__kernel_assignIdEvPT_S0_i
	.type	_Z28__device_stub__kernel_assignIdEvPT_S0_i,@function
_Z28__device_stub__kernel_assignIdEvPT_S0_i: # @_Z28__device_stub__kernel_assignIdEvPT_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	12(%rsp), %rdx
	movl	%esi, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13kernel_assignIdEvPT_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end150:
	.size	_Z28__device_stub__kernel_assignIdEvPT_S0_i, .Lfunc_end150-_Z28__device_stub__kernel_assignIdEvPT_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB151_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_copyIdEvPKT_PS0_i
.LBB151_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.9, %ecx
	movl	%eax, %edi
	movl	$1113, %edx                     # imm = 0x459
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.10, %ecx
	movl	%eax, %edi
	movl	$1114, %edx                     # imm = 0x45A
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end151:
	.size	_Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end151-_Z16cuda_kernel_copyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_copyIdEvPKT_PS0_i,"axG",@progbits,_Z26__device_stub__kernel_copyIdEvPKT_PS0_i,comdat
	.weak	_Z26__device_stub__kernel_copyIdEvPKT_PS0_i # -- Begin function _Z26__device_stub__kernel_copyIdEvPKT_PS0_i
	.type	_Z26__device_stub__kernel_copyIdEvPKT_PS0_i,@function
_Z26__device_stub__kernel_copyIdEvPKT_PS0_i: # @_Z26__device_stub__kernel_copyIdEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_copyIdEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end152:
	.size	_Z26__device_stub__kernel_copyIdEvPKT_PS0_i, .Lfunc_end152-_Z26__device_stub__kernel_copyIdEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB153_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__kernel_addIdEvPKT_S2_PS0_i
.LBB153_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.11, %ecx
	movl	%eax, %edi
	movl	$1226, %edx                     # imm = 0x4CA
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.12, %ecx
	movl	%eax, %edi
	movl	$1227, %edx                     # imm = 0x4CB
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end153:
	.size	_Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end153-_Z15cuda_kernel_addIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_addIdEvPKT_S2_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_addIdEvPKT_S2_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_addIdEvPKT_S2_PS0_i # -- Begin function _Z25__device_stub__kernel_addIdEvPKT_S2_PS0_i
	.type	_Z25__device_stub__kernel_addIdEvPKT_S2_PS0_i,@function
_Z25__device_stub__kernel_addIdEvPKT_S2_PS0_i: # @_Z25__device_stub__kernel_addIdEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_addIdEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end154:
	.size	_Z25__device_stub__kernel_addIdEvPKT_S2_PS0_i, .Lfunc_end154-_Z25__device_stub__kernel_addIdEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB155_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__kernel_subIdEvPKT_S2_PS0_i
.LBB155_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.13, %ecx
	movl	%eax, %edi
	movl	$1237, %edx                     # imm = 0x4D5
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.14, %ecx
	movl	%eax, %edi
	movl	$1238, %edx                     # imm = 0x4D6
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end155:
	.size	_Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end155-_Z15cuda_kernel_subIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_subIdEvPKT_S2_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_subIdEvPKT_S2_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_subIdEvPKT_S2_PS0_i # -- Begin function _Z25__device_stub__kernel_subIdEvPKT_S2_PS0_i
	.type	_Z25__device_stub__kernel_subIdEvPKT_S2_PS0_i,@function
_Z25__device_stub__kernel_subIdEvPKT_S2_PS0_i: # @_Z25__device_stub__kernel_subIdEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_subIdEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end156:
	.size	_Z25__device_stub__kernel_subIdEvPKT_S2_PS0_i, .Lfunc_end156-_Z25__device_stub__kernel_subIdEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB157_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__kernel_mulIdEvPKT_S2_PS0_i
.LBB157_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.15, %ecx
	movl	%eax, %edi
	movl	$1248, %edx                     # imm = 0x4E0
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.16, %ecx
	movl	%eax, %edi
	movl	$1249, %edx                     # imm = 0x4E1
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end157:
	.size	_Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end157-_Z15cuda_kernel_mulIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_mulIdEvPKT_S2_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_mulIdEvPKT_S2_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_mulIdEvPKT_S2_PS0_i # -- Begin function _Z25__device_stub__kernel_mulIdEvPKT_S2_PS0_i
	.type	_Z25__device_stub__kernel_mulIdEvPKT_S2_PS0_i,@function
_Z25__device_stub__kernel_mulIdEvPKT_S2_PS0_i: # @_Z25__device_stub__kernel_mulIdEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_mulIdEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end158:
	.size	_Z25__device_stub__kernel_mulIdEvPKT_S2_PS0_i, .Lfunc_end158-_Z25__device_stub__kernel_mulIdEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB159_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__kernel_divIdEvPKT_S2_PS0_i
.LBB159_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.17, %ecx
	movl	%eax, %edi
	movl	$1259, %edx                     # imm = 0x4EB
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.18, %ecx
	movl	%eax, %edi
	movl	$1260, %edx                     # imm = 0x4EC
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end159:
	.size	_Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end159-_Z15cuda_kernel_divIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_divIdEvPKT_S2_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_divIdEvPKT_S2_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_divIdEvPKT_S2_PS0_i # -- Begin function _Z25__device_stub__kernel_divIdEvPKT_S2_PS0_i
	.type	_Z25__device_stub__kernel_divIdEvPKT_S2_PS0_i,@function
_Z25__device_stub__kernel_divIdEvPKT_S2_PS0_i: # @_Z25__device_stub__kernel_divIdEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_divIdEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end160:
	.size	_Z25__device_stub__kernel_divIdEvPKT_S2_PS0_i, .Lfunc_end160-_Z25__device_stub__kernel_divIdEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB161_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__kernel_powIdEvPKT_S2_PS0_i
.LBB161_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.19, %ecx
	movl	%eax, %edi
	movl	$1270, %edx                     # imm = 0x4F6
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.20, %ecx
	movl	%eax, %edi
	movl	$1271, %edx                     # imm = 0x4F7
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end161:
	.size	_Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end161-_Z15cuda_kernel_powIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_powIdEvPKT_S2_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_powIdEvPKT_S2_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_powIdEvPKT_S2_PS0_i # -- Begin function _Z25__device_stub__kernel_powIdEvPKT_S2_PS0_i
	.type	_Z25__device_stub__kernel_powIdEvPKT_S2_PS0_i,@function
_Z25__device_stub__kernel_powIdEvPKT_S2_PS0_i: # @_Z25__device_stub__kernel_powIdEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_powIdEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end162:
	.size	_Z25__device_stub__kernel_powIdEvPKT_S2_PS0_i, .Lfunc_end162-_Z25__device_stub__kernel_powIdEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB163_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %edx
	callq	_Z32__device_stub__kernel_add_scalarIdEvPKT_PS0_S0_i
.LBB163_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.21, %ecx
	movl	%eax, %edi
	movl	$1138, %edx                     # imm = 0x472
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.22, %ecx
	movl	%eax, %edi
	movl	$1139, %edx                     # imm = 0x473
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end163:
	.size	_Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end163-_Z22cuda_kernel_add_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_add_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z32__device_stub__kernel_add_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z32__device_stub__kernel_add_scalarIdEvPKT_PS0_S0_i # -- Begin function _Z32__device_stub__kernel_add_scalarIdEvPKT_PS0_S0_i
	.type	_Z32__device_stub__kernel_add_scalarIdEvPKT_PS0_S0_i,@function
_Z32__device_stub__kernel_add_scalarIdEvPKT_PS0_S0_i: # @_Z32__device_stub__kernel_add_scalarIdEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_add_scalarIdEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end164:
	.size	_Z32__device_stub__kernel_add_scalarIdEvPKT_PS0_S0_i, .Lfunc_end164-_Z32__device_stub__kernel_add_scalarIdEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB165_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %edx
	callq	_Z32__device_stub__kernel_sub_scalarIdEvPKT_PS0_S0_i
.LBB165_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.23, %ecx
	movl	%eax, %edi
	movl	$1149, %edx                     # imm = 0x47D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.24, %ecx
	movl	%eax, %edi
	movl	$1150, %edx                     # imm = 0x47E
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end165:
	.size	_Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end165-_Z22cuda_kernel_sub_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_sub_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z32__device_stub__kernel_sub_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z32__device_stub__kernel_sub_scalarIdEvPKT_PS0_S0_i # -- Begin function _Z32__device_stub__kernel_sub_scalarIdEvPKT_PS0_S0_i
	.type	_Z32__device_stub__kernel_sub_scalarIdEvPKT_PS0_S0_i,@function
_Z32__device_stub__kernel_sub_scalarIdEvPKT_PS0_S0_i: # @_Z32__device_stub__kernel_sub_scalarIdEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end166:
	.size	_Z32__device_stub__kernel_sub_scalarIdEvPKT_PS0_S0_i, .Lfunc_end166-_Z32__device_stub__kernel_sub_scalarIdEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB167_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %edx
	callq	_Z36__device_stub__kernel_sub_scalar_invIdEvPKT_PS0_S0_i
.LBB167_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.25, %ecx
	movl	%eax, %edi
	movl	$1160, %edx                     # imm = 0x488
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.26, %ecx
	movl	%eax, %edi
	movl	$1161, %edx                     # imm = 0x489
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end167:
	.size	_Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end167-_Z26cuda_kernel_sub_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_sub_scalar_invIdEvPKT_PS0_S0_i,"axG",@progbits,_Z36__device_stub__kernel_sub_scalar_invIdEvPKT_PS0_S0_i,comdat
	.weak	_Z36__device_stub__kernel_sub_scalar_invIdEvPKT_PS0_S0_i # -- Begin function _Z36__device_stub__kernel_sub_scalar_invIdEvPKT_PS0_S0_i
	.type	_Z36__device_stub__kernel_sub_scalar_invIdEvPKT_PS0_S0_i,@function
_Z36__device_stub__kernel_sub_scalar_invIdEvPKT_PS0_S0_i: # @_Z36__device_stub__kernel_sub_scalar_invIdEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end168:
	.size	_Z36__device_stub__kernel_sub_scalar_invIdEvPKT_PS0_S0_i, .Lfunc_end168-_Z36__device_stub__kernel_sub_scalar_invIdEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB169_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %edx
	callq	_Z32__device_stub__kernel_mul_scalarIdEvPKT_PS0_S0_i
.LBB169_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.27, %ecx
	movl	%eax, %edi
	movl	$1171, %edx                     # imm = 0x493
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.28, %ecx
	movl	%eax, %edi
	movl	$1172, %edx                     # imm = 0x494
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end169:
	.size	_Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end169-_Z22cuda_kernel_mul_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_mul_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z32__device_stub__kernel_mul_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z32__device_stub__kernel_mul_scalarIdEvPKT_PS0_S0_i # -- Begin function _Z32__device_stub__kernel_mul_scalarIdEvPKT_PS0_S0_i
	.type	_Z32__device_stub__kernel_mul_scalarIdEvPKT_PS0_S0_i,@function
_Z32__device_stub__kernel_mul_scalarIdEvPKT_PS0_S0_i: # @_Z32__device_stub__kernel_mul_scalarIdEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end170:
	.size	_Z32__device_stub__kernel_mul_scalarIdEvPKT_PS0_S0_i, .Lfunc_end170-_Z32__device_stub__kernel_mul_scalarIdEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB171_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %edx
	callq	_Z32__device_stub__kernel_div_scalarIdEvPKT_PS0_S0_i
.LBB171_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.29, %ecx
	movl	%eax, %edi
	movl	$1182, %edx                     # imm = 0x49E
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.30, %ecx
	movl	%eax, %edi
	movl	$1183, %edx                     # imm = 0x49F
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end171:
	.size	_Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end171-_Z22cuda_kernel_div_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_div_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z32__device_stub__kernel_div_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z32__device_stub__kernel_div_scalarIdEvPKT_PS0_S0_i # -- Begin function _Z32__device_stub__kernel_div_scalarIdEvPKT_PS0_S0_i
	.type	_Z32__device_stub__kernel_div_scalarIdEvPKT_PS0_S0_i,@function
_Z32__device_stub__kernel_div_scalarIdEvPKT_PS0_S0_i: # @_Z32__device_stub__kernel_div_scalarIdEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_div_scalarIdEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end172:
	.size	_Z32__device_stub__kernel_div_scalarIdEvPKT_PS0_S0_i, .Lfunc_end172-_Z32__device_stub__kernel_div_scalarIdEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB173_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %edx
	callq	_Z36__device_stub__kernel_div_scalar_invIdEvPKT_PS0_S0_i
.LBB173_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.31, %ecx
	movl	%eax, %edi
	movl	$1193, %edx                     # imm = 0x4A9
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.32, %ecx
	movl	%eax, %edi
	movl	$1194, %edx                     # imm = 0x4AA
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end173:
	.size	_Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end173-_Z26cuda_kernel_div_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_div_scalar_invIdEvPKT_PS0_S0_i,"axG",@progbits,_Z36__device_stub__kernel_div_scalar_invIdEvPKT_PS0_S0_i,comdat
	.weak	_Z36__device_stub__kernel_div_scalar_invIdEvPKT_PS0_S0_i # -- Begin function _Z36__device_stub__kernel_div_scalar_invIdEvPKT_PS0_S0_i
	.type	_Z36__device_stub__kernel_div_scalar_invIdEvPKT_PS0_S0_i,@function
_Z36__device_stub__kernel_div_scalar_invIdEvPKT_PS0_S0_i: # @_Z36__device_stub__kernel_div_scalar_invIdEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end174:
	.size	_Z36__device_stub__kernel_div_scalar_invIdEvPKT_PS0_S0_i, .Lfunc_end174-_Z36__device_stub__kernel_div_scalar_invIdEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB175_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %edx
	callq	_Z32__device_stub__kernel_pow_scalarIdEvPKT_PS0_S0_i
.LBB175_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.33, %ecx
	movl	%eax, %edi
	movl	$1204, %edx                     # imm = 0x4B4
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.34, %ecx
	movl	%eax, %edi
	movl	$1205, %edx                     # imm = 0x4B5
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end175:
	.size	_Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end175-_Z22cuda_kernel_pow_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_pow_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z32__device_stub__kernel_pow_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z32__device_stub__kernel_pow_scalarIdEvPKT_PS0_S0_i # -- Begin function _Z32__device_stub__kernel_pow_scalarIdEvPKT_PS0_S0_i
	.type	_Z32__device_stub__kernel_pow_scalarIdEvPKT_PS0_S0_i,@function
_Z32__device_stub__kernel_pow_scalarIdEvPKT_PS0_S0_i: # @_Z32__device_stub__kernel_pow_scalarIdEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end176:
	.size	_Z32__device_stub__kernel_pow_scalarIdEvPKT_PS0_S0_i, .Lfunc_end176-_Z32__device_stub__kernel_pow_scalarIdEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB177_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %edx
	callq	_Z36__device_stub__kernel_pow_scalar_invIdEvPKT_PS0_S0_i
.LBB177_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.35, %ecx
	movl	%eax, %edi
	movl	$1215, %edx                     # imm = 0x4BF
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.36, %ecx
	movl	%eax, %edi
	movl	$1216, %edx                     # imm = 0x4C0
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end177:
	.size	_Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end177-_Z26cuda_kernel_pow_scalar_invIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_pow_scalar_invIdEvPKT_PS0_S0_i,"axG",@progbits,_Z36__device_stub__kernel_pow_scalar_invIdEvPKT_PS0_S0_i,comdat
	.weak	_Z36__device_stub__kernel_pow_scalar_invIdEvPKT_PS0_S0_i # -- Begin function _Z36__device_stub__kernel_pow_scalar_invIdEvPKT_PS0_S0_i
	.type	_Z36__device_stub__kernel_pow_scalar_invIdEvPKT_PS0_S0_i,@function
_Z36__device_stub__kernel_pow_scalar_invIdEvPKT_PS0_S0_i: # @_Z36__device_stub__kernel_pow_scalar_invIdEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end178:
	.size	_Z36__device_stub__kernel_pow_scalar_invIdEvPKT_PS0_S0_i, .Lfunc_end178-_Z36__device_stub__kernel_pow_scalar_invIdEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB179_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z27__device_stub__kernel_equalIdEvPKT_S2_PS0_i
.LBB179_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.37, %ecx
	movl	%eax, %edi
	movl	$1281, %edx                     # imm = 0x501
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.38, %ecx
	movl	%eax, %edi
	movl	$1282, %edx                     # imm = 0x502
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end179:
	.size	_Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end179-_Z17cuda_kernel_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z27__device_stub__kernel_equalIdEvPKT_S2_PS0_i,"axG",@progbits,_Z27__device_stub__kernel_equalIdEvPKT_S2_PS0_i,comdat
	.weak	_Z27__device_stub__kernel_equalIdEvPKT_S2_PS0_i # -- Begin function _Z27__device_stub__kernel_equalIdEvPKT_S2_PS0_i
	.type	_Z27__device_stub__kernel_equalIdEvPKT_S2_PS0_i,@function
_Z27__device_stub__kernel_equalIdEvPKT_S2_PS0_i: # @_Z27__device_stub__kernel_equalIdEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12kernel_equalIdEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end180:
	.size	_Z27__device_stub__kernel_equalIdEvPKT_S2_PS0_i, .Lfunc_end180-_Z27__device_stub__kernel_equalIdEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB181_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z29__device_stub__kernel_greaterIdEvPKT_S2_PS0_i
.LBB181_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.39, %ecx
	movl	%eax, %edi
	movl	$1292, %edx                     # imm = 0x50C
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.40, %ecx
	movl	%eax, %edi
	movl	$1293, %edx                     # imm = 0x50D
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end181:
	.size	_Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end181-_Z19cuda_kernel_greaterIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__kernel_greaterIdEvPKT_S2_PS0_i,"axG",@progbits,_Z29__device_stub__kernel_greaterIdEvPKT_S2_PS0_i,comdat
	.weak	_Z29__device_stub__kernel_greaterIdEvPKT_S2_PS0_i # -- Begin function _Z29__device_stub__kernel_greaterIdEvPKT_S2_PS0_i
	.type	_Z29__device_stub__kernel_greaterIdEvPKT_S2_PS0_i,@function
_Z29__device_stub__kernel_greaterIdEvPKT_S2_PS0_i: # @_Z29__device_stub__kernel_greaterIdEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14kernel_greaterIdEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end182:
	.size	_Z29__device_stub__kernel_greaterIdEvPKT_S2_PS0_i, .Lfunc_end182-_Z29__device_stub__kernel_greaterIdEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB183_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z26__device_stub__kernel_lessIdEvPKT_S2_PS0_i
.LBB183_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.39, %ecx
	movl	%eax, %edi
	movl	$1303, %edx                     # imm = 0x517
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.40, %ecx
	movl	%eax, %edi
	movl	$1304, %edx                     # imm = 0x518
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end183:
	.size	_Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end183-_Z16cuda_kernel_lessIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_lessIdEvPKT_S2_PS0_i,"axG",@progbits,_Z26__device_stub__kernel_lessIdEvPKT_S2_PS0_i,comdat
	.weak	_Z26__device_stub__kernel_lessIdEvPKT_S2_PS0_i # -- Begin function _Z26__device_stub__kernel_lessIdEvPKT_S2_PS0_i
	.type	_Z26__device_stub__kernel_lessIdEvPKT_S2_PS0_i,@function
_Z26__device_stub__kernel_lessIdEvPKT_S2_PS0_i: # @_Z26__device_stub__kernel_lessIdEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_lessIdEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end184:
	.size	_Z26__device_stub__kernel_lessIdEvPKT_S2_PS0_i, .Lfunc_end184-_Z26__device_stub__kernel_lessIdEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB185_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z35__device_stub__kernel_greater_equalIdEvPKT_S2_PS0_i
.LBB185_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.41, %ecx
	movl	%eax, %edi
	movl	$1314, %edx                     # imm = 0x522
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.42, %ecx
	movl	%eax, %edi
	movl	$1315, %edx                     # imm = 0x523
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end185:
	.size	_Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end185-_Z25cuda_kernel_greater_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35__device_stub__kernel_greater_equalIdEvPKT_S2_PS0_i,"axG",@progbits,_Z35__device_stub__kernel_greater_equalIdEvPKT_S2_PS0_i,comdat
	.weak	_Z35__device_stub__kernel_greater_equalIdEvPKT_S2_PS0_i # -- Begin function _Z35__device_stub__kernel_greater_equalIdEvPKT_S2_PS0_i
	.type	_Z35__device_stub__kernel_greater_equalIdEvPKT_S2_PS0_i,@function
_Z35__device_stub__kernel_greater_equalIdEvPKT_S2_PS0_i: # @_Z35__device_stub__kernel_greater_equalIdEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20kernel_greater_equalIdEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end186:
	.size	_Z35__device_stub__kernel_greater_equalIdEvPKT_S2_PS0_i, .Lfunc_end186-_Z35__device_stub__kernel_greater_equalIdEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB187_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z32__device_stub__kernel_less_equalIdEvPKT_S2_PS0_i
.LBB187_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.43, %ecx
	movl	%eax, %edi
	movl	$1325, %edx                     # imm = 0x52D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.44, %ecx
	movl	%eax, %edi
	movl	$1326, %edx                     # imm = 0x52E
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end187:
	.size	_Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end187-_Z22cuda_kernel_less_equalIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_less_equalIdEvPKT_S2_PS0_i,"axG",@progbits,_Z32__device_stub__kernel_less_equalIdEvPKT_S2_PS0_i,comdat
	.weak	_Z32__device_stub__kernel_less_equalIdEvPKT_S2_PS0_i # -- Begin function _Z32__device_stub__kernel_less_equalIdEvPKT_S2_PS0_i
	.type	_Z32__device_stub__kernel_less_equalIdEvPKT_S2_PS0_i,@function
_Z32__device_stub__kernel_less_equalIdEvPKT_S2_PS0_i: # @_Z32__device_stub__kernel_less_equalIdEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_less_equalIdEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end188:
	.size	_Z32__device_stub__kernel_less_equalIdEvPKT_S2_PS0_i, .Lfunc_end188-_Z32__device_stub__kernel_less_equalIdEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB189_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %edx
	callq	_Z34__device_stub__kernel_equal_scalarIdEvPKT_PS0_S0_i
.LBB189_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.45, %ecx
	movl	%eax, %edi
	movl	$1336, %edx                     # imm = 0x538
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.46, %ecx
	movl	%eax, %edi
	movl	$1337, %edx                     # imm = 0x539
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end189:
	.size	_Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end189-_Z24cuda_kernel_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z34__device_stub__kernel_equal_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z34__device_stub__kernel_equal_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z34__device_stub__kernel_equal_scalarIdEvPKT_PS0_S0_i # -- Begin function _Z34__device_stub__kernel_equal_scalarIdEvPKT_PS0_S0_i
	.type	_Z34__device_stub__kernel_equal_scalarIdEvPKT_PS0_S0_i,@function
_Z34__device_stub__kernel_equal_scalarIdEvPKT_PS0_S0_i: # @_Z34__device_stub__kernel_equal_scalarIdEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end190:
	.size	_Z34__device_stub__kernel_equal_scalarIdEvPKT_PS0_S0_i, .Lfunc_end190-_Z34__device_stub__kernel_equal_scalarIdEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB191_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %edx
	callq	_Z36__device_stub__kernel_greater_scalarIdEvPKT_PS0_S0_i
.LBB191_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.47, %ecx
	movl	%eax, %edi
	movl	$1347, %edx                     # imm = 0x543
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.48, %ecx
	movl	%eax, %edi
	movl	$1348, %edx                     # imm = 0x544
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end191:
	.size	_Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end191-_Z26cuda_kernel_greater_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_greater_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z36__device_stub__kernel_greater_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z36__device_stub__kernel_greater_scalarIdEvPKT_PS0_S0_i # -- Begin function _Z36__device_stub__kernel_greater_scalarIdEvPKT_PS0_S0_i
	.type	_Z36__device_stub__kernel_greater_scalarIdEvPKT_PS0_S0_i,@function
_Z36__device_stub__kernel_greater_scalarIdEvPKT_PS0_S0_i: # @_Z36__device_stub__kernel_greater_scalarIdEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end192:
	.size	_Z36__device_stub__kernel_greater_scalarIdEvPKT_PS0_S0_i, .Lfunc_end192-_Z36__device_stub__kernel_greater_scalarIdEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB193_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %edx
	callq	_Z33__device_stub__kernel_less_scalarIdEvPKT_PS0_S0_i
.LBB193_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.49, %ecx
	movl	%eax, %edi
	movl	$1358, %edx                     # imm = 0x54E
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.50, %ecx
	movl	%eax, %edi
	movl	$1359, %edx                     # imm = 0x54F
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end193:
	.size	_Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end193-_Z23cuda_kernel_less_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z33__device_stub__kernel_less_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z33__device_stub__kernel_less_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z33__device_stub__kernel_less_scalarIdEvPKT_PS0_S0_i # -- Begin function _Z33__device_stub__kernel_less_scalarIdEvPKT_PS0_S0_i
	.type	_Z33__device_stub__kernel_less_scalarIdEvPKT_PS0_S0_i,@function
_Z33__device_stub__kernel_less_scalarIdEvPKT_PS0_S0_i: # @_Z33__device_stub__kernel_less_scalarIdEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18kernel_less_scalarIdEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end194:
	.size	_Z33__device_stub__kernel_less_scalarIdEvPKT_PS0_S0_i, .Lfunc_end194-_Z33__device_stub__kernel_less_scalarIdEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB195_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %edx
	callq	_Z42__device_stub__kernel_greater_equal_scalarIdEvPKT_PS0_S0_i
.LBB195_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.51, %ecx
	movl	%eax, %edi
	movl	$1369, %edx                     # imm = 0x559
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.52, %ecx
	movl	%eax, %edi
	movl	$1370, %edx                     # imm = 0x55A
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end195:
	.size	_Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end195-_Z32cuda_kernel_greater_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z42__device_stub__kernel_greater_equal_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z42__device_stub__kernel_greater_equal_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z42__device_stub__kernel_greater_equal_scalarIdEvPKT_PS0_S0_i # -- Begin function _Z42__device_stub__kernel_greater_equal_scalarIdEvPKT_PS0_S0_i
	.type	_Z42__device_stub__kernel_greater_equal_scalarIdEvPKT_PS0_S0_i,@function
_Z42__device_stub__kernel_greater_equal_scalarIdEvPKT_PS0_S0_i: # @_Z42__device_stub__kernel_greater_equal_scalarIdEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end196:
	.size	_Z42__device_stub__kernel_greater_equal_scalarIdEvPKT_PS0_S0_i, .Lfunc_end196-_Z42__device_stub__kernel_greater_equal_scalarIdEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB197_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %edx
	callq	_Z39__device_stub__kernel_less_equal_scalarIdEvPKT_PS0_S0_i
.LBB197_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.53, %ecx
	movl	%eax, %edi
	movl	$1380, %edx                     # imm = 0x564
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.54, %ecx
	movl	%eax, %edi
	movl	$1381, %edx                     # imm = 0x565
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end197:
	.size	_Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end197-_Z29cuda_kernel_less_equal_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z39__device_stub__kernel_less_equal_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z39__device_stub__kernel_less_equal_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z39__device_stub__kernel_less_equal_scalarIdEvPKT_PS0_S0_i # -- Begin function _Z39__device_stub__kernel_less_equal_scalarIdEvPKT_PS0_S0_i
	.type	_Z39__device_stub__kernel_less_equal_scalarIdEvPKT_PS0_S0_i,@function
_Z39__device_stub__kernel_less_equal_scalarIdEvPKT_PS0_S0_i: # @_Z39__device_stub__kernel_less_equal_scalarIdEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end198:
	.size	_Z39__device_stub__kernel_less_equal_scalarIdEvPKT_PS0_S0_i, .Lfunc_end198-_Z39__device_stub__kernel_less_equal_scalarIdEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB199_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z29__device_stub__kernel_replaceIdEvPKT_S2_PS0_i
.LBB199_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.55, %ecx
	movl	%eax, %edi
	movl	$1391, %edx                     # imm = 0x56F
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.56, %ecx
	movl	%eax, %edi
	movl	$1392, %edx                     # imm = 0x570
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end199:
	.size	_Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end199-_Z19cuda_kernel_replaceIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__kernel_replaceIdEvPKT_S2_PS0_i,"axG",@progbits,_Z29__device_stub__kernel_replaceIdEvPKT_S2_PS0_i,comdat
	.weak	_Z29__device_stub__kernel_replaceIdEvPKT_S2_PS0_i # -- Begin function _Z29__device_stub__kernel_replaceIdEvPKT_S2_PS0_i
	.type	_Z29__device_stub__kernel_replaceIdEvPKT_S2_PS0_i,@function
_Z29__device_stub__kernel_replaceIdEvPKT_S2_PS0_i: # @_Z29__device_stub__kernel_replaceIdEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14kernel_replaceIdEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end200:
	.size	_Z29__device_stub__kernel_replaceIdEvPKT_S2_PS0_i, .Lfunc_end200-_Z29__device_stub__kernel_replaceIdEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB201_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %edx
	callq	_Z36__device_stub__kernel_replace_scalarIdEvPKT_PS0_S0_i
.LBB201_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.55, %ecx
	movl	%eax, %edi
	movl	$1402, %edx                     # imm = 0x57A
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.56, %ecx
	movl	%eax, %edi
	movl	$1403, %edx                     # imm = 0x57B
	movl	$1, %r8d
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end201:
	.size	_Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end201-_Z26cuda_kernel_replace_scalarIdEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_replace_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z36__device_stub__kernel_replace_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z36__device_stub__kernel_replace_scalarIdEvPKT_PS0_S0_i # -- Begin function _Z36__device_stub__kernel_replace_scalarIdEvPKT_PS0_S0_i
	.type	_Z36__device_stub__kernel_replace_scalarIdEvPKT_PS0_S0_i,@function
_Z36__device_stub__kernel_replace_scalarIdEvPKT_PS0_S0_i: # @_Z36__device_stub__kernel_replace_scalarIdEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end202:
	.size	_Z36__device_stub__kernel_replace_scalarIdEvPKT_PS0_S0_i, .Lfunc_end202-_Z36__device_stub__kernel_replace_scalarIdEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB203_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z25__device_stub__kernel_sumIdEvPKT_PS0_i
.LBB203_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.57, %ecx
	movl	%eax, %edi
	movl	$1420, %edx                     # imm = 0x58C
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.58, %ecx
	movl	%eax, %edi
	movl	$1421, %edx                     # imm = 0x58D
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end203:
	.size	_Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end203-_Z15cuda_kernel_sumIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_sumIdEvPKT_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_sumIdEvPKT_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_sumIdEvPKT_PS0_i # -- Begin function _Z25__device_stub__kernel_sumIdEvPKT_PS0_i
	.type	_Z25__device_stub__kernel_sumIdEvPKT_PS0_i,@function
_Z25__device_stub__kernel_sumIdEvPKT_PS0_i: # @_Z25__device_stub__kernel_sumIdEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_sumIdEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end204:
	.size	_Z25__device_stub__kernel_sumIdEvPKT_PS0_i, .Lfunc_end204-_Z25__device_stub__kernel_sumIdEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB205_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z25__device_stub__kernel_minIdEvPKT_PS0_i
.LBB205_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.59, %ecx
	movl	%eax, %edi
	movl	$1431, %edx                     # imm = 0x597
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.60, %ecx
	movl	%eax, %edi
	movl	$1432, %edx                     # imm = 0x598
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end205:
	.size	_Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end205-_Z15cuda_kernel_minIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_minIdEvPKT_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_minIdEvPKT_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_minIdEvPKT_PS0_i # -- Begin function _Z25__device_stub__kernel_minIdEvPKT_PS0_i
	.type	_Z25__device_stub__kernel_minIdEvPKT_PS0_i,@function
_Z25__device_stub__kernel_minIdEvPKT_PS0_i: # @_Z25__device_stub__kernel_minIdEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_minIdEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end206:
	.size	_Z25__device_stub__kernel_minIdEvPKT_PS0_i, .Lfunc_end206-_Z25__device_stub__kernel_minIdEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB207_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z25__device_stub__kernel_maxIdEvPKT_PS0_i
.LBB207_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.61, %ecx
	movl	%eax, %edi
	movl	$1442, %edx                     # imm = 0x5A2
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.62, %ecx
	movl	%eax, %edi
	movl	$1443, %edx                     # imm = 0x5A3
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end207:
	.size	_Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end207-_Z15cuda_kernel_maxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_maxIdEvPKT_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_maxIdEvPKT_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_maxIdEvPKT_PS0_i # -- Begin function _Z25__device_stub__kernel_maxIdEvPKT_PS0_i
	.type	_Z25__device_stub__kernel_maxIdEvPKT_PS0_i,@function
_Z25__device_stub__kernel_maxIdEvPKT_PS0_i: # @_Z25__device_stub__kernel_maxIdEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_maxIdEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end208:
	.size	_Z25__device_stub__kernel_maxIdEvPKT_PS0_i, .Lfunc_end208-_Z25__device_stub__kernel_maxIdEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,"axG",@progbits,_Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,comdat
	.weak	_Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii # -- Begin function _Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.type	_Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,@function
_Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii: # @_Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 12(%rsp)                  # 4-byte Spill
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	104(%rsp), %ebx
	movl	96(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	88(%rsp), %r12d
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB209_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%r12d, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__kernel_pad_2dIdEvPKT_PS0_iiiiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB209_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.63, %ecx
	movl	%eax, %edi
	movl	$1460, %edx                     # imm = 0x5B4
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.64, %ecx
	movl	%eax, %edi
	movl	$1461, %edx                     # imm = 0x5B5
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end209:
	.size	_Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, .Lfunc_end209-_Z18cuda_kernel_pad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__kernel_pad_2dIdEvPKT_PS0_iiiiii,"axG",@progbits,_Z28__device_stub__kernel_pad_2dIdEvPKT_PS0_iiiiii,comdat
	.weak	_Z28__device_stub__kernel_pad_2dIdEvPKT_PS0_iiiiii # -- Begin function _Z28__device_stub__kernel_pad_2dIdEvPKT_PS0_iiiiii
	.type	_Z28__device_stub__kernel_pad_2dIdEvPKT_PS0_iiiiii,@function
_Z28__device_stub__kernel_pad_2dIdEvPKT_PS0_iiiiii: # @_Z28__device_stub__kernel_pad_2dIdEvPKT_PS0_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	200(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end210:
	.size	_Z28__device_stub__kernel_pad_2dIdEvPKT_PS0_iiiiii, .Lfunc_end210-_Z28__device_stub__kernel_pad_2dIdEvPKT_PS0_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,"axG",@progbits,_Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,comdat
	.weak	_Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii # -- Begin function _Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.type	_Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,@function
_Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii: # @_Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 12(%rsp)                  # 4-byte Spill
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	104(%rsp), %ebx
	movl	96(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	88(%rsp), %r12d
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB211_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%r12d, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z30__device_stub__kernel_unpad_2dIdEvPKT_PS0_iiiiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB211_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.65, %ecx
	movl	%eax, %edi
	movl	$1472, %edx                     # imm = 0x5C0
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.66, %ecx
	movl	%eax, %edi
	movl	$1473, %edx                     # imm = 0x5C1
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end211:
	.size	_Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, .Lfunc_end211-_Z20cuda_kernel_unpad_2dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z30__device_stub__kernel_unpad_2dIdEvPKT_PS0_iiiiii,"axG",@progbits,_Z30__device_stub__kernel_unpad_2dIdEvPKT_PS0_iiiiii,comdat
	.weak	_Z30__device_stub__kernel_unpad_2dIdEvPKT_PS0_iiiiii # -- Begin function _Z30__device_stub__kernel_unpad_2dIdEvPKT_PS0_iiiiii
	.type	_Z30__device_stub__kernel_unpad_2dIdEvPKT_PS0_iiiiii,@function
_Z30__device_stub__kernel_unpad_2dIdEvPKT_PS0_iiiiii: # @_Z30__device_stub__kernel_unpad_2dIdEvPKT_PS0_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	200(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end212:
	.size	_Z30__device_stub__kernel_unpad_2dIdEvPKT_PS0_iiiiii, .Lfunc_end212-_Z30__device_stub__kernel_unpad_2dIdEvPKT_PS0_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,"axG",@progbits,_Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,comdat
	.weak	_Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii # -- Begin function _Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.type	_Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,@function
_Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii: # @_Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 4(%rsp)                   # 4-byte Spill
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	144(%rsp), %ebx
	movl	136(%rsp), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	128(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	120(%rsp), %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	112(%rsp), %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	104(%rsp), %r12d
	movl	96(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB213_2
# %bb.1:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%r12d, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__kernel_pad_3dIdEvPKT_PS0_iiiiiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB213_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.67, %ecx
	movl	%eax, %edi
	movl	$1487, %edx                     # imm = 0x5CF
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.68, %ecx
	movl	%eax, %edi
	movl	$1488, %edx                     # imm = 0x5D0
	movl	$1, %r8d
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end213:
	.size	_Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, .Lfunc_end213-_Z18cuda_kernel_pad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__kernel_pad_3dIdEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z28__device_stub__kernel_pad_3dIdEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z28__device_stub__kernel_pad_3dIdEvPKT_PS0_iiiiiiiii # -- Begin function _Z28__device_stub__kernel_pad_3dIdEvPKT_PS0_iiiiiiiii
	.type	_Z28__device_stub__kernel_pad_3dIdEvPKT_PS0_iiiiiiiii,@function
_Z28__device_stub__kernel_pad_3dIdEvPKT_PS0_iiiiiiiii: # @_Z28__device_stub__kernel_pad_3dIdEvPKT_PS0_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end214:
	.size	_Z28__device_stub__kernel_pad_3dIdEvPKT_PS0_iiiiiiiii, .Lfunc_end214-_Z28__device_stub__kernel_pad_3dIdEvPKT_PS0_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,"axG",@progbits,_Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,comdat
	.weak	_Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii # -- Begin function _Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.type	_Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,@function
_Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii: # @_Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 4(%rsp)                   # 4-byte Spill
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	144(%rsp), %ebx
	movl	136(%rsp), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	128(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	120(%rsp), %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	112(%rsp), %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	104(%rsp), %r12d
	movl	96(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB215_2
# %bb.1:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%r12d, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z30__device_stub__kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB215_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.69, %ecx
	movl	%eax, %edi
	movl	$1499, %edx                     # imm = 0x5DB
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.70, %ecx
	movl	%eax, %edi
	movl	$1500, %edx                     # imm = 0x5DC
	movl	$1, %r8d
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end215:
	.size	_Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, .Lfunc_end215-_Z20cuda_kernel_unpad_3dIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z30__device_stub__kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z30__device_stub__kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z30__device_stub__kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii # -- Begin function _Z30__device_stub__kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii
	.type	_Z30__device_stub__kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii,@function
_Z30__device_stub__kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii: # @_Z30__device_stub__kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end216:
	.size	_Z30__device_stub__kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii, .Lfunc_end216-_Z30__device_stub__kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii,"axG",@progbits,_Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii,comdat
	.weak	_Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii # -- Begin function _Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii
	.type	_Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii,@function
_Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii: # @_Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	48(%rsp), %ebp
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB217_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	movl	%ebp, %r8d
	callq	_Z29__device_stub__kernel_grid_2dIdEvPT_S1_Pdii
.LBB217_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.71, %ecx
	movl	%eax, %edi
	movl	$1511, %edx                     # imm = 0x5E7
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.72, %ecx
	movl	%eax, %edi
	movl	$1512, %edx                     # imm = 0x5E8
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end217:
	.size	_Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii, .Lfunc_end217-_Z19cuda_kernel_grid_2dIdEvRSt6vectorIiSaIiEES3_PT_S5_Pdii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__kernel_grid_2dIdEvPT_S1_Pdii,"axG",@progbits,_Z29__device_stub__kernel_grid_2dIdEvPT_S1_Pdii,comdat
	.weak	_Z29__device_stub__kernel_grid_2dIdEvPT_S1_Pdii # -- Begin function _Z29__device_stub__kernel_grid_2dIdEvPT_S1_Pdii
	.type	_Z29__device_stub__kernel_grid_2dIdEvPT_S1_Pdii,@function
_Z29__device_stub__kernel_grid_2dIdEvPT_S1_Pdii: # @_Z29__device_stub__kernel_grid_2dIdEvPT_S1_Pdii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14kernel_grid_2dIdEvPT_S1_Pdii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end218:
	.size	_Z29__device_stub__kernel_grid_2dIdEvPT_S1_Pdii, .Lfunc_end218-_Z29__device_stub__kernel_grid_2dIdEvPT_S1_Pdii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii,"axG",@progbits,_Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii,comdat
	.weak	_Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii # -- Begin function _Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii
	.type	_Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii,@function
_Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii: # @_Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	96(%rsp), %ebx
	movl	88(%rsp), %ebp
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB219_2
# %bb.1:
	movl	%ebx, (%rsp)
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	callq	_Z29__device_stub__kernel_grid_3dIdEvPT_S1_S1_Pdiii
.LBB219_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.73, %ecx
	movl	%eax, %edi
	movl	$1523, %edx                     # imm = 0x5F3
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.74, %ecx
	movl	%eax, %edi
	movl	$1524, %edx                     # imm = 0x5F4
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end219:
	.size	_Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii, .Lfunc_end219-_Z19cuda_kernel_grid_3dIdEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__kernel_grid_3dIdEvPT_S1_S1_Pdiii,"axG",@progbits,_Z29__device_stub__kernel_grid_3dIdEvPT_S1_S1_Pdiii,comdat
	.weak	_Z29__device_stub__kernel_grid_3dIdEvPT_S1_S1_Pdiii # -- Begin function _Z29__device_stub__kernel_grid_3dIdEvPT_S1_S1_Pdiii
	.type	_Z29__device_stub__kernel_grid_3dIdEvPT_S1_S1_Pdiii,@function
_Z29__device_stub__kernel_grid_3dIdEvPT_S1_S1_Pdiii: # @_Z29__device_stub__kernel_grid_3dIdEvPT_S1_S1_Pdiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end220:
	.size	_Z29__device_stub__kernel_grid_3dIdEvPT_S1_S1_Pdiii, .Lfunc_end220-_Z29__device_stub__kernel_grid_3dIdEvPT_S1_S1_Pdiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i,"axG",@progbits,_Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i,comdat
	.weak	_Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i # -- Begin function _Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i
	.type	_Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i,@function
_Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i: # @_Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	72(%rsp), %ebp
	movq	64(%rsp), %r13
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB221_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	movq	%r13, %r8
	movl	%ebp, %r9d
	callq	_Z31__device_stub__kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i
.LBB221_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.75, %ecx
	movl	%eax, %edi
	movl	$1539, %edx                     # imm = 0x603
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.76, %ecx
	movl	%eax, %edi
	movl	$1540, %edx                     # imm = 0x604
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end221:
	.size	_Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i, .Lfunc_end221-_Z21cuda_kernel_affine_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i,"axG",@progbits,_Z31__device_stub__kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i,comdat
	.weak	_Z31__device_stub__kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i # -- Begin function _Z31__device_stub__kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i
	.type	_Z31__device_stub__kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i,@function
_Z31__device_stub__kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i: # @_Z31__device_stub__kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end222:
	.size	_Z31__device_stub__kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i, .Lfunc_end222-_Z31__device_stub__kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i,"axG",@progbits,_Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i,comdat
	.weak	_Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i # -- Begin function _Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i
	.type	_Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i,@function
_Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i: # @_Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	104(%rsp), %ebx
	movq	96(%rsp), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	88(%rsp), %r13
	movq	80(%rsp), %rbp
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB223_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%rbp, %r8
	movq	%r13, %r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z31__device_stub__kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB223_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.77, %ecx
	movl	%eax, %edi
	movl	$1552, %edx                     # imm = 0x610
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.78, %ecx
	movl	%eax, %edi
	movl	$1553, %edx                     # imm = 0x611
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end223:
	.size	_Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i, .Lfunc_end223-_Z21cuda_kernel_affine_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i,"axG",@progbits,_Z31__device_stub__kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i,comdat
	.weak	_Z31__device_stub__kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i # -- Begin function _Z31__device_stub__kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i
	.type	_Z31__device_stub__kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i,@function
_Z31__device_stub__kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i: # @_Z31__device_stub__kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end224:
	.size	_Z31__device_stub__kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i, .Lfunc_end224-_Z31__device_stub__kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi,"axG",@progbits,_Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi,comdat
	.weak	_Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi # -- Begin function _Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi
	.type	_Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi,@function
_Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi: # @_Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	72(%rsp), %ebp
	movq	64(%rsp), %r13
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB225_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	movq	%r13, %r8
	movl	%ebp, %r9d
	callq	_Z35__device_stub__kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi
.LBB225_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.79, %ecx
	movl	%eax, %edi
	movl	$1565, %edx                     # imm = 0x61D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.80, %ecx
	movl	%eax, %edi
	movl	$1566, %edx                     # imm = 0x61E
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end225:
	.size	_Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi, .Lfunc_end225-_Z25cuda_kernel_affine_sod_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35__device_stub__kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi,"axG",@progbits,_Z35__device_stub__kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi,comdat
	.weak	_Z35__device_stub__kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi # -- Begin function _Z35__device_stub__kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi
	.type	_Z35__device_stub__kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi,@function
_Z35__device_stub__kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi: # @_Z35__device_stub__kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end226:
	.size	_Z35__device_stub__kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi, .Lfunc_end226-_Z35__device_stub__kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi,"axG",@progbits,_Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi,comdat
	.weak	_Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi # -- Begin function _Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi
	.type	_Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi,@function
_Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi: # @_Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	104(%rsp), %ebx
	movq	96(%rsp), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	88(%rsp), %r13
	movq	80(%rsp), %rbp
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB227_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%rbp, %r8
	movq	%r13, %r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z35__device_stub__kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB227_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.81, %ecx
	movl	%eax, %edi
	movl	$1578, %edx                     # imm = 0x62A
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.82, %ecx
	movl	%eax, %edi
	movl	$1579, %edx                     # imm = 0x62B
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end227:
	.size	_Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi, .Lfunc_end227-_Z25cuda_kernel_affine_sod_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35__device_stub__kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi,"axG",@progbits,_Z35__device_stub__kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi,comdat
	.weak	_Z35__device_stub__kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi # -- Begin function _Z35__device_stub__kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi
	.type	_Z35__device_stub__kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi,@function
_Z35__device_stub__kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi: # @_Z35__device_stub__kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end228:
	.size	_Z35__device_stub__kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi, .Lfunc_end228-_Z35__device_stub__kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i,"axG",@progbits,_Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i,comdat
	.weak	_Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i # -- Begin function _Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i
	.type	_Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i,@function
_Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i: # @_Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r13
	movl	96(%rsp), %ebx
	movq	88(%rsp), %r12
	movq	80(%rsp), %rbp
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB229_2
# %bb.1:
	movl	%ebx, (%rsp)
	movq	%r13, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%rbp, %r8
	movq	%r12, %r9
	callq	_Z31__device_stub__kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i
.LBB229_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.83, %ecx
	movl	%eax, %edi
	movl	$1591, %edx                     # imm = 0x637
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.84, %ecx
	movl	%eax, %edi
	movl	$1592, %edx                     # imm = 0x638
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end229:
	.size	_Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i, .Lfunc_end229-_Z21cuda_kernel_dfield_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i,"axG",@progbits,_Z31__device_stub__kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i,comdat
	.weak	_Z31__device_stub__kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i # -- Begin function _Z31__device_stub__kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i
	.type	_Z31__device_stub__kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i,@function
_Z31__device_stub__kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i: # @_Z31__device_stub__kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end230:
	.size	_Z31__device_stub__kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i, .Lfunc_end230-_Z31__device_stub__kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i,"axG",@progbits,_Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i,comdat
	.weak	_Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i # -- Begin function _Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i
	.type	_Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i,@function
_Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i: # @_Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	136(%rsp), %ebx
	movq	128(%rsp), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	120(%rsp), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	112(%rsp), %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	104(%rsp), %r13
	movq	96(%rsp), %rbp
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB231_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movq	%rbp, %r8
	movq	%r13, %r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z31__device_stub__kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB231_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.85, %ecx
	movl	%eax, %edi
	movl	$1605, %edx                     # imm = 0x645
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.86, %ecx
	movl	%eax, %edi
	movl	$1606, %edx                     # imm = 0x646
	movl	$1, %r8d
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end231:
	.size	_Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i, .Lfunc_end231-_Z21cuda_kernel_dfield_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,"axG",@progbits,_Z31__device_stub__kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,comdat
	.weak	_Z31__device_stub__kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i # -- Begin function _Z31__device_stub__kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.type	_Z31__device_stub__kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,@function
_Z31__device_stub__kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i: # @_Z31__device_stub__kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end232:
	.size	_Z31__device_stub__kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, .Lfunc_end232-_Z31__device_stub__kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,"axG",@progbits,_Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,comdat
	.weak	_Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii # -- Begin function _Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.type	_Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,@function
_Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii: # @_Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	104(%rsp), %ebx
	movl	96(%rsp), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	88(%rsp), %ebp
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB233_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z46__device_stub__kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB233_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.87, %ecx
	movl	%eax, %edi
	movl	$1619, %edx                     # imm = 0x653
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.88, %ecx
	movl	%eax, %edi
	movl	$1620, %edx                     # imm = 0x654
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end233:
	.size	_Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, .Lfunc_end233-_Z36cuda_kernel_nearest_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z46__device_stub__kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z46__device_stub__kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z46__device_stub__kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii # -- Begin function _Z46__device_stub__kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.type	_Z46__device_stub__kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,@function
_Z46__device_stub__kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii: # @_Z46__device_stub__kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end234:
	.size	_Z46__device_stub__kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, .Lfunc_end234-_Z46__device_stub__kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,"axG",@progbits,_Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,comdat
	.weak	_Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii # -- Begin function _Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.type	_Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,@function
_Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii: # @_Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 8(%rsp)                    # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	144(%rsp), %ebx
	movl	136(%rsp), %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	movl	128(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	120(%rsp), %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	112(%rsp), %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	104(%rsp), %ebp
	movq	96(%rsp), %r13
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB235_2
# %bb.1:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%r13, %r8
	movl	%ebp, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z46__device_stub__kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB235_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.89, %ecx
	movl	%eax, %edi
	movl	$1633, %edx                     # imm = 0x661
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.90, %ecx
	movl	%eax, %edi
	movl	$1634, %edx                     # imm = 0x662
	movl	$1, %r8d
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end235:
	.size	_Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii, .Lfunc_end235-_Z36cuda_kernel_nearest_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z46__device_stub__kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z46__device_stub__kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.weak	_Z46__device_stub__kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii # -- Begin function _Z46__device_stub__kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.type	_Z46__device_stub__kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,@function
_Z46__device_stub__kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii: # @_Z46__device_stub__kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end236:
	.size	_Z46__device_stub__kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, .Lfunc_end236-_Z46__device_stub__kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,"axG",@progbits,_Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,comdat
	.weak	_Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii # -- Begin function _Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.type	_Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,@function
_Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii: # @_Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	104(%rsp), %ebx
	movl	96(%rsp), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	88(%rsp), %ebp
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB237_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z45__device_stub__kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB237_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.91, %ecx
	movl	%eax, %edi
	movl	$1647, %edx                     # imm = 0x66F
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.92, %ecx
	movl	%eax, %edi
	movl	$1648, %edx                     # imm = 0x670
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end237:
	.size	_Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, .Lfunc_end237-_Z35cuda_kernel_linear_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z45__device_stub__kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z45__device_stub__kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z45__device_stub__kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii # -- Begin function _Z45__device_stub__kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.type	_Z45__device_stub__kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,@function
_Z45__device_stub__kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii: # @_Z45__device_stub__kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end238:
	.size	_Z45__device_stub__kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, .Lfunc_end238-_Z45__device_stub__kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,"axG",@progbits,_Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,comdat
	.weak	_Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii # -- Begin function _Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.type	_Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,@function
_Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii: # @_Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 8(%rsp)                    # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	144(%rsp), %ebx
	movl	136(%rsp), %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	movl	128(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	120(%rsp), %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	112(%rsp), %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	104(%rsp), %ebp
	movq	96(%rsp), %r13
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB239_2
# %bb.1:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%r13, %r8
	movl	%ebp, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z45__device_stub__kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB239_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.93, %ecx
	movl	%eax, %edi
	movl	$1661, %edx                     # imm = 0x67D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.94, %ecx
	movl	%eax, %edi
	movl	$1662, %edx                     # imm = 0x67E
	movl	$1, %r8d
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end239:
	.size	_Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii, .Lfunc_end239-_Z35cuda_kernel_linear_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z45__device_stub__kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z45__device_stub__kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.weak	_Z45__device_stub__kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii # -- Begin function _Z45__device_stub__kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.type	_Z45__device_stub__kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,@function
_Z45__device_stub__kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii: # @_Z45__device_stub__kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end240:
	.size	_Z45__device_stub__kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, .Lfunc_end240-_Z45__device_stub__kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,"axG",@progbits,_Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,comdat
	.weak	_Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii # -- Begin function _Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.type	_Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii,@function
_Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii: # @_Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	104(%rsp), %ebx
	movl	96(%rsp), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	88(%rsp), %ebp
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB241_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z44__device_stub__kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB241_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.95, %ecx
	movl	%eax, %edi
	movl	$1675, %edx                     # imm = 0x68B
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.96, %ecx
	movl	%eax, %edi
	movl	$1676, %edx                     # imm = 0x68C
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end241:
	.size	_Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii, .Lfunc_end241-_Z34cuda_kernel_cubic_interpolation_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z44__device_stub__kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z44__device_stub__kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z44__device_stub__kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii # -- Begin function _Z44__device_stub__kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.type	_Z44__device_stub__kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,@function
_Z44__device_stub__kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii: # @_Z44__device_stub__kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end242:
	.size	_Z44__device_stub__kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, .Lfunc_end242-_Z44__device_stub__kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,"axG",@progbits,_Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,comdat
	.weak	_Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii # -- Begin function _Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.type	_Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii,@function
_Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii: # @_Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 8(%rsp)                    # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	144(%rsp), %ebx
	movl	136(%rsp), %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	movl	128(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	120(%rsp), %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	112(%rsp), %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	104(%rsp), %ebp
	movq	96(%rsp), %r13
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB243_2
# %bb.1:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%r13, %r8
	movl	%ebp, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z44__device_stub__kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB243_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.107, %ecx
	movl	%eax, %edi
	movl	$1689, %edx                     # imm = 0x699
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.108, %ecx
	movl	%eax, %edi
	movl	$1690, %edx                     # imm = 0x69A
	movl	$1, %r8d
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end243:
	.size	_Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii, .Lfunc_end243-_Z34cuda_kernel_cubic_interpolation_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z44__device_stub__kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z44__device_stub__kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.weak	_Z44__device_stub__kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii # -- Begin function _Z44__device_stub__kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.type	_Z44__device_stub__kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,@function
_Z44__device_stub__kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii: # @_Z44__device_stub__kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end244:
	.size	_Z44__device_stub__kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, .Lfunc_end244-_Z44__device_stub__kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii # -- Begin function _Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,@function
_Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii: # @_Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rsi), %rax
	movl	8(%rax), %ecx
	movq	(%rdi), %rdx
	testl	%ecx, %ecx
	je	.LBB245_1
# %bb.2:
	movl	8(%rdx), %esi
	jmp	.LBB245_3
.LBB245_1:
	movl	$1, %ecx
	movl	$1, %esi
.LBB245_3:
	movl	48(%rsp), %r12d
	movq	(%rdx), %rdi
	movq	(%rax), %rdx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB245_5
# %bb.4:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	movl	%r12d, %r8d
	callq	_Z31__device_stub__kernel_gradientxIdEvPKT_PS0_iii
.LBB245_5:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.97, %ecx
	movl	%eax, %edi
	movl	$1712, %edx                     # imm = 0x6B0
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.98, %ecx
	movl	%eax, %edi
	movl	$1713, %edx                     # imm = 0x6B1
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end245:
	.size	_Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .Lfunc_end245-_Z21cuda_kernel_gradientxIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_gradientxIdEvPKT_PS0_iii,"axG",@progbits,_Z31__device_stub__kernel_gradientxIdEvPKT_PS0_iii,comdat
	.weak	_Z31__device_stub__kernel_gradientxIdEvPKT_PS0_iii # -- Begin function _Z31__device_stub__kernel_gradientxIdEvPKT_PS0_iii
	.type	_Z31__device_stub__kernel_gradientxIdEvPKT_PS0_iii,@function
_Z31__device_stub__kernel_gradientxIdEvPKT_PS0_iii: # @_Z31__device_stub__kernel_gradientxIdEvPKT_PS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_gradientxIdEvPKT_PS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end246:
	.size	_Z31__device_stub__kernel_gradientxIdEvPKT_PS0_iii, .Lfunc_end246-_Z31__device_stub__kernel_gradientxIdEvPKT_PS0_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii # -- Begin function _Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,@function
_Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii: # @_Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rsi), %rax
	movl	8(%rax), %ecx
	movq	(%rdi), %rdx
	testl	%ecx, %ecx
	je	.LBB247_1
# %bb.2:
	movl	8(%rdx), %esi
	jmp	.LBB247_3
.LBB247_1:
	movl	$1, %ecx
	movl	$1, %esi
.LBB247_3:
	movl	48(%rsp), %r12d
	movq	(%rdx), %rdi
	movq	(%rax), %rdx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB247_5
# %bb.4:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	movl	%r12d, %r8d
	callq	_Z31__device_stub__kernel_gradientyIdEvPKT_PS0_iii
.LBB247_5:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.99, %ecx
	movl	%eax, %edi
	movl	$1734, %edx                     # imm = 0x6C6
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.100, %ecx
	movl	%eax, %edi
	movl	$1735, %edx                     # imm = 0x6C7
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end247:
	.size	_Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .Lfunc_end247-_Z21cuda_kernel_gradientyIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_gradientyIdEvPKT_PS0_iii,"axG",@progbits,_Z31__device_stub__kernel_gradientyIdEvPKT_PS0_iii,comdat
	.weak	_Z31__device_stub__kernel_gradientyIdEvPKT_PS0_iii # -- Begin function _Z31__device_stub__kernel_gradientyIdEvPKT_PS0_iii
	.type	_Z31__device_stub__kernel_gradientyIdEvPKT_PS0_iii,@function
_Z31__device_stub__kernel_gradientyIdEvPKT_PS0_iii: # @_Z31__device_stub__kernel_gradientyIdEvPKT_PS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_gradientyIdEvPKT_PS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end248:
	.size	_Z31__device_stub__kernel_gradientyIdEvPKT_PS0_iii, .Lfunc_end248-_Z31__device_stub__kernel_gradientyIdEvPKT_PS0_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii # -- Begin function _Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,@function
_Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii: # @_Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r12
	movl	48(%rsp), %r15d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB249_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	movl	%r15d, %r8d
	callq	_Z31__device_stub__kernel_gradientzIdEvPKT_PS0_iii
.LBB249_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.101, %ecx
	movl	%eax, %edi
	movl	$1746, %edx                     # imm = 0x6D2
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.102, %ecx
	movl	%eax, %edi
	movl	$1747, %edx                     # imm = 0x6D3
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end249:
	.size	_Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .Lfunc_end249-_Z21cuda_kernel_gradientzIdEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_gradientzIdEvPKT_PS0_iii,"axG",@progbits,_Z31__device_stub__kernel_gradientzIdEvPKT_PS0_iii,comdat
	.weak	_Z31__device_stub__kernel_gradientzIdEvPKT_PS0_iii # -- Begin function _Z31__device_stub__kernel_gradientzIdEvPKT_PS0_iii
	.type	_Z31__device_stub__kernel_gradientzIdEvPKT_PS0_iii,@function
_Z31__device_stub__kernel_gradientzIdEvPKT_PS0_iii: # @_Z31__device_stub__kernel_gradientzIdEvPKT_PS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_gradientzIdEvPKT_PS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end250:
	.size	_Z31__device_stub__kernel_gradientzIdEvPKT_PS0_iii, .Lfunc_end250-_Z31__device_stub__kernel_gradientzIdEvPKT_PS0_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii,"axG",@progbits,_Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii,comdat
	.weak	_Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii # -- Begin function _Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii
	.type	_Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii,@function
_Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii: # @_Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 20(%rsp)                  # 4-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	96(%rsp), %ebx
	movl	88(%rsp), %ebp
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB251_2
# %bb.1:
	movl	%ebx, (%rsp)
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	20(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	callq	_Z36__device_stub__kernel_convolution_2dIdEvPKT_S2_PS0_iiii
.LBB251_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.103, %ecx
	movl	%eax, %edi
	movl	$1758, %edx                     # imm = 0x6DE
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.104, %ecx
	movl	%eax, %edi
	movl	$1759, %edx                     # imm = 0x6DF
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end251:
	.size	_Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii, .Lfunc_end251-_Z26cuda_kernel_convolution_2dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_convolution_2dIdEvPKT_S2_PS0_iiii,"axG",@progbits,_Z36__device_stub__kernel_convolution_2dIdEvPKT_S2_PS0_iiii,comdat
	.weak	_Z36__device_stub__kernel_convolution_2dIdEvPKT_S2_PS0_iiii # -- Begin function _Z36__device_stub__kernel_convolution_2dIdEvPKT_S2_PS0_iiii
	.type	_Z36__device_stub__kernel_convolution_2dIdEvPKT_S2_PS0_iiii,@function
_Z36__device_stub__kernel_convolution_2dIdEvPKT_S2_PS0_iiii: # @_Z36__device_stub__kernel_convolution_2dIdEvPKT_S2_PS0_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end252:
	.size	_Z36__device_stub__kernel_convolution_2dIdEvPKT_S2_PS0_iiii, .Lfunc_end252-_Z36__device_stub__kernel_convolution_2dIdEvPKT_S2_PS0_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii,"axG",@progbits,_Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii,comdat
	.weak	_Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii # -- Begin function _Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii
	.type	_Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii,@function
_Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii: # @_Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 4(%rsp)                   # 4-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	112(%rsp), %ebx
	movl	104(%rsp), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	96(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	88(%rsp), %ebp
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB253_2
# %bb.1:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z36__device_stub__kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB253_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.105, %ecx
	movl	%eax, %edi
	movl	$1770, %edx                     # imm = 0x6EA
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.106, %ecx
	movl	%eax, %edi
	movl	$1771, %edx                     # imm = 0x6EB
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end253:
	.size	_Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii, .Lfunc_end253-_Z26cuda_kernel_convolution_3dIdEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii,"axG",@progbits,_Z36__device_stub__kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii,comdat
	.weak	_Z36__device_stub__kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii # -- Begin function _Z36__device_stub__kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii
	.type	_Z36__device_stub__kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii,@function
_Z36__device_stub__kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii: # @_Z36__device_stub__kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end254:
	.size	_Z36__device_stub__kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii, .Lfunc_end254-_Z36__device_stub__kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i # -- Begin function _Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i,@function
_Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i: # @_Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebx
	movl	%ecx, %ebp
	movq	%rdx, %r14
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB255_2
# %bb.1:
	movq	%r14, %rdi
	movl	%ebp, %esi
	movl	%ebx, %edx
	callq	_Z28__device_stub__kernel_assignIiEvPT_S0_i
.LBB255_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.7, %ecx
	movl	%eax, %edi
	movl	$1101, %edx                     # imm = 0x44D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.8, %ecx
	movl	%eax, %edi
	movl	$1102, %edx                     # imm = 0x44E
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end255:
	.size	_Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i, .Lfunc_end255-_Z18cuda_kernel_assignIiEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__kernel_assignIiEvPT_S0_i,"axG",@progbits,_Z28__device_stub__kernel_assignIiEvPT_S0_i,comdat
	.weak	_Z28__device_stub__kernel_assignIiEvPT_S0_i # -- Begin function _Z28__device_stub__kernel_assignIiEvPT_S0_i
	.type	_Z28__device_stub__kernel_assignIiEvPT_S0_i,@function
_Z28__device_stub__kernel_assignIiEvPT_S0_i: # @_Z28__device_stub__kernel_assignIiEvPT_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13kernel_assignIiEvPT_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end256:
	.size	_Z28__device_stub__kernel_assignIiEvPT_S0_i, .Lfunc_end256-_Z28__device_stub__kernel_assignIiEvPT_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB257_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_copyIiEvPKT_PS0_i
.LBB257_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.9, %ecx
	movl	%eax, %edi
	movl	$1113, %edx                     # imm = 0x459
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.10, %ecx
	movl	%eax, %edi
	movl	$1114, %edx                     # imm = 0x45A
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end257:
	.size	_Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end257-_Z16cuda_kernel_copyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_copyIiEvPKT_PS0_i,"axG",@progbits,_Z26__device_stub__kernel_copyIiEvPKT_PS0_i,comdat
	.weak	_Z26__device_stub__kernel_copyIiEvPKT_PS0_i # -- Begin function _Z26__device_stub__kernel_copyIiEvPKT_PS0_i
	.type	_Z26__device_stub__kernel_copyIiEvPKT_PS0_i,@function
_Z26__device_stub__kernel_copyIiEvPKT_PS0_i: # @_Z26__device_stub__kernel_copyIiEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_copyIiEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end258:
	.size	_Z26__device_stub__kernel_copyIiEvPKT_PS0_i, .Lfunc_end258-_Z26__device_stub__kernel_copyIiEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB259_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__kernel_addIiEvPKT_S2_PS0_i
.LBB259_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.11, %ecx
	movl	%eax, %edi
	movl	$1226, %edx                     # imm = 0x4CA
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.12, %ecx
	movl	%eax, %edi
	movl	$1227, %edx                     # imm = 0x4CB
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end259:
	.size	_Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end259-_Z15cuda_kernel_addIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_addIiEvPKT_S2_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_addIiEvPKT_S2_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_addIiEvPKT_S2_PS0_i # -- Begin function _Z25__device_stub__kernel_addIiEvPKT_S2_PS0_i
	.type	_Z25__device_stub__kernel_addIiEvPKT_S2_PS0_i,@function
_Z25__device_stub__kernel_addIiEvPKT_S2_PS0_i: # @_Z25__device_stub__kernel_addIiEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_addIiEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end260:
	.size	_Z25__device_stub__kernel_addIiEvPKT_S2_PS0_i, .Lfunc_end260-_Z25__device_stub__kernel_addIiEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB261_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__kernel_subIiEvPKT_S2_PS0_i
.LBB261_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.13, %ecx
	movl	%eax, %edi
	movl	$1237, %edx                     # imm = 0x4D5
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.14, %ecx
	movl	%eax, %edi
	movl	$1238, %edx                     # imm = 0x4D6
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end261:
	.size	_Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end261-_Z15cuda_kernel_subIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_subIiEvPKT_S2_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_subIiEvPKT_S2_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_subIiEvPKT_S2_PS0_i # -- Begin function _Z25__device_stub__kernel_subIiEvPKT_S2_PS0_i
	.type	_Z25__device_stub__kernel_subIiEvPKT_S2_PS0_i,@function
_Z25__device_stub__kernel_subIiEvPKT_S2_PS0_i: # @_Z25__device_stub__kernel_subIiEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_subIiEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end262:
	.size	_Z25__device_stub__kernel_subIiEvPKT_S2_PS0_i, .Lfunc_end262-_Z25__device_stub__kernel_subIiEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB263_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__kernel_mulIiEvPKT_S2_PS0_i
.LBB263_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.15, %ecx
	movl	%eax, %edi
	movl	$1248, %edx                     # imm = 0x4E0
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.16, %ecx
	movl	%eax, %edi
	movl	$1249, %edx                     # imm = 0x4E1
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end263:
	.size	_Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end263-_Z15cuda_kernel_mulIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_mulIiEvPKT_S2_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_mulIiEvPKT_S2_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_mulIiEvPKT_S2_PS0_i # -- Begin function _Z25__device_stub__kernel_mulIiEvPKT_S2_PS0_i
	.type	_Z25__device_stub__kernel_mulIiEvPKT_S2_PS0_i,@function
_Z25__device_stub__kernel_mulIiEvPKT_S2_PS0_i: # @_Z25__device_stub__kernel_mulIiEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_mulIiEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end264:
	.size	_Z25__device_stub__kernel_mulIiEvPKT_S2_PS0_i, .Lfunc_end264-_Z25__device_stub__kernel_mulIiEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB265_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__kernel_divIiEvPKT_S2_PS0_i
.LBB265_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.17, %ecx
	movl	%eax, %edi
	movl	$1259, %edx                     # imm = 0x4EB
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.18, %ecx
	movl	%eax, %edi
	movl	$1260, %edx                     # imm = 0x4EC
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end265:
	.size	_Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end265-_Z15cuda_kernel_divIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_divIiEvPKT_S2_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_divIiEvPKT_S2_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_divIiEvPKT_S2_PS0_i # -- Begin function _Z25__device_stub__kernel_divIiEvPKT_S2_PS0_i
	.type	_Z25__device_stub__kernel_divIiEvPKT_S2_PS0_i,@function
_Z25__device_stub__kernel_divIiEvPKT_S2_PS0_i: # @_Z25__device_stub__kernel_divIiEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_divIiEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end266:
	.size	_Z25__device_stub__kernel_divIiEvPKT_S2_PS0_i, .Lfunc_end266-_Z25__device_stub__kernel_divIiEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB267_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__kernel_powIiEvPKT_S2_PS0_i
.LBB267_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.19, %ecx
	movl	%eax, %edi
	movl	$1270, %edx                     # imm = 0x4F6
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.20, %ecx
	movl	%eax, %edi
	movl	$1271, %edx                     # imm = 0x4F7
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end267:
	.size	_Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end267-_Z15cuda_kernel_powIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_powIiEvPKT_S2_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_powIiEvPKT_S2_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_powIiEvPKT_S2_PS0_i # -- Begin function _Z25__device_stub__kernel_powIiEvPKT_S2_PS0_i
	.type	_Z25__device_stub__kernel_powIiEvPKT_S2_PS0_i,@function
_Z25__device_stub__kernel_powIiEvPKT_S2_PS0_i: # @_Z25__device_stub__kernel_powIiEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_powIiEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end268:
	.size	_Z25__device_stub__kernel_powIiEvPKT_S2_PS0_i, .Lfunc_end268-_Z25__device_stub__kernel_powIiEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB269_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z32__device_stub__kernel_add_scalarIiEvPKT_PS0_S0_i
.LBB269_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.21, %ecx
	movl	%eax, %edi
	movl	$1138, %edx                     # imm = 0x472
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.22, %ecx
	movl	%eax, %edi
	movl	$1139, %edx                     # imm = 0x473
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end269:
	.size	_Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end269-_Z22cuda_kernel_add_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_add_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z32__device_stub__kernel_add_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z32__device_stub__kernel_add_scalarIiEvPKT_PS0_S0_i # -- Begin function _Z32__device_stub__kernel_add_scalarIiEvPKT_PS0_S0_i
	.type	_Z32__device_stub__kernel_add_scalarIiEvPKT_PS0_S0_i,@function
_Z32__device_stub__kernel_add_scalarIiEvPKT_PS0_S0_i: # @_Z32__device_stub__kernel_add_scalarIiEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_add_scalarIiEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end270:
	.size	_Z32__device_stub__kernel_add_scalarIiEvPKT_PS0_S0_i, .Lfunc_end270-_Z32__device_stub__kernel_add_scalarIiEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB271_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z32__device_stub__kernel_sub_scalarIiEvPKT_PS0_S0_i
.LBB271_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.23, %ecx
	movl	%eax, %edi
	movl	$1149, %edx                     # imm = 0x47D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.24, %ecx
	movl	%eax, %edi
	movl	$1150, %edx                     # imm = 0x47E
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end271:
	.size	_Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end271-_Z22cuda_kernel_sub_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_sub_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z32__device_stub__kernel_sub_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z32__device_stub__kernel_sub_scalarIiEvPKT_PS0_S0_i # -- Begin function _Z32__device_stub__kernel_sub_scalarIiEvPKT_PS0_S0_i
	.type	_Z32__device_stub__kernel_sub_scalarIiEvPKT_PS0_S0_i,@function
_Z32__device_stub__kernel_sub_scalarIiEvPKT_PS0_S0_i: # @_Z32__device_stub__kernel_sub_scalarIiEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end272:
	.size	_Z32__device_stub__kernel_sub_scalarIiEvPKT_PS0_S0_i, .Lfunc_end272-_Z32__device_stub__kernel_sub_scalarIiEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB273_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z36__device_stub__kernel_sub_scalar_invIiEvPKT_PS0_S0_i
.LBB273_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.25, %ecx
	movl	%eax, %edi
	movl	$1160, %edx                     # imm = 0x488
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.26, %ecx
	movl	%eax, %edi
	movl	$1161, %edx                     # imm = 0x489
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end273:
	.size	_Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end273-_Z26cuda_kernel_sub_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_sub_scalar_invIiEvPKT_PS0_S0_i,"axG",@progbits,_Z36__device_stub__kernel_sub_scalar_invIiEvPKT_PS0_S0_i,comdat
	.weak	_Z36__device_stub__kernel_sub_scalar_invIiEvPKT_PS0_S0_i # -- Begin function _Z36__device_stub__kernel_sub_scalar_invIiEvPKT_PS0_S0_i
	.type	_Z36__device_stub__kernel_sub_scalar_invIiEvPKT_PS0_S0_i,@function
_Z36__device_stub__kernel_sub_scalar_invIiEvPKT_PS0_S0_i: # @_Z36__device_stub__kernel_sub_scalar_invIiEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end274:
	.size	_Z36__device_stub__kernel_sub_scalar_invIiEvPKT_PS0_S0_i, .Lfunc_end274-_Z36__device_stub__kernel_sub_scalar_invIiEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB275_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z32__device_stub__kernel_mul_scalarIiEvPKT_PS0_S0_i
.LBB275_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.27, %ecx
	movl	%eax, %edi
	movl	$1171, %edx                     # imm = 0x493
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.28, %ecx
	movl	%eax, %edi
	movl	$1172, %edx                     # imm = 0x494
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end275:
	.size	_Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end275-_Z22cuda_kernel_mul_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_mul_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z32__device_stub__kernel_mul_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z32__device_stub__kernel_mul_scalarIiEvPKT_PS0_S0_i # -- Begin function _Z32__device_stub__kernel_mul_scalarIiEvPKT_PS0_S0_i
	.type	_Z32__device_stub__kernel_mul_scalarIiEvPKT_PS0_S0_i,@function
_Z32__device_stub__kernel_mul_scalarIiEvPKT_PS0_S0_i: # @_Z32__device_stub__kernel_mul_scalarIiEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end276:
	.size	_Z32__device_stub__kernel_mul_scalarIiEvPKT_PS0_S0_i, .Lfunc_end276-_Z32__device_stub__kernel_mul_scalarIiEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB277_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z32__device_stub__kernel_div_scalarIiEvPKT_PS0_S0_i
.LBB277_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.29, %ecx
	movl	%eax, %edi
	movl	$1182, %edx                     # imm = 0x49E
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.30, %ecx
	movl	%eax, %edi
	movl	$1183, %edx                     # imm = 0x49F
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end277:
	.size	_Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end277-_Z22cuda_kernel_div_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_div_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z32__device_stub__kernel_div_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z32__device_stub__kernel_div_scalarIiEvPKT_PS0_S0_i # -- Begin function _Z32__device_stub__kernel_div_scalarIiEvPKT_PS0_S0_i
	.type	_Z32__device_stub__kernel_div_scalarIiEvPKT_PS0_S0_i,@function
_Z32__device_stub__kernel_div_scalarIiEvPKT_PS0_S0_i: # @_Z32__device_stub__kernel_div_scalarIiEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_div_scalarIiEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end278:
	.size	_Z32__device_stub__kernel_div_scalarIiEvPKT_PS0_S0_i, .Lfunc_end278-_Z32__device_stub__kernel_div_scalarIiEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB279_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z36__device_stub__kernel_div_scalar_invIiEvPKT_PS0_S0_i
.LBB279_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.31, %ecx
	movl	%eax, %edi
	movl	$1193, %edx                     # imm = 0x4A9
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.32, %ecx
	movl	%eax, %edi
	movl	$1194, %edx                     # imm = 0x4AA
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end279:
	.size	_Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end279-_Z26cuda_kernel_div_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_div_scalar_invIiEvPKT_PS0_S0_i,"axG",@progbits,_Z36__device_stub__kernel_div_scalar_invIiEvPKT_PS0_S0_i,comdat
	.weak	_Z36__device_stub__kernel_div_scalar_invIiEvPKT_PS0_S0_i # -- Begin function _Z36__device_stub__kernel_div_scalar_invIiEvPKT_PS0_S0_i
	.type	_Z36__device_stub__kernel_div_scalar_invIiEvPKT_PS0_S0_i,@function
_Z36__device_stub__kernel_div_scalar_invIiEvPKT_PS0_S0_i: # @_Z36__device_stub__kernel_div_scalar_invIiEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end280:
	.size	_Z36__device_stub__kernel_div_scalar_invIiEvPKT_PS0_S0_i, .Lfunc_end280-_Z36__device_stub__kernel_div_scalar_invIiEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB281_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z32__device_stub__kernel_pow_scalarIiEvPKT_PS0_S0_i
.LBB281_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.33, %ecx
	movl	%eax, %edi
	movl	$1204, %edx                     # imm = 0x4B4
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.34, %ecx
	movl	%eax, %edi
	movl	$1205, %edx                     # imm = 0x4B5
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end281:
	.size	_Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end281-_Z22cuda_kernel_pow_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_pow_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z32__device_stub__kernel_pow_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z32__device_stub__kernel_pow_scalarIiEvPKT_PS0_S0_i # -- Begin function _Z32__device_stub__kernel_pow_scalarIiEvPKT_PS0_S0_i
	.type	_Z32__device_stub__kernel_pow_scalarIiEvPKT_PS0_S0_i,@function
_Z32__device_stub__kernel_pow_scalarIiEvPKT_PS0_S0_i: # @_Z32__device_stub__kernel_pow_scalarIiEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end282:
	.size	_Z32__device_stub__kernel_pow_scalarIiEvPKT_PS0_S0_i, .Lfunc_end282-_Z32__device_stub__kernel_pow_scalarIiEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB283_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z36__device_stub__kernel_pow_scalar_invIiEvPKT_PS0_S0_i
.LBB283_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.35, %ecx
	movl	%eax, %edi
	movl	$1215, %edx                     # imm = 0x4BF
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.36, %ecx
	movl	%eax, %edi
	movl	$1216, %edx                     # imm = 0x4C0
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end283:
	.size	_Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end283-_Z26cuda_kernel_pow_scalar_invIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_pow_scalar_invIiEvPKT_PS0_S0_i,"axG",@progbits,_Z36__device_stub__kernel_pow_scalar_invIiEvPKT_PS0_S0_i,comdat
	.weak	_Z36__device_stub__kernel_pow_scalar_invIiEvPKT_PS0_S0_i # -- Begin function _Z36__device_stub__kernel_pow_scalar_invIiEvPKT_PS0_S0_i
	.type	_Z36__device_stub__kernel_pow_scalar_invIiEvPKT_PS0_S0_i,@function
_Z36__device_stub__kernel_pow_scalar_invIiEvPKT_PS0_S0_i: # @_Z36__device_stub__kernel_pow_scalar_invIiEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end284:
	.size	_Z36__device_stub__kernel_pow_scalar_invIiEvPKT_PS0_S0_i, .Lfunc_end284-_Z36__device_stub__kernel_pow_scalar_invIiEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB285_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z27__device_stub__kernel_equalIiEvPKT_S2_PS0_i
.LBB285_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.37, %ecx
	movl	%eax, %edi
	movl	$1281, %edx                     # imm = 0x501
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.38, %ecx
	movl	%eax, %edi
	movl	$1282, %edx                     # imm = 0x502
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end285:
	.size	_Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end285-_Z17cuda_kernel_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z27__device_stub__kernel_equalIiEvPKT_S2_PS0_i,"axG",@progbits,_Z27__device_stub__kernel_equalIiEvPKT_S2_PS0_i,comdat
	.weak	_Z27__device_stub__kernel_equalIiEvPKT_S2_PS0_i # -- Begin function _Z27__device_stub__kernel_equalIiEvPKT_S2_PS0_i
	.type	_Z27__device_stub__kernel_equalIiEvPKT_S2_PS0_i,@function
_Z27__device_stub__kernel_equalIiEvPKT_S2_PS0_i: # @_Z27__device_stub__kernel_equalIiEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12kernel_equalIiEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end286:
	.size	_Z27__device_stub__kernel_equalIiEvPKT_S2_PS0_i, .Lfunc_end286-_Z27__device_stub__kernel_equalIiEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB287_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z29__device_stub__kernel_greaterIiEvPKT_S2_PS0_i
.LBB287_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.39, %ecx
	movl	%eax, %edi
	movl	$1292, %edx                     # imm = 0x50C
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.40, %ecx
	movl	%eax, %edi
	movl	$1293, %edx                     # imm = 0x50D
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end287:
	.size	_Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end287-_Z19cuda_kernel_greaterIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__kernel_greaterIiEvPKT_S2_PS0_i,"axG",@progbits,_Z29__device_stub__kernel_greaterIiEvPKT_S2_PS0_i,comdat
	.weak	_Z29__device_stub__kernel_greaterIiEvPKT_S2_PS0_i # -- Begin function _Z29__device_stub__kernel_greaterIiEvPKT_S2_PS0_i
	.type	_Z29__device_stub__kernel_greaterIiEvPKT_S2_PS0_i,@function
_Z29__device_stub__kernel_greaterIiEvPKT_S2_PS0_i: # @_Z29__device_stub__kernel_greaterIiEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14kernel_greaterIiEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end288:
	.size	_Z29__device_stub__kernel_greaterIiEvPKT_S2_PS0_i, .Lfunc_end288-_Z29__device_stub__kernel_greaterIiEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB289_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z26__device_stub__kernel_lessIiEvPKT_S2_PS0_i
.LBB289_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.39, %ecx
	movl	%eax, %edi
	movl	$1303, %edx                     # imm = 0x517
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.40, %ecx
	movl	%eax, %edi
	movl	$1304, %edx                     # imm = 0x518
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end289:
	.size	_Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end289-_Z16cuda_kernel_lessIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_lessIiEvPKT_S2_PS0_i,"axG",@progbits,_Z26__device_stub__kernel_lessIiEvPKT_S2_PS0_i,comdat
	.weak	_Z26__device_stub__kernel_lessIiEvPKT_S2_PS0_i # -- Begin function _Z26__device_stub__kernel_lessIiEvPKT_S2_PS0_i
	.type	_Z26__device_stub__kernel_lessIiEvPKT_S2_PS0_i,@function
_Z26__device_stub__kernel_lessIiEvPKT_S2_PS0_i: # @_Z26__device_stub__kernel_lessIiEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_lessIiEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end290:
	.size	_Z26__device_stub__kernel_lessIiEvPKT_S2_PS0_i, .Lfunc_end290-_Z26__device_stub__kernel_lessIiEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB291_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z35__device_stub__kernel_greater_equalIiEvPKT_S2_PS0_i
.LBB291_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.41, %ecx
	movl	%eax, %edi
	movl	$1314, %edx                     # imm = 0x522
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.42, %ecx
	movl	%eax, %edi
	movl	$1315, %edx                     # imm = 0x523
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end291:
	.size	_Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end291-_Z25cuda_kernel_greater_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35__device_stub__kernel_greater_equalIiEvPKT_S2_PS0_i,"axG",@progbits,_Z35__device_stub__kernel_greater_equalIiEvPKT_S2_PS0_i,comdat
	.weak	_Z35__device_stub__kernel_greater_equalIiEvPKT_S2_PS0_i # -- Begin function _Z35__device_stub__kernel_greater_equalIiEvPKT_S2_PS0_i
	.type	_Z35__device_stub__kernel_greater_equalIiEvPKT_S2_PS0_i,@function
_Z35__device_stub__kernel_greater_equalIiEvPKT_S2_PS0_i: # @_Z35__device_stub__kernel_greater_equalIiEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20kernel_greater_equalIiEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end292:
	.size	_Z35__device_stub__kernel_greater_equalIiEvPKT_S2_PS0_i, .Lfunc_end292-_Z35__device_stub__kernel_greater_equalIiEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB293_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z32__device_stub__kernel_less_equalIiEvPKT_S2_PS0_i
.LBB293_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.43, %ecx
	movl	%eax, %edi
	movl	$1325, %edx                     # imm = 0x52D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.44, %ecx
	movl	%eax, %edi
	movl	$1326, %edx                     # imm = 0x52E
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end293:
	.size	_Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end293-_Z22cuda_kernel_less_equalIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32__device_stub__kernel_less_equalIiEvPKT_S2_PS0_i,"axG",@progbits,_Z32__device_stub__kernel_less_equalIiEvPKT_S2_PS0_i,comdat
	.weak	_Z32__device_stub__kernel_less_equalIiEvPKT_S2_PS0_i # -- Begin function _Z32__device_stub__kernel_less_equalIiEvPKT_S2_PS0_i
	.type	_Z32__device_stub__kernel_less_equalIiEvPKT_S2_PS0_i,@function
_Z32__device_stub__kernel_less_equalIiEvPKT_S2_PS0_i: # @_Z32__device_stub__kernel_less_equalIiEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_less_equalIiEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end294:
	.size	_Z32__device_stub__kernel_less_equalIiEvPKT_S2_PS0_i, .Lfunc_end294-_Z32__device_stub__kernel_less_equalIiEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB295_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z34__device_stub__kernel_equal_scalarIiEvPKT_PS0_S0_i
.LBB295_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.45, %ecx
	movl	%eax, %edi
	movl	$1336, %edx                     # imm = 0x538
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.46, %ecx
	movl	%eax, %edi
	movl	$1337, %edx                     # imm = 0x539
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end295:
	.size	_Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end295-_Z24cuda_kernel_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z34__device_stub__kernel_equal_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z34__device_stub__kernel_equal_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z34__device_stub__kernel_equal_scalarIiEvPKT_PS0_S0_i # -- Begin function _Z34__device_stub__kernel_equal_scalarIiEvPKT_PS0_S0_i
	.type	_Z34__device_stub__kernel_equal_scalarIiEvPKT_PS0_S0_i,@function
_Z34__device_stub__kernel_equal_scalarIiEvPKT_PS0_S0_i: # @_Z34__device_stub__kernel_equal_scalarIiEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end296:
	.size	_Z34__device_stub__kernel_equal_scalarIiEvPKT_PS0_S0_i, .Lfunc_end296-_Z34__device_stub__kernel_equal_scalarIiEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB297_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z36__device_stub__kernel_greater_scalarIiEvPKT_PS0_S0_i
.LBB297_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.47, %ecx
	movl	%eax, %edi
	movl	$1347, %edx                     # imm = 0x543
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.48, %ecx
	movl	%eax, %edi
	movl	$1348, %edx                     # imm = 0x544
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end297:
	.size	_Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end297-_Z26cuda_kernel_greater_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_greater_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z36__device_stub__kernel_greater_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z36__device_stub__kernel_greater_scalarIiEvPKT_PS0_S0_i # -- Begin function _Z36__device_stub__kernel_greater_scalarIiEvPKT_PS0_S0_i
	.type	_Z36__device_stub__kernel_greater_scalarIiEvPKT_PS0_S0_i,@function
_Z36__device_stub__kernel_greater_scalarIiEvPKT_PS0_S0_i: # @_Z36__device_stub__kernel_greater_scalarIiEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end298:
	.size	_Z36__device_stub__kernel_greater_scalarIiEvPKT_PS0_S0_i, .Lfunc_end298-_Z36__device_stub__kernel_greater_scalarIiEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB299_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z33__device_stub__kernel_less_scalarIiEvPKT_PS0_S0_i
.LBB299_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.49, %ecx
	movl	%eax, %edi
	movl	$1358, %edx                     # imm = 0x54E
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.50, %ecx
	movl	%eax, %edi
	movl	$1359, %edx                     # imm = 0x54F
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end299:
	.size	_Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end299-_Z23cuda_kernel_less_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z33__device_stub__kernel_less_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z33__device_stub__kernel_less_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z33__device_stub__kernel_less_scalarIiEvPKT_PS0_S0_i # -- Begin function _Z33__device_stub__kernel_less_scalarIiEvPKT_PS0_S0_i
	.type	_Z33__device_stub__kernel_less_scalarIiEvPKT_PS0_S0_i,@function
_Z33__device_stub__kernel_less_scalarIiEvPKT_PS0_S0_i: # @_Z33__device_stub__kernel_less_scalarIiEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18kernel_less_scalarIiEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end300:
	.size	_Z33__device_stub__kernel_less_scalarIiEvPKT_PS0_S0_i, .Lfunc_end300-_Z33__device_stub__kernel_less_scalarIiEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB301_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z42__device_stub__kernel_greater_equal_scalarIiEvPKT_PS0_S0_i
.LBB301_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.51, %ecx
	movl	%eax, %edi
	movl	$1369, %edx                     # imm = 0x559
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.52, %ecx
	movl	%eax, %edi
	movl	$1370, %edx                     # imm = 0x55A
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end301:
	.size	_Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end301-_Z32cuda_kernel_greater_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z42__device_stub__kernel_greater_equal_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z42__device_stub__kernel_greater_equal_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z42__device_stub__kernel_greater_equal_scalarIiEvPKT_PS0_S0_i # -- Begin function _Z42__device_stub__kernel_greater_equal_scalarIiEvPKT_PS0_S0_i
	.type	_Z42__device_stub__kernel_greater_equal_scalarIiEvPKT_PS0_S0_i,@function
_Z42__device_stub__kernel_greater_equal_scalarIiEvPKT_PS0_S0_i: # @_Z42__device_stub__kernel_greater_equal_scalarIiEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end302:
	.size	_Z42__device_stub__kernel_greater_equal_scalarIiEvPKT_PS0_S0_i, .Lfunc_end302-_Z42__device_stub__kernel_greater_equal_scalarIiEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB303_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z39__device_stub__kernel_less_equal_scalarIiEvPKT_PS0_S0_i
.LBB303_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.53, %ecx
	movl	%eax, %edi
	movl	$1380, %edx                     # imm = 0x564
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.54, %ecx
	movl	%eax, %edi
	movl	$1381, %edx                     # imm = 0x565
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end303:
	.size	_Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end303-_Z29cuda_kernel_less_equal_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z39__device_stub__kernel_less_equal_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z39__device_stub__kernel_less_equal_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z39__device_stub__kernel_less_equal_scalarIiEvPKT_PS0_S0_i # -- Begin function _Z39__device_stub__kernel_less_equal_scalarIiEvPKT_PS0_S0_i
	.type	_Z39__device_stub__kernel_less_equal_scalarIiEvPKT_PS0_S0_i,@function
_Z39__device_stub__kernel_less_equal_scalarIiEvPKT_PS0_S0_i: # @_Z39__device_stub__kernel_less_equal_scalarIiEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end304:
	.size	_Z39__device_stub__kernel_less_equal_scalarIiEvPKT_PS0_S0_i, .Lfunc_end304-_Z39__device_stub__kernel_less_equal_scalarIiEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,"axG",@progbits,_Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,comdat
	.weak	_Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i # -- Begin function _Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.type	_Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i,@function
_Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i: # @_Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB305_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z29__device_stub__kernel_replaceIiEvPKT_S2_PS0_i
.LBB305_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.55, %ecx
	movl	%eax, %edi
	movl	$1391, %edx                     # imm = 0x56F
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.56, %ecx
	movl	%eax, %edi
	movl	$1392, %edx                     # imm = 0x570
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end305:
	.size	_Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i, .Lfunc_end305-_Z19cuda_kernel_replaceIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__kernel_replaceIiEvPKT_S2_PS0_i,"axG",@progbits,_Z29__device_stub__kernel_replaceIiEvPKT_S2_PS0_i,comdat
	.weak	_Z29__device_stub__kernel_replaceIiEvPKT_S2_PS0_i # -- Begin function _Z29__device_stub__kernel_replaceIiEvPKT_S2_PS0_i
	.type	_Z29__device_stub__kernel_replaceIiEvPKT_S2_PS0_i,@function
_Z29__device_stub__kernel_replaceIiEvPKT_S2_PS0_i: # @_Z29__device_stub__kernel_replaceIiEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14kernel_replaceIiEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end306:
	.size	_Z29__device_stub__kernel_replaceIiEvPKT_S2_PS0_i, .Lfunc_end306-_Z29__device_stub__kernel_replaceIiEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,"axG",@progbits,_Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,comdat
	.weak	_Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i # -- Begin function _Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.type	_Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i,@function
_Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i: # @_Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB307_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z36__device_stub__kernel_replace_scalarIiEvPKT_PS0_S0_i
.LBB307_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.55, %ecx
	movl	%eax, %edi
	movl	$1402, %edx                     # imm = 0x57A
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.56, %ecx
	movl	%eax, %edi
	movl	$1403, %edx                     # imm = 0x57B
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end307:
	.size	_Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i, .Lfunc_end307-_Z26cuda_kernel_replace_scalarIiEvRSt6vectorIiSaIiEES3_PKT_PS4_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_replace_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z36__device_stub__kernel_replace_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z36__device_stub__kernel_replace_scalarIiEvPKT_PS0_S0_i # -- Begin function _Z36__device_stub__kernel_replace_scalarIiEvPKT_PS0_S0_i
	.type	_Z36__device_stub__kernel_replace_scalarIiEvPKT_PS0_S0_i,@function
_Z36__device_stub__kernel_replace_scalarIiEvPKT_PS0_S0_i: # @_Z36__device_stub__kernel_replace_scalarIiEvPKT_PS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end308:
	.size	_Z36__device_stub__kernel_replace_scalarIiEvPKT_PS0_S0_i, .Lfunc_end308-_Z36__device_stub__kernel_replace_scalarIiEvPKT_PS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB309_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z25__device_stub__kernel_sumIiEvPKT_PS0_i
.LBB309_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.57, %ecx
	movl	%eax, %edi
	movl	$1420, %edx                     # imm = 0x58C
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.58, %ecx
	movl	%eax, %edi
	movl	$1421, %edx                     # imm = 0x58D
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end309:
	.size	_Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end309-_Z15cuda_kernel_sumIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_sumIiEvPKT_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_sumIiEvPKT_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_sumIiEvPKT_PS0_i # -- Begin function _Z25__device_stub__kernel_sumIiEvPKT_PS0_i
	.type	_Z25__device_stub__kernel_sumIiEvPKT_PS0_i,@function
_Z25__device_stub__kernel_sumIiEvPKT_PS0_i: # @_Z25__device_stub__kernel_sumIiEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_sumIiEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end310:
	.size	_Z25__device_stub__kernel_sumIiEvPKT_PS0_i, .Lfunc_end310-_Z25__device_stub__kernel_sumIiEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB311_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z25__device_stub__kernel_minIiEvPKT_PS0_i
.LBB311_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.59, %ecx
	movl	%eax, %edi
	movl	$1431, %edx                     # imm = 0x597
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.60, %ecx
	movl	%eax, %edi
	movl	$1432, %edx                     # imm = 0x598
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end311:
	.size	_Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end311-_Z15cuda_kernel_minIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_minIiEvPKT_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_minIiEvPKT_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_minIiEvPKT_PS0_i # -- Begin function _Z25__device_stub__kernel_minIiEvPKT_PS0_i
	.type	_Z25__device_stub__kernel_minIiEvPKT_PS0_i,@function
_Z25__device_stub__kernel_minIiEvPKT_PS0_i: # @_Z25__device_stub__kernel_minIiEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_minIiEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end312:
	.size	_Z25__device_stub__kernel_minIiEvPKT_PS0_i, .Lfunc_end312-_Z25__device_stub__kernel_minIiEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB313_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z25__device_stub__kernel_maxIiEvPKT_PS0_i
.LBB313_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.61, %ecx
	movl	%eax, %edi
	movl	$1442, %edx                     # imm = 0x5A2
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.62, %ecx
	movl	%eax, %edi
	movl	$1443, %edx                     # imm = 0x5A3
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end313:
	.size	_Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end313-_Z15cuda_kernel_maxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__kernel_maxIiEvPKT_PS0_i,"axG",@progbits,_Z25__device_stub__kernel_maxIiEvPKT_PS0_i,comdat
	.weak	_Z25__device_stub__kernel_maxIiEvPKT_PS0_i # -- Begin function _Z25__device_stub__kernel_maxIiEvPKT_PS0_i
	.type	_Z25__device_stub__kernel_maxIiEvPKT_PS0_i,@function
_Z25__device_stub__kernel_maxIiEvPKT_PS0_i: # @_Z25__device_stub__kernel_maxIiEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_maxIiEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end314:
	.size	_Z25__device_stub__kernel_maxIiEvPKT_PS0_i, .Lfunc_end314-_Z25__device_stub__kernel_maxIiEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,"axG",@progbits,_Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,comdat
	.weak	_Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii # -- Begin function _Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.type	_Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,@function
_Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii: # @_Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 12(%rsp)                  # 4-byte Spill
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	104(%rsp), %ebx
	movl	96(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	88(%rsp), %r12d
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB315_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%r12d, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__kernel_pad_2dIiEvPKT_PS0_iiiiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB315_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.63, %ecx
	movl	%eax, %edi
	movl	$1460, %edx                     # imm = 0x5B4
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.64, %ecx
	movl	%eax, %edi
	movl	$1461, %edx                     # imm = 0x5B5
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end315:
	.size	_Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, .Lfunc_end315-_Z18cuda_kernel_pad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__kernel_pad_2dIiEvPKT_PS0_iiiiii,"axG",@progbits,_Z28__device_stub__kernel_pad_2dIiEvPKT_PS0_iiiiii,comdat
	.weak	_Z28__device_stub__kernel_pad_2dIiEvPKT_PS0_iiiiii # -- Begin function _Z28__device_stub__kernel_pad_2dIiEvPKT_PS0_iiiiii
	.type	_Z28__device_stub__kernel_pad_2dIiEvPKT_PS0_iiiiii,@function
_Z28__device_stub__kernel_pad_2dIiEvPKT_PS0_iiiiii: # @_Z28__device_stub__kernel_pad_2dIiEvPKT_PS0_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	200(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end316:
	.size	_Z28__device_stub__kernel_pad_2dIiEvPKT_PS0_iiiiii, .Lfunc_end316-_Z28__device_stub__kernel_pad_2dIiEvPKT_PS0_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,"axG",@progbits,_Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,comdat
	.weak	_Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii # -- Begin function _Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.type	_Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii,@function
_Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii: # @_Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 12(%rsp)                  # 4-byte Spill
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	104(%rsp), %ebx
	movl	96(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	88(%rsp), %r12d
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB317_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%r12d, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z30__device_stub__kernel_unpad_2dIiEvPKT_PS0_iiiiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB317_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.65, %ecx
	movl	%eax, %edi
	movl	$1472, %edx                     # imm = 0x5C0
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.66, %ecx
	movl	%eax, %edi
	movl	$1473, %edx                     # imm = 0x5C1
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end317:
	.size	_Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii, .Lfunc_end317-_Z20cuda_kernel_unpad_2dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z30__device_stub__kernel_unpad_2dIiEvPKT_PS0_iiiiii,"axG",@progbits,_Z30__device_stub__kernel_unpad_2dIiEvPKT_PS0_iiiiii,comdat
	.weak	_Z30__device_stub__kernel_unpad_2dIiEvPKT_PS0_iiiiii # -- Begin function _Z30__device_stub__kernel_unpad_2dIiEvPKT_PS0_iiiiii
	.type	_Z30__device_stub__kernel_unpad_2dIiEvPKT_PS0_iiiiii,@function
_Z30__device_stub__kernel_unpad_2dIiEvPKT_PS0_iiiiii: # @_Z30__device_stub__kernel_unpad_2dIiEvPKT_PS0_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	200(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end318:
	.size	_Z30__device_stub__kernel_unpad_2dIiEvPKT_PS0_iiiiii, .Lfunc_end318-_Z30__device_stub__kernel_unpad_2dIiEvPKT_PS0_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,"axG",@progbits,_Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,comdat
	.weak	_Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii # -- Begin function _Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.type	_Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,@function
_Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii: # @_Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 4(%rsp)                   # 4-byte Spill
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	144(%rsp), %ebx
	movl	136(%rsp), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	128(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	120(%rsp), %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	112(%rsp), %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	104(%rsp), %r12d
	movl	96(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB319_2
# %bb.1:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%r12d, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__kernel_pad_3dIiEvPKT_PS0_iiiiiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB319_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.67, %ecx
	movl	%eax, %edi
	movl	$1487, %edx                     # imm = 0x5CF
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.68, %ecx
	movl	%eax, %edi
	movl	$1488, %edx                     # imm = 0x5D0
	movl	$1, %r8d
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end319:
	.size	_Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, .Lfunc_end319-_Z18cuda_kernel_pad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__kernel_pad_3dIiEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z28__device_stub__kernel_pad_3dIiEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z28__device_stub__kernel_pad_3dIiEvPKT_PS0_iiiiiiiii # -- Begin function _Z28__device_stub__kernel_pad_3dIiEvPKT_PS0_iiiiiiiii
	.type	_Z28__device_stub__kernel_pad_3dIiEvPKT_PS0_iiiiiiiii,@function
_Z28__device_stub__kernel_pad_3dIiEvPKT_PS0_iiiiiiiii: # @_Z28__device_stub__kernel_pad_3dIiEvPKT_PS0_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end320:
	.size	_Z28__device_stub__kernel_pad_3dIiEvPKT_PS0_iiiiiiiii, .Lfunc_end320-_Z28__device_stub__kernel_pad_3dIiEvPKT_PS0_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,"axG",@progbits,_Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,comdat
	.weak	_Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii # -- Begin function _Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.type	_Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii,@function
_Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii: # @_Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 4(%rsp)                   # 4-byte Spill
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	144(%rsp), %ebx
	movl	136(%rsp), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	128(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	120(%rsp), %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	112(%rsp), %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	104(%rsp), %r12d
	movl	96(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB321_2
# %bb.1:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%r12d, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z30__device_stub__kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB321_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.69, %ecx
	movl	%eax, %edi
	movl	$1499, %edx                     # imm = 0x5DB
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.70, %ecx
	movl	%eax, %edi
	movl	$1500, %edx                     # imm = 0x5DC
	movl	$1, %r8d
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end321:
	.size	_Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii, .Lfunc_end321-_Z20cuda_kernel_unpad_3dIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z30__device_stub__kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z30__device_stub__kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z30__device_stub__kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii # -- Begin function _Z30__device_stub__kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii
	.type	_Z30__device_stub__kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii,@function
_Z30__device_stub__kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii: # @_Z30__device_stub__kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end322:
	.size	_Z30__device_stub__kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii, .Lfunc_end322-_Z30__device_stub__kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii,"axG",@progbits,_Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii,comdat
	.weak	_Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii # -- Begin function _Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii
	.type	_Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii,@function
_Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii: # @_Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	48(%rsp), %ebp
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB323_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	movl	%ebp, %r8d
	callq	_Z29__device_stub__kernel_grid_2dIiEvPT_S1_Pdii
.LBB323_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.71, %ecx
	movl	%eax, %edi
	movl	$1511, %edx                     # imm = 0x5E7
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.72, %ecx
	movl	%eax, %edi
	movl	$1512, %edx                     # imm = 0x5E8
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end323:
	.size	_Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii, .Lfunc_end323-_Z19cuda_kernel_grid_2dIiEvRSt6vectorIiSaIiEES3_PT_S5_Pdii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__kernel_grid_2dIiEvPT_S1_Pdii,"axG",@progbits,_Z29__device_stub__kernel_grid_2dIiEvPT_S1_Pdii,comdat
	.weak	_Z29__device_stub__kernel_grid_2dIiEvPT_S1_Pdii # -- Begin function _Z29__device_stub__kernel_grid_2dIiEvPT_S1_Pdii
	.type	_Z29__device_stub__kernel_grid_2dIiEvPT_S1_Pdii,@function
_Z29__device_stub__kernel_grid_2dIiEvPT_S1_Pdii: # @_Z29__device_stub__kernel_grid_2dIiEvPT_S1_Pdii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14kernel_grid_2dIiEvPT_S1_Pdii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end324:
	.size	_Z29__device_stub__kernel_grid_2dIiEvPT_S1_Pdii, .Lfunc_end324-_Z29__device_stub__kernel_grid_2dIiEvPT_S1_Pdii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii,"axG",@progbits,_Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii,comdat
	.weak	_Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii # -- Begin function _Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii
	.type	_Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii,@function
_Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii: # @_Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	96(%rsp), %ebx
	movl	88(%rsp), %ebp
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB325_2
# %bb.1:
	movl	%ebx, (%rsp)
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	callq	_Z29__device_stub__kernel_grid_3dIiEvPT_S1_S1_Pdiii
.LBB325_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.73, %ecx
	movl	%eax, %edi
	movl	$1523, %edx                     # imm = 0x5F3
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.74, %ecx
	movl	%eax, %edi
	movl	$1524, %edx                     # imm = 0x5F4
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end325:
	.size	_Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii, .Lfunc_end325-_Z19cuda_kernel_grid_3dIiEvRSt6vectorIiSaIiEES3_PT_S5_S5_Pdiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__kernel_grid_3dIiEvPT_S1_S1_Pdiii,"axG",@progbits,_Z29__device_stub__kernel_grid_3dIiEvPT_S1_S1_Pdiii,comdat
	.weak	_Z29__device_stub__kernel_grid_3dIiEvPT_S1_S1_Pdiii # -- Begin function _Z29__device_stub__kernel_grid_3dIiEvPT_S1_S1_Pdiii
	.type	_Z29__device_stub__kernel_grid_3dIiEvPT_S1_S1_Pdiii,@function
_Z29__device_stub__kernel_grid_3dIiEvPT_S1_S1_Pdiii: # @_Z29__device_stub__kernel_grid_3dIiEvPT_S1_S1_Pdiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end326:
	.size	_Z29__device_stub__kernel_grid_3dIiEvPT_S1_S1_Pdiii, .Lfunc_end326-_Z29__device_stub__kernel_grid_3dIiEvPT_S1_S1_Pdiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i,"axG",@progbits,_Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i,comdat
	.weak	_Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i # -- Begin function _Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i
	.type	_Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i,@function
_Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i: # @_Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	72(%rsp), %ebp
	movq	64(%rsp), %r13
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB327_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	movq	%r13, %r8
	movl	%ebp, %r9d
	callq	_Z31__device_stub__kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i
.LBB327_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.75, %ecx
	movl	%eax, %edi
	movl	$1539, %edx                     # imm = 0x603
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.76, %ecx
	movl	%eax, %edi
	movl	$1540, %edx                     # imm = 0x604
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end327:
	.size	_Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i, .Lfunc_end327-_Z21cuda_kernel_affine_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_S6_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i,"axG",@progbits,_Z31__device_stub__kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i,comdat
	.weak	_Z31__device_stub__kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i # -- Begin function _Z31__device_stub__kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i
	.type	_Z31__device_stub__kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i,@function
_Z31__device_stub__kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i: # @_Z31__device_stub__kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end328:
	.size	_Z31__device_stub__kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i, .Lfunc_end328-_Z31__device_stub__kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i,"axG",@progbits,_Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i,comdat
	.weak	_Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i # -- Begin function _Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i
	.type	_Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i,@function
_Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i: # @_Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	104(%rsp), %ebx
	movq	96(%rsp), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	88(%rsp), %r13
	movq	80(%rsp), %rbp
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB329_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%rbp, %r8
	movq	%r13, %r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z31__device_stub__kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB329_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.77, %ecx
	movl	%eax, %edi
	movl	$1552, %edx                     # imm = 0x610
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.78, %ecx
	movl	%eax, %edi
	movl	$1553, %edx                     # imm = 0x611
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end329:
	.size	_Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i, .Lfunc_end329-_Z21cuda_kernel_affine_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_S6_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i,"axG",@progbits,_Z31__device_stub__kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i,comdat
	.weak	_Z31__device_stub__kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i # -- Begin function _Z31__device_stub__kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i
	.type	_Z31__device_stub__kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i,@function
_Z31__device_stub__kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i: # @_Z31__device_stub__kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end330:
	.size	_Z31__device_stub__kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i, .Lfunc_end330-_Z31__device_stub__kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi,"axG",@progbits,_Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi,comdat
	.weak	_Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi # -- Begin function _Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi
	.type	_Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi,@function
_Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi: # @_Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	72(%rsp), %ebp
	movq	64(%rsp), %r13
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB331_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	movq	%r13, %r8
	movl	%ebp, %r9d
	callq	_Z35__device_stub__kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi
.LBB331_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.79, %ecx
	movl	%eax, %edi
	movl	$1565, %edx                     # imm = 0x61D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.80, %ecx
	movl	%eax, %edi
	movl	$1566, %edx                     # imm = 0x61E
	movl	$1, %r8d
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end331:
	.size	_Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi, .Lfunc_end331-_Z25cuda_kernel_affine_sod_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_S7_PKdi
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35__device_stub__kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi,"axG",@progbits,_Z35__device_stub__kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi,comdat
	.weak	_Z35__device_stub__kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi # -- Begin function _Z35__device_stub__kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi
	.type	_Z35__device_stub__kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi,@function
_Z35__device_stub__kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi: # @_Z35__device_stub__kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end332:
	.size	_Z35__device_stub__kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi, .Lfunc_end332-_Z35__device_stub__kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi,"axG",@progbits,_Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi,comdat
	.weak	_Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi # -- Begin function _Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi
	.type	_Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi,@function
_Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi: # @_Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	104(%rsp), %ebx
	movq	96(%rsp), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	88(%rsp), %r13
	movq	80(%rsp), %rbp
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB333_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%rbp, %r8
	movq	%r13, %r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z35__device_stub__kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB333_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.81, %ecx
	movl	%eax, %edi
	movl	$1578, %edx                     # imm = 0x62A
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.82, %ecx
	movl	%eax, %edi
	movl	$1579, %edx                     # imm = 0x62B
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end333:
	.size	_Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi, .Lfunc_end333-_Z25cuda_kernel_affine_sod_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_PS4_S7_S7_PKdi
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35__device_stub__kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi,"axG",@progbits,_Z35__device_stub__kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi,comdat
	.weak	_Z35__device_stub__kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi # -- Begin function _Z35__device_stub__kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi
	.type	_Z35__device_stub__kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi,@function
_Z35__device_stub__kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi: # @_Z35__device_stub__kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end334:
	.size	_Z35__device_stub__kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi, .Lfunc_end334-_Z35__device_stub__kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i,"axG",@progbits,_Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i,comdat
	.weak	_Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i # -- Begin function _Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i
	.type	_Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i,@function
_Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i: # @_Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r13
	movl	96(%rsp), %ebx
	movq	88(%rsp), %r12
	movq	80(%rsp), %rbp
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB335_2
# %bb.1:
	movl	%ebx, (%rsp)
	movq	%r13, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%rbp, %r8
	movq	%r12, %r9
	callq	_Z31__device_stub__kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i
.LBB335_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.83, %ecx
	movl	%eax, %edi
	movl	$1591, %edx                     # imm = 0x637
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.84, %ecx
	movl	%eax, %edi
	movl	$1592, %edx                     # imm = 0x638
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end335:
	.size	_Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i, .Lfunc_end335-_Z21cuda_kernel_dfield_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_PS4_S7_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i,"axG",@progbits,_Z31__device_stub__kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i,comdat
	.weak	_Z31__device_stub__kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i # -- Begin function _Z31__device_stub__kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i
	.type	_Z31__device_stub__kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i,@function
_Z31__device_stub__kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i: # @_Z31__device_stub__kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end336:
	.size	_Z31__device_stub__kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i, .Lfunc_end336-_Z31__device_stub__kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i,"axG",@progbits,_Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i,comdat
	.weak	_Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i # -- Begin function _Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i
	.type	_Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i,@function
_Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i: # @_Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	136(%rsp), %ebx
	movq	128(%rsp), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	120(%rsp), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	112(%rsp), %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	104(%rsp), %r13
	movq	96(%rsp), %rbp
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB337_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movq	%rbp, %r8
	movq	%r13, %r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z31__device_stub__kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB337_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.85, %ecx
	movl	%eax, %edi
	movl	$1605, %edx                     # imm = 0x645
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.86, %ecx
	movl	%eax, %edi
	movl	$1606, %edx                     # imm = 0x646
	movl	$1, %r8d
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end337:
	.size	_Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i, .Lfunc_end337-_Z21cuda_kernel_dfield_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_S6_S6_S6_S6_PS4_S7_S7_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,"axG",@progbits,_Z31__device_stub__kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,comdat
	.weak	_Z31__device_stub__kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i # -- Begin function _Z31__device_stub__kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.type	_Z31__device_stub__kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,@function
_Z31__device_stub__kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i: # @_Z31__device_stub__kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end338:
	.size	_Z31__device_stub__kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, .Lfunc_end338-_Z31__device_stub__kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii # -- Begin function _Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,@function
_Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii: # @_Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rsi), %rax
	movl	8(%rax), %ecx
	movq	(%rdi), %rdx
	testl	%ecx, %ecx
	je	.LBB339_1
# %bb.2:
	movl	8(%rdx), %esi
	jmp	.LBB339_3
.LBB339_1:
	movl	$1, %ecx
	movl	$1, %esi
.LBB339_3:
	movl	48(%rsp), %r12d
	movq	(%rdx), %rdi
	movq	(%rax), %rdx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB339_5
# %bb.4:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	movl	%r12d, %r8d
	callq	_Z31__device_stub__kernel_gradientxIiEvPKT_PS0_iii
.LBB339_5:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.97, %ecx
	movl	%eax, %edi
	movl	$1712, %edx                     # imm = 0x6B0
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.98, %ecx
	movl	%eax, %edi
	movl	$1713, %edx                     # imm = 0x6B1
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end339:
	.size	_Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .Lfunc_end339-_Z21cuda_kernel_gradientxIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_gradientxIiEvPKT_PS0_iii,"axG",@progbits,_Z31__device_stub__kernel_gradientxIiEvPKT_PS0_iii,comdat
	.weak	_Z31__device_stub__kernel_gradientxIiEvPKT_PS0_iii # -- Begin function _Z31__device_stub__kernel_gradientxIiEvPKT_PS0_iii
	.type	_Z31__device_stub__kernel_gradientxIiEvPKT_PS0_iii,@function
_Z31__device_stub__kernel_gradientxIiEvPKT_PS0_iii: # @_Z31__device_stub__kernel_gradientxIiEvPKT_PS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_gradientxIiEvPKT_PS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end340:
	.size	_Z31__device_stub__kernel_gradientxIiEvPKT_PS0_iii, .Lfunc_end340-_Z31__device_stub__kernel_gradientxIiEvPKT_PS0_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii # -- Begin function _Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,@function
_Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii: # @_Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rsi), %rax
	movl	8(%rax), %ecx
	movq	(%rdi), %rdx
	testl	%ecx, %ecx
	je	.LBB341_1
# %bb.2:
	movl	8(%rdx), %esi
	jmp	.LBB341_3
.LBB341_1:
	movl	$1, %ecx
	movl	$1, %esi
.LBB341_3:
	movl	48(%rsp), %r12d
	movq	(%rdx), %rdi
	movq	(%rax), %rdx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB341_5
# %bb.4:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	movl	%r12d, %r8d
	callq	_Z31__device_stub__kernel_gradientyIiEvPKT_PS0_iii
.LBB341_5:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.99, %ecx
	movl	%eax, %edi
	movl	$1734, %edx                     # imm = 0x6C6
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.100, %ecx
	movl	%eax, %edi
	movl	$1735, %edx                     # imm = 0x6C7
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end341:
	.size	_Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .Lfunc_end341-_Z21cuda_kernel_gradientyIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_gradientyIiEvPKT_PS0_iii,"axG",@progbits,_Z31__device_stub__kernel_gradientyIiEvPKT_PS0_iii,comdat
	.weak	_Z31__device_stub__kernel_gradientyIiEvPKT_PS0_iii # -- Begin function _Z31__device_stub__kernel_gradientyIiEvPKT_PS0_iii
	.type	_Z31__device_stub__kernel_gradientyIiEvPKT_PS0_iii,@function
_Z31__device_stub__kernel_gradientyIiEvPKT_PS0_iii: # @_Z31__device_stub__kernel_gradientyIiEvPKT_PS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_gradientyIiEvPKT_PS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end342:
	.size	_Z31__device_stub__kernel_gradientyIiEvPKT_PS0_iii, .Lfunc_end342-_Z31__device_stub__kernel_gradientyIiEvPKT_PS0_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,"axG",@progbits,_Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,comdat
	.weak	_Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii # -- Begin function _Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.type	_Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii,@function
_Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii: # @_Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r12
	movl	48(%rsp), %r15d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB343_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	movl	%r15d, %r8d
	callq	_Z31__device_stub__kernel_gradientzIiEvPKT_PS0_iii
.LBB343_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.101, %ecx
	movl	%eax, %edi
	movl	$1746, %edx                     # imm = 0x6D2
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.102, %ecx
	movl	%eax, %edi
	movl	$1747, %edx                     # imm = 0x6D3
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end343:
	.size	_Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii, .Lfunc_end343-_Z21cuda_kernel_gradientzIiEvRSt6vectorIiSaIiEES3_PKT_PS4_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__kernel_gradientzIiEvPKT_PS0_iii,"axG",@progbits,_Z31__device_stub__kernel_gradientzIiEvPKT_PS0_iii,comdat
	.weak	_Z31__device_stub__kernel_gradientzIiEvPKT_PS0_iii # -- Begin function _Z31__device_stub__kernel_gradientzIiEvPKT_PS0_iii
	.type	_Z31__device_stub__kernel_gradientzIiEvPKT_PS0_iii,@function
_Z31__device_stub__kernel_gradientzIiEvPKT_PS0_iii: # @_Z31__device_stub__kernel_gradientzIiEvPKT_PS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_gradientzIiEvPKT_PS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end344:
	.size	_Z31__device_stub__kernel_gradientzIiEvPKT_PS0_iii, .Lfunc_end344-_Z31__device_stub__kernel_gradientzIiEvPKT_PS0_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii,"axG",@progbits,_Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii,comdat
	.weak	_Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii # -- Begin function _Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii
	.type	_Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii,@function
_Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii: # @_Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 20(%rsp)                  # 4-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	96(%rsp), %ebx
	movl	88(%rsp), %ebp
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movq	(%rsi), %rax
	movq	(%rax), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB345_2
# %bb.1:
	movl	%ebx, (%rsp)
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	20(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	callq	_Z36__device_stub__kernel_convolution_2dIiEvPKT_S2_PS0_iiii
.LBB345_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.103, %ecx
	movl	%eax, %edi
	movl	$1758, %edx                     # imm = 0x6DE
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.104, %ecx
	movl	%eax, %edi
	movl	$1759, %edx                     # imm = 0x6DF
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end345:
	.size	_Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii, .Lfunc_end345-_Z26cuda_kernel_convolution_2dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_convolution_2dIiEvPKT_S2_PS0_iiii,"axG",@progbits,_Z36__device_stub__kernel_convolution_2dIiEvPKT_S2_PS0_iiii,comdat
	.weak	_Z36__device_stub__kernel_convolution_2dIiEvPKT_S2_PS0_iiii # -- Begin function _Z36__device_stub__kernel_convolution_2dIiEvPKT_S2_PS0_iiii
	.type	_Z36__device_stub__kernel_convolution_2dIiEvPKT_S2_PS0_iiii,@function
_Z36__device_stub__kernel_convolution_2dIiEvPKT_S2_PS0_iiii: # @_Z36__device_stub__kernel_convolution_2dIiEvPKT_S2_PS0_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end346:
	.size	_Z36__device_stub__kernel_convolution_2dIiEvPKT_S2_PS0_iiii, .Lfunc_end346-_Z36__device_stub__kernel_convolution_2dIiEvPKT_S2_PS0_iiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii,"axG",@progbits,_Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii,comdat
	.weak	_Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii # -- Begin function _Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii
	.type	_Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii,@function
_Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii: # @_Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 4(%rsp)                   # 4-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	112(%rsp), %ebx
	movl	104(%rsp), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	96(%rsp), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	88(%rsp), %ebp
	movl	80(%rsp), %r13d
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	movl	8(%rax), %eax
	movq	(%rsi), %rcx
	movq	(%rcx), %rdx
	movl	8(%rcx), %ecx
	movl	%eax, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB347_2
# %bb.1:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z36__device_stub__kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB347_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.105, %ecx
	movl	%eax, %edi
	movl	$1770, %edx                     # imm = 0x6EA
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.106, %ecx
	movl	%eax, %edi
	movl	$1771, %edx                     # imm = 0x6EB
	movl	$1, %r8d
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end347:
	.size	_Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii, .Lfunc_end347-_Z26cuda_kernel_convolution_3dIiEvRSt6vectorIiSaIiEES3_PKT_S6_PS4_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii,"axG",@progbits,_Z36__device_stub__kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii,comdat
	.weak	_Z36__device_stub__kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii # -- Begin function _Z36__device_stub__kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii
	.type	_Z36__device_stub__kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii,@function
_Z36__device_stub__kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii: # @_Z36__device_stub__kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end348:
	.size	_Z36__device_stub__kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii, .Lfunc_end348-_Z36__device_stub__kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i # -- Begin function _Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i,@function
_Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i: # @_Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebx
	movl	%ecx, %ebp
	movq	%rdx, %r14
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB349_2
# %bb.1:
	movzwl	%bp, %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_Z28__device_stub__kernel_assignItEvPT_S0_i
.LBB349_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.7, %ecx
	movl	%eax, %edi
	movl	$1101, %edx                     # imm = 0x44D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.8, %ecx
	movl	%eax, %edi
	movl	$1102, %edx                     # imm = 0x44E
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end349:
	.size	_Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i, .Lfunc_end349-_Z18cuda_kernel_assignItEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__kernel_assignItEvPT_S0_i,"axG",@progbits,_Z28__device_stub__kernel_assignItEvPT_S0_i,comdat
	.weak	_Z28__device_stub__kernel_assignItEvPT_S0_i # -- Begin function _Z28__device_stub__kernel_assignItEvPT_S0_i
	.type	_Z28__device_stub__kernel_assignItEvPT_S0_i,@function
_Z28__device_stub__kernel_assignItEvPT_S0_i: # @_Z28__device_stub__kernel_assignItEvPT_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	2(%rsp), %rcx
	movw	%si, (%rcx)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13kernel_assignItEvPT_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end350:
	.size	_Z28__device_stub__kernel_assignItEvPT_S0_i, .Lfunc_end350-_Z28__device_stub__kernel_assignItEvPT_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB351_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_copyItEvPKT_PS0_i
.LBB351_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.9, %ecx
	movl	%eax, %edi
	movl	$1113, %edx                     # imm = 0x459
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.10, %ecx
	movl	%eax, %edi
	movl	$1114, %edx                     # imm = 0x45A
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end351:
	.size	_Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end351-_Z16cuda_kernel_copyItEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_copyItEvPKT_PS0_i,"axG",@progbits,_Z26__device_stub__kernel_copyItEvPKT_PS0_i,comdat
	.weak	_Z26__device_stub__kernel_copyItEvPKT_PS0_i # -- Begin function _Z26__device_stub__kernel_copyItEvPKT_PS0_i
	.type	_Z26__device_stub__kernel_copyItEvPKT_PS0_i,@function
_Z26__device_stub__kernel_copyItEvPKT_PS0_i: # @_Z26__device_stub__kernel_copyItEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_copyItEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end352:
	.size	_Z26__device_stub__kernel_copyItEvPKT_PS0_i, .Lfunc_end352-_Z26__device_stub__kernel_copyItEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i # -- Begin function _Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i,@function
_Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i: # @_Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebx
	movl	%ecx, %ebp
	movq	%rdx, %r14
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB353_2
# %bb.1:
	movq	%r14, %rdi
	movl	%ebp, %esi
	movl	%ebx, %edx
	callq	_Z28__device_stub__kernel_assignIjEvPT_S0_i
.LBB353_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.7, %ecx
	movl	%eax, %edi
	movl	$1101, %edx                     # imm = 0x44D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.8, %ecx
	movl	%eax, %edi
	movl	$1102, %edx                     # imm = 0x44E
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end353:
	.size	_Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i, .Lfunc_end353-_Z18cuda_kernel_assignIjEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__kernel_assignIjEvPT_S0_i,"axG",@progbits,_Z28__device_stub__kernel_assignIjEvPT_S0_i,comdat
	.weak	_Z28__device_stub__kernel_assignIjEvPT_S0_i # -- Begin function _Z28__device_stub__kernel_assignIjEvPT_S0_i
	.type	_Z28__device_stub__kernel_assignIjEvPT_S0_i,@function
_Z28__device_stub__kernel_assignIjEvPT_S0_i: # @_Z28__device_stub__kernel_assignIjEvPT_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13kernel_assignIjEvPT_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end354:
	.size	_Z28__device_stub__kernel_assignIjEvPT_S0_i, .Lfunc_end354-_Z28__device_stub__kernel_assignIjEvPT_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB355_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_copyIjEvPKT_PS0_i
.LBB355_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.9, %ecx
	movl	%eax, %edi
	movl	$1113, %edx                     # imm = 0x459
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.10, %ecx
	movl	%eax, %edi
	movl	$1114, %edx                     # imm = 0x45A
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end355:
	.size	_Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end355-_Z16cuda_kernel_copyIjEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_copyIjEvPKT_PS0_i,"axG",@progbits,_Z26__device_stub__kernel_copyIjEvPKT_PS0_i,comdat
	.weak	_Z26__device_stub__kernel_copyIjEvPKT_PS0_i # -- Begin function _Z26__device_stub__kernel_copyIjEvPKT_PS0_i
	.type	_Z26__device_stub__kernel_copyIjEvPKT_PS0_i,@function
_Z26__device_stub__kernel_copyIjEvPKT_PS0_i: # @_Z26__device_stub__kernel_copyIjEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_copyIjEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end356:
	.size	_Z26__device_stub__kernel_copyIjEvPKT_PS0_i, .Lfunc_end356-_Z26__device_stub__kernel_copyIjEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i # -- Begin function _Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i,@function
_Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i: # @_Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebx
	movl	%ecx, %ebp
	movq	%rdx, %r14
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB357_2
# %bb.1:
	movzbl	%bpl, %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_Z28__device_stub__kernel_assignIhEvPT_S0_i
.LBB357_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.7, %ecx
	movl	%eax, %edi
	movl	$1101, %edx                     # imm = 0x44D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.8, %ecx
	movl	%eax, %edi
	movl	$1102, %edx                     # imm = 0x44E
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end357:
	.size	_Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i, .Lfunc_end357-_Z18cuda_kernel_assignIhEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__kernel_assignIhEvPT_S0_i,"axG",@progbits,_Z28__device_stub__kernel_assignIhEvPT_S0_i,comdat
	.weak	_Z28__device_stub__kernel_assignIhEvPT_S0_i # -- Begin function _Z28__device_stub__kernel_assignIhEvPT_S0_i
	.type	_Z28__device_stub__kernel_assignIhEvPT_S0_i,@function
_Z28__device_stub__kernel_assignIhEvPT_S0_i: # @_Z28__device_stub__kernel_assignIhEvPT_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	3(%rsp), %rcx
	movb	%sil, (%rcx)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13kernel_assignIhEvPT_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end358:
	.size	_Z28__device_stub__kernel_assignIhEvPT_S0_i, .Lfunc_end358-_Z28__device_stub__kernel_assignIhEvPT_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB359_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_copyIhEvPKT_PS0_i
.LBB359_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.9, %ecx
	movl	%eax, %edi
	movl	$1113, %edx                     # imm = 0x459
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.10, %ecx
	movl	%eax, %edi
	movl	$1114, %edx                     # imm = 0x45A
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end359:
	.size	_Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end359-_Z16cuda_kernel_copyIhEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_copyIhEvPKT_PS0_i,"axG",@progbits,_Z26__device_stub__kernel_copyIhEvPKT_PS0_i,comdat
	.weak	_Z26__device_stub__kernel_copyIhEvPKT_PS0_i # -- Begin function _Z26__device_stub__kernel_copyIhEvPKT_PS0_i
	.type	_Z26__device_stub__kernel_copyIhEvPKT_PS0_i,@function
_Z26__device_stub__kernel_copyIhEvPKT_PS0_i: # @_Z26__device_stub__kernel_copyIhEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_copyIhEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end360:
	.size	_Z26__device_stub__kernel_copyIhEvPKT_PS0_i, .Lfunc_end360-_Z26__device_stub__kernel_copyIhEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i # -- Begin function _Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i,@function
_Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i: # @_Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebx
	movl	%ecx, %ebp
	movq	%rdx, %r14
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB361_2
# %bb.1:
	movswl	%bp, %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_Z28__device_stub__kernel_assignIsEvPT_S0_i
.LBB361_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.7, %ecx
	movl	%eax, %edi
	movl	$1101, %edx                     # imm = 0x44D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.8, %ecx
	movl	%eax, %edi
	movl	$1102, %edx                     # imm = 0x44E
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end361:
	.size	_Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i, .Lfunc_end361-_Z18cuda_kernel_assignIsEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__kernel_assignIsEvPT_S0_i,"axG",@progbits,_Z28__device_stub__kernel_assignIsEvPT_S0_i,comdat
	.weak	_Z28__device_stub__kernel_assignIsEvPT_S0_i # -- Begin function _Z28__device_stub__kernel_assignIsEvPT_S0_i
	.type	_Z28__device_stub__kernel_assignIsEvPT_S0_i,@function
_Z28__device_stub__kernel_assignIsEvPT_S0_i: # @_Z28__device_stub__kernel_assignIsEvPT_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	2(%rsp), %rcx
	movw	%si, (%rcx)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13kernel_assignIsEvPT_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end362:
	.size	_Z28__device_stub__kernel_assignIsEvPT_S0_i, .Lfunc_end362-_Z28__device_stub__kernel_assignIsEvPT_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB363_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_copyIsEvPKT_PS0_i
.LBB363_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.9, %ecx
	movl	%eax, %edi
	movl	$1113, %edx                     # imm = 0x459
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.10, %ecx
	movl	%eax, %edi
	movl	$1114, %edx                     # imm = 0x45A
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end363:
	.size	_Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end363-_Z16cuda_kernel_copyIsEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_copyIsEvPKT_PS0_i,"axG",@progbits,_Z26__device_stub__kernel_copyIsEvPKT_PS0_i,comdat
	.weak	_Z26__device_stub__kernel_copyIsEvPKT_PS0_i # -- Begin function _Z26__device_stub__kernel_copyIsEvPKT_PS0_i
	.type	_Z26__device_stub__kernel_copyIsEvPKT_PS0_i,@function
_Z26__device_stub__kernel_copyIsEvPKT_PS0_i: # @_Z26__device_stub__kernel_copyIsEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_copyIsEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end364:
	.size	_Z26__device_stub__kernel_copyIsEvPKT_PS0_i, .Lfunc_end364-_Z26__device_stub__kernel_copyIsEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i,"axG",@progbits,_Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i,comdat
	.weak	_Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i # -- Begin function _Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i
	.type	_Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i,@function
_Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i: # @_Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebx
	movl	%ecx, %ebp
	movq	%rdx, %r14
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB365_2
# %bb.1:
	movsbl	%bpl, %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_Z28__device_stub__kernel_assignIcEvPT_S0_i
.LBB365_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.7, %ecx
	movl	%eax, %edi
	movl	$1101, %edx                     # imm = 0x44D
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.8, %ecx
	movl	%eax, %edi
	movl	$1102, %edx                     # imm = 0x44E
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end365:
	.size	_Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i, .Lfunc_end365-_Z18cuda_kernel_assignIcEvRSt6vectorIiSaIiEES3_PT_S4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__kernel_assignIcEvPT_S0_i,"axG",@progbits,_Z28__device_stub__kernel_assignIcEvPT_S0_i,comdat
	.weak	_Z28__device_stub__kernel_assignIcEvPT_S0_i # -- Begin function _Z28__device_stub__kernel_assignIcEvPT_S0_i
	.type	_Z28__device_stub__kernel_assignIcEvPT_S0_i,@function
_Z28__device_stub__kernel_assignIcEvPT_S0_i: # @_Z28__device_stub__kernel_assignIcEvPT_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	3(%rsp), %rcx
	movb	%sil, (%rcx)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13kernel_assignIcEvPT_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end366:
	.size	_Z28__device_stub__kernel_assignIcEvPT_S0_i, .Lfunc_end366-_Z28__device_stub__kernel_assignIcEvPT_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i,"axG",@progbits,_Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i,comdat
	.weak	_Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i # -- Begin function _Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.type	_Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i,@function
_Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i: # @_Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %ebx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	btsq	$32, %rdi
	movq	(%rsi), %rax
	movl	(%rax), %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB367_2
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__kernel_copyIcEvPKT_PS0_i
.LBB367_2:
	callq	hipPeekAtLastError
	movl	$.L.str.1, %esi
	movl	$.L.str.9, %ecx
	movl	%eax, %edi
	movl	$1113, %edx                     # imm = 0x459
	movl	$1, %r8d
	callq	_Z25imart_assert_kernel_error10hipError_tPKciS1_b
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %esi
	movl	$.L.str.10, %ecx
	movl	%eax, %edi
	movl	$1114, %edx                     # imm = 0x45A
	movl	$1, %r8d
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z25imart_assert_kernel_error10hipError_tPKciS1_b # TAILCALL
.Lfunc_end367:
	.size	_Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i, .Lfunc_end367-_Z16cuda_kernel_copyIcEvRSt6vectorIiSaIiEES3_PKT_PS4_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__kernel_copyIcEvPKT_PS0_i,"axG",@progbits,_Z26__device_stub__kernel_copyIcEvPKT_PS0_i,comdat
	.weak	_Z26__device_stub__kernel_copyIcEvPKT_PS0_i # -- Begin function _Z26__device_stub__kernel_copyIcEvPKT_PS0_i
	.type	_Z26__device_stub__kernel_copyIcEvPKT_PS0_i,@function
_Z26__device_stub__kernel_copyIcEvPKT_PS0_i: # @_Z26__device_stub__kernel_copyIcEvPKT_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_copyIcEvPKT_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end368:
	.size	_Z26__device_stub__kernel_copyIcEvPKT_PS0_i, .Lfunc_end368-_Z26__device_stub__kernel_copyIcEvPKT_PS0_i
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB369_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB369_2:
	subq	$32, %rsp
	.cfi_adjust_cfa_offset 32
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIfdEvPKT_PT0_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIdfEvPKT_PT0_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIifEvPKT_PT0_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIfiEvPKT_PT0_i, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIidEvPKT_PT0_i, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIdiEvPKT_PT0_i, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIftEvPKT_PT0_i, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castItfEvPKT_PT0_i, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIdtEvPKT_PT0_i, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castItdEvPKT_PT0_i, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIfjEvPKT_PT0_i, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIjfEvPKT_PT0_i, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIdjEvPKT_PT0_i, %esi
	movl	$.L__unnamed_13, %edx
	movl	$.L__unnamed_13, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIjdEvPKT_PT0_i, %esi
	movl	$.L__unnamed_14, %edx
	movl	$.L__unnamed_14, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIfhEvPKT_PT0_i, %esi
	movl	$.L__unnamed_15, %edx
	movl	$.L__unnamed_15, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIhfEvPKT_PT0_i, %esi
	movl	$.L__unnamed_16, %edx
	movl	$.L__unnamed_16, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIdhEvPKT_PT0_i, %esi
	movl	$.L__unnamed_17, %edx
	movl	$.L__unnamed_17, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIhdEvPKT_PT0_i, %esi
	movl	$.L__unnamed_18, %edx
	movl	$.L__unnamed_18, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIffEvPKT_PT0_i, %esi
	movl	$.L__unnamed_19, %edx
	movl	$.L__unnamed_19, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_castIddEvPKT_PT0_i, %esi
	movl	$.L__unnamed_20, %edx
	movl	$.L__unnamed_20, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13kernel_assignIfEvPT_S0_i, %esi
	movl	$.L__unnamed_21, %edx
	movl	$.L__unnamed_21, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_copyIfEvPKT_PS0_i, %esi
	movl	$.L__unnamed_22, %edx
	movl	$.L__unnamed_22, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10kernel_addIfEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_23, %edx
	movl	$.L__unnamed_23, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10kernel_subIfEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_24, %edx
	movl	$.L__unnamed_24, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10kernel_mulIfEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_25, %edx
	movl	$.L__unnamed_25, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10kernel_divIfEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_26, %edx
	movl	$.L__unnamed_26, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10kernel_powIfEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_27, %edx
	movl	$.L__unnamed_27, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17kernel_add_scalarIfEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_28, %edx
	movl	$.L__unnamed_28, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_29, %edx
	movl	$.L__unnamed_29, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_30, %edx
	movl	$.L__unnamed_30, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_31, %edx
	movl	$.L__unnamed_31, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17kernel_div_scalarIfEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_32, %edx
	movl	$.L__unnamed_32, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_33, %edx
	movl	$.L__unnamed_33, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_34, %edx
	movl	$.L__unnamed_34, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_35, %edx
	movl	$.L__unnamed_35, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12kernel_equalIfEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_36, %edx
	movl	$.L__unnamed_36, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14kernel_greaterIfEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_37, %edx
	movl	$.L__unnamed_37, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_lessIfEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_38, %edx
	movl	$.L__unnamed_38, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20kernel_greater_equalIfEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_39, %edx
	movl	$.L__unnamed_39, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17kernel_less_equalIfEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_40, %edx
	movl	$.L__unnamed_40, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_41, %edx
	movl	$.L__unnamed_41, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_42, %edx
	movl	$.L__unnamed_42, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18kernel_less_scalarIfEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_43, %edx
	movl	$.L__unnamed_43, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_44, %edx
	movl	$.L__unnamed_44, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_45, %edx
	movl	$.L__unnamed_45, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14kernel_replaceIfEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_46, %edx
	movl	$.L__unnamed_46, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_47, %edx
	movl	$.L__unnamed_47, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10kernel_sumIfEvPKT_PS0_i, %esi
	movl	$.L__unnamed_48, %edx
	movl	$.L__unnamed_48, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10kernel_minIfEvPKT_PS0_i, %esi
	movl	$.L__unnamed_49, %edx
	movl	$.L__unnamed_49, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10kernel_maxIfEvPKT_PS0_i, %esi
	movl	$.L__unnamed_50, %edx
	movl	$.L__unnamed_50, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii, %esi
	movl	$.L__unnamed_51, %edx
	movl	$.L__unnamed_51, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii, %esi
	movl	$.L__unnamed_52, %edx
	movl	$.L__unnamed_52, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii, %esi
	movl	$.L__unnamed_53, %edx
	movl	$.L__unnamed_53, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii, %esi
	movl	$.L__unnamed_54, %edx
	movl	$.L__unnamed_54, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z14kernel_grid_2dIfEvPT_S1_Pdii, %esi
	movl	$.L__unnamed_55, %edx
	movl	$.L__unnamed_55, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii, %esi
	movl	$.L__unnamed_56, %edx
	movl	$.L__unnamed_56, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i, %esi
	movl	$.L__unnamed_57, %edx
	movl	$.L__unnamed_57, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i, %esi
	movl	$.L__unnamed_58, %edx
	movl	$.L__unnamed_58, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi, %esi
	movl	$.L__unnamed_59, %edx
	movl	$.L__unnamed_59, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi, %esi
	movl	$.L__unnamed_60, %edx
	movl	$.L__unnamed_60, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i, %esi
	movl	$.L__unnamed_61, %edx
	movl	$.L__unnamed_61, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, %esi
	movl	$.L__unnamed_62, %edx
	movl	$.L__unnamed_62, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, %esi
	movl	$.L__unnamed_63, %edx
	movl	$.L__unnamed_63, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii, %esi
	movl	$.L__unnamed_64, %edx
	movl	$.L__unnamed_64, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, %esi
	movl	$.L__unnamed_65, %edx
	movl	$.L__unnamed_65, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii, %esi
	movl	$.L__unnamed_66, %edx
	movl	$.L__unnamed_66, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, %esi
	movl	$.L__unnamed_67, %edx
	movl	$.L__unnamed_67, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_gradientxIfEvPKT_PS0_iii, %esi
	movl	$.L__unnamed_68, %edx
	movl	$.L__unnamed_68, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_gradientyIfEvPKT_PS0_iii, %esi
	movl	$.L__unnamed_69, %edx
	movl	$.L__unnamed_69, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_gradientzIfEvPKT_PS0_iii, %esi
	movl	$.L__unnamed_70, %edx
	movl	$.L__unnamed_70, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii, %esi
	movl	$.L__unnamed_71, %edx
	movl	$.L__unnamed_71, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii, %esi
	movl	$.L__unnamed_72, %edx
	movl	$.L__unnamed_72, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z13kernel_assignIdEvPT_S0_i, %esi
	movl	$.L__unnamed_73, %edx
	movl	$.L__unnamed_73, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z11kernel_copyIdEvPKT_PS0_i, %esi
	movl	$.L__unnamed_74, %edx
	movl	$.L__unnamed_74, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_addIdEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_75, %edx
	movl	$.L__unnamed_75, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_subIdEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_76, %edx
	movl	$.L__unnamed_76, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_mulIdEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_77, %edx
	movl	$.L__unnamed_77, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_divIdEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_78, %edx
	movl	$.L__unnamed_78, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_powIdEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_79, %edx
	movl	$.L__unnamed_79, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z17kernel_add_scalarIdEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_80, %edx
	movl	$.L__unnamed_80, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_81, %edx
	movl	$.L__unnamed_81, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_82, %edx
	movl	$.L__unnamed_82, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_83, %edx
	movl	$.L__unnamed_83, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z17kernel_div_scalarIdEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_84, %edx
	movl	$.L__unnamed_84, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_85, %edx
	movl	$.L__unnamed_85, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_86, %edx
	movl	$.L__unnamed_86, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_87, %edx
	movl	$.L__unnamed_87, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z12kernel_equalIdEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_88, %edx
	movl	$.L__unnamed_88, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z14kernel_greaterIdEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_89, %edx
	movl	$.L__unnamed_89, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z11kernel_lessIdEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_90, %edx
	movl	$.L__unnamed_90, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z20kernel_greater_equalIdEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_91, %edx
	movl	$.L__unnamed_91, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z17kernel_less_equalIdEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_92, %edx
	movl	$.L__unnamed_92, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_93, %edx
	movl	$.L__unnamed_93, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_94, %edx
	movl	$.L__unnamed_94, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z18kernel_less_scalarIdEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_95, %edx
	movl	$.L__unnamed_95, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_96, %edx
	movl	$.L__unnamed_96, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_97, %edx
	movl	$.L__unnamed_97, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z14kernel_replaceIdEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_98, %edx
	movl	$.L__unnamed_98, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_99, %edx
	movl	$.L__unnamed_99, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_sumIdEvPKT_PS0_i, %esi
	movl	$.L__unnamed_100, %edx
	movl	$.L__unnamed_100, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_minIdEvPKT_PS0_i, %esi
	movl	$.L__unnamed_101, %edx
	movl	$.L__unnamed_101, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_maxIdEvPKT_PS0_i, %esi
	movl	$.L__unnamed_102, %edx
	movl	$.L__unnamed_102, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii, %esi
	movl	$.L__unnamed_103, %edx
	movl	$.L__unnamed_103, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii, %esi
	movl	$.L__unnamed_104, %edx
	movl	$.L__unnamed_104, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii, %esi
	movl	$.L__unnamed_105, %edx
	movl	$.L__unnamed_105, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii, %esi
	movl	$.L__unnamed_106, %edx
	movl	$.L__unnamed_106, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z14kernel_grid_2dIdEvPT_S1_Pdii, %esi
	movl	$.L__unnamed_107, %edx
	movl	$.L__unnamed_107, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii, %esi
	movl	$.L__unnamed_108, %edx
	movl	$.L__unnamed_108, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i, %esi
	movl	$.L__unnamed_109, %edx
	movl	$.L__unnamed_109, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i, %esi
	movl	$.L__unnamed_110, %edx
	movl	$.L__unnamed_110, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi, %esi
	movl	$.L__unnamed_111, %edx
	movl	$.L__unnamed_111, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi, %esi
	movl	$.L__unnamed_112, %edx
	movl	$.L__unnamed_112, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i, %esi
	movl	$.L__unnamed_113, %edx
	movl	$.L__unnamed_113, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, %esi
	movl	$.L__unnamed_114, %edx
	movl	$.L__unnamed_114, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, %esi
	movl	$.L__unnamed_115, %edx
	movl	$.L__unnamed_115, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, %esi
	movl	$.L__unnamed_116, %edx
	movl	$.L__unnamed_116, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, %esi
	movl	$.L__unnamed_117, %edx
	movl	$.L__unnamed_117, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, %esi
	movl	$.L__unnamed_118, %edx
	movl	$.L__unnamed_118, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, %esi
	movl	$.L__unnamed_119, %edx
	movl	$.L__unnamed_119, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, %esi
	movl	$.L__unnamed_120, %edx
	movl	$.L__unnamed_120, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_gradientxIdEvPKT_PS0_iii, %esi
	movl	$.L__unnamed_121, %edx
	movl	$.L__unnamed_121, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_gradientyIdEvPKT_PS0_iii, %esi
	movl	$.L__unnamed_122, %edx
	movl	$.L__unnamed_122, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_gradientzIdEvPKT_PS0_iii, %esi
	movl	$.L__unnamed_123, %edx
	movl	$.L__unnamed_123, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii, %esi
	movl	$.L__unnamed_124, %edx
	movl	$.L__unnamed_124, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii, %esi
	movl	$.L__unnamed_125, %edx
	movl	$.L__unnamed_125, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z13kernel_assignIiEvPT_S0_i, %esi
	movl	$.L__unnamed_126, %edx
	movl	$.L__unnamed_126, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z11kernel_copyIiEvPKT_PS0_i, %esi
	movl	$.L__unnamed_127, %edx
	movl	$.L__unnamed_127, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_addIiEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_128, %edx
	movl	$.L__unnamed_128, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_subIiEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_129, %edx
	movl	$.L__unnamed_129, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_mulIiEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_130, %edx
	movl	$.L__unnamed_130, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_divIiEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_131, %edx
	movl	$.L__unnamed_131, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_powIiEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_132, %edx
	movl	$.L__unnamed_132, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z17kernel_add_scalarIiEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_133, %edx
	movl	$.L__unnamed_133, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_134, %edx
	movl	$.L__unnamed_134, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_135, %edx
	movl	$.L__unnamed_135, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_136, %edx
	movl	$.L__unnamed_136, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z17kernel_div_scalarIiEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_137, %edx
	movl	$.L__unnamed_137, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_138, %edx
	movl	$.L__unnamed_138, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_139, %edx
	movl	$.L__unnamed_139, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_140, %edx
	movl	$.L__unnamed_140, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z12kernel_equalIiEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_141, %edx
	movl	$.L__unnamed_141, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z14kernel_greaterIiEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_142, %edx
	movl	$.L__unnamed_142, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z11kernel_lessIiEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_143, %edx
	movl	$.L__unnamed_143, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z20kernel_greater_equalIiEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_144, %edx
	movl	$.L__unnamed_144, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z17kernel_less_equalIiEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_145, %edx
	movl	$.L__unnamed_145, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_146, %edx
	movl	$.L__unnamed_146, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_147, %edx
	movl	$.L__unnamed_147, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z18kernel_less_scalarIiEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_148, %edx
	movl	$.L__unnamed_148, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_149, %edx
	movl	$.L__unnamed_149, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_150, %edx
	movl	$.L__unnamed_150, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z14kernel_replaceIiEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_151, %edx
	movl	$.L__unnamed_151, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i, %esi
	movl	$.L__unnamed_152, %edx
	movl	$.L__unnamed_152, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_sumIiEvPKT_PS0_i, %esi
	movl	$.L__unnamed_153, %edx
	movl	$.L__unnamed_153, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_minIiEvPKT_PS0_i, %esi
	movl	$.L__unnamed_154, %edx
	movl	$.L__unnamed_154, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z10kernel_maxIiEvPKT_PS0_i, %esi
	movl	$.L__unnamed_155, %edx
	movl	$.L__unnamed_155, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii, %esi
	movl	$.L__unnamed_156, %edx
	movl	$.L__unnamed_156, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii, %esi
	movl	$.L__unnamed_157, %edx
	movl	$.L__unnamed_157, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii, %esi
	movl	$.L__unnamed_158, %edx
	movl	$.L__unnamed_158, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii, %esi
	movl	$.L__unnamed_159, %edx
	movl	$.L__unnamed_159, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z14kernel_grid_2dIiEvPT_S1_Pdii, %esi
	movl	$.L__unnamed_160, %edx
	movl	$.L__unnamed_160, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii, %esi
	movl	$.L__unnamed_161, %edx
	movl	$.L__unnamed_161, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i, %esi
	movl	$.L__unnamed_162, %edx
	movl	$.L__unnamed_162, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i, %esi
	movl	$.L__unnamed_163, %edx
	movl	$.L__unnamed_163, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi, %esi
	movl	$.L__unnamed_164, %edx
	movl	$.L__unnamed_164, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi, %esi
	movl	$.L__unnamed_165, %edx
	movl	$.L__unnamed_165, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i, %esi
	movl	$.L__unnamed_166, %edx
	movl	$.L__unnamed_166, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, %esi
	movl	$.L__unnamed_167, %edx
	movl	$.L__unnamed_167, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_gradientxIiEvPKT_PS0_iii, %esi
	movl	$.L__unnamed_168, %edx
	movl	$.L__unnamed_168, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_gradientyIiEvPKT_PS0_iii, %esi
	movl	$.L__unnamed_169, %edx
	movl	$.L__unnamed_169, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z16kernel_gradientzIiEvPKT_PS0_iii, %esi
	movl	$.L__unnamed_170, %edx
	movl	$.L__unnamed_170, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii, %esi
	movl	$.L__unnamed_171, %edx
	movl	$.L__unnamed_171, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii, %esi
	movl	$.L__unnamed_172, %edx
	movl	$.L__unnamed_172, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z13kernel_assignItEvPT_S0_i, %esi
	movl	$.L__unnamed_173, %edx
	movl	$.L__unnamed_173, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z11kernel_copyItEvPKT_PS0_i, %esi
	movl	$.L__unnamed_174, %edx
	movl	$.L__unnamed_174, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z13kernel_assignIjEvPT_S0_i, %esi
	movl	$.L__unnamed_175, %edx
	movl	$.L__unnamed_175, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z11kernel_copyIjEvPKT_PS0_i, %esi
	movl	$.L__unnamed_176, %edx
	movl	$.L__unnamed_176, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z13kernel_assignIhEvPT_S0_i, %esi
	movl	$.L__unnamed_177, %edx
	movl	$.L__unnamed_177, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z11kernel_copyIhEvPKT_PS0_i, %esi
	movl	$.L__unnamed_178, %edx
	movl	$.L__unnamed_178, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z13kernel_assignIsEvPT_S0_i, %esi
	movl	$.L__unnamed_179, %edx
	movl	$.L__unnamed_179, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z11kernel_copyIsEvPKT_PS0_i, %esi
	movl	$.L__unnamed_180, %edx
	movl	$.L__unnamed_180, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z13kernel_assignIcEvPT_S0_i, %esi
	movl	$.L__unnamed_181, %edx
	movl	$.L__unnamed_181, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$_Z11kernel_copyIcEvPKT_PS0_i, %esi
	movl	$.L__unnamed_182, %edx
	movl	$.L__unnamed_182, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$__hip_module_dtor, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end369:
	.size	__hip_module_ctor, .Lfunc_end369-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB370_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB370_2:
	retq
.Lfunc_end370:
	.size	__hip_module_dtor, .Lfunc_end370-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\n******* CUDA Error *******\n[Error] Information:\t%s\n[Error] Error code:\t%i\n[Error] Description:\t%s\n[Error] File:\t\t%s\n[Error] Line:\t\t%d\n"
	.size	.L.str, 136

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/acamargosonosa/imart/main/src/cuda/kernels.hip"
	.size	.L.str.1, 109

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Error copy device to device, real to complex"
	.size	.L.str.2, 45

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Error copy device to device, imaginary to complex"
	.size	.L.str.3, 50

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Error copy device to device, complex to real"
	.size	.L.str.4, 45

	.type	_Z11kernel_castIfdEvPKT_PT0_i,@object # @_Z11kernel_castIfdEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIfdEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIfdEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIfdEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIfdEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIfdEvPKT_PT0_i
	.size	_Z11kernel_castIfdEvPKT_PT0_i, 8

	.type	.L.str.5,@object                # @.str.5
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.5:
	.asciz	"Fail to run kernel cast"
	.size	.L.str.5, 24

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Fail to sync kernel cast"
	.size	.L.str.6, 25

	.type	_Z11kernel_castIdfEvPKT_PT0_i,@object # @_Z11kernel_castIdfEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIdfEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIdfEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIdfEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIdfEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIdfEvPKT_PT0_i
	.size	_Z11kernel_castIdfEvPKT_PT0_i, 8

	.type	_Z11kernel_castIifEvPKT_PT0_i,@object # @_Z11kernel_castIifEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIifEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIifEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIifEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIifEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIifEvPKT_PT0_i
	.size	_Z11kernel_castIifEvPKT_PT0_i, 8

	.type	_Z11kernel_castIfiEvPKT_PT0_i,@object # @_Z11kernel_castIfiEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIfiEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIfiEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIfiEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIfiEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIfiEvPKT_PT0_i
	.size	_Z11kernel_castIfiEvPKT_PT0_i, 8

	.type	_Z11kernel_castIidEvPKT_PT0_i,@object # @_Z11kernel_castIidEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIidEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIidEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIidEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIidEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIidEvPKT_PT0_i
	.size	_Z11kernel_castIidEvPKT_PT0_i, 8

	.type	_Z11kernel_castIdiEvPKT_PT0_i,@object # @_Z11kernel_castIdiEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIdiEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIdiEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIdiEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIdiEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIdiEvPKT_PT0_i
	.size	_Z11kernel_castIdiEvPKT_PT0_i, 8

	.type	_Z11kernel_castIftEvPKT_PT0_i,@object # @_Z11kernel_castIftEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIftEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIftEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIftEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIftEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIftEvPKT_PT0_i
	.size	_Z11kernel_castIftEvPKT_PT0_i, 8

	.type	_Z11kernel_castItfEvPKT_PT0_i,@object # @_Z11kernel_castItfEvPKT_PT0_i
	.section	.rodata._Z11kernel_castItfEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castItfEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castItfEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castItfEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castItfEvPKT_PT0_i
	.size	_Z11kernel_castItfEvPKT_PT0_i, 8

	.type	_Z11kernel_castIdtEvPKT_PT0_i,@object # @_Z11kernel_castIdtEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIdtEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIdtEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIdtEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIdtEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIdtEvPKT_PT0_i
	.size	_Z11kernel_castIdtEvPKT_PT0_i, 8

	.type	_Z11kernel_castItdEvPKT_PT0_i,@object # @_Z11kernel_castItdEvPKT_PT0_i
	.section	.rodata._Z11kernel_castItdEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castItdEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castItdEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castItdEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castItdEvPKT_PT0_i
	.size	_Z11kernel_castItdEvPKT_PT0_i, 8

	.type	_Z11kernel_castIfjEvPKT_PT0_i,@object # @_Z11kernel_castIfjEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIfjEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIfjEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIfjEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIfjEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIfjEvPKT_PT0_i
	.size	_Z11kernel_castIfjEvPKT_PT0_i, 8

	.type	_Z11kernel_castIjfEvPKT_PT0_i,@object # @_Z11kernel_castIjfEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIjfEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIjfEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIjfEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIjfEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIjfEvPKT_PT0_i
	.size	_Z11kernel_castIjfEvPKT_PT0_i, 8

	.type	_Z11kernel_castIdjEvPKT_PT0_i,@object # @_Z11kernel_castIdjEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIdjEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIdjEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIdjEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIdjEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIdjEvPKT_PT0_i
	.size	_Z11kernel_castIdjEvPKT_PT0_i, 8

	.type	_Z11kernel_castIjdEvPKT_PT0_i,@object # @_Z11kernel_castIjdEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIjdEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIjdEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIjdEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIjdEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIjdEvPKT_PT0_i
	.size	_Z11kernel_castIjdEvPKT_PT0_i, 8

	.type	_Z11kernel_castIfhEvPKT_PT0_i,@object # @_Z11kernel_castIfhEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIfhEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIfhEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIfhEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIfhEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIfhEvPKT_PT0_i
	.size	_Z11kernel_castIfhEvPKT_PT0_i, 8

	.type	_Z11kernel_castIhfEvPKT_PT0_i,@object # @_Z11kernel_castIhfEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIhfEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIhfEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIhfEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIhfEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIhfEvPKT_PT0_i
	.size	_Z11kernel_castIhfEvPKT_PT0_i, 8

	.type	_Z11kernel_castIdhEvPKT_PT0_i,@object # @_Z11kernel_castIdhEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIdhEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIdhEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIdhEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIdhEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIdhEvPKT_PT0_i
	.size	_Z11kernel_castIdhEvPKT_PT0_i, 8

	.type	_Z11kernel_castIhdEvPKT_PT0_i,@object # @_Z11kernel_castIhdEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIhdEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIhdEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIhdEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIhdEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIhdEvPKT_PT0_i
	.size	_Z11kernel_castIhdEvPKT_PT0_i, 8

	.type	_Z11kernel_castIffEvPKT_PT0_i,@object # @_Z11kernel_castIffEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIffEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIffEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIffEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIffEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIffEvPKT_PT0_i
	.size	_Z11kernel_castIffEvPKT_PT0_i, 8

	.type	_Z11kernel_castIddEvPKT_PT0_i,@object # @_Z11kernel_castIddEvPKT_PT0_i
	.section	.rodata._Z11kernel_castIddEvPKT_PT0_i,"aG",@progbits,_Z11kernel_castIddEvPKT_PT0_i,comdat
	.weak	_Z11kernel_castIddEvPKT_PT0_i
	.p2align	3, 0x0
_Z11kernel_castIddEvPKT_PT0_i:
	.quad	_Z26__device_stub__kernel_castIddEvPKT_PT0_i
	.size	_Z11kernel_castIddEvPKT_PT0_i, 8

	.type	_Z13kernel_assignIfEvPT_S0_i,@object # @_Z13kernel_assignIfEvPT_S0_i
	.section	.rodata._Z13kernel_assignIfEvPT_S0_i,"aG",@progbits,_Z13kernel_assignIfEvPT_S0_i,comdat
	.weak	_Z13kernel_assignIfEvPT_S0_i
	.p2align	3, 0x0
_Z13kernel_assignIfEvPT_S0_i:
	.quad	_Z28__device_stub__kernel_assignIfEvPT_S0_i
	.size	_Z13kernel_assignIfEvPT_S0_i, 8

	.type	.L.str.7,@object                # @.str.7
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.7:
	.asciz	"Fail to run kernel assign"
	.size	.L.str.7, 26

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Fail to sync kernel assign"
	.size	.L.str.8, 27

	.type	_Z11kernel_copyIfEvPKT_PS0_i,@object # @_Z11kernel_copyIfEvPKT_PS0_i
	.section	.rodata._Z11kernel_copyIfEvPKT_PS0_i,"aG",@progbits,_Z11kernel_copyIfEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyIfEvPKT_PS0_i
	.p2align	3, 0x0
_Z11kernel_copyIfEvPKT_PS0_i:
	.quad	_Z26__device_stub__kernel_copyIfEvPKT_PS0_i
	.size	_Z11kernel_copyIfEvPKT_PS0_i, 8

	.type	.L.str.9,@object                # @.str.9
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.9:
	.asciz	"Fail to run kernel copy"
	.size	.L.str.9, 24

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Fail to sync kernel copy"
	.size	.L.str.10, 25

	.type	_Z10kernel_addIfEvPKT_S2_PS0_i,@object # @_Z10kernel_addIfEvPKT_S2_PS0_i
	.section	.rodata._Z10kernel_addIfEvPKT_S2_PS0_i,"aG",@progbits,_Z10kernel_addIfEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_addIfEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z10kernel_addIfEvPKT_S2_PS0_i:
	.quad	_Z25__device_stub__kernel_addIfEvPKT_S2_PS0_i
	.size	_Z10kernel_addIfEvPKT_S2_PS0_i, 8

	.type	.L.str.11,@object               # @.str.11
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.11:
	.asciz	"Fail to run kernel add"
	.size	.L.str.11, 23

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Fail to sync kernel add"
	.size	.L.str.12, 24

	.type	_Z10kernel_subIfEvPKT_S2_PS0_i,@object # @_Z10kernel_subIfEvPKT_S2_PS0_i
	.section	.rodata._Z10kernel_subIfEvPKT_S2_PS0_i,"aG",@progbits,_Z10kernel_subIfEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_subIfEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z10kernel_subIfEvPKT_S2_PS0_i:
	.quad	_Z25__device_stub__kernel_subIfEvPKT_S2_PS0_i
	.size	_Z10kernel_subIfEvPKT_S2_PS0_i, 8

	.type	.L.str.13,@object               # @.str.13
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.13:
	.asciz	"Fail to run kernel sub"
	.size	.L.str.13, 23

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Fail to sync kernel sub"
	.size	.L.str.14, 24

	.type	_Z10kernel_mulIfEvPKT_S2_PS0_i,@object # @_Z10kernel_mulIfEvPKT_S2_PS0_i
	.section	.rodata._Z10kernel_mulIfEvPKT_S2_PS0_i,"aG",@progbits,_Z10kernel_mulIfEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_mulIfEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z10kernel_mulIfEvPKT_S2_PS0_i:
	.quad	_Z25__device_stub__kernel_mulIfEvPKT_S2_PS0_i
	.size	_Z10kernel_mulIfEvPKT_S2_PS0_i, 8

	.type	.L.str.15,@object               # @.str.15
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.15:
	.asciz	"Fail to run kernel mul"
	.size	.L.str.15, 23

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"Fail to sync kernel mul"
	.size	.L.str.16, 24

	.type	_Z10kernel_divIfEvPKT_S2_PS0_i,@object # @_Z10kernel_divIfEvPKT_S2_PS0_i
	.section	.rodata._Z10kernel_divIfEvPKT_S2_PS0_i,"aG",@progbits,_Z10kernel_divIfEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_divIfEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z10kernel_divIfEvPKT_S2_PS0_i:
	.quad	_Z25__device_stub__kernel_divIfEvPKT_S2_PS0_i
	.size	_Z10kernel_divIfEvPKT_S2_PS0_i, 8

	.type	.L.str.17,@object               # @.str.17
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.17:
	.asciz	"Fail to run kernel div"
	.size	.L.str.17, 23

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"Fail to sync kernel div"
	.size	.L.str.18, 24

	.type	_Z10kernel_powIfEvPKT_S2_PS0_i,@object # @_Z10kernel_powIfEvPKT_S2_PS0_i
	.section	.rodata._Z10kernel_powIfEvPKT_S2_PS0_i,"aG",@progbits,_Z10kernel_powIfEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_powIfEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z10kernel_powIfEvPKT_S2_PS0_i:
	.quad	_Z25__device_stub__kernel_powIfEvPKT_S2_PS0_i
	.size	_Z10kernel_powIfEvPKT_S2_PS0_i, 8

	.type	.L.str.19,@object               # @.str.19
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.19:
	.asciz	"Fail to run kernel pow"
	.size	.L.str.19, 23

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"Fail to sync kernel pow"
	.size	.L.str.20, 24

	.type	_Z17kernel_add_scalarIfEvPKT_PS0_S0_i,@object # @_Z17kernel_add_scalarIfEvPKT_PS0_S0_i
	.section	.rodata._Z17kernel_add_scalarIfEvPKT_PS0_S0_i,"aG",@progbits,_Z17kernel_add_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_add_scalarIfEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z17kernel_add_scalarIfEvPKT_PS0_S0_i:
	.quad	_Z32__device_stub__kernel_add_scalarIfEvPKT_PS0_S0_i
	.size	_Z17kernel_add_scalarIfEvPKT_PS0_S0_i, 8

	.type	.L.str.21,@object               # @.str.21
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.21:
	.asciz	"Fail to run kernel add scalar"
	.size	.L.str.21, 30

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"Fail to sync kernel add scalar"
	.size	.L.str.22, 31

	.type	_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i,@object # @_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i
	.section	.rodata._Z17kernel_sub_scalarIfEvPKT_PS0_S0_i,"aG",@progbits,_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i:
	.quad	_Z32__device_stub__kernel_sub_scalarIfEvPKT_PS0_S0_i
	.size	_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i, 8

	.type	.L.str.23,@object               # @.str.23
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.23:
	.asciz	"Fail to run kernel sub scalar"
	.size	.L.str.23, 30

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"Fail to sync kernel sub scalar"
	.size	.L.str.24, 31

	.type	_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i,@object # @_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i
	.section	.rodata._Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i,"aG",@progbits,_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i:
	.quad	_Z36__device_stub__kernel_sub_scalar_invIfEvPKT_PS0_S0_i
	.size	_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i, 8

	.type	.L.str.25,@object               # @.str.25
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.25:
	.asciz	"Fail to run kernel sub scalar inv"
	.size	.L.str.25, 34

	.type	.L.str.26,@object               # @.str.26
.L.str.26:
	.asciz	"Fail to sync kernel sub scalar inv"
	.size	.L.str.26, 35

	.type	_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i,@object # @_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i
	.section	.rodata._Z17kernel_mul_scalarIfEvPKT_PS0_S0_i,"aG",@progbits,_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i:
	.quad	_Z32__device_stub__kernel_mul_scalarIfEvPKT_PS0_S0_i
	.size	_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i, 8

	.type	.L.str.27,@object               # @.str.27
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.27:
	.asciz	"Fail to run kernel mul scalar"
	.size	.L.str.27, 30

	.type	.L.str.28,@object               # @.str.28
.L.str.28:
	.asciz	"Fail to sync kernel mul scalar"
	.size	.L.str.28, 31

	.type	_Z17kernel_div_scalarIfEvPKT_PS0_S0_i,@object # @_Z17kernel_div_scalarIfEvPKT_PS0_S0_i
	.section	.rodata._Z17kernel_div_scalarIfEvPKT_PS0_S0_i,"aG",@progbits,_Z17kernel_div_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_div_scalarIfEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z17kernel_div_scalarIfEvPKT_PS0_S0_i:
	.quad	_Z32__device_stub__kernel_div_scalarIfEvPKT_PS0_S0_i
	.size	_Z17kernel_div_scalarIfEvPKT_PS0_S0_i, 8

	.type	.L.str.29,@object               # @.str.29
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.29:
	.asciz	"Fail to run kernel div scalar"
	.size	.L.str.29, 30

	.type	.L.str.30,@object               # @.str.30
.L.str.30:
	.asciz	"Fail to sync kernel div scalar"
	.size	.L.str.30, 31

	.type	_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i,@object # @_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i
	.section	.rodata._Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i,"aG",@progbits,_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i:
	.quad	_Z36__device_stub__kernel_div_scalar_invIfEvPKT_PS0_S0_i
	.size	_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i, 8

	.type	.L.str.31,@object               # @.str.31
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.31:
	.asciz	"Fail to run kernel div scalar inv"
	.size	.L.str.31, 34

	.type	.L.str.32,@object               # @.str.32
.L.str.32:
	.asciz	"Fail to sync kernel div scalar inv"
	.size	.L.str.32, 35

	.type	_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i,@object # @_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i
	.section	.rodata._Z17kernel_pow_scalarIfEvPKT_PS0_S0_i,"aG",@progbits,_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i:
	.quad	_Z32__device_stub__kernel_pow_scalarIfEvPKT_PS0_S0_i
	.size	_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i, 8

	.type	.L.str.33,@object               # @.str.33
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.33:
	.asciz	"Fail to run kernel pow scalar"
	.size	.L.str.33, 30

	.type	.L.str.34,@object               # @.str.34
.L.str.34:
	.asciz	"Fail to sync kernel pow scalar"
	.size	.L.str.34, 31

	.type	_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i,@object # @_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i
	.section	.rodata._Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i,"aG",@progbits,_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i:
	.quad	_Z36__device_stub__kernel_pow_scalar_invIfEvPKT_PS0_S0_i
	.size	_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i, 8

	.type	.L.str.35,@object               # @.str.35
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.35:
	.asciz	"Fail to run kernel pow scalar inv"
	.size	.L.str.35, 34

	.type	.L.str.36,@object               # @.str.36
.L.str.36:
	.asciz	"Fail to sync kernel pow scalar inv"
	.size	.L.str.36, 35

	.type	_Z12kernel_equalIfEvPKT_S2_PS0_i,@object # @_Z12kernel_equalIfEvPKT_S2_PS0_i
	.section	.rodata._Z12kernel_equalIfEvPKT_S2_PS0_i,"aG",@progbits,_Z12kernel_equalIfEvPKT_S2_PS0_i,comdat
	.weak	_Z12kernel_equalIfEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z12kernel_equalIfEvPKT_S2_PS0_i:
	.quad	_Z27__device_stub__kernel_equalIfEvPKT_S2_PS0_i
	.size	_Z12kernel_equalIfEvPKT_S2_PS0_i, 8

	.type	.L.str.37,@object               # @.str.37
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.37:
	.asciz	"Fail to run kernel equal"
	.size	.L.str.37, 25

	.type	.L.str.38,@object               # @.str.38
.L.str.38:
	.asciz	"Fail to sync kernel equal"
	.size	.L.str.38, 26

	.type	_Z14kernel_greaterIfEvPKT_S2_PS0_i,@object # @_Z14kernel_greaterIfEvPKT_S2_PS0_i
	.section	.rodata._Z14kernel_greaterIfEvPKT_S2_PS0_i,"aG",@progbits,_Z14kernel_greaterIfEvPKT_S2_PS0_i,comdat
	.weak	_Z14kernel_greaterIfEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z14kernel_greaterIfEvPKT_S2_PS0_i:
	.quad	_Z29__device_stub__kernel_greaterIfEvPKT_S2_PS0_i
	.size	_Z14kernel_greaterIfEvPKT_S2_PS0_i, 8

	.type	.L.str.39,@object               # @.str.39
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.39:
	.asciz	"Fail to run kernel"
	.size	.L.str.39, 19

	.type	.L.str.40,@object               # @.str.40
.L.str.40:
	.asciz	"Fail to sync kernel"
	.size	.L.str.40, 20

	.type	_Z11kernel_lessIfEvPKT_S2_PS0_i,@object # @_Z11kernel_lessIfEvPKT_S2_PS0_i
	.section	.rodata._Z11kernel_lessIfEvPKT_S2_PS0_i,"aG",@progbits,_Z11kernel_lessIfEvPKT_S2_PS0_i,comdat
	.weak	_Z11kernel_lessIfEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z11kernel_lessIfEvPKT_S2_PS0_i:
	.quad	_Z26__device_stub__kernel_lessIfEvPKT_S2_PS0_i
	.size	_Z11kernel_lessIfEvPKT_S2_PS0_i, 8

	.type	_Z20kernel_greater_equalIfEvPKT_S2_PS0_i,@object # @_Z20kernel_greater_equalIfEvPKT_S2_PS0_i
	.section	.rodata._Z20kernel_greater_equalIfEvPKT_S2_PS0_i,"aG",@progbits,_Z20kernel_greater_equalIfEvPKT_S2_PS0_i,comdat
	.weak	_Z20kernel_greater_equalIfEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z20kernel_greater_equalIfEvPKT_S2_PS0_i:
	.quad	_Z35__device_stub__kernel_greater_equalIfEvPKT_S2_PS0_i
	.size	_Z20kernel_greater_equalIfEvPKT_S2_PS0_i, 8

	.type	.L.str.41,@object               # @.str.41
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.41:
	.asciz	"Fail to run kernel greater equal"
	.size	.L.str.41, 33

	.type	.L.str.42,@object               # @.str.42
.L.str.42:
	.asciz	"Fail to sync kernel greater equal"
	.size	.L.str.42, 34

	.type	_Z17kernel_less_equalIfEvPKT_S2_PS0_i,@object # @_Z17kernel_less_equalIfEvPKT_S2_PS0_i
	.section	.rodata._Z17kernel_less_equalIfEvPKT_S2_PS0_i,"aG",@progbits,_Z17kernel_less_equalIfEvPKT_S2_PS0_i,comdat
	.weak	_Z17kernel_less_equalIfEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z17kernel_less_equalIfEvPKT_S2_PS0_i:
	.quad	_Z32__device_stub__kernel_less_equalIfEvPKT_S2_PS0_i
	.size	_Z17kernel_less_equalIfEvPKT_S2_PS0_i, 8

	.type	.L.str.43,@object               # @.str.43
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.43:
	.asciz	"Fail to run kernel less equal"
	.size	.L.str.43, 30

	.type	.L.str.44,@object               # @.str.44
.L.str.44:
	.asciz	"Fail to sync kernel less equal"
	.size	.L.str.44, 31

	.type	_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i,@object # @_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i
	.section	.rodata._Z19kernel_equal_scalarIfEvPKT_PS0_S0_i,"aG",@progbits,_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i:
	.quad	_Z34__device_stub__kernel_equal_scalarIfEvPKT_PS0_S0_i
	.size	_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i, 8

	.type	.L.str.45,@object               # @.str.45
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.45:
	.asciz	"Fail to run kernel equal scalar"
	.size	.L.str.45, 32

	.type	.L.str.46,@object               # @.str.46
.L.str.46:
	.asciz	"Fail to sync kernel equal scalar"
	.size	.L.str.46, 33

	.type	_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i,@object # @_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i
	.section	.rodata._Z21kernel_greater_scalarIfEvPKT_PS0_S0_i,"aG",@progbits,_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i:
	.quad	_Z36__device_stub__kernel_greater_scalarIfEvPKT_PS0_S0_i
	.size	_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i, 8

	.type	.L.str.47,@object               # @.str.47
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.47:
	.asciz	"Fail to run kernel greater scalar"
	.size	.L.str.47, 34

	.type	.L.str.48,@object               # @.str.48
.L.str.48:
	.asciz	"Fail to sync kernel greater scalar"
	.size	.L.str.48, 35

	.type	_Z18kernel_less_scalarIfEvPKT_PS0_S0_i,@object # @_Z18kernel_less_scalarIfEvPKT_PS0_S0_i
	.section	.rodata._Z18kernel_less_scalarIfEvPKT_PS0_S0_i,"aG",@progbits,_Z18kernel_less_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z18kernel_less_scalarIfEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z18kernel_less_scalarIfEvPKT_PS0_S0_i:
	.quad	_Z33__device_stub__kernel_less_scalarIfEvPKT_PS0_S0_i
	.size	_Z18kernel_less_scalarIfEvPKT_PS0_S0_i, 8

	.type	.L.str.49,@object               # @.str.49
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.49:
	.asciz	"Fail to run kernel less scalar"
	.size	.L.str.49, 31

	.type	.L.str.50,@object               # @.str.50
.L.str.50:
	.asciz	"Fail to sync kernel less scalar"
	.size	.L.str.50, 32

	.type	_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i,@object # @_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i
	.section	.rodata._Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i,"aG",@progbits,_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i:
	.quad	_Z42__device_stub__kernel_greater_equal_scalarIfEvPKT_PS0_S0_i
	.size	_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i, 8

	.type	.L.str.51,@object               # @.str.51
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.51:
	.asciz	"Fail to run kernel greater equal scalar"
	.size	.L.str.51, 40

	.type	.L.str.52,@object               # @.str.52
.L.str.52:
	.asciz	"Fail to sync kernel greater equal scalar"
	.size	.L.str.52, 41

	.type	_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i,@object # @_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i
	.section	.rodata._Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i,"aG",@progbits,_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i:
	.quad	_Z39__device_stub__kernel_less_equal_scalarIfEvPKT_PS0_S0_i
	.size	_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i, 8

	.type	.L.str.53,@object               # @.str.53
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.53:
	.asciz	"Fail to run kernel less equal scalar"
	.size	.L.str.53, 37

	.type	.L.str.54,@object               # @.str.54
.L.str.54:
	.asciz	"Fail to sync kernel less equal scalar"
	.size	.L.str.54, 38

	.type	_Z14kernel_replaceIfEvPKT_S2_PS0_i,@object # @_Z14kernel_replaceIfEvPKT_S2_PS0_i
	.section	.rodata._Z14kernel_replaceIfEvPKT_S2_PS0_i,"aG",@progbits,_Z14kernel_replaceIfEvPKT_S2_PS0_i,comdat
	.weak	_Z14kernel_replaceIfEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z14kernel_replaceIfEvPKT_S2_PS0_i:
	.quad	_Z29__device_stub__kernel_replaceIfEvPKT_S2_PS0_i
	.size	_Z14kernel_replaceIfEvPKT_S2_PS0_i, 8

	.type	.L.str.55,@object               # @.str.55
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.55:
	.asciz	"Fail to run kernel replace"
	.size	.L.str.55, 27

	.type	.L.str.56,@object               # @.str.56
.L.str.56:
	.asciz	"Fail to sync kernel replace"
	.size	.L.str.56, 28

	.type	_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i,@object # @_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i
	.section	.rodata._Z21kernel_replace_scalarIfEvPKT_PS0_S0_i,"aG",@progbits,_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i:
	.quad	_Z36__device_stub__kernel_replace_scalarIfEvPKT_PS0_S0_i
	.size	_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i, 8

	.type	_Z10kernel_sumIfEvPKT_PS0_i,@object # @_Z10kernel_sumIfEvPKT_PS0_i
	.section	.rodata._Z10kernel_sumIfEvPKT_PS0_i,"aG",@progbits,_Z10kernel_sumIfEvPKT_PS0_i,comdat
	.weak	_Z10kernel_sumIfEvPKT_PS0_i
	.p2align	3, 0x0
_Z10kernel_sumIfEvPKT_PS0_i:
	.quad	_Z25__device_stub__kernel_sumIfEvPKT_PS0_i
	.size	_Z10kernel_sumIfEvPKT_PS0_i, 8

	.type	.L.str.57,@object               # @.str.57
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.57:
	.asciz	"Fail to run kernel sum"
	.size	.L.str.57, 23

	.type	.L.str.58,@object               # @.str.58
.L.str.58:
	.asciz	"Fail to sync kernel sum"
	.size	.L.str.58, 24

	.type	_Z10kernel_minIfEvPKT_PS0_i,@object # @_Z10kernel_minIfEvPKT_PS0_i
	.section	.rodata._Z10kernel_minIfEvPKT_PS0_i,"aG",@progbits,_Z10kernel_minIfEvPKT_PS0_i,comdat
	.weak	_Z10kernel_minIfEvPKT_PS0_i
	.p2align	3, 0x0
_Z10kernel_minIfEvPKT_PS0_i:
	.quad	_Z25__device_stub__kernel_minIfEvPKT_PS0_i
	.size	_Z10kernel_minIfEvPKT_PS0_i, 8

	.type	.L.str.59,@object               # @.str.59
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.59:
	.asciz	"Fail to run kernel min"
	.size	.L.str.59, 23

	.type	.L.str.60,@object               # @.str.60
.L.str.60:
	.asciz	"Fail to sync kernel min"
	.size	.L.str.60, 24

	.type	_Z10kernel_maxIfEvPKT_PS0_i,@object # @_Z10kernel_maxIfEvPKT_PS0_i
	.section	.rodata._Z10kernel_maxIfEvPKT_PS0_i,"aG",@progbits,_Z10kernel_maxIfEvPKT_PS0_i,comdat
	.weak	_Z10kernel_maxIfEvPKT_PS0_i
	.p2align	3, 0x0
_Z10kernel_maxIfEvPKT_PS0_i:
	.quad	_Z25__device_stub__kernel_maxIfEvPKT_PS0_i
	.size	_Z10kernel_maxIfEvPKT_PS0_i, 8

	.type	.L.str.61,@object               # @.str.61
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.61:
	.asciz	"Fail to run kernel max"
	.size	.L.str.61, 23

	.type	.L.str.62,@object               # @.str.62
.L.str.62:
	.asciz	"Fail to sync kernel max"
	.size	.L.str.62, 24

	.type	_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii,@object # @_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii
	.section	.rodata._Z13kernel_pad_2dIfEvPKT_PS0_iiiiii,"aG",@progbits,_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii,comdat
	.weak	_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii
	.p2align	3, 0x0
_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii:
	.quad	_Z28__device_stub__kernel_pad_2dIfEvPKT_PS0_iiiiii
	.size	_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii, 8

	.type	.L.str.63,@object               # @.str.63
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.63:
	.asciz	"Fail to run kernel pad 2d"
	.size	.L.str.63, 26

	.type	.L.str.64,@object               # @.str.64
.L.str.64:
	.asciz	"Fail to sync kernel pad 2d"
	.size	.L.str.64, 27

	.type	_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii,@object # @_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii
	.section	.rodata._Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii,"aG",@progbits,_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii,comdat
	.weak	_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii
	.p2align	3, 0x0
_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii:
	.quad	_Z30__device_stub__kernel_unpad_2dIfEvPKT_PS0_iiiiii
	.size	_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii, 8

	.type	.L.str.65,@object               # @.str.65
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.65:
	.asciz	"Fail to run kernel unpad 2d"
	.size	.L.str.65, 28

	.type	.L.str.66,@object               # @.str.66
.L.str.66:
	.asciz	"Fail to sync kernel unpad 2d"
	.size	.L.str.66, 29

	.type	_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii,@object # @_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii
	.section	.rodata._Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii,"aG",@progbits,_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii
	.p2align	3, 0x0
_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii:
	.quad	_Z28__device_stub__kernel_pad_3dIfEvPKT_PS0_iiiiiiiii
	.size	_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii, 8

	.type	.L.str.67,@object               # @.str.67
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.67:
	.asciz	"Fail to run kernel pad 3d"
	.size	.L.str.67, 26

	.type	.L.str.68,@object               # @.str.68
.L.str.68:
	.asciz	"Fail to sync kernel pad 3d"
	.size	.L.str.68, 27

	.type	_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii,@object # @_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii
	.section	.rodata._Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii,"aG",@progbits,_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii
	.p2align	3, 0x0
_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii:
	.quad	_Z30__device_stub__kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii
	.size	_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii, 8

	.type	.L.str.69,@object               # @.str.69
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.69:
	.asciz	"Fail to run kernel unpad 3d"
	.size	.L.str.69, 28

	.type	.L.str.70,@object               # @.str.70
.L.str.70:
	.asciz	"Fail to sync kernel unpad 3d"
	.size	.L.str.70, 29

	.type	_Z14kernel_grid_2dIfEvPT_S1_Pdii,@object # @_Z14kernel_grid_2dIfEvPT_S1_Pdii
	.section	.rodata._Z14kernel_grid_2dIfEvPT_S1_Pdii,"aG",@progbits,_Z14kernel_grid_2dIfEvPT_S1_Pdii,comdat
	.weak	_Z14kernel_grid_2dIfEvPT_S1_Pdii
	.p2align	3, 0x0
_Z14kernel_grid_2dIfEvPT_S1_Pdii:
	.quad	_Z29__device_stub__kernel_grid_2dIfEvPT_S1_Pdii
	.size	_Z14kernel_grid_2dIfEvPT_S1_Pdii, 8

	.type	.L.str.71,@object               # @.str.71
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.71:
	.asciz	"Fail to run kernel grid 2d"
	.size	.L.str.71, 27

	.type	.L.str.72,@object               # @.str.72
.L.str.72:
	.asciz	"Fail to sync kernel grid 2d"
	.size	.L.str.72, 28

	.type	_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii,@object # @_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii
	.section	.rodata._Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii,"aG",@progbits,_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii,comdat
	.weak	_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii
	.p2align	3, 0x0
_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii:
	.quad	_Z29__device_stub__kernel_grid_3dIfEvPT_S1_S1_Pdiii
	.size	_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii, 8

	.type	.L.str.73,@object               # @.str.73
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.73:
	.asciz	"Fail to run kernel grid 3d"
	.size	.L.str.73, 27

	.type	.L.str.74,@object               # @.str.74
.L.str.74:
	.asciz	"Fail to sync kernel grid 3d"
	.size	.L.str.74, 28

	.type	_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i,@object # @_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i
	.section	.rodata._Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i,"aG",@progbits,_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i,comdat
	.weak	_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i
	.p2align	3, 0x0
_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i:
	.quad	_Z31__device_stub__kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i
	.size	_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i, 8

	.type	.L.str.75,@object               # @.str.75
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.75:
	.asciz	"Fail to run kernel affine 2d"
	.size	.L.str.75, 29

	.type	.L.str.76,@object               # @.str.76
.L.str.76:
	.asciz	"Fail to sync kernel affine 2d"
	.size	.L.str.76, 30

	.type	_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i,@object # @_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i
	.section	.rodata._Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i,"aG",@progbits,_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i,comdat
	.weak	_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i
	.p2align	3, 0x0
_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i:
	.quad	_Z31__device_stub__kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i
	.size	_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i, 8

	.type	.L.str.77,@object               # @.str.77
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.77:
	.asciz	"Fail to run kernel affine 3d"
	.size	.L.str.77, 29

	.type	.L.str.78,@object               # @.str.78
.L.str.78:
	.asciz	"Fail to sync kernel affine 3d"
	.size	.L.str.78, 30

	.type	_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi,@object # @_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi
	.section	.rodata._Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi,"aG",@progbits,_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi,comdat
	.weak	_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi
	.p2align	3, 0x0
_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi:
	.quad	_Z35__device_stub__kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi
	.size	_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi, 8

	.type	.L.str.79,@object               # @.str.79
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.79:
	.asciz	"Fail to run kernel affine sod 2d"
	.size	.L.str.79, 33

	.type	.L.str.80,@object               # @.str.80
.L.str.80:
	.asciz	"Fail to sync kernel affine sod 2d"
	.size	.L.str.80, 34

	.type	_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi,@object # @_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi
	.section	.rodata._Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi,"aG",@progbits,_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi,comdat
	.weak	_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi
	.p2align	3, 0x0
_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi:
	.quad	_Z35__device_stub__kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi
	.size	_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi, 8

	.type	.L.str.81,@object               # @.str.81
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.81:
	.asciz	"Fail to run kernel affine sod 3d"
	.size	.L.str.81, 33

	.type	.L.str.82,@object               # @.str.82
.L.str.82:
	.asciz	"Fail to sync kernel affine sod 3d"
	.size	.L.str.82, 34

	.type	_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i,@object # @_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i
	.section	.rodata._Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i,"aG",@progbits,_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i,comdat
	.weak	_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i
	.p2align	3, 0x0
_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i:
	.quad	_Z31__device_stub__kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i
	.size	_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i, 8

	.type	.L.str.83,@object               # @.str.83
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.83:
	.asciz	"Fail to run kernel dfield 2d"
	.size	.L.str.83, 29

	.type	.L.str.84,@object               # @.str.84
.L.str.84:
	.asciz	"Fail to sync kernel dfield 2d"
	.size	.L.str.84, 30

	.type	_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,@object # @_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.section	.rodata._Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,"aG",@progbits,_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,comdat
	.weak	_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.p2align	3, 0x0
_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i:
	.quad	_Z31__device_stub__kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.size	_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, 8

	.type	.L.str.85,@object               # @.str.85
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.85:
	.asciz	"Fail to run kernel dfield 3d"
	.size	.L.str.85, 29

	.type	.L.str.86,@object               # @.str.86
.L.str.86:
	.asciz	"Fail to sync kernel dfield 3d"
	.size	.L.str.86, 30

	.type	_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,@object # @_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.section	.rodata._Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,"aG",@progbits,_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.p2align	3, 0x0
_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii:
	.quad	_Z46__device_stub__kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.size	_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, 8

	.type	.L.str.87,@object               # @.str.87
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.87:
	.asciz	"Fail to run kernel nearest interpolation 2d"
	.size	.L.str.87, 44

	.type	.L.str.88,@object               # @.str.88
.L.str.88:
	.asciz	"Fail to sync kernel nearest interpolation 2d"
	.size	.L.str.88, 45

	.type	_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,@object # @_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.section	.rodata._Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,"aG",@progbits,_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.weak	_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.p2align	3, 0x0
_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii:
	.quad	_Z46__device_stub__kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.size	_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii, 8

	.type	.L.str.89,@object               # @.str.89
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.89:
	.asciz	"Fail to run kernel nearest interpolation 3d"
	.size	.L.str.89, 44

	.type	.L.str.90,@object               # @.str.90
.L.str.90:
	.asciz	"Fail to sync kernel nearest interpolation 3d"
	.size	.L.str.90, 45

	.type	_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,@object # @_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.section	.rodata._Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,"aG",@progbits,_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.p2align	3, 0x0
_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii:
	.quad	_Z45__device_stub__kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.size	_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, 8

	.type	.L.str.91,@object               # @.str.91
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.91:
	.asciz	"Fail to run kernel linear interpolation 2d"
	.size	.L.str.91, 43

	.type	.L.str.92,@object               # @.str.92
.L.str.92:
	.asciz	"Fail to sync kernel linear interpolation 2d"
	.size	.L.str.92, 44

	.type	_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,@object # @_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.section	.rodata._Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,"aG",@progbits,_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.weak	_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.p2align	3, 0x0
_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii:
	.quad	_Z45__device_stub__kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.size	_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii, 8

	.type	.L.str.93,@object               # @.str.93
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.93:
	.asciz	"Fail to run kernel linear interpolation 3d"
	.size	.L.str.93, 43

	.type	.L.str.94,@object               # @.str.94
.L.str.94:
	.asciz	"Fail to sync kernel linear interpolation 3d"
	.size	.L.str.94, 44

	.type	_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,@object # @_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.section	.rodata._Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,"aG",@progbits,_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.p2align	3, 0x0
_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii:
	.quad	_Z44__device_stub__kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.size	_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, 8

	.type	.L.str.95,@object               # @.str.95
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.95:
	.asciz	"Fail to run kernel cubic interpolation 2d"
	.size	.L.str.95, 42

	.type	.L.str.96,@object               # @.str.96
.L.str.96:
	.asciz	"Fail to sync kernel cubic interpolation 2d"
	.size	.L.str.96, 43

	.type	_Z16kernel_gradientxIfEvPKT_PS0_iii,@object # @_Z16kernel_gradientxIfEvPKT_PS0_iii
	.section	.rodata._Z16kernel_gradientxIfEvPKT_PS0_iii,"aG",@progbits,_Z16kernel_gradientxIfEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientxIfEvPKT_PS0_iii
	.p2align	3, 0x0
_Z16kernel_gradientxIfEvPKT_PS0_iii:
	.quad	_Z31__device_stub__kernel_gradientxIfEvPKT_PS0_iii
	.size	_Z16kernel_gradientxIfEvPKT_PS0_iii, 8

	.type	.L.str.97,@object               # @.str.97
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.97:
	.asciz	"Fail to run kernel gradient x"
	.size	.L.str.97, 30

	.type	.L.str.98,@object               # @.str.98
.L.str.98:
	.asciz	"Fail to sync kernel gradient x"
	.size	.L.str.98, 31

	.type	_Z16kernel_gradientyIfEvPKT_PS0_iii,@object # @_Z16kernel_gradientyIfEvPKT_PS0_iii
	.section	.rodata._Z16kernel_gradientyIfEvPKT_PS0_iii,"aG",@progbits,_Z16kernel_gradientyIfEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientyIfEvPKT_PS0_iii
	.p2align	3, 0x0
_Z16kernel_gradientyIfEvPKT_PS0_iii:
	.quad	_Z31__device_stub__kernel_gradientyIfEvPKT_PS0_iii
	.size	_Z16kernel_gradientyIfEvPKT_PS0_iii, 8

	.type	.L.str.99,@object               # @.str.99
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.99:
	.asciz	"Fail to run kernel gradient y"
	.size	.L.str.99, 30

	.type	.L.str.100,@object              # @.str.100
.L.str.100:
	.asciz	"Fail to sync kernel gradient y"
	.size	.L.str.100, 31

	.type	_Z16kernel_gradientzIfEvPKT_PS0_iii,@object # @_Z16kernel_gradientzIfEvPKT_PS0_iii
	.section	.rodata._Z16kernel_gradientzIfEvPKT_PS0_iii,"aG",@progbits,_Z16kernel_gradientzIfEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientzIfEvPKT_PS0_iii
	.p2align	3, 0x0
_Z16kernel_gradientzIfEvPKT_PS0_iii:
	.quad	_Z31__device_stub__kernel_gradientzIfEvPKT_PS0_iii
	.size	_Z16kernel_gradientzIfEvPKT_PS0_iii, 8

	.type	.L.str.101,@object              # @.str.101
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.101:
	.asciz	"Fail to run kernel gradient z"
	.size	.L.str.101, 30

	.type	.L.str.102,@object              # @.str.102
.L.str.102:
	.asciz	"Fail to sync kernel gradient z"
	.size	.L.str.102, 31

	.type	_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii,@object # @_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii
	.section	.rodata._Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii,"aG",@progbits,_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii,comdat
	.weak	_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii
	.p2align	3, 0x0
_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii:
	.quad	_Z36__device_stub__kernel_convolution_2dIfEvPKT_S2_PS0_iiii
	.size	_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii, 8

	.type	.L.str.103,@object              # @.str.103
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.103:
	.asciz	"Fail to run kernel convolution 2d"
	.size	.L.str.103, 34

	.type	.L.str.104,@object              # @.str.104
.L.str.104:
	.asciz	"Fail to sync kernel convolution 2d"
	.size	.L.str.104, 35

	.type	_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii,@object # @_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii
	.section	.rodata._Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii,"aG",@progbits,_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii,comdat
	.weak	_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii
	.p2align	3, 0x0
_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii:
	.quad	_Z36__device_stub__kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii
	.size	_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii, 8

	.type	.L.str.105,@object              # @.str.105
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.105:
	.asciz	"Fail to run kernel convolution 3d"
	.size	.L.str.105, 34

	.type	.L.str.106,@object              # @.str.106
.L.str.106:
	.asciz	"Fail to sync kernel convolution 3d"
	.size	.L.str.106, 35

	.type	_Z13kernel_assignIdEvPT_S0_i,@object # @_Z13kernel_assignIdEvPT_S0_i
	.section	.rodata._Z13kernel_assignIdEvPT_S0_i,"aG",@progbits,_Z13kernel_assignIdEvPT_S0_i,comdat
	.weak	_Z13kernel_assignIdEvPT_S0_i
	.p2align	3, 0x0
_Z13kernel_assignIdEvPT_S0_i:
	.quad	_Z28__device_stub__kernel_assignIdEvPT_S0_i
	.size	_Z13kernel_assignIdEvPT_S0_i, 8

	.type	_Z11kernel_copyIdEvPKT_PS0_i,@object # @_Z11kernel_copyIdEvPKT_PS0_i
	.section	.rodata._Z11kernel_copyIdEvPKT_PS0_i,"aG",@progbits,_Z11kernel_copyIdEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyIdEvPKT_PS0_i
	.p2align	3, 0x0
_Z11kernel_copyIdEvPKT_PS0_i:
	.quad	_Z26__device_stub__kernel_copyIdEvPKT_PS0_i
	.size	_Z11kernel_copyIdEvPKT_PS0_i, 8

	.type	_Z10kernel_addIdEvPKT_S2_PS0_i,@object # @_Z10kernel_addIdEvPKT_S2_PS0_i
	.section	.rodata._Z10kernel_addIdEvPKT_S2_PS0_i,"aG",@progbits,_Z10kernel_addIdEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_addIdEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z10kernel_addIdEvPKT_S2_PS0_i:
	.quad	_Z25__device_stub__kernel_addIdEvPKT_S2_PS0_i
	.size	_Z10kernel_addIdEvPKT_S2_PS0_i, 8

	.type	_Z10kernel_subIdEvPKT_S2_PS0_i,@object # @_Z10kernel_subIdEvPKT_S2_PS0_i
	.section	.rodata._Z10kernel_subIdEvPKT_S2_PS0_i,"aG",@progbits,_Z10kernel_subIdEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_subIdEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z10kernel_subIdEvPKT_S2_PS0_i:
	.quad	_Z25__device_stub__kernel_subIdEvPKT_S2_PS0_i
	.size	_Z10kernel_subIdEvPKT_S2_PS0_i, 8

	.type	_Z10kernel_mulIdEvPKT_S2_PS0_i,@object # @_Z10kernel_mulIdEvPKT_S2_PS0_i
	.section	.rodata._Z10kernel_mulIdEvPKT_S2_PS0_i,"aG",@progbits,_Z10kernel_mulIdEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_mulIdEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z10kernel_mulIdEvPKT_S2_PS0_i:
	.quad	_Z25__device_stub__kernel_mulIdEvPKT_S2_PS0_i
	.size	_Z10kernel_mulIdEvPKT_S2_PS0_i, 8

	.type	_Z10kernel_divIdEvPKT_S2_PS0_i,@object # @_Z10kernel_divIdEvPKT_S2_PS0_i
	.section	.rodata._Z10kernel_divIdEvPKT_S2_PS0_i,"aG",@progbits,_Z10kernel_divIdEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_divIdEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z10kernel_divIdEvPKT_S2_PS0_i:
	.quad	_Z25__device_stub__kernel_divIdEvPKT_S2_PS0_i
	.size	_Z10kernel_divIdEvPKT_S2_PS0_i, 8

	.type	_Z10kernel_powIdEvPKT_S2_PS0_i,@object # @_Z10kernel_powIdEvPKT_S2_PS0_i
	.section	.rodata._Z10kernel_powIdEvPKT_S2_PS0_i,"aG",@progbits,_Z10kernel_powIdEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_powIdEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z10kernel_powIdEvPKT_S2_PS0_i:
	.quad	_Z25__device_stub__kernel_powIdEvPKT_S2_PS0_i
	.size	_Z10kernel_powIdEvPKT_S2_PS0_i, 8

	.type	_Z17kernel_add_scalarIdEvPKT_PS0_S0_i,@object # @_Z17kernel_add_scalarIdEvPKT_PS0_S0_i
	.section	.rodata._Z17kernel_add_scalarIdEvPKT_PS0_S0_i,"aG",@progbits,_Z17kernel_add_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_add_scalarIdEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z17kernel_add_scalarIdEvPKT_PS0_S0_i:
	.quad	_Z32__device_stub__kernel_add_scalarIdEvPKT_PS0_S0_i
	.size	_Z17kernel_add_scalarIdEvPKT_PS0_S0_i, 8

	.type	_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i,@object # @_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i
	.section	.rodata._Z17kernel_sub_scalarIdEvPKT_PS0_S0_i,"aG",@progbits,_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i:
	.quad	_Z32__device_stub__kernel_sub_scalarIdEvPKT_PS0_S0_i
	.size	_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i, 8

	.type	_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i,@object # @_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i
	.section	.rodata._Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i,"aG",@progbits,_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i:
	.quad	_Z36__device_stub__kernel_sub_scalar_invIdEvPKT_PS0_S0_i
	.size	_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i, 8

	.type	_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i,@object # @_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i
	.section	.rodata._Z17kernel_mul_scalarIdEvPKT_PS0_S0_i,"aG",@progbits,_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i:
	.quad	_Z32__device_stub__kernel_mul_scalarIdEvPKT_PS0_S0_i
	.size	_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i, 8

	.type	_Z17kernel_div_scalarIdEvPKT_PS0_S0_i,@object # @_Z17kernel_div_scalarIdEvPKT_PS0_S0_i
	.section	.rodata._Z17kernel_div_scalarIdEvPKT_PS0_S0_i,"aG",@progbits,_Z17kernel_div_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_div_scalarIdEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z17kernel_div_scalarIdEvPKT_PS0_S0_i:
	.quad	_Z32__device_stub__kernel_div_scalarIdEvPKT_PS0_S0_i
	.size	_Z17kernel_div_scalarIdEvPKT_PS0_S0_i, 8

	.type	_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i,@object # @_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i
	.section	.rodata._Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i,"aG",@progbits,_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i:
	.quad	_Z36__device_stub__kernel_div_scalar_invIdEvPKT_PS0_S0_i
	.size	_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i, 8

	.type	_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i,@object # @_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i
	.section	.rodata._Z17kernel_pow_scalarIdEvPKT_PS0_S0_i,"aG",@progbits,_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i:
	.quad	_Z32__device_stub__kernel_pow_scalarIdEvPKT_PS0_S0_i
	.size	_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i, 8

	.type	_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i,@object # @_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i
	.section	.rodata._Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i,"aG",@progbits,_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i:
	.quad	_Z36__device_stub__kernel_pow_scalar_invIdEvPKT_PS0_S0_i
	.size	_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i, 8

	.type	_Z12kernel_equalIdEvPKT_S2_PS0_i,@object # @_Z12kernel_equalIdEvPKT_S2_PS0_i
	.section	.rodata._Z12kernel_equalIdEvPKT_S2_PS0_i,"aG",@progbits,_Z12kernel_equalIdEvPKT_S2_PS0_i,comdat
	.weak	_Z12kernel_equalIdEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z12kernel_equalIdEvPKT_S2_PS0_i:
	.quad	_Z27__device_stub__kernel_equalIdEvPKT_S2_PS0_i
	.size	_Z12kernel_equalIdEvPKT_S2_PS0_i, 8

	.type	_Z14kernel_greaterIdEvPKT_S2_PS0_i,@object # @_Z14kernel_greaterIdEvPKT_S2_PS0_i
	.section	.rodata._Z14kernel_greaterIdEvPKT_S2_PS0_i,"aG",@progbits,_Z14kernel_greaterIdEvPKT_S2_PS0_i,comdat
	.weak	_Z14kernel_greaterIdEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z14kernel_greaterIdEvPKT_S2_PS0_i:
	.quad	_Z29__device_stub__kernel_greaterIdEvPKT_S2_PS0_i
	.size	_Z14kernel_greaterIdEvPKT_S2_PS0_i, 8

	.type	_Z11kernel_lessIdEvPKT_S2_PS0_i,@object # @_Z11kernel_lessIdEvPKT_S2_PS0_i
	.section	.rodata._Z11kernel_lessIdEvPKT_S2_PS0_i,"aG",@progbits,_Z11kernel_lessIdEvPKT_S2_PS0_i,comdat
	.weak	_Z11kernel_lessIdEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z11kernel_lessIdEvPKT_S2_PS0_i:
	.quad	_Z26__device_stub__kernel_lessIdEvPKT_S2_PS0_i
	.size	_Z11kernel_lessIdEvPKT_S2_PS0_i, 8

	.type	_Z20kernel_greater_equalIdEvPKT_S2_PS0_i,@object # @_Z20kernel_greater_equalIdEvPKT_S2_PS0_i
	.section	.rodata._Z20kernel_greater_equalIdEvPKT_S2_PS0_i,"aG",@progbits,_Z20kernel_greater_equalIdEvPKT_S2_PS0_i,comdat
	.weak	_Z20kernel_greater_equalIdEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z20kernel_greater_equalIdEvPKT_S2_PS0_i:
	.quad	_Z35__device_stub__kernel_greater_equalIdEvPKT_S2_PS0_i
	.size	_Z20kernel_greater_equalIdEvPKT_S2_PS0_i, 8

	.type	_Z17kernel_less_equalIdEvPKT_S2_PS0_i,@object # @_Z17kernel_less_equalIdEvPKT_S2_PS0_i
	.section	.rodata._Z17kernel_less_equalIdEvPKT_S2_PS0_i,"aG",@progbits,_Z17kernel_less_equalIdEvPKT_S2_PS0_i,comdat
	.weak	_Z17kernel_less_equalIdEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z17kernel_less_equalIdEvPKT_S2_PS0_i:
	.quad	_Z32__device_stub__kernel_less_equalIdEvPKT_S2_PS0_i
	.size	_Z17kernel_less_equalIdEvPKT_S2_PS0_i, 8

	.type	_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i,@object # @_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i
	.section	.rodata._Z19kernel_equal_scalarIdEvPKT_PS0_S0_i,"aG",@progbits,_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i:
	.quad	_Z34__device_stub__kernel_equal_scalarIdEvPKT_PS0_S0_i
	.size	_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i, 8

	.type	_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i,@object # @_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i
	.section	.rodata._Z21kernel_greater_scalarIdEvPKT_PS0_S0_i,"aG",@progbits,_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i:
	.quad	_Z36__device_stub__kernel_greater_scalarIdEvPKT_PS0_S0_i
	.size	_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i, 8

	.type	_Z18kernel_less_scalarIdEvPKT_PS0_S0_i,@object # @_Z18kernel_less_scalarIdEvPKT_PS0_S0_i
	.section	.rodata._Z18kernel_less_scalarIdEvPKT_PS0_S0_i,"aG",@progbits,_Z18kernel_less_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z18kernel_less_scalarIdEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z18kernel_less_scalarIdEvPKT_PS0_S0_i:
	.quad	_Z33__device_stub__kernel_less_scalarIdEvPKT_PS0_S0_i
	.size	_Z18kernel_less_scalarIdEvPKT_PS0_S0_i, 8

	.type	_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i,@object # @_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i
	.section	.rodata._Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i,"aG",@progbits,_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i:
	.quad	_Z42__device_stub__kernel_greater_equal_scalarIdEvPKT_PS0_S0_i
	.size	_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i, 8

	.type	_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i,@object # @_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i
	.section	.rodata._Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i,"aG",@progbits,_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i:
	.quad	_Z39__device_stub__kernel_less_equal_scalarIdEvPKT_PS0_S0_i
	.size	_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i, 8

	.type	_Z14kernel_replaceIdEvPKT_S2_PS0_i,@object # @_Z14kernel_replaceIdEvPKT_S2_PS0_i
	.section	.rodata._Z14kernel_replaceIdEvPKT_S2_PS0_i,"aG",@progbits,_Z14kernel_replaceIdEvPKT_S2_PS0_i,comdat
	.weak	_Z14kernel_replaceIdEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z14kernel_replaceIdEvPKT_S2_PS0_i:
	.quad	_Z29__device_stub__kernel_replaceIdEvPKT_S2_PS0_i
	.size	_Z14kernel_replaceIdEvPKT_S2_PS0_i, 8

	.type	_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i,@object # @_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i
	.section	.rodata._Z21kernel_replace_scalarIdEvPKT_PS0_S0_i,"aG",@progbits,_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i:
	.quad	_Z36__device_stub__kernel_replace_scalarIdEvPKT_PS0_S0_i
	.size	_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i, 8

	.type	_Z10kernel_sumIdEvPKT_PS0_i,@object # @_Z10kernel_sumIdEvPKT_PS0_i
	.section	.rodata._Z10kernel_sumIdEvPKT_PS0_i,"aG",@progbits,_Z10kernel_sumIdEvPKT_PS0_i,comdat
	.weak	_Z10kernel_sumIdEvPKT_PS0_i
	.p2align	3, 0x0
_Z10kernel_sumIdEvPKT_PS0_i:
	.quad	_Z25__device_stub__kernel_sumIdEvPKT_PS0_i
	.size	_Z10kernel_sumIdEvPKT_PS0_i, 8

	.type	_Z10kernel_minIdEvPKT_PS0_i,@object # @_Z10kernel_minIdEvPKT_PS0_i
	.section	.rodata._Z10kernel_minIdEvPKT_PS0_i,"aG",@progbits,_Z10kernel_minIdEvPKT_PS0_i,comdat
	.weak	_Z10kernel_minIdEvPKT_PS0_i
	.p2align	3, 0x0
_Z10kernel_minIdEvPKT_PS0_i:
	.quad	_Z25__device_stub__kernel_minIdEvPKT_PS0_i
	.size	_Z10kernel_minIdEvPKT_PS0_i, 8

	.type	_Z10kernel_maxIdEvPKT_PS0_i,@object # @_Z10kernel_maxIdEvPKT_PS0_i
	.section	.rodata._Z10kernel_maxIdEvPKT_PS0_i,"aG",@progbits,_Z10kernel_maxIdEvPKT_PS0_i,comdat
	.weak	_Z10kernel_maxIdEvPKT_PS0_i
	.p2align	3, 0x0
_Z10kernel_maxIdEvPKT_PS0_i:
	.quad	_Z25__device_stub__kernel_maxIdEvPKT_PS0_i
	.size	_Z10kernel_maxIdEvPKT_PS0_i, 8

	.type	_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii,@object # @_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii
	.section	.rodata._Z13kernel_pad_2dIdEvPKT_PS0_iiiiii,"aG",@progbits,_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii,comdat
	.weak	_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii
	.p2align	3, 0x0
_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii:
	.quad	_Z28__device_stub__kernel_pad_2dIdEvPKT_PS0_iiiiii
	.size	_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii, 8

	.type	_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii,@object # @_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii
	.section	.rodata._Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii,"aG",@progbits,_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii,comdat
	.weak	_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii
	.p2align	3, 0x0
_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii:
	.quad	_Z30__device_stub__kernel_unpad_2dIdEvPKT_PS0_iiiiii
	.size	_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii, 8

	.type	_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii,@object # @_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii
	.section	.rodata._Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii,"aG",@progbits,_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii
	.p2align	3, 0x0
_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii:
	.quad	_Z28__device_stub__kernel_pad_3dIdEvPKT_PS0_iiiiiiiii
	.size	_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii, 8

	.type	_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii,@object # @_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii
	.section	.rodata._Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii,"aG",@progbits,_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii
	.p2align	3, 0x0
_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii:
	.quad	_Z30__device_stub__kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii
	.size	_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii, 8

	.type	_Z14kernel_grid_2dIdEvPT_S1_Pdii,@object # @_Z14kernel_grid_2dIdEvPT_S1_Pdii
	.section	.rodata._Z14kernel_grid_2dIdEvPT_S1_Pdii,"aG",@progbits,_Z14kernel_grid_2dIdEvPT_S1_Pdii,comdat
	.weak	_Z14kernel_grid_2dIdEvPT_S1_Pdii
	.p2align	3, 0x0
_Z14kernel_grid_2dIdEvPT_S1_Pdii:
	.quad	_Z29__device_stub__kernel_grid_2dIdEvPT_S1_Pdii
	.size	_Z14kernel_grid_2dIdEvPT_S1_Pdii, 8

	.type	_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii,@object # @_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii
	.section	.rodata._Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii,"aG",@progbits,_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii,comdat
	.weak	_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii
	.p2align	3, 0x0
_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii:
	.quad	_Z29__device_stub__kernel_grid_3dIdEvPT_S1_S1_Pdiii
	.size	_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii, 8

	.type	_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i,@object # @_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i
	.section	.rodata._Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i,"aG",@progbits,_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i,comdat
	.weak	_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i
	.p2align	3, 0x0
_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i:
	.quad	_Z31__device_stub__kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i
	.size	_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i, 8

	.type	_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i,@object # @_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i
	.section	.rodata._Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i,"aG",@progbits,_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i,comdat
	.weak	_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i
	.p2align	3, 0x0
_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i:
	.quad	_Z31__device_stub__kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i
	.size	_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i, 8

	.type	_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi,@object # @_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi
	.section	.rodata._Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi,"aG",@progbits,_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi,comdat
	.weak	_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi
	.p2align	3, 0x0
_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi:
	.quad	_Z35__device_stub__kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi
	.size	_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi, 8

	.type	_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi,@object # @_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi
	.section	.rodata._Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi,"aG",@progbits,_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi,comdat
	.weak	_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi
	.p2align	3, 0x0
_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi:
	.quad	_Z35__device_stub__kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi
	.size	_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi, 8

	.type	_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i,@object # @_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i
	.section	.rodata._Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i,"aG",@progbits,_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i,comdat
	.weak	_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i
	.p2align	3, 0x0
_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i:
	.quad	_Z31__device_stub__kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i
	.size	_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i, 8

	.type	_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,@object # @_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.section	.rodata._Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,"aG",@progbits,_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,comdat
	.weak	_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.p2align	3, 0x0
_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i:
	.quad	_Z31__device_stub__kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.size	_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, 8

	.type	_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,@object # @_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.section	.rodata._Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,"aG",@progbits,_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.p2align	3, 0x0
_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii:
	.quad	_Z46__device_stub__kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.size	_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, 8

	.type	_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,@object # @_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.section	.rodata._Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,"aG",@progbits,_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.weak	_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.p2align	3, 0x0
_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii:
	.quad	_Z46__device_stub__kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.size	_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, 8

	.type	_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,@object # @_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.section	.rodata._Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,"aG",@progbits,_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.p2align	3, 0x0
_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii:
	.quad	_Z45__device_stub__kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.size	_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, 8

	.type	_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,@object # @_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.section	.rodata._Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,"aG",@progbits,_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.weak	_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.p2align	3, 0x0
_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii:
	.quad	_Z45__device_stub__kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.size	_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, 8

	.type	_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,@object # @_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.section	.rodata._Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,"aG",@progbits,_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,comdat
	.weak	_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.p2align	3, 0x0
_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii:
	.quad	_Z44__device_stub__kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.size	_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, 8

	.type	_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,@object # @_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.section	.rodata._Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,"aG",@progbits,_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.weak	_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.p2align	3, 0x0
_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii:
	.quad	_Z44__device_stub__kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.size	_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, 8

	.type	.L.str.107,@object              # @.str.107
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.107:
	.asciz	"Fail to run kernel cubic interpolation 3d"
	.size	.L.str.107, 42

	.type	.L.str.108,@object              # @.str.108
.L.str.108:
	.asciz	"Fail to sync kernel cubic interpolation 3d"
	.size	.L.str.108, 43

	.type	_Z16kernel_gradientxIdEvPKT_PS0_iii,@object # @_Z16kernel_gradientxIdEvPKT_PS0_iii
	.section	.rodata._Z16kernel_gradientxIdEvPKT_PS0_iii,"aG",@progbits,_Z16kernel_gradientxIdEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientxIdEvPKT_PS0_iii
	.p2align	3, 0x0
_Z16kernel_gradientxIdEvPKT_PS0_iii:
	.quad	_Z31__device_stub__kernel_gradientxIdEvPKT_PS0_iii
	.size	_Z16kernel_gradientxIdEvPKT_PS0_iii, 8

	.type	_Z16kernel_gradientyIdEvPKT_PS0_iii,@object # @_Z16kernel_gradientyIdEvPKT_PS0_iii
	.section	.rodata._Z16kernel_gradientyIdEvPKT_PS0_iii,"aG",@progbits,_Z16kernel_gradientyIdEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientyIdEvPKT_PS0_iii
	.p2align	3, 0x0
_Z16kernel_gradientyIdEvPKT_PS0_iii:
	.quad	_Z31__device_stub__kernel_gradientyIdEvPKT_PS0_iii
	.size	_Z16kernel_gradientyIdEvPKT_PS0_iii, 8

	.type	_Z16kernel_gradientzIdEvPKT_PS0_iii,@object # @_Z16kernel_gradientzIdEvPKT_PS0_iii
	.section	.rodata._Z16kernel_gradientzIdEvPKT_PS0_iii,"aG",@progbits,_Z16kernel_gradientzIdEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientzIdEvPKT_PS0_iii
	.p2align	3, 0x0
_Z16kernel_gradientzIdEvPKT_PS0_iii:
	.quad	_Z31__device_stub__kernel_gradientzIdEvPKT_PS0_iii
	.size	_Z16kernel_gradientzIdEvPKT_PS0_iii, 8

	.type	_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii,@object # @_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii
	.section	.rodata._Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii,"aG",@progbits,_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii,comdat
	.weak	_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii
	.p2align	3, 0x0
_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii:
	.quad	_Z36__device_stub__kernel_convolution_2dIdEvPKT_S2_PS0_iiii
	.size	_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii, 8

	.type	_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii,@object # @_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii
	.section	.rodata._Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii,"aG",@progbits,_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii,comdat
	.weak	_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii
	.p2align	3, 0x0
_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii:
	.quad	_Z36__device_stub__kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii
	.size	_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii, 8

	.type	_Z13kernel_assignIiEvPT_S0_i,@object # @_Z13kernel_assignIiEvPT_S0_i
	.section	.rodata._Z13kernel_assignIiEvPT_S0_i,"aG",@progbits,_Z13kernel_assignIiEvPT_S0_i,comdat
	.weak	_Z13kernel_assignIiEvPT_S0_i
	.p2align	3, 0x0
_Z13kernel_assignIiEvPT_S0_i:
	.quad	_Z28__device_stub__kernel_assignIiEvPT_S0_i
	.size	_Z13kernel_assignIiEvPT_S0_i, 8

	.type	_Z11kernel_copyIiEvPKT_PS0_i,@object # @_Z11kernel_copyIiEvPKT_PS0_i
	.section	.rodata._Z11kernel_copyIiEvPKT_PS0_i,"aG",@progbits,_Z11kernel_copyIiEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyIiEvPKT_PS0_i
	.p2align	3, 0x0
_Z11kernel_copyIiEvPKT_PS0_i:
	.quad	_Z26__device_stub__kernel_copyIiEvPKT_PS0_i
	.size	_Z11kernel_copyIiEvPKT_PS0_i, 8

	.type	_Z10kernel_addIiEvPKT_S2_PS0_i,@object # @_Z10kernel_addIiEvPKT_S2_PS0_i
	.section	.rodata._Z10kernel_addIiEvPKT_S2_PS0_i,"aG",@progbits,_Z10kernel_addIiEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_addIiEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z10kernel_addIiEvPKT_S2_PS0_i:
	.quad	_Z25__device_stub__kernel_addIiEvPKT_S2_PS0_i
	.size	_Z10kernel_addIiEvPKT_S2_PS0_i, 8

	.type	_Z10kernel_subIiEvPKT_S2_PS0_i,@object # @_Z10kernel_subIiEvPKT_S2_PS0_i
	.section	.rodata._Z10kernel_subIiEvPKT_S2_PS0_i,"aG",@progbits,_Z10kernel_subIiEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_subIiEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z10kernel_subIiEvPKT_S2_PS0_i:
	.quad	_Z25__device_stub__kernel_subIiEvPKT_S2_PS0_i
	.size	_Z10kernel_subIiEvPKT_S2_PS0_i, 8

	.type	_Z10kernel_mulIiEvPKT_S2_PS0_i,@object # @_Z10kernel_mulIiEvPKT_S2_PS0_i
	.section	.rodata._Z10kernel_mulIiEvPKT_S2_PS0_i,"aG",@progbits,_Z10kernel_mulIiEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_mulIiEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z10kernel_mulIiEvPKT_S2_PS0_i:
	.quad	_Z25__device_stub__kernel_mulIiEvPKT_S2_PS0_i
	.size	_Z10kernel_mulIiEvPKT_S2_PS0_i, 8

	.type	_Z10kernel_divIiEvPKT_S2_PS0_i,@object # @_Z10kernel_divIiEvPKT_S2_PS0_i
	.section	.rodata._Z10kernel_divIiEvPKT_S2_PS0_i,"aG",@progbits,_Z10kernel_divIiEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_divIiEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z10kernel_divIiEvPKT_S2_PS0_i:
	.quad	_Z25__device_stub__kernel_divIiEvPKT_S2_PS0_i
	.size	_Z10kernel_divIiEvPKT_S2_PS0_i, 8

	.type	_Z10kernel_powIiEvPKT_S2_PS0_i,@object # @_Z10kernel_powIiEvPKT_S2_PS0_i
	.section	.rodata._Z10kernel_powIiEvPKT_S2_PS0_i,"aG",@progbits,_Z10kernel_powIiEvPKT_S2_PS0_i,comdat
	.weak	_Z10kernel_powIiEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z10kernel_powIiEvPKT_S2_PS0_i:
	.quad	_Z25__device_stub__kernel_powIiEvPKT_S2_PS0_i
	.size	_Z10kernel_powIiEvPKT_S2_PS0_i, 8

	.type	_Z17kernel_add_scalarIiEvPKT_PS0_S0_i,@object # @_Z17kernel_add_scalarIiEvPKT_PS0_S0_i
	.section	.rodata._Z17kernel_add_scalarIiEvPKT_PS0_S0_i,"aG",@progbits,_Z17kernel_add_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_add_scalarIiEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z17kernel_add_scalarIiEvPKT_PS0_S0_i:
	.quad	_Z32__device_stub__kernel_add_scalarIiEvPKT_PS0_S0_i
	.size	_Z17kernel_add_scalarIiEvPKT_PS0_S0_i, 8

	.type	_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i,@object # @_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i
	.section	.rodata._Z17kernel_sub_scalarIiEvPKT_PS0_S0_i,"aG",@progbits,_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i:
	.quad	_Z32__device_stub__kernel_sub_scalarIiEvPKT_PS0_S0_i
	.size	_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i, 8

	.type	_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i,@object # @_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i
	.section	.rodata._Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i,"aG",@progbits,_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i:
	.quad	_Z36__device_stub__kernel_sub_scalar_invIiEvPKT_PS0_S0_i
	.size	_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i, 8

	.type	_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i,@object # @_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i
	.section	.rodata._Z17kernel_mul_scalarIiEvPKT_PS0_S0_i,"aG",@progbits,_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i:
	.quad	_Z32__device_stub__kernel_mul_scalarIiEvPKT_PS0_S0_i
	.size	_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i, 8

	.type	_Z17kernel_div_scalarIiEvPKT_PS0_S0_i,@object # @_Z17kernel_div_scalarIiEvPKT_PS0_S0_i
	.section	.rodata._Z17kernel_div_scalarIiEvPKT_PS0_S0_i,"aG",@progbits,_Z17kernel_div_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_div_scalarIiEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z17kernel_div_scalarIiEvPKT_PS0_S0_i:
	.quad	_Z32__device_stub__kernel_div_scalarIiEvPKT_PS0_S0_i
	.size	_Z17kernel_div_scalarIiEvPKT_PS0_S0_i, 8

	.type	_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i,@object # @_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i
	.section	.rodata._Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i,"aG",@progbits,_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i:
	.quad	_Z36__device_stub__kernel_div_scalar_invIiEvPKT_PS0_S0_i
	.size	_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i, 8

	.type	_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i,@object # @_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i
	.section	.rodata._Z17kernel_pow_scalarIiEvPKT_PS0_S0_i,"aG",@progbits,_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i:
	.quad	_Z32__device_stub__kernel_pow_scalarIiEvPKT_PS0_S0_i
	.size	_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i, 8

	.type	_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i,@object # @_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i
	.section	.rodata._Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i,"aG",@progbits,_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i:
	.quad	_Z36__device_stub__kernel_pow_scalar_invIiEvPKT_PS0_S0_i
	.size	_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i, 8

	.type	_Z12kernel_equalIiEvPKT_S2_PS0_i,@object # @_Z12kernel_equalIiEvPKT_S2_PS0_i
	.section	.rodata._Z12kernel_equalIiEvPKT_S2_PS0_i,"aG",@progbits,_Z12kernel_equalIiEvPKT_S2_PS0_i,comdat
	.weak	_Z12kernel_equalIiEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z12kernel_equalIiEvPKT_S2_PS0_i:
	.quad	_Z27__device_stub__kernel_equalIiEvPKT_S2_PS0_i
	.size	_Z12kernel_equalIiEvPKT_S2_PS0_i, 8

	.type	_Z14kernel_greaterIiEvPKT_S2_PS0_i,@object # @_Z14kernel_greaterIiEvPKT_S2_PS0_i
	.section	.rodata._Z14kernel_greaterIiEvPKT_S2_PS0_i,"aG",@progbits,_Z14kernel_greaterIiEvPKT_S2_PS0_i,comdat
	.weak	_Z14kernel_greaterIiEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z14kernel_greaterIiEvPKT_S2_PS0_i:
	.quad	_Z29__device_stub__kernel_greaterIiEvPKT_S2_PS0_i
	.size	_Z14kernel_greaterIiEvPKT_S2_PS0_i, 8

	.type	_Z11kernel_lessIiEvPKT_S2_PS0_i,@object # @_Z11kernel_lessIiEvPKT_S2_PS0_i
	.section	.rodata._Z11kernel_lessIiEvPKT_S2_PS0_i,"aG",@progbits,_Z11kernel_lessIiEvPKT_S2_PS0_i,comdat
	.weak	_Z11kernel_lessIiEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z11kernel_lessIiEvPKT_S2_PS0_i:
	.quad	_Z26__device_stub__kernel_lessIiEvPKT_S2_PS0_i
	.size	_Z11kernel_lessIiEvPKT_S2_PS0_i, 8

	.type	_Z20kernel_greater_equalIiEvPKT_S2_PS0_i,@object # @_Z20kernel_greater_equalIiEvPKT_S2_PS0_i
	.section	.rodata._Z20kernel_greater_equalIiEvPKT_S2_PS0_i,"aG",@progbits,_Z20kernel_greater_equalIiEvPKT_S2_PS0_i,comdat
	.weak	_Z20kernel_greater_equalIiEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z20kernel_greater_equalIiEvPKT_S2_PS0_i:
	.quad	_Z35__device_stub__kernel_greater_equalIiEvPKT_S2_PS0_i
	.size	_Z20kernel_greater_equalIiEvPKT_S2_PS0_i, 8

	.type	_Z17kernel_less_equalIiEvPKT_S2_PS0_i,@object # @_Z17kernel_less_equalIiEvPKT_S2_PS0_i
	.section	.rodata._Z17kernel_less_equalIiEvPKT_S2_PS0_i,"aG",@progbits,_Z17kernel_less_equalIiEvPKT_S2_PS0_i,comdat
	.weak	_Z17kernel_less_equalIiEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z17kernel_less_equalIiEvPKT_S2_PS0_i:
	.quad	_Z32__device_stub__kernel_less_equalIiEvPKT_S2_PS0_i
	.size	_Z17kernel_less_equalIiEvPKT_S2_PS0_i, 8

	.type	_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i,@object # @_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i
	.section	.rodata._Z19kernel_equal_scalarIiEvPKT_PS0_S0_i,"aG",@progbits,_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i:
	.quad	_Z34__device_stub__kernel_equal_scalarIiEvPKT_PS0_S0_i
	.size	_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i, 8

	.type	_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i,@object # @_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i
	.section	.rodata._Z21kernel_greater_scalarIiEvPKT_PS0_S0_i,"aG",@progbits,_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i:
	.quad	_Z36__device_stub__kernel_greater_scalarIiEvPKT_PS0_S0_i
	.size	_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i, 8

	.type	_Z18kernel_less_scalarIiEvPKT_PS0_S0_i,@object # @_Z18kernel_less_scalarIiEvPKT_PS0_S0_i
	.section	.rodata._Z18kernel_less_scalarIiEvPKT_PS0_S0_i,"aG",@progbits,_Z18kernel_less_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z18kernel_less_scalarIiEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z18kernel_less_scalarIiEvPKT_PS0_S0_i:
	.quad	_Z33__device_stub__kernel_less_scalarIiEvPKT_PS0_S0_i
	.size	_Z18kernel_less_scalarIiEvPKT_PS0_S0_i, 8

	.type	_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i,@object # @_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i
	.section	.rodata._Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i,"aG",@progbits,_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i:
	.quad	_Z42__device_stub__kernel_greater_equal_scalarIiEvPKT_PS0_S0_i
	.size	_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i, 8

	.type	_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i,@object # @_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i
	.section	.rodata._Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i,"aG",@progbits,_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i:
	.quad	_Z39__device_stub__kernel_less_equal_scalarIiEvPKT_PS0_S0_i
	.size	_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i, 8

	.type	_Z14kernel_replaceIiEvPKT_S2_PS0_i,@object # @_Z14kernel_replaceIiEvPKT_S2_PS0_i
	.section	.rodata._Z14kernel_replaceIiEvPKT_S2_PS0_i,"aG",@progbits,_Z14kernel_replaceIiEvPKT_S2_PS0_i,comdat
	.weak	_Z14kernel_replaceIiEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z14kernel_replaceIiEvPKT_S2_PS0_i:
	.quad	_Z29__device_stub__kernel_replaceIiEvPKT_S2_PS0_i
	.size	_Z14kernel_replaceIiEvPKT_S2_PS0_i, 8

	.type	_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i,@object # @_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i
	.section	.rodata._Z21kernel_replace_scalarIiEvPKT_PS0_S0_i,"aG",@progbits,_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i,comdat
	.weak	_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i
	.p2align	3, 0x0
_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i:
	.quad	_Z36__device_stub__kernel_replace_scalarIiEvPKT_PS0_S0_i
	.size	_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i, 8

	.type	_Z10kernel_sumIiEvPKT_PS0_i,@object # @_Z10kernel_sumIiEvPKT_PS0_i
	.section	.rodata._Z10kernel_sumIiEvPKT_PS0_i,"aG",@progbits,_Z10kernel_sumIiEvPKT_PS0_i,comdat
	.weak	_Z10kernel_sumIiEvPKT_PS0_i
	.p2align	3, 0x0
_Z10kernel_sumIiEvPKT_PS0_i:
	.quad	_Z25__device_stub__kernel_sumIiEvPKT_PS0_i
	.size	_Z10kernel_sumIiEvPKT_PS0_i, 8

	.type	_Z10kernel_minIiEvPKT_PS0_i,@object # @_Z10kernel_minIiEvPKT_PS0_i
	.section	.rodata._Z10kernel_minIiEvPKT_PS0_i,"aG",@progbits,_Z10kernel_minIiEvPKT_PS0_i,comdat
	.weak	_Z10kernel_minIiEvPKT_PS0_i
	.p2align	3, 0x0
_Z10kernel_minIiEvPKT_PS0_i:
	.quad	_Z25__device_stub__kernel_minIiEvPKT_PS0_i
	.size	_Z10kernel_minIiEvPKT_PS0_i, 8

	.type	_Z10kernel_maxIiEvPKT_PS0_i,@object # @_Z10kernel_maxIiEvPKT_PS0_i
	.section	.rodata._Z10kernel_maxIiEvPKT_PS0_i,"aG",@progbits,_Z10kernel_maxIiEvPKT_PS0_i,comdat
	.weak	_Z10kernel_maxIiEvPKT_PS0_i
	.p2align	3, 0x0
_Z10kernel_maxIiEvPKT_PS0_i:
	.quad	_Z25__device_stub__kernel_maxIiEvPKT_PS0_i
	.size	_Z10kernel_maxIiEvPKT_PS0_i, 8

	.type	_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii,@object # @_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii
	.section	.rodata._Z13kernel_pad_2dIiEvPKT_PS0_iiiiii,"aG",@progbits,_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii,comdat
	.weak	_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii
	.p2align	3, 0x0
_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii:
	.quad	_Z28__device_stub__kernel_pad_2dIiEvPKT_PS0_iiiiii
	.size	_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii, 8

	.type	_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii,@object # @_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii
	.section	.rodata._Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii,"aG",@progbits,_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii,comdat
	.weak	_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii
	.p2align	3, 0x0
_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii:
	.quad	_Z30__device_stub__kernel_unpad_2dIiEvPKT_PS0_iiiiii
	.size	_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii, 8

	.type	_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii,@object # @_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii
	.section	.rodata._Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii,"aG",@progbits,_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii
	.p2align	3, 0x0
_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii:
	.quad	_Z28__device_stub__kernel_pad_3dIiEvPKT_PS0_iiiiiiiii
	.size	_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii, 8

	.type	_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii,@object # @_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii
	.section	.rodata._Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii,"aG",@progbits,_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii,comdat
	.weak	_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii
	.p2align	3, 0x0
_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii:
	.quad	_Z30__device_stub__kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii
	.size	_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii, 8

	.type	_Z14kernel_grid_2dIiEvPT_S1_Pdii,@object # @_Z14kernel_grid_2dIiEvPT_S1_Pdii
	.section	.rodata._Z14kernel_grid_2dIiEvPT_S1_Pdii,"aG",@progbits,_Z14kernel_grid_2dIiEvPT_S1_Pdii,comdat
	.weak	_Z14kernel_grid_2dIiEvPT_S1_Pdii
	.p2align	3, 0x0
_Z14kernel_grid_2dIiEvPT_S1_Pdii:
	.quad	_Z29__device_stub__kernel_grid_2dIiEvPT_S1_Pdii
	.size	_Z14kernel_grid_2dIiEvPT_S1_Pdii, 8

	.type	_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii,@object # @_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii
	.section	.rodata._Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii,"aG",@progbits,_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii,comdat
	.weak	_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii
	.p2align	3, 0x0
_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii:
	.quad	_Z29__device_stub__kernel_grid_3dIiEvPT_S1_S1_Pdiii
	.size	_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii, 8

	.type	_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i,@object # @_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i
	.section	.rodata._Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i,"aG",@progbits,_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i,comdat
	.weak	_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i
	.p2align	3, 0x0
_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i:
	.quad	_Z31__device_stub__kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i
	.size	_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i, 8

	.type	_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i,@object # @_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i
	.section	.rodata._Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i,"aG",@progbits,_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i,comdat
	.weak	_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i
	.p2align	3, 0x0
_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i:
	.quad	_Z31__device_stub__kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i
	.size	_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i, 8

	.type	_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi,@object # @_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi
	.section	.rodata._Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi,"aG",@progbits,_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi,comdat
	.weak	_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi
	.p2align	3, 0x0
_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi:
	.quad	_Z35__device_stub__kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi
	.size	_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi, 8

	.type	_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi,@object # @_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi
	.section	.rodata._Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi,"aG",@progbits,_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi,comdat
	.weak	_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi
	.p2align	3, 0x0
_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi:
	.quad	_Z35__device_stub__kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi
	.size	_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi, 8

	.type	_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i,@object # @_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i
	.section	.rodata._Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i,"aG",@progbits,_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i,comdat
	.weak	_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i
	.p2align	3, 0x0
_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i:
	.quad	_Z31__device_stub__kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i
	.size	_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i, 8

	.type	_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,@object # @_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.section	.rodata._Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,"aG",@progbits,_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,comdat
	.weak	_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.p2align	3, 0x0
_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i:
	.quad	_Z31__device_stub__kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.size	_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, 8

	.type	_Z16kernel_gradientxIiEvPKT_PS0_iii,@object # @_Z16kernel_gradientxIiEvPKT_PS0_iii
	.section	.rodata._Z16kernel_gradientxIiEvPKT_PS0_iii,"aG",@progbits,_Z16kernel_gradientxIiEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientxIiEvPKT_PS0_iii
	.p2align	3, 0x0
_Z16kernel_gradientxIiEvPKT_PS0_iii:
	.quad	_Z31__device_stub__kernel_gradientxIiEvPKT_PS0_iii
	.size	_Z16kernel_gradientxIiEvPKT_PS0_iii, 8

	.type	_Z16kernel_gradientyIiEvPKT_PS0_iii,@object # @_Z16kernel_gradientyIiEvPKT_PS0_iii
	.section	.rodata._Z16kernel_gradientyIiEvPKT_PS0_iii,"aG",@progbits,_Z16kernel_gradientyIiEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientyIiEvPKT_PS0_iii
	.p2align	3, 0x0
_Z16kernel_gradientyIiEvPKT_PS0_iii:
	.quad	_Z31__device_stub__kernel_gradientyIiEvPKT_PS0_iii
	.size	_Z16kernel_gradientyIiEvPKT_PS0_iii, 8

	.type	_Z16kernel_gradientzIiEvPKT_PS0_iii,@object # @_Z16kernel_gradientzIiEvPKT_PS0_iii
	.section	.rodata._Z16kernel_gradientzIiEvPKT_PS0_iii,"aG",@progbits,_Z16kernel_gradientzIiEvPKT_PS0_iii,comdat
	.weak	_Z16kernel_gradientzIiEvPKT_PS0_iii
	.p2align	3, 0x0
_Z16kernel_gradientzIiEvPKT_PS0_iii:
	.quad	_Z31__device_stub__kernel_gradientzIiEvPKT_PS0_iii
	.size	_Z16kernel_gradientzIiEvPKT_PS0_iii, 8

	.type	_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii,@object # @_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii
	.section	.rodata._Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii,"aG",@progbits,_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii,comdat
	.weak	_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii
	.p2align	3, 0x0
_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii:
	.quad	_Z36__device_stub__kernel_convolution_2dIiEvPKT_S2_PS0_iiii
	.size	_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii, 8

	.type	_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii,@object # @_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii
	.section	.rodata._Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii,"aG",@progbits,_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii,comdat
	.weak	_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii
	.p2align	3, 0x0
_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii:
	.quad	_Z36__device_stub__kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii
	.size	_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii, 8

	.type	_Z13kernel_assignItEvPT_S0_i,@object # @_Z13kernel_assignItEvPT_S0_i
	.section	.rodata._Z13kernel_assignItEvPT_S0_i,"aG",@progbits,_Z13kernel_assignItEvPT_S0_i,comdat
	.weak	_Z13kernel_assignItEvPT_S0_i
	.p2align	3, 0x0
_Z13kernel_assignItEvPT_S0_i:
	.quad	_Z28__device_stub__kernel_assignItEvPT_S0_i
	.size	_Z13kernel_assignItEvPT_S0_i, 8

	.type	_Z11kernel_copyItEvPKT_PS0_i,@object # @_Z11kernel_copyItEvPKT_PS0_i
	.section	.rodata._Z11kernel_copyItEvPKT_PS0_i,"aG",@progbits,_Z11kernel_copyItEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyItEvPKT_PS0_i
	.p2align	3, 0x0
_Z11kernel_copyItEvPKT_PS0_i:
	.quad	_Z26__device_stub__kernel_copyItEvPKT_PS0_i
	.size	_Z11kernel_copyItEvPKT_PS0_i, 8

	.type	_Z13kernel_assignIjEvPT_S0_i,@object # @_Z13kernel_assignIjEvPT_S0_i
	.section	.rodata._Z13kernel_assignIjEvPT_S0_i,"aG",@progbits,_Z13kernel_assignIjEvPT_S0_i,comdat
	.weak	_Z13kernel_assignIjEvPT_S0_i
	.p2align	3, 0x0
_Z13kernel_assignIjEvPT_S0_i:
	.quad	_Z28__device_stub__kernel_assignIjEvPT_S0_i
	.size	_Z13kernel_assignIjEvPT_S0_i, 8

	.type	_Z11kernel_copyIjEvPKT_PS0_i,@object # @_Z11kernel_copyIjEvPKT_PS0_i
	.section	.rodata._Z11kernel_copyIjEvPKT_PS0_i,"aG",@progbits,_Z11kernel_copyIjEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyIjEvPKT_PS0_i
	.p2align	3, 0x0
_Z11kernel_copyIjEvPKT_PS0_i:
	.quad	_Z26__device_stub__kernel_copyIjEvPKT_PS0_i
	.size	_Z11kernel_copyIjEvPKT_PS0_i, 8

	.type	_Z13kernel_assignIhEvPT_S0_i,@object # @_Z13kernel_assignIhEvPT_S0_i
	.section	.rodata._Z13kernel_assignIhEvPT_S0_i,"aG",@progbits,_Z13kernel_assignIhEvPT_S0_i,comdat
	.weak	_Z13kernel_assignIhEvPT_S0_i
	.p2align	3, 0x0
_Z13kernel_assignIhEvPT_S0_i:
	.quad	_Z28__device_stub__kernel_assignIhEvPT_S0_i
	.size	_Z13kernel_assignIhEvPT_S0_i, 8

	.type	_Z11kernel_copyIhEvPKT_PS0_i,@object # @_Z11kernel_copyIhEvPKT_PS0_i
	.section	.rodata._Z11kernel_copyIhEvPKT_PS0_i,"aG",@progbits,_Z11kernel_copyIhEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyIhEvPKT_PS0_i
	.p2align	3, 0x0
_Z11kernel_copyIhEvPKT_PS0_i:
	.quad	_Z26__device_stub__kernel_copyIhEvPKT_PS0_i
	.size	_Z11kernel_copyIhEvPKT_PS0_i, 8

	.type	_Z13kernel_assignIsEvPT_S0_i,@object # @_Z13kernel_assignIsEvPT_S0_i
	.section	.rodata._Z13kernel_assignIsEvPT_S0_i,"aG",@progbits,_Z13kernel_assignIsEvPT_S0_i,comdat
	.weak	_Z13kernel_assignIsEvPT_S0_i
	.p2align	3, 0x0
_Z13kernel_assignIsEvPT_S0_i:
	.quad	_Z28__device_stub__kernel_assignIsEvPT_S0_i
	.size	_Z13kernel_assignIsEvPT_S0_i, 8

	.type	_Z11kernel_copyIsEvPKT_PS0_i,@object # @_Z11kernel_copyIsEvPKT_PS0_i
	.section	.rodata._Z11kernel_copyIsEvPKT_PS0_i,"aG",@progbits,_Z11kernel_copyIsEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyIsEvPKT_PS0_i
	.p2align	3, 0x0
_Z11kernel_copyIsEvPKT_PS0_i:
	.quad	_Z26__device_stub__kernel_copyIsEvPKT_PS0_i
	.size	_Z11kernel_copyIsEvPKT_PS0_i, 8

	.type	_Z13kernel_assignIcEvPT_S0_i,@object # @_Z13kernel_assignIcEvPT_S0_i
	.section	.rodata._Z13kernel_assignIcEvPT_S0_i,"aG",@progbits,_Z13kernel_assignIcEvPT_S0_i,comdat
	.weak	_Z13kernel_assignIcEvPT_S0_i
	.p2align	3, 0x0
_Z13kernel_assignIcEvPT_S0_i:
	.quad	_Z28__device_stub__kernel_assignIcEvPT_S0_i
	.size	_Z13kernel_assignIcEvPT_S0_i, 8

	.type	_Z11kernel_copyIcEvPKT_PS0_i,@object # @_Z11kernel_copyIcEvPKT_PS0_i
	.section	.rodata._Z11kernel_copyIcEvPKT_PS0_i,"aG",@progbits,_Z11kernel_copyIcEvPKT_PS0_i,comdat
	.weak	_Z11kernel_copyIcEvPKT_PS0_i
	.p2align	3, 0x0
_Z11kernel_copyIcEvPKT_PS0_i:
	.quad	_Z26__device_stub__kernel_copyIcEvPKT_PS0_i
	.size	_Z11kernel_copyIcEvPKT_PS0_i, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z11kernel_castIfdEvPKT_PT0_i"
	.size	.L__unnamed_1, 30

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11kernel_castIdfEvPKT_PT0_i"
	.size	.L__unnamed_2, 30

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z11kernel_castIifEvPKT_PT0_i"
	.size	.L__unnamed_3, 30

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z11kernel_castIfiEvPKT_PT0_i"
	.size	.L__unnamed_4, 30

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z11kernel_castIidEvPKT_PT0_i"
	.size	.L__unnamed_5, 30

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z11kernel_castIdiEvPKT_PT0_i"
	.size	.L__unnamed_6, 30

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z11kernel_castIftEvPKT_PT0_i"
	.size	.L__unnamed_7, 30

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z11kernel_castItfEvPKT_PT0_i"
	.size	.L__unnamed_8, 30

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z11kernel_castIdtEvPKT_PT0_i"
	.size	.L__unnamed_9, 30

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"_Z11kernel_castItdEvPKT_PT0_i"
	.size	.L__unnamed_10, 30

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"_Z11kernel_castIfjEvPKT_PT0_i"
	.size	.L__unnamed_11, 30

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"_Z11kernel_castIjfEvPKT_PT0_i"
	.size	.L__unnamed_12, 30

	.type	.L__unnamed_13,@object          # @12
.L__unnamed_13:
	.asciz	"_Z11kernel_castIdjEvPKT_PT0_i"
	.size	.L__unnamed_13, 30

	.type	.L__unnamed_14,@object          # @13
.L__unnamed_14:
	.asciz	"_Z11kernel_castIjdEvPKT_PT0_i"
	.size	.L__unnamed_14, 30

	.type	.L__unnamed_15,@object          # @14
.L__unnamed_15:
	.asciz	"_Z11kernel_castIfhEvPKT_PT0_i"
	.size	.L__unnamed_15, 30

	.type	.L__unnamed_16,@object          # @15
.L__unnamed_16:
	.asciz	"_Z11kernel_castIhfEvPKT_PT0_i"
	.size	.L__unnamed_16, 30

	.type	.L__unnamed_17,@object          # @16
.L__unnamed_17:
	.asciz	"_Z11kernel_castIdhEvPKT_PT0_i"
	.size	.L__unnamed_17, 30

	.type	.L__unnamed_18,@object          # @17
.L__unnamed_18:
	.asciz	"_Z11kernel_castIhdEvPKT_PT0_i"
	.size	.L__unnamed_18, 30

	.type	.L__unnamed_19,@object          # @18
.L__unnamed_19:
	.asciz	"_Z11kernel_castIffEvPKT_PT0_i"
	.size	.L__unnamed_19, 30

	.type	.L__unnamed_20,@object          # @19
.L__unnamed_20:
	.asciz	"_Z11kernel_castIddEvPKT_PT0_i"
	.size	.L__unnamed_20, 30

	.type	.L__unnamed_21,@object          # @20
.L__unnamed_21:
	.asciz	"_Z13kernel_assignIfEvPT_S0_i"
	.size	.L__unnamed_21, 29

	.type	.L__unnamed_22,@object          # @21
.L__unnamed_22:
	.asciz	"_Z11kernel_copyIfEvPKT_PS0_i"
	.size	.L__unnamed_22, 29

	.type	.L__unnamed_23,@object          # @22
.L__unnamed_23:
	.asciz	"_Z10kernel_addIfEvPKT_S2_PS0_i"
	.size	.L__unnamed_23, 31

	.type	.L__unnamed_24,@object          # @23
.L__unnamed_24:
	.asciz	"_Z10kernel_subIfEvPKT_S2_PS0_i"
	.size	.L__unnamed_24, 31

	.type	.L__unnamed_25,@object          # @24
.L__unnamed_25:
	.asciz	"_Z10kernel_mulIfEvPKT_S2_PS0_i"
	.size	.L__unnamed_25, 31

	.type	.L__unnamed_26,@object          # @25
.L__unnamed_26:
	.asciz	"_Z10kernel_divIfEvPKT_S2_PS0_i"
	.size	.L__unnamed_26, 31

	.type	.L__unnamed_27,@object          # @26
.L__unnamed_27:
	.asciz	"_Z10kernel_powIfEvPKT_S2_PS0_i"
	.size	.L__unnamed_27, 31

	.type	.L__unnamed_28,@object          # @27
.L__unnamed_28:
	.asciz	"_Z17kernel_add_scalarIfEvPKT_PS0_S0_i"
	.size	.L__unnamed_28, 38

	.type	.L__unnamed_29,@object          # @28
.L__unnamed_29:
	.asciz	"_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i"
	.size	.L__unnamed_29, 38

	.type	.L__unnamed_30,@object          # @29
.L__unnamed_30:
	.asciz	"_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i"
	.size	.L__unnamed_30, 42

	.type	.L__unnamed_31,@object          # @30
.L__unnamed_31:
	.asciz	"_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i"
	.size	.L__unnamed_31, 38

	.type	.L__unnamed_32,@object          # @31
.L__unnamed_32:
	.asciz	"_Z17kernel_div_scalarIfEvPKT_PS0_S0_i"
	.size	.L__unnamed_32, 38

	.type	.L__unnamed_33,@object          # @32
.L__unnamed_33:
	.asciz	"_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i"
	.size	.L__unnamed_33, 42

	.type	.L__unnamed_34,@object          # @33
.L__unnamed_34:
	.asciz	"_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i"
	.size	.L__unnamed_34, 38

	.type	.L__unnamed_35,@object          # @34
.L__unnamed_35:
	.asciz	"_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i"
	.size	.L__unnamed_35, 42

	.type	.L__unnamed_36,@object          # @35
.L__unnamed_36:
	.asciz	"_Z12kernel_equalIfEvPKT_S2_PS0_i"
	.size	.L__unnamed_36, 33

	.type	.L__unnamed_37,@object          # @36
.L__unnamed_37:
	.asciz	"_Z14kernel_greaterIfEvPKT_S2_PS0_i"
	.size	.L__unnamed_37, 35

	.type	.L__unnamed_38,@object          # @37
.L__unnamed_38:
	.asciz	"_Z11kernel_lessIfEvPKT_S2_PS0_i"
	.size	.L__unnamed_38, 32

	.type	.L__unnamed_39,@object          # @38
.L__unnamed_39:
	.asciz	"_Z20kernel_greater_equalIfEvPKT_S2_PS0_i"
	.size	.L__unnamed_39, 41

	.type	.L__unnamed_40,@object          # @39
.L__unnamed_40:
	.asciz	"_Z17kernel_less_equalIfEvPKT_S2_PS0_i"
	.size	.L__unnamed_40, 38

	.type	.L__unnamed_41,@object          # @40
.L__unnamed_41:
	.asciz	"_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i"
	.size	.L__unnamed_41, 40

	.type	.L__unnamed_42,@object          # @41
.L__unnamed_42:
	.asciz	"_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i"
	.size	.L__unnamed_42, 42

	.type	.L__unnamed_43,@object          # @42
.L__unnamed_43:
	.asciz	"_Z18kernel_less_scalarIfEvPKT_PS0_S0_i"
	.size	.L__unnamed_43, 39

	.type	.L__unnamed_44,@object          # @43
.L__unnamed_44:
	.asciz	"_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i"
	.size	.L__unnamed_44, 48

	.type	.L__unnamed_45,@object          # @44
.L__unnamed_45:
	.asciz	"_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i"
	.size	.L__unnamed_45, 45

	.type	.L__unnamed_46,@object          # @45
.L__unnamed_46:
	.asciz	"_Z14kernel_replaceIfEvPKT_S2_PS0_i"
	.size	.L__unnamed_46, 35

	.type	.L__unnamed_47,@object          # @46
.L__unnamed_47:
	.asciz	"_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i"
	.size	.L__unnamed_47, 42

	.type	.L__unnamed_48,@object          # @47
.L__unnamed_48:
	.asciz	"_Z10kernel_sumIfEvPKT_PS0_i"
	.size	.L__unnamed_48, 28

	.type	.L__unnamed_49,@object          # @48
.L__unnamed_49:
	.asciz	"_Z10kernel_minIfEvPKT_PS0_i"
	.size	.L__unnamed_49, 28

	.type	.L__unnamed_50,@object          # @49
.L__unnamed_50:
	.asciz	"_Z10kernel_maxIfEvPKT_PS0_i"
	.size	.L__unnamed_50, 28

	.type	.L__unnamed_51,@object          # @50
.L__unnamed_51:
	.asciz	"_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii"
	.size	.L__unnamed_51, 36

	.type	.L__unnamed_52,@object          # @51
.L__unnamed_52:
	.asciz	"_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii"
	.size	.L__unnamed_52, 38

	.type	.L__unnamed_53,@object          # @52
.L__unnamed_53:
	.asciz	"_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii"
	.size	.L__unnamed_53, 39

	.type	.L__unnamed_54,@object          # @53
.L__unnamed_54:
	.asciz	"_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii"
	.size	.L__unnamed_54, 41

	.type	.L__unnamed_55,@object          # @54
.L__unnamed_55:
	.asciz	"_Z14kernel_grid_2dIfEvPT_S1_Pdii"
	.size	.L__unnamed_55, 33

	.type	.L__unnamed_56,@object          # @55
.L__unnamed_56:
	.asciz	"_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii"
	.size	.L__unnamed_56, 37

	.type	.L__unnamed_57,@object          # @56
.L__unnamed_57:
	.asciz	"_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i"
	.size	.L__unnamed_57, 43

	.type	.L__unnamed_58,@object          # @57
.L__unnamed_58:
	.asciz	"_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i"
	.size	.L__unnamed_58, 49

	.type	.L__unnamed_59,@object          # @58
.L__unnamed_59:
	.asciz	"_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi"
	.size	.L__unnamed_59, 47

	.type	.L__unnamed_60,@object          # @59
.L__unnamed_60:
	.asciz	"_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi"
	.size	.L__unnamed_60, 53

	.type	.L__unnamed_61,@object          # @60
.L__unnamed_61:
	.asciz	"_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i"
	.size	.L__unnamed_61, 46

	.type	.L__unnamed_62,@object          # @61
.L__unnamed_62:
	.asciz	"_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i"
	.size	.L__unnamed_62, 55

	.type	.L__unnamed_63,@object          # @62
.L__unnamed_63:
	.asciz	"_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii"
	.size	.L__unnamed_63, 58

	.type	.L__unnamed_64,@object          # @63
.L__unnamed_64:
	.asciz	"_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii"
	.size	.L__unnamed_64, 63

	.type	.L__unnamed_65,@object          # @64
.L__unnamed_65:
	.asciz	"_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii"
	.size	.L__unnamed_65, 57

	.type	.L__unnamed_66,@object          # @65
.L__unnamed_66:
	.asciz	"_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii"
	.size	.L__unnamed_66, 62

	.type	.L__unnamed_67,@object          # @66
.L__unnamed_67:
	.asciz	"_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii"
	.size	.L__unnamed_67, 56

	.type	.L__unnamed_68,@object          # @67
.L__unnamed_68:
	.asciz	"_Z16kernel_gradientxIfEvPKT_PS0_iii"
	.size	.L__unnamed_68, 36

	.type	.L__unnamed_69,@object          # @68
.L__unnamed_69:
	.asciz	"_Z16kernel_gradientyIfEvPKT_PS0_iii"
	.size	.L__unnamed_69, 36

	.type	.L__unnamed_70,@object          # @69
.L__unnamed_70:
	.asciz	"_Z16kernel_gradientzIfEvPKT_PS0_iii"
	.size	.L__unnamed_70, 36

	.type	.L__unnamed_71,@object          # @70
.L__unnamed_71:
	.asciz	"_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii"
	.size	.L__unnamed_71, 45

	.type	.L__unnamed_72,@object          # @71
.L__unnamed_72:
	.asciz	"_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii"
	.size	.L__unnamed_72, 47

	.type	.L__unnamed_73,@object          # @72
.L__unnamed_73:
	.asciz	"_Z13kernel_assignIdEvPT_S0_i"
	.size	.L__unnamed_73, 29

	.type	.L__unnamed_74,@object          # @73
.L__unnamed_74:
	.asciz	"_Z11kernel_copyIdEvPKT_PS0_i"
	.size	.L__unnamed_74, 29

	.type	.L__unnamed_75,@object          # @74
.L__unnamed_75:
	.asciz	"_Z10kernel_addIdEvPKT_S2_PS0_i"
	.size	.L__unnamed_75, 31

	.type	.L__unnamed_76,@object          # @75
.L__unnamed_76:
	.asciz	"_Z10kernel_subIdEvPKT_S2_PS0_i"
	.size	.L__unnamed_76, 31

	.type	.L__unnamed_77,@object          # @76
.L__unnamed_77:
	.asciz	"_Z10kernel_mulIdEvPKT_S2_PS0_i"
	.size	.L__unnamed_77, 31

	.type	.L__unnamed_78,@object          # @77
.L__unnamed_78:
	.asciz	"_Z10kernel_divIdEvPKT_S2_PS0_i"
	.size	.L__unnamed_78, 31

	.type	.L__unnamed_79,@object          # @78
.L__unnamed_79:
	.asciz	"_Z10kernel_powIdEvPKT_S2_PS0_i"
	.size	.L__unnamed_79, 31

	.type	.L__unnamed_80,@object          # @79
.L__unnamed_80:
	.asciz	"_Z17kernel_add_scalarIdEvPKT_PS0_S0_i"
	.size	.L__unnamed_80, 38

	.type	.L__unnamed_81,@object          # @80
.L__unnamed_81:
	.asciz	"_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i"
	.size	.L__unnamed_81, 38

	.type	.L__unnamed_82,@object          # @81
.L__unnamed_82:
	.asciz	"_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i"
	.size	.L__unnamed_82, 42

	.type	.L__unnamed_83,@object          # @82
.L__unnamed_83:
	.asciz	"_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i"
	.size	.L__unnamed_83, 38

	.type	.L__unnamed_84,@object          # @83
.L__unnamed_84:
	.asciz	"_Z17kernel_div_scalarIdEvPKT_PS0_S0_i"
	.size	.L__unnamed_84, 38

	.type	.L__unnamed_85,@object          # @84
.L__unnamed_85:
	.asciz	"_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i"
	.size	.L__unnamed_85, 42

	.type	.L__unnamed_86,@object          # @85
.L__unnamed_86:
	.asciz	"_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i"
	.size	.L__unnamed_86, 38

	.type	.L__unnamed_87,@object          # @86
.L__unnamed_87:
	.asciz	"_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i"
	.size	.L__unnamed_87, 42

	.type	.L__unnamed_88,@object          # @87
.L__unnamed_88:
	.asciz	"_Z12kernel_equalIdEvPKT_S2_PS0_i"
	.size	.L__unnamed_88, 33

	.type	.L__unnamed_89,@object          # @88
.L__unnamed_89:
	.asciz	"_Z14kernel_greaterIdEvPKT_S2_PS0_i"
	.size	.L__unnamed_89, 35

	.type	.L__unnamed_90,@object          # @89
.L__unnamed_90:
	.asciz	"_Z11kernel_lessIdEvPKT_S2_PS0_i"
	.size	.L__unnamed_90, 32

	.type	.L__unnamed_91,@object          # @90
.L__unnamed_91:
	.asciz	"_Z20kernel_greater_equalIdEvPKT_S2_PS0_i"
	.size	.L__unnamed_91, 41

	.type	.L__unnamed_92,@object          # @91
.L__unnamed_92:
	.asciz	"_Z17kernel_less_equalIdEvPKT_S2_PS0_i"
	.size	.L__unnamed_92, 38

	.type	.L__unnamed_93,@object          # @92
.L__unnamed_93:
	.asciz	"_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i"
	.size	.L__unnamed_93, 40

	.type	.L__unnamed_94,@object          # @93
.L__unnamed_94:
	.asciz	"_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i"
	.size	.L__unnamed_94, 42

	.type	.L__unnamed_95,@object          # @94
.L__unnamed_95:
	.asciz	"_Z18kernel_less_scalarIdEvPKT_PS0_S0_i"
	.size	.L__unnamed_95, 39

	.type	.L__unnamed_96,@object          # @95
.L__unnamed_96:
	.asciz	"_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i"
	.size	.L__unnamed_96, 48

	.type	.L__unnamed_97,@object          # @96
.L__unnamed_97:
	.asciz	"_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i"
	.size	.L__unnamed_97, 45

	.type	.L__unnamed_98,@object          # @97
.L__unnamed_98:
	.asciz	"_Z14kernel_replaceIdEvPKT_S2_PS0_i"
	.size	.L__unnamed_98, 35

	.type	.L__unnamed_99,@object          # @98
.L__unnamed_99:
	.asciz	"_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i"
	.size	.L__unnamed_99, 42

	.type	.L__unnamed_100,@object         # @99
.L__unnamed_100:
	.asciz	"_Z10kernel_sumIdEvPKT_PS0_i"
	.size	.L__unnamed_100, 28

	.type	.L__unnamed_101,@object         # @100
.L__unnamed_101:
	.asciz	"_Z10kernel_minIdEvPKT_PS0_i"
	.size	.L__unnamed_101, 28

	.type	.L__unnamed_102,@object         # @101
.L__unnamed_102:
	.asciz	"_Z10kernel_maxIdEvPKT_PS0_i"
	.size	.L__unnamed_102, 28

	.type	.L__unnamed_103,@object         # @102
.L__unnamed_103:
	.asciz	"_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii"
	.size	.L__unnamed_103, 36

	.type	.L__unnamed_104,@object         # @103
.L__unnamed_104:
	.asciz	"_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii"
	.size	.L__unnamed_104, 38

	.type	.L__unnamed_105,@object         # @104
.L__unnamed_105:
	.asciz	"_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii"
	.size	.L__unnamed_105, 39

	.type	.L__unnamed_106,@object         # @105
.L__unnamed_106:
	.asciz	"_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii"
	.size	.L__unnamed_106, 41

	.type	.L__unnamed_107,@object         # @106
.L__unnamed_107:
	.asciz	"_Z14kernel_grid_2dIdEvPT_S1_Pdii"
	.size	.L__unnamed_107, 33

	.type	.L__unnamed_108,@object         # @107
.L__unnamed_108:
	.asciz	"_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii"
	.size	.L__unnamed_108, 37

	.type	.L__unnamed_109,@object         # @108
.L__unnamed_109:
	.asciz	"_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i"
	.size	.L__unnamed_109, 43

	.type	.L__unnamed_110,@object         # @109
.L__unnamed_110:
	.asciz	"_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i"
	.size	.L__unnamed_110, 49

	.type	.L__unnamed_111,@object         # @110
.L__unnamed_111:
	.asciz	"_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi"
	.size	.L__unnamed_111, 47

	.type	.L__unnamed_112,@object         # @111
.L__unnamed_112:
	.asciz	"_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi"
	.size	.L__unnamed_112, 53

	.type	.L__unnamed_113,@object         # @112
.L__unnamed_113:
	.asciz	"_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i"
	.size	.L__unnamed_113, 46

	.type	.L__unnamed_114,@object         # @113
.L__unnamed_114:
	.asciz	"_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i"
	.size	.L__unnamed_114, 55

	.type	.L__unnamed_115,@object         # @114
.L__unnamed_115:
	.asciz	"_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii"
	.size	.L__unnamed_115, 58

	.type	.L__unnamed_116,@object         # @115
.L__unnamed_116:
	.asciz	"_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii"
	.size	.L__unnamed_116, 63

	.type	.L__unnamed_117,@object         # @116
.L__unnamed_117:
	.asciz	"_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii"
	.size	.L__unnamed_117, 57

	.type	.L__unnamed_118,@object         # @117
.L__unnamed_118:
	.asciz	"_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii"
	.size	.L__unnamed_118, 62

	.type	.L__unnamed_119,@object         # @118
.L__unnamed_119:
	.asciz	"_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii"
	.size	.L__unnamed_119, 56

	.type	.L__unnamed_120,@object         # @119
.L__unnamed_120:
	.asciz	"_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii"
	.size	.L__unnamed_120, 61

	.type	.L__unnamed_121,@object         # @120
.L__unnamed_121:
	.asciz	"_Z16kernel_gradientxIdEvPKT_PS0_iii"
	.size	.L__unnamed_121, 36

	.type	.L__unnamed_122,@object         # @121
.L__unnamed_122:
	.asciz	"_Z16kernel_gradientyIdEvPKT_PS0_iii"
	.size	.L__unnamed_122, 36

	.type	.L__unnamed_123,@object         # @122
.L__unnamed_123:
	.asciz	"_Z16kernel_gradientzIdEvPKT_PS0_iii"
	.size	.L__unnamed_123, 36

	.type	.L__unnamed_124,@object         # @123
.L__unnamed_124:
	.asciz	"_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii"
	.size	.L__unnamed_124, 45

	.type	.L__unnamed_125,@object         # @124
.L__unnamed_125:
	.asciz	"_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii"
	.size	.L__unnamed_125, 47

	.type	.L__unnamed_126,@object         # @125
.L__unnamed_126:
	.asciz	"_Z13kernel_assignIiEvPT_S0_i"
	.size	.L__unnamed_126, 29

	.type	.L__unnamed_127,@object         # @126
.L__unnamed_127:
	.asciz	"_Z11kernel_copyIiEvPKT_PS0_i"
	.size	.L__unnamed_127, 29

	.type	.L__unnamed_128,@object         # @127
.L__unnamed_128:
	.asciz	"_Z10kernel_addIiEvPKT_S2_PS0_i"
	.size	.L__unnamed_128, 31

	.type	.L__unnamed_129,@object         # @128
.L__unnamed_129:
	.asciz	"_Z10kernel_subIiEvPKT_S2_PS0_i"
	.size	.L__unnamed_129, 31

	.type	.L__unnamed_130,@object         # @129
.L__unnamed_130:
	.asciz	"_Z10kernel_mulIiEvPKT_S2_PS0_i"
	.size	.L__unnamed_130, 31

	.type	.L__unnamed_131,@object         # @130
.L__unnamed_131:
	.asciz	"_Z10kernel_divIiEvPKT_S2_PS0_i"
	.size	.L__unnamed_131, 31

	.type	.L__unnamed_132,@object         # @131
.L__unnamed_132:
	.asciz	"_Z10kernel_powIiEvPKT_S2_PS0_i"
	.size	.L__unnamed_132, 31

	.type	.L__unnamed_133,@object         # @132
.L__unnamed_133:
	.asciz	"_Z17kernel_add_scalarIiEvPKT_PS0_S0_i"
	.size	.L__unnamed_133, 38

	.type	.L__unnamed_134,@object         # @133
.L__unnamed_134:
	.asciz	"_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i"
	.size	.L__unnamed_134, 38

	.type	.L__unnamed_135,@object         # @134
.L__unnamed_135:
	.asciz	"_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i"
	.size	.L__unnamed_135, 42

	.type	.L__unnamed_136,@object         # @135
.L__unnamed_136:
	.asciz	"_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i"
	.size	.L__unnamed_136, 38

	.type	.L__unnamed_137,@object         # @136
.L__unnamed_137:
	.asciz	"_Z17kernel_div_scalarIiEvPKT_PS0_S0_i"
	.size	.L__unnamed_137, 38

	.type	.L__unnamed_138,@object         # @137
.L__unnamed_138:
	.asciz	"_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i"
	.size	.L__unnamed_138, 42

	.type	.L__unnamed_139,@object         # @138
.L__unnamed_139:
	.asciz	"_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i"
	.size	.L__unnamed_139, 38

	.type	.L__unnamed_140,@object         # @139
.L__unnamed_140:
	.asciz	"_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i"
	.size	.L__unnamed_140, 42

	.type	.L__unnamed_141,@object         # @140
.L__unnamed_141:
	.asciz	"_Z12kernel_equalIiEvPKT_S2_PS0_i"
	.size	.L__unnamed_141, 33

	.type	.L__unnamed_142,@object         # @141
.L__unnamed_142:
	.asciz	"_Z14kernel_greaterIiEvPKT_S2_PS0_i"
	.size	.L__unnamed_142, 35

	.type	.L__unnamed_143,@object         # @142
.L__unnamed_143:
	.asciz	"_Z11kernel_lessIiEvPKT_S2_PS0_i"
	.size	.L__unnamed_143, 32

	.type	.L__unnamed_144,@object         # @143
.L__unnamed_144:
	.asciz	"_Z20kernel_greater_equalIiEvPKT_S2_PS0_i"
	.size	.L__unnamed_144, 41

	.type	.L__unnamed_145,@object         # @144
.L__unnamed_145:
	.asciz	"_Z17kernel_less_equalIiEvPKT_S2_PS0_i"
	.size	.L__unnamed_145, 38

	.type	.L__unnamed_146,@object         # @145
.L__unnamed_146:
	.asciz	"_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i"
	.size	.L__unnamed_146, 40

	.type	.L__unnamed_147,@object         # @146
.L__unnamed_147:
	.asciz	"_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i"
	.size	.L__unnamed_147, 42

	.type	.L__unnamed_148,@object         # @147
.L__unnamed_148:
	.asciz	"_Z18kernel_less_scalarIiEvPKT_PS0_S0_i"
	.size	.L__unnamed_148, 39

	.type	.L__unnamed_149,@object         # @148
.L__unnamed_149:
	.asciz	"_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i"
	.size	.L__unnamed_149, 48

	.type	.L__unnamed_150,@object         # @149
.L__unnamed_150:
	.asciz	"_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i"
	.size	.L__unnamed_150, 45

	.type	.L__unnamed_151,@object         # @150
.L__unnamed_151:
	.asciz	"_Z14kernel_replaceIiEvPKT_S2_PS0_i"
	.size	.L__unnamed_151, 35

	.type	.L__unnamed_152,@object         # @151
.L__unnamed_152:
	.asciz	"_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i"
	.size	.L__unnamed_152, 42

	.type	.L__unnamed_153,@object         # @152
.L__unnamed_153:
	.asciz	"_Z10kernel_sumIiEvPKT_PS0_i"
	.size	.L__unnamed_153, 28

	.type	.L__unnamed_154,@object         # @153
.L__unnamed_154:
	.asciz	"_Z10kernel_minIiEvPKT_PS0_i"
	.size	.L__unnamed_154, 28

	.type	.L__unnamed_155,@object         # @154
.L__unnamed_155:
	.asciz	"_Z10kernel_maxIiEvPKT_PS0_i"
	.size	.L__unnamed_155, 28

	.type	.L__unnamed_156,@object         # @155
.L__unnamed_156:
	.asciz	"_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii"
	.size	.L__unnamed_156, 36

	.type	.L__unnamed_157,@object         # @156
.L__unnamed_157:
	.asciz	"_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii"
	.size	.L__unnamed_157, 38

	.type	.L__unnamed_158,@object         # @157
.L__unnamed_158:
	.asciz	"_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii"
	.size	.L__unnamed_158, 39

	.type	.L__unnamed_159,@object         # @158
.L__unnamed_159:
	.asciz	"_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii"
	.size	.L__unnamed_159, 41

	.type	.L__unnamed_160,@object         # @159
.L__unnamed_160:
	.asciz	"_Z14kernel_grid_2dIiEvPT_S1_Pdii"
	.size	.L__unnamed_160, 33

	.type	.L__unnamed_161,@object         # @160
.L__unnamed_161:
	.asciz	"_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii"
	.size	.L__unnamed_161, 37

	.type	.L__unnamed_162,@object         # @161
.L__unnamed_162:
	.asciz	"_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i"
	.size	.L__unnamed_162, 43

	.type	.L__unnamed_163,@object         # @162
.L__unnamed_163:
	.asciz	"_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i"
	.size	.L__unnamed_163, 49

	.type	.L__unnamed_164,@object         # @163
.L__unnamed_164:
	.asciz	"_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi"
	.size	.L__unnamed_164, 47

	.type	.L__unnamed_165,@object         # @164
.L__unnamed_165:
	.asciz	"_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi"
	.size	.L__unnamed_165, 53

	.type	.L__unnamed_166,@object         # @165
.L__unnamed_166:
	.asciz	"_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i"
	.size	.L__unnamed_166, 46

	.type	.L__unnamed_167,@object         # @166
.L__unnamed_167:
	.asciz	"_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i"
	.size	.L__unnamed_167, 55

	.type	.L__unnamed_168,@object         # @167
.L__unnamed_168:
	.asciz	"_Z16kernel_gradientxIiEvPKT_PS0_iii"
	.size	.L__unnamed_168, 36

	.type	.L__unnamed_169,@object         # @168
.L__unnamed_169:
	.asciz	"_Z16kernel_gradientyIiEvPKT_PS0_iii"
	.size	.L__unnamed_169, 36

	.type	.L__unnamed_170,@object         # @169
.L__unnamed_170:
	.asciz	"_Z16kernel_gradientzIiEvPKT_PS0_iii"
	.size	.L__unnamed_170, 36

	.type	.L__unnamed_171,@object         # @170
.L__unnamed_171:
	.asciz	"_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii"
	.size	.L__unnamed_171, 45

	.type	.L__unnamed_172,@object         # @171
.L__unnamed_172:
	.asciz	"_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii"
	.size	.L__unnamed_172, 47

	.type	.L__unnamed_173,@object         # @172
.L__unnamed_173:
	.asciz	"_Z13kernel_assignItEvPT_S0_i"
	.size	.L__unnamed_173, 29

	.type	.L__unnamed_174,@object         # @173
.L__unnamed_174:
	.asciz	"_Z11kernel_copyItEvPKT_PS0_i"
	.size	.L__unnamed_174, 29

	.type	.L__unnamed_175,@object         # @174
.L__unnamed_175:
	.asciz	"_Z13kernel_assignIjEvPT_S0_i"
	.size	.L__unnamed_175, 29

	.type	.L__unnamed_176,@object         # @175
.L__unnamed_176:
	.asciz	"_Z11kernel_copyIjEvPKT_PS0_i"
	.size	.L__unnamed_176, 29

	.type	.L__unnamed_177,@object         # @176
.L__unnamed_177:
	.asciz	"_Z13kernel_assignIhEvPT_S0_i"
	.size	.L__unnamed_177, 29

	.type	.L__unnamed_178,@object         # @177
.L__unnamed_178:
	.asciz	"_Z11kernel_copyIhEvPKT_PS0_i"
	.size	.L__unnamed_178, 29

	.type	.L__unnamed_179,@object         # @178
.L__unnamed_179:
	.asciz	"_Z13kernel_assignIsEvPT_S0_i"
	.size	.L__unnamed_179, 29

	.type	.L__unnamed_180,@object         # @179
.L__unnamed_180:
	.asciz	"_Z11kernel_copyIsEvPKT_PS0_i"
	.size	.L__unnamed_180, 29

	.type	.L__unnamed_181,@object         # @180
.L__unnamed_181:
	.asciz	"_Z13kernel_assignIcEvPT_S0_i"
	.size	.L__unnamed_181, 29

	.type	.L__unnamed_182,@object         # @181
.L__unnamed_182:
	.asciz	"_Z11kernel_copyIcEvPKT_PS0_i"
	.size	.L__unnamed_182, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__kernel_castIfdEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIdfEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIifEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIfiEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIidEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIdiEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIftEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castItfEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIdtEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castItdEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIfjEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIjfEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIdjEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIjdEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIfhEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIhfEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIdhEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIhdEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIffEvPKT_PT0_i
	.addrsig_sym _Z26__device_stub__kernel_castIddEvPKT_PT0_i
	.addrsig_sym _Z28__device_stub__kernel_assignIfEvPT_S0_i
	.addrsig_sym _Z26__device_stub__kernel_copyIfEvPKT_PS0_i
	.addrsig_sym _Z25__device_stub__kernel_addIfEvPKT_S2_PS0_i
	.addrsig_sym _Z25__device_stub__kernel_subIfEvPKT_S2_PS0_i
	.addrsig_sym _Z25__device_stub__kernel_mulIfEvPKT_S2_PS0_i
	.addrsig_sym _Z25__device_stub__kernel_divIfEvPKT_S2_PS0_i
	.addrsig_sym _Z25__device_stub__kernel_powIfEvPKT_S2_PS0_i
	.addrsig_sym _Z32__device_stub__kernel_add_scalarIfEvPKT_PS0_S0_i
	.addrsig_sym _Z32__device_stub__kernel_sub_scalarIfEvPKT_PS0_S0_i
	.addrsig_sym _Z36__device_stub__kernel_sub_scalar_invIfEvPKT_PS0_S0_i
	.addrsig_sym _Z32__device_stub__kernel_mul_scalarIfEvPKT_PS0_S0_i
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	.addrsig_sym _Z12kernel_equalIdEvPKT_S2_PS0_i
	.addrsig_sym _Z14kernel_greaterIdEvPKT_S2_PS0_i
	.addrsig_sym _Z11kernel_lessIdEvPKT_S2_PS0_i
	.addrsig_sym _Z20kernel_greater_equalIdEvPKT_S2_PS0_i
	.addrsig_sym _Z17kernel_less_equalIdEvPKT_S2_PS0_i
	.addrsig_sym _Z19kernel_equal_scalarIdEvPKT_PS0_S0_i
	.addrsig_sym _Z21kernel_greater_scalarIdEvPKT_PS0_S0_i
	.addrsig_sym _Z18kernel_less_scalarIdEvPKT_PS0_S0_i
	.addrsig_sym _Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i
	.addrsig_sym _Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i
	.addrsig_sym _Z14kernel_replaceIdEvPKT_S2_PS0_i
	.addrsig_sym _Z21kernel_replace_scalarIdEvPKT_PS0_S0_i
	.addrsig_sym _Z10kernel_sumIdEvPKT_PS0_i
	.addrsig_sym _Z10kernel_minIdEvPKT_PS0_i
	.addrsig_sym _Z10kernel_maxIdEvPKT_PS0_i
	.addrsig_sym _Z13kernel_pad_2dIdEvPKT_PS0_iiiiii
	.addrsig_sym _Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii
	.addrsig_sym _Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii
	.addrsig_sym _Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii
	.addrsig_sym _Z14kernel_grid_2dIdEvPT_S1_Pdii
	.addrsig_sym _Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii
	.addrsig_sym _Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i
	.addrsig_sym _Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i
	.addrsig_sym _Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi
	.addrsig_sym _Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi
	.addrsig_sym _Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i
	.addrsig_sym _Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.addrsig_sym _Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.addrsig_sym _Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.addrsig_sym _Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.addrsig_sym _Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.addrsig_sym _Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.addrsig_sym _Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.addrsig_sym _Z16kernel_gradientxIdEvPKT_PS0_iii
	.addrsig_sym _Z16kernel_gradientyIdEvPKT_PS0_iii
	.addrsig_sym _Z16kernel_gradientzIdEvPKT_PS0_iii
	.addrsig_sym _Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii
	.addrsig_sym _Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii
	.addrsig_sym _Z13kernel_assignIiEvPT_S0_i
	.addrsig_sym _Z11kernel_copyIiEvPKT_PS0_i
	.addrsig_sym _Z10kernel_addIiEvPKT_S2_PS0_i
	.addrsig_sym _Z10kernel_subIiEvPKT_S2_PS0_i
	.addrsig_sym _Z10kernel_mulIiEvPKT_S2_PS0_i
	.addrsig_sym _Z10kernel_divIiEvPKT_S2_PS0_i
	.addrsig_sym _Z10kernel_powIiEvPKT_S2_PS0_i
	.addrsig_sym _Z17kernel_add_scalarIiEvPKT_PS0_S0_i
	.addrsig_sym _Z17kernel_sub_scalarIiEvPKT_PS0_S0_i
	.addrsig_sym _Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i
	.addrsig_sym _Z17kernel_mul_scalarIiEvPKT_PS0_S0_i
	.addrsig_sym _Z17kernel_div_scalarIiEvPKT_PS0_S0_i
	.addrsig_sym _Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i
	.addrsig_sym _Z17kernel_pow_scalarIiEvPKT_PS0_S0_i
	.addrsig_sym _Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i
	.addrsig_sym _Z12kernel_equalIiEvPKT_S2_PS0_i
	.addrsig_sym _Z14kernel_greaterIiEvPKT_S2_PS0_i
	.addrsig_sym _Z11kernel_lessIiEvPKT_S2_PS0_i
	.addrsig_sym _Z20kernel_greater_equalIiEvPKT_S2_PS0_i
	.addrsig_sym _Z17kernel_less_equalIiEvPKT_S2_PS0_i
	.addrsig_sym _Z19kernel_equal_scalarIiEvPKT_PS0_S0_i
	.addrsig_sym _Z21kernel_greater_scalarIiEvPKT_PS0_S0_i
	.addrsig_sym _Z18kernel_less_scalarIiEvPKT_PS0_S0_i
	.addrsig_sym _Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i
	.addrsig_sym _Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i
	.addrsig_sym _Z14kernel_replaceIiEvPKT_S2_PS0_i
	.addrsig_sym _Z21kernel_replace_scalarIiEvPKT_PS0_S0_i
	.addrsig_sym _Z10kernel_sumIiEvPKT_PS0_i
	.addrsig_sym _Z10kernel_minIiEvPKT_PS0_i
	.addrsig_sym _Z10kernel_maxIiEvPKT_PS0_i
	.addrsig_sym _Z13kernel_pad_2dIiEvPKT_PS0_iiiiii
	.addrsig_sym _Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii
	.addrsig_sym _Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii
	.addrsig_sym _Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii
	.addrsig_sym _Z14kernel_grid_2dIiEvPT_S1_Pdii
	.addrsig_sym _Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii
	.addrsig_sym _Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i
	.addrsig_sym _Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i
	.addrsig_sym _Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi
	.addrsig_sym _Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi
	.addrsig_sym _Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i
	.addrsig_sym _Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.addrsig_sym _Z16kernel_gradientxIiEvPKT_PS0_iii
	.addrsig_sym _Z16kernel_gradientyIiEvPKT_PS0_iii
	.addrsig_sym _Z16kernel_gradientzIiEvPKT_PS0_iii
	.addrsig_sym _Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii
	.addrsig_sym _Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii
	.addrsig_sym _Z13kernel_assignItEvPT_S0_i
	.addrsig_sym _Z11kernel_copyItEvPKT_PS0_i
	.addrsig_sym _Z13kernel_assignIjEvPT_S0_i
	.addrsig_sym _Z11kernel_copyIjEvPKT_PS0_i
	.addrsig_sym _Z13kernel_assignIhEvPT_S0_i
	.addrsig_sym _Z11kernel_copyIhEvPKT_PS0_i
	.addrsig_sym _Z13kernel_assignIsEvPT_S0_i
	.addrsig_sym _Z11kernel_copyIsEvPKT_PS0_i
	.addrsig_sym _Z13kernel_assignIcEvPT_S0_i
	.addrsig_sym _Z11kernel_copyIcEvPKT_PS0_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z11kernel_castIfdEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIfdEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIfdEvPKT_PT0_i ; -- Begin function _Z11kernel_castIfdEvPKT_PT0_i
	.globl	_Z11kernel_castIfdEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIfdEvPKT_PT0_i,@function
_Z11kernel_castIfdEvPKT_PT0_i:          ; @_Z11kernel_castIfdEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v0, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[3:4], v0
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b64 v[0:1], v[3:4], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIfdEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIfdEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIfdEvPKT_PT0_i,comdat
.Lfunc_end0:
	.size	_Z11kernel_castIfdEvPKT_PT0_i, .Lfunc_end0-_Z11kernel_castIfdEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIdfEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIdfEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIdfEvPKT_PT0_i ; -- Begin function _Z11kernel_castIdfEvPKT_PT0_i
	.globl	_Z11kernel_castIdfEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIdfEvPKT_PT0_i,@function
_Z11kernel_castIdfEvPKT_PT0_i:          ; @_Z11kernel_castIdfEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_f32_f64_e32 v3, v[3:4]
	global_store_b32 v[0:1], v3, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIdfEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIdfEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIdfEvPKT_PT0_i,comdat
.Lfunc_end1:
	.size	_Z11kernel_castIdfEvPKT_PT0_i, .Lfunc_end1-_Z11kernel_castIdfEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIifEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIifEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIifEvPKT_PT0_i ; -- Begin function _Z11kernel_castIifEvPKT_PT0_i
	.globl	_Z11kernel_castIifEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIifEvPKT_PT0_i,@function
_Z11kernel_castIifEvPKT_PT0_i:          ; @_Z11kernel_castIifEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v2, v2
	global_store_b32 v[0:1], v2, off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIifEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIifEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIifEvPKT_PT0_i,comdat
.Lfunc_end2:
	.size	_Z11kernel_castIifEvPKT_PT0_i, .Lfunc_end2-_Z11kernel_castIifEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIfiEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIfiEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIfiEvPKT_PT0_i ; -- Begin function _Z11kernel_castIfiEvPKT_PT0_i
	.globl	_Z11kernel_castIfiEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIfiEvPKT_PT0_i,@function
_Z11kernel_castIfiEvPKT_PT0_i:          ; @_Z11kernel_castIfiEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v2, v2
	global_store_b32 v[0:1], v2, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIfiEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIfiEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIfiEvPKT_PT0_i,comdat
.Lfunc_end3:
	.size	_Z11kernel_castIfiEvPKT_PT0_i, .Lfunc_end3-_Z11kernel_castIfiEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIidEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIidEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIidEvPKT_PT0_i ; -- Begin function _Z11kernel_castIidEvPKT_PT0_i
	.globl	_Z11kernel_castIidEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIidEvPKT_PT0_i,@function
_Z11kernel_castIidEvPKT_PT0_i:          ; @_Z11kernel_castIidEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB4_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v0, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_f64_i32_e32 v[3:4], v0
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b64 v[0:1], v[3:4], off
.LBB4_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIidEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIidEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIidEvPKT_PT0_i,comdat
.Lfunc_end4:
	.size	_Z11kernel_castIidEvPKT_PT0_i, .Lfunc_end4-_Z11kernel_castIidEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIdiEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIdiEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIdiEvPKT_PT0_i ; -- Begin function _Z11kernel_castIdiEvPKT_PT0_i
	.globl	_Z11kernel_castIdiEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIdiEvPKT_PT0_i,@function
_Z11kernel_castIdiEvPKT_PT0_i:          ; @_Z11kernel_castIdiEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB5_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_i32_f64_e32 v3, v[3:4]
	global_store_b32 v[0:1], v3, off
.LBB5_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIdiEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIdiEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIdiEvPKT_PT0_i,comdat
.Lfunc_end5:
	.size	_Z11kernel_castIdiEvPKT_PT0_i, .Lfunc_end5-_Z11kernel_castIdiEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIftEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIftEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIftEvPKT_PT0_i ; -- Begin function _Z11kernel_castIftEvPKT_PT0_i
	.globl	_Z11kernel_castIftEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIftEvPKT_PT0_i,@function
_Z11kernel_castIftEvPKT_PT0_i:          ; @_Z11kernel_castIftEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB6_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_lshlrev_b64 v[0:1], 1, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_u32_f32_e32 v2, v3
	global_store_b16 v[0:1], v2, off
.LBB6_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIftEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIftEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIftEvPKT_PT0_i,comdat
.Lfunc_end6:
	.size	_Z11kernel_castIftEvPKT_PT0_i, .Lfunc_end6-_Z11kernel_castIftEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castItfEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castItfEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castItfEvPKT_PT0_i ; -- Begin function _Z11kernel_castItfEvPKT_PT0_i
	.globl	_Z11kernel_castItfEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castItfEvPKT_PT0_i,@function
_Z11kernel_castItfEvPKT_PT0_i:          ; @_Z11kernel_castItfEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB7_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 1, v[1:2]
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_u16 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_f32_u32_e32 v2, v3
	global_store_b32 v[0:1], v2, off
.LBB7_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castItfEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castItfEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castItfEvPKT_PT0_i,comdat
.Lfunc_end7:
	.size	_Z11kernel_castItfEvPKT_PT0_i, .Lfunc_end7-_Z11kernel_castItfEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIdtEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIdtEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIdtEvPKT_PT0_i ; -- Begin function _Z11kernel_castIdtEvPKT_PT0_i
	.globl	_Z11kernel_castIdtEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIdtEvPKT_PT0_i,@function
_Z11kernel_castIdtEvPKT_PT0_i:          ; @_Z11kernel_castIdtEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB8_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	v_lshlrev_b64 v[0:1], 1, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_u32_f64_e32 v3, v[3:4]
	global_store_b16 v[0:1], v3, off
.LBB8_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIdtEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIdtEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIdtEvPKT_PT0_i,comdat
.Lfunc_end8:
	.size	_Z11kernel_castIdtEvPKT_PT0_i, .Lfunc_end8-_Z11kernel_castIdtEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castItdEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castItdEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castItdEvPKT_PT0_i ; -- Begin function _Z11kernel_castItdEvPKT_PT0_i
	.globl	_Z11kernel_castItdEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castItdEvPKT_PT0_i,@function
_Z11kernel_castItdEvPKT_PT0_i:          ; @_Z11kernel_castItdEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB9_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_u16 v0, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_f64_u32_e32 v[3:4], v0
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b64 v[0:1], v[3:4], off
.LBB9_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castItdEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castItdEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castItdEvPKT_PT0_i,comdat
.Lfunc_end9:
	.size	_Z11kernel_castItdEvPKT_PT0_i, .Lfunc_end9-_Z11kernel_castItdEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIfjEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIfjEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIfjEvPKT_PT0_i ; -- Begin function _Z11kernel_castIfjEvPKT_PT0_i
	.globl	_Z11kernel_castIfjEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIfjEvPKT_PT0_i,@function
_Z11kernel_castIfjEvPKT_PT0_i:          ; @_Z11kernel_castIfjEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB10_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cvt_u32_f32_e32 v2, v2
	global_store_b32 v[0:1], v2, off
.LBB10_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIfjEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIfjEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIfjEvPKT_PT0_i,comdat
.Lfunc_end10:
	.size	_Z11kernel_castIfjEvPKT_PT0_i, .Lfunc_end10-_Z11kernel_castIfjEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIjfEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIjfEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIjfEvPKT_PT0_i ; -- Begin function _Z11kernel_castIjfEvPKT_PT0_i
	.globl	_Z11kernel_castIjfEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIjfEvPKT_PT0_i,@function
_Z11kernel_castIjfEvPKT_PT0_i:          ; @_Z11kernel_castIjfEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB11_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cvt_f32_u32_e32 v2, v2
	global_store_b32 v[0:1], v2, off
.LBB11_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIjfEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIjfEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIjfEvPKT_PT0_i,comdat
.Lfunc_end11:
	.size	_Z11kernel_castIjfEvPKT_PT0_i, .Lfunc_end11-_Z11kernel_castIjfEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIdjEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIdjEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIdjEvPKT_PT0_i ; -- Begin function _Z11kernel_castIdjEvPKT_PT0_i
	.globl	_Z11kernel_castIdjEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIdjEvPKT_PT0_i,@function
_Z11kernel_castIdjEvPKT_PT0_i:          ; @_Z11kernel_castIdjEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB12_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_u32_f64_e32 v3, v[3:4]
	global_store_b32 v[0:1], v3, off
.LBB12_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIdjEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIdjEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIdjEvPKT_PT0_i,comdat
.Lfunc_end12:
	.size	_Z11kernel_castIdjEvPKT_PT0_i, .Lfunc_end12-_Z11kernel_castIdjEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIjdEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIjdEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIjdEvPKT_PT0_i ; -- Begin function _Z11kernel_castIjdEvPKT_PT0_i
	.globl	_Z11kernel_castIjdEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIjdEvPKT_PT0_i,@function
_Z11kernel_castIjdEvPKT_PT0_i:          ; @_Z11kernel_castIjdEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB13_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v0, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_f64_u32_e32 v[3:4], v0
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b64 v[0:1], v[3:4], off
.LBB13_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIjdEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIjdEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIjdEvPKT_PT0_i,comdat
.Lfunc_end13:
	.size	_Z11kernel_castIjdEvPKT_PT0_i, .Lfunc_end13-_Z11kernel_castIjdEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIfhEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIfhEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIfhEvPKT_PT0_i ; -- Begin function _Z11kernel_castIfhEvPKT_PT0_i
	.globl	_Z11kernel_castIfhEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIfhEvPKT_PT0_i,@function
_Z11kernel_castIfhEvPKT_PT0_i:          ; @_Z11kernel_castIfhEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB14_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v2, v3
	global_store_b8 v[0:1], v2, off
.LBB14_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIfhEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIfhEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIfhEvPKT_PT0_i,comdat
.Lfunc_end14:
	.size	_Z11kernel_castIfhEvPKT_PT0_i, .Lfunc_end14-_Z11kernel_castIfhEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIhfEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIhfEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIhfEvPKT_PT0_i ; -- Begin function _Z11kernel_castIhfEvPKT_PT0_i
	.globl	_Z11kernel_castIhfEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIhfEvPKT_PT0_i,@function
_Z11kernel_castIhfEvPKT_PT0_i:          ; @_Z11kernel_castIhfEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB15_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	global_load_u8 v3, v[3:4], off
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v2, v3
	global_store_b32 v[0:1], v2, off
.LBB15_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIhfEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIhfEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIhfEvPKT_PT0_i,comdat
.Lfunc_end15:
	.size	_Z11kernel_castIhfEvPKT_PT0_i, .Lfunc_end15-_Z11kernel_castIhfEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIdhEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIdhEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIdhEvPKT_PT0_i ; -- Begin function _Z11kernel_castIdhEvPKT_PT0_i
	.globl	_Z11kernel_castIdhEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIdhEvPKT_PT0_i,@function
_Z11kernel_castIdhEvPKT_PT0_i:          ; @_Z11kernel_castIdhEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB16_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v2, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_i32_f64_e32 v3, v[3:4]
	global_store_b8 v[0:1], v3, off
.LBB16_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIdhEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIdhEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIdhEvPKT_PT0_i,comdat
.Lfunc_end16:
	.size	_Z11kernel_castIdhEvPKT_PT0_i, .Lfunc_end16-_Z11kernel_castIdhEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIhdEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIhdEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIhdEvPKT_PT0_i ; -- Begin function _Z11kernel_castIhdEvPKT_PT0_i
	.globl	_Z11kernel_castIhdEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIhdEvPKT_PT0_i,@function
_Z11kernel_castIhdEvPKT_PT0_i:          ; @_Z11kernel_castIhdEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB17_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
	global_load_u8 v0, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_f64_u32_e32 v[3:4], v0
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b64 v[0:1], v[3:4], off
.LBB17_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIhdEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIhdEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIhdEvPKT_PT0_i,comdat
.Lfunc_end17:
	.size	_Z11kernel_castIhdEvPKT_PT0_i, .Lfunc_end17-_Z11kernel_castIhdEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIffEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIffEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIffEvPKT_PT0_i ; -- Begin function _Z11kernel_castIffEvPKT_PT0_i
	.globl	_Z11kernel_castIffEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIffEvPKT_PT0_i,@function
_Z11kernel_castIffEvPKT_PT0_i:          ; @_Z11kernel_castIffEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB18_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB18_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIffEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIffEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIffEvPKT_PT0_i,comdat
.Lfunc_end18:
	.size	_Z11kernel_castIffEvPKT_PT0_i, .Lfunc_end18-_Z11kernel_castIffEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_castIddEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIddEvPKT_PT0_i,comdat
	.protected	_Z11kernel_castIddEvPKT_PT0_i ; -- Begin function _Z11kernel_castIddEvPKT_PT0_i
	.globl	_Z11kernel_castIddEvPKT_PT0_i
	.p2align	8
	.type	_Z11kernel_castIddEvPKT_PT0_i,@function
_Z11kernel_castIddEvPKT_PT0_i:          ; @_Z11kernel_castIddEvPKT_PT0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB19_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
.LBB19_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_castIddEvPKT_PT0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_castIddEvPKT_PT0_i,"axG",@progbits,_Z11kernel_castIddEvPKT_PT0_i,comdat
.Lfunc_end19:
	.size	_Z11kernel_castIddEvPKT_PT0_i, .Lfunc_end19-_Z11kernel_castIddEvPKT_PT0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z13kernel_assignIfEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIfEvPT_S0_i,comdat
	.protected	_Z13kernel_assignIfEvPT_S0_i ; -- Begin function _Z13kernel_assignIfEvPT_S0_i
	.globl	_Z13kernel_assignIfEvPT_S0_i
	.p2align	8
	.type	_Z13kernel_assignIfEvPT_S0_i,@function
_Z13kernel_assignIfEvPT_S0_i:           ; @_Z13kernel_assignIfEvPT_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB20_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_mov_b32_e32 v2, s2
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB20_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13kernel_assignIfEvPT_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13kernel_assignIfEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIfEvPT_S0_i,comdat
.Lfunc_end20:
	.size	_Z13kernel_assignIfEvPT_S0_i, .Lfunc_end20-_Z13kernel_assignIfEvPT_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 124
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_copyIfEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIfEvPKT_PS0_i,comdat
	.protected	_Z11kernel_copyIfEvPKT_PS0_i ; -- Begin function _Z11kernel_copyIfEvPKT_PS0_i
	.globl	_Z11kernel_copyIfEvPKT_PS0_i
	.p2align	8
	.type	_Z11kernel_copyIfEvPKT_PS0_i,@function
_Z11kernel_copyIfEvPKT_PS0_i:           ; @_Z11kernel_copyIfEvPKT_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB21_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB21_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_copyIfEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_copyIfEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIfEvPKT_PS0_i,comdat
.Lfunc_end21:
	.size	_Z11kernel_copyIfEvPKT_PS0_i, .Lfunc_end21-_Z11kernel_copyIfEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_addIfEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_addIfEvPKT_S2_PS0_i,comdat
	.protected	_Z10kernel_addIfEvPKT_S2_PS0_i ; -- Begin function _Z10kernel_addIfEvPKT_S2_PS0_i
	.globl	_Z10kernel_addIfEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z10kernel_addIfEvPKT_S2_PS0_i,@function
_Z10kernel_addIfEvPKT_S2_PS0_i:         ; @_Z10kernel_addIfEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB22_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB22_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_addIfEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_addIfEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_addIfEvPKT_S2_PS0_i,comdat
.Lfunc_end22:
	.size	_Z10kernel_addIfEvPKT_S2_PS0_i, .Lfunc_end22-_Z10kernel_addIfEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_subIfEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_subIfEvPKT_S2_PS0_i,comdat
	.protected	_Z10kernel_subIfEvPKT_S2_PS0_i ; -- Begin function _Z10kernel_subIfEvPKT_S2_PS0_i
	.globl	_Z10kernel_subIfEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z10kernel_subIfEvPKT_S2_PS0_i,@function
_Z10kernel_subIfEvPKT_S2_PS0_i:         ; @_Z10kernel_subIfEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB23_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB23_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_subIfEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_subIfEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_subIfEvPKT_S2_PS0_i,comdat
.Lfunc_end23:
	.size	_Z10kernel_subIfEvPKT_S2_PS0_i, .Lfunc_end23-_Z10kernel_subIfEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_mulIfEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_mulIfEvPKT_S2_PS0_i,comdat
	.protected	_Z10kernel_mulIfEvPKT_S2_PS0_i ; -- Begin function _Z10kernel_mulIfEvPKT_S2_PS0_i
	.globl	_Z10kernel_mulIfEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z10kernel_mulIfEvPKT_S2_PS0_i,@function
_Z10kernel_mulIfEvPKT_S2_PS0_i:         ; @_Z10kernel_mulIfEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB24_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB24_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_mulIfEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_mulIfEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_mulIfEvPKT_S2_PS0_i,comdat
.Lfunc_end24:
	.size	_Z10kernel_mulIfEvPKT_S2_PS0_i, .Lfunc_end24-_Z10kernel_mulIfEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_divIfEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_divIfEvPKT_S2_PS0_i,comdat
	.protected	_Z10kernel_divIfEvPKT_S2_PS0_i ; -- Begin function _Z10kernel_divIfEvPKT_S2_PS0_i
	.globl	_Z10kernel_divIfEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z10kernel_divIfEvPKT_S2_PS0_i,@function
_Z10kernel_divIfEvPKT_S2_PS0_i:         ; @_Z10kernel_divIfEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB25_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v4, null, v3, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v4, v5, 1.0
	v_fmac_f32_e32 v5, v6, v5
	v_div_scale_f32 v6, vcc_lo, v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v6, v5
	v_fma_f32 v8, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v5
	v_fma_f32 v4, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v4, v4, v5, v7
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_div_fixup_f32 v2, v4, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB25_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_divIfEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_divIfEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_divIfEvPKT_S2_PS0_i,comdat
.Lfunc_end25:
	.size	_Z10kernel_divIfEvPKT_S2_PS0_i, .Lfunc_end25-_Z10kernel_divIfEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 268
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_powIfEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_powIfEvPKT_S2_PS0_i,comdat
	.protected	_Z10kernel_powIfEvPKT_S2_PS0_i ; -- Begin function _Z10kernel_powIfEvPKT_S2_PS0_i
	.globl	_Z10kernel_powIfEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z10kernel_powIfEvPKT_S2_PS0_i,@function
_Z10kernel_powIfEvPKT_S2_PS0_i:         ; @_Z10kernel_powIfEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB26_2
; %bb.1:
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[4:5], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s0, 0x3e76c4e1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(1)
	v_cmp_neq_f32_e32 vcc_lo, 1.0, v2
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e32 v3, 1.0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_neq_f32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v2, 1.0, v2, vcc_lo
	v_cmp_neq_f32_e64 s3, v3, |v3|
	v_frexp_mant_f32_e64 v4, |v2|
	v_cmp_lt_f32_e64 s6, |v2|, 1.0
	v_cmp_eq_f32_e64 s2, 0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v4
	s_xor_b32 s3, s3, s6
	v_cndmask_b32_e64 v5, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v4, v4, v5
	v_add_f32_e32 v7, -1.0, v4
	v_add_f32_e32 v5, 1.0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v8, v7, v6 :: v_dual_add_f32 v9, -1.0, v5
	v_mul_f32_e32 v10, v5, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v4, v4, v9
	v_fma_f32 v5, v8, v5, -v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v8, v4
	v_add_f32_e32 v4, v10, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v9, v7, v4 :: v_dual_sub_f32 v10, v4, v10
	v_sub_f32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v7, v7, v9
	v_sub_f32_e32 v4, v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v5, v4
	v_add_f32_e32 v4, v9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v6, v4
	v_add_f32_e32 v5, v8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v5, v5
	v_sub_f32_e32 v6, v5, v8
	v_sub_f32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v6, v5, v5, -v7
	v_add_f32_e32 v8, v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v5, v8
	v_add_f32_e32 v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmaak_f32 v9, s0, v8, 0x3e91f4c4
	v_sub_f32_e32 v7, v8, v7
	v_dual_fmaak_f32 v9, v8, v9, 0x3ecccdef :: v_dual_sub_f32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v8, v9
	v_fma_f32 v7, v8, v9, -v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v7, v6, v9 :: v_dual_mul_f32 v12, v5, v8
	v_add_f32_e32 v9, v10, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v13, v8, v5, -v12
	v_dual_sub_f32 v10, v9, v10 :: v_dual_fmac_f32 v13, v8, v4
	v_add_f32_e32 v11, 0x3f2aaaaa, v9
	v_ldexp_f32 v4, v4, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v7, v7, v10
	v_fmac_f32_e32 v13, v6, v5
	v_ldexp_f32 v5, v5, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, 0x31739010, v7
	v_add_f32_e32 v10, 0xbf2aaaaa, v11
	v_sub_f32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v7, v9
	v_add_f32_e32 v6, v11, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v8, v12, v13 :: v_dual_sub_f32 v9, v11, v6
	v_mul_f32_e32 v10, v8, v6
	v_sub_f32_e32 v11, v8, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v7, v7, v9
	v_fma_f32 v9, v8, v6, -v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v11, v13, v11
	v_fmac_f32_e32 v9, v8, v7
	v_frexp_exp_i32_f32_e32 v7, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v9, v11, v6
	v_subrev_co_ci_u32_e32 v6, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v7, v10, v9
	v_cvt_f32_i32_e32 v6, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v10, v7, v10
	v_add_f32_e32 v8, v5, v7
	v_sub_f32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v11, 0x3f317218, v6 :: v_dual_add_f32 v4, v4, v9
	v_fma_f32 v10, 0x3f317218, v6, -v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmamk_f32 v6, v6, 0xb102e308, v10 :: v_dual_sub_f32 v5, v8, v5
	v_sub_f32_e32 v5, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v4, v4, v5 :: v_dual_add_f32 v5, v11, v6
	v_add_f32_e32 v7, v8, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v11, v5, v11
	v_sub_f32_e32 v6, v6, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v5, v7
	v_sub_f32_e32 v10, v9, v5
	v_sub_f32_e32 v8, v7, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v12, v9, v10
	v_dual_sub_f32 v4, v4, v8 :: v_dual_sub_f32 v7, v7, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v5, v5, v12
	v_dual_add_f32 v8, v6, v4 :: v_dual_add_f32 v5, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v7, v8, v6
	v_add_f32_e32 v5, v8, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v8, v8, v7
	v_sub_f32_e32 v4, v4, v7
	v_sub_f32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v9, v5
	v_dual_add_f32 v4, v4, v6 :: v_dual_sub_f32 v7, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v5, v5, v7
	v_add_f32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v10, v4
	v_dual_sub_f32 v6, v5, v10 :: v_dual_mul_f32 v7, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v4, v4, v6
	v_fma_f32 v5, v3, v5, -v7
	v_cmp_class_f32_e64 vcc_lo, v7, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v3, v4
	v_add_f32_e32 v4, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v6, v4, v7, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v6
	v_cndmask_b32_e64 v8, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v6|
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v9, v6, v8
	v_trunc_f32_e32 v6, v3
	v_mul_f32_e32 v10, 0x3fb8aa3b, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v11, 0x3fb8aa3b, v9, -v10
	v_rndne_f32_e32 v12, v10
	v_dual_fmamk_f32 v11, v9, 0x32a5705f, v11 :: v_dual_sub_f32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v10, v10, v11
	v_sub_f32_e32 v4, v4, v7
	v_cvt_i32_f32_e32 v7, v12
	v_exp_f32_e32 v10, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v4, v5, v4
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v5, v10, v7
	v_dual_mul_f32 v7, 0.5, v3 :: v_dual_cndmask_b32 v4, 0, v4
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v9
	v_trunc_f32_e32 v10, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_add_f32 v4, v8, v4 :: v_dual_cndmask_b32 v5, 0, v5
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v9
	v_cmp_neq_f32_e64 s0, v10, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v5, 0x7f800000, v5, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, v6, v3
	v_fma_f32 v4, v5, v4, v5
	v_cmp_eq_f32_e64 s1, 0x7f800000, v5
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v6, 1.0, v2, s0
	v_cndmask_b32_e64 v8, 0, v2, s0
	v_cndmask_b32_e64 v4, v4, v5, s1
	v_cmp_gt_f32_e64 s1, 0, v3
	v_cndmask_b32_e64 v5, |v3|, 0, s3
	v_cmp_class_f32_e64 s0, v2, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_bfi_b32 v4, 0x7fffffff, v4, v6
	s_xor_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v6, 0x7f800000, 0, s1
	v_cmp_eq_f32_e64 s1, |v2|, 1.0
	v_cndmask_b32_e32 v7, 0x7fc00000, v4, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_bfi_b32 v6, 0x7fffffff, v6, v8
	v_cndmask_b32_e64 v5, v5, |v2|, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v4, v7, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v3, 0x204
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	s_or_b32 vcc_lo, s2, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v4, v6, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v2, v3
	v_cndmask_b32_e32 v2, 0x7fc00000, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB26_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_powIfEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_powIfEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_powIfEvPKT_S2_PS0_i,comdat
.Lfunc_end26:
	.size	_Z10kernel_powIfEvPKT_S2_PS0_i, .Lfunc_end26-_Z10kernel_powIfEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1320
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_add_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_add_scalarIfEvPKT_PS0_S0_i,comdat
	.protected	_Z17kernel_add_scalarIfEvPKT_PS0_S0_i ; -- Begin function _Z17kernel_add_scalarIfEvPKT_PS0_S0_i
	.globl	_Z17kernel_add_scalarIfEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z17kernel_add_scalarIfEvPKT_PS0_S0_i,@function
_Z17kernel_add_scalarIfEvPKT_PS0_S0_i:  ; @_Z17kernel_add_scalarIfEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB27_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, s2, v2
	global_store_b32 v[0:1], v2, off
.LBB27_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_add_scalarIfEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_add_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_add_scalarIfEvPKT_PS0_S0_i,comdat
.Lfunc_end27:
	.size	_Z17kernel_add_scalarIfEvPKT_PS0_S0_i, .Lfunc_end27-_Z17kernel_add_scalarIfEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_sub_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i,comdat
	.protected	_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i ; -- Begin function _Z17kernel_sub_scalarIfEvPKT_PS0_S0_i
	.globl	_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i,@function
_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i:  ; @_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB28_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_subrev_f32_e32 v2, s2, v2
	global_store_b32 v[0:1], v2, off
.LBB28_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_sub_scalarIfEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_sub_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i,comdat
.Lfunc_end28:
	.size	_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i, .Lfunc_end28-_Z17kernel_sub_scalarIfEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i,comdat
	.protected	_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i ; -- Begin function _Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i
	.globl	_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i,@function
_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i: ; @_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB29_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, s2, v2
	global_store_b32 v[0:1], v2, off
.LBB29_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i,comdat
.Lfunc_end29:
	.size	_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i, .Lfunc_end29-_Z21kernel_sub_scalar_invIfEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_mul_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i,comdat
	.protected	_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i ; -- Begin function _Z17kernel_mul_scalarIfEvPKT_PS0_S0_i
	.globl	_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i,@function
_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i:  ; @_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB30_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v2, s2, v2
	global_store_b32 v[0:1], v2, off
.LBB30_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_mul_scalarIfEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_mul_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i,comdat
.Lfunc_end30:
	.size	_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i, .Lfunc_end30-_Z17kernel_mul_scalarIfEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_div_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_div_scalarIfEvPKT_PS0_S0_i,comdat
	.protected	_Z17kernel_div_scalarIfEvPKT_PS0_S0_i ; -- Begin function _Z17kernel_div_scalarIfEvPKT_PS0_S0_i
	.globl	_Z17kernel_div_scalarIfEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z17kernel_div_scalarIfEvPKT_PS0_S0_i,@function
_Z17kernel_div_scalarIfEvPKT_PS0_S0_i:  ; @_Z17kernel_div_scalarIfEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB31_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v3, null, s2, s2, v2
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v3, v4, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v5, v4
	v_div_scale_f32 v5, vcc_lo, v2, s2, v2
	v_mul_f32_e32 v6, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, -v3, v6, v5
	v_fmac_f32_e32 v6, v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, -v3, v6, v5
	v_div_fmas_f32 v3, v3, v4, v6
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fixup_f32 v2, v3, s2, v2
	global_store_b32 v[0:1], v2, off
.LBB31_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_div_scalarIfEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_div_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_div_scalarIfEvPKT_PS0_S0_i,comdat
.Lfunc_end31:
	.size	_Z17kernel_div_scalarIfEvPKT_PS0_S0_i, .Lfunc_end31-_Z17kernel_div_scalarIfEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 236
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i,comdat
	.protected	_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i ; -- Begin function _Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i
	.globl	_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i,@function
_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i: ; @_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB32_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v3, null, v2, v2, s2
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v3, v4, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v5, v4
	v_div_scale_f32 v5, vcc_lo, s2, v2, s2
	v_mul_f32_e32 v6, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, -v3, v6, v5
	v_fmac_f32_e32 v6, v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, -v3, v6, v5
	v_div_fmas_f32 v3, v3, v4, v6
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fixup_f32 v2, v3, v2, s2
	global_store_b32 v[0:1], v2, off
.LBB32_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i,comdat
.Lfunc_end32:
	.size	_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i, .Lfunc_end32-_Z21kernel_div_scalar_invIfEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 236
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_pow_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i,comdat
	.protected	_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i ; -- Begin function _Z17kernel_pow_scalarIfEvPKT_PS0_S0_i
	.globl	_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i,@function
_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i:  ; @_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB33_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s0, 0x3e76c4e1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_neq_f32_e32 vcc_lo, 1.0, v2
	v_cndmask_b32_e64 v3, 1.0, s2, vcc_lo
	v_cmp_neq_f32_e32 vcc_lo, 0, v3
	v_cmp_neq_f32_e64 s3, v3, |v3|
	v_cndmask_b32_e32 v2, 1.0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f32_e64 v4, |v2|
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v4
	v_cndmask_b32_e64 v5, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v4, v4, v5
	v_add_f32_e32 v5, 1.0, v4
	v_cmp_lt_f32_e64 s4, |v2|, 1.0
	v_cmp_eq_f32_e64 s2, 0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v6, v5
	v_add_f32_e32 v9, -1.0, v5
	v_add_f32_e32 v7, -1.0, v4
	s_xor_b32 s3, s3, s4
	v_sub_f32_e32 v4, v4, v9
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v5, v8
	v_fma_f32 v5, v8, v5, -v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v8, v4
	v_add_f32_e32 v4, v10, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v9, v7, v4 :: v_dual_sub_f32 v10, v4, v10
	v_sub_f32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v7, v7, v9
	v_sub_f32_e32 v4, v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v5, v4
	v_add_f32_e32 v4, v9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v6, v4
	v_add_f32_e32 v5, v8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v6, v5, v8
	v_dual_mul_f32 v7, v5, v5 :: v_dual_sub_f32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v6, v5, v5, -v7
	v_add_f32_e32 v8, v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v5, v8
	v_add_f32_e32 v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmaak_f32 v9, s0, v8, 0x3e91f4c4
	v_sub_f32_e32 v7, v8, v7
	v_dual_fmaak_f32 v9, v8, v9, 0x3ecccdef :: v_dual_sub_f32 v6, v6, v7
	v_mul_f32_e32 v12, v5, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v10, v8, v9
	v_fma_f32 v13, v8, v5, -v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, v8, v9, -v10
	v_fmac_f32_e32 v7, v6, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v13, v8, v4
	v_ldexp_f32 v4, v4, 1
	v_add_f32_e32 v9, v10, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v13, v6, v5
	v_ldexp_f32 v5, v5, 1
	v_dual_sub_f32 v10, v9, v10 :: v_dual_add_f32 v11, 0x3f2aaaaa, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v7, v7, v10 :: v_dual_add_f32 v10, 0xbf2aaaaa, v11
	v_add_f32_e32 v7, 0x31739010, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v9, v10
	v_add_f32_e32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v11, v7
	v_dual_add_f32 v8, v12, v13 :: v_dual_sub_f32 v9, v11, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v10, v8, v6
	v_sub_f32_e32 v11, v8, v12
	v_add_f32_e32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v9, v8, v6, -v10
	v_sub_f32_e32 v11, v13, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v9, v8, v7
	v_frexp_exp_i32_f32_e32 v7, v2
	v_fmac_f32_e32 v9, v11, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_subrev_co_ci_u32_e32 v6, vcc_lo, 0, v7, vcc_lo
	v_add_f32_e32 v7, v10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v6, v6
	v_add_f32_e32 v8, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v10, v7, v10 :: v_dual_sub_f32 v5, v8, v5
	v_sub_f32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v11, 0x3f317218, v6
	v_sub_f32_e32 v5, v7, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v4, v4, v9
	v_fma_f32 v10, 0x3f317218, v6, -v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v4, v5
	v_dual_fmamk_f32 v6, v6, 0xb102e308, v10 :: v_dual_add_f32 v7, v8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v8, v7, v8
	v_dual_sub_f32 v4, v4, v8 :: v_dual_add_f32 v5, v11, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v11, v5, v11
	v_sub_f32_e32 v6, v6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v8, v6, v4 :: v_dual_add_f32 v9, v5, v7
	v_sub_f32_e32 v10, v9, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v12, v9, v10
	v_sub_f32_e32 v7, v7, v10
	v_sub_f32_e32 v5, v5, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v7, v5
	v_sub_f32_e32 v7, v8, v6
	v_sub_f32_e32 v4, v4, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v8, v5
	v_sub_f32_e32 v8, v8, v7
	v_sub_f32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v9, v5
	v_dual_add_f32 v4, v4, v6 :: v_dual_sub_f32 v7, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v5, v5, v7
	v_add_f32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v10, v4
	v_dual_sub_f32 v6, v5, v10 :: v_dual_mul_f32 v7, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v4, v4, v6
	v_fma_f32 v5, v3, v5, -v7
	v_cmp_class_f32_e64 vcc_lo, v7, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v3, v4
	v_add_f32_e32 v4, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v6, v4, v7, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v6
	v_cndmask_b32_e64 v8, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v6|
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v9, v6, v8
	v_trunc_f32_e32 v6, v3
	v_mul_f32_e32 v10, 0x3fb8aa3b, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v11, 0x3fb8aa3b, v9, -v10
	v_rndne_f32_e32 v12, v10
	v_dual_fmamk_f32 v11, v9, 0x32a5705f, v11 :: v_dual_sub_f32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v10, v10, v11
	v_sub_f32_e32 v4, v4, v7
	v_cvt_i32_f32_e32 v7, v12
	v_exp_f32_e32 v10, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v4, v5, v4
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v5, v10, v7
	v_dual_mul_f32 v7, 0.5, v3 :: v_dual_cndmask_b32 v4, 0, v4
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v9
	v_trunc_f32_e32 v10, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v9
	v_add_f32_e32 v4, v8, v4
	v_cmp_neq_f32_e64 s0, v10, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v5, 0x7f800000, v5, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, v6, v3
	v_fma_f32 v4, v5, v4, v5
	v_cmp_eq_f32_e64 s1, 0x7f800000, v5
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v6, 1.0, v2, s0
	v_cndmask_b32_e64 v8, 0, v2, s0
	v_cndmask_b32_e64 v4, v4, v5, s1
	v_cmp_gt_f32_e64 s1, 0, v3
	v_cndmask_b32_e64 v5, |v3|, 0, s3
	v_cmp_class_f32_e64 s0, v2, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_bfi_b32 v4, 0x7fffffff, v4, v6
	s_xor_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v6, 0x7f800000, 0, s1
	v_cmp_eq_f32_e64 s1, |v2|, 1.0
	v_cndmask_b32_e32 v7, 0x7fc00000, v4, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_bfi_b32 v6, 0x7fffffff, v6, v8
	v_cndmask_b32_e64 v5, v5, |v2|, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v4, v7, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v3, 0x204
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	s_or_b32 vcc_lo, s2, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v4, v6, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v2, v3
	v_cndmask_b32_e32 v2, 0x7fc00000, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB33_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_pow_scalarIfEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_pow_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i,comdat
.Lfunc_end33:
	.size	_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i, .Lfunc_end33-_Z17kernel_pow_scalarIfEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1284
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i,comdat
	.protected	_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i ; -- Begin function _Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i
	.globl	_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i,@function
_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i: ; @_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB34_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s0, 0x3e76c4e1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, s2, 1.0
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e32 v2, 1.0, v2, vcc_lo
	v_cmp_neq_f32_e32 vcc_lo, 0, v2
	v_cndmask_b32_e64 v3, 1.0, s2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_frexp_mant_f32_e64 v4, |v3|
	v_cmp_lt_f32_e64 s4, |v3|, 1.0
	v_cmp_eq_f32_e64 s2, 0, v3
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v4
	v_cndmask_b32_e64 v5, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v4, v4, v5
	v_add_f32_e32 v5, 1.0, v4
	v_cmp_neq_f32_e64 s3, v2, |v2|
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_rcp_f32_e32 v6, v5
	v_add_f32_e32 v9, -1.0, v5
	v_add_f32_e32 v7, -1.0, v4
	s_xor_b32 s3, s3, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v4, v4, v9
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v8, v7, v6
	v_mul_f32_e32 v10, v5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, v8, v5, -v10
	v_fmac_f32_e32 v5, v8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v10, v5
	v_dual_sub_f32 v9, v7, v4 :: v_dual_sub_f32 v10, v4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v5, v10, v5
	v_sub_f32_e32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v4, v7, v4
	v_add_f32_e32 v4, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v9, v4
	v_mul_f32_e32 v4, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v8, v4
	v_sub_f32_e32 v6, v5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v7, v5, v5 :: v_dual_sub_f32 v4, v4, v6
	v_fma_f32 v6, v5, v5, -v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v4, v4
	v_fmac_f32_e32 v6, v5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v7, v6
	v_fmaak_f32 v9, s0, v8, 0x3e91f4c4
	v_sub_f32_e32 v7, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmaak_f32 v9, v8, v9, 0x3ecccdef :: v_dual_sub_f32 v6, v6, v7
	v_mul_f32_e32 v12, v5, v8
	v_mul_f32_e32 v10, v8, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v13, v8, v5, -v12
	v_fma_f32 v7, v8, v9, -v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v7, v6, v9
	v_fmac_f32_e32 v13, v8, v4
	v_ldexp_f32 v4, v4, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v9, v10, v7
	v_fmac_f32_e32 v13, v6, v5
	v_ldexp_f32 v5, v5, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v10, v9, v10 :: v_dual_add_f32 v11, 0x3f2aaaaa, v9
	v_dual_sub_f32 v7, v7, v10 :: v_dual_add_f32 v10, 0xbf2aaaaa, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v7, 0x31739010, v7
	v_sub_f32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v7, v9
	v_add_f32_e32 v6, v11, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v8, v12, v13 :: v_dual_sub_f32 v9, v11, v6
	v_mul_f32_e32 v10, v8, v6
	v_sub_f32_e32 v11, v8, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v7, v7, v9
	v_fma_f32 v9, v8, v6, -v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v11, v13, v11
	v_fmac_f32_e32 v9, v8, v7
	v_frexp_exp_i32_f32_e32 v7, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v9, v11, v6
	v_subrev_co_ci_u32_e32 v6, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v7, v10, v9
	v_cvt_f32_i32_e32 v6, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v5, v7
	v_dual_sub_f32 v10, v7, v10 :: v_dual_sub_f32 v5, v8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v9, v9, v10
	v_mul_f32_e32 v11, 0x3f317218, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v5, v7, v5
	v_add_f32_e32 v4, v4, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v10, 0x3f317218, v6, -v11
	v_add_f32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmamk_f32 v6, v6, 0xb102e308, v10 :: v_dual_add_f32 v7, v8, v4
	v_sub_f32_e32 v8, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v4, v4, v8 :: v_dual_add_f32 v5, v11, v6
	v_sub_f32_e32 v11, v5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v6, v6, v11
	v_dual_add_f32 v8, v6, v4 :: v_dual_add_f32 v9, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v10, v9, v5
	v_sub_f32_e32 v12, v9, v10
	v_sub_f32_e32 v7, v7, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v5, v5, v12
	v_add_f32_e32 v5, v7, v5
	v_sub_f32_e32 v7, v8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v4, v4, v7
	v_add_f32_e32 v5, v8, v5
	v_sub_f32_e32 v8, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v6, v6, v8
	v_add_f32_e32 v10, v9, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v4, v4, v6 :: v_dual_sub_f32 v7, v10, v9
	v_sub_f32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v4, v5
	v_add_f32_e32 v5, v10, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v6, v5, v10 :: v_dual_mul_f32 v7, v2, v5
	v_sub_f32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v5, v2, v5, -v7
	v_cmp_class_f32_e64 vcc_lo, v7, 0x204
	v_fmac_f32_e32 v5, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v7, v5
	v_cndmask_b32_e32 v6, v4, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v6
	v_cndmask_b32_e64 v8, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v6|
	v_sub_f32_e32 v9, v6, v8
	v_trunc_f32_e32 v6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, 0x3fb8aa3b, v9
	v_fma_f32 v11, 0x3fb8aa3b, v9, -v10
	v_rndne_f32_e32 v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_fmamk_f32 v11, v9, 0x32a5705f, v11 :: v_dual_sub_f32 v10, v10, v12
	v_sub_f32_e32 v4, v4, v7
	v_cvt_i32_f32_e32 v7, v12
	v_add_f32_e32 v10, v10, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v4, v5, v4
	v_exp_f32_e32 v10, v10
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v5, v10, v7
	v_dual_mul_f32 v7, 0.5, v2 :: v_dual_cndmask_b32 v4, 0, v4
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_trunc_f32_e32 v10, v7
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v9
	v_add_f32_e32 v4, v8, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f32_e64 s0, v10, v7
	v_cndmask_b32_e32 v5, 0x7f800000, v5, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_fma_f32 v4, v5, v4, v5
	v_cmp_eq_f32_e64 s1, 0x7f800000, v5
	s_and_b32 s0, vcc_lo, s0
	v_cndmask_b32_e64 v6, 1.0, v3, s0
	v_cndmask_b32_e64 v8, 0, v3, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v4, v4, v5, s1
	v_cmp_gt_f32_e64 s1, 0, v2
	v_cndmask_b32_e64 v5, |v2|, 0, s3
	v_cmp_class_f32_e64 s0, v3, 0x204
	v_bfi_b32 v4, 0x7fffffff, v4, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s1, s1, s2
	v_cndmask_b32_e64 v6, 0x7f800000, 0, s1
	v_cmp_eq_f32_e64 s1, |v3|, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v7, 0x7fc00000, v4, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v3
	v_bfi_b32 v6, 0x7fffffff, v6, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v5, v5, |v3|, s1
	v_cndmask_b32_e32 v4, v4, v7, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	s_or_b32 vcc_lo, s2, s0
	v_cndmask_b32_e32 v4, v4, v6, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v3, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v2, 0x7fc00000, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB34_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i,comdat
.Lfunc_end34:
	.size	_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i, .Lfunc_end34-_Z21kernel_pow_scalar_invIfEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1292
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z12kernel_equalIfEvPKT_S2_PS0_i,"axG",@progbits,_Z12kernel_equalIfEvPKT_S2_PS0_i,comdat
	.protected	_Z12kernel_equalIfEvPKT_S2_PS0_i ; -- Begin function _Z12kernel_equalIfEvPKT_S2_PS0_i
	.globl	_Z12kernel_equalIfEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z12kernel_equalIfEvPKT_S2_PS0_i,@function
_Z12kernel_equalIfEvPKT_S2_PS0_i:       ; @_Z12kernel_equalIfEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB35_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_f32_e32 vcc_lo, v2, v3
	v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB35_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12kernel_equalIfEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z12kernel_equalIfEvPKT_S2_PS0_i,"axG",@progbits,_Z12kernel_equalIfEvPKT_S2_PS0_i,comdat
.Lfunc_end35:
	.size	_Z12kernel_equalIfEvPKT_S2_PS0_i, .Lfunc_end35-_Z12kernel_equalIfEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z14kernel_greaterIfEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_greaterIfEvPKT_S2_PS0_i,comdat
	.protected	_Z14kernel_greaterIfEvPKT_S2_PS0_i ; -- Begin function _Z14kernel_greaterIfEvPKT_S2_PS0_i
	.globl	_Z14kernel_greaterIfEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z14kernel_greaterIfEvPKT_S2_PS0_i,@function
_Z14kernel_greaterIfEvPKT_S2_PS0_i:     ; @_Z14kernel_greaterIfEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB36_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, v2, v3
	v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB36_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14kernel_greaterIfEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14kernel_greaterIfEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_greaterIfEvPKT_S2_PS0_i,comdat
.Lfunc_end36:
	.size	_Z14kernel_greaterIfEvPKT_S2_PS0_i, .Lfunc_end36-_Z14kernel_greaterIfEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_lessIfEvPKT_S2_PS0_i,"axG",@progbits,_Z11kernel_lessIfEvPKT_S2_PS0_i,comdat
	.protected	_Z11kernel_lessIfEvPKT_S2_PS0_i ; -- Begin function _Z11kernel_lessIfEvPKT_S2_PS0_i
	.globl	_Z11kernel_lessIfEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z11kernel_lessIfEvPKT_S2_PS0_i,@function
_Z11kernel_lessIfEvPKT_S2_PS0_i:        ; @_Z11kernel_lessIfEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB37_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, v2, v3
	v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB37_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_lessIfEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_lessIfEvPKT_S2_PS0_i,"axG",@progbits,_Z11kernel_lessIfEvPKT_S2_PS0_i,comdat
.Lfunc_end37:
	.size	_Z11kernel_lessIfEvPKT_S2_PS0_i, .Lfunc_end37-_Z11kernel_lessIfEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z20kernel_greater_equalIfEvPKT_S2_PS0_i,"axG",@progbits,_Z20kernel_greater_equalIfEvPKT_S2_PS0_i,comdat
	.protected	_Z20kernel_greater_equalIfEvPKT_S2_PS0_i ; -- Begin function _Z20kernel_greater_equalIfEvPKT_S2_PS0_i
	.globl	_Z20kernel_greater_equalIfEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z20kernel_greater_equalIfEvPKT_S2_PS0_i,@function
_Z20kernel_greater_equalIfEvPKT_S2_PS0_i: ; @_Z20kernel_greater_equalIfEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB38_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_f32_e32 vcc_lo, v2, v3
	v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB38_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20kernel_greater_equalIfEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z20kernel_greater_equalIfEvPKT_S2_PS0_i,"axG",@progbits,_Z20kernel_greater_equalIfEvPKT_S2_PS0_i,comdat
.Lfunc_end38:
	.size	_Z20kernel_greater_equalIfEvPKT_S2_PS0_i, .Lfunc_end38-_Z20kernel_greater_equalIfEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_less_equalIfEvPKT_S2_PS0_i,"axG",@progbits,_Z17kernel_less_equalIfEvPKT_S2_PS0_i,comdat
	.protected	_Z17kernel_less_equalIfEvPKT_S2_PS0_i ; -- Begin function _Z17kernel_less_equalIfEvPKT_S2_PS0_i
	.globl	_Z17kernel_less_equalIfEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z17kernel_less_equalIfEvPKT_S2_PS0_i,@function
_Z17kernel_less_equalIfEvPKT_S2_PS0_i:  ; @_Z17kernel_less_equalIfEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB39_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_le_f32_e32 vcc_lo, v2, v3
	v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB39_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_less_equalIfEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_less_equalIfEvPKT_S2_PS0_i,"axG",@progbits,_Z17kernel_less_equalIfEvPKT_S2_PS0_i,comdat
.Lfunc_end39:
	.size	_Z17kernel_less_equalIfEvPKT_S2_PS0_i, .Lfunc_end39-_Z17kernel_less_equalIfEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z19kernel_equal_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i,comdat
	.protected	_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i ; -- Begin function _Z19kernel_equal_scalarIfEvPKT_PS0_S0_i
	.globl	_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i,@function
_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i: ; @_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB40_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_f32_e32 vcc_lo, s2, v2
	v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB40_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19kernel_equal_scalarIfEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z19kernel_equal_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i,comdat
.Lfunc_end40:
	.size	_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i, .Lfunc_end40-_Z19kernel_equal_scalarIfEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z21kernel_greater_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i,comdat
	.protected	_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i ; -- Begin function _Z21kernel_greater_scalarIfEvPKT_PS0_S0_i
	.globl	_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i,@function
_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i: ; @_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB41_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, s2, v2
	v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB41_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_greater_scalarIfEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_greater_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i,comdat
.Lfunc_end41:
	.size	_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i, .Lfunc_end41-_Z21kernel_greater_scalarIfEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z18kernel_less_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z18kernel_less_scalarIfEvPKT_PS0_S0_i,comdat
	.protected	_Z18kernel_less_scalarIfEvPKT_PS0_S0_i ; -- Begin function _Z18kernel_less_scalarIfEvPKT_PS0_S0_i
	.globl	_Z18kernel_less_scalarIfEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z18kernel_less_scalarIfEvPKT_PS0_S0_i,@function
_Z18kernel_less_scalarIfEvPKT_PS0_S0_i: ; @_Z18kernel_less_scalarIfEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB42_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, s2, v2
	v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB42_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18kernel_less_scalarIfEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z18kernel_less_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z18kernel_less_scalarIfEvPKT_PS0_S0_i,comdat
.Lfunc_end42:
	.size	_Z18kernel_less_scalarIfEvPKT_PS0_S0_i, .Lfunc_end42-_Z18kernel_less_scalarIfEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i,comdat
	.protected	_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i ; -- Begin function _Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i
	.globl	_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i,@function
_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i: ; @_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB43_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_le_f32_e32 vcc_lo, s2, v2
	v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB43_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i,comdat
.Lfunc_end43:
	.size	_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i, .Lfunc_end43-_Z27kernel_greater_equal_scalarIfEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i,comdat
	.protected	_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i ; -- Begin function _Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i
	.globl	_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i,@function
_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i: ; @_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB44_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_f32_e32 vcc_lo, s2, v2
	v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB44_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i,comdat
.Lfunc_end44:
	.size	_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i, .Lfunc_end44-_Z24kernel_less_equal_scalarIfEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z14kernel_replaceIfEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_replaceIfEvPKT_S2_PS0_i,comdat
	.protected	_Z14kernel_replaceIfEvPKT_S2_PS0_i ; -- Begin function _Z14kernel_replaceIfEvPKT_S2_PS0_i
	.globl	_Z14kernel_replaceIfEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z14kernel_replaceIfEvPKT_S2_PS0_i,@function
_Z14kernel_replaceIfEvPKT_S2_PS0_i:     ; @_Z14kernel_replaceIfEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB45_3
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_neq_f32_e32 vcc_lo, 0, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB45_3
; %bb.2:
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	s_load_b64 s[0:1], s[0:1], 0x10
	global_load_b32 v2, v[2:3], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB45_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14kernel_replaceIfEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14kernel_replaceIfEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_replaceIfEvPKT_S2_PS0_i,comdat
.Lfunc_end45:
	.size	_Z14kernel_replaceIfEvPKT_S2_PS0_i, .Lfunc_end45-_Z14kernel_replaceIfEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 196
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z21kernel_replace_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i,comdat
	.protected	_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i ; -- Begin function _Z21kernel_replace_scalarIfEvPKT_PS0_S0_i
	.globl	_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i,@function
_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i: ; @_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB46_3
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_neq_f32_e32 vcc_lo, 0, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB46_3
; %bb.2:
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_mov_b32_e32 v2, s4
	global_store_b32 v[0:1], v2, off
.LBB46_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_replace_scalarIfEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_replace_scalarIfEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i,comdat
.Lfunc_end46:
	.size	_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i, .Lfunc_end46-_Z21kernel_replace_scalarIfEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_sumIfEvPKT_PS0_i,"axG",@progbits,_Z10kernel_sumIfEvPKT_PS0_i,comdat
	.protected	_Z10kernel_sumIfEvPKT_PS0_i ; -- Begin function _Z10kernel_sumIfEvPKT_PS0_i
	.globl	_Z10kernel_sumIfEvPKT_PS0_i
	.p2align	8
	.type	_Z10kernel_sumIfEvPKT_PS0_i,@function
_Z10kernel_sumIfEvPKT_PS0_i:            ; @_Z10kernel_sumIfEvPKT_PS0_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x24
	s_load_b32 s8, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_add_u32 s0, s0, 24
	s_mov_b32 s2, s15
	s_addc_u32 s1, s1, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s9, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	v_cmpx_gt_u32_e64 s8, v1
	s_cbranch_execz .LBB47_4
; %bb.1:                                ; %.lr.ph
	s_load_b32 s1, s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v3, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s1, s3
.LBB47_2:                               ; =>This Inner Loop Header: Depth=1
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s8, v1
	global_load_b32 v4, v[4:5], off
	s_or_b32 s0, vcc_lo, s0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v3, v3, v4
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB47_2
; %bb.3:                                ; %Flow40
	s_or_b32 exec_lo, exec_lo, s0
.LBB47_4:                               ; %Flow41
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
	v_lshlrev_b32_e32 v1, 2, v0
	s_cmp_lt_u32 s3, 2
	ds_store_b32 v1, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB47_5:                               ; %._crit_edge
                                        ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB47_9
; %bb.6:                                ; %.lr.ph30
                                        ;   in Loop: Header=BB47_5 Depth=1
	s_lshr_b32 s0, s3, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB47_8
; %bb.7:                                ;   in Loop: Header=BB47_5 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB47_8:                               ;   in Loop: Header=BB47_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s0
	s_branch .LBB47_5
.LBB47_9:                               ; %._crit_edge31
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB47_11
; %bb.10:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB47_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_sumIfEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_sumIfEvPKT_PS0_i,"axG",@progbits,_Z10kernel_sumIfEvPKT_PS0_i,comdat
.Lfunc_end47:
	.size	_Z10kernel_sumIfEvPKT_PS0_i, .Lfunc_end47-_Z10kernel_sumIfEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 380
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_minIfEvPKT_PS0_i,"axG",@progbits,_Z10kernel_minIfEvPKT_PS0_i,comdat
	.protected	_Z10kernel_minIfEvPKT_PS0_i ; -- Begin function _Z10kernel_minIfEvPKT_PS0_i
	.globl	_Z10kernel_minIfEvPKT_PS0_i
	.p2align	8
	.type	_Z10kernel_minIfEvPKT_PS0_i,@function
_Z10kernel_minIfEvPKT_PS0_i:            ; @_Z10kernel_minIfEvPKT_PS0_i
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s3, s[0:1], 0x24
	s_load_b32 s8, s[0:1], 0x10
	s_add_u32 s0, s0, 24
	s_mov_b32 s2, s15
	s_addc_u32 s1, s1, 0
	s_mov_b32 s9, exec_lo
	s_waitcnt lgkmcnt(0)
	s_load_b32 s10, s[4:5], 0x0
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v3, s10
	v_cmpx_gt_u32_e64 s8, v1
	s_cbranch_execz .LBB48_4
; %bb.1:                                ; %.lr.ph
	s_load_b32 s0, s[0:1], 0x0
	v_dual_mov_b32 v3, s10 :: v_dual_mov_b32 v2, 0
	s_mov_b32 s1, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s0, s3
.LBB48_2:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_nc_u32_e32 v1, s10, v1
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s8, v1
	global_load_b32 v4, v[4:5], off
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	v_cmp_lt_f32_e64 s0, v3, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v4, v3, s0
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB48_2
; %bb.3:                                ; %Flow50
	s_or_b32 exec_lo, exec_lo, s1
.LBB48_4:                               ; %Flow51
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
	v_lshlrev_b32_e32 v1, 2, v0
	s_cmp_lt_u32 s3, 2
	ds_store_b32 v1, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB48_5:                               ; %._crit_edge
                                        ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB48_9
; %bb.6:                                ; %.lr.ph40
                                        ;   in Loop: Header=BB48_5 Depth=1
	s_lshr_b32 s0, s3, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB48_8
; %bb.7:                                ;   in Loop: Header=BB48_5 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v3, v1
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, v3, v2
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	ds_store_b32 v1, v2
.LBB48_8:                               ;   in Loop: Header=BB48_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s0
	s_branch .LBB48_5
.LBB48_9:                               ; %._crit_edge41
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB48_11
; %bb.10:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB48_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_minIfEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_minIfEvPKT_PS0_i,"axG",@progbits,_Z10kernel_minIfEvPKT_PS0_i,comdat
.Lfunc_end48:
	.size	_Z10kernel_minIfEvPKT_PS0_i, .Lfunc_end48-_Z10kernel_minIfEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 408
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_maxIfEvPKT_PS0_i,"axG",@progbits,_Z10kernel_maxIfEvPKT_PS0_i,comdat
	.protected	_Z10kernel_maxIfEvPKT_PS0_i ; -- Begin function _Z10kernel_maxIfEvPKT_PS0_i
	.globl	_Z10kernel_maxIfEvPKT_PS0_i
	.p2align	8
	.type	_Z10kernel_maxIfEvPKT_PS0_i,@function
_Z10kernel_maxIfEvPKT_PS0_i:            ; @_Z10kernel_maxIfEvPKT_PS0_i
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s3, s[0:1], 0x24
	s_load_b32 s8, s[0:1], 0x10
	s_add_u32 s0, s0, 24
	s_mov_b32 s2, s15
	s_addc_u32 s1, s1, 0
	s_mov_b32 s9, exec_lo
	s_waitcnt lgkmcnt(0)
	s_load_b32 s10, s[4:5], 0x0
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v3, s10
	v_cmpx_gt_u32_e64 s8, v1
	s_cbranch_execz .LBB49_4
; %bb.1:                                ; %.lr.ph
	s_load_b32 s0, s[0:1], 0x0
	v_dual_mov_b32 v3, s10 :: v_dual_mov_b32 v2, 0
	s_mov_b32 s1, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s0, s3
.LBB49_2:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_nc_u32_e32 v1, s10, v1
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s8, v1
	global_load_b32 v4, v[4:5], off
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e64 s0, v3, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v4, v3, s0
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB49_2
; %bb.3:                                ; %Flow50
	s_or_b32 exec_lo, exec_lo, s1
.LBB49_4:                               ; %Flow51
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
	v_lshlrev_b32_e32 v1, 2, v0
	s_cmp_lt_u32 s3, 2
	ds_store_b32 v1, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB49_5:                               ; %._crit_edge
                                        ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB49_9
; %bb.6:                                ; %.lr.ph40
                                        ;   in Loop: Header=BB49_5 Depth=1
	s_lshr_b32 s0, s3, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB49_8
; %bb.7:                                ;   in Loop: Header=BB49_5 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v3, v1
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, v3, v2
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	ds_store_b32 v1, v2
.LBB49_8:                               ;   in Loop: Header=BB49_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s0
	s_branch .LBB49_5
.LBB49_9:                               ; %._crit_edge41
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB49_11
; %bb.10:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB49_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_maxIfEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_maxIfEvPKT_PS0_i,"axG",@progbits,_Z10kernel_maxIfEvPKT_PS0_i,comdat
.Lfunc_end49:
	.size	_Z10kernel_maxIfEvPKT_PS0_i, .Lfunc_end49-_Z10kernel_maxIfEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 408
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z13kernel_pad_2dIfEvPKT_PS0_iiiiii,"axG",@progbits,_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii,comdat
	.protected	_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii ; -- Begin function _Z13kernel_pad_2dIfEvPKT_PS0_iiiiii
	.globl	_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii
	.p2align	8
	.type	_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii,@function
_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii:    ; @_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[4:5], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB50_2
; %bb.1:
	s_load_b256 s[8:15], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	v_add_nc_u32_e32 v1, s13, v1
	s_add_i32 s0, s14, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_i32 s0, s0, s4
	global_load_b32 v2, v[2:3], off
	v_mul_lo_u32 v1, v1, s0
	v_add3_u32 v0, v0, s12, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB50_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13kernel_pad_2dIfEvPKT_PS0_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13kernel_pad_2dIfEvPKT_PS0_iiiiii,"axG",@progbits,_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii,comdat
.Lfunc_end50:
	.size	_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii, .Lfunc_end50-_Z13kernel_pad_2dIfEvPKT_PS0_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 252
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii,"axG",@progbits,_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii,comdat
	.protected	_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii ; -- Begin function _Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii
	.globl	_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii
	.p2align	8
	.type	_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii,@function
_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii:  ; @_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[4:5], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB51_2
; %bb.1:
	s_load_b256 s[8:15], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, s13, v1
	s_add_i32 s0, s14, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s0, s0, s4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v2, v2, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v2, v0, s12, v2
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s8, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v4, v[2:3], off
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v4, off
.LBB51_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii,"axG",@progbits,_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii,comdat
.Lfunc_end51:
	.size	_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii, .Lfunc_end51-_Z15kernel_unpad_2dIfEvPKT_PS0_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 260
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii,comdat
	.protected	_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii ; -- Begin function _Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii
	.globl	_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii
	.p2align	8
	.type	_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii,@function
_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii: ; @_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x44
	s_load_b128 s[4:7], s[0:1], 0x28
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s7, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s6, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB52_2
; %bb.1:
	v_mad_u64_u32 v[3:4], null, v2, s5, v[1:2]
	s_clause 0x1
	s_load_b256 s[8:15], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v3, s4, v[0:1]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, s14, v2
	s_add_i32 s0, s0, s13
	s_add_i32 s0, s0, s5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v2, v2, s0
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	s_add_i32 s0, s15, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_i32 s0, s0, s4
	global_load_b32 v3, v[3:4], off
	v_add3_u32 v1, v1, s13, v2
	v_mul_lo_u32 v1, v1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v0, v0, s12, v1
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v3, off
.LBB52_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii,comdat
.Lfunc_end52:
	.size	_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii, .Lfunc_end52-_Z13kernel_pad_3dIfEvPKT_PS0_iiiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 344
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii,comdat
	.protected	_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii ; -- Begin function _Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii
	.globl	_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii
	.p2align	8
	.type	_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii,@function
_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii: ; @_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x44
	s_load_b128 s[4:7], s[0:1], 0x28
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s7, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s6, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB53_2
; %bb.1:
	s_clause 0x1
	s_load_b256 s[8:15], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v3, s14, v2
	s_add_i32 s0, s0, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s0, s0, s5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v3, v3, s0
	s_add_i32 s0, s15, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s0, s0, s4
	v_add3_u32 v3, v1, s13, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v3, s0
	v_add3_u32 v3, v0, s12, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	global_load_b32 v5, v[3:4], off
	v_mad_u64_u32 v[3:4], null, v2, s5, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v3, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v5, off
.LBB53_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii,comdat
.Lfunc_end53:
	.size	_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii, .Lfunc_end53-_Z15kernel_unpad_3dIfEvPKT_PS0_iiiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 352
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z14kernel_grid_2dIfEvPT_S1_Pdii,"axG",@progbits,_Z14kernel_grid_2dIfEvPT_S1_Pdii,comdat
	.protected	_Z14kernel_grid_2dIfEvPT_S1_Pdii ; -- Begin function _Z14kernel_grid_2dIfEvPT_S1_Pdii
	.globl	_Z14kernel_grid_2dIfEvPT_S1_Pdii
	.p2align	8
	.type	_Z14kernel_grid_2dIfEvPT_S1_Pdii,@function
_Z14kernel_grid_2dIfEvPT_S1_Pdii:       ; @_Z14kernel_grid_2dIfEvPT_S1_Pdii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b64 s[20:21], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s20, v0
	v_cmp_gt_i32_e64 s2, s21, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB54_2
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x10
	v_cvt_f64_i32_e32 v[2:3], v0
	v_cvt_f64_i32_e32 v[8:9], v1
	s_waitcnt lgkmcnt(0)
	s_load_b512 s[4:19], s[2:3], 0x0
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], s[12:13], s[4:5]
	v_mul_f64 v[6:7], s[16:17], s[4:5]
	v_mul_f64 v[10:11], s[14:15], s[6:7]
	v_mul_f64 v[12:13], s[18:19], s[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[4:5], v[4:5], v[2:3]
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[10:11], v[8:9], v[4:5]
	v_fma_f64 v[2:3], v[12:13], v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], s[8:9], v[4:5]
	v_add_f64 v[2:3], s[10:11], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_f64_e32 v4, v[4:5]
	v_cvt_f32_f64_e32 v5, v[2:3]
	v_mad_u64_u32 v[2:3], null, v1, s20, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[2:3], v4, off
	global_store_b32 v[0:1], v5, off
.LBB54_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14kernel_grid_2dIfEvPT_S1_Pdii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14kernel_grid_2dIfEvPT_S1_Pdii,"axG",@progbits,_Z14kernel_grid_2dIfEvPT_S1_Pdii,comdat
.Lfunc_end54:
	.size	_Z14kernel_grid_2dIfEvPT_S1_Pdii, .Lfunc_end54-_Z14kernel_grid_2dIfEvPT_S1_Pdii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 328
; NumSgprs: 24
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii,"axG",@progbits,_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii,comdat
	.protected	_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii ; -- Begin function _Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii
	.globl	_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii
	.p2align	8
	.type	_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii,@function
_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii:   ; @_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x3c
	s_load_b128 s[36:39], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s4, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s36, v0
	v_cmp_gt_i32_e64 s2, s37, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s38, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB55_2
; %bb.1:
	s_load_b256 s[16:23], s[0:1], 0x0
	v_cvt_f64_i32_e32 v[3:4], v0
	v_cvt_f64_i32_e32 v[11:12], v1
	s_waitcnt lgkmcnt(0)
	s_clause 0x2
	s_load_b512 s[0:15], s[22:23], 0x0
	s_load_b256 s[24:31], s[22:23], 0x40
	s_load_b128 s[40:43], s[22:23], 0x60
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[5:6], s[12:13], s[0:1]
	v_mul_f64 v[7:8], s[26:27], s[0:1]
	v_mul_f64 v[9:10], s[40:41], s[0:1]
	v_mul_f64 v[13:14], s[14:15], s[2:3]
	v_mul_f64 v[15:16], s[28:29], s[2:3]
	v_mul_f64 v[17:18], s[42:43], s[2:3]
	s_load_b64 s[0:1], s[22:23], 0x70
	v_mul_f64 v[19:20], s[24:25], s[4:5]
	v_mul_f64 v[21:22], s[30:31], s[4:5]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[23:24], s[0:1], s[4:5]
	v_mul_f64 v[5:6], v[5:6], v[3:4]
	v_mul_f64 v[7:8], v[7:8], v[3:4]
	v_mul_f64 v[3:4], v[9:10], v[3:4]
	v_cvt_f64_i32_e32 v[9:10], v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[5:6], v[13:14], v[11:12], v[5:6]
	v_fma_f64 v[7:8], v[15:16], v[11:12], v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[3:4], v[17:18], v[11:12], v[3:4]
	v_fma_f64 v[5:6], v[19:20], v[9:10], v[5:6]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[7:8], v[21:22], v[9:10], v[7:8]
	v_fma_f64 v[3:4], v[23:24], v[9:10], v[3:4]
	v_mad_u64_u32 v[9:10], null, v2, s37, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v9, s36, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s16, v0
	v_add_f64 v[5:6], s[6:7], v[5:6]
	v_add_f64 v[7:8], s[8:9], v[7:8]
	v_add_f64 v[3:4], s[10:11], v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f32_f64_e32 v6, v[5:6]
	v_cvt_f32_f64_e32 v7, v[7:8]
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_f32_f64_e32 v8, v[3:4]
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s19, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s20, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s21, v1, vcc_lo
	global_store_b32 v[2:3], v6, off
	global_store_b32 v[4:5], v7, off
	global_store_b32 v[0:1], v8, off
.LBB55_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 44
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii,"axG",@progbits,_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii,comdat
.Lfunc_end55:
	.size	_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii, .Lfunc_end55-_Z14kernel_grid_3dIfEvPT_S1_S1_Pdiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 520
; NumSgprs: 46
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 46
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i,"axG",@progbits,_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i,comdat
	.protected	_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i ; -- Begin function _Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i
	.globl	_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i
	.p2align	8
	.type	_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i,@function
_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i: ; @_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b32 s3, s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB56_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
	s_load_b64 s[4:5], s[0:1], 0x20
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v[4:5], off
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	s_load_b128 s[0:3], s[4:5], 0x0
	s_load_b64 s[4:5], s[4:5], 0x10
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_mul_f32_e32 v8, s1, v6
	v_add_co_u32 v6, vcc_lo, s8, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v8, s0, v7
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_f32_e32 v8, s4, v8
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_store_b32 v[6:7], v8, off
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v2, s3, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, s2, v3
	v_add_f32_e32 v2, s5, v2
	global_store_b32 v[0:1], v2, off
.LBB56_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i,"axG",@progbits,_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i,comdat
.Lfunc_end56:
	.size	_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i, .Lfunc_end56-_Z16kernel_affine_2dIfEvPKT_S2_PS0_S3_S2_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i,"axG",@progbits,_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i,comdat
	.protected	_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i ; -- Begin function _Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i
	.globl	_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i
	.p2align	8
	.type	_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i,@function
_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i: ; @_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b32 s3, s[0:1], 0x38
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB57_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v8, v[2:3], off
	v_add_co_u32 v6, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	global_load_b32 v9, v[4:5], off
	global_load_b32 v10, v[6:7], off
	s_load_b256 s[0:7], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	s_load_b256 s[12:19], s[4:5], 0x0
	s_load_b128 s[4:7], s[4:5], 0x20
	s_waitcnt vmcnt(2) lgkmcnt(0)
	v_mul_f32_e32 v11, s13, v8
	v_add_co_u32 v8, vcc_lo, s10, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v11, s12, v9
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v11, s14, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v10, s5, v11
	global_store_b32 v[8:9], v10, off
	global_load_b32 v8, v[2:3], off
	global_load_b32 v9, v[4:5], off
	global_load_b32 v10, v[6:7], off
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v11, s16, v8
	v_add_co_u32 v8, vcc_lo, s0, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v11, s15, v9
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v11, s17, v10
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f32_e32 v10, s6, v11
	global_store_b32 v[8:9], v10, off
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	global_load_b32 v4, v[6:7], off
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v2, s19, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, s18, v3
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v2, s4, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, s7, v2
	global_store_b32 v[0:1], v2, off
.LBB57_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i,"axG",@progbits,_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i,comdat
.Lfunc_end57:
	.size	_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i, .Lfunc_end57-_Z16kernel_affine_3dIfEvPKT_S2_S2_PS0_S3_S3_S2_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 412
; NumSgprs: 22
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi,comdat
	.protected	_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi ; -- Begin function _Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi
	.globl	_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi
	.p2align	8
	.type	_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi,@function
_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi: ; @_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b32 s3, s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB58_2
; %bb.1:
	s_load_b256 s[12:19], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s14, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v1, vcc_lo
	global_load_b32 v8, v[2:3], off
	s_load_b512 s[0:15], s[0:1], 0x0
	global_load_b32 v12, v[4:5], off
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[6:7], s[10:11], s[2:3]
	v_mul_f64 v[10:11], s[8:9], s[0:1]
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[8:9], v8
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[12:13], v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[6:7], v[8:9]
	v_fma_f64 v[6:7], v[10:11], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], s[4:5], v[6:7]
	v_cvt_f32_f64_e32 v8, v[6:7]
	v_add_co_u32 v6, vcc_lo, s16, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s17, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v1, vcc_lo
	global_store_b32 v[6:7], v8, off
	global_load_b32 v6, v[2:3], off
	global_load_b32 v8, v[4:5], off
	v_mul_f64 v[2:3], s[14:15], s[2:3]
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[4:5], v6
	v_mul_f64 v[6:7], s[12:13], s[0:1]
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[8:9], v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], v[4:5]
	v_fma_f64 v[2:3], v[6:7], v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], s[6:7], v[2:3]
	v_cvt_f32_f64_e32 v2, v[2:3]
	global_store_b32 v[0:1], v2, off
.LBB58_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi,comdat
.Lfunc_end58:
	.size	_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi, .Lfunc_end58-_Z20kernel_affine_sod_2dIfEvPKT_S2_PS0_S3_PKdi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 356
; NumSgprs: 22
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi,comdat
	.protected	_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi ; -- Begin function _Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi
	.globl	_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi
	.p2align	8
	.type	_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi,@function
_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi: ; @_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b32 s3, s[0:1], 0x38
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB59_2
; %bb.1:
	s_load_b256 s[12:19], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b256 s[20:27], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s14, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v1, vcc_lo
	global_load_b32 v10, v[2:3], off
	v_add_co_u32 v6, vcc_lo, s16, v0
	global_load_b32 v14, v[4:5], off
	v_add_co_ci_u32_e32 v7, vcc_lo, s17, v1, vcc_lo
	s_clause 0x1
	s_load_b512 s[0:15], s[24:25], 0x0
	s_load_b256 s[36:43], s[24:25], 0x40
	global_load_b32 v16, v[6:7], off
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[8:9], s[14:15], s[2:3]
	v_mul_f64 v[12:13], s[12:13], s[0:1]
	s_waitcnt vmcnt(2)
	v_cvt_f64_f32_e32 v[10:11], v10
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[14:15], v14
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[16:17], v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[8:9], v[8:9], v[10:11]
	v_mul_f64 v[10:11], s[36:37], s[4:5]
	v_fma_f64 v[8:9], v[12:13], v[14:15], v[8:9]
	v_mul_f64 v[12:13], s[38:39], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[10:11], v[16:17], v[8:9]
	v_add_f64 v[8:9], s[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v10, v[8:9]
	v_add_co_u32 v8, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s19, v1, vcc_lo
	global_store_b32 v[8:9], v10, off
	global_load_b32 v10, v[2:3], off
	global_load_b32 v14, v[4:5], off
	global_load_b32 v16, v[6:7], off
	v_mul_f64 v[8:9], s[40:41], s[2:3]
	s_waitcnt vmcnt(2)
	v_cvt_f64_f32_e32 v[10:11], v10
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[14:15], v14
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[16:17], v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[8:9], v[8:9], v[10:11]
	v_mul_f64 v[10:11], s[42:43], s[4:5]
	v_fma_f64 v[8:9], v[12:13], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[10:11], v[16:17], v[8:9]
	v_add_f64 v[8:9], s[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v10, v[8:9]
	v_add_co_u32 v8, vcc_lo, s20, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s21, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s22, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s23, v1, vcc_lo
	global_store_b32 v[8:9], v10, off
	global_load_b32 v8, v[2:3], off
	global_load_b32 v9, v[4:5], off
	global_load_b32 v10, v[6:7], off
	s_load_b128 s[12:15], s[24:25], 0x60
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[2:3], s[14:15], s[2:3]
	v_mul_f64 v[6:7], s[12:13], s[0:1]
	s_load_b64 s[0:1], s[24:25], 0x70
	s_waitcnt vmcnt(2)
	v_cvt_f64_f32_e32 v[4:5], v8
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[8:9], v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], v[2:3], v[4:5]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], s[0:1], s[4:5]
	v_fma_f64 v[2:3], v[6:7], v[8:9], v[2:3]
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[6:7], v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[4:5], v[6:7], v[2:3]
	v_add_f64 v[2:3], s[10:11], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v2, v[2:3]
	global_store_b32 v[0:1], v2, off
.LBB59_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 18
		.amdhsa_next_free_sgpr 44
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi,comdat
.Lfunc_end59:
	.size	_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi, .Lfunc_end59-_Z20kernel_affine_sod_3dIfEvPKT_S2_S2_PS0_S3_S3_PKdi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 616
; NumSgprs: 46
; NumVgprs: 18
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 46
; NumVGPRsForWavesPerEU: 18
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i,"axG",@progbits,_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i,comdat
	.protected	_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i ; -- Begin function _Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i
	.globl	_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i
	.p2align	8
	.type	_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i,@function
_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i: ; @_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b32 s3, s[0:1], 0x30
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB60_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b128 s[0:3], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v[4:5], off
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v8, v6, v7
	v_add_co_u32 v6, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v1, vcc_lo
	global_store_b32 v[2:3], v8, off
	global_load_b32 v2, v[4:5], off
	global_load_b32 v3, v[6:7], off
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB60_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i,"axG",@progbits,_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i,comdat
.Lfunc_end60:
	.size	_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i, .Lfunc_end60-_Z16kernel_dfield_2dIfEvPKT_S2_S2_S2_PS0_S3_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,"axG",@progbits,_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,comdat
	.protected	_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i ; -- Begin function _Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.globl	_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.p2align	8
	.type	_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,@function
_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i: ; @_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x5c
	s_load_b32 s3, s[0:1], 0x48
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB61_2
; %bb.1:
	s_load_b512 s[4:19], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v[4:5], off
	v_add_co_u32 v2, vcc_lo, s16, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v8, v6, v7
	v_add_co_u32 v6, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v1, vcc_lo
	global_store_b32 v[2:3], v8, off
	global_load_b32 v8, v[4:5], off
	global_load_b32 v6, v[6:7], off
	v_add_co_u32 v2, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s19, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v8, v8, v6
	v_add_co_u32 v6, vcc_lo, s14, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s15, v1, vcc_lo
	global_store_b32 v[2:3], v8, off
	global_load_b32 v2, v[4:5], off
	global_load_b32 v3, v[6:7], off
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB61_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,"axG",@progbits,_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,comdat
.Lfunc_end61:
	.size	_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, .Lfunc_end61-_Z16kernel_dfield_3dIfEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 316
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,comdat
	.protected	_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii ; -- Begin function _Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.globl	_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.p2align	8
	.type	_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,@function
_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii: ; @_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s10, v0
	v_cmp_gt_i32_e64 s2, s11, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB62_4
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_trunc_f32_e32 v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v4, v2, v3
	v_cmp_ge_f32_e64 s0, |v4|, 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, 0, 1.0, s0
	v_bfi_b32 v2, 0x7fffffff, v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v3, v2
	v_cvt_i32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB62_4
; %bb.2:
	v_add_co_u32 v3, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v1, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s8, v2
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_trunc_f32_e32 v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v5, v3, v4
	v_cmp_ge_f32_e64 s0, |v5|, 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, 0, 1.0, s0
	v_bfi_b32 v3, 0x7fffffff, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v4, v3
	v_cvt_i32_f32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s0, s9, v3
	v_cmp_lt_i32_e64 s1, -1, v3
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB62_4
; %bb.3:
	v_mad_u64_u32 v[4:5], null, v3, s8, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[2:3], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB62_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,comdat
.Lfunc_end62:
	.size	_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, .Lfunc_end62-_Z31kernel_nearest_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 452
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.protected	_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii ; -- Begin function _Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.globl	_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.p2align	8
	.type	_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,@function
_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii: ; @_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x4c
	s_load_b128 s[4:7], s[0:1], 0x28
	s_load_b64 s[8:9], s[0:1], 0x38
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s10, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s10, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s7, v0
	v_cmp_gt_i32_e64 s2, s8, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s9, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB63_5
; %bb.1:
	v_mad_u64_u32 v[3:4], null, v2, s8, v[1:2]
	s_load_b128 s[8:11], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v3, s7, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_trunc_f32_e32 v3, v2
	v_sub_f32_e32 v4, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, |v4|, 0.5
	v_cndmask_b32_e64 v4, 0, 1.0, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v2, 0x7fffffff, v4, v2
	v_add_f32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v2, v2
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB63_5
; %bb.2:
	v_add_co_u32 v3, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v1, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s4, v2
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_trunc_f32_e32 v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v5, v3, v4
	v_cmp_ge_f32_e64 s2, |v5|, 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, 0, 1.0, s2
	v_bfi_b32 v3, 0x7fffffff, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v4, v3
	v_cvt_i32_f32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e64 s2, -1, v3
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB63_5
; %bb.3:
	s_min_i32 s2, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB63_5
; %bb.4:
	v_mul_lo_u32 v3, v3, s4
	s_load_b128 s[0:3], s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v3, s5
	v_add3_u32 v2, v3, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB63_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,comdat
.Lfunc_end63:
	.size	_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii, .Lfunc_end63-_Z31kernel_nearest_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 544
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,comdat
	.protected	_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii ; -- Begin function _Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.globl	_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.p2align	8
	.type	_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,@function
_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii: ; @_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s10, v0
	v_cmp_gt_i32_e64 s2, s11, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB64_16
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v3, v[2:3], off
	s_waitcnt vmcnt(0)
	v_floor_f32_e32 v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v2, v2
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB64_16
; %bb.2:
	v_add_co_u32 v4, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s8, v2
	global_load_b32 v6, v[4:5], off
	s_waitcnt vmcnt(0)
	v_floor_f32_e32 v4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v5, v4
	v_cmp_gt_i32_e64 s0, s9, v5
	v_cmp_lt_i32_e64 s1, -1, v5
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB64_16
; %bb.3:
	v_cvt_f32_i32_e32 v4, v2
	v_cvt_f32_i32_e32 v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v4, v3, v4 :: v_dual_sub_f32 v3, v6, v7
                                        ; implicit-def: $vgpr6
	v_cmp_ngt_f32_e64 s0, 0x3c23d70a, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_ngt_f32_e64 s1, 0x3c23d70a, v3
	v_cmp_gt_f32_e32 vcc_lo, 0x3c23d70a, v4
	s_or_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s2, exec_lo, s1
	s_cbranch_execz .LBB64_13
; %bb.4:
	s_add_i32 s1, s9, -1
	v_cmp_gt_f32_e64 s0, 0x3c23d70a, v3
	v_cmp_le_i32_e64 s1, s1, v5
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, s1
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB64_6
; %bb.5:
	v_mad_u64_u32 v[6:7], null, v5, s8, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[2:3], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s0, s4, v2
	v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v5, 1.0, v4 :: v_dual_mul_f32 v6, v4, v3
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v5, v2
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr5
.LBB64_6:                               ; %Flow141
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB64_12
; %bb.7:
	s_add_i32 s0, s8, -1
	s_xor_b32 s3, vcc_lo, -1
	v_cmp_gt_u32_e64 s0, s0, v2
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s3, s0
	s_and_saveexec_b32 s3, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s3
	s_cbranch_execz .LBB64_9
; %bb.8:
	v_mad_u64_u32 v[6:7], null, v5, s8, v[2:3]
	v_sub_f32_e32 v2, 1.0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v2, v2, v3
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v2, v4, v3 :: v_dual_add_nc_u32 v5, s8, v6
	v_lshlrev_b64 v[7:8], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s4, v5
	global_load_b64 v[7:8], v[7:8], off
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b64 v[9:10], v[5:6], off
	v_fma_f32 v5, -v4, v3, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v5, v8
                                        ; implicit-def: $vgpr5
	v_fmac_f32_e32 v6, v2, v7
	v_fma_f32 v2, -v4, v3, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v3, v4, v3 :: v_dual_fmac_f32 v6, v2, v9
                                        ; implicit-def: $vgpr2
	v_fmac_f32_e32 v6, v3, v10
                                        ; implicit-def: $vgpr3
.LBB64_9:                               ; %Flow
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB64_11
; %bb.10:
	v_mad_u64_u32 v[6:7], null, v5, s8, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, s8, v6
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_clause 0x1
	global_load_b32 v2, v[4:5], off
	global_load_b32 v4, v[6:7], off
	s_waitcnt vmcnt(1)
	v_dual_sub_f32 v5, 1.0, v3 :: v_dual_mul_f32 v6, v3, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v5, v4
.LBB64_11:                              ; %Flow140
	s_or_b32 exec_lo, exec_lo, s0
.LBB64_12:                              ; %Flow142
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr5
.LBB64_13:                              ; %Flow143
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB64_15
; %bb.14:
	v_mad_u64_u32 v[3:4], null, v5, s8, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v6, v[2:3], off
.LBB64_15:                              ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v6, off
.LBB64_16:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,comdat
.Lfunc_end64:
	.size	_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, .Lfunc_end64-_Z30kernel_linear_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 916
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.protected	_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii ; -- Begin function _Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.globl	_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
	.p2align	8
	.type	_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,@function
_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii: ; @_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x4c
	s_load_b128 s[16:19], s[0:1], 0x28
	s_load_b64 s[4:5], s[0:1], 0x38
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s6, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s6, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s19, v0
	v_cmp_gt_i32_e64 s2, s4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s5, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB65_33
; %bb.1:
	v_mad_u64_u32 v[3:4], null, v2, s4, v[1:2]
	s_load_b256 s[4:11], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v3, s19, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v4, v[2:3], off
	s_waitcnt vmcnt(0)
	v_floor_f32_e32 v2, v4
	v_cvt_i32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB65_33
; %bb.2:
	v_add_co_u32 v5, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v1, vcc_lo
	s_load_b64 s[4:5], s[0:1], 0x20
	v_cmp_gt_i32_e32 vcc_lo, s16, v2
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_floor_f32_e32 v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v3, v3
	v_cmp_lt_i32_e64 s0, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB65_33
; %bb.3:
	v_add_co_u32 v6, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s17, v3
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0)
	v_floor_f32_e32 v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v12, v7
	v_cmp_gt_i32_e64 s0, s18, v12
	v_cmp_lt_i32_e64 s1, -1, v12
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB65_33
; %bb.4:
	v_cvt_f32_i32_e32 v7, v2
	v_cvt_f32_i32_e32 v9, v3
	v_cvt_f32_i32_e32 v10, v12
                                        ; implicit-def: $vgpr11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v8, v4, v7 :: v_dual_sub_f32 v9, v5, v9
	v_sub_f32_e32 v10, v6, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_nge_f32_e32 vcc_lo, 0x3c23d70a, v8
	v_cmp_nge_f32_e64 s0, 0x3c23d70a, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_nge_f32_e64 s1, 0x3c23d70a, v10
	s_or_b32 s2, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s2, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s2, s2, -1
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB65_6
; %bb.5:
	v_mad_u64_u32 v[4:5], null, v12, s17, v[3:4]
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v4, s16, v[2:3]
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	v_add_co_u32 v2, s2, s10, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s2, s11, v3, s2
	global_load_b32 v11, v[2:3], off
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr2
.LBB65_6:                               ; %Flow425
	s_and_not1_saveexec_b32 s6, s3
	s_cbranch_execz .LBB65_32
; %bb.7:
	s_add_i32 s2, s18, -1
	s_add_i32 s3, s17, -1
	v_cmp_le_i32_e64 s2, s2, v12
	v_cmp_le_u32_e64 s3, s3, v3
	s_xor_b32 s1, s1, -1
	s_xor_b32 s0, s0, -1
                                        ; implicit-def: $vgpr11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s1, s1, s2
	s_or_b32 s2, s0, s3
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB65_17
; %bb.8:
                                        ; implicit-def: $vgpr11
	s_and_saveexec_b32 s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s0
	s_cbranch_execz .LBB65_10
; %bb.9:
	s_mul_i32 s0, s17, s16
	v_mul_lo_u32 v3, v3, s16
	v_mul_lo_u32 v4, s0, v12
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v2, v3, v2, v4
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, s0, s10, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s11, v3, s0
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v4, 1.0, v8 :: v_dual_mul_f32 v11, v8, v3
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr3
	v_fmac_f32_e32 v11, v4, v2
                                        ; implicit-def: $vgpr2
.LBB65_10:                              ; %Flow415
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB65_16
; %bb.11:
	s_add_i32 s0, s16, -1
	s_xor_b32 s7, vcc_lo, -1
	v_cmp_le_u32_e64 s0, s0, v2
                                        ; implicit-def: $vgpr11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s7, s0
	s_and_saveexec_b32 s7, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB65_13
; %bb.12:
	s_mul_i32 s0, s17, s16
	v_mul_lo_u32 v3, v3, s16
	v_mul_lo_u32 v4, s0, v12
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v2, v4, v2, v3
	v_add_nc_u32_e32 v4, s16, v2
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, s0, s10, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v5, s0, s11, v5, s0
	v_add_co_u32 v2, s0, s10, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s11, v3, s0
	s_clause 0x1
	global_load_b32 v4, v[4:5], off
	global_load_b32 v2, v[2:3], off
	v_sub_f32_e32 v3, 1.0, v9
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v11, v9, v4
                                        ; implicit-def: $vgpr9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, v3, v2
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr2
.LBB65_13:                              ; %Flow
	s_and_not1_saveexec_b32 s7, s7
	s_cbranch_execz .LBB65_15
; %bb.14:
	s_mul_i32 s0, s17, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[4:5], null, s0, v12, v[2:3]
	v_mul_lo_u32 v3, v3, s16
	v_add_nc_u32_e32 v7, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v5, v4, v3
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v11, s16, v3
	v_add_nc_u32_e32 v2, v7, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v6, 31, v5
	v_add_nc_u32_e32 v10, v4, v11
	v_add_nc_u32_e32 v4, v7, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s0, s10, v2
	v_add_co_ci_u32_e64 v3, s0, s11, v3, s0
	v_add_co_u32 v12, s0, s10, v5
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_co_ci_u32_e64 v13, s0, s11, v6, s0
	v_lshlrev_b64 v[6:7], 2, v[10:11]
	s_clause 0x1
	global_load_b32 v10, v[2:3], off
	global_load_b32 v12, v[12:13], off
	v_lshlrev_b64 v[2:3], 2, v[4:5]
	v_add_co_u32 v4, s0, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v5, s0, s11, v7, s0
	v_add_co_u32 v2, s0, s10, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s11, v3, s0
	s_clause 0x1
	global_load_b32 v4, v[4:5], off
	global_load_b32 v2, v[2:3], off
	v_sub_f32_e32 v3, 1.0, v8
	v_fma_f32 v5, -v8, v9, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v3, v3, v9
	v_fmac_f32_e32 v3, v8, v9
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v11, v5, v10
	v_mul_f32_e32 v5, v8, v9
	s_waitcnt vmcnt(2)
	v_fmac_f32_e32 v11, v3, v12
	v_fma_f32 v3, -v8, v9, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v3, v4
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v11, v5, v2
.LBB65_15:                              ; %Flow414
	s_or_b32 exec_lo, exec_lo, s7
.LBB65_16:                              ; %Flow416
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr10
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr3
.LBB65_17:                              ; %Flow423
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB65_31
; %bb.18:
	s_add_i32 s0, s16, -1
	s_xor_b32 s3, vcc_lo, -1
	v_cmp_le_u32_e64 s0, s0, v2
                                        ; implicit-def: $vgpr11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s3, s0
	s_and_saveexec_b32 s0, s2
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB65_24
; %bb.19:
	v_mul_lo_u32 v3, v3, s16
                                        ; implicit-def: $vgpr11
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB65_21
; %bb.20:
	s_mul_i32 s7, s17, s16
                                        ; implicit-def: $vgpr8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, s7, v12
                                        ; implicit-def: $vgpr12
	v_add3_u32 v2, v3, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, s7, v2
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v[4:5], off
	global_load_b32 v2, v[2:3], off
	v_sub_f32_e32 v3, 1.0, v10
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v11, v10, v4
                                        ; implicit-def: $vgpr10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, v3, v2
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr2
.LBB65_21:                              ; %Flow417
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB65_23
; %bb.22:
	s_mul_i32 s7, s17, s16
	v_fma_f32 v7, -v8, v10, v8
	v_mul_lo_u32 v4, s7, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v2, v3, v2, v4
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_nc_u32_e32 v4, s7, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v2, vcc_lo, s10, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s10, v4
	global_load_b64 v[2:3], v[2:3], off
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(1)
	v_dual_sub_f32 v6, 1.0, v8 :: v_dual_mul_f32 v11, v7, v3
	v_mul_f32_e32 v3, v8, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v6, v6, v10
	v_fmac_f32_e32 v6, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v6, v2
	v_fma_f32 v2, -v8, v10, v10
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v11, v2, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, v3, v5
.LBB65_23:                              ; %Flow418
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr10
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr12
.LBB65_24:                              ; %Flow421
	s_and_not1_saveexec_b32 s2, s0
	s_cbranch_execz .LBB65_30
; %bb.25:
	s_mul_i32 s0, s17, s16
	v_mad_u64_u32 v[4:5], null, v3, s16, v[2:3]
	v_mul_lo_u32 v3, s0, v12
                                        ; implicit-def: $vgpr11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v3, v4
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_nc_u32_e32 v5, s16, v4
	v_add_nc_u32_e32 v2, v5, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	global_load_b32 v13, v[6:7], off
	s_and_saveexec_b32 s7, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s7
	s_cbranch_execz .LBB65_27
; %bb.26:
	v_mad_u64_u32 v[6:7], null, s0, v12, s[0:1]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_nc_u32_e32 v4, v6, v4
	v_add_nc_u32_e32 v6, v6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	global_load_b32 v8, v[2:3], off
	v_lshlrev_b64 v[2:3], 2, v[6:7]
                                        ; implicit-def: $vgpr6_vgpr7
	v_add_co_u32 v4, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v[4:5], off
	global_load_b32 v2, v[2:3], off
	v_sub_f32_e32 v3, 1.0, v9
	v_fma_f32 v5, -v9, v10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v3, v3, v10
	v_fmac_f32_e32 v3, v9, v10
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v11, v5, v8
	v_mul_f32_e32 v5, v9, v10
                                        ; implicit-def: $vgpr8
	v_fmac_f32_e32 v11, v3, v13
	v_fma_f32 v3, -v9, v10, v10
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr10
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v3, v4
                                        ; implicit-def: $vgpr3
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v11, v5, v2
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr2
.LBB65_27:                              ; %Flow419
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB65_29
; %bb.28:
	global_load_b32 v14, v[6:7], off offset:4
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v11, s0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v4
	v_add_nc_u32_e32 v11, v11, v5
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	v_add_co_u32 v6, vcc_lo, s10, v11
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v12, vcc_lo
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_clause 0x1
	global_load_b64 v[6:7], v[6:7], off
	global_load_b64 v[2:3], v[2:3], off
	v_sub_f32_e32 v11, 1.0, v8
	v_fma_f32 v12, -v8, v9, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v11, v11, v9
	v_fmac_f32_e32 v11, v8, v9
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v5, v12, v5
	v_mul_f32_e32 v12, v12, v14
	v_fma_f32 v14, -v8, v9, v9
	v_fmac_f32_e32 v5, v11, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v12, v11, v13
	s_waitcnt vmcnt(1)
	v_dual_mul_f32 v4, v8, v9 :: v_dual_fmac_f32 v5, v14, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v12, v14, v2
	v_dual_sub_f32 v2, 1.0, v10 :: v_dual_fmac_f32 v5, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v12, v4, v3 :: v_dual_mul_f32 v11, v10, v5
	v_fmac_f32_e32 v11, v2, v12
.LBB65_29:                              ; %Flow420
	s_or_b32 exec_lo, exec_lo, s3
.LBB65_30:                              ; %Flow422
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB65_31:                              ; %Flow424
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB65_32:                              ; %.sink.split
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v11, off
.LBB65_33:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii,comdat
.Lfunc_end65:
	.size	_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii, .Lfunc_end65-_Z30kernel_linear_interpolation_3dIfEvPKT_S2_S2_S2_PS0_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2296
; NumSgprs: 22
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,comdat
	.protected	_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii ; -- Begin function _Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.globl	_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
	.p2align	8
	.type	_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,@function
_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii: ; @_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s10, v0
	v_cmp_gt_i32_e64 s2, s11, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB66_17
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s10, v[0:1]
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v1, vcc_lo
	s_mov_b32 s2, 0
	global_load_b32 v5, v[2:3], off
	global_load_b32 v3, v[6:7], off
	s_mov_b32 s3, 0
	s_waitcnt vmcnt(1)
	v_floor_f32_e32 v2, v5
	s_waitcnt vmcnt(0)
	v_floor_f32_e32 v4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v2, v2
	v_cvt_i32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e64 s11, 1, v2
	v_cmpx_lt_i32_e32 0, v2
; %bb.2:
	s_add_i32 s0, s8, -2
	s_add_i32 s1, s9, -2
	v_cmp_le_i32_e32 vcc_lo, s0, v2
	v_cmp_le_i32_e64 s0, s1, v4
	v_cmp_gt_i32_e64 s1, 1, v4
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, s1
	s_and_not1_b32 s1, s11, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s11, s1, s0
; %bb.3:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s10
                                        ; implicit-def: $vgpr6
	s_and_saveexec_b32 s10, s11
	s_cbranch_execz .LBB66_13
; %bb.4:
	s_mov_b32 s0, 0
	s_mov_b32 s11, exec_lo
                                        ; implicit-def: $vgpr6
	v_cmpx_lt_i32_e32 -1, v2
	s_cbranch_execz .LBB66_12
; %bb.5:
	v_cmp_le_i32_e64 s0, s8, v2
	v_cmp_gt_i32_e64 s1, 0, v4
	s_add_i32 s9, s9, -1
	v_cmp_gt_i32_e32 vcc_lo, s8, v2
	v_cmp_le_i32_e64 s2, s9, v4
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 s1, s0, s1
	s_mov_b32 s0, 0
	s_or_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s1, exec_lo, s2
	s_cbranch_execz .LBB66_9
; %bb.6:
	v_cmp_eq_u32_e64 s0, s9, v4
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s0
	s_mov_b32 s0, 0
	s_and_saveexec_b32 s9, s2
	s_xor_b32 s2, exec_lo, s9
	s_cbranch_execz .LBB66_8
; %bb.7:
	v_mad_u64_u32 v[6:7], null, v4, s8, v[2:3]
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b64 v[7:8], v[6:7], off
	v_cvt_f32_i32_e32 v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v6, v5, v6
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v9, 1.0, v6 :: v_dual_mul_f32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v9, v7
.LBB66_8:                               ; %Flow213
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB66_9:                               ; %Flow212
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB66_11
; %bb.10:
	v_mad_u64_u32 v[6:7], null, v4, s8, v[2:3]
	s_or_b32 s0, s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v6
	v_add_nc_u32_e32 v8, s8, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b64 v[10:11], v[6:7], off
	v_add_co_u32 v6, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v9, vcc_lo
	v_cvt_f32_i32_e32 v9, v4
	global_load_b64 v[7:8], v[6:7], off
	v_cvt_f32_i32_e32 v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v9, v3, v9 :: v_dual_sub_f32 v12, v5, v6
	v_sub_f32_e32 v6, 1.0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v13, v6, v9
	v_fma_f32 v6, -v12, v9, v12
	s_waitcnt vmcnt(1)
	v_dual_fmac_f32 v13, v12, v9 :: v_dual_mul_f32 v6, v6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v13, v10
	v_fma_f32 v10, -v12, v9, v9
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v9, v12, v9 :: v_dual_fmac_f32 v6, v10, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v9, v8
.LBB66_11:                              ; %Flow214
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB66_12:                              ; %Flow211
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, s0, exec_lo
	s_and_not1_b32 s3, s3, exec_lo
.LBB66_13:                              ; %Flow210
	s_or_b32 exec_lo, exec_lo, s10
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB66_15
; %bb.14:
	v_mul_lo_u32 v15, v4, s8
	v_ashrrev_i32_e32 v21, 31, v2
	s_or_b32 s2, s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v6, v15, v2
	v_ashrrev_i32_e32 v12, 31, v15
	v_add_nc_u32_e32 v18, s8, v15
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v20, s8, v18
	v_ashrrev_i32_e32 v19, 31, v18
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v22, 31, v20
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	v_add_co_u32 v11, vcc_lo, v15, v2
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v21, vcc_lo
	global_load_b96 v[6:8], v[6:7], off
	v_add_nc_u32_e32 v9, -1, v4
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v16, v9, s8
	v_add_nc_u32_e32 v9, v16, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s4, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	v_add_co_u32 v13, vcc_lo, s4, v11
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v12, vcc_lo
	s_clause 0x1
	global_load_b96 v[9:11], v[9:10], off
	global_load_b32 v58, v[13:14], off offset:-4
	v_ashrrev_i32_e32 v13, 31, v16
	v_add_co_u32 v12, vcc_lo, v16, v2
	v_add_nc_u32_e32 v14, v18, v2
	v_add_nc_u32_e32 v16, v20, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v13, vcc_lo, v13, v21, vcc_lo
	v_ashrrev_i32_e32 v15, 31, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v17, 31, v16
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	v_add_co_u32 v12, vcc_lo, s4, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
	v_add_co_u32 v14, vcc_lo, s4, v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v15, vcc_lo, s5, v15, vcc_lo
	global_load_b32 v59, v[12:13], off offset:-4
	v_lshlrev_b64 v[12:13], 2, v[16:17]
	v_add_co_u32 v16, vcc_lo, s4, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v13, vcc_lo
	s_clause 0x1
	global_load_b96 v[12:14], v[14:15], off
	global_load_b96 v[15:17], v[16:17], off
	v_add_co_u32 v18, vcc_lo, v18, v2
	v_add_co_ci_u32_e32 v19, vcc_lo, v19, v21, vcc_lo
	v_add_co_u32 v20, vcc_lo, v20, v2
	v_add_co_ci_u32_e32 v21, vcc_lo, v22, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[18:19], 2, v[18:19]
	v_cvt_f32_i32_e32 v2, v2
	v_lshlrev_b64 v[20:21], 2, v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v18, vcc_lo, s4, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v20, vcc_lo, s4, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, s5, v21, vcc_lo
	s_clause 0x1
	global_load_b32 v60, v[18:19], off offset:-4
	global_load_b32 v61, v[20:21], off offset:-4
	v_sub_f32_e32 v2, v5, v2
	s_waitcnt vmcnt(7)
	v_cvt_f64_f32_e32 v[18:19], v6
	v_sub_f32_e32 v6, v6, v7
	v_cvt_f64_f32_e32 v[28:29], v7
	v_cvt_f64_f32_e32 v[30:31], v8
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_f64_f32_e32 v[34:35], v6
	v_mul_f64 v[24:25], 0x40140000, v[18:19]
	s_waitcnt vmcnt(6)
	v_cvt_f64_f32_e32 v[20:21], v9
	s_waitcnt vmcnt(5)
	v_cvt_f64_f32_e32 v[22:23], v58
	v_sub_f32_e32 v6, v9, v10
	v_cvt_f64_f32_e32 v[8:9], v10
	v_cvt_f64_f32_e32 v[40:41], v11
	v_fma_f64 v[34:35], 0x40080000, v[34:35], v[30:31]
	s_delay_alu instid0(VALU_DEP_4)
	v_cvt_f64_f32_e32 v[44:45], v6
	v_cvt_f64_f32_e32 v[5:6], v2
	s_waitcnt vmcnt(4)
	v_cvt_f64_f32_e32 v[26:27], v59
	s_waitcnt vmcnt(3)
	v_cvt_f64_f32_e32 v[32:33], v12
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v2, v15, v16
	v_cvt_f64_f32_e32 v[36:37], v15
	v_mul_f64 v[38:39], 0x40140000, v[20:21]
	v_fma_f64 v[24:25], v[22:23], 2.0, -v[24:25]
	v_cvt_f64_f32_e32 v[14:15], v14
	v_cvt_f64_f32_e32 v[52:53], v16
	v_cvt_f64_f32_e32 v[54:55], v17
	v_cvt_f64_f32_e32 v[56:57], v2
	v_fma_f64 v[44:45], 0x40080000, v[44:45], v[40:41]
	v_add_f64 v[22:23], v[34:35], -v[22:23]
	v_sub_f32_e32 v2, v7, v58
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[42:43], v60
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[46:47], v61
	v_mul_f64 v[48:49], 0x40140000, v[32:33]
	v_mul_f64 v[50:51], 0x40140000, v[36:37]
	v_fma_f64 v[38:39], v[26:27], 2.0, -v[38:39]
	v_fma_f64 v[24:25], v[28:29], 4.0, v[24:25]
	v_sub_f32_e32 v28, v12, v13
	v_cvt_f64_f32_e32 v[11:12], v13
	v_add_f64 v[26:27], v[44:45], -v[26:27]
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_f64_f32_e32 v[28:29], v28
	v_fma_f64 v[48:49], v[42:43], 2.0, -v[48:49]
	v_fma_f64 v[34:35], v[46:47], 2.0, -v[50:51]
	v_fma_f64 v[8:9], v[8:9], 4.0, v[38:39]
	v_add_f64 v[24:25], v[24:25], -v[30:31]
	v_cvt_f64_f32_e32 v[30:31], v2
	v_fma_f64 v[38:39], 0x40080000, v[56:57], v[54:55]
	v_sub_f32_e32 v2, v10, v59
	v_fma_f64 v[28:29], 0x40080000, v[28:29], v[14:15]
	v_fma_f64 v[11:12], v[11:12], 4.0, v[48:49]
	v_fma_f64 v[34:35], v[52:53], 4.0, v[34:35]
	v_add_f64 v[7:8], v[8:9], -v[40:41]
	v_fma_f64 v[22:23], v[22:23], v[5:6], v[24:25]
	v_mul_f64 v[9:10], v[5:6], 0.5
	v_cvt_f64_f32_e32 v[24:25], v2
	v_dual_sub_f32 v2, v13, v60 :: v_dual_sub_f32 v13, v16, v61
	v_add_f64 v[28:29], v[28:29], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2)
	v_cvt_f64_f32_e32 v[16:17], v2
	v_add_f64 v[11:12], v[11:12], -v[14:15]
	v_add_f64 v[14:15], v[38:39], -v[46:47]
	v_add_f64 v[34:35], v[34:35], -v[54:55]
	v_fma_f64 v[7:8], v[26:27], v[5:6], v[7:8]
	v_fma_f64 v[22:23], v[22:23], v[5:6], v[30:31]
	v_cvt_f64_f32_e32 v[26:27], v13
	v_fma_f64 v[11:12], v[28:29], v[5:6], v[11:12]
	v_fma_f64 v[13:14], v[14:15], v[5:6], v[34:35]
	v_fma_f64 v[7:8], v[7:8], v[5:6], v[24:25]
	v_fma_f64 v[18:19], v[9:10], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[11:12], v[11:12], v[5:6], v[16:17]
	v_fma_f64 v[5:6], v[13:14], v[5:6], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[7:8], v[9:10], v[7:8], v[20:21]
	v_cvt_f32_f64_e32 v2, v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[11:12], v[9:10], v[11:12], v[32:33]
	v_fma_f64 v[5:6], v[9:10], v[5:6], v[36:37]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_f32_f64_e32 v17, v[7:8]
	v_cvt_f64_f32_e32 v[7:8], v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_f32_f64_e32 v18, v[11:12]
	v_cvt_f32_f64_e32 v13, v[5:6]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_f64_f32_e32 v[5:6], v17
	v_mul_f64 v[9:10], 0x40140000, v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v2, v2, v18
	v_cvt_f64_f32_e32 v[11:12], v18
	v_cvt_f64_f32_e32 v[13:14], v13
	v_fma_f64 v[9:10], v[5:6], 2.0, -v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[15:16], v2
	v_cvt_f32_i32_e32 v2, v4
	v_sub_f32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cvt_f64_f32_e32 v[2:3], v2
	v_fma_f64 v[9:10], v[11:12], 4.0, v[9:10]
	v_fma_f64 v[11:12], 0x40080000, v[15:16], v[13:14]
	v_add_f64 v[9:10], v[9:10], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[11:12], -v[5:6]
	v_sub_f32_e32 v6, v18, v17
	v_cvt_f64_f32_e32 v[11:12], v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[4:5], v[2:3], v[9:10]
	v_mul_f64 v[9:10], v[2:3], 0.5
	v_fma_f64 v[2:3], v[4:5], v[2:3], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[9:10], v[2:3], v[7:8]
	v_cvt_f32_f64_e32 v6, v[2:3]
.LBB66_15:                              ; %Flow215
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB66_17
; %bb.16:                               ; %.critedge.sink.split
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB66_17:                              ; %.critedge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 62
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii,comdat
.Lfunc_end66:
	.size	_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii, .Lfunc_end66-_Z29kernel_cubic_interpolation_2dIfEvPKT_S2_S2_PS0_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1948
; NumSgprs: 18
; NumVgprs: 62
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 7
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 62
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z16kernel_gradientxIfEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientxIfEvPKT_PS0_iii,comdat
	.protected	_Z16kernel_gradientxIfEvPKT_PS0_iii ; -- Begin function _Z16kernel_gradientxIfEvPKT_PS0_iii
	.globl	_Z16kernel_gradientxIfEvPKT_PS0_iii
	.p2align	8
	.type	_Z16kernel_gradientxIfEvPKT_PS0_iii,@function
_Z16kernel_gradientxIfEvPKT_PS0_iii:    ; @_Z16kernel_gradientxIfEvPKT_PS0_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x10
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[5:6], null, s14, s3, v[4:5]
	v_mad_u64_u32 v[1:2], null, s13, s2, v[3:4]
	v_cmp_gt_i32_e64 s2, s5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB67_11
; %bb.1:
	s_load_b32 s2, s[0:1], 0x30
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[6:7], null, s15, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v6
	v_cmp_gt_i32_e64 s2, s6, v6
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB67_11
; %bb.2:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr3_vgpr4
	v_cmpx_ne_u32_e32 0, v1
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB67_8
; %bb.3:
	s_add_i32 s7, s4, -1
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s7, v1
	s_and_saveexec_b32 s7, vcc_lo
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB67_5
; %bb.4:
	v_mul_lo_u32 v7, v5, s4
	s_mul_i32 s8, s5, s4
	v_ashrrev_i32_e32 v0, 31, v1
	v_mul_lo_u32 v6, s8, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v7
	v_add_co_u32 v4, vcc_lo, v1, v7
	v_ashrrev_i32_e32 v3, 31, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v0, vcc_lo, v0, v2, vcc_lo
	v_add_co_u32 v2, vcc_lo, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, v0, v3, vcc_lo
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[2:3], off offset:-4
	global_load_b32 v4, v[2:3], off offset:4
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[2:3], v0
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[4:5], v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], 0.5
	v_fma_f64 v[2:3], v[4:5], 0.5, -v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[2:3]
	v_add3_u32 v3, v7, v1, v6
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr6_vgpr7
                                        ; implicit-def: $vgpr1_vgpr2
	v_ashrrev_i32_e32 v4, 31, v3
.LBB67_5:                               ; %Flow
	s_and_not1_saveexec_b32 s7, s7
	s_cbranch_execz .LBB67_7
; %bb.6:
	s_mul_i32 s8, s5, s4
	v_mul_lo_u32 v0, v5, s4
	v_mul_lo_u32 v2, s8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v0, v1, v2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off offset:-4
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v0, v1, v0
.LBB67_7:                               ; %Flow100
	s_or_b32 exec_lo, exec_lo, s7
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr6_vgpr7
.LBB67_8:                               ; %Flow101
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB67_10
; %bb.9:
	v_mul_lo_u32 v0, v5, s4
	s_mul_i32 s4, s5, s4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[3:4], null, s4, v6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v0, v1, v0
.LBB67_10:                              ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB67_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_gradientxIfEvPKT_PS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_gradientxIfEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientxIfEvPKT_PS0_iii,comdat
.Lfunc_end67:
	.size	_Z16kernel_gradientxIfEvPKT_PS0_iii, .Lfunc_end67-_Z16kernel_gradientxIfEvPKT_PS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 640
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z16kernel_gradientyIfEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientyIfEvPKT_PS0_iii,comdat
	.protected	_Z16kernel_gradientyIfEvPKT_PS0_iii ; -- Begin function _Z16kernel_gradientyIfEvPKT_PS0_iii
	.globl	_Z16kernel_gradientyIfEvPKT_PS0_iii
	.p2align	8
	.type	_Z16kernel_gradientyIfEvPKT_PS0_iii,@function
_Z16kernel_gradientyIfEvPKT_PS0_iii:    ; @_Z16kernel_gradientyIfEvPKT_PS0_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x10
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s13, s2, v[3:4]
	v_mad_u64_u32 v[2:3], null, s14, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	v_cmp_gt_i32_e64 s2, s5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB68_11
; %bb.1:
	s_load_b32 s2, s[0:1], 0x30
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[5:6], null, s15, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
	v_cmp_gt_i32_e64 s2, s6, v5
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB68_11
; %bb.2:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr3_vgpr4
	v_cmpx_ne_u32_e32 0, v2
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB68_8
; %bb.3:
	v_mul_lo_u32 v0, v2, s4
	s_add_i32 s7, s5, -1
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s7, v2
	s_and_saveexec_b32 s7, vcc_lo
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB68_5
; %bb.4:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v6, s4, v0
	s_mul_i32 s8, s5, s4
	v_mad_u64_u32 v[2:3], null, s8, v5, v[1:2]
	s_lshl_b32 s8, s4, 1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_subrev_nc_u32_e32 v1, s8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v2, v1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v1, v[3:4], off
	v_add_nc_u32_e32 v3, v2, v6
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v5, v[3:4], off
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[3:4], v1
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[5:6], v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[3:4], v[3:4], 0.5
	v_fma_f64 v[3:4], v[5:6], 0.5, -v[3:4]
                                        ; implicit-def: $vgpr5_vgpr6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v7, v[3:4]
	v_add_nc_u32_e32 v3, v2, v0
                                        ; implicit-def: $vgpr1_vgpr2
                                        ; implicit-def: $vgpr0
	v_ashrrev_i32_e32 v4, 31, v3
.LBB68_5:                               ; %Flow
	s_and_not1_saveexec_b32 s7, s7
	s_cbranch_execz .LBB68_7
; %bb.6:
	s_mul_i32 s8, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s8, v5, v[1:2]
	v_subrev_nc_u32_e32 v1, s4, v0
	v_add_nc_u32_e32 v3, v2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v2, v1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_clause 0x1
	global_load_b32 v2, v[5:6], off
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v7, v2, v0
.LBB68_7:                               ; %Flow100
	s_or_b32 exec_lo, exec_lo, s7
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr1_vgpr2
.LBB68_8:                               ; %Flow101
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB68_10
; %bb.9:
	s_mul_i32 s5, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, s5, v5
	v_add3_u32 v0, v1, s4, v2
	v_add_nc_u32_e32 v3, v2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[0:1], off
	global_load_b32 v1, v[5:6], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v7, v0, v1
.LBB68_10:                              ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v7, off
.LBB68_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_gradientyIfEvPKT_PS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_gradientyIfEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientyIfEvPKT_PS0_iii,comdat
.Lfunc_end68:
	.size	_Z16kernel_gradientyIfEvPKT_PS0_iii, .Lfunc_end68-_Z16kernel_gradientyIfEvPKT_PS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 748
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z16kernel_gradientzIfEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientzIfEvPKT_PS0_iii,comdat
	.protected	_Z16kernel_gradientzIfEvPKT_PS0_iii ; -- Begin function _Z16kernel_gradientzIfEvPKT_PS0_iii
	.globl	_Z16kernel_gradientzIfEvPKT_PS0_iii
	.p2align	8
	.type	_Z16kernel_gradientzIfEvPKT_PS0_iii,@function
_Z16kernel_gradientzIfEvPKT_PS0_iii:    ; @_Z16kernel_gradientzIfEvPKT_PS0_iii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[4:5], null, s13, s2, v[1:2]
	v_mad_u64_u32 v[5:6], null, s14, s7, v[2:3]
	v_mad_u64_u32 v[6:7], null, s15, s3, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s4, v4
	v_cmp_gt_i32_e64 s2, s5, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s6, v6
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB69_10
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s7, exec_lo
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr0_vgpr1
	v_cmpx_ne_u32_e32 0, v6
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB69_7
; %bb.2:
	s_mul_i32 s8, s5, s4
	v_mad_u64_u32 v[2:3], null, v5, s4, v[4:5]
	v_mul_lo_u32 v4, s8, v6
	s_add_i32 s6, s6, -1
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr0_vgpr1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s6, v6
	s_and_saveexec_b32 s6, vcc_lo
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB69_4
; %bb.3:
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v3, s8, v4
	s_lshl_b32 s9, s8, 1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_subrev_nc_u32_e32 v0, s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v5, v[0:1], off
	v_add_nc_u32_e32 v0, v3, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[0:1], v5
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[5:6], v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[0:1], 0.5
	v_fma_f64 v[0:1], v[5:6], 0.5, -v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v7, v[0:1]
	v_add_nc_u32_e32 v0, v4, v2
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr2_vgpr3
	v_ashrrev_i32_e32 v1, 31, v0
.LBB69_4:                               ; %Flow
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB69_6
; %bb.5:
	v_subrev_nc_u32_e32 v1, s8, v4
	v_add_nc_u32_e32 v0, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v1, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v[4:5], off
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v7, v4, v2
.LBB69_6:                               ; %Flow100
	s_or_b32 exec_lo, exec_lo, s6
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr5_vgpr6
.LBB69_7:                               ; %Flow101
	s_and_not1_saveexec_b32 s6, s7
	s_cbranch_execz .LBB69_9
; %bb.8:
	v_mad_u64_u32 v[0:1], null, v5, s4, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s5, s4, v[0:1]
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v7, v2, v3
.LBB69_9:                               ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v7, off
.LBB69_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_gradientzIfEvPKT_PS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_gradientzIfEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientzIfEvPKT_PS0_iii,comdat
.Lfunc_end69:
	.size	_Z16kernel_gradientzIfEvPKT_PS0_iii, .Lfunc_end69-_Z16kernel_gradientzIfEvPKT_PS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 672
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii,"axG",@progbits,_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii,comdat
	.protected	_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii ; -- Begin function _Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii
	.globl	_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii
	.p2align	8
	.type	_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii,@function
_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii: ; @_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[8:11], s[0:1], 0x18
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	s_mul_i32 s14, s14, s3
	v_mad_u64_u32 v[0:1], null, s15, s2, v[3:4]
	v_add_nc_u32_e32 v1, s14, v2
	s_ashr_i32 s12, s10, 1
	s_ashr_i32 s13, s11, 1
	s_sub_i32 s3, s8, s12
	s_sub_i32 s4, s9, s13
	v_cmp_le_i32_e32 vcc_lo, s12, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_le_i32_e64 s2, s13, v0
	v_cmp_gt_i32_e64 s3, s3, v1
	v_cmp_gt_i32_e64 s4, s4, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB70_9
; %bb.1:                                ; %.preheader55
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s11, 1
	s_cbranch_scc1 .LBB70_7
; %bb.2:                                ; %.preheader.lr.ph
	v_subrev_nc_u32_e32 v3, s13, v0
	v_mov_b32_e32 v4, 0
	s_mov_b32 s3, 0
	s_cmp_gt_i32 s10, 0
	s_mov_b32 s2, s3
	v_mul_lo_u32 v3, s8, v3
	s_cselect_b32 s9, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v2, v2, v3, s14
	s_mov_b32 s14, s3
	v_subrev_nc_u32_e32 v5, s12, v2
.LBB70_3:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB70_5 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_cbranch_vccnz .LBB70_6
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB70_3 Depth=1
	s_lshl_b64 s[12:13], s[2:3], 2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v2, v5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s6, s12
	s_addc_u32 s13, s7, s13
	s_mov_b32 s15, s10
.LBB70_5:                               ;   Parent Loop BB70_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_ashrrev_i32_e32 v3, 31, v2
	s_load_b32 s16, s[12:13], 0x0
	s_add_i32 s15, s15, -1
	s_add_u32 s12, s12, 4
	s_addc_u32 s13, s13, 0
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_add_nc_u32_e32 v2, s8, v2
	s_cmp_eq_u32 s15, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v3, v[6:7], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v4, s16, v3
	s_cbranch_scc0 .LBB70_5
.LBB70_6:                               ; %._crit_edge
                                        ;   in Loop: Header=BB70_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v5, 1, v5
	s_add_i32 s14, s14, 1
	s_add_i32 s2, s2, s10
	s_cmp_eq_u32 s14, s11
	s_cbranch_scc0 .LBB70_3
	s_branch .LBB70_8
.LBB70_7:
	v_mov_b32_e32 v4, 0
.LBB70_8:                               ; %._crit_edge60
	v_mad_u64_u32 v[2:3], null, v0, s8, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB70_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii,"axG",@progbits,_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii,comdat
.Lfunc_end70:
	.size	_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii, .Lfunc_end70-_Z21kernel_convolution_2dIfEvPKT_S2_PS0_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 436
; NumSgprs: 19
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii,"axG",@progbits,_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii,comdat
	.protected	_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii ; -- Begin function _Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii
	.globl	_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii
	.p2align	8
	.type	_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii,@function
_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii: ; @_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x18
	s_load_b64 s[16:17], s[0:1], 0x28
	v_and_b32_e32 v4, 0x3ff, v0
	v_bfe_u32 v5, v0, 10, 10
	v_bfe_u32 v6, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s14, s14, s4
	s_mul_i32 s13, s13, s2
	v_add_nc_u32_e32 v1, s14, v5
	v_add_nc_u32_e32 v0, s13, v4
	s_and_b32 s3, s3, 0xffff
	s_ashr_i32 s18, s11, 1
	s_ashr_i32 s12, s16, 1
	v_mad_u64_u32 v[2:3], null, s15, s3, v[6:7]
	v_cmp_le_i32_e32 vcc_lo, s18, v0
	v_cmp_le_i32_e64 s2, s12, v1
	s_sub_i32 s3, s8, s18
	s_sub_i32 s4, s9, s12
	v_cmp_gt_i32_e64 s3, s3, v0
	s_ashr_i32 s19, s17, 1
	v_cmp_gt_i32_e64 s4, s4, v1
	s_and_b32 s2, vcc_lo, s2
	v_cmp_le_i32_e32 vcc_lo, s19, v2
	s_sub_i32 s5, s10, s19
	s_and_b32 s3, s2, s3
	v_cmp_gt_i32_e64 s2, s5, v2
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB71_11
; %bb.1:                                ; %.preheader92
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s17, 1
	s_cbranch_scc1 .LBB71_9
; %bb.2:                                ; %.preheader91.lr.ph
	v_subrev_nc_u32_e32 v3, s19, v2
	s_cmp_gt_i32 s16, 0
	s_mov_b32 s10, 0
	s_mul_i32 s15, s9, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, s9, v3
	v_add3_u32 v3, v5, v3, s14
	v_mov_b32_e32 v5, 0
	s_mul_i32 s14, s16, s11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v3, s12, v3
	s_cselect_b32 s12, -1, 0
	s_cmp_gt_i32 s11, 0
	v_mul_lo_u32 v3, s8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v4, v3, s13
	s_cselect_b32 s13, -1, 0
	v_subrev_nc_u32_e32 v6, s18, v3
	s_mov_b32 s18, 0
.LBB71_3:                               ; %.preheader91
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB71_5 Depth 2
                                        ;       Child Loop BB71_6 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB71_8
; %bb.4:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB71_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v7, v6
	s_mov_b32 s19, 0
	s_mov_b32 s20, s10
.LBB71_5:                               ; %.preheader
                                        ;   Parent Loop BB71_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB71_6 Depth 3
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v3, v7
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_mov_b32 s2, s20
	s_mov_b32 s21, s11
	s_cbranch_vccnz .LBB71_7
.LBB71_6:                               ;   Parent Loop BB71_3 Depth=1
                                        ;     Parent Loop BB71_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_ashrrev_i32_e32 v4, 31, v3
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[22:23], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s22, s6, s22
	v_lshlrev_b64 v[8:9], 2, v[3:4]
	s_addc_u32 s23, s7, s23
	v_add_nc_u32_e32 v3, 1, v3
	s_load_b32 s3, s[22:23], 0x0
	s_add_i32 s21, s21, -1
	s_add_i32 s2, s2, 1
	v_add_co_u32 v8, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	s_cmp_eq_u32 s21, 0
	global_load_b32 v4, v[8:9], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v5, s3, v4
	s_cbranch_scc0 .LBB71_6
.LBB71_7:                               ; %._crit_edge
                                        ;   in Loop: Header=BB71_5 Depth=2
	v_add_nc_u32_e32 v7, s8, v7
	s_add_i32 s19, s19, 1
	s_add_i32 s20, s20, s11
	s_cmp_eq_u32 s19, s16
	s_cbranch_scc0 .LBB71_5
.LBB71_8:                               ; %._crit_edge97
                                        ;   in Loop: Header=BB71_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v6, s15, v6
	s_add_i32 s18, s18, 1
	s_add_i32 s10, s10, s14
	s_cmp_eq_u32 s18, s17
	s_cbranch_scc0 .LBB71_3
	s_branch .LBB71_10
.LBB71_9:
	v_mov_b32_e32 v5, 0
.LBB71_10:                              ; %._crit_edge101
	v_mad_u64_u32 v[3:4], null, v2, s9, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v3, s8, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v5, off
.LBB71_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii,"axG",@progbits,_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii,comdat
.Lfunc_end71:
	.size	_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii, .Lfunc_end71-_Z21kernel_convolution_3dIfEvPKT_S2_PS0_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 592
; NumSgprs: 26
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z13kernel_assignIdEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIdEvPT_S0_i,comdat
	.protected	_Z13kernel_assignIdEvPT_S0_i ; -- Begin function _Z13kernel_assignIdEvPT_S0_i
	.globl	_Z13kernel_assignIdEvPT_S0_i
	.p2align	8
	.type	_Z13kernel_assignIdEvPT_S0_i,@function
_Z13kernel_assignIdEvPT_S0_i:           ; @_Z13kernel_assignIdEvPT_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB72_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB72_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13kernel_assignIdEvPT_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13kernel_assignIdEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIdEvPT_S0_i,comdat
.Lfunc_end72:
	.size	_Z13kernel_assignIdEvPT_S0_i, .Lfunc_end72-_Z13kernel_assignIdEvPT_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 132
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_copyIdEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIdEvPKT_PS0_i,comdat
	.protected	_Z11kernel_copyIdEvPKT_PS0_i ; -- Begin function _Z11kernel_copyIdEvPKT_PS0_i
	.globl	_Z11kernel_copyIdEvPKT_PS0_i
	.p2align	8
	.type	_Z11kernel_copyIdEvPKT_PS0_i,@function
_Z11kernel_copyIdEvPKT_PS0_i:           ; @_Z11kernel_copyIdEvPKT_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB73_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
.LBB73_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_copyIdEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_copyIdEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIdEvPKT_PS0_i,comdat
.Lfunc_end73:
	.size	_Z11kernel_copyIdEvPKT_PS0_i, .Lfunc_end73-_Z11kernel_copyIdEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_addIdEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_addIdEvPKT_S2_PS0_i,comdat
	.protected	_Z10kernel_addIdEvPKT_S2_PS0_i ; -- Begin function _Z10kernel_addIdEvPKT_S2_PS0_i
	.globl	_Z10kernel_addIdEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z10kernel_addIdEvPKT_S2_PS0_i,@function
_Z10kernel_addIdEvPKT_S2_PS0_i:         ; @_Z10kernel_addIdEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB74_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	global_store_b64 v[0:1], v[2:3], off
.LBB74_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_addIdEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_addIdEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_addIdEvPKT_S2_PS0_i,comdat
.Lfunc_end74:
	.size	_Z10kernel_addIdEvPKT_S2_PS0_i, .Lfunc_end74-_Z10kernel_addIdEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 184
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_subIdEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_subIdEvPKT_S2_PS0_i,comdat
	.protected	_Z10kernel_subIdEvPKT_S2_PS0_i ; -- Begin function _Z10kernel_subIdEvPKT_S2_PS0_i
	.globl	_Z10kernel_subIdEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z10kernel_subIdEvPKT_S2_PS0_i,@function
_Z10kernel_subIdEvPKT_S2_PS0_i:         ; @_Z10kernel_subIdEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB75_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	global_store_b64 v[0:1], v[2:3], off
.LBB75_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_subIdEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_subIdEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_subIdEvPKT_S2_PS0_i,comdat
.Lfunc_end75:
	.size	_Z10kernel_subIdEvPKT_S2_PS0_i, .Lfunc_end75-_Z10kernel_subIdEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 184
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_mulIdEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_mulIdEvPKT_S2_PS0_i,comdat
	.protected	_Z10kernel_mulIdEvPKT_S2_PS0_i ; -- Begin function _Z10kernel_mulIdEvPKT_S2_PS0_i
	.globl	_Z10kernel_mulIdEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z10kernel_mulIdEvPKT_S2_PS0_i,@function
_Z10kernel_mulIdEvPKT_S2_PS0_i:         ; @_Z10kernel_mulIdEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB76_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f64 v[2:3], v[2:3], v[4:5]
	global_store_b64 v[0:1], v[2:3], off
.LBB76_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_mulIdEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_mulIdEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_mulIdEvPKT_S2_PS0_i,comdat
.Lfunc_end76:
	.size	_Z10kernel_mulIdEvPKT_S2_PS0_i, .Lfunc_end76-_Z10kernel_mulIdEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 184
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_divIdEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_divIdEvPKT_S2_PS0_i,comdat
	.protected	_Z10kernel_divIdEvPKT_S2_PS0_i ; -- Begin function _Z10kernel_divIdEvPKT_S2_PS0_i
	.globl	_Z10kernel_divIdEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z10kernel_divIdEvPKT_S2_PS0_i,@function
_Z10kernel_divIdEvPKT_S2_PS0_i:         ; @_Z10kernel_divIdEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB77_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[8:9], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_div_scale_f64 v[10:11], vcc_lo, v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[10:11], v[8:9]
	v_fma_f64 v[6:7], -v[6:7], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[12:13]
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_div_fixup_f64 v[2:3], v[6:7], v[4:5], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
.LBB77_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_divIdEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_divIdEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_divIdEvPKT_S2_PS0_i,comdat
.Lfunc_end77:
	.size	_Z10kernel_divIdEvPKT_S2_PS0_i, .Lfunc_end77-_Z10kernel_divIdEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_powIdEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_powIdEvPKT_S2_PS0_i,comdat
	.protected	_Z10kernel_powIdEvPKT_S2_PS0_i ; -- Begin function _Z10kernel_powIdEvPKT_S2_PS0_i
	.globl	_Z10kernel_powIdEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z10kernel_powIdEvPKT_S2_PS0_i,@function
_Z10kernel_powIdEvPKT_S2_PS0_i:         ; @_Z10kernel_powIdEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB78_2
; %bb.1:
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[4:5], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0x3fe55555
	s_mov_b32 s0, 0x55555555
	s_mov_b32 s2, 0x968915a9
	s_mov_b32 s6, 0x4222de17
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_mov_b32 s3, 0x3fba6564
	s_mov_b32 s7, 0x3fbdee67
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
	global_load_b64 v[4:5], v[2:3], off
	v_add_co_u32 v2, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	v_cmp_neq_f64_e32 vcc_lo, 1.0, v[4:5]
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e32 v3, 0x3ff00000, v3, vcc_lo
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_neq_f64_e32 vcc_lo, 0, v[2:3]
	v_cndmask_b32_e32 v5, 0x3ff00000, v5, vcc_lo
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_frexp_mant_f64_e64 v[6:7], |v[4:5]|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[0:1], v[6:7]
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_ldexp_f64 v[6:7], v[6:7], v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[6:7], 1.0
	v_add_f64 v[14:15], v[6:7], -1.0
	v_rcp_f64_e32 v[10:11], v[8:9]
	v_add_f64 v[16:17], v[8:9], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[14:15], v[10:11]
	v_mul_f64 v[18:19], v[8:9], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[12:13], v[8:9], -v[18:19]
	v_fma_f64 v[6:7], v[12:13], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[18:19], v[6:7]
	v_add_f64 v[16:17], v[14:15], -v[8:9]
	v_add_f64 v[18:19], v[8:9], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	v_add_f64 v[6:7], v[18:19], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[14:15], -v[8:9]
	v_add_f64 v[6:7], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[16:17], v[6:7]
	v_mul_f64 v[6:7], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[12:13], v[6:7]
	v_add_f64 v[10:11], v[8:9], -v[12:13]
	v_mul_f64 v[12:13], v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	v_fma_f64 v[10:11], v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[6:7], v[6:7]
	v_fma_f64 v[10:11], v[8:9], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[12:13], v[10:11]
	v_fma_f64 v[16:17], v[14:15], s[6:7], s[2:3]
	s_mov_b32 s2, 0x3abe935a
	s_mov_b32 s3, 0x3fbe25e4
	v_add_f64 v[12:13], v[14:15], -v[12:13]
	v_mul_f64 v[22:23], v[8:9], v[14:15]
	s_mov_b32 s6, 0x652b82fe
	s_mov_b32 s7, 0x3ff71547
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x47e6c9c2
	s_mov_b32 s3, 0x3fc110ef
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0xcfa74449
	s_mov_b32 s3, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x71bf3c30
	s_mov_b32 s3, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x1c7792ce
	s_mov_b32 s3, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x924920da
	s_mov_b32 s3, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x9999999c
	s_mov_b32 s3, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s3, 0x3c7abc9e
	s_mov_b32 s2, 0x3b39803f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[14:15], v[16:17]
	v_fma_f64 v[12:13], v[14:15], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[16:17], v[12:13]
	v_add_f64 v[16:17], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[20:21], v[16:17], s[0:1]
	v_add_f64 v[18:19], v[16:17], -v[18:19]
	s_mov_b32 s1, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[24:25], v[20:21], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_fma_f64 v[18:19], v[14:15], v[8:9], -v[22:23]
	s_mov_b32 s0, 0xd5df274d
	s_mov_b32 s1, 0x3c8543b0
	v_add_f64 v[16:17], v[16:17], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], s[0:1]
	v_fma_f64 v[14:15], v[14:15], v[6:7], v[18:19]
	s_mov_b32 s1, 0x3fe62e42
	s_mov_b32 s0, 0xfefa39ef
	v_ldexp_f64 v[6:7], v[6:7], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[16:17]
	v_fma_f64 v[10:11], v[10:11], v[8:9], v[14:15]
	v_ldexp_f64 v[8:9], v[8:9], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[20:21], v[12:13]
	v_add_f64 v[16:17], v[22:23], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[20:21], -v[14:15]
	v_mul_f64 v[20:21], v[16:17], v[14:15]
	v_add_f64 v[22:23], v[16:17], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[18:19]
	v_fma_f64 v[18:19], v[16:17], v[14:15], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[22:23]
	v_fma_f64 v[12:13], v[16:17], v[12:13], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[12:13]
	v_frexp_exp_i32_f64_e32 v14, v[4:5]
	v_add_f64 v[12:13], v[20:21], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	v_cvt_f64_i32_e32 v[14:15], v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[8:9], v[12:13]
	v_add_f64 v[18:19], v[12:13], -v[20:21]
	v_mul_f64 v[20:21], v[14:15], s[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[16:17], -v[8:9]
	v_add_f64 v[10:11], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[14:15], s[0:1], -v[20:21]
	s_mov_b32 s1, 0xbfe62e42
	v_add_f64 v[8:9], v[12:13], -v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_fma_f64 v[10:11], v[14:15], s[2:3], v[18:19]
	s_mov_b32 s3, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[20:21], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[16:17], v[6:7]
	v_add_f64 v[20:21], v[8:9], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[8:9], v[12:13]
	v_add_f64 v[16:17], v[12:13], -v[16:17]
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[14:15], -v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[14:15], -v[18:19]
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_add_f64 v[16:17], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[22:23]
	v_add_f64 v[8:9], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[16:17], -v[10:11]
	v_add_f64 v[8:9], v[16:17], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	v_add_f64 v[18:19], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	v_add_f64 v[12:13], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[18:19], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], -v[18:19]
	v_mul_f64 v[12:13], v[2:3], v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[2:3], v[8:9], -v[12:13]
	v_cmp_class_f64_e64 vcc_lo, v[12:13], 0x204
	v_fma_f64 v[6:7], v[2:3], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[12:13], v[6:7]
	v_dual_cndmask_b32 v11, v9, v13 :: v_dual_cndmask_b32 v10, v8, v12
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[10:11], s[6:7]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[10:11]|
	v_add_f64 v[6:7], v[6:7], -v[8:9]
	v_mul_f64 v[8:9], v[2:3], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rndne_f64_e32 v[14:15], v[14:15]
	v_dual_cndmask_b32 v7, 0, v7 :: v_dual_cndmask_b32 v6, 0, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[14:15], s[0:1], v[10:11]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_cvt_i32_f64_e32 v20, v[14:15]
	v_fma_f64 v[16:17], v[14:15], s[2:3], v[16:17]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_neq_f64_e64 s2, v[2:3], |v[2:3]|
	v_cmp_lt_f64_e64 s3, |v[4:5]|, 1.0
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[10:11]
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[16:17], v[18:19], 1.0
	s_and_b32 vcc_lo, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[16:17], v[18:19], 1.0
	v_ldexp_f64 v[12:13], v[14:15], v20
	v_trunc_f64_e32 v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v13, 0x7ff00000, v13, s0
	v_cndmask_b32_e32 v10, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, 0, v13, s1
	v_trunc_f64_e32 v[12:13], v[8:9]
	v_cmp_eq_f64_e64 s1, v[14:15], v[2:3]
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[10:11]
	v_cmp_class_f64_e64 s0, v[10:11], 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_neq_f64_e32 vcc_lo, v[12:13], v[8:9]
	v_cndmask_b32_e64 v7, v7, v11, s0
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v6, v6, v10, s0
	v_and_b32_e32 v10, 0x7fffffff, v3
	s_xor_b32 s0, s2, s3
	v_cmp_gt_f64_e64 s2, 0, v[2:3]
	v_cmp_eq_f64_e64 s3, 0, v[4:5]
	v_cndmask_b32_e64 v8, 0, v6, s1
	v_cndmask_b32_e64 v10, v10, 0, s0
	v_and_b32_e32 v11, 0x7fffffff, v5
	s_and_b32 vcc_lo, s1, vcc_lo
	v_cndmask_b32_e32 v9, 0x3ff00000, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_bfi_b32 v7, 0x7fffffff, v7, v9
	v_cndmask_b32_e64 v9, v2, 0, s0
	v_cmp_eq_f64_e64 s0, |v[4:5]|, 1.0
	s_xor_b32 s2, s2, s3
	v_cndmask_b32_e64 v12, 0x7ff80000, v7, s1
	v_cmp_gt_f64_e64 s1, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v10, v10, v11, s0
	v_cndmask_b32_e64 v9, v9, v4, s0
	v_cmp_class_f64_e64 s0, v[2:3], 0x204
	v_cndmask_b32_e32 v11, 0, v5, vcc_lo
	v_cndmask_b32_e64 v7, v7, v12, s1
	v_cndmask_b32_e64 v6, v6, v8, s1
	v_cmp_class_f64_e64 s1, v[4:5], 0x204
	v_cndmask_b32_e64 v8, 0x7ff00000, 0, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_bfi_b32 v8, 0x7fffffff, v8, v11
	v_cndmask_b32_e64 v6, v6, v9, s0
	v_cndmask_b32_e64 v7, v7, v10, s0
	s_or_b32 vcc_lo, s3, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v7, v8, vcc_lo
	v_cndmask_b32_e64 v6, v6, 0, vcc_lo
	v_cmp_o_f64_e32 vcc_lo, v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v2, 0, v6, vcc_lo
	v_cndmask_b32_e32 v3, 0x7ff80000, v7, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB78_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_powIdEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_powIdEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_powIdEvPKT_S2_PS0_i,comdat
.Lfunc_end78:
	.size	_Z10kernel_powIdEvPKT_S2_PS0_i, .Lfunc_end78-_Z10kernel_powIdEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2388
; NumSgprs: 18
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_add_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_add_scalarIdEvPKT_PS0_S0_i,comdat
	.protected	_Z17kernel_add_scalarIdEvPKT_PS0_S0_i ; -- Begin function _Z17kernel_add_scalarIdEvPKT_PS0_S0_i
	.globl	_Z17kernel_add_scalarIdEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z17kernel_add_scalarIdEvPKT_PS0_S0_i,@function
_Z17kernel_add_scalarIdEvPKT_PS0_S0_i:  ; @_Z17kernel_add_scalarIdEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB79_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], s[0:1]
	global_store_b64 v[0:1], v[2:3], off
.LBB79_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_add_scalarIdEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_add_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_add_scalarIdEvPKT_PS0_S0_i,comdat
.Lfunc_end79:
	.size	_Z17kernel_add_scalarIdEvPKT_PS0_S0_i, .Lfunc_end79-_Z17kernel_add_scalarIdEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_sub_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i,comdat
	.protected	_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i ; -- Begin function _Z17kernel_sub_scalarIdEvPKT_PS0_S0_i
	.globl	_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i,@function
_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i:  ; @_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB80_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], -s[0:1]
	global_store_b64 v[0:1], v[2:3], off
.LBB80_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_sub_scalarIdEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_sub_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i,comdat
.Lfunc_end80:
	.size	_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i, .Lfunc_end80-_Z17kernel_sub_scalarIdEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i,comdat
	.protected	_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i ; -- Begin function _Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i
	.globl	_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i,@function
_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i: ; @_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB81_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], s[0:1], -v[2:3]
	global_store_b64 v[0:1], v[2:3], off
.LBB81_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i,comdat
.Lfunc_end81:
	.size	_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i, .Lfunc_end81-_Z21kernel_sub_scalar_invIdEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_mul_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i,comdat
	.protected	_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i ; -- Begin function _Z17kernel_mul_scalarIdEvPKT_PS0_S0_i
	.globl	_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i,@function
_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i:  ; @_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB82_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[2:3], v[2:3], s[0:1]
	global_store_b64 v[0:1], v[2:3], off
.LBB82_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_mul_scalarIdEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_mul_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i,comdat
.Lfunc_end82:
	.size	_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i, .Lfunc_end82-_Z17kernel_mul_scalarIdEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_div_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_div_scalarIdEvPKT_PS0_S0_i,comdat
	.protected	_Z17kernel_div_scalarIdEvPKT_PS0_S0_i ; -- Begin function _Z17kernel_div_scalarIdEvPKT_PS0_S0_i
	.globl	_Z17kernel_div_scalarIdEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z17kernel_div_scalarIdEvPKT_PS0_S0_i,@function
_Z17kernel_div_scalarIdEvPKT_PS0_S0_i:  ; @_Z17kernel_div_scalarIdEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB83_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[4:5], null, s[0:1], s[0:1], v[2:3]
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_div_scale_f64 v[8:9], vcc_lo, v[2:3], s[0:1], v[2:3]
	v_mul_f64 v[10:11], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[4:5], v[10:11], v[8:9]
	v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[10:11]
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fixup_f64 v[2:3], v[4:5], s[0:1], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
.LBB83_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_div_scalarIdEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_div_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_div_scalarIdEvPKT_PS0_S0_i,comdat
.Lfunc_end83:
	.size	_Z17kernel_div_scalarIdEvPKT_PS0_S0_i, .Lfunc_end83-_Z17kernel_div_scalarIdEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 260
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i,comdat
	.protected	_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i ; -- Begin function _Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i
	.globl	_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i,@function
_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i: ; @_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB84_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[4:5], null, v[2:3], v[2:3], s[0:1]
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_div_scale_f64 v[8:9], vcc_lo, s[0:1], v[2:3], s[0:1]
	v_mul_f64 v[10:11], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[4:5], v[10:11], v[8:9]
	v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[10:11]
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fixup_f64 v[2:3], v[4:5], v[2:3], s[0:1]
	global_store_b64 v[0:1], v[2:3], off
.LBB84_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i,comdat
.Lfunc_end84:
	.size	_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i, .Lfunc_end84-_Z21kernel_div_scalar_invIdEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 260
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_pow_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i,comdat
	.protected	_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i ; -- Begin function _Z17kernel_pow_scalarIdEvPKT_PS0_S0_i
	.globl	_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i,@function
_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i:  ; @_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB85_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b32 s2, 0x968915a9
	s_mov_b32 s3, 0x3fba6564
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	s_mov_b32 s4, 0x4222de17
	s_mov_b32 s5, 0x3fbdee67
	global_load_b64 v[4:5], v[2:3], off
	v_mov_b32_e32 v2, s1
	s_mov_b32 s1, 0x3fe55555
	s_waitcnt vmcnt(0)
	v_cmp_neq_f64_e32 vcc_lo, 1.0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, 0x3ff00000, v2, vcc_lo
	v_cndmask_b32_e64 v2, 0, s0, vcc_lo
	s_mov_b32 s0, 0x55555555
	v_cmp_neq_f64_e32 vcc_lo, 0, v[2:3]
	v_cndmask_b32_e32 v5, 0x3ff00000, v5, vcc_lo
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e64 v[6:7], |v[4:5]|
	v_cmp_gt_f64_e32 vcc_lo, s[0:1], v[6:7]
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[6:7], v[6:7], v8
	v_add_f64 v[8:9], v[6:7], 1.0
	v_add_f64 v[14:15], v[6:7], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[10:11], v[8:9]
	v_add_f64 v[16:17], v[8:9], -1.0
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
	v_mul_f64 v[12:13], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[8:9], v[12:13]
	v_fma_f64 v[8:9], v[12:13], v[8:9], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[12:13], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[18:19], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[14:15], -v[8:9]
	v_add_f64 v[18:19], v[8:9], -v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[18:19], -v[6:7]
	v_add_f64 v[8:9], v[14:15], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[6:7], v[16:17], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[10:11], v[6:7]
	v_add_f64 v[8:9], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], -v[12:13]
	v_mul_f64 v[12:13], v[8:9], v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[8:9], v[8:9], -v[12:13]
	v_add_f64 v[14:15], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[8:9], v[14:15], v[10:11]
	v_add_f64 v[14:15], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[16:17], v[14:15], s[4:5], s[2:3]
	s_mov_b32 s2, 0x3abe935a
	s_mov_b32 s3, 0x3fbe25e4
	v_add_f64 v[12:13], v[14:15], -v[12:13]
	v_mul_f64 v[22:23], v[8:9], v[14:15]
	s_mov_b32 s4, 0x652b82fe
	s_mov_b32 s5, 0x3ff71547
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x47e6c9c2
	s_mov_b32 s3, 0x3fc110ef
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0xcfa74449
	s_mov_b32 s3, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x71bf3c30
	s_mov_b32 s3, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x1c7792ce
	s_mov_b32 s3, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x924920da
	s_mov_b32 s3, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x9999999c
	s_mov_b32 s3, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s3, 0x3c7abc9e
	s_mov_b32 s2, 0x3b39803f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[14:15], v[16:17]
	v_fma_f64 v[12:13], v[14:15], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[16:17], v[12:13]
	v_add_f64 v[16:17], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[20:21], v[16:17], s[0:1]
	v_add_f64 v[18:19], v[16:17], -v[18:19]
	s_mov_b32 s1, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[24:25], v[20:21], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_fma_f64 v[18:19], v[14:15], v[8:9], -v[22:23]
	s_mov_b32 s0, 0xd5df274d
	s_mov_b32 s1, 0x3c8543b0
	v_add_f64 v[16:17], v[16:17], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], s[0:1]
	v_fma_f64 v[14:15], v[14:15], v[6:7], v[18:19]
	s_mov_b32 s1, 0x3fe62e42
	s_mov_b32 s0, 0xfefa39ef
	v_ldexp_f64 v[6:7], v[6:7], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[16:17]
	v_fma_f64 v[10:11], v[10:11], v[8:9], v[14:15]
	v_ldexp_f64 v[8:9], v[8:9], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[20:21], v[12:13]
	v_add_f64 v[16:17], v[22:23], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[20:21], -v[14:15]
	v_mul_f64 v[20:21], v[16:17], v[14:15]
	v_add_f64 v[22:23], v[16:17], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[18:19]
	v_fma_f64 v[18:19], v[16:17], v[14:15], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[22:23]
	v_fma_f64 v[12:13], v[16:17], v[12:13], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[12:13]
	v_frexp_exp_i32_f64_e32 v14, v[4:5]
	v_add_f64 v[12:13], v[20:21], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	v_cvt_f64_i32_e32 v[14:15], v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[8:9], v[12:13]
	v_add_f64 v[18:19], v[12:13], -v[20:21]
	v_mul_f64 v[20:21], v[14:15], s[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[16:17], -v[8:9]
	v_add_f64 v[10:11], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[14:15], s[0:1], -v[20:21]
	s_mov_b32 s1, 0xbfe62e42
	v_add_f64 v[8:9], v[12:13], -v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_fma_f64 v[10:11], v[14:15], s[2:3], v[18:19]
	s_mov_b32 s3, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[20:21], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[16:17], v[6:7]
	v_add_f64 v[20:21], v[8:9], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[8:9], v[12:13]
	v_add_f64 v[16:17], v[12:13], -v[16:17]
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[14:15], -v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[14:15], -v[18:19]
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_add_f64 v[16:17], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[22:23]
	v_add_f64 v[8:9], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[16:17], -v[10:11]
	v_add_f64 v[8:9], v[16:17], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	v_add_f64 v[18:19], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	v_add_f64 v[12:13], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[18:19], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], -v[18:19]
	v_mul_f64 v[12:13], v[2:3], v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[2:3], v[8:9], -v[12:13]
	v_cmp_class_f64_e64 vcc_lo, v[12:13], 0x204
	v_fma_f64 v[6:7], v[2:3], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[12:13], v[6:7]
	v_dual_cndmask_b32 v11, v9, v13 :: v_dual_cndmask_b32 v10, v8, v12
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[10:11], s[4:5]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[10:11]|
	v_add_f64 v[6:7], v[6:7], -v[8:9]
	v_mul_f64 v[8:9], v[2:3], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rndne_f64_e32 v[14:15], v[14:15]
	v_dual_cndmask_b32 v7, 0, v7 :: v_dual_cndmask_b32 v6, 0, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[14:15], s[0:1], v[10:11]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_cvt_i32_f64_e32 v20, v[14:15]
	v_fma_f64 v[16:17], v[14:15], s[2:3], v[16:17]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_neq_f64_e64 s2, v[2:3], |v[2:3]|
	v_cmp_lt_f64_e64 s3, |v[4:5]|, 1.0
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[10:11]
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[16:17], v[18:19], 1.0
	s_and_b32 vcc_lo, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[16:17], v[18:19], 1.0
	v_ldexp_f64 v[12:13], v[14:15], v20
	v_trunc_f64_e32 v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v13, 0x7ff00000, v13, s0
	v_cndmask_b32_e32 v10, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, 0, v13, s1
	v_trunc_f64_e32 v[12:13], v[8:9]
	v_cmp_eq_f64_e64 s1, v[14:15], v[2:3]
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[10:11]
	v_cmp_class_f64_e64 s0, v[10:11], 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_neq_f64_e32 vcc_lo, v[12:13], v[8:9]
	v_cndmask_b32_e64 v7, v7, v11, s0
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v6, v6, v10, s0
	v_and_b32_e32 v10, 0x7fffffff, v3
	s_xor_b32 s0, s2, s3
	v_cmp_gt_f64_e64 s2, 0, v[2:3]
	v_cmp_eq_f64_e64 s3, 0, v[4:5]
	v_cndmask_b32_e64 v8, 0, v6, s1
	v_cndmask_b32_e64 v10, v10, 0, s0
	v_and_b32_e32 v11, 0x7fffffff, v5
	s_and_b32 vcc_lo, s1, vcc_lo
	v_cndmask_b32_e32 v9, 0x3ff00000, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_bfi_b32 v7, 0x7fffffff, v7, v9
	v_cndmask_b32_e64 v9, v2, 0, s0
	v_cmp_eq_f64_e64 s0, |v[4:5]|, 1.0
	s_xor_b32 s2, s2, s3
	v_cndmask_b32_e64 v12, 0x7ff80000, v7, s1
	v_cmp_gt_f64_e64 s1, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v10, v10, v11, s0
	v_cndmask_b32_e64 v9, v9, v4, s0
	v_cmp_class_f64_e64 s0, v[2:3], 0x204
	v_cndmask_b32_e32 v11, 0, v5, vcc_lo
	v_cndmask_b32_e64 v7, v7, v12, s1
	v_cndmask_b32_e64 v6, v6, v8, s1
	v_cmp_class_f64_e64 s1, v[4:5], 0x204
	v_cndmask_b32_e64 v8, 0x7ff00000, 0, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_bfi_b32 v8, 0x7fffffff, v8, v11
	v_cndmask_b32_e64 v6, v6, v9, s0
	v_cndmask_b32_e64 v7, v7, v10, s0
	s_or_b32 vcc_lo, s3, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v7, v8, vcc_lo
	v_cndmask_b32_e64 v6, v6, 0, vcc_lo
	v_cmp_o_f64_e32 vcc_lo, v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v2, 0, v6, vcc_lo
	v_cndmask_b32_e32 v3, 0x7ff80000, v7, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB85_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_pow_scalarIdEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_pow_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i,comdat
.Lfunc_end85:
	.size	_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i, .Lfunc_end85-_Z17kernel_pow_scalarIdEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2376
; NumSgprs: 18
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i,comdat
	.protected	_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i ; -- Begin function _Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i
	.globl	_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i,@function
_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i: ; @_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB86_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b32 s2, 0x968915a9
	s_mov_b32 s3, 0x3fba6564
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_cmp_neq_f64_e64 vcc_lo, s[0:1], 1.0
	v_mov_b32_e32 v4, s1
	s_mov_b32 s1, 0x3fe55555
	global_load_b64 v[2:3], v[2:3], off
	s_mov_b32 s4, 0x4222de17
	s_mov_b32 s5, 0x3fbdee67
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e32 v3, 0x3ff00000, v3, vcc_lo
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cmp_neq_f64_e32 vcc_lo, 0, v[2:3]
	v_cndmask_b32_e32 v5, 0x3ff00000, v4, vcc_lo
	v_cndmask_b32_e64 v4, 0, s0, vcc_lo
	s_mov_b32 s0, 0x55555555
	v_frexp_mant_f64_e64 v[6:7], |v[4:5]|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[0:1], v[6:7]
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_ldexp_f64 v[6:7], v[6:7], v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[6:7], 1.0
	v_add_f64 v[14:15], v[6:7], -1.0
	v_rcp_f64_e32 v[10:11], v[8:9]
	v_add_f64 v[16:17], v[8:9], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[14:15], v[10:11]
	v_mul_f64 v[18:19], v[8:9], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[12:13], v[8:9], -v[18:19]
	v_fma_f64 v[6:7], v[12:13], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[18:19], v[6:7]
	v_add_f64 v[16:17], v[14:15], -v[8:9]
	v_add_f64 v[18:19], v[8:9], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	v_add_f64 v[6:7], v[18:19], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[14:15], -v[8:9]
	v_add_f64 v[6:7], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[16:17], v[6:7]
	v_mul_f64 v[6:7], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[12:13], v[6:7]
	v_add_f64 v[10:11], v[8:9], -v[12:13]
	v_mul_f64 v[12:13], v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	v_fma_f64 v[10:11], v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[6:7], v[6:7]
	v_fma_f64 v[10:11], v[8:9], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[12:13], v[10:11]
	v_fma_f64 v[16:17], v[14:15], s[4:5], s[2:3]
	s_mov_b32 s2, 0x3abe935a
	s_mov_b32 s3, 0x3fbe25e4
	v_add_f64 v[12:13], v[14:15], -v[12:13]
	v_mul_f64 v[22:23], v[8:9], v[14:15]
	s_mov_b32 s4, 0x652b82fe
	s_mov_b32 s5, 0x3ff71547
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x47e6c9c2
	s_mov_b32 s3, 0x3fc110ef
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0xcfa74449
	s_mov_b32 s3, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x71bf3c30
	s_mov_b32 s3, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x1c7792ce
	s_mov_b32 s3, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x924920da
	s_mov_b32 s3, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x9999999c
	s_mov_b32 s3, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s3, 0x3c7abc9e
	s_mov_b32 s2, 0x3b39803f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[14:15], v[16:17]
	v_fma_f64 v[12:13], v[14:15], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[16:17], v[12:13]
	v_add_f64 v[16:17], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[20:21], v[16:17], s[0:1]
	v_add_f64 v[18:19], v[16:17], -v[18:19]
	s_mov_b32 s1, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[24:25], v[20:21], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_fma_f64 v[18:19], v[14:15], v[8:9], -v[22:23]
	s_mov_b32 s0, 0xd5df274d
	s_mov_b32 s1, 0x3c8543b0
	v_add_f64 v[16:17], v[16:17], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], s[0:1]
	v_fma_f64 v[14:15], v[14:15], v[6:7], v[18:19]
	s_mov_b32 s1, 0x3fe62e42
	s_mov_b32 s0, 0xfefa39ef
	v_ldexp_f64 v[6:7], v[6:7], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[16:17]
	v_fma_f64 v[10:11], v[10:11], v[8:9], v[14:15]
	v_ldexp_f64 v[8:9], v[8:9], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[20:21], v[12:13]
	v_add_f64 v[16:17], v[22:23], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[20:21], -v[14:15]
	v_mul_f64 v[20:21], v[16:17], v[14:15]
	v_add_f64 v[22:23], v[16:17], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[18:19]
	v_fma_f64 v[18:19], v[16:17], v[14:15], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[22:23]
	v_fma_f64 v[12:13], v[16:17], v[12:13], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[12:13]
	v_frexp_exp_i32_f64_e32 v14, v[4:5]
	v_add_f64 v[12:13], v[20:21], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	v_cvt_f64_i32_e32 v[14:15], v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[8:9], v[12:13]
	v_add_f64 v[18:19], v[12:13], -v[20:21]
	v_mul_f64 v[20:21], v[14:15], s[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[16:17], -v[8:9]
	v_add_f64 v[10:11], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[14:15], s[0:1], -v[20:21]
	s_mov_b32 s1, 0xbfe62e42
	v_add_f64 v[8:9], v[12:13], -v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_fma_f64 v[10:11], v[14:15], s[2:3], v[18:19]
	s_mov_b32 s3, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[20:21], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[16:17], v[6:7]
	v_add_f64 v[20:21], v[8:9], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[8:9], v[12:13]
	v_add_f64 v[16:17], v[12:13], -v[16:17]
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[14:15], -v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[14:15], -v[18:19]
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_add_f64 v[16:17], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[22:23]
	v_add_f64 v[8:9], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[16:17], -v[10:11]
	v_add_f64 v[8:9], v[16:17], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	v_add_f64 v[18:19], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	v_add_f64 v[12:13], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[18:19], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], -v[18:19]
	v_mul_f64 v[12:13], v[2:3], v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[2:3], v[8:9], -v[12:13]
	v_cmp_class_f64_e64 vcc_lo, v[12:13], 0x204
	v_fma_f64 v[6:7], v[2:3], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[12:13], v[6:7]
	v_dual_cndmask_b32 v11, v9, v13 :: v_dual_cndmask_b32 v10, v8, v12
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[10:11], s[4:5]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[10:11]|
	v_add_f64 v[6:7], v[6:7], -v[8:9]
	v_mul_f64 v[8:9], v[2:3], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rndne_f64_e32 v[14:15], v[14:15]
	v_dual_cndmask_b32 v7, 0, v7 :: v_dual_cndmask_b32 v6, 0, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[14:15], s[0:1], v[10:11]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_cvt_i32_f64_e32 v20, v[14:15]
	v_fma_f64 v[16:17], v[14:15], s[2:3], v[16:17]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_neq_f64_e64 s2, v[2:3], |v[2:3]|
	v_cmp_lt_f64_e64 s3, |v[4:5]|, 1.0
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[10:11]
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[16:17], v[18:19], 1.0
	s_and_b32 vcc_lo, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[16:17], v[18:19], 1.0
	v_ldexp_f64 v[12:13], v[14:15], v20
	v_trunc_f64_e32 v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v13, 0x7ff00000, v13, s0
	v_cndmask_b32_e32 v10, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, 0, v13, s1
	v_trunc_f64_e32 v[12:13], v[8:9]
	v_cmp_eq_f64_e64 s1, v[14:15], v[2:3]
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[10:11]
	v_cmp_class_f64_e64 s0, v[10:11], 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_neq_f64_e32 vcc_lo, v[12:13], v[8:9]
	v_cndmask_b32_e64 v7, v7, v11, s0
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v6, v6, v10, s0
	v_and_b32_e32 v10, 0x7fffffff, v3
	s_xor_b32 s0, s2, s3
	v_cmp_gt_f64_e64 s2, 0, v[2:3]
	v_cmp_eq_f64_e64 s3, 0, v[4:5]
	v_cndmask_b32_e64 v8, 0, v6, s1
	v_cndmask_b32_e64 v10, v10, 0, s0
	v_and_b32_e32 v11, 0x7fffffff, v5
	s_and_b32 vcc_lo, s1, vcc_lo
	v_cndmask_b32_e32 v9, 0x3ff00000, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_bfi_b32 v7, 0x7fffffff, v7, v9
	v_cndmask_b32_e64 v9, v2, 0, s0
	v_cmp_eq_f64_e64 s0, |v[4:5]|, 1.0
	s_xor_b32 s2, s2, s3
	v_cndmask_b32_e64 v12, 0x7ff80000, v7, s1
	v_cmp_gt_f64_e64 s1, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v10, v10, v11, s0
	v_cndmask_b32_e64 v9, v9, v4, s0
	v_cmp_class_f64_e64 s0, v[2:3], 0x204
	v_cndmask_b32_e32 v11, 0, v5, vcc_lo
	v_cndmask_b32_e64 v7, v7, v12, s1
	v_cndmask_b32_e64 v6, v6, v8, s1
	v_cmp_class_f64_e64 s1, v[4:5], 0x204
	v_cndmask_b32_e64 v8, 0x7ff00000, 0, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_bfi_b32 v8, 0x7fffffff, v8, v11
	v_cndmask_b32_e64 v6, v6, v9, s0
	v_cndmask_b32_e64 v7, v7, v10, s0
	s_or_b32 vcc_lo, s3, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v7, v8, vcc_lo
	v_cndmask_b32_e64 v6, v6, 0, vcc_lo
	v_cmp_o_f64_e32 vcc_lo, v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v2, 0, v6, vcc_lo
	v_cndmask_b32_e32 v3, 0x7ff80000, v7, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB86_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i,comdat
.Lfunc_end86:
	.size	_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i, .Lfunc_end86-_Z21kernel_pow_scalar_invIdEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2376
; NumSgprs: 18
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z12kernel_equalIdEvPKT_S2_PS0_i,"axG",@progbits,_Z12kernel_equalIdEvPKT_S2_PS0_i,comdat
	.protected	_Z12kernel_equalIdEvPKT_S2_PS0_i ; -- Begin function _Z12kernel_equalIdEvPKT_S2_PS0_i
	.globl	_Z12kernel_equalIdEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z12kernel_equalIdEvPKT_S2_PS0_i,@function
_Z12kernel_equalIdEvPKT_S2_PS0_i:       ; @_Z12kernel_equalIdEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB87_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, v[2:3], v[4:5]
	v_cndmask_b32_e64 v7, 0, 0x3ff00000, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[6:7], off
.LBB87_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12kernel_equalIdEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z12kernel_equalIdEvPKT_S2_PS0_i,"axG",@progbits,_Z12kernel_equalIdEvPKT_S2_PS0_i,comdat
.Lfunc_end87:
	.size	_Z12kernel_equalIdEvPKT_S2_PS0_i, .Lfunc_end87-_Z12kernel_equalIdEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 196
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z14kernel_greaterIdEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_greaterIdEvPKT_S2_PS0_i,comdat
	.protected	_Z14kernel_greaterIdEvPKT_S2_PS0_i ; -- Begin function _Z14kernel_greaterIdEvPKT_S2_PS0_i
	.globl	_Z14kernel_greaterIdEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z14kernel_greaterIdEvPKT_S2_PS0_i,@function
_Z14kernel_greaterIdEvPKT_S2_PS0_i:     ; @_Z14kernel_greaterIdEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB88_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_f64_e32 vcc_lo, v[2:3], v[4:5]
	v_cndmask_b32_e64 v7, 0, 0x3ff00000, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[6:7], off
.LBB88_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14kernel_greaterIdEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14kernel_greaterIdEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_greaterIdEvPKT_S2_PS0_i,comdat
.Lfunc_end88:
	.size	_Z14kernel_greaterIdEvPKT_S2_PS0_i, .Lfunc_end88-_Z14kernel_greaterIdEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 196
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_lessIdEvPKT_S2_PS0_i,"axG",@progbits,_Z11kernel_lessIdEvPKT_S2_PS0_i,comdat
	.protected	_Z11kernel_lessIdEvPKT_S2_PS0_i ; -- Begin function _Z11kernel_lessIdEvPKT_S2_PS0_i
	.globl	_Z11kernel_lessIdEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z11kernel_lessIdEvPKT_S2_PS0_i,@function
_Z11kernel_lessIdEvPKT_S2_PS0_i:        ; @_Z11kernel_lessIdEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB89_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[2:3], v[4:5]
	v_cndmask_b32_e64 v7, 0, 0x3ff00000, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[6:7], off
.LBB89_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_lessIdEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_lessIdEvPKT_S2_PS0_i,"axG",@progbits,_Z11kernel_lessIdEvPKT_S2_PS0_i,comdat
.Lfunc_end89:
	.size	_Z11kernel_lessIdEvPKT_S2_PS0_i, .Lfunc_end89-_Z11kernel_lessIdEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 196
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z20kernel_greater_equalIdEvPKT_S2_PS0_i,"axG",@progbits,_Z20kernel_greater_equalIdEvPKT_S2_PS0_i,comdat
	.protected	_Z20kernel_greater_equalIdEvPKT_S2_PS0_i ; -- Begin function _Z20kernel_greater_equalIdEvPKT_S2_PS0_i
	.globl	_Z20kernel_greater_equalIdEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z20kernel_greater_equalIdEvPKT_S2_PS0_i,@function
_Z20kernel_greater_equalIdEvPKT_S2_PS0_i: ; @_Z20kernel_greater_equalIdEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB90_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_f64_e32 vcc_lo, v[2:3], v[4:5]
	v_cndmask_b32_e64 v7, 0, 0x3ff00000, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[6:7], off
.LBB90_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20kernel_greater_equalIdEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z20kernel_greater_equalIdEvPKT_S2_PS0_i,"axG",@progbits,_Z20kernel_greater_equalIdEvPKT_S2_PS0_i,comdat
.Lfunc_end90:
	.size	_Z20kernel_greater_equalIdEvPKT_S2_PS0_i, .Lfunc_end90-_Z20kernel_greater_equalIdEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 196
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_less_equalIdEvPKT_S2_PS0_i,"axG",@progbits,_Z17kernel_less_equalIdEvPKT_S2_PS0_i,comdat
	.protected	_Z17kernel_less_equalIdEvPKT_S2_PS0_i ; -- Begin function _Z17kernel_less_equalIdEvPKT_S2_PS0_i
	.globl	_Z17kernel_less_equalIdEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z17kernel_less_equalIdEvPKT_S2_PS0_i,@function
_Z17kernel_less_equalIdEvPKT_S2_PS0_i:  ; @_Z17kernel_less_equalIdEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB91_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_le_f64_e32 vcc_lo, v[2:3], v[4:5]
	v_cndmask_b32_e64 v7, 0, 0x3ff00000, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[6:7], off
.LBB91_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_less_equalIdEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_less_equalIdEvPKT_S2_PS0_i,"axG",@progbits,_Z17kernel_less_equalIdEvPKT_S2_PS0_i,comdat
.Lfunc_end91:
	.size	_Z17kernel_less_equalIdEvPKT_S2_PS0_i, .Lfunc_end91-_Z17kernel_less_equalIdEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 196
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z19kernel_equal_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i,comdat
	.protected	_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i ; -- Begin function _Z19kernel_equal_scalarIdEvPKT_PS0_S0_i
	.globl	_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i,@function
_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i: ; @_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB92_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, s[0:1], v[2:3]
	v_mov_b32_e32 v2, 0
	v_cndmask_b32_e64 v3, 0, 0x3ff00000, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB92_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19kernel_equal_scalarIdEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z19kernel_equal_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i,comdat
.Lfunc_end92:
	.size	_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i, .Lfunc_end92-_Z19kernel_equal_scalarIdEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z21kernel_greater_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i,comdat
	.protected	_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i ; -- Begin function _Z21kernel_greater_scalarIdEvPKT_PS0_S0_i
	.globl	_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i,@function
_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i: ; @_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB93_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, s[0:1], v[2:3]
	v_mov_b32_e32 v2, 0
	v_cndmask_b32_e64 v3, 0, 0x3ff00000, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB93_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_greater_scalarIdEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_greater_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i,comdat
.Lfunc_end93:
	.size	_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i, .Lfunc_end93-_Z21kernel_greater_scalarIdEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z18kernel_less_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z18kernel_less_scalarIdEvPKT_PS0_S0_i,comdat
	.protected	_Z18kernel_less_scalarIdEvPKT_PS0_S0_i ; -- Begin function _Z18kernel_less_scalarIdEvPKT_PS0_S0_i
	.globl	_Z18kernel_less_scalarIdEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z18kernel_less_scalarIdEvPKT_PS0_S0_i,@function
_Z18kernel_less_scalarIdEvPKT_PS0_S0_i: ; @_Z18kernel_less_scalarIdEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB94_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_f64_e32 vcc_lo, s[0:1], v[2:3]
	v_mov_b32_e32 v2, 0
	v_cndmask_b32_e64 v3, 0, 0x3ff00000, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB94_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18kernel_less_scalarIdEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z18kernel_less_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z18kernel_less_scalarIdEvPKT_PS0_S0_i,comdat
.Lfunc_end94:
	.size	_Z18kernel_less_scalarIdEvPKT_PS0_S0_i, .Lfunc_end94-_Z18kernel_less_scalarIdEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i,comdat
	.protected	_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i ; -- Begin function _Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i
	.globl	_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i,@function
_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i: ; @_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB95_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_le_f64_e32 vcc_lo, s[0:1], v[2:3]
	v_mov_b32_e32 v2, 0
	v_cndmask_b32_e64 v3, 0, 0x3ff00000, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB95_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i,comdat
.Lfunc_end95:
	.size	_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i, .Lfunc_end95-_Z27kernel_greater_equal_scalarIdEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i,comdat
	.protected	_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i ; -- Begin function _Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i
	.globl	_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i,@function
_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i: ; @_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB96_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_f64_e32 vcc_lo, s[0:1], v[2:3]
	v_mov_b32_e32 v2, 0
	v_cndmask_b32_e64 v3, 0, 0x3ff00000, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB96_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i,comdat
.Lfunc_end96:
	.size	_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i, .Lfunc_end96-_Z24kernel_less_equal_scalarIdEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z14kernel_replaceIdEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_replaceIdEvPKT_S2_PS0_i,comdat
	.protected	_Z14kernel_replaceIdEvPKT_S2_PS0_i ; -- Begin function _Z14kernel_replaceIdEvPKT_S2_PS0_i
	.globl	_Z14kernel_replaceIdEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z14kernel_replaceIdEvPKT_S2_PS0_i,@function
_Z14kernel_replaceIdEvPKT_S2_PS0_i:     ; @_Z14kernel_replaceIdEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB97_3
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_neq_f64_e32 vcc_lo, 0, v[2:3]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB97_3
; %bb.2:
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	s_load_b64 s[0:1], s[0:1], 0x10
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
.LBB97_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14kernel_replaceIdEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14kernel_replaceIdEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_replaceIdEvPKT_S2_PS0_i,comdat
.Lfunc_end97:
	.size	_Z14kernel_replaceIdEvPKT_S2_PS0_i, .Lfunc_end97-_Z14kernel_replaceIdEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 196
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z21kernel_replace_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i,comdat
	.protected	_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i ; -- Begin function _Z21kernel_replace_scalarIdEvPKT_PS0_S0_i
	.globl	_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i,@function
_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i: ; @_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB98_3
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_neq_f64_e32 vcc_lo, 0, v[2:3]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB98_3
; %bb.2:
	s_load_b64 s[0:1], s[0:1], 0x10
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	global_store_b64 v[0:1], v[2:3], off
.LBB98_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_replace_scalarIdEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_replace_scalarIdEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i,comdat
.Lfunc_end98:
	.size	_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i, .Lfunc_end98-_Z21kernel_replace_scalarIdEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_sumIdEvPKT_PS0_i,"axG",@progbits,_Z10kernel_sumIdEvPKT_PS0_i,comdat
	.protected	_Z10kernel_sumIdEvPKT_PS0_i ; -- Begin function _Z10kernel_sumIdEvPKT_PS0_i
	.globl	_Z10kernel_sumIdEvPKT_PS0_i
	.p2align	8
	.type	_Z10kernel_sumIdEvPKT_PS0_i,@function
_Z10kernel_sumIdEvPKT_PS0_i:            ; @_Z10kernel_sumIdEvPKT_PS0_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x24
	s_load_b32 s8, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_add_u32 s0, s0, 24
	s_mov_b32 s2, s15
	s_addc_u32 s1, s1, 0
	s_mov_b32 s9, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[3:4], null, s2, s3, v[0:1]
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v2, 0
	v_cmpx_gt_u32_e64 s8, v3
	s_cbranch_execz .LBB99_4
; %bb.1:                                ; %.lr.ph
	s_load_b32 s1, s[0:1], 0x0
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v4, 0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s0, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s1, s3
.LBB99_2:                               ; =>This Inner Loop Header: Depth=1
	v_lshlrev_b64 v[5:6], 3, v[3:4]
	v_add_nc_u32_e32 v3, s1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s8, v3
	global_load_b64 v[5:6], v[5:6], off
	s_or_b32 s0, vcc_lo, s0
	s_waitcnt vmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[5:6]
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB99_2
; %bb.3:                                ; %Flow40
	s_or_b32 exec_lo, exec_lo, s0
.LBB99_4:                               ; %Flow41
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
	v_lshlrev_b32_e32 v3, 3, v0
	s_cmp_lt_u32 s3, 2
	ds_store_b64 v3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB99_5:                               ; %._crit_edge
                                        ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB99_9
; %bb.6:                                ; %.lr.ph30
                                        ;   in Loop: Header=BB99_5 Depth=1
	s_lshr_b32 s0, s3, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB99_8
; %bb.7:                                ;   in Loop: Header=BB99_5 Depth=1
	v_lshl_add_u32 v1, s0, 3, v3
	ds_load_b64 v[1:2], v1
	ds_load_b64 v[4:5], v3
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[4:5]
	ds_store_b64 v3, v[1:2]
.LBB99_8:                               ;   in Loop: Header=BB99_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s0
	s_branch .LBB99_5
.LBB99_9:                               ; %._crit_edge31
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB99_11
; %bb.10:
	v_mov_b32_e32 v2, 0
	s_lshl_b64 s[0:1], s[2:3], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	ds_load_b64 v[0:1], v2
	s_waitcnt lgkmcnt(0)
	global_store_b64 v2, v[0:1], s[0:1]
.LBB99_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_sumIdEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_sumIdEvPKT_PS0_i,"axG",@progbits,_Z10kernel_sumIdEvPKT_PS0_i,comdat
.Lfunc_end99:
	.size	_Z10kernel_sumIdEvPKT_PS0_i, .Lfunc_end99-_Z10kernel_sumIdEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 392
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_minIdEvPKT_PS0_i,"axG",@progbits,_Z10kernel_minIdEvPKT_PS0_i,comdat
	.protected	_Z10kernel_minIdEvPKT_PS0_i ; -- Begin function _Z10kernel_minIdEvPKT_PS0_i
	.globl	_Z10kernel_minIdEvPKT_PS0_i
	.p2align	8
	.type	_Z10kernel_minIdEvPKT_PS0_i,@function
_Z10kernel_minIdEvPKT_PS0_i:            ; @_Z10kernel_minIdEvPKT_PS0_i
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s3, s[0:1], 0x24
	s_load_b32 s10, s[0:1], 0x10
	s_add_u32 s0, s0, 24
	s_mov_b32 s2, s15
	s_addc_u32 s1, s1, 0
	s_mov_b32 s11, exec_lo
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[8:9], s[4:5], 0x0
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, s2, s3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v1, s8 :: v_dual_mov_b32 v2, s9
	v_cmpx_gt_u32_e64 s10, v3
	s_cbranch_execz .LBB100_4
; %bb.1:                                ; %.lr.ph
	s_load_b32 s0, s[0:1], 0x0
	v_dual_mov_b32 v1, s8 :: v_dual_mov_b32 v2, s9
	v_mov_b32_e32 v4, 0
	s_mov_b32 s1, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s0, s3
.LBB100_2:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[3:4]
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[1:2], v[5:6]
	v_dual_cndmask_b32 v2, v6, v2 :: v_dual_add_nc_u32 v3, s8, v3
	v_cmp_le_u32_e64 s0, s10, v3
	v_cndmask_b32_e32 v1, v5, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s0, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB100_2
; %bb.3:                                ; %Flow50
	s_or_b32 exec_lo, exec_lo, s1
.LBB100_4:                              ; %Flow51
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s11
	v_lshlrev_b32_e32 v3, 3, v0
	s_cmp_lt_u32 s3, 2
	ds_store_b64 v3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB100_5:                              ; %._crit_edge
                                        ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB100_9
; %bb.6:                                ; %.lr.ph40
                                        ;   in Loop: Header=BB100_5 Depth=1
	s_lshr_b32 s0, s3, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB100_8
; %bb.7:                                ;   in Loop: Header=BB100_5 Depth=1
	v_lshl_add_u32 v4, s0, 3, v3
	ds_load_b64 v[1:2], v3
	ds_load_b64 v[4:5], v4
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[1:2], v[4:5]
	v_dual_cndmask_b32 v2, v5, v2 :: v_dual_cndmask_b32 v1, v4, v1
	ds_store_b64 v3, v[1:2]
.LBB100_8:                              ;   in Loop: Header=BB100_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s0
	s_branch .LBB100_5
.LBB100_9:                              ; %._crit_edge41
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB100_11
; %bb.10:
	v_mov_b32_e32 v2, 0
	s_lshl_b64 s[0:1], s[2:3], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	ds_load_b64 v[0:1], v2
	s_waitcnt lgkmcnt(0)
	global_store_b64 v2, v[0:1], s[0:1]
.LBB100_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_minIdEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_minIdEvPKT_PS0_i,"axG",@progbits,_Z10kernel_minIdEvPKT_PS0_i,comdat
.Lfunc_end100:
	.size	_Z10kernel_minIdEvPKT_PS0_i, .Lfunc_end100-_Z10kernel_minIdEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 420
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_maxIdEvPKT_PS0_i,"axG",@progbits,_Z10kernel_maxIdEvPKT_PS0_i,comdat
	.protected	_Z10kernel_maxIdEvPKT_PS0_i ; -- Begin function _Z10kernel_maxIdEvPKT_PS0_i
	.globl	_Z10kernel_maxIdEvPKT_PS0_i
	.p2align	8
	.type	_Z10kernel_maxIdEvPKT_PS0_i,@function
_Z10kernel_maxIdEvPKT_PS0_i:            ; @_Z10kernel_maxIdEvPKT_PS0_i
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s3, s[0:1], 0x24
	s_load_b32 s10, s[0:1], 0x10
	s_add_u32 s0, s0, 24
	s_mov_b32 s2, s15
	s_addc_u32 s1, s1, 0
	s_mov_b32 s11, exec_lo
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[8:9], s[4:5], 0x0
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, s2, s3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v1, s8 :: v_dual_mov_b32 v2, s9
	v_cmpx_gt_u32_e64 s10, v3
	s_cbranch_execz .LBB101_4
; %bb.1:                                ; %.lr.ph
	s_load_b32 s0, s[0:1], 0x0
	v_dual_mov_b32 v1, s8 :: v_dual_mov_b32 v2, s9
	v_mov_b32_e32 v4, 0
	s_mov_b32 s1, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s0, s3
.LBB101_2:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[3:4]
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_f64_e32 vcc_lo, v[1:2], v[5:6]
	v_dual_cndmask_b32 v2, v6, v2 :: v_dual_add_nc_u32 v3, s8, v3
	v_cmp_le_u32_e64 s0, s10, v3
	v_cndmask_b32_e32 v1, v5, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s0, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB101_2
; %bb.3:                                ; %Flow50
	s_or_b32 exec_lo, exec_lo, s1
.LBB101_4:                              ; %Flow51
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s11
	v_lshlrev_b32_e32 v3, 3, v0
	s_cmp_lt_u32 s3, 2
	ds_store_b64 v3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB101_5:                              ; %._crit_edge
                                        ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB101_9
; %bb.6:                                ; %.lr.ph40
                                        ;   in Loop: Header=BB101_5 Depth=1
	s_lshr_b32 s0, s3, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB101_8
; %bb.7:                                ;   in Loop: Header=BB101_5 Depth=1
	v_lshl_add_u32 v4, s0, 3, v3
	ds_load_b64 v[1:2], v3
	ds_load_b64 v[4:5], v4
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_f64_e32 vcc_lo, v[1:2], v[4:5]
	v_dual_cndmask_b32 v2, v5, v2 :: v_dual_cndmask_b32 v1, v4, v1
	ds_store_b64 v3, v[1:2]
.LBB101_8:                              ;   in Loop: Header=BB101_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s0
	s_branch .LBB101_5
.LBB101_9:                              ; %._crit_edge41
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB101_11
; %bb.10:
	v_mov_b32_e32 v2, 0
	s_lshl_b64 s[0:1], s[2:3], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	ds_load_b64 v[0:1], v2
	s_waitcnt lgkmcnt(0)
	global_store_b64 v2, v[0:1], s[0:1]
.LBB101_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_maxIdEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_maxIdEvPKT_PS0_i,"axG",@progbits,_Z10kernel_maxIdEvPKT_PS0_i,comdat
.Lfunc_end101:
	.size	_Z10kernel_maxIdEvPKT_PS0_i, .Lfunc_end101-_Z10kernel_maxIdEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 420
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z13kernel_pad_2dIdEvPKT_PS0_iiiiii,"axG",@progbits,_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii,comdat
	.protected	_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii ; -- Begin function _Z13kernel_pad_2dIdEvPKT_PS0_iiiiii
	.globl	_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii
	.p2align	8
	.type	_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii,@function
_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii:    ; @_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[4:5], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB102_2
; %bb.1:
	s_load_b256 s[8:15], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	v_add_nc_u32_e32 v1, s13, v1
	s_add_i32 s0, s14, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_i32 s0, s0, s4
	global_load_b64 v[2:3], v[2:3], off
	v_mul_lo_u32 v1, v1, s0
	v_add3_u32 v0, v0, s12, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
.LBB102_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13kernel_pad_2dIdEvPKT_PS0_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13kernel_pad_2dIdEvPKT_PS0_iiiiii,"axG",@progbits,_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii,comdat
.Lfunc_end102:
	.size	_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii, .Lfunc_end102-_Z13kernel_pad_2dIdEvPKT_PS0_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 252
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii,"axG",@progbits,_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii,comdat
	.protected	_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii ; -- Begin function _Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii
	.globl	_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii
	.p2align	8
	.type	_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii,@function
_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii:  ; @_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[4:5], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB103_2
; %bb.1:
	s_load_b256 s[8:15], s[0:1], 0x0
	v_mad_u64_u32 v[4:5], null, v1, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v5, 31, v4
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, s13, v1
	s_add_i32 s0, s14, s12
	s_add_i32 s0, s0, s4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v2, v2, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v2, v0, s12, v2
	v_lshlrev_b64 v[0:1], 3, v[4:5]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_add_co_u32 v2, vcc_lo, s8, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
.LBB103_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii,"axG",@progbits,_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii,comdat
.Lfunc_end103:
	.size	_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii, .Lfunc_end103-_Z15kernel_unpad_2dIdEvPKT_PS0_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 252
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii,comdat
	.protected	_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii ; -- Begin function _Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii
	.globl	_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii
	.p2align	8
	.type	_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii,@function
_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii: ; @_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x44
	s_load_b128 s[4:7], s[0:1], 0x28
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s7, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s6, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB104_2
; %bb.1:
	v_mad_u64_u32 v[3:4], null, v2, s5, v[1:2]
	s_clause 0x1
	s_load_b256 s[8:15], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v3, s4, v[0:1]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[3:4], 3, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, s14, v2
	s_add_i32 s0, s0, s13
	s_add_i32 s0, s0, s5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v2, v2, s0
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	s_add_i32 s0, s15, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_i32 s0, s0, s4
	global_load_b64 v[3:4], v[3:4], off
	v_add3_u32 v1, v1, s13, v2
	v_mul_lo_u32 v1, v1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v0, v0, s12, v1
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[3:4], off
.LBB104_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii,comdat
.Lfunc_end104:
	.size	_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii, .Lfunc_end104-_Z13kernel_pad_3dIdEvPKT_PS0_iiiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 344
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii,comdat
	.protected	_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii ; -- Begin function _Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii
	.globl	_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii
	.p2align	8
	.type	_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii,@function
_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii: ; @_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x44
	s_load_b128 s[4:7], s[0:1], 0x28
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s7, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s6, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB105_2
; %bb.1:
	s_clause 0x1
	s_load_b256 s[8:15], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x20
	v_mad_u64_u32 v[5:6], null, v2, s5, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v3, s14, v2
	s_add_i32 s0, s0, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s0, s0, s5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v3, v3, s0
	s_add_i32 s0, s15, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s0, s0, s4
	v_add3_u32 v3, v1, s13, v3
	v_mad_u64_u32 v[1:2], null, v5, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, s0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v3, v0, s12, v3
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[3:4], off
.LBB105_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii,comdat
.Lfunc_end105:
	.size	_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii, .Lfunc_end105-_Z15kernel_unpad_3dIdEvPKT_PS0_iiiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 344
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z14kernel_grid_2dIdEvPT_S1_Pdii,"axG",@progbits,_Z14kernel_grid_2dIdEvPT_S1_Pdii,comdat
	.protected	_Z14kernel_grid_2dIdEvPT_S1_Pdii ; -- Begin function _Z14kernel_grid_2dIdEvPT_S1_Pdii
	.globl	_Z14kernel_grid_2dIdEvPT_S1_Pdii
	.p2align	8
	.type	_Z14kernel_grid_2dIdEvPT_S1_Pdii,@function
_Z14kernel_grid_2dIdEvPT_S1_Pdii:       ; @_Z14kernel_grid_2dIdEvPT_S1_Pdii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b64 s[20:21], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s20, v0
	v_cmp_gt_i32_e64 s2, s21, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB106_2
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x10
	v_cvt_f64_i32_e32 v[2:3], v0
	v_cvt_f64_i32_e32 v[8:9], v1
	s_waitcnt lgkmcnt(0)
	s_load_b512 s[4:19], s[2:3], 0x0
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], s[12:13], s[4:5]
	v_mul_f64 v[6:7], s[16:17], s[4:5]
	v_mul_f64 v[10:11], s[14:15], s[6:7]
	v_mul_f64 v[12:13], s[18:19], s[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[4:5], v[4:5], v[2:3]
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	v_mad_u64_u32 v[6:7], null, v1, s20, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[0:1], 3, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_fma_f64 v[4:5], v[10:11], v[8:9], v[4:5]
	v_fma_f64 v[2:3], v[12:13], v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], s[8:9], v[4:5]
	v_add_f64 v[2:3], s[10:11], v[2:3]
	global_store_b64 v[6:7], v[4:5], off
	global_store_b64 v[0:1], v[2:3], off
.LBB106_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14kernel_grid_2dIdEvPT_S1_Pdii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14kernel_grid_2dIdEvPT_S1_Pdii,"axG",@progbits,_Z14kernel_grid_2dIdEvPT_S1_Pdii,comdat
.Lfunc_end106:
	.size	_Z14kernel_grid_2dIdEvPT_S1_Pdii, .Lfunc_end106-_Z14kernel_grid_2dIdEvPT_S1_Pdii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 312
; NumSgprs: 24
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii,"axG",@progbits,_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii,comdat
	.protected	_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii ; -- Begin function _Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii
	.globl	_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii
	.p2align	8
	.type	_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii,@function
_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii:   ; @_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x3c
	s_load_b128 s[36:39], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s4, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s36, v0
	v_cmp_gt_i32_e64 s2, s37, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s38, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB107_2
; %bb.1:
	s_load_b256 s[16:23], s[0:1], 0x0
	v_cvt_f64_i32_e32 v[3:4], v0
	v_cvt_f64_i32_e32 v[11:12], v1
	s_waitcnt lgkmcnt(0)
	s_clause 0x2
	s_load_b512 s[0:15], s[22:23], 0x0
	s_load_b256 s[24:31], s[22:23], 0x40
	s_load_b128 s[40:43], s[22:23], 0x60
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[5:6], s[12:13], s[0:1]
	v_mul_f64 v[7:8], s[26:27], s[0:1]
	v_mul_f64 v[9:10], s[40:41], s[0:1]
	v_mul_f64 v[13:14], s[14:15], s[2:3]
	v_mul_f64 v[15:16], s[28:29], s[2:3]
	v_mul_f64 v[17:18], s[42:43], s[2:3]
	v_mul_f64 v[19:20], s[24:25], s[4:5]
	s_load_b64 s[0:1], s[22:23], 0x70
	v_mul_f64 v[21:22], s[30:31], s[4:5]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[23:24], s[0:1], s[4:5]
	v_mul_f64 v[5:6], v[5:6], v[3:4]
	v_mul_f64 v[7:8], v[7:8], v[3:4]
	v_mul_f64 v[3:4], v[9:10], v[3:4]
	v_cvt_f64_i32_e32 v[9:10], v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[5:6], v[13:14], v[11:12], v[5:6]
	v_fma_f64 v[7:8], v[15:16], v[11:12], v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[3:4], v[17:18], v[11:12], v[3:4]
	v_fma_f64 v[5:6], v[19:20], v[9:10], v[5:6]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[7:8], v[21:22], v[9:10], v[7:8]
	v_fma_f64 v[3:4], v[23:24], v[9:10], v[3:4]
	v_mad_u64_u32 v[9:10], null, v2, s37, v[1:2]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[1:2], s[6:7], v[5:6]
	v_add_f64 v[5:6], s[8:9], v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[3:4], s[10:11], v[3:4]
	v_mad_u64_u32 v[7:8], null, v9, s36, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s16, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s17, v8, vcc_lo
	v_add_co_u32 v11, vcc_lo, s18, v7
	v_add_co_ci_u32_e32 v12, vcc_lo, s19, v8, vcc_lo
	v_add_co_u32 v7, vcc_lo, s20, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s21, v8, vcc_lo
	global_store_b64 v[9:10], v[1:2], off
	global_store_b64 v[11:12], v[5:6], off
	global_store_b64 v[7:8], v[3:4], off
.LBB107_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 44
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii,"axG",@progbits,_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii,comdat
.Lfunc_end107:
	.size	_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii, .Lfunc_end107-_Z14kernel_grid_3dIdEvPT_S1_S1_Pdiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 508
; NumSgprs: 46
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 46
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i,"axG",@progbits,_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i,comdat
	.protected	_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i ; -- Begin function _Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i
	.globl	_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i
	.p2align	8
	.type	_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i,@function
_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i: ; @_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b32 s3, s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB108_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[12:13], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v1, vcc_lo
	global_load_b64 v[4:5], v[2:3], off
	s_load_b256 s[0:7], s[12:13], 0x0
	global_load_b64 v[8:9], v[6:7], off
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_mul_f64 v[4:5], s[2:3], v[4:5]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[4:5], s[0:1], v[8:9], v[4:5]
	s_load_b128 s[0:3], s[12:13], 0x20
	v_add_co_u32 v8, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[4:5], s[0:1], v[4:5]
	global_store_b64 v[8:9], v[4:5], off
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[6:7], off
	s_waitcnt vmcnt(1)
	v_mul_f64 v[2:3], s[6:7], v[2:3]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], s[4:5], v[4:5], v[2:3]
	v_add_f64 v[2:3], s[2:3], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
.LBB108_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i,"axG",@progbits,_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i,comdat
.Lfunc_end108:
	.size	_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i, .Lfunc_end108-_Z16kernel_affine_2dIdEvPKT_S2_PS0_S3_S2_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 300
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i,"axG",@progbits,_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i,comdat
	.protected	_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i ; -- Begin function _Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i
	.globl	_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i
	.p2align	8
	.type	_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i,@function
_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i: ; @_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b32 s3, s[0:1], 0x38
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB109_2
; %bb.1:
	s_load_b256 s[12:19], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b256 s[20:27], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s14, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v1, vcc_lo
	global_load_b64 v[4:5], v[2:3], off
	v_add_co_u32 v10, vcc_lo, s16, v0
	global_load_b64 v[8:9], v[6:7], off
	v_add_co_ci_u32_e32 v11, vcc_lo, s17, v1, vcc_lo
	s_clause 0x1
	s_load_b512 s[0:15], s[24:25], 0x0
	s_load_b256 s[24:31], s[24:25], 0x40
	global_load_b64 v[12:13], v[10:11], off
	s_waitcnt vmcnt(2) lgkmcnt(0)
	v_mul_f64 v[4:5], s[2:3], v[4:5]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], s[0:1], v[8:9], v[4:5]
	v_add_co_u32 v8, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s19, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], s[4:5], v[12:13], v[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[4:5], s[26:27], v[4:5]
	global_store_b64 v[8:9], v[4:5], off
	global_load_b64 v[4:5], v[2:3], off
	global_load_b64 v[8:9], v[6:7], off
	global_load_b64 v[12:13], v[10:11], off
	s_waitcnt vmcnt(2)
	v_mul_f64 v[4:5], s[8:9], v[4:5]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[4:5], s[6:7], v[8:9], v[4:5]
	v_add_co_u32 v8, vcc_lo, s20, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s21, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s22, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s23, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], s[10:11], v[12:13], v[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[4:5], s[28:29], v[4:5]
	global_store_b64 v[8:9], v[4:5], off
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[6:7], off
	global_load_b64 v[6:7], v[10:11], off
	s_waitcnt vmcnt(2)
	v_mul_f64 v[2:3], s[14:15], v[2:3]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], s[12:13], v[4:5], v[2:3]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[2:3], s[24:25], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[2:3], s[30:31], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
.LBB109_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i,"axG",@progbits,_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i,comdat
.Lfunc_end109:
	.size	_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i, .Lfunc_end109-_Z16kernel_affine_3dIdEvPKT_S2_S2_PS0_S3_S3_S2_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 456
; NumSgprs: 34
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi,comdat
	.protected	_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi ; -- Begin function _Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi
	.globl	_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi
	.p2align	8
	.type	_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi,@function
_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi: ; @_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b32 s3, s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB110_2
; %bb.1:
	s_load_b256 s[12:19], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s14, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v1, vcc_lo
	global_load_b64 v[4:5], v[2:3], off
	s_load_b512 s[0:15], s[0:1], 0x0
	global_load_b64 v[8:9], v[6:7], off
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[10:11], s[10:11], s[2:3]
	v_mul_f64 v[12:13], s[8:9], s[0:1]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[10:11], v[4:5]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], v[12:13], v[8:9], v[4:5]
	v_add_co_u32 v8, vcc_lo, s16, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s17, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v1, vcc_lo
	v_add_f64 v[4:5], s[4:5], v[4:5]
	global_store_b64 v[8:9], v[4:5], off
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[6:7], off
	v_mul_f64 v[6:7], s[14:15], s[2:3]
	v_mul_f64 v[8:9], s[12:13], s[0:1]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[2:3], v[8:9], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[2:3], s[6:7], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
.LBB110_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi,comdat
.Lfunc_end110:
	.size	_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi, .Lfunc_end110-_Z20kernel_affine_sod_2dIdEvPKT_S2_PS0_S3_PKdi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 328
; NumSgprs: 22
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi,comdat
	.protected	_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi ; -- Begin function _Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi
	.globl	_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi
	.p2align	8
	.type	_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi,@function
_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi: ; @_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b32 s3, s[0:1], 0x38
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB111_2
; %bb.1:
	s_load_b256 s[12:19], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b256 s[20:27], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s14, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v1, vcc_lo
	global_load_b64 v[4:5], v[2:3], off
	v_add_co_u32 v10, vcc_lo, s16, v0
	global_load_b64 v[8:9], v[6:7], off
	v_add_co_ci_u32_e32 v11, vcc_lo, s17, v1, vcc_lo
	s_clause 0x1
	s_load_b512 s[0:15], s[24:25], 0x0
	s_load_b256 s[36:43], s[24:25], 0x40
	global_load_b64 v[12:13], v[10:11], off
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[14:15], s[14:15], s[2:3]
	v_mul_f64 v[16:17], s[12:13], s[0:1]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_f64 v[4:5], v[14:15], v[4:5]
	v_mul_f64 v[14:15], s[36:37], s[4:5]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[4:5], v[16:17], v[8:9], v[4:5]
	v_add_co_u32 v8, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s19, v1, vcc_lo
	v_mul_f64 v[16:17], s[38:39], s[0:1]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[14:15], v[12:13], v[4:5]
	v_mul_f64 v[14:15], s[40:41], s[2:3]
	v_add_f64 v[4:5], s[6:7], v[4:5]
	s_clause 0x1
	s_load_b64 s[6:7], s[24:25], 0x70
	s_load_b128 s[12:15], s[24:25], 0x60
	global_store_b64 v[8:9], v[4:5], off
	global_load_b64 v[4:5], v[2:3], off
	global_load_b64 v[8:9], v[6:7], off
	global_load_b64 v[12:13], v[10:11], off
	s_waitcnt vmcnt(2)
	v_mul_f64 v[4:5], v[14:15], v[4:5]
	v_mul_f64 v[14:15], s[42:43], s[4:5]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[4:5], v[16:17], v[8:9], v[4:5]
	v_add_co_u32 v8, vcc_lo, s20, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s21, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s22, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s23, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], v[14:15], v[12:13], v[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[4:5], s[8:9], v[4:5]
	global_store_b64 v[8:9], v[4:5], off
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[6:7], off
	global_load_b64 v[6:7], v[10:11], off
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[8:9], s[14:15], s[2:3]
	v_mul_f64 v[10:11], s[12:13], s[0:1]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[8:9], v[2:3]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[2:3], v[10:11], v[4:5], v[2:3]
	v_mul_f64 v[4:5], s[6:7], s[4:5]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[4:5], v[6:7], v[2:3]
	v_add_f64 v[2:3], s[10:11], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
.LBB111_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 18
		.amdhsa_next_free_sgpr 44
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi,comdat
.Lfunc_end111:
	.size	_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi, .Lfunc_end111-_Z20kernel_affine_sod_3dIdEvPKT_S2_S2_PS0_S3_S3_PKdi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 556
; NumSgprs: 46
; NumVgprs: 18
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 46
; NumVGPRsForWavesPerEU: 18
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i,"axG",@progbits,_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i,comdat
	.protected	_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i ; -- Begin function _Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i
	.globl	_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i
	.p2align	8
	.type	_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i,@function
_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i: ; @_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b32 s3, s[0:1], 0x30
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB112_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b128 s[0:3], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_add_co_u32 v4, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v8, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b64 v[4:5], v[2:3], off
	global_load_b64 v[2:3], v[6:7], off
	global_load_b64 v[4:5], v[8:9], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	global_store_b64 v[0:1], v[2:3], off
.LBB112_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i,"axG",@progbits,_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i,comdat
.Lfunc_end112:
	.size	_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i, .Lfunc_end112-_Z16kernel_dfield_2dIdEvPKT_S2_S2_S2_PS0_S3_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 256
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,"axG",@progbits,_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,comdat
	.protected	_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i ; -- Begin function _Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.globl	_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.p2align	8
	.type	_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,@function
_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i: ; @_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x5c
	s_load_b32 s3, s[0:1], 0x48
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB113_2
; %bb.1:
	s_load_b512 s[4:19], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_add_co_u32 v4, vcc_lo, s16, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s17, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v8, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v1, vcc_lo
	global_store_b64 v[4:5], v[2:3], off
	global_load_b64 v[2:3], v[6:7], off
	global_load_b64 v[4:5], v[8:9], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_add_co_u32 v4, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s19, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v8, vcc_lo, s14, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s15, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[4:5], v[2:3], off
	global_load_b64 v[2:3], v[6:7], off
	global_load_b64 v[4:5], v[8:9], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	global_store_b64 v[0:1], v[2:3], off
.LBB113_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,"axG",@progbits,_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,comdat
.Lfunc_end113:
	.size	_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, .Lfunc_end113-_Z16kernel_dfield_3dIdEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 328
; NumSgprs: 22
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,comdat
	.protected	_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii ; -- Begin function _Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.globl	_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.p2align	8
	.type	_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,@function
_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii: ; @_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s10, v0
	v_cmp_gt_i32_e64 s2, s11, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB114_4
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_trunc_f64_e32 v[5:6], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[2:3], -v[5:6]
	v_cmp_ge_f64_e64 s0, |v[7:8]|, 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v2, 0, 0x3ff00000, s0
	v_bfi_b32 v4, 0x7fffffff, v2, v3
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[5:6], v[3:4]
	v_cvt_i32_f64_e32 v2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB114_4
; %bb.2:
	v_add_co_u32 v4, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s8, v2
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_trunc_f64_e32 v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[4:5], -v[6:7]
	v_cmp_ge_f64_e64 s0, |v[8:9]|, 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, 0, 0x3ff00000, s0
	v_bfi_b32 v4, 0x7fffffff, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[3:4], v[6:7], v[3:4]
	v_cvt_i32_f64_e32 v3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s0, s9, v3
	v_cmp_lt_i32_e64 s1, -1, v3
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB114_4
; %bb.3:
	v_mad_u64_u32 v[4:5], null, v3, s8, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[2:3], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
.LBB114_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,comdat
.Lfunc_end114:
	.size	_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, .Lfunc_end114-_Z31kernel_nearest_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 480
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.protected	_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii ; -- Begin function _Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.globl	_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.p2align	8
	.type	_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,@function
_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii: ; @_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x4c
	s_load_b128 s[4:7], s[0:1], 0x28
	s_load_b64 s[8:9], s[0:1], 0x38
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s10, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s10, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s7, v0
	v_cmp_gt_i32_e64 s2, s8, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s9, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB115_5
; %bb.1:
	v_mad_u64_u32 v[3:4], null, v2, s8, v[1:2]
	s_load_b128 s[8:11], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v3, s7, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_trunc_f64_e32 v[4:5], v[2:3]
	v_add_f64 v[6:7], v[2:3], -v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f64_e64 s2, |v[6:7]|, 0.5
	v_cndmask_b32_e64 v2, 0, 0x3ff00000, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_bfi_b32 v3, 0x7fffffff, v2, v3
	v_mov_b32_e32 v2, 0
	v_add_f64 v[3:4], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v4, v[3:4]
	v_cmp_lt_i32_e32 vcc_lo, -1, v4
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB115_5
; %bb.2:
	v_add_co_u32 v5, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v1, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s4, v4
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0)
	v_trunc_f64_e32 v[7:8], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[5:6], -v[7:8]
	v_cmp_ge_f64_e64 s2, |v[9:10]|, 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 0, 0x3ff00000, s2
	v_bfi_b32 v3, 0x7fffffff, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[7:8], v[2:3]
	v_cvt_i32_f64_e32 v2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e64 s2, -1, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB115_5
; %bb.3:
	s_min_i32 s2, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB115_5
; %bb.4:
	v_mul_lo_u32 v2, v2, s4
	s_load_b128 s[0:3], s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v2, s5
	v_add3_u32 v2, v2, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
.LBB115_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,comdat
.Lfunc_end115:
	.size	_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, .Lfunc_end115-_Z31kernel_nearest_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 572
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,comdat
	.protected	_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii ; -- Begin function _Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.globl	_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.p2align	8
	.type	_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,@function
_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii: ; @_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s10, v0
	v_cmp_gt_i32_e64 s2, s11, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB116_16
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_floor_f64_e32 v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v6, v[4:5]
	v_cmp_lt_i32_e32 vcc_lo, -1, v6
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB116_16
; %bb.2:
	v_add_co_u32 v4, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s8, v6
	global_load_b64 v[7:8], v[4:5], off
	s_waitcnt vmcnt(0)
	v_floor_f64_e32 v[4:5], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v9, v[4:5]
	v_cmp_gt_i32_e64 s0, s9, v9
	v_cmp_lt_i32_e64 s1, -1, v9
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB116_16
; %bb.3:
	v_cvt_f64_i32_e32 v[4:5], v6
	v_cvt_f64_i32_e32 v[10:11], v9
	s_mov_b32 s2, 0x47ae147b
	s_mov_b32 s3, 0x3f847ae1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[2:3], -v[4:5]
	v_add_f64 v[2:3], v[7:8], -v[10:11]
                                        ; implicit-def: $vgpr7_vgpr8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ngt_f64_e64 s0, s[2:3], v[4:5]
	v_cmp_ngt_f64_e64 s1, s[2:3], v[2:3]
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, s1
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s10, exec_lo, s1
	s_cbranch_execz .LBB116_13
; %bb.4:
	v_cmp_gt_f64_e64 s0, s[2:3], v[2:3]
	s_add_i32 s1, s9, -1
                                        ; implicit-def: $vgpr7_vgpr8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s1, s1, v9
	s_or_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB116_6
; %bb.5:
	v_mad_u64_u32 v[2:3], null, v9, s8, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s0, s4, v2
	v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
	global_load_b128 v[6:9], v[2:3], off
	v_add_f64 v[2:3], -v[4:5], 1.0
	s_waitcnt vmcnt(0)
	v_mul_f64 v[4:5], v[4:5], v[8:9]
                                        ; implicit-def: $vgpr9
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[7:8], v[2:3], v[6:7], v[4:5]
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr4_vgpr5
.LBB116_6:                              ; %Flow141
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB116_12
; %bb.7:
	s_add_i32 s0, s8, -1
	s_xor_b32 s2, vcc_lo, -1
	v_cmp_gt_u32_e64 s0, s0, v6
                                        ; implicit-def: $vgpr7_vgpr8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s2, s0
	s_and_saveexec_b32 s2, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s2
	s_cbranch_execz .LBB116_9
; %bb.8:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[10:11], null, v9, s8, v[6:7]
	v_add_f64 v[14:15], -v[4:5], 1.0
	v_fma_f64 v[16:17], -v[4:5], v[2:3], v[4:5]
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 3, v[10:11]
	v_add_nc_u32_e32 v10, s8, v10
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[10:11], 3, v[10:11]
	global_load_b128 v[6:9], v[6:7], off
	v_add_co_u32 v10, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	global_load_b128 v[10:13], v[10:11], off
	v_add_f64 v[14:15], v[14:15], -v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[4:5], v[2:3], v[14:15]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[8:9], v[16:17], v[8:9]
	v_fma_f64 v[6:7], v[14:15], v[6:7], v[8:9]
	v_fma_f64 v[8:9], -v[4:5], v[2:3], v[2:3]
	v_mul_f64 v[2:3], v[4:5], v[2:3]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[8:9], v[10:11], v[6:7]
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr9
	v_fma_f64 v[7:8], v[2:3], v[12:13], v[4:5]
                                        ; implicit-def: $vgpr2_vgpr3
.LBB116_9:                              ; %Flow
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB116_11
; %bb.10:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[4:5], null, v9, s8, v[6:7]
	v_add_f64 v[8:9], -v[2:3], 1.0
	v_add_nc_u32_e32 v5, s8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b64 v[6:7], v[5:6], off
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(1)
	v_mul_f64 v[2:3], v[2:3], v[6:7]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[7:8], v[8:9], v[4:5], v[2:3]
.LBB116_11:                             ; %Flow140
	s_or_b32 exec_lo, exec_lo, s0
.LBB116_12:                             ; %Flow142
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr9
.LBB116_13:                             ; %Flow143
	s_and_not1_saveexec_b32 s0, s10
	s_cbranch_execz .LBB116_15
; %bb.14:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v9, s8, v[6:7]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_add_co_u32 v2, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b64 v[7:8], v[2:3], off
.LBB116_15:                             ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[7:8], off
.LBB116_16:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 18
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,comdat
.Lfunc_end116:
	.size	_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, .Lfunc_end116-_Z30kernel_linear_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 980
; NumSgprs: 18
; NumVgprs: 18
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 18
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.protected	_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii ; -- Begin function _Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.globl	_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.p2align	8
	.type	_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,@function
_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii: ; @_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x4c
	s_load_b128 s[16:19], s[0:1], 0x28
	s_load_b64 s[4:5], s[0:1], 0x38
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s6, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s6, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s19, v0
	v_cmp_gt_i32_e64 s2, s4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s5, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB117_33
; %bb.1:
	v_mad_u64_u32 v[3:4], null, v2, s4, v[1:2]
	s_load_b256 s[4:11], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v3, s19, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_floor_f64_e32 v[4:5], v[2:3]
	v_cvt_i32_f64_e32 v8, v[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v8
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB117_33
; %bb.2:
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	s_load_b64 s[4:5], s[0:1], 0x20
	v_cmp_gt_i32_e32 vcc_lo, s16, v8
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_floor_f64_e32 v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v11, v[6:7]
	v_cmp_lt_i32_e64 s0, -1, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB117_33
; %bb.3:
	v_add_co_u32 v6, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s17, v11
	global_load_b64 v[6:7], v[6:7], off
	s_waitcnt vmcnt(0)
	v_floor_f64_e32 v[9:10], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v17, v[9:10]
	v_cmp_gt_i32_e64 s0, s18, v17
	v_cmp_lt_i32_e64 s1, -1, v17
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB117_33
; %bb.4:
	v_cvt_f64_i32_e32 v[9:10], v8
	v_cvt_f64_i32_e32 v[12:13], v11
	v_cvt_f64_i32_e32 v[14:15], v17
	s_mov_b32 s2, 0x47ae147b
	s_mov_b32 s3, 0x3f847ae1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], -v[9:10]
	v_add_f64 v[4:5], v[4:5], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], -v[14:15]
                                        ; implicit-def: $vgpr9_vgpr10
	v_cmp_nge_f64_e32 vcc_lo, s[2:3], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_nge_f64_e64 s0, s[2:3], v[4:5]
	v_cmp_nge_f64_e64 s1, s[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s2, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s2, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s2, s2, -1
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB117_6
; %bb.5:
	v_mad_u64_u32 v[2:3], null, v17, s17, v[11:12]
                                        ; implicit-def: $vgpr17
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr6_vgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v2, s16, v[8:9]
                                        ; implicit-def: $vgpr8
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[3:4]
                                        ; implicit-def: $vgpr4_vgpr5
	v_add_co_u32 v2, s2, s10, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s2, s11, v3, s2
	global_load_b64 v[9:10], v[2:3], off
                                        ; implicit-def: $vgpr2_vgpr3
.LBB117_6:                              ; %Flow425
	s_and_not1_saveexec_b32 s6, s3
	s_cbranch_execz .LBB117_32
; %bb.7:
	s_add_i32 s2, s18, -1
	s_add_i32 s3, s17, -1
	v_cmp_le_i32_e64 s2, s2, v17
	v_cmp_le_u32_e64 s3, s3, v11
	s_xor_b32 s1, s1, -1
	s_xor_b32 s0, s0, -1
                                        ; implicit-def: $vgpr9_vgpr10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s1, s1, s2
	s_or_b32 s2, s0, s3
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB117_17
; %bb.8:
                                        ; implicit-def: $vgpr9_vgpr10
	s_and_saveexec_b32 s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s0
	s_cbranch_execz .LBB117_10
; %bb.9:
	s_mul_i32 s0, s17, s16
	v_mul_lo_u32 v4, v11, s16
	v_mul_lo_u32 v5, s0, v17
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add3_u32 v4, v4, v8, v5
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], -v[2:3], 1.0
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_add_co_u32 v4, s0, s10, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s11, v5, s0
	global_load_b128 v[4:7], v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[2:3], v[2:3], v[6:7]
	v_fma_f64 v[9:10], v[8:9], v[4:5], v[2:3]
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr8
.LBB117_10:                             ; %Flow415
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB117_16
; %bb.11:
	s_add_i32 s0, s16, -1
	s_xor_b32 s7, vcc_lo, -1
	v_cmp_le_u32_e64 s0, s0, v8
                                        ; implicit-def: $vgpr9_vgpr10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s7, s0
	s_and_saveexec_b32 s7, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB117_13
; %bb.12:
	s_mul_i32 s0, s17, s16
	v_mul_lo_u32 v2, v11, s16
	v_mul_lo_u32 v3, s0, v17
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add3_u32 v2, v3, v8, v2
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], -v[4:5], 1.0
	v_add_nc_u32_e32 v6, s16, v2
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_add_co_u32 v6, s0, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v7, s0, s11, v7, s0
	v_add_co_u32 v2, s0, s10, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s11, v3, s0
	s_clause 0x1
	global_load_b64 v[6:7], v[6:7], off
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	v_mul_f64 v[4:5], v[4:5], v[6:7]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[9:10], v[8:9], v[2:3], v[4:5]
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr8
.LBB117_13:                             ; %Flow
	s_and_not1_saveexec_b32 s7, s7
	s_cbranch_execz .LBB117_15
; %bb.14:
	s_mul_i32 s0, s17, s16
	v_mul_lo_u32 v11, v11, s16
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[6:7], null, s0, v17, v[8:9]
	v_add_f64 v[15:16], -v[2:3], 1.0
	v_fma_f64 v[17:18], -v[2:3], v[4:5], v[2:3]
	v_add_nc_u32_e32 v14, s16, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v13, 1, v6
	v_add_nc_u32_e32 v9, v6, v11
	v_add_nc_u32_e32 v7, v13, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v10, 31, v9
	v_add_nc_u32_e32 v11, v6, v14
	v_add_nc_u32_e32 v13, v13, v14
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	v_ashrrev_i32_e32 v12, 31, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v14, 31, v13
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[11:12], 3, v[11:12]
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s0, s10, v7
	v_add_co_ci_u32_e64 v8, s0, s11, v8, s0
	v_add_co_u32 v9, s0, s10, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s0, s11, v10, s0
	global_load_b64 v[7:8], v[7:8], off
	v_add_co_u32 v11, s0, s10, v11
	global_load_b64 v[9:10], v[9:10], off
	v_add_co_ci_u32_e64 v12, s0, s11, v12, s0
	v_add_co_u32 v13, s0, s10, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s0, s11, v14, s0
	global_load_b64 v[11:12], v[11:12], off
	v_add_f64 v[15:16], v[15:16], -v[4:5]
	global_load_b64 v[13:14], v[13:14], off
	v_fma_f64 v[15:16], v[2:3], v[4:5], v[15:16]
	s_waitcnt vmcnt(3)
	v_mul_f64 v[6:7], v[17:18], v[7:8]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[15:16], v[9:10], v[6:7]
	v_fma_f64 v[8:9], -v[2:3], v[4:5], v[4:5]
	v_mul_f64 v[2:3], v[2:3], v[4:5]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[4:5], v[8:9], v[11:12], v[6:7]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[9:10], v[2:3], v[13:14], v[4:5]
.LBB117_15:                             ; %Flow414
	s_or_b32 exec_lo, exec_lo, s7
.LBB117_16:                             ; %Flow416
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
                                        ; implicit-def: $vgpr17
                                        ; implicit-def: $vgpr11
.LBB117_17:                             ; %Flow423
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB117_31
; %bb.18:
	s_add_i32 s0, s16, -1
	s_xor_b32 s3, vcc_lo, -1
	v_cmp_le_u32_e64 s0, s0, v8
                                        ; implicit-def: $vgpr9_vgpr10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s3, s0
	s_and_saveexec_b32 s0, s2
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB117_24
; %bb.19:
	v_mul_lo_u32 v4, v11, s16
                                        ; implicit-def: $vgpr9_vgpr10
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB117_21
; %bb.20:
	s_mul_i32 s7, s17, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, s7, v17
                                        ; implicit-def: $vgpr17
	v_add3_u32 v2, v4, v8, v2
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], -v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, s7, v2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_add_co_u32 v3, vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	global_load_b64 v[4:5], v[3:4], off
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	v_mul_f64 v[4:5], v[6:7], v[4:5]
                                        ; implicit-def: $vgpr6_vgpr7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[9:10], v[8:9], v[2:3], v[4:5]
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr8
.LBB117_21:                             ; %Flow417
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB117_23
; %bb.22:
	s_mul_i32 s7, s17, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v5, s7, v17
	v_fma_f64 v[16:17], -v[2:3], v[6:7], v[2:3]
	v_add3_u32 v4, v4, v8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[8:9], 3, v[4:5]
	v_add_nc_u32_e32 v4, s7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_co_u32 v8, vcc_lo, s10, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	global_load_b128 v[8:11], v[8:9], off
	v_add_co_u32 v4, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
	global_load_b128 v[12:15], v[4:5], off
	v_add_f64 v[4:5], -v[2:3], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_fma_f64 v[4:5], v[2:3], v[6:7], v[4:5]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[10:11], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[4:5], v[8:9], v[10:11]
	v_fma_f64 v[8:9], -v[2:3], v[6:7], v[6:7]
	v_mul_f64 v[2:3], v[2:3], v[6:7]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], v[8:9], v[12:13], v[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[9:10], v[2:3], v[14:15], v[4:5]
.LBB117_23:                             ; %Flow418
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr17
.LBB117_24:                             ; %Flow421
	s_and_not1_saveexec_b32 s2, s0
	s_cbranch_execz .LBB117_30
; %bb.25:
	s_mul_i32 s0, s17, s16
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[13:14], null, v11, s16, v[8:9]
	v_mul_lo_u32 v18, s0, v17
	v_add_nc_u32_e32 v14, s16, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, v18, v13
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_add_co_u32 v15, vcc_lo, s10, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v16, vcc_lo, s11, v9, vcc_lo
	v_add_nc_u32_e32 v8, v14, v18
                                        ; implicit-def: $vgpr9_vgpr10
	global_load_b64 v[11:12], v[15:16], off
	s_and_saveexec_b32 s7, s3
	s_xor_b32 s3, exec_lo, s7
	s_cbranch_execz .LBB117_27
; %bb.26:
	v_ashrrev_i32_e32 v9, 31, v8
	v_add_f64 v[15:16], -v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 3, v[8:9]
	v_mad_u64_u32 v[8:9], null, s0, v17, s[0:1]
	v_fma_f64 v[17:18], -v[4:5], v[6:7], v[4:5]
	v_add_co_u32 v2, vcc_lo, s10, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	v_add_nc_u32_e32 v9, v8, v13
	v_add_nc_u32_e32 v13, v8, v14
                                        ; implicit-def: $vgpr8
	global_load_b64 v[2:3], v[2:3], off
	v_ashrrev_i32_e32 v10, 31, v9
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, s10, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v13, vcc_lo, s10, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s11, v14, vcc_lo
	global_load_b64 v[9:10], v[9:10], off
	v_add_f64 v[15:16], v[15:16], -v[6:7]
	global_load_b64 v[13:14], v[13:14], off
	v_fma_f64 v[15:16], v[4:5], v[6:7], v[15:16]
	s_waitcnt vmcnt(2)
	v_mul_f64 v[2:3], v[17:18], v[2:3]
                                        ; implicit-def: $vgpr18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[15:16], v[11:12], v[2:3]
	v_fma_f64 v[11:12], -v[4:5], v[6:7], v[6:7]
	v_mul_f64 v[4:5], v[4:5], v[6:7]
                                        ; implicit-def: $vgpr15_vgpr16
                                        ; implicit-def: $vgpr6_vgpr7
	s_waitcnt vmcnt(1)
	v_fma_f64 v[2:3], v[11:12], v[9:10], v[2:3]
                                        ; implicit-def: $vgpr11_vgpr12
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[9:10], v[4:5], v[13:14], v[2:3]
                                        ; implicit-def: $vgpr13_vgpr14
                                        ; implicit-def: $vgpr14
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr4_vgpr5
.LBB117_27:                             ; %Flow419
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB117_29
; %bb.28:
	v_add_nc_u32_e32 v21, s0, v18
	v_fma_f64 v[27:28], -v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v9, v21, v13
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	v_add_co_u32 v9, vcc_lo, s10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	s_clause 0x1
	global_load_b128 v[17:20], v[9:10], off
	global_load_b64 v[25:26], v[15:16], off offset:8
	v_add_nc_u32_e32 v9, v21, v14
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	v_add_co_u32 v9, vcc_lo, s10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	global_load_b128 v[13:16], v[9:10], off
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s10, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
	global_load_b128 v[21:24], v[8:9], off
	v_add_f64 v[8:9], -v[2:3], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[4:5]
	v_fma_f64 v[8:9], v[2:3], v[4:5], v[8:9]
	s_waitcnt vmcnt(3)
	v_mul_f64 v[19:20], v[27:28], v[19:20]
	s_waitcnt vmcnt(2)
	v_mul_f64 v[25:26], v[27:28], v[25:26]
	v_fma_f64 v[27:28], -v[2:3], v[4:5], v[4:5]
	v_mul_f64 v[2:3], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[17:18], v[8:9], v[17:18], v[19:20]
	v_fma_f64 v[8:9], v[8:9], v[11:12], v[25:26]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[27:28], v[13:14], v[17:18]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[8:9], v[27:28], v[21:22], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[2:3], v[15:16], v[4:5]
	v_fma_f64 v[2:3], v[2:3], v[23:24], v[8:9]
	v_add_f64 v[8:9], -v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[6:7], v[4:5]
	v_fma_f64 v[9:10], v[8:9], v[2:3], v[4:5]
.LBB117_29:                             ; %Flow420
	s_or_b32 exec_lo, exec_lo, s3
.LBB117_30:                             ; %Flow422
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB117_31:                             ; %Flow424
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB117_32:                             ; %.sink.split
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[9:10], off
.LBB117_33:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 29
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,comdat
.Lfunc_end117:
	.size	_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, .Lfunc_end117-_Z30kernel_linear_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2520
; NumSgprs: 22
; NumVgprs: 29
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 29
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,comdat
	.protected	_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii ; -- Begin function _Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.globl	_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
	.p2align	8
	.type	_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,@function
_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii: ; @_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s10, v0
	v_cmp_gt_i32_e64 s2, s11, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB118_17
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s10, v[0:1]
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[4:5], v[2:3], off
	v_add_co_u32 v2, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	s_mov_b32 s2, 0
	s_mov_b32 s3, 0
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	v_floor_f64_e32 v[6:7], v[4:5]
	s_waitcnt vmcnt(0)
	v_floor_f64_e32 v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v6, v[6:7]
	v_cvt_i32_f64_e32 v9, v[8:9]
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e64 s11, 1, v6
	v_cmpx_lt_i32_e32 0, v6
; %bb.2:
	s_add_i32 s0, s8, -2
	s_add_i32 s1, s9, -2
	v_cmp_le_i32_e32 vcc_lo, s0, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e64 s0, s1, v9
	v_cmp_gt_i32_e64 s1, 1, v9
	s_mov_b32 s3, exec_lo
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, s1
	s_and_not1_b32 s1, s11, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s11, s1, s0
; %bb.3:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s10
                                        ; implicit-def: $vgpr7_vgpr8
	s_and_saveexec_b32 s10, s11
	s_cbranch_execz .LBB118_13
; %bb.4:
	s_mov_b32 s0, 0
	s_mov_b32 s11, exec_lo
                                        ; implicit-def: $vgpr7_vgpr8
	v_cmpx_lt_i32_e32 -1, v6
	s_cbranch_execz .LBB118_12
; %bb.5:
	v_cmp_le_i32_e64 s0, s8, v6
	v_cmp_gt_i32_e64 s1, 0, v9
	s_add_i32 s9, s9, -1
	v_cmp_gt_i32_e32 vcc_lo, s8, v6
	v_cmp_le_i32_e64 s2, s9, v9
                                        ; implicit-def: $vgpr7_vgpr8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 s1, s0, s1
	s_mov_b32 s0, 0
	s_or_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s1, exec_lo, s2
	s_cbranch_execz .LBB118_9
; %bb.6:
	v_cmp_eq_u32_e64 s0, s9, v9
                                        ; implicit-def: $vgpr7_vgpr8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s0
	s_mov_b32 s0, 0
	s_and_saveexec_b32 s9, s2
	s_xor_b32 s2, exec_lo, s9
	s_cbranch_execz .LBB118_8
; %bb.7:
	v_mad_u64_u32 v[7:8], null, v9, s8, v[6:7]
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b128 v[10:13], v[7:8], off
	v_cvt_f64_i32_e32 v[7:8], v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[4:5], -v[7:8]
	v_add_f64 v[14:15], -v[7:8], 1.0
	s_waitcnt vmcnt(0)
	v_mul_f64 v[7:8], v[7:8], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[7:8], v[14:15], v[10:11], v[7:8]
.LBB118_8:                              ; %Flow213
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB118_9:                              ; %Flow212
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB118_11
; %bb.10:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[7:8], null, v9, s8, v[6:7]
	v_cvt_f64_i32_e32 v[18:19], v9
	s_or_b32 s0, s0, exec_lo
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 3, v[7:8]
	v_add_nc_u32_e32 v7, s8, v7
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v10, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	global_load_b128 v[10:13], v[10:11], off
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b128 v[14:17], v[7:8], off
	v_cvt_f64_i32_e32 v[7:8], v6
	v_add_f64 v[18:19], v[2:3], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[4:5], -v[7:8]
	v_add_f64 v[20:21], -v[7:8], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], -v[7:8], v[18:19], v[7:8]
	v_add_f64 v[20:21], v[20:21], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[20:21], v[7:8], v[18:19], v[20:21]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[12:13], v[22:23], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[20:21], v[10:11], v[12:13]
	v_fma_f64 v[12:13], -v[7:8], v[18:19], v[18:19]
	v_mul_f64 v[7:8], v[7:8], v[18:19]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[10:11], v[12:13], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[7:8], v[7:8], v[16:17], v[10:11]
.LBB118_11:                             ; %Flow214
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB118_12:                             ; %Flow211
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, s0, exec_lo
	s_and_not1_b32 s3, s3, exec_lo
.LBB118_13:                             ; %Flow210
	s_or_b32 exec_lo, exec_lo, s10
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB118_15
; %bb.14:
	v_mul_lo_u32 v15, v9, s8
	v_add_nc_u32_e32 v10, -1, v9
	v_ashrrev_i32_e32 v39, 31, v6
	v_cvt_f64_i32_e32 v[48:49], v6
	s_or_b32 s2, s2, exec_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v22, v10, s8
	v_add_nc_u32_e32 v7, v15, v6
	v_ashrrev_i32_e32 v17, 31, v15
	v_add_nc_u32_e32 v25, s8, v15
	v_ashrrev_i32_e32 v8, 31, v7
	v_add_nc_u32_e32 v14, v22, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v16, v25, v6
	v_add_nc_u32_e32 v38, s8, v25
	v_ashrrev_i32_e32 v23, 31, v22
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_ashrrev_i32_e32 v33, 31, v25
	v_add_nc_u32_e32 v24, v38, v6
	v_ashrrev_i32_e32 v40, 31, v38
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	v_add_co_u32 v18, vcc_lo, v15, v6
	v_add_co_ci_u32_e32 v19, vcc_lo, v17, v39, vcc_lo
	global_load_b128 v[10:13], v[7:8], off
	v_ashrrev_i32_e32 v15, 31, v14
	v_ashrrev_i32_e32 v17, 31, v16
	v_lshlrev_b64 v[18:19], 3, v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[14:15], 3, v[14:15]
	v_lshlrev_b64 v[16:17], 3, v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v18, vcc_lo, s4, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v26, vcc_lo, s4, v14
	v_add_co_ci_u32_e32 v27, vcc_lo, s5, v15, vcc_lo
	v_add_co_u32 v28, vcc_lo, s4, v16
	v_add_co_ci_u32_e32 v29, vcc_lo, s5, v17, vcc_lo
	s_clause 0x2
	global_load_b128 v[14:17], v[26:27], off
	global_load_b64 v[30:31], v[18:19], off offset:-8
	global_load_b128 v[18:21], v[28:29], off
	v_add_co_u32 v22, vcc_lo, v22, v6
	v_add_co_ci_u32_e32 v23, vcc_lo, v23, v39, vcc_lo
	v_add_co_u32 v32, vcc_lo, v25, v6
	v_ashrrev_i32_e32 v25, 31, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[22:23], 3, v[22:23]
	v_add_co_ci_u32_e32 v33, vcc_lo, v33, v39, vcc_lo
	v_add_f64 v[4:5], v[4:5], -v[48:49]
	v_lshlrev_b64 v[24:25], 3, v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[32:33], 3, v[32:33]
	v_add_co_u32 v34, vcc_lo, s4, v22
	v_add_co_ci_u32_e32 v35, vcc_lo, s5, v23, vcc_lo
	v_add_co_u32 v36, vcc_lo, s4, v24
	v_add_co_ci_u32_e32 v37, vcc_lo, s5, v25, vcc_lo
	v_add_co_u32 v32, vcc_lo, s4, v32
	v_add_co_ci_u32_e32 v33, vcc_lo, s5, v33, vcc_lo
	s_clause 0x3
	global_load_b128 v[22:25], v[36:37], off
	global_load_b64 v[7:8], v[7:8], off offset:16
	global_load_b64 v[34:35], v[34:35], off offset:-8
	global_load_b64 v[32:33], v[32:33], off offset:-8
	v_add_co_u32 v38, vcc_lo, v38, v6
	v_add_co_ci_u32_e32 v39, vcc_lo, v40, v39, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[38:39], 3, v[38:39]
	v_add_co_u32 v38, vcc_lo, s4, v38
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v39, vcc_lo, s5, v39, vcc_lo
	s_clause 0x3
	global_load_b64 v[26:27], v[26:27], off offset:16
	global_load_b64 v[28:29], v[28:29], off offset:16
	global_load_b64 v[38:39], v[38:39], off offset:-8
	global_load_b64 v[36:37], v[36:37], off offset:16
	s_waitcnt vmcnt(11)
	v_mul_f64 v[40:41], 0x40140000, v[10:11]
	v_add_f64 v[42:43], v[10:11], -v[12:13]
	s_waitcnt vmcnt(10)
	v_mul_f64 v[44:45], 0x40140000, v[14:15]
	v_add_f64 v[50:51], v[14:15], -v[16:17]
	s_waitcnt vmcnt(8)
	v_mul_f64 v[46:47], 0x40140000, v[18:19]
	v_add_f64 v[52:53], v[18:19], -v[20:21]
	v_fma_f64 v[40:41], v[30:31], 2.0, -v[40:41]
	s_waitcnt vmcnt(7)
	v_mul_f64 v[54:55], 0x40140000, v[22:23]
	s_waitcnt vmcnt(6)
	v_fma_f64 v[42:43], 0x40080000, v[42:43], v[7:8]
	v_add_f64 v[48:49], v[22:23], -v[24:25]
	s_waitcnt vmcnt(5)
	v_fma_f64 v[44:45], v[34:35], 2.0, -v[44:45]
	s_waitcnt vmcnt(4)
	v_fma_f64 v[46:47], v[32:33], 2.0, -v[46:47]
	s_waitcnt vmcnt(3)
	v_fma_f64 v[50:51], 0x40080000, v[50:51], v[26:27]
	s_waitcnt vmcnt(2)
	v_fma_f64 v[52:53], 0x40080000, v[52:53], v[28:29]
	v_fma_f64 v[40:41], v[12:13], 4.0, v[40:41]
	v_add_f64 v[12:13], v[12:13], -v[30:31]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[54:55], v[38:39], 2.0, -v[54:55]
	v_add_f64 v[42:43], v[42:43], -v[30:31]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[30:31], 0x40080000, v[48:49], v[36:37]
	v_fma_f64 v[44:45], v[16:17], 4.0, v[44:45]
	v_add_f64 v[16:17], v[16:17], -v[34:35]
	v_add_f64 v[48:49], v[52:53], -v[32:33]
	v_add_f64 v[6:7], v[40:41], -v[7:8]
	v_fma_f64 v[40:41], v[20:21], 4.0, v[46:47]
	v_add_f64 v[46:47], v[50:51], -v[34:35]
	v_add_f64 v[20:21], v[20:21], -v[32:33]
	v_cvt_f64_i32_e32 v[8:9], v9
	v_fma_f64 v[50:51], v[24:25], 4.0, v[54:55]
	v_add_f64 v[24:25], v[24:25], -v[38:39]
	v_add_f64 v[30:31], v[30:31], -v[38:39]
	v_add_f64 v[26:27], v[44:45], -v[26:27]
	v_fma_f64 v[6:7], v[4:5], v[42:43], v[6:7]
	v_add_f64 v[28:29], v[40:41], -v[28:29]
	v_mul_f64 v[40:41], v[4:5], 0.5
	v_add_f64 v[2:3], v[2:3], -v[8:9]
	v_add_f64 v[32:33], v[50:51], -v[36:37]
	v_fma_f64 v[26:27], v[4:5], v[46:47], v[26:27]
	v_fma_f64 v[6:7], v[4:5], v[6:7], v[12:13]
	v_fma_f64 v[12:13], v[4:5], v[48:49], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[28:29], v[4:5], v[30:31], v[32:33]
	v_fma_f64 v[16:17], v[4:5], v[26:27], v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[40:41], v[6:7], v[10:11]
	v_fma_f64 v[10:11], v[4:5], v[12:13], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[4:5], v[4:5], v[28:29], v[24:25]
	v_fma_f64 v[12:13], v[40:41], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[14:15], 0x40140000, v[6:7]
	v_fma_f64 v[10:11], v[40:41], v[10:11], v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[40:41], v[4:5], v[22:23]
	v_fma_f64 v[14:15], v[12:13], 2.0, -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[6:7], -v[10:11]
	v_fma_f64 v[14:15], v[10:11], 4.0, v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], 0x40080000, v[16:17], v[4:5]
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	v_add_f64 v[4:5], v[14:15], -v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[16:17], -v[12:13]
	v_fma_f64 v[4:5], v[2:3], v[8:9], v[4:5]
	v_mul_f64 v[8:9], v[2:3], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], v[4:5], v[10:11]
	v_fma_f64 v[7:8], v[8:9], v[2:3], v[6:7]
.LBB118_15:                             ; %Flow215
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB118_17
; %bb.16:                               ; %.critedge.sink.split
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b64 v[0:1], v[7:8], off
.LBB118_17:                             ; %.critedge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 56
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,"axG",@progbits,_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii,comdat
.Lfunc_end118:
	.size	_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii, .Lfunc_end118-_Z29kernel_cubic_interpolation_2dIdEvPKT_S2_S2_PS0_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1904
; NumSgprs: 18
; NumVgprs: 56
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 6
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 56
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,comdat
	.protected	_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii ; -- Begin function _Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.globl	_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
	.p2align	8
	.type	_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,@function
_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii: ; @_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x4c
	s_load_b128 s[16:19], s[0:1], 0x28
	s_load_b64 s[4:5], s[0:1], 0x38
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s6, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s6, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s19, v0
	v_cmp_gt_i32_e64 s2, s4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s5, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB119_23
; %bb.1:
	v_mad_u64_u32 v[3:4], null, v2, s4, v[1:2]
	s_load_b256 s[4:11], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v3, s19, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s8, v0
	global_load_b64 v[2:3], v[2:3], off
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	global_load_b64 v[9:10], v[6:7], off
	s_mov_b32 s4, 0
	s_mov_b32 s5, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(2)
	v_floor_f64_e32 v[6:7], v[2:3]
	s_waitcnt vmcnt(1)
	v_floor_f64_e32 v[11:12], v[4:5]
	s_waitcnt vmcnt(0)
	v_floor_f64_e32 v[13:14], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_i32_f64_e32 v8, v[6:7]
	v_cvt_i32_f64_e32 v11, v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_i32_f64_e32 v34, v[13:14]
	v_cmp_gt_i32_e64 s7, 1, v8
	v_cmpx_lt_i32_e32 0, v8
	s_cbranch_execz .LBB119_5
; %bb.2:
	s_add_i32 s2, s16, -2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v8
	v_cmp_lt_i32_e64 s2, 0, v11
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s8, s2, -1
	s_and_saveexec_b32 s9, s2
; %bb.3:
	s_add_i32 s2, s17, -2
	s_add_i32 s3, s18, -2
	v_cmp_le_i32_e32 vcc_lo, s2, v11
	v_cmp_le_i32_e64 s2, s3, v34
	v_cmp_gt_i32_e64 s3, 1, v34
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s2, s3
	s_and_not1_b32 s3, s8, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s8, s3, s2
; %bb.4:                                ; %Flow762
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s2, s7, exec_lo
	s_and_b32 s3, s8, exec_lo
	s_and_b32 s5, s5, exec_lo
	s_or_b32 s7, s2, s3
.LBB119_5:                              ; %Flow
	s_or_b32 exec_lo, exec_lo, s6
                                        ; implicit-def: $vgpr6_vgpr7
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s6, s7
	s_cbranch_execz .LBB119_19
; %bb.6:
	s_mov_b32 s2, 0
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $vgpr6_vgpr7
	v_cmpx_lt_i32_e32 -1, v8
	s_cbranch_execz .LBB119_18
; %bb.7:
	v_cmp_gt_i32_e32 vcc_lo, s16, v8
	v_cmp_lt_i32_e64 s2, -1, v11
	s_mov_b32 s7, 0
	s_mov_b32 s9, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, vcc_lo, s2
                                        ; implicit-def: $sgpr2
	s_xor_b32 s3, s8, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s12, s3
	s_xor_b32 s3, exec_lo, s12
; %bb.8:                                ; %._crit_edge
	s_mov_b32 s9, exec_lo
	s_add_i32 s2, s18, -1
; %bb.9:                                ; %Flow765
	s_or_saveexec_b32 s12, s3
	v_mov_b32_e32 v12, s2
	s_xor_b32 exec_lo, exec_lo, s12
; %bb.10:
	v_cmp_le_i32_e32 vcc_lo, s17, v11
	v_cmp_gt_i32_e64 s2, 0, v34
	s_add_i32 s13, s18, -1
	s_mov_b32 s7, exec_lo
	v_cmp_le_i32_e64 s3, s13, v34
	v_mov_b32_e32 v12, s13
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s2, s3
	s_and_not1_b32 s3, s9, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s9, s3, s2
; %bb.11:                               ; %Flow766
	s_or_b32 exec_lo, exec_lo, s12
	s_mov_b32 s2, 0
                                        ; implicit-def: $vgpr6_vgpr7
	s_and_saveexec_b32 s3, s9
	s_cbranch_execz .LBB119_15
; %bb.12:
	v_cmp_gt_i32_e32 vcc_lo, s17, v11
	v_cmp_eq_u32_e64 s2, v12, v34
                                        ; implicit-def: $vgpr6_vgpr7
	s_and_b32 s8, s8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, s8, s2
	s_mov_b32 s2, 0
	s_and_saveexec_b32 s9, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s8, exec_lo, s9
	s_cbranch_execz .LBB119_14
; %bb.13:
	s_mul_i32 s9, s17, s16
	v_cvt_f64_i32_e32 v[18:19], v8
	v_mad_u64_u32 v[6:7], null, s9, v34, v[8:9]
	v_mul_lo_u32 v7, v11, s16
	v_cvt_f64_i32_e32 v[20:21], v11
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v16, 1, v6
	v_add_nc_u32_e32 v14, v6, v7
	v_add_nc_u32_e32 v17, s16, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v12, v16, v7
	v_ashrrev_i32_e32 v15, 31, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v6, v6, v17
	v_add_nc_u32_e32 v16, v16, v17
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[14:15], 3, v[14:15]
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v17, 31, v16
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_lshlrev_b64 v[16:17], 3, v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s10, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v13, vcc_lo
	v_add_co_u32 v14, vcc_lo, s10, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s11, v15, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	v_add_co_u32 v6, vcc_lo, s10, v6
	global_load_b64 v[14:15], v[14:15], off
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	v_add_co_u32 v16, vcc_lo, s10, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s11, v17, vcc_lo
	v_add_f64 v[18:19], v[2:3], -v[18:19]
	v_add_f64 v[20:21], v[4:5], -v[20:21]
	s_clause 0x1
	global_load_b64 v[16:17], v[16:17], off
	global_load_b64 v[6:7], v[6:7], off
	v_add_f64 v[22:23], -v[18:19], 1.0
	v_fma_f64 v[24:25], -v[18:19], v[20:21], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[22:23], -v[20:21]
	v_fma_f64 v[22:23], v[18:19], v[20:21], v[22:23]
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[24:25], v[12:13]
	s_waitcnt vmcnt(2)
	v_fma_f64 v[12:13], v[22:23], v[14:15], v[12:13]
	v_fma_f64 v[14:15], -v[18:19], v[20:21], v[20:21]
	v_mul_f64 v[18:19], v[18:19], v[20:21]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[14:15], v[6:7], v[12:13]
	v_fma_f64 v[6:7], v[18:19], v[16:17], v[6:7]
.LBB119_14:                             ; %Flow768
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, s2, exec_lo
	s_and_not1_b32 s7, s7, exec_lo
.LBB119_15:                             ; %Flow767
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB119_17
; %bb.16:
	s_mul_i32 s7, s17, s16
	v_mad_u64_u32 v[6:7], null, v11, s16, v[8:9]
	v_mul_lo_u32 v24, s7, v34
	v_cvt_f64_i32_e32 v[28:29], v11
	s_or_b32 s2, s2, exec_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v25, s16, v6
	v_add_nc_u32_e32 v7, s7, v24
	v_add_nc_u32_e32 v16, v24, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v12, v7, v6
	v_ashrrev_i32_e32 v17, 31, v16
	v_add_nc_u32_e32 v6, v7, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[16:17], 3, v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_add_co_u32 v12, vcc_lo, s10, v12
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v13, vcc_lo
	v_add_co_u32 v16, vcc_lo, s10, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s11, v17, vcc_lo
	global_load_b128 v[12:15], v[12:13], off
	v_add_co_u32 v6, vcc_lo, s10, v6
	global_load_b128 v[16:19], v[16:17], off
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	v_add_f64 v[28:29], v[4:5], -v[28:29]
	global_load_b128 v[20:23], v[6:7], off
	v_add_nc_u32_e32 v6, v25, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	global_load_b128 v[24:27], v[6:7], off
	v_cvt_f64_i32_e32 v[6:7], v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[2:3], -v[6:7]
	v_add_f64 v[30:31], -v[6:7], 1.0
	v_fma_f64 v[32:33], -v[6:7], v[28:29], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[30:31], v[30:31], -v[28:29]
	v_fma_f64 v[30:31], v[6:7], v[28:29], v[30:31]
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_mul_f64 v[14:15], v[32:33], v[14:15]
	s_waitcnt vmcnt(2)
	v_mul_f64 v[18:19], v[32:33], v[18:19]
	v_fma_f64 v[32:33], -v[6:7], v[28:29], v[28:29]
	v_mul_f64 v[6:7], v[6:7], v[28:29]
	v_fma_f64 v[12:13], v[30:31], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[30:31], v[16:17], v[18:19]
	v_cvt_f64_i32_e32 v[16:17], v34
	s_waitcnt vmcnt(1)
	v_fma_f64 v[12:13], v[32:33], v[20:21], v[12:13]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[32:33], v[24:25], v[14:15]
	v_add_f64 v[16:17], v[9:10], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[6:7], v[22:23], v[12:13]
	v_fma_f64 v[6:7], v[6:7], v[26:27], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], -v[16:17], 1.0
	v_mul_f64 v[12:13], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[6:7], v[14:15], v[6:7], v[12:13]
.LBB119_17:                             ; %Flow769
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, s2, exec_lo
.LBB119_18:                             ; %Flow764
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s4, s2, exec_lo
	s_and_not1_b32 s5, s5, exec_lo
.LBB119_19:                             ; %Flow763
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s2, s5
	s_cbranch_execz .LBB119_21
; %bb.20:
	v_cvt_f64_i32_e32 v[6:7], v8
	s_mul_i32 s3, s17, s16
	v_ashrrev_i32_e32 v26, 31, v8
	v_mul_lo_u32 v63, s3, v34
	s_or_b32 s4, s4, exec_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[2:3], -v[6:7]
	v_cvt_f64_i32_e32 v[2:3], v11
	v_add_f64 v[4:5], v[4:5], -v[2:3]
	v_cvt_f64_i32_e32 v[2:3], v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[9:10], -v[2:3]
	v_add_nc_u32_e32 v9, -1, v11
	v_mul_lo_u32 v11, v11, s16
	v_mul_lo_u32 v12, v9, s16
	v_add_nc_u32_e32 v9, -1, v34
	v_add_nc_u32_e32 v34, 2, v34
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v38, v11, v8
	v_mul_lo_u32 v24, s3, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v34, s3, v34
	v_ashrrev_i32_e32 v9, 31, v12
	v_add_co_u32 v10, vcc_lo, v12, v8
	v_add_nc_u32_e32 v37, v12, v8
	v_add_co_ci_u32_e32 v13, vcc_lo, v9, v26, vcc_lo
	v_ashrrev_i32_e32 v25, 31, v24
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v24, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, v25, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	v_add_co_u32 v9, vcc_lo, s10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	global_load_b64 v[28:29], v[9:10], off offset:-8
	v_add_nc_u32_e32 v9, v24, v37
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	v_add_co_u32 v9, vcc_lo, s10, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	s_clause 0x1
	global_load_b64 v[30:31], v[9:10], off offset:16
	global_load_b128 v[12:15], v[9:10], off
	v_ashrrev_i32_e32 v9, 31, v11
	v_add_co_u32 v10, vcc_lo, v11, v8
	v_add_nc_u32_e32 v11, s16, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v16, vcc_lo, v9, v26, vcc_lo
	v_add_co_u32 v9, vcc_lo, v24, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v36, v11, v8
	v_add_co_ci_u32_e32 v10, vcc_lo, v25, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	v_add_co_u32 v9, vcc_lo, s10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	global_load_b64 v[32:33], v[9:10], off offset:-8
	v_add_nc_u32_e32 v9, v24, v38
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	v_add_co_u32 v9, vcc_lo, s10, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	s_clause 0x1
	global_load_b64 v[39:40], v[9:10], off offset:16
	global_load_b128 v[16:19], v[9:10], off
	v_ashrrev_i32_e32 v9, 31, v11
	v_add_co_u32 v10, vcc_lo, v11, v8
	v_add_nc_u32_e32 v11, s16, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v20, vcc_lo, v9, v26, vcc_lo
	v_add_co_u32 v9, vcc_lo, v24, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v35, v11, v8
	v_add_co_ci_u32_e32 v10, vcc_lo, v25, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	v_add_co_u32 v9, vcc_lo, s10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	global_load_b64 v[41:42], v[9:10], off offset:-8
	v_add_nc_u32_e32 v9, v24, v36
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	v_add_co_u32 v9, vcc_lo, s10, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	s_clause 0x1
	global_load_b64 v[43:44], v[9:10], off offset:16
	global_load_b128 v[20:23], v[9:10], off
	v_ashrrev_i32_e32 v9, 31, v11
	v_add_co_u32 v10, vcc_lo, v11, v8
	v_add_nc_u32_e32 v8, v24, v35
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v26, vcc_lo, v9, v26, vcc_lo
	v_add_co_u32 v9, vcc_lo, v24, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, v25, v26, vcc_lo
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s10, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	global_load_b64 v[45:46], v[9:10], off offset:-8
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_add_co_u32 v8, vcc_lo, s10, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
	s_clause 0x1
	global_load_b64 v[47:48], v[8:9], off offset:16
	global_load_b128 v[24:27], v[8:9], off
	v_mul_f64 v[8:9], v[6:7], 0.5
	s_waitcnt vmcnt(9)
	v_mul_f64 v[49:50], 0x40140000, v[12:13]
	v_add_f64 v[10:11], v[14:15], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[28:29], 2.0, -v[49:50]
	v_fma_f64 v[49:50], v[14:15], 4.0, v[49:50]
	v_add_f64 v[14:15], v[12:13], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], -v[30:31]
	v_fma_f64 v[14:15], 0x40080000, v[14:15], v[30:31]
	v_ashrrev_i32_e32 v31, 31, v63
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[14:15], -v[28:29]
	v_fma_f64 v[14:15], v[6:7], v[14:15], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[6:7], v[14:15], v[10:11]
	s_waitcnt vmcnt(6)
	v_mul_f64 v[14:15], 0x40140000, v[16:17]
	v_fma_f64 v[10:11], v[8:9], v[10:11], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[32:33], 2.0, -v[14:15]
	v_add_f64 v[12:13], v[18:19], -v[32:33]
	v_fma_f64 v[14:15], v[18:19], 4.0, v[14:15]
	v_add_f64 v[18:19], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], -v[39:40]
	v_fma_f64 v[18:19], 0x40080000, v[18:19], v[39:40]
	v_ashrrev_i32_e32 v40, 31, v36
	v_ashrrev_i32_e32 v39, 31, v35
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], -v[32:33]
	v_fma_f64 v[14:15], v[6:7], v[18:19], v[14:15]
	s_waitcnt vmcnt(3)
	v_add_f64 v[18:19], v[20:21], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[6:7], v[14:15], v[12:13]
	v_fma_f64 v[18:19], 0x40080000, v[18:19], v[43:44]
	v_add_f64 v[14:15], v[22:23], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[12:13], v[8:9], v[12:13], v[16:17]
	v_mul_f64 v[16:17], 0x40140000, v[20:21]
	v_add_f64 v[18:19], v[18:19], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[41:42], 2.0, -v[16:17]
	v_ashrrev_i32_e32 v41, 31, v37
	v_ashrrev_i32_e32 v42, 31, v38
	v_fma_f64 v[16:17], v[22:23], 4.0, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], -v[43:44]
	v_fma_f64 v[16:17], v[6:7], v[18:19], v[16:17]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[18:19], 0x40140000, v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[6:7], v[16:17], v[14:15]
	v_fma_f64 v[18:19], v[45:46], 2.0, -v[18:19]
	v_add_f64 v[16:17], v[26:27], -v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[14:15], v[8:9], v[14:15], v[20:21]
	v_add_f64 v[20:21], v[24:25], -v[26:27]
	v_fma_f64 v[18:19], v[26:27], 4.0, v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], 0x40080000, v[20:21], v[47:48]
	v_add_f64 v[18:19], v[18:19], -v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[20:21], -v[45:46]
	v_fma_f64 v[18:19], v[6:7], v[20:21], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[6:7], v[18:19], v[16:17]
	v_add_co_u32 v18, vcc_lo, v37, v63
	v_add_co_ci_u32_e32 v19, vcc_lo, v41, v31, vcc_lo
	v_lshlrev_b64 v[18:19], 3, v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, s10, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v19, vcc_lo
	global_load_b64 v[43:44], v[18:19], off offset:-8
	v_add_nc_u32_e32 v18, v37, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v19, 31, v18
	v_lshlrev_b64 v[18:19], 3, v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, s10, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v19, vcc_lo
	s_clause 0x1
	global_load_b64 v[45:46], v[18:19], off offset:16
	global_load_b128 v[18:21], v[18:19], off
	v_add_co_u32 v22, vcc_lo, v63, v38
	v_add_co_ci_u32_e32 v23, vcc_lo, v31, v42, vcc_lo
	v_fma_f64 v[16:17], v[8:9], v[16:17], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], 3, v[22:23]
	v_add_co_u32 v22, vcc_lo, s10, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v23, vcc_lo, s11, v23, vcc_lo
	global_load_b64 v[47:48], v[22:23], off offset:-8
	v_add_nc_u32_e32 v22, v63, v38
	v_ashrrev_i32_e32 v23, 31, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], 3, v[22:23]
	v_add_co_u32 v22, vcc_lo, s10, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, s11, v23, vcc_lo
	s_clause 0x1
	global_load_b64 v[49:50], v[22:23], off offset:16
	global_load_b128 v[22:25], v[22:23], off
	v_add_co_u32 v26, vcc_lo, v36, v63
	v_add_co_ci_u32_e32 v27, vcc_lo, v40, v31, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[26:27], 3, v[26:27]
	v_add_co_u32 v26, vcc_lo, s10, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v27, vcc_lo, s11, v27, vcc_lo
	global_load_b64 v[51:52], v[26:27], off offset:-8
	v_add_nc_u32_e32 v26, v36, v63
	v_ashrrev_i32_e32 v27, 31, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[26:27], 3, v[26:27]
	v_add_co_u32 v26, vcc_lo, s10, v26
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v27, vcc_lo, s11, v27, vcc_lo
	s_clause 0x1
	global_load_b64 v[53:54], v[26:27], off offset:16
	global_load_b128 v[26:29], v[26:27], off
	v_add_co_u32 v30, vcc_lo, v35, v63
	v_add_co_ci_u32_e32 v31, vcc_lo, v39, v31, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[30:31], 3, v[30:31]
	v_add_co_u32 v30, vcc_lo, s10, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v31, vcc_lo, s11, v31, vcc_lo
	global_load_b64 v[55:56], v[30:31], off offset:-8
	v_add_nc_u32_e32 v30, v35, v63
	v_ashrrev_i32_e32 v31, 31, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[30:31], 3, v[30:31]
	v_add_co_u32 v30, vcc_lo, s10, v30
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v31, vcc_lo, s11, v31, vcc_lo
	s_clause 0x1
	global_load_b64 v[57:58], v[30:31], off offset:16
	global_load_b128 v[30:33], v[30:31], off
	s_waitcnt vmcnt(9)
	v_mul_f64 v[61:62], 0x40140000, v[18:19]
	v_add_f64 v[59:60], v[20:21], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[61:62], v[43:44], 2.0, -v[61:62]
	v_fma_f64 v[61:62], v[20:21], 4.0, v[61:62]
	v_add_f64 v[20:21], v[18:19], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[61:62], v[61:62], -v[45:46]
	v_fma_f64 v[20:21], 0x40080000, v[20:21], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], -v[43:44]
	s_waitcnt vmcnt(6)
	v_mul_f64 v[43:44], 0x40140000, v[22:23]
	v_fma_f64 v[20:21], v[6:7], v[20:21], v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[43:44], v[47:48], 2.0, -v[43:44]
	v_fma_f64 v[20:21], v[6:7], v[20:21], v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[43:44], v[24:25], 4.0, v[43:44]
	v_fma_f64 v[18:19], v[8:9], v[20:21], v[18:19]
	v_add_f64 v[20:21], v[24:25], -v[47:48]
	v_add_f64 v[24:25], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[43:44], -v[49:50]
	v_fma_f64 v[24:25], 0x40080000, v[24:25], v[49:50]
	v_add_nc_u32_e32 v49, s3, v63
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[24:25], -v[47:48]
	v_ashrrev_i32_e32 v48, 31, v49
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], v[6:7], v[24:25], v[43:44]
	v_fma_f64 v[20:21], v[6:7], v[24:25], v[20:21]
	s_waitcnt vmcnt(3)
	v_mul_f64 v[24:25], 0x40140000, v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[8:9], v[20:21], v[22:23]
	v_fma_f64 v[24:25], v[51:52], 2.0, -v[24:25]
	v_add_f64 v[22:23], v[28:29], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[28:29], 4.0, v[24:25]
	v_add_f64 v[28:29], v[26:27], -v[28:29]
	v_add_f64 v[24:25], v[24:25], -v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[28:29], 0x40080000, v[28:29], v[53:54]
	v_add_f64 v[28:29], v[28:29], -v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[6:7], v[28:29], v[24:25]
	s_waitcnt vmcnt(0)
	v_add_f64 v[28:29], v[30:31], -v[32:33]
	v_fma_f64 v[22:23], v[6:7], v[24:25], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[28:29], 0x40080000, v[28:29], v[57:58]
	v_add_f64 v[24:25], v[32:33], -v[55:56]
	v_fma_f64 v[22:23], v[8:9], v[22:23], v[26:27]
	v_mul_f64 v[26:27], 0x40140000, v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[28:29], -v[55:56]
	v_fma_f64 v[26:27], v[55:56], 2.0, -v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[26:27], v[32:33], 4.0, v[26:27]
	v_add_f64 v[26:27], v[26:27], -v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[26:27], v[6:7], v[28:29], v[26:27]
	v_fma_f64 v[24:25], v[6:7], v[26:27], v[24:25]
	v_add_co_u32 v26, vcc_lo, v49, v37
	v_add_co_ci_u32_e32 v27, vcc_lo, v48, v41, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[26:27], 3, v[26:27]
	v_add_co_u32 v26, vcc_lo, s10, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v27, vcc_lo, s11, v27, vcc_lo
	global_load_b64 v[51:52], v[26:27], off offset:-8
	v_add_nc_u32_e32 v26, v49, v37
	v_ashrrev_i32_e32 v27, 31, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[26:27], 3, v[26:27]
	v_add_co_u32 v26, vcc_lo, s10, v26
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v27, vcc_lo, s11, v27, vcc_lo
	s_clause 0x1
	global_load_b64 v[53:54], v[26:27], off offset:16
	global_load_b128 v[26:29], v[26:27], off
	v_fma_f64 v[24:25], v[8:9], v[24:25], v[30:31]
	v_add_co_u32 v30, vcc_lo, v49, v38
	v_add_co_ci_u32_e32 v31, vcc_lo, v48, v42, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[30:31], 3, v[30:31]
	v_add_co_u32 v30, vcc_lo, s10, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v31, vcc_lo, s11, v31, vcc_lo
	global_load_b64 v[55:56], v[30:31], off offset:-8
	v_add_nc_u32_e32 v30, v49, v38
	v_ashrrev_i32_e32 v31, 31, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[30:31], 3, v[30:31]
	v_add_co_u32 v30, vcc_lo, s10, v30
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v31, vcc_lo, s11, v31, vcc_lo
	s_clause 0x1
	global_load_b64 v[57:58], v[30:31], off offset:16
	global_load_b128 v[30:33], v[30:31], off
	v_add_co_u32 v43, vcc_lo, v49, v36
	v_add_co_ci_u32_e32 v44, vcc_lo, v48, v40, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[43:44], 3, v[43:44]
	v_add_co_u32 v43, vcc_lo, s10, v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v44, vcc_lo, s11, v44, vcc_lo
	global_load_b64 v[59:60], v[43:44], off offset:-8
	v_add_nc_u32_e32 v43, v49, v36
	v_ashrrev_i32_e32 v44, 31, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[43:44], 3, v[43:44]
	v_add_co_u32 v43, vcc_lo, s10, v43
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v44, vcc_lo, s11, v44, vcc_lo
	s_clause 0x1
	global_load_b64 v[61:62], v[43:44], off offset:16
	global_load_b128 v[43:46], v[43:44], off
	v_add_co_u32 v47, vcc_lo, v49, v35
	v_add_co_ci_u32_e32 v48, vcc_lo, v48, v39, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[47:48], 3, v[47:48]
	v_add_co_u32 v47, vcc_lo, s10, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v48, vcc_lo, s11, v48, vcc_lo
	global_load_b64 v[63:64], v[47:48], off offset:-8
	v_add_nc_u32_e32 v47, v49, v35
	v_ashrrev_i32_e32 v48, 31, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[47:48], 3, v[47:48]
	v_add_co_u32 v47, vcc_lo, s10, v47
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v48, vcc_lo, s11, v48, vcc_lo
	s_clause 0x1
	global_load_b64 v[65:66], v[47:48], off offset:16
	global_load_b128 v[47:50], v[47:48], off
	s_waitcnt vmcnt(9)
	v_mul_f64 v[69:70], 0x40140000, v[26:27]
	v_add_f64 v[67:68], v[28:29], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[51:52], 2.0, -v[69:70]
	v_fma_f64 v[69:70], v[28:29], 4.0, v[69:70]
	v_add_f64 v[28:29], v[26:27], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[69:70], -v[53:54]
	v_fma_f64 v[28:29], 0x40080000, v[28:29], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[28:29], -v[51:52]
	s_waitcnt vmcnt(6)
	v_mul_f64 v[51:52], 0x40140000, v[30:31]
	v_fma_f64 v[28:29], v[6:7], v[28:29], v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[51:52], v[55:56], 2.0, -v[51:52]
	v_fma_f64 v[28:29], v[6:7], v[28:29], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[51:52], v[32:33], 4.0, v[51:52]
	v_fma_f64 v[26:27], v[8:9], v[28:29], v[26:27]
	v_add_f64 v[28:29], v[32:33], -v[55:56]
	v_add_f64 v[32:33], v[30:31], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], -v[57:58]
	v_fma_f64 v[32:33], 0x40080000, v[32:33], v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[32:33], v[32:33], -v[55:56]
	v_fma_f64 v[32:33], v[6:7], v[32:33], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[28:29], v[6:7], v[32:33], v[28:29]
	s_waitcnt vmcnt(3)
	v_mul_f64 v[32:33], 0x40140000, v[43:44]
	v_fma_f64 v[28:29], v[8:9], v[28:29], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[59:60], 2.0, -v[32:33]
	v_add_f64 v[30:31], v[45:46], -v[59:60]
	v_fma_f64 v[32:33], v[45:46], 4.0, v[32:33]
	v_add_f64 v[45:46], v[43:44], -v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[32:33], -v[61:62]
	v_fma_f64 v[45:46], 0x40080000, v[45:46], v[61:62]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], -v[59:60]
	v_fma_f64 v[32:33], v[6:7], v[45:46], v[32:33]
	s_waitcnt vmcnt(0)
	v_add_f64 v[45:46], v[47:48], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[6:7], v[32:33], v[30:31]
	v_fma_f64 v[45:46], 0x40080000, v[45:46], v[65:66]
	v_add_f64 v[32:33], v[49:50], -v[63:64]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[30:31], v[8:9], v[30:31], v[43:44]
	v_mul_f64 v[43:44], 0x40140000, v[47:48]
	v_add_f64 v[45:46], v[45:46], -v[63:64]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], v[63:64], 2.0, -v[43:44]
	v_fma_f64 v[43:44], v[49:50], 4.0, v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[43:44], -v[65:66]
	v_ashrrev_i32_e32 v65, 31, v34
	v_fma_f64 v[43:44], v[6:7], v[45:46], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[32:33], v[6:7], v[43:44], v[32:33]
	v_add_co_u32 v43, vcc_lo, v34, v37
	v_add_co_ci_u32_e32 v44, vcc_lo, v65, v41, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[43:44], 3, v[43:44]
	v_add_co_u32 v43, vcc_lo, s10, v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v44, vcc_lo, s11, v44, vcc_lo
	global_load_b64 v[55:56], v[43:44], off offset:-8
	v_add_nc_u32_e32 v43, v34, v37
	v_add_nc_u32_e32 v37, v34, v38
	v_ashrrev_i32_e32 v44, 31, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[43:44], 3, v[43:44]
	v_add_co_u32 v43, vcc_lo, s10, v43
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v44, vcc_lo, s11, v44, vcc_lo
	s_clause 0x1
	global_load_b64 v[57:58], v[43:44], off offset:16
	global_load_b128 v[43:46], v[43:44], off
	v_add_co_u32 v41, vcc_lo, v34, v38
	v_add_co_ci_u32_e32 v42, vcc_lo, v65, v42, vcc_lo
	v_ashrrev_i32_e32 v38, 31, v37
	v_fma_f64 v[32:33], v[8:9], v[32:33], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[41:42], 3, v[41:42]
	v_lshlrev_b64 v[37:38], 3, v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v41, vcc_lo, s10, v41
	v_add_co_ci_u32_e32 v42, vcc_lo, s11, v42, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v37, vcc_lo, s10, v37
	v_add_co_ci_u32_e32 v38, vcc_lo, s11, v38, vcc_lo
	s_clause 0x2
	global_load_b64 v[41:42], v[41:42], off offset:-8
	global_load_b64 v[59:60], v[37:38], off offset:16
	global_load_b128 v[47:50], v[37:38], off
	v_add_co_u32 v37, vcc_lo, v34, v36
	v_add_co_ci_u32_e32 v38, vcc_lo, v65, v40, vcc_lo
	v_add_nc_u32_e32 v36, v34, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[37:38], 3, v[37:38]
	v_add_co_u32 v37, vcc_lo, s10, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v38, vcc_lo, s11, v38, vcc_lo
	global_load_b64 v[61:62], v[37:38], off offset:-8
	v_ashrrev_i32_e32 v37, 31, v36
	v_lshlrev_b64 v[36:37], 3, v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v36, vcc_lo, s10, v36
	v_add_co_ci_u32_e32 v37, vcc_lo, s11, v37, vcc_lo
	s_clause 0x1
	global_load_b64 v[63:64], v[36:37], off offset:16
	global_load_b128 v[51:54], v[36:37], off
	v_add_co_u32 v36, vcc_lo, v34, v35
	v_add_nc_u32_e32 v34, v34, v35
	v_add_co_ci_u32_e32 v37, vcc_lo, v65, v39, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v35, 31, v34
	v_lshlrev_b64 v[36:37], 3, v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[34:35], 3, v[34:35]
	v_add_co_u32 v36, vcc_lo, s10, v36
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v37, vcc_lo, s11, v37, vcc_lo
	v_add_co_u32 v34, vcc_lo, s10, v34
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v35, vcc_lo, s11, v35, vcc_lo
	s_clause 0x2
	global_load_b64 v[65:66], v[36:37], off offset:-8
	global_load_b64 v[67:68], v[34:35], off offset:16
	global_load_b128 v[36:39], v[34:35], off
	s_waitcnt vmcnt(9)
	v_mul_f64 v[69:70], 0x40140000, v[43:44]
	v_add_f64 v[34:35], v[45:46], -v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[55:56], 2.0, -v[69:70]
	v_fma_f64 v[69:70], v[45:46], 4.0, v[69:70]
	v_add_f64 v[45:46], v[43:44], -v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[69:70], -v[57:58]
	v_fma_f64 v[45:46], 0x40080000, v[45:46], v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], -v[55:56]
	v_fma_f64 v[45:46], v[6:7], v[45:46], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[6:7], v[45:46], v[34:35]
	s_waitcnt vmcnt(6)
	v_mul_f64 v[45:46], 0x40140000, v[47:48]
	v_fma_f64 v[34:35], v[8:9], v[34:35], v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[45:46], v[41:42], 2.0, -v[45:46]
	v_add_f64 v[43:44], v[49:50], -v[41:42]
	v_fma_f64 v[45:46], v[49:50], 4.0, v[45:46]
	v_add_f64 v[49:50], v[47:48], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[45:46], -v[59:60]
	v_fma_f64 v[49:50], 0x40080000, v[49:50], v[59:60]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[40:41], v[49:50], -v[41:42]
	v_fma_f64 v[40:41], v[6:7], v[40:41], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[40:41], v[6:7], v[40:41], v[43:44]
	s_waitcnt vmcnt(3)
	v_mul_f64 v[44:45], 0x40140000, v[51:52]
	v_add_f64 v[42:43], v[53:54], -v[61:62]
	v_fma_f64 v[40:41], v[8:9], v[40:41], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[44:45], v[61:62], 2.0, -v[44:45]
	v_add_f64 v[46:47], v[51:52], -v[53:54]
	v_fma_f64 v[44:45], v[53:54], 4.0, v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[46:47], 0x40080000, v[46:47], v[63:64]
	v_add_f64 v[44:45], v[44:45], -v[63:64]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[46:47], v[46:47], -v[61:62]
	v_fma_f64 v[44:45], v[6:7], v[46:47], v[44:45]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[46:47], 0x40140000, v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[6:7], v[44:45], v[42:43]
	v_fma_f64 v[46:47], v[65:66], 2.0, -v[46:47]
	v_add_f64 v[44:45], v[38:39], -v[65:66]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[42:43], v[8:9], v[42:43], v[51:52]
	v_fma_f64 v[46:47], v[38:39], 4.0, v[46:47]
	v_add_f64 v[38:39], v[36:37], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[46:47], v[46:47], -v[67:68]
	v_fma_f64 v[38:39], 0x40080000, v[38:39], v[67:68]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], v[38:39], -v[65:66]
	v_fma_f64 v[38:39], v[6:7], v[38:39], v[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[6:7], v[38:39], v[44:45]
	v_mul_f64 v[38:39], 0x40140000, v[12:13]
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[38:39], v[10:11], 2.0, -v[38:39]
	v_add_f64 v[36:37], v[14:15], -v[10:11]
	v_mul_f64 v[8:9], v[4:5], 0.5
	v_fma_f64 v[38:39], v[14:15], 4.0, v[38:39]
	v_add_f64 v[14:15], v[12:13], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[38:39], -v[16:17]
	v_fma_f64 v[14:15], 0x40080000, v[14:15], v[16:17]
	v_add_f64 v[16:17], v[20:21], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	v_mul_f64 v[14:15], 0x40140000, v[20:21]
	v_fma_f64 v[16:17], 0x40080000, v[16:17], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[4:5], v[10:11], v[38:39]
	v_fma_f64 v[14:15], v[18:19], 2.0, -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[18:19]
	v_fma_f64 v[10:11], v[4:5], v[10:11], v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[22:23], 4.0, v[14:15]
	v_fma_f64 v[10:11], v[8:9], v[10:11], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], -v[24:25]
	v_add_f64 v[12:13], v[22:23], -v[18:19]
	v_add_f64 v[18:19], v[28:29], -v[30:31]
	v_fma_f64 v[14:15], v[4:5], v[16:17], v[14:15]
	v_mul_f64 v[16:17], 0x40140000, v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], 0x40080000, v[18:19], v[32:33]
	v_fma_f64 v[12:13], v[4:5], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[26:27], 2.0, -v[16:17]
	v_add_f64 v[18:19], v[18:19], -v[26:27]
	v_add_f64 v[14:15], v[30:31], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[12:13], v[8:9], v[12:13], v[20:21]
	v_fma_f64 v[16:17], v[30:31], 4.0, v[16:17]
	v_add_f64 v[20:21], v[40:41], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], -v[32:33]
	v_fma_f64 v[16:17], v[4:5], v[18:19], v[16:17]
	v_mul_f64 v[18:19], 0x40140000, v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[4:5], v[16:17], v[14:15]
	v_fma_f64 v[18:19], v[34:35], 2.0, -v[18:19]
	v_add_f64 v[16:17], v[42:43], -v[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[8:9], v[14:15], v[28:29]
	v_fma_f64 v[18:19], v[42:43], 4.0, v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], -v[6:7]
	v_fma_f64 v[6:7], 0x40080000, v[20:21], v[6:7]
	v_add_f64 v[6:7], v[6:7], -v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], v[18:19]
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[16:17]
	v_mul_f64 v[16:17], 0x40140000, v[12:13]
	v_mul_f64 v[6:7], v[2:3], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[8:9], v[4:5], v[40:41]
	v_fma_f64 v[16:17], v[10:11], 2.0, -v[16:17]
	v_add_f64 v[8:9], v[14:15], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[14:15], 4.0, v[16:17]
	v_add_f64 v[14:15], v[12:13], -v[14:15]
	v_add_f64 v[16:17], v[16:17], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], 0x40080000, v[14:15], v[4:5]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], v[4:5], v[16:17]
	v_fma_f64 v[2:3], v[2:3], v[4:5], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[2:3], v[12:13]
.LBB119_21:                             ; %Flow770
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s4
	s_cbranch_execz .LBB119_23
; %bb.22:                               ; %.critedge.sink.split
	s_load_b64 s[0:1], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[6:7], off
.LBB119_23:                             ; %.critedge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 71
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,"axG",@progbits,_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii,comdat
.Lfunc_end119:
	.size	_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii, .Lfunc_end119-_Z29kernel_cubic_interpolation_3dIdEvPKT_S2_S2_S2_PS0_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 5932
; NumSgprs: 22
; NumVgprs: 71
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 8
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 71
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z16kernel_gradientxIdEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientxIdEvPKT_PS0_iii,comdat
	.protected	_Z16kernel_gradientxIdEvPKT_PS0_iii ; -- Begin function _Z16kernel_gradientxIdEvPKT_PS0_iii
	.globl	_Z16kernel_gradientxIdEvPKT_PS0_iii
	.p2align	8
	.type	_Z16kernel_gradientxIdEvPKT_PS0_iii,@function
_Z16kernel_gradientxIdEvPKT_PS0_iii:    ; @_Z16kernel_gradientxIdEvPKT_PS0_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v6, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[4:5], null, s14, s3, v[6:7]
	v_mad_u64_u32 v[2:3], null, s13, s2, v[1:2]
	v_cmp_gt_i32_e64 s2, s5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB120_11
; %bb.1:
	s_load_b32 s2, s[0:1], 0x30
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[8:9], null, s15, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	v_cmp_gt_i32_e64 s2, s6, v8
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB120_11
; %bb.2:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr6_vgpr7
                                        ; implicit-def: $vgpr0_vgpr1
	v_cmpx_ne_u32_e32 0, v2
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB120_8
; %bb.3:
	s_add_i32 s7, s4, -1
                                        ; implicit-def: $vgpr6_vgpr7
                                        ; implicit-def: $vgpr0_vgpr1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s7, v2
	s_and_saveexec_b32 s7, vcc_lo
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB120_5
; %bb.4:
	v_mul_lo_u32 v5, v4, s4
	s_mul_i32 s8, s5, s4
	v_ashrrev_i32_e32 v0, 31, v2
	v_mul_lo_u32 v8, s8, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v1, 31, v5
	v_add_co_u32 v4, vcc_lo, v2, v5
	v_ashrrev_i32_e32 v3, 31, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, v0, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, v4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_clause 0x1
	global_load_b64 v[3:4], v[0:1], off offset:-8
	global_load_b64 v[0:1], v[0:1], off offset:8
	s_waitcnt vmcnt(1)
	v_mul_f64 v[3:4], v[3:4], 0.5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[0:1], 0.5, -v[3:4]
	v_add3_u32 v0, v5, v2, v8
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr2_vgpr3
	v_ashrrev_i32_e32 v1, 31, v0
.LBB120_5:                              ; %Flow
	s_and_not1_saveexec_b32 s7, s7
	s_cbranch_execz .LBB120_7
; %bb.6:
	s_mul_i32 s8, s5, s4
	v_mul_lo_u32 v0, v4, s4
	v_mul_lo_u32 v1, s8, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v0, v0, v2, v1
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b128 v[2:5], v[2:3], off offset:-8
	s_waitcnt vmcnt(0)
	v_add_f64 v[6:7], v[4:5], -v[2:3]
.LBB120_7:                              ; %Flow100
	s_or_b32 exec_lo, exec_lo, s7
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr8_vgpr9
.LBB120_8:                              ; %Flow101
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB120_10
; %bb.9:
	v_mul_lo_u32 v2, v4, s4
	s_mul_i32 s4, s5, s4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s4, v8, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[2:3], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b128 v[2:5], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[6:7], v[4:5], -v[2:3]
.LBB120_10:                             ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b64 v[0:1], v[6:7], off
.LBB120_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_gradientxIdEvPKT_PS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_gradientxIdEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientxIdEvPKT_PS0_iii,comdat
.Lfunc_end120:
	.size	_Z16kernel_gradientxIdEvPKT_PS0_iii, .Lfunc_end120-_Z16kernel_gradientxIdEvPKT_PS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 632
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z16kernel_gradientyIdEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientyIdEvPKT_PS0_iii,comdat
	.protected	_Z16kernel_gradientyIdEvPKT_PS0_iii ; -- Begin function _Z16kernel_gradientyIdEvPKT_PS0_iii
	.globl	_Z16kernel_gradientyIdEvPKT_PS0_iii
	.p2align	8
	.type	_Z16kernel_gradientyIdEvPKT_PS0_iii,@function
_Z16kernel_gradientyIdEvPKT_PS0_iii:    ; @_Z16kernel_gradientyIdEvPKT_PS0_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x10
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s13, s2, v[3:4]
	v_mad_u64_u32 v[2:3], null, s14, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	v_cmp_gt_i32_e64 s2, s5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB121_11
; %bb.1:
	s_load_b32 s2, s[0:1], 0x30
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[7:8], null, s15, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v7
	v_cmp_gt_i32_e64 s2, s6, v7
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB121_11
; %bb.2:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr3_vgpr4
	v_cmpx_ne_u32_e32 0, v2
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB121_8
; %bb.3:
	v_mul_lo_u32 v0, v2, s4
	s_add_i32 s7, s5, -1
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s7, v2
	s_and_saveexec_b32 s7, vcc_lo
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB121_5
; %bb.4:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v5, s4, v0
	s_mul_i32 s8, s5, s4
	v_mad_u64_u32 v[2:3], null, s8, v7, v[1:2]
	s_lshl_b32 s8, s4, 1
                                        ; implicit-def: $vgpr7_vgpr8
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_subrev_nc_u32_e32 v1, s8, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v2, v5
	v_add_nc_u32_e32 v3, v2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	s_clause 0x1
	global_load_b64 v[3:4], v[3:4], off
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(1)
	v_mul_f64 v[3:4], v[3:4], 0.5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], v[5:6], 0.5, -v[3:4]
	v_add_nc_u32_e32 v3, v2, v0
                                        ; implicit-def: $vgpr1_vgpr2
                                        ; implicit-def: $vgpr0
	v_ashrrev_i32_e32 v4, 31, v3
.LBB121_5:                              ; %Flow
	s_and_not1_saveexec_b32 s7, s7
	s_cbranch_execz .LBB121_7
; %bb.6:
	s_mul_i32 s8, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s8, v7, v[1:2]
	v_subrev_nc_u32_e32 v1, s4, v0
	v_add_nc_u32_e32 v3, v2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v2, v1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[5:6], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_clause 0x1
	global_load_b64 v[5:6], v[5:6], off
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[5:6], v[5:6], -v[0:1]
.LBB121_7:                              ; %Flow100
	s_or_b32 exec_lo, exec_lo, s7
                                        ; implicit-def: $vgpr7_vgpr8
                                        ; implicit-def: $vgpr1_vgpr2
.LBB121_8:                              ; %Flow101
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB121_10
; %bb.9:
	s_mul_i32 s5, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, s5, v7
	v_add3_u32 v0, v1, s4, v2
	v_add_nc_u32_e32 v3, v2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_lshlrev_b64 v[5:6], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	s_clause 0x1
	global_load_b64 v[0:1], v[0:1], off
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[5:6], v[0:1], -v[5:6]
.LBB121_10:                             ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b64 v[0:1], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b64 v[0:1], v[5:6], off
.LBB121_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_gradientyIdEvPKT_PS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_gradientyIdEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientyIdEvPKT_PS0_iii,comdat
.Lfunc_end121:
	.size	_Z16kernel_gradientyIdEvPKT_PS0_iii, .Lfunc_end121-_Z16kernel_gradientyIdEvPKT_PS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 744
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z16kernel_gradientzIdEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientzIdEvPKT_PS0_iii,comdat
	.protected	_Z16kernel_gradientzIdEvPKT_PS0_iii ; -- Begin function _Z16kernel_gradientzIdEvPKT_PS0_iii
	.globl	_Z16kernel_gradientzIdEvPKT_PS0_iii
	.p2align	8
	.type	_Z16kernel_gradientzIdEvPKT_PS0_iii,@function
_Z16kernel_gradientzIdEvPKT_PS0_iii:    ; @_Z16kernel_gradientzIdEvPKT_PS0_iii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[6:7], null, s13, s2, v[1:2]
	v_mad_u64_u32 v[7:8], null, s14, s7, v[2:3]
	v_mad_u64_u32 v[8:9], null, s15, s3, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s4, v6
	v_cmp_gt_i32_e64 s2, s5, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s6, v8
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB122_10
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s7, exec_lo
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr0_vgpr1
	v_cmpx_ne_u32_e32 0, v8
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB122_7
; %bb.2:
	s_mul_i32 s8, s5, s4
	v_mad_u64_u32 v[4:5], null, v7, s4, v[6:7]
	v_mul_lo_u32 v6, s8, v8
	s_add_i32 s6, s6, -1
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr0_vgpr1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s6, v8
	s_and_saveexec_b32 s6, vcc_lo
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB122_4
; %bb.3:
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v2, s8, v6
	s_lshl_b32 s9, s8, 1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_subrev_nc_u32_e32 v0, s9, v2
	v_add_nc_u32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v0, v4
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_clause 0x1
	global_load_b64 v[0:1], v[0:1], off
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	v_mul_f64 v[0:1], v[0:1], 0.5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], 0.5, -v[0:1]
	v_add_nc_u32_e32 v0, v6, v4
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr4_vgpr5
	v_ashrrev_i32_e32 v1, 31, v0
.LBB122_4:                              ; %Flow
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB122_6
; %bb.5:
	v_subrev_nc_u32_e32 v1, s8, v6
	v_add_nc_u32_e32 v0, v6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v1, v4
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[4:5], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_clause 0x1
	global_load_b64 v[4:5], v[4:5], off
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[4:5], -v[2:3]
.LBB122_6:                              ; %Flow100
	s_or_b32 exec_lo, exec_lo, s6
                                        ; implicit-def: $vgpr6_vgpr7
                                        ; implicit-def: $vgpr7_vgpr8
.LBB122_7:                              ; %Flow101
	s_and_not1_saveexec_b32 s6, s7
	s_cbranch_execz .LBB122_9
; %bb.8:
	v_mad_u64_u32 v[0:1], null, v7, s4, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s5, s4, v[0:1]
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[4:5], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_clause 0x1
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], -v[4:5]
.LBB122_9:                              ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB122_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_gradientzIdEvPKT_PS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_gradientzIdEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientzIdEvPKT_PS0_iii,comdat
.Lfunc_end122:
	.size	_Z16kernel_gradientzIdEvPKT_PS0_iii, .Lfunc_end122-_Z16kernel_gradientzIdEvPKT_PS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 664
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii,"axG",@progbits,_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii,comdat
	.protected	_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii ; -- Begin function _Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii
	.globl	_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii
	.p2align	8
	.type	_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii,@function
_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii: ; @_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[8:11], s[0:1], 0x18
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	s_mul_i32 s14, s14, s3
	v_mad_u64_u32 v[0:1], null, s15, s2, v[3:4]
	v_add_nc_u32_e32 v1, s14, v2
	s_ashr_i32 s12, s10, 1
	s_ashr_i32 s13, s11, 1
	s_sub_i32 s3, s8, s12
	s_sub_i32 s4, s9, s13
	v_cmp_le_i32_e32 vcc_lo, s12, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_le_i32_e64 s2, s13, v0
	v_cmp_gt_i32_e64 s3, s3, v1
	v_cmp_gt_i32_e64 s4, s4, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB123_9
; %bb.1:                                ; %.preheader55
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s11, 1
	s_cbranch_scc1 .LBB123_7
; %bb.2:                                ; %.preheader.lr.ph
	v_subrev_nc_u32_e32 v3, s13, v0
	s_mov_b32 s3, 0
	s_cmp_gt_i32 s10, 0
	s_mov_b32 s2, s3
	s_cselect_b32 s9, -1, 0
	v_mul_lo_u32 v3, s8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add3_u32 v4, v2, v3, s14
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s14, s3
	v_subrev_nc_u32_e32 v6, s12, v4
.LBB123_3:                              ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB123_5 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_cbranch_vccnz .LBB123_6
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB123_3 Depth=1
	s_lshl_b64 s[12:13], s[2:3], 3
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v4, v6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s6, s12
	s_addc_u32 s13, s7, s13
	s_mov_b32 s15, s10
.LBB123_5:                              ;   Parent Loop BB123_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_ashrrev_i32_e32 v5, 31, v4
	s_load_b64 s[16:17], s[12:13], 0x0
	s_add_i32 s15, s15, -1
	s_add_u32 s12, s12, 8
	s_addc_u32 s13, s13, 0
	v_lshlrev_b64 v[7:8], 3, v[4:5]
	v_add_nc_u32_e32 v4, s8, v4
	s_cmp_eq_u32 s15, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fma_f64 v[2:3], v[7:8], s[16:17], v[2:3]
	s_cbranch_scc0 .LBB123_5
.LBB123_6:                              ; %._crit_edge
                                        ;   in Loop: Header=BB123_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v6, 1, v6
	s_add_i32 s14, s14, 1
	s_add_i32 s2, s2, s10
	s_cmp_eq_u32 s14, s11
	s_cbranch_scc0 .LBB123_3
	s_branch .LBB123_8
.LBB123_7:
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
.LBB123_8:                              ; %._crit_edge60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, s8, v[1:2]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB123_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii,"axG",@progbits,_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii,comdat
.Lfunc_end123:
	.size	_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii, .Lfunc_end123-_Z21kernel_convolution_2dIdEvPKT_S2_PS0_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 452
; NumSgprs: 20
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii,"axG",@progbits,_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii,comdat
	.protected	_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii ; -- Begin function _Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii
	.globl	_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii
	.p2align	8
	.type	_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii,@function
_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii: ; @_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x18
	s_load_b64 s[16:17], s[0:1], 0x28
	v_and_b32_e32 v4, 0x3ff, v0
	v_bfe_u32 v5, v0, 10, 10
	v_bfe_u32 v6, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s14, s14, s4
	s_mul_i32 s13, s13, s2
	v_add_nc_u32_e32 v1, s14, v5
	v_add_nc_u32_e32 v0, s13, v4
	s_and_b32 s3, s3, 0xffff
	s_ashr_i32 s18, s11, 1
	s_ashr_i32 s12, s16, 1
	v_mad_u64_u32 v[2:3], null, s15, s3, v[6:7]
	v_cmp_le_i32_e32 vcc_lo, s18, v0
	v_cmp_le_i32_e64 s2, s12, v1
	s_sub_i32 s3, s8, s18
	s_sub_i32 s4, s9, s12
	v_cmp_gt_i32_e64 s3, s3, v0
	s_ashr_i32 s19, s17, 1
	v_cmp_gt_i32_e64 s4, s4, v1
	s_and_b32 s2, vcc_lo, s2
	v_cmp_le_i32_e32 vcc_lo, s19, v2
	s_sub_i32 s5, s10, s19
	s_and_b32 s3, s2, s3
	v_cmp_gt_i32_e64 s2, s5, v2
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB124_11
; %bb.1:                                ; %.preheader92
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s17, 1
	s_cbranch_scc1 .LBB124_9
; %bb.2:                                ; %.preheader91.lr.ph
	v_subrev_nc_u32_e32 v3, s19, v2
	s_cmp_gt_i32 s16, 0
	s_mov_b32 s10, 0
	s_mul_i32 s15, s9, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, s9, v3
	v_add3_u32 v3, v5, v3, s14
	s_mul_i32 s14, s16, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v3, s12, v3
	s_cselect_b32 s12, -1, 0
	s_cmp_gt_i32 s11, 0
	v_mul_lo_u32 v3, s8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add3_u32 v5, v4, v3, s13
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_cselect_b32 s13, -1, 0
	v_subrev_nc_u32_e32 v7, s18, v5
	s_mov_b32 s18, 0
.LBB124_3:                              ; %.preheader91
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB124_5 Depth 2
                                        ;       Child Loop BB124_6 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB124_8
; %bb.4:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB124_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v8, v7
	s_mov_b32 s19, 0
	s_mov_b32 s20, s10
.LBB124_5:                              ; %.preheader
                                        ;   Parent Loop BB124_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB124_6 Depth 3
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v5, v8
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_mov_b32 s2, s20
	s_mov_b32 s21, s11
	s_cbranch_vccnz .LBB124_7
.LBB124_6:                              ;   Parent Loop BB124_3 Depth=1
                                        ;     Parent Loop BB124_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_ashrrev_i32_e32 v6, 31, v5
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[22:23], s[2:3], 3
	s_waitcnt lgkmcnt(0)
	s_add_u32 s22, s6, s22
	v_lshlrev_b64 v[9:10], 3, v[5:6]
	s_addc_u32 s23, s7, s23
	v_add_nc_u32_e32 v5, 1, v5
	s_load_b64 s[22:23], s[22:23], 0x0
	s_add_i32 s21, s21, -1
	s_add_i32 s2, s2, 1
	v_add_co_u32 v9, vcc_lo, s4, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	s_cmp_eq_u32 s21, 0
	global_load_b64 v[9:10], v[9:10], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fma_f64 v[3:4], v[9:10], s[22:23], v[3:4]
	s_cbranch_scc0 .LBB124_6
.LBB124_7:                              ; %._crit_edge
                                        ;   in Loop: Header=BB124_5 Depth=2
	v_add_nc_u32_e32 v8, s8, v8
	s_add_i32 s19, s19, 1
	s_add_i32 s20, s20, s11
	s_cmp_eq_u32 s19, s16
	s_cbranch_scc0 .LBB124_5
.LBB124_8:                              ; %._crit_edge97
                                        ;   in Loop: Header=BB124_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v7, s15, v7
	s_add_i32 s18, s18, 1
	s_add_i32 s10, s10, s14
	s_cmp_eq_u32 s18, s17
	s_cbranch_scc0 .LBB124_3
	s_branch .LBB124_10
.LBB124_9:
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
.LBB124_10:                             ; %._crit_edge101
	v_mad_u64_u32 v[5:6], null, v2, s9, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v5, s8, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[3:4], off
.LBB124_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii,"axG",@progbits,_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii,comdat
.Lfunc_end124:
	.size	_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii, .Lfunc_end124-_Z21kernel_convolution_3dIdEvPKT_S2_PS0_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 604
; NumSgprs: 26
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z13kernel_assignIiEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIiEvPT_S0_i,comdat
	.protected	_Z13kernel_assignIiEvPT_S0_i ; -- Begin function _Z13kernel_assignIiEvPT_S0_i
	.globl	_Z13kernel_assignIiEvPT_S0_i
	.p2align	8
	.type	_Z13kernel_assignIiEvPT_S0_i,@function
_Z13kernel_assignIiEvPT_S0_i:           ; @_Z13kernel_assignIiEvPT_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB125_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_mov_b32_e32 v2, s2
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB125_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13kernel_assignIiEvPT_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13kernel_assignIiEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIiEvPT_S0_i,comdat
.Lfunc_end125:
	.size	_Z13kernel_assignIiEvPT_S0_i, .Lfunc_end125-_Z13kernel_assignIiEvPT_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 124
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_copyIiEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIiEvPKT_PS0_i,comdat
	.protected	_Z11kernel_copyIiEvPKT_PS0_i ; -- Begin function _Z11kernel_copyIiEvPKT_PS0_i
	.globl	_Z11kernel_copyIiEvPKT_PS0_i
	.p2align	8
	.type	_Z11kernel_copyIiEvPKT_PS0_i,@function
_Z11kernel_copyIiEvPKT_PS0_i:           ; @_Z11kernel_copyIiEvPKT_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB126_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB126_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_copyIiEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_copyIiEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIiEvPKT_PS0_i,comdat
.Lfunc_end126:
	.size	_Z11kernel_copyIiEvPKT_PS0_i, .Lfunc_end126-_Z11kernel_copyIiEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_addIiEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_addIiEvPKT_S2_PS0_i,comdat
	.protected	_Z10kernel_addIiEvPKT_S2_PS0_i ; -- Begin function _Z10kernel_addIiEvPKT_S2_PS0_i
	.globl	_Z10kernel_addIiEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z10kernel_addIiEvPKT_S2_PS0_i,@function
_Z10kernel_addIiEvPKT_S2_PS0_i:         ; @_Z10kernel_addIiEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB127_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB127_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_addIiEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_addIiEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_addIiEvPKT_S2_PS0_i,comdat
.Lfunc_end127:
	.size	_Z10kernel_addIiEvPKT_S2_PS0_i, .Lfunc_end127-_Z10kernel_addIiEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_subIiEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_subIiEvPKT_S2_PS0_i,comdat
	.protected	_Z10kernel_subIiEvPKT_S2_PS0_i ; -- Begin function _Z10kernel_subIiEvPKT_S2_PS0_i
	.globl	_Z10kernel_subIiEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z10kernel_subIiEvPKT_S2_PS0_i,@function
_Z10kernel_subIiEvPKT_S2_PS0_i:         ; @_Z10kernel_subIiEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB128_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB128_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_subIiEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_subIiEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_subIiEvPKT_S2_PS0_i,comdat
.Lfunc_end128:
	.size	_Z10kernel_subIiEvPKT_S2_PS0_i, .Lfunc_end128-_Z10kernel_subIiEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_mulIiEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_mulIiEvPKT_S2_PS0_i,comdat
	.protected	_Z10kernel_mulIiEvPKT_S2_PS0_i ; -- Begin function _Z10kernel_mulIiEvPKT_S2_PS0_i
	.globl	_Z10kernel_mulIiEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z10kernel_mulIiEvPKT_S2_PS0_i,@function
_Z10kernel_mulIiEvPKT_S2_PS0_i:         ; @_Z10kernel_mulIiEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB129_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB129_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_mulIiEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_mulIiEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_mulIiEvPKT_S2_PS0_i,comdat
.Lfunc_end129:
	.size	_Z10kernel_mulIiEvPKT_S2_PS0_i, .Lfunc_end129-_Z10kernel_mulIiEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 184
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_divIiEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_divIiEvPKT_S2_PS0_i,comdat
	.protected	_Z10kernel_divIiEvPKT_S2_PS0_i ; -- Begin function _Z10kernel_divIiEvPKT_S2_PS0_i
	.globl	_Z10kernel_divIiEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z10kernel_divIiEvPKT_S2_PS0_i,@function
_Z10kernel_divIiEvPKT_S2_PS0_i:         ; @_Z10kernel_divIiEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB130_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v4, v[2:3], off
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(1)
	v_ashrrev_i32_e32 v3, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v7, 31, v2
	v_xor_b32_e32 v4, v4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, v2, v7
	v_xor_b32_e32 v3, v7, v3
	v_cvt_f32_u32_e32 v5, v4
	v_sub_nc_u32_e32 v6, 0, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v2, v2, v7
	v_rcp_iflag_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v5, 0x4f7ffffe, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v5, v5
	v_mul_lo_u32 v6, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v6, v5, v6
	v_add_nc_u32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v2, v5
	v_mul_lo_u32 v6, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v6
	v_add_nc_u32_e32 v6, 1, v5
	v_sub_nc_u32_e32 v8, v2, v4
	v_cmp_ge_u32_e32 vcc_lo, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v2, v2, v8 :: v_dual_cndmask_b32 v5, v5, v6
	v_cmp_ge_u32_e32 vcc_lo, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, 1, v5
	v_cndmask_b32_e32 v2, v5, v6, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v3
	v_sub_nc_u32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB130_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_divIiEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_divIiEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_divIiEvPKT_S2_PS0_i,comdat
.Lfunc_end130:
	.size	_Z10kernel_divIiEvPKT_S2_PS0_i, .Lfunc_end130-_Z10kernel_divIiEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 356
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_powIiEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_powIiEvPKT_S2_PS0_i,comdat
	.protected	_Z10kernel_powIiEvPKT_S2_PS0_i ; -- Begin function _Z10kernel_powIiEvPKT_S2_PS0_i
	.globl	_Z10kernel_powIiEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z10kernel_powIiEvPKT_S2_PS0_i,@function
_Z10kernel_powIiEvPKT_S2_PS0_i:         ; @_Z10kernel_powIiEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB131_2
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0x3fe55555
	s_mov_b32 s0, 0x55555555
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	s_mov_b32 s6, 0x4222de17
	s_mov_b32 s7, 0x3fbdee67
	global_load_b32 v4, v[2:3], off
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	s_mov_b32 s4, 0x968915a9
	s_mov_b32 s5, 0x3fba6564
	global_load_b32 v5, v[2:3], off
	s_waitcnt vmcnt(1)
	v_cvt_f64_i32_e32 v[2:3], v4
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 1, v5
	v_cvt_f64_i32_e32 v[4:5], v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v3, 0x3ff00000, v3, vcc_lo
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e32 vcc_lo, 0, v[2:3]
	v_cndmask_b32_e32 v5, 0x3ff00000, v5, vcc_lo
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e64 v[6:7], |v[4:5]|
	v_cmp_gt_f64_e32 vcc_lo, s[0:1], v[6:7]
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[6:7], v[6:7], v8
	v_add_f64 v[8:9], v[6:7], 1.0
	v_add_f64 v[14:15], v[6:7], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[10:11], v[8:9]
	v_add_f64 v[16:17], v[8:9], -1.0
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
	v_mul_f64 v[12:13], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[8:9], v[12:13]
	v_fma_f64 v[8:9], v[12:13], v[8:9], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[12:13], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[18:19], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[14:15], -v[8:9]
	v_add_f64 v[18:19], v[8:9], -v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[18:19], -v[6:7]
	v_add_f64 v[8:9], v[14:15], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[6:7], v[16:17], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[10:11], v[6:7]
	v_add_f64 v[8:9], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], -v[12:13]
	v_mul_f64 v[12:13], v[8:9], v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[8:9], v[8:9], -v[12:13]
	v_add_f64 v[14:15], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[8:9], v[14:15], v[10:11]
	v_add_f64 v[14:15], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[16:17], v[14:15], s[6:7], s[4:5]
	s_mov_b32 s4, 0x3abe935a
	s_mov_b32 s5, 0x3fbe25e4
	v_add_f64 v[12:13], v[14:15], -v[12:13]
	v_mul_f64 v[22:23], v[8:9], v[14:15]
	s_mov_b32 s6, 0x652b82fe
	s_mov_b32 s7, 0x3ff71547
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x47e6c9c2
	s_mov_b32 s5, 0x3fc110ef
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0xcfa74449
	s_mov_b32 s5, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x71bf3c30
	s_mov_b32 s5, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x1c7792ce
	s_mov_b32 s5, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x924920da
	s_mov_b32 s5, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x9999999c
	s_mov_b32 s5, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s5, 0x3c7abc9e
	s_mov_b32 s4, 0x3b39803f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[14:15], v[16:17]
	v_fma_f64 v[12:13], v[14:15], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[16:17], v[12:13]
	v_add_f64 v[16:17], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[20:21], v[16:17], s[0:1]
	v_add_f64 v[18:19], v[16:17], -v[18:19]
	s_mov_b32 s1, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[24:25], v[20:21], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_fma_f64 v[18:19], v[14:15], v[8:9], -v[22:23]
	s_mov_b32 s0, 0xd5df274d
	s_mov_b32 s1, 0x3c8543b0
	v_add_f64 v[16:17], v[16:17], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], s[0:1]
	v_fma_f64 v[14:15], v[14:15], v[6:7], v[18:19]
	s_mov_b32 s1, 0x3fe62e42
	s_mov_b32 s0, 0xfefa39ef
	v_ldexp_f64 v[6:7], v[6:7], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[16:17]
	v_fma_f64 v[10:11], v[10:11], v[8:9], v[14:15]
	v_ldexp_f64 v[8:9], v[8:9], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[20:21], v[12:13]
	v_add_f64 v[16:17], v[22:23], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[20:21], -v[14:15]
	v_mul_f64 v[20:21], v[16:17], v[14:15]
	v_add_f64 v[22:23], v[16:17], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[18:19]
	v_fma_f64 v[18:19], v[16:17], v[14:15], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[22:23]
	v_fma_f64 v[12:13], v[16:17], v[12:13], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[12:13]
	v_frexp_exp_i32_f64_e32 v14, v[4:5]
	v_add_f64 v[12:13], v[20:21], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	v_cvt_f64_i32_e32 v[14:15], v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[8:9], v[12:13]
	v_add_f64 v[18:19], v[12:13], -v[20:21]
	v_mul_f64 v[20:21], v[14:15], s[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[16:17], -v[8:9]
	v_add_f64 v[10:11], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[14:15], s[0:1], -v[20:21]
	s_mov_b32 s1, 0xbfe62e42
	v_add_f64 v[8:9], v[12:13], -v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_fma_f64 v[10:11], v[14:15], s[4:5], v[18:19]
	s_mov_b32 s5, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[20:21], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[16:17], v[6:7]
	v_add_f64 v[20:21], v[8:9], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[8:9], v[12:13]
	v_add_f64 v[16:17], v[12:13], -v[16:17]
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[14:15], -v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[14:15], -v[18:19]
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_add_f64 v[16:17], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[22:23]
	v_add_f64 v[8:9], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[16:17], -v[10:11]
	v_add_f64 v[8:9], v[16:17], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	v_add_f64 v[18:19], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	v_add_f64 v[12:13], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[18:19], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], -v[18:19]
	v_mul_f64 v[12:13], v[2:3], v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[2:3], v[8:9], -v[12:13]
	v_cmp_class_f64_e64 vcc_lo, v[12:13], 0x204
	v_fma_f64 v[6:7], v[2:3], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[12:13], v[6:7]
	v_dual_cndmask_b32 v11, v9, v13 :: v_dual_cndmask_b32 v10, v8, v12
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[10:11], s[6:7]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[10:11]|
	v_add_f64 v[6:7], v[6:7], -v[8:9]
	v_mul_f64 v[8:9], v[2:3], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rndne_f64_e32 v[14:15], v[14:15]
	v_dual_cndmask_b32 v7, 0, v7 :: v_dual_cndmask_b32 v6, 0, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[14:15], s[0:1], v[10:11]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_cvt_i32_f64_e32 v20, v[14:15]
	v_fma_f64 v[16:17], v[14:15], s[4:5], v[16:17]
	s_mov_b32 s4, 0x6a5dcb37
	s_mov_b32 s5, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], s[4:5], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[10:11]
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[16:17], v[18:19], 1.0
	s_and_b32 vcc_lo, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[16:17], v[18:19], 1.0
	v_ldexp_f64 v[12:13], v[14:15], v20
	v_trunc_f64_e32 v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v13, 0x7ff00000, v13, s0
	v_cndmask_b32_e32 v10, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, 0, v13, s1
	v_trunc_f64_e32 v[12:13], v[8:9]
	v_cmp_eq_f64_e64 s1, v[14:15], v[2:3]
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[10:11]
	v_cmp_class_f64_e64 s0, v[10:11], 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_neq_f64_e32 vcc_lo, v[12:13], v[8:9]
	v_cndmask_b32_e64 v6, v6, v10, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v7, v7, v11, s0
	v_cmp_gt_f64_e64 s0, 0, v[4:5]
	v_cndmask_b32_e64 v8, 0, v6, s1
	s_and_b32 vcc_lo, s1, vcc_lo
	v_cndmask_b32_e32 v9, 0x3ff00000, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v7, 0x7fffffff, v7, v9
	v_cndmask_b32_e64 v9, 0x7ff80000, v7, s1
	v_cmp_gt_f64_e64 s1, 0, v[2:3]
	v_cndmask_b32_e64 v2, v6, v8, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v3, v7, v9, s0
	v_cmp_eq_f64_e64 s0, 0, v[4:5]
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_xor_b32 s1, s1, s0
	v_cndmask_b32_e64 v2, v2, 0, s0
	v_cndmask_b32_e64 v4, 0x7ff00000, 0, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v4, 0x7fffffff, v4, v5
	v_cndmask_b32_e64 v3, v3, v4, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f64_e32 v2, v[2:3]
	global_store_b32 v[0:1], v2, off
.LBB131_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_powIiEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_powIiEvPKT_S2_PS0_i,"axG",@progbits,_Z10kernel_powIiEvPKT_S2_PS0_i,comdat
.Lfunc_end131:
	.size	_Z10kernel_powIiEvPKT_S2_PS0_i, .Lfunc_end131-_Z10kernel_powIiEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2276
; NumSgprs: 18
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_add_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_add_scalarIiEvPKT_PS0_S0_i,comdat
	.protected	_Z17kernel_add_scalarIiEvPKT_PS0_S0_i ; -- Begin function _Z17kernel_add_scalarIiEvPKT_PS0_S0_i
	.globl	_Z17kernel_add_scalarIiEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z17kernel_add_scalarIiEvPKT_PS0_S0_i,@function
_Z17kernel_add_scalarIiEvPKT_PS0_S0_i:  ; @_Z17kernel_add_scalarIiEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB132_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, s2, v2
	global_store_b32 v[0:1], v2, off
.LBB132_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_add_scalarIiEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_add_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_add_scalarIiEvPKT_PS0_S0_i,comdat
.Lfunc_end132:
	.size	_Z17kernel_add_scalarIiEvPKT_PS0_S0_i, .Lfunc_end132-_Z17kernel_add_scalarIiEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_sub_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i,comdat
	.protected	_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i ; -- Begin function _Z17kernel_sub_scalarIiEvPKT_PS0_S0_i
	.globl	_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i,@function
_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i:  ; @_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB133_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_subrev_nc_u32_e32 v2, s2, v2
	global_store_b32 v[0:1], v2, off
.LBB133_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_sub_scalarIiEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_sub_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i,comdat
.Lfunc_end133:
	.size	_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i, .Lfunc_end133-_Z17kernel_sub_scalarIiEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i,comdat
	.protected	_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i ; -- Begin function _Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i
	.globl	_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i,@function
_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i: ; @_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB134_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, s2, v2
	global_store_b32 v[0:1], v2, off
.LBB134_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i,comdat
.Lfunc_end134:
	.size	_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i, .Lfunc_end134-_Z21kernel_sub_scalar_invIiEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_mul_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i,comdat
	.protected	_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i ; -- Begin function _Z17kernel_mul_scalarIiEvPKT_PS0_S0_i
	.globl	_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i,@function
_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i:  ; @_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB135_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v2, v2, s2
	global_store_b32 v[0:1], v2, off
.LBB135_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_mul_scalarIiEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_mul_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i,comdat
.Lfunc_end135:
	.size	_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i, .Lfunc_end135-_Z17kernel_mul_scalarIiEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_div_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_div_scalarIiEvPKT_PS0_S0_i,comdat
	.protected	_Z17kernel_div_scalarIiEvPKT_PS0_S0_i ; -- Begin function _Z17kernel_div_scalarIiEvPKT_PS0_S0_i
	.globl	_Z17kernel_div_scalarIiEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z17kernel_div_scalarIiEvPKT_PS0_S0_i,@function
_Z17kernel_div_scalarIiEvPKT_PS0_S0_i:  ; @_Z17kernel_div_scalarIiEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB136_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s0, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s1, s2, s0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_xor_b32 s1, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_sub_i32 s2, 0, s1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	v_cvt_f32_u32_e32 v3, s1
	v_rcp_iflag_f32_e32 v3, v3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v5, 31, v2
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v3, 0x4f7ffffe, v3 :: v_dual_add_nc_u32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v3, v3
	v_xor_b32_e32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, s2, v3
	v_xor_b32_e32 v5, s0, v5
	v_mul_hi_u32 v4, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v3, v4
	v_mul_hi_u32 v3, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v3, s1
	v_sub_nc_u32_e32 v2, v2, v4
	v_add_nc_u32_e32 v4, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v6, s1, v2
	v_cmp_le_u32_e32 vcc_lo, s1, v2
	v_dual_cndmask_b32 v2, v2, v6 :: v_dual_cndmask_b32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s1, v2
	v_add_nc_u32_e32 v4, 1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v3, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	v_xor_b32_e32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v5
	global_store_b32 v[0:1], v2, off
.LBB136_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_div_scalarIiEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_div_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_div_scalarIiEvPKT_PS0_S0_i,comdat
.Lfunc_end136:
	.size	_Z17kernel_div_scalarIiEvPKT_PS0_S0_i, .Lfunc_end136-_Z17kernel_div_scalarIiEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 316
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i,comdat
	.protected	_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i ; -- Begin function _Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i
	.globl	_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i,@function
_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i: ; @_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB137_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s0, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s1, s2, s0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_xor_b32 s1, s1, s0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v3
	v_xor_b32_e32 v2, v2, v3
	v_xor_b32_e32 v3, s0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v4, v2
	v_sub_nc_u32_e32 v5, 0, v2
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v4
	v_mul_lo_u32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v4, v5
	v_add_nc_u32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, s1, v4
	v_mul_lo_u32 v5, v4, v2
	v_add_nc_u32_e32 v6, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, s1, v5
	v_sub_nc_u32_e32 v7, v5, v2
	v_cmp_ge_u32_e32 vcc_lo, v5, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v5, v7 :: v_dual_cndmask_b32 v4, v4, v6
	v_cmp_ge_u32_e32 vcc_lo, v5, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, 1, v4
	v_cndmask_b32_e32 v2, v4, v6, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v3
	v_sub_nc_u32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB137_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i,comdat
.Lfunc_end137:
	.size	_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i, .Lfunc_end137-_Z21kernel_div_scalar_invIiEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 316
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_pow_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i,comdat
	.protected	_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i ; -- Begin function _Z17kernel_pow_scalarIiEvPKT_PS0_S0_i
	.globl	_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i,@function
_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i:  ; @_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB138_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s6, 0x4222de17
	s_mov_b32 s7, 0x3fbdee67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	s_mov_b32 s1, 0x3fe55555
	s_mov_b32 s0, 0x55555555
	global_load_b32 v4, v[2:3], off
	v_cvt_f64_i32_e32 v[2:3], s4
	s_mov_b32 s4, 0x968915a9
	s_mov_b32 s5, 0x3fba6564
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 1, v4
	v_cvt_f64_i32_e32 v[4:5], v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v3, 0x3ff00000, v3, vcc_lo
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e32 vcc_lo, 0, v[2:3]
	v_cndmask_b32_e32 v5, 0x3ff00000, v5, vcc_lo
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e64 v[6:7], |v[4:5]|
	v_cmp_gt_f64_e32 vcc_lo, s[0:1], v[6:7]
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[6:7], v[6:7], v8
	v_add_f64 v[8:9], v[6:7], 1.0
	v_add_f64 v[14:15], v[6:7], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[10:11], v[8:9]
	v_add_f64 v[16:17], v[8:9], -1.0
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
	v_mul_f64 v[12:13], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[8:9], v[12:13]
	v_fma_f64 v[8:9], v[12:13], v[8:9], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[12:13], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[18:19], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[14:15], -v[8:9]
	v_add_f64 v[18:19], v[8:9], -v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[18:19], -v[6:7]
	v_add_f64 v[8:9], v[14:15], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[6:7], v[16:17], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[10:11], v[6:7]
	v_add_f64 v[8:9], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], -v[12:13]
	v_mul_f64 v[12:13], v[8:9], v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[8:9], v[8:9], -v[12:13]
	v_add_f64 v[14:15], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[8:9], v[14:15], v[10:11]
	v_add_f64 v[14:15], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[16:17], v[14:15], s[6:7], s[4:5]
	s_mov_b32 s4, 0x3abe935a
	s_mov_b32 s5, 0x3fbe25e4
	v_add_f64 v[12:13], v[14:15], -v[12:13]
	v_mul_f64 v[22:23], v[8:9], v[14:15]
	s_mov_b32 s6, 0x652b82fe
	s_mov_b32 s7, 0x3ff71547
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x47e6c9c2
	s_mov_b32 s5, 0x3fc110ef
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0xcfa74449
	s_mov_b32 s5, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x71bf3c30
	s_mov_b32 s5, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x1c7792ce
	s_mov_b32 s5, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x924920da
	s_mov_b32 s5, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x9999999c
	s_mov_b32 s5, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s5, 0x3c7abc9e
	s_mov_b32 s4, 0x3b39803f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[14:15], v[16:17]
	v_fma_f64 v[12:13], v[14:15], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[16:17], v[12:13]
	v_add_f64 v[16:17], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[20:21], v[16:17], s[0:1]
	v_add_f64 v[18:19], v[16:17], -v[18:19]
	s_mov_b32 s1, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[24:25], v[20:21], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_fma_f64 v[18:19], v[14:15], v[8:9], -v[22:23]
	s_mov_b32 s0, 0xd5df274d
	s_mov_b32 s1, 0x3c8543b0
	v_add_f64 v[16:17], v[16:17], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], s[0:1]
	v_fma_f64 v[14:15], v[14:15], v[6:7], v[18:19]
	s_mov_b32 s1, 0x3fe62e42
	s_mov_b32 s0, 0xfefa39ef
	v_ldexp_f64 v[6:7], v[6:7], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[16:17]
	v_fma_f64 v[10:11], v[10:11], v[8:9], v[14:15]
	v_ldexp_f64 v[8:9], v[8:9], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[20:21], v[12:13]
	v_add_f64 v[16:17], v[22:23], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[20:21], -v[14:15]
	v_mul_f64 v[20:21], v[16:17], v[14:15]
	v_add_f64 v[22:23], v[16:17], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[18:19]
	v_fma_f64 v[18:19], v[16:17], v[14:15], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[22:23]
	v_fma_f64 v[12:13], v[16:17], v[12:13], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[12:13]
	v_frexp_exp_i32_f64_e32 v14, v[4:5]
	v_add_f64 v[12:13], v[20:21], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	v_cvt_f64_i32_e32 v[14:15], v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[8:9], v[12:13]
	v_add_f64 v[18:19], v[12:13], -v[20:21]
	v_mul_f64 v[20:21], v[14:15], s[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[16:17], -v[8:9]
	v_add_f64 v[10:11], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[14:15], s[0:1], -v[20:21]
	s_mov_b32 s1, 0xbfe62e42
	v_add_f64 v[8:9], v[12:13], -v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_fma_f64 v[10:11], v[14:15], s[4:5], v[18:19]
	s_mov_b32 s5, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[20:21], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[16:17], v[6:7]
	v_add_f64 v[20:21], v[8:9], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[8:9], v[12:13]
	v_add_f64 v[16:17], v[12:13], -v[16:17]
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[14:15], -v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[14:15], -v[18:19]
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_add_f64 v[16:17], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[22:23]
	v_add_f64 v[8:9], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[16:17], -v[10:11]
	v_add_f64 v[8:9], v[16:17], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	v_add_f64 v[18:19], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	v_add_f64 v[12:13], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[18:19], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], -v[18:19]
	v_mul_f64 v[12:13], v[2:3], v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[2:3], v[8:9], -v[12:13]
	v_cmp_class_f64_e64 vcc_lo, v[12:13], 0x204
	v_fma_f64 v[6:7], v[2:3], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[12:13], v[6:7]
	v_dual_cndmask_b32 v11, v9, v13 :: v_dual_cndmask_b32 v10, v8, v12
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[10:11], s[6:7]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[10:11]|
	v_add_f64 v[6:7], v[6:7], -v[8:9]
	v_mul_f64 v[8:9], v[2:3], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rndne_f64_e32 v[14:15], v[14:15]
	v_dual_cndmask_b32 v7, 0, v7 :: v_dual_cndmask_b32 v6, 0, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[14:15], s[0:1], v[10:11]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_cvt_i32_f64_e32 v20, v[14:15]
	v_fma_f64 v[16:17], v[14:15], s[4:5], v[16:17]
	s_mov_b32 s4, 0x6a5dcb37
	s_mov_b32 s5, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], s[4:5], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[10:11]
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[16:17], v[18:19], 1.0
	s_and_b32 vcc_lo, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[16:17], v[18:19], 1.0
	v_ldexp_f64 v[12:13], v[14:15], v20
	v_trunc_f64_e32 v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v13, 0x7ff00000, v13, s0
	v_cndmask_b32_e32 v10, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, 0, v13, s1
	v_trunc_f64_e32 v[12:13], v[8:9]
	v_cmp_eq_f64_e64 s1, v[14:15], v[2:3]
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[10:11]
	v_cmp_class_f64_e64 s0, v[10:11], 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_neq_f64_e32 vcc_lo, v[12:13], v[8:9]
	v_cndmask_b32_e64 v6, v6, v10, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v7, v7, v11, s0
	v_cmp_gt_f64_e64 s0, 0, v[4:5]
	v_cndmask_b32_e64 v8, 0, v6, s1
	s_and_b32 vcc_lo, s1, vcc_lo
	v_cndmask_b32_e32 v9, 0x3ff00000, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v7, 0x7fffffff, v7, v9
	v_cndmask_b32_e64 v9, 0x7ff80000, v7, s1
	v_cmp_gt_f64_e64 s1, 0, v[2:3]
	v_cndmask_b32_e64 v2, v6, v8, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v3, v7, v9, s0
	v_cmp_eq_f64_e64 s0, 0, v[4:5]
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_xor_b32 s1, s1, s0
	v_cndmask_b32_e64 v2, v2, 0, s0
	v_cndmask_b32_e64 v4, 0x7ff00000, 0, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v4, 0x7fffffff, v4, v5
	v_cndmask_b32_e64 v3, v3, v4, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f64_e32 v2, v[2:3]
	global_store_b32 v[0:1], v2, off
.LBB138_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_pow_scalarIiEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_pow_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i,comdat
.Lfunc_end138:
	.size	_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i, .Lfunc_end138-_Z17kernel_pow_scalarIiEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2240
; NumSgprs: 18
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i,comdat
	.protected	_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i ; -- Begin function _Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i
	.globl	_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i,@function
_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i: ; @_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB139_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_cmp_lg_u32 s4, 1
	v_cvt_f64_i32_e32 v[4:5], s4
	s_mov_b32 s4, 0x968915a9
	s_mov_b32 s6, 0x4222de17
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_mov_b32 s5, 0x3fba6564
	s_mov_b32 s7, 0x3fbdee67
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_mov_b32 s1, 0x3fe55555
	s_mov_b32 s0, 0x55555555
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cvt_f64_i32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, 0x3ff00000, v3, vcc_lo
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_neq_f64_e32 vcc_lo, 0, v[2:3]
	v_cndmask_b32_e32 v5, 0x3ff00000, v5, vcc_lo
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_frexp_mant_f64_e64 v[6:7], |v[4:5]|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[0:1], v[6:7]
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_ldexp_f64 v[6:7], v[6:7], v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[6:7], 1.0
	v_add_f64 v[14:15], v[6:7], -1.0
	v_rcp_f64_e32 v[10:11], v[8:9]
	v_add_f64 v[16:17], v[8:9], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[14:15], v[10:11]
	v_mul_f64 v[18:19], v[8:9], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[12:13], v[8:9], -v[18:19]
	v_fma_f64 v[6:7], v[12:13], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[18:19], v[6:7]
	v_add_f64 v[16:17], v[14:15], -v[8:9]
	v_add_f64 v[18:19], v[8:9], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	v_add_f64 v[6:7], v[18:19], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[14:15], -v[8:9]
	v_add_f64 v[6:7], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[16:17], v[6:7]
	v_mul_f64 v[6:7], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[12:13], v[6:7]
	v_add_f64 v[10:11], v[8:9], -v[12:13]
	v_mul_f64 v[12:13], v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	v_fma_f64 v[10:11], v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[6:7], v[6:7]
	v_fma_f64 v[10:11], v[8:9], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[12:13], v[10:11]
	v_fma_f64 v[16:17], v[14:15], s[6:7], s[4:5]
	s_mov_b32 s4, 0x3abe935a
	s_mov_b32 s5, 0x3fbe25e4
	v_add_f64 v[12:13], v[14:15], -v[12:13]
	v_mul_f64 v[22:23], v[8:9], v[14:15]
	s_mov_b32 s6, 0x652b82fe
	s_mov_b32 s7, 0x3ff71547
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x47e6c9c2
	s_mov_b32 s5, 0x3fc110ef
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0xcfa74449
	s_mov_b32 s5, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x71bf3c30
	s_mov_b32 s5, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x1c7792ce
	s_mov_b32 s5, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x924920da
	s_mov_b32 s5, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x9999999c
	s_mov_b32 s5, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s5, 0x3c7abc9e
	s_mov_b32 s4, 0x3b39803f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[14:15], v[16:17]
	v_fma_f64 v[12:13], v[14:15], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[16:17], v[12:13]
	v_add_f64 v[16:17], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[20:21], v[16:17], s[0:1]
	v_add_f64 v[18:19], v[16:17], -v[18:19]
	s_mov_b32 s1, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[24:25], v[20:21], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_fma_f64 v[18:19], v[14:15], v[8:9], -v[22:23]
	s_mov_b32 s0, 0xd5df274d
	s_mov_b32 s1, 0x3c8543b0
	v_add_f64 v[16:17], v[16:17], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], s[0:1]
	v_fma_f64 v[14:15], v[14:15], v[6:7], v[18:19]
	s_mov_b32 s1, 0x3fe62e42
	s_mov_b32 s0, 0xfefa39ef
	v_ldexp_f64 v[6:7], v[6:7], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[16:17]
	v_fma_f64 v[10:11], v[10:11], v[8:9], v[14:15]
	v_ldexp_f64 v[8:9], v[8:9], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[20:21], v[12:13]
	v_add_f64 v[16:17], v[22:23], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[20:21], -v[14:15]
	v_mul_f64 v[20:21], v[16:17], v[14:15]
	v_add_f64 v[22:23], v[16:17], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[18:19]
	v_fma_f64 v[18:19], v[16:17], v[14:15], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[22:23]
	v_fma_f64 v[12:13], v[16:17], v[12:13], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[12:13]
	v_frexp_exp_i32_f64_e32 v14, v[4:5]
	v_add_f64 v[12:13], v[20:21], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	v_cvt_f64_i32_e32 v[14:15], v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[8:9], v[12:13]
	v_add_f64 v[18:19], v[12:13], -v[20:21]
	v_mul_f64 v[20:21], v[14:15], s[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[16:17], -v[8:9]
	v_add_f64 v[10:11], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[14:15], s[0:1], -v[20:21]
	s_mov_b32 s1, 0xbfe62e42
	v_add_f64 v[8:9], v[12:13], -v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_fma_f64 v[10:11], v[14:15], s[4:5], v[18:19]
	s_mov_b32 s5, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[20:21], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[16:17], v[6:7]
	v_add_f64 v[20:21], v[8:9], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[8:9], v[12:13]
	v_add_f64 v[16:17], v[12:13], -v[16:17]
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[14:15], -v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[14:15], -v[18:19]
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_add_f64 v[16:17], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[22:23]
	v_add_f64 v[8:9], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[16:17], -v[10:11]
	v_add_f64 v[8:9], v[16:17], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	v_add_f64 v[18:19], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	v_add_f64 v[12:13], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[18:19], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], -v[18:19]
	v_mul_f64 v[12:13], v[2:3], v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[2:3], v[8:9], -v[12:13]
	v_cmp_class_f64_e64 vcc_lo, v[12:13], 0x204
	v_fma_f64 v[6:7], v[2:3], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[12:13], v[6:7]
	v_dual_cndmask_b32 v11, v9, v13 :: v_dual_cndmask_b32 v10, v8, v12
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[10:11], s[6:7]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[10:11]|
	v_add_f64 v[6:7], v[6:7], -v[8:9]
	v_mul_f64 v[8:9], v[2:3], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rndne_f64_e32 v[14:15], v[14:15]
	v_dual_cndmask_b32 v7, 0, v7 :: v_dual_cndmask_b32 v6, 0, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[14:15], s[0:1], v[10:11]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_cvt_i32_f64_e32 v20, v[14:15]
	v_fma_f64 v[16:17], v[14:15], s[4:5], v[16:17]
	s_mov_b32 s4, 0x6a5dcb37
	s_mov_b32 s5, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], s[4:5], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[10:11]
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[16:17], v[18:19], 1.0
	s_and_b32 vcc_lo, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[16:17], v[18:19], 1.0
	v_ldexp_f64 v[12:13], v[14:15], v20
	v_trunc_f64_e32 v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v13, 0x7ff00000, v13, s0
	v_cndmask_b32_e32 v10, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, 0, v13, s1
	v_trunc_f64_e32 v[12:13], v[8:9]
	v_cmp_eq_f64_e64 s1, v[14:15], v[2:3]
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[10:11]
	v_cmp_class_f64_e64 s0, v[10:11], 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_neq_f64_e32 vcc_lo, v[12:13], v[8:9]
	v_cndmask_b32_e64 v6, v6, v10, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v7, v7, v11, s0
	v_cmp_gt_f64_e64 s0, 0, v[4:5]
	v_cndmask_b32_e64 v8, 0, v6, s1
	s_and_b32 vcc_lo, s1, vcc_lo
	v_cndmask_b32_e32 v9, 0x3ff00000, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v7, 0x7fffffff, v7, v9
	v_cndmask_b32_e64 v9, 0x7ff80000, v7, s1
	v_cmp_gt_f64_e64 s1, 0, v[2:3]
	v_cndmask_b32_e64 v2, v6, v8, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v3, v7, v9, s0
	v_cmp_eq_f64_e64 s0, 0, v[4:5]
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_xor_b32 s1, s1, s0
	v_cndmask_b32_e64 v2, v2, 0, s0
	v_cndmask_b32_e64 v4, 0x7ff00000, 0, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v4, 0x7fffffff, v4, v5
	v_cndmask_b32_e64 v3, v3, v4, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f64_e32 v2, v[2:3]
	global_store_b32 v[0:1], v2, off
.LBB139_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i,comdat
.Lfunc_end139:
	.size	_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i, .Lfunc_end139-_Z21kernel_pow_scalar_invIiEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2236
; NumSgprs: 18
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z12kernel_equalIiEvPKT_S2_PS0_i,"axG",@progbits,_Z12kernel_equalIiEvPKT_S2_PS0_i,comdat
	.protected	_Z12kernel_equalIiEvPKT_S2_PS0_i ; -- Begin function _Z12kernel_equalIiEvPKT_S2_PS0_i
	.globl	_Z12kernel_equalIiEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z12kernel_equalIiEvPKT_S2_PS0_i,@function
_Z12kernel_equalIiEvPKT_S2_PS0_i:       ; @_Z12kernel_equalIiEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB140_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v2, v3
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB140_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12kernel_equalIiEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z12kernel_equalIiEvPKT_S2_PS0_i,"axG",@progbits,_Z12kernel_equalIiEvPKT_S2_PS0_i,comdat
.Lfunc_end140:
	.size	_Z12kernel_equalIiEvPKT_S2_PS0_i, .Lfunc_end140-_Z12kernel_equalIiEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z14kernel_greaterIiEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_greaterIiEvPKT_S2_PS0_i,comdat
	.protected	_Z14kernel_greaterIiEvPKT_S2_PS0_i ; -- Begin function _Z14kernel_greaterIiEvPKT_S2_PS0_i
	.globl	_Z14kernel_greaterIiEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z14kernel_greaterIiEvPKT_S2_PS0_i,@function
_Z14kernel_greaterIiEvPKT_S2_PS0_i:     ; @_Z14kernel_greaterIiEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB141_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v2, v3
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB141_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14kernel_greaterIiEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14kernel_greaterIiEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_greaterIiEvPKT_S2_PS0_i,comdat
.Lfunc_end141:
	.size	_Z14kernel_greaterIiEvPKT_S2_PS0_i, .Lfunc_end141-_Z14kernel_greaterIiEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_lessIiEvPKT_S2_PS0_i,"axG",@progbits,_Z11kernel_lessIiEvPKT_S2_PS0_i,comdat
	.protected	_Z11kernel_lessIiEvPKT_S2_PS0_i ; -- Begin function _Z11kernel_lessIiEvPKT_S2_PS0_i
	.globl	_Z11kernel_lessIiEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z11kernel_lessIiEvPKT_S2_PS0_i,@function
_Z11kernel_lessIiEvPKT_S2_PS0_i:        ; @_Z11kernel_lessIiEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB142_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v2, v3
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB142_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_lessIiEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_lessIiEvPKT_S2_PS0_i,"axG",@progbits,_Z11kernel_lessIiEvPKT_S2_PS0_i,comdat
.Lfunc_end142:
	.size	_Z11kernel_lessIiEvPKT_S2_PS0_i, .Lfunc_end142-_Z11kernel_lessIiEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z20kernel_greater_equalIiEvPKT_S2_PS0_i,"axG",@progbits,_Z20kernel_greater_equalIiEvPKT_S2_PS0_i,comdat
	.protected	_Z20kernel_greater_equalIiEvPKT_S2_PS0_i ; -- Begin function _Z20kernel_greater_equalIiEvPKT_S2_PS0_i
	.globl	_Z20kernel_greater_equalIiEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z20kernel_greater_equalIiEvPKT_S2_PS0_i,@function
_Z20kernel_greater_equalIiEvPKT_S2_PS0_i: ; @_Z20kernel_greater_equalIiEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB143_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v2, v3
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB143_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20kernel_greater_equalIiEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z20kernel_greater_equalIiEvPKT_S2_PS0_i,"axG",@progbits,_Z20kernel_greater_equalIiEvPKT_S2_PS0_i,comdat
.Lfunc_end143:
	.size	_Z20kernel_greater_equalIiEvPKT_S2_PS0_i, .Lfunc_end143-_Z20kernel_greater_equalIiEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z17kernel_less_equalIiEvPKT_S2_PS0_i,"axG",@progbits,_Z17kernel_less_equalIiEvPKT_S2_PS0_i,comdat
	.protected	_Z17kernel_less_equalIiEvPKT_S2_PS0_i ; -- Begin function _Z17kernel_less_equalIiEvPKT_S2_PS0_i
	.globl	_Z17kernel_less_equalIiEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z17kernel_less_equalIiEvPKT_S2_PS0_i,@function
_Z17kernel_less_equalIiEvPKT_S2_PS0_i:  ; @_Z17kernel_less_equalIiEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB144_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, v2, v3
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB144_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_less_equalIiEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z17kernel_less_equalIiEvPKT_S2_PS0_i,"axG",@progbits,_Z17kernel_less_equalIiEvPKT_S2_PS0_i,comdat
.Lfunc_end144:
	.size	_Z17kernel_less_equalIiEvPKT_S2_PS0_i, .Lfunc_end144-_Z17kernel_less_equalIiEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z19kernel_equal_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i,comdat
	.protected	_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i ; -- Begin function _Z19kernel_equal_scalarIiEvPKT_PS0_S0_i
	.globl	_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i,@function
_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i: ; @_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB145_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, s2, v2
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB145_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19kernel_equal_scalarIiEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z19kernel_equal_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i,comdat
.Lfunc_end145:
	.size	_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i, .Lfunc_end145-_Z19kernel_equal_scalarIiEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z21kernel_greater_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i,comdat
	.protected	_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i ; -- Begin function _Z21kernel_greater_scalarIiEvPKT_PS0_S0_i
	.globl	_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i,@function
_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i: ; @_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB146_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, s2, v2
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB146_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_greater_scalarIiEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_greater_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i,comdat
.Lfunc_end146:
	.size	_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i, .Lfunc_end146-_Z21kernel_greater_scalarIiEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z18kernel_less_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z18kernel_less_scalarIiEvPKT_PS0_S0_i,comdat
	.protected	_Z18kernel_less_scalarIiEvPKT_PS0_S0_i ; -- Begin function _Z18kernel_less_scalarIiEvPKT_PS0_S0_i
	.globl	_Z18kernel_less_scalarIiEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z18kernel_less_scalarIiEvPKT_PS0_S0_i,@function
_Z18kernel_less_scalarIiEvPKT_PS0_S0_i: ; @_Z18kernel_less_scalarIiEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB147_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB147_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18kernel_less_scalarIiEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z18kernel_less_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z18kernel_less_scalarIiEvPKT_PS0_S0_i,comdat
.Lfunc_end147:
	.size	_Z18kernel_less_scalarIiEvPKT_PS0_S0_i, .Lfunc_end147-_Z18kernel_less_scalarIiEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i,comdat
	.protected	_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i ; -- Begin function _Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i
	.globl	_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i,@function
_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i: ; @_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB148_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, s2, v2
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB148_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i,comdat
.Lfunc_end148:
	.size	_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i, .Lfunc_end148-_Z27kernel_greater_equal_scalarIiEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i,comdat
	.protected	_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i ; -- Begin function _Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i
	.globl	_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i,@function
_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i: ; @_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB149_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s2, v2
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB149_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i,comdat
.Lfunc_end149:
	.size	_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i, .Lfunc_end149-_Z24kernel_less_equal_scalarIiEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z14kernel_replaceIiEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_replaceIiEvPKT_S2_PS0_i,comdat
	.protected	_Z14kernel_replaceIiEvPKT_S2_PS0_i ; -- Begin function _Z14kernel_replaceIiEvPKT_S2_PS0_i
	.globl	_Z14kernel_replaceIiEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z14kernel_replaceIiEvPKT_S2_PS0_i,@function
_Z14kernel_replaceIiEvPKT_S2_PS0_i:     ; @_Z14kernel_replaceIiEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB150_3
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB150_3
; %bb.2:
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	s_load_b64 s[0:1], s[0:1], 0x10
	global_load_b32 v2, v[2:3], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB150_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14kernel_replaceIiEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14kernel_replaceIiEvPKT_S2_PS0_i,"axG",@progbits,_Z14kernel_replaceIiEvPKT_S2_PS0_i,comdat
.Lfunc_end150:
	.size	_Z14kernel_replaceIiEvPKT_S2_PS0_i, .Lfunc_end150-_Z14kernel_replaceIiEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 196
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z21kernel_replace_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i,comdat
	.protected	_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i ; -- Begin function _Z21kernel_replace_scalarIiEvPKT_PS0_S0_i
	.globl	_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i
	.p2align	8
	.type	_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i,@function
_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i: ; @_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB151_3
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB151_3
; %bb.2:
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_mov_b32_e32 v2, s4
	global_store_b32 v[0:1], v2, off
.LBB151_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_replace_scalarIiEvPKT_PS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_replace_scalarIiEvPKT_PS0_S0_i,"axG",@progbits,_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i,comdat
.Lfunc_end151:
	.size	_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i, .Lfunc_end151-_Z21kernel_replace_scalarIiEvPKT_PS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_sumIiEvPKT_PS0_i,"axG",@progbits,_Z10kernel_sumIiEvPKT_PS0_i,comdat
	.protected	_Z10kernel_sumIiEvPKT_PS0_i ; -- Begin function _Z10kernel_sumIiEvPKT_PS0_i
	.globl	_Z10kernel_sumIiEvPKT_PS0_i
	.p2align	8
	.type	_Z10kernel_sumIiEvPKT_PS0_i,@function
_Z10kernel_sumIiEvPKT_PS0_i:            ; @_Z10kernel_sumIiEvPKT_PS0_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x24
	s_load_b32 s8, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_add_u32 s0, s0, 24
	s_mov_b32 s2, s15
	s_addc_u32 s1, s1, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s9, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	v_cmpx_gt_u32_e64 s8, v1
	s_cbranch_execz .LBB152_4
; %bb.1:                                ; %.lr.ph
	s_load_b32 s1, s[0:1], 0x0
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, 0
	s_mov_b32 s0, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s1, s3
.LBB152_2:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s8, v1
	global_load_b32 v4, v[4:5], off
	s_or_b32 s0, vcc_lo, s0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB152_2
; %bb.3:                                ; %Flow40
	s_or_b32 exec_lo, exec_lo, s0
.LBB152_4:                              ; %Flow41
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
	v_lshlrev_b32_e32 v1, 2, v0
	s_cmp_lt_u32 s3, 2
	ds_store_b32 v1, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB152_5:                              ; %._crit_edge
                                        ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB152_9
; %bb.6:                                ; %.lr.ph30
                                        ;   in Loop: Header=BB152_5 Depth=1
	s_lshr_b32 s0, s3, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB152_8
; %bb.7:                                ;   in Loop: Header=BB152_5 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB152_8:                              ;   in Loop: Header=BB152_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s0
	s_branch .LBB152_5
.LBB152_9:                              ; %._crit_edge31
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB152_11
; %bb.10:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB152_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_sumIiEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_sumIiEvPKT_PS0_i,"axG",@progbits,_Z10kernel_sumIiEvPKT_PS0_i,comdat
.Lfunc_end152:
	.size	_Z10kernel_sumIiEvPKT_PS0_i, .Lfunc_end152-_Z10kernel_sumIiEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 376
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_minIiEvPKT_PS0_i,"axG",@progbits,_Z10kernel_minIiEvPKT_PS0_i,comdat
	.protected	_Z10kernel_minIiEvPKT_PS0_i ; -- Begin function _Z10kernel_minIiEvPKT_PS0_i
	.globl	_Z10kernel_minIiEvPKT_PS0_i
	.p2align	8
	.type	_Z10kernel_minIiEvPKT_PS0_i,@function
_Z10kernel_minIiEvPKT_PS0_i:            ; @_Z10kernel_minIiEvPKT_PS0_i
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s3, s[0:1], 0x24
	s_load_b32 s8, s[0:1], 0x10
	s_add_u32 s0, s0, 24
	s_mov_b32 s2, s15
	s_addc_u32 s1, s1, 0
	s_mov_b32 s9, exec_lo
	s_waitcnt lgkmcnt(0)
	s_load_b32 s10, s[4:5], 0x0
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v3, s10
	v_cmpx_gt_u32_e64 s8, v1
	s_cbranch_execz .LBB153_4
; %bb.1:                                ; %.lr.ph
	s_load_b32 s1, s[0:1], 0x0
	v_dual_mov_b32 v3, s10 :: v_dual_mov_b32 v2, 0
	s_mov_b32 s0, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s1, s3
.LBB153_2:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s8, v1
	global_load_b32 v4, v[4:5], off
	s_or_b32 s0, vcc_lo, s0
	s_waitcnt vmcnt(0)
	v_min_i32_e32 v3, v3, v4
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB153_2
; %bb.3:                                ; %Flow50
	s_or_b32 exec_lo, exec_lo, s0
.LBB153_4:                              ; %Flow51
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
	v_lshlrev_b32_e32 v1, 2, v0
	s_cmp_lt_u32 s3, 2
	ds_store_b32 v1, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB153_5:                              ; %._crit_edge
                                        ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB153_9
; %bb.6:                                ; %.lr.ph40
                                        ;   in Loop: Header=BB153_5 Depth=1
	s_lshr_b32 s0, s3, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB153_8
; %bb.7:                                ;   in Loop: Header=BB153_5 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v3, v1
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_min_i32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB153_8:                              ;   in Loop: Header=BB153_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s0
	s_branch .LBB153_5
.LBB153_9:                              ; %._crit_edge41
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB153_11
; %bb.10:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB153_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_minIiEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_minIiEvPKT_PS0_i,"axG",@progbits,_Z10kernel_minIiEvPKT_PS0_i,comdat
.Lfunc_end153:
	.size	_Z10kernel_minIiEvPKT_PS0_i, .Lfunc_end153-_Z10kernel_minIiEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 388
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10kernel_maxIiEvPKT_PS0_i,"axG",@progbits,_Z10kernel_maxIiEvPKT_PS0_i,comdat
	.protected	_Z10kernel_maxIiEvPKT_PS0_i ; -- Begin function _Z10kernel_maxIiEvPKT_PS0_i
	.globl	_Z10kernel_maxIiEvPKT_PS0_i
	.p2align	8
	.type	_Z10kernel_maxIiEvPKT_PS0_i,@function
_Z10kernel_maxIiEvPKT_PS0_i:            ; @_Z10kernel_maxIiEvPKT_PS0_i
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s3, s[0:1], 0x24
	s_load_b32 s8, s[0:1], 0x10
	s_add_u32 s0, s0, 24
	s_mov_b32 s2, s15
	s_addc_u32 s1, s1, 0
	s_mov_b32 s9, exec_lo
	s_waitcnt lgkmcnt(0)
	s_load_b32 s10, s[4:5], 0x0
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v3, s10
	v_cmpx_gt_u32_e64 s8, v1
	s_cbranch_execz .LBB154_4
; %bb.1:                                ; %.lr.ph
	s_load_b32 s1, s[0:1], 0x0
	v_dual_mov_b32 v3, s10 :: v_dual_mov_b32 v2, 0
	s_mov_b32 s0, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s1, s3
.LBB154_2:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s8, v1
	global_load_b32 v4, v[4:5], off
	s_or_b32 s0, vcc_lo, s0
	s_waitcnt vmcnt(0)
	v_max_i32_e32 v3, v3, v4
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB154_2
; %bb.3:                                ; %Flow50
	s_or_b32 exec_lo, exec_lo, s0
.LBB154_4:                              ; %Flow51
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
	v_lshlrev_b32_e32 v1, 2, v0
	s_cmp_lt_u32 s3, 2
	ds_store_b32 v1, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB154_5:                              ; %._crit_edge
                                        ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB154_9
; %bb.6:                                ; %.lr.ph40
                                        ;   in Loop: Header=BB154_5 Depth=1
	s_lshr_b32 s0, s3, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB154_8
; %bb.7:                                ;   in Loop: Header=BB154_5 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v3, v1
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_max_i32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB154_8:                              ;   in Loop: Header=BB154_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s0
	s_branch .LBB154_5
.LBB154_9:                              ; %._crit_edge41
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB154_11
; %bb.10:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB154_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_maxIiEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10kernel_maxIiEvPKT_PS0_i,"axG",@progbits,_Z10kernel_maxIiEvPKT_PS0_i,comdat
.Lfunc_end154:
	.size	_Z10kernel_maxIiEvPKT_PS0_i, .Lfunc_end154-_Z10kernel_maxIiEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 388
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z13kernel_pad_2dIiEvPKT_PS0_iiiiii,"axG",@progbits,_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii,comdat
	.protected	_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii ; -- Begin function _Z13kernel_pad_2dIiEvPKT_PS0_iiiiii
	.globl	_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii
	.p2align	8
	.type	_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii,@function
_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii:    ; @_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[4:5], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB155_2
; %bb.1:
	s_load_b256 s[8:15], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	v_add_nc_u32_e32 v1, s13, v1
	s_add_i32 s0, s14, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_i32 s0, s0, s4
	global_load_b32 v2, v[2:3], off
	v_mul_lo_u32 v1, v1, s0
	v_add3_u32 v0, v0, s12, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB155_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13kernel_pad_2dIiEvPKT_PS0_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13kernel_pad_2dIiEvPKT_PS0_iiiiii,"axG",@progbits,_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii,comdat
.Lfunc_end155:
	.size	_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii, .Lfunc_end155-_Z13kernel_pad_2dIiEvPKT_PS0_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 252
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii,"axG",@progbits,_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii,comdat
	.protected	_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii ; -- Begin function _Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii
	.globl	_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii
	.p2align	8
	.type	_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii,@function
_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii:  ; @_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[4:5], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB156_2
; %bb.1:
	s_load_b256 s[8:15], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, s13, v1
	s_add_i32 s0, s14, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s0, s0, s4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v2, v2, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v2, v0, s12, v2
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s8, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v4, v[2:3], off
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v4, off
.LBB156_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii,"axG",@progbits,_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii,comdat
.Lfunc_end156:
	.size	_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii, .Lfunc_end156-_Z15kernel_unpad_2dIiEvPKT_PS0_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 260
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii,comdat
	.protected	_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii ; -- Begin function _Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii
	.globl	_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii
	.p2align	8
	.type	_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii,@function
_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii: ; @_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x44
	s_load_b128 s[4:7], s[0:1], 0x28
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s7, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s6, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB157_2
; %bb.1:
	v_mad_u64_u32 v[3:4], null, v2, s5, v[1:2]
	s_clause 0x1
	s_load_b256 s[8:15], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v3, s4, v[0:1]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, s14, v2
	s_add_i32 s0, s0, s13
	s_add_i32 s0, s0, s5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v2, v2, s0
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	s_add_i32 s0, s15, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_i32 s0, s0, s4
	global_load_b32 v3, v[3:4], off
	v_add3_u32 v1, v1, s13, v2
	v_mul_lo_u32 v1, v1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v0, v0, s12, v1
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v3, off
.LBB157_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii,comdat
.Lfunc_end157:
	.size	_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii, .Lfunc_end157-_Z13kernel_pad_3dIiEvPKT_PS0_iiiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 344
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii,comdat
	.protected	_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii ; -- Begin function _Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii
	.globl	_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii
	.p2align	8
	.type	_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii,@function
_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii: ; @_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x44
	s_load_b128 s[4:7], s[0:1], 0x28
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s7, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s6, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB158_2
; %bb.1:
	s_clause 0x1
	s_load_b256 s[8:15], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v3, s14, v2
	s_add_i32 s0, s0, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s0, s0, s5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v3, v3, s0
	s_add_i32 s0, s15, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s0, s0, s4
	v_add3_u32 v3, v1, s13, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v3, s0
	v_add3_u32 v3, v0, s12, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	global_load_b32 v5, v[3:4], off
	v_mad_u64_u32 v[3:4], null, v2, s5, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v3, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v5, off
.LBB158_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii,"axG",@progbits,_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii,comdat
.Lfunc_end158:
	.size	_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii, .Lfunc_end158-_Z15kernel_unpad_3dIiEvPKT_PS0_iiiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 352
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z14kernel_grid_2dIiEvPT_S1_Pdii,"axG",@progbits,_Z14kernel_grid_2dIiEvPT_S1_Pdii,comdat
	.protected	_Z14kernel_grid_2dIiEvPT_S1_Pdii ; -- Begin function _Z14kernel_grid_2dIiEvPT_S1_Pdii
	.globl	_Z14kernel_grid_2dIiEvPT_S1_Pdii
	.p2align	8
	.type	_Z14kernel_grid_2dIiEvPT_S1_Pdii,@function
_Z14kernel_grid_2dIiEvPT_S1_Pdii:       ; @_Z14kernel_grid_2dIiEvPT_S1_Pdii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b64 s[20:21], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s20, v0
	v_cmp_gt_i32_e64 s2, s21, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB159_2
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x10
	v_cvt_f64_i32_e32 v[2:3], v0
	v_cvt_f64_i32_e32 v[8:9], v1
	s_waitcnt lgkmcnt(0)
	s_load_b512 s[4:19], s[2:3], 0x0
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], s[12:13], s[4:5]
	v_mul_f64 v[6:7], s[16:17], s[4:5]
	v_mul_f64 v[10:11], s[14:15], s[6:7]
	v_mul_f64 v[12:13], s[18:19], s[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[4:5], v[4:5], v[2:3]
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[10:11], v[8:9], v[4:5]
	v_fma_f64 v[2:3], v[12:13], v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], s[8:9], v[4:5]
	v_add_f64 v[2:3], s[10:11], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v4, v[4:5]
	v_cvt_i32_f64_e32 v5, v[2:3]
	v_mad_u64_u32 v[2:3], null, v1, s20, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[2:3], v4, off
	global_store_b32 v[0:1], v5, off
.LBB159_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14kernel_grid_2dIiEvPT_S1_Pdii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14kernel_grid_2dIiEvPT_S1_Pdii,"axG",@progbits,_Z14kernel_grid_2dIiEvPT_S1_Pdii,comdat
.Lfunc_end159:
	.size	_Z14kernel_grid_2dIiEvPT_S1_Pdii, .Lfunc_end159-_Z14kernel_grid_2dIiEvPT_S1_Pdii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 328
; NumSgprs: 24
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii,"axG",@progbits,_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii,comdat
	.protected	_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii ; -- Begin function _Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii
	.globl	_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii
	.p2align	8
	.type	_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii,@function
_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii:   ; @_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x3c
	s_load_b128 s[36:39], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s4, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s36, v0
	v_cmp_gt_i32_e64 s2, s37, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s38, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB160_2
; %bb.1:
	s_load_b256 s[16:23], s[0:1], 0x0
	v_cvt_f64_i32_e32 v[3:4], v0
	v_cvt_f64_i32_e32 v[11:12], v1
	s_waitcnt lgkmcnt(0)
	s_clause 0x2
	s_load_b512 s[0:15], s[22:23], 0x0
	s_load_b256 s[24:31], s[22:23], 0x40
	s_load_b128 s[40:43], s[22:23], 0x60
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[5:6], s[12:13], s[0:1]
	v_mul_f64 v[7:8], s[26:27], s[0:1]
	v_mul_f64 v[9:10], s[40:41], s[0:1]
	v_mul_f64 v[13:14], s[14:15], s[2:3]
	v_mul_f64 v[15:16], s[28:29], s[2:3]
	v_mul_f64 v[17:18], s[42:43], s[2:3]
	s_load_b64 s[0:1], s[22:23], 0x70
	v_mul_f64 v[19:20], s[24:25], s[4:5]
	v_mul_f64 v[21:22], s[30:31], s[4:5]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[23:24], s[0:1], s[4:5]
	v_mul_f64 v[5:6], v[5:6], v[3:4]
	v_mul_f64 v[7:8], v[7:8], v[3:4]
	v_mul_f64 v[3:4], v[9:10], v[3:4]
	v_cvt_f64_i32_e32 v[9:10], v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[5:6], v[13:14], v[11:12], v[5:6]
	v_fma_f64 v[7:8], v[15:16], v[11:12], v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[3:4], v[17:18], v[11:12], v[3:4]
	v_fma_f64 v[5:6], v[19:20], v[9:10], v[5:6]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[7:8], v[21:22], v[9:10], v[7:8]
	v_fma_f64 v[3:4], v[23:24], v[9:10], v[3:4]
	v_mad_u64_u32 v[9:10], null, v2, s37, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v9, s36, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s16, v0
	v_add_f64 v[5:6], s[6:7], v[5:6]
	v_add_f64 v[7:8], s[8:9], v[7:8]
	v_add_f64 v[3:4], s[10:11], v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_i32_f64_e32 v6, v[5:6]
	v_cvt_i32_f64_e32 v7, v[7:8]
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_i32_f64_e32 v8, v[3:4]
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s19, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s20, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s21, v1, vcc_lo
	global_store_b32 v[2:3], v6, off
	global_store_b32 v[4:5], v7, off
	global_store_b32 v[0:1], v8, off
.LBB160_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 44
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii,"axG",@progbits,_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii,comdat
.Lfunc_end160:
	.size	_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii, .Lfunc_end160-_Z14kernel_grid_3dIiEvPT_S1_S1_Pdiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 520
; NumSgprs: 46
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 46
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i,"axG",@progbits,_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i,comdat
	.protected	_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i ; -- Begin function _Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i
	.globl	_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i
	.p2align	8
	.type	_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i,@function
_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i: ; @_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b32 s3, s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB161_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	s_load_b64 s[4:5], s[0:1], 0x20
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v[4:5], off
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	s_load_b128 s[0:3], s[4:5], 0x0
	s_load_b64 s[4:5], s[4:5], 0x10
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_mul_lo_u32 v8, v6, s0
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v9, v7, s1
	v_add_co_u32 v6, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	v_add3_u32 v8, v8, s4, v9
	global_store_b32 v[6:7], v8, off
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(1)
	v_mul_lo_u32 v2, v2, s2
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v3, v3, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v2, v2, s5, v3
	global_store_b32 v[0:1], v2, off
.LBB161_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i,"axG",@progbits,_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i,comdat
.Lfunc_end161:
	.size	_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i, .Lfunc_end161-_Z16kernel_affine_2dIiEvPKT_S2_PS0_S3_S2_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 300
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i,"axG",@progbits,_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i,comdat
	.protected	_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i ; -- Begin function _Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i
	.globl	_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i
	.p2align	8
	.type	_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i,@function
_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i: ; @_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b32 s3, s[0:1], 0x38
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB162_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v8, v[2:3], off
	global_load_b32 v9, v[4:5], off
	global_load_b32 v10, v[6:7], off
	s_load_b256 s[0:7], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	s_load_b128 s[20:23], s[4:5], 0x20
	s_load_b256 s[12:19], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s4, s21
	s_waitcnt vmcnt(2)
	v_mul_lo_u32 v11, v8, s13
	s_waitcnt vmcnt(1)
	v_mul_lo_u32 v12, v9, s14
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[8:9], null, v10, s12, s[4:5]
	v_add_co_u32 v9, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v8, v8, v11, v12
	global_store_b32 v[9:10], v8, off
	global_load_b32 v8, v[2:3], off
	global_load_b32 v9, v[4:5], off
	global_load_b32 v10, v[6:7], off
	s_waitcnt vmcnt(2)
	v_mul_lo_u32 v11, v8, s16
	s_waitcnt vmcnt(1)
	v_mul_lo_u32 v12, v9, s17
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[8:9], null, v10, s15, s[22:23]
	v_add_co_u32 v9, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v1, vcc_lo
	s_mov_b32 s0, s23
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add3_u32 v8, v8, v11, v12
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[9:10], v8, off
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	global_load_b32 v4, v[6:7], off
	s_waitcnt vmcnt(2)
	v_mul_lo_u32 v5, v2, s19
	s_waitcnt vmcnt(1)
	v_mul_lo_u32 v6, v3, s20
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[2:3], null, v4, s18, s[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v2, v2, v5, v6
	global_store_b32 v[0:1], v2, off
.LBB162_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i,"axG",@progbits,_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i,comdat
.Lfunc_end162:
	.size	_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i, .Lfunc_end162-_Z16kernel_affine_3dIiEvPKT_S2_S2_PS0_S3_S3_S2_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 460
; NumSgprs: 26
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi,comdat
	.protected	_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi ; -- Begin function _Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi
	.globl	_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi
	.p2align	8
	.type	_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi,@function
_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi: ; @_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b32 s3, s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB163_2
; %bb.1:
	s_load_b256 s[12:19], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s14, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v1, vcc_lo
	global_load_b32 v8, v[2:3], off
	s_load_b512 s[0:15], s[0:1], 0x0
	global_load_b32 v12, v[4:5], off
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[6:7], s[10:11], s[2:3]
	v_mul_f64 v[10:11], s[8:9], s[0:1]
	s_waitcnt vmcnt(1)
	v_cvt_f64_i32_e32 v[8:9], v8
	s_waitcnt vmcnt(0)
	v_cvt_f64_i32_e32 v[12:13], v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[6:7], v[8:9]
	v_fma_f64 v[6:7], v[10:11], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], s[4:5], v[6:7]
	v_cvt_i32_f64_e32 v8, v[6:7]
	v_add_co_u32 v6, vcc_lo, s16, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s17, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v1, vcc_lo
	global_store_b32 v[6:7], v8, off
	global_load_b32 v6, v[2:3], off
	global_load_b32 v8, v[4:5], off
	v_mul_f64 v[2:3], s[14:15], s[2:3]
	s_waitcnt vmcnt(1)
	v_cvt_f64_i32_e32 v[4:5], v6
	v_mul_f64 v[6:7], s[12:13], s[0:1]
	s_waitcnt vmcnt(0)
	v_cvt_f64_i32_e32 v[8:9], v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], v[4:5]
	v_fma_f64 v[2:3], v[6:7], v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], s[6:7], v[2:3]
	v_cvt_i32_f64_e32 v2, v[2:3]
	global_store_b32 v[0:1], v2, off
.LBB163_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi,comdat
.Lfunc_end163:
	.size	_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi, .Lfunc_end163-_Z20kernel_affine_sod_2dIiEvPKT_S2_PS0_S3_PKdi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 356
; NumSgprs: 22
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi,comdat
	.protected	_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi ; -- Begin function _Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi
	.globl	_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi
	.p2align	8
	.type	_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi,@function
_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi: ; @_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b32 s3, s[0:1], 0x38
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB164_2
; %bb.1:
	s_load_b256 s[12:19], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b256 s[20:27], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s14, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v1, vcc_lo
	global_load_b32 v10, v[2:3], off
	v_add_co_u32 v6, vcc_lo, s16, v0
	global_load_b32 v14, v[4:5], off
	v_add_co_ci_u32_e32 v7, vcc_lo, s17, v1, vcc_lo
	s_clause 0x1
	s_load_b512 s[0:15], s[24:25], 0x0
	s_load_b256 s[36:43], s[24:25], 0x40
	global_load_b32 v16, v[6:7], off
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[8:9], s[14:15], s[2:3]
	v_mul_f64 v[12:13], s[12:13], s[0:1]
	s_waitcnt vmcnt(2)
	v_cvt_f64_i32_e32 v[10:11], v10
	s_waitcnt vmcnt(1)
	v_cvt_f64_i32_e32 v[14:15], v14
	s_waitcnt vmcnt(0)
	v_cvt_f64_i32_e32 v[16:17], v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[8:9], v[8:9], v[10:11]
	v_mul_f64 v[10:11], s[36:37], s[4:5]
	v_fma_f64 v[8:9], v[12:13], v[14:15], v[8:9]
	v_mul_f64 v[12:13], s[38:39], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[10:11], v[16:17], v[8:9]
	v_add_f64 v[8:9], s[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f64_e32 v10, v[8:9]
	v_add_co_u32 v8, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s19, v1, vcc_lo
	global_store_b32 v[8:9], v10, off
	global_load_b32 v10, v[2:3], off
	global_load_b32 v14, v[4:5], off
	global_load_b32 v16, v[6:7], off
	v_mul_f64 v[8:9], s[40:41], s[2:3]
	s_waitcnt vmcnt(2)
	v_cvt_f64_i32_e32 v[10:11], v10
	s_waitcnt vmcnt(1)
	v_cvt_f64_i32_e32 v[14:15], v14
	s_waitcnt vmcnt(0)
	v_cvt_f64_i32_e32 v[16:17], v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[8:9], v[8:9], v[10:11]
	v_mul_f64 v[10:11], s[42:43], s[4:5]
	v_fma_f64 v[8:9], v[12:13], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[10:11], v[16:17], v[8:9]
	v_add_f64 v[8:9], s[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f64_e32 v10, v[8:9]
	v_add_co_u32 v8, vcc_lo, s20, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s21, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s22, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s23, v1, vcc_lo
	global_store_b32 v[8:9], v10, off
	global_load_b32 v8, v[2:3], off
	global_load_b32 v9, v[4:5], off
	global_load_b32 v10, v[6:7], off
	s_load_b128 s[12:15], s[24:25], 0x60
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[2:3], s[14:15], s[2:3]
	v_mul_f64 v[6:7], s[12:13], s[0:1]
	s_load_b64 s[0:1], s[24:25], 0x70
	s_waitcnt vmcnt(2)
	v_cvt_f64_i32_e32 v[4:5], v8
	s_waitcnt vmcnt(1)
	v_cvt_f64_i32_e32 v[8:9], v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], v[2:3], v[4:5]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[4:5], s[0:1], s[4:5]
	v_fma_f64 v[2:3], v[6:7], v[8:9], v[2:3]
	s_waitcnt vmcnt(0)
	v_cvt_f64_i32_e32 v[6:7], v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[4:5], v[6:7], v[2:3]
	v_add_f64 v[2:3], s[10:11], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f64_e32 v2, v[2:3]
	global_store_b32 v[0:1], v2, off
.LBB164_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 18
		.amdhsa_next_free_sgpr 44
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi,"axG",@progbits,_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi,comdat
.Lfunc_end164:
	.size	_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi, .Lfunc_end164-_Z20kernel_affine_sod_3dIiEvPKT_S2_S2_PS0_S3_S3_PKdi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 616
; NumSgprs: 46
; NumVgprs: 18
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 46
; NumVGPRsForWavesPerEU: 18
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i,"axG",@progbits,_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i,comdat
	.protected	_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i ; -- Begin function _Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i
	.globl	_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i
	.p2align	8
	.type	_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i,@function
_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i: ; @_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b32 s3, s[0:1], 0x30
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB165_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b128 s[0:3], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v[4:5], off
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v8, v7, v6
	v_add_co_u32 v6, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v1, vcc_lo
	global_store_b32 v[2:3], v8, off
	global_load_b32 v2, v[4:5], off
	global_load_b32 v3, v[6:7], off
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB165_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i,"axG",@progbits,_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i,comdat
.Lfunc_end165:
	.size	_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i, .Lfunc_end165-_Z16kernel_dfield_2dIiEvPKT_S2_S2_S2_PS0_S3_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,"axG",@progbits,_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,comdat
	.protected	_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i ; -- Begin function _Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.globl	_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
	.p2align	8
	.type	_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,@function
_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i: ; @_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x5c
	s_load_b32 s3, s[0:1], 0x48
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB166_2
; %bb.1:
	s_load_b512 s[4:19], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v[4:5], off
	v_add_co_u32 v2, vcc_lo, s16, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v8, v7, v6
	v_add_co_u32 v6, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v1, vcc_lo
	global_store_b32 v[2:3], v8, off
	global_load_b32 v8, v[4:5], off
	global_load_b32 v6, v[6:7], off
	v_add_co_u32 v2, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s19, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v8, v6, v8
	v_add_co_u32 v6, vcc_lo, s14, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s15, v1, vcc_lo
	global_store_b32 v[2:3], v8, off
	global_load_b32 v2, v[4:5], off
	global_load_b32 v3, v[6:7], off
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB166_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,"axG",@progbits,_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i,comdat
.Lfunc_end166:
	.size	_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i, .Lfunc_end166-_Z16kernel_dfield_3dIiEvPKT_S2_S2_S2_S2_S2_PS0_S3_S3_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 316
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z16kernel_gradientxIiEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientxIiEvPKT_PS0_iii,comdat
	.protected	_Z16kernel_gradientxIiEvPKT_PS0_iii ; -- Begin function _Z16kernel_gradientxIiEvPKT_PS0_iii
	.globl	_Z16kernel_gradientxIiEvPKT_PS0_iii
	.p2align	8
	.type	_Z16kernel_gradientxIiEvPKT_PS0_iii,@function
_Z16kernel_gradientxIiEvPKT_PS0_iii:    ; @_Z16kernel_gradientxIiEvPKT_PS0_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x10
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[5:6], null, s14, s3, v[4:5]
	v_mad_u64_u32 v[1:2], null, s13, s2, v[3:4]
	v_cmp_gt_i32_e64 s2, s5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB167_11
; %bb.1:
	s_load_b32 s2, s[0:1], 0x30
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[6:7], null, s15, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v6
	v_cmp_gt_i32_e64 s2, s6, v6
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB167_11
; %bb.2:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr3_vgpr4
	v_cmpx_ne_u32_e32 0, v1
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB167_8
; %bb.3:
	s_add_i32 s7, s4, -1
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s7, v1
	s_and_saveexec_b32 s7, vcc_lo
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB167_5
; %bb.4:
	v_mul_lo_u32 v7, v5, s4
	s_mul_i32 s8, s5, s4
	v_ashrrev_i32_e32 v0, 31, v1
	v_mul_lo_u32 v6, s8, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v7
	v_add_co_u32 v4, vcc_lo, v1, v7
	v_ashrrev_i32_e32 v3, 31, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v0, vcc_lo, v0, v2, vcc_lo
	v_add_co_u32 v2, vcc_lo, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, v0, v3, vcc_lo
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[2:3], off offset:-4
	global_load_b32 v4, v[2:3], off offset:4
	s_waitcnt vmcnt(1)
	v_cvt_f64_i32_e32 v[2:3], v0
	s_waitcnt vmcnt(0)
	v_cvt_f64_i32_e32 v[4:5], v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], 0.5
	v_fma_f64 v[2:3], v[4:5], 0.5, -v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v0, v[2:3]
	v_add3_u32 v3, v7, v1, v6
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr6_vgpr7
                                        ; implicit-def: $vgpr1_vgpr2
	v_ashrrev_i32_e32 v4, 31, v3
.LBB167_5:                              ; %Flow
	s_and_not1_saveexec_b32 s7, s7
	s_cbranch_execz .LBB167_7
; %bb.6:
	s_mul_i32 s8, s5, s4
	v_mul_lo_u32 v0, v5, s4
	v_mul_lo_u32 v2, s8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v0, v1, v2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off offset:-4
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v1, v0
.LBB167_7:                              ; %Flow100
	s_or_b32 exec_lo, exec_lo, s7
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr6_vgpr7
.LBB167_8:                              ; %Flow101
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB167_10
; %bb.9:
	v_mul_lo_u32 v0, v5, s4
	s_mul_i32 s4, s5, s4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[3:4], null, s4, v6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v1, v0
.LBB167_10:                             ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB167_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_gradientxIiEvPKT_PS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_gradientxIiEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientxIiEvPKT_PS0_iii,comdat
.Lfunc_end167:
	.size	_Z16kernel_gradientxIiEvPKT_PS0_iii, .Lfunc_end167-_Z16kernel_gradientxIiEvPKT_PS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 640
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z16kernel_gradientyIiEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientyIiEvPKT_PS0_iii,comdat
	.protected	_Z16kernel_gradientyIiEvPKT_PS0_iii ; -- Begin function _Z16kernel_gradientyIiEvPKT_PS0_iii
	.globl	_Z16kernel_gradientyIiEvPKT_PS0_iii
	.p2align	8
	.type	_Z16kernel_gradientyIiEvPKT_PS0_iii,@function
_Z16kernel_gradientyIiEvPKT_PS0_iii:    ; @_Z16kernel_gradientyIiEvPKT_PS0_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x10
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s13, s2, v[3:4]
	v_mad_u64_u32 v[2:3], null, s14, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	v_cmp_gt_i32_e64 s2, s5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB168_11
; %bb.1:
	s_load_b32 s2, s[0:1], 0x30
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[5:6], null, s15, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
	v_cmp_gt_i32_e64 s2, s6, v5
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB168_11
; %bb.2:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr3_vgpr4
	v_cmpx_ne_u32_e32 0, v2
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB168_8
; %bb.3:
	v_mul_lo_u32 v0, v2, s4
	s_add_i32 s7, s5, -1
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s7, v2
	s_and_saveexec_b32 s7, vcc_lo
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB168_5
; %bb.4:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v6, s4, v0
	s_mul_i32 s8, s5, s4
	v_mad_u64_u32 v[2:3], null, s8, v5, v[1:2]
	s_lshl_b32 s8, s4, 1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_subrev_nc_u32_e32 v1, s8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v2, v1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v1, v[3:4], off
	v_add_nc_u32_e32 v3, v2, v6
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v5, v[3:4], off
	s_waitcnt vmcnt(1)
	v_cvt_f64_i32_e32 v[3:4], v1
	s_waitcnt vmcnt(0)
	v_cvt_f64_i32_e32 v[5:6], v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[3:4], v[3:4], 0.5
	v_fma_f64 v[3:4], v[5:6], 0.5, -v[3:4]
                                        ; implicit-def: $vgpr5_vgpr6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v7, v[3:4]
	v_add_nc_u32_e32 v3, v2, v0
                                        ; implicit-def: $vgpr1_vgpr2
                                        ; implicit-def: $vgpr0
	v_ashrrev_i32_e32 v4, 31, v3
.LBB168_5:                              ; %Flow
	s_and_not1_saveexec_b32 s7, s7
	s_cbranch_execz .LBB168_7
; %bb.6:
	s_mul_i32 s8, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s8, v5, v[1:2]
	v_subrev_nc_u32_e32 v1, s4, v0
	v_add_nc_u32_e32 v3, v2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v2, v1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_clause 0x1
	global_load_b32 v2, v[5:6], off
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v7, v2, v0
.LBB168_7:                              ; %Flow100
	s_or_b32 exec_lo, exec_lo, s7
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr1_vgpr2
.LBB168_8:                              ; %Flow101
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB168_10
; %bb.9:
	s_mul_i32 s5, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, s5, v5
	v_add3_u32 v0, v1, s4, v2
	v_add_nc_u32_e32 v3, v2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[0:1], off
	global_load_b32 v1, v[5:6], off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v7, v0, v1
.LBB168_10:                             ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v7, off
.LBB168_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_gradientyIiEvPKT_PS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_gradientyIiEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientyIiEvPKT_PS0_iii,comdat
.Lfunc_end168:
	.size	_Z16kernel_gradientyIiEvPKT_PS0_iii, .Lfunc_end168-_Z16kernel_gradientyIiEvPKT_PS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 748
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z16kernel_gradientzIiEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientzIiEvPKT_PS0_iii,comdat
	.protected	_Z16kernel_gradientzIiEvPKT_PS0_iii ; -- Begin function _Z16kernel_gradientzIiEvPKT_PS0_iii
	.globl	_Z16kernel_gradientzIiEvPKT_PS0_iii
	.p2align	8
	.type	_Z16kernel_gradientzIiEvPKT_PS0_iii,@function
_Z16kernel_gradientzIiEvPKT_PS0_iii:    ; @_Z16kernel_gradientzIiEvPKT_PS0_iii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[4:5], null, s13, s2, v[1:2]
	v_mad_u64_u32 v[5:6], null, s14, s7, v[2:3]
	v_mad_u64_u32 v[6:7], null, s15, s3, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s4, v4
	v_cmp_gt_i32_e64 s2, s5, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s6, v6
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB169_10
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s7, exec_lo
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr0_vgpr1
	v_cmpx_ne_u32_e32 0, v6
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB169_7
; %bb.2:
	s_mul_i32 s8, s5, s4
	v_mad_u64_u32 v[2:3], null, v5, s4, v[4:5]
	v_mul_lo_u32 v4, s8, v6
	s_add_i32 s6, s6, -1
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr0_vgpr1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s6, v6
	s_and_saveexec_b32 s6, vcc_lo
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB169_4
; %bb.3:
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v3, s8, v4
	s_lshl_b32 s9, s8, 1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_subrev_nc_u32_e32 v0, s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v5, v[0:1], off
	v_add_nc_u32_e32 v0, v3, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(1)
	v_cvt_f64_i32_e32 v[0:1], v5
	s_waitcnt vmcnt(0)
	v_cvt_f64_i32_e32 v[5:6], v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[0:1], 0.5
	v_fma_f64 v[0:1], v[5:6], 0.5, -v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v7, v[0:1]
	v_add_nc_u32_e32 v0, v4, v2
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr2_vgpr3
	v_ashrrev_i32_e32 v1, 31, v0
.LBB169_4:                              ; %Flow
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB169_6
; %bb.5:
	v_subrev_nc_u32_e32 v1, s8, v4
	v_add_nc_u32_e32 v0, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v1, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v[4:5], off
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v7, v4, v2
.LBB169_6:                              ; %Flow100
	s_or_b32 exec_lo, exec_lo, s6
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr5_vgpr6
.LBB169_7:                              ; %Flow101
	s_and_not1_saveexec_b32 s6, s7
	s_cbranch_execz .LBB169_9
; %bb.8:
	v_mad_u64_u32 v[0:1], null, v5, s4, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s5, s4, v[0:1]
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v7, v2, v3
.LBB169_9:                              ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v7, off
.LBB169_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_gradientzIiEvPKT_PS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16kernel_gradientzIiEvPKT_PS0_iii,"axG",@progbits,_Z16kernel_gradientzIiEvPKT_PS0_iii,comdat
.Lfunc_end169:
	.size	_Z16kernel_gradientzIiEvPKT_PS0_iii, .Lfunc_end169-_Z16kernel_gradientzIiEvPKT_PS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 672
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii,"axG",@progbits,_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii,comdat
	.protected	_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii ; -- Begin function _Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii
	.globl	_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii
	.p2align	8
	.type	_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii,@function
_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii: ; @_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[8:11], s[0:1], 0x18
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	s_mul_i32 s14, s14, s3
	v_mad_u64_u32 v[0:1], null, s15, s2, v[3:4]
	v_add_nc_u32_e32 v1, s14, v2
	s_ashr_i32 s12, s10, 1
	s_ashr_i32 s13, s11, 1
	s_sub_i32 s3, s8, s12
	s_sub_i32 s4, s9, s13
	v_cmp_le_i32_e32 vcc_lo, s12, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_le_i32_e64 s2, s13, v0
	v_cmp_gt_i32_e64 s3, s3, v1
	v_cmp_gt_i32_e64 s4, s4, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB170_9
; %bb.1:                                ; %.preheader55
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s11, 1
	s_cbranch_scc1 .LBB170_7
; %bb.2:                                ; %.preheader.lr.ph
	v_subrev_nc_u32_e32 v3, s13, v0
	s_mov_b32 s3, 0
	s_cmp_gt_i32 s10, 0
	s_mov_b32 s2, s3
	s_cselect_b32 s9, -1, 0
	v_mul_lo_u32 v3, s8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add3_u32 v3, v2, v3, s14
	v_mov_b32_e32 v2, 0
	s_mov_b32 s14, s3
	v_subrev_nc_u32_e32 v5, s12, v3
.LBB170_3:                              ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB170_5 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_cbranch_vccnz .LBB170_6
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB170_3 Depth=1
	s_lshl_b64 s[12:13], s[2:3], 2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v3, v5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s6, s12
	s_addc_u32 s13, s7, s13
	s_mov_b32 s15, s10
.LBB170_5:                              ;   Parent Loop BB170_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	s_load_b32 s16, s[12:13], 0x0
	s_add_i32 s15, s15, -1
	s_add_u32 s12, s12, 4
	s_addc_u32 s13, s13, 0
	v_lshlrev_b64 v[6:7], 2, v[3:4]
	s_cmp_eq_u32 s15, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v4, v[6:7], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mad_u64_u32 v[6:7], null, s16, v4, v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v3, s8, v3
	s_cbranch_scc0 .LBB170_5
.LBB170_6:                              ; %._crit_edge
                                        ;   in Loop: Header=BB170_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v5, 1, v5
	s_add_i32 s14, s14, 1
	s_add_i32 s2, s2, s10
	s_cmp_eq_u32 s14, s11
	s_cbranch_scc0 .LBB170_3
	s_branch .LBB170_8
.LBB170_7:
	v_mov_b32_e32 v2, 0
.LBB170_8:                              ; %._crit_edge60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v0, s8, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB170_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii,"axG",@progbits,_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii,comdat
.Lfunc_end170:
	.size	_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii, .Lfunc_end170-_Z21kernel_convolution_2dIiEvPKT_S2_PS0_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 456
; NumSgprs: 19
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii,"axG",@progbits,_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii,comdat
	.protected	_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii ; -- Begin function _Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii
	.globl	_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii
	.p2align	8
	.type	_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii,@function
_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii: ; @_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x18
	s_load_b64 s[16:17], s[0:1], 0x28
	v_and_b32_e32 v4, 0x3ff, v0
	v_bfe_u32 v5, v0, 10, 10
	v_bfe_u32 v6, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s14, s14, s4
	s_mul_i32 s13, s13, s2
	v_add_nc_u32_e32 v1, s14, v5
	v_add_nc_u32_e32 v0, s13, v4
	s_and_b32 s3, s3, 0xffff
	s_ashr_i32 s18, s11, 1
	s_ashr_i32 s12, s16, 1
	v_mad_u64_u32 v[2:3], null, s15, s3, v[6:7]
	v_cmp_le_i32_e32 vcc_lo, s18, v0
	v_cmp_le_i32_e64 s2, s12, v1
	s_sub_i32 s3, s8, s18
	s_sub_i32 s4, s9, s12
	v_cmp_gt_i32_e64 s3, s3, v0
	s_ashr_i32 s19, s17, 1
	v_cmp_gt_i32_e64 s4, s4, v1
	s_and_b32 s2, vcc_lo, s2
	v_cmp_le_i32_e32 vcc_lo, s19, v2
	s_sub_i32 s5, s10, s19
	s_and_b32 s3, s2, s3
	v_cmp_gt_i32_e64 s2, s5, v2
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB171_11
; %bb.1:                                ; %.preheader92
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s17, 1
	s_cbranch_scc1 .LBB171_9
; %bb.2:                                ; %.preheader91.lr.ph
	v_subrev_nc_u32_e32 v3, s19, v2
	s_cmp_gt_i32 s16, 0
	s_mov_b32 s10, 0
	s_mul_i32 s15, s9, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, s9, v3
	v_add3_u32 v3, v5, v3, s14
	s_mul_i32 s14, s16, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v3, s12, v3
	s_cselect_b32 s12, -1, 0
	s_cmp_gt_i32 s11, 0
	v_mul_lo_u32 v3, s8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add3_u32 v4, v4, v3, s13
	v_mov_b32_e32 v3, 0
	s_cselect_b32 s13, -1, 0
	v_subrev_nc_u32_e32 v6, s18, v4
	s_mov_b32 s18, 0
.LBB171_3:                              ; %.preheader91
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB171_5 Depth 2
                                        ;       Child Loop BB171_6 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB171_8
; %bb.4:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB171_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v7, v6
	s_mov_b32 s19, 0
	s_mov_b32 s20, s10
.LBB171_5:                              ; %.preheader
                                        ;   Parent Loop BB171_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB171_6 Depth 3
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v4, v7
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_mov_b32 s2, s20
	s_mov_b32 s21, s11
	s_cbranch_vccnz .LBB171_7
.LBB171_6:                              ;   Parent Loop BB171_3 Depth=1
                                        ;     Parent Loop BB171_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v5, 31, v4
	s_ashr_i32 s3, s2, 31
	s_lshl_b64 s[22:23], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s22, s6, s22
	v_lshlrev_b64 v[8:9], 2, v[4:5]
	s_addc_u32 s23, s7, s23
	s_add_i32 s21, s21, -1
	s_load_b32 s3, s[22:23], 0x0
	s_add_i32 s2, s2, 1
	s_cmp_eq_u32 s21, 0
	v_add_co_u32 v8, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v5, v[8:9], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mad_u64_u32 v[8:9], null, s3, v5, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v8 :: v_dual_add_nc_u32 v4, 1, v4
	s_cbranch_scc0 .LBB171_6
.LBB171_7:                              ; %._crit_edge
                                        ;   in Loop: Header=BB171_5 Depth=2
	v_add_nc_u32_e32 v7, s8, v7
	s_add_i32 s19, s19, 1
	s_add_i32 s20, s20, s11
	s_cmp_eq_u32 s19, s16
	s_cbranch_scc0 .LBB171_5
.LBB171_8:                              ; %._crit_edge97
                                        ;   in Loop: Header=BB171_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v6, s15, v6
	s_add_i32 s18, s18, 1
	s_add_i32 s10, s10, s14
	s_cmp_eq_u32 s18, s17
	s_cbranch_scc0 .LBB171_3
	s_branch .LBB171_10
.LBB171_9:
	v_mov_b32_e32 v3, 0
.LBB171_10:                             ; %._crit_edge101
	v_mad_u64_u32 v[4:5], null, v2, s9, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v4, s8, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v3, off
.LBB171_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii,"axG",@progbits,_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii,comdat
.Lfunc_end171:
	.size	_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii, .Lfunc_end171-_Z21kernel_convolution_3dIiEvPKT_S2_PS0_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 604
; NumSgprs: 26
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.section	.text._Z13kernel_assignItEvPT_S0_i,"axG",@progbits,_Z13kernel_assignItEvPT_S0_i,comdat
	.protected	_Z13kernel_assignItEvPT_S0_i ; -- Begin function _Z13kernel_assignItEvPT_S0_i
	.globl	_Z13kernel_assignItEvPT_S0_i
	.p2align	8
	.type	_Z13kernel_assignItEvPT_S0_i,@function
_Z13kernel_assignItEvPT_S0_i:           ; @_Z13kernel_assignItEvPT_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB172_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 1, v[1:2]
	v_mov_b32_e32 v2, s2
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b16 v[0:1], v2, off
.LBB172_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13kernel_assignItEvPT_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13kernel_assignItEvPT_S0_i,"axG",@progbits,_Z13kernel_assignItEvPT_S0_i,comdat
.Lfunc_end172:
	.size	_Z13kernel_assignItEvPT_S0_i, .Lfunc_end172-_Z13kernel_assignItEvPT_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 124
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_copyItEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyItEvPKT_PS0_i,comdat
	.protected	_Z11kernel_copyItEvPKT_PS0_i ; -- Begin function _Z11kernel_copyItEvPKT_PS0_i
	.globl	_Z11kernel_copyItEvPKT_PS0_i
	.p2align	8
	.type	_Z11kernel_copyItEvPKT_PS0_i,@function
_Z11kernel_copyItEvPKT_PS0_i:           ; @_Z11kernel_copyItEvPKT_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB173_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 1, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_u16 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b16 v[0:1], v2, off
.LBB173_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_copyItEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_copyItEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyItEvPKT_PS0_i,comdat
.Lfunc_end173:
	.size	_Z11kernel_copyItEvPKT_PS0_i, .Lfunc_end173-_Z11kernel_copyItEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z13kernel_assignIjEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIjEvPT_S0_i,comdat
	.protected	_Z13kernel_assignIjEvPT_S0_i ; -- Begin function _Z13kernel_assignIjEvPT_S0_i
	.globl	_Z13kernel_assignIjEvPT_S0_i
	.p2align	8
	.type	_Z13kernel_assignIjEvPT_S0_i,@function
_Z13kernel_assignIjEvPT_S0_i:           ; @_Z13kernel_assignIjEvPT_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB174_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_mov_b32_e32 v2, s2
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB174_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13kernel_assignIjEvPT_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13kernel_assignIjEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIjEvPT_S0_i,comdat
.Lfunc_end174:
	.size	_Z13kernel_assignIjEvPT_S0_i, .Lfunc_end174-_Z13kernel_assignIjEvPT_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 124
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_copyIjEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIjEvPKT_PS0_i,comdat
	.protected	_Z11kernel_copyIjEvPKT_PS0_i ; -- Begin function _Z11kernel_copyIjEvPKT_PS0_i
	.globl	_Z11kernel_copyIjEvPKT_PS0_i
	.p2align	8
	.type	_Z11kernel_copyIjEvPKT_PS0_i,@function
_Z11kernel_copyIjEvPKT_PS0_i:           ; @_Z11kernel_copyIjEvPKT_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB175_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB175_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_copyIjEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_copyIjEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIjEvPKT_PS0_i,comdat
.Lfunc_end175:
	.size	_Z11kernel_copyIjEvPKT_PS0_i, .Lfunc_end175-_Z11kernel_copyIjEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z13kernel_assignIhEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIhEvPT_S0_i,comdat
	.protected	_Z13kernel_assignIhEvPT_S0_i ; -- Begin function _Z13kernel_assignIhEvPT_S0_i
	.globl	_Z13kernel_assignIhEvPT_S0_i
	.p2align	8
	.type	_Z13kernel_assignIhEvPT_S0_i,@function
_Z13kernel_assignIhEvPT_S0_i:           ; @_Z13kernel_assignIhEvPT_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB176_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v2, vcc_lo
	v_mov_b32_e32 v2, s2
	global_store_b8 v[0:1], v2, off
.LBB176_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13kernel_assignIhEvPT_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13kernel_assignIhEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIhEvPT_S0_i,comdat
.Lfunc_end176:
	.size	_Z13kernel_assignIhEvPT_S0_i, .Lfunc_end176-_Z13kernel_assignIhEvPT_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 112
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_copyIhEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIhEvPKT_PS0_i,comdat
	.protected	_Z11kernel_copyIhEvPKT_PS0_i ; -- Begin function _Z11kernel_copyIhEvPKT_PS0_i
	.globl	_Z11kernel_copyIhEvPKT_PS0_i
	.p2align	8
	.type	_Z11kernel_copyIhEvPKT_PS0_i,@function
_Z11kernel_copyIhEvPKT_PS0_i:           ; @_Z11kernel_copyIhEvPKT_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB177_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v4, 31, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v4, vcc_lo
	global_load_u8 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b8 v[0:1], v2, off
.LBB177_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_copyIhEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_copyIhEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIhEvPKT_PS0_i,comdat
.Lfunc_end177:
	.size	_Z11kernel_copyIhEvPKT_PS0_i, .Lfunc_end177-_Z11kernel_copyIhEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 136
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z13kernel_assignIsEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIsEvPT_S0_i,comdat
	.protected	_Z13kernel_assignIsEvPT_S0_i ; -- Begin function _Z13kernel_assignIsEvPT_S0_i
	.globl	_Z13kernel_assignIsEvPT_S0_i
	.p2align	8
	.type	_Z13kernel_assignIsEvPT_S0_i,@function
_Z13kernel_assignIsEvPT_S0_i:           ; @_Z13kernel_assignIsEvPT_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB178_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 1, v[1:2]
	v_mov_b32_e32 v2, s2
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b16 v[0:1], v2, off
.LBB178_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13kernel_assignIsEvPT_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13kernel_assignIsEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIsEvPT_S0_i,comdat
.Lfunc_end178:
	.size	_Z13kernel_assignIsEvPT_S0_i, .Lfunc_end178-_Z13kernel_assignIsEvPT_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 124
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_copyIsEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIsEvPKT_PS0_i,comdat
	.protected	_Z11kernel_copyIsEvPKT_PS0_i ; -- Begin function _Z11kernel_copyIsEvPKT_PS0_i
	.globl	_Z11kernel_copyIsEvPKT_PS0_i
	.p2align	8
	.type	_Z11kernel_copyIsEvPKT_PS0_i,@function
_Z11kernel_copyIsEvPKT_PS0_i:           ; @_Z11kernel_copyIsEvPKT_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB179_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 1, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_u16 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b16 v[0:1], v2, off
.LBB179_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_copyIsEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_copyIsEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIsEvPKT_PS0_i,comdat
.Lfunc_end179:
	.size	_Z11kernel_copyIsEvPKT_PS0_i, .Lfunc_end179-_Z11kernel_copyIsEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z13kernel_assignIcEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIcEvPT_S0_i,comdat
	.protected	_Z13kernel_assignIcEvPT_S0_i ; -- Begin function _Z13kernel_assignIcEvPT_S0_i
	.globl	_Z13kernel_assignIcEvPT_S0_i
	.p2align	8
	.type	_Z13kernel_assignIcEvPT_S0_i,@function
_Z13kernel_assignIcEvPT_S0_i:           ; @_Z13kernel_assignIcEvPT_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB180_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v2, vcc_lo
	v_mov_b32_e32 v2, s2
	global_store_b8 v[0:1], v2, off
.LBB180_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13kernel_assignIcEvPT_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13kernel_assignIcEvPT_S0_i,"axG",@progbits,_Z13kernel_assignIcEvPT_S0_i,comdat
.Lfunc_end180:
	.size	_Z13kernel_assignIcEvPT_S0_i, .Lfunc_end180-_Z13kernel_assignIcEvPT_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 112
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11kernel_copyIcEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIcEvPKT_PS0_i,comdat
	.protected	_Z11kernel_copyIcEvPKT_PS0_i ; -- Begin function _Z11kernel_copyIcEvPKT_PS0_i
	.globl	_Z11kernel_copyIcEvPKT_PS0_i
	.p2align	8
	.type	_Z11kernel_copyIcEvPKT_PS0_i,@function
_Z11kernel_copyIcEvPKT_PS0_i:           ; @_Z11kernel_copyIcEvPKT_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB181_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v4, 31, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v4, vcc_lo
	global_load_u8 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b8 v[0:1], v2, off
.LBB181_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_copyIcEvPKT_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11kernel_copyIcEvPKT_PS0_i,"axG",@progbits,_Z11kernel_copyIcEvPKT_PS0_i,comdat
.Lfunc_end181:
	.size	_Z11kernel_copyIcEvPKT_PS0_i, .Lfunc_end181-_Z11kernel_copyIcEvPKT_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 136
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11kernel_castIfdEvPKT_PT0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11kernel_castIfdEvPKT_PT0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
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        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11kernel_castIdfEvPKT_PT0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11kernel_castIdfEvPKT_PT0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11kernel_castIifEvPKT_PT0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11kernel_castIifEvPKT_PT0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
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        .size:           2
        .value_kind:     hidden_group_size_z
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      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
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        .size:           2
        .value_kind:     hidden_remainder_z
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        .size:           8
        .value_kind:     hidden_global_offset_x
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        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11kernel_castIfiEvPKT_PT0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11kernel_castIfiEvPKT_PT0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
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        .value_kind:     by_value
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        .size:           4
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        .value_kind:     hidden_group_size_x
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        .size:           8
        .value_kind:     hidden_global_offset_y
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        .size:           8
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        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
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    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11kernel_castIidEvPKT_PT0_i
    .private_segment_fixed_size: 0
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    .sgpr_spill_count: 0
    .symbol:         _Z11kernel_castIidEvPKT_PT0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .value_kind:     global_buffer
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    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11kernel_castIdiEvPKT_PT0_i
    .private_segment_fixed_size: 0
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    .sgpr_spill_count: 0
    .symbol:         _Z11kernel_castIdiEvPKT_PT0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .offset:         0
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      - .address_space:  global
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...

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