#include <iostream>

#define INDEX_NUM   3

#define INDEX_SUM   0
#define INDEX_MAX   1
#define INDEX_MIN   2

#define NUM_MAX         1024

#define ITEMS_NUM       (1024 * 1024)
#define BLOCK_SIZE      256

using namespace std;

// TODO-1 => ./task_no_atomic
// 1 thread does all compute, no atomic/sync
// thread.0 of block.0 computes everything
__global__ void kernel_no_atomics(int *data, int *results) {
	
	if(threadIdx.x || blockIdx.x)
		return;

	for(int i = 0; i != ITEMS_NUM; ++i) {
		results[INDEX_SUM] += data[i];

		results[INDEX_MAX] = (data[i] > results[INDEX_MAX]) ?
			data[i] : results[INDEX_MAX];

		results[INDEX_MIN] = (data[i] < results[INDEX_MIN]) ?
			data[i] : results[INDEX_MIN];
	}
}

// TODO-2 => ./task_partial_atomic
// ITEMS_NUM / 256 threads, ITEMS_NUM / 256 * 3 atomic calls
// thread.0 of each block does partial compute, than uses atomics to compute
__global__ void kernel_partial_atomics(int *data, int *results) {
	
	if(threadIdx.x)
		return;

	int start = blockIdx.x * BLOCK_SIZE;
	int localRes[INDEX_NUM] = {0};
	localRes[INDEX_MIN] = NUM_MAX;

	for (int i = 0; i != BLOCK_SIZE; ++i) {
		localRes[INDEX_SUM] += data[start + i];

		localRes[INDEX_MAX] = (data[start + i] > localRes[INDEX_MAX]) ?
			data[start + i] : localRes[INDEX_MAX];

		localRes[INDEX_MIN] = (data[start + i] < localRes[INDEX_MIN]) ?
			data[start + i] : localRes[INDEX_MIN];
	}

	atomicAdd(results + INDEX_SUM, localRes[INDEX_SUM]);
	atomicMax(results + INDEX_MAX, localRes[INDEX_MAX]);
	atomicMin(results + INDEX_MIN, localRes[INDEX_MIN]);
}

// TODO-3 => ./task_full_atomic
// ITEMS_NUM threads do compute, ITEMS_NUM * 3 atomic calls
// all threads to atomics to compute
__global__ void kernel_full_atomics(int *data, int *results) {
	
	int pos = blockIdx.x * blockDim.x + threadIdx.x;

	atomicAdd(results + INDEX_SUM, data[pos]);
	atomicMax(results + INDEX_MAX, data[pos]);
	atomicMin(results + INDEX_MIN, data[pos]);
}

int main(void) {
    int expResults[INDEX_NUM];
    
    int *data = NULL;
    cudaMallocManaged(&data, ITEMS_NUM * sizeof(int));
    if (data == 0) {
        cout << "[HOST] Couldn't allocate memory\n";
        return 1;
    }
    
    // generate data and expected result
    expResults[INDEX_SUM] = 0;
    expResults[INDEX_MAX] = 0;
    expResults[INDEX_MIN] = NUM_MAX;
    
    for(int i = 0; i < ITEMS_NUM; i++) {
        // each generated number is lower than NUM_MAX as value
        data[i] = rand() % NUM_MAX;
        
        expResults[INDEX_SUM] += data[i];
        
        expResults[INDEX_MAX] = (data[i] > expResults[INDEX_MAX]) ?
            data[i] : expResults[INDEX_MAX];
        
        expResults[INDEX_MIN] = (data[i] < expResults[INDEX_MIN]) ?
            data[i] : expResults[INDEX_MIN];
    }
    
    int *results = NULL;
    cudaMallocManaged(&results, INDEX_NUM * sizeof(int));
    if (results == 0) {
        cout << "[HOST] Couldn't allocate memory\n";
    	return 1;
    }
   
    // compute 10 times the results
    for(int i = 0; i < 10; i++) {
        
        // init
        results[INDEX_SUM] = 0;
        results[INDEX_MAX] = 0;
        results[INDEX_MIN] = NUM_MAX;
        
#ifdef NO_ATOMIC
        kernel_no_atomics<<< 1 , 1 >>> (data, results);
        cudaDeviceSynchronize();
#endif

#ifdef PARTIAL_ATOMIC
        kernel_partial_atomics<<< ITEMS_NUM / 256 , 1 >>> (data, results);
        cudaDeviceSynchronize();
#endif

#ifdef FULL_ATOMIC
        kernel_full_atomics<<< ITEMS_NUM / 256 , 256 >>> (data, results);
        cudaDeviceSynchronize();
#endif
    }
    
    cout << "SUM: " << results[INDEX_SUM] << endl;
    if(results[INDEX_SUM] != expResults[INDEX_SUM]) {
        cout << "Failed, SUM should be " << expResults[INDEX_SUM] << endl;
    }
    
    cout << "MAX: " << results[INDEX_MAX] << endl;
    if(results[INDEX_MAX] != expResults[INDEX_MAX]) {
        cout << "Failed, MAX should be " << expResults[INDEX_MAX] << endl;
    }
    
    cout << "MIN: " << results[INDEX_MIN] << endl;
    if(results[INDEX_MIN] != expResults[INDEX_MIN]) {
        cout << "Failed, MIN should be " << expResults[INDEX_MIN] << endl;
    }
    
    cudaFree(results);
    return 0;
}

	.file	"tmpxft_00258624_00000000-6_task2_atomic.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4297:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4297:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"[HOST] Couldn't allocate memory\n"
.LC1:
	.string	"SUM: "
.LC2:
	.string	"Failed, SUM should be "
.LC3:
	.string	"MAX: "
.LC4:
	.string	"Failed, MAX should be "
.LC5:
	.string	"MIN: "
.LC6:
	.string	"Failed, MIN should be "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%esi, %esi
	movl	$1, %edx
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	movq	%rsi, 8(%rsp)
	movl	$4194304, %esi
	call	cudaMallocManaged@PLT
	cmpq	$0, 8(%rsp)
	jne	.L11
.L6:
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1, %eax
	jmp	.L3
.L11:
	xorl	%ebx, %ebx
	movl	$1024, %ebp
	xorl	%r13d, %r13d
	xorl	%r12d, %r12d
	movl	$1024, %r14d
.L4:
	call	rand@PLT
	cltd
	idivl	%r14d
	movq	8(%rsp), %rax
	addl	%edx, %r13d
	cmpl	%edx, %r12d
	movl	%edx, (%rax,%rbx)
	cmovl	%edx, %r12d
	cmpl	%edx, %ebp
	cmovg	%edx, %ebp
	addq	$4, %rbx
	cmpq	$4194304, %rbx
	jne	.L4
	xorl	%ecx, %ecx
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	movl	$12, %esi
	movq	%rcx, 16(%rsp)
	call	cudaMallocManaged@PLT
	movq	16(%rsp), %rax
	testq	%rax, %rax
	je	.L6
	xorl	%edx, %edx
	movl	$1024, 8(%rax)
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC1(%rip), %rsi
	movq	%rdx, (%rax)
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	16(%rsp), %rax
	movl	(%rax), %esi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	16(%rsp), %rax
	cmpl	(%rax), %r13d
	je	.L7
	leaq	.LC2(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r13d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L7:
	leaq	.LC3(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	16(%rsp), %rax
	movl	4(%rax), %esi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	16(%rsp), %rax
	cmpl	4(%rax), %r12d
	je	.L8
	leaq	.LC4(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L8:
	leaq	.LC5(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	16(%rsp), %rax
	movl	8(%rax), %esi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	16(%rsp), %rax
	cmpl	8(%rax), %ebp
	je	.L9
	leaq	.LC6(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L9:
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L3:
	movq	24(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.text
	.globl	_Z39__device_stub__Z17kernel_no_atomicsPiS_PiS_
	.type	_Z39__device_stub__Z17kernel_no_atomicsPiS_PiS_, @function
_Z39__device_stub__Z17kernel_no_atomicsPiS_PiS_:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_no_atomicsPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L18:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z39__device_stub__Z17kernel_no_atomicsPiS_PiS_, .-_Z39__device_stub__Z17kernel_no_atomicsPiS_PiS_
	.globl	_Z17kernel_no_atomicsPiS_
	.type	_Z17kernel_no_atomicsPiS_, @function
_Z17kernel_no_atomicsPiS_:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z17kernel_no_atomicsPiS_PiS_
	.cfi_endproc
.LFE3661:
	.size	_Z17kernel_no_atomicsPiS_, .-_Z17kernel_no_atomicsPiS_
	.globl	_Z44__device_stub__Z22kernel_partial_atomicsPiS_PiS_
	.type	_Z44__device_stub__Z22kernel_partial_atomicsPiS_PiS_, @function
_Z44__device_stub__Z22kernel_partial_atomicsPiS_PiS_:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z22kernel_partial_atomicsPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L23:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z44__device_stub__Z22kernel_partial_atomicsPiS_PiS_, .-_Z44__device_stub__Z22kernel_partial_atomicsPiS_PiS_
	.globl	_Z22kernel_partial_atomicsPiS_
	.type	_Z22kernel_partial_atomicsPiS_, @function
_Z22kernel_partial_atomicsPiS_:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z22kernel_partial_atomicsPiS_PiS_
	.cfi_endproc
.LFE3663:
	.size	_Z22kernel_partial_atomicsPiS_, .-_Z22kernel_partial_atomicsPiS_
	.globl	_Z41__device_stub__Z19kernel_full_atomicsPiS_PiS_
	.type	_Z41__device_stub__Z19kernel_full_atomicsPiS_PiS_, @function
_Z41__device_stub__Z19kernel_full_atomicsPiS_PiS_:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z19kernel_full_atomicsPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L28:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z41__device_stub__Z19kernel_full_atomicsPiS_PiS_, .-_Z41__device_stub__Z19kernel_full_atomicsPiS_PiS_
	.globl	_Z19kernel_full_atomicsPiS_
	.type	_Z19kernel_full_atomicsPiS_, @function
_Z19kernel_full_atomicsPiS_:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z19kernel_full_atomicsPiS_PiS_
	.cfi_endproc
.LFE3665:
	.size	_Z19kernel_full_atomicsPiS_, .-_Z19kernel_full_atomicsPiS_
	.section	.rodata.str1.1
.LC7:
	.string	"_Z19kernel_full_atomicsPiS_"
.LC8:
	.string	"_Z22kernel_partial_atomicsPiS_"
.LC9:
	.string	"_Z17kernel_no_atomicsPiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3667:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z19kernel_full_atomicsPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z22kernel_partial_atomicsPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17kernel_no_atomicsPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3667:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>

#define INDEX_NUM   3

#define INDEX_SUM   0
#define INDEX_MAX   1
#define INDEX_MIN   2

#define NUM_MAX         1024

#define ITEMS_NUM       (1024 * 1024)
#define BLOCK_SIZE      256

using namespace std;

// TODO-1 => ./task_no_atomic
// 1 thread does all compute, no atomic/sync
// thread.0 of block.0 computes everything
__global__ void kernel_no_atomics(int *data, int *results) {
	
	if(threadIdx.x || blockIdx.x)
		return;

	for(int i = 0; i != ITEMS_NUM; ++i) {
		results[INDEX_SUM] += data[i];

		results[INDEX_MAX] = (data[i] > results[INDEX_MAX]) ?
			data[i] : results[INDEX_MAX];

		results[INDEX_MIN] = (data[i] < results[INDEX_MIN]) ?
			data[i] : results[INDEX_MIN];
	}
}

// TODO-2 => ./task_partial_atomic
// ITEMS_NUM / 256 threads, ITEMS_NUM / 256 * 3 atomic calls
// thread.0 of each block does partial compute, than uses atomics to compute
__global__ void kernel_partial_atomics(int *data, int *results) {
	
	if(threadIdx.x)
		return;

	int start = blockIdx.x * BLOCK_SIZE;
	int localRes[INDEX_NUM] = {0};
	localRes[INDEX_MIN] = NUM_MAX;

	for (int i = 0; i != BLOCK_SIZE; ++i) {
		localRes[INDEX_SUM] += data[start + i];

		localRes[INDEX_MAX] = (data[start + i] > localRes[INDEX_MAX]) ?
			data[start + i] : localRes[INDEX_MAX];

		localRes[INDEX_MIN] = (data[start + i] < localRes[INDEX_MIN]) ?
			data[start + i] : localRes[INDEX_MIN];
	}

	atomicAdd(results + INDEX_SUM, localRes[INDEX_SUM]);
	atomicMax(results + INDEX_MAX, localRes[INDEX_MAX]);
	atomicMin(results + INDEX_MIN, localRes[INDEX_MIN]);
}

// TODO-3 => ./task_full_atomic
// ITEMS_NUM threads do compute, ITEMS_NUM * 3 atomic calls
// all threads to atomics to compute
__global__ void kernel_full_atomics(int *data, int *results) {
	
	int pos = blockIdx.x * blockDim.x + threadIdx.x;

	atomicAdd(results + INDEX_SUM, data[pos]);
	atomicMax(results + INDEX_MAX, data[pos]);
	atomicMin(results + INDEX_MIN, data[pos]);
}

int main(void) {
    int expResults[INDEX_NUM];
    
    int *data = NULL;
    hipMallocManaged(&data, ITEMS_NUM * sizeof(int));
    if (data == 0) {
        cout << "[HOST] Couldn't allocate memory\n";
        return 1;
    }
    
    // generate data and expected result
    expResults[INDEX_SUM] = 0;
    expResults[INDEX_MAX] = 0;
    expResults[INDEX_MIN] = NUM_MAX;
    
    for(int i = 0; i < ITEMS_NUM; i++) {
        // each generated number is lower than NUM_MAX as value
        data[i] = rand() % NUM_MAX;
        
        expResults[INDEX_SUM] += data[i];
        
        expResults[INDEX_MAX] = (data[i] > expResults[INDEX_MAX]) ?
            data[i] : expResults[INDEX_MAX];
        
        expResults[INDEX_MIN] = (data[i] < expResults[INDEX_MIN]) ?
            data[i] : expResults[INDEX_MIN];
    }
    
    int *results = NULL;
    hipMallocManaged(&results, INDEX_NUM * sizeof(int));
    if (results == 0) {
        cout << "[HOST] Couldn't allocate memory\n";
    	return 1;
    }
   
    // compute 10 times the results
    for(int i = 0; i < 10; i++) {
        
        // init
        results[INDEX_SUM] = 0;
        results[INDEX_MAX] = 0;
        results[INDEX_MIN] = NUM_MAX;
        
#ifdef NO_ATOMIC
        kernel_no_atomics<<< 1 , 1 >>> (data, results);
        hipDeviceSynchronize();
#endif

#ifdef PARTIAL_ATOMIC
        kernel_partial_atomics<<< ITEMS_NUM / 256 , 1 >>> (data, results);
        hipDeviceSynchronize();
#endif

#ifdef FULL_ATOMIC
        kernel_full_atomics<<< ITEMS_NUM / 256 , 256 >>> (data, results);
        hipDeviceSynchronize();
#endif
    }
    
    cout << "SUM: " << results[INDEX_SUM] << endl;
    if(results[INDEX_SUM] != expResults[INDEX_SUM]) {
        cout << "Failed, SUM should be " << expResults[INDEX_SUM] << endl;
    }
    
    cout << "MAX: " << results[INDEX_MAX] << endl;
    if(results[INDEX_MAX] != expResults[INDEX_MAX]) {
        cout << "Failed, MAX should be " << expResults[INDEX_MAX] << endl;
    }
    
    cout << "MIN: " << results[INDEX_MIN] << endl;
    if(results[INDEX_MIN] != expResults[INDEX_MIN]) {
        cout << "Failed, MIN should be " << expResults[INDEX_MIN] << endl;
    }
    
    hipFree(results);
    return 0;
}

	.text
	.file	"task2_atomic.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z32__device_stub__kernel_no_atomicsPiS_ # -- Begin function _Z32__device_stub__kernel_no_atomicsPiS_
	.type	_Z32__device_stub__kernel_no_atomicsPiS_,@function
_Z32__device_stub__kernel_no_atomicsPiS_: # @_Z32__device_stub__kernel_no_atomicsPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_no_atomicsPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__kernel_no_atomicsPiS_, .Lfunc_end0-_Z32__device_stub__kernel_no_atomicsPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__kernel_partial_atomicsPiS_ # -- Begin function _Z37__device_stub__kernel_partial_atomicsPiS_
	.type	_Z37__device_stub__kernel_partial_atomicsPiS_,@function
_Z37__device_stub__kernel_partial_atomicsPiS_: # @_Z37__device_stub__kernel_partial_atomicsPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22kernel_partial_atomicsPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z37__device_stub__kernel_partial_atomicsPiS_, .Lfunc_end1-_Z37__device_stub__kernel_partial_atomicsPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z34__device_stub__kernel_full_atomicsPiS_ # -- Begin function _Z34__device_stub__kernel_full_atomicsPiS_
	.type	_Z34__device_stub__kernel_full_atomicsPiS_,@function
_Z34__device_stub__kernel_full_atomicsPiS_: # @_Z34__device_stub__kernel_full_atomicsPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19kernel_full_atomicsPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z34__device_stub__kernel_full_atomicsPiS_, .Lfunc_end2-_Z34__device_stub__kernel_full_atomicsPiS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	8(%rsp), %rbx
	movq	$0, (%rbx)
	movl	$1, %r15d
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	cmpq	$0, (%rbx)
	je	.LBB3_12
# %bb.1:                                # %.preheader25.preheader
	movl	$1024, %ebx                     # imm = 0x400
	xorl	%r15d, %r15d
	xorl	%r14d, %r14d
	xorl	%ebp, %ebp
.LBB3_2:                                # %.preheader25
                                        # =>This Inner Loop Header: Depth=1
	movl	%ebx, %r12d
	callq	rand
	movl	%eax, %ebx
	leal	1023(%rbx), %eax
	testl	%ebx, %ebx
	cmovnsl	%ebx, %eax
	andl	$-1024, %eax                    # imm = 0xFC00
	subl	%eax, %ebx
	movq	8(%rsp), %rax
	movl	%ebx, (%rax,%r15,4)
	addl	%ebx, %r14d
	cmpl	%ebp, %ebx
	cmovgl	%ebx, %ebp
	cmpl	%r12d, %ebx
	cmovgel	%r12d, %ebx
	incq	%r15
	cmpq	$1048576, %r15                  # imm = 0x100000
	jne	.LBB3_2
# %bb.3:
	movq	%rsp, %r12
	movq	$0, (%r12)
	movl	$1, %r15d
	movl	$12, %esi
	movq	%r12, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	(%r12), %rax
	testq	%rax, %rax
	je	.LBB3_12
# %bb.4:                                # %.preheader
	movq	$0, (%rax)
	movl	$1024, 8(%rax)                  # imm = 0x400
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rsp), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%rsp), %rax
	cmpl	%r14d, (%rax)
	je	.LBB3_6
# %bb.5:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB3_6:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rsp), %rax
	movl	4(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%rsp), %rax
	cmpl	%ebp, 4(%rax)
	je	.LBB3_8
# %bb.7:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB3_8:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rsp), %rax
	movl	8(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%rsp), %rdi
	cmpl	%ebx, 8(%rdi)
	je	.LBB3_10
# %bb.9:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%rsp), %rdi
.LBB3_10:
	callq	hipFree
	xorl	%r15d, %r15d
	jmp	.LBB3_11
.LBB3_12:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB3_11:
	movl	%r15d, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17kernel_no_atomicsPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22kernel_partial_atomicsPiS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19kernel_full_atomicsPiS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17kernel_no_atomicsPiS_,@object # @_Z17kernel_no_atomicsPiS_
	.section	.rodata,"a",@progbits
	.globl	_Z17kernel_no_atomicsPiS_
	.p2align	3, 0x0
_Z17kernel_no_atomicsPiS_:
	.quad	_Z32__device_stub__kernel_no_atomicsPiS_
	.size	_Z17kernel_no_atomicsPiS_, 8

	.type	_Z22kernel_partial_atomicsPiS_,@object # @_Z22kernel_partial_atomicsPiS_
	.globl	_Z22kernel_partial_atomicsPiS_
	.p2align	3, 0x0
_Z22kernel_partial_atomicsPiS_:
	.quad	_Z37__device_stub__kernel_partial_atomicsPiS_
	.size	_Z22kernel_partial_atomicsPiS_, 8

	.type	_Z19kernel_full_atomicsPiS_,@object # @_Z19kernel_full_atomicsPiS_
	.globl	_Z19kernel_full_atomicsPiS_
	.p2align	3, 0x0
_Z19kernel_full_atomicsPiS_:
	.quad	_Z34__device_stub__kernel_full_atomicsPiS_
	.size	_Z19kernel_full_atomicsPiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"[HOST] Couldn't allocate memory\n"
	.size	.L.str, 33

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"SUM: "
	.size	.L.str.1, 6

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed, SUM should be "
	.size	.L.str.2, 23

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"MAX: "
	.size	.L.str.3, 6

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed, MAX should be "
	.size	.L.str.4, 23

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"MIN: "
	.size	.L.str.5, 6

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed, MIN should be "
	.size	.L.str.6, 23

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17kernel_no_atomicsPiS_"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z22kernel_partial_atomicsPiS_"
	.size	.L__unnamed_2, 31

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z19kernel_full_atomicsPiS_"
	.size	.L__unnamed_3, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__kernel_no_atomicsPiS_
	.addrsig_sym _Z37__device_stub__kernel_partial_atomicsPiS_
	.addrsig_sym _Z34__device_stub__kernel_full_atomicsPiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17kernel_no_atomicsPiS_
	.addrsig_sym _Z22kernel_partial_atomicsPiS_
	.addrsig_sym _Z19kernel_full_atomicsPiS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17kernel_no_atomicsPiS_ ; -- Begin function _Z17kernel_no_atomicsPiS_
	.globl	_Z17kernel_no_atomicsPiS_
	.p2align	8
	.type	_Z17kernel_no_atomicsPiS_,@function
_Z17kernel_no_atomicsPiS_:              ; @_Z17kernel_no_atomicsPiS_
; %bb.0:
	v_or_b32_e32 v0, s15, v0
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	s_load_b32 s6, s[2:3], 0x8
	s_load_b64 s[4:5], s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v0, s6
	v_dual_mov_b32 v1, s5 :: v_dual_mov_b32 v2, s4
	s_mov_b64 s[4:5], 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s6, s0, s4
	s_addc_u32 s7, s1, s5
	s_add_u32 s4, s4, 4
	global_load_b32 v4, v3, s[6:7]
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 0x400000
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v2, v4
	global_store_b32 v3, v2, s[2:3]
	global_load_b32 v4, v3, s[6:7]
	s_waitcnt vmcnt(0)
	v_max_i32_e32 v1, v4, v1
	global_store_b32 v3, v1, s[2:3] offset:4
	global_load_b32 v4, v3, s[6:7]
	s_waitcnt vmcnt(0)
	v_min_i32_e32 v0, v4, v0
	global_store_b32 v3, v0, s[2:3] offset:8
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_no_atomicsPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17kernel_no_atomicsPiS_, .Lfunc_end0-_Z17kernel_no_atomicsPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 192
; NumSgprs: 16
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z22kernel_partial_atomicsPiS_ ; -- Begin function _Z22kernel_partial_atomicsPiS_
	.globl	_Z22kernel_partial_atomicsPiS_
	.p2align	8
	.type	_Z22kernel_partial_atomicsPiS_,@function
_Z22kernel_partial_atomicsPiS_:         ; @_Z22kernel_partial_atomicsPiS_
; %bb.0:
	s_mov_b32 s6, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_9
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_lshl_b32 s4, s15, 8
	s_movk_i32 s7, 0x400
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[8:9], s[4:5], 2
	s_mov_b64 s[4:5], 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s8, s0, s8
	s_addc_u32 s1, s1, s9
	s_mov_b32 s0, 0
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_add_u32 s10, s8, s4
	s_addc_u32 s11, s1, s5
	s_load_b32 s9, s[10:11], 0x0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s9, s0
	s_max_i32 s6, s9, s6
	s_min_i32 s7, s9, s7
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_cmpk_eq_i32 s4, 0x400
	s_cbranch_scc0 .LBB1_2
; %bb.3:
	s_mov_b32 s4, exec_lo
	s_mov_b32 s1, exec_lo
	v_mbcnt_lo_u32_b32 v0, s4, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_5
; %bb.4:
	s_bcnt1_i32_b32 s4, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s0, s0, s4
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0
	global_atomic_add_u32 v0, v1, s[2:3]
.LBB1_5:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, exec_lo, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_7
; %bb.6:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s6
	global_atomic_max_i32 v0, v1, s[2:3] offset:4
.LBB1_7:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, exec_lo, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_9
; %bb.8:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s7
	global_atomic_min_i32 v0, v1, s[2:3] offset:8
.LBB1_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22kernel_partial_atomicsPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z22kernel_partial_atomicsPiS_, .Lfunc_end1-_Z22kernel_partial_atomicsPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 268
; NumSgprs: 18
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z19kernel_full_atomicsPiS_ ; -- Begin function _Z19kernel_full_atomicsPiS_
	.globl	_Z19kernel_full_atomicsPiS_
	.p2align	8
	.type	_Z19kernel_full_atomicsPiS_,@function
_Z19kernel_full_atomicsPiS_:            ; @_Z19kernel_full_atomicsPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s5, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_mov_b32 s0, 0
	global_load_b32 v2, v[0:1], off
.LBB2_1:                                ; %ComputeLoop
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s1, s4
	s_waitcnt vmcnt(0)
	v_readlane_b32 s5, v2, s1
	s_lshl_b32 s1, 1, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_not1_b32 s4, s4, s1
	s_add_i32 s0, s0, s5
	s_cmp_lg_u32 s4, 0
	s_cbranch_scc1 .LBB2_1
; %bb.2:                                ; %ComputeEnd
	v_mbcnt_lo_u32_b32 v2, exec_lo, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB2_4
; %bb.3:
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, s0
	global_atomic_add_u32 v2, v3, s[2:3]
.LBB2_4:
	s_or_b32 exec_lo, exec_lo, s1
	global_load_b32 v2, v[0:1], off
	s_mov_b32 s1, exec_lo
	s_brev_b32 s0, 1
.LBB2_5:                                ; %ComputeLoop10
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s4, s1
	s_waitcnt vmcnt(0)
	v_readlane_b32 s5, v2, s4
	s_lshl_b32 s4, 1, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_not1_b32 s1, s1, s4
	s_max_i32 s0, s0, s5
	s_cmp_lg_u32 s1, 0
	s_cbranch_scc1 .LBB2_5
; %bb.6:                                ; %ComputeEnd11
	v_mbcnt_lo_u32_b32 v2, exec_lo, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB2_8
; %bb.7:
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, s0
	global_atomic_max_i32 v2, v3, s[2:3] offset:4
.LBB2_8:
	s_or_b32 exec_lo, exec_lo, s1
	global_load_b32 v0, v[0:1], off
	s_mov_b32 s1, exec_lo
	s_brev_b32 s0, -2
.LBB2_9:                                ; %ComputeLoop14
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s4, s1
	s_waitcnt vmcnt(0)
	v_readlane_b32 s5, v0, s4
	s_lshl_b32 s4, 1, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_not1_b32 s1, s1, s4
	s_min_i32 s0, s0, s5
	s_cmp_lg_u32 s1, 0
	s_cbranch_scc1 .LBB2_9
; %bb.10:                               ; %ComputeEnd15
	v_mbcnt_lo_u32_b32 v0, exec_lo, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB2_12
; %bb.11:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0
	global_atomic_min_i32 v0, v1, s[2:3] offset:8
.LBB2_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19kernel_full_atomicsPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z19kernel_full_atomicsPiS_, .Lfunc_end2-_Z19kernel_full_atomicsPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 396
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17kernel_no_atomicsPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z17kernel_no_atomicsPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z22kernel_partial_atomicsPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z22kernel_partial_atomicsPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19kernel_full_atomicsPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z19kernel_full_atomicsPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
