#include <iostream>
#include <stdlib.h>
#include <iomanip>
#include <time.h>
#include <sys/time.h>
#include <cuda.h>

using namespace std;

#define MAX_ARRAY_SIZE 2048
#define RANDOM_MAX  2.0
#define RANDOM_MIN  1.0
#define TILE_WIDTH 32
#define EPSILON 0.000001
#define NUM_BLOCKS (MAX_ARRAY_SIZE/TILE_WIDTH)

float A[MAX_ARRAY_SIZE][MAX_ARRAY_SIZE];
float F[MAX_ARRAY_SIZE][MAX_ARRAY_SIZE];
float C[MAX_ARRAY_SIZE][MAX_ARRAY_SIZE];

void serial();
void init_F();
int check();
__global__ void matrixMultiply1(float *, float *, int);
__global__ void matrixMultiply2(float *, float *, int);
__global__ void matrixMultiply3(float *, float *, int);


int main()
{
	float *d_a, *d_c;
	struct timeval startTime, endTime;
	size_t memsize = MAX_ARRAY_SIZE * MAX_ARRAY_SIZE * sizeof(float);

	cudaMalloc((void**) &d_a, memsize);
	cudaMalloc((void**) &d_c, memsize);

	init_F();

	cudaMemcpy(d_a,A,memsize,cudaMemcpyHostToDevice);
	cudaMemcpy(d_c,C,memsize,cudaMemcpyHostToDevice);

	gettimeofday(&startTime, NULL);
    
    //serial();
	//dim3 dimGrid1(1,1);
	//dim3 dimBlock1(MAX_ARRAY_SIZE, MAX_ARRAY_SIZE); 

	dim3 dimGrid2(MAX_ARRAY_SIZE/TILE_WIDTH, MAX_ARRAY_SIZE/TILE_WIDTH);
	dim3 dimBlock2(TILE_WIDTH, TILE_WIDTH);
	matrixMultiply1<<< dimGrid2, dimBlock2 >>>(d_a,d_c,MAX_ARRAY_SIZE);

	//matrixMultiply2<<< dimGrid2, dimBlock2 >>>(d_a,d_c,MAX_ARRAY_SIZE);*/
	//matrixMultiply3<<< dimGrid2, dimBlock2 >>>(d_a,d_c,MAX_ARRAY_SIZE);
	
	gettimeofday(&endTime, NULL);

	long seconds  = endTime.tv_sec  - startTime.tv_sec;
   	long useconds = endTime.tv_usec - startTime.tv_usec;

    double duration = seconds + useconds/1000000.0;
    cout<<"\nTime taken for Matrix Multiplication on GPU (time in sec): "<<fixed<<setprecision(7)<<duration;
    cout<<"\nPerformance Metrics (GFlops/sec):"<<fixed<<setprecision(6)<<((2 * (long)MAX_ARRAY_SIZE * MAX_ARRAY_SIZE * MAX_ARRAY_SIZE))/(1e9 * duration);
    cout<<endl;

	cudaMemcpy(C,d_c,memsize,cudaMemcpyDeviceToHost);

    if(check() == 1) {
    	cout<<"\nMatrix Multiplication Successful!"<<endl;
    }

	cudaFree(d_a);
	cudaFree(d_c);

	return 0;
}

void init_F()
{
	srand(time(NULL));

	for (int i = 0; i < MAX_ARRAY_SIZE; i++){
		for (int j = 0; j < MAX_ARRAY_SIZE; j++){
			float r = ((float)rand()) / (float)RAND_MAX;
			A[i][j] = RANDOM_MIN + r * (RANDOM_MAX - RANDOM_MIN);
		}
	}
}

__global__ void matrixMultiply1(float *A, float *C, int size) {
	int Col = blockDim.y * blockIdx.y + threadIdx.y;
	int Row = blockDim.x * blockIdx.x + threadIdx.x;


	for(int k = 0; k < size; k++)
		C[Row * size + Col] += A[k * size + Row] * A[k * size + Col];

}

__global__ void matrixMultiply2(float* A, float* C, int size)
{
	float sum = 0;
 	int Col = blockIdx.x * TILE_WIDTH + threadIdx.x;
 	int Row = blockIdx.y * TILE_WIDTH + threadIdx.y;
 	
 	if(Col < size && Row < size) {
  		for (int k = 0; k < size; k++)
   			sum += A[k * size + Row] * A[k * size + Col];

  		C[Row * size + Col] = sum;
 	}
}

__global__ void matrixMultiply3(float* A, float* C, int size) {
    	
    float CValue = 0;
        
    int Row = blockIdx.y * TILE_WIDTH + threadIdx.y;
    int Col = blockIdx.x * TILE_WIDTH + threadIdx.x;

    __shared__ float As[TILE_WIDTH][TILE_WIDTH];
    		 
    for (int k = 0; k < (TILE_WIDTH + size - 1)/TILE_WIDTH; k++) {
    			
        if (k * TILE_WIDTH + threadIdx.x < size && Row < size)	
          	As[threadIdx.y][threadIdx.x] = A[Row * size + k * TILE_WIDTH + threadIdx.x];
    	else													
    		As[threadIdx.y][threadIdx.x] = 0.0;

    	if (k * TILE_WIDTH + threadIdx.y < size && Col < size)	
    		As[threadIdx.y][threadIdx.x] = A[(k*TILE_WIDTH + threadIdx.y) * size + Col];
    	else													
    		As[threadIdx.y][threadIdx.x] = 0.0;
             
    	__syncthreads();

    	for (int n = 0; n < TILE_WIDTH; ++n) 
    		CValue += As[threadIdx.y][n] * As[n][threadIdx.x];
    		
    	__syncthreads();
        }
        
    if (Row < size && Col < size) 
       	C[((blockIdx.y * blockDim.y + threadIdx.y) * size) + (blockIdx.x*blockDim.x) + threadIdx.x] = CValue;
}

void serial()
{
	for (int i = 0; i < MAX_ARRAY_SIZE; i++)
		for (int j = 0; j < MAX_ARRAY_SIZE; j++) 
			for (int k = 0; k < MAX_ARRAY_SIZE; k++)
				F[i][j] += A[k][i] * A[k][j]; 
}

int check()
{
	for (int i = 0; i < MAX_ARRAY_SIZE; i++) {
		for (int j = 0; j < MAX_ARRAY_SIZE; j++) {
			if(abs(C[i][j] - F[i][j]) < EPSILON){
				cout<<"\nMismatch at index: ("<<i<<","<<j<<")"<<endl;
				return 0;
			}
		}
	}
	return 1;
}
	.file	"tmpxft_003894ac_00000000-6_kumari_sangeeta_lab4p2.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.section	.text._ZSt5fixedRSt8ios_base,"axG",@progbits,_ZSt5fixedRSt8ios_base,comdat
	.weak	_ZSt5fixedRSt8ios_base
	.type	_ZSt5fixedRSt8ios_base, @function
_ZSt5fixedRSt8ios_base:
.LFB3285:
	.cfi_startproc
	endbr64
	movl	24(%rdi), %edx
	movq	%rdi, %rax
	andl	$-261, %edx
	orl	$4, %edx
	movl	%edx, 24(%rdi)
	ret
	.cfi_endproc
.LFE3285:
	.size	_ZSt5fixedRSt8ios_base, .-_ZSt5fixedRSt8ios_base
	.text
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3921:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3921:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z6init_Fv
	.type	_Z6init_Fv, @function
_Z6init_Fv:
.LFB3916:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%edi, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	leaq	A(%rip), %rbx
	leaq	16777216(%rbx), %r12
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L4:
	xorl	%ebp, %ebp
.L5:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	addss	.LC1(%rip), %xmm0
	movss	%xmm0, (%rbx,%rbp,4)
	incq	%rbp
	cmpq	$2048, %rbp
	jne	.L5
	addq	$8192, %rbx
	cmpq	%r12, %rbx
	jne	.L4
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3916:
	.size	_Z6init_Fv, .-_Z6init_Fv
	.globl	_Z6serialv
	.type	_Z6serialv, @function
_Z6serialv:
.LFB3917:
	.cfi_startproc
	endbr64
	leaq	A(%rip), %r8
	leaq	F(%rip), %rdi
	leaq	8192(%r8), %r9
	movq	%r8, %rsi
.L11:
	movq	%r8, %rax
	movq	%rdi, %rcx
.L15:
	movss	(%rcx), %xmm0
	xorl	%edx, %edx
.L12:
	movss	(%rsi,%rdx), %xmm1
	mulss	(%rax,%rdx), %xmm1
	addq	$8192, %rdx
	addss	%xmm1, %xmm0
	cmpq	$16777216, %rdx
	jne	.L12
	addq	$4, %rax
	movss	%xmm0, (%rcx)
	addq	$4, %rcx
	cmpq	%r9, %rax
	jne	.L15
	addq	$4, %rsi
	addq	$8192, %rdi
	cmpq	%rax, %rsi
	jne	.L11
	ret
	.cfi_endproc
.LFE3917:
	.size	_Z6serialv, .-_Z6serialv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC5:
	.string	"\nMismatch at index: ("
.LC6:
	.string	","
.LC7:
	.string	")"
	.text
	.globl	_Z5checkv
	.type	_Z5checkv, @function
_Z5checkv:
.LFB3918:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	leaq	C(%rip), %rdx
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 32
	movsd	.LC4(%rip), %xmm2
	leaq	F(%rip), %rcx
	movss	.LC3(%rip), %xmm1
.L18:
	movq	%rbx, %rax
	xorl	%ebp, %ebp
	salq	$13, %rax
.L22:
	movss	(%rdx,%rax), %xmm0
	subss	(%rcx,%rax), %xmm0
	andps	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm0, %xmm2
	jbe	.L26
	leaq	.LC5(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	xorl	%eax, %eax
	jmp	.L17
.L26:
	incl	%ebp
	addq	$4, %rax
	cmpl	$2048, %ebp
	jne	.L22
	incq	%rbx
	cmpq	$2048, %rbx
	jne	.L18
	movl	$1, %eax
.L17:
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3918:
	.size	_Z5checkv, .-_Z5checkv
	.globl	_Z38__device_stub__Z15matrixMultiply1PfS_iPfS_i
	.type	_Z38__device_stub__Z15matrixMultiply1PfS_iPfS_i, @function
_Z38__device_stub__Z15matrixMultiply1PfS_iPfS_i:
.LFB3943:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15matrixMultiply1PfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L28:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3943:
	.size	_Z38__device_stub__Z15matrixMultiply1PfS_iPfS_i, .-_Z38__device_stub__Z15matrixMultiply1PfS_iPfS_i
	.globl	_Z15matrixMultiply1PfS_i
	.type	_Z15matrixMultiply1PfS_i, @function
_Z15matrixMultiply1PfS_i:
.LFB3944:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z15matrixMultiply1PfS_iPfS_i
	.cfi_endproc
.LFE3944:
	.size	_Z15matrixMultiply1PfS_i, .-_Z15matrixMultiply1PfS_i
	.section	.rodata.str1.1
.LC9:
	.string	"\nTime taken for Matrix Multiplication on GPU (time in sec): "
.LC10:
	.string	"\nPerformance Metrics (GFlops/sec):"
.LC13:
	.string	"\nMatrix Multiplication Successful!"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3915:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$16777216, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	leaq	C(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$16777216, %esi
	call	cudaMalloc@PLT
	call	_Z6init_Fv
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$16777216, %edx
	leaq	A(%rip), %rsi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$16777216, %edx
	call	cudaMemcpy@PLT
	xorl	%esi, %esi
	leaq	40(%rsp), %rdi
	call	gettimeofday@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$274877907008, %rdi
	movl	$1, %esi
	movabsq	$137438953504, %rdx
	movl	$1, 24(%rsp)
	movq	%rdi, 16(%rsp)
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$2048, %edx
	call	_Z38__device_stub__Z15matrixMultiply1PfS_iPfS_i
.L34:
	xorl	%esi, %esi
	leaq	56(%rsp), %rdi
	leaq	_ZSt4cout(%rip), %rbx
	call	gettimeofday@PLT
	movq	64(%rsp), %rax
	movq	%rbx, %rdi
	subq	48(%rsp), %rax
	cvtsi2sdq	%rax, %xmm0
	movq	56(%rsp), %rax
	subq	40(%rsp), %rax
	divsd	.LC8(%rip), %xmm0
	cvtsi2sdq	%rax, %xmm1
	leaq	.LC9(%rip), %rsi
	leaq	_ZSt5fixedRSt8ios_base(%rip), %r12
	addsd	%xmm1, %xmm0
	movq	%xmm0, %r14
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSt8ios_baseS0_E@PLT
	movq	%r14, %xmm0
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	movq	$7, 8(%rdi,%rax)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC10(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSt8ios_baseS0_E@PLT
	movq	%r14, %xmm1
	movsd	.LC12(%rip), %xmm0
	mulsd	.LC11(%rip), %xmm1
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	movq	$6, 8(%rdi,%rax)
	divsd	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$16777216, %edx
	call	cudaMemcpy@PLT
	call	_Z5checkv
	decl	%eax
	jne	.L35
	movq	%rbx, %rdi
	leaq	.LC13(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L35:
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3915:
	.size	main, .-main
	.text
	.globl	_Z38__device_stub__Z15matrixMultiply2PfS_iPfS_i
	.type	_Z38__device_stub__Z15matrixMultiply2PfS_iPfS_i, @function
_Z38__device_stub__Z15matrixMultiply2PfS_iPfS_i:
.LFB3945:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15matrixMultiply2PfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L38:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3945:
	.size	_Z38__device_stub__Z15matrixMultiply2PfS_iPfS_i, .-_Z38__device_stub__Z15matrixMultiply2PfS_iPfS_i
	.globl	_Z15matrixMultiply2PfS_i
	.type	_Z15matrixMultiply2PfS_i, @function
_Z15matrixMultiply2PfS_i:
.LFB3946:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z15matrixMultiply2PfS_iPfS_i
	.cfi_endproc
.LFE3946:
	.size	_Z15matrixMultiply2PfS_i, .-_Z15matrixMultiply2PfS_i
	.globl	_Z38__device_stub__Z15matrixMultiply3PfS_iPfS_i
	.type	_Z38__device_stub__Z15matrixMultiply3PfS_iPfS_i, @function
_Z38__device_stub__Z15matrixMultiply3PfS_iPfS_i:
.LFB3947:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15matrixMultiply3PfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L43:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3947:
	.size	_Z38__device_stub__Z15matrixMultiply3PfS_iPfS_i, .-_Z38__device_stub__Z15matrixMultiply3PfS_iPfS_i
	.globl	_Z15matrixMultiply3PfS_i
	.type	_Z15matrixMultiply3PfS_i, @function
_Z15matrixMultiply3PfS_i:
.LFB3948:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z15matrixMultiply3PfS_iPfS_i
	.cfi_endproc
.LFE3948:
	.size	_Z15matrixMultiply3PfS_i, .-_Z15matrixMultiply3PfS_i
	.section	.rodata.str1.1
.LC14:
	.string	"_Z15matrixMultiply3PfS_i"
.LC15:
	.string	"_Z15matrixMultiply2PfS_i"
.LC16:
	.string	"_Z15matrixMultiply1PfS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3950:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15matrixMultiply3PfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15matrixMultiply2PfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15matrixMultiply1PfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3950:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	C
	.bss
	.align 32
	.type	C, @object
	.size	C, 16777216
C:
	.zero	16777216
	.globl	F
	.align 32
	.type	F, @object
	.size	F, 16777216
F:
	.zero	16777216
	.globl	A
	.align 32
	.type	A, @object
	.size	A, 16777216
A:
	.zero	16777216
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.align 4
.LC1:
	.long	1065353216
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC3:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC8:
	.long	0
	.long	1093567616
	.align 8
.LC11:
	.long	0
	.long	1104006501
	.align 8
.LC12:
	.long	0
	.long	1108344832
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <stdlib.h>
#include <iomanip>
#include <time.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>

using namespace std;

#define MAX_ARRAY_SIZE 2048
#define RANDOM_MAX  2.0
#define RANDOM_MIN  1.0
#define TILE_WIDTH 32
#define EPSILON 0.000001
#define NUM_BLOCKS (MAX_ARRAY_SIZE/TILE_WIDTH)

float A[MAX_ARRAY_SIZE][MAX_ARRAY_SIZE];
float F[MAX_ARRAY_SIZE][MAX_ARRAY_SIZE];
float C[MAX_ARRAY_SIZE][MAX_ARRAY_SIZE];

void serial();
void init_F();
int check();
__global__ void matrixMultiply1(float *, float *, int);
__global__ void matrixMultiply2(float *, float *, int);
__global__ void matrixMultiply3(float *, float *, int);


int main()
{
	float *d_a, *d_c;
	struct timeval startTime, endTime;
	size_t memsize = MAX_ARRAY_SIZE * MAX_ARRAY_SIZE * sizeof(float);

	hipMalloc((void**) &d_a, memsize);
	hipMalloc((void**) &d_c, memsize);

	init_F();

	hipMemcpy(d_a,A,memsize,hipMemcpyHostToDevice);
	hipMemcpy(d_c,C,memsize,hipMemcpyHostToDevice);

	gettimeofday(&startTime, NULL);
    
    //serial();
	//dim3 dimGrid1(1,1);
	//dim3 dimBlock1(MAX_ARRAY_SIZE, MAX_ARRAY_SIZE); 

	dim3 dimGrid2(MAX_ARRAY_SIZE/TILE_WIDTH, MAX_ARRAY_SIZE/TILE_WIDTH);
	dim3 dimBlock2(TILE_WIDTH, TILE_WIDTH);
	matrixMultiply1<<< dimGrid2, dimBlock2 >>>(d_a,d_c,MAX_ARRAY_SIZE);

	//matrixMultiply2<<< dimGrid2, dimBlock2 >>>(d_a,d_c,MAX_ARRAY_SIZE);*/
	//matrixMultiply3<<< dimGrid2, dimBlock2 >>>(d_a,d_c,MAX_ARRAY_SIZE);
	
	gettimeofday(&endTime, NULL);

	long seconds  = endTime.tv_sec  - startTime.tv_sec;
   	long useconds = endTime.tv_usec - startTime.tv_usec;

    double duration = seconds + useconds/1000000.0;
    cout<<"\nTime taken for Matrix Multiplication on GPU (time in sec): "<<fixed<<setprecision(7)<<duration;
    cout<<"\nPerformance Metrics (GFlops/sec):"<<fixed<<setprecision(6)<<((2 * (long)MAX_ARRAY_SIZE * MAX_ARRAY_SIZE * MAX_ARRAY_SIZE))/(1e9 * duration);
    cout<<endl;

	hipMemcpy(C,d_c,memsize,hipMemcpyDeviceToHost);

    if(check() == 1) {
    	cout<<"\nMatrix Multiplication Successful!"<<endl;
    }

	hipFree(d_a);
	hipFree(d_c);

	return 0;
}

void init_F()
{
	srand(time(NULL));

	for (int i = 0; i < MAX_ARRAY_SIZE; i++){
		for (int j = 0; j < MAX_ARRAY_SIZE; j++){
			float r = ((float)rand()) / (float)RAND_MAX;
			A[i][j] = RANDOM_MIN + r * (RANDOM_MAX - RANDOM_MIN);
		}
	}
}

__global__ void matrixMultiply1(float *A, float *C, int size) {
	int Col = blockDim.y * blockIdx.y + threadIdx.y;
	int Row = blockDim.x * blockIdx.x + threadIdx.x;


	for(int k = 0; k < size; k++)
		C[Row * size + Col] += A[k * size + Row] * A[k * size + Col];

}

__global__ void matrixMultiply2(float* A, float* C, int size)
{
	float sum = 0;
 	int Col = blockIdx.x * TILE_WIDTH + threadIdx.x;
 	int Row = blockIdx.y * TILE_WIDTH + threadIdx.y;
 	
 	if(Col < size && Row < size) {
  		for (int k = 0; k < size; k++)
   			sum += A[k * size + Row] * A[k * size + Col];

  		C[Row * size + Col] = sum;
 	}
}

__global__ void matrixMultiply3(float* A, float* C, int size) {
    	
    float CValue = 0;
        
    int Row = blockIdx.y * TILE_WIDTH + threadIdx.y;
    int Col = blockIdx.x * TILE_WIDTH + threadIdx.x;

    __shared__ float As[TILE_WIDTH][TILE_WIDTH];
    		 
    for (int k = 0; k < (TILE_WIDTH + size - 1)/TILE_WIDTH; k++) {
    			
        if (k * TILE_WIDTH + threadIdx.x < size && Row < size)	
          	As[threadIdx.y][threadIdx.x] = A[Row * size + k * TILE_WIDTH + threadIdx.x];
    	else													
    		As[threadIdx.y][threadIdx.x] = 0.0;

    	if (k * TILE_WIDTH + threadIdx.y < size && Col < size)	
    		As[threadIdx.y][threadIdx.x] = A[(k*TILE_WIDTH + threadIdx.y) * size + Col];
    	else													
    		As[threadIdx.y][threadIdx.x] = 0.0;
             
    	__syncthreads();

    	for (int n = 0; n < TILE_WIDTH; ++n) 
    		CValue += As[threadIdx.y][n] * As[n][threadIdx.x];
    		
    	__syncthreads();
        }
        
    if (Row < size && Col < size) 
       	C[((blockIdx.y * blockDim.y + threadIdx.y) * size) + (blockIdx.x*blockDim.x) + threadIdx.x] = CValue;
}

void serial()
{
	for (int i = 0; i < MAX_ARRAY_SIZE; i++)
		for (int j = 0; j < MAX_ARRAY_SIZE; j++) 
			for (int k = 0; k < MAX_ARRAY_SIZE; k++)
				F[i][j] += A[k][i] * A[k][j]; 
}

int check()
{
	for (int i = 0; i < MAX_ARRAY_SIZE; i++) {
		for (int j = 0; j < MAX_ARRAY_SIZE; j++) {
			if(abs(C[i][j] - F[i][j]) < EPSILON){
				cout<<"\nMismatch at index: ("<<i<<","<<j<<")"<<endl;
				return 0;
			}
		}
	}
	return 1;
}
	.text
	.file	"kumari_sangeeta_lab4p2.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI0_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI0_1:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI0_2:
	.quad	0x4210000000000000              # double 17179869184
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	leaq	24(%rsp), %rbx
	movl	$16777216, %esi                 # imm = 0x1000000
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %r14
	movl	$16777216, %esi                 # imm = 0x1000000
	movq	%r14, %rdi
	callq	hipMalloc
	callq	_Z6init_Fv
	movq	(%rbx), %rdi
	movl	$A, %esi
	movl	$16777216, %edx                 # imm = 0x1000000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movl	$C, %esi
	movl	$16777216, %edx                 # imm = 0x1000000
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movabsq	$274877907008, %rdi             # imm = 0x4000000040
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$2048, %edx                     # imm = 0x800
	callq	_Z30__device_stub__matrixMultiply1PfS_i
.LBB0_2:
	leaq	48(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rbx), %rax
	movq	8(%rbx), %rcx
	subq	32(%rsp), %rax
	subq	40(%rsp), %rcx
	cvtsi2sd	%rax, %xmm0
	cvtsi2sd	%rcx, %xmm1
	divsd	.LCPI0_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$60, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rcx
	movl	$-261, %ebp                     # imm = 0xFEFB
	movl	_ZSt4cout+24(%rcx), %edx
	andl	%ebp, %edx
	orl	$4, %edx
	movl	%edx, _ZSt4cout+24(%rcx)
	movq	-24(%rax), %rax
	movq	$7, _ZSt4cout+8(%rax)
	movl	$_ZSt4cout, %edi
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rcx
	andl	_ZSt4cout+24(%rcx), %ebp
	orl	$4, %ebp
	movl	%ebp, _ZSt4cout+24(%rcx)
	movq	-24(%rax), %rax
	movq	$6, _ZSt4cout+8(%rax)
	movsd	16(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	mulsd	.LCPI0_1(%rip), %xmm1
	movsd	.LCPI0_2(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	8(%rsp), %rsi
	movl	$C, %edi
	movl	$16777216, %edx                 # imm = 0x1000000
	movl	$2, %ecx
	callq	hipMemcpy
	callq	_Z5checkv
	cmpl	$1, %eax
	jne	.LBB0_4
# %bb.3:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB0_4:
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z6init_Fv
.LCPI1_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI1_1:
	.long	0x3f800000                      # float 1
	.text
	.globl	_Z6init_Fv
	.type	_Z6init_Fv,@function
_Z6init_Fv:                             # @_Z6init_Fv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%ebx, %ebx
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movl	$A, %r14d
.LBB1_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorl	%r15d, %r15d
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movss	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	.LCPI1_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	addss	%xmm1, %xmm0
	movss	%xmm0, (%r14,%r15,4)
	incq	%r15
	cmpq	$2048, %r15                     # imm = 0x800
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%rbx
	addq	$8192, %r14                     # imm = 0x2000
	cmpq	$2048, %rbx                     # imm = 0x800
	jne	.LBB1_1
# %bb.4:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z6init_Fv, .Lfunc_end1-_Z6init_Fv
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__matrixMultiply1PfS_i # -- Begin function _Z30__device_stub__matrixMultiply1PfS_i
	.type	_Z30__device_stub__matrixMultiply1PfS_i,@function
_Z30__device_stub__matrixMultiply1PfS_i: # @_Z30__device_stub__matrixMultiply1PfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15matrixMultiply1PfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z30__device_stub__matrixMultiply1PfS_i, .Lfunc_end2-_Z30__device_stub__matrixMultiply1PfS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z5checkv
.LCPI3_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI3_1:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z5checkv
	.type	_Z5checkv,@function
_Z5checkv:                              # @_Z5checkv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%eax, %eax
	movaps	.LCPI3_0(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movsd	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero
	xorl	%ebx, %ebx
	xorl	%r15d, %r15d
.LBB3_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
	xorl	%r14d, %r14d
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	C(%rax,%r14,4), %xmm2           # xmm2 = mem[0],zero,zero,zero
	subss	F(%rax,%r14,4), %xmm2
	andps	%xmm0, %xmm2
	cvtss2sd	%xmm2, %xmm2
	ucomisd	%xmm2, %xmm1
	ja	.LBB3_6
# %bb.3:                                #   in Loop: Header=BB3_2 Depth=2
	incq	%r14
	cmpq	$2048, %r14                     # imm = 0x800
	jne	.LBB3_2
# %bb.4:                                #   in Loop: Header=BB3_1 Depth=1
	cmpq	$2047, %rbx                     # imm = 0x7FF
	leaq	1(%rbx), %rcx
	setae	%r15b
	addq	$8192, %rax                     # imm = 0x2000
	movq	%rcx, %rbx
	cmpq	$2048, %rcx                     # imm = 0x800
	jne	.LBB3_1
	jmp	.LBB3_5
.LBB3_6:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$21, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.5, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB3_5:                                # %.loopexit
	movzbl	%r15b, %eax
	andl	$1, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z5checkv, .Lfunc_end3-_Z5checkv
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__matrixMultiply2PfS_i # -- Begin function _Z30__device_stub__matrixMultiply2PfS_i
	.type	_Z30__device_stub__matrixMultiply2PfS_i,@function
_Z30__device_stub__matrixMultiply2PfS_i: # @_Z30__device_stub__matrixMultiply2PfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15matrixMultiply2PfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z30__device_stub__matrixMultiply2PfS_i, .Lfunc_end4-_Z30__device_stub__matrixMultiply2PfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__matrixMultiply3PfS_i # -- Begin function _Z30__device_stub__matrixMultiply3PfS_i
	.type	_Z30__device_stub__matrixMultiply3PfS_i,@function
_Z30__device_stub__matrixMultiply3PfS_i: # @_Z30__device_stub__matrixMultiply3PfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15matrixMultiply3PfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z30__device_stub__matrixMultiply3PfS_i, .Lfunc_end5-_Z30__device_stub__matrixMultiply3PfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z6serialv                      # -- Begin function _Z6serialv
	.type	_Z6serialv,@function
_Z6serialv:                             # @_Z6serialv
	.cfi_startproc
# %bb.0:
	movl	$A, %eax
	xorl	%ecx, %ecx
.LBB6_1:                                # %.preheader14
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_2 Depth 2
                                        #       Child Loop BB6_3 Depth 3
	movq	%rcx, %rdx
	shlq	$13, %rdx
	movl	$A, %esi
	xorl	%edi, %edi
.LBB6_2:                                # %.preheader
                                        #   Parent Loop BB6_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB6_3 Depth 3
	leaq	(%rdx,%rdi,4), %r8
	addq	$F, %r8
	movss	(%r8), %xmm0                    # xmm0 = mem[0],zero,zero,zero
	xorl	%r9d, %r9d
.LBB6_3:                                #   Parent Loop BB6_1 Depth=1
                                        #     Parent Loop BB6_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rax,%r9), %xmm1               # xmm1 = mem[0],zero,zero,zero
	mulss	(%rsi,%r9), %xmm1
	addss	%xmm1, %xmm0
	addq	$8192, %r9                      # imm = 0x2000
	cmpq	$16777216, %r9                  # imm = 0x1000000
	jne	.LBB6_3
# %bb.4:                                #   in Loop: Header=BB6_2 Depth=2
	movss	%xmm0, (%r8)
	incq	%rdi
	addq	$4, %rsi
	cmpq	$2048, %rdi                     # imm = 0x800
	jne	.LBB6_2
# %bb.5:                                #   in Loop: Header=BB6_1 Depth=1
	incq	%rcx
	addq	$4, %rax
	cmpq	$2048, %rcx                     # imm = 0x800
	jne	.LBB6_1
# %bb.6:
	retq
.Lfunc_end6:
	.size	_Z6serialv, .Lfunc_end6-_Z6serialv
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15matrixMultiply1PfS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15matrixMultiply2PfS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15matrixMultiply3PfS_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	A,@object                       # @A
	.bss
	.globl	A
	.p2align	4, 0x0
A:
	.zero	16777216
	.size	A, 16777216

	.type	F,@object                       # @F
	.globl	F
	.p2align	4, 0x0
F:
	.zero	16777216
	.size	F, 16777216

	.type	C,@object                       # @C
	.globl	C
	.p2align	4, 0x0
C:
	.zero	16777216
	.size	C, 16777216

	.type	_Z15matrixMultiply1PfS_i,@object # @_Z15matrixMultiply1PfS_i
	.section	.rodata,"a",@progbits
	.globl	_Z15matrixMultiply1PfS_i
	.p2align	3, 0x0
_Z15matrixMultiply1PfS_i:
	.quad	_Z30__device_stub__matrixMultiply1PfS_i
	.size	_Z15matrixMultiply1PfS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\nTime taken for Matrix Multiplication on GPU (time in sec): "
	.size	.L.str, 61

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\nPerformance Metrics (GFlops/sec):"
	.size	.L.str.1, 35

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\nMatrix Multiplication Successful!"
	.size	.L.str.2, 35

	.type	_Z15matrixMultiply2PfS_i,@object # @_Z15matrixMultiply2PfS_i
	.section	.rodata,"a",@progbits
	.globl	_Z15matrixMultiply2PfS_i
	.p2align	3, 0x0
_Z15matrixMultiply2PfS_i:
	.quad	_Z30__device_stub__matrixMultiply2PfS_i
	.size	_Z15matrixMultiply2PfS_i, 8

	.type	_Z15matrixMultiply3PfS_i,@object # @_Z15matrixMultiply3PfS_i
	.globl	_Z15matrixMultiply3PfS_i
	.p2align	3, 0x0
_Z15matrixMultiply3PfS_i:
	.quad	_Z30__device_stub__matrixMultiply3PfS_i
	.size	_Z15matrixMultiply3PfS_i, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"\nMismatch at index: ("
	.size	.L.str.3, 22

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	","
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	")"
	.size	.L.str.5, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15matrixMultiply1PfS_i"
	.size	.L__unnamed_1, 25

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15matrixMultiply2PfS_i"
	.size	.L__unnamed_2, 25

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z15matrixMultiply3PfS_i"
	.size	.L__unnamed_3, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__matrixMultiply1PfS_i
	.addrsig_sym _Z30__device_stub__matrixMultiply2PfS_i
	.addrsig_sym _Z30__device_stub__matrixMultiply3PfS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym A
	.addrsig_sym C
	.addrsig_sym _Z15matrixMultiply1PfS_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z15matrixMultiply2PfS_i
	.addrsig_sym _Z15matrixMultiply3PfS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15matrixMultiply1PfS_i ; -- Begin function _Z15matrixMultiply1PfS_i
	.globl	_Z15matrixMultiply1PfS_i
	.p2align	8
	.type	_Z15matrixMultiply1PfS_i,@function
_Z15matrixMultiply1PfS_i:               ; @_Z15matrixMultiply1PfS_i
; %bb.0:
	s_load_b32 s4, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s2, s[0:1], 0x24
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_mov_b32 s2, 0
	s_mov_b32 s3, s4
	global_load_b32 v4, v[2:3], off
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v5, s2, v1
	v_add_nc_u32_e32 v7, s2, v0
	s_add_i32 s3, s3, -1
	s_add_i32 s2, s2, s4
	s_cmp_eq_u32 s3, 0
	v_ashrrev_i32_e32 v6, 31, v5
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	s_clause 0x1
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[7:8], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v4, v5, v6
	global_store_b32 v[2:3], v4, off
	s_cbranch_scc0 .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15matrixMultiply1PfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15matrixMultiply1PfS_i, .Lfunc_end0-_Z15matrixMultiply1PfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z15matrixMultiply2PfS_i ; -- Begin function _Z15matrixMultiply2PfS_i
	.globl	_Z15matrixMultiply2PfS_i
	.p2align	8
	.type	_Z15matrixMultiply2PfS_i,@function
_Z15matrixMultiply2PfS_i:               ; @_Z15matrixMultiply2PfS_i
; %bb.0:
	s_load_b32 s4, s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v0, s14, 5, v1
	v_lshl_add_u32 v1, s15, 5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s4, v2
	s_cbranch_execz .LBB1_5
; %bb.1:                                ; %.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB1_4
; %bb.2:                                ; %.lr.ph.preheader
	s_mov_b32 s5, 0
	s_mov_b32 s6, s4
.LBB1_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v3, s5, v1
	v_add_nc_u32_e32 v5, s5, v0
	s_add_i32 s6, s6, -1
	s_add_i32 s5, s5, s4
	s_cmp_eq_u32 s6, 0
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[5:6], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v2, v3, v4
	s_cbranch_scc0 .LBB1_3
.LBB1_4:                                ; %Flow37
	v_mad_u64_u32 v[3:4], null, v1, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB1_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15matrixMultiply2PfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15matrixMultiply2PfS_i, .Lfunc_end1-_Z15matrixMultiply2PfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z15matrixMultiply3PfS_i ; -- Begin function _Z15matrixMultiply3PfS_i
	.globl	_Z15matrixMultiply3PfS_i
	.p2align	8
	.type	_Z15matrixMultiply3PfS_i,@function
_Z15matrixMultiply3PfS_i:               ; @_Z15matrixMultiply3PfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_delay_alu instid0(VALU_DEP_2)
	v_lshl_add_u32 v1, s14, 5, v2
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s3, 1
	s_cbranch_scc1 .LBB2_7
; %bb.1:                                ; %.lr.ph
	v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v4, 2, v2
	v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v5, 7, v0
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_add_i32 s2, s3, 31
	s_mov_b32 s9, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v7, v5, v4
	s_lshr_b32 s8, s2, 5
.LBB2_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_5 Depth 2
	v_lshl_add_u32 v8, s9, 5, v0
	v_mov_b32_e32 v9, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s3, v8
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s10, s2
	s_cbranch_execz .LBB2_4
; %bb.3:                                ;   in Loop: Header=BB2_2 Depth=1
	v_mad_u64_u32 v[9:10], null, v8, s3, v[1:2]
	v_mov_b32_e32 v10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[9:10]
	v_add_co_u32 v8, s2, s4, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s2, s5, v9, s2
	global_load_b32 v9, v[8:9], off
.LBB2_4:                                ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	v_mov_b32_e32 v8, v4
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v7, v9
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB2_5:                                ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v9, s2, v5
	s_add_i32 s2, s2, 4
	ds_load_b32 v10, v8
	ds_load_b32 v9, v9
	v_add_nc_u32_e32 v8, 0x80, v8
	s_cmpk_eq_i32 s2, 0x80
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v3, v9, v10
	s_cbranch_scc0 .LBB2_5
; %bb.6:                                ;   in Loop: Header=BB2_2 Depth=1
	s_add_i32 s9, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s9, s8
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB2_2
	s_branch .LBB2_8
.LBB2_7:
	v_mov_b32_e32 v3, 0
.LBB2_8:                                ; %Flow59
	v_lshl_add_u32 v4, s15, 5, v0
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v1, v4, v1
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB2_10
; %bb.9:
	s_load_b32 s0, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s1, s0, 16
	s_and_b32 s0, s0, 0xffff
	v_mad_u64_u32 v[4:5], null, s15, s1, v[0:1]
	s_mul_i32 s14, s14, s0
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, v4, s3
	v_add3_u32 v0, s14, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v3, off
.LBB2_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15matrixMultiply3PfS_i
		.amdhsa_group_segment_fixed_size 4096
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z15matrixMultiply3PfS_i, .Lfunc_end2-_Z15matrixMultiply3PfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 456
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4096 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
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    .language:       OpenCL C
    .language_version:
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    .name:           _Z15matrixMultiply1PfS_i
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    .sgpr_spill_count: 0
    .symbol:         _Z15matrixMultiply1PfS_i.kd
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    .name:           _Z15matrixMultiply2PfS_i
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
