#include <stdio.h>
#include <stdlib.h>
#include <inttypes.h>
#include <sys/time.h>
#include <cuda_runtime.h>

#define IND(i, j) ((i) * (N + 2) + (j))

enum {
    N = 1024,
    ITERS_MAX = 1 << 10,
    BLOCK_SIZE = 16
};

typedef uint8_t cell_t;

double wtime()
{
    struct timeval t;
    gettimeofday(&t, NULL);
    return (double)t.tv_sec + (double)t.tv_usec * 1E-6;
}

__global__ void copy_ghost_rows(cell_t *grid, int n)
{
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    if (i <= n + 1) {
        // Bottom ghost row: [N + 1][0..N + 1] <== [1][0..N + 1]
        grid[IND(N + 1, i)] = grid[IND(1, i)];
        // Top ghost row: [0][0..N + 1] <== [N][0..N + 1]
        grid[IND(0, i)] = grid[IND(N, i)];
    }
}

__global__ void copy_ghost_cols(cell_t *grid, int n)
{
    int i = blockIdx.x * blockDim.x + threadIdx.x + 1;
    if (i <= n) {
        // Right ghost column: [1..N][N + 1] <== [1..N][1]
        grid[IND(i, N + 1)] = grid[IND(i, 1)];
        // Left ghost column: [1..N][1] <== [1..N][N]
        grid[IND(i, 0)] = grid[IND(i, N)];
    }
}

__constant__ int states[2][9] = {
    {0, 0, 0, 1, 0, 0, 0, 0, 0},  /* New states for a dead cell */
    {0, 0, 1, 1, 0, 0, 0, 0, 0}   /* New states for an alive cell */
};

__global__ void update_cells(cell_t *grid, cell_t *newgrid, int n)
{
    int i = blockIdx.y * blockDim.y + threadIdx.y + 1;
    int j = blockIdx.x * blockDim.x + threadIdx.x + 1;
    
    if (i <= n && j <= n) {                         
        int nneibs = grid[IND(i + 1, j)] + grid[IND(i - 1, j)] +
                     grid[IND(i, j + 1)] + grid[IND(i, j - 1)] +
                     grid[IND(i + 1, j + 1)] + grid[IND(i - 1, j - 1)] +
                     grid[IND(i - 1, j + 1)] + grid[IND(i + 1, j - 1)];
        
        cell_t state = grid[IND(i, j)];
        newgrid[IND(i, j)] = states[state][nneibs];
    }
}

int main(int argc, char* argv[])
{
    // Grid with periodic boundary conditions (ghost cells)
    size_t ncells = (N + 2) * (N + 2);
    size_t size = sizeof(cell_t) * ncells;
    cell_t *grid = (cell_t *)malloc(size);
 
    // Initial population
    srand(0);
    for (int i = 1; i <= N; i++)
        for (int j = 1; j <= N; j++)
            grid[IND(i, j)] = rand() % 2;

    cell_t *d_grid, *d_newgrid;
    double tmem = -wtime();
    cudaMalloc((void **)&d_grid, size);
    cudaMalloc((void **)&d_newgrid, size);
    cudaMemcpy(d_grid, grid, size, cudaMemcpyHostToDevice);
    tmem += wtime();
    
    // 1d grids for copying ghost cells
    dim3 block(BLOCK_SIZE, 1, 1);
    dim3 cols_grid((N + block.x - 1) / block.x, 1, 1);
    dim3 rows_grid((N + 2 + block.x - 1) / block.x, 1, 1);
    
    // 2d grid for updating cells: one thread per cell
    dim3 block2d(BLOCK_SIZE, BLOCK_SIZE, 1);
    int nblocks = (N + BLOCK_SIZE - 1) / BLOCK_SIZE; 
    dim3 grid2d(nblocks, nblocks, 1);
    
    double t = wtime();
    int iter = 0;
    for (iter = 0; iter < ITERS_MAX; iter++) {
        // Copy ghost cells
        copy_ghost_cols<<<cols_grid, block>>>(d_grid, N);
        copy_ghost_rows<<<rows_grid, block>>>(d_grid, N);

        // Update cells
        update_cells<<<grid2d, block2d>>>(d_grid, d_newgrid, N);
        
        // Swap grids
        cell_t *p = d_grid;
        d_grid = d_newgrid;
        d_newgrid = p;
    }
    cudaDeviceSynchronize();
    t = wtime() - t;
    cudaError_t error = cudaGetLastError();
    if (error != cudaSuccess) {
        printf("CUDA error: %s\n", cudaGetErrorString(error));
        exit(EXIT_FAILURE);
    }

    tmem -= wtime();
    cudaMemcpy(grid, d_grid, size, cudaMemcpyDeviceToHost);
    tmem += wtime();
    
    /*
    for (int i = 0; i < N + 2; i++) {
        for (int j = 0; j < N + 2; j++)
            printf("%1d ", grid[IND(i, j)]);
        printf("\n");        
    }
    */
    size_t total = 0;
    for (int i = 1; i <= N; i++) {
        for (int j = 1; j <= N; j++)
            total += grid[IND(i, j)];
    }
    printf("Game of Life: N = %d, iterations = %d\n", N, iter);
    printf("Total alive cells: %lu\n", total);
    printf("Iterations time (sec.): %.6f\n", t);
    printf("GPU memory ops. time (sec.): %.6f\n", tmem);
    printf("Iters per sec.: %.2f\n", iter / t);
    printf("Total time (sec.): %.6f\n", t + tmem);
    
    free(grid);
    cudaFree(d_grid);
    cudaFree(d_newgrid);    
    return 0;
}

	.file	"tmpxft_003ba69b_00000000-6_gol.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z5wtimev
	.type	_Z5wtimev, @function
_Z5wtimev:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC0(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z5wtimev, .-_Z5wtimev
	.globl	_Z36__device_stub__Z15copy_ghost_rowsPhiPhi
	.type	_Z36__device_stub__Z15copy_ghost_rowsPhiPhi, @function
_Z36__device_stub__Z15copy_ghost_rowsPhiPhi:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z15copy_ghost_rowsPhi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L6:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z36__device_stub__Z15copy_ghost_rowsPhiPhi, .-_Z36__device_stub__Z15copy_ghost_rowsPhiPhi
	.globl	_Z15copy_ghost_rowsPhi
	.type	_Z15copy_ghost_rowsPhi, @function
_Z15copy_ghost_rowsPhi:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z15copy_ghost_rowsPhiPhi
	.cfi_endproc
.LFE2054:
	.size	_Z15copy_ghost_rowsPhi, .-_Z15copy_ghost_rowsPhi
	.globl	_Z36__device_stub__Z15copy_ghost_colsPhiPhi
	.type	_Z36__device_stub__Z15copy_ghost_colsPhiPhi, @function
_Z36__device_stub__Z15copy_ghost_colsPhiPhi:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z15copy_ghost_colsPhi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L11:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z36__device_stub__Z15copy_ghost_colsPhiPhi, .-_Z36__device_stub__Z15copy_ghost_colsPhiPhi
	.globl	_Z15copy_ghost_colsPhi
	.type	_Z15copy_ghost_colsPhi, @function
_Z15copy_ghost_colsPhi:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z15copy_ghost_colsPhiPhi
	.cfi_endproc
.LFE2056:
	.size	_Z15copy_ghost_colsPhi, .-_Z15copy_ghost_colsPhi
	.globl	_Z35__device_stub__Z12update_cellsPhS_iPhS_i
	.type	_Z35__device_stub__Z12update_cellsPhS_iPhS_i, @function
_Z35__device_stub__Z12update_cellsPhS_iPhS_i:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12update_cellsPhS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L16:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z35__device_stub__Z12update_cellsPhS_iPhS_i, .-_Z35__device_stub__Z12update_cellsPhS_iPhS_i
	.globl	_Z12update_cellsPhS_i
	.type	_Z12update_cellsPhS_i, @function
_Z12update_cellsPhS_i:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z12update_cellsPhS_iPhS_i
	.cfi_endproc
.LFE2058:
	.size	_Z12update_cellsPhS_i, .-_Z12update_cellsPhS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"CUDA error: %s\n"
.LC2:
	.string	"Game of Life: N = %d, iterations = %d\n"
.LC3:
	.string	"Total alive cells: %lu\n"
.LC4:
	.string	"Iterations time (sec.): %.6f\n"
.LC5:
	.string	"GPU memory ops. time (sec.): %.6f\n"
.LC7:
	.string	"Iters per sec.: %.2f\n"
.LC8:
	.string	"Total time (sec.): %.6f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$1052676, %edi
	movl	$2, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	$1026, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	xorl	%edi, %edi
	movq	%rax, %rbx
	call	srand@PLT
	leaq	1026(%rbx), %rbp
	movq	%rbp, %r14
.L22:
	movl	$1, %r12d
.L23:
	call	rand@PLT
	cltd
	idivl	%r15d
	movb	%dl, (%r14,%r12)
	incq	%r12
	cmpq	$1025, %r12
	jne	.L23
	addl	$1026, %r13d
	addq	$1026, %r14
	cmpl	$1051650, %r13d
	jne	.L22
	call	_Z5wtimev
	leaq	24(%rsp), %rdi
	movl	$1052676, %esi
	movl	$1024, %r12d
	movsd	%xmm0, (%rsp)
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$1052676, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$1052676, %edx
	call	cudaMemcpy@PLT
	call	_Z5wtimev
	subsd	(%rsp), %xmm0
	movabsq	$4294967297, %rax
	movl	$1, 64(%rsp)
	movq	%rax, 48(%rsp)
	addq	$63, %rax
	movq	%rax, 56(%rsp)
	incq	%rax
	movq	%rax, 68(%rsp)
	movq	%xmm0, %r15
	movabsq	$68719476752, %rax
	movq	%rax, 80(%rsp)
	movabsq	$274877907008, %rax
	movl	$1, 76(%rsp)
	movl	$1, 88(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	_Z5wtimev
	movsd	%xmm0, (%rsp)
.L28:
	movl	52(%rsp), %ecx
	movq	56(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$16, 44(%rsp)
	movl	64(%rsp), %esi
	movq	44(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	24(%rsp), %rdi
	movl	$1024, %esi
	call	_Z36__device_stub__Z15copy_ghost_colsPhiPhi
.L25:
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	68(%rsp), %rdi
	movl	76(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	24(%rsp), %rdi
	movl	$1024, %esi
	call	_Z36__device_stub__Z15copy_ghost_rowsPhiPhi
.L26:
	movl	88(%rsp), %ecx
	movq	80(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	92(%rsp), %rdi
	movl	100(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$1024, %edx
	call	_Z35__device_stub__Z12update_cellsPhS_iPhS_i
.L27:
	movq	24(%rsp), %rax
	movq	32(%rsp), %rdx
	movq	%rax, 32(%rsp)
	movq	%rdx, 24(%rsp)
	decl	%r12d
	jne	.L28
	call	cudaDeviceSynchronize@PLT
	call	_Z5wtimev
	subsd	(%rsp), %xmm0
	movsd	%xmm0, (%rsp)
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L29
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L29:
	call	_Z5wtimev
	movq	%r15, %xmm1
	movq	%rbx, %rdi
	xorl	%r12d, %r12d
	subsd	%xmm0, %xmm1
	movq	24(%rsp), %rsi
	movl	$1052676, %edx
	movl	$2, %ecx
	movsd	%xmm1, 8(%rsp)
	call	cudaMemcpy@PLT
	call	_Z5wtimev
	addsd	8(%rsp), %xmm0
	movl	$1026, %edx
	movsd	%xmm0, 8(%rsp)
.L30:
	movl	$1, %eax
.L31:
	movzbl	0(%rbp,%rax), %ecx
	incq	%rax
	addq	%rcx, %r12
	cmpq	$1025, %rax
	jne	.L31
	addl	$1026, %edx
	addq	$1026, %rbp
	cmpl	$1051650, %edx
	jne	.L30
	movl	$1024, %ecx
	movl	$1024, %edx
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%r12, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rsi
	call	__printf_chk@PLT
	movsd	(%rsp), %xmm0
	leaq	.LC4(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movsd	8(%rsp), %xmm0
	leaq	.LC5(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC7(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	movsd	.LC6(%rip), %xmm0
	divsd	(%rsp), %xmm0
	call	__printf_chk@PLT
	movsd	(%rsp), %xmm0
	addsd	8(%rsp), %xmm0
	movb	$1, %al
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z12update_cellsPhS_i"
.LC10:
	.string	"_Z15copy_ghost_colsPhi"
.LC11:
	.string	"_Z15copy_ghost_rowsPhi"
.LC12:
	.string	"states"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12update_cellsPhS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15copy_ghost_colsPhi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15copy_ghost_rowsPhi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	movl	$72, %r9d
	leaq	_ZL6states(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL6states
	.comm	_ZL6states,72,32
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC6:
	.long	0
	.long	1083179008
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <inttypes.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>

#define IND(i, j) ((i) * (N + 2) + (j))

enum {
    N = 1024,
    ITERS_MAX = 1 << 10,
    BLOCK_SIZE = 16
};

typedef uint8_t cell_t;

double wtime()
{
    struct timeval t;
    gettimeofday(&t, NULL);
    return (double)t.tv_sec + (double)t.tv_usec * 1E-6;
}

__global__ void copy_ghost_rows(cell_t *grid, int n)
{
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    if (i <= n + 1) {
        // Bottom ghost row: [N + 1][0..N + 1] <== [1][0..N + 1]
        grid[IND(N + 1, i)] = grid[IND(1, i)];
        // Top ghost row: [0][0..N + 1] <== [N][0..N + 1]
        grid[IND(0, i)] = grid[IND(N, i)];
    }
}

__global__ void copy_ghost_cols(cell_t *grid, int n)
{
    int i = blockIdx.x * blockDim.x + threadIdx.x + 1;
    if (i <= n) {
        // Right ghost column: [1..N][N + 1] <== [1..N][1]
        grid[IND(i, N + 1)] = grid[IND(i, 1)];
        // Left ghost column: [1..N][1] <== [1..N][N]
        grid[IND(i, 0)] = grid[IND(i, N)];
    }
}

__constant__ int states[2][9] = {
    {0, 0, 0, 1, 0, 0, 0, 0, 0},  /* New states for a dead cell */
    {0, 0, 1, 1, 0, 0, 0, 0, 0}   /* New states for an alive cell */
};

__global__ void update_cells(cell_t *grid, cell_t *newgrid, int n)
{
    int i = blockIdx.y * blockDim.y + threadIdx.y + 1;
    int j = blockIdx.x * blockDim.x + threadIdx.x + 1;
    
    if (i <= n && j <= n) {                         
        int nneibs = grid[IND(i + 1, j)] + grid[IND(i - 1, j)] +
                     grid[IND(i, j + 1)] + grid[IND(i, j - 1)] +
                     grid[IND(i + 1, j + 1)] + grid[IND(i - 1, j - 1)] +
                     grid[IND(i - 1, j + 1)] + grid[IND(i + 1, j - 1)];
        
        cell_t state = grid[IND(i, j)];
        newgrid[IND(i, j)] = states[state][nneibs];
    }
}

int main(int argc, char* argv[])
{
    // Grid with periodic boundary conditions (ghost cells)
    size_t ncells = (N + 2) * (N + 2);
    size_t size = sizeof(cell_t) * ncells;
    cell_t *grid = (cell_t *)malloc(size);
 
    // Initial population
    srand(0);
    for (int i = 1; i <= N; i++)
        for (int j = 1; j <= N; j++)
            grid[IND(i, j)] = rand() % 2;

    cell_t *d_grid, *d_newgrid;
    double tmem = -wtime();
    hipMalloc((void **)&d_grid, size);
    hipMalloc((void **)&d_newgrid, size);
    hipMemcpy(d_grid, grid, size, hipMemcpyHostToDevice);
    tmem += wtime();
    
    // 1d grids for copying ghost cells
    dim3 block(BLOCK_SIZE, 1, 1);
    dim3 cols_grid((N + block.x - 1) / block.x, 1, 1);
    dim3 rows_grid((N + 2 + block.x - 1) / block.x, 1, 1);
    
    // 2d grid for updating cells: one thread per cell
    dim3 block2d(BLOCK_SIZE, BLOCK_SIZE, 1);
    int nblocks = (N + BLOCK_SIZE - 1) / BLOCK_SIZE; 
    dim3 grid2d(nblocks, nblocks, 1);
    
    double t = wtime();
    int iter = 0;
    for (iter = 0; iter < ITERS_MAX; iter++) {
        // Copy ghost cells
        copy_ghost_cols<<<cols_grid, block>>>(d_grid, N);
        copy_ghost_rows<<<rows_grid, block>>>(d_grid, N);

        // Update cells
        update_cells<<<grid2d, block2d>>>(d_grid, d_newgrid, N);
        
        // Swap grids
        cell_t *p = d_grid;
        d_grid = d_newgrid;
        d_newgrid = p;
    }
    hipDeviceSynchronize();
    t = wtime() - t;
    hipError_t error = hipGetLastError();
    if (error != hipSuccess) {
        printf("CUDA error: %s\n", hipGetErrorString(error));
        exit(EXIT_FAILURE);
    }

    tmem -= wtime();
    hipMemcpy(grid, d_grid, size, hipMemcpyDeviceToHost);
    tmem += wtime();
    
    /*
    for (int i = 0; i < N + 2; i++) {
        for (int j = 0; j < N + 2; j++)
            printf("%1d ", grid[IND(i, j)]);
        printf("\n");        
    }
    */
    size_t total = 0;
    for (int i = 1; i <= N; i++) {
        for (int j = 1; j <= N; j++)
            total += grid[IND(i, j)];
    }
    printf("Game of Life: N = %d, iterations = %d\n", N, iter);
    printf("Total alive cells: %lu\n", total);
    printf("Iterations time (sec.): %.6f\n", t);
    printf("GPU memory ops. time (sec.): %.6f\n", tmem);
    printf("Iters per sec.: %.2f\n", iter / t);
    printf("Total time (sec.): %.6f\n", t + tmem);
    
    free(grid);
    hipFree(d_grid);
    hipFree(d_newgrid);    
    return 0;
}

	.text
	.file	"gol.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z5wtimev
.LCPI0_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z5wtimev
	.type	_Z5wtimev,@function
_Z5wtimev:                              # @_Z5wtimev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z5wtimev, .Lfunc_end0-_Z5wtimev
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__copy_ghost_rowsPhi # -- Begin function _Z30__device_stub__copy_ghost_rowsPhi
	.type	_Z30__device_stub__copy_ghost_rowsPhi,@function
_Z30__device_stub__copy_ghost_rowsPhi:  # @_Z30__device_stub__copy_ghost_rowsPhi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15copy_ghost_rowsPhi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z30__device_stub__copy_ghost_rowsPhi, .Lfunc_end1-_Z30__device_stub__copy_ghost_rowsPhi
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__copy_ghost_colsPhi # -- Begin function _Z30__device_stub__copy_ghost_colsPhi
	.type	_Z30__device_stub__copy_ghost_colsPhi,@function
_Z30__device_stub__copy_ghost_colsPhi:  # @_Z30__device_stub__copy_ghost_colsPhi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15copy_ghost_colsPhi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z30__device_stub__copy_ghost_colsPhi, .Lfunc_end2-_Z30__device_stub__copy_ghost_colsPhi
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__update_cellsPhS_i # -- Begin function _Z27__device_stub__update_cellsPhS_i
	.type	_Z27__device_stub__update_cellsPhS_i,@function
_Z27__device_stub__update_cellsPhS_i:   # @_Z27__device_stub__update_cellsPhS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12update_cellsPhS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z27__device_stub__update_cellsPhS_i, .Lfunc_end3-_Z27__device_stub__update_cellsPhS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
.LCPI4_1:
	.quad	0x4090000000000000              # double 1024
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1052676, %edi                  # imm = 0x101004
	callq	malloc
	movq	%rax, %r12
	xorl	%edi, %edi
	callq	srand
	leaq	1027(%r12), %rbx
	movl	$1, %r14d
.LBB4_1:                                # %.preheader86
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
	xorl	%r15d, %r15d
.LBB4_2:                                #   Parent Loop BB4_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	andl	$254, %ecx
	subl	%ecx, %eax
	movb	%al, (%rbx,%r15)
	incq	%r15
	cmpq	$1024, %r15                     # imm = 0x400
	jne	.LBB4_2
# %bb.3:                                #   in Loop: Header=BB4_1 Depth=1
	incq	%r14
	addq	$1026, %rbx                     # imm = 0x402
	cmpq	$1025, %r14                     # imm = 0x401
	jne	.LBB4_1
# %bb.4:
	movabsq	$4294967312, %r14               # imm = 0x100000010
	leaq	48(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r15), %rax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	8(%r15), %rax
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	leaq	8(%rsp), %r15
	movl	$1052676, %esi                  # imm = 0x101004
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$1052676, %esi                  # imm = 0x101004
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$1052676, %edx                  # imm = 0x101004
	movq	%r12, 40(%rsp)                  # 8-byte Spill
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r15), %rax
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	movq	8(%r15), %rax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	leaq	48(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r15), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	8(%r15), %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movl	$1024, %ebx                     # imm = 0x400
	leaq	48(%r14), %r15
	leaq	49(%r14), %r12
	movabsq	$274877907008, %r13             # imm = 0x4000000040
	movabsq	$68719476752, %rbp              # imm = 0x1000000010
.LBB4_5:                                # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_7
# %bb.6:                                #   in Loop: Header=BB4_5 Depth=1
	movq	8(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	_Z30__device_stub__copy_ghost_colsPhi
.LBB4_7:                                #   in Loop: Header=BB4_5 Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_9
# %bb.8:                                #   in Loop: Header=BB4_5 Depth=1
	movq	8(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	_Z30__device_stub__copy_ghost_rowsPhi
.LBB4_9:                                #   in Loop: Header=BB4_5 Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_11
# %bb.10:                               #   in Loop: Header=BB4_5 Depth=1
	movq	8(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	callq	_Z27__device_stub__update_cellsPhS_i
.LBB4_11:                               #   in Loop: Header=BB4_5 Depth=1
	movq	8(%rsp), %rax
	movq	32(%rsp), %rcx
	movq	%rcx, 8(%rsp)
	movq	%rax, 32(%rsp)
	decl	%ebx
	jne	.LBB4_5
# %bb.12:
	callq	hipDeviceSynchronize
	leaq	48(%rsp), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r14), %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movq	8(%r14), %r13
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_18
# %bb.13:
	xorl	%r14d, %r14d
	leaq	48(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r15), %rbx
	movq	8(%r15), %rbp
	movq	8(%rsp), %rsi
	movl	$1052676, %edx                  # imm = 0x101004
	movq	40(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r15), %rax
	movq	8(%r15), %rcx
	addq	$1027, %r12                     # imm = 0x403
	movl	$1, %esi
.LBB4_14:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_15 Depth 2
	xorl	%edi, %edi
.LBB4_15:                               #   Parent Loop BB4_14 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movzbl	(%r12,%rdi), %r8d
	addq	%r8, %r14
	incq	%rdi
	cmpq	$1024, %rdi                     # imm = 0x400
	jne	.LBB4_15
# %bb.16:                               #   in Loop: Header=BB4_14 Depth=1
	incq	%rsi
	addq	$1026, %r12                     # imm = 0x402
	cmpq	$1025, %rsi                     # imm = 0x401
	jne	.LBB4_14
# %bb.17:
	cvtsi2sd	%rcx, %xmm2
	movsd	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero
	cvtsi2sd	%rax, %xmm0
	mulsd	%xmm1, %xmm2
	addsd	%xmm2, %xmm0
	cvtsi2sd	%rbp, %xmm3
	mulsd	%xmm1, %xmm3
	xorps	%xmm2, %xmm2
	cvtsi2sd	%rbx, %xmm2
	addsd	%xmm3, %xmm2
	xorps	%xmm3, %xmm3
	cvtsi2sd	%r13, %xmm3
	cvtsi2sdq	64(%rsp), %xmm5         # 8-byte Folded Reload
	mulsd	%xmm1, %xmm3
	addsd	%xmm3, %xmm5
	xorps	%xmm3, %xmm3
	cvtsi2sdq	72(%rsp), %xmm3         # 8-byte Folded Reload
	mulsd	%xmm1, %xmm3
	cvtsi2sdq	16(%rsp), %xmm4         # 8-byte Folded Reload
	addsd	%xmm3, %xmm4
	subsd	%xmm4, %xmm5
	movsd	%xmm5, 16(%rsp)                 # 8-byte Spill
	xorps	%xmm3, %xmm3
	cvtsi2sdq	80(%rsp), %xmm3         # 8-byte Folded Reload
	mulsd	%xmm1, %xmm3
	xorps	%xmm5, %xmm5
	cvtsi2sdq	88(%rsp), %xmm5         # 8-byte Folded Reload
	xorps	%xmm4, %xmm4
	cvtsi2sdq	96(%rsp), %xmm4         # 8-byte Folded Reload
	addsd	%xmm3, %xmm5
	mulsd	%xmm1, %xmm4
	xorps	%xmm1, %xmm1
	cvtsi2sdq	24(%rsp), %xmm1         # 8-byte Folded Reload
	addsd	%xmm4, %xmm1
	subsd	%xmm1, %xmm5
	subsd	%xmm2, %xmm5
	addsd	%xmm0, %xmm5
	movsd	%xmm5, 24(%rsp)                 # 8-byte Spill
	movl	$.L.str.1, %edi
	movl	$1024, %esi                     # imm = 0x400
	movl	$1024, %edx                     # imm = 0x400
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.2, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.3, %edi
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$.L.str.4, %edi
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movsd	.LCPI4_1(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	addsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str.6, %edi
	movb	$1, %al
	callq	printf
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_18:
	.cfi_def_cfa_offset 160
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15copy_ghost_rowsPhi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15copy_ghost_colsPhi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12update_cellsPhS_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$states, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$72, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15copy_ghost_rowsPhi,@object  # @_Z15copy_ghost_rowsPhi
	.section	.rodata,"a",@progbits
	.globl	_Z15copy_ghost_rowsPhi
	.p2align	3, 0x0
_Z15copy_ghost_rowsPhi:
	.quad	_Z30__device_stub__copy_ghost_rowsPhi
	.size	_Z15copy_ghost_rowsPhi, 8

	.type	_Z15copy_ghost_colsPhi,@object  # @_Z15copy_ghost_colsPhi
	.globl	_Z15copy_ghost_colsPhi
	.p2align	3, 0x0
_Z15copy_ghost_colsPhi:
	.quad	_Z30__device_stub__copy_ghost_colsPhi
	.size	_Z15copy_ghost_colsPhi, 8

	.type	states,@object                  # @states
	.local	states
	.comm	states,72,16
	.type	_Z12update_cellsPhS_i,@object   # @_Z12update_cellsPhS_i
	.globl	_Z12update_cellsPhS_i
	.p2align	3, 0x0
_Z12update_cellsPhS_i:
	.quad	_Z27__device_stub__update_cellsPhS_i
	.size	_Z12update_cellsPhS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: %s\n"
	.size	.L.str, 16

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Game of Life: N = %d, iterations = %d\n"
	.size	.L.str.1, 39

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Total alive cells: %lu\n"
	.size	.L.str.2, 24

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Iterations time (sec.): %.6f\n"
	.size	.L.str.3, 30

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"GPU memory ops. time (sec.): %.6f\n"
	.size	.L.str.4, 35

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Iters per sec.: %.2f\n"
	.size	.L.str.5, 22

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Total time (sec.): %.6f\n"
	.size	.L.str.6, 25

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15copy_ghost_rowsPhi"
	.size	.L__unnamed_1, 23

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15copy_ghost_colsPhi"
	.size	.L__unnamed_2, 23

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z12update_cellsPhS_i"
	.size	.L__unnamed_3, 22

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"states"
	.size	.L__unnamed_4, 7

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__copy_ghost_rowsPhi
	.addrsig_sym _Z30__device_stub__copy_ghost_colsPhi
	.addrsig_sym _Z27__device_stub__update_cellsPhS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15copy_ghost_rowsPhi
	.addrsig_sym _Z15copy_ghost_colsPhi
	.addrsig_sym states
	.addrsig_sym _Z12update_cellsPhS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15copy_ghost_rowsPhi  ; -- Begin function _Z15copy_ghost_rowsPhi
	.globl	_Z15copy_ghost_rowsPhi
	.p2align	8
	.type	_Z15copy_ghost_rowsPhi,@function
_Z15copy_ghost_rowsPhi:                 ; @_Z15copy_ghost_rowsPhi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s3, s3, 1
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ge_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v2, vcc_lo, 0x100000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v1, vcc_lo
	s_clause 0x1
	global_load_u8 v4, v[0:1], off offset:1026
	global_load_u8 v5, v[2:3], off offset:2048
	s_waitcnt vmcnt(1)
	global_store_b8 v[2:3], v4, off offset:3074
	s_waitcnt vmcnt(0)
	global_store_b8 v[0:1], v5, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15copy_ghost_rowsPhi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15copy_ghost_rowsPhi, .Lfunc_end0-_Z15copy_ghost_rowsPhi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 172
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15copy_ghost_colsPhi  ; -- Begin function _Z15copy_ghost_colsPhi
	.globl	_Z15copy_ghost_colsPhi
	.p2align	8
	.type	_Z15copy_ghost_colsPhi,@function
_Z15copy_ghost_colsPhi:                 ; @_Z15copy_ghost_colsPhi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, exec_lo
	v_add3_u32 v0, v0, s15, 1
	v_cmpx_ge_i32_e64 s3, v0
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mul_lo_u32 v0, 0x402, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_clause 0x1
	global_load_u8 v2, v[0:1], off offset:1
	global_load_u8 v3, v[0:1], off offset:1024
	s_waitcnt vmcnt(1)
	global_store_b8 v[0:1], v2, off offset:1025
	s_waitcnt vmcnt(0)
	global_store_b8 v[0:1], v3, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15copy_ghost_colsPhi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15copy_ghost_colsPhi, .Lfunc_end1-_Z15copy_ghost_colsPhi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12update_cellsPhS_i   ; -- Begin function _Z12update_cellsPhS_i
	.globl	_Z12update_cellsPhS_i
	.p2align	8
	.type	_Z12update_cellsPhS_i,@function
_Z12update_cellsPhS_i:                  ; @_Z12update_cellsPhS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
	v_mad_u64_u32 v[0:1], null, s14, s2, v[4:5]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, 1, v2
	v_add_nc_u32_e32 v1, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v3, v3, v1
	v_cmpx_ge_i32_e64 s3, v3
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mul_lo_u32 v8, 0x402, v2
	v_add_nc_u32_e32 v9, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v10, 0x804, v8
	v_add_nc_u32_e32 v2, v1, v8
	v_add_nc_u32_e32 v11, 0x402, v8
	v_add_nc_u32_e32 v4, v10, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_nc_u32_e32 v6, v11, v9
	v_add_nc_u32_e32 v12, v11, v0
	v_add_nc_u32_e32 v13, v10, v9
	v_ashrrev_i32_e32 v5, 31, v4
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_ashrrev_i32_e32 v7, 31, v6
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, s0, v6
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	v_ashrrev_i32_e32 v14, 31, v12
	s_clause 0x2
	global_load_u8 v15, v[4:5], off
	global_load_u8 v16, v[2:3], off
	global_load_u8 v17, v[6:7], off
	v_add_nc_u32_e32 v6, v8, v0
	v_add_co_u32 v2, vcc_lo, s0, v12
	v_ashrrev_i32_e32 v5, 31, v13
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v7, 31, v6
	v_add_co_u32 v4, vcc_lo, s0, v13
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_nc_u32_e32 v8, v9, v8
	v_add_co_u32 v6, vcc_lo, s0, v6
	global_load_u8 v9, v[2:3], off
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	v_add_nc_u32_e32 v0, v10, v0
	v_ashrrev_i32_e32 v3, 31, v8
	s_clause 0x1
	global_load_u8 v10, v[4:5], off
	global_load_u8 v6, v[6:7], off
	v_add_co_u32 v2, vcc_lo, s0, v8
	v_ashrrev_i32_e32 v5, 31, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_clause 0x1
	global_load_u8 v2, v[2:3], off
	global_load_u8 v3, v[4:5], off
	v_add_nc_u32_e32 v4, v11, v1
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_co_u32 v0, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v5, vcc_lo
	global_load_u8 v7, v[0:1], off
	s_waitcnt vmcnt(8)
	v_and_b32_e32 v0, 0xffff, v15
	s_waitcnt vmcnt(7)
	v_and_b32_e32 v1, 0xffff, v16
	s_waitcnt vmcnt(6)
	v_and_b32_e32 v8, 0xffff, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, s0, v1, v0
	v_add_co_ci_u32_e64 v1, null, 0, 0, s0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, states@rel32@lo+4
	s_addc_u32 s1, s1, states@rel32@hi+12
	v_add_co_u32 v0, vcc_lo, v0, v8
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_waitcnt vmcnt(5)
	v_and_b32_e32 v9, 0xffff, v9
	s_waitcnt vmcnt(4)
	v_and_b32_e32 v8, 0xffff, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v0, v9
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_waitcnt vmcnt(3)
	v_and_b32_e32 v6, 0xffff, v6
	v_add_co_u32 v0, vcc_lo, v0, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, v0, v6
	s_waitcnt vmcnt(2)
	v_and_b32_e32 v2, 0xffff, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, 0xffff, v3
	v_add_co_u32 v0, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, v0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 36, v[0:1]
	v_add_co_u32 v0, vcc_lo, v2, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
	global_load_b32 v2, v[0:1], off
	v_add_co_u32 v0, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v5, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b8 v[0:1], v2, off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12update_cellsPhS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 18
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z12update_cellsPhS_i, .Lfunc_end2-_Z12update_cellsPhS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 748
; NumSgprs: 18
; NumVgprs: 18
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 18
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	states                  ; @states
	.type	states,@object
	.data
	.globl	states
	.p2align	4, 0x0
states:
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	1                               ; 0x1
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	1                               ; 0x1
	.long	1                               ; 0x1
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.size	states, 72

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym states
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15copy_ghost_rowsPhi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15copy_ghost_rowsPhi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15copy_ghost_colsPhi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15copy_ghost_colsPhi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12update_cellsPhS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12update_cellsPhS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     18
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
