/****************************************************************************80

    Array element addition using CUDA on GPUs

    Note: changes from the C++ / CPU-only file marked intentionally w/ "CUDA"
          supposed to be *annoyingly* commented for (self-)educational purposes
          "host" is assumed to be the CPU running the C program.
          "device" is assumed to be the GPU running the kernel.
    
    MIT License

    Copyright (c) 2017 Marcelo Novaes

******************************************************************************/

#include <chrono>
#include <iostream>
#include <math.h>

#include <cuda_runtime.h>

/****************************************************************************80

    PRINT_TIME calculates how many seconds since the start of the program

******************************************************************************/

using namespace std::chrono;

const system_clock::time_point start = system_clock::now();

float print_time()
{
    // elapsed time
    system_clock::time_point end = system_clock::now();
 
    duration<double> elapsed_seconds = end - start;
    std::time_t end_time = system_clock::to_time_t(end);
 
    float elapsed = elapsed_seconds.count();

    // print
    printf("@ %06.3fs > ", elapsed);
    return elapsed;
}

/****************************************************************************80

    ADD_ARRAYS adds elements of two arrays on GPU

******************************************************************************/

// CUDA: kernel defined by __global__ declaration specifier, accessed by host & device
// see: http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#kernels
__global__ void add_arrays(int n, float *x, float *y, float *z)
{
    // loop over the array index adding elements *in parallel*
    // CUDA: threads have an ID, reside within a block, reside within a grid
    // see: http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#thread-hierarchy
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    
    if (i < n)
    {
        z[i] = x[i] + y[i];
    }
}

/****************************************************************************80

    MAIN is the main program for array element addition on GPU example

******************************************************************************/

int main(void)
{
    print_time();
    // set up array dimensions and byte size
    printf("Setting up array dimension and size...\n");
    int N = pow(10, 8); // 100M elements per array
    size_t sizeN = N * sizeof(float);

    print_time();
    // allocate memory for arrays
    // CUDA: this allocation is happening in the host, thus renamed as `h?`
    printf("Allocating memory for arrays...\n");
    float *hx = (float *)malloc(sizeN);
    float *hy = (float *)malloc(sizeN);
    float *hz = (float *)malloc(sizeN);

    // CUDA: this allocation is happening in the device, thus renamed as `d?`
    // CUDA: allocate Unified Memory to be bridged between the  CPU and GPU
    // see: http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#heterogeneous-programming
    // see: http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#um-explicit-allocation
    float *dx = NULL;
    cudaMalloc(&dx, sizeN);
    float *dy = NULL;
    cudaMalloc(&dy, sizeN);
    float *dz = NULL;
    cudaMalloc(&dz, sizeN);

    print_time();
    // initialize x, y, z arrays
    // CUDA: initializing in the host
    printf("Initializing arrays...\n");
    for (int i = 0; i < N; i++)
    {
        hx[i] = 2.0f;
        hy[i] = 3.0f;
        hz[i] = 0.0f;
        //printf("i = %d, hx = %0.6f, hy = %0.6f, hz = %0.6f\n", i, hx[i], hy[i], hz[i]);
    }

    print_time();
    // CUDA: copies the arrays from host to device
    // CUDA: cudaMemcpy(from, to, size, direction);
    printf("Copying arrays from host to device...\n");
    cudaMemcpy(dx, hx, sizeN, cudaMemcpyHostToDevice);
    cudaMemcpy(dy, hy, sizeN, cudaMemcpyHostToDevice);
    cudaMemcpy(dz, hz, sizeN, cudaMemcpyHostToDevice);

    print_time();
    // add elements (on GPU)
    // CUDA: run the kernel call, <<<...>>> notation defines # of CUDA blocks/threads
    // e.g.:  <<<16, 256>>> means 16 blocks of 256 threads
    // this alone doesn't parallelize it, must make changes in the kernel function
    // see: http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#kernels
    // see: http://users.wfu.edu/choss/CUDA/docs/Lecture%205.pdf
    int nThreads = 256; // CUDA: Threads per block
    int nBlocks = N / nThreads; // CUDA: Number of blocks on total grid
    printf("Adding %d elements from both arrays...\n", N);
    printf("Kernel using %d threads for each of %d blocks.\n", nThreads, nBlocks);
    add_arrays<<<nBlocks, nThreads>>>(N, dx, dy, dz); // CUDA: kernel call<<<blocks, threads>>>(args);
  
    // CUDA: wait the GPU to finish commands in all streams of all host threads
    // see: http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#explicit-synchronization
    cudaDeviceSynchronize();
    
    print_time();
    // CUDA: copies the arrays from device back to host
    // CUDA: cudaMemcpy(from, to, size, direction);
    printf("Copying arrays from device back to host...\n");
    cudaMemcpy(hz, dz, sizeN, cudaMemcpyDeviceToHost);

    print_time();
    // sum errors to check for problems
    printf("Aggregating deltas over all elements to check for errors...\n");
    float sumOfErrors = 0.0f;
    for (int i = 0; i < N; i++)
    {
        sumOfErrors += fabs(hx[i] + hy[i] - hz[i]);
    }
    printf("Sum of errors: %.6f\n", sumOfErrors);

    // print first and last z array contents
    printf("hz[0] = %.6f\n", hz[0]);
    printf("hz[N-1] = %.6f\n", hz[N-1]);

    print_time();
    // free mem when done
    printf("Freeing memory...\n");
    delete [] hx;
    delete [] hy;
    delete [] hz;
    // CUDA: device memory can be allocated as linear memory or as CUDA arrays
    // linear memory usually allocated using cudaMalloc(). freed using cudaFree()
    // see: http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#device-memory
    cudaFree(dx);
    cudaFree(dy);
    cudaFree(dz);

    // C'est fini
    print_time();
    printf("Done.\n");

    return 0;
}

	.file	"tmpxft_0021fe38_00000000-6_add-array-gpu.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3743:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3743:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"@ %06.3fs > "
	.text
	.globl	_Z10print_timev
	.type	_Z10print_timev, @function
_Z10print_timev:
.LFB3734:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	subq	_ZL5start(%rip), %rax
	movl	$2, %edi
	leaq	.LC1(%rip), %rsi
	cvtsi2sdq	%rax, %xmm1
	movb	$1, %al
	divsd	.LC0(%rip), %xmm1
	cvtsd2ss	%xmm1, %xmm1
	movss	%xmm1, 12(%rsp)
	cvtss2sd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movss	12(%rsp), %xmm1
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	movaps	%xmm1, %xmm0
	ret
	.cfi_endproc
.LFE3734:
	.size	_Z10print_timev, .-_Z10print_timev
	.globl	_Z35__device_stub__Z10add_arraysiPfS_S_iPfS_S_
	.type	_Z35__device_stub__Z10add_arraysiPfS_S_iPfS_S_, @function
_Z35__device_stub__Z10add_arraysiPfS_S_iPfS_S_:
.LFB3765:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10add_arraysiPfS_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L4:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3765:
	.size	_Z35__device_stub__Z10add_arraysiPfS_S_iPfS_S_, .-_Z35__device_stub__Z10add_arraysiPfS_S_iPfS_S_
	.globl	_Z10add_arraysiPfS_S_
	.type	_Z10add_arraysiPfS_S_, @function
_Z10add_arraysiPfS_S_:
.LFB3766:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10add_arraysiPfS_S_iPfS_S_
	.cfi_endproc
.LFE3766:
	.size	_Z10add_arraysiPfS_S_, .-_Z10add_arraysiPfS_S_
	.section	.rodata.str1.1
.LC3:
	.string	"Setting up array dimension and size...\n"
.LC4:
	.string	"Allocating memory for arrays...\n"
.LC5:
	.string	"Initializing arrays...\n"
.LC8:
	.string	"Copying arrays from host to device...\n"
.LC9:
	.string	"Adding %d elements from both arrays...\n"
.LC10:
	.string	"Kernel using %d threads for each of %d blocks.\n"
.LC11:
	.string	"Copying arrays from device back to host...\n"
.LC12:
	.string	"Aggregating deltas over all elements to check for errors...\n"
.LC14:
	.string	"Sum of errors: %.6f\n"
.LC15:
	.string	"hz[0] = %.6f\n"
.LC16:
	.string	"hz[N-1] = %.6f\n"
.LC17:
	.string	"Freeing memory...\n"
.LC18:
	.string	"Done.\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3739:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Z10print_timev
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	_Z10print_timev
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$400000000, %edi
	call	malloc@PLT
	movl	$400000000, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$400000000, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$400000000, %esi
	movq	%rax, %rbx
	xorl	%eax, %eax
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	xorl	%edx, %edx
	leaq	16(%rsp), %rdi
	movl	$400000000, %esi
	movq	%rdx, 16(%rsp)
	call	cudaMalloc@PLT
	xorl	%ecx, %ecx
	leaq	24(%rsp), %rdi
	movl	$400000000, %esi
	movq	%rcx, 24(%rsp)
	call	cudaMalloc@PLT
	call	_Z10print_timev
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movss	.LC6(%rip), %xmm1
	movss	.LC7(%rip), %xmm0
	xorl	%eax, %eax
.L11:
	movss	%xmm1, (%r12,%rax)
	movss	%xmm0, 0(%rbp,%rax)
	addq	$4, %rax
	cmpq	$400000000, %rax
	jne	.L11
	xorl	%eax, %eax
	movl	$100000000, %ecx
	movq	%rbx, %rdi
	rep stosl
	call	_Z10print_timev
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$400000000, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$400000000, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$400000000, %edx
	call	cudaMemcpy@PLT
	call	_Z10print_timev
	movl	$100000000, %edx
	leaq	.LC9(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$390625, %ecx
	movl	$256, %edx
	xorl	%eax, %eax
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4295357921, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movl	$100000000, %edi
	movq	8(%rsp), %rsi
	call	_Z35__device_stub__Z10add_arraysiPfS_S_iPfS_S_
.L12:
	call	cudaDeviceSynchronize@PLT
	call	_Z10print_timev
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$400000000, %edx
	call	cudaMemcpy@PLT
	call	_Z10print_timev
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
	movss	.LC13(%rip), %xmm2
.L13:
	movss	(%r12,%rax), %xmm1
	addss	0(%rbp,%rax), %xmm1
	subss	(%rbx,%rax), %xmm1
	addq	$4, %rax
	andps	%xmm2, %xmm1
	addss	%xmm1, %xmm0
	cmpq	$400000000, %rax
	jne	.L13
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC15(%rip), %rsi
	cvtss2sd	(%rbx), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC16(%rip), %rsi
	cvtss2sd	399999996(%rbx), %xmm0
	call	__printf_chk@PLT
	call	_Z10print_timev
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	call	_Z10print_timev
	xorl	%eax, %eax
	movl	$2, %edi
	leaq	.LC18(%rip), %rsi
	call	__printf_chk@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3739:
	.size	main, .-main
	.section	.rodata.str1.1
.LC19:
	.string	"_Z10add_arraysiPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3768:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10add_arraysiPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3768:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text.startup
	.type	_GLOBAL__sub_I__Z10print_timev, @function
_GLOBAL__sub_I__Z10print_timev:
.LFB4442:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	%rax, _ZL5start(%rip)
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4442:
	.size	_GLOBAL__sub_I__Z10print_timev, .-_GLOBAL__sub_I__Z10print_timev
	.section	.init_array
	.align 8
	.quad	_GLOBAL__sub_I__Z10print_timev
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL5start
	.comm	_ZL5start,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1104006501
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	1073741824
	.align 4
.LC7:
	.long	1077936128
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC13:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/****************************************************************************80

    Array element addition using CUDA on GPUs

    Note: changes from the C++ / CPU-only file marked intentionally w/ "CUDA"
          supposed to be *annoyingly* commented for (self-)educational purposes
          "host" is assumed to be the CPU running the C program.
          "device" is assumed to be the GPU running the kernel.
    
    MIT License

    Copyright (c) 2017 Marcelo Novaes

******************************************************************************/

#include <chrono>
#include <iostream>
#include <math.h>

#include <hip/hip_runtime.h>

/****************************************************************************80

    PRINT_TIME calculates how many seconds since the start of the program

******************************************************************************/

using namespace std::chrono;

const system_clock::time_point start = system_clock::now();

float print_time()
{
    // elapsed time
    system_clock::time_point end = system_clock::now();
 
    duration<double> elapsed_seconds = end - start;
    std::time_t end_time = system_clock::to_time_t(end);
 
    float elapsed = elapsed_seconds.count();

    // print
    printf("@ %06.3fs > ", elapsed);
    return elapsed;
}

/****************************************************************************80

    ADD_ARRAYS adds elements of two arrays on GPU

******************************************************************************/

// CUDA: kernel defined by __global__ declaration specifier, accessed by host & device
// see: http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#kernels
__global__ void add_arrays(int n, float *x, float *y, float *z)
{
    // loop over the array index adding elements *in parallel*
    // CUDA: threads have an ID, reside within a block, reside within a grid
    // see: http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#thread-hierarchy
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    
    if (i < n)
    {
        z[i] = x[i] + y[i];
    }
}

/****************************************************************************80

    MAIN is the main program for array element addition on GPU example

******************************************************************************/

int main(void)
{
    print_time();
    // set up array dimensions and byte size
    printf("Setting up array dimension and size...\n");
    int N = pow(10, 8); // 100M elements per array
    size_t sizeN = N * sizeof(float);

    print_time();
    // allocate memory for arrays
    // CUDA: this allocation is happening in the host, thus renamed as `h?`
    printf("Allocating memory for arrays...\n");
    float *hx = (float *)malloc(sizeN);
    float *hy = (float *)malloc(sizeN);
    float *hz = (float *)malloc(sizeN);

    // CUDA: this allocation is happening in the device, thus renamed as `d?`
    // CUDA: allocate Unified Memory to be bridged between the  CPU and GPU
    // see: http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#heterogeneous-programming
    // see: http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#um-explicit-allocation
    float *dx = NULL;
    hipMalloc(&dx, sizeN);
    float *dy = NULL;
    hipMalloc(&dy, sizeN);
    float *dz = NULL;
    hipMalloc(&dz, sizeN);

    print_time();
    // initialize x, y, z arrays
    // CUDA: initializing in the host
    printf("Initializing arrays...\n");
    for (int i = 0; i < N; i++)
    {
        hx[i] = 2.0f;
        hy[i] = 3.0f;
        hz[i] = 0.0f;
        //printf("i = %d, hx = %0.6f, hy = %0.6f, hz = %0.6f\n", i, hx[i], hy[i], hz[i]);
    }

    print_time();
    // CUDA: copies the arrays from host to device
    // CUDA: cudaMemcpy(from, to, size, direction);
    printf("Copying arrays from host to device...\n");
    hipMemcpy(dx, hx, sizeN, hipMemcpyHostToDevice);
    hipMemcpy(dy, hy, sizeN, hipMemcpyHostToDevice);
    hipMemcpy(dz, hz, sizeN, hipMemcpyHostToDevice);

    print_time();
    // add elements (on GPU)
    // CUDA: run the kernel call, <<<...>>> notation defines # of CUDA blocks/threads
    // e.g.:  <<<16, 256>>> means 16 blocks of 256 threads
    // this alone doesn't parallelize it, must make changes in the kernel function
    // see: http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#kernels
    // see: http://users.wfu.edu/choss/CUDA/docs/Lecture%205.pdf
    int nThreads = 256; // CUDA: Threads per block
    int nBlocks = N / nThreads; // CUDA: Number of blocks on total grid
    printf("Adding %d elements from both arrays...\n", N);
    printf("Kernel using %d threads for each of %d blocks.\n", nThreads, nBlocks);
    add_arrays<<<nBlocks, nThreads>>>(N, dx, dy, dz); // CUDA: kernel call<<<blocks, threads>>>(args);
  
    // CUDA: wait the GPU to finish commands in all streams of all host threads
    // see: http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#explicit-synchronization
    hipDeviceSynchronize();
    
    print_time();
    // CUDA: copies the arrays from device back to host
    // CUDA: cudaMemcpy(from, to, size, direction);
    printf("Copying arrays from device back to host...\n");
    hipMemcpy(hz, dz, sizeN, hipMemcpyDeviceToHost);

    print_time();
    // sum errors to check for problems
    printf("Aggregating deltas over all elements to check for errors...\n");
    float sumOfErrors = 0.0f;
    for (int i = 0; i < N; i++)
    {
        sumOfErrors += fabs(hx[i] + hy[i] - hz[i]);
    }
    printf("Sum of errors: %.6f\n", sumOfErrors);

    // print first and last z array contents
    printf("hz[0] = %.6f\n", hz[0]);
    printf("hz[N-1] = %.6f\n", hz[N-1]);

    print_time();
    // free mem when done
    printf("Freeing memory...\n");
    delete [] hx;
    delete [] hy;
    delete [] hz;
    // CUDA: device memory can be allocated as linear memory or as CUDA arrays
    // linear memory usually allocated using cudaMalloc(). freed using cudaFree()
    // see: http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#device-memory
    hipFree(dx);
    hipFree(dy);
    hipFree(dz);

    // C'est fini
    print_time();
    printf("Done.\n");

    return 0;
}

	.text
	.file	"add-array-gpu.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z10print_timev
.LCPI0_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
	.text
	.globl	_Z10print_timev
	.type	_Z10print_timev,@function
_Z10print_timev:                        # @_Z10print_timev
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	_ZL5start(%rip), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI0_0(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z10print_timev, .Lfunc_end0-_Z10print_timev
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__add_arraysiPfS_S_ # -- Begin function _Z25__device_stub__add_arraysiPfS_S_
	.type	_Z25__device_stub__add_arraysiPfS_S_,@function
_Z25__device_stub__add_arraysiPfS_S_:   # @_Z25__device_stub__add_arraysiPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10add_arraysiPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__add_arraysiPfS_S_, .Lfunc_end1-_Z25__device_stub__add_arraysiPfS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI2_1:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	_ZL5start(%rip), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	_ZL5start(%rip), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$400000000, %edi                # imm = 0x17D78400
	callq	malloc
	movq	%rax, %rbx
	movl	$400000000, %edi                # imm = 0x17D78400
	callq	malloc
	movq	%rax, %r14
	movl	$1, %edi
	movl	$400000000, %esi                # imm = 0x17D78400
	callq	calloc@PLT
	movq	%rax, %r15
	xorl	%r12d, %r12d
	leaq	16(%rsp), %rdi
	movq	%r12, (%rdi)
	movl	$400000000, %esi                # imm = 0x17D78400
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r12, (%rdi)
	movl	$400000000, %esi                # imm = 0x17D78400
	callq	hipMalloc
	movq	%rsp, %rdi
	movq	%r12, (%rdi)
	movl	$400000000, %esi                # imm = 0x17D78400
	callq	hipMalloc
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	_ZL5start(%rip), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.2, %edi
	callq	puts@PLT
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1073741824, (%rbx,%r12,4)      # imm = 0x40000000
	movl	$1077936128, (%r14,%r12,4)      # imm = 0x40400000
	incq	%r12
	cmpq	$100000000, %r12                # imm = 0x5F5E100
	jne	.LBB2_1
# %bb.2:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	_ZL5start(%rip), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	movsd	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movq	16(%rsp), %rdi
	movl	$400000000, %edx                # imm = 0x17D78400
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$400000000, %edx                # imm = 0x17D78400
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	movl	$400000000, %edx                # imm = 0x17D78400
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	_ZL5start(%rip), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.5, %edi
	movl	$100000000, %esi                # imm = 0x5F5E100
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.6, %edi
	movl	$256, %esi                      # imm = 0x100
	movl	$390625, %edx                   # imm = 0x5F5E1
	xorl	%eax, %eax
	callq	printf
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	leaq	390369(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	(%rsp), %rcx
	movl	$100000000, %edi                # imm = 0x5F5E100
	callq	_Z25__device_stub__add_arraysiPfS_S_
.LBB2_4:
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	_ZL5start(%rip), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	movsd	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movq	(%rsp), %rsi
	movl	$400000000, %edx                # imm = 0x17D78400
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	_ZL5start(%rip), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	xorps	%xmm0, %xmm0
	xorl	%eax, %eax
	movaps	.LCPI2_1(%rip), %xmm1           # xmm1 = [NaN,NaN,NaN,NaN]
.LBB2_5:                                # =>This Inner Loop Header: Depth=1
	movss	(%rbx,%rax,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	addss	(%r14,%rax,4), %xmm2
	subss	(%r15,%rax,4), %xmm2
	andps	%xmm1, %xmm2
	addss	%xmm2, %xmm0
	incq	%rax
	cmpq	$100000000, %rax                # imm = 0x5F5E100
	jne	.LBB2_5
# %bb.6:
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	399999996(%r15), %xmm0
	movl	$.L.str.11, %edi
	movb	$1, %al
	callq	printf
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	_ZL5start(%rip), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	movsd	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	_ZL5start(%rip), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.7, %edi
	callq	puts@PLT
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.section	.text.startup,"ax",@progbits
	.type	_GLOBAL__sub_I_add_array_gpu.hip,@function # -- Begin function _GLOBAL__sub_I_add_array_gpu.hip
_GLOBAL__sub_I_add_array_gpu.hip:       # @_GLOBAL__sub_I_add_array_gpu.hip
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, _ZL5start(%rip)
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_GLOBAL__sub_I_add_array_gpu.hip, .Lfunc_end3-_GLOBAL__sub_I_add_array_gpu.hip
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10add_arraysiPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_ZL5start,@object               # @_ZL5start
	.local	_ZL5start
	.comm	_ZL5start,8,8
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"@ %06.3fs > "
	.size	.L.str, 13

	.type	_Z10add_arraysiPfS_S_,@object   # @_Z10add_arraysiPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z10add_arraysiPfS_S_
	.p2align	3, 0x0
_Z10add_arraysiPfS_S_:
	.quad	_Z25__device_stub__add_arraysiPfS_S_
	.size	_Z10add_arraysiPfS_S_, 8

	.type	.L.str.5,@object                # @.str.5
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.5:
	.asciz	"Adding %d elements from both arrays...\n"
	.size	.L.str.5, 40

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Kernel using %d threads for each of %d blocks.\n"
	.size	.L.str.6, 48

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Sum of errors: %.6f\n"
	.size	.L.str.9, 21

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"hz[0] = %.6f\n"
	.size	.L.str.10, 14

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"hz[N-1] = %.6f\n"
	.size	.L.str.11, 16

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10add_arraysiPfS_S_"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	_GLOBAL__sub_I_add_array_gpu.hip
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Setting up array dimension and size..."
	.size	.Lstr, 39

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Allocating memory for arrays..."
	.size	.Lstr.1, 32

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Initializing arrays..."
	.size	.Lstr.2, 23

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Copying arrays from host to device..."
	.size	.Lstr.3, 38

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Copying arrays from device back to host..."
	.size	.Lstr.4, 43

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Aggregating deltas over all elements to check for errors..."
	.size	.Lstr.5, 60

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"Freeing memory..."
	.size	.Lstr.6, 18

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"Done."
	.size	.Lstr.7, 6

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__add_arraysiPfS_S_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _GLOBAL__sub_I_add_array_gpu.hip
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZL5start
	.addrsig_sym _Z10add_arraysiPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10add_arraysiPfS_S_   ; -- Begin function _Z10add_arraysiPfS_S_
	.globl	_Z10add_arraysiPfS_S_
	.p2align	8
	.type	_Z10add_arraysiPfS_S_,@function
_Z10add_arraysiPfS_S_:                  ; @_Z10add_arraysiPfS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10add_arraysiPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10add_arraysiPfS_S_, .Lfunc_end0-_Z10add_arraysiPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10add_arraysiPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10add_arraysiPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
