#include <cstdlib>
#include <cstdio>
#include <cmath>
#include <cassert>

#define SIZE 32

void print_err_msg(cudaError_t err) {
  if(err != cudaSuccess) {
    printf("%s in %s at line %d\n", cudaGetErrorString(err), __FILE__, __LINE__);
    exit(EXIT_FAILURE);
  }
}

__global__ void matrix_add3(float* d_A, float* d_B, float* d_C, size_t size, size_t h) {
  /*
     The Matrix kernel, each thread operates on 1 Matrix column
     2D Array is represented as flat 1D array 
     2D Array is processed as flat 1D array
   */
  size_t i = threadIdx.x  + blockDim.x*blockIdx.x;
  /* printf("gridDim.x: %d\n", gridDim.x); */
  for(i; i < size; i=i+h) {
    d_C[i] = d_A[i] + d_B[i];
    /* printf("i: %d, d_C[i] %f\n", i, d_C[i]); */
  }
}

__global__ void matrix_add2(float* d_A, float* d_B, float* d_C, size_t size) {
  /*
     The Matrix kernel, each thread operates on 1 Matrix row
     2D Array is represented as flat 1D array 
     2D Array is processed as flat 1D array
   */
  size_t i = threadIdx.x  + gridDim.x*blockIdx.x;
  /* printf("gridDim.x: %d\n", gridDim.x); */
  for(size_t j=i; j < i+gridDim.x && j < size; ++j) {
    d_C[j] = d_A[j] + d_B[j];
    /* printf("i: %d, d_C[i] %f\n", i, d_C[i]); */
  }
}

__global__ void matrix_add(float* d_A, float* d_B, float* d_C, size_t size) {
  /*
     The Matrix kernel, each thread operates on 1 Matrix element
     2D Array is represented as flat 1D array 
     2D Array is processed as flat 1D array
   */
  size_t i = threadIdx.x + blockDim.x*blockIdx.x;
  if(i < size) {
    d_C[i] = d_A[i] + d_B[i];
    /* printf("i: %d, d_C[i] %f\n", i, d_C[i]); */
  }
}

int main() {
  float* h_A;
  float* h_B;
  float* h_C;

  float* d_A;
  float* d_B;
  float* d_C;

  size_t size = SIZE*SIZE;
  size_t bytes = size*sizeof(float);

  h_A = (float *)malloc(bytes);
  h_B = (float *)malloc(bytes);
  h_C = (float *)malloc(bytes);

  cudaError_t err;

  err = cudaMalloc((void **) &d_A, bytes);
  print_err_msg(err);
  err = cudaMalloc((void **) &d_B, bytes);
  print_err_msg(err);
  err = cudaMalloc((void **) &d_C, bytes);
  print_err_msg(err);

  for(size_t i = 0; i < size; ++i) {
    h_A[i] = 1.0f;
    h_B[i] = 2.0f;
    h_C[i] = 5.0f;
  }

  err = cudaMemcpy(d_A, h_A, bytes, cudaMemcpyHostToDevice);
  print_err_msg(err);
  err = cudaMemcpy(d_B, h_B, bytes, cudaMemcpyHostToDevice);
  print_err_msg(err);

  /* int threads = SIZE; */
  /* int blocks = ceil(size/threads); */
  /* matrix_add<<<blocks, threads>>>(d_A, d_B, d_C, size); */

  /* int threads = 1; */
  /* int blocks = ceil(size/(SIZE*threads)); */
  /* matrix_add2<<<blocks, threads>>>(d_A, d_B, d_C, size); */

  int threads = 32;
  int blocks = ceil(size/(SIZE*threads));
  matrix_add2<<<blocks, threads>>>(d_A, d_B, d_C, size);

  err = cudaMemcpy(h_C, d_C, bytes, cudaMemcpyDeviceToHost);
  print_err_msg(err);
  
  for(size_t i = 0; i < size; ++i) {
    assert(h_C[i] == 3.0f);
    /* printf("%f ", h_C[i]); */
    /* if(i % SIZE == 0) printf("\n"); */
  }

  free(h_A);
  free(h_B);
  free(h_C);

  err = cudaFree(d_A);
  print_err_msg(err);
  err = cudaFree(d_B);
  print_err_msg(err);
  err = cudaFree(d_C);
  print_err_msg(err);

  return 0;
}

	.file	"tmpxft_002df022_00000000-6_matrix_add2.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/palPrabhakar/tutorials/master/cuda/kirk_hwu/ch3/matrix_add2.cu"
.LC1:
	.string	"%s in %s at line %d\n"
	.text
	.globl	_Z13print_err_msg9cudaError
	.type	_Z13print_err_msg9cudaError, @function
_Z13print_err_msg9cudaError:
.LFB2027:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movl	$10, %r8d
	leaq	.LC0(%rip), %rcx
	movq	%rax, %rdx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z13print_err_msg9cudaError, .-_Z13print_err_msg9cudaError
	.globl	_Z37__device_stub__Z11matrix_add3PfS_S_mmPfS_S_mm
	.type	_Z37__device_stub__Z11matrix_add3PfS_S_mmPfS_S_mm, @function
_Z37__device_stub__Z11matrix_add3PfS_S_mmPfS_S_mm:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z11matrix_add3PfS_S_mm(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L8:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z37__device_stub__Z11matrix_add3PfS_S_mmPfS_S_mm, .-_Z37__device_stub__Z11matrix_add3PfS_S_mmPfS_S_mm
	.globl	_Z11matrix_add3PfS_S_mm
	.type	_Z11matrix_add3PfS_S_mm, @function
_Z11matrix_add3PfS_S_mm:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z11matrix_add3PfS_S_mmPfS_S_mm
	.cfi_endproc
.LFE2054:
	.size	_Z11matrix_add3PfS_S_mm, .-_Z11matrix_add3PfS_S_mm
	.globl	_Z36__device_stub__Z11matrix_add2PfS_S_mPfS_S_m
	.type	_Z36__device_stub__Z11matrix_add2PfS_S_mPfS_S_m, @function
_Z36__device_stub__Z11matrix_add2PfS_S_mPfS_S_m:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11matrix_add2PfS_S_m(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L13:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z36__device_stub__Z11matrix_add2PfS_S_mPfS_S_m, .-_Z36__device_stub__Z11matrix_add2PfS_S_mPfS_S_m
	.globl	_Z11matrix_add2PfS_S_m
	.type	_Z11matrix_add2PfS_S_m, @function
_Z11matrix_add2PfS_S_m:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z11matrix_add2PfS_S_mPfS_S_m
	.cfi_endproc
.LFE2056:
	.size	_Z11matrix_add2PfS_S_m, .-_Z11matrix_add2PfS_S_m
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$4096, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$4096, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$4096, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$4096, %esi
	leaq	8(%rsp), %rdi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z13print_err_msg9cudaError
	movl	$4096, %esi
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z13print_err_msg9cudaError
	leaq	24(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z13print_err_msg9cudaError
	movss	.LC2(%rip), %xmm2
	movss	.LC3(%rip), %xmm1
	xorl	%eax, %eax
	movss	.LC4(%rip), %xmm0
.L19:
	movss	%xmm2, (%r12,%rax,4)
	movss	%xmm1, 0(%rbp,%rax,4)
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	cmpq	$1024, %rax
	jne	.L19
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$4096, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z13print_err_msg9cudaError
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$4096, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z13print_err_msg9cudaError
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1024, %ecx
	movq	8(%rsp), %rdi
	call	_Z36__device_stub__Z11matrix_add2PfS_S_mPfS_S_m
.L20:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$4096, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z13print_err_msg9cudaError
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z13print_err_msg9cudaError
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z13print_err_msg9cudaError
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z13print_err_msg9cudaError
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.text
	.globl	_Z35__device_stub__Z10matrix_addPfS_S_mPfS_S_m
	.type	_Z35__device_stub__Z10matrix_addPfS_S_mPfS_S_m, @function
_Z35__device_stub__Z10matrix_addPfS_S_mPfS_S_m:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10matrix_addPfS_S_m(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L24:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z35__device_stub__Z10matrix_addPfS_S_mPfS_S_m, .-_Z35__device_stub__Z10matrix_addPfS_S_mPfS_S_m
	.globl	_Z10matrix_addPfS_S_m
	.type	_Z10matrix_addPfS_S_m, @function
_Z10matrix_addPfS_S_m:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10matrix_addPfS_S_mPfS_S_m
	.cfi_endproc
.LFE2058:
	.size	_Z10matrix_addPfS_S_m, .-_Z10matrix_addPfS_S_m
	.section	.rodata.str1.1
.LC5:
	.string	"_Z10matrix_addPfS_S_m"
.LC6:
	.string	"_Z11matrix_add2PfS_S_m"
.LC7:
	.string	"_Z11matrix_add3PfS_S_mm"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10matrix_addPfS_S_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11matrix_add2PfS_S_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11matrix_add3PfS_S_mm(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1065353216
	.align 4
.LC3:
	.long	1073741824
	.align 4
.LC4:
	.long	1084227584
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdlib>
#include <cstdio>
#include <cmath>
#include <cassert>

#define SIZE 32

void print_err_msg(hipError_t err) {
  if(err != hipSuccess) {
    printf("%s in %s at line %d\n", hipGetErrorString(err), __FILE__, __LINE__);
    exit(EXIT_FAILURE);
  }
}

__global__ void matrix_add3(float* d_A, float* d_B, float* d_C, size_t size, size_t h) {
  /*
     The Matrix kernel, each thread operates on 1 Matrix column
     2D Array is represented as flat 1D array 
     2D Array is processed as flat 1D array
   */
  size_t i = threadIdx.x  + blockDim.x*blockIdx.x;
  /* printf("gridDim.x: %d\n", gridDim.x); */
  for(i; i < size; i=i+h) {
    d_C[i] = d_A[i] + d_B[i];
    /* printf("i: %d, d_C[i] %f\n", i, d_C[i]); */
  }
}

__global__ void matrix_add2(float* d_A, float* d_B, float* d_C, size_t size) {
  /*
     The Matrix kernel, each thread operates on 1 Matrix row
     2D Array is represented as flat 1D array 
     2D Array is processed as flat 1D array
   */
  size_t i = threadIdx.x  + gridDim.x*blockIdx.x;
  /* printf("gridDim.x: %d\n", gridDim.x); */
  for(size_t j=i; j < i+gridDim.x && j < size; ++j) {
    d_C[j] = d_A[j] + d_B[j];
    /* printf("i: %d, d_C[i] %f\n", i, d_C[i]); */
  }
}

__global__ void matrix_add(float* d_A, float* d_B, float* d_C, size_t size) {
  /*
     The Matrix kernel, each thread operates on 1 Matrix element
     2D Array is represented as flat 1D array 
     2D Array is processed as flat 1D array
   */
  size_t i = threadIdx.x + blockDim.x*blockIdx.x;
  if(i < size) {
    d_C[i] = d_A[i] + d_B[i];
    /* printf("i: %d, d_C[i] %f\n", i, d_C[i]); */
  }
}

int main() {
  float* h_A;
  float* h_B;
  float* h_C;

  float* d_A;
  float* d_B;
  float* d_C;

  size_t size = SIZE*SIZE;
  size_t bytes = size*sizeof(float);

  h_A = (float *)malloc(bytes);
  h_B = (float *)malloc(bytes);
  h_C = (float *)malloc(bytes);

  hipError_t err;

  err = hipMalloc((void **) &d_A, bytes);
  print_err_msg(err);
  err = hipMalloc((void **) &d_B, bytes);
  print_err_msg(err);
  err = hipMalloc((void **) &d_C, bytes);
  print_err_msg(err);

  for(size_t i = 0; i < size; ++i) {
    h_A[i] = 1.0f;
    h_B[i] = 2.0f;
    h_C[i] = 5.0f;
  }

  err = hipMemcpy(d_A, h_A, bytes, hipMemcpyHostToDevice);
  print_err_msg(err);
  err = hipMemcpy(d_B, h_B, bytes, hipMemcpyHostToDevice);
  print_err_msg(err);

  /* int threads = SIZE; */
  /* int blocks = ceil(size/threads); */
  /* matrix_add<<<blocks, threads>>>(d_A, d_B, d_C, size); */

  /* int threads = 1; */
  /* int blocks = ceil(size/(SIZE*threads)); */
  /* matrix_add2<<<blocks, threads>>>(d_A, d_B, d_C, size); */

  int threads = 32;
  int blocks = ceil(size/(SIZE*threads));
  matrix_add2<<<blocks, threads>>>(d_A, d_B, d_C, size);

  err = hipMemcpy(h_C, d_C, bytes, hipMemcpyDeviceToHost);
  print_err_msg(err);
  
  for(size_t i = 0; i < size; ++i) {
    assert(h_C[i] == 3.0f);
    /* printf("%f ", h_C[i]); */
    /* if(i % SIZE == 0) printf("\n"); */
  }

  free(h_A);
  free(h_B);
  free(h_C);

  err = hipFree(d_A);
  print_err_msg(err);
  err = hipFree(d_B);
  print_err_msg(err);
  err = hipFree(d_C);
  print_err_msg(err);

  return 0;
}

	.text
	.file	"matrix_add2.hip"
	.globl	_Z13print_err_msg10hipError_t   # -- Begin function _Z13print_err_msg10hipError_t
	.type	_Z13print_err_msg10hipError_t,@function
_Z13print_err_msg10hipError_t:          # @_Z13print_err_msg10hipError_t
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB0_2
# %bb.1:
	retq
.LBB0_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %edx
	movq	%rax, %rsi
	movl	$12, %ecx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z13print_err_msg10hipError_t, .Lfunc_end0-_Z13print_err_msg10hipError_t
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__matrix_add3PfS_S_mm # -- Begin function _Z26__device_stub__matrix_add3PfS_S_mm
	.type	_Z26__device_stub__matrix_add3PfS_S_mm,@function
_Z26__device_stub__matrix_add3PfS_S_mm: # @_Z26__device_stub__matrix_add3PfS_S_mm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11matrix_add3PfS_S_mm, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z26__device_stub__matrix_add3PfS_S_mm, .Lfunc_end1-_Z26__device_stub__matrix_add3PfS_S_mm
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__matrix_add2PfS_S_m # -- Begin function _Z26__device_stub__matrix_add2PfS_S_m
	.type	_Z26__device_stub__matrix_add2PfS_S_m,@function
_Z26__device_stub__matrix_add2PfS_S_m:  # @_Z26__device_stub__matrix_add2PfS_S_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11matrix_add2PfS_S_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z26__device_stub__matrix_add2PfS_S_m, .Lfunc_end2-_Z26__device_stub__matrix_add2PfS_S_m
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__matrix_addPfS_S_m # -- Begin function _Z25__device_stub__matrix_addPfS_S_m
	.type	_Z25__device_stub__matrix_addPfS_S_m,@function
_Z25__device_stub__matrix_addPfS_S_m:   # @_Z25__device_stub__matrix_addPfS_S_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10matrix_addPfS_S_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z25__device_stub__matrix_addPfS_S_m, .Lfunc_end3-_Z25__device_stub__matrix_addPfS_S_m
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$4096, %edi                     # imm = 0x1000
	callq	malloc
	movq	%rax, %rbx
	movl	$4096, %edi                     # imm = 0x1000
	callq	malloc
	movq	%rax, %r14
	movl	$4096, %edi                     # imm = 0x1000
	callq	malloc
	movq	%rax, %r15
	leaq	24(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	movl	%eax, %edi
	callq	_Z13print_err_msg10hipError_t
	leaq	16(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	movl	%eax, %edi
	callq	_Z13print_err_msg10hipError_t
	leaq	8(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	movl	%eax, %edi
	callq	_Z13print_err_msg10hipError_t
	xorl	%eax, %eax
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rbx,%rax,4)      # imm = 0x3F800000
	movl	$1073741824, (%r14,%rax,4)      # imm = 0x40000000
	movl	$1084227584, (%r15,%rax,4)      # imm = 0x40A00000
	incq	%rax
	cmpq	$1024, %rax                     # imm = 0x400
	jne	.LBB4_1
# %bb.2:
	movq	24(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_Z13print_err_msg10hipError_t
	movq	16(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_Z13print_err_msg10hipError_t
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	31(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$1024, %ecx                     # imm = 0x400
	callq	_Z26__device_stub__matrix_add2PfS_S_m
.LBB4_4:
	movq	8(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_Z13print_err_msg10hipError_t
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	_Z13print_err_msg10hipError_t
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	_Z13print_err_msg10hipError_t
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	_Z13print_err_msg10hipError_t
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11matrix_add3PfS_S_mm, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11matrix_add2PfS_S_m, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10matrix_addPfS_S_m, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%s in %s at line %d\n"
	.size	.L.str, 21

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/palPrabhakar/tutorials/master/cuda/kirk_hwu/ch3/matrix_add2.hip"
	.size	.L.str.1, 126

	.type	_Z11matrix_add3PfS_S_mm,@object # @_Z11matrix_add3PfS_S_mm
	.section	.rodata,"a",@progbits
	.globl	_Z11matrix_add3PfS_S_mm
	.p2align	3, 0x0
_Z11matrix_add3PfS_S_mm:
	.quad	_Z26__device_stub__matrix_add3PfS_S_mm
	.size	_Z11matrix_add3PfS_S_mm, 8

	.type	_Z11matrix_add2PfS_S_m,@object  # @_Z11matrix_add2PfS_S_m
	.globl	_Z11matrix_add2PfS_S_m
	.p2align	3, 0x0
_Z11matrix_add2PfS_S_m:
	.quad	_Z26__device_stub__matrix_add2PfS_S_m
	.size	_Z11matrix_add2PfS_S_m, 8

	.type	_Z10matrix_addPfS_S_m,@object   # @_Z10matrix_addPfS_S_m
	.globl	_Z10matrix_addPfS_S_m
	.p2align	3, 0x0
_Z10matrix_addPfS_S_m:
	.quad	_Z25__device_stub__matrix_addPfS_S_m
	.size	_Z10matrix_addPfS_S_m, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z11matrix_add3PfS_S_mm"
	.size	.L__unnamed_1, 24

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11matrix_add2PfS_S_m"
	.size	.L__unnamed_2, 23

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z10matrix_addPfS_S_m"
	.size	.L__unnamed_3, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__matrix_add3PfS_S_mm
	.addrsig_sym _Z26__device_stub__matrix_add2PfS_S_m
	.addrsig_sym _Z25__device_stub__matrix_addPfS_S_m
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11matrix_add3PfS_S_mm
	.addrsig_sym _Z11matrix_add2PfS_S_m
	.addrsig_sym _Z10matrix_addPfS_S_m
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11matrix_add3PfS_S_mm ; -- Begin function _Z11matrix_add3PfS_S_mm
	.globl	_Z11matrix_add3PfS_S_mm
	.p2align	8
	.type	_Z11matrix_add3PfS_S_mm,@function
_Z11matrix_add3PfS_S_mm:                ; @_Z11matrix_add3PfS_S_mm
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u64_e64 s[10:11], v[1:2]
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b64 s[2:3], s[0:1], 0x20
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_mov_b32 s1, 0
	s_waitcnt lgkmcnt(0)
	s_lshl_b64 s[12:13], s[2:3], 2
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v1, vcc_lo, v1, s2
	global_load_b32 v0, v[5:6], off
	global_load_b32 v7, v[7:8], off
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	v_add_co_u32 v5, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e32 vcc_lo, s[10:11], v[1:2]
	v_add_co_u32 v3, s0, v3, s12
	v_add_co_ci_u32_e64 v4, s0, s13, v4, s0
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v7
	global_store_b32 v[5:6], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11matrix_add3PfS_S_mm
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11matrix_add3PfS_S_mm, .Lfunc_end0-_Z11matrix_add3PfS_S_mm
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 224
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11matrix_add2PfS_S_m  ; -- Begin function _Z11matrix_add2PfS_S_m
	.globl	_Z11matrix_add2PfS_S_m
	.p2align	8
	.type	_Z11matrix_add2PfS_S_m,@function
_Z11matrix_add2PfS_S_m:                 ; @_Z11matrix_add2PfS_S_m
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x20
	s_load_b256 s[0:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[1:2], null, s8, s15, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s8, v1, s8
	v_add_co_ci_u32_e64 v4, null, 0, 0, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, s[6:7], v[3:4]
	v_dual_mov_b32 v2, 0 :: v_dual_cndmask_b32 v3, s6, v3
	v_cndmask_b32_e32 v4, s7, v4, vcc_lo
	s_mov_b32 s6, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_gt_u64_e64 v[3:4], v[1:2]
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.lr.ph.preheader
	v_lshlrev_b64 v[9:10], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v9
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v10, vcc_lo
	v_add_co_u32 v7, vcc_lo, s2, v9
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v10, vcc_lo
	v_add_co_u32 v9, vcc_lo, s0, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v10, vcc_lo
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v0, v[9:10], off
	global_load_b32 v11, v[7:8], off
	v_add_co_u32 v1, vcc_lo, v1, 1
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v7, vcc_lo, v7, 4
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	v_add_co_u32 v9, vcc_lo, v9, 4
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	v_cmp_ge_u64_e32 vcc_lo, v[1:2], v[3:4]
	s_or_b32 s6, vcc_lo, s6
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v11
	global_store_b32 v[5:6], v0, off
	v_add_co_u32 v5, s0, v5, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, 0, v6, s0
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB1_2
.LBB1_3:                                ; %Flow33
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11matrix_add2PfS_S_m
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11matrix_add2PfS_S_m, .Lfunc_end1-_Z11matrix_add2PfS_S_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 256
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10matrix_addPfS_S_m   ; -- Begin function _Z10matrix_addPfS_S_m
	.globl	_Z10matrix_addPfS_S_m
	.p2align	8
	.type	_Z10matrix_addPfS_S_m,@function
_Z10matrix_addPfS_S_m:                  ; @_Z10matrix_addPfS_S_m
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b256 s[0:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	v_mov_b32_e32 v2, 0
	v_cmp_gt_u64_e32 vcc_lo, s[6:7], v[1:2]
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB2_2
; %bb.1:
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10matrix_addPfS_S_m
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z10matrix_addPfS_S_m, .Lfunc_end2-_Z10matrix_addPfS_S_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           8
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
