/*
This is the function you need to implement. Quick reference:
- input rows: 0 <= y < ny
- input columns: 0 <= x < nx
- element at row y and column x is stored in data[x + y*nx]
- correlation between rows i and row j has to be stored in result[i + j*ny]
- only parts with 0 <= j <= i < ny need to be filled
*/
#include <cuda_runtime.h>
#include "device_launch_parameters.h"
#include <iostream>
#include <math.h>
#include <vector>



static inline void check(cudaError_t err, const char* context) {
  if (err != cudaSuccess) {
      std::cerr << "CUDA error: " << context << ": "
          << cudaGetErrorString(err) << std::endl;
      std::exit(EXIT_FAILURE);
  }
}

#define CHECK(x) check(x, #x)

template <class T>
void cuda_memcpy(T* target, const T* source, std::size_t num, cudaMemcpyKind direction) {
  CHECK(cudaMemcpy(target, source, num * sizeof(T), direction));
}

__global__ void correlate_gpu(int ny, int nx, const float*data, float *result){
  int i=threadIdx.x+blockIdx.x*blockDim.x;
  int j=threadIdx.y+blockIdx.y*blockDim.y;
  if(i>=ny || j>=ny) return;
  if (i>j){
    result[i*ny+j]=0;
    return;
  }
  double temp=0;
  for (int k=0; k<nx; ++k){
    temp+=data[i*nx+k]*data[j*nx+k];
  }
  result[i*ny+j]=temp;
}


static inline int divup(int a, int b) {
  return (a + b - 1)/b;
}

void correlate(int ny, int nx, const float *data, float *result) {

  //allocate memory & copy data to GPU
  
  float *dGPU=NULL;
  CHECK(cudaMalloc((void**)&dGPU,ny*nx*sizeof(float)));
  float *rGPU=NULL;
  CHECK(cudaMalloc((void**)&rGPU,ny*ny*sizeof(float)));


  // float *avg=new float[ny]{0};
  // float *normalized=new float[ny*nx]{0};
  // float *sqrtSqureSum=new float[ny]{0};



  std::vector<float> avg(ny,0);
  std::vector<float> normalized(ny*nx,0);
  std::vector<float> sqrtSqureSum(ny,0);

  for (int y=0; y<ny; ++y){
    double temp=0;
    for (int x=0; x<nx; ++x){
      temp+=data[y*nx+x];
    }
    avg[y]=temp/nx;
  }
  for (int y=0; y<ny; ++y){
    for (int x=0; x<nx; ++x){
      normalized[y*nx+x]=data[y*nx+x]-avg[y];
    }
  }
  // delete[] avg;
  for (int y=0; y<ny; ++y){
    for (int x=0; x<nx; ++x){
      sqrtSqureSum[y]+=pow(normalized[y*nx+x],2);
    }
    sqrtSqureSum[y]=sqrt(sqrtSqureSum[y]);
  }
  for (int y=0; y<ny; ++y){
    for (int x=0; x<nx; ++x){
      normalized[y*nx+x]/=sqrtSqureSum[y];
    }
  }
  // delete[] sqrtSqureSum;


  cuda_memcpy(dGPU,normalized.data(),ny*nx,cudaMemcpyHostToDevice);
  // CHECK(cudaMemcpy(dGPU,normalized.data(),ny*nx*sizeof(float),cudaMemcpyHostToDevice));
  dim3 dimBlock(16,16);
  dim3 dimGrid(divup(ny,dimBlock.x),divup(ny,dimBlock.y));
  correlate_gpu<<<dimGrid,dimBlock>>>(ny,nx,dGPU,rGPU);
  CHECK(cudaGetLastError());
  cuda_memcpy(result, rGPU, ny * ny, cudaMemcpyDeviceToHost);
  // CHECK(cudaMemcpy(result, rGPU, ny * ny * sizeof(float), cudaMemcpyDeviceToHost));
  CHECK(cudaFree(dGPU));
  CHECK(cudaFree(rGPU));
  // delete[] normalized;
}

	.file	"tmpxft_002ae3ed_00000000-6_cp.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4004:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4004:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error: "
.LC1:
	.string	": "
	.text
	.type	_ZL5check9cudaErrorPKc, @function
_ZL5check9cudaErrorPKc:
.LFB3998:
	.cfi_startproc
	testl	%edi, %edi
	je	.L2
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	leaq	.LC0(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	leaq	_ZSt4cerr(%rip), %rdi
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE3998:
	.size	_ZL5check9cudaErrorPKc, .-_ZL5check9cudaErrorPKc
	.globl	_Z38__device_stub__Z13correlate_gpuiiPKfPfiiPKfPf
	.type	_Z38__device_stub__Z13correlate_gpuiiPKfPfiiPKfPf, @function
_Z38__device_stub__Z13correlate_gpuiiPKfPfiiPKfPf:
.LFB4026:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13correlate_gpuiiPKfPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4026:
	.size	_Z38__device_stub__Z13correlate_gpuiiPKfPfiiPKfPf, .-_Z38__device_stub__Z13correlate_gpuiiPKfPfiiPKfPf
	.globl	_Z13correlate_gpuiiPKfPf
	.type	_Z13correlate_gpuiiPKfPf, @function
_Z13correlate_gpuiiPKfPf:
.LFB4027:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z13correlate_gpuiiPKfPfiiPKfPf
	.cfi_endproc
.LFE4027:
	.size	_Z13correlate_gpuiiPKfPf, .-_Z13correlate_gpuiiPKfPf
	.section	.rodata.str1.1
.LC2:
	.string	"_Z13correlate_gpuiiPKfPf"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13correlate_gpuiiPKfPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4029:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZNSt6vectorIfSaIfEEC2EmRKfRKS0_.str1.1,"aMS",@progbits,1
.LC3:
	.string	"cannot create std::vector larger than max_size()"
	.section	.text._ZNSt6vectorIfSaIfEEC2EmRKfRKS0_,"axG",@progbits,_ZNSt6vectorIfSaIfEEC5EmRKfRKS0_,comdat
	.align 2
	.weak	_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_
	.type	_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_, @function
_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_:
.LFB4339:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693951, %rax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rcx
	.cfi_def_cfa_offset 48
	cmpq	%rsi, %rax
	jnb	.L16
	leaq	.LC3(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L16:
	movq	%rdx, %r13
	xorl	%edx, %edx
	movq	%rdi, %rbx
	movq	%rsi, %rbp
	movq	%rdx, (%rdi)
	leaq	0(,%rsi,4), %r12
	xorl	%eax, %eax
	movq	%rdx, 8(%rdi)
	movq	%rdx, 16(%rdi)
	testq	%rsi, %rsi
	je	.L17
	movq	%r12, %rdi
	call	_Znwm@PLT
.L17:
	addq	%rax, %r12
	movq	%rax, (%rbx)
	movq	%r12, 16(%rbx)
	testq	%rbp, %rbp
	je	.L18
	movss	0(%r13), %xmm0
.L19:
	cmpq	%rax, %r12
	je	.L18
	movss	%xmm0, (%rax)
	addq	$4, %rax
	jmp	.L19
.L18:
	movq	%rax, 8(%rbx)
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4339:
	.size	_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_, .-_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_
	.weak	_ZNSt6vectorIfSaIfEEC1EmRKfRKS0_
	.set	_ZNSt6vectorIfSaIfEEC1EmRKfRKS0_,_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_
	.section	.text._ZNSt6vectorIfSaIfEED2Ev,"axG",@progbits,_ZNSt6vectorIfSaIfEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIfSaIfEED2Ev
	.type	_ZNSt6vectorIfSaIfEED2Ev, @function
_ZNSt6vectorIfSaIfEED2Ev:
.LFB4342:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L27
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L27:
	ret
	.cfi_endproc
.LFE4342:
	.size	_ZNSt6vectorIfSaIfEED2Ev, .-_ZNSt6vectorIfSaIfEED2Ev
	.weak	_ZNSt6vectorIfSaIfEED1Ev
	.set	_ZNSt6vectorIfSaIfEED1Ev,_ZNSt6vectorIfSaIfEED2Ev
	.section	.rodata.str1.1
.LC5:
	.string	"cudaMalloc((void**)&dGPU,ny*nx*sizeof(float))"
.LC6:
	.string	"cudaMalloc((void**)&rGPU,ny*ny*sizeof(float))"
.LC8:
	.string	"cudaMemcpy(target, source, num * sizeof(T), direction)"
.LC9:
	.string	"cudaGetLastError()"
.LC10:
	.string	"cudaFree(dGPU)"
.LC11:
	.string	"cudaFree(rGPU)"
	.text
	.globl	_Z9correlateiiPKfPf
	.type	_Z9correlateiiPKfPf, @function
_Z9correlateiiPKfPf:
.LFB4001:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4001
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movslq	%edi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r14d, %r8d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	imull	%esi, %r8d
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r14, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	movslq	%r8d, %r13
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%rcx, 40(%rsp)
	leaq	56(%rsp), %rdi
	leaq	84(%rsp), %r15
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rax, 56(%rsp)
	leaq	0(,%r13,4), %rax
	movq	%rax, %rsi
	movq	%rax, 24(%rsp)
.LEHB0:
	call	cudaMalloc@PLT
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_ZL5check9cudaErrorPKc
	movl	%r14d, %eax
	xorl	%edx, %edx
	leaq	64(%rsp), %rdi
	imull	%r14d, %eax
	movq	%rdx, 64(%rsp)
	cltq
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 32(%rsp)
	call	cudaMalloc@PLT
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_ZL5check9cudaErrorPKc
	leaq	120(%rsp), %rax
	movq	%r14, %rsi
	movl	$0x00000000, 144(%rsp)
	movq	%rax, 8(%rsp)
	leaq	144(%rsp), %rax
	movq	8(%rsp), %rcx
	movq	%rax, (%rsp)
	leaq	96(%rsp), %rax
	movq	(%rsp), %rdx
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	_ZNSt6vectorIfSaIfEEC1EmRKfRKS0_
.LEHE0:
	movq	(%rsp), %rdx
	movq	%r15, %rcx
	movq	%r13, %rsi
	movl	$0x00000000, 144(%rsp)
	movq	8(%rsp), %rdi
.LEHB1:
	call	_ZNSt6vectorIfSaIfEEC1EmRKfRKS0_
.LEHE1:
	movq	(%rsp), %rdi
	leaq	72(%rsp), %rcx
	movq	%r15, %rdx
	movq	%r14, %rsi
	movl	$0x00000000, 84(%rsp)
.LEHB2:
	call	_ZNSt6vectorIfSaIfEEC1EmRKfRKS0_
.LEHE2:
	movq	96(%rsp), %rcx
	xorl	%esi, %esi
	xorl	%edx, %edx
.L30:
	cmpl	%edx, %ebp
	jle	.L32
	movslq	%esi, %rax
	xorps	%xmm0, %xmm0
	leaq	(%r12,%rax,4), %rdi
	xorl	%eax, %eax
.L33:
	cmpl	%eax, %ebx
	jle	.L57
	cvtss2sd	(%rdi,%rax,4), %xmm1
	incq	%rax
	addsd	%xmm1, %xmm0
	jmp	.L33
.L57:
	cvtsi2sdl	%ebx, %xmm1
	addl	%ebx, %esi
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rcx,%rdx,4)
	incq	%rdx
	jmp	.L30
.L32:
	movq	120(%rsp), %r14
	xorl	%edi, %edi
	xorl	%edx, %edx
.L34:
	cmpl	%edx, %ebp
	jle	.L50
	movslq	%edi, %rax
	xorl	%esi, %esi
	salq	$2, %rax
.L37:
	cmpl	%ebx, %esi
	jge	.L58
	movss	(%r12,%rax), %xmm0
	subss	(%rcx,%rdx,4), %xmm0
	incl	%esi
	movss	%xmm0, (%r14,%rax)
	addq	$4, %rax
	jmp	.L37
.L58:
	incq	%rdx
	addl	%ebx, %edi
	jmp	.L34
.L50:
	xorl	%r15d, %r15d
	xorl	%r12d, %r12d
.L36:
	movq	144(%rsp), %rdi
	cmpl	%r12d, %ebp
	jle	.L51
	movslq	%r15d, %rax
	leaq	(%rdi,%r12,4), %r13
	leaq	(%r14,%rax,4), %rcx
	xorl	%eax, %eax
.L40:
	movss	0(%r13), %xmm0
	cmpl	%eax, %ebx
	jle	.L59
	cvtss2sd	(%rcx,%rax,4), %xmm1
	mulsd	%xmm1, %xmm1
	cvtss2sd	%xmm0, %xmm0
	incq	%rax
	addsd	%xmm0, %xmm1
	cvtsd2ss	%xmm1, %xmm1
	movss	%xmm1, 0(%r13)
	jmp	.L40
.L59:
	call	sqrtf@PLT
	incq	%r12
	addl	%ebx, %r15d
	movss	%xmm0, 0(%r13)
	jmp	.L36
.L51:
	xorl	%esi, %esi
	xorl	%edx, %edx
.L39:
	cmpl	%edx, %ebp
	jle	.L42
	movslq	%esi, %rax
	xorl	%ecx, %ecx
	leaq	(%r14,%rax,4), %rax
.L43:
	cmpl	%ebx, %ecx
	jge	.L60
	movss	(%rax), %xmm0
	incl	%ecx
	divss	(%rdi,%rdx,4), %xmm0
	addq	$4, %rax
	movss	%xmm0, -4(%rax)
	jmp	.L43
.L60:
	incq	%rdx
	addl	%ebx, %esi
	jmp	.L39
.L42:
	movq	24(%rsp), %rdx
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
.LEHB3:
	call	cudaMemcpy@PLT
	leaq	.LC8(%rip), %r12
	movl	%eax, %edi
	movq	%r12, %rsi
	call	_ZL5check9cudaErrorPKc
	leal	15(%rbp), %eax
	movl	$16, %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cltd
	movl	$1, %esi
	movl	$1, 92(%rsp)
	idivl	%ecx
	movl	$1, 80(%rsp)
	movabsq	$68719476752, %rdx
	movl	$1, %ecx
	movq	%rdx, 72(%rsp)
	movl	%eax, 84(%rsp)
	movl	%eax, 88(%rsp)
	movq	84(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	movq	64(%rsp), %rcx
	movq	56(%rsp), %rdx
	movl	%ebx, %esi
	movl	%ebp, %edi
	call	_Z38__device_stub__Z13correlate_gpuiiPKfPfiiPKfPf
.L44:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	leaq	.LC9(%rip), %rsi
	call	_ZL5check9cudaErrorPKc
	movq	32(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$2, %ecx
	movq	40(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movq	%r12, %rsi
	call	_ZL5check9cudaErrorPKc
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	leaq	.LC10(%rip), %rsi
	call	_ZL5check9cudaErrorPKc
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	leaq	.LC11(%rip), %rsi
	call	_ZL5check9cudaErrorPKc
.LEHE3:
	movq	(%rsp), %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	8(%rsp), %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	16(%rsp), %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L49
	jmp	.L55
.L54:
	endbr64
	movq	%rax, %rbx
.L45:
	movq	(%rsp), %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	jmp	.L46
.L53:
	endbr64
	movq	%rax, %rbx
.L46:
	movq	8(%rsp), %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	jmp	.L47
.L52:
	endbr64
	movq	%rax, %rbx
.L47:
	movq	16(%rsp), %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L55
	movq	%rbx, %rdi
.LEHB4:
	call	_Unwind_Resume@PLT
.LEHE4:
.L55:
	call	__stack_chk_fail@PLT
.L49:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4001:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4001:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4001-.LLSDACSB4001
.LLSDACSB4001:
	.uleb128 .LEHB0-.LFB4001
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4001
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L52-.LFB4001
	.uleb128 0
	.uleb128 .LEHB2-.LFB4001
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L53-.LFB4001
	.uleb128 0
	.uleb128 .LEHB3-.LFB4001
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L54-.LFB4001
	.uleb128 0
	.uleb128 .LEHB4-.LFB4001
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE4001:
	.text
	.size	_Z9correlateiiPKfPf, .-_Z9correlateiiPKfPf
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
This is the function you need to implement. Quick reference:
- input rows: 0 <= y < ny
- input columns: 0 <= x < nx
- element at row y and column x is stored in data[x + y*nx]
- correlation between rows i and row j has to be stored in result[i + j*ny]
- only parts with 0 <= j <= i < ny need to be filled
*/
#include <hip/hip_runtime.h>

#include <iostream>
#include <math.h>
#include <vector>



static inline void check(hipError_t err, const char* context) {
  if (err != hipSuccess) {
      std::cerr << "CUDA error: " << context << ": "
          << hipGetErrorString(err) << std::endl;
      std::exit(EXIT_FAILURE);
  }
}

#define CHECK(x) check(x, #x)

template <class T>
void cuda_memcpy(T* target, const T* source, std::size_t num, hipMemcpyKind direction) {
  CHECK(hipMemcpy(target, source, num * sizeof(T), direction));
}

__global__ void correlate_gpu(int ny, int nx, const float*data, float *result){
  int i=threadIdx.x+blockIdx.x*blockDim.x;
  int j=threadIdx.y+blockIdx.y*blockDim.y;
  if(i>=ny || j>=ny) return;
  if (i>j){
    result[i*ny+j]=0;
    return;
  }
  double temp=0;
  for (int k=0; k<nx; ++k){
    temp+=data[i*nx+k]*data[j*nx+k];
  }
  result[i*ny+j]=temp;
}


static inline int divup(int a, int b) {
  return (a + b - 1)/b;
}

void correlate(int ny, int nx, const float *data, float *result) {

  //allocate memory & copy data to GPU
  
  float *dGPU=NULL;
  CHECK(hipMalloc((void**)&dGPU,ny*nx*sizeof(float)));
  float *rGPU=NULL;
  CHECK(hipMalloc((void**)&rGPU,ny*ny*sizeof(float)));


  // float *avg=new float[ny]{0};
  // float *normalized=new float[ny*nx]{0};
  // float *sqrtSqureSum=new float[ny]{0};



  std::vector<float> avg(ny,0);
  std::vector<float> normalized(ny*nx,0);
  std::vector<float> sqrtSqureSum(ny,0);

  for (int y=0; y<ny; ++y){
    double temp=0;
    for (int x=0; x<nx; ++x){
      temp+=data[y*nx+x];
    }
    avg[y]=temp/nx;
  }
  for (int y=0; y<ny; ++y){
    for (int x=0; x<nx; ++x){
      normalized[y*nx+x]=data[y*nx+x]-avg[y];
    }
  }
  // delete[] avg;
  for (int y=0; y<ny; ++y){
    for (int x=0; x<nx; ++x){
      sqrtSqureSum[y]+=pow(normalized[y*nx+x],2);
    }
    sqrtSqureSum[y]=sqrt(sqrtSqureSum[y]);
  }
  for (int y=0; y<ny; ++y){
    for (int x=0; x<nx; ++x){
      normalized[y*nx+x]/=sqrtSqureSum[y];
    }
  }
  // delete[] sqrtSqureSum;


  cuda_memcpy(dGPU,normalized.data(),ny*nx,hipMemcpyHostToDevice);
  // CHECK(cudaMemcpy(dGPU,normalized.data(),ny*nx*sizeof(float),cudaMemcpyHostToDevice));
  dim3 dimBlock(16,16);
  dim3 dimGrid(divup(ny,dimBlock.x),divup(ny,dimBlock.y));
  correlate_gpu<<<dimGrid,dimBlock>>>(ny,nx,dGPU,rGPU);
  CHECK(hipGetLastError());
  cuda_memcpy(result, rGPU, ny * ny, hipMemcpyDeviceToHost);
  // CHECK(cudaMemcpy(result, rGPU, ny * ny * sizeof(float), cudaMemcpyDeviceToHost));
  CHECK(hipFree(dGPU));
  CHECK(hipFree(rGPU));
  // delete[] normalized;
}

	.text
	.file	"cp.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z28__device_stub__correlate_gpuiiPKfPf # -- Begin function _Z28__device_stub__correlate_gpuiiPKfPf
	.type	_Z28__device_stub__correlate_gpuiiPKfPf,@function
_Z28__device_stub__correlate_gpuiiPKfPf: # @_Z28__device_stub__correlate_gpuiiPKfPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13correlate_gpuiiPKfPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__correlate_gpuiiPKfPf, .Lfunc_end0-_Z28__device_stub__correlate_gpuiiPKfPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z9correlateiiPKfPf             # -- Begin function _Z9correlateiiPKfPf
	.type	_Z9correlateiiPKfPf,@function
_Z9correlateiiPKfPf:                    # @_Z9correlateiiPKfPf
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 104(%rsp)                 # 8-byte Spill
	movq	%rdx, %r13
	movl	%esi, %ebp
	movl	%edi, %r15d
	leaq	24(%rsp), %rdi
	movq	$0, (%rdi)
	movl	%esi, %eax
	imull	%r15d, %eax
	movslq	%eax, %r14
	leaq	(,%r14,4), %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_1
# %bb.3:                                # %_ZL5check10hipError_tPKc.exit
	movq	%r14, 40(%rsp)                  # 8-byte Spill
	leaq	16(%rsp), %rdi
	movq	$0, (%rdi)
	movl	%r15d, %eax
	imull	%eax, %eax
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	leaq	(,%rax,4), %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.5:                                # %_ZL5check10hipError_tPKc.exit97
	movslq	%r15d, %rbx
	xorl	%r14d, %r14d
	leaq	48(%rsp), %rdx
	movl	%r14d, (%rdx)
	leaq	112(%rsp), %rdi
	leaq	72(%rsp), %r12
	movq	%rbx, %rsi
	movq	%r12, %rcx
	callq	_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_
	movl	%r14d, (%r12)
.Ltmp0:
	leaq	48(%rsp), %rdi
	leaq	72(%rsp), %rdx
	leaq	36(%rsp), %rcx
	movq	40(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rsi
	callq	_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_
.Ltmp1:
# %bb.6:
	leaq	36(%rsp), %rdx
	movl	$0, (%rdx)
.Ltmp3:
	leaq	72(%rsp), %rdi
	leaq	15(%rsp), %rcx
	movq	%rbx, %rsi
	callq	_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_
.Ltmp4:
# %bb.7:
	testl	%r15d, %r15d
	jle	.LBB1_34
# %bb.8:                                # %.preheader155.lr.ph
	cvtsi2sd	%ebp, %xmm0
	movq	112(%rsp), %rax
	movl	%r15d, %ebx
	movl	%ebp, %r12d
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB1_9:                                # %.preheader155
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_26 Depth 2
	testl	%ebp, %ebp
	jle	.LBB1_10
# %bb.25:                               # %.lr.ph
                                        #   in Loop: Header=BB1_9 Depth=1
	movl	%ecx, %esi
	leaq	(,%rsi,4), %rsi
	addq	%r13, %rsi
	xorpd	%xmm1, %xmm1
	xorl	%edi, %edi
.LBB1_26:                               #   Parent Loop BB1_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm2, %xmm2
	cvtss2sd	(%rsi,%rdi,4), %xmm2
	addsd	%xmm2, %xmm1
	incq	%rdi
	cmpq	%rdi, %r12
	jne	.LBB1_26
	jmp	.LBB1_27
.LBB1_10:                               #   in Loop: Header=BB1_9 Depth=1
	xorpd	%xmm1, %xmm1
.LBB1_27:                               # %._crit_edge
                                        #   in Loop: Header=BB1_9 Depth=1
	divsd	%xmm0, %xmm1
	cvtsd2ss	%xmm1, %xmm1
	movss	%xmm1, (%rax,%rdx,4)
	incq	%rdx
	addl	%ebp, %ecx
	cmpq	%rbx, %rdx
	jne	.LBB1_9
# %bb.11:                               # %.preheader154
	testl	%r15d, %r15d
	jle	.LBB1_34
# %bb.12:                               # %.preheader153.lr.ph
	movq	112(%rsp), %rax
	movq	48(%rsp), %rcx
	xorl	%edx, %edx
	xorl	%esi, %esi
.LBB1_13:                               # %.preheader153
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_15 Depth 2
	testl	%ebp, %ebp
	jle	.LBB1_16
# %bb.14:                               # %.lr.ph160
                                        #   in Loop: Header=BB1_13 Depth=1
	movl	%edx, %r8d
	leaq	(%rcx,%r8,4), %rdi
	leaq	(,%r8,4), %r8
	addq	%r13, %r8
	xorl	%r9d, %r9d
.LBB1_15:                               #   Parent Loop BB1_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r8,%r9,4), %xmm0              # xmm0 = mem[0],zero,zero,zero
	subss	(%rax,%rsi,4), %xmm0
	movss	%xmm0, (%rdi,%r9,4)
	incq	%r9
	cmpq	%r9, %r12
	jne	.LBB1_15
.LBB1_16:                               # %._crit_edge161
                                        #   in Loop: Header=BB1_13 Depth=1
	incq	%rsi
	addl	%ebp, %edx
	cmpq	%rbx, %rsi
	jne	.LBB1_13
# %bb.17:                               # %.preheader152
	testl	%r15d, %r15d
	jle	.LBB1_34
# %bb.18:                               # %.preheader151.lr.ph
	xorl	%r13d, %r13d
	xorps	%xmm2, %xmm2
	xorl	%r14d, %r14d
.LBB1_19:                               # %.preheader151
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_51 Depth 2
	movq	72(%rsp), %rax
	testl	%ebp, %ebp
	jle	.LBB1_20
# %bb.50:                               # %.lr.ph164
                                        #   in Loop: Header=BB1_19 Depth=1
	movl	%r13d, %ecx
	shlq	$2, %rcx
	movss	(%rax,%r14,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addq	48(%rsp), %rcx
	xorl	%edx, %edx
.LBB1_51:                               #   Parent Loop BB1_19 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm1, %xmm1
	cvtss2sd	(%rcx,%rdx,4), %xmm1
	mulsd	%xmm1, %xmm1
	cvtss2sd	%xmm0, %xmm0
	addsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rax,%r14,4)
	incq	%rdx
	cmpq	%rdx, %r12
	jne	.LBB1_51
	jmp	.LBB1_21
.LBB1_20:                               # %.preheader151.._crit_edge165_crit_edge
                                        #   in Loop: Header=BB1_19 Depth=1
	movss	(%rax,%r14,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
.LBB1_21:                               # %._crit_edge165
                                        #   in Loop: Header=BB1_19 Depth=1
	ucomiss	%xmm2, %xmm0
	jb	.LBB1_48
# %bb.22:                               #   in Loop: Header=BB1_19 Depth=1
	sqrtss	%xmm0, %xmm0
	jmp	.LBB1_49
.LBB1_48:                               # %call.sqrt
                                        #   in Loop: Header=BB1_19 Depth=1
	callq	sqrtf
	xorps	%xmm2, %xmm2
.LBB1_49:                               # %._crit_edge165.split
                                        #   in Loop: Header=BB1_19 Depth=1
	movq	72(%rsp), %rax
	movss	%xmm0, (%rax,%r14,4)
	incq	%r14
	addl	%ebp, %r13d
	cmpq	%rbx, %r14
	jne	.LBB1_19
# %bb.28:                               # %.preheader150
	movq	48(%rsp), %rsi
	testl	%r15d, %r15d
	movq	40(%rsp), %r14                  # 8-byte Reload
	jle	.LBB1_35
# %bb.29:                               # %.preheader.lr.ph
	movq	72(%rsp), %rax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB1_30:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_32 Depth 2
	testl	%ebp, %ebp
	jle	.LBB1_33
# %bb.31:                               # %.lr.ph168
                                        #   in Loop: Header=BB1_30 Depth=1
	movl	%ecx, %edi
	leaq	(%rsi,%rdi,4), %rdi
	xorl	%r8d, %r8d
.LBB1_32:                               #   Parent Loop BB1_30 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rdi,%r8,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	divss	(%rax,%rdx,4), %xmm0
	movss	%xmm0, (%rdi,%r8,4)
	incq	%r8
	cmpq	%r8, %r12
	jne	.LBB1_32
.LBB1_33:                               # %._crit_edge169
                                        #   in Loop: Header=BB1_30 Depth=1
	incq	%rdx
	addl	%ebp, %ecx
	cmpq	%rbx, %rdx
	jne	.LBB1_30
.LBB1_34:                               # %._crit_edge171.loopexit
	movq	48(%rsp), %rsi
.LBB1_35:                               # %._crit_edge171
	movq	24(%rsp), %rdi
.Ltmp6:
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	_Z11cuda_memcpyIfEvPT_PKS0_m13hipMemcpyKind
.Ltmp7:
# %bb.36:
	leal	15(%r15), %eax
	leal	30(%r15), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$4, %ecx
	movq	%rcx, %rdi
	shlq	$32, %rdi
	orq	%rcx, %rdi
.Ltmp9:
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp10:
# %bb.37:
	testl	%eax, %eax
	jne	.LBB1_39
# %bb.38:
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
.Ltmp11:
	movl	%r15d, %edi
	movl	%ebp, %esi
	callq	_Z28__device_stub__correlate_gpuiiPKfPf
.Ltmp12:
.LBB1_39:
.Ltmp13:
	callq	hipGetLastError
.Ltmp14:
# %bb.40:
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB1_41
# %bb.52:                               # %_ZL5check10hipError_tPKc.exit104
	movq	16(%rsp), %rsi
.Ltmp27:
	movq	104(%rsp), %rdi                 # 8-byte Reload
	movq	96(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	_Z11cuda_memcpyIfEvPT_PKS0_m13hipMemcpyKind
.Ltmp28:
# %bb.53:
	movq	24(%rsp), %rdi
.Ltmp29:
	callq	hipFree
.Ltmp30:
# %bb.54:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB1_55
# %bb.61:                               # %_ZL5check10hipError_tPKc.exit112
	movq	16(%rsp), %rdi
.Ltmp43:
	callq	hipFree
.Ltmp44:
# %bb.62:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB1_63
# %bb.69:                               # %_ZL5check10hipError_tPKc.exit120
	movq	72(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_71
# %bb.70:
	callq	_ZdlPv
.LBB1_71:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit
	movq	48(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_73
# %bb.72:
	callq	_ZdlPv
.LBB1_73:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit122
	movq	112(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_75
# %bb.74:
	callq	_ZdlPv
.LBB1_75:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit124
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_1:
	.cfi_def_cfa_offset 192
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str, %esi
	jmp	.LBB1_2
.LBB1_4:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
.LBB1_2:
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.6, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
.LBB1_47:                               # %.noexc103
	movl	$1, %edi
	callq	exit
.LBB1_41:
.Ltmp15:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp16:
# %bb.42:                               # %.noexc
.Ltmp17:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp18:
# %bb.43:                               # %.noexc99
.Ltmp19:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.6, %esi
	movl	$2, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp20:
# %bb.44:                               # %.noexc100
.Ltmp21:
	movl	%ebp, %edi
	callq	hipGetErrorString
.Ltmp22:
# %bb.45:                               # %.noexc101
.Ltmp23:
	movl	$_ZSt4cerr, %edi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
.Ltmp24:
# %bb.46:                               # %.noexc102
.Ltmp25:
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
.Ltmp26:
	jmp	.LBB1_47
.LBB1_55:
.Ltmp31:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp32:
# %bb.56:                               # %.noexc106
.Ltmp33:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp34:
# %bb.57:                               # %.noexc107
.Ltmp35:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.6, %esi
	movl	$2, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp36:
# %bb.58:                               # %.noexc108
.Ltmp37:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp38:
# %bb.59:                               # %.noexc109
.Ltmp39:
	movl	$_ZSt4cerr, %edi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
.Ltmp40:
# %bb.60:                               # %.noexc110
.Ltmp41:
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
.Ltmp42:
	jmp	.LBB1_47
.LBB1_63:
.Ltmp45:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp46:
# %bb.64:                               # %.noexc114
.Ltmp47:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.4, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp48:
# %bb.65:                               # %.noexc115
.Ltmp49:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.6, %esi
	movl	$2, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp50:
# %bb.66:                               # %.noexc116
.Ltmp51:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp52:
# %bb.67:                               # %.noexc117
.Ltmp53:
	movl	$_ZSt4cerr, %edi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
.Ltmp54:
# %bb.68:                               # %.noexc118
.Ltmp55:
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
.Ltmp56:
	jmp	.LBB1_47
.LBB1_76:
.Ltmp8:
	jmp	.LBB1_77
.LBB1_24:
.Ltmp5:
	movq	%rax, %rbx
	jmp	.LBB1_79
.LBB1_23:
.Ltmp2:
	movq	%rax, %rbx
	jmp	.LBB1_81
.LBB1_84:
.Ltmp57:
.LBB1_77:
	movq	%rax, %rbx
	movq	72(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_79
# %bb.78:
	callq	_ZdlPv
.LBB1_79:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit126
	movq	48(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_81
# %bb.80:
	callq	_ZdlPv
.LBB1_81:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit128
	movq	112(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_83
# %bb.82:
	callq	_ZdlPv
.LBB1_83:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit130
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	_Z9correlateiiPKfPf, .Lfunc_end1-_Z9correlateiiPKfPf
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp44-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp44
	.uleb128 .Ltmp57-.Lfunc_begin0          #     jumps to .Ltmp57
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp44-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp15-.Ltmp44                #   Call between .Ltmp44 and .Ltmp15
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp15-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp56-.Ltmp15                #   Call between .Ltmp15 and .Ltmp56
	.uleb128 .Ltmp57-.Lfunc_begin0          #     jumps to .Ltmp57
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp56-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Lfunc_end1-.Ltmp56            #   Call between .Ltmp56 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorIfSaIfEEC2EmRKfRKS0_,"axG",@progbits,_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_,comdat
	.weak	_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_ # -- Begin function _ZNSt6vectorIfSaIfEEC2EmRKfRKS0_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_,@function
_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_:       # @_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB2_6
# %bb.1:                                # %_ZNSt6vectorIfSaIfEE17_S_check_init_lenEmRKS0_.exit
	movq	%rsi, %r14
	movq	%rdi, %rbx
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	testq	%rsi, %rsi
	je	.LBB2_2
# %bb.3:
	movq	%rdx, %r15
	xorl	%r12d, %r12d
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIfE8allocateEmPKv
	movq	%rax, (%rbx)
	leaq	(%rax,%r14,4), %rcx
	movq	%rcx, 16(%rbx)
	movss	(%r15), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	shlq	$2, %r14
.LBB2_4:                                # %.lr.ph.i.i.i.i.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movss	%xmm0, (%rax,%r12)
	addq	$4, %r12
	cmpq	%r12, %r14
	jne	.LBB2_4
	jmp	.LBB2_5
.LBB2_2:                                # %_ZNSt12_Vector_baseIfSaIfEEC2EmRKS0_.exit.thread
	movups	%xmm0, (%rbx)
	movq	$0, 16(%rbx)
	xorl	%ecx, %ecx
.LBB2_5:                                # %.loopexit
	movq	%rcx, 8(%rbx)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB2_6:
	.cfi_def_cfa_offset 48
	movl	$.L.str.7, %edi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end2:
	.size	_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_, .Lfunc_end2-_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_
	.cfi_endproc
                                        # -- End function
	.section	.text._Z11cuda_memcpyIfEvPT_PKS0_m13hipMemcpyKind,"axG",@progbits,_Z11cuda_memcpyIfEvPT_PKS0_m13hipMemcpyKind,comdat
	.weak	_Z11cuda_memcpyIfEvPT_PKS0_m13hipMemcpyKind # -- Begin function _Z11cuda_memcpyIfEvPT_PKS0_m13hipMemcpyKind
	.type	_Z11cuda_memcpyIfEvPT_PKS0_m13hipMemcpyKind,@function
_Z11cuda_memcpyIfEvPT_PKS0_m13hipMemcpyKind: # @_Z11cuda_memcpyIfEvPT_PKS0_m13hipMemcpyKind
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	shlq	$2, %rdx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:                                # %_ZL5check10hipError_tPKc.exit
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB3_2:
	.cfi_def_cfa_offset 32
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.8, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.6, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end3:
	.size	_Z11cuda_memcpyIfEvPT_PKS0_m13hipMemcpyKind, .Lfunc_end3-_Z11cuda_memcpyIfEvPT_PKS0_m13hipMemcpyKind
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIfE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIfE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIfE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIfE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIfE8allocateEmPKv,@function
_ZNSt15__new_allocatorIfE8allocateEmPKv: # @_ZNSt15__new_allocatorIfE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB4_1
# %bb.3:
	shlq	$2, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB4_1:
	.cfi_def_cfa_offset 16
	shrq	$62, %rsi
	je	.LBB4_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB4_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end4:
	.size	_ZNSt15__new_allocatorIfE8allocateEmPKv, .Lfunc_end4-_ZNSt15__new_allocatorIfE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13correlate_gpuiiPKfPf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13correlate_gpuiiPKfPf,@object # @_Z13correlate_gpuiiPKfPf
	.section	.rodata,"a",@progbits
	.globl	_Z13correlate_gpuiiPKfPf
	.p2align	3, 0x0
_Z13correlate_gpuiiPKfPf:
	.quad	_Z28__device_stub__correlate_gpuiiPKfPf
	.size	_Z13correlate_gpuiiPKfPf, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"hipMalloc((void**)&dGPU,ny*nx*sizeof(float))"
	.size	.L.str, 45

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"hipMalloc((void**)&rGPU,ny*ny*sizeof(float))"
	.size	.L.str.1, 45

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"hipGetLastError()"
	.size	.L.str.2, 18

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"hipFree(dGPU)"
	.size	.L.str.3, 14

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"hipFree(rGPU)"
	.size	.L.str.4, 14

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"CUDA error: "
	.size	.L.str.5, 13

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	": "
	.size	.L.str.6, 3

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"cannot create std::vector larger than max_size()"
	.size	.L.str.7, 49

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"hipMemcpy(target, source, num * sizeof(T), direction)"
	.size	.L.str.8, 54

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13correlate_gpuiiPKfPf"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__correlate_gpuiiPKfPf
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z13correlate_gpuiiPKfPf
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13correlate_gpuiiPKfPf ; -- Begin function _Z13correlate_gpuiiPKfPf
	.globl	_Z13correlate_gpuiiPKfPf
	.p2align	8
	.type	_Z13correlate_gpuiiPKfPf,@function
_Z13correlate_gpuiiPKfPf:               ; @_Z13correlate_gpuiiPKfPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e64 s4, v2
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x8
	v_cmp_le_i32_e32 vcc_lo, v0, v1
	s_cmp_gt_i32 s5, 0
	v_mov_b32_e32 v2, 0
	s_cselect_b32 s6, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s7, vcc_lo, s6
	s_and_saveexec_b32 s6, s7
	s_cbranch_execz .LBB0_5
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v2, v1, s5
	v_mul_lo_u32 v4, v0, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_lshlrev_b64 v[8:9], 2, v[4:5]
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v7, vcc_lo
	v_add_co_u32 v6, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v9, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v8, v[6:7], off
	global_load_b32 v9, v[4:5], off
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, v6, 4
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_add_i32 s5, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s5, 0
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v8, v8, v9
	v_cvt_f64_f32_e32 v[8:9], v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ; %._crit_edge.loopexit
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v2, v[2:3]
.LBB0_5:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v0, s4, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13correlate_gpuiiPKfPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13correlate_gpuiiPKfPf, .Lfunc_end0-_Z13correlate_gpuiiPKfPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 384
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13correlate_gpuiiPKfPf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13correlate_gpuiiPKfPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
