// Author: Sudnya Padalikar
// Date: 01/26/2014
// Brief: Tiled (into shared memory) matrix multiplication kernel in cuda

#include <stdio.h>
#include <cassert>
#include <iostream>

#define TILE_SIZE 16
// Kernel that executes on the CUDA device

__device__ void tileMultiplyShared(float * A, float * B, float * C,
			             int numARows, int numAColumns,
			             int numBRows, int numBColumns,
			             int numCRows, int numCColumns,
					     int tileAIdX, int tileAIdY,
						 int tileBIdX, int tileBIdY)
{
    //@@ Insert code to implement matrix multiplication here
    //@@ You have to use shared memory for this MP
	float Cvalue = 0.0f;

    __shared__ float ds_A [TILE_SIZE][TILE_SIZE];
    __shared__ float ds_B [TILE_SIZE][TILE_SIZE];
    
    int rowAIdx = tileAIdY + threadIdx.y;
    int colAIdx = tileAIdX + threadIdx.x;
    int rowBIdx = tileBIdY + threadIdx.y;
    int colBIdx = tileBIdX + threadIdx.x;
    
    if (colBIdx < numBColumns && rowBIdx < numBRows) {
        ds_B[threadIdx.y][threadIdx.x] = B[rowBIdx*numBColumns + colBIdx];
	}
	else {
        ds_B[threadIdx.y][threadIdx.x] = 0.0f;
	}

    if (colAIdx < numAColumns && rowAIdx < numARows) {
        ds_A[threadIdx.y][threadIdx.x] = A[rowAIdx*numAColumns + colAIdx];
	}
	else {
        ds_A[threadIdx.y][threadIdx.x] = 0.0f;
	}
	
	__syncthreads();

	if (colBIdx < numCColumns && rowAIdx < numCRows) {
		for (int i = 0; i < TILE_SIZE; ++i) {
			Cvalue += ds_A[threadIdx.y][i] * ds_B[i][threadIdx.x];
		}
		
		C[(threadIdx.y*TILE_SIZE) + threadIdx.x] += Cvalue;
	}
	
	__syncthreads();

}

__device__ void zeroSharedMemory(float* C)
{
	C[threadIdx.y * TILE_SIZE + threadIdx.x] = 0.0f;
		
	__syncthreads();
}

__device__ void copyOutSharedMemory(float* C, int numCRows, int numCColumns, float* sC, int startColumn, int startRow)
{
	if((startRow + threadIdx.y < numCRows) && (startColumn + threadIdx.x < numCColumns))
	{
		C[(startRow + threadIdx.y)*numCColumns + (startColumn + threadIdx.x)] = sC[threadIdx.y * TILE_SIZE + threadIdx.x];
	}
}

// Compute C = A * B
__global__ void matrixMultiplyShared(float * A, float * B, float * C,
			             int numARows, int numAColumns,
			             int numBRows, int numBColumns,
			             int numCRows, int numCColumns) {
	
	int tileX = blockIdx.x * TILE_SIZE;
	int tileY = blockIdx.y * TILE_SIZE;
	
	
	// how to call tileMultiplyShared?
	__shared__ float ds_C [TILE_SIZE][TILE_SIZE];
	
	zeroSharedMemory((float*)ds_C);
	
	for(int tileK = 0; tileK < numAColumns; tileK += TILE_SIZE)
	{
		tileMultiplyShared(A, B, (float*)ds_C, numARows, numAColumns, numBRows,
						   numBColumns, numCRows, numCColumns, tileK, tileY, tileX, tileK);
	}
	
	copyOutSharedMemory(C, numCRows, numCColumns, (float*)ds_C, tileX, tileY);
}


void printMatrix(float* M, int rows, int columns) {
    for (int i  = 0; i < rows; ++i) {
        std::cout << "[ ";
        for (int j = 0; j < columns; ++j) {
            std::cout << " " << M[(i*columns) + j];
        }
        std::cout << " ]\n";
    }

    std::cout << "\n";
}

int main()
{
    float *a_h;
    float *a_d;  // Pointer to host & device arrays
    float *b_h;
    float *b_d;
    float *c_h;
    float *c_d;

    int numARows = 3; // number of rows in the matrix A
    int numAColumns = 4; // number of columns in the matrix A
    int numBRows = 4; // number of rows in the matrix B
    int numBColumns = 2; // number of columns in the matrix B
    int numCRows = 3; // number of rows in the matrix C (you have to set this)
    int numCColumns = 2; // number of columns in the matrix C (you have to set this)
    
    size_t a_bytes = numARows * numAColumns * sizeof(float);
    size_t b_bytes = numBRows * numBColumns * sizeof(float);
    size_t c_bytes = numCRows * numCColumns * sizeof(float);
    assert(numAColumns == numBRows);
    assert(numARows == numCRows);
    assert(numBColumns == numCColumns);
 
    a_h = (float *)malloc(a_bytes);        // Allocate array on host
    cudaMalloc((void **) &a_d, a_bytes);   // Allocate array on device
    
    b_h = (float *)malloc(b_bytes);        // Allocate array on host
    cudaMalloc((void **) &b_d, b_bytes);   // Allocate array on device

    // initialize A, B
    for (int i = 0; i < numARows; ++i) {
        for (int j = 0; j < numAColumns; ++j) {
            a_h[(i*numAColumns) + j] = (i*numAColumns) + j;
        }
    }

    printMatrix(a_h, numARows, numAColumns);

    for (int i = 0; i < numBRows; ++i) {
        for (int j = 0; j < numBColumns; ++j) {
            b_h[(i*numBColumns) +j] = (i*numBColumns) + j;
        }
    }
    printMatrix(b_h, numBRows, numBColumns);

    c_h = (float *)malloc(c_bytes);        // Allocate array on host
    cudaMalloc((void **) &c_d, c_bytes);   // Allocate array on device
    
    cudaMemcpy(a_d, a_h, a_bytes, cudaMemcpyHostToDevice);
    cudaMemcpy(b_d, b_h, b_bytes, cudaMemcpyHostToDevice);

    // Do calculation on device:
    dim3 block_size = dim3(16, 16, 1);
    dim3 num_blocks = dim3((numCColumns + 16 - 1)/16, (numCRows + 16 - 1)/ 16);

    matrixMultiplyShared <<< num_blocks, block_size >>> (a_d, b_d, c_d, numARows, numAColumns, numBRows, numBColumns, numCRows, numCColumns);
    
    // Retrieve result from device and store it in host array
    cudaMemcpy(c_h, c_d, c_bytes, cudaMemcpyDeviceToHost);
    printMatrix(c_h, numCRows, numCColumns);
 
    // Cleanup
    free(a_h); 
    cudaFree(a_d);
    free(b_h); 
    cudaFree(b_d);
    free(c_h); 
    cudaFree(c_d);
}




	.file	"tmpxft_0035f4bf_00000000-6_tiled-matrix-mul.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3642:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3642:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z18tileMultiplySharedPfS_S_iiiiiiiiii
	.type	_Z18tileMultiplySharedPfS_S_iiiiiiiiii, @function
_Z18tileMultiplySharedPfS_S_iiiiiiiiii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z18tileMultiplySharedPfS_S_iiiiiiiiii, .-_Z18tileMultiplySharedPfS_S_iiiiiiiiii
	.globl	_Z16zeroSharedMemoryPf
	.type	_Z16zeroSharedMemoryPf, @function
_Z16zeroSharedMemoryPf:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3636:
	.size	_Z16zeroSharedMemoryPf, .-_Z16zeroSharedMemoryPf
	.globl	_Z19copyOutSharedMemoryPfiiS_ii
	.type	_Z19copyOutSharedMemoryPfiiS_ii, @function
_Z19copyOutSharedMemoryPfiiS_ii:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3637:
	.size	_Z19copyOutSharedMemoryPfiiS_ii, .-_Z19copyOutSharedMemoryPfiiS_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"[ "
.LC1:
	.string	" "
.LC2:
	.string	" ]\n"
.LC3:
	.string	"\n"
	.text
	.globl	_Z11printMatrixPfii
	.type	_Z11printMatrixPfii, @function
_Z11printMatrixPfii:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	%esi, 12(%rsp)
.L9:
	movl	12(%rsp), %eax
	cmpl	%eax, %r12d
	jge	.L15
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	xorl	%ebp, %ebp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movslq	%r13d, %rax
	leaq	(%r14,%rax,4), %r15
.L10:
	cmpl	%ebp, %ebx
	jle	.L16
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	(%r15,%rbp,4), %xmm0
	incq	%rbp
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	jmp	.L10
.L16:
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	incl	%r12d
	addl	%ebx, %r13d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L9
.L15:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	.cfi_endproc
.LFE3638:
	.size	_Z11printMatrixPfii, .-_Z11printMatrixPfii
	.globl	_Z50__device_stub__Z20matrixMultiplySharedPfS_S_iiiiiiPfS_S_iiiiii
	.type	_Z50__device_stub__Z20matrixMultiplySharedPfS_S_iiiiiiPfS_S_iiiiii, @function
_Z50__device_stub__Z20matrixMultiplySharedPfS_S_iiiiiiPfS_S_iiiiii:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z20matrixMultiplySharedPfS_S_iiiiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L17:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z50__device_stub__Z20matrixMultiplySharedPfS_S_iiiiiiPfS_S_iiiiii, .-_Z50__device_stub__Z20matrixMultiplySharedPfS_S_iiiiiiPfS_S_iiiiii
	.globl	_Z20matrixMultiplySharedPfS_S_iiiiii
	.type	_Z20matrixMultiplySharedPfS_S_iiiiii, @function
_Z20matrixMultiplySharedPfS_S_iiiiii:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z20matrixMultiplySharedPfS_S_iiiiiiPfS_S_iiiiii
	.cfi_endproc
.LFE3665:
	.size	_Z20matrixMultiplySharedPfS_S_iiiiii, .-_Z20matrixMultiplySharedPfS_S_iiiiii
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$48, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$48, %esi
	leaq	8(%rsp), %rdi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	movl	$32, %edi
	call	malloc@PLT
	leaq	16(%rsp), %rdi
	movl	$32, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	movq	%rbp, %rcx
	xorl	%edx, %edx
.L23:
	xorl	%eax, %eax
.L24:
	leal	(%rdx,%rax), %esi
	cvtsi2ssl	%esi, %xmm0
	movss	%xmm0, (%rcx,%rax,4)
	incq	%rax
	cmpq	$4, %rax
	jne	.L24
	addl	$4, %edx
	addq	$16, %rcx
	cmpl	$12, %edx
	jne	.L23
	movl	$4, %edx
	movl	$3, %esi
	movq	%rbp, %rdi
	call	_Z11printMatrixPfii
	movl	$127, %eax
	movl	$2, %edx
	movq	%rbx, %rdi
	salq	$55, %rax
	movl	$4, %esi
	movq	%rax, (%rbx)
	movabsq	$4629700418010611712, %rax
	movq	%rax, 8(%rbx)
	movabsq	$4656722015783223296, %rax
	movq	%rax, 16(%rbx)
	movabsq	$4674736414296899584, %rax
	movq	%rax, 24(%rbx)
	call	_Z11printMatrixPfii
	movl	$24, %edi
	call	malloc@PLT
	leaq	24(%rsp), %rdi
	movl	$24, %esi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$48, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$32, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	%rax
	.cfi_def_cfa_offset 104
	movl	$4, %r9d
	movl	$4, %r8d
	movl	$3, %ecx
	pushq	$2
	.cfi_def_cfa_offset 112
	pushq	$3
	.cfi_def_cfa_offset 120
	pushq	$2
	.cfi_def_cfa_offset 128
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z50__device_stub__Z20matrixMultiplySharedPfS_S_iiiiiiPfS_S_iiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 96
.L26:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$24, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movl	$2, %edx
	movl	$3, %esi
	movq	%r12, %rdi
	call	_Z11printMatrixPfii
	movq	%rbp, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z20matrixMultiplySharedPfS_S_iiiiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3667:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z20matrixMultiplySharedPfS_S_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3667:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Author: Sudnya Padalikar
// Date: 01/26/2014
// Brief: Tiled (into shared memory) matrix multiplication kernel in cuda


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <cassert>
#include <iostream>

#define TILE_SIZE 16
// Kernel that executes on the CUDA device

__device__ void tileMultiplyShared(float * A, float * B, float * C,
			             int numARows, int numAColumns,
			             int numBRows, int numBColumns,
			             int numCRows, int numCColumns,
					     int tileAIdX, int tileAIdY,
						 int tileBIdX, int tileBIdY)
{
    //@@ Insert code to implement matrix multiplication here
    //@@ You have to use shared memory for this MP
	float Cvalue = 0.0f;

    __shared__ float ds_A [TILE_SIZE][TILE_SIZE];
    __shared__ float ds_B [TILE_SIZE][TILE_SIZE];
    
    int rowAIdx = tileAIdY + threadIdx.y;
    int colAIdx = tileAIdX + threadIdx.x;
    int rowBIdx = tileBIdY + threadIdx.y;
    int colBIdx = tileBIdX + threadIdx.x;
    
    if (colBIdx < numBColumns && rowBIdx < numBRows) {
        ds_B[threadIdx.y][threadIdx.x] = B[rowBIdx*numBColumns + colBIdx];
	}
	else {
        ds_B[threadIdx.y][threadIdx.x] = 0.0f;
	}

    if (colAIdx < numAColumns && rowAIdx < numARows) {
        ds_A[threadIdx.y][threadIdx.x] = A[rowAIdx*numAColumns + colAIdx];
	}
	else {
        ds_A[threadIdx.y][threadIdx.x] = 0.0f;
	}
	
	__syncthreads();

	if (colBIdx < numCColumns && rowAIdx < numCRows) {
		for (int i = 0; i < TILE_SIZE; ++i) {
			Cvalue += ds_A[threadIdx.y][i] * ds_B[i][threadIdx.x];
		}
		
		C[(threadIdx.y*TILE_SIZE) + threadIdx.x] += Cvalue;
	}
	
	__syncthreads();

}

__device__ void zeroSharedMemory(float* C)
{
	C[threadIdx.y * TILE_SIZE + threadIdx.x] = 0.0f;
		
	__syncthreads();
}

__device__ void copyOutSharedMemory(float* C, int numCRows, int numCColumns, float* sC, int startColumn, int startRow)
{
	if((startRow + threadIdx.y < numCRows) && (startColumn + threadIdx.x < numCColumns))
	{
		C[(startRow + threadIdx.y)*numCColumns + (startColumn + threadIdx.x)] = sC[threadIdx.y * TILE_SIZE + threadIdx.x];
	}
}

// Compute C = A * B
__global__ void matrixMultiplyShared(float * A, float * B, float * C,
			             int numARows, int numAColumns,
			             int numBRows, int numBColumns,
			             int numCRows, int numCColumns) {
	
	int tileX = blockIdx.x * TILE_SIZE;
	int tileY = blockIdx.y * TILE_SIZE;
	
	
	// how to call tileMultiplyShared?
	__shared__ float ds_C [TILE_SIZE][TILE_SIZE];
	
	zeroSharedMemory((float*)ds_C);
	
	for(int tileK = 0; tileK < numAColumns; tileK += TILE_SIZE)
	{
		tileMultiplyShared(A, B, (float*)ds_C, numARows, numAColumns, numBRows,
						   numBColumns, numCRows, numCColumns, tileK, tileY, tileX, tileK);
	}
	
	copyOutSharedMemory(C, numCRows, numCColumns, (float*)ds_C, tileX, tileY);
}


void printMatrix(float* M, int rows, int columns) {
    for (int i  = 0; i < rows; ++i) {
        std::cout << "[ ";
        for (int j = 0; j < columns; ++j) {
            std::cout << " " << M[(i*columns) + j];
        }
        std::cout << " ]\n";
    }

    std::cout << "\n";
}

int main()
{
    float *a_h;
    float *a_d;  // Pointer to host & device arrays
    float *b_h;
    float *b_d;
    float *c_h;
    float *c_d;

    int numARows = 3; // number of rows in the matrix A
    int numAColumns = 4; // number of columns in the matrix A
    int numBRows = 4; // number of rows in the matrix B
    int numBColumns = 2; // number of columns in the matrix B
    int numCRows = 3; // number of rows in the matrix C (you have to set this)
    int numCColumns = 2; // number of columns in the matrix C (you have to set this)
    
    size_t a_bytes = numARows * numAColumns * sizeof(float);
    size_t b_bytes = numBRows * numBColumns * sizeof(float);
    size_t c_bytes = numCRows * numCColumns * sizeof(float);
    assert(numAColumns == numBRows);
    assert(numARows == numCRows);
    assert(numBColumns == numCColumns);
 
    a_h = (float *)malloc(a_bytes);        // Allocate array on host
    hipMalloc((void **) &a_d, a_bytes);   // Allocate array on device
    
    b_h = (float *)malloc(b_bytes);        // Allocate array on host
    hipMalloc((void **) &b_d, b_bytes);   // Allocate array on device

    // initialize A, B
    for (int i = 0; i < numARows; ++i) {
        for (int j = 0; j < numAColumns; ++j) {
            a_h[(i*numAColumns) + j] = (i*numAColumns) + j;
        }
    }

    printMatrix(a_h, numARows, numAColumns);

    for (int i = 0; i < numBRows; ++i) {
        for (int j = 0; j < numBColumns; ++j) {
            b_h[(i*numBColumns) +j] = (i*numBColumns) + j;
        }
    }
    printMatrix(b_h, numBRows, numBColumns);

    c_h = (float *)malloc(c_bytes);        // Allocate array on host
    hipMalloc((void **) &c_d, c_bytes);   // Allocate array on device
    
    hipMemcpy(a_d, a_h, a_bytes, hipMemcpyHostToDevice);
    hipMemcpy(b_d, b_h, b_bytes, hipMemcpyHostToDevice);

    // Do calculation on device:
    dim3 block_size = dim3(16, 16, 1);
    dim3 num_blocks = dim3((numCColumns + 16 - 1)/16, (numCRows + 16 - 1)/ 16);

    matrixMultiplyShared <<< num_blocks, block_size >>> (a_d, b_d, c_d, numARows, numAColumns, numBRows, numBColumns, numCRows, numCColumns);
    
    // Retrieve result from device and store it in host array
    hipMemcpy(c_h, c_d, c_bytes, hipMemcpyDeviceToHost);
    printMatrix(c_h, numCRows, numCColumns);
 
    // Cleanup
    free(a_h); 
    hipFree(a_d);
    free(b_h); 
    hipFree(b_d);
    free(c_h); 
    hipFree(c_d);
}




	.text
	.file	"tiled-matrix-mul.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z35__device_stub__matrixMultiplySharedPfS_S_iiiiii # -- Begin function _Z35__device_stub__matrixMultiplySharedPfS_S_iiiiii
	.type	_Z35__device_stub__matrixMultiplySharedPfS_S_iiiiii,@function
_Z35__device_stub__matrixMultiplySharedPfS_S_iiiiii: # @_Z35__device_stub__matrixMultiplySharedPfS_S_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20matrixMultiplySharedPfS_S_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z35__device_stub__matrixMultiplySharedPfS_S_iiiiii, .Lfunc_end0-_Z35__device_stub__matrixMultiplySharedPfS_S_iiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11printMatrixPfii             # -- Begin function _Z11printMatrixPfii
	.type	_Z11printMatrixPfii,@function
_Z11printMatrixPfii:                    # @_Z11printMatrixPfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB1_6
# %bb.1:                                # %.lr.ph14
	movl	%edx, %ebx
	movl	%esi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%edx, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB1_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$2, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	testl	%ebx, %ebx
	jle	.LBB1_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%r15d, %r15d
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB1_4
.LBB1_5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$3, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%rbp
	addl	%ebx, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB1_2
.LBB1_6:                                # %._crit_edge15
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$1, %edx
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l # TAILCALL
.Lfunc_end1:
	.size	_Z11printMatrixPfii, .Lfunc_end1-_Z11printMatrixPfii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$48, %edi
	callq	malloc
	movq	%rax, %rbx
	leaq	16(%rsp), %rdi
	movl	$48, %esi
	callq	hipMalloc
	movl	$32, %edi
	callq	malloc
	movq	%rax, %r14
	leaq	8(%rsp), %rdi
	movl	$32, %esi
	callq	hipMalloc
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.LBB2_1:                                # %.preheader75
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	movl	$4, %edx
	movq	%rax, %rsi
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtsi2ss	%esi, %xmm0
	movss	%xmm0, (%rbx,%rsi,4)
	incq	%rsi
	decq	%rdx
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%rcx
	addq	$4, %rax
	cmpq	$3, %rcx
	jne	.LBB2_1
# %bb.4:
	movq	%rbx, %rdi
	movl	$3, %esi
	movl	$4, %edx
	callq	_Z11printMatrixPfii
	xorl	%eax, %eax
.LBB2_5:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	leal	1(%rax), %ecx
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ecx, %xmm1
	movss	%xmm0, (%r14,%rax,4)
	movss	%xmm1, 4(%r14,%rax,4)
	addq	$2, %rax
	cmpq	$8, %rax
	jne	.LBB2_5
# %bb.6:
	movl	$2, %r12d
	movq	%r14, %rdi
	movl	$4, %esi
	movl	$2, %edx
	callq	_Z11printMatrixPfii
	movl	$24, %edi
	callq	malloc
	movq	%rax, %r15
	movq	%rsp, %rdi
	movl	$24, %esi
	callq	hipMalloc
	movq	16(%rsp), %rdi
	movl	$48, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$32, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.7:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$3, %ecx
	movl	$4, %r8d
	movl	$4, %r9d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	$3
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	callq	_Z35__device_stub__matrixMultiplySharedPfS_S_iiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB2_8:
	movq	(%rsp), %rsi
	movl	$24, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r15, %rdi
	movl	$3, %esi
	movl	$2, %edx
	callq	_Z11printMatrixPfii
	movq	%rbx, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	free
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%r15, %rdi
	callq	free
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20matrixMultiplySharedPfS_S_iiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z20matrixMultiplySharedPfS_S_iiiiii,@object # @_Z20matrixMultiplySharedPfS_S_iiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z20matrixMultiplySharedPfS_S_iiiiii
	.p2align	3, 0x0
_Z20matrixMultiplySharedPfS_S_iiiiii:
	.quad	_Z35__device_stub__matrixMultiplySharedPfS_S_iiiiii
	.size	_Z20matrixMultiplySharedPfS_S_iiiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"[ "
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" "
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" ]\n"
	.size	.L.str.2, 4

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\n"
	.size	.L.str.3, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z20matrixMultiplySharedPfS_S_iiiiii"
	.size	.L__unnamed_1, 37

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__matrixMultiplySharedPfS_S_iiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z20matrixMultiplySharedPfS_S_iiiiii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z20matrixMultiplySharedPfS_S_iiiiii ; -- Begin function _Z20matrixMultiplySharedPfS_S_iiiiii
	.globl	_Z20matrixMultiplySharedPfS_S_iiiiii
	.p2align	8
	.type	_Z20matrixMultiplySharedPfS_S_iiiiii,@function
_Z20matrixMultiplySharedPfS_S_iiiiii:   ; @_Z20matrixMultiplySharedPfS_S_iiiiii
; %bb.0:
	s_clause 0x3
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x10
	s_load_b64 s[16:17], s[0:1], 0x28
	v_dual_mov_b32 v5, 0 :: v_dual_and_b32 v2, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_lshl_b32 s0, s14, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v9, 2, v2
	v_lshl_add_u32 v3, s15, 4, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v0, v4, 6, v9
	v_add_nc_u32_e32 v1, 0x800, v0
	ds_store_b32 v0, v5 offset:2048
	v_add_nc_u32_e32 v0, s0, v2
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s5, 1
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_11
; %bb.1:                                ; %.lr.ph
	v_lshlrev_b32_e32 v5, 6, v4
	v_add_nc_u32_e32 v6, 0x400, v9
	v_mul_lo_u32 v7, v3, s5
	v_cmp_gt_i32_e64 s1, s17, v0
	v_cmp_gt_i32_e64 s2, s16, v3
	v_cmp_gt_i32_e32 vcc_lo, s7, v0
	v_add_nc_u32_e32 v8, v6, v5
	v_cmp_gt_i32_e64 s0, s4, v3
	v_add_nc_u32_e32 v9, v5, v9
	s_and_b32 s2, s2, s1
	s_mov_b32 s3, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_8 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v11, 0 :: v_dual_add_nc_u32 v12, s3, v4
	v_mov_b32_e32 v10, 0
	v_cmp_gt_i32_e64 s1, s6, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_saveexec_b32 s4, s1
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mad_u64_u32 v[13:14], null, v12, s7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v14, 31, v13
	v_lshlrev_b64 v[11:12], 2, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v11, s1, s10, v11
	v_add_co_ci_u32_e64 v12, s1, s11, v12, s1
	global_load_b32 v11, v[11:12], off
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v12, s3, v2
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v11
	v_cmp_gt_i32_e64 s1, s5, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_and_saveexec_b32 s4, s1
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v10, v12, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s1, s8, v10
	v_add_co_ci_u32_e64 v11, s1, s9, v11, s1
	global_load_b32 v10, v[10:11], off
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v10
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s2
	s_cbranch_execz .LBB0_10
; %bb.7:                                ; %.preheader.i.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, v6
	s_mov_b32 s4, 0
.LBB0_8:                                ; %.preheader.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v12, s4, v5
	s_add_i32 s4, s4, 4
	ds_load_b32 v13, v11
	ds_load_b32 v12, v12
	v_add_nc_u32_e32 v11, 64, v11
	s_cmp_eq_u32 s4, 64
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v10, v12, v13
	s_cbranch_scc0 .LBB0_8
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
	ds_load_b32 v11, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v10, v10, v11
	ds_store_b32 v1, v10
.LBB0_10:                               ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s3, s3, 16
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s3, s5
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_11:                               ; %._crit_edge
	v_cmp_gt_u32_e32 vcc_lo, s16, v3
	v_cmp_gt_u32_e64 s0, s17, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_13
; %bb.12:
	v_mad_u64_u32 v[4:5], null, v3, s17, v[0:1]
	ds_load_b32 v2, v1
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	v_add_co_u32 v0, vcc_lo, s12, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB0_13:                               ; %_Z19copyOutSharedMemoryPfiiS_ii.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20matrixMultiplySharedPfS_S_iiiiii
		.amdhsa_group_segment_fixed_size 3072
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z20matrixMultiplySharedPfS_S_iiiiii, .Lfunc_end0-_Z20matrixMultiplySharedPfS_S_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 636
; NumSgprs: 20
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 3072 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 3072
    .kernarg_segment_align: 8
    .kernarg_segment_size: 48
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20matrixMultiplySharedPfS_S_iiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z20matrixMultiplySharedPfS_S_iiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
