#include <stdio.h>
#include "cuda.h"
#define max(x,y)  ((x) > (y)? (x) : (y))
#define min(x,y)  ((x) < (y)? (x) : (y))
#define ceil(a,b) ((a) % (b) == 0 ? (a) / (b) : ((a) / (b)) + 1)

void check_error (const char* message) {
	cudaError_t error = cudaGetLastError ();
	if (error != cudaSuccess) {
		printf ("CUDA error : %s, %s\n", message, cudaGetErrorString (error));
		exit(-1);
	}
}

__global__ void curvi (double * __restrict__ in_r1, double *__restrict__ in_u1, double * __restrict__ in_u2, double *__restrict__ in_u3, double * __restrict__ in_mu, double * __restrict__ in_la, double * __restrict__ in_met1, double * __restrict__ in_met2, double * __restrict__ in_met3, double * __restrict__ in_met4, double * strx, double * stry, double c1, double c2, int N) {
	//Determing the block's indices
	int blockdim_k= (int)(blockDim.x);
	int k0 = (int)(blockIdx.x)*(blockdim_k);
	int k = max (k0, 0) + (int)(threadIdx.x);
	int blockdim_i= (int)(blockDim.z);
	int i0 = (int)(blockIdx.z)*(blockdim_i);
	int i = max (i0, 0) + (int)(threadIdx.z);

	double (*u1)[304][304] = (double (*)[304][304])in_u1;
	double (*u2)[304][304] = (double (*)[304][304])in_u2;
	double (*u3)[304][304] = (double (*)[304][304])in_u3;
	double (*mu)[304][304] = (double (*)[304][304])in_mu;
	double (*la)[304][304] = (double (*)[304][304])in_la;
	double (*r1)[304][304] = (double (*)[304][304])in_r1;
	double (*met1)[304][304] = (double (*)[304][304])in_met1;
	double (*met2)[304][304] = (double (*)[304][304])in_met2;
	double (*met3)[304][304] = (double (*)[304][304])in_met3;
	double (*met4)[304][304] = (double (*)[304][304])in_met4;

	if (i>=2 & k>=2 & i<=N-3 & k<=N-3) {
		for (int j=2; j<=N-3; j++) {
double _t_86_ = 2.0 * mu[i+2][j][k];
_t_86_ += la[i+2][j][k];
double _t_83_ = met1[i+2][j][k] * _t_86_ * met2[i+2][j][k];
double _t_281_ = met1[i+2][j][k] * la[i+2][j][k] * met1[i+2][j][k];
double _v_38_ = c2 * u1[i+2][j][k+2];
double _v_0_ = c2 * u1[i+2][j][k+2];
_v_38_ -= c2 * u1[i+2][j][k-2];
double _v_9_ = c2 * u1[i+2][j][k-2];
double _t_84_ = _v_38_;
double _v_39_ = c1 * u1[i+2][j][k+1];
_v_39_ -= c1 * u1[i+2][j][k-1];
_t_84_ += _v_39_;
double _v_40_ = strx[i] * _t_83_ * _t_84_;
double _v_19_ = c2 * u1[i+2][j][k+1];
double _v_28_ = c2 * u1[i+2][j][k-1];
double _v_56_ = c2 * _v_40_;
double _v_41_ = c2 * u2[i+2][j][k+2];
double _v_3_ = c2 * u2[i+2][j][k+2];
_v_41_ -= c2 * u2[i+2][j][k-2];
double _v_12_ = c2 * u2[i+2][j][k-2];
double _t_91_ = _v_41_;
double _v_42_ = c1 * u2[i+2][j][k+1];
_v_42_ -= c1 * u2[i+2][j][k-1];
_t_91_ += _v_42_;
double _t_90_ = met1[i+2][j][k] * la[i+2][j][k] * met3[i+2][j][k];
double _v_43_ = stry[j] * _t_90_ * _t_91_;
double _v_22_ = c2 * u2[i+2][j][k+1];
double _v_31_ = c2 * u2[i+2][j][k-1];
_v_56_ += c2 * _v_43_;
double _v_44_ = c2 * u3[i+2][j][k+2];
double _v_6_ = c2 * u3[i+2][j][k+2];
_v_44_ -= c2 * u3[i+2][j][k-2];
double _v_15_ = c2 * u3[i+2][j][k-2];
double _t_96_ = _v_44_;
double _v_45_ = c1 * u3[i+2][j][k+1];
_v_45_ -= c1 * u3[i+2][j][k-1];
_t_96_ += _v_45_;
double _t_95_ = met1[i+2][j][k] * la[i+2][j][k] * met4[i+2][j][k];
double _v_46_ = _t_95_ * _t_96_;
double _v_25_ = c2 * u3[i+2][j][k+1];
double _v_34_ = c2 * u3[i+2][j][k-1];
_v_56_ += c2 * _v_46_;
double _t_104_ = 2.0 * mu[i-2][j][k];
_t_104_ += la[i-2][j][k];
double _t_101_ = met1[i-2][j][k] * _t_104_ * met2[i-2][j][k];
double _t_286_ = met1[i-2][j][k] * la[i-2][j][k] * met1[i-2][j][k];
double _v_47_ = c2 * u1[i-2][j][k+2];
_v_0_ -= c2 * u1[i-2][j][k+2];
_v_47_ -= c2 * u1[i-2][j][k-2];
_v_9_ -= c2 * u1[i-2][j][k-2];
double _t_102_ = _v_47_;
double _v_48_ = c1 * u1[i-2][j][k+1];
_v_48_ -= c1 * u1[i-2][j][k-1];
_t_102_ += _v_48_;
double _v_49_ = strx[i] * _t_101_ * _t_102_;
_v_19_ -= c2 * u1[i-2][j][k+1];
_v_28_ -= c2 * u1[i-2][j][k-1];
_v_56_ += c2 * _v_49_;
double _v_50_ = c2 * u2[i-2][j][k+2];
_v_3_ -= c2 * u2[i-2][j][k+2];
_v_50_ -= c2 * u2[i-2][j][k-2];
_v_12_ -= c2 * u2[i-2][j][k-2];
double _t_109_ = _v_50_;
double _v_51_ = c1 * u2[i-2][j][k+1];
_v_51_ -= c1 * u2[i-2][j][k-1];
_t_109_ += _v_51_;
double _t_108_ = met1[i-2][j][k] * la[i-2][j][k] * met3[i-2][j][k];
double _v_52_ = stry[j] * _t_108_ * _t_109_;
_v_22_ -= c2 * u2[i-2][j][k+1];
_v_31_ -= c2 * u2[i-2][j][k-1];
_v_56_ += c2 * _v_52_;
double _v_53_ = c2 * u3[i-2][j][k+2];
_v_6_ -= c2 * u3[i-2][j][k+2];
_v_53_ -= c2 * u3[i-2][j][k-2];
_v_15_ -= c2 * u3[i-2][j][k-2];
double _t_114_ = _v_53_;
double _v_54_ = c1 * u3[i-2][j][k+1];
_v_54_ -= c1 * u3[i-2][j][k-1];
_t_114_ += _v_54_;
double _t_113_ = met1[i-2][j][k] * la[i-2][j][k] * met4[i-2][j][k];
double _v_55_ = _t_113_ * _t_114_;
_v_25_ -= c2 * u3[i-2][j][k+1];
_v_34_ -= c2 * u3[i-2][j][k-1];
_v_56_ += c2 * _v_55_;
double _t_79_ = stry[j] * _v_56_;
double _t_123_ = 2.0 * mu[i+1][j][k];
_t_123_ += la[i+1][j][k];
double _t_120_ = met1[i+1][j][k] * _t_123_ * met2[i+1][j][k];
double _t_292_ = met1[i+1][j][k] * la[i+1][j][k] * met1[i+1][j][k];
double _v_57_ = c2 * u1[i+1][j][k+2];
_v_57_ -= c2 * u1[i+1][j][k-2];
double _t_121_ = _v_57_;
double _v_58_ = c1 * u1[i+1][j][k+1];
double _v_20_ = c1 * u1[i+1][j][k+1];
_v_58_ -= c1 * u1[i+1][j][k-1];
double _v_29_ = c1 * u1[i+1][j][k-1];
_t_121_ += _v_58_;
double _v_59_ = strx[i] * _t_120_ * _t_121_;
double _v_1_ = c1 * u1[i+1][j][k+2];
double _v_10_ = c1 * u1[i+1][j][k-2];
double _v_75_ = c1 * _v_59_;
double _v_60_ = c2 * u2[i+1][j][k+2];
_v_60_ -= c2 * u2[i+1][j][k-2];
double _t_128_ = _v_60_;
double _v_61_ = c1 * u2[i+1][j][k+1];
double _v_23_ = c1 * u2[i+1][j][k+1];
_v_61_ -= c1 * u2[i+1][j][k-1];
double _v_32_ = c1 * u2[i+1][j][k-1];
_t_128_ += _v_61_;
double _t_127_ = met1[i+1][j][k] * la[i+1][j][k] * met3[i+1][j][k];
double _v_62_ = stry[j] * _t_127_ * _t_128_;
double _v_4_ = c1 * u2[i+1][j][k+2];
double _v_13_ = c1 * u2[i+1][j][k-2];
_v_75_ += c1 * _v_62_;
double _v_63_ = c2 * u3[i+1][j][k+2];
_v_63_ -= c2 * u3[i+1][j][k-2];
double _t_133_ = _v_63_;
double _v_64_ = c1 * u3[i+1][j][k+1];
double _v_26_ = c1 * u3[i+1][j][k+1];
_v_64_ -= c1 * u3[i+1][j][k-1];
double _v_35_ = c1 * u3[i+1][j][k-1];
_t_133_ += _v_64_;
double _t_132_ = met1[i+1][j][k] * la[i+1][j][k] * met4[i+1][j][k];
double _v_65_ = _t_132_ * _t_133_;
double _v_7_ = c1 * u3[i+1][j][k+2];
double _v_16_ = c1 * u3[i+1][j][k-2];
_v_75_ += c1 * _v_65_;
double _t_141_ = 2.0 * mu[i-1][j][k];
_t_141_ += la[i-1][j][k];
double _t_138_ = met1[i-1][j][k] * _t_141_ * met2[i-1][j][k];
double _t_297_ = met1[i-1][j][k] * la[i-1][j][k] * met1[i-1][j][k];
double _v_66_ = c2 * u1[i-1][j][k+2];
_v_66_ -= c2 * u1[i-1][j][k-2];
double _t_139_ = _v_66_;
double _v_67_ = c1 * u1[i-1][j][k+1];
_v_20_ -= c1 * u1[i-1][j][k+1];
_v_67_ -= c1 * u1[i-1][j][k-1];
_v_29_ -= c1 * u1[i-1][j][k-1];
_t_139_ += _v_67_;
double _v_68_ = strx[i] * _t_138_ * _t_139_;
_v_1_ -= c1 * u1[i-1][j][k+2];
_v_10_ -= c1 * u1[i-1][j][k-2];
_v_75_ += c1 * _v_68_;
double _v_69_ = c2 * u2[i-1][j][k+2];
_v_69_ -= c2 * u2[i-1][j][k-2];
double _t_146_ = _v_69_;
double _v_70_ = c1 * u2[i-1][j][k+1];
_v_23_ -= c1 * u2[i-1][j][k+1];
_v_70_ -= c1 * u2[i-1][j][k-1];
_v_32_ -= c1 * u2[i-1][j][k-1];
_t_146_ += _v_70_;
double _t_145_ = met1[i-1][j][k] * la[i-1][j][k] * met3[i-1][j][k];
double _v_71_ = stry[j] * _t_145_ * _t_146_;
_v_4_ -= c1 * u2[i-1][j][k+2];
_v_13_ -= c1 * u2[i-1][j][k-2];
_v_75_ += c1 * _v_71_;
double _v_72_ = c2 * u3[i-1][j][k+2];
_v_72_ -= c2 * u3[i-1][j][k-2];
double _t_151_ = _v_72_;
double _v_73_ = c1 * u3[i-1][j][k+1];
_v_26_ -= c1 * u3[i-1][j][k+1];
_v_73_ -= c1 * u3[i-1][j][k-1];
_v_35_ -= c1 * u3[i-1][j][k-1];
_t_151_ += _v_73_;
double _t_150_ = met1[i-1][j][k] * la[i-1][j][k] * met4[i-1][j][k];
double _v_74_ = _t_150_ * _t_151_;
_v_7_ -= c1 * u3[i-1][j][k+2];
_v_16_ -= c1 * u3[i-1][j][k-2];
_v_75_ += c1 * _v_74_;
_t_79_ += stry[j] * _v_75_;
double r1ic0jc0kc0 = r1[i][j][k];
r1ic0jc0kc0 += _t_79_;

double _t_17_ = _v_6_;
_t_17_ += _v_7_;
double _t_16_ = met1[i][j][k+2] * mu[i][j][k+2] * met4[i][j][k+2];
double _v_8_ = stry[j] * _t_16_ * _t_17_;
double _v_18_ = c2 * _v_8_;
double _t_5_ = _v_0_;
_t_5_ += _v_1_;
double _t_7_ = 2.0 * mu[i][j][k+2];
double _t_10_ = met1[i][j][k+2] * mu[i][j][k+2] * met3[i][j][k+2];
_t_7_ += la[i][j][k+2];
double _t_4_ = met1[i][j][k+2] * _t_7_ * met2[i][j][k+2];
double _t_164_ = met1[i][j][k+2] * la[i][j][k+2] * met2[i][j][k+2];
double _t_3_ = _t_4_ * _t_5_;
double _v_2_ = stry[j] * _t_3_ * strx[i];
_v_18_ += c2 * _v_2_;
double _t_11_ = _v_3_;
_t_11_ += _v_4_;
double _v_5_ = _t_10_ * _t_11_;
_v_18_ += c2 * _v_5_;
double _t_24_ = _v_9_;
_t_24_ += _v_10_;
double _t_26_ = 2.0 * mu[i][j][k-2];
_t_26_ += la[i][j][k-2];
double _t_23_ = met1[i][j][k-2] * _t_26_ * met2[i][j][k-2];
double _t_176_ = met1[i][j][k-2] * la[i][j][k-2] * met2[i][j][k-2];
double _t_22_ = _t_23_ * _t_24_;
double _v_11_ = stry[j] * _t_22_ * strx[i];
_v_18_ += c2 * _v_11_;
double _t_30_ = _v_12_;
_t_30_ += _v_13_;
double _t_29_ = met1[i][j][k-2] * mu[i][j][k-2] * met3[i][j][k-2];
double _t_35_ = met1[i][j][k-2] * mu[i][j][k-2] * met4[i][j][k-2];
double _v_14_ = _t_29_ * _t_30_;
_v_18_ += c2 * _v_14_;
double _t_36_ = _v_15_;
_t_36_ += _v_16_;
double _v_17_ = stry[j] * _t_35_ * _t_36_;
_v_18_ += c2 * _v_17_;
double _t_0_ = _v_18_;
double _t_56_ = _v_25_;
_t_56_ += _v_26_;
double _t_55_ = met1[i][j][k+1] * mu[i][j][k+1] * met4[i][j][k+1];
double _v_27_ = stry[j] * _t_55_ * _t_56_;
double _v_37_ = c1 * _v_27_;
double _t_44_ = _v_19_;
_t_44_ += _v_20_;
double _t_46_ = 2.0 * mu[i][j][k+1];
double _t_49_ = met1[i][j][k+1] * mu[i][j][k+1] * met3[i][j][k+1];
_t_46_ += la[i][j][k+1];
double _t_43_ = met1[i][j][k+1] * _t_46_ * met2[i][j][k+1];
double _t_189_ = met1[i][j][k+1] * la[i][j][k+1] * met2[i][j][k+1];
double _t_42_ = _t_43_ * _t_44_;
double _v_21_ = stry[j] * _t_42_ * strx[i+2];
_v_37_ += c1 * _v_21_;
double _t_50_ = _v_22_;
_t_50_ += _v_23_;
double _v_24_ = _t_49_ * _t_50_;
_v_37_ += c1 * _v_24_;
double _t_63_ = _v_28_;
_t_63_ += _v_29_;
double _t_65_ = 2.0 * mu[i][j][k-1];
_t_65_ += la[i][j][k-1];
double _t_62_ = met1[i][j][k-1] * _t_65_ * met2[i][j][k-1];
double _t_201_ = met1[i][j][k-1] * la[i][j][k-1] * met2[i][j][k-1];
double _t_61_ = _t_62_ * _t_63_;
double _v_30_ = stry[j] * _t_61_ * strx[i-2];
_v_37_ += c1 * _v_30_;
double _t_69_ = _v_31_;
_t_69_ += _v_32_;
double _t_68_ = met1[i][j][k-1] * mu[i][j][k-1] * met3[i][j][k-1];
double _t_74_ = met1[i][j][k-1] * mu[i][j][k-1] * met4[i][j][k-1];
double _v_33_ = _t_68_ * _t_69_;
_v_37_ += c1 * _v_33_;
double _t_75_ = _v_34_;
_t_75_ += _v_35_;
double _v_36_ = stry[j] * _t_74_ * _t_75_;
_v_37_ += c1 * _v_36_;
_t_0_ += _v_37_;
r1ic0jc0kc0 += _t_0_;

double _t_159_ = _t_10_;
double _v_76_ = c2 * u1[i][j+2][k+2];
double _v_102_ = c2 * u1[i][j+2][k+2];
_v_76_ -= c2 * u1[i][j-2][k+2];
double _v_108_ = c2 * u1[i][j-2][k+2];
double _t_160_ = _v_76_;
double _v_77_ = c1 * u1[i][j+1][k+2];
_v_77_ -= c1 * u1[i][j-1][k+2];
_t_160_ += _v_77_;
double _t_158_ = _t_159_ * _t_160_;
double _v_115_ = c2 * u1[i][j+1][k+2];
double _v_121_ = c2 * u1[i][j-1][k+2];
double _v_78_ = strx[i] * _t_158_ * stry[j+2];
double _v_88_ = c2 * _v_78_;
double _v_79_ = c2 * u2[i][j+2][k+2];
double _v_105_ = c2 * u2[i][j+2][k+2];
_v_79_ -= c2 * u2[i][j-2][k+2];
double _v_111_ = c2 * u2[i][j-2][k+2];
double _t_165_ = _v_79_;
double _v_80_ = c1 * u2[i][j+1][k+2];
_v_80_ -= c1 * u2[i][j-1][k+2];
_t_165_ += _v_80_;
double _v_81_ = _t_164_ * _t_165_;
double _v_118_ = c2 * u2[i][j+1][k+2];
double _v_124_ = c2 * u2[i][j-1][k+2];
_v_88_ += c2 * _v_81_;
double _t_171_ = _t_29_;
double _v_82_ = c2 * u1[i][j+2][k-2];
_v_102_ -= c2 * u1[i][j+2][k-2];
_v_82_ -= c2 * u1[i][j-2][k-2];
_v_108_ -= c2 * u1[i][j-2][k-2];
double _t_172_ = _v_82_;
double _v_83_ = c1 * u1[i][j+1][k-2];
_v_83_ -= c1 * u1[i][j-1][k-2];
_t_172_ += _v_83_;
double _t_170_ = _t_171_ * _t_172_;
_v_115_ -= c2 * u1[i][j+1][k-2];
_v_121_ -= c2 * u1[i][j-1][k-2];
double _v_84_ = strx[i] * _t_170_ * stry[j];
_v_88_ += c2 * _v_84_;
double _v_85_ = c2 * u2[i][j+2][k-2];
_v_105_ -= c2 * u2[i][j+2][k-2];
_v_85_ -= c2 * u2[i][j-2][k-2];
_v_111_ -= c2 * u2[i][j-2][k-2];
double _t_177_ = _v_85_;
double _v_86_ = c1 * u2[i][j+1][k-2];
_v_86_ -= c1 * u2[i][j-1][k-2];
_t_177_ += _v_86_;
double _v_87_ = _t_176_ * _t_177_;
_v_118_ -= c2 * u2[i][j+1][k-2];
_v_124_ -= c2 * u2[i][j-1][k-2];
_v_88_ += c2 * _v_87_;
double _t_155_ = _v_88_;
double _t_184_ = _t_49_;
double _v_89_ = c2 * u1[i][j+2][k+1];
_v_89_ -= c2 * u1[i][j-2][k+1];
double _t_185_ = _v_89_;
double _v_90_ = c1 * u1[i][j+1][k+1];
double _v_116_ = c1 * u1[i][j+1][k+1];
_v_90_ -= c1 * u1[i][j-1][k+1];
double _v_122_ = c1 * u1[i][j-1][k+1];
_t_185_ += _v_90_;
double _t_183_ = _t_184_ * _t_185_;
double _v_103_ = c1 * u1[i][j+2][k+1];
double _v_109_ = c1 * u1[i][j-2][k+1];
double _v_91_ = strx[i] * _t_183_ * stry[j-2];
double _v_101_ = c1 * _v_91_;
double _v_92_ = c2 * u2[i][j+2][k+1];
_v_92_ -= c2 * u2[i][j-2][k+1];
double _t_190_ = _v_92_;
double _v_93_ = c1 * u2[i][j+1][k+1];
double _v_119_ = c1 * u2[i][j+1][k+1];
_v_93_ -= c1 * u2[i][j-1][k+1];
double _v_125_ = c1 * u2[i][j-1][k+1];
_t_190_ += _v_93_;
double _v_94_ = _t_189_ * _t_190_;
double _v_106_ = c1 * u2[i][j+2][k+1];
double _v_112_ = c1 * u2[i][j-2][k+1];
_v_101_ += c1 * _v_94_;
double _t_196_ = _t_68_;
double _v_95_ = c2 * u1[i][j+2][k-1];
_v_95_ -= c2 * u1[i][j-2][k-1];
double _t_197_ = _v_95_;
double _v_96_ = c1 * u1[i][j+1][k-1];
_v_116_ -= c1 * u1[i][j+1][k-1];
_v_96_ -= c1 * u1[i][j-1][k-1];
_v_122_ -= c1 * u1[i][j-1][k-1];
_t_197_ += _v_96_;
double _t_195_ = _t_196_ * _t_197_;
_v_103_ -= c1 * u1[i][j+2][k-1];
_v_109_ -= c1 * u1[i][j-2][k-1];
double _v_97_ = strx[i] * _t_195_ * stry[j];
_v_101_ += c1 * _v_97_;
double _v_98_ = c2 * u2[i][j+2][k-1];
_v_98_ -= c2 * u2[i][j-2][k-1];
double _t_202_ = _v_98_;
double _v_99_ = c1 * u2[i][j+1][k-1];
_v_119_ -= c1 * u2[i][j+1][k-1];
_v_99_ -= c1 * u2[i][j-1][k-1];
_v_125_ -= c1 * u2[i][j-1][k-1];
_t_202_ += _v_99_;
double _v_100_ = _t_201_ * _t_202_;
_v_106_ -= c1 * u2[i][j+2][k-1];
_v_112_ -= c1 * u2[i][j-2][k-1];
_v_101_ += c1 * _v_100_;
_t_155_ += _v_101_;
r1ic0jc0kc0 += _t_155_;

double _t_211_ = _v_102_;
_t_211_ += _v_103_;
double _t_210_ = met1[i][j+2][k] * mu[i][j+2][k] * met3[i][j+2][k];
double _t_209_ = _t_210_ * _t_211_;
double _v_104_ = strx[i] * _t_209_ * stry[j+1];
double _v_114_ = c2 * _v_104_;
double _t_216_ = _v_105_;
_t_216_ += _v_106_;
double _t_215_ = met1[i][j+2][k] * mu[i][j+2][k] * met2[i][j+2][k];
double _v_107_ = _t_215_ * _t_216_;
_v_114_ += c2 * _v_107_;
double _t_223_ = _v_108_;
_t_223_ += _v_109_;
double _t_222_ = met1[i][j-2][k] * mu[i][j-2][k] * met3[i][j-2][k];
double _t_221_ = _t_222_ * _t_223_;
double _v_110_ = strx[i] * _t_221_ * stry[j];
_v_114_ += c2 * _v_110_;
double _t_228_ = _v_111_;
_t_228_ += _v_112_;
double _t_227_ = met1[i][j-2][k] * mu[i][j-2][k] * met2[i][j-2][k];
double _v_113_ = _t_227_ * _t_228_;
_v_114_ += c2 * _v_113_;
double _t_206_ = _v_114_;
double _t_236_ = _v_115_;
_t_236_ += _v_116_;
double _t_235_ = met1[i][j+1][k] * mu[i][j+1][k] * met3[i][j+1][k];
double _t_234_ = _t_235_ * _t_236_;
double _v_117_ = strx[i] * _t_234_ * stry[j-1];
double _v_127_ = c1 * _v_117_;
double _t_241_ = _v_118_;
_t_241_ += _v_119_;
double _t_240_ = met1[i][j+1][k] * mu[i][j+1][k] * met2[i][j+1][k];
double _v_120_ = _t_240_ * _t_241_;
_v_127_ += c1 * _v_120_;
double _t_248_ = _v_121_;
_t_248_ += _v_122_;
double _t_247_ = met1[i][j-1][k] * mu[i][j-1][k] * met3[i][j-1][k];
double _t_246_ = _t_247_ * _t_248_;
double _v_123_ = strx[i] * _t_246_ * stry[j];
_v_127_ += c1 * _v_123_;
double _t_253_ = _v_124_;
_t_253_ += _v_125_;
double _t_252_ = met1[i][j-1][k] * mu[i][j-1][k] * met2[i][j-1][k];
double _v_126_ = _t_252_ * _t_253_;
_v_127_ += c1 * _v_126_;
_t_206_ += _v_127_;
r1ic0jc0kc0 += _t_206_;

double _v_128_ = c2 * u2[i+2][j+2][k];
_v_128_ -= c2 * u2[i-2][j+2][k];
double _v_131_ = c2 * u2[i+2][j-2][k];
_v_131_ -= c2 * u2[i-2][j-2][k];
double _v_142_ = c2 * u2[i+2][j+2][k];
_v_142_ -= c2 * u2[i+2][j-2][k];
double _v_145_ = c2 * u2[i-2][j+2][k];
_v_145_ -= c2 * u2[i-2][j-2][k];
double _v_135_ = c2 * u2[i+2][j+1][k];
_v_135_ -= c2 * u2[i-2][j+1][k];
double _v_138_ = c2 * u2[i+2][j-1][k];
_v_138_ -= c2 * u2[i-2][j-1][k];
double _v_149_ = c2 * u2[i+1][j+2][k];
_v_149_ -= c2 * u2[i+1][j-2][k];
double _v_152_ = c2 * u2[i-1][j+2][k];
_v_152_ -= c2 * u2[i-1][j-2][k];
double _v_129_ = c1 * u2[i+1][j+2][k];
_v_129_ -= c1 * u2[i-1][j+2][k];
double _v_132_ = c1 * u2[i+1][j-2][k];
_v_132_ -= c1 * u2[i-1][j-2][k];
double _v_143_ = c1 * u2[i+2][j+1][k];
_v_143_ -= c1 * u2[i+2][j-1][k];
double _v_146_ = c1 * u2[i-2][j+1][k];
_v_146_ -= c1 * u2[i-2][j-1][k];
double _v_136_ = c1 * u2[i+1][j+1][k];
_v_136_ -= c1 * u2[i-1][j+1][k];
double _v_139_ = c1 * u2[i+1][j-1][k];
_v_139_ -= c1 * u2[i-1][j-1][k];
double _v_150_ = c1 * u2[i+1][j+1][k];
_v_150_ -= c1 * u2[i+1][j-1][k];
double _v_153_ = c1 * u2[i-1][j+1][k];
_v_153_ -= c1 * u2[i-1][j-1][k];
double _t_260_ = _v_128_;
_t_260_ += _v_129_;
double _t_259_ = met1[i][j+2][k] * mu[i][j+2][k] * met1[i][j+2][k];
double _v_130_ = _t_259_ * _t_260_;
double _v_134_ = c2 * _v_130_;
double _t_265_ = _v_131_;
_t_265_ += _v_132_;
double _t_264_ = met1[i][j-2][k] * mu[i][j-2][k] * met1[i][j-2][k];
double _v_133_ = _t_264_ * _t_265_;
_v_134_ += c2 * _v_133_;
double _t_257_ = _v_134_;
double _t_282_ = _v_142_;
_t_282_ += _v_143_;
double _v_144_ = _t_281_ * _t_282_;
double _v_148_ = c2 * _v_144_;
double _t_287_ = _v_145_;
_t_287_ += _v_146_;
double _v_147_ = _t_286_ * _t_287_;
_v_148_ += c2 * _v_147_;
_t_257_ += _v_148_;
double _t_271_ = _v_135_;
_t_271_ += _v_136_;
double _t_270_ = met1[i][j+1][k] * mu[i][j+1][k] * met1[i][j+1][k];
double _v_137_ = _t_270_ * _t_271_;
double _v_141_ = c1 * _v_137_;
double _t_276_ = _v_138_;
_t_276_ += _v_139_;
double _t_275_ = met1[i][j-1][k] * mu[i][j-1][k] * met1[i][j-1][k];
double _v_140_ = _t_275_ * _t_276_;
_v_141_ += c1 * _v_140_;
_t_257_ += _v_141_;
double _t_293_ = _v_149_;
_t_293_ += _v_150_;
double _v_151_ = _t_292_ * _t_293_;
double _v_155_ = c1 * _v_151_;
double _t_298_ = _v_152_;
_t_298_ += _v_153_;
double _v_154_ = _t_297_ * _t_298_;
_v_155_ += c1 * _v_154_;
_t_257_ += _v_155_;
r1ic0jc0kc0 += _t_257_;

r1[i][j][k] = r1ic0jc0kc0;

		} 
	}
}

extern "C" void host_code (double *h_r1, double *h_u1, double *h_u2, double *h_u3,  double *h_mu, double *h_la, double *h_met1, double *h_met2, double *h_met3, double *h_met4, double *h_strx, double *h_stry, double c1, double c2, int N) {
	double *r1;
	cudaMalloc (&r1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for r1\n");
	cudaMemcpy (r1, h_r1, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *u1;
	cudaMalloc (&u1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u1\n");
	cudaMemcpy (u1, h_u1, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *u2;
	cudaMalloc (&u2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u2\n");
	cudaMemcpy (u2, h_u2, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *u3;
	cudaMalloc (&u3, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u3\n");
	cudaMemcpy (u3, h_u3, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *mu;
	cudaMalloc (&mu, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for mu\n");
	cudaMemcpy (mu, h_mu, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *la;
	cudaMalloc (&la, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for la\n");
	cudaMemcpy (la, h_la, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *met1;
	cudaMalloc (&met1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met1\n");
	cudaMemcpy (met1, h_met1, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *met2;
	cudaMalloc (&met2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met2\n");
	cudaMemcpy (met2, h_met2, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *met3;
	cudaMalloc (&met3, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met3\n");
	cudaMemcpy (met3, h_met3, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *met4;
	cudaMalloc (&met4, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met4\n");
	cudaMemcpy (met4, h_met4, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *strx;
	cudaMalloc (&strx, sizeof(double)*N);
	check_error ("Failed to allocate device memory for strx\n");
	cudaMemcpy (strx, h_strx, sizeof(double)*N, cudaMemcpyHostToDevice);
	double *stry;
	cudaMalloc (&stry, sizeof(double)*N);
	check_error ("Failed to allocate device memory for stry\n");
	cudaMemcpy (stry, h_stry, sizeof(double)*N, cudaMemcpyHostToDevice);

	dim3 blockconfig (16, 1, 8);
	dim3 gridconfig (ceil(N, blockconfig.x), 1, ceil(N, blockconfig.z));

	curvi <<<gridconfig, blockconfig>>> (r1, u1, u2, u3, mu, la, met1, met2, met3, met4, strx, stry, c1, c2, N);
	cudaMemcpy (h_r1, r1, sizeof(double)*N*N*N, cudaMemcpyDeviceToHost);
}

	.file	"tmpxft_002fb017_00000000-6_reordered-a.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0:
.LFB2173:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE2173:
	.size	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error : %s, %s\n"
	.text
	.globl	_Z11check_errorPKc
	.type	_Z11check_errorPKc, @function
_Z11check_errorPKc:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L3
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movq	%rbx, %rdx
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L3:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z11check_errorPKc, .-_Z11check_errorPKc
	.globl	_Z49__device_stub__Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.type	_Z49__device_stub__Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi, @function
_Z49__device_stub__Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$312, %rsp
	.cfi_def_cfa_offset 320
	movq	352(%rsp), %rax
	movsd	%xmm0, 8(%rsp)
	movsd	%xmm1, (%rsp)
	movq	%rax, 24(%rsp)
	movq	360(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rax
	movq	%rdi, 32(%rsp)
	leaq	128(%rsp), %rdi
	movq	%rax, 176(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 216(%rsp)
	movq	320(%rsp), %rax
	movq	%rsi, 40(%rsp)
	leaq	140(%rsp), %rsi
	movq	%rax, 80(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 224(%rsp)
	movq	328(%rsp), %rax
	movq	%rdx, 48(%rsp)
	leaq	112(%rsp), %rdx
	movq	%rax, 88(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 232(%rsp)
	movq	336(%rsp), %rax
	movq	%rcx, 56(%rsp)
	leaq	120(%rsp), %rcx
	movq	%rax, 96(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 240(%rsp)
	movq	344(%rsp), %rax
	movq	%r8, 64(%rsp)
	movq	%r9, 72(%rsp)
	movq	%rax, 104(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 272(%rsp)
	movq	%rsp, %rax
	movq	%rax, 280(%rsp)
	leaq	368(%rsp), %rax
	movq	%rax, 288(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 128(%rsp)
	movl	$1, 136(%rsp)
	movq	%rax, 140(%rsp)
	movl	$1, 148(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	120(%rsp)
	.cfi_def_cfa_offset 328
	leaq	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi(%rip), %rdi
	pushq	120(%rsp)
	.cfi_def_cfa_offset 336
	movq	156(%rsp), %rcx
	movl	164(%rsp), %r8d
	movq	144(%rsp), %rsi
	movl	152(%rsp), %edx
	leaq	192(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 328
	popq	%rdx
	.cfi_def_cfa_offset 320
.L7:
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$312, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z49__device_stub__Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi, .-_Z49__device_stub__Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.globl	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.type	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi, @function
_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.cfi_endproc
.LFE2054:
	.size	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi, .-_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.section	.rodata.str1.1
.LC1:
	.string	"Failed to allocate device memory for r1\n"
.LC2:
	.string	"Failed to allocate device memory for u1\n"
.LC3:
	.string	"Failed to allocate device memory for u2\n"
.LC4:
	.string	"Failed to allocate device memory for u3\n"
.LC5:
	.string	"Failed to allocate device memory for mu\n"
.LC6:
	.string	"Failed to allocate device memory for la\n"
.LC7:
	.string	"Failed to allocate device memory for met1\n"
.LC8:
	.string	"Failed to allocate device memory for met2\n"
.LC9:
	.string	"Failed to allocate device memory for met3\n"
.LC10:
	.string	"Failed to allocate device memory for met4\n"
.LC11:
	.string	"Failed to allocate device memory for strx\n"
.LC12:
	.string	"Failed to allocate device memory for stry\n"
	.text
	.globl	host_code
	.type	host_code, @function
host_code:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	movq	288(%rsp), %rax
	movq	%r9, 24(%rsp)
	movq	%rdi, 16(%rsp)
	movslq	336(%rsp), %rbp
	leaq	96(%rsp), %rdi
	movq	%rax, 32(%rsp)
	movq	296(%rsp), %rax
	movsd	%xmm0, 88(%rsp)
	movq	%rbp, %rbx
	movq	%rax, 40(%rsp)
	movq	304(%rsp), %rax
	movsd	%xmm1, 80(%rsp)
	movq	%rax, 48(%rsp)
	movq	312(%rsp), %rax
	movq	%rax, 56(%rsp)
	movq	320(%rsp), %rax
	movq	%rax, 64(%rsp)
	movq	328(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	movq	%rbp, %rax
	imulq	%rbp, %rax
	imulq	%rbp, %rax
	salq	$3, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC1(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	96(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	104(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC2(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	104(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	112(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC3(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	112(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	120(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC4(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	120(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	128(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC5(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	%r12, %rsi
	movq	128(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	136(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC6(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	136(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	144(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC7(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movq	144(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	152(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC8(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movq	152(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	160(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC9(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	$1, %ecx
	movq	160(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	168(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC10(%rip), %rdi
	salq	$3, %rbp
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$1, %ecx
	movq	168(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	%rbp, %rsi
	leaq	176(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC11(%rip), %rdi
	call	_Z11check_errorPKc
	movq	64(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	176(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	%rbp, %rsi
	leaq	184(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC12(%rip), %rdi
	call	_Z11check_errorPKc
	movq	72(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	184(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	%ebx, %eax
	movl	%ebx, %esi
	movl	%ebx, %edx
	andl	$7, %eax
	shrl	$3, %esi
	movl	$1, 196(%rsp)
	movl	$8, %ecx
	movl	$1, 208(%rsp)
	cmpl	$1, %eax
	movl	%ebx, %eax
	movl	$16, 192(%rsp)
	sbbl	$-1, %esi
	andl	$15, %edx
	shrl	$4, %eax
	cmpl	$1, %edx
	movq	192(%rsp), %rdx
	sbbl	$-1, %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%eax, 204(%rsp)
	movq	204(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	movsd	80(%rsp), %xmm1
	movsd	88(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L15
	pushq	%rax
	.cfi_def_cfa_offset 296
	pushq	%rbx
	.cfi_def_cfa_offset 304
	pushq	200(%rsp)
	.cfi_def_cfa_offset 312
	pushq	200(%rsp)
	.cfi_def_cfa_offset 320
	pushq	200(%rsp)
	.cfi_def_cfa_offset 328
	pushq	200(%rsp)
	.cfi_def_cfa_offset 336
	pushq	200(%rsp)
	.cfi_def_cfa_offset 344
	pushq	200(%rsp)
	.cfi_def_cfa_offset 352
	movq	200(%rsp), %r9
	movq	192(%rsp), %r8
	movq	184(%rsp), %rcx
	movq	176(%rsp), %rdx
	movq	168(%rsp), %rsi
	movq	160(%rsp), %rdi
	call	_Z49__device_stub__Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	addq	$64, %rsp
	.cfi_def_cfa_offset 288
.L15:
	movq	8(%rsp), %rdx
	movq	96(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	host_code, .-host_code
	.section	.rodata.str1.1
.LC13:
	.string	"_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include "hip/hip_runtime.h"
#define max(x,y)  ((x) > (y)? (x) : (y))
#define min(x,y)  ((x) < (y)? (x) : (y))
#define ceil(a,b) ((a) % (b) == 0 ? (a) / (b) : ((a) / (b)) + 1)

void check_error (const char* message) {
	hipError_t error = hipGetLastError ();
	if (error != hipSuccess) {
		printf ("CUDA error : %s, %s\n", message, hipGetErrorString (error));
		exit(-1);
	}
}

__global__ void curvi (double * __restrict__ in_r1, double *__restrict__ in_u1, double * __restrict__ in_u2, double *__restrict__ in_u3, double * __restrict__ in_mu, double * __restrict__ in_la, double * __restrict__ in_met1, double * __restrict__ in_met2, double * __restrict__ in_met3, double * __restrict__ in_met4, double * strx, double * stry, double c1, double c2, int N) {
	//Determing the block's indices
	int blockdim_k= (int)(blockDim.x);
	int k0 = (int)(blockIdx.x)*(blockdim_k);
	int k = max (k0, 0) + (int)(threadIdx.x);
	int blockdim_i= (int)(blockDim.z);
	int i0 = (int)(blockIdx.z)*(blockdim_i);
	int i = max (i0, 0) + (int)(threadIdx.z);

	double (*u1)[304][304] = (double (*)[304][304])in_u1;
	double (*u2)[304][304] = (double (*)[304][304])in_u2;
	double (*u3)[304][304] = (double (*)[304][304])in_u3;
	double (*mu)[304][304] = (double (*)[304][304])in_mu;
	double (*la)[304][304] = (double (*)[304][304])in_la;
	double (*r1)[304][304] = (double (*)[304][304])in_r1;
	double (*met1)[304][304] = (double (*)[304][304])in_met1;
	double (*met2)[304][304] = (double (*)[304][304])in_met2;
	double (*met3)[304][304] = (double (*)[304][304])in_met3;
	double (*met4)[304][304] = (double (*)[304][304])in_met4;

	if (i>=2 & k>=2 & i<=N-3 & k<=N-3) {
		for (int j=2; j<=N-3; j++) {
double _t_86_ = 2.0 * mu[i+2][j][k];
_t_86_ += la[i+2][j][k];
double _t_83_ = met1[i+2][j][k] * _t_86_ * met2[i+2][j][k];
double _t_281_ = met1[i+2][j][k] * la[i+2][j][k] * met1[i+2][j][k];
double _v_38_ = c2 * u1[i+2][j][k+2];
double _v_0_ = c2 * u1[i+2][j][k+2];
_v_38_ -= c2 * u1[i+2][j][k-2];
double _v_9_ = c2 * u1[i+2][j][k-2];
double _t_84_ = _v_38_;
double _v_39_ = c1 * u1[i+2][j][k+1];
_v_39_ -= c1 * u1[i+2][j][k-1];
_t_84_ += _v_39_;
double _v_40_ = strx[i] * _t_83_ * _t_84_;
double _v_19_ = c2 * u1[i+2][j][k+1];
double _v_28_ = c2 * u1[i+2][j][k-1];
double _v_56_ = c2 * _v_40_;
double _v_41_ = c2 * u2[i+2][j][k+2];
double _v_3_ = c2 * u2[i+2][j][k+2];
_v_41_ -= c2 * u2[i+2][j][k-2];
double _v_12_ = c2 * u2[i+2][j][k-2];
double _t_91_ = _v_41_;
double _v_42_ = c1 * u2[i+2][j][k+1];
_v_42_ -= c1 * u2[i+2][j][k-1];
_t_91_ += _v_42_;
double _t_90_ = met1[i+2][j][k] * la[i+2][j][k] * met3[i+2][j][k];
double _v_43_ = stry[j] * _t_90_ * _t_91_;
double _v_22_ = c2 * u2[i+2][j][k+1];
double _v_31_ = c2 * u2[i+2][j][k-1];
_v_56_ += c2 * _v_43_;
double _v_44_ = c2 * u3[i+2][j][k+2];
double _v_6_ = c2 * u3[i+2][j][k+2];
_v_44_ -= c2 * u3[i+2][j][k-2];
double _v_15_ = c2 * u3[i+2][j][k-2];
double _t_96_ = _v_44_;
double _v_45_ = c1 * u3[i+2][j][k+1];
_v_45_ -= c1 * u3[i+2][j][k-1];
_t_96_ += _v_45_;
double _t_95_ = met1[i+2][j][k] * la[i+2][j][k] * met4[i+2][j][k];
double _v_46_ = _t_95_ * _t_96_;
double _v_25_ = c2 * u3[i+2][j][k+1];
double _v_34_ = c2 * u3[i+2][j][k-1];
_v_56_ += c2 * _v_46_;
double _t_104_ = 2.0 * mu[i-2][j][k];
_t_104_ += la[i-2][j][k];
double _t_101_ = met1[i-2][j][k] * _t_104_ * met2[i-2][j][k];
double _t_286_ = met1[i-2][j][k] * la[i-2][j][k] * met1[i-2][j][k];
double _v_47_ = c2 * u1[i-2][j][k+2];
_v_0_ -= c2 * u1[i-2][j][k+2];
_v_47_ -= c2 * u1[i-2][j][k-2];
_v_9_ -= c2 * u1[i-2][j][k-2];
double _t_102_ = _v_47_;
double _v_48_ = c1 * u1[i-2][j][k+1];
_v_48_ -= c1 * u1[i-2][j][k-1];
_t_102_ += _v_48_;
double _v_49_ = strx[i] * _t_101_ * _t_102_;
_v_19_ -= c2 * u1[i-2][j][k+1];
_v_28_ -= c2 * u1[i-2][j][k-1];
_v_56_ += c2 * _v_49_;
double _v_50_ = c2 * u2[i-2][j][k+2];
_v_3_ -= c2 * u2[i-2][j][k+2];
_v_50_ -= c2 * u2[i-2][j][k-2];
_v_12_ -= c2 * u2[i-2][j][k-2];
double _t_109_ = _v_50_;
double _v_51_ = c1 * u2[i-2][j][k+1];
_v_51_ -= c1 * u2[i-2][j][k-1];
_t_109_ += _v_51_;
double _t_108_ = met1[i-2][j][k] * la[i-2][j][k] * met3[i-2][j][k];
double _v_52_ = stry[j] * _t_108_ * _t_109_;
_v_22_ -= c2 * u2[i-2][j][k+1];
_v_31_ -= c2 * u2[i-2][j][k-1];
_v_56_ += c2 * _v_52_;
double _v_53_ = c2 * u3[i-2][j][k+2];
_v_6_ -= c2 * u3[i-2][j][k+2];
_v_53_ -= c2 * u3[i-2][j][k-2];
_v_15_ -= c2 * u3[i-2][j][k-2];
double _t_114_ = _v_53_;
double _v_54_ = c1 * u3[i-2][j][k+1];
_v_54_ -= c1 * u3[i-2][j][k-1];
_t_114_ += _v_54_;
double _t_113_ = met1[i-2][j][k] * la[i-2][j][k] * met4[i-2][j][k];
double _v_55_ = _t_113_ * _t_114_;
_v_25_ -= c2 * u3[i-2][j][k+1];
_v_34_ -= c2 * u3[i-2][j][k-1];
_v_56_ += c2 * _v_55_;
double _t_79_ = stry[j] * _v_56_;
double _t_123_ = 2.0 * mu[i+1][j][k];
_t_123_ += la[i+1][j][k];
double _t_120_ = met1[i+1][j][k] * _t_123_ * met2[i+1][j][k];
double _t_292_ = met1[i+1][j][k] * la[i+1][j][k] * met1[i+1][j][k];
double _v_57_ = c2 * u1[i+1][j][k+2];
_v_57_ -= c2 * u1[i+1][j][k-2];
double _t_121_ = _v_57_;
double _v_58_ = c1 * u1[i+1][j][k+1];
double _v_20_ = c1 * u1[i+1][j][k+1];
_v_58_ -= c1 * u1[i+1][j][k-1];
double _v_29_ = c1 * u1[i+1][j][k-1];
_t_121_ += _v_58_;
double _v_59_ = strx[i] * _t_120_ * _t_121_;
double _v_1_ = c1 * u1[i+1][j][k+2];
double _v_10_ = c1 * u1[i+1][j][k-2];
double _v_75_ = c1 * _v_59_;
double _v_60_ = c2 * u2[i+1][j][k+2];
_v_60_ -= c2 * u2[i+1][j][k-2];
double _t_128_ = _v_60_;
double _v_61_ = c1 * u2[i+1][j][k+1];
double _v_23_ = c1 * u2[i+1][j][k+1];
_v_61_ -= c1 * u2[i+1][j][k-1];
double _v_32_ = c1 * u2[i+1][j][k-1];
_t_128_ += _v_61_;
double _t_127_ = met1[i+1][j][k] * la[i+1][j][k] * met3[i+1][j][k];
double _v_62_ = stry[j] * _t_127_ * _t_128_;
double _v_4_ = c1 * u2[i+1][j][k+2];
double _v_13_ = c1 * u2[i+1][j][k-2];
_v_75_ += c1 * _v_62_;
double _v_63_ = c2 * u3[i+1][j][k+2];
_v_63_ -= c2 * u3[i+1][j][k-2];
double _t_133_ = _v_63_;
double _v_64_ = c1 * u3[i+1][j][k+1];
double _v_26_ = c1 * u3[i+1][j][k+1];
_v_64_ -= c1 * u3[i+1][j][k-1];
double _v_35_ = c1 * u3[i+1][j][k-1];
_t_133_ += _v_64_;
double _t_132_ = met1[i+1][j][k] * la[i+1][j][k] * met4[i+1][j][k];
double _v_65_ = _t_132_ * _t_133_;
double _v_7_ = c1 * u3[i+1][j][k+2];
double _v_16_ = c1 * u3[i+1][j][k-2];
_v_75_ += c1 * _v_65_;
double _t_141_ = 2.0 * mu[i-1][j][k];
_t_141_ += la[i-1][j][k];
double _t_138_ = met1[i-1][j][k] * _t_141_ * met2[i-1][j][k];
double _t_297_ = met1[i-1][j][k] * la[i-1][j][k] * met1[i-1][j][k];
double _v_66_ = c2 * u1[i-1][j][k+2];
_v_66_ -= c2 * u1[i-1][j][k-2];
double _t_139_ = _v_66_;
double _v_67_ = c1 * u1[i-1][j][k+1];
_v_20_ -= c1 * u1[i-1][j][k+1];
_v_67_ -= c1 * u1[i-1][j][k-1];
_v_29_ -= c1 * u1[i-1][j][k-1];
_t_139_ += _v_67_;
double _v_68_ = strx[i] * _t_138_ * _t_139_;
_v_1_ -= c1 * u1[i-1][j][k+2];
_v_10_ -= c1 * u1[i-1][j][k-2];
_v_75_ += c1 * _v_68_;
double _v_69_ = c2 * u2[i-1][j][k+2];
_v_69_ -= c2 * u2[i-1][j][k-2];
double _t_146_ = _v_69_;
double _v_70_ = c1 * u2[i-1][j][k+1];
_v_23_ -= c1 * u2[i-1][j][k+1];
_v_70_ -= c1 * u2[i-1][j][k-1];
_v_32_ -= c1 * u2[i-1][j][k-1];
_t_146_ += _v_70_;
double _t_145_ = met1[i-1][j][k] * la[i-1][j][k] * met3[i-1][j][k];
double _v_71_ = stry[j] * _t_145_ * _t_146_;
_v_4_ -= c1 * u2[i-1][j][k+2];
_v_13_ -= c1 * u2[i-1][j][k-2];
_v_75_ += c1 * _v_71_;
double _v_72_ = c2 * u3[i-1][j][k+2];
_v_72_ -= c2 * u3[i-1][j][k-2];
double _t_151_ = _v_72_;
double _v_73_ = c1 * u3[i-1][j][k+1];
_v_26_ -= c1 * u3[i-1][j][k+1];
_v_73_ -= c1 * u3[i-1][j][k-1];
_v_35_ -= c1 * u3[i-1][j][k-1];
_t_151_ += _v_73_;
double _t_150_ = met1[i-1][j][k] * la[i-1][j][k] * met4[i-1][j][k];
double _v_74_ = _t_150_ * _t_151_;
_v_7_ -= c1 * u3[i-1][j][k+2];
_v_16_ -= c1 * u3[i-1][j][k-2];
_v_75_ += c1 * _v_74_;
_t_79_ += stry[j] * _v_75_;
double r1ic0jc0kc0 = r1[i][j][k];
r1ic0jc0kc0 += _t_79_;

double _t_17_ = _v_6_;
_t_17_ += _v_7_;
double _t_16_ = met1[i][j][k+2] * mu[i][j][k+2] * met4[i][j][k+2];
double _v_8_ = stry[j] * _t_16_ * _t_17_;
double _v_18_ = c2 * _v_8_;
double _t_5_ = _v_0_;
_t_5_ += _v_1_;
double _t_7_ = 2.0 * mu[i][j][k+2];
double _t_10_ = met1[i][j][k+2] * mu[i][j][k+2] * met3[i][j][k+2];
_t_7_ += la[i][j][k+2];
double _t_4_ = met1[i][j][k+2] * _t_7_ * met2[i][j][k+2];
double _t_164_ = met1[i][j][k+2] * la[i][j][k+2] * met2[i][j][k+2];
double _t_3_ = _t_4_ * _t_5_;
double _v_2_ = stry[j] * _t_3_ * strx[i];
_v_18_ += c2 * _v_2_;
double _t_11_ = _v_3_;
_t_11_ += _v_4_;
double _v_5_ = _t_10_ * _t_11_;
_v_18_ += c2 * _v_5_;
double _t_24_ = _v_9_;
_t_24_ += _v_10_;
double _t_26_ = 2.0 * mu[i][j][k-2];
_t_26_ += la[i][j][k-2];
double _t_23_ = met1[i][j][k-2] * _t_26_ * met2[i][j][k-2];
double _t_176_ = met1[i][j][k-2] * la[i][j][k-2] * met2[i][j][k-2];
double _t_22_ = _t_23_ * _t_24_;
double _v_11_ = stry[j] * _t_22_ * strx[i];
_v_18_ += c2 * _v_11_;
double _t_30_ = _v_12_;
_t_30_ += _v_13_;
double _t_29_ = met1[i][j][k-2] * mu[i][j][k-2] * met3[i][j][k-2];
double _t_35_ = met1[i][j][k-2] * mu[i][j][k-2] * met4[i][j][k-2];
double _v_14_ = _t_29_ * _t_30_;
_v_18_ += c2 * _v_14_;
double _t_36_ = _v_15_;
_t_36_ += _v_16_;
double _v_17_ = stry[j] * _t_35_ * _t_36_;
_v_18_ += c2 * _v_17_;
double _t_0_ = _v_18_;
double _t_56_ = _v_25_;
_t_56_ += _v_26_;
double _t_55_ = met1[i][j][k+1] * mu[i][j][k+1] * met4[i][j][k+1];
double _v_27_ = stry[j] * _t_55_ * _t_56_;
double _v_37_ = c1 * _v_27_;
double _t_44_ = _v_19_;
_t_44_ += _v_20_;
double _t_46_ = 2.0 * mu[i][j][k+1];
double _t_49_ = met1[i][j][k+1] * mu[i][j][k+1] * met3[i][j][k+1];
_t_46_ += la[i][j][k+1];
double _t_43_ = met1[i][j][k+1] * _t_46_ * met2[i][j][k+1];
double _t_189_ = met1[i][j][k+1] * la[i][j][k+1] * met2[i][j][k+1];
double _t_42_ = _t_43_ * _t_44_;
double _v_21_ = stry[j] * _t_42_ * strx[i+2];
_v_37_ += c1 * _v_21_;
double _t_50_ = _v_22_;
_t_50_ += _v_23_;
double _v_24_ = _t_49_ * _t_50_;
_v_37_ += c1 * _v_24_;
double _t_63_ = _v_28_;
_t_63_ += _v_29_;
double _t_65_ = 2.0 * mu[i][j][k-1];
_t_65_ += la[i][j][k-1];
double _t_62_ = met1[i][j][k-1] * _t_65_ * met2[i][j][k-1];
double _t_201_ = met1[i][j][k-1] * la[i][j][k-1] * met2[i][j][k-1];
double _t_61_ = _t_62_ * _t_63_;
double _v_30_ = stry[j] * _t_61_ * strx[i-2];
_v_37_ += c1 * _v_30_;
double _t_69_ = _v_31_;
_t_69_ += _v_32_;
double _t_68_ = met1[i][j][k-1] * mu[i][j][k-1] * met3[i][j][k-1];
double _t_74_ = met1[i][j][k-1] * mu[i][j][k-1] * met4[i][j][k-1];
double _v_33_ = _t_68_ * _t_69_;
_v_37_ += c1 * _v_33_;
double _t_75_ = _v_34_;
_t_75_ += _v_35_;
double _v_36_ = stry[j] * _t_74_ * _t_75_;
_v_37_ += c1 * _v_36_;
_t_0_ += _v_37_;
r1ic0jc0kc0 += _t_0_;

double _t_159_ = _t_10_;
double _v_76_ = c2 * u1[i][j+2][k+2];
double _v_102_ = c2 * u1[i][j+2][k+2];
_v_76_ -= c2 * u1[i][j-2][k+2];
double _v_108_ = c2 * u1[i][j-2][k+2];
double _t_160_ = _v_76_;
double _v_77_ = c1 * u1[i][j+1][k+2];
_v_77_ -= c1 * u1[i][j-1][k+2];
_t_160_ += _v_77_;
double _t_158_ = _t_159_ * _t_160_;
double _v_115_ = c2 * u1[i][j+1][k+2];
double _v_121_ = c2 * u1[i][j-1][k+2];
double _v_78_ = strx[i] * _t_158_ * stry[j+2];
double _v_88_ = c2 * _v_78_;
double _v_79_ = c2 * u2[i][j+2][k+2];
double _v_105_ = c2 * u2[i][j+2][k+2];
_v_79_ -= c2 * u2[i][j-2][k+2];
double _v_111_ = c2 * u2[i][j-2][k+2];
double _t_165_ = _v_79_;
double _v_80_ = c1 * u2[i][j+1][k+2];
_v_80_ -= c1 * u2[i][j-1][k+2];
_t_165_ += _v_80_;
double _v_81_ = _t_164_ * _t_165_;
double _v_118_ = c2 * u2[i][j+1][k+2];
double _v_124_ = c2 * u2[i][j-1][k+2];
_v_88_ += c2 * _v_81_;
double _t_171_ = _t_29_;
double _v_82_ = c2 * u1[i][j+2][k-2];
_v_102_ -= c2 * u1[i][j+2][k-2];
_v_82_ -= c2 * u1[i][j-2][k-2];
_v_108_ -= c2 * u1[i][j-2][k-2];
double _t_172_ = _v_82_;
double _v_83_ = c1 * u1[i][j+1][k-2];
_v_83_ -= c1 * u1[i][j-1][k-2];
_t_172_ += _v_83_;
double _t_170_ = _t_171_ * _t_172_;
_v_115_ -= c2 * u1[i][j+1][k-2];
_v_121_ -= c2 * u1[i][j-1][k-2];
double _v_84_ = strx[i] * _t_170_ * stry[j];
_v_88_ += c2 * _v_84_;
double _v_85_ = c2 * u2[i][j+2][k-2];
_v_105_ -= c2 * u2[i][j+2][k-2];
_v_85_ -= c2 * u2[i][j-2][k-2];
_v_111_ -= c2 * u2[i][j-2][k-2];
double _t_177_ = _v_85_;
double _v_86_ = c1 * u2[i][j+1][k-2];
_v_86_ -= c1 * u2[i][j-1][k-2];
_t_177_ += _v_86_;
double _v_87_ = _t_176_ * _t_177_;
_v_118_ -= c2 * u2[i][j+1][k-2];
_v_124_ -= c2 * u2[i][j-1][k-2];
_v_88_ += c2 * _v_87_;
double _t_155_ = _v_88_;
double _t_184_ = _t_49_;
double _v_89_ = c2 * u1[i][j+2][k+1];
_v_89_ -= c2 * u1[i][j-2][k+1];
double _t_185_ = _v_89_;
double _v_90_ = c1 * u1[i][j+1][k+1];
double _v_116_ = c1 * u1[i][j+1][k+1];
_v_90_ -= c1 * u1[i][j-1][k+1];
double _v_122_ = c1 * u1[i][j-1][k+1];
_t_185_ += _v_90_;
double _t_183_ = _t_184_ * _t_185_;
double _v_103_ = c1 * u1[i][j+2][k+1];
double _v_109_ = c1 * u1[i][j-2][k+1];
double _v_91_ = strx[i] * _t_183_ * stry[j-2];
double _v_101_ = c1 * _v_91_;
double _v_92_ = c2 * u2[i][j+2][k+1];
_v_92_ -= c2 * u2[i][j-2][k+1];
double _t_190_ = _v_92_;
double _v_93_ = c1 * u2[i][j+1][k+1];
double _v_119_ = c1 * u2[i][j+1][k+1];
_v_93_ -= c1 * u2[i][j-1][k+1];
double _v_125_ = c1 * u2[i][j-1][k+1];
_t_190_ += _v_93_;
double _v_94_ = _t_189_ * _t_190_;
double _v_106_ = c1 * u2[i][j+2][k+1];
double _v_112_ = c1 * u2[i][j-2][k+1];
_v_101_ += c1 * _v_94_;
double _t_196_ = _t_68_;
double _v_95_ = c2 * u1[i][j+2][k-1];
_v_95_ -= c2 * u1[i][j-2][k-1];
double _t_197_ = _v_95_;
double _v_96_ = c1 * u1[i][j+1][k-1];
_v_116_ -= c1 * u1[i][j+1][k-1];
_v_96_ -= c1 * u1[i][j-1][k-1];
_v_122_ -= c1 * u1[i][j-1][k-1];
_t_197_ += _v_96_;
double _t_195_ = _t_196_ * _t_197_;
_v_103_ -= c1 * u1[i][j+2][k-1];
_v_109_ -= c1 * u1[i][j-2][k-1];
double _v_97_ = strx[i] * _t_195_ * stry[j];
_v_101_ += c1 * _v_97_;
double _v_98_ = c2 * u2[i][j+2][k-1];
_v_98_ -= c2 * u2[i][j-2][k-1];
double _t_202_ = _v_98_;
double _v_99_ = c1 * u2[i][j+1][k-1];
_v_119_ -= c1 * u2[i][j+1][k-1];
_v_99_ -= c1 * u2[i][j-1][k-1];
_v_125_ -= c1 * u2[i][j-1][k-1];
_t_202_ += _v_99_;
double _v_100_ = _t_201_ * _t_202_;
_v_106_ -= c1 * u2[i][j+2][k-1];
_v_112_ -= c1 * u2[i][j-2][k-1];
_v_101_ += c1 * _v_100_;
_t_155_ += _v_101_;
r1ic0jc0kc0 += _t_155_;

double _t_211_ = _v_102_;
_t_211_ += _v_103_;
double _t_210_ = met1[i][j+2][k] * mu[i][j+2][k] * met3[i][j+2][k];
double _t_209_ = _t_210_ * _t_211_;
double _v_104_ = strx[i] * _t_209_ * stry[j+1];
double _v_114_ = c2 * _v_104_;
double _t_216_ = _v_105_;
_t_216_ += _v_106_;
double _t_215_ = met1[i][j+2][k] * mu[i][j+2][k] * met2[i][j+2][k];
double _v_107_ = _t_215_ * _t_216_;
_v_114_ += c2 * _v_107_;
double _t_223_ = _v_108_;
_t_223_ += _v_109_;
double _t_222_ = met1[i][j-2][k] * mu[i][j-2][k] * met3[i][j-2][k];
double _t_221_ = _t_222_ * _t_223_;
double _v_110_ = strx[i] * _t_221_ * stry[j];
_v_114_ += c2 * _v_110_;
double _t_228_ = _v_111_;
_t_228_ += _v_112_;
double _t_227_ = met1[i][j-2][k] * mu[i][j-2][k] * met2[i][j-2][k];
double _v_113_ = _t_227_ * _t_228_;
_v_114_ += c2 * _v_113_;
double _t_206_ = _v_114_;
double _t_236_ = _v_115_;
_t_236_ += _v_116_;
double _t_235_ = met1[i][j+1][k] * mu[i][j+1][k] * met3[i][j+1][k];
double _t_234_ = _t_235_ * _t_236_;
double _v_117_ = strx[i] * _t_234_ * stry[j-1];
double _v_127_ = c1 * _v_117_;
double _t_241_ = _v_118_;
_t_241_ += _v_119_;
double _t_240_ = met1[i][j+1][k] * mu[i][j+1][k] * met2[i][j+1][k];
double _v_120_ = _t_240_ * _t_241_;
_v_127_ += c1 * _v_120_;
double _t_248_ = _v_121_;
_t_248_ += _v_122_;
double _t_247_ = met1[i][j-1][k] * mu[i][j-1][k] * met3[i][j-1][k];
double _t_246_ = _t_247_ * _t_248_;
double _v_123_ = strx[i] * _t_246_ * stry[j];
_v_127_ += c1 * _v_123_;
double _t_253_ = _v_124_;
_t_253_ += _v_125_;
double _t_252_ = met1[i][j-1][k] * mu[i][j-1][k] * met2[i][j-1][k];
double _v_126_ = _t_252_ * _t_253_;
_v_127_ += c1 * _v_126_;
_t_206_ += _v_127_;
r1ic0jc0kc0 += _t_206_;

double _v_128_ = c2 * u2[i+2][j+2][k];
_v_128_ -= c2 * u2[i-2][j+2][k];
double _v_131_ = c2 * u2[i+2][j-2][k];
_v_131_ -= c2 * u2[i-2][j-2][k];
double _v_142_ = c2 * u2[i+2][j+2][k];
_v_142_ -= c2 * u2[i+2][j-2][k];
double _v_145_ = c2 * u2[i-2][j+2][k];
_v_145_ -= c2 * u2[i-2][j-2][k];
double _v_135_ = c2 * u2[i+2][j+1][k];
_v_135_ -= c2 * u2[i-2][j+1][k];
double _v_138_ = c2 * u2[i+2][j-1][k];
_v_138_ -= c2 * u2[i-2][j-1][k];
double _v_149_ = c2 * u2[i+1][j+2][k];
_v_149_ -= c2 * u2[i+1][j-2][k];
double _v_152_ = c2 * u2[i-1][j+2][k];
_v_152_ -= c2 * u2[i-1][j-2][k];
double _v_129_ = c1 * u2[i+1][j+2][k];
_v_129_ -= c1 * u2[i-1][j+2][k];
double _v_132_ = c1 * u2[i+1][j-2][k];
_v_132_ -= c1 * u2[i-1][j-2][k];
double _v_143_ = c1 * u2[i+2][j+1][k];
_v_143_ -= c1 * u2[i+2][j-1][k];
double _v_146_ = c1 * u2[i-2][j+1][k];
_v_146_ -= c1 * u2[i-2][j-1][k];
double _v_136_ = c1 * u2[i+1][j+1][k];
_v_136_ -= c1 * u2[i-1][j+1][k];
double _v_139_ = c1 * u2[i+1][j-1][k];
_v_139_ -= c1 * u2[i-1][j-1][k];
double _v_150_ = c1 * u2[i+1][j+1][k];
_v_150_ -= c1 * u2[i+1][j-1][k];
double _v_153_ = c1 * u2[i-1][j+1][k];
_v_153_ -= c1 * u2[i-1][j-1][k];
double _t_260_ = _v_128_;
_t_260_ += _v_129_;
double _t_259_ = met1[i][j+2][k] * mu[i][j+2][k] * met1[i][j+2][k];
double _v_130_ = _t_259_ * _t_260_;
double _v_134_ = c2 * _v_130_;
double _t_265_ = _v_131_;
_t_265_ += _v_132_;
double _t_264_ = met1[i][j-2][k] * mu[i][j-2][k] * met1[i][j-2][k];
double _v_133_ = _t_264_ * _t_265_;
_v_134_ += c2 * _v_133_;
double _t_257_ = _v_134_;
double _t_282_ = _v_142_;
_t_282_ += _v_143_;
double _v_144_ = _t_281_ * _t_282_;
double _v_148_ = c2 * _v_144_;
double _t_287_ = _v_145_;
_t_287_ += _v_146_;
double _v_147_ = _t_286_ * _t_287_;
_v_148_ += c2 * _v_147_;
_t_257_ += _v_148_;
double _t_271_ = _v_135_;
_t_271_ += _v_136_;
double _t_270_ = met1[i][j+1][k] * mu[i][j+1][k] * met1[i][j+1][k];
double _v_137_ = _t_270_ * _t_271_;
double _v_141_ = c1 * _v_137_;
double _t_276_ = _v_138_;
_t_276_ += _v_139_;
double _t_275_ = met1[i][j-1][k] * mu[i][j-1][k] * met1[i][j-1][k];
double _v_140_ = _t_275_ * _t_276_;
_v_141_ += c1 * _v_140_;
_t_257_ += _v_141_;
double _t_293_ = _v_149_;
_t_293_ += _v_150_;
double _v_151_ = _t_292_ * _t_293_;
double _v_155_ = c1 * _v_151_;
double _t_298_ = _v_152_;
_t_298_ += _v_153_;
double _v_154_ = _t_297_ * _t_298_;
_v_155_ += c1 * _v_154_;
_t_257_ += _v_155_;
r1ic0jc0kc0 += _t_257_;

r1[i][j][k] = r1ic0jc0kc0;

		} 
	}
}

extern "C" void host_code (double *h_r1, double *h_u1, double *h_u2, double *h_u3,  double *h_mu, double *h_la, double *h_met1, double *h_met2, double *h_met3, double *h_met4, double *h_strx, double *h_stry, double c1, double c2, int N) {
	double *r1;
	hipMalloc (&r1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for r1\n");
	hipMemcpy (r1, h_r1, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *u1;
	hipMalloc (&u1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u1\n");
	hipMemcpy (u1, h_u1, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *u2;
	hipMalloc (&u2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u2\n");
	hipMemcpy (u2, h_u2, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *u3;
	hipMalloc (&u3, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u3\n");
	hipMemcpy (u3, h_u3, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *mu;
	hipMalloc (&mu, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for mu\n");
	hipMemcpy (mu, h_mu, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *la;
	hipMalloc (&la, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for la\n");
	hipMemcpy (la, h_la, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *met1;
	hipMalloc (&met1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met1\n");
	hipMemcpy (met1, h_met1, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *met2;
	hipMalloc (&met2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met2\n");
	hipMemcpy (met2, h_met2, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *met3;
	hipMalloc (&met3, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met3\n");
	hipMemcpy (met3, h_met3, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *met4;
	hipMalloc (&met4, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met4\n");
	hipMemcpy (met4, h_met4, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *strx;
	hipMalloc (&strx, sizeof(double)*N);
	check_error ("Failed to allocate device memory for strx\n");
	hipMemcpy (strx, h_strx, sizeof(double)*N, hipMemcpyHostToDevice);
	double *stry;
	hipMalloc (&stry, sizeof(double)*N);
	check_error ("Failed to allocate device memory for stry\n");
	hipMemcpy (stry, h_stry, sizeof(double)*N, hipMemcpyHostToDevice);

	dim3 blockconfig (16, 1, 8);
	dim3 gridconfig (ceil(N, blockconfig.x), 1, ceil(N, blockconfig.z));

	curvi <<<gridconfig, blockconfig>>> (r1, u1, u2, u3, mu, la, met1, met2, met3, met4, strx, stry, c1, c2, N);
	hipMemcpy (h_r1, r1, sizeof(double)*N*N*N, hipMemcpyDeviceToHost);
}

	.text
	.file	"reordered-a.hip"
	.globl	_Z11check_errorPKc              # -- Begin function _Z11check_errorPKc
	.type	_Z11check_errorPKc,@function
_Z11check_errorPKc:                     # @_Z11check_errorPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB0_2:
	.cfi_def_cfa_offset 16
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$-1, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z11check_errorPKc, .Lfunc_end0-_Z11check_errorPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi # -- Begin function _Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.type	_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi,@function
_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi: # @_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$240, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	24(%rsp), %r9
	movsd	%xmm0, (%r9)
	leaq	16(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 88(%rbx)
	movq	%r9, 96(%rbx)
	movq	%r10, 104(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$256, %rsp                      # imm = 0x100
	.cfi_adjust_cfa_offset -256
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi, .Lfunc_end1-_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.cfi_endproc
                                        # -- End function
	.globl	host_code                       # -- Begin function host_code
	.type	host_code,@function
host_code:                              # @host_code
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movsd	%xmm1, 16(%rsp)                 # 8-byte Spill
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%r9, 48(%rsp)                   # 8-byte Spill
	movq	%r8, 40(%rsp)                   # 8-byte Spill
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movq	%rdx, 24(%rsp)                  # 8-byte Spill
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movslq	256(%rsp), %rbp
	leaq	(,%rbp,8), %r12
	movq	%rbp, %r14
	imulq	%rbp, %r14
	imulq	%r12, %r14
	movq	%rsp, %r13
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.1, %edi
	callq	_Z11check_errorPKc
	movq	(%r13), %rdi
	movq	%rbx, 56(%rsp)                  # 8-byte Spill
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	144(%rsp), %r13
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.2, %edi
	callq	_Z11check_errorPKc
	movq	(%r13), %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	136(%rsp), %r15
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.3, %edi
	callq	_Z11check_errorPKc
	movq	(%r15), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	128(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.4, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	120(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.5, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	112(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.6, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	104(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.7, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	208(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	96(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.8, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	216(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	88(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.9, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	224(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	80(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.10, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	232(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	72(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$.L.str.11, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	240(%rsp), %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	64(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$.L.str.12, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	248(%rsp), %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%ebp, %eax
	andl	$15, %eax
	movl	%ebp, %edi
	shrl	$4, %edi
	cmpl	$1, %eax
	sbbl	$-1, %edi
	movl	%ebp, %eax
	andl	$7, %eax
	movl	%ebp, %esi
	shrl	$3, %esi
	cmpl	$1, %eax
	sbbl	$-1, %esi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$16, %rdx
	movl	$8, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	(%rsp), %rdi
	movq	144(%rsp), %rsi
	movq	136(%rsp), %rdx
	movq	128(%rsp), %rcx
	movq	120(%rsp), %r8
	movq	112(%rsp), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	24(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	128(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	160(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB2_2:
	movq	(%rsp), %rsi
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	host_code, .Lfunc_end2-host_code
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error : %s, %s\n"
	.size	.L.str, 21

	.type	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi,@object # @_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.section	.rodata,"a",@progbits
	.globl	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.p2align	3, 0x0
_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi:
	.quad	_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.size	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Failed to allocate device memory for r1\n"
	.size	.L.str.1, 41

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to allocate device memory for u1\n"
	.size	.L.str.2, 41

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate device memory for u2\n"
	.size	.L.str.3, 41

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to allocate device memory for u3\n"
	.size	.L.str.4, 41

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to allocate device memory for mu\n"
	.size	.L.str.5, 41

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to allocate device memory for la\n"
	.size	.L.str.6, 41

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to allocate device memory for met1\n"
	.size	.L.str.7, 43

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Failed to allocate device memory for met2\n"
	.size	.L.str.8, 43

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to allocate device memory for met3\n"
	.size	.L.str.9, 43

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Failed to allocate device memory for met4\n"
	.size	.L.str.10, 43

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Failed to allocate device memory for strx\n"
	.size	.L.str.11, 43

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Failed to allocate device memory for stry\n"
	.size	.L.str.12, 43

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi"
	.size	.L__unnamed_1, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi ; -- Begin function _Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.globl	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.p2align	8
	.type	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi,@function
_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi:    ; @_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x84
	s_load_b32 s33, s[0:1], 0x70
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	s_mul_i32 s14, s14, s2
	s_mul_i32 s15, s15, s3
	s_max_i32 s2, s14, 0
	s_max_i32 s3, s15, 0
	v_add_nc_u32_e32 v6, s2, v1
	v_add_nc_u32_e32 v4, s3, v0
	s_add_i32 s2, s33, -3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v0, v6, v4
	v_max_i32_e32 v1, v4, v6
	v_cmp_lt_u32_e32 vcc_lo, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e64 s2, s2, v1
	s_and_b32 s2, s2, vcc_lo
	s_cmp_gt_i32 s33, 4
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b256 s[4:11], s[0:1], 0x50
	v_dual_mov_b32 v7, 0 :: v_dual_add_nc_u32 v10, 2, v4
	v_add_nc_u32_e32 v8, 2, v6
	v_add_nc_u32_e32 v11, -1, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_dual_mov_b32 v5, v7 :: v_dual_add_nc_u32 v12, 1, v4
	v_lshlrev_b64 v[28:29], 3, v[6:7]
	v_mad_u64_u32 v[30:31], null, 0xb4800, v10, 0
	v_mad_i64_i32 v[2:3], null, 0xb4800, v11, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[0:1], 3, v[4:5]
	v_add_co_u32 v18, vcc_lo, v28, -16
	v_add_co_ci_u32_e32 v20, vcc_lo, -1, v29, vcc_lo
	v_add_nc_u32_e32 v5, -2, v4
	v_add_co_u32 v16, vcc_lo, v28, -8
	v_add_co_ci_u32_e32 v17, vcc_lo, -1, v29, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_mad_i64_i32 v[32:33], null, 0xb4800, v5, 0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v11, vcc_lo, v2, v28
	v_dual_mov_b32 v9, v7 :: v_dual_add_nc_u32 v6, 1, v6
	v_mad_u64_u32 v[34:35], null, 0xb4800, v12, 0
	v_add_co_ci_u32_e32 v10, vcc_lo, v3, v29, vcc_lo
	v_add_co_u32 v21, vcc_lo, v30, v28
	v_mad_u64_u32 v[36:37], null, 0xb4800, v4, 0
	v_add_co_ci_u32_e32 v19, vcc_lo, v31, v29, vcc_lo
	v_add_co_u32 v15, vcc_lo, v32, v28
	v_lshlrev_b64 v[4:5], 3, v[8:9]
	v_add_co_ci_u32_e32 v14, vcc_lo, v33, v29, vcc_lo
	v_add_co_u32 v13, vcc_lo, v34, v28
	v_add_co_ci_u32_e32 v12, vcc_lo, v35, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_co_u32 v23, vcc_lo, v36, v4
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_add_co_ci_u32_e32 v22, vcc_lo, v37, v5, vcc_lo
	v_add_co_u32 v27, vcc_lo, v36, v18
	v_add_co_ci_u32_e32 v25, vcc_lo, v37, v20, vcc_lo
	v_add_co_u32 v26, vcc_lo, v36, v6
	v_add_co_ci_u32_e32 v24, vcc_lo, v37, v7, vcc_lo
	v_add_co_u32 v9, vcc_lo, v36, v28
	v_add_co_ci_u32_e32 v8, vcc_lo, v37, v29, vcc_lo
	v_add_co_u32 v29, vcc_lo, v36, v16
	v_add_co_ci_u32_e32 v28, vcc_lo, v37, v17, vcc_lo
	v_add_co_u32 v36, vcc_lo, v30, v4
	v_add_co_ci_u32_e32 v37, vcc_lo, v31, v5, vcc_lo
	v_add_co_u32 v40, vcc_lo, v30, v18
	v_add_co_ci_u32_e32 v41, vcc_lo, v31, v20, vcc_lo
	v_add_co_u32 v42, vcc_lo, v30, v6
	v_add_co_ci_u32_e32 v43, vcc_lo, v31, v7, vcc_lo
	v_add_co_u32 v30, vcc_lo, v30, v16
	v_add_co_ci_u32_e32 v31, vcc_lo, v31, v17, vcc_lo
	v_add_co_u32 v44, vcc_lo, v32, v4
	v_add_co_ci_u32_e32 v45, vcc_lo, v33, v5, vcc_lo
	v_add_co_u32 v46, vcc_lo, v32, v18
	v_add_co_ci_u32_e32 v47, vcc_lo, v33, v20, vcc_lo
	v_add_co_u32 v48, vcc_lo, v32, v6
	v_add_co_ci_u32_e32 v49, vcc_lo, v33, v7, vcc_lo
	v_add_co_u32 v32, vcc_lo, v32, v16
	v_add_co_ci_u32_e32 v33, vcc_lo, v33, v17, vcc_lo
	v_add_co_u32 v50, vcc_lo, v34, v4
	v_add_co_ci_u32_e32 v51, vcc_lo, v35, v5, vcc_lo
	v_add_co_u32 v52, vcc_lo, v34, v18
	v_add_co_ci_u32_e32 v53, vcc_lo, v35, v20, vcc_lo
	v_add_co_u32 v54, vcc_lo, v34, v6
	v_add_co_ci_u32_e32 v55, vcc_lo, v35, v7, vcc_lo
	v_add_co_u32 v34, vcc_lo, v34, v16
	v_add_co_ci_u32_e32 v35, vcc_lo, v35, v17, vcc_lo
	v_add_co_u32 v4, vcc_lo, v2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, v3, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v7, vcc_lo
	v_add_co_u32 v18, vcc_lo, v2, v18
	v_add_co_ci_u32_e32 v20, vcc_lo, v3, v20, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, v16
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v17, vcc_lo
	s_clause 0x2
	s_load_b256 s[20:27], s[0:1], 0x0
	s_load_b128 s[28:31], s[0:1], 0x40
	s_load_b256 s[12:19], s[0:1], 0x20
	global_load_b64 v[16:17], v[0:1], off offset:16
	s_add_u32 s34, s6, 16
	s_addc_u32 s35, s7, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v173, s5, s24, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v174, s5, s25, v8, s5
	s_waitcnt vmcnt(0)
	scratch_store_b64 off, v[16:17], off offset:4 ; 8-byte Folded Spill
	s_clause 0x1
	global_load_b64 v[38:39], v[0:1], off
	global_load_b64 v[0:1], v[0:1], off offset:-16
	s_waitcnt vmcnt(0)
	scratch_store_b64 off, v[0:1], off offset:12 ; 8-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v23
	scratch_store_b32 off, v0, off offset:20 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s22, v23
	scratch_store_b32 off, v0, off offset:24 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s0, s23, v22, s0
	scratch_store_b32 off, v0, off offset:28 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v22, vcc_lo
	scratch_store_b32 off, v0, off offset:32 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v27
	scratch_store_b32 off, v0, off offset:36 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s22, v27
	scratch_store_b32 off, v0, off offset:40 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s0, s23, v25, s0
	scratch_store_b32 off, v0, off offset:44 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v25, vcc_lo
	scratch_store_b32 off, v0, off offset:48 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v26
	scratch_store_b32 off, v0, off offset:52 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s22, v26
	scratch_store_b32 off, v0, off offset:56 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s0, s23, v24, s0
	scratch_store_b32 off, v0, off offset:60 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v24, vcc_lo
	scratch_store_b32 off, v0, off offset:64 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v29
	scratch_store_b32 off, v0, off offset:68 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s22, v29
	scratch_store_b32 off, v0, off offset:72 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s0, s23, v28, s0
	scratch_store_b32 off, v0, off offset:76 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v28, vcc_lo
	scratch_store_b32 off, v0, off offset:80 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, 0x1308, v9
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v16, vcc_lo, s30, v0
	v_add_co_u32 v0, s0, s14, v0
	s_clause 0x1
	scratch_store_b32 off, v16, off offset:84
	scratch_store_b32 off, v0, off offset:88
	v_add_co_ci_u32_e64 v0, s0, s15, v1, s0
	scratch_store_b32 off, v0, off offset:92 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s31, v1, vcc_lo
	v_add_co_u32 v1, s0, s24, v21
	scratch_store_b32 off, v0, off offset:96 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, 0x1300, v21
	scratch_store_b32 off, v1, off offset:100 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v1, s0, s25, v19, s0
	scratch_store_b32 off, v1, off offset:104 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v19, vcc_lo
	v_add_co_u32 v16, vcc_lo, 0x1300, v36
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v37, vcc_lo
	v_add_co_u32 v19, vcc_lo, 0x1300, v40
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v41, vcc_lo
	v_add_co_u32 v22, vcc_lo, 0x1300, v42
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v43, vcc_lo
	v_add_co_u32 v24, vcc_lo, 0x1300, v30
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v31, vcc_lo
	v_add_co_u32 v26, vcc_lo, s24, v16
	scratch_store_b32 off, v26, off offset:108 ; 4-byte Folded Spill
	v_add_co_u32 v26, s0, s26, v16
	v_add_co_u32 v16, s1, s22, v16
	s_clause 0x1
	scratch_store_b32 off, v26, off offset:112
	scratch_store_b32 off, v16, off offset:116
	v_add_co_ci_u32_e64 v16, s1, s23, v17, s1
	scratch_store_b32 off, v16, off offset:120 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v16, vcc_lo, s25, v17, vcc_lo
	scratch_store_b32 off, v16, off offset:124 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v16, vcc_lo, s27, v17, s0
	scratch_store_b32 off, v16, off offset:128 ; 4-byte Folded Spill
	v_add_co_u32 v16, vcc_lo, s24, v19
	scratch_store_b32 off, v16, off offset:132 ; 4-byte Folded Spill
	v_add_co_u32 v16, s0, s26, v19
	scratch_store_b32 off, v16, off offset:136 ; 4-byte Folded Spill
	v_add_co_u32 v16, s1, s22, v19
	scratch_store_b32 off, v16, off offset:140 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v16, s1, s23, v21, s1
	scratch_store_b32 off, v16, off offset:144 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v16, vcc_lo, s25, v21, vcc_lo
	scratch_store_b32 off, v16, off offset:148 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v16, vcc_lo, s27, v21, s0
	scratch_store_b32 off, v16, off offset:152 ; 4-byte Folded Spill
	v_add_co_u32 v16, vcc_lo, s24, v22
	scratch_store_b32 off, v16, off offset:156 ; 4-byte Folded Spill
	v_add_co_u32 v16, s0, s26, v22
	scratch_store_b32 off, v16, off offset:160 ; 4-byte Folded Spill
	v_add_co_u32 v16, s1, s22, v22
	scratch_store_b32 off, v16, off offset:164 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v16, s1, s23, v23, s1
	scratch_store_b32 off, v16, off offset:168 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v16, vcc_lo, s25, v23, vcc_lo
	scratch_store_b32 off, v16, off offset:172 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v16, vcc_lo, s27, v23, s0
	scratch_store_b32 off, v16, off offset:176 ; 4-byte Folded Spill
	v_add_co_u32 v16, vcc_lo, s24, v24
	scratch_store_b32 off, v16, off offset:180 ; 4-byte Folded Spill
	v_add_co_u32 v16, s0, s26, v24
	scratch_store_b32 off, v16, off offset:184 ; 4-byte Folded Spill
	v_add_co_u32 v16, s1, s22, v24
	scratch_store_b32 off, v16, off offset:188 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v16, s1, s23, v25, s1
	scratch_store_b32 off, v16, off offset:192 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v16, vcc_lo, s25, v25, vcc_lo
	scratch_store_b32 off, v16, off offset:196 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v16, vcc_lo, s27, v25, s0
	scratch_store_b32 off, v16, off offset:200 ; 4-byte Folded Spill
	v_add_co_u32 v16, vcc_lo, s14, v0
	scratch_store_b32 off, v16, off offset:204 ; 4-byte Folded Spill
	v_add_co_u32 v16, s0, s16, v0
	scratch_store_b32 off, v16, off offset:208 ; 4-byte Folded Spill
	v_add_co_u32 v16, s1, s18, v0
	scratch_store_b32 off, v16, off offset:212 ; 4-byte Folded Spill
	v_add_co_u32 v16, s2, s28, v0
	scratch_store_b32 off, v16, off offset:216 ; 4-byte Folded Spill
	v_add_co_u32 v16, s3, s30, v0
	v_add_co_u32 v0, s4, s12, v0
	s_clause 0x1
	scratch_store_b32 off, v16, off offset:220
	scratch_store_b32 off, v0, off offset:224
	v_add_co_ci_u32_e64 v0, s4, s13, v1, s4
	scratch_store_b32 off, v0, off offset:228 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s15, v1, vcc_lo
	scratch_store_b32 off, v0, off offset:232 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s17, v1, s0
	scratch_store_b32 off, v0, off offset:236 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s19, v1, s1
	scratch_store_b32 off, v0, off offset:240 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s29, v1, s2
	scratch_store_b32 off, v0, off offset:244 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s31, v1, s3
	v_add_co_u32 v1, s0, s24, v15
	scratch_store_b32 off, v0, off offset:248 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, 0x1300, v15
	scratch_store_b32 off, v1, off offset:252 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v1, s0, s25, v14, s0
	scratch_store_b32 off, v1, off offset:256 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v14, vcc_lo
	v_add_co_u32 v14, vcc_lo, 0x1300, v44
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v45, vcc_lo
	v_add_co_u32 v16, vcc_lo, 0x1300, v46
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v47, vcc_lo
	v_add_co_u32 v19, vcc_lo, 0x1300, v48
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v49, vcc_lo
	v_add_co_u32 v22, vcc_lo, 0x1300, v32
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v33, vcc_lo
	v_add_co_u32 v24, vcc_lo, s24, v14
	scratch_store_b32 off, v24, off offset:260 ; 4-byte Folded Spill
	v_add_co_u32 v24, s0, s26, v14
	v_add_co_u32 v14, s1, s22, v14
	s_clause 0x1
	scratch_store_b32 off, v24, off offset:264
	scratch_store_b32 off, v14, off offset:268
	v_add_co_ci_u32_e64 v14, s1, s23, v15, s1
	scratch_store_b32 off, v14, off offset:272 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v14, vcc_lo, s25, v15, vcc_lo
	scratch_store_b32 off, v14, off offset:276 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v14, vcc_lo, s27, v15, s0
	scratch_store_b32 off, v14, off offset:280 ; 4-byte Folded Spill
	v_add_co_u32 v14, vcc_lo, s24, v16
	scratch_store_b32 off, v14, off offset:284 ; 4-byte Folded Spill
	v_add_co_u32 v14, s0, s26, v16
	scratch_store_b32 off, v14, off offset:288 ; 4-byte Folded Spill
	v_add_co_u32 v14, s1, s22, v16
	scratch_store_b32 off, v14, off offset:292 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v14, s1, s23, v17, s1
	scratch_store_b32 off, v14, off offset:296 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v14, vcc_lo, s25, v17, vcc_lo
	scratch_store_b32 off, v14, off offset:300 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v14, vcc_lo, s27, v17, s0
	scratch_store_b32 off, v14, off offset:304 ; 4-byte Folded Spill
	v_add_co_u32 v14, vcc_lo, s24, v19
	scratch_store_b32 off, v14, off offset:308 ; 4-byte Folded Spill
	v_add_co_u32 v14, s0, s26, v19
	scratch_store_b32 off, v14, off offset:312 ; 4-byte Folded Spill
	v_add_co_u32 v14, s1, s22, v19
	scratch_store_b32 off, v14, off offset:316 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v14, s1, s23, v21, s1
	scratch_store_b32 off, v14, off offset:320 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v14, vcc_lo, s25, v21, vcc_lo
	scratch_store_b32 off, v14, off offset:324 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v14, vcc_lo, s27, v21, s0
	scratch_store_b32 off, v14, off offset:328 ; 4-byte Folded Spill
	v_add_co_u32 v14, vcc_lo, s24, v22
	scratch_store_b32 off, v14, off offset:332 ; 4-byte Folded Spill
	v_add_co_u32 v14, s0, s26, v22
	scratch_store_b32 off, v14, off offset:336 ; 4-byte Folded Spill
	v_add_co_u32 v14, s1, s22, v22
	scratch_store_b32 off, v14, off offset:340 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v14, s1, s23, v23, s1
	scratch_store_b32 off, v14, off offset:344 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v14, vcc_lo, s25, v23, vcc_lo
	scratch_store_b32 off, v14, off offset:348 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v14, vcc_lo, s27, v23, s0
	scratch_store_b32 off, v14, off offset:352 ; 4-byte Folded Spill
	v_add_co_u32 v14, vcc_lo, s14, v0
	scratch_store_b32 off, v14, off offset:356 ; 4-byte Folded Spill
	v_add_co_u32 v14, s0, s16, v0
	scratch_store_b32 off, v14, off offset:360 ; 4-byte Folded Spill
	v_add_co_u32 v14, s1, s18, v0
	scratch_store_b32 off, v14, off offset:364 ; 4-byte Folded Spill
	v_add_co_u32 v14, s2, s28, v0
	scratch_store_b32 off, v14, off offset:368 ; 4-byte Folded Spill
	v_add_co_u32 v14, s3, s30, v0
	v_add_co_u32 v0, s4, s12, v0
	s_clause 0x1
	scratch_store_b32 off, v14, off offset:372
	scratch_store_b32 off, v0, off offset:376
	v_add_co_ci_u32_e64 v0, s4, s13, v1, s4
	scratch_store_b32 off, v0, off offset:380 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s15, v1, vcc_lo
	scratch_store_b32 off, v0, off offset:384 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s17, v1, s0
	scratch_store_b32 off, v0, off offset:388 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s19, v1, s1
	scratch_store_b32 off, v0, off offset:392 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s29, v1, s2
	scratch_store_b32 off, v0, off offset:396 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s31, v1, s3
	v_add_co_u32 v1, s0, s24, v13
	scratch_store_b32 off, v0, off offset:400 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, 0x1300, v13
	scratch_store_b32 off, v1, off offset:404 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v1, s0, s25, v12, s0
	v_add_co_u32 v133, s2, s28, v0
	v_add_co_u32 v134, s3, s30, v0
	scratch_store_b32 off, v1, off offset:408 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v12, vcc_lo
	v_add_co_u32 v12, vcc_lo, 0x1300, v50
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v51, vcc_lo
	v_add_co_u32 v14, vcc_lo, 0x1300, v52
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v53, vcc_lo
	v_add_co_u32 v16, vcc_lo, 0x1300, v54
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v55, vcc_lo
	v_add_co_u32 v19, vcc_lo, 0x1300, v34
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v35, vcc_lo
	v_add_co_u32 v22, vcc_lo, s24, v12
	v_add_co_u32 v108, s1, s22, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v109, s1, s23, v13, s1
	scratch_store_b32 off, v22, off offset:412 ; 4-byte Folded Spill
	v_add_co_u32 v22, s0, s26, v12
	v_add_co_ci_u32_e32 v110, vcc_lo, s25, v13, vcc_lo
	v_add_co_ci_u32_e64 v111, vcc_lo, s27, v13, s0
	v_add_co_u32 v112, vcc_lo, s24, v14
	v_add_co_u32 v113, s0, s26, v14
	v_add_co_u32 v114, s1, s22, v14
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v115, s1, s23, v15, s1
	v_add_co_ci_u32_e32 v116, vcc_lo, s25, v15, vcc_lo
	v_add_co_ci_u32_e64 v117, vcc_lo, s27, v15, s0
	v_add_co_u32 v118, vcc_lo, s24, v16
	v_add_co_u32 v119, s0, s26, v16
	v_add_co_u32 v120, s1, s22, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v121, s1, s23, v17, s1
	v_add_co_ci_u32_e32 v122, vcc_lo, s25, v17, vcc_lo
	v_add_co_ci_u32_e64 v123, vcc_lo, s27, v17, s0
	v_add_co_u32 v124, vcc_lo, s24, v19
	v_add_co_u32 v125, s0, s26, v19
	v_add_co_u32 v126, s1, s22, v19
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v127, s1, s23, v21, s1
	v_add_co_ci_u32_e32 v128, vcc_lo, s25, v21, vcc_lo
	v_add_co_ci_u32_e64 v129, vcc_lo, s27, v21, s0
	v_add_co_u32 v130, vcc_lo, s14, v0
	v_add_co_u32 v131, s0, s16, v0
	v_add_co_u32 v132, s1, s18, v0
	v_add_co_ci_u32_e32 v137, vcc_lo, s15, v1, vcc_lo
	v_add_co_ci_u32_e64 v138, vcc_lo, s17, v1, s0
	v_add_co_ci_u32_e64 v139, vcc_lo, s19, v1, s1
	v_add_co_ci_u32_e64 v140, vcc_lo, s29, v1, s2
	v_add_co_ci_u32_e64 v141, vcc_lo, s31, v1, s3
	v_add_co_u32 v135, s4, s12, v0
	v_add_co_u32 v0, vcc_lo, 0x1300, v11
	v_add_co_ci_u32_e64 v136, s4, s13, v1, s4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v10, vcc_lo
	v_add_co_u32 v4, vcc_lo, 0x1300, v4
	v_add_co_u32 v142, s0, s24, v11
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	v_add_co_ci_u32_e64 v143, s0, s25, v10, s0
	v_add_co_u32 v10, vcc_lo, 0x1300, v18
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v20, vcc_lo
	v_add_co_u32 v6, vcc_lo, 0x1300, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_add_co_u32 v2, vcc_lo, 0x1300, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v144, vcc_lo, s24, v4
	v_add_co_u32 v145, s0, s26, v4
	v_add_co_u32 v146, s1, s22, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v147, s1, s23, v5, s1
	v_add_co_ci_u32_e32 v148, vcc_lo, s25, v5, vcc_lo
	v_add_co_ci_u32_e64 v149, vcc_lo, s27, v5, s0
	v_add_co_u32 v150, vcc_lo, s24, v10
	v_add_co_u32 v151, s0, s26, v10
	v_add_co_u32 v152, s1, s22, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v153, s1, s23, v11, s1
	v_add_co_ci_u32_e32 v154, vcc_lo, s25, v11, vcc_lo
	v_add_co_ci_u32_e64 v155, vcc_lo, s27, v11, s0
	v_add_co_u32 v156, vcc_lo, s24, v6
	v_add_co_u32 v157, s0, s26, v6
	v_add_co_u32 v158, s1, s22, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v159, s1, s23, v7, s1
	v_add_co_ci_u32_e32 v160, vcc_lo, s25, v7, vcc_lo
	v_add_co_ci_u32_e64 v161, vcc_lo, s27, v7, s0
	v_add_co_u32 v162, vcc_lo, s24, v2
	v_add_co_u32 v163, s0, s26, v2
	v_add_co_u32 v164, s1, s22, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v165, s1, s23, v3, s1
	v_add_co_ci_u32_e32 v166, vcc_lo, s25, v3, vcc_lo
	v_add_co_ci_u32_e64 v167, vcc_lo, s27, v3, s0
	v_add_co_u32 v168, vcc_lo, s22, v9
	v_add_co_u32 v169, s0, s18, v9
	v_add_co_u32 v170, s1, s28, v9
	v_add_co_u32 v171, s2, s12, v9
	v_add_co_u32 v172, s3, s16, v9
	v_add_co_u32 v2, s4, v9, s20
	v_add_co_ci_u32_e32 v175, vcc_lo, s23, v8, vcc_lo
	v_add_co_ci_u32_e64 v176, vcc_lo, s19, v8, s0
	v_add_co_ci_u32_e64 v177, vcc_lo, s29, v8, s1
	v_add_co_ci_u32_e64 v178, vcc_lo, s13, v8, s2
	v_add_co_ci_u32_e64 v179, vcc_lo, s17, v8, s3
	v_add_co_ci_u32_e64 v3, vcc_lo, s21, v8, s4
	v_add_co_u32 v180, vcc_lo, s14, v0
	v_add_co_u32 v181, s0, s16, v0
	v_add_co_u32 v182, s1, s18, v0
	v_add_co_u32 v183, s2, s28, v0
	v_add_co_u32 v184, s3, s30, v0
	v_add_co_ci_u32_e32 v187, vcc_lo, s15, v1, vcc_lo
	v_add_co_ci_u32_e64 v188, vcc_lo, s17, v1, s0
	v_add_co_ci_u32_e64 v189, vcc_lo, s19, v1, s1
	v_add_co_ci_u32_e64 v190, vcc_lo, s29, v1, s2
	v_add_co_ci_u32_e64 v191, vcc_lo, s31, v1, s3
	v_add_co_u32 v185, s4, s12, v0
	v_add_co_u32 v36, vcc_lo, 0x1300, v2
	v_add_co_ci_u32_e64 v186, s4, s13, v1, s4
	v_add_co_ci_u32_e32 v37, vcc_lo, 0, v3, vcc_lo
	s_add_i32 s16, s33, -4
	s_mov_b64 s[12:13], 0
	scratch_store_b32 off, v22, off offset:416 ; 4-byte Folded Spill
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_clause 0x1
	scratch_load_b32 v0, off, off offset:224
	scratch_load_b32 v1, off, off offset:228
	s_add_u32 s0, s34, -16
	s_addc_u32 s1, s35, -1
	s_waitcnt vmcnt(1)
	v_add_co_u32 v0, vcc_lo, v0, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_clause 0x7
	scratch_load_b32 v2, off, off offset:204
	scratch_load_b32 v3, off, off offset:232
	scratch_load_b32 v5, off, off offset:236
	scratch_load_b32 v7, off, off offset:240
	scratch_load_b32 v4, off, off offset:208
	scratch_load_b32 v6, off, off offset:212
	scratch_load_b32 v10, off, off offset:164
	scratch_load_b32 v11, off, off offset:168
	s_waitcnt vmcnt(7)
	v_add_co_u32 v2, vcc_lo, v2, s12
	s_waitcnt vmcnt(6)
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	s_waitcnt vmcnt(3)
	v_add_co_u32 v4, vcc_lo, v4, s12
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(3)
	v_add_co_u32 v6, vcc_lo, v6, s12
	global_load_b64 v[4:5], v[4:5], off
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	global_load_b64 v[6:7], v[6:7], off
	s_waitcnt vmcnt(2)
	v_fma_f64 v[0:1], v[0:1], 2.0, v[2:3]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[2:3], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[0:1], v[4:5], v[0:1]
	v_mul_f64 v[48:49], v[4:5], v[2:3]
	s_clause 0x1
	scratch_load_b32 v4, off, off offset:116
	scratch_load_b32 v5, off, off offset:120
	s_waitcnt vmcnt(2)
	v_mul_f64 v[0:1], v[0:1], v[6:7]
	s_clause 0x1
	scratch_load_b32 v6, off, off offset:140
	scratch_load_b32 v7, off, off offset:144
	v_mul_f64 v[0:1], v[0:1], v[38:39]
	s_waitcnt vmcnt(3)
	v_add_co_u32 v4, vcc_lo, v4, s12
	s_waitcnt vmcnt(2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v6, s12
	s_waitcnt vmcnt(1)
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	v_add_co_u32 v10, vcc_lo, v10, s12
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v11, vcc_lo
	s_clause 0x1
	global_load_b64 v[6:7], v[6:7], off
	global_load_b64 v[10:11], v[10:11], off
	s_clause 0x3
	scratch_load_b32 v12, off, off offset:188
	scratch_load_b32 v13, off, off offset:192
	scratch_load_b32 v18, off, off offset:156
	scratch_load_b32 v19, off, off offset:172
	s_waitcnt vmcnt(6)
	v_mul_f64 v[4:5], v[4:5], s[10:11]
	s_waitcnt vmcnt(5)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[6:7], s[10:11], v[4:5]
	s_waitcnt vmcnt(3)
	v_add_co_u32 v12, vcc_lo, v12, s12
	s_waitcnt vmcnt(2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v13, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[12:13], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[10:11], s[8:9], -v[14:15]
	v_add_f64 v[8:9], v[8:9], v[14:15]
	s_clause 0x1
	scratch_load_b32 v14, off, off offset:132
	scratch_load_b32 v15, off, off offset:148
	v_mul_f64 v[0:1], v[0:1], v[8:9]
	s_clause 0x1
	scratch_load_b32 v8, off, off offset:108
	scratch_load_b32 v9, off, off offset:124
	s_waitcnt vmcnt(1)
	v_add_co_u32 v8, vcc_lo, v8, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v9, vcc_lo
	v_add_co_u32 v14, vcc_lo, v14, s12
	v_add_co_ci_u32_e32 v15, vcc_lo, s13, v15, vcc_lo
	v_add_co_u32 v18, vcc_lo, v18, s12
	v_add_co_ci_u32_e32 v19, vcc_lo, s13, v19, vcc_lo
	s_clause 0x2
	global_load_b64 v[8:9], v[8:9], off
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[18:19], v[18:19], off
	s_clause 0x1
	scratch_load_b32 v20, off, off offset:180
	scratch_load_b32 v21, off, off offset:196
	s_waitcnt vmcnt(4)
	v_mul_f64 v[8:9], v[8:9], s[10:11]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v20, vcc_lo, v20, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v21, vcc_lo, s13, v21, vcc_lo
	global_load_b64 v[20:21], v[20:21], off
	v_fma_f64 v[16:17], -v[14:15], s[10:11], v[8:9]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[22:23], v[20:21], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[18:19], s[8:9], -v[22:23]
	v_add_f64 v[16:17], v[16:17], v[22:23]
	s_clause 0x1
	scratch_load_b32 v22, off, off offset:216
	scratch_load_b32 v23, off, off offset:244
	s_waitcnt vmcnt(1)
	v_add_co_u32 v22, vcc_lo, v22, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v23, vcc_lo, s13, v23, vcc_lo
	global_load_b64 v[22:23], v[22:23], off
	s_clause 0x1
	s_load_b256 s[0:7], s[0:1], 0x0
	s_load_b64 s[14:15], s[34:35], 0x10
	s_add_u32 s34, s34, 8
	s_addc_u32 s35, s35, 0
	s_clause 0x1
	scratch_load_b32 v26, off, off offset:160
	scratch_load_b32 v27, off, off offset:176
	s_waitcnt vmcnt(2)
	v_mul_f64 v[22:23], v[2:3], v[22:23]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[22:23], s[4:5], v[22:23]
	v_mul_f64 v[16:17], v[22:23], v[16:17]
	s_clause 0x1
	scratch_load_b32 v22, off, off offset:136
	scratch_load_b32 v23, off, off offset:152
	v_mul_f64 v[16:17], v[16:17], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], v[0:1], s[10:11], v[16:17]
	s_clause 0x1
	scratch_load_b32 v16, off, off offset:112
	scratch_load_b32 v17, off, off offset:128
	s_waitcnt vmcnt(1)
	v_add_co_u32 v16, vcc_lo, v16, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v17, vcc_lo, s13, v17, vcc_lo
	v_add_co_u32 v22, vcc_lo, v22, s12
	v_add_co_ci_u32_e32 v23, vcc_lo, s13, v23, vcc_lo
	v_add_co_u32 v26, vcc_lo, v26, s12
	v_add_co_ci_u32_e32 v27, vcc_lo, s13, v27, vcc_lo
	s_clause 0x2
	global_load_b64 v[16:17], v[16:17], off
	global_load_b64 v[22:23], v[22:23], off
	global_load_b64 v[26:27], v[26:27], off
	s_clause 0x1
	scratch_load_b32 v28, off, off offset:184
	scratch_load_b32 v29, off, off offset:200
	s_waitcnt vmcnt(4)
	v_mul_f64 v[16:17], v[16:17], s[10:11]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v28, vcc_lo, v28, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v29, vcc_lo, s13, v29, vcc_lo
	global_load_b64 v[28:29], v[28:29], off
	v_fma_f64 v[24:25], -v[22:23], s[10:11], v[16:17]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[30:31], v[28:29], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[30:31], v[26:27], s[8:9], -v[30:31]
	v_add_f64 v[24:25], v[24:25], v[30:31]
	s_clause 0x1
	scratch_load_b32 v30, off, off offset:220
	scratch_load_b32 v31, off, off offset:248
	s_waitcnt vmcnt(1)
	v_add_co_u32 v30, vcc_lo, v30, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v31, vcc_lo, s13, v31, vcc_lo
	global_load_b64 v[30:31], v[30:31], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[2:3], v[2:3], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], v[24:25]
	v_fma_f64 v[24:25], v[2:3], s[10:11], v[0:1]
	s_clause 0x1
	scratch_load_b32 v0, off, off offset:376
	scratch_load_b32 v1, off, off offset:380
	s_waitcnt vmcnt(1)
	v_add_co_u32 v0, vcc_lo, v0, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_clause 0x5
	scratch_load_b32 v2, off, off offset:356
	scratch_load_b32 v3, off, off offset:384
	scratch_load_b32 v31, off, off offset:388
	scratch_load_b32 v33, off, off offset:392
	scratch_load_b32 v30, off, off offset:360
	scratch_load_b32 v32, off, off offset:364
	s_waitcnt vmcnt(5)
	v_add_co_u32 v2, vcc_lo, v2, s12
	s_waitcnt vmcnt(4)
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	s_waitcnt vmcnt(1)
	v_add_co_u32 v30, vcc_lo, v30, s12
	v_add_co_ci_u32_e32 v31, vcc_lo, s13, v31, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v32, vcc_lo, v32, s12
	global_load_b64 v[30:31], v[30:31], off
	v_add_co_ci_u32_e32 v33, vcc_lo, s13, v33, vcc_lo
	global_load_b64 v[32:33], v[32:33], off
	s_waitcnt vmcnt(2)
	v_fma_f64 v[0:1], v[0:1], 2.0, v[2:3]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[34:35], v[2:3], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[0:1], v[30:31], v[0:1]
	v_mul_f64 v[50:51], v[30:31], v[34:35]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[32:33], v[0:1], v[32:33]
	s_clause 0x1
	scratch_load_b32 v0, off, off offset:268
	scratch_load_b32 v1, off, off offset:272
	v_mul_f64 v[32:33], v[38:39], v[32:33]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v0, vcc_lo, v0, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[2:3], -v[0:1], s[10:11], v[4:5]
	s_clause 0x1
	scratch_load_b32 v4, off, off offset:292
	scratch_load_b32 v5, off, off offset:296
	s_waitcnt vmcnt(1)
	v_add_co_u32 v4, vcc_lo, v4, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[4:5], v[4:5], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[30:31], v[0:1], s[10:11], -v[4:5]
	v_fma_f64 v[0:1], v[6:7], s[10:11], -v[4:5]
	s_clause 0x1
	scratch_load_b32 v4, off, off offset:316
	scratch_load_b32 v5, off, off offset:320
	s_waitcnt vmcnt(1)
	v_add_co_u32 v4, vcc_lo, v4, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	s_clause 0x1
	scratch_load_b32 v6, off, off offset:340
	scratch_load_b32 v7, off, off offset:344
	s_waitcnt vmcnt(1)
	v_add_co_u32 v6, vcc_lo, v6, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	global_load_b64 v[6:7], v[6:7], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[42:43], v[6:7], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[4:5], s[8:9], -v[42:43]
	v_mul_f64 v[4:5], v[4:5], s[10:11]
	v_add_f64 v[30:31], v[30:31], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[76:77], v[10:11], s[10:11], -v[4:5]
	v_mul_f64 v[4:5], v[6:7], s[10:11]
	v_mul_f64 v[30:31], v[32:33], v[30:31]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[72:73], v[12:13], s[10:11], -v[4:5]
	s_clause 0x1
	scratch_load_b32 v4, off, off offset:260
	scratch_load_b32 v5, off, off offset:276
	v_fma_f64 v[10:11], v[30:31], s[10:11], v[24:25]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v4, vcc_lo, v4, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[6:7], -v[4:5], s[10:11], v[8:9]
	s_clause 0x1
	scratch_load_b32 v8, off, off offset:284
	scratch_load_b32 v9, off, off offset:300
	s_waitcnt vmcnt(1)
	v_add_co_u32 v8, vcc_lo, v8, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v9, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[8:9], v[8:9], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], v[4:5], s[10:11], -v[8:9]
	v_fma_f64 v[4:5], v[14:15], s[10:11], -v[8:9]
	s_clause 0x1
	scratch_load_b32 v8, off, off offset:308
	scratch_load_b32 v9, off, off offset:324
	s_waitcnt vmcnt(1)
	v_add_co_u32 v8, vcc_lo, v8, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v9, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	s_clause 0x1
	scratch_load_b32 v14, off, off offset:332
	scratch_load_b32 v15, off, off offset:348
	s_waitcnt vmcnt(1)
	v_add_co_u32 v14, vcc_lo, v14, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v15, vcc_lo, s13, v15, vcc_lo
	global_load_b64 v[14:15], v[14:15], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[24:25], v[14:15], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[8:9], s[8:9], -v[24:25]
	v_mul_f64 v[8:9], v[8:9], s[10:11]
	v_add_f64 v[12:13], v[12:13], v[24:25]
	s_clause 0x1
	scratch_load_b32 v24, off, off offset:368
	scratch_load_b32 v25, off, off offset:396
	v_fma_f64 v[74:75], v[18:19], s[10:11], -v[8:9]
	v_mul_f64 v[8:9], v[14:15], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[70:71], v[20:21], s[10:11], -v[8:9]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v24, vcc_lo, v24, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v25, vcc_lo, s13, v25, vcc_lo
	global_load_b64 v[24:25], v[24:25], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[24:25], v[34:35], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], s[4:5], v[24:25]
	v_mul_f64 v[12:13], v[24:25], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[8:9], v[12:13], s[10:11], v[10:11]
	s_clause 0x3
	scratch_load_b32 v10, off, off offset:264
	scratch_load_b32 v11, off, off offset:280
	scratch_load_b32 v12, off, off offset:288
	scratch_load_b32 v13, off, off offset:304
	s_waitcnt vmcnt(3)
	v_add_co_u32 v10, vcc_lo, v10, s12
	s_waitcnt vmcnt(2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v11, vcc_lo
	s_waitcnt vmcnt(1)
	v_add_co_u32 v12, vcc_lo, v12, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v13, vcc_lo
	s_clause 0x1
	global_load_b64 v[10:11], v[10:11], off
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt vmcnt(1)
	v_fma_f64 v[18:19], -v[10:11], s[10:11], v[16:17]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[12:13], v[12:13], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[10:11], v[10:11], s[10:11], -v[12:13]
	v_fma_f64 v[90:91], v[22:23], s[10:11], -v[12:13]
	s_clause 0x1
	scratch_load_b32 v12, off, off offset:312
	scratch_load_b32 v13, off, off offset:328
	s_waitcnt vmcnt(1)
	v_add_co_u32 v12, vcc_lo, v12, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v13, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	s_clause 0x1
	scratch_load_b32 v14, off, off offset:336
	scratch_load_b32 v15, off, off offset:352
	s_waitcnt vmcnt(1)
	v_add_co_u32 v14, vcc_lo, v14, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v15, vcc_lo, s13, v15, vcc_lo
	global_load_b64 v[14:15], v[14:15], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[16:17], v[14:15], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[12:13], s[8:9], -v[16:17]
	v_mul_f64 v[12:13], v[12:13], s[10:11]
	v_add_f64 v[10:11], v[10:11], v[16:17]
	s_clause 0x1
	scratch_load_b32 v16, off, off offset:372
	scratch_load_b32 v17, off, off offset:400
	v_fma_f64 v[92:93], v[26:27], s[10:11], -v[12:13]
	v_mul_f64 v[12:13], v[14:15], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[68:69], v[28:29], s[10:11], -v[12:13]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v16, vcc_lo, v16, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v17, vcc_lo, s13, v17, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[16:17], v[34:35], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[16:17], v[10:11]
	v_fma_f64 v[8:9], v[10:11], s[10:11], v[8:9]
	v_add_co_u32 v10, vcc_lo, v135, s12
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v136, vcc_lo
	v_add_co_u32 v12, vcc_lo, v130, s12
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v137, vcc_lo
	global_load_b64 v[10:11], v[10:11], off
	v_add_co_u32 v14, vcc_lo, v131, s12
	global_load_b64 v[12:13], v[12:13], off
	v_add_co_ci_u32_e32 v15, vcc_lo, s13, v138, vcc_lo
	v_add_co_u32 v16, vcc_lo, v132, s12
	v_add_co_ci_u32_e32 v17, vcc_lo, s13, v139, vcc_lo
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[16:17], v[16:17], off
	s_waitcnt vmcnt(2)
	v_fma_f64 v[10:11], v[10:11], 2.0, v[12:13]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[12:13], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[10:11], v[14:15], v[10:11]
	v_mul_f64 v[46:47], v[14:15], v[12:13]
	v_add_co_u32 v14, vcc_lo, v108, s12
	v_add_co_ci_u32_e32 v15, vcc_lo, s13, v109, vcc_lo
	global_load_b64 v[14:15], v[14:15], off
	s_waitcnt vmcnt(1)
	v_mul_f64 v[10:11], v[10:11], v[16:17]
	v_add_co_u32 v16, vcc_lo, v114, s12
	v_add_co_ci_u32_e32 v17, vcc_lo, s13, v115, vcc_lo
	v_add_co_u32 v22, vcc_lo, v120, s12
	v_add_co_ci_u32_e32 v23, vcc_lo, s13, v121, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	v_add_co_u32 v24, vcc_lo, v126, s12
	global_load_b64 v[22:23], v[22:23], off
	v_add_co_ci_u32_e32 v25, vcc_lo, s13, v127, vcc_lo
	global_load_b64 v[24:25], v[24:25], off
	v_mul_f64 v[10:11], v[38:39], v[10:11]
	s_waitcnt vmcnt(2)
	v_mul_f64 v[20:21], v[16:17], s[10:11]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[22:23], v[22:23], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[14:15], s[10:11], -v[20:21]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[26:27], -v[24:25], s[8:9], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[20:21], v[26:27]
	v_mul_f64 v[10:11], v[10:11], v[20:21]
	scratch_load_b32 v20, off, off offset:412 ; 4-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_add_co_u32 v20, vcc_lo, v20, s12
	v_add_co_ci_u32_e32 v21, vcc_lo, s13, v110, vcc_lo
	v_add_co_u32 v26, vcc_lo, v112, s12
	v_add_co_ci_u32_e32 v27, vcc_lo, s13, v116, vcc_lo
	v_add_co_u32 v30, vcc_lo, v118, s12
	v_add_co_ci_u32_e32 v31, vcc_lo, s13, v122, vcc_lo
	s_clause 0x1
	global_load_b64 v[20:21], v[20:21], off
	global_load_b64 v[26:27], v[26:27], off
	v_add_co_u32 v32, vcc_lo, v124, s12
	global_load_b64 v[30:31], v[30:31], off
	v_add_co_ci_u32_e32 v33, vcc_lo, s13, v128, vcc_lo
	global_load_b64 v[32:33], v[32:33], off
	s_waitcnt vmcnt(2)
	v_mul_f64 v[28:29], v[26:27], s[10:11]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[30:31], v[30:31], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[28:29], v[20:21], s[10:11], -v[28:29]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[34:35], -v[32:33], s[8:9], v[30:31]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[28:29], v[28:29], v[34:35]
	v_add_co_u32 v34, vcc_lo, v133, s12
	v_add_co_ci_u32_e32 v35, vcc_lo, s13, v140, vcc_lo
	global_load_b64 v[34:35], v[34:35], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[34:35], v[12:13], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[34:35], s[4:5], v[34:35]
	v_mul_f64 v[28:29], v[34:35], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[28:29], v[28:29], s[8:9]
	v_fma_f64 v[10:11], v[10:11], s[8:9], v[28:29]
	scratch_load_b32 v28, off, off offset:416 ; 4-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_add_co_u32 v28, vcc_lo, v28, s12
	v_add_co_ci_u32_e32 v29, vcc_lo, s13, v111, vcc_lo
	v_add_co_u32 v34, vcc_lo, v113, s12
	v_add_co_ci_u32_e32 v35, vcc_lo, s13, v117, vcc_lo
	v_add_co_u32 v44, vcc_lo, v119, s12
	v_add_co_ci_u32_e32 v45, vcc_lo, s13, v123, vcc_lo
	s_clause 0x2
	global_load_b64 v[28:29], v[28:29], off
	global_load_b64 v[34:35], v[34:35], off
	global_load_b64 v[44:45], v[44:45], off
	s_waitcnt vmcnt(1)
	v_mul_f64 v[42:43], v[34:35], s[10:11]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[52:53], v[44:45], s[8:9]
	v_add_co_u32 v44, vcc_lo, v125, s12
	v_add_co_ci_u32_e32 v45, vcc_lo, s13, v129, vcc_lo
	global_load_b64 v[54:55], v[44:45], off
	v_fma_f64 v[42:43], v[28:29], s[10:11], -v[42:43]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[44:45], -v[54:55], s[8:9], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[42:43], v[42:43], v[44:45]
	v_add_co_u32 v44, vcc_lo, v134, s12
	v_add_co_ci_u32_e32 v45, vcc_lo, s13, v141, vcc_lo
	global_load_b64 v[44:45], v[44:45], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[12:13], v[12:13], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[12:13], v[42:43]
	v_fma_f64 v[10:11], v[12:13], s[8:9], v[10:11]
	v_add_co_u32 v12, vcc_lo, v185, s12
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v186, vcc_lo
	v_add_co_u32 v42, vcc_lo, v180, s12
	v_add_co_ci_u32_e32 v43, vcc_lo, s13, v187, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	v_add_co_u32 v44, vcc_lo, v181, s12
	global_load_b64 v[42:43], v[42:43], off
	v_add_co_ci_u32_e32 v45, vcc_lo, s13, v188, vcc_lo
	v_add_co_u32 v56, vcc_lo, v182, s12
	v_add_co_ci_u32_e32 v57, vcc_lo, s13, v189, vcc_lo
	global_load_b64 v[44:45], v[44:45], off
	global_load_b64 v[56:57], v[56:57], off
	s_waitcnt vmcnt(2)
	v_fma_f64 v[12:13], v[12:13], 2.0, v[42:43]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[42:43], v[42:43], v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[12:13], v[44:45], v[12:13]
	v_mul_f64 v[44:45], v[44:45], v[42:43]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[12:13], v[12:13], v[56:57]
	v_add_co_u32 v56, vcc_lo, v146, s12
	v_add_co_ci_u32_e32 v57, vcc_lo, s13, v147, vcc_lo
	v_add_co_u32 v58, vcc_lo, v152, s12
	v_add_co_ci_u32_e32 v59, vcc_lo, s13, v153, vcc_lo
	v_add_co_u32 v62, vcc_lo, v158, s12
	v_add_co_ci_u32_e32 v63, vcc_lo, s13, v159, vcc_lo
	s_clause 0x2
	global_load_b64 v[56:57], v[56:57], off
	global_load_b64 v[58:59], v[58:59], off
	global_load_b64 v[62:63], v[62:63], off
	v_mul_f64 v[12:13], v[38:39], v[12:13]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[60:61], v[58:59], s[10:11]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[88:89], -v[62:63], s[8:9], v[22:23]
	v_add_co_u32 v22, vcc_lo, v164, s12
	v_add_co_ci_u32_e32 v23, vcc_lo, s13, v165, vcc_lo
	global_load_b64 v[22:23], v[22:23], off
	v_fma_f64 v[60:61], v[56:57], s[10:11], -v[60:61]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[22:23], v[22:23], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[62:63], s[8:9], -v[22:23]
	v_fma_f64 v[84:85], v[24:25], s[8:9], -v[22:23]
	v_add_f64 v[22:23], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[22:23], v[12:13], v[22:23]
	v_mul_f64 v[12:13], v[56:57], s[8:9]
	v_fma_f64 v[10:11], v[22:23], s[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[14:15], s[8:9], -v[12:13]
	v_mul_f64 v[12:13], v[58:59], s[8:9]
	v_add_f64 v[2:3], v[2:3], v[14:15]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[12:13], v[16:17], s[8:9], -v[12:13]
	v_add_co_u32 v16, vcc_lo, v144, s12
	v_add_co_ci_u32_e32 v17, vcc_lo, s13, v148, vcc_lo
	v_add_co_u32 v22, vcc_lo, v150, s12
	v_add_co_ci_u32_e32 v23, vcc_lo, s13, v154, vcc_lo
	v_add_co_u32 v56, vcc_lo, v156, s12
	v_add_co_ci_u32_e32 v57, vcc_lo, s13, v160, vcc_lo
	s_clause 0x1
	global_load_b64 v[16:17], v[16:17], off
	global_load_b64 v[22:23], v[22:23], off
	s_clause 0x1
	scratch_load_b32 v14, off, off offset:88
	scratch_load_b32 v15, off, off offset:92
	global_load_b64 v[56:57], v[56:57], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[86:87], -v[56:57], s[8:9], v[30:31]
	v_add_co_u32 v30, vcc_lo, v162, s12
	v_add_co_ci_u32_e32 v31, vcc_lo, s13, v166, vcc_lo
	global_load_b64 v[30:31], v[30:31], off
	v_mul_f64 v[24:25], v[22:23], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], v[16:17], s[10:11], -v[24:25]
	v_mul_f64 v[16:17], v[16:17], s[8:9]
	v_fma_f64 v[16:17], v[20:21], s[8:9], -v[16:17]
	v_mul_f64 v[20:21], v[22:23], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], v[16:17]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[30:31], v[30:31], s[8:9]
	v_fma_f64 v[56:57], v[56:57], s[8:9], -v[30:31]
	v_fma_f64 v[82:83], v[32:33], s[8:9], -v[30:31]
	v_add_co_u32 v30, vcc_lo, v183, s12
	v_add_co_ci_u32_e32 v31, vcc_lo, s13, v190, vcc_lo
	global_load_b64 v[30:31], v[30:31], off
	v_add_f64 v[24:25], v[24:25], v[56:57]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[30:31], v[42:43], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[30:31], s[4:5], v[30:31]
	v_mul_f64 v[30:31], v[30:31], v[24:25]
	v_fma_f64 v[24:25], v[26:27], s[8:9], -v[20:21]
	v_add_co_u32 v20, vcc_lo, v145, s12
	v_add_co_ci_u32_e32 v21, vcc_lo, s13, v149, vcc_lo
	v_add_co_u32 v22, vcc_lo, v151, s12
	v_add_co_ci_u32_e32 v23, vcc_lo, s13, v155, vcc_lo
	s_clause 0x1
	global_load_b64 v[20:21], v[20:21], off
	global_load_b64 v[22:23], v[22:23], off
	v_fma_f64 v[10:11], v[30:31], s[8:9], v[10:11]
	v_add_co_u32 v30, vcc_lo, v157, s12
	v_add_co_ci_u32_e32 v31, vcc_lo, s13, v161, vcc_lo
	v_add_co_u32 v32, vcc_lo, v163, s12
	v_add_co_ci_u32_e32 v33, vcc_lo, s13, v167, vcc_lo
	s_clause 0x1
	global_load_b64 v[30:31], v[30:31], off
	global_load_b64 v[32:33], v[32:33], off
	s_waitcnt vmcnt(2)
	v_mul_f64 v[26:27], v[22:23], s[10:11]
	v_mul_f64 v[22:23], v[22:23], s[8:9]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[94:95], -v[30:31], s[8:9], v[52:53]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[32:33], v[32:33], s[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[26:27], v[20:21], s[10:11], -v[26:27]
	v_mul_f64 v[20:21], v[20:21], s[8:9]
	v_fma_f64 v[96:97], v[34:35], s[8:9], -v[22:23]
	v_fma_f64 v[30:31], v[30:31], s[8:9], -v[32:33]
	v_fma_f64 v[78:79], v[54:55], s[8:9], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[20:21], v[28:29], s[8:9], -v[20:21]
	scratch_load_b32 v28, off, off offset:84 ; 4-byte Folded Reload
	v_add_f64 v[26:27], v[26:27], v[30:31]
	v_add_co_u32 v30, vcc_lo, v184, s12
	v_add_co_ci_u32_e32 v31, vcc_lo, s13, v191, vcc_lo
	v_add_f64 v[22:23], v[18:19], v[20:21]
	global_load_b64 v[30:31], v[30:31], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[30:31], v[42:43], v[30:31]
	v_add_co_u32 v42, vcc_lo, v36, s12
	v_add_co_ci_u32_e32 v43, vcc_lo, s13, v37, vcc_lo
	v_add_co_u32 v52, vcc_lo, v172, s12
	v_add_co_ci_u32_e32 v53, vcc_lo, s13, v179, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v56, vcc_lo, 0x1000, v52
	v_add_co_ci_u32_e32 v57, vcc_lo, 0, v53, vcc_lo
	v_add_co_u32 v54, vcc_lo, v171, s12
	v_add_co_ci_u32_e32 v55, vcc_lo, s13, v178, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v62, vcc_lo, 0x1000, v54
	v_add_co_ci_u32_e32 v63, vcc_lo, 0, v55, vcc_lo
	v_add_co_u32 v40, vcc_lo, v28, s12
	scratch_load_b32 v28, off, off offset:96 ; 4-byte Folded Reload
	global_load_b128 v[18:21], v[62:63], off offset:776
	v_mul_f64 v[26:27], v[30:31], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[26:27], s[8:9], v[10:11]
	v_mul_f64 v[10:11], s[4:5], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[8:9], s[4:5], v[8:9], v[10:11]
	global_load_b64 v[10:11], v[42:43], off
	s_waitcnt vmcnt(2)
	v_add_co_ci_u32_e32 v41, vcc_lo, s13, v28, vcc_lo
	v_add_co_u32 v60, vcc_lo, v170, s12
	v_add_co_ci_u32_e32 v61, vcc_lo, s13, v177, vcc_lo
	global_load_b128 v[102:105], v[40:41], off
	v_add_co_u32 v64, vcc_lo, 0x1000, v60
	v_add_co_ci_u32_e32 v65, vcc_lo, 0, v61, vcc_lo
	v_add_co_u32 v14, vcc_lo, v14, s12
	v_add_co_ci_u32_e32 v15, vcc_lo, s13, v15, vcc_lo
	v_add_co_u32 v58, vcc_lo, v169, s12
	v_add_co_ci_u32_e32 v59, vcc_lo, s13, v176, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v66, vcc_lo, 0x1000, v58
	v_add_co_ci_u32_e32 v67, vcc_lo, 0, v59, vcc_lo
	global_load_b128 v[32:35], v[66:67], off offset:776
	s_waitcnt vmcnt(2)
	v_add_f64 v[80:81], v[10:11], v[8:9]
	global_load_b128 v[8:11], v[56:57], off offset:776
	s_waitcnt vmcnt(0)
	v_mul_f64 v[26:27], v[10:11], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_f64 v[28:29], v[26:27], v[104:105]
	global_load_b128 v[104:107], v[64:65], off offset:776
	v_mul_f64 v[28:29], s[4:5], v[28:29]
	v_mul_f64 v[22:23], v[22:23], v[28:29]
	global_load_b128 v[28:31], v[14:15], off
	s_waitcnt vmcnt(1)
	v_mul_f64 v[100:101], v[26:27], v[106:107]
	v_add_f64 v[26:27], v[0:1], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[6:7], v[100:101]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[20:21], v[20:21], 2.0, v[30:31]
	v_mul_f64 v[20:21], v[10:11], v[20:21]
	v_mul_f64 v[10:11], v[10:11], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[34:35], v[20:21]
	v_mul_f64 v[98:99], v[10:11], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], v[20:21]
	v_mul_f64 v[2:3], s[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[38:39], v[2:3]
	v_mul_f64 v[2:3], v[2:3], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[22:23], s[10:11], v[2:3]
	v_fma_f64 v[6:7], v[6:7], s[10:11], v[2:3]
	global_load_b128 v[0:3], v[62:63], off offset:752
	global_load_b128 v[14:17], v[14:15], off offset:-24
	global_load_b128 v[10:13], v[56:57], off offset:752
	s_waitcnt vmcnt(1)
	v_fma_f64 v[20:21], v[0:1], 2.0, v[14:15]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[14:15], v[10:11]
	v_mul_f64 v[0:1], v[0:1], v[10:11]
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f64 v[30:31], v[10:11], v[20:21]
	global_load_b128 v[20:23], v[66:67], off offset:752
	v_add_f64 v[10:11], v[90:91], v[96:97]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[34:35], v[30:31], v[20:21]
	v_mul_f64 v[30:31], v[14:15], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_f64 v[14:15], v[26:27], v[34:35]
	v_add_f64 v[34:35], v[4:5], v[24:25]
	global_load_b128 v[24:27], v[40:41], off offset:-24
	v_mul_f64 v[14:15], s[4:5], v[14:15]
	v_mul_f64 v[14:15], v[38:39], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[14:15], s[10:11], v[6:7]
	global_load_b128 v[4:7], v[64:65], off offset:752
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[0:1], v[4:5]
	v_mul_f64 v[0:1], v[0:1], v[24:25]
	v_mul_f64 v[4:5], v[34:35], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[0:1], s[4:5], v[0:1]
	v_fma_f64 v[4:5], v[4:5], s[10:11], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[0:1], v[10:11], v[0:1]
	v_mul_f64 v[10:11], v[8:9], v[18:19]
	v_fma_f64 v[0:1], v[0:1], s[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[10:11], v[102:103]
	v_add_f64 v[4:5], v[92:93], v[94:95]
	v_mul_f64 v[20:21], s[4:5], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[4:5], v[20:21]
	v_add_f64 v[20:21], v[76:77], v[88:89]
	v_mul_f64 v[76:77], v[10:11], v[104:105]
	v_fma_f64 v[10:11], v[18:19], 2.0, v[28:29]
	v_mul_f64 v[10:11], v[8:9], v[10:11]
	v_mul_f64 v[8:9], v[8:9], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[10:11], v[32:33], v[10:11]
	v_mul_f64 v[88:89], v[8:9], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[20:21], v[10:11]
	scratch_load_b64 v[10:11], off, off offset:4 ; 8-byte Folded Reload
	v_mul_f64 v[8:9], s[4:5], v[8:9]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[8:9], v[10:11], v[8:9]
	v_fma_f64 v[10:11], v[2:3], 2.0, v[16:17]
	v_mul_f64 v[2:3], v[2:3], v[12:13]
	v_mul_f64 v[16:17], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[8:9], v[8:9], s[8:9]
	v_mul_f64 v[10:11], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f64 v[34:35], v[2:3], v[6:7]
	v_mul_f64 v[2:3], v[2:3], v[26:27]
	v_mul_f64 v[24:25], v[16:17], v[22:23]
	v_fma_f64 v[4:5], v[4:5], s[8:9], v[8:9]
	v_add_f64 v[8:9], v[74:75], v[86:87]
	v_mul_f64 v[10:11], v[10:11], v[22:23]
	v_mul_f64 v[2:3], s[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[8:9], v[76:77]
	v_fma_f64 v[4:5], v[8:9], s[8:9], v[4:5]
	v_add_f64 v[8:9], v[72:73], v[84:85]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[8:9], v[10:11]
	scratch_load_b64 v[10:11], off, off offset:12 ; 8-byte Folded Reload
	v_mul_f64 v[8:9], s[4:5], v[8:9]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[8:9], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[8:9], s[8:9], v[4:5]
	v_add_f64 v[8:9], v[70:71], v[82:83]
	v_mul_f64 v[6:7], v[8:9], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[6:7], s[8:9], v[4:5]
	v_add_f64 v[6:7], v[68:69], v[78:79]
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], s[8:9], v[4:5]
	v_add_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[26:27], v[80:81], v[0:1]
	s_clause 0x1
	scratch_load_b32 v0, off, off offset:24
	scratch_load_b32 v1, off, off offset:28
	s_waitcnt vmcnt(1)
	v_add_co_u32 v0, vcc_lo, v0, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x2000, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v12, vcc_lo, v168, s12
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v175, vcc_lo
	s_clause 0x1
	global_load_b64 v[2:3], v[2:3], off offset:1536
	global_load_b64 v[10:11], v[0:1], off
	v_add_co_u32 v16, vcc_lo, 0x1000, v12
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v13, vcc_lo
	s_clause 0x1
	global_load_b128 v[70:73], v[16:17], off offset:3208
	global_load_b128 v[4:7], v[12:13], off offset:2440
	s_waitcnt vmcnt(3)
	v_mul_f64 v[8:9], v[2:3], s[10:11]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[2:3], v[6:7], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], -v[10:11], s[10:11], v[8:9]
	v_fma_f64 v[2:3], v[72:73], s[8:9], -v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_mul_f64 v[0:1], v[100:101], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[38:39], v[0:1]
	v_mul_f64 v[18:19], s[14:15], v[0:1]
	s_clause 0x1
	scratch_load_b32 v0, off, off offset:20
	scratch_load_b32 v1, off, off offset:32
	s_waitcnt vmcnt(1)
	v_add_co_u32 v0, vcc_lo, v0, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x2000, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v68, vcc_lo, v173, s12
	v_add_co_ci_u32_e32 v69, vcc_lo, s13, v174, vcc_lo
	s_clause 0x1
	global_load_b64 v[2:3], v[2:3], off offset:1536
	global_load_b64 v[40:41], v[0:1], off
	v_add_co_u32 v74, vcc_lo, 0x1000, v68
	v_add_co_ci_u32_e32 v75, vcc_lo, 0, v69, vcc_lo
	s_waitcnt vmcnt(1)
	v_mul_f64 v[20:21], v[2:3], s[10:11]
	s_clause 0x1
	global_load_b128 v[78:81], v[74:75], off offset:3208
	global_load_b128 v[0:3], v[68:69], off offset:2440
	s_waitcnt vmcnt(2)
	v_fma_f64 v[22:23], -v[40:41], s[10:11], v[20:21]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[78:79], v[78:79], s[8:9]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[28:29], v[2:3], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[28:29], v[80:81], s[8:9], -v[28:29]
	v_add_f64 v[22:23], v[22:23], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[22:23], v[98:99], v[22:23]
	v_mul_f64 v[22:23], v[22:23], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[28:29], v[18:19], s[10:11], v[22:23]
	s_clause 0x1
	scratch_load_b32 v18, off, off offset:40
	scratch_load_b32 v19, off, off offset:44
	s_waitcnt vmcnt(1)
	v_add_co_u32 v18, vcc_lo, v18, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v19, vcc_lo, s13, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v22, vcc_lo, 0x2000, v18
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v19, vcc_lo
	global_load_b64 v[22:23], v[22:23], off offset:1536
	s_waitcnt vmcnt(0)
	v_fma_f64 v[32:33], -v[22:23], s[10:11], v[8:9]
	global_load_b64 v[8:9], v[18:19], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[8:9], v[8:9], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[18:19], v[22:23], s[10:11], -v[8:9]
	v_fma_f64 v[22:23], v[10:11], s[10:11], -v[8:9]
	s_clause 0x1
	global_load_b128 v[8:11], v[16:17], off offset:3184
	global_load_b128 v[82:85], v[12:13], off offset:2416
	s_waitcnt vmcnt(0)
	v_mul_f64 v[12:13], v[82:83], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[8:9], s[8:9], -v[12:13]
	v_mul_f64 v[8:9], v[8:9], s[10:11]
	v_add_f64 v[12:13], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[72:73], s[10:11], -v[8:9]
	v_mul_f64 v[8:9], v[82:83], s[10:11]
	v_mul_f64 v[12:13], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[6:7], s[10:11], -v[8:9]
	v_mul_f64 v[6:7], v[38:39], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], s[4:5], v[6:7]
	v_fma_f64 v[72:73], v[6:7], s[10:11], v[28:29]
	s_clause 0x1
	scratch_load_b32 v6, off, off offset:36
	scratch_load_b32 v7, off, off offset:48
	s_waitcnt vmcnt(1)
	v_add_co_u32 v6, vcc_lo, v6, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, 0x2000, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v7, vcc_lo
	s_clause 0x1
	global_load_b64 v[6:7], v[6:7], off
	global_load_b64 v[8:9], v[8:9], off offset:1536
	s_waitcnt vmcnt(1)
	v_mul_f64 v[6:7], v[6:7], s[10:11]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[28:29], -v[8:9], s[10:11], v[20:21]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[82:83], v[8:9], s[10:11], -v[6:7]
	v_fma_f64 v[20:21], v[40:41], s[10:11], -v[6:7]
	s_clause 0x1
	global_load_b128 v[6:9], v[74:75], off offset:3184
	global_load_b128 v[12:15], v[68:69], off offset:2416
	v_mul_f64 v[74:75], v[70:71], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[70:71], -v[4:5], s[8:9], v[74:75]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[40:41], v[12:13], s[8:9]
	v_mul_f64 v[12:13], v[12:13], s[10:11]
	v_mul_f64 v[14:15], v[14:15], s[8:9]
	v_fma_f64 v[40:41], v[6:7], s[8:9], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[2:3], v[2:3], s[10:11], -v[12:13]
	s_clause 0x1
	scratch_load_b32 v12, off, off offset:56
	scratch_load_b32 v13, off, off offset:60
	v_mul_f64 v[6:7], v[6:7], s[10:11]
	v_add_f64 v[40:41], v[82:83], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[80:81], s[10:11], -v[6:7]
	v_fma_f64 v[80:81], -v[0:1], s[8:9], v[78:79]
	v_mul_f64 v[30:31], v[30:31], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[68:69], v[30:31], s[10:11], v[72:73]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v12, vcc_lo, v12, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v13, vcc_lo
	v_add_co_u32 v30, vcc_lo, 0x2000, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v31, vcc_lo, 0, v13, vcc_lo
	s_clause 0x1
	global_load_b64 v[30:31], v[30:31], off offset:1536
	global_load_b64 v[40:41], v[12:13], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[12:13], v[40:41], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[30:31], s[10:11], -v[12:13]
	v_add_f64 v[12:13], v[12:13], v[70:71]
	s_clause 0x1
	scratch_load_b32 v70, off, off offset:52
	scratch_load_b32 v71, off, off offset:64
	v_mul_f64 v[12:13], v[76:77], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[38:39], v[12:13]
	v_mul_f64 v[12:13], s[0:1], v[12:13]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v70, vcc_lo, v70, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v71, vcc_lo, s13, v71, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v72, vcc_lo, 0x2000, v70
	v_add_co_ci_u32_e32 v73, vcc_lo, 0, v71, vcc_lo
	s_clause 0x1
	global_load_b64 v[72:73], v[72:73], off offset:1536
	global_load_b64 v[70:71], v[70:71], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[76:77], v[70:71], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[76:77], v[72:73], s[10:11], -v[76:77]
	v_add_f64 v[76:77], v[76:77], v[80:81]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[76:77], v[88:89], v[76:77]
	v_mul_f64 v[76:77], v[76:77], s[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[76:77], v[12:13], s[8:9], v[76:77]
	s_clause 0x1
	scratch_load_b32 v12, off, off offset:72
	scratch_load_b32 v13, off, off offset:76
	s_waitcnt vmcnt(1)
	v_add_co_u32 v12, vcc_lo, v12, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v80, vcc_lo, 0x2000, v12
	v_add_co_ci_u32_e32 v81, vcc_lo, 0, v13, vcc_lo
	s_clause 0x1
	global_load_b64 v[80:81], v[80:81], off offset:1536
	global_load_b64 v[82:83], v[12:13], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[12:13], v[82:83], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[86:87], v[80:81], s[10:11], -v[12:13]
	v_fma_f64 v[12:13], -v[10:11], s[8:9], v[74:75]
	v_mul_f64 v[74:75], v[84:85], s[8:9]
	v_add_f64 v[12:13], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], s[8:9], -v[74:75]
	v_fma_f64 v[4:5], v[4:5], s[8:9], -v[74:75]
	v_add_f64 v[10:11], v[86:87], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[18:19], v[4:5]
	v_mul_f64 v[10:11], v[34:35], v[10:11]
	v_mul_f64 v[34:35], v[80:81], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[10:11], v[38:39], v[10:11]
	v_fma_f64 v[34:35], v[30:31], s[8:9], -v[34:35]
	v_mul_f64 v[30:31], v[82:83], s[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[10:11], s[4:5], v[10:11]
	v_add_f64 v[32:33], v[32:33], v[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[30:31], v[40:41], s[8:9], -v[30:31]
	v_fma_f64 v[40:41], v[10:11], s[8:9], v[76:77]
	s_clause 0x1
	scratch_load_b32 v10, off, off offset:68
	scratch_load_b32 v11, off, off offset:80
	v_add_f64 v[22:23], v[22:23], v[30:31]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v10, vcc_lo, v10, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v74, vcc_lo, 0x2000, v10
	v_add_co_ci_u32_e32 v75, vcc_lo, 0, v11, vcc_lo
	s_clause 0x1
	global_load_b64 v[74:75], v[74:75], off offset:1536
	global_load_b64 v[76:77], v[10:11], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[10:11], v[76:77], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_fma_f64 v[80:81], v[74:75], s[10:11], -v[10:11]
	v_fma_f64 v[10:11], -v[8:9], s[8:9], v[78:79]
	v_fma_f64 v[78:79], v[8:9], s[8:9], -v[14:15]
	v_fma_f64 v[8:9], v[0:1], s[8:9], -v[14:15]
	v_mul_f64 v[14:15], v[74:75], s[8:9]
	v_add_f64 v[6:7], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[0:1], v[80:81], v[78:79]
	v_add_f64 v[2:3], v[2:3], v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[72:73], v[72:73], s[8:9], -v[14:15]
	v_mul_f64 v[14:15], v[76:77], s[8:9]
	v_mul_f64 v[0:1], v[24:25], v[0:1]
	v_add_co_u32 v24, vcc_lo, 0x2000, v52
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v53, vcc_lo
	v_add_f64 v[28:29], v[28:29], v[72:73]
	v_fma_f64 v[14:15], v[70:71], s[8:9], -v[14:15]
	global_load_b64 v[24:25], v[24:25], off offset:1536
	v_fma_f64 v[0:1], v[0:1], s[8:9], v[40:41]
	v_add_f64 v[14:15], v[20:21], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[68:69], v[0:1]
	v_add_f64 v[0:1], v[26:27], v[0:1]
	v_add_co_u32 v26, vcc_lo, 0x2000, v54
	v_add_co_ci_u32_e32 v27, vcc_lo, 0, v55, vcc_lo
	v_add_co_u32 v34, vcc_lo, 0x2000, v60
	v_add_co_ci_u32_e32 v35, vcc_lo, 0, v61, vcc_lo
	global_load_b64 v[26:27], v[26:27], off offset:1536
	global_load_b64 v[34:35], v[34:35], off offset:1536
	s_waitcnt vmcnt(1)
	v_mul_f64 v[26:27], v[24:25], v[26:27]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[34:35], v[26:27], v[34:35]
	v_mul_f64 v[24:25], v[24:25], v[26:27]
	v_mul_f64 v[32:33], v[32:33], v[34:35]
	v_add_co_u32 v34, vcc_lo, 0x2000, v58
	v_add_co_ci_u32_e32 v35, vcc_lo, 0, v59, vcc_lo
	global_load_b64 v[34:35], v[34:35], off offset:1536
	v_mul_f64 v[32:33], v[38:39], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_f64 v[32:33], s[6:7], v[32:33]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[34:35], v[26:27], v[34:35]
	v_mul_f64 v[28:29], v[28:29], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[28:29], v[28:29], s[10:11]
	v_fma_f64 v[28:29], v[32:33], s[10:11], v[28:29]
	global_load_b64 v[30:31], v[52:53], off
	global_load_b64 v[32:33], v[54:55], off
	global_load_b64 v[34:35], v[60:61], off
	global_load_b64 v[20:21], v[58:59], off
	s_waitcnt vmcnt(2)
	v_mul_f64 v[32:33], v[30:31], v[32:33]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mul_f64 v[34:35], v[32:33], v[34:35]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[20:21], v[32:33], v[20:21]
	v_mul_f64 v[30:31], v[30:31], v[32:33]
	v_mul_f64 v[22:23], v[22:23], v[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[14:15], v[20:21]
	v_mul_f64 v[22:23], v[38:39], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[22:23], s[4:5], v[22:23]
	v_fma_f64 v[22:23], v[22:23], s[10:11], v[28:29]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[22:23], v[14:15], s[10:11], v[22:23]
	global_load_b64 v[16:17], v[56:57], off offset:3200
	global_load_b64 v[14:15], v[62:63], off offset:3200
	global_load_b64 v[10:11], v[66:67], off offset:3200
	s_waitcnt vmcnt(1)
	v_mul_f64 v[20:21], v[16:17], v[14:15]
	global_load_b64 v[14:15], v[64:65], off offset:3200
	s_waitcnt vmcnt(1)
	v_mul_f64 v[10:11], v[20:21], v[10:11]
	v_mul_f64 v[16:17], v[16:17], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[6:7], v[10:11]
	v_mul_f64 v[6:7], v[6:7], s[8:9]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[20:21], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[12:13], v[14:15]
	v_mul_f64 v[12:13], v[38:39], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], s[2:3], v[12:13]
	v_fma_f64 v[6:7], v[12:13], s[8:9], v[6:7]
	global_load_b64 v[12:13], v[52:53], off offset:2432
	global_load_b64 v[10:11], v[54:55], off offset:2432
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[12:13], v[10:11]
	global_load_b64 v[10:11], v[60:61], off offset:2432
	v_mul_f64 v[12:13], v[12:13], v[14:15]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[10:11], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[4:5], v[10:11]
	v_mul_f64 v[4:5], v[38:39], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], s[4:5], v[4:5]
	v_fma_f64 v[4:5], v[4:5], s[8:9], v[6:7]
	global_load_b64 v[6:7], v[58:59], off offset:2432
	s_waitcnt vmcnt(0)
	v_mul_f64 v[6:7], v[14:15], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], v[6:7]
	v_fma_f64 v[2:3], v[2:3], s[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[22:23], v[2:3]
	v_add_f64 v[0:1], v[0:1], v[2:3]
	scratch_load_b32 v2, off, off offset:100 ; 4-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v2, s12
	scratch_load_b32 v2, off, off offset:104 ; 4-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v2, vcc_lo
	v_add_co_u32 v2, vcc_lo, 0x2000, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v5, vcc_lo
	global_load_b64 v[2:3], v[2:3], off offset:1536
	s_clause 0x1
	scratch_load_b32 v6, off, off offset:252
	scratch_load_b32 v7, off, off offset:256
	s_waitcnt vmcnt(1)
	v_add_co_u32 v6, vcc_lo, v6, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, 0x2000, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v7, vcc_lo
	s_clause 0x1
	global_load_b64 v[22:23], v[6:7], off
	global_load_b64 v[8:9], v[8:9], off offset:1536
	s_waitcnt vmcnt(1)
	v_mul_f64 v[22:23], v[22:23], s[10:11]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[10:11], v[8:9], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[2:3], s[10:11], -v[10:11]
	global_load_b64 v[10:11], v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[18:19], v[10:11], s[10:11]
	v_fma_f64 v[40:41], v[10:11], s[10:11], -v[22:23]
	v_fma_f64 v[18:19], v[2:3], s[10:11], -v[18:19]
	v_fma_f64 v[2:3], v[8:9], s[10:11], -v[22:23]
	v_add_co_u32 v8, vcc_lo, 0x1000, v4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v5, vcc_lo
	v_add_co_u32 v10, vcc_lo, 0x1000, v6
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v7, vcc_lo
	s_clause 0x3
	global_load_b64 v[8:9], v[8:9], off offset:3200
	global_load_b64 v[10:11], v[10:11], off offset:3200
	global_load_b64 v[52:53], v[4:5], off offset:2432
	global_load_b64 v[54:55], v[6:7], off offset:2432
	s_waitcnt vmcnt(2)
	v_mul_f64 v[22:23], v[10:11], s[10:11]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[4:5], v[54:55], s[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[8:9], s[10:11], -v[22:23]
	v_fma_f64 v[28:29], v[52:53], s[10:11], -v[4:5]
	scratch_load_b32 v4, off, off offset:404 ; 4-byte Folded Reload
	v_mul_f64 v[52:53], v[52:53], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[52:53], v[8:9], s[8:9], -v[52:53]
	v_mul_f64 v[8:9], v[54:55], s[8:9]
	v_add_f64 v[18:19], v[18:19], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[54:55], v[10:11], s[8:9], -v[8:9]
	v_mul_f64 v[18:19], v[48:49], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[54:55]
	v_mul_f64 v[2:3], v[50:51], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], s[10:11]
	v_fma_f64 v[2:3], v[18:19], s[10:11], v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v56, vcc_lo, v4, s12
	scratch_load_b32 v4, off, off offset:408 ; 4-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v57, vcc_lo, s13, v4, vcc_lo
	v_add_co_u32 v4, vcc_lo, 0x2000, v56
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v57, vcc_lo
	v_add_co_u32 v62, vcc_lo, v142, s12
	v_add_co_ci_u32_e32 v63, vcc_lo, s13, v143, vcc_lo
	s_clause 0x1
	global_load_b64 v[58:59], v[4:5], off offset:1536
	global_load_b64 v[60:61], v[56:57], off
	v_add_co_u32 v6, vcc_lo, 0x2000, v62
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v63, vcc_lo
	s_clause 0x1
	global_load_b64 v[64:65], v[6:7], off offset:1536
	global_load_b64 v[66:67], v[62:63], off
	v_add_co_u32 v8, vcc_lo, 0x1000, v56
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v57, vcc_lo
	v_add_co_u32 v10, vcc_lo, 0x1000, v62
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v63, vcc_lo
	global_load_b64 v[8:9], v[8:9], off offset:3200
	s_add_u32 s12, s12, 0x980
	s_addc_u32 s13, s13, 0
	s_add_i32 s16, s16, -1
	global_load_b64 v[62:63], v[62:63], off offset:2432
	s_cmp_lg_u32 s16, 0
	s_waitcnt vmcnt(4)
	v_mul_f64 v[4:5], v[60:61], s[10:11]
	s_waitcnt vmcnt(2)
	v_mul_f64 v[6:7], v[66:67], s[10:11]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[62:63], v[62:63], s[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[58:59], s[10:11], -v[4:5]
	v_fma_f64 v[6:7], v[64:65], s[10:11], -v[6:7]
	v_mul_f64 v[64:65], v[64:65], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[58:59], s[8:9], -v[64:65]
	v_mul_f64 v[64:65], v[66:67], s[8:9]
	v_add_f64 v[34:35], v[34:35], v[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[60:61], s[8:9], -v[64:65]
	global_load_b64 v[64:65], v[10:11], off offset:3200
	v_mul_f64 v[24:25], v[24:25], v[34:35]
	v_add_f64 v[26:27], v[40:41], v[60:61]
	v_mul_f64 v[26:27], v[30:31], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[26:27], v[26:27], s[10:11]
	v_fma_f64 v[24:25], v[24:25], s[10:11], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[24:25]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[10:11], v[64:65], s[8:9]
	v_fma_f64 v[66:67], v[8:9], s[8:9], -v[10:11]
	global_load_b64 v[10:11], v[56:57], off offset:2432
	v_add_f64 v[18:19], v[22:23], v[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mul_f64 v[16:17], v[16:17], v[18:19]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[56:57], v[10:11], s[8:9]
	v_fma_f64 v[68:69], v[10:11], s[8:9], -v[62:63]
	v_fma_f64 v[10:11], v[8:9], s[8:9], -v[56:57]
	v_fma_f64 v[8:9], v[64:65], s[8:9], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[28:29], v[68:69]
	v_add_f64 v[4:5], v[4:5], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_mul_f64 v[12:13], v[12:13], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[4:5], v[46:47], v[4:5]
	v_mul_f64 v[6:7], v[44:45], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[12:13], v[12:13], s[8:9]
	v_mul_f64 v[6:7], v[6:7], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[16:17], s[8:9], v[12:13]
	v_fma_f64 v[4:5], v[4:5], s[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[12:13]
	v_add_f64 v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	global_store_b64 v[42:43], v[0:1], off
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 420
		.amdhsa_kernarg_size 376
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 192
		.amdhsa_next_free_sgpr 36
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi, .Lfunc_end0-_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 11964
; NumSgprs: 38
; NumVgprs: 192
; ScratchSize: 420
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 23
; NumSGPRsForWavesPerEU: 38
; NumVGPRsForWavesPerEU: 192
; Occupancy: 8
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .offset:         96
        .size:           8
        .value_kind:     by_value
      - .offset:         104
        .size:           8
        .value_kind:     by_value
      - .offset:         112
        .size:           4
        .value_kind:     by_value
      - .offset:         120
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         124
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         128
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         132
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         134
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         136
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         138
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         140
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         142
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         160
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         168
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         176
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         184
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 376
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
    .private_segment_fixed_size: 420
    .sgpr_count:     38
    .sgpr_spill_count: 0
    .symbol:         _Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     192
    .vgpr_spill_count: 104
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
