#define PI 3.141592653589793238462643
#define blocDim 256
#define powOfTwo 4
#define timerCount 10
#define min(a,b) \
   ({ __typeof__ (a) _a = (a); \
       __typeof__ (b) _b = (b); \
     _a < _b ? _a : _b; })

__global__ void guts(const long int N, const long int M,const double deltaX,const double * x,double * b)
{
	__shared__ double thisBlock[blocDim];
	__shared__ long int k,l,blockPos,start;//,fullNeeded,needed;
	double FuncTemp = 0;
	long int threadPos;

	
	if(threadIdx.x==0){
		k = blockIdx.x+2;
		l = blockIdx.y;
		start = l*(N+1);
		blockPos = k+(N+1)*l;
		//fullNeeded = k+1 + (k+1)%2;
		//needed = min(fullNeeded,blocDim);
	}
	thisBlock[threadIdx.x] = 0;
	__syncthreads();

	threadPos = threadIdx.x;
	while(threadPos<=k){
		if(threadPos==0){
			FuncTemp += x[start+threadPos];
		}else if(threadPos==1){
			if(k==2){
				FuncTemp += deltaX*x[start+threadPos]/4.0;
			}else{
				FuncTemp += deltaX*x[start+threadPos]/2.0;
			}
		}else if(threadPos<(k-1)){
			FuncTemp += deltaX*x[start+threadPos];
		}else if(threadPos==(k-1)){
			FuncTemp += 3.0/4.0*deltaX*x[start+threadPos];
		}else if(threadPos==k){
			FuncTemp += deltaX*x[start+threadPos]/4.0;
		}else{
			FuncTemp += 0;
		}

		threadPos += blockDim.x;
	}
	thisBlock[threadIdx.x] = FuncTemp;
	__syncthreads();
	for(int i=blocDim/2;i>0;i=i/2){
		if(threadIdx.x<i){
			thisBlock[threadIdx.x] += thisBlock[threadIdx.x+i];
		}
		__syncthreads();
	}
	if(threadIdx.x==0){
		b[blockPos] = thisBlock[0];
	}
	
}

	.file	"tmpxft_00338f79_00000000-6_baseMult.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z29__device_stub__Z4gutslldPKdPdlldPKdPd
	.type	_Z29__device_stub__Z4gutslldPKdPdlldPKdPd, @function
_Z29__device_stub__Z4gutslldPKdPdlldPKdPd:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	56(%rsp), %rcx
	movsd	%xmm0, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z4gutslldPKdPd(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z29__device_stub__Z4gutslldPKdPdlldPKdPd, .-_Z29__device_stub__Z4gutslldPKdPdlldPKdPd
	.globl	_Z4gutslldPKdPd
	.type	_Z4gutslldPKdPd, @function
_Z4gutslldPKdPd:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z4gutslldPKdPdlldPKdPd
	.cfi_endproc
.LFE2033:
	.size	_Z4gutslldPKdPd, .-_Z4gutslldPKdPd
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z4gutslldPKdPd"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4gutslldPKdPd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#define PI 3.141592653589793238462643
#define blocDim 256
#define powOfTwo 4
#define timerCount 10
#define min(a,b) \
   ({ __typeof__ (a) _a = (a); \
       __typeof__ (b) _b = (b); \
     _a < _b ? _a : _b; })

__global__ void guts(const long int N, const long int M,const double deltaX,const double * x,double * b)
{
	__shared__ double thisBlock[blocDim];
	__shared__ long int k,l,blockPos,start;//,fullNeeded,needed;
	double FuncTemp = 0;
	long int threadPos;

	
	if(threadIdx.x==0){
		k = blockIdx.x+2;
		l = blockIdx.y;
		start = l*(N+1);
		blockPos = k+(N+1)*l;
		//fullNeeded = k+1 + (k+1)%2;
		//needed = min(fullNeeded,blocDim);
	}
	thisBlock[threadIdx.x] = 0;
	__syncthreads();

	threadPos = threadIdx.x;
	while(threadPos<=k){
		if(threadPos==0){
			FuncTemp += x[start+threadPos];
		}else if(threadPos==1){
			if(k==2){
				FuncTemp += deltaX*x[start+threadPos]/4.0;
			}else{
				FuncTemp += deltaX*x[start+threadPos]/2.0;
			}
		}else if(threadPos<(k-1)){
			FuncTemp += deltaX*x[start+threadPos];
		}else if(threadPos==(k-1)){
			FuncTemp += 3.0/4.0*deltaX*x[start+threadPos];
		}else if(threadPos==k){
			FuncTemp += deltaX*x[start+threadPos]/4.0;
		}else{
			FuncTemp += 0;
		}

		threadPos += blockDim.x;
	}
	thisBlock[threadIdx.x] = FuncTemp;
	__syncthreads();
	for(int i=blocDim/2;i>0;i=i/2){
		if(threadIdx.x<i){
			thisBlock[threadIdx.x] += thisBlock[threadIdx.x+i];
		}
		__syncthreads();
	}
	if(threadIdx.x==0){
		b[blockPos] = thisBlock[0];
	}
	
}

	.text
	.file	"baseMult.hip"
	.globl	_Z19__device_stub__gutslldPKdPd # -- Begin function _Z19__device_stub__gutslldPKdPd
	.type	_Z19__device_stub__gutslldPKdPd,@function
_Z19__device_stub__gutslldPKdPd:        # @_Z19__device_stub__gutslldPKdPd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	32(%rsp), %r8
	movq	%rdx, (%r8)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%r8, 24(%rbx)
	movq	%rdx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4gutslldPKdPd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z19__device_stub__gutslldPKdPd, .Lfunc_end0-_Z19__device_stub__gutslldPKdPd
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4gutslldPKdPd, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z4gutslldPKdPd,@object         # @_Z4gutslldPKdPd
	.section	.rodata,"a",@progbits
	.globl	_Z4gutslldPKdPd
	.p2align	3, 0x0
_Z4gutslldPKdPd:
	.quad	_Z19__device_stub__gutslldPKdPd
	.size	_Z4gutslldPKdPd, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z4gutslldPKdPd"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__gutslldPKdPd
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4gutslldPKdPd
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4gutslldPKdPd         ; -- Begin function _Z4gutslldPKdPd
	.globl	_Z4gutslldPKdPd
	.p2align	8
	.type	_Z4gutslldPKdPd,@function
_Z4gutslldPKdPd:                        ; @_Z4gutslldPKdPd
; %bb.0:
	v_cmp_eq_u32_e64 s2, 0, v0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b64 s[4:5], s[0:1], 0x0
	s_add_i32 s14, s14, 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s14
	s_waitcnt lgkmcnt(0)
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	s_mul_hi_u32 s6, s4, s15
	s_mul_i32 s5, s5, s15
	s_mul_i32 s4, s4, s15
	s_add_i32 s6, s6, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s6
	s_add_u32 s4, s4, s14
	s_addc_u32 s5, s6, 0
	v_dual_mov_b32 v6, s5 :: v_dual_mov_b32 v5, s4
	ds_store_b128 v2, v[1:4] offset:2048
	ds_store_b64 v2, v[5:6] offset:2064
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v18, 3, v0
	s_mov_b32 s11, 0
	s_mov_b32 s10, exec_lo
	v_mov_b32_e32 v8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v2, v1 :: v_dual_mov_b32 v9, 0
	v_mov_b32_e32 v3, v1
	ds_store_b64 v18, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b64 v[2:3], v1 offset:2048
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x10
	s_load_b64 s[8:9], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	v_cmpx_ge_i64_e64 v[2:3], v[0:1]
	s_cbranch_execz .LBB0_28
; %bb.3:                                ; %.lr.ph
	ds_load_b64 v[6:7], v1 offset:2056
	v_mul_f64 v[4:5], 0x3fe80000, s[4:5]
	s_load_b32 s0, s[0:1], 0x34
	v_lshlrev_b64 v[10:11], 3, v[2:3]
	v_lshlrev_b32_e32 v12, 3, v0
	v_cmp_ne_u64_e64 s3, 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_lshlrev_b64 v[8:9], 3, v[6:7]
	v_add_co_u32 v6, vcc_lo, v2, -1
	v_add_co_ci_u32_e32 v7, vcc_lo, -1, v3, vcc_lo
	s_and_b32 s1, s0, 0xffff
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v19, vcc_lo, s6, v8
	v_add_co_ci_u32_e32 v20, vcc_lo, s7, v9, vcc_lo
	v_mov_b32_e32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v21, vcc_lo, v19, v10
	v_add_co_ci_u32_e32 v22, vcc_lo, v20, v11, vcc_lo
	v_mov_b32_e32 v9, 0
	v_add_co_u32 v10, vcc_lo, v19, v12
	v_mov_b32_e32 v13, v1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v20, vcc_lo
	v_add_co_u32 v23, vcc_lo, v21, -8
	v_add_co_ci_u32_e32 v24, vcc_lo, -1, v22, vcc_lo
	v_mov_b32_e32 v12, v0
	s_lshl_b32 s6, s1, 3
.LBB0_4:                                ; %NodeBlock
                                        ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr14_vgpr15
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i64_e32 0, v[12:13]
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_24
; %bb.5:                                ; %LeafBlock
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_mov_b32 s7, exec_lo
                                        ; implicit-def: $vgpr14_vgpr15
	v_cmpx_ne_u64_e32 1, v[12:13]
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB0_17
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	s_mov_b32 s12, exec_lo
                                        ; implicit-def: $vgpr14_vgpr15
	v_cmpx_ge_i64_e64 v[12:13], v[6:7]
	s_xor_b32 s12, exec_lo, s12
	s_cbranch_execz .LBB0_14
; %bb.7:                                ;   in Loop: Header=BB0_4 Depth=1
	s_mov_b32 s13, exec_lo
                                        ; implicit-def: $vgpr14_vgpr15
	v_cmpx_ne_u64_e64 v[6:7], v[12:13]
	s_xor_b32 s13, exec_lo, s13
	s_cbranch_execz .LBB0_11
; %bb.8:                                ;   in Loop: Header=BB0_4 Depth=1
	v_mov_b32_e32 v14, 0
	v_mov_b32_e32 v15, 0
	s_mov_b32 s14, exec_lo
	v_cmpx_eq_u64_e64 v[2:3], v[12:13]
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_4 Depth=1
	v_readfirstlane_b32 s16, v21
	v_readfirstlane_b32 s17, v22
	s_load_b64 s[16:17], s[16:17], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[14:15], s[16:17], s[4:5]
	v_ldexp_f64 v[14:15], v[14:15], -2
.LBB0_10:                               ; %Flow
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
.LBB0_11:                               ; %Flow63
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_and_not1_saveexec_b32 s13, s13
	s_cbranch_execz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_4 Depth=1
	v_readfirstlane_b32 s14, v23
	v_readfirstlane_b32 s15, v24
	s_load_b64 s[14:15], s[14:15], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[14:15], v[4:5], s[14:15]
.LBB0_13:                               ; %Flow64
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_14:                               ; %Flow65
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_and_not1_saveexec_b32 s12, s12
	s_cbranch_execz .LBB0_16
; %bb.15:                               ;   in Loop: Header=BB0_4 Depth=1
	global_load_b64 v[14:15], v[10:11], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[14:15], s[4:5]
.LBB0_16:                               ; %Flow66
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
.LBB0_17:                               ; %Flow69
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_and_not1_saveexec_b32 s7, s7
	s_cbranch_execz .LBB0_23
; %bb.18:                               ;   in Loop: Header=BB0_4 Depth=1
	v_readfirstlane_b32 s12, v19
	v_readfirstlane_b32 s13, v20
	s_and_b32 vcc_lo, exec_lo, s3
	s_load_b64 s[12:13], s[12:13], 0x8
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[16:17], s[12:13], s[4:5]
	s_cbranch_vccz .LBB0_20
; %bb.19:                               ;   in Loop: Header=BB0_4 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[14:15], v[16:17], 0.5
	s_mov_b32 s12, 0
	s_branch .LBB0_21
.LBB0_20:                               ;   in Loop: Header=BB0_4 Depth=1
	s_mov_b32 s12, -1
                                        ; implicit-def: $vgpr14_vgpr15
.LBB0_21:                               ; %Flow67
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB0_23
; %bb.22:                               ;   in Loop: Header=BB0_4 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[14:15], v[16:17], -2
.LBB0_23:                               ; %Flow70
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_24:                               ; %Flow71
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_26
; %bb.25:                               ;   in Loop: Header=BB0_4 Depth=1
	v_readfirstlane_b32 s12, v19
	v_readfirstlane_b32 s13, v20
	s_load_b64 s[12:13], s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v15, s13 :: v_dual_mov_b32 v14, s12
.LBB0_26:                               ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], v[14:15]
	v_add_co_u32 v12, vcc_lo, v12, s1
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	v_add_co_u32 v10, s0, v10, s6
	v_add_co_ci_u32_e64 v11, s0, 0, v11, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i64_e32 vcc_lo, v[12:13], v[2:3]
	s_or_b32 s11, vcc_lo, s11
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_4
; %bb.27:                               ; %Flow72
	s_or_b32 exec_lo, exec_lo, s11
.LBB0_28:                               ; %Flow73
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s10
	s_movk_i32 s0, 0x80
	ds_store_b64 v18, v[8:9]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_29:                               ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB0_31
; %bb.30:                               ;   in Loop: Header=BB0_29 Depth=1
	v_lshl_add_u32 v1, s0, 3, v18
	ds_load_b64 v[1:2], v1
	ds_load_b64 v[3:4], v18
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	ds_store_b64 v18, v[1:2]
.LBB0_31:                               ;   in Loop: Header=BB0_29 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_lshr_b32 s1, s0, 1
	s_cmp_lt_u32 s0, 2
	s_mov_b32 s0, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_29
; %bb.32:
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_34
; %bb.33:
	v_mov_b32_e32 v2, 0
	ds_load_b64 v[0:1], v2 offset:2064
	ds_load_b64 v[2:3], v2
	s_waitcnt lgkmcnt(1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
.LBB0_34:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4gutslldPKdPd
		.amdhsa_group_segment_fixed_size 2072
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4gutslldPKdPd, .Lfunc_end0-_Z4gutslldPKdPd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1020
; NumSgprs: 20
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2072 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2072
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4gutslldPKdPd
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z4gutslldPKdPd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     25
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
