// A shared memory matrix multiplication program

#include "stdio.h"
#include "stdlib.h"

// Keep the SIZE evenly divisible by TILE_WIDTH 
#define SIZE 512
#define TILE_WIDTH 16

// kernels that are called by another kernel use the __device__ identifier
__device__ float * GetSubMatrix(float * large_matrix, int row, int col)
{
    // this returns the address of the first element in a sub-matrix
    // when using this sub-matrix you have to jump ahead SIZE elements per row
    float * subMatrix = &large_matrix[ row * SIZE * TILE_WIDTH + col * TILE_WIDTH  ];
    return subMatrix;
}

// matrix multiplication kernel definition
__global__ void MatrixMulKernel(float * A,float * B,float * C)
{

    int blockRow = blockIdx.y;
    int blockCol = blockIdx.x;

    // Each thread block computes one sub-matrix Csub of C
    // Here we call another kernel from within a kernel. 
    // Note that we do not need to pass any grid or block
    // information between the <<< >>> symbols.
    float * Csub = GetSubMatrix(C, blockRow, blockCol);

    // Each thread computes on element of Csub
    // by accumulating results into Csub
    float Cvalue = 0.0;

    // Thread row and column within Csub
    int row = threadIdx.y;
    int col = threadIdx.x;

    // Iterate through n sub_matrices, where n depends on the size of the tile and matrix
    int sub_matrices_per_row = gridDim.x;

    int i;
    for ( i = 0; i < sub_matrices_per_row; i++ )
    {
        // Get sub-matrices
        // Block threads will work on these sub-matrices
        float * Asub = GetSubMatrix(A, blockRow, i);
        float * Bsub = GetSubMatrix(B, i, blockCol);
        
        // Shared memory used to store Asub and Bsub
        __shared__ float As[TILE_WIDTH][TILE_WIDTH];
        __shared__ float Bs[TILE_WIDTH][TILE_WIDTH];

        // Load Asub and Bsub from device memory into shared memory
        // Each thread loads one element of each sub-matrix
        As[row][col] = Asub[ row*SIZE + col ];
        Bs[row][col] = Bsub[ row*SIZE + col ];

        // Sync threads to make sure sub-matrices are completely loaded into shared memory
        // Remember, this only syncs threads within a block
        __syncthreads();

        int j;
        // Multiply Asub and Bsub together, using fast shared memory for data access
        for ( j = 0; j < TILE_WIDTH ; j++ )
            Cvalue += As[row][j] * Bs[j][col]; 

        // Sync threads to ensure the preceding computation is done before loading
        // two new sub-matrices of A and B in the next iteration
        __syncthreads();
    }

    Csub[ row*SIZE + col ] = Cvalue;
    
}

int main(int argc, char ** argv) 
{
   float h_A[SIZE*SIZE],h_B[SIZE*SIZE],h_C[SIZE*SIZE];
   float * d_A, * d_B, * d_C;

   // initialize host matrices with arbitrary data
   int i;
   for (i=0;i<SIZE*SIZE;i++) {
      h_A[i] = (float)i;
      h_B[i] = (float)SIZE * (float)SIZE - (float)i - 1.00;
      h_C[i] = 0.0;
   }

   // allocate space on device
   size_t size = SIZE*SIZE*sizeof(float);
   cudaMalloc(&d_A,size);
   cudaMalloc(&d_B,size);
   cudaMalloc(&d_C,size);

   //copy data to device
   cudaMemcpy(d_A,h_A,size,cudaMemcpyHostToDevice);
   cudaMemcpy(d_B,h_B,size,cudaMemcpyHostToDevice);
   cudaMemcpy(d_C,h_C,size,cudaMemcpyHostToDevice);

   dim3 threadsPerBlock(TILE_WIDTH,TILE_WIDTH); // 2d block
   int blocks = ( SIZE + TILE_WIDTH - 1 ) / TILE_WIDTH;
   dim3 blocksPerGrid(blocks,blocks); // 2d grid

   // invoke the kernel here
   MatrixMulKernel<<< blocksPerGrid, threadsPerBlock >>>(d_A,d_B,d_C);
   
   // copy results back to host
   cudaMemcpy(h_C,d_C,size,cudaMemcpyDeviceToHost);

   // Free up device memory
   cudaFree(d_A);
   cudaFree(d_B);
   cudaFree(d_C);

   return 0;
}

	.file	"tmpxft_0039490c_00000000-6_mat_multiply.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12GetSubMatrixPfii
	.type	_Z12GetSubMatrixPfii, @function
_Z12GetSubMatrixPfii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z12GetSubMatrixPfii, .-_Z12GetSubMatrixPfii
	.globl	_Z39__device_stub__Z15MatrixMulKernelPfS_S_PfS_S_
	.type	_Z39__device_stub__Z15MatrixMulKernelPfS_S_PfS_S_, @function
_Z39__device_stub__Z15MatrixMulKernelPfS_S_PfS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15MatrixMulKernelPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L4:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z39__device_stub__Z15MatrixMulKernelPfS_S_PfS_S_, .-_Z39__device_stub__Z15MatrixMulKernelPfS_S_PfS_S_
	.globl	_Z15MatrixMulKernelPfS_S_
	.type	_Z15MatrixMulKernelPfS_S_, @function
_Z15MatrixMulKernelPfS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z15MatrixMulKernelPfS_S_PfS_S_
	.cfi_endproc
.LFE2054:
	.size	_Z15MatrixMulKernelPfS_S_, .-_Z15MatrixMulKernelPfS_S_
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	leaq	-3145728(%rsp), %r11
	.cfi_def_cfa 11, 3145760
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$64, %rsp
	.cfi_def_cfa_offset 3145824
	movss	.LC0(%rip), %xmm3
	movss	.LC1(%rip), %xmm2
	xorl	%ecx, %ecx
	movq	%fs:40, %rax
	movq	%rax, 3145784(%rsp)
	xorl	%eax, %eax
.L11:
	cvtsi2ssl	%ecx, %xmm1
	movaps	%xmm3, %xmm0
	leaq	56(%rsp), %r12
	leaq	1048632(%rsp), %rbp
	subss	%xmm1, %xmm0
	movss	%xmm1, (%r12,%rcx,4)
	subss	%xmm2, %xmm0
	movss	%xmm0, 0(%rbp,%rcx,4)
	incq	%rcx
	cmpq	$262144, %rcx
	jne	.L11
	leaq	2097208(%rsp), %rbx
	xorl	%eax, %eax
	movl	$1048576, %esi
	movq	%rbx, %rdi
	rep stosl
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$1048576, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$1048576, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$1048576, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$1048576, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$1048576, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	movabsq	$137438953504, %rdi
	movl	$1, 40(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z39__device_stub__Z15MatrixMulKernelPfS_S_PfS_S_
.L12:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$1048576, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	3145784(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$3145792, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"_Z15MatrixMulKernelPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15MatrixMulKernelPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1216348160
	.align 4
.LC1:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// A shared memory matrix multiplication program


#include <hip/hip_runtime.h>
#include "stdio.h"
#include "stdlib.h"

// Keep the SIZE evenly divisible by TILE_WIDTH 
#define SIZE 512
#define TILE_WIDTH 16

// kernels that are called by another kernel use the __device__ identifier
__device__ float * GetSubMatrix(float * large_matrix, int row, int col)
{
    // this returns the address of the first element in a sub-matrix
    // when using this sub-matrix you have to jump ahead SIZE elements per row
    float * subMatrix = &large_matrix[ row * SIZE * TILE_WIDTH + col * TILE_WIDTH  ];
    return subMatrix;
}

// matrix multiplication kernel definition
__global__ void MatrixMulKernel(float * A,float * B,float * C)
{

    int blockRow = blockIdx.y;
    int blockCol = blockIdx.x;

    // Each thread block computes one sub-matrix Csub of C
    // Here we call another kernel from within a kernel. 
    // Note that we do not need to pass any grid or block
    // information between the <<< >>> symbols.
    float * Csub = GetSubMatrix(C, blockRow, blockCol);

    // Each thread computes on element of Csub
    // by accumulating results into Csub
    float Cvalue = 0.0;

    // Thread row and column within Csub
    int row = threadIdx.y;
    int col = threadIdx.x;

    // Iterate through n sub_matrices, where n depends on the size of the tile and matrix
    int sub_matrices_per_row = gridDim.x;

    int i;
    for ( i = 0; i < sub_matrices_per_row; i++ )
    {
        // Get sub-matrices
        // Block threads will work on these sub-matrices
        float * Asub = GetSubMatrix(A, blockRow, i);
        float * Bsub = GetSubMatrix(B, i, blockCol);
        
        // Shared memory used to store Asub and Bsub
        __shared__ float As[TILE_WIDTH][TILE_WIDTH];
        __shared__ float Bs[TILE_WIDTH][TILE_WIDTH];

        // Load Asub and Bsub from device memory into shared memory
        // Each thread loads one element of each sub-matrix
        As[row][col] = Asub[ row*SIZE + col ];
        Bs[row][col] = Bsub[ row*SIZE + col ];

        // Sync threads to make sure sub-matrices are completely loaded into shared memory
        // Remember, this only syncs threads within a block
        __syncthreads();

        int j;
        // Multiply Asub and Bsub together, using fast shared memory for data access
        for ( j = 0; j < TILE_WIDTH ; j++ )
            Cvalue += As[row][j] * Bs[j][col]; 

        // Sync threads to ensure the preceding computation is done before loading
        // two new sub-matrices of A and B in the next iteration
        __syncthreads();
    }

    Csub[ row*SIZE + col ] = Cvalue;
    
}

int main(int argc, char ** argv) 
{
   float h_A[SIZE*SIZE],h_B[SIZE*SIZE],h_C[SIZE*SIZE];
   float * d_A, * d_B, * d_C;

   // initialize host matrices with arbitrary data
   int i;
   for (i=0;i<SIZE*SIZE;i++) {
      h_A[i] = (float)i;
      h_B[i] = (float)SIZE * (float)SIZE - (float)i - 1.00;
      h_C[i] = 0.0;
   }

   // allocate space on device
   size_t size = SIZE*SIZE*sizeof(float);
   hipMalloc(&d_A,size);
   hipMalloc(&d_B,size);
   hipMalloc(&d_C,size);

   //copy data to device
   hipMemcpy(d_A,h_A,size,hipMemcpyHostToDevice);
   hipMemcpy(d_B,h_B,size,hipMemcpyHostToDevice);
   hipMemcpy(d_C,h_C,size,hipMemcpyHostToDevice);

   dim3 threadsPerBlock(TILE_WIDTH,TILE_WIDTH); // 2d block
   int blocks = ( SIZE + TILE_WIDTH - 1 ) / TILE_WIDTH;
   dim3 blocksPerGrid(blocks,blocks); // 2d grid

   // invoke the kernel here
   MatrixMulKernel<<< blocksPerGrid, threadsPerBlock >>>(d_A,d_B,d_C);
   
   // copy results back to host
   hipMemcpy(h_C,d_C,size,hipMemcpyDeviceToHost);

   // Free up device memory
   hipFree(d_A);
   hipFree(d_B);
   hipFree(d_C);

   return 0;
}

	.text
	.file	"mat_multiply.hip"
	.globl	_Z30__device_stub__MatrixMulKernelPfS_S_ # -- Begin function _Z30__device_stub__MatrixMulKernelPfS_S_
	.type	_Z30__device_stub__MatrixMulKernelPfS_S_,@function
_Z30__device_stub__MatrixMulKernelPfS_S_: # @_Z30__device_stub__MatrixMulKernelPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15MatrixMulKernelPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__MatrixMulKernelPfS_S_, .Lfunc_end0-_Z30__device_stub__MatrixMulKernelPfS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x48800000                      # float 262144
.LCPI1_1:
	.long	0xbf800000                      # float -1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$3145760, %rsp                  # imm = 0x300020
	.cfi_def_cfa_offset 3145792
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	32(%rsp), %rdi
	xorl	%ebx, %ebx
	movl	$1048576, %edx                  # imm = 0x100000
	xorl	%esi, %esi
	callq	memset@PLT
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI1_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm2, %xmm2
	cvtsi2ss	%ebx, %xmm2
	movss	%xmm2, 2097184(%rsp,%rbx,4)
	movaps	%xmm0, %xmm3
	subss	%xmm2, %xmm3
	addss	%xmm1, %xmm3
	movss	%xmm3, 1048608(%rsp,%rbx,4)
	incq	%rbx
	cmpq	$262144, %rbx                   # imm = 0x40000
	jne	.LBB1_1
# %bb.2:
	leaq	24(%rsp), %rbx
	movl	$1048576, %esi                  # imm = 0x100000
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r14
	movl	$1048576, %esi                  # imm = 0x100000
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %r15
	movl	$1048576, %esi                  # imm = 0x100000
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	leaq	2097184(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	leaq	1048608(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	leaq	32(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$137438953504, %rdi             # imm = 0x2000000020
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z30__device_stub__MatrixMulKernelPfS_S_
.LBB1_4:
	movq	8(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movl	$1048576, %edx                  # imm = 0x100000
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$3145760, %rsp                  # imm = 0x300020
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15MatrixMulKernelPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15MatrixMulKernelPfS_S_,@object # @_Z15MatrixMulKernelPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z15MatrixMulKernelPfS_S_
	.p2align	3, 0x0
_Z15MatrixMulKernelPfS_S_:
	.quad	_Z30__device_stub__MatrixMulKernelPfS_S_
	.size	_Z15MatrixMulKernelPfS_S_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z15MatrixMulKernelPfS_S_"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__MatrixMulKernelPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15MatrixMulKernelPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15MatrixMulKernelPfS_S_ ; -- Begin function _Z15MatrixMulKernelPfS_S_
	.globl	_Z15MatrixMulKernelPfS_S_
	.p2align	8
	.type	_Z15MatrixMulKernelPfS_S_,@function
_Z15MatrixMulKernelPfS_S_:              ; @_Z15MatrixMulKernelPfS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_lshl_b32 s2, s15, 13
	s_lshl_b32 s8, s14, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v0, v2, 9, v3
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s3, 1
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v6, 2, v3
	v_lshlrev_b32_e32 v2, 6, v2
	v_add_co_u32 v3, s4, s4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v4, null, s5, 0, s4
	v_add_nc_u32_e32 v5, v2, v6
	v_add_nc_u32_e32 v6, 0x400, v6
	v_add_co_u32 v7, s4, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, null, s7, 0, s4
	v_add_nc_u32_e32 v9, v6, v2
	s_mov_b32 s4, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s5, s4, 4
	s_lshl_b32 s7, s4, 13
	s_add_i32 s6, s5, s2
	s_add_i32 s10, s7, s8
	s_ashr_i32 s7, s6, 31
	s_ashr_i32 s11, s10, 31
	s_lshl_b64 s[6:7], s[6:7], 2
	s_mov_b32 s5, 0
	v_add_co_u32 v10, vcc_lo, v3, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v4, vcc_lo
	s_lshl_b64 s[6:7], s[10:11], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v12, vcc_lo, v7, s6
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v11, v[10:11], off
	global_load_b32 v12, v[12:13], off
	v_mov_b32_e32 v10, v6
	s_waitcnt vmcnt(1)
	ds_store_b32 v5, v11
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v11, s5, v2
	s_add_i32 s5, s5, 4
	ds_load_b32 v12, v10
	ds_load_b32 v11, v11
	v_add_nc_u32_e32 v10, 64, v10
	s_cmp_lg_u32 s5, 64
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v1, v11, v12
	s_cbranch_scc1 .LBB0_3
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s4, s3
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_2
.LBB0_5:                                ; %._crit_edge
	s_add_i32 s2, s8, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s3, s2, 31
	s_lshl_b64 s[2:3], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15MatrixMulKernelPfS_S_
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15MatrixMulKernelPfS_S_, .Lfunc_end0-_Z15MatrixMulKernelPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 404
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15MatrixMulKernelPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15MatrixMulKernelPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
