#include <cuda_runtime.h>
#include <cuda.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>       // needed for the function sqrtf()

#define TILE_SIZE 64 // NB // Block SIZE

/*
 * Function to perform rank-k update 
 * half of the threads working
 */
__device__ void ssyrk_tile(float* rA1, float* rA2) 
{
    // int row = blockIdx.y * TILE_SIZE + threadIdx.y;
    // int column = blockIdx.x * TILE_SIZE + threadIdx.x;

    int row = threadIdx.y;
    int column = threadIdx.x;

    if(column <= row)
    {
        float updatedValue = rA2[row * TILE_SIZE + column];

        for(int k=0; k<TILE_SIZE; k++)
        {
            updatedValue -= rA1[row * TILE_SIZE + k] * rA1[column * TILE_SIZE + k];
        }

        rA2[row * TILE_SIZE + column] = updatedValue;
    }
}



/*
 * Function to perform general matrix multiplication 
 * DOUBT: I think calculation is given wrong in paper it should be rA2[k][n] 
 */
__device__ void sgemm_tile(const float* rA1, const float* rA2, float* rA3)
{
    // int row = blockIdx.y * TILE_SIZE + threadIdx.y;
    // int column = blockIdx.x * TILE_SIZE + threadIdx.x;

    int row = threadIdx.y;
    int column = threadIdx.x;


    float updatedValue = rA3[row * TILE_SIZE + column];

    for(int i=0; i<TILE_SIZE; i++)
    {
        updatedValue -= rA1[row * TILE_SIZE + i] * rA2[i * TILE_SIZE + column];
    }

    rA3[row * TILE_SIZE + column] = updatedValue;
}


/*
 * Function to store full tile from shared memory to global memory  
 */
 __device__ void store_full(const float* s_data, float* g_data)
 {
     int g_row = blockIdx.y * TILE_SIZE + threadIdx.y;
     int g_column = blockIdx.x * TILE_SIZE + threadIdx.x;
 
     int l_row = threadIdx.y;
     int l_column = threadIdx.x;
 
     g_data[g_row * TILE_SIZE + g_column] = s_data[l_row * TILE_SIZE + l_column];
 
     __syncthreads();
 }


/*
 * Function to store lower triangular tile from shared memory to global memory  
 */
 __device__ void store_lower(const float* s_data, float* g_data)
 {
     int g_row = blockIdx.y * TILE_SIZE + threadIdx.y;
     int g_column = blockIdx.x * TILE_SIZE + threadIdx.x;
 
     int l_row = threadIdx.y;
     int l_column = threadIdx.x;
 
     if(l_column <= l_row)
         g_data[g_row * TILE_SIZE + g_column] = s_data[l_row * TILE_SIZE + l_column];
     else
         g_data[g_row * TILE_SIZE + g_column] = 0;
 
     __syncthreads();
 }



/*
 * Function to perform Choleshky Factorization for a tile
 */
 __device__ void spotrf_tile(float* t_A)
 {
    //  int ty = blockIdx.x*blockDim.x + threadIdx.x;  // col
    //  int tx = blockIdx.y*blockDim.y + threadIdx.y; // row

    int ty = threadIdx.x;  // col
     int tx = threadIdx.y; // row
 
     for(int k{0};k<TILE_SIZE;k++){
         // square root of diagonal elements
 
         if(tx==0 && ty==0)
             t_A[k*TILE_SIZE + k] = sqrtf(t_A[k*TILE_SIZE + k]);
         __syncthreads();
 
         // division step done parallaly
         if(ty<=tx && tx<TILE_SIZE - 1 && ty<TILE_SIZE - 1 && ty == k)
         {
             t_A[(tx+1)*TILE_SIZE + k]/= t_A[k*TILE_SIZE + k];
         }
         __syncthreads();
 
         if(ty<=tx && tx<TILE_SIZE - 1 && ty<TILE_SIZE - 1 && ty >= k)
         {
             t_A[(tx+1)*TILE_SIZE + (ty+1)]-= t_A[(tx+1)*TILE_SIZE + k]*t_A[(ty+1)*TILE_SIZE + k];
         }
         __syncthreads();
     }
 }

/*
* Function to perform triangular solve for a tile 
*/

__device__ void strsm_tile(float *t_A1, float *t_A2)
{
	// t_A2 is current unkonown 
	// int ty = blockIdx.x*TILE_SIZE + threadIdx.x;
	// int tx = blockIdx.y*TILE_SIZE + threadIdx.y;

    int ty = threadIdx.x;
	int tx = threadIdx.y;
	
	for(int i{0};i<TILE_SIZE;i++){
		if(ty==0){
			t_A2[tx*TILE_SIZE + i]/= t_A1[i*TILE_SIZE + i];
		}
		__syncthreads();

		if(ty>i && i<TILE_SIZE-1)
        {
			t_A2[tx*TILE_SIZE+ty]-= t_A2[tx*TILE_SIZE + i]*t_A1[ty*TILE_SIZE + i];
		}
		__syncthreads();
	}
 
}

/*
* Function to load a full tile from global memory to shared memory
*/

__device__ void load_full(float *t_A,float * S_A)
{
    // assigning a 2-D array in shared memory 

    int g_ty = blockIdx.x*blockDim.x + threadIdx.x;  // col
    int g_tx = blockIdx.y*blockDim.y + threadIdx.y; // row

    int l_tx = threadIdx.x;
    int l_ty = threadIdx.y;

    if(l_tx<TILE_SIZE && l_ty<TILE_SIZE)
        S_A[l_tx * TILE_SIZE + l_ty] = t_A[g_tx*TILE_SIZE + g_ty];
    __syncthreads();

}


/*
 * Left looking kernel code (without loop unrolling)
 */
 __global__ void left_looking_kernel(float *g_in, int N)
 {
 
     // ((N / NB) + 2) * sizeof(TILE) amount of shared memory
     extern __shared__ float s_current_panel[];
 
 
     int l_tid = threadIdx.y * (blockDim.x) + threadIdx.x; // local thread id
     int tx = threadIdx.x;
     int ty = threadIdx.y;
 
 
     // i: current panel
     for(int i=0; i<(N / TILE_SIZE); i++)
     {
 
         // loading current panel in shared memory
         for(int j=0; j<(N / TILE_SIZE); j++)
         {
             int access_row = j * blockDim.y + threadIdx.y;
             s_current_panel[j * TILE_SIZE * TILE_SIZE + l_tid] = g_in[access_row * N + i * TILE_SIZE + tx];
         }
         __syncthreads();
 
 
             
         // UPDATE CURRENT PANEL using preceding panels
         // j: preceding panel no. 
         for(int j=0; j<i; j++)
         {
             
             int row = i * TILE_SIZE + ty;
             // Loading data for rank-k update in shared memory
             s_current_panel[N * TILE_SIZE + l_tid] = g_in[row * N + j * TILE_SIZE + tx];
             __syncthreads();
 
 
             // Rank-k update
             float *rA1 = &s_current_panel[N*TILE_SIZE + 0];
             float *rA2 = &s_current_panel[i * TILE_SIZE * TILE_SIZE];
             
             ssyrk_tile(rA1, rA2);
             __syncthreads();
 
 
             // Applying SGEMM 
             for(int k=i+1; k<(N / TILE_SIZE); k++)
             {
                 // Loading data for sgemm in shared memory
                 int access_row = (k) * TILE_SIZE + ty;
                 s_current_panel[(N + 1) * TILE_SIZE + l_tid] = g_in[access_row * N + j * TILE_SIZE + tx];
                 __syncthreads();
 
 
                 // sgemm
                 float *rA1 = &s_current_panel[N * TILE_SIZE];
                 float *rA2 = &s_current_panel[(N + 1) * TILE_SIZE];
                 float *rA3 = &s_current_panel[k * TILE_SIZE * TILE_SIZE];
 
                 sgemm_tile(rA1, rA2, rA3);
                 __syncthreads();
             }
 
         }
 
 
 
         // FACTORIZE CURRENT PANEL
         
         // applying spotrf on the tile (i, i)
         float *rA1 = &s_current_panel[i * TILE_SIZE * TILE_SIZE];
 
         spotrf_tile(rA1);
         __syncthreads();
 
         
         // Applying TRSM
         for(int k=i+1; k<(N / TILE_SIZE); k++)
         {
             // trsm
             float *rA2 = &s_current_panel[k * TILE_SIZE * TILE_SIZE];
 
             strsm_tile(rA1, rA2);
             __syncthreads();
         }
 
 
 
         // STORING the current panel back in the global memory
         for (int k=0; k<(N / TILE_SIZE); k++)
         {
             // store zero for tiles above the tile (i, i)
             if(k<i)
             {
                 g_in[(k * TILE_SIZE + ty) * N + (i * TILE_SIZE) + tx] = 0.0;
             }
             else
             {
                 // store lower for tile (i, i)
                 if(k == i)
                 {
                     if(tx <= ty)
                     {
                         g_in[(k * TILE_SIZE + ty) * N + (i * TILE_SIZE) + tx] = s_current_panel[k * TILE_SIZE * TILE_SIZE + ty * TILE_SIZE + tx];
                     }
                     else
                     {
                         g_in[(k * TILE_SIZE + ty) * N + (i * TILE_SIZE) + tx] = 0.0;
                     }
                 }
                 else // store full for tiles below the tile (i, i)
                 {
                     g_in[(k * TILE_SIZE + ty) * N + (i * TILE_SIZE) + tx] = s_current_panel[k * TILE_SIZE * TILE_SIZE + ty * TILE_SIZE + tx];
                 }
             }
         }
         
 
         __syncthreads();
     }
 }
	.file	"tmpxft_0031a1d5_00000000-6_left_looking.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2036:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10ssyrk_tilePfS_
	.type	_Z10ssyrk_tilePfS_, @function
_Z10ssyrk_tilePfS_:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z10ssyrk_tilePfS_, .-_Z10ssyrk_tilePfS_
	.globl	_Z10sgemm_tilePKfS0_Pf
	.type	_Z10sgemm_tilePKfS0_Pf, @function
_Z10sgemm_tilePKfS0_Pf:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z10sgemm_tilePKfS0_Pf, .-_Z10sgemm_tilePKfS0_Pf
	.globl	_Z10store_fullPKfPf
	.type	_Z10store_fullPKfPf, @function
_Z10store_fullPKfPf:
.LFB2178:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2178:
	.size	_Z10store_fullPKfPf, .-_Z10store_fullPKfPf
	.globl	_Z11store_lowerPKfPf
	.type	_Z11store_lowerPKfPf, @function
_Z11store_lowerPKfPf:
.LFB2180:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2180:
	.size	_Z11store_lowerPKfPf, .-_Z11store_lowerPKfPf
	.globl	_Z11spotrf_tilePf
	.type	_Z11spotrf_tilePf, @function
_Z11spotrf_tilePf:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z11spotrf_tilePf, .-_Z11spotrf_tilePf
	.globl	_Z10strsm_tilePfS_
	.type	_Z10strsm_tilePfS_, @function
_Z10strsm_tilePfS_:
.LFB2182:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2182:
	.size	_Z10strsm_tilePfS_, .-_Z10strsm_tilePfS_
	.globl	_Z9load_fullPfS_
	.type	_Z9load_fullPfS_, @function
_Z9load_fullPfS_:
.LFB2184:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2184:
	.size	_Z9load_fullPfS_, .-_Z9load_fullPfS_
	.globl	_Z40__device_stub__Z19left_looking_kernelPfiPfi
	.type	_Z40__device_stub__Z19left_looking_kernelPfiPfi, @function
_Z40__device_stub__Z19left_looking_kernelPfiPfi:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z19left_looking_kernelPfi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L16:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z40__device_stub__Z19left_looking_kernelPfiPfi, .-_Z40__device_stub__Z19left_looking_kernelPfiPfi
	.globl	_Z19left_looking_kernelPfi
	.type	_Z19left_looking_kernelPfi, @function
_Z19left_looking_kernelPfi:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z19left_looking_kernelPfiPfi
	.cfi_endproc
.LFE2059:
	.size	_Z19left_looking_kernelPfi, .-_Z19left_looking_kernelPfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z19left_looking_kernelPfi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z19left_looking_kernelPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2061:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>

#include <stdio.h>
#include <stdlib.h>
#include <math.h>       // needed for the function sqrtf()

#define TILE_SIZE 64 // NB // Block SIZE

/*
 * Function to perform rank-k update 
 * half of the threads working
 */
__device__ void ssyrk_tile(float* rA1, float* rA2) 
{
    // int row = blockIdx.y * TILE_SIZE + threadIdx.y;
    // int column = blockIdx.x * TILE_SIZE + threadIdx.x;

    int row = threadIdx.y;
    int column = threadIdx.x;

    if(column <= row)
    {
        float updatedValue = rA2[row * TILE_SIZE + column];

        for(int k=0; k<TILE_SIZE; k++)
        {
            updatedValue -= rA1[row * TILE_SIZE + k] * rA1[column * TILE_SIZE + k];
        }

        rA2[row * TILE_SIZE + column] = updatedValue;
    }
}



/*
 * Function to perform general matrix multiplication 
 * DOUBT: I think calculation is given wrong in paper it should be rA2[k][n] 
 */
__device__ void sgemm_tile(const float* rA1, const float* rA2, float* rA3)
{
    // int row = blockIdx.y * TILE_SIZE + threadIdx.y;
    // int column = blockIdx.x * TILE_SIZE + threadIdx.x;

    int row = threadIdx.y;
    int column = threadIdx.x;


    float updatedValue = rA3[row * TILE_SIZE + column];

    for(int i=0; i<TILE_SIZE; i++)
    {
        updatedValue -= rA1[row * TILE_SIZE + i] * rA2[i * TILE_SIZE + column];
    }

    rA3[row * TILE_SIZE + column] = updatedValue;
}


/*
 * Function to store full tile from shared memory to global memory  
 */
 __device__ void store_full(const float* s_data, float* g_data)
 {
     int g_row = blockIdx.y * TILE_SIZE + threadIdx.y;
     int g_column = blockIdx.x * TILE_SIZE + threadIdx.x;
 
     int l_row = threadIdx.y;
     int l_column = threadIdx.x;
 
     g_data[g_row * TILE_SIZE + g_column] = s_data[l_row * TILE_SIZE + l_column];
 
     __syncthreads();
 }


/*
 * Function to store lower triangular tile from shared memory to global memory  
 */
 __device__ void store_lower(const float* s_data, float* g_data)
 {
     int g_row = blockIdx.y * TILE_SIZE + threadIdx.y;
     int g_column = blockIdx.x * TILE_SIZE + threadIdx.x;
 
     int l_row = threadIdx.y;
     int l_column = threadIdx.x;
 
     if(l_column <= l_row)
         g_data[g_row * TILE_SIZE + g_column] = s_data[l_row * TILE_SIZE + l_column];
     else
         g_data[g_row * TILE_SIZE + g_column] = 0;
 
     __syncthreads();
 }



/*
 * Function to perform Choleshky Factorization for a tile
 */
 __device__ void spotrf_tile(float* t_A)
 {
    //  int ty = blockIdx.x*blockDim.x + threadIdx.x;  // col
    //  int tx = blockIdx.y*blockDim.y + threadIdx.y; // row

    int ty = threadIdx.x;  // col
     int tx = threadIdx.y; // row
 
     for(int k{0};k<TILE_SIZE;k++){
         // square root of diagonal elements
 
         if(tx==0 && ty==0)
             t_A[k*TILE_SIZE + k] = sqrtf(t_A[k*TILE_SIZE + k]);
         __syncthreads();
 
         // division step done parallaly
         if(ty<=tx && tx<TILE_SIZE - 1 && ty<TILE_SIZE - 1 && ty == k)
         {
             t_A[(tx+1)*TILE_SIZE + k]/= t_A[k*TILE_SIZE + k];
         }
         __syncthreads();
 
         if(ty<=tx && tx<TILE_SIZE - 1 && ty<TILE_SIZE - 1 && ty >= k)
         {
             t_A[(tx+1)*TILE_SIZE + (ty+1)]-= t_A[(tx+1)*TILE_SIZE + k]*t_A[(ty+1)*TILE_SIZE + k];
         }
         __syncthreads();
     }
 }

/*
* Function to perform triangular solve for a tile 
*/

__device__ void strsm_tile(float *t_A1, float *t_A2)
{
	// t_A2 is current unkonown 
	// int ty = blockIdx.x*TILE_SIZE + threadIdx.x;
	// int tx = blockIdx.y*TILE_SIZE + threadIdx.y;

    int ty = threadIdx.x;
	int tx = threadIdx.y;
	
	for(int i{0};i<TILE_SIZE;i++){
		if(ty==0){
			t_A2[tx*TILE_SIZE + i]/= t_A1[i*TILE_SIZE + i];
		}
		__syncthreads();

		if(ty>i && i<TILE_SIZE-1)
        {
			t_A2[tx*TILE_SIZE+ty]-= t_A2[tx*TILE_SIZE + i]*t_A1[ty*TILE_SIZE + i];
		}
		__syncthreads();
	}
 
}

/*
* Function to load a full tile from global memory to shared memory
*/

__device__ void load_full(float *t_A,float * S_A)
{
    // assigning a 2-D array in shared memory 

    int g_ty = blockIdx.x*blockDim.x + threadIdx.x;  // col
    int g_tx = blockIdx.y*blockDim.y + threadIdx.y; // row

    int l_tx = threadIdx.x;
    int l_ty = threadIdx.y;

    if(l_tx<TILE_SIZE && l_ty<TILE_SIZE)
        S_A[l_tx * TILE_SIZE + l_ty] = t_A[g_tx*TILE_SIZE + g_ty];
    __syncthreads();

}


/*
 * Left looking kernel code (without loop unrolling)
 */
 __global__ void left_looking_kernel(float *g_in, int N)
 {
 
     // ((N / NB) + 2) * sizeof(TILE) amount of shared memory
     extern __shared__ float s_current_panel[];
 
 
     int l_tid = threadIdx.y * (blockDim.x) + threadIdx.x; // local thread id
     int tx = threadIdx.x;
     int ty = threadIdx.y;
 
 
     // i: current panel
     for(int i=0; i<(N / TILE_SIZE); i++)
     {
 
         // loading current panel in shared memory
         for(int j=0; j<(N / TILE_SIZE); j++)
         {
             int access_row = j * blockDim.y + threadIdx.y;
             s_current_panel[j * TILE_SIZE * TILE_SIZE + l_tid] = g_in[access_row * N + i * TILE_SIZE + tx];
         }
         __syncthreads();
 
 
             
         // UPDATE CURRENT PANEL using preceding panels
         // j: preceding panel no. 
         for(int j=0; j<i; j++)
         {
             
             int row = i * TILE_SIZE + ty;
             // Loading data for rank-k update in shared memory
             s_current_panel[N * TILE_SIZE + l_tid] = g_in[row * N + j * TILE_SIZE + tx];
             __syncthreads();
 
 
             // Rank-k update
             float *rA1 = &s_current_panel[N*TILE_SIZE + 0];
             float *rA2 = &s_current_panel[i * TILE_SIZE * TILE_SIZE];
             
             ssyrk_tile(rA1, rA2);
             __syncthreads();
 
 
             // Applying SGEMM 
             for(int k=i+1; k<(N / TILE_SIZE); k++)
             {
                 // Loading data for sgemm in shared memory
                 int access_row = (k) * TILE_SIZE + ty;
                 s_current_panel[(N + 1) * TILE_SIZE + l_tid] = g_in[access_row * N + j * TILE_SIZE + tx];
                 __syncthreads();
 
 
                 // sgemm
                 float *rA1 = &s_current_panel[N * TILE_SIZE];
                 float *rA2 = &s_current_panel[(N + 1) * TILE_SIZE];
                 float *rA3 = &s_current_panel[k * TILE_SIZE * TILE_SIZE];
 
                 sgemm_tile(rA1, rA2, rA3);
                 __syncthreads();
             }
 
         }
 
 
 
         // FACTORIZE CURRENT PANEL
         
         // applying spotrf on the tile (i, i)
         float *rA1 = &s_current_panel[i * TILE_SIZE * TILE_SIZE];
 
         spotrf_tile(rA1);
         __syncthreads();
 
         
         // Applying TRSM
         for(int k=i+1; k<(N / TILE_SIZE); k++)
         {
             // trsm
             float *rA2 = &s_current_panel[k * TILE_SIZE * TILE_SIZE];
 
             strsm_tile(rA1, rA2);
             __syncthreads();
         }
 
 
 
         // STORING the current panel back in the global memory
         for (int k=0; k<(N / TILE_SIZE); k++)
         {
             // store zero for tiles above the tile (i, i)
             if(k<i)
             {
                 g_in[(k * TILE_SIZE + ty) * N + (i * TILE_SIZE) + tx] = 0.0;
             }
             else
             {
                 // store lower for tile (i, i)
                 if(k == i)
                 {
                     if(tx <= ty)
                     {
                         g_in[(k * TILE_SIZE + ty) * N + (i * TILE_SIZE) + tx] = s_current_panel[k * TILE_SIZE * TILE_SIZE + ty * TILE_SIZE + tx];
                     }
                     else
                     {
                         g_in[(k * TILE_SIZE + ty) * N + (i * TILE_SIZE) + tx] = 0.0;
                     }
                 }
                 else // store full for tiles below the tile (i, i)
                 {
                     g_in[(k * TILE_SIZE + ty) * N + (i * TILE_SIZE) + tx] = s_current_panel[k * TILE_SIZE * TILE_SIZE + ty * TILE_SIZE + tx];
                 }
             }
         }
         
 
         __syncthreads();
     }
 }
	.text
	.file	"left_looking.hip"
	.globl	_Z34__device_stub__left_looking_kernelPfi # -- Begin function _Z34__device_stub__left_looking_kernelPfi
	.type	_Z34__device_stub__left_looking_kernelPfi,@function
_Z34__device_stub__left_looking_kernelPfi: # @_Z34__device_stub__left_looking_kernelPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19left_looking_kernelPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z34__device_stub__left_looking_kernelPfi, .Lfunc_end0-_Z34__device_stub__left_looking_kernelPfi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19left_looking_kernelPfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z19left_looking_kernelPfi,@object # @_Z19left_looking_kernelPfi
	.section	.rodata,"a",@progbits
	.globl	_Z19left_looking_kernelPfi
	.p2align	3, 0x0
_Z19left_looking_kernelPfi:
	.quad	_Z34__device_stub__left_looking_kernelPfi
	.size	_Z19left_looking_kernelPfi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z19left_looking_kernelPfi"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z34__device_stub__left_looking_kernelPfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z19left_looking_kernelPfi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z19left_looking_kernelPfi ; -- Begin function _Z19left_looking_kernelPfi
	.globl	_Z19left_looking_kernelPfi
	.p2align	8
	.type	_Z19left_looking_kernelPfi,@function
_Z19left_looking_kernelPfi:             ; @_Z19left_looking_kernelPfi
; %bb.0:
	s_load_b32 s6, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s6, 64
	s_cbranch_scc1 .LBB0_47
; %bb.1:                                ; %.preheader112.lr.ph
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x1c
	s_load_b64 s[4:5], s[0:1], 0x0
	v_bfe_u32 v6, v0, 10, 10
	v_dual_mov_b32 v21, 0 :: v_dual_and_b32 v0, 0x3ff, v0
	s_ashr_i32 s0, s6, 31
	s_lshl_b32 s7, s6, 6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v1, 8, v6
	v_lshlrev_b32_e32 v7, 2, v0
	v_or_b32_e32 v4, v6, v0
	s_lshr_b32 s0, s0, 26
	v_lshlrev_b32_e32 v2, 8, v0
	s_add_i32 s2, s6, s0
	v_add_nc_u32_e32 v13, 0, v7
	v_max_u32_e32 v5, v6, v0
	s_lshl_b32 s10, s6, 8
	v_lshlrev_b32_e32 v3, 6, v6
	s_ashr_i32 s9, s2, 6
	v_add_nc_u32_e32 v19, 0, v1
	v_cmp_eq_u32_e64 s2, 0, v4
	s_waitcnt lgkmcnt(0)
	s_and_b32 s11, s3, 0xffff
	v_add3_u32 v10, 0, s10, v2
	v_mad_u32_u24 v17, v6, s11, v0
	v_add_nc_u32_e32 v12, v13, v1
	v_sub_nc_u32_e32 v15, 0, v2
	v_mad_u64_u32 v[1:2], null, v6, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v4, s7, v17
	v_cmp_le_u32_e64 s0, v0, v6
	v_cmp_gt_u32_e32 vcc_lo, 63, v5
	v_lshl_add_u32 v8, v0, 6, 64
	v_mul_u32_u24_e32 v9, 0x41, v0
	v_cmp_eq_u32_e64 s1, 0, v0
	v_add_nc_u32_e32 v11, v19, v7
	v_add3_u32 v13, v13, s10, 0x100
	v_lshl_add_u32 v14, v4, 2, 0
	v_mul_u32_u24_e32 v16, 0xfc, v0
	v_lshl_add_u32 v17, v17, 2, 0
	v_add_nc_u32_e32 v18, s10, v19
	v_add_nc_u32_e32 v19, 0x4000, v19
	v_lshlrev_b32_e32 v20, 2, v3
	s_lshr_b32 s3, s3, 16
	s_mov_b32 s8, 0
	s_and_b32 s10, vcc_lo, s0
	s_mul_i32 s11, s6, s3
.LBB0_2:                                ; %.preheader112
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;     Child Loop BB0_6 Depth 2
                                        ;       Child Loop BB0_8 Depth 3
                                        ;       Child Loop BB0_11 Depth 3
                                        ;         Child Loop BB0_12 Depth 4
                                        ;     Child Loop BB0_16 Depth 2
                                        ;     Child Loop BB0_25 Depth 2
                                        ;       Child Loop BB0_26 Depth 3
                                        ;     Child Loop BB0_33 Depth 2
	v_mov_b32_e32 v2, v1
	v_mov_b32_e32 v4, v17
	s_mov_b32 s3, s9
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_add_i32 s3, s3, -1
	s_cmp_eq_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[22:23], 2, v[2:3]
	v_add_nc_u32_e32 v2, s11, v2
	v_add_co_u32 v22, vcc_lo, s4, v22
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v23, vcc_lo, s5, v23, vcc_lo
	global_load_b32 v3, v[22:23], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v3
	v_add_nc_u32_e32 v4, 0x4000, v4
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_lshl_b32 s12, s8, 6
	s_cmp_eq_u32 s8, 0
	v_add_nc_u32_e32 v2, s12, v6
	s_mov_b32 s13, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_mul_lo_u32 v3, v2, s6
	s_cbranch_scc1 .LBB0_15
; %bb.5:                                ; %.lr.ph131
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s3, s8, 1
	s_lshl_b32 s13, s8, 12
	v_lshl_add_u32 v4, s8, 14, v11
	s_cmp_lt_i32 s3, s9
	s_mov_b32 s15, 0
	s_cselect_b32 s14, -1, 0
.LBB0_6:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_8 Depth 3
                                        ;       Child Loop BB0_11 Depth 3
                                        ;         Child Loop BB0_12 Depth 4
	v_lshl_add_u32 v2, s15, 6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v22, v2, v3
	v_ashrrev_i32_e32 v23, 31, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	v_add_co_u32 v22, vcc_lo, s4, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, s5, v23, vcc_lo
	global_load_b32 v5, v[22:23], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v14, v5
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB0_10
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=2
	ds_load_b32 v5, v4
	s_mov_b32 s17, 0
.LBB0_8:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v22, s17, v18
	v_add_nc_u32_e32 v23, s17, v10
	s_add_i32 s17, s17, 4
	ds_load_b32 v22, v22
	ds_load_b32 v23, v23
	s_cmpk_eq_i32 s17, 0x100
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v5, -v22, v23, v5
	s_cbranch_scc0 .LBB0_8
; %bb.9:                                ;   in Loop: Header=BB0_6 Depth=2
	ds_store_b32 v4, v5
.LBB0_10:                               ; %Flow217
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_mov_b32 s16, s3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_14
.LBB0_11:                               ; %.lr.ph121
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_12 Depth 4
	v_lshl_add_u32 v5, s16, 6, v6
	s_mov_b32 s17, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[22:23], null, v5, s6, v[2:3]
	v_lshl_add_u32 v5, s16, 14, v12
	v_ashrrev_i32_e32 v23, 31, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	v_add_co_u32 v22, vcc_lo, s4, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, s5, v23, vcc_lo
	global_load_b32 v22, v[22:23], off
	v_mov_b32_e32 v23, v13
	s_waitcnt vmcnt(0)
	ds_store_b32 v14, v22 offset:256
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v22, v5
.LBB0_12:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_add_nc_u32_e32 v24, s17, v18
	s_add_i32 s17, s17, 4
	ds_load_b32 v25, v23
	ds_load_b32 v24, v24
	v_add_nc_u32_e32 v23, 0x100, v23
	s_cmpk_lg_i32 s17, 0x100
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v22, -v24, v25, v22
	s_cbranch_scc1 .LBB0_12
; %bb.13:                               ; %_Z10sgemm_tilePKfS0_Pf.exit
                                        ;   in Loop: Header=BB0_11 Depth=3
	s_add_i32 s16, s16, 1
	ds_store_b32 v5, v22
	s_cmp_ge_i32 s16, s9
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_11
.LBB0_14:                               ; %._crit_edge122
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_add_i32 s15, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s15, s8
	s_cbranch_scc0 .LBB0_6
.LBB0_15:                               ; %._crit_edge132
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_lshl_b32 s3, s13, 2
	s_mov_b32 s15, 0
	s_add_i32 s14, s3, 0
	s_mov_b32 s17, 0
	v_lshl_add_u32 v4, v9, 2, s14
	v_add3_u32 v5, s14, v20, 0x100
	v_lshl_add_u32 v24, v8, 2, s14
	s_mov_b32 s16, s14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, v4, v15
	v_lshl_add_u32 v22, v0, 2, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v23, v2, v20
.LBB0_16:                               ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_and_saveexec_b32 s18, s2
	s_cbranch_execz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_16 Depth=2
	v_mov_b32_e32 v25, s16
	ds_load_b32 v26, v25
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v27, 0x4f800000, v26
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v26, v26, v27, vcc_lo
	v_sqrt_f32_e32 v27, v26
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v28, -1, v27
	v_add_nc_u32_e32 v29, 1, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v30, -v28, v27, v26
	v_fma_f32 v31, -v29, v27, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s3, 0, v30
	v_cndmask_b32_e64 v27, v27, v28, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s3, 0, v31
	v_cndmask_b32_e64 v27, v27, v29, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v28, 0x37800000, v27
	v_cndmask_b32_e32 v27, v27, v28, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v26, 0x260
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v26, v27, v26, vcc_lo
	ds_store_b32 v25, v26
.LBB0_18:                               ;   in Loop: Header=BB0_16 Depth=2
	s_or_b32 exec_lo, exec_lo, s18
	v_cmp_eq_u32_e32 vcc_lo, s15, v7
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 s18, s10, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s18
	s_cbranch_execz .LBB0_20
; %bb.19:                               ;   in Loop: Header=BB0_16 Depth=2
	ds_load_b32 v25, v4
	ds_load_b32 v26, v23 offset:256
	s_waitcnt lgkmcnt(0)
	v_div_scale_f32 v27, null, v25, v25, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v28, v27
	s_waitcnt_depctr 0xfff
	v_fma_f32 v29, -v27, v28, 1.0
	v_fmac_f32_e32 v28, v29, v28
	v_div_scale_f32 v29, vcc_lo, v26, v25, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v30, v29, v28
	v_fma_f32 v31, -v27, v30, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v30, v31, v28
	v_fma_f32 v27, -v27, v30, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v27, v27, v28, v30
	v_div_fixup_f32 v25, v27, v25, v26
	ds_store_b32 v23, v25 offset:256
.LBB0_20:                               ;   in Loop: Header=BB0_16 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_le_u32_e32 vcc_lo, s17, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 s18, s10, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s18
	s_cbranch_execz .LBB0_22
; %bb.21:                               ;   in Loop: Header=BB0_16 Depth=2
	v_add_nc_u32_e32 v25, s15, v24
	v_add_nc_u32_e32 v26, s15, v5
	ds_load_b32 v25, v25
	ds_load_b32 v26, v26
	ds_load_b32 v27, v22 offset:4
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v25, -v26, v25, v27
	ds_store_b32 v22, v25 offset:4
.LBB0_22:                               ;   in Loop: Header=BB0_16 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_add_i32 s15, s15, 4
	s_add_i32 s17, s17, 1
	s_addk_i32 s16, 0x104
	s_cmpk_lg_i32 s15, 0x100
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_16
; %bb.23:                               ; %_Z11spotrf_tilePf.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s3, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s3, s9
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_32
; %bb.24:                               ; %.lr.ph140
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v2, v2, v16
	v_mov_b32_e32 v4, v19
	s_mov_b32 s15, s3
.LBB0_25:                               ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_26 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s16, s15, 14
	s_movk_i32 s17, 0xff00
	s_add_i32 s16, s16, 0
	s_mov_b32 s18, s14
	v_add3_u32 v5, s16, v20, v7
	s_mov_b32 s16, 0
.LBB0_26:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_25 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_and_saveexec_b32 s19, s1
	s_cbranch_execz .LBB0_28
; %bb.27:                               ;   in Loop: Header=BB0_26 Depth=3
	v_dual_mov_b32 v22, s18 :: v_dual_add_nc_u32 v23, s17, v4
	ds_load_b32 v22, v22
	ds_load_b32 v24, v23 offset:256
	s_waitcnt lgkmcnt(0)
	v_div_scale_f32 v25, null, v22, v22, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v26, v25
	s_waitcnt_depctr 0xfff
	v_fma_f32 v27, -v25, v26, 1.0
	v_fmac_f32_e32 v26, v27, v26
	v_div_scale_f32 v27, vcc_lo, v24, v22, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v28, v27, v26
	v_fma_f32 v29, -v25, v28, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v28, v29, v26
	v_fma_f32 v25, -v25, v28, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v25, v25, v26, v28
	v_div_fixup_f32 v22, v25, v22, v24
	ds_store_b32 v23, v22 offset:256
.LBB0_28:                               ;   in Loop: Header=BB0_26 Depth=3
	s_or_b32 exec_lo, exec_lo, s19
	v_cmp_lt_u32_e32 vcc_lo, s16, v0
	s_cmp_lg_u32 s17, -4
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s19, -1, 0
	s_barrier
	s_and_b32 s20, vcc_lo, s19
	buffer_gl0_inv
	s_and_saveexec_b32 s19, s20
	s_cbranch_execz .LBB0_30
; %bb.29:                               ;   in Loop: Header=BB0_26 Depth=3
	v_add_nc_u32_e32 v22, s17, v4
	v_add_nc_u32_e32 v23, s17, v2
	ds_load_b32 v22, v22 offset:256
	ds_load_b32 v23, v23 offset:256
	ds_load_b32 v24, v5
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v22, -v22, v23, v24
	ds_store_b32 v5, v22
.LBB0_30:                               ;   in Loop: Header=BB0_26 Depth=3
	s_or_b32 exec_lo, exec_lo, s19
	s_add_i32 s17, s17, 4
	s_add_i32 s16, s16, 1
	s_addk_i32 s18, 0x104
	s_cmp_lg_u32 s17, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_26
; %bb.31:                               ; %_Z10strsm_tilePfS_.exit
                                        ;   in Loop: Header=BB0_25 Depth=2
	v_add_nc_u32_e32 v4, 0x4000, v4
	s_add_i32 s15, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s15, s9
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_25
.LBB0_32:                               ; %.lr.ph142
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add3_u32 v2, s12, v0, v3
	v_lshl_add_u32 v22, s13, 2, v12
	v_dual_mov_b32 v23, v12 :: v_dual_mov_b32 v4, v1
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB0_33:                               ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_cmp_ge_u32 s12, s8
	s_mov_b32 s13, -1
	s_cbranch_scc0 .LBB0_43
; %bb.34:                               ;   in Loop: Header=BB0_33 Depth=2
	s_cmp_lg_u32 s8, s12
	s_cbranch_scc0 .LBB0_36
; %bb.35:                               ;   in Loop: Header=BB0_33 Depth=2
	ds_load_b32 v26, v23
	v_ashrrev_i32_e32 v5, 31, v4
	s_mov_b32 s13, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[24:25], 2, v[4:5]
	v_add_co_u32 v24, vcc_lo, s4, v24
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v25, vcc_lo, s5, v25, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[24:25], v26, off
.LBB0_36:                               ; %Flow210
                                        ;   in Loop: Header=BB0_33 Depth=2
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB0_42
; %bb.37:                               ;   in Loop: Header=BB0_33 Depth=2
	s_and_saveexec_b32 s13, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s13, exec_lo, s13
	s_cbranch_execz .LBB0_39
; %bb.38:                               ;   in Loop: Header=BB0_33 Depth=2
	ds_load_b32 v5, v22
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[2:3], v5, off
.LBB0_39:                               ; %Flow
                                        ;   in Loop: Header=BB0_33 Depth=2
	s_and_not1_saveexec_b32 s13, s13
	s_cbranch_execz .LBB0_41
; %bb.40:                               ;   in Loop: Header=BB0_33 Depth=2
	global_store_b32 v[2:3], v21, off
.LBB0_41:                               ; %Flow209
                                        ;   in Loop: Header=BB0_33 Depth=2
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_42:                               ; %Flow211
                                        ;   in Loop: Header=BB0_33 Depth=2
	s_mov_b32 s13, 0
.LBB0_43:                               ; %Flow212
                                        ;   in Loop: Header=BB0_33 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB0_45
; %bb.44:                               ;   in Loop: Header=BB0_33 Depth=2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[24:25], 2, v[4:5]
	v_add_co_u32 v24, vcc_lo, s4, v24
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v25, vcc_lo, s5, v25, vcc_lo
	global_store_b32 v[24:25], v21, off
.LBB0_45:                               ;   in Loop: Header=BB0_33 Depth=2
	v_add_nc_u32_e32 v4, s7, v4
	v_add_nc_u32_e32 v23, 0x4000, v23
	s_add_i32 s12, s12, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s9, s12
	s_cbranch_scc0 .LBB0_33
; %bb.46:                               ; %._crit_edge143
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v1, 64, v1
	v_add_nc_u32_e32 v19, 0x4000, v19
	s_cmp_eq_u32 s3, s9
	s_mov_b32 s8, s3
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_47:                               ; %._crit_edge145
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19left_looking_kernelPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 32
		.amdhsa_next_free_sgpr 21
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z19left_looking_kernelPfi, .Lfunc_end0-_Z19left_looking_kernelPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2108
; NumSgprs: 23
; NumVgprs: 32
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 23
; NumVGPRsForWavesPerEU: 32
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19left_looking_kernelPfi
    .private_segment_fixed_size: 0
    .sgpr_count:     23
    .sgpr_spill_count: 0
    .symbol:         _Z19left_looking_kernelPfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     32
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
