#include <cstdio>

constexpr int N = 128;
constexpr int SHMEM_DIM = 8;

static void fill_rand_matrix(float *d_matrix) {
    cudaError_t rc;
    float buf[32];

    auto total = N * N;
    auto offset = 0;

    rc = cudaHostRegister(buf, 32 * sizeof(float), 0);

    while(total > 0) {
        for(int i = 0; i < 32; i++) {
            buf[i] = ((rand() % 16) - 8) / 2.0f;
        }

        rc = cudaMemcpy(d_matrix + offset, buf, 32 * sizeof(float), cudaMemcpyHostToDevice);
        offset += 32;
        total -= 32;
    }

    if(total > 0) {
        for(int i = 0; i < total; i++) {
            buf[i] = ((rand() % 16) - 8) / 2.0f;
        }

        rc = cudaMemcpy(d_matrix + offset, buf, total * sizeof(float), cudaMemcpyHostToDevice);
    }

    rc = cudaHostUnregister(buf);
}

static void fill_identity(float *d_matrix) {
    float buf[N];

    for(int y = 0; y < N; y++) {
        for(int i = 0; i < N; i++) {
            if(i == y) {
                buf[i] = 1;
            } else {
                buf[i] = 0;
            }
        }

        cudaMemcpy(d_matrix + y * N, buf, N * sizeof(float), cudaMemcpyHostToDevice);
    }
}

static __global__ void k_mat_mul(int N, float *dst, float const *lhs, float const *rhs) {
    extern __shared__ float tile[];
    float *tile0 = tile + 0 * blockDim.x * blockDim.y;
    float *tile1 = tile + 1 * blockDim.x * blockDim.y;

    auto gx = blockDim.x * blockIdx.x + threadIdx.x;
    auto gy = blockDim.y * blockIdx.y + threadIdx.y;
    auto sh_off = threadIdx.y * blockDim.x + threadIdx.x;

    float acc = 0;
    auto y_base = gy * N;
    for(int j = 0; j < gridDim.x; j++) {
        auto block_off = j * blockDim.x;
        auto idx = y_base + block_off + threadIdx.x;
        tile0[sh_off] = lhs[idx];
        tile1[sh_off] = rhs[idx];
        __syncthreads();

        for(int I = 0; I < blockDim.x; I++) {
            acc += tile0[threadIdx.y * blockDim.x + I] * tile1[I * blockDim.x + threadIdx.x];
        }

        __syncthreads();
    }

    dst[gy * N + gx] = acc;
}

static void print_matrix(float *d_matrix) {
    float buf[N];

    for(int y = 0; y < N; y++) {
        cudaMemcpy(buf, d_matrix + y * N, N * sizeof(float), cudaMemcpyDeviceToHost);
        for(int i = 0; i < N; i++) {
            printf("%+6.2f ", buf[i]);
        }
        printf("\n");
    }
}

int main(int argc, char **argv) {
    cudaError_t rc;
    float *d_mat0, *d_mat1, *d_mat2;

    srand(0);

    auto total_size = N * N * sizeof(float);

    rc = cudaMalloc(&d_mat0, total_size);
    rc = cudaMalloc(&d_mat1, total_size);
    rc = cudaMalloc(&d_mat2, total_size);

    fill_rand_matrix(d_mat0);
    fill_rand_matrix(d_mat1);
    // fill_identity(d_mat1);

    auto shmem_siz = 2 * SHMEM_DIM * SHMEM_DIM * sizeof(float);
    auto block_size = dim3(SHMEM_DIM, SHMEM_DIM, 1);
    auto g = 1 + (N - 1) / SHMEM_DIM;
    auto grid_size = dim3(g, g, 1);

    k_mat_mul<<<grid_size, block_size, shmem_siz>>>(N, d_mat2, d_mat0, d_mat1);

    print_matrix(d_mat2);

    rc = cudaFree(d_mat2);
    rc = cudaFree(d_mat1);
    rc = cudaFree(d_mat0);
    return 0;
}

	.file	"tmpxft_00203d52_00000000-6_6_2.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL16fill_rand_matrixPf, @function
_ZL16fill_rand_matrixPf:
.LFB2027:
	.cfi_startproc
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%edx, %edx
	movl	$128, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	leaq	65536(%rbx), %r13
	subq	$152, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rbp
	movq	%rbp, %rdi
	call	cudaHostRegister@PLT
.L2:
	xorl	%r12d, %r12d
.L3:
	call	rand@PLT
	movl	$16, %ecx
	cltd
	idivl	%ecx
	subl	$8, %edx
	cvtsi2ssl	%edx, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, 0(%rbp,%r12,4)
	incq	%r12
	cmpq	$32, %r12
	jne	.L3
	movq	%rbx, %rdi
	movl	$1, %ecx
	movl	$128, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	subq	$-128, %rbx
	cmpq	%r13, %rbx
	jne	.L2
	movq	%rbp, %rdi
	call	cudaHostUnregister@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$152, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_ZL16fill_rand_matrixPf, .-_ZL16fill_rand_matrixPf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"%+6.2f "
.LC2:
	.string	"\n"
	.text
	.type	_ZL12print_matrixPf, @function
_ZL12print_matrixPf:
.LFB2029:
	.cfi_startproc
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC1(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	leaq	65536(%rdi), %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
	subq	$528, %rsp
	.cfi_def_cfa_offset 576
	movq	%fs:40, %rax
	movq	%rax, 520(%rsp)
	xorl	%eax, %eax
.L11:
	leaq	8(%rsp), %r12
	movl	$2, %ecx
	movq	%rbx, %rsi
	xorl	%ebp, %ebp
	movl	$512, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
.L10:
	cvtss2sd	(%r12,%rbp,4), %xmm0
	movq	%r14, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%rbp
	cmpq	$128, %rbp
	jne	.L10
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$512, %rbx
	call	__printf_chk@PLT
	cmpq	%r13, %rbx
	jne	.L11
	movq	520(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$528, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_ZL12print_matrixPf, .-_ZL12print_matrixPf
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL35__device_stub__Z9k_mat_muliPfPKfS1_iPfPKfS1_, @function
_ZL35__device_stub__Z9k_mat_muliPfPKfS1_iPfPKfS1_:
.LFB2055:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_ZL9k_mat_muliPfPKfS1_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L17:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_ZL35__device_stub__Z9k_mat_muliPfPKfS1_iPfPKfS1_, .-_ZL35__device_stub__Z9k_mat_muliPfPKfS1_iPfPKfS1_
	.type	_ZL9k_mat_muliPfPKfS1_, @function
_ZL9k_mat_muliPfPKfS1_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_ZL35__device_stub__Z9k_mat_muliPfPKfS1_iPfPKfS1_
	.cfi_endproc
.LFE2056:
	.size	_ZL9k_mat_muliPfPKfS1_, .-_ZL9k_mat_muliPfPKfS1_
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	subq	$72, %rsp
	.cfi_def_cfa_offset 80
	xorl	%edi, %edi
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	srand@PLT
	leaq	8(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	movl	$65536, %esi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	call	_ZL16fill_rand_matrixPf
	movq	16(%rsp), %rdi
	call	_ZL16fill_rand_matrixPf
	xorl	%r9d, %r9d
	movl	$512, %r8d
	movabsq	$34359738376, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$68719476752, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	movq	16(%rsp), %rcx
	movq	8(%rsp), %rdx
	movl	$128, %edi
	movq	24(%rsp), %rsi
	call	_ZL35__device_stub__Z9k_mat_muliPfPKfS1_iPfPKfS1_
.L23:
	movq	24(%rsp), %rdi
	call	_ZL12print_matrixPf
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z9k_mat_muliPfPKfS1_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_ZL9k_mat_muliPfPKfS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1056964608
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdio>

constexpr int N = 128;
constexpr int SHMEM_DIM = 8;

static void fill_rand_matrix(float *d_matrix) {
    hipError_t rc;
    float buf[32];

    auto total = N * N;
    auto offset = 0;

    rc = hipHostRegister(buf, 32 * sizeof(float), 0);

    while(total > 0) {
        for(int i = 0; i < 32; i++) {
            buf[i] = ((rand() % 16) - 8) / 2.0f;
        }

        rc = hipMemcpy(d_matrix + offset, buf, 32 * sizeof(float), hipMemcpyHostToDevice);
        offset += 32;
        total -= 32;
    }

    if(total > 0) {
        for(int i = 0; i < total; i++) {
            buf[i] = ((rand() % 16) - 8) / 2.0f;
        }

        rc = hipMemcpy(d_matrix + offset, buf, total * sizeof(float), hipMemcpyHostToDevice);
    }

    rc = hipHostUnregister(buf);
}

static void fill_identity(float *d_matrix) {
    float buf[N];

    for(int y = 0; y < N; y++) {
        for(int i = 0; i < N; i++) {
            if(i == y) {
                buf[i] = 1;
            } else {
                buf[i] = 0;
            }
        }

        hipMemcpy(d_matrix + y * N, buf, N * sizeof(float), hipMemcpyHostToDevice);
    }
}

static __global__ void k_mat_mul(int N, float *dst, float const *lhs, float const *rhs) {
    extern __shared__ float tile[];
    float *tile0 = tile + 0 * blockDim.x * blockDim.y;
    float *tile1 = tile + 1 * blockDim.x * blockDim.y;

    auto gx = blockDim.x * blockIdx.x + threadIdx.x;
    auto gy = blockDim.y * blockIdx.y + threadIdx.y;
    auto sh_off = threadIdx.y * blockDim.x + threadIdx.x;

    float acc = 0;
    auto y_base = gy * N;
    for(int j = 0; j < gridDim.x; j++) {
        auto block_off = j * blockDim.x;
        auto idx = y_base + block_off + threadIdx.x;
        tile0[sh_off] = lhs[idx];
        tile1[sh_off] = rhs[idx];
        __syncthreads();

        for(int I = 0; I < blockDim.x; I++) {
            acc += tile0[threadIdx.y * blockDim.x + I] * tile1[I * blockDim.x + threadIdx.x];
        }

        __syncthreads();
    }

    dst[gy * N + gx] = acc;
}

static void print_matrix(float *d_matrix) {
    float buf[N];

    for(int y = 0; y < N; y++) {
        hipMemcpy(buf, d_matrix + y * N, N * sizeof(float), hipMemcpyDeviceToHost);
        for(int i = 0; i < N; i++) {
            printf("%+6.2f ", buf[i]);
        }
        printf("\n");
    }
}

int main(int argc, char **argv) {
    hipError_t rc;
    float *d_mat0, *d_mat1, *d_mat2;

    srand(0);

    auto total_size = N * N * sizeof(float);

    rc = hipMalloc(&d_mat0, total_size);
    rc = hipMalloc(&d_mat1, total_size);
    rc = hipMalloc(&d_mat2, total_size);

    fill_rand_matrix(d_mat0);
    fill_rand_matrix(d_mat1);
    // fill_identity(d_mat1);

    auto shmem_siz = 2 * SHMEM_DIM * SHMEM_DIM * sizeof(float);
    auto block_size = dim3(SHMEM_DIM, SHMEM_DIM, 1);
    auto g = 1 + (N - 1) / SHMEM_DIM;
    auto grid_size = dim3(g, g, 1);

    k_mat_mul<<<grid_size, block_size, shmem_siz>>>(N, d_mat2, d_mat0, d_mat1);

    print_matrix(d_mat2);

    rc = hipFree(d_mat2);
    rc = hipFree(d_mat1);
    rc = hipFree(d_mat0);
    return 0;
}

	.text
	.file	"6_2.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$552, %rsp                      # imm = 0x228
	.cfi_def_cfa_offset 592
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%edi, %edi
	callq	srand
	leaq	24(%rsp), %rbx
	movl	$65536, %esi                    # imm = 0x10000
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r14
	movl	$65536, %esi                    # imm = 0x10000
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	movq	(%rbx), %rdi
	callq	_ZL16fill_rand_matrixPf
	movq	(%r14), %rdi
	callq	_ZL16fill_rand_matrixPf
	movabsq	$68719476752, %rdi              # imm = 0x1000000010
	movabsq	$34359738376, %rdx              # imm = 0x800000008
	movl	$512, %r8d                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	movl	$128, %edi
	callq	_ZL24__device_stub__k_mat_muliPfPKfS1_
.LBB0_2:
	movq	8(%rsp), %r14
	xorl	%r15d, %r15d
	leaq	32(%rsp), %rbx
.LBB0_3:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	movq	%r15, %rsi
	shlq	$9, %rsi
	addq	%r14, %rsi
	movl	$512, %edx                      # imm = 0x200
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r12d, %r12d
.LBB0_4:                                #   Parent Loop BB0_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	32(%rsp,%r12,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r12
	cmpq	$128, %r12
	jne	.LBB0_4
# %bb.5:                                #   in Loop: Header=BB0_3 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r15
	cmpq	$128, %r15
	jne	.LBB0_3
# %bb.6:                                # %_ZL12print_matrixPf.exit
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$552, %rsp                      # imm = 0x228
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _ZL16fill_rand_matrixPf
.LCPI1_0:
	.long	0x3f000000                      # float 0.5
	.text
	.type	_ZL16fill_rand_matrixPf,@function
_ZL16fill_rand_matrixPf:                # @_ZL16fill_rand_matrixPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movq	%rsp, %r14
	xorl	%r15d, %r15d
	movl	$128, %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	hipHostRegister
	movl	$16384, %r12d                   # imm = 0x4000
.LBB1_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorl	%r13d, %r13d
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	15(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-16, %ecx
	negl	%ecx
	addl	%ecx, %eax
	addl	$-8, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, (%rsp,%r13,4)
	incq	%r13
	cmpq	$32, %r13
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	leaq	(%rbx,%r15,4), %rdi
	movl	$128, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	addq	$32, %r15
	leal	-32(%r12), %eax
	cmpl	$32, %r12d
	movl	%eax, %r12d
	ja	.LBB1_1
# %bb.4:
	movq	%rsp, %rdi
	callq	hipHostUnregister
	addq	$128, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_ZL16fill_rand_matrixPf, .Lfunc_end1-_ZL16fill_rand_matrixPf
	.cfi_endproc
                                        # -- End function
	.type	_ZL24__device_stub__k_mat_muliPfPKfS1_,@function # -- Begin function _ZL24__device_stub__k_mat_muliPfPKfS1_
_ZL24__device_stub__k_mat_muliPfPKfS1_: # @_ZL24__device_stub__k_mat_muliPfPKfS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZL9k_mat_muliPfPKfS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_ZL24__device_stub__k_mat_muliPfPKfS1_, .Lfunc_end2-_ZL24__device_stub__k_mat_muliPfPKfS1_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZL9k_mat_muliPfPKfS1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_ZL9k_mat_muliPfPKfS1_,@object  # @_ZL9k_mat_muliPfPKfS1_
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
_ZL9k_mat_muliPfPKfS1_:
	.quad	_ZL24__device_stub__k_mat_muliPfPKfS1_
	.size	_ZL9k_mat_muliPfPKfS1_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%+6.2f "
	.size	.L.str, 8

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_ZL9k_mat_muliPfPKfS1_"
	.size	.L__unnamed_1, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _ZL24__device_stub__k_mat_muliPfPKfS1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZL9k_mat_muliPfPKfS1_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._ZL9k_mat_muliPfPKfS1_,"axG",@progbits,_ZL9k_mat_muliPfPKfS1_,comdat
	.globl	_ZL9k_mat_muliPfPKfS1_          ; -- Begin function _ZL9k_mat_muliPfPKfS1_
	.p2align	8
	.type	_ZL9k_mat_muliPfPKfS1_,@function
_ZL9k_mat_muliPfPKfS1_:                 ; @_ZL9k_mat_muliPfPKfS1_
; %bb.0:
	s_clause 0x3
	s_load_b32 s9, s[0:1], 0x2c
	s_load_b32 s10, s[0:1], 0x0
	s_load_b32 s8, s[0:1], 0x20
	s_load_b64 s[2:3], s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	s_load_b128 s[4:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s9, 16
	s_and_b32 s1, s9, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s0, v[1:2]
	v_and_b32_e32 v3, 0x3ff, v0
	s_cmp_eq_u32 s8, 0
	s_mov_b32 s9, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, s10
	s_cbranch_scc1 .LBB0_6
; %bb.1:                                ; %.lr.ph46
	s_mul_i32 s0, s0, s1
	v_mul_u32_u24_e32 v1, s1, v1
	s_lshl_b32 s0, s0, 2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v2, v3
	s_add_i32 s0, s0, 0
	s_cmp_lg_u32 s1, 0
	v_add_lshl_u32 v5, v1, v3, 2
	s_cselect_b32 s10, -1, 0
	v_lshl_add_u32 v6, v3, 2, s0
	v_cndmask_b32_e64 v9, 0, 1, s10
	v_lshl_add_u32 v7, v1, 2, 0
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v4, 0, v5
	v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v5, s0, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_ne_u32_e64 s0, 1, v9
	s_lshl_b32 s10, s1, 2
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[9:10], null, s9, s1, v[0:1]
	v_mov_b32_e32 v10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v11, vcc_lo, s6, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v10, vcc_lo
	v_add_co_u32 v9, vcc_lo, s2, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
	s_and_b32 vcc_lo, exec_lo, s0
	global_load_b32 v11, v[11:12], off
	global_load_b32 v9, v[9:10], off
	s_waitcnt vmcnt(1)
	ds_store_b32 v4, v11
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v9
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_5
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v9, v6
	s_mov_b32 s11, 0
.LBB0_4:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v10, s11, v7
	s_add_i32 s11, s11, 4
	ds_load_b32 v11, v9
	ds_load_b32 v10, v10
	v_add_nc_u32_e32 v9, s10, v9
	s_cmp_eq_u32 s10, s11
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v1, v10, v11
	s_cbranch_scc0 .LBB0_4
.LBB0_5:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s9, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s9, s8
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_7
.LBB0_6:
	v_mov_b32_e32 v1, 0
.LBB0_7:                                ; %Flow67
	s_mul_i32 s14, s14, s1
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, s14, v3, v2
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_store_b32 v[2:3], v1, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZL9k_mat_muliPfPKfS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZL9k_mat_muliPfPKfS1_,"axG",@progbits,_ZL9k_mat_muliPfPKfS1_,comdat
.Lfunc_end0:
	.size	_ZL9k_mat_muliPfPKfS1_, .Lfunc_end0-_ZL9k_mat_muliPfPKfS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 480
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _ZL9k_mat_muliPfPKfS1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _ZL9k_mat_muliPfPKfS1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
