#include<bits/stdc++.h>
#include<cuda_runtime.h>
#include<device_launch_parameters.h>
using namespace std;

#define N 2048


void initialise(int* v,int n){
  for(int i = 0;i<n;i++){
    v[i] = rand()%1000;
  }
}

__global__ void mat_vec_mult(int* mat,int*v,int* res,int n){
  int tid = threadIdx.x;
  res[tid] = 0;
  for(int i =0;i<n;i++){
    res[tid] = res[tid] + mat[ tid*n + i]*v[i];
  }
}


int main(){

  int *h_mat,*h_v,*h_r;
  int *d_mat,*d_v,*d_r;
  int *s_r;

  float elapsed_cpu, elapsed_gpu;
  clock_t t1, t2;

  h_mat =(int*)malloc(N*N*sizeof(int));
  h_v = (int*)malloc(N*sizeof(int));
  h_r = (int*)malloc(N*sizeof(int));
  s_r = (int*)malloc(N*sizeof(int));

  cudaMalloc(&d_mat,N*N*sizeof(int));
  cudaMalloc(&d_v,N*sizeof(int));
  cudaMalloc(&d_r,N*sizeof(int));

  initialise(h_mat,N*N);
  initialise(h_v,N);

  //serial
  t1 = clock();
  for(int i =0;i<N;i++){
    s_r[i]=0;
    for(int j=0;j<N;j++){
      s_r[i] = s_r[i] + h_mat[i*N + j]*h_v[j];
    }
  }
  t2 = clock();


  //parallel

  cudaEvent_t start, stop;

  cudaEventCreate(&start);

  cudaEventCreate(&stop);

  cudaEventRecord(start, 0);

  cudaMemcpy(d_mat,h_mat,N*N*sizeof(int),cudaMemcpyHostToDevice);
  cudaMemcpy(d_v,h_v,N*sizeof(int),cudaMemcpyHostToDevice);

  mat_vec_mult<<<1,N>>>(d_mat,d_v,d_r,N);

  cudaMemcpy(h_r,d_r,N*sizeof(int),cudaMemcpyDeviceToHost);


  cudaEventRecord(stop, 0);

  cudaEventSynchronize(stop);

  cudaEventElapsedTime(&elapsed_gpu, start, stop);

  cudaEventDestroy(start);

  cudaEventDestroy(stop);

  elapsed_cpu = ((float)t2 - (float)t1) / CLOCKS_PER_SEC * 1000;	//cpu elapsed time in ms

  cout<<elapsed_cpu<<endl;
  cout<<elapsed_gpu<<endl;
  cout<<"speedup "<<elapsed_cpu/elapsed_gpu<<endl;

  for(int i =0;i<N;i++){
    if(s_r[i]!=h_r[i]){
      cout<<"failed";
      break;
    }
  }






  return 0;
}

	.file	"tmpxft_00298275_00000000-6_matrix_vec.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10829:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE10829:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10initialisePii
	.type	_Z10initialisePii, @function
_Z10initialisePii:
.LFB10825:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$1000, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L3:
	cmpl	%ebx, %ebp
	jle	.L7
	call	rand@PLT
	cltd
	idivl	%r13d
	movl	%edx, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L3
.L7:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10825:
	.size	_Z10initialisePii, .-_Z10initialisePii
	.globl	_Z37__device_stub__Z12mat_vec_multPiS_S_iPiS_S_i
	.type	_Z37__device_stub__Z12mat_vec_multPiS_S_iPiS_S_i, @function
_Z37__device_stub__Z12mat_vec_multPiS_S_iPiS_S_i:
.LFB10851:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12mat_vec_multPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10851:
	.size	_Z37__device_stub__Z12mat_vec_multPiS_S_iPiS_S_i, .-_Z37__device_stub__Z12mat_vec_multPiS_S_iPiS_S_i
	.globl	_Z12mat_vec_multPiS_S_i
	.type	_Z12mat_vec_multPiS_S_i, @function
_Z12mat_vec_multPiS_S_i:
.LFB10852:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z12mat_vec_multPiS_S_iPiS_S_i
	.cfi_endproc
.LFE10852:
	.size	_Z12mat_vec_multPiS_S_i, .-_Z12mat_vec_multPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"speedup "
.LC3:
	.string	"failed"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB10826:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$16777216, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$8192, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$8192, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$8192, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	leaq	24(%rsp), %rdi
	movl	$16777216, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$8192, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$8192, %esi
	call	cudaMalloc@PLT
	movl	$4194304, %esi
	movq	%r13, %rdi
	call	_Z10initialisePii
	movl	$2048, %esi
	movq	%r12, %rdi
	call	_Z10initialisePii
	call	clock@PLT
	movq	%rax, %r14
	xorl	%eax, %eax
.L15:
	movq	%rax, %rdi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	salq	$13, %rdi
	addq	%r13, %rdi
.L14:
	movl	(%rdi,%rdx), %esi
	imull	(%r12,%rdx), %esi
	addq	$4, %rdx
	addl	%esi, %ecx
	cmpq	$8192, %rdx
	jne	.L14
	movl	%ecx, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$2048, %rax
	jne	.L15
	call	clock@PLT
	leaq	48(%rsp), %rdi
	movq	%rax, %r15
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$16777216, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$8192, %edx
	call	cudaMemcpy@PLT
	movl	$2097153, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$11, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$2048, %ecx
	movq	24(%rsp), %rdi
	call	_Z37__device_stub__Z12mat_vec_multPiS_S_iPiS_S_i
.L16:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movl	$8192, %edx
	movq	%rbx, %rdi
	leaq	_ZSt4cout(%rip), %r12
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	76(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	48(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	56(%rsp), %rdi
	call	cudaEventDestroy@PLT
	cvtsi2ssq	%r14, %xmm0
	movq	%r12, %rdi
	cvtsi2ssq	%r15, %xmm1
	subss	%xmm0, %xmm1
	divss	.LC0(%rip), %xmm1
	mulss	.LC1(%rip), %xmm1
	cvtss2sd	%xmm1, %xmm0
	movss	%xmm1, 12(%rsp)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	%r12, %rdi
	cvtss2sd	76(%rsp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	.LC2(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	12(%rsp), %xmm1
	divss	76(%rsp), %xmm1
	cvtss2sd	%xmm1, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	xorl	%eax, %eax
.L19:
	movl	(%rbx,%rax), %ecx
	cmpl	%ecx, 0(%rbp,%rax)
	je	.L17
	leaq	.LC3(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L18
.L17:
	addq	$4, %rax
	cmpq	$8192, %rax
	jne	.L19
.L18:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10826:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z12mat_vec_multPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB10854:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12mat_vec_multPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE10854:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1232348160
	.align 4
.LC1:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include<bits/stdc++.h>
#include<hip/hip_runtime.h>

using namespace std;

#define N 2048


void initialise(int* v,int n){
  for(int i = 0;i<n;i++){
    v[i] = rand()%1000;
  }
}

__global__ void mat_vec_mult(int* mat,int*v,int* res,int n){
  int tid = threadIdx.x;
  res[tid] = 0;
  for(int i =0;i<n;i++){
    res[tid] = res[tid] + mat[ tid*n + i]*v[i];
  }
}


int main(){

  int *h_mat,*h_v,*h_r;
  int *d_mat,*d_v,*d_r;
  int *s_r;

  float elapsed_cpu, elapsed_gpu;
  clock_t t1, t2;

  h_mat =(int*)malloc(N*N*sizeof(int));
  h_v = (int*)malloc(N*sizeof(int));
  h_r = (int*)malloc(N*sizeof(int));
  s_r = (int*)malloc(N*sizeof(int));

  hipMalloc(&d_mat,N*N*sizeof(int));
  hipMalloc(&d_v,N*sizeof(int));
  hipMalloc(&d_r,N*sizeof(int));

  initialise(h_mat,N*N);
  initialise(h_v,N);

  //serial
  t1 = clock();
  for(int i =0;i<N;i++){
    s_r[i]=0;
    for(int j=0;j<N;j++){
      s_r[i] = s_r[i] + h_mat[i*N + j]*h_v[j];
    }
  }
  t2 = clock();


  //parallel

  hipEvent_t start, stop;

  hipEventCreate(&start);

  hipEventCreate(&stop);

  hipEventRecord(start, 0);

  hipMemcpy(d_mat,h_mat,N*N*sizeof(int),hipMemcpyHostToDevice);
  hipMemcpy(d_v,h_v,N*sizeof(int),hipMemcpyHostToDevice);

  mat_vec_mult<<<1,N>>>(d_mat,d_v,d_r,N);

  hipMemcpy(h_r,d_r,N*sizeof(int),hipMemcpyDeviceToHost);


  hipEventRecord(stop, 0);

  hipEventSynchronize(stop);

  hipEventElapsedTime(&elapsed_gpu, start, stop);

  hipEventDestroy(start);

  hipEventDestroy(stop);

  elapsed_cpu = ((float)t2 - (float)t1) / CLOCKS_PER_SEC * 1000;	//cpu elapsed time in ms

  cout<<elapsed_cpu<<endl;
  cout<<elapsed_gpu<<endl;
  cout<<"speedup "<<elapsed_cpu/elapsed_gpu<<endl;

  for(int i =0;i<N;i++){
    if(s_r[i]!=h_r[i]){
      cout<<"failed";
      break;
    }
  }






  return 0;
}

	.text
	.file	"matrix_vec.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z10initialisePii               # -- Begin function _Z10initialisePii
	.type	_Z10initialisePii,@function
_Z10initialisePii:                      # @_Z10initialisePii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB0_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB0_4:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z10initialisePii, .Lfunc_end0-_Z10initialisePii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__mat_vec_multPiS_S_i # -- Begin function _Z27__device_stub__mat_vec_multPiS_S_i
	.type	_Z27__device_stub__mat_vec_multPiS_S_i,@function
_Z27__device_stub__mat_vec_multPiS_S_i: # @_Z27__device_stub__mat_vec_multPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12mat_vec_multPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z27__device_stub__mat_vec_multPiS_S_i, .Lfunc_end1-_Z27__device_stub__mat_vec_multPiS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x49742400                      # float 1.0E+6
.LCPI2_1:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$16777216, %edi                 # imm = 0x1000000
	callq	malloc
	movq	%rax, %r12
	movl	$8192, %edi                     # imm = 0x2000
	callq	malloc
	movq	%rax, %r15
	movl	$8192, %edi                     # imm = 0x2000
	callq	malloc
	movq	%rax, %rbx
	movl	$8192, %edi                     # imm = 0x2000
	callq	malloc
	movq	%rax, %r14
	leaq	40(%rsp), %rdi
	movl	$16777216, %esi                 # imm = 0x1000000
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$8192, %esi                     # imm = 0x2000
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$8192, %esi                     # imm = 0x2000
	callq	hipMalloc
	xorl	%r13d, %r13d
.LBB2_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	movl	%eax, (%r12,%r13,4)
	incq	%r13
	cmpq	$4194304, %r13                  # imm = 0x400000
	jne	.LBB2_1
# %bb.2:                                # %.lr.ph.i35.preheader
	xorl	%r13d, %r13d
.LBB2_3:                                # %.lr.ph.i35
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	movl	%eax, (%r15,%r13,4)
	incq	%r13
	cmpq	$2048, %r13                     # imm = 0x800
	jne	.LBB2_3
# %bb.4:                                # %_Z10initialisePii.exit39
	xorl	%r13d, %r13d
	callq	clock
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	%r12, %rax
.LBB2_5:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_6 Depth 2
	xorl	%edx, %edx
	xorl	%ecx, %ecx
.LBB2_6:                                #   Parent Loop BB2_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r15,%rdx,4), %esi
	imull	(%rax,%rdx,4), %esi
	addl	%esi, %ecx
	incq	%rdx
	cmpq	$2048, %rdx                     # imm = 0x800
	jne	.LBB2_6
# %bb.7:                                #   in Loop: Header=BB2_5 Depth=1
	movl	%ecx, (%r14,%r13,4)
	incq	%r13
	addq	$8192, %rax                     # imm = 0x2000
	cmpq	$2048, %r13                     # imm = 0x800
	jne	.LBB2_5
# %bb.8:
	callq	clock
	movq	%rax, %rbp
	leaq	16(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r13), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	40(%rsp), %rdi
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	movl	$8192, %edx                     # imm = 0x2000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	2047(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.9:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	$2048, %ecx                     # imm = 0x800
	callq	_Z27__device_stub__mat_vec_multPiS_S_i
.LBB2_10:
	movq	24(%rsp), %rsi
	movl	$8192, %edx                     # imm = 0x2000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	xorl	%r13d, %r13d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	52(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	cvtsi2ss	%rbp, %xmm1
	cvtsi2ssq	8(%rsp), %xmm0          # 8-byte Folded Reload
	subss	%xmm0, %xmm1
	divss	.LCPI2_0(%rip), %xmm1
	mulss	.LCPI2_1(%rip), %xmm1
	movss	%xmm1, 8(%rsp)                  # 4-byte Spill
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$8, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	8(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	(%r15), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB2_12:                               # =>This Inner Loop Header: Depth=1
	movl	(%r14,%r13,4), %eax
	cmpl	(%rbx,%r13,4), %eax
	jne	.LBB2_13
# %bb.11:                               #   in Loop: Header=BB2_12 Depth=1
	incq	%r13
	cmpq	$2048, %r13                     # imm = 0x800
	jne	.LBB2_12
	jmp	.LBB2_14
.LBB2_13:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB2_14:                               # %.loopexit
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12mat_vec_multPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12mat_vec_multPiS_S_i,@object # @_Z12mat_vec_multPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z12mat_vec_multPiS_S_i
	.p2align	3, 0x0
_Z12mat_vec_multPiS_S_i:
	.quad	_Z27__device_stub__mat_vec_multPiS_S_i
	.size	_Z12mat_vec_multPiS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"speedup "
	.size	.L.str, 9

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"failed"
	.size	.L.str.1, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12mat_vec_multPiS_S_i"
	.size	.L__unnamed_1, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__mat_vec_multPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12mat_vec_multPiS_S_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12mat_vec_multPiS_S_i ; -- Begin function _Z12mat_vec_multPiS_S_i
	.globl	_Z12mat_vec_multPiS_S_i
	.p2align	8
	.type	_Z12mat_vec_multPiS_S_i,@function
_Z12mat_vec_multPiS_S_i:                ; @_Z12mat_vec_multPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x18
	s_load_b64 s[4:5], s[0:1], 0x10
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s6, 1
	global_store_b32 v2, v1, s[4:5]
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mul_lo_u32 v0, v0, s6
	v_add_co_u32 v2, s4, s4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v3, null, s5, 0, s4
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v8, v[4:5], off
	global_load_b32 v9, v1, s[2:3]
	v_add_co_u32 v4, vcc_lo, v4, 4
	s_add_i32 s6, s6, -1
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s6, 0
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v9, v8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v0, v6
	global_store_b32 v[2:3], v6, off
	s_cbranch_scc0 .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12mat_vec_multPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 7
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12mat_vec_multPiS_S_i, .Lfunc_end0-_Z12mat_vec_multPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 204
; NumSgprs: 9
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 9
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12mat_vec_multPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     9
    .sgpr_spill_count: 0
    .symbol:         _Z12mat_vec_multPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
