/**
https://blog.csdn.net/Bruce_0712/article/details/64928442

cudaDeviceSynchronize()：该方法将停止CPU端线程的执行，直到GPU端完成之前CUDA的任务，包括kernel函数、数据拷贝等。
cudaThreadSynchronize()：该方法的作用和cudaDeviceSynchronize()基本相同，但它不是一个被推荐的方法，也许在后期版本的CUDA中会被删除。
cudaStreamSynchronize()：这个方法接受一个stream ID，它将阻止CPU执行直到GPU端完成相应stream ID的所有CUDA任务，但其它stream中的CUDA任务可能执行完也可能没有执行完。

跨warp进行同步，您需要使用 __ syncthreads（）

(1)在同一个warp内的线程读写shared/global 不需同步,
  读写global和shared是立刻对本warp内的其他线程立刻可见的。

(2)在同一个block内的不同warp内线程读写shared/global 需同步,
    这种读写必须使用__syncthreads(), 或者__threadfence()来实现不同的读写可见效果。

(3)在同一个grid内的不同block内的线程读写shared/gloabl 需要同步
    这种读写必须使用__threadfence*()来实现一定的读写可见效果。


// 执行结果
[vec_add.cu:59] GPU 实现向量的加法
allocated 76.29 MB on GPU
GPU cost time=0.109505s	last_num=4e+07
CPU cost time=2.46585s	last_num=4e+07

*/
#include <iostream>
#include <stdio.h>
#include <cuda.h>
#include <cmath>
#include <ctime>

#define mycout cout<<"["<<__FILE__<<":"<<__LINE__<<"] "
#define use_warmup 1
using namespace std;
typedef float FLOAT;


// GPU预热(可以提升GPU计算速度)
void warmup();

// CPU 向量加法
// __host__ void vec_add_host(FLOAT *x,FLOAT* y,FLOAT *z,int N);
// or host函数__host__可以省略
 void vec_add_host(FLOAT *x,FLOAT *y,FLOAT *z,int N);


 // GPU 函数
 __global__ void vec_add(FLOAT *x,FLOAT *y,FLOAT *z,int N)
 {
     // 获取线程id（同时有很多个线程在执行这个函数，通过线程id区分）
     /**
     * <<<(256,256),256>>>  grid 2维 block 1维  tid=threadIdx.x+blockDim.x*blockIdx.x+blockDim.x*gridDim.x*blockIdx.y
     * <<<256,256>>>  grid 1维 block 1维  tid=threadIdx.x+blockDim.x*blockIdx.x
     * <<<1,256>>>  grid 1维 block 1维  tid=threadIdx.x
     * <<<256,1>>>  grid 1维 block 1维  tid=blockDim.x*blockIdx.x
     */
     int tid=threadIdx.x+blockDim.x*blockIdx.x+blockDim.x*gridDim.x*blockIdx.y;

     if (tid<N) z[tid]=x[tid]+y[tid]; // 开的线程数必须大于数据总数，保证每个数据都能参与计算
     // __syncthreads(); // 线程同步
 }


int main(int argc, char *argv[])
{
    mycout<<"GPU 实现向量的加法"<<endl;

    int N = 20000000;
    int nbytes = N * sizeof(FLOAT);

    /* 1D block */
    int bs = 256;

    /* 2D grid */
    // int s = ceil(sqrt((N + bs - 1.) / bs));
    int s = ceil(sqrt(1.0*N / bs));
    dim3 grid = dim3(s, s);

    // dx 表示gpu变量，hx表示cpu变量
    FLOAT *dx = NULL, *hx = NULL;
    FLOAT *dy = NULL, *hy = NULL;
    FLOAT *dz = NULL, *hz = NULL;

    int itr = 30;
    int i;
    // double th, td;

    /**======1、CPU 创建变量赋值==========*/
    /* alllocate CPU mem */
    hx = (FLOAT *) malloc(nbytes);
    hy = (FLOAT *) malloc(nbytes);
    hz = (FLOAT *) malloc(nbytes);

    if (hx == NULL || hy == NULL || hz == NULL) {
        // printf("couldn't allocate CPU memory\n");
        mycout<<"couldn't allocate CPU memory"<<endl;
        return -2;
    }

    /*给CPU变量赋值*/
    // fill the arrays 'hx' and 'hy' on the CPU
    for (int i=0; i<N; i++) {
        hx[i] = i;
        hy[i] = i ;
    }

    /* warm up GPU */
    #if  use_warmup
    warmup();  // 预热
    #endif // use_warmup

    /**======2、GPU 分配内存======*/
    /* allocate GPU mem */
    cudaMalloc((void **)&dx, nbytes);
    cudaMalloc((void **)&dy, nbytes);
    cudaMalloc((void **)&dz, nbytes);

    if (dx == NULL || dy == NULL || dz == NULL) {
        // printf("couldn't allocate GPU memory\n");
        mycout<<"couldn't allocate GPU memory"<<endl;
        return -1;
    }

    printf("allocated %.2f MB on GPU\n", nbytes / (1024.f * 1024.f));

    /**======3、将CPU数据拷贝给GPU======*/
    /** copy data to GPU */
    cudaMemcpy(dx, hx, nbytes, cudaMemcpyHostToDevice);
    cudaMemcpy(dy, hy, nbytes, cudaMemcpyHostToDevice);

    /* warm up GPU */
    #if  use_warmup
    warmup();  // 预热
    #endif // use_warmup

    /**======4、调用GPU计算======*/
    /* call GPU */
    // cudaThreadSynchronize(); // 线程同步，等到前面的GPU数据拷贝完成
    cudaDeviceSynchronize();  // cudaThreadSynchronize() 弃用了

    clock_t start = clock();
    for (i = 0; i < itr; i++) vec_add<<<grid, bs>>>(dx, dy, dz, N);
    // cudaThreadSynchronize(); // 线程同步 等待所有线程处理完成
    cudaDeviceSynchronize();  // cudaThreadSynchronize() 弃用了

    /**======5、GPU计算结果拷贝给CPU======*/
    cudaMemcpy(hz,dz, nbytes, cudaMemcpyDeviceToHost);

    cout<<"GPU cost time="<<(double)(clock()-start)/CLOCKS_PER_SEC <<"s\t"<<
    "last_num="<<hz[N-1]<<endl;

    // 计算CPU的时间
    start = clock();
    for (i = 0; i < itr; i++) vec_add_host(hx, hy, hz, N);
    cout<<"CPU cost time="<<(double)(clock()-start)/CLOCKS_PER_SEC <<"s\t"<<
    "last_num="<<hz[N-1]<<endl;

    // 释放内存
    cudaFree(dx);
    cudaFree(dy);
    cudaFree(dz);

    free(hx);
    free(hy);
    free(hz);

    return 0;
}

/* warm up GPU */
__global__ void warmup_knl()
{
    int i, j;

    i = 1;
    j = 2;
    i = i + j;
}

void warmup()
{
    int i;

    for (i = 0; i < 8; i++) {
        warmup_knl<<<1, 256>>>();
    }
}

 void vec_add_host(FLOAT *x,FLOAT *y,FLOAT *z,int N)
 {
     for(int i=0;i<N;i++)
     {
         z[i]=x[i]+y[i];
     }
 }

	.file	"tmpxft_002ea802_00000000-6_vec_add1.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4298:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4298:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z12vec_add_hostPfS_S_i
	.type	_Z12vec_add_hostPfS_S_i, @function
_Z12vec_add_hostPfS_S_i:
.LFB3637:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L4:
	cmpl	%eax, %ecx
	jle	.L7
	movss	(%rdi,%rax,4), %xmm0
	addss	(%rsi,%rax,4), %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	jmp	.L4
.L7:
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z12vec_add_hostPfS_S_i, .-_Z12vec_add_hostPfS_S_i
	.globl	_Z31__device_stub__Z7vec_addPfS_S_iPfS_S_i
	.type	_Z31__device_stub__Z7vec_addPfS_S_iPfS_S_i, @function
_Z31__device_stub__Z7vec_addPfS_S_iPfS_S_i:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7vec_addPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z31__device_stub__Z7vec_addPfS_S_iPfS_S_i, .-_Z31__device_stub__Z7vec_addPfS_S_iPfS_S_i
	.globl	_Z7vec_addPfS_S_i
	.type	_Z7vec_addPfS_S_i, @function
_Z7vec_addPfS_S_i:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z7vec_addPfS_S_iPfS_S_i
	.cfi_endproc
.LFE3663:
	.size	_Z7vec_addPfS_S_i, .-_Z7vec_addPfS_S_i
	.globl	_Z29__device_stub__Z10warmup_knlvv
	.type	_Z29__device_stub__Z10warmup_knlvv, @function
_Z29__device_stub__Z10warmup_knlvv:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z10warmup_knlv(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L13:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z29__device_stub__Z10warmup_knlvv, .-_Z29__device_stub__Z10warmup_knlvv
	.globl	_Z10warmup_knlv
	.type	_Z10warmup_knlv, @function
_Z10warmup_knlv:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z10warmup_knlvv
	.cfi_endproc
.LFE3665:
	.size	_Z10warmup_knlv, .-_Z10warmup_knlv
	.globl	_Z6warmupv
	.type	_Z6warmupv, @function
_Z6warmupv:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$16777217, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	salq	$8, %rbp
	movl	$8, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 64
.L20:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbp, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	call	_Z29__device_stub__Z10warmup_knlvv
.L19:
	decl	%ebx
	jne	.L20
	addq	$40, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z6warmupv, .-_Z6warmupv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"["
.LC1:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/wucng/Study/master/cuda/example/vec_add1.cu"
.LC2:
	.string	":"
.LC3:
	.string	"] "
.LC4:
	.string	"GPU \345\256\236\347\216\260\345\220\221\351\207\217\347\232\204\345\212\240\346\263\225"
.LC5:
	.string	"couldn't allocate CPU memory"
.LC6:
	.string	"couldn't allocate GPU memory"
.LC8:
	.string	"allocated %.2f MB on GPU\n"
.LC9:
	.string	"GPU cost time="
.LC11:
	.string	"s\t"
.LC12:
	.string	"last_num="
.LC13:
	.string	"CPU cost time="
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %r15
	leaq	_ZSt4cout(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r15, %rsi
	leaq	.LC1(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leaq	.LC2(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$67, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$80000000, %edi
	movabsq	$1202590843160, %rax
	movl	$1, 56(%rsp)
	movq	%rax, 48(%rsp)
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)
	movq	%rax, 32(%rsp)
	movq	%rax, 40(%rsp)
	call	malloc@PLT
	movl	$80000000, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$80000000, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	testq	%r12, %r12
	movq	%rax, %rbx
	sete	%al
	testq	%rbp, %rbp
	sete	%dl
	orb	%dl, %al
	jne	.L34
	xorl	%eax, %eax
	testq	%rbx, %rbx
	jne	.L24
.L34:
	movq	%r15, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$97, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$-2, %eax
	jmp	.L23
.L24:
	cvtsi2ssl	%eax, %xmm0
	movss	%xmm0, (%r12,%rax,4)
	movss	%xmm0, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$20000000, %rax
	jne	.L24
	call	_Z6warmupv
	leaq	24(%rsp), %rdi
	movl	$80000000, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$80000000, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$80000000, %esi
	call	cudaMalloc@PLT
	cmpq	$0, 24(%rsp)
	je	.L27
	cmpq	$0, 32(%rsp)
	je	.L27
	cmpq	$0, 40(%rsp)
	jne	.L28
.L27:
	movq	%r15, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$121, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	orl	$-1, %eax
	jmp	.L23
.L28:
	movsd	.LC7(%rip), %xmm0
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movabsq	$4294967552, %r15
	movl	$30, %r14d
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$80000000, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$80000000, %edx
	call	cudaMemcpy@PLT
	call	_Z6warmupv
	call	cudaDeviceSynchronize@PLT
	call	clock@PLT
	movq	%rax, %r13
.L30:
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, %rdx
	movl	$1, %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$20000000, %ecx
	movq	24(%rsp), %rdi
	call	_Z31__device_stub__Z7vec_addPfS_S_iPfS_S_i
.L29:
	decl	%r14d
	jne	.L30
	call	cudaDeviceSynchronize@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$80000000, %edx
	leaq	.LC12(%rip), %r15
	call	cudaMemcpy@PLT
	leaq	.LC9(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %r14
	call	clock@PLT
	movq	%r14, %rdi
	leaq	.LC11(%rip), %r14
	subq	%r13, %rax
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC10(%rip), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	79999996(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	call	clock@PLT
	movl	$30, %r8d
	movq	%rax, %r13
.L31:
	movl	$20000000, %ecx
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movq	%r12, %rdi
	call	_Z12vec_add_hostPfS_S_i
	decl	%r8d
	jne	.L31
	leaq	.LC13(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, 8(%rsp)
	call	clock@PLT
	movq	8(%rsp), %rdi
	subq	%r13, %rax
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC10(%rip), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	79999996(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	xorl	%eax, %eax
.L23:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC14:
	.string	"_Z10warmup_knlv"
.LC15:
	.string	"_Z7vec_addPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3667:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10warmup_knlv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7vec_addPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3667:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC7:
	.long	0
	.long	1079186128
	.align 8
.LC10:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
https://blog.csdn.net/Bruce_0712/article/details/64928442

cudaDeviceSynchronize()：该方法将停止CPU端线程的执行，直到GPU端完成之前CUDA的任务，包括kernel函数、数据拷贝等。
cudaThreadSynchronize()：该方法的作用和cudaDeviceSynchronize()基本相同，但它不是一个被推荐的方法，也许在后期版本的CUDA中会被删除。
cudaStreamSynchronize()：这个方法接受一个stream ID，它将阻止CPU执行直到GPU端完成相应stream ID的所有CUDA任务，但其它stream中的CUDA任务可能执行完也可能没有执行完。

跨warp进行同步，您需要使用 __ syncthreads（）

(1)在同一个warp内的线程读写shared/global 不需同步,
  读写global和shared是立刻对本warp内的其他线程立刻可见的。

(2)在同一个block内的不同warp内线程读写shared/global 需同步,
    这种读写必须使用__syncthreads(), 或者__threadfence()来实现不同的读写可见效果。

(3)在同一个grid内的不同block内的线程读写shared/gloabl 需要同步
    这种读写必须使用__threadfence*()来实现一定的读写可见效果。


// 执行结果
[vec_add.cu:59] GPU 实现向量的加法
allocated 76.29 MB on GPU
GPU cost time=0.109505s	last_num=4e+07
CPU cost time=2.46585s	last_num=4e+07

*/
#include <iostream>
#include <stdio.h>
#include <hip/hip_runtime.h>
#include <cmath>
#include <ctime>

#define mycout cout<<"["<<__FILE__<<":"<<__LINE__<<"] "
#define use_warmup 1
using namespace std;
typedef float FLOAT;


// GPU预热(可以提升GPU计算速度)
void warmup();

// CPU 向量加法
// __host__ void vec_add_host(FLOAT *x,FLOAT* y,FLOAT *z,int N);
// or host函数__host__可以省略
 void vec_add_host(FLOAT *x,FLOAT *y,FLOAT *z,int N);


 // GPU 函数
 __global__ void vec_add(FLOAT *x,FLOAT *y,FLOAT *z,int N)
 {
     // 获取线程id（同时有很多个线程在执行这个函数，通过线程id区分）
     /**
     * <<<(256,256),256>>>  grid 2维 block 1维  tid=threadIdx.x+blockDim.x*blockIdx.x+blockDim.x*gridDim.x*blockIdx.y
     * <<<256,256>>>  grid 1维 block 1维  tid=threadIdx.x+blockDim.x*blockIdx.x
     * <<<1,256>>>  grid 1维 block 1维  tid=threadIdx.x
     * <<<256,1>>>  grid 1维 block 1维  tid=blockDim.x*blockIdx.x
     */
     int tid=threadIdx.x+blockDim.x*blockIdx.x+blockDim.x*gridDim.x*blockIdx.y;

     if (tid<N) z[tid]=x[tid]+y[tid]; // 开的线程数必须大于数据总数，保证每个数据都能参与计算
     // __syncthreads(); // 线程同步
 }


int main(int argc, char *argv[])
{
    mycout<<"GPU 实现向量的加法"<<endl;

    int N = 20000000;
    int nbytes = N * sizeof(FLOAT);

    /* 1D block */
    int bs = 256;

    /* 2D grid */
    // int s = ceil(sqrt((N + bs - 1.) / bs));
    int s = ceil(sqrt(1.0*N / bs));
    dim3 grid = dim3(s, s);

    // dx 表示gpu变量，hx表示cpu变量
    FLOAT *dx = NULL, *hx = NULL;
    FLOAT *dy = NULL, *hy = NULL;
    FLOAT *dz = NULL, *hz = NULL;

    int itr = 30;
    int i;
    // double th, td;

    /**======1、CPU 创建变量赋值==========*/
    /* alllocate CPU mem */
    hx = (FLOAT *) malloc(nbytes);
    hy = (FLOAT *) malloc(nbytes);
    hz = (FLOAT *) malloc(nbytes);

    if (hx == NULL || hy == NULL || hz == NULL) {
        // printf("couldn't allocate CPU memory\n");
        mycout<<"couldn't allocate CPU memory"<<endl;
        return -2;
    }

    /*给CPU变量赋值*/
    // fill the arrays 'hx' and 'hy' on the CPU
    for (int i=0; i<N; i++) {
        hx[i] = i;
        hy[i] = i ;
    }

    /* warm up GPU */
    #if  use_warmup
    warmup();  // 预热
    #endif // use_warmup

    /**======2、GPU 分配内存======*/
    /* allocate GPU mem */
    hipMalloc((void **)&dx, nbytes);
    hipMalloc((void **)&dy, nbytes);
    hipMalloc((void **)&dz, nbytes);

    if (dx == NULL || dy == NULL || dz == NULL) {
        // printf("couldn't allocate GPU memory\n");
        mycout<<"couldn't allocate GPU memory"<<endl;
        return -1;
    }

    printf("allocated %.2f MB on GPU\n", nbytes / (1024.f * 1024.f));

    /**======3、将CPU数据拷贝给GPU======*/
    /** copy data to GPU */
    hipMemcpy(dx, hx, nbytes, hipMemcpyHostToDevice);
    hipMemcpy(dy, hy, nbytes, hipMemcpyHostToDevice);

    /* warm up GPU */
    #if  use_warmup
    warmup();  // 预热
    #endif // use_warmup

    /**======4、调用GPU计算======*/
    /* call GPU */
    // cudaThreadSynchronize(); // 线程同步，等到前面的GPU数据拷贝完成
    hipDeviceSynchronize();  // cudaThreadSynchronize() 弃用了

    clock_t start = clock();
    for (i = 0; i < itr; i++) vec_add<<<grid, bs>>>(dx, dy, dz, N);
    // cudaThreadSynchronize(); // 线程同步 等待所有线程处理完成
    hipDeviceSynchronize();  // cudaThreadSynchronize() 弃用了

    /**======5、GPU计算结果拷贝给CPU======*/
    hipMemcpy(hz,dz, nbytes, hipMemcpyDeviceToHost);

    cout<<"GPU cost time="<<(double)(clock()-start)/CLOCKS_PER_SEC <<"s\t"<<
    "last_num="<<hz[N-1]<<endl;

    // 计算CPU的时间
    start = clock();
    for (i = 0; i < itr; i++) vec_add_host(hx, hy, hz, N);
    cout<<"CPU cost time="<<(double)(clock()-start)/CLOCKS_PER_SEC <<"s\t"<<
    "last_num="<<hz[N-1]<<endl;

    // 释放内存
    hipFree(dx);
    hipFree(dy);
    hipFree(dz);

    free(hx);
    free(hy);
    free(hz);

    return 0;
}

/* warm up GPU */
__global__ void warmup_knl()
{
    int i, j;

    i = 1;
    j = 2;
    i = i + j;
}

void warmup()
{
    int i;

    for (i = 0; i < 8; i++) {
        warmup_knl<<<1, 256>>>();
    }
}

 void vec_add_host(FLOAT *x,FLOAT *y,FLOAT *z,int N)
 {
     for(int i=0;i<N;i++)
     {
         z[i]=x[i]+y[i];
     }
 }

	.text
	.file	"vec_add1.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z22__device_stub__vec_addPfS_S_i # -- Begin function _Z22__device_stub__vec_addPfS_S_i
	.type	_Z22__device_stub__vec_addPfS_S_i,@function
_Z22__device_stub__vec_addPfS_S_i:      # @_Z22__device_stub__vec_addPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7vec_addPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__vec_addPfS_S_i, .Lfunc_end0-_Z22__device_stub__vec_addPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x405312d000000000              # double 76.2939453125
.LCPI1_1:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$106, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$67, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.3, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.4, %esi
	movl	$25, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 8(%rsp)
	movl	$80000000, %edi                 # imm = 0x4C4B400
	callq	malloc
	movq	%rax, %rbx
	movl	$80000000, %edi                 # imm = 0x4C4B400
	callq	malloc
	movq	%rax, %r14
	movl	$80000000, %edi                 # imm = 0x4C4B400
	callq	malloc
	testq	%rbx, %rbx
	je	.LBB1_19
# %bb.1:
	testq	%r14, %r14
	je	.LBB1_19
# %bb.2:
	movq	%rax, %r15
	testq	%rax, %rax
	je	.LBB1_19
# %bb.3:                                # %.preheader.preheader
	xorl	%eax, %eax
.LBB1_4:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%rax,4)
	movss	%xmm0, (%r14,%rax,4)
	incq	%rax
	cmpq	$20000000, %rax                 # imm = 0x1312D00
	jne	.LBB1_4
# %bb.5:
	callq	_Z6warmupv
	leaq	24(%rsp), %r12
	movl	$80000000, %esi                 # imm = 0x4C4B400
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$80000000, %esi                 # imm = 0x4C4B400
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$80000000, %esi                 # imm = 0x4C4B400
	callq	hipMalloc
	cmpq	$0, (%r12)
	je	.LBB1_8
# %bb.6:
	cmpq	$0, 16(%rsp)
	je	.LBB1_8
# %bb.7:
	cmpq	$0, 8(%rsp)
	je	.LBB1_8
# %bb.9:
	movsd	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movl	$.L.str.7, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rdi
	movl	$80000000, %edx                 # imm = 0x4C4B400
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movl	$80000000, %edx                 # imm = 0x4C4B400
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	_Z6warmupv
	callq	hipDeviceSynchronize
	movl	$30, %r12d
	callq	clock
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movabsq	$1202590843160, %r13            # imm = 0x11800000118
	movabsq	$4294967552, %rbp               # imm = 0x100000100
.LBB1_10:                               # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:                               #   in Loop: Header=BB1_10 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$20000000, %ecx                 # imm = 0x1312D00
	callq	_Z22__device_stub__vec_addPfS_S_i
.LBB1_12:                               #   in Loop: Header=BB1_10 Depth=1
	decl	%r12d
	jne	.LBB1_10
# %bb.13:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movl	$80000000, %edx                 # imm = 0x4C4B400
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	callq	clock
	subq	32(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI1_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.9, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.10, %esi
	movl	$9, %edx
	movq	%r12, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	79999996(%r15), %xmm0
	movq	%r12, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%r13d, %r13d
	callq	clock
	movq	%rax, %r12
.LBB1_14:                               # %.lr.ph.i.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_15 Depth 2
	xorl	%eax, %eax
.LBB1_15:                               # %.lr.ph.i
                                        #   Parent Loop BB1_14 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rbx,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%r14,%rax,4), %xmm0
	movss	%xmm0, (%r15,%rax,4)
	incq	%rax
	cmpq	$20000000, %rax                 # imm = 0x1312D00
	jne	.LBB1_15
# %bb.16:                               # %_Z12vec_add_hostPfS_S_i.exit
                                        #   in Loop: Header=BB1_14 Depth=1
	incl	%r13d
	cmpl	$30, %r13d
	jne	.LBB1_14
# %bb.17:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	callq	clock
	subq	%r12, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI1_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.9, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.10, %esi
	movl	$9, %edx
	movq	%r12, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	79999996(%r15), %xmm0
	movq	%r12, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	jmp	.LBB1_18
.LBB1_19:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$106, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$97, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.3, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.5, %esi
	movl	$28, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-2, %eax
	jmp	.LBB1_18
.LBB1_8:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$106, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$121, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.3, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.6, %esi
	movl	$28, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB1_18:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z6warmupv                      # -- Begin function _Z6warmupv
	.type	_Z6warmupv,@function
_Z6warmupv:                             # @_Z6warmupv
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	$8, %ebp
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	leaq	255(%rbx), %r14
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_3
# %bb.2:                                #   in Loop: Header=BB2_1 Depth=1
	callq	_Z25__device_stub__warmup_knlv
.LBB2_3:                                #   in Loop: Header=BB2_1 Depth=1
	decl	%ebp
	jne	.LBB2_1
# %bb.4:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z6warmupv, .Lfunc_end2-_Z6warmupv
	.cfi_endproc
                                        # -- End function
	.globl	_Z12vec_add_hostPfS_S_i         # -- Begin function _Z12vec_add_hostPfS_S_i
	.type	_Z12vec_add_hostPfS_S_i,@function
_Z12vec_add_hostPfS_S_i:                # @_Z12vec_add_hostPfS_S_i
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB3_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ecx, %eax
	xorl	%ecx, %ecx
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%rsi,%rcx,4), %xmm0
	movss	%xmm0, (%rdx,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB3_2
.LBB3_3:                                # %._crit_edge
	retq
.Lfunc_end3:
	.size	_Z12vec_add_hostPfS_S_i, .Lfunc_end3-_Z12vec_add_hostPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__warmup_knlv  # -- Begin function _Z25__device_stub__warmup_knlv
	.type	_Z25__device_stub__warmup_knlv,@function
_Z25__device_stub__warmup_knlv:         # @_Z25__device_stub__warmup_knlv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_Z10warmup_knlv, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z25__device_stub__warmup_knlv, .Lfunc_end4-_Z25__device_stub__warmup_knlv
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7vec_addPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10warmup_knlv, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7vec_addPfS_S_i,@object       # @_Z7vec_addPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z7vec_addPfS_S_i
	.p2align	3, 0x0
_Z7vec_addPfS_S_i:
	.quad	_Z22__device_stub__vec_addPfS_S_i
	.size	_Z7vec_addPfS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"["
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/wucng/Study/master/cuda/example/vec_add1.hip"
	.size	.L.str.1, 107

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	":"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"] "
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"GPU \345\256\236\347\216\260\345\220\221\351\207\217\347\232\204\345\212\240\346\263\225"
	.size	.L.str.4, 26

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"couldn't allocate CPU memory"
	.size	.L.str.5, 29

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"couldn't allocate GPU memory"
	.size	.L.str.6, 29

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"allocated %.2f MB on GPU\n"
	.size	.L.str.7, 26

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"GPU cost time="
	.size	.L.str.8, 15

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"s\t"
	.size	.L.str.9, 3

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"last_num="
	.size	.L.str.10, 10

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"CPU cost time="
	.size	.L.str.11, 15

	.type	_Z10warmup_knlv,@object         # @_Z10warmup_knlv
	.section	.rodata,"a",@progbits
	.globl	_Z10warmup_knlv
	.p2align	3, 0x0
_Z10warmup_knlv:
	.quad	_Z25__device_stub__warmup_knlv
	.size	_Z10warmup_knlv, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z7vec_addPfS_S_i"
	.size	.L__unnamed_1, 18

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10warmup_knlv"
	.size	.L__unnamed_2, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__vec_addPfS_S_i
	.addrsig_sym _Z25__device_stub__warmup_knlv
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7vec_addPfS_S_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z10warmup_knlv
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7vec_addPfS_S_i       ; -- Begin function _Z7vec_addPfS_S_i
	.globl	_Z7vec_addPfS_S_i
	.p2align	8
	.type	_Z7vec_addPfS_S_i,@function
_Z7vec_addPfS_S_i:                      ; @_Z7vec_addPfS_S_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x20
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s4, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s15
	s_and_b32 s3, s3, 0xffff
	s_add_i32 s2, s2, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7vec_addPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7vec_addPfS_S_i, .Lfunc_end0-_Z7vec_addPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 196
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10warmup_knlv         ; -- Begin function _Z10warmup_knlv
	.globl	_Z10warmup_knlv
	.p2align	8
	.type	_Z10warmup_knlv,@function
_Z10warmup_knlv:                        ; @_Z10warmup_knlv
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10warmup_knlv
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 0
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 0
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10warmup_knlv, .Lfunc_end1-_Z10warmup_knlv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7vec_addPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7vec_addPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:           []
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 4
    .kernarg_segment_size: 0
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10warmup_knlv
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z10warmup_knlv.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
