////////////////////////////////////////////////////////////////////////////
// 
// 
////////////////////////////////////////////////////////////////////////////
 #include <iostream>
#include <cmath>
using namespace std;



void Kernel_2_CPU(int *A, int *B, int *Max_CPU, int *A_Location_CPU, int *B_Location_CPU,int *Kernel_2_output_A_CPU, int*Kernel_2_output_B_CPU, 
			int Sim_Exact, int Sim_Dissim, int GAP_START, int GAP_EXTEND, int Kerene2Max, int Kernel_2_Report)
{
	int *F, *E, *H, *L, *F_Loc, *E_Loc;
	
	F     = new int [(Kerene2Max+1)*(Kerene2Max+1)];
	E     = new int [(Kerene2Max+1)*(Kerene2Max+1)];
	H     = new int [(Kerene2Max+1)*(Kerene2Max+1)];
	L     = new int [(Kerene2Max+1)*(Kerene2Max+1)];
	F_Loc = new int [(Kerene2Max+1)*(Kerene2Max+1)];
	E_Loc = new int [(Kerene2Max+1)*(Kerene2Max+1)];
	

	for(int Sub_Seq = 0; Sub_Seq < Kernel_2_Report; Sub_Seq++)
    {
		for (int j=0; j<(Kerene2Max+1)*(Kerene2Max+1); j++)
		{
			F[j]=0;
			E[j]=0;
			H[j]=0;
			L[j]=0;
			F_Loc[j]=0;
			E_Loc[j]=0;
		}
		int Sim_Val = Max_CPU[Sub_Seq];
        int Start_A = A_Location_CPU[Sub_Seq];
		int Start_B = B_Location_CPU[Sub_Seq];

		int End_A   = min  (Start_A+1  ,  Kerene2Max );
		int End_B   = min  (Start_B+1  ,  Kerene2Max );
		int End_K   = End_A + End_B -1;

		int iStart,k;
		
		for (k = 0; k<End_K; ++k)
		{
			if (k<End_A)
			{
				iStart=0;
			}
			else
			{
				iStart=iStart+1;
			}
			
			int iEnd = min(k+1,End_B);

			for (int i=iStart; i<iEnd; i++)
			{
				int j=k-i;
				int H_Sim=0;
				int Num  =  i   *(End_A+1)+j;
				int Num1 = (i+1)*(End_A+1)+j;
				int Temp[10];
				
				for (int n=0; n<9; n=n+2)
				{
					Temp[n] = -2;
				}
				
				if (A[Start_A-j]==B[Start_B-i])
				{
					H_Sim = H[Num]+Sim_Exact;
					Temp[0]= H_Sim;
					Temp[1]= Num;
				}
				else
				{
					H_Sim=H[Num]+Sim_Dissim;
					Temp[8]= H_Sim;
					Temp[9]= Num;
				}
				
				Temp[2]=0;
				Temp[3]= Num1+1;
				
				if ((H[Num+1]-GAP_START)>(F[Num+1]-GAP_EXTEND))
				{
					F[Num1+1] = H[Num+1]-GAP_START;
					Temp[4] = F[Num1+1];
					Temp[5] = Num+1;
					F_Loc[Num1+1] = Num+1;
				}
				else
				{
					F[Num1+1] = F[Num+1]-GAP_EXTEND;
					Temp[4]       = F[Num1+1];
					Temp[5]       = F_Loc[Num1+1-(End_A+1)]; 
					F_Loc[Num1+1] = F_Loc[Num1+1-(End_A+1)];
				}
				
				if ((H[Num1] -GAP_START)>(E[Num1] -GAP_EXTEND))
				{
					E[Num1+1] = H[Num1] -GAP_START;
					Temp[6] = E[Num1+1]; 
					Temp[7] = Num1;
					E_Loc[Num1+1] = Num1;
				}
				else
				{
					E[Num1+1]     = E[Num1] -GAP_EXTEND;
					Temp[6]       = E[Num1+1]; 
					Temp[7]       = E_Loc[Num1]; 
					E_Loc[Num1+1] = E_Loc[Num1];
				}	
				int maxH =-1;
				int MaxL = 0;
				for (int n=0; n<9; n=n+2)
				{
					if (Temp[n]>maxH)
					{
						maxH = Temp[n];
						MaxL = Temp[n+1];
					}
				}	
				H[Num1+1] = maxH;
				L[Num1+1] = MaxL;
				

				if (maxH==Sim_Val)
				{				
				//  stop the program and start to find the track back
					int Loc_Path = 0;
					int cnt = 0;
					int Loc_Temp = Num1+1;

					while   ((H[Loc_Temp] != 0) && (Loc_Temp != Loc_Path) && (cnt<Kerene2Max)) 
					{	
						int Loc_Temp1=Loc_Temp;
						int Remind = Loc_Temp1 - int (Loc_Temp1/(End_A+1))*(End_A+1)-1;
						Kernel_2_output_A_CPU[cnt+Kerene2Max*Sub_Seq] = A_Location_CPU[Sub_Seq]- Remind;
						Kernel_2_output_B_CPU[cnt+Kerene2Max*Sub_Seq] = B_Location_CPU[Sub_Seq]-int(Loc_Temp1/(End_A+1)-1);
						
						Loc_Path = Loc_Temp;
						Loc_Temp = L[Loc_Path];
						cnt++;
					}
			
					// Check for Start point & End Point
					if ((Kernel_2_output_A_CPU[cnt-1+Kerene2Max*Sub_Seq]==A_Location_CPU[Sub_Seq]) && 
						(Kernel_2_output_B_CPU[cnt-1+Kerene2Max*Sub_Seq]==B_Location_CPU[Sub_Seq]))
					{
						k=End_K;
						i=iEnd;
					}
					else
					{
						// Delete the results that is not correct
						for (int del=cnt-1; del>=0; del--)
						{
							Kernel_2_output_A_CPU[del+Kerene2Max*Sub_Seq] =0;
							Kernel_2_output_B_CPU[del+Kerene2Max*Sub_Seq] =0;
						}
					}
				}
			} // End i
		} // diagonal
	} // block
}
	.file	"tmpxft_002351a4_00000000-6_Kernel_2_CPU.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12Kernel_2_CPUPiS_S_S_S_S_S_iiiiii
	.type	_Z12Kernel_2_CPUPiS_S_S_S_S_S_iiiiii, @function
_Z12Kernel_2_CPUPiS_S_S_S_S_S_iiiiii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r8, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$216, %rsp
	.cfi_def_cfa_offset 272
	movq	272(%rsp), %rax
	movq	%rcx, 88(%rsp)
	movq	%rsi, 136(%rsp)
	movq	%rdx, 144(%rsp)
	movq	%r9, 96(%rsp)
	movq	%rdi, 128(%rsp)
	movq	%rax, 104(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	movl	312(%rsp), %eax
	incl	%eax
	imull	%eax, %eax
	movslq	%eax, %r12
	movl	%eax, 44(%rsp)
	salq	$2, %r12
	movq	%r12, %rdi
	call	_Znam@PLT
	movq	%r12, %rdi
	movq	%rax, (%rsp)
	call	_Znam@PLT
	movq	%r12, %rdi
	movq	%rax, %rbp
	call	_Znam@PLT
	movq	%r12, %rdi
	movq	%rax, %rbx
	call	_Znam@PLT
	movq	%r12, %rdi
	movq	%rax, 8(%rsp)
	call	_Znam@PLT
	movq	%r12, %rdi
	movq	%rax, 16(%rsp)
	call	_Znam@PLT
	xorl	%r8d, %r8d
	xorl	%ecx, %ecx
	movq	%rax, 24(%rsp)
	leaq	200(%rsp), %rax
	movl	%r8d, 32(%rsp)
	movq	%rax, 152(%rsp)
.L3:
	cmpl	%ecx, 320(%rsp)
	jle	.L39
	xorl	%eax, %eax
.L27:
	cmpl	%eax, 44(%rsp)
	jle	.L40
	movq	(%rsp), %rsi
	xorl	%r13d, %r13d
	xorl	%r14d, %r14d
	xorl	%edx, %edx
	xorl	%edi, %edi
	movl	%r13d, 0(%rbp,%rax,4)
	movl	%r13d, (%rsi,%rax,4)
	movq	8(%rsp), %rsi
	movl	%r13d, (%rbx,%rax,4)
	movl	%r14d, (%rsi,%rax,4)
	movq	16(%rsp), %rsi
	movl	%edx, (%rsi,%rax,4)
	movq	24(%rsp), %rsi
	movl	%edi, (%rsi,%rax,4)
	incq	%rax
	jmp	.L27
.L40:
	movq	144(%rsp), %rax
	movq	96(%rsp), %rsi
	movl	(%rax,%rcx,4), %eax
	movl	%eax, 116(%rsp)
	movq	88(%rsp), %rax
	movl	(%rax,%rcx,4), %eax
	movl	%eax, 68(%rsp)
	movl	(%r15,%rcx,4), %eax
	movl	%eax, 72(%rsp)
	movl	68(%rsp), %eax
	leal	1(%rax), %edi
	movl	72(%rsp), %eax
	cmpl	312(%rsp), %edi
	cmovg	312(%rsp), %edi
	incl	%eax
	cmpl	312(%rsp), %eax
	cmovg	312(%rsp), %eax
	movl	%eax, 36(%rsp)
	leal	-1(%rdi,%rax), %eax
	movl	%eax, 112(%rsp)
	movslq	32(%rsp), %rax
	salq	$2, %rax
	addq	%rax, %rsi
	movq	%rsi, 56(%rsp)
	movq	104(%rsp), %rsi
	addq	%rsi, %rax
	xorl	%esi, %esi
	movq	%rax, 48(%rsp)
	leal	1(%rdi), %eax
	movl	%eax, 40(%rsp)
.L5:
	movl	112(%rsp), %eax
	cmpl	%eax, %esi
	jge	.L41
	cmpl	%edi, %esi
	jl	.L29
	incl	64(%rsp)
	jmp	.L6
.L29:
	xorl	%r12d, %r12d
	movl	%r12d, 64(%rsp)
.L6:
	movl	36(%rsp), %edx
	leal	1(%rsi), %eax
	movl	64(%rsp), %r8d
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	movl	%eax, 76(%rsp)
.L7:
	movl	76(%rsp), %eax
	cmpl	%eax, %r8d
	jge	.L42
	movl	40(%rsp), %eax
	movl	40(%rsp), %r14d
	movl	%esi, %r11d
	movl	$-2, 160(%rsp)
	subl	%r8d, %r11d
	movl	68(%rsp), %r12d
	movq	136(%rsp), %r13
	movl	$-2, 192(%rsp)
	imull	%r8d, %eax
	subl	%r11d, %r12d
	movslq	%r12d, %r12
	leal	(%rax,%r11), %edx
	addl	%r14d, %eax
	movq	128(%rsp), %r14
	addl	%r11d, %eax
	movl	72(%rsp), %r11d
	movslq	%edx, %r9
	leaq	0(,%r9,4), %r10
	movl	(%rbx,%r9,4), %r9d
	subl	%r8d, %r11d
	movslq	%r11d, %r11
	movl	0(%r13,%r11,4), %r11d
	cmpl	%r11d, (%r14,%r12,4)
	jne	.L8
	addl	280(%rsp), %r9d
	movl	%edx, 164(%rsp)
	movl	%r9d, 160(%rsp)
	jmp	.L9
.L8:
	addl	288(%rsp), %r9d
	movl	%edx, 196(%rsp)
	movl	%r9d, 192(%rsp)
.L9:
	xorl	%r11d, %r11d
	movq	(%rsp), %r14
	movl	4(%rbx,%r10), %r13d
	leal	1(%rax), %r9d
	movl	%r11d, 168(%rsp)
	movslq	%eax, %r11
	subl	296(%rsp), %r13d
	incq	%r11
	movl	4(%r14,%r10), %r12d
	subl	304(%rsp), %r12d
	movl	%r9d, 172(%rsp)
	leaq	0(,%r11,4), %r10
	addq	%r10, %r14
	movq	%r14, 80(%rsp)
	movq	16(%rsp), %r14
	addq	%r10, %r14
	movq	%r14, 120(%rsp)
	cmpl	%r12d, %r13d
	jle	.L10
	movq	80(%rsp), %r14
	movl	%r13d, 176(%rsp)
	incl	%edx
	movl	%r13d, (%r14)
	jmp	.L11
.L10:
	movq	80(%rsp), %rdx
	movq	16(%rsp), %r14
	movl	%r12d, 176(%rsp)
	movl	%r12d, (%rdx)
	movl	%eax, %edx
	subl	%edi, %edx
	movslq	%edx, %rdx
	movl	(%r14,%rdx,4), %edx
.L11:
	movq	120(%rsp), %r14
	movl	-4(%rbx,%r10), %r12d
	leaq	0(%rbp,%r10), %r13
	movl	%edx, 180(%rsp)
	subl	296(%rsp), %r12d
	movl	%edx, (%r14)
	movq	24(%rsp), %r14
	movl	-4(%rbp,%r10), %edx
	subl	304(%rsp), %edx
	addq	%r10, %r14
	cmpl	%edx, %r12d
	jle	.L12
	movl	%r12d, 0(%r13)
	movl	%r12d, 184(%rsp)
	jmp	.L13
.L12:
	movq	24(%rsp), %rax
	movl	%edx, 0(%r13)
	movl	%edx, 184(%rsp)
	movl	-4(%rax,%r10), %eax
.L13:
	movl	%eax, 188(%rsp)
	xorl	%r10d, %r10d
	orl	$-1, %edx
	movl	%eax, (%r14)
	leaq	160(%rsp), %rax
.L15:
	movl	(%rax), %r12d
	cmpl	%edx, %r12d
	jle	.L14
	movl	4(%rax), %r10d
	movl	%r12d, %edx
.L14:
	movq	152(%rsp), %r14
	addq	$8, %rax
	cmpq	%r14, %rax
	jne	.L15
	movq	8(%rsp), %rax
	movl	%edx, (%rbx,%r11,4)
	movl	%r10d, (%rax,%r11,4)
	movl	116(%rsp), %eax
	cmpl	%eax, %edx
	jne	.L22
	xorl	%r10d, %r10d
	xorl	%eax, %eax
.L16:
	movq	88(%rsp), %rdx
	movslq	%r9d, %r12
	cmpl	$0, (%rbx,%r12,4)
	movl	(%rdx,%rcx,4), %r11d
	je	.L18
	cmpl	%r9d, %eax
	je	.L18
	cmpl	%r10d, 312(%rsp)
	jle	.L18
	movl	%r9d, %eax
	cltd
	idivl	40(%rsp)
	decl	%edx
	decl	%eax
	subl	%edx, %r11d
	movq	56(%rsp), %rdx
	movl	%r11d, (%rdx,%r10,4)
	movl	(%r15,%rcx,4), %edx
	subl	%eax, %edx
	movq	48(%rsp), %rax
	movl	%edx, (%rax,%r10,4)
	movq	8(%rsp), %rdx
	movl	%r9d, %eax
	incq	%r10
	movl	(%rdx,%r12,4), %r9d
	jmp	.L16
.L18:
	movl	32(%rsp), %eax
	decl	%r10d
	movq	96(%rsp), %rdx
	addl	%r10d, %eax
	cltq
	cmpl	%r11d, (%rdx,%rax,4)
	jne	.L21
	movq	104(%rsp), %rdx
	movl	(%r15,%rcx,4), %r9d
	cmpl	%r9d, (%rdx,%rax,4)
	je	.L31
.L21:
	movslq	%r10d, %r10
.L23:
	cmpl	$-1, %r10d
	je	.L22
	movq	56(%rsp), %rax
	xorl	%edx, %edx
	xorl	%r9d, %r9d
	movl	%edx, (%rax,%r10,4)
	movq	48(%rsp), %rax
	movl	%r9d, (%rax,%r10,4)
	decq	%r10
	jmp	.L23
.L31:
	movl	76(%rsp), %r8d
	movl	112(%rsp), %esi
.L22:
	incl	%r8d
	jmp	.L7
.L42:
	incl	%esi
	jmp	.L5
.L41:
	movl	312(%rsp), %edi
	incq	%rcx
	addl	%edi, 32(%rsp)
	jmp	.L3
.L39:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$216, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z12Kernel_2_CPUPiS_S_S_S_S_S_iiiiii, .-_Z12Kernel_2_CPUPiS_S_S_S_S_S_iiiiii
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3661:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3661:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

////////////////////////////////////////////////////////////////////////////
// 
// 
////////////////////////////////////////////////////////////////////////////
 
#include <hip/hip_runtime.h>
#include <iostream>
#include <cmath>
using namespace std;



void Kernel_2_CPU(int *A, int *B, int *Max_CPU, int *A_Location_CPU, int *B_Location_CPU,int *Kernel_2_output_A_CPU, int*Kernel_2_output_B_CPU, 
			int Sim_Exact, int Sim_Dissim, int GAP_START, int GAP_EXTEND, int Kerene2Max, int Kernel_2_Report)
{
	int *F, *E, *H, *L, *F_Loc, *E_Loc;
	
	F     = new int [(Kerene2Max+1)*(Kerene2Max+1)];
	E     = new int [(Kerene2Max+1)*(Kerene2Max+1)];
	H     = new int [(Kerene2Max+1)*(Kerene2Max+1)];
	L     = new int [(Kerene2Max+1)*(Kerene2Max+1)];
	F_Loc = new int [(Kerene2Max+1)*(Kerene2Max+1)];
	E_Loc = new int [(Kerene2Max+1)*(Kerene2Max+1)];
	

	for(int Sub_Seq = 0; Sub_Seq < Kernel_2_Report; Sub_Seq++)
    {
		for (int j=0; j<(Kerene2Max+1)*(Kerene2Max+1); j++)
		{
			F[j]=0;
			E[j]=0;
			H[j]=0;
			L[j]=0;
			F_Loc[j]=0;
			E_Loc[j]=0;
		}
		int Sim_Val = Max_CPU[Sub_Seq];
        int Start_A = A_Location_CPU[Sub_Seq];
		int Start_B = B_Location_CPU[Sub_Seq];

		int End_A   = min  (Start_A+1  ,  Kerene2Max );
		int End_B   = min  (Start_B+1  ,  Kerene2Max );
		int End_K   = End_A + End_B -1;

		int iStart,k;
		
		for (k = 0; k<End_K; ++k)
		{
			if (k<End_A)
			{
				iStart=0;
			}
			else
			{
				iStart=iStart+1;
			}
			
			int iEnd = min(k+1,End_B);

			for (int i=iStart; i<iEnd; i++)
			{
				int j=k-i;
				int H_Sim=0;
				int Num  =  i   *(End_A+1)+j;
				int Num1 = (i+1)*(End_A+1)+j;
				int Temp[10];
				
				for (int n=0; n<9; n=n+2)
				{
					Temp[n] = -2;
				}
				
				if (A[Start_A-j]==B[Start_B-i])
				{
					H_Sim = H[Num]+Sim_Exact;
					Temp[0]= H_Sim;
					Temp[1]= Num;
				}
				else
				{
					H_Sim=H[Num]+Sim_Dissim;
					Temp[8]= H_Sim;
					Temp[9]= Num;
				}
				
				Temp[2]=0;
				Temp[3]= Num1+1;
				
				if ((H[Num+1]-GAP_START)>(F[Num+1]-GAP_EXTEND))
				{
					F[Num1+1] = H[Num+1]-GAP_START;
					Temp[4] = F[Num1+1];
					Temp[5] = Num+1;
					F_Loc[Num1+1] = Num+1;
				}
				else
				{
					F[Num1+1] = F[Num+1]-GAP_EXTEND;
					Temp[4]       = F[Num1+1];
					Temp[5]       = F_Loc[Num1+1-(End_A+1)]; 
					F_Loc[Num1+1] = F_Loc[Num1+1-(End_A+1)];
				}
				
				if ((H[Num1] -GAP_START)>(E[Num1] -GAP_EXTEND))
				{
					E[Num1+1] = H[Num1] -GAP_START;
					Temp[6] = E[Num1+1]; 
					Temp[7] = Num1;
					E_Loc[Num1+1] = Num1;
				}
				else
				{
					E[Num1+1]     = E[Num1] -GAP_EXTEND;
					Temp[6]       = E[Num1+1]; 
					Temp[7]       = E_Loc[Num1]; 
					E_Loc[Num1+1] = E_Loc[Num1];
				}	
				int maxH =-1;
				int MaxL = 0;
				for (int n=0; n<9; n=n+2)
				{
					if (Temp[n]>maxH)
					{
						maxH = Temp[n];
						MaxL = Temp[n+1];
					}
				}	
				H[Num1+1] = maxH;
				L[Num1+1] = MaxL;
				

				if (maxH==Sim_Val)
				{				
				//  stop the program and start to find the track back
					int Loc_Path = 0;
					int cnt = 0;
					int Loc_Temp = Num1+1;

					while   ((H[Loc_Temp] != 0) && (Loc_Temp != Loc_Path) && (cnt<Kerene2Max)) 
					{	
						int Loc_Temp1=Loc_Temp;
						int Remind = Loc_Temp1 - int (Loc_Temp1/(End_A+1))*(End_A+1)-1;
						Kernel_2_output_A_CPU[cnt+Kerene2Max*Sub_Seq] = A_Location_CPU[Sub_Seq]- Remind;
						Kernel_2_output_B_CPU[cnt+Kerene2Max*Sub_Seq] = B_Location_CPU[Sub_Seq]-int(Loc_Temp1/(End_A+1)-1);
						
						Loc_Path = Loc_Temp;
						Loc_Temp = L[Loc_Path];
						cnt++;
					}
			
					// Check for Start point & End Point
					if ((Kernel_2_output_A_CPU[cnt-1+Kerene2Max*Sub_Seq]==A_Location_CPU[Sub_Seq]) && 
						(Kernel_2_output_B_CPU[cnt-1+Kerene2Max*Sub_Seq]==B_Location_CPU[Sub_Seq]))
					{
						k=End_K;
						i=iEnd;
					}
					else
					{
						// Delete the results that is not correct
						for (int del=cnt-1; del>=0; del--)
						{
							Kernel_2_output_A_CPU[del+Kerene2Max*Sub_Seq] =0;
							Kernel_2_output_B_CPU[del+Kerene2Max*Sub_Seq] =0;
						}
					}
				}
			} // End i
		} // diagonal
	} // block
}
	.text
	.file	"Kernel_2_CPU.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z12Kernel_2_CPUPiS_S_S_S_S_S_iiiiii # -- Begin function _Z12Kernel_2_CPUPiS_S_S_S_S_S_iiiiii
	.type	_Z12Kernel_2_CPUPiS_S_S_S_S_S_iiiiii,@function
_Z12Kernel_2_CPUPiS_S_S_S_S_S_iiiiii:   # @_Z12Kernel_2_CPUPiS_S_S_S_S_S_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 128(%rsp)                  # 8-byte Spill
	movq	%r8, 48(%rsp)                   # 8-byte Spill
	movq	%rcx, 56(%rsp)                  # 8-byte Spill
	movq	%rdx, 152(%rsp)                 # 8-byte Spill
	movq	%rsi, 200(%rsp)                 # 8-byte Spill
	movq	%rdi, 192(%rsp)                 # 8-byte Spill
	movl	336(%rsp), %ebx
	movl	328(%rsp), %eax
	incl	%eax
	movl	%eax, 64(%rsp)                  # 4-byte Spill
                                        # kill: def $eax killed $eax def $rax
	imull	%eax, %eax
	movq	%rax, %r14
	leaq	(,%rax,4), %r12
	movq	%r12, %rdi
	callq	_Znam
	movq	%rax, %r15
	movq	%r12, %rdi
	callq	_Znam
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	_Znam
	movq	%rax, %r13
	movq	%r12, %rdi
	callq	_Znam
	movq	%rax, %rbp
	movq	%r12, %rdi
	callq	_Znam
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	_Znam
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	testl	%ebx, %ebx
	jle	.LBB0_14
# %bb.1:                                # %.preheader246.lr.ph
	movq	%r15, %rsi
	movq	288(%rsp), %rcx
	cmpq	$1, %r14
	adcq	$0, %r14
	shlq	$2, %r14
	movq	%r14, (%rsp)                    # 8-byte Spill
	movl	328(%rsp), %eax
	cltq
	movl	%ebx, %edx
	movq	%rdx, 168(%rsp)                 # 8-byte Spill
	movq	%rax, 144(%rsp)                 # 8-byte Spill
	leaq	(,%rax,4), %rax
	movq	%rax, 160(%rsp)                 # 8-byte Spill
	xorl	%ebx, %ebx
	movq	%rcx, %r14
	movq	128(%rsp), %r15                 # 8-byte Reload
	xorl	%r12d, %r12d
                                        # implicit-def: $eax
                                        # kill: killed $eax
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
.LBB0_2:                                # %.preheader246
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_6 Depth 2
                                        #       Child Loop BB0_7 Depth 3
                                        #         Child Loop BB0_8 Depth 4
                                        #         Child Loop BB0_23 Depth 4
                                        #         Child Loop BB0_31 Depth 4
                                        #         Child Loop BB0_39 Depth 4
	cmpl	$0, 64(%rsp)                    # 4-byte Folded Reload
	je	.LBB0_4
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB0_2 Depth=1
	movq	%rsi, %rdi
	xorl	%esi, %esi
	movq	(%rsp), %rdx                    # 8-byte Reload
	callq	memset@PLT
	movq	40(%rsp), %rdi                  # 8-byte Reload
	xorl	%esi, %esi
	movq	(%rsp), %rdx                    # 8-byte Reload
	callq	memset@PLT
	movq	%r13, %rdi
	xorl	%esi, %esi
	movq	(%rsp), %rdx                    # 8-byte Reload
	callq	memset@PLT
	movq	%rbp, %rdi
	xorl	%esi, %esi
	movq	(%rsp), %rdx                    # 8-byte Reload
	callq	memset@PLT
	movq	32(%rsp), %rdi                  # 8-byte Reload
	xorl	%esi, %esi
	movq	(%rsp), %rdx                    # 8-byte Reload
	callq	memset@PLT
	movq	24(%rsp), %rdi                  # 8-byte Reload
	xorl	%esi, %esi
	movq	(%rsp), %rdx                    # 8-byte Reload
	callq	memset@PLT
	movq	16(%rsp), %rsi                  # 8-byte Reload
.LBB0_4:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	movq	56(%rsp), %rax                  # 8-byte Reload
	movl	(%rax,%r12,4), %ecx
	movq	48(%rsp), %rax                  # 8-byte Reload
	movl	(%rax,%r12,4), %edx
	movq	%rcx, 216(%rsp)                 # 8-byte Spill
	leal	1(%rcx), %edi
	movl	328(%rsp), %eax
	cmpl	%eax, %edi
	cmovgel	%eax, %edi
	movq	%rdx, 208(%rsp)                 # 8-byte Spill
	leal	1(%rdx), %ecx
	cmpl	%eax, %ecx
	cmovgel	%eax, %ecx
	movq	%rcx, 176(%rsp)                 # 8-byte Spill
	leal	(%rdi,%rcx), %eax
	decl	%eax
	movl	%eax, 8(%rsp)                   # 4-byte Spill
	testl	%eax, %eax
	jle	.LBB0_13
# %bb.5:                                # %.lr.ph271
                                        #   in Loop: Header=BB0_2 Depth=1
	movq	152(%rsp), %rax                 # 8-byte Reload
	movl	(%rax,%r12,4), %eax
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	leal	1(%rdi), %r10d
	movq	%r12, %rax
	imulq	144(%rsp), %rax                 # 8-byte Folded Reload
	movq	%rax, 184(%rsp)                 # 8-byte Spill
	xorl	%r8d, %r8d
	movq	%rdi, 136(%rsp)                 # 8-byte Spill
.LBB0_6:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_7 Depth 3
                                        #         Child Loop BB0_8 Depth 4
                                        #         Child Loop BB0_23 Depth 4
                                        #         Child Loop BB0_31 Depth 4
                                        #         Child Loop BB0_39 Depth 4
	movl	68(%rsp), %ecx                  # 4-byte Reload
	incl	%ecx
	cmpl	%edi, %r8d
	cmovll	%ebx, %ecx
	leal	1(%r8), %eax
	movq	176(%rsp), %rdx                 # 8-byte Reload
	cmpl	%edx, %eax
                                        # kill: def $edx killed $edx killed $rdx
	cmovll	%eax, %edx
	movl	%ecx, %edi
	movl	%ecx, 68(%rsp)                  # 4-byte Spill
	movl	%edx, 72(%rsp)                  # 4-byte Spill
	cmpl	%edx, %ecx
	movq	%r8, 224(%rsp)                  # 8-byte Spill
	jge	.LBB0_12
.LBB0_7:                                # %.lr.ph265
                                        #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_6 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB0_8 Depth 4
                                        #         Child Loop BB0_23 Depth 4
                                        #         Child Loop BB0_31 Depth 4
                                        #         Child Loop BB0_39 Depth 4
                                        # kill: def $edi killed $edi def $rdi
	movl	%edi, %edx
	imull	%r10d, %edx
	leal	1(%rdi), %eax
	movl	%eax, 76(%rsp)                  # 4-byte Spill
	movl	%eax, %ecx
	imull	%r10d, %ecx
	movq	$-2, %rax
.LBB0_8:                                #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_6 Depth=2
                                        #       Parent Loop BB0_7 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movl	$-2, 88(%rsp,%rax,4)
	addq	$2, %rax
	cmpq	$7, %rax
	jb	.LBB0_8
# %bb.9:                                #   in Loop: Header=BB0_7 Depth=3
	movl	%r8d, %eax
	subl	%edi, %eax
	addl	%eax, %edx
	movq	216(%rsp), %rsi                 # 8-byte Reload
	movl	%esi, %r8d
	subl	%eax, %r8d
	movslq	%r8d, %r8
	movq	192(%rsp), %rsi                 # 8-byte Reload
	movl	(%rsi,%r8,4), %r11d
	movq	208(%rsp), %rsi                 # 8-byte Reload
	movl	%esi, %r8d
	subl	%edi, %r8d
	movslq	%r8d, %r9
	movslq	%edx, %rdi
	movl	(%r13,%rdi,4), %r8d
	movq	200(%rsp), %rsi                 # 8-byte Reload
	cmpl	(%rsi,%r9,4), %r11d
	jne	.LBB0_15
# %bb.10:                               #   in Loop: Header=BB0_7 Depth=3
	addl	296(%rsp), %r8d
	movl	%r8d, 80(%rsp)
	leaq	84(%rsp), %r8
	jmp	.LBB0_16
.LBB0_15:                               #   in Loop: Header=BB0_7 Depth=3
	addl	304(%rsp), %r8d
	movl	%r8d, 112(%rsp)
	leaq	116(%rsp), %r8
.LBB0_16:                               #   in Loop: Header=BB0_7 Depth=3
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	40(%rsp), %r9                   # 8-byte Reload
	addl	%eax, %ecx
	movl	%edi, (%r8)
	movl	$0, 88(%rsp)
	leal	1(%rcx), %eax
	movl	%eax, 92(%rsp)
	movl	4(%r13,%rdi,4), %r8d
	subl	312(%rsp), %r8d
	movl	4(%rsi,%rdi,4), %r11d
	subl	320(%rsp), %r11d
	movslq	%eax, %rdi
	cmpl	%r11d, %r8d
	jle	.LBB0_18
# %bb.17:                               #   in Loop: Header=BB0_7 Depth=3
	incl	%edx
	movl	%r8d, (%rsi,%rdi,4)
	movl	%r8d, 96(%rsp)
	movq	32(%rsp), %r8                   # 8-byte Reload
	jmp	.LBB0_19
.LBB0_18:                               #   in Loop: Header=BB0_7 Depth=3
	movl	%r11d, (%rsi,%rdi,4)
	movl	%r11d, 96(%rsp)
	movl	%ecx, %edx
	subl	136(%rsp), %edx                 # 4-byte Folded Reload
	movslq	%edx, %rdx
	movq	32(%rsp), %r8                   # 8-byte Reload
	movl	(%r8,%rdx,4), %edx
.LBB0_19:                               #   in Loop: Header=BB0_7 Depth=3
	movl	%edx, 100(%rsp)
	movl	%edx, (%r8,%rdi,4)
	movslq	%ecx, %rdx
	movl	(%r13,%rdx,4), %r8d
	subl	312(%rsp), %r8d
	movl	(%r9,%rdx,4), %r11d
	subl	320(%rsp), %r11d
	cmpl	%r11d, %r8d
	jle	.LBB0_21
# %bb.20:                               #   in Loop: Header=BB0_7 Depth=3
	movl	%r8d, (%r9,%rdi,4)
	movl	%r8d, 104(%rsp)
	movq	24(%rsp), %r8                   # 8-byte Reload
	jmp	.LBB0_22
.LBB0_21:                               #   in Loop: Header=BB0_7 Depth=3
	movl	%r11d, (%r9,%rdi,4)
	movl	%r11d, 104(%rsp)
	movq	24(%rsp), %r8                   # 8-byte Reload
	movl	(%r8,%rdx,4), %ecx
.LBB0_22:                               #   in Loop: Header=BB0_7 Depth=3
	movl	%ecx, 108(%rsp)
	movl	%ecx, (%r8,%rdi,4)
	movl	$-1, %ecx
	xorl	%edx, %edx
	movq	$-2, %r8
.LBB0_23:                               #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_6 Depth=2
                                        #       Parent Loop BB0_7 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movl	88(%rsp,%r8,4), %r11d
	cmpl	%ecx, %r11d
	jle	.LBB0_25
# %bb.24:                               #   in Loop: Header=BB0_23 Depth=4
	movl	92(%rsp,%r8,4), %edx
	movl	%r11d, %ecx
.LBB0_25:                               #   in Loop: Header=BB0_23 Depth=4
	addq	$2, %r8
	cmpq	$7, %r8
	jb	.LBB0_23
# %bb.26:                               #   in Loop: Header=BB0_7 Depth=3
	movl	%ecx, (%r13,%rdi,4)
	movl	%edx, (%rbp,%rdi,4)
	cmpl	12(%rsp), %ecx                  # 4-byte Folded Reload
	jne	.LBB0_40
# %bb.27:                               # %.preheader
                                        #   in Loop: Header=BB0_7 Depth=3
	movl	$-1, %r11d
	testl	%eax, %eax
	je	.LBB0_34
# %bb.28:                               # %.preheader
                                        #   in Loop: Header=BB0_7 Depth=3
	cmpl	$0, 12(%rsp)                    # 4-byte Folded Reload
	je	.LBB0_34
# %bb.29:                               # %.preheader
                                        #   in Loop: Header=BB0_7 Depth=3
	movl	328(%rsp), %ecx
	testl	%ecx, %ecx
	jle	.LBB0_34
# %bb.30:                               # %.lr.ph258.preheader
                                        #   in Loop: Header=BB0_7 Depth=3
	movl	$1, %r8d
.LBB0_31:                               # %.lr.ph258
                                        #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_6 Depth=2
                                        #       Parent Loop BB0_7 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movl	%eax, %ecx
	cltd
	idivl	%r10d
	movl	%eax, %edx
	imull	%r10d, %edx
	movq	56(%rsp), %r9                   # 8-byte Reload
	movl	(%r9,%r12,4), %r9d
	subl	%ecx, %edx
	addl	%r9d, %edx
	incl	%edx
	movl	%edx, -4(%r15,%r8,4)
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	(%rdx,%r12,4), %edx
	subl	%eax, %edx
	incl	%edx
	movl	%edx, -4(%r14,%r8,4)
	movl	(%rbp,%rdi,4), %eax
	incl	%r11d
	cmpl	%ecx, %eax
	je	.LBB0_34
# %bb.32:                               # %.lr.ph258
                                        #   in Loop: Header=BB0_31 Depth=4
	movslq	%eax, %rdi
	cmpl	$0, (%r13,%rdi,4)
	je	.LBB0_34
# %bb.33:                               # %.lr.ph258
                                        #   in Loop: Header=BB0_31 Depth=4
	leaq	1(%r8), %rcx
	cmpq	144(%rsp), %r8                  # 8-byte Folded Reload
	movq	%rcx, %r8
	jl	.LBB0_31
.LBB0_34:                               # %.critedge
                                        #   in Loop: Header=BB0_7 Depth=3
	movslq	%r11d, %rax
	movq	184(%rsp), %rcx                 # 8-byte Reload
	addq	%rax, %rcx
	movq	128(%rsp), %rdx                 # 8-byte Reload
	movl	(%rdx,%rcx,4), %edx
	movq	56(%rsp), %rdi                  # 8-byte Reload
	cmpl	(%rdi,%r12,4), %edx
	jne	.LBB0_37
# %bb.35:                               #   in Loop: Header=BB0_7 Depth=3
	movq	288(%rsp), %rdx
	movl	(%rdx,%rcx,4), %ecx
	movq	48(%rsp), %rdx                  # 8-byte Reload
	cmpl	(%rdx,%r12,4), %ecx
	je	.LBB0_36
.LBB0_37:                               #   in Loop: Header=BB0_7 Depth=3
	testl	%r11d, %r11d
	js	.LBB0_40
# %bb.38:                               # %.lr.ph261.preheader
                                        #   in Loop: Header=BB0_7 Depth=3
	incq	%rax
.LBB0_39:                               # %.lr.ph261
                                        #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_6 Depth=2
                                        #       Parent Loop BB0_7 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movl	%ebx, -4(%r15,%rax,4)
	movl	%ebx, -4(%r14,%rax,4)
	decq	%rax
	jg	.LBB0_39
.LBB0_40:                               # %.loopexit
                                        #   in Loop: Header=BB0_7 Depth=3
	movl	76(%rsp), %edi                  # 4-byte Reload
	cmpl	72(%rsp), %edi                  # 4-byte Folded Reload
	movq	224(%rsp), %r8                  # 8-byte Reload
	jl	.LBB0_7
	jmp	.LBB0_11
.LBB0_36:                               # %.loopexit.thread
                                        #   in Loop: Header=BB0_6 Depth=2
	movl	8(%rsp), %eax                   # 4-byte Reload
	movl	%eax, %r8d
.LBB0_11:                               # %._crit_edge266.loopexit
                                        #   in Loop: Header=BB0_6 Depth=2
	incl	%r8d
	movl	%r8d, %eax
.LBB0_12:                               # %._crit_edge266
                                        #   in Loop: Header=BB0_6 Depth=2
	movl	%eax, %r8d
	cmpl	8(%rsp), %eax                   # 4-byte Folded Reload
	movq	136(%rsp), %rdi                 # 8-byte Reload
	jl	.LBB0_6
.LBB0_13:                               # %._crit_edge272
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r12
	movq	160(%rsp), %rax                 # 8-byte Reload
	addq	%rax, %r15
	addq	%rax, %r14
	cmpq	168(%rsp), %r12                 # 8-byte Folded Reload
	jne	.LBB0_2
.LBB0_14:                               # %._crit_edge276
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z12Kernel_2_CPUPiS_S_S_S_S_S_iiiiii, .Lfunc_end0-_Z12Kernel_2_CPUPiS_S_S_S_S_S_iiiiii
	.cfi_endproc
                                        # -- End function
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
