#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <sys/time.h>
#include <inttypes.h>
#include <cuda_runtime.h>

 // helper functions and utilities to work with CUDA
#define ERT_FLOP 2
#define ERT_TRIALS_MIN 1
#define ERT_WORKING_SET_MIN 1
#define GBUNIT (1024 * 1024 * 1024)

#define REP2(S)        S ;        S 
#define REP4(S)   REP2(S);   REP2(S)
#define REP8(S)   REP4(S);   REP4(S)
#define REP16(S)  REP8(S);   REP8(S)
#define REP32(S)  REP16(S);  REP16(S)
#define REP64(S)  REP32(S);  REP32(S)
#define REP128(S) REP64(S);  REP64(S)
#define REP256(S) REP128(S); REP128(S)
#define REP512(S) REP256(S); REP256(S)

#define KERNEL2(a,b,c)   ((a) = (a)*(b) + (c))
#define KERNEL1(a,b,c)   ((a) = (b) + (c))
void initialize(uint64_t nsize,
                double* __restrict__ A,
                double value)
{
  uint64_t i;
  for (i = 0; i < nsize; ++i) {
    A[i] = value;
  }
}
void gpuKernel(uint64_t nsize,
               uint64_t ntrials,
               double* __restrict__ array,
               int* bytes_per_elem,
               int* mem_accesses_per_elem);

__global__ void block_stride(uint64_t ntrials, uint64_t nsize, double *A)
{
		uint64_t total_thr = gridDim.x * blockDim.x;
		uint64_t elem_per_thr = (nsize + (total_thr-1)) / total_thr;
		uint64_t blockOffset = blockIdx.x * blockDim.x;

		uint64_t start_idx  = blockOffset + threadIdx.x;
		uint64_t end_idx    = start_idx + elem_per_thr * total_thr;
		uint64_t stride_idx = total_thr;

		if (start_idx > nsize) {
				start_idx = nsize;
		}

		if (end_idx > nsize) {
				end_idx = nsize;
		}

		double alpha = 0.5;
		uint64_t i, j;
		for (j = 0; j < ntrials; ++j) {
				for (i = start_idx; i < end_idx; i += stride_idx) {
						double beta = 0.8;
						/* add 1 flop */
						KERNEL1(beta,A[i],alpha);
						/* add 2 flops */
						//KERNEL2(beta,A[i],alpha);
						/* add 4 flops */
						//REP2(KERNEL2(beta,A[i],alpha));

						/* add 8 flops */
						//REP4(KERNEL2(beta,A[i],alpha));
						/* add 16 flops */
						//REP8(KERNEL2(beta,A[i],alpha));
						/* add 32 flops */
						//REP16(KERNEL2(beta,A[i],alpha));
						/* add 64 flops */
						//REP32(KERNEL2(beta,A[i],alpha));
						/* add 128 flops */
						//REP64(KERNEL2(beta,A[i],alpha));
						/* add 256 flops */
						//REP128(KERNEL2(beta,A[i],alpha));
						/* add 512 flops */
						//REP256(KERNEL2(beta,A[i],alpha));
						/* add 1024 flops */
						//REP512(KERNEL2(beta,A[i],alpha));

						A[i] = beta;
				}
				alpha = alpha * (1 - 1e-8);
		}
}
int gpu_blocks = 512;
int gpu_threads = 512;


void gpuKernel(uint64_t nsize,
               uint64_t ntrials,
               double* __restrict__ A,
               int* bytes_per_elem,
               int* mem_accesses_per_elem)
{
		*bytes_per_elem        = sizeof(*A);
		*mem_accesses_per_elem = 2;
        //gpu_blocks = (nsize+1023)/1024;
		block_stride <<< gpu_blocks, gpu_threads>>> (ntrials, nsize, A);
}



double getTime()
{
		double time;
		struct timeval tm;
		gettimeofday(&tm, NULL);
		time = tm.tv_sec + (tm.tv_usec / 1000000.0);
		return time;
}

int main(int argc, char *argv[]) {


		int rank = 0;
		int nprocs = 1;
		int nthreads = 1;
		int id = 0;

		uint64_t TSIZE = 1<<30;
		uint64_t PSIZE = TSIZE / nprocs;


		double *              buf = (double *)malloc(PSIZE);

		if (buf == NULL) {
				fprintf(stderr, "Out of memory!\n");
				return -1;
		}


		{
				id = 0;
				nthreads = 1;

				int num_gpus = 0;
				int gpu;
				int gpu_id;
				int numSMs;

				cudaGetDeviceCount(&num_gpus);
				if (num_gpus < 1) {
						fprintf(stderr, "No CUDA device detected.\n");
						return -1;
				}

				for (gpu = 0; gpu < num_gpus; gpu++) {
						cudaDeviceProp dprop;
						cudaGetDeviceProperties(&dprop,gpu);
						/* printf("%d: %s\n",gpu,dprop.name); */
				}

				cudaSetDevice(id % num_gpus);
				cudaGetDevice(&gpu_id);
				cudaDeviceGetAttribute(&numSMs, cudaDevAttrMultiProcessorCount, gpu_id);
    
                uint64_t nsize = PSIZE / nthreads;
                nsize = nsize & (~(64-1));
                nsize = nsize / sizeof(double);
                uint64_t nid =  nsize * id ;

                // initialize small chunck of buffer within each thread
                initialize(nsize, &buf[nid], 1.0);


				double *d_buf;
				cudaMalloc((void **)&d_buf, nsize*sizeof(double));
				cudaMemset(d_buf, 0, nsize*sizeof(double));
				cudaDeviceSynchronize();

				double startTime, endTime;
				uint64_t n,nNew;
				uint64_t t;
				int bytes_per_elem;
				int mem_accesses_per_elem;

				n = 1<<22;
				while (n <= nsize) { // working set - nsize
						uint64_t ntrials = nsize / n;
						if (ntrials < 1)
								ntrials = 1;
                        //600 original 
						for (t = 1; t <= 600; t = t + 1) { // working set - ntrials
								cudaMemcpy(d_buf, &buf[nid], n*sizeof(double), cudaMemcpyHostToDevice);
								cudaDeviceSynchronize();

								if ((id == 0) && (rank==0)) {
										startTime = getTime();
								}

								gpuKernel(n, t, d_buf, &bytes_per_elem, &mem_accesses_per_elem);
								cudaDeviceSynchronize();

								if ((id == 0) && (rank == 0)) {
										endTime = getTime();
										double seconds = (double)(endTime - startTime);
										uint64_t working_set_size = n * nthreads * nprocs;
										uint64_t total_bytes = t * working_set_size * bytes_per_elem * mem_accesses_per_elem;
										uint64_t total_flops = t * working_set_size * ERT_FLOP;
                                        printf("thread: %d\n", nthreads);
										// nsize; trials; microseconds; bytes; single thread bandwidth; total bandwidth
										printf("%12lld %12lld %15.3lf %12lld %12lld\n",
										       working_set_size * bytes_per_elem,
										       t,
										       seconds * 1000000,
										       total_bytes,
										       total_flops);
										printf("BW: %15.3lf\n",total_bytes*1.0/seconds/1024/1024/1024);
								} // print

								cudaMemcpy(&buf[nid], d_buf, n*sizeof(double), cudaMemcpyDeviceToHost);
								cudaDeviceSynchronize();
						} // working set - ntrials

						nNew = 1.1 * n;
						if (nNew == n) {
								nNew = n+1;
						}

						n = nNew;
                        // no break brfore
				        break;
                } // working set - nsize

				cudaFree(d_buf);

				if (cudaGetLastError() != cudaSuccess) {
						printf("Last cuda error: %s\n",cudaGetErrorString(cudaGetLastError()));
				}

				cudaDeviceReset();
		} // parallel region

		free(buf);

		printf("\n");
		printf("META_DATA\n");
		printf("FLOPS          %d\n", ERT_FLOP);


		printf("GPU_BLOCKS     %d\n", gpu_blocks);
		printf("GPU_THREADS    %d\n", gpu_threads);

		return 0;
}

	.file	"tmpxft_0034bb9e_00000000-6_driver1.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10initializemPdd
	.type	_Z10initializemPdd, @function
_Z10initializemPdd:
.LFB2027:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L3:
	cmpq	%rdi, %rax
	je	.L6
	movsd	%xmm0, (%rsi,%rax,8)
	incq	%rax
	jmp	.L3
.L6:
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10initializemPdd, .-_Z10initializemPdd
	.globl	_Z7getTimev
	.type	_Z7getTimev, @function
_Z7getTimev:
.LFB2029:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	8(%rsp), %xmm1
	cvtsi2sdq	16(%rsp), %xmm0
	divsd	.LC0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z7getTimev, .-_Z7getTimev
	.globl	_Z34__device_stub__Z12block_stridemmPdmmPd
	.type	_Z34__device_stub__Z12block_stridemmPdmmPd, @function
_Z34__device_stub__Z12block_stridemmPdmmPd:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12block_stridemmPd(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L10:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z34__device_stub__Z12block_stridemmPdmmPd, .-_Z34__device_stub__Z12block_stridemmPdmmPd
	.globl	_Z12block_stridemmPd
	.type	_Z12block_stridemmPd, @function
_Z12block_stridemmPd:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z12block_stridemmPdmmPd
	.cfi_endproc
.LFE2056:
	.size	_Z12block_stridemmPd, .-_Z12block_stridemmPd
	.globl	_Z9gpuKernelmmPdPiS0_
	.type	_Z9gpuKernelmmPdPiS0_, @function
_Z9gpuKernelmmPdPiS0_:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdx, %r12
	xorl	%r9d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rsi, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movl	$8, (%rcx)
	movl	$2, (%r8)
	movl	gpu_threads(%rip), %eax
	xorl	%r8d, %r8d
	movl	gpu_blocks(%rip), %edx
	movl	%eax, 20(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 24(%rsp)
	movl	28(%rsp), %ecx
	movl	%edx, 8(%rsp)
	movq	20(%rsp), %rdx
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	addq	$32, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z34__device_stub__Z12block_stridemmPdmmPd
.L15:
	.cfi_restore_state
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z9gpuKernelmmPdPiS0_, .-_Z9gpuKernelmmPdPiS0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Out of memory!\n"
.LC2:
	.string	"No CUDA device detected.\n"
.LC4:
	.string	"thread: %d\n"
.LC5:
	.string	"%12lld %12lld %15.3lf %12lld %12lld\n"
.LC7:
	.string	"BW: %15.3lf\n"
.LC8:
	.string	"Last cuda error: %s\n"
.LC9:
	.string	"\n"
.LC10:
	.string	"META_DATA\n"
.LC11:
	.string	"FLOPS          %d\n"
.LC12:
	.string	"GPU_BLOCKS     %d\n"
.LC13:
	.string	"GPU_THREADS    %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$1073741824, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$1088, %rsp
	.cfi_def_cfa_offset 1136
	movq	%fs:40, %rax
	movq	%rax, 1080(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	leaq	.LC1(%rip), %rdx
	testq	%rax, %rax
	je	.L36
	movq	%rax, %rbx
	leaq	20(%rsp), %rdi
	xorl	%eax, %eax
	xorl	%ebp, %ebp
	movl	%eax, 20(%rsp)
	leaq	48(%rsp), %r12
	call	cudaGetDeviceCount@PLT
	cmpl	$0, 20(%rsp)
	jg	.L21
	leaq	.LC2(%rip), %rdx
.L36:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %eax
	jmp	.L18
.L21:
	cmpl	%ebp, 20(%rsp)
	jle	.L37
	movl	%ebp, %esi
	movq	%r12, %rdi
	incl	%ebp
	call	cudaGetDeviceProperties_v2@PLT
	jmp	.L21
.L37:
	xorl	%edi, %edi
	movl	$1, %ebp
	leaq	.LC4(%rip), %r12
	call	cudaSetDevice@PLT
	leaq	24(%rsp), %rdi
	call	cudaGetDevice@PLT
	movl	24(%rsp), %edx
	leaq	28(%rsp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movsd	.LC3(%rip), %xmm0
	movq	%rbx, %rsi
	movl	$134217728, %edi
	call	_Z10initializemPdd
	leaq	40(%rsp), %rdi
	movl	$1073741824, %esi
	call	cudaMalloc@PLT
	movq	40(%rsp), %rdi
	movl	$1073741824, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	call	cudaDeviceSynchronize@PLT
.L26:
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movl	$33554432, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z7getTimev
	movq	40(%rsp), %rdx
	leaq	32(%rsp), %rcx
	movq	%rbp, %rsi
	leaq	36(%rsp), %r8
	movl	$4194304, %edi
	movsd	%xmm0, 8(%rsp)
	call	_Z9gpuKernelmmPdPiS0_
	call	cudaDeviceSynchronize@PLT
	call	_Z7getTimev
	movslq	32(%rsp), %r14
	movq	%r12, %rsi
	xorl	%eax, %eax
	movslq	36(%rsp), %r13
	subsd	8(%rsp), %xmm0
	movl	$1, %edx
	movl	$2, %edi
	imulq	%r14, %r13
	movsd	%xmm0, 8(%rsp)
	call	__printf_chk@PLT
	movsd	8(%rsp), %xmm0
	movq	%r14, %rdx
	movb	$1, %al
	imulq	%rbp, %r13
	movq	%rbp, %r9
	salq	$22, %rdx
	movq	%rbp, %rcx
	salq	$23, %r9
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	mulsd	.LC0(%rip), %xmm0
	salq	$22, %r13
	movq	%r13, %r8
	call	__printf_chk@PLT
	testq	%r13, %r13
	js	.L24
	cvtsi2sdq	%r13, %xmm0
	jmp	.L25
.L24:
	shrq	%r13
	cvtsi2sdq	%r13, %xmm0
	addsd	%xmm0, %xmm0
.L25:
	divsd	8(%rsp), %xmm0
	movl	$2, %edi
	leaq	.LC7(%rip), %rsi
	movb	$1, %al
	movsd	.LC6(%rip), %xmm1
	incq	%rbp
	mulsd	%xmm1, %xmm0
	mulsd	%xmm1, %xmm0
	mulsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$33554432, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	cmpq	$601, %rbp
	jne	.L26
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L27
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L27:
	call	cudaDeviceReset@PLT
	movq	%rbx, %rdi
	call	free@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$2, %edx
	leaq	.LC11(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	gpu_blocks(%rip), %edx
	leaq	.LC12(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	gpu_threads(%rip), %edx
	leaq	.LC13(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L18:
	movq	1080(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$1088, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC14:
	.string	"_Z12block_stridemmPd"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12block_stridemmPd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	gpu_threads
	.data
	.align 4
	.type	gpu_threads, @object
	.size	gpu_threads, 4
gpu_threads:
	.long	512
	.globl	gpu_blocks
	.align 4
	.type	gpu_blocks, @object
	.size	gpu_blocks, 4
gpu_blocks:
	.long	512
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1093567616
	.align 8
.LC3:
	.long	0
	.long	1072693248
	.align 8
.LC6:
	.long	0
	.long	1062207488
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <sys/time.h>
#include <inttypes.h>
#include <hip/hip_runtime.h>

 // helper functions and utilities to work with CUDA
#define ERT_FLOP 2
#define ERT_TRIALS_MIN 1
#define ERT_WORKING_SET_MIN 1
#define GBUNIT (1024 * 1024 * 1024)

#define REP2(S)        S ;        S 
#define REP4(S)   REP2(S);   REP2(S)
#define REP8(S)   REP4(S);   REP4(S)
#define REP16(S)  REP8(S);   REP8(S)
#define REP32(S)  REP16(S);  REP16(S)
#define REP64(S)  REP32(S);  REP32(S)
#define REP128(S) REP64(S);  REP64(S)
#define REP256(S) REP128(S); REP128(S)
#define REP512(S) REP256(S); REP256(S)

#define KERNEL2(a,b,c)   ((a) = (a)*(b) + (c))
#define KERNEL1(a,b,c)   ((a) = (b) + (c))
void initialize(uint64_t nsize,
                double* __restrict__ A,
                double value)
{
  uint64_t i;
  for (i = 0; i < nsize; ++i) {
    A[i] = value;
  }
}
void gpuKernel(uint64_t nsize,
               uint64_t ntrials,
               double* __restrict__ array,
               int* bytes_per_elem,
               int* mem_accesses_per_elem);

__global__ void block_stride(uint64_t ntrials, uint64_t nsize, double *A)
{
		uint64_t total_thr = gridDim.x * blockDim.x;
		uint64_t elem_per_thr = (nsize + (total_thr-1)) / total_thr;
		uint64_t blockOffset = blockIdx.x * blockDim.x;

		uint64_t start_idx  = blockOffset + threadIdx.x;
		uint64_t end_idx    = start_idx + elem_per_thr * total_thr;
		uint64_t stride_idx = total_thr;

		if (start_idx > nsize) {
				start_idx = nsize;
		}

		if (end_idx > nsize) {
				end_idx = nsize;
		}

		double alpha = 0.5;
		uint64_t i, j;
		for (j = 0; j < ntrials; ++j) {
				for (i = start_idx; i < end_idx; i += stride_idx) {
						double beta = 0.8;
						/* add 1 flop */
						KERNEL1(beta,A[i],alpha);
						/* add 2 flops */
						//KERNEL2(beta,A[i],alpha);
						/* add 4 flops */
						//REP2(KERNEL2(beta,A[i],alpha));

						/* add 8 flops */
						//REP4(KERNEL2(beta,A[i],alpha));
						/* add 16 flops */
						//REP8(KERNEL2(beta,A[i],alpha));
						/* add 32 flops */
						//REP16(KERNEL2(beta,A[i],alpha));
						/* add 64 flops */
						//REP32(KERNEL2(beta,A[i],alpha));
						/* add 128 flops */
						//REP64(KERNEL2(beta,A[i],alpha));
						/* add 256 flops */
						//REP128(KERNEL2(beta,A[i],alpha));
						/* add 512 flops */
						//REP256(KERNEL2(beta,A[i],alpha));
						/* add 1024 flops */
						//REP512(KERNEL2(beta,A[i],alpha));

						A[i] = beta;
				}
				alpha = alpha * (1 - 1e-8);
		}
}
int gpu_blocks = 512;
int gpu_threads = 512;


void gpuKernel(uint64_t nsize,
               uint64_t ntrials,
               double* __restrict__ A,
               int* bytes_per_elem,
               int* mem_accesses_per_elem)
{
		*bytes_per_elem        = sizeof(*A);
		*mem_accesses_per_elem = 2;
        //gpu_blocks = (nsize+1023)/1024;
		block_stride <<< gpu_blocks, gpu_threads>>> (ntrials, nsize, A);
}



double getTime()
{
		double time;
		struct timeval tm;
		gettimeofday(&tm, NULL);
		time = tm.tv_sec + (tm.tv_usec / 1000000.0);
		return time;
}

int main(int argc, char *argv[]) {


		int rank = 0;
		int nprocs = 1;
		int nthreads = 1;
		int id = 0;

		uint64_t TSIZE = 1<<30;
		uint64_t PSIZE = TSIZE / nprocs;


		double *              buf = (double *)malloc(PSIZE);

		if (buf == NULL) {
				fprintf(stderr, "Out of memory!\n");
				return -1;
		}


		{
				id = 0;
				nthreads = 1;

				int num_gpus = 0;
				int gpu;
				int gpu_id;
				int numSMs;

				hipGetDeviceCount(&num_gpus);
				if (num_gpus < 1) {
						fprintf(stderr, "No CUDA device detected.\n");
						return -1;
				}

				for (gpu = 0; gpu < num_gpus; gpu++) {
						hipDeviceProp_t dprop;
						hipGetDeviceProperties(&dprop,gpu);
						/* printf("%d: %s\n",gpu,dprop.name); */
				}

				hipSetDevice(id % num_gpus);
				hipGetDevice(&gpu_id);
				hipDeviceGetAttribute(&numSMs, hipDeviceAttributeMultiprocessorCount, gpu_id);
    
                uint64_t nsize = PSIZE / nthreads;
                nsize = nsize & (~(64-1));
                nsize = nsize / sizeof(double);
                uint64_t nid =  nsize * id ;

                // initialize small chunck of buffer within each thread
                initialize(nsize, &buf[nid], 1.0);


				double *d_buf;
				hipMalloc((void **)&d_buf, nsize*sizeof(double));
				hipMemset(d_buf, 0, nsize*sizeof(double));
				hipDeviceSynchronize();

				double startTime, endTime;
				uint64_t n,nNew;
				uint64_t t;
				int bytes_per_elem;
				int mem_accesses_per_elem;

				n = 1<<22;
				while (n <= nsize) { // working set - nsize
						uint64_t ntrials = nsize / n;
						if (ntrials < 1)
								ntrials = 1;
                        //600 original 
						for (t = 1; t <= 600; t = t + 1) { // working set - ntrials
								hipMemcpy(d_buf, &buf[nid], n*sizeof(double), hipMemcpyHostToDevice);
								hipDeviceSynchronize();

								if ((id == 0) && (rank==0)) {
										startTime = getTime();
								}

								gpuKernel(n, t, d_buf, &bytes_per_elem, &mem_accesses_per_elem);
								hipDeviceSynchronize();

								if ((id == 0) && (rank == 0)) {
										endTime = getTime();
										double seconds = (double)(endTime - startTime);
										uint64_t working_set_size = n * nthreads * nprocs;
										uint64_t total_bytes = t * working_set_size * bytes_per_elem * mem_accesses_per_elem;
										uint64_t total_flops = t * working_set_size * ERT_FLOP;
                                        printf("thread: %d\n", nthreads);
										// nsize; trials; microseconds; bytes; single thread bandwidth; total bandwidth
										printf("%12lld %12lld %15.3lf %12lld %12lld\n",
										       working_set_size * bytes_per_elem,
										       t,
										       seconds * 1000000,
										       total_bytes,
										       total_flops);
										printf("BW: %15.3lf\n",total_bytes*1.0/seconds/1024/1024/1024);
								} // print

								hipMemcpy(&buf[nid], d_buf, n*sizeof(double), hipMemcpyDeviceToHost);
								hipDeviceSynchronize();
						} // working set - ntrials

						nNew = 1.1 * n;
						if (nNew == n) {
								nNew = n+1;
						}

						n = nNew;
                        // no break brfore
				        break;
                } // working set - nsize

				hipFree(d_buf);

				if (hipGetLastError() != hipSuccess) {
						printf("Last cuda error: %s\n",hipGetErrorString(hipGetLastError()));
				}

				hipDeviceReset();
		} // parallel region

		free(buf);

		printf("\n");
		printf("META_DATA\n");
		printf("FLOPS          %d\n", ERT_FLOP);


		printf("GPU_BLOCKS     %d\n", gpu_blocks);
		printf("GPU_THREADS    %d\n", gpu_threads);

		return 0;
}

	.text
	.file	"driver1.hip"
	.globl	_Z10initializemPdd              # -- Begin function _Z10initializemPdd
	.type	_Z10initializemPdd,@function
_Z10initializemPdd:                     # @_Z10initializemPdd
	.cfi_startproc
# %bb.0:
	testq	%rdi, %rdi
	je	.LBB0_3
# %bb.1:                                # %.lr.ph.preheader
	xorl	%eax, %eax
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movsd	%xmm0, (%rsi,%rax,8)
	incq	%rax
	cmpq	%rax, %rdi
	jne	.LBB0_2
.LBB0_3:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z10initializemPdd, .Lfunc_end0-_Z10initializemPdd
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__block_stridemmPd # -- Begin function _Z27__device_stub__block_stridemmPd
	.type	_Z27__device_stub__block_stridemmPd,@function
_Z27__device_stub__block_stridemmPd:    # @_Z27__device_stub__block_stridemmPd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12block_stridemmPd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z27__device_stub__block_stridemmPd, .Lfunc_end1-_Z27__device_stub__block_stridemmPd
	.cfi_endproc
                                        # -- End function
	.globl	_Z9gpuKernelmmPdPiS0_           # -- Begin function _Z9gpuKernelmmPdPiS0_
	.type	_Z9gpuKernelmmPdPiS0_,@function
_Z9gpuKernelmmPdPiS0_:                  # @_Z9gpuKernelmmPdPiS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r15
	movq	%rdi, %r14
	movl	$8, (%rcx)
	movl	$2, (%r8)
	movl	gpu_blocks(%rip), %edi
	movl	gpu_threads(%rip), %edx
	btsq	$32, %rdi
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB2_2
# %bb.1:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB2_2:
	.cfi_def_cfa_offset 32
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z27__device_stub__block_stridemmPd # TAILCALL
.Lfunc_end2:
	.size	_Z9gpuKernelmmPdPiS0_, .Lfunc_end2-_Z9gpuKernelmmPdPiS0_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7getTimev
.LCPI3_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z7getTimev
	.type	_Z7getTimev,@function
_Z7getTimev:                            # @_Z7getTimev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	divsd	.LCPI3_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z7getTimev, .Lfunc_end3-_Z7getTimev
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI4_3:
	.quad	0x3f50000000000000              # double 9.765625E-4
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI4_1:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI4_2:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 1568
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1073741824, %edi               # imm = 0x40000000
	callq	malloc
	testq	%rax, %rax
	je	.LBB4_1
# %bb.3:
	movq	%rax, %rbx
	leaq	28(%rsp), %r14
	movl	$0, (%r14)
	movq	%r14, %rdi
	callq	hipGetDeviceCount
	cmpl	$0, (%r14)
	jle	.LBB4_14
# %bb.4:                                # %.lr.ph.preheader
	xorl	%ebp, %ebp
	leaq	40(%rsp), %r14
.LBB4_5:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebp, %esi
	callq	hipGetDevicePropertiesR0600
	incl	%ebp
	cmpl	28(%rsp), %ebp
	jl	.LBB4_5
# %bb.6:                                # %._crit_edge
	xorl	%r15d, %r15d
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	36(%rsp), %r14
	movq	%r14, %rdi
	callq	hipGetDevice
	movl	(%r14), %edx
	leaq	32(%rsp), %rdi
	movl	$63, %esi
	callq	hipDeviceGetAttribute
	movabsq	$4607182418800017408, %rax      # imm = 0x3FF0000000000000
.LBB4_7:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movq	%rax, (%rbx,%r15,8)
	incq	%r15
	cmpq	$134217728, %r15                # imm = 0x8000000
	jne	.LBB4_7
# %bb.8:                                # %_Z10initializemPdd.exit
	leaq	8(%rsp), %r14
	movl	$1073741824, %esi               # imm = 0x40000000
	movq	%r14, %rdi
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$1073741824, %edx               # imm = 0x40000000
	xorl	%esi, %esi
	callq	hipMemset
	callq	hipDeviceSynchronize
	movl	$1, %r14d
	movl	$4194304, %r12d                 # imm = 0x400000
	movl	$8388608, %r15d                 # imm = 0x800000
.LBB4_9:                                # =>This Inner Loop Header: Depth=1
	movq	8(%rsp), %rdi
	movl	$33554432, %edx                 # imm = 0x2000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	leaq	40(%rsp), %r13
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	40(%rsp), %xmm0
	cvtsi2sdq	48(%rsp), %xmm2
	movsd	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm1, %xmm2
	addsd	%xmm0, %xmm2
	movsd	%xmm2, (%rsp)                   # 8-byte Spill
	movq	8(%rsp), %rdx
	movl	$4194304, %edi                  # imm = 0x400000
	movq	%r14, %rsi
	leaq	24(%rsp), %rcx
	leaq	20(%rsp), %r8
	callq	_Z9gpuKernelmmPdPiS0_
	callq	hipDeviceSynchronize
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	40(%rsp), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	48(%rsp), %xmm1
	divsd	.LCPI4_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	subsd	(%rsp), %xmm1                   # 8-byte Folded Reload
	movsd	%xmm1, (%rsp)                   # 8-byte Spill
	movslq	24(%rsp), %r13
	movq	%r12, %rax
	imulq	%r13, %rax
	movslq	20(%rsp), %rbp
	imulq	%rax, %rbp
	movl	$.L.str.2, %edi
	movl	$1, %esi
	xorl	%eax, %eax
	callq	printf
	shlq	$22, %r13
	movsd	(%rsp), %xmm0                   # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI4_0(%rip), %xmm0
	movl	$.L.str.3, %edi
	movq	%r13, %rsi
	movq	%r14, %rdx
	movq	%rbp, %rcx
	movq	%r15, %r8
	movb	$1, %al
	callq	printf
	movq	%rbp, %xmm1
	punpckldq	.LCPI4_1(%rip), %xmm1   # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
	subpd	.LCPI4_2(%rip), %xmm1
	movapd	%xmm1, %xmm0
	unpckhpd	%xmm1, %xmm0                    # xmm0 = xmm0[1],xmm1[1]
	addsd	%xmm1, %xmm0
	divsd	(%rsp), %xmm0                   # 8-byte Folded Reload
	movsd	.LCPI4_3(%rip), %xmm1           # xmm1 = mem[0],zero
	mulsd	%xmm1, %xmm0
	mulsd	%xmm1, %xmm0
	mulsd	%xmm1, %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rsi
	movl	$33554432, %edx                 # imm = 0x2000000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	incq	%r14
	addq	$4194304, %r12                  # imm = 0x400000
	addq	$8388608, %r15                  # imm = 0x800000
	cmpq	$601, %r14                      # imm = 0x259
	jne	.LBB4_9
# %bb.10:
	movq	8(%rsp), %rdi
	callq	hipFree
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB4_12
# %bb.11:
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB4_12:
	callq	hipDeviceReset
	movq	%rbx, %rdi
	callq	free
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
	movl	$.L.str.8, %edi
	movl	$2, %esi
	xorl	%eax, %eax
	callq	printf
	movl	gpu_blocks(%rip), %esi
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	movl	gpu_threads(%rip), %esi
	movl	$.L.str.10, %edi
	xorl	%eax, %eax
	callq	printf
.LBB4_13:
	movl	%ebx, %eax
	addq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_1:
	.cfi_def_cfa_offset 1568
	movq	stderr(%rip), %rcx
	movl	$.L.str, %edi
	movl	$15, %esi
	jmp	.LBB4_2
.LBB4_14:                               # %.thread
	movq	stderr(%rip), %rcx
	movl	$.L.str.1, %edi
	movl	$25, %esi
.LBB4_2:
	movl	$1, %edx
	callq	fwrite@PLT
	movl	$-1, %ebx
	jmp	.LBB4_13
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12block_stridemmPd, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12block_stridemmPd,@object    # @_Z12block_stridemmPd
	.section	.rodata,"a",@progbits
	.globl	_Z12block_stridemmPd
	.p2align	3, 0x0
_Z12block_stridemmPd:
	.quad	_Z27__device_stub__block_stridemmPd
	.size	_Z12block_stridemmPd, 8

	.type	gpu_blocks,@object              # @gpu_blocks
	.data
	.globl	gpu_blocks
	.p2align	2, 0x0
gpu_blocks:
	.long	512                             # 0x200
	.size	gpu_blocks, 4

	.type	gpu_threads,@object             # @gpu_threads
	.globl	gpu_threads
	.p2align	2, 0x0
gpu_threads:
	.long	512                             # 0x200
	.size	gpu_threads, 4

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Out of memory!\n"
	.size	.L.str, 16

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"No CUDA device detected.\n"
	.size	.L.str.1, 26

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"thread: %d\n"
	.size	.L.str.2, 12

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%12lld %12lld %15.3lf %12lld %12lld\n"
	.size	.L.str.3, 37

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"BW: %15.3lf\n"
	.size	.L.str.4, 13

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Last cuda error: %s\n"
	.size	.L.str.5, 21

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"FLOPS          %d\n"
	.size	.L.str.8, 19

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"GPU_BLOCKS     %d\n"
	.size	.L.str.9, 19

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"GPU_THREADS    %d\n"
	.size	.L.str.10, 19

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12block_stridemmPd"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"META_DATA"
	.size	.Lstr, 10

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__block_stridemmPd
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12block_stridemmPd
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12block_stridemmPd    ; -- Begin function _Z12block_stridemmPd
	.globl	_Z12block_stridemmPd
	.p2align	8
	.type	_Z12block_stridemmPd,@function
_Z12block_stridemmPd:                   ; @_Z12block_stridemmPd
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b64 s[8:9], 0
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u64 s[4:5], 0
	s_cbranch_scc1 .LBB0_6
; %bb.1:                                ; %.preheader.lr.ph
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s11, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s10, s3, s11
	s_mul_i32 s15, s15, s11
	v_cvt_f32_u32_e32 v1, s10
	s_add_u32 s2, s6, s10
	s_addc_u32 s3, s7, 0
	s_add_u32 s14, s2, -1
	s_addc_u32 s3, s3, -1
	v_fmamk_f32 v1, 0, 0x4f800000, v1
	s_sub_u32 s13, 0, s10
	s_subb_u32 s16, 0, 0
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x5f7ffffc, v1
	v_mul_f32_e32 v2, 0x2f800000, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v2, v2
	v_fmamk_f32 v1, v2, 0xcf800000, v1
	v_cvt_u32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s12, v1
	s_mul_i32 s17, s13, s2
	s_delay_alu instid0(VALU_DEP_1)
	s_mul_hi_u32 s18, s13, s12
	s_mul_i32 s19, s16, s12
	s_add_i32 s17, s18, s17
	s_mul_i32 s20, s13, s12
	s_add_i32 s17, s17, s19
	s_mul_hi_u32 s18, s12, s20
	s_mul_hi_u32 s21, s2, s20
	s_mul_i32 s19, s2, s20
	s_mul_hi_u32 s20, s12, s17
	s_mul_i32 s12, s12, s17
	s_mul_hi_u32 s22, s2, s17
	s_add_u32 s12, s18, s12
	s_addc_u32 s18, 0, s20
	s_add_u32 s12, s12, s19
	s_mul_i32 s17, s2, s17
	s_addc_u32 s12, s18, s21
	s_addc_u32 s18, s22, 0
	s_add_u32 s12, s12, s17
	s_addc_u32 s17, 0, s18
	v_add_co_u32 v1, s12, v1, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s12, 0
	s_addc_u32 s2, s2, s17
	v_readfirstlane_b32 s12, v1
	s_mul_i32 s17, s13, s2
	s_delay_alu instid0(VALU_DEP_1)
	s_mul_hi_u32 s18, s13, s12
	s_mul_i32 s16, s16, s12
	s_add_i32 s17, s18, s17
	s_mul_i32 s13, s13, s12
	s_add_i32 s17, s17, s16
	s_mul_hi_u32 s18, s2, s13
	s_mul_i32 s19, s2, s13
	s_mul_hi_u32 s13, s12, s13
	s_mul_hi_u32 s20, s12, s17
	s_mul_i32 s12, s12, s17
	s_mul_hi_u32 s16, s2, s17
	s_add_u32 s12, s13, s12
	s_addc_u32 s13, 0, s20
	s_add_u32 s12, s12, s19
	s_mul_i32 s17, s2, s17
	s_addc_u32 s12, s13, s18
	s_addc_u32 s13, s16, 0
	s_add_u32 s12, s12, s17
	s_addc_u32 s13, 0, s13
	v_add_co_u32 v1, s12, v1, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s12, 0
	s_addc_u32 s2, s2, s13
	v_readfirstlane_b32 s12, v1
	s_mul_i32 s16, s14, s2
	s_mul_hi_u32 s13, s14, s2
	s_mul_hi_u32 s17, s3, s2
	s_mul_i32 s2, s3, s2
	s_mul_hi_u32 s18, s14, s12
	s_mul_hi_u32 s19, s3, s12
	s_mul_i32 s12, s3, s12
	s_add_u32 s16, s18, s16
	s_addc_u32 s13, 0, s13
	s_add_u32 s12, s16, s12
	s_addc_u32 s12, s13, s19
	s_addc_u32 s13, s17, 0
	s_add_u32 s2, s12, s2
	s_addc_u32 s12, 0, s13
	s_mul_hi_u32 s13, s10, s2
	s_mul_i32 s2, s10, s2
	s_mul_i32 s12, s10, s12
	v_sub_co_u32 v1, s2, s14, s2
	s_add_i32 s13, s13, s12
	s_cmp_lg_u32 s2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_co_u32 v2, s2, v1, s10
	s_subb_u32 s12, s3, s13
	s_cmp_lg_u32 s2, 0
	v_cmp_le_u32_e32 vcc_lo, s10, v2
	v_sub_co_u32 v3, s2, v2, s10
	s_subb_u32 s13, s12, 0
	s_cmp_lg_u32 s2, 0
	v_cndmask_b32_e64 v4, 0, -1, vcc_lo
	s_subb_u32 s2, s13, 0
	s_cmp_eq_u32 s13, 0
	v_mov_b32_e32 v6, s2
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s12, 0
	v_cndmask_b32_e32 v4, -1, v4, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s10, v1
	s_cselect_b32 s2, -1, 0
	v_cndmask_b32_e64 v5, 0, -1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	v_cndmask_b32_e64 v4, -1, v5, s2
	v_cndmask_b32_e32 v5, s13, v6, vcc_lo
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_add_co_u32 v6, s2, s15, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	v_add_co_ci_u32_e64 v7, null, 0, 0, s2
	v_dual_cndmask_b32 v3, s12, v5 :: v_dual_mov_b32 v4, 0
	v_mov_b32_e32 v5, 0x3fe00000
	v_cndmask_b32_e32 v1, v1, v2, vcc_lo
	s_load_b64 s[12:13], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_co_u32 v0, vcc_lo, v6, v1
	v_sub_co_ci_u32_e32 v1, vcc_lo, v7, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v0, s14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_cmp_gt_u64_e32 vcc_lo, s[6:7], v[6:7]
	s_mov_b32 s2, 0xfaa19c47
	s_mov_b32 s3, 0x3fefffff
	v_cmp_gt_u64_e64 s0, s[6:7], v[2:3]
	v_cndmask_b32_e32 v1, s7, v7, vcc_lo
	v_cndmask_b32_e32 v0, s6, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, s7, v3, s0
	v_cndmask_b32_e64 v2, s6, v2, s0
	s_lshl_b64 s[6:7], s[10:11], 3
	v_lshlrev_b64 v[8:9], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_lt_u64_e32 vcc_lo, v[6:7], v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, s0, s12, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s13, v9, s0
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	s_and_saveexec_b32 s11, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	v_dual_mov_b32 v11, v1 :: v_dual_mov_b32 v10, v0
	s_mov_b32 s12, 0
.LBB0_4:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b64 v[12:13], v[8:9], off
	v_add_co_u32 v10, s0, v10, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s0, 0, v11, s0
	v_cmp_ge_u64_e64 s0, v[10:11], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_or_b32 s12, s0, s12
	s_waitcnt vmcnt(0)
	v_add_f64 v[12:13], v[4:5], v[12:13]
	global_store_b64 v[8:9], v[12:13], off
	v_add_co_u32 v8, s1, v8, s6
	v_add_co_ci_u32_e64 v9, s1, s7, v9, s1
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB0_4
.LBB0_5:                                ; %Flow50
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_mul_f64 v[4:5], v[4:5], s[2:3]
	s_add_u32 s8, s8, 1
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u64 s[8:9], s[4:5]
	s_cbranch_scc1 .LBB0_2
.LBB0_6:                                ; %._crit_edge40
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12block_stridemmPd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 23
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12block_stridemmPd, .Lfunc_end0-_Z12block_stridemmPd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 936
; NumSgprs: 25
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 25
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12block_stridemmPd
    .private_segment_fixed_size: 0
    .sgpr_count:     25
    .sgpr_spill_count: 0
    .symbol:         _Z12block_stridemmPd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
