#include <bits/stdc++.h>
#include <cuda.h>
using namespace std;

#define CEIL(a,b) ((a-1)/b+1)
#define N 1024

__global__  void Sum(float* d_a,float* d_b,float* d_c,int r,int c)
{
    int x=blockIdx.x*blockDim.x + threadIdx.x;
    int y=blockIdx.y*blockDim.y + threadIdx.y;
    int index=c*y+x;
    if(x<c && y<r)
        d_c[index]=d_a[index]+d_b[index];
}

int main() 
{
    int r,c;
    cout<<"enter row and column : ";
    cin>>r>>c;
    float h_a[r][c], h_b[r][c], h_c[r][c];
    int bytes=r*c*sizeof(float);
    
    for(int i=0;i<r;i++)
    {
        for(int j=0;j<c;j++)
        {
			h_a[i][j]=rand()%1000;
			h_b[i][j]=rand()%1000;
        }
    }
	
    float *d_a, *d_b, *d_c;
    cudaMalloc((void**)&d_b, bytes);
    cudaMalloc((void**)&d_a, bytes);
    cudaMalloc((void**)&d_c, bytes);
    cudaMemcpy(d_b, h_b, bytes, cudaMemcpyHostToDevice);
    cudaMemcpy(d_a, h_a, bytes, cudaMemcpyHostToDevice);
    
    dim3 block(32, 32, 1);
    dim3 grid(CEIL(r, 32), CEIL(c, 32), 1);
    Sum<<<grid, block>>>(d_a,d_b,d_c,r,c);
    cudaMemcpy(h_c, d_c, bytes, cudaMemcpyDeviceToHost);
    
    bool verify=true;
    for(int i=0;i<r;i++)
    {
	for(int j=0;j<c;j++)
	{
		if(h_c[i][j]!=h_a[i][j]+h_b[i][j])
		verify=false;
	}
    }
    
    if(verify)
    cout<<"Result is Correct";
    else
    cout<<"Incorrect Result";
    cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_c);
}


	.file	"tmpxft_0032730d_00000000-6_matrix_sum.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10828:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE10828:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z28__device_stub__Z3SumPfS_S_iiPfS_S_ii
	.type	_Z28__device_stub__Z3SumPfS_S_iiPfS_S_ii, @function
_Z28__device_stub__Z3SumPfS_S_iiPfS_S_ii:
.LFB10850:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3SumPfS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10850:
	.size	_Z28__device_stub__Z3SumPfS_S_iiPfS_S_ii, .-_Z28__device_stub__Z3SumPfS_S_iiPfS_S_ii
	.globl	_Z3SumPfS_S_ii
	.type	_Z3SumPfS_S_ii, @function
_Z3SumPfS_S_ii:
.LFB10851:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z3SumPfS_S_iiPfS_S_ii
	.cfi_endproc
.LFE10851:
	.size	_Z3SumPfS_S_ii, .-_Z3SumPfS_S_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"enter row and column : "
.LC1:
	.string	"Result is Correct"
.LC2:
	.string	"Incorrect Result"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB10825:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$23, %edx
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$104, %rsp
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	leaq	-112(%rbp), %rsi
	leaq	_ZSt3cin(%rip), %rdi
	call	_ZNSirsERi@PLT
	leaq	-108(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSirsERi@PLT
	movslq	-108(%rbp), %rax
	movslq	-112(%rbp), %rbx
	movq	%rsp, %rcx
	imulq	%rax, %rbx
	leaq	0(,%rax,4), %r15
	leaq	15(,%rbx,4), %rax
	movq	%rax, %rsi
	movq	%rax, %rdx
	andq	$-4096, %rsi
	andq	$-16, %rdx
	subq	%rsi, %rcx
.L9:
	cmpq	%rcx, %rsp
	je	.L10
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L9
.L10:
	andl	$4095, %edx
	subq	%rdx, %rsp
	testq	%rdx, %rdx
	je	.L11
	orq	$0, -8(%rsp,%rdx)
.L11:
	movq	%rax, %rsi
	movq	%rax, %rdx
	movq	%rsp, %rcx
	movq	%rsp, %r13
	andq	$-4096, %rsi
	andq	$-16, %rdx
	subq	%rsi, %rcx
.L12:
	cmpq	%rcx, %rsp
	je	.L13
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L12
.L13:
	andl	$4095, %edx
	subq	%rdx, %rsp
	testq	%rdx, %rdx
	je	.L14
	orq	$0, -8(%rsp,%rdx)
.L14:
	movq	%rax, %rdx
	movq	%rsp, %rcx
	andq	$-4096, %rax
	movq	%rsp, %r14
	andq	$-16, %rdx
	subq	%rax, %rcx
.L15:
	cmpq	%rcx, %rsp
	je	.L16
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L15
.L16:
	movq	%rdx, %rax
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L17
	orq	$0, -8(%rsp,%rax)
.L17:
	leal	0(,%rbx,4), %eax
	movq	%rsp, -120(%rbp)
	xorl	%edi, %edi
	xorl	%ebx, %ebx
	movl	%eax, -124(%rbp)
.L18:
	cmpl	%ebx, -112(%rbp)
	jle	.L44
	movq	%rdi, %r12
	xorl	%r8d, %r8d
.L20:
	cmpl	%r8d, -108(%rbp)
	jle	.L45
	movq	%rdi, -136(%rbp)
	movl	%r8d, -128(%rbp)
	call	rand@PLT
	movl	$1000, %ecx
	cltd
	idivl	%ecx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, 0(%r13,%r12)
	call	rand@PLT
	movl	$1000, %ecx
	movl	-128(%rbp), %r8d
	movq	-136(%rbp), %rdi
	cltd
	idivl	%ecx
	incl	%r8d
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%r14,%r12)
	addq	$4, %r12
	jmp	.L20
.L45:
	incl	%ebx
	addq	%r15, %rdi
	jmp	.L18
.L44:
	movslq	-124(%rbp), %rbx
	leaq	-96(%rbp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	-104(%rbp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	-88(%rbp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	-96(%rbp), %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	-104(%rbp), %rdi
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	-108(%rbp), %eax
	movl	$32, %edi
	xorl	%r9d, %r9d
	movabsq	$137438953504, %rsi
	xorl	%r8d, %r8d
	movl	$1, -72(%rbp)
	decl	%eax
	movq	%rsi, -80(%rbp)
	cltd
	movl	$1, -60(%rbp)
	idivl	%edi
	leal	1(%rax), %ecx
	movl	-112(%rbp), %eax
	movl	%ecx, -64(%rbp)
	movl	$1, %ecx
	decl	%eax
	cltd
	idivl	%edi
	movq	%rsi, %rdx
	movl	$1, %esi
	incl	%eax
	movl	%eax, -68(%rbp)
	movq	-68(%rbp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movl	-108(%rbp), %r8d
	movl	-112(%rbp), %ecx
	movq	-88(%rbp), %rdx
	movq	-96(%rbp), %rsi
	movq	-104(%rbp), %rdi
	call	_Z28__device_stub__Z3SumPfS_S_iiPfS_S_ii
.L21:
	movq	-120(%rbp), %rdi
	movq	-88(%rbp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	movl	-112(%rbp), %r8d
	movl	-108(%rbp), %r9d
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	movb	$1, %dil
.L22:
	cmpl	%edx, %r8d
	jle	.L46
	movq	%rcx, %rax
	xorl	%esi, %esi
.L26:
	cmpl	%esi, %r9d
	jle	.L47
	movq	-120(%rbp), %rbx
	movss	0(%r13,%rax), %xmm0
	addss	(%r14,%rax), %xmm0
	ucomiss	(%rbx,%rax), %xmm0
	jp	.L31
	je	.L23
.L31:
	xorl	%edi, %edi
.L23:
	incl	%esi
	addq	$4, %rax
	jmp	.L26
.L47:
	incl	%edx
	addq	%r15, %rcx
	jmp	.L22
.L46:
	movl	$17, %edx
	leaq	.LC1(%rip), %rsi
	testb	%dil, %dil
	jne	.L43
	movl	$16, %edx
	leaq	.LC2(%rip), %rsi
.L43:
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	movq	-104(%rbp), %rdi
	call	cudaFree@PLT
	movq	-96(%rbp), %rdi
	call	cudaFree@PLT
	movq	-88(%rbp), %rdi
	call	cudaFree@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10825:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z3SumPfS_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB10853:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3SumPfS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE10853:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <bits/stdc++.h>
#include <hip/hip_runtime.h>
using namespace std;

#define CEIL(a,b) ((a-1)/b+1)
#define N 1024

__global__  void Sum(float* d_a,float* d_b,float* d_c,int r,int c)
{
    int x=blockIdx.x*blockDim.x + threadIdx.x;
    int y=blockIdx.y*blockDim.y + threadIdx.y;
    int index=c*y+x;
    if(x<c && y<r)
        d_c[index]=d_a[index]+d_b[index];
}

int main() 
{
    int r,c;
    cout<<"enter row and column : ";
    cin>>r>>c;
    float h_a[r][c], h_b[r][c], h_c[r][c];
    int bytes=r*c*sizeof(float);
    
    for(int i=0;i<r;i++)
    {
        for(int j=0;j<c;j++)
        {
			h_a[i][j]=rand()%1000;
			h_b[i][j]=rand()%1000;
        }
    }
	
    float *d_a, *d_b, *d_c;
    hipMalloc((void**)&d_b, bytes);
    hipMalloc((void**)&d_a, bytes);
    hipMalloc((void**)&d_c, bytes);
    hipMemcpy(d_b, h_b, bytes, hipMemcpyHostToDevice);
    hipMemcpy(d_a, h_a, bytes, hipMemcpyHostToDevice);
    
    dim3 block(32, 32, 1);
    dim3 grid(CEIL(r, 32), CEIL(c, 32), 1);
    Sum<<<grid, block>>>(d_a,d_b,d_c,r,c);
    hipMemcpy(h_c, d_c, bytes, hipMemcpyDeviceToHost);
    
    bool verify=true;
    for(int i=0;i<r;i++)
    {
	for(int j=0;j<c;j++)
	{
		if(h_c[i][j]!=h_a[i][j]+h_b[i][j])
		verify=false;
	}
    }
    
    if(verify)
    cout<<"Result is Correct";
    else
    cout<<"Incorrect Result";
    hipFree(d_a);
    hipFree(d_b);
    hipFree(d_c);
}


	.text
	.file	"matrix_sum.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z18__device_stub__SumPfS_S_ii  # -- Begin function _Z18__device_stub__SumPfS_S_ii
	.type	_Z18__device_stub__SumPfS_S_ii,@function
_Z18__device_stub__SumPfS_S_ii:         # @_Z18__device_stub__SumPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3SumPfS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__SumPfS_S_ii, .Lfunc_end0-_Z18__device_stub__SumPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$104, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	-48(%rbp), %r14
	movl	$_ZSt3cin, %edi
	movq	%r14, %rsi
	callq	_ZNSirsERi
	leaq	-44(%rbp), %r15
	movq	%rax, %rdi
	movq	%r15, %rsi
	callq	_ZNSirsERi
	movq	%rsp, -112(%rbp)                # 8-byte Spill
	movl	(%r14), %eax
	movl	(%r15), %edx
	movq	%rdx, %rcx
	movq	%rdx, -80(%rbp)                 # 8-byte Spill
	imulq	%rdx, %rax
	leaq	15(,%rax,4), %rax
	andq	$-16, %rax
	movq	%rsp, %rcx
	subq	%rax, %rcx
	movq	%rcx, -88(%rbp)                 # 8-byte Spill
	movq	%rcx, %rsp
	movl	(%r14), %eax
	movl	(%r15), %edx
	movq	%rax, %rcx
	imulq	%rdx, %rcx
	leaq	15(,%rcx,4), %rcx
	andq	$-16, %rcx
	movq	%rsp, %r12
	subq	%rcx, %r12
	movq	%r12, %rsp
	movq	%rsp, %r15
	subq	%rcx, %r15
	movq	%r15, %rsp
	movl	%eax, %esi
	movq	%rdx, %rcx
	movq	%rdx, -72(%rbp)                 # 8-byte Spill
	imull	%edx, %esi
	shll	$2, %esi
	movl	%esi, -60(%rbp)                 # 4-byte Spill
	testl	%eax, %eax
	jle	.LBB1_7
# %bb.1:                                # %.preheader39.preheader
	movq	-72(%rbp), %rdx                 # 8-byte Reload
	leaq	(,%rdx,4), %rcx
	movq	%rcx, -128(%rbp)                # 8-byte Spill
	movq	-80(%rbp), %rcx                 # 8-byte Reload
	leaq	(,%rcx,4), %rcx
	movq	%rcx, -120(%rbp)                # 8-byte Spill
	xorl	%esi, %esi
	movq	-88(%rbp), %rbx                 # 8-byte Reload
	movq	%r12, %r14
	movl	%edx, %ecx
.LBB1_2:                                # %.preheader39
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	testl	%ecx, %ecx
	jle	.LBB1_6
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movq	%rsi, -136(%rbp)                # 8-byte Spill
	xorl	%r13d, %r13d
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%r13,4)
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r14,%r13,4)
	incq	%r13
	movslq	-44(%rbp), %rcx
	cmpq	%rcx, %r13
	jl	.LBB1_4
# %bb.5:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	-48(%rbp), %eax
	movq	-136(%rbp), %rsi                # 8-byte Reload
.LBB1_6:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%rsi
	movslq	%eax, %rdx
	addq	-128(%rbp), %r14                # 8-byte Folded Reload
	addq	-120(%rbp), %rbx                # 8-byte Folded Reload
	cmpq	%rdx, %rsi
	jl	.LBB1_2
.LBB1_7:                                # %._crit_edge42
	movslq	-60(%rbp), %rbx                 # 4-byte Folded Reload
	leaq	-96(%rbp), %r13
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	-104(%rbp), %r14
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	-56(%rbp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%r12, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movq	-88(%rbp), %r14                 # 8-byte Reload
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	-48(%rbp), %eax
	leal	-1(%rax), %ecx
	addl	$30, %eax
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$5, %eax
	incl	%eax
	movl	-44(%rbp), %edi
	leal	-1(%rdi), %ecx
	addl	$30, %edi
	testl	%ecx, %ecx
	cmovnsl	%ecx, %edi
	sarl	$5, %edi
	incl	%edi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:
	movq	-104(%rbp), %rdi
	movq	-96(%rbp), %rsi
	movq	-56(%rbp), %rdx
	movl	-48(%rbp), %ecx
	movl	-44(%rbp), %r8d
	callq	_Z18__device_stub__SumPfS_S_ii
.LBB1_9:
	movq	-56(%rbp), %rsi
	movq	%r15, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	-48(%rbp), %eax
	testl	%eax, %eax
	jle	.LBB1_16
# %bb.10:                               # %.preheader.lr.ph
	movl	-44(%rbp), %ecx
	movq	-72(%rbp), %rdx                 # 8-byte Reload
	leaq	(,%rdx,4), %rdx
	movq	-80(%rbp), %r10                 # 8-byte Reload
	shlq	$2, %r10
	movb	$1, %sil
	xorl	%edi, %edi
	xorl	%r8d, %r8d
.LBB1_11:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_13 Depth 2
	testl	%ecx, %ecx
	jle	.LBB1_14
# %bb.12:                               # %.lr.ph45
                                        #   in Loop: Header=BB1_11 Depth=1
	xorl	%r9d, %r9d
.LBB1_13:                               #   Parent Loop BB1_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r14,%r9,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	addss	(%r12,%r9,4), %xmm0
	ucomiss	(%r15,%r9,4), %xmm0
	movzbl	%sil, %esi
	cmovnel	%edi, %esi
	cmovpl	%edi, %esi
	incq	%r9
	cmpq	%r9, %rcx
	jne	.LBB1_13
.LBB1_14:                               # %._crit_edge46
                                        #   in Loop: Header=BB1_11 Depth=1
	incq	%r8
	addq	%rdx, %r12
	addq	%r10, %r14
	addq	%rdx, %r15
	cmpq	%rax, %r8
	jne	.LBB1_11
# %bb.15:                               # %._crit_edge49
	testb	$1, %sil
	jne	.LBB1_16
# %bb.17:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$16, %edx
	jmp	.LBB1_18
.LBB1_16:                               # %._crit_edge49.thread
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$17, %edx
.LBB1_18:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	-104(%rbp), %rdi
	callq	hipFree
	movq	-96(%rbp), %rdi
	callq	hipFree
	movq	-56(%rbp), %rdi
	callq	hipFree
	movq	-112(%rbp), %rsp                # 8-byte Reload
	xorl	%eax, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3SumPfS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3SumPfS_S_ii,@object          # @_Z3SumPfS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z3SumPfS_S_ii
	.p2align	3, 0x0
_Z3SumPfS_S_ii:
	.quad	_Z18__device_stub__SumPfS_S_ii
	.size	_Z3SumPfS_S_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"enter row and column : "
	.size	.L.str, 24

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Result is Correct"
	.size	.L.str.1, 18

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Incorrect Result"
	.size	.L.str.2, 17

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3SumPfS_S_ii"
	.size	.L__unnamed_1, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__SumPfS_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3SumPfS_S_ii
	.addrsig_sym _ZSt4cout
	.addrsig_sym _ZSt3cin
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3SumPfS_S_ii          ; -- Begin function _Z3SumPfS_S_ii
	.globl	_Z3SumPfS_S_ii
	.p2align	8
	.type	_Z3SumPfS_S_ii,@function
_Z3SumPfS_S_ii:                         ; @_Z3SumPfS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s4, 16
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s5, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v0
	v_cmp_gt_i32_e64 s2, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s3, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3SumPfS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3SumPfS_S_ii, .Lfunc_end0-_Z3SumPfS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 232
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3SumPfS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3SumPfS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
