/*
* This sample implements a separable convolution 
* of a 2D image with an arbitrary filter.
*/
#include <time.h>
#include <stdio.h>
#include <stdlib.h>

//unsigned int radius;

#define radius 16
#define FILTER_LENGTH 	(2 * radius + 1)
#define ABS(val)  	((val)<0.0 ? (-(val)) : (val))
#define accuracy  	6

#define tileRH 1
#define tileRW 512

#define tileCH 16
#define tileCW 16


typedef float numid;

__constant__ numid d_Filter[FILTER_LENGTH];

__global__ void tiledConvRowGPU(numid *d_Dst, numid *d_Src, int imageW, int imageH){
	int k;
	numid sum = 0;
	
	int tx=threadIdx.x; 
	int ty=threadIdx.y;
	int bx=blockIdx.x; 
	int by=blockIdx.y;
	  
	
	int row = blockDim.y*by + ty ;
	int col = blockDim.x*bx + tx;
	
	int newImageW = imageW + radius * 2;
	__shared__ numid ShMemory[tileRH] [tileRW + 2 * radius];
	
	if(tx-radius<0){											//Near Left Bounds
		ShMemory[ty][tx] = d_Src[(row+radius) * newImageW + col];
	}
	
	ShMemory[ty][tx+radius] = d_Src[(row+radius) * newImageW + col + radius];				//Center
	
	if(tx >= (tileRW - radius)){							
		ShMemory[ty] [tx + 2 * radius] = d_Src[(row+radius) * newImageW + col + 2 * radius];		//Near Right Bounds
	}
	__syncthreads();
	
	for (k = -radius; k <= radius; k++) {
		
		sum += ShMemory[ty][tx+k+radius] * d_Filter[radius - k];
		
	}
	
	d_Dst[(row+radius) * newImageW + col+radius] = sum;
	
}
__global__ void tiledConvColGPU(numid *d_Dst, numid *d_Src, int imageW, int imageH){
	int k;
	numid sum = 0;
	
	int tx=threadIdx.x; 
	int ty=threadIdx.y;
	int bx=blockIdx.x; 
	int by=blockIdx.y;
	
	
	int row = blockDim.y*by + ty ;
	
	int col = blockDim.x*bx + tx;
	int newImageW = imageW + radius * 2;

	__shared__ numid ShMemory[tileCH + 2 * radius][ tileCW];
	
	if(ty-radius<0){											//Upper Bounds
		ShMemory[ty]  [tx] = d_Src[row * newImageW + col + radius];
	}
	
	ShMemory[ty + radius][ tx ] = d_Src[(row + radius) * newImageW + col + radius ];			//Center
	
	
	ShMemory[ty + 2 * radius ][ tx ] = d_Src[(row + 2* radius) * newImageW + col + radius ];		//Lower Bounds
	
	__syncthreads();
	
	for (k = -radius; k <= radius; k++) {
		
		sum += ShMemory[(ty + k + radius)][tx] * d_Filter[radius - k];
		
	}
	
	d_Dst[ (row + radius) * newImageW + col + radius] = sum;
}


////////////////////////////////////////////////////////////////////////////////
// Reference row convolution filter
////////////////////////////////////////////////////////////////////////////////
void convolutionRowCPU(numid *h_Dst, numid *h_Src, numid *h_Filter, 
                       int imageW, int imageH, int filterR) {

  int x, y, k;
                      
  for (y = 0; y < imageH; y++) {
    for (x = 0; x < imageW; x++) {
      numid sum = 0;

      for (k = -filterR; k <= filterR; k++) {
        int d = x + k;

        if (d >= 0 && d < imageW) {
          sum += h_Src[y * imageW + d] * h_Filter[filterR - k];
        }     

        h_Dst[y * imageW + x] = sum;
      }
    }
  }
   
        
}


////////////////////////////////////////////////////////////////////////////////
// Reference column convolution filter
////////////////////////////////////////////////////////////////////////////////
void convolutionColumnCPU(numid *h_Dst, numid *h_Src, numid *h_Filter,
    			   int imageW, int imageH, int filterR) {

  int x, y, k;
  
  for (y = 0; y < imageH; y++) {
    for (x = 0; x < imageW; x++) {
      numid sum = 0;

      for (k = -filterR; k <= filterR; k++) {
        int d = y + k;

        if (d >= 0 && d < imageH) {
          sum += h_Src[d * imageW + x] * h_Filter[filterR - k];
        }   
 
        h_Dst[y * imageW + x] = sum;
      }
    }
  }
    
}


////////////////////////////////////////////////////////////////////////////////
// Main program
////////////////////////////////////////////////////////////////////////////////
int main(int argc, char **argv) {
    cudaSetDevice(0);
    numid
    *h_Filter,
    *h_Input,
    *h_PadInput,
    *h_Buffer,
    *h_OutputCPU,
    
    *d_Input,
    *d_Buffer,
    *d_OutputGPU,
    *result;
    struct timespec  tv1, tv2;
    cudaEvent_t start;
    cudaEvent_t stop;
    
    cudaEventCreate(&start);
    cudaEventCreate(&stop);
    int imageW;
    int imageH;
    unsigned int i,j;
    
    if(argc<2){
      printf("Please specify the image size as execution arguments\n");
      return 0;
      
    }
	
    imageW=atoi(argv[1]);
    // Ta imageW, imageH ta dinei o xrhsths kai thewroume oti einai isa,
    // dhladh imageW = imageH = N, opou to N to dinei o xrhsths.
    // Gia aplothta thewroume tetragwnikes eikones.  

//    printf("Enter image size. Should be a power of two and greater than %d : ", FILTER_LENGTH);
  //  scanf("%d", &imageW);
    imageH = imageW;

    printf("Image Width x Height = %i x %i\n\n", imageW, imageH);
    printf("Allocating and initializing host arrays...\n");
    // Tha htan kalh idea na elegxete kai to apotelesma twn malloc...
    h_Filter    = (numid *)malloc(FILTER_LENGTH * sizeof(numid));
   
    
    h_Input     = (numid *)malloc(imageW * imageH * sizeof(numid)); 
    h_PadInput  = (numid *)malloc((imageW+radius*2 )*(2*radius+ imageH) * sizeof(numid))  ;
    h_Buffer    = (numid *)malloc(imageW * imageH * sizeof(numid));  
    h_OutputCPU = (numid *)malloc(imageW * imageH * sizeof(numid));   
    result	= (numid *)malloc((imageW+2*radius) * (imageH+2*radius) * sizeof(numid));

    
    
    cudaMalloc(&d_Input,(imageW+2*radius)*(imageH+2*radius)*sizeof(numid));
    cudaMalloc(&d_Buffer,(imageW+2*radius)*(imageH+2*radius)*sizeof(numid));
    cudaMemset(d_Buffer,0,(imageW+2*radius)*(imageH+2*radius)*sizeof(numid));
    cudaMalloc(&d_OutputGPU,(imageW+2*radius)*(imageH+2*radius)*sizeof(numid));
    
    if(d_Filter==NULL || d_Input==NULL || d_Buffer==NULL || d_OutputGPU==NULL){
      
      printf("Cuda Malloc Failed\n");
      return 0;
    }
    
    
    cudaMemset(d_OutputGPU,0,(imageW+2*radius)*(imageH+2*radius)*sizeof(numid));

    // to 'h_Filter' apotelei to filtro me to opoio ginetai to convolution kai
    // arxikopoieitai tuxaia. To 'h_Input' einai h eikona panw sthn opoia ginetai
    // to convolution kai arxikopoieitai kai auth tuxaia.

    srand(200);

    for (i = 0; i < FILTER_LENGTH; i++) {
        h_Filter[i] = (numid)(rand() % 16);
    }

    for (i = 0; i < imageW * imageH; i++) {
        h_Input[i] = (numid)rand() / ((numid)RAND_MAX / 255) + (numid)rand() / (numid)RAND_MAX;
    }
   
    // To parakatw einai to kommati pou ekteleitai sthn CPU kai me vash auto prepei na ginei h sugrish me thn GPU.
    printf("CPU computation...\n");
    clock_gettime(CLOCK_MONOTONIC_RAW, &tv1);
    convolutionRowCPU(h_Buffer, h_Input, h_Filter, imageW, imageH, radius); // convolution kata grammes
    convolutionColumnCPU(h_OutputCPU, h_Buffer, h_Filter, imageW, imageH, radius); // convolution kata sthles
    clock_gettime(CLOCK_MONOTONIC_RAW, &tv2);
    printf ("CPU time = %10g seconds\n",
			(double) (tv2.tv_nsec - tv1.tv_nsec) / 1000000000.0 +
			(double) (tv2.tv_sec - tv1.tv_sec));
  
    dim3 dimGridR(imageW/tileRW,imageH/tileRH);
    dim3 dimBlockR(tileRW,tileRH);
    dim3 dimGridC(imageW/tileCW,imageH/tileCH);
    dim3 dimBlockC(tileCW,tileCH);
	
    for(i=0;i<(imageW+2*radius)*(imageW+2*radius);i++){
      h_PadInput[i]=0;
    }
    for(i=0;i<imageW;i++){
      for(j=0;j<imageW;j++){
	h_PadInput[(i+radius)*(2*radius+imageW)+j+radius]=h_Input[i*imageW+j];
      }
    }
    

    printf("GPU computation... \n");
    cudaMemcpyToSymbol(d_Filter, h_Filter,FILTER_LENGTH*sizeof(numid));
    cudaMemcpy(d_Input,h_PadInput,(imageH+2*radius)*(imageW+2*radius)*sizeof(numid),cudaMemcpyHostToDevice);
	cudaEventRecord(start,0);
	tiledConvRowGPU <<< dimGridR, dimBlockR >>>(d_Buffer, d_Input, imageW, imageH);
    cudaThreadSynchronize();
    cudaError_t error=cudaGetLastError();
    if(error!=cudaSuccess){
      printf("Cuda Error:%s\n",cudaGetErrorString(error));
      cudaDeviceReset();
      return 0;
      
	}
	
	tiledConvColGPU <<< dimGridC, dimBlockC >>>(d_OutputGPU, d_Buffer , imageW, imageH);
    cudaThreadSynchronize();
    error=cudaGetLastError();
    if(error!=cudaSuccess){
      printf("Cuda Error:%s\n",cudaGetErrorString(error));
      cudaDeviceReset();
      return 0;
      
    }
	cudaEventRecord(stop,0);
    cudaMemcpy(result,d_OutputGPU,(imageH+2*radius)*(imageW+2*radius)*sizeof(numid),cudaMemcpyDeviceToHost);
    
   
    float elapsed;
    cudaEventSynchronize(stop);
    cudaEventElapsedTime(&elapsed,start,stop);
	
    printf("GPU time :%f ms.\n",elapsed);
    // Kanete h sugrish anamesa se GPU kai CPU kai an estw kai kapoio apotelesma xeperna thn akriveia
    // pou exoume orisei, tote exoume sfalma kai mporoume endexomenws na termatisoume to programma mas  
   
    
   for(i=0;i<imageW;i++){
     for(j=0;j<imageH;j++){
      numid diff= h_OutputCPU[i*imageW+j]-result[(i+radius)*(imageW+2*radius)+j+radius];
	if(ABS(diff)>accuracy){
	    printf("sfalma akriveias %f",ABS(diff));
	}
    }
           
  }
  
  
 // free all the allocated memory
    free(h_OutputCPU);
    free(h_Buffer);
    free(h_Input);
    free(h_Filter);
    cudaFree(d_OutputGPU);
    cudaFree(d_Buffer);
    cudaFree(d_Input);
    cudaFree(d_Filter);


     cudaDeviceReset();


    return 0;
}

	.file	"tmpxft_002e5b5b_00000000-6_quest32.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z17convolutionRowCPUPfS_S_iii
	.type	_Z17convolutionRowCPUPfS_S_iii, @function
_Z17convolutionRowCPUPfS_S_iii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r11
	movl	%ecx, %eax
	xorl	%r10d, %r10d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rsi, %rbx
	xorl	%esi, %esi
.L3:
	cmpl	%r8d, %r10d
	jge	.L15
	xorl	%edx, %edx
.L8:
	cmpl	%eax, %edx
	jge	.L16
	leal	(%rdx,%rsi), %ecx
	movl	%r9d, %edi
	xorps	%xmm0, %xmm0
	movslq	%ecx, %rcx
	negl	%edi
	leaq	(%r11,%rcx,4), %r13
	movl	%edx, %ecx
	subl	%r9d, %ecx
.L4:
	cmpl	%r9d, %edi
	jg	.L17
	testl	%ecx, %ecx
	js	.L5
	cmpl	%ecx, %eax
	jle	.L5
	movl	%r9d, %r12d
	leal	(%rcx,%rsi), %r14d
	subl	%edi, %r12d
	movslq	%r14d, %r14
	movslq	%r12d, %r12
	movss	(%rbx,%r14,4), %xmm1
	mulss	0(%rbp,%r12,4), %xmm1
	addss	%xmm1, %xmm0
.L5:
	movss	%xmm0, 0(%r13)
	incl	%edi
	incl	%ecx
	jmp	.L4
.L17:
	incl	%edx
	jmp	.L8
.L16:
	incl	%r10d
	addl	%eax, %esi
	jmp	.L3
.L15:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z17convolutionRowCPUPfS_S_iii, .-_Z17convolutionRowCPUPfS_S_iii
	.globl	_Z20convolutionColumnCPUPfS_S_iii
	.type	_Z20convolutionColumnCPUPfS_S_iii, @function
_Z20convolutionColumnCPUPfS_S_iii:
.LFB2028:
	.cfi_startproc
	endbr64
	movl	%r9d, %r10d
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r11
	movl	%ecx, %eax
	negl	%r10d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%edi, %edi
	imull	%ecx, %r10d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	xorl	%esi, %esi
.L19:
	cmpl	%r8d, %esi
	jge	.L18
	leal	(%rdi,%r10), %ecx
	movl	%ecx, -4(%rsp)
	xorl	%ecx, %ecx
.L25:
	cmpl	%eax, %ecx
	jge	.L30
	movl	-4(%rsp), %r14d
	leal	(%rcx,%rdi), %r12d
	movl	%r9d, %edx
	xorps	%xmm0, %xmm0
	movslq	%r12d, %r12
	negl	%edx
	leaq	(%r11,%r12,4), %r15
	leal	(%r14,%rcx), %r12d
.L20:
	cmpl	%r9d, %edx
	jg	.L31
	movl	%esi, %r13d
	addl	%edx, %r13d
	js	.L21
	cmpl	%r13d, %r8d
	jle	.L21
	movl	%r9d, %r14d
	movslq	%r12d, %r13
	subl	%edx, %r14d
	movslq	%r14d, %r14
	movss	0(%rbp,%r14,4), %xmm1
	mulss	(%rbx,%r13,4), %xmm1
	addss	%xmm1, %xmm0
.L21:
	movss	%xmm0, (%r15)
	incl	%edx
	addl	%eax, %r12d
	jmp	.L20
.L31:
	incl	%ecx
	jmp	.L25
.L30:
	incl	%esi
	addl	%eax, %edi
	jmp	.L19
.L18:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z20convolutionColumnCPUPfS_S_iii, .-_Z20convolutionColumnCPUPfS_S_iii
	.globl	_Z39__device_stub__Z15tiledConvRowGPUPfS_iiPfS_ii
	.type	_Z39__device_stub__Z15tiledConvRowGPUPfS_iiPfS_ii, @function
_Z39__device_stub__Z15tiledConvRowGPUPfS_iiPfS_ii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15tiledConvRowGPUPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L32:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z39__device_stub__Z15tiledConvRowGPUPfS_iiPfS_ii, .-_Z39__device_stub__Z15tiledConvRowGPUPfS_iiPfS_ii
	.globl	_Z15tiledConvRowGPUPfS_ii
	.type	_Z15tiledConvRowGPUPfS_ii, @function
_Z15tiledConvRowGPUPfS_ii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z15tiledConvRowGPUPfS_iiPfS_ii
	.cfi_endproc
.LFE2055:
	.size	_Z15tiledConvRowGPUPfS_ii, .-_Z15tiledConvRowGPUPfS_ii
	.globl	_Z39__device_stub__Z15tiledConvColGPUPfS_iiPfS_ii
	.type	_Z39__device_stub__Z15tiledConvColGPUPfS_iiPfS_ii, @function
_Z39__device_stub__Z15tiledConvColGPUPfS_iiPfS_ii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15tiledConvColGPUPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L37:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z39__device_stub__Z15tiledConvColGPUPfS_iiPfS_ii, .-_Z39__device_stub__Z15tiledConvColGPUPfS_iiPfS_ii
	.globl	_Z15tiledConvColGPUPfS_ii
	.type	_Z15tiledConvColGPUPfS_ii, @function
_Z15tiledConvColGPUPfS_ii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z15tiledConvColGPUPfS_iiPfS_ii
	.cfi_endproc
.LFE2057:
	.size	_Z15tiledConvColGPUPfS_ii, .-_Z15tiledConvColGPUPfS_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Please specify the image size as execution arguments\n"
.LC2:
	.string	"Image Width x Height = %i x %i\n\n"
.LC3:
	.string	"Allocating and initializing host arrays...\n"
.LC4:
	.string	"Cuda Malloc Failed\n"
.LC7:
	.string	"CPU computation...\n"
.LC9:
	.string	"CPU time = %10g seconds\n"
.LC10:
	.string	"GPU computation... \n"
.LC11:
	.string	"Cuda Error:%s\n"
.LC12:
	.string	"GPU time :%f ms.\n"
.LC15:
	.string	"sfalma akriveias %f"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	xorl	%edi, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	call	cudaSetDevice@PLT
	leaq	88(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	96(%rsp), %rdi
	call	cudaEventCreate@PLT
	decl	%ebp
	leaq	.LC1(%rip), %rsi
	jle	.L73
	movq	8(%rbx), %rdi
	call	atoi@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movl	%eax, %ebx
	movl	%eax, %ecx
	movl	%eax, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %r15d
	movl	$2, %edi
	xorl	%eax, %eax
	imull	%ebx, %r15d
	leaq	.LC3(%rip), %rsi
	call	__printf_chk@PLT
	movl	$132, %edi
	leal	32(%rbx), %r12d
	call	malloc@PLT
	movslq	%r15d, %r13
	movq	%rax, 8(%rsp)
	salq	$2, %r13
	movq	%r13, %rdi
	call	malloc@PLT
	movq	%rax, %rbp
	movl	%r12d, %eax
	imull	%r12d, %eax
	movl	%eax, 40(%rsp)
	cltq
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rsi
	leaq	64(%rsp), %rdi
	movq	%rax, 32(%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdx
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	cmpq	$0, 64(%rsp)
	je	.L45
	cmpq	$0, 72(%rsp)
	je	.L45
	movq	80(%rsp), %rdi
	testq	%rdi, %rdi
	jne	.L46
.L45:
	leaq	.LC4(%rip), %rsi
.L73:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L44
.L46:
	movq	(%rsp), %rdx
	xorl	%esi, %esi
	xorl	%r13d, %r13d
	call	cudaMemset@PLT
	movl	$200, %edi
	call	srand@PLT
.L47:
	call	rand@PLT
	movl	$16, %ecx
	cltd
	idivl	%ecx
	movq	8(%rsp), %rax
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rax,%r13,4)
	incq	%r13
	cmpq	$33, %r13
	jne	.L47
	xorl	%r13d, %r13d
.L48:
	cmpl	%r15d, %r13d
	jnb	.L76
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	divss	.LC5(%rip), %xmm0
	movss	%xmm0, 44(%rsp)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC6(%rip), %xmm0
	addss	44(%rsp), %xmm0
	movss	%xmm0, 0(%rbp,%r13,4)
	incq	%r13
	jmp	.L48
.L76:
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	152(%rsp), %rsi
	movl	$4, %edi
	call	clock_gettime@PLT
	movq	8(%rsp), %rdx
	movl	%ebx, %r8d
	movl	%ebx, %ecx
	movq	16(%rsp), %rdi
	movl	$16, %r9d
	movq	%rbp, %rsi
	call	_Z17convolutionRowCPUPfS_S_iii
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	%ebx, %ecx
	movq	24(%rsp), %rdi
	call	_Z20convolutionColumnCPUPfS_S_iii
	leaq	168(%rsp), %rsi
	movl	$4, %edi
	call	clock_gettime@PLT
	movq	176(%rsp), %rax
	movl	$2, %edi
	subq	160(%rsp), %rax
	cvtsi2sdq	%rax, %xmm0
	movq	168(%rsp), %rax
	subq	152(%rsp), %rax
	divsd	.LC8(%rip), %xmm0
	cvtsi2sdq	%rax, %xmm1
	leaq	.LC9(%rip), %rsi
	movb	$1, %al
	addsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movl	%ebx, %eax
	movl	$512, %ecx
	movl	%ebx, 108(%rsp)
	cltd
	movl	$1, 112(%rsp)
	idivl	%ecx
	movl	$1, 124(%rsp)
	movl	$1, 136(%rsp)
	movl	$1, 148(%rsp)
	movl	$16, %ecx
	movl	%eax, 104(%rsp)
	movl	$8388609, %eax
	salq	$9, %rax
	movq	%rax, 116(%rsp)
	movl	%ebx, %eax
	cltd
	idivl	%ecx
	movl	%eax, 128(%rsp)
	movl	%eax, 132(%rsp)
	movabsq	$68719476752, %rax
	movq	%rax, 140(%rsp)
	xorl	%eax, %eax
.L50:
	movl	40(%rsp), %ecx
	cmpl	%ecx, %eax
	jnb	.L77
	movl	$0x00000000, (%r14,%rax,4)
	incq	%rax
	jmp	.L50
.L77:
	movl	%r12d, %r13d
	xorl	%esi, %esi
	xorl	%edx, %edx
	sall	$4, %r13d
	movl	%r13d, %ecx
.L52:
	cmpl	%edx, %ebx
	je	.L78
	xorl	%eax, %eax
	leal	16(%rcx), %r9d
.L53:
	leal	(%rsi,%rax), %r8d
	leal	(%r9,%rax), %edi
	incl	%eax
	movss	0(%rbp,%r8,4), %xmm0
	movss	%xmm0, (%r14,%rdi,4)
	cmpl	%eax, %ebx
	jne	.L53
	incl	%edx
	addl	%ebx, %esi
	addl	%r12d, %ecx
	jmp	.L52
.L78:
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rsi
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movl	$132, %edx
	leaq	_ZL8d_Filter(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	movq	(%rsp), %rdx
	movq	64(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	124(%rsp), %ecx
	movl	112(%rsp), %esi
	xorl	%r9d, %r9d
	movq	116(%rsp), %rdx
	movq	104(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	movq	64(%rsp), %rsi
	movq	72(%rsp), %rdi
	movl	%ebx, %ecx
	movl	%ebx, %edx
	call	_Z39__device_stub__Z15tiledConvRowGPUPfS_iiPfS_ii
.L54:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	jne	.L75
	movl	148(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	140(%rsp), %rdx
	movq	128(%rsp), %rdi
	movl	136(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	movq	72(%rsp), %rsi
	movq	80(%rsp), %rdi
	movl	%ebx, %ecx
	movl	%ebx, %edx
	call	_Z39__device_stub__Z15tiledConvColGPUPfS_iiPfS_ii
.L56:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %r14d
	testl	%eax, %eax
	je	.L57
	movl	%eax, %edi
.L75:
	call	cudaGetErrorString@PLT
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L74
.L57:
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	addl	$16, %r13d
	call	cudaEventRecord@PLT
	movq	(%rsp), %rdx
	movq	80(%rsp), %rsi
	movl	$2, %ecx
	movq	32(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	96(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rsi
	leaq	60(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	60(%rsp), %xmm0
	call	__printf_chk@PLT
	xorl	%edx, %edx
.L58:
	cmpl	%r14d, %ebx
	je	.L79
	movl	%r13d, %ecx
	movl	%edx, %r15d
.L63:
	movq	24(%rsp), %rdi
	movl	%r15d, %esi
	movl	%ecx, %eax
	xorps	%xmm1, %xmm1
	movss	(%rdi,%rsi,4), %xmm0
	movq	32(%rsp), %rsi
	subss	(%rsi,%rax,4), %xmm0
	comiss	%xmm0, %xmm1
	jbe	.L59
	xorps	.LC13(%rip), %xmm0
.L59:
	comiss	.LC14(%rip), %xmm0
	jbe	.L61
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movl	%ecx, 40(%rsp)
	movl	%edx, (%rsp)
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	40(%rsp), %ecx
	movl	(%rsp), %edx
.L61:
	incl	%r15d
	leal	(%rbx,%rdx), %eax
	incl	%ecx
	cmpl	%r15d, %eax
	jne	.L63
	incl	%r14d
	addl	%r12d, %r13d
	movl	%r15d, %edx
	jmp	.L58
.L79:
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	leaq	_ZL8d_Filter(%rip), %rdi
	call	cudaFree@PLT
.L74:
	call	cudaDeviceReset@PLT
.L44:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L64
	call	__stack_chk_fail@PLT
.L64:
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC16:
	.string	"_Z15tiledConvColGPUPfS_ii"
.LC17:
	.string	"_Z15tiledConvRowGPUPfS_ii"
.LC18:
	.string	"d_Filter"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15tiledConvColGPUPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15tiledConvRowGPUPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	movl	$132, %r9d
	leaq	_ZL8d_Filter(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL8d_Filter
	.comm	_ZL8d_Filter,132,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC5:
	.long	1258324097
	.align 4
.LC6:
	.long	805306368
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC8:
	.long	0
	.long	1104006501
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC13:
	.long	-2147483648
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4
	.align 4
.LC14:
	.long	1086324736
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
* This sample implements a separable convolution 
* of a 2D image with an arbitrary filter.
*/

#include <hip/hip_runtime.h>
#include <time.h>
#include <stdio.h>
#include <stdlib.h>

//unsigned int radius;

#define radius 16
#define FILTER_LENGTH 	(2 * radius + 1)
#define ABS(val)  	((val)<0.0 ? (-(val)) : (val))
#define accuracy  	6

#define tileRH 1
#define tileRW 512

#define tileCH 16
#define tileCW 16


typedef float numid;

__constant__ numid d_Filter[FILTER_LENGTH];

__global__ void tiledConvRowGPU(numid *d_Dst, numid *d_Src, int imageW, int imageH){
	int k;
	numid sum = 0;
	
	int tx=threadIdx.x; 
	int ty=threadIdx.y;
	int bx=blockIdx.x; 
	int by=blockIdx.y;
	  
	
	int row = blockDim.y*by + ty ;
	int col = blockDim.x*bx + tx;
	
	int newImageW = imageW + radius * 2;
	__shared__ numid ShMemory[tileRH] [tileRW + 2 * radius];
	
	if(tx-radius<0){											//Near Left Bounds
		ShMemory[ty][tx] = d_Src[(row+radius) * newImageW + col];
	}
	
	ShMemory[ty][tx+radius] = d_Src[(row+radius) * newImageW + col + radius];				//Center
	
	if(tx >= (tileRW - radius)){							
		ShMemory[ty] [tx + 2 * radius] = d_Src[(row+radius) * newImageW + col + 2 * radius];		//Near Right Bounds
	}
	__syncthreads();
	
	for (k = -radius; k <= radius; k++) {
		
		sum += ShMemory[ty][tx+k+radius] * d_Filter[radius - k];
		
	}
	
	d_Dst[(row+radius) * newImageW + col+radius] = sum;
	
}
__global__ void tiledConvColGPU(numid *d_Dst, numid *d_Src, int imageW, int imageH){
	int k;
	numid sum = 0;
	
	int tx=threadIdx.x; 
	int ty=threadIdx.y;
	int bx=blockIdx.x; 
	int by=blockIdx.y;
	
	
	int row = blockDim.y*by + ty ;
	
	int col = blockDim.x*bx + tx;
	int newImageW = imageW + radius * 2;

	__shared__ numid ShMemory[tileCH + 2 * radius][ tileCW];
	
	if(ty-radius<0){											//Upper Bounds
		ShMemory[ty]  [tx] = d_Src[row * newImageW + col + radius];
	}
	
	ShMemory[ty + radius][ tx ] = d_Src[(row + radius) * newImageW + col + radius ];			//Center
	
	
	ShMemory[ty + 2 * radius ][ tx ] = d_Src[(row + 2* radius) * newImageW + col + radius ];		//Lower Bounds
	
	__syncthreads();
	
	for (k = -radius; k <= radius; k++) {
		
		sum += ShMemory[(ty + k + radius)][tx] * d_Filter[radius - k];
		
	}
	
	d_Dst[ (row + radius) * newImageW + col + radius] = sum;
}


////////////////////////////////////////////////////////////////////////////////
// Reference row convolution filter
////////////////////////////////////////////////////////////////////////////////
void convolutionRowCPU(numid *h_Dst, numid *h_Src, numid *h_Filter, 
                       int imageW, int imageH, int filterR) {

  int x, y, k;
                      
  for (y = 0; y < imageH; y++) {
    for (x = 0; x < imageW; x++) {
      numid sum = 0;

      for (k = -filterR; k <= filterR; k++) {
        int d = x + k;

        if (d >= 0 && d < imageW) {
          sum += h_Src[y * imageW + d] * h_Filter[filterR - k];
        }     

        h_Dst[y * imageW + x] = sum;
      }
    }
  }
   
        
}


////////////////////////////////////////////////////////////////////////////////
// Reference column convolution filter
////////////////////////////////////////////////////////////////////////////////
void convolutionColumnCPU(numid *h_Dst, numid *h_Src, numid *h_Filter,
    			   int imageW, int imageH, int filterR) {

  int x, y, k;
  
  for (y = 0; y < imageH; y++) {
    for (x = 0; x < imageW; x++) {
      numid sum = 0;

      for (k = -filterR; k <= filterR; k++) {
        int d = y + k;

        if (d >= 0 && d < imageH) {
          sum += h_Src[d * imageW + x] * h_Filter[filterR - k];
        }   
 
        h_Dst[y * imageW + x] = sum;
      }
    }
  }
    
}


////////////////////////////////////////////////////////////////////////////////
// Main program
////////////////////////////////////////////////////////////////////////////////
int main(int argc, char **argv) {
    hipSetDevice(0);
    numid
    *h_Filter,
    *h_Input,
    *h_PadInput,
    *h_Buffer,
    *h_OutputCPU,
    
    *d_Input,
    *d_Buffer,
    *d_OutputGPU,
    *result;
    struct timespec  tv1, tv2;
    hipEvent_t start;
    hipEvent_t stop;
    
    hipEventCreate(&start);
    hipEventCreate(&stop);
    int imageW;
    int imageH;
    unsigned int i,j;
    
    if(argc<2){
      printf("Please specify the image size as execution arguments\n");
      return 0;
      
    }
	
    imageW=atoi(argv[1]);
    // Ta imageW, imageH ta dinei o xrhsths kai thewroume oti einai isa,
    // dhladh imageW = imageH = N, opou to N to dinei o xrhsths.
    // Gia aplothta thewroume tetragwnikes eikones.  

//    printf("Enter image size. Should be a power of two and greater than %d : ", FILTER_LENGTH);
  //  scanf("%d", &imageW);
    imageH = imageW;

    printf("Image Width x Height = %i x %i\n\n", imageW, imageH);
    printf("Allocating and initializing host arrays...\n");
    // Tha htan kalh idea na elegxete kai to apotelesma twn malloc...
    h_Filter    = (numid *)malloc(FILTER_LENGTH * sizeof(numid));
   
    
    h_Input     = (numid *)malloc(imageW * imageH * sizeof(numid)); 
    h_PadInput  = (numid *)malloc((imageW+radius*2 )*(2*radius+ imageH) * sizeof(numid))  ;
    h_Buffer    = (numid *)malloc(imageW * imageH * sizeof(numid));  
    h_OutputCPU = (numid *)malloc(imageW * imageH * sizeof(numid));   
    result	= (numid *)malloc((imageW+2*radius) * (imageH+2*radius) * sizeof(numid));

    
    
    hipMalloc(&d_Input,(imageW+2*radius)*(imageH+2*radius)*sizeof(numid));
    hipMalloc(&d_Buffer,(imageW+2*radius)*(imageH+2*radius)*sizeof(numid));
    hipMemset(d_Buffer,0,(imageW+2*radius)*(imageH+2*radius)*sizeof(numid));
    hipMalloc(&d_OutputGPU,(imageW+2*radius)*(imageH+2*radius)*sizeof(numid));
    
    if(d_Filter==NULL || d_Input==NULL || d_Buffer==NULL || d_OutputGPU==NULL){
      
      printf("Cuda Malloc Failed\n");
      return 0;
    }
    
    
    hipMemset(d_OutputGPU,0,(imageW+2*radius)*(imageH+2*radius)*sizeof(numid));

    // to 'h_Filter' apotelei to filtro me to opoio ginetai to convolution kai
    // arxikopoieitai tuxaia. To 'h_Input' einai h eikona panw sthn opoia ginetai
    // to convolution kai arxikopoieitai kai auth tuxaia.

    srand(200);

    for (i = 0; i < FILTER_LENGTH; i++) {
        h_Filter[i] = (numid)(rand() % 16);
    }

    for (i = 0; i < imageW * imageH; i++) {
        h_Input[i] = (numid)rand() / ((numid)RAND_MAX / 255) + (numid)rand() / (numid)RAND_MAX;
    }
   
    // To parakatw einai to kommati pou ekteleitai sthn CPU kai me vash auto prepei na ginei h sugrish me thn GPU.
    printf("CPU computation...\n");
    clock_gettime(CLOCK_MONOTONIC_RAW, &tv1);
    convolutionRowCPU(h_Buffer, h_Input, h_Filter, imageW, imageH, radius); // convolution kata grammes
    convolutionColumnCPU(h_OutputCPU, h_Buffer, h_Filter, imageW, imageH, radius); // convolution kata sthles
    clock_gettime(CLOCK_MONOTONIC_RAW, &tv2);
    printf ("CPU time = %10g seconds\n",
			(double) (tv2.tv_nsec - tv1.tv_nsec) / 1000000000.0 +
			(double) (tv2.tv_sec - tv1.tv_sec));
  
    dim3 dimGridR(imageW/tileRW,imageH/tileRH);
    dim3 dimBlockR(tileRW,tileRH);
    dim3 dimGridC(imageW/tileCW,imageH/tileCH);
    dim3 dimBlockC(tileCW,tileCH);
	
    for(i=0;i<(imageW+2*radius)*(imageW+2*radius);i++){
      h_PadInput[i]=0;
    }
    for(i=0;i<imageW;i++){
      for(j=0;j<imageW;j++){
	h_PadInput[(i+radius)*(2*radius+imageW)+j+radius]=h_Input[i*imageW+j];
      }
    }
    

    printf("GPU computation... \n");
    hipMemcpyToSymbol(HIP_SYMBOL(d_Filter), h_Filter,FILTER_LENGTH*sizeof(numid));
    hipMemcpy(d_Input,h_PadInput,(imageH+2*radius)*(imageW+2*radius)*sizeof(numid),hipMemcpyHostToDevice);
	hipEventRecord(start,0);
	tiledConvRowGPU <<< dimGridR, dimBlockR >>>(d_Buffer, d_Input, imageW, imageH);
    hipDeviceSynchronize();
    hipError_t error=hipGetLastError();
    if(error!=hipSuccess){
      printf("Cuda Error:%s\n",hipGetErrorString(error));
      hipDeviceReset();
      return 0;
      
	}
	
	tiledConvColGPU <<< dimGridC, dimBlockC >>>(d_OutputGPU, d_Buffer , imageW, imageH);
    hipDeviceSynchronize();
    error=hipGetLastError();
    if(error!=hipSuccess){
      printf("Cuda Error:%s\n",hipGetErrorString(error));
      hipDeviceReset();
      return 0;
      
    }
	hipEventRecord(stop,0);
    hipMemcpy(result,d_OutputGPU,(imageH+2*radius)*(imageW+2*radius)*sizeof(numid),hipMemcpyDeviceToHost);
    
   
    float elapsed;
    hipEventSynchronize(stop);
    hipEventElapsedTime(&elapsed,start,stop);
	
    printf("GPU time :%f ms.\n",elapsed);
    // Kanete h sugrish anamesa se GPU kai CPU kai an estw kai kapoio apotelesma xeperna thn akriveia
    // pou exoume orisei, tote exoume sfalma kai mporoume endexomenws na termatisoume to programma mas  
   
    
   for(i=0;i<imageW;i++){
     for(j=0;j<imageH;j++){
      numid diff= h_OutputCPU[i*imageW+j]-result[(i+radius)*(imageW+2*radius)+j+radius];
	if(ABS(diff)>accuracy){
	    printf("sfalma akriveias %f",ABS(diff));
	}
    }
           
  }
  
  
 // free all the allocated memory
    free(h_OutputCPU);
    free(h_Buffer);
    free(h_Input);
    free(h_Filter);
    hipFree(d_OutputGPU);
    hipFree(d_Buffer);
    hipFree(d_Input);
    hipFree(d_Filter);


     hipDeviceReset();


    return 0;
}

	.text
	.file	"quest32.hip"
	.globl	_Z30__device_stub__tiledConvRowGPUPfS_ii # -- Begin function _Z30__device_stub__tiledConvRowGPUPfS_ii
	.type	_Z30__device_stub__tiledConvRowGPUPfS_ii,@function
_Z30__device_stub__tiledConvRowGPUPfS_ii: # @_Z30__device_stub__tiledConvRowGPUPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15tiledConvRowGPUPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__tiledConvRowGPUPfS_ii, .Lfunc_end0-_Z30__device_stub__tiledConvRowGPUPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__tiledConvColGPUPfS_ii # -- Begin function _Z30__device_stub__tiledConvColGPUPfS_ii
	.type	_Z30__device_stub__tiledConvColGPUPfS_ii,@function
_Z30__device_stub__tiledConvColGPUPfS_ii: # @_Z30__device_stub__tiledConvColGPUPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15tiledConvColGPUPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z30__device_stub__tiledConvColGPUPfS_ii, .Lfunc_end1-_Z30__device_stub__tiledConvColGPUPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z17convolutionRowCPUPfS_S_iii  # -- Begin function _Z17convolutionRowCPUPfS_S_iii
	.type	_Z17convolutionRowCPUPfS_S_iii,@function
_Z17convolutionRowCPUPfS_S_iii:         # @_Z17convolutionRowCPUPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, -16(%rsp)                 # 8-byte Spill
	testl	%r8d, %r8d
	jle	.LBB2_11
# %bb.1:                                # %.preheader.lr.ph
	movq	%rdx, %rax
	movl	%r9d, %edx
	negl	%edx
	movq	%rdx, -24(%rsp)                 # 8-byte Spill
	movslq	%edx, %rdx
	movslq	%r9d, %r10
	movslq	%ecx, %r14
	movl	%r8d, %edi
	movq	%rdi, -8(%rsp)                  # 8-byte Spill
	movl	%r14d, %ebx
	leaq	(,%r10,4), %rdi
	leaq	(,%rdx,4), %r11
	subq	%r11, %rdi
	addq	%rdi, %rax
	leaq	(%rsi,%rdx,4), %rsi
	movq	%r14, -32(%rsp)                 # 8-byte Spill
	leaq	(,%r14,4), %r14
	addl	%r10d, %r10d
	orq	$1, %r10
	xorl	%r15d, %r15d
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
                                        #       Child Loop BB2_6 Depth 3
	testl	%ecx, %ecx
	jle	.LBB2_10
# %bb.3:                                # %.lr.ph37
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	%r15, %rdx
	imulq	-32(%rsp), %rdx                 # 8-byte Folded Reload
	movq	-16(%rsp), %rdi                 # 8-byte Reload
	leaq	(%rdi,%rdx,4), %r12
	movq	-24(%rsp), %r13                 # 8-byte Reload
	movq	%rsi, %rbp
	xorl	%r11d, %r11d
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_6 Depth 3
	testl	%r9d, %r9d
	js	.LBB2_9
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB2_4 Depth=2
	xorps	%xmm0, %xmm0
	xorl	%edi, %edi
	movq	%rax, %rdx
.LBB2_6:                                #   Parent Loop BB2_2 Depth=1
                                        #     Parent Loop BB2_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	leal	(%rdi,%r13), %r8d
	cmpl	%ecx, %r8d
	jae	.LBB2_8
# %bb.7:                                #   in Loop: Header=BB2_6 Depth=3
	movss	(%rbp,%rdi,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%rdx), %xmm1
	addss	%xmm1, %xmm0
.LBB2_8:                                #   in Loop: Header=BB2_6 Depth=3
	movss	%xmm0, (%r12,%r11,4)
	addq	$-4, %rdx
	incq	%rdi
	cmpl	%edi, %r10d
	jne	.LBB2_6
.LBB2_9:                                # %._crit_edge
                                        #   in Loop: Header=BB2_4 Depth=2
	incq	%r11
	addq	$4, %rbp
	incq	%r13
	cmpq	%rbx, %r11
	jne	.LBB2_4
.LBB2_10:                               # %._crit_edge38
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r15
	addq	%r14, %rsi
	cmpq	-8(%rsp), %r15                  # 8-byte Folded Reload
	jne	.LBB2_2
.LBB2_11:                               # %._crit_edge40
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z17convolutionRowCPUPfS_S_iii, .Lfunc_end2-_Z17convolutionRowCPUPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z20convolutionColumnCPUPfS_S_iii # -- Begin function _Z20convolutionColumnCPUPfS_S_iii
	.type	_Z20convolutionColumnCPUPfS_S_iii,@function
_Z20convolutionColumnCPUPfS_S_iii:      # @_Z20convolutionColumnCPUPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, -36(%rsp)                 # 4-byte Spill
	movq	%rdi, -16(%rsp)                 # 8-byte Spill
	testl	%r8d, %r8d
	jle	.LBB3_11
# %bb.1:                                # %.preheader.lr.ph
	movq	%rdx, %r11
	movl	%r9d, %ecx
	negl	%ecx
	movslq	%ecx, %rax
	movslq	-36(%rsp), %r14                 # 4-byte Folded Reload
	movslq	%r9d, %rdx
	movl	%r8d, %edi
	movq	%rdi, -8(%rsp)                  # 8-byte Spill
	movl	%r14d, %ebx
	leaq	(,%rdx,4), %rdi
	leaq	(,%rax,4), %r10
	subq	%r10, %rdi
	addq	%rdi, %r11
	imulq	%r14, %rax
	leaq	(%rsi,%rax,4), %rax
	movq	%rax, -32(%rsp)                 # 8-byte Spill
	movq	%r14, -24(%rsp)                 # 8-byte Spill
	leaq	(,%r14,4), %r14
	leal	1(,%rdx,2), %edi
	xorl	%r15d, %r15d
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
                                        #       Child Loop BB3_6 Depth 3
	cmpl	$0, -36(%rsp)                   # 4-byte Folded Reload
	jle	.LBB3_10
# %bb.3:                                # %.lr.ph38
                                        #   in Loop: Header=BB3_2 Depth=1
	movq	%r15, %rax
	imulq	-24(%rsp), %rax                 # 8-byte Folded Reload
	movq	-16(%rsp), %rdx                 # 8-byte Reload
	leaq	(%rdx,%rax,4), %r12
	movq	-32(%rsp), %rsi                 # 8-byte Reload
	xorl	%r10d, %r10d
.LBB3_4:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_6 Depth 3
	testl	%r9d, %r9d
	js	.LBB3_9
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB3_4 Depth=2
	xorps	%xmm0, %xmm0
	movl	%edi, %ebp
	movq	%rsi, %r13
	movl	%ecx, %eax
	movq	%r11, %rdx
.LBB3_6:                                #   Parent Loop BB3_2 Depth=1
                                        #     Parent Loop BB3_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	cmpl	%r8d, %eax
	jae	.LBB3_8
# %bb.7:                                #   in Loop: Header=BB3_6 Depth=3
	movss	(%r13), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	mulss	(%rdx), %xmm1
	addss	%xmm1, %xmm0
.LBB3_8:                                #   in Loop: Header=BB3_6 Depth=3
	movss	%xmm0, (%r12,%r10,4)
	addq	$-4, %rdx
	incl	%eax
	addq	%r14, %r13
	decl	%ebp
	jne	.LBB3_6
.LBB3_9:                                # %._crit_edge
                                        #   in Loop: Header=BB3_4 Depth=2
	incq	%r10
	addq	$4, %rsi
	cmpq	%rbx, %r10
	jne	.LBB3_4
.LBB3_10:                               # %._crit_edge39
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%r15
	incl	%ecx
	addq	%r14, -32(%rsp)                 # 8-byte Folded Spill
	cmpq	-8(%rsp), %r15                  # 8-byte Folded Reload
	jne	.LBB3_2
.LBB3_11:                               # %._crit_edge41
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z20convolutionColumnCPUPfS_S_iii, .Lfunc_end3-_Z20convolutionColumnCPUPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI4_0:
	.long	0x4b008081                      # float 8421505
.LCPI4_1:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI4_4:
	.long	0x40c00000                      # float 6
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI4_2:
	.quad	0x41cdcd6500000000              # double 1.0E+9
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI4_3:
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	88(%rsp), %rdi
	callq	hipEventCreate
	leaq	64(%rsp), %rdi
	callq	hipEventCreate
	cmpl	$1, %ebp
	jg	.LBB4_2
# %bb.1:
	movl	$.Lstr.4, %edi
	jmp	.LBB4_25
.LBB4_2:
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	%eax, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$132, %edi
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	%ebx, %eax
	imull	%eax, %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	leaq	(,%rax,4), %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%rbx, 104(%rsp)                 # 8-byte Spill
	leal	32(%rbx), %eax
	movl	%eax, 20(%rsp)                  # 4-byte Spill
                                        # kill: def $eax killed $eax def $rax
	imull	%eax, %eax
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	leaq	(,%rax,4), %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r13
	leaq	72(%rsp), %r12
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	hipMemset
	leaq	40(%rsp), %rdi
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
	movq	%rbx, %rsi
	callq	hipMalloc
	cmpq	$0, (%r12)
	je	.LBB4_24
# %bb.3:
	cmpq	$0, 48(%rsp)
	je	.LBB4_24
# %bb.4:
	movq	40(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB4_24
# %bb.5:
	movl	104(%rsp), %ebp                 # 4-byte Reload
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	callq	hipMemset
	movl	$200, %edi
	callq	srand
	movq	32(%rsp), %rbx                  # 8-byte Reload
.LBB4_6:                                # =>This Inner Loop Header: Depth=1
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	15(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-16, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%r12,4)
	incq	%r12
	cmpq	$33, %r12
	jne	.LBB4_6
# %bb.7:                                # %.preheader149
	testq	%rbp, %rbp
	movq	8(%rsp), %rbx                   # 8-byte Reload
	je	.LBB4_10
# %bb.8:                                # %.lr.ph.preheader
	cmpl	$1, %ebx
	adcl	$0, %ebx
	xorl	%r12d, %r12d
.LBB4_9:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	.LCPI4_0(%rip), %xmm0
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI4_1(%rip), %xmm0
	addss	8(%rsp), %xmm0                  # 4-byte Folded Reload
	movss	%xmm0, (%r14,%r12,4)
	incq	%r12
	cmpq	%r12, %rbx
	jne	.LBB4_9
.LBB4_10:                               # %._crit_edge
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	leaq	120(%rsp), %rsi
	movl	$4, %edi
	callq	clock_gettime
	movq	80(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	32(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdx
	movl	%ebp, %ecx
	movl	%ebp, %r8d
	movl	$16, %r9d
	callq	_Z17convolutionRowCPUPfS_S_iii
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	%ebp, %ecx
	movl	%ebp, %r8d
	movl	$16, %r9d
	callq	_Z20convolutionColumnCPUPfS_S_iii
	leaq	136(%rsp), %rbx
	movl	$4, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	movq	(%rbx), %rax
	movq	8(%rbx), %rcx
	leaq	120(%rsp), %rdx
	subq	8(%rdx), %rcx
	cvtsi2sd	%rcx, %xmm1
	divsd	.LCPI4_2(%rip), %xmm1
	subq	(%rdx), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	addsd	%xmm1, %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	leal	511(%rbp), %eax
	testl	%ebp, %ebp
	cmovnsl	%ebp, %eax
	sarl	$9, %eax
	movq	%rbp, %rcx
	shlq	$32, %rcx
	orq	%rax, %rcx
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	leal	15(%rbp), %ebx
	testl	%ebp, %ebp
	cmovnsl	%ebp, %ebx
	cmpl	$0, 20(%rsp)                    # 4-byte Folded Reload
	je	.LBB4_12
# %bb.11:                               # %.preheader148
	movq	96(%rsp), %rdx                  # 8-byte Reload
	cmpq	$1, %rdx
	adcq	$0, %rdx
	shlq	$2, %rdx
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	testq	%rbp, %rbp
	je	.LBB4_16
.LBB4_12:                               # %.lr.ph156.preheader
	movl	%ebp, %eax
	shll	$4, %eax
	addl	$528, %eax                      # imm = 0x210
	movl	20(%rsp), %ecx                  # 4-byte Reload
	xorl	%edx, %edx
	xorl	%esi, %esi
.LBB4_13:                               # %.lr.ph156
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_14 Depth 2
	xorl	%edi, %edi
.LBB4_14:                               #   Parent Loop BB4_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rdx,%rdi), %r8d
	movss	(%r14,%r8,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	leal	(%rax,%rdi), %r8d
	movss	%xmm0, (%r15,%r8,4)
	incq	%rdi
	cmpq	%rdi, %rbp
	jne	.LBB4_14
# %bb.15:                               # %._crit_edge157
                                        #   in Loop: Header=BB4_13 Depth=1
	incl	%esi
	addq	%rcx, %rax
	addq	%rbp, %rdx
	cmpl	%ebp, %esi
	jne	.LBB4_13
.LBB4_16:                               # %._crit_edge159
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$d_Filter, %edi
	movl	$132, %edx
	movq	32(%rsp), %rsi                  # 8-byte Reload
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movq	72(%rsp), %rdi
	movq	%r15, %rsi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	addq	$511, %rdx                      # imm = 0x1FF
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_18
# %bb.17:
	movq	48(%rsp), %rdi
	movq	72(%rsp), %rsi
	movl	%ebp, %edx
	movl	%ebp, %ecx
	callq	_Z30__device_stub__tiledConvRowGPUPfS_ii
.LBB4_18:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_22
# %bb.19:
	sarl	$4, %ebx
	movq	%rbx, %rdi
	shlq	$32, %rdi
	orq	%rbx, %rdi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_21
# %bb.20:
	movq	40(%rsp), %rdi
	movq	48(%rsp), %rsi
	movl	%ebp, %edx
	movl	%ebp, %ecx
	callq	_Z30__device_stub__tiledConvColGPUPfS_ii
.LBB4_21:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB4_27
.LBB4_22:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB4_23:
	callq	hipDeviceReset
	jmp	.LBB4_26
.LBB4_24:
	movl	$.Lstr.3, %edi
.LBB4_25:
	callq	puts@PLT
.LBB4_26:
	xorl	%eax, %eax
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_27:
	.cfi_def_cfa_offset 208
	movq	64(%rsp), %rdi
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	40(%rsp), %rsi
	movq	%r13, %rdi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rdi
	callq	hipEventSynchronize
	movq	88(%rsp), %rsi
	movq	64(%rsp), %rdx
	leaq	116(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	testq	%rbp, %rbp
	je	.LBB4_34
# %bb.28:                               # %.preheader.preheader
	movl	%ebp, %ebx
	shll	$4, %ebx
	addl	$528, %ebx                      # imm = 0x210
	movl	20(%rsp), %eax                  # 4-byte Reload
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movaps	.LCPI4_3(%rip), %xmm2           # xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	movss	.LCPI4_4(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	xorl	%r15d, %r15d
.LBB4_29:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_30 Depth 2
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	xorl	%r12d, %r12d
.LBB4_30:                               #   Parent Loop BB4_29 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%r15,%r12), %eax
	movq	56(%rsp), %rcx                  # 8-byte Reload
	movss	(%rcx,%rax,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	leal	(%rbx,%r12), %eax
	subss	(%r13,%rax,4), %xmm1
	movaps	%xmm1, %xmm0
	xorps	%xmm2, %xmm0
	maxss	%xmm1, %xmm0
	ucomiss	%xmm3, %xmm0
	jbe	.LBB4_32
# %bb.31:                               #   in Loop: Header=BB4_30 Depth=2
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	movss	.LCPI4_4(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	movaps	.LCPI4_3(%rip), %xmm2           # xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
.LBB4_32:                               #   in Loop: Header=BB4_30 Depth=2
	incq	%r12
	cmpq	%r12, %rbp
	jne	.LBB4_30
# %bb.33:                               #   in Loop: Header=BB4_29 Depth=1
	movq	8(%rsp), %r12                   # 8-byte Reload
	incl	%r12d
	addq	24(%rsp), %rbx                  # 8-byte Folded Reload
	addq	%rbp, %r15
	cmpl	%ebp, %r12d
	jne	.LBB4_29
.LBB4_34:                               # %._crit_edge162
	movq	56(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	80(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	movl	$d_Filter, %edi
	callq	hipFree
	jmp	.LBB4_23
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15tiledConvRowGPUPfS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15tiledConvColGPUPfS_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$d_Filter, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$132, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	d_Filter,@object                # @d_Filter
	.local	d_Filter
	.comm	d_Filter,132,16
	.type	_Z15tiledConvRowGPUPfS_ii,@object # @_Z15tiledConvRowGPUPfS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z15tiledConvRowGPUPfS_ii
	.p2align	3, 0x0
_Z15tiledConvRowGPUPfS_ii:
	.quad	_Z30__device_stub__tiledConvRowGPUPfS_ii
	.size	_Z15tiledConvRowGPUPfS_ii, 8

	.type	_Z15tiledConvColGPUPfS_ii,@object # @_Z15tiledConvColGPUPfS_ii
	.globl	_Z15tiledConvColGPUPfS_ii
	.p2align	3, 0x0
_Z15tiledConvColGPUPfS_ii:
	.quad	_Z30__device_stub__tiledConvColGPUPfS_ii
	.size	_Z15tiledConvColGPUPfS_ii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Image Width x Height = %i x %i\n\n"
	.size	.L.str.1, 33

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"CPU time = %10g seconds\n"
	.size	.L.str.5, 25

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Cuda Error:%s\n"
	.size	.L.str.7, 15

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"GPU time :%f ms.\n"
	.size	.L.str.8, 18

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"sfalma akriveias %f"
	.size	.L.str.9, 20

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15tiledConvRowGPUPfS_ii"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15tiledConvColGPUPfS_ii"
	.size	.L__unnamed_2, 26

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"d_Filter"
	.size	.L__unnamed_3, 9

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Allocating and initializing host arrays..."
	.size	.Lstr, 43

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"CPU computation..."
	.size	.Lstr.1, 19

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"GPU computation... "
	.size	.Lstr.2, 20

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Cuda Malloc Failed"
	.size	.Lstr.3, 19

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Please specify the image size as execution arguments"
	.size	.Lstr.4, 53

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__tiledConvRowGPUPfS_ii
	.addrsig_sym _Z30__device_stub__tiledConvColGPUPfS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym d_Filter
	.addrsig_sym _Z15tiledConvRowGPUPfS_ii
	.addrsig_sym _Z15tiledConvColGPUPfS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15tiledConvRowGPUPfS_ii ; -- Begin function _Z15tiledConvRowGPUPfS_ii
	.globl	_Z15tiledConvRowGPUPfS_ii
	.p2align	8
	.type	_Z15tiledConvRowGPUPfS_ii,@function
_Z15tiledConvRowGPUPfS_ii:              ; @_Z15tiledConvRowGPUPfS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b32 s2, s[0:1], 0x10
	v_bfe_u32 v4, v0, 10, 10
	v_and_b32_e32 v5, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v6, 2, v5
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s4, 16
	s_add_i32 s5, s2, 32
	s_mul_i32 s15, s15, s3
	s_load_b128 s[0:3], s[0:1], 0x0
	v_add3_u32 v1, s15, v4, 16
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_mul_i32 s14, s14, s4
	s_mov_b32 s4, exec_lo
	v_mul_lo_u32 v1, v1, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v0, s14, v5, v1
	v_ashrrev_i32_e32 v1, 31, v0
	v_cmpx_gt_u32_e32 16, v5
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	v_mad_u32_u24 v3, 0x880, v4, v6
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v2
.LBB0_2:                                ; %._crit_edge
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_mad_u32_u24 v4, 0x880, v4, v6
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	s_mov_b32 s2, exec_lo
	global_load_b32 v7, v[2:3], off offset:64
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v7 offset:64
	v_cmpx_lt_u32_e32 0x1ef, v5
	s_cbranch_execz .LBB0_4
; %bb.3:
	global_load_b32 v2, v[2:3], off offset:128
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v2 offset:128
.LBB0_4:
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v2, 0
	s_movk_i32 s4, 0xff7c
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_Filter@rel32@lo+132
	s_addc_u32 s3, s3, d_Filter@rel32@hi+140
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_5:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v3, s4, v4
	s_load_b32 s5, s[2:3], 0x0
	s_add_i32 s4, s4, 4
	s_add_u32 s2, s2, -4
	s_addc_u32 s3, s3, -1
	ds_load_b32 v3, v3 offset:132
	s_cmp_lg_u32 s4, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v2, s5, v3
	s_cbranch_scc1 .LBB0_5
; %bb.6:
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off offset:64
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15tiledConvRowGPUPfS_ii
		.amdhsa_group_segment_fixed_size 2176
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15tiledConvRowGPUPfS_ii, .Lfunc_end0-_Z15tiledConvRowGPUPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 424
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2176 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z15tiledConvColGPUPfS_ii ; -- Begin function _Z15tiledConvColGPUPfS_ii
	.globl	_Z15tiledConvColGPUPfS_ii
	.p2align	8
	.type	_Z15tiledConvColGPUPfS_ii,@function
_Z15tiledConvColGPUPfS_ii:              ; @_Z15tiledConvColGPUPfS_ii
; %bb.0:
	s_clause 0x2
	s_load_b32 s4, s[0:1], 0x24
	s_load_b32 s5, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s6, s4, 16
	s_and_b32 s4, s4, 0xffff
	v_mad_u64_u32 v[4:5], null, s15, s6, v[1:2]
	v_mad_u64_u32 v[2:3], null, s14, s4, v[0:1]
	v_lshlrev_b32_e32 v0, 2, v0
	s_add_i32 s4, s5, 32
	s_mov_b32 s5, exec_lo
	v_cmpx_gt_u32_e32 16, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v4, s4, v[2:3]
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v5, vcc_lo, s2, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	global_load_b32 v3, v[5:6], off offset:64
	v_lshl_add_u32 v5, v1, 6, v0
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v3
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v3, 16, v4
	v_lshl_add_u32 v0, v1, 6, v0
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v3, s4
	s_lshl_b32 s4, s4, 4
	v_add3_u32 v3, v2, v4, 16
	v_add3_u32 v5, v4, s4, v2
	s_movk_i32 s4, 0xf7c0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	v_lshlrev_b64 v[4:5], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_Filter@rel32@lo+132
	s_addc_u32 s3, s3, d_Filter@rel32@hi+140
	s_clause 0x1
	global_load_b32 v6, v[6:7], off
	global_load_b32 v4, v[4:5], off offset:64
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v0, v6, v4 offset0:4 offset1:8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v4, s4, v0
	s_load_b32 s5, s[2:3], 0x0
	s_add_i32 s4, s4, 64
	s_add_u32 s2, s2, -4
	s_addc_u32 s3, s3, -1
	ds_load_b32 v4, v4 offset:2112
	s_cmp_lg_u32 s4, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v1, s5, v4
	s_cbranch_scc1 .LBB1_3
; %bb.4:
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_store_b32 v[2:3], v1, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15tiledConvColGPUPfS_ii
		.amdhsa_group_segment_fixed_size 3072
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15tiledConvColGPUPfS_ii, .Lfunc_end1-_Z15tiledConvColGPUPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 436
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 3072 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	d_Filter                ; @d_Filter
	.type	d_Filter,@object
	.section	.bss,"aw",@nobits
	.globl	d_Filter
	.p2align	4, 0x0
d_Filter:
	.zero	132
	.size	d_Filter, 132

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym d_Filter
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2176
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15tiledConvRowGPUPfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15tiledConvRowGPUPfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 3072
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15tiledConvColGPUPfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15tiledConvColGPUPfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
