// Matrix multiplication between square matrices using rows of A shared among threads of the same block. 
// The grid of blocks is made by unidimensional blocks of legth MATRIXSIZE.
// Each block contains NUM_THREADS cells of size CELL_SIZE.
// CUDA kernels are asynchronous, so in order to perform time measurements it is necessary to call 
// cudaDeviceSynchronize() after each kernel launch. 

#include <stdio.h>
#include <stdlib.h>

#include <time.h>
#include <ctype.h>
#include <sys/types.h>
#include <sys/time.h>

#define MATRIXSIZE 8 //2048
#define NUM_THREADS 4 //31 // number of threads per block
#define CELL_SIZE MATRIXSIZE / NUM_THREADS // number of blocks per row

double cclock()
  /* Returns elepsed seconds past from the last call to timer rest */
{
  struct timeval tmp;
  double sec;
  gettimeofday( &tmp, (struct timezone *)0 );
  sec = tmp.tv_sec + ((double)tmp.tv_usec)/1000000.0;
  return sec;
}

// print the matrix M

void print_matrix(int rows, int cols, double *M) {
  int i, j;
  for (i = 0; i < rows; i++) {
    for (j = 0; j < cols; j++) {
      printf("%d    ", (int)M[i * cols + j]);
    }
    printf("\n");
  }
  printf("\n");
}

// ===============================================================================

// KERNEL FUNCTIONS

// initialization

__global__ void matrix_init(double * M){
  int idx = ( blockIdx.x * blockDim.x ) + threadIdx.x;

  if( idx < MATRIXSIZE*MATRIXSIZE) {
    M[idx] = 1;
  }
}

// matrix x matrix multiplication

__global__ void matrix_mult(double * A, double * B, double * C){
  __shared__ double s_A[MATRIXSIZE];

  for (int i = 0; i < CELL_SIZE; ++i)
  {
    s_A[ threadIdx.x * CELL_SIZE + i ] = A[ blockIdx.x * MATRIXSIZE + (threadIdx.x * CELL_SIZE + i) ];
  }

  __syncthreads();

  for (int i = 0; i < CELL_SIZE; ++i)
  {
    double sum = 0.;

    for (int j = 0; j < MATRIXSIZE; ++j)
    {
      sum += s_A[j] * B[j * MATRIXSIZE + (threadIdx.x * CELL_SIZE + i)];
    }

    // each block computes an entire row of C
    C[ blockIdx.x * MATRIXSIZE + (threadIdx.x * CELL_SIZE + i) ] = sum; 
  }

}

// ===============================================================================

int main(int argc, char *argv[]) 
{
  double * h_A, * h_B, *h_C; // host pointers
  // double * h_C;
  double * d_A, * d_B, *d_C; // device pointers

  int size_in_bytes;
  double t_start, t_end;

  // MATRIXSIZE = atoi(argv[1]);
  int NUM_BLOCKS = CELL_SIZE; 
  size_in_bytes =  MATRIXSIZE * MATRIXSIZE * sizeof( double );

  if( MATRIXSIZE < 1 ){
    fprintf( stderr, "Error. Inconsistent parameters.\nProgram exit ...\n");
    exit(1);
  }

  // allocate the pointers

  h_A = ( double * ) malloc( size_in_bytes );
  h_B = ( double * ) malloc( size_in_bytes );
  h_C = ( double * ) malloc( size_in_bytes );

  cudaMalloc( (void**) &d_A, size_in_bytes );
  cudaMalloc( (void**) &d_B, size_in_bytes );
  cudaMalloc( (void**) &d_C, size_in_bytes );

  // initialize the matrices

  // srand(time(NULL));
  for(int i = 0; i < MATRIXSIZE * MATRIXSIZE; i++ ){
    h_A[i] = (double) 1; //(rand() % 1000 + 1);
    h_B[i] = (double) i; //(rand() % 1000 + 1);
    h_C[i] = 0;
  }

  // copy from CPU to GPU

  //cudaMemcpy( dest, source, sizeinbytes, cudaMemcpyHostToDevice | cudaMemcpyDeviceToHost );
  cudaMemcpy( d_A, h_A, size_in_bytes, cudaMemcpyHostToDevice );
  cudaMemcpy( d_B, h_B, size_in_bytes, cudaMemcpyHostToDevice );
  cudaMemcpy( d_C, h_C, size_in_bytes, cudaMemcpyHostToDevice );

  // matrix_init<<< NUM_BLOCKS, NUM_THREADS >>>(d_A);
  // matrix_init<<< NUM_BLOCKS, NUM_THREADS >>>(d_B);

  t_start=cclock();

  matrix_mult<<< NUM_BLOCKS, NUM_THREADS >>>(d_A, d_B, d_C);

  cudaDeviceSynchronize(); // blocks until the device has completed all the preceding requested tasks

  t_end=cclock();  

  // copy from GPU to CPU

  cudaMemcpy( h_A, d_A, size_in_bytes, cudaMemcpyDeviceToHost );
  cudaMemcpy( h_B, d_B, size_in_bytes, cudaMemcpyDeviceToHost );
  cudaMemcpy( h_C, d_C, size_in_bytes, cudaMemcpyDeviceToHost );

  print_matrix(MATRIXSIZE, MATRIXSIZE, h_A);
  print_matrix(MATRIXSIZE, MATRIXSIZE, h_B);
  print_matrix(MATRIXSIZE, MATRIXSIZE, h_C);

  fprintf( stdout, "multiplication executed. Time Elapsed %9.4f secs\n", t_end-t_start );

  // free the memory

  free( h_A );
  free( h_B );
  free( h_C );

  cudaFree( d_A );
  cudaFree( d_B );
  cudaFree( d_C );

  return 0;
}

	.file	"tmpxft_002c5ce4_00000000-6_shared_matmul.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z6cclockv
	.type	_Z6cclockv, @function
_Z6cclockv:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	8(%rsp), %xmm1
	cvtsi2sdq	16(%rsp), %xmm0
	divsd	.LC0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z6cclockv, .-_Z6cclockv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"%d    "
.LC2:
	.string	"\n"
	.text
	.globl	_Z12print_matrixiiPd
	.type	_Z12print_matrixiiPd, @function
_Z12print_matrixiiPd:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L7:
	cmpl	%r14d, %r13d
	jge	.L9
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,8), %r8
.L10:
	cmpl	%r15d, %ebx
	jle	.L12
	cvttsd2sil	(%r8,%r15,8), %edx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%r8, 8(%rsp)
	incq	%r15
	call	__printf_chk@PLT
	movq	8(%rsp), %r8
	jmp	.L10
.L12:
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	incl	%r13d
	addl	%ebx, %r12d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L7
.L9:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z12print_matrixiiPd, .-_Z12print_matrixiiPd
	.globl	_Z31__device_stub__Z11matrix_initPdPd
	.type	_Z31__device_stub__Z11matrix_initPdPd, @function
_Z31__device_stub__Z11matrix_initPdPd:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z11matrix_initPd(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L13:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z31__device_stub__Z11matrix_initPdPd, .-_Z31__device_stub__Z11matrix_initPdPd
	.globl	_Z11matrix_initPd
	.type	_Z11matrix_initPd, @function
_Z11matrix_initPd:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z11matrix_initPdPd
	.cfi_endproc
.LFE2055:
	.size	_Z11matrix_initPd, .-_Z11matrix_initPd
	.globl	_Z35__device_stub__Z11matrix_multPdS_S_PdS_S_
	.type	_Z35__device_stub__Z11matrix_multPdS_S_PdS_S_, @function
_Z35__device_stub__Z11matrix_multPdS_S_PdS_S_:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11matrix_multPdS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L18:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z35__device_stub__Z11matrix_multPdS_S_PdS_S_, .-_Z35__device_stub__Z11matrix_multPdS_S_PdS_S_
	.globl	_Z11matrix_multPdS_S_
	.type	_Z11matrix_multPdS_S_, @function
_Z11matrix_multPdS_S_:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z11matrix_multPdS_S_PdS_S_
	.cfi_endproc
.LFE2057:
	.size	_Z11matrix_multPdS_S_, .-_Z11matrix_multPdS_S_
	.section	.rodata.str1.1
.LC4:
	.string	"multiplication executed. Time Elapsed %9.4f secs\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$512, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$512, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$512, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	leaq	24(%rsp), %rdi
	movl	$512, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$512, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$512, %esi
	call	cudaMalloc@PLT
	movsd	.LC3(%rip), %xmm1
	xorl	%eax, %eax
.L24:
	cvtsi2sdl	%eax, %xmm0
	movsd	%xmm1, (%r12,%rax,8)
	movsd	%xmm0, 0(%rbp,%rax,8)
	incq	%rax
	cmpq	$64, %rax
	jne	.L24
	xorl	%eax, %eax
	movl	$128, %ecx
	movq	%rbx, %rdi
	movl	$512, %edx
	rep stosl
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$512, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$512, %edx
	call	cudaMemcpy@PLT
	call	_Z6cclockv
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$2147483649, %edi
	salq	$2, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	addq	%rdi, %rdi
	movsd	%xmm0, (%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z35__device_stub__Z11matrix_multPdS_S_PdS_S_
.L25:
	call	cudaDeviceSynchronize@PLT
	call	_Z6cclockv
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$512, %edx
	movsd	%xmm0, 8(%rsp)
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$512, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$512, %edx
	call	cudaMemcpy@PLT
	movq	%r12, %rdx
	movl	$8, %esi
	movl	$8, %edi
	call	_Z12print_matrixiiPd
	movq	%rbp, %rdx
	movl	$8, %esi
	movl	$8, %edi
	call	_Z12print_matrixiiPd
	movq	%rbx, %rdx
	movl	$8, %esi
	movl	$8, %edi
	call	_Z12print_matrixiiPd
	movsd	8(%rsp), %xmm0
	subsd	(%rsp), %xmm0
	movb	$1, %al
	movq	stdout(%rip), %rdi
	leaq	.LC4(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z11matrix_multPdS_S_"
.LC6:
	.string	"_Z11matrix_initPd"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11matrix_multPdS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11matrix_initPd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1093567616
	.align 8
.LC3:
	.long	0
	.long	1072693248
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Matrix multiplication between square matrices using rows of A shared among threads of the same block. 
// The grid of blocks is made by unidimensional blocks of legth MATRIXSIZE.
// Each block contains NUM_THREADS cells of size CELL_SIZE.
// CUDA kernels are asynchronous, so in order to perform time measurements it is necessary to call 
// cudaDeviceSynchronize() after each kernel launch. 


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>

#include <time.h>
#include <ctype.h>
#include <sys/types.h>
#include <sys/time.h>

#define MATRIXSIZE 8 //2048
#define NUM_THREADS 4 //31 // number of threads per block
#define CELL_SIZE MATRIXSIZE / NUM_THREADS // number of blocks per row

double cclock()
  /* Returns elepsed seconds past from the last call to timer rest */
{
  struct timeval tmp;
  double sec;
  gettimeofday( &tmp, (struct timezone *)0 );
  sec = tmp.tv_sec + ((double)tmp.tv_usec)/1000000.0;
  return sec;
}

// print the matrix M

void print_matrix(int rows, int cols, double *M) {
  int i, j;
  for (i = 0; i < rows; i++) {
    for (j = 0; j < cols; j++) {
      printf("%d    ", (int)M[i * cols + j]);
    }
    printf("\n");
  }
  printf("\n");
}

// ===============================================================================

// KERNEL FUNCTIONS

// initialization

__global__ void matrix_init(double * M){
  int idx = ( blockIdx.x * blockDim.x ) + threadIdx.x;

  if( idx < MATRIXSIZE*MATRIXSIZE) {
    M[idx] = 1;
  }
}

// matrix x matrix multiplication

__global__ void matrix_mult(double * A, double * B, double * C){
  __shared__ double s_A[MATRIXSIZE];

  for (int i = 0; i < CELL_SIZE; ++i)
  {
    s_A[ threadIdx.x * CELL_SIZE + i ] = A[ blockIdx.x * MATRIXSIZE + (threadIdx.x * CELL_SIZE + i) ];
  }

  __syncthreads();

  for (int i = 0; i < CELL_SIZE; ++i)
  {
    double sum = 0.;

    for (int j = 0; j < MATRIXSIZE; ++j)
    {
      sum += s_A[j] * B[j * MATRIXSIZE + (threadIdx.x * CELL_SIZE + i)];
    }

    // each block computes an entire row of C
    C[ blockIdx.x * MATRIXSIZE + (threadIdx.x * CELL_SIZE + i) ] = sum; 
  }

}

// ===============================================================================

int main(int argc, char *argv[]) 
{
  double * h_A, * h_B, *h_C; // host pointers
  // double * h_C;
  double * d_A, * d_B, *d_C; // device pointers

  int size_in_bytes;
  double t_start, t_end;

  // MATRIXSIZE = atoi(argv[1]);
  int NUM_BLOCKS = CELL_SIZE; 
  size_in_bytes =  MATRIXSIZE * MATRIXSIZE * sizeof( double );

  if( MATRIXSIZE < 1 ){
    fprintf( stderr, "Error. Inconsistent parameters.\nProgram exit ...\n");
    exit(1);
  }

  // allocate the pointers

  h_A = ( double * ) malloc( size_in_bytes );
  h_B = ( double * ) malloc( size_in_bytes );
  h_C = ( double * ) malloc( size_in_bytes );

  hipMalloc( (void**) &d_A, size_in_bytes );
  hipMalloc( (void**) &d_B, size_in_bytes );
  hipMalloc( (void**) &d_C, size_in_bytes );

  // initialize the matrices

  // srand(time(NULL));
  for(int i = 0; i < MATRIXSIZE * MATRIXSIZE; i++ ){
    h_A[i] = (double) 1; //(rand() % 1000 + 1);
    h_B[i] = (double) i; //(rand() % 1000 + 1);
    h_C[i] = 0;
  }

  // copy from CPU to GPU

  //cudaMemcpy( dest, source, sizeinbytes, cudaMemcpyHostToDevice | cudaMemcpyDeviceToHost );
  hipMemcpy( d_A, h_A, size_in_bytes, hipMemcpyHostToDevice );
  hipMemcpy( d_B, h_B, size_in_bytes, hipMemcpyHostToDevice );
  hipMemcpy( d_C, h_C, size_in_bytes, hipMemcpyHostToDevice );

  // matrix_init<<< NUM_BLOCKS, NUM_THREADS >>>(d_A);
  // matrix_init<<< NUM_BLOCKS, NUM_THREADS >>>(d_B);

  t_start=cclock();

  matrix_mult<<< NUM_BLOCKS, NUM_THREADS >>>(d_A, d_B, d_C);

  hipDeviceSynchronize(); // blocks until the device has completed all the preceding requested tasks

  t_end=cclock();  

  // copy from GPU to CPU

  hipMemcpy( h_A, d_A, size_in_bytes, hipMemcpyDeviceToHost );
  hipMemcpy( h_B, d_B, size_in_bytes, hipMemcpyDeviceToHost );
  hipMemcpy( h_C, d_C, size_in_bytes, hipMemcpyDeviceToHost );

  print_matrix(MATRIXSIZE, MATRIXSIZE, h_A);
  print_matrix(MATRIXSIZE, MATRIXSIZE, h_B);
  print_matrix(MATRIXSIZE, MATRIXSIZE, h_C);

  fprintf( stdout, "multiplication executed. Time Elapsed %9.4f secs\n", t_end-t_start );

  // free the memory

  free( h_A );
  free( h_B );
  free( h_C );

  hipFree( d_A );
  hipFree( d_B );
  hipFree( d_C );

  return 0;
}

	.text
	.file	"shared_matmul.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z6cclockv
.LCPI0_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z6cclockv
	.type	_Z6cclockv,@function
_Z6cclockv:                             # @_Z6cclockv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	divsd	.LCPI0_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z6cclockv, .Lfunc_end0-_Z6cclockv
	.cfi_endproc
                                        # -- End function
	.globl	_Z12print_matrixiiPd            # -- Begin function _Z12print_matrixiiPd
	.type	_Z12print_matrixiiPd,@function
_Z12print_matrixiiPd:                   # @_Z12print_matrixiiPd
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, 8(%rsp)                   # 8-byte Spill
	testl	%edi, %edi
	jle	.LBB1_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%esi, %ebp
	movl	%edi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%esi, %r15d
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
.LBB1_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	testl	%ebp, %ebp
	jle	.LBB1_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%r12d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,8), %rbx
	xorl	%r14d, %r14d
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cvttsd2si	(%rbx,%r14,8), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB1_4
.LBB1_5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r13
	addl	%ebp, %r12d
	cmpq	16(%rsp), %r13                  # 8-byte Folded Reload
	jne	.LBB1_2
.LBB1_6:                                # %._crit_edge14
	movl	$10, %edi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end1:
	.size	_Z12print_matrixiiPd, .Lfunc_end1-_Z12print_matrixiiPd
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__matrix_initPd # -- Begin function _Z26__device_stub__matrix_initPd
	.type	_Z26__device_stub__matrix_initPd,@function
_Z26__device_stub__matrix_initPd:       # @_Z26__device_stub__matrix_initPd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11matrix_initPd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z26__device_stub__matrix_initPd, .Lfunc_end2-_Z26__device_stub__matrix_initPd
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__matrix_multPdS_S_ # -- Begin function _Z26__device_stub__matrix_multPdS_S_
	.type	_Z26__device_stub__matrix_multPdS_S_,@function
_Z26__device_stub__matrix_multPdS_S_:   # @_Z26__device_stub__matrix_multPdS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11matrix_multPdS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z26__device_stub__matrix_multPdS_S_, .Lfunc_end3-_Z26__device_stub__matrix_multPdS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$512, %edi                      # imm = 0x200
	callq	malloc
	movq	%rax, %rbx
	movl	$512, %edi                      # imm = 0x200
	callq	malloc
	movq	%rax, %r14
	movl	$1, %edi
	movl	$512, %esi                      # imm = 0x200
	callq	calloc@PLT
	movq	%rax, %r15
	leaq	16(%rsp), %rdi
	movl	$512, %esi                      # imm = 0x200
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$512, %esi                      # imm = 0x200
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$512, %esi                      # imm = 0x200
	callq	hipMalloc
	xorl	%eax, %eax
	movabsq	$4607182418800017408, %rcx      # imm = 0x3FF0000000000000
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movq	%rcx, (%rbx,%rax,8)
	movsd	%xmm0, (%r14,%rax,8)
	incq	%rax
	cmpq	$64, %rax
	jne	.LBB4_1
# %bb.2:
	movq	16(%rsp), %rdi
	movl	$512, %edx                      # imm = 0x200
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$512, %edx                      # imm = 0x200
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	movl	$512, %edx                      # imm = 0x200
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r12), %r13
	movq	8(%r12), %r12
	movabsq	$4294967298, %rdi               # imm = 0x100000002
	leaq	2(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_4
# %bb.3:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	_Z26__device_stub__matrix_multPdS_S_
.LBB4_4:
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r12, %xmm0
	divsd	.LCPI4_0(%rip), %xmm0
	cvtsi2sd	%r13, %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 24(%rsp)                 # 8-byte Spill
	callq	hipDeviceSynchronize
	leaq	32(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r12), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r12), %xmm1
	divsd	.LCPI4_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	subsd	24(%rsp), %xmm1                 # 8-byte Folded Reload
	movsd	%xmm1, 24(%rsp)                 # 8-byte Spill
	movq	16(%rsp), %rsi
	movl	$512, %edx                      # imm = 0x200
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movl	$512, %edx                      # imm = 0x200
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rsi
	movl	$512, %edx                      # imm = 0x200
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$8, %edi
	movl	$8, %esi
	movq	%rbx, %rdx
	callq	_Z12print_matrixiiPd
	movl	$8, %edi
	movl	$8, %esi
	movq	%r14, %rdx
	callq	_Z12print_matrixiiPd
	movl	$8, %edi
	movl	$8, %esi
	movq	%r15, %rdx
	callq	_Z12print_matrixiiPd
	movq	stdout(%rip), %rdi
	movl	$.L.str.2, %esi
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	fprintf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11matrix_initPd, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11matrix_multPdS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d    "
	.size	.L.str, 7

	.type	_Z11matrix_initPd,@object       # @_Z11matrix_initPd
	.section	.rodata,"a",@progbits
	.globl	_Z11matrix_initPd
	.p2align	3, 0x0
_Z11matrix_initPd:
	.quad	_Z26__device_stub__matrix_initPd
	.size	_Z11matrix_initPd, 8

	.type	_Z11matrix_multPdS_S_,@object   # @_Z11matrix_multPdS_S_
	.globl	_Z11matrix_multPdS_S_
	.p2align	3, 0x0
_Z11matrix_multPdS_S_:
	.quad	_Z26__device_stub__matrix_multPdS_S_
	.size	_Z11matrix_multPdS_S_, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"multiplication executed. Time Elapsed %9.4f secs\n"
	.size	.L.str.2, 50

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11matrix_initPd"
	.size	.L__unnamed_1, 18

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11matrix_multPdS_S_"
	.size	.L__unnamed_2, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__matrix_initPd
	.addrsig_sym _Z26__device_stub__matrix_multPdS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11matrix_initPd
	.addrsig_sym _Z11matrix_multPdS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11matrix_initPd       ; -- Begin function _Z11matrix_initPd
	.globl	_Z11matrix_initPd
	.p2align	8
	.type	_Z11matrix_initPd,@function
_Z11matrix_initPd:                      ; @_Z11matrix_initPd
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 64, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v3, 0x3ff00000
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11matrix_initPd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11matrix_initPd, .Lfunc_end0-_Z11matrix_initPd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 120
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11matrix_multPdS_S_   ; -- Begin function _Z11matrix_multPdS_S_
	.globl	_Z11matrix_multPdS_S_
	.p2align	8
	.type	_Z11matrix_multPdS_S_,@function
_Z11matrix_multPdS_S_:                  ; @_Z11matrix_multPdS_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v1, 0
	v_lshlrev_b32_e32 v7, 1, v0
	v_lshlrev_b32_e32 v0, 4, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b32 s2, 0
	v_mov_b32_e32 v3, v1
	v_lshl_add_u32 v2, s15, 3, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s4, -1
	global_load_b128 v[3:6], v[3:4], off
	s_waitcnt vmcnt(0)
	ds_store_b128 v0, v[3:6]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_1:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_2 Depth 2
	v_or_b32_e32 v0, s2, v7
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_xor_b32 s3, s4, -1
	s_mov_b32 s4, 0
	v_lshlrev_b64 v[5:6], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
.LBB1_2:                                ;   Parent Loop BB1_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b64 v[8:9], v[5:6], off
	v_mov_b32_e32 v0, s4
	v_add_co_u32 v5, vcc_lo, v5, 64
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	ds_load_b64 v[10:11], v0
	s_add_i32 s4, s4, 8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s4, 64
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fma_f64 v[3:4], v[10:11], v[8:9], v[3:4]
	s_cbranch_scc0 .LBB1_2
; %bb.3:                                ;   in Loop: Header=BB1_1 Depth=1
	v_or_b32_e32 v0, s2, v2
	s_mov_b32 s4, 0
	s_mov_b32 s2, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[0:1]
	v_add_co_u32 v5, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	s_and_b32 vcc_lo, exec_lo, s3
	global_store_b64 v[5:6], v[3:4], off
	s_cbranch_vccz .LBB1_1
; %bb.4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11matrix_multPdS_S_
		.amdhsa_group_segment_fixed_size 64
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11matrix_multPdS_S_, .Lfunc_end1-_Z11matrix_multPdS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 288
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 64 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11matrix_initPd
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11matrix_initPd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 64
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11matrix_multPdS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11matrix_multPdS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
