// Based on the Eric's Matlab implementation of ldpcEncoder1.
#include <math.h>
#include <string.h>
#include <stdio.h>
#include <time.h>

void ldpcEncoder (unsigned int *messageBits, unsigned int* W_ROW_ROM,
                  unsigned int numMsgBits, unsigned int numRowsInRom,
                  unsigned int numParBits, unsigned int shiftRegLength,
                  unsigned int *codeWord)  {
  unsigned int parityBits[numParBits];
  unsigned int cSR [numParBits];
  unsigned int msgPtr = 0;
  unsigned int wIndex;
  unsigned int wordSize = sizeof(unsigned int);
  unsigned int temp;

  memset(parityBits, 0, numParBits *sizeof(parityBits[0]));

// Loop on the number of rows in the ROM.
  for (int romRowIndex = 0; romRowIndex< numRowsInRom; romRowIndex++) {
    wIndex = romRowIndex * numParBits;
    memmove(cSR, &(W_ROW_ROM[wIndex]), numParBits * wordSize);

    // Loop through shiftRegLength cyclic (barrel) shifts of the registers
    for (int dummyIndex = 0; dummyIndex < shiftRegLength; dummyIndex++) {
      // Multiply (AND) the concatenated contents of shift registers with
      // the incoming message bit and add (XOR) them with the accumulated
      // parity bits, then store the result in the parity bit registers.
      if (messageBits[msgPtr] == 1) {
        for (unsigned int j=0; j< numParBits; j++) {
          parityBits[j] = (parityBits[j] + cSR[j]) % 2;
        }
      }
      // Clock the cyclic (barrel) shift registers. The values at the
      // BOTTOM of the register matrix need to be placed at the
      // TOP of the register matrix.
      // It is a bit tricky, since the linear elements of cSR,
      // contatin the shift register matrix in column order.
      for (unsigned int j = 0; j < numParBits; j += shiftRegLength) {
        temp = cSR[j - 1 + shiftRegLength];
        memmove(&(cSR[j+1]), &(cSR[j]),(shiftRegLength -1)*wordSize);
        cSR[j] = temp;
      }
      msgPtr++;
    }
  }
// Because this is a systematic code, we form the codeword by
// concatenating the parity bits at the end of the message bits.
  memmove(codeWord, messageBits, numMsgBits*wordSize);
  memmove(&(codeWord[numMsgBits]), parityBits, numParBits*wordSize);
}

	.file	"tmpxft_0026ddd5_00000000-6_Encoder.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11ldpcEncoderPjS_jjjjS_
	.type	_Z11ldpcEncoderPjS_jjjjS_, @function
_Z11ldpcEncoderPjS_jjjjS_:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	movl	%r9d, %r14d
	pushq	%r13
	pushq	%r12
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	movl	%ecx, %r12d
	pushq	%rbx
	.cfi_offset 3, -56
	movl	%r8d, %ebx
	movq	%rbx, %r13
	salq	$2, %rbx
	subq	$120, %rsp
	movq	16(%rbp), %rax
	movq	%rsi, -136(%rbp)
	movl	%edx, -96(%rbp)
	movq	%rsp, %rcx
	movq	%rdi, -104(%rbp)
	movq	%rax, -112(%rbp)
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	leaq	15(%rbx), %rax
	movq	%rax, %rdx
	shrq	$4, %rdx
	salq	$4, %rdx
	movq	%rdx, %rsi
	andq	$-4096, %rsi
	subq	%rsi, %rcx
.L3:
	cmpq	%rcx, %rsp
	je	.L4
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L3
.L4:
	andl	$4095, %edx
	subq	%rdx, %rsp
	testq	%rdx, %rdx
	je	.L5
	orq	$0, -8(%rsp,%rdx)
.L5:
	shrq	$4, %rax
	movq	%rsp, -72(%rbp)
	movq	%rsp, %rdx
	salq	$4, %rax
	movq	%rax, %rcx
	andq	$-4096, %rcx
	subq	%rcx, %rdx
.L6:
	cmpq	%rdx, %rsp
	je	.L7
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L6
.L7:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L8
	orq	$0, -8(%rsp,%rax)
.L8:
	movq	-72(%rbp), %rdi
	movq	%rbx, %rdx
	movq	%rbx, %rcx
	xorl	%esi, %esi
	movq	%rsp, %r15
	call	__memset_chk@PLT
	leal	-4(,%r14,4), %eax
	xorl	%edx, %edx
	movq	%rax, -120(%rbp)
	movl	%r12d, %eax
	xorl	%r12d, %r12d
	movq	%rax, -128(%rbp)
	xorl	%eax, %eax
	movl	%eax, -92(%rbp)
	movq	%rdx, -88(%rbp)
.L9:
	movl	%ebx, %eax
	movq	-128(%rbp), %rsi
	movq	%rax, -80(%rbp)
	cmpq	%rsi, -88(%rbp)
	je	.L28
	movq	-136(%rbp), %rdi
	movl	-92(%rbp), %eax
	movq	%rbx, %rcx
	movq	-80(%rbp), %rdx
	leaq	(%rdi,%rax,4), %rsi
	movq	%r15, %rdi
	call	__memmove_chk@PLT
	leal	(%r12,%r14), %eax
	movl	%eax, -80(%rbp)
.L10:
	movl	-80(%rbp), %eax
	cmpl	%eax, %r12d
	je	.L29
	movq	-104(%rbp), %rdi
	movl	%r12d, %eax
	cmpl	$1, (%rdi,%rax,4)
	je	.L19
.L14:
	xorl	%r8d, %r8d
	jmp	.L12
.L19:
	xorl	%eax, %eax
.L11:
	cmpl	%r13d, %eax
	jnb	.L14
	movq	-72(%rbp), %rdi
	movl	(%r15,%rax,4), %edx
	addl	(%rdi,%rax,4), %edx
	andl	$1, %edx
	movl	%edx, (%rdi,%rax,4)
	incq	%rax
	jmp	.L11
.L12:
	cmpl	%r13d, %r8d
	jnb	.L30
	leal	(%r8,%r14), %r10d
	movq	-120(%rbp), %rdx
	leaq	(%r15,%r8,4), %rsi
	movq	%r8, -144(%rbp)
	leal	-1(%r10), %eax
	movl	%r10d, -152(%rbp)
	movl	(%r15,%rax,4), %r11d
	leal	1(%r8), %eax
	salq	$2, %rax
	cmpq	%rax, %rbx
	movq	%rax, %rcx
	leaq	(%r15,%rax), %rdi
	movl	%r11d, -148(%rbp)
	cmovnb	%rbx, %rcx
	subq	%rax, %rcx
	call	__memmove_chk@PLT
	movq	-144(%rbp), %r8
	movl	-148(%rbp), %r11d
	movl	-152(%rbp), %r10d
	movl	%r11d, (%r15,%r8,4)
	movl	%r10d, %r8d
	jmp	.L12
.L30:
	incl	%r12d
	jmp	.L10
.L29:
	incq	-88(%rbp)
	addl	%r13d, -92(%rbp)
	jmp	.L9
.L28:
	movl	-96(%rbp), %eax
	movq	-104(%rbp), %rsi
	movq	-112(%rbp), %rdi
	leal	0(,%rax,4), %edx
	call	memmove@PLT
	movl	-96(%rbp), %eax
	movq	-112(%rbp), %rbx
	movq	-72(%rbp), %rsi
	movq	-80(%rbp), %rcx
	leaq	(%rbx,%rax,4), %rax
	movq	%rax, %rdi
	rep movsb
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z11ldpcEncoderPjS_jjjjS_, .-_Z11ldpcEncoderPjS_jjjjS_
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2053:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2053:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Based on the Eric's Matlab implementation of ldpcEncoder1.

#include <hip/hip_runtime.h>
#include <math.h>
#include <string.h>
#include <stdio.h>
#include <time.h>

void ldpcEncoder (unsigned int *messageBits, unsigned int* W_ROW_ROM,
                  unsigned int numMsgBits, unsigned int numRowsInRom,
                  unsigned int numParBits, unsigned int shiftRegLength,
                  unsigned int *codeWord)  {
  unsigned int parityBits[numParBits];
  unsigned int cSR [numParBits];
  unsigned int msgPtr = 0;
  unsigned int wIndex;
  unsigned int wordSize = sizeof(unsigned int);
  unsigned int temp;

  memset(parityBits, 0, numParBits *sizeof(parityBits[0]));

// Loop on the number of rows in the ROM.
  for (int romRowIndex = 0; romRowIndex< numRowsInRom; romRowIndex++) {
    wIndex = romRowIndex * numParBits;
    memmove(cSR, &(W_ROW_ROM[wIndex]), numParBits * wordSize);

    // Loop through shiftRegLength cyclic (barrel) shifts of the registers
    for (int dummyIndex = 0; dummyIndex < shiftRegLength; dummyIndex++) {
      // Multiply (AND) the concatenated contents of shift registers with
      // the incoming message bit and add (XOR) them with the accumulated
      // parity bits, then store the result in the parity bit registers.
      if (messageBits[msgPtr] == 1) {
        for (unsigned int j=0; j< numParBits; j++) {
          parityBits[j] = (parityBits[j] + cSR[j]) % 2;
        }
      }
      // Clock the cyclic (barrel) shift registers. The values at the
      // BOTTOM of the register matrix need to be placed at the
      // TOP of the register matrix.
      // It is a bit tricky, since the linear elements of cSR,
      // contatin the shift register matrix in column order.
      for (unsigned int j = 0; j < numParBits; j += shiftRegLength) {
        temp = cSR[j - 1 + shiftRegLength];
        memmove(&(cSR[j+1]), &(cSR[j]),(shiftRegLength -1)*wordSize);
        cSR[j] = temp;
      }
      msgPtr++;
    }
  }
// Because this is a systematic code, we form the codeword by
// concatenating the parity bits at the end of the message bits.
  memmove(codeWord, messageBits, numMsgBits*wordSize);
  memmove(&(codeWord[numMsgBits]), parityBits, numParBits*wordSize);
}

	.text
	.file	"Encoder.hip"
	.globl	_Z11ldpcEncoderPjS_jjjjS_       # -- Begin function _Z11ldpcEncoderPjS_jjjjS_
	.type	_Z11ldpcEncoderPjS_jjjjS_,@function
_Z11ldpcEncoderPjS_jjjjS_:              # @_Z11ldpcEncoderPjS_jjjjS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$120, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, %r12d
	movl	%r8d, %r13d
	movl	%ecx, -44(%rbp)                 # 4-byte Spill
                                        # kill: def $edx killed $edx def $rdx
	movq	%rdx, -96(%rbp)                 # 8-byte Spill
	movq	%rsi, -112(%rbp)                # 8-byte Spill
	movq	%rdi, -88(%rbp)                 # 8-byte Spill
	movl	%r8d, %ebx
	movq	%rsp, %r15
	leaq	15(,%rbx,4), %rax
	andq	$-16, %rax
	subq	%rax, %r15
	movq	%r15, %rsp
	movq	%rsp, %r14
	subq	%rax, %r14
	movq	%r14, %rsp
	leaq	(,%rbx,4), %rdx
	xorl	%eax, %eax
	movq	%rax, -56(%rbp)                 # 8-byte Spill
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	-44(%rbp), %ecx                 # 4-byte Reload
	leal	(,%r13,4), %eax
	movq	%rax, -80(%rbp)                 # 8-byte Spill
	testl	%ecx, %ecx
	je	.LBB0_6
# %bb.1:                                # %.lr.ph60
	movq	%r14, %r8
	leal	-1(%r12), %r14d
	leal	-4(,%r12,4), %eax
	movl	%ecx, %ecx
	movq	%rcx, -104(%rbp)                # 8-byte Spill
	xorl	%ecx, %ecx
	movq	%r15, -152(%rbp)                # 8-byte Spill
	movq	%rbx, -144(%rbp)                # 8-byte Spill
	movq	%r8, -64(%rbp)                  # 8-byte Spill
	movq	%r14, -136(%rbp)                # 8-byte Spill
	movq	%rax, -128(%rbp)                # 8-byte Spill
	movq	%r12, -160(%rbp)                # 8-byte Spill
.LBB0_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_8 Depth 2
                                        #       Child Loop BB0_11 Depth 3
                                        #       Child Loop BB0_14 Depth 3
	movq	%rcx, -120(%rbp)                # 8-byte Spill
	movl	%ecx, %eax
	imull	%r13d, %eax
	movq	-112(%rbp), %rcx                # 8-byte Reload
	leaq	(%rcx,%rax,4), %rsi
	movq	%r8, %rdi
	movq	-80(%rbp), %rdx                 # 8-byte Reload
	callq	memcpy@PLT
	testl	%r12d, %r12d
	je	.LBB0_3
# %bb.7:                                # %.lr.ph55.preheader
                                        #   in Loop: Header=BB0_2 Depth=1
	xorl	%ecx, %ecx
	movq	-56(%rbp), %rax                 # 8-byte Reload
                                        # kill: def $eax killed $eax killed $rax
	movq	-64(%rbp), %r8                  # 8-byte Reload
.LBB0_8:                                # %.lr.ph55
                                        #   Parent Loop BB0_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_11 Depth 3
                                        #       Child Loop BB0_14 Depth 3
	movl	%ecx, -72(%rbp)                 # 4-byte Spill
	movl	%eax, -68(%rbp)                 # 4-byte Spill
	movl	%eax, %eax
	movq	-88(%rbp), %rcx                 # 8-byte Reload
	cmpl	$1, (%rcx,%rax,4)
	jne	.LBB0_12
# %bb.9:                                # %.lr.ph55
                                        #   in Loop: Header=BB0_8 Depth=2
	testl	%r13d, %r13d
	je	.LBB0_12
# %bb.10:                               # %.lr.ph.preheader
                                        #   in Loop: Header=BB0_8 Depth=2
	xorl	%eax, %eax
.LBB0_11:                               # %.lr.ph
                                        #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_8 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r8,%rax,4), %ecx
	addl	(%r15,%rax,4), %ecx
	andl	$1, %ecx
	movl	%ecx, (%r15,%rax,4)
	incq	%rax
	cmpq	%rax, %rbx
	jne	.LBB0_11
.LBB0_12:                               # %.loopexit
                                        #   in Loop: Header=BB0_8 Depth=2
	testl	%r13d, %r13d
	movq	-136(%rbp), %r15                # 8-byte Reload
	movq	-128(%rbp), %rdx                # 8-byte Reload
	je	.LBB0_15
# %bb.13:                               # %.lr.ph51.preheader
                                        #   in Loop: Header=BB0_8 Depth=2
	xorl	%r14d, %r14d
.LBB0_14:                               # %.lr.ph51
                                        #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_8 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	leal	(%r15,%r14), %eax
	movl	(%r8,%rax,4), %eax
	movl	%eax, -44(%rbp)                 # 4-byte Spill
	leal	1(%r14), %eax
	leaq	(%r8,%rax,4), %rdi
	movl	%r14d, %eax
	movq	%r13, %rbx
	leaq	(%r8,%rax,4), %r13
	movq	%r13, %rsi
	movq	%rdx, %r12
	callq	memmove@PLT
	movq	%r12, %rdx
	movq	-64(%rbp), %r8                  # 8-byte Reload
	movl	-44(%rbp), %eax                 # 4-byte Reload
	movl	%eax, (%r13)
	movq	%rbx, %r13
	movq	-160(%rbp), %r12                # 8-byte Reload
	addl	%r12d, %r14d
	cmpl	%r13d, %r14d
	jb	.LBB0_14
.LBB0_15:                               # %._crit_edge
                                        #   in Loop: Header=BB0_8 Depth=2
	movl	-68(%rbp), %eax                 # 4-byte Reload
	incl	%eax
	movl	-72(%rbp), %ecx                 # 4-byte Reload
	incl	%ecx
	cmpl	%r12d, %ecx
	movq	-152(%rbp), %r15                # 8-byte Reload
	movq	-144(%rbp), %rbx                # 8-byte Reload
	jne	.LBB0_8
# %bb.4:                                # %._crit_edge56.loopexit
                                        #   in Loop: Header=BB0_2 Depth=1
	movq	-56(%rbp), %rax                 # 8-byte Reload
	addl	%r12d, %eax
	movq	%rax, -56(%rbp)                 # 8-byte Spill
	jmp	.LBB0_5
.LBB0_3:                                #   in Loop: Header=BB0_2 Depth=1
	movq	-64(%rbp), %r8                  # 8-byte Reload
.LBB0_5:                                # %._crit_edge56
                                        #   in Loop: Header=BB0_2 Depth=1
	movq	-120(%rbp), %rcx                # 8-byte Reload
	incq	%rcx
	cmpq	-104(%rbp), %rcx                # 8-byte Folded Reload
	jne	.LBB0_2
.LBB0_6:                                # %._crit_edge61
	movq	-96(%rbp), %rbx                 # 8-byte Reload
	leal	(,%rbx,4), %edx
	movq	16(%rbp), %r14
	movq	%r14, %rdi
	movq	-88(%rbp), %rsi                 # 8-byte Reload
	callq	memmove@PLT
	movl	%ebx, %eax
	leaq	(%r14,%rax,4), %rdi
	movq	%r15, %rsi
	movq	-80(%rbp), %rdx                 # 8-byte Reload
	callq	memcpy@PLT
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end0:
	.size	_Z11ldpcEncoderPjS_jjjjS_, .Lfunc_end0-_Z11ldpcEncoderPjS_jjjjS_
	.cfi_endproc
                                        # -- End function
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
