/*
Template code for convolution. CS6023, IITM */
#include<stdio.h>
#include<cuda.h>
#include<math.h>

#define W 1024 // Input DIM
#define OW (W-4) // Output DIM
#define D 8   // Input and Kernel Depth
#define T 5  // Kernel DIM
#define N 128 // Number of kernels

void fillMatrix(unsigned char *matrix){

unsigned char (*m)[W][D]=(unsigned char (*)[W][D])matrix;

for(int i=0;i<W;i++){
	for(int j=0;j<W;j++){
		for(int k=0;k<D;k++){
			m[i][j][k]=(i*j+j*k+i*k+i*2+j*3+k*4)%255;
				}
			}
		}
}



void fillKernel(float *kernel){

float (*t)[T][T][D]=(float (*)[T][T][D])kernel;

for(int i=0;i<N;i++){
	for(int j=0;j<T;j++){
		for(int k=0;k<T;k++){
			for(int l=0;l<D;l++){
			t[i][j][k][l]=fmod(-(i+1)*2.1+(j+1)*3.2-(k+1)*4.8+(l+1)*7.1,1.0);
				}
			}
		}
	}
}



void print_matrix_to_file(float *m){

	const char *fname = "assignment4_out";
	FILE *f = fopen(fname, "w");

	float (*mat)[OW][OW]=(float (*)[OW][OW])m;		

	for(unsigned i=0; i < N; i++) {
		for(unsigned j=0; j < OW; j++)
			for(unsigned k=0;k<OW;k++)
				fprintf(f,"%4.4f ", mat[i][j][k]);
		fprintf(f,"\n");
	}
	fclose(f);
}

__global__ void conv(unsigned char* Dm, float* Dk, float* Do)
{
	__shared__ float ker[T*T*D];
	__shared__ unsigned char tile[20*20*D];
	int tx=blockDim.x*blockIdx.x+threadIdx.x;
	int ty=blockDim.y*blockIdx.y+threadIdx.y;
	int n=blockIdx.z;
	int zk=n*T*T*D;
	int ym,xm;
		for(int d=0;d<D;d++)
		{
			if(threadIdx.x<T&&threadIdx.y<T)
				ker[threadIdx.y*T*D+threadIdx.x*D+d]=Dk[zk+threadIdx.y*T*D+threadIdx.x*D+d];
		}
		//__syncthreads();
		for(int d=0;d<D;d++)
		{
			ym=ty*W*D;
			xm=tx*D;
			tile[threadIdx.y*20*D+threadIdx.x*D+d]=Dm[ym+xm+d];
			if((tx+16)<W&&(threadIdx.x+16)<20)
			{
				ym=ty*W*D;
				xm=(tx+16)*D;
				tile[threadIdx.y*20*D+(threadIdx.x+16)*D+d]=Dm[ym+xm+d];
			}
			if((ty+16)<W&&(threadIdx.y+16)<20)
			{
				ym=(ty+16)*W*D;
				xm=(tx)*D;
				tile[(threadIdx.y+16)*20*D+(threadIdx.x)*D+d]=Dm[ym+xm+d];
			}
			if(((ty+16)<W&&(threadIdx.y+16)<20)&&((tx+16)<W&&(threadIdx.x+16)<20))
			{
				ym=(ty+16)*W*D;
				xm=(tx+16)*D;
				tile[(threadIdx.y+16)*20*D+(threadIdx.x+16)*D+d]=Dm[ym+xm+d];
			}
		}
		__syncthreads();
	if(tx<OW&&ty<OW)
	{
		float sum=0.0;
		for(int i=0;i<T;i++)
		{
			int yk1=i*T*D;
			int ym1=(threadIdx.y+i)*20*D;
			for(int j=0;j<T;j++)
			{
				int xk1=j*D;
				int xm1=(threadIdx.x+j)*D;
				for(int d=0;d<D;d++)
					sum+=tile[ym1+xm1+d]*ker[yk1+xk1+d];
			}
		}
	Do[n*OW*OW+ty*OW+tx]=sum;
	}
}

int main()
{

	unsigned char *matrix=(unsigned char*)malloc(sizeof(unsigned char)*W*W*D);
	float *kernel=(float*)malloc(sizeof(float)*T*T*D*N);
	float *output=(float *)malloc(sizeof(float)*N*OW*OW);


	fillMatrix(matrix);
	fillKernel(kernel);


	unsigned char *Dmatrix;cudaMalloc(&Dmatrix,sizeof(unsigned char)*W*W*D);
	float *Dkernel;cudaMalloc(&Dkernel,sizeof(float)*N*T*T*D);
	float *Doutput;cudaMalloc(&Doutput,sizeof(float)*N*OW*OW);
	int blockdimx=16;
	int blockdimy=16;
	int griddimz=N;
	int griddimy=(OW+blockdimx-1)/blockdimx;
	int griddimx=(OW+blockdimy-1)/blockdimy;
	dim3 blocks(griddimx, griddimy, griddimz);
	dim3 thrds_per_block(blockdimx, blockdimy);
	cudaMemcpy(Dmatrix, matrix, sizeof(unsigned char)*W*W*D,cudaMemcpyHostToDevice);
	cudaMemcpy(Dkernel, kernel, sizeof(float)*T*T*D*N,cudaMemcpyHostToDevice);


	cudaEvent_t start, stop;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);
	float milliseconds = 0;
	cudaEventRecord(start,0);

	//Make your cuda kernel call
	conv<<<blocks,thrds_per_block>>>(Dmatrix, Dkernel, Doutput);

	cudaDeviceSynchronize();


	cudaEventRecord(stop,0);
	cudaEventSynchronize(stop);
	cudaEventElapsedTime(&milliseconds, start, stop);
	printf("%f\n",milliseconds);


	cudaMemcpy(output, Doutput, sizeof(float)*N*OW*OW,cudaMemcpyDeviceToHost);

	//Use print_matrix_to_file function only 
	print_matrix_to_file(output);

}
	.file	"tmpxft_002c5fc9_00000000-6_basicStridedConvolution2.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10fillMatrixPh
	.type	_Z10fillMatrixPh, @function
_Z10fillMatrixPh:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %rsi
	xorl	%r9d, %r9d
	xorl	%ecx, %ecx
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	$255, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
.L3:
	leal	3(%rcx), %r13d
	movq	%rsi, %r10
	movl	%r9d, %r8d
	xorl	%edi, %edi
	leal	4(%rcx), %r11d
.L7:
	leal	(%r11,%rdi), %r14d
	movl	%r8d, %ebp
	xorl	%ebx, %ebx
.L4:
	movl	%ebp, %eax
	addl	%r14d, %ebp
	cltd
	idivl	%r12d
	movb	%dl, (%r10,%rbx)
	incq	%rbx
	cmpq	$8, %rbx
	jne	.L4
	incl	%edi
	addl	%r13d, %r8d
	addq	$8, %r10
	cmpl	$1024, %edi
	jne	.L7
	incl	%ecx
	addl	$2, %r9d
	addq	$8192, %rsi
	cmpl	$1024, %ecx
	jne	.L3
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10fillMatrixPh, .-_Z10fillMatrixPh
	.globl	_Z10fillKernelPf
	.type	_Z10fillKernelPf, @function
_Z10fillKernelPf:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	orl	$-1, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
.L12:
	cvtsi2sdl	%r14d, %xmm0
	mulsd	.LC4(%rip), %xmm0
	xorl	%ebx, %ebx
	movsd	%xmm0, 8(%rsp)
.L18:
	imulq	$160, %rbx, %r12
	leal	1(%rbx), %eax
	xorl	%r15d, %r15d
	cvtsi2sdl	%eax, %xmm2
	mulsd	.LC3(%rip), %xmm2
	addsd	8(%rsp), %xmm2
	addq	%rbp, %r12
.L16:
	incl	%r15d
	movaps	%xmm2, %xmm3
	movl	$1, %r13d
	cvtsi2sdl	%r15d, %xmm0
	mulsd	.LC2(%rip), %xmm0
	subsd	%xmm0, %xmm3
	movsd	%xmm3, 16(%rsp)
.L13:
	cvtsi2sdl	%r13d, %xmm0
	mulsd	.LC1(%rip), %xmm0
	movsd	.LC0(%rip), %xmm1
	movsd	%xmm2, 24(%rsp)
	addsd	16(%rsp), %xmm0
	call	fmod@PLT
	movsd	24(%rsp), %xmm2
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, -4(%r12,%r13,4)
	incq	%r13
	cmpq	$9, %r13
	jne	.L13
	addq	$32, %r12
	cmpl	$5, %r15d
	jne	.L16
	incq	%rbx
	cmpq	$5, %rbx
	jne	.L18
	decl	%r14d
	addq	$800, %rbp
	cmpl	$-129, %r14d
	jne	.L12
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z10fillKernelPf, .-_Z10fillKernelPf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC5:
	.string	"w"
.LC6:
	.string	"assignment4_out"
.LC7:
	.string	"%4.4f "
.LC8:
	.string	"\n"
	.text
	.globl	_Z20print_matrix_to_filePf
	.type	_Z20print_matrix_to_filePf, @function
_Z20print_matrix_to_filePf:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC5(%rip), %rsi
	leaq	.LC7(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	leaq	.LC6(%rip), %rdi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	leaq	4161600(%r13), %rbp
	addq	$536846400, %r13
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	pushq	%rdx
	.cfi_def_cfa_offset 64
	call	fopen@PLT
	movq	%rax, %r14
.L22:
	leaq	-4161600(%rbp), %rbx
.L26:
	xorl	%r12d, %r12d
.L23:
	cvtss2sd	(%rbx,%r12,4), %xmm0
	movq	%r15, %rdx
	movl	$2, %esi
	movq	%r14, %rdi
	movb	$1, %al
	incq	%r12
	call	__fprintf_chk@PLT
	cmpq	$1020, %r12
	jne	.L23
	addq	$4080, %rbx
	cmpq	%rbp, %rbx
	jne	.L26
	leaq	.LC8(%rip), %rdx
	movl	$2, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	leaq	4161600(%rbx), %rbp
	cmpq	%r13, %rbp
	jne	.L22
	popq	%rax
	.cfi_def_cfa_offset 56
	movq	%r14, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z20print_matrix_to_filePf, .-_Z20print_matrix_to_filePf
	.globl	_Z28__device_stub__Z4convPhPfS0_PhPfS0_
	.type	_Z28__device_stub__Z4convPhPfS0_PhPfS0_, @function
_Z28__device_stub__Z4convPhPfS0_PhPfS0_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z4convPhPfS0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L29:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z28__device_stub__Z4convPhPfS0_PhPfS0_, .-_Z28__device_stub__Z4convPhPfS0_PhPfS0_
	.globl	_Z4convPhPfS0_
	.type	_Z4convPhPfS0_, @function
_Z4convPhPfS0_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z4convPhPfS0_PhPfS0_
	.cfi_endproc
.LFE2056:
	.size	_Z4convPhPfS0_, .-_Z4convPhPfS0_
	.section	.rodata.str1.1
.LC10:
	.string	"%f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$8388608, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$102400, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$532684800, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%r12, %rdi
	movq	%rax, %rbx
	call	_Z10fillMatrixPh
	movq	%rbp, %rdi
	call	_Z10fillKernelPf
	leaq	8(%rsp), %rdi
	movl	$8388608, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$102400, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$532684800, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movabsq	$274877907008, %rax
	movl	$8388608, %edx
	movl	$128, 56(%rsp)
	movq	%rax, 48(%rsp)
	movabsq	$68719476752, %rax
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$102400, %edx
	call	cudaMemcpy@PLT
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	movl	$0x00000000, 4(%rsp)
	call	cudaEventRecord@PLT
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z28__device_stub__Z4convPhPfS0_PhPfS0_
.L35:
	call	cudaDeviceSynchronize@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	4(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	24(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	movl	$532684800, %edx
	call	cudaMemcpy@PLT
	movq	%rbx, %rdi
	call	_Z20print_matrix_to_filePf
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z4convPhPfS0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4convPhPfS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1072693248
	.align 8
.LC1:
	.long	1717986918
	.long	1075603046
	.align 8
.LC2:
	.long	858993459
	.long	1075000115
	.align 8
.LC3:
	.long	-1717986918
	.long	1074370969
	.align 8
.LC4:
	.long	-858993459
	.long	1073794252
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
Template code for convolution. CS6023, IITM */
#include<stdio.h>
#include<hip/hip_runtime.h>
#include<math.h>

#define W 1024 // Input DIM
#define OW (W-4) // Output DIM
#define D 8   // Input and Kernel Depth
#define T 5  // Kernel DIM
#define N 128 // Number of kernels

void fillMatrix(unsigned char *matrix){

unsigned char (*m)[W][D]=(unsigned char (*)[W][D])matrix;

for(int i=0;i<W;i++){
	for(int j=0;j<W;j++){
		for(int k=0;k<D;k++){
			m[i][j][k]=(i*j+j*k+i*k+i*2+j*3+k*4)%255;
				}
			}
		}
}



void fillKernel(float *kernel){

float (*t)[T][T][D]=(float (*)[T][T][D])kernel;

for(int i=0;i<N;i++){
	for(int j=0;j<T;j++){
		for(int k=0;k<T;k++){
			for(int l=0;l<D;l++){
			t[i][j][k][l]=fmod(-(i+1)*2.1+(j+1)*3.2-(k+1)*4.8+(l+1)*7.1,1.0);
				}
			}
		}
	}
}



void print_matrix_to_file(float *m){

	const char *fname = "assignment4_out";
	FILE *f = fopen(fname, "w");

	float (*mat)[OW][OW]=(float (*)[OW][OW])m;		

	for(unsigned i=0; i < N; i++) {
		for(unsigned j=0; j < OW; j++)
			for(unsigned k=0;k<OW;k++)
				fprintf(f,"%4.4f ", mat[i][j][k]);
		fprintf(f,"\n");
	}
	fclose(f);
}

__global__ void conv(unsigned char* Dm, float* Dk, float* Do)
{
	__shared__ float ker[T*T*D];
	__shared__ unsigned char tile[20*20*D];
	int tx=blockDim.x*blockIdx.x+threadIdx.x;
	int ty=blockDim.y*blockIdx.y+threadIdx.y;
	int n=blockIdx.z;
	int zk=n*T*T*D;
	int ym,xm;
		for(int d=0;d<D;d++)
		{
			if(threadIdx.x<T&&threadIdx.y<T)
				ker[threadIdx.y*T*D+threadIdx.x*D+d]=Dk[zk+threadIdx.y*T*D+threadIdx.x*D+d];
		}
		//__syncthreads();
		for(int d=0;d<D;d++)
		{
			ym=ty*W*D;
			xm=tx*D;
			tile[threadIdx.y*20*D+threadIdx.x*D+d]=Dm[ym+xm+d];
			if((tx+16)<W&&(threadIdx.x+16)<20)
			{
				ym=ty*W*D;
				xm=(tx+16)*D;
				tile[threadIdx.y*20*D+(threadIdx.x+16)*D+d]=Dm[ym+xm+d];
			}
			if((ty+16)<W&&(threadIdx.y+16)<20)
			{
				ym=(ty+16)*W*D;
				xm=(tx)*D;
				tile[(threadIdx.y+16)*20*D+(threadIdx.x)*D+d]=Dm[ym+xm+d];
			}
			if(((ty+16)<W&&(threadIdx.y+16)<20)&&((tx+16)<W&&(threadIdx.x+16)<20))
			{
				ym=(ty+16)*W*D;
				xm=(tx+16)*D;
				tile[(threadIdx.y+16)*20*D+(threadIdx.x+16)*D+d]=Dm[ym+xm+d];
			}
		}
		__syncthreads();
	if(tx<OW&&ty<OW)
	{
		float sum=0.0;
		for(int i=0;i<T;i++)
		{
			int yk1=i*T*D;
			int ym1=(threadIdx.y+i)*20*D;
			for(int j=0;j<T;j++)
			{
				int xk1=j*D;
				int xm1=(threadIdx.x+j)*D;
				for(int d=0;d<D;d++)
					sum+=tile[ym1+xm1+d]*ker[yk1+xk1+d];
			}
		}
	Do[n*OW*OW+ty*OW+tx]=sum;
	}
}

int main()
{

	unsigned char *matrix=(unsigned char*)malloc(sizeof(unsigned char)*W*W*D);
	float *kernel=(float*)malloc(sizeof(float)*T*T*D*N);
	float *output=(float *)malloc(sizeof(float)*N*OW*OW);


	fillMatrix(matrix);
	fillKernel(kernel);


	unsigned char *Dmatrix;hipMalloc(&Dmatrix,sizeof(unsigned char)*W*W*D);
	float *Dkernel;hipMalloc(&Dkernel,sizeof(float)*N*T*T*D);
	float *Doutput;hipMalloc(&Doutput,sizeof(float)*N*OW*OW);
	int blockdimx=16;
	int blockdimy=16;
	int griddimz=N;
	int griddimy=(OW+blockdimx-1)/blockdimx;
	int griddimx=(OW+blockdimy-1)/blockdimy;
	dim3 blocks(griddimx, griddimy, griddimz);
	dim3 thrds_per_block(blockdimx, blockdimy);
	hipMemcpy(Dmatrix, matrix, sizeof(unsigned char)*W*W*D,hipMemcpyHostToDevice);
	hipMemcpy(Dkernel, kernel, sizeof(float)*T*T*D*N,hipMemcpyHostToDevice);


	hipEvent_t start, stop;
	hipEventCreate(&start);
	hipEventCreate(&stop);
	float milliseconds = 0;
	hipEventRecord(start,0);

	//Make your cuda kernel call
	conv<<<blocks,thrds_per_block>>>(Dmatrix, Dkernel, Doutput);

	hipDeviceSynchronize();


	hipEventRecord(stop,0);
	hipEventSynchronize(stop);
	hipEventElapsedTime(&milliseconds, start, stop);
	printf("%f\n",milliseconds);


	hipMemcpy(output, Doutput, sizeof(float)*N*OW*OW,hipMemcpyDeviceToHost);

	//Use print_matrix_to_file function only 
	print_matrix_to_file(output);

}
	.text
	.file	"basicStridedConvolution2.hip"
	.globl	_Z10fillMatrixPh                # -- Begin function _Z10fillMatrixPh
	.type	_Z10fillMatrixPh,@function
_Z10fillMatrixPh:                       # @_Z10fillMatrixPh
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%eax, %eax
	movl	$3, %ecx
	movl	$4, %edx
	movl	$2155905153, %esi               # imm = 0x80808081
	xorl	%r8d, %r8d
.LBB0_1:                                # %.preheader23
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_2 Depth 2
                                        #       Child Loop BB0_3 Depth 3
	movl	%edx, %r9d
	movl	%eax, %r10d
	movq	%rdi, %r11
	xorl	%ebx, %ebx
.LBB0_2:                                # %.preheader
                                        #   Parent Loop BB0_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_3 Depth 3
	movl	%r10d, %ebp
	xorl	%r14d, %r14d
.LBB0_3:                                #   Parent Loop BB0_1 Depth=1
                                        #     Parent Loop BB0_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%ebp, %r15d
	imulq	%rsi, %r15
	shrq	$39, %r15
	addb	%bpl, %r15b
	movb	%r15b, (%r11,%r14)
	incq	%r14
	addl	%r9d, %ebp
	cmpq	$8, %r14
	jne	.LBB0_3
# %bb.4:                                #   in Loop: Header=BB0_2 Depth=2
	incq	%rbx
	addq	$8, %r11
	addl	%ecx, %r10d
	incl	%r9d
	cmpq	$1024, %rbx                     # imm = 0x400
	jne	.LBB0_2
# %bb.5:                                #   in Loop: Header=BB0_1 Depth=1
	incq	%r8
	addq	$8192, %rdi                     # imm = 0x2000
	addl	$2, %eax
	incl	%ecx
	incl	%edx
	cmpq	$1024, %r8                      # imm = 0x400
	jne	.LBB0_1
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z10fillMatrixPh, .Lfunc_end0-_Z10fillMatrixPh
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z10fillKernelPf
.LCPI1_0:
	.quad	0x4000cccccccccccd              # double 2.1000000000000001
.LCPI1_1:
	.quad	0x400999999999999a              # double 3.2000000000000002
.LCPI1_2:
	.quad	0xc013333333333333              # double -4.7999999999999998
.LCPI1_3:
	.quad	0x401c666666666666              # double 7.0999999999999996
.LCPI1_4:
	.quad	0x3ff0000000000000              # double 1
	.text
	.globl	_Z10fillKernelPf
	.type	_Z10fillKernelPf,@function
_Z10fillKernelPf:                       # @_Z10fillKernelPf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%eax, %eax
	movsd	.LCPI1_3(%rip), %xmm1           # xmm1 = mem[0],zero
	movsd	.LCPI1_4(%rip), %xmm2           # xmm2 = mem[0],zero
.LBB1_1:                                # %.preheader21
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
                                        #       Child Loop BB1_3 Depth 3
                                        #         Child Loop BB1_4 Depth 4
	movq	%rax, (%rsp)                    # 8-byte Spill
                                        # kill: def $eax killed $eax killed $rax
	notl	%eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	movq	%rdi, %r15
	xorl	%r12d, %r12d
.LBB1_2:                                # %.preheader20
                                        #   Parent Loop BB1_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_3 Depth 3
                                        #         Child Loop BB1_4 Depth 4
	incq	%r12
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r12d, %xmm0
	mulsd	.LCPI1_1(%rip), %xmm0
	addsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movq	%r15, %r13
	xorl	%ebp, %ebp
.LBB1_3:                                # %.preheader
                                        #   Parent Loop BB1_1 Depth=1
                                        #     Parent Loop BB1_2 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB1_4 Depth 4
	incq	%rbp
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebp, %xmm0
	mulsd	.LCPI1_2(%rip), %xmm0
	addsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	xorl	%ebx, %ebx
.LBB1_4:                                #   Parent Loop BB1_1 Depth=1
                                        #     Parent Loop BB1_2 Depth=2
                                        #       Parent Loop BB1_3 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	leaq	1(%rbx), %r14
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r14d, %xmm0
	mulsd	%xmm1, %xmm0
	addsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	movaps	%xmm2, %xmm1
	callq	fmod
	movsd	.LCPI1_4(%rip), %xmm2           # xmm2 = mem[0],zero
	movsd	.LCPI1_3(%rip), %xmm1           # xmm1 = mem[0],zero
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r13,%rbx,4)
	movq	%r14, %rbx
	cmpq	$8, %r14
	jne	.LBB1_4
# %bb.5:                                #   in Loop: Header=BB1_3 Depth=3
	addq	$32, %r13
	cmpq	$5, %rbp
	jne	.LBB1_3
# %bb.6:                                #   in Loop: Header=BB1_2 Depth=2
	addq	$160, %r15
	cmpq	$5, %r12
	jne	.LBB1_2
# %bb.7:                                #   in Loop: Header=BB1_1 Depth=1
	movq	(%rsp), %rax                    # 8-byte Reload
	incq	%rax
	movq	8(%rsp), %rdi                   # 8-byte Reload
	addq	$800, %rdi                      # imm = 0x320
	cmpq	$128, %rax
	jne	.LBB1_1
# %bb.8:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z10fillKernelPf, .Lfunc_end1-_Z10fillKernelPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z20print_matrix_to_filePf      # -- Begin function _Z20print_matrix_to_filePf
	.type	_Z20print_matrix_to_filePf,@function
_Z20print_matrix_to_filePf:             # @_Z20print_matrix_to_filePf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %r14
	xorl	%r15d, %r15d
.LBB2_1:                                # %.preheader16
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
                                        #       Child Loop BB2_3 Depth 3
	movq	%rbx, %r12
	xorl	%r13d, %r13d
.LBB2_2:                                # %.preheader
                                        #   Parent Loop BB2_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_3 Depth 3
	xorl	%ebp, %ebp
.LBB2_3:                                #   Parent Loop BB2_1 Depth=1
                                        #     Parent Loop BB2_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12,%rbp,4), %xmm0
	movl	$.L.str.2, %esi
	movq	%r14, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%rbp
	cmpq	$1020, %rbp                     # imm = 0x3FC
	jne	.LBB2_3
# %bb.4:                                #   in Loop: Header=BB2_2 Depth=2
	incq	%r13
	addq	$4080, %r12                     # imm = 0xFF0
	cmpq	$1020, %r13                     # imm = 0x3FC
	jne	.LBB2_2
# %bb.5:                                #   in Loop: Header=BB2_1 Depth=1
	movl	$10, %edi
	movq	%r14, %rsi
	callq	fputc@PLT
	incq	%r15
	addq	$4161600, %rbx                  # imm = 0x3F8040
	cmpq	$128, %r15
	jne	.LBB2_1
# %bb.6:
	movq	%r14, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.Lfunc_end2:
	.size	_Z20print_matrix_to_filePf, .Lfunc_end2-_Z20print_matrix_to_filePf
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__convPhPfS0_  # -- Begin function _Z19__device_stub__convPhPfS0_
	.type	_Z19__device_stub__convPhPfS0_,@function
_Z19__device_stub__convPhPfS0_:         # @_Z19__device_stub__convPhPfS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4convPhPfS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z19__device_stub__convPhPfS0_, .Lfunc_end3-_Z19__device_stub__convPhPfS0_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$8388608, %edi                  # imm = 0x800000
	callq	malloc
	movq	%rax, %r15
	movl	$102400, %edi                   # imm = 0x19000
	callq	malloc
	movq	%rax, %r14
	movl	$532684800, %edi                # imm = 0x1FC02000
	callq	malloc
	movq	%rax, %rbx
	movq	%r15, %rdi
	callq	_Z10fillMatrixPh
	movq	%r14, %rdi
	callq	_Z10fillKernelPf
	leaq	40(%rsp), %r12
	movl	$8388608, %esi                  # imm = 0x800000
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %r13
	movl	$102400, %esi                   # imm = 0x19000
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$532684800, %esi                # imm = 0x1FC02000
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$102400, %edx                   # imm = 0x19000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movl	$0, 12(%rsp)
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$274877907008, %rdi             # imm = 0x4000000040
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$128, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_2
# %bb.1:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z19__device_stub__convPhPfS0_
.LBB4_2:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	12(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rsi
	movl	$532684800, %edx                # imm = 0x1FC02000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	callq	_Z20print_matrix_to_filePf
	xorl	%eax, %eax
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4convPhPfS0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"assignment4_out"
	.size	.L.str, 16

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"w"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%4.4f "
	.size	.L.str.2, 7

	.type	_Z4convPhPfS0_,@object          # @_Z4convPhPfS0_
	.section	.rodata,"a",@progbits
	.globl	_Z4convPhPfS0_
	.p2align	3, 0x0
_Z4convPhPfS0_:
	.quad	_Z19__device_stub__convPhPfS0_
	.size	_Z4convPhPfS0_, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"%f\n"
	.size	.L.str.4, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4convPhPfS0_"
	.size	.L__unnamed_1, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__convPhPfS0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4convPhPfS0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4convPhPfS0_          ; -- Begin function _Z4convPhPfS0_
	.globl	_Z4convPhPfS0_
	.p2align	8
	.type	_Z4convPhPfS0_,@function
_Z4convPhPfS0_:                         ; @_Z4convPhPfS0_
; %bb.0:
	v_bfe_u32 v3, v0, 10, 10
	s_clause 0x2
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[6:7], s[0:1], 0x10
	s_load_b32 s1, s[0:1], 0x24
	v_and_b32_e32 v4, 0x3ff, v0
	s_mul_i32 s0, s15, 0xc8
	v_mul_u32_u24_e32 v6, 40, v3
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v1, 5, v4
	v_lshlrev_b32_e32 v2, 2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add3_u32 v2, v1, v2, 0xc80
	v_mov_b32_e32 v1, 0
	v_max_u32_e32 v0, v4, v3
	v_lshlrev_b32_e32 v5, 3, v4
	v_cmp_gt_u32_e32 vcc_lo, 5, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v0, s0, v6, v5
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, s0, s10, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s0, s11, v8, s0
	global_load_b32 v7, v[7:8], off
	v_add_nc_u32_e32 v8, s2, v2
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v7
.LBB0_3:                                ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v0, 1, v0
	s_add_i32 s2, s2, 4
	s_cmp_eq_u32 s2, 32
	s_cbranch_scc0 .LBB0_1
; %bb.4:                                ; %.preheader85
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s1, 16
	s_and_b32 s1, s1, 0xffff
	v_or_b32_e32 v7, v3, v4
	v_mad_u64_u32 v[0:1], null, s13, s1, v[4:5]
	v_mad_u64_u32 v[1:2], null, s14, s0, v[3:4]
	v_mul_u32_u24_e32 v2, 0x78, v3
	v_cmp_gt_u32_e64 s1, 4, v4
	v_cmp_gt_u32_e64 s2, 4, v7
	v_cmp_gt_u32_e32 vcc_lo, 4, v3
	v_lshlrev_b32_e32 v8, 3, v0
	v_add3_u32 v2, v2, v6, v5
	v_lshlrev_b32_e32 v4, 13, v1
	v_cmp_gt_i32_e64 s3, 0x3f0, v0
	v_cmp_gt_i32_e64 s0, 0x3f0, v1
	v_add_nc_u32_e32 v7, 0x80, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v6, 0x20000, v4
	v_add_nc_u32_e32 v9, v4, v8
	s_and_b32 s5, s2, s3
	v_add_nc_u32_e32 v10, v4, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v11, v6, v8
	v_add_nc_u32_e32 v12, v6, v7
	v_ashrrev_i32_e32 v6, 31, v9
	v_ashrrev_i32_e32 v8, 31, v10
	v_add_co_u32 v4, s4, s8, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v13, 31, v12
	v_add_co_ci_u32_e64 v6, s4, s9, v6, s4
	v_add_co_u32 v7, s4, s8, v10
	v_ashrrev_i32_e32 v10, 31, v11
	v_add_co_ci_u32_e64 v8, s4, s9, v8, s4
	v_add_co_u32 v9, s4, s8, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s4, s9, v10, s4
	v_add_co_u32 v11, s4, s8, v12
	v_add_co_ci_u32_e64 v12, s4, s9, v13, s4
	s_and_b32 s4, s1, s3
	s_mov_b64 s[2:3], 0
.LBB0_5:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s1, v4, s2
	v_add_co_ci_u32_e64 v14, s1, s3, v6, s1
	global_load_u8 v13, v[13:14], off
	s_waitcnt vmcnt(0)
	ds_store_b8 v2, v13
	s_and_saveexec_b32 s8, s4
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	v_add_co_u32 v13, s1, v7, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s1, s3, v8, s1
	global_load_u8 v13, v[13:14], off
	s_waitcnt vmcnt(0)
	ds_store_b8 v2, v13 offset:128
.LBB0_7:                                ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_and_saveexec_b32 s8, s0
	s_cbranch_execz .LBB0_12
; %bb.8:                                ;   in Loop: Header=BB0_5 Depth=1
	s_and_saveexec_b32 s9, vcc_lo
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_5 Depth=1
	v_add_co_u32 v13, s1, v9, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s1, s3, v10, s1
	global_load_u8 v13, v[13:14], off
	s_waitcnt vmcnt(0)
	ds_store_b8 v2, v13 offset:2560
.LBB0_10:                               ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s5
	s_cbranch_execz .LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_5 Depth=1
	v_add_co_u32 v13, s1, v11, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s1, s3, v12, s1
	global_load_u8 v13, v[13:14], off
	s_waitcnt vmcnt(0)
	ds_store_b8 v2, v13 offset:2688
.LBB0_12:                               ; %Flow152
                                        ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	v_add_nc_u32_e32 v2, 1, v2
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 8
	s_cbranch_scc0 .LBB0_5
; %bb.13:
	v_max_i32_e32 v2, v0, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_i32_e32 0x3fc, v2
	s_cbranch_execz .LBB0_21
; %bb.14:                               ; %.preheader.preheader
	v_mad_u32_u24 v3, 0xa0, v3, v5
	v_mov_b32_e32 v2, 0
	s_mov_b32 s0, 0
	s_movk_i32 s1, 0xc80
.LBB0_15:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_16 Depth 2
                                        ;       Child Loop BB0_17 Depth 3
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v4, v3
	s_mov_b32 s2, s1
	s_mov_b32 s3, 0
.LBB0_16:                               ;   Parent Loop BB0_15 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_17 Depth 3
	s_mov_b32 s4, 0
	s_mov_b32 s5, s2
.LBB0_17:                               ;   Parent Loop BB0_15 Depth=1
                                        ;     Parent Loop BB0_16 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v6, s5 :: v_dual_add_nc_u32 v5, s4, v4
	s_add_i32 s4, s4, 1
	s_add_i32 s5, s5, 4
	s_cmp_eq_u32 s4, 8
	ds_load_u8 v5, v5
	ds_load_b32 v6, v6
	s_waitcnt lgkmcnt(1)
	v_cvt_f32_ubyte0_e32 v5, v5
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v2, v6, v5
	s_cbranch_scc0 .LBB0_17
; %bb.18:                               ;   in Loop: Header=BB0_16 Depth=2
	v_add_nc_u32_e32 v4, 8, v4
	s_add_i32 s3, s3, 1
	s_add_i32 s2, s2, 32
	s_cmp_eq_u32 s3, 5
	s_cbranch_scc0 .LBB0_16
; %bb.19:                               ;   in Loop: Header=BB0_15 Depth=1
	v_add_nc_u32_e32 v3, 0xa0, v3
	s_add_i32 s0, s0, 1
	s_addk_i32 s1, 0xa0
	s_cmp_eq_u32 s0, 5
	s_cbranch_scc0 .LBB0_15
; %bb.20:
	v_mul_lo_u32 v1, 0x3fc, v1
	s_mul_i32 s15, s15, 0xfe010
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add3_u32 v0, v0, s15, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_21:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4convPhPfS0_
		.amdhsa_group_segment_fixed_size 4000
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4convPhPfS0_, .Lfunc_end0-_Z4convPhPfS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 956
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4000 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 4000
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4convPhPfS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4convPhPfS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
