#include <stdio.h>

#include "matmul.cuh"

__global__ static void kernel(float* mat_a, float* mat_b, float* mat_c);

__host__ void matmul_shared(const int BLOCK_SIZE, const float mat_a[][MAT_SIZE],
                            const float mat_b[][MAT_SIZE],
                            float mat_c[][MAT_SIZE]) {
    const int SIZE = sizeof(float) * MAT_SIZE * MAT_SIZE;
    float *dev_a, *dev_b, *dev_c;
    double start, end;

    const int GRID_DIM = MAT_SIZE / BLOCK_SIZE;
    dim3 block(BLOCK_SIZE, BLOCK_SIZE);
    dim3 grid(GRID_DIM, GRID_DIM);

    GET_TIME(start);

    cudaMalloc((void**) &dev_a, SIZE);
    cudaMalloc((void**) &dev_b, SIZE);
    cudaMalloc((void**) &dev_c, SIZE);

    cudaMemcpy(dev_a, mat_a, SIZE, cudaMemcpyHostToDevice);
    cudaMemcpy(dev_b, mat_b, SIZE, cudaMemcpyHostToDevice);
    cudaMemset(dev_c, 0, SIZE);

    const int SHARED_MEM_SIZE =
        sizeof(float) * BLOCK_SIZE * BLOCK_SIZE * (2 * GRID_DIM + 1);
    kernel<<<grid, block, SHARED_MEM_SIZE>>>(dev_a, dev_b, dev_c);
    cudaDeviceSynchronize();

    cudaMemcpy(mat_c, dev_c, SIZE, cudaMemcpyDeviceToHost);

    GET_TIME(end);

    printf("[matmul_shared]\tTime: %fs\n", end - start);

    cudaFree(dev_a);
    cudaFree(dev_b);
    cudaFree(dev_c);
}

__global__ static void kernel(float* mat_a, float* mat_b, float* mat_c) {
    extern __shared__ float shared[];
    float* shared_a = shared;  // [blockDim.y][MAT_SIZE]
    float* shared_b =
        shared_a + blockDim.y * MAT_SIZE;  // [MAT_SIZE][blockDim.x]
    float* shared_c =
        shared_b + MAT_SIZE * blockDim.x;  // [blockDim.y][blockDim.x]

    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    int tid = threadIdx.x * blockDim.x + threadIdx.y;

    shared_c[tid] = 0.0f;
    for (int i = 0; i < MAT_SIZE; i++) {
        shared_a[threadIdx.y * MAT_SIZE + i] = mat_a[row * MAT_SIZE + i];
        shared_b[i * blockDim.x + threadIdx.x] = mat_b[i * MAT_SIZE + col];
        shared_c[tid] += shared_a[threadIdx.y * MAT_SIZE + i] *
                         shared_b[i * blockDim.x + threadIdx.x];
    }
    mat_c[row * MAT_SIZE + col] = shared_c[tid];
}

	.file	"tmpxft_0036a3bc_00000000-6_matmul_shared.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL29__device_stub__Z6kernelPfS_S_PfS_S_, @function
_ZL29__device_stub__Z6kernelPfS_S_PfS_S_:
.LFB2052:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_ZL6kernelPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_ZL29__device_stub__Z6kernelPfS_S_PfS_S_, .-_ZL29__device_stub__Z6kernelPfS_S_PfS_S_
	.type	_ZL6kernelPfS_S_, @function
_ZL6kernelPfS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_ZL29__device_stub__Z6kernelPfS_S_PfS_S_
	.cfi_endproc
.LFE2053:
	.size	_ZL6kernelPfS_S_, .-_ZL6kernelPfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"[matmul_shared]\tTime: %fs\n"
	.text
	.globl	_Z13matmul_sharediPA4096_KfS1_PA4096_f
	.type	_Z13matmul_sharediPA4096_KfS1_PA4096_f, @function
_Z13matmul_sharediPA4096_KfS1_PA4096_f:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	xorl	%esi, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	imull	%ebx, %ebx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	movl	$4096, %eax
	leaq	72(%rsp), %r13
	movl	%edi, 48(%rsp)
	movl	%edi, 52(%rsp)
	movl	$1, 56(%rsp)
	movl	$1, 68(%rsp)
	cltd
	idivl	%edi
	movq	%r13, %rdi
	movl	%eax, %ebp
	movl	%eax, 60(%rsp)
	movl	%eax, 64(%rsp)
	call	gettimeofday@PLT
	leaq	24(%rsp), %rdi
	movl	$67108864, %esi
	cvtsi2sdq	72(%rsp), %xmm1
	cvtsi2sdq	80(%rsp), %xmm0
	divsd	.LC0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	movsd	%xmm0, 8(%rsp)
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$67108864, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$67108864, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	movl	$67108864, %edx
	call	cudaMemset@PLT
	movl	56(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	leal	1(%rbp,%rbp), %r8d
	movq	48(%rsp), %rdx
	movq	60(%rsp), %rdi
	imull	%ebx, %r8d
	sall	$2, %r8d
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_ZL29__device_stub__Z6kernelPfS_S_PfS_S_
.L9:
	call	cudaDeviceSynchronize@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	xorl	%esi, %esi
	movq	%r13, %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	72(%rsp), %xmm1
	movl	$2, %edi
	movb	$1, %al
	cvtsi2sdq	80(%rsp), %xmm0
	divsd	.LC0(%rip), %xmm0
	leaq	.LC1(%rip), %rsi
	addsd	%xmm1, %xmm0
	subsd	8(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z13matmul_sharediPA4096_KfS1_PA4096_f, .-_Z13matmul_sharediPA4096_KfS1_PA4096_f
	.section	.rodata.str1.1
.LC2:
	.string	"_Z6kernelPfS_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_ZL6kernelPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>

#include "matmul.cuh"

__global__ static void kernel(float* mat_a, float* mat_b, float* mat_c);

__host__ void matmul_shared(const int BLOCK_SIZE, const float mat_a[][MAT_SIZE],
                            const float mat_b[][MAT_SIZE],
                            float mat_c[][MAT_SIZE]) {
    const int SIZE = sizeof(float) * MAT_SIZE * MAT_SIZE;
    float *dev_a, *dev_b, *dev_c;
    double start, end;

    const int GRID_DIM = MAT_SIZE / BLOCK_SIZE;
    dim3 block(BLOCK_SIZE, BLOCK_SIZE);
    dim3 grid(GRID_DIM, GRID_DIM);

    GET_TIME(start);

    hipMalloc((void**) &dev_a, SIZE);
    hipMalloc((void**) &dev_b, SIZE);
    hipMalloc((void**) &dev_c, SIZE);

    hipMemcpy(dev_a, mat_a, SIZE, hipMemcpyHostToDevice);
    hipMemcpy(dev_b, mat_b, SIZE, hipMemcpyHostToDevice);
    hipMemset(dev_c, 0, SIZE);

    const int SHARED_MEM_SIZE =
        sizeof(float) * BLOCK_SIZE * BLOCK_SIZE * (2 * GRID_DIM + 1);
    kernel<<<grid, block, SHARED_MEM_SIZE>>>(dev_a, dev_b, dev_c);
    hipDeviceSynchronize();

    hipMemcpy(mat_c, dev_c, SIZE, hipMemcpyDeviceToHost);

    GET_TIME(end);

    printf("[matmul_shared]\tTime: %fs\n", end - start);

    hipFree(dev_a);
    hipFree(dev_b);
    hipFree(dev_c);
}

__global__ static void kernel(float* mat_a, float* mat_b, float* mat_c) {
    extern __shared__ float shared[];
    float* shared_a = shared;  // [blockDim.y][MAT_SIZE]
    float* shared_b =
        shared_a + blockDim.y * MAT_SIZE;  // [MAT_SIZE][blockDim.x]
    float* shared_c =
        shared_b + MAT_SIZE * blockDim.x;  // [blockDim.y][blockDim.x]

    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    int tid = threadIdx.x * blockDim.x + threadIdx.y;

    shared_c[tid] = 0.0f;
    for (int i = 0; i < MAT_SIZE; i++) {
        shared_a[threadIdx.y * MAT_SIZE + i] = mat_a[row * MAT_SIZE + i];
        shared_b[i * blockDim.x + threadIdx.x] = mat_b[i * MAT_SIZE + col];
        shared_c[tid] += shared_a[threadIdx.y * MAT_SIZE + i] *
                         shared_b[i * blockDim.x + threadIdx.x];
    }
    mat_c[row * MAT_SIZE + col] = shared_c[tid];
}

	.text
	.file	"matmul_shared.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z13matmul_sharediPA4096_KfS1_PA4096_f
.LCPI0_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z13matmul_sharediPA4096_KfS1_PA4096_f
	.type	_Z13matmul_sharediPA4096_KfS1_PA4096_f,@function
_Z13matmul_sharediPA4096_KfS1_PA4096_f: # @_Z13matmul_sharediPA4096_KfS1_PA4096_f
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 64(%rsp)                  # 8-byte Spill
	movq	%rdx, 48(%rsp)                  # 8-byte Spill
	movq	%rsi, 40(%rsp)                  # 8-byte Spill
	movl	%edi, %ebp
	movl	$4096, %eax                     # imm = 0x1000
	xorl	%edx, %edx
	idivl	%edi
	movl	%eax, %r15d
	movl	%edi, %eax
	movq	%rax, %r14
	shlq	$32, %r14
	orq	%rax, %r14
	movq	%r15, %r12
	shlq	$32, %r12
	orq	%r15, %r12
	leaq	72(%rsp), %r13
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r13), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	8(%r13), %rax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	leaq	32(%rsp), %r13
	movl	$67108864, %esi                 # imm = 0x4000000
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %rbx
	movl	$67108864, %esi                 # imm = 0x4000000
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$67108864, %esi                 # imm = 0x4000000
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rax
	movq	(%rax), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	xorl	%esi, %esi
	callq	hipMemset
	imull	%ebp, %ebp
	leal	1(,%r15,2), %eax
	imull	%ebp, %eax
	shll	$2, %eax
	movslq	%eax, %r8
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_ZL21__device_stub__kernelPfS_S_
.LBB0_2:
	cvtsi2sdq	16(%rsp), %xmm0         # 8-byte Folded Reload
	cvtsi2sdq	56(%rsp), %xmm1         # 8-byte Folded Reload
	divsd	.LCPI0_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 16(%rsp)                 # 8-byte Spill
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	72(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm1, %xmm1
	cvtsi2sdq	(%rbx), %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%rbx), %xmm0
	divsd	.LCPI0_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	subsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z13matmul_sharediPA4096_KfS1_PA4096_f, .Lfunc_end0-_Z13matmul_sharediPA4096_KfS1_PA4096_f
	.cfi_endproc
                                        # -- End function
	.type	_ZL21__device_stub__kernelPfS_S_,@function # -- Begin function _ZL21__device_stub__kernelPfS_S_
_ZL21__device_stub__kernelPfS_S_:       # @_ZL21__device_stub__kernelPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZL6kernelPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_ZL21__device_stub__kernelPfS_S_, .Lfunc_end1-_ZL21__device_stub__kernelPfS_S_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZL6kernelPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_ZL6kernelPfS_S_,@object        # @_ZL6kernelPfS_S_
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
_ZL6kernelPfS_S_:
	.quad	_ZL21__device_stub__kernelPfS_S_
	.size	_ZL6kernelPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"[matmul_shared]\tTime: %fs\n"
	.size	.L.str, 27

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_ZL6kernelPfS_S_"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _ZL21__device_stub__kernelPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZL6kernelPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._ZL6kernelPfS_S_,"axG",@progbits,_ZL6kernelPfS_S_,comdat
	.globl	_ZL6kernelPfS_S_                ; -- Begin function _ZL6kernelPfS_S_
	.p2align	8
	.type	_ZL6kernelPfS_S_,@function
_ZL6kernelPfS_S_:                       ; @_ZL6kernelPfS_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v9, 0 :: v_dual_lshlrev_b32 v8, 2, v1
	v_lshl_add_u32 v6, v1, 14, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s8, s2, 0xffff
	s_mul_i32 s15, s15, s3
	v_mul_u32_u24_e32 v2, s8, v3
	v_add_lshl_u32 v0, s15, v1, 12
	s_lshl_b32 s2, s3, 14
	s_lshl_b32 s3, s8, 14
	s_add_i32 s2, s2, 0
	v_lshlrev_b32_e32 v10, 2, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s3, s2, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add3_u32 v8, s3, v10, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	s_lshl_b32 s3, s8, 2
	ds_store_b32 v8, v9
	v_mad_u64_u32 v[1:2], null, s14, s8, v[3:4]
	v_add_co_u32 v2, vcc_lo, s4, v4
	v_mov_b32_e32 v4, v1
	v_lshl_add_u32 v7, v3, 2, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v5, vcc_lo
	s_mov_b32 s2, 0
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[9:10], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v9, v[9:10], off
	v_add_nc_u32_e32 v10, s2, v6
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_add_i32 s2, s2, 4
	s_waitcnt vmcnt(1)
	ds_store_b32 v10, v5
	s_waitcnt vmcnt(0)
	ds_store_b32 v7, v9
	ds_load_b32 v10, v10
	ds_load_b32 v5, v8
	v_add_nc_u32_e32 v4, 0x1000, v4
	v_add_nc_u32_e32 v7, s3, v7
	s_cmpk_eq_i32 s2, 0x4000
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v5, v9, v10
	ds_store_b32 v8, v5
	s_cbranch_scc0 .LBB0_1
; %bb.2:
	v_add_nc_u32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v5, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZL6kernelPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZL6kernelPfS_S_,"axG",@progbits,_ZL6kernelPfS_S_,comdat
.Lfunc_end0:
	.size	_ZL6kernelPfS_S_, .Lfunc_end0-_ZL6kernelPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 388
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _ZL6kernelPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _ZL6kernelPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
