#include <cstdint>
#include <thrust/device_vector.h>
#include <thrust/sort.h>

template <typename K, typename V> void SortByFreq(K *freq, V *qcode, int size) {
  using namespace thrust;
  sort_by_key(device_ptr<K>(freq),        //
              device_ptr<K>(freq + size), //
              device_ptr<V>(qcode));
}

template void SortByFreq<unsigned int, uint8_t>(unsigned int *, uint8_t *, int);
template void SortByFreq<unsigned int, uint16_t>(unsigned int *, uint16_t *,
                                                 int);
template void SortByFreq<unsigned int, uint32_t>(unsigned int *, uint32_t *,
                                                 int);

	.file	"tmpxft_0029d73b_00000000-6_par_huffman_sortbyfreq.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi
	.type	_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi, @function
_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi:
.LFB8225:
	.cfi_startproc
	endbr64
	movq	%rdi, %rdx
	movl	%esi, %eax
	ret
	.cfi_endproc
.LFE8225:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi, .-_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi
	.type	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi, @function
_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi:
.LFB8227:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	cmpq	%rdi, 8(%rsi)
	jne	.L2
	cmpl	%edx, (%rsi)
	sete	%al
.L2:
	ret
	.cfi_endproc
.LFE8227:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi, .-_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv.str1.1,"aMS",@progbits,1
.LC1:
	.string	"generic"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv:
.LFB8237:
	.cfi_startproc
	endbr64
	leaq	.LC1(%rip), %rax
	ret
	.cfi_endproc
.LFE8237:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv.str1.1,"aMS",@progbits,1
.LC2:
	.string	"system"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv:
.LFB8242:
	.cfi_startproc
	endbr64
	leaq	.LC2(%rip), %rax
	ret
	.cfi_endproc
.LFE8242:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev:
.LFB8247:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE8247:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev,_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev:
.LFB8252:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE8252:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev,_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE
	.type	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE, @function
_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE:
.LFB8226:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdx, %rbx
	call	*24(%rax)
	movq	%rdx, %rcx
	xorl	%edx, %edx
	cmpq	%rcx, 8(%rbx)
	jne	.L11
	cmpl	%eax, (%rbx)
	sete	%dl
.L11:
	movl	%edx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8226:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE, .-_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv.str1.1,"aMS",@progbits,1
.LC3:
	.string	"cuda"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv
	.type	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv, @function
_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv:
.LFB8302:
	.cfi_startproc
	endbr64
	leaq	.LC3(%rip), %rax
	ret
	.cfi_endproc
.LFE8302:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv, .-_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev:
.LFB8307:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE8307:
	.size	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev,_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev
	.text
	.type	nvtxDomainRangePop, @function
nvtxDomainRangePop:
.LFB8459:
	.cfi_startproc
	movq	424+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L18
	jmp	*%rax
.L18:
	movl	$-2, %eax
	ret
	.cfi_endproc
.LFE8459:
	.size	nvtxDomainRangePop, .-nvtxDomainRangePop
	.section	.text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
	.weak	nvtxEtiGetModuleFunctionTable_v3
	.hidden	nvtxEtiGetModuleFunctionTable_v3
	.type	nvtxEtiGetModuleFunctionTable_v3, @function
nvtxEtiGetModuleFunctionTable_v3:
.LFB8470:
	.cfi_startproc
	endbr64
	decl	%edi
	xorl	%eax, %eax
	cmpl	$5, %edi
	ja	.L19
	leaq	.L22(%rip), %rcx
	movslq	(%rcx,%rdi,4), %rax
	addq	%rcx, %rax
	notrack jmp	*%rax
	.section	.rodata.nvtxEtiGetModuleFunctionTable_v3,"aG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
	.align 4
	.align 4
.L22:
	.long	.L27-.L22
	.long	.L32-.L22
	.long	.L25-.L22
	.long	.L24-.L22
	.long	.L23-.L22
	.long	.L21-.L22
	.section	.text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
.L27:
	leaq	560+nvtxGlobals_v3(%rip), %rcx
	jmp	.L36
.L25:
	leaq	776+nvtxGlobals_v3(%rip), %rcx
	movl	$128, %eax
	jmp	.L26
.L24:
	leaq	904+nvtxGlobals_v3(%rip), %rcx
	jmp	.L37
.L23:
	leaq	968+nvtxGlobals_v3(%rip), %rcx
.L36:
	movl	$136, %eax
	jmp	.L26
.L21:
	leaq	1104+nvtxGlobals_v3(%rip), %rcx
.L37:
	movl	$64, %eax
	jmp	.L26
.L32:
	leaq	696+nvtxGlobals_v3(%rip), %rcx
	movl	$80, %eax
.L26:
	testq	%rdx, %rdx
	je	.L28
	shrl	$3, %eax
	decl	%eax
	movl	%eax, (%rdx)
.L28:
	testq	%rsi, %rsi
	jne	.L29
.L30:
	movl	$1, %eax
	ret
.L29:
	movq	%rcx, (%rsi)
	jmp	.L30
.L19:
	ret
	.cfi_endproc
.LFE8470:
	.size	nvtxEtiGetModuleFunctionTable_v3, .-nvtxEtiGetModuleFunctionTable_v3
	.section	.text.nvtxGetExportTable_v3,"axG",@progbits,nvtxGetExportTable_v3,comdat
	.weak	nvtxGetExportTable_v3
	.hidden	nvtxGetExportTable_v3
	.type	nvtxGetExportTable_v3, @function
nvtxGetExportTable_v3:
.LFB8471:
	.cfi_startproc
	endbr64
	leaq	8+nvtxGlobals_v3(%rip), %rax
	cmpl	$1, %edi
	je	.L38
	cmpl	$3, %edi
	leaq	16(%rax), %rax
	movl	$0, %edx
	cmovne	%rdx, %rax
.L38:
	ret
	.cfi_endproc
.LFE8471:
	.size	nvtxGetExportTable_v3, .-nvtxGetExportTable_v3
	.section	.text.nvtxEtiSetInjectionNvtxVersion_v3,"axG",@progbits,nvtxEtiSetInjectionNvtxVersion_v3,comdat
	.weak	nvtxEtiSetInjectionNvtxVersion_v3
	.hidden	nvtxEtiSetInjectionNvtxVersion_v3
	.type	nvtxEtiSetInjectionNvtxVersion_v3, @function
nvtxEtiSetInjectionNvtxVersion_v3:
.LFB8472:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE8472:
	.size	nvtxEtiSetInjectionNvtxVersion_v3, .-nvtxEtiSetInjectionNvtxVersion_v3
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv:
.LFB9542:
	.cfi_startproc
	endbr64
	movq	8(%rdi), %rax
	ret
	.cfi_endproc
.LFE9542:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev:
.LFB8249:
	.cfi_startproc
	endbr64
	movl	$8, %esi
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE8249:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev:
.LFB8254:
	.cfi_startproc
	endbr64
	movl	$8, %esi
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE8254:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev:
.LFB8309:
	.cfi_startproc
	endbr64
	movl	$8, %esi
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE8309:
	.size	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev:
.LFB9539:
	.cfi_startproc
	endbr64
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rax
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	leaq	8(%rdi), %rdi
	movq	%rax, -8(%rdi)
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt9bad_allocD2Ev@PLT
	.cfi_endproc
.LFE9539:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev:
.LFB9541:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev
	movq	8(%rsp), %rdi
	movl	$40, %esi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE9541:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev
	.section	.text._ZN4cuda3__410cuda_errorD2Ev,"axG",@progbits,_ZN4cuda3__410cuda_errorD5Ev,comdat
	.align 2
	.weak	_ZN4cuda3__410cuda_errorD2Ev
	.type	_ZN4cuda3__410cuda_errorD2Ev, @function
_ZN4cuda3__410cuda_errorD2Ev:
.LFB6690:
	.cfi_startproc
	endbr64
	leaq	16+_ZTVN4cuda3__410cuda_errorE(%rip), %rax
	movq	%rax, (%rdi)
	jmp	_ZNSt13runtime_errorD2Ev@PLT
	.cfi_endproc
.LFE6690:
	.size	_ZN4cuda3__410cuda_errorD2Ev, .-_ZN4cuda3__410cuda_errorD2Ev
	.weak	_ZN4cuda3__410cuda_errorD1Ev
	.set	_ZN4cuda3__410cuda_errorD1Ev,_ZN4cuda3__410cuda_errorD2Ev
	.section	.text._ZN4cuda3__410cuda_errorD0Ev,"axG",@progbits,_ZN4cuda3__410cuda_errorD5Ev,comdat
	.align 2
	.weak	_ZN4cuda3__410cuda_errorD0Ev
	.type	_ZN4cuda3__410cuda_errorD0Ev, @function
_ZN4cuda3__410cuda_errorD0Ev:
.LFB6692:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	_ZN4cuda3__410cuda_errorD1Ev
	movq	8(%rsp), %rdi
	movl	$16, %esi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE6692:
	.size	_ZN4cuda3__410cuda_errorD0Ev, .-_ZN4cuda3__410cuda_errorD0Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system12system_errorD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev:
.LFB8311:
	.cfi_startproc
	endbr64
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE(%rip), %rax
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	leaq	32(%rdi), %rdi
	movq	%rax, -32(%rdi)
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt13runtime_errorD2Ev@PLT
	.cfi_endproc
.LFE8311:
	.size	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev,_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system12system_errorD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev:
.LFB8313:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev
	movq	8(%rsp), %rdi
	movl	$64, %esi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE8313:
	.size	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev
	.text
	.type	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im, @function
_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im:
.LFB13238:
	.cfi_startproc
	xorl	%r8d, %r8d
	jmp	cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags@PLT
	.cfi_endproc
.LFE13238:
	.size	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im, .-_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	.set	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPKjPjPKtPtPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS8_6detail21identity_decomposer_tEEE9cudaErrorPiT_im,_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	.set	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPKjPjS1_S2_PyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS5_6detail21identity_decomposer_tEEE9cudaErrorPiT_im,_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	.set	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPKjPjPKhPhPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS8_6detail21identity_decomposer_tEEE9cudaErrorPiT_im,_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	.set	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyiEE9cudaErrorPiT_im,_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	.set	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS4_6detail21identity_decomposer_tEEE9cudaErrorPiT_im,_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB11809:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE11809:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.text._ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0,"axG",@progbits,_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,comdat
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB13456:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	20(%rdi), %ecx
	movq	32(%rax), %r9
	movq	128(%rsp), %rdx
	movq	112(%rsp), %r10
	movq	%rsi, (%rsp)
	movq	120(%rsp), %r11
	movl	8(%rax), %esi
	movq	24(%rax), %r8
	movq	96(%rsp), %r14
	movq	%rdx, 8(%rsp)
	movq	12(%rdi), %rdx
	movq	(%rdi), %rdi
	movq	%r10, 24(%rsp)
	movq	%r11, 16(%rsp)
	movq	104(%rsp), %r15
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L62
	subq	$80, %rsp
	.cfi_def_cfa_offset 176
	movl	$18, %ecx
	movq	88(%rsp), %rsi
	movq	%rsp, %rdi
	rep movsl
	movq	96(%rsp), %r11
	movl	(%r11), %eax
	pushq	%rax
	.cfi_def_cfa_offset 184
	movq	112(%rsp), %r10
	movl	(%r10), %eax
	pushq	%rax
	.cfi_def_cfa_offset 192
	movq	96(%rsp), %rax
	movq	(%r15), %r9
	movq	(%r14), %r8
	movq	0(%r13), %rcx
	movq	(%r12), %rdx
	movq	0(%rbp), %rsi
	movq	(%rbx), %rdi
	call	*%rax
	addq	$96, %rsp
	.cfi_def_cfa_offset 96
.L62:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE13456:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0
	.section	.text._ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_PyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSA_6detail21identity_decomposer_tEEJS6_S7_S6_S7_S8_yiiSC_SE_EEE9cudaErrorT_DpRKT0_.isra.0,"axG",@progbits,_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,comdat
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_PyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSA_6detail21identity_decomposer_tEEJS6_S7_S6_S7_S8_yiiSC_SE_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_PyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSA_6detail21identity_decomposer_tEEJS6_S7_S6_S7_S8_yiiSC_SE_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB13457:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	20(%rdi), %ecx
	movq	32(%rax), %r9
	movq	128(%rsp), %rdx
	movq	112(%rsp), %r10
	movq	%rsi, (%rsp)
	movq	120(%rsp), %r11
	movl	8(%rax), %esi
	movq	24(%rax), %r8
	movq	96(%rsp), %r14
	movq	%rdx, 8(%rsp)
	movq	12(%rdi), %rdx
	movq	(%rdi), %rdi
	movq	%r10, 24(%rsp)
	movq	%r11, 16(%rsp)
	movq	104(%rsp), %r15
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L65
	subq	$80, %rsp
	.cfi_def_cfa_offset 176
	movl	$18, %ecx
	movq	88(%rsp), %rsi
	movq	%rsp, %rdi
	rep movsl
	movq	96(%rsp), %r11
	movl	(%r11), %eax
	pushq	%rax
	.cfi_def_cfa_offset 184
	movq	112(%rsp), %r10
	movl	(%r10), %eax
	pushq	%rax
	.cfi_def_cfa_offset 192
	movq	96(%rsp), %rax
	movq	(%r15), %r9
	movq	(%r14), %r8
	movq	0(%r13), %rcx
	movq	(%r12), %rdx
	movq	0(%rbp), %rsi
	movq	(%rbx), %rdi
	call	*%rax
	addq	$96, %rsp
	.cfi_def_cfa_offset 96
.L65:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE13457:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_PyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSA_6detail21identity_decomposer_tEEJS6_S7_S6_S7_S8_yiiSC_SE_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_PyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSA_6detail21identity_decomposer_tEEJS6_S7_S6_S7_S8_yiiSC_SE_EEE9cudaErrorT_DpRKT0_.isra.0
	.section	.text._ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0,"axG",@progbits,_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,comdat
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB13458:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	20(%rdi), %ecx
	movq	32(%rax), %r9
	movq	128(%rsp), %rdx
	movq	112(%rsp), %r10
	movq	%rsi, (%rsp)
	movq	120(%rsp), %r11
	movl	8(%rax), %esi
	movq	24(%rax), %r8
	movq	96(%rsp), %r14
	movq	%rdx, 8(%rsp)
	movq	12(%rdi), %rdx
	movq	(%rdi), %rdi
	movq	%r10, 24(%rsp)
	movq	%r11, 16(%rsp)
	movq	104(%rsp), %r15
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L68
	subq	$80, %rsp
	.cfi_def_cfa_offset 176
	movl	$18, %ecx
	movq	88(%rsp), %rsi
	movq	%rsp, %rdi
	rep movsl
	movq	96(%rsp), %r11
	movl	(%r11), %eax
	pushq	%rax
	.cfi_def_cfa_offset 184
	movq	112(%rsp), %r10
	movl	(%r10), %eax
	pushq	%rax
	.cfi_def_cfa_offset 192
	movq	96(%rsp), %rax
	movq	(%r15), %r9
	movq	(%r14), %r8
	movq	0(%r13), %rcx
	movq	(%r12), %rdx
	movq	0(%rbp), %rsi
	movq	(%rbx), %rdi
	call	*%rax
	addq	$96, %rsp
	.cfi_def_cfa_offset 96
.L68:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE13458:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0
	.text
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0:
.LFB13459:
	.cfi_startproc
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	(%rdi), %rax
	movq	%rsi, %rbx
	movq	12(%rdi), %rdx
	movl	20(%rdi), %ecx
	movl	8(%rdi), %esi
	movq	32(%rdi), %r9
	movq	24(%rdi), %r8
	movq	%rax, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L71
	movl	(%r12), %esi
	movq	0(%rbp), %rdi
	call	*%rbx
.L71:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE13459:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB13460:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %rax
	movq	%r9, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	20(%rdi), %ecx
	movl	8(%rax), %esi
	movq	88(%rsp), %rdx
	movq	32(%rax), %r9
	movq	24(%rax), %r8
	movq	80(%rsp), %r14
	movq	%rdx, 8(%rsp)
	movq	12(%rdi), %rdx
	movq	(%rdi), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L74
	subq	$80, %rsp
	.cfi_def_cfa_offset 160
	movl	$18, %ecx
	movq	88(%rsp), %rsi
	movq	%rsp, %rdi
	rep movsl
	movl	(%r14), %r8d
	movl	(%r15), %ecx
	movq	0(%r13), %rdx
	movq	(%r12), %rsi
	movq	0(%rbp), %rdi
	call	*%rbx
	addq	$80, %rsp
	.cfi_def_cfa_offset 80
.L74:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE13460:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0
	.section	.text._ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPtPKtiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0,"axG",@progbits,_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,comdat
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPtPKtiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPtPKtiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB13461:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%r9, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	32(%rax), %r9
	movq	152(%rsp), %r10
	movq	160(%rsp), %r11
	movq	%rsi, (%rsp)
	movq	112(%rsp), %rbp
	movq	120(%rsp), %r12
	movq	%rdx, 8(%rsp)
	movq	%rcx, 16(%rsp)
	movq	12(%rdi), %rdx
	movl	20(%rdi), %ecx
	movq	%r8, 24(%rsp)
	movq	%r10, 40(%rsp)
	movq	128(%rsp), %r13
	movq	136(%rsp), %r14
	movq	144(%rsp), %r15
	movq	%r11, 32(%rsp)
	movq	(%rdi), %rdi
	movl	8(%rax), %esi
	movq	24(%rax), %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L77
	pushq	%rax
	.cfi_def_cfa_offset 120
	movq	40(%rsp), %r11
	movl	(%r11), %eax
	pushq	%rax
	.cfi_def_cfa_offset 128
	movq	56(%rsp), %r10
	movl	(%r10), %eax
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	(%r15), %eax
	pushq	%rax
	.cfi_def_cfa_offset 144
	pushq	(%r14)
	.cfi_def_cfa_offset 152
	pushq	0(%r13)
	.cfi_def_cfa_offset 160
	movq	72(%rsp), %rax
	movq	(%r12), %r9
	movq	0(%rbp), %r8
	movq	(%rax), %rdx
	movq	64(%rsp), %rax
	movq	(%rbx), %rcx
	movq	(%rax), %rsi
	movq	56(%rsp), %rax
	movq	(%rax), %rdi
	movq	48(%rsp), %rax
	call	*%rax
	addq	$48, %rsp
	.cfi_def_cfa_offset 112
.L77:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE13461:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPtPKtiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPtPKtiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0
	.section	.text._ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjS9_SB_iiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_S9_S9_iiiSF_EEE9cudaErrorT_DpRKT0_.isra.0,"axG",@progbits,_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,comdat
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjS9_SB_iiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_S9_S9_iiiSF_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjS9_SB_iiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_S9_S9_iiiSF_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB13462:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%r9, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	32(%rax), %r9
	movq	152(%rsp), %r10
	movq	160(%rsp), %r11
	movq	%rsi, (%rsp)
	movq	112(%rsp), %rbp
	movq	120(%rsp), %r12
	movq	%rdx, 8(%rsp)
	movq	%rcx, 16(%rsp)
	movq	12(%rdi), %rdx
	movl	20(%rdi), %ecx
	movq	%r8, 24(%rsp)
	movq	%r10, 40(%rsp)
	movq	128(%rsp), %r13
	movq	136(%rsp), %r14
	movq	144(%rsp), %r15
	movq	%r11, 32(%rsp)
	movq	(%rdi), %rdi
	movl	8(%rax), %esi
	movq	24(%rax), %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L80
	pushq	%rax
	.cfi_def_cfa_offset 120
	movq	40(%rsp), %r11
	movl	(%r11), %eax
	pushq	%rax
	.cfi_def_cfa_offset 128
	movq	56(%rsp), %r10
	movl	(%r10), %eax
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	(%r15), %eax
	pushq	%rax
	.cfi_def_cfa_offset 144
	pushq	(%r14)
	.cfi_def_cfa_offset 152
	pushq	0(%r13)
	.cfi_def_cfa_offset 160
	movq	72(%rsp), %rax
	movq	(%r12), %r9
	movq	0(%rbp), %r8
	movq	(%rax), %rdx
	movq	64(%rsp), %rax
	movq	(%rbx), %rcx
	movq	(%rax), %rsi
	movq	56(%rsp), %rax
	movq	(%rax), %rdi
	movq	48(%rsp), %rax
	call	*%rax
	addq	$48, %rsp
	.cfi_def_cfa_offset 112
.L80:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE13462:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjS9_SB_iiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_S9_S9_iiiSF_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjS9_SB_iiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_S9_S9_iiiSF_EEE9cudaErrorT_DpRKT0_.isra.0
	.section	.text._ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPhPKhiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0,"axG",@progbits,_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,comdat
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPhPKhiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPhPKhiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB13463:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%r9, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	32(%rax), %r9
	movq	152(%rsp), %r10
	movq	160(%rsp), %r11
	movq	%rsi, (%rsp)
	movq	112(%rsp), %rbp
	movq	120(%rsp), %r12
	movq	%rdx, 8(%rsp)
	movq	%rcx, 16(%rsp)
	movq	12(%rdi), %rdx
	movl	20(%rdi), %ecx
	movq	%r8, 24(%rsp)
	movq	%r10, 40(%rsp)
	movq	128(%rsp), %r13
	movq	136(%rsp), %r14
	movq	144(%rsp), %r15
	movq	%r11, 32(%rsp)
	movq	(%rdi), %rdi
	movl	8(%rax), %esi
	movq	24(%rax), %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L83
	pushq	%rax
	.cfi_def_cfa_offset 120
	movq	40(%rsp), %r11
	movl	(%r11), %eax
	pushq	%rax
	.cfi_def_cfa_offset 128
	movq	56(%rsp), %r10
	movl	(%r10), %eax
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	(%r15), %eax
	pushq	%rax
	.cfi_def_cfa_offset 144
	pushq	(%r14)
	.cfi_def_cfa_offset 152
	pushq	0(%r13)
	.cfi_def_cfa_offset 160
	movq	72(%rsp), %rax
	movq	(%r12), %r9
	movq	0(%rbp), %r8
	movq	(%rax), %rdx
	movq	64(%rsp), %rax
	movq	(%rbx), %rcx
	movq	(%rax), %rsi
	movq	56(%rsp), %rax
	movq	(%rax), %rdi
	movq	48(%rsp), %rax
	call	*%rax
	addq	$48, %rsp
	.cfi_def_cfa_offset 112
.L83:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE13463:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPhPKhiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPhPKhiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0
	.text
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB13464:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r9, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	pushq	%r10
	.cfi_def_cfa_offset 64
	movq	12(%rdi), %rdx
	movl	20(%rdi), %ecx
	movl	8(%rax), %esi
	movq	(%rdi), %rdi
	movq	32(%rax), %r9
	movq	24(%rax), %r8
	movq	64(%rsp), %r15
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L86
	movl	(%r15), %r8d
	movl	(%r14), %ecx
	movq	0(%r13), %rdx
	movq	(%r12), %rsi
	movq	0(%rbp), %rdi
	call	*%rbx
.L86:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE13464:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	.section	.text._ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0,"axG",@progbits,_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,comdat
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB13465:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r9, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	12(%rdi), %rdx
	movl	20(%rdi), %ecx
	movq	88(%rsp), %r10
	movq	96(%rsp), %r11
	movq	(%rdi), %rdi
	movl	8(%rax), %esi
	movq	32(%rax), %r9
	movq	24(%rax), %r8
	movq	%r10, 8(%rsp)
	movq	%r11, (%rsp)
	movq	80(%rsp), %r15
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L89
	pushq	%rax
	.cfi_def_cfa_offset 88
	movq	8(%rsp), %r11
	movl	(%r11), %eax
	pushq	%rax
	.cfi_def_cfa_offset 96
	movq	24(%rsp), %r10
	movq	(%r14), %rcx
	movq	0(%r13), %rdx
	movl	(%r10), %r9d
	movq	(%r15), %r8
	movq	(%r12), %rsi
	movq	0(%rbp), %rdi
	call	*%rbx
	popq	%rdx
	.cfi_def_cfa_offset 88
	popq	%rcx
	.cfi_def_cfa_offset 80
.L89:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE13465:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	.section	.text._ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_yiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_S7_S7_yiiSB_EEE9cudaErrorT_DpRKT0_.isra.0,"axG",@progbits,_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,comdat
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_yiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_S7_S7_yiiSB_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_yiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_S7_S7_yiiSB_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB13466:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r9, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	12(%rdi), %rdx
	movl	20(%rdi), %ecx
	movq	88(%rsp), %r10
	movq	96(%rsp), %r11
	movq	(%rdi), %rdi
	movl	8(%rax), %esi
	movq	32(%rax), %r9
	movq	24(%rax), %r8
	movq	%r10, 8(%rsp)
	movq	%r11, (%rsp)
	movq	80(%rsp), %r15
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L92
	pushq	%rax
	.cfi_def_cfa_offset 88
	movq	8(%rsp), %r11
	movl	(%r11), %eax
	pushq	%rax
	.cfi_def_cfa_offset 96
	movq	24(%rsp), %r10
	movq	(%r14), %rcx
	movq	0(%r13), %rdx
	movl	(%r10), %r9d
	movq	(%r15), %r8
	movq	(%r12), %rsi
	movq	0(%rbp), %rdi
	call	*%rbx
	popq	%rdx
	.cfi_def_cfa_offset 88
	popq	%rcx
	.cfi_def_cfa_offset 80
.L92:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE13466:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_yiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_S7_S7_yiiSB_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_yiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_S7_S7_yiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	.section	.text._ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0,"axG",@progbits,_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,comdat
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB13467:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %rax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r9, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	12(%rdi), %rdx
	movl	20(%rdi), %ecx
	movq	88(%rsp), %r10
	movq	96(%rsp), %r11
	movq	(%rdi), %rdi
	movl	8(%rax), %esi
	movq	32(%rax), %r9
	movq	24(%rax), %r8
	movq	%r10, 8(%rsp)
	movq	%r11, (%rsp)
	movq	80(%rsp), %r15
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L95
	pushq	%rax
	.cfi_def_cfa_offset 88
	movq	8(%rsp), %r11
	movl	(%r11), %eax
	pushq	%rax
	.cfi_def_cfa_offset 96
	movq	24(%rsp), %r10
	movq	(%r14), %rcx
	movq	0(%r13), %rdx
	movl	(%r10), %r9d
	movq	(%r15), %r8
	movq	(%r12), %rsi
	movq	0(%rbp), %rdi
	call	*%rbx
	popq	%rdx
	.cfi_def_cfa_offset 88
	popq	%rcx
	.cfi_def_cfa_offset 80
.L95:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE13467:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	.text
	.type	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function
_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0:
.LFB13468:
	.cfi_startproc
	jmp	cudaLaunchKernel@PLT
	.cfi_endproc
.LFE13468:
	.size	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	.section	.text._ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,"axG",@progbits,_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,comdat
	.weak	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.hidden	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.type	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, @function
_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv:
.LFB12271:
	.cfi_startproc
	endbr64
	subq	$72, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	movabsq	$4294967297, %rax
	leaq	16(%rsp), %rcx
	leaq	8(%rsp), %rdx
	movl	$1, 32(%rsp)
	leaq	36(%rsp), %rsi
	leaq	24(%rsp), %rdi
	movl	$1, 44(%rsp)
	movq	%rax, 24(%rsp)
	movq	%rax, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L98
	pushq	16(%rsp)
	.cfi_def_cfa_offset 88
	leaq	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rdi
	pushq	16(%rsp)
	.cfi_def_cfa_offset 96
	movq	52(%rsp), %rcx
	movl	60(%rsp), %r8d
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	leaq	64(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 88
	popq	%rdx
	.cfi_def_cfa_offset 80
.L98:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L100
	call	__stack_chk_fail@PLT
.L100:
	addq	$72, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12271:
	.size	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, .-_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.section	.text._ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_
	.hidden	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_
	.type	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_, @function
_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_:
.LFB12375:
	.cfi_startproc
	endbr64
	subq	$248, %rsp
	.cfi_def_cfa_offset 256
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	movq	256(%rsp), %rax
	movq	%rdi, 32(%rsp)
	leaq	112(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	124(%rsp), %rsi
	movq	%rax, 80(%rsp)
	movq	264(%rsp), %rax
	movq	%rdx, 48(%rsp)
	leaq	96(%rsp), %rdx
	movq	%rax, 88(%rsp)
	movl	272(%rsp), %eax
	movq	%rcx, 56(%rsp)
	leaq	104(%rsp), %rcx
	movl	%eax, 20(%rsp)
	movl	280(%rsp), %eax
	movq	%r8, 64(%rsp)
	movl	%eax, 24(%rsp)
	movl	288(%rsp), %eax
	movq	%r9, 72(%rsp)
	movl	%eax, 28(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	15(%rsp), %rax
	movq	%rax, 224(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 112(%rsp)
	movl	$1, 120(%rsp)
	movq	%rax, 124(%rsp)
	movl	$1, 132(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L102
	pushq	104(%rsp)
	.cfi_def_cfa_offset 264
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rdi
	pushq	104(%rsp)
	.cfi_def_cfa_offset 272
	movq	140(%rsp), %rcx
	movl	148(%rsp), %r8d
	movq	128(%rsp), %rsi
	movl	136(%rsp), %edx
	leaq	152(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 264
	popq	%rdx
	.cfi_def_cfa_offset 256
.L102:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L104
	call	__stack_chk_fail@PLT
.L104:
	addq	$248, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12375:
	.size	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_, .-_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_
	.section	.text._ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_
	.hidden	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_
	.type	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_, @function
_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_:
.LFB12374:
	.cfi_startproc
	endbr64
	subq	$72, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rax
	movq	%rdi, (%rsp)
	leaq	16(%rsp), %rcx
	movq	%rax, 48(%rsp)
	leaq	8(%rsp), %rdx
	leaq	36(%rsp), %rsi
	movabsq	$4294967297, %rax
	leaq	24(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	$1, 32(%rsp)
	movq	%rax, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L106
	pushq	16(%rsp)
	.cfi_def_cfa_offset 88
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_(%rip), %rdi
	pushq	16(%rsp)
	.cfi_def_cfa_offset 96
	movq	52(%rsp), %rcx
	movl	60(%rsp), %r8d
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	leaq	64(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 88
	popq	%rdx
	.cfi_def_cfa_offset 80
.L106:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L108
	call	__stack_chk_fail@PLT
.L108:
	addq	$72, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12374:
	.size	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_, .-_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_
	.section	.text._ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_
	.hidden	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_
	.type	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_, @function
_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_:
.LFB12373:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movq	%rdi, 24(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	15(%rsp), %rax
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movl	%r8d, 20(%rsp)
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L110
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L110:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L112
	call	__stack_chk_fail@PLT
.L112:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12373:
	.size	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_, .-_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_
	.section	.text._ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.hidden	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.type	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_, @function
_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_:
.LFB12372:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	movl	224(%rsp), %eax
	movq	%rdi, 32(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	108(%rsp), %rsi
	movl	%eax, 24(%rsp)
	movl	232(%rsp), %eax
	movq	%rdx, 48(%rsp)
	leaq	80(%rsp), %rdx
	movl	%eax, 28(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	15(%rsp), %rax
	movq	%rcx, 56(%rsp)
	leaq	88(%rsp), %rcx
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 64(%rsp)
	movq	%r9, 72(%rsp)
	movq	%rax, 96(%rsp)
	movl	$1, 104(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L114
	pushq	88(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 240
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	136(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L114:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L116
	call	__stack_chk_fail@PLT
.L116:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12372:
	.size	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_, .-_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.section	.text._ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.hidden	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.type	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_, @function
_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_:
.LFB12371:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	movl	224(%rsp), %eax
	movq	%rdi, 32(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	108(%rsp), %rsi
	movl	%eax, 24(%rsp)
	movl	232(%rsp), %eax
	movq	%rdx, 48(%rsp)
	leaq	80(%rsp), %rdx
	movl	%eax, 28(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	15(%rsp), %rax
	movq	%rcx, 56(%rsp)
	leaq	88(%rsp), %rcx
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 64(%rsp)
	movq	%r9, 72(%rsp)
	movq	%rax, 96(%rsp)
	movl	$1, 104(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L118
	pushq	88(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 240
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	136(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L118:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L120
	call	__stack_chk_fail@PLT
.L120:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12371:
	.size	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_, .-_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.section	.text._ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_i,"axG",@progbits,_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_i,comdat
	.weak	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_i
	.hidden	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_i
	.type	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_i, @function
_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_i:
.LFB12370:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	%esi, 4(%rsp)
	leaq	24(%rsp), %rcx
	movq	%rax, 56(%rsp)
	leaq	4(%rsp), %rax
	leaq	16(%rsp), %rdx
	movq	%rdi, 8(%rsp)
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movl	$1, 40(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L122
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_i(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L122:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L124
	call	__stack_chk_fail@PLT
.L124:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12370:
	.size	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_i, .-_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_i
	.section	.text._ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.hidden	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.type	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_, @function
_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_:
.LFB12369:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rax
	movq	%rdi, 32(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	15(%rsp), %rax
	movq	%rsi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 48(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movl	%r8d, 28(%rsp)
	movq	%rax, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L126
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L126:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L128
	call	__stack_chk_fail@PLT
.L128:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12369:
	.size	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_, .-_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.section	.text._ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.hidden	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.type	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_, @function
_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_:
.LFB12368:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rax
	movq	%rdi, 32(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	15(%rsp), %rax
	movq	%rsi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 48(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movl	%r8d, 28(%rsp)
	movq	%rax, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L130
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L130:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L132
	call	__stack_chk_fail@PLT
.L132:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12368:
	.size	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_, .-_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.section	.text._ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_
	.hidden	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_
	.type	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_, @function
_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_:
.LFB12367:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	movl	192(%rsp), %eax
	movq	%rdi, 24(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	92(%rsp), %rsi
	movl	%eax, 20(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	15(%rsp), %rax
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 48(%rsp)
	leaq	72(%rsp), %rcx
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 56(%rsp)
	movl	%r9d, 16(%rsp)
	movq	%rax, 80(%rsp)
	movl	$1, 88(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L134
	pushq	72(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 208
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L134:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L136
	call	__stack_chk_fail@PLT
.L136:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12367:
	.size	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_, .-_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_
	.section	.text._ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_
	.hidden	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_
	.type	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_, @function
_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_:
.LFB12366:
	.cfi_startproc
	endbr64
	subq	$248, %rsp
	.cfi_def_cfa_offset 256
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	movq	256(%rsp), %rax
	movq	%rdi, 32(%rsp)
	leaq	112(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	124(%rsp), %rsi
	movq	%rax, 80(%rsp)
	movq	264(%rsp), %rax
	movq	%rdx, 48(%rsp)
	leaq	96(%rsp), %rdx
	movq	%rax, 88(%rsp)
	movl	272(%rsp), %eax
	movq	%rcx, 56(%rsp)
	leaq	104(%rsp), %rcx
	movl	%eax, 20(%rsp)
	movl	280(%rsp), %eax
	movq	%r8, 64(%rsp)
	movl	%eax, 24(%rsp)
	movl	288(%rsp), %eax
	movq	%r9, 72(%rsp)
	movl	%eax, 28(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	15(%rsp), %rax
	movq	%rax, 224(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 112(%rsp)
	movl	$1, 120(%rsp)
	movq	%rax, 124(%rsp)
	movl	$1, 132(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L138
	pushq	104(%rsp)
	.cfi_def_cfa_offset 264
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rdi
	pushq	104(%rsp)
	.cfi_def_cfa_offset 272
	movq	140(%rsp), %rcx
	movl	148(%rsp), %r8d
	movq	128(%rsp), %rsi
	movl	136(%rsp), %edx
	leaq	152(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 264
	popq	%rdx
	.cfi_def_cfa_offset 256
.L138:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L140
	call	__stack_chk_fail@PLT
.L140:
	addq	$248, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12366:
	.size	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_, .-_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_
	.section	.text._ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_
	.hidden	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_
	.type	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_, @function
_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_:
.LFB12365:
	.cfi_startproc
	endbr64
	subq	$72, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rax
	movq	%rdi, (%rsp)
	leaq	16(%rsp), %rcx
	movq	%rax, 48(%rsp)
	leaq	8(%rsp), %rdx
	leaq	36(%rsp), %rsi
	movabsq	$4294967297, %rax
	leaq	24(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	$1, 32(%rsp)
	movq	%rax, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L142
	pushq	16(%rsp)
	.cfi_def_cfa_offset 88
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_(%rip), %rdi
	pushq	16(%rsp)
	.cfi_def_cfa_offset 96
	movq	52(%rsp), %rcx
	movl	60(%rsp), %r8d
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	leaq	64(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 88
	popq	%rdx
	.cfi_def_cfa_offset 80
.L142:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L144
	call	__stack_chk_fail@PLT
.L144:
	addq	$72, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12365:
	.size	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_, .-_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_
	.section	.text._ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_
	.hidden	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_
	.type	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_, @function
_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_:
.LFB12364:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movq	%rdi, 24(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	15(%rsp), %rax
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movl	%r8d, 20(%rsp)
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L146
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L146:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L148
	call	__stack_chk_fail@PLT
.L148:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12364:
	.size	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_, .-_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_
	.section	.text._ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.hidden	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.type	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_, @function
_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_:
.LFB12363:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	movl	224(%rsp), %eax
	movq	%rdi, 32(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	108(%rsp), %rsi
	movl	%eax, 24(%rsp)
	movl	232(%rsp), %eax
	movq	%rdx, 48(%rsp)
	leaq	80(%rsp), %rdx
	movl	%eax, 28(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	15(%rsp), %rax
	movq	%rcx, 56(%rsp)
	leaq	88(%rsp), %rcx
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 64(%rsp)
	movq	%r9, 72(%rsp)
	movq	%rax, 96(%rsp)
	movl	$1, 104(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L150
	pushq	88(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 240
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	136(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L150:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L152
	call	__stack_chk_fail@PLT
.L152:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12363:
	.size	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_, .-_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.section	.text._ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.hidden	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.type	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_, @function
_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_:
.LFB12362:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	movl	224(%rsp), %eax
	movq	%rdi, 32(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	108(%rsp), %rsi
	movl	%eax, 24(%rsp)
	movl	232(%rsp), %eax
	movq	%rdx, 48(%rsp)
	leaq	80(%rsp), %rdx
	movl	%eax, 28(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	15(%rsp), %rax
	movq	%rcx, 56(%rsp)
	leaq	88(%rsp), %rcx
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 64(%rsp)
	movq	%r9, 72(%rsp)
	movq	%rax, 96(%rsp)
	movl	$1, 104(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L154
	pushq	88(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 240
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	136(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L154:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L156
	call	__stack_chk_fail@PLT
.L156:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12362:
	.size	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_, .-_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.section	.text._ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_i,"axG",@progbits,_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_i,comdat
	.weak	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_i
	.hidden	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_i
	.type	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_i, @function
_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_i:
.LFB12361:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	%esi, 4(%rsp)
	leaq	24(%rsp), %rcx
	movq	%rax, 56(%rsp)
	leaq	4(%rsp), %rax
	leaq	16(%rsp), %rdx
	movq	%rdi, 8(%rsp)
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movl	$1, 40(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L158
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_i(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L158:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L160
	call	__stack_chk_fail@PLT
.L160:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12361:
	.size	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_i, .-_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_i
	.section	.text._ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.hidden	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.type	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_, @function
_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_:
.LFB12360:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rax
	movq	%rdi, 32(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	15(%rsp), %rax
	movq	%rsi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 48(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movl	%r8d, 28(%rsp)
	movq	%rax, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L162
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L162:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L164
	call	__stack_chk_fail@PLT
.L164:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12360:
	.size	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_, .-_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.section	.text._ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.hidden	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.type	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_, @function
_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_:
.LFB12359:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rax
	movq	%rdi, 32(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	15(%rsp), %rax
	movq	%rsi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 48(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movl	%r8d, 28(%rsp)
	movq	%rax, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L166
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L166:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L168
	call	__stack_chk_fail@PLT
.L168:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12359:
	.size	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_, .-_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.section	.text._ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_
	.hidden	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_
	.type	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_, @function
_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_:
.LFB12358:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	movl	192(%rsp), %eax
	movq	%rdi, 24(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	92(%rsp), %rsi
	movl	%eax, 20(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	15(%rsp), %rax
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 48(%rsp)
	leaq	72(%rsp), %rcx
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 56(%rsp)
	movl	%r9d, 16(%rsp)
	movq	%rax, 80(%rsp)
	movl	$1, 88(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L170
	pushq	72(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 208
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L170:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L172
	call	__stack_chk_fail@PLT
.L172:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12358:
	.size	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_, .-_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_
	.section	.text._ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_
	.hidden	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_
	.type	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_, @function
_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_:
.LFB12357:
	.cfi_startproc
	endbr64
	subq	$248, %rsp
	.cfi_def_cfa_offset 256
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	movq	256(%rsp), %rax
	movq	%rdi, 32(%rsp)
	leaq	112(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	124(%rsp), %rsi
	movq	%rax, 80(%rsp)
	movq	264(%rsp), %rax
	movq	%rdx, 48(%rsp)
	leaq	96(%rsp), %rdx
	movq	%rax, 88(%rsp)
	movl	272(%rsp), %eax
	movq	%rcx, 56(%rsp)
	leaq	104(%rsp), %rcx
	movl	%eax, 20(%rsp)
	movl	280(%rsp), %eax
	movq	%r8, 64(%rsp)
	movl	%eax, 24(%rsp)
	movl	288(%rsp), %eax
	movq	%r9, 72(%rsp)
	movl	%eax, 28(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	15(%rsp), %rax
	movq	%rax, 224(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 112(%rsp)
	movl	$1, 120(%rsp)
	movq	%rax, 124(%rsp)
	movl	$1, 132(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L174
	pushq	104(%rsp)
	.cfi_def_cfa_offset 264
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rdi
	pushq	104(%rsp)
	.cfi_def_cfa_offset 272
	movq	140(%rsp), %rcx
	movl	148(%rsp), %r8d
	movq	128(%rsp), %rsi
	movl	136(%rsp), %edx
	leaq	152(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 264
	popq	%rdx
	.cfi_def_cfa_offset 256
.L174:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L176
	call	__stack_chk_fail@PLT
.L176:
	addq	$248, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12357:
	.size	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_, .-_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_
	.section	.text._ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_
	.hidden	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_
	.type	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_, @function
_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_:
.LFB12356:
	.cfi_startproc
	endbr64
	subq	$72, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rax
	movq	%rdi, (%rsp)
	leaq	16(%rsp), %rcx
	movq	%rax, 48(%rsp)
	leaq	8(%rsp), %rdx
	leaq	36(%rsp), %rsi
	movabsq	$4294967297, %rax
	leaq	24(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	$1, 32(%rsp)
	movq	%rax, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L178
	pushq	16(%rsp)
	.cfi_def_cfa_offset 88
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_(%rip), %rdi
	pushq	16(%rsp)
	.cfi_def_cfa_offset 96
	movq	52(%rsp), %rcx
	movl	60(%rsp), %r8d
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	leaq	64(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 88
	popq	%rdx
	.cfi_def_cfa_offset 80
.L178:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L180
	call	__stack_chk_fail@PLT
.L180:
	addq	$72, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12356:
	.size	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_, .-_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_
	.section	.text._ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_
	.hidden	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_
	.type	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_, @function
_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_:
.LFB12355:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movq	%rdi, 24(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	15(%rsp), %rax
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movl	%r8d, 20(%rsp)
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L182
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L182:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L184
	call	__stack_chk_fail@PLT
.L184:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12355:
	.size	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_, .-_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_
	.section	.text._ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.hidden	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.type	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_, @function
_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_:
.LFB12354:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	movl	224(%rsp), %eax
	movq	%rdi, 32(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	108(%rsp), %rsi
	movl	%eax, 24(%rsp)
	movl	232(%rsp), %eax
	movq	%rdx, 48(%rsp)
	leaq	80(%rsp), %rdx
	movl	%eax, 28(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	15(%rsp), %rax
	movq	%rcx, 56(%rsp)
	leaq	88(%rsp), %rcx
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 64(%rsp)
	movq	%r9, 72(%rsp)
	movq	%rax, 96(%rsp)
	movl	$1, 104(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L186
	pushq	88(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 240
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	136(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L186:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L188
	call	__stack_chk_fail@PLT
.L188:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12354:
	.size	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_, .-_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.section	.text._ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.hidden	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.type	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_, @function
_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_:
.LFB12353:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	movl	224(%rsp), %eax
	movq	%rdi, 32(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	108(%rsp), %rsi
	movl	%eax, 24(%rsp)
	movl	232(%rsp), %eax
	movq	%rdx, 48(%rsp)
	leaq	80(%rsp), %rdx
	movl	%eax, 28(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	15(%rsp), %rax
	movq	%rcx, 56(%rsp)
	leaq	88(%rsp), %rcx
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 64(%rsp)
	movq	%r9, 72(%rsp)
	movq	%rax, 96(%rsp)
	movl	$1, 104(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L190
	pushq	88(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 240
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	136(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L190:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L192
	call	__stack_chk_fail@PLT
.L192:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12353:
	.size	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_, .-_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_
	.section	.text._ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_i,"axG",@progbits,_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_i,comdat
	.weak	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_i
	.hidden	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_i
	.type	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_i, @function
_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_i:
.LFB12352:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	%esi, 4(%rsp)
	leaq	24(%rsp), %rcx
	movq	%rax, 56(%rsp)
	leaq	4(%rsp), %rax
	leaq	16(%rsp), %rdx
	movq	%rdi, 8(%rsp)
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movl	$1, 40(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L194
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_i(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L194:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L196
	call	__stack_chk_fail@PLT
.L196:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12352:
	.size	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_i, .-_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_i
	.section	.text._ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.hidden	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.type	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_, @function
_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_:
.LFB12351:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rax
	movq	%rdi, 32(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	15(%rsp), %rax
	movq	%rsi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 48(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movl	%r8d, 28(%rsp)
	movq	%rax, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L198
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L198:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L200
	call	__stack_chk_fail@PLT
.L200:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12351:
	.size	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_, .-_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.section	.text._ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.hidden	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.type	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_, @function
_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_:
.LFB12350:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rax
	movq	%rdi, 32(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	15(%rsp), %rax
	movq	%rsi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 48(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movl	%r8d, 28(%rsp)
	movq	%rax, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L202
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L202:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L204
	call	__stack_chk_fail@PLT
.L204:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12350:
	.size	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_, .-_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_
	.section	.text._ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_
	.hidden	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_
	.type	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_, @function
_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_:
.LFB12348:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	movl	192(%rsp), %eax
	movq	%rdi, 24(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	92(%rsp), %rsi
	movl	%eax, 20(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	15(%rsp), %rax
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 48(%rsp)
	leaq	72(%rsp), %rcx
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%r8, 56(%rsp)
	movl	%r9d, 16(%rsp)
	movq	%rax, 80(%rsp)
	movl	$1, 88(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L206
	pushq	72(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 208
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L206:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L208
	call	__stack_chk_fail@PLT
.L208:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12348:
	.size	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_, .-_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv.str1.1,"aMS",@progbits,1
.LC4:
	.string	": "
.LC5:
	.string	"basic_string::append"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv
	.type	_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv, @function
_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv:
.LFB8334:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA8334
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	cmpq	$0, 40(%rdi)
	jne	.L212
	call	_ZNKSt13runtime_error4whatEv@PLT
	leaq	32(%rbx), %r13
	movq	%rax, %rdi
	movq	%rax, %rbp
	call	strlen@PLT
	movq	40(%rbx), %rdx
	movq	%rbp, %rcx
	xorl	%esi, %esi
	movq	%rax, %r8
	movq	%r13, %rdi
.LEHB0:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@PLT
	cmpl	$0, 16(%rbx)
	je	.L212
	cmpq	$0, 40(%rbx)
	jne	.L214
.L216:
	movq	24(%rbx), %rsi
	leaq	8(%rsp), %r12
	movl	16(%rbx), %edx
	movq	%r12, %rdi
	movq	(%rsi), %rax
	call	*48(%rax)
	jmp	.L228
.L214:
	leaq	.LC4(%rip), %rsi
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT
.LEHE0:
	jmp	.L216
.L228:
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movabsq	$4611686018427387903, %rax
	subq	40(%rbx), %rax
	cmpq	%rdx, %rax
	jnb	.L217
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L227
	leaq	.LC5(%rip), %rdi
.LEHB1:
	call	_ZSt20__throw_length_errorPKc@PLT
.L217:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_appendEPKcm@PLT
.LEHE1:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
.L212:
	movq	32(%rbx), %rbx
	jmp	.L210
.L224:
	endbr64
	movq	%rax, %rbp
.L219:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbp, %rdi
	jmp	.L220
.L223:
	endbr64
	movq	%rax, %rdi
.L220:
	call	__cxa_begin_catch@PLT
	movq	%rbx, %rdi
	call	_ZNKSt13runtime_error4whatEv@PLT
	movq	%rax, %rbx
	call	__cxa_end_catch@PLT
.L210:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L222
.L227:
	call	__stack_chk_fail@PLT
.L222:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8334:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,comdat
	.align 4
.LLSDA8334:
	.byte	0xff
	.byte	0x9b
	.uleb128 .LLSDATT8334-.LLSDATTD8334
.LLSDATTD8334:
	.byte	0x1
	.uleb128 .LLSDACSE8334-.LLSDACSB8334
.LLSDACSB8334:
	.uleb128 .LEHB0-.LFB8334
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L223-.LFB8334
	.uleb128 0x1
	.uleb128 .LEHB1-.LFB8334
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L224-.LFB8334
	.uleb128 0x3
.LLSDACSE8334:
	.byte	0x1
	.byte	0
	.byte	0
	.byte	0x7d
	.align 4
	.long	0

.LLSDATT8334:
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,comdat
	.size	_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv, .-_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv
	.section	.rodata._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc.str1.1,"aMS",@progbits,1
.LC6:
	.string	"cudaError %d: %s"
	.section	.text.unlikely._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,"axG",@progbits,_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,comdat
	.weak	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc
	.hidden	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc
	.type	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc, @function
_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc:
.LFB6688:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA6688
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$288, %rsp
	.cfi_def_cfa_offset 320
	movl	%edi, 12(%rsp)
	movl	$16, %edi
	leaq	24(%rsp), %r12
	movq	%fs:40, %rax
	movq	%rax, 280(%rsp)
	xorl	%eax, %eax
	call	__cxa_allocate_exception@PLT
	leaq	24(%rsp), %rdi
	movl	$64, %ecx
	leaq	.LC6(%rip), %r8
	movq	%rax, %rbx
	xorl	%eax, %eax
	movl	$256, %esi
	rep stosl
	pushq	%rdx
	.cfi_def_cfa_offset 328
	movl	$256, %ecx
	movl	$2, %edx
	pushq	%rbp
	.cfi_def_cfa_offset 336
	movl	28(%rsp), %r9d
	movq	%r12, %rdi
	call	__snprintf_chk@PLT
	popq	%rcx
	.cfi_def_cfa_offset 328
	movq	%rbx, %rdi
	popq	%rsi
	.cfi_def_cfa_offset 320
	movq	%r12, %rsi
	call	_ZNSt13runtime_errorC2EPKc@PLT
	leaq	16+_ZTVN4cuda3__410cuda_errorE(%rip), %rax
	movq	%rax, (%rbx)
	movq	280(%rsp), %rax
	subq	%fs:40, %rax
	je	.L230
	call	__stack_chk_fail@PLT
.L230:
	leaq	_ZN4cuda3__410cuda_errorD1Ev(%rip), %rdx
	leaq	_ZTIN4cuda3__410cuda_errorE(%rip), %rsi
	movq	%rbx, %rdi
.LEHB2:
	call	__cxa_throw@PLT
.LEHE2:
	.cfi_endproc
.LFE6688:
	.section	.gcc_except_table._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,"aG",@progbits,_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,comdat
.LLSDA6688:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE6688-.LLSDACSB6688
.LLSDACSB6688:
	.uleb128 .LEHB2-.LFB6688
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE6688:
	.section	.text.unlikely._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,"axG",@progbits,_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,comdat
	.size	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc, .-_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc
	.section	.rodata._ZN4cuda3__423__ensure_current_deviceD2Ev.str1.1,"aMS",@progbits,1
.LC7:
	.string	"Failed to set device"
	.section	.text._ZN4cuda3__423__ensure_current_deviceD2Ev,"axG",@progbits,_ZN4cuda3__423__ensure_current_deviceD5Ev,comdat
	.align 2
	.weak	_ZN4cuda3__423__ensure_current_deviceD2Ev
	.type	_ZN4cuda3__423__ensure_current_deviceD2Ev, @function
_ZN4cuda3__423__ensure_current_deviceD2Ev:
.LFB6697:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA6697
	endbr64
	movl	4(%rdi), %eax
	cmpl	(%rdi), %eax
	je	.L239
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%eax, %edi
	call	cudaSetDevice@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L233
	call	cudaGetLastError@PLT
	leaq	.LC7(%rip), %rsi
	movl	%ebx, %edi
	call	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc
.L233:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
.L239:
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE6697:
	.section	.gcc_except_table._ZN4cuda3__423__ensure_current_deviceD2Ev,"aG",@progbits,_ZN4cuda3__423__ensure_current_deviceD5Ev,comdat
.LLSDA6697:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE6697-.LLSDACSB6697
.LLSDACSB6697:
.LLSDACSE6697:
	.section	.text._ZN4cuda3__423__ensure_current_deviceD2Ev,"axG",@progbits,_ZN4cuda3__423__ensure_current_deviceD5Ev,comdat
	.size	_ZN4cuda3__423__ensure_current_deviceD2Ev, .-_ZN4cuda3__423__ensure_current_deviceD2Ev
	.weak	_ZN4cuda3__423__ensure_current_deviceD1Ev
	.set	_ZN4cuda3__423__ensure_current_deviceD1Ev,_ZN4cuda3__423__ensure_current_deviceD2Ev
	.section	.text._ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st,"axG",@progbits,_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st,comdat
	.weak	_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st
	.type	_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st, @function
_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st:
.LFB6934:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	call	cudaStreamSynchronize@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L245
	testl	%eax, %eax
	jne	.L242
.L245:
	movl	%ebx, %eax
.L242:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6934:
	.size	_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st, .-_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv
	.type	_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv, @function
_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv:
.LFB8245:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leaq	_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip), %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 32
	movb	_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip), %al
	testb	%al, %al
	jne	.L252
	leaq	_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L252
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE(%rip), %rax
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev(%rip), %rdi
	movq	%rbx, %rsi
	leaq	__dso_handle(%rip), %rdx
	movq	%rax, _ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip)
	call	__cxa_atexit@PLT
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L252:
	movq	%rbx, %rax
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8245:
	.size	_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv, .-_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei:
.LFB8243:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	call	_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv
	movl	12(%rsp), %edx
	movq	%rbx, %rdi
	movq	%rax, %rsi
	movq	(%rax), %rax
	call	*48(%rax)
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L259
	call	__stack_chk_fail@PLT
.L259:
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8243:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv
	.type	_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv, @function
_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv:
.LFB8250:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leaq	_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip), %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 32
	movb	_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip), %al
	testb	%al, %al
	jne	.L263
	leaq	_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L263
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE(%rip), %rax
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev(%rip), %rdi
	movq	%rbx, %rsi
	leaq	__dso_handle(%rip), %rdx
	movq	%rax, _ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip)
	call	__cxa_atexit@PLT
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L263:
	movq	%rbx, %rax
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8250:
	.size	_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv, .-_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE
	.type	_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE, @function
_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE:
.LFB8295:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%edi, %ebx
	call	_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv
	movq	%rax, %rdx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8295:
	.size	_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE, .-_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi:
.LFB8244:
	.cfi_startproc
	endbr64
	leal	-9901(%rsi), %eax
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%esi, %ebx
	cmpl	$78, %eax
	ja	.L272
	leaq	.L274(%rip), %rdx
	movslq	(%rdx,%rax,4), %rax
	addq	%rdx, %rax
	notrack jmp	*%rax
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,comdat
	.align 4
	.align 4
.L274:
	.long	.L351-.L274
	.long	.L350-.L274
	.long	.L349-.L274
	.long	.L348-.L274
	.long	.L347-.L274
	.long	.L346-.L274
	.long	.L345-.L274
	.long	.L344-.L274
	.long	.L343-.L274
	.long	.L342-.L274
	.long	.L341-.L274
	.long	.L340-.L274
	.long	.L339-.L274
	.long	.L338-.L274
	.long	.L337-.L274
	.long	.L336-.L274
	.long	.L335-.L274
	.long	.L334-.L274
	.long	.L333-.L274
	.long	.L332-.L274
	.long	.L331-.L274
	.long	.L330-.L274
	.long	.L329-.L274
	.long	.L328-.L274
	.long	.L327-.L274
	.long	.L326-.L274
	.long	.L325-.L274
	.long	.L324-.L274
	.long	.L323-.L274
	.long	.L322-.L274
	.long	.L321-.L274
	.long	.L320-.L274
	.long	.L319-.L274
	.long	.L318-.L274
	.long	.L317-.L274
	.long	.L316-.L274
	.long	.L272-.L274
	.long	.L315-.L274
	.long	.L314-.L274
	.long	.L313-.L274
	.long	.L312-.L274
	.long	.L311-.L274
	.long	.L310-.L274
	.long	.L309-.L274
	.long	.L308-.L274
	.long	.L307-.L274
	.long	.L306-.L274
	.long	.L305-.L274
	.long	.L304-.L274
	.long	.L303-.L274
	.long	.L302-.L274
	.long	.L301-.L274
	.long	.L300-.L274
	.long	.L299-.L274
	.long	.L298-.L274
	.long	.L297-.L274
	.long	.L296-.L274
	.long	.L295-.L274
	.long	.L294-.L274
	.long	.L293-.L274
	.long	.L292-.L274
	.long	.L291-.L274
	.long	.L290-.L274
	.long	.L289-.L274
	.long	.L288-.L274
	.long	.L287-.L274
	.long	.L286-.L274
	.long	.L285-.L274
	.long	.L284-.L274
	.long	.L283-.L274
	.long	.L282-.L274
	.long	.L281-.L274
	.long	.L280-.L274
	.long	.L279-.L274
	.long	.L278-.L274
	.long	.L277-.L274
	.long	.L276-.L274
	.long	.L275-.L274
	.long	.L273-.L274
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,comdat
.L351:
	movl	$9901, %edi
	jmp	.L353
.L350:
	movl	$9902, %edi
	jmp	.L353
.L349:
	movl	$9903, %edi
	jmp	.L353
.L348:
	movl	$9904, %edi
	jmp	.L353
.L307:
	movl	$9946, %edi
	jmp	.L353
.L306:
	movl	$9947, %edi
	jmp	.L353
.L305:
	movl	$9948, %edi
	jmp	.L353
.L304:
	movl	$9949, %edi
	jmp	.L353
.L347:
	movl	$9905, %edi
	jmp	.L353
.L303:
	movl	$9950, %edi
	jmp	.L353
.L346:
	movl	$9906, %edi
	jmp	.L353
.L345:
	movl	$9907, %edi
	jmp	.L353
.L344:
	movl	$9908, %edi
	jmp	.L353
.L343:
	movl	$9909, %edi
	jmp	.L353
.L302:
	movl	$9951, %edi
	jmp	.L353
.L342:
	movl	$9910, %edi
	jmp	.L353
.L301:
	movl	$9952, %edi
	jmp	.L353
.L300:
	movl	$9953, %edi
	jmp	.L353
.L299:
	movl	$9954, %edi
	jmp	.L353
.L298:
	movl	$9955, %edi
	jmp	.L353
.L297:
	movl	$9956, %edi
	jmp	.L353
.L296:
	movl	$9957, %edi
	jmp	.L353
.L311:
	movl	$9942, %edi
	jmp	.L353
.L341:
	movl	$9911, %edi
	jmp	.L353
.L340:
	movl	$9912, %edi
	jmp	.L353
.L308:
	movl	$9945, %edi
	jmp	.L353
.L295:
	movl	$9958, %edi
	jmp	.L353
.L294:
	movl	$9959, %edi
	jmp	.L353
.L310:
	movl	$9943, %edi
	jmp	.L353
.L293:
	movl	$9960, %edi
	jmp	.L353
.L292:
	movl	$9961, %edi
	jmp	.L353
.L291:
	movl	$9962, %edi
	jmp	.L353
.L339:
	movl	$9913, %edi
	jmp	.L353
.L338:
	movl	$9914, %edi
	jmp	.L353
.L337:
	movl	$9915, %edi
	jmp	.L353
.L336:
	movl	$9916, %edi
	jmp	.L353
.L335:
	movl	$9917, %edi
	jmp	.L353
.L290:
	movl	$9963, %edi
	jmp	.L353
.L334:
	movl	$9918, %edi
	jmp	.L353
.L289:
	movl	$9964, %edi
	jmp	.L353
.L333:
	movl	$9919, %edi
	jmp	.L353
.L332:
	movl	$9920, %edi
	jmp	.L353
.L331:
	movl	$9921, %edi
	jmp	.L353
.L288:
	movl	$9965, %edi
	jmp	.L353
.L330:
	movl	$9922, %edi
	jmp	.L353
.L287:
	movl	$9966, %edi
	jmp	.L353
.L286:
	movl	$9967, %edi
	jmp	.L353
.L285:
	movl	$9968, %edi
	jmp	.L353
.L284:
	movl	$9969, %edi
	jmp	.L353
.L283:
	movl	$9970, %edi
	jmp	.L353
.L329:
	movl	$9923, %edi
	jmp	.L353
.L328:
	movl	$9924, %edi
	jmp	.L353
.L327:
	movl	$9925, %edi
	jmp	.L353
.L282:
	movl	$9971, %edi
	jmp	.L353
.L326:
	movl	$9926, %edi
	jmp	.L353
.L325:
	movl	$9927, %edi
	jmp	.L353
.L324:
	movl	$9928, %edi
	jmp	.L353
.L281:
	movl	$9972, %edi
	jmp	.L353
.L323:
	movl	$9929, %edi
	jmp	.L353
.L322:
	movl	$9930, %edi
	jmp	.L353
.L321:
	movl	$9931, %edi
	jmp	.L353
.L280:
	movl	$9973, %edi
	jmp	.L353
.L320:
	movl	$9932, %edi
	jmp	.L353
.L319:
	movl	$9933, %edi
	jmp	.L353
.L279:
	movl	$9974, %edi
	jmp	.L353
.L278:
	movl	$9975, %edi
	jmp	.L353
.L277:
	movl	$9976, %edi
	jmp	.L353
.L309:
	movl	$9944, %edi
	jmp	.L353
.L318:
	movl	$9934, %edi
	jmp	.L353
.L317:
	movl	$9935, %edi
	jmp	.L353
.L316:
	movl	$9936, %edi
	jmp	.L353
.L315:
	movl	$9938, %edi
	jmp	.L353
.L276:
	movl	$9977, %edi
	jmp	.L353
.L275:
	movl	$9978, %edi
	jmp	.L353
.L273:
	movl	$9979, %edi
	jmp	.L353
.L314:
	movl	$9939, %edi
	jmp	.L353
.L313:
	movl	$9940, %edi
	jmp	.L353
.L312:
	movl	$9941, %edi
.L353:
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE
.L272:
	.cfi_restore_state
	call	_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv
	movq	%rax, %rdx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8244:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv
	.type	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv, @function
_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv:
.LFB8305:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leaq	_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip), %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 32
	movb	_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip), %al
	testb	%al, %al
	jne	.L356
	leaq	_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L356
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE(%rip), %rax
	leaq	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev(%rip), %rdi
	movq	%rbx, %rsi
	leaq	__dso_handle(%rip), %rdx
	movq	%rax, _ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip)
	call	__cxa_atexit@PLT
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L356:
	movq	%rbx, %rax
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8305:
	.size	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv, .-_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi
	.type	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi, @function
_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi:
.LFB8304:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%esi, %ebx
	cmpl	$998, %esi
	jg	.L363
	call	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv
	movq	%rax, %rdx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	ret
.L363:
	.cfi_restore_state
	call	_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv
	movl	%ebx, %esi
	popq	%rbx
	.cfi_def_cfa_offset 8
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	24(%rax), %rax
	jmp	*%rax
	.cfi_endproc
.LFE8304:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi, .-_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi
	.section	.text._ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	.type	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc, @function
_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc:
.LFB8349:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA8349
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rcx
	.cfi_def_cfa_offset 48
.LEHB3:
	call	cudaGetLastError@PLT
.LEHE3:
	testl	%ebp, %ebp
	je	.L367
	movl	$64, %edi
	call	__cxa_allocate_exception@PLT
	movq	%rax, %rbx
	call	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv
	movq	%r13, %rsi
	movq	%rbx, %rdi
	movq	%rax, %r12
.LEHB4:
	call	_ZNSt13runtime_errorC2EPKc@PLT
.LEHE4:
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE(%rip), %rax
	xorl	%edx, %edx
	movl	%ebp, 16(%rbx)
	movq	%rbx, %rdi
	movq	%rax, (%rbx)
	leaq	48(%rbx), %rax
	leaq	_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE(%rip), %rsi
	movq	%rdx, 40(%rbx)
	leaq	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev(%rip), %rdx
	movq	%r12, 24(%rbx)
	movq	%rax, 32(%rbx)
	movb	$0, 48(%rbx)
.LEHB5:
	call	__cxa_throw@PLT
.L370:
	endbr64
	movq	%rax, %rbp
.L369:
	movq	%rbx, %rdi
	call	__cxa_free_exception@PLT
	movq	%rbp, %rdi
	call	_Unwind_Resume@PLT
.LEHE5:
.L367:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8349:
	.section	.gcc_except_table._ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,comdat
.LLSDA8349:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE8349-.LLSDACSB8349
.LLSDACSB8349:
	.uleb128 .LEHB3-.LFB8349
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB4-.LFB8349
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L370-.LFB8349
	.uleb128 0
	.uleb128 .LEHB5-.LFB8349
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
.LLSDACSE8349:
	.section	.text._ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc, .-_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC8:
	.string	"__copy:: D->D: failed"
	.text
	.type	_ZN6thrust20THRUST_200700_890_NS8cuda_cub6copy_nINS1_3tagEPjlS4_EET2_RNS1_16execution_policyIT_EET0_T1_S5_.isra.0, @function
_ZN6thrust20THRUST_200700_890_NS8cuda_cub6copy_nINS1_3tagEPjlS4_EET2_RNS1_16execution_policyIT_EET0_T1_S5_.isra.0:
.LFB13503:
	.cfi_startproc
	movq	%rdi, %rax
	movq	%rdx, %rdi
	leaq	0(,%rsi,4), %rdx
	testq	%rdx, %rdx
	jle	.L372
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rax, %rsi
	movl	$1, %r8d
	movl	$3, %ecx
	call	cudaMemcpyAsync@PLT
	movl	$1, %edi
	movl	%eax, %ebx
	call	_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st
	movl	%ebx, %edi
	leaq	.LC8(%rip), %rsi
	popq	%rbx
	.cfi_restore 3
	.cfi_def_cfa_offset 8
	jmp	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
.L372:
	ret
	.cfi_endproc
.LFE13503:
	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cub6copy_nINS1_3tagEPjlS4_EET2_RNS1_16execution_policyIT_EET0_T1_S5_.isra.0, .-_ZN6thrust20THRUST_200700_890_NS8cuda_cub6copy_nINS1_3tagEPjlS4_EET2_RNS1_16execution_policyIT_EET0_T1_S5_.isra.0
	.section	.text.nvtxSetInitFunctionsToNoops_v3,"axG",@progbits,nvtxSetInitFunctionsToNoops_v3,comdat
	.weak	nvtxSetInitFunctionsToNoops_v3
	.hidden	nvtxSetInitFunctionsToNoops_v3
	.type	nvtxSetInitFunctionsToNoops_v3, @function
nvtxSetInitFunctionsToNoops_v3:
.LFB8537:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	leaq	nvtxMarkEx_impl_init_v3(%rip), %rdx
	setne	%al
	cmpq	%rdx, 48+nvtxGlobals_v3(%rip)
	je	.L506
	testb	%al, %al
	je	.L378
.L506:
	xorl	%r10d, %r10d
	movq	%r10, 48+nvtxGlobals_v3(%rip)
.L378:
	leaq	nvtxMarkA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 56+nvtxGlobals_v3(%rip)
	je	.L507
	testb	%al, %al
	je	.L380
.L507:
	xorl	%r9d, %r9d
	movq	%r9, 56+nvtxGlobals_v3(%rip)
.L380:
	leaq	nvtxMarkW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 64+nvtxGlobals_v3(%rip)
	je	.L508
	testb	%al, %al
	je	.L382
.L508:
	xorl	%r8d, %r8d
	movq	%r8, 64+nvtxGlobals_v3(%rip)
.L382:
	leaq	nvtxRangeStartEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 72+nvtxGlobals_v3(%rip)
	je	.L509
	testb	%al, %al
	je	.L384
.L509:
	xorl	%edi, %edi
	movq	%rdi, 72+nvtxGlobals_v3(%rip)
.L384:
	leaq	nvtxRangeStartA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 80+nvtxGlobals_v3(%rip)
	je	.L510
	testb	%al, %al
	je	.L386
.L510:
	xorl	%esi, %esi
	movq	%rsi, 80+nvtxGlobals_v3(%rip)
.L386:
	leaq	nvtxRangeStartW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 88+nvtxGlobals_v3(%rip)
	je	.L511
	testb	%al, %al
	je	.L388
.L511:
	xorl	%ecx, %ecx
	movq	%rcx, 88+nvtxGlobals_v3(%rip)
.L388:
	leaq	nvtxRangeEnd_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 96+nvtxGlobals_v3(%rip)
	je	.L512
	testb	%al, %al
	je	.L390
.L512:
	xorl	%edx, %edx
	movq	%rdx, 96+nvtxGlobals_v3(%rip)
.L390:
	leaq	nvtxRangePushEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 104+nvtxGlobals_v3(%rip)
	je	.L513
	testb	%al, %al
	je	.L392
.L513:
	xorl	%r11d, %r11d
	movq	%r11, 104+nvtxGlobals_v3(%rip)
.L392:
	leaq	nvtxRangePushA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 112+nvtxGlobals_v3(%rip)
	je	.L514
	testb	%al, %al
	je	.L394
.L514:
	xorl	%r10d, %r10d
	movq	%r10, 112+nvtxGlobals_v3(%rip)
.L394:
	leaq	nvtxRangePushW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 120+nvtxGlobals_v3(%rip)
	je	.L515
	testb	%al, %al
	je	.L396
.L515:
	xorl	%r9d, %r9d
	movq	%r9, 120+nvtxGlobals_v3(%rip)
.L396:
	leaq	nvtxRangePop_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 128+nvtxGlobals_v3(%rip)
	je	.L516
	testb	%al, %al
	je	.L398
.L516:
	xorl	%r8d, %r8d
	movq	%r8, 128+nvtxGlobals_v3(%rip)
.L398:
	leaq	nvtxNameCategoryA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 136+nvtxGlobals_v3(%rip)
	je	.L517
	testb	%al, %al
	je	.L400
.L517:
	xorl	%edi, %edi
	movq	%rdi, 136+nvtxGlobals_v3(%rip)
.L400:
	leaq	nvtxNameCategoryW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 144+nvtxGlobals_v3(%rip)
	je	.L518
	testb	%al, %al
	je	.L402
.L518:
	xorl	%esi, %esi
	movq	%rsi, 144+nvtxGlobals_v3(%rip)
.L402:
	leaq	nvtxNameOsThreadA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 152+nvtxGlobals_v3(%rip)
	je	.L519
	testb	%al, %al
	je	.L404
.L519:
	xorl	%ecx, %ecx
	movq	%rcx, 152+nvtxGlobals_v3(%rip)
.L404:
	leaq	nvtxNameOsThreadW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 160+nvtxGlobals_v3(%rip)
	je	.L520
	testb	%al, %al
	je	.L406
.L520:
	xorl	%edx, %edx
	movq	%rdx, 160+nvtxGlobals_v3(%rip)
.L406:
	leaq	nvtxNameCuDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 168+nvtxGlobals_v3(%rip)
	je	.L521
	testb	%al, %al
	je	.L408
.L521:
	xorl	%r11d, %r11d
	movq	%r11, 168+nvtxGlobals_v3(%rip)
.L408:
	leaq	nvtxNameCuDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 176+nvtxGlobals_v3(%rip)
	je	.L522
	testb	%al, %al
	je	.L410
.L522:
	xorl	%r10d, %r10d
	movq	%r10, 176+nvtxGlobals_v3(%rip)
.L410:
	leaq	nvtxNameCuContextA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 184+nvtxGlobals_v3(%rip)
	je	.L523
	testb	%al, %al
	je	.L412
.L523:
	xorl	%r9d, %r9d
	movq	%r9, 184+nvtxGlobals_v3(%rip)
.L412:
	leaq	nvtxNameCuContextW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 192+nvtxGlobals_v3(%rip)
	je	.L524
	testb	%al, %al
	je	.L414
.L524:
	xorl	%r8d, %r8d
	movq	%r8, 192+nvtxGlobals_v3(%rip)
.L414:
	leaq	nvtxNameCuStreamA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 200+nvtxGlobals_v3(%rip)
	je	.L525
	testb	%al, %al
	je	.L416
.L525:
	xorl	%edi, %edi
	movq	%rdi, 200+nvtxGlobals_v3(%rip)
.L416:
	leaq	nvtxNameCuStreamW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 208+nvtxGlobals_v3(%rip)
	je	.L526
	testb	%al, %al
	je	.L418
.L526:
	xorl	%esi, %esi
	movq	%rsi, 208+nvtxGlobals_v3(%rip)
.L418:
	leaq	nvtxNameCuEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 216+nvtxGlobals_v3(%rip)
	je	.L527
	testb	%al, %al
	je	.L420
.L527:
	xorl	%ecx, %ecx
	movq	%rcx, 216+nvtxGlobals_v3(%rip)
.L420:
	leaq	nvtxNameCuEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 224+nvtxGlobals_v3(%rip)
	je	.L528
	testb	%al, %al
	je	.L422
.L528:
	xorl	%edx, %edx
	movq	%rdx, 224+nvtxGlobals_v3(%rip)
.L422:
	leaq	nvtxNameClDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 232+nvtxGlobals_v3(%rip)
	je	.L529
	testb	%al, %al
	je	.L424
.L529:
	xorl	%r11d, %r11d
	movq	%r11, 232+nvtxGlobals_v3(%rip)
.L424:
	leaq	nvtxNameClDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 240+nvtxGlobals_v3(%rip)
	je	.L530
	testb	%al, %al
	je	.L426
.L530:
	xorl	%r10d, %r10d
	movq	%r10, 240+nvtxGlobals_v3(%rip)
.L426:
	leaq	nvtxNameClContextA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 248+nvtxGlobals_v3(%rip)
	je	.L531
	testb	%al, %al
	je	.L428
.L531:
	xorl	%r9d, %r9d
	movq	%r9, 248+nvtxGlobals_v3(%rip)
.L428:
	leaq	nvtxNameClContextW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 256+nvtxGlobals_v3(%rip)
	je	.L532
	testb	%al, %al
	je	.L430
.L532:
	xorl	%r8d, %r8d
	movq	%r8, 256+nvtxGlobals_v3(%rip)
.L430:
	leaq	nvtxNameClCommandQueueA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 264+nvtxGlobals_v3(%rip)
	je	.L533
	testb	%al, %al
	je	.L432
.L533:
	xorl	%edi, %edi
	movq	%rdi, 264+nvtxGlobals_v3(%rip)
.L432:
	leaq	nvtxNameClCommandQueueW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 272+nvtxGlobals_v3(%rip)
	je	.L534
	testb	%al, %al
	je	.L434
.L534:
	xorl	%esi, %esi
	movq	%rsi, 272+nvtxGlobals_v3(%rip)
.L434:
	leaq	nvtxNameClMemObjectA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 280+nvtxGlobals_v3(%rip)
	je	.L535
	testb	%al, %al
	je	.L436
.L535:
	xorl	%ecx, %ecx
	movq	%rcx, 280+nvtxGlobals_v3(%rip)
.L436:
	leaq	nvtxNameClMemObjectW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 288+nvtxGlobals_v3(%rip)
	je	.L536
	testb	%al, %al
	je	.L438
.L536:
	xorl	%edx, %edx
	movq	%rdx, 288+nvtxGlobals_v3(%rip)
.L438:
	leaq	nvtxNameClSamplerA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 296+nvtxGlobals_v3(%rip)
	je	.L537
	testb	%al, %al
	je	.L440
.L537:
	xorl	%r11d, %r11d
	movq	%r11, 296+nvtxGlobals_v3(%rip)
.L440:
	leaq	nvtxNameClSamplerW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 304+nvtxGlobals_v3(%rip)
	je	.L538
	testb	%al, %al
	je	.L442
.L538:
	xorl	%r10d, %r10d
	movq	%r10, 304+nvtxGlobals_v3(%rip)
.L442:
	leaq	nvtxNameClProgramA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 312+nvtxGlobals_v3(%rip)
	je	.L539
	testb	%al, %al
	je	.L444
.L539:
	xorl	%r9d, %r9d
	movq	%r9, 312+nvtxGlobals_v3(%rip)
.L444:
	leaq	nvtxNameClProgramW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 320+nvtxGlobals_v3(%rip)
	je	.L540
	testb	%al, %al
	je	.L446
.L540:
	xorl	%r8d, %r8d
	movq	%r8, 320+nvtxGlobals_v3(%rip)
.L446:
	leaq	nvtxNameClEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 328+nvtxGlobals_v3(%rip)
	je	.L541
	testb	%al, %al
	je	.L448
.L541:
	xorl	%edi, %edi
	movq	%rdi, 328+nvtxGlobals_v3(%rip)
.L448:
	leaq	nvtxNameClEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 336+nvtxGlobals_v3(%rip)
	je	.L542
	testb	%al, %al
	je	.L450
.L542:
	xorl	%esi, %esi
	movq	%rsi, 336+nvtxGlobals_v3(%rip)
.L450:
	leaq	nvtxNameCudaDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 344+nvtxGlobals_v3(%rip)
	je	.L543
	testb	%al, %al
	je	.L452
.L543:
	xorl	%ecx, %ecx
	movq	%rcx, 344+nvtxGlobals_v3(%rip)
.L452:
	leaq	nvtxNameCudaDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 352+nvtxGlobals_v3(%rip)
	je	.L544
	testb	%al, %al
	je	.L454
.L544:
	xorl	%edx, %edx
	movq	%rdx, 352+nvtxGlobals_v3(%rip)
.L454:
	leaq	nvtxNameCudaStreamA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 360+nvtxGlobals_v3(%rip)
	je	.L545
	testb	%al, %al
	je	.L456
.L545:
	xorl	%r11d, %r11d
	movq	%r11, 360+nvtxGlobals_v3(%rip)
.L456:
	leaq	nvtxNameCudaStreamW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 368+nvtxGlobals_v3(%rip)
	je	.L546
	testb	%al, %al
	je	.L458
.L546:
	xorl	%r10d, %r10d
	movq	%r10, 368+nvtxGlobals_v3(%rip)
.L458:
	leaq	nvtxNameCudaEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 376+nvtxGlobals_v3(%rip)
	je	.L547
	testb	%al, %al
	je	.L460
.L547:
	xorl	%r9d, %r9d
	movq	%r9, 376+nvtxGlobals_v3(%rip)
.L460:
	leaq	nvtxNameCudaEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 384+nvtxGlobals_v3(%rip)
	je	.L548
	testb	%al, %al
	je	.L462
.L548:
	xorl	%r8d, %r8d
	movq	%r8, 384+nvtxGlobals_v3(%rip)
.L462:
	leaq	nvtxDomainMarkEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 392+nvtxGlobals_v3(%rip)
	je	.L549
	testb	%al, %al
	je	.L464
.L549:
	xorl	%edi, %edi
	movq	%rdi, 392+nvtxGlobals_v3(%rip)
.L464:
	leaq	nvtxDomainRangeStartEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 400+nvtxGlobals_v3(%rip)
	je	.L550
	testb	%al, %al
	je	.L466
.L550:
	xorl	%esi, %esi
	movq	%rsi, 400+nvtxGlobals_v3(%rip)
.L466:
	leaq	nvtxDomainRangeEnd_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 408+nvtxGlobals_v3(%rip)
	je	.L551
	testb	%al, %al
	je	.L468
.L551:
	xorl	%ecx, %ecx
	movq	%rcx, 408+nvtxGlobals_v3(%rip)
.L468:
	leaq	nvtxDomainRangePushEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 416+nvtxGlobals_v3(%rip)
	je	.L552
	testb	%al, %al
	je	.L470
.L552:
	xorl	%edx, %edx
	movq	%rdx, 416+nvtxGlobals_v3(%rip)
.L470:
	leaq	nvtxDomainRangePop_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 424+nvtxGlobals_v3(%rip)
	je	.L553
	testb	%al, %al
	je	.L472
.L553:
	xorl	%r11d, %r11d
	movq	%r11, 424+nvtxGlobals_v3(%rip)
.L472:
	leaq	nvtxDomainResourceCreate_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 432+nvtxGlobals_v3(%rip)
	je	.L554
	testb	%al, %al
	je	.L474
.L554:
	xorl	%r10d, %r10d
	movq	%r10, 432+nvtxGlobals_v3(%rip)
.L474:
	leaq	nvtxDomainResourceDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 440+nvtxGlobals_v3(%rip)
	je	.L555
	testb	%al, %al
	je	.L476
.L555:
	xorl	%r9d, %r9d
	movq	%r9, 440+nvtxGlobals_v3(%rip)
.L476:
	leaq	nvtxDomainNameCategoryA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 448+nvtxGlobals_v3(%rip)
	je	.L556
	testb	%al, %al
	je	.L478
.L556:
	xorl	%r8d, %r8d
	movq	%r8, 448+nvtxGlobals_v3(%rip)
.L478:
	leaq	nvtxDomainNameCategoryW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 456+nvtxGlobals_v3(%rip)
	je	.L557
	testb	%al, %al
	je	.L480
.L557:
	xorl	%edi, %edi
	movq	%rdi, 456+nvtxGlobals_v3(%rip)
.L480:
	leaq	nvtxDomainRegisterStringA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 464+nvtxGlobals_v3(%rip)
	je	.L558
	testb	%al, %al
	je	.L482
.L558:
	xorl	%esi, %esi
	movq	%rsi, 464+nvtxGlobals_v3(%rip)
.L482:
	leaq	nvtxDomainRegisterStringW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 472+nvtxGlobals_v3(%rip)
	je	.L559
	testb	%al, %al
	je	.L484
.L559:
	xorl	%ecx, %ecx
	movq	%rcx, 472+nvtxGlobals_v3(%rip)
.L484:
	leaq	nvtxDomainCreateA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 480+nvtxGlobals_v3(%rip)
	je	.L560
	testb	%al, %al
	je	.L486
.L560:
	xorl	%edx, %edx
	movq	%rdx, 480+nvtxGlobals_v3(%rip)
.L486:
	leaq	nvtxDomainCreateW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 488+nvtxGlobals_v3(%rip)
	je	.L561
	testb	%al, %al
	je	.L488
.L561:
	xorl	%r11d, %r11d
	movq	%r11, 488+nvtxGlobals_v3(%rip)
.L488:
	leaq	nvtxDomainDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 496+nvtxGlobals_v3(%rip)
	je	.L562
	testb	%al, %al
	je	.L490
.L562:
	xorl	%r10d, %r10d
	movq	%r10, 496+nvtxGlobals_v3(%rip)
.L490:
	leaq	nvtxInitialize_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 504+nvtxGlobals_v3(%rip)
	je	.L563
	testb	%al, %al
	je	.L492
.L563:
	xorl	%r9d, %r9d
	movq	%r9, 504+nvtxGlobals_v3(%rip)
.L492:
	leaq	nvtxDomainSyncUserCreate_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 512+nvtxGlobals_v3(%rip)
	je	.L564
	testb	%al, %al
	je	.L494
.L564:
	xorl	%r8d, %r8d
	movq	%r8, 512+nvtxGlobals_v3(%rip)
.L494:
	leaq	nvtxDomainSyncUserDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 520+nvtxGlobals_v3(%rip)
	je	.L565
	testb	%al, %al
	je	.L496
.L565:
	xorl	%edi, %edi
	movq	%rdi, 520+nvtxGlobals_v3(%rip)
.L496:
	leaq	nvtxDomainSyncUserAcquireStart_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 528+nvtxGlobals_v3(%rip)
	je	.L566
	testb	%al, %al
	je	.L498
.L566:
	xorl	%esi, %esi
	movq	%rsi, 528+nvtxGlobals_v3(%rip)
.L498:
	leaq	nvtxDomainSyncUserAcquireFailed_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 536+nvtxGlobals_v3(%rip)
	je	.L567
	testb	%al, %al
	je	.L500
.L567:
	xorl	%ecx, %ecx
	movq	%rcx, 536+nvtxGlobals_v3(%rip)
.L500:
	leaq	nvtxDomainSyncUserAcquireSuccess_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 544+nvtxGlobals_v3(%rip)
	je	.L568
	testb	%al, %al
	je	.L502
.L568:
	xorl	%edx, %edx
	movq	%rdx, 544+nvtxGlobals_v3(%rip)
.L502:
	leaq	nvtxDomainSyncUserReleasing_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 552+nvtxGlobals_v3(%rip)
	je	.L569
	testb	%al, %al
	je	.L377
.L569:
	xorl	%eax, %eax
	movq	%rax, 552+nvtxGlobals_v3(%rip)
.L377:
	ret
	.cfi_endproc
.LFE8537:
	.size	nvtxSetInitFunctionsToNoops_v3, .-nvtxSetInitFunctionsToNoops_v3
	.section	.rodata.nvtxInitializeInjectionLibrary_v3.str1.1,"aMS",@progbits,1
.LC9:
	.string	"NVTX_INJECTION64_PATH"
.LC10:
	.string	"InitializeInjectionNvtx2"
	.section	.text.nvtxInitializeInjectionLibrary_v3,"axG",@progbits,nvtxInitializeInjectionLibrary_v3,comdat
	.weak	nvtxInitializeInjectionLibrary_v3
	.hidden	nvtxInitializeInjectionLibrary_v3
	.type	nvtxInitializeInjectionLibrary_v3, @function
nvtxInitializeInjectionLibrary_v3:
.LFB8538:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	.LC9(%rip), %rdi
	call	getenv@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	je	.L763
	movl	$1, %esi
	movq	%rax, %rdi
	call	dlopen@PLT
	movl	$4, %edx
	movq	%rax, %rbx
	testq	%rax, %rax
	je	.L762
	leaq	.LC10(%rip), %rsi
	movq	%rax, %rdi
	call	dlsym@PLT
	testq	%rax, %rax
	jne	.L765
	movq	%rbx, %rdi
	call	dlclose@PLT
	movl	$5, %edx
	jmp	.L762
.L763:
	movq	InitializeInjectionNvtx2_fnptr(%rip), %rax
	movl	$7, %edx
	testq	%rax, %rax
	je	.L762
.L765:
	leaq	nvtxGetExportTable_v3(%rip), %rdi
	call	*%rax
	xorl	%edx, %edx
	testl	%eax, %eax
	jne	.L762
	testq	%rbx, %rbx
	je	.L766
	movq	%rbx, %rdi
	call	dlclose@PLT
.L766:
	movl	$6, %edx
.L762:
	movl	%edx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8538:
	.size	nvtxInitializeInjectionLibrary_v3, .-nvtxInitializeInjectionLibrary_v3
	.section	.text.nvtxInitOnce_v3,"axG",@progbits,nvtxInitOnce_v3,comdat
	.weak	nvtxInitOnce_v3
	.hidden	nvtxInitOnce_v3
	.type	nvtxInitOnce_v3, @function
nvtxInitOnce_v3:
.LFB8539:
	.cfi_startproc
	endbr64
	movl	nvtxGlobals_v3(%rip), %eax
	cmpl	$2, %eax
	je	.L782
	pushq	%rdx
	.cfi_def_cfa_offset 16
	movl	$1, %eax
	xorl	%edx, %edx
	mfence
	lock cmpxchgl	%edx, nvtxGlobals_v3(%rip)
	testl	%eax, %eax
	jne	.L785
	call	nvtxInitializeInjectionLibrary_v3
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	call	nvtxSetInitFunctionsToNoops_v3
	movl	$2, %eax
	mfence
	xchgl	nvtxGlobals_v3(%rip), %eax
	jmp	.L774
.L785:
	mfence
	movl	nvtxGlobals_v3(%rip), %eax
	cmpl	$2, %eax
	je	.L774
	call	sched_yield@PLT
	jmp	.L785
.L774:
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
.L782:
	ret
	.cfi_endproc
.LFE8539:
	.size	nvtxInitOnce_v3, .-nvtxInitOnce_v3
	.section	.text.nvtxDomainSyncUserReleasing_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserReleasing_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserReleasing_impl_init_v3
	.hidden	nvtxDomainSyncUserReleasing_impl_init_v3
	.type	nvtxDomainSyncUserReleasing_impl_init_v3, @function
nvtxDomainSyncUserReleasing_impl_init_v3:
.LFB8536:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	552+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L786
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L786:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8536:
	.size	nvtxDomainSyncUserReleasing_impl_init_v3, .-nvtxDomainSyncUserReleasing_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireSuccess_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireSuccess_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.type	nvtxDomainSyncUserAcquireSuccess_impl_init_v3, @function
nvtxDomainSyncUserAcquireSuccess_impl_init_v3:
.LFB8535:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	544+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L789
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L789:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8535:
	.size	nvtxDomainSyncUserAcquireSuccess_impl_init_v3, .-nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireFailed_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireFailed_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.type	nvtxDomainSyncUserAcquireFailed_impl_init_v3, @function
nvtxDomainSyncUserAcquireFailed_impl_init_v3:
.LFB8534:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	536+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L792
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L792:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8534:
	.size	nvtxDomainSyncUserAcquireFailed_impl_init_v3, .-nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireStart_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireStart_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.type	nvtxDomainSyncUserAcquireStart_impl_init_v3, @function
nvtxDomainSyncUserAcquireStart_impl_init_v3:
.LFB8533:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	528+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L795
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L795:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8533:
	.size	nvtxDomainSyncUserAcquireStart_impl_init_v3, .-nvtxDomainSyncUserAcquireStart_impl_init_v3
	.section	.text.nvtxDomainSyncUserDestroy_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserDestroy_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserDestroy_impl_init_v3
	.hidden	nvtxDomainSyncUserDestroy_impl_init_v3
	.type	nvtxDomainSyncUserDestroy_impl_init_v3, @function
nvtxDomainSyncUserDestroy_impl_init_v3:
.LFB8532:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	520+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L798
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L798:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8532:
	.size	nvtxDomainSyncUserDestroy_impl_init_v3, .-nvtxDomainSyncUserDestroy_impl_init_v3
	.section	.text.nvtxDomainSyncUserCreate_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserCreate_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserCreate_impl_init_v3
	.hidden	nvtxDomainSyncUserCreate_impl_init_v3
	.type	nvtxDomainSyncUserCreate_impl_init_v3, @function
nvtxDomainSyncUserCreate_impl_init_v3:
.LFB8531:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	512+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L802
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L802:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8531:
	.size	nvtxDomainSyncUserCreate_impl_init_v3, .-nvtxDomainSyncUserCreate_impl_init_v3
	.section	.text.nvtxInitialize_impl_init_v3,"axG",@progbits,nvtxInitialize_impl_init_v3,comdat
	.weak	nvtxInitialize_impl_init_v3
	.hidden	nvtxInitialize_impl_init_v3
	.type	nvtxInitialize_impl_init_v3, @function
nvtxInitialize_impl_init_v3:
.LFB8502:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	504+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L804
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L804:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8502:
	.size	nvtxInitialize_impl_init_v3, .-nvtxInitialize_impl_init_v3
	.section	.text.nvtxDomainDestroy_impl_init_v3,"axG",@progbits,nvtxDomainDestroy_impl_init_v3,comdat
	.weak	nvtxDomainDestroy_impl_init_v3
	.hidden	nvtxDomainDestroy_impl_init_v3
	.type	nvtxDomainDestroy_impl_init_v3, @function
nvtxDomainDestroy_impl_init_v3:
.LFB8501:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	496+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L807
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L807:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8501:
	.size	nvtxDomainDestroy_impl_init_v3, .-nvtxDomainDestroy_impl_init_v3
	.section	.text.nvtxDomainCreateW_impl_init_v3,"axG",@progbits,nvtxDomainCreateW_impl_init_v3,comdat
	.weak	nvtxDomainCreateW_impl_init_v3
	.hidden	nvtxDomainCreateW_impl_init_v3
	.type	nvtxDomainCreateW_impl_init_v3, @function
nvtxDomainCreateW_impl_init_v3:
.LFB8500:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	488+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L811
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L811:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8500:
	.size	nvtxDomainCreateW_impl_init_v3, .-nvtxDomainCreateW_impl_init_v3
	.section	.text.nvtxDomainCreateA_impl_init_v3,"axG",@progbits,nvtxDomainCreateA_impl_init_v3,comdat
	.weak	nvtxDomainCreateA_impl_init_v3
	.hidden	nvtxDomainCreateA_impl_init_v3
	.type	nvtxDomainCreateA_impl_init_v3, @function
nvtxDomainCreateA_impl_init_v3:
.LFB8499:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	480+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L814
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L814:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8499:
	.size	nvtxDomainCreateA_impl_init_v3, .-nvtxDomainCreateA_impl_init_v3
	.section	.text.nvtxDomainRegisterStringW_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringW_impl_init_v3,comdat
	.weak	nvtxDomainRegisterStringW_impl_init_v3
	.hidden	nvtxDomainRegisterStringW_impl_init_v3
	.type	nvtxDomainRegisterStringW_impl_init_v3, @function
nvtxDomainRegisterStringW_impl_init_v3:
.LFB8498:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	472+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L817
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L817:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8498:
	.size	nvtxDomainRegisterStringW_impl_init_v3, .-nvtxDomainRegisterStringW_impl_init_v3
	.section	.text.nvtxDomainRegisterStringA_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringA_impl_init_v3,comdat
	.weak	nvtxDomainRegisterStringA_impl_init_v3
	.hidden	nvtxDomainRegisterStringA_impl_init_v3
	.type	nvtxDomainRegisterStringA_impl_init_v3, @function
nvtxDomainRegisterStringA_impl_init_v3:
.LFB8497:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	464+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L820
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L820:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8497:
	.size	nvtxDomainRegisterStringA_impl_init_v3, .-nvtxDomainRegisterStringA_impl_init_v3
	.section	.text.nvtxDomainNameCategoryW_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryW_impl_init_v3,comdat
	.weak	nvtxDomainNameCategoryW_impl_init_v3
	.hidden	nvtxDomainNameCategoryW_impl_init_v3
	.type	nvtxDomainNameCategoryW_impl_init_v3, @function
nvtxDomainNameCategoryW_impl_init_v3:
.LFB8496:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 24(%rsp)
	movl	%esi, 20(%rsp)
	movq	%rdx, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	456+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L822
	movq	8(%rsp), %rdx
	movl	20(%rsp), %esi
	movq	24(%rsp), %rdi
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L822:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8496:
	.size	nvtxDomainNameCategoryW_impl_init_v3, .-nvtxDomainNameCategoryW_impl_init_v3
	.section	.text.nvtxDomainNameCategoryA_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryA_impl_init_v3,comdat
	.weak	nvtxDomainNameCategoryA_impl_init_v3
	.hidden	nvtxDomainNameCategoryA_impl_init_v3
	.type	nvtxDomainNameCategoryA_impl_init_v3, @function
nvtxDomainNameCategoryA_impl_init_v3:
.LFB8495:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 24(%rsp)
	movl	%esi, 20(%rsp)
	movq	%rdx, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	448+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L825
	movq	8(%rsp), %rdx
	movl	20(%rsp), %esi
	movq	24(%rsp), %rdi
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L825:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8495:
	.size	nvtxDomainNameCategoryA_impl_init_v3, .-nvtxDomainNameCategoryA_impl_init_v3
	.section	.text.nvtxDomainResourceDestroy_impl_init_v3,"axG",@progbits,nvtxDomainResourceDestroy_impl_init_v3,comdat
	.weak	nvtxDomainResourceDestroy_impl_init_v3
	.hidden	nvtxDomainResourceDestroy_impl_init_v3
	.type	nvtxDomainResourceDestroy_impl_init_v3, @function
nvtxDomainResourceDestroy_impl_init_v3:
.LFB8494:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	440+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L828
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L828:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8494:
	.size	nvtxDomainResourceDestroy_impl_init_v3, .-nvtxDomainResourceDestroy_impl_init_v3
	.section	.text.nvtxDomainResourceCreate_impl_init_v3,"axG",@progbits,nvtxDomainResourceCreate_impl_init_v3,comdat
	.weak	nvtxDomainResourceCreate_impl_init_v3
	.hidden	nvtxDomainResourceCreate_impl_init_v3
	.type	nvtxDomainResourceCreate_impl_init_v3, @function
nvtxDomainResourceCreate_impl_init_v3:
.LFB8493:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	432+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L832
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L832:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8493:
	.size	nvtxDomainResourceCreate_impl_init_v3, .-nvtxDomainResourceCreate_impl_init_v3
	.section	.text.nvtxDomainRangePop_impl_init_v3,"axG",@progbits,nvtxDomainRangePop_impl_init_v3,comdat
	.weak	nvtxDomainRangePop_impl_init_v3
	.hidden	nvtxDomainRangePop_impl_init_v3
	.type	nvtxDomainRangePop_impl_init_v3, @function
nvtxDomainRangePop_impl_init_v3:
.LFB8492:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	jmp	nvtxDomainRangePop
	.cfi_endproc
.LFE8492:
	.size	nvtxDomainRangePop_impl_init_v3, .-nvtxDomainRangePop_impl_init_v3
	.section	.text.nvtxDomainRangePushEx_impl_init_v3,"axG",@progbits,nvtxDomainRangePushEx_impl_init_v3,comdat
	.weak	nvtxDomainRangePushEx_impl_init_v3
	.hidden	nvtxDomainRangePushEx_impl_init_v3
	.type	nvtxDomainRangePushEx_impl_init_v3, @function
nvtxDomainRangePushEx_impl_init_v3:
.LFB8491:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	416+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L837
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L837:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8491:
	.size	nvtxDomainRangePushEx_impl_init_v3, .-nvtxDomainRangePushEx_impl_init_v3
	.section	.text.nvtxDomainRangeEnd_impl_init_v3,"axG",@progbits,nvtxDomainRangeEnd_impl_init_v3,comdat
	.weak	nvtxDomainRangeEnd_impl_init_v3
	.hidden	nvtxDomainRangeEnd_impl_init_v3
	.type	nvtxDomainRangeEnd_impl_init_v3, @function
nvtxDomainRangeEnd_impl_init_v3:
.LFB8490:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	408+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L839
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L839:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8490:
	.size	nvtxDomainRangeEnd_impl_init_v3, .-nvtxDomainRangeEnd_impl_init_v3
	.section	.text.nvtxDomainRangeStartEx_impl_init_v3,"axG",@progbits,nvtxDomainRangeStartEx_impl_init_v3,comdat
	.weak	nvtxDomainRangeStartEx_impl_init_v3
	.hidden	nvtxDomainRangeStartEx_impl_init_v3
	.type	nvtxDomainRangeStartEx_impl_init_v3, @function
nvtxDomainRangeStartEx_impl_init_v3:
.LFB8489:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	400+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L843
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L843:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8489:
	.size	nvtxDomainRangeStartEx_impl_init_v3, .-nvtxDomainRangeStartEx_impl_init_v3
	.section	.text.nvtxDomainMarkEx_impl_init_v3,"axG",@progbits,nvtxDomainMarkEx_impl_init_v3,comdat
	.weak	nvtxDomainMarkEx_impl_init_v3
	.hidden	nvtxDomainMarkEx_impl_init_v3
	.type	nvtxDomainMarkEx_impl_init_v3, @function
nvtxDomainMarkEx_impl_init_v3:
.LFB8488:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	392+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L845
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L845:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8488:
	.size	nvtxDomainMarkEx_impl_init_v3, .-nvtxDomainMarkEx_impl_init_v3
	.section	.text.nvtxNameCudaEventW_impl_init_v3,"axG",@progbits,nvtxNameCudaEventW_impl_init_v3,comdat
	.weak	nvtxNameCudaEventW_impl_init_v3
	.hidden	nvtxNameCudaEventW_impl_init_v3
	.type	nvtxNameCudaEventW_impl_init_v3, @function
nvtxNameCudaEventW_impl_init_v3:
.LFB8516:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	384+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L848
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L848:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8516:
	.size	nvtxNameCudaEventW_impl_init_v3, .-nvtxNameCudaEventW_impl_init_v3
	.section	.text.nvtxNameCudaEventA_impl_init_v3,"axG",@progbits,nvtxNameCudaEventA_impl_init_v3,comdat
	.weak	nvtxNameCudaEventA_impl_init_v3
	.hidden	nvtxNameCudaEventA_impl_init_v3
	.type	nvtxNameCudaEventA_impl_init_v3, @function
nvtxNameCudaEventA_impl_init_v3:
.LFB8515:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	376+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L851
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L851:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8515:
	.size	nvtxNameCudaEventA_impl_init_v3, .-nvtxNameCudaEventA_impl_init_v3
	.section	.text.nvtxNameCudaStreamW_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamW_impl_init_v3,comdat
	.weak	nvtxNameCudaStreamW_impl_init_v3
	.hidden	nvtxNameCudaStreamW_impl_init_v3
	.type	nvtxNameCudaStreamW_impl_init_v3, @function
nvtxNameCudaStreamW_impl_init_v3:
.LFB8514:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	368+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L854
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L854:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8514:
	.size	nvtxNameCudaStreamW_impl_init_v3, .-nvtxNameCudaStreamW_impl_init_v3
	.section	.text.nvtxNameCudaStreamA_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamA_impl_init_v3,comdat
	.weak	nvtxNameCudaStreamA_impl_init_v3
	.hidden	nvtxNameCudaStreamA_impl_init_v3
	.type	nvtxNameCudaStreamA_impl_init_v3, @function
nvtxNameCudaStreamA_impl_init_v3:
.LFB8513:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	360+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L857
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L857:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8513:
	.size	nvtxNameCudaStreamA_impl_init_v3, .-nvtxNameCudaStreamA_impl_init_v3
	.section	.text.nvtxNameCudaDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceW_impl_init_v3,comdat
	.weak	nvtxNameCudaDeviceW_impl_init_v3
	.hidden	nvtxNameCudaDeviceW_impl_init_v3
	.type	nvtxNameCudaDeviceW_impl_init_v3, @function
nvtxNameCudaDeviceW_impl_init_v3:
.LFB8512:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	352+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L860
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L860:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8512:
	.size	nvtxNameCudaDeviceW_impl_init_v3, .-nvtxNameCudaDeviceW_impl_init_v3
	.section	.text.nvtxNameCudaDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceA_impl_init_v3,comdat
	.weak	nvtxNameCudaDeviceA_impl_init_v3
	.hidden	nvtxNameCudaDeviceA_impl_init_v3
	.type	nvtxNameCudaDeviceA_impl_init_v3, @function
nvtxNameCudaDeviceA_impl_init_v3:
.LFB8511:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	344+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L863
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L863:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8511:
	.size	nvtxNameCudaDeviceA_impl_init_v3, .-nvtxNameCudaDeviceA_impl_init_v3
	.section	.text.nvtxNameClEventW_impl_init_v3,"axG",@progbits,nvtxNameClEventW_impl_init_v3,comdat
	.weak	nvtxNameClEventW_impl_init_v3
	.hidden	nvtxNameClEventW_impl_init_v3
	.type	nvtxNameClEventW_impl_init_v3, @function
nvtxNameClEventW_impl_init_v3:
.LFB8530:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	336+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L866
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L866:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8530:
	.size	nvtxNameClEventW_impl_init_v3, .-nvtxNameClEventW_impl_init_v3
	.section	.text.nvtxNameClEventA_impl_init_v3,"axG",@progbits,nvtxNameClEventA_impl_init_v3,comdat
	.weak	nvtxNameClEventA_impl_init_v3
	.hidden	nvtxNameClEventA_impl_init_v3
	.type	nvtxNameClEventA_impl_init_v3, @function
nvtxNameClEventA_impl_init_v3:
.LFB8529:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	328+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L869
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L869:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8529:
	.size	nvtxNameClEventA_impl_init_v3, .-nvtxNameClEventA_impl_init_v3
	.section	.text.nvtxNameClProgramW_impl_init_v3,"axG",@progbits,nvtxNameClProgramW_impl_init_v3,comdat
	.weak	nvtxNameClProgramW_impl_init_v3
	.hidden	nvtxNameClProgramW_impl_init_v3
	.type	nvtxNameClProgramW_impl_init_v3, @function
nvtxNameClProgramW_impl_init_v3:
.LFB8528:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	320+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L872
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L872:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8528:
	.size	nvtxNameClProgramW_impl_init_v3, .-nvtxNameClProgramW_impl_init_v3
	.section	.text.nvtxNameClProgramA_impl_init_v3,"axG",@progbits,nvtxNameClProgramA_impl_init_v3,comdat
	.weak	nvtxNameClProgramA_impl_init_v3
	.hidden	nvtxNameClProgramA_impl_init_v3
	.type	nvtxNameClProgramA_impl_init_v3, @function
nvtxNameClProgramA_impl_init_v3:
.LFB8527:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	312+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L875
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L875:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8527:
	.size	nvtxNameClProgramA_impl_init_v3, .-nvtxNameClProgramA_impl_init_v3
	.section	.text.nvtxNameClSamplerW_impl_init_v3,"axG",@progbits,nvtxNameClSamplerW_impl_init_v3,comdat
	.weak	nvtxNameClSamplerW_impl_init_v3
	.hidden	nvtxNameClSamplerW_impl_init_v3
	.type	nvtxNameClSamplerW_impl_init_v3, @function
nvtxNameClSamplerW_impl_init_v3:
.LFB8526:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	304+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L878
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L878:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8526:
	.size	nvtxNameClSamplerW_impl_init_v3, .-nvtxNameClSamplerW_impl_init_v3
	.section	.text.nvtxNameClSamplerA_impl_init_v3,"axG",@progbits,nvtxNameClSamplerA_impl_init_v3,comdat
	.weak	nvtxNameClSamplerA_impl_init_v3
	.hidden	nvtxNameClSamplerA_impl_init_v3
	.type	nvtxNameClSamplerA_impl_init_v3, @function
nvtxNameClSamplerA_impl_init_v3:
.LFB8525:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	296+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L881
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L881:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8525:
	.size	nvtxNameClSamplerA_impl_init_v3, .-nvtxNameClSamplerA_impl_init_v3
	.section	.text.nvtxNameClMemObjectW_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectW_impl_init_v3,comdat
	.weak	nvtxNameClMemObjectW_impl_init_v3
	.hidden	nvtxNameClMemObjectW_impl_init_v3
	.type	nvtxNameClMemObjectW_impl_init_v3, @function
nvtxNameClMemObjectW_impl_init_v3:
.LFB8524:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	288+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L884
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L884:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8524:
	.size	nvtxNameClMemObjectW_impl_init_v3, .-nvtxNameClMemObjectW_impl_init_v3
	.section	.text.nvtxNameClMemObjectA_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectA_impl_init_v3,comdat
	.weak	nvtxNameClMemObjectA_impl_init_v3
	.hidden	nvtxNameClMemObjectA_impl_init_v3
	.type	nvtxNameClMemObjectA_impl_init_v3, @function
nvtxNameClMemObjectA_impl_init_v3:
.LFB8523:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	280+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L887
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L887:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8523:
	.size	nvtxNameClMemObjectA_impl_init_v3, .-nvtxNameClMemObjectA_impl_init_v3
	.section	.text.nvtxNameClCommandQueueW_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueW_impl_init_v3,comdat
	.weak	nvtxNameClCommandQueueW_impl_init_v3
	.hidden	nvtxNameClCommandQueueW_impl_init_v3
	.type	nvtxNameClCommandQueueW_impl_init_v3, @function
nvtxNameClCommandQueueW_impl_init_v3:
.LFB8522:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	272+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L890
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L890:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8522:
	.size	nvtxNameClCommandQueueW_impl_init_v3, .-nvtxNameClCommandQueueW_impl_init_v3
	.section	.text.nvtxNameClCommandQueueA_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueA_impl_init_v3,comdat
	.weak	nvtxNameClCommandQueueA_impl_init_v3
	.hidden	nvtxNameClCommandQueueA_impl_init_v3
	.type	nvtxNameClCommandQueueA_impl_init_v3, @function
nvtxNameClCommandQueueA_impl_init_v3:
.LFB8521:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	264+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L893
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L893:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8521:
	.size	nvtxNameClCommandQueueA_impl_init_v3, .-nvtxNameClCommandQueueA_impl_init_v3
	.section	.text.nvtxNameClContextW_impl_init_v3,"axG",@progbits,nvtxNameClContextW_impl_init_v3,comdat
	.weak	nvtxNameClContextW_impl_init_v3
	.hidden	nvtxNameClContextW_impl_init_v3
	.type	nvtxNameClContextW_impl_init_v3, @function
nvtxNameClContextW_impl_init_v3:
.LFB8520:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	256+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L896
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L896:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8520:
	.size	nvtxNameClContextW_impl_init_v3, .-nvtxNameClContextW_impl_init_v3
	.section	.text.nvtxNameClContextA_impl_init_v3,"axG",@progbits,nvtxNameClContextA_impl_init_v3,comdat
	.weak	nvtxNameClContextA_impl_init_v3
	.hidden	nvtxNameClContextA_impl_init_v3
	.type	nvtxNameClContextA_impl_init_v3, @function
nvtxNameClContextA_impl_init_v3:
.LFB8519:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	248+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L899
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L899:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8519:
	.size	nvtxNameClContextA_impl_init_v3, .-nvtxNameClContextA_impl_init_v3
	.section	.text.nvtxNameClDeviceW_impl_init_v3,"axG",@progbits,nvtxNameClDeviceW_impl_init_v3,comdat
	.weak	nvtxNameClDeviceW_impl_init_v3
	.hidden	nvtxNameClDeviceW_impl_init_v3
	.type	nvtxNameClDeviceW_impl_init_v3, @function
nvtxNameClDeviceW_impl_init_v3:
.LFB8518:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	240+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L902
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L902:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8518:
	.size	nvtxNameClDeviceW_impl_init_v3, .-nvtxNameClDeviceW_impl_init_v3
	.section	.text.nvtxNameClDeviceA_impl_init_v3,"axG",@progbits,nvtxNameClDeviceA_impl_init_v3,comdat
	.weak	nvtxNameClDeviceA_impl_init_v3
	.hidden	nvtxNameClDeviceA_impl_init_v3
	.type	nvtxNameClDeviceA_impl_init_v3, @function
nvtxNameClDeviceA_impl_init_v3:
.LFB8517:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	232+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L905
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L905:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8517:
	.size	nvtxNameClDeviceA_impl_init_v3, .-nvtxNameClDeviceA_impl_init_v3
	.section	.text.nvtxNameCuEventW_impl_init_v3,"axG",@progbits,nvtxNameCuEventW_impl_init_v3,comdat
	.weak	nvtxNameCuEventW_impl_init_v3
	.hidden	nvtxNameCuEventW_impl_init_v3
	.type	nvtxNameCuEventW_impl_init_v3, @function
nvtxNameCuEventW_impl_init_v3:
.LFB8510:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	224+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L908
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L908:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8510:
	.size	nvtxNameCuEventW_impl_init_v3, .-nvtxNameCuEventW_impl_init_v3
	.section	.text.nvtxNameCuEventA_impl_init_v3,"axG",@progbits,nvtxNameCuEventA_impl_init_v3,comdat
	.weak	nvtxNameCuEventA_impl_init_v3
	.hidden	nvtxNameCuEventA_impl_init_v3
	.type	nvtxNameCuEventA_impl_init_v3, @function
nvtxNameCuEventA_impl_init_v3:
.LFB8509:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	216+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L911
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L911:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8509:
	.size	nvtxNameCuEventA_impl_init_v3, .-nvtxNameCuEventA_impl_init_v3
	.section	.text.nvtxNameCuStreamW_impl_init_v3,"axG",@progbits,nvtxNameCuStreamW_impl_init_v3,comdat
	.weak	nvtxNameCuStreamW_impl_init_v3
	.hidden	nvtxNameCuStreamW_impl_init_v3
	.type	nvtxNameCuStreamW_impl_init_v3, @function
nvtxNameCuStreamW_impl_init_v3:
.LFB8508:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	208+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L914
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L914:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8508:
	.size	nvtxNameCuStreamW_impl_init_v3, .-nvtxNameCuStreamW_impl_init_v3
	.section	.text.nvtxNameCuStreamA_impl_init_v3,"axG",@progbits,nvtxNameCuStreamA_impl_init_v3,comdat
	.weak	nvtxNameCuStreamA_impl_init_v3
	.hidden	nvtxNameCuStreamA_impl_init_v3
	.type	nvtxNameCuStreamA_impl_init_v3, @function
nvtxNameCuStreamA_impl_init_v3:
.LFB8507:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	200+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L917
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L917:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8507:
	.size	nvtxNameCuStreamA_impl_init_v3, .-nvtxNameCuStreamA_impl_init_v3
	.section	.text.nvtxNameCuContextW_impl_init_v3,"axG",@progbits,nvtxNameCuContextW_impl_init_v3,comdat
	.weak	nvtxNameCuContextW_impl_init_v3
	.hidden	nvtxNameCuContextW_impl_init_v3
	.type	nvtxNameCuContextW_impl_init_v3, @function
nvtxNameCuContextW_impl_init_v3:
.LFB8506:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	192+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L920
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L920:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8506:
	.size	nvtxNameCuContextW_impl_init_v3, .-nvtxNameCuContextW_impl_init_v3
	.section	.text.nvtxNameCuContextA_impl_init_v3,"axG",@progbits,nvtxNameCuContextA_impl_init_v3,comdat
	.weak	nvtxNameCuContextA_impl_init_v3
	.hidden	nvtxNameCuContextA_impl_init_v3
	.type	nvtxNameCuContextA_impl_init_v3, @function
nvtxNameCuContextA_impl_init_v3:
.LFB8505:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	184+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L923
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L923:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8505:
	.size	nvtxNameCuContextA_impl_init_v3, .-nvtxNameCuContextA_impl_init_v3
	.section	.text.nvtxNameCuDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceW_impl_init_v3,comdat
	.weak	nvtxNameCuDeviceW_impl_init_v3
	.hidden	nvtxNameCuDeviceW_impl_init_v3
	.type	nvtxNameCuDeviceW_impl_init_v3, @function
nvtxNameCuDeviceW_impl_init_v3:
.LFB8504:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	176+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L926
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L926:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8504:
	.size	nvtxNameCuDeviceW_impl_init_v3, .-nvtxNameCuDeviceW_impl_init_v3
	.section	.text.nvtxNameCuDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceA_impl_init_v3,comdat
	.weak	nvtxNameCuDeviceA_impl_init_v3
	.hidden	nvtxNameCuDeviceA_impl_init_v3
	.type	nvtxNameCuDeviceA_impl_init_v3, @function
nvtxNameCuDeviceA_impl_init_v3:
.LFB8503:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	168+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L929
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L929:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8503:
	.size	nvtxNameCuDeviceA_impl_init_v3, .-nvtxNameCuDeviceA_impl_init_v3
	.section	.text.nvtxNameOsThreadW_impl_init_v3,"axG",@progbits,nvtxNameOsThreadW_impl_init_v3,comdat
	.weak	nvtxNameOsThreadW_impl_init_v3
	.hidden	nvtxNameOsThreadW_impl_init_v3
	.type	nvtxNameOsThreadW_impl_init_v3, @function
nvtxNameOsThreadW_impl_init_v3:
.LFB8487:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	160+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L932
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L932:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8487:
	.size	nvtxNameOsThreadW_impl_init_v3, .-nvtxNameOsThreadW_impl_init_v3
	.section	.text.nvtxNameOsThreadA_impl_init_v3,"axG",@progbits,nvtxNameOsThreadA_impl_init_v3,comdat
	.weak	nvtxNameOsThreadA_impl_init_v3
	.hidden	nvtxNameOsThreadA_impl_init_v3
	.type	nvtxNameOsThreadA_impl_init_v3, @function
nvtxNameOsThreadA_impl_init_v3:
.LFB8486:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	152+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L935
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L935:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8486:
	.size	nvtxNameOsThreadA_impl_init_v3, .-nvtxNameOsThreadA_impl_init_v3
	.section	.text.nvtxNameCategoryW_impl_init_v3,"axG",@progbits,nvtxNameCategoryW_impl_init_v3,comdat
	.weak	nvtxNameCategoryW_impl_init_v3
	.hidden	nvtxNameCategoryW_impl_init_v3
	.type	nvtxNameCategoryW_impl_init_v3, @function
nvtxNameCategoryW_impl_init_v3:
.LFB8485:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	144+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L938
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L938:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8485:
	.size	nvtxNameCategoryW_impl_init_v3, .-nvtxNameCategoryW_impl_init_v3
	.section	.text.nvtxNameCategoryA_impl_init_v3,"axG",@progbits,nvtxNameCategoryA_impl_init_v3,comdat
	.weak	nvtxNameCategoryA_impl_init_v3
	.hidden	nvtxNameCategoryA_impl_init_v3
	.type	nvtxNameCategoryA_impl_init_v3, @function
nvtxNameCategoryA_impl_init_v3:
.LFB8484:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	136+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L941
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L941:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8484:
	.size	nvtxNameCategoryA_impl_init_v3, .-nvtxNameCategoryA_impl_init_v3
	.section	.text.nvtxRangePop_impl_init_v3,"axG",@progbits,nvtxRangePop_impl_init_v3,comdat
	.weak	nvtxRangePop_impl_init_v3
	.hidden	nvtxRangePop_impl_init_v3
	.type	nvtxRangePop_impl_init_v3, @function
nvtxRangePop_impl_init_v3:
.LFB8483:
	.cfi_startproc
	endbr64
	pushq	%rsi
	.cfi_def_cfa_offset 16
	call	nvtxInitOnce_v3
	movq	128+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L945
	popq	%rcx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L945:
	.cfi_restore_state
	movl	$-2, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8483:
	.size	nvtxRangePop_impl_init_v3, .-nvtxRangePop_impl_init_v3
	.section	.text.nvtxRangePushW_impl_init_v3,"axG",@progbits,nvtxRangePushW_impl_init_v3,comdat
	.weak	nvtxRangePushW_impl_init_v3
	.hidden	nvtxRangePushW_impl_init_v3
	.type	nvtxRangePushW_impl_init_v3, @function
nvtxRangePushW_impl_init_v3:
.LFB8482:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	120+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L948
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L948:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8482:
	.size	nvtxRangePushW_impl_init_v3, .-nvtxRangePushW_impl_init_v3
	.section	.text.nvtxRangePushA_impl_init_v3,"axG",@progbits,nvtxRangePushA_impl_init_v3,comdat
	.weak	nvtxRangePushA_impl_init_v3
	.hidden	nvtxRangePushA_impl_init_v3
	.type	nvtxRangePushA_impl_init_v3, @function
nvtxRangePushA_impl_init_v3:
.LFB8481:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	112+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L951
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L951:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8481:
	.size	nvtxRangePushA_impl_init_v3, .-nvtxRangePushA_impl_init_v3
	.section	.text.nvtxRangePushEx_impl_init_v3,"axG",@progbits,nvtxRangePushEx_impl_init_v3,comdat
	.weak	nvtxRangePushEx_impl_init_v3
	.hidden	nvtxRangePushEx_impl_init_v3
	.type	nvtxRangePushEx_impl_init_v3, @function
nvtxRangePushEx_impl_init_v3:
.LFB8480:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	104+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L954
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L954:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8480:
	.size	nvtxRangePushEx_impl_init_v3, .-nvtxRangePushEx_impl_init_v3
	.section	.text.nvtxRangeEnd_impl_init_v3,"axG",@progbits,nvtxRangeEnd_impl_init_v3,comdat
	.weak	nvtxRangeEnd_impl_init_v3
	.hidden	nvtxRangeEnd_impl_init_v3
	.type	nvtxRangeEnd_impl_init_v3, @function
nvtxRangeEnd_impl_init_v3:
.LFB8479:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	96+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L956
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L956:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8479:
	.size	nvtxRangeEnd_impl_init_v3, .-nvtxRangeEnd_impl_init_v3
	.section	.text.nvtxRangeStartW_impl_init_v3,"axG",@progbits,nvtxRangeStartW_impl_init_v3,comdat
	.weak	nvtxRangeStartW_impl_init_v3
	.hidden	nvtxRangeStartW_impl_init_v3
	.type	nvtxRangeStartW_impl_init_v3, @function
nvtxRangeStartW_impl_init_v3:
.LFB8478:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	88+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L960
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L960:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8478:
	.size	nvtxRangeStartW_impl_init_v3, .-nvtxRangeStartW_impl_init_v3
	.section	.text.nvtxRangeStartA_impl_init_v3,"axG",@progbits,nvtxRangeStartA_impl_init_v3,comdat
	.weak	nvtxRangeStartA_impl_init_v3
	.hidden	nvtxRangeStartA_impl_init_v3
	.type	nvtxRangeStartA_impl_init_v3, @function
nvtxRangeStartA_impl_init_v3:
.LFB8477:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	80+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L963
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L963:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8477:
	.size	nvtxRangeStartA_impl_init_v3, .-nvtxRangeStartA_impl_init_v3
	.section	.text.nvtxRangeStartEx_impl_init_v3,"axG",@progbits,nvtxRangeStartEx_impl_init_v3,comdat
	.weak	nvtxRangeStartEx_impl_init_v3
	.hidden	nvtxRangeStartEx_impl_init_v3
	.type	nvtxRangeStartEx_impl_init_v3, @function
nvtxRangeStartEx_impl_init_v3:
.LFB8476:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	72+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L966
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L966:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8476:
	.size	nvtxRangeStartEx_impl_init_v3, .-nvtxRangeStartEx_impl_init_v3
	.section	.text.nvtxMarkW_impl_init_v3,"axG",@progbits,nvtxMarkW_impl_init_v3,comdat
	.weak	nvtxMarkW_impl_init_v3
	.hidden	nvtxMarkW_impl_init_v3
	.type	nvtxMarkW_impl_init_v3, @function
nvtxMarkW_impl_init_v3:
.LFB8475:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	64+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L968
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L968:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8475:
	.size	nvtxMarkW_impl_init_v3, .-nvtxMarkW_impl_init_v3
	.section	.text.nvtxMarkA_impl_init_v3,"axG",@progbits,nvtxMarkA_impl_init_v3,comdat
	.weak	nvtxMarkA_impl_init_v3
	.hidden	nvtxMarkA_impl_init_v3
	.type	nvtxMarkA_impl_init_v3, @function
nvtxMarkA_impl_init_v3:
.LFB8474:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	56+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L971
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L971:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8474:
	.size	nvtxMarkA_impl_init_v3, .-nvtxMarkA_impl_init_v3
	.section	.text.nvtxMarkEx_impl_init_v3,"axG",@progbits,nvtxMarkEx_impl_init_v3,comdat
	.weak	nvtxMarkEx_impl_init_v3
	.hidden	nvtxMarkEx_impl_init_v3
	.type	nvtxMarkEx_impl_init_v3, @function
nvtxMarkEx_impl_init_v3:
.LFB8473:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	48+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L974
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L974:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8473:
	.size	nvtxMarkEx_impl_init_v3, .-nvtxMarkEx_impl_init_v3
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC5ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE:
.LFB9536:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA9536
	endbr64
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%ecx, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	leaq	8(%rdi), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 48
	movq	%rax, (%rdi)
	leaq	24(%rdi), %rax
	movq	%rcx, 16(%rdi)
	movq	%rax, 8(%rdi)
	movb	$0, 24(%rdi)
	call	_ZNKSt9bad_alloc4whatEv@PLT
	movq	%rax, %rdi
	movq	%rax, %r13
	call	strlen@PLT
	movq	16(%rbx), %rdx
	movq	%r13, %rcx
	xorl	%esi, %esi
	movq	%rax, %r8
	movq	%rbp, %rdi
.LEHB6:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT
	movq	8(%r12), %rdx
	movq	(%r12), %rsi
	movabsq	$4611686018427387903, %rax
	subq	16(%rbx), %rax
	cmpq	%rdx, %rax
	jnb	.L978
	leaq	.LC5(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L978:
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_appendEPKcm@PLT
.LEHE6:
	popq	%rax
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
.L980:
	.cfi_restore_state
	endbr64
	movq	%rax, %r12
.L979:
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbx, %rdi
	call	_ZNSt9bad_allocD2Ev@PLT
	movq	%r12, %rdi
.LEHB7:
	call	_Unwind_Resume@PLT
.LEHE7:
	.cfi_endproc
.LFE9536:
	.section	.gcc_except_table._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC5ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
.LLSDA9536:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE9536-.LLSDACSB9536
.LLSDACSB9536:
	.uleb128 .LEHB6-.LFB9536
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L980-.LFB9536
	.uleb128 0
	.uleb128 .LEHB7-.LFB9536
	.uleb128 .LEHE7-.LEHB7
	.uleb128 0
	.uleb128 0
.LLSDACSE9536:
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC5ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .-_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.set	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.section	.rodata.str1.1
.LC11:
	.string	"_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_"
.LC12:
	.string	"_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_"
.LC13:
	.string	"_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_"
.LC14:
	.string	"_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_"
.LC15:
	.string	"_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_"
.LC16:
	.string	"_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_i"
.LC17:
	.string	"_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_"
.LC18:
	.string	"_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_"
.LC19:
	.string	"_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_"
.LC20:
	.string	"_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_"
.LC21:
	.string	"_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_"
.LC22:
	.string	"_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_"
.LC23:
	.string	"_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_"
.LC24:
	.string	"_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_"
.LC25:
	.string	"_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_i"
.LC26:
	.string	"_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_"
.LC27:
	.string	"_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_"
.LC28:
	.string	"_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_"
.LC29:
	.string	"_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_"
.LC30:
	.string	"_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_"
.LC31:
	.string	"_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_"
.LC32:
	.string	"_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_"
.LC33:
	.string	"_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_"
.LC34:
	.string	"_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_i"
.LC35:
	.string	"_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_"
.LC36:
	.string	"_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_"
.LC37:
	.string	"_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_"
.LC38:
	.string	"_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv"
.LC39:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std3__45__cpo5beginE"
.LC40:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std3__45__cpo3endE"
.LC41:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std3__45__cpo6cbeginE"
.LC42:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std3__45__cpo4cendE"
.LC43:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std3__45__cpo6rbeginE"
.LC44:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std3__45__cpo4rendE"
.LC45:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std3__45__cpo7crbeginE"
.LC46:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std3__45__cpo5crendE"
.LC47:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std3__466_GLOBAL__N__f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756ignoreE"
.LC48:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std3__419piecewise_constructE"
.LC49:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std3__48in_placeE"
.LC50:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std3__47nulloptE"
.LC51:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std3__420unreachable_sentinelE"
.LC52:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std6ranges3__45__cpo4swapE"
.LC53:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std6ranges3__45__cpo9iter_moveE"
.LC54:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std6ranges3__45__cpo7advanceE"
.LC55:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std6ranges3__45__cpo5beginE"
.LC56:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std6ranges3__45__cpo3endE"
.LC57:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std6ranges3__45__cpo6cbeginE"
.LC58:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std6ranges3__45__cpo4cendE"
.LC59:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std6ranges3__45__cpo9iter_swapE"
.LC60:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std6ranges3__45__cpo4nextE"
.LC61:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std6ranges3__45__cpo4prevE"
.LC62:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std6ranges3__45__cpo4dataE"
.LC63:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std6ranges3__45__cpo5cdataE"
.LC64:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std6ranges3__45__cpo4sizeE"
.LC65:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std6ranges3__45__cpo5ssizeE"
.LC66:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422754cuda3std6ranges3__45__cpo8distanceE"
.LC67:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS8cuda_cub3parE"
.LC68:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS8cuda_cub10par_nosyncE"
.LC69:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS6system6detail10sequential3seqE"
.LC70:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS6system3cpp3parE"
.LC71:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS12placeholders2_1E"
.LC72:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS12placeholders2_2E"
.LC73:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS12placeholders2_3E"
.LC74:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS12placeholders2_4E"
.LC75:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS12placeholders2_5E"
.LC76:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS12placeholders2_6E"
.LC77:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS12placeholders2_7E"
.LC78:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS12placeholders2_8E"
.LC79:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS12placeholders2_9E"
.LC80:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS12placeholders3_10E"
.LC81:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS3seqE"
.LC82:
	.string	"_ZN64_INTERNAL_f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756thrust20THRUST_200700_890_NS6deviceE"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB11888:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC19(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC22(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC23(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC24(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC25(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC26(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC27(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC28(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC29(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC30(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC31(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC32(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC33(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC34(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC35(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC36(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC37(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC38(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC39(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo5beginE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC40(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo3endE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC41(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo6cbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC42(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo4cendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC43(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo6rbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC44(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo4rendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC45(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo7crbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC46(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo5crendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC47(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__466_GLOBAL__N__f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756ignoreE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC48(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC49(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__48in_placeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC50(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__47nulloptE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC51(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__420unreachable_sentinelE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC52(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC53(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC54(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo7advanceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC55(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5beginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC56(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo3endE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC57(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo6cbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC58(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4cendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC59(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC60(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4nextE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC61(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4prevE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC62(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4dataE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC63(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5cdataE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC64(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4sizeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC65(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5ssizeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC66(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo8distanceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC67(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC68(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC69(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC70(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS6system3cppL3parE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC71(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC72(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC73(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC74(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC75(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC76(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC77(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC78(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC79(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC80(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC81(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NSL3seqE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC82(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN6thrust20THRUST_200700_890_NSL6deviceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE11888:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i.str1.1,"aMS",@progbits,1
.LC83:
	.string	"Failed to query current device"
	.section	.text._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,"axG",@progbits,_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,comdat
	.align 2
	.weak	_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i
	.type	_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i, @function
_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i:
.LFB12274:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12274
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%edx, %rbx
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	movb	_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip), %al
	testb	%al, %al
	jne	.L987
	leaq	_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip), %r14
	movq	%r14, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L987
	movq	%rsp, %rdi
	movl	$-1, (%rsp)
.LEHB8:
	call	cudaGetDeviceCount@PLT
	movl	%eax, %ebp
	call	cudaGetLastError@PLT
.LEHE8:
	testl	%ebp, %ebp
	sete	%dl
	testl	%eax, %eax
	setne	%al
	testb	%al, %dl
	jne	.L1014
	testl	%ebp, %ebp
	je	.L989
.L1014:
	movl	$-1, (%rsp)
.L989:
	movl	(%rsp), %eax
	movq	%r14, %rdi
	movl	%eax, _ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip)
	call	__cxa_guard_release@PLT
.L987:
	cmpl	_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip), %ebx
	jge	.L991
	testl	%ebx, %ebx
	js	.L991
	jmp	.L1035
.L1012:
	endbr64
	movq	%rax, %rbx
.L993:
	movq	%r14, %rdi
	call	__cxa_guard_abort@PLT
	jmp	.L1034
.L1035:
	imulq	$12, %rbx, %rbp
	addq	%r13, %rbp
	movl	0(%rbp), %eax
	cmpl	$2, %eax
	je	.L1009
	jmp	.L1036
.L991:
	movl	$101, %eax
	salq	$32, %rax
	jmp	.L997
.L1036:
	xorl	%eax, %eax
	movl	$1, %edx
	lock cmpxchgl	%edx, 0(%rbp)
	jne	.L998
	movl	(%r12), %eax
	leaq	4(%rsp), %rdi
	movl	%eax, (%rsp)
	xorl	%eax, %eax
	movl	%eax, 4(%rsp)
.LEHB9:
	call	cudaGetDevice@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L999
	call	cudaGetLastError@PLT
	leaq	.LC83(%rip), %rsi
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L1033
	jmp	.L1032
.L999:
	movl	(%rsp), %edi
	cmpl	%edi, 4(%rsp)
	je	.L1001
	call	cudaSetDevice@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L1001
	call	cudaGetLastError@PLT
	leaq	.LC7(%rip), %rsi
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L1032
.L1033:
	movl	%r12d, %edi
	call	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc
.LEHE9:
.L1001:
	leaq	8(%rsp), %rdi
	leaq	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rsi
	movq	%rsp, %r15
.LEHB10:
	call	cudaFuncGetAttributes@PLT
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
.LEHE10:
	movl	%eax, %r12d
	testl	%r14d, %r14d
	jne	.L1015
	testl	%eax, %eax
	jne	.L1003
.L1015:
	movl	%r14d, %r12d
.L1003:
	imull	$10, 40(%rsp), %eax
	movq	%r15, %rdi
	movl	%eax, 4(%rbp)
	call	_ZN4cuda3__423__ensure_current_deviceD1Ev
	movl	%r12d, 8(%rbp)
	testl	%r12d, %r12d
	je	.L1006
.LEHB11:
	call	cudaGetLastError@PLT
	jmp	.L1006
.L1013:
	endbr64
	movq	%rax, %rbx
.L1007:
	movq	%r15, %rdi
	call	_ZN4cuda3__423__ensure_current_deviceD1Ev
.L1034:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L1032
	movq	%rbx, %rdi
	call	_Unwind_Resume@PLT
.LEHE11:
.L1006:
	movl	$2, 0(%rbp)
	jmp	.L1009
.L998:
	decl	%eax
	jne	.L1009
.L1010:
	movl	0(%rbp), %eax
	cmpl	$2, %eax
	jne	.L1010
.L1009:
	imulq	$12, %rbx, %rbx
	movq	4(%r13,%rbx), %rax
.L997:
	movq	152(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L1011
.L1032:
	call	__stack_chk_fail@PLT
.L1011:
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12274:
	.section	.gcc_except_table._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,"aG",@progbits,_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,comdat
.LLSDA12274:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12274-.LLSDACSB12274
.LLSDACSB12274:
	.uleb128 .LEHB8-.LFB12274
	.uleb128 .LEHE8-.LEHB8
	.uleb128 .L1012-.LFB12274
	.uleb128 0
	.uleb128 .LEHB9-.LFB12274
	.uleb128 .LEHE9-.LEHB9
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB10-.LFB12274
	.uleb128 .LEHE10-.LEHB10
	.uleb128 .L1013-.LFB12274
	.uleb128 0
	.uleb128 .LEHB11-.LFB12274
	.uleb128 .LEHE11-.LEHB11
	.uleb128 0
	.uleb128 0
.LLSDACSE12274:
	.section	.text._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,"axG",@progbits,_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,comdat
	.size	_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i, .-_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i
	.section	.text._ZN3cub17CUB_200700_890_NS10PtxVersionERi,"axG",@progbits,_ZN3cub17CUB_200700_890_NS10PtxVersionERi,comdat
	.weak	_ZN3cub17CUB_200700_890_NS10PtxVersionERi
	.type	_ZN3cub17CUB_200700_890_NS10PtxVersionERi, @function
_ZN3cub17CUB_200700_890_NS10PtxVersionERi:
.LFB6930:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	4(%rsp), %r13
	movl	$-1, 4(%rsp)
	movq	%r13, %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	sete	%dl
	testl	%eax, %eax
	setne	%al
	testb	%al, %dl
	jne	.L1044
	testl	%ebx, %ebx
	jne	.L1044
	movl	4(%rsp), %r12d
	jmp	.L1038
.L1044:
	orl	$-1, %r12d
.L1038:
	movb	_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache(%rip), %al
	leaq	_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache(%rip), %rbx
	testb	%al, %al
	jne	.L1040
	leaq	_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache(%rip), %r14
	movq	%r14, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L1040
	movl	$384, %ecx
	xorl	%eax, %eax
	movq	%rbx, %rdi
	rep stosl
	movq	%r14, %rdi
	call	__cxa_guard_release@PLT
.L1040:
	movl	%r12d, %edx
	movq	%r13, %rsi
	movq	%rbx, %rdi
	movl	%r12d, 4(%rsp)
	call	_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i
	movq	%rax, %r12
	movq	%rax, %rbx
	call	cudaGetLastError@PLT
	shrq	$32, %r12
	orl	%r12d, %eax
	movl	%r12d, %r13d
	jne	.L1037
	movl	%ebx, 0(%rbp)
.L1037:
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L1043
	call	__stack_chk_fail@PLT
.L1043:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	movl	%r13d, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6930:
	.size	_ZN3cub17CUB_200700_890_NS10PtxVersionERi, .-_ZN3cub17CUB_200700_890_NS10PtxVersionERi
	.section	.rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.str1.1,"aMS",@progbits,1
.LC84:
	.string	"basic_string: construction from null is not valid"
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC5IS3_EEPKcRKS3_,comdat
	.align 2
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, @function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_:
.LFB12286:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	jne	.L1050
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L1055
	leaq	.LC84(%rip), %rdi
	call	_ZSt19__throw_logic_errorPKc@PLT
.L1050:
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	movq	%rsi, %rbp
	call	strlen@PLT
	movq	%rax, (%rsp)
	leaq	0(%rbp,%rax), %r12
	cmpq	$15, %rax
	jbe	.L1052
	movq	%rsp, %rsi
	xorl	%edx, %edx
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT
	movq	%rax, (%rbx)
	movq	(%rsp), %rax
	movq	%rax, 16(%rbx)
.L1052:
	movq	(%rbx), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	(%rsp), %rax
	movq	(%rbx), %rdx
	movq	%rax, 8(%rbx)
	movb	$0, (%rdx,%rax)
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L1053
.L1055:
	call	__stack_chk_fail@PLT
.L1053:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12286:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	.set	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei.str1.1,"aMS",@progbits,1
.LC85:
	.string	"Unknown error"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei:
.LFB8238:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA8238
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movb	_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %al
	testb	%al, %al
	jne	.L1058
	leaq	_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L1058
	leaq	_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %r13
	leaq	7(%rsp), %rdx
	leaq	.LC85(%rip), %rsi
	movq	%r13, %rdi
.LEHB12:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE12:
	movq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GOTPCREL(%rip), %rdi
	leaq	__dso_handle(%rip), %rdx
	movq	%r13, %rsi
	call	__cxa_atexit@PLT
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L1058:
	movl	%r12d, %edi
	call	strerror@PLT
	movq	%rax, %rsi
	testq	%rax, %rax
	je	.L1060
	leaq	7(%rsp), %rdx
	movq	%rbx, %rdi
.LEHB13:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	jmp	.L1056
.L1060:
	leaq	_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_@PLT
	jmp	.L1056
.L1065:
	endbr64
	movq	%rax, %rbx
.L1062:
	movq	%rbp, %rdi
	call	__cxa_guard_abort@PLT
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L1070
	movq	%rbx, %rdi
	call	_Unwind_Resume@PLT
.LEHE13:
.L1056:
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L1064
.L1070:
	call	__stack_chk_fail@PLT
.L1064:
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8238:
	.section	.gcc_except_table._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,comdat
.LLSDA8238:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE8238-.LLSDACSB8238
.LLSDACSB8238:
	.uleb128 .LEHB12-.LFB8238
	.uleb128 .LEHE12-.LEHB12
	.uleb128 .L1065-.LFB8238
	.uleb128 0
	.uleb128 .LEHB13-.LFB8238
	.uleb128 .LEHE13-.LEHB13
	.uleb128 0
	.uleb128 0
.LLSDACSE8238:
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,comdat
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei.str1.1,"aMS",@progbits,1
.LC86:
	.string	"unknown error"
.LC87:
	.string	"cudaErrorUnknown"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei
	.type	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei, @function
_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei:
.LFB8303:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA8303
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	movl	%edx, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
.LEHB14:
	call	cudaGetErrorString@PLT
	movl	%ebp, %edi
	movq	%rax, %rbx
	call	cudaGetErrorName@PLT
	movq	%rax, %rsi
	testq	%rbx, %rbx
	jne	.L1072
	leaq	.LC86(%rip), %rbx
.L1072:
	testq	%rsi, %rsi
	jne	.L1073
	leaq	.LC87(%rip), %rsi
.L1073:
	leaq	8(%rsp), %rbp
	leaq	7(%rsp), %rdx
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE14:
	leaq	.LC4(%rip), %rsi
	movq	%rbp, %rdi
.LEHB15:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT
.LEHE15:
	leaq	40(%rsp), %r13
	movq	%rax, %rsi
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT
	movq	%rbx, %rsi
	movq	%r13, %rdi
.LEHB16:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT
.LEHE16:
	movq	%rax, %rsi
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L1077
	jmp	.L1082
.L1081:
	endbr64
	movq	%rax, %rbx
.L1074:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L1075
.L1080:
	endbr64
	movq	%rax, %rbx
.L1075:
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L1082
	movq	%rbx, %rdi
.LEHB17:
	call	_Unwind_Resume@PLT
.LEHE17:
.L1082:
	call	__stack_chk_fail@PLT
.L1077:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	movq	%r12, %rax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8303:
	.section	.gcc_except_table._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,comdat
.LLSDA8303:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE8303-.LLSDACSB8303
.LLSDACSB8303:
	.uleb128 .LEHB14-.LFB8303
	.uleb128 .LEHE14-.LEHB14
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB15-.LFB8303
	.uleb128 .LEHE15-.LEHB15
	.uleb128 .L1080-.LFB8303
	.uleb128 0
	.uleb128 .LEHB16-.LFB8303
	.uleb128 .LEHE16-.LEHB16
	.uleb128 .L1081-.LFB8303
	.uleb128 0
	.uleb128 .LEHB17-.LFB8303
	.uleb128 .LEHE17-.LEHB17
	.uleb128 0
	.uleb128 0
.LLSDACSE8303:
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,comdat
	.size	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei, .-_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei
	.section	.text._ZNK6thrust20THRUST_200700_890_NS15iterator_facadeINS0_10device_ptrIjEEjNS0_8cuda_cub3tagENS0_27random_access_traversal_tagENS0_16device_referenceIjEElEdeEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS15iterator_facadeINS0_10device_ptrIjEEjNS0_8cuda_cub3tagENS0_27random_access_traversal_tagENS0_16device_referenceIjEElEdeEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS15iterator_facadeINS0_10device_ptrIjEEjNS0_8cuda_cub3tagENS0_27random_access_traversal_tagENS0_16device_referenceIjEElEdeEv
	.type	_ZNK6thrust20THRUST_200700_890_NS15iterator_facadeINS0_10device_ptrIjEEjNS0_8cuda_cub3tagENS0_27random_access_traversal_tagENS0_16device_referenceIjEElEdeEv, @function
_ZNK6thrust20THRUST_200700_890_NS15iterator_facadeINS0_10device_ptrIjEEjNS0_8cuda_cub3tagENS0_27random_access_traversal_tagENS0_16device_referenceIjEElEdeEv:
.LFB12827:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	ret
	.cfi_endproc
.LFE12827:
	.size	_ZNK6thrust20THRUST_200700_890_NS15iterator_facadeINS0_10device_ptrIjEEjNS0_8cuda_cub3tagENS0_27random_access_traversal_tagENS0_16device_referenceIjEElEdeEv, .-_ZNK6thrust20THRUST_200700_890_NS15iterator_facadeINS0_10device_ptrIjEEjNS0_8cuda_cub3tagENS0_27random_access_traversal_tagENS0_16device_referenceIjEElEdeEv
	.section	.rodata._ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC2ERNS0_16execution_policyIS4_EEm.str1.1,"aMS",@progbits,1
.LC88:
	.string	"device free failed"
.LC89:
	.string	"temporary_buffer::allocate: get_temporary_buffer failed"
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC2ERNS0_16execution_policyIS4_EEm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC5ERNS0_16execution_policyIS4_EEm,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC2ERNS0_16execution_policyIS4_EEm
	.type	_ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC2ERNS0_16execution_policyIS4_EEm, @function
_ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC2ERNS0_16execution_policyIS4_EEm:
.LFB12882:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12882
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%ecx, %ecx
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	movq	%rsi, (%rdi)
	movq	%rcx, 8(%rdi)
	movq	%rcx, 16(%rdi)
	testq	%rdx, %rdx
	je	.L1086
	movq	%rdx, %rbp
	leaq	16(%rsp), %r14
	xorl	%edx, %edx
	movq	%rbp, %rsi
	movq	%r14, %rdi
	movq	%rdx, 16(%rsp)
.LEHB18:
	call	cudaMalloc@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	je	.L1087
	call	cudaGetLastError@PLT
.LEHE18:
	movl	$40, %edi
	leaq	56(%rsp), %r12
	call	__cxa_allocate_exception@PLT
	movq	%rax, %rbp
	call	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv
	movl	%r13d, %edx
	movq	%r12, %rdi
	movq	%rax, %rsi
	movq	(%rax), %rax
.LEHB19:
	call	*48(%rax)
.LEHE19:
	leaq	24(%rsp), %r13
	movq	56(%rsp), %rsi
	leaq	15(%rsp), %rdx
	movq	%r13, %rdi
.LEHB20:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE20:
	movq	%r13, %rsi
	movq	%rbp, %rdi
.LEHB21:
	call	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.LEHE21:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L1111
.L1087:
	movq	16(%rsp), %rdi
	xorl	%eax, %eax
	testq	%rdi, %rdi
	cmovne	%rbp, %rax
	cmpq	%rbp, %rax
	jnb	.L1095
	jmp	.L1114
.L1106:
	endbr64
	movq	%rax, %rbx
.L1091:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L1098
.L1105:
	endbr64
	jmp	.L1113
.L1104:
	endbr64
	jmp	.L1112
.L1114:
	call	cudaFree@PLT
	leaq	.LC88(%rip), %rsi
	leaq	56(%rsp), %r12
	movl	%eax, %edi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	movl	$40, %edi
	call	__cxa_allocate_exception@PLT
	movq	%r14, %rdx
	leaq	.LC89(%rip), %rsi
	movq	%r12, %rdi
	movq	%rax, %rbp
.LEHB22:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE22:
	movq	%r12, %rsi
	movq	%rbp, %rdi
.LEHB23:
	call	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.LEHE23:
.L1111:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L1110
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev(%rip), %rdx
	leaq	_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rsi
	movq	%rbp, %rdi
.LEHB24:
	call	__cxa_throw@PLT
.L1095:
	movq	%rdi, 8(%rbx)
	movq	%rbp, 16(%rbx)
	jmp	.L1085
.L1103:
	endbr64
.L1113:
	movq	%rax, %rbx
.L1098:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L1099
.L1102:
	endbr64
.L1112:
	movq	%rax, %rbx
.L1099:
	movq	%rbp, %rdi
	call	__cxa_free_exception@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L1110
	movq	%rbx, %rdi
	call	_Unwind_Resume@PLT
.LEHE24:
.L1086:
	xorl	%eax, %eax
	movq	%rax, 8(%rdi)
.L1085:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L1101
.L1110:
	call	__stack_chk_fail@PLT
.L1101:
	addq	$96, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12882:
	.section	.gcc_except_table._ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC2ERNS0_16execution_policyIS4_EEm,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC5ERNS0_16execution_policyIS4_EEm,comdat
.LLSDA12882:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12882-.LLSDACSB12882
.LLSDACSB12882:
	.uleb128 .LEHB18-.LFB12882
	.uleb128 .LEHE18-.LEHB18
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB19-.LFB12882
	.uleb128 .LEHE19-.LEHB19
	.uleb128 .L1104-.LFB12882
	.uleb128 0
	.uleb128 .LEHB20-.LFB12882
	.uleb128 .LEHE20-.LEHB20
	.uleb128 .L1105-.LFB12882
	.uleb128 0
	.uleb128 .LEHB21-.LFB12882
	.uleb128 .LEHE21-.LEHB21
	.uleb128 .L1106-.LFB12882
	.uleb128 0
	.uleb128 .LEHB22-.LFB12882
	.uleb128 .LEHE22-.LEHB22
	.uleb128 .L1102-.LFB12882
	.uleb128 0
	.uleb128 .LEHB23-.LFB12882
	.uleb128 .LEHE23-.LEHB23
	.uleb128 .L1103-.LFB12882
	.uleb128 0
	.uleb128 .LEHB24-.LFB12882
	.uleb128 .LEHE24-.LEHB24
	.uleb128 0
	.uleb128 0
.LLSDACSE12882:
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC2ERNS0_16execution_policyIS4_EEm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC5ERNS0_16execution_policyIS4_EEm,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC2ERNS0_16execution_policyIS4_EEm, .-_ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC2ERNS0_16execution_policyIS4_EEm
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC1ERNS0_16execution_policyIS4_EEm
	.set	_ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC1ERNS0_16execution_policyIS4_EEm,_ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC2ERNS0_16execution_policyIS4_EEm
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	.type	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv, @function
_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv:
.LFB12887:
	.cfi_startproc
	endbr64
	movq	8(%rdi), %rax
	ret
	.cfi_endproc
.LFE12887:
	.size	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	.section	.rodata
	.align 32
.LC0:
	.value	3
	.value	48
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.quad	0
	.long	0
	.zero	4
	.quad	0
	.section	.text._ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_,"axG",@progbits,_ZN5nvtx32v116event_attributesC5IJEEERKNS0_7messageEDpRKT_,comdat
	.align 2
	.weak	_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_
	.type	_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_, @function
_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_:
.LFB12961:
	.cfi_startproc
	endbr64
	movq	%rsi, %rdx
	movq	%rdi, %rax
	movl	$12, %ecx
	leaq	.LC0(%rip), %rsi
	rep movsl
	movq	8(%rdx), %rcx
	movl	(%rdx), %edx
	movq	%rcx, 40(%rax)
	movl	%edx, 32(%rax)
	ret
	.cfi_endproc
.LFE12961:
	.size	_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_, .-_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_
	.weak	_ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_
	.set	_ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_,_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv
	.type	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv, @function
_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv:
.LFB13042:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA13042
	endbr64
	cmpq	$0, 16(%rdi)
	je	.L1120
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movq	8(%rdi), %rdi
	call	cudaFree@PLT
	leaq	.LC88(%rip), %rsi
	movl	%eax, %edi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	xorl	%eax, %eax
	movq	%rax, 8(%rbx)
	movq	%rax, 16(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
.L1120:
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE13042:
	.section	.gcc_except_table._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv,comdat
.LLSDA13042:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE13042-.LLSDACSB13042
.LLSDACSB13042:
.LLSDACSE13042:
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv
	.section	.rodata._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v.str1.1,"aMS",@progbits,1
.LC90:
	.string	"CCCL"
	.section	.text._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,"axG",@progbits,_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,comdat
	.weak	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	.type	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v, @function
_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v:
.LFB13078:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA13078
	endbr64
	movb	_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %al
	testb	%al, %al
	jne	.L1133
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %rbx
	movq	%rbx, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L1125
	movq	480+nvtxGlobals_v3(%rip), %rdx
	xorl	%eax, %eax
	testq	%rdx, %rdx
	je	.L1127
	leaq	.LC90(%rip), %rdi
	call	*%rdx
.L1127:
	movq	%rbx, %rdi
	movq	%rax, _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip)
	call	__cxa_guard_release@PLT
.L1125:
	leaq	_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
.L1133:
	.cfi_restore 3
	leaq	_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %rax
	ret
	.cfi_endproc
.LFE13078:
	.section	.gcc_except_table._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,"aG",@progbits,_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,comdat
.LLSDA13078:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE13078-.LLSDACSB13078
.LLSDACSB13078:
.LLSDACSE13078:
	.section	.text._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,"axG",@progbits,_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,comdat
	.size	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v, .-_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	.section	.text._ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc,"axG",@progbits,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC5EPKc,comdat
	.align 2
	.weak	_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc
	.type	_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc, @function
_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc:
.LFB13021:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA13021
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movq	%rsi, 8(%rsp)
	call	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	movq	464+nvtxGlobals_v3(%rip), %rdx
	movq	(%rax), %rdi
	xorl	%eax, %eax
	testq	%rdx, %rdx
	je	.L1137
	movq	8(%rsp), %rsi
	call	*%rdx
.L1137:
	movq	%rax, (%rbx)
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE13021:
	.section	.gcc_except_table._ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc,"aG",@progbits,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC5EPKc,comdat
.LLSDA13021:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE13021-.LLSDACSB13021
.LLSDACSB13021:
.LLSDACSE13021:
	.section	.text._ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc,"axG",@progbits,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC5EPKc,comdat
	.size	_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc, .-_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc
	.weak	_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc
	.set	_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc
	.text
	.align 2
	.type	_ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0, @function
_ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0:
.LFB13527:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA13527
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 32
	cmpb	$0, 1(%rdi)
	je	.L1142
	call	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	movq	(%rax), %rdi
	call	nvtxDomainRangePop
	movb	$0, 1(%rbx)
.L1142:
	call	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	movq	(%rax), %rdi
	movq	416+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L1143
	movq	%rbp, %rsi
	call	*%rax
.L1143:
	movb	$1, 1(%rbx)
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE13527:
	.section	.gcc_except_table,"a",@progbits
.LLSDA13527:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE13527-.LLSDACSB13527
.LLSDACSB13527:
.LLSDACSE13527:
	.text
	.size	_ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0, .-_ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0
	.section	.text._ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev,"axG",@progbits,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED5Ev,comdat
	.align 2
	.weak	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	.hidden	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	.type	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev, @function
_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev:
.LFB13018:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA13018
	endbr64
	cmpb	$0, 1(%rdi)
	je	.L1151
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	movq	(%rax), %rdi
	call	nvtxDomainRangePop
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
.L1151:
	ret
	.cfi_endproc
.LFE13018:
	.section	.gcc_except_table
.LLSDA13018:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE13018-.LLSDACSB13018
.LLSDACSB13018:
.LLSDACSE13018:
	.section	.text._ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev,"axG",@progbits,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED5Ev,comdat
	.size	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev, .-_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	.weak	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED1Ev
	.hidden	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED1Ev
	.set	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED1Ev,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	.section	.text._ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	.hidden	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_:
.LFB13274:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rsi, %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 32
	movq	(%rdi), %rax
	movq	12(%rdi), %rdx
	movl	20(%rdi), %ecx
	movl	8(%rdi), %esi
	movq	32(%rdi), %r9
	movq	24(%rdi), %r8
	movq	%rax, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L1155
	movq	0(%rbp), %rdi
	call	*%rbx
.L1155:
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE13274:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	.section	.text._ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjhyNS0_21DeviceRadixSortPolicyIjhyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKhPhSA_yiiSC_S5_EEC2Ev,"axG",@progbits,_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjhyNS0_21DeviceRadixSortPolicyIjhyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKhPhSA_yiiSC_S5_EEC5Ev,comdat
	.align 2
	.weak	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjhyNS0_21DeviceRadixSortPolicyIjhyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKhPhSA_yiiSC_S5_EEC2Ev
	.type	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjhyNS0_21DeviceRadixSortPolicyIjhyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKhPhSA_yiiSC_S5_EEC2Ev, @function
_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjhyNS0_21DeviceRadixSortPolicyIjhyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKhPhSA_yiiSC_S5_EEC2Ev:
.LFB13365:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	movq	%rax, 8(%rdi)
	movq	%rax, 16(%rdi)
	movq	%rax, 32(%rdi)
	movq	%rax, 40(%rdi)
	movq	%rax, 56(%rdi)
	movq	%rax, 64(%rdi)
	movq	%rax, 88(%rdi)
	movq	%rax, 96(%rdi)
	movq	%rax, 104(%rdi)
	movq	%rax, 112(%rdi)
	movq	%rax, 120(%rdi)
	movl	%edx, 128(%rdi)
	movq	%rcx, 136(%rdi)
	movq	%rcx, 144(%rdi)
	movq	%rcx, 152(%rdi)
	ret
	.cfi_endproc
.LFE13365:
	.size	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjhyNS0_21DeviceRadixSortPolicyIjhyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKhPhSA_yiiSC_S5_EEC2Ev, .-_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjhyNS0_21DeviceRadixSortPolicyIjhyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKhPhSA_yiiSC_S5_EEC2Ev
	.weak	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjhyNS0_21DeviceRadixSortPolicyIjhyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKhPhSA_yiiSC_S5_EEC1Ev
	.set	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjhyNS0_21DeviceRadixSortPolicyIjhyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKhPhSA_yiiSC_S5_EEC1Ev,_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjhyNS0_21DeviceRadixSortPolicyIjhyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKhPhSA_yiiSC_S5_EEC2Ev
	.section	.text._ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjjyNS0_21DeviceRadixSortPolicyIjjyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjS9_SH_SA_yiiSC_S5_EEC2Ev,"axG",@progbits,_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjjyNS0_21DeviceRadixSortPolicyIjjyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjS9_SH_SA_yiiSC_S5_EEC5Ev,comdat
	.align 2
	.weak	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjjyNS0_21DeviceRadixSortPolicyIjjyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjS9_SH_SA_yiiSC_S5_EEC2Ev
	.type	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjjyNS0_21DeviceRadixSortPolicyIjjyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjS9_SH_SA_yiiSC_S5_EEC2Ev, @function
_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjjyNS0_21DeviceRadixSortPolicyIjjyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjS9_SH_SA_yiiSC_S5_EEC2Ev:
.LFB13371:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	movq	%rax, 8(%rdi)
	movq	%rax, 16(%rdi)
	movq	%rax, 32(%rdi)
	movq	%rax, 40(%rdi)
	movq	%rax, 56(%rdi)
	movq	%rax, 64(%rdi)
	movq	%rax, 88(%rdi)
	movq	%rax, 96(%rdi)
	movq	%rax, 104(%rdi)
	movq	%rax, 112(%rdi)
	movq	%rax, 120(%rdi)
	movl	%edx, 128(%rdi)
	movq	%rcx, 136(%rdi)
	movq	%rcx, 144(%rdi)
	movq	%rcx, 152(%rdi)
	ret
	.cfi_endproc
.LFE13371:
	.size	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjjyNS0_21DeviceRadixSortPolicyIjjyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjS9_SH_SA_yiiSC_S5_EEC2Ev, .-_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjjyNS0_21DeviceRadixSortPolicyIjjyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjS9_SH_SA_yiiSC_S5_EEC2Ev
	.weak	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjjyNS0_21DeviceRadixSortPolicyIjjyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjS9_SH_SA_yiiSC_S5_EEC1Ev
	.set	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjjyNS0_21DeviceRadixSortPolicyIjjyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjS9_SH_SA_yiiSC_S5_EEC1Ev,_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjjyNS0_21DeviceRadixSortPolicyIjjyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjS9_SH_SA_yiiSC_S5_EEC2Ev
	.section	.text._ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjtyNS0_21DeviceRadixSortPolicyIjtyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKtPtSA_yiiSC_S5_EEC2Ev,"axG",@progbits,_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjtyNS0_21DeviceRadixSortPolicyIjtyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKtPtSA_yiiSC_S5_EEC5Ev,comdat
	.align 2
	.weak	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjtyNS0_21DeviceRadixSortPolicyIjtyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKtPtSA_yiiSC_S5_EEC2Ev
	.type	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjtyNS0_21DeviceRadixSortPolicyIjtyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKtPtSA_yiiSC_S5_EEC2Ev, @function
_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjtyNS0_21DeviceRadixSortPolicyIjtyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKtPtSA_yiiSC_S5_EEC2Ev:
.LFB13377:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	movq	%rax, 8(%rdi)
	movq	%rax, 16(%rdi)
	movq	%rax, 32(%rdi)
	movq	%rax, 40(%rdi)
	movq	%rax, 56(%rdi)
	movq	%rax, 64(%rdi)
	movq	%rax, 88(%rdi)
	movq	%rax, 96(%rdi)
	movq	%rax, 104(%rdi)
	movq	%rax, 112(%rdi)
	movq	%rax, 120(%rdi)
	movl	%edx, 128(%rdi)
	movq	%rcx, 136(%rdi)
	movq	%rcx, 144(%rdi)
	movq	%rcx, 152(%rdi)
	ret
	.cfi_endproc
.LFE13377:
	.size	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjtyNS0_21DeviceRadixSortPolicyIjtyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKtPtSA_yiiSC_S5_EEC2Ev, .-_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjtyNS0_21DeviceRadixSortPolicyIjtyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKtPtSA_yiiSC_S5_EEC2Ev
	.weak	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjtyNS0_21DeviceRadixSortPolicyIjtyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKtPtSA_yiiSC_S5_EEC1Ev
	.set	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjtyNS0_21DeviceRadixSortPolicyIjtyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKtPtSA_yiiSC_S5_EEC1Ev,_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjtyNS0_21DeviceRadixSortPolicyIjtyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKtPtSA_yiiSC_S5_EEC2Ev
	.section	.text._ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii,"axG",@progbits,_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii,comdat
	.weak	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	.hidden	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	.type	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii, @function
_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii:
.LFB13421:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movslq	%ecx, %rcx
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS4_6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1163
	testl	%eax, %eax
	jne	.L1160
.L1163:
	movl	%ebx, %eax
.L1160:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE13421:
	.size	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii, .-_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	.section	.text._ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii,"axG",@progbits,_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii,comdat
	.weak	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii
	.hidden	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii
	.type	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii, @function
_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii:
.LFB13422:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movslq	%ecx, %rcx
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyiEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1171
	testl	%eax, %eax
	jne	.L1168
.L1171:
	movl	%ebx, %eax
.L1168:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE13422:
	.size	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii, .-_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii
	.section	.text._ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKhPhPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii,"axG",@progbits,_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKhPhPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii,comdat
	.weak	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKhPhPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	.hidden	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKhPhPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	.type	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKhPhPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii, @function
_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKhPhPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii:
.LFB13423:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movslq	%ecx, %rcx
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPKjPjPKhPhPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS8_6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1179
	testl	%eax, %eax
	jne	.L1176
.L1179:
	movl	%ebx, %eax
.L1176:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE13423:
	.size	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKhPhPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii, .-_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKhPhPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	.section	.rodata._ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st.str1.1,"aMS",@progbits,1
.LC91:
	.string	"cub::DeviceRadixSort"
	.section	.text._ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,"axG",@progbits,_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,comdat
	.weak	_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st
	.type	_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st, @function
_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st:
.LFB12920:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12920
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	.cfi_offset 15, -24
	movq	%rdx, %r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	movq	%rcx, %r12
	pushq	%rbx
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$2728, %rsp
	movq	24(%rbp), %rax
	movq	%rsi, -2696(%rbp)
	movq	%r8, -2680(%rbp)
	movl	%r9d, -2684(%rbp)
	movq	%rax, -2672(%rbp)
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	movw	$0, -2646(%rbp)
	movb	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name(%rip), %al
	testb	%al, %al
	jne	.L1186
	leaq	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L1186
	leaq	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi
	leaq	.LC91(%rip), %rsi
	call	_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc
	leaq	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi
	call	__cxa_guard_release@PLT
.L1186:
	movb	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr(%rip), %al
	testb	%al, %al
	jne	.L1189
	leaq	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L1189
	movq	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name(%rip), %rax
	leaq	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi
	leaq	-336(%rbp), %rsi
	movl	$3, -336(%rbp)
	movq	%rax, -328(%rbp)
	call	_ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_
	leaq	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi
	call	__cxa_guard_release@PLT
.L1189:
	testq	%rbx, %rbx
	je	.L1191
	leaq	-2646(%rbp), %rdi
	leaq	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rsi
	call	_ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0
.L1191:
	xorl	%r11d, %r11d
	leaq	-2644(%rbp), %rdi
	movl	%r11d, -2644(%rbp)
.LEHB25:
	call	_ZN3cub17CUB_200700_890_NS10PtxVersionERi
	movl	%eax, -2664(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2664(%rbp)
	jne	.L1451
	testl	%eax, %eax
	jne	.L1192
	cmpl	$0, -2664(%rbp)
	jne	.L1451
	movq	-2696(%rbp), %rax
	cmpq	$0, -2680(%rbp)
	movq	%rbx, -560(%rbp)
	movl	-2644(%rbp), %edx
	movl	-2684(%rbp), %esi
	movq	%r15, -544(%rbp)
	movq	%rax, -552(%rbp)
	movq	-2680(%rbp), %rax
	movq	%r12, -536(%rbp)
	movq	%rax, -528(%rbp)
	movl	-2684(%rbp), %eax
	movl	%edx, -504(%rbp)
	movl	%eax, -520(%rbp)
	movl	16(%rbp), %eax
	movb	$1, -500(%rbp)
	movl	%eax, -516(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -512(%rbp)
	sete	%al
	cmpl	16(%rbp), %esi
	sete	%cl
	orl	%ecx, %eax
	cmpl	$899, %edx
	jg	.L1194
	cmpl	$799, %edx
	jg	.L1195
	cmpl	$699, %edx
	jg	.L1196
	cmpl	$619, %edx
	jg	.L1197
	cmpl	$609, %edx
	jg	.L1198
	cmpl	$599, %edx
	jg	.L1199
	cmpl	$499, %edx
	jg	.L1200
	testb	%al, %al
	je	.L1201
.L1241:
	testq	%rbx, %rbx
	jne	.L1203
.L1202:
	movq	-2696(%rbp), %rax
	movq	$1, (%rax)
	jmp	.L1203
.L1201:
	cmpq	$1152, -2680(%rbp)
	ja	.L1205
	testq	%rbx, %rbx
	je	.L1202
	movabsq	$4294967297, %rax
	xorl	%r9d, %r9d
	movabsq	$549755813889, %rsi
	movq	%rax, -1520(%rbp)
	leaq	-2344(%rbp), %rcx
	leaq	-1520(%rbp), %rdi
	movq	%rax, -1504(%rbp)
	movq	-2672(%rbp), %rax
	leaq	-2336(%rbp), %r8
	movq	%rsi, -1512(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -1488(%rbp)
	movslq	16(%r12), %rax
	movq	%r9, -1496(%rbp)
	leaq	-2328(%rbp), %r9
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2336(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2328(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2352(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2344(%rbp)
	leaq	-2352(%rbp), %rdx
	pushq	%r10
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1562
	testl	%eax, %eax
	jne	.L1203
.L1562:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L1203
.L1205:
	leaq	-960(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L1563
	testl	%eax, %eax
	jne	.L1209
.L1563:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L1209
	movl	-960(%rbp), %edx
	leaq	-920(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L1564
	testl	%eax, %eax
	jne	.L1209
.L1564:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L1209
	leaq	-496(%rbp), %rdi
	leaq	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_i(%rip), %r14
	call	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjhyNS0_21DeviceRadixSortPolicyIjhyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKhPhSA_yiiSC_S5_EEC1Ev
	leaq	-336(%rbp), %rdi
	call	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjhyNS0_21DeviceRadixSortPolicyIjhyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKhPhSA_yiiSC_S5_EEC1Ev
	movl	-920(%rbp), %eax
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	xorl	%ecx, %ecx
	leaq	-476(%rbp), %rdi
	movl	$128, %edx
	movq	%rsi, -496(%rbp)
	movl	%eax, -2704(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rax
	movq	%rax, -448(%rbp)
	movabsq	$274877906950, %rax
	movq	%rax, -424(%rbp)
	movl	$301989889, %eax
	salq	$7, %rax
	movq	%r14, -472(%rbp)
	movq	%rax, -488(%rbp)
	movl	$1152, -480(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L1565
	testl	%eax, %eax
	jne	.L1209
.L1565:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L1209
	movl	$8388609, %eax
	xorl	%ecx, %ecx
	movl	$1024, %edx
	movq	%r14, %rsi
	salq	$10, %rax
	leaq	-452(%rbp), %rdi
	movl	$2048, -456(%rbp)
	movq	%rax, -464(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L1566
	testl	%eax, %eax
	jne	.L1209
.L1566:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L1209
	movl	$301989889, %eax
	leaq	-428(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$128, %edx
	salq	$7, %rax
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	movl	$1152, -432(%rbp)
	movq	%rax, -440(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKhPhPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L1457
	testl	%eax, %eax
	jne	.L1209
	testl	%r13d, %r13d
	jne	.L1457
	movl	-432(%rbp), %eax
	movl	-480(%rbp), %ecx
	leaq	-316(%rbp), %rdi
	movq	%r14, -312(%rbp)
	movl	-2704(%rbp), %r13d
	imull	-428(%rbp), %r13d
	movl	$1920, -320(%rbp)
	cmpl	%eax, %ecx
	cmovl	%eax, %ecx
	movq	-2680(%rbp), %rax
	xorl	%edx, %edx
	leal	0(%r13,%r13,4), %r13d
	movslq	%ecx, %rsi
	movq	%rax, -360(%rbp)
	movq	%rax, -352(%rbp)
	movq	%rax, -376(%rbp)
	divq	%rsi
	movl	%r13d, -416(%rbp)
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	cmpl	%eax, %r13d
	movl	%eax, -408(%rbp)
	cmovg	%eax, %r13d
	cltd
	idivl	%r13d
	movl	%r13d, -368(%rbp)
	movl	-920(%rbp), %r13d
	imull	%ecx, %eax
	movl	%edx, -404(%rbp)
	imull	%edx, %ecx
	movl	$128, %edx
	cltq
	addq	%rax, %rsi
	movq	%rax, -392(%rbp)
	movslq	%ecx, %rcx
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rax
	movq	%rax, -288(%rbp)
	movabsq	$137438953477, %rax
	movq	%rax, -264(%rbp)
	movl	$503316481, %eax
	movq	%rcx, -384(%rbp)
	salq	$7, %rax
	xorl	%ecx, %ecx
	movq	%rsi, -400(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	movq	%rsi, -336(%rbp)
	movq	%rax, -328(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, -2704(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2704(%rbp)
	jne	.L1568
	testl	%eax, %eax
	jne	.L1209
.L1568:
	movl	-2704(%rbp), %eax
	testl	%eax, %eax
	jne	.L1209
	movl	$8388609, %eax
	xorl	%ecx, %ecx
	movl	$1024, %edx
	movq	%r14, %rsi
	salq	$10, %rax
	leaq	-292(%rbp), %rdi
	movl	$2048, -296(%rbp)
	movq	%rax, -304(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	testl	%r14d, %r14d
	jne	.L1569
	testl	%eax, %eax
	jne	.L1209
.L1569:
	movl	%r14d, %eax
	testl	%r14d, %r14d
	jne	.L1209
	movl	$503316481, %eax
	leaq	-268(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$128, %edx
	salq	$7, %rax
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	movl	$1920, -272(%rbp)
	movq	%rax, -280(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKhPhPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	testl	%r14d, %r14d
	jne	.L1462
	testl	%eax, %eax
	jne	.L1209
	testl	%r14d, %r14d
	jne	.L1462
	movl	-272(%rbp), %eax
	movl	-320(%rbp), %ecx
	imull	-268(%rbp), %r13d
	cmpl	%eax, %ecx
	cmovl	%eax, %ecx
	movq	-2680(%rbp), %rax
	xorl	%edx, %edx
	leal	0(%r13,%r13,4), %r13d
	movslq	%ecx, %rsi
	movq	%rax, -200(%rbp)
	movq	%rax, -192(%rbp)
	movq	%rax, -216(%rbp)
	divq	%rsi
	movl	%r13d, -256(%rbp)
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	cmpl	%eax, %r13d
	movl	%eax, %edi
	movl	%eax, -248(%rbp)
	cmovle	%r13d, %edi
	cltd
	idivl	%edi
	movl	%edi, -208(%rbp)
	imull	%ecx, %eax
	movl	%edx, -244(%rbp)
	imull	%edx, %ecx
	cltq
	addq	%rax, %rsi
	movq	%rax, -232(%rbp)
	movl	-416(%rbp), %eax
	movslq	%ecx, %rcx
	movq	%rcx, -224(%rbp)
	cmpl	%eax, %r13d
	movq	%rsi, -240(%rbp)
	cmovge	%r13d, %eax
	imull	-420(%rbp), %eax
	xorl	%r8d, %r8d
	xorl	%edx, %edx
	addl	-456(%rbp), %eax
	movq	%r8, -168(%rbp)
	cltq
	movq	%r8, -160(%rbp)
	salq	$3, %rax
	movq	%rax, -176(%rbp)
	xorl	%eax, %eax
.L1218:
	movq	-176(%rbp,%rdx), %rsi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rsi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$24, %rdx
	jne	.L1218
	movq	-2696(%rbp), %rsi
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L1219
	xorl	%edi, %edi
	movq	%rax, (%rsi)
	movq	%rdi, -2696(%rbp)
	jmp	.L1220
.L1219:
	cmpq	%rax, (%rsi)
	jnb	.L1221
	call	cudaGetLastError@PLT
	xorl	%esi, %esi
	movl	$1, %r14d
	movq	%rsi, -2696(%rbp)
	jmp	.L1220
.L1221:
	leaq	255(%rbx), %rax
	xorb	%al, %al
	addq	-96(%rbp), %rax
	movq	%rax, -2696(%rbp)
.L1220:
	call	cudaGetLastError@PLT
	testl	$1, %r14d
	jne	.L1571
	testl	%eax, %eax
	jne	.L1209
.L1571:
	testl	%r14d, %r14d
	jne	.L1462
	testq	%rbx, %rbx
	je	.L1203
	movl	-2684(%rbp), %eax
	movl	16(%rbp), %edi
	movl	-424(%rbp), %ecx
	movl	-2684(%rbp), %ebx
	subl	%eax, %edi
	movl	%edi, %eax
	movl	%ebx, -880(%rbp)
	leaq	-496(%rbp), %rbx
	cltd
	movq	%rbx, -2664(%rbp)
	idivl	%ecx
	cmpl	$1, %edx
	movslq	16(%r15), %rdx
	sbbl	$-1, %eax
	imull	%eax, %ecx
	movl	%eax, -2704(%rbp)
	movl	-2684(%rbp), %eax
	subl	%edi, %ecx
	imull	-264(%rbp), %ecx
	addl	%eax, %ecx
	cmpl	16(%rbp), %ecx
	cmovg	16(%rbp), %ecx
	movq	%rdx, %rax
	xorl	$1, %eax
	movq	(%r15,%rdx,8), %rdx
	movl	%ecx, -2712(%rbp)
	movslq	16(%r12), %rcx
	cltq
	movq	(%r15,%rax,8), %rsi
	movl	-2712(%rbp), %r10d
	movq	%rdx, -128(%rbp)
	movq	%rcx, %rax
	movq	(%r12,%rcx,8), %rcx
	xorl	$1, %eax
	movq	%rsi, -136(%rbp)
	cltq
	movq	%rcx, -88(%rbp)
	movq	(%r12,%rax,8), %rax
	movq	%rax, -96(%rbp)
	cmpl	%r10d, -2684(%rbp)
	jge	.L1224
	leaq	-336(%rbp), %rbx
	movq	%rbx, -2664(%rbp)
.L1224:
	movq	%rax, -720(%rbp)
	movq	-2696(%rbp), %rax
	leaq	-880(%rbp), %r9
	leaq	-528(%rbp), %r8
	movq	%rsi, -640(%rbp)
	movq	-2664(%rbp), %rsi
	movq	%rax, -760(%rbp)
	movq	-2664(%rbp), %rax
	movq	%rdx, -600(%rbp)
	movl	76(%rsi), %edx
	leaq	88(%rsi), %r14
	movl	72(%rax), %eax
	movq	%rcx, -680(%rbp)
	cmpl	%eax, %edi
	cmovle	%edi, %eax
	xorl	%ecx, %ecx
	leaq	-1400(%rbp), %rdi
	movq	%rcx, -1376(%rbp)
	leaq	-760(%rbp), %rcx
	movl	%eax, -2680(%rbp)
	movl	%eax, -840(%rbp)
	movq	-2664(%rbp), %rax
	movl	128(%rax), %eax
	imull	%eax, %edx
	movl	%eax, -1400(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1396(%rbp)
	movq	%rax, -1384(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -800(%rbp)
	movl	8(%rsi), %edx
	movq	%rax, -1368(%rbp)
	leaq	-840(%rbp), %rax
	movq	(%rsi), %rsi
	movl	%edx, -1388(%rbp)
	leaq	-600(%rbp), %rdx
	pushq	%r14
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r13d, %r13d
	jne	.L1572
	testl	%eax, %eax
	jne	.L1229
.L1572:
	movl	%r13d, %ebx
	testl	%r13d, %r13d
	jne	.L1229
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L1229
	movq	-2664(%rbp), %rax
	leaq	-800(%rbp), %rcx
	movq	$1, -1432(%rbp)
	leaq	-1440(%rbp), %rdi
	movl	32(%rax), %edx
	movabsq	$4294967297, %rax
	movq	%rax, -1440(%rbp)
	movq	%rax, -1424(%rbp)
	xorl	%eax, %eax
	movq	%rax, -1416(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1428(%rbp)
	leaq	-760(%rbp), %rdx
	movq	%rax, -1408(%rbp)
	movq	-2664(%rbp), %rax
	movq	24(%rax), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r13d, %r13d
	jne	.L1573
	testl	%eax, %eax
	jne	.L1229
.L1573:
	movl	%r13d, %ebx
	testl	%r13d, %r13d
	jne	.L1229
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L1229
	movq	-2664(%rbp), %rax
	xorl	%r13d, %r13d
	leaq	-640(%rbp), %rcx
	leaq	-1480(%rbp), %rdi
	movq	%r13, -1456(%rbp)
	leaq	-720(%rbp), %r9
	leaq	-680(%rbp), %r8
	movl	56(%rax), %edx
	movl	128(%rax), %eax
	movl	%eax, -1480(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1476(%rbp)
	movq	%rax, -1464(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1468(%rbp)
	leaq	-600(%rbp), %rdx
	movq	%rax, -1448(%rbp)
	movq	-2664(%rbp), %rax
	movq	48(%rax), %rsi
	pushq	%rax
	leaq	-840(%rbp), %rax
	pushq	%r14
	pushq	%rax
	leaq	-880(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	leaq	-760(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x30
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$48, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1229
	testl	%eax, %eax
	jne	.L1466
	testl	%ebx, %ebx
	jne	.L1229
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L1229
	movl	-2684(%rbp), %eax
	movl	-2680(%rbp), %esi
	addl	%esi, %eax
	movl	%eax, -880(%rbp)
	jmp	.L1229
.L1466:
	movl	%eax, %ebx
.L1229:
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1467
	testl	%eax, %eax
	jne	.L1209
	movabsq	$4294967297, %r13
	testl	%ebx, %ebx
	jne	.L1467
.L1231:
	movl	-880(%rbp), %esi
	movl	%esi, -2680(%rbp)
	cmpl	%esi, 16(%rbp)
	jle	.L2017
	leaq	-496(%rbp), %rsi
	movl	-2680(%rbp), %edi
	movq	%rsi, -2664(%rbp)
	cmpl	%edi, -2712(%rbp)
	jle	.L1232
	leaq	-336(%rbp), %rsi
	movq	%rsi, -2664(%rbp)
.L1232:
	movl	%eax, %esi
	cltq
	movq	%r13, -1276(%rbp)
	leaq	-1280(%rbp), %rdi
	xorl	$1, %esi
	movq	%r13, -1264(%rbp)
	leaq	-880(%rbp), %r9
	leaq	-528(%rbp), %r8
	movslq	%esi, %rdx
	movl	%esi, -2684(%rbp)
	movq	-96(%rbp,%rax,8), %rsi
	movq	-136(%rbp,%rax,8), %rax
	movq	-96(%rbp,%rdx,8), %rcx
	movq	-136(%rbp,%rdx,8), %rdx
	movq	%rsi, -680(%rbp)
	movq	%rax, -600(%rbp)
	movq	-2696(%rbp), %rax
	movq	%rdx, -640(%rbp)
	movl	16(%rbp), %edx
	movq	%rax, -760(%rbp)
	movl	-2680(%rbp), %eax
	movq	-2664(%rbp), %rsi
	movq	%rcx, -720(%rbp)
	leaq	-760(%rbp), %rcx
	subl	%eax, %edx
	movq	-2664(%rbp), %rax
	movl	72(%rax), %eax
	cmpl	%eax, %edx
	cmovle	%edx, %eax
	movl	76(%rsi), %edx
	xorl	%ebx, %ebx
	movq	%rbx, -1256(%rbp)
	movl	%eax, -2720(%rbp)
	movl	%eax, -840(%rbp)
	movq	-2664(%rbp), %rax
	movl	128(%rax), %eax
	imull	%eax, %edx
	movl	%eax, -1280(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1248(%rbp)
	movq	%rsi, %rax
	movl	%edx, -800(%rbp)
	movl	8(%rsi), %edx
	addq	$88, %rax
	movq	%rax, -2728(%rbp)
	movl	%edx, -1268(%rbp)
	leaq	-600(%rbp), %rdx
	pushq	%rax
	leaq	-840(%rbp), %rax
	movq	(%rsi), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%r10
	popq	%r11
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r14d, %r14d
	jne	.L1576
	testl	%eax, %eax
	jne	.L1237
.L1576:
	movl	%r14d, %ebx
	testl	%r14d, %r14d
	jne	.L1237
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L1237
	movq	-2664(%rbp), %rax
	xorl	%r9d, %r9d
	movq	$1, -1312(%rbp)
	leaq	-800(%rbp), %rcx
	leaq	-760(%rbp), %rdx
	leaq	-1320(%rbp), %rdi
	movq	%r13, -1320(%rbp)
	movl	32(%rax), %eax
	movq	%r13, -1304(%rbp)
	movq	%r9, -1296(%rbp)
	movl	%eax, -1308(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1288(%rbp)
	movq	-2664(%rbp), %rax
	movq	24(%rax), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r14d, %r14d
	jne	.L1577
	testl	%eax, %eax
	jne	.L1237
.L1577:
	movl	%r14d, %ebx
	testl	%r14d, %r14d
	jne	.L1237
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L1237
	movq	-2664(%rbp), %rax
	movq	-2664(%rbp), %rsi
	movq	%r13, -1356(%rbp)
	leaq	-640(%rbp), %rcx
	movq	%r13, -1344(%rbp)
	leaq	-1360(%rbp), %rdi
	leaq	-720(%rbp), %r9
	movl	56(%rax), %eax
	movl	128(%rsi), %edx
	movq	48(%rsi), %rsi
	movl	%eax, -1348(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1360(%rbp)
	xorl	%edx, %edx
	movq	%rax, -1328(%rbp)
	leaq	-840(%rbp), %rax
	movq	%rdx, -1336(%rbp)
	leaq	-600(%rbp), %rdx
	pushq	%r8
	leaq	-680(%rbp), %r8
	pushq	-2728(%rbp)
	pushq	%rax
	leaq	-880(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	leaq	-760(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x30
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$48, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1237
	testl	%eax, %eax
	jne	.L1471
	testl	%ebx, %ebx
	jne	.L1237
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L1237
	movl	-2680(%rbp), %eax
	movl	-2720(%rbp), %esi
	addl	%esi, %eax
	movl	%eax, -880(%rbp)
	jmp	.L1237
.L1471:
	movl	%eax, %ebx
.L1237:
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1472
	testl	%eax, %eax
	jne	.L1238
	testl	%ebx, %ebx
	jne	.L1472
	movl	-2684(%rbp), %eax
	jmp	.L1231
.L2017:
	xorl	%eax, %eax
	movl	%eax, -2664(%rbp)
	jmp	.L1238
.L1472:
	movl	%ebx, -2664(%rbp)
.L1238:
	movl	-2704(%rbp), %eax
	addl	16(%r15), %eax
	andl	$1, %eax
	movl	%eax, 16(%r15)
	movl	-2704(%rbp), %eax
	addl	16(%r12), %eax
	andl	$1, %eax
	movl	%eax, 16(%r12)
	jmp	.L1203
.L1457:
	movl	%r13d, %eax
	jmp	.L1209
.L1462:
	movl	%r14d, %eax
	jmp	.L1209
.L1467:
	movl	%ebx, %eax
.L1209:
	movl	%eax, -2664(%rbp)
	jmp	.L1203
.L1200:
	testb	%al, %al
	jne	.L1241
	cmpq	$4864, -2680(%rbp)
	ja	.L1242
	testq	%rbx, %rbx
	je	.L1202
	leaq	-2304(%rbp), %rcx
	leaq	-1000(%rbp), %rdi
	movabsq	$4294967297, %rax
	movabsq	$1099511627777, %rsi
	movq	%rax, -1000(%rbp)
	leaq	-2320(%rbp), %r9
	leaq	-2312(%rbp), %r8
	movq	%rax, -984(%rbp)
	xorl	%eax, %eax
	movq	%rax, -976(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rsi, -992(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -968(%rbp)
	movslq	16(%r12), %rax
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2312(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2320(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2296(%rbp)
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2304(%rbp)
	leaq	-2296(%rbp), %rdx
	pushq	%rax
	leaq	-516(%rbp), %rax
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1580
	testl	%eax, %eax
	jne	.L1203
.L1580:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L1203
.L1242:
	leaq	-960(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L1581
	testl	%eax, %eax
	jne	.L1246
.L1581:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L1246
	movl	-960(%rbp), %edx
	leaq	-920(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L1582
	testl	%eax, %eax
	jne	.L1246
.L1582:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L1246
	leaq	-496(%rbp), %rdi
	leaq	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_i(%rip), %r14
	call	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjhyNS0_21DeviceRadixSortPolicyIjhyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKhPhSA_yiiSC_S5_EEC1Ev
	leaq	-336(%rbp), %rdi
	call	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjhyNS0_21DeviceRadixSortPolicyIjhyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKhPhSA_yiiSC_S5_EEC1Ev
	movl	-920(%rbp), %eax
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	xorl	%ecx, %ecx
	leaq	-476(%rbp), %rdi
	movl	$160, %edx
	movq	%rsi, -496(%rbp)
	movl	%eax, -2704(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rax
	movq	%rax, -448(%rbp)
	movabsq	$549755813895, %rax
	movq	%rax, -424(%rbp)
	movabsq	$167503724704, %rax
	movq	%r14, -472(%rbp)
	movq	%rax, -488(%rbp)
	movl	$6240, -480(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L1583
	testl	%eax, %eax
	jne	.L1246
.L1583:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L1246
	movl	$92274689, %eax
	xorl	%ecx, %ecx
	movl	$512, %edx
	movq	%r14, %rsi
	salq	$9, %rax
	leaq	-452(%rbp), %rdi
	movl	$5632, -456(%rbp)
	movq	%rax, -464(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L1584
	testl	%eax, %eax
	jne	.L1246
.L1584:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L1246
	leaq	-428(%rbp), %rdi
	xorl	%ecx, %ecx
	movabsq	$167503724704, %rax
	movl	$160, %edx
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	movq	%rax, -440(%rbp)
	movl	$6240, -432(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKhPhPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L1478
	testl	%eax, %eax
	jne	.L1246
	testl	%r13d, %r13d
	jne	.L1478
	movl	-432(%rbp), %eax
	movl	-480(%rbp), %ecx
	leaq	-316(%rbp), %rdi
	movq	%r14, -312(%rbp)
	movl	-2704(%rbp), %r13d
	imull	-428(%rbp), %r13d
	movl	$4096, -320(%rbp)
	cmpl	%eax, %ecx
	cmovl	%eax, %ecx
	movq	-2680(%rbp), %rax
	xorl	%edx, %edx
	leal	0(%r13,%r13,4), %r13d
	movslq	%ecx, %rsi
	movq	%rax, -360(%rbp)
	movq	%rax, -352(%rbp)
	movq	%rax, -376(%rbp)
	divq	%rsi
	movl	%r13d, -416(%rbp)
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	cmpl	%eax, %r13d
	movl	%eax, -408(%rbp)
	cmovg	%eax, %r13d
	cltd
	idivl	%r13d
	movl	%r13d, -368(%rbp)
	movl	-920(%rbp), %r13d
	imull	%ecx, %eax
	movl	%edx, -404(%rbp)
	imull	%edx, %ecx
	movl	$256, %edx
	cltq
	addq	%rax, %rsi
	movq	%rax, -392(%rbp)
	movslq	%ecx, %rcx
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rax
	movq	%rax, -288(%rbp)
	movabsq	$274877906950, %rax
	movq	%rax, -264(%rbp)
	movl	$268435457, %eax
	movq	%rcx, -384(%rbp)
	salq	$8, %rax
	xorl	%ecx, %ecx
	movq	%rsi, -400(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	movq	%rsi, -336(%rbp)
	movq	%rax, -328(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, -2704(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2704(%rbp)
	jne	.L1586
	testl	%eax, %eax
	jne	.L1246
.L1586:
	movl	-2704(%rbp), %eax
	testl	%eax, %eax
	jne	.L1246
	movl	$92274689, %eax
	xorl	%ecx, %ecx
	movl	$512, %edx
	movq	%r14, %rsi
	salq	$9, %rax
	leaq	-292(%rbp), %rdi
	movl	$5632, -296(%rbp)
	movq	%rax, -304(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	testl	%r14d, %r14d
	jne	.L1587
	testl	%eax, %eax
	jne	.L1246
.L1587:
	movl	%r14d, %eax
	testl	%r14d, %r14d
	jne	.L1246
	movl	$268435457, %eax
	leaq	-268(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	salq	$8, %rax
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb1ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	movl	$4096, -272(%rbp)
	movq	%rax, -280(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKhPhPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	testl	%r14d, %r14d
	jne	.L1483
	testl	%eax, %eax
	jne	.L1246
	testl	%r14d, %r14d
	jne	.L1483
	movl	-272(%rbp), %eax
	movl	-320(%rbp), %ecx
	imull	-268(%rbp), %r13d
	cmpl	%eax, %ecx
	cmovl	%eax, %ecx
	movq	-2680(%rbp), %rax
	xorl	%edx, %edx
	leal	0(%r13,%r13,4), %r13d
	movslq	%ecx, %rsi
	movq	%rax, -200(%rbp)
	movq	%rax, -192(%rbp)
	movq	%rax, -216(%rbp)
	divq	%rsi
	movl	%r13d, -256(%rbp)
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	cmpl	%eax, %r13d
	movl	%eax, %edi
	movl	%eax, -248(%rbp)
	cmovle	%r13d, %edi
	cltd
	idivl	%edi
	movl	%edi, -208(%rbp)
	imull	%ecx, %eax
	movl	%edx, -244(%rbp)
	imull	%edx, %ecx
	cltq
	addq	%rax, %rsi
	movq	%rax, -232(%rbp)
	movl	-416(%rbp), %eax
	movslq	%ecx, %rcx
	movq	%rcx, -224(%rbp)
	cmpl	%eax, %r13d
	movq	%rsi, -240(%rbp)
	cmovge	%r13d, %eax
	imull	-420(%rbp), %eax
	xorl	%edx, %edx
	addl	-456(%rbp), %eax
	cltq
	salq	$3, %rax
	movq	%rax, -176(%rbp)
	xorl	%eax, %eax
	movq	%rax, -168(%rbp)
	movq	%rax, -160(%rbp)
	xorl	%eax, %eax
.L1255:
	movq	-176(%rbp,%rdx), %rsi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rsi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$24, %rdx
	jne	.L1255
	movq	-2696(%rbp), %rsi
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L1256
	movq	%rax, (%rsi)
	xorl	%eax, %eax
	movq	%rax, -2696(%rbp)
	jmp	.L1257
.L1256:
	cmpq	%rax, (%rsi)
	jnb	.L1258
	call	cudaGetLastError@PLT
	xorl	%r13d, %r13d
	movl	$1, %r14d
	movq	%r13, -2696(%rbp)
	jmp	.L1257
.L1258:
	leaq	255(%rbx), %rax
	xorb	%al, %al
	addq	-96(%rbp), %rax
	movq	%rax, -2696(%rbp)
.L1257:
	call	cudaGetLastError@PLT
	testl	$1, %r14d
	jne	.L1589
	testl	%eax, %eax
	jne	.L1246
.L1589:
	testl	%r14d, %r14d
	jne	.L1483
	testq	%rbx, %rbx
	je	.L1203
	movl	-2684(%rbp), %eax
	movl	16(%rbp), %edi
	movl	-424(%rbp), %ecx
	movl	-2684(%rbp), %ebx
	subl	%eax, %edi
	movl	%edi, %eax
	movl	%ebx, -880(%rbp)
	leaq	-496(%rbp), %rbx
	cltd
	movq	%rbx, -2664(%rbp)
	idivl	%ecx
	cmpl	$1, %edx
	movslq	16(%r15), %rdx
	sbbl	$-1, %eax
	imull	%eax, %ecx
	movl	%eax, -2704(%rbp)
	movl	-2684(%rbp), %eax
	subl	%edi, %ecx
	imull	-264(%rbp), %ecx
	addl	%eax, %ecx
	cmpl	16(%rbp), %ecx
	cmovg	16(%rbp), %ecx
	movq	%rdx, %rax
	xorl	$1, %eax
	movq	(%r15,%rdx,8), %rdx
	movl	%ecx, -2712(%rbp)
	movslq	16(%r12), %rcx
	cltq
	movq	(%r15,%rax,8), %rsi
	movl	-2712(%rbp), %r11d
	movq	%rdx, -128(%rbp)
	movq	%rcx, %rax
	movq	(%r12,%rcx,8), %rcx
	xorl	$1, %eax
	movq	%rsi, -136(%rbp)
	cltq
	movq	%rcx, -88(%rbp)
	movq	(%r12,%rax,8), %rax
	movq	%rax, -96(%rbp)
	cmpl	%r11d, -2684(%rbp)
	jge	.L1261
	leaq	-336(%rbp), %rbx
	movq	%rbx, -2664(%rbp)
.L1261:
	movq	%rax, -720(%rbp)
	movq	-2696(%rbp), %rax
	leaq	-880(%rbp), %r9
	leaq	-528(%rbp), %r8
	movq	%rdx, -600(%rbp)
	movq	%rax, -760(%rbp)
	movq	-2664(%rbp), %rax
	movq	%rsi, -640(%rbp)
	movl	72(%rax), %eax
	movq	%rcx, -680(%rbp)
	leaq	-760(%rbp), %rcx
	cmpl	%eax, %edi
	cmovle	%edi, %eax
	movq	-2664(%rbp), %rdi
	xorl	%ebx, %ebx
	movq	%rbx, -1096(%rbp)
	movl	%eax, -2680(%rbp)
	movl	76(%rdi), %edx
	leaq	88(%rdi), %r14
	movq	%rdi, %rsi
	movl	%eax, -840(%rbp)
	movq	-2664(%rbp), %rax
	movq	(%rsi), %rsi
	movl	128(%rax), %eax
	imull	%eax, %edx
	movl	%eax, -1120(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1116(%rbp)
	movq	%rax, -1104(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -800(%rbp)
	movl	8(%rdi), %edx
	leaq	-1120(%rbp), %rdi
	movq	%rax, -1088(%rbp)
	leaq	-840(%rbp), %rax
	movl	%edx, -1108(%rbp)
	leaq	-600(%rbp), %rdx
	pushq	%r14
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%r10
	popq	%r11
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r13d, %r13d
	jne	.L1590
	testl	%eax, %eax
	jne	.L1266
.L1590:
	movl	%r13d, %ebx
	testl	%r13d, %r13d
	jne	.L1266
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L1266
	movq	-2664(%rbp), %rax
	xorl	%r9d, %r9d
	movq	$1, -1072(%rbp)
	leaq	-800(%rbp), %rcx
	leaq	-1080(%rbp), %rdi
	movq	%r9, -1056(%rbp)
	movl	32(%rax), %edx
	movabsq	$4294967297, %rax
	movq	%rax, -1080(%rbp)
	movq	%rax, -1064(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1068(%rbp)
	leaq	-760(%rbp), %rdx
	movq	%rax, -1048(%rbp)
	movq	-2664(%rbp), %rax
	movq	24(%rax), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r13d, %r13d
	jne	.L1591
	testl	%eax, %eax
	jne	.L1266
.L1591:
	movl	%r13d, %ebx
	testl	%r13d, %r13d
	jne	.L1266
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L1266
	movq	-2664(%rbp), %rax
	xorl	%edi, %edi
	leaq	-640(%rbp), %rcx
	leaq	-720(%rbp), %r9
	movq	%rdi, -1016(%rbp)
	leaq	-1040(%rbp), %rdi
	movl	56(%rax), %edx
	movl	128(%rax), %eax
	movl	%eax, -1040(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1036(%rbp)
	movq	%rax, -1024(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1028(%rbp)
	leaq	-600(%rbp), %rdx
	movq	%rax, -1008(%rbp)
	movq	-2664(%rbp), %rax
	movq	48(%rax), %rsi
	leaq	-840(%rbp), %rax
	pushq	%r8
	leaq	-680(%rbp), %r8
	pushq	%r14
	pushq	%rax
	leaq	-880(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	leaq	-760(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x30
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$48, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1266
	testl	%eax, %eax
	jne	.L1487
	testl	%ebx, %ebx
	jne	.L1266
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L1266
	movl	-2684(%rbp), %eax
	movl	-2680(%rbp), %edi
	addl	%edi, %eax
	movl	%eax, -880(%rbp)
	jmp	.L1266
.L1487:
	movl	%eax, %ebx
.L1266:
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1488
	testl	%eax, %eax
	jne	.L1246
	movabsq	$4294967297, %r13
	testl	%ebx, %ebx
	jne	.L1488
.L1268:
	movl	-880(%rbp), %ecx
	movl	%ecx, -2680(%rbp)
	cmpl	%ecx, 16(%rbp)
	jle	.L2018
	leaq	-496(%rbp), %rcx
	movl	-2680(%rbp), %edi
	movq	%rcx, -2664(%rbp)
	cmpl	%edi, -2712(%rbp)
	jle	.L1269
	leaq	-336(%rbp), %rcx
	movq	%rcx, -2664(%rbp)
.L1269:
	movl	%eax, %esi
	cltq
	movq	-2664(%rbp), %rdi
	movq	%r13, -1236(%rbp)
	xorl	$1, %esi
	movq	%r13, -1224(%rbp)
	leaq	-880(%rbp), %r9
	leaq	-528(%rbp), %r8
	movslq	%esi, %rdx
	movl	%esi, -2684(%rbp)
	movq	-96(%rbp,%rax,8), %rsi
	movq	-136(%rbp,%rax,8), %rax
	movq	-96(%rbp,%rdx,8), %rcx
	movq	-136(%rbp,%rdx,8), %rdx
	movq	%rsi, -680(%rbp)
	movq	%rax, -600(%rbp)
	movq	-2696(%rbp), %rax
	movq	%rdx, -640(%rbp)
	movl	16(%rbp), %edx
	movq	%rax, -760(%rbp)
	movl	-2680(%rbp), %eax
	movq	%rcx, -720(%rbp)
	leaq	-760(%rbp), %rcx
	subl	%eax, %edx
	movq	-2664(%rbp), %rax
	movl	72(%rax), %eax
	cmpl	%eax, %edx
	cmovle	%edx, %eax
	movl	76(%rdi), %edx
	xorl	%esi, %esi
	movq	%rsi, -1216(%rbp)
	movl	%eax, -2720(%rbp)
	movl	%eax, -840(%rbp)
	movq	-2664(%rbp), %rax
	movl	128(%rax), %eax
	imull	%eax, %edx
	movl	%eax, -1240(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1208(%rbp)
	movq	%rdi, %rax
	movl	%edx, -800(%rbp)
	movl	8(%rdi), %edx
	addq	$88, %rax
	leaq	-1240(%rbp), %rdi
	movq	%rax, -2728(%rbp)
	movl	%edx, -1228(%rbp)
	leaq	-600(%rbp), %rdx
	pushq	%rax
	leaq	-840(%rbp), %rax
	pushq	%rax
	movq	-2664(%rbp), %rax
	movq	(%rax), %rsi
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r14d, %r14d
	jne	.L1594
	testl	%eax, %eax
	jne	.L1274
.L1594:
	movl	%r14d, %ebx
	testl	%r14d, %r14d
	jne	.L1274
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L1274
	movq	-2664(%rbp), %rax
	leaq	-800(%rbp), %rcx
	movq	$1, -1192(%rbp)
	leaq	-760(%rbp), %rdx
	leaq	-1200(%rbp), %rdi
	movq	%r13, -1200(%rbp)
	movl	32(%rax), %eax
	movq	%r13, -1184(%rbp)
	movl	%eax, -1188(%rbp)
	xorl	%eax, %eax
	movq	%rax, -1176(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1168(%rbp)
	movq	-2664(%rbp), %rax
	movq	24(%rax), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r14d, %r14d
	jne	.L1595
	testl	%eax, %eax
	jne	.L1274
.L1595:
	movl	%r14d, %ebx
	testl	%r14d, %r14d
	jne	.L1274
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L1274
	movq	-2664(%rbp), %rax
	movq	-2664(%rbp), %rsi
	xorl	%ebx, %ebx
	movq	%r13, -1156(%rbp)
	movq	%r13, -1144(%rbp)
	leaq	-640(%rbp), %rcx
	leaq	-1160(%rbp), %rdi
	movl	56(%rax), %eax
	movl	128(%rsi), %edx
	movq	%rbx, -1136(%rbp)
	leaq	-720(%rbp), %r9
	movq	48(%rsi), %rsi
	leaq	-680(%rbp), %r8
	movl	%eax, -1148(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1160(%rbp)
	leaq	-600(%rbp), %rdx
	movq	%rax, -1128(%rbp)
	leaq	-840(%rbp), %rax
	pushq	%r14
	pushq	-2728(%rbp)
	pushq	%rax
	leaq	-880(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	leaq	-760(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x30
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$48, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1274
	testl	%eax, %eax
	jne	.L1492
	testl	%ebx, %ebx
	jne	.L1274
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L1274
	movl	-2680(%rbp), %eax
	movl	-2720(%rbp), %edi
	addl	%edi, %eax
	movl	%eax, -880(%rbp)
	jmp	.L1274
.L1492:
	movl	%eax, %ebx
.L1274:
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1493
	testl	%eax, %eax
	jne	.L1275
	testl	%ebx, %ebx
	jne	.L1493
	movl	-2684(%rbp), %eax
	jmp	.L1268
.L2018:
	xorl	%r11d, %r11d
	movl	%r11d, -2664(%rbp)
	jmp	.L1275
.L1493:
	movl	%ebx, -2664(%rbp)
.L1275:
	movl	-2704(%rbp), %eax
	addl	16(%r15), %eax
	andl	$1, %eax
	movl	%eax, 16(%r15)
	movl	-2704(%rbp), %eax
	addl	16(%r12), %eax
	andl	$1, %eax
	movl	%eax, 16(%r12)
	jmp	.L1203
.L1478:
	movl	%r13d, %eax
	jmp	.L1246
.L1483:
	movl	%r14d, %eax
	jmp	.L1246
.L1488:
	movl	%ebx, %eax
.L1246:
	movl	%eax, -2664(%rbp)
	jmp	.L1203
.L1199:
	testb	%al, %al
	jne	.L1241
	cmpq	$4864, -2680(%rbp)
	ja	.L1278
	testq	%rbx, %rbx
	je	.L1202
	movabsq	$4294967297, %rax
	xorl	%r9d, %r9d
	movabsq	$1099511627777, %rdi
	movq	%rax, -1680(%rbp)
	leaq	-2440(%rbp), %rcx
	leaq	-2432(%rbp), %r8
	movq	%rax, -1664(%rbp)
	movq	-2672(%rbp), %rax
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rdi, -1672(%rbp)
	leaq	-1680(%rbp), %rdi
	movq	%rax, -1648(%rbp)
	movslq	16(%r12), %rax
	movq	%r9, -1656(%rbp)
	leaq	-2424(%rbp), %r9
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2432(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2424(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2448(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2440(%rbp)
	leaq	-2448(%rbp), %rdx
	pushq	%r10
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1598
	testl	%eax, %eax
	jne	.L1203
.L1598:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L1203
.L1278:
	movl	-2684(%rbp), %ecx
	movl	16(%rbp), %eax
	xorl	%esi, %esi
	leaq	-136(%rbp), %rdi
	subl	%ecx, %eax
	movl	$8, %ecx
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268429568, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$7424, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268429568, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%r8d, %r8d
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r8, -160(%rbp)
	cltq
	movq	%r8, -152(%rbp)
	salq	$2, %rax
	movq	%r13, -144(%rbp)
	movq	%rax, -168(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L1282:
	movq	-176(%rbp,%rdx), %rdi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rdi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L1282
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L1283
	movq	-2696(%rbp), %rsi
	movq	%rax, (%rsi)
	jmp	.L1203
.L1283:
	movq	-2696(%rbp), %rcx
	cmpq	%rax, (%rcx)
	jnb	.L1285
	call	cudaGetLastError@PLT
.L1288:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2696(%rbp)
	movq	%rax, -496(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2728(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2736(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L2019
.L1285:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L1287:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L1287
	jmp	.L1288
.L2019:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1599
	testl	%eax, %eax
	jne	.L1203
.L1599:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2696(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1600
	testl	%eax, %eax
	jne	.L1203
.L1600:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	$-1, -800(%rbp)
	xorl	%edi, %edi
	movl	%edi, -760(%rbp)
	leaq	-800(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1601
	testl	%eax, %eax
	jne	.L1203
.L1601:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-800(%rbp), %edx
	leaq	-760(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1602
	testl	%eax, %eax
	jne	.L1203
.L1602:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	leaq	-720(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	movl	$1, -720(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1603
	testl	%eax, %eax
	jne	.L1203
.L1603:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-720(%rbp), %eax
	imull	-760(%rbp), %eax
	xorl	%ecx, %ecx
	movl	$1, -1636(%rbp)
	movq	%rcx, -1616(%rbp)
	leaq	-496(%rbp), %r13
	leaq	-2416(%rbp), %rcx
	leaq	-1640(%rbp), %rdi
	leaq	-520(%rbp), %r9
	movq	%r13, %rdx
	movl	%eax, -1640(%rbp)
	leaq	-528(%rbp), %r8
	movabsq	$1099511627777, %rax
	movq	%rax, -1632(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1624(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1608(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2416(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%rsi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	movl	%eax, %ebx
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1604
	testl	%eax, %eax
	jne	.L1203
.L1604:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	movl	-2704(%rbp), %eax
	leaq	-1600(%rbp), %rdi
	movq	%r13, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_(%rip), %rsi
	movl	$1, -1596(%rbp)
	movl	%eax, -1600(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -1592(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1584(%rbp)
	xorl	%eax, %eax
	movq	%rax, -1576(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1568(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1605
	testl	%eax, %eax
	jne	.L1203
.L1605:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	leaq	0(,%r14,4), %rax
	xorl	%r13d, %r13d
	salq	$11, %r14
	movq	%rax, -2768(%rbp)
	movq	%r14, -2752(%rbp)
	movq	%r13, -2704(%rbp)
.L1297:
	movl	-2684(%rbp), %eax
	movl	%eax, -680(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L1203
	movl	16(%rbp), %eax
	movl	-2684(%rbp), %esi
	movl	$8, %edx
	movq	-2704(%rbp), %rdi
	movq	-2696(%rbp), %rcx
	subl	%esi, %eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r14d, %r14d
	movl	%eax, -640(%rbp)
	movq	-2736(%rbp), %rax
	leaq	(%rax,%rdi,4), %rax
	movq	%rax, -2760(%rbp)
	movq	%rdi, %rax
	salq	$11, %rax
	addq	%rcx, %rax
	movq	%rax, -2720(%rbp)
.L1298:
	cmpq	%r14, -2712(%rbp)
	je	.L2020
	imulq	$268429568, %r14, %r13
	movl	$268429568, %edx
	movq	-2680(%rbp), %rax
	movl	$7424, %esi
	movq	-2672(%rbp), %rcx
	movq	-2728(%rbp), %rdi
	subq	%r13, %rax
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -600(%rbp)
	idivl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2744(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1504
	testl	%eax, %eax
	jne	.L1299
	testl	%ebx, %ebx
	jne	.L1504
	movl	-2744(%rbp), %eax
	movslq	16(%r12), %rdx
	xorl	%ebx, %ebx
	movl	$1, -1556(%rbp)
	movslq	16(%r15), %rcx
	movq	%rbx, -1536(%rbp)
	movl	%eax, -1560(%rbp)
	addq	(%r12,%rdx,8), %r13
	movabsq	$1099511627777, %rax
	movq	%rax, -1552(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1544(%rbp)
	movq	-2672(%rbp), %rax
	movq	%r13, -2408(%rbp)
	movq	%rax, -1528(%rbp)
	movq	%rdx, %rax
	imulq	$1073718272, %r14, %rdx
	addq	(%r15,%rcx,8), %rdx
	xorl	$1, %eax
	movq	%rdx, -2392(%rbp)
	cltq
	movq	(%r12,%rax,8), %rax
	movq	%rax, -2400(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2384(%rbp)
	movq	-2720(%rbp), %rax
	movq	%rax, -2376(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r14
	jnb	.L1301
	movq	-2752(%rbp), %rax
	movq	-2720(%rbp), %rdi
	addq	%rdi, %rax
.L1301:
	movq	%rax, -2368(%rbp)
	movq	-2760(%rbp), %rax
	leaq	-2360(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-1560(%rbp), %rdi
	leaq	-2376(%rbp), %r9
	movq	%rax, -2360(%rbp)
	leaq	-640(%rbp), %rax
	leaq	-2368(%rbp), %r8
	pushq	%r11
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-680(%rbp), %rax
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-2408(%rbp), %rax
	pushq	%rax
	leaq	-2400(%rbp), %rax
	pushq	%rax
	leaq	-2392(%rbp), %rax
	pushq	%rax
	leaq	-2384(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPhPKhiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1504
	testl	%eax, %eax
	jne	.L1299
	testl	%ebx, %ebx
	jne	.L1504
	call	cudaGetLastError@PLT
	movq	-2768(%rbp), %rcx
	movq	-2752(%rbp), %rdi
	addq	%rcx, -2760(%rbp)
	addq	%rdi, -2720(%rbp)
	testl	%eax, %eax
	jne	.L1299
	incq	%r14
	jmp	.L1298
.L1504:
	movl	%ebx, %eax
.L1299:
	movl	%eax, -2664(%rbp)
	jmp	.L1203
.L2020:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2704(%rbp)
	jmp	.L1297
.L1198:
	testb	%al, %al
	jne	.L1241
	cmpq	$4864, -2680(%rbp)
	ja	.L1306
	testq	%rbx, %rbx
	je	.L1202
	movabsq	$4294967297, %rax
	xorl	%r9d, %r9d
	movabsq	$1099511627777, %rsi
	movq	%rax, -840(%rbp)
	leaq	-2208(%rbp), %rcx
	leaq	-840(%rbp), %rdi
	movq	%rax, -824(%rbp)
	movq	-2672(%rbp), %rax
	leaq	-2216(%rbp), %r8
	movq	%rsi, -832(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -808(%rbp)
	movslq	16(%r12), %rax
	movq	%r9, -816(%rbp)
	leaq	-2224(%rbp), %r9
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2216(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2224(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2200(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2208(%rbp)
	leaq	-2200(%rbp), %rdx
	pushq	%r10
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1608
	testl	%eax, %eax
	jne	.L1203
.L1608:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L1203
.L1306:
	movl	-2684(%rbp), %ecx
	movl	16(%rbp), %eax
	xorl	%esi, %esi
	leaq	-136(%rbp), %rdi
	subl	%ecx, %eax
	movl	$8, %ecx
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268431360, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$7680, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268431360, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%r8d, %r8d
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r8, -160(%rbp)
	cltq
	movq	%r8, -152(%rbp)
	salq	$2, %rax
	movq	%r13, -144(%rbp)
	movq	%rax, -168(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L1310:
	movq	-176(%rbp,%rdx), %rdi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rdi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L1310
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L1311
	movq	-2696(%rbp), %rsi
	movq	%rax, (%rsi)
	jmp	.L1203
.L1311:
	movq	-2696(%rbp), %rcx
	cmpq	%rax, (%rcx)
	jnb	.L1313
	call	cudaGetLastError@PLT
.L1316:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2696(%rbp)
	movq	%rax, -496(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2728(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2736(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L2021
.L1313:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L1315:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L1315
	jmp	.L1316
.L2021:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1609
	testl	%eax, %eax
	jne	.L1203
.L1609:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2696(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1610
	testl	%eax, %eax
	jne	.L1203
.L1610:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	$-1, -800(%rbp)
	xorl	%edi, %edi
	movl	%edi, -760(%rbp)
	leaq	-800(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1611
	testl	%eax, %eax
	jne	.L1203
.L1611:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-800(%rbp), %edx
	leaq	-760(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1612
	testl	%eax, %eax
	jne	.L1203
.L1612:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	leaq	-720(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	movl	$1, -720(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1613
	testl	%eax, %eax
	jne	.L1203
.L1613:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-720(%rbp), %eax
	imull	-760(%rbp), %eax
	xorl	%ecx, %ecx
	movl	$1, -876(%rbp)
	movq	%rcx, -856(%rbp)
	leaq	-496(%rbp), %r13
	leaq	-2232(%rbp), %rcx
	leaq	-880(%rbp), %rdi
	leaq	-520(%rbp), %r9
	movq	%r13, %rdx
	movl	%eax, -880(%rbp)
	leaq	-528(%rbp), %r8
	movabsq	$1099511627777, %rax
	movq	%rax, -872(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -864(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -848(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2232(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%rsi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	movl	%eax, %ebx
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1614
	testl	%eax, %eax
	jne	.L1203
.L1614:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	movl	-2704(%rbp), %eax
	leaq	-920(%rbp), %rdi
	movq	%r13, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_(%rip), %rsi
	movl	$1, -916(%rbp)
	movl	%eax, -920(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -912(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -904(%rbp)
	xorl	%eax, %eax
	movq	%rax, -896(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -888(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1615
	testl	%eax, %eax
	jne	.L1203
.L1615:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	leaq	0(,%r14,4), %rax
	xorl	%r13d, %r13d
	salq	$11, %r14
	movq	%rax, -2768(%rbp)
	movq	%r14, -2752(%rbp)
	movq	%r13, -2704(%rbp)
.L1325:
	movl	-2684(%rbp), %eax
	movl	%eax, -680(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L1203
	movl	16(%rbp), %eax
	movl	-2684(%rbp), %esi
	movl	$8, %edx
	movq	-2704(%rbp), %rdi
	movq	-2696(%rbp), %rcx
	subl	%esi, %eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r14d, %r14d
	movl	%eax, -640(%rbp)
	movq	-2736(%rbp), %rax
	leaq	(%rax,%rdi,4), %rax
	movq	%rax, -2760(%rbp)
	movq	%rdi, %rax
	salq	$11, %rax
	addq	%rcx, %rax
	movq	%rax, -2720(%rbp)
.L1326:
	cmpq	%r14, -2712(%rbp)
	je	.L2022
	imulq	$268431360, %r14, %r13
	movl	$268431360, %edx
	movq	-2680(%rbp), %rax
	movl	$7680, %esi
	movq	-2672(%rbp), %rcx
	movq	-2728(%rbp), %rdi
	subq	%r13, %rax
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -600(%rbp)
	idivl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2744(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1515
	testl	%eax, %eax
	jne	.L1327
	testl	%ebx, %ebx
	jne	.L1515
	movl	-2744(%rbp), %eax
	movslq	16(%r12), %rdx
	xorl	%ebx, %ebx
	movl	$1, -956(%rbp)
	movslq	16(%r15), %rcx
	movq	%rbx, -936(%rbp)
	movl	%eax, -960(%rbp)
	addq	(%r12,%rdx,8), %r13
	movabsq	$1099511627777, %rax
	movq	%rax, -952(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -944(%rbp)
	movq	-2672(%rbp), %rax
	movq	%r13, -2240(%rbp)
	movq	%rax, -928(%rbp)
	movq	%rdx, %rax
	imulq	$1073725440, %r14, %rdx
	addq	(%r15,%rcx,8), %rdx
	xorl	$1, %eax
	movq	%rdx, -2256(%rbp)
	cltq
	movq	(%r12,%rax,8), %rax
	movq	%rax, -2248(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2264(%rbp)
	movq	-2720(%rbp), %rax
	movq	%rax, -2272(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r14
	jnb	.L1329
	movq	-2752(%rbp), %rax
	movq	-2720(%rbp), %rdi
	addq	%rdi, %rax
.L1329:
	movq	%rax, -2280(%rbp)
	movq	-2760(%rbp), %rax
	leaq	-2288(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-960(%rbp), %rdi
	leaq	-2272(%rbp), %r9
	movq	%rax, -2288(%rbp)
	leaq	-640(%rbp), %rax
	leaq	-2280(%rbp), %r8
	pushq	%r11
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-680(%rbp), %rax
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-2240(%rbp), %rax
	pushq	%rax
	leaq	-2248(%rbp), %rax
	pushq	%rax
	leaq	-2256(%rbp), %rax
	pushq	%rax
	leaq	-2264(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPhPKhiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1515
	testl	%eax, %eax
	jne	.L1327
	testl	%ebx, %ebx
	jne	.L1515
	call	cudaGetLastError@PLT
	movq	-2768(%rbp), %rcx
	movq	-2752(%rbp), %rdi
	addq	%rcx, -2760(%rbp)
	addq	%rdi, -2720(%rbp)
	testl	%eax, %eax
	jne	.L1327
	incq	%r14
	jmp	.L1326
.L1515:
	movl	%ebx, %eax
.L1327:
	movl	%eax, -2664(%rbp)
	jmp	.L1203
.L2022:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2704(%rbp)
	jmp	.L1325
.L1197:
	testb	%al, %al
	jne	.L1241
	cmpq	$4864, -2680(%rbp)
	ja	.L1334
	testq	%rbx, %rbx
	je	.L1202
	movabsq	$4294967297, %rax
	xorl	%r9d, %r9d
	movabsq	$1099511627777, %rsi
	movq	%rax, -1840(%rbp)
	leaq	-2536(%rbp), %rcx
	leaq	-1840(%rbp), %rdi
	movq	%rax, -1824(%rbp)
	movq	-2672(%rbp), %rax
	leaq	-2528(%rbp), %r8
	movq	%rsi, -1832(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -1808(%rbp)
	movslq	16(%r12), %rax
	movq	%r9, -1816(%rbp)
	leaq	-2520(%rbp), %r9
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2528(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2520(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2544(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2536(%rbp)
	leaq	-2544(%rbp), %rdx
	pushq	%r10
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1618
	testl	%eax, %eax
	jne	.L1203
.L1618:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L1203
.L1334:
	movl	-2684(%rbp), %ecx
	movl	16(%rbp), %eax
	xorl	%esi, %esi
	leaq	-136(%rbp), %rdi
	subl	%ecx, %eax
	movl	$8, %ecx
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268431360, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$7680, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268431360, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%r8d, %r8d
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r8, -160(%rbp)
	cltq
	movq	%r8, -152(%rbp)
	salq	$2, %rax
	movq	%r13, -144(%rbp)
	movq	%rax, -168(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L1338:
	movq	-176(%rbp,%rdx), %rdi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rdi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L1338
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L1339
	movq	-2696(%rbp), %rbx
	movq	%rax, (%rbx)
	jmp	.L1203
.L1339:
	movq	-2696(%rbp), %rcx
	cmpq	%rax, (%rcx)
	jnb	.L1341
	call	cudaGetLastError@PLT
.L1344:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2696(%rbp)
	movq	%rax, -496(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2728(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2736(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L2023
.L1341:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L1343:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L1343
	jmp	.L1344
.L2023:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1619
	testl	%eax, %eax
	jne	.L1203
.L1619:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2696(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1620
	testl	%eax, %eax
	jne	.L1203
.L1620:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	$-1, -800(%rbp)
	xorl	%edi, %edi
	movl	%edi, -760(%rbp)
	leaq	-800(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1621
	testl	%eax, %eax
	jne	.L1203
.L1621:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-800(%rbp), %edx
	leaq	-760(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1622
	testl	%eax, %eax
	jne	.L1203
.L1622:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	leaq	-720(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	movl	$1, -720(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1623
	testl	%eax, %eax
	jne	.L1203
.L1623:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-720(%rbp), %eax
	imull	-760(%rbp), %eax
	xorl	%ecx, %ecx
	movl	$1, -1796(%rbp)
	movq	%rcx, -1776(%rbp)
	leaq	-496(%rbp), %r13
	leaq	-2512(%rbp), %rcx
	leaq	-1800(%rbp), %rdi
	leaq	-520(%rbp), %r9
	movq	%r13, %rdx
	movl	%eax, -1800(%rbp)
	leaq	-528(%rbp), %r8
	movabsq	$1099511627777, %rax
	movq	%rax, -1792(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1784(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1768(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2512(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%rsi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	movl	%eax, %ebx
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1624
	testl	%eax, %eax
	jne	.L1203
.L1624:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	movl	-2704(%rbp), %eax
	leaq	-1760(%rbp), %rdi
	movq	%r13, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_(%rip), %rsi
	movl	$1, -1756(%rbp)
	movl	%eax, -1760(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -1752(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1744(%rbp)
	xorl	%eax, %eax
	movq	%rax, -1736(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1728(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1625
	testl	%eax, %eax
	jne	.L1203
.L1625:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	leaq	0(,%r14,4), %rax
	xorl	%r13d, %r13d
	salq	$11, %r14
	movq	%rax, -2768(%rbp)
	movq	%r14, -2752(%rbp)
	movq	%r13, -2704(%rbp)
.L1353:
	movl	-2684(%rbp), %eax
	movl	%eax, -680(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L1203
	movl	-2684(%rbp), %ebx
	movl	16(%rbp), %eax
	movl	$8, %edx
	movq	-2704(%rbp), %rsi
	subl	%ebx, %eax
	movq	-2696(%rbp), %rbx
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r14d, %r14d
	movl	%eax, -640(%rbp)
	movq	-2736(%rbp), %rax
	leaq	(%rax,%rsi,4), %rax
	movq	%rax, -2760(%rbp)
	movq	%rsi, %rax
	salq	$11, %rax
	addq	%rbx, %rax
	movq	%rax, -2720(%rbp)
.L1354:
	cmpq	%r14, -2712(%rbp)
	je	.L2024
	imulq	$268431360, %r14, %r13
	movl	$268431360, %edx
	movq	-2680(%rbp), %rax
	movl	$7680, %esi
	movq	-2672(%rbp), %rcx
	movq	-2728(%rbp), %rdi
	subq	%r13, %rax
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -600(%rbp)
	idivl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2744(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1526
	testl	%eax, %eax
	jne	.L1355
	testl	%ebx, %ebx
	jne	.L1526
	movl	-2744(%rbp), %eax
	movslq	16(%r12), %rdx
	xorl	%ebx, %ebx
	movl	$1, -1716(%rbp)
	movslq	16(%r15), %rcx
	movq	%rbx, -1696(%rbp)
	movl	%eax, -1720(%rbp)
	addq	(%r12,%rdx,8), %r13
	movabsq	$1099511627777, %rax
	movq	%rax, -1712(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1704(%rbp)
	movq	-2672(%rbp), %rax
	movq	%r13, -2504(%rbp)
	movq	%rax, -1688(%rbp)
	movq	%rdx, %rax
	imulq	$1073725440, %r14, %rdx
	addq	(%r15,%rcx,8), %rdx
	xorl	$1, %eax
	movq	%rdx, -2488(%rbp)
	cltq
	movq	(%r12,%rax,8), %rax
	movq	%rax, -2496(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2480(%rbp)
	movq	-2720(%rbp), %rax
	movq	%rax, -2472(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r14
	jnb	.L1357
	movq	-2752(%rbp), %rax
	movq	-2720(%rbp), %rdi
	addq	%rdi, %rax
.L1357:
	movq	%rax, -2464(%rbp)
	movq	-2760(%rbp), %rax
	leaq	-2456(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-1720(%rbp), %rdi
	leaq	-2472(%rbp), %r9
	movq	%rax, -2456(%rbp)
	leaq	-640(%rbp), %rax
	leaq	-2464(%rbp), %r8
	pushq	%r11
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-680(%rbp), %rax
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-2504(%rbp), %rax
	pushq	%rax
	leaq	-2496(%rbp), %rax
	pushq	%rax
	leaq	-2488(%rbp), %rax
	pushq	%rax
	leaq	-2480(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPhPKhiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1526
	testl	%eax, %eax
	jne	.L1355
	testl	%ebx, %ebx
	jne	.L1526
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L1355
	movq	-2768(%rbp), %rcx
	movq	-2752(%rbp), %rbx
	incq	%r14
	addq	%rcx, -2760(%rbp)
	addq	%rbx, -2720(%rbp)
	jmp	.L1354
.L1526:
	movl	%ebx, %eax
.L1355:
	movl	%eax, -2664(%rbp)
	jmp	.L1203
.L2024:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2704(%rbp)
	jmp	.L1353
.L1196:
	testb	%al, %al
	jne	.L1241
	cmpq	$4864, -2680(%rbp)
	ja	.L1362
	testq	%rbx, %rbx
	je	.L1202
	movabsq	$4294967297, %rax
	xorl	%r9d, %r9d
	movabsq	$1099511627777, %rsi
	movq	%rax, -680(%rbp)
	leaq	-2112(%rbp), %rcx
	leaq	-680(%rbp), %rdi
	movq	%rax, -664(%rbp)
	movq	-2672(%rbp), %rax
	leaq	-2120(%rbp), %r8
	movq	%rsi, -672(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -648(%rbp)
	movslq	16(%r12), %rax
	movq	%r9, -656(%rbp)
	leaq	-2128(%rbp), %r9
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2120(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2128(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2104(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2112(%rbp)
	leaq	-2104(%rbp), %rdx
	pushq	%r10
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, -2664(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2664(%rbp)
	jne	.L1203
	testl	%eax, %eax
	jne	.L1527
	cmpl	$0, -2664(%rbp)
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L1203
.L1362:
	movl	-2684(%rbp), %ecx
	movl	16(%rbp), %eax
	xorl	%esi, %esi
	leaq	-136(%rbp), %rdi
	subl	%ecx, %eax
	movl	$8, %ecx
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268433920, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$5888, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268433920, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%r8d, %r8d
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r8, -160(%rbp)
	cltq
	movq	%r8, -152(%rbp)
	salq	$2, %rax
	movq	%r13, -144(%rbp)
	movq	%rax, -168(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L1366:
	movq	-176(%rbp,%rdx), %rdi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rdi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L1366
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L1367
	movq	-2696(%rbp), %rbx
	movq	%rax, (%rbx)
	jmp	.L1203
.L1367:
	movq	-2696(%rbp), %rcx
	cmpq	%rax, (%rcx)
	jnb	.L1369
	call	cudaGetLastError@PLT
.L1372:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2696(%rbp)
	movq	%rax, -496(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2728(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2736(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L2025
.L1369:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L1371:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L1371
	jmp	.L1372
.L2025:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1629
	testl	%eax, %eax
	jne	.L1203
.L1629:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2696(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1630
	testl	%eax, %eax
	jne	.L1203
.L1630:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	$-1, -920(%rbp)
	xorl	%edi, %edi
	movl	%edi, -880(%rbp)
	leaq	-920(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1631
	testl	%eax, %eax
	jne	.L1203
.L1631:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-920(%rbp), %edx
	leaq	-880(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1632
	testl	%eax, %eax
	jne	.L1203
.L1632:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	leaq	-840(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	movl	$1, -840(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1633
	testl	%eax, %eax
	jne	.L1203
.L1633:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-840(%rbp), %eax
	imull	-880(%rbp), %eax
	xorl	%ecx, %ecx
	movl	$1, -716(%rbp)
	movq	%rcx, -696(%rbp)
	leaq	-496(%rbp), %r13
	leaq	-2136(%rbp), %rcx
	leaq	-720(%rbp), %rdi
	leaq	-520(%rbp), %r9
	movq	%r13, %rdx
	movl	%eax, -720(%rbp)
	leaq	-528(%rbp), %r8
	movabsq	$1099511627777, %rax
	movq	%rax, -712(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -704(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -688(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2136(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%rsi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	movl	%eax, %ebx
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1634
	testl	%eax, %eax
	jne	.L1203
.L1634:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	movl	-2704(%rbp), %eax
	leaq	-760(%rbp), %rdi
	movq	%r13, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_(%rip), %rsi
	movl	$1, -756(%rbp)
	movl	%eax, -760(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -752(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -744(%rbp)
	xorl	%eax, %eax
	movq	%rax, -736(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -728(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1635
	testl	%eax, %eax
	jne	.L1203
.L1635:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	leaq	0(,%r14,4), %rax
	salq	$11, %r14
	movq	%rax, -2768(%rbp)
	xorl	%eax, %eax
	movq	%r14, -2760(%rbp)
	movq	%rax, -2704(%rbp)
.L1381:
	movl	-2684(%rbp), %eax
	movl	%eax, -680(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L1203
	movl	-2684(%rbp), %ebx
	movl	16(%rbp), %eax
	movl	$8, %edx
	movq	-2704(%rbp), %rsi
	subl	%ebx, %eax
	movq	-2696(%rbp), %rbx
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r14d, %r14d
	movl	%eax, -640(%rbp)
	movq	-2736(%rbp), %rax
	leaq	(%rax,%rsi,4), %rax
	movq	%rax, -2752(%rbp)
	movq	%rsi, %rax
	salq	$11, %rax
	addq	%rbx, %rax
	movq	%rax, -2720(%rbp)
.L1382:
	cmpq	%r14, -2712(%rbp)
	je	.L2026
	imulq	$268433920, %r14, %r13
	movl	$268433920, %edx
	movq	-2680(%rbp), %rax
	movl	$5888, %esi
	movq	-2672(%rbp), %rcx
	movq	-2728(%rbp), %rdi
	subq	%r13, %rax
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -600(%rbp)
	idivl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2744(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1537
	testl	%eax, %eax
	jne	.L1383
	testl	%ebx, %ebx
	jne	.L1537
	movl	-2744(%rbp), %eax
	movslq	16(%r12), %rdx
	movl	$1, -796(%rbp)
	movslq	16(%r15), %rcx
	movl	%eax, -800(%rbp)
	addq	(%r12,%rdx,8), %r13
	movabsq	$1099511627777, %rax
	movq	%rax, -792(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -784(%rbp)
	xorl	%eax, %eax
	movq	%rax, -776(%rbp)
	movq	-2672(%rbp), %rax
	movq	%r13, -2144(%rbp)
	movq	%rax, -768(%rbp)
	movq	%rdx, %rax
	imulq	$1073735680, %r14, %rdx
	addq	(%r15,%rcx,8), %rdx
	xorl	$1, %eax
	movq	%rdx, -2160(%rbp)
	cltq
	movq	(%r12,%rax,8), %rax
	movq	%rax, -2152(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2168(%rbp)
	movq	-2720(%rbp), %rax
	movq	%rax, -2176(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r14
	jnb	.L1385
	movq	-2720(%rbp), %rax
	movq	-2760(%rbp), %rdi
	addq	%rdi, %rax
.L1385:
	movq	%rax, -2184(%rbp)
	movq	-2752(%rbp), %rax
	leaq	-2192(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-800(%rbp), %rdi
	leaq	-2176(%rbp), %r9
	movq	%rax, -2192(%rbp)
	leaq	-2184(%rbp), %r8
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-640(%rbp), %rax
	pushq	%rax
	leaq	-680(%rbp), %rax
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-2144(%rbp), %rax
	pushq	%rax
	leaq	-2152(%rbp), %rax
	pushq	%rax
	leaq	-2160(%rbp), %rax
	pushq	%rax
	leaq	-2168(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPhPKhiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1537
	testl	%eax, %eax
	jne	.L1383
	testl	%ebx, %ebx
	jne	.L1537
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L1383
	movq	-2768(%rbp), %rcx
	movq	-2760(%rbp), %rbx
	incq	%r14
	addq	%rcx, -2752(%rbp)
	addq	%rbx, -2720(%rbp)
	jmp	.L1382
.L1537:
	movl	%ebx, %eax
.L1383:
	movl	%eax, -2664(%rbp)
	jmp	.L1203
.L2026:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2704(%rbp)
	jmp	.L1381
.L1195:
	testb	%al, %al
	jne	.L1241
	cmpq	$4864, -2680(%rbp)
	ja	.L1390
	testq	%rbx, %rbx
	je	.L1202
	xorl	%ebx, %ebx
	leaq	-2632(%rbp), %rcx
	movabsq	$4294967297, %rax
	movabsq	$1099511627777, %rsi
	movq	%rax, -2000(%rbp)
	leaq	-2000(%rbp), %rdi
	leaq	-2616(%rbp), %r9
	movq	%rax, -1984(%rbp)
	movq	-2672(%rbp), %rax
	leaq	-2624(%rbp), %r8
	movq	%rsi, -1992(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -1968(%rbp)
	movslq	16(%r12), %rax
	movq	%rbx, -1976(%rbp)
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2624(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2616(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2640(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2632(%rbp)
	leaq	-2640(%rbp), %rdx
	pushq	%r13
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, -2664(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2664(%rbp)
	jne	.L1203
	testl	%eax, %eax
	jne	.L1538
	cmpl	$0, -2664(%rbp)
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L1203
.L1390:
	movl	-2684(%rbp), %ecx
	movl	16(%rbp), %eax
	xorl	%esi, %esi
	leaq	-136(%rbp), %rdi
	subl	%ecx, %eax
	movl	$8, %ecx
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268431360, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$6528, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268431360, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%r11d, %r11d
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r11, -160(%rbp)
	cltq
	movq	%r11, -152(%rbp)
	salq	$2, %rax
	movq	%r13, -144(%rbp)
	movq	%rax, -168(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L1394:
	movq	-176(%rbp,%rdx), %rdi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rdi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L1394
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L1395
	movq	-2696(%rbp), %rbx
	movq	%rax, (%rbx)
	jmp	.L1203
.L1395:
	movq	-2696(%rbp), %rcx
	cmpq	%rax, (%rcx)
	jnb	.L1397
	call	cudaGetLastError@PLT
.L1400:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2696(%rbp)
	movq	%rax, -496(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2728(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2736(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L2027
.L1397:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L1399:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L1399
	jmp	.L1400
.L2027:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1639
	testl	%eax, %eax
	jne	.L1203
.L1639:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2696(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1640
	testl	%eax, %eax
	jne	.L1203
.L1640:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	xorl	%r10d, %r10d
	leaq	-800(%rbp), %rdi
	movl	$-1, -800(%rbp)
	movl	%r10d, -760(%rbp)
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1641
	testl	%eax, %eax
	jne	.L1203
.L1641:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-800(%rbp), %edx
	leaq	-760(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1642
	testl	%eax, %eax
	jne	.L1203
.L1642:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	leaq	-720(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$128, %edx
	movl	$1, -720(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1643
	testl	%eax, %eax
	jne	.L1203
.L1643:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-720(%rbp), %eax
	imull	-760(%rbp), %eax
	xorl	%r8d, %r8d
	movl	$1, -1956(%rbp)
	movq	%r8, -1936(%rbp)
	leaq	-496(%rbp), %r13
	leaq	-2608(%rbp), %rcx
	leaq	-1960(%rbp), %rdi
	leaq	-528(%rbp), %r8
	movq	%r13, %rdx
	movl	%eax, -1960(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	movabsq	$549755813889, %rax
	movq	%rax, -1952(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1944(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1928(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2608(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%r9
	leaq	-520(%rbp), %r9
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%rsi
	popq	%rdi
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1644
	testl	%eax, %eax
	jne	.L1203
.L1644:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	movl	-2704(%rbp), %eax
	xorl	%ecx, %ecx
	leaq	-1920(%rbp), %rdi
	movq	%r13, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_(%rip), %rsi
	movq	%rcx, -1896(%rbp)
	movl	%eax, -1920(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -1912(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1904(%rbp)
	movq	-2672(%rbp), %rax
	movl	$1, -1916(%rbp)
	movq	%rax, -1888(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1645
	testl	%eax, %eax
	jne	.L1203
.L1645:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	leaq	0(,%r14,4), %rax
	xorl	%edx, %edx
	salq	$11, %r14
	movq	%rax, -2768(%rbp)
	movq	%r14, -2752(%rbp)
	movq	%rdx, -2704(%rbp)
.L1409:
	movl	-2684(%rbp), %eax
	movl	%eax, -680(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L1203
	movl	-2684(%rbp), %ebx
	movl	16(%rbp), %eax
	movl	$8, %edx
	movq	-2704(%rbp), %rsi
	subl	%ebx, %eax
	movq	-2696(%rbp), %rbx
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r14d, %r14d
	movl	%eax, -640(%rbp)
	movq	-2736(%rbp), %rax
	leaq	(%rax,%rsi,4), %rax
	movq	%rax, -2760(%rbp)
	movq	%rsi, %rax
	salq	$11, %rax
	addq	%rbx, %rax
	movq	%rax, -2720(%rbp)
.L1410:
	cmpq	%r14, -2712(%rbp)
	je	.L2028
	imulq	$268431360, %r14, %r13
	movl	$268431360, %edx
	movq	-2680(%rbp), %rax
	movl	$6528, %esi
	movq	-2672(%rbp), %rcx
	movq	-2728(%rbp), %rdi
	subq	%r13, %rax
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -600(%rbp)
	idivl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2744(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1548
	testl	%eax, %eax
	jne	.L1411
	testl	%ebx, %ebx
	jne	.L1548
	movl	-2744(%rbp), %eax
	movslq	16(%r12), %rdx
	movl	$1, -1876(%rbp)
	movslq	16(%r15), %rcx
	movl	%eax, -1880(%rbp)
	addq	(%r12,%rdx,8), %r13
	movabsq	$1649267441665, %rax
	movq	%rax, -1872(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1864(%rbp)
	xorl	%eax, %eax
	movq	%rax, -1856(%rbp)
	movq	-2672(%rbp), %rax
	movq	%r13, -2600(%rbp)
	movq	%rax, -1848(%rbp)
	movq	%rdx, %rax
	imulq	$1073725440, %r14, %rdx
	addq	(%r15,%rcx,8), %rdx
	xorl	$1, %eax
	movq	%rdx, -2584(%rbp)
	cltq
	movq	(%r12,%rax,8), %rax
	movq	%rax, -2592(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2576(%rbp)
	movq	-2720(%rbp), %rax
	movq	%rax, -2568(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r14
	jnb	.L1413
	movq	-2752(%rbp), %rax
	movq	-2720(%rbp), %rdi
	addq	%rdi, %rax
.L1413:
	movq	%rax, -2560(%rbp)
	movq	-2760(%rbp), %rax
	leaq	-2552(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-1880(%rbp), %rdi
	leaq	-2568(%rbp), %r9
	movq	%rax, -2552(%rbp)
	leaq	-2560(%rbp), %r8
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-640(%rbp), %rax
	pushq	%rax
	leaq	-680(%rbp), %rax
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-2600(%rbp), %rax
	pushq	%rax
	leaq	-2592(%rbp), %rax
	pushq	%rax
	leaq	-2584(%rbp), %rax
	pushq	%rax
	leaq	-2576(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPhPKhiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1548
	testl	%eax, %eax
	jne	.L1411
	testl	%ebx, %ebx
	jne	.L1548
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L1411
	movq	-2768(%rbp), %rcx
	movq	-2752(%rbp), %rbx
	incq	%r14
	addq	%rcx, -2760(%rbp)
	addq	%rbx, -2720(%rbp)
	jmp	.L1410
.L1548:
	movl	%ebx, %eax
.L1411:
	movl	%eax, -2664(%rbp)
	jmp	.L1203
.L2028:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2704(%rbp)
	jmp	.L1409
.L1194:
	testb	%al, %al
	jne	.L1241
	cmpq	$4864, -2680(%rbp)
	ja	.L1418
	testq	%rbx, %rbx
	je	.L1202
	leaq	-2016(%rbp), %rcx
	leaq	-336(%rbp), %rdi
	movabsq	$4294967297, %rax
	movabsq	$1099511627777, %rsi
	movq	%rax, -336(%rbp)
	leaq	-2032(%rbp), %r9
	leaq	-2024(%rbp), %r8
	movq	%rax, -320(%rbp)
	xorl	%eax, %eax
	movq	%rax, -312(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rsi, -328(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -304(%rbp)
	movslq	16(%r12), %rax
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2024(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2032(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2008(%rbp)
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2016(%rbp)
	leaq	-2008(%rbp), %rdx
	pushq	%rax
	leaq	-516(%rbp), %rax
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKhPhyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, -2664(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2664(%rbp)
	jne	.L1203
	testl	%eax, %eax
	jne	.L1549
	cmpl	$0, -2664(%rbp)
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L1203
.L1418:
	movl	-2684(%rbp), %ecx
	movl	16(%rbp), %eax
	xorl	%esi, %esi
	leaq	-136(%rbp), %rdi
	subl	%ecx, %eax
	movl	$8, %ecx
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268431360, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$6528, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268431360, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r13, -144(%rbp)
	cltq
	salq	$2, %rax
	movq	%rax, -168(%rbp)
	xorl	%eax, %eax
	movq	%rax, -160(%rbp)
	movq	%rax, -152(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L1422:
	movq	-176(%rbp,%rdx), %rdi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rdi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L1422
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L1423
	movq	-2696(%rbp), %rbx
	movq	%rax, (%rbx)
	jmp	.L1203
.L1423:
	movq	-2696(%rbp), %rcx
	cmpq	%rax, (%rcx)
	jnb	.L1425
	call	cudaGetLastError@PLT
.L1428:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2720(%rbp)
	movq	%rax, -680(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2744(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2752(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L2029
.L1425:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L1427:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L1427
	jmp	.L1428
.L2029:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1649
	testl	%eax, %eax
	jne	.L1203
.L1649:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2720(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1650
	testl	%eax, %eax
	jne	.L1203
.L1650:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	xorl	%r11d, %r11d
	leaq	-840(%rbp), %rdi
	movl	$-1, -840(%rbp)
	movl	%r11d, -800(%rbp)
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1651
	testl	%eax, %eax
	jne	.L1203
.L1651:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-840(%rbp), %edx
	leaq	-800(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1652
	testl	%eax, %eax
	jne	.L1203
.L1652:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	leaq	-760(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$128, %edx
	movl	$1, -760(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1653
	testl	%eax, %eax
	jne	.L1203
.L1653:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	movl	-760(%rbp), %eax
	imull	-800(%rbp), %eax
	xorl	%r9d, %r9d
	movl	$1, -492(%rbp)
	movq	%r9, -472(%rbp)
	leaq	-680(%rbp), %r13
	leaq	-2040(%rbp), %rcx
	leaq	-496(%rbp), %rdi
	leaq	-520(%rbp), %r9
	movq	%r13, %rdx
	movl	%eax, -496(%rbp)
	leaq	-528(%rbp), %r8
	movabsq	$549755813889, %rax
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	movq	%rax, -488(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -480(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -464(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2040(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%r10
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%rdi
	popq	%r8
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1654
	testl	%eax, %eax
	jne	.L1203
.L1654:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	movl	-2704(%rbp), %eax
	xorl	%esi, %esi
	leaq	-600(%rbp), %rdi
	movq	%r13, %rdx
	movq	%rsi, -576(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900EyEEvPT0_(%rip), %rsi
	movl	%eax, -600(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -592(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -584(%rbp)
	movq	-2672(%rbp), %rax
	movl	$1, -596(%rbp)
	movq	%rax, -568(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1655
	testl	%eax, %eax
	jne	.L1203
.L1655:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L1203
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L1203
	leaq	0(,%r14,4), %rax
	xorl	%ecx, %ecx
	salq	$11, %r14
	movq	%rax, -2768(%rbp)
	movq	%r14, -2736(%rbp)
	movq	%rcx, -2696(%rbp)
.L1437:
	movl	-2684(%rbp), %eax
	movl	%eax, -720(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L1203
	movl	-2684(%rbp), %ebx
	movl	16(%rbp), %eax
	movl	$8, %edx
	movq	-2696(%rbp), %rsi
	subl	%ebx, %eax
	movq	-2720(%rbp), %rbx
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r14d, %r14d
	movl	%eax, -600(%rbp)
	movq	-2752(%rbp), %rax
	leaq	(%rax,%rsi,4), %rax
	movq	%rax, -2728(%rbp)
	movq	%rsi, %rax
	salq	$11, %rax
	addq	%rbx, %rax
	movq	%rax, -2704(%rbp)
.L1438:
	cmpq	%r14, -2712(%rbp)
	je	.L2030
	imulq	$268431360, %r14, %r13
	movl	$268431360, %edx
	movq	-2680(%rbp), %rax
	movl	$6528, %esi
	movq	-2672(%rbp), %rcx
	movq	-2744(%rbp), %rdi
	subq	%r13, %rax
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -496(%rbp)
	idivl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2760(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1559
	testl	%eax, %eax
	jne	.L1439
	testl	%ebx, %ebx
	jne	.L1559
	movl	-2760(%rbp), %eax
	xorl	%edx, %edx
	movslq	16(%r15), %rcx
	movl	$1, -636(%rbp)
	movq	%rdx, -616(%rbp)
	movslq	16(%r12), %rdx
	movl	%eax, -640(%rbp)
	movabsq	$1649267441665, %rax
	movq	%rax, -632(%rbp)
	addq	(%r12,%rdx,8), %r13
	movabsq	$4294967297, %rax
	movq	%rax, -624(%rbp)
	movq	-2672(%rbp), %rax
	movq	%r13, -2048(%rbp)
	movq	%rax, -608(%rbp)
	movq	%rdx, %rax
	imulq	$1073725440, %r14, %rdx
	addq	(%r15,%rcx,8), %rdx
	xorl	$1, %eax
	movq	%rdx, -2064(%rbp)
	cltq
	movq	(%r12,%rax,8), %rax
	movq	%rax, -2056(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2072(%rbp)
	movq	-2704(%rbp), %rax
	movq	%rax, -2080(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r14
	jnb	.L1441
	movq	-2736(%rbp), %rax
	movq	-2704(%rbp), %rdi
	addq	%rdi, %rax
.L1441:
	movq	%rax, -2088(%rbp)
	movq	-2728(%rbp), %rax
	leaq	-2096(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-640(%rbp), %rdi
	leaq	-2080(%rbp), %r9
	movq	%rax, -2096(%rbp)
	leaq	-2088(%rbp), %r8
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjhyE9Policy900ELb0EjhyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-720(%rbp), %rax
	pushq	%rax
	leaq	-496(%rbp), %rax
	pushq	%rax
	leaq	-2048(%rbp), %rax
	pushq	%rax
	leaq	-2056(%rbp), %rax
	pushq	%rax
	leaq	-2064(%rbp), %rax
	pushq	%rax
	leaq	-2072(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPhPKhiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1559
	testl	%eax, %eax
	jne	.L1439
	testl	%ebx, %ebx
	jne	.L1559
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L1439
	movq	-2768(%rbp), %rcx
	movq	-2736(%rbp), %rbx
	incq	%r14
	addq	%rcx, -2728(%rbp)
	addq	%rbx, -2704(%rbp)
	jmp	.L1438
.L1559:
	movl	%ebx, %eax
.L1439:
	movl	%eax, -2664(%rbp)
	jmp	.L1203
.L2030:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2696(%rbp)
	jmp	.L1437
.L1527:
	movl	%eax, -2664(%rbp)
	jmp	.L1203
.L1538:
	movl	%eax, -2664(%rbp)
	jmp	.L1203
.L1549:
	movl	%eax, -2664(%rbp)
.L1203:
	call	cudaGetLastError@PLT
.LEHE25:
	cmpl	$0, -2664(%rbp)
	jne	.L1451
	testl	%eax, %eax
	jne	.L1192
	cmpl	$0, -2664(%rbp)
	je	.L1447
.L1451:
	movl	-2664(%rbp), %eax
.L1192:
	movl	%eax, -2664(%rbp)
.L1447:
	leaq	-2646(%rbp), %rdi
	call	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L1450
	jmp	.L2015
.L1560:
	endbr64
	movq	%rax, %rbx
.L1448:
	leaq	-2646(%rbp), %rdi
	call	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L2015
	movq	%rbx, %rdi
.LEHB26:
	call	_Unwind_Resume@PLT
.LEHE26:
.L2015:
	call	__stack_chk_fail@PLT
.L1450:
	movl	-2664(%rbp), %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12920:
	.section	.gcc_except_table
.LLSDA12920:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12920-.LLSDACSB12920
.LLSDACSB12920:
	.uleb128 .LEHB25-.LFB12920
	.uleb128 .LEHE25-.LEHB25
	.uleb128 .L1560-.LFB12920
	.uleb128 0
	.uleb128 .LEHB26-.LFB12920
	.uleb128 .LEHE26-.LEHB26
	.uleb128 0
	.uleb128 0
.LLSDACSE12920:
	.section	.text._ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,"axG",@progbits,_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,comdat
	.size	_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st, .-_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st
	.section	.rodata._Z10SortByFreqIjhEvPT_PT0_i.str1.1,"aMS",@progbits,1
.LC92:
	.string	"radix_sort: failed on 1st step"
.LC93:
	.string	"radix_sort: failed on 2nd step"
.LC94:
	.string	"smart_sort: failed to synchronize"
	.section	.text._Z10SortByFreqIjhEvPT_PT0_i,"axG",@progbits,_Z10SortByFreqIjhEvPT_PT0_i,comdat
	.weak	_Z10SortByFreqIjhEvPT_PT0_i
	.type	_Z10SortByFreqIjhEvPT_PT0_i, @function
_Z10SortByFreqIjhEvPT_PT0_i:
.LFB12343:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12343
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	leaq	-104(%rbp), %r15
	pushq	%r13
	pushq	%r12
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	movq	%rsi, %r12
	pushq	%rbx
	.cfi_offset 3, -56
	movslq	%edx, %rbx
	salq	$2, %rbx
	movq	%rbx, %r10
	negq	%r10
	subq	$168, %rsp
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	sarq	$2, %r10
	movq	%rdi, -144(%rbp)
	leaq	-144(%rbp), %rdi
	movq	%r10, %rax
	movq	%r10, %r14
	negq	%rax
	movq	%rax, -176(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS15iterator_facadeINS0_10device_ptrIjEEjNS0_8cuda_cub3tagENS0_27random_access_traversal_tagENS0_16device_referenceIjEElEdeEv
	xorl	%ecx, %ecx
	xorl	%esi, %esi
	xorl	%edi, %edi
	movq	%rax, -104(%rbp)
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	movq	%rax, %r13
	leaq	-136(%rbp), %rax
	movq	%rcx, -136(%rbp)
	movq	%r15, %rdx
	leaq	-80(%rbp), %rcx
	movq	%rsi, -96(%rbp)
	movq	%rax, %rsi
	movl	%edi, -88(%rbp)
	xorl	%edi, %edi
	movq	%r8, -72(%rbp)
	movq	-176(%rbp), %r8
	movl	%r9d, -64(%rbp)
	xorl	%r9d, %r9d
	movq	%r12, -80(%rbp)
	movq	%rax, -184(%rbp)
	pushq	$1
	pushq	$32
	movq	%rcx, -200(%rbp)
.LEHB27:
	call	_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st
	popq	%r10
	leaq	.LC92(%rip), %rsi
	popq	%r11
	movl	%eax, %edi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	imulq	$-4, %r14, %r9
	movl	$127, %r8d
	movq	-136(%rbp), %rdx
	subq	%r14, %r8
	leaq	-128(%rbp), %rax
	leaq	-145(%rbp), %rsi
	andq	$-128, %r8
	movq	%rax, %rdi
	movq	%rax, -168(%rbp)
	addq	$127, %r9
	andq	$-128, %r9
	leaq	(%r8,%r9), %r14
	movq	%r9, -192(%rbp)
	addq	%r14, %rdx
	call	_ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC1ERNS0_16execution_policyIS4_EEm
.LEHE27:
	movq	-168(%rbp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	movq	-168(%rbp), %rdi
	movq	%rax, -96(%rbp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	movq	-192(%rbp), %r9
	movq	-168(%rbp), %rdi
	addq	%r9, %rax
	movq	%rax, -72(%rbp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	pushq	$1
	xorl	%r9d, %r9d
	movq	%r15, %rdx
	pushq	$32
	movq	-176(%rbp), %r8
	leaq	(%rax,%r14), %rdi
	movq	-200(%rbp), %rcx
	movq	-184(%rbp), %rsi
.LEHB28:
	.cfi_escape 0x2e,0x10
	call	_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st
	movl	%eax, %edi
	leaq	.LC93(%rip), %rsi
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	cmpl	$0, -88(%rbp)
	jne	.L2032
.L2035:
	cmpl	$0, -64(%rbp)
	jne	.L2033
	jmp	.L2034
.L2032:
	movq	-176(%rbp), %rsi
	movq	-96(%rbp), %rdi
	movq	%r13, %rdx
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub6copy_nINS1_3tagEPjlS4_EET2_RNS1_16execution_policyIT_EET0_T1_S5_.isra.0
.LEHE28:
	jmp	.L2035
.L2033:
	movq	-72(%rbp), %rsi
	testq	%rbx, %rbx
	jg	.L2045
.L2034:
	movq	-168(%rbp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv
	movl	$1, %edi
.LEHB29:
	call	_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st
	leaq	.LC94(%rip), %rsi
	movl	%eax, %edi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
.LEHE29:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L2039
	jmp	.L2043
.L2045:
	xorl	%ebx, %ebx
	cmpq	$0, -176(%rbp)
	je	.L2036
	movq	-176(%rbp), %rdx
	movl	$1, %r8d
	movl	$3, %ecx
	movq	%r12, %rdi
.LEHB30:
	call	cudaMemcpyAsync@PLT
	movl	$1, %edi
	movl	%eax, %ebx
	call	_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st
.L2036:
	leaq	.LC8(%rip), %rsi
	movl	%ebx, %edi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
.LEHE30:
	jmp	.L2034
.L2041:
	endbr64
	movq	%rax, %rbx
.L2037:
	movq	-168(%rbp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L2043
	movq	%rbx, %rdi
.LEHB31:
	call	_Unwind_Resume@PLT
.LEHE31:
.L2043:
	call	__stack_chk_fail@PLT
.L2039:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12343:
	.section	.gcc_except_table
.LLSDA12343:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12343-.LLSDACSB12343
.LLSDACSB12343:
	.uleb128 .LEHB27-.LFB12343
	.uleb128 .LEHE27-.LEHB27
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB28-.LFB12343
	.uleb128 .LEHE28-.LEHB28
	.uleb128 .L2041-.LFB12343
	.uleb128 0
	.uleb128 .LEHB29-.LFB12343
	.uleb128 .LEHE29-.LEHB29
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB30-.LFB12343
	.uleb128 .LEHE30-.LEHB30
	.uleb128 .L2041-.LFB12343
	.uleb128 0
	.uleb128 .LEHB31-.LFB12343
	.uleb128 .LEHE31-.LEHB31
	.uleb128 0
	.uleb128 0
.LLSDACSE12343:
	.section	.text._Z10SortByFreqIjhEvPT_PT0_i,"axG",@progbits,_Z10SortByFreqIjhEvPT_PT0_i,comdat
	.size	_Z10SortByFreqIjhEvPT_PT0_i, .-_Z10SortByFreqIjhEvPT_PT0_i
	.section	.text._ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjS3_S4_PyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii,"axG",@progbits,_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjS3_S4_PyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii,comdat
	.weak	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjS3_S4_PyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	.hidden	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjS3_S4_PyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	.type	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjS3_S4_PyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii, @function
_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjS3_S4_PyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii:
.LFB13429:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movslq	%ecx, %rcx
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPKjPjS1_S2_PyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS5_6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2049
	testl	%eax, %eax
	jne	.L2046
.L2049:
	movl	%ebx, %eax
.L2046:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE13429:
	.size	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjS3_S4_PyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii, .-_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjS3_S4_PyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	.section	.text._ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,"axG",@progbits,_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,comdat
	.weak	_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st
	.type	_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st, @function
_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st:
.LFB12997:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12997
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	.cfi_offset 15, -24
	movq	%rdx, %r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	movq	%rcx, %r12
	pushq	%rbx
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$2728, %rsp
	movq	24(%rbp), %rax
	movq	%rsi, -2696(%rbp)
	movq	%r8, -2680(%rbp)
	movl	%r9d, -2684(%rbp)
	movq	%rax, -2672(%rbp)
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	movw	$0, -2646(%rbp)
	movb	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name(%rip), %al
	testb	%al, %al
	jne	.L2056
	leaq	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L2056
	leaq	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi
	leaq	.LC91(%rip), %rsi
	call	_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc
	leaq	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi
	call	__cxa_guard_release@PLT
.L2056:
	movb	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr(%rip), %al
	testb	%al, %al
	jne	.L2059
	leaq	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L2059
	movq	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name(%rip), %rax
	leaq	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi
	leaq	-336(%rbp), %rsi
	movl	$3, -336(%rbp)
	movq	%rax, -328(%rbp)
	call	_ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_
	leaq	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi
	call	__cxa_guard_release@PLT
.L2059:
	testq	%rbx, %rbx
	je	.L2061
	leaq	-2646(%rbp), %rdi
	leaq	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rsi
	call	_ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0
.L2061:
	xorl	%r11d, %r11d
	leaq	-2644(%rbp), %rdi
	movl	%r11d, -2644(%rbp)
.LEHB32:
	call	_ZN3cub17CUB_200700_890_NS10PtxVersionERi
	movl	%eax, -2664(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2664(%rbp)
	jne	.L2321
	testl	%eax, %eax
	jne	.L2062
	cmpl	$0, -2664(%rbp)
	jne	.L2321
	movq	-2696(%rbp), %rax
	movl	-2644(%rbp), %edx
	movq	%rbx, -560(%rbp)
	movq	%r15, -544(%rbp)
	movq	%rax, -552(%rbp)
	movq	-2680(%rbp), %rax
	movq	%r12, -536(%rbp)
	movq	%rax, -528(%rbp)
	movl	-2684(%rbp), %eax
	movl	%edx, -504(%rbp)
	movl	%eax, -520(%rbp)
	movl	16(%rbp), %eax
	movb	$1, -500(%rbp)
	movl	%eax, -516(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -512(%rbp)
	movl	-2684(%rbp), %eax
	cmpl	16(%rbp), %eax
	sete	%al
	cmpq	$0, -2680(%rbp)
	sete	%cl
	orl	%ecx, %eax
	cmpl	$899, %edx
	jg	.L2064
	cmpl	$799, %edx
	jg	.L2065
	cmpl	$699, %edx
	jg	.L2066
	cmpl	$619, %edx
	jg	.L2067
	cmpl	$609, %edx
	jg	.L2068
	cmpl	$599, %edx
	jg	.L2069
	cmpl	$499, %edx
	jg	.L2070
	testb	%al, %al
	je	.L2071
.L2111:
	testq	%rbx, %rbx
	jne	.L2073
.L2072:
	movq	-2696(%rbp), %rax
	movq	$1, (%rax)
	jmp	.L2073
.L2071:
	cmpq	$1152, -2680(%rbp)
	ja	.L2075
	testq	%rbx, %rbx
	je	.L2072
	movabsq	$4294967297, %rax
	xorl	%r9d, %r9d
	movabsq	$549755813889, %rsi
	movq	%rax, -1520(%rbp)
	leaq	-2344(%rbp), %rcx
	leaq	-1520(%rbp), %rdi
	movq	%rax, -1504(%rbp)
	movq	-2672(%rbp), %rax
	leaq	-2336(%rbp), %r8
	movq	%rsi, -1512(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -1488(%rbp)
	movslq	16(%r12), %rax
	movq	%r9, -1496(%rbp)
	leaq	-2328(%rbp), %r9
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2336(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2328(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2352(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2344(%rbp)
	leaq	-2352(%rbp), %rdx
	pushq	%r10
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_yiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_S7_S7_yiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2432
	testl	%eax, %eax
	jne	.L2073
.L2432:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2073
.L2075:
	leaq	-960(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L2433
	testl	%eax, %eax
	jne	.L2079
.L2433:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2079
	movl	-960(%rbp), %edx
	leaq	-920(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L2434
	testl	%eax, %eax
	jne	.L2079
.L2434:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2079
	leaq	-496(%rbp), %rdi
	leaq	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_i(%rip), %r14
	call	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjjyNS0_21DeviceRadixSortPolicyIjjyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjS9_SH_SA_yiiSC_S5_EEC1Ev
	leaq	-336(%rbp), %rdi
	call	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjjyNS0_21DeviceRadixSortPolicyIjjyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjS9_SH_SA_yiiSC_S5_EEC1Ev
	movl	-920(%rbp), %eax
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	xorl	%ecx, %ecx
	leaq	-476(%rbp), %rdi
	movl	$128, %edx
	movq	%rsi, -496(%rbp)
	movl	%eax, -2704(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rax
	movq	%rax, -448(%rbp)
	movabsq	$274877906950, %rax
	movq	%rax, -424(%rbp)
	movl	$301989889, %eax
	salq	$7, %rax
	movq	%r14, -472(%rbp)
	movq	%rax, -488(%rbp)
	movl	$1152, -480(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L2435
	testl	%eax, %eax
	jne	.L2079
.L2435:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2079
	movl	$8388609, %eax
	xorl	%ecx, %ecx
	movl	$1024, %edx
	movq	%r14, %rsi
	salq	$10, %rax
	leaq	-452(%rbp), %rdi
	movl	$2048, -456(%rbp)
	movq	%rax, -464(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L2436
	testl	%eax, %eax
	jne	.L2079
.L2436:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2079
	movl	$301989889, %eax
	leaq	-428(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$128, %edx
	salq	$7, %rax
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	movl	$1152, -432(%rbp)
	movq	%rax, -440(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjS3_S4_PyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L2327
	testl	%eax, %eax
	jne	.L2079
	testl	%r13d, %r13d
	jne	.L2327
	movl	-432(%rbp), %eax
	movl	-480(%rbp), %ecx
	leaq	-316(%rbp), %rdi
	movq	%r14, -312(%rbp)
	movl	-2704(%rbp), %r13d
	imull	-428(%rbp), %r13d
	movl	$1920, -320(%rbp)
	cmpl	%eax, %ecx
	cmovl	%eax, %ecx
	movq	-2680(%rbp), %rax
	xorl	%edx, %edx
	leal	0(%r13,%r13,4), %r13d
	movslq	%ecx, %rsi
	movq	%rax, -360(%rbp)
	movq	%rax, -352(%rbp)
	movq	%rax, -376(%rbp)
	divq	%rsi
	movl	%r13d, -416(%rbp)
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	cmpl	%eax, %r13d
	movl	%eax, -408(%rbp)
	cmovg	%eax, %r13d
	cltd
	idivl	%r13d
	movl	%r13d, -368(%rbp)
	movl	-920(%rbp), %r13d
	imull	%ecx, %eax
	movl	%edx, -404(%rbp)
	imull	%edx, %ecx
	movl	$128, %edx
	cltq
	addq	%rax, %rsi
	movq	%rax, -392(%rbp)
	movslq	%ecx, %rcx
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rax
	movq	%rax, -288(%rbp)
	movabsq	$137438953477, %rax
	movq	%rax, -264(%rbp)
	movl	$503316481, %eax
	movq	%rcx, -384(%rbp)
	salq	$7, %rax
	xorl	%ecx, %ecx
	movq	%rsi, -400(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	movq	%rsi, -336(%rbp)
	movq	%rax, -328(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, -2704(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2704(%rbp)
	jne	.L2438
	testl	%eax, %eax
	jne	.L2079
.L2438:
	movl	-2704(%rbp), %eax
	testl	%eax, %eax
	jne	.L2079
	movl	$8388609, %eax
	xorl	%ecx, %ecx
	movl	$1024, %edx
	movq	%r14, %rsi
	salq	$10, %rax
	leaq	-292(%rbp), %rdi
	movl	$2048, -296(%rbp)
	movq	%rax, -304(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	testl	%r14d, %r14d
	jne	.L2439
	testl	%eax, %eax
	jne	.L2079
.L2439:
	movl	%r14d, %eax
	testl	%r14d, %r14d
	jne	.L2079
	movl	$503316481, %eax
	leaq	-268(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$128, %edx
	salq	$7, %rax
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	movl	$1920, -272(%rbp)
	movq	%rax, -280(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjS3_S4_PyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	testl	%r14d, %r14d
	jne	.L2332
	testl	%eax, %eax
	jne	.L2079
	testl	%r14d, %r14d
	jne	.L2332
	movl	-272(%rbp), %eax
	movl	-320(%rbp), %ecx
	imull	-268(%rbp), %r13d
	cmpl	%eax, %ecx
	cmovl	%eax, %ecx
	movq	-2680(%rbp), %rax
	xorl	%edx, %edx
	leal	0(%r13,%r13,4), %r13d
	movslq	%ecx, %rsi
	movq	%rax, -200(%rbp)
	movq	%rax, -192(%rbp)
	movq	%rax, -216(%rbp)
	divq	%rsi
	movl	%r13d, -256(%rbp)
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	cmpl	%eax, %r13d
	movl	%eax, %edi
	movl	%eax, -248(%rbp)
	cmovle	%r13d, %edi
	cltd
	idivl	%edi
	movl	%edi, -208(%rbp)
	imull	%ecx, %eax
	movl	%edx, -244(%rbp)
	imull	%edx, %ecx
	cltq
	addq	%rax, %rsi
	movq	%rax, -232(%rbp)
	movl	-416(%rbp), %eax
	movslq	%ecx, %rcx
	movq	%rcx, -224(%rbp)
	cmpl	%eax, %r13d
	movq	%rsi, -240(%rbp)
	cmovge	%r13d, %eax
	imull	-420(%rbp), %eax
	xorl	%r8d, %r8d
	xorl	%edx, %edx
	addl	-456(%rbp), %eax
	movq	%r8, -168(%rbp)
	cltq
	movq	%r8, -160(%rbp)
	salq	$3, %rax
	movq	%rax, -176(%rbp)
	xorl	%eax, %eax
.L2088:
	movq	-176(%rbp,%rdx), %rsi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rsi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$24, %rdx
	jne	.L2088
	movq	-2696(%rbp), %rsi
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L2089
	xorl	%edi, %edi
	movq	%rax, (%rsi)
	movq	%rdi, -2696(%rbp)
	jmp	.L2090
.L2089:
	cmpq	%rax, (%rsi)
	jnb	.L2091
	call	cudaGetLastError@PLT
	xorl	%esi, %esi
	movl	$1, %r14d
	movq	%rsi, -2696(%rbp)
	jmp	.L2090
.L2091:
	leaq	255(%rbx), %rax
	xorb	%al, %al
	addq	-96(%rbp), %rax
	movq	%rax, -2696(%rbp)
.L2090:
	call	cudaGetLastError@PLT
	testl	$1, %r14d
	jne	.L2441
	testl	%eax, %eax
	jne	.L2079
.L2441:
	testl	%r14d, %r14d
	jne	.L2332
	testq	%rbx, %rbx
	je	.L2073
	movl	-2684(%rbp), %eax
	movl	16(%rbp), %edi
	movl	-424(%rbp), %ecx
	movl	-2684(%rbp), %ebx
	subl	%eax, %edi
	movl	%edi, %eax
	movl	%ebx, -880(%rbp)
	leaq	-496(%rbp), %rbx
	cltd
	movq	%rbx, -2664(%rbp)
	idivl	%ecx
	cmpl	$1, %edx
	movslq	16(%r15), %rdx
	sbbl	$-1, %eax
	imull	%eax, %ecx
	movl	%eax, -2704(%rbp)
	movl	-2684(%rbp), %eax
	subl	%edi, %ecx
	imull	-264(%rbp), %ecx
	addl	%eax, %ecx
	cmpl	16(%rbp), %ecx
	cmovg	16(%rbp), %ecx
	movq	%rdx, %rax
	xorl	$1, %eax
	movq	(%r15,%rdx,8), %rdx
	movl	%ecx, -2712(%rbp)
	movslq	16(%r12), %rcx
	cltq
	movq	(%r15,%rax,8), %rsi
	movl	-2712(%rbp), %r10d
	movq	%rdx, -128(%rbp)
	movq	%rcx, %rax
	movq	(%r12,%rcx,8), %rcx
	xorl	$1, %eax
	movq	%rsi, -136(%rbp)
	cltq
	movq	%rcx, -88(%rbp)
	movq	(%r12,%rax,8), %rax
	movq	%rax, -96(%rbp)
	cmpl	%r10d, -2684(%rbp)
	jge	.L2094
	leaq	-336(%rbp), %rbx
	movq	%rbx, -2664(%rbp)
.L2094:
	movq	%rax, -720(%rbp)
	movq	-2696(%rbp), %rax
	leaq	-880(%rbp), %r9
	leaq	-528(%rbp), %r8
	movq	%rsi, -640(%rbp)
	movq	-2664(%rbp), %rsi
	movq	%rax, -760(%rbp)
	movq	-2664(%rbp), %rax
	movq	%rdx, -600(%rbp)
	movl	76(%rsi), %edx
	leaq	88(%rsi), %r14
	movl	72(%rax), %eax
	movq	%rcx, -680(%rbp)
	cmpl	%eax, %edi
	cmovle	%edi, %eax
	xorl	%ecx, %ecx
	leaq	-1400(%rbp), %rdi
	movq	%rcx, -1376(%rbp)
	leaq	-760(%rbp), %rcx
	movl	%eax, -2680(%rbp)
	movl	%eax, -840(%rbp)
	movq	-2664(%rbp), %rax
	movl	128(%rax), %eax
	imull	%eax, %edx
	movl	%eax, -1400(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1396(%rbp)
	movq	%rax, -1384(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -800(%rbp)
	movl	8(%rsi), %edx
	movq	%rax, -1368(%rbp)
	leaq	-840(%rbp), %rax
	movq	(%rsi), %rsi
	movl	%edx, -1388(%rbp)
	leaq	-600(%rbp), %rdx
	pushq	%r14
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r13d, %r13d
	jne	.L2442
	testl	%eax, %eax
	jne	.L2099
.L2442:
	movl	%r13d, %ebx
	testl	%r13d, %r13d
	jne	.L2099
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2099
	movq	-2664(%rbp), %rax
	leaq	-800(%rbp), %rcx
	movq	$1, -1432(%rbp)
	leaq	-1440(%rbp), %rdi
	movl	32(%rax), %edx
	movabsq	$4294967297, %rax
	movq	%rax, -1440(%rbp)
	movq	%rax, -1424(%rbp)
	xorl	%eax, %eax
	movq	%rax, -1416(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1428(%rbp)
	leaq	-760(%rbp), %rdx
	movq	%rax, -1408(%rbp)
	movq	-2664(%rbp), %rax
	movq	24(%rax), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r13d, %r13d
	jne	.L2443
	testl	%eax, %eax
	jne	.L2099
.L2443:
	movl	%r13d, %ebx
	testl	%r13d, %r13d
	jne	.L2099
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2099
	movq	-2664(%rbp), %rax
	xorl	%r13d, %r13d
	leaq	-640(%rbp), %rcx
	leaq	-1480(%rbp), %rdi
	movq	%r13, -1456(%rbp)
	leaq	-720(%rbp), %r9
	leaq	-680(%rbp), %r8
	movl	56(%rax), %edx
	movl	128(%rax), %eax
	movl	%eax, -1480(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1476(%rbp)
	movq	%rax, -1464(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1468(%rbp)
	leaq	-600(%rbp), %rdx
	movq	%rax, -1448(%rbp)
	movq	-2664(%rbp), %rax
	movq	48(%rax), %rsi
	pushq	%rax
	leaq	-840(%rbp), %rax
	pushq	%r14
	pushq	%rax
	leaq	-880(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	leaq	-760(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x30
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_PyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSA_6detail21identity_decomposer_tEEJS6_S7_S6_S7_S8_yiiSC_SE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$48, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2099
	testl	%eax, %eax
	jne	.L2336
	testl	%ebx, %ebx
	jne	.L2099
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2099
	movl	-2684(%rbp), %eax
	movl	-2680(%rbp), %esi
	addl	%esi, %eax
	movl	%eax, -880(%rbp)
	jmp	.L2099
.L2336:
	movl	%eax, %ebx
.L2099:
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2337
	testl	%eax, %eax
	jne	.L2079
	movabsq	$4294967297, %r13
	testl	%ebx, %ebx
	jne	.L2337
.L2101:
	movl	-880(%rbp), %esi
	movl	%esi, -2680(%rbp)
	cmpl	%esi, 16(%rbp)
	jle	.L2887
	leaq	-496(%rbp), %rsi
	movl	-2680(%rbp), %edi
	movq	%rsi, -2664(%rbp)
	cmpl	%edi, -2712(%rbp)
	jle	.L2102
	leaq	-336(%rbp), %rsi
	movq	%rsi, -2664(%rbp)
.L2102:
	movl	%eax, %esi
	cltq
	movq	%r13, -1276(%rbp)
	leaq	-1280(%rbp), %rdi
	xorl	$1, %esi
	movq	%r13, -1264(%rbp)
	leaq	-880(%rbp), %r9
	leaq	-528(%rbp), %r8
	movslq	%esi, %rdx
	movl	%esi, -2684(%rbp)
	movq	-96(%rbp,%rax,8), %rsi
	movq	-136(%rbp,%rax,8), %rax
	movq	-96(%rbp,%rdx,8), %rcx
	movq	-136(%rbp,%rdx,8), %rdx
	movq	%rsi, -680(%rbp)
	movq	%rax, -600(%rbp)
	movq	-2696(%rbp), %rax
	movq	%rdx, -640(%rbp)
	movl	16(%rbp), %edx
	movq	%rax, -760(%rbp)
	movl	-2680(%rbp), %eax
	movq	-2664(%rbp), %rsi
	movq	%rcx, -720(%rbp)
	leaq	-760(%rbp), %rcx
	subl	%eax, %edx
	movq	-2664(%rbp), %rax
	movl	72(%rax), %eax
	cmpl	%eax, %edx
	cmovle	%edx, %eax
	movl	76(%rsi), %edx
	xorl	%ebx, %ebx
	movq	%rbx, -1256(%rbp)
	movl	%eax, -2720(%rbp)
	movl	%eax, -840(%rbp)
	movq	-2664(%rbp), %rax
	movl	128(%rax), %eax
	imull	%eax, %edx
	movl	%eax, -1280(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1248(%rbp)
	movq	%rsi, %rax
	movl	%edx, -800(%rbp)
	movl	8(%rsi), %edx
	addq	$88, %rax
	movq	%rax, -2728(%rbp)
	movl	%edx, -1268(%rbp)
	leaq	-600(%rbp), %rdx
	pushq	%rax
	leaq	-840(%rbp), %rax
	movq	(%rsi), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%r10
	popq	%r11
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r14d, %r14d
	jne	.L2446
	testl	%eax, %eax
	jne	.L2107
.L2446:
	movl	%r14d, %ebx
	testl	%r14d, %r14d
	jne	.L2107
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2107
	movq	-2664(%rbp), %rax
	xorl	%r9d, %r9d
	movq	$1, -1312(%rbp)
	leaq	-800(%rbp), %rcx
	leaq	-760(%rbp), %rdx
	leaq	-1320(%rbp), %rdi
	movq	%r13, -1320(%rbp)
	movl	32(%rax), %eax
	movq	%r13, -1304(%rbp)
	movq	%r9, -1296(%rbp)
	movl	%eax, -1308(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1288(%rbp)
	movq	-2664(%rbp), %rax
	movq	24(%rax), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r14d, %r14d
	jne	.L2447
	testl	%eax, %eax
	jne	.L2107
.L2447:
	movl	%r14d, %ebx
	testl	%r14d, %r14d
	jne	.L2107
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2107
	movq	-2664(%rbp), %rax
	movq	-2664(%rbp), %rsi
	movq	%r13, -1356(%rbp)
	leaq	-640(%rbp), %rcx
	movq	%r13, -1344(%rbp)
	leaq	-1360(%rbp), %rdi
	leaq	-720(%rbp), %r9
	movl	56(%rax), %eax
	movl	128(%rsi), %edx
	movq	48(%rsi), %rsi
	movl	%eax, -1348(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1360(%rbp)
	xorl	%edx, %edx
	movq	%rax, -1328(%rbp)
	leaq	-840(%rbp), %rax
	movq	%rdx, -1336(%rbp)
	leaq	-600(%rbp), %rdx
	pushq	%r8
	leaq	-680(%rbp), %r8
	pushq	-2728(%rbp)
	pushq	%rax
	leaq	-880(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	leaq	-760(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x30
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_PyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSA_6detail21identity_decomposer_tEEJS6_S7_S6_S7_S8_yiiSC_SE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$48, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2107
	testl	%eax, %eax
	jne	.L2341
	testl	%ebx, %ebx
	jne	.L2107
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2107
	movl	-2680(%rbp), %eax
	movl	-2720(%rbp), %esi
	addl	%esi, %eax
	movl	%eax, -880(%rbp)
	jmp	.L2107
.L2341:
	movl	%eax, %ebx
.L2107:
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2342
	testl	%eax, %eax
	jne	.L2108
	testl	%ebx, %ebx
	jne	.L2342
	movl	-2684(%rbp), %eax
	jmp	.L2101
.L2887:
	xorl	%eax, %eax
	movl	%eax, -2664(%rbp)
	jmp	.L2108
.L2342:
	movl	%ebx, -2664(%rbp)
.L2108:
	movl	-2704(%rbp), %eax
	addl	16(%r15), %eax
	andl	$1, %eax
	movl	%eax, 16(%r15)
	movl	-2704(%rbp), %eax
	addl	16(%r12), %eax
	andl	$1, %eax
	movl	%eax, 16(%r12)
	jmp	.L2073
.L2327:
	movl	%r13d, %eax
	jmp	.L2079
.L2332:
	movl	%r14d, %eax
	jmp	.L2079
.L2337:
	movl	%ebx, %eax
.L2079:
	movl	%eax, -2664(%rbp)
	jmp	.L2073
.L2070:
	testb	%al, %al
	jne	.L2111
	cmpq	$4864, -2680(%rbp)
	ja	.L2112
	testq	%rbx, %rbx
	je	.L2072
	leaq	-2304(%rbp), %rcx
	leaq	-1000(%rbp), %rdi
	movabsq	$4294967297, %rax
	movabsq	$1099511627777, %rsi
	movq	%rax, -1000(%rbp)
	leaq	-2320(%rbp), %r9
	leaq	-2312(%rbp), %r8
	movq	%rax, -984(%rbp)
	xorl	%eax, %eax
	movq	%rax, -976(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rsi, -992(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -968(%rbp)
	movslq	16(%r12), %rax
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2312(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2320(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2296(%rbp)
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2304(%rbp)
	leaq	-2296(%rbp), %rdx
	pushq	%rax
	leaq	-516(%rbp), %rax
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_yiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_S7_S7_yiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2450
	testl	%eax, %eax
	jne	.L2073
.L2450:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2073
.L2112:
	leaq	-960(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L2451
	testl	%eax, %eax
	jne	.L2116
.L2451:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2116
	movl	-960(%rbp), %edx
	leaq	-920(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L2452
	testl	%eax, %eax
	jne	.L2116
.L2452:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2116
	leaq	-496(%rbp), %rdi
	leaq	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_i(%rip), %r14
	call	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjjyNS0_21DeviceRadixSortPolicyIjjyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjS9_SH_SA_yiiSC_S5_EEC1Ev
	leaq	-336(%rbp), %rdi
	call	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjjyNS0_21DeviceRadixSortPolicyIjjyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjS9_SH_SA_yiiSC_S5_EEC1Ev
	movl	-920(%rbp), %eax
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	xorl	%ecx, %ecx
	leaq	-476(%rbp), %rdi
	movl	$160, %edx
	movq	%rsi, -496(%rbp)
	movl	%eax, -2704(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rax
	movq	%rax, -448(%rbp)
	movabsq	$549755813895, %rax
	movq	%rax, -424(%rbp)
	movabsq	$167503724704, %rax
	movq	%r14, -472(%rbp)
	movq	%rax, -488(%rbp)
	movl	$6240, -480(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L2453
	testl	%eax, %eax
	jne	.L2116
.L2453:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2116
	movl	$92274689, %eax
	xorl	%ecx, %ecx
	movl	$512, %edx
	movq	%r14, %rsi
	salq	$9, %rax
	leaq	-452(%rbp), %rdi
	movl	$5632, -456(%rbp)
	movq	%rax, -464(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L2454
	testl	%eax, %eax
	jne	.L2116
.L2454:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2116
	leaq	-428(%rbp), %rdi
	xorl	%ecx, %ecx
	movabsq	$167503724704, %rax
	movl	$160, %edx
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	movq	%rax, -440(%rbp)
	movl	$6240, -432(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjS3_S4_PyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L2348
	testl	%eax, %eax
	jne	.L2116
	testl	%r13d, %r13d
	jne	.L2348
	movl	-432(%rbp), %eax
	movl	-480(%rbp), %ecx
	leaq	-316(%rbp), %rdi
	movq	%r14, -312(%rbp)
	movl	-2704(%rbp), %r13d
	imull	-428(%rbp), %r13d
	movl	$4096, -320(%rbp)
	cmpl	%eax, %ecx
	cmovl	%eax, %ecx
	movq	-2680(%rbp), %rax
	xorl	%edx, %edx
	leal	0(%r13,%r13,4), %r13d
	movslq	%ecx, %rsi
	movq	%rax, -360(%rbp)
	movq	%rax, -352(%rbp)
	movq	%rax, -376(%rbp)
	divq	%rsi
	movl	%r13d, -416(%rbp)
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	cmpl	%eax, %r13d
	movl	%eax, -408(%rbp)
	cmovg	%eax, %r13d
	cltd
	idivl	%r13d
	movl	%r13d, -368(%rbp)
	movl	-920(%rbp), %r13d
	imull	%ecx, %eax
	movl	%edx, -404(%rbp)
	imull	%edx, %ecx
	movl	$256, %edx
	cltq
	addq	%rax, %rsi
	movq	%rax, -392(%rbp)
	movslq	%ecx, %rcx
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rax
	movq	%rax, -288(%rbp)
	movabsq	$274877906950, %rax
	movq	%rax, -264(%rbp)
	movl	$268435457, %eax
	movq	%rcx, -384(%rbp)
	salq	$8, %rax
	xorl	%ecx, %ecx
	movq	%rsi, -400(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	movq	%rsi, -336(%rbp)
	movq	%rax, -328(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, -2704(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2704(%rbp)
	jne	.L2456
	testl	%eax, %eax
	jne	.L2116
.L2456:
	movl	-2704(%rbp), %eax
	testl	%eax, %eax
	jne	.L2116
	movl	$92274689, %eax
	xorl	%ecx, %ecx
	movl	$512, %edx
	movq	%r14, %rsi
	salq	$9, %rax
	leaq	-292(%rbp), %rdi
	movl	$5632, -296(%rbp)
	movq	%rax, -304(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	testl	%r14d, %r14d
	jne	.L2457
	testl	%eax, %eax
	jne	.L2116
.L2457:
	movl	%r14d, %eax
	testl	%r14d, %r14d
	jne	.L2116
	movl	$268435457, %eax
	leaq	-268(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	salq	$8, %rax
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb1ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	movl	$4096, -272(%rbp)
	movq	%rax, -280(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjS3_S4_PyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	testl	%r14d, %r14d
	jne	.L2353
	testl	%eax, %eax
	jne	.L2116
	testl	%r14d, %r14d
	jne	.L2353
	movl	-272(%rbp), %eax
	movl	-320(%rbp), %ecx
	imull	-268(%rbp), %r13d
	cmpl	%eax, %ecx
	cmovl	%eax, %ecx
	movq	-2680(%rbp), %rax
	xorl	%edx, %edx
	leal	0(%r13,%r13,4), %r13d
	movslq	%ecx, %rsi
	movq	%rax, -200(%rbp)
	movq	%rax, -192(%rbp)
	movq	%rax, -216(%rbp)
	divq	%rsi
	movl	%r13d, -256(%rbp)
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	cmpl	%eax, %r13d
	movl	%eax, %edi
	movl	%eax, -248(%rbp)
	cmovle	%r13d, %edi
	cltd
	idivl	%edi
	movl	%edi, -208(%rbp)
	imull	%ecx, %eax
	movl	%edx, -244(%rbp)
	imull	%edx, %ecx
	cltq
	addq	%rax, %rsi
	movq	%rax, -232(%rbp)
	movl	-416(%rbp), %eax
	movslq	%ecx, %rcx
	movq	%rcx, -224(%rbp)
	cmpl	%eax, %r13d
	movq	%rsi, -240(%rbp)
	cmovge	%r13d, %eax
	imull	-420(%rbp), %eax
	xorl	%edx, %edx
	addl	-456(%rbp), %eax
	cltq
	salq	$3, %rax
	movq	%rax, -176(%rbp)
	xorl	%eax, %eax
	movq	%rax, -168(%rbp)
	movq	%rax, -160(%rbp)
	xorl	%eax, %eax
.L2125:
	movq	-176(%rbp,%rdx), %rsi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rsi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$24, %rdx
	jne	.L2125
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L2126
	movq	-2696(%rbp), %rdi
	movq	%rax, (%rdi)
	xorl	%eax, %eax
	movq	%rax, -2696(%rbp)
	jmp	.L2127
.L2126:
	movq	-2696(%rbp), %rsi
	cmpq	%rax, (%rsi)
	jnb	.L2128
	call	cudaGetLastError@PLT
	xorl	%r13d, %r13d
	movl	$1, %r14d
	movq	%r13, -2696(%rbp)
	jmp	.L2127
.L2128:
	leaq	255(%rbx), %rax
	xorb	%al, %al
	addq	-96(%rbp), %rax
	movq	%rax, -2696(%rbp)
.L2127:
	call	cudaGetLastError@PLT
	testl	$1, %r14d
	jne	.L2459
	testl	%eax, %eax
	jne	.L2116
.L2459:
	testl	%r14d, %r14d
	jne	.L2353
	testq	%rbx, %rbx
	je	.L2073
	movl	-2684(%rbp), %eax
	movl	16(%rbp), %edi
	movl	-424(%rbp), %ecx
	movl	-2684(%rbp), %ebx
	subl	%eax, %edi
	movl	%edi, %eax
	movl	%ebx, -880(%rbp)
	leaq	-496(%rbp), %rbx
	cltd
	movq	%rbx, -2664(%rbp)
	idivl	%ecx
	cmpl	$1, %edx
	movslq	16(%r15), %rdx
	sbbl	$-1, %eax
	imull	%eax, %ecx
	movl	%eax, -2704(%rbp)
	movl	-2684(%rbp), %eax
	subl	%edi, %ecx
	imull	-264(%rbp), %ecx
	addl	%eax, %ecx
	cmpl	16(%rbp), %ecx
	cmovg	16(%rbp), %ecx
	movq	%rdx, %rax
	xorl	$1, %eax
	movq	(%r15,%rdx,8), %rdx
	movl	%ecx, -2712(%rbp)
	movslq	16(%r12), %rcx
	cltq
	movq	(%r15,%rax,8), %rsi
	movl	-2712(%rbp), %r11d
	movq	%rdx, -128(%rbp)
	movq	%rcx, %rax
	movq	(%r12,%rcx,8), %rcx
	xorl	$1, %eax
	movq	%rsi, -136(%rbp)
	cltq
	movq	%rcx, -88(%rbp)
	movq	(%r12,%rax,8), %rax
	movq	%rax, -96(%rbp)
	cmpl	%r11d, -2684(%rbp)
	jge	.L2131
	leaq	-336(%rbp), %rbx
	movq	%rbx, -2664(%rbp)
.L2131:
	movq	%rax, -720(%rbp)
	movq	-2696(%rbp), %rax
	leaq	-880(%rbp), %r9
	leaq	-528(%rbp), %r8
	movq	%rdx, -600(%rbp)
	movq	%rax, -760(%rbp)
	movq	-2664(%rbp), %rax
	movq	%rsi, -640(%rbp)
	movl	72(%rax), %eax
	movq	%rcx, -680(%rbp)
	leaq	-760(%rbp), %rcx
	cmpl	%eax, %edi
	cmovle	%edi, %eax
	movq	-2664(%rbp), %rdi
	xorl	%ebx, %ebx
	movq	%rbx, -1096(%rbp)
	movl	%eax, -2680(%rbp)
	movl	76(%rdi), %edx
	leaq	88(%rdi), %r14
	movq	%rdi, %rsi
	movl	%eax, -840(%rbp)
	movq	-2664(%rbp), %rax
	movq	(%rsi), %rsi
	movl	128(%rax), %eax
	imull	%eax, %edx
	movl	%eax, -1120(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1116(%rbp)
	movq	%rax, -1104(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -800(%rbp)
	movl	8(%rdi), %edx
	leaq	-1120(%rbp), %rdi
	movq	%rax, -1088(%rbp)
	leaq	-840(%rbp), %rax
	movl	%edx, -1108(%rbp)
	leaq	-600(%rbp), %rdx
	pushq	%r14
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%r10
	popq	%r11
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r13d, %r13d
	jne	.L2460
	testl	%eax, %eax
	jne	.L2136
.L2460:
	movl	%r13d, %ebx
	testl	%r13d, %r13d
	jne	.L2136
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2136
	movq	-2664(%rbp), %rax
	xorl	%r9d, %r9d
	movq	$1, -1072(%rbp)
	leaq	-800(%rbp), %rcx
	leaq	-1080(%rbp), %rdi
	movq	%r9, -1056(%rbp)
	movl	32(%rax), %edx
	movabsq	$4294967297, %rax
	movq	%rax, -1080(%rbp)
	movq	%rax, -1064(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1068(%rbp)
	leaq	-760(%rbp), %rdx
	movq	%rax, -1048(%rbp)
	movq	-2664(%rbp), %rax
	movq	24(%rax), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r13d, %r13d
	jne	.L2461
	testl	%eax, %eax
	jne	.L2136
.L2461:
	movl	%r13d, %ebx
	testl	%r13d, %r13d
	jne	.L2136
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2136
	movq	-2664(%rbp), %rax
	xorl	%esi, %esi
	leaq	-640(%rbp), %rcx
	leaq	-1040(%rbp), %rdi
	movq	%rsi, -1016(%rbp)
	leaq	-720(%rbp), %r9
	movl	56(%rax), %edx
	movl	128(%rax), %eax
	movl	%eax, -1040(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1036(%rbp)
	movq	%rax, -1024(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1028(%rbp)
	leaq	-600(%rbp), %rdx
	movq	%rax, -1008(%rbp)
	movq	-2664(%rbp), %rax
	movq	48(%rax), %rsi
	leaq	-840(%rbp), %rax
	pushq	%r8
	leaq	-680(%rbp), %r8
	pushq	%r14
	pushq	%rax
	leaq	-880(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	leaq	-760(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x30
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_PyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSA_6detail21identity_decomposer_tEEJS6_S7_S6_S7_S8_yiiSC_SE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$48, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2136
	testl	%eax, %eax
	jne	.L2357
	testl	%ebx, %ebx
	jne	.L2136
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2136
	movl	-2684(%rbp), %eax
	movl	-2680(%rbp), %edi
	addl	%edi, %eax
	movl	%eax, -880(%rbp)
	jmp	.L2136
.L2357:
	movl	%eax, %ebx
.L2136:
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2358
	testl	%eax, %eax
	jne	.L2116
	movabsq	$4294967297, %r13
	testl	%ebx, %ebx
	jne	.L2358
.L2138:
	movl	-880(%rbp), %edi
	movl	%edi, -2680(%rbp)
	cmpl	%edi, 16(%rbp)
	jle	.L2888
	leaq	-496(%rbp), %rsi
	movq	%rsi, -2664(%rbp)
	movl	-2680(%rbp), %esi
	cmpl	%esi, -2712(%rbp)
	jle	.L2139
	leaq	-336(%rbp), %rdi
	movq	%rdi, -2664(%rbp)
.L2139:
	movl	%eax, %esi
	cltq
	movq	-2664(%rbp), %rdi
	movq	%r13, -1236(%rbp)
	xorl	$1, %esi
	movq	%r13, -1224(%rbp)
	leaq	-880(%rbp), %r9
	leaq	-528(%rbp), %r8
	movslq	%esi, %rdx
	movl	%esi, -2684(%rbp)
	movq	-96(%rbp,%rax,8), %rsi
	movq	-136(%rbp,%rax,8), %rax
	movq	-96(%rbp,%rdx,8), %rcx
	movq	-136(%rbp,%rdx,8), %rdx
	movq	%rsi, -680(%rbp)
	movq	%rdi, %rsi
	movq	%rax, -600(%rbp)
	movq	-2696(%rbp), %rax
	movq	%rdx, -640(%rbp)
	movl	16(%rbp), %edx
	movq	%rax, -760(%rbp)
	movl	-2680(%rbp), %eax
	movq	%rcx, -720(%rbp)
	subl	%eax, %edx
	movq	-2664(%rbp), %rax
	movl	72(%rax), %eax
	cmpl	%eax, %edx
	cmovle	%edx, %eax
	movl	76(%rdi), %edx
	xorl	%ecx, %ecx
	movq	%rcx, -1216(%rbp)
	leaq	-760(%rbp), %rcx
	movl	%eax, -2720(%rbp)
	movl	%eax, -840(%rbp)
	movq	-2664(%rbp), %rax
	movl	128(%rax), %eax
	imull	%eax, %edx
	movl	%eax, -1240(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1208(%rbp)
	movq	%rdi, %rax
	movl	%edx, -800(%rbp)
	movl	8(%rdi), %edx
	addq	$88, %rax
	leaq	-1240(%rbp), %rdi
	movq	%rax, -2728(%rbp)
	movl	%edx, -1228(%rbp)
	leaq	-600(%rbp), %rdx
	pushq	%rax
	leaq	-840(%rbp), %rax
	movq	(%rsi), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r14d, %r14d
	jne	.L2464
	testl	%eax, %eax
	jne	.L2144
.L2464:
	movl	%r14d, %ebx
	testl	%r14d, %r14d
	jne	.L2144
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2144
	movq	-2664(%rbp), %rax
	leaq	-800(%rbp), %rcx
	movq	$1, -1192(%rbp)
	leaq	-760(%rbp), %rdx
	leaq	-1200(%rbp), %rdi
	movq	%r13, -1200(%rbp)
	movl	32(%rax), %eax
	movq	%r13, -1184(%rbp)
	movl	%eax, -1188(%rbp)
	xorl	%eax, %eax
	movq	%rax, -1176(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1168(%rbp)
	movq	-2664(%rbp), %rax
	movq	24(%rax), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r14d, %r14d
	jne	.L2465
	testl	%eax, %eax
	jne	.L2144
.L2465:
	movl	%r14d, %ebx
	testl	%r14d, %r14d
	jne	.L2144
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2144
	movq	-2664(%rbp), %rax
	movq	-2664(%rbp), %rdi
	xorl	%ebx, %ebx
	movq	%r13, -1156(%rbp)
	movq	%r13, -1144(%rbp)
	leaq	-640(%rbp), %rcx
	leaq	-720(%rbp), %r9
	movl	56(%rax), %eax
	movl	128(%rdi), %edx
	movq	%rbx, -1136(%rbp)
	leaq	-680(%rbp), %r8
	movq	48(%rdi), %rsi
	leaq	-1160(%rbp), %rdi
	movl	%eax, -1148(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1160(%rbp)
	leaq	-600(%rbp), %rdx
	movq	%rax, -1128(%rbp)
	leaq	-840(%rbp), %rax
	pushq	%r14
	pushq	-2728(%rbp)
	pushq	%rax
	leaq	-880(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	leaq	-760(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x30
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_PyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSA_6detail21identity_decomposer_tEEJS6_S7_S6_S7_S8_yiiSC_SE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$48, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2144
	testl	%eax, %eax
	jne	.L2362
	testl	%ebx, %ebx
	jne	.L2144
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2144
	movl	-2680(%rbp), %eax
	movl	-2720(%rbp), %esi
	addl	%esi, %eax
	movl	%eax, -880(%rbp)
	jmp	.L2144
.L2362:
	movl	%eax, %ebx
.L2144:
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2363
	testl	%eax, %eax
	jne	.L2145
	testl	%ebx, %ebx
	jne	.L2363
	movl	-2684(%rbp), %eax
	jmp	.L2138
.L2888:
	xorl	%r11d, %r11d
	movl	%r11d, -2664(%rbp)
	jmp	.L2145
.L2363:
	movl	%ebx, -2664(%rbp)
.L2145:
	movl	-2704(%rbp), %eax
	addl	16(%r15), %eax
	andl	$1, %eax
	movl	%eax, 16(%r15)
	movl	-2704(%rbp), %eax
	addl	16(%r12), %eax
	andl	$1, %eax
	movl	%eax, 16(%r12)
	jmp	.L2073
.L2348:
	movl	%r13d, %eax
	jmp	.L2116
.L2353:
	movl	%r14d, %eax
	jmp	.L2116
.L2358:
	movl	%ebx, %eax
.L2116:
	movl	%eax, -2664(%rbp)
	jmp	.L2073
.L2069:
	testb	%al, %al
	jne	.L2111
	cmpq	$4864, -2680(%rbp)
	ja	.L2148
	testq	%rbx, %rbx
	je	.L2072
	movabsq	$4294967297, %rax
	xorl	%r9d, %r9d
	movabsq	$1099511627777, %rdi
	movq	%rax, -1680(%rbp)
	leaq	-2440(%rbp), %rcx
	leaq	-2432(%rbp), %r8
	movq	%rax, -1664(%rbp)
	movq	-2672(%rbp), %rax
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rdi, -1672(%rbp)
	leaq	-1680(%rbp), %rdi
	movq	%rax, -1648(%rbp)
	movslq	16(%r12), %rax
	movq	%r9, -1656(%rbp)
	leaq	-2424(%rbp), %r9
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2432(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2424(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2448(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2440(%rbp)
	leaq	-2448(%rbp), %rdx
	pushq	%r10
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_yiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_S7_S7_yiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2468
	testl	%eax, %eax
	jne	.L2073
.L2468:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2073
.L2148:
	movl	-2684(%rbp), %esi
	movl	16(%rbp), %eax
	movl	$8, %ecx
	leaq	-136(%rbp), %rdi
	subl	%esi, %eax
	xorl	%esi, %esi
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268429568, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$7424, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268429568, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%r8d, %r8d
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r8, -160(%rbp)
	cltq
	movq	%r8, -152(%rbp)
	salq	$2, %rax
	movq	%r13, -144(%rbp)
	movq	%rax, -168(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L2152:
	movq	-176(%rbp,%rdx), %rdi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rdi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L2152
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L2153
	movq	-2696(%rbp), %rsi
	movq	%rax, (%rsi)
	jmp	.L2073
.L2153:
	movq	-2696(%rbp), %rcx
	cmpq	%rax, (%rcx)
	jnb	.L2155
	call	cudaGetLastError@PLT
.L2158:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2696(%rbp)
	movq	%rax, -496(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2720(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2728(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L2889
.L2155:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L2157:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L2157
	jmp	.L2158
.L2889:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2469
	testl	%eax, %eax
	jne	.L2073
.L2469:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2696(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2470
	testl	%eax, %eax
	jne	.L2073
.L2470:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	$-1, -800(%rbp)
	xorl	%edi, %edi
	movl	%edi, -760(%rbp)
	leaq	-800(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2471
	testl	%eax, %eax
	jne	.L2073
.L2471:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-800(%rbp), %edx
	leaq	-760(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2472
	testl	%eax, %eax
	jne	.L2073
.L2472:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	leaq	-720(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	movl	$1, -720(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2473
	testl	%eax, %eax
	jne	.L2073
.L2473:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-720(%rbp), %eax
	imull	-760(%rbp), %eax
	xorl	%ecx, %ecx
	movl	$1, -1636(%rbp)
	movq	%rcx, -1616(%rbp)
	leaq	-496(%rbp), %r13
	leaq	-2416(%rbp), %rcx
	leaq	-1640(%rbp), %rdi
	leaq	-520(%rbp), %r9
	movq	%r13, %rdx
	movl	%eax, -1640(%rbp)
	leaq	-528(%rbp), %r8
	movabsq	$1099511627777, %rax
	movq	%rax, -1632(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1624(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1608(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2416(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%rsi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	movl	%eax, %ebx
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2474
	testl	%eax, %eax
	jne	.L2073
.L2474:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	movl	-2704(%rbp), %eax
	leaq	-1600(%rbp), %rdi
	movq	%r13, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_(%rip), %rsi
	movl	$1, -1596(%rbp)
	movl	%eax, -1600(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -1592(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1584(%rbp)
	xorl	%eax, %eax
	movq	%rax, -1576(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1568(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2475
	testl	%eax, %eax
	jne	.L2073
.L2475:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	leaq	0(,%r14,4), %rax
	xorl	%r13d, %r13d
	salq	$11, %r14
	movq	%rax, -2760(%rbp)
	movq	%r14, -2744(%rbp)
	movq	%r13, -2704(%rbp)
.L2167:
	movl	-2684(%rbp), %eax
	movl	%eax, -680(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L2073
	movl	16(%rbp), %eax
	movl	-2684(%rbp), %esi
	movl	$8, %edx
	movq	-2704(%rbp), %rdi
	movq	-2696(%rbp), %rcx
	subl	%esi, %eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r13d, %r13d
	movl	%eax, -640(%rbp)
	movq	-2728(%rbp), %rax
	leaq	(%rax,%rdi,4), %rax
	movq	%rax, -2752(%rbp)
	movq	%rdi, %rax
	salq	$11, %rax
	leaq	(%rcx,%rax), %r14
.L2168:
	cmpq	%r13, -2712(%rbp)
	je	.L2890
	imulq	$-268429568, %r13, %rax
	movl	$268429568, %edx
	movq	-2680(%rbp), %rsi
	movl	$7424, %edi
	movq	-2672(%rbp), %rcx
	addq	%rsi, %rax
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -600(%rbp)
	idivl	%edi
	movq	-2720(%rbp), %rdi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2736(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2374
	testl	%eax, %eax
	jne	.L2169
	testl	%ebx, %ebx
	jne	.L2374
	movl	-2736(%rbp), %eax
	movslq	16(%r12), %rcx
	imulq	$1073718272, %r13, %rdx
	xorl	%ebx, %ebx
	movl	$1, -1556(%rbp)
	movl	%eax, -1560(%rbp)
	movq	(%r12,%rcx,8), %rsi
	movabsq	$1099511627777, %rax
	movq	%rax, -1552(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1544(%rbp)
	movq	-2672(%rbp), %rax
	addq	%rdx, %rsi
	movq	%rbx, -1536(%rbp)
	movq	%rax, -1528(%rbp)
	movq	%rcx, %rax
	movslq	16(%r15), %rcx
	xorl	$1, %eax
	movq	%rsi, -2408(%rbp)
	cltq
	addq	(%r15,%rcx,8), %rdx
	movq	%r14, -2376(%rbp)
	movq	(%r12,%rax,8), %rax
	movq	%rdx, -2392(%rbp)
	movq	%rax, -2400(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2384(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r13
	jnb	.L2171
	movq	-2744(%rbp), %rax
	addq	%r14, %rax
.L2171:
	movq	%rax, -2368(%rbp)
	movq	-2752(%rbp), %rax
	leaq	-2360(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-1560(%rbp), %rdi
	leaq	-2376(%rbp), %r9
	movq	%rax, -2360(%rbp)
	leaq	-640(%rbp), %rax
	leaq	-2368(%rbp), %r8
	pushq	%r11
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-680(%rbp), %rax
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-2408(%rbp), %rax
	pushq	%rax
	leaq	-2400(%rbp), %rax
	pushq	%rax
	leaq	-2392(%rbp), %rax
	pushq	%rax
	leaq	-2384(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjS9_SB_iiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_S9_S9_iiiSF_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2374
	testl	%eax, %eax
	jne	.L2169
	testl	%ebx, %ebx
	jne	.L2374
	call	cudaGetLastError@PLT
	movq	-2744(%rbp), %rbx
	movq	-2760(%rbp), %rcx
	addq	%rcx, -2752(%rbp)
	addq	%rbx, %r14
	testl	%eax, %eax
	jne	.L2169
	incq	%r13
	jmp	.L2168
.L2374:
	movl	%ebx, %eax
.L2169:
	movl	%eax, -2664(%rbp)
	jmp	.L2073
.L2890:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2704(%rbp)
	jmp	.L2167
.L2068:
	testb	%al, %al
	jne	.L2111
	cmpq	$4864, -2680(%rbp)
	ja	.L2176
	testq	%rbx, %rbx
	je	.L2072
	movabsq	$4294967297, %rax
	xorl	%r9d, %r9d
	movabsq	$1099511627777, %rsi
	movq	%rax, -840(%rbp)
	leaq	-2208(%rbp), %rcx
	leaq	-840(%rbp), %rdi
	movq	%rax, -824(%rbp)
	movq	-2672(%rbp), %rax
	leaq	-2216(%rbp), %r8
	movq	%rsi, -832(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -808(%rbp)
	movslq	16(%r12), %rax
	movq	%r9, -816(%rbp)
	leaq	-2224(%rbp), %r9
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2216(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2224(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2200(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2208(%rbp)
	leaq	-2200(%rbp), %rdx
	pushq	%r10
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_yiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_S7_S7_yiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2478
	testl	%eax, %eax
	jne	.L2073
.L2478:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2073
.L2176:
	movl	-2684(%rbp), %edi
	movl	16(%rbp), %eax
	xorl	%esi, %esi
	movl	$8, %ecx
	subl	%edi, %eax
	leaq	-136(%rbp), %rdi
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268431360, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$7680, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268431360, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%r8d, %r8d
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r8, -160(%rbp)
	cltq
	movq	%r8, -152(%rbp)
	salq	$2, %rax
	movq	%r13, -144(%rbp)
	movq	%rax, -168(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L2180:
	movq	-176(%rbp,%rdx), %rcx
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	addq	$255, %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L2180
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L2181
	movq	-2696(%rbp), %rbx
	movq	%rax, (%rbx)
	jmp	.L2073
.L2181:
	movq	-2696(%rbp), %rdi
	cmpq	%rax, (%rdi)
	jnb	.L2183
	call	cudaGetLastError@PLT
.L2186:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2720(%rbp)
	movq	%rax, -496(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2728(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2736(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L2891
.L2183:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L2185:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L2185
	jmp	.L2186
.L2891:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2479
	testl	%eax, %eax
	jne	.L2073
.L2479:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2720(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2480
	testl	%eax, %eax
	jne	.L2073
.L2480:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	$-1, -800(%rbp)
	xorl	%edi, %edi
	movl	%edi, -760(%rbp)
	leaq	-800(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2481
	testl	%eax, %eax
	jne	.L2073
.L2481:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-800(%rbp), %edx
	leaq	-760(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2482
	testl	%eax, %eax
	jne	.L2073
.L2482:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	leaq	-720(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	movl	$1, -720(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2483
	testl	%eax, %eax
	jne	.L2073
.L2483:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-720(%rbp), %eax
	imull	-760(%rbp), %eax
	xorl	%ecx, %ecx
	movl	$1, -876(%rbp)
	movq	%rcx, -856(%rbp)
	leaq	-496(%rbp), %r13
	leaq	-2232(%rbp), %rcx
	leaq	-880(%rbp), %rdi
	leaq	-520(%rbp), %r9
	movq	%r13, %rdx
	movl	%eax, -880(%rbp)
	leaq	-528(%rbp), %r8
	movabsq	$1099511627777, %rax
	movq	%rax, -872(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -864(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -848(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2232(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%rsi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	movl	%eax, %ebx
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2484
	testl	%eax, %eax
	jne	.L2073
.L2484:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	movl	-2704(%rbp), %eax
	leaq	-920(%rbp), %rdi
	movq	%r13, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_(%rip), %rsi
	movl	$1, -916(%rbp)
	movl	%eax, -920(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -912(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -904(%rbp)
	xorl	%eax, %eax
	movq	%rax, -896(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -888(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2485
	testl	%eax, %eax
	jne	.L2073
.L2485:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	leaq	0(,%r14,4), %rax
	xorl	%r13d, %r13d
	salq	$11, %r14
	movq	%rax, -2760(%rbp)
	movq	%r14, -2744(%rbp)
	movq	%r13, -2696(%rbp)
.L2195:
	movl	-2684(%rbp), %eax
	movl	%eax, -680(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L2073
	movl	16(%rbp), %eax
	movl	-2684(%rbp), %ebx
	movl	$8, %edx
	movq	-2696(%rbp), %rsi
	movq	-2720(%rbp), %rcx
	subl	%ebx, %eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r13d, %r13d
	movl	%eax, -640(%rbp)
	movq	-2736(%rbp), %rax
	leaq	(%rax,%rsi,4), %rax
	movq	%rax, -2752(%rbp)
	movq	%rsi, %rax
	salq	$11, %rax
	leaq	(%rcx,%rax), %r14
.L2196:
	cmpq	%r13, -2712(%rbp)
	je	.L2892
	imulq	$-268431360, %r13, %rax
	movl	$268431360, %edx
	movq	-2680(%rbp), %rbx
	movl	$7680, %esi
	movq	-2672(%rbp), %rcx
	movq	-2728(%rbp), %rdi
	addq	%rbx, %rax
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -600(%rbp)
	idivl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2704(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2385
	testl	%eax, %eax
	jne	.L2197
	testl	%ebx, %ebx
	jne	.L2385
	movl	-2704(%rbp), %eax
	movslq	16(%r12), %rcx
	imulq	$1073725440, %r13, %rdx
	xorl	%ebx, %ebx
	movl	$1, -956(%rbp)
	movl	%eax, -960(%rbp)
	movq	(%r12,%rcx,8), %rsi
	movabsq	$1099511627777, %rax
	movq	%rax, -952(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -944(%rbp)
	movq	-2672(%rbp), %rax
	addq	%rdx, %rsi
	movq	%rbx, -936(%rbp)
	movq	%rax, -928(%rbp)
	movq	%rcx, %rax
	movslq	16(%r15), %rcx
	xorl	$1, %eax
	movq	%rsi, -2240(%rbp)
	cltq
	addq	(%r15,%rcx,8), %rdx
	movq	%r14, -2272(%rbp)
	movq	(%r12,%rax,8), %rax
	movq	%rdx, -2256(%rbp)
	movq	%rax, -2248(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2264(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r13
	jnb	.L2199
	movq	-2744(%rbp), %rax
	addq	%r14, %rax
.L2199:
	movq	%rax, -2280(%rbp)
	movq	-2752(%rbp), %rax
	leaq	-2288(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-960(%rbp), %rdi
	leaq	-2272(%rbp), %r9
	movq	%rax, -2288(%rbp)
	leaq	-640(%rbp), %rax
	leaq	-2280(%rbp), %r8
	pushq	%r11
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-680(%rbp), %rax
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-2240(%rbp), %rax
	pushq	%rax
	leaq	-2248(%rbp), %rax
	pushq	%rax
	leaq	-2256(%rbp), %rax
	pushq	%rax
	leaq	-2264(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjS9_SB_iiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_S9_S9_iiiSF_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2385
	testl	%eax, %eax
	jne	.L2197
	testl	%ebx, %ebx
	jne	.L2385
	call	cudaGetLastError@PLT
	movq	-2744(%rbp), %rcx
	movq	-2760(%rbp), %rdi
	addq	%rdi, -2752(%rbp)
	addq	%rcx, %r14
	testl	%eax, %eax
	jne	.L2197
	incq	%r13
	jmp	.L2196
.L2385:
	movl	%ebx, %eax
.L2197:
	movl	%eax, -2664(%rbp)
	jmp	.L2073
.L2892:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2696(%rbp)
	jmp	.L2195
.L2067:
	testb	%al, %al
	jne	.L2111
	cmpq	$4864, -2680(%rbp)
	ja	.L2204
	testq	%rbx, %rbx
	je	.L2072
	movabsq	$4294967297, %rax
	xorl	%r9d, %r9d
	movabsq	$1099511627777, %rbx
	movq	%rax, -1840(%rbp)
	leaq	-2536(%rbp), %rcx
	leaq	-1840(%rbp), %rdi
	movq	%rax, -1824(%rbp)
	movq	-2672(%rbp), %rax
	leaq	-2528(%rbp), %r8
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%r9, -1816(%rbp)
	leaq	-2520(%rbp), %r9
	movq	%rax, -1808(%rbp)
	movslq	16(%r12), %rax
	movq	%rbx, -1832(%rbp)
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2528(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2520(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2544(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2536(%rbp)
	leaq	-2544(%rbp), %rdx
	pushq	%r10
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_yiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_S7_S7_yiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2488
	testl	%eax, %eax
	jne	.L2073
.L2488:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2073
.L2204:
	movl	-2684(%rbp), %esi
	movl	16(%rbp), %eax
	movl	$8, %ecx
	leaq	-136(%rbp), %rdi
	subl	%esi, %eax
	xorl	%esi, %esi
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268431360, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$7680, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268431360, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%r8d, %r8d
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r8, -160(%rbp)
	cltq
	movq	%r8, -152(%rbp)
	salq	$2, %rax
	movq	%r13, -144(%rbp)
	movq	%rax, -168(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L2208:
	movq	-176(%rbp,%rdx), %rdi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rdi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L2208
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L2209
	movq	-2696(%rbp), %rbx
	movq	%rax, (%rbx)
	jmp	.L2073
.L2209:
	movq	-2696(%rbp), %rcx
	cmpq	%rax, (%rcx)
	jnb	.L2211
	call	cudaGetLastError@PLT
.L2214:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2696(%rbp)
	movq	%rax, -496(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2720(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2728(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L2893
.L2211:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L2213:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L2213
	jmp	.L2214
.L2893:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2489
	testl	%eax, %eax
	jne	.L2073
.L2489:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2696(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2490
	testl	%eax, %eax
	jne	.L2073
.L2490:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	$-1, -800(%rbp)
	xorl	%edi, %edi
	movl	%edi, -760(%rbp)
	leaq	-800(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2491
	testl	%eax, %eax
	jne	.L2073
.L2491:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-800(%rbp), %edx
	leaq	-760(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2492
	testl	%eax, %eax
	jne	.L2073
.L2492:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	leaq	-720(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	movl	$1, -720(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2493
	testl	%eax, %eax
	jne	.L2073
.L2493:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-720(%rbp), %eax
	imull	-760(%rbp), %eax
	xorl	%ecx, %ecx
	movl	$1, -1796(%rbp)
	movq	%rcx, -1776(%rbp)
	leaq	-496(%rbp), %r13
	leaq	-2512(%rbp), %rcx
	leaq	-1800(%rbp), %rdi
	leaq	-520(%rbp), %r9
	movq	%r13, %rdx
	movl	%eax, -1800(%rbp)
	leaq	-528(%rbp), %r8
	movabsq	$1099511627777, %rax
	movq	%rax, -1792(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1784(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1768(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2512(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%rsi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	movl	%eax, %ebx
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2494
	testl	%eax, %eax
	jne	.L2073
.L2494:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	movl	-2704(%rbp), %eax
	leaq	-1760(%rbp), %rdi
	movq	%r13, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_(%rip), %rsi
	movl	$1, -1756(%rbp)
	movl	%eax, -1760(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -1752(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1744(%rbp)
	xorl	%eax, %eax
	movq	%rax, -1736(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1728(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2495
	testl	%eax, %eax
	jne	.L2073
.L2495:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	leaq	0(,%r14,4), %rax
	xorl	%r13d, %r13d
	salq	$11, %r14
	movq	%rax, -2760(%rbp)
	movq	%r14, -2752(%rbp)
	movq	%r13, -2704(%rbp)
.L2223:
	movl	-2684(%rbp), %eax
	movl	%eax, -680(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L2073
	movl	16(%rbp), %eax
	movl	-2684(%rbp), %ebx
	movl	$8, %edx
	movq	-2704(%rbp), %rsi
	movq	-2696(%rbp), %rdi
	subl	%ebx, %eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r13d, %r13d
	movl	%eax, -640(%rbp)
	movq	-2728(%rbp), %rax
	leaq	(%rax,%rsi,4), %rax
	movq	%rax, -2744(%rbp)
	movq	%rsi, %rax
	salq	$11, %rax
	leaq	(%rdi,%rax), %r14
.L2224:
	cmpq	%r13, -2712(%rbp)
	je	.L2894
	imulq	$-268431360, %r13, %rax
	movl	$268431360, %edx
	movq	-2680(%rbp), %rcx
	movl	$7680, %ebx
	movq	-2720(%rbp), %rdi
	addq	%rcx, %rax
	movq	-2672(%rbp), %rcx
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -600(%rbp)
	idivl	%ebx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2736(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2396
	testl	%eax, %eax
	jne	.L2225
	testl	%ebx, %ebx
	jne	.L2396
	movl	-2736(%rbp), %eax
	movslq	16(%r12), %rcx
	imulq	$1073725440, %r13, %rdx
	xorl	%ebx, %ebx
	movl	$1, -1716(%rbp)
	movl	%eax, -1720(%rbp)
	movq	(%r12,%rcx,8), %rsi
	movabsq	$1099511627777, %rax
	movq	%rax, -1712(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1704(%rbp)
	movq	-2672(%rbp), %rax
	addq	%rdx, %rsi
	movq	%rbx, -1696(%rbp)
	movq	%rax, -1688(%rbp)
	movq	%rcx, %rax
	movslq	16(%r15), %rcx
	xorl	$1, %eax
	movq	%rsi, -2504(%rbp)
	cltq
	addq	(%r15,%rcx,8), %rdx
	movq	%r14, -2472(%rbp)
	movq	(%r12,%rax,8), %rax
	movq	%rdx, -2488(%rbp)
	movq	%rax, -2496(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2480(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r13
	jnb	.L2227
	movq	-2752(%rbp), %rax
	addq	%r14, %rax
.L2227:
	movq	%rax, -2464(%rbp)
	movq	-2744(%rbp), %rax
	leaq	-2456(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-1720(%rbp), %rdi
	leaq	-2472(%rbp), %r9
	movq	%rax, -2456(%rbp)
	leaq	-640(%rbp), %rax
	leaq	-2464(%rbp), %r8
	pushq	%r11
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-680(%rbp), %rax
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-2504(%rbp), %rax
	pushq	%rax
	leaq	-2496(%rbp), %rax
	pushq	%rax
	leaq	-2488(%rbp), %rax
	pushq	%rax
	leaq	-2480(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjS9_SB_iiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_S9_S9_iiiSF_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2396
	testl	%eax, %eax
	jne	.L2225
	testl	%ebx, %ebx
	jne	.L2396
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L2225
	movq	-2752(%rbp), %rax
	movq	-2760(%rbp), %rsi
	incq	%r13
	addq	%rsi, -2744(%rbp)
	addq	%rax, %r14
	jmp	.L2224
.L2396:
	movl	%ebx, %eax
.L2225:
	movl	%eax, -2664(%rbp)
	jmp	.L2073
.L2894:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2704(%rbp)
	jmp	.L2223
.L2066:
	testb	%al, %al
	jne	.L2111
	cmpq	$4864, -2680(%rbp)
	ja	.L2232
	testq	%rbx, %rbx
	je	.L2072
	movabsq	$4294967297, %rax
	xorl	%r9d, %r9d
	movabsq	$1099511627777, %rdi
	movq	%rax, -680(%rbp)
	leaq	-2112(%rbp), %rcx
	leaq	-2120(%rbp), %r8
	movq	%rax, -664(%rbp)
	movq	-2672(%rbp), %rax
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rdi, -672(%rbp)
	leaq	-680(%rbp), %rdi
	movq	%rax, -648(%rbp)
	movslq	16(%r12), %rax
	movq	%r9, -656(%rbp)
	leaq	-2128(%rbp), %r9
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2120(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2128(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2104(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2112(%rbp)
	leaq	-2104(%rbp), %rdx
	pushq	%r10
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_yiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_S7_S7_yiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, -2664(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2664(%rbp)
	jne	.L2073
	testl	%eax, %eax
	jne	.L2397
	cmpl	$0, -2664(%rbp)
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2073
.L2232:
	movl	-2684(%rbp), %esi
	movl	16(%rbp), %eax
	movl	$8, %ecx
	leaq	-136(%rbp), %rdi
	subl	%esi, %eax
	xorl	%esi, %esi
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268433920, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$11776, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268433920, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%r8d, %r8d
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r8, -160(%rbp)
	cltq
	movq	%r8, -152(%rbp)
	salq	$2, %rax
	movq	%r13, -144(%rbp)
	movq	%rax, -168(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L2236:
	movq	-176(%rbp,%rdx), %rdi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rdi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L2236
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L2237
	movq	-2696(%rbp), %rbx
	movq	%rax, (%rbx)
	jmp	.L2073
.L2237:
	movq	-2696(%rbp), %rcx
	cmpq	%rax, (%rcx)
	jnb	.L2239
	call	cudaGetLastError@PLT
.L2242:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2720(%rbp)
	movq	%rax, -496(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2728(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2736(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L2895
.L2239:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L2241:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L2241
	jmp	.L2242
.L2895:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2499
	testl	%eax, %eax
	jne	.L2073
.L2499:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2720(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2500
	testl	%eax, %eax
	jne	.L2073
.L2500:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	$-1, -920(%rbp)
	xorl	%edi, %edi
	movl	%edi, -880(%rbp)
	leaq	-920(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2501
	testl	%eax, %eax
	jne	.L2073
.L2501:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-920(%rbp), %edx
	leaq	-880(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2502
	testl	%eax, %eax
	jne	.L2073
.L2502:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	leaq	-840(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	movl	$1, -840(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2503
	testl	%eax, %eax
	jne	.L2073
.L2503:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-840(%rbp), %eax
	imull	-880(%rbp), %eax
	xorl	%ecx, %ecx
	movl	$1, -716(%rbp)
	movq	%rcx, -696(%rbp)
	leaq	-496(%rbp), %r13
	leaq	-2136(%rbp), %rcx
	leaq	-720(%rbp), %rdi
	leaq	-520(%rbp), %r9
	movq	%r13, %rdx
	movl	%eax, -720(%rbp)
	leaq	-528(%rbp), %r8
	movabsq	$1099511627777, %rax
	movq	%rax, -712(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -704(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -688(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2136(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%rsi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	movl	%eax, %ebx
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2504
	testl	%eax, %eax
	jne	.L2073
.L2504:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	movl	-2704(%rbp), %eax
	leaq	-760(%rbp), %rdi
	movq	%r13, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_(%rip), %rsi
	movl	$1, -756(%rbp)
	movl	%eax, -760(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -752(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -744(%rbp)
	xorl	%eax, %eax
	movq	%rax, -736(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -728(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2505
	testl	%eax, %eax
	jne	.L2073
.L2505:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	leaq	0(,%r14,4), %rax
	salq	$11, %r14
	movq	%rax, -2760(%rbp)
	xorl	%eax, %eax
	movq	%r14, -2752(%rbp)
	movq	%rax, -2696(%rbp)
.L2251:
	movl	-2684(%rbp), %eax
	movl	%eax, -680(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L2073
	movl	-2684(%rbp), %ebx
	movl	16(%rbp), %eax
	movl	$8, %edx
	movq	-2720(%rbp), %rsi
	subl	%ebx, %eax
	movq	-2696(%rbp), %rbx
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r13d, %r13d
	movl	%eax, -640(%rbp)
	movq	-2736(%rbp), %rax
	leaq	(%rax,%rbx,4), %rax
	movq	%rax, -2744(%rbp)
	movq	%rbx, %rax
	salq	$11, %rax
	leaq	(%rsi,%rax), %r14
.L2252:
	cmpq	%r13, -2712(%rbp)
	je	.L2896
	imulq	$-268433920, %r13, %rax
	movl	$268433920, %edx
	movl	$11776, %ecx
	movq	-2680(%rbp), %rdi
	addq	%rdi, %rax
	movq	-2728(%rbp), %rdi
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -600(%rbp)
	idivl	%ecx
	movq	-2672(%rbp), %rcx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2704(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2407
	testl	%eax, %eax
	jne	.L2253
	testl	%ebx, %ebx
	jne	.L2407
	movl	-2704(%rbp), %eax
	movslq	16(%r12), %rcx
	imulq	$1073735680, %r13, %rdx
	movl	$1, -796(%rbp)
	movq	%r14, -2176(%rbp)
	movl	%eax, -800(%rbp)
	movq	(%r12,%rcx,8), %rsi
	movabsq	$1099511627777, %rax
	movq	%rax, -792(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -784(%rbp)
	xorl	%eax, %eax
	addq	%rdx, %rsi
	movq	%rax, -776(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rsi, -2144(%rbp)
	movq	%rax, -768(%rbp)
	movq	%rcx, %rax
	movslq	16(%r15), %rcx
	xorl	$1, %eax
	cltq
	addq	(%r15,%rcx,8), %rdx
	movq	(%r12,%rax,8), %rax
	movq	%rdx, -2160(%rbp)
	movq	%rax, -2152(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2168(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r13
	jnb	.L2255
	movq	-2752(%rbp), %rax
	addq	%r14, %rax
.L2255:
	movq	%rax, -2184(%rbp)
	movq	-2744(%rbp), %rax
	leaq	-2192(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-800(%rbp), %rdi
	leaq	-2176(%rbp), %r9
	movq	%rax, -2192(%rbp)
	leaq	-2184(%rbp), %r8
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-640(%rbp), %rax
	pushq	%rax
	leaq	-680(%rbp), %rax
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-2144(%rbp), %rax
	pushq	%rax
	leaq	-2152(%rbp), %rax
	pushq	%rax
	leaq	-2160(%rbp), %rax
	pushq	%rax
	leaq	-2168(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjS9_SB_iiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_S9_S9_iiiSF_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2407
	testl	%eax, %eax
	jne	.L2253
	testl	%ebx, %ebx
	jne	.L2407
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L2253
	movq	-2752(%rbp), %rax
	movq	-2760(%rbp), %rbx
	incq	%r13
	addq	%rbx, -2744(%rbp)
	addq	%rax, %r14
	jmp	.L2252
.L2407:
	movl	%ebx, %eax
.L2253:
	movl	%eax, -2664(%rbp)
	jmp	.L2073
.L2896:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2696(%rbp)
	jmp	.L2251
.L2065:
	testb	%al, %al
	jne	.L2111
	cmpq	$4864, -2680(%rbp)
	ja	.L2260
	testq	%rbx, %rbx
	je	.L2072
	xorl	%ebx, %ebx
	leaq	-2632(%rbp), %rcx
	movabsq	$4294967297, %rax
	movabsq	$1099511627777, %rsi
	movq	%rax, -2000(%rbp)
	leaq	-2000(%rbp), %rdi
	leaq	-2616(%rbp), %r9
	movq	%rax, -1984(%rbp)
	movq	-2672(%rbp), %rax
	leaq	-2624(%rbp), %r8
	movq	%rsi, -1992(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -1968(%rbp)
	movslq	16(%r12), %rax
	movq	%rbx, -1976(%rbp)
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2624(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2616(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2640(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2632(%rbp)
	leaq	-2640(%rbp), %rdx
	pushq	%r13
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_yiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_S7_S7_yiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, -2664(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2664(%rbp)
	jne	.L2073
	testl	%eax, %eax
	jne	.L2408
	cmpl	$0, -2664(%rbp)
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2073
.L2260:
	movl	-2684(%rbp), %ecx
	movl	16(%rbp), %eax
	xorl	%esi, %esi
	leaq	-136(%rbp), %rdi
	subl	%ecx, %eax
	movl	$8, %ecx
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268431360, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$6528, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268431360, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%r11d, %r11d
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r11, -160(%rbp)
	cltq
	movq	%r11, -152(%rbp)
	salq	$2, %rax
	movq	%r13, -144(%rbp)
	movq	%rax, -168(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L2264:
	movq	-176(%rbp,%rdx), %rdi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rdi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L2264
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L2265
	movq	-2696(%rbp), %rbx
	movq	%rax, (%rbx)
	jmp	.L2073
.L2265:
	movq	-2696(%rbp), %rcx
	cmpq	%rax, (%rcx)
	jnb	.L2267
	call	cudaGetLastError@PLT
.L2270:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2696(%rbp)
	movq	%rax, -496(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2720(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2728(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L2897
.L2267:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L2269:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L2269
	jmp	.L2270
.L2897:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2509
	testl	%eax, %eax
	jne	.L2073
.L2509:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2696(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2510
	testl	%eax, %eax
	jne	.L2073
.L2510:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	xorl	%r10d, %r10d
	leaq	-800(%rbp), %rdi
	movl	$-1, -800(%rbp)
	movl	%r10d, -760(%rbp)
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2511
	testl	%eax, %eax
	jne	.L2073
.L2511:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-800(%rbp), %edx
	leaq	-760(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2512
	testl	%eax, %eax
	jne	.L2073
.L2512:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	leaq	-720(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$128, %edx
	movl	$1, -720(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2513
	testl	%eax, %eax
	jne	.L2073
.L2513:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-720(%rbp), %eax
	imull	-760(%rbp), %eax
	xorl	%r8d, %r8d
	movl	$1, -1956(%rbp)
	movq	%r8, -1936(%rbp)
	leaq	-496(%rbp), %r13
	leaq	-2608(%rbp), %rcx
	leaq	-1960(%rbp), %rdi
	leaq	-528(%rbp), %r8
	movq	%r13, %rdx
	movl	%eax, -1960(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	movabsq	$549755813889, %rax
	movq	%rax, -1952(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1944(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1928(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2608(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%r9
	leaq	-520(%rbp), %r9
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%rsi
	popq	%rdi
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2514
	testl	%eax, %eax
	jne	.L2073
.L2514:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	movl	-2704(%rbp), %eax
	xorl	%ecx, %ecx
	leaq	-1920(%rbp), %rdi
	movq	%r13, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_(%rip), %rsi
	movq	%rcx, -1896(%rbp)
	movl	%eax, -1920(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -1912(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1904(%rbp)
	movq	-2672(%rbp), %rax
	movl	$1, -1916(%rbp)
	movq	%rax, -1888(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2515
	testl	%eax, %eax
	jne	.L2073
.L2515:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	leaq	0(,%r14,4), %rax
	xorl	%edx, %edx
	salq	$11, %r14
	movq	%rax, -2760(%rbp)
	movq	%r14, -2744(%rbp)
	movq	%rdx, -2704(%rbp)
.L2279:
	movl	-2684(%rbp), %eax
	movl	%eax, -680(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L2073
	movl	-2684(%rbp), %ebx
	movl	16(%rbp), %eax
	movl	$8, %edx
	movq	-2704(%rbp), %rsi
	subl	%ebx, %eax
	movq	-2696(%rbp), %rbx
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r13d, %r13d
	movl	%eax, -640(%rbp)
	movq	-2728(%rbp), %rax
	leaq	(%rax,%rsi,4), %rax
	movq	%rax, -2752(%rbp)
	movq	%rsi, %rax
	salq	$11, %rax
	leaq	(%rbx,%rax), %r14
.L2280:
	cmpq	%r13, -2712(%rbp)
	je	.L2898
	imulq	$-268431360, %r13, %rax
	movl	$268431360, %edx
	movq	-2680(%rbp), %rsi
	movl	$6528, %edi
	movq	-2672(%rbp), %rcx
	addq	%rsi, %rax
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -600(%rbp)
	idivl	%edi
	movq	-2720(%rbp), %rdi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2736(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2418
	testl	%eax, %eax
	jne	.L2281
	testl	%ebx, %ebx
	jne	.L2418
	movl	-2736(%rbp), %eax
	movslq	16(%r12), %rcx
	imulq	$1073725440, %r13, %rdx
	movl	$1, -1876(%rbp)
	movq	%r14, -2568(%rbp)
	movl	%eax, -1880(%rbp)
	movq	(%r12,%rcx,8), %rsi
	movabsq	$1649267441665, %rax
	movq	%rax, -1872(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1864(%rbp)
	xorl	%eax, %eax
	addq	%rdx, %rsi
	movq	%rax, -1856(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rsi, -2600(%rbp)
	movq	%rax, -1848(%rbp)
	movq	%rcx, %rax
	movslq	16(%r15), %rcx
	xorl	$1, %eax
	cltq
	addq	(%r15,%rcx,8), %rdx
	movq	(%r12,%rax,8), %rax
	movq	%rdx, -2584(%rbp)
	movq	%rax, -2592(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2576(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r13
	jnb	.L2283
	movq	-2744(%rbp), %rax
	addq	%r14, %rax
.L2283:
	movq	%rax, -2560(%rbp)
	movq	-2752(%rbp), %rax
	leaq	-2552(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-1880(%rbp), %rdi
	leaq	-2568(%rbp), %r9
	movq	%rax, -2552(%rbp)
	leaq	-2560(%rbp), %r8
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-640(%rbp), %rax
	pushq	%rax
	leaq	-680(%rbp), %rax
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-2600(%rbp), %rax
	pushq	%rax
	leaq	-2592(%rbp), %rax
	pushq	%rax
	leaq	-2584(%rbp), %rax
	pushq	%rax
	leaq	-2576(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjS9_SB_iiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_S9_S9_iiiSF_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2418
	testl	%eax, %eax
	jne	.L2281
	testl	%ebx, %ebx
	jne	.L2418
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L2281
	movq	-2744(%rbp), %rax
	movq	-2760(%rbp), %rcx
	incq	%r13
	addq	%rcx, -2752(%rbp)
	addq	%rax, %r14
	jmp	.L2280
.L2418:
	movl	%ebx, %eax
.L2281:
	movl	%eax, -2664(%rbp)
	jmp	.L2073
.L2898:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2704(%rbp)
	jmp	.L2279
.L2064:
	testb	%al, %al
	jne	.L2111
	cmpq	$4864, -2680(%rbp)
	ja	.L2288
	testq	%rbx, %rbx
	je	.L2072
	leaq	-2016(%rbp), %rcx
	leaq	-336(%rbp), %rdi
	movabsq	$4294967297, %rax
	movabsq	$1099511627777, %rbx
	movq	%rax, -336(%rbp)
	leaq	-2032(%rbp), %r9
	leaq	-2024(%rbp), %r8
	movq	%rax, -320(%rbp)
	xorl	%eax, %eax
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -312(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rbx, -328(%rbp)
	movq	%rax, -304(%rbp)
	movslq	16(%r12), %rax
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2024(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2032(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2008(%rbp)
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2016(%rbp)
	leaq	-2008(%rbp), %rdx
	pushq	%rax
	leaq	-516(%rbp), %rax
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjS6_S7_yiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_S7_S7_yiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, -2664(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2664(%rbp)
	jne	.L2073
	testl	%eax, %eax
	jne	.L2419
	cmpl	$0, -2664(%rbp)
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2073
.L2288:
	movl	-2684(%rbp), %edi
	movl	16(%rbp), %eax
	xorl	%esi, %esi
	movl	$8, %ecx
	subl	%edi, %eax
	leaq	-136(%rbp), %rdi
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268431360, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$6528, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268431360, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r13, -144(%rbp)
	cltq
	salq	$2, %rax
	movq	%rax, -168(%rbp)
	xorl	%eax, %eax
	movq	%rax, -160(%rbp)
	movq	%rax, -152(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L2292:
	movq	-176(%rbp,%rdx), %rcx
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	addq	$255, %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L2292
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L2293
	movq	-2696(%rbp), %rbx
	movq	%rax, (%rbx)
	jmp	.L2073
.L2293:
	movq	-2696(%rbp), %rdi
	cmpq	%rax, (%rdi)
	jnb	.L2295
	call	cudaGetLastError@PLT
.L2298:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2696(%rbp)
	movq	%rax, -680(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2728(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2736(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L2899
.L2295:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L2297:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L2297
	jmp	.L2298
.L2899:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2519
	testl	%eax, %eax
	jne	.L2073
.L2519:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2696(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2520
	testl	%eax, %eax
	jne	.L2073
.L2520:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	xorl	%r11d, %r11d
	leaq	-840(%rbp), %rdi
	movl	$-1, -840(%rbp)
	movl	%r11d, -800(%rbp)
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2521
	testl	%eax, %eax
	jne	.L2073
.L2521:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-840(%rbp), %edx
	leaq	-800(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2522
	testl	%eax, %eax
	jne	.L2073
.L2522:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	leaq	-760(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$128, %edx
	movl	$1, -760(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2523
	testl	%eax, %eax
	jne	.L2073
.L2523:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	movl	-760(%rbp), %eax
	imull	-800(%rbp), %eax
	xorl	%r9d, %r9d
	movl	$1, -492(%rbp)
	movq	%r9, -472(%rbp)
	leaq	-680(%rbp), %r13
	leaq	-2040(%rbp), %rcx
	leaq	-496(%rbp), %rdi
	leaq	-520(%rbp), %r9
	movq	%r13, %rdx
	movl	%eax, -496(%rbp)
	leaq	-528(%rbp), %r8
	movabsq	$549755813889, %rax
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	movq	%rax, -488(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -480(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -464(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2040(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%r10
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%rdi
	popq	%r8
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2524
	testl	%eax, %eax
	jne	.L2073
.L2524:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	movl	-2704(%rbp), %eax
	xorl	%esi, %esi
	leaq	-600(%rbp), %rdi
	movq	%r13, %rdx
	movq	%rsi, -576(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900EyEEvPT0_(%rip), %rsi
	movl	%eax, -600(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -592(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -584(%rbp)
	movq	-2672(%rbp), %rax
	movl	$1, -596(%rbp)
	movq	%rax, -568(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2525
	testl	%eax, %eax
	jne	.L2073
.L2525:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2073
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2073
	leaq	0(,%r14,4), %rax
	xorl	%ecx, %ecx
	salq	$11, %r14
	movq	%rax, -2760(%rbp)
	movq	%r14, -2720(%rbp)
	movq	%rcx, -2704(%rbp)
.L2307:
	movl	-2684(%rbp), %eax
	movl	%eax, -720(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L2073
	movl	16(%rbp), %eax
	movl	-2684(%rbp), %ebx
	movl	$8, %edx
	movq	-2704(%rbp), %rsi
	movq	-2696(%rbp), %rcx
	subl	%ebx, %eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r13d, %r13d
	movl	%eax, -600(%rbp)
	movq	-2736(%rbp), %rax
	leaq	(%rax,%rsi,4), %rax
	movq	%rax, -2752(%rbp)
	movq	%rsi, %rax
	salq	$11, %rax
	leaq	(%rcx,%rax), %r14
.L2308:
	cmpq	%r13, -2712(%rbp)
	je	.L2900
	imulq	$-268431360, %r13, %rax
	movl	$268431360, %edx
	movq	-2680(%rbp), %rbx
	movl	$6528, %esi
	movq	-2672(%rbp), %rcx
	movq	-2728(%rbp), %rdi
	addq	%rbx, %rax
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -496(%rbp)
	idivl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2744(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2429
	testl	%eax, %eax
	jne	.L2309
	testl	%ebx, %ebx
	jne	.L2429
	movl	-2744(%rbp), %eax
	movslq	16(%r12), %rcx
	xorl	%edx, %edx
	movl	$1, -636(%rbp)
	movq	%rdx, -616(%rbp)
	imulq	$1073725440, %r13, %rdx
	movl	%eax, -640(%rbp)
	movq	(%r12,%rcx,8), %rsi
	movabsq	$1649267441665, %rax
	movq	%rax, -632(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -624(%rbp)
	movq	-2672(%rbp), %rax
	addq	%rdx, %rsi
	movq	%rsi, -2048(%rbp)
	movq	%rax, -608(%rbp)
	movq	%rcx, %rax
	movslq	16(%r15), %rcx
	xorl	$1, %eax
	movq	%r14, -2080(%rbp)
	cltq
	addq	(%r15,%rcx,8), %rdx
	movq	(%r12,%rax,8), %rax
	movq	%rdx, -2064(%rbp)
	movq	%rax, -2056(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2072(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r13
	jnb	.L2311
	movq	-2720(%rbp), %rax
	addq	%r14, %rax
.L2311:
	movq	%rax, -2088(%rbp)
	movq	-2752(%rbp), %rax
	leaq	-2096(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-640(%rbp), %rdi
	leaq	-2080(%rbp), %r9
	movq	%rax, -2096(%rbp)
	leaq	-2088(%rbp), %r8
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjjyE9Policy900ELb0EjjyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-720(%rbp), %rax
	pushq	%rax
	leaq	-496(%rbp), %rax
	pushq	%rax
	leaq	-2048(%rbp), %rax
	pushq	%rax
	leaq	-2056(%rbp), %rax
	pushq	%rax
	leaq	-2064(%rbp), %rax
	pushq	%rax
	leaq	-2072(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjS9_SB_iiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_S9_S9_iiiSF_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2429
	testl	%eax, %eax
	jne	.L2309
	testl	%ebx, %ebx
	jne	.L2429
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L2309
	movq	-2720(%rbp), %rax
	movq	-2760(%rbp), %rdi
	incq	%r13
	addq	%rdi, -2752(%rbp)
	addq	%rax, %r14
	jmp	.L2308
.L2429:
	movl	%ebx, %eax
.L2309:
	movl	%eax, -2664(%rbp)
	jmp	.L2073
.L2900:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2704(%rbp)
	jmp	.L2307
.L2397:
	movl	%eax, -2664(%rbp)
	jmp	.L2073
.L2408:
	movl	%eax, -2664(%rbp)
	jmp	.L2073
.L2419:
	movl	%eax, -2664(%rbp)
.L2073:
	call	cudaGetLastError@PLT
.LEHE32:
	cmpl	$0, -2664(%rbp)
	jne	.L2321
	testl	%eax, %eax
	jne	.L2062
	cmpl	$0, -2664(%rbp)
	je	.L2317
.L2321:
	movl	-2664(%rbp), %eax
.L2062:
	movl	%eax, -2664(%rbp)
.L2317:
	leaq	-2646(%rbp), %rdi
	call	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L2320
	jmp	.L2885
.L2430:
	endbr64
	movq	%rax, %rbx
.L2318:
	leaq	-2646(%rbp), %rdi
	call	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L2885
	movq	%rbx, %rdi
.LEHB33:
	call	_Unwind_Resume@PLT
.LEHE33:
.L2885:
	call	__stack_chk_fail@PLT
.L2320:
	movl	-2664(%rbp), %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12997:
	.section	.gcc_except_table
.LLSDA12997:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12997-.LLSDACSB12997
.LLSDACSB12997:
	.uleb128 .LEHB32-.LFB12997
	.uleb128 .LEHE32-.LEHB32
	.uleb128 .L2430-.LFB12997
	.uleb128 0
	.uleb128 .LEHB33-.LFB12997
	.uleb128 .LEHE33-.LEHB33
	.uleb128 0
	.uleb128 0
.LLSDACSE12997:
	.section	.text._ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,"axG",@progbits,_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,comdat
	.size	_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st, .-_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st
	.section	.text._Z10SortByFreqIjjEvPT_PT0_i,"axG",@progbits,_Z10SortByFreqIjjEvPT_PT0_i,comdat
	.weak	_Z10SortByFreqIjjEvPT_PT0_i
	.type	_Z10SortByFreqIjjEvPT_PT0_i, @function
_Z10SortByFreqIjjEvPT_PT0_i:
.LFB12345:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12345
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	leaq	-104(%rbp), %r15
	leaq	-136(%rbp), %r14
	pushq	%r13
	.cfi_offset 13, -40
	movq	%rdi, %r13
	leaq	-152(%rbp), %rdi
	pushq	%r12
	pushq	%rbx
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movslq	%edx, %rbx
	salq	$2, %rbx
	negq	%rbx
	subq	$152, %rsp
	sarq	$2, %rbx
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	movq	%rbx, %rax
	movq	%rsi, -152(%rbp)
	negq	%rax
	movq	%rax, -168(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS15iterator_facadeINS0_10device_ptrIjEEjNS0_8cuda_cub3tagENS0_27random_access_traversal_tagENS0_16device_referenceIjEElEdeEv
	leaq	-144(%rbp), %rdi
	movq	%r13, -144(%rbp)
	movq	%rax, %r12
	call	_ZNK6thrust20THRUST_200700_890_NS15iterator_facadeINS0_10device_ptrIjEEjNS0_8cuda_cub3tagENS0_27random_access_traversal_tagENS0_16device_referenceIjEElEdeEv
	xorl	%ecx, %ecx
	xorl	%esi, %esi
	xorl	%edi, %edi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	movq	%rcx, -136(%rbp)
	movq	%r15, %rdx
	movq	%rsi, -96(%rbp)
	leaq	-80(%rbp), %rcx
	movq	%r14, %rsi
	movq	%rax, %r13
	movl	%edi, -88(%rbp)
	xorl	%edi, %edi
	movq	%r8, -72(%rbp)
	movq	-168(%rbp), %r8
	movl	%r9d, -64(%rbp)
	xorl	%r9d, %r9d
	movq	%rax, -104(%rbp)
	movq	%r12, -80(%rbp)
	pushq	$1
	pushq	$32
	movq	%rcx, -192(%rbp)
.LEHB34:
	call	_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st
	popq	%r10
	leaq	.LC92(%rip), %rsi
	popq	%r11
	movl	%eax, %edi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	imulq	$-4, %rbx, %r8
	leaq	-128(%rbp), %rbx
	movq	-136(%rbp), %rdx
	leaq	-153(%rbp), %rsi
	movq	%rbx, %rdi
	addq	$127, %r8
	andq	$-128, %r8
	leaq	(%r8,%r8), %rax
	movq	%r8, -184(%rbp)
	addq	%rax, %rdx
	movq	%rax, -176(%rbp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC1ERNS0_16execution_policyIS4_EEm
.LEHE34:
	movq	%rbx, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	movq	%rbx, %rdi
	movq	%rax, -96(%rbp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	movq	-184(%rbp), %r8
	movq	%rbx, %rdi
	addq	%r8, %rax
	movq	%rax, -72(%rbp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	xorl	%r9d, %r9d
	movq	%r15, %rdx
	movq	%r14, %rsi
	movq	-176(%rbp), %rcx
	movq	-168(%rbp), %r8
	pushq	$1
	pushq	$32
	leaq	(%rax,%rcx), %rdi
	movq	-192(%rbp), %rcx
.LEHB35:
	.cfi_escape 0x2e,0x10
	call	_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st
	movl	%eax, %edi
	leaq	.LC93(%rip), %rsi
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	cmpl	$0, -88(%rbp)
	jne	.L2902
.L2905:
	cmpl	$0, -64(%rbp)
	jne	.L2903
	jmp	.L2904
.L2902:
	movq	-168(%rbp), %rsi
	movq	-96(%rbp), %rdi
	movq	%r13, %rdx
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub6copy_nINS1_3tagEPjlS4_EET2_RNS1_16execution_policyIT_EET0_T1_S5_.isra.0
	jmp	.L2905
.L2903:
	movq	-168(%rbp), %rsi
	movq	-72(%rbp), %rdi
	movq	%r12, %rdx
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub6copy_nINS1_3tagEPjlS4_EET2_RNS1_16execution_policyIT_EET0_T1_S5_.isra.0
.LEHE35:
.L2904:
	movq	%rbx, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv
	movl	$1, %edi
.LEHB36:
	call	_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st
	leaq	.LC94(%rip), %rsi
	movl	%eax, %edi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L2908
	jmp	.L2910
.L2909:
	endbr64
	movq	%rax, %r14
.L2906:
	movq	%rbx, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L2910
	movq	%r14, %rdi
	call	_Unwind_Resume@PLT
.LEHE36:
.L2910:
	call	__stack_chk_fail@PLT
.L2908:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12345:
	.section	.gcc_except_table
.LLSDA12345:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12345-.LLSDACSB12345
.LLSDACSB12345:
	.uleb128 .LEHB34-.LFB12345
	.uleb128 .LEHE34-.LEHB34
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB35-.LFB12345
	.uleb128 .LEHE35-.LEHB35
	.uleb128 .L2909-.LFB12345
	.uleb128 0
	.uleb128 .LEHB36-.LFB12345
	.uleb128 .LEHE36-.LEHB36
	.uleb128 0
	.uleb128 0
.LLSDACSE12345:
	.section	.text._Z10SortByFreqIjjEvPT_PT0_i,"axG",@progbits,_Z10SortByFreqIjjEvPT_PT0_i,comdat
	.size	_Z10SortByFreqIjjEvPT_PT0_i, .-_Z10SortByFreqIjjEvPT_PT0_i
	.section	.text._ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKtPtPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii,"axG",@progbits,_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKtPtPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii,comdat
	.weak	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKtPtPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	.hidden	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKtPtPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	.type	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKtPtPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii, @function
_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKtPtPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii:
.LFB13433:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movslq	%ecx, %rcx
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPKjPjPKtPtPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS8_6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2915
	testl	%eax, %eax
	jne	.L2912
.L2915:
	movl	%ebx, %eax
.L2912:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE13433:
	.size	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKtPtPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii, .-_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKtPtPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	.section	.text._ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,"axG",@progbits,_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,comdat
	.weak	_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st
	.type	_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st, @function
_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st:
.LFB13005:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA13005
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	.cfi_offset 15, -24
	movq	%rdx, %r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	movq	%rcx, %r12
	pushq	%rbx
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$2728, %rsp
	movq	24(%rbp), %rax
	movq	%rsi, -2696(%rbp)
	movq	%r8, -2680(%rbp)
	movl	%r9d, -2684(%rbp)
	movq	%rax, -2672(%rbp)
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	movw	$0, -2646(%rbp)
	movb	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name(%rip), %al
	testb	%al, %al
	jne	.L2922
	leaq	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L2922
	leaq	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi
	leaq	.LC91(%rip), %rsi
	call	_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc
	leaq	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi
	call	__cxa_guard_release@PLT
.L2922:
	movb	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr(%rip), %al
	testb	%al, %al
	jne	.L2925
	leaq	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L2925
	movq	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name(%rip), %rax
	leaq	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi
	leaq	-336(%rbp), %rsi
	movl	$3, -336(%rbp)
	movq	%rax, -328(%rbp)
	call	_ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_
	leaq	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi
	call	__cxa_guard_release@PLT
.L2925:
	testq	%rbx, %rbx
	je	.L2927
	leaq	-2646(%rbp), %rdi
	leaq	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rsi
	call	_ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0
.L2927:
	xorl	%r11d, %r11d
	leaq	-2644(%rbp), %rdi
	movl	%r11d, -2644(%rbp)
.LEHB37:
	call	_ZN3cub17CUB_200700_890_NS10PtxVersionERi
	movl	%eax, -2664(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2664(%rbp)
	jne	.L3187
	testl	%eax, %eax
	jne	.L2928
	cmpl	$0, -2664(%rbp)
	jne	.L3187
	movq	-2696(%rbp), %rax
	cmpq	$0, -2680(%rbp)
	movq	%rbx, -560(%rbp)
	movl	-2644(%rbp), %edx
	movl	-2684(%rbp), %esi
	movq	%r15, -544(%rbp)
	movq	%rax, -552(%rbp)
	movq	-2680(%rbp), %rax
	movq	%r12, -536(%rbp)
	movq	%rax, -528(%rbp)
	movl	-2684(%rbp), %eax
	movl	%edx, -504(%rbp)
	movl	%eax, -520(%rbp)
	movl	16(%rbp), %eax
	movb	$1, -500(%rbp)
	movl	%eax, -516(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -512(%rbp)
	sete	%al
	cmpl	16(%rbp), %esi
	sete	%cl
	orl	%ecx, %eax
	cmpl	$899, %edx
	jg	.L2930
	cmpl	$799, %edx
	jg	.L2931
	cmpl	$699, %edx
	jg	.L2932
	cmpl	$619, %edx
	jg	.L2933
	cmpl	$609, %edx
	jg	.L2934
	cmpl	$599, %edx
	jg	.L2935
	cmpl	$499, %edx
	jg	.L2936
	testb	%al, %al
	je	.L2937
.L2977:
	testq	%rbx, %rbx
	jne	.L2939
.L2938:
	movq	-2696(%rbp), %rax
	movq	$1, (%rax)
	jmp	.L2939
.L2937:
	cmpq	$1152, -2680(%rbp)
	ja	.L2941
	testq	%rbx, %rbx
	je	.L2938
	movabsq	$4294967297, %rax
	xorl	%r9d, %r9d
	movabsq	$549755813889, %rsi
	movq	%rax, -1520(%rbp)
	leaq	-2344(%rbp), %rcx
	leaq	-1520(%rbp), %rdi
	movq	%rax, -1504(%rbp)
	movq	-2672(%rbp), %rax
	leaq	-2336(%rbp), %r8
	movq	%rsi, -1512(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -1488(%rbp)
	movslq	16(%r12), %rax
	movq	%r9, -1496(%rbp)
	leaq	-2328(%rbp), %r9
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2336(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2328(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2352(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2344(%rbp)
	leaq	-2352(%rbp), %rdx
	pushq	%r10
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3298
	testl	%eax, %eax
	jne	.L2939
.L3298:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2939
.L2941:
	leaq	-960(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L3299
	testl	%eax, %eax
	jne	.L2945
.L3299:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2945
	movl	-960(%rbp), %edx
	leaq	-920(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L3300
	testl	%eax, %eax
	jne	.L2945
.L3300:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2945
	leaq	-496(%rbp), %rdi
	leaq	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_i(%rip), %r14
	call	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjtyNS0_21DeviceRadixSortPolicyIjtyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKtPtSA_yiiSC_S5_EEC1Ev
	leaq	-336(%rbp), %rdi
	call	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjtyNS0_21DeviceRadixSortPolicyIjtyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKtPtSA_yiiSC_S5_EEC1Ev
	movl	-920(%rbp), %eax
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	xorl	%ecx, %ecx
	leaq	-476(%rbp), %rdi
	movl	$128, %edx
	movq	%rsi, -496(%rbp)
	movl	%eax, -2704(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rax
	movq	%rax, -448(%rbp)
	movabsq	$274877906950, %rax
	movq	%rax, -424(%rbp)
	movl	$301989889, %eax
	salq	$7, %rax
	movq	%r14, -472(%rbp)
	movq	%rax, -488(%rbp)
	movl	$1152, -480(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L3301
	testl	%eax, %eax
	jne	.L2945
.L3301:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2945
	movl	$8388609, %eax
	xorl	%ecx, %ecx
	movl	$1024, %edx
	movq	%r14, %rsi
	salq	$10, %rax
	leaq	-452(%rbp), %rdi
	movl	$2048, -456(%rbp)
	movq	%rax, -464(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L3302
	testl	%eax, %eax
	jne	.L2945
.L3302:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2945
	movl	$301989889, %eax
	leaq	-428(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$128, %edx
	salq	$7, %rax
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	movl	$1152, -432(%rbp)
	movq	%rax, -440(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKtPtPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L3193
	testl	%eax, %eax
	jne	.L2945
	testl	%r13d, %r13d
	jne	.L3193
	movl	-432(%rbp), %eax
	movl	-480(%rbp), %ecx
	leaq	-316(%rbp), %rdi
	movq	%r14, -312(%rbp)
	movl	-2704(%rbp), %r13d
	imull	-428(%rbp), %r13d
	movl	$1920, -320(%rbp)
	cmpl	%eax, %ecx
	cmovl	%eax, %ecx
	movq	-2680(%rbp), %rax
	xorl	%edx, %edx
	leal	0(%r13,%r13,4), %r13d
	movslq	%ecx, %rsi
	movq	%rax, -360(%rbp)
	movq	%rax, -352(%rbp)
	movq	%rax, -376(%rbp)
	divq	%rsi
	movl	%r13d, -416(%rbp)
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	cmpl	%eax, %r13d
	movl	%eax, -408(%rbp)
	cmovg	%eax, %r13d
	cltd
	idivl	%r13d
	movl	%r13d, -368(%rbp)
	movl	-920(%rbp), %r13d
	imull	%ecx, %eax
	movl	%edx, -404(%rbp)
	imull	%edx, %ecx
	movl	$128, %edx
	cltq
	addq	%rax, %rsi
	movq	%rax, -392(%rbp)
	movslq	%ecx, %rcx
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rax
	movq	%rax, -288(%rbp)
	movabsq	$137438953477, %rax
	movq	%rax, -264(%rbp)
	movl	$503316481, %eax
	movq	%rcx, -384(%rbp)
	salq	$7, %rax
	xorl	%ecx, %ecx
	movq	%rsi, -400(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	movq	%rsi, -336(%rbp)
	movq	%rax, -328(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, -2704(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2704(%rbp)
	jne	.L3304
	testl	%eax, %eax
	jne	.L2945
.L3304:
	movl	-2704(%rbp), %eax
	testl	%eax, %eax
	jne	.L2945
	movl	$8388609, %eax
	xorl	%ecx, %ecx
	movl	$1024, %edx
	movq	%r14, %rsi
	salq	$10, %rax
	leaq	-292(%rbp), %rdi
	movl	$2048, -296(%rbp)
	movq	%rax, -304(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	testl	%r14d, %r14d
	jne	.L3305
	testl	%eax, %eax
	jne	.L2945
.L3305:
	movl	%r14d, %eax
	testl	%r14d, %r14d
	jne	.L2945
	movl	$503316481, %eax
	leaq	-268(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$128, %edx
	salq	$7, %rax
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	movl	$1920, -272(%rbp)
	movq	%rax, -280(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKtPtPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	testl	%r14d, %r14d
	jne	.L3198
	testl	%eax, %eax
	jne	.L2945
	testl	%r14d, %r14d
	jne	.L3198
	movl	-272(%rbp), %eax
	movl	-320(%rbp), %ecx
	imull	-268(%rbp), %r13d
	cmpl	%eax, %ecx
	cmovl	%eax, %ecx
	movq	-2680(%rbp), %rax
	xorl	%edx, %edx
	leal	0(%r13,%r13,4), %r13d
	movslq	%ecx, %rsi
	movq	%rax, -200(%rbp)
	movq	%rax, -192(%rbp)
	movq	%rax, -216(%rbp)
	divq	%rsi
	movl	%r13d, -256(%rbp)
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	cmpl	%eax, %r13d
	movl	%eax, %edi
	movl	%eax, -248(%rbp)
	cmovle	%r13d, %edi
	cltd
	idivl	%edi
	movl	%edi, -208(%rbp)
	imull	%ecx, %eax
	movl	%edx, -244(%rbp)
	imull	%edx, %ecx
	cltq
	addq	%rax, %rsi
	movq	%rax, -232(%rbp)
	movl	-416(%rbp), %eax
	movslq	%ecx, %rcx
	movq	%rcx, -224(%rbp)
	cmpl	%eax, %r13d
	movq	%rsi, -240(%rbp)
	cmovge	%r13d, %eax
	imull	-420(%rbp), %eax
	xorl	%r8d, %r8d
	xorl	%edx, %edx
	addl	-456(%rbp), %eax
	movq	%r8, -168(%rbp)
	cltq
	movq	%r8, -160(%rbp)
	salq	$3, %rax
	movq	%rax, -176(%rbp)
	xorl	%eax, %eax
.L2954:
	movq	-176(%rbp,%rdx), %rsi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rsi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$24, %rdx
	jne	.L2954
	movq	-2696(%rbp), %rsi
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L2955
	xorl	%edi, %edi
	movq	%rax, (%rsi)
	movq	%rdi, -2696(%rbp)
	jmp	.L2956
.L2955:
	cmpq	%rax, (%rsi)
	jnb	.L2957
	call	cudaGetLastError@PLT
	xorl	%esi, %esi
	movl	$1, %r14d
	movq	%rsi, -2696(%rbp)
	jmp	.L2956
.L2957:
	leaq	255(%rbx), %rax
	xorb	%al, %al
	addq	-96(%rbp), %rax
	movq	%rax, -2696(%rbp)
.L2956:
	call	cudaGetLastError@PLT
	testl	$1, %r14d
	jne	.L3307
	testl	%eax, %eax
	jne	.L2945
.L3307:
	testl	%r14d, %r14d
	jne	.L3198
	testq	%rbx, %rbx
	je	.L2939
	movl	-2684(%rbp), %eax
	movl	16(%rbp), %edi
	movl	-424(%rbp), %ecx
	movl	-2684(%rbp), %ebx
	subl	%eax, %edi
	movl	%edi, %eax
	movl	%ebx, -880(%rbp)
	leaq	-496(%rbp), %rbx
	cltd
	movq	%rbx, -2664(%rbp)
	idivl	%ecx
	cmpl	$1, %edx
	movslq	16(%r15), %rdx
	sbbl	$-1, %eax
	imull	%eax, %ecx
	movl	%eax, -2704(%rbp)
	movl	-2684(%rbp), %eax
	subl	%edi, %ecx
	imull	-264(%rbp), %ecx
	addl	%eax, %ecx
	cmpl	16(%rbp), %ecx
	cmovg	16(%rbp), %ecx
	movq	%rdx, %rax
	xorl	$1, %eax
	movq	(%r15,%rdx,8), %rdx
	movl	%ecx, -2712(%rbp)
	movslq	16(%r12), %rcx
	cltq
	movq	(%r15,%rax,8), %rsi
	movl	-2712(%rbp), %r10d
	movq	%rdx, -128(%rbp)
	movq	%rcx, %rax
	movq	(%r12,%rcx,8), %rcx
	xorl	$1, %eax
	movq	%rsi, -136(%rbp)
	cltq
	movq	%rcx, -88(%rbp)
	movq	(%r12,%rax,8), %rax
	movq	%rax, -96(%rbp)
	cmpl	%r10d, -2684(%rbp)
	jge	.L2960
	leaq	-336(%rbp), %rbx
	movq	%rbx, -2664(%rbp)
.L2960:
	movq	%rax, -720(%rbp)
	movq	-2696(%rbp), %rax
	leaq	-880(%rbp), %r9
	leaq	-528(%rbp), %r8
	movq	%rsi, -640(%rbp)
	movq	-2664(%rbp), %rsi
	movq	%rax, -760(%rbp)
	movq	-2664(%rbp), %rax
	movq	%rdx, -600(%rbp)
	movl	76(%rsi), %edx
	leaq	88(%rsi), %r14
	movl	72(%rax), %eax
	movq	%rcx, -680(%rbp)
	cmpl	%eax, %edi
	cmovle	%edi, %eax
	xorl	%ecx, %ecx
	leaq	-1400(%rbp), %rdi
	movq	%rcx, -1376(%rbp)
	leaq	-760(%rbp), %rcx
	movl	%eax, -2680(%rbp)
	movl	%eax, -840(%rbp)
	movq	-2664(%rbp), %rax
	movl	128(%rax), %eax
	imull	%eax, %edx
	movl	%eax, -1400(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1396(%rbp)
	movq	%rax, -1384(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -800(%rbp)
	movl	8(%rsi), %edx
	movq	%rax, -1368(%rbp)
	leaq	-840(%rbp), %rax
	movq	(%rsi), %rsi
	movl	%edx, -1388(%rbp)
	leaq	-600(%rbp), %rdx
	pushq	%r14
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r13d, %r13d
	jne	.L3308
	testl	%eax, %eax
	jne	.L2965
.L3308:
	movl	%r13d, %ebx
	testl	%r13d, %r13d
	jne	.L2965
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2965
	movq	-2664(%rbp), %rax
	leaq	-800(%rbp), %rcx
	movq	$1, -1432(%rbp)
	leaq	-1440(%rbp), %rdi
	movl	32(%rax), %edx
	movabsq	$4294967297, %rax
	movq	%rax, -1440(%rbp)
	movq	%rax, -1424(%rbp)
	xorl	%eax, %eax
	movq	%rax, -1416(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1428(%rbp)
	leaq	-760(%rbp), %rdx
	movq	%rax, -1408(%rbp)
	movq	-2664(%rbp), %rax
	movq	24(%rax), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r13d, %r13d
	jne	.L3309
	testl	%eax, %eax
	jne	.L2965
.L3309:
	movl	%r13d, %ebx
	testl	%r13d, %r13d
	jne	.L2965
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2965
	movq	-2664(%rbp), %rax
	xorl	%r13d, %r13d
	leaq	-640(%rbp), %rcx
	leaq	-1480(%rbp), %rdi
	movq	%r13, -1456(%rbp)
	leaq	-720(%rbp), %r9
	leaq	-680(%rbp), %r8
	movl	56(%rax), %edx
	movl	128(%rax), %eax
	movl	%eax, -1480(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1476(%rbp)
	movq	%rax, -1464(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1468(%rbp)
	leaq	-600(%rbp), %rdx
	movq	%rax, -1448(%rbp)
	movq	-2664(%rbp), %rax
	movq	48(%rax), %rsi
	pushq	%rax
	leaq	-840(%rbp), %rax
	pushq	%r14
	pushq	%rax
	leaq	-880(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	leaq	-760(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x30
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$48, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2965
	testl	%eax, %eax
	jne	.L3202
	testl	%ebx, %ebx
	jne	.L2965
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2965
	movl	-2684(%rbp), %eax
	movl	-2680(%rbp), %esi
	addl	%esi, %eax
	movl	%eax, -880(%rbp)
	jmp	.L2965
.L3202:
	movl	%eax, %ebx
.L2965:
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3203
	testl	%eax, %eax
	jne	.L2945
	movabsq	$4294967297, %r13
	testl	%ebx, %ebx
	jne	.L3203
.L2967:
	movl	-880(%rbp), %esi
	movl	%esi, -2680(%rbp)
	cmpl	%esi, 16(%rbp)
	jle	.L3753
	leaq	-496(%rbp), %rsi
	movl	-2680(%rbp), %edi
	movq	%rsi, -2664(%rbp)
	cmpl	%edi, -2712(%rbp)
	jle	.L2968
	leaq	-336(%rbp), %rsi
	movq	%rsi, -2664(%rbp)
.L2968:
	movl	%eax, %esi
	cltq
	movq	%r13, -1276(%rbp)
	leaq	-1280(%rbp), %rdi
	xorl	$1, %esi
	movq	%r13, -1264(%rbp)
	leaq	-880(%rbp), %r9
	leaq	-528(%rbp), %r8
	movslq	%esi, %rdx
	movl	%esi, -2684(%rbp)
	movq	-96(%rbp,%rax,8), %rsi
	movq	-136(%rbp,%rax,8), %rax
	movq	-96(%rbp,%rdx,8), %rcx
	movq	-136(%rbp,%rdx,8), %rdx
	movq	%rsi, -680(%rbp)
	movq	%rax, -600(%rbp)
	movq	-2696(%rbp), %rax
	movq	%rdx, -640(%rbp)
	movl	16(%rbp), %edx
	movq	%rax, -760(%rbp)
	movl	-2680(%rbp), %eax
	movq	-2664(%rbp), %rsi
	movq	%rcx, -720(%rbp)
	leaq	-760(%rbp), %rcx
	subl	%eax, %edx
	movq	-2664(%rbp), %rax
	movl	72(%rax), %eax
	cmpl	%eax, %edx
	cmovle	%edx, %eax
	movl	76(%rsi), %edx
	xorl	%ebx, %ebx
	movq	%rbx, -1256(%rbp)
	movl	%eax, -2720(%rbp)
	movl	%eax, -840(%rbp)
	movq	-2664(%rbp), %rax
	movl	128(%rax), %eax
	imull	%eax, %edx
	movl	%eax, -1280(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1248(%rbp)
	movq	%rsi, %rax
	movl	%edx, -800(%rbp)
	movl	8(%rsi), %edx
	addq	$88, %rax
	movq	%rax, -2728(%rbp)
	movl	%edx, -1268(%rbp)
	leaq	-600(%rbp), %rdx
	pushq	%rax
	leaq	-840(%rbp), %rax
	movq	(%rsi), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%r10
	popq	%r11
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r14d, %r14d
	jne	.L3312
	testl	%eax, %eax
	jne	.L2973
.L3312:
	movl	%r14d, %ebx
	testl	%r14d, %r14d
	jne	.L2973
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2973
	movq	-2664(%rbp), %rax
	xorl	%r9d, %r9d
	movq	$1, -1312(%rbp)
	leaq	-800(%rbp), %rcx
	leaq	-760(%rbp), %rdx
	leaq	-1320(%rbp), %rdi
	movq	%r13, -1320(%rbp)
	movl	32(%rax), %eax
	movq	%r13, -1304(%rbp)
	movq	%r9, -1296(%rbp)
	movl	%eax, -1308(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1288(%rbp)
	movq	-2664(%rbp), %rax
	movq	24(%rax), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r14d, %r14d
	jne	.L3313
	testl	%eax, %eax
	jne	.L2973
.L3313:
	movl	%r14d, %ebx
	testl	%r14d, %r14d
	jne	.L2973
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2973
	movq	-2664(%rbp), %rax
	movq	-2664(%rbp), %rsi
	movq	%r13, -1356(%rbp)
	leaq	-640(%rbp), %rcx
	movq	%r13, -1344(%rbp)
	leaq	-1360(%rbp), %rdi
	leaq	-720(%rbp), %r9
	movl	56(%rax), %eax
	movl	128(%rsi), %edx
	movq	48(%rsi), %rsi
	movl	%eax, -1348(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1360(%rbp)
	xorl	%edx, %edx
	movq	%rax, -1328(%rbp)
	leaq	-840(%rbp), %rax
	movq	%rdx, -1336(%rbp)
	leaq	-600(%rbp), %rdx
	pushq	%r8
	leaq	-680(%rbp), %r8
	pushq	-2728(%rbp)
	pushq	%rax
	leaq	-880(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	leaq	-760(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x30
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$48, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L2973
	testl	%eax, %eax
	jne	.L3207
	testl	%ebx, %ebx
	jne	.L2973
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L2973
	movl	-2680(%rbp), %eax
	movl	-2720(%rbp), %esi
	addl	%esi, %eax
	movl	%eax, -880(%rbp)
	jmp	.L2973
.L3207:
	movl	%eax, %ebx
.L2973:
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3208
	testl	%eax, %eax
	jne	.L2974
	testl	%ebx, %ebx
	jne	.L3208
	movl	-2684(%rbp), %eax
	jmp	.L2967
.L3753:
	xorl	%eax, %eax
	movl	%eax, -2664(%rbp)
	jmp	.L2974
.L3208:
	movl	%ebx, -2664(%rbp)
.L2974:
	movl	-2704(%rbp), %eax
	addl	16(%r15), %eax
	andl	$1, %eax
	movl	%eax, 16(%r15)
	movl	-2704(%rbp), %eax
	addl	16(%r12), %eax
	andl	$1, %eax
	movl	%eax, 16(%r12)
	jmp	.L2939
.L3193:
	movl	%r13d, %eax
	jmp	.L2945
.L3198:
	movl	%r14d, %eax
	jmp	.L2945
.L3203:
	movl	%ebx, %eax
.L2945:
	movl	%eax, -2664(%rbp)
	jmp	.L2939
.L2936:
	testb	%al, %al
	jne	.L2977
	cmpq	$4864, -2680(%rbp)
	ja	.L2978
	testq	%rbx, %rbx
	je	.L2938
	leaq	-2304(%rbp), %rcx
	leaq	-1000(%rbp), %rdi
	movabsq	$4294967297, %rax
	movabsq	$1099511627777, %rsi
	movq	%rax, -1000(%rbp)
	leaq	-2320(%rbp), %r9
	leaq	-2312(%rbp), %r8
	movq	%rax, -984(%rbp)
	xorl	%eax, %eax
	movq	%rax, -976(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rsi, -992(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -968(%rbp)
	movslq	16(%r12), %rax
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2312(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2320(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2296(%rbp)
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2304(%rbp)
	leaq	-2296(%rbp), %rdx
	pushq	%rax
	leaq	-516(%rbp), %rax
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3316
	testl	%eax, %eax
	jne	.L2939
.L3316:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2939
.L2978:
	leaq	-960(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L3317
	testl	%eax, %eax
	jne	.L2982
.L3317:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2982
	movl	-960(%rbp), %edx
	leaq	-920(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L3318
	testl	%eax, %eax
	jne	.L2982
.L3318:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2982
	leaq	-496(%rbp), %rdi
	leaq	_ZN3cub17CUB_200700_890_NS23RadixSortScanBinsKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_i(%rip), %r14
	call	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjtyNS0_21DeviceRadixSortPolicyIjtyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKtPtSA_yiiSC_S5_EEC1Ev
	leaq	-336(%rbp), %rdi
	call	_ZN3cub17CUB_200700_890_NS17DispatchRadixSortILb0EjtyNS0_21DeviceRadixSortPolicyIjtyEENS0_6detail21identity_decomposer_tEE10PassConfigIPFvPKjPyyiiNS0_13GridEvenShareIyEES5_EPFvSA_iEPFvS9_PjPKtPtSA_yiiSC_S5_EEC1Ev
	movl	-920(%rbp), %eax
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	xorl	%ecx, %ecx
	leaq	-476(%rbp), %rdi
	movl	$160, %edx
	movq	%rsi, -496(%rbp)
	movl	%eax, -2704(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rax
	movq	%rax, -448(%rbp)
	movabsq	$549755813895, %rax
	movq	%rax, -424(%rbp)
	movabsq	$167503724704, %rax
	movq	%r14, -472(%rbp)
	movq	%rax, -488(%rbp)
	movl	$6240, -480(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L3319
	testl	%eax, %eax
	jne	.L2982
.L3319:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2982
	movl	$92274689, %eax
	xorl	%ecx, %ecx
	movl	$512, %edx
	movq	%r14, %rsi
	salq	$9, %rax
	leaq	-452(%rbp), %rdi
	movl	$5632, -456(%rbp)
	movq	%rax, -464(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L3320
	testl	%eax, %eax
	jne	.L2982
.L3320:
	movl	%r13d, %eax
	testl	%r13d, %r13d
	jne	.L2982
	leaq	-428(%rbp), %rdi
	xorl	%ecx, %ecx
	movabsq	$167503724704, %rax
	movl	$160, %edx
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	movq	%rax, -440(%rbp)
	movl	$6240, -432(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKtPtPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	testl	%r13d, %r13d
	jne	.L3214
	testl	%eax, %eax
	jne	.L2982
	testl	%r13d, %r13d
	jne	.L3214
	movl	-432(%rbp), %eax
	movl	-480(%rbp), %ecx
	leaq	-316(%rbp), %rdi
	movq	%r14, -312(%rbp)
	movl	-2704(%rbp), %r13d
	imull	-428(%rbp), %r13d
	movl	$4096, -320(%rbp)
	cmpl	%eax, %ecx
	cmovl	%eax, %ecx
	movq	-2680(%rbp), %rax
	xorl	%edx, %edx
	leal	0(%r13,%r13,4), %r13d
	movslq	%ecx, %rsi
	movq	%rax, -360(%rbp)
	movq	%rax, -352(%rbp)
	movq	%rax, -376(%rbp)
	divq	%rsi
	movl	%r13d, -416(%rbp)
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	cmpl	%eax, %r13d
	movl	%eax, -408(%rbp)
	cmovg	%eax, %r13d
	cltd
	idivl	%r13d
	movl	%r13d, -368(%rbp)
	movl	-920(%rbp), %r13d
	imull	%ecx, %eax
	movl	%edx, -404(%rbp)
	imull	%edx, %ecx
	movl	$256, %edx
	cltq
	addq	%rax, %rsi
	movq	%rax, -392(%rbp)
	movslq	%ecx, %rcx
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rax
	movq	%rax, -288(%rbp)
	movabsq	$274877906950, %rax
	movq	%rax, -264(%rbp)
	movl	$268435457, %eax
	movq	%rcx, -384(%rbp)
	salq	$8, %rax
	xorl	%ecx, %ecx
	movq	%rsi, -400(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceRadixSortUpsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjyNS0_6detail21identity_decomposer_tEEEvPKT2_PT3_SA_iiNS0_13GridEvenShareISA_EET4_(%rip), %rsi
	movq	%rsi, -336(%rbp)
	movq	%rax, -328(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, -2704(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2704(%rbp)
	jne	.L3322
	testl	%eax, %eax
	jne	.L2982
.L3322:
	movl	-2704(%rbp), %eax
	testl	%eax, %eax
	jne	.L2982
	movl	$92274689, %eax
	xorl	%ecx, %ecx
	movl	$512, %edx
	movq	%r14, %rsi
	salq	$9, %rax
	leaq	-292(%rbp), %rdi
	movl	$5632, -296(%rbp)
	movq	%rax, -304(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPyiEEE9cudaErrorRiT_ii
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	testl	%r14d, %r14d
	jne	.L3323
	testl	%eax, %eax
	jne	.L2982
.L3323:
	movl	%r14d, %eax
	testl	%r14d, %r14d
	jne	.L2982
	movl	$268435457, %eax
	leaq	-268(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	salq	$8, %rax
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortDownsweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb1ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT2_PS7_PKT3_PSB_PT4_SF_iiNS0_13GridEvenShareISF_EET5_(%rip), %rsi
	movl	$4096, -272(%rbp)
	movq	%rax, -280(%rbp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvPKjPjPKtPtPyyiiNS0_13GridEvenShareIyEENS0_6detail21identity_decomposer_tEEEE9cudaErrorRiT_ii
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	testl	%r14d, %r14d
	jne	.L3219
	testl	%eax, %eax
	jne	.L2982
	testl	%r14d, %r14d
	jne	.L3219
	movl	-272(%rbp), %eax
	movl	-320(%rbp), %ecx
	imull	-268(%rbp), %r13d
	cmpl	%eax, %ecx
	cmovl	%eax, %ecx
	movq	-2680(%rbp), %rax
	xorl	%edx, %edx
	leal	0(%r13,%r13,4), %r13d
	movslq	%ecx, %rsi
	movq	%rax, -200(%rbp)
	movq	%rax, -192(%rbp)
	movq	%rax, -216(%rbp)
	divq	%rsi
	movl	%r13d, -256(%rbp)
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	cmpl	%eax, %r13d
	movl	%eax, %edi
	movl	%eax, -248(%rbp)
	cmovle	%r13d, %edi
	cltd
	idivl	%edi
	movl	%edi, -208(%rbp)
	imull	%ecx, %eax
	movl	%edx, -244(%rbp)
	imull	%edx, %ecx
	cltq
	addq	%rax, %rsi
	movq	%rax, -232(%rbp)
	movl	-416(%rbp), %eax
	movslq	%ecx, %rcx
	movq	%rcx, -224(%rbp)
	cmpl	%eax, %r13d
	movq	%rsi, -240(%rbp)
	cmovge	%r13d, %eax
	imull	-420(%rbp), %eax
	xorl	%edx, %edx
	addl	-456(%rbp), %eax
	cltq
	salq	$3, %rax
	movq	%rax, -176(%rbp)
	xorl	%eax, %eax
	movq	%rax, -168(%rbp)
	movq	%rax, -160(%rbp)
	xorl	%eax, %eax
.L2991:
	movq	-176(%rbp,%rdx), %rsi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rsi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$24, %rdx
	jne	.L2991
	movq	-2696(%rbp), %rsi
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L2992
	movq	%rax, (%rsi)
	xorl	%eax, %eax
	movq	%rax, -2696(%rbp)
	jmp	.L2993
.L2992:
	cmpq	%rax, (%rsi)
	jnb	.L2994
	call	cudaGetLastError@PLT
	xorl	%r13d, %r13d
	movl	$1, %r14d
	movq	%r13, -2696(%rbp)
	jmp	.L2993
.L2994:
	leaq	255(%rbx), %rax
	xorb	%al, %al
	addq	-96(%rbp), %rax
	movq	%rax, -2696(%rbp)
.L2993:
	call	cudaGetLastError@PLT
	testl	$1, %r14d
	jne	.L3325
	testl	%eax, %eax
	jne	.L2982
.L3325:
	testl	%r14d, %r14d
	jne	.L3219
	testq	%rbx, %rbx
	je	.L2939
	movl	-2684(%rbp), %eax
	movl	16(%rbp), %edi
	movl	-424(%rbp), %ecx
	movl	-2684(%rbp), %ebx
	subl	%eax, %edi
	movl	%edi, %eax
	movl	%ebx, -880(%rbp)
	leaq	-496(%rbp), %rbx
	cltd
	movq	%rbx, -2664(%rbp)
	idivl	%ecx
	cmpl	$1, %edx
	movslq	16(%r15), %rdx
	sbbl	$-1, %eax
	imull	%eax, %ecx
	movl	%eax, -2704(%rbp)
	movl	-2684(%rbp), %eax
	subl	%edi, %ecx
	imull	-264(%rbp), %ecx
	addl	%eax, %ecx
	cmpl	16(%rbp), %ecx
	cmovg	16(%rbp), %ecx
	movq	%rdx, %rax
	xorl	$1, %eax
	movq	(%r15,%rdx,8), %rdx
	movl	%ecx, -2712(%rbp)
	movslq	16(%r12), %rcx
	cltq
	movq	(%r15,%rax,8), %rsi
	movl	-2712(%rbp), %r11d
	movq	%rdx, -128(%rbp)
	movq	%rcx, %rax
	movq	(%r12,%rcx,8), %rcx
	xorl	$1, %eax
	movq	%rsi, -136(%rbp)
	cltq
	movq	%rcx, -88(%rbp)
	movq	(%r12,%rax,8), %rax
	movq	%rax, -96(%rbp)
	cmpl	%r11d, -2684(%rbp)
	jge	.L2997
	leaq	-336(%rbp), %rbx
	movq	%rbx, -2664(%rbp)
.L2997:
	movq	%rax, -720(%rbp)
	movq	-2696(%rbp), %rax
	leaq	-880(%rbp), %r9
	leaq	-528(%rbp), %r8
	movq	%rsi, -640(%rbp)
	movq	-2664(%rbp), %rsi
	movq	%rax, -760(%rbp)
	movq	-2664(%rbp), %rax
	movq	%rdx, -600(%rbp)
	movl	76(%rsi), %edx
	leaq	88(%rsi), %r14
	movl	72(%rax), %eax
	movq	%rcx, -680(%rbp)
	leaq	-760(%rbp), %rcx
	cmpl	%eax, %edi
	cmovle	%edi, %eax
	xorl	%ebx, %ebx
	leaq	-1120(%rbp), %rdi
	movq	%rbx, -1096(%rbp)
	movl	%eax, -2680(%rbp)
	movl	%eax, -840(%rbp)
	movq	-2664(%rbp), %rax
	movl	128(%rax), %eax
	imull	%eax, %edx
	movl	%eax, -1120(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1116(%rbp)
	movq	%rax, -1104(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -800(%rbp)
	movl	8(%rsi), %edx
	movq	%rax, -1088(%rbp)
	leaq	-840(%rbp), %rax
	movq	(%rsi), %rsi
	movl	%edx, -1108(%rbp)
	leaq	-600(%rbp), %rdx
	pushq	%r14
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%r10
	popq	%r11
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r13d, %r13d
	jne	.L3326
	testl	%eax, %eax
	jne	.L3002
.L3326:
	movl	%r13d, %ebx
	testl	%r13d, %r13d
	jne	.L3002
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L3002
	movq	-2664(%rbp), %rax
	xorl	%r9d, %r9d
	movq	$1, -1072(%rbp)
	leaq	-800(%rbp), %rcx
	leaq	-1080(%rbp), %rdi
	movq	%r9, -1056(%rbp)
	movl	32(%rax), %edx
	movabsq	$4294967297, %rax
	movq	%rax, -1080(%rbp)
	movq	%rax, -1064(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1068(%rbp)
	leaq	-760(%rbp), %rdx
	movq	%rax, -1048(%rbp)
	movq	-2664(%rbp), %rax
	movq	24(%rax), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r13d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r13d, %r13d
	jne	.L3327
	testl	%eax, %eax
	jne	.L3002
.L3327:
	movl	%r13d, %ebx
	testl	%r13d, %r13d
	jne	.L3002
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L3002
	movq	-2664(%rbp), %rax
	xorl	%esi, %esi
	leaq	-640(%rbp), %rcx
	leaq	-1040(%rbp), %rdi
	movq	%rsi, -1016(%rbp)
	leaq	-720(%rbp), %r9
	movl	56(%rax), %edx
	movl	128(%rax), %eax
	movl	%eax, -1040(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1036(%rbp)
	movq	%rax, -1024(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1028(%rbp)
	leaq	-600(%rbp), %rdx
	movq	%rax, -1008(%rbp)
	movq	-2664(%rbp), %rax
	movq	48(%rax), %rsi
	leaq	-840(%rbp), %rax
	pushq	%r8
	leaq	-680(%rbp), %r8
	pushq	%r14
	pushq	%rax
	leaq	-880(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	leaq	-760(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x30
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$48, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3002
	testl	%eax, %eax
	jne	.L3223
	testl	%ebx, %ebx
	jne	.L3002
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L3002
	movl	-2684(%rbp), %eax
	movl	-2680(%rbp), %esi
	addl	%esi, %eax
	movl	%eax, -880(%rbp)
	jmp	.L3002
.L3223:
	movl	%eax, %ebx
.L3002:
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3224
	testl	%eax, %eax
	jne	.L2982
	movabsq	$4294967297, %r13
	testl	%ebx, %ebx
	jne	.L3224
.L3004:
	movl	-880(%rbp), %esi
	movl	%esi, -2680(%rbp)
	cmpl	%esi, 16(%rbp)
	jle	.L3754
	leaq	-496(%rbp), %rdi
	movq	%rdi, -2664(%rbp)
	movl	-2680(%rbp), %edi
	cmpl	%edi, -2712(%rbp)
	jle	.L3005
	leaq	-336(%rbp), %rsi
	movq	%rsi, -2664(%rbp)
.L3005:
	movl	%eax, %esi
	cltq
	movq	%r13, -1236(%rbp)
	leaq	-1240(%rbp), %rdi
	xorl	$1, %esi
	movq	%r13, -1224(%rbp)
	leaq	-880(%rbp), %r9
	leaq	-528(%rbp), %r8
	movslq	%esi, %rdx
	movl	%esi, -2684(%rbp)
	movq	-96(%rbp,%rax,8), %rsi
	movq	-136(%rbp,%rax,8), %rax
	movq	-96(%rbp,%rdx,8), %rcx
	movq	-136(%rbp,%rdx,8), %rdx
	movq	%rsi, -680(%rbp)
	movq	%rax, -600(%rbp)
	movq	-2696(%rbp), %rax
	movq	%rdx, -640(%rbp)
	movl	16(%rbp), %edx
	movq	%rax, -760(%rbp)
	movl	-2680(%rbp), %eax
	movq	-2664(%rbp), %rsi
	movq	%rcx, -720(%rbp)
	subl	%eax, %edx
	movq	-2664(%rbp), %rax
	movl	72(%rax), %eax
	cmpl	%eax, %edx
	cmovle	%edx, %eax
	movl	76(%rsi), %edx
	xorl	%ecx, %ecx
	movq	%rcx, -1216(%rbp)
	leaq	-760(%rbp), %rcx
	movl	%eax, -2720(%rbp)
	movl	%eax, -840(%rbp)
	movq	-2664(%rbp), %rax
	movl	128(%rax), %eax
	imull	%eax, %edx
	movl	%eax, -1240(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1208(%rbp)
	movq	%rsi, %rax
	movl	%edx, -800(%rbp)
	movl	8(%rsi), %edx
	addq	$88, %rax
	movq	%rax, -2728(%rbp)
	movl	%edx, -1228(%rbp)
	leaq	-600(%rbp), %rdx
	pushq	%rax
	leaq	-840(%rbp), %rax
	movq	(%rsi), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENS9_6detail21identity_decomposer_tEEJS6_S7_yiiSB_SD_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r14d, %r14d
	jne	.L3330
	testl	%eax, %eax
	jne	.L3010
.L3330:
	movl	%r14d, %ebx
	testl	%r14d, %r14d
	jne	.L3010
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L3010
	movq	-2664(%rbp), %rax
	leaq	-800(%rbp), %rcx
	movq	$1, -1192(%rbp)
	leaq	-760(%rbp), %rdx
	leaq	-1200(%rbp), %rdi
	movq	%r13, -1200(%rbp)
	movl	32(%rax), %eax
	movq	%r13, -1184(%rbp)
	movl	%eax, -1188(%rbp)
	xorl	%eax, %eax
	movq	%rax, -1176(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1168(%rbp)
	movq	-2664(%rbp), %rax
	movq	24(%rax), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyiEJS5_iEEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%r14d, %r14d
	jne	.L3331
	testl	%eax, %eax
	jne	.L3010
.L3331:
	movl	%r14d, %ebx
	testl	%r14d, %r14d
	jne	.L3010
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L3010
	movq	-2664(%rbp), %rax
	movq	-2664(%rbp), %rsi
	xorl	%ebx, %ebx
	movq	%r13, -1156(%rbp)
	movq	%r13, -1144(%rbp)
	leaq	-640(%rbp), %rcx
	leaq	-1160(%rbp), %rdi
	movl	56(%rax), %eax
	movl	128(%rsi), %edx
	movq	%rbx, -1136(%rbp)
	leaq	-720(%rbp), %r9
	movq	48(%rsi), %rsi
	leaq	-680(%rbp), %r8
	movl	%eax, -1148(%rbp)
	movq	-2672(%rbp), %rax
	movl	%edx, -1160(%rbp)
	leaq	-600(%rbp), %rdx
	movq	%rax, -1128(%rbp)
	leaq	-840(%rbp), %rax
	pushq	%r14
	pushq	-2728(%rbp)
	pushq	%rax
	leaq	-880(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	leaq	-760(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x30
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtPyyiiN3cub17CUB_200700_890_NS13GridEvenShareIyEENSD_6detail21identity_decomposer_tEEJS6_S7_S9_SA_SB_yiiSF_SH_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$48, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3010
	testl	%eax, %eax
	jne	.L3228
	testl	%ebx, %ebx
	jne	.L3010
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L3010
	movl	-2680(%rbp), %eax
	movl	-2720(%rbp), %edi
	addl	%edi, %eax
	movl	%eax, -880(%rbp)
	jmp	.L3010
.L3228:
	movl	%eax, %ebx
.L3010:
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3229
	testl	%eax, %eax
	jne	.L3011
	testl	%ebx, %ebx
	jne	.L3229
	movl	-2684(%rbp), %eax
	jmp	.L3004
.L3754:
	xorl	%r11d, %r11d
	movl	%r11d, -2664(%rbp)
	jmp	.L3011
.L3229:
	movl	%ebx, -2664(%rbp)
.L3011:
	movl	-2704(%rbp), %eax
	addl	16(%r15), %eax
	andl	$1, %eax
	movl	%eax, 16(%r15)
	movl	-2704(%rbp), %eax
	addl	16(%r12), %eax
	andl	$1, %eax
	movl	%eax, 16(%r12)
	jmp	.L2939
.L3214:
	movl	%r13d, %eax
	jmp	.L2982
.L3219:
	movl	%r14d, %eax
	jmp	.L2982
.L3224:
	movl	%ebx, %eax
.L2982:
	movl	%eax, -2664(%rbp)
	jmp	.L2939
.L2935:
	testb	%al, %al
	jne	.L2977
	cmpq	$4864, -2680(%rbp)
	ja	.L3014
	testq	%rbx, %rbx
	je	.L2938
	movabsq	$4294967297, %rax
	xorl	%r9d, %r9d
	movabsq	$1099511627777, %rsi
	movq	%rax, -1680(%rbp)
	leaq	-2440(%rbp), %rcx
	leaq	-1680(%rbp), %rdi
	movq	%rax, -1664(%rbp)
	movq	-2672(%rbp), %rax
	leaq	-2432(%rbp), %r8
	movq	%rsi, -1672(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -1648(%rbp)
	movslq	16(%r12), %rax
	movq	%r9, -1656(%rbp)
	leaq	-2424(%rbp), %r9
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2432(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2424(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2448(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2440(%rbp)
	leaq	-2448(%rbp), %rdx
	pushq	%r10
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3334
	testl	%eax, %eax
	jne	.L2939
.L3334:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2939
.L3014:
	movl	-2684(%rbp), %edi
	movl	16(%rbp), %eax
	xorl	%esi, %esi
	movl	$8, %ecx
	subl	%edi, %eax
	leaq	-136(%rbp), %rdi
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268429568, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$7424, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268429568, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%r8d, %r8d
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r8, -160(%rbp)
	cltq
	movq	%r8, -152(%rbp)
	salq	$2, %rax
	movq	%r13, -144(%rbp)
	movq	%rax, -168(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L3018:
	movq	-176(%rbp,%rdx), %rdi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rdi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L3018
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L3019
	movq	-2696(%rbp), %rsi
	movq	%rax, (%rsi)
	jmp	.L2939
.L3019:
	movq	-2696(%rbp), %rcx
	cmpq	%rax, (%rcx)
	jnb	.L3021
	call	cudaGetLastError@PLT
.L3024:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2696(%rbp)
	movq	%rax, -496(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2720(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2728(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L3755
.L3021:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L3023:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L3023
	jmp	.L3024
.L3755:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3335
	testl	%eax, %eax
	jne	.L2939
.L3335:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2696(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3336
	testl	%eax, %eax
	jne	.L2939
.L3336:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	$-1, -800(%rbp)
	xorl	%edi, %edi
	movl	%edi, -760(%rbp)
	leaq	-800(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3337
	testl	%eax, %eax
	jne	.L2939
.L3337:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-800(%rbp), %edx
	leaq	-760(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3338
	testl	%eax, %eax
	jne	.L2939
.L3338:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	leaq	-720(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	movl	$1, -720(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3339
	testl	%eax, %eax
	jne	.L2939
.L3339:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-720(%rbp), %eax
	imull	-760(%rbp), %eax
	xorl	%ecx, %ecx
	movl	$1, -1636(%rbp)
	movq	%rcx, -1616(%rbp)
	leaq	-496(%rbp), %r13
	leaq	-2416(%rbp), %rcx
	leaq	-1640(%rbp), %rdi
	leaq	-520(%rbp), %r9
	movq	%r13, %rdx
	movl	%eax, -1640(%rbp)
	leaq	-528(%rbp), %r8
	movabsq	$1099511627777, %rax
	movq	%rax, -1632(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1624(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1608(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2416(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%rsi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	movl	%eax, %ebx
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3340
	testl	%eax, %eax
	jne	.L2939
.L3340:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	movl	-2704(%rbp), %eax
	leaq	-1600(%rbp), %rdi
	movq	%r13, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_(%rip), %rsi
	movl	$1, -1596(%rbp)
	movl	%eax, -1600(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -1592(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1584(%rbp)
	xorl	%eax, %eax
	movq	%rax, -1576(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1568(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3341
	testl	%eax, %eax
	jne	.L2939
.L3341:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	leaq	0(,%r14,4), %rax
	xorl	%r13d, %r13d
	salq	$11, %r14
	movq	%rax, -2760(%rbp)
	movq	%r14, -2744(%rbp)
	movq	%r13, -2704(%rbp)
.L3033:
	movl	-2684(%rbp), %eax
	movl	%eax, -680(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L2939
	movl	16(%rbp), %eax
	movl	-2684(%rbp), %esi
	movl	$8, %edx
	movq	-2704(%rbp), %rdi
	movq	-2696(%rbp), %rcx
	subl	%esi, %eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r13d, %r13d
	movl	%eax, -640(%rbp)
	movq	-2728(%rbp), %rax
	leaq	(%rax,%rdi,4), %rax
	movq	%rax, -2752(%rbp)
	movq	%rdi, %rax
	salq	$11, %rax
	leaq	(%rcx,%rax), %r14
.L3034:
	cmpq	%r13, -2712(%rbp)
	je	.L3756
	imulq	$-268429568, %r13, %rax
	movl	$268429568, %edx
	movq	-2680(%rbp), %rsi
	movl	$7424, %edi
	movq	-2672(%rbp), %rcx
	addq	%rsi, %rax
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -600(%rbp)
	idivl	%edi
	movq	-2720(%rbp), %rdi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2736(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3240
	testl	%eax, %eax
	jne	.L3035
	testl	%ebx, %ebx
	jne	.L3240
	movl	-2736(%rbp), %eax
	movslq	16(%r12), %rcx
	imulq	$536859136, %r13, %rdx
	xorl	%ebx, %ebx
	movl	$1, -1556(%rbp)
	movl	%eax, -1560(%rbp)
	addq	(%r12,%rcx,8), %rdx
	movabsq	$1099511627777, %rax
	movq	%rax, -1552(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1544(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rdx, -2408(%rbp)
	imulq	$1073718272, %r13, %rdx
	movq	%rax, -1528(%rbp)
	movq	%rcx, %rax
	movslq	16(%r15), %rcx
	xorl	$1, %eax
	movq	%rbx, -1536(%rbp)
	cltq
	addq	(%r15,%rcx,8), %rdx
	movq	%r14, -2376(%rbp)
	movq	(%r12,%rax,8), %rax
	movq	%rdx, -2392(%rbp)
	movq	%rax, -2400(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2384(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r13
	jnb	.L3037
	movq	-2744(%rbp), %rax
	addq	%r14, %rax
.L3037:
	movq	%rax, -2368(%rbp)
	movq	-2752(%rbp), %rax
	leaq	-2360(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-1560(%rbp), %rdi
	leaq	-2376(%rbp), %r9
	movq	%rax, -2360(%rbp)
	leaq	-640(%rbp), %rax
	leaq	-2368(%rbp), %r8
	pushq	%r11
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-680(%rbp), %rax
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-2408(%rbp), %rax
	pushq	%rax
	leaq	-2400(%rbp), %rax
	pushq	%rax
	leaq	-2392(%rbp), %rax
	pushq	%rax
	leaq	-2384(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPtPKtiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3240
	testl	%eax, %eax
	jne	.L3035
	testl	%ebx, %ebx
	jne	.L3240
	call	cudaGetLastError@PLT
	movq	-2744(%rbp), %rsi
	movq	-2760(%rbp), %rcx
	addq	%rcx, -2752(%rbp)
	addq	%rsi, %r14
	testl	%eax, %eax
	jne	.L3035
	incq	%r13
	jmp	.L3034
.L3240:
	movl	%ebx, %eax
.L3035:
	movl	%eax, -2664(%rbp)
	jmp	.L2939
.L3756:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2704(%rbp)
	jmp	.L3033
.L2934:
	testb	%al, %al
	jne	.L2977
	cmpq	$4864, -2680(%rbp)
	ja	.L3042
	testq	%rbx, %rbx
	je	.L2938
	movabsq	$4294967297, %rax
	xorl	%r9d, %r9d
	movabsq	$1099511627777, %rdi
	movq	%rax, -840(%rbp)
	leaq	-2208(%rbp), %rcx
	leaq	-2216(%rbp), %r8
	movq	%rax, -824(%rbp)
	movq	-2672(%rbp), %rax
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rdi, -832(%rbp)
	leaq	-840(%rbp), %rdi
	movq	%rax, -808(%rbp)
	movslq	16(%r12), %rax
	movq	%r9, -816(%rbp)
	leaq	-2224(%rbp), %r9
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2216(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2224(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2200(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2208(%rbp)
	leaq	-2200(%rbp), %rdx
	pushq	%r10
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3344
	testl	%eax, %eax
	jne	.L2939
.L3344:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2939
.L3042:
	movl	-2684(%rbp), %ecx
	movl	16(%rbp), %eax
	xorl	%esi, %esi
	leaq	-136(%rbp), %rdi
	subl	%ecx, %eax
	movl	$8, %ecx
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268431360, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$7680, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268431360, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%r8d, %r8d
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r8, -160(%rbp)
	cltq
	movq	%r8, -152(%rbp)
	salq	$2, %rax
	movq	%r13, -144(%rbp)
	movq	%rax, -168(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L3046:
	movq	-176(%rbp,%rdx), %rdi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rdi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L3046
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L3047
	movq	-2696(%rbp), %rsi
	movq	%rax, (%rsi)
	jmp	.L2939
.L3047:
	movq	-2696(%rbp), %rcx
	cmpq	%rax, (%rcx)
	jnb	.L3049
	call	cudaGetLastError@PLT
.L3052:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2696(%rbp)
	movq	%rax, -496(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2720(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2728(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L3757
.L3049:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L3051:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L3051
	jmp	.L3052
.L3757:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3345
	testl	%eax, %eax
	jne	.L2939
.L3345:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2696(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3346
	testl	%eax, %eax
	jne	.L2939
.L3346:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	$-1, -800(%rbp)
	xorl	%edi, %edi
	movl	%edi, -760(%rbp)
	leaq	-800(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3347
	testl	%eax, %eax
	jne	.L2939
.L3347:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-800(%rbp), %edx
	leaq	-760(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3348
	testl	%eax, %eax
	jne	.L2939
.L3348:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	leaq	-720(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	movl	$1, -720(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3349
	testl	%eax, %eax
	jne	.L2939
.L3349:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-720(%rbp), %eax
	imull	-760(%rbp), %eax
	xorl	%ecx, %ecx
	movl	$1, -876(%rbp)
	movq	%rcx, -856(%rbp)
	leaq	-496(%rbp), %r13
	leaq	-2232(%rbp), %rcx
	leaq	-880(%rbp), %rdi
	leaq	-520(%rbp), %r9
	movq	%r13, %rdx
	movl	%eax, -880(%rbp)
	leaq	-528(%rbp), %r8
	movabsq	$1099511627777, %rax
	movq	%rax, -872(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -864(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -848(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2232(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%rsi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	movl	%eax, %ebx
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3350
	testl	%eax, %eax
	jne	.L2939
.L3350:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	movl	-2704(%rbp), %eax
	leaq	-920(%rbp), %rdi
	movq	%r13, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_(%rip), %rsi
	movl	$1, -916(%rbp)
	movl	%eax, -920(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -912(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -904(%rbp)
	xorl	%eax, %eax
	movq	%rax, -896(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -888(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3351
	testl	%eax, %eax
	jne	.L2939
.L3351:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	leaq	0(,%r14,4), %rax
	xorl	%r13d, %r13d
	salq	$11, %r14
	movq	%rax, -2760(%rbp)
	movq	%r14, -2744(%rbp)
	movq	%r13, -2704(%rbp)
.L3061:
	movl	-2684(%rbp), %eax
	movl	%eax, -680(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L2939
	movl	16(%rbp), %eax
	movl	-2684(%rbp), %esi
	movl	$8, %edx
	movq	-2704(%rbp), %rdi
	movq	-2696(%rbp), %rcx
	subl	%esi, %eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r13d, %r13d
	movl	%eax, -640(%rbp)
	movq	-2728(%rbp), %rax
	leaq	(%rax,%rdi,4), %rax
	movq	%rax, -2752(%rbp)
	movq	%rdi, %rax
	salq	$11, %rax
	leaq	(%rcx,%rax), %r14
.L3062:
	cmpq	%r13, -2712(%rbp)
	je	.L3758
	imulq	$-268431360, %r13, %rax
	movl	$268431360, %edx
	movq	-2680(%rbp), %rsi
	movl	$7680, %edi
	movq	-2672(%rbp), %rcx
	addq	%rsi, %rax
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -600(%rbp)
	idivl	%edi
	movq	-2720(%rbp), %rdi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2736(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3251
	testl	%eax, %eax
	jne	.L3063
	testl	%ebx, %ebx
	jne	.L3251
	movl	-2736(%rbp), %eax
	movslq	16(%r12), %rcx
	imulq	$536862720, %r13, %rdx
	xorl	%ebx, %ebx
	movl	$1, -956(%rbp)
	movl	%eax, -960(%rbp)
	addq	(%r12,%rcx,8), %rdx
	movabsq	$1099511627777, %rax
	movq	%rax, -952(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -944(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rdx, -2240(%rbp)
	imulq	$1073725440, %r13, %rdx
	movq	%rax, -928(%rbp)
	movq	%rcx, %rax
	movslq	16(%r15), %rcx
	xorl	$1, %eax
	movq	%rbx, -936(%rbp)
	cltq
	addq	(%r15,%rcx,8), %rdx
	movq	%r14, -2272(%rbp)
	movq	(%r12,%rax,8), %rax
	movq	%rdx, -2256(%rbp)
	movq	%rax, -2248(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2264(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r13
	jnb	.L3065
	movq	-2744(%rbp), %rax
	addq	%r14, %rax
.L3065:
	movq	%rax, -2280(%rbp)
	movq	-2752(%rbp), %rax
	leaq	-2288(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-960(%rbp), %rdi
	leaq	-2272(%rbp), %r9
	movq	%rax, -2288(%rbp)
	leaq	-640(%rbp), %rax
	leaq	-2280(%rbp), %r8
	pushq	%r11
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-680(%rbp), %rax
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-2240(%rbp), %rax
	pushq	%rax
	leaq	-2248(%rbp), %rax
	pushq	%rax
	leaq	-2256(%rbp), %rax
	pushq	%rax
	leaq	-2264(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPtPKtiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3251
	testl	%eax, %eax
	jne	.L3063
	testl	%ebx, %ebx
	jne	.L3251
	call	cudaGetLastError@PLT
	movq	-2744(%rbp), %rbx
	movq	-2760(%rbp), %rcx
	addq	%rcx, -2752(%rbp)
	addq	%rbx, %r14
	testl	%eax, %eax
	jne	.L3063
	incq	%r13
	jmp	.L3062
.L3251:
	movl	%ebx, %eax
.L3063:
	movl	%eax, -2664(%rbp)
	jmp	.L2939
.L3758:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2704(%rbp)
	jmp	.L3061
.L2933:
	testb	%al, %al
	jne	.L2977
	cmpq	$4864, -2680(%rbp)
	ja	.L3070
	testq	%rbx, %rbx
	je	.L2938
	movabsq	$4294967297, %rax
	xorl	%r9d, %r9d
	movabsq	$1099511627777, %rsi
	movq	%rax, -1840(%rbp)
	leaq	-2536(%rbp), %rcx
	leaq	-1840(%rbp), %rdi
	movq	%rax, -1824(%rbp)
	movq	-2672(%rbp), %rax
	leaq	-2528(%rbp), %r8
	movq	%rsi, -1832(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -1808(%rbp)
	movslq	16(%r12), %rax
	movq	%r9, -1816(%rbp)
	leaq	-2520(%rbp), %r9
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2528(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2520(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2544(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2536(%rbp)
	leaq	-2544(%rbp), %rdx
	pushq	%r10
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3354
	testl	%eax, %eax
	jne	.L2939
.L3354:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2939
.L3070:
	movl	-2684(%rbp), %edi
	movl	16(%rbp), %eax
	xorl	%esi, %esi
	movl	$8, %ecx
	subl	%edi, %eax
	leaq	-136(%rbp), %rdi
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268431360, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$7680, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268431360, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%r8d, %r8d
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r8, -160(%rbp)
	cltq
	movq	%r8, -152(%rbp)
	salq	$2, %rax
	movq	%r13, -144(%rbp)
	movq	%rax, -168(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L3074:
	movq	-176(%rbp,%rdx), %rcx
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	addq	$255, %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L3074
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L3075
	movq	-2696(%rbp), %rbx
	movq	%rax, (%rbx)
	jmp	.L2939
.L3075:
	movq	-2696(%rbp), %rdi
	cmpq	%rax, (%rdi)
	jnb	.L3077
	call	cudaGetLastError@PLT
.L3080:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2696(%rbp)
	movq	%rax, -496(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2720(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2728(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L3759
.L3077:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L3079:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L3079
	jmp	.L3080
.L3759:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3355
	testl	%eax, %eax
	jne	.L2939
.L3355:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2696(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3356
	testl	%eax, %eax
	jne	.L2939
.L3356:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	$-1, -800(%rbp)
	xorl	%edi, %edi
	movl	%edi, -760(%rbp)
	leaq	-800(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3357
	testl	%eax, %eax
	jne	.L2939
.L3357:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-800(%rbp), %edx
	leaq	-760(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3358
	testl	%eax, %eax
	jne	.L2939
.L3358:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	leaq	-720(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	movl	$1, -720(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3359
	testl	%eax, %eax
	jne	.L2939
.L3359:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-720(%rbp), %eax
	imull	-760(%rbp), %eax
	xorl	%ecx, %ecx
	movl	$1, -1796(%rbp)
	movq	%rcx, -1776(%rbp)
	leaq	-496(%rbp), %r13
	leaq	-2512(%rbp), %rcx
	leaq	-1800(%rbp), %rdi
	leaq	-520(%rbp), %r9
	movq	%r13, %rdx
	movl	%eax, -1800(%rbp)
	leaq	-528(%rbp), %r8
	movabsq	$1099511627777, %rax
	movq	%rax, -1792(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1784(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1768(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2512(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%rsi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	movl	%eax, %ebx
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3360
	testl	%eax, %eax
	jne	.L2939
.L3360:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	movl	-2704(%rbp), %eax
	leaq	-1760(%rbp), %rdi
	movq	%r13, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_(%rip), %rsi
	movl	$1, -1756(%rbp)
	movl	%eax, -1760(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -1752(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1744(%rbp)
	xorl	%eax, %eax
	movq	%rax, -1736(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1728(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3361
	testl	%eax, %eax
	jne	.L2939
.L3361:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	leaq	0(,%r14,4), %rax
	xorl	%r13d, %r13d
	salq	$11, %r14
	movq	%rax, -2760(%rbp)
	movq	%r14, -2744(%rbp)
	movq	%r13, -2704(%rbp)
.L3089:
	movl	-2684(%rbp), %eax
	movl	%eax, -680(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L2939
	movl	16(%rbp), %eax
	movl	-2684(%rbp), %ebx
	movl	$8, %edx
	movq	-2704(%rbp), %rsi
	movq	-2696(%rbp), %rcx
	subl	%ebx, %eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r13d, %r13d
	movl	%eax, -640(%rbp)
	movq	-2728(%rbp), %rax
	leaq	(%rax,%rsi,4), %rax
	movq	%rax, -2752(%rbp)
	movq	%rsi, %rax
	salq	$11, %rax
	leaq	(%rcx,%rax), %r14
.L3090:
	cmpq	%r13, -2712(%rbp)
	je	.L3760
	imulq	$-268431360, %r13, %rax
	movl	$268431360, %edx
	movq	-2680(%rbp), %rbx
	movl	$7680, %esi
	movq	-2672(%rbp), %rcx
	movq	-2720(%rbp), %rdi
	addq	%rbx, %rax
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -600(%rbp)
	idivl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2736(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3262
	testl	%eax, %eax
	jne	.L3091
	testl	%ebx, %ebx
	jne	.L3262
	movl	-2736(%rbp), %eax
	movslq	16(%r12), %rcx
	imulq	$536862720, %r13, %rdx
	xorl	%ebx, %ebx
	movl	$1, -1716(%rbp)
	movl	%eax, -1720(%rbp)
	addq	(%r12,%rcx,8), %rdx
	movabsq	$1099511627777, %rax
	movq	%rax, -1712(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1704(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rdx, -2504(%rbp)
	imulq	$1073725440, %r13, %rdx
	movq	%rax, -1688(%rbp)
	movq	%rcx, %rax
	movslq	16(%r15), %rcx
	xorl	$1, %eax
	movq	%rbx, -1696(%rbp)
	cltq
	addq	(%r15,%rcx,8), %rdx
	movq	%r14, -2472(%rbp)
	movq	(%r12,%rax,8), %rax
	movq	%rdx, -2488(%rbp)
	movq	%rax, -2496(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2480(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r13
	jnb	.L3093
	movq	-2744(%rbp), %rax
	addq	%r14, %rax
.L3093:
	movq	%rax, -2464(%rbp)
	movq	-2752(%rbp), %rax
	leaq	-2456(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-1720(%rbp), %rdi
	leaq	-2472(%rbp), %r9
	movq	%rax, -2456(%rbp)
	leaq	-640(%rbp), %rax
	leaq	-2464(%rbp), %r8
	pushq	%r11
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-680(%rbp), %rax
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-2504(%rbp), %rax
	pushq	%rax
	leaq	-2496(%rbp), %rax
	pushq	%rax
	leaq	-2488(%rbp), %rax
	pushq	%rax
	leaq	-2480(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPtPKtiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3262
	testl	%eax, %eax
	jne	.L3091
	testl	%ebx, %ebx
	jne	.L3262
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L3091
	movq	-2744(%rbp), %rax
	movq	-2760(%rbp), %rdi
	incq	%r13
	addq	%rdi, -2752(%rbp)
	addq	%rax, %r14
	jmp	.L3090
.L3262:
	movl	%ebx, %eax
.L3091:
	movl	%eax, -2664(%rbp)
	jmp	.L2939
.L3760:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2704(%rbp)
	jmp	.L3089
.L2932:
	testb	%al, %al
	jne	.L2977
	cmpq	$4864, -2680(%rbp)
	ja	.L3098
	testq	%rbx, %rbx
	je	.L2938
	movabsq	$4294967297, %rax
	xorl	%r9d, %r9d
	movabsq	$1099511627777, %rcx
	movq	%rax, -680(%rbp)
	leaq	-680(%rbp), %rdi
	leaq	-2120(%rbp), %r8
	movq	%rax, -664(%rbp)
	movq	-2672(%rbp), %rax
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rcx, -672(%rbp)
	leaq	-2112(%rbp), %rcx
	movq	%rax, -648(%rbp)
	movslq	16(%r12), %rax
	movq	%r9, -656(%rbp)
	leaq	-2128(%rbp), %r9
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2120(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2128(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2104(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2112(%rbp)
	leaq	-2104(%rbp), %rdx
	pushq	%r10
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, -2664(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2664(%rbp)
	jne	.L2939
	testl	%eax, %eax
	jne	.L3263
	cmpl	$0, -2664(%rbp)
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2939
.L3098:
	movl	-2684(%rbp), %esi
	movl	16(%rbp), %eax
	movl	$8, %ecx
	leaq	-136(%rbp), %rdi
	subl	%esi, %eax
	xorl	%esi, %esi
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268433920, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$5888, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268433920, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%r8d, %r8d
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r8, -160(%rbp)
	cltq
	movq	%r8, -152(%rbp)
	salq	$2, %rax
	movq	%r13, -144(%rbp)
	movq	%rax, -168(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L3102:
	movq	-176(%rbp,%rdx), %rdi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rdi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L3102
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L3103
	movq	-2696(%rbp), %rbx
	movq	%rax, (%rbx)
	jmp	.L2939
.L3103:
	movq	-2696(%rbp), %rcx
	cmpq	%rax, (%rcx)
	jnb	.L3105
	call	cudaGetLastError@PLT
.L3108:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2696(%rbp)
	movq	%rax, -496(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2720(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2728(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L3761
.L3105:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L3107:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L3107
	jmp	.L3108
.L3761:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3365
	testl	%eax, %eax
	jne	.L2939
.L3365:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2696(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3366
	testl	%eax, %eax
	jne	.L2939
.L3366:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	$-1, -920(%rbp)
	xorl	%edi, %edi
	movl	%edi, -880(%rbp)
	leaq	-920(%rbp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3367
	testl	%eax, %eax
	jne	.L2939
.L3367:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-920(%rbp), %edx
	leaq	-880(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3368
	testl	%eax, %eax
	jne	.L2939
.L3368:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	leaq	-840(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	movl	$1, -840(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3369
	testl	%eax, %eax
	jne	.L2939
.L3369:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-840(%rbp), %eax
	imull	-880(%rbp), %eax
	xorl	%ecx, %ecx
	movl	$1, -716(%rbp)
	movq	%rcx, -696(%rbp)
	leaq	-496(%rbp), %r13
	leaq	-2136(%rbp), %rcx
	leaq	-720(%rbp), %rdi
	leaq	-520(%rbp), %r9
	movq	%r13, %rdx
	movl	%eax, -720(%rbp)
	leaq	-528(%rbp), %r8
	movabsq	$1099511627777, %rax
	movq	%rax, -712(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -704(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -688(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2136(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%rsi
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	movl	%eax, %ebx
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3370
	testl	%eax, %eax
	jne	.L2939
.L3370:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	movl	-2704(%rbp), %eax
	leaq	-760(%rbp), %rdi
	movq	%r13, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_(%rip), %rsi
	movl	$1, -756(%rbp)
	movl	%eax, -760(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -752(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -744(%rbp)
	xorl	%eax, %eax
	movq	%rax, -736(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -728(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3371
	testl	%eax, %eax
	jne	.L2939
.L3371:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	leaq	0(,%r14,4), %rax
	salq	$11, %r14
	movq	%rax, -2760(%rbp)
	xorl	%eax, %eax
	movq	%r14, -2752(%rbp)
	movq	%rax, -2704(%rbp)
.L3117:
	movl	-2684(%rbp), %eax
	movl	%eax, -680(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L2939
	movl	16(%rbp), %eax
	movl	-2684(%rbp), %ebx
	movl	$8, %edx
	movq	-2704(%rbp), %rsi
	movq	-2696(%rbp), %rdi
	subl	%ebx, %eax
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r13d, %r13d
	movl	%eax, -640(%rbp)
	movq	-2728(%rbp), %rax
	leaq	(%rax,%rsi,4), %rax
	movq	%rax, -2744(%rbp)
	movq	%rsi, %rax
	salq	$11, %rax
	leaq	(%rdi,%rax), %r14
.L3118:
	cmpq	%r13, -2712(%rbp)
	je	.L3762
	imulq	$-268433920, %r13, %rax
	movl	$268433920, %edx
	movq	-2680(%rbp), %rcx
	movl	$5888, %ebx
	movq	-2720(%rbp), %rdi
	addq	%rcx, %rax
	movq	-2672(%rbp), %rcx
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -600(%rbp)
	idivl	%ebx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2736(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3273
	testl	%eax, %eax
	jne	.L3119
	testl	%ebx, %ebx
	jne	.L3273
	movl	-2736(%rbp), %eax
	movslq	16(%r12), %rcx
	imulq	$536867840, %r13, %rdx
	movl	$1, -796(%rbp)
	movq	%r14, -2176(%rbp)
	movl	%eax, -800(%rbp)
	addq	(%r12,%rcx,8), %rdx
	movabsq	$1099511627777, %rax
	movq	%rax, -792(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -784(%rbp)
	xorl	%eax, %eax
	movq	%rax, -776(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rdx, -2144(%rbp)
	imulq	$1073735680, %r13, %rdx
	movq	%rax, -768(%rbp)
	movq	%rcx, %rax
	movslq	16(%r15), %rcx
	xorl	$1, %eax
	cltq
	addq	(%r15,%rcx,8), %rdx
	movq	(%r12,%rax,8), %rax
	movq	%rdx, -2160(%rbp)
	movq	%rax, -2152(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2168(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r13
	jnb	.L3121
	movq	-2752(%rbp), %rax
	addq	%r14, %rax
.L3121:
	movq	%rax, -2184(%rbp)
	movq	-2744(%rbp), %rax
	leaq	-2192(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-800(%rbp), %rdi
	leaq	-2176(%rbp), %r9
	movq	%rax, -2192(%rbp)
	leaq	-2184(%rbp), %r8
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-640(%rbp), %rax
	pushq	%rax
	leaq	-680(%rbp), %rax
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-2144(%rbp), %rax
	pushq	%rax
	leaq	-2152(%rbp), %rax
	pushq	%rax
	leaq	-2160(%rbp), %rax
	pushq	%rax
	leaq	-2168(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPtPKtiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3273
	testl	%eax, %eax
	jne	.L3119
	testl	%ebx, %ebx
	jne	.L3273
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L3119
	movq	-2752(%rbp), %rax
	movq	-2760(%rbp), %rsi
	incq	%r13
	addq	%rsi, -2744(%rbp)
	addq	%rax, %r14
	jmp	.L3118
.L3273:
	movl	%ebx, %eax
.L3119:
	movl	%eax, -2664(%rbp)
	jmp	.L2939
.L3762:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2704(%rbp)
	jmp	.L3117
.L2931:
	testb	%al, %al
	jne	.L2977
	cmpq	$4864, -2680(%rbp)
	ja	.L3126
	testq	%rbx, %rbx
	je	.L2938
	xorl	%ebx, %ebx
	leaq	-2632(%rbp), %rcx
	movabsq	$4294967297, %rax
	movabsq	$1099511627777, %rdi
	movq	%rax, -2000(%rbp)
	leaq	-2616(%rbp), %r9
	leaq	-2624(%rbp), %r8
	movq	%rax, -1984(%rbp)
	movq	-2672(%rbp), %rax
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rdi, -1992(%rbp)
	leaq	-2000(%rbp), %rdi
	movq	%rax, -1968(%rbp)
	movslq	16(%r12), %rax
	movq	%rbx, -1976(%rbp)
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2624(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2616(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2640(%rbp)
	leaq	-516(%rbp), %rax
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2632(%rbp)
	leaq	-2640(%rbp), %rdx
	pushq	%r13
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, -2664(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2664(%rbp)
	jne	.L2939
	testl	%eax, %eax
	jne	.L3274
	cmpl	$0, -2664(%rbp)
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2939
.L3126:
	movl	-2684(%rbp), %esi
	movl	16(%rbp), %eax
	movl	$8, %ecx
	leaq	-136(%rbp), %rdi
	subl	%esi, %eax
	xorl	%esi, %esi
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268431360, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$6528, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268431360, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%r11d, %r11d
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r11, -160(%rbp)
	cltq
	movq	%r11, -152(%rbp)
	salq	$2, %rax
	movq	%r13, -144(%rbp)
	movq	%rax, -168(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L3130:
	movq	-176(%rbp,%rdx), %rdi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rdi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L3130
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L3131
	movq	-2696(%rbp), %rbx
	movq	%rax, (%rbx)
	jmp	.L2939
.L3131:
	movq	-2696(%rbp), %rcx
	cmpq	%rax, (%rcx)
	jnb	.L3133
	call	cudaGetLastError@PLT
.L3136:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2696(%rbp)
	movq	%rax, -496(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2720(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2728(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L3763
.L3133:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L3135:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L3135
	jmp	.L3136
.L3763:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3375
	testl	%eax, %eax
	jne	.L2939
.L3375:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2696(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3376
	testl	%eax, %eax
	jne	.L2939
.L3376:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	xorl	%r10d, %r10d
	leaq	-800(%rbp), %rdi
	movl	$-1, -800(%rbp)
	movl	%r10d, -760(%rbp)
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3377
	testl	%eax, %eax
	jne	.L2939
.L3377:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-800(%rbp), %edx
	leaq	-760(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3378
	testl	%eax, %eax
	jne	.L2939
.L3378:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	leaq	-720(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$128, %edx
	movl	$1, -720(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3379
	testl	%eax, %eax
	jne	.L2939
.L3379:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-720(%rbp), %eax
	imull	-760(%rbp), %eax
	xorl	%r8d, %r8d
	movl	$1, -1956(%rbp)
	movq	%r8, -1936(%rbp)
	leaq	-496(%rbp), %r13
	leaq	-2608(%rbp), %rcx
	leaq	-1960(%rbp), %rdi
	leaq	-528(%rbp), %r8
	movq	%r13, %rdx
	movl	%eax, -1960(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	movabsq	$549755813889, %rax
	movq	%rax, -1952(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1944(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -1928(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2608(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%r9
	leaq	-520(%rbp), %r9
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%rsi
	popq	%rdi
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3380
	testl	%eax, %eax
	jne	.L2939
.L3380:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	movl	-2704(%rbp), %eax
	xorl	%ecx, %ecx
	leaq	-1920(%rbp), %rdi
	movq	%r13, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_(%rip), %rsi
	movq	%rcx, -1896(%rbp)
	movl	%eax, -1920(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -1912(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1904(%rbp)
	movq	-2672(%rbp), %rax
	movl	$1, -1916(%rbp)
	movq	%rax, -1888(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3381
	testl	%eax, %eax
	jne	.L2939
.L3381:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	leaq	0(,%r14,4), %rax
	xorl	%edx, %edx
	salq	$11, %r14
	movq	%rax, -2760(%rbp)
	movq	%r14, -2744(%rbp)
	movq	%rdx, -2704(%rbp)
.L3145:
	movl	-2684(%rbp), %eax
	movl	%eax, -680(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L2939
	movl	-2684(%rbp), %ebx
	movl	16(%rbp), %eax
	movl	$8, %edx
	movq	-2696(%rbp), %rsi
	subl	%ebx, %eax
	movq	-2704(%rbp), %rbx
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r13d, %r13d
	movl	%eax, -640(%rbp)
	movq	-2728(%rbp), %rax
	leaq	(%rax,%rbx,4), %rax
	movq	%rax, -2752(%rbp)
	movq	%rbx, %rax
	salq	$11, %rax
	leaq	(%rsi,%rax), %r14
.L3146:
	cmpq	%r13, -2712(%rbp)
	je	.L3764
	imulq	$-268431360, %r13, %rax
	movl	$268431360, %edx
	movl	$6528, %ecx
	movq	-2680(%rbp), %rdi
	addq	%rdi, %rax
	movq	-2720(%rbp), %rdi
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -600(%rbp)
	idivl	%ecx
	movq	-2672(%rbp), %rcx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2736(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3284
	testl	%eax, %eax
	jne	.L3147
	testl	%ebx, %ebx
	jne	.L3284
	movl	-2736(%rbp), %eax
	movslq	16(%r12), %rcx
	imulq	$536862720, %r13, %rdx
	movl	$1, -1876(%rbp)
	movq	%r14, -2568(%rbp)
	movl	%eax, -1880(%rbp)
	addq	(%r12,%rcx,8), %rdx
	movabsq	$1649267441665, %rax
	movq	%rax, -1872(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -1864(%rbp)
	xorl	%eax, %eax
	movq	%rax, -1856(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rdx, -2600(%rbp)
	imulq	$1073725440, %r13, %rdx
	movq	%rax, -1848(%rbp)
	movq	%rcx, %rax
	movslq	16(%r15), %rcx
	xorl	$1, %eax
	cltq
	addq	(%r15,%rcx,8), %rdx
	movq	(%r12,%rax,8), %rax
	movq	%rdx, -2584(%rbp)
	movq	%rax, -2592(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2576(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r13
	jnb	.L3149
	movq	-2744(%rbp), %rax
	addq	%r14, %rax
.L3149:
	movq	%rax, -2560(%rbp)
	movq	-2752(%rbp), %rax
	leaq	-2552(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-1880(%rbp), %rdi
	leaq	-2568(%rbp), %r9
	movq	%rax, -2552(%rbp)
	leaq	-2560(%rbp), %r8
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-640(%rbp), %rax
	pushq	%rax
	leaq	-680(%rbp), %rax
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-2600(%rbp), %rax
	pushq	%rax
	leaq	-2592(%rbp), %rax
	pushq	%rax
	leaq	-2584(%rbp), %rax
	pushq	%rax
	leaq	-2576(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPtPKtiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3284
	testl	%eax, %eax
	jne	.L3147
	testl	%ebx, %ebx
	jne	.L3284
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L3147
	movq	-2744(%rbp), %rax
	movq	-2760(%rbp), %rbx
	incq	%r13
	addq	%rbx, -2752(%rbp)
	addq	%rax, %r14
	jmp	.L3146
.L3284:
	movl	%ebx, %eax
.L3147:
	movl	%eax, -2664(%rbp)
	jmp	.L2939
.L3764:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2704(%rbp)
	jmp	.L3145
.L2930:
	testb	%al, %al
	jne	.L2977
	cmpq	$4864, -2680(%rbp)
	ja	.L3154
	testq	%rbx, %rbx
	je	.L2938
	leaq	-2016(%rbp), %rcx
	leaq	-336(%rbp), %rdi
	movabsq	$4294967297, %rax
	movabsq	$1099511627777, %rsi
	movq	%rax, -336(%rbp)
	leaq	-2032(%rbp), %r9
	leaq	-2024(%rbp), %r8
	movq	%rax, -320(%rbp)
	xorl	%eax, %eax
	movq	%rax, -312(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rsi, -328(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS31DeviceRadixSortSingleTileKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyNS0_6detail21identity_decomposer_tEEEvPKT1_PS7_PKT2_PSB_T3_iiT4_(%rip), %rsi
	movq	%rax, -304(%rbp)
	movslq	16(%r12), %rax
	movl	%eax, %edx
	movq	(%r12,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2024(%rbp)
	movslq	16(%r15), %rax
	movq	(%r12,%rdx,8), %rdx
	movq	%rdx, -2032(%rbp)
	movl	%eax, %edx
	movq	(%r15,%rax,8), %rax
	xorl	$1, %edx
	movslq	%edx, %rdx
	movq	%rax, -2008(%rbp)
	movq	(%r15,%rdx,8), %rdx
	movq	%rdx, -2016(%rbp)
	leaq	-2008(%rbp), %rdx
	pushq	%rax
	leaq	-516(%rbp), %rax
	pushq	%rax
	leaq	-520(%rbp), %rax
	pushq	%rax
	leaq	-528(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x20
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPKjPjPKtPtyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS7_S7_SA_SA_yiiSE_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$32, %rsp
	.cfi_escape 0x2e,0
	call	cudaPeekAtLastError@PLT
	movl	%eax, -2664(%rbp)
	call	cudaGetLastError@PLT
	cmpl	$0, -2664(%rbp)
	jne	.L2939
	testl	%eax, %eax
	jne	.L3285
	cmpl	$0, -2664(%rbp)
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	xorl	$1, 16(%r15)
	xorl	$1, 16(%r12)
	jmp	.L2939
.L3154:
	movl	-2684(%rbp), %ecx
	movl	16(%rbp), %eax
	xorl	%esi, %esi
	leaq	-136(%rbp), %rdi
	subl	%ecx, %eax
	movl	$8, %ecx
	testb	$7, %al
	setne	%sil
	cltd
	idivl	%ecx
	movl	$268431360, %ecx
	xorl	%edx, %edx
	addl	%esi, %eax
	leaq	-136(%rbp), %rsi
	movl	%eax, -2704(%rbp)
	movq	-2680(%rbp), %rax
	movslq	-2704(%rbp), %r14
	divq	%rcx
	movl	$6528, %ecx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	movq	%rax, -2712(%rbp)
	movq	-2712(%rbp), %r13
	movl	$268431360, %eax
	cmpq	%rax, -2680(%rbp)
	cmovbe	-2680(%rbp), %rax
	imulq	%r14, %r13
	movq	%r13, %rdx
	salq	$11, %rdx
	movq	%rdx, -176(%rbp)
	cltd
	idivl	%ecx
	movl	$10, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	salq	$2, %r13
	xorl	%edx, %edx
	sall	$8, %eax
	movq	%r13, -144(%rbp)
	cltq
	salq	$2, %rax
	movq	%rax, -168(%rbp)
	xorl	%eax, %eax
	movq	%rax, -160(%rbp)
	movq	%rax, -152(%rbp)
	movl	-2664(%rbp), %eax
	rep stosl
	xorl	%eax, %eax
.L3158:
	movq	-176(%rbp,%rdx), %rdi
	movq	%rax, -96(%rbp,%rdx)
	addq	$8, %rdx
	leaq	255(%rdi), %rcx
	xorb	%cl, %cl
	addq	%rcx, %rax
	cmpq	$40, %rdx
	jne	.L3158
	addq	$255, %rax
	testq	%rbx, %rbx
	jne	.L3159
	movq	-2696(%rbp), %rbx
	movq	%rax, (%rbx)
	jmp	.L2939
.L3159:
	movq	-2696(%rbp), %rcx
	cmpq	%rax, (%rcx)
	jnb	.L3161
	call	cudaGetLastError@PLT
.L3164:
	movq	-136(%rbp), %rax
	movq	-2672(%rbp), %rcx
	movq	%r13, %rdx
	xorl	%esi, %esi
	movq	%rax, -2720(%rbp)
	movq	%rax, -680(%rbp)
	movq	-128(%rbp), %rax
	movq	%rax, -2728(%rbp)
	movq	%rax, -336(%rbp)
	movq	-104(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2736(%rbp)
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	jmp	.L3765
.L3161:
	addq	$255, %rbx
	xorl	%eax, %eax
	xorb	%bl, %bl
.L3163:
	movq	-96(%rbp,%rax), %rdx
	addq	%rbx, %rdx
	movq	%rdx, (%rsi,%rax)
	addq	$8, %rax
	cmpq	$40, %rax
	jne	.L3163
	jmp	.L3164
.L3765:
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3385
	testl	%eax, %eax
	jne	.L2939
.L3385:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-2704(%rbp), %edx
	movq	-2672(%rbp), %rcx
	xorl	%esi, %esi
	movq	-2720(%rbp), %rdi
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3386
	testl	%eax, %eax
	jne	.L2939
.L3386:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	xorl	%r11d, %r11d
	leaq	-840(%rbp), %rdi
	movl	$-1, -840(%rbp)
	movl	%r11d, -800(%rbp)
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3387
	testl	%eax, %eax
	jne	.L2939
.L3387:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-840(%rbp), %edx
	leaq	-800(%rbp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3388
	testl	%eax, %eax
	jne	.L2939
.L3388:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	leaq	-760(%rbp), %rdi
	xorl	%ecx, %ecx
	movl	$128, %edx
	movl	$1, -760(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	call	_Z45cudaOccupancyMaxActiveBlocksPerMultiprocessorIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEE9cudaErrorPiT_im
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3389
	testl	%eax, %eax
	jne	.L2939
.L3389:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	movl	-760(%rbp), %eax
	imull	-800(%rbp), %eax
	xorl	%r9d, %r9d
	movl	$1, -492(%rbp)
	movq	%r9, -472(%rbp)
	leaq	-680(%rbp), %r13
	leaq	-2040(%rbp), %rcx
	leaq	-496(%rbp), %rdi
	leaq	-520(%rbp), %r9
	movq	%r13, %rdx
	movl	%eax, -496(%rbp)
	leaq	-528(%rbp), %r8
	movabsq	$549755813889, %rax
	leaq	_ZN3cub17CUB_200700_890_NS30DeviceRadixSortHistogramKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjyNS0_6detail21identity_decomposer_tEEEvPT2_PKT1_S7_iiT3_(%rip), %rsi
	movq	%rax, -488(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -480(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rax, -464(%rbp)
	movslq	16(%r15), %rax
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2040(%rbp)
	leaq	-516(%rbp), %rax
	pushq	%r10
	pushq	%rax
	.cfi_escape 0x2e,0x10
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyPKjyiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_PjyiiSB_EEE9cudaErrorT_DpRKT0_.isra.0
	popq	%rdi
	popq	%r8
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3390
	testl	%eax, %eax
	jne	.L2939
.L3390:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	movl	-2704(%rbp), %eax
	xorl	%esi, %esi
	leaq	-600(%rbp), %rdi
	movq	%r13, %rdx
	movq	%rsi, -576(%rbp)
	leaq	_ZN3cub17CUB_200700_890_NS33DeviceRadixSortExclusiveSumKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900EyEEvPT0_(%rip), %rsi
	movl	%eax, -600(%rbp)
	movabsq	$1099511627777, %rax
	movq	%rax, -592(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -584(%rbp)
	movq	-2672(%rbp), %rax
	movl	$1, -596(%rbp)
	movq	%rax, -568(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPyEJS5_EEE9cudaErrorT_DpRKT0_
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L3391
	testl	%eax, %eax
	jne	.L2939
.L3391:
	movl	%ebx, -2664(%rbp)
	testl	%ebx, %ebx
	jne	.L2939
	call	cudaGetLastError@PLT
	movl	%eax, -2664(%rbp)
	testl	%eax, %eax
	jne	.L2939
	leaq	0(,%r14,4), %rax
	xorl	%ecx, %ecx
	salq	$11, %r14
	movq	%rax, -2760(%rbp)
	movq	%r14, -2752(%rbp)
	movq	%rcx, -2696(%rbp)
.L3173:
	movl	-2684(%rbp), %eax
	movl	%eax, -720(%rbp)
	cmpl	%eax, 16(%rbp)
	jle	.L2939
	movl	-2684(%rbp), %ebx
	movl	16(%rbp), %eax
	movl	$8, %edx
	movq	-2696(%rbp), %rsi
	subl	%ebx, %eax
	movq	-2720(%rbp), %rbx
	cmpl	%edx, %eax
	cmovg	%edx, %eax
	xorl	%r13d, %r13d
	movl	%eax, -600(%rbp)
	movq	-2736(%rbp), %rax
	leaq	(%rax,%rsi,4), %rax
	movq	%rax, -2744(%rbp)
	movq	%rsi, %rax
	salq	$11, %rax
	leaq	(%rbx,%rax), %r14
.L3174:
	cmpq	%r13, -2712(%rbp)
	je	.L3766
	imulq	$-268431360, %r13, %rax
	movl	$268431360, %edx
	movq	-2680(%rbp), %rsi
	movl	$6528, %edi
	movq	-2672(%rbp), %rcx
	addq	%rsi, %rax
	cmpq	%rdx, %rax
	cmova	%rdx, %rax
	cltd
	movl	%eax, -496(%rbp)
	idivl	%edi
	movq	-2728(%rbp), %rdi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, %edx
	movl	%eax, -2704(%rbp)
	sall	$8, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemsetAsync@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3295
	testl	%eax, %eax
	jne	.L3175
	testl	%ebx, %ebx
	jne	.L3295
	movl	-2704(%rbp), %eax
	movslq	16(%r12), %rcx
	xorl	%edx, %edx
	movl	$1, -636(%rbp)
	movq	%rdx, -616(%rbp)
	imulq	$536862720, %r13, %rdx
	movl	%eax, -640(%rbp)
	addq	(%r12,%rcx,8), %rdx
	movabsq	$1649267441665, %rax
	movq	%rax, -632(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -624(%rbp)
	movq	-2672(%rbp), %rax
	movq	%rdx, -2048(%rbp)
	imulq	$1073725440, %r13, %rdx
	movq	%rax, -608(%rbp)
	movq	%rcx, %rax
	movslq	16(%r15), %rcx
	xorl	$1, %eax
	movq	%r14, -2080(%rbp)
	cltq
	addq	(%r15,%rcx,8), %rdx
	movq	(%r12,%rax,8), %rax
	movq	%rdx, -2064(%rbp)
	movq	%rax, -2056(%rbp)
	movq	%rcx, %rax
	xorl	$1, %eax
	cltq
	movq	(%r15,%rax,8), %rax
	movq	%rax, -2072(%rbp)
	movq	-2712(%rbp), %rax
	leaq	-1(%rax), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r13
	jnb	.L3177
	movq	-2752(%rbp), %rax
	addq	%r14, %rax
.L3177:
	movq	%rax, -2088(%rbp)
	movq	-2744(%rbp), %rax
	leaq	-2096(%rbp), %rcx
	leaq	-336(%rbp), %rdx
	leaq	-640(%rbp), %rdi
	leaq	-2080(%rbp), %r9
	movq	%rax, -2096(%rbp)
	leaq	-2088(%rbp), %r8
	leaq	_ZN3cub17CUB_200700_890_NS29DeviceRadixSortOnesweepKernelINS0_21DeviceRadixSortPolicyIjtyE9Policy900ELb0EjtyiiNS0_6detail21identity_decomposer_tEEEvPT5_S8_PT3_PKS9_PT1_PKSD_PT2_PKSH_T4_iiT6_(%rip), %rsi
	pushq	%rax
	leaq	-600(%rbp), %rax
	pushq	%rax
	leaq	-720(%rbp), %rax
	pushq	%rax
	leaq	-496(%rbp), %rax
	pushq	%rax
	leaq	-2048(%rbp), %rax
	pushq	%rax
	leaq	-2056(%rbp), %rax
	pushq	%rax
	leaq	-2064(%rbp), %rax
	pushq	%rax
	leaq	-2072(%rbp), %rax
	pushq	%rax
	.cfi_escape 0x2e,0x40
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_PyPKyPjPKjPtPKtiiiN3cub17CUB_200700_890_NS6detail21identity_decomposer_tEEJS5_S5_S6_S6_S9_S9_SC_SC_iiiSI_EEE9cudaErrorT_DpRKT0_.isra.0
	addq	$64, %rsp
	movl	%eax, %ebx
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L3295
	testl	%eax, %eax
	jne	.L3175
	testl	%ebx, %ebx
	jne	.L3295
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L3175
	movq	-2752(%rbp), %rax
	movq	-2760(%rbp), %rcx
	incq	%r13
	addq	%rcx, -2744(%rbp)
	addq	%rax, %r14
	jmp	.L3174
.L3295:
	movl	%ebx, %eax
.L3175:
	movl	%eax, -2664(%rbp)
	jmp	.L2939
.L3766:
	xorl	$1, 16(%r15)
	addl	$8, -2684(%rbp)
	xorl	$1, 16(%r12)
	incq	-2696(%rbp)
	jmp	.L3173
.L3263:
	movl	%eax, -2664(%rbp)
	jmp	.L2939
.L3274:
	movl	%eax, -2664(%rbp)
	jmp	.L2939
.L3285:
	movl	%eax, -2664(%rbp)
.L2939:
	call	cudaGetLastError@PLT
.LEHE37:
	cmpl	$0, -2664(%rbp)
	jne	.L3187
	testl	%eax, %eax
	jne	.L2928
	cmpl	$0, -2664(%rbp)
	je	.L3183
.L3187:
	movl	-2664(%rbp), %eax
.L2928:
	movl	%eax, -2664(%rbp)
.L3183:
	leaq	-2646(%rbp), %rdi
	call	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L3186
	jmp	.L3751
.L3296:
	endbr64
	movq	%rax, %rbx
.L3184:
	leaq	-2646(%rbp), %rdi
	call	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L3751
	movq	%rbx, %rdi
.LEHB38:
	call	_Unwind_Resume@PLT
.LEHE38:
.L3751:
	call	__stack_chk_fail@PLT
.L3186:
	movl	-2664(%rbp), %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13005:
	.section	.gcc_except_table
.LLSDA13005:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE13005-.LLSDACSB13005
.LLSDACSB13005:
	.uleb128 .LEHB37-.LFB13005
	.uleb128 .LEHE37-.LEHB37
	.uleb128 .L3296-.LFB13005
	.uleb128 0
	.uleb128 .LEHB38-.LFB13005
	.uleb128 .LEHE38-.LEHB38
	.uleb128 0
	.uleb128 0
.LLSDACSE13005:
	.section	.text._ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,"axG",@progbits,_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st,comdat
	.size	_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st, .-_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st
	.section	.text._Z10SortByFreqIjtEvPT_PT0_i,"axG",@progbits,_Z10SortByFreqIjtEvPT_PT0_i,comdat
	.weak	_Z10SortByFreqIjtEvPT_PT0_i
	.type	_Z10SortByFreqIjtEvPT_PT0_i, @function
_Z10SortByFreqIjtEvPT_PT0_i:
.LFB12344:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12344
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	leaq	-104(%rbp), %r15
	leaq	-136(%rbp), %r14
	pushq	%r13
	pushq	%r12
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	movq	%rsi, %r12
	pushq	%rbx
	.cfi_offset 3, -56
	movslq	%edx, %rbx
	salq	$2, %rbx
	negq	%rbx
	subq	$168, %rsp
	sarq	$2, %rbx
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	movq	%rbx, %rax
	movq	%rdi, -144(%rbp)
	leaq	-144(%rbp), %rdi
	negq	%rax
	movq	%rax, -176(%rbp)
	call	_ZNK6thrust20THRUST_200700_890_NS15iterator_facadeINS0_10device_ptrIjEEjNS0_8cuda_cub3tagENS0_27random_access_traversal_tagENS0_16device_referenceIjEElEdeEv
	xorl	%ecx, %ecx
	xorl	%esi, %esi
	xorl	%edi, %edi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	movq	%rcx, -136(%rbp)
	movq	%r15, %rdx
	movq	%rsi, -96(%rbp)
	leaq	-80(%rbp), %rcx
	movq	%r14, %rsi
	movq	%rax, %r13
	movl	%edi, -88(%rbp)
	xorl	%edi, %edi
	movq	%r8, -72(%rbp)
	movq	-176(%rbp), %r8
	movl	%r9d, -64(%rbp)
	xorl	%r9d, %r9d
	movq	%rax, -104(%rbp)
	movq	%r12, -80(%rbp)
	pushq	$1
	pushq	$32
	movq	%rcx, -200(%rbp)
.LEHB39:
	call	_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st
	popq	%r10
	leaq	.LC92(%rip), %rsi
	popq	%r11
	movl	%eax, %edi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	imulq	$-4, %rbx, %r9
	movq	-136(%rbp), %rdx
	leaq	-145(%rbp), %rsi
	imulq	$-2, %rbx, %rbx
	addq	$127, %r9
	leaq	127(%rbx), %r8
	andq	$-128, %r9
	andq	$-128, %r8
	movq	%r9, -192(%rbp)
	leaq	(%r8,%r9), %rax
	addq	%rax, %rdx
	movq	%rax, -184(%rbp)
	leaq	-128(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -168(%rbp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail15temporary_arrayIhNS0_8cuda_cub3tagEEC1ERNS0_16execution_policyIS4_EEm
.LEHE39:
	movq	-168(%rbp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	movq	-168(%rbp), %rdi
	movq	%rax, -96(%rbp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	movq	-192(%rbp), %r9
	movq	-168(%rbp), %rdi
	addq	%r9, %rax
	movq	%rax, -72(%rbp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	xorl	%r9d, %r9d
	movq	%r15, %rdx
	movq	%r14, %rsi
	movq	-184(%rbp), %rcx
	movq	-176(%rbp), %r8
	pushq	$1
	pushq	$32
	leaq	(%rax,%rcx), %rdi
	movq	-200(%rbp), %rcx
.LEHB40:
	.cfi_escape 0x2e,0x10
	call	_ZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_st
	movl	%eax, %edi
	leaq	.LC93(%rip), %rsi
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	cmpl	$0, -88(%rbp)
	jne	.L3768
.L3771:
	cmpl	$0, -64(%rbp)
	jne	.L3769
	jmp	.L3770
.L3768:
	movq	-176(%rbp), %rsi
	movq	-96(%rbp), %rdi
	movq	%r13, %rdx
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub6copy_nINS1_3tagEPjlS4_EET2_RNS1_16execution_policyIT_EET0_T1_S5_.isra.0
.LEHE40:
	jmp	.L3771
.L3769:
	movq	-72(%rbp), %rsi
	testq	%rbx, %rbx
	jg	.L3778
.L3770:
	movq	-168(%rbp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv
	movl	$1, %edi
.LEHB41:
	call	_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st
	leaq	.LC94(%rip), %rsi
	movl	%eax, %edi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
.LEHE41:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L3774
	jmp	.L3776
.L3778:
	movl	$1, %r8d
	movl	$3, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rdi
.LEHB42:
	call	cudaMemcpyAsync@PLT
	movl	$1, %edi
	movl	%eax, %ebx
	call	_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st
	leaq	.LC8(%rip), %rsi
	movl	%ebx, %edi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
.LEHE42:
	jmp	.L3770
.L3775:
	endbr64
	movq	%rax, %rbx
.L3772:
	movq	-168(%rbp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L3776
	movq	%rbx, %rdi
.LEHB43:
	call	_Unwind_Resume@PLT
.LEHE43:
.L3776:
	call	__stack_chk_fail@PLT
.L3774:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12344:
	.section	.gcc_except_table
.LLSDA12344:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12344-.LLSDACSB12344
.LLSDACSB12344:
	.uleb128 .LEHB39-.LFB12344
	.uleb128 .LEHE39-.LEHB39
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB40-.LFB12344
	.uleb128 .LEHE40-.LEHB40
	.uleb128 .L3775-.LFB12344
	.uleb128 0
	.uleb128 .LEHB41-.LFB12344
	.uleb128 .LEHE41-.LEHB41
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB42-.LFB12344
	.uleb128 .LEHE42-.LEHB42
	.uleb128 .L3775-.LFB12344
	.uleb128 0
	.uleb128 .LEHB43-.LFB12344
	.uleb128 .LEHE43-.LEHB43
	.uleb128 0
	.uleb128 0
.LLSDACSE12344:
	.section	.text._Z10SortByFreqIjtEvPT_PT0_i,"axG",@progbits,_Z10SortByFreqIjtEvPT_PT0_i,comdat
	.size	_Z10SortByFreqIjtEvPT_PT0_i, .-_Z10SortByFreqIjtEvPT_PT0_i
	.weak	_ZTSN4cuda3__410cuda_errorE
	.section	.rodata._ZTSN4cuda3__410cuda_errorE,"aG",@progbits,_ZTSN4cuda3__410cuda_errorE,comdat
	.align 16
	.type	_ZTSN4cuda3__410cuda_errorE, @object
	.size	_ZTSN4cuda3__410cuda_errorE, 24
_ZTSN4cuda3__410cuda_errorE:
	.string	"N4cuda3__410cuda_errorE"
	.weak	_ZTIN4cuda3__410cuda_errorE
	.section	.data.rel.ro._ZTIN4cuda3__410cuda_errorE,"awG",@progbits,_ZTIN4cuda3__410cuda_errorE,comdat
	.align 8
	.type	_ZTIN4cuda3__410cuda_errorE, @object
	.size	_ZTIN4cuda3__410cuda_errorE, 24
_ZTIN4cuda3__410cuda_errorE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN4cuda3__410cuda_errorE
	.quad	_ZTISt13runtime_error
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE, 55
_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE:
	.string	"N6thrust20THRUST_200700_890_NS6system14error_categoryE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE, 16
_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, 70
_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE:
	.string	"N6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, 69
_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE:
	.string	"N6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, 76
_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE:
	.string	"N6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE, 53
_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE:
	.string	"N6thrust20THRUST_200700_890_NS6system12system_errorE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE
	.quad	_ZTISt13runtime_error
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, 56
_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE:
	.string	"N6thrust20THRUST_200700_890_NS6system6detail9bad_allocE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE
	.quad	_ZTISt9bad_alloc
	.weak	_ZTVN4cuda3__410cuda_errorE
	.section	.data.rel.ro._ZTVN4cuda3__410cuda_errorE,"awG",@progbits,_ZTVN4cuda3__410cuda_errorE,comdat
	.align 8
	.type	_ZTVN4cuda3__410cuda_errorE, @object
	.size	_ZTVN4cuda3__410cuda_errorE, 40
_ZTVN4cuda3__410cuda_errorE:
	.quad	0
	.quad	_ZTIN4cuda3__410cuda_errorE
	.quad	_ZN4cuda3__410cuda_errorD1Ev
	.quad	_ZN4cuda3__410cuda_errorD0Ev
	.quad	_ZNKSt13runtime_error4whatEv
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, 72
_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, 72
_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, 72
_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE, 40
_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, 40
_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv
	.weak	_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d
	.section	.bss._ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,"awG",@nobits,_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,comdat
	.align 8
	.type	_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, @gnu_unique_object
	.size	_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, 8
_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d:
	.zero	8
	.weak	_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d
	.section	.bss._ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,"awG",@nobits,_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,comdat
	.align 8
	.type	_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, @gnu_unique_object
	.size	_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, 8
_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d:
	.zero	8
	.weak	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr, 8
_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr
	.section	.bss._ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr,comdat
	.align 32
	.type	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr, 48
_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr:
	.zero	48
	.weak	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name, 8
_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name
	.section	.bss._ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name,comdat
	.align 8
	.type	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name, 8
_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjtlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name:
	.zero	8
	.weak	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr, 8
_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr
	.section	.bss._ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr,comdat
	.align 32
	.type	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr, 48
_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr:
	.zero	48
	.weak	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name, 8
_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name
	.section	.bss._ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name,comdat
	.align 8
	.type	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name, 8
_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjjlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name:
	.zero	8
	.weak	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr, 8
_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr
	.section	.bss._ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr,comdat
	.align 32
	.type	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr, 48
_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_attr:
	.zero	48
	.weak	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name, 8
_ZGVZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name
	.section	.bss._ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name,comdat
	.align 8
	.type	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name, 8
_ZZN3cub17CUB_200700_890_NS15DeviceRadixSort9SortPairsIjhlEE9cudaErrorPvRmRNS0_12DoubleBufferIT_EERNS6_IT0_EET1_iiP11CUstream_stE21__cub_nvtx3_func_name:
	.zero	8
	.weak	_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, 8
_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache
	.section	.bss._ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,comdat
	.align 32
	.type	_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, 1536
_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache:
	.zero	1536
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata
	.type	_ZN6thrust20THRUST_200700_890_NSL6deviceE, @object
	.size	_ZN6thrust20THRUST_200700_890_NSL6deviceE, 1
_ZN6thrust20THRUST_200700_890_NSL6deviceE:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS6system3cppL3parE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS6system3cppL3parE, 1
_ZN6thrust20THRUST_200700_890_NS6system3cppL3parE:
	.zero	1
	.weak	_ZN4cuda3std3__420unreachable_sentinelE
	.section	.rodata._ZN4cuda3std3__420unreachable_sentinelE,"aG",@progbits,_ZN4cuda3std3__420unreachable_sentinelE,comdat
	.type	_ZN4cuda3std3__420unreachable_sentinelE, @gnu_unique_object
	.size	_ZN4cuda3std3__420unreachable_sentinelE, 1
_ZN4cuda3std3__420unreachable_sentinelE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo5crendE
	.section	.rodata._ZN4cuda3std3__45__cpo5crendE,"aG",@progbits,_ZN4cuda3std3__45__cpo5crendE,comdat
	.type	_ZN4cuda3std3__45__cpo5crendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo5crendE, 1
_ZN4cuda3std3__45__cpo5crendE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo7crbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo7crbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo7crbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo7crbeginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo7crbeginE, 1
_ZN4cuda3std3__45__cpo7crbeginE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo4rendE
	.section	.rodata._ZN4cuda3std3__45__cpo4rendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4rendE,comdat
	.type	_ZN4cuda3std3__45__cpo4rendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo4rendE, 1
_ZN4cuda3std3__45__cpo4rendE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo6rbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo6rbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6rbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo6rbeginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo6rbeginE, 1
_ZN4cuda3std3__45__cpo6rbeginE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo8distanceE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo8distanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo8distanceE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo8distanceE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo8distanceE, 1
_ZN4cuda3std6ranges3__45__cpo8distanceE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo5ssizeE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo5ssizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5ssizeE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo5ssizeE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo5ssizeE, 1
_ZN4cuda3std6ranges3__45__cpo5ssizeE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4sizeE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4sizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4sizeE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4sizeE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4sizeE, 1
_ZN4cuda3std6ranges3__45__cpo4sizeE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo5cdataE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo5cdataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5cdataE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo5cdataE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo5cdataE, 1
_ZN4cuda3std6ranges3__45__cpo5cdataE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4dataE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4dataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4dataE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4dataE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4dataE, 1
_ZN4cuda3std6ranges3__45__cpo4dataE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4prevE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4prevE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4prevE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4prevE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4prevE, 1
_ZN4cuda3std6ranges3__45__cpo4prevE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4nextE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4nextE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4nextE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4nextE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4nextE, 1
_ZN4cuda3std6ranges3__45__cpo4nextE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_swapE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_swapE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4cendE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4cendE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4cendE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4cendE, 1
_ZN4cuda3std6ranges3__45__cpo4cendE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo6cbeginE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo6cbeginE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo6cbeginE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo6cbeginE, 1
_ZN4cuda3std6ranges3__45__cpo6cbeginE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo3endE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo3endE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo3endE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo3endE, 1
_ZN4cuda3std6ranges3__45__cpo3endE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo5beginE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5beginE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo5beginE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo5beginE, 1
_ZN4cuda3std6ranges3__45__cpo5beginE:
	.zero	1
	.weak	_ZN4cuda3std3__47nulloptE
	.section	.rodata._ZN4cuda3std3__47nulloptE,"aG",@progbits,_ZN4cuda3std3__47nulloptE,comdat
	.type	_ZN4cuda3std3__47nulloptE, @gnu_unique_object
	.size	_ZN4cuda3std3__47nulloptE, 1
_ZN4cuda3std3__47nulloptE:
	.zero	1
	.hidden	InitializeInjectionNvtx2_fnptr
	.weak	InitializeInjectionNvtx2_fnptr
	.bss
	.align 8
	.type	InitializeInjectionNvtx2_fnptr, @object
	.size	InitializeInjectionNvtx2_fnptr, 8
InitializeInjectionNvtx2_fnptr:
	.zero	8
	.hidden	nvtxGlobals_v3
	.weak	nvtxGlobals_v3
	.section	.data.rel.local,"aw"
	.align 32
	.type	nvtxGlobals_v3, @object
	.size	nvtxGlobals_v3, 1168
nvtxGlobals_v3:
	.long	0
	.zero	4
	.quad	16
	.quad	nvtxEtiGetModuleFunctionTable_v3
	.quad	24
	.long	3
	.long	0
	.quad	nvtxEtiSetInjectionNvtxVersion_v3
	.quad	nvtxMarkEx_impl_init_v3
	.quad	nvtxMarkA_impl_init_v3
	.quad	nvtxMarkW_impl_init_v3
	.quad	nvtxRangeStartEx_impl_init_v3
	.quad	nvtxRangeStartA_impl_init_v3
	.quad	nvtxRangeStartW_impl_init_v3
	.quad	nvtxRangeEnd_impl_init_v3
	.quad	nvtxRangePushEx_impl_init_v3
	.quad	nvtxRangePushA_impl_init_v3
	.quad	nvtxRangePushW_impl_init_v3
	.quad	nvtxRangePop_impl_init_v3
	.quad	nvtxNameCategoryA_impl_init_v3
	.quad	nvtxNameCategoryW_impl_init_v3
	.quad	nvtxNameOsThreadA_impl_init_v3
	.quad	nvtxNameOsThreadW_impl_init_v3
	.quad	nvtxNameCuDeviceA_impl_init_v3
	.quad	nvtxNameCuDeviceW_impl_init_v3
	.quad	nvtxNameCuContextA_impl_init_v3
	.quad	nvtxNameCuContextW_impl_init_v3
	.quad	nvtxNameCuStreamA_impl_init_v3
	.quad	nvtxNameCuStreamW_impl_init_v3
	.quad	nvtxNameCuEventA_impl_init_v3
	.quad	nvtxNameCuEventW_impl_init_v3
	.quad	nvtxNameClDeviceA_impl_init_v3
	.quad	nvtxNameClDeviceW_impl_init_v3
	.quad	nvtxNameClContextA_impl_init_v3
	.quad	nvtxNameClContextW_impl_init_v3
	.quad	nvtxNameClCommandQueueA_impl_init_v3
	.quad	nvtxNameClCommandQueueW_impl_init_v3
	.quad	nvtxNameClMemObjectA_impl_init_v3
	.quad	nvtxNameClMemObjectW_impl_init_v3
	.quad	nvtxNameClSamplerA_impl_init_v3
	.quad	nvtxNameClSamplerW_impl_init_v3
	.quad	nvtxNameClProgramA_impl_init_v3
	.quad	nvtxNameClProgramW_impl_init_v3
	.quad	nvtxNameClEventA_impl_init_v3
	.quad	nvtxNameClEventW_impl_init_v3
	.quad	nvtxNameCudaDeviceA_impl_init_v3
	.quad	nvtxNameCudaDeviceW_impl_init_v3
	.quad	nvtxNameCudaStreamA_impl_init_v3
	.quad	nvtxNameCudaStreamW_impl_init_v3
	.quad	nvtxNameCudaEventA_impl_init_v3
	.quad	nvtxNameCudaEventW_impl_init_v3
	.quad	nvtxDomainMarkEx_impl_init_v3
	.quad	nvtxDomainRangeStartEx_impl_init_v3
	.quad	nvtxDomainRangeEnd_impl_init_v3
	.quad	nvtxDomainRangePushEx_impl_init_v3
	.quad	nvtxDomainRangePop_impl_init_v3
	.quad	nvtxDomainResourceCreate_impl_init_v3
	.quad	nvtxDomainResourceDestroy_impl_init_v3
	.quad	nvtxDomainNameCategoryA_impl_init_v3
	.quad	nvtxDomainNameCategoryW_impl_init_v3
	.quad	nvtxDomainRegisterStringA_impl_init_v3
	.quad	nvtxDomainRegisterStringW_impl_init_v3
	.quad	nvtxDomainCreateA_impl_init_v3
	.quad	nvtxDomainCreateW_impl_init_v3
	.quad	nvtxDomainDestroy_impl_init_v3
	.quad	nvtxInitialize_impl_init_v3
	.quad	nvtxDomainSyncUserCreate_impl_init_v3
	.quad	nvtxDomainSyncUserDestroy_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.quad	nvtxDomainSyncUserReleasing_impl_init_v3
	.quad	0
	.quad	nvtxGlobals_v3+48
	.quad	nvtxGlobals_v3+56
	.quad	nvtxGlobals_v3+64
	.quad	nvtxGlobals_v3+72
	.quad	nvtxGlobals_v3+80
	.quad	nvtxGlobals_v3+88
	.quad	nvtxGlobals_v3+96
	.quad	nvtxGlobals_v3+104
	.quad	nvtxGlobals_v3+112
	.quad	nvtxGlobals_v3+120
	.quad	nvtxGlobals_v3+128
	.quad	nvtxGlobals_v3+136
	.quad	nvtxGlobals_v3+144
	.quad	nvtxGlobals_v3+152
	.quad	nvtxGlobals_v3+160
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+168
	.quad	nvtxGlobals_v3+176
	.quad	nvtxGlobals_v3+184
	.quad	nvtxGlobals_v3+192
	.quad	nvtxGlobals_v3+200
	.quad	nvtxGlobals_v3+208
	.quad	nvtxGlobals_v3+216
	.quad	nvtxGlobals_v3+224
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+232
	.quad	nvtxGlobals_v3+240
	.quad	nvtxGlobals_v3+248
	.quad	nvtxGlobals_v3+256
	.quad	nvtxGlobals_v3+264
	.quad	nvtxGlobals_v3+272
	.quad	nvtxGlobals_v3+280
	.quad	nvtxGlobals_v3+288
	.quad	nvtxGlobals_v3+296
	.quad	nvtxGlobals_v3+304
	.quad	nvtxGlobals_v3+312
	.quad	nvtxGlobals_v3+320
	.quad	nvtxGlobals_v3+328
	.quad	nvtxGlobals_v3+336
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+344
	.quad	nvtxGlobals_v3+352
	.quad	nvtxGlobals_v3+360
	.quad	nvtxGlobals_v3+368
	.quad	nvtxGlobals_v3+376
	.quad	nvtxGlobals_v3+384
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+392
	.quad	nvtxGlobals_v3+400
	.quad	nvtxGlobals_v3+408
	.quad	nvtxGlobals_v3+416
	.quad	nvtxGlobals_v3+424
	.quad	nvtxGlobals_v3+432
	.quad	nvtxGlobals_v3+440
	.quad	nvtxGlobals_v3+448
	.quad	nvtxGlobals_v3+456
	.quad	nvtxGlobals_v3+464
	.quad	nvtxGlobals_v3+472
	.quad	nvtxGlobals_v3+480
	.quad	nvtxGlobals_v3+488
	.quad	nvtxGlobals_v3+496
	.quad	nvtxGlobals_v3+504
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+512
	.quad	nvtxGlobals_v3+520
	.quad	nvtxGlobals_v3+528
	.quad	nvtxGlobals_v3+536
	.quad	nvtxGlobals_v3+544
	.quad	nvtxGlobals_v3+552
	.quad	0
	.section	.rodata
	.type	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, 1
_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, 1
_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE:
	.zero	1
	.weak	_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result
	.section	.bss._ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,comdat
	.align 8
	.type	_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, @gnu_unique_object
	.size	_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, 8
_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result:
	.zero	8
	.weak	_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result
	.section	.bss._ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,"awG",@nobits,_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,comdat
	.align 8
	.type	_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, @gnu_unique_object
	.size	_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, 8
_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result:
	.zero	8
	.weak	_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result
	.section	.bss._ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,comdat
	.align 8
	.type	_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, @gnu_unique_object
	.size	_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, 8
_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result:
	.zero	8
	.weak	_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result
	.section	.bss._ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,"awG",@nobits,_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,comdat
	.align 8
	.type	_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, @gnu_unique_object
	.size	_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, 8
_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result:
	.zero	8
	.weak	_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result
	.section	.bss._ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,comdat
	.align 8
	.type	_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, @gnu_unique_object
	.size	_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, 8
_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result:
	.zero	8
	.weak	_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result
	.section	.bss._ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,"awG",@nobits,_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,comdat
	.align 8
	.type	_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, @gnu_unique_object
	.size	_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, 8
_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result:
	.zero	8
	.weak	_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err
	.section	.bss._ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,"awG",@nobits,_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,comdat
	.align 8
	.type	_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, @gnu_unique_object
	.size	_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, 8
_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err:
	.zero	8
	.weak	_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err
	.section	.bss._ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,"awG",@nobits,_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,comdat
	.align 32
	.type	_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, @gnu_unique_object
	.size	_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, 32
_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err:
	.zero	32
	.section	.rodata
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E, 1
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	.weak	_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, 8
_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count
	.section	.bss._ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,comdat
	.align 4
	.type	_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, 4
_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count:
	.zero	4
	.section	.rodata
	.type	_ZN6thrust20THRUST_200700_890_NSL3seqE, @object
	.size	_ZN6thrust20THRUST_200700_890_NSL3seqE, 1
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	.weak	_ZN4cuda3std6ranges3__45__cpo7advanceE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo7advanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo7advanceE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo7advanceE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo7advanceE, 1
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	.weak	_ZN4cuda3std3__466_GLOBAL__N__f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756ignoreE
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	.size	_ZN4cuda3std3__466_GLOBAL__N__f40d8ea7_25_par_huffman_sortbyfreq_cu_3549e58c_27422756ignoreE, 1
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	.zero	1
	.weak	_ZN4cuda3std3__48in_placeE
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	.type	_ZN4cuda3std3__48in_placeE, @gnu_unique_object
	.size	_ZN4cuda3std3__48in_placeE, 1
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	.weak	_ZN4cuda3std3__45__cpo4cendE
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_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.hidden	__dso_handle
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdint>
#include <thrust/device_vector.h>
#include <thrust/sort.h>

template <typename K, typename V> void SortByFreq(K *freq, V *qcode, int size) {
  using namespace thrust;
  sort_by_key(device_ptr<K>(freq),        //
              device_ptr<K>(freq + size), //
              device_ptr<V>(qcode));
}

template void SortByFreq<unsigned int, uint8_t>(unsigned int *, uint8_t *, int);
template void SortByFreq<unsigned int, uint16_t>(unsigned int *, uint16_t *,
                                                 int);
template void SortByFreq<unsigned int, uint32_t>(unsigned int *, uint32_t *,
                                                 int);

	.text
	.file	"par_huffman_sortbyfreq.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.text._Z10SortByFreqIjhEvPT_PT0_i,"axG",@progbits,_Z10SortByFreqIjhEvPT_PT0_i,comdat
	.weak	_Z10SortByFreqIjhEvPT_PT0_i     # -- Begin function _Z10SortByFreqIjhEvPT_PT0_i
	.type	_Z10SortByFreqIjhEvPT_PT0_i,@function
_Z10SortByFreqIjhEvPT_PT0_i:            # @_Z10SortByFreqIjhEvPT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rcx
	movq	%rdi, %rsi
	movslq	%edx, %rax
	leaq	(%rdi,%rax,4), %rdx
	leaq	7(%rsp), %rdi
	callq	_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_IhEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z10SortByFreqIjhEvPT_PT0_i, .Lfunc_end0-_Z10SortByFreqIjhEvPT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z10SortByFreqIjtEvPT_PT0_i,"axG",@progbits,_Z10SortByFreqIjtEvPT_PT0_i,comdat
	.weak	_Z10SortByFreqIjtEvPT_PT0_i     # -- Begin function _Z10SortByFreqIjtEvPT_PT0_i
	.type	_Z10SortByFreqIjtEvPT_PT0_i,@function
_Z10SortByFreqIjtEvPT_PT0_i:            # @_Z10SortByFreqIjtEvPT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rcx
	movq	%rdi, %rsi
	movslq	%edx, %rax
	leaq	(%rdi,%rax,4), %rdx
	leaq	7(%rsp), %rdi
	callq	_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_ItEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z10SortByFreqIjtEvPT_PT0_i, .Lfunc_end1-_Z10SortByFreqIjtEvPT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z10SortByFreqIjjEvPT_PT0_i,"axG",@progbits,_Z10SortByFreqIjjEvPT_PT0_i,comdat
	.weak	_Z10SortByFreqIjjEvPT_PT0_i     # -- Begin function _Z10SortByFreqIjjEvPT_PT0_i
	.type	_Z10SortByFreqIjjEvPT_PT0_i,@function
_Z10SortByFreqIjjEvPT_PT0_i:            # @_Z10SortByFreqIjjEvPT_PT0_i
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rcx
	movq	%rdi, %rsi
	movslq	%edx, %rax
	leaq	(%rdi,%rax,4), %rdx
	leaq	7(%rsp), %rdi
	callq	_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEES4_NS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SB_T1_T2_EN10workaround3parERNS7_IS2_EES4_S4_S4_S6_
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z10SortByFreqIjjEvPT_PT0_i, .Lfunc_end2-_Z10SortByFreqIjjEvPT_PT0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_IhEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_,"axG",@progbits,_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_IhEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_,comdat
	.weak	_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_IhEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_ # -- Begin function _ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_IhEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_
	.p2align	1, 0x90
	.type	_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_IhEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_,@function
_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_IhEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_: # @_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_IhEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r13
	subq	%rdx, %r13
	je	.LBB3_28
# %bb.1:
	movq	%rcx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	shrq	$2, %r13
	xorl	%eax, %eax
	leaq	8(%rsp), %rsi
	movq	%rax, (%rsi)
	negl	%r13d
	.cfi_escape 0x2e, 0x40
	leaq	16(%rsp), %r10
	xorl	%edi, %edi
	movq	%r14, %rdx
	xorl	%ecx, %ecx
	movq	%r14, %r8
	movq	%rbx, %r9
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	$32
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
	movl	%eax, %ebp
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
	testl	%ebp, %ebp
	jne	.LBB3_2
# %bb.7:                                # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit.i.i
	movq	8(%rsp), %r12
	movq	%r15, 16(%rsp)
	xorl	%r15d, %r15d
	xorps	%xmm0, %xmm0
	movups	%xmm0, 24(%rsp)
	testq	%r12, %r12
	je	.LBB3_8
# %bb.9:                                # %.noexc.i.i.i.i
	.cfi_escape 0x2e, 0x00
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm
	movq	%rax, %rdi
	jmp	.LBB3_10
.LBB3_8:
	xorl	%edi, %edi
.LBB3_10:
	movq	%rdi, 24(%rsp)
	movq	%r12, 32(%rsp)
.Ltmp5:
	.cfi_escape 0x2e, 0x40
	leaq	7(%rsp), %rax
	leaq	8(%rsp), %rsi
	movq	%r14, %rdx
	xorl	%ecx, %ecx
	movq	%r14, %r8
	movq	%rbx, %r9
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	$32
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.Ltmp6:
# %bb.11:
.Ltmp7:
	movl	%eax, %ebp
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp8:
# %bb.12:                               # %.noexc.i.i
	testl	%ebp, %ebp
	jne	.LBB3_13
# %bb.17:                               # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit27.i.i
.Ltmp14:
	.cfi_escape 0x2e, 0x00
	xorl	%edi, %edi
	callq	hipStreamSynchronize
.Ltmp15:
# %bb.18:                               # %_ZN6thrust11hip_rocprim20synchronize_optionalINS0_16execution_policyINS0_3tagEEEEE10hipError_tRT_.exit.i.i
.Ltmp16:
	movl	%eax, %ebp
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp17:
# %bb.19:                               # %.noexc30.i.i
	testl	%ebp, %ebp
	jne	.LBB3_20
# %bb.27:                               # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit34.i.i
	.cfi_escape 0x2e, 0x00
	leaq	16(%rsp), %rdi
	callq	_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev
.LBB3_28:                               # %_ZN6thrust11hip_rocprim12__smart_sort10smart_sortINS_6detail17integral_constantIbLb1EEENS0_3tagENS_10device_ptrIjEENS7_IhEENS_4lessIjEEEENS1_24enable_if_primitive_sortIT1_T3_E4typeERNS0_16execution_policyIT0_EESD_SD_T2_SE_.exit
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_2:
	.cfi_def_cfa_offset 96
	.cfi_escape 0x2e, 0x00
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp0:
	.cfi_escape 0x2e, 0x00
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp1:
# %bb.3:
.Ltmp2:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movq	%rax, %rdx
	callq	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
.Ltmp3:
# %bb.4:
	.cfi_escape 0x2e, 0x00
	movl	$_ZTIN6thrust6system12system_errorE, %esi
	movl	$_ZN6thrust6system12system_errorD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB3_13:
	.cfi_escape 0x2e, 0x00
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp9:
	.cfi_escape 0x2e, 0x00
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp10:
# %bb.14:
.Ltmp11:
	movq	%rax, %r14
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.1, %esi
	movq	%rbx, %rdi
	callq	_ZNSt13runtime_errorC2EPKc
.Ltmp12:
	jmp	.LBB3_22
.LBB3_20:
	.cfi_escape 0x2e, 0x00
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp18:
	.cfi_escape 0x2e, 0x00
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp19:
# %bb.21:
.Ltmp20:
	movq	%rax, %r14
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	callq	_ZNSt13runtime_errorC2EPKc
.Ltmp21:
.LBB3_22:
	movq	$_ZTVN6thrust6system12system_errorE+16, (%rbx)
	movl	%ebp, 16(%rbx)
	movq	%r14, 24(%rbx)
	movq	%rbx, %rax
	addq	$48, %rax
	movq	%rax, 32(%rbx)
	movq	$0, 40(%rbx)
	movb	$0, 48(%rbx)
.Ltmp23:
	.cfi_escape 0x2e, 0x00
	movl	$_ZTIN6thrust6system12system_errorE, %esi
	movl	$_ZN6thrust6system12system_errorD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.Ltmp24:
# %bb.23:                               # %.cont.i.i
.LBB3_24:
.Ltmp22:
	jmp	.LBB3_16
.LBB3_15:
.Ltmp13:
.LBB3_16:                               # %.body.i.i
	movq	%rax, %r14
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	jmp	.LBB3_26
.LBB3_5:
.Ltmp4:
	movq	%rax, %r14
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	jmp	.LBB3_6
.LBB3_25:
.Ltmp25:
	movq	%rax, %r14
.LBB3_26:                               # %.body.i.i
	.cfi_escape 0x2e, 0x00
	leaq	16(%rsp), %rdi
	callq	_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev
.LBB3_6:                                # %common.resume.i.i
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end3:
	.size	_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_IhEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_, .Lfunc_end3-_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_IhEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_
	.cfi_endproc
	.section	.gcc_except_table._ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_IhEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_,"aG",@progbits,_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_IhEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_,comdat
	.p2align	2, 0x0
GCC_except_table3:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp5-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp5
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp5-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp17-.Ltmp5                 #   Call between .Ltmp5 and .Ltmp17
	.uleb128 .Ltmp25-.Lfunc_begin0          #     jumps to .Ltmp25
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp17-.Lfunc_begin0          # >> Call Site 3 <<
	.uleb128 .Ltmp0-.Ltmp17                 #   Call between .Ltmp17 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp3-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp3
	.uleb128 .Ltmp4-.Lfunc_begin0           #     jumps to .Ltmp4
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp9-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp9
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 6 <<
	.uleb128 .Ltmp12-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp12
	.uleb128 .Ltmp13-.Lfunc_begin0          #     jumps to .Ltmp13
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp18-.Ltmp12                #   Call between .Ltmp12 and .Ltmp18
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp18-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp21-.Ltmp18                #   Call between .Ltmp18 and .Ltmp21
	.uleb128 .Ltmp22-.Lfunc_begin0          #     jumps to .Ltmp22
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp23-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp24-.Ltmp23                #   Call between .Ltmp23 and .Ltmp24
	.uleb128 .Ltmp25-.Lfunc_begin0          #     jumps to .Ltmp25
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp24-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Lfunc_end3-.Ltmp24            #   Call between .Ltmp24 and .Lfunc_end3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb # -- Begin function _ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,@function
_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb: # @_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movb	120(%rsp), %bpl
	movq	112(%rsp), %r15
	movl	104(%rsp), %r14d
	movl	96(%rsp), %ebx
	movq	88(%rsp), %r12
	movl	80(%rsp), %r10d
	movq	72(%rsp), %rax
	movq	64(%rsp), %r11
	movl	$1024, %r13d                    # imm = 0x400
	movl	%r13d, 4(%rsp)
	cmpl	%r13d, %r10d
	ja	.LBB4_5
# %bb.1:
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.3:
	movb	$1, (%r12)
	testl	%r10d, %r10d
	je	.LBB4_4
# %bb.8:
	movzbl	%bpl, %r12d
	leaq	4(%rsp), %r11
	movq	%rdx, %rdi
	movq	%r8, %rsi
	movq	%r9, %rdx
	movq	%rax, %rcx
	movl	%r10d, %r8d
	movq	%r11, %r9
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_IhEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	jmp	.LBB4_9
.LBB4_5:
	cmpl	$1048576, %r10d                 # imm = 0x100000
	ja	.LBB4_7
# %bb.6:
	movb	$1, (%r12)
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movzbl	%bpl, %r12d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	jmp	.LBB4_10
.LBB4_7:
	.cfi_def_cfa_offset 64
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb # TAILCALL
.LBB4_2:
	.cfi_def_cfa_offset 64
	movq	$256, (%rsi)                    # imm = 0x100
.LBB4_4:
	xorl	%eax, %eax
.LBB4_9:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
.LBB4_10:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb, .Lfunc_end4-_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_IhEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
.LCPI5_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI5_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_IhEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_IhEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_IhEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_IhEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb,@function
_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_IhEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb: # @_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_IhEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 1568
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r14
	movl	%r8d, %r15d
	movq	%rcx, %rbp
	movq	%rdx, 24(%rsp)                  # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %r13
	movq	1584(%rsp), %rbx
	testq	$-3, %rbx
	jne	.LBB5_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	12(%rsp), %rdi
	callq	hipGetDevice
	testl	%eax, %eax
	jne	.LBB5_43
# %bb.4:                                # %thread-pre-split.i
	movl	12(%rsp), %esi
	jmp	.LBB5_5
.LBB5_1:
	movq	%rbx, %rdi
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 12(%rsp)
	testl	%eax, %eax
	js	.LBB5_2
.LBB5_5:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB5_43
# %bb.6:
	movq	%rbp, 16(%rsp)                  # 8-byte Spill
	movl	%esi, %ebp
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbp,4), %eax
	testl	%eax, %eax
	je	.LBB5_7
.LBB5_9:
	movl	1576(%rsp), %ecx
	movl	$1024, (%r14)                   # imm = 0x400
	movl	%r15d, %ebp
	shrl	$10, %ebp
	movl	%r15d, %eax
	andl	$1023, %eax                     # imm = 0x3FF
	cmpl	$1, %eax
	sbbl	$-1, %ebp
	subl	1568(%rsp), %ecx
	movl	%ecx, 8(%rsp)                   # 4-byte Spill
	cmpb	$0, 1592(%rsp)
	je	.LBB5_10
# %bb.11:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 40(%rsp)
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	cmpq	$0, _ZSt4cout+16(%rax)
	je	.LBB5_13
# %bb.12:
	leaq	40(%rsp), %rsi
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB5_14
.LBB5_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB5_43
.LBB5_10:                               # %..critedge_crit_edge
	movl	%ebp, %r14d
	xorl	%eax, %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	16(%rsp), %rbp                  # 8-byte Reload
	jmp	.LBB5_33
.LBB5_7:
	leaq	40(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB5_43
# %bb.8:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread96
	leaq	1200(%rsp), %rdi
	leaq	1456(%rsp), %rsi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	leaq	1200(%rsp), %rdi
	subq	%rdi, %rax
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	xchgl	%eax, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbp,4)
	jmp	.LBB5_9
.LBB5_13:
	movl	$_ZSt4cout, %edi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB5_14:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB5_16
# %bb.15:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB5_17
.LBB5_16:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB5_17:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit65
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$256, %esi                      # imm = 0x100
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB5_19
# %bb.18:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB5_20
.LBB5_19:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB5_20:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit68
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$4, %esi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB5_22
# %bb.21:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB5_23
.LBB5_22:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB5_23:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit71
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	(%r14), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB5_25
# %bb.24:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB5_26
.LBB5_25:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB5_26:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit74
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %r14d
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB5_28
# %bb.27:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB5_29
.LBB5_28:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB5_29:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit77
	movq	16(%rsp), %rbp                  # 8-byte Reload
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	8(%rsp), %esi                   # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB5_31
# %bb.30:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB5_32
.LBB5_31:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB5_32:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit80
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 32(%rsp)                  # 8-byte Spill
.LBB5_33:                               # %.critedge
	btsq	$32, %r14
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%rbx, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_35
# %bb.34:
	movl	8(%rsp), %eax                   # 4-byte Reload
	movl	%eax, (%rsp)
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movq	%rbp, %rcx
	movl	%r15d, %r8d
	movl	1568(%rsp), %r9d
	callq	_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
.LBB5_35:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB5_41
# %bb.36:
	cmpb	$0, 1592(%rsp)
	je	.LBB5_41
# %bb.37:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB5_43
# %bb.38:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	32(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI5_0(%rip), %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI5_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 40(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB5_40
# %bb.39:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB5_42
.LBB5_41:                               # %.critedge57
	testl	%eax, %eax
	jne	.LBB5_43
	jmp	.LBB5_42
.LBB5_40:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB5_42:
	xorl	%eax, %eax
.LBB5_43:                               # %.critedge57.thread101
	addq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_IhEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb, .Lfunc_end5-_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_IhEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb # -- Begin function _ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb,@function
_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb: # @_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r14
	movq	%rcx, %rbx
	movq	%rsi, %r15
	movq	%rdi, %r13
	movb	128(%rsp), %r8b
	movq	120(%rsp), %rsi
	movl	112(%rsp), %r10d
	movl	104(%rsp), %r11d
	movl	96(%rsp), %ebp
	movq	88(%rsp), %rcx
	movq	80(%rsp), %rdi
	movl	%r10d, %r12d
	subl	%r11d, %r12d
	movl	$1024, 4(%rsp)                  # imm = 0x400
	testq	%r13, %r13
	je	.LBB6_1
# %bb.2:
	xorl	%eax, %eax
	testl	%ebp, %ebp
	je	.LBB6_6
# %bb.3:
	movq	%rbx, 8(%rsp)                   # 8-byte Spill
	movzbl	%r8b, %ebx
	movq	%rdx, %rdi
	movq	%rsi, %rax
	movq	%r14, %rsi
	movq	%r9, %rdx
	movl	%ebp, %r8d
	leaq	4(%rsp), %r9
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_IhEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	testl	%eax, %eax
	jne	.LBB6_6
# %bb.4:
	movl	4(%rsp), %r9d
	movl	$0, %eax
	cmpl	%ebp, %r9d
	jae	.LBB6_6
# %bb.5:
	movq	%r13, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	88(%rsp), %rcx
	movl	%ebp, %r8d
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	movl	144(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB6_6:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	jmp	.LBB6_7
.LBB6_1:
	.cfi_def_cfa_offset 80
	movzbl	%r8b, %eax
	movq	%rdi, %r13
	xorl	%edi, %edi
	movq	%rsi, %r10
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebp, %r8d
	movl	$1024, %r9d                     # imm = 0x400
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
.LBB6_7:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb, .Lfunc_end6-_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb # -- Begin function _ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,@function
_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb: # @_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1704, %rsp                     # imm = 0x6A8
	.cfi_def_cfa_offset 1760
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %rbp
	movq	%rcx, %r15
	movq	%rdx, %r13
	movq	%rsi, %r14
	movq	%rdi, %r12
	movq	1808(%rsp), %rdi
	testq	$-3, %rdi
	jne	.LBB7_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	16(%rsp), %rdi
	callq	hipGetDevice
	testl	%eax, %eax
	jne	.LBB7_35
# %bb.4:                                # %thread-pre-split.i
	movl	16(%rsp), %esi
	jmp	.LBB7_5
.LBB7_1:
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 16(%rsp)
	testl	%eax, %eax
	js	.LBB7_2
.LBB7_5:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB7_35
# %bb.6:
	movq	%r13, 32(%rsp)                  # 8-byte Spill
	movl	%esi, %r13d
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r13,4), %eax
	testl	%eax, %eax
	je	.LBB7_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread199
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	movq	%rbp, 56(%rsp)                  # 8-byte Spill
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
.LBB7_10:
	movl	1800(%rsp), %ebp
	movl	1792(%rsp), %r15d
	movl	1776(%rsp), %r13d
	leaq	232(%rsp), %rbx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEEEDaNS0_11target_archE
	movl	16(%rbx), %esi
	movl	24(%rbx), %ecx
	movl	$1, %r10d
	shlq	%cl, %r10
	imull	12(%rbx), %esi
	movl	$1073741824, %eax               # imm = 0x40000000
	xorl	%edx, %edx
	divl	%esi
	movl	%edx, %r8d
	movl	%ebp, %eax
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	subl	%r15d, %eax
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %r9d
	movl	$1073741824, %eax               # imm = 0x40000000
	xorl	%edi, %edi
	subl	%r8d, %eax
	cmpl	$1, %edx
	sbbl	$-1, %r9d
	movl	%r9d, 12(%rsp)                  # 4-byte Spill
	movl	%r9d, %ebp
	shll	%cl, %ebp
	cmpl	%eax, %r13d
	cmovbl	%r13d, %eax
	xorl	%edx, %edx
	divl	%esi
	movl	%eax, %ebx
	cmpl	$1, %edx
	sbbl	$-1, %ebx
	movl	%ecx, 52(%rsp)                  # 4-byte Spill
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %ebx
	movl	%r13d, %r13d
	leaq	(,%rbp,4), %rax
	leaq	16(%rsp), %rcx
	leaq	112(%rsp), %rsi
	movq	%rcx, (%rsi)
	movq	%rax, 8(%rsi)
	movl	$4, %eax
	movq	%rax, 16(%rsi)
	leaq	104(%rsp), %rcx
	movq	%rcx, 24(%rsi)
	movq	%r10, %r15
	leaq	(,%r10,4), %rcx
	movq	%rcx, 32(%rsi)
	movq	%rax, 40(%rsi)
	leaq	96(%rsp), %rcx
	movq	%rcx, 48(%rsi)
	leaq	(,%rbx,4), %rcx
	cmpq	$0, 40(%rsp)                    # 8-byte Folded Reload
	cmoveq	%r13, %rdi
	movq	%rcx, 56(%rsi)
	movq	%rax, 64(%rsi)
	leaq	88(%rsp), %rcx
	movq	%rcx, 72(%rsi)
	leaq	(,%rdi,4), %rcx
	movq	%rcx, 80(%rsi)
	movq	%rax, 88(%rsi)
	leaq	80(%rsp), %rax
	movq	%rax, 96(%rsi)
	movq	%rdi, 104(%rsi)
	movl	$1, %eax
	movq	%rax, 112(%rsi)
	subq	$128, %rsp
	.cfi_adjust_cfa_offset 128
	movl	$15, %ecx
	movq	%rsp, %rdi
	rep;movsq (%rsi), %es:(%rdi)
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEEE10hipError_tPvRmT_
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	testq	%r12, %r12
	je	.LBB7_35
# %bb.11:
	testl	%eax, %eax
	jne	.LBB7_35
# %bb.12:
	xorl	%eax, %eax
	movl	1776(%rsp), %ecx
	testl	%ecx, %ecx
	je	.LBB7_35
# %bb.13:
	movq	%r13, %r14
	movb	1816(%rsp), %r12b
	testb	%r12b, %r12b
	je	.LBB7_27
# %bb.14:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.43, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 11(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB7_16
# %bb.15:
	leaq	11(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB7_17
.LBB7_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB7_35
.LBB7_8:
	leaq	232(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB7_35
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread204
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	movq	%rbp, 56(%rsp)                  # 8-byte Spill
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
	leaq	1392(%rsp), %rbx
	leaq	1648(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%rbx, %rax
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %ecx
	xchgl	%ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r13,4)
	jmp	.LBB7_10
.LBB7_16:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB7_17:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.44, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	12(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 11(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB7_19
# %bb.18:
	leaq	11(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB7_20
.LBB7_19:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB7_20:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit161
	movl	$_ZSt4cout, %edi
	movl	$.L.str.45, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbp, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 11(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB7_22
# %bb.21:
	leaq	11(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB7_23
.LBB7_22:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB7_23:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit164
	movl	$_ZSt4cout, %edi
	movl	$.L.str.46, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbx, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 11(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB7_25
# %bb.24:
	leaq	11(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB7_26
.LBB7_25:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB7_26:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit167
	movq	1808(%rsp), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB7_35
.LBB7_27:
	movq	16(%rsp), %rdx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movzbl	%r12b, %ebx
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movl	1784(%rsp), %ecx
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	20(%rsp), %r8d                  # 4-byte Reload
	movl	1800(%rsp), %r9d
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	1824(%rsp)
	.cfi_adjust_cfa_offset 8
	movl	1824(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	testl	%eax, %eax
	je	.LBB7_28
.LBB7_35:
	addq	$1704, %rsp                     # imm = 0x6A8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB7_28:
	.cfi_def_cfa_offset 1760
	movq	40(%rsp), %r15                  # 8-byte Reload
	testq	%r15, %r15
	movq	88(%rsp), %rsi
	movq	80(%rsp), %r13
	movq	1760(%rsp), %rax
	cmoveq	%r13, %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	cmoveq	%rsi, %r15
	setne	%bpl
	testb	$1, 12(%rsp)                    # 1-byte Folded Reload
	sete	%r12b
	orb	%bpl, %r12b
	je	.LBB7_29
.LBB7_31:
	movl	$0, %eax
	movl	1800(%rsp), %ecx
	movl	1792(%rsp), %edx
	cmpl	%edx, %ecx
	jbe	.LBB7_35
# %bb.32:                               # %.lr.ph.preheader
	orb	12(%rsp), %bpl                  # 1-byte Folded Reload
	xorl	%r13d, %r13d
	movl	%r12d, %eax
.LBB7_33:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%r13d, %r10d
	movl	52(%rsp), %ecx                  # 4-byte Reload
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %r10d
	shlq	$2, %r10
	addq	16(%rsp), %r10
	movzbl	%bpl, %r11d
	andl	$1, %r11d
	movzbl	%al, %eax
	andl	$1, %eax
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rsi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movq	72(%rsp), %r8                   # 8-byte Reload
	movq	1768(%rsp), %r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	1816(%rsp)
	.cfi_adjust_cfa_offset 8
	movl	1816(%rsp), %r12d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	movq	88(%rsp), %r14                  # 8-byte Reload
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	160(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	movl	1848(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	testl	%eax, %eax
	jne	.LBB7_35
# %bb.34:                               #   in Loop: Header=BB7_33 Depth=1
	movl	%ebp, %eax
	andb	$1, %al
	movq	1784(%rsp), %rcx
	movb	%al, (%rcx)
	addl	256(%rsp), %r14d
	xorb	$1, %bpl
	incl	%r13d
	xorl	%eax, %eax
	movq	%r14, 64(%rsp)                  # 8-byte Spill
	cmpl	%r12d, %r14d
	jb	.LBB7_33
	jmp	.LBB7_35
.LBB7_29:
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movq	1808(%rsp), %rcx
	movl	%ebx, %r8d
	callq	_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIjEEPjNS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	testl	%eax, %eax
	jne	.LBB7_35
# %bb.30:
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	%r13, %rsi
	movq	%r14, %rdx
	movq	1808(%rsp), %rcx
	movl	%ebx, %r8d
	callq	_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIhEEPhNS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	testl	%eax, %eax
	jne	.LBB7_35
	jmp	.LBB7_31
.Lfunc_end7:
	.size	_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb, .Lfunc_end7-_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,"axG",@progbits,_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,comdat
	.weak	_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj # -- Begin function _ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.type	_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,@function
_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj: # @_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj, .Lfunc_end8-_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _ZN7rocprim6detail25get_target_arch_from_nameEPKcm
.LCPI9_0:
	.long	803                             # 0x323
	.long	900                             # 0x384
	.long	906                             # 0x38a
	.long	908                             # 0x38c
.LCPI9_1:
	.long	910                             # 0x38e
	.long	1030                            # 0x406
	.long	1100                            # 0x44c
	.long	1102                            # 0x44e
	.section	.text._ZN7rocprim6detail25get_target_arch_from_nameEPKcm,"axG",@progbits,_ZN7rocprim6detail25get_target_arch_from_nameEPKcm,comdat
	.weak	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	.type	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm,@function
_ZN7rocprim6detail25get_target_arch_from_nameEPKcm: # @_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	.cfi_startproc
# %bb.0:
	movq	$.L.str.15, -104(%rsp)
	movq	$.L.str.16, -96(%rsp)
	movq	$.L.str.17, -88(%rsp)
	movq	$.L.str.18, -80(%rsp)
	movq	$.L.str.19, -72(%rsp)
	movq	$.L.str.20, -64(%rsp)
	movq	$.L.str.21, -56(%rsp)
	movq	$.L.str.22, -48(%rsp)
	movaps	.LCPI9_0(%rip), %xmm0           # xmm0 = [803,900,906,908]
	movaps	%xmm0, -40(%rsp)
	movaps	.LCPI9_1(%rip), %xmm0           # xmm0 = [910,1030,1100,1102]
	movaps	%xmm0, -24(%rsp)
	xorl	%eax, %eax
.LBB9_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB9_4 Depth 2
	movq	-104(%rsp,%rax,8), %rcx
	testq	%rsi, %rsi
	je	.LBB9_2
# %bb.3:                                # %.lr.ph.preheader.i
                                        #   in Loop: Header=BB9_1 Depth=1
	leaq	(%rcx,%rsi), %r8
	xorl	%edx, %edx
.LBB9_4:                                # %.lr.ph.i
                                        #   Parent Loop BB9_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movb	(%rcx,%rdx), %r9b
	testb	%r9b, %r9b
	je	.LBB9_7
# %bb.5:                                # %.lr.ph.i
                                        #   in Loop: Header=BB9_4 Depth=2
	cmpb	(%rdi,%rdx), %r9b
	jne	.LBB9_7
# %bb.6:                                #   in Loop: Header=BB9_4 Depth=2
	incq	%rdx
	cmpq	%rdx, %rsi
	jne	.LBB9_4
	jmp	.LBB9_9
.LBB9_2:                                #   in Loop: Header=BB9_1 Depth=1
	xorl	%edx, %edx
	jmp	.LBB9_8
.LBB9_7:                                # %._crit_edge.i.loopexit
                                        #   in Loop: Header=BB9_1 Depth=1
	addq	%rdx, %rcx
.LBB9_8:                                # %._crit_edge.i
                                        #   in Loop: Header=BB9_1 Depth=1
	movq	%rcx, %r8
	cmpq	%rsi, %rdx
	jne	.LBB9_11
.LBB9_9:                                # %_ZN7rocprim6detail13prefix_equalsEPKcS2_m.exit
                                        #   in Loop: Header=BB9_1 Depth=1
	cmpb	$0, (%r8)
	je	.LBB9_10
.LBB9_11:                               # %_ZN7rocprim6detail13prefix_equalsEPKcS2_m.exit.thread
                                        #   in Loop: Header=BB9_1 Depth=1
	incq	%rax
	cmpq	$8, %rax
	jne	.LBB9_1
# %bb.12:
	movl	$-1, %eax
	retq
.LBB9_10:
	movl	-40(%rsp,%rax,4), %eax
	retq
.Lfunc_end9:
	.size	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm, .Lfunc_end9-_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag,"axG",@progbits,_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag,comdat
	.weak	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag # -- Begin function _ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	.type	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag,@function
_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag: # @_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	.cfi_startproc
# %bb.0:
	movq	%rdi, %rax
	movq	%rsi, %rcx
	subq	%rdi, %rcx
	movq	%rcx, %rdx
	sarq	$2, %rdx
	testq	%rdx, %rdx
	jle	.LBB10_12
# %bb.1:                                # %.lr.ph.preheader
	andq	$-4, %rcx
	addq	%rax, %rcx
	incq	%rdx
	addq	$3, %rax
.LBB10_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movzbl	-3(%rax), %edi
	testl	%edi, %edi
	je	.LBB10_26
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB10_2 Depth=1
	cmpl	$58, %edi
	je	.LBB10_26
# %bb.4:                                #   in Loop: Header=BB10_2 Depth=1
	movzbl	-2(%rax), %edi
	testl	%edi, %edi
	je	.LBB10_24
# %bb.5:                                #   in Loop: Header=BB10_2 Depth=1
	cmpl	$58, %edi
	je	.LBB10_24
# %bb.6:                                #   in Loop: Header=BB10_2 Depth=1
	movzbl	-1(%rax), %edi
	testl	%edi, %edi
	je	.LBB10_25
# %bb.7:                                #   in Loop: Header=BB10_2 Depth=1
	cmpl	$58, %edi
	je	.LBB10_25
# %bb.8:                                #   in Loop: Header=BB10_2 Depth=1
	movzbl	(%rax), %edi
	testl	%edi, %edi
	je	.LBB10_27
# %bb.9:                                #   in Loop: Header=BB10_2 Depth=1
	cmpl	$58, %edi
	je	.LBB10_27
# %bb.10:                               #   in Loop: Header=BB10_2 Depth=1
	decq	%rdx
	addq	$4, %rax
	cmpq	$1, %rdx
	jg	.LBB10_2
# %bb.11:                               # %._crit_edge.loopexit
	movq	%rcx, %rax
.LBB10_12:                              # %._crit_edge
	movq	%rsi, %rcx
	subq	%rax, %rcx
	cmpq	$1, %rcx
	je	.LBB10_21
# %bb.13:                               # %._crit_edge
	cmpq	$2, %rcx
	je	.LBB10_18
# %bb.14:                               # %._crit_edge
	cmpq	$3, %rcx
	jne	.LBB10_23
# %bb.15:
	movzbl	(%rax), %ecx
	testl	%ecx, %ecx
	je	.LBB10_27
# %bb.16:
	cmpl	$58, %ecx
	je	.LBB10_27
# %bb.17:
	incq	%rax
.LBB10_18:
	movzbl	(%rax), %ecx
	testl	%ecx, %ecx
	je	.LBB10_27
# %bb.19:
	cmpl	$58, %ecx
	je	.LBB10_27
# %bb.20:
	incq	%rax
.LBB10_21:
	movzbl	(%rax), %ecx
	testl	%ecx, %ecx
	je	.LBB10_27
# %bb.22:
	cmpl	$58, %ecx
	je	.LBB10_27
.LBB10_23:
	movq	%rsi, %rax
	retq
.LBB10_26:                              # %.loopexit.loopexit
	addq	$-3, %rax
.LBB10_27:                              # %.loopexit
	retq
.LBB10_24:                              # %.loopexit.loopexit.split.loop.exit
	addq	$-2, %rax
	retq
.LBB10_25:                              # %.loopexit.loopexit.split.loop.exit52
	decq	%rax
	retq
.Lfunc_end10:
	.size	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag, .Lfunc_end10-_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end11:
	.size	__clang_call_terminate, .Lfunc_end11-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv,"axG",@progbits,_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv,comdat
	.weak	_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv # -- Begin function _ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv
	.type	_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv,@function
_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv: # @_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv, .Lfunc_end12-_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE,"axG",@progbits,_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE,comdat
	.weak	_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE # -- Begin function _ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE
	.type	_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE,@function
_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE: # @_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %rax
	movq	88(%rsp), %r14
	movq	80(%rsp), %rbx
	movb	72(%rsp), %bpl
	movq	64(%rsp), %r11
	movl	56(%rsp), %ecx
	cmpl	$32, %ecx
	jne	.LBB13_3
# %bb.1:
	movzbl	%bpl, %r10d
	movq	%rax, %rcx
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	jmp	.LBB13_2
.LBB13_3:
	movl	48(%rsp), %r10d
	addl	%r10d, %ecx
	movl	$-1, %r15d
	movl	$-1, %r12d
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %r12d
	movl	%r10d, %ecx
	shll	%cl, %r15d
	xorl	%r12d, %r15d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movzbl	%bpl, %r10d
	movq	%rax, %rcx
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB13_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE, .Lfunc_end13-_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE,"axG",@progbits,_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE,comdat
	.weak	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE # -- Begin function _ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	.type	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE,@function
_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE: # @_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1688, %rsp                     # imm = 0x698
	.cfi_def_cfa_offset 1744
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 16(%rsp)                  # 4-byte Spill
	movl	%r8d, %r15d
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r12
	movq	%rdi, %rbp
	movb	1752(%rsp), %r13b
	movq	1744(%rsp), %rdi
	movl	%r8d, 24(%rsp)
	movb	%r13b, 10(%rsp)
	testq	$-3, %rdi
	jne	.LBB14_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	180(%rsp), %rdi
	callq	hipGetDevice
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB14_82
# %bb.4:                                # %thread-pre-split.i
	movl	180(%rsp), %esi
	jmp	.LBB14_5
.LBB14_1:
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 180(%rsp)
	testl	%eax, %eax
	js	.LBB14_2
.LBB14_5:                               # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB14_82
# %bb.6:
	movq	%r14, 56(%rsp)                  # 8-byte Spill
	movl	%esi, %r14d
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4), %eax
	testl	%eax, %eax
	je	.LBB14_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread150
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
.LBB14_10:
	leaq	180(%rsp), %r14
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEDaNS0_11target_archE
	movl	(%r14), %r9d
	movl	4(%r14), %ecx
	movl	%r9d, 116(%rsp)
	movl	12(%r14), %edi
	movl	%edi, 112(%rsp)
	movl	24(%r14), %r11d
	movl	%r11d, 108(%rsp)
	movl	28(%r14), %r10d
	movl	%r10d, %r8d
	imull	%r11d, %r8d
	movl	%r8d, 104(%rsp)
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	16(%rsp)                        # 4-byte Folded Reload
	movq	%rcx, 152(%rsp)                 # 8-byte Spill
	movl	%ecx, %esi
	movq	%r9, 120(%rsp)                  # 8-byte Spill
	imull	%r9d, %esi
	xorl	%ecx, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, 76(%rsp)                  # 4-byte Spill
	movl	%r15d, %eax
	xorl	%edx, %edx
	movl	%esi, 84(%rsp)                  # 4-byte Spill
	divl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, 80(%rsp)                  # 4-byte Spill
	movl	%eax, 100(%rsp)
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	%r8d
	movl	%eax, %ebx
	cmpl	$1, %edx
	sbbl	$-1, %ebx
	movl	8(%r14), %esi
	cmpl	%r15d, %esi
	setb	11(%rsp)
	movl	%ebx, 96(%rsp)
	leal	1(%rbx), %r9d
	movl	%r9d, 92(%rsp)
	movl	%r9d, %eax
	xorl	%edx, %edx
	movq	%rdi, 160(%rsp)                 # 8-byte Spill
	divl	%edi
	movq	1760(%rsp), %rdi
	movl	%eax, %r14d
	cmpl	$1, %edx
	sbbl	$-1, %r14d
	movl	%r14d, 88(%rsp)
	movq	%rcx, 64(%rsp)
	movq	%rcx, 48(%rsp)
	movq	%rcx, 40(%rsp)
	testq	%rdi, %rdi
	je	.LBB14_11
# %bb.16:
	movq	1768(%rsp), %rdx
	cmpl	%r15d, %esi
	cmovbl	%r9d, %ecx
	leaq	(,%rcx,4), %rax
	cmpq	$5, %rax
	movl	$4, %esi
	cmovaeq	%rax, %rsi
	testq	%rbp, %rbp
	je	.LBB14_17
# %bb.18:
	movl	$1, %eax
	cmpq	%rsi, (%r12)
	jb	.LBB14_20
# %bb.19:
	xorl	%eax, %eax
	testl	%ecx, %ecx
	movq	%rbp, %rcx
	cmoveq	%rax, %rcx
	movq	%rcx, 64(%rsp)
	jmp	.LBB14_20
.LBB14_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB14_82
.LBB14_8:
	leaq	216(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB14_82
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread155
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	leaq	1376(%rsp), %rbx
	leaq	1632(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%rbx, %rax
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %ecx
	xchgl	%ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4)
	jmp	.LBB14_10
.LBB14_11:
	movq	%rbx, 128(%rsp)                 # 8-byte Spill
	movq	%r11, 136(%rsp)                 # 8-byte Spill
	movq	%r10, 144(%rsp)                 # 8-byte Spill
	movl	%r8d, 12(%rsp)                  # 4-byte Spill
	movl	%r14d, 72(%rsp)                 # 4-byte Spill
	movl	%r15d, %eax
	cmpl	%r15d, %esi
	movl	%r9d, %ebx
	cmovbl	%r9d, %ecx
	leaq	(,%rax,4), %rdx
	shlq	$2, %rcx
	leaq	48(%rsp), %rsi
	leaq	216(%rsp), %rdi
	movq	%rsi, (%rdi)
	movq	%rdx, 8(%rdi)
	movl	$4, %r14d
	movq	%r14, 16(%rdi)
	leaq	40(%rsp), %rdx
	movq	%rdx, 24(%rdi)
	movq	%rax, 32(%rdi)
	movq	$1, 40(%rdi)
	leaq	64(%rsp), %rax
	movq	%rax, 48(%rdi)
	movq	%rcx, 56(%rdi)
	movq	%r14, 64(%rdi)
	callq	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE10get_layoutEv
	cmpq	$5, %rax
	cmovaeq	%rax, %r14
	testq	%rbp, %rbp
	je	.LBB14_12
# %bb.13:
	movl	$1, %eax
	cmpq	%r14, (%r12)
	movl	12(%rsp), %r8d                  # 4-byte Reload
	movl	%ebx, %r9d
	jb	.LBB14_15
# %bb.14:
	leaq	216(%rsp), %rdi
	movq	%rbp, %rsi
	callq	_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE11set_storageEPv
	movl	%ebx, %r9d
	movl	12(%rsp), %r8d                  # 4-byte Reload
	xorl	%eax, %eax
	jmp	.LBB14_15
.LBB14_17:
	movq	%rsi, (%r12)
	xorl	%eax, %eax
.LBB14_20:                              # %_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEEEEEEE10hipError_tPvRmT_.exit
	movq	%rdi, 48(%rsp)
	movq	%rdx, 40(%rsp)
	jmp	.LBB14_21
.LBB14_12:
	movq	%r14, (%r12)
	xorl	%eax, %eax
	movl	12(%rsp), %r8d                  # 4-byte Reload
	movl	%ebx, %r9d
.LBB14_15:                              # %_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEENS4_IhEES5_EEEEE10hipError_tPvRmT_.exit
	movl	72(%rsp), %r14d                 # 4-byte Reload
	movq	144(%rsp), %r10                 # 8-byte Reload
	movq	136(%rsp), %r11                 # 8-byte Reload
	movq	128(%rsp), %rbx                 # 8-byte Reload
.LBB14_21:
	testq	%rbp, %rbp
	je	.LBB14_82
# %bb.22:
	testl	%eax, %eax
	jne	.LBB14_82
# %bb.23:
	testl	%r15d, %r15d
	je	.LBB14_81
# %bb.24:
	movq	120(%rsp), %rax                 # 8-byte Reload
	cmpl	%eax, %r8d
	movl	%eax, %ecx
	cmoval	%r8d, %ecx
	movl	$710, %eax                      # imm = 0x2C6
	cmpl	16(%rsp), %ecx                  # 4-byte Folded Reload
	ja	.LBB14_82
# %bb.25:
	testb	%r13b, %r13b
	je	.LBB14_71
# %bb.26:
	movq	%r11, %r13
	movq	%r10, %r12
	movl	%r9d, 12(%rsp)                  # 4-byte Spill
	movl	%r8d, %ebp
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 216(%rsp)
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	cmpq	$0, _ZSt4cout+16(%rax)
	je	.LBB14_28
# %bb.27:
	leaq	216(%rsp), %rsi
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB14_29
.LBB14_28:
	movl	$_ZSt4cout, %edi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB14_29:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB14_31
# %bb.30:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB14_32
.LBB14_31:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB14_32:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit83
	movl	$_ZSt4cout, %edi
	movl	$.L.str.23, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	16(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB14_34
# %bb.33:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB14_35
.LBB14_34:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB14_35:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit86
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	76(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB14_37
# %bb.36:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB14_38
.LBB14_37:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB14_38:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit89
	movl	$_ZSt4cout, %edi
	movl	$.L.str.24, %esi
	movl	$26, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	120(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB14_40
# %bb.39:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB14_41
.LBB14_40:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB14_41:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit92
	movl	$_ZSt4cout, %edi
	movl	$.L.str.25, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	80(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB14_43
# %bb.42:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB14_44
.LBB14_43:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB14_44:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit95
	movl	$_ZSt4cout, %edi
	movl	$.L.str.26, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	152(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB14_46
# %bb.45:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB14_47
.LBB14_46:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB14_47:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit98
	movl	$_ZSt4cout, %edi
	movl	$.L.str.27, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	84(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB14_49
# %bb.48:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB14_50
.LBB14_49:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB14_50:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit101
	movl	$_ZSt4cout, %edi
	movl	$.L.str.28, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r13, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB14_52
# %bb.51:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB14_53
.LBB14_52:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB14_53:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit104
	movl	$_ZSt4cout, %edi
	movl	$.L.str.29, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB14_55
# %bb.54:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB14_56
.LBB14_55:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB14_56:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit107
	movl	$_ZSt4cout, %edi
	movl	$.L.str.30, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB14_58
# %bb.57:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB14_59
.LBB14_58:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB14_59:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit110
	movl	$_ZSt4cout, %edi
	movl	$.L.str.31, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB14_61
# %bb.60:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB14_62
.LBB14_61:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB14_62:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit113
	movl	$_ZSt4cout, %edi
	movl	$.L.str.32, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	12(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB14_64
# %bb.63:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB14_65
.LBB14_64:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB14_65:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit116
	movl	$_ZSt4cout, %edi
	movl	$.L.str.33, %esi
	movl	$38, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	160(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB14_67
# %bb.66:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB14_68
.LBB14_67:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB14_68:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit119
	movl	$_ZSt4cout, %edi
	movl	$.L.str.34, %esi
	movl	$44, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r14d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB14_70
# %bb.69:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB14_71
.LBB14_70:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB14_71:
	movq	$0, 168(%rsp)
	movl	16(%rsp), %eax                  # 4-byte Reload
	movl	%eax, 20(%rsp)
	cmpl	%eax, %r15d
	jbe	.LBB14_81
# %bb.72:                               # %.lr.ph
	movb	$1, %al
	leaq	96(%rsp), %r12
	leaq	108(%rsp), %r13
	leaq	100(%rsp), %rbp
	leaq	116(%rsp), %r14
	leaq	216(%rsp), %rbx
.LBB14_73:                              # =>This Inner Loop Header: Depth=1
	movl	%eax, %r15d
	leaq	11(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	10(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	1744(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	92(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	31(%rsp), %rax
	movq	%rax, 304(%rsp)
	movq	%r12, 312(%rsp)
	movq	%r13, 320(%rsp)
	movq	%rbp, 328(%rsp)
	movq	%r14, 336(%rsp)
	movq	48(%rsp), %rdx
	movq	40(%rsp), %r8
	movq	%rbx, %rdi
	testb	%r15b, %r15b
	je	.LBB14_74
# %bb.75:                               #   in Loop: Header=BB14_73 Depth=1
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	32(%rsp), %rcx                  # 8-byte Reload
	callq	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_
	jmp	.LBB14_76
.LBB14_74:                              #   in Loop: Header=BB14_73 Depth=1
	movq	%rdx, %rsi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movq	%r8, %rcx
	movq	32(%rsp), %r8                   # 8-byte Reload
	callq	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_
.LBB14_76:                              #   in Loop: Header=BB14_73 Depth=1
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB14_82
# %bb.77:                               #   in Loop: Header=BB14_73 Depth=1
	movl	%r15d, %eax
	xorb	$1, %al
	movl	20(%rsp), %ecx
	addl	%ecx, %ecx
	movl	%ecx, 20(%rsp)
	movl	24(%rsp), %edx
	cmpl	%edx, %ecx
	jb	.LBB14_73
# %bb.78:                               # %._crit_edge
	testb	$1, %r15b
	jne	.LBB14_79
.LBB14_81:
	xorl	%eax, %eax
.LBB14_82:
                                        # kill: def $eax killed $eax killed $rax
	addq	$1688, %rsp                     # imm = 0x698
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB14_79:
	.cfi_def_cfa_offset 1744
	movq	48(%rsp), %rdi
	movq	1744(%rsp), %rcx
	movzbl	10(%rsp), %r8d
	movq	56(%rsp), %rsi                  # 8-byte Reload
	callq	_ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB14_82
# %bb.80:
	movq	40(%rsp), %rdi
	movl	24(%rsp), %edx
	movq	1744(%rsp), %rcx
	movzbl	10(%rsp), %r8d
	movq	32(%rsp), %rsi                  # 8-byte Reload
	callq	_ZN7rocprim9transformINS_14default_configEPhN6thrust10device_ptrIhEENS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB14_82
	jmp	.LBB14_81
.Lfunc_end14:
	.size	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE, .Lfunc_end14-_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE,"axG",@progbits,_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE,comdat
	.weak	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE # -- Begin function _ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	.type	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE,@function
_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE: # @_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1688, %rsp                     # imm = 0x698
	.cfi_def_cfa_offset 1744
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 20(%rsp)                  # 4-byte Spill
	movl	%r8d, %r15d
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r12
	movq	%rdi, %rbp
	movb	1760(%rsp), %r13b
	movq	1752(%rsp), %rdi
	movl	%r8d, 28(%rsp)
	movb	%r13b, 14(%rsp)
	testq	$-3, %rdi
	jne	.LBB15_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	180(%rsp), %rdi
	callq	hipGetDevice
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB15_82
# %bb.4:                                # %thread-pre-split.i
	movl	180(%rsp), %esi
	jmp	.LBB15_5
.LBB15_1:
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 180(%rsp)
	testl	%eax, %eax
	js	.LBB15_2
.LBB15_5:                               # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB15_82
# %bb.6:
	movq	%r14, 56(%rsp)                  # 8-byte Spill
	movl	%esi, %r14d
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4), %eax
	testl	%eax, %eax
	je	.LBB15_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread150
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
.LBB15_10:
	leaq	180(%rsp), %r14
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEDaNS0_11target_archE
	movl	(%r14), %r9d
	movl	4(%r14), %ecx
	movl	%r9d, 116(%rsp)
	movl	12(%r14), %edi
	movl	%edi, 112(%rsp)
	movl	24(%r14), %r11d
	movl	%r11d, 108(%rsp)
	movl	28(%r14), %r10d
	movl	%r10d, %r8d
	imull	%r11d, %r8d
	movl	%r8d, 104(%rsp)
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	20(%rsp)                        # 4-byte Folded Reload
	movq	%rcx, 152(%rsp)                 # 8-byte Spill
	movl	%ecx, %esi
	movq	%r9, 120(%rsp)                  # 8-byte Spill
	imull	%r9d, %esi
	xorl	%ecx, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, 76(%rsp)                  # 4-byte Spill
	movl	%r15d, %eax
	xorl	%edx, %edx
	movl	%esi, 84(%rsp)                  # 4-byte Spill
	divl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, 80(%rsp)                  # 4-byte Spill
	movl	%eax, 100(%rsp)
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	%r8d
	movl	%eax, %ebx
	cmpl	$1, %edx
	sbbl	$-1, %ebx
	movl	8(%r14), %esi
	cmpl	%r15d, %esi
	setb	15(%rsp)
	movl	%ebx, 96(%rsp)
	leal	1(%rbx), %r9d
	movl	%r9d, 92(%rsp)
	movl	%r9d, %eax
	xorl	%edx, %edx
	movq	%rdi, 160(%rsp)                 # 8-byte Spill
	divl	%edi
	movq	1768(%rsp), %rdi
	movl	%eax, %r14d
	cmpl	$1, %edx
	sbbl	$-1, %r14d
	movl	%r14d, 88(%rsp)
	movq	%rcx, 64(%rsp)
	movq	%rcx, 48(%rsp)
	movq	%rcx, 40(%rsp)
	testq	%rdi, %rdi
	je	.LBB15_11
# %bb.16:
	movq	1776(%rsp), %rdx
	cmpl	%r15d, %esi
	cmovbl	%r9d, %ecx
	leaq	(,%rcx,4), %rax
	cmpq	$5, %rax
	movl	$4, %esi
	cmovaeq	%rax, %rsi
	testq	%rbp, %rbp
	je	.LBB15_17
# %bb.18:
	movl	$1, %eax
	cmpq	%rsi, (%r12)
	jb	.LBB15_20
# %bb.19:
	xorl	%eax, %eax
	testl	%ecx, %ecx
	movq	%rbp, %rcx
	cmoveq	%rax, %rcx
	movq	%rcx, 64(%rsp)
	jmp	.LBB15_20
.LBB15_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB15_82
.LBB15_8:
	leaq	216(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB15_82
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread155
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	leaq	1376(%rsp), %rbx
	leaq	1632(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%rbx, %rax
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %ecx
	xchgl	%ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4)
	jmp	.LBB15_10
.LBB15_11:
	movq	%rbx, 128(%rsp)                 # 8-byte Spill
	movq	%r11, 136(%rsp)                 # 8-byte Spill
	movq	%r10, 144(%rsp)                 # 8-byte Spill
	movl	%r8d, 16(%rsp)                  # 4-byte Spill
	movl	%r14d, 72(%rsp)                 # 4-byte Spill
	movl	%r15d, %eax
	cmpl	%r15d, %esi
	movl	%r9d, %ebx
	cmovbl	%r9d, %ecx
	leaq	(,%rax,4), %rdx
	shlq	$2, %rcx
	leaq	48(%rsp), %rsi
	leaq	216(%rsp), %rdi
	movq	%rsi, (%rdi)
	movq	%rdx, 8(%rdi)
	movl	$4, %r14d
	movq	%r14, 16(%rdi)
	leaq	40(%rsp), %rdx
	movq	%rdx, 24(%rdi)
	movq	%rax, 32(%rdi)
	movq	$1, 40(%rdi)
	leaq	64(%rsp), %rax
	movq	%rax, 48(%rdi)
	movq	%rcx, 56(%rdi)
	movq	%r14, 64(%rdi)
	callq	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE10get_layoutEv
	cmpq	$5, %rax
	cmovaeq	%rax, %r14
	testq	%rbp, %rbp
	je	.LBB15_12
# %bb.13:
	movl	$1, %eax
	cmpq	%r14, (%r12)
	movl	16(%rsp), %r8d                  # 4-byte Reload
	movl	%ebx, %r9d
	jb	.LBB15_15
# %bb.14:
	leaq	216(%rsp), %rdi
	movq	%rbp, %rsi
	callq	_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE11set_storageEPv
	movl	%ebx, %r9d
	movl	16(%rsp), %r8d                  # 4-byte Reload
	xorl	%eax, %eax
	jmp	.LBB15_15
.LBB15_17:
	movq	%rsi, (%r12)
	xorl	%eax, %eax
.LBB15_20:                              # %_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEEEEEEE10hipError_tPvRmT_.exit
	movq	%rdi, 48(%rsp)
	movq	%rdx, 40(%rsp)
	jmp	.LBB15_21
.LBB15_12:
	movq	%r14, (%r12)
	xorl	%eax, %eax
	movl	16(%rsp), %r8d                  # 4-byte Reload
	movl	%ebx, %r9d
.LBB15_15:                              # %_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEENS4_IhEES5_EEEEE10hipError_tPvRmT_.exit
	movl	72(%rsp), %r14d                 # 4-byte Reload
	movq	144(%rsp), %r10                 # 8-byte Reload
	movq	136(%rsp), %r11                 # 8-byte Reload
	movq	128(%rsp), %rbx                 # 8-byte Reload
.LBB15_21:
	testq	%rbp, %rbp
	je	.LBB15_82
# %bb.22:
	testl	%eax, %eax
	jne	.LBB15_82
# %bb.23:
	testl	%r15d, %r15d
	je	.LBB15_81
# %bb.24:
	movq	120(%rsp), %rax                 # 8-byte Reload
	cmpl	%eax, %r8d
	movl	%eax, %ecx
	cmoval	%r8d, %ecx
	movl	$710, %eax                      # imm = 0x2C6
	cmpl	20(%rsp), %ecx                  # 4-byte Folded Reload
	ja	.LBB15_82
# %bb.25:
	testb	%r13b, %r13b
	je	.LBB15_71
# %bb.26:
	movq	%r11, %r13
	movq	%r10, %r12
	movl	%r9d, 16(%rsp)                  # 4-byte Spill
	movl	%r8d, %ebp
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 216(%rsp)
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	cmpq	$0, _ZSt4cout+16(%rax)
	je	.LBB15_28
# %bb.27:
	leaq	216(%rsp), %rsi
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB15_29
.LBB15_28:
	movl	$_ZSt4cout, %edi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB15_29:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB15_31
# %bb.30:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB15_32
.LBB15_31:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB15_32:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit83
	movl	$_ZSt4cout, %edi
	movl	$.L.str.23, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	20(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB15_34
# %bb.33:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB15_35
.LBB15_34:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB15_35:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit86
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	76(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB15_37
# %bb.36:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB15_38
.LBB15_37:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB15_38:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit89
	movl	$_ZSt4cout, %edi
	movl	$.L.str.24, %esi
	movl	$26, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	120(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB15_40
# %bb.39:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB15_41
.LBB15_40:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB15_41:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit92
	movl	$_ZSt4cout, %edi
	movl	$.L.str.25, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	80(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB15_43
# %bb.42:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB15_44
.LBB15_43:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB15_44:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit95
	movl	$_ZSt4cout, %edi
	movl	$.L.str.26, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	152(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB15_46
# %bb.45:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB15_47
.LBB15_46:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB15_47:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit98
	movl	$_ZSt4cout, %edi
	movl	$.L.str.27, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	84(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB15_49
# %bb.48:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB15_50
.LBB15_49:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB15_50:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit101
	movl	$_ZSt4cout, %edi
	movl	$.L.str.28, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r13, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB15_52
# %bb.51:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB15_53
.LBB15_52:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB15_53:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit104
	movl	$_ZSt4cout, %edi
	movl	$.L.str.29, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB15_55
# %bb.54:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB15_56
.LBB15_55:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB15_56:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit107
	movl	$_ZSt4cout, %edi
	movl	$.L.str.30, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB15_58
# %bb.57:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB15_59
.LBB15_58:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB15_59:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit110
	movl	$_ZSt4cout, %edi
	movl	$.L.str.31, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB15_61
# %bb.60:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB15_62
.LBB15_61:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB15_62:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit113
	movl	$_ZSt4cout, %edi
	movl	$.L.str.32, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	16(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB15_64
# %bb.63:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB15_65
.LBB15_64:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB15_65:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit116
	movl	$_ZSt4cout, %edi
	movl	$.L.str.33, %esi
	movl	$38, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	160(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB15_67
# %bb.66:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB15_68
.LBB15_67:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB15_68:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit119
	movl	$_ZSt4cout, %edi
	movl	$.L.str.34, %esi
	movl	$44, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r14d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB15_70
# %bb.69:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB15_71
.LBB15_70:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB15_71:
	movq	$0, 168(%rsp)
	movl	20(%rsp), %eax                  # 4-byte Reload
	movl	%eax, 24(%rsp)
	cmpl	%eax, %r15d
	jbe	.LBB15_81
# %bb.72:                               # %.lr.ph
	movb	$1, %al
	leaq	96(%rsp), %r12
	leaq	108(%rsp), %r13
	leaq	100(%rsp), %rbp
	leaq	116(%rsp), %r14
	leaq	216(%rsp), %rbx
.LBB15_73:                              # =>This Inner Loop Header: Depth=1
	movl	%eax, %r15d
	leaq	15(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	14(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	1752(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	92(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	1744(%rsp), %rax
	movq	%rax, 304(%rsp)
	movq	%r12, 312(%rsp)
	movq	%r13, 320(%rsp)
	movq	%rbp, 328(%rsp)
	movq	%r14, 336(%rsp)
	movq	48(%rsp), %rdx
	movq	40(%rsp), %r8
	movq	%rbx, %rdi
	testb	%r15b, %r15b
	je	.LBB15_74
# %bb.75:                               #   in Loop: Header=BB15_73 Depth=1
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	32(%rsp), %rcx                  # 8-byte Reload
	callq	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_
	jmp	.LBB15_76
.LBB15_74:                              #   in Loop: Header=BB15_73 Depth=1
	movq	%rdx, %rsi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movq	%r8, %rcx
	movq	32(%rsp), %r8                   # 8-byte Reload
	callq	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_
.LBB15_76:                              #   in Loop: Header=BB15_73 Depth=1
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB15_82
# %bb.77:                               #   in Loop: Header=BB15_73 Depth=1
	movl	%r15d, %eax
	xorb	$1, %al
	movl	24(%rsp), %ecx
	addl	%ecx, %ecx
	movl	%ecx, 24(%rsp)
	movl	28(%rsp), %edx
	cmpl	%edx, %ecx
	jb	.LBB15_73
# %bb.78:                               # %._crit_edge
	testb	$1, %r15b
	jne	.LBB15_79
.LBB15_81:
	xorl	%eax, %eax
.LBB15_82:
                                        # kill: def $eax killed $eax killed $rax
	addq	$1688, %rsp                     # imm = 0x698
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB15_79:
	.cfi_def_cfa_offset 1744
	movq	48(%rsp), %rdi
	movq	1752(%rsp), %rcx
	movzbl	14(%rsp), %r8d
	movq	56(%rsp), %rsi                  # 8-byte Reload
	callq	_ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB15_82
# %bb.80:
	movq	40(%rsp), %rdi
	movl	28(%rsp), %edx
	movq	1752(%rsp), %rcx
	movzbl	14(%rsp), %r8d
	movq	32(%rsp), %rsi                  # 8-byte Reload
	callq	_ZN7rocprim9transformINS_14default_configEPhN6thrust10device_ptrIhEENS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB15_82
	jmp	.LBB15_81
.Lfunc_end15:
	.size	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE, .Lfunc_end15-_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEDaNS0_11target_archE,"axG",@progbits,_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEDaNS0_11target_archE,comdat
	.weak	_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEDaNS0_11target_archE # -- Begin function _ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEDaNS0_11target_archE
	.type	_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEDaNS0_11target_archE,@function
_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEDaNS0_11target_archE: # @_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEDaNS0_11target_archE
	.cfi_startproc
# %bb.0:
	movq	%rdi, %rax
	cmpl	$907, %esi                      # imm = 0x38B
	jle	.LBB16_1
# %bb.8:
	cmpl	$1029, %esi                     # imm = 0x405
	jle	.LBB16_9
# %bb.12:
	cmpl	$1030, %esi                     # imm = 0x406
	je	.LBB16_20
# %bb.13:
	cmpl	$1100, %esi                     # imm = 0x44C
	je	.LBB16_21
# %bb.14:
	cmpl	$1102, %esi                     # imm = 0x44E
	jne	.LBB16_16
# %bb.15:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE(%rip), %xmm0
	jmp	.LBB16_17
.LBB16_1:
	cmpl	$899, %esi                      # imm = 0x383
	jg	.LBB16_5
# %bb.2:
	cmpl	$-1, %esi
	je	.LBB16_16
# %bb.3:
	cmpl	$803, %esi                      # imm = 0x323
	jne	.LBB16_16
# %bb.4:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE(%rip), %xmm0
	jmp	.LBB16_17
.LBB16_5:
	cmpl	$900, %esi                      # imm = 0x384
	je	.LBB16_18
# %bb.6:
	cmpl	$906, %esi                      # imm = 0x38A
	jne	.LBB16_16
# %bb.7:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE(%rip), %xmm0
	jmp	.LBB16_17
.LBB16_9:
	cmpl	$908, %esi                      # imm = 0x38C
	je	.LBB16_19
# %bb.10:
	cmpl	$910, %esi                      # imm = 0x38E
	jne	.LBB16_16
# %bb.11:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE(%rip), %xmm0
	jmp	.LBB16_17
.LBB16_16:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE(%rip), %xmm0
	jmp	.LBB16_17
.LBB16_18:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE(%rip), %xmm0
	jmp	.LBB16_17
.LBB16_20:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE(%rip), %xmm0
	jmp	.LBB16_17
.LBB16_19:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE(%rip), %xmm0
	jmp	.LBB16_17
.LBB16_21:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE(%rip), %xmm0
.LBB16_17:
	movups	%xmm0, (%rax)
	movl	$-1, 32(%rax)
	retq
.Lfunc_end16:
	.size	_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEDaNS0_11target_archE, .Lfunc_end16-_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEDaNS0_11target_archE
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_
.LCPI17_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI17_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_,"axG",@progbits,_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_,comdat
	.weak	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_
	.p2align	1, 0x90
	.type	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_,@function
_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_: # @_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	movq	(%rdi), %rax
	cmpb	$0, (%rax)
	je	.LBB17_20
# %bb.1:
	movq	8(%rbx), %rax
	movq	16(%rbx), %rcx
	movl	(%rax), %eax
	cmpl	(%rcx), %eax
	jae	.LBB17_2
.LBB17_20:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB17_22
# %bb.21:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB17_22:
	movq	56(%rbx), %rax
	movq	112(%rbx), %rcx
	movl	(%rcx), %edi
	movq	120(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB17_24
# %bb.23:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	callq	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
.LBB17_24:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB17_31
# %bb.25:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB17_31
# %bb.26:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.37, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB17_31
# %bb.27:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI17_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI17_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB17_29
# %bb.28:
	leaq	15(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB17_30
.LBB17_2:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB17_4
# %bb.3:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB17_4:
	movq	40(%rbx), %rax
	movq	48(%rbx), %rcx
	movl	(%rax), %edi
	movl	(%rcx), %edx
	movq	56(%rbx), %rax
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB17_6
# %bb.5:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %esi
	movq	72(%rbx), %rcx
	movl	(%rcx), %edx
	movq	80(%rbx), %rcx
	movq	(%rcx), %rcx
	movl	(%rax), %r8d
	movq	%r13, %rdi
	callq	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
.LBB17_6:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB17_31
# %bb.7:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB17_14
# %bb.8:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.35, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB17_31
# %bb.9:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI17_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI17_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movb	$10, 14(%rsp)
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.LBB17_11
# %bb.10:
	leaq	14(%rsp), %rsi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB17_12
.LBB17_29:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
	jmp	.LBB17_30
.LBB17_11:
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB17_12:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB17_14
# %bb.13:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB17_14:                              # %.thread
	movq	56(%rbx), %rax
	movq	96(%rbx), %rcx
	movl	(%rcx), %edi
	movq	104(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB17_16
# %bb.15:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	80(%rbx), %rax
	movq	(%rax), %rax
	movq	%rax, (%rsp)
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	callq	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
.LBB17_16:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB17_31
# %bb.17:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB17_31
# %bb.18:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.36, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB17_31
# %bb.19:                               # %select.unfold
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI17_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI17_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
.LBB17_30:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit80
	xorl	%eax, %eax
.LBB17_31:                              # %.critedge
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end17:
	.size	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_, .Lfunc_end17-_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_
.LCPI18_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI18_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_,"axG",@progbits,_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_,comdat
	.weak	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_
	.p2align	1, 0x90
	.type	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_,@function
_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_: # @_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	movq	(%rdi), %rax
	cmpb	$0, (%rax)
	je	.LBB18_20
# %bb.1:
	movq	8(%rbx), %rax
	movq	16(%rbx), %rcx
	movl	(%rax), %eax
	cmpl	(%rcx), %eax
	jae	.LBB18_2
.LBB18_20:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB18_22
# %bb.21:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB18_22:
	movq	56(%rbx), %rax
	movq	112(%rbx), %rcx
	movl	(%rcx), %edi
	movq	120(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB18_24
# %bb.23:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	callq	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
.LBB18_24:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB18_31
# %bb.25:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB18_31
# %bb.26:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.37, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB18_31
# %bb.27:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI18_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI18_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB18_29
# %bb.28:
	leaq	15(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB18_30
.LBB18_2:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB18_4
# %bb.3:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB18_4:
	movq	40(%rbx), %rax
	movq	48(%rbx), %rcx
	movl	(%rax), %edi
	movl	(%rcx), %edx
	movq	56(%rbx), %rax
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB18_6
# %bb.5:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %esi
	movq	72(%rbx), %rcx
	movl	(%rcx), %edx
	movq	80(%rbx), %rcx
	movq	(%rcx), %rcx
	movl	(%rax), %r8d
	movq	%r13, %rdi
	callq	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
.LBB18_6:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB18_31
# %bb.7:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB18_14
# %bb.8:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.35, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB18_31
# %bb.9:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI18_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI18_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movb	$10, 14(%rsp)
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.LBB18_11
# %bb.10:
	leaq	14(%rsp), %rsi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB18_12
.LBB18_29:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
	jmp	.LBB18_30
.LBB18_11:
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB18_12:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB18_14
# %bb.13:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB18_14:                              # %.thread
	movq	56(%rbx), %rax
	movq	96(%rbx), %rcx
	movl	(%rcx), %edi
	movq	104(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB18_16
# %bb.15:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	80(%rbx), %rax
	movq	(%rax), %rax
	movq	%rax, (%rsp)
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	callq	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
.LBB18_16:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB18_31
# %bb.17:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB18_31
# %bb.18:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.36, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB18_31
# %bb.19:                               # %select.unfold
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI18_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI18_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
.LBB18_30:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit80
	xorl	%eax, %eax
.LBB18_31:                              # %.critedge
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end18:
	.size	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_, .Lfunc_end18-_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
.LCPI19_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI19_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,"axG",@progbits,_ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,comdat
	.weak	_ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.type	_ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,@function
_ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb: # @_ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1560, %rsp                     # imm = 0x618
	.cfi_def_cfa_offset 1616
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, 8(%rsp)                   # 4-byte Spill
	testq	%rdx, %rdx
	je	.LBB19_1
# %bb.2:
	movq	%rcx, %r14
	movq	%rdx, %rbp
	movq	%rsi, %r15
	movq	%rdi, %r12
	testq	$-3, %rcx
	jne	.LBB19_3
# %bb.5:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	12(%rsp), %rdi
	callq	hipGetDevice
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB19_41
# %bb.6:                                # %thread-pre-split.i
	movl	12(%rsp), %eax
	jmp	.LBB19_7
.LBB19_1:
	xorl	%r13d, %r13d
	jmp	.LBB19_41
.LBB19_3:
	movq	%r14, %rdi
	callq	hipGetStreamDeviceId
	movl	%eax, 12(%rsp)
	testl	%eax, %eax
	js	.LBB19_4
.LBB19_7:                               # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %r13d                     # imm = 0x3E7
	cmpl	$511, %eax                      # imm = 0x1FF
	ja	.LBB19_41
# %bb.8:
	movl	%eax, %ebx
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4), %edi
	testl	%edi, %edi
	je	.LBB19_10
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread103
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r15, 40(%rsp)                  # 8-byte Spill
.LBB19_12:
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEjEEEEDaNS0_11target_archE
	movq	%rax, %rsi
	movl	%edx, %eax
	movq	%rsi, %rcx
	shrq	$32, %rcx
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	imull	%esi, %ecx
	xorl	%r13d, %r13d
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %r12d
	cmpl	$1, %eax
	adcl	$0, %r12d
	leaq	-1(%rbp), %rbx
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	movq	%rcx, 24(%rsp)                  # 8-byte Spill
	je	.LBB19_26
# %bb.13:
	leaq	(%rbx,%rcx), %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %r15
	movl	$_ZSt4cout, %edi
	movl	$.L.str.38, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	16(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB19_15
# %bb.14:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB19_16
.LBB19_4:
	movl	$400, %r13d                     # imm = 0x190
	jmp	.LBB19_41
.LBB19_10:
	leaq	88(%rsp), %rdi
	movl	%eax, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	je	.LBB19_11
.LBB19_35:                              # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit
	movl	%eax, %r13d
	jmp	.LBB19_41
.LBB19_15:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB19_16:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.39, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB19_18
# %bb.17:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB19_19
.LBB19_18:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB19_19:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit73
	movl	$_ZSt4cout, %edi
	movl	$.L.str.40, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB19_21
# %bb.20:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB19_22
.LBB19_21:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB19_22:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit76
	movl	$_ZSt4cout, %edi
	movl	$.L.str.41, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB19_24
# %bb.23:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB19_25
.LBB19_24:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB19_25:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit79
	movq	24(%rsp), %rcx                  # 8-byte Reload
.LBB19_26:                              # %._crit_edge
	movq	%rbp, 80(%rsp)                  # 8-byte Spill
	imulq	%rcx, %r12
	leaq	(%rbx,%r12), %rax
	xorl	%edx, %edx
	divq	%r12
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	addq	%r12, %rbx
	jb	.LBB19_41
# %bb.27:                               # %.lr.ph
	leaq	-1(%rcx), %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movl	16(%rsp), %eax                  # 4-byte Reload
	btsq	$32, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%ebx, %ebx
	xorl	%ebp, %ebp
	xorl	%eax, %eax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
.LBB19_28:                              # =>This Inner Loop Header: Depth=1
	movq	80(%rsp), %r15                  # 8-byte Reload
	subq	%rbp, %r15
	cmpq	%r12, %r15
	cmovaeq	%r12, %r15
	movq	64(%rsp), %rax                  # 8-byte Reload
	addq	%r15, %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %r13
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB19_30
# %bb.29:                               #   in Loop: Header=BB19_28 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 48(%rsp)                  # 8-byte Spill
.LBB19_30:                              #   in Loop: Header=BB19_28 Depth=1
	movl	%r13d, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	$1, %esi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%r14, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB19_32
# %bb.31:                               #   in Loop: Header=BB19_28 Depth=1
	movq	32(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rbp,4), %rdi
	movq	40(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rbp,4), %rdx
	movq	%r15, %rsi
	callq	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_
.LBB19_32:                              #   in Loop: Header=BB19_28 Depth=1
	callq	hipGetLastError
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB19_38
# %bb.33:                               #   in Loop: Header=BB19_28 Depth=1
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB19_38
# %bb.34:                               #   in Loop: Header=BB19_28 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.42, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB19_35
# %bb.36:                               #   in Loop: Header=BB19_28 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	48(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI19_0(%rip), %xmm0
	movsd	%xmm0, 56(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	56(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI19_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 88(%rsp)
	movq	(%r15), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%r15,%rax)
	je	.LBB19_39
# %bb.37:                               #   in Loop: Header=BB19_28 Depth=1
	movl	$1, %edx
	movq	%r15, %rdi
	leaq	88(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB19_40
.LBB19_38:                              #   in Loop: Header=BB19_28 Depth=1
	testl	%r13d, %r13d
	je	.LBB19_40
	jmp	.LBB19_41
.LBB19_39:                              #   in Loop: Header=BB19_28 Depth=1
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB19_40:                              #   in Loop: Header=BB19_28 Depth=1
	incq	%rbx
	addq	%r12, %rbp
	xorl	%r13d, %r13d
	cmpq	72(%rsp), %rbx                  # 8-byte Folded Reload
	movq	24(%rsp), %rcx                  # 8-byte Reload
	jb	.LBB19_28
.LBB19_41:                              # %.thread114
	movl	%r13d, %eax
	addq	$1560, %rsp                     # imm = 0x618
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB19_11:                              # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread108
	.cfi_def_cfa_offset 1616
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	leaq	1248(%rsp), %r15
	leaq	1504(%rsp), %rsi
	movq	%r15, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%r15, %rax
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %edi
	xchgl	%eax, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4)
	jmp	.LBB19_12
.Lfunc_end19:
	.size	_ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb, .Lfunc_end19-_ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim9transformINS_14default_configEPhN6thrust10device_ptrIhEENS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
.LCPI20_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI20_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim9transformINS_14default_configEPhN6thrust10device_ptrIhEENS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,"axG",@progbits,_ZN7rocprim9transformINS_14default_configEPhN6thrust10device_ptrIhEENS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,comdat
	.weak	_ZN7rocprim9transformINS_14default_configEPhN6thrust10device_ptrIhEENS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.type	_ZN7rocprim9transformINS_14default_configEPhN6thrust10device_ptrIhEENS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,@function
_ZN7rocprim9transformINS_14default_configEPhN6thrust10device_ptrIhEENS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb: # @_ZN7rocprim9transformINS_14default_configEPhN6thrust10device_ptrIhEENS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1560, %rsp                     # imm = 0x618
	.cfi_def_cfa_offset 1616
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, 8(%rsp)                   # 4-byte Spill
	testq	%rdx, %rdx
	je	.LBB20_1
# %bb.2:
	movq	%rcx, %r14
	movq	%rdx, %rbp
	movq	%rsi, %r15
	movq	%rdi, %r12
	testq	$-3, %rcx
	jne	.LBB20_3
# %bb.5:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	12(%rsp), %rdi
	callq	hipGetDevice
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB20_41
# %bb.6:                                # %thread-pre-split.i
	movl	12(%rsp), %eax
	jmp	.LBB20_7
.LBB20_1:
	xorl	%r13d, %r13d
	jmp	.LBB20_41
.LBB20_3:
	movq	%r14, %rdi
	callq	hipGetStreamDeviceId
	movl	%eax, 12(%rsp)
	testl	%eax, %eax
	js	.LBB20_4
.LBB20_7:                               # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %r13d                     # imm = 0x3E7
	cmpl	$511, %eax                      # imm = 0x1FF
	ja	.LBB20_41
# %bb.8:
	movl	%eax, %ebx
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4), %edi
	testl	%edi, %edi
	je	.LBB20_10
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread103
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r15, 40(%rsp)                  # 8-byte Spill
.LBB20_12:
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEhEEEEDaNS0_11target_archE
	movq	%rax, %rsi
	movl	%edx, %eax
	movq	%rsi, %rcx
	shrq	$32, %rcx
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	imull	%esi, %ecx
	xorl	%r13d, %r13d
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %r12d
	cmpl	$1, %eax
	adcl	$0, %r12d
	leaq	-1(%rbp), %rbx
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	movq	%rcx, 24(%rsp)                  # 8-byte Spill
	je	.LBB20_26
# %bb.13:
	leaq	(%rbx,%rcx), %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %r15
	movl	$_ZSt4cout, %edi
	movl	$.L.str.38, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	16(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB20_15
# %bb.14:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB20_16
.LBB20_4:
	movl	$400, %r13d                     # imm = 0x190
	jmp	.LBB20_41
.LBB20_10:
	leaq	88(%rsp), %rdi
	movl	%eax, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	je	.LBB20_11
.LBB20_35:                              # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit
	movl	%eax, %r13d
	jmp	.LBB20_41
.LBB20_15:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB20_16:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.39, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB20_18
# %bb.17:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB20_19
.LBB20_18:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB20_19:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit73
	movl	$_ZSt4cout, %edi
	movl	$.L.str.40, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB20_21
# %bb.20:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB20_22
.LBB20_21:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB20_22:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit76
	movl	$_ZSt4cout, %edi
	movl	$.L.str.41, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB20_24
# %bb.23:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB20_25
.LBB20_24:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB20_25:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit79
	movq	24(%rsp), %rcx                  # 8-byte Reload
.LBB20_26:                              # %._crit_edge
	movq	%rbp, 80(%rsp)                  # 8-byte Spill
	imulq	%rcx, %r12
	leaq	(%rbx,%r12), %rax
	xorl	%edx, %edx
	divq	%r12
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	addq	%r12, %rbx
	jb	.LBB20_41
# %bb.27:                               # %.lr.ph
	leaq	-1(%rcx), %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movl	16(%rsp), %eax                  # 4-byte Reload
	btsq	$32, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%ebx, %ebx
	xorl	%ebp, %ebp
	xorl	%eax, %eax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
.LBB20_28:                              # =>This Inner Loop Header: Depth=1
	movq	80(%rsp), %r15                  # 8-byte Reload
	subq	%rbp, %r15
	cmpq	%r12, %r15
	cmovaeq	%r12, %r15
	movq	64(%rsp), %rax                  # 8-byte Reload
	addq	%r15, %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %r13
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB20_30
# %bb.29:                               #   in Loop: Header=BB20_28 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 48(%rsp)                  # 8-byte Spill
.LBB20_30:                              #   in Loop: Header=BB20_28 Depth=1
	movl	%r13d, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	$1, %esi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%r14, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB20_32
# %bb.31:                               #   in Loop: Header=BB20_28 Depth=1
	movq	32(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rbp), %rdi
	movq	40(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rbp), %rdx
	movq	%r15, %rsi
	callq	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_
.LBB20_32:                              #   in Loop: Header=BB20_28 Depth=1
	callq	hipGetLastError
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB20_38
# %bb.33:                               #   in Loop: Header=BB20_28 Depth=1
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB20_38
# %bb.34:                               #   in Loop: Header=BB20_28 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.42, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB20_35
# %bb.36:                               #   in Loop: Header=BB20_28 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	48(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI20_0(%rip), %xmm0
	movsd	%xmm0, 56(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	56(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI20_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 88(%rsp)
	movq	(%r15), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%r15,%rax)
	je	.LBB20_39
# %bb.37:                               #   in Loop: Header=BB20_28 Depth=1
	movl	$1, %edx
	movq	%r15, %rdi
	leaq	88(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB20_40
.LBB20_38:                              #   in Loop: Header=BB20_28 Depth=1
	testl	%r13d, %r13d
	je	.LBB20_40
	jmp	.LBB20_41
.LBB20_39:                              #   in Loop: Header=BB20_28 Depth=1
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB20_40:                              #   in Loop: Header=BB20_28 Depth=1
	incq	%rbx
	addq	%r12, %rbp
	xorl	%r13d, %r13d
	cmpq	72(%rsp), %rbx                  # 8-byte Folded Reload
	movq	24(%rsp), %rcx                  # 8-byte Reload
	jb	.LBB20_28
.LBB20_41:                              # %.thread114
	movl	%r13d, %eax
	addq	$1560, %rsp                     # imm = 0x618
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB20_11:                              # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread108
	.cfi_def_cfa_offset 1616
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	leaq	1248(%rsp), %r15
	leaq	1504(%rsp), %rsi
	movq	%r15, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%r15, %rax
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %edi
	xchgl	%eax, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4)
	jmp	.LBB20_12
.Lfunc_end20:
	.size	_ZN7rocprim9transformINS_14default_configEPhN6thrust10device_ptrIhEENS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb, .Lfunc_end20-_ZN7rocprim9transformINS_14default_configEPhN6thrust10device_ptrIhEENS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE10get_layoutEv,"axG",@progbits,_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE10get_layoutEv,comdat
	.weak	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE10get_layoutEv # -- Begin function _ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE10get_layoutEv
	.p2align	1, 0x90
	.type	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE10get_layoutEv,@function
_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE10get_layoutEv: # @_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE10get_layoutEv
	.cfi_startproc
# %bb.0:                                # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE10get_layoutEvENKUlRKT_E_clIS4_EEDaS9_.exit.i.i
	movq	8(%rdi), %rax
	movq	16(%rdi), %rsi
	movq	32(%rdi), %r8
	movq	40(%rdi), %rcx
	testq	%r8, %r8
	je	.LBB21_2
# %bb.1:
	xorl	%edx, %edx
	divq	%rcx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%rcx, %rax
	addq	%r8, %rax
.LBB21_2:                               # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE10get_layoutEvENKUlRKT_E_clIS5_EEDaS9_.exit.i.i
	movq	56(%rdi), %r8
	movq	64(%rdi), %rdi
	testq	%r8, %r8
	je	.LBB21_4
# %bb.3:
	xorl	%edx, %edx
	divq	%rdi
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%rdi, %rax
	addq	%r8, %rax
.LBB21_4:                               # %_ZN7rocprim6detail17for_each_in_tupleIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEENS4_IhEES5_EEEZNKS3_16linear_partitionIJS5_S6_S5_EE10get_layoutEvEUlRKT_E_EEvOSC_OT0_.exit
	cmpq	%rcx, %rsi
	cmovaq	%rsi, %rcx
	cmpq	%rdi, %rcx
	cmovbeq	%rdi, %rcx
	cmpq	$1, %rcx
	adcq	$0, %rcx
	movq	%rcx, %rdx
	retq
.Lfunc_end21:
	.size	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE10get_layoutEv, .Lfunc_end21-_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE10get_layoutEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE11set_storageEPv,"axG",@progbits,_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE11set_storageEPv,comdat
	.weak	_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE11set_storageEPv # -- Begin function _ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE11set_storageEPv
	.p2align	1, 0x90
	.type	_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE11set_storageEPv,@function
_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE11set_storageEPv: # @_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE11set_storageEPv
	.cfi_startproc
# %bb.0:                                # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE11set_storageEPvENKUlRT_E_clIS4_EEDaS9_.exit.i.i
	movq	8(%rdi), %rax
	testq	%rax, %rax
	movq	%rsi, %rcx
	cmoveq	%rax, %rcx
	movq	(%rdi), %rdx
	movq	%rcx, (%rdx)
	movq	32(%rdi), %rcx
	testq	%rcx, %rcx
	je	.LBB22_1
# %bb.2:
	movq	40(%rdi), %r8
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	leaq	(%rsi,%rax), %rdx
	jmp	.LBB22_3
.LBB22_1:
	xorl	%edx, %edx
.LBB22_3:                               # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE11set_storageEPvENKUlRT_E_clIS5_EEDaS9_.exit.i.i
	movq	24(%rdi), %r8
	movq	%rdx, (%r8)
	cmpq	$0, 56(%rdi)
	je	.LBB22_4
# %bb.5:
	addq	%rcx, %rax
	movq	64(%rdi), %rcx
	xorl	%edx, %edx
	divq	%rcx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%rcx, %rax
	addq	%rax, %rsi
	jmp	.LBB22_6
.LBB22_4:
	xorl	%esi, %esi
.LBB22_6:                               # %_ZN7rocprim6detail17for_each_in_tupleIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEENS4_IhEES5_EEEZNS3_16linear_partitionIJS5_S6_S5_EE11set_storageEPvEUlRT_E_EEvOSC_OT0_.exit
	movq	48(%rdi), %rax
	movq	%rsi, (%rax)
	retq
.Lfunc_end22:
	.size	_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE11set_storageEPv, .Lfunc_end22-_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_IhEES4_EE11set_storageEPv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.weak	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_ # -- Begin function _ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.type	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@function
_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_: # @_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	3(%rsp), %rax
	movq	%rax, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end23:
	.size	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, .Lfunc_end23-_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ # -- Begin function _ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.type	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: # @_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	48(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	12(%rsp), %rdx
	movl	%r8d, (%rdx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end24:
	.size	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end24-_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ # -- Begin function _ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.type	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: # @_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	48(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	12(%rsp), %rdx
	movl	%r8d, (%rdx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end25:
	.size	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end25-_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.weak	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_ # -- Begin function _ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.type	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@function
_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_: # @_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	3(%rsp), %rax
	movq	%rax, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end26:
	.size	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, .Lfunc_end26-_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ # -- Begin function _ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.type	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: # @_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	40(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	32(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end27:
	.size	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end27-_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ # -- Begin function _ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.type	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: # @_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	40(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	32(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end28:
	.size	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end28-_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEjEEEEDaNS0_11target_archE,"axG",@progbits,_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEjEEEEDaNS0_11target_archE,comdat
	.weak	_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEjEEEEDaNS0_11target_archE # -- Begin function _ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEjEEEEDaNS0_11target_archE
	.type	_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEjEEEEDaNS0_11target_archE,@function
_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEjEEEEDaNS0_11target_archE: # @_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEjEEEEDaNS0_11target_archE
	.cfi_startproc
# %bb.0:
	movabsq	$8589934720, %rax               # imm = 0x200000080
	cmpl	$1029, %edi                     # imm = 0x405
	jg	.LBB29_5
# %bb.1:
	cmpl	$803, %edi                      # imm = 0x323
	je	.LBB29_10
# %bb.2:
	cmpl	$900, %edi                      # imm = 0x384
	je	.LBB29_10
# %bb.3:
	cmpl	$906, %edi                      # imm = 0x38A
	jne	.LBB29_11
# %bb.4:
	addq	$896, %rax                      # imm = 0x380
	jmp	.LBB29_11
.LBB29_5:
	cmpl	$1030, %edi                     # imm = 0x406
	je	.LBB29_9
# %bb.6:
	cmpl	$1100, %edi                     # imm = 0x44C
	je	.LBB29_10
# %bb.7:
	cmpl	$1102, %edi                     # imm = 0x44E
	jne	.LBB29_11
# %bb.8:
	movabsq	$4294967552, %rax               # imm = 0x100000100
	addq	$768, %rax                      # imm = 0x300
	jmp	.LBB29_11
.LBB29_10:
	movabsq	$68719476992, %rax              # imm = 0x1000000100
	jmp	.LBB29_11
.LBB29_9:
	movabsq	$4294967552, %rax               # imm = 0x100000100
.LBB29_11:
	movl	$-1, %edx
	retq
.Lfunc_end29:
	.size	_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEjEEEEDaNS0_11target_archE, .Lfunc_end29-_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEjEEEEDaNS0_11target_archE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_,comdat
	.weak	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_ # -- Begin function _ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_
	.type	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_,@function
_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_: # @_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdx, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rax, 16(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end30:
	.size	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_, .Lfunc_end30-_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEhEEEEDaNS0_11target_archE,"axG",@progbits,_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEhEEEEDaNS0_11target_archE,comdat
	.weak	_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEhEEEEDaNS0_11target_archE # -- Begin function _ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEhEEEEDaNS0_11target_archE
	.type	_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEhEEEEDaNS0_11target_archE,@function
_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEhEEEEDaNS0_11target_archE: # @_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEhEEEEDaNS0_11target_archE
	.cfi_startproc
# %bb.0:
	movabsq	$34359738496, %rax              # imm = 0x800000080
	cmpl	$1029, %edi                     # imm = 0x405
	jg	.LBB31_5
# %bb.1:
	cmpl	$803, %edi                      # imm = 0x323
	je	.LBB31_10
# %bb.2:
	cmpl	$900, %edi                      # imm = 0x384
	je	.LBB31_10
# %bb.3:
	cmpl	$906, %edi                      # imm = 0x38A
	jne	.LBB31_11
# %bb.4:
	movabsq	$68719476992, %rax              # imm = 0x1000000100
	addq	$-192, %rax
	jmp	.LBB31_11
.LBB31_5:
	cmpl	$1030, %edi                     # imm = 0x406
	je	.LBB31_9
# %bb.6:
	cmpl	$1100, %edi                     # imm = 0x44C
	je	.LBB31_10
# %bb.7:
	cmpl	$1102, %edi                     # imm = 0x44E
	jne	.LBB31_11
# %bb.8:
	movabsq	$17179869440, %rax              # imm = 0x400000100
	jmp	.LBB31_11
.LBB31_10:
	movabsq	$68719476992, %rax              # imm = 0x1000000100
	jmp	.LBB31_11
.LBB31_9:
	movabsq	$8589934720, %rax               # imm = 0x200000080
.LBB31_11:
	movl	$-1, %edx
	retq
.Lfunc_end31:
	.size	_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEhEEEEDaNS0_11target_archE, .Lfunc_end31-_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEhEEEEDaNS0_11target_archE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_,comdat
	.weak	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_ # -- Begin function _ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_
	.type	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_,@function
_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_: # @_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdx, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rax, 16(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end32:
	.size	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_, .Lfunc_end32-_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_
.LCPI33_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI33_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_,"axG",@progbits,_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_,comdat
	.weak	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_
	.p2align	1, 0x90
	.type	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_,@function
_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_: # @_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	movq	(%rdi), %rax
	cmpb	$0, (%rax)
	je	.LBB33_20
# %bb.1:
	movq	8(%rbx), %rax
	movq	16(%rbx), %rcx
	movl	(%rax), %eax
	cmpl	(%rcx), %eax
	jae	.LBB33_2
.LBB33_20:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB33_22
# %bb.21:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB33_22:
	movq	56(%rbx), %rax
	movq	112(%rbx), %rcx
	movl	(%rcx), %edi
	movq	120(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB33_24
# %bb.23:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	88(%rbx), %rax
	movl	(%rax), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB33_24:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB33_31
# %bb.25:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB33_31
# %bb.26:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.37, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB33_31
# %bb.27:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI33_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI33_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB33_29
# %bb.28:
	leaq	15(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB33_30
.LBB33_2:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB33_4
# %bb.3:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB33_4:
	movq	40(%rbx), %rax
	movq	48(%rbx), %rcx
	movl	(%rax), %edi
	movl	(%rcx), %edx
	movq	56(%rbx), %rax
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB33_6
# %bb.5:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %esi
	movq	72(%rbx), %rcx
	movl	(%rcx), %edx
	movq	80(%rbx), %rcx
	movq	(%rcx), %rcx
	movq	88(%rbx), %rdi
	movl	(%rdi), %r8d
	movl	(%rax), %r9d
	movq	%r13, %rdi
	callq	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
.LBB33_6:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB33_31
# %bb.7:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB33_14
# %bb.8:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.35, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB33_31
# %bb.9:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI33_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI33_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movb	$10, 14(%rsp)
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.LBB33_11
# %bb.10:
	leaq	14(%rsp), %rsi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB33_12
.LBB33_29:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
	jmp	.LBB33_30
.LBB33_11:
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB33_12:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB33_14
# %bb.13:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB33_14:                              # %.thread
	movq	56(%rbx), %rax
	movq	96(%rbx), %rcx
	movl	(%rcx), %edi
	movq	104(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB33_16
# %bb.15:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	88(%rbx), %rax
	movl	(%rax), %eax
	movq	80(%rbx), %r10
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	pushq	(%r10)
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB33_16:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB33_31
# %bb.17:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB33_31
# %bb.18:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.36, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB33_31
# %bb.19:                               # %select.unfold
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI33_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI33_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
.LBB33_30:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit83
	xorl	%eax, %eax
.LBB33_31:                              # %.critedge
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end33:
	.size	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_, .Lfunc_end33-_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PhS6_EESA_SQ_SD_SE_SF_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_
.LCPI34_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI34_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_,"axG",@progbits,_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_,comdat
	.weak	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_
	.p2align	1, 0x90
	.type	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_,@function
_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_: # @_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	movq	(%rdi), %rax
	cmpb	$0, (%rax)
	je	.LBB34_20
# %bb.1:
	movq	8(%rbx), %rax
	movq	16(%rbx), %rcx
	movl	(%rax), %eax
	cmpl	(%rcx), %eax
	jae	.LBB34_2
.LBB34_20:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB34_22
# %bb.21:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB34_22:
	movq	56(%rbx), %rax
	movq	112(%rbx), %rcx
	movl	(%rcx), %edi
	movq	120(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB34_24
# %bb.23:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	88(%rbx), %rax
	movl	(%rax), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB34_24:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB34_31
# %bb.25:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB34_31
# %bb.26:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.37, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB34_31
# %bb.27:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI34_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI34_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB34_29
# %bb.28:
	leaq	15(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB34_30
.LBB34_2:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB34_4
# %bb.3:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB34_4:
	movq	40(%rbx), %rax
	movq	48(%rbx), %rcx
	movl	(%rax), %edi
	movl	(%rcx), %edx
	movq	56(%rbx), %rax
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB34_6
# %bb.5:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %esi
	movq	72(%rbx), %rcx
	movl	(%rcx), %edx
	movq	80(%rbx), %rcx
	movq	(%rcx), %rcx
	movq	88(%rbx), %rdi
	movl	(%rdi), %r8d
	movl	(%rax), %r9d
	movq	%r13, %rdi
	callq	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
.LBB34_6:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB34_31
# %bb.7:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB34_14
# %bb.8:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.35, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB34_31
# %bb.9:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI34_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI34_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movb	$10, 14(%rsp)
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.LBB34_11
# %bb.10:
	leaq	14(%rsp), %rsi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB34_12
.LBB34_29:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
	jmp	.LBB34_30
.LBB34_11:
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB34_12:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB34_14
# %bb.13:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB34_14:                              # %.thread
	movq	56(%rbx), %rax
	movq	96(%rbx), %rcx
	movl	(%rcx), %edi
	movq	104(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB34_16
# %bb.15:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	88(%rbx), %rax
	movl	(%rax), %eax
	movq	80(%rbx), %r10
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	pushq	(%r10)
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB34_16:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB34_31
# %bb.17:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB34_31
# %bb.18:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.36, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB34_31
# %bb.19:                               # %select.unfold
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI34_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI34_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
.LBB34_30:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit83
	xorl	%eax, %eax
.LBB34_31:                              # %.critedge
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end34:
	.size	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_, .Lfunc_end34-_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PhEESA_SQ_SD_SE_SF_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.weak	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_ # -- Begin function _ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.type	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@function
_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_: # @_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%r8d, (%rax)
	leaq	40(%rsp), %r8
	movq	%rdi, (%r8)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	movq	%rsp, %rcx
	movl	%r9d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%r8, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rax, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end35:
	.size	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, .Lfunc_end35-_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ # -- Begin function _ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.type	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: # @_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	48(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	12(%rsp), %rdx
	movl	%r8d, (%rdx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end36:
	.size	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end36-_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ # -- Begin function _ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.type	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: # @_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	48(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	12(%rsp), %rdx
	movl	%r8d, (%rdx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end37:
	.size	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end37-_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.weak	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_ # -- Begin function _ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.type	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@function
_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_: # @_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%r8d, (%rdi)
	leaq	8(%rsp), %r8
	movl	%esi, (%r8)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	movq	%rsp, %rcx
	movl	%r9d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%r8, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rdi, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end38:
	.size	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, .Lfunc_end38-_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ # -- Begin function _ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.type	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: # @_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	40(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	32(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end39:
	.size	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end39-_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ # -- Begin function _ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.type	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: # @_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	40(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	32(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end40:
	.size	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end40-_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEEEDaNS0_11target_archE,"axG",@progbits,_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEEEDaNS0_11target_archE,comdat
	.weak	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEEEDaNS0_11target_archE # -- Begin function _ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEEEDaNS0_11target_archE
	.type	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEEEDaNS0_11target_archE,@function
_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEEEDaNS0_11target_archE: # @_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEEEDaNS0_11target_archE
	.cfi_startproc
# %bb.0:
	movq	%rdi, %rax
	cmpl	$907, %esi                      # imm = 0x38B
	jle	.LBB41_6
# %bb.1:
	cmpl	$1029, %esi                     # imm = 0x405
	jle	.LBB41_14
# %bb.2:
	cmpl	$1030, %esi                     # imm = 0x406
	je	.LBB41_19
# %bb.3:
	cmpl	$1100, %esi                     # imm = 0x44C
	je	.LBB41_21
# %bb.4:
	cmpl	$1102, %esi                     # imm = 0x44E
	jne	.LBB41_17
# %bb.5:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE(%rip), %xmm0
	jmp	.LBB41_10
.LBB41_6:
	cmpl	$899, %esi                      # imm = 0x383
	jg	.LBB41_11
# %bb.7:
	cmpl	$-1, %esi
	je	.LBB41_17
# %bb.8:
	cmpl	$803, %esi                      # imm = 0x323
	jne	.LBB41_17
# %bb.9:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE(%rip), %xmm0
	jmp	.LBB41_10
.LBB41_11:
	cmpl	$900, %esi                      # imm = 0x384
	je	.LBB41_18
# %bb.12:
	cmpl	$906, %esi                      # imm = 0x38A
	jne	.LBB41_17
# %bb.13:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE(%rip), %xmm0
	jmp	.LBB41_10
.LBB41_14:
	cmpl	$908, %esi                      # imm = 0x38C
	je	.LBB41_20
# %bb.15:
	cmpl	$910, %esi                      # imm = 0x38E
	jne	.LBB41_17
# %bb.16:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE(%rip), %xmm0
	jmp	.LBB41_10
.LBB41_17:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE(%rip), %xmm0
	jmp	.LBB41_10
.LBB41_18:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE(%rip), %xmm0
	jmp	.LBB41_10
.LBB41_19:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE(%rip), %xmm0
	jmp	.LBB41_10
.LBB41_20:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE(%rip), %xmm0
	jmp	.LBB41_10
.LBB41_21:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE(%rip), %xmm0
.LBB41_10:
	movups	%xmm0, (%rax)
	retq
.Lfunc_end41:
	.size	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEEEDaNS0_11target_archE, .Lfunc_end41-_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEEEDaNS0_11target_archE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEEE10hipError_tPvRmT_,"axG",@progbits,_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEEE10hipError_tPvRmT_,comdat
	.weak	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEEE10hipError_tPvRmT_ # -- Begin function _ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEEE10hipError_tPvRmT_
	.type	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEEE10hipError_tPvRmT_,@function
_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEEE10hipError_tPvRmT_: # @_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEEE10hipError_tPvRmT_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r15
	movq	%rdi, %r14
	leaq	80(%rsp), %rbx
	leaq	8(%rsp), %r12
	movq	$1, (%r12)
	movq	%rsp, %r13
	movq	$0, (%r13)
	leaq	16(%rsp), %rsi
	movq	%r12, (%rsi)
	movq	%r13, 8(%rsi)
	movq	%rbx, %rdi
	callq	_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	movq	(%r13), %rax
	cmpq	$5, %rax
	movl	$4, %ecx
	cmovaeq	%rax, %rcx
	testq	%r14, %r14
	je	.LBB42_1
# %bb.2:
	movl	$1, %eax
	cmpq	%rcx, (%r15)
	jb	.LBB42_5
# %bb.3:
	movq	%r14, 8(%rsp)
	movq	$0, (%rsp)
	leaq	16(%rsp), %rsi
	movq	%r13, (%rsi)
	movq	%r12, 8(%rsi)
	movq	%rbx, %rdi
	callq	_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	jmp	.LBB42_4
.LBB42_1:
	movq	%rcx, (%r15)
.LBB42_4:
	xorl	%eax, %eax
.LBB42_5:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end42:
	.size	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEEE10hipError_tPvRmT_, .Lfunc_end42-_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEEE10hipError_tPvRmT_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb
.LCPI43_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI43_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb,@function
_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb: # @_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 1568
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %r13d
	movl	%r8d, %r15d
	movl	%ecx, %r12d
	movq	%rdx, %rbx
	movq	%rdi, %rbp
	movq	1576(%rsp), %rdi
	testq	$-3, %rdi
	jne	.LBB43_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	4(%rsp), %rdi
	callq	hipGetDevice
	testl	%eax, %eax
	jne	.LBB43_37
# %bb.4:                                # %thread-pre-split.i
	movl	4(%rsp), %esi
	jmp	.LBB43_5
.LBB43_1:
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 4(%rsp)
	testl	%eax, %eax
	js	.LBB43_2
.LBB43_5:                               # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB43_37
# %bb.6:
	movq	%rbx, 8(%rsp)                   # 8-byte Spill
	movl	%esi, %ebx
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4), %eax
	testl	%eax, %eax
	je	.LBB43_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread118
	movl	%r15d, 20(%rsp)                 # 4-byte Spill
.LBB43_10:
	leaq	40(%rsp), %r15
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEEEDaNS0_11target_archE
	movl	4(%r15), %esi
	movl	24(%r15), %ecx
	imull	(%r15), %esi
	movl	%r12d, %eax
	xorl	%edx, %edx
	divl	%esi
	movl	%eax, %r14d
	cmpl	$1, %edx
	movl	%eax, %ebx
	sbbl	$-1, %ebx
	movl	1568(%rsp), %eax
	subl	%r13d, %eax
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %r15d
	cmpl	$1, %edx
	sbbl	$-1, %r15d
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %r15d
	leaq	(,%r15,4), %rdx
	movq	8(%rsp), %rdi                   # 8-byte Reload
	xorl	%esi, %esi
	movq	1576(%rsp), %rcx
	callq	hipMemsetAsync
	testl	%eax, %eax
	jne	.LBB43_37
# %bb.11:
	movl	%r14d, 32(%rsp)                 # 4-byte Spill
	cmpb	$0, 1584(%rsp)
	je	.LBB43_12
# %bb.13:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.47, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %r14d
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 4(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB43_15
# %bb.14:
	leaq	4(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB43_16
.LBB43_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB43_37
.LBB43_8:
	leaq	40(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB43_37
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread123
	movl	%r15d, 20(%rsp)                 # 4-byte Spill
	leaq	1200(%rsp), %r15
	leaq	1456(%rsp), %rsi
	movq	%r15, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%r15, %rax
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %ecx
	xchgl	%ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4)
	jmp	.LBB43_10
.LBB43_12:                              # %._crit_edge
	movl	%ebx, %r14d
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	1576(%rsp), %rbx
	jmp	.LBB43_20
.LBB43_15:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB43_16:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movq	1576(%rsp), %rbx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.48, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	32(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 4(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB43_18
# %bb.17:
	leaq	4(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB43_19
.LBB43_18:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB43_19:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit92
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 24(%rsp)                  # 8-byte Spill
.LBB43_20:
	movl	40(%rsp), %edx
	btsq	$32, %r14
	btsq	$32, %rdx
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%rbx, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB43_22
# %bb.21:
	movq	%rbp, %rdi
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movl	%r12d, %edx
	movl	32(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	1568(%rsp), %r9d
	callq	_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
.LBB43_22:
	callq	hipGetLastError
	testl	%eax, %eax
	movb	1584(%rsp), %bpl
	jne	.LBB43_28
# %bb.23:
	testb	%bpl, %bpl
	je	.LBB43_28
# %bb.24:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.49, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r12d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB43_37
# %bb.25:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	24(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI43_0(%rip), %xmm0
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	32(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI43_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 4(%rsp)
	movq	(%r12), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%r12,%rax)
	je	.LBB43_27
# %bb.26:
	leaq	4(%rsp), %rsi
	movl	$1, %edx
	movq	%r12, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB43_29
.LBB43_28:                              # %.critedge
	testl	%eax, %eax
	jne	.LBB43_37
	jmp	.LBB43_29
.LBB43_27:
	movq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB43_29:
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	testb	%bpl, %bpl
	je	.LBB43_31
# %bb.30:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 24(%rsp)                  # 8-byte Spill
.LBB43_31:
	movl	40(%rsp), %edx
	movl	20(%rsp), %edi                  # 4-byte Reload
	orq	%rbx, %rdi
	orq	%rbx, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	1576(%rsp), %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB43_33
# %bb.32:
	movq	8(%rsp), %rdi                   # 8-byte Reload
	callq	_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_
.LBB43_33:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB43_37
# %bb.34:
	testb	%bpl, %bpl
	je	.LBB43_37
# %bb.35:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.50, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	1576(%rsp), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB43_37
# %bb.36:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	24(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI43_0(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI43_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
	xorl	%eax, %eax
.LBB43_37:
	addq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end43:
	.size	_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb, .Lfunc_end43-_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_IhEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIjEEPjNS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
.LCPI44_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI44_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIjEEPjNS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,"axG",@progbits,_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIjEEPjNS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,comdat
	.weak	_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIjEEPjNS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.type	_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIjEEPjNS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,@function
_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIjEEPjNS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb: # @_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIjEEPjNS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1560, %rsp                     # imm = 0x618
	.cfi_def_cfa_offset 1616
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, 8(%rsp)                   # 4-byte Spill
	testq	%rdx, %rdx
	je	.LBB44_1
# %bb.2:
	movq	%rcx, %r14
	movq	%rdx, %rbp
	movq	%rsi, %r15
	movq	%rdi, %r12
	testq	$-3, %rcx
	jne	.LBB44_3
# %bb.5:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	12(%rsp), %rdi
	callq	hipGetDevice
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB44_41
# %bb.6:                                # %thread-pre-split.i
	movl	12(%rsp), %eax
	jmp	.LBB44_7
.LBB44_1:
	xorl	%r13d, %r13d
	jmp	.LBB44_41
.LBB44_3:
	movq	%r14, %rdi
	callq	hipGetStreamDeviceId
	movl	%eax, 12(%rsp)
	testl	%eax, %eax
	js	.LBB44_4
.LBB44_7:                               # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %r13d                     # imm = 0x3E7
	cmpl	$511, %eax                      # imm = 0x1FF
	ja	.LBB44_41
# %bb.8:
	movl	%eax, %ebx
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4), %edi
	testl	%edi, %edi
	je	.LBB44_10
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread103
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r15, 40(%rsp)                  # 8-byte Spill
.LBB44_12:
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEjEEEEDaNS0_11target_archE
	movq	%rax, %rsi
	movl	%edx, %eax
	movq	%rsi, %rcx
	shrq	$32, %rcx
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	imull	%esi, %ecx
	xorl	%r13d, %r13d
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %r12d
	cmpl	$1, %eax
	adcl	$0, %r12d
	leaq	-1(%rbp), %rbx
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	movq	%rcx, 24(%rsp)                  # 8-byte Spill
	je	.LBB44_26
# %bb.13:
	leaq	(%rbx,%rcx), %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %r15
	movl	$_ZSt4cout, %edi
	movl	$.L.str.38, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	16(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB44_15
# %bb.14:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB44_16
.LBB44_4:
	movl	$400, %r13d                     # imm = 0x190
	jmp	.LBB44_41
.LBB44_10:
	leaq	88(%rsp), %rdi
	movl	%eax, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	je	.LBB44_11
.LBB44_35:                              # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit
	movl	%eax, %r13d
	jmp	.LBB44_41
.LBB44_15:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB44_16:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.39, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB44_18
# %bb.17:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB44_19
.LBB44_18:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB44_19:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit73
	movl	$_ZSt4cout, %edi
	movl	$.L.str.40, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB44_21
# %bb.20:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB44_22
.LBB44_21:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB44_22:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit76
	movl	$_ZSt4cout, %edi
	movl	$.L.str.41, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB44_24
# %bb.23:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB44_25
.LBB44_24:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB44_25:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit79
	movq	24(%rsp), %rcx                  # 8-byte Reload
.LBB44_26:                              # %._crit_edge
	movq	%rbp, 80(%rsp)                  # 8-byte Spill
	imulq	%rcx, %r12
	leaq	(%rbx,%r12), %rax
	xorl	%edx, %edx
	divq	%r12
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	addq	%r12, %rbx
	jb	.LBB44_41
# %bb.27:                               # %.lr.ph
	leaq	-1(%rcx), %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movl	16(%rsp), %eax                  # 4-byte Reload
	btsq	$32, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%ebx, %ebx
	xorl	%ebp, %ebp
	xorl	%eax, %eax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
.LBB44_28:                              # =>This Inner Loop Header: Depth=1
	movq	80(%rsp), %r15                  # 8-byte Reload
	subq	%rbp, %r15
	cmpq	%r12, %r15
	cmovaeq	%r12, %r15
	movq	64(%rsp), %rax                  # 8-byte Reload
	addq	%r15, %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %r13
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB44_30
# %bb.29:                               #   in Loop: Header=BB44_28 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 48(%rsp)                  # 8-byte Spill
.LBB44_30:                              #   in Loop: Header=BB44_28 Depth=1
	movl	%r13d, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	$1, %esi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%r14, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB44_32
# %bb.31:                               #   in Loop: Header=BB44_28 Depth=1
	movq	32(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rbp,4), %rdi
	movq	40(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rbp,4), %rdx
	movq	%r15, %rsi
	callq	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_
.LBB44_32:                              #   in Loop: Header=BB44_28 Depth=1
	callq	hipGetLastError
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB44_38
# %bb.33:                               #   in Loop: Header=BB44_28 Depth=1
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB44_38
# %bb.34:                               #   in Loop: Header=BB44_28 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.42, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB44_35
# %bb.36:                               #   in Loop: Header=BB44_28 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	48(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI44_0(%rip), %xmm0
	movsd	%xmm0, 56(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	56(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI44_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 88(%rsp)
	movq	(%r15), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%r15,%rax)
	je	.LBB44_39
# %bb.37:                               #   in Loop: Header=BB44_28 Depth=1
	movl	$1, %edx
	movq	%r15, %rdi
	leaq	88(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB44_40
.LBB44_38:                              #   in Loop: Header=BB44_28 Depth=1
	testl	%r13d, %r13d
	je	.LBB44_40
	jmp	.LBB44_41
.LBB44_39:                              #   in Loop: Header=BB44_28 Depth=1
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB44_40:                              #   in Loop: Header=BB44_28 Depth=1
	incq	%rbx
	addq	%r12, %rbp
	xorl	%r13d, %r13d
	cmpq	72(%rsp), %rbx                  # 8-byte Folded Reload
	movq	24(%rsp), %rcx                  # 8-byte Reload
	jb	.LBB44_28
.LBB44_41:                              # %.thread114
	movl	%r13d, %eax
	addq	$1560, %rsp                     # imm = 0x618
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB44_11:                              # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread108
	.cfi_def_cfa_offset 1616
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	leaq	1248(%rsp), %r15
	leaq	1504(%rsp), %rsi
	movq	%r15, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%r15, %rax
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %edi
	xchgl	%eax, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4)
	jmp	.LBB44_12
.Lfunc_end44:
	.size	_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIjEEPjNS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb, .Lfunc_end44-_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIjEEPjNS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIhEEPhNS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
.LCPI45_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI45_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIhEEPhNS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,"axG",@progbits,_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIhEEPhNS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,comdat
	.weak	_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIhEEPhNS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.type	_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIhEEPhNS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,@function
_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIhEEPhNS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb: # @_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIhEEPhNS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1560, %rsp                     # imm = 0x618
	.cfi_def_cfa_offset 1616
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, 8(%rsp)                   # 4-byte Spill
	testq	%rdx, %rdx
	je	.LBB45_1
# %bb.2:
	movq	%rcx, %r14
	movq	%rdx, %rbp
	movq	%rsi, %r15
	movq	%rdi, %r12
	testq	$-3, %rcx
	jne	.LBB45_3
# %bb.5:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	12(%rsp), %rdi
	callq	hipGetDevice
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB45_41
# %bb.6:                                # %thread-pre-split.i
	movl	12(%rsp), %eax
	jmp	.LBB45_7
.LBB45_1:
	xorl	%r13d, %r13d
	jmp	.LBB45_41
.LBB45_3:
	movq	%r14, %rdi
	callq	hipGetStreamDeviceId
	movl	%eax, 12(%rsp)
	testl	%eax, %eax
	js	.LBB45_4
.LBB45_7:                               # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %r13d                     # imm = 0x3E7
	cmpl	$511, %eax                      # imm = 0x1FF
	ja	.LBB45_41
# %bb.8:
	movl	%eax, %ebx
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4), %edi
	testl	%edi, %edi
	je	.LBB45_10
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread103
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r15, 40(%rsp)                  # 8-byte Spill
.LBB45_12:
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEhEEEEDaNS0_11target_archE
	movq	%rax, %rsi
	movl	%edx, %eax
	movq	%rsi, %rcx
	shrq	$32, %rcx
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	imull	%esi, %ecx
	xorl	%r13d, %r13d
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %r12d
	cmpl	$1, %eax
	adcl	$0, %r12d
	leaq	-1(%rbp), %rbx
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	movq	%rcx, 24(%rsp)                  # 8-byte Spill
	je	.LBB45_26
# %bb.13:
	leaq	(%rbx,%rcx), %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %r15
	movl	$_ZSt4cout, %edi
	movl	$.L.str.38, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	16(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB45_15
# %bb.14:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB45_16
.LBB45_4:
	movl	$400, %r13d                     # imm = 0x190
	jmp	.LBB45_41
.LBB45_10:
	leaq	88(%rsp), %rdi
	movl	%eax, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	je	.LBB45_11
.LBB45_35:                              # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit
	movl	%eax, %r13d
	jmp	.LBB45_41
.LBB45_15:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB45_16:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.39, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB45_18
# %bb.17:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB45_19
.LBB45_18:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB45_19:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit73
	movl	$_ZSt4cout, %edi
	movl	$.L.str.40, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB45_21
# %bb.20:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB45_22
.LBB45_21:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB45_22:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit76
	movl	$_ZSt4cout, %edi
	movl	$.L.str.41, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB45_24
# %bb.23:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB45_25
.LBB45_24:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB45_25:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit79
	movq	24(%rsp), %rcx                  # 8-byte Reload
.LBB45_26:                              # %._crit_edge
	movq	%rbp, 80(%rsp)                  # 8-byte Spill
	imulq	%rcx, %r12
	leaq	(%rbx,%r12), %rax
	xorl	%edx, %edx
	divq	%r12
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	addq	%r12, %rbx
	jb	.LBB45_41
# %bb.27:                               # %.lr.ph
	leaq	-1(%rcx), %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movl	16(%rsp), %eax                  # 4-byte Reload
	btsq	$32, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%ebx, %ebx
	xorl	%ebp, %ebp
	xorl	%eax, %eax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
.LBB45_28:                              # =>This Inner Loop Header: Depth=1
	movq	80(%rsp), %r15                  # 8-byte Reload
	subq	%rbp, %r15
	cmpq	%r12, %r15
	cmovaeq	%r12, %r15
	movq	64(%rsp), %rax                  # 8-byte Reload
	addq	%r15, %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %r13
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB45_30
# %bb.29:                               #   in Loop: Header=BB45_28 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 48(%rsp)                  # 8-byte Spill
.LBB45_30:                              #   in Loop: Header=BB45_28 Depth=1
	movl	%r13d, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	$1, %esi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%r14, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB45_32
# %bb.31:                               #   in Loop: Header=BB45_28 Depth=1
	movq	32(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rbp), %rdi
	movq	40(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rbp), %rdx
	movq	%r15, %rsi
	callq	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_
.LBB45_32:                              #   in Loop: Header=BB45_28 Depth=1
	callq	hipGetLastError
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB45_38
# %bb.33:                               #   in Loop: Header=BB45_28 Depth=1
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB45_38
# %bb.34:                               #   in Loop: Header=BB45_28 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.42, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB45_35
# %bb.36:                               #   in Loop: Header=BB45_28 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	48(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI45_0(%rip), %xmm0
	movsd	%xmm0, 56(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	56(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI45_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 88(%rsp)
	movq	(%r15), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%r15,%rax)
	je	.LBB45_39
# %bb.37:                               #   in Loop: Header=BB45_28 Depth=1
	movl	$1, %edx
	movq	%r15, %rdi
	leaq	88(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB45_40
.LBB45_38:                              #   in Loop: Header=BB45_28 Depth=1
	testl	%r13d, %r13d
	je	.LBB45_40
	jmp	.LBB45_41
.LBB45_39:                              #   in Loop: Header=BB45_28 Depth=1
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB45_40:                              #   in Loop: Header=BB45_28 Depth=1
	incq	%rbx
	addq	%r12, %rbp
	xorl	%r13d, %r13d
	cmpq	72(%rsp), %rbx                  # 8-byte Folded Reload
	movq	24(%rsp), %rcx                  # 8-byte Reload
	jb	.LBB45_28
.LBB45_41:                              # %.thread114
	movl	%r13d, %eax
	addq	$1560, %rsp                     # imm = 0x618
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB45_11:                              # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread108
	.cfi_def_cfa_offset 1616
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	leaq	1248(%rsp), %r15
	leaq	1504(%rsp), %rsi
	movq	%r15, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%r15, %rax
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %edi
	xchgl	%eax, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4)
	jmp	.LBB45_12
.Lfunc_end45:
	.size	_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIhEEPhNS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb, .Lfunc_end45-_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIhEEPhNS_8identityIhEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb
.LCPI46_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI46_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb,@function
_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb: # @_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1624, %rsp                     # imm = 0x658
	.cfi_def_cfa_offset 1680
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r15
	movq	%r8, %r12
	movq	%rcx, %r13
	movq	%rdx, %rbp
	movq	%rsi, %rbx
	movq	%rdi, 88(%rsp)                  # 8-byte Spill
	testq	$-3, 1744(%rsp)
	jne	.LBB46_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	8(%rsp), %rdi
	callq	hipGetDevice
	testl	%eax, %eax
	jne	.LBB46_74
# %bb.4:                                # %thread-pre-split.i
	movl	8(%rsp), %esi
	jmp	.LBB46_5
.LBB46_1:
	movq	1744(%rsp), %rdi
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 8(%rsp)
	testl	%eax, %eax
	js	.LBB46_2
.LBB46_5:                               # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB46_74
# %bb.6:
	movl	%esi, %r14d
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4), %eax
	testl	%eax, %eax
	je	.LBB46_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread249
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
.LBB46_10:
	movl	1728(%rsp), %r14d
	leaq	152(%rsp), %rbx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEEEDaNS0_11target_archE
	movq	%r14, %r8
	movl	1736(%rsp), %edi
	movl	16(%rbx), %r9d
	movl	24(%rbx), %eax
	imull	12(%rbx), %r9d
	subl	%r8d, %edi
	cmpl	%edi, %eax
	movl	%eax, 76(%rsp)                  # 4-byte Spill
	cmovbl	%eax, %edi
	movl	$1073741824, %r10d              # imm = 0x40000000
	movl	$1073741824, %eax               # imm = 0x40000000
	xorl	%edx, %edx
	divl	%r9d
	subl	%edx, %r10d
	movl	1680(%rsp), %r11d
	movl	%r11d, %eax
	xorl	%edx, %edx
	divl	%r10d
	movl	%eax, %ecx
	xorl	%eax, %eax
	xorl	%esi, %esi
	testl	%edx, %edx
	setne	%sil
	movl	%r11d, %edx
	cmpq	%r10, %rdx
	movq	%r10, 136(%rsp)                 # 8-byte Spill
	movq	%rdx, 128(%rsp)                 # 8-byte Spill
	cmovbq	%rdx, %r10
	movq	%r10, 144(%rsp)                 # 8-byte Spill
	addl	%ecx, %esi
	je	.LBB46_74
# %bb.11:                               # %.lr.ph
	movq	%rbp, 56(%rsp)                  # 8-byte Spill
	movq	%r13, 80(%rsp)                  # 8-byte Spill
	movq	%r12, 48(%rsp)                  # 8-byte Spill
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	movb	1712(%rsp), %al
	movq	1696(%rsp), %r14
	movq	1688(%rsp), %rcx
	movl	%r9d, %edx
	movq	%rdx, 120(%rsp)                 # 8-byte Spill
	movl	%r8d, %edx
	movq	%rdx, 112(%rsp)                 # 8-byte Spill
	movq	%rdi, 32(%rsp)                  # 8-byte Spill
	movl	%edi, %edx
	movq	%rdx, 104(%rsp)                 # 8-byte Spill
	movl	%esi, %edx
	movq	%rdx, 96(%rsp)                  # 8-byte Spill
	andb	1720(%rsp), %al
	movb	%al, 15(%rsp)                   # 1-byte Spill
	xorl	%ebp, %ebp
	movl	%r9d, 72(%rsp)                  # 4-byte Spill
.LBB46_12:                              # =>This Inner Loop Header: Depth=1
	movl	%ebp, %r15d
	movq	144(%rsp), %rax                 # 8-byte Reload
	imull	%eax, %r15d
	movl	1680(%rsp), %ebx
	subl	%r15d, %ebx
	cmpl	%eax, %ebx
	movl	%eax, %r12d
	cmovbl	%ebx, %r12d
	movl	%r12d, %eax
	xorl	%edx, %edx
	divl	%r9d
	movl	%eax, %r13d
	movq	%r14, 16(%rsp)                  # 8-byte Spill
	movq	%rcx, 40(%rsp)                  # 8-byte Spill
	cmpl	$1, %edx
	movl	%eax, %r14d
	sbbl	$-1, %r14d
	movl	%r14d, %edx
	movl	76(%rsp), %ecx                  # 4-byte Reload
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %edx
	shlq	$2, %rdx
	movq	1704(%rsp), %rdi
	xorl	%esi, %esi
	movq	1744(%rsp), %rcx
	callq	hipMemsetAsync
	testl	%eax, %eax
	jne	.LBB46_74
# %bb.13:                               #   in Loop: Header=BB46_12 Depth=1
	movl	%r14d, %r14d
	cmpb	$0, 1752(%rsp)
	je	.LBB46_14
# %bb.15:                               #   in Loop: Header=BB46_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.51, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	176(%rsp), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB46_17
# %bb.16:                               #   in Loop: Header=BB46_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB46_18
.LBB46_14:                              #   in Loop: Header=BB46_12 Depth=1
	xorl	%ebx, %ebx
	jmp	.LBB46_52
.LBB46_17:                              #   in Loop: Header=BB46_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB46_18:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
                                        #   in Loop: Header=BB46_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.41, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	120(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB46_20
# %bb.19:                               #   in Loop: Header=BB46_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB46_21
.LBB46_20:                              #   in Loop: Header=BB46_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB46_21:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit158
                                        #   in Loop: Header=BB46_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.52, %esi
	movl	$21, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	136(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB46_23
# %bb.22:                               #   in Loop: Header=BB46_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB46_24
.LBB46_23:                              #   in Loop: Header=BB46_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB46_24:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit161
                                        #   in Loop: Header=BB46_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.53, %esi
	movl	$4, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	112(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB46_26
# %bb.25:                               #   in Loop: Header=BB46_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB46_27
.LBB46_26:                              #   in Loop: Header=BB46_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB46_27:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit164
                                        #   in Loop: Header=BB46_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.54, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	104(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB46_29
# %bb.28:                               #   in Loop: Header=BB46_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB46_30
.LBB46_29:                              #   in Loop: Header=BB46_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB46_30:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit167
                                        #   in Loop: Header=BB46_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.55, %esi
	movl	$8, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	96(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB46_32
# %bb.31:                               #   in Loop: Header=BB46_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB46_33
.LBB46_32:                              #   in Loop: Header=BB46_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB46_33:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit170
                                        #   in Loop: Header=BB46_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.56, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbp, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB46_35
# %bb.34:                               #   in Loop: Header=BB46_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB46_36
.LBB46_35:                              #   in Loop: Header=BB46_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB46_36:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit173
                                        #   in Loop: Header=BB46_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.57, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB46_38
# %bb.37:                               #   in Loop: Header=BB46_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB46_39
.LBB46_38:                              #   in Loop: Header=BB46_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB46_39:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit176
                                        #   in Loop: Header=BB46_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.58, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r12d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB46_41
# %bb.40:                               #   in Loop: Header=BB46_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB46_42
.LBB46_41:                              #   in Loop: Header=BB46_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB46_42:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit179
                                        #   in Loop: Header=BB46_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.59, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB46_44
# %bb.43:                               #   in Loop: Header=BB46_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB46_45
.LBB46_44:                              #   in Loop: Header=BB46_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB46_45:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit182
                                        #   in Loop: Header=BB46_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.47, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB46_47
# %bb.46:                               #   in Loop: Header=BB46_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB46_48
.LBB46_47:                              #   in Loop: Header=BB46_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB46_48:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit185
                                        #   in Loop: Header=BB46_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.48, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r13d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB46_50
# %bb.49:                               #   in Loop: Header=BB46_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB46_51
.LBB46_50:                              #   in Loop: Header=BB46_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB46_51:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit188
                                        #   in Loop: Header=BB46_12 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rbx
.LBB46_52:                              #   in Loop: Header=BB46_12 Depth=1
	movl	164(%rsp), %edx
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %r14
	orq	%rax, %rdx
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	1744(%rsp), %r9
	callq	__hipPushCallConfiguration
	cmpb	$0, 15(%rsp)                    # 1-byte Folded Reload
	je	.LBB46_55
# %bb.53:                               #   in Loop: Header=BB46_12 Depth=1
	testl	%eax, %eax
	movq	40(%rsp), %r14                  # 8-byte Reload
	jne	.LBB46_65
# %bb.54:                               #   in Loop: Header=BB46_12 Depth=1
	movl	%r15d, %edx
	movq	88(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rdx,4), %rdi
	addq	80(%rsp), %rdx                  # 8-byte Folded Reload
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	72(%rsp), %rcx                  # 8-byte Reload
	movl	%r12d, %r8d
	movq	%r14, %r9
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	1752(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	1736(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	jmp	.LBB46_64
.LBB46_55:                              #   in Loop: Header=BB46_12 Depth=1
	.cfi_def_cfa_offset 1680
	cmpb	$0, 1712(%rsp)
	movq	40(%rsp), %r14                  # 8-byte Reload
	je	.LBB46_58
# %bb.56:                               #   in Loop: Header=BB46_12 Depth=1
	testl	%eax, %eax
	jne	.LBB46_65
# %bb.57:                               #   in Loop: Header=BB46_12 Depth=1
	movl	%r15d, %edx
	movq	88(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rdx,4), %rdi
	addq	80(%rsp), %rdx                  # 8-byte Folded Reload
	jmp	.LBB46_63
.LBB46_58:                              #   in Loop: Header=BB46_12 Depth=1
	cmpb	$0, 1720(%rsp)
	je	.LBB46_61
# %bb.59:                               #   in Loop: Header=BB46_12 Depth=1
	testl	%eax, %eax
	jne	.LBB46_65
# %bb.60:                               #   in Loop: Header=BB46_12 Depth=1
	movl	%r15d, %edx
	movq	24(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rdx,4), %rdi
	addq	48(%rsp), %rdx                  # 8-byte Folded Reload
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	72(%rsp), %rcx                  # 8-byte Reload
	movl	%r12d, %r8d
	movq	%r14, %r9
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	1752(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	1736(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	jmp	.LBB46_64
.LBB46_61:                              #   in Loop: Header=BB46_12 Depth=1
	.cfi_def_cfa_offset 1680
	testl	%eax, %eax
	jne	.LBB46_65
# %bb.62:                               #   in Loop: Header=BB46_12 Depth=1
	movl	%r15d, %edx
	movq	56(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rdx,4), %rdi
	addq	64(%rsp), %rdx                  # 8-byte Folded Reload
.LBB46_63:                              #   in Loop: Header=BB46_12 Depth=1
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	56(%rsp), %rcx                  # 8-byte Reload
	movl	%r12d, %r8d
	movq	%r14, %r9
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	1752(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	1736(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
.LBB46_64:                              #   in Loop: Header=BB46_12 Depth=1
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB46_65:                              #   in Loop: Header=BB46_12 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB46_70
# %bb.66:                               #   in Loop: Header=BB46_12 Depth=1
	cmpb	$0, 1752(%rsp)
	je	.LBB46_70
# %bb.67:                               #   in Loop: Header=BB46_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.60, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	128(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	1744(%rsp), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB46_74
# %bb.68:                               #   in Loop: Header=BB46_12 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%rbx, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI46_0(%rip), %xmm0
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI46_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 8(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB46_71
# %bb.69:                               #   in Loop: Header=BB46_12 Depth=1
	movl	$1, %edx
	movq	%rbx, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB46_72
.LBB46_70:                              #   in Loop: Header=BB46_12 Depth=1
	testl	%eax, %eax
	je	.LBB46_72
	jmp	.LBB46_74
.LBB46_71:                              #   in Loop: Header=BB46_12 Depth=1
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB46_72:                              #   in Loop: Header=BB46_12 Depth=1
	incq	%rbp
	movq	16(%rsp), %rcx                  # 8-byte Reload
	cmpq	96(%rsp), %rbp                  # 8-byte Folded Reload
	movl	72(%rsp), %r9d                  # 4-byte Reload
	jb	.LBB46_12
# %bb.73:
	xorl	%eax, %eax
	jmp	.LBB46_74
.LBB46_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB46_74
.LBB46_8:
	leaq	152(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	je	.LBB46_9
.LBB46_74:
	addq	$1624, %rsp                     # imm = 0x658
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB46_9:                               # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread254
	.cfi_def_cfa_offset 1680
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
	leaq	1312(%rsp), %rbx
	leaq	1568(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%rbx, %rax
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %ecx
	xchgl	%ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4)
	jmp	.LBB46_10
.Lfunc_end46:
	.size	_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb, .Lfunc_end46-_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE,"axG",@progbits,_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE,comdat
	.weak	_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE # -- Begin function _ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	.type	_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE,@function
_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE: # @_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	.cfi_startproc
# %bb.0:
	movq	16(%rdi), %r8
	movq	(%rsi), %rcx
	movq	(%rcx), %rax
	cmpq	%r8, %rax
	cmovbeq	%r8, %rax
	movq	8(%rdi), %r9
	movq	%rax, (%rcx)
	testq	%r9, %r9
	je	.LBB47_2
# %bb.1:
	movq	8(%rsi), %r10
	movq	(%r10), %rax
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	addq	%r9, %rax
	movq	%rax, (%r10)
	movq	(%rcx), %rax
.LBB47_2:                               # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_IhEEEE10get_layoutEvENKUlRKT_E_clIS4_EEDaSB_.exit
	movq	40(%rdi), %r8
	cmpq	%r8, %rax
	cmovbeq	%r8, %rax
	movq	32(%rdi), %r9
	movq	%rax, (%rcx)
	testq	%r9, %r9
	je	.LBB47_4
# %bb.3:
	movq	8(%rsi), %r10
	movq	(%r10), %rax
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	addq	%r9, %rax
	movq	%rax, (%r10)
	movq	(%rcx), %rax
.LBB47_4:                               # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_IhEEEE10get_layoutEvENKUlRKT_E_clIS4_EEDaSB_.exit16
	movq	64(%rdi), %r8
	cmpq	%r8, %rax
	cmovbeq	%r8, %rax
	movq	56(%rdi), %r9
	movq	%rax, (%rcx)
	testq	%r9, %r9
	je	.LBB47_6
# %bb.5:
	movq	8(%rsi), %r10
	movq	(%r10), %rax
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	addq	%r9, %rax
	movq	%rax, (%r10)
	movq	(%rcx), %rax
.LBB47_6:                               # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_IhEEEE10get_layoutEvENKUlRKT_E_clIS6_EEDaSB_.exit
	movq	88(%rdi), %r8
	cmpq	%r8, %rax
	cmovbeq	%r8, %rax
	movq	80(%rdi), %r9
	movq	%rax, (%rcx)
	testq	%r9, %r9
	je	.LBB47_8
# %bb.7:
	movq	8(%rsi), %r10
	movq	(%r10), %rax
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	addq	%r9, %rax
	movq	%rax, (%r10)
	movq	(%rcx), %rax
.LBB47_8:                               # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_IhEEEE10get_layoutEvENKUlRKT_E_clIS4_EEDaSB_.exit29
	movq	112(%rdi), %r8
	cmpq	%r8, %rax
	cmovbeq	%r8, %rax
	movq	104(%rdi), %rdi
	movq	%rax, (%rcx)
	testq	%rdi, %rdi
	je	.LBB47_10
# %bb.9:
	movq	8(%rsi), %rcx
	movq	(%rcx), %rax
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	addq	%rdi, %rax
	movq	%rax, (%rcx)
.LBB47_10:                              # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_IhEEEE10get_layoutEvENKUlRKT_E_clIS7_EEDaSB_.exit
	retq
.Lfunc_end47:
	.size	_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE, .Lfunc_end47-_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE,"axG",@progbits,_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE,comdat
	.weak	_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE # -- Begin function _ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	.type	_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE,@function
_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE: # @_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	.cfi_startproc
# %bb.0:
	movq	8(%rdi), %rcx
	testq	%rcx, %rcx
	je	.LBB48_3
# %bb.1:
	movq	(%rsi), %r8
	movq	(%r8), %rax
	movq	16(%rdi), %r9
	xorl	%edx, %edx
	divq	%r9
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r9, %rax
	movq	%rax, (%r8)
	cmpq	$0, 8(%rdi)
	je	.LBB48_3
# %bb.2:
	movq	8(%rsi), %rdx
	addq	(%rdx), %rax
	jmp	.LBB48_4
.LBB48_3:                               # %.thread.i
	xorl	%eax, %eax
.LBB48_4:                               # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_IhEEEE11set_storageEPvENKUlRT_E_clIS4_EEDaSB_.exit
	movq	(%rdi), %rdx
	movq	%rax, (%rdx)
	movq	(%rsi), %r9
	addq	(%r9), %rcx
	movq	%rcx, (%r9)
	movq	32(%rdi), %r8
	testq	%r8, %r8
	je	.LBB48_7
# %bb.5:
	movq	40(%rdi), %r10
	movq	%rcx, %rax
	xorl	%edx, %edx
	divq	%r10
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r10, %rax
	movq	%rax, (%r9)
	cmpq	$0, 32(%rdi)
	je	.LBB48_7
# %bb.6:
	movq	8(%rsi), %rcx
	addq	(%rcx), %rax
	jmp	.LBB48_8
.LBB48_7:                               # %.thread.i19
	xorl	%eax, %eax
.LBB48_8:                               # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_IhEEEE11set_storageEPvENKUlRT_E_clIS4_EEDaSB_.exit20
	movq	24(%rdi), %rcx
	movq	%rax, (%rcx)
	movq	(%rsi), %r9
	addq	(%r9), %r8
	movq	%r8, (%r9)
	movq	56(%rdi), %rcx
	testq	%rcx, %rcx
	je	.LBB48_11
# %bb.9:
	movq	64(%rdi), %r10
	movq	%r8, %rax
	xorl	%edx, %edx
	divq	%r10
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r10, %rax
	movq	%rax, (%r9)
	cmpq	$0, 56(%rdi)
	je	.LBB48_11
# %bb.10:
	movq	8(%rsi), %rdx
	addq	(%rdx), %rax
	jmp	.LBB48_12
.LBB48_11:                              # %.thread.i30
	xorl	%eax, %eax
.LBB48_12:                              # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_IhEEEE11set_storageEPvENKUlRT_E_clIS6_EEDaSB_.exit
	movq	48(%rdi), %rdx
	movq	%rax, (%rdx)
	movq	(%rsi), %r9
	addq	(%r9), %rcx
	movq	%rcx, (%r9)
	movq	80(%rdi), %r8
	testq	%r8, %r8
	je	.LBB48_15
# %bb.13:
	movq	88(%rdi), %r10
	movq	%rcx, %rax
	xorl	%edx, %edx
	divq	%r10
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r10, %rax
	movq	%rax, (%r9)
	cmpq	$0, 80(%rdi)
	je	.LBB48_15
# %bb.14:
	movq	8(%rsi), %rcx
	addq	(%rcx), %rax
	jmp	.LBB48_16
.LBB48_15:                              # %.thread.i40
	xorl	%eax, %eax
.LBB48_16:                              # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_IhEEEE11set_storageEPvENKUlRT_E_clIS4_EEDaSB_.exit41
	movq	72(%rdi), %rcx
	movq	%rax, (%rcx)
	movq	(%rsi), %r9
	addq	(%r9), %r8
	movq	%r8, (%r9)
	movq	104(%rdi), %rcx
	testq	%rcx, %rcx
	je	.LBB48_19
# %bb.17:
	movq	112(%rdi), %r10
	movq	%r8, %rax
	xorl	%edx, %edx
	divq	%r10
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r10, %rax
	movq	%rax, (%r9)
	cmpq	$0, 104(%rdi)
	je	.LBB48_19
# %bb.18:
	movq	8(%rsi), %rdx
	addq	(%rdx), %rax
	jmp	.LBB48_20
.LBB48_19:                              # %.thread.i51
	xorl	%eax, %eax
.LBB48_20:                              # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_IhEEEE11set_storageEPvENKUlRT_E_clIS7_EEDaSB_.exit
	movq	96(%rdi), %rdx
	movq	%rax, (%rdx)
	movq	(%rsi), %rax
	addq	%rcx, (%rax)
	retq
.Lfunc_end48:
	.size	_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE, .Lfunc_end48-_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_IhEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,"axG",@progbits,_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,comdat
	.weak	_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj # -- Begin function _ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.type	_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,@function
_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj: # @_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	28(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	24(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	20(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	16(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	15(%rsp), %rax
	movq	%rax, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	40(%rsp), %r12
	leaq	32(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end49:
	.size	_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj, .Lfunc_end49-_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_,"axG",@progbits,_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_,comdat
	.weak	_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_ # -- Begin function _ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_
	.type	_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_,@function
_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_: # @_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end50:
	.size	_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_, .Lfunc_end50-_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_,comdat
	.weak	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_ # -- Begin function _ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_
	.type	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_,@function
_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_: # @_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end51:
	.size	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_, .Lfunc_end51-_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_,comdat
	.weak	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_ # -- Begin function _ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_
	.type	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_,@function
_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_: # @_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end52:
	.size	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_, .Lfunc_end52-_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj # -- Begin function _ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.type	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj: # @_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	3(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end53:
	.size	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end53-_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj # -- Begin function _ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.type	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj: # @_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	40(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	32(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	3(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end54:
	.size	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end54-_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj # -- Begin function _ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.type	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj: # @_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	48(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	4(%rsp), %rdx
	movl	%r8d, (%rdx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	3(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end55:
	.size	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end55-_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system12hip_categoryEv,"axG",@progbits,_ZN6thrust6system12hip_categoryEv,comdat
	.weak	_ZN6thrust6system12hip_categoryEv # -- Begin function _ZN6thrust6system12hip_categoryEv
	.type	_ZN6thrust6system12hip_categoryEv,@function
_ZN6thrust6system12hip_categoryEv:      # @_ZN6thrust6system12hip_categoryEv
	.cfi_startproc
# %bb.0:
	movb	_ZGVZN6thrust6system12hip_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB56_1
.LBB56_4:
	movl	$_ZZN6thrust6system12hip_categoryEvE6result, %eax
	retq
.LBB56_1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$_ZGVZN6thrust6system12hip_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB56_3
# %bb.2:
	movq	$_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE+16, _ZZN6thrust6system12hip_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system12hip_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system12hip_categoryEvE6result, %edi
	callq	__cxa_guard_release
.LBB56_3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
	jmp	.LBB56_4
.Lfunc_end56:
	.size	_ZN6thrust6system12hip_categoryEv, .Lfunc_end56-_ZN6thrust6system12hip_categoryEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc,"axG",@progbits,_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc,comdat
	.weak	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc # -- Begin function _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
	.p2align	1, 0x90
	.type	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc,@function
_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc: # @_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movl	%esi, %ebp
	movq	%rdi, %r14
	movq	%rcx, %rsi
	callq	_ZNSt13runtime_errorC2EPKc
	movq	$_ZTVN6thrust6system12system_errorE+16, (%r14)
	movl	%ebp, 16(%r14)
	movq	%rbx, 24(%r14)
	leaq	48(%r14), %rax
	movq	%rax, 32(%r14)
	movq	$0, 40(%r14)
	movb	$0, 48(%r14)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end57:
	.size	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc, .Lfunc_end57-_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system12system_errorD2Ev,"axG",@progbits,_ZN6thrust6system12system_errorD2Ev,comdat
	.weak	_ZN6thrust6system12system_errorD2Ev # -- Begin function _ZN6thrust6system12system_errorD2Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system12system_errorD2Ev,@function
_ZN6thrust6system12system_errorD2Ev:    # @_ZN6thrust6system12system_errorD2Ev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	$_ZTVN6thrust6system12system_errorE+16, (%rdi)
	movq	32(%rdi), %rdi
	leaq	48(%rbx), %rax
	cmpq	%rax, %rdi
	je	.LBB58_2
# %bb.1:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB58_2:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt13runtime_errorD2Ev        # TAILCALL
.Lfunc_end58:
	.size	_ZN6thrust6system12system_errorD2Ev, .Lfunc_end58-_ZN6thrust6system12system_errorD2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system14error_categoryD2Ev,"axG",@progbits,_ZN6thrust6system14error_categoryD2Ev,comdat
	.weak	_ZN6thrust6system14error_categoryD2Ev # -- Begin function _ZN6thrust6system14error_categoryD2Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system14error_categoryD2Ev,@function
_ZN6thrust6system14error_categoryD2Ev:  # @_ZN6thrust6system14error_categoryD2Ev
	.cfi_startproc
# %bb.0:
	movq	$_ZTVN6thrust6system14error_categoryE+16, (%rdi)
	retq
.Lfunc_end59:
	.size	_ZN6thrust6system14error_categoryD2Ev, .Lfunc_end59-_ZN6thrust6system14error_categoryD2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev,comdat
	.weak	_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev # -- Begin function _ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev,@function
_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev: # @_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev
	.cfi_startproc
# %bb.0:
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end60:
	.size	_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev, .Lfunc_end60-_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv,"axG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv,comdat
	.weak	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv # -- Begin function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv
	.p2align	1, 0x90
	.type	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv,@function
_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv: # @_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv
	.cfi_startproc
# %bb.0:
	movl	$.L.str.61, %eax
	retq
.Lfunc_end61:
	.size	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv, .Lfunc_end61-_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi,comdat
	.weak	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi # -- Begin function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi
	.p2align	1, 0x90
	.type	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi,@function
_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi: # @_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%esi, %ebx
	cmpl	$50, %esi
	jg	.LBB62_5
# %bb.1:
	movb	_ZGVZN6thrust6system12hip_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB62_2
.LBB62_4:                               # %_ZN6thrust6system20make_error_conditionENS0_11hip_rocprim4errc6errc_tE.exit
	movl	$_ZZN6thrust6system12hip_categoryEvE6result, %edx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB62_5:
	.cfi_def_cfa_offset 16
	movb	_ZGVZN6thrust6system15system_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB62_6
.LBB62_8:                               # %_ZN6thrust6system15system_categoryEv.exit
	movq	_ZZN6thrust6system15system_categoryEvE6result(%rip), %rax
	movq	24(%rax), %rax
	movl	$_ZZN6thrust6system15system_categoryEvE6result, %edi
	movl	%ebx, %esi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmpq	*%rax                           # TAILCALL
.LBB62_2:
	.cfi_def_cfa_offset 16
	movl	$_ZGVZN6thrust6system12hip_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB62_4
# %bb.3:
	movq	$_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE+16, _ZZN6thrust6system12hip_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system12hip_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system12hip_categoryEvE6result, %edi
	callq	__cxa_guard_release
	jmp	.LBB62_4
.LBB62_6:
	movl	$_ZGVZN6thrust6system15system_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB62_8
# %bb.7:
	movq	$_ZTVN6thrust6system6detail21system_error_categoryE+16, _ZZN6thrust6system15system_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system15system_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system15system_categoryEvE6result, %edi
	callq	__cxa_guard_release
	jmp	.LBB62_8
.Lfunc_end62:
	.size	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi, .Lfunc_end62-_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE,"axG",@progbits,_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE,comdat
	.weak	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE # -- Begin function _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.p2align	1, 0x90
	.type	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE,@function
_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE: # @_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdx, %rbx
	movq	(%rdi), %rax
	callq	*24(%rax)
	cmpq	8(%rbx), %rdx
	sete	%cl
	cmpl	(%rbx), %eax
	sete	%al
	andb	%cl, %al
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end63:
	.size	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE, .Lfunc_end63-_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi,"axG",@progbits,_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi,comdat
	.weak	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi # -- Begin function _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.p2align	1, 0x90
	.type	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi,@function
_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi: # @_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.cfi_startproc
# %bb.0:
	cmpq	%rdi, 8(%rsi)
	sete	%cl
	cmpl	%edx, (%rsi)
	sete	%al
	andb	%cl, %al
	retq
.Lfunc_end64:
	.size	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi, .Lfunc_end64-_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,comdat
	.weak	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei # -- Begin function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei
	.p2align	1, 0x90
	.type	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,@function
_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei: # @_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movq	%rdi, %rbx
	movl	%edx, %edi
	callq	hipGetErrorString
	movq	%rax, %r15
	movl	%ebp, %edi
	callq	hipGetErrorName
	testq	%rax, %rax
	movl	$.L.str.67, %r14d
	cmovneq	%rax, %r14
	leaq	24(%rsp), %rax
	movq	%rax, -16(%rax)
	movq	%r14, %rdi
	callq	strlen
	leaq	(%rax,%r14), %rdx
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
.Ltmp26:
	movl	$.L.str.68, %esi
	movq	%r12, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc
.Ltmp27:
# %bb.1:                                # %.noexc
	movq	%rax, %r12
	leaq	56(%rsp), %r14
	movq	%r14, -16(%r14)
	movq	(%rax), %rsi
	movq	%rax, %rbp
	addq	$16, %rbp
	cmpq	%rbp, %rsi
	je	.LBB65_2
# %bb.3:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	movq	%rsi, 40(%rsp)
	movq	16(%r12), %rax
	movq	%rax, 56(%rsp)
	movq	8(%r12), %r13
	jmp	.LBB65_4
.LBB65_2:
	movq	8(%r12), %r13
	leaq	1(%r13), %rdx
	movq	%r14, %rdi
	callq	memcpy@PLT
.LBB65_4:
	leaq	40(%rsp), %rdi
	movq	%r13, 8(%rdi)
	movq	%rbp, (%r12)
	movq	$0, 8(%r12)
	movb	$0, 16(%r12)
	testq	%r15, %r15
	movl	$.L.str.66, %esi
	cmovneq	%r15, %rsi
.Ltmp29:
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc
.Ltmp30:
# %bb.5:                                # %.noexc16
	movq	%rax, %r15
	leaq	16(%rbx), %rdi
	movq	%rdi, (%rbx)
	movq	(%rax), %rsi
	movq	%rax, %r12
	addq	$16, %r12
	cmpq	%r12, %rsi
	je	.LBB65_6
# %bb.7:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i13
	movq	%rsi, (%rbx)
	movq	16(%r15), %rax
	movq	%rax, 16(%rbx)
	movq	8(%r15), %r13
	jmp	.LBB65_8
.LBB65_6:
	movq	8(%r15), %r13
	leaq	1(%r13), %rdx
	callq	memcpy@PLT
.LBB65_8:
	movq	%r13, 8(%rbx)
	movq	%r12, (%r15)
	movq	$0, 8(%r15)
	movb	$0, 16(%r15)
	movq	40(%rsp), %rdi
	cmpq	%r14, %rdi
	je	.LBB65_10
# %bb.9:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i18
	callq	_ZdlPv
.LBB65_10:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	8(%rsp), %rdi
	leaq	24(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB65_12
# %bb.11:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i19
	callq	_ZdlPv
.LBB65_12:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit21
	movq	%rbx, %rax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB65_14:
	.cfi_def_cfa_offset 128
.Ltmp31:
	movq	%rax, %rbx
	movq	40(%rsp), %rdi
	cmpq	%r14, %rdi
	je	.LBB65_16
# %bb.15:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i22
	callq	_ZdlPv
	jmp	.LBB65_16
.LBB65_13:
.Ltmp28:
	movq	%rax, %rbx
.LBB65_16:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit24
	movq	8(%rsp), %rdi
	leaq	24(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB65_18
# %bb.17:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i25
	callq	_ZdlPv
.LBB65_18:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit27
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end65:
	.size	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei, .Lfunc_end65-_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei
	.cfi_endproc
	.section	.gcc_except_table._ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,comdat
	.p2align	2, 0x0
GCC_except_table65:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp26-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp26
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp26-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp27-.Ltmp26                #   Call between .Ltmp26 and .Ltmp27
	.uleb128 .Ltmp28-.Lfunc_begin1          #     jumps to .Ltmp28
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp27-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Ltmp29-.Ltmp27                #   Call between .Ltmp27 and .Ltmp29
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp29-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Ltmp30-.Ltmp29                #   Call between .Ltmp29 and .Ltmp30
	.uleb128 .Ltmp31-.Lfunc_begin1          #     jumps to .Ltmp31
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp30-.Lfunc_begin1          # >> Call Site 5 <<
	.uleb128 .Lfunc_end65-.Ltmp30           #   Call between .Ltmp30 and .Lfunc_end65
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system14error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system14error_categoryD0Ev,comdat
	.weak	_ZN6thrust6system14error_categoryD0Ev # -- Begin function _ZN6thrust6system14error_categoryD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system14error_categoryD0Ev,@function
_ZN6thrust6system14error_categoryD0Ev:  # @_ZN6thrust6system14error_categoryD0Ev
	.cfi_startproc
# %bb.0:
	ud2
.Lfunc_end66:
	.size	_ZN6thrust6system14error_categoryD0Ev, .Lfunc_end66-_ZN6thrust6system14error_categoryD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system14error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust6system14error_category23default_error_conditionEi,comdat
	.weak	_ZNK6thrust6system14error_category23default_error_conditionEi # -- Begin function _ZNK6thrust6system14error_category23default_error_conditionEi
	.p2align	1, 0x90
	.type	_ZNK6thrust6system14error_category23default_error_conditionEi,@function
_ZNK6thrust6system14error_category23default_error_conditionEi: # @_ZNK6thrust6system14error_category23default_error_conditionEi
	.cfi_startproc
# %bb.0:
	movl	%esi, %eax
	movq	%rdi, %rdx
	retq
.Lfunc_end67:
	.size	_ZNK6thrust6system14error_category23default_error_conditionEi, .Lfunc_end67-_ZNK6thrust6system14error_category23default_error_conditionEi
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system15system_categoryEv,"axG",@progbits,_ZN6thrust6system15system_categoryEv,comdat
	.weak	_ZN6thrust6system15system_categoryEv # -- Begin function _ZN6thrust6system15system_categoryEv
	.type	_ZN6thrust6system15system_categoryEv,@function
_ZN6thrust6system15system_categoryEv:   # @_ZN6thrust6system15system_categoryEv
	.cfi_startproc
# %bb.0:
	movb	_ZGVZN6thrust6system15system_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB68_1
.LBB68_4:
	movl	$_ZZN6thrust6system15system_categoryEvE6result, %eax
	retq
.LBB68_1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$_ZGVZN6thrust6system15system_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB68_3
# %bb.2:
	movq	$_ZTVN6thrust6system6detail21system_error_categoryE+16, _ZZN6thrust6system15system_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system15system_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system15system_categoryEvE6result, %edi
	callq	__cxa_guard_release
.LBB68_3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
	jmp	.LBB68_4
.Lfunc_end68:
	.size	_ZN6thrust6system15system_categoryEv, .Lfunc_end68-_ZN6thrust6system15system_categoryEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system6detail21system_error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system6detail21system_error_categoryD0Ev,comdat
	.weak	_ZN6thrust6system6detail21system_error_categoryD0Ev # -- Begin function _ZN6thrust6system6detail21system_error_categoryD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system6detail21system_error_categoryD0Ev,@function
_ZN6thrust6system6detail21system_error_categoryD0Ev: # @_ZN6thrust6system6detail21system_error_categoryD0Ev
	.cfi_startproc
# %bb.0:
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end69:
	.size	_ZN6thrust6system6detail21system_error_categoryD0Ev, .Lfunc_end69-_ZN6thrust6system6detail21system_error_categoryD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail21system_error_category4nameEv,"axG",@progbits,_ZNK6thrust6system6detail21system_error_category4nameEv,comdat
	.weak	_ZNK6thrust6system6detail21system_error_category4nameEv # -- Begin function _ZNK6thrust6system6detail21system_error_category4nameEv
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail21system_error_category4nameEv,@function
_ZNK6thrust6system6detail21system_error_category4nameEv: # @_ZNK6thrust6system6detail21system_error_category4nameEv
	.cfi_startproc
# %bb.0:
	movl	$.L.str.62, %eax
	retq
.Lfunc_end70:
	.size	_ZNK6thrust6system6detail21system_error_category4nameEv, .Lfunc_end70-_ZNK6thrust6system6detail21system_error_category4nameEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,comdat
	.weak	_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi # -- Begin function _ZNK6thrust6system6detail21system_error_category23default_error_conditionEi
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,@function
_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi: # @_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%esi, %ebx
	leal	-9901(%rbx), %eax
	cmpl	$78, %eax
	ja	.LBB71_81
# %bb.1:
	jmpq	*.LJTI71_0(,%rax,8)
.LBB71_2:
	movl	$9901, %edi                     # imm = 0x26AD
	jmp	.LBB71_3
.LBB71_77:
	movl	$9979, %edi                     # imm = 0x26FB
	jmp	.LBB71_3
.LBB71_33:
	movl	$9961, %edi                     # imm = 0x26E9
	jmp	.LBB71_3
.LBB71_50:
	movl	$9968, %edi                     # imm = 0x26F0
	jmp	.LBB71_3
.LBB71_67:
	movl	$9974, %edi                     # imm = 0x26F6
	jmp	.LBB71_3
.LBB71_75:
	movl	$9977, %edi                     # imm = 0x26F9
	jmp	.LBB71_3
.LBB71_28:
	movl	$9945, %edi                     # imm = 0x26D9
	jmp	.LBB71_3
.LBB71_19:
	movl	$9952, %edi                     # imm = 0x26E0
	jmp	.LBB71_3
.LBB71_29:
	movl	$9958, %edi                     # imm = 0x26E6
	jmp	.LBB71_3
.LBB71_22:
	movl	$9955, %edi                     # imm = 0x26E3
	jmp	.LBB71_3
.LBB71_17:
	movl	$9951, %edi                     # imm = 0x26DF
	jmp	.LBB71_3
.LBB71_66:
	movl	$9933, %edi                     # imm = 0x26CD
	jmp	.LBB71_3
.LBB71_80:
	movl	$9941, %edi                     # imm = 0x26D5
	jmp	.LBB71_3
.LBB71_59:
	movl	$9928, %edi                     # imm = 0x26C8
	jmp	.LBB71_3
.LBB71_79:
	movl	$9940, %edi                     # imm = 0x26D4
	jmp	.LBB71_3
.LBB71_74:
	movl	$9938, %edi                     # imm = 0x26D2
	jmp	.LBB71_3
.LBB71_58:
	movl	$9927, %edi                     # imm = 0x26C7
	jmp	.LBB71_3
.LBB71_45:
	movl	$9921, %edi                     # imm = 0x26C1
	jmp	.LBB71_3
.LBB71_68:
	movl	$9975, %edi                     # imm = 0x26F7
	jmp	.LBB71_3
.LBB71_7:
	movl	$9946, %edi                     # imm = 0x26DA
	jmp	.LBB71_3
.LBB71_39:
	movl	$9917, %edi                     # imm = 0x26BD
	jmp	.LBB71_3
.LBB71_48:
	movl	$9966, %edi                     # imm = 0x26EE
	jmp	.LBB71_3
.LBB71_71:
	movl	$9934, %edi                     # imm = 0x26CE
	jmp	.LBB71_3
.LBB71_13:
	movl	$9906, %edi                     # imm = 0x26B2
	jmp	.LBB71_3
.LBB71_43:
	movl	$9919, %edi                     # imm = 0x26BF
	jmp	.LBB71_3
.LBB71_47:
	movl	$9922, %edi                     # imm = 0x26C2
	jmp	.LBB71_3
.LBB71_25:
	movl	$9942, %edi                     # imm = 0x26D6
	jmp	.LBB71_3
.LBB71_57:
	movl	$9926, %edi                     # imm = 0x26C6
	jmp	.LBB71_3
.LBB71_61:
	movl	$9929, %edi                     # imm = 0x26C9
	jmp	.LBB71_3
.LBB71_4:
	movl	$9902, %edi                     # imm = 0x26AE
	jmp	.LBB71_3
.LBB71_54:
	movl	$9924, %edi                     # imm = 0x26C4
	jmp	.LBB71_3
.LBB71_18:
	movl	$9910, %edi                     # imm = 0x26B6
	jmp	.LBB71_3
.LBB71_56:
	movl	$9971, %edi                     # imm = 0x26F3
	jmp	.LBB71_3
.LBB71_5:
	movl	$9903, %edi                     # imm = 0x26AF
	jmp	.LBB71_3
.LBB71_11:
	movl	$9905, %edi                     # imm = 0x26B1
	jmp	.LBB71_3
.LBB71_36:
	movl	$9914, %edi                     # imm = 0x26BA
	jmp	.LBB71_3
.LBB71_62:
	movl	$9930, %edi                     # imm = 0x26CA
	jmp	.LBB71_3
.LBB71_65:
	movl	$9932, %edi                     # imm = 0x26CC
	jmp	.LBB71_3
.LBB71_15:
	movl	$9908, %edi                     # imm = 0x26B4
	jmp	.LBB71_3
.LBB71_6:
	movl	$9904, %edi                     # imm = 0x26B0
	jmp	.LBB71_3
.LBB71_26:
	movl	$9911, %edi                     # imm = 0x26B7
	jmp	.LBB71_3
.LBB71_31:
	movl	$9943, %edi                     # imm = 0x26D7
	jmp	.LBB71_3
.LBB71_53:
	movl	$9923, %edi                     # imm = 0x26C3
	jmp	.LBB71_3
.LBB71_16:
	movl	$9909, %edi                     # imm = 0x26B5
	jmp	.LBB71_3
.LBB71_8:
	movl	$9947, %edi                     # imm = 0x26DB
	jmp	.LBB71_3
.LBB71_12:
	movl	$9950, %edi                     # imm = 0x26DE
	jmp	.LBB71_3
.LBB71_14:
	movl	$9907, %edi                     # imm = 0x26B3
	jmp	.LBB71_3
.LBB71_44:
	movl	$9920, %edi                     # imm = 0x26C0
	jmp	.LBB71_3
.LBB71_69:
	movl	$9976, %edi                     # imm = 0x26F8
	jmp	.LBB71_3
.LBB71_9:
	movl	$9948, %edi                     # imm = 0x26DC
	jmp	.LBB71_3
.LBB71_78:
	movl	$9939, %edi                     # imm = 0x26D3
	jmp	.LBB71_3
.LBB71_35:
	movl	$9913, %edi                     # imm = 0x26B9
	jmp	.LBB71_3
.LBB71_23:
	movl	$9956, %edi                     # imm = 0x26E4
	jmp	.LBB71_3
.LBB71_55:
	movl	$9925, %edi                     # imm = 0x26C5
	jmp	.LBB71_3
.LBB71_63:
	movl	$9931, %edi                     # imm = 0x26CB
	jmp	.LBB71_3
.LBB71_27:
	movl	$9912, %edi                     # imm = 0x26B8
	jmp	.LBB71_3
.LBB71_72:
	movl	$9935, %edi                     # imm = 0x26CF
	jmp	.LBB71_3
.LBB71_37:
	movl	$9915, %edi                     # imm = 0x26BB
	jmp	.LBB71_3
.LBB71_38:
	movl	$9916, %edi                     # imm = 0x26BC
	jmp	.LBB71_3
.LBB71_24:
	movl	$9957, %edi                     # imm = 0x26E5
	jmp	.LBB71_3
.LBB71_70:
	movl	$9944, %edi                     # imm = 0x26D8
	jmp	.LBB71_3
.LBB71_41:
	movl	$9918, %edi                     # imm = 0x26BE
	jmp	.LBB71_3
.LBB71_42:
	movl	$9964, %edi                     # imm = 0x26EC
	jmp	.LBB71_3
.LBB71_46:
	movl	$9965, %edi                     # imm = 0x26ED
	jmp	.LBB71_3
.LBB71_32:
	movl	$9960, %edi                     # imm = 0x26E8
	jmp	.LBB71_3
.LBB71_64:
	movl	$9973, %edi                     # imm = 0x26F5
	jmp	.LBB71_3
.LBB71_30:
	movl	$9959, %edi                     # imm = 0x26E7
	jmp	.LBB71_3
.LBB71_49:
	movl	$9967, %edi                     # imm = 0x26EF
	jmp	.LBB71_3
.LBB71_21:
	movl	$9954, %edi                     # imm = 0x26E2
	jmp	.LBB71_3
.LBB71_73:
	movl	$9936, %edi                     # imm = 0x26D0
	jmp	.LBB71_3
.LBB71_51:
	movl	$9969, %edi                     # imm = 0x26F1
	jmp	.LBB71_3
.LBB71_10:
	movl	$9949, %edi                     # imm = 0x26DD
	jmp	.LBB71_3
.LBB71_34:
	movl	$9962, %edi                     # imm = 0x26EA
	jmp	.LBB71_3
.LBB71_52:
	movl	$9970, %edi                     # imm = 0x26F2
	jmp	.LBB71_3
.LBB71_20:
	movl	$9953, %edi                     # imm = 0x26E1
	jmp	.LBB71_3
.LBB71_40:
	movl	$9963, %edi                     # imm = 0x26EB
	jmp	.LBB71_3
.LBB71_60:
	movl	$9972, %edi                     # imm = 0x26F4
	jmp	.LBB71_3
.LBB71_76:
	movl	$9978, %edi                     # imm = 0x26FA
.LBB71_3:
	callq	_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE
	movl	%eax, %ebx
.LBB71_82:
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB71_81:
	.cfi_def_cfa_offset 16
	callq	_ZN6thrust6system15system_categoryEv
	movq	%rax, %rdx
	jmp	.LBB71_82
.Lfunc_end71:
	.size	_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi, .Lfunc_end71-_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi
	.cfi_endproc
	.section	.rodata._ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,"aG",@progbits,_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,comdat
	.p2align	3, 0x0
.LJTI71_0:
	.quad	.LBB71_2
	.quad	.LBB71_4
	.quad	.LBB71_5
	.quad	.LBB71_6
	.quad	.LBB71_11
	.quad	.LBB71_13
	.quad	.LBB71_14
	.quad	.LBB71_15
	.quad	.LBB71_16
	.quad	.LBB71_18
	.quad	.LBB71_26
	.quad	.LBB71_27
	.quad	.LBB71_35
	.quad	.LBB71_36
	.quad	.LBB71_37
	.quad	.LBB71_38
	.quad	.LBB71_39
	.quad	.LBB71_41
	.quad	.LBB71_43
	.quad	.LBB71_44
	.quad	.LBB71_45
	.quad	.LBB71_47
	.quad	.LBB71_53
	.quad	.LBB71_54
	.quad	.LBB71_55
	.quad	.LBB71_57
	.quad	.LBB71_58
	.quad	.LBB71_59
	.quad	.LBB71_61
	.quad	.LBB71_62
	.quad	.LBB71_63
	.quad	.LBB71_65
	.quad	.LBB71_66
	.quad	.LBB71_71
	.quad	.LBB71_72
	.quad	.LBB71_73
	.quad	.LBB71_81
	.quad	.LBB71_74
	.quad	.LBB71_78
	.quad	.LBB71_79
	.quad	.LBB71_80
	.quad	.LBB71_25
	.quad	.LBB71_31
	.quad	.LBB71_70
	.quad	.LBB71_28
	.quad	.LBB71_7
	.quad	.LBB71_8
	.quad	.LBB71_9
	.quad	.LBB71_10
	.quad	.LBB71_12
	.quad	.LBB71_17
	.quad	.LBB71_19
	.quad	.LBB71_20
	.quad	.LBB71_21
	.quad	.LBB71_22
	.quad	.LBB71_23
	.quad	.LBB71_24
	.quad	.LBB71_29
	.quad	.LBB71_30
	.quad	.LBB71_32
	.quad	.LBB71_33
	.quad	.LBB71_34
	.quad	.LBB71_40
	.quad	.LBB71_42
	.quad	.LBB71_46
	.quad	.LBB71_48
	.quad	.LBB71_49
	.quad	.LBB71_50
	.quad	.LBB71_51
	.quad	.LBB71_52
	.quad	.LBB71_56
	.quad	.LBB71_60
	.quad	.LBB71_64
	.quad	.LBB71_67
	.quad	.LBB71_68
	.quad	.LBB71_69
	.quad	.LBB71_75
	.quad	.LBB71_76
	.quad	.LBB71_77
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei,comdat
	.weak	_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei # -- Begin function _ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei,@function
_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei: # @_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movq	%rdi, %rbx
	movb	_ZGVZN6thrust6system16generic_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB72_1
.LBB72_3:                               # %_ZN6thrust6system16generic_categoryEv.exit
	movq	_ZZN6thrust6system16generic_categoryEvE6result(%rip), %rax
	movl	$_ZZN6thrust6system16generic_categoryEvE6result, %esi
	movq	%rbx, %rdi
	movl	%ebp, %edx
	callq	*48(%rax)
	movq	%rbx, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB72_1:
	.cfi_def_cfa_offset 32
	movl	$_ZGVZN6thrust6system16generic_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB72_3
# %bb.2:
	movq	$_ZTVN6thrust6system6detail22generic_error_categoryE+16, _ZZN6thrust6system16generic_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system16generic_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system16generic_categoryEvE6result, %edi
	callq	__cxa_guard_release
	jmp	.LBB72_3
.Lfunc_end72:
	.size	_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei, .Lfunc_end72-_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE,"axG",@progbits,_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE,comdat
	.weak	_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE # -- Begin function _ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE
	.type	_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE,@function
_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE: # @_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%edi, %ebx
	movb	_ZGVZN6thrust6system16generic_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB73_1
.LBB73_3:                               # %_ZN6thrust6system16generic_categoryEv.exit
	movl	$_ZZN6thrust6system16generic_categoryEvE6result, %edx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB73_1:
	.cfi_def_cfa_offset 16
	movl	$_ZGVZN6thrust6system16generic_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB73_3
# %bb.2:
	movq	$_ZTVN6thrust6system6detail22generic_error_categoryE+16, _ZZN6thrust6system16generic_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system16generic_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system16generic_categoryEvE6result, %edi
	callq	__cxa_guard_release
	jmp	.LBB73_3
.Lfunc_end73:
	.size	_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE, .Lfunc_end73-_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system6detail22generic_error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system6detail22generic_error_categoryD0Ev,comdat
	.weak	_ZN6thrust6system6detail22generic_error_categoryD0Ev # -- Begin function _ZN6thrust6system6detail22generic_error_categoryD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system6detail22generic_error_categoryD0Ev,@function
_ZN6thrust6system6detail22generic_error_categoryD0Ev: # @_ZN6thrust6system6detail22generic_error_categoryD0Ev
	.cfi_startproc
# %bb.0:
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end74:
	.size	_ZN6thrust6system6detail22generic_error_categoryD0Ev, .Lfunc_end74-_ZN6thrust6system6detail22generic_error_categoryD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail22generic_error_category4nameEv,"axG",@progbits,_ZNK6thrust6system6detail22generic_error_category4nameEv,comdat
	.weak	_ZNK6thrust6system6detail22generic_error_category4nameEv # -- Begin function _ZNK6thrust6system6detail22generic_error_category4nameEv
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail22generic_error_category4nameEv,@function
_ZNK6thrust6system6detail22generic_error_category4nameEv: # @_ZNK6thrust6system6detail22generic_error_category4nameEv
	.cfi_startproc
# %bb.0:
	movl	$.L.str.63, %eax
	retq
.Lfunc_end75:
	.size	_ZNK6thrust6system6detail22generic_error_category4nameEv, .Lfunc_end75-_ZNK6thrust6system6detail22generic_error_category4nameEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,comdat
	.weak	_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei # -- Begin function _ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,@function
_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei: # @_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei
.Lfunc_begin2:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception2
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movq	%rdi, %rbx
	movb	_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11(%rip), %al
	testb	%al, %al
	je	.LBB76_1
.LBB76_4:
	movl	%ebp, %edi
	callq	strerror
	movq	%rax, %r14
	leaq	16(%rbx), %rax
	movq	%rax, (%rbx)
	testq	%r14, %r14
	je	.LBB76_6
# %bb.5:
	movq	%r14, %rdi
	callq	strlen
	movq	%r14, %rdx
	addq	%rax, %rdx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	jmp	.LBB76_7
.LBB76_6:
	movq	_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11(%rip), %rsi
	movq	_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11+8(%rip), %rdx
	addq	%rsi, %rdx
	movq	%rbx, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
.LBB76_7:
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB76_1:
	.cfi_def_cfa_offset 32
	movl	$_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB76_4
# %bb.2:
	movq	$_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11+16, _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11(%rip)
.Ltmp32:
	movl	$_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi
	movl	$.L.str.64, %esi
	movl	$.L.str.64+13, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
.Ltmp33:
# %bb.3:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	movl	$_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev, %edi
	movl	$_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi
	callq	__cxa_guard_release
	jmp	.LBB76_4
.LBB76_8:                               # %.critedge17
.Ltmp34:
	movq	%rax, %rbx
	movl	$_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi
	callq	__cxa_guard_abort
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end76:
	.size	_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei, .Lfunc_end76-_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei
	.cfi_endproc
	.section	.gcc_except_table._ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,comdat
	.p2align	2, 0x0
GCC_except_table76:
.Lexception2:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end2-.Lcst_begin2
.Lcst_begin2:
	.uleb128 .Lfunc_begin2-.Lfunc_begin2    # >> Call Site 1 <<
	.uleb128 .Ltmp32-.Lfunc_begin2          #   Call between .Lfunc_begin2 and .Ltmp32
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp32-.Lfunc_begin2          # >> Call Site 2 <<
	.uleb128 .Ltmp33-.Ltmp32                #   Call between .Ltmp32 and .Ltmp33
	.uleb128 .Ltmp34-.Lfunc_begin2          #     jumps to .Ltmp34
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp33-.Lfunc_begin2          # >> Call Site 3 <<
	.uleb128 .Lfunc_end76-.Ltmp33           #   Call between .Ltmp33 and .Lfunc_end76
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end2:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	je	.LBB77_1
# %bb.2:
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	%rsi, %rdi
	callq	strlen
	leaq	(%rax,%rbx), %rdx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # TAILCALL
.LBB77_1:
	.cfi_def_cfa_offset 32
	movl	$.L.str.65, %edi
	callq	_ZSt19__throw_logic_errorPKc
.Lfunc_end77:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .Lfunc_end77-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB78_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB78_3
.LBB78_1:                               # %._crit_edge
	movq	(%rbx), %rax
.LBB78_3:
	testq	%r14, %r14
	je	.LBB78_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB78_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB78_7
.LBB78_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB78_7:                               # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end78:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end78-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB79_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB79_3
.LBB79_1:                               # %._crit_edge
	movq	(%rbx), %rax
.LBB79_3:
	testq	%r14, %r14
	je	.LBB79_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB79_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB79_7
.LBB79_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB79_7:                               # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end79:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag, .Lfunc_end79-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system12system_errorD0Ev,"axG",@progbits,_ZN6thrust6system12system_errorD0Ev,comdat
	.weak	_ZN6thrust6system12system_errorD0Ev # -- Begin function _ZN6thrust6system12system_errorD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system12system_errorD0Ev,@function
_ZN6thrust6system12system_errorD0Ev:    # @_ZN6thrust6system12system_errorD0Ev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	$_ZTVN6thrust6system12system_errorE+16, (%rdi)
	movq	32(%rdi), %rdi
	leaq	48(%rbx), %rax
	cmpq	%rax, %rdi
	je	.LBB80_2
# %bb.1:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i
	callq	_ZdlPv
.LBB80_2:                               # %_ZN6thrust6system12system_errorD2Ev.exit
	movq	%rbx, %rdi
	callq	_ZNSt13runtime_errorD2Ev
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end80:
	.size	_ZN6thrust6system12system_errorD0Ev, .Lfunc_end80-_ZN6thrust6system12system_errorD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system12system_error4whatEv,"axG",@progbits,_ZNK6thrust6system12system_error4whatEv,comdat
	.weak	_ZNK6thrust6system12system_error4whatEv # -- Begin function _ZNK6thrust6system12system_error4whatEv
	.p2align	1, 0x90
	.type	_ZNK6thrust6system12system_error4whatEv,@function
_ZNK6thrust6system12system_error4whatEv: # @_ZNK6thrust6system12system_error4whatEv
.Lfunc_begin3:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception3
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	32(%rdi), %r14
	cmpq	$0, 40(%rdi)
	je	.LBB81_3
.LBB81_1:
	movq	(%r14), %rbx
.LBB81_2:
	movq	%rbx, %rax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB81_3:
	.cfi_def_cfa_offset 80
	movq	%rdi, %rbx
	callq	_ZNKSt13runtime_error4whatEv
	movq	%rax, %r15
	movq	40(%rbx), %r12
	movq	%rax, %rdi
	callq	strlen
.Ltmp35:
	movq	%r14, %rdi
	xorl	%esi, %esi
	movq	%r12, %rdx
	movq	%r15, %rcx
	movq	%rax, %r8
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm
.Ltmp36:
# %bb.4:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit
	movl	16(%rbx), %edx
	testl	%edx, %edx
	je	.LBB81_1
# %bb.5:
	cmpq	$0, 40(%rbx)
	je	.LBB81_8
# %bb.6:
.Ltmp37:
	movl	$.L.str.68, %esi
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc
.Ltmp38:
# %bb.7:                                # %._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc.exit_crit_edge
	movl	16(%rbx), %edx
.LBB81_8:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc.exit
	movq	24(%rbx), %rsi
	movq	(%rsi), %rax
.Ltmp40:
	leaq	8(%rsp), %rdi
	callq	*48(%rax)
.Ltmp41:
# %bb.9:                                # %_ZNK6thrust6system10error_code7messageB5cxx11Ev.exit
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdx
.Ltmp43:
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm
.Ltmp44:
# %bb.10:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLERKS4_.exit
	leaq	24(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB81_1
# %bb.11:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
	jmp	.LBB81_1
.LBB81_12:
.Ltmp45:
	movq	%rax, %r14
	leaq	24(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB81_17
# %bb.13:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i4
	callq	_ZdlPv
	jmp	.LBB81_17
.LBB81_14:
.Ltmp42:
	jmp	.LBB81_16
.LBB81_15:
.Ltmp39:
.LBB81_16:
	movq	%rax, %r14
.LBB81_17:
	movq	%r14, %rdi
	callq	__cxa_begin_catch
	movq	%rbx, %rdi
	callq	_ZNKSt13runtime_error4whatEv
	movq	%rax, %rbx
.Ltmp46:
	callq	__cxa_end_catch
.Ltmp47:
	jmp	.LBB81_2
.LBB81_18:
.Ltmp48:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end81:
	.size	_ZNK6thrust6system12system_error4whatEv, .Lfunc_end81-_ZNK6thrust6system12system_error4whatEv
	.cfi_endproc
	.section	.gcc_except_table._ZNK6thrust6system12system_error4whatEv,"aG",@progbits,_ZNK6thrust6system12system_error4whatEv,comdat
	.p2align	2, 0x0
GCC_except_table81:
.Lexception3:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end3-.Lcst_begin3
.Lcst_begin3:
	.uleb128 .Ltmp35-.Lfunc_begin3          # >> Call Site 1 <<
	.uleb128 .Ltmp38-.Ltmp35                #   Call between .Ltmp35 and .Ltmp38
	.uleb128 .Ltmp39-.Lfunc_begin3          #     jumps to .Ltmp39
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp40-.Lfunc_begin3          # >> Call Site 2 <<
	.uleb128 .Ltmp41-.Ltmp40                #   Call between .Ltmp40 and .Ltmp41
	.uleb128 .Ltmp42-.Lfunc_begin3          #     jumps to .Ltmp42
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp43-.Lfunc_begin3          # >> Call Site 3 <<
	.uleb128 .Ltmp44-.Ltmp43                #   Call between .Ltmp43 and .Ltmp44
	.uleb128 .Ltmp45-.Lfunc_begin3          #     jumps to .Ltmp45
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp44-.Lfunc_begin3          # >> Call Site 4 <<
	.uleb128 .Ltmp46-.Ltmp44                #   Call between .Ltmp44 and .Ltmp46
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp46-.Lfunc_begin3          # >> Call Site 5 <<
	.uleb128 .Ltmp47-.Ltmp46                #   Call between .Ltmp46 and .Ltmp47
	.uleb128 .Ltmp48-.Lfunc_begin3          #     jumps to .Ltmp48
	.byte	1                               #   On action: 1
.Lcst_end3:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev,"axG",@progbits,_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev,comdat
	.weak	_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev # -- Begin function _ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev,@function
_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev: # @_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev
.Lfunc_begin4:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception4
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	16(%rdi), %rdx
	testq	%rdx, %rdx
	je	.LBB82_3
# %bb.1:
	movq	%rdi, %rbx
	movq	8(%rdi), %rsi
.Ltmp49:
	callq	_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm
.Ltmp50:
# %bb.2:                                # %.noexc
	addq	$8, %rbx
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rbx)
.LBB82_3:                               # %_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEE10deallocateEv.exit
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB82_4:
	.cfi_def_cfa_offset 16
.Ltmp51:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end82:
	.size	_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev, .Lfunc_end82-_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev,"aG",@progbits,_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev,comdat
	.p2align	2, 0x0
GCC_except_table82:
.Lexception4:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase1-.Lttbaseref1
.Lttbaseref1:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end4-.Lcst_begin4
.Lcst_begin4:
	.uleb128 .Ltmp49-.Lfunc_begin4          # >> Call Site 1 <<
	.uleb128 .Ltmp50-.Ltmp49                #   Call between .Ltmp49 and .Ltmp50
	.uleb128 .Ltmp51-.Lfunc_begin4          #     jumps to .Ltmp51
	.byte	1                               #   On action: 1
.Lcst_end4:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm,"axG",@progbits,_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm,comdat
	.weak	_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm # -- Begin function _ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm
	.p2align	1, 0x90
	.type	_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm,@function
_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm: # @_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm
.Lfunc_begin5:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception5
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
	callq	_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm
	testq	%r14, %r14
	je	.LBB83_11
# %bb.1:
	testq	%rax, %rax
	je	.LBB83_2
.LBB83_11:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB83_2:
	.cfi_def_cfa_offset 80
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_
	movl	$40, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
	leaq	24(%rsp), %r15
	movq	%r15, -16(%r15)
.Ltmp52:
	leaq	8(%rsp), %rdi
	movl	$.L.str.70, %esi
	movl	$.L.str.70+55, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
.Ltmp53:
# %bb.3:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	movb	$1, %bpl
.Ltmp55:
	leaq	8(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.Ltmp56:
# %bb.4:
	xorl	%ebp, %ebp
.Ltmp57:
	movl	$_ZTIN6thrust6system6detail9bad_allocE, %esi
	movl	$_ZN6thrust6system6detail9bad_allocD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.Ltmp58:
# %bb.12:
.LBB83_6:
.Ltmp59:
	movq	%rax, %r14
	movq	8(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB83_8
# %bb.7:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	callq	_ZdlPv
.LBB83_8:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	testb	%bpl, %bpl
	jne	.LBB83_9
	jmp	.LBB83_10
.LBB83_5:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.thread
.Ltmp54:
	movq	%rax, %r14
.LBB83_9:
	movq	%rbx, %rdi
	callq	__cxa_free_exception
.LBB83_10:
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end83:
	.size	_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm, .Lfunc_end83-_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm,"aG",@progbits,_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm,comdat
	.p2align	2, 0x0
GCC_except_table83:
.Lexception5:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end5-.Lcst_begin5
.Lcst_begin5:
	.uleb128 .Lfunc_begin5-.Lfunc_begin5    # >> Call Site 1 <<
	.uleb128 .Ltmp52-.Lfunc_begin5          #   Call between .Lfunc_begin5 and .Ltmp52
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp52-.Lfunc_begin5          # >> Call Site 2 <<
	.uleb128 .Ltmp53-.Ltmp52                #   Call between .Ltmp52 and .Ltmp53
	.uleb128 .Ltmp54-.Lfunc_begin5          #     jumps to .Ltmp54
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp55-.Lfunc_begin5          # >> Call Site 3 <<
	.uleb128 .Ltmp58-.Ltmp55                #   Call between .Ltmp55 and .Ltmp58
	.uleb128 .Ltmp59-.Lfunc_begin5          #     jumps to .Ltmp59
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp58-.Lfunc_begin5          # >> Call Site 4 <<
	.uleb128 .Lfunc_end83-.Ltmp58           #   Call between .Ltmp58 and .Lfunc_end83
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end5:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"axG",@progbits,_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
	.weak	_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE # -- Begin function _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.p2align	1, 0x90
	.type	_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,@function
_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE: # @_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.Lfunc_begin6:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception6
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movq	$_ZTVN6thrust6system6detail9bad_allocE+16, (%rdi)
	leaq	8(%rdi), %r14
	leaq	24(%rdi), %rbp
	movq	%rbp, 8(%rdi)
	movq	$0, 16(%rdi)
	movb	$0, 24(%rdi)
	callq	_ZNKSt9bad_alloc4whatEv
	movq	%rax, %r12
	movq	16(%rbx), %r13
	movq	%rax, %rdi
	callq	strlen
.Ltmp60:
	movq	%r14, %rdi
	xorl	%esi, %esi
	movq	%r13, %rdx
	movq	%r12, %rcx
	movq	%rax, %r8
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm
.Ltmp61:
# %bb.1:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit
.Ltmp62:
	movl	$.L.str.68, %esi
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc
.Ltmp63:
# %bb.2:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc.exit
	movq	(%r15), %rsi
	movq	8(%r15), %rdx
.Ltmp64:
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm
.Ltmp65:
# %bb.3:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLERKS4_.exit
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB84_4:
	.cfi_def_cfa_offset 64
.Ltmp66:
	movq	%rax, %r15
	movq	(%r14), %rdi
	cmpq	%rbp, %rdi
	je	.LBB84_6
# %bb.5:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB84_6:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	%rbx, %rdi
	callq	_ZNSt9bad_allocD2Ev
	movq	%r15, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end84:
	.size	_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .Lfunc_end84-_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"aG",@progbits,_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
	.p2align	2, 0x0
GCC_except_table84:
.Lexception6:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end6-.Lcst_begin6
.Lcst_begin6:
	.uleb128 .Ltmp60-.Lfunc_begin6          # >> Call Site 1 <<
	.uleb128 .Ltmp65-.Ltmp60                #   Call between .Ltmp60 and .Ltmp65
	.uleb128 .Ltmp66-.Lfunc_begin6          #     jumps to .Ltmp66
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp65-.Lfunc_begin6          # >> Call Site 2 <<
	.uleb128 .Lfunc_end84-.Ltmp65           #   Call between .Ltmp65 and .Lfunc_end84
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end6:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system6detail9bad_allocD2Ev,"axG",@progbits,_ZN6thrust6system6detail9bad_allocD2Ev,comdat
	.weak	_ZN6thrust6system6detail9bad_allocD2Ev # -- Begin function _ZN6thrust6system6detail9bad_allocD2Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system6detail9bad_allocD2Ev,@function
_ZN6thrust6system6detail9bad_allocD2Ev: # @_ZN6thrust6system6detail9bad_allocD2Ev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	$_ZTVN6thrust6system6detail9bad_allocE+16, (%rdi)
	movq	8(%rdi), %rdi
	leaq	24(%rbx), %rax
	cmpq	%rax, %rdi
	je	.LBB85_2
# %bb.1:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB85_2:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt9bad_allocD2Ev             # TAILCALL
.Lfunc_end85:
	.size	_ZN6thrust6system6detail9bad_allocD2Ev, .Lfunc_end85-_ZN6thrust6system6detail9bad_allocD2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm,"axG",@progbits,_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm,comdat
	.weak	_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm # -- Begin function _ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm
	.type	_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm,@function
_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm: # @_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm
.Lfunc_begin7:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception7
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	leaq	8(%rsp), %rdi
	movq	$0, (%rdi)
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB86_1
# %bb.16:
	movq	8(%rsp), %rax
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB86_1:
	.cfi_def_cfa_offset 112
	movl	%eax, %ebp
	callq	hipGetLastError
	movl	$40, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp67:
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp68:
# %bb.2:
	movq	(%rax), %rcx
.Ltmp69:
	leaq	16(%rsp), %rdi
	movq	%rax, %rsi
	movl	%ebp, %edx
	callq	*48(%rcx)
.Ltmp70:
# %bb.3:
	movq	16(%rsp), %rsi
.Ltmp72:
	leaq	48(%rsp), %rdi
	leaq	7(%rsp), %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp73:
# %bb.4:
	movb	$1, %bpl
.Ltmp75:
	leaq	48(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.Ltmp76:
# %bb.5:
	xorl	%ebp, %ebp
.Ltmp77:
	movl	$_ZTIN6thrust6system6detail9bad_allocE, %esi
	movl	$_ZN6thrust6system6detail9bad_allocD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.Ltmp78:
# %bb.17:
.LBB86_7:
.Ltmp79:
	movq	%rax, %r14
	leaq	64(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB86_9
# %bb.8:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB86_9:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	leaq	32(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB86_11
# %bb.10:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit14
	callq	_ZdlPv
.LBB86_11:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit14
	testb	%bpl, %bpl
	jne	.LBB86_14
	jmp	.LBB86_15
.LBB86_12:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.thread
.Ltmp74:
	movq	%rax, %r14
	leaq	32(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB86_14
# %bb.13:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit14.thread25
	callq	_ZdlPv
	jmp	.LBB86_14
.LBB86_6:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit14.thread
.Ltmp71:
	movq	%rax, %r14
.LBB86_14:
	movq	%rbx, %rdi
	callq	__cxa_free_exception
.LBB86_15:
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end86:
	.size	_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm, .Lfunc_end86-_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm,"aG",@progbits,_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm,comdat
	.p2align	2, 0x0
GCC_except_table86:
.Lexception7:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end7-.Lcst_begin7
.Lcst_begin7:
	.uleb128 .Lfunc_begin7-.Lfunc_begin7    # >> Call Site 1 <<
	.uleb128 .Ltmp67-.Lfunc_begin7          #   Call between .Lfunc_begin7 and .Ltmp67
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp67-.Lfunc_begin7          # >> Call Site 2 <<
	.uleb128 .Ltmp70-.Ltmp67                #   Call between .Ltmp67 and .Ltmp70
	.uleb128 .Ltmp71-.Lfunc_begin7          #     jumps to .Ltmp71
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp72-.Lfunc_begin7          # >> Call Site 3 <<
	.uleb128 .Ltmp73-.Ltmp72                #   Call between .Ltmp72 and .Ltmp73
	.uleb128 .Ltmp74-.Lfunc_begin7          #     jumps to .Ltmp74
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp75-.Lfunc_begin7          # >> Call Site 4 <<
	.uleb128 .Ltmp78-.Ltmp75                #   Call between .Ltmp75 and .Ltmp78
	.uleb128 .Ltmp79-.Lfunc_begin7          #     jumps to .Ltmp79
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp78-.Lfunc_begin7          # >> Call Site 5 <<
	.uleb128 .Lfunc_end86-.Ltmp78           #   Call between .Ltmp78 and .Lfunc_end86
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end7:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_,"axG",@progbits,_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_,comdat
	.weak	_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_ # -- Begin function _ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_
	.type	_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_,@function
_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_: # @_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_
.Lfunc_begin8:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception8
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rdi
	callq	hipFree
	movl	%eax, %ebp
	callq	hipGetLastError
	testl	%ebp, %ebp
	jne	.LBB87_1
# %bb.5:                                # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB87_1:
	.cfi_def_cfa_offset 32
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp80:
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp81:
# %bb.2:
.Ltmp82:
	movl	$.L.str.71, %ecx
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movq	%rax, %rdx
	callq	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
.Ltmp83:
# %bb.3:
	movl	$_ZTIN6thrust6system12system_errorE, %esi
	movl	$_ZN6thrust6system12system_errorD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB87_4:
.Ltmp84:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end87:
	.size	_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_, .Lfunc_end87-_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_,"aG",@progbits,_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_,comdat
	.p2align	2, 0x0
GCC_except_table87:
.Lexception8:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end8-.Lcst_begin8
.Lcst_begin8:
	.uleb128 .Lfunc_begin8-.Lfunc_begin8    # >> Call Site 1 <<
	.uleb128 .Ltmp80-.Lfunc_begin8          #   Call between .Lfunc_begin8 and .Ltmp80
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp80-.Lfunc_begin8          # >> Call Site 2 <<
	.uleb128 .Ltmp83-.Ltmp80                #   Call between .Ltmp80 and .Ltmp83
	.uleb128 .Ltmp84-.Lfunc_begin8          #     jumps to .Ltmp84
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp83-.Lfunc_begin8          # >> Call Site 3 <<
	.uleb128 .Lfunc_end87-.Ltmp83           #   Call between .Ltmp83 and .Lfunc_end87
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end8:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system6detail9bad_allocD0Ev,"axG",@progbits,_ZN6thrust6system6detail9bad_allocD0Ev,comdat
	.weak	_ZN6thrust6system6detail9bad_allocD0Ev # -- Begin function _ZN6thrust6system6detail9bad_allocD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system6detail9bad_allocD0Ev,@function
_ZN6thrust6system6detail9bad_allocD0Ev: # @_ZN6thrust6system6detail9bad_allocD0Ev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	$_ZTVN6thrust6system6detail9bad_allocE+16, (%rdi)
	movq	8(%rdi), %rdi
	leaq	24(%rbx), %rax
	cmpq	%rax, %rdi
	je	.LBB88_2
# %bb.1:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i
	callq	_ZdlPv
.LBB88_2:                               # %_ZN6thrust6system6detail9bad_allocD2Ev.exit
	movq	%rbx, %rdi
	callq	_ZNSt9bad_allocD2Ev
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end88:
	.size	_ZN6thrust6system6detail9bad_allocD0Ev, .Lfunc_end88-_ZN6thrust6system6detail9bad_allocD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail9bad_alloc4whatEv,"axG",@progbits,_ZNK6thrust6system6detail9bad_alloc4whatEv,comdat
	.weak	_ZNK6thrust6system6detail9bad_alloc4whatEv # -- Begin function _ZNK6thrust6system6detail9bad_alloc4whatEv
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail9bad_alloc4whatEv,@function
_ZNK6thrust6system6detail9bad_alloc4whatEv: # @_ZNK6thrust6system6detail9bad_alloc4whatEv
	.cfi_startproc
# %bb.0:
	movq	8(%rdi), %rax
	retq
.Lfunc_end89:
	.size	_ZNK6thrust6system6detail9bad_alloc4whatEv, .Lfunc_end89-_ZNK6thrust6system6detail9bad_alloc4whatEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm,"axG",@progbits,_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm,comdat
	.weak	_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm # -- Begin function _ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm
	.p2align	1, 0x90
	.type	_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm,@function
_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm: # @_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm
.Lfunc_begin9:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception9
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	(%rdi), %rdi
.Ltmp85:
	callq	_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_
.Ltmp86:
# %bb.1:                                # %_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE10deallocateENS_7pointerIhS3_NS_11use_defaultES6_EEm.exit
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.LBB90_2:
	.cfi_def_cfa_offset 16
.Ltmp87:
	movq	%rax, %rdi
	callq	__cxa_begin_catch
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	__cxa_end_catch                 # TAILCALL
.Lfunc_end90:
	.size	_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm, .Lfunc_end90-_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm,"aG",@progbits,_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm,comdat
	.p2align	2, 0x0
GCC_except_table90:
.Lexception9:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase2-.Lttbaseref2
.Lttbaseref2:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end9-.Lcst_begin9
.Lcst_begin9:
	.uleb128 .Ltmp85-.Lfunc_begin9          # >> Call Site 1 <<
	.uleb128 .Ltmp86-.Ltmp85                #   Call between .Ltmp85 and .Ltmp86
	.uleb128 .Ltmp87-.Lfunc_begin9          #     jumps to .Ltmp87
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp86-.Lfunc_begin9          # >> Call Site 2 <<
	.uleb128 .Lfunc_end90-.Ltmp86           #   Call between .Ltmp86 and .Lfunc_end90
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end9:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase2:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_ItEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_,"axG",@progbits,_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_ItEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_,comdat
	.weak	_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_ItEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_ # -- Begin function _ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_ItEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_
	.p2align	1, 0x90
	.type	_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_ItEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_,@function
_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_ItEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_: # @_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_ItEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_
.Lfunc_begin10:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception10
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r13
	subq	%rdx, %r13
	je	.LBB91_28
# %bb.1:
	movq	%rcx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	shrq	$2, %r13
	xorl	%eax, %eax
	leaq	8(%rsp), %rsi
	movq	%rax, (%rsi)
	negl	%r13d
	.cfi_escape 0x2e, 0x40
	leaq	16(%rsp), %r10
	xorl	%edi, %edi
	movq	%r14, %rdx
	xorl	%ecx, %ecx
	movq	%r14, %r8
	movq	%rbx, %r9
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	$32
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
	movl	%eax, %ebp
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
	testl	%ebp, %ebp
	jne	.LBB91_2
# %bb.7:                                # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit.i.i
	movq	8(%rsp), %r12
	movq	%r15, 16(%rsp)
	xorl	%r15d, %r15d
	xorps	%xmm0, %xmm0
	movups	%xmm0, 24(%rsp)
	testq	%r12, %r12
	je	.LBB91_8
# %bb.9:                                # %.noexc.i.i.i.i
	.cfi_escape 0x2e, 0x00
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm
	movq	%rax, %rdi
	jmp	.LBB91_10
.LBB91_8:
	xorl	%edi, %edi
.LBB91_10:
	movq	%rdi, 24(%rsp)
	movq	%r12, 32(%rsp)
.Ltmp93:
	.cfi_escape 0x2e, 0x40
	leaq	7(%rsp), %rax
	leaq	8(%rsp), %rsi
	movq	%r14, %rdx
	xorl	%ecx, %ecx
	movq	%r14, %r8
	movq	%rbx, %r9
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	$32
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.Ltmp94:
# %bb.11:
.Ltmp95:
	movl	%eax, %ebp
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp96:
# %bb.12:                               # %.noexc.i.i
	testl	%ebp, %ebp
	jne	.LBB91_13
# %bb.17:                               # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit27.i.i
.Ltmp102:
	.cfi_escape 0x2e, 0x00
	xorl	%edi, %edi
	callq	hipStreamSynchronize
.Ltmp103:
# %bb.18:                               # %_ZN6thrust11hip_rocprim20synchronize_optionalINS0_16execution_policyINS0_3tagEEEEE10hipError_tRT_.exit.i.i
.Ltmp104:
	movl	%eax, %ebp
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp105:
# %bb.19:                               # %.noexc30.i.i
	testl	%ebp, %ebp
	jne	.LBB91_20
# %bb.27:                               # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit34.i.i
	.cfi_escape 0x2e, 0x00
	leaq	16(%rsp), %rdi
	callq	_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev
.LBB91_28:                              # %_ZN6thrust11hip_rocprim12__smart_sort10smart_sortINS_6detail17integral_constantIbLb1EEENS0_3tagENS_10device_ptrIjEENS7_ItEENS_4lessIjEEEENS1_24enable_if_primitive_sortIT1_T3_E4typeERNS0_16execution_policyIT0_EESD_SD_T2_SE_.exit
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB91_2:
	.cfi_def_cfa_offset 96
	.cfi_escape 0x2e, 0x00
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp88:
	.cfi_escape 0x2e, 0x00
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp89:
# %bb.3:
.Ltmp90:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movq	%rax, %rdx
	callq	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
.Ltmp91:
# %bb.4:
	.cfi_escape 0x2e, 0x00
	movl	$_ZTIN6thrust6system12system_errorE, %esi
	movl	$_ZN6thrust6system12system_errorD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB91_13:
	.cfi_escape 0x2e, 0x00
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp97:
	.cfi_escape 0x2e, 0x00
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp98:
# %bb.14:
.Ltmp99:
	movq	%rax, %r14
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.1, %esi
	movq	%rbx, %rdi
	callq	_ZNSt13runtime_errorC2EPKc
.Ltmp100:
	jmp	.LBB91_22
.LBB91_20:
	.cfi_escape 0x2e, 0x00
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp106:
	.cfi_escape 0x2e, 0x00
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp107:
# %bb.21:
.Ltmp108:
	movq	%rax, %r14
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	callq	_ZNSt13runtime_errorC2EPKc
.Ltmp109:
.LBB91_22:
	movq	$_ZTVN6thrust6system12system_errorE+16, (%rbx)
	movl	%ebp, 16(%rbx)
	movq	%r14, 24(%rbx)
	movq	%rbx, %rax
	addq	$48, %rax
	movq	%rax, 32(%rbx)
	movq	$0, 40(%rbx)
	movb	$0, 48(%rbx)
.Ltmp111:
	.cfi_escape 0x2e, 0x00
	movl	$_ZTIN6thrust6system12system_errorE, %esi
	movl	$_ZN6thrust6system12system_errorD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.Ltmp112:
# %bb.23:                               # %.cont.i.i
.LBB91_24:
.Ltmp110:
	jmp	.LBB91_16
.LBB91_15:
.Ltmp101:
.LBB91_16:                              # %.body.i.i
	movq	%rax, %r14
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	jmp	.LBB91_26
.LBB91_5:
.Ltmp92:
	movq	%rax, %r14
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	jmp	.LBB91_6
.LBB91_25:
.Ltmp113:
	movq	%rax, %r14
.LBB91_26:                              # %.body.i.i
	.cfi_escape 0x2e, 0x00
	leaq	16(%rsp), %rdi
	callq	_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev
.LBB91_6:                               # %common.resume.i.i
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end91:
	.size	_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_ItEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_, .Lfunc_end91-_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_ItEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_
	.cfi_endproc
	.section	.gcc_except_table._ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_ItEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_,"aG",@progbits,_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEENS3_ItEENS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SC_T1_T2_EN10workaround3parERNS8_IS2_EES4_S4_S5_S7_,comdat
	.p2align	2, 0x0
GCC_except_table91:
.Lexception10:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end10-.Lcst_begin10
.Lcst_begin10:
	.uleb128 .Lfunc_begin10-.Lfunc_begin10  # >> Call Site 1 <<
	.uleb128 .Ltmp93-.Lfunc_begin10         #   Call between .Lfunc_begin10 and .Ltmp93
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp93-.Lfunc_begin10         # >> Call Site 2 <<
	.uleb128 .Ltmp105-.Ltmp93               #   Call between .Ltmp93 and .Ltmp105
	.uleb128 .Ltmp113-.Lfunc_begin10        #     jumps to .Ltmp113
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp105-.Lfunc_begin10        # >> Call Site 3 <<
	.uleb128 .Ltmp88-.Ltmp105               #   Call between .Ltmp105 and .Ltmp88
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp88-.Lfunc_begin10         # >> Call Site 4 <<
	.uleb128 .Ltmp91-.Ltmp88                #   Call between .Ltmp88 and .Ltmp91
	.uleb128 .Ltmp92-.Lfunc_begin10         #     jumps to .Ltmp92
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp91-.Lfunc_begin10         # >> Call Site 5 <<
	.uleb128 .Ltmp97-.Ltmp91                #   Call between .Ltmp91 and .Ltmp97
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp97-.Lfunc_begin10         # >> Call Site 6 <<
	.uleb128 .Ltmp100-.Ltmp97               #   Call between .Ltmp97 and .Ltmp100
	.uleb128 .Ltmp101-.Lfunc_begin10        #     jumps to .Ltmp101
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp100-.Lfunc_begin10        # >> Call Site 7 <<
	.uleb128 .Ltmp106-.Ltmp100              #   Call between .Ltmp100 and .Ltmp106
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp106-.Lfunc_begin10        # >> Call Site 8 <<
	.uleb128 .Ltmp109-.Ltmp106              #   Call between .Ltmp106 and .Ltmp109
	.uleb128 .Ltmp110-.Lfunc_begin10        #     jumps to .Ltmp110
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp111-.Lfunc_begin10        # >> Call Site 9 <<
	.uleb128 .Ltmp112-.Ltmp111              #   Call between .Ltmp111 and .Ltmp112
	.uleb128 .Ltmp113-.Lfunc_begin10        #     jumps to .Ltmp113
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp112-.Lfunc_begin10        # >> Call Site 10 <<
	.uleb128 .Lfunc_end91-.Ltmp112          #   Call between .Ltmp112 and .Lfunc_end91
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end10:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb # -- Begin function _ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,@function
_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb: # @_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movb	120(%rsp), %bpl
	movq	112(%rsp), %r15
	movl	104(%rsp), %r14d
	movl	96(%rsp), %ebx
	movq	88(%rsp), %r12
	movl	80(%rsp), %r10d
	movq	72(%rsp), %rax
	movq	64(%rsp), %r11
	movl	$1024, %r13d                    # imm = 0x400
	movl	%r13d, 4(%rsp)
	cmpl	%r13d, %r10d
	ja	.LBB92_5
# %bb.1:
	testq	%rdi, %rdi
	je	.LBB92_2
# %bb.3:
	movb	$1, (%r12)
	testl	%r10d, %r10d
	je	.LBB92_4
# %bb.8:
	movzbl	%bpl, %r12d
	leaq	4(%rsp), %r11
	movq	%rdx, %rdi
	movq	%r8, %rsi
	movq	%r9, %rdx
	movq	%rax, %rcx
	movl	%r10d, %r8d
	movq	%r11, %r9
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_ItEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	jmp	.LBB92_9
.LBB92_5:
	cmpl	$1048576, %r10d                 # imm = 0x100000
	ja	.LBB92_7
# %bb.6:
	movb	$1, (%r12)
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movzbl	%bpl, %r12d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	jmp	.LBB92_10
.LBB92_7:
	.cfi_def_cfa_offset 64
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb # TAILCALL
.LBB92_2:
	.cfi_def_cfa_offset 64
	movq	$256, (%rsi)                    # imm = 0x100
.LBB92_4:
	xorl	%eax, %eax
.LBB92_9:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
.LBB92_10:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end92:
	.size	_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb, .Lfunc_end92-_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_ItEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
.LCPI93_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI93_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_ItEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_ItEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_ItEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_ItEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb,@function
_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_ItEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb: # @_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_ItEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 1568
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r14
	movl	%r8d, %r15d
	movq	%rcx, %rbp
	movq	%rdx, 24(%rsp)                  # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %r13
	movq	1584(%rsp), %rbx
	testq	$-3, %rbx
	jne	.LBB93_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	12(%rsp), %rdi
	callq	hipGetDevice
	testl	%eax, %eax
	jne	.LBB93_43
# %bb.4:                                # %thread-pre-split.i
	movl	12(%rsp), %esi
	jmp	.LBB93_5
.LBB93_1:
	movq	%rbx, %rdi
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 12(%rsp)
	testl	%eax, %eax
	js	.LBB93_2
.LBB93_5:                               # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB93_43
# %bb.6:
	movq	%rbp, 16(%rsp)                  # 8-byte Spill
	movl	%esi, %ebp
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbp,4), %eax
	testl	%eax, %eax
	je	.LBB93_7
.LBB93_9:
	movl	1576(%rsp), %ecx
	movl	$1024, (%r14)                   # imm = 0x400
	movl	%r15d, %ebp
	shrl	$10, %ebp
	movl	%r15d, %eax
	andl	$1023, %eax                     # imm = 0x3FF
	cmpl	$1, %eax
	sbbl	$-1, %ebp
	subl	1568(%rsp), %ecx
	movl	%ecx, 8(%rsp)                   # 4-byte Spill
	cmpb	$0, 1592(%rsp)
	je	.LBB93_10
# %bb.11:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 40(%rsp)
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	cmpq	$0, _ZSt4cout+16(%rax)
	je	.LBB93_13
# %bb.12:
	leaq	40(%rsp), %rsi
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB93_14
.LBB93_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB93_43
.LBB93_10:                              # %..critedge_crit_edge
	movl	%ebp, %r14d
	xorl	%eax, %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	16(%rsp), %rbp                  # 8-byte Reload
	jmp	.LBB93_33
.LBB93_7:
	leaq	40(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB93_43
# %bb.8:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread96
	leaq	1200(%rsp), %rdi
	leaq	1456(%rsp), %rsi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	leaq	1200(%rsp), %rdi
	subq	%rdi, %rax
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	xchgl	%eax, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbp,4)
	jmp	.LBB93_9
.LBB93_13:
	movl	$_ZSt4cout, %edi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB93_14:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB93_16
# %bb.15:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB93_17
.LBB93_16:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB93_17:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit65
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$256, %esi                      # imm = 0x100
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB93_19
# %bb.18:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB93_20
.LBB93_19:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB93_20:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit68
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$4, %esi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB93_22
# %bb.21:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB93_23
.LBB93_22:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB93_23:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit71
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	(%r14), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB93_25
# %bb.24:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB93_26
.LBB93_25:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB93_26:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit74
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %r14d
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB93_28
# %bb.27:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB93_29
.LBB93_28:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB93_29:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit77
	movq	16(%rsp), %rbp                  # 8-byte Reload
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	8(%rsp), %esi                   # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB93_31
# %bb.30:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB93_32
.LBB93_31:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB93_32:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit80
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 32(%rsp)                  # 8-byte Spill
.LBB93_33:                              # %.critedge
	btsq	$32, %r14
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%rbx, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB93_35
# %bb.34:
	movl	8(%rsp), %eax                   # 4-byte Reload
	movl	%eax, (%rsp)
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movq	%rbp, %rcx
	movl	%r15d, %r8d
	movl	1568(%rsp), %r9d
	callq	_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
.LBB93_35:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB93_41
# %bb.36:
	cmpb	$0, 1592(%rsp)
	je	.LBB93_41
# %bb.37:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB93_43
# %bb.38:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	32(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI93_0(%rip), %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI93_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 40(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB93_40
# %bb.39:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB93_42
.LBB93_41:                              # %.critedge57
	testl	%eax, %eax
	jne	.LBB93_43
	jmp	.LBB93_42
.LBB93_40:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB93_42:
	xorl	%eax, %eax
.LBB93_43:                              # %.critedge57.thread101
	addq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end93:
	.size	_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_ItEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb, .Lfunc_end93-_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_ItEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb # -- Begin function _ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb,@function
_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb: # @_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r14
	movq	%rcx, %rbx
	movq	%rsi, %r15
	movq	%rdi, %r13
	movb	128(%rsp), %r8b
	movq	120(%rsp), %rsi
	movl	112(%rsp), %r10d
	movl	104(%rsp), %r11d
	movl	96(%rsp), %ebp
	movq	88(%rsp), %rcx
	movq	80(%rsp), %rdi
	movl	%r10d, %r12d
	subl	%r11d, %r12d
	movl	$1024, 4(%rsp)                  # imm = 0x400
	testq	%r13, %r13
	je	.LBB94_1
# %bb.2:
	xorl	%eax, %eax
	testl	%ebp, %ebp
	je	.LBB94_6
# %bb.3:
	movq	%rbx, 8(%rsp)                   # 8-byte Spill
	movzbl	%r8b, %ebx
	movq	%rdx, %rdi
	movq	%rsi, %rax
	movq	%r14, %rsi
	movq	%r9, %rdx
	movl	%ebp, %r8d
	leaq	4(%rsp), %r9
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_NS5_ItEES7_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	testl	%eax, %eax
	jne	.LBB94_6
# %bb.4:
	movl	4(%rsp), %r9d
	movl	$0, %eax
	cmpl	%ebp, %r9d
	jae	.LBB94_6
# %bb.5:
	movq	%r13, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	88(%rsp), %rcx
	movl	%ebp, %r8d
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	movl	144(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB94_6:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	jmp	.LBB94_7
.LBB94_1:
	.cfi_def_cfa_offset 80
	movzbl	%r8b, %eax
	movq	%rdi, %r13
	xorl	%edi, %edi
	movq	%rsi, %r10
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebp, %r8d
	movl	$1024, %r9d                     # imm = 0x400
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
.LBB94_7:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end94:
	.size	_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb, .Lfunc_end94-_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_jT5_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb # -- Begin function _ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,@function
_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb: # @_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1704, %rsp                     # imm = 0x6A8
	.cfi_def_cfa_offset 1760
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %rbp
	movq	%rcx, %r15
	movq	%rdx, %r13
	movq	%rsi, %r14
	movq	%rdi, %r12
	movq	1808(%rsp), %rdi
	testq	$-3, %rdi
	jne	.LBB95_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	16(%rsp), %rdi
	callq	hipGetDevice
	testl	%eax, %eax
	jne	.LBB95_35
# %bb.4:                                # %thread-pre-split.i
	movl	16(%rsp), %esi
	jmp	.LBB95_5
.LBB95_1:
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 16(%rsp)
	testl	%eax, %eax
	js	.LBB95_2
.LBB95_5:                               # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB95_35
# %bb.6:
	movq	%r13, 32(%rsp)                  # 8-byte Spill
	movl	%esi, %r13d
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r13,4), %eax
	testl	%eax, %eax
	je	.LBB95_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread199
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	movq	%rbp, 56(%rsp)                  # 8-byte Spill
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
.LBB95_10:
	movl	1800(%rsp), %ebp
	movl	1792(%rsp), %r15d
	movl	1776(%rsp), %r13d
	leaq	232(%rsp), %rbx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEEEDaNS0_11target_archE
	movl	16(%rbx), %esi
	movl	24(%rbx), %ecx
	movl	$1, %r10d
	shlq	%cl, %r10
	imull	12(%rbx), %esi
	movl	$1073741824, %eax               # imm = 0x40000000
	xorl	%edx, %edx
	divl	%esi
	movl	%edx, %r8d
	movl	%ebp, %eax
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	subl	%r15d, %eax
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %r9d
	movl	$1073741824, %eax               # imm = 0x40000000
	xorl	%edi, %edi
	subl	%r8d, %eax
	cmpl	$1, %edx
	sbbl	$-1, %r9d
	movl	%r9d, 12(%rsp)                  # 4-byte Spill
	movl	%r9d, %ebp
	shll	%cl, %ebp
	cmpl	%eax, %r13d
	cmovbl	%r13d, %eax
	xorl	%edx, %edx
	divl	%esi
	movl	%eax, %ebx
	cmpl	$1, %edx
	sbbl	$-1, %ebx
	movl	%ecx, 52(%rsp)                  # 4-byte Spill
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %ebx
	movl	%r13d, %r13d
	leaq	(,%rbp,4), %rax
	leaq	16(%rsp), %rcx
	leaq	112(%rsp), %rsi
	movq	%rcx, (%rsi)
	movq	%rax, 8(%rsi)
	movl	$4, %eax
	movq	%rax, 16(%rsi)
	leaq	104(%rsp), %rcx
	movq	%rcx, 24(%rsi)
	movq	%r10, %r15
	leaq	(,%r10,4), %rcx
	movq	%rcx, 32(%rsi)
	movq	%rax, 40(%rsi)
	leaq	96(%rsp), %rcx
	movq	%rcx, 48(%rsi)
	leaq	(,%rbx,4), %rcx
	cmpq	$0, 40(%rsp)                    # 8-byte Folded Reload
	cmoveq	%r13, %rdi
	movq	%rcx, 56(%rsi)
	movq	%rax, 64(%rsi)
	leaq	88(%rsp), %rcx
	movq	%rcx, 72(%rsi)
	leaq	(,%rdi,4), %rcx
	movq	%rcx, 80(%rsi)
	movq	%rax, 88(%rsi)
	leaq	80(%rsp), %rax
	movq	%rax, 96(%rsi)
	addq	%rdi, %rdi
	movq	%rdi, 104(%rsi)
	movq	$2, 112(%rsi)
	subq	$128, %rsp
	.cfi_adjust_cfa_offset 128
	movl	$15, %ecx
	movq	%rsp, %rdi
	rep;movsq (%rsi), %es:(%rdi)
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEEE10hipError_tPvRmT_
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	testq	%r12, %r12
	je	.LBB95_35
# %bb.11:
	testl	%eax, %eax
	jne	.LBB95_35
# %bb.12:
	xorl	%eax, %eax
	movl	1776(%rsp), %ecx
	testl	%ecx, %ecx
	je	.LBB95_35
# %bb.13:
	movq	%r13, %r14
	movb	1816(%rsp), %r12b
	testb	%r12b, %r12b
	je	.LBB95_27
# %bb.14:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.43, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 11(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB95_16
# %bb.15:
	leaq	11(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB95_17
.LBB95_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB95_35
.LBB95_8:
	leaq	232(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB95_35
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread204
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	movq	%rbp, 56(%rsp)                  # 8-byte Spill
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
	leaq	1392(%rsp), %rbx
	leaq	1648(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%rbx, %rax
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %ecx
	xchgl	%ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r13,4)
	jmp	.LBB95_10
.LBB95_16:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB95_17:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.44, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	12(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 11(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB95_19
# %bb.18:
	leaq	11(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB95_20
.LBB95_19:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB95_20:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit161
	movl	$_ZSt4cout, %edi
	movl	$.L.str.45, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbp, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 11(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB95_22
# %bb.21:
	leaq	11(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB95_23
.LBB95_22:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB95_23:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit164
	movl	$_ZSt4cout, %edi
	movl	$.L.str.46, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbx, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 11(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB95_25
# %bb.24:
	leaq	11(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB95_26
.LBB95_25:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB95_26:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit167
	movq	1808(%rsp), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB95_35
.LBB95_27:
	movq	16(%rsp), %rdx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movzbl	%r12b, %ebx
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movl	1784(%rsp), %ecx
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	20(%rsp), %r8d                  # 4-byte Reload
	movl	1800(%rsp), %r9d
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	1824(%rsp)
	.cfi_adjust_cfa_offset 8
	movl	1824(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	testl	%eax, %eax
	je	.LBB95_28
.LBB95_35:
	addq	$1704, %rsp                     # imm = 0x6A8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB95_28:
	.cfi_def_cfa_offset 1760
	movq	40(%rsp), %r15                  # 8-byte Reload
	testq	%r15, %r15
	movq	88(%rsp), %rsi
	movq	80(%rsp), %r13
	movq	1760(%rsp), %rax
	cmoveq	%r13, %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	cmoveq	%rsi, %r15
	setne	%bpl
	testb	$1, 12(%rsp)                    # 1-byte Folded Reload
	sete	%r12b
	orb	%bpl, %r12b
	je	.LBB95_29
.LBB95_31:
	movl	$0, %eax
	movl	1800(%rsp), %ecx
	movl	1792(%rsp), %edx
	cmpl	%edx, %ecx
	jbe	.LBB95_35
# %bb.32:                               # %.lr.ph.preheader
	orb	12(%rsp), %bpl                  # 1-byte Folded Reload
	xorl	%r13d, %r13d
	movl	%r12d, %eax
.LBB95_33:                              # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%r13d, %r10d
	movl	52(%rsp), %ecx                  # 4-byte Reload
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %r10d
	shlq	$2, %r10
	addq	16(%rsp), %r10
	movzbl	%bpl, %r11d
	andl	$1, %r11d
	movzbl	%al, %eax
	andl	$1, %eax
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rsi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movq	72(%rsp), %r8                   # 8-byte Reload
	movq	1768(%rsp), %r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	1816(%rsp)
	.cfi_adjust_cfa_offset 8
	movl	1816(%rsp), %r12d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	movq	88(%rsp), %r14                  # 8-byte Reload
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	160(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	movl	1848(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	testl	%eax, %eax
	jne	.LBB95_35
# %bb.34:                               #   in Loop: Header=BB95_33 Depth=1
	movl	%ebp, %eax
	andb	$1, %al
	movq	1784(%rsp), %rcx
	movb	%al, (%rcx)
	addl	256(%rsp), %r14d
	xorb	$1, %bpl
	incl	%r13d
	xorl	%eax, %eax
	movq	%r14, 64(%rsp)                  # 8-byte Spill
	cmpl	%r12d, %r14d
	jb	.LBB95_33
	jmp	.LBB95_35
.LBB95_29:
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movq	1808(%rsp), %rcx
	movl	%ebx, %r8d
	callq	_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIjEEPjNS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	testl	%eax, %eax
	jne	.LBB95_35
# %bb.30:
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	%r13, %rsi
	movq	%r14, %rdx
	movq	1808(%rsp), %rcx
	movl	%ebx, %r8d
	callq	_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrItEEPtNS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	testl	%eax, %eax
	jne	.LBB95_35
	jmp	.LBB95_31
.Lfunc_end95:
	.size	_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb, .Lfunc_end95-_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISB_E10value_typeET2_T3_PNSC_ISH_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,"axG",@progbits,_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,comdat
	.weak	_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj # -- Begin function _ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.type	_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,@function
_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj: # @_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end96:
	.size	_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj, .Lfunc_end96-_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv,"axG",@progbits,_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv,comdat
	.weak	_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv # -- Begin function _ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv
	.type	_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv,@function
_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv: # @_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end97:
	.size	_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv, .Lfunc_end97-_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE,"axG",@progbits,_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE,comdat
	.weak	_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE # -- Begin function _ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE
	.type	_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE,@function
_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE: # @_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %rax
	movq	88(%rsp), %r14
	movq	80(%rsp), %rbx
	movb	72(%rsp), %bpl
	movq	64(%rsp), %r11
	movl	56(%rsp), %ecx
	cmpl	$32, %ecx
	jne	.LBB98_3
# %bb.1:
	movzbl	%bpl, %r10d
	movq	%rax, %rcx
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	jmp	.LBB98_2
.LBB98_3:
	movl	48(%rsp), %r10d
	addl	%r10d, %ecx
	movl	$-1, %r15d
	movl	$-1, %r12d
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %r12d
	movl	%r10d, %ecx
	shll	%cl, %r15d
	xorl	%r12d, %r15d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movzbl	%bpl, %r10d
	movq	%rax, %rcx
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB98_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end98:
	.size	_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE, .Lfunc_end98-_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS9_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSB_PNS8_ISH_E10value_typeE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE,"axG",@progbits,_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE,comdat
	.weak	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE # -- Begin function _ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	.type	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE,@function
_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE: # @_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1688, %rsp                     # imm = 0x698
	.cfi_def_cfa_offset 1744
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 16(%rsp)                  # 4-byte Spill
	movl	%r8d, %r15d
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r12
	movq	%rdi, %rbp
	movb	1752(%rsp), %r13b
	movq	1744(%rsp), %rdi
	movl	%r8d, 24(%rsp)
	movb	%r13b, 10(%rsp)
	testq	$-3, %rdi
	jne	.LBB99_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	180(%rsp), %rdi
	callq	hipGetDevice
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB99_82
# %bb.4:                                # %thread-pre-split.i
	movl	180(%rsp), %esi
	jmp	.LBB99_5
.LBB99_1:
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 180(%rsp)
	testl	%eax, %eax
	js	.LBB99_2
.LBB99_5:                               # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB99_82
# %bb.6:
	movq	%r14, 56(%rsp)                  # 8-byte Spill
	movl	%esi, %r14d
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4), %eax
	testl	%eax, %eax
	je	.LBB99_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread150
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
.LBB99_10:
	leaq	180(%rsp), %r14
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEDaNS0_11target_archE
	movl	(%r14), %r9d
	movl	4(%r14), %ecx
	movl	%r9d, 116(%rsp)
	movl	12(%r14), %edi
	movl	%edi, 112(%rsp)
	movl	24(%r14), %r11d
	movl	%r11d, 108(%rsp)
	movl	28(%r14), %r10d
	movl	%r10d, %r8d
	imull	%r11d, %r8d
	movl	%r8d, 104(%rsp)
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	16(%rsp)                        # 4-byte Folded Reload
	movq	%rcx, 152(%rsp)                 # 8-byte Spill
	movl	%ecx, %esi
	movq	%r9, 120(%rsp)                  # 8-byte Spill
	imull	%r9d, %esi
	xorl	%ecx, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, 76(%rsp)                  # 4-byte Spill
	movl	%r15d, %eax
	xorl	%edx, %edx
	movl	%esi, 84(%rsp)                  # 4-byte Spill
	divl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, 80(%rsp)                  # 4-byte Spill
	movl	%eax, 100(%rsp)
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	%r8d
	movl	%eax, %ebx
	cmpl	$1, %edx
	sbbl	$-1, %ebx
	movl	8(%r14), %esi
	cmpl	%r15d, %esi
	setb	11(%rsp)
	movl	%ebx, 96(%rsp)
	leal	1(%rbx), %r9d
	movl	%r9d, 92(%rsp)
	movl	%r9d, %eax
	xorl	%edx, %edx
	movq	%rdi, 160(%rsp)                 # 8-byte Spill
	divl	%edi
	movq	1760(%rsp), %rdi
	movl	%eax, %r14d
	cmpl	$1, %edx
	sbbl	$-1, %r14d
	movl	%r14d, 88(%rsp)
	movq	%rcx, 64(%rsp)
	movq	%rcx, 48(%rsp)
	movq	%rcx, 40(%rsp)
	testq	%rdi, %rdi
	je	.LBB99_11
# %bb.16:
	movq	1768(%rsp), %rdx
	cmpl	%r15d, %esi
	cmovbl	%r9d, %ecx
	leaq	(,%rcx,4), %rax
	cmpq	$5, %rax
	movl	$4, %esi
	cmovaeq	%rax, %rsi
	testq	%rbp, %rbp
	je	.LBB99_17
# %bb.18:
	movl	$1, %eax
	cmpq	%rsi, (%r12)
	jb	.LBB99_20
# %bb.19:
	xorl	%eax, %eax
	testl	%ecx, %ecx
	movq	%rbp, %rcx
	cmoveq	%rax, %rcx
	movq	%rcx, 64(%rsp)
	jmp	.LBB99_20
.LBB99_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB99_82
.LBB99_8:
	leaq	216(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB99_82
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread155
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	leaq	1376(%rsp), %rbx
	leaq	1632(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%rbx, %rax
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %ecx
	xchgl	%ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4)
	jmp	.LBB99_10
.LBB99_11:
	movq	%rbx, 128(%rsp)                 # 8-byte Spill
	movq	%r11, 136(%rsp)                 # 8-byte Spill
	movq	%r10, 144(%rsp)                 # 8-byte Spill
	movl	%r8d, 12(%rsp)                  # 4-byte Spill
	movl	%r14d, 72(%rsp)                 # 4-byte Spill
	movl	%r15d, %eax
	leaq	(,%rax,4), %rdx
	addq	%rax, %rax
	cmpl	%r15d, %esi
	movl	%r9d, %ebx
	cmovbl	%r9d, %ecx
	shlq	$2, %rcx
	leaq	48(%rsp), %rsi
	leaq	216(%rsp), %rdi
	movq	%rsi, (%rdi)
	movq	%rdx, 8(%rdi)
	movl	$4, %r14d
	movq	%r14, 16(%rdi)
	leaq	40(%rsp), %rdx
	movq	%rdx, 24(%rdi)
	movq	%rax, 32(%rdi)
	movq	$2, 40(%rdi)
	leaq	64(%rsp), %rax
	movq	%rax, 48(%rdi)
	movq	%rcx, 56(%rdi)
	movq	%r14, 64(%rdi)
	callq	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE10get_layoutEv
	cmpq	$5, %rax
	cmovaeq	%rax, %r14
	testq	%rbp, %rbp
	je	.LBB99_12
# %bb.13:
	movl	$1, %eax
	cmpq	%r14, (%r12)
	movl	12(%rsp), %r8d                  # 4-byte Reload
	movl	%ebx, %r9d
	jb	.LBB99_15
# %bb.14:
	leaq	216(%rsp), %rdi
	movq	%rbp, %rsi
	callq	_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE11set_storageEPv
	movl	%ebx, %r9d
	movl	12(%rsp), %r8d                  # 4-byte Reload
	xorl	%eax, %eax
	jmp	.LBB99_15
.LBB99_17:
	movq	%rsi, (%r12)
	xorl	%eax, %eax
.LBB99_20:                              # %_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEEEEEEE10hipError_tPvRmT_.exit
	movq	%rdi, 48(%rsp)
	movq	%rdx, 40(%rsp)
	jmp	.LBB99_21
.LBB99_12:
	movq	%r14, (%r12)
	xorl	%eax, %eax
	movl	12(%rsp), %r8d                  # 4-byte Reload
	movl	%ebx, %r9d
.LBB99_15:                              # %_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEENS4_ItEES5_EEEEE10hipError_tPvRmT_.exit
	movl	72(%rsp), %r14d                 # 4-byte Reload
	movq	144(%rsp), %r10                 # 8-byte Reload
	movq	136(%rsp), %r11                 # 8-byte Reload
	movq	128(%rsp), %rbx                 # 8-byte Reload
.LBB99_21:
	testq	%rbp, %rbp
	je	.LBB99_82
# %bb.22:
	testl	%eax, %eax
	jne	.LBB99_82
# %bb.23:
	testl	%r15d, %r15d
	je	.LBB99_81
# %bb.24:
	movq	120(%rsp), %rax                 # 8-byte Reload
	cmpl	%eax, %r8d
	movl	%eax, %ecx
	cmoval	%r8d, %ecx
	movl	$710, %eax                      # imm = 0x2C6
	cmpl	16(%rsp), %ecx                  # 4-byte Folded Reload
	ja	.LBB99_82
# %bb.25:
	testb	%r13b, %r13b
	je	.LBB99_71
# %bb.26:
	movq	%r11, %r13
	movq	%r10, %r12
	movl	%r9d, 12(%rsp)                  # 4-byte Spill
	movl	%r8d, %ebp
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 216(%rsp)
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	cmpq	$0, _ZSt4cout+16(%rax)
	je	.LBB99_28
# %bb.27:
	leaq	216(%rsp), %rsi
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB99_29
.LBB99_28:
	movl	$_ZSt4cout, %edi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB99_29:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB99_31
# %bb.30:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB99_32
.LBB99_31:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB99_32:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit83
	movl	$_ZSt4cout, %edi
	movl	$.L.str.23, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	16(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB99_34
# %bb.33:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB99_35
.LBB99_34:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB99_35:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit86
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	76(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB99_37
# %bb.36:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB99_38
.LBB99_37:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB99_38:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit89
	movl	$_ZSt4cout, %edi
	movl	$.L.str.24, %esi
	movl	$26, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	120(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB99_40
# %bb.39:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB99_41
.LBB99_40:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB99_41:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit92
	movl	$_ZSt4cout, %edi
	movl	$.L.str.25, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	80(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB99_43
# %bb.42:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB99_44
.LBB99_43:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB99_44:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit95
	movl	$_ZSt4cout, %edi
	movl	$.L.str.26, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	152(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB99_46
# %bb.45:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB99_47
.LBB99_46:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB99_47:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit98
	movl	$_ZSt4cout, %edi
	movl	$.L.str.27, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	84(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB99_49
# %bb.48:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB99_50
.LBB99_49:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB99_50:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit101
	movl	$_ZSt4cout, %edi
	movl	$.L.str.28, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r13, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB99_52
# %bb.51:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB99_53
.LBB99_52:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB99_53:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit104
	movl	$_ZSt4cout, %edi
	movl	$.L.str.29, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB99_55
# %bb.54:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB99_56
.LBB99_55:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB99_56:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit107
	movl	$_ZSt4cout, %edi
	movl	$.L.str.30, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB99_58
# %bb.57:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB99_59
.LBB99_58:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB99_59:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit110
	movl	$_ZSt4cout, %edi
	movl	$.L.str.31, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB99_61
# %bb.60:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB99_62
.LBB99_61:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB99_62:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit113
	movl	$_ZSt4cout, %edi
	movl	$.L.str.32, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	12(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB99_64
# %bb.63:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB99_65
.LBB99_64:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB99_65:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit116
	movl	$_ZSt4cout, %edi
	movl	$.L.str.33, %esi
	movl	$38, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	160(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB99_67
# %bb.66:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB99_68
.LBB99_67:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB99_68:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit119
	movl	$_ZSt4cout, %edi
	movl	$.L.str.34, %esi
	movl	$44, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r14d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB99_70
# %bb.69:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB99_71
.LBB99_70:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB99_71:
	movq	$0, 168(%rsp)
	movl	16(%rsp), %eax                  # 4-byte Reload
	movl	%eax, 20(%rsp)
	cmpl	%eax, %r15d
	jbe	.LBB99_81
# %bb.72:                               # %.lr.ph
	movb	$1, %al
	leaq	96(%rsp), %r12
	leaq	108(%rsp), %r13
	leaq	100(%rsp), %rbp
	leaq	116(%rsp), %r14
	leaq	216(%rsp), %rbx
.LBB99_73:                              # =>This Inner Loop Header: Depth=1
	movl	%eax, %r15d
	leaq	11(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	10(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	1744(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	92(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	31(%rsp), %rax
	movq	%rax, 304(%rsp)
	movq	%r12, 312(%rsp)
	movq	%r13, 320(%rsp)
	movq	%rbp, 328(%rsp)
	movq	%r14, 336(%rsp)
	movq	48(%rsp), %rdx
	movq	40(%rsp), %r8
	movq	%rbx, %rdi
	testb	%r15b, %r15b
	je	.LBB99_74
# %bb.75:                               #   in Loop: Header=BB99_73 Depth=1
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	32(%rsp), %rcx                  # 8-byte Reload
	callq	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_
	jmp	.LBB99_76
.LBB99_74:                              #   in Loop: Header=BB99_73 Depth=1
	movq	%rdx, %rsi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movq	%r8, %rcx
	movq	32(%rsp), %r8                   # 8-byte Reload
	callq	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_
.LBB99_76:                              #   in Loop: Header=BB99_73 Depth=1
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB99_82
# %bb.77:                               #   in Loop: Header=BB99_73 Depth=1
	movl	%r15d, %eax
	xorb	$1, %al
	movl	20(%rsp), %ecx
	addl	%ecx, %ecx
	movl	%ecx, 20(%rsp)
	movl	24(%rsp), %edx
	cmpl	%edx, %ecx
	jb	.LBB99_73
# %bb.78:                               # %._crit_edge
	testb	$1, %r15b
	jne	.LBB99_79
.LBB99_81:
	xorl	%eax, %eax
.LBB99_82:
                                        # kill: def $eax killed $eax killed $rax
	addq	$1688, %rsp                     # imm = 0x698
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB99_79:
	.cfi_def_cfa_offset 1744
	movq	48(%rsp), %rdi
	movq	1744(%rsp), %rcx
	movzbl	10(%rsp), %r8d
	movq	56(%rsp), %rsi                  # 8-byte Reload
	callq	_ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB99_82
# %bb.80:
	movq	40(%rsp), %rdi
	movl	24(%rsp), %edx
	movq	1744(%rsp), %rcx
	movzbl	10(%rsp), %r8d
	movq	32(%rsp), %rsi                  # 8-byte Reload
	callq	_ZN7rocprim9transformINS_14default_configEPtN6thrust10device_ptrItEENS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB99_82
	jmp	.LBB99_81
.Lfunc_end99:
	.size	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE, .Lfunc_end99-_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE,"axG",@progbits,_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE,comdat
	.weak	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE # -- Begin function _ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	.type	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE,@function
_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE: # @_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1688, %rsp                     # imm = 0x698
	.cfi_def_cfa_offset 1744
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 20(%rsp)                  # 4-byte Spill
	movl	%r8d, %r15d
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r12
	movq	%rdi, %rbp
	movb	1760(%rsp), %r13b
	movq	1752(%rsp), %rdi
	movl	%r8d, 28(%rsp)
	movb	%r13b, 14(%rsp)
	testq	$-3, %rdi
	jne	.LBB100_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	180(%rsp), %rdi
	callq	hipGetDevice
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB100_82
# %bb.4:                                # %thread-pre-split.i
	movl	180(%rsp), %esi
	jmp	.LBB100_5
.LBB100_1:
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 180(%rsp)
	testl	%eax, %eax
	js	.LBB100_2
.LBB100_5:                              # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB100_82
# %bb.6:
	movq	%r14, 56(%rsp)                  # 8-byte Spill
	movl	%esi, %r14d
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4), %eax
	testl	%eax, %eax
	je	.LBB100_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread150
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
.LBB100_10:
	leaq	180(%rsp), %r14
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEDaNS0_11target_archE
	movl	(%r14), %r9d
	movl	4(%r14), %ecx
	movl	%r9d, 116(%rsp)
	movl	12(%r14), %edi
	movl	%edi, 112(%rsp)
	movl	24(%r14), %r11d
	movl	%r11d, 108(%rsp)
	movl	28(%r14), %r10d
	movl	%r10d, %r8d
	imull	%r11d, %r8d
	movl	%r8d, 104(%rsp)
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	20(%rsp)                        # 4-byte Folded Reload
	movq	%rcx, 152(%rsp)                 # 8-byte Spill
	movl	%ecx, %esi
	movq	%r9, 120(%rsp)                  # 8-byte Spill
	imull	%r9d, %esi
	xorl	%ecx, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, 76(%rsp)                  # 4-byte Spill
	movl	%r15d, %eax
	xorl	%edx, %edx
	movl	%esi, 84(%rsp)                  # 4-byte Spill
	divl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, 80(%rsp)                  # 4-byte Spill
	movl	%eax, 100(%rsp)
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	%r8d
	movl	%eax, %ebx
	cmpl	$1, %edx
	sbbl	$-1, %ebx
	movl	8(%r14), %esi
	cmpl	%r15d, %esi
	setb	15(%rsp)
	movl	%ebx, 96(%rsp)
	leal	1(%rbx), %r9d
	movl	%r9d, 92(%rsp)
	movl	%r9d, %eax
	xorl	%edx, %edx
	movq	%rdi, 160(%rsp)                 # 8-byte Spill
	divl	%edi
	movq	1768(%rsp), %rdi
	movl	%eax, %r14d
	cmpl	$1, %edx
	sbbl	$-1, %r14d
	movl	%r14d, 88(%rsp)
	movq	%rcx, 64(%rsp)
	movq	%rcx, 48(%rsp)
	movq	%rcx, 40(%rsp)
	testq	%rdi, %rdi
	je	.LBB100_11
# %bb.16:
	movq	1776(%rsp), %rdx
	cmpl	%r15d, %esi
	cmovbl	%r9d, %ecx
	leaq	(,%rcx,4), %rax
	cmpq	$5, %rax
	movl	$4, %esi
	cmovaeq	%rax, %rsi
	testq	%rbp, %rbp
	je	.LBB100_17
# %bb.18:
	movl	$1, %eax
	cmpq	%rsi, (%r12)
	jb	.LBB100_20
# %bb.19:
	xorl	%eax, %eax
	testl	%ecx, %ecx
	movq	%rbp, %rcx
	cmoveq	%rax, %rcx
	movq	%rcx, 64(%rsp)
	jmp	.LBB100_20
.LBB100_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB100_82
.LBB100_8:
	leaq	216(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB100_82
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread155
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	leaq	1376(%rsp), %rbx
	leaq	1632(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%rbx, %rax
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %ecx
	xchgl	%ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4)
	jmp	.LBB100_10
.LBB100_11:
	movq	%rbx, 128(%rsp)                 # 8-byte Spill
	movq	%r11, 136(%rsp)                 # 8-byte Spill
	movq	%r10, 144(%rsp)                 # 8-byte Spill
	movl	%r8d, 16(%rsp)                  # 4-byte Spill
	movl	%r14d, 72(%rsp)                 # 4-byte Spill
	movl	%r15d, %eax
	leaq	(,%rax,4), %rdx
	addq	%rax, %rax
	cmpl	%r15d, %esi
	movl	%r9d, %ebx
	cmovbl	%r9d, %ecx
	shlq	$2, %rcx
	leaq	48(%rsp), %rsi
	leaq	216(%rsp), %rdi
	movq	%rsi, (%rdi)
	movq	%rdx, 8(%rdi)
	movl	$4, %r14d
	movq	%r14, 16(%rdi)
	leaq	40(%rsp), %rdx
	movq	%rdx, 24(%rdi)
	movq	%rax, 32(%rdi)
	movq	$2, 40(%rdi)
	leaq	64(%rsp), %rax
	movq	%rax, 48(%rdi)
	movq	%rcx, 56(%rdi)
	movq	%r14, 64(%rdi)
	callq	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE10get_layoutEv
	cmpq	$5, %rax
	cmovaeq	%rax, %r14
	testq	%rbp, %rbp
	je	.LBB100_12
# %bb.13:
	movl	$1, %eax
	cmpq	%r14, (%r12)
	movl	16(%rsp), %r8d                  # 4-byte Reload
	movl	%ebx, %r9d
	jb	.LBB100_15
# %bb.14:
	leaq	216(%rsp), %rdi
	movq	%rbp, %rsi
	callq	_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE11set_storageEPv
	movl	%ebx, %r9d
	movl	16(%rsp), %r8d                  # 4-byte Reload
	xorl	%eax, %eax
	jmp	.LBB100_15
.LBB100_17:
	movq	%rsi, (%r12)
	xorl	%eax, %eax
.LBB100_20:                             # %_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEEEEEEE10hipError_tPvRmT_.exit
	movq	%rdi, 48(%rsp)
	movq	%rdx, 40(%rsp)
	jmp	.LBB100_21
.LBB100_12:
	movq	%r14, (%r12)
	xorl	%eax, %eax
	movl	16(%rsp), %r8d                  # 4-byte Reload
	movl	%ebx, %r9d
.LBB100_15:                             # %_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEENS4_ItEES5_EEEEE10hipError_tPvRmT_.exit
	movl	72(%rsp), %r14d                 # 4-byte Reload
	movq	144(%rsp), %r10                 # 8-byte Reload
	movq	136(%rsp), %r11                 # 8-byte Reload
	movq	128(%rsp), %rbx                 # 8-byte Reload
.LBB100_21:
	testq	%rbp, %rbp
	je	.LBB100_82
# %bb.22:
	testl	%eax, %eax
	jne	.LBB100_82
# %bb.23:
	testl	%r15d, %r15d
	je	.LBB100_81
# %bb.24:
	movq	120(%rsp), %rax                 # 8-byte Reload
	cmpl	%eax, %r8d
	movl	%eax, %ecx
	cmoval	%r8d, %ecx
	movl	$710, %eax                      # imm = 0x2C6
	cmpl	20(%rsp), %ecx                  # 4-byte Folded Reload
	ja	.LBB100_82
# %bb.25:
	testb	%r13b, %r13b
	je	.LBB100_71
# %bb.26:
	movq	%r11, %r13
	movq	%r10, %r12
	movl	%r9d, 16(%rsp)                  # 4-byte Spill
	movl	%r8d, %ebp
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 216(%rsp)
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	cmpq	$0, _ZSt4cout+16(%rax)
	je	.LBB100_28
# %bb.27:
	leaq	216(%rsp), %rsi
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB100_29
.LBB100_28:
	movl	$_ZSt4cout, %edi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB100_29:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB100_31
# %bb.30:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB100_32
.LBB100_31:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB100_32:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit83
	movl	$_ZSt4cout, %edi
	movl	$.L.str.23, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	20(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB100_34
# %bb.33:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB100_35
.LBB100_34:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB100_35:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit86
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	76(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB100_37
# %bb.36:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB100_38
.LBB100_37:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB100_38:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit89
	movl	$_ZSt4cout, %edi
	movl	$.L.str.24, %esi
	movl	$26, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	120(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB100_40
# %bb.39:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB100_41
.LBB100_40:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB100_41:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit92
	movl	$_ZSt4cout, %edi
	movl	$.L.str.25, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	80(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB100_43
# %bb.42:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB100_44
.LBB100_43:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB100_44:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit95
	movl	$_ZSt4cout, %edi
	movl	$.L.str.26, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	152(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB100_46
# %bb.45:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB100_47
.LBB100_46:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB100_47:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit98
	movl	$_ZSt4cout, %edi
	movl	$.L.str.27, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	84(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB100_49
# %bb.48:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB100_50
.LBB100_49:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB100_50:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit101
	movl	$_ZSt4cout, %edi
	movl	$.L.str.28, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r13, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB100_52
# %bb.51:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB100_53
.LBB100_52:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB100_53:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit104
	movl	$_ZSt4cout, %edi
	movl	$.L.str.29, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB100_55
# %bb.54:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB100_56
.LBB100_55:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB100_56:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit107
	movl	$_ZSt4cout, %edi
	movl	$.L.str.30, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB100_58
# %bb.57:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB100_59
.LBB100_58:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB100_59:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit110
	movl	$_ZSt4cout, %edi
	movl	$.L.str.31, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB100_61
# %bb.60:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB100_62
.LBB100_61:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB100_62:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit113
	movl	$_ZSt4cout, %edi
	movl	$.L.str.32, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	16(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB100_64
# %bb.63:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB100_65
.LBB100_64:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB100_65:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit116
	movl	$_ZSt4cout, %edi
	movl	$.L.str.33, %esi
	movl	$38, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	160(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB100_67
# %bb.66:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB100_68
.LBB100_67:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB100_68:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit119
	movl	$_ZSt4cout, %edi
	movl	$.L.str.34, %esi
	movl	$44, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r14d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB100_70
# %bb.69:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB100_71
.LBB100_70:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB100_71:
	movq	$0, 168(%rsp)
	movl	20(%rsp), %eax                  # 4-byte Reload
	movl	%eax, 24(%rsp)
	cmpl	%eax, %r15d
	jbe	.LBB100_81
# %bb.72:                               # %.lr.ph
	movb	$1, %al
	leaq	96(%rsp), %r12
	leaq	108(%rsp), %r13
	leaq	100(%rsp), %rbp
	leaq	116(%rsp), %r14
	leaq	216(%rsp), %rbx
.LBB100_73:                             # =>This Inner Loop Header: Depth=1
	movl	%eax, %r15d
	leaq	15(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	14(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	1752(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	92(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	1744(%rsp), %rax
	movq	%rax, 304(%rsp)
	movq	%r12, 312(%rsp)
	movq	%r13, 320(%rsp)
	movq	%rbp, 328(%rsp)
	movq	%r14, 336(%rsp)
	movq	48(%rsp), %rdx
	movq	40(%rsp), %r8
	movq	%rbx, %rdi
	testb	%r15b, %r15b
	je	.LBB100_74
# %bb.75:                               #   in Loop: Header=BB100_73 Depth=1
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	32(%rsp), %rcx                  # 8-byte Reload
	callq	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_
	jmp	.LBB100_76
.LBB100_74:                             #   in Loop: Header=BB100_73 Depth=1
	movq	%rdx, %rsi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movq	%r8, %rcx
	movq	32(%rsp), %r8                   # 8-byte Reload
	callq	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_
.LBB100_76:                             #   in Loop: Header=BB100_73 Depth=1
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB100_82
# %bb.77:                               #   in Loop: Header=BB100_73 Depth=1
	movl	%r15d, %eax
	xorb	$1, %al
	movl	24(%rsp), %ecx
	addl	%ecx, %ecx
	movl	%ecx, 24(%rsp)
	movl	28(%rsp), %edx
	cmpl	%edx, %ecx
	jb	.LBB100_73
# %bb.78:                               # %._crit_edge
	testb	$1, %r15b
	jne	.LBB100_79
.LBB100_81:
	xorl	%eax, %eax
.LBB100_82:
                                        # kill: def $eax killed $eax killed $rax
	addq	$1688, %rsp                     # imm = 0x698
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB100_79:
	.cfi_def_cfa_offset 1744
	movq	48(%rsp), %rdi
	movq	1752(%rsp), %rcx
	movzbl	14(%rsp), %r8d
	movq	56(%rsp), %rsi                  # 8-byte Reload
	callq	_ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB100_82
# %bb.80:
	movq	40(%rsp), %rdi
	movl	28(%rsp), %edx
	movq	1752(%rsp), %rcx
	movzbl	14(%rsp), %r8d
	movq	32(%rsp), %rsi                  # 8-byte Reload
	callq	_ZN7rocprim9transformINS_14default_configEPtN6thrust10device_ptrItEENS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB100_82
	jmp	.LBB100_81
.Lfunc_end100:
	.size	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE, .Lfunc_end100-_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEDaNS0_11target_archE,"axG",@progbits,_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEDaNS0_11target_archE,comdat
	.weak	_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEDaNS0_11target_archE # -- Begin function _ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEDaNS0_11target_archE
	.type	_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEDaNS0_11target_archE,@function
_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEDaNS0_11target_archE: # @_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEDaNS0_11target_archE
	.cfi_startproc
# %bb.0:
	movq	%rdi, %rax
	cmpl	$907, %esi                      # imm = 0x38B
	jle	.LBB101_1
# %bb.8:
	cmpl	$1029, %esi                     # imm = 0x405
	jle	.LBB101_9
# %bb.12:
	cmpl	$1030, %esi                     # imm = 0x406
	je	.LBB101_20
# %bb.13:
	cmpl	$1100, %esi                     # imm = 0x44C
	je	.LBB101_21
# %bb.14:
	cmpl	$1102, %esi                     # imm = 0x44E
	jne	.LBB101_16
# %bb.15:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE(%rip), %xmm0
	jmp	.LBB101_17
.LBB101_1:
	cmpl	$899, %esi                      # imm = 0x383
	jg	.LBB101_5
# %bb.2:
	cmpl	$-1, %esi
	je	.LBB101_16
# %bb.3:
	cmpl	$803, %esi                      # imm = 0x323
	jne	.LBB101_16
# %bb.4:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE(%rip), %xmm0
	jmp	.LBB101_17
.LBB101_5:
	cmpl	$900, %esi                      # imm = 0x384
	je	.LBB101_18
# %bb.6:
	cmpl	$906, %esi                      # imm = 0x38A
	jne	.LBB101_16
# %bb.7:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE(%rip), %xmm0
	jmp	.LBB101_17
.LBB101_9:
	cmpl	$908, %esi                      # imm = 0x38C
	je	.LBB101_19
# %bb.10:
	cmpl	$910, %esi                      # imm = 0x38E
	jne	.LBB101_16
# %bb.11:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE(%rip), %xmm0
	jmp	.LBB101_17
.LBB101_16:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE(%rip), %xmm0
	jmp	.LBB101_17
.LBB101_18:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE(%rip), %xmm0
	jmp	.LBB101_17
.LBB101_20:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE(%rip), %xmm0
	jmp	.LBB101_17
.LBB101_19:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE(%rip), %xmm0
	jmp	.LBB101_17
.LBB101_21:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE(%rip), %xmm0
.LBB101_17:
	movups	%xmm0, (%rax)
	movl	$-1, 32(%rax)
	retq
.Lfunc_end101:
	.size	_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEDaNS0_11target_archE, .Lfunc_end101-_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEDaNS0_11target_archE
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_
.LCPI102_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI102_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_,"axG",@progbits,_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_,comdat
	.weak	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_
	.p2align	1, 0x90
	.type	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_,@function
_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_: # @_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	movq	(%rdi), %rax
	cmpb	$0, (%rax)
	je	.LBB102_20
# %bb.1:
	movq	8(%rbx), %rax
	movq	16(%rbx), %rcx
	movl	(%rax), %eax
	cmpl	(%rcx), %eax
	jae	.LBB102_2
.LBB102_20:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB102_22
# %bb.21:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB102_22:
	movq	56(%rbx), %rax
	movq	112(%rbx), %rcx
	movl	(%rcx), %edi
	movq	120(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB102_24
# %bb.23:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	callq	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
.LBB102_24:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB102_31
# %bb.25:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB102_31
# %bb.26:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.37, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB102_31
# %bb.27:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI102_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI102_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB102_29
# %bb.28:
	leaq	15(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB102_30
.LBB102_2:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB102_4
# %bb.3:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB102_4:
	movq	40(%rbx), %rax
	movq	48(%rbx), %rcx
	movl	(%rax), %edi
	movl	(%rcx), %edx
	movq	56(%rbx), %rax
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB102_6
# %bb.5:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %esi
	movq	72(%rbx), %rcx
	movl	(%rcx), %edx
	movq	80(%rbx), %rcx
	movq	(%rcx), %rcx
	movl	(%rax), %r8d
	movq	%r13, %rdi
	callq	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
.LBB102_6:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB102_31
# %bb.7:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB102_14
# %bb.8:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.35, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB102_31
# %bb.9:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI102_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI102_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movb	$10, 14(%rsp)
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.LBB102_11
# %bb.10:
	leaq	14(%rsp), %rsi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB102_12
.LBB102_29:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
	jmp	.LBB102_30
.LBB102_11:
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB102_12:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB102_14
# %bb.13:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB102_14:                             # %.thread
	movq	56(%rbx), %rax
	movq	96(%rbx), %rcx
	movl	(%rcx), %edi
	movq	104(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB102_16
# %bb.15:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	80(%rbx), %rax
	movq	(%rax), %rax
	movq	%rax, (%rsp)
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	callq	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
.LBB102_16:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB102_31
# %bb.17:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB102_31
# %bb.18:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.36, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB102_31
# %bb.19:                               # %select.unfold
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI102_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI102_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
.LBB102_30:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit80
	xorl	%eax, %eax
.LBB102_31:                             # %.critedge
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end102:
	.size	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_, .Lfunc_end102-_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_
.LCPI103_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI103_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_,"axG",@progbits,_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_,comdat
	.weak	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_
	.p2align	1, 0x90
	.type	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_,@function
_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_: # @_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	movq	(%rdi), %rax
	cmpb	$0, (%rax)
	je	.LBB103_20
# %bb.1:
	movq	8(%rbx), %rax
	movq	16(%rbx), %rcx
	movl	(%rax), %eax
	cmpl	(%rcx), %eax
	jae	.LBB103_2
.LBB103_20:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB103_22
# %bb.21:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB103_22:
	movq	56(%rbx), %rax
	movq	112(%rbx), %rcx
	movl	(%rcx), %edi
	movq	120(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB103_24
# %bb.23:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	callq	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
.LBB103_24:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB103_31
# %bb.25:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB103_31
# %bb.26:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.37, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB103_31
# %bb.27:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI103_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI103_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB103_29
# %bb.28:
	leaq	15(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB103_30
.LBB103_2:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB103_4
# %bb.3:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB103_4:
	movq	40(%rbx), %rax
	movq	48(%rbx), %rcx
	movl	(%rax), %edi
	movl	(%rcx), %edx
	movq	56(%rbx), %rax
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB103_6
# %bb.5:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %esi
	movq	72(%rbx), %rcx
	movl	(%rcx), %edx
	movq	80(%rbx), %rcx
	movq	(%rcx), %rcx
	movl	(%rax), %r8d
	movq	%r13, %rdi
	callq	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
.LBB103_6:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB103_31
# %bb.7:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB103_14
# %bb.8:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.35, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB103_31
# %bb.9:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI103_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI103_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movb	$10, 14(%rsp)
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.LBB103_11
# %bb.10:
	leaq	14(%rsp), %rsi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB103_12
.LBB103_29:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
	jmp	.LBB103_30
.LBB103_11:
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB103_12:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB103_14
# %bb.13:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB103_14:                             # %.thread
	movq	56(%rbx), %rax
	movq	96(%rbx), %rcx
	movl	(%rcx), %edi
	movq	104(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB103_16
# %bb.15:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	80(%rbx), %rax
	movq	(%rax), %rax
	movq	%rax, (%rsp)
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	callq	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
.LBB103_16:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB103_31
# %bb.17:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB103_31
# %bb.18:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.36, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB103_31
# %bb.19:                               # %select.unfold
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI103_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI103_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
.LBB103_30:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit80
	xorl	%eax, %eax
.LBB103_31:                             # %.critedge
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end103:
	.size	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_, .Lfunc_end103-_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim9transformINS_14default_configEPtN6thrust10device_ptrItEENS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
.LCPI104_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI104_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim9transformINS_14default_configEPtN6thrust10device_ptrItEENS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,"axG",@progbits,_ZN7rocprim9transformINS_14default_configEPtN6thrust10device_ptrItEENS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,comdat
	.weak	_ZN7rocprim9transformINS_14default_configEPtN6thrust10device_ptrItEENS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.type	_ZN7rocprim9transformINS_14default_configEPtN6thrust10device_ptrItEENS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,@function
_ZN7rocprim9transformINS_14default_configEPtN6thrust10device_ptrItEENS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb: # @_ZN7rocprim9transformINS_14default_configEPtN6thrust10device_ptrItEENS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1560, %rsp                     # imm = 0x618
	.cfi_def_cfa_offset 1616
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, 8(%rsp)                   # 4-byte Spill
	testq	%rdx, %rdx
	je	.LBB104_1
# %bb.2:
	movq	%rcx, %r14
	movq	%rdx, %rbp
	movq	%rsi, %r15
	movq	%rdi, %r12
	testq	$-3, %rcx
	jne	.LBB104_3
# %bb.5:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	12(%rsp), %rdi
	callq	hipGetDevice
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB104_41
# %bb.6:                                # %thread-pre-split.i
	movl	12(%rsp), %eax
	jmp	.LBB104_7
.LBB104_1:
	xorl	%r13d, %r13d
	jmp	.LBB104_41
.LBB104_3:
	movq	%r14, %rdi
	callq	hipGetStreamDeviceId
	movl	%eax, 12(%rsp)
	testl	%eax, %eax
	js	.LBB104_4
.LBB104_7:                              # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %r13d                     # imm = 0x3E7
	cmpl	$511, %eax                      # imm = 0x1FF
	ja	.LBB104_41
# %bb.8:
	movl	%eax, %ebx
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4), %edi
	testl	%edi, %edi
	je	.LBB104_10
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread103
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r15, 40(%rsp)                  # 8-byte Spill
.LBB104_12:
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEtEEEEDaNS0_11target_archE
	movq	%rax, %rsi
	movl	%edx, %eax
	movq	%rsi, %rcx
	shrq	$32, %rcx
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	imull	%esi, %ecx
	xorl	%r13d, %r13d
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %r12d
	cmpl	$1, %eax
	adcl	$0, %r12d
	leaq	-1(%rbp), %rbx
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	movq	%rcx, 24(%rsp)                  # 8-byte Spill
	je	.LBB104_26
# %bb.13:
	leaq	(%rbx,%rcx), %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %r15
	movl	$_ZSt4cout, %edi
	movl	$.L.str.38, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	16(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB104_15
# %bb.14:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB104_16
.LBB104_4:
	movl	$400, %r13d                     # imm = 0x190
	jmp	.LBB104_41
.LBB104_10:
	leaq	88(%rsp), %rdi
	movl	%eax, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	je	.LBB104_11
.LBB104_35:                             # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit
	movl	%eax, %r13d
	jmp	.LBB104_41
.LBB104_15:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB104_16:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.39, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB104_18
# %bb.17:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB104_19
.LBB104_18:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB104_19:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit73
	movl	$_ZSt4cout, %edi
	movl	$.L.str.40, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB104_21
# %bb.20:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB104_22
.LBB104_21:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB104_22:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit76
	movl	$_ZSt4cout, %edi
	movl	$.L.str.41, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB104_24
# %bb.23:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB104_25
.LBB104_24:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB104_25:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit79
	movq	24(%rsp), %rcx                  # 8-byte Reload
.LBB104_26:                             # %._crit_edge
	movq	%rbp, 80(%rsp)                  # 8-byte Spill
	imulq	%rcx, %r12
	leaq	(%rbx,%r12), %rax
	xorl	%edx, %edx
	divq	%r12
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	addq	%r12, %rbx
	jb	.LBB104_41
# %bb.27:                               # %.lr.ph
	leaq	-1(%rcx), %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movl	16(%rsp), %eax                  # 4-byte Reload
	btsq	$32, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%ebx, %ebx
	xorl	%ebp, %ebp
	xorl	%eax, %eax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
.LBB104_28:                             # =>This Inner Loop Header: Depth=1
	movq	80(%rsp), %r15                  # 8-byte Reload
	subq	%rbp, %r15
	cmpq	%r12, %r15
	cmovaeq	%r12, %r15
	movq	64(%rsp), %rax                  # 8-byte Reload
	addq	%r15, %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %r13
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB104_30
# %bb.29:                               #   in Loop: Header=BB104_28 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 48(%rsp)                  # 8-byte Spill
.LBB104_30:                             #   in Loop: Header=BB104_28 Depth=1
	movl	%r13d, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	$1, %esi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%r14, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB104_32
# %bb.31:                               #   in Loop: Header=BB104_28 Depth=1
	movq	32(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rbp,2), %rdi
	movq	40(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rbp,2), %rdx
	movq	%r15, %rsi
	callq	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_
.LBB104_32:                             #   in Loop: Header=BB104_28 Depth=1
	callq	hipGetLastError
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB104_38
# %bb.33:                               #   in Loop: Header=BB104_28 Depth=1
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB104_38
# %bb.34:                               #   in Loop: Header=BB104_28 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.42, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB104_35
# %bb.36:                               #   in Loop: Header=BB104_28 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	48(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI104_0(%rip), %xmm0
	movsd	%xmm0, 56(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	56(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI104_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 88(%rsp)
	movq	(%r15), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%r15,%rax)
	je	.LBB104_39
# %bb.37:                               #   in Loop: Header=BB104_28 Depth=1
	movl	$1, %edx
	movq	%r15, %rdi
	leaq	88(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB104_40
.LBB104_38:                             #   in Loop: Header=BB104_28 Depth=1
	testl	%r13d, %r13d
	je	.LBB104_40
	jmp	.LBB104_41
.LBB104_39:                             #   in Loop: Header=BB104_28 Depth=1
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB104_40:                             #   in Loop: Header=BB104_28 Depth=1
	incq	%rbx
	addq	%r12, %rbp
	xorl	%r13d, %r13d
	cmpq	72(%rsp), %rbx                  # 8-byte Folded Reload
	movq	24(%rsp), %rcx                  # 8-byte Reload
	jb	.LBB104_28
.LBB104_41:                             # %.thread114
	movl	%r13d, %eax
	addq	$1560, %rsp                     # imm = 0x618
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB104_11:                             # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread108
	.cfi_def_cfa_offset 1616
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	leaq	1248(%rsp), %r15
	leaq	1504(%rsp), %rsi
	movq	%r15, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%r15, %rax
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %edi
	xchgl	%eax, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4)
	jmp	.LBB104_12
.Lfunc_end104:
	.size	_ZN7rocprim9transformINS_14default_configEPtN6thrust10device_ptrItEENS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb, .Lfunc_end104-_ZN7rocprim9transformINS_14default_configEPtN6thrust10device_ptrItEENS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE10get_layoutEv,"axG",@progbits,_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE10get_layoutEv,comdat
	.weak	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE10get_layoutEv # -- Begin function _ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE10get_layoutEv
	.p2align	1, 0x90
	.type	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE10get_layoutEv,@function
_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE10get_layoutEv: # @_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE10get_layoutEv
	.cfi_startproc
# %bb.0:                                # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE10get_layoutEvENKUlRKT_E_clIS4_EEDaS9_.exit.i.i
	movq	8(%rdi), %rax
	movq	16(%rdi), %rsi
	movq	32(%rdi), %r8
	movq	40(%rdi), %rcx
	testq	%r8, %r8
	je	.LBB105_2
# %bb.1:
	xorl	%edx, %edx
	divq	%rcx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%rcx, %rax
	addq	%r8, %rax
.LBB105_2:                              # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE10get_layoutEvENKUlRKT_E_clIS5_EEDaS9_.exit.i.i
	movq	56(%rdi), %r8
	movq	64(%rdi), %rdi
	testq	%r8, %r8
	je	.LBB105_4
# %bb.3:
	xorl	%edx, %edx
	divq	%rdi
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%rdi, %rax
	addq	%r8, %rax
.LBB105_4:                              # %_ZN7rocprim6detail17for_each_in_tupleIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEENS4_ItEES5_EEEZNKS3_16linear_partitionIJS5_S6_S5_EE10get_layoutEvEUlRKT_E_EEvOSC_OT0_.exit
	cmpq	%rcx, %rsi
	cmovaq	%rsi, %rcx
	cmpq	%rdi, %rcx
	cmovbeq	%rdi, %rcx
	cmpq	$1, %rcx
	adcq	$0, %rcx
	movq	%rcx, %rdx
	retq
.Lfunc_end105:
	.size	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE10get_layoutEv, .Lfunc_end105-_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE10get_layoutEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE11set_storageEPv,"axG",@progbits,_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE11set_storageEPv,comdat
	.weak	_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE11set_storageEPv # -- Begin function _ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE11set_storageEPv
	.p2align	1, 0x90
	.type	_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE11set_storageEPv,@function
_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE11set_storageEPv: # @_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE11set_storageEPv
	.cfi_startproc
# %bb.0:                                # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE11set_storageEPvENKUlRT_E_clIS4_EEDaS9_.exit.i.i
	movq	8(%rdi), %rax
	testq	%rax, %rax
	movq	%rsi, %rcx
	cmoveq	%rax, %rcx
	movq	(%rdi), %rdx
	movq	%rcx, (%rdx)
	movq	32(%rdi), %rcx
	testq	%rcx, %rcx
	je	.LBB106_1
# %bb.2:
	movq	40(%rdi), %r8
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	leaq	(%rsi,%rax), %rdx
	jmp	.LBB106_3
.LBB106_1:
	xorl	%edx, %edx
.LBB106_3:                              # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE11set_storageEPvENKUlRT_E_clIS5_EEDaS9_.exit.i.i
	movq	24(%rdi), %r8
	movq	%rdx, (%r8)
	cmpq	$0, 56(%rdi)
	je	.LBB106_4
# %bb.5:
	addq	%rcx, %rax
	movq	64(%rdi), %rcx
	xorl	%edx, %edx
	divq	%rcx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%rcx, %rax
	addq	%rax, %rsi
	jmp	.LBB106_6
.LBB106_4:
	xorl	%esi, %esi
.LBB106_6:                              # %_ZN7rocprim6detail17for_each_in_tupleIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEENS4_ItEES5_EEEZNS3_16linear_partitionIJS5_S6_S5_EE11set_storageEPvEUlRT_E_EEvOSC_OT0_.exit
	movq	48(%rdi), %rax
	movq	%rsi, (%rax)
	retq
.Lfunc_end106:
	.size	_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE11set_storageEPv, .Lfunc_end106-_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEENS3_ItEES4_EE11set_storageEPv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.weak	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_ # -- Begin function _ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.type	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@function
_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_: # @_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	3(%rsp), %rax
	movq	%rax, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end107:
	.size	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, .Lfunc_end107-_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ # -- Begin function _ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.type	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: # @_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	48(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	12(%rsp), %rdx
	movl	%r8d, (%rdx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end108:
	.size	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end108-_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ # -- Begin function _ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.type	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: # @_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	48(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	12(%rsp), %rdx
	movl	%r8d, (%rdx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end109:
	.size	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end109-_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.weak	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_ # -- Begin function _ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.type	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@function
_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_: # @_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	3(%rsp), %rax
	movq	%rax, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end110:
	.size	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, .Lfunc_end110-_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ # -- Begin function _ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.type	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: # @_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	40(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	32(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end111:
	.size	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end111-_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ # -- Begin function _ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.type	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: # @_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	40(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	32(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end112:
	.size	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end112-_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEtEEEEDaNS0_11target_archE,"axG",@progbits,_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEtEEEEDaNS0_11target_archE,comdat
	.weak	_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEtEEEEDaNS0_11target_archE # -- Begin function _ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEtEEEEDaNS0_11target_archE
	.type	_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEtEEEEDaNS0_11target_archE,@function
_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEtEEEEDaNS0_11target_archE: # @_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEtEEEEDaNS0_11target_archE
	.cfi_startproc
# %bb.0:
	movabsq	$17179869312, %rax              # imm = 0x400000080
	cmpl	$1029, %edi                     # imm = 0x405
	jg	.LBB113_5
# %bb.1:
	cmpl	$803, %edi                      # imm = 0x323
	je	.LBB113_10
# %bb.2:
	cmpl	$900, %edi                      # imm = 0x384
	je	.LBB113_10
# %bb.3:
	cmpl	$906, %edi                      # imm = 0x38A
	jne	.LBB113_11
# %bb.4:
	addq	$384, %rax                      # imm = 0x180
	jmp	.LBB113_11
.LBB113_5:
	cmpl	$1030, %edi                     # imm = 0x406
	je	.LBB113_9
# %bb.6:
	cmpl	$1100, %edi                     # imm = 0x44C
	je	.LBB113_10
# %bb.7:
	cmpl	$1102, %edi                     # imm = 0x44E
	jne	.LBB113_11
# %bb.8:
	movabsq	$8589935104, %rax               # imm = 0x200000200
	jmp	.LBB113_11
.LBB113_10:
	movabsq	$68719476992, %rax              # imm = 0x1000000100
	jmp	.LBB113_11
.LBB113_9:
	movabsq	$4294967552, %rax               # imm = 0x100000100
.LBB113_11:
	movl	$-1, %edx
	retq
.Lfunc_end113:
	.size	_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEtEEEEDaNS0_11target_archE, .Lfunc_end113-_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEtEEEEDaNS0_11target_archE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_,comdat
	.weak	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_ # -- Begin function _ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_
	.type	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_,@function
_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_: # @_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdx, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rax, 16(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end114:
	.size	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_, .Lfunc_end114-_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_
.LCPI115_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI115_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_,"axG",@progbits,_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_,comdat
	.weak	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_
	.p2align	1, 0x90
	.type	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_,@function
_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_: # @_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	movq	(%rdi), %rax
	cmpb	$0, (%rax)
	je	.LBB115_20
# %bb.1:
	movq	8(%rbx), %rax
	movq	16(%rbx), %rcx
	movl	(%rax), %eax
	cmpl	(%rcx), %eax
	jae	.LBB115_2
.LBB115_20:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB115_22
# %bb.21:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB115_22:
	movq	56(%rbx), %rax
	movq	112(%rbx), %rcx
	movl	(%rcx), %edi
	movq	120(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB115_24
# %bb.23:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	88(%rbx), %rax
	movl	(%rax), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB115_24:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB115_31
# %bb.25:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB115_31
# %bb.26:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.37, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB115_31
# %bb.27:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI115_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI115_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB115_29
# %bb.28:
	leaq	15(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB115_30
.LBB115_2:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB115_4
# %bb.3:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB115_4:
	movq	40(%rbx), %rax
	movq	48(%rbx), %rcx
	movl	(%rax), %edi
	movl	(%rcx), %edx
	movq	56(%rbx), %rax
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB115_6
# %bb.5:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %esi
	movq	72(%rbx), %rcx
	movl	(%rcx), %edx
	movq	80(%rbx), %rcx
	movq	(%rcx), %rcx
	movq	88(%rbx), %rdi
	movl	(%rdi), %r8d
	movl	(%rax), %r9d
	movq	%r13, %rdi
	callq	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
.LBB115_6:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB115_31
# %bb.7:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB115_14
# %bb.8:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.35, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB115_31
# %bb.9:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI115_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI115_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movb	$10, 14(%rsp)
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.LBB115_11
# %bb.10:
	leaq	14(%rsp), %rsi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB115_12
.LBB115_29:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
	jmp	.LBB115_30
.LBB115_11:
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB115_12:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB115_14
# %bb.13:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB115_14:                             # %.thread
	movq	56(%rbx), %rax
	movq	96(%rbx), %rcx
	movl	(%rcx), %edi
	movq	104(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB115_16
# %bb.15:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	88(%rbx), %rax
	movl	(%rax), %eax
	movq	80(%rbx), %r10
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	pushq	(%r10)
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB115_16:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB115_31
# %bb.17:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB115_31
# %bb.18:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.36, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB115_31
# %bb.19:                               # %select.unfold
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI115_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI115_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
.LBB115_30:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit83
	xorl	%eax, %eax
.LBB115_31:                             # %.critedge
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end115:
	.size	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_, .Lfunc_end115-_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIPjS5_PtS6_EESA_SQ_SD_SE_SF_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_
.LCPI116_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI116_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_,"axG",@progbits,_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_,comdat
	.weak	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_
	.p2align	1, 0x90
	.type	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_,@function
_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_: # @_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	movq	(%rdi), %rax
	cmpb	$0, (%rax)
	je	.LBB116_20
# %bb.1:
	movq	8(%rbx), %rax
	movq	16(%rbx), %rcx
	movl	(%rax), %eax
	cmpl	(%rcx), %eax
	jae	.LBB116_2
.LBB116_20:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB116_22
# %bb.21:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB116_22:
	movq	56(%rbx), %rax
	movq	112(%rbx), %rcx
	movl	(%rcx), %edi
	movq	120(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB116_24
# %bb.23:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	88(%rbx), %rax
	movl	(%rax), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB116_24:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB116_31
# %bb.25:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB116_31
# %bb.26:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.37, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB116_31
# %bb.27:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI116_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI116_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB116_29
# %bb.28:
	leaq	15(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB116_30
.LBB116_2:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB116_4
# %bb.3:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB116_4:
	movq	40(%rbx), %rax
	movq	48(%rbx), %rcx
	movl	(%rax), %edi
	movl	(%rcx), %edx
	movq	56(%rbx), %rax
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB116_6
# %bb.5:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %esi
	movq	72(%rbx), %rcx
	movl	(%rcx), %edx
	movq	80(%rbx), %rcx
	movq	(%rcx), %rcx
	movq	88(%rbx), %rdi
	movl	(%rdi), %r8d
	movl	(%rax), %r9d
	movq	%r13, %rdi
	callq	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
.LBB116_6:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB116_31
# %bb.7:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB116_14
# %bb.8:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.35, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB116_31
# %bb.9:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI116_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI116_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movb	$10, 14(%rsp)
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.LBB116_11
# %bb.10:
	leaq	14(%rsp), %rsi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB116_12
.LBB116_29:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
	jmp	.LBB116_30
.LBB116_11:
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB116_12:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB116_14
# %bb.13:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB116_14:                             # %.thread
	movq	56(%rbx), %rax
	movq	96(%rbx), %rcx
	movl	(%rcx), %edi
	movq	104(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB116_16
# %bb.15:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	88(%rbx), %rax
	movl	(%rax), %eax
	movq	80(%rbx), %r10
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	pushq	(%r10)
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB116_16:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB116_31
# %bb.17:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB116_31
# %bb.18:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.36, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB116_31
# %bb.19:                               # %select.unfold
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI116_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI116_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
.LBB116_30:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit83
	xorl	%eax, %eax
.LBB116_31:                             # %.critedge
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end116:
	.size	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_, .Lfunc_end116-_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEENS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISD_E10value_typeEPNSJ_ISE_E10value_typeEENKUlT_SD_SE_SF_E_clIS5_PjS6_PtEESA_SQ_SD_SE_SF_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.weak	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_ # -- Begin function _ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.type	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@function
_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_: # @_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%r8d, (%rax)
	leaq	40(%rsp), %r8
	movq	%rdi, (%r8)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	movq	%rsp, %rcx
	movl	%r9d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%r8, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rax, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end117:
	.size	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, .Lfunc_end117-_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ # -- Begin function _ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.type	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: # @_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	48(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	12(%rsp), %rdx
	movl	%r8d, (%rdx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end118:
	.size	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end118-_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ # -- Begin function _ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.type	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: # @_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	48(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	12(%rsp), %rdx
	movl	%r8d, (%rdx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end119:
	.size	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end119-_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.weak	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_ # -- Begin function _ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.type	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@function
_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_: # @_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%r8d, (%rdi)
	leaq	8(%rsp), %r8
	movl	%esi, (%r8)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	movq	%rsp, %rcx
	movl	%r9d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%r8, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rdi, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end120:
	.size	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, .Lfunc_end120-_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ # -- Begin function _ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.type	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: # @_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	40(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	32(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end121:
	.size	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end121-_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ # -- Begin function _ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.type	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: # @_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	40(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	32(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end122:
	.size	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end122-_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEEEDaNS0_11target_archE,"axG",@progbits,_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEEEDaNS0_11target_archE,comdat
	.weak	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEEEDaNS0_11target_archE # -- Begin function _ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEEEDaNS0_11target_archE
	.type	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEEEDaNS0_11target_archE,@function
_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEEEDaNS0_11target_archE: # @_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEEEDaNS0_11target_archE
	.cfi_startproc
# %bb.0:
	movq	%rdi, %rax
	cmpl	$907, %esi                      # imm = 0x38B
	jle	.LBB123_6
# %bb.1:
	cmpl	$1029, %esi                     # imm = 0x405
	jle	.LBB123_14
# %bb.2:
	cmpl	$1030, %esi                     # imm = 0x406
	je	.LBB123_19
# %bb.3:
	cmpl	$1100, %esi                     # imm = 0x44C
	je	.LBB123_21
# %bb.4:
	cmpl	$1102, %esi                     # imm = 0x44E
	jne	.LBB123_17
# %bb.5:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE(%rip), %xmm0
	jmp	.LBB123_10
.LBB123_6:
	cmpl	$899, %esi                      # imm = 0x383
	jg	.LBB123_11
# %bb.7:
	cmpl	$-1, %esi
	je	.LBB123_17
# %bb.8:
	cmpl	$803, %esi                      # imm = 0x323
	jne	.LBB123_17
# %bb.9:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE(%rip), %xmm0
	jmp	.LBB123_10
.LBB123_11:
	cmpl	$900, %esi                      # imm = 0x384
	je	.LBB123_18
# %bb.12:
	cmpl	$906, %esi                      # imm = 0x38A
	jne	.LBB123_17
# %bb.13:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE(%rip), %xmm0
	jmp	.LBB123_10
.LBB123_14:
	cmpl	$908, %esi                      # imm = 0x38C
	je	.LBB123_20
# %bb.15:
	cmpl	$910, %esi                      # imm = 0x38E
	jne	.LBB123_17
# %bb.16:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE(%rip), %xmm0
	jmp	.LBB123_10
.LBB123_17:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE(%rip), %xmm0
	jmp	.LBB123_10
.LBB123_18:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE(%rip), %xmm0
	jmp	.LBB123_10
.LBB123_19:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE(%rip), %xmm0
	jmp	.LBB123_10
.LBB123_20:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE(%rip), %xmm0
	jmp	.LBB123_10
.LBB123_21:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE(%rip), %xmm0
.LBB123_10:
	movups	%xmm0, (%rax)
	retq
.Lfunc_end123:
	.size	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEEEDaNS0_11target_archE, .Lfunc_end123-_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEEEDaNS0_11target_archE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEEE10hipError_tPvRmT_,"axG",@progbits,_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEEE10hipError_tPvRmT_,comdat
	.weak	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEEE10hipError_tPvRmT_ # -- Begin function _ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEEE10hipError_tPvRmT_
	.type	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEEE10hipError_tPvRmT_,@function
_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEEE10hipError_tPvRmT_: # @_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEEE10hipError_tPvRmT_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r15
	movq	%rdi, %r14
	leaq	80(%rsp), %rbx
	leaq	8(%rsp), %r12
	movq	$1, (%r12)
	movq	%rsp, %r13
	movq	$0, (%r13)
	leaq	16(%rsp), %rsi
	movq	%r12, (%rsi)
	movq	%r13, 8(%rsi)
	movq	%rbx, %rdi
	callq	_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	movq	(%r13), %rax
	cmpq	$5, %rax
	movl	$4, %ecx
	cmovaeq	%rax, %rcx
	testq	%r14, %r14
	je	.LBB124_1
# %bb.2:
	movl	$1, %eax
	cmpq	%rcx, (%r15)
	jb	.LBB124_5
# %bb.3:
	movq	%r14, 8(%rsp)
	movq	$0, (%rsp)
	leaq	16(%rsp), %rsi
	movq	%r13, (%rsi)
	movq	%r12, 8(%rsi)
	movq	%rbx, %rdi
	callq	_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	jmp	.LBB124_4
.LBB124_1:
	movq	%rcx, (%r15)
.LBB124_4:
	xorl	%eax, %eax
.LBB124_5:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end124:
	.size	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEEE10hipError_tPvRmT_, .Lfunc_end124-_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEEE10hipError_tPvRmT_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb
.LCPI125_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI125_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb,@function
_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb: # @_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 1568
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %r13d
	movl	%r8d, %r15d
	movl	%ecx, %r12d
	movq	%rdx, %rbx
	movq	%rdi, %rbp
	movq	1576(%rsp), %rdi
	testq	$-3, %rdi
	jne	.LBB125_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	4(%rsp), %rdi
	callq	hipGetDevice
	testl	%eax, %eax
	jne	.LBB125_37
# %bb.4:                                # %thread-pre-split.i
	movl	4(%rsp), %esi
	jmp	.LBB125_5
.LBB125_1:
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 4(%rsp)
	testl	%eax, %eax
	js	.LBB125_2
.LBB125_5:                              # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB125_37
# %bb.6:
	movq	%rbx, 8(%rsp)                   # 8-byte Spill
	movl	%esi, %ebx
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4), %eax
	testl	%eax, %eax
	je	.LBB125_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread118
	movl	%r15d, 20(%rsp)                 # 4-byte Spill
.LBB125_10:
	leaq	40(%rsp), %r15
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEEEDaNS0_11target_archE
	movl	4(%r15), %esi
	movl	24(%r15), %ecx
	imull	(%r15), %esi
	movl	%r12d, %eax
	xorl	%edx, %edx
	divl	%esi
	movl	%eax, %r14d
	cmpl	$1, %edx
	movl	%eax, %ebx
	sbbl	$-1, %ebx
	movl	1568(%rsp), %eax
	subl	%r13d, %eax
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %r15d
	cmpl	$1, %edx
	sbbl	$-1, %r15d
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %r15d
	leaq	(,%r15,4), %rdx
	movq	8(%rsp), %rdi                   # 8-byte Reload
	xorl	%esi, %esi
	movq	1576(%rsp), %rcx
	callq	hipMemsetAsync
	testl	%eax, %eax
	jne	.LBB125_37
# %bb.11:
	movl	%r14d, 32(%rsp)                 # 4-byte Spill
	cmpb	$0, 1584(%rsp)
	je	.LBB125_12
# %bb.13:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.47, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %r14d
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 4(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB125_15
# %bb.14:
	leaq	4(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB125_16
.LBB125_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB125_37
.LBB125_8:
	leaq	40(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB125_37
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread123
	movl	%r15d, 20(%rsp)                 # 4-byte Spill
	leaq	1200(%rsp), %r15
	leaq	1456(%rsp), %rsi
	movq	%r15, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%r15, %rax
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %ecx
	xchgl	%ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4)
	jmp	.LBB125_10
.LBB125_12:                             # %._crit_edge
	movl	%ebx, %r14d
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	1576(%rsp), %rbx
	jmp	.LBB125_20
.LBB125_15:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB125_16:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movq	1576(%rsp), %rbx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.48, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	32(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 4(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB125_18
# %bb.17:
	leaq	4(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB125_19
.LBB125_18:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB125_19:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit92
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 24(%rsp)                  # 8-byte Spill
.LBB125_20:
	movl	40(%rsp), %edx
	btsq	$32, %r14
	btsq	$32, %rdx
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%rbx, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB125_22
# %bb.21:
	movq	%rbp, %rdi
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movl	%r12d, %edx
	movl	32(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	1568(%rsp), %r9d
	callq	_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
.LBB125_22:
	callq	hipGetLastError
	testl	%eax, %eax
	movb	1584(%rsp), %bpl
	jne	.LBB125_28
# %bb.23:
	testb	%bpl, %bpl
	je	.LBB125_28
# %bb.24:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.49, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r12d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB125_37
# %bb.25:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	24(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI125_0(%rip), %xmm0
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	32(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI125_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 4(%rsp)
	movq	(%r12), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%r12,%rax)
	je	.LBB125_27
# %bb.26:
	leaq	4(%rsp), %rsi
	movl	$1, %edx
	movq	%r12, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB125_29
.LBB125_28:                             # %.critedge
	testl	%eax, %eax
	jne	.LBB125_37
	jmp	.LBB125_29
.LBB125_27:
	movq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB125_29:
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	testb	%bpl, %bpl
	je	.LBB125_31
# %bb.30:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 24(%rsp)                  # 8-byte Spill
.LBB125_31:
	movl	40(%rsp), %edx
	movl	20(%rsp), %edi                  # 4-byte Reload
	orq	%rbx, %rdi
	orq	%rbx, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	1576(%rsp), %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB125_33
# %bb.32:
	movq	8(%rsp), %rdi                   # 8-byte Reload
	callq	_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_
.LBB125_33:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB125_37
# %bb.34:
	testb	%bpl, %bpl
	je	.LBB125_37
# %bb.35:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.50, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	1576(%rsp), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB125_37
# %bb.36:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	24(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI125_0(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI125_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
	xorl	%eax, %eax
.LBB125_37:
	addq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end125:
	.size	_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb, .Lfunc_end125-_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEENS4_ItEEjNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SB_jT4_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrItEEPtNS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
.LCPI126_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI126_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrItEEPtNS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,"axG",@progbits,_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrItEEPtNS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,comdat
	.weak	_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrItEEPtNS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.type	_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrItEEPtNS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb,@function
_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrItEEPtNS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb: # @_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrItEEPtNS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1560, %rsp                     # imm = 0x618
	.cfi_def_cfa_offset 1616
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, 8(%rsp)                   # 4-byte Spill
	testq	%rdx, %rdx
	je	.LBB126_1
# %bb.2:
	movq	%rcx, %r14
	movq	%rdx, %rbp
	movq	%rsi, %r15
	movq	%rdi, %r12
	testq	$-3, %rcx
	jne	.LBB126_3
# %bb.5:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	12(%rsp), %rdi
	callq	hipGetDevice
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB126_41
# %bb.6:                                # %thread-pre-split.i
	movl	12(%rsp), %eax
	jmp	.LBB126_7
.LBB126_1:
	xorl	%r13d, %r13d
	jmp	.LBB126_41
.LBB126_3:
	movq	%r14, %rdi
	callq	hipGetStreamDeviceId
	movl	%eax, 12(%rsp)
	testl	%eax, %eax
	js	.LBB126_4
.LBB126_7:                              # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %r13d                     # imm = 0x3E7
	cmpl	$511, %eax                      # imm = 0x1FF
	ja	.LBB126_41
# %bb.8:
	movl	%eax, %ebx
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4), %edi
	testl	%edi, %edi
	je	.LBB126_10
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread103
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r15, 40(%rsp)                  # 8-byte Spill
.LBB126_12:
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_24wrapped_transform_configINS_14default_configEtEEEEDaNS0_11target_archE
	movq	%rax, %rsi
	movl	%edx, %eax
	movq	%rsi, %rcx
	shrq	$32, %rcx
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	imull	%esi, %ecx
	xorl	%r13d, %r13d
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %r12d
	cmpl	$1, %eax
	adcl	$0, %r12d
	leaq	-1(%rbp), %rbx
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	movq	%rcx, 24(%rsp)                  # 8-byte Spill
	je	.LBB126_26
# %bb.13:
	leaq	(%rbx,%rcx), %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %r15
	movl	$_ZSt4cout, %edi
	movl	$.L.str.38, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	16(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB126_15
# %bb.14:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB126_16
.LBB126_4:
	movl	$400, %r13d                     # imm = 0x190
	jmp	.LBB126_41
.LBB126_10:
	leaq	88(%rsp), %rdi
	movl	%eax, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	je	.LBB126_11
.LBB126_35:                             # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit
	movl	%eax, %r13d
	jmp	.LBB126_41
.LBB126_15:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB126_16:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.39, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB126_18
# %bb.17:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB126_19
.LBB126_18:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB126_19:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit73
	movl	$_ZSt4cout, %edi
	movl	$.L.str.40, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB126_21
# %bb.20:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB126_22
.LBB126_21:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB126_22:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit76
	movl	$_ZSt4cout, %edi
	movl	$.L.str.41, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 88(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB126_24
# %bb.23:
	leaq	88(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB126_25
.LBB126_24:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB126_25:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit79
	movq	24(%rsp), %rcx                  # 8-byte Reload
.LBB126_26:                             # %._crit_edge
	movq	%rbp, 80(%rsp)                  # 8-byte Spill
	imulq	%rcx, %r12
	leaq	(%rbx,%r12), %rax
	xorl	%edx, %edx
	divq	%r12
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	addq	%r12, %rbx
	jb	.LBB126_41
# %bb.27:                               # %.lr.ph
	leaq	-1(%rcx), %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movl	16(%rsp), %eax                  # 4-byte Reload
	btsq	$32, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%ebx, %ebx
	xorl	%ebp, %ebp
	xorl	%eax, %eax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
.LBB126_28:                             # =>This Inner Loop Header: Depth=1
	movq	80(%rsp), %r15                  # 8-byte Reload
	subq	%rbp, %r15
	cmpq	%r12, %r15
	cmovaeq	%r12, %r15
	movq	64(%rsp), %rax                  # 8-byte Reload
	addq	%r15, %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %r13
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB126_30
# %bb.29:                               #   in Loop: Header=BB126_28 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 48(%rsp)                  # 8-byte Spill
.LBB126_30:                             #   in Loop: Header=BB126_28 Depth=1
	movl	%r13d, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	$1, %esi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%r14, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB126_32
# %bb.31:                               #   in Loop: Header=BB126_28 Depth=1
	movq	32(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rbp,2), %rdi
	movq	40(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rbp,2), %rdx
	movq	%r15, %rsi
	callq	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_
.LBB126_32:                             #   in Loop: Header=BB126_28 Depth=1
	callq	hipGetLastError
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB126_38
# %bb.33:                               #   in Loop: Header=BB126_28 Depth=1
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB126_38
# %bb.34:                               #   in Loop: Header=BB126_28 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.42, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB126_35
# %bb.36:                               #   in Loop: Header=BB126_28 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	48(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI126_0(%rip), %xmm0
	movsd	%xmm0, 56(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	56(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI126_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 88(%rsp)
	movq	(%r15), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%r15,%rax)
	je	.LBB126_39
# %bb.37:                               #   in Loop: Header=BB126_28 Depth=1
	movl	$1, %edx
	movq	%r15, %rdi
	leaq	88(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB126_40
.LBB126_38:                             #   in Loop: Header=BB126_28 Depth=1
	testl	%r13d, %r13d
	je	.LBB126_40
	jmp	.LBB126_41
.LBB126_39:                             #   in Loop: Header=BB126_28 Depth=1
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB126_40:                             #   in Loop: Header=BB126_28 Depth=1
	incq	%rbx
	addq	%r12, %rbp
	xorl	%r13d, %r13d
	cmpq	72(%rsp), %rbx                  # 8-byte Folded Reload
	movq	24(%rsp), %rcx                  # 8-byte Reload
	jb	.LBB126_28
.LBB126_41:                             # %.thread114
	movl	%r13d, %eax
	addq	$1560, %rsp                     # imm = 0x618
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB126_11:                             # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread108
	.cfi_def_cfa_offset 1616
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	leaq	1248(%rsp), %r15
	leaq	1504(%rsp), %rsi
	movq	%r15, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%r15, %rax
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %edi
	xchgl	%eax, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4)
	jmp	.LBB126_12
.Lfunc_end126:
	.size	_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrItEEPtNS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb, .Lfunc_end126-_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrItEEPtNS_8identityItEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb
.LCPI127_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI127_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb,@function
_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb: # @_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1624, %rsp                     # imm = 0x658
	.cfi_def_cfa_offset 1680
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r15
	movq	%r8, %r12
	movq	%rcx, %r13
	movq	%rdx, %rbp
	movq	%rsi, %rbx
	movq	%rdi, 88(%rsp)                  # 8-byte Spill
	testq	$-3, 1744(%rsp)
	jne	.LBB127_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	8(%rsp), %rdi
	callq	hipGetDevice
	testl	%eax, %eax
	jne	.LBB127_74
# %bb.4:                                # %thread-pre-split.i
	movl	8(%rsp), %esi
	jmp	.LBB127_5
.LBB127_1:
	movq	1744(%rsp), %rdi
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 8(%rsp)
	testl	%eax, %eax
	js	.LBB127_2
.LBB127_5:                              # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB127_74
# %bb.6:
	movl	%esi, %r14d
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4), %eax
	testl	%eax, %eax
	je	.LBB127_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread249
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
.LBB127_10:
	movl	1728(%rsp), %r14d
	leaq	152(%rsp), %rbx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEEEDaNS0_11target_archE
	movq	%r14, %r8
	movl	1736(%rsp), %edi
	movl	16(%rbx), %r9d
	movl	24(%rbx), %eax
	imull	12(%rbx), %r9d
	subl	%r8d, %edi
	cmpl	%edi, %eax
	movl	%eax, 76(%rsp)                  # 4-byte Spill
	cmovbl	%eax, %edi
	movl	$1073741824, %r10d              # imm = 0x40000000
	movl	$1073741824, %eax               # imm = 0x40000000
	xorl	%edx, %edx
	divl	%r9d
	subl	%edx, %r10d
	movl	1680(%rsp), %r11d
	movl	%r11d, %eax
	xorl	%edx, %edx
	divl	%r10d
	movl	%eax, %ecx
	xorl	%eax, %eax
	xorl	%esi, %esi
	testl	%edx, %edx
	setne	%sil
	movl	%r11d, %edx
	cmpq	%r10, %rdx
	movq	%r10, 136(%rsp)                 # 8-byte Spill
	movq	%rdx, 128(%rsp)                 # 8-byte Spill
	cmovbq	%rdx, %r10
	movq	%r10, 144(%rsp)                 # 8-byte Spill
	addl	%ecx, %esi
	je	.LBB127_74
# %bb.11:                               # %.lr.ph
	movq	%rbp, 56(%rsp)                  # 8-byte Spill
	movq	%r13, 80(%rsp)                  # 8-byte Spill
	movq	%r12, 48(%rsp)                  # 8-byte Spill
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	movb	1712(%rsp), %al
	movq	1696(%rsp), %r14
	movq	1688(%rsp), %rcx
	movl	%r9d, %edx
	movq	%rdx, 120(%rsp)                 # 8-byte Spill
	movl	%r8d, %edx
	movq	%rdx, 112(%rsp)                 # 8-byte Spill
	movq	%rdi, 32(%rsp)                  # 8-byte Spill
	movl	%edi, %edx
	movq	%rdx, 104(%rsp)                 # 8-byte Spill
	movl	%esi, %edx
	movq	%rdx, 96(%rsp)                  # 8-byte Spill
	andb	1720(%rsp), %al
	movb	%al, 15(%rsp)                   # 1-byte Spill
	xorl	%ebp, %ebp
	movl	%r9d, 72(%rsp)                  # 4-byte Spill
.LBB127_12:                             # =>This Inner Loop Header: Depth=1
	movl	%ebp, %r15d
	movq	144(%rsp), %rax                 # 8-byte Reload
	imull	%eax, %r15d
	movl	1680(%rsp), %ebx
	subl	%r15d, %ebx
	cmpl	%eax, %ebx
	movl	%eax, %r12d
	cmovbl	%ebx, %r12d
	movl	%r12d, %eax
	xorl	%edx, %edx
	divl	%r9d
	movl	%eax, %r13d
	movq	%r14, 16(%rsp)                  # 8-byte Spill
	movq	%rcx, 40(%rsp)                  # 8-byte Spill
	cmpl	$1, %edx
	movl	%eax, %r14d
	sbbl	$-1, %r14d
	movl	%r14d, %edx
	movl	76(%rsp), %ecx                  # 4-byte Reload
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %edx
	shlq	$2, %rdx
	movq	1704(%rsp), %rdi
	xorl	%esi, %esi
	movq	1744(%rsp), %rcx
	callq	hipMemsetAsync
	testl	%eax, %eax
	jne	.LBB127_74
# %bb.13:                               #   in Loop: Header=BB127_12 Depth=1
	movl	%r14d, %r14d
	cmpb	$0, 1752(%rsp)
	je	.LBB127_14
# %bb.15:                               #   in Loop: Header=BB127_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.51, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	176(%rsp), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB127_17
# %bb.16:                               #   in Loop: Header=BB127_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB127_18
.LBB127_14:                             #   in Loop: Header=BB127_12 Depth=1
	xorl	%ebx, %ebx
	jmp	.LBB127_52
.LBB127_17:                             #   in Loop: Header=BB127_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB127_18:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
                                        #   in Loop: Header=BB127_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.41, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	120(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB127_20
# %bb.19:                               #   in Loop: Header=BB127_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB127_21
.LBB127_20:                             #   in Loop: Header=BB127_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB127_21:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit158
                                        #   in Loop: Header=BB127_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.52, %esi
	movl	$21, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	136(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB127_23
# %bb.22:                               #   in Loop: Header=BB127_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB127_24
.LBB127_23:                             #   in Loop: Header=BB127_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB127_24:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit161
                                        #   in Loop: Header=BB127_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.53, %esi
	movl	$4, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	112(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB127_26
# %bb.25:                               #   in Loop: Header=BB127_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB127_27
.LBB127_26:                             #   in Loop: Header=BB127_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB127_27:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit164
                                        #   in Loop: Header=BB127_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.54, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	104(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB127_29
# %bb.28:                               #   in Loop: Header=BB127_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB127_30
.LBB127_29:                             #   in Loop: Header=BB127_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB127_30:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit167
                                        #   in Loop: Header=BB127_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.55, %esi
	movl	$8, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	96(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB127_32
# %bb.31:                               #   in Loop: Header=BB127_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB127_33
.LBB127_32:                             #   in Loop: Header=BB127_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB127_33:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit170
                                        #   in Loop: Header=BB127_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.56, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbp, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB127_35
# %bb.34:                               #   in Loop: Header=BB127_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB127_36
.LBB127_35:                             #   in Loop: Header=BB127_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB127_36:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit173
                                        #   in Loop: Header=BB127_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.57, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB127_38
# %bb.37:                               #   in Loop: Header=BB127_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB127_39
.LBB127_38:                             #   in Loop: Header=BB127_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB127_39:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit176
                                        #   in Loop: Header=BB127_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.58, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r12d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB127_41
# %bb.40:                               #   in Loop: Header=BB127_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB127_42
.LBB127_41:                             #   in Loop: Header=BB127_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB127_42:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit179
                                        #   in Loop: Header=BB127_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.59, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB127_44
# %bb.43:                               #   in Loop: Header=BB127_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB127_45
.LBB127_44:                             #   in Loop: Header=BB127_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB127_45:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit182
                                        #   in Loop: Header=BB127_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.47, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB127_47
# %bb.46:                               #   in Loop: Header=BB127_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB127_48
.LBB127_47:                             #   in Loop: Header=BB127_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB127_48:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit185
                                        #   in Loop: Header=BB127_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.48, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r13d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB127_50
# %bb.49:                               #   in Loop: Header=BB127_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB127_51
.LBB127_50:                             #   in Loop: Header=BB127_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB127_51:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit188
                                        #   in Loop: Header=BB127_12 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rbx
.LBB127_52:                             #   in Loop: Header=BB127_12 Depth=1
	movl	164(%rsp), %edx
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %r14
	orq	%rax, %rdx
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	1744(%rsp), %r9
	callq	__hipPushCallConfiguration
	cmpb	$0, 15(%rsp)                    # 1-byte Folded Reload
	je	.LBB127_55
# %bb.53:                               #   in Loop: Header=BB127_12 Depth=1
	testl	%eax, %eax
	movq	40(%rsp), %r14                  # 8-byte Reload
	jne	.LBB127_65
# %bb.54:                               #   in Loop: Header=BB127_12 Depth=1
	movl	%r15d, %eax
	movq	88(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdi
	movq	80(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,2), %rdx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	72(%rsp), %rcx                  # 8-byte Reload
	movl	%r12d, %r8d
	movq	%r14, %r9
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	1752(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	1736(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	jmp	.LBB127_64
.LBB127_55:                             #   in Loop: Header=BB127_12 Depth=1
	.cfi_def_cfa_offset 1680
	cmpb	$0, 1712(%rsp)
	movq	40(%rsp), %r14                  # 8-byte Reload
	je	.LBB127_58
# %bb.56:                               #   in Loop: Header=BB127_12 Depth=1
	testl	%eax, %eax
	jne	.LBB127_65
# %bb.57:                               #   in Loop: Header=BB127_12 Depth=1
	movl	%r15d, %eax
	movq	88(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdi
	movq	80(%rsp), %rcx                  # 8-byte Reload
	jmp	.LBB127_63
.LBB127_58:                             #   in Loop: Header=BB127_12 Depth=1
	cmpb	$0, 1720(%rsp)
	je	.LBB127_61
# %bb.59:                               #   in Loop: Header=BB127_12 Depth=1
	testl	%eax, %eax
	jne	.LBB127_65
# %bb.60:                               #   in Loop: Header=BB127_12 Depth=1
	movl	%r15d, %eax
	movq	24(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdi
	movq	48(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,2), %rdx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	72(%rsp), %rcx                  # 8-byte Reload
	movl	%r12d, %r8d
	movq	%r14, %r9
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	1752(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	1736(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	jmp	.LBB127_64
.LBB127_61:                             #   in Loop: Header=BB127_12 Depth=1
	.cfi_def_cfa_offset 1680
	testl	%eax, %eax
	jne	.LBB127_65
# %bb.62:                               #   in Loop: Header=BB127_12 Depth=1
	movl	%r15d, %eax
	movq	56(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdi
	movq	64(%rsp), %rcx                  # 8-byte Reload
.LBB127_63:                             #   in Loop: Header=BB127_12 Depth=1
	leaq	(%rcx,%rax,2), %rdx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	56(%rsp), %rcx                  # 8-byte Reload
	movl	%r12d, %r8d
	movq	%r14, %r9
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	1752(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	1736(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
.LBB127_64:                             #   in Loop: Header=BB127_12 Depth=1
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB127_65:                             #   in Loop: Header=BB127_12 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB127_70
# %bb.66:                               #   in Loop: Header=BB127_12 Depth=1
	cmpb	$0, 1752(%rsp)
	je	.LBB127_70
# %bb.67:                               #   in Loop: Header=BB127_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.60, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	128(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	1744(%rsp), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB127_74
# %bb.68:                               #   in Loop: Header=BB127_12 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%rbx, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI127_0(%rip), %xmm0
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI127_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 8(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB127_71
# %bb.69:                               #   in Loop: Header=BB127_12 Depth=1
	movl	$1, %edx
	movq	%rbx, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB127_72
.LBB127_70:                             #   in Loop: Header=BB127_12 Depth=1
	testl	%eax, %eax
	je	.LBB127_72
	jmp	.LBB127_74
.LBB127_71:                             #   in Loop: Header=BB127_12 Depth=1
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB127_72:                             #   in Loop: Header=BB127_12 Depth=1
	incq	%rbp
	movq	16(%rsp), %rcx                  # 8-byte Reload
	cmpq	96(%rsp), %rbp                  # 8-byte Folded Reload
	movl	72(%rsp), %r9d                  # 4-byte Reload
	jb	.LBB127_12
# %bb.73:
	xorl	%eax, %eax
	jmp	.LBB127_74
.LBB127_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB127_74
.LBB127_8:
	leaq	152(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	je	.LBB127_9
.LBB127_74:
	addq	$1624, %rsp                     # imm = 0x658
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB127_9:                              # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread254
	.cfi_def_cfa_offset 1680
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
	leaq	1312(%rsp), %rbx
	leaq	1568(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%rbx, %rax
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %ecx
	xchgl	%ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4)
	jmp	.LBB127_10
.Lfunc_end127:
	.size	_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb, .Lfunc_end127-_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS9_E10value_typeET2_T3_PNSA_ISF_E10value_typeET4_T5_PSK_SL_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE,"axG",@progbits,_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE,comdat
	.weak	_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE # -- Begin function _ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	.type	_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE,@function
_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE: # @_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	.cfi_startproc
# %bb.0:
	movq	16(%rdi), %r8
	movq	(%rsi), %rcx
	movq	(%rcx), %rax
	cmpq	%r8, %rax
	cmovbeq	%r8, %rax
	movq	8(%rdi), %r9
	movq	%rax, (%rcx)
	testq	%r9, %r9
	je	.LBB128_2
# %bb.1:
	movq	8(%rsi), %r10
	movq	(%r10), %rax
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	addq	%r9, %rax
	movq	%rax, (%r10)
	movq	(%rcx), %rax
.LBB128_2:                              # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_ItEEEE10get_layoutEvENKUlRKT_E_clIS4_EEDaSB_.exit
	movq	40(%rdi), %r8
	cmpq	%r8, %rax
	cmovbeq	%r8, %rax
	movq	32(%rdi), %r9
	movq	%rax, (%rcx)
	testq	%r9, %r9
	je	.LBB128_4
# %bb.3:
	movq	8(%rsi), %r10
	movq	(%r10), %rax
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	addq	%r9, %rax
	movq	%rax, (%r10)
	movq	(%rcx), %rax
.LBB128_4:                              # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_ItEEEE10get_layoutEvENKUlRKT_E_clIS4_EEDaSB_.exit16
	movq	64(%rdi), %r8
	cmpq	%r8, %rax
	cmovbeq	%r8, %rax
	movq	56(%rdi), %r9
	movq	%rax, (%rcx)
	testq	%r9, %r9
	je	.LBB128_6
# %bb.5:
	movq	8(%rsi), %r10
	movq	(%r10), %rax
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	addq	%r9, %rax
	movq	%rax, (%r10)
	movq	(%rcx), %rax
.LBB128_6:                              # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_ItEEEE10get_layoutEvENKUlRKT_E_clIS6_EEDaSB_.exit
	movq	88(%rdi), %r8
	cmpq	%r8, %rax
	cmovbeq	%r8, %rax
	movq	80(%rdi), %r9
	movq	%rax, (%rcx)
	testq	%r9, %r9
	je	.LBB128_8
# %bb.7:
	movq	8(%rsi), %r10
	movq	(%r10), %rax
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	addq	%r9, %rax
	movq	%rax, (%r10)
	movq	(%rcx), %rax
.LBB128_8:                              # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_ItEEEE10get_layoutEvENKUlRKT_E_clIS4_EEDaSB_.exit29
	movq	112(%rdi), %r8
	cmpq	%r8, %rax
	cmovbeq	%r8, %rax
	movq	104(%rdi), %rdi
	movq	%rax, (%rcx)
	testq	%rdi, %rdi
	je	.LBB128_10
# %bb.9:
	movq	8(%rsi), %rcx
	movq	(%rcx), %rax
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	addq	%rdi, %rax
	movq	%rax, (%rcx)
.LBB128_10:                             # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_ItEEEE10get_layoutEvENKUlRKT_E_clIS7_EEDaSB_.exit
	retq
.Lfunc_end128:
	.size	_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE, .Lfunc_end128-_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S8_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE,"axG",@progbits,_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE,comdat
	.weak	_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE # -- Begin function _ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	.type	_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE,@function
_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE: # @_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	.cfi_startproc
# %bb.0:
	movq	8(%rdi), %rcx
	testq	%rcx, %rcx
	je	.LBB129_3
# %bb.1:
	movq	(%rsi), %r8
	movq	(%r8), %rax
	movq	16(%rdi), %r9
	xorl	%edx, %edx
	divq	%r9
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r9, %rax
	movq	%rax, (%r8)
	cmpq	$0, 8(%rdi)
	je	.LBB129_3
# %bb.2:
	movq	8(%rsi), %rdx
	addq	(%rdx), %rax
	jmp	.LBB129_4
.LBB129_3:                              # %.thread.i
	xorl	%eax, %eax
.LBB129_4:                              # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_ItEEEE11set_storageEPvENKUlRT_E_clIS4_EEDaSB_.exit
	movq	(%rdi), %rdx
	movq	%rax, (%rdx)
	movq	(%rsi), %r9
	addq	(%r9), %rcx
	movq	%rcx, (%r9)
	movq	32(%rdi), %r8
	testq	%r8, %r8
	je	.LBB129_7
# %bb.5:
	movq	40(%rdi), %r10
	movq	%rcx, %rax
	xorl	%edx, %edx
	divq	%r10
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r10, %rax
	movq	%rax, (%r9)
	cmpq	$0, 32(%rdi)
	je	.LBB129_7
# %bb.6:
	movq	8(%rsi), %rcx
	addq	(%rcx), %rax
	jmp	.LBB129_8
.LBB129_7:                              # %.thread.i19
	xorl	%eax, %eax
.LBB129_8:                              # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_ItEEEE11set_storageEPvENKUlRT_E_clIS4_EEDaSB_.exit20
	movq	24(%rdi), %rcx
	movq	%rax, (%rcx)
	movq	(%rsi), %r9
	addq	(%r9), %r8
	movq	%r8, (%r9)
	movq	56(%rdi), %rcx
	testq	%rcx, %rcx
	je	.LBB129_11
# %bb.9:
	movq	64(%rdi), %r10
	movq	%r8, %rax
	xorl	%edx, %edx
	divq	%r10
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r10, %rax
	movq	%rax, (%r9)
	cmpq	$0, 56(%rdi)
	je	.LBB129_11
# %bb.10:
	movq	8(%rsi), %rdx
	addq	(%rdx), %rax
	jmp	.LBB129_12
.LBB129_11:                             # %.thread.i30
	xorl	%eax, %eax
.LBB129_12:                             # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_ItEEEE11set_storageEPvENKUlRT_E_clIS6_EEDaSB_.exit
	movq	48(%rdi), %rdx
	movq	%rax, (%rdx)
	movq	(%rsi), %r9
	addq	(%r9), %rcx
	movq	%rcx, (%r9)
	movq	80(%rdi), %r8
	testq	%r8, %r8
	je	.LBB129_15
# %bb.13:
	movq	88(%rdi), %r10
	movq	%rcx, %rax
	xorl	%edx, %edx
	divq	%r10
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r10, %rax
	movq	%rax, (%r9)
	cmpq	$0, 80(%rdi)
	je	.LBB129_15
# %bb.14:
	movq	8(%rsi), %rcx
	addq	(%rcx), %rax
	jmp	.LBB129_16
.LBB129_15:                             # %.thread.i40
	xorl	%eax, %eax
.LBB129_16:                             # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_ItEEEE11set_storageEPvENKUlRT_E_clIS4_EEDaSB_.exit41
	movq	72(%rdi), %rcx
	movq	%rax, (%rcx)
	movq	(%rsi), %r9
	addq	(%r9), %r8
	movq	%r8, (%r9)
	movq	104(%rdi), %rcx
	testq	%rcx, %rcx
	je	.LBB129_19
# %bb.17:
	movq	112(%rdi), %r10
	movq	%r8, %rax
	xorl	%edx, %edx
	divq	%r10
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r10, %rax
	movq	%rax, (%r9)
	cmpq	$0, 104(%rdi)
	je	.LBB129_19
# %bb.18:
	movq	8(%rsi), %rdx
	addq	(%rdx), %rax
	jmp	.LBB129_20
.LBB129_19:                             # %.thread.i51
	xorl	%eax, %eax
.LBB129_20:                             # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_NS3_ItEEEE11set_storageEPvENKUlRT_E_clIS7_EEDaSB_.exit
	movq	96(%rdi), %rdx
	movq	%rax, (%rdx)
	movq	(%rsi), %rax
	addq	%rcx, (%rax)
	retq
.Lfunc_end129:
	.size	_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE, .Lfunc_end129-_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_NS4_ItEEEEEZNS3_16linear_partitionIJS5_S5_S7_S5_S8_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSE_OT0_St16integer_sequenceImJXspT1_EEE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,"axG",@progbits,_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,comdat
	.weak	_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj # -- Begin function _ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.type	_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,@function
_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj: # @_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	28(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	24(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	20(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	16(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	15(%rsp), %rax
	movq	%rax, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	40(%rsp), %r12
	leaq	32(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end130:
	.size	_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj, .Lfunc_end130-_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_,"axG",@progbits,_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_,comdat
	.weak	_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_ # -- Begin function _ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_
	.type	_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_,@function
_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_: # @_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end131:
	.size	_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_, .Lfunc_end131-_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_,comdat
	.weak	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_ # -- Begin function _ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_
	.type	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_,@function
_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_: # @_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end132:
	.size	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_, .Lfunc_end132-_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj # -- Begin function _ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.type	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj: # @_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	3(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end133:
	.size	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end133-_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj # -- Begin function _ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.type	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj: # @_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	40(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	32(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	3(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end134:
	.size	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end134-_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj # -- Begin function _ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.type	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj: # @_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	48(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	4(%rsp), %rdx
	movl	%r8d, (%rdx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	3(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end135:
	.size	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end135-_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_endproc
                                        # -- End function
	.section	.text._ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEES4_NS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SB_T1_T2_EN10workaround3parERNS7_IS2_EES4_S4_S4_S6_,"axG",@progbits,_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEES4_NS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SB_T1_T2_EN10workaround3parERNS7_IS2_EES4_S4_S4_S6_,comdat
	.weak	_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEES4_NS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SB_T1_T2_EN10workaround3parERNS7_IS2_EES4_S4_S4_S6_ # -- Begin function _ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEES4_NS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SB_T1_T2_EN10workaround3parERNS7_IS2_EES4_S4_S4_S6_
	.p2align	1, 0x90
	.type	_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEES4_NS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SB_T1_T2_EN10workaround3parERNS7_IS2_EES4_S4_S4_S6_,@function
_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEES4_NS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SB_T1_T2_EN10workaround3parERNS7_IS2_EES4_S4_S4_S6_: # @_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEES4_NS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SB_T1_T2_EN10workaround3parERNS7_IS2_EES4_S4_S4_S6_
.Lfunc_begin11:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception11
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r13
	subq	%rdx, %r13
	je	.LBB136_28
# %bb.1:
	movq	%rcx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	shrq	$2, %r13
	xorl	%eax, %eax
	leaq	8(%rsp), %rsi
	movq	%rax, (%rsi)
	negl	%r13d
	.cfi_escape 0x2e, 0x40
	leaq	16(%rsp), %r10
	xorl	%edi, %edi
	movq	%r14, %rdx
	xorl	%ecx, %ecx
	movq	%r14, %r8
	movq	%rbx, %r9
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	$32
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
	movl	%eax, %ebp
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
	testl	%ebp, %ebp
	jne	.LBB136_2
# %bb.7:                                # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit.i.i
	movq	8(%rsp), %r12
	movq	%r15, 16(%rsp)
	xorl	%r15d, %r15d
	xorps	%xmm0, %xmm0
	movups	%xmm0, 24(%rsp)
	testq	%r12, %r12
	je	.LBB136_8
# %bb.9:                                # %.noexc.i.i.i.i
	.cfi_escape 0x2e, 0x00
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm
	movq	%rax, %rdi
	jmp	.LBB136_10
.LBB136_8:
	xorl	%edi, %edi
.LBB136_10:
	movq	%rdi, 24(%rsp)
	movq	%r12, 32(%rsp)
.Ltmp119:
	.cfi_escape 0x2e, 0x40
	leaq	7(%rsp), %rax
	leaq	8(%rsp), %rsi
	movq	%r14, %rdx
	xorl	%ecx, %ecx
	movq	%r14, %r8
	movq	%rbx, %r9
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	$32
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.Ltmp120:
# %bb.11:
.Ltmp121:
	movl	%eax, %ebp
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp122:
# %bb.12:                               # %.noexc.i.i
	testl	%ebp, %ebp
	jne	.LBB136_13
# %bb.17:                               # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit27.i.i
.Ltmp128:
	.cfi_escape 0x2e, 0x00
	xorl	%edi, %edi
	callq	hipStreamSynchronize
.Ltmp129:
# %bb.18:                               # %_ZN6thrust11hip_rocprim20synchronize_optionalINS0_16execution_policyINS0_3tagEEEEE10hipError_tRT_.exit.i.i
.Ltmp130:
	movl	%eax, %ebp
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp131:
# %bb.19:                               # %.noexc30.i.i
	testl	%ebp, %ebp
	jne	.LBB136_20
# %bb.27:                               # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit34.i.i
	.cfi_escape 0x2e, 0x00
	leaq	16(%rsp), %rdi
	callq	_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev
.LBB136_28:                             # %_ZN6thrust11hip_rocprim12__smart_sort10smart_sortINS_6detail17integral_constantIbLb1EEENS0_3tagENS_10device_ptrIjEES8_NS_4lessIjEEEENS1_24enable_if_primitive_sortIT1_T3_E4typeERNS0_16execution_policyIT0_EESC_SC_T2_SD_.exit
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB136_2:
	.cfi_def_cfa_offset 96
	.cfi_escape 0x2e, 0x00
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp114:
	.cfi_escape 0x2e, 0x00
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp115:
# %bb.3:
.Ltmp116:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movq	%rax, %rdx
	callq	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
.Ltmp117:
# %bb.4:
	.cfi_escape 0x2e, 0x00
	movl	$_ZTIN6thrust6system12system_errorE, %esi
	movl	$_ZN6thrust6system12system_errorD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB136_13:
	.cfi_escape 0x2e, 0x00
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp123:
	.cfi_escape 0x2e, 0x00
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp124:
# %bb.14:
.Ltmp125:
	movq	%rax, %r14
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.1, %esi
	movq	%rbx, %rdi
	callq	_ZNSt13runtime_errorC2EPKc
.Ltmp126:
	jmp	.LBB136_22
.LBB136_20:
	.cfi_escape 0x2e, 0x00
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp132:
	.cfi_escape 0x2e, 0x00
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp133:
# %bb.21:
.Ltmp134:
	movq	%rax, %r14
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	callq	_ZNSt13runtime_errorC2EPKc
.Ltmp135:
.LBB136_22:
	movq	$_ZTVN6thrust6system12system_errorE+16, (%rbx)
	movl	%ebp, 16(%rbx)
	movq	%r14, 24(%rbx)
	movq	%rbx, %rax
	addq	$48, %rax
	movq	%rax, 32(%rbx)
	movq	$0, 40(%rbx)
	movb	$0, 48(%rbx)
.Ltmp137:
	.cfi_escape 0x2e, 0x00
	movl	$_ZTIN6thrust6system12system_errorE, %esi
	movl	$_ZN6thrust6system12system_errorD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.Ltmp138:
# %bb.23:                               # %.cont.i.i
.LBB136_24:
.Ltmp136:
	jmp	.LBB136_16
.LBB136_15:
.Ltmp127:
.LBB136_16:                             # %.body.i.i
	movq	%rax, %r14
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	jmp	.LBB136_26
.LBB136_5:
.Ltmp118:
	movq	%rax, %r14
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	jmp	.LBB136_6
.LBB136_25:
.Ltmp139:
	movq	%rax, %r14
.LBB136_26:                             # %.body.i.i
	.cfi_escape 0x2e, 0x00
	leaq	16(%rsp), %rdi
	callq	_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev
.LBB136_6:                              # %common.resume.i.i
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end136:
	.size	_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEES4_NS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SB_T1_T2_EN10workaround3parERNS7_IS2_EES4_S4_S4_S6_, .Lfunc_end136-_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEES4_NS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SB_T1_T2_EN10workaround3parERNS7_IS2_EES4_S4_S4_S6_
	.cfi_endproc
	.section	.gcc_except_table._ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEES4_NS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SB_T1_T2_EN10workaround3parERNS7_IS2_EES4_S4_S4_S6_,"aG",@progbits,_ZZN6thrust11hip_rocprim18stable_sort_by_keyINS0_3tagENS_10device_ptrIjEES4_NS_4lessIjEEEEvRNS0_16execution_policyIT_EET0_SB_T1_T2_EN10workaround3parERNS7_IS2_EES4_S4_S4_S6_,comdat
	.p2align	2, 0x0
GCC_except_table136:
.Lexception11:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end11-.Lcst_begin11
.Lcst_begin11:
	.uleb128 .Lfunc_begin11-.Lfunc_begin11  # >> Call Site 1 <<
	.uleb128 .Ltmp119-.Lfunc_begin11        #   Call between .Lfunc_begin11 and .Ltmp119
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp119-.Lfunc_begin11        # >> Call Site 2 <<
	.uleb128 .Ltmp131-.Ltmp119              #   Call between .Ltmp119 and .Ltmp131
	.uleb128 .Ltmp139-.Lfunc_begin11        #     jumps to .Ltmp139
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp131-.Lfunc_begin11        # >> Call Site 3 <<
	.uleb128 .Ltmp114-.Ltmp131              #   Call between .Ltmp131 and .Ltmp114
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp114-.Lfunc_begin11        # >> Call Site 4 <<
	.uleb128 .Ltmp117-.Ltmp114              #   Call between .Ltmp114 and .Ltmp117
	.uleb128 .Ltmp118-.Lfunc_begin11        #     jumps to .Ltmp118
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp117-.Lfunc_begin11        # >> Call Site 5 <<
	.uleb128 .Ltmp123-.Ltmp117              #   Call between .Ltmp117 and .Ltmp123
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp123-.Lfunc_begin11        # >> Call Site 6 <<
	.uleb128 .Ltmp126-.Ltmp123              #   Call between .Ltmp123 and .Ltmp126
	.uleb128 .Ltmp127-.Lfunc_begin11        #     jumps to .Ltmp127
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp126-.Lfunc_begin11        # >> Call Site 7 <<
	.uleb128 .Ltmp132-.Ltmp126              #   Call between .Ltmp126 and .Ltmp132
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp132-.Lfunc_begin11        # >> Call Site 8 <<
	.uleb128 .Ltmp135-.Ltmp132              #   Call between .Ltmp132 and .Ltmp135
	.uleb128 .Ltmp136-.Lfunc_begin11        #     jumps to .Ltmp136
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp137-.Lfunc_begin11        # >> Call Site 9 <<
	.uleb128 .Ltmp138-.Ltmp137              #   Call between .Ltmp137 and .Ltmp138
	.uleb128 .Ltmp139-.Lfunc_begin11        #     jumps to .Ltmp139
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp138-.Lfunc_begin11        # >> Call Site 10 <<
	.uleb128 .Lfunc_end136-.Ltmp138         #   Call between .Ltmp138 and .Lfunc_end136
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end11:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb # -- Begin function _ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,@function
_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb: # @_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movb	120(%rsp), %bpl
	movq	112(%rsp), %r15
	movl	104(%rsp), %r14d
	movl	96(%rsp), %ebx
	movq	88(%rsp), %r12
	movl	80(%rsp), %r10d
	movq	72(%rsp), %rax
	movq	64(%rsp), %r11
	movl	$1024, %r13d                    # imm = 0x400
	movl	%r13d, 4(%rsp)
	cmpl	%r13d, %r10d
	ja	.LBB137_5
# %bb.1:
	testq	%rdi, %rdi
	je	.LBB137_2
# %bb.3:
	movb	$1, (%r12)
	testl	%r10d, %r10d
	je	.LBB137_4
# %bb.8:
	movzbl	%bpl, %r12d
	leaq	4(%rsp), %r11
	movq	%rdx, %rdi
	movq	%r8, %rsi
	movq	%r9, %rdx
	movq	%rax, %rcx
	movl	%r10d, %r8d
	movq	%r11, %r9
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_S6_S6_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	jmp	.LBB137_9
.LBB137_5:
	cmpl	$1048576, %r10d                 # imm = 0x100000
	ja	.LBB137_7
# %bb.6:
	movb	$1, (%r12)
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movzbl	%bpl, %r12d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_jT5_jjP12ihipStream_tb
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	jmp	.LBB137_10
.LBB137_7:
	.cfi_def_cfa_offset 64
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb # TAILCALL
.LBB137_2:
	.cfi_def_cfa_offset 64
	movq	$256, (%rsi)                    # imm = 0x100
.LBB137_4:
	xorl	%eax, %eax
.LBB137_9:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
.LBB137_10:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end137:
	.size	_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb, .Lfunc_end137-_ZN7rocprim6detail15radix_sort_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_S6_S6_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
.LCPI138_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI138_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_S6_S6_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_S6_S6_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_S6_S6_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_S6_S6_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb,@function
_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_S6_S6_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb: # @_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_S6_S6_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 1568
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r14
	movl	%r8d, %r15d
	movq	%rcx, %rbp
	movq	%rdx, 24(%rsp)                  # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %r13
	movq	1584(%rsp), %rbx
	testq	$-3, %rbx
	jne	.LBB138_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	12(%rsp), %rdi
	callq	hipGetDevice
	testl	%eax, %eax
	jne	.LBB138_43
# %bb.4:                                # %thread-pre-split.i
	movl	12(%rsp), %esi
	jmp	.LBB138_5
.LBB138_1:
	movq	%rbx, %rdi
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 12(%rsp)
	testl	%eax, %eax
	js	.LBB138_2
.LBB138_5:                              # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB138_43
# %bb.6:
	movq	%rbp, 16(%rsp)                  # 8-byte Spill
	movl	%esi, %ebp
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbp,4), %eax
	testl	%eax, %eax
	je	.LBB138_7
.LBB138_9:
	movl	1576(%rsp), %ecx
	movl	$1024, (%r14)                   # imm = 0x400
	movl	%r15d, %ebp
	shrl	$10, %ebp
	movl	%r15d, %eax
	andl	$1023, %eax                     # imm = 0x3FF
	cmpl	$1, %eax
	sbbl	$-1, %ebp
	subl	1568(%rsp), %ecx
	movl	%ecx, 8(%rsp)                   # 4-byte Spill
	cmpb	$0, 1592(%rsp)
	je	.LBB138_10
# %bb.11:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 40(%rsp)
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	cmpq	$0, _ZSt4cout+16(%rax)
	je	.LBB138_13
# %bb.12:
	leaq	40(%rsp), %rsi
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB138_14
.LBB138_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB138_43
.LBB138_10:                             # %..critedge_crit_edge
	movl	%ebp, %r14d
	xorl	%eax, %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	16(%rsp), %rbp                  # 8-byte Reload
	jmp	.LBB138_33
.LBB138_7:
	leaq	40(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB138_43
# %bb.8:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread96
	leaq	1200(%rsp), %rdi
	leaq	1456(%rsp), %rsi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	leaq	1200(%rsp), %rdi
	subq	%rdi, %rax
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	xchgl	%eax, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbp,4)
	jmp	.LBB138_9
.LBB138_13:
	movl	$_ZSt4cout, %edi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB138_14:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB138_16
# %bb.15:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB138_17
.LBB138_16:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB138_17:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit65
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$256, %esi                      # imm = 0x100
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB138_19
# %bb.18:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB138_20
.LBB138_19:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB138_20:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit68
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$4, %esi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB138_22
# %bb.21:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB138_23
.LBB138_22:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB138_23:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit71
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	(%r14), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB138_25
# %bb.24:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB138_26
.LBB138_25:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB138_26:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit74
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %r14d
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB138_28
# %bb.27:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB138_29
.LBB138_28:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB138_29:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit77
	movq	16(%rsp), %rbp                  # 8-byte Reload
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	8(%rsp), %esi                   # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 40(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB138_31
# %bb.30:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB138_32
.LBB138_31:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB138_32:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit80
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 32(%rsp)                  # 8-byte Spill
.LBB138_33:                             # %.critedge
	btsq	$32, %r14
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%rbx, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB138_35
# %bb.34:
	movl	8(%rsp), %eax                   # 4-byte Reload
	movl	%eax, (%rsp)
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movq	%rbp, %rcx
	movl	%r15d, %r8d
	movl	1568(%rsp), %r9d
	callq	_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
.LBB138_35:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB138_41
# %bb.36:
	cmpb	$0, 1592(%rsp)
	je	.LBB138_41
# %bb.37:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB138_43
# %bb.38:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	32(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI138_0(%rip), %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI138_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 40(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB138_40
# %bb.39:
	leaq	40(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB138_42
.LBB138_41:                             # %.critedge57
	testl	%eax, %eax
	jne	.LBB138_43
	jmp	.LBB138_42
.LBB138_40:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB138_42:
	xorl	%eax, %eax
.LBB138_43:                             # %.critedge57.thread101
	addq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end138:
	.size	_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_S6_S6_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb, .Lfunc_end138-_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_S6_S6_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_jT5_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_jT5_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_jT5_jjP12ihipStream_tb # -- Begin function _ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_jT5_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_jT5_jjP12ihipStream_tb,@function
_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_jT5_jjP12ihipStream_tb: # @_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_jT5_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r14
	movq	%rcx, %rbx
	movq	%rsi, %r15
	movq	%rdi, %r13
	movb	128(%rsp), %r8b
	movq	120(%rsp), %rsi
	movl	112(%rsp), %r10d
	movl	104(%rsp), %r11d
	movl	96(%rsp), %ebp
	movq	88(%rsp), %rcx
	movq	80(%rsp), %rdi
	movl	%r10d, %r12d
	subl	%r11d, %r12d
	movl	$1024, 4(%rsp)                  # imm = 0x400
	testq	%r13, %r13
	je	.LBB139_1
# %bb.2:
	xorl	%eax, %eax
	testl	%ebp, %ebp
	je	.LBB139_6
# %bb.3:
	movq	%rbx, 8(%rsp)                   # 8-byte Spill
	movzbl	%r8b, %ebx
	movq	%rdx, %rdi
	movq	%rsi, %rax
	movq	%r14, %rsi
	movq	%r9, %rdx
	movl	%ebp, %r8d
	leaq	4(%rsp), %r9
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail21radix_sort_block_sortINS_13kernel_configILj256ELj4ELj4294967295EEELb0EN6thrust10device_ptrIjEES6_S6_S6_NS_19identity_decomposerEEE10hipError_tT1_T2_T3_T4_jRjT5_jjP12ihipStream_tb
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	testl	%eax, %eax
	jne	.LBB139_6
# %bb.4:
	movl	4(%rsp), %r9d
	movl	$0, %eax
	cmpl	%ebp, %r9d
	jae	.LBB139_6
# %bb.5:
	movq	%r13, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	88(%rsp), %rcx
	movl	%ebp, %r8d
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	movl	144(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEES5_jEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS8_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSA_PNS7_ISG_E10value_typeE
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB139_6:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	jmp	.LBB139_7
.LBB139_1:
	.cfi_def_cfa_offset 80
	movzbl	%r8b, %eax
	movq	%rdi, %r13
	xorl	%edi, %edi
	movq	%rsi, %r10
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebp, %r8d
	movl	$1024, %r9d                     # imm = 0x400
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEES5_jEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS8_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSA_PNS7_ISG_E10value_typeE
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
.LBB139_7:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end139:
	.size	_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_jT5_jjP12ihipStream_tb, .Lfunc_end139-_ZN7rocprim6detail21radix_sort_merge_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_NS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_jT5_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb # -- Begin function _ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb,@function
_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb: # @_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1704, %rsp                     # imm = 0x6A8
	.cfi_def_cfa_offset 1760
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %rbp
	movq	%rcx, %r15
	movq	%rdx, %r13
	movq	%rsi, %r14
	movq	%rdi, %r12
	movq	1808(%rsp), %rdi
	testq	$-3, %rdi
	jne	.LBB140_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	8(%rsp), %rdi
	callq	hipGetDevice
	testl	%eax, %eax
	jne	.LBB140_35
# %bb.4:                                # %thread-pre-split.i
	movl	8(%rsp), %esi
	jmp	.LBB140_5
.LBB140_1:
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 8(%rsp)
	testl	%eax, %eax
	js	.LBB140_2
.LBB140_5:                              # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB140_35
# %bb.6:
	movq	%r13, 24(%rsp)                  # 8-byte Spill
	movl	%esi, %r13d
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r13,4), %eax
	testl	%eax, %eax
	je	.LBB140_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread199
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	movq	%rbp, 48(%rsp)                  # 8-byte Spill
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
.LBB140_10:
	movl	1800(%rsp), %ebp
	movl	1792(%rsp), %r15d
	movl	1776(%rsp), %r13d
	leaq	232(%rsp), %rbx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEEEDaNS0_11target_archE
	movl	16(%rbx), %esi
	movl	24(%rbx), %ecx
	imull	12(%rbx), %esi
	movl	$1, %ebx
	shlq	%cl, %rbx
	movl	$1073741824, %eax               # imm = 0x40000000
	xorl	%edx, %edx
	divl	%esi
	movl	%edx, %r8d
	movl	%ebp, %eax
	movq	%r15, 56(%rsp)                  # 8-byte Spill
	subl	%r15d, %eax
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %r9d
	movl	$1073741824, %eax               # imm = 0x40000000
	xorl	%edi, %edi
	subl	%r8d, %eax
	cmpl	$1, %edx
	sbbl	$-1, %r9d
	movl	%r9d, 4(%rsp)                   # 4-byte Spill
	movl	%r9d, %ebp
	shll	%cl, %ebp
	cmpl	%eax, %r13d
	cmovbl	%r13d, %eax
	xorl	%edx, %edx
	divl	%esi
	movl	%eax, %r15d
	movl	%r13d, %esi
	cmpl	$1, %edx
	sbbl	$-1, %r15d
	movl	%ecx, 36(%rsp)                  # 4-byte Spill
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %r15d
	leaq	(,%rbp,4), %rax
	movq	%rsi, 40(%rsp)                  # 8-byte Spill
	leaq	(,%rsi,4), %rcx
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movq	%rdx, %r13
	testq	%rdx, %rdx
	cmoveq	%rcx, %rdi
	leaq	8(%rsp), %rcx
	leaq	112(%rsp), %rsi
	movq	%rcx, (%rsi)
	movq	%rax, 8(%rsi)
	movl	$4, %eax
	movq	%rax, 16(%rsi)
	leaq	104(%rsp), %rcx
	movq	%rcx, 24(%rsi)
	leaq	(,%rbx,4), %rcx
	movq	%rcx, 32(%rsi)
	movq	%rax, 40(%rsi)
	leaq	96(%rsp), %rcx
	movq	%rcx, 48(%rsi)
	leaq	(,%r15,4), %rcx
	movq	%rcx, 56(%rsi)
	movq	%rax, 64(%rsi)
	leaq	88(%rsp), %rcx
	movq	%rcx, 72(%rsi)
	movq	%rdi, 80(%rsi)
	movq	%rax, 88(%rsi)
	leaq	80(%rsp), %rcx
	movq	%rcx, 96(%rsi)
	movq	%rdi, 104(%rsi)
	movq	%rax, 112(%rsi)
	subq	$128, %rsp
	.cfi_adjust_cfa_offset 128
	movl	$15, %ecx
	movq	%rsp, %rdi
	rep;movsq (%rsi), %es:(%rdi)
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEEE10hipError_tPvRmT_
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	testq	%r12, %r12
	je	.LBB140_35
# %bb.11:
	testl	%eax, %eax
	jne	.LBB140_35
# %bb.12:
	xorl	%eax, %eax
	movl	1776(%rsp), %ecx
	testl	%ecx, %ecx
	je	.LBB140_35
# %bb.13:
	movb	1816(%rsp), %r14b
	testb	%r14b, %r14b
	je	.LBB140_27
# %bb.14:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.43, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbx, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 3(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB140_16
# %bb.15:
	leaq	3(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB140_17
.LBB140_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB140_35
.LBB140_8:
	leaq	232(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB140_35
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread204
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	movq	%rbp, 48(%rsp)                  # 8-byte Spill
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
	leaq	1392(%rsp), %rbx
	leaq	1648(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%rbx, %rax
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %ecx
	xchgl	%ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r13,4)
	jmp	.LBB140_10
.LBB140_16:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB140_17:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.44, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	4(%rsp), %esi                   # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 3(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB140_19
# %bb.18:
	leaq	3(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB140_20
.LBB140_19:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB140_20:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit161
	movl	$_ZSt4cout, %edi
	movl	$.L.str.45, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbp, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 3(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB140_22
# %bb.21:
	leaq	3(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB140_23
.LBB140_22:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB140_23:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit164
	movl	$_ZSt4cout, %edi
	movl	$.L.str.46, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 3(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB140_25
# %bb.24:
	leaq	3(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB140_26
.LBB140_25:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB140_26:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit167
	movq	1808(%rsp), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB140_35
.LBB140_27:
	movq	8(%rsp), %rdx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movzbl	%r14b, %ebx
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movl	1784(%rsp), %ecx
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	12(%rsp), %r8d                  # 4-byte Reload
	movl	1800(%rsp), %r9d
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	1824(%rsp)
	.cfi_adjust_cfa_offset 8
	movl	1824(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEES5_jNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SA_jT4_jjP12ihipStream_tb
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	testl	%eax, %eax
	je	.LBB140_28
.LBB140_35:
	addq	$1704, %rsp                     # imm = 0x6A8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB140_28:
	.cfi_def_cfa_offset 1760
	movq	%r13, %r15
	testq	%r13, %r13
	movq	88(%rsp), %rsi
	movq	80(%rsp), %r13
	movq	1760(%rsp), %rax
	cmoveq	%r13, %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	cmoveq	%rsi, %r15
	setne	%bpl
	testb	$1, 4(%rsp)                     # 1-byte Folded Reload
	sete	%r12b
	orb	%bpl, %r12b
	je	.LBB140_29
.LBB140_31:
	movl	$0, %eax
	movl	1800(%rsp), %ecx
	movl	1792(%rsp), %edx
	cmpl	%edx, %ecx
	jbe	.LBB140_35
# %bb.32:                               # %.lr.ph.preheader
	orb	4(%rsp), %bpl                   # 1-byte Folded Reload
	xorl	%r13d, %r13d
	movl	%r12d, %eax
.LBB140_33:                             # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%r13d, %r10d
	movl	36(%rsp), %ecx                  # 4-byte Reload
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %r10d
	shlq	$2, %r10
	addq	8(%rsp), %r10
	movzbl	%bpl, %r11d
	andl	$1, %r11d
	movzbl	%al, %eax
	andl	$1, %eax
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rsi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	72(%rsp), %r8                   # 8-byte Reload
	movq	1768(%rsp), %r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	1816(%rsp)
	.cfi_adjust_cfa_offset 8
	movl	1816(%rsp), %r12d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	movq	80(%rsp), %r14                  # 8-byte Reload
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	160(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	movl	1848(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS8_E10value_typeET2_T3_PNS9_ISE_E10value_typeET4_T5_PSJ_SK_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	testl	%eax, %eax
	jne	.LBB140_35
# %bb.34:                               #   in Loop: Header=BB140_33 Depth=1
	movl	%ebp, %eax
	andb	$1, %al
	movq	1784(%rsp), %rcx
	movb	%al, (%rcx)
	addl	256(%rsp), %r14d
	xorb	$1, %bpl
	incl	%r13d
	xorl	%eax, %eax
	movq	%r14, 56(%rsp)                  # 8-byte Spill
	cmpl	%r12d, %r14d
	jb	.LBB140_33
	jmp	.LBB140_35
.LBB140_29:
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	40(%rsp), %rdx                  # 8-byte Reload
	movq	1808(%rsp), %rcx
	movl	%ebx, %r8d
	callq	_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIjEEPjNS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	testl	%eax, %eax
	jne	.LBB140_35
# %bb.30:
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%r13, %rsi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	movq	1808(%rsp), %rcx
	movl	%ebx, %r8d
	callq	_ZN7rocprim9transformINS_14default_configEN6thrust10device_ptrIjEEPjNS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
	testl	%eax, %eax
	jne	.LBB140_35
	jmp	.LBB140_31
.Lfunc_end140:
	.size	_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb, .Lfunc_end140-_ZN7rocprim6detail24radix_sort_onesweep_implINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tPvRmT1_PNSt15iterator_traitsISA_E10value_typeET2_T3_PNSB_ISG_E10value_typeET4_T5_RbT6_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,"axG",@progbits,_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,comdat
	.weak	_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj # -- Begin function _ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.type	_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,@function
_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj: # @_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end141:
	.size	_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj, .Lfunc_end141-_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv,"axG",@progbits,_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv,comdat
	.weak	_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv # -- Begin function _ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv
	.type	_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv,@function
_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv: # @_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end142:
	.size	_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv, .Lfunc_end142-_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEES5_jEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS8_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSA_PNS7_ISG_E10value_typeE,"axG",@progbits,_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEES5_jEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS8_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSA_PNS7_ISG_E10value_typeE,comdat
	.weak	_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEES5_jEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS8_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSA_PNS7_ISG_E10value_typeE # -- Begin function _ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEES5_jEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS8_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSA_PNS7_ISG_E10value_typeE
	.type	_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEES5_jEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS8_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSA_PNS7_ISG_E10value_typeE,@function
_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEES5_jEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS8_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSA_PNS7_ISG_E10value_typeE: # @_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEES5_jEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS8_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSA_PNS7_ISG_E10value_typeE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %rax
	movq	88(%rsp), %r14
	movq	80(%rsp), %rbx
	movb	72(%rsp), %bpl
	movq	64(%rsp), %r11
	movl	56(%rsp), %ecx
	cmpl	$32, %ecx
	jne	.LBB143_3
# %bb.1:
	movzbl	%bpl, %r10d
	movq	%rax, %rcx
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	jmp	.LBB143_2
.LBB143_3:
	movl	48(%rsp), %r10d
	addl	%r10d, %ecx
	movl	$-1, %r15d
	movl	$-1, %r12d
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %r12d
	movl	%r10d, %ecx
	shll	%cl, %r15d
	xorl	%r12d, %r15d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movzbl	%bpl, %r10d
	movq	%rax, %rcx
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB143_2:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end143:
	.size	_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEES5_jEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS8_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSA_PNS7_ISG_E10value_typeE, .Lfunc_end143-_ZN7rocprim6detail29invoke_merge_sort_block_mergeINS_14default_configELb0EN6thrust10device_ptrIjEES5_jEENSt9enable_ifIXsr11is_integralINSt15iterator_traitsIT1_E10value_typeEEE5valueE10hipError_tE4typeEPvRmS8_T2_T3_jNS_19identity_decomposerEjjP12ihipStream_tbPSA_PNS7_ISG_E10value_typeE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE,"axG",@progbits,_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE,comdat
	.weak	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE # -- Begin function _ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE
	.type	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE,@function
_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE: # @_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1688, %rsp                     # imm = 0x698
	.cfi_def_cfa_offset 1744
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 16(%rsp)                  # 4-byte Spill
	movl	%r8d, %r15d
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r12
	movq	%rdi, %rbp
	movb	1752(%rsp), %r13b
	movq	1744(%rsp), %rdi
	movl	%r8d, 24(%rsp)
	movb	%r13b, 10(%rsp)
	testq	$-3, %rdi
	jne	.LBB144_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	180(%rsp), %rdi
	callq	hipGetDevice
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB144_82
# %bb.4:                                # %thread-pre-split.i
	movl	180(%rsp), %esi
	jmp	.LBB144_5
.LBB144_1:
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 180(%rsp)
	testl	%eax, %eax
	js	.LBB144_2
.LBB144_5:                              # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB144_82
# %bb.6:
	movq	%r14, 56(%rsp)                  # 8-byte Spill
	movl	%esi, %r14d
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4), %eax
	testl	%eax, %eax
	je	.LBB144_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread150
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
.LBB144_10:
	leaq	180(%rsp), %r14
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEDaNS0_11target_archE
	movl	(%r14), %r9d
	movl	4(%r14), %ecx
	movl	%r9d, 116(%rsp)
	movl	12(%r14), %edi
	movl	%edi, 112(%rsp)
	movl	24(%r14), %r11d
	movl	%r11d, 108(%rsp)
	movl	28(%r14), %r10d
	movl	%r10d, %r8d
	imull	%r11d, %r8d
	movl	%r8d, 104(%rsp)
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	16(%rsp)                        # 4-byte Folded Reload
	movq	%rcx, 152(%rsp)                 # 8-byte Spill
	movl	%ecx, %esi
	movq	%r9, 120(%rsp)                  # 8-byte Spill
	imull	%r9d, %esi
	xorl	%ecx, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, 76(%rsp)                  # 4-byte Spill
	movl	%r15d, %eax
	xorl	%edx, %edx
	movl	%esi, 84(%rsp)                  # 4-byte Spill
	divl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, 80(%rsp)                  # 4-byte Spill
	movl	%eax, 100(%rsp)
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	%r8d
	movl	%eax, %ebx
	cmpl	$1, %edx
	sbbl	$-1, %ebx
	movl	8(%r14), %esi
	cmpl	%r15d, %esi
	setb	11(%rsp)
	movl	%ebx, 96(%rsp)
	leal	1(%rbx), %r9d
	movl	%r9d, 92(%rsp)
	movl	%r9d, %eax
	xorl	%edx, %edx
	movq	%rdi, 160(%rsp)                 # 8-byte Spill
	divl	%edi
	movq	1760(%rsp), %rdi
	movl	%eax, %r14d
	cmpl	$1, %edx
	sbbl	$-1, %r14d
	movl	%r14d, 88(%rsp)
	movq	%rcx, 64(%rsp)
	movq	%rcx, 48(%rsp)
	movq	%rcx, 40(%rsp)
	testq	%rdi, %rdi
	je	.LBB144_11
# %bb.16:
	movq	1768(%rsp), %rdx
	cmpl	%r15d, %esi
	cmovbl	%r9d, %ecx
	leaq	(,%rcx,4), %rax
	cmpq	$5, %rax
	movl	$4, %esi
	cmovaeq	%rax, %rsi
	testq	%rbp, %rbp
	je	.LBB144_17
# %bb.18:
	movl	$1, %eax
	cmpq	%rsi, (%r12)
	jb	.LBB144_20
# %bb.19:
	xorl	%eax, %eax
	testl	%ecx, %ecx
	movq	%rbp, %rcx
	cmoveq	%rax, %rcx
	movq	%rcx, 64(%rsp)
	jmp	.LBB144_20
.LBB144_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB144_82
.LBB144_8:
	leaq	216(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB144_82
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread155
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	leaq	1376(%rsp), %rbx
	leaq	1632(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%rbx, %rax
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %ecx
	xchgl	%ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4)
	jmp	.LBB144_10
.LBB144_11:
	movq	%rbx, 128(%rsp)                 # 8-byte Spill
	movq	%r11, 136(%rsp)                 # 8-byte Spill
	movq	%r10, 144(%rsp)                 # 8-byte Spill
	movl	%r8d, 12(%rsp)                  # 4-byte Spill
	movl	%r14d, 72(%rsp)                 # 4-byte Spill
	movl	%r15d, %eax
	shlq	$2, %rax
	cmpl	%r15d, %esi
	movl	%r9d, %ebx
	cmovbl	%r9d, %ecx
	shlq	$2, %rcx
	leaq	48(%rsp), %rdx
	leaq	216(%rsp), %rdi
	movq	%rdx, (%rdi)
	movq	%rax, 8(%rdi)
	movl	$4, %r14d
	movq	%r14, 16(%rdi)
	leaq	40(%rsp), %rdx
	movq	%rdx, 24(%rdi)
	movq	%rax, 32(%rdi)
	movq	%r14, 40(%rdi)
	leaq	64(%rsp), %rax
	movq	%rax, 48(%rdi)
	movq	%rcx, 56(%rdi)
	movq	%r14, 64(%rdi)
	callq	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE10get_layoutEv
	cmpq	$5, %rax
	cmovaeq	%rax, %r14
	testq	%rbp, %rbp
	je	.LBB144_12
# %bb.13:
	movl	$1, %eax
	cmpq	%r14, (%r12)
	movl	12(%rsp), %r8d                  # 4-byte Reload
	movl	%ebx, %r9d
	jb	.LBB144_15
# %bb.14:
	leaq	216(%rsp), %rdi
	movq	%rbp, %rsi
	callq	_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE11set_storageEPv
	movl	%ebx, %r9d
	movl	12(%rsp), %r8d                  # 4-byte Reload
	xorl	%eax, %eax
	jmp	.LBB144_15
.LBB144_17:
	movq	%rsi, (%r12)
	xorl	%eax, %eax
.LBB144_20:                             # %_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEEEEEEE10hipError_tPvRmT_.exit
	movq	%rdi, 48(%rsp)
	movq	%rdx, 40(%rsp)
	jmp	.LBB144_21
.LBB144_12:
	movq	%r14, (%r12)
	xorl	%eax, %eax
	movl	12(%rsp), %r8d                  # 4-byte Reload
	movl	%ebx, %r9d
.LBB144_15:                             # %_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_S5_EEEEE10hipError_tPvRmT_.exit
	movl	72(%rsp), %r14d                 # 4-byte Reload
	movq	144(%rsp), %r10                 # 8-byte Reload
	movq	136(%rsp), %r11                 # 8-byte Reload
	movq	128(%rsp), %rbx                 # 8-byte Reload
.LBB144_21:
	testq	%rbp, %rbp
	je	.LBB144_82
# %bb.22:
	testl	%eax, %eax
	jne	.LBB144_82
# %bb.23:
	testl	%r15d, %r15d
	je	.LBB144_81
# %bb.24:
	movq	120(%rsp), %rax                 # 8-byte Reload
	cmpl	%eax, %r8d
	movl	%eax, %ecx
	cmoval	%r8d, %ecx
	movl	$710, %eax                      # imm = 0x2C6
	cmpl	16(%rsp), %ecx                  # 4-byte Folded Reload
	ja	.LBB144_82
# %bb.25:
	testb	%r13b, %r13b
	je	.LBB144_71
# %bb.26:
	movq	%r11, %r13
	movq	%r10, %r12
	movl	%r9d, 12(%rsp)                  # 4-byte Spill
	movl	%r8d, %ebp
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 216(%rsp)
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	cmpq	$0, _ZSt4cout+16(%rax)
	je	.LBB144_28
# %bb.27:
	leaq	216(%rsp), %rsi
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB144_29
.LBB144_28:
	movl	$_ZSt4cout, %edi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB144_29:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB144_31
# %bb.30:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB144_32
.LBB144_31:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB144_32:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit83
	movl	$_ZSt4cout, %edi
	movl	$.L.str.23, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	16(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB144_34
# %bb.33:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB144_35
.LBB144_34:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB144_35:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit86
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	76(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB144_37
# %bb.36:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB144_38
.LBB144_37:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB144_38:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit89
	movl	$_ZSt4cout, %edi
	movl	$.L.str.24, %esi
	movl	$26, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	120(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB144_40
# %bb.39:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB144_41
.LBB144_40:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB144_41:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit92
	movl	$_ZSt4cout, %edi
	movl	$.L.str.25, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	80(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB144_43
# %bb.42:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB144_44
.LBB144_43:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB144_44:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit95
	movl	$_ZSt4cout, %edi
	movl	$.L.str.26, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	152(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB144_46
# %bb.45:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB144_47
.LBB144_46:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB144_47:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit98
	movl	$_ZSt4cout, %edi
	movl	$.L.str.27, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	84(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB144_49
# %bb.48:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB144_50
.LBB144_49:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB144_50:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit101
	movl	$_ZSt4cout, %edi
	movl	$.L.str.28, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r13, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB144_52
# %bb.51:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB144_53
.LBB144_52:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB144_53:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit104
	movl	$_ZSt4cout, %edi
	movl	$.L.str.29, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB144_55
# %bb.54:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB144_56
.LBB144_55:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB144_56:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit107
	movl	$_ZSt4cout, %edi
	movl	$.L.str.30, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB144_58
# %bb.57:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB144_59
.LBB144_58:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB144_59:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit110
	movl	$_ZSt4cout, %edi
	movl	$.L.str.31, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB144_61
# %bb.60:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB144_62
.LBB144_61:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB144_62:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit113
	movl	$_ZSt4cout, %edi
	movl	$.L.str.32, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	12(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB144_64
# %bb.63:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB144_65
.LBB144_64:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB144_65:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit116
	movl	$_ZSt4cout, %edi
	movl	$.L.str.33, %esi
	movl	$38, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	160(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB144_67
# %bb.66:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB144_68
.LBB144_67:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB144_68:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit119
	movl	$_ZSt4cout, %edi
	movl	$.L.str.34, %esi
	movl	$44, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r14d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB144_70
# %bb.69:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB144_71
.LBB144_70:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB144_71:
	movq	$0, 168(%rsp)
	movl	16(%rsp), %eax                  # 4-byte Reload
	movl	%eax, 20(%rsp)
	cmpl	%eax, %r15d
	jbe	.LBB144_81
# %bb.72:                               # %.lr.ph
	movb	$1, %al
	leaq	96(%rsp), %r12
	leaq	108(%rsp), %r13
	leaq	100(%rsp), %rbp
	leaq	116(%rsp), %r14
	leaq	216(%rsp), %rbx
.LBB144_73:                             # =>This Inner Loop Header: Depth=1
	movl	%eax, %r15d
	leaq	11(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	10(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	1744(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	92(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	31(%rsp), %rax
	movq	%rax, 304(%rsp)
	movq	%r12, 312(%rsp)
	movq	%r13, 320(%rsp)
	movq	%rbp, 328(%rsp)
	movq	%r14, 336(%rsp)
	movq	48(%rsp), %rdx
	movq	40(%rsp), %r8
	movq	%rbx, %rdi
	testb	%r15b, %r15b
	je	.LBB144_74
# %bb.75:                               #   in Loop: Header=BB144_73 Depth=1
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	32(%rsp), %rcx                  # 8-byte Reload
	callq	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_
	jmp	.LBB144_76
.LBB144_74:                             #   in Loop: Header=BB144_73 Depth=1
	movq	%rdx, %rsi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movq	%r8, %rcx
	movq	32(%rsp), %r8                   # 8-byte Reload
	callq	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_
.LBB144_76:                             #   in Loop: Header=BB144_73 Depth=1
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB144_82
# %bb.77:                               #   in Loop: Header=BB144_73 Depth=1
	movl	%r15d, %eax
	xorb	$1, %al
	movl	20(%rsp), %ecx
	addl	%ecx, %ecx
	movl	%ecx, 20(%rsp)
	movl	24(%rsp), %edx
	cmpl	%edx, %ecx
	jb	.LBB144_73
# %bb.78:                               # %._crit_edge
	testb	$1, %r15b
	jne	.LBB144_79
.LBB144_81:
	xorl	%eax, %eax
.LBB144_82:
                                        # kill: def $eax killed $eax killed $rax
	addq	$1688, %rsp                     # imm = 0x698
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB144_79:
	.cfi_def_cfa_offset 1744
	movq	48(%rsp), %rdi
	movq	1744(%rsp), %rcx
	movzbl	10(%rsp), %r8d
	movq	56(%rsp), %rsi                  # 8-byte Reload
	callq	_ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB144_82
# %bb.80:
	movq	40(%rsp), %rdi
	movl	24(%rsp), %edx
	movq	1744(%rsp), %rcx
	movzbl	10(%rsp), %r8d
	movq	32(%rsp), %rsi                  # 8-byte Reload
	callq	_ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB144_82
	jmp	.LBB144_81
.Lfunc_end144:
	.size	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE, .Lfunc_end144-_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE,"axG",@progbits,_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE,comdat
	.weak	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE # -- Begin function _ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE
	.type	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE,@function
_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE: # @_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1688, %rsp                     # imm = 0x698
	.cfi_def_cfa_offset 1744
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 20(%rsp)                  # 4-byte Spill
	movl	%r8d, %r15d
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r12
	movq	%rdi, %rbp
	movb	1760(%rsp), %r13b
	movq	1752(%rsp), %rdi
	movl	%r8d, 28(%rsp)
	movb	%r13b, 14(%rsp)
	testq	$-3, %rdi
	jne	.LBB145_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	180(%rsp), %rdi
	callq	hipGetDevice
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB145_82
# %bb.4:                                # %thread-pre-split.i
	movl	180(%rsp), %esi
	jmp	.LBB145_5
.LBB145_1:
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 180(%rsp)
	testl	%eax, %eax
	js	.LBB145_2
.LBB145_5:                              # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB145_82
# %bb.6:
	movq	%r14, 56(%rsp)                  # 8-byte Spill
	movl	%esi, %r14d
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4), %eax
	testl	%eax, %eax
	je	.LBB145_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread150
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
.LBB145_10:
	leaq	180(%rsp), %r14
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEDaNS0_11target_archE
	movl	(%r14), %r9d
	movl	4(%r14), %ecx
	movl	%r9d, 116(%rsp)
	movl	12(%r14), %edi
	movl	%edi, 112(%rsp)
	movl	24(%r14), %r11d
	movl	%r11d, 108(%rsp)
	movl	28(%r14), %r10d
	movl	%r10d, %r8d
	imull	%r11d, %r8d
	movl	%r8d, 104(%rsp)
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	20(%rsp)                        # 4-byte Folded Reload
	movq	%rcx, 152(%rsp)                 # 8-byte Spill
	movl	%ecx, %esi
	movq	%r9, 120(%rsp)                  # 8-byte Spill
	imull	%r9d, %esi
	xorl	%ecx, %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, 76(%rsp)                  # 4-byte Spill
	movl	%r15d, %eax
	xorl	%edx, %edx
	movl	%esi, 84(%rsp)                  # 4-byte Spill
	divl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, 80(%rsp)                  # 4-byte Spill
	movl	%eax, 100(%rsp)
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	%r8d
	movl	%eax, %ebx
	cmpl	$1, %edx
	sbbl	$-1, %ebx
	movl	8(%r14), %esi
	cmpl	%r15d, %esi
	setb	15(%rsp)
	movl	%ebx, 96(%rsp)
	leal	1(%rbx), %r9d
	movl	%r9d, 92(%rsp)
	movl	%r9d, %eax
	xorl	%edx, %edx
	movq	%rdi, 160(%rsp)                 # 8-byte Spill
	divl	%edi
	movq	1768(%rsp), %rdi
	movl	%eax, %r14d
	cmpl	$1, %edx
	sbbl	$-1, %r14d
	movl	%r14d, 88(%rsp)
	movq	%rcx, 64(%rsp)
	movq	%rcx, 48(%rsp)
	movq	%rcx, 40(%rsp)
	testq	%rdi, %rdi
	je	.LBB145_11
# %bb.16:
	movq	1776(%rsp), %rdx
	cmpl	%r15d, %esi
	cmovbl	%r9d, %ecx
	leaq	(,%rcx,4), %rax
	cmpq	$5, %rax
	movl	$4, %esi
	cmovaeq	%rax, %rsi
	testq	%rbp, %rbp
	je	.LBB145_17
# %bb.18:
	movl	$1, %eax
	cmpq	%rsi, (%r12)
	jb	.LBB145_20
# %bb.19:
	xorl	%eax, %eax
	testl	%ecx, %ecx
	movq	%rbp, %rcx
	cmoveq	%rax, %rcx
	movq	%rcx, 64(%rsp)
	jmp	.LBB145_20
.LBB145_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB145_82
.LBB145_8:
	leaq	216(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB145_82
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread155
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	leaq	1376(%rsp), %rbx
	leaq	1632(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%rbx, %rax
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %ecx
	xchgl	%ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4)
	jmp	.LBB145_10
.LBB145_11:
	movq	%rbx, 128(%rsp)                 # 8-byte Spill
	movq	%r11, 136(%rsp)                 # 8-byte Spill
	movq	%r10, 144(%rsp)                 # 8-byte Spill
	movl	%r8d, 16(%rsp)                  # 4-byte Spill
	movl	%r14d, 72(%rsp)                 # 4-byte Spill
	movl	%r15d, %eax
	shlq	$2, %rax
	cmpl	%r15d, %esi
	movl	%r9d, %ebx
	cmovbl	%r9d, %ecx
	shlq	$2, %rcx
	leaq	48(%rsp), %rdx
	leaq	216(%rsp), %rdi
	movq	%rdx, (%rdi)
	movq	%rax, 8(%rdi)
	movl	$4, %r14d
	movq	%r14, 16(%rdi)
	leaq	40(%rsp), %rdx
	movq	%rdx, 24(%rdi)
	movq	%rax, 32(%rdi)
	movq	%r14, 40(%rdi)
	leaq	64(%rsp), %rax
	movq	%rax, 48(%rdi)
	movq	%rcx, 56(%rdi)
	movq	%r14, 64(%rdi)
	callq	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE10get_layoutEv
	cmpq	$5, %rax
	cmovaeq	%rax, %r14
	testq	%rbp, %rbp
	je	.LBB145_12
# %bb.13:
	movl	$1, %eax
	cmpq	%r14, (%r12)
	movl	16(%rsp), %r8d                  # 4-byte Reload
	movl	%ebx, %r9d
	jb	.LBB145_15
# %bb.14:
	leaq	216(%rsp), %rdi
	movq	%rbp, %rsi
	callq	_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE11set_storageEPv
	movl	%ebx, %r9d
	movl	16(%rsp), %r8d                  # 4-byte Reload
	xorl	%eax, %eax
	jmp	.LBB145_15
.LBB145_17:
	movq	%rsi, (%r12)
	xorl	%eax, %eax
.LBB145_20:                             # %_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEEEEEEE10hipError_tPvRmT_.exit
	movq	%rdi, 48(%rsp)
	movq	%rdx, 40(%rsp)
	jmp	.LBB145_21
.LBB145_12:
	movq	%r14, (%r12)
	xorl	%eax, %eax
	movl	16(%rsp), %r8d                  # 4-byte Reload
	movl	%ebx, %r9d
.LBB145_15:                             # %_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_S5_EEEEE10hipError_tPvRmT_.exit
	movl	72(%rsp), %r14d                 # 4-byte Reload
	movq	144(%rsp), %r10                 # 8-byte Reload
	movq	136(%rsp), %r11                 # 8-byte Reload
	movq	128(%rsp), %rbx                 # 8-byte Reload
.LBB145_21:
	testq	%rbp, %rbp
	je	.LBB145_82
# %bb.22:
	testl	%eax, %eax
	jne	.LBB145_82
# %bb.23:
	testl	%r15d, %r15d
	je	.LBB145_81
# %bb.24:
	movq	120(%rsp), %rax                 # 8-byte Reload
	cmpl	%eax, %r8d
	movl	%eax, %ecx
	cmoval	%r8d, %ecx
	movl	$710, %eax                      # imm = 0x2C6
	cmpl	20(%rsp), %ecx                  # 4-byte Folded Reload
	ja	.LBB145_82
# %bb.25:
	testb	%r13b, %r13b
	je	.LBB145_71
# %bb.26:
	movq	%r11, %r13
	movq	%r10, %r12
	movl	%r9d, 16(%rsp)                  # 4-byte Spill
	movl	%r8d, %ebp
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 216(%rsp)
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	cmpq	$0, _ZSt4cout+16(%rax)
	je	.LBB145_28
# %bb.27:
	leaq	216(%rsp), %rsi
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB145_29
.LBB145_28:
	movl	$_ZSt4cout, %edi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB145_29:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB145_31
# %bb.30:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB145_32
.LBB145_31:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB145_32:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit83
	movl	$_ZSt4cout, %edi
	movl	$.L.str.23, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	20(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB145_34
# %bb.33:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB145_35
.LBB145_34:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB145_35:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit86
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	76(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB145_37
# %bb.36:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB145_38
.LBB145_37:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB145_38:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit89
	movl	$_ZSt4cout, %edi
	movl	$.L.str.24, %esi
	movl	$26, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	120(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB145_40
# %bb.39:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB145_41
.LBB145_40:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB145_41:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit92
	movl	$_ZSt4cout, %edi
	movl	$.L.str.25, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	80(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB145_43
# %bb.42:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB145_44
.LBB145_43:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB145_44:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit95
	movl	$_ZSt4cout, %edi
	movl	$.L.str.26, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	152(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB145_46
# %bb.45:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB145_47
.LBB145_46:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB145_47:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit98
	movl	$_ZSt4cout, %edi
	movl	$.L.str.27, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	84(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB145_49
# %bb.48:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB145_50
.LBB145_49:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB145_50:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit101
	movl	$_ZSt4cout, %edi
	movl	$.L.str.28, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r13, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB145_52
# %bb.51:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB145_53
.LBB145_52:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB145_53:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit104
	movl	$_ZSt4cout, %edi
	movl	$.L.str.29, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB145_55
# %bb.54:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB145_56
.LBB145_55:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB145_56:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit107
	movl	$_ZSt4cout, %edi
	movl	$.L.str.30, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB145_58
# %bb.57:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB145_59
.LBB145_58:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB145_59:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit110
	movl	$_ZSt4cout, %edi
	movl	$.L.str.31, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB145_61
# %bb.60:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB145_62
.LBB145_61:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB145_62:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit113
	movl	$_ZSt4cout, %edi
	movl	$.L.str.32, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	16(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB145_64
# %bb.63:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB145_65
.LBB145_64:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB145_65:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit116
	movl	$_ZSt4cout, %edi
	movl	$.L.str.33, %esi
	movl	$38, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	160(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB145_67
# %bb.66:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB145_68
.LBB145_67:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB145_68:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit119
	movl	$_ZSt4cout, %edi
	movl	$.L.str.34, %esi
	movl	$44, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r14d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 216(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB145_70
# %bb.69:
	leaq	216(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB145_71
.LBB145_70:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB145_71:
	movq	$0, 168(%rsp)
	movl	20(%rsp), %eax                  # 4-byte Reload
	movl	%eax, 24(%rsp)
	cmpl	%eax, %r15d
	jbe	.LBB145_81
# %bb.72:                               # %.lr.ph
	movb	$1, %al
	leaq	96(%rsp), %r12
	leaq	108(%rsp), %r13
	leaq	100(%rsp), %rbp
	leaq	116(%rsp), %r14
	leaq	216(%rsp), %rbx
.LBB145_73:                             # =>This Inner Loop Header: Depth=1
	movl	%eax, %r15d
	leaq	15(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	14(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	1752(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	92(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	1744(%rsp), %rax
	movq	%rax, 304(%rsp)
	movq	%r12, 312(%rsp)
	movq	%r13, 320(%rsp)
	movq	%rbp, 328(%rsp)
	movq	%r14, 336(%rsp)
	movq	48(%rsp), %rdx
	movq	40(%rsp), %r8
	movq	%rbx, %rdi
	testb	%r15b, %r15b
	je	.LBB145_74
# %bb.75:                               #   in Loop: Header=BB145_73 Depth=1
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	32(%rsp), %rcx                  # 8-byte Reload
	callq	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_
	jmp	.LBB145_76
.LBB145_74:                             #   in Loop: Header=BB145_73 Depth=1
	movq	%rdx, %rsi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movq	%r8, %rcx
	movq	32(%rsp), %r8                   # 8-byte Reload
	callq	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_
.LBB145_76:                             #   in Loop: Header=BB145_73 Depth=1
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB145_82
# %bb.77:                               #   in Loop: Header=BB145_73 Depth=1
	movl	%r15d, %eax
	xorb	$1, %al
	movl	24(%rsp), %ecx
	addl	%ecx, %ecx
	movl	%ecx, 24(%rsp)
	movl	28(%rsp), %edx
	cmpl	%edx, %ecx
	jb	.LBB145_73
# %bb.78:                               # %._crit_edge
	testb	$1, %r15b
	jne	.LBB145_79
.LBB145_81:
	xorl	%eax, %eax
.LBB145_82:
                                        # kill: def $eax killed $eax killed $rax
	addq	$1688, %rsp                     # imm = 0x698
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB145_79:
	.cfi_def_cfa_offset 1744
	movq	48(%rsp), %rdi
	movq	1752(%rsp), %rcx
	movzbl	14(%rsp), %r8d
	movq	56(%rsp), %rsi                  # 8-byte Reload
	callq	_ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB145_82
# %bb.80:
	movq	40(%rsp), %rdi
	movl	28(%rsp), %edx
	movq	1752(%rsp), %rcx
	movzbl	14(%rsp), %r8d
	movq	32(%rsp), %rsi                  # 8-byte Reload
	callq	_ZN7rocprim9transformINS_14default_configEPjN6thrust10device_ptrIjEENS_8identityIjEEEE10hipError_tT0_T1_mT2_P12ihipStream_tb
                                        # kill: def $eax killed $eax def $rax
	testl	%eax, %eax
	jne	.LBB145_82
	jmp	.LBB145_81
.Lfunc_end145:
	.size	_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE, .Lfunc_end145-_ZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEDaNS0_11target_archE,"axG",@progbits,_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEDaNS0_11target_archE,comdat
	.weak	_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEDaNS0_11target_archE # -- Begin function _ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEDaNS0_11target_archE
	.type	_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEDaNS0_11target_archE,@function
_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEDaNS0_11target_archE: # @_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEDaNS0_11target_archE
	.cfi_startproc
# %bb.0:
	movq	%rdi, %rax
	cmpl	$907, %esi                      # imm = 0x38B
	jle	.LBB146_1
# %bb.8:
	cmpl	$1029, %esi                     # imm = 0x405
	jle	.LBB146_9
# %bb.12:
	cmpl	$1030, %esi                     # imm = 0x406
	je	.LBB146_20
# %bb.13:
	cmpl	$1100, %esi                     # imm = 0x44C
	je	.LBB146_21
# %bb.14:
	cmpl	$1102, %esi                     # imm = 0x44E
	jne	.LBB146_16
# %bb.15:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE(%rip), %xmm0
	jmp	.LBB146_17
.LBB146_1:
	cmpl	$899, %esi                      # imm = 0x383
	jg	.LBB146_5
# %bb.2:
	cmpl	$-1, %esi
	je	.LBB146_16
# %bb.3:
	cmpl	$803, %esi                      # imm = 0x323
	jne	.LBB146_16
# %bb.4:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE(%rip), %xmm0
	jmp	.LBB146_17
.LBB146_5:
	cmpl	$900, %esi                      # imm = 0x384
	je	.LBB146_18
# %bb.6:
	cmpl	$906, %esi                      # imm = 0x38A
	jne	.LBB146_16
# %bb.7:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE(%rip), %xmm0
	jmp	.LBB146_17
.LBB146_9:
	cmpl	$908, %esi                      # imm = 0x38C
	je	.LBB146_19
# %bb.10:
	cmpl	$910, %esi                      # imm = 0x38E
	jne	.LBB146_16
# %bb.11:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE(%rip), %xmm0
	jmp	.LBB146_17
.LBB146_16:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE(%rip), %xmm0
	jmp	.LBB146_17
.LBB146_18:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE(%rip), %xmm0
	jmp	.LBB146_17
.LBB146_20:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE(%rip), %xmm0
	jmp	.LBB146_17
.LBB146_19:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE(%rip), %xmm0
	jmp	.LBB146_17
.LBB146_21:
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE(%rip), %xmm0
.LBB146_17:
	movups	%xmm0, (%rax)
	movl	$-1, 32(%rax)
	retq
.Lfunc_end146:
	.size	_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEDaNS0_11target_archE, .Lfunc_end146-_ZN7rocprim6detail20dispatch_target_archINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEDaNS0_11target_archE
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_
.LCPI147_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI147_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_,"axG",@progbits,_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_,comdat
	.weak	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_
	.p2align	1, 0x90
	.type	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_,@function
_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_: # @_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	movq	(%rdi), %rax
	cmpb	$0, (%rax)
	je	.LBB147_20
# %bb.1:
	movq	8(%rbx), %rax
	movq	16(%rbx), %rcx
	movl	(%rax), %eax
	cmpl	(%rcx), %eax
	jae	.LBB147_2
.LBB147_20:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB147_22
# %bb.21:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB147_22:
	movq	56(%rbx), %rax
	movq	112(%rbx), %rcx
	movl	(%rcx), %edi
	movq	120(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB147_24
# %bb.23:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	callq	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
.LBB147_24:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB147_31
# %bb.25:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB147_31
# %bb.26:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.37, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB147_31
# %bb.27:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI147_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI147_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB147_29
# %bb.28:
	leaq	15(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB147_30
.LBB147_2:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB147_4
# %bb.3:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB147_4:
	movq	40(%rbx), %rax
	movq	48(%rbx), %rcx
	movl	(%rax), %edi
	movl	(%rcx), %edx
	movq	56(%rbx), %rax
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB147_6
# %bb.5:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %esi
	movq	72(%rbx), %rcx
	movl	(%rcx), %edx
	movq	80(%rbx), %rcx
	movq	(%rcx), %rcx
	movl	(%rax), %r8d
	movq	%r13, %rdi
	callq	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
.LBB147_6:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB147_31
# %bb.7:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB147_14
# %bb.8:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.35, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB147_31
# %bb.9:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI147_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI147_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movb	$10, 14(%rsp)
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.LBB147_11
# %bb.10:
	leaq	14(%rsp), %rsi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB147_12
.LBB147_29:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
	jmp	.LBB147_30
.LBB147_11:
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB147_12:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB147_14
# %bb.13:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB147_14:                             # %.thread
	movq	56(%rbx), %rax
	movq	96(%rbx), %rcx
	movl	(%rcx), %edi
	movq	104(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB147_16
# %bb.15:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	80(%rbx), %rax
	movq	(%rax), %rax
	movq	%rax, (%rsp)
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	callq	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
.LBB147_16:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB147_31
# %bb.17:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB147_31
# %bb.18:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.36, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB147_31
# %bb.19:                               # %select.unfold
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI147_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI147_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
.LBB147_30:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit80
	xorl	%eax, %eax
.LBB147_31:                             # %.critedge
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end147:
	.size	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_, .Lfunc_end147-_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_
.LCPI148_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI148_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_,"axG",@progbits,_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_,comdat
	.weak	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_
	.p2align	1, 0x90
	.type	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_,@function
_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_: # @_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	movq	(%rdi), %rax
	cmpb	$0, (%rax)
	je	.LBB148_20
# %bb.1:
	movq	8(%rbx), %rax
	movq	16(%rbx), %rcx
	movl	(%rax), %eax
	cmpl	(%rcx), %eax
	jae	.LBB148_2
.LBB148_20:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB148_22
# %bb.21:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB148_22:
	movq	56(%rbx), %rax
	movq	112(%rbx), %rcx
	movl	(%rcx), %edi
	movq	120(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB148_24
# %bb.23:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	callq	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
.LBB148_24:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB148_31
# %bb.25:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB148_31
# %bb.26:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.37, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB148_31
# %bb.27:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI148_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI148_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB148_29
# %bb.28:
	leaq	15(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB148_30
.LBB148_2:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB148_4
# %bb.3:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB148_4:
	movq	40(%rbx), %rax
	movq	48(%rbx), %rcx
	movl	(%rax), %edi
	movl	(%rcx), %edx
	movq	56(%rbx), %rax
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB148_6
# %bb.5:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %esi
	movq	72(%rbx), %rcx
	movl	(%rcx), %edx
	movq	80(%rbx), %rcx
	movq	(%rcx), %rcx
	movl	(%rax), %r8d
	movq	%r13, %rdi
	callq	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
.LBB148_6:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB148_31
# %bb.7:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB148_14
# %bb.8:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.35, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB148_31
# %bb.9:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI148_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI148_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movb	$10, 14(%rsp)
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.LBB148_11
# %bb.10:
	leaq	14(%rsp), %rsi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB148_12
.LBB148_29:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
	jmp	.LBB148_30
.LBB148_11:
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB148_12:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB148_14
# %bb.13:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB148_14:                             # %.thread
	movq	56(%rbx), %rax
	movq	96(%rbx), %rcx
	movl	(%rcx), %edi
	movq	104(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB148_16
# %bb.15:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	80(%rbx), %rax
	movq	(%rax), %rax
	movq	%rax, (%rsp)
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	callq	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
.LBB148_16:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB148_31
# %bb.17:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB148_31
# %bb.18:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.36, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB148_31
# %bb.19:                               # %select.unfold
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI148_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI148_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
.LBB148_30:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit80
	xorl	%eax, %eax
.LBB148_31:                             # %.critedge
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end148:
	.size	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_, .Lfunc_end148-_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE10get_layoutEv,"axG",@progbits,_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE10get_layoutEv,comdat
	.weak	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE10get_layoutEv # -- Begin function _ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE10get_layoutEv
	.p2align	1, 0x90
	.type	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE10get_layoutEv,@function
_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE10get_layoutEv: # @_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE10get_layoutEv
	.cfi_startproc
# %bb.0:                                # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE10get_layoutEvENKUlRKT_E_clIS4_EEDaS8_.exit.i.i
	movq	8(%rdi), %rax
	movq	16(%rdi), %rsi
	movq	32(%rdi), %r8
	movq	40(%rdi), %rcx
	testq	%r8, %r8
	je	.LBB149_2
# %bb.1:
	xorl	%edx, %edx
	divq	%rcx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%rcx, %rax
	addq	%r8, %rax
.LBB149_2:                              # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE10get_layoutEvENKUlRKT_E_clIS4_EEDaS8_.exit12.i.i
	movq	56(%rdi), %r8
	movq	64(%rdi), %rdi
	testq	%r8, %r8
	je	.LBB149_4
# %bb.3:
	xorl	%edx, %edx
	divq	%rdi
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%rdi, %rax
	addq	%r8, %rax
.LBB149_4:                              # %_ZN7rocprim6detail17for_each_in_tupleIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_S5_EEEZNKS3_16linear_partitionIJS5_S5_S5_EE10get_layoutEvEUlRKT_E_EEvOSB_OT0_.exit
	cmpq	%rcx, %rsi
	cmovaq	%rsi, %rcx
	cmpq	%rdi, %rcx
	cmovbeq	%rdi, %rcx
	cmpq	$1, %rcx
	adcq	$0, %rcx
	movq	%rcx, %rdx
	retq
.Lfunc_end149:
	.size	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE10get_layoutEv, .Lfunc_end149-_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE10get_layoutEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE11set_storageEPv,"axG",@progbits,_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE11set_storageEPv,comdat
	.weak	_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE11set_storageEPv # -- Begin function _ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE11set_storageEPv
	.p2align	1, 0x90
	.type	_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE11set_storageEPv,@function
_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE11set_storageEPv: # @_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE11set_storageEPv
	.cfi_startproc
# %bb.0:                                # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE11set_storageEPvENKUlRT_E_clIS4_EEDaS8_.exit.i.i
	movq	8(%rdi), %rax
	testq	%rax, %rax
	movq	%rsi, %rcx
	cmoveq	%rax, %rcx
	movq	(%rdi), %rdx
	movq	%rcx, (%rdx)
	movq	32(%rdi), %rcx
	testq	%rcx, %rcx
	je	.LBB150_1
# %bb.2:
	movq	40(%rdi), %r8
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	leaq	(%rsi,%rax), %rdx
	jmp	.LBB150_3
.LBB150_1:
	xorl	%edx, %edx
.LBB150_3:                              # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE11set_storageEPvENKUlRT_E_clIS4_EEDaS8_.exit16.i.i
	movq	24(%rdi), %r8
	movq	%rdx, (%r8)
	cmpq	$0, 56(%rdi)
	je	.LBB150_4
# %bb.5:
	addq	%rcx, %rax
	movq	64(%rdi), %rcx
	xorl	%edx, %edx
	divq	%rcx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%rcx, %rax
	addq	%rax, %rsi
	jmp	.LBB150_6
.LBB150_4:
	xorl	%esi, %esi
.LBB150_6:                              # %_ZN7rocprim6detail17for_each_in_tupleIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_S5_EEEZNS3_16linear_partitionIJS5_S5_S5_EE11set_storageEPvEUlRT_E_EEvOSB_OT0_.exit
	movq	48(%rdi), %rax
	movq	%rsi, (%rax)
	retq
.Lfunc_end150:
	.size	_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE11set_storageEPv, .Lfunc_end150-_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_S4_EE11set_storageEPv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.weak	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_ # -- Begin function _ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.type	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@function
_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_: # @_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	3(%rsp), %rax
	movq	%rax, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end151:
	.size	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, .Lfunc_end151-_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"axG",@progbits,_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
	.weak	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_ # -- Begin function _ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.type	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,@function
_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_: # @_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	48(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	12(%rsp), %rdx
	movl	%r8d, (%rdx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end152:
	.size	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, .Lfunc_end152-_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"axG",@progbits,_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
	.weak	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_ # -- Begin function _ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.type	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,@function
_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_: # @_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	48(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	12(%rsp), %rdx
	movl	%r8d, (%rdx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end153:
	.size	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, .Lfunc_end153-_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.weak	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_ # -- Begin function _ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.type	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@function
_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_: # @_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	3(%rsp), %rax
	movq	%rax, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end154:
	.size	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, .Lfunc_end154-_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"axG",@progbits,_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
	.weak	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_ # -- Begin function _ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.type	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,@function
_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_: # @_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	40(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	32(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end155:
	.size	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, .Lfunc_end155-_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"axG",@progbits,_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
	.weak	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_ # -- Begin function _ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.type	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,@function
_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_: # @_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	40(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	32(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end156:
	.size	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, .Lfunc_end156-_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_
.LCPI157_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI157_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_,"axG",@progbits,_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_,comdat
	.weak	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_
	.p2align	1, 0x90
	.type	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_,@function
_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_: # @_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	movq	(%rdi), %rax
	cmpb	$0, (%rax)
	je	.LBB157_20
# %bb.1:
	movq	8(%rbx), %rax
	movq	16(%rbx), %rcx
	movl	(%rax), %eax
	cmpl	(%rcx), %eax
	jae	.LBB157_2
.LBB157_20:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB157_22
# %bb.21:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB157_22:
	movq	56(%rbx), %rax
	movq	112(%rbx), %rcx
	movl	(%rcx), %edi
	movq	120(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB157_24
# %bb.23:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	88(%rbx), %rax
	movl	(%rax), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB157_24:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB157_31
# %bb.25:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB157_31
# %bb.26:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.37, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB157_31
# %bb.27:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI157_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI157_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB157_29
# %bb.28:
	leaq	15(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB157_30
.LBB157_2:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB157_4
# %bb.3:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB157_4:
	movq	40(%rbx), %rax
	movq	48(%rbx), %rcx
	movl	(%rax), %edi
	movl	(%rcx), %edx
	movq	56(%rbx), %rax
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB157_6
# %bb.5:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %esi
	movq	72(%rbx), %rcx
	movl	(%rcx), %edx
	movq	80(%rbx), %rcx
	movq	(%rcx), %rcx
	movq	88(%rbx), %rdi
	movl	(%rdi), %r8d
	movl	(%rax), %r9d
	movq	%r13, %rdi
	callq	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
.LBB157_6:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB157_31
# %bb.7:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB157_14
# %bb.8:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.35, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB157_31
# %bb.9:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI157_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI157_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movb	$10, 14(%rsp)
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.LBB157_11
# %bb.10:
	leaq	14(%rsp), %rsi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB157_12
.LBB157_29:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
	jmp	.LBB157_30
.LBB157_11:
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB157_12:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB157_14
# %bb.13:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB157_14:                             # %.thread
	movq	56(%rbx), %rax
	movq	96(%rbx), %rcx
	movl	(%rcx), %edi
	movq	104(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB157_16
# %bb.15:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	88(%rbx), %rax
	movl	(%rax), %eax
	movq	80(%rbx), %r10
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	pushq	(%r10)
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB157_16:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB157_31
# %bb.17:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB157_31
# %bb.18:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.36, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB157_31
# %bb.19:                               # %select.unfold
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI157_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI157_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
.LBB157_30:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit83
	xorl	%eax, %eax
.LBB157_31:                             # %.critedge
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end157:
	.size	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_, .Lfunc_end157-_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIPjS5_SS_S5_EES9_SP_SC_SD_SE_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_
.LCPI158_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI158_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_,"axG",@progbits,_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_,comdat
	.weak	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_
	.p2align	1, 0x90
	.type	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_,@function
_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_: # @_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	movq	(%rdi), %rax
	cmpb	$0, (%rax)
	je	.LBB158_20
# %bb.1:
	movq	8(%rbx), %rax
	movq	16(%rbx), %rcx
	movl	(%rax), %eax
	cmpl	(%rcx), %eax
	jae	.LBB158_2
.LBB158_20:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB158_22
# %bb.21:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB158_22:
	movq	56(%rbx), %rax
	movq	112(%rbx), %rcx
	movl	(%rcx), %edi
	movq	120(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB158_24
# %bb.23:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	88(%rbx), %rax
	movl	(%rax), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB158_24:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB158_31
# %bb.25:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB158_31
# %bb.26:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.37, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB158_31
# %bb.27:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI158_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI158_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 15(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB158_29
# %bb.28:
	leaq	15(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB158_30
.LBB158_2:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB158_4
# %bb.3:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB158_4:
	movq	40(%rbx), %rax
	movq	48(%rbx), %rcx
	movl	(%rax), %edi
	movl	(%rcx), %edx
	movq	56(%rbx), %rax
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB158_6
# %bb.5:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %esi
	movq	72(%rbx), %rcx
	movl	(%rcx), %edx
	movq	80(%rbx), %rcx
	movq	(%rcx), %rcx
	movq	88(%rbx), %rdi
	movl	(%rdi), %r8d
	movl	(%rax), %r9d
	movq	%r13, %rdi
	callq	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
.LBB158_6:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB158_31
# %bb.7:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB158_14
# %bb.8:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.35, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB158_31
# %bb.9:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI158_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI158_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movb	$10, 14(%rsp)
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.LBB158_11
# %bb.10:
	leaq	14(%rsp), %rsi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB158_12
.LBB158_29:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
	jmp	.LBB158_30
.LBB158_11:
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB158_12:
	movq	24(%rbx), %rax
	cmpb	$0, (%rax)
	je	.LBB158_14
# %bb.13:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	movq	%rax, (%rcx)
.LBB158_14:                             # %.thread
	movq	56(%rbx), %rax
	movq	96(%rbx), %rcx
	movl	(%rcx), %edi
	movq	104(%rbx), %rcx
	movl	(%rcx), %edx
	movq	(%rax), %r9
	orq	%rbp, %rdi
	orq	%rbp, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB158_16
# %bb.15:
	movq	8(%rbx), %rax
	movq	64(%rbx), %rcx
	movl	(%rcx), %r8d
	movl	(%rax), %r9d
	movq	88(%rbx), %rax
	movl	(%rax), %eax
	movq	80(%rbx), %r10
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	pushq	(%r10)
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB158_16:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB158_31
# %bb.17:
	movq	24(%rbx), %rcx
	xorl	%eax, %eax
	cmpb	$0, (%rcx)
	je	.LBB158_31
# %bb.18:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.36, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	64(%rbx), %rax
	movl	(%rax), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rbx), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB158_31
# %bb.19:                               # %select.unfold
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rbx), %rcx
	subq	(%rcx), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI158_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI158_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
.LBB158_30:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit83
	xorl	%eax, %eax
.LBB158_31:                             # %.critedge
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end158:
	.size	_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_, .Lfunc_end158-_ZZN7rocprim6detail22merge_sort_block_mergeINS_14default_configEN6thrust10device_ptrIjEES5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEE10hipError_tPvRmT0_T1_T2_jT3_P12ihipStream_tbPNSt15iterator_traitsISC_E10value_typeEPNSI_ISD_E10value_typeEENKUlT_SC_SD_SE_E_clIS5_PjS5_SS_EES9_SP_SC_SD_SE_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.weak	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_ # -- Begin function _ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.type	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@function
_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_: # @_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%r8d, (%rax)
	leaq	40(%rsp), %r8
	movq	%rdi, (%r8)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	movq	%rsp, %rcx
	movl	%r9d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%r8, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rax, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end159:
	.size	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, .Lfunc_end159-_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"axG",@progbits,_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
	.weak	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_ # -- Begin function _ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.type	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,@function
_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_: # @_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	48(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	12(%rsp), %rdx
	movl	%r8d, (%rdx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end160:
	.size	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, .Lfunc_end160-_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"axG",@progbits,_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
	.weak	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_ # -- Begin function _ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.type	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,@function
_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_: # @_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	48(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	12(%rsp), %rdx
	movl	%r8d, (%rdx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end161:
	.size	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, .Lfunc_end161-_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.weak	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_ # -- Begin function _ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.type	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@function
_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_: # @_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%r8d, (%rdi)
	leaq	8(%rsp), %r8
	movl	%esi, (%r8)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	movq	%rsp, %rcx
	movl	%r9d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%r8, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rdi, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end162:
	.size	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, .Lfunc_end162-_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"axG",@progbits,_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
	.weak	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_ # -- Begin function _ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.type	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,@function
_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_: # @_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	40(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	32(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end163:
	.size	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, .Lfunc_end163-_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"axG",@progbits,_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
	.weak	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_ # -- Begin function _ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.type	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,@function
_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_: # @_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	40(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	32(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end164:
	.size	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, .Lfunc_end164-_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEEEDaNS0_11target_archE,"axG",@progbits,_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEEEDaNS0_11target_archE,comdat
	.weak	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEEEDaNS0_11target_archE # -- Begin function _ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEEEDaNS0_11target_archE
	.type	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEEEDaNS0_11target_archE,@function
_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEEEDaNS0_11target_archE: # @_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEEEDaNS0_11target_archE
	.cfi_startproc
# %bb.0:
	movq	%rdi, %rax
	cmpl	$907, %esi                      # imm = 0x38B
	jle	.LBB165_6
# %bb.1:
	cmpl	$1029, %esi                     # imm = 0x405
	jle	.LBB165_14
# %bb.2:
	cmpl	$1030, %esi                     # imm = 0x406
	je	.LBB165_19
# %bb.3:
	cmpl	$1100, %esi                     # imm = 0x44C
	je	.LBB165_21
# %bb.4:
	cmpl	$1102, %esi                     # imm = 0x44E
	jne	.LBB165_17
# %bb.5:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE(%rip), %xmm0
	jmp	.LBB165_10
.LBB165_6:
	cmpl	$899, %esi                      # imm = 0x383
	jg	.LBB165_11
# %bb.7:
	cmpl	$-1, %esi
	je	.LBB165_17
# %bb.8:
	cmpl	$803, %esi                      # imm = 0x323
	jne	.LBB165_17
# %bb.9:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE(%rip), %xmm0
	jmp	.LBB165_10
.LBB165_11:
	cmpl	$900, %esi                      # imm = 0x384
	je	.LBB165_18
# %bb.12:
	cmpl	$906, %esi                      # imm = 0x38A
	jne	.LBB165_17
# %bb.13:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE(%rip), %xmm0
	jmp	.LBB165_10
.LBB165_14:
	cmpl	$908, %esi                      # imm = 0x38C
	je	.LBB165_20
# %bb.15:
	cmpl	$910, %esi                      # imm = 0x38E
	jne	.LBB165_17
# %bb.16:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE(%rip), %xmm0
	jmp	.LBB165_10
.LBB165_17:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE(%rip), %xmm0
	jmp	.LBB165_10
.LBB165_18:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE(%rip), %xmm0
	jmp	.LBB165_10
.LBB165_19:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE(%rip), %xmm0
	jmp	.LBB165_10
.LBB165_20:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE(%rip), %xmm0
	jmp	.LBB165_10
.LBB165_21:
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE+16(%rip), %xmm0
	movups	%xmm0, 16(%rax)
	movups	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE(%rip), %xmm0
.LBB165_10:
	movups	%xmm0, (%rax)
	retq
.Lfunc_end165:
	.size	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEEEDaNS0_11target_archE, .Lfunc_end165-_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEEEDaNS0_11target_archE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEEE10hipError_tPvRmT_,"axG",@progbits,_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEEE10hipError_tPvRmT_,comdat
	.weak	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEEE10hipError_tPvRmT_ # -- Begin function _ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEEE10hipError_tPvRmT_
	.type	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEEE10hipError_tPvRmT_,@function
_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEEE10hipError_tPvRmT_: # @_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEEE10hipError_tPvRmT_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r15
	movq	%rdi, %r14
	leaq	80(%rsp), %rbx
	leaq	8(%rsp), %r12
	movq	$1, (%r12)
	movq	%rsp, %r13
	movq	$0, (%r13)
	leaq	16(%rsp), %rsi
	movq	%r12, (%rsi)
	movq	%r13, 8(%rsi)
	movq	%rbx, %rdi
	callq	_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S5_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE
	movq	(%r13), %rax
	cmpq	$5, %rax
	movl	$4, %ecx
	cmovaeq	%rax, %rcx
	testq	%r14, %r14
	je	.LBB166_1
# %bb.2:
	movl	$1, %eax
	cmpq	%rcx, (%r15)
	jb	.LBB166_5
# %bb.3:
	movq	%r14, 8(%rsp)
	movq	$0, (%rsp)
	leaq	16(%rsp), %rsi
	movq	%r13, (%rsi)
	movq	%r12, 8(%rsi)
	movq	%rbx, %rdi
	callq	_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNS3_16linear_partitionIJS5_S5_S7_S5_S5_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE
	jmp	.LBB166_4
.LBB166_1:
	movq	%rcx, (%r15)
.LBB166_4:
	xorl	%eax, %eax
.LBB166_5:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end166:
	.size	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEEE10hipError_tPvRmT_, .Lfunc_end166-_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEEE10hipError_tPvRmT_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEES5_jNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SA_jT4_jjP12ihipStream_tb
.LCPI167_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI167_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEES5_jNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SA_jT4_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEES5_jNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SA_jT4_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEES5_jNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SA_jT4_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEES5_jNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SA_jT4_jjP12ihipStream_tb,@function
_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEES5_jNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SA_jT4_jjP12ihipStream_tb: # @_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEES5_jNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SA_jT4_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 1568
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %r13d
	movl	%r8d, %r15d
	movl	%ecx, %r12d
	movq	%rdx, %rbx
	movq	%rdi, %rbp
	movq	1576(%rsp), %rdi
	testq	$-3, %rdi
	jne	.LBB167_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	4(%rsp), %rdi
	callq	hipGetDevice
	testl	%eax, %eax
	jne	.LBB167_37
# %bb.4:                                # %thread-pre-split.i
	movl	4(%rsp), %esi
	jmp	.LBB167_5
.LBB167_1:
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 4(%rsp)
	testl	%eax, %eax
	js	.LBB167_2
.LBB167_5:                              # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB167_37
# %bb.6:
	movq	%rbx, 8(%rsp)                   # 8-byte Spill
	movl	%esi, %ebx
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4), %eax
	testl	%eax, %eax
	je	.LBB167_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread118
	movl	%r15d, 20(%rsp)                 # 4-byte Spill
.LBB167_10:
	leaq	40(%rsp), %r15
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEEEDaNS0_11target_archE
	movl	4(%r15), %esi
	movl	24(%r15), %ecx
	imull	(%r15), %esi
	movl	%r12d, %eax
	xorl	%edx, %edx
	divl	%esi
	movl	%eax, %r14d
	cmpl	$1, %edx
	movl	%eax, %ebx
	sbbl	$-1, %ebx
	movl	1568(%rsp), %eax
	subl	%r13d, %eax
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %r15d
	cmpl	$1, %edx
	sbbl	$-1, %r15d
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %r15d
	leaq	(,%r15,4), %rdx
	movq	8(%rsp), %rdi                   # 8-byte Reload
	xorl	%esi, %esi
	movq	1576(%rsp), %rcx
	callq	hipMemsetAsync
	testl	%eax, %eax
	jne	.LBB167_37
# %bb.11:
	movl	%r14d, 32(%rsp)                 # 4-byte Spill
	cmpb	$0, 1584(%rsp)
	je	.LBB167_12
# %bb.13:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.47, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %r14d
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 4(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB167_15
# %bb.14:
	leaq	4(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB167_16
.LBB167_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB167_37
.LBB167_8:
	leaq	40(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB167_37
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread123
	movl	%r15d, 20(%rsp)                 # 4-byte Spill
	leaq	1200(%rsp), %r15
	leaq	1456(%rsp), %rsi
	movq	%r15, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%r15, %rax
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %ecx
	xchgl	%ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4)
	jmp	.LBB167_10
.LBB167_12:                             # %._crit_edge
	movl	%ebx, %r14d
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	1576(%rsp), %rbx
	jmp	.LBB167_20
.LBB167_15:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB167_16:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movq	1576(%rsp), %rbx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.48, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	32(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 4(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB167_18
# %bb.17:
	leaq	4(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB167_19
.LBB167_18:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB167_19:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit92
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 24(%rsp)                  # 8-byte Spill
.LBB167_20:
	movl	40(%rsp), %edx
	btsq	$32, %r14
	btsq	$32, %rdx
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%rbx, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB167_22
# %bb.21:
	movq	%rbp, %rdi
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movl	%r12d, %edx
	movl	32(%rsp), %ecx                  # 4-byte Reload
	movl	%r13d, %r8d
	movl	1568(%rsp), %r9d
	callq	_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
.LBB167_22:
	callq	hipGetLastError
	testl	%eax, %eax
	movb	1584(%rsp), %bpl
	jne	.LBB167_28
# %bb.23:
	testb	%bpl, %bpl
	je	.LBB167_28
# %bb.24:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.49, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r12d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB167_37
# %bb.25:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	24(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI167_0(%rip), %xmm0
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	32(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI167_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 4(%rsp)
	movq	(%r12), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%r12,%rax)
	je	.LBB167_27
# %bb.26:
	leaq	4(%rsp), %rsi
	movl	$1, %edx
	movq	%r12, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB167_29
.LBB167_28:                             # %.critedge
	testl	%eax, %eax
	jne	.LBB167_37
	jmp	.LBB167_29
.LBB167_27:
	movq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB167_29:
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	testb	%bpl, %bpl
	je	.LBB167_31
# %bb.30:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 24(%rsp)                  # 8-byte Spill
.LBB167_31:
	movl	40(%rsp), %edx
	movl	20(%rsp), %edi                  # 4-byte Reload
	orq	%rbx, %rdi
	orq	%rbx, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	1576(%rsp), %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB167_33
# %bb.32:
	movq	8(%rsp), %rdi                   # 8-byte Reload
	callq	_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_
.LBB167_33:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB167_37
# %bb.34:
	testb	%bpl, %bpl
	je	.LBB167_37
# %bb.35:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.50, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	1576(%rsp), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB167_37
# %bb.36:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	24(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI167_0(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI167_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
	xorl	%eax, %eax
.LBB167_37:
	addq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end167:
	.size	_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEES5_jNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SA_jT4_jjP12ihipStream_tb, .Lfunc_end167-_ZN7rocprim6detail34radix_sort_onesweep_global_offsetsINS_14default_configELb0EN6thrust10device_ptrIjEES5_jNS_19identity_decomposerEEE10hipError_tT1_T2_PT3_SA_jT4_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS8_E10value_typeET2_T3_PNS9_ISE_E10value_typeET4_T5_PSJ_SK_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb
.LCPI168_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI168_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS8_E10value_typeET2_T3_PNS9_ISE_E10value_typeET4_T5_PSJ_SK_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS8_E10value_typeET2_T3_PNS9_ISE_E10value_typeET4_T5_PSJ_SK_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS8_E10value_typeET2_T3_PNS9_ISE_E10value_typeET4_T5_PSJ_SK_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb
	.type	_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS8_E10value_typeET2_T3_PNS9_ISE_E10value_typeET4_T5_PSJ_SK_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb,@function
_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS8_E10value_typeET2_T3_PNS9_ISE_E10value_typeET4_T5_PSJ_SK_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb: # @_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS8_E10value_typeET2_T3_PNS9_ISE_E10value_typeET4_T5_PSJ_SK_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1624, %rsp                     # imm = 0x658
	.cfi_def_cfa_offset 1680
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r15
	movq	%r8, %r12
	movq	%rcx, %r13
	movq	%rdx, %rbp
	movq	%rsi, %rbx
	movq	%rdi, 88(%rsp)                  # 8-byte Spill
	testq	$-3, 1744(%rsp)
	jne	.LBB168_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	8(%rsp), %rdi
	callq	hipGetDevice
	testl	%eax, %eax
	jne	.LBB168_74
# %bb.4:                                # %thread-pre-split.i
	movl	8(%rsp), %esi
	jmp	.LBB168_5
.LBB168_1:
	movq	1744(%rsp), %rdi
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 8(%rsp)
	testl	%eax, %eax
	js	.LBB168_2
.LBB168_5:                              # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB168_74
# %bb.6:
	movl	%esi, %r14d
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4), %eax
	testl	%eax, %eax
	je	.LBB168_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread249
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
.LBB168_10:
	movl	1728(%rsp), %r14d
	leaq	152(%rsp), %rbx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEEEDaNS0_11target_archE
	movq	%r14, %r8
	movl	1736(%rsp), %edi
	movl	16(%rbx), %r9d
	movl	24(%rbx), %eax
	imull	12(%rbx), %r9d
	subl	%r8d, %edi
	cmpl	%edi, %eax
	movl	%eax, 76(%rsp)                  # 4-byte Spill
	cmovbl	%eax, %edi
	movl	$1073741824, %r10d              # imm = 0x40000000
	movl	$1073741824, %eax               # imm = 0x40000000
	xorl	%edx, %edx
	divl	%r9d
	subl	%edx, %r10d
	movl	1680(%rsp), %r11d
	movl	%r11d, %eax
	xorl	%edx, %edx
	divl	%r10d
	movl	%eax, %ecx
	xorl	%eax, %eax
	xorl	%esi, %esi
	testl	%edx, %edx
	setne	%sil
	movl	%r11d, %edx
	cmpq	%r10, %rdx
	movq	%r10, 136(%rsp)                 # 8-byte Spill
	movq	%rdx, 128(%rsp)                 # 8-byte Spill
	cmovbq	%rdx, %r10
	movq	%r10, 144(%rsp)                 # 8-byte Spill
	addl	%ecx, %esi
	je	.LBB168_74
# %bb.11:                               # %.lr.ph
	movq	%rbp, 56(%rsp)                  # 8-byte Spill
	movq	%r13, 80(%rsp)                  # 8-byte Spill
	movq	%r12, 48(%rsp)                  # 8-byte Spill
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	movb	1712(%rsp), %al
	movq	1696(%rsp), %r14
	movq	1688(%rsp), %rcx
	movl	%r9d, %edx
	movq	%rdx, 120(%rsp)                 # 8-byte Spill
	movl	%r8d, %edx
	movq	%rdx, 112(%rsp)                 # 8-byte Spill
	movq	%rdi, 32(%rsp)                  # 8-byte Spill
	movl	%edi, %edx
	movq	%rdx, 104(%rsp)                 # 8-byte Spill
	movl	%esi, %edx
	movq	%rdx, 96(%rsp)                  # 8-byte Spill
	andb	1720(%rsp), %al
	movb	%al, 15(%rsp)                   # 1-byte Spill
	xorl	%ebp, %ebp
	movl	%r9d, 72(%rsp)                  # 4-byte Spill
.LBB168_12:                             # =>This Inner Loop Header: Depth=1
	movl	%ebp, %r15d
	movq	144(%rsp), %rax                 # 8-byte Reload
	imull	%eax, %r15d
	movl	1680(%rsp), %ebx
	subl	%r15d, %ebx
	cmpl	%eax, %ebx
	movl	%eax, %r12d
	cmovbl	%ebx, %r12d
	movl	%r12d, %eax
	xorl	%edx, %edx
	divl	%r9d
	movl	%eax, %r13d
	movq	%r14, 16(%rsp)                  # 8-byte Spill
	movq	%rcx, 40(%rsp)                  # 8-byte Spill
	cmpl	$1, %edx
	movl	%eax, %r14d
	sbbl	$-1, %r14d
	movl	%r14d, %edx
	movl	76(%rsp), %ecx                  # 4-byte Reload
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %edx
	shlq	$2, %rdx
	movq	1704(%rsp), %rdi
	xorl	%esi, %esi
	movq	1744(%rsp), %rcx
	callq	hipMemsetAsync
	testl	%eax, %eax
	jne	.LBB168_74
# %bb.13:                               #   in Loop: Header=BB168_12 Depth=1
	movl	%r14d, %r14d
	cmpb	$0, 1752(%rsp)
	je	.LBB168_14
# %bb.15:                               #   in Loop: Header=BB168_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.51, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	176(%rsp), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB168_17
# %bb.16:                               #   in Loop: Header=BB168_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB168_18
.LBB168_14:                             #   in Loop: Header=BB168_12 Depth=1
	xorl	%ebx, %ebx
	jmp	.LBB168_52
.LBB168_17:                             #   in Loop: Header=BB168_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB168_18:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
                                        #   in Loop: Header=BB168_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.41, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	120(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB168_20
# %bb.19:                               #   in Loop: Header=BB168_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB168_21
.LBB168_20:                             #   in Loop: Header=BB168_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB168_21:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit158
                                        #   in Loop: Header=BB168_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.52, %esi
	movl	$21, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	136(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB168_23
# %bb.22:                               #   in Loop: Header=BB168_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB168_24
.LBB168_23:                             #   in Loop: Header=BB168_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB168_24:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit161
                                        #   in Loop: Header=BB168_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.53, %esi
	movl	$4, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	112(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB168_26
# %bb.25:                               #   in Loop: Header=BB168_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB168_27
.LBB168_26:                             #   in Loop: Header=BB168_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB168_27:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit164
                                        #   in Loop: Header=BB168_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.54, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	104(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB168_29
# %bb.28:                               #   in Loop: Header=BB168_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB168_30
.LBB168_29:                             #   in Loop: Header=BB168_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB168_30:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit167
                                        #   in Loop: Header=BB168_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.55, %esi
	movl	$8, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	96(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB168_32
# %bb.31:                               #   in Loop: Header=BB168_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB168_33
.LBB168_32:                             #   in Loop: Header=BB168_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB168_33:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit170
                                        #   in Loop: Header=BB168_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.56, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbp, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB168_35
# %bb.34:                               #   in Loop: Header=BB168_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB168_36
.LBB168_35:                             #   in Loop: Header=BB168_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB168_36:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit173
                                        #   in Loop: Header=BB168_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.57, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB168_38
# %bb.37:                               #   in Loop: Header=BB168_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB168_39
.LBB168_38:                             #   in Loop: Header=BB168_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB168_39:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit176
                                        #   in Loop: Header=BB168_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.58, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r12d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB168_41
# %bb.40:                               #   in Loop: Header=BB168_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB168_42
.LBB168_41:                             #   in Loop: Header=BB168_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB168_42:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit179
                                        #   in Loop: Header=BB168_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.59, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB168_44
# %bb.43:                               #   in Loop: Header=BB168_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB168_45
.LBB168_44:                             #   in Loop: Header=BB168_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB168_45:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit182
                                        #   in Loop: Header=BB168_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.47, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB168_47
# %bb.46:                               #   in Loop: Header=BB168_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB168_48
.LBB168_47:                             #   in Loop: Header=BB168_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB168_48:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit185
                                        #   in Loop: Header=BB168_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.48, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r13d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 8(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB168_50
# %bb.49:                               #   in Loop: Header=BB168_12 Depth=1
	movl	$1, %edx
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB168_51
.LBB168_50:                             #   in Loop: Header=BB168_12 Depth=1
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB168_51:                             # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit188
                                        #   in Loop: Header=BB168_12 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rbx
.LBB168_52:                             #   in Loop: Header=BB168_12 Depth=1
	movl	164(%rsp), %edx
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %r14
	orq	%rax, %rdx
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	1744(%rsp), %r9
	callq	__hipPushCallConfiguration
	cmpb	$0, 15(%rsp)                    # 1-byte Folded Reload
	je	.LBB168_55
# %bb.53:                               #   in Loop: Header=BB168_12 Depth=1
	testl	%eax, %eax
	movq	40(%rsp), %r14                  # 8-byte Reload
	jne	.LBB168_65
# %bb.54:                               #   in Loop: Header=BB168_12 Depth=1
	movl	%r15d, %eax
	movq	88(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdi
	movq	80(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	72(%rsp), %rcx                  # 8-byte Reload
	movl	%r12d, %r8d
	movq	%r14, %r9
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	1752(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	1736(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj
	jmp	.LBB168_64
.LBB168_55:                             #   in Loop: Header=BB168_12 Depth=1
	.cfi_def_cfa_offset 1680
	cmpb	$0, 1712(%rsp)
	movq	40(%rsp), %r14                  # 8-byte Reload
	je	.LBB168_58
# %bb.56:                               #   in Loop: Header=BB168_12 Depth=1
	testl	%eax, %eax
	jne	.LBB168_65
# %bb.57:                               #   in Loop: Header=BB168_12 Depth=1
	movl	%r15d, %eax
	movq	88(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdi
	movq	80(%rsp), %rcx                  # 8-byte Reload
	jmp	.LBB168_63
.LBB168_58:                             #   in Loop: Header=BB168_12 Depth=1
	cmpb	$0, 1720(%rsp)
	je	.LBB168_61
# %bb.59:                               #   in Loop: Header=BB168_12 Depth=1
	testl	%eax, %eax
	jne	.LBB168_65
# %bb.60:                               #   in Loop: Header=BB168_12 Depth=1
	movl	%r15d, %eax
	movq	24(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdi
	movq	48(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	72(%rsp), %rcx                  # 8-byte Reload
	movl	%r12d, %r8d
	movq	%r14, %r9
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	1752(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	1736(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	jmp	.LBB168_64
.LBB168_61:                             #   in Loop: Header=BB168_12 Depth=1
	.cfi_def_cfa_offset 1680
	testl	%eax, %eax
	jne	.LBB168_65
# %bb.62:                               #   in Loop: Header=BB168_12 Depth=1
	movl	%r15d, %eax
	movq	56(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdi
	movq	64(%rsp), %rcx                  # 8-byte Reload
.LBB168_63:                             #   in Loop: Header=BB168_12 Depth=1
	leaq	(%rcx,%rax,4), %rdx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	56(%rsp), %rcx                  # 8-byte Reload
	movl	%r12d, %r8d
	movq	%r14, %r9
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	1752(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	1736(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
.LBB168_64:                             #   in Loop: Header=BB168_12 Depth=1
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB168_65:                             #   in Loop: Header=BB168_12 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB168_70
# %bb.66:                               #   in Loop: Header=BB168_12 Depth=1
	cmpb	$0, 1752(%rsp)
	je	.LBB168_70
# %bb.67:                               #   in Loop: Header=BB168_12 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.60, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	128(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	1744(%rsp), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB168_74
# %bb.68:                               #   in Loop: Header=BB168_12 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%rbx, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI168_0(%rip), %xmm0
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI168_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 8(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB168_71
# %bb.69:                               #   in Loop: Header=BB168_12 Depth=1
	movl	$1, %edx
	movq	%rbx, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB168_72
.LBB168_70:                             #   in Loop: Header=BB168_12 Depth=1
	testl	%eax, %eax
	je	.LBB168_72
	jmp	.LBB168_74
.LBB168_71:                             #   in Loop: Header=BB168_12 Depth=1
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB168_72:                             #   in Loop: Header=BB168_12 Depth=1
	incq	%rbp
	movq	16(%rsp), %rcx                  # 8-byte Reload
	cmpq	96(%rsp), %rbp                  # 8-byte Folded Reload
	movl	72(%rsp), %r9d                  # 4-byte Reload
	jb	.LBB168_12
# %bb.73:
	xorl	%eax, %eax
	jmp	.LBB168_74
.LBB168_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB168_74
.LBB168_8:
	leaq	152(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	je	.LBB168_9
.LBB168_74:
	addq	$1624, %rsp                     # imm = 0x658
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB168_9:                              # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread254
	.cfi_def_cfa_offset 1680
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
	leaq	1312(%rsp), %rbx
	leaq	1568(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%rbx, %rax
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %ecx
	xchgl	%ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4)
	jmp	.LBB168_10
.Lfunc_end168:
	.size	_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS8_E10value_typeET2_T3_PNS9_ISE_E10value_typeET4_T5_PSJ_SK_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb, .Lfunc_end168-_ZN7rocprim6detail29radix_sort_onesweep_iterationINS_14default_configELb0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEE10hipError_tT1_PNSt15iterator_traitsIS8_E10value_typeET2_T3_PNS9_ISE_E10value_typeET4_T5_PSJ_SK_PNS0_23onesweep_lookback_stateEbbT6_jjP12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S5_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE,"axG",@progbits,_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S5_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE,comdat
	.weak	_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S5_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE # -- Begin function _ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S5_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE
	.type	_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S5_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE,@function
_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S5_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE: # @_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S5_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE
	.cfi_startproc
# %bb.0:
	movq	16(%rdi), %r8
	movq	(%rsi), %rcx
	movq	(%rcx), %rax
	cmpq	%r8, %rax
	cmovbeq	%r8, %rax
	movq	8(%rdi), %r9
	movq	%rax, (%rcx)
	testq	%r9, %r9
	je	.LBB169_2
# %bb.1:
	movq	8(%rsi), %r10
	movq	(%r10), %rax
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	addq	%r9, %rax
	movq	%rax, (%r10)
	movq	(%rcx), %rax
.LBB169_2:                              # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_S4_EE10get_layoutEvENKUlRKT_E_clIS4_EEDaSA_.exit
	movq	40(%rdi), %r8
	cmpq	%r8, %rax
	cmovbeq	%r8, %rax
	movq	32(%rdi), %r9
	movq	%rax, (%rcx)
	testq	%r9, %r9
	je	.LBB169_4
# %bb.3:
	movq	8(%rsi), %r10
	movq	(%r10), %rax
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	addq	%r9, %rax
	movq	%rax, (%r10)
	movq	(%rcx), %rax
.LBB169_4:                              # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_S4_EE10get_layoutEvENKUlRKT_E_clIS4_EEDaSA_.exit16
	movq	64(%rdi), %r8
	cmpq	%r8, %rax
	cmovbeq	%r8, %rax
	movq	56(%rdi), %r9
	movq	%rax, (%rcx)
	testq	%r9, %r9
	je	.LBB169_6
# %bb.5:
	movq	8(%rsi), %r10
	movq	(%r10), %rax
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	addq	%r9, %rax
	movq	%rax, (%r10)
	movq	(%rcx), %rax
.LBB169_6:                              # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_S4_EE10get_layoutEvENKUlRKT_E_clIS6_EEDaSA_.exit
	movq	88(%rdi), %r8
	cmpq	%r8, %rax
	cmovbeq	%r8, %rax
	movq	80(%rdi), %r9
	movq	%rax, (%rcx)
	testq	%r9, %r9
	je	.LBB169_8
# %bb.7:
	movq	8(%rsi), %r10
	movq	(%r10), %rax
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	addq	%r9, %rax
	movq	%rax, (%r10)
	movq	(%rcx), %rax
.LBB169_8:                              # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_S4_EE10get_layoutEvENKUlRKT_E_clIS4_EEDaSA_.exit29
	movq	112(%rdi), %r8
	cmpq	%r8, %rax
	cmovbeq	%r8, %rax
	movq	104(%rdi), %rdi
	movq	%rax, (%rcx)
	testq	%rdi, %rdi
	je	.LBB169_10
# %bb.9:
	movq	8(%rsi), %rcx
	movq	(%rcx), %rax
	xorl	%edx, %edx
	divq	%r8
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r8, %rax
	addq	%rdi, %rax
	movq	%rax, (%rcx)
.LBB169_10:                             # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_S4_EE10get_layoutEvENKUlRKT_E_clIS4_EEDaSA_.exit36
	retq
.Lfunc_end169:
	.size	_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S5_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE, .Lfunc_end169-_ZN7rocprim6detail22for_each_in_tuple_implIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNKS3_16linear_partitionIJS5_S5_S7_S5_S5_EE10get_layoutEvEUlRKT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNS3_16linear_partitionIJS5_S5_S7_S5_S5_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE,"axG",@progbits,_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNS3_16linear_partitionIJS5_S5_S7_S5_S5_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE,comdat
	.weak	_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNS3_16linear_partitionIJS5_S5_S7_S5_S5_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE # -- Begin function _ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNS3_16linear_partitionIJS5_S5_S7_S5_S5_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE
	.type	_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNS3_16linear_partitionIJS5_S5_S7_S5_S5_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE,@function
_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNS3_16linear_partitionIJS5_S5_S7_S5_S5_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE: # @_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNS3_16linear_partitionIJS5_S5_S7_S5_S5_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE
	.cfi_startproc
# %bb.0:
	movq	8(%rdi), %rcx
	testq	%rcx, %rcx
	je	.LBB170_3
# %bb.1:
	movq	(%rsi), %r8
	movq	(%r8), %rax
	movq	16(%rdi), %r9
	xorl	%edx, %edx
	divq	%r9
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r9, %rax
	movq	%rax, (%r8)
	cmpq	$0, 8(%rdi)
	je	.LBB170_3
# %bb.2:
	movq	8(%rsi), %rdx
	addq	(%rdx), %rax
	jmp	.LBB170_4
.LBB170_3:                              # %.thread.i
	xorl	%eax, %eax
.LBB170_4:                              # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_S4_EE11set_storageEPvENKUlRT_E_clIS4_EEDaSA_.exit
	movq	(%rdi), %rdx
	movq	%rax, (%rdx)
	movq	(%rsi), %r9
	addq	(%r9), %rcx
	movq	%rcx, (%r9)
	movq	32(%rdi), %r8
	testq	%r8, %r8
	je	.LBB170_7
# %bb.5:
	movq	40(%rdi), %r10
	movq	%rcx, %rax
	xorl	%edx, %edx
	divq	%r10
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r10, %rax
	movq	%rax, (%r9)
	cmpq	$0, 32(%rdi)
	je	.LBB170_7
# %bb.6:
	movq	8(%rsi), %rcx
	addq	(%rcx), %rax
	jmp	.LBB170_8
.LBB170_7:                              # %.thread.i19
	xorl	%eax, %eax
.LBB170_8:                              # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_S4_EE11set_storageEPvENKUlRT_E_clIS4_EEDaSA_.exit20
	movq	24(%rdi), %rcx
	movq	%rax, (%rcx)
	movq	(%rsi), %r9
	addq	(%r9), %r8
	movq	%r8, (%r9)
	movq	56(%rdi), %rcx
	testq	%rcx, %rcx
	je	.LBB170_11
# %bb.9:
	movq	64(%rdi), %r10
	movq	%r8, %rax
	xorl	%edx, %edx
	divq	%r10
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r10, %rax
	movq	%rax, (%r9)
	cmpq	$0, 56(%rdi)
	je	.LBB170_11
# %bb.10:
	movq	8(%rsi), %rdx
	addq	(%rdx), %rax
	jmp	.LBB170_12
.LBB170_11:                             # %.thread.i30
	xorl	%eax, %eax
.LBB170_12:                             # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_S4_EE11set_storageEPvENKUlRT_E_clIS6_EEDaSA_.exit
	movq	48(%rdi), %rdx
	movq	%rax, (%rdx)
	movq	(%rsi), %r9
	addq	(%r9), %rcx
	movq	%rcx, (%r9)
	movq	80(%rdi), %r8
	testq	%r8, %r8
	je	.LBB170_15
# %bb.13:
	movq	88(%rdi), %r10
	movq	%rcx, %rax
	xorl	%edx, %edx
	divq	%r10
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r10, %rax
	movq	%rax, (%r9)
	cmpq	$0, 80(%rdi)
	je	.LBB170_15
# %bb.14:
	movq	8(%rsi), %rcx
	addq	(%rcx), %rax
	jmp	.LBB170_16
.LBB170_15:                             # %.thread.i40
	xorl	%eax, %eax
.LBB170_16:                             # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_S4_EE11set_storageEPvENKUlRT_E_clIS4_EEDaSA_.exit41
	movq	72(%rdi), %rcx
	movq	%rax, (%rcx)
	movq	(%rsi), %r9
	addq	(%r9), %r8
	movq	%r8, (%r9)
	movq	104(%rdi), %rcx
	testq	%rcx, %rcx
	je	.LBB170_19
# %bb.17:
	movq	112(%rdi), %r10
	movq	%r8, %rax
	xorl	%edx, %edx
	divq	%r10
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%r10, %rax
	movq	%rax, (%r9)
	cmpq	$0, 104(%rdi)
	je	.LBB170_19
# %bb.18:
	movq	8(%rsi), %rdx
	addq	(%rdx), %rax
	jmp	.LBB170_20
.LBB170_19:                             # %.thread.i51
	xorl	%eax, %eax
.LBB170_20:                             # %_ZZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIjEES4_NS3_INS0_23onesweep_lookback_stateEEES4_S4_EE11set_storageEPvENKUlRT_E_clIS4_EEDaSA_.exit52
	movq	96(%rdi), %rdx
	movq	%rax, (%rdx)
	movq	(%rsi), %rax
	addq	%rcx, (%rax)
	retq
.Lfunc_end170:
	.size	_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNS3_16linear_partitionIJS5_S5_S7_S5_S5_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE, .Lfunc_end170-_ZN7rocprim6detail22for_each_in_tuple_implIRNS_5tupleIJNS0_12temp_storage16simple_partitionIjEES5_NS4_INS0_23onesweep_lookback_stateEEES5_S5_EEEZNS3_16linear_partitionIJS5_S5_S7_S5_S5_EE11set_storageEPvEUlRT_E_JLm0ELm1ELm2ELm3ELm4EEEEvOSD_OT0_St16integer_sequenceImJXspT1_EEE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,"axG",@progbits,_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,comdat
	.weak	_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj # -- Begin function _ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.type	_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,@function
_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj: # @_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	28(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	24(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	20(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	16(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	15(%rsp), %rax
	movq	%rax, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	40(%rsp), %r12
	leaq	32(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end171:
	.size	_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj, .Lfunc_end171-_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_,"axG",@progbits,_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_,comdat
	.weak	_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_ # -- Begin function _ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_
	.type	_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_,@function
_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_: # @_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end172:
	.size	_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_, .Lfunc_end172-_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj # -- Begin function _ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj
	.type	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj: # @_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	3(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end173:
	.size	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end173-_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj # -- Begin function _ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.type	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj: # @_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	40(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	32(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	3(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end174:
	.size	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end174-_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj # -- Begin function _ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.type	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj: # @_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	48(%rsp), %rsi
	movq	%rcx, (%rsi)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdi
	movq	%rdx, (%rdi)
	leaq	4(%rsp), %rdx
	movl	%r8d, (%rdx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	3(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end175:
	.size	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end175-_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB176_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB176_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %esi
	movl	$.L__unnamed_13, %edx
	movl	$.L__unnamed_13, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, %esi
	movl	$.L__unnamed_14, %edx
	movl	$.L__unnamed_14, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %esi
	movl	$.L__unnamed_15, %edx
	movl	$.L__unnamed_15, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %esi
	movl	$.L__unnamed_16, %edx
	movl	$.L__unnamed_16, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj, %esi
	movl	$.L__unnamed_17, %edx
	movl	$.L__unnamed_17, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_, %esi
	movl	$.L__unnamed_18, %edx
	movl	$.L__unnamed_18, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_, %esi
	movl	$.L__unnamed_19, %edx
	movl	$.L__unnamed_19, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_, %esi
	movl	$.L__unnamed_20, %edx
	movl	$.L__unnamed_20, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, %esi
	movl	$.L__unnamed_21, %edx
	movl	$.L__unnamed_21, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, %esi
	movl	$.L__unnamed_22, %edx
	movl	$.L__unnamed_22, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, %esi
	movl	$.L__unnamed_23, %edx
	movl	$.L__unnamed_23, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj, %esi
	movl	$.L__unnamed_24, %edx
	movl	$.L__unnamed_24, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv, %esi
	movl	$.L__unnamed_25, %edx
	movl	$.L__unnamed_25, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, %esi
	movl	$.L__unnamed_26, %edx
	movl	$.L__unnamed_26, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %esi
	movl	$.L__unnamed_27, %edx
	movl	$.L__unnamed_27, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %esi
	movl	$.L__unnamed_28, %edx
	movl	$.L__unnamed_28, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, %esi
	movl	$.L__unnamed_29, %edx
	movl	$.L__unnamed_29, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %esi
	movl	$.L__unnamed_30, %edx
	movl	$.L__unnamed_30, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %esi
	movl	$.L__unnamed_31, %edx
	movl	$.L__unnamed_31, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_, %esi
	movl	$.L__unnamed_32, %edx
	movl	$.L__unnamed_32, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, %esi
	movl	$.L__unnamed_33, %edx
	movl	$.L__unnamed_33, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %esi
	movl	$.L__unnamed_34, %edx
	movl	$.L__unnamed_34, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %esi
	movl	$.L__unnamed_35, %edx
	movl	$.L__unnamed_35, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, %esi
	movl	$.L__unnamed_36, %edx
	movl	$.L__unnamed_36, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, %esi
	movl	$.L__unnamed_37, %edx
	movl	$.L__unnamed_37, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, %esi
	movl	$.L__unnamed_38, %edx
	movl	$.L__unnamed_38, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj, %esi
	movl	$.L__unnamed_39, %edx
	movl	$.L__unnamed_39, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_, %esi
	movl	$.L__unnamed_40, %edx
	movl	$.L__unnamed_40, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_, %esi
	movl	$.L__unnamed_41, %edx
	movl	$.L__unnamed_41, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, %esi
	movl	$.L__unnamed_42, %edx
	movl	$.L__unnamed_42, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, %esi
	movl	$.L__unnamed_43, %edx
	movl	$.L__unnamed_43, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, %esi
	movl	$.L__unnamed_44, %edx
	movl	$.L__unnamed_44, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj, %esi
	movl	$.L__unnamed_45, %edx
	movl	$.L__unnamed_45, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv, %esi
	movl	$.L__unnamed_46, %edx
	movl	$.L__unnamed_46, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, %esi
	movl	$.L__unnamed_47, %edx
	movl	$.L__unnamed_47, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, %esi
	movl	$.L__unnamed_48, %edx
	movl	$.L__unnamed_48, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, %esi
	movl	$.L__unnamed_49, %edx
	movl	$.L__unnamed_49, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, %esi
	movl	$.L__unnamed_50, %edx
	movl	$.L__unnamed_50, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, %esi
	movl	$.L__unnamed_51, %edx
	movl	$.L__unnamed_51, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, %esi
	movl	$.L__unnamed_52, %edx
	movl	$.L__unnamed_52, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movq	$0, 24(%rsp)
	movq	$0, 16(%rsp)
	movq	$0, 8(%rsp)
	movq	$0, (%rsp)
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, %esi
	movl	$.L__unnamed_53, %edx
	movl	$.L__unnamed_53, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movq	$0, 24(%rsp)
	movq	$0, 16(%rsp)
	movq	$0, 8(%rsp)
	movq	$0, (%rsp)
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, %esi
	movl	$.L__unnamed_54, %edx
	movl	$.L__unnamed_54, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movq	$0, 24(%rsp)
	movq	$0, 16(%rsp)
	movq	$0, 8(%rsp)
	movq	$0, (%rsp)
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, %esi
	movl	$.L__unnamed_55, %edx
	movl	$.L__unnamed_55, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movq	$0, 24(%rsp)
	movq	$0, 16(%rsp)
	movq	$0, 8(%rsp)
	movq	$0, (%rsp)
	movl	$_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, %esi
	movl	$.L__unnamed_56, %edx
	movl	$.L__unnamed_56, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movq	$0, 24(%rsp)
	movq	$0, 16(%rsp)
	movq	$0, 8(%rsp)
	movq	$0, (%rsp)
	movl	$_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, %esi
	movl	$.L__unnamed_57, %edx
	movl	$.L__unnamed_57, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movq	$0, 24(%rsp)
	movq	$0, 16(%rsp)
	movq	$0, 8(%rsp)
	movq	$0, (%rsp)
	movl	$_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, %esi
	movl	$.L__unnamed_58, %edx
	movl	$.L__unnamed_58, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movq	$0, 24(%rsp)
	movq	$0, 16(%rsp)
	movq	$0, 8(%rsp)
	movq	$0, (%rsp)
	movl	$_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj, %esi
	movl	$.L__unnamed_59, %edx
	movl	$.L__unnamed_59, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movq	$0, 24(%rsp)
	movq	$0, 16(%rsp)
	movq	$0, 8(%rsp)
	movq	$0, (%rsp)
	movl	$_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_, %esi
	movl	$.L__unnamed_60, %edx
	movl	$.L__unnamed_60, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movq	$0, 24(%rsp)
	movq	$0, 16(%rsp)
	movq	$0, 8(%rsp)
	movq	$0, (%rsp)
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj, %esi
	movl	$.L__unnamed_61, %edx
	movl	$.L__unnamed_61, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movq	$0, 24(%rsp)
	movq	$0, 16(%rsp)
	movq	$0, 8(%rsp)
	movq	$0, (%rsp)
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, %esi
	movl	$.L__unnamed_62, %edx
	movl	$.L__unnamed_62, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movq	$0, 24(%rsp)
	movq	$0, 16(%rsp)
	movq	$0, 8(%rsp)
	movq	$0, (%rsp)
	movl	$_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, %esi
	movl	$.L__unnamed_63, %edx
	movl	$.L__unnamed_63, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end176:
	.size	__hip_module_ctor, .Lfunc_end176-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB177_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB177_2:
	retq
.Lfunc_end177:
	.size	__hip_module_dtor, .Lfunc_end177-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"radix_sort: failed on 1st step"
	.size	.L.str, 31

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"radix_sort: failed on 2nd step"
	.size	.L.str.1, 31

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"radix sort: failed to synchronize"
	.size	.L.str.2, 34

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"-----"
	.size	.L.str.3, 6

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"size: "
	.size	.L.str.4, 7

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"sort_block_size: "
	.size	.L.str.5, 18

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"sort_items_per_thread: "
	.size	.L.str.6, 24

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"sort_items_per_block: "
	.size	.L.str.7, 23

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"sort_number_of_blocks: "
	.size	.L.str.8, 24

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"current_radix_bit: "
	.size	.L.str.9, 20

	.type	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,@object # @_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.section	.rodata._ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,"aG",@progbits,_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,comdat
	.weak	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.p2align	3, 0x0
_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj:
	.quad	_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.size	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj, 8

	.type	.L.str.10,@object               # @.str.10
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.10:
	.asciz	"radix_sort_block_sort_kernel"
	.size	.L.str.10, 29

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"("
	.size	.L.str.11, 2

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	")"
	.size	.L.str.12, 2

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	" "
	.size	.L.str.13, 2

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	" ms"
	.size	.L.str.14, 4

	.type	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache,@object # @_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache
	.section	.bss._ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache,"awG",@nobits,_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache,comdat
	.weak	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache
	.p2align	4, 0x0
_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache:
	.zero	2048
	.size	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache, 2048

	.type	.L.str.15,@object               # @.str.15
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.15:
	.asciz	"gfx803"
	.size	.L.str.15, 7

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"gfx900"
	.size	.L.str.16, 7

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"gfx906"
	.size	.L.str.17, 7

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"gfx908"
	.size	.L.str.18, 7

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"gfx90a"
	.size	.L.str.19, 7

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"gfx1030"
	.size	.L.str.20, 8

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"gfx1100"
	.size	.L.str.21, 8

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"gfx1102"
	.size	.L.str.22, 8

	.type	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv,@object # @_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv
	.section	.rodata._ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv,"aG",@progbits,_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv,comdat
	.weak	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv
	.p2align	3, 0x0
_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv:
	.quad	_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv
	.size	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv, 8

	.type	.L.str.23,@object               # @.str.23
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.23:
	.asciz	"sorted_block_size: "
	.size	.L.str.23, 20

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"merge_oddeven_block_size: "
	.size	.L.str.24, 27

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"merge_oddeven_number_of_blocks: "
	.size	.L.str.25, 33

	.type	.L.str.26,@object               # @.str.26
.L.str.26:
	.asciz	"merge_oddeven_items_per_thread: "
	.size	.L.str.26, 33

	.type	.L.str.27,@object               # @.str.27
.L.str.27:
	.asciz	"merge_oddeven_items_per_block: "
	.size	.L.str.27, 32

	.type	.L.str.28,@object               # @.str.28
.L.str.28:
	.asciz	"merge_mergepath_block_size: "
	.size	.L.str.28, 29

	.type	.L.str.29,@object               # @.str.29
.L.str.29:
	.asciz	"merge_mergepath_number_of_blocks: "
	.size	.L.str.29, 35

	.type	.L.str.30,@object               # @.str.30
.L.str.30:
	.asciz	"merge_mergepath_items_per_thread: "
	.size	.L.str.30, 35

	.type	.L.str.31,@object               # @.str.31
.L.str.31:
	.asciz	"merge_mergepath_items_per_block: "
	.size	.L.str.31, 34

	.type	.L.str.32,@object               # @.str.32
.L.str.32:
	.asciz	"num_partitions: "
	.size	.L.str.32, 17

	.type	.L.str.33,@object               # @.str.33
.L.str.33:
	.asciz	"merge_mergepath_partition_block_size: "
	.size	.L.str.33, 39

	.type	.L.str.34,@object               # @.str.34
.L.str.34:
	.asciz	"merge_mergepath_partition_number_of_blocks: "
	.size	.L.str.34, 45

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE:
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE:
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE:
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE:
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE:
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE:
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE:
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE:
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE:
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE, 36

	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@object # @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.section	.rodata._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"aG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.weak	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.p2align	3, 0x0
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_:
	.quad	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, 8

	.type	.L.str.35,@object               # @.str.35
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.35:
	.asciz	"device_block_merge_mergepath_partition_kernel"
	.size	.L.str.35, 46

	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@object # @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.section	.rodata._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"aG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	3, 0x0
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_:
	.quad	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, 8

	.type	.L.str.36,@object               # @.str.36
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.36:
	.asciz	"device_block_merge_mergepath_kernel"
	.size	.L.str.36, 36

	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@object # @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.section	.rodata._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"aG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_:
	.quad	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, 8

	.type	.L.str.37,@object               # @.str.37
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.37:
	.asciz	"device_block_merge_oddeven_kernel"
	.size	.L.str.37, 34

	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@object # @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.section	.rodata._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"aG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.weak	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.p2align	3, 0x0
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_:
	.quad	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, 8

	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@object # @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.section	.rodata._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"aG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	3, 0x0
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_:
	.quad	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, 8

	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@object # @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.section	.rodata._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"aG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_:
	.quad	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, 8

	.type	.L.str.38,@object               # @.str.38
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.38:
	.asciz	"block_size "
	.size	.L.str.38, 12

	.type	.L.str.39,@object               # @.str.39
.L.str.39:
	.asciz	"number of blocks "
	.size	.L.str.39, 18

	.type	.L.str.40,@object               # @.str.40
.L.str.40:
	.asciz	"number of blocks limit "
	.size	.L.str.40, 24

	.type	.L.str.41,@object               # @.str.41
.L.str.41:
	.asciz	"items_per_block "
	.size	.L.str.41, 17

	.type	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_,@object # @_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_
	.section	.rodata._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_,"aG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_,comdat
	.weak	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_
	.p2align	3, 0x0
_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_:
	.quad	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_
	.size	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_, 8

	.type	.L.str.42,@object               # @.str.42
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.42:
	.asciz	"transform_kernel"
	.size	.L.str.42, 17

	.type	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_,@object # @_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_
	.section	.rodata._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_,"aG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_,comdat
	.weak	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_
	.p2align	3, 0x0
_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_:
	.quad	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_
	.size	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_, 8

	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@object # @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.section	.rodata._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"aG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.weak	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.p2align	3, 0x0
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_:
	.quad	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, 8

	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@object # @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.section	.rodata._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"aG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	3, 0x0
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_:
	.quad	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, 8

	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@object # @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.section	.rodata._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"aG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_:
	.quad	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, 8

	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@object # @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.section	.rodata._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"aG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.weak	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.p2align	3, 0x0
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_:
	.quad	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, 8

	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@object # @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.section	.rodata._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"aG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	3, 0x0
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_:
	.quad	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, 8

	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@object # @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.section	.rodata._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"aG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_:
	.quad	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, 8

	.type	.L.str.43,@object               # @.str.43
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.43:
	.asciz	"radix_size "
	.size	.L.str.43, 12

	.type	.L.str.44,@object               # @.str.44
.L.str.44:
	.asciz	"digit_places "
	.size	.L.str.44, 14

	.type	.L.str.45,@object               # @.str.45
.L.str.45:
	.asciz	"histograms_size "
	.size	.L.str.45, 17

	.type	.L.str.46,@object               # @.str.46
.L.str.46:
	.asciz	"num_lookback_states "
	.size	.L.str.46, 21

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE:
	.long	256                             # 0x100
	.long	22                              # 0x16
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	22                              # 0x16
	.long	4294967295                      # 0xffffffff
	.long	8                               # 0x8
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE4294967295EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE:
	.long	256                             # 0x100
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	31                              # 0x1f
	.long	4294967295                      # 0xffffffff
	.long	4                               # 0x4
	.long	0                               # 0x0
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE803EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE:
	.long	512                             # 0x200
	.long	22                              # 0x16
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	22                              # 0x16
	.long	4294967295                      # 0xffffffff
	.long	8                               # 0x8
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE900EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE:
	.long	256                             # 0x100
	.long	18                              # 0x12
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	18                              # 0x12
	.long	4294967295                      # 0xffffffff
	.long	8                               # 0x8
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE906EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE:
	.long	256                             # 0x100
	.long	22                              # 0x16
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	22                              # 0x16
	.long	4294967295                      # 0xffffffff
	.long	8                               # 0x8
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE908EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE:
	.long	256                             # 0x100
	.long	22                              # 0x16
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	22                              # 0x16
	.long	4294967295                      # 0xffffffff
	.long	8                               # 0x8
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE910EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE:
	.long	1024                            # 0x400
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.long	1024                            # 0x400
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.long	8                               # 0x8
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1030EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE:
	.long	256                             # 0x100
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	31                              # 0x1f
	.long	4294967295                      # 0xffffffff
	.long	4                               # 0x4
	.long	0                               # 0x0
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1100EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE:
	.long	256                             # 0x100
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	31                              # 0x1f
	.long	4294967295                      # 0xffffffff
	.long	4                               # 0x4
	.long	0                               # 0x0
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjhE19architecture_configILNS0_11target_archE1102EE6paramsE, 32

	.type	.L.str.47,@object               # @.str.47
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.47:
	.asciz	"blocks "
	.size	.L.str.47, 8

	.type	.L.str.48,@object               # @.str.48
.L.str.48:
	.asciz	"full_blocks "
	.size	.L.str.48, 13

	.type	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,@object # @_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.section	.rodata._ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,"aG",@progbits,_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,comdat
	.weak	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.p2align	3, 0x0
_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj:
	.quad	_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.size	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj, 8

	.type	.L.str.49,@object               # @.str.49
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.49:
	.asciz	"compute_global_digit_histograms"
	.size	.L.str.49, 32

	.type	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_,@object # @_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_
	.section	.rodata._ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_,"aG",@progbits,_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_,comdat
	.weak	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_
	.p2align	3, 0x0
_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_:
	.quad	_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_
	.size	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_, 8

	.type	.L.str.50,@object               # @.str.50
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.50:
	.asciz	"scan_global_digit_histograms"
	.size	.L.str.50, 29

	.type	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_,@object # @_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_
	.section	.rodata._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_,"aG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_,comdat
	.weak	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_
	.p2align	3, 0x0
_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_:
	.quad	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_
	.size	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_, 8

	.type	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_,@object # @_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_
	.section	.rodata._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_,"aG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_,comdat
	.weak	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_
	.p2align	3, 0x0
_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_:
	.quad	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_
	.size	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_, 8

	.type	.L.str.51,@object               # @.str.51
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.51:
	.asciz	"radix_bits "
	.size	.L.str.51, 12

	.type	.L.str.52,@object               # @.str.52
.L.str.52:
	.asciz	"items_per_full_batch "
	.size	.L.str.52, 22

	.type	.L.str.53,@object               # @.str.53
.L.str.53:
	.asciz	"bit "
	.size	.L.str.53, 5

	.type	.L.str.54,@object               # @.str.54
.L.str.54:
	.asciz	"current_radix_bits "
	.size	.L.str.54, 20

	.type	.L.str.55,@object               # @.str.55
.L.str.55:
	.asciz	"batches "
	.size	.L.str.55, 9

	.type	.L.str.56,@object               # @.str.56
.L.str.56:
	.asciz	"batch "
	.size	.L.str.56, 7

	.type	.L.str.57,@object               # @.str.57
.L.str.57:
	.asciz	"items_left "
	.size	.L.str.57, 12

	.type	.L.str.58,@object               # @.str.58
.L.str.58:
	.asciz	"current_batch_size "
	.size	.L.str.58, 20

	.type	.L.str.59,@object               # @.str.59
.L.str.59:
	.asciz	"offset "
	.size	.L.str.59, 8

	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,@object # @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.section	.rodata._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"aG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	3, 0x0
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj:
	.quad	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, 8

	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,@object # @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.section	.rodata._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"aG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	3, 0x0
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj:
	.quad	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, 8

	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,@object # @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.section	.rodata._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"aG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	3, 0x0
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj:
	.quad	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, 8

	.type	.L.str.60,@object               # @.str.60
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.60:
	.asciz	"onesweep_iteration"
	.size	.L.str.60, 19

	.type	_ZTSN6thrust6system12system_errorE,@object # @_ZTSN6thrust6system12system_errorE
	.section	.rodata._ZTSN6thrust6system12system_errorE,"aG",@progbits,_ZTSN6thrust6system12system_errorE,comdat
	.weak	_ZTSN6thrust6system12system_errorE
_ZTSN6thrust6system12system_errorE:
	.asciz	"N6thrust6system12system_errorE"
	.size	_ZTSN6thrust6system12system_errorE, 31

	.type	_ZTIN6thrust6system12system_errorE,@object # @_ZTIN6thrust6system12system_errorE
	.section	.rodata._ZTIN6thrust6system12system_errorE,"aG",@progbits,_ZTIN6thrust6system12system_errorE,comdat
	.weak	_ZTIN6thrust6system12system_errorE
	.p2align	3, 0x0
_ZTIN6thrust6system12system_errorE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system12system_errorE
	.quad	_ZTISt13runtime_error
	.size	_ZTIN6thrust6system12system_errorE, 24

	.type	_ZZN6thrust6system12hip_categoryEvE6result,@object # @_ZZN6thrust6system12hip_categoryEvE6result
	.section	.bss._ZZN6thrust6system12hip_categoryEvE6result,"awG",@nobits,_ZZN6thrust6system12hip_categoryEvE6result,comdat
	.weak	_ZZN6thrust6system12hip_categoryEvE6result
	.p2align	3, 0x0
_ZZN6thrust6system12hip_categoryEvE6result:
	.zero	8
	.size	_ZZN6thrust6system12hip_categoryEvE6result, 8

	.type	_ZGVZN6thrust6system12hip_categoryEvE6result,@object # @_ZGVZN6thrust6system12hip_categoryEvE6result
	.section	.bss._ZGVZN6thrust6system12hip_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust6system12hip_categoryEvE6result,comdat
	.weak	_ZGVZN6thrust6system12hip_categoryEvE6result
	.p2align	3, 0x0
_ZGVZN6thrust6system12hip_categoryEvE6result:
	.quad	0                               # 0x0
	.size	_ZGVZN6thrust6system12hip_categoryEvE6result, 8

	.hidden	__dso_handle
	.type	_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE,@object # @_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.section	.rodata._ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE,"aG",@progbits,_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE,comdat
	.weak	_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.p2align	3, 0x0
_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.quad	_ZN6thrust6system14error_categoryD2Ev
	.quad	_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev
	.quad	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv
	.quad	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi
	.quad	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.quad	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.quad	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei
	.size	_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE, 72

	.type	_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE,@object # @_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.section	.rodata._ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE,"aG",@progbits,_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE,comdat
	.weak	_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE
_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE:
	.asciz	"N6thrust6system11hip_rocprim6detail18hip_error_categoryE"
	.size	_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE, 57

	.type	_ZTSN6thrust6system14error_categoryE,@object # @_ZTSN6thrust6system14error_categoryE
	.section	.rodata._ZTSN6thrust6system14error_categoryE,"aG",@progbits,_ZTSN6thrust6system14error_categoryE,comdat
	.weak	_ZTSN6thrust6system14error_categoryE
_ZTSN6thrust6system14error_categoryE:
	.asciz	"N6thrust6system14error_categoryE"
	.size	_ZTSN6thrust6system14error_categoryE, 33

	.type	_ZTIN6thrust6system14error_categoryE,@object # @_ZTIN6thrust6system14error_categoryE
	.section	.rodata._ZTIN6thrust6system14error_categoryE,"aG",@progbits,_ZTIN6thrust6system14error_categoryE,comdat
	.weak	_ZTIN6thrust6system14error_categoryE
	.p2align	3, 0x0
_ZTIN6thrust6system14error_categoryE:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTSN6thrust6system14error_categoryE
	.size	_ZTIN6thrust6system14error_categoryE, 16

	.type	_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE,@object # @_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.section	.rodata._ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE,"aG",@progbits,_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE,comdat
	.weak	_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.p2align	3, 0x0
_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.quad	_ZTIN6thrust6system14error_categoryE
	.size	_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE, 24

	.type	_ZTVN6thrust6system14error_categoryE,@object # @_ZTVN6thrust6system14error_categoryE
	.section	.rodata._ZTVN6thrust6system14error_categoryE,"aG",@progbits,_ZTVN6thrust6system14error_categoryE,comdat
	.weak	_ZTVN6thrust6system14error_categoryE
	.p2align	3, 0x0
_ZTVN6thrust6system14error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust6system14error_categoryE
	.quad	_ZN6thrust6system14error_categoryD2Ev
	.quad	_ZN6thrust6system14error_categoryD0Ev
	.quad	__cxa_pure_virtual
	.quad	_ZNK6thrust6system14error_category23default_error_conditionEi
	.quad	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.quad	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.quad	__cxa_pure_virtual
	.size	_ZTVN6thrust6system14error_categoryE, 72

	.type	.L.str.61,@object               # @.str.61
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.61:
	.asciz	"hip"
	.size	.L.str.61, 4

	.type	_ZZN6thrust6system15system_categoryEvE6result,@object # @_ZZN6thrust6system15system_categoryEvE6result
	.section	.bss._ZZN6thrust6system15system_categoryEvE6result,"awG",@nobits,_ZZN6thrust6system15system_categoryEvE6result,comdat
	.weak	_ZZN6thrust6system15system_categoryEvE6result
	.p2align	3, 0x0
_ZZN6thrust6system15system_categoryEvE6result:
	.zero	8
	.size	_ZZN6thrust6system15system_categoryEvE6result, 8

	.type	_ZGVZN6thrust6system15system_categoryEvE6result,@object # @_ZGVZN6thrust6system15system_categoryEvE6result
	.section	.bss._ZGVZN6thrust6system15system_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust6system15system_categoryEvE6result,comdat
	.weak	_ZGVZN6thrust6system15system_categoryEvE6result
	.p2align	3, 0x0
_ZGVZN6thrust6system15system_categoryEvE6result:
	.quad	0                               # 0x0
	.size	_ZGVZN6thrust6system15system_categoryEvE6result, 8

	.type	_ZTVN6thrust6system6detail21system_error_categoryE,@object # @_ZTVN6thrust6system6detail21system_error_categoryE
	.section	.rodata._ZTVN6thrust6system6detail21system_error_categoryE,"aG",@progbits,_ZTVN6thrust6system6detail21system_error_categoryE,comdat
	.weak	_ZTVN6thrust6system6detail21system_error_categoryE
	.p2align	3, 0x0
_ZTVN6thrust6system6detail21system_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust6system6detail21system_error_categoryE
	.quad	_ZN6thrust6system14error_categoryD2Ev
	.quad	_ZN6thrust6system6detail21system_error_categoryD0Ev
	.quad	_ZNK6thrust6system6detail21system_error_category4nameEv
	.quad	_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi
	.quad	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.quad	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.quad	_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei
	.size	_ZTVN6thrust6system6detail21system_error_categoryE, 72

	.type	_ZTSN6thrust6system6detail21system_error_categoryE,@object # @_ZTSN6thrust6system6detail21system_error_categoryE
	.section	.rodata._ZTSN6thrust6system6detail21system_error_categoryE,"aG",@progbits,_ZTSN6thrust6system6detail21system_error_categoryE,comdat
	.weak	_ZTSN6thrust6system6detail21system_error_categoryE
_ZTSN6thrust6system6detail21system_error_categoryE:
	.asciz	"N6thrust6system6detail21system_error_categoryE"
	.size	_ZTSN6thrust6system6detail21system_error_categoryE, 47

	.type	_ZTIN6thrust6system6detail21system_error_categoryE,@object # @_ZTIN6thrust6system6detail21system_error_categoryE
	.section	.rodata._ZTIN6thrust6system6detail21system_error_categoryE,"aG",@progbits,_ZTIN6thrust6system6detail21system_error_categoryE,comdat
	.weak	_ZTIN6thrust6system6detail21system_error_categoryE
	.p2align	3, 0x0
_ZTIN6thrust6system6detail21system_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system6detail21system_error_categoryE
	.quad	_ZTIN6thrust6system14error_categoryE
	.size	_ZTIN6thrust6system6detail21system_error_categoryE, 24

	.type	.L.str.62,@object               # @.str.62
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.62:
	.asciz	"system"
	.size	.L.str.62, 7

	.type	_ZZN6thrust6system16generic_categoryEvE6result,@object # @_ZZN6thrust6system16generic_categoryEvE6result
	.section	.bss._ZZN6thrust6system16generic_categoryEvE6result,"awG",@nobits,_ZZN6thrust6system16generic_categoryEvE6result,comdat
	.weak	_ZZN6thrust6system16generic_categoryEvE6result
	.p2align	3, 0x0
_ZZN6thrust6system16generic_categoryEvE6result:
	.zero	8
	.size	_ZZN6thrust6system16generic_categoryEvE6result, 8

	.type	_ZGVZN6thrust6system16generic_categoryEvE6result,@object # @_ZGVZN6thrust6system16generic_categoryEvE6result
	.section	.bss._ZGVZN6thrust6system16generic_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust6system16generic_categoryEvE6result,comdat
	.weak	_ZGVZN6thrust6system16generic_categoryEvE6result
	.p2align	3, 0x0
_ZGVZN6thrust6system16generic_categoryEvE6result:
	.quad	0                               # 0x0
	.size	_ZGVZN6thrust6system16generic_categoryEvE6result, 8

	.type	_ZTVN6thrust6system6detail22generic_error_categoryE,@object # @_ZTVN6thrust6system6detail22generic_error_categoryE
	.section	.rodata._ZTVN6thrust6system6detail22generic_error_categoryE,"aG",@progbits,_ZTVN6thrust6system6detail22generic_error_categoryE,comdat
	.weak	_ZTVN6thrust6system6detail22generic_error_categoryE
	.p2align	3, 0x0
_ZTVN6thrust6system6detail22generic_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust6system6detail22generic_error_categoryE
	.quad	_ZN6thrust6system14error_categoryD2Ev
	.quad	_ZN6thrust6system6detail22generic_error_categoryD0Ev
	.quad	_ZNK6thrust6system6detail22generic_error_category4nameEv
	.quad	_ZNK6thrust6system14error_category23default_error_conditionEi
	.quad	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.quad	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.quad	_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei
	.size	_ZTVN6thrust6system6detail22generic_error_categoryE, 72

	.type	_ZTSN6thrust6system6detail22generic_error_categoryE,@object # @_ZTSN6thrust6system6detail22generic_error_categoryE
	.section	.rodata._ZTSN6thrust6system6detail22generic_error_categoryE,"aG",@progbits,_ZTSN6thrust6system6detail22generic_error_categoryE,comdat
	.weak	_ZTSN6thrust6system6detail22generic_error_categoryE
_ZTSN6thrust6system6detail22generic_error_categoryE:
	.asciz	"N6thrust6system6detail22generic_error_categoryE"
	.size	_ZTSN6thrust6system6detail22generic_error_categoryE, 48

	.type	_ZTIN6thrust6system6detail22generic_error_categoryE,@object # @_ZTIN6thrust6system6detail22generic_error_categoryE
	.section	.rodata._ZTIN6thrust6system6detail22generic_error_categoryE,"aG",@progbits,_ZTIN6thrust6system6detail22generic_error_categoryE,comdat
	.weak	_ZTIN6thrust6system6detail22generic_error_categoryE
	.p2align	3, 0x0
_ZTIN6thrust6system6detail22generic_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system6detail22generic_error_categoryE
	.quad	_ZTIN6thrust6system14error_categoryE
	.size	_ZTIN6thrust6system6detail22generic_error_categoryE, 24

	.type	.L.str.63,@object               # @.str.63
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.63:
	.asciz	"generic"
	.size	.L.str.63, 8

	.type	_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,@object # @_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.section	.bss._ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,"awG",@nobits,_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,comdat
	.weak	_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.p2align	3, 0x0
_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11:
	.zero	32
	.size	_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, 32

	.type	_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,@object # @_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.section	.bss._ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,"awG",@nobits,_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,comdat
	.weak	_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.p2align	3, 0x0
_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11:
	.quad	0                               # 0x0
	.size	_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, 8

	.type	.L.str.64,@object               # @.str.64
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.64:
	.asciz	"Unknown error"
	.size	.L.str.64, 14

	.type	.L.str.65,@object               # @.str.65
.L.str.65:
	.asciz	"basic_string: construction from null is not valid"
	.size	.L.str.65, 50

	.type	.L.str.66,@object               # @.str.66
.L.str.66:
	.asciz	"unknown error"
	.size	.L.str.66, 14

	.type	.L.str.67,@object               # @.str.67
.L.str.67:
	.asciz	"hipErrorUnknown"
	.size	.L.str.67, 16

	.type	.L.str.68,@object               # @.str.68
.L.str.68:
	.asciz	": "
	.size	.L.str.68, 3

	.type	_ZTVN6thrust6system12system_errorE,@object # @_ZTVN6thrust6system12system_errorE
	.section	.rodata._ZTVN6thrust6system12system_errorE,"aG",@progbits,_ZTVN6thrust6system12system_errorE,comdat
	.weak	_ZTVN6thrust6system12system_errorE
	.p2align	3, 0x0
_ZTVN6thrust6system12system_errorE:
	.quad	0
	.quad	_ZTIN6thrust6system12system_errorE
	.quad	_ZN6thrust6system12system_errorD2Ev
	.quad	_ZN6thrust6system12system_errorD0Ev
	.quad	_ZNK6thrust6system12system_error4whatEv
	.size	_ZTVN6thrust6system12system_errorE, 40

	.type	.L.str.70,@object               # @.str.70
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.70:
	.asciz	"temporary_buffer::allocate: get_temporary_buffer failed"
	.size	.L.str.70, 56

	.type	_ZTSN6thrust6system6detail9bad_allocE,@object # @_ZTSN6thrust6system6detail9bad_allocE
	.section	.rodata._ZTSN6thrust6system6detail9bad_allocE,"aG",@progbits,_ZTSN6thrust6system6detail9bad_allocE,comdat
	.weak	_ZTSN6thrust6system6detail9bad_allocE
_ZTSN6thrust6system6detail9bad_allocE:
	.asciz	"N6thrust6system6detail9bad_allocE"
	.size	_ZTSN6thrust6system6detail9bad_allocE, 34

	.type	_ZTIN6thrust6system6detail9bad_allocE,@object # @_ZTIN6thrust6system6detail9bad_allocE
	.section	.rodata._ZTIN6thrust6system6detail9bad_allocE,"aG",@progbits,_ZTIN6thrust6system6detail9bad_allocE,comdat
	.weak	_ZTIN6thrust6system6detail9bad_allocE
	.p2align	3, 0x0
_ZTIN6thrust6system6detail9bad_allocE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system6detail9bad_allocE
	.quad	_ZTISt9bad_alloc
	.size	_ZTIN6thrust6system6detail9bad_allocE, 24

	.type	.L.str.71,@object               # @.str.71
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.71:
	.asciz	"device free failed"
	.size	.L.str.71, 19

	.type	_ZTVN6thrust6system6detail9bad_allocE,@object # @_ZTVN6thrust6system6detail9bad_allocE
	.section	.rodata._ZTVN6thrust6system6detail9bad_allocE,"aG",@progbits,_ZTVN6thrust6system6detail9bad_allocE,comdat
	.weak	_ZTVN6thrust6system6detail9bad_allocE
	.p2align	3, 0x0
_ZTVN6thrust6system6detail9bad_allocE:
	.quad	0
	.quad	_ZTIN6thrust6system6detail9bad_allocE
	.quad	_ZN6thrust6system6detail9bad_allocD2Ev
	.quad	_ZN6thrust6system6detail9bad_allocD0Ev
	.quad	_ZNK6thrust6system6detail9bad_alloc4whatEv
	.size	_ZTVN6thrust6system6detail9bad_allocE, 40

	.type	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,@object # @_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.section	.rodata._ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,"aG",@progbits,_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,comdat
	.weak	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.p2align	3, 0x0
_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj:
	.quad	_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.size	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj, 8

	.type	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv,@object # @_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv
	.section	.rodata._ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv,"aG",@progbits,_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv,comdat
	.weak	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv
	.p2align	3, 0x0
_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv:
	.quad	_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv
	.size	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv, 8

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE:
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE:
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE:
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE:
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE:
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE:
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE:
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE:
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE:
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE, 36

	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@object # @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.section	.rodata._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"aG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.weak	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.p2align	3, 0x0
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_:
	.quad	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, 8

	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@object # @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.section	.rodata._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"aG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	3, 0x0
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_:
	.quad	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, 8

	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@object # @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.section	.rodata._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"aG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_:
	.quad	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, 8

	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@object # @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.section	.rodata._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"aG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.weak	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.p2align	3, 0x0
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_:
	.quad	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, 8

	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@object # @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.section	.rodata._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"aG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	3, 0x0
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_:
	.quad	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, 8

	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@object # @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.section	.rodata._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"aG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_:
	.quad	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, 8

	.type	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_,@object # @_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_
	.section	.rodata._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_,"aG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_,comdat
	.weak	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_
	.p2align	3, 0x0
_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_:
	.quad	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_
	.size	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_, 8

	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@object # @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.section	.rodata._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"aG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.weak	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.p2align	3, 0x0
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_:
	.quad	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, 8

	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@object # @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.section	.rodata._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"aG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	3, 0x0
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_:
	.quad	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, 8

	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@object # @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.section	.rodata._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"aG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_:
	.quad	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, 8

	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@object # @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.section	.rodata._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"aG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.weak	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.p2align	3, 0x0
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_:
	.quad	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, 8

	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@object # @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.section	.rodata._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"aG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.weak	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	3, 0x0
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_:
	.quad	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, 8

	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@object # @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.section	.rodata._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"aG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.weak	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_:
	.quad	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, 8

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE:
	.long	256                             # 0x100
	.long	16                              # 0x10
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	16                              # 0x10
	.long	4294967295                      # 0xffffffff
	.long	8                               # 0x8
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE4294967295EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE:
	.long	256                             # 0x100
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	31                              # 0x1f
	.long	4294967295                      # 0xffffffff
	.long	4                               # 0x4
	.long	0                               # 0x0
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE803EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE:
	.long	512                             # 0x200
	.long	16                              # 0x10
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	16                              # 0x10
	.long	4294967295                      # 0xffffffff
	.long	8                               # 0x8
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE900EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE:
	.long	256                             # 0x100
	.long	18                              # 0x12
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	18                              # 0x12
	.long	4294967295                      # 0xffffffff
	.long	8                               # 0x8
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE906EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE:
	.long	256                             # 0x100
	.long	16                              # 0x10
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	16                              # 0x10
	.long	4294967295                      # 0xffffffff
	.long	8                               # 0x8
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE908EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE:
	.long	256                             # 0x100
	.long	16                              # 0x10
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	16                              # 0x10
	.long	4294967295                      # 0xffffffff
	.long	8                               # 0x8
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE910EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE:
	.long	1024                            # 0x400
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.long	1024                            # 0x400
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.long	8                               # 0x8
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1030EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE:
	.long	256                             # 0x100
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	31                              # 0x1f
	.long	4294967295                      # 0xffffffff
	.long	4                               # 0x4
	.long	0                               # 0x0
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1100EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE:
	.long	256                             # 0x100
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	31                              # 0x1f
	.long	4294967295                      # 0xffffffff
	.long	4                               # 0x4
	.long	0                               # 0x0
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjtE19architecture_configILNS0_11target_archE1102EE6paramsE, 32

	.type	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,@object # @_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.section	.rodata._ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,"aG",@progbits,_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,comdat
	.weak	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.p2align	3, 0x0
_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj:
	.quad	_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.size	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj, 8

	.type	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_,@object # @_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_
	.section	.rodata._ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_,"aG",@progbits,_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_,comdat
	.weak	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_
	.p2align	3, 0x0
_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_:
	.quad	_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_
	.size	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_, 8

	.type	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_,@object # @_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_
	.section	.rodata._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_,"aG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_,comdat
	.weak	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_
	.p2align	3, 0x0
_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_:
	.quad	_ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_
	.size	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_, 8

	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,@object # @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.section	.rodata._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"aG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	3, 0x0
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj:
	.quad	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, 8

	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,@object # @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.section	.rodata._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"aG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	3, 0x0
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj:
	.quad	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, 8

	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,@object # @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.section	.rodata._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"aG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	3, 0x0
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj:
	.quad	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, 8

	.type	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,@object # @_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.section	.rodata._ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,"aG",@progbits,_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,comdat
	.weak	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.p2align	3, 0x0
_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj:
	.quad	_ZN7rocprim6detail43__device_stub__radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.size	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj, 8

	.type	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv,@object # @_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv
	.section	.rodata._ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv,"aG",@progbits,_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv,comdat
	.weak	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv
	.p2align	3, 0x0
_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv:
	.quad	_ZN7rocprim6detail54__device_stub__device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv
	.size	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv, 8

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE:
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE:
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE:
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE:
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE:
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE:
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	256                             # 0x100
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE:
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	2                               # 0x2
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE:
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE, 36

	.type	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE,@object # @_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE
	.section	.rodata._ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE,"aG",@progbits,_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE,comdat
	.weak	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE:
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	201072                          # 0x31170
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	4294967295                      # 0xffffffff
	.long	128                             # 0x80
	.long	8                               # 0x8
	.long	4294967295                      # 0xffffffff
	.size	_ZN7rocprim6detail37wrapped_merge_sort_block_merge_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE, 36

	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@object # @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.section	.rodata._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"aG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.weak	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.p2align	3, 0x0
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_:
	.quad	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, 8

	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,@object # @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.section	.rodata._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"aG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
	.weak	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.p2align	3, 0x0
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_:
	.quad	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, 8

	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,@object # @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.section	.rodata._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"aG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
	.weak	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_:
	.quad	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, 8

	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@object # @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.section	.rodata._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"aG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.weak	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.p2align	3, 0x0
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_:
	.quad	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, 8

	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,@object # @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.section	.rodata._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"aG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
	.weak	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.p2align	3, 0x0
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_:
	.quad	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, 8

	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,@object # @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.section	.rodata._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"aG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
	.weak	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_:
	.quad	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, 8

	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@object # @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.section	.rodata._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"aG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.weak	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.p2align	3, 0x0
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_:
	.quad	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, 8

	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,@object # @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.section	.rodata._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"aG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
	.weak	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.p2align	3, 0x0
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_:
	.quad	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, 8

	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,@object # @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.section	.rodata._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"aG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
	.weak	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_:
	.quad	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, 8

	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@object # @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.section	.rodata._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"aG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.weak	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.p2align	3, 0x0
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_:
	.quad	_ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, 8

	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,@object # @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.section	.rodata._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"aG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
	.weak	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.p2align	3, 0x0
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_:
	.quad	_ZN7rocprim6detail50__device_stub__device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, 8

	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,@object # @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.section	.rodata._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"aG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
	.weak	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_:
	.quad	_ZN7rocprim6detail48__device_stub__device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, 8

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE:
	.long	512                             # 0x200
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	5                               # 0x5
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE4294967295EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE:
	.long	256                             # 0x100
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	31                              # 0x1f
	.long	4294967295                      # 0xffffffff
	.long	4                               # 0x4
	.long	0                               # 0x0
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE803EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE:
	.long	1024                            # 0x400
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	1024                            # 0x400
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	4                               # 0x4
	.long	0                               # 0x0
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE900EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE:
	.long	512                             # 0x200
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	5                               # 0x5
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE906EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE:
	.long	512                             # 0x200
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	5                               # 0x5
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE908EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE:
	.long	512                             # 0x200
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	5                               # 0x5
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE910EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE:
	.long	1024                            # 0x400
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.long	1024                            # 0x400
	.long	4                               # 0x4
	.long	4294967295                      # 0xffffffff
	.long	7                               # 0x7
	.long	2                               # 0x2
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1030EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE:
	.long	256                             # 0x100
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	31                              # 0x1f
	.long	4294967295                      # 0xffffffff
	.long	4                               # 0x4
	.long	0                               # 0x0
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1100EE6paramsE, 32

	.type	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE,@object # @_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE
	.section	.rodata._ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE,"aG",@progbits,_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE,comdat
	.weak	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE
	.p2align	2, 0x0
_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE:
	.long	256                             # 0x100
	.long	12                              # 0xc
	.long	4294967295                      # 0xffffffff
	.long	512                             # 0x200
	.long	31                              # 0x1f
	.long	4294967295                      # 0xffffffff
	.long	4                               # 0x4
	.long	0                               # 0x0
	.size	_ZN7rocprim6detail34wrapped_radix_sort_onesweep_configINS_14default_configEjjE19architecture_configILNS0_11target_archE1102EE6paramsE, 32

	.type	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,@object # @_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.section	.rodata._ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,"aG",@progbits,_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,comdat
	.weak	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.p2align	3, 0x0
_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj:
	.quad	_ZN7rocprim6detail41__device_stub__onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.size	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj, 8

	.type	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_,@object # @_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_
	.section	.rodata._ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_,"aG",@progbits,_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_,comdat
	.weak	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_
	.p2align	3, 0x0
_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_:
	.quad	_ZN7rocprim6detail46__device_stub__onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_
	.size	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_, 8

	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj,@object # @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj
	.section	.rodata._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj,"aG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	3, 0x0
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj:
	.quad	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj, 8

	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,@object # @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.section	.rodata._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"aG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	3, 0x0
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj:
	.quad	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, 8

	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,@object # @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.section	.rodata._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"aG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.weak	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	3, 0x0
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj:
	.quad	_ZN7rocprim6detail40__device_stub__onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj"
	.size	.L__unnamed_1, 229

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv"
	.size	.L__unnamed_2, 256

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_"
	.size	.L__unnamed_3, 220

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_"
	.size	.L__unnamed_4, 253

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_"
	.size	.L__unnamed_5, 246

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_"
	.size	.L__unnamed_6, 242

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_"
	.size	.L__unnamed_7, 253

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_"
	.size	.L__unnamed_8, 246

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_"
	.size	.L__unnamed_9, 148

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	.type	.L__unnamed_63,@object          # @62
.L__unnamed_63:
	.asciz	"_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj"
	.size	.L__unnamed_63, 234

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
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	.addrsig_sym _ZN7rocprim6detail60__device_stub__device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
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	.addrsig_sym _ZN7rocprim6detail31__device_stub__transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_
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	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _ZSt4cout
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	.addrsig_sym _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
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	.addrsig_sym _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.addrsig_sym _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_
	.addrsig_sym _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_
	.addrsig_sym _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
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	.addrsig_sym _ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_
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	.addrsig_sym _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_
	.addrsig_sym _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.addrsig_sym _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.addrsig_sym _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.addrsig_sym _ZTVN10__cxxabiv120__si_class_type_infoE
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	.addrsig_sym _ZTISt13runtime_error
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	.addrsig_sym _ZZN6thrust6system12hip_categoryEvE6result
	.addrsig_sym _ZGVZN6thrust6system12hip_categoryEvE6result
	.addrsig_sym __dso_handle
	.addrsig_sym _ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.addrsig_sym _ZTVN10__cxxabiv117__class_type_infoE
	.addrsig_sym _ZTSN6thrust6system14error_categoryE
	.addrsig_sym _ZTIN6thrust6system14error_categoryE
	.addrsig_sym _ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.addrsig_sym _ZZN6thrust6system15system_categoryEvE6result
	.addrsig_sym _ZGVZN6thrust6system15system_categoryEvE6result
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	.addrsig_sym _ZTIN6thrust6system6detail21system_error_categoryE
	.addrsig_sym _ZZN6thrust6system16generic_categoryEvE6result
	.addrsig_sym _ZGVZN6thrust6system16generic_categoryEvE6result
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	.addrsig_sym _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.addrsig_sym _ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.addrsig_sym _ZTSN6thrust6system6detail9bad_allocE
	.addrsig_sym _ZTISt9bad_alloc
	.addrsig_sym _ZTIN6thrust6system6detail9bad_allocE
	.addrsig_sym _ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.addrsig_sym _ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv
	.addrsig_sym _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.addrsig_sym _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.addrsig_sym _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.addrsig_sym _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.addrsig_sym _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.addrsig_sym _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.addrsig_sym _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_
	.addrsig_sym _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.addrsig_sym _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.addrsig_sym _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.addrsig_sym _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.addrsig_sym _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.addrsig_sym _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.addrsig_sym _ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.addrsig_sym _ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_
	.addrsig_sym _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_
	.addrsig_sym _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.addrsig_sym _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.addrsig_sym _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.addrsig_sym _ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.addrsig_sym _ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv
	.addrsig_sym _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.addrsig_sym _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.addrsig_sym _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.addrsig_sym _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.addrsig_sym _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.addrsig_sym _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.addrsig_sym _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.addrsig_sym _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.addrsig_sym _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.addrsig_sym _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.addrsig_sym _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.addrsig_sym _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.addrsig_sym _ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.addrsig_sym _ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_
	.addrsig_sym _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj
	.addrsig_sym _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.addrsig_sym _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,"axG",@progbits,_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,comdat
	.protected	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj ; -- Begin function _ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.globl	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.p2align	8
	.type	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,@function
_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj: ; @_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x20
	s_load_b256 s[16:23], s[0:1], 0x0
	s_lshl_b32 s24, s15, 10
	s_mov_b32 s25, 0
	v_lshlrev_b32_e32 v1, 4, v0
	v_lshlrev_b32_e32 v13, 2, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s15, s3
	s_cselect_b32 s29, -1, 0
	s_lshl_b64 s[26:27], s[24:25], 2
	s_add_u32 s4, s16, s26
	s_addc_u32 s5, s17, s27
	v_add_co_u32 v5, s4, s4, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, null, s5, 0, s4
	s_cmp_eq_u32 s15, s3
	s_cbranch_scc1 .LBB0_2
; %bb.1:
	s_add_u32 s3, s20, s24
	s_addc_u32 s4, s21, 0
	v_add_co_u32 v1, s3, s3, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s4, 0, s3
	s_mov_b32 s3, 0
	s_mov_b32 s25, -1
	s_clause 0x1
	global_load_u16 v14, v[1:2], off
	global_load_i8 v16, v[1:2], off offset:2
	global_load_b128 v[1:4], v[5:6], off
	s_waitcnt vmcnt(2)
	v_lshrrev_b32_e32 v15, 8, v14
	s_branch .LBB0_3
.LBB0_2:
	s_mov_b32 s3, -1
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4
                                        ; implicit-def: $vgpr14
                                        ; implicit-def: $vgpr15
                                        ; implicit-def: $vgpr16
.LBB0_3:                                ; %Flow76
	s_sub_i32 s28, s2, s24
	s_and_not1_b32 vcc_lo, exec_lo, s3
	v_cmp_gt_u32_e64 s2, s28, v13
	s_cbranch_vccnz .LBB0_19
; %bb.4:
	s_mov_b32 s4, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	s_mov_b32 s7, s4
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
	v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.5:
	global_load_b32 v1, v[5:6], off
	v_mov_b32_e32 v2, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v3, v2
	v_mov_b32_e32 v4, v2
.LBB0_6:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v7, 1, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s28, v7
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB0_8
; %bb.7:
	global_load_b32 v2, v[5:6], off offset:4
.LBB0_8:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v7, 2, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s28, v7
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB0_10
; %bb.9:
	global_load_b32 v3, v[5:6], off offset:8
.LBB0_10:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v7, 3, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s25, s28, v7
	s_and_saveexec_b32 s4, s25
	s_cbranch_execz .LBB0_12
; %bb.11:
	global_load_b32 v4, v[5:6], off offset:12
.LBB0_12:                               ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIjEEjLj4EjEEvjT_RAT1__T0_jT2_.exit.i.i
	s_or_b32 exec_lo, exec_lo, s4
	s_add_u32 s4, s20, s24
	s_addc_u32 s5, s21, 0
	v_add_co_u32 v5, s4, s4, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, null, s5, 0, s4
                                        ; implicit-def: $vgpr14
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_14
; %bb.13:
	global_load_u8 v14, v[5:6], off
.LBB0_14:
	s_or_b32 exec_lo, exec_lo, s4
                                        ; implicit-def: $vgpr15
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_16
; %bb.15:
	global_load_u8 v15, v[5:6], off offset:1
.LBB0_16:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr16
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_18
; %bb.17:
	global_load_u8 v16, v[5:6], off offset:2
.LBB0_18:
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_19:                               ; %Flow77
                                        ; implicit-def: $vgpr17
	s_and_saveexec_b32 s2, s25
	s_cbranch_execz .LBB0_21
; %bb.20:                               ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIhEEhLj4EEEvjT_RAT1__T0_j.exit.sink.split.i.i
	s_add_u32 s3, s20, s24
	s_addc_u32 s4, s21, 0
	v_add_co_u32 v5, s3, s3, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, null, s4, 0, s3
	global_load_u8 v17, v[5:6], off offset:3
.LBB0_21:                               ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIhEEhLj4EEEvjT_RAT1__T0_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
	v_mbcnt_lo_u32_b32 v5, -1, 0
	s_load_b64 s[16:17], s[0:1], 0x28
	v_or_b32_e32 v7, 31, v0
	v_lshlrev_b32_e32 v18, 5, v0
	v_cmp_gt_u32_e64 s6, 8, v0
	v_dual_mov_b32 v24, 0 :: v_dual_add_nc_u32 v9, -1, v5
	v_and_b32_e32 v6, 15, v5
	v_cmp_eq_u32_e64 s5, v7, v0
	v_lshrrev_b32_e32 v7, 3, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_gt_i32_e32 vcc_lo, 0, v9
	v_and_b32_e32 v8, 16, v5
	v_cmp_eq_u32_e64 s0, 0, v6
	v_cmp_lt_u32_e64 s1, 1, v6
	v_cmp_lt_u32_e64 s2, 3, v6
	v_cmp_lt_u32_e64 s3, 7, v6
	v_dual_cndmask_b32 v6, v9, v5 :: v_dual_and_b32 v21, 28, v7
	v_cmp_eq_u32_e64 s8, 0, v5
	v_and_b32_e32 v5, 7, v5
	v_add_nc_u32_e32 v20, v7, v13
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b32_e32 v19, 2, v6
	v_mul_i32_i24_e32 v6, 0xffffffe4, v0
	v_lshlrev_b32_e32 v7, 2, v7
	v_cmp_eq_u32_e64 s4, 0, v8
	v_cmp_lt_u32_e64 s7, 31, v0
	v_cmp_eq_u32_e64 s9, 0, v5
	v_cmp_lt_u32_e64 s10, 1, v5
	v_cmp_lt_u32_e64 s11, 3, v5
	v_or_b32_e32 v22, 0xffffff00, v0
	v_lshl_add_u32 v23, v0, 4, v7
	v_add_nc_u32_e32 v25, v18, v6
	s_waitcnt lgkmcnt(0)
	s_add_i32 s17, s17, s16
.LBB0_22:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_23 Depth 2
                                        ;     Child Loop BB0_31 Depth 2
                                        ;     Child Loop BB0_33 Depth 2
                                        ;     Child Loop BB0_35 Depth 2
                                        ;     Child Loop BB0_37 Depth 2
	v_dual_mov_b32 v5, v13 :: v_dual_mov_b32 v6, v22
	s_mov_b32 s12, 0
.LBB0_23:                               ; %.lr.ph.i.i.i.i.i.i.i.i.i
                                        ;   Parent Loop BB0_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v6, 0x100, v6
	ds_store_b32 v5, v24
	v_add_nc_u32_e32 v5, 0x400, v5
	v_cmp_lt_u32_e32 vcc_lo, 0x6ff, v6
	s_or_b32 s12, vcc_lo, s12
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB0_23
; %bb.24:                               ; %_ZN7rocprim6detail16block_radix_rankILj256ELj4ELb1ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.preheader.i.i.i.i.i.i.i.i
                                        ;   in Loop: Header=BB0_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_sub_i32 s12, s17, s16
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v5, s16, v1
	s_min_u32 s12, s12, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s12, -1, s12
	s_not_b32 s12, s12
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_and_b32_e32 v5, s12, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 8, v5
	v_lshrrev_b32_e32 v5, 3, v5
	v_and_or_b32 v6, 0x700, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v6, 1, v6
	v_add_lshl_u32 v27, v6, v5, 1
	v_lshrrev_b32_e32 v5, s16, v2
	ds_load_u16 v26, v27
	v_and_b32_e32 v5, s12, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 8, v5
	v_lshrrev_b32_e32 v5, 3, v5
	v_and_or_b32 v6, 0x700, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 1, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v7, v26, 1
	v_add_lshl_u32 v28, v6, v5, 1
	v_lshrrev_b32_e32 v5, s16, v3
	ds_store_b16 v27, v7
	ds_load_u16 v29, v28
	v_and_b32_e32 v5, s12, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 8, v5
	v_lshrrev_b32_e32 v5, 3, v5
	v_and_or_b32 v6, 0x700, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 1, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v7, v29, 1
	v_add_lshl_u32 v30, v6, v5, 1
	v_lshrrev_b32_e32 v5, s16, v4
	ds_store_b16 v28, v7
	ds_load_u16 v31, v30
	v_and_b32_e32 v5, s12, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 8, v5
	v_lshrrev_b32_e32 v5, 3, v5
	v_and_or_b32 v6, 0x700, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 1, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v7, v31, 1
	v_add_lshl_u32 v33, v6, v5, 1
	ds_store_b16 v30, v7
	ds_load_u16 v32, v33
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v5, v32, 1
	ds_store_b16 v33, v5
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[9:12], v18 offset1:1
	ds_load_2addr_b64 v[5:8], v18 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v34, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v34, v34, v11, v12
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v34, v34, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v8, v34, v7, v8
	v_mov_b32_dpp v34, v8 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v34, v34, 0, s0
	v_add_nc_u32_e32 v8, v34, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v34, v8 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v34, 0, v34, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, v8, v34
	v_mov_b32_dpp v34, v8 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v34, 0, v34, s2
	v_add_nc_u32_e32 v8, v8, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v34, v8 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v34, 0, v34, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, v8, v34
	ds_swizzle_b32 v34, v8 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v34, v34, 0, s4
	v_add_nc_u32_e32 v8, v8, v34
	s_and_saveexec_b32 s12, s5
	s_cbranch_execz .LBB0_26
; %bb.25:                               ;   in Loop: Header=BB0_22 Depth=1
	ds_store_b32 v21, v8 offset:8192
.LBB0_26:                               ;   in Loop: Header=BB0_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s12, s6
	s_cbranch_execz .LBB0_28
; %bb.27:                               ;   in Loop: Header=BB0_22 Depth=1
	ds_load_b32 v34, v25 offset:8192
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v35, v34 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v35, v35, 0, s9
	v_add_nc_u32_e32 v34, v35, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v35, v34 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v35, 0, v35, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v34, v34, v35
	v_mov_b32_dpp v35, v34 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v35, 0, v35, s11
	v_add_nc_u32_e32 v34, v34, v35
	ds_store_b32 v25, v34 offset:8192
.LBB0_28:                               ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj256ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj256EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i.i.i.i
                                        ;   in Loop: Header=BB0_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	v_mov_b32_e32 v34, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s12, s7
	s_cbranch_execz .LBB0_30
; %bb.29:                               ;   in Loop: Header=BB0_22 Depth=1
	ds_load_b32 v34, v21 offset:8188
.LBB0_30:                               ; %_ZN7rocprim16block_radix_rankILj256ELj4ELNS_26block_radix_rank_algorithmE1ELj1ELj1EE9rank_keysIjLj4EZNS_16block_radix_sortIjLj256ELj4EhLj1ELj1ELj4EE9sort_implILb0ELb0EhNS_19identity_decomposerEEEvRA4_jRA4_T1_RNS_6detail11raw_storageINS5_13storage_type_EEEjjT2_EUlRKjE_EEvRAT0__KT_RAT0__jRNSE_INSD_16block_radix_rankILj256ELj4ELb1ELj1ELj1EE13storage_type_EEESA_.exit.i.i.i.i.i
                                        ;   in Loop: Header=BB0_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v8, v34, v8
	ds_load_b32 v35, v24 offset:8220
	s_mov_b64 s[14:15], 0
	ds_bpermute_b32 v8, v19, v8
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v8, v8, v34, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v8, v35, 16, v8
	v_add_nc_u32_e32 v9, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v10, v9, v10
	v_add_nc_u32_e32 v11, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v34, v11, v12
	v_and_b32_e32 v12, 0xffff, v32
	v_add_nc_u32_e32 v35, v34, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v35, v6
	v_add_nc_u32_e32 v6, v5, v7
	ds_store_2addr_b64 v18, v[8:9], v[10:11] offset1:1
	ds_store_2addr_b64 v18, v[34:35], v[5:6] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v5, v27
	ds_load_u16 v6, v28
	ds_load_u16 v7, v30
	ds_load_u16 v8, v33
	v_and_b32_e32 v9, 0xffff, v26
	v_and_b32_e32 v10, 0xffff, v29
	v_and_b32_e32 v11, 0xffff, v31
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v5, v5, v9
	v_add_nc_u32_e32 v6, v6, v10
	v_add_nc_u32_e32 v7, v7, v11
	v_add_nc_u32_e32 v8, v8, v12
.LBB0_31:                               ;   Parent Loop BB0_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_cmp_eq_u32 s14, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s14, 2
	v_cndmask_b32_e32 v9, v5, v6, vcc_lo
	s_cselect_b32 s12, -1, 0
	s_cmp_eq_u32 s14, 3
	s_cselect_b32 s13, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v9, v9, v7, s12
	s_add_u32 s14, s14, 1
	s_addc_u32 s15, s15, 0
	s_cmp_eq_u32 s14, 4
	v_cndmask_b32_e64 v9, v9, v8, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v11, 3, v9
	v_dual_cndmask_b32 v10, v1, v2 :: v_dual_and_b32 v11, 0x3ffc, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v10, v10, v3, s12
	v_lshl_add_u32 v9, v9, 2, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v10, v10, v4, s13
	ds_store_b32 v9, v10
	s_cbranch_scc0 .LBB0_31
; %bb.32:                               ;   in Loop: Header=BB0_22 Depth=1
	v_mov_b32_e32 v9, v23
	s_mov_b64 s[20:21], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_33:                               ;   Parent Loop BB0_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v10, v9
	s_cmp_eq_u32 s20, 3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s20, 2
	v_add_nc_u32_e32 v9, 4, v9
	s_cselect_b32 s12, -1, 0
	s_cmp_eq_u32 s20, 1
	s_cselect_b32 s13, -1, 0
	s_cmp_eq_u32 s20, 0
	s_cselect_b32 s14, -1, 0
	s_add_u32 s20, s20, 1
	s_addc_u32 s21, s21, 0
	s_cmp_lg_u32 s20, 4
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v4, v4, v10, vcc_lo
	v_cndmask_b32_e64 v3, v3, v10, s12
	v_cndmask_b32_e64 v2, v2, v10, s13
	v_cndmask_b32_e64 v1, v1, v10, s14
	s_cbranch_scc1 .LBB0_33
; %bb.34:                               ; %_ZN7rocprim16block_radix_sortIjLj256ELj4EhLj1ELj1ELj4EE13exchange_keysERNS_6detail11raw_storageINS1_13storage_type_EEERA4_jRA4_Kj.exit.i.i.i.i.i
                                        ;   in Loop: Header=BB0_22 Depth=1
	s_mov_b64 s[12:13], 0
	s_barrier
	buffer_gl0_inv
.LBB0_35:                               ;   Parent Loop BB0_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_cmp_eq_u32 s12, 1
	v_and_b32_e32 v9, 0xff, v14
	s_cselect_b32 vcc_lo, -1, 0
	v_lshlrev_b16 v10, 8, v15
	v_dual_cndmask_b32 v26, v5, v6 :: v_dual_and_b32 v11, 0xff, v16
	v_lshlrev_b16 v12, 8, v17
	s_cmp_eq_u32 s12, 2
	s_delay_alu instid0(VALU_DEP_3)
	v_or_b32_e32 v9, v9, v10
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s12, 3
	v_or_b32_e32 v10, v11, v12
	v_cndmask_b32_e32 v11, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_and_b32_e32 v9, 0xffff, v9
	s_lshl_b32 s14, s12, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v11, v11, v8 :: v_dual_lshlrev_b32 v10, 16, v10
	s_add_u32 s12, s12, 1
	s_addc_u32 s13, s13, 0
	s_cmp_eq_u32 s12, 4
	v_or_b32_e32 v9, v9, v10
	v_lshrrev_b32_e32 v10, 5, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v9, s14, v9
	v_add_nc_u32_e32 v10, v10, v11
	ds_store_b8 v10, v9
	s_cbranch_scc0 .LBB0_35
; %bb.36:                               ;   in Loop: Header=BB0_22 Depth=1
	v_mov_b32_e32 v5, v20
	s_mov_b64 s[12:13], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_37:                               ;   Parent Loop BB0_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_u8 v6, v5
	v_and_b32_e32 v7, 0xff, v14
	v_lshlrev_b16 v8, 8, v15
	v_and_b32_e32 v9, 0xff, v16
	v_lshlrev_b16 v10, 8, v17
	s_lshl_b32 s14, s12, 3
	v_add_nc_u32_e32 v5, 1, v5
	v_or_b32_e32 v7, v7, v8
	s_lshl_b32 s14, 0xff, s14
	v_or_b32_e32 v8, v9, v10
	s_add_u32 s12, s12, 1
	s_addc_u32 s13, s13, 0
	v_and_b32_e32 v7, 0xffff, v7
	s_cmp_lg_u32 s12, 4
	v_lshlrev_b32_e32 v8, 16, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_or_b32_e32 v7, v7, v8
	s_waitcnt lgkmcnt(0)
	v_perm_b32 v6, v6, v6, 0x4040404
	v_bfi_b32 v14, s14, v6, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b32_e32 v17, 24, v14
	v_lshrrev_b32_e32 v16, 16, v14
	v_lshrrev_b32_e32 v15, 8, v14
	s_cbranch_scc1 .LBB0_37
; %bb.38:                               ; %_ZN7rocprim16block_radix_sortIjLj256ELj4EhLj1ELj1ELj4EE15exchange_valuesIhEEvRNS_6detail11raw_storageINS1_13storage_type_EEERA4_T_RA4_Kj.exit.i.i.i.i.i
                                        ;   in Loop: Header=BB0_22 Depth=1
	s_add_i32 s16, s16, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s16, s17
	s_cbranch_scc1 .LBB0_40
; %bb.39:                               ;   in Loop: Header=BB0_22 Depth=1
	s_mov_b32 s12, 0
	s_barrier
	buffer_gl0_inv
	s_branch .LBB0_41
.LBB0_40:                               ;   in Loop: Header=BB0_22 Depth=1
	s_mov_b32 s12, -1
                                        ; implicit-def: $sgpr16
.LBB0_41:                               ; %Flow75
                                        ;   in Loop: Header=BB0_22 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB0_22
; %bb.42:                               ; %_ZN7rocprim6detail10sort_blockILb0ENS_16block_radix_sortIjLj256ELj4EhLj1ELj1ELj4EEEjhLj4ENS_19identity_decomposerEEEvT0_RAT3__T1_RAT3__T2_RNS5_12storage_typeET4_jj.exit.i.i
	v_lshlrev_b32_e32 v0, 2, v13
	s_add_u32 s0, s18, s26
	s_addc_u32 s1, s19, s27
	s_mov_b32 s2, 0
	s_and_not1_b32 vcc_lo, exec_lo, s29
	v_add_co_u32 v5, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, null, s1, 0, s0
	s_mov_b32 s0, -1
	s_cbranch_vccnz .LBB0_44
; %bb.43:
	s_add_u32 s0, s22, s24
	v_and_b32_e32 v0, 0xff, v14
	v_lshlrev_b16 v9, 8, v15
	s_addc_u32 s1, s23, 0
	v_add_co_u32 v7, s0, s0, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, null, s1, 0, s0
	v_or_b32_e32 v0, v0, v9
	s_mov_b32 s0, 0
	s_mov_b32 s2, -1
	global_store_b128 v[5:6], v[1:4], off
	s_clause 0x1
	global_store_b8 v[7:8], v16, off offset:2
	global_store_b16 v[7:8], v0, off
.LBB0_44:                               ; %Flow
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_60
; %bb.45:
	v_cmp_gt_u32_e32 vcc_lo, s28, v13
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_47
; %bb.46:
	global_store_b32 v[5:6], v1, off
.LBB0_47:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v0, 1, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s28, v0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_49
; %bb.48:
	global_store_b32 v[5:6], v2, off offset:4
.LBB0_49:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v0, 2, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s28, v0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_51
; %bb.50:
	global_store_b32 v[5:6], v3, off offset:8
.LBB0_51:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v0, 3, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s28, v0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_53
; %bb.52:
	global_store_b32 v[5:6], v4, off offset:12
.LBB0_53:                               ; %_ZN7rocprim26block_store_direct_blockedIN6thrust10device_ptrIjEEjLj4EEEvjT_RAT1__T0_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s3
	s_add_u32 s3, s22, s24
	s_addc_u32 s4, s23, 0
	v_add_co_u32 v0, s3, s3, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s4, 0, s3
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_55
; %bb.54:
	global_store_b8 v[0:1], v14, off
.LBB0_55:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB0_57
; %bb.56:
	global_store_b8 v[0:1], v15, off offset:1
.LBB0_57:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_59
; %bb.58:
	global_store_b8 v[0:1], v16, off offset:2
.LBB0_59:
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_60:                               ; %Flow73
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_62
; %bb.61:                               ; %_ZN7rocprim6detail24radix_sort_single_helperILj256ELj4ELb0EjhE11sort_singleIN6thrust10device_ptrIjEES6_NS5_IhEES7_NS_19identity_decomposerEEEvT_T0_T1_T2_jT3_jjRNS2_12storage_typeE.exit.sink.split.i
	s_add_u32 s0, s22, s24
	s_addc_u32 s1, s23, 0
	v_add_co_u32 v0, s0, s0, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s1, 0, s0
	global_store_b8 v[0:1], v17, off offset:3
.LBB0_62:                               ; %_ZN7rocprim6detail11sort_singleILj256ELj4ELb0EN6thrust10device_ptrIjEES4_NS3_IhEES5_NS_19identity_decomposerEEEvT2_T3_T4_T5_jT6_jj.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
		.amdhsa_group_segment_fixed_size 8224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 36
		.amdhsa_next_free_sgpr 30
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,"axG",@progbits,_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,comdat
.Lfunc_end0:
	.size	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj, .Lfunc_end0-_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2760
; NumSgprs: 32
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8224 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 32
; NumVGPRsForWavesPerEU: 36
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv,"axG",@progbits,_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv,comdat
	.protected	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv ; -- Begin function _ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv
	.globl	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv
	.p2align	8
	.type	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv,@function
_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv: ; @_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 0
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 0
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv,"axG",@progbits,_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv,comdat
.Lfunc_end1:
	.size	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv, .Lfunc_end1-_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.protected	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_ ; -- Begin function _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.globl	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.p2align	8
	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@function
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_: ; @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x8
	v_lshl_or_b32 v0, s15, 7, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB2_6
; %bb.1:
	s_load_b32 s3, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, 0x7ffffe
	s_sub_i32 s5, 0, s4
	s_add_i32 s4, s4, -1
	v_and_b32_e32 v1, s5, v0
	v_and_b32_e32 v5, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 10, v1
	v_add_nc_u32_e32 v2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v4, s2, v2
	v_min_u32_e32 v2, s2, v1
	v_add_nc_u32_e32 v3, s3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, s2, v3
	v_lshlrev_b32_e32 v3, 10, v5
	s_mov_b32 s2, exec_lo
	v_sub_nc_u32_e32 v5, v1, v2
	v_sub_nc_u32_e32 v6, v1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, v5, v3
	v_sub_nc_u32_e32 v3, v4, v2
	v_sub_nc_u32_e64 v6, v1, v6 clamp
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v7, v1, v3
	v_cmpx_lt_u32_e64 v6, v7
	s_cbranch_execz .LBB2_5
; %bb.2:                                ; %.lr.ph.i.preheader
	s_load_b64 s[4:5], s[0:1], 0x0
	v_mov_b32_e32 v5, 0
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v5
	v_lshlrev_b64 v[10:11], 2, v[4:5]
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v11, vcc_lo
.LBB2_3:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v4, 1, v4
	v_mov_b32_e32 v12, v5
	v_xad_u32 v11, v4, -1, v1
	v_lshlrev_b64 v[13:14], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v13, vcc_lo, v3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v8, v14, vcc_lo
	v_add_co_u32 v11, vcc_lo, v9, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, v10, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	v_add_nc_u32_e32 v12, 1, v4
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v13, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v7, v7, v4 :: v_dual_cndmask_b32 v6, v12, v6
	v_cmp_ge_u32_e32 vcc_lo, v6, v7
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_5:                                ; %Flow53
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v6, v2
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB2_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
.Lfunc_end2:
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, .Lfunc_end2-_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.protected	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ ; -- Begin function _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.globl	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	8
	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: ; @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
; %bb.0:
	s_clause 0x2
	s_load_b64 s[18:19], s[0:1], 0x20
	s_load_b64 s[4:5], s[0:1], 0x30
	s_load_b64 s[24:25], s[0:1], 0x44
	s_mov_b32 s3, 0
	s_mov_b32 s6, s15
	s_mov_b32 s7, s3
	s_mov_b32 s11, s3
	v_lshlrev_b32_e32 v17, 2, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s23, s18, 10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s15, s23
	s_cselect_b32 s20, -1, 0
	s_lshl_b64 s[8:9], s[6:7], 2
	s_add_u32 s8, s4, s8
	s_addc_u32 s9, s5, s9
	s_add_i32 s10, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[10:11], 2
	s_add_u32 s4, s4, s10
	s_addc_u32 s5, s5, s11
	s_clause 0x1
	s_load_b32 s2, s[8:9], 0x0
	s_load_b32 s7, s[4:5], 0x0
	s_lshr_b32 s4, s19, 9
	s_load_b256 s[8:15], s[0:1], 0x0
	s_and_b32 s0, s4, 0x7ffffe
	s_lshl_b32 s16, s6, 10
	s_sub_i32 s1, 0, s0
	s_add_i32 s0, s0, -1
	s_and_b32 s1, s6, s1
	s_and_b32 s5, s0, s6
	s_lshl_b32 s4, s1, 11
	s_lshl_b32 s1, s1, 10
	s_add_i32 s4, s4, s19
	s_sub_i32 s17, s16, s1
	s_sub_i32 s1, s4, s1
	s_add_i32 s4, s4, s17
	s_min_u32 s17, s18, s1
	s_add_i32 s1, s1, s19
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s19, s4, s2
	s_sub_i32 s21, s4, s7
	s_min_u32 s4, s18, s19
	s_addk_i32 s21, 0x400
	s_cmp_eq_u32 s0, s5
	s_mov_b32 s5, s3
	s_cselect_b32 s19, s1, s21
	s_cselect_b32 s7, s17, s7
	s_lshl_b64 s[0:1], s[2:3], 2
	s_min_u32 s22, s19, s18
	s_sub_i32 s17, s7, s2
	s_add_u32 s19, s8, s0
	s_addc_u32 s21, s9, s1
	s_lshl_b64 s[26:27], s[4:5], 2
	s_mov_b32 s0, -1
	s_add_u32 s7, s8, s26
	s_addc_u32 s8, s9, s27
	s_lshr_b32 s5, s24, 16
	s_and_b32 s9, s24, 0xffff
	s_and_b32 s1, s25, 0xffff
	s_mul_i32 s5, s9, s5
	s_cmp_eq_u32 s6, s23
	s_mul_i32 s5, s5, s1
	s_cbranch_scc1 .LBB3_2
; %bb.1:                                ; %.preheader36.i.i.i
	v_mov_b32_e32 v4, 0
	v_subrev_nc_u32_e32 v3, s17, v0
	v_add_co_u32 v7, s0, s19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, null, s21, 0, s0
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_add_nc_u32_e32 v3, s5, v0
	s_mov_b32 s3, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v9, vcc_lo, s19, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, s21, v6, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_add_co_u32 v5, s0, s7, v1
	v_add_co_ci_u32_e64 v6, s0, s8, v2, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_cmp_gt_u32_e64 s0, s17, v0
	v_lshl_add_u32 v3, s5, 1, v0
	v_cndmask_b32_e64 v6, v6, v8, s0
	v_cndmask_b32_e64 v5, v5, v7, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_add_co_u32 v11, s0, s7, v1
	v_add_co_ci_u32_e64 v2, s0, s8, v2, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s19, v7
	v_add_co_ci_u32_e64 v14, s0, s21, v8, s0
	v_mad_u64_u32 v[7:8], null, s5, 3, v[0:1]
	global_load_b32 v1, v[5:6], off
	v_cmp_gt_u32_e64 s0, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_mov_b32_e32 v8, v4
	v_dual_cndmask_b32 v10, v2, v10 :: v_dual_cndmask_b32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v7
	v_lshlrev_b64 v[11:12], 2, v[7:8]
	global_load_b32 v2, v[9:10], off
	v_add_co_u32 v15, vcc_lo, s7, v5
	v_add_co_ci_u32_e32 v16, vcc_lo, s8, v6, vcc_lo
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_lshl_add_u32 v3, s5, 2, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v8, v15, v13, s0
	v_cndmask_b32_e64 v9, v16, v14, s0
	v_add_co_u32 v15, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[3:4]
	v_add_co_ci_u32_e32 v12, vcc_lo, s21, v12, vcc_lo
	v_add_co_u32 v16, vcc_lo, s19, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v18, vcc_lo, s21, v14, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_add_co_u32 v14, s0, s7, v5
	v_add_co_ci_u32_e64 v13, s0, s8, v6, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_cmp_gt_u32_e64 s0, s17, v7
	v_cndmask_b32_e64 v13, v13, v12, s0
	v_cndmask_b32_e64 v12, v14, v15, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s0, s7, v5
	v_add_co_ci_u32_e64 v7, s0, s8, v6, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v18, vcc_lo
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[10:11], null, s5, 5, v[0:1]
	v_mov_b32_e32 v11, v4
	v_mad_u64_u32 v[14:15], null, s5, 6, v[0:1]
	v_mov_b32_e32 v15, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[10:11]
	v_subrev_nc_u32_e32 v3, s17, v10
	v_lshlrev_b64 v[18:19], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_co_u32 v21, s0, s19, v5
	v_subrev_nc_u32_e32 v3, s17, v14
	v_add_co_ci_u32_e64 v11, s0, s21, v6, s0
	v_lshlrev_b64 v[5:6], 2, v[14:15]
	v_add_co_u32 v15, s0, s7, v18
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_ci_u32_e64 v18, s0, s8, v19, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s1, s19, v5
	v_add_co_ci_u32_e64 v19, s1, s21, v6, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, s1, s7, v3
	v_cmp_gt_u32_e64 s0, s17, v10
	v_add_co_ci_u32_e64 v4, s1, s8, v4, s1
	v_cmp_gt_u32_e64 s1, s17, v14
	v_cndmask_b32_e32 v6, v20, v16, vcc_lo
	v_cndmask_b32_e64 v11, v18, v11, s0
	v_cndmask_b32_e64 v10, v15, v21, s0
	s_mov_b32 s0, 0
	v_cndmask_b32_e64 v15, v4, v19, s1
	v_cndmask_b32_e64 v14, v3, v5, s1
	global_load_b32 v3, v[8:9], off
	global_load_b32 v4, v[12:13], off
	global_load_b32 v5, v[6:7], off
	global_load_b32 v6, v[10:11], off
	global_load_b32 v7, v[14:15], off
	v_mad_u64_u32 v[9:10], null, s5, 7, v[0:1]
	s_branch .LBB3_3
.LBB3_2:
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
                                        ; implicit-def: $vgpr9
.LBB3_3:                                ; %Flow121
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_sub_i32 s6, s22, s4
	s_cbranch_vccnz .LBB3_19
; %bb.4:                                ; %.preheader.i.i.i
	s_add_i32 s1, s6, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB3_6
; %bb.5:
	v_subrev_nc_u32_e32 v1, s17, v0
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, s3, s19, v17
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(3)
	v_add_co_ci_u32_e64 v4, null, s21, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s7, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s8, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v2, v2, v4
	global_load_b32 v1, v[1:2], off
.LBB3_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, s5, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB3_8
; %bb.7:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v2, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s7, v9
	v_add_co_ci_u32_e64 v10, s0, s8, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v2 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v2, v[9:10], off
.LBB3_8:
	s_or_b32 exec_lo, exec_lo, s3
	v_lshl_add_u32 v9, s5, 1, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB3_10
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s7, v9
	v_add_co_ci_u32_e64 v10, s0, s8, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v3, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v3, v[9:10], off
.LBB3_10:
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, s5, 3, v[0:1]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB3_12
; %bb.11:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v4, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s7, v9
	v_add_co_ci_u32_e64 v10, s0, s8, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v4 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v4, v[9:10], off
.LBB3_12:
	s_or_b32 exec_lo, exec_lo, s3
	v_lshl_add_u32 v9, s5, 2, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB3_14
; %bb.13:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v5, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s7, v9
	v_add_co_ci_u32_e64 v10, s0, s8, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v5 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v5, v[9:10], off
.LBB3_14:
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[9:10], null, s5, 5, v[0:1]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB3_16
; %bb.15:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v6, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s7, v9
	v_add_co_ci_u32_e64 v10, s0, s8, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v6 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v6, v[9:10], off
.LBB3_16:
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[9:10], null, s5, 6, v[0:1]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB3_18
; %bb.17:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v7, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s7, v9
	v_add_co_ci_u32_e64 v10, s0, s8, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v7, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v7, v[9:10], off
.LBB3_18:
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[9:10], null, s5, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s1, v9
.LBB3_19:                               ; %Flow122
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s3
	s_cbranch_execz .LBB3_21
; %bb.20:                               ; %_ZN7rocprim6detail11gmem_to_regILj8EjPjEEvRAT__T0_T1_S6_jjb.exit.sink.split.i.i
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v11, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v12, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[8:9], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s0, s7, v8
	v_add_co_ci_u32_e64 v9, s0, s8, v9, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v8, v8, v11 :: v_dual_cndmask_b32 v9, v9, v12
	global_load_b32 v8, v[8:9], off
.LBB3_21:                               ; %_ZN7rocprim6detail11gmem_to_regILj8EjPjEEvRAT__T0_T1_S6_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s1
	v_cndmask_b32_e64 v11, 0, 1, s20
	s_add_u32 s3, s12, s2
	s_addc_u32 s7, s13, 0
	s_add_u32 s4, s12, s4
	s_addc_u32 s9, s13, 0
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_waitcnt vmcnt(5)
	ds_store_2addr_stride64_b32 v17, v1, v2 offset1:2
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v17, v3, v4 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v17, v5, v6 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v17, v7, v8 offset0:12 offset1:14
	s_cbranch_vccnz .LBB3_23
; %bb.22:                               ; %.preheader36.i89.i.i
	v_subrev_nc_u32_e32 v9, s17, v0
	v_add_co_u32 v10, s0, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v12, null, s7, 0, s0
	v_add_co_u32 v9, s0, s4, v9
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_add_nc_u32_e32 v13, s5, v0
	v_add_co_ci_u32_e64 v14, null, s9, 0, s0
	v_lshl_add_u32 v22, s5, 1, v0
	v_lshl_add_u32 v26, s5, 2, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v15, s17, v13
	v_add_co_u32 v16, s0, s3, v13
	v_add_co_ci_u32_e64 v18, null, s7, 0, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v15, s0, s4, v15
	v_add_co_ci_u32_e64 v19, null, s9, 0, s0
	v_cmp_gt_u32_e64 s0, s17, v13
	v_dual_cndmask_b32 v13, v14, v12 :: v_dual_cndmask_b32 v12, v9, v10
	v_mad_u64_u32 v[9:10], null, s5, 3, v[0:1]
	v_subrev_nc_u32_e32 v14, s17, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v21, v19, v18, s0
	v_cndmask_b32_e64 v20, v15, v16, s0
	v_add_co_u32 v10, s0, s3, v22
	v_add_co_ci_u32_e64 v15, null, s7, 0, s0
	v_subrev_nc_u32_e32 v18, s17, v9
	v_add_co_u32 v14, s0, s4, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v16, null, s9, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s17, v22
	v_add_co_u32 v19, s0, s3, v9
	v_add_co_ci_u32_e64 v24, null, s7, 0, s0
	v_add_co_u32 v18, s0, s4, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v25, null, s9, 0, s0
	v_cmp_gt_u32_e64 s0, s17, v9
	v_dual_cndmask_b32 v23, v16, v15 :: v_dual_cndmask_b32 v22, v14, v10
	v_mad_u64_u32 v[9:10], null, s5, 5, v[0:1]
	v_cndmask_b32_e64 v14, v18, v19, s0
	v_subrev_nc_u32_e32 v16, s17, v26
	v_mad_u64_u32 v[18:19], null, s5, 6, v[0:1]
	v_cndmask_b32_e64 v15, v25, v24, s0
	v_add_co_u32 v28, s0, s3, v26
	v_subrev_nc_u32_e32 v10, s17, v9
	v_mad_u64_u32 v[24:25], null, s5, 7, v[0:1]
	v_add_co_ci_u32_e64 v27, null, s7, 0, s0
	v_add_co_u32 v16, s0, s4, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v29, null, s9, 0, s0
	v_add_co_u32 v30, s0, s3, v9
	v_subrev_nc_u32_e32 v32, s17, v18
	v_add_co_ci_u32_e64 v19, null, s7, 0, s0
	v_add_co_u32 v31, s0, s4, v10
	v_add_co_ci_u32_e64 v10, null, s9, 0, s0
	v_add_co_u32 v33, s0, s3, v18
	v_subrev_nc_u32_e32 v25, s17, v24
	v_add_co_ci_u32_e64 v34, null, s7, 0, s0
	v_add_co_u32 v32, s0, s4, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v35, null, s9, 0, s0
	v_add_co_u32 v36, s0, s3, v24
	v_add_co_ci_u32_e64 v37, null, s7, 0, s0
	v_add_co_u32 v38, s0, s4, v25
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v39, null, s9, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_cmp_gt_u32_e64 s0, s17, v24
	v_cmp_gt_u32_e64 s1, s17, v18
	v_cmp_gt_u32_e64 s2, s17, v26
	s_add_i32 s8, s6, s17
	v_cndmask_b32_e32 v25, v10, v19, vcc_lo
	v_cndmask_b32_e64 v10, v39, v37, s0
	v_cndmask_b32_e64 v9, v38, v36, s0
	v_cndmask_b32_e64 v19, v35, v34, s1
	v_cndmask_b32_e64 v18, v32, v33, s1
	v_cndmask_b32_e32 v24, v31, v30, vcc_lo
	v_cndmask_b32_e64 v27, v29, v27, s2
	v_cndmask_b32_e64 v26, v16, v28, s2
	global_load_u8 v10, v[9:10], off
	global_load_u8 v19, v[18:19], off
	global_load_u8 v18, v[24:25], off
	global_load_u8 v15, v[14:15], off
	global_load_u8 v12, v[12:13], off
	global_load_u8 v16, v[26:27], off
	global_load_u8 v14, v[22:23], off
	global_load_u8 v13, v[20:21], off
	s_mov_b32 s0, 0
	s_branch .LBB3_24
.LBB3_23:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr14
                                        ; implicit-def: $vgpr15
                                        ; implicit-def: $vgpr16
                                        ; implicit-def: $vgpr18
                                        ; implicit-def: $vgpr19
                                        ; implicit-def: $vgpr10
                                        ; implicit-def: $sgpr8
.LBB3_24:                               ; %Flow119
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_42
; %bb.25:                               ; %.preheader.i98.i.i
	s_add_i32 s8, s6, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr12
	v_cmpx_gt_u32_e64 s8, v0
	s_cbranch_execz .LBB3_27
; %bb.26:
	v_subrev_nc_u32_e32 v9, s17, v0
	s_waitcnt vmcnt(3)
	v_add_co_u32 v12, s1, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v10, null, s7, 0, s1
	v_add_co_u32 v9, s1, s4, v9
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e64 v13, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v9, v9, v12, vcc_lo
	v_cndmask_b32_e32 v10, v13, v10, vcc_lo
	global_load_u8 v12, v[9:10], off
.LBB3_27:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, s5, v0
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr13
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v9
	s_cbranch_execz .LBB3_29
; %bb.28:
	s_waitcnt vmcnt(7)
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(0)
	v_add_co_u32 v13, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v14, null, s7, 0, s1
	v_add_co_u32 v15, s1, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v14 :: v_dual_cndmask_b32 v9, v15, v13
	global_load_u8 v13, v[9:10], off
.LBB3_29:
	s_or_b32 exec_lo, exec_lo, s0
	v_lshl_add_u32 v9, s5, 1, v0
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr14
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v9
	s_cbranch_execz .LBB3_31
; %bb.30:
	s_waitcnt vmcnt(7)
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(1)
	v_add_co_u32 v14, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v15, null, s7, 0, s1
	v_add_co_u32 v16, s1, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v15 :: v_dual_cndmask_b32 v9, v16, v14
	global_load_u8 v14, v[9:10], off
.LBB3_31:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(7)
	v_mad_u64_u32 v[9:10], null, s5, 3, v[0:1]
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr15
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v9
	s_cbranch_execz .LBB3_33
; %bb.32:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(4)
	v_add_co_u32 v15, s1, s3, v9
	s_waitcnt vmcnt(2)
	v_add_co_ci_u32_e64 v16, null, s7, 0, s1
	v_add_co_u32 v18, s1, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v10, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_cndmask_b32_e32 v9, v18, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v10, v10, v16, vcc_lo
	global_load_u8 v15, v[9:10], off
.LBB3_33:
	s_or_b32 exec_lo, exec_lo, s0
	v_lshl_add_u32 v9, s5, 2, v0
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr16
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v9
	s_cbranch_execz .LBB3_35
; %bb.34:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(2)
	v_add_co_u32 v16, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v18, null, s7, 0, s1
	v_add_co_u32 v19, s1, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v18 :: v_dual_cndmask_b32 v9, v19, v16
	global_load_u8 v16, v[9:10], off
.LBB3_35:
	s_or_b32 exec_lo, exec_lo, s0
	v_mad_u64_u32 v[9:10], null, s5, 5, v[0:1]
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr18
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v9
	s_cbranch_execz .LBB3_37
; %bb.36:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(5)
	v_add_co_u32 v18, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v19, null, s7, 0, s1
	v_add_co_u32 v20, s1, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v19 :: v_dual_cndmask_b32 v9, v20, v18
	global_load_u8 v18, v[9:10], off
.LBB3_37:
	s_or_b32 exec_lo, exec_lo, s0
	v_mad_u64_u32 v[9:10], null, s5, 6, v[0:1]
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr19
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v9
	s_cbranch_execz .LBB3_39
; %bb.38:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(6)
	v_add_co_u32 v19, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v20, null, s7, 0, s1
	v_add_co_u32 v21, s1, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v20 :: v_dual_cndmask_b32 v9, v21, v19
	global_load_u8 v19, v[9:10], off
.LBB3_39:
	s_or_b32 exec_lo, exec_lo, s0
	v_mad_u64_u32 v[9:10], null, s5, 7, v[0:1]
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr10
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v9
	s_cbranch_execz .LBB3_41
; %bb.40:
	v_subrev_nc_u32_e32 v10, s17, v9
	v_add_co_u32 v20, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v21, null, s7, 0, s1
	v_add_co_u32 v22, s1, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v10, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_cndmask_b32_e32 v9, v22, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v10, v10, v21, vcc_lo
	global_load_u8 v10, v[9:10], off
.LBB3_41:                               ; %Flow118
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_42:                               ; %_ZN7rocprim6detail11gmem_to_regILj8EhPhEEvRAT__T0_T1_S6_jjb.exit.i.i
	v_lshlrev_b32_e32 v9, 3, v0
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_min_u32_e32 v20, s8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e64 v21, v20, s6 clamp
	v_min_u32_e32 v22, s17, v20
	v_cmpx_lt_u32_e64 v21, v22
	s_cbranch_execz .LBB3_46
; %bb.43:                               ; %.lr.ph.i.preheader.i.i
	v_lshlrev_b32_e32 v23, 2, v20
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v23, s17, 2, v23
.LBB3_44:                               ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v24, v22, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v24, 1, v24
	v_not_b32_e32 v25, v24
	v_add_nc_u32_e32 v27, 1, v24
	v_lshlrev_b32_e32 v26, 2, v24
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v25, v25, 2, v23
	ds_load_b32 v26, v26
	ds_load_b32 v25, v25
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v26, v25
	v_dual_cndmask_b32 v21, v27, v21 :: v_dual_cndmask_b32 v22, v22, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v21, v22
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB3_44
; %bb.45:                               ; %Flow116
	s_or_b32 exec_lo, exec_lo, s1
.LBB3_46:                               ; %Flow117
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s0
	v_sub_nc_u32_e32 v20, v20, v21
	v_cmp_ge_u32_e32 vcc_lo, s17, v21
                                        ; implicit-def: $vgpr29
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $vgpr26
                                        ; implicit-def: $vgpr23
                                        ; implicit-def: $vgpr22
                                        ; implicit-def: $vgpr25
                                        ; implicit-def: $vgpr24
	v_add_nc_u32_e32 v28, s17, v20
                                        ; implicit-def: $vgpr20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_u32_e64 s0, s8, v28
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_52
; %bb.47:                               ; %._crit_edge.i.i.i.i
	v_cmp_gt_u32_e32 vcc_lo, s17, v21
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB3_49
; %bb.48:
	v_lshlrev_b32_e32 v1, 2, v21
	ds_load_b32 v1, v1
.LBB3_49:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_le_u32_e64 s0, s8, v28
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_gt_u32_e64 s8, v28
	s_cbranch_execz .LBB3_51
; %bb.50:
	v_lshlrev_b32_e32 v2, 2, v28
	ds_load_b32 v2, v2
.LBB3_51:                               ; %.loopexit.loopexit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	v_cmp_le_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_or_b32 vcc_lo, s0, s1
	v_dual_mov_b32 v3, s17 :: v_dual_cndmask_b32 v24, v28, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, s8, v3 :: v_dual_add_nc_u32 v5, 1, v24
	v_add_nc_u32_e32 v4, -1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v4, v5, v4
	v_lshlrev_b32_e32 v4, 2, v4
	ds_load_b32 v4, v4
	v_cndmask_b32_e32 v6, v21, v5, vcc_lo
	v_cndmask_b32_e32 v5, v5, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e64 s2, s8, v5
	s_waitcnt lgkmcnt(0)
	v_dual_cndmask_b32 v7, v4, v2 :: v_dual_cndmask_b32 v4, v1, v4
	v_cmp_gt_u32_e64 s0, s17, v6
	v_cndmask_b32_e32 v1, v2, v1, vcc_lo
	v_cmp_le_u32_e64 s1, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_or_b32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v25, v5, v6, s0
	v_cndmask_b32_e64 v8, s8, v3, s0
	v_add_nc_u32_e32 v20, 1, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, -1, v8
	v_cndmask_b32_e64 v6, v6, v20, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v8, v20, v8
	v_cndmask_b32_e64 v5, v20, v5, s0
	v_cmp_gt_u32_e64 s1, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v8, 2, v8
	v_cmp_le_u32_e64 s3, s8, v5
	ds_load_b32 v8, v8
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v21, v8, v7, s0
	v_cndmask_b32_e64 v8, v4, v8, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s2, v8, v21
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s3, s1
	v_cndmask_b32_e64 v22, v5, v6, s1
	v_cndmask_b32_e64 v20, s8, v3, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v23, 1, v22
	v_add_nc_u32_e32 v20, -1, v20
	v_cndmask_b32_e64 v2, v7, v4, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v6, v6, v23, s1
	v_min_u32_e32 v20, v23, v20
	v_cndmask_b32_e64 v5, v23, v5, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s2, s17, v6
	v_lshlrev_b32_e32 v20, 2, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s4, s8, v5
	ds_load_b32 v20, v20
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v28, v20, v21, s1
	v_cndmask_b32_e64 v29, v8, v20, s1
	v_cmp_le_u32_e64 s3, v29, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_or_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v23, v5, v6, s2
	v_cndmask_b32_e64 v20, s8, v3, s2
	v_cndmask_b32_e64 v4, v28, v29, s2
	v_add_nc_u32_e32 v26, 1, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v20, -1, v20
	v_cndmask_b32_e64 v6, v6, v26, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v20, v26, v20
	v_cndmask_b32_e64 v5, v26, v5, s2
	v_cmp_gt_u32_e64 s3, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v20, 2, v20
	v_cmp_le_u32_e64 s5, s8, v5
	ds_load_b32 v20, v20
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v30, v20, v28, s2
	v_cndmask_b32_e64 v31, v29, v20, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s4, v31, v30
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s5, s3
	v_cndmask_b32_e64 v20, v5, v6, s3
	v_cndmask_b32_e64 v26, s8, v3, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v27, 1, v20
	v_add_nc_u32_e32 v26, -1, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v27, s3
	v_min_u32_e32 v26, v27, v26
	v_cndmask_b32_e64 v5, v27, v5, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s4, s17, v6
	v_lshlrev_b32_e32 v26, 2, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s6, s8, v5
	ds_load_b32 v26, v26
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v32, v26, v30, s3
	v_cndmask_b32_e64 v33, v31, v26, s3
	v_cmp_le_u32_e64 s5, v33, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, s5
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v26, v5, v6, s4
	v_cndmask_b32_e64 v27, s8, v3, s4
	v_add_nc_u32_e32 v34, 1, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v27, -1, v27
	v_cndmask_b32_e64 v6, v6, v34, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v27, v34, v27
	v_cndmask_b32_e64 v5, v34, v5, s4
	v_cmp_gt_u32_e64 s5, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v27, 2, v27
	v_cmp_le_u32_e64 s7, s8, v5
	ds_load_b32 v27, v27
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v35, v27, v32, s4
	v_cndmask_b32_e64 v36, v33, v27, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s6, v36, v35
	s_and_b32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s7, s5
	v_cndmask_b32_e64 v27, v5, v6, s5
	v_cndmask_b32_e64 v3, s8, v3, s5
	v_cndmask_b32_e64 v7, v35, v36, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v34, 1, v27
	v_add_nc_u32_e32 v3, -1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, v6, v34, s5
	v_min_u32_e32 v3, v34, v3
	v_cndmask_b32_e64 v34, v34, v5, s5
	v_cndmask_b32_e64 v5, v30, v31, s3
	v_cndmask_b32_e64 v6, v32, v33, s4
	v_cmp_gt_u32_e32 vcc_lo, s17, v37
	v_lshlrev_b32_e32 v3, 2, v3
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v38, v3, v35, s5
	v_cndmask_b32_e64 v39, v36, v3, s5
	v_cndmask_b32_e64 v3, v21, v8, s1
	v_cmp_le_u32_e64 s1, s8, v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s0, v39, v38
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 vcc_lo, s1, s0
	v_cndmask_b32_e32 v8, v38, v39, vcc_lo
	v_cndmask_b32_e32 v29, v34, v37, vcc_lo
.LBB3_52:                               ; %Flow114
	s_or_b32 exec_lo, exec_lo, s9
	s_barrier
	buffer_gl0_inv
	ds_store_b8 v0, v12
	ds_store_b8 v0, v13 offset:128
	ds_store_b8 v0, v14 offset:256
	ds_store_b8 v0, v15 offset:384
	ds_store_b8 v0, v16 offset:512
	ds_store_b8 v0, v18 offset:640
	ds_store_b8 v0, v19 offset:768
	ds_store_b8 v0, v10 offset:896
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u8 v19, v29
	ds_load_u8 v18, v27
	ds_load_u8 v21, v26
	ds_load_u8 v20, v20
	ds_load_u8 v23, v23
	ds_load_u8 v22, v22
	ds_load_u8 v25, v25
	ds_load_u8 v24, v24
	v_lshrrev_b32_e32 v10, 2, v0
	v_cmp_ne_u32_e32 vcc_lo, 1, v11
	s_mov_b32 s17, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	v_add_nc_u32_e32 v26, v10, v9
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	buffer_gl0_inv
	s_barrier
	v_lshlrev_b32_e32 v27, 2, v26
	buffer_gl0_inv
	s_cbranch_vccnz .LBB3_62
; %bb.53:                               ; %.preheader166.i.i.preheader
	v_mov_b32_e32 v9, v27
	s_mov_b64 s[0:1], 0
.LBB3_54:                               ; %.preheader166.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v10, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v9, v10
	v_add_nc_u32_e32 v9, 4, v9
	s_cbranch_scc0 .LBB3_54
; %bb.55:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v28, v0, v9
	v_dual_mov_b32 v16, v8 :: v_dual_mov_b32 v13, v5
	v_dual_mov_b32 v15, v7 :: v_dual_mov_b32 v12, v4
	v_mov_b32_e32 v11, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mov_b32 v14, v6 :: v_dual_lshlrev_b32 v29, 2, v28
	v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v9, v1
.LBB3_56:                               ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v30, v29
	v_add_nc_u32_e32 v29, 0x210, v29
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v9, v30
	s_cbranch_scc1 .LBB3_56
; %bb.57:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	v_and_b32_e32 v29, 0xff, v24
	v_lshlrev_b16 v30, 8, v25
	v_and_b32_e32 v31, 0xff, v22
	v_lshlrev_b16 v32, 8, v23
	v_and_b32_e32 v33, 0xff, v20
	v_lshlrev_b16 v34, 8, v21
	v_and_b32_e32 v35, 0xff, v18
	v_lshlrev_b16 v36, 8, v19
	v_or_b32_e32 v29, v29, v30
	v_or_b32_e32 v30, v31, v32
	v_or_b32_e32 v31, v33, v34
	s_lshl_b64 s[0:1], s[16:17], 2
	v_or_b32_e32 v32, v35, v36
	v_and_b32_e32 v29, 0xffff, v29
	v_lshlrev_b32_e32 v30, 16, v30
	v_and_b32_e32 v31, 0xffff, v31
	s_add_u32 s0, s10, s0
	v_lshlrev_b32_e32 v32, 16, v32
	s_addc_u32 s1, s11, s1
	s_clause 0x7
	global_store_b32 v17, v9, s[0:1]
	global_store_b32 v17, v10, s[0:1] offset:512
	global_store_b32 v17, v11, s[0:1] offset:1024
	global_store_b32 v17, v12, s[0:1] offset:1536
	global_store_b32 v17, v13, s[0:1] offset:2048
	global_store_b32 v17, v14, s[0:1] offset:2560
	global_store_b32 v17, v15, s[0:1] offset:3072
	global_store_b32 v17, v16, s[0:1] offset:3584
	v_mov_b32_e32 v11, v26
	v_or_b32_e32 v9, v29, v30
	v_or_b32_e32 v10, v31, v32
	s_mov_b64 s[0:1], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB3_58:                               ; =>This Inner Loop Header: Depth=1
	s_lshl_b32 s2, s0, 3
	s_add_u32 s0, s0, 1
	v_lshrrev_b64 v[12:13], s2, v[9:10]
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b8 v11, v12
	v_add_nc_u32_e32 v11, 1, v11
	s_cbranch_scc0 .LBB3_58
; %bb.59:
	v_dual_mov_b32 v34, v24 :: v_dual_mov_b32 v33, v22
	v_dual_mov_b32 v36, v25 :: v_dual_mov_b32 v35, v23
	v_dual_mov_b32 v29, v20 :: v_dual_mov_b32 v32, v21
	v_mov_b32_e32 v12, v18
	v_mov_b32_e32 v30, v19
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB3_60:                               ; =>This Inner Loop Header: Depth=1
	ds_load_u8 v14, v28
	v_and_b32_e32 v9, 0xff, v34
	v_lshlrev_b16 v10, 8, v36
	v_and_b32_e32 v11, 0xff, v33
	v_lshlrev_b16 v13, 8, v35
	v_and_b32_e32 v15, 0xff, v29
	v_lshlrev_b16 v16, 8, v32
	v_and_b32_e32 v12, 0xff, v12
	v_lshlrev_b16 v29, 8, v30
	v_or_b32_e32 v9, v9, v10
	v_or_b32_e32 v10, v11, v13
	v_or_b32_e32 v11, v15, v16
	s_lshl_b32 s2, s0, 3
	v_or_b32_e32 v12, v12, v29
	v_and_b32_e32 v9, 0xffff, v9
	v_lshlrev_b32_e32 v10, 16, v10
	v_and_b32_e32 v11, 0xffff, v11
	s_lshl_b64 s[2:3], 0xff, s2
	v_lshlrev_b32_e32 v12, 16, v12
	v_add_nc_u32_e32 v28, 0x84, v28
	v_or_b32_e32 v9, v9, v10
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	v_or_b32_e32 v10, v11, v12
	s_waitcnt lgkmcnt(0)
	v_perm_b32 v11, v14, v14, 0x4040404
	s_cmp_lg_u32 s0, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_bfi_b32 v10, s3, v11, v10
	v_bfi_b32 v9, s2, v11, v9
	v_lshrrev_b32_e32 v14, 16, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_lshrrev_b64 v[11:12], 24, v[9:10]
	v_lshrrev_b32_e32 v16, 16, v9
	v_lshrrev_b32_e32 v13, 24, v10
	v_lshrrev_b32_e32 v15, 8, v10
	v_lshrrev_b32_e32 v31, 8, v9
	v_and_b32_e32 v30, 0xff, v14
	v_and_b32_e32 v29, 0xff, v16
	v_lshlrev_b16 v12, 8, v13
	v_lshlrev_b16 v32, 8, v11
	v_lshlrev_b16 v34, 8, v31
	v_lshlrev_b16 v35, 8, v15
	v_and_b32_e32 v38, 0xff, v10
	v_or_b32_e32 v12, v30, v12
	v_or_b32_e32 v33, v29, v32
	v_and_b32_e32 v30, 0xffff, v34
	v_and_b32_e32 v32, 0xffff, v35
	v_and_b32_e32 v29, 0xff, v9
	v_lshlrev_b32_e32 v36, 16, v12
	v_lshlrev_b32_e32 v37, 16, v33
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v34, v29, v34
	v_or_b32_e32 v32, v32, v36
	s_delay_alu instid0(VALU_DEP_3)
	v_or_b32_e32 v39, v30, v37
	v_or_b32_e32 v29, v38, v35
	v_lshrrev_b32_e32 v30, 24, v36
	v_lshrrev_b32_e32 v35, 24, v37
	v_lshrrev_b32_e32 v32, 8, v32
	v_lshrrev_b32_e32 v36, 8, v39
	s_cbranch_scc1 .LBB3_60
; %bb.61:                               ; %_ZN7rocprim11block_storeIhLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIhEEEEvT_RA8_hRNS_14block_exchangeIhLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_add_u32 s0, s14, s16
	s_addc_u32 s1, s15, 0
	v_add_co_u32 v28, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v29, null, s1, 0, s0
	s_mov_b32 s0, 0
	s_mov_b32 s8, -1
	s_clause 0x6
	global_store_b8 v[28:29], v9, off
	global_store_b8 v[28:29], v31, off offset:128
	global_store_b8 v[28:29], v16, off offset:256
	global_store_b8 v[28:29], v11, off offset:384
	global_store_b8 v[28:29], v10, off offset:512
	global_store_b8 v[28:29], v15, off offset:640
	global_store_b8 v[28:29], v14, off offset:768
	s_branch .LBB3_63
.LBB3_62:
	s_mov_b32 s0, -1
	s_mov_b32 s8, s17
                                        ; implicit-def: $vgpr13
.LBB3_63:                               ; %Flow
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB3_103
; %bb.64:                               ; %.preheader.i.i.preheader
	s_mov_b64 s[0:1], 0
.LBB3_65:                               ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v9, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v27, v9
	v_add_nc_u32_e32 v27, 4, v27
	s_cbranch_scc0 .LBB3_65
; %bb.66:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v11, v0, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v9, 2, v11
.LBB3_67:                               ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v10, v9
	v_add_nc_u32_e32 v9, 0x210, v9
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v1, v10
	s_cbranch_scc1 .LBB3_67
; %bb.68:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[0:1], s[16:17], 2
	s_sub_i32 s6, s18, s16
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	v_add_co_u32 v9, s0, s0, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, null, s1, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s6, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB3_70
; %bb.69:
	global_store_b32 v[9:10], v1, off
.LBB3_70:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v1, 0x80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s6, v1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_72
; %bb.71:
	global_store_b32 v[9:10], v2, off offset:512
.LBB3_72:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v1, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s6, v1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB3_74
; %bb.73:
	global_store_b32 v[9:10], v3, off offset:1024
.LBB3_74:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v1, 0x180, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s6, v1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB3_76
; %bb.75:
	global_store_b32 v[9:10], v4, off offset:1536
.LBB3_76:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v1, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s6, v1
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB3_78
; %bb.77:
	global_store_b32 v[9:10], v5, off offset:2048
.LBB3_78:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v1, 0x280, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s6, v1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB3_80
; %bb.79:
	global_store_b32 v[9:10], v6, off offset:2560
.LBB3_80:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v1, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s6, v1
	s_and_saveexec_b32 s7, s5
	s_cbranch_execz .LBB3_82
; %bb.81:
	global_store_b32 v[9:10], v7, off offset:3072
.LBB3_82:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v1, 0x380, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s6, v1
	s_and_saveexec_b32 s6, s8
	s_cbranch_execz .LBB3_84
; %bb.83:
	global_store_b32 v[9:10], v8, off offset:3584
.LBB3_84:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jjRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s6
	v_and_b32_e32 v1, 0xff, v24
	v_lshlrev_b16 v2, 8, v25
	v_and_b32_e32 v3, 0xff, v22
	v_lshlrev_b16 v4, 8, v23
	v_and_b32_e32 v5, 0xff, v20
	v_lshlrev_b16 v6, 8, v21
	v_and_b32_e32 v7, 0xff, v18
	v_lshlrev_b16 v8, 8, v19
	v_or_b32_e32 v1, v1, v2
	v_or_b32_e32 v2, v3, v4
	v_or_b32_e32 v3, v5, v6
	s_mov_b64 s[6:7], 0
	v_or_b32_e32 v4, v7, v8
	v_and_b32_e32 v1, 0xffff, v1
	v_lshlrev_b32_e32 v2, 16, v2
	v_and_b32_e32 v3, 0xffff, v3
	s_waitcnt_vscnt null, 0x0
	v_lshlrev_b32_e32 v4, 16, v4
	s_barrier
	v_or_b32_e32 v1, v1, v2
	buffer_gl0_inv
	v_or_b32_e32 v2, v3, v4
.LBB3_85:                               ; =>This Inner Loop Header: Depth=1
	s_lshl_b32 s9, s6, 3
	s_add_u32 s6, s6, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b64 v[3:4], s9, v[1:2]
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s6, 8
	ds_store_b8 v26, v3
	v_add_nc_u32_e32 v26, 1, v26
	s_cbranch_scc0 .LBB3_85
; %bb.86:
	s_mov_b64 s[6:7], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB3_87:                               ; =>This Inner Loop Header: Depth=1
	ds_load_u8 v5, v11
	v_and_b32_e32 v1, 0xff, v24
	v_lshlrev_b16 v2, 8, v25
	v_and_b32_e32 v3, 0xff, v22
	v_lshlrev_b16 v4, 8, v23
	v_and_b32_e32 v6, 0xff, v20
	v_lshlrev_b16 v7, 8, v21
	v_and_b32_e32 v8, 0xff, v18
	v_lshlrev_b16 v9, 8, v19
	v_or_b32_e32 v1, v1, v2
	v_or_b32_e32 v2, v3, v4
	v_or_b32_e32 v3, v6, v7
	s_lshl_b32 s9, s6, 3
	v_or_b32_e32 v4, v8, v9
	v_and_b32_e32 v1, 0xffff, v1
	v_lshlrev_b32_e32 v2, 16, v2
	v_and_b32_e32 v3, 0xffff, v3
	s_lshl_b64 s[10:11], 0xff, s9
	v_lshlrev_b32_e32 v4, 16, v4
	v_add_nc_u32_e32 v11, 0x84, v11
	v_or_b32_e32 v1, v1, v2
	s_add_u32 s6, s6, 1
	s_addc_u32 s7, s7, 0
	v_or_b32_e32 v2, v3, v4
	s_waitcnt lgkmcnt(0)
	v_perm_b32 v3, v5, v5, 0x4040404
	s_cmp_lg_u32 s6, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_bfi_b32 v2, s11, v3, v2
	v_bfi_b32 v1, s10, v3, v1
	v_lshrrev_b32_e32 v6, 16, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_lshrrev_b64 v[3:4], 24, v[1:2]
	v_lshrrev_b32_e32 v8, 16, v1
	v_lshrrev_b32_e32 v13, 24, v2
	v_lshrrev_b32_e32 v7, 8, v2
	v_lshrrev_b32_e32 v9, 8, v1
	v_and_b32_e32 v10, 0xff, v6
	v_and_b32_e32 v4, 0xff, v8
	v_lshlrev_b16 v5, 8, v13
	v_lshlrev_b16 v12, 8, v3
	v_lshlrev_b16 v14, 8, v9
	v_lshlrev_b16 v15, 8, v7
	v_and_b32_e32 v17, 0xff, v2
	v_or_b32_e32 v18, v10, v5
	v_or_b32_e32 v22, v4, v12
	v_and_b32_e32 v4, 0xff, v1
	v_and_b32_e32 v5, 0xffff, v14
	v_and_b32_e32 v10, 0xffff, v15
	v_lshlrev_b32_e32 v12, 16, v18
	v_lshlrev_b32_e32 v16, 16, v22
	v_or_b32_e32 v24, v4, v14
	v_or_b32_e32 v20, v17, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_or_b32_e32 v4, v10, v12
	v_or_b32_e32 v5, v5, v16
	v_lshrrev_b32_e32 v19, 24, v12
	v_lshrrev_b32_e32 v23, 24, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshrrev_b32_e32 v21, 8, v4
	v_lshrrev_b32_e32 v25, 8, v5
	s_cbranch_scc1 .LBB3_87
; %bb.88:                               ; %_ZN7rocprim14block_exchangeIhLj128ELj8ELj1ELj1EE18blocked_to_stripedIhEEvRA8_KhRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_add_u32 s6, s14, s16
	s_addc_u32 s7, s15, 0
	v_add_co_u32 v4, s6, s6, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, null, s7, 0, s6
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB3_90
; %bb.89:
	global_store_b8 v[4:5], v1, off
.LBB3_90:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_92
; %bb.91:
	global_store_b8 v[4:5], v9, off offset:128
.LBB3_92:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_94
; %bb.93:
	global_store_b8 v[4:5], v8, off offset:256
.LBB3_94:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB3_96
; %bb.95:
	global_store_b8 v[4:5], v3, off offset:384
.LBB3_96:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB3_98
; %bb.97:
	global_store_b8 v[4:5], v2, off offset:512
.LBB3_98:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB3_100
; %bb.99:
	global_store_b8 v[4:5], v7, off offset:640
.LBB3_100:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB3_102
; %bb.101:
	global_store_b8 v[4:5], v6, off offset:768
.LBB3_102:
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_103:                              ; %Flow112
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB3_105
; %bb.104:                              ; %_ZN7rocprim11block_storeIhLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIhEEEEvT_RA8_hjRNS_14block_exchangeIhLj128ELj8ELj1ELj1EE13storage_type_E.exit.sink.split.i.i.i
	s_add_u32 s0, s14, s16
	s_addc_u32 s1, s15, 0
	v_add_co_u32 v0, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s1, 0, s0
	global_store_b8 v[0:1], v13, off offset:896
.LBB3_105:                              ; %_ZN7rocprim6detail28block_merge_mergepath_kernelILj128ELj8EPjN6thrust10device_ptrIjEEPhNS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_PKSF_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 40
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
.Lfunc_end3:
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end3-_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 7116
; NumSgprs: 30
; NumVgprs: 40
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 40
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.protected	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ ; -- Begin function _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.globl	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	8
	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: ; @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x20
	s_lshl_b32 s12, s15, 7
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s4, s2, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s4, v0
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB4_28
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_lshr_b32 s0, s2, 7
	s_mov_b32 s13, 0
	s_cmp_lg_u32 s15, s0
	v_lshlrev_b32_e32 v1, 2, v0
	s_cselect_b32 s1, -1, 0
	s_lshl_b64 s[16:17], s[12:13], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s4, s16
	s_addc_u32 s17, s5, s17
	s_add_u32 s8, s8, s12
	s_addc_u32 s9, s9, 0
	s_lshr_b32 s0, s3, 7
	global_load_u8 v3, v0, s[8:9]
	global_load_b32 v4, v1, s[16:17]
	s_sub_i32 s8, 0, s0
	v_add_nc_u32_e32 v0, s12, v0
	s_and_b32 s8, s15, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s8, s0
	s_lshl_b32 s9, s8, 7
	s_sub_i32 s8, 0, s3
	s_cmp_eq_u32 s0, 0
	s_cselect_b32 s0, -1, 0
	s_and_b32 s14, s0, exec_lo
	s_cselect_b32 s14, s3, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s14, s14, s9
	s_cmp_lt_u32 s14, s2
	s_cbranch_scc1 .LBB4_4
; %bb.2:
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB4_5
; %bb.3:                                ; %.critedge68.i
	v_mov_b32_e32 v1, 0
	s_mov_b32 s13, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, s8, s10, v0
	v_add_co_ci_u32_e64 v2, null, s11, 0, s8
	s_mov_b32 s8, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
	s_branch .LBB4_6
.LBB4_4:
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr1_vgpr2
	s_branch .LBB4_11
.LBB4_5:
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB4_6:                                ; %Flow33
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB4_10
; %bb.7:
	s_mov_b32 s8, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB4_9
; %bb.8:
	v_mov_b32_e32 v1, 0
	s_or_b32 s13, s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_u32 v1, s12, s10, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_ci_u32_e64 v2, null, s11, 0, s12
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB4_9:                                ; %Flow35
	s_or_b32 exec_lo, exec_lo, s8
.LBB4_10:                               ; %Flow34
	s_mov_b32 s8, 0
.LBB4_11:                               ; %Flow32
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccz .LBB4_26
; %bb.12:
	s_min_u32 s8, s14, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s3, s8, s3
	s_min_u32 s12, s9, s8
	s_add_i32 s9, s9, s8
	s_min_u32 s2, s3, s2
	s_cmp_gt_u32 s3, s14
	v_subrev_nc_u32_e32 v0, s9, v0
	s_cselect_b32 s3, -1, 0
	s_and_b32 vcc_lo, exec_lo, s1
	v_cndmask_b32_e64 v1, 0, 1, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, s12, v0
	v_cmp_ne_u32_e64 s1, 1, v1
	s_cbranch_vccz .LBB4_18
; %bb.13:                               ; %.critedge72.i
	v_mov_b32_e32 v2, s8
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB4_17
; %bb.14:                               ; %.lr.ph.i84.i.preheader
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, s8
	s_mov_b32 s1, 0
.LBB4_15:                               ; %.lr.ph.i84.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v6
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v4, v7
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v7, v4
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v8, s0
	v_add_nc_u32_e32 v8, 1, v0
	v_and_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 1, v7
	v_cndmask_b32_e32 v6, v0, v6, vcc_lo
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v6
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB4_15
; %bb.16:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
.LBB4_17:                               ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEEPhNS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit90.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, s1, s10, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s11, 0, s1
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v4, off
	s_branch .LBB4_19
.LBB4_18:
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB4_19:                               ; %Flow30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB4_25
; %bb.20:
	v_mov_b32_e32 v2, s8
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB4_24
; %bb.21:                               ; %.lr.ph.i.i.preheader
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, s8
	s_mov_b32 s1, 0
.LBB4_22:                               ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v6
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v4, v7
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v7, v4
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v8, s0
	v_add_nc_u32_e32 v8, 1, v0
	v_and_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 1, v7
	v_cndmask_b32_e32 v6, v0, v6, vcc_lo
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v6
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB4_22
; %bb.23:                               ; %Flow28
	s_or_b32 exec_lo, exec_lo, s1
.LBB4_24:                               ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEEPhNS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_u32 v1, s0, s10, v0
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_ci_u32_e64 v2, null, s11, 0, s0
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB4_25:                               ; %Flow31
	s_mov_b32 s13, -1
.LBB4_26:                               ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s13
	s_cbranch_execz .LBB4_28
; %bb.27:                               ; %.critedge.sink.split.i
	s_waitcnt vmcnt(1)
	global_store_b8 v[1:2], v3, off
.LBB4_28:                               ; %_ZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEEPhNS4_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
.Lfunc_end4:
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end4-_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 968
; NumSgprs: 20
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.protected	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_ ; -- Begin function _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.globl	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.p2align	8
	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@function
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_: ; @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x8
	v_lshl_or_b32 v0, s15, 7, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB5_6
; %bb.1:
	s_load_b32 s3, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, 0x7ffffe
	s_sub_i32 s5, 0, s4
	s_add_i32 s4, s4, -1
	v_and_b32_e32 v1, s5, v0
	v_and_b32_e32 v5, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 10, v1
	v_add_nc_u32_e32 v2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v4, s2, v2
	v_min_u32_e32 v2, s2, v1
	v_add_nc_u32_e32 v3, s3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, s2, v3
	v_lshlrev_b32_e32 v3, 10, v5
	s_mov_b32 s2, exec_lo
	v_sub_nc_u32_e32 v5, v1, v2
	v_sub_nc_u32_e32 v6, v1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, v5, v3
	v_sub_nc_u32_e32 v3, v4, v2
	v_sub_nc_u32_e64 v6, v1, v6 clamp
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v7, v1, v3
	v_cmpx_lt_u32_e64 v6, v7
	s_cbranch_execz .LBB5_5
; %bb.2:                                ; %.lr.ph.i.preheader
	s_load_b64 s[4:5], s[0:1], 0x0
	v_mov_b32_e32 v5, 0
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v5
	v_lshlrev_b64 v[10:11], 2, v[4:5]
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v11, vcc_lo
.LBB5_3:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v4, 1, v4
	v_mov_b32_e32 v12, v5
	v_xad_u32 v11, v4, -1, v1
	v_lshlrev_b64 v[13:14], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v13, vcc_lo, v3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v8, v14, vcc_lo
	v_add_co_u32 v11, vcc_lo, v9, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, v10, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	v_add_nc_u32_e32 v12, 1, v4
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v13, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v7, v7, v4 :: v_dual_cndmask_b32 v6, v12, v6
	v_cmp_ge_u32_e32 vcc_lo, v6, v7
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB5_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s3
.LBB5_5:                                ; %Flow53
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v6, v2
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB5_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
.Lfunc_end5:
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, .Lfunc_end5-_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.protected	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ ; -- Begin function _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.globl	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	8
	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: ; @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
; %bb.0:
	s_clause 0x2
	s_load_b64 s[18:19], s[0:1], 0x20
	s_load_b64 s[4:5], s[0:1], 0x30
	s_load_b64 s[22:23], s[0:1], 0x44
	s_mov_b32 s3, 0
	s_mov_b32 s6, s15
	s_mov_b32 s7, s3
	s_mov_b32 s11, s3
	v_lshlrev_b32_e32 v17, 2, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s26, s18, 10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s15, s26
	s_cselect_b32 s20, -1, 0
	s_lshl_b64 s[8:9], s[6:7], 2
	s_add_u32 s8, s4, s8
	s_addc_u32 s9, s5, s9
	s_add_i32 s10, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[10:11], 2
	s_add_u32 s4, s4, s10
	s_addc_u32 s5, s5, s11
	s_clause 0x1
	s_load_b32 s2, s[8:9], 0x0
	s_load_b32 s7, s[4:5], 0x0
	s_lshr_b32 s4, s19, 9
	s_load_b256 s[8:15], s[0:1], 0x0
	s_and_b32 s0, s4, 0x7ffffe
	s_lshl_b32 s16, s6, 10
	s_sub_i32 s1, 0, s0
	s_add_i32 s0, s0, -1
	s_and_b32 s1, s6, s1
	s_and_b32 s5, s0, s6
	s_lshl_b32 s4, s1, 11
	s_lshl_b32 s1, s1, 10
	s_add_i32 s4, s4, s19
	s_sub_i32 s17, s16, s1
	s_sub_i32 s1, s4, s1
	s_add_i32 s4, s4, s17
	s_min_u32 s17, s18, s1
	s_add_i32 s1, s1, s19
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s19, s4, s2
	s_sub_i32 s21, s4, s7
	s_min_u32 s4, s18, s19
	s_addk_i32 s21, 0x400
	s_cmp_eq_u32 s0, s5
	s_mov_b32 s5, s3
	s_cselect_b32 s19, s1, s21
	s_cselect_b32 s7, s17, s7
	s_lshl_b64 s[0:1], s[2:3], 2
	s_min_u32 s21, s19, s18
	s_sub_i32 s17, s7, s2
	s_add_u32 s7, s8, s0
	s_addc_u32 s19, s9, s1
	s_lshl_b64 s[24:25], s[4:5], 2
	s_mov_b32 s0, -1
	s_add_u32 s8, s8, s24
	s_addc_u32 s9, s9, s25
	s_lshr_b32 s5, s22, 16
	s_and_b32 s22, s22, 0xffff
	s_and_b32 s1, s23, 0xffff
	s_mul_i32 s5, s22, s5
	s_cmp_eq_u32 s6, s26
	s_mul_i32 s5, s5, s1
	s_cbranch_scc1 .LBB6_2
; %bb.1:                                ; %.preheader38.i.i.i
	v_subrev_nc_u32_e32 v3, s17, v0
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v5, s5, v0
	v_add_co_u32 v7, s0, s7, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, null, s19, 0, s0
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v3, s17, v5
	v_lshl_add_u32 v9, s5, 1, v0
	s_mov_b32 s3, -1
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_mov_b32 v6, v4 :: v_dual_cndmask_b32 v1, v1, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_lshlrev_b64 v[10:11], 2, v[5:6]
	v_subrev_nc_u32_e32 v3, s17, v9
	global_load_b32 v1, v[1:2], off
	v_add_co_u32 v7, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	v_add_co_u32 v12, vcc_lo, s7, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s19, v11, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v5
	v_mov_b32_e32 v10, v4
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v7, v7, v12 :: v_dual_cndmask_b32 v8, v8, v11
	v_lshlrev_b64 v[10:11], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v2, v[7:8], off
	v_add_co_u32 v14, vcc_lo, s7, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s19, v11, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v9, v12, v14, vcc_lo
	v_cndmask_b32_e32 v10, v13, v10, vcc_lo
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[5:6], null, s5, 3, v[0:1]
	v_mov_b32_e32 v6, v4
	v_mad_u64_u32 v[13:14], null, s5, 5, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v3, s17, v5
	v_lshlrev_b64 v[11:12], 2, v[5:6]
	v_lshl_add_u32 v6, s5, 2, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_u32 v16, vcc_lo, s8, v7
	v_mov_b32_e32 v7, v4
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	v_add_co_u32 v18, vcc_lo, s7, v11
	v_add_co_ci_u32_e32 v15, vcc_lo, s19, v12, vcc_lo
	v_lshlrev_b64 v[11:12], 2, v[3:4]
	v_cmp_gt_u32_e32 vcc_lo, s17, v5
	v_subrev_nc_u32_e32 v3, s17, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v8, v15, vcc_lo
	v_lshlrev_b64 v[14:15], 2, v[6:7]
	v_add_co_u32 v5, s0, s8, v11
	v_add_co_ci_u32_e64 v19, s0, s9, v12, s0
	v_mad_u64_u32 v[11:12], null, s5, 6, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s0, s7, v14
	v_add_co_ci_u32_e64 v12, s0, s19, v15, s0
	v_mov_b32_e32 v14, v4
	v_cndmask_b32_e32 v7, v16, v18, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v6
	v_lshlrev_b64 v[15:16], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v11
	v_cndmask_b32_e32 v6, v19, v12, vcc_lo
	v_lshlrev_b64 v[18:19], 2, v[13:14]
	v_mov_b32_e32 v12, v4
	v_add_co_u32 v21, s0, s8, v15
	v_lshlrev_b64 v[14:15], 2, v[3:4]
	v_add_co_ci_u32_e64 v16, s0, s9, v16, s0
	v_add_co_u32 v18, s0, s7, v18
	v_lshlrev_b64 v[3:4], 2, v[11:12]
	v_add_co_ci_u32_e64 v19, s0, s19, v19, s0
	v_cmp_gt_u32_e64 s0, s17, v13
	v_add_co_u32 v13, s1, s8, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s1, s9, v15, s1
	v_add_co_u32 v3, s1, s7, v3
	v_add_co_ci_u32_e64 v4, s1, s19, v4, s1
	v_cmp_gt_u32_e64 s1, s17, v11
	v_cndmask_b32_e32 v5, v5, v20, vcc_lo
	v_cndmask_b32_e64 v12, v16, v19, s0
	v_cndmask_b32_e64 v11, v21, v18, s0
	s_mov_b32 s0, 0
	v_cndmask_b32_e64 v14, v14, v4, s1
	v_cndmask_b32_e64 v13, v13, v3, s1
	global_load_b32 v3, v[9:10], off
	global_load_b32 v4, v[7:8], off
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[11:12], off
	global_load_b32 v7, v[13:14], off
	v_mad_u64_u32 v[9:10], null, s5, 7, v[0:1]
	s_branch .LBB6_3
.LBB6_2:
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
.LBB6_3:                                ; %Flow120
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_sub_i32 s6, s21, s4
	s_cbranch_vccnz .LBB6_19
; %bb.4:                                ; %.preheader.i.i.i
	s_add_i32 s1, s6, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB6_6
; %bb.5:
	v_subrev_nc_u32_e32 v1, s17, v0
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, s3, s7, v17
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(3)
	v_add_co_ci_u32_e64 v4, null, s19, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v2, v2, v4
	global_load_b32 v1, v[1:2], off
.LBB6_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, s5, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB6_8
; %bb.7:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v2, vcc_lo, s7, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s19, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v2 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v2, v[9:10], off
.LBB6_8:
	s_or_b32 exec_lo, exec_lo, s3
	v_lshl_add_u32 v9, s5, 1, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB6_10
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, vcc_lo, s7, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s19, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v3, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v3, v[9:10], off
.LBB6_10:
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, s5, 3, v[0:1]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB6_12
; %bb.11:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v4, vcc_lo, s7, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s19, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v4 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v4, v[9:10], off
.LBB6_12:
	s_or_b32 exec_lo, exec_lo, s3
	v_lshl_add_u32 v9, s5, 2, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB6_14
; %bb.13:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v5, vcc_lo, s7, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s19, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v5 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v5, v[9:10], off
.LBB6_14:
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[9:10], null, s5, 5, v[0:1]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB6_16
; %bb.15:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v6, vcc_lo, s7, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s19, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v6 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v6, v[9:10], off
.LBB6_16:
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[9:10], null, s5, 6, v[0:1]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB6_18
; %bb.17:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v7, vcc_lo, s7, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s19, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v7, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v7, v[9:10], off
.LBB6_18:
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[9:10], null, s5, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s1, v9
.LBB6_19:                               ; %Flow121
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB6_21
; %bb.20:                               ; %.loopexit.sink.split.i.i.i
	v_mov_b32_e32 v12, 0
	v_subrev_nc_u32_e32 v11, s17, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v10, v12
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[9:10]
	v_add_co_u32 v8, vcc_lo, s8, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v12, vcc_lo
	v_add_co_u32 v11, vcc_lo, s7, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s19, v14, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v9, v10, v12 :: v_dual_cndmask_b32 v8, v8, v11
	global_load_b32 v8, v[8:9], off
.LBB6_21:                               ; %_ZN7rocprim6detail11gmem_to_regILj8EjN6thrust10device_ptrIjEEEEvRAT__T0_T1_S8_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s0
	v_cndmask_b32_e64 v11, 0, 1, s20
	s_add_u32 s3, s12, s2
	s_addc_u32 s7, s13, 0
	s_add_u32 s4, s12, s4
	s_mov_b32 s1, 0
	s_addc_u32 s8, s13, 0
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_waitcnt vmcnt(5)
	ds_store_2addr_stride64_b32 v17, v1, v2 offset1:2
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v17, v3, v4 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v17, v5, v6 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v17, v7, v8 offset0:12 offset1:14
	s_cbranch_vccnz .LBB6_23
; %bb.22:                               ; %.preheader38.i87.i.i
	v_subrev_nc_u32_e32 v9, s17, v0
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_lshl_add_u32 v18, s5, 1, v0
	v_lshl_add_u32 v26, s5, 2, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s4, v9
	v_add_co_ci_u32_e64 v10, null, s8, 0, s0
	v_add_co_u32 v14, s0, s3, v0
	v_add_nc_u32_e32 v12, s5, v0
	v_add_co_ci_u32_e64 v13, null, s7, 0, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v9, v9, v14, vcc_lo
	v_subrev_nc_u32_e32 v22, s17, v18
	v_subrev_nc_u32_e32 v15, s17, v12
	v_cmp_gt_u32_e64 s2, s17, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v15, s0, s4, v15
	v_add_co_ci_u32_e64 v16, null, s8, 0, s0
	v_add_co_u32 v19, s0, s3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v20, null, s7, 0, s0
	v_cmp_gt_u32_e64 s0, s17, v12
	v_cndmask_b32_e64 v21, v16, v20, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v20, v15, v19, s0
	v_add_co_u32 v15, s0, s4, v22
	v_add_co_ci_u32_e64 v16, null, s8, 0, s0
	v_add_co_u32 v19, s0, s3, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v22, null, s7, 0, s0
	v_cndmask_b32_e32 v10, v10, v13, vcc_lo
	v_mad_u64_u32 v[12:13], null, s5, 3, v[0:1]
	v_cmp_gt_u32_e32 vcc_lo, s17, v18
	v_cndmask_b32_e32 v23, v16, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v13, s17, v12
	v_add_co_u32 v24, s0, s4, v13
	v_mad_u64_u32 v[13:14], null, s5, 5, v[0:1]
	v_add_co_ci_u32_e64 v18, null, s8, 0, s0
	v_add_co_u32 v25, s0, s3, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, null, s7, 0, s0
	v_cndmask_b32_e32 v22, v15, v19, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v12
	v_mad_u64_u32 v[15:16], null, s5, 6, v[0:1]
	v_subrev_nc_u32_e32 v12, s17, v26
	v_cmp_gt_u32_e64 s1, s17, v13
	v_cndmask_b32_e32 v14, v18, v14, vcc_lo
	v_subrev_nc_u32_e32 v18, s17, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v12, s0, s4, v12
	v_add_co_ci_u32_e64 v27, null, s8, 0, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v28, s0, s4, v18
	v_subrev_nc_u32_e32 v18, s17, v15
	v_add_co_ci_u32_e64 v16, null, s8, 0, s0
	v_add_co_u32 v29, s0, s3, v13
	v_cndmask_b32_e32 v13, v24, v25, vcc_lo
	v_add_co_ci_u32_e64 v19, null, s7, 0, s0
	v_add_co_u32 v18, s0, s4, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v30, null, s8, 0, s0
	v_add_co_u32 v31, s0, s3, v15
	v_add_co_ci_u32_e64 v32, null, s7, 0, s0
	v_add_co_u32 v33, s0, s3, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v34, null, s7, 0, s0
	v_cmp_gt_u32_e64 s0, s17, v15
	v_cndmask_b32_e64 v16, v16, v19, s1
	v_cndmask_b32_e64 v15, v28, v29, s1
	v_cndmask_b32_e64 v25, v27, v34, s2
	v_cndmask_b32_e64 v24, v12, v33, s2
	v_cndmask_b32_e64 v19, v30, v32, s0
	v_cndmask_b32_e64 v18, v18, v31, s0
	global_load_u8 v19, v[18:19], off
	global_load_u8 v18, v[15:16], off
	global_load_u8 v15, v[13:14], off
	global_load_u8 v12, v[9:10], off
	global_load_u8 v16, v[24:25], off
	global_load_u8 v14, v[22:23], off
	global_load_u8 v13, v[20:21], off
	v_mad_u64_u32 v[9:10], null, s5, 7, v[0:1]
	s_mov_b32 s2, 0
	s_add_i32 s0, s6, s17
	s_mov_b32 s1, -1
	s_branch .LBB6_24
.LBB6_23:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr14
                                        ; implicit-def: $vgpr15
                                        ; implicit-def: $vgpr16
                                        ; implicit-def: $vgpr18
                                        ; implicit-def: $vgpr19
                                        ; implicit-def: $sgpr0
.LBB6_24:                               ; %Flow118
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB6_40
; %bb.25:                               ; %.preheader.i98.i.i
	s_add_i32 s0, s6, s17
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr12
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB6_27
; %bb.26:
	v_subrev_nc_u32_e32 v9, s17, v0
	s_waitcnt vmcnt(3)
	v_add_co_u32 v12, s2, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v10, null, s7, 0, s2
	v_add_co_u32 v9, s2, s4, v9
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e64 v13, null, s8, 0, s2
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v9, v9, v12, vcc_lo
	v_cndmask_b32_e32 v10, v13, v10, vcc_lo
	global_load_u8 v12, v[9:10], off
.LBB6_27:
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v9, s5, v0
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr13
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s0, v9
	s_cbranch_execz .LBB6_29
; %bb.28:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(0)
	v_add_co_u32 v13, s2, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v14, null, s7, 0, s2
	v_add_co_u32 v15, s2, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s8, 0, s2
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v14 :: v_dual_cndmask_b32 v9, v15, v13
	global_load_u8 v13, v[9:10], off
.LBB6_29:
	s_or_b32 exec_lo, exec_lo, s1
	v_lshl_add_u32 v9, s5, 1, v0
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr14
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s0, v9
	s_cbranch_execz .LBB6_31
; %bb.30:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(1)
	v_add_co_u32 v14, s2, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v15, null, s7, 0, s2
	v_add_co_u32 v16, s2, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s8, 0, s2
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v15 :: v_dual_cndmask_b32 v9, v16, v14
	global_load_u8 v14, v[9:10], off
.LBB6_31:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[9:10], null, s5, 3, v[0:1]
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr15
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s0, v9
	s_cbranch_execz .LBB6_33
; %bb.32:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(4)
	v_add_co_u32 v15, s2, s3, v9
	s_waitcnt vmcnt(2)
	v_add_co_ci_u32_e64 v16, null, s7, 0, s2
	v_add_co_u32 v18, s2, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v10, null, s8, 0, s2
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_cndmask_b32_e32 v9, v18, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v10, v10, v16, vcc_lo
	global_load_u8 v15, v[9:10], off
.LBB6_33:
	s_or_b32 exec_lo, exec_lo, s1
	v_lshl_add_u32 v9, s5, 2, v0
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr16
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s0, v9
	s_cbranch_execz .LBB6_35
; %bb.34:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(2)
	v_add_co_u32 v16, s2, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v18, null, s7, 0, s2
	v_add_co_u32 v19, s2, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s8, 0, s2
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v18 :: v_dual_cndmask_b32 v9, v19, v16
	global_load_u8 v16, v[9:10], off
.LBB6_35:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[9:10], null, s5, 5, v[0:1]
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr18
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s0, v9
	s_cbranch_execz .LBB6_37
; %bb.36:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(5)
	v_add_co_u32 v18, s2, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v19, null, s7, 0, s2
	v_add_co_u32 v20, s2, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s8, 0, s2
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v19 :: v_dual_cndmask_b32 v9, v20, v18
	global_load_u8 v18, v[9:10], off
.LBB6_37:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[9:10], null, s5, 6, v[0:1]
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr19
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s0, v9
	s_cbranch_execz .LBB6_39
; %bb.38:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(6)
	v_add_co_u32 v19, s2, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v20, null, s7, 0, s2
	v_add_co_u32 v21, s2, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s8, 0, s2
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v20 :: v_dual_cndmask_b32 v9, v21, v19
	global_load_u8 v19, v[9:10], off
.LBB6_39:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[9:10], null, s5, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s0, v9
.LBB6_40:                               ; %Flow119
	v_mov_b32_e32 v20, s0
                                        ; implicit-def: $vgpr10
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB6_42
; %bb.41:                               ; %.loopexit.sink.split.i95.i.i
	v_subrev_nc_u32_e32 v10, s17, v9
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s1, s4, v10
	v_add_co_ci_u32_e64 v10, null, s8, 0, s1
	v_add_co_u32 v21, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v22, null, s7, 0, s1
	v_dual_cndmask_b32 v9, v20, v21 :: v_dual_mov_b32 v20, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v10, v10, v22, vcc_lo
	global_load_u8 v10, v[9:10], off
.LBB6_42:                               ; %_ZN7rocprim6detail11gmem_to_regILj8EhN6thrust10device_ptrIhEEEEvRAT__T0_T1_S8_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b32_e32 v9, 3, v0
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_min_u32_e32 v22, v20, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e64 v21, v22, s6 clamp
	v_min_u32_e32 v23, s17, v22
	v_cmpx_lt_u32_e64 v21, v23
	s_cbranch_execz .LBB6_46
; %bb.43:                               ; %.lr.ph.i.preheader.i.i
	v_lshlrev_b32_e32 v24, 2, v22
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v24, s17, 2, v24
.LBB6_44:                               ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v25, v23, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v25, 1, v25
	v_not_b32_e32 v26, v25
	v_lshlrev_b32_e32 v27, 2, v25
	v_add_nc_u32_e32 v28, 1, v25
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v26, v26, 2, v24
	ds_load_b32 v27, v27
	ds_load_b32 v26, v26
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v27, v26
	v_cndmask_b32_e32 v23, v23, v25, vcc_lo
	v_cndmask_b32_e32 v21, v28, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v21, v23
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB6_44
; %bb.45:                               ; %Flow116
	s_or_b32 exec_lo, exec_lo, s1
.LBB6_46:                               ; %Flow117
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s0
	v_sub_nc_u32_e32 v22, v22, v21
	v_cmp_ge_u32_e32 vcc_lo, s17, v21
                                        ; implicit-def: $vgpr30
                                        ; implicit-def: $vgpr28
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $vgpr26
                                        ; implicit-def: $vgpr23
                                        ; implicit-def: $vgpr25
                                        ; implicit-def: $vgpr24
	v_add_nc_u32_e32 v29, s17, v22
                                        ; implicit-def: $vgpr22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s0, v29, v20
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s8, s0
	s_cbranch_execz .LBB6_52
; %bb.47:                               ; %._crit_edge.i.i.i.i
	v_cmp_gt_u32_e32 vcc_lo, s17, v21
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB6_49
; %bb.48:
	v_lshlrev_b32_e32 v1, 2, v21
	ds_load_b32 v1, v1
.LBB6_49:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_ge_u32_e64 s0, v29, v20
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_lt_u32_e64 v29, v20
	s_cbranch_execz .LBB6_51
; %bb.50:
	v_lshlrev_b32_e32 v2, 2, v29
	ds_load_b32 v2, v2
.LBB6_51:                               ; %.loopexit.loopexit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	v_cmp_le_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_or_b32 vcc_lo, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v20, s17, vcc_lo
	v_dual_cndmask_b32 v24, v29, v21 :: v_dual_add_nc_u32 v3, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, 1, v24
	v_min_u32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 2, v3
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_dual_cndmask_b32 v6, v3, v2 :: v_dual_cndmask_b32 v3, v1, v3
	v_dual_cndmask_b32 v5, v21, v4 :: v_dual_cndmask_b32 v4, v4, v29
	v_cndmask_b32_e32 v1, v2, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e64 s1, v3, v6
	v_cmp_gt_u32_e64 s0, s17, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_u32_e64 s2, v4, v20
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v25, v4, v5, s0
	v_cndmask_b32_e64 v7, v20, s17, s0
	v_add_nc_u32_e32 v8, 1, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, -1, v7
	v_cndmask_b32_e64 v2, v6, v3, s0
	v_cndmask_b32_e64 v5, v5, v8, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v7, v8, v7
	v_cndmask_b32_e64 v4, v8, v4, s0
	v_cmp_gt_u32_e64 s1, s17, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v7, 2, v7
	v_cmp_ge_u32_e64 s3, v4, v20
	ds_load_b32 v7, v7
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v21, v7, v6, s0
	v_cndmask_b32_e64 v7, v3, v7, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s2, v7, v21
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s3, s1
	v_cndmask_b32_e64 v22, v4, v5, s1
	v_cndmask_b32_e64 v8, v20, s17, s1
	v_cndmask_b32_e64 v3, v21, v7, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v23, 1, v22
	v_add_nc_u32_e32 v8, -1, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v5, v23, s1
	v_min_u32_e32 v8, v23, v8
	v_cndmask_b32_e64 v4, v23, v4, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s2, s17, v5
	v_lshlrev_b32_e32 v8, 2, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_ge_u32_e64 s4, v4, v20
	ds_load_b32 v8, v8
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v29, v8, v21, s1
	v_cndmask_b32_e64 v8, v7, v8, s1
	v_cmp_le_u32_e64 s3, v8, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_or_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v23, v4, v5, s2
	v_cndmask_b32_e64 v26, v20, s17, s2
	v_add_nc_u32_e32 v27, 1, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v26, -1, v26
	v_cndmask_b32_e64 v5, v5, v27, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v26, v27, v26
	v_cndmask_b32_e64 v4, v27, v4, s2
	v_cmp_gt_u32_e64 s3, s17, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v26, 2, v26
	v_cmp_ge_u32_e64 s5, v4, v20
	ds_load_b32 v26, v26
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v30, v26, v29, s2
	v_cndmask_b32_e64 v31, v8, v26, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s4, v31, v30
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s5, s3
	v_cndmask_b32_e64 v26, v4, v5, s3
	v_cndmask_b32_e64 v27, v20, s17, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v28, 1, v26
	v_add_nc_u32_e32 v27, -1, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v5, v28, s3
	v_min_u32_e32 v27, v28, v27
	v_cndmask_b32_e64 v4, v28, v4, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s4, s17, v5
	v_lshlrev_b32_e32 v27, 2, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_ge_u32_e64 s6, v4, v20
	ds_load_b32 v27, v27
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v32, v27, v30, s3
	v_cndmask_b32_e64 v33, v31, v27, s3
	v_cmp_le_u32_e64 s5, v33, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, s5
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v27, v4, v5, s4
	v_cndmask_b32_e64 v28, v20, s17, s4
	v_cndmask_b32_e64 v6, v32, v33, s4
	v_add_nc_u32_e32 v34, 1, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v28, -1, v28
	v_cndmask_b32_e64 v5, v5, v34, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v28, v34, v28
	v_cndmask_b32_e64 v4, v34, v4, s4
	v_cmp_gt_u32_e64 s5, s17, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v28, 2, v28
	v_cmp_ge_u32_e64 s7, v4, v20
	ds_load_b32 v28, v28
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v35, v28, v32, s4
	v_cndmask_b32_e64 v36, v33, v28, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s6, v36, v35
	s_and_b32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s7, s5
	v_cndmask_b32_e64 v28, v4, v5, s5
	v_cndmask_b32_e64 v34, v20, s17, s5
	v_cndmask_b32_e64 v7, v35, v36, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v37, 1, v28
	v_add_nc_u32_e32 v34, -1, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v5, v37, s5
	v_min_u32_e32 v34, v37, v34
	v_cndmask_b32_e64 v37, v37, v4, s5
	v_cndmask_b32_e64 v4, v29, v8, s2
	v_cndmask_b32_e64 v5, v30, v31, s3
	v_cmp_gt_u32_e32 vcc_lo, s17, v38
	v_lshlrev_b32_e32 v34, 2, v34
	v_cmp_ge_u32_e64 s1, v37, v20
	ds_load_b32 v34, v34
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v39, v34, v35, s5
	v_cndmask_b32_e64 v34, v36, v34, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s0, v34, v39
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 vcc_lo, s1, s0
	v_cndmask_b32_e32 v8, v39, v34, vcc_lo
	v_cndmask_b32_e32 v30, v37, v38, vcc_lo
.LBB6_52:                               ; %Flow114
	s_or_b32 exec_lo, exec_lo, s8
	s_barrier
	buffer_gl0_inv
	ds_store_b8 v0, v12
	ds_store_b8 v0, v13 offset:128
	ds_store_b8 v0, v14 offset:256
	ds_store_b8 v0, v15 offset:384
	ds_store_b8 v0, v16 offset:512
	ds_store_b8 v0, v18 offset:640
	ds_store_b8 v0, v19 offset:768
	ds_store_b8 v0, v10 offset:896
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u8 v19, v30
	ds_load_u8 v18, v28
	ds_load_u8 v21, v27
	ds_load_u8 v20, v26
	ds_load_u8 v23, v23
	ds_load_u8 v22, v22
	ds_load_u8 v25, v25
	ds_load_u8 v24, v24
	v_lshrrev_b32_e32 v10, 2, v0
	v_cmp_ne_u32_e32 vcc_lo, 1, v11
	s_mov_b32 s17, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	v_add_nc_u32_e32 v26, v10, v9
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	buffer_gl0_inv
	s_barrier
	v_lshlrev_b32_e32 v27, 2, v26
	buffer_gl0_inv
	s_cbranch_vccnz .LBB6_62
; %bb.53:                               ; %.preheader170.i.i.preheader
	v_mov_b32_e32 v9, v27
	s_mov_b64 s[0:1], 0
.LBB6_54:                               ; %.preheader170.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v10, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v9, v10
	v_add_nc_u32_e32 v9, 4, v9
	s_cbranch_scc0 .LBB6_54
; %bb.55:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v28, v0, v9
	v_dual_mov_b32 v16, v8 :: v_dual_mov_b32 v13, v5
	v_dual_mov_b32 v15, v7 :: v_dual_mov_b32 v12, v4
	v_mov_b32_e32 v11, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mov_b32 v14, v6 :: v_dual_lshlrev_b32 v29, 2, v28
	v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v9, v1
.LBB6_56:                               ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v30, v29
	v_add_nc_u32_e32 v29, 0x210, v29
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v9, v30
	s_cbranch_scc1 .LBB6_56
; %bb.57:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPjEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	v_and_b32_e32 v29, 0xff, v24
	v_lshlrev_b16 v30, 8, v25
	v_and_b32_e32 v31, 0xff, v22
	v_lshlrev_b16 v32, 8, v23
	v_and_b32_e32 v33, 0xff, v20
	v_lshlrev_b16 v34, 8, v21
	v_and_b32_e32 v35, 0xff, v18
	v_lshlrev_b16 v36, 8, v19
	v_or_b32_e32 v29, v29, v30
	v_or_b32_e32 v30, v31, v32
	v_or_b32_e32 v31, v33, v34
	s_lshl_b64 s[0:1], s[16:17], 2
	v_or_b32_e32 v32, v35, v36
	v_and_b32_e32 v29, 0xffff, v29
	v_lshlrev_b32_e32 v30, 16, v30
	v_and_b32_e32 v31, 0xffff, v31
	s_add_u32 s0, s10, s0
	v_lshlrev_b32_e32 v32, 16, v32
	s_addc_u32 s1, s11, s1
	s_clause 0x7
	global_store_b32 v17, v9, s[0:1]
	global_store_b32 v17, v10, s[0:1] offset:512
	global_store_b32 v17, v11, s[0:1] offset:1024
	global_store_b32 v17, v12, s[0:1] offset:1536
	global_store_b32 v17, v13, s[0:1] offset:2048
	global_store_b32 v17, v14, s[0:1] offset:2560
	global_store_b32 v17, v15, s[0:1] offset:3072
	global_store_b32 v17, v16, s[0:1] offset:3584
	v_mov_b32_e32 v11, v26
	v_or_b32_e32 v9, v29, v30
	v_or_b32_e32 v10, v31, v32
	s_mov_b64 s[0:1], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB6_58:                               ; =>This Inner Loop Header: Depth=1
	s_lshl_b32 s2, s0, 3
	s_add_u32 s0, s0, 1
	v_lshrrev_b64 v[12:13], s2, v[9:10]
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b8 v11, v12
	v_add_nc_u32_e32 v11, 1, v11
	s_cbranch_scc0 .LBB6_58
; %bb.59:
	v_dual_mov_b32 v34, v24 :: v_dual_mov_b32 v33, v22
	v_dual_mov_b32 v36, v25 :: v_dual_mov_b32 v35, v23
	v_dual_mov_b32 v29, v20 :: v_dual_mov_b32 v32, v21
	v_mov_b32_e32 v12, v18
	v_mov_b32_e32 v30, v19
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB6_60:                               ; =>This Inner Loop Header: Depth=1
	ds_load_u8 v14, v28
	v_and_b32_e32 v9, 0xff, v34
	v_lshlrev_b16 v10, 8, v36
	v_and_b32_e32 v11, 0xff, v33
	v_lshlrev_b16 v13, 8, v35
	v_and_b32_e32 v15, 0xff, v29
	v_lshlrev_b16 v16, 8, v32
	v_and_b32_e32 v12, 0xff, v12
	v_lshlrev_b16 v29, 8, v30
	v_or_b32_e32 v9, v9, v10
	v_or_b32_e32 v10, v11, v13
	v_or_b32_e32 v11, v15, v16
	s_lshl_b32 s2, s0, 3
	v_or_b32_e32 v12, v12, v29
	v_and_b32_e32 v9, 0xffff, v9
	v_lshlrev_b32_e32 v10, 16, v10
	v_and_b32_e32 v11, 0xffff, v11
	s_lshl_b64 s[2:3], 0xff, s2
	v_lshlrev_b32_e32 v12, 16, v12
	v_add_nc_u32_e32 v28, 0x84, v28
	v_or_b32_e32 v9, v9, v10
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	v_or_b32_e32 v10, v11, v12
	s_waitcnt lgkmcnt(0)
	v_perm_b32 v11, v14, v14, 0x4040404
	s_cmp_lg_u32 s0, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_bfi_b32 v10, s3, v11, v10
	v_bfi_b32 v9, s2, v11, v9
	v_lshrrev_b32_e32 v14, 16, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_lshrrev_b64 v[11:12], 24, v[9:10]
	v_lshrrev_b32_e32 v16, 16, v9
	v_lshrrev_b32_e32 v13, 24, v10
	v_lshrrev_b32_e32 v15, 8, v10
	v_lshrrev_b32_e32 v31, 8, v9
	v_and_b32_e32 v30, 0xff, v14
	v_and_b32_e32 v29, 0xff, v16
	v_lshlrev_b16 v12, 8, v13
	v_lshlrev_b16 v32, 8, v11
	v_lshlrev_b16 v34, 8, v31
	v_lshlrev_b16 v35, 8, v15
	v_and_b32_e32 v38, 0xff, v10
	v_or_b32_e32 v12, v30, v12
	v_or_b32_e32 v33, v29, v32
	v_and_b32_e32 v30, 0xffff, v34
	v_and_b32_e32 v32, 0xffff, v35
	v_and_b32_e32 v29, 0xff, v9
	v_lshlrev_b32_e32 v36, 16, v12
	v_lshlrev_b32_e32 v37, 16, v33
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v34, v29, v34
	v_or_b32_e32 v32, v32, v36
	s_delay_alu instid0(VALU_DEP_3)
	v_or_b32_e32 v39, v30, v37
	v_or_b32_e32 v29, v38, v35
	v_lshrrev_b32_e32 v30, 24, v36
	v_lshrrev_b32_e32 v35, 24, v37
	v_lshrrev_b32_e32 v32, 8, v32
	v_lshrrev_b32_e32 v36, 8, v39
	s_cbranch_scc1 .LBB6_60
; %bb.61:                               ; %_ZN7rocprim11block_storeIhLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPhEEvT_RA8_hRNS_14block_exchangeIhLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_add_u32 s0, s14, s16
	s_addc_u32 s1, s15, 0
	v_add_co_u32 v28, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v29, null, s1, 0, s0
	s_mov_b32 s0, 0
	s_mov_b32 s8, -1
	s_clause 0x6
	global_store_b8 v[28:29], v9, off
	global_store_b8 v[28:29], v31, off offset:128
	global_store_b8 v[28:29], v16, off offset:256
	global_store_b8 v[28:29], v11, off offset:384
	global_store_b8 v[28:29], v10, off offset:512
	global_store_b8 v[28:29], v15, off offset:640
	global_store_b8 v[28:29], v14, off offset:768
	s_branch .LBB6_63
.LBB6_62:
	s_mov_b32 s0, -1
	s_mov_b32 s8, s17
                                        ; implicit-def: $vgpr13
.LBB6_63:                               ; %Flow
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB6_103
; %bb.64:                               ; %.preheader.i.i.preheader
	s_mov_b64 s[0:1], 0
.LBB6_65:                               ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v9, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v27, v9
	v_add_nc_u32_e32 v27, 4, v27
	s_cbranch_scc0 .LBB6_65
; %bb.66:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v11, v0, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v9, 2, v11
.LBB6_67:                               ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v10, v9
	v_add_nc_u32_e32 v9, 0x210, v9
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v1, v10
	s_cbranch_scc1 .LBB6_67
; %bb.68:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[0:1], s[16:17], 2
	s_sub_i32 s6, s18, s16
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	v_add_co_u32 v9, s0, s0, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, null, s1, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s6, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB6_70
; %bb.69:
	global_store_b32 v[9:10], v1, off
.LBB6_70:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v1, 0x80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s6, v1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_72
; %bb.71:
	global_store_b32 v[9:10], v2, off offset:512
.LBB6_72:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v1, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s6, v1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB6_74
; %bb.73:
	global_store_b32 v[9:10], v3, off offset:1024
.LBB6_74:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v1, 0x180, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s6, v1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB6_76
; %bb.75:
	global_store_b32 v[9:10], v4, off offset:1536
.LBB6_76:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v1, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s6, v1
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB6_78
; %bb.77:
	global_store_b32 v[9:10], v5, off offset:2048
.LBB6_78:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v1, 0x280, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s6, v1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB6_80
; %bb.79:
	global_store_b32 v[9:10], v6, off offset:2560
.LBB6_80:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v1, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s6, v1
	s_and_saveexec_b32 s7, s5
	s_cbranch_execz .LBB6_82
; %bb.81:
	global_store_b32 v[9:10], v7, off offset:3072
.LBB6_82:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v1, 0x380, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s6, v1
	s_and_saveexec_b32 s6, s8
	s_cbranch_execz .LBB6_84
; %bb.83:
	global_store_b32 v[9:10], v8, off offset:3584
.LBB6_84:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPjEEvT_RA8_jjRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s6
	v_and_b32_e32 v1, 0xff, v24
	v_lshlrev_b16 v2, 8, v25
	v_and_b32_e32 v3, 0xff, v22
	v_lshlrev_b16 v4, 8, v23
	v_and_b32_e32 v5, 0xff, v20
	v_lshlrev_b16 v6, 8, v21
	v_and_b32_e32 v7, 0xff, v18
	v_lshlrev_b16 v8, 8, v19
	v_or_b32_e32 v1, v1, v2
	v_or_b32_e32 v2, v3, v4
	v_or_b32_e32 v3, v5, v6
	s_mov_b64 s[6:7], 0
	v_or_b32_e32 v4, v7, v8
	v_and_b32_e32 v1, 0xffff, v1
	v_lshlrev_b32_e32 v2, 16, v2
	v_and_b32_e32 v3, 0xffff, v3
	s_waitcnt_vscnt null, 0x0
	v_lshlrev_b32_e32 v4, 16, v4
	s_barrier
	v_or_b32_e32 v1, v1, v2
	buffer_gl0_inv
	v_or_b32_e32 v2, v3, v4
.LBB6_85:                               ; =>This Inner Loop Header: Depth=1
	s_lshl_b32 s9, s6, 3
	s_add_u32 s6, s6, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b64 v[3:4], s9, v[1:2]
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s6, 8
	ds_store_b8 v26, v3
	v_add_nc_u32_e32 v26, 1, v26
	s_cbranch_scc0 .LBB6_85
; %bb.86:
	s_mov_b64 s[6:7], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB6_87:                               ; =>This Inner Loop Header: Depth=1
	ds_load_u8 v5, v11
	v_and_b32_e32 v1, 0xff, v24
	v_lshlrev_b16 v2, 8, v25
	v_and_b32_e32 v3, 0xff, v22
	v_lshlrev_b16 v4, 8, v23
	v_and_b32_e32 v6, 0xff, v20
	v_lshlrev_b16 v7, 8, v21
	v_and_b32_e32 v8, 0xff, v18
	v_lshlrev_b16 v9, 8, v19
	v_or_b32_e32 v1, v1, v2
	v_or_b32_e32 v2, v3, v4
	v_or_b32_e32 v3, v6, v7
	s_lshl_b32 s9, s6, 3
	v_or_b32_e32 v4, v8, v9
	v_and_b32_e32 v1, 0xffff, v1
	v_lshlrev_b32_e32 v2, 16, v2
	v_and_b32_e32 v3, 0xffff, v3
	s_lshl_b64 s[10:11], 0xff, s9
	v_lshlrev_b32_e32 v4, 16, v4
	v_add_nc_u32_e32 v11, 0x84, v11
	v_or_b32_e32 v1, v1, v2
	s_add_u32 s6, s6, 1
	s_addc_u32 s7, s7, 0
	v_or_b32_e32 v2, v3, v4
	s_waitcnt lgkmcnt(0)
	v_perm_b32 v3, v5, v5, 0x4040404
	s_cmp_lg_u32 s6, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_bfi_b32 v2, s11, v3, v2
	v_bfi_b32 v1, s10, v3, v1
	v_lshrrev_b32_e32 v6, 16, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_lshrrev_b64 v[3:4], 24, v[1:2]
	v_lshrrev_b32_e32 v8, 16, v1
	v_lshrrev_b32_e32 v13, 24, v2
	v_lshrrev_b32_e32 v7, 8, v2
	v_lshrrev_b32_e32 v9, 8, v1
	v_and_b32_e32 v10, 0xff, v6
	v_and_b32_e32 v4, 0xff, v8
	v_lshlrev_b16 v5, 8, v13
	v_lshlrev_b16 v12, 8, v3
	v_lshlrev_b16 v14, 8, v9
	v_lshlrev_b16 v15, 8, v7
	v_and_b32_e32 v17, 0xff, v2
	v_or_b32_e32 v18, v10, v5
	v_or_b32_e32 v22, v4, v12
	v_and_b32_e32 v4, 0xff, v1
	v_and_b32_e32 v5, 0xffff, v14
	v_and_b32_e32 v10, 0xffff, v15
	v_lshlrev_b32_e32 v12, 16, v18
	v_lshlrev_b32_e32 v16, 16, v22
	v_or_b32_e32 v24, v4, v14
	v_or_b32_e32 v20, v17, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_or_b32_e32 v4, v10, v12
	v_or_b32_e32 v5, v5, v16
	v_lshrrev_b32_e32 v19, 24, v12
	v_lshrrev_b32_e32 v23, 24, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshrrev_b32_e32 v21, 8, v4
	v_lshrrev_b32_e32 v25, 8, v5
	s_cbranch_scc1 .LBB6_87
; %bb.88:                               ; %_ZN7rocprim14block_exchangeIhLj128ELj8ELj1ELj1EE18blocked_to_stripedIhEEvRA8_KhRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_add_u32 s6, s14, s16
	s_addc_u32 s7, s15, 0
	v_add_co_u32 v4, s6, s6, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, null, s7, 0, s6
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB6_90
; %bb.89:
	global_store_b8 v[4:5], v1, off
.LBB6_90:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB6_92
; %bb.91:
	global_store_b8 v[4:5], v9, off offset:128
.LBB6_92:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB6_94
; %bb.93:
	global_store_b8 v[4:5], v8, off offset:256
.LBB6_94:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB6_96
; %bb.95:
	global_store_b8 v[4:5], v3, off offset:384
.LBB6_96:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB6_98
; %bb.97:
	global_store_b8 v[4:5], v2, off offset:512
.LBB6_98:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB6_100
; %bb.99:
	global_store_b8 v[4:5], v7, off offset:640
.LBB6_100:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB6_102
; %bb.101:
	global_store_b8 v[4:5], v6, off offset:768
.LBB6_102:
	s_or_b32 exec_lo, exec_lo, s0
.LBB6_103:                              ; %Flow112
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB6_105
; %bb.104:                              ; %_ZN7rocprim6detail16block_store_implILb1ELj128ELj8EjhE5storeIPjPhjEEvT1_jbT_T0_RA8_jRA8_hRNS2_12storage_typeE.exit.sink.split.i.i
	s_add_u32 s0, s14, s16
	s_addc_u32 s1, s15, 0
	v_add_co_u32 v0, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s1, 0, s0
	global_store_b8 v[0:1], v13, off offset:896
.LBB6_105:                              ; %_ZN7rocprim6detail28block_merge_mergepath_kernelILj128ELj8EN6thrust10device_ptrIjEEPjNS3_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_PKSF_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 40
		.amdhsa_next_free_sgpr 27
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
.Lfunc_end6:
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end6-_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 7024
; NumSgprs: 29
; NumVgprs: 40
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 29
; NumVGPRsForWavesPerEU: 40
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.protected	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ ; -- Begin function _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.globl	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	8
	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: ; @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x20
	s_lshl_b32 s12, s15, 7
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s4, s2, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s4, v0
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB7_28
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_lshr_b32 s0, s2, 7
	s_mov_b32 s13, 0
	s_cmp_lg_u32 s15, s0
	v_lshlrev_b32_e32 v1, 2, v0
	s_cselect_b32 s1, -1, 0
	s_lshl_b64 s[16:17], s[12:13], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s4, s16
	s_addc_u32 s17, s5, s17
	s_add_u32 s8, s8, s12
	s_addc_u32 s9, s9, 0
	s_lshr_b32 s0, s3, 7
	global_load_u8 v3, v0, s[8:9]
	global_load_b32 v4, v1, s[16:17]
	s_sub_i32 s8, 0, s0
	v_add_nc_u32_e32 v0, s12, v0
	s_and_b32 s8, s15, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s8, s0
	s_lshl_b32 s9, s8, 7
	s_sub_i32 s8, 0, s3
	s_cmp_eq_u32 s0, 0
	s_cselect_b32 s0, -1, 0
	s_and_b32 s14, s0, exec_lo
	s_cselect_b32 s14, s3, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s14, s14, s9
	s_cmp_lt_u32 s14, s2
	s_cbranch_scc1 .LBB7_4
; %bb.2:
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB7_5
; %bb.3:                                ; %.critedge70.i
	v_mov_b32_e32 v1, 0
	s_mov_b32 s13, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, s8, s10, v0
	v_add_co_ci_u32_e64 v2, null, s11, 0, s8
	s_mov_b32 s8, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
	s_branch .LBB7_6
.LBB7_4:
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr1_vgpr2
	s_branch .LBB7_11
.LBB7_5:
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB7_6:                                ; %Flow33
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB7_10
; %bb.7:
	s_mov_b32 s8, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB7_9
; %bb.8:
	v_mov_b32_e32 v1, 0
	s_or_b32 s13, s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_u32 v1, s12, s10, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_ci_u32_e64 v2, null, s11, 0, s12
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB7_9:                                ; %Flow35
	s_or_b32 exec_lo, exec_lo, s8
.LBB7_10:                               ; %Flow34
	s_mov_b32 s8, 0
.LBB7_11:                               ; %Flow32
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccz .LBB7_26
; %bb.12:
	s_min_u32 s8, s14, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s3, s8, s3
	s_min_u32 s12, s9, s8
	s_add_i32 s9, s9, s8
	s_min_u32 s2, s3, s2
	s_cmp_gt_u32 s3, s14
	v_subrev_nc_u32_e32 v0, s9, v0
	s_cselect_b32 s3, -1, 0
	s_and_b32 vcc_lo, exec_lo, s1
	v_cndmask_b32_e64 v1, 0, 1, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, s12, v0
	v_cmp_ne_u32_e64 s1, 1, v1
	s_cbranch_vccz .LBB7_18
; %bb.13:                               ; %.critedge74.i
	v_mov_b32_e32 v2, s8
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB7_17
; %bb.14:                               ; %.lr.ph.i83.i.preheader
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, s8
	s_mov_b32 s1, 0
.LBB7_15:                               ; %.lr.ph.i83.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v6
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v4, v7
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v7, v4
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v8, s0
	v_add_nc_u32_e32 v8, 1, v0
	v_and_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 1, v7
	v_cndmask_b32_e32 v6, v0, v6, vcc_lo
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v6
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB7_15
; %bb.16:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
.LBB7_17:                               ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjNS3_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit89.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, s1, s10, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s11, 0, s1
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v4, off
	s_branch .LBB7_19
.LBB7_18:
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB7_19:                               ; %Flow30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB7_25
; %bb.20:
	v_mov_b32_e32 v2, s8
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB7_24
; %bb.21:                               ; %.lr.ph.i.i.preheader
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, s8
	s_mov_b32 s1, 0
.LBB7_22:                               ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v6
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v4, v7
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v7, v4
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v8, s0
	v_add_nc_u32_e32 v8, 1, v0
	v_and_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 1, v7
	v_cndmask_b32_e32 v6, v0, v6, vcc_lo
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v6
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB7_22
; %bb.23:                               ; %Flow28
	s_or_b32 exec_lo, exec_lo, s1
.LBB7_24:                               ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjNS3_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_u32 v1, s0, s10, v0
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_ci_u32_e64 v2, null, s11, 0, s0
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB7_25:                               ; %Flow31
	s_mov_b32 s13, -1
.LBB7_26:                               ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s13
	s_cbranch_execz .LBB7_28
; %bb.27:                               ; %.critedge.sink.split.i
	s_waitcnt vmcnt(1)
	global_store_b8 v[1:2], v3, off
.LBB7_28:                               ; %_ZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjNS3_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
.Lfunc_end7:
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end7-_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 968
; NumSgprs: 20
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_,comdat
	.protected	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_ ; -- Begin function _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_
	.globl	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_
	.p2align	8
	.type	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_,@function
_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_: ; @_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[16:17], s[0:1], 0x10
	s_mov_b32 s21, 0
	s_lshl_b32 s20, s15, 12
	v_lshlrev_b32_e32 v3, 2, v0
	s_lshl_b64 s[18:19], s[20:21], 2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_add_u32 s0, s4, s18
	s_addc_u32 s1, s5, s19
	v_add_co_u32 v1, s0, s0, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s1, 0, s0
	s_cmp_lg_u32 s15, s2
	s_mov_b32 s0, -1
	s_cbranch_scc0 .LBB8_2
; %bb.1:
	v_add_co_u32 v4, vcc_lo, 0x1000, v1
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v6, vcc_lo, v1, 0x2000
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v8, vcc_lo, 0x2000, v1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v10, vcc_lo, 0x3000, v1
	global_load_b32 v13, v[6:7], off
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v2, vcc_lo
	s_clause 0xe
	global_load_b32 v14, v[1:2], off
	global_load_b32 v15, v[1:2], off offset:1024
	global_load_b32 v16, v[1:2], off offset:2048
	global_load_b32 v17, v[1:2], off offset:3072
	global_load_b32 v18, v[4:5], off offset:1024
	global_load_b32 v19, v[4:5], off offset:2048
	global_load_b32 v20, v[4:5], off offset:3072
	global_load_b32 v21, v[8:9], off offset:1024
	global_load_b32 v22, v[8:9], off offset:2048
	global_load_b32 v23, v[8:9], off offset:3072
	global_load_b32 v24, v[10:11], off
	global_load_b32 v25, v[10:11], off offset:1024
	global_load_b32 v26, v[6:7], off offset:-4096
	global_load_b32 v27, v[10:11], off offset:2048
	global_load_b32 v4, v[10:11], off offset:3072
	s_add_u32 s2, s16, s18
	s_addc_u32 s3, s17, s19
	v_add_co_u32 v11, s1, s2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v12, null, s3, 0, s1
	s_mov_b32 s0, 0
	v_add_co_u32 v5, vcc_lo, 0x1000, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v12, vcc_lo
	v_add_co_u32 v7, vcc_lo, v11, 0x2000
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v12, vcc_lo
	v_add_co_u32 v9, vcc_lo, 0x2000, v11
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v12, vcc_lo
	v_add_co_u32 v11, vcc_lo, 0x3000, v11
	s_mov_b32 s21, -1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
	s_waitcnt vmcnt(15)
	global_store_b32 v[7:8], v13, off
	s_waitcnt vmcnt(14)
	global_store_b32 v3, v14, s[2:3]
	s_waitcnt vmcnt(13)
	global_store_b32 v3, v15, s[2:3] offset:1024
	s_waitcnt vmcnt(12)
	global_store_b32 v3, v16, s[2:3] offset:2048
	s_waitcnt vmcnt(11)
	global_store_b32 v3, v17, s[2:3] offset:3072
	s_waitcnt vmcnt(10)
	global_store_b32 v[5:6], v18, off offset:1024
	s_waitcnt vmcnt(9)
	global_store_b32 v[5:6], v19, off offset:2048
	s_waitcnt vmcnt(8)
	global_store_b32 v[5:6], v20, off offset:3072
	s_waitcnt vmcnt(7)
	global_store_b32 v[9:10], v21, off offset:1024
	s_waitcnt vmcnt(6)
	global_store_b32 v[9:10], v22, off offset:2048
	s_waitcnt vmcnt(5)
	global_store_b32 v[9:10], v23, off offset:3072
	s_waitcnt vmcnt(4)
	global_store_b32 v[11:12], v24, off
	s_waitcnt vmcnt(3)
	global_store_b32 v[11:12], v25, off offset:1024
	s_waitcnt vmcnt(2)
	global_store_b32 v[7:8], v26, off offset:-4096
	s_waitcnt vmcnt(1)
	global_store_b32 v[11:12], v27, off offset:2048
	s_branch .LBB8_3
.LBB8_2:
                                        ; implicit-def: $vgpr4
.LBB8_3:                                ; %Flow
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB8_67
; %bb.4:
	s_sub_i32 s15, s6, s20
                                        ; implicit-def: $vgpr5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s15, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB8_6
; %bb.5:
	global_load_b32 v5, v[1:2], off
.LBB8_6:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	v_or_b32_e32 v4, 0x100, v0
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s15, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB8_8
; %bb.7:
	global_load_b32 v6, v[1:2], off offset:1024
.LBB8_8:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v4, 0x200, v0
                                        ; implicit-def: $vgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s15, v4
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB8_10
; %bb.9:
	global_load_b32 v7, v[1:2], off offset:2048
.LBB8_10:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v4, 0x300, v0
                                        ; implicit-def: $vgpr8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s15, v4
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB8_12
; %bb.11:
	global_load_b32 v8, v[1:2], off offset:3072
.LBB8_12:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v4, 0x400, v0
                                        ; implicit-def: $vgpr9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s15, v4
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB8_14
; %bb.13:
	v_add_co_u32 v9, s4, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s4, 0, v2, s4
	global_load_b32 v9, v[9:10], off
.LBB8_14:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v4, 0x500, v0
                                        ; implicit-def: $vgpr10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s15, v4
	s_and_saveexec_b32 s6, s4
	s_cbranch_execz .LBB8_16
; %bb.15:
	v_add_co_u32 v10, s5, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s5, 0, v2, s5
	global_load_b32 v10, v[10:11], off offset:1024
.LBB8_16:
	s_or_b32 exec_lo, exec_lo, s6
	v_or_b32_e32 v4, 0x600, v0
                                        ; implicit-def: $vgpr11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s15, v4
	s_and_saveexec_b32 s7, s5
	s_cbranch_execz .LBB8_18
; %bb.17:
	v_add_co_u32 v11, s6, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s6, 0, v2, s6
	global_load_b32 v11, v[11:12], off offset:2048
.LBB8_18:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v4, 0x700, v0
                                        ; implicit-def: $vgpr12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s15, v4
	s_and_saveexec_b32 s8, s6
	s_cbranch_execz .LBB8_20
; %bb.19:
	v_add_co_u32 v12, s7, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s7, 0, v2, s7
	global_load_b32 v12, v[12:13], off offset:3072
.LBB8_20:
	s_or_b32 exec_lo, exec_lo, s8
	v_or_b32_e32 v4, 0x800, v0
                                        ; implicit-def: $vgpr13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s15, v4
	s_and_saveexec_b32 s9, s7
	s_cbranch_execz .LBB8_22
; %bb.21:
	v_add_co_u32 v13, s8, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s8, 0, v2, s8
	global_load_b32 v13, v[13:14], off
.LBB8_22:
	s_or_b32 exec_lo, exec_lo, s9
	v_or_b32_e32 v4, 0x900, v0
                                        ; implicit-def: $vgpr14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s15, v4
	s_and_saveexec_b32 s10, s8
	s_cbranch_execz .LBB8_24
; %bb.23:
	v_add_co_u32 v14, s9, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v15, s9, 0, v2, s9
	global_load_b32 v14, v[14:15], off offset:1024
.LBB8_24:
	s_or_b32 exec_lo, exec_lo, s10
	v_or_b32_e32 v4, 0xa00, v0
                                        ; implicit-def: $vgpr15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s15, v4
	s_and_saveexec_b32 s11, s9
	s_cbranch_execz .LBB8_26
; %bb.25:
	v_add_co_u32 v15, s10, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v16, s10, 0, v2, s10
	global_load_b32 v15, v[15:16], off offset:2048
.LBB8_26:
	s_or_b32 exec_lo, exec_lo, s11
	v_or_b32_e32 v4, 0xb00, v0
                                        ; implicit-def: $vgpr16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s15, v4
	s_and_saveexec_b32 s12, s10
	s_cbranch_execz .LBB8_28
; %bb.27:
	v_add_co_u32 v16, s11, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v17, s11, 0, v2, s11
	global_load_b32 v16, v[16:17], off offset:3072
.LBB8_28:
	s_or_b32 exec_lo, exec_lo, s12
	v_or_b32_e32 v4, 0xc00, v0
                                        ; implicit-def: $vgpr17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s11, s15, v4
	s_and_saveexec_b32 s13, s11
	s_cbranch_execz .LBB8_30
; %bb.29:
	v_add_co_u32 v17, s12, 0x3000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v18, s12, 0, v2, s12
	global_load_b32 v17, v[17:18], off
.LBB8_30:
	s_or_b32 exec_lo, exec_lo, s13
	v_or_b32_e32 v4, 0xd00, v0
                                        ; implicit-def: $vgpr18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s15, v4
	s_and_saveexec_b32 s14, s12
	s_cbranch_execz .LBB8_32
; %bb.31:
	v_add_co_u32 v18, s13, 0x3000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v19, s13, 0, v2, s13
	global_load_b32 v18, v[18:19], off offset:1024
.LBB8_32:
	s_or_b32 exec_lo, exec_lo, s14
	v_or_b32_e32 v4, 0xe00, v0
                                        ; implicit-def: $vgpr19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s13, s15, v4
	s_and_saveexec_b32 s20, s13
	s_cbranch_execz .LBB8_34
; %bb.33:
	v_add_co_u32 v19, s14, 0x3000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v20, s14, 0, v2, s14
	global_load_b32 v19, v[19:20], off offset:2048
.LBB8_34:
	s_or_b32 exec_lo, exec_lo, s20
	v_or_b32_e32 v0, 0xf00, v0
                                        ; implicit-def: $vgpr4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s21, s15, v0
	s_and_saveexec_b32 s15, s21
	s_cbranch_execz .LBB8_36
; %bb.35:
	v_add_co_u32 v0, s14, 0x3000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s14, 0, v2, s14
	global_load_b32 v4, v[0:1], off offset:3072
.LBB8_36:                               ; %_ZN7rocprim25block_load_direct_stripedILj256EPjjLj16EEEvjT0_RAT2__T1_j.exit.i
	s_or_b32 exec_lo, exec_lo, s15
	s_add_u32 s14, s16, s18
	s_addc_u32 s15, s17, s19
	v_add_co_u32 v0, s14, s14, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v1, null, s15, 0, s14
	s_and_saveexec_b32 s14, vcc_lo
	s_xor_b32 s14, exec_lo, s14
	s_cbranch_execz .LBB8_38
; %bb.37:
	global_store_b32 v[0:1], v5, off
.LBB8_38:
	s_or_b32 exec_lo, exec_lo, s14
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB8_40
; %bb.39:
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v6, off offset:1024
.LBB8_40:
	s_or_b32 exec_lo, exec_lo, s14
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB8_42
; %bb.41:
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v7, off offset:2048
.LBB8_42:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB8_44
; %bb.43:
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v8, off offset:3072
.LBB8_44:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB8_46
; %bb.45:
	v_add_co_u32 v5, vcc_lo, 0x1000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v9, off
.LBB8_46:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB8_48
; %bb.47:
	v_add_co_u32 v5, vcc_lo, 0x1000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v10, off offset:1024
.LBB8_48:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB8_50
; %bb.49:
	v_add_co_u32 v5, vcc_lo, 0x1000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v11, off offset:2048
.LBB8_50:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s6
	s_cbranch_execz .LBB8_52
; %bb.51:
	v_add_co_u32 v5, vcc_lo, 0x1000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v12, off offset:3072
.LBB8_52:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB8_54
; %bb.53:
	v_add_co_u32 v5, vcc_lo, 0x2000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v13, off
.LBB8_54:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB8_56
; %bb.55:
	v_add_co_u32 v5, vcc_lo, 0x2000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v14, off offset:1024
.LBB8_56:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s9
	s_cbranch_execz .LBB8_58
; %bb.57:
	v_add_co_u32 v5, vcc_lo, 0x2000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v15, off offset:2048
.LBB8_58:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s10
	s_cbranch_execz .LBB8_60
; %bb.59:
	v_add_co_u32 v5, vcc_lo, 0x2000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v16, off offset:3072
.LBB8_60:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s11
	s_cbranch_execz .LBB8_62
; %bb.61:
	v_add_co_u32 v5, vcc_lo, 0x3000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v17, off
.LBB8_62:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s12
	s_cbranch_execz .LBB8_64
; %bb.63:
	v_add_co_u32 v5, vcc_lo, 0x3000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v18, off offset:1024
.LBB8_64:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s13
	s_cbranch_execz .LBB8_66
; %bb.65:
	v_add_co_u32 v0, vcc_lo, 0x3000, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v19, off offset:2048
.LBB8_66:
	s_or_b32 exec_lo, exec_lo, s0
.LBB8_67:                               ; %Flow12
	s_and_saveexec_b32 s0, s21
	s_cbranch_execz .LBB8_69
; %bb.68:                               ; %_ZN7rocprim26block_store_direct_stripedILj256EN6thrust10device_ptrIjEEjLj16EEEvjT0_RAT2__T1_j.exit.sink.split.i
	s_add_u32 s0, s16, s18
	s_addc_u32 s1, s17, s19
	v_add_co_u32 v0, s0, s0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v1, null, s1, 0, s0
	v_add_co_u32 v0, vcc_lo, 0x3000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v4, off offset:3072
.LBB8_69:                               ; %_ZN7rocprim6detail21transform_kernel_implILj256ELj16EjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT2_mT3_T4_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 28
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_,comdat
.Lfunc_end8:
	.size	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_, .Lfunc_end8-_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjPjN6thrust10device_ptrIjEENS_8identityIjEEEEvT1_mT2_T3_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2152
; NumSgprs: 24
; NumVgprs: 28
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 28
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_,comdat
	.protected	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_ ; -- Begin function _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_
	.globl	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_
	.p2align	8
	.type	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_,@function
_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_: ; @_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[16:17], s[0:1], 0x10
	s_lshl_b32 s18, s15, 12
	s_mov_b32 s19, 0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_add_u32 s0, s4, s18
	s_addc_u32 s1, s5, 0
	v_add_co_u32 v1, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s1, 0, s0
	s_cmp_lg_u32 s15, s2
	s_mov_b32 s0, -1
	s_cbranch_scc0 .LBB9_2
; %bb.1:
	s_clause 0xf
	global_load_u8 v6, v[1:2], off
	global_load_u8 v7, v[1:2], off offset:256
	global_load_u8 v8, v[1:2], off offset:512
	global_load_u8 v9, v[1:2], off offset:768
	global_load_u8 v10, v[1:2], off offset:1024
	global_load_u8 v11, v[1:2], off offset:1280
	global_load_u8 v12, v[1:2], off offset:1536
	global_load_u8 v13, v[1:2], off offset:1792
	global_load_u8 v14, v[1:2], off offset:2048
	global_load_u8 v15, v[1:2], off offset:2304
	global_load_u8 v16, v[1:2], off offset:2560
	global_load_u8 v17, v[1:2], off offset:2816
	global_load_u8 v18, v[1:2], off offset:3072
	global_load_u8 v19, v[1:2], off offset:3328
	global_load_u8 v20, v[1:2], off offset:3584
	global_load_u8 v3, v[1:2], off offset:3840
	s_add_u32 s0, s16, s18
	s_addc_u32 s1, s17, 0
	v_add_co_u32 v4, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, null, s1, 0, s0
	s_mov_b32 s0, 0
	s_mov_b32 s19, -1
	s_waitcnt vmcnt(15)
	global_store_b8 v[4:5], v6, off
	s_waitcnt vmcnt(14)
	global_store_b8 v[4:5], v7, off offset:256
	s_waitcnt vmcnt(13)
	global_store_b8 v[4:5], v8, off offset:512
	s_waitcnt vmcnt(12)
	global_store_b8 v[4:5], v9, off offset:768
	s_waitcnt vmcnt(11)
	global_store_b8 v[4:5], v10, off offset:1024
	s_waitcnt vmcnt(10)
	global_store_b8 v[4:5], v11, off offset:1280
	s_waitcnt vmcnt(9)
	global_store_b8 v[4:5], v12, off offset:1536
	s_waitcnt vmcnt(8)
	global_store_b8 v[4:5], v13, off offset:1792
	s_waitcnt vmcnt(7)
	global_store_b8 v[4:5], v14, off offset:2048
	s_waitcnt vmcnt(6)
	global_store_b8 v[4:5], v15, off offset:2304
	s_waitcnt vmcnt(5)
	global_store_b8 v[4:5], v16, off offset:2560
	s_waitcnt vmcnt(4)
	global_store_b8 v[4:5], v17, off offset:2816
	s_waitcnt vmcnt(3)
	global_store_b8 v[4:5], v18, off offset:3072
	s_waitcnt vmcnt(2)
	global_store_b8 v[4:5], v19, off offset:3328
	s_waitcnt vmcnt(1)
	global_store_b8 v[4:5], v20, off offset:3584
	s_branch .LBB9_3
.LBB9_2:
                                        ; implicit-def: $vgpr3
.LBB9_3:                                ; %Flow
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB9_69
; %bb.4:
	s_sub_i32 s14, s6, s18
                                        ; implicit-def: $vgpr3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s14, v0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB9_6
; %bb.5:
	global_load_u8 v3, v[1:2], off
.LBB9_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v4, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s14, v4
                                        ; implicit-def: $vgpr4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_8
; %bb.7:
	global_load_u8 v4, v[1:2], off offset:256
.LBB9_8:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v5, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s14, v5
                                        ; implicit-def: $vgpr5
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB9_10
; %bb.9:
	global_load_u8 v5, v[1:2], off offset:512
.LBB9_10:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v6, 0x300, v0
                                        ; implicit-def: $vgpr7
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s14, v6
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB9_12
; %bb.11:
	global_load_u8 v7, v[1:2], off offset:768
.LBB9_12:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v6, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s14, v6
                                        ; implicit-def: $vgpr6
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB9_14
; %bb.13:
	global_load_u8 v6, v[1:2], off offset:1024
.LBB9_14:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v8, 0x500, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s14, v8
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB9_16
; %bb.15:
	global_load_u8 v8, v[1:2], off offset:1280
.LBB9_16:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v9, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s14, v9
                                        ; implicit-def: $vgpr9
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB9_18
; %bb.17:
	global_load_u8 v9, v[1:2], off offset:1536
.LBB9_18:
	s_or_b32 exec_lo, exec_lo, s6
	v_or_b32_e32 v10, 0x700, v0
                                        ; implicit-def: $vgpr11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s14, v10
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB9_20
; %bb.19:
	global_load_u8 v11, v[1:2], off offset:1792
.LBB9_20:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v10, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s14, v10
                                        ; implicit-def: $vgpr10
	s_and_saveexec_b32 s8, s7
	s_cbranch_execz .LBB9_22
; %bb.21:
	global_load_u8 v10, v[1:2], off offset:2048
.LBB9_22:
	s_or_b32 exec_lo, exec_lo, s8
	v_or_b32_e32 v12, 0x900, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s14, v12
                                        ; implicit-def: $vgpr12
	s_and_saveexec_b32 s9, s8
	s_cbranch_execz .LBB9_24
; %bb.23:
	global_load_u8 v12, v[1:2], off offset:2304
.LBB9_24:
	s_or_b32 exec_lo, exec_lo, s9
	v_or_b32_e32 v13, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s14, v13
                                        ; implicit-def: $vgpr13
	s_and_saveexec_b32 s10, s9
	s_cbranch_execz .LBB9_26
; %bb.25:
	global_load_u8 v13, v[1:2], off offset:2560
.LBB9_26:
	s_or_b32 exec_lo, exec_lo, s10
	v_or_b32_e32 v14, 0xb00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s14, v14
                                        ; implicit-def: $vgpr14
	s_and_saveexec_b32 s11, s10
	s_cbranch_execz .LBB9_28
; %bb.27:
	global_load_u8 v14, v[1:2], off offset:2816
.LBB9_28:
	s_or_b32 exec_lo, exec_lo, s11
	v_or_b32_e32 v15, 0xc00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s11, s14, v15
                                        ; implicit-def: $vgpr15
	s_and_saveexec_b32 s12, s11
	s_cbranch_execz .LBB9_30
; %bb.29:
	global_load_u8 v15, v[1:2], off offset:3072
.LBB9_30:
	s_or_b32 exec_lo, exec_lo, s12
	v_or_b32_e32 v16, 0xd00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s14, v16
                                        ; implicit-def: $vgpr16
	s_and_saveexec_b32 s13, s12
	s_cbranch_execz .LBB9_32
; %bb.31:
	global_load_u8 v16, v[1:2], off offset:3328
.LBB9_32:
	s_or_b32 exec_lo, exec_lo, s13
	v_or_b32_e32 v17, 0xe00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s13, s14, v17
                                        ; implicit-def: $vgpr17
	s_and_saveexec_b32 s15, s13
	s_cbranch_execz .LBB9_34
; %bb.33:
	global_load_u8 v17, v[1:2], off offset:3584
.LBB9_34:
	s_or_b32 exec_lo, exec_lo, s15
	v_or_b32_e32 v18, 0xf00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s14, s14, v18
                                        ; implicit-def: $vgpr18
	s_and_saveexec_b32 s15, s14
	s_cbranch_execz .LBB9_36
; %bb.35:
	global_load_u8 v18, v[1:2], off offset:3840
.LBB9_36:                               ; %_ZN7rocprim25block_load_direct_stripedILj256EPhhLj16EEEvjT0_RAT2__T1_j.exit.i
	s_or_b32 exec_lo, exec_lo, s15
	s_add_u32 s15, s16, s18
	s_addc_u32 s20, s17, 0
	v_add_co_u32 v1, s15, s15, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s20, 0, s15
	s_and_saveexec_b32 s15, s2
	s_cbranch_execz .LBB9_38
; %bb.37:
	s_waitcnt vmcnt(0)
	global_store_b8 v[1:2], v3, off
.LBB9_38:
	s_or_b32 exec_lo, exec_lo, s15
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v19, 0xff, v3
	v_lshlrev_b16 v4, 8, v4
	v_and_b32_e32 v5, 0xff, v5
	v_lshlrev_b16 v3, 8, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v4, v19, v4
	v_or_b32_e32 v5, v5, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v7, 0xffff, v4
	v_lshlrev_b32_e32 v4, 16, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v7, v7, v4
	v_lshrrev_b32_e32 v5, 8, v7
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB9_40
; %bb.39:
	global_store_b8 v[1:2], v5, off offset:256
.LBB9_40:
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b16 v5, 8, v5
	v_or_b32_e32 v5, v19, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v19, 0xffff, v5
	v_or_b32_e32 v4, v19, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v7, s1
	v_lshrrev_b32_e32 v20, 16, v4
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB9_42
; %bb.41:
	global_store_b8 v[1:2], v20, off offset:512
.LBB9_42:
	s_or_b32 exec_lo, exec_lo, s0
	v_and_b32_e32 v4, 0xff, v6
	v_lshlrev_b16 v8, 8, v8
	v_and_b32_e32 v6, 0xff, v9
	v_lshlrev_b16 v5, 8, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v4, v4, v8
	v_or_b32_e32 v6, v6, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, 0xffff, v4
	v_lshlrev_b32_e32 v6, 16, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v4, v4, v6
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB9_44
; %bb.43:
	v_and_b32_e32 v9, 0xff, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v9, v3
	v_lshlrev_b32_e32 v3, 16, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v19, v3
	v_cndmask_b32_e32 v3, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b64 v[19:20], 24, v[3:4]
	global_store_b8 v[1:2], v19, off offset:768
.LBB9_44:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB9_46
; %bb.45:
	global_store_b8 v[1:2], v4, off offset:1024
.LBB9_46:
	s_or_b32 exec_lo, exec_lo, s0
	v_and_b32_e32 v3, 0xff, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v7, v3, v8
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v7, v7, v6
	v_cndmask_b32_e64 v7, v7, v4, s4
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b32_e32 v7, 8, v7
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB9_48
; %bb.47:
	global_store_b8 v[1:2], v7, off offset:1280
.LBB9_48:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b16 v7, 8, v7
	v_or_b32_e32 v3, v3, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, 0xffff, v3
	v_or_b32_e32 v6, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v6, v6, v4, s5
	v_lshrrev_b32_e32 v6, 16, v6
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB9_50
; %bb.49:
	global_store_b8 v[1:2], v6, off offset:1536
.LBB9_50:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s6
	s_cbranch_execz .LBB9_52
; %bb.51:
	v_and_b32_e32 v6, 0xff, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v5, v6, v5
	v_lshlrev_b32_e32 v5, 16, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v3, v5
	v_cndmask_b32_e64 v3, v3, v4, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 24, v3
	global_store_b8 v[1:2], v3, off offset:1792
.LBB9_52:
	s_or_b32 exec_lo, exec_lo, s0
	v_and_b32_e32 v4, 0xff, v10
	v_lshlrev_b16 v5, 8, v12
	v_and_b32_e32 v6, 0xff, v13
	v_lshlrev_b16 v3, 8, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v4, v4, v5
	v_or_b32_e32 v6, v6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v7, 0xffff, v4
	v_lshlrev_b32_e32 v4, 16, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v6, v7, v4
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB9_54
; %bb.53:
	global_store_b8 v[1:2], v6, off offset:2048
.LBB9_54:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v7, 0xff, v6
	v_or_b32_e32 v5, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v5, 0xffff, v5
	v_or_b32_e32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v6, s8
	v_lshrrev_b32_e32 v5, 8, v5
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB9_56
; %bb.55:
	global_store_b8 v[1:2], v5, off offset:2304
.LBB9_56:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b16 v5, 8, v5
	v_or_b32_e32 v5, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v8, 0xffff, v5
	v_or_b32_e32 v4, v8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v6, s9
	v_lshrrev_b32_e32 v9, 16, v4
	s_and_saveexec_b32 s0, s9
	s_cbranch_execz .LBB9_58
; %bb.57:
	global_store_b8 v[1:2], v9, off offset:2560
.LBB9_58:
	s_or_b32 exec_lo, exec_lo, s0
	v_and_b32_e32 v4, 0xff, v15
	v_lshlrev_b16 v7, 8, v16
	v_and_b32_e32 v5, 0xff, v17
	v_lshlrev_b16 v10, 8, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v4, v4, v7
	v_or_b32_e32 v5, v5, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, 0xffff, v4
	v_lshlrev_b32_e32 v5, 16, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v4, v4, v5
	s_and_saveexec_b32 s0, s10
	s_cbranch_execz .LBB9_60
; %bb.59:
	v_and_b32_e32 v9, 0xff, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v9, v3
	v_lshlrev_b32_e32 v3, 16, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v8, v3
	v_cndmask_b32_e64 v3, v3, v6, s10
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b64 v[8:9], 24, v[3:4]
	global_store_b8 v[1:2], v8, off offset:2816
.LBB9_60:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s11
	s_cbranch_execz .LBB9_62
; %bb.61:
	global_store_b8 v[1:2], v4, off offset:3072
.LBB9_62:
	s_or_b32 exec_lo, exec_lo, s0
	v_and_b32_e32 v6, 0xff, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v6, v7
	v_and_b32_e32 v3, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v3, v5
	v_cndmask_b32_e64 v3, v3, v4, s12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 8, v3
	s_and_saveexec_b32 s0, s12
	s_cbranch_execz .LBB9_64
; %bb.63:
	global_store_b8 v[1:2], v3, off offset:3328
.LBB9_64:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b16 v7, 8, v3
	s_and_saveexec_b32 s0, s13
	s_cbranch_execz .LBB9_66
; %bb.65:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v6, v7
	v_and_b32_e32 v3, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v3, v5
	v_cndmask_b32_e64 v3, v3, v4, s13
	global_store_d16_hi_b8 v[1:2], v3, off offset:3584
.LBB9_66:
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3
	s_and_saveexec_b32 s0, s14
; %bb.67:
	v_or_b32_e32 v1, v6, v7
	s_or_b32 s19, s19, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, 0xffff, v1
	v_or_b32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v1, v1, v4, s14
	v_lshrrev_b32_e32 v3, 24, v1
; %bb.68:                               ; %Flow13
	s_or_b32 exec_lo, exec_lo, s0
.LBB9_69:                               ; %Flow12
	s_and_saveexec_b32 s0, s19
	s_cbranch_execz .LBB9_71
; %bb.70:                               ; %_ZN7rocprim26block_store_direct_stripedILj256EN6thrust10device_ptrIhEEhLj16EEEvjT0_RAT2__T1_j.exit.sink.split.i
	s_add_u32 s0, s16, s18
	s_addc_u32 s1, s17, 0
	v_add_co_u32 v0, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s1, 0, s0
	s_waitcnt vmcnt(0)
	global_store_b8 v[0:1], v3, off offset:3840
.LBB9_71:                               ; %_ZN7rocprim6detail21transform_kernel_implILj256ELj16EhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT2_mT3_T4_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 21
		.amdhsa_next_free_sgpr 21
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_,comdat
.Lfunc_end9:
	.size	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_, .Lfunc_end9-_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhPhN6thrust10device_ptrIhEENS_8identityIhEEEEvT1_mT2_T3_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2264
; NumSgprs: 23
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 23
; NumVGPRsForWavesPerEU: 21
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.protected	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_ ; -- Begin function _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.globl	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.p2align	8
	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@function
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_: ; @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
; %bb.0:
	s_load_b64 s[4:5], s[0:1], 0x8
	v_lshl_or_b32 v0, s15, 7, v0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s5, v0
	s_cbranch_execz .LBB10_6
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s3, 9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, s5, 0x7ffffe
	s_sub_i32 s6, 0, s5
	s_add_i32 s5, s5, -1
	v_and_b32_e32 v1, s6, v0
	v_and_b32_e32 v5, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 10, v1
	v_add_nc_u32_e32 v2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v4, s4, v2
	v_min_u32_e32 v2, s4, v1
	v_add_nc_u32_e32 v3, s3, v4
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, s4, v3
	v_lshlrev_b32_e32 v3, 10, v5
	v_sub_nc_u32_e32 v5, v1, v2
	v_sub_nc_u32_e32 v6, v1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, v5, v3
	v_sub_nc_u32_e32 v3, v4, v2
	v_sub_nc_u32_e64 v6, v1, v6 clamp
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v7, v1, v3
	v_cmpx_lt_u32_e64 v6, v7
	s_cbranch_execz .LBB10_5
; %bb.2:                                ; %.lr.ph.i.preheader
	s_load_b64 s[4:5], s[0:1], 0x0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v5
	v_lshlrev_b64 v[10:11], 2, v[4:5]
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v11, vcc_lo
	s_mov_b32 s4, 0
.LBB10_3:                               ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v4, v7, v6
	v_mov_b32_e32 v12, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 1, v4
	v_xad_u32 v11, v4, -1, v1
	v_lshlrev_b64 v[13:14], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v13, vcc_lo, v3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v8, v14, vcc_lo
	v_add_co_u32 v11, vcc_lo, v9, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, v10, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v12, s2, v13
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v11, s2, v11
	v_add_nc_u32_e32 v13, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, v12, v11
	v_dual_cndmask_b32 v7, v7, v4 :: v_dual_cndmask_b32 v6, v13, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v6, v7
	s_or_b32 s4, vcc_lo, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB10_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s4
.LBB10_5:                               ; %Flow58
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v6, v2
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB10_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
.Lfunc_end10:
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, .Lfunc_end10-_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 480
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.protected	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ ; -- Begin function _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.globl	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	8
	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: ; @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[16:19], s[0:1], 0x20
	s_load_b64 s[4:5], s[0:1], 0x30
	s_mov_b32 s3, 0
	s_mov_b32 s6, s15
	s_mov_b32 s7, s3
	s_mov_b32 s11, s3
	v_lshlrev_b32_e32 v17, 2, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s28, s16, 10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s15, s28
	s_cselect_b32 s19, -1, 0
	s_lshl_b64 s[8:9], s[6:7], 2
	s_add_u32 s8, s4, s8
	s_addc_u32 s9, s5, s9
	s_add_i32 s10, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[10:11], 2
	s_add_u32 s4, s4, s10
	s_addc_u32 s5, s5, s11
	s_clause 0x1
	s_load_b32 s2, s[8:9], 0x0
	s_load_b32 s7, s[4:5], 0x0
	s_load_b256 s[8:15], s[0:1], 0x0
	s_lshr_b32 s4, s17, 9
	s_load_b64 s[24:25], s[0:1], 0x44
	s_and_b32 s0, s4, 0x7ffffe
	s_lshl_b32 s20, s6, 10
	s_sub_i32 s1, 0, s0
	s_add_i32 s0, s0, -1
	s_and_b32 s1, s6, s1
	s_and_b32 s5, s0, s6
	s_lshl_b32 s4, s1, 11
	s_lshl_b32 s1, s1, 10
	s_add_i32 s4, s4, s17
	s_sub_i32 s21, s20, s1
	s_sub_i32 s1, s4, s1
	s_add_i32 s4, s4, s21
	s_min_u32 s21, s16, s1
	s_add_i32 s1, s1, s17
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s17, s4, s2
	s_sub_i32 s22, s4, s7
	s_min_u32 s4, s16, s17
	s_addk_i32 s22, 0x400
	s_cmp_eq_u32 s0, s5
	s_mov_b32 s5, s3
	s_cselect_b32 s17, s1, s22
	s_cselect_b32 s7, s21, s7
	s_lshl_b64 s[0:1], s[2:3], 2
	s_min_u32 s23, s17, s16
	s_sub_i32 s17, s7, s2
	s_add_u32 s21, s8, s0
	s_addc_u32 s22, s9, s1
	s_lshl_b64 s[26:27], s[4:5], 2
	s_mov_b32 s0, -1
	s_add_u32 s7, s8, s26
	s_addc_u32 s8, s9, s27
	s_lshr_b32 s5, s24, 16
	s_and_b32 s9, s24, 0xffff
	s_and_b32 s1, s25, 0xffff
	s_mul_i32 s5, s9, s5
	s_cmp_eq_u32 s6, s28
	s_mul_i32 s5, s5, s1
	s_cbranch_scc1 .LBB11_2
; %bb.1:                                ; %.preheader36.i.i.i
	v_mov_b32_e32 v4, 0
	v_subrev_nc_u32_e32 v3, s17, v0
	v_add_co_u32 v7, s0, s21, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, null, s22, 0, s0
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_add_nc_u32_e32 v3, s5, v0
	s_mov_b32 s3, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v9, vcc_lo, s21, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, s22, v6, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_add_co_u32 v5, s0, s7, v1
	v_add_co_ci_u32_e64 v6, s0, s8, v2, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_cmp_gt_u32_e64 s0, s17, v0
	v_lshl_add_u32 v3, s5, 1, v0
	v_cndmask_b32_e64 v6, v6, v8, s0
	v_cndmask_b32_e64 v5, v5, v7, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_add_co_u32 v11, s0, s7, v1
	v_add_co_ci_u32_e64 v2, s0, s8, v2, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s21, v7
	v_add_co_ci_u32_e64 v14, s0, s22, v8, s0
	v_mad_u64_u32 v[7:8], null, s5, 3, v[0:1]
	global_load_b32 v1, v[5:6], off
	v_cmp_gt_u32_e64 s0, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_mov_b32_e32 v8, v4
	v_dual_cndmask_b32 v10, v2, v10 :: v_dual_cndmask_b32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v7
	v_lshlrev_b64 v[11:12], 2, v[7:8]
	global_load_b32 v2, v[9:10], off
	v_add_co_u32 v15, vcc_lo, s7, v5
	v_add_co_ci_u32_e32 v16, vcc_lo, s8, v6, vcc_lo
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_lshl_add_u32 v3, s5, 2, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v8, v15, v13, s0
	v_cndmask_b32_e64 v9, v16, v14, s0
	v_add_co_u32 v15, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[3:4]
	v_add_co_ci_u32_e32 v12, vcc_lo, s22, v12, vcc_lo
	v_add_co_u32 v16, vcc_lo, s21, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v18, vcc_lo, s22, v14, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_add_co_u32 v14, s0, s7, v5
	v_add_co_ci_u32_e64 v13, s0, s8, v6, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_cmp_gt_u32_e64 s0, s17, v7
	v_cndmask_b32_e64 v13, v13, v12, s0
	v_cndmask_b32_e64 v12, v14, v15, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s0, s7, v5
	v_add_co_ci_u32_e64 v7, s0, s8, v6, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v18, vcc_lo
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[10:11], null, s5, 5, v[0:1]
	v_mov_b32_e32 v11, v4
	v_mad_u64_u32 v[14:15], null, s5, 6, v[0:1]
	v_mov_b32_e32 v15, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[10:11]
	v_subrev_nc_u32_e32 v3, s17, v10
	v_lshlrev_b64 v[18:19], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_co_u32 v21, s0, s21, v5
	v_subrev_nc_u32_e32 v3, s17, v14
	v_add_co_ci_u32_e64 v11, s0, s22, v6, s0
	v_lshlrev_b64 v[5:6], 2, v[14:15]
	v_add_co_u32 v15, s0, s7, v18
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_ci_u32_e64 v18, s0, s8, v19, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s1, s21, v5
	v_add_co_ci_u32_e64 v19, s1, s22, v6, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, s1, s7, v3
	v_cmp_gt_u32_e64 s0, s17, v10
	v_add_co_ci_u32_e64 v4, s1, s8, v4, s1
	v_cmp_gt_u32_e64 s1, s17, v14
	v_cndmask_b32_e32 v6, v20, v16, vcc_lo
	v_cndmask_b32_e64 v11, v18, v11, s0
	v_cndmask_b32_e64 v10, v15, v21, s0
	s_mov_b32 s0, 0
	v_cndmask_b32_e64 v15, v4, v19, s1
	v_cndmask_b32_e64 v14, v3, v5, s1
	global_load_b32 v3, v[8:9], off
	global_load_b32 v4, v[12:13], off
	global_load_b32 v5, v[6:7], off
	global_load_b32 v6, v[10:11], off
	global_load_b32 v7, v[14:15], off
	v_mad_u64_u32 v[9:10], null, s5, 7, v[0:1]
	s_branch .LBB11_3
.LBB11_2:
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
                                        ; implicit-def: $vgpr9
.LBB11_3:                               ; %Flow125
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_sub_i32 s6, s23, s4
	s_cbranch_vccnz .LBB11_19
; %bb.4:                                ; %.preheader.i.i.i
	s_add_i32 s1, s6, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB11_6
; %bb.5:
	v_subrev_nc_u32_e32 v1, s17, v0
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, s3, s21, v17
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(3)
	v_add_co_ci_u32_e64 v4, null, s22, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s7, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s8, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v2, v2, v4
	global_load_b32 v1, v[1:2], off
.LBB11_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, s5, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB11_8
; %bb.7:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v2, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s7, v9
	v_add_co_ci_u32_e64 v10, s0, s8, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v2 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v2, v[9:10], off
.LBB11_8:
	s_or_b32 exec_lo, exec_lo, s3
	v_lshl_add_u32 v9, s5, 1, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB11_10
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s7, v9
	v_add_co_ci_u32_e64 v10, s0, s8, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v3, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v3, v[9:10], off
.LBB11_10:
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, s5, 3, v[0:1]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB11_12
; %bb.11:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v4, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s7, v9
	v_add_co_ci_u32_e64 v10, s0, s8, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v4 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v4, v[9:10], off
.LBB11_12:
	s_or_b32 exec_lo, exec_lo, s3
	v_lshl_add_u32 v9, s5, 2, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB11_14
; %bb.13:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v5, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s7, v9
	v_add_co_ci_u32_e64 v10, s0, s8, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v5 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v5, v[9:10], off
.LBB11_14:
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[9:10], null, s5, 5, v[0:1]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB11_16
; %bb.15:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v6, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s7, v9
	v_add_co_ci_u32_e64 v10, s0, s8, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v6 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v6, v[9:10], off
.LBB11_16:
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[9:10], null, s5, 6, v[0:1]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB11_18
; %bb.17:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v7, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s7, v9
	v_add_co_ci_u32_e64 v10, s0, s8, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v7, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v7, v[9:10], off
.LBB11_18:
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[9:10], null, s5, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s1, v9
.LBB11_19:                              ; %Flow126
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s3
	s_cbranch_execz .LBB11_21
; %bb.20:                               ; %_ZN7rocprim6detail11gmem_to_regILj8EjPjEEvRAT__T0_T1_S6_jjb.exit.sink.split.i.i
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v11, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v12, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[8:9], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s0, s7, v8
	v_add_co_ci_u32_e64 v9, s0, s8, v9, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v8, v8, v11 :: v_dual_cndmask_b32 v9, v9, v12
	global_load_b32 v8, v[8:9], off
.LBB11_21:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EjPjEEvRAT__T0_T1_S6_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s1
	v_cndmask_b32_e64 v11, 0, 1, s19
	s_add_u32 s3, s12, s2
	s_addc_u32 s7, s13, 0
	s_add_u32 s4, s12, s4
	s_addc_u32 s9, s13, 0
	s_and_not1_b32 vcc_lo, exec_lo, s19
	s_waitcnt vmcnt(5)
	ds_store_2addr_stride64_b32 v17, v1, v2 offset1:2
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v17, v3, v4 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v17, v5, v6 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v17, v7, v8 offset0:12 offset1:14
	s_cbranch_vccnz .LBB11_23
; %bb.22:                               ; %.preheader36.i93.i.i
	v_subrev_nc_u32_e32 v9, s17, v0
	v_add_co_u32 v10, s0, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v12, null, s7, 0, s0
	v_add_co_u32 v9, s0, s4, v9
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_add_nc_u32_e32 v13, s5, v0
	v_add_co_ci_u32_e64 v14, null, s9, 0, s0
	v_lshl_add_u32 v22, s5, 1, v0
	v_lshl_add_u32 v26, s5, 2, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v15, s17, v13
	v_add_co_u32 v16, s0, s3, v13
	v_add_co_ci_u32_e64 v18, null, s7, 0, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v15, s0, s4, v15
	v_add_co_ci_u32_e64 v19, null, s9, 0, s0
	v_cmp_gt_u32_e64 s0, s17, v13
	v_dual_cndmask_b32 v13, v14, v12 :: v_dual_cndmask_b32 v12, v9, v10
	v_mad_u64_u32 v[9:10], null, s5, 3, v[0:1]
	v_subrev_nc_u32_e32 v14, s17, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v21, v19, v18, s0
	v_cndmask_b32_e64 v20, v15, v16, s0
	v_add_co_u32 v10, s0, s3, v22
	v_add_co_ci_u32_e64 v15, null, s7, 0, s0
	v_subrev_nc_u32_e32 v18, s17, v9
	v_add_co_u32 v14, s0, s4, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v16, null, s9, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s17, v22
	v_add_co_u32 v19, s0, s3, v9
	v_add_co_ci_u32_e64 v24, null, s7, 0, s0
	v_add_co_u32 v18, s0, s4, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v25, null, s9, 0, s0
	v_cmp_gt_u32_e64 s0, s17, v9
	v_dual_cndmask_b32 v23, v16, v15 :: v_dual_cndmask_b32 v22, v14, v10
	v_mad_u64_u32 v[9:10], null, s5, 5, v[0:1]
	v_cndmask_b32_e64 v14, v18, v19, s0
	v_subrev_nc_u32_e32 v16, s17, v26
	v_mad_u64_u32 v[18:19], null, s5, 6, v[0:1]
	v_cndmask_b32_e64 v15, v25, v24, s0
	v_add_co_u32 v28, s0, s3, v26
	v_subrev_nc_u32_e32 v10, s17, v9
	v_mad_u64_u32 v[24:25], null, s5, 7, v[0:1]
	v_add_co_ci_u32_e64 v27, null, s7, 0, s0
	v_add_co_u32 v16, s0, s4, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v29, null, s9, 0, s0
	v_add_co_u32 v30, s0, s3, v9
	v_subrev_nc_u32_e32 v32, s17, v18
	v_add_co_ci_u32_e64 v19, null, s7, 0, s0
	v_add_co_u32 v31, s0, s4, v10
	v_add_co_ci_u32_e64 v10, null, s9, 0, s0
	v_add_co_u32 v33, s0, s3, v18
	v_subrev_nc_u32_e32 v25, s17, v24
	v_add_co_ci_u32_e64 v34, null, s7, 0, s0
	v_add_co_u32 v32, s0, s4, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v35, null, s9, 0, s0
	v_add_co_u32 v36, s0, s3, v24
	v_add_co_ci_u32_e64 v37, null, s7, 0, s0
	v_add_co_u32 v38, s0, s4, v25
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v39, null, s9, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_cmp_gt_u32_e64 s0, s17, v24
	v_cmp_gt_u32_e64 s1, s17, v18
	v_cmp_gt_u32_e64 s2, s17, v26
	s_add_i32 s8, s6, s17
	v_cndmask_b32_e32 v25, v10, v19, vcc_lo
	v_cndmask_b32_e64 v10, v39, v37, s0
	v_cndmask_b32_e64 v9, v38, v36, s0
	v_cndmask_b32_e64 v19, v35, v34, s1
	v_cndmask_b32_e64 v18, v32, v33, s1
	v_cndmask_b32_e32 v24, v31, v30, vcc_lo
	v_cndmask_b32_e64 v27, v29, v27, s2
	v_cndmask_b32_e64 v26, v16, v28, s2
	global_load_u8 v10, v[9:10], off
	global_load_u8 v19, v[18:19], off
	global_load_u8 v18, v[24:25], off
	global_load_u8 v15, v[14:15], off
	global_load_u8 v12, v[12:13], off
	global_load_u8 v16, v[26:27], off
	global_load_u8 v14, v[22:23], off
	global_load_u8 v13, v[20:21], off
	s_mov_b32 s0, 0
	s_branch .LBB11_24
.LBB11_23:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr14
                                        ; implicit-def: $vgpr15
                                        ; implicit-def: $vgpr16
                                        ; implicit-def: $vgpr18
                                        ; implicit-def: $vgpr19
                                        ; implicit-def: $vgpr10
                                        ; implicit-def: $sgpr8
.LBB11_24:                              ; %Flow123
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB11_42
; %bb.25:                               ; %.preheader.i102.i.i
	s_add_i32 s8, s6, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr12
	v_cmpx_gt_u32_e64 s8, v0
	s_cbranch_execz .LBB11_27
; %bb.26:
	v_subrev_nc_u32_e32 v9, s17, v0
	s_waitcnt vmcnt(3)
	v_add_co_u32 v12, s1, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v10, null, s7, 0, s1
	v_add_co_u32 v9, s1, s4, v9
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e64 v13, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v9, v9, v12, vcc_lo
	v_cndmask_b32_e32 v10, v13, v10, vcc_lo
	global_load_u8 v12, v[9:10], off
.LBB11_27:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, s5, v0
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr13
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v9
	s_cbranch_execz .LBB11_29
; %bb.28:
	s_waitcnt vmcnt(7)
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(0)
	v_add_co_u32 v13, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v14, null, s7, 0, s1
	v_add_co_u32 v15, s1, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v14 :: v_dual_cndmask_b32 v9, v15, v13
	global_load_u8 v13, v[9:10], off
.LBB11_29:
	s_or_b32 exec_lo, exec_lo, s0
	v_lshl_add_u32 v9, s5, 1, v0
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr14
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v9
	s_cbranch_execz .LBB11_31
; %bb.30:
	s_waitcnt vmcnt(7)
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(1)
	v_add_co_u32 v14, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v15, null, s7, 0, s1
	v_add_co_u32 v16, s1, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v15 :: v_dual_cndmask_b32 v9, v16, v14
	global_load_u8 v14, v[9:10], off
.LBB11_31:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(7)
	v_mad_u64_u32 v[9:10], null, s5, 3, v[0:1]
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr15
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v9
	s_cbranch_execz .LBB11_33
; %bb.32:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(4)
	v_add_co_u32 v15, s1, s3, v9
	s_waitcnt vmcnt(2)
	v_add_co_ci_u32_e64 v16, null, s7, 0, s1
	v_add_co_u32 v18, s1, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v10, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_cndmask_b32_e32 v9, v18, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v10, v10, v16, vcc_lo
	global_load_u8 v15, v[9:10], off
.LBB11_33:
	s_or_b32 exec_lo, exec_lo, s0
	v_lshl_add_u32 v9, s5, 2, v0
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr16
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v9
	s_cbranch_execz .LBB11_35
; %bb.34:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(2)
	v_add_co_u32 v16, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v18, null, s7, 0, s1
	v_add_co_u32 v19, s1, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v18 :: v_dual_cndmask_b32 v9, v19, v16
	global_load_u8 v16, v[9:10], off
.LBB11_35:
	s_or_b32 exec_lo, exec_lo, s0
	v_mad_u64_u32 v[9:10], null, s5, 5, v[0:1]
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr18
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v9
	s_cbranch_execz .LBB11_37
; %bb.36:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(5)
	v_add_co_u32 v18, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v19, null, s7, 0, s1
	v_add_co_u32 v20, s1, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v19 :: v_dual_cndmask_b32 v9, v20, v18
	global_load_u8 v18, v[9:10], off
.LBB11_37:
	s_or_b32 exec_lo, exec_lo, s0
	v_mad_u64_u32 v[9:10], null, s5, 6, v[0:1]
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr19
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v9
	s_cbranch_execz .LBB11_39
; %bb.38:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(6)
	v_add_co_u32 v19, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v20, null, s7, 0, s1
	v_add_co_u32 v21, s1, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v20 :: v_dual_cndmask_b32 v9, v21, v19
	global_load_u8 v19, v[9:10], off
.LBB11_39:
	s_or_b32 exec_lo, exec_lo, s0
	v_mad_u64_u32 v[9:10], null, s5, 7, v[0:1]
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr10
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v9
	s_cbranch_execz .LBB11_41
; %bb.40:
	v_subrev_nc_u32_e32 v10, s17, v9
	v_add_co_u32 v20, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v21, null, s7, 0, s1
	v_add_co_u32 v22, s1, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v10, null, s9, 0, s1
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_cndmask_b32_e32 v9, v22, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v10, v10, v21, vcc_lo
	global_load_u8 v10, v[9:10], off
.LBB11_41:                              ; %Flow122
	s_or_b32 exec_lo, exec_lo, s0
.LBB11_42:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EhPhEEvRAT__T0_T1_S6_jjb.exit.i.i
	v_lshlrev_b32_e32 v9, 3, v0
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_min_u32_e32 v20, s8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e64 v21, v20, s6 clamp
	v_min_u32_e32 v22, s17, v20
	v_cmpx_lt_u32_e64 v21, v22
	s_cbranch_execz .LBB11_46
; %bb.43:                               ; %.lr.ph.i.preheader.i.i
	v_lshlrev_b32_e32 v23, 2, v20
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v23, s17, 2, v23
.LBB11_44:                              ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v24, v22, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v24, 1, v24
	v_not_b32_e32 v25, v24
	v_add_nc_u32_e32 v27, 1, v24
	v_lshlrev_b32_e32 v26, 2, v24
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v25, v25, 2, v23
	ds_load_b32 v26, v26
	ds_load_b32 v25, v25
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v26, s18, v26
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v25, s18, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, v26, v25
	v_dual_cndmask_b32 v22, v22, v24 :: v_dual_cndmask_b32 v21, v27, v21
	v_cmp_ge_u32_e32 vcc_lo, v21, v22
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB11_44
; %bb.45:                               ; %Flow120
	s_or_b32 exec_lo, exec_lo, s1
.LBB11_46:                              ; %Flow121
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s0
	v_sub_nc_u32_e32 v20, v20, v21
	v_cmp_ge_u32_e32 vcc_lo, s17, v21
                                        ; implicit-def: $vgpr29
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $vgpr26
                                        ; implicit-def: $vgpr23
                                        ; implicit-def: $vgpr22
                                        ; implicit-def: $vgpr25
                                        ; implicit-def: $vgpr24
	v_add_nc_u32_e32 v28, s17, v20
                                        ; implicit-def: $vgpr20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_u32_e64 s0, s8, v28
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB11_52
; %bb.47:                               ; %._crit_edge.i.i.i.i
	v_cmp_gt_u32_e32 vcc_lo, s17, v21
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB11_49
; %bb.48:
	v_lshlrev_b32_e32 v1, 2, v21
	ds_load_b32 v1, v1
.LBB11_49:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_le_u32_e64 s0, s8, v28
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_gt_u32_e64 s8, v28
	s_cbranch_execz .LBB11_51
; %bb.50:
	v_lshlrev_b32_e32 v2, 2, v28
	ds_load_b32 v2, v2
.LBB11_51:                              ; %.loopexit.loopexit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v3, s18, v2
	v_and_b32_e32 v4, s18, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s1, v4, v3
	v_mov_b32_e32 v3, s17
	s_and_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 vcc_lo, s0, s1
	v_cndmask_b32_e32 v24, v28, v21, vcc_lo
	v_dual_cndmask_b32 v4, s8, v3 :: v_dual_add_nc_u32 v5, 1, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v7, v21, v5 :: v_dual_add_nc_u32 v4, -1, v4
	v_min_u32_e32 v4, v5, v4
	v_cndmask_b32_e32 v5, v5, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s0, s17, v7
	v_lshlrev_b32_e32 v4, 2, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s2, s8, v5
	ds_load_b32 v4, v4
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v6, v4, v2, vcc_lo
	v_dual_cndmask_b32 v4, v1, v4 :: v_dual_cndmask_b32 v1, v2, v1
	v_and_b32_e32 v8, s18, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v20, s18, v4
	v_cmp_le_u32_e64 s1, v20, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_or_b32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v25, v5, v7, s0
	v_cndmask_b32_e64 v8, s8, v3, s0
	v_add_nc_u32_e32 v20, 1, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, -1, v8
	v_cndmask_b32_e64 v7, v7, v20, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v8, v20, v8
	v_cndmask_b32_e64 v5, v20, v5, s0
	v_cmp_gt_u32_e64 s1, s17, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v8, 2, v8
	v_cmp_le_u32_e64 s3, s8, v5
	ds_load_b32 v8, v8
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v21, v8, v6, s0
	v_cndmask_b32_e64 v8, v4, v8, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v22, s18, v21
	v_and_b32_e32 v23, s18, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s2, v23, v22
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s3, s1
	v_cndmask_b32_e64 v22, v5, v7, s1
	v_cndmask_b32_e64 v20, s8, v3, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v23, 1, v22
	v_add_nc_u32_e32 v20, -1, v20
	v_cndmask_b32_e64 v2, v6, v4, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v7, v7, v23, s1
	v_min_u32_e32 v20, v23, v20
	v_cndmask_b32_e64 v5, v23, v5, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s2, s17, v7
	v_lshlrev_b32_e32 v20, 2, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s4, s8, v5
	ds_load_b32 v20, v20
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v28, v20, v21, s1
	v_cndmask_b32_e64 v29, v8, v20, s1
	v_and_b32_e32 v20, s18, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v26, s18, v29
	v_cmp_le_u32_e64 s3, v26, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_or_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v23, v5, v7, s2
	v_cndmask_b32_e64 v20, s8, v3, s2
	v_cndmask_b32_e64 v4, v28, v29, s2
	v_add_nc_u32_e32 v26, 1, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v20, -1, v20
	v_cndmask_b32_e64 v7, v7, v26, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v20, v26, v20
	v_cndmask_b32_e64 v5, v26, v5, s2
	v_cmp_gt_u32_e64 s3, s17, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v20, 2, v20
	v_cmp_le_u32_e64 s5, s8, v5
	ds_load_b32 v20, v20
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v30, v20, v28, s2
	v_cndmask_b32_e64 v31, v29, v20, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v20, s18, v30
	v_and_b32_e32 v27, s18, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s4, v27, v20
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s5, s3
	v_cndmask_b32_e64 v20, v5, v7, s3
	v_cndmask_b32_e64 v26, s8, v3, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v27, 1, v20
	v_add_nc_u32_e32 v26, -1, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v27, s3
	v_min_u32_e32 v26, v27, v26
	v_cndmask_b32_e64 v5, v27, v5, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s4, s17, v7
	v_lshlrev_b32_e32 v26, 2, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s6, s8, v5
	ds_load_b32 v26, v26
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v32, v26, v30, s3
	v_cndmask_b32_e64 v33, v31, v26, s3
	v_and_b32_e32 v26, s18, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v34, s18, v33
	v_cmp_le_u32_e64 s5, v34, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, s5
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v5, v7, s4
	v_cndmask_b32_e64 v27, s8, v3, s4
	v_cndmask_b32_e64 v6, v32, v33, s4
	v_add_nc_u32_e32 v34, 1, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v27, -1, v27
	v_cndmask_b32_e64 v7, v7, v34, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v27, v34, v27
	v_cndmask_b32_e64 v5, v34, v5, s4
	v_cmp_gt_u32_e64 s5, s17, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v27, 2, v27
	v_cmp_le_u32_e64 s7, s8, v5
	ds_load_b32 v27, v27
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v35, v27, v32, s4
	v_cndmask_b32_e64 v36, v33, v27, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v27, s18, v35
	v_and_b32_e32 v37, s18, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s6, v37, v27
	s_and_b32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s7, s5
	v_cndmask_b32_e64 v27, v5, v7, s5
	v_cndmask_b32_e64 v3, s8, v3, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v34, 1, v27
	v_add_nc_u32_e32 v3, -1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v39, v7, v34, s5
	v_min_u32_e32 v3, v34, v3
	v_cndmask_b32_e64 v34, v34, v5, s5
	v_cndmask_b32_e64 v5, v30, v31, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_gt_u32_e32 vcc_lo, s17, v39
	v_lshlrev_b32_e32 v3, 2, v3
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v37, v3, v35, s5
	v_cndmask_b32_e64 v38, v36, v3, s5
	v_cndmask_b32_e64 v3, v21, v8, s1
	v_cmp_le_u32_e64 s1, s8, v34
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_and_b32_e32 v7, s18, v37
	v_and_b32_e32 v40, s18, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s0, v40, v7
	v_cndmask_b32_e64 v7, v35, v36, s5
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 vcc_lo, s1, s0
	v_dual_cndmask_b32 v8, v37, v38 :: v_dual_cndmask_b32 v29, v34, v39
.LBB11_52:                              ; %Flow118
	s_or_b32 exec_lo, exec_lo, s9
	s_barrier
	buffer_gl0_inv
	ds_store_b8 v0, v12
	ds_store_b8 v0, v13 offset:128
	ds_store_b8 v0, v14 offset:256
	ds_store_b8 v0, v15 offset:384
	ds_store_b8 v0, v16 offset:512
	ds_store_b8 v0, v18 offset:640
	ds_store_b8 v0, v19 offset:768
	ds_store_b8 v0, v10 offset:896
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u8 v19, v29
	ds_load_u8 v18, v27
	ds_load_u8 v21, v26
	ds_load_u8 v20, v20
	ds_load_u8 v23, v23
	ds_load_u8 v22, v22
	ds_load_u8 v25, v25
	ds_load_u8 v24, v24
	v_lshrrev_b32_e32 v10, 2, v0
	v_cmp_ne_u32_e32 vcc_lo, 1, v11
	s_mov_b32 s21, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	v_add_nc_u32_e32 v26, v10, v9
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	buffer_gl0_inv
	s_barrier
	v_lshlrev_b32_e32 v27, 2, v26
	buffer_gl0_inv
	s_cbranch_vccnz .LBB11_62
; %bb.53:                               ; %.preheader170.i.i.preheader
	v_mov_b32_e32 v9, v27
	s_mov_b64 s[0:1], 0
.LBB11_54:                              ; %.preheader170.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v10, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v9, v10
	v_add_nc_u32_e32 v9, 4, v9
	s_cbranch_scc0 .LBB11_54
; %bb.55:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v28, v0, v9
	v_dual_mov_b32 v16, v8 :: v_dual_mov_b32 v13, v5
	v_dual_mov_b32 v15, v7 :: v_dual_mov_b32 v12, v4
	v_mov_b32_e32 v11, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mov_b32 v14, v6 :: v_dual_lshlrev_b32 v29, 2, v28
	v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v9, v1
.LBB11_56:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v30, v29
	v_add_nc_u32_e32 v29, 0x210, v29
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v9, v30
	s_cbranch_scc1 .LBB11_56
; %bb.57:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	v_and_b32_e32 v29, 0xff, v24
	v_lshlrev_b16 v30, 8, v25
	v_and_b32_e32 v31, 0xff, v22
	v_lshlrev_b16 v32, 8, v23
	v_and_b32_e32 v33, 0xff, v20
	v_lshlrev_b16 v34, 8, v21
	v_and_b32_e32 v35, 0xff, v18
	v_lshlrev_b16 v36, 8, v19
	v_or_b32_e32 v29, v29, v30
	v_or_b32_e32 v30, v31, v32
	v_or_b32_e32 v31, v33, v34
	s_lshl_b64 s[0:1], s[20:21], 2
	v_or_b32_e32 v32, v35, v36
	v_and_b32_e32 v29, 0xffff, v29
	v_lshlrev_b32_e32 v30, 16, v30
	v_and_b32_e32 v31, 0xffff, v31
	s_add_u32 s0, s10, s0
	v_lshlrev_b32_e32 v32, 16, v32
	s_addc_u32 s1, s11, s1
	s_clause 0x7
	global_store_b32 v17, v9, s[0:1]
	global_store_b32 v17, v10, s[0:1] offset:512
	global_store_b32 v17, v11, s[0:1] offset:1024
	global_store_b32 v17, v12, s[0:1] offset:1536
	global_store_b32 v17, v13, s[0:1] offset:2048
	global_store_b32 v17, v14, s[0:1] offset:2560
	global_store_b32 v17, v15, s[0:1] offset:3072
	global_store_b32 v17, v16, s[0:1] offset:3584
	v_mov_b32_e32 v11, v26
	v_or_b32_e32 v9, v29, v30
	v_or_b32_e32 v10, v31, v32
	s_mov_b64 s[0:1], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB11_58:                              ; =>This Inner Loop Header: Depth=1
	s_lshl_b32 s2, s0, 3
	s_add_u32 s0, s0, 1
	v_lshrrev_b64 v[12:13], s2, v[9:10]
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b8 v11, v12
	v_add_nc_u32_e32 v11, 1, v11
	s_cbranch_scc0 .LBB11_58
; %bb.59:
	v_dual_mov_b32 v34, v24 :: v_dual_mov_b32 v33, v22
	v_dual_mov_b32 v36, v25 :: v_dual_mov_b32 v35, v23
	v_dual_mov_b32 v29, v20 :: v_dual_mov_b32 v32, v21
	v_mov_b32_e32 v12, v18
	v_mov_b32_e32 v30, v19
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB11_60:                              ; =>This Inner Loop Header: Depth=1
	ds_load_u8 v14, v28
	v_and_b32_e32 v9, 0xff, v34
	v_lshlrev_b16 v10, 8, v36
	v_and_b32_e32 v11, 0xff, v33
	v_lshlrev_b16 v13, 8, v35
	v_and_b32_e32 v15, 0xff, v29
	v_lshlrev_b16 v16, 8, v32
	v_and_b32_e32 v12, 0xff, v12
	v_lshlrev_b16 v29, 8, v30
	v_or_b32_e32 v9, v9, v10
	v_or_b32_e32 v10, v11, v13
	v_or_b32_e32 v11, v15, v16
	s_lshl_b32 s2, s0, 3
	v_or_b32_e32 v12, v12, v29
	v_and_b32_e32 v9, 0xffff, v9
	v_lshlrev_b32_e32 v10, 16, v10
	v_and_b32_e32 v11, 0xffff, v11
	s_lshl_b64 s[2:3], 0xff, s2
	v_lshlrev_b32_e32 v12, 16, v12
	v_add_nc_u32_e32 v28, 0x84, v28
	v_or_b32_e32 v9, v9, v10
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	v_or_b32_e32 v10, v11, v12
	s_waitcnt lgkmcnt(0)
	v_perm_b32 v11, v14, v14, 0x4040404
	s_cmp_lg_u32 s0, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_bfi_b32 v10, s3, v11, v10
	v_bfi_b32 v9, s2, v11, v9
	v_lshrrev_b32_e32 v14, 16, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_lshrrev_b64 v[11:12], 24, v[9:10]
	v_lshrrev_b32_e32 v16, 16, v9
	v_lshrrev_b32_e32 v13, 24, v10
	v_lshrrev_b32_e32 v15, 8, v10
	v_lshrrev_b32_e32 v31, 8, v9
	v_and_b32_e32 v30, 0xff, v14
	v_and_b32_e32 v29, 0xff, v16
	v_lshlrev_b16 v12, 8, v13
	v_lshlrev_b16 v32, 8, v11
	v_lshlrev_b16 v34, 8, v31
	v_lshlrev_b16 v35, 8, v15
	v_and_b32_e32 v38, 0xff, v10
	v_or_b32_e32 v12, v30, v12
	v_or_b32_e32 v33, v29, v32
	v_and_b32_e32 v30, 0xffff, v34
	v_and_b32_e32 v32, 0xffff, v35
	v_and_b32_e32 v29, 0xff, v9
	v_lshlrev_b32_e32 v36, 16, v12
	v_lshlrev_b32_e32 v37, 16, v33
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v34, v29, v34
	v_or_b32_e32 v32, v32, v36
	s_delay_alu instid0(VALU_DEP_3)
	v_or_b32_e32 v39, v30, v37
	v_or_b32_e32 v29, v38, v35
	v_lshrrev_b32_e32 v30, 24, v36
	v_lshrrev_b32_e32 v35, 24, v37
	v_lshrrev_b32_e32 v32, 8, v32
	v_lshrrev_b32_e32 v36, 8, v39
	s_cbranch_scc1 .LBB11_60
; %bb.61:                               ; %_ZN7rocprim11block_storeIhLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIhEEEEvT_RA8_hRNS_14block_exchangeIhLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_add_u32 s0, s14, s20
	s_addc_u32 s1, s15, 0
	v_add_co_u32 v28, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v29, null, s1, 0, s0
	s_mov_b32 s0, 0
	s_mov_b32 s8, -1
	s_clause 0x6
	global_store_b8 v[28:29], v9, off
	global_store_b8 v[28:29], v31, off offset:128
	global_store_b8 v[28:29], v16, off offset:256
	global_store_b8 v[28:29], v11, off offset:384
	global_store_b8 v[28:29], v10, off offset:512
	global_store_b8 v[28:29], v15, off offset:640
	global_store_b8 v[28:29], v14, off offset:768
	s_branch .LBB11_63
.LBB11_62:
	s_mov_b32 s0, -1
	s_mov_b32 s8, s21
                                        ; implicit-def: $vgpr13
.LBB11_63:                              ; %Flow
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB11_103
; %bb.64:                               ; %.preheader.i.i.preheader
	s_mov_b64 s[0:1], 0
.LBB11_65:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v9, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v27, v9
	v_add_nc_u32_e32 v27, 4, v27
	s_cbranch_scc0 .LBB11_65
; %bb.66:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v11, v0, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v9, 2, v11
.LBB11_67:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v10, v9
	v_add_nc_u32_e32 v9, 0x210, v9
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v1, v10
	s_cbranch_scc1 .LBB11_67
; %bb.68:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[0:1], s[20:21], 2
	s_sub_i32 s6, s16, s20
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	v_add_co_u32 v9, s0, s0, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, null, s1, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s6, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB11_70
; %bb.69:
	global_store_b32 v[9:10], v1, off
.LBB11_70:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v1, 0x80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s6, v1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB11_72
; %bb.71:
	global_store_b32 v[9:10], v2, off offset:512
.LBB11_72:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v1, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s6, v1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB11_74
; %bb.73:
	global_store_b32 v[9:10], v3, off offset:1024
.LBB11_74:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v1, 0x180, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s6, v1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB11_76
; %bb.75:
	global_store_b32 v[9:10], v4, off offset:1536
.LBB11_76:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v1, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s6, v1
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB11_78
; %bb.77:
	global_store_b32 v[9:10], v5, off offset:2048
.LBB11_78:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v1, 0x280, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s6, v1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB11_80
; %bb.79:
	global_store_b32 v[9:10], v6, off offset:2560
.LBB11_80:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v1, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s6, v1
	s_and_saveexec_b32 s7, s5
	s_cbranch_execz .LBB11_82
; %bb.81:
	global_store_b32 v[9:10], v7, off offset:3072
.LBB11_82:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v1, 0x380, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s6, v1
	s_and_saveexec_b32 s6, s8
	s_cbranch_execz .LBB11_84
; %bb.83:
	global_store_b32 v[9:10], v8, off offset:3584
.LBB11_84:                              ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jjRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s6
	v_and_b32_e32 v1, 0xff, v24
	v_lshlrev_b16 v2, 8, v25
	v_and_b32_e32 v3, 0xff, v22
	v_lshlrev_b16 v4, 8, v23
	v_and_b32_e32 v5, 0xff, v20
	v_lshlrev_b16 v6, 8, v21
	v_and_b32_e32 v7, 0xff, v18
	v_lshlrev_b16 v8, 8, v19
	v_or_b32_e32 v1, v1, v2
	v_or_b32_e32 v2, v3, v4
	v_or_b32_e32 v3, v5, v6
	s_mov_b64 s[6:7], 0
	v_or_b32_e32 v4, v7, v8
	v_and_b32_e32 v1, 0xffff, v1
	v_lshlrev_b32_e32 v2, 16, v2
	v_and_b32_e32 v3, 0xffff, v3
	s_waitcnt_vscnt null, 0x0
	v_lshlrev_b32_e32 v4, 16, v4
	s_barrier
	v_or_b32_e32 v1, v1, v2
	buffer_gl0_inv
	v_or_b32_e32 v2, v3, v4
.LBB11_85:                              ; =>This Inner Loop Header: Depth=1
	s_lshl_b32 s9, s6, 3
	s_add_u32 s6, s6, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b64 v[3:4], s9, v[1:2]
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s6, 8
	ds_store_b8 v26, v3
	v_add_nc_u32_e32 v26, 1, v26
	s_cbranch_scc0 .LBB11_85
; %bb.86:
	s_mov_b64 s[6:7], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB11_87:                              ; =>This Inner Loop Header: Depth=1
	ds_load_u8 v5, v11
	v_and_b32_e32 v1, 0xff, v24
	v_lshlrev_b16 v2, 8, v25
	v_and_b32_e32 v3, 0xff, v22
	v_lshlrev_b16 v4, 8, v23
	v_and_b32_e32 v6, 0xff, v20
	v_lshlrev_b16 v7, 8, v21
	v_and_b32_e32 v8, 0xff, v18
	v_lshlrev_b16 v9, 8, v19
	v_or_b32_e32 v1, v1, v2
	v_or_b32_e32 v2, v3, v4
	v_or_b32_e32 v3, v6, v7
	s_lshl_b32 s9, s6, 3
	v_or_b32_e32 v4, v8, v9
	v_and_b32_e32 v1, 0xffff, v1
	v_lshlrev_b32_e32 v2, 16, v2
	v_and_b32_e32 v3, 0xffff, v3
	s_lshl_b64 s[10:11], 0xff, s9
	v_lshlrev_b32_e32 v4, 16, v4
	v_add_nc_u32_e32 v11, 0x84, v11
	v_or_b32_e32 v1, v1, v2
	s_add_u32 s6, s6, 1
	s_addc_u32 s7, s7, 0
	v_or_b32_e32 v2, v3, v4
	s_waitcnt lgkmcnt(0)
	v_perm_b32 v3, v5, v5, 0x4040404
	s_cmp_lg_u32 s6, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_bfi_b32 v2, s11, v3, v2
	v_bfi_b32 v1, s10, v3, v1
	v_lshrrev_b32_e32 v6, 16, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_lshrrev_b64 v[3:4], 24, v[1:2]
	v_lshrrev_b32_e32 v8, 16, v1
	v_lshrrev_b32_e32 v13, 24, v2
	v_lshrrev_b32_e32 v7, 8, v2
	v_lshrrev_b32_e32 v9, 8, v1
	v_and_b32_e32 v10, 0xff, v6
	v_and_b32_e32 v4, 0xff, v8
	v_lshlrev_b16 v5, 8, v13
	v_lshlrev_b16 v12, 8, v3
	v_lshlrev_b16 v14, 8, v9
	v_lshlrev_b16 v15, 8, v7
	v_and_b32_e32 v17, 0xff, v2
	v_or_b32_e32 v18, v10, v5
	v_or_b32_e32 v22, v4, v12
	v_and_b32_e32 v4, 0xff, v1
	v_and_b32_e32 v5, 0xffff, v14
	v_and_b32_e32 v10, 0xffff, v15
	v_lshlrev_b32_e32 v12, 16, v18
	v_lshlrev_b32_e32 v16, 16, v22
	v_or_b32_e32 v24, v4, v14
	v_or_b32_e32 v20, v17, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_or_b32_e32 v4, v10, v12
	v_or_b32_e32 v5, v5, v16
	v_lshrrev_b32_e32 v19, 24, v12
	v_lshrrev_b32_e32 v23, 24, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshrrev_b32_e32 v21, 8, v4
	v_lshrrev_b32_e32 v25, 8, v5
	s_cbranch_scc1 .LBB11_87
; %bb.88:                               ; %_ZN7rocprim14block_exchangeIhLj128ELj8ELj1ELj1EE18blocked_to_stripedIhEEvRA8_KhRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_add_u32 s6, s14, s20
	s_addc_u32 s7, s15, 0
	v_add_co_u32 v4, s6, s6, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, null, s7, 0, s6
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB11_90
; %bb.89:
	global_store_b8 v[4:5], v1, off
.LBB11_90:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB11_92
; %bb.91:
	global_store_b8 v[4:5], v9, off offset:128
.LBB11_92:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB11_94
; %bb.93:
	global_store_b8 v[4:5], v8, off offset:256
.LBB11_94:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB11_96
; %bb.95:
	global_store_b8 v[4:5], v3, off offset:384
.LBB11_96:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB11_98
; %bb.97:
	global_store_b8 v[4:5], v2, off offset:512
.LBB11_98:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB11_100
; %bb.99:
	global_store_b8 v[4:5], v7, off offset:640
.LBB11_100:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB11_102
; %bb.101:
	global_store_b8 v[4:5], v6, off offset:768
.LBB11_102:
	s_or_b32 exec_lo, exec_lo, s0
.LBB11_103:                             ; %Flow116
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB11_105
; %bb.104:                              ; %_ZN7rocprim11block_storeIhLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIhEEEEvT_RA8_hjRNS_14block_exchangeIhLj128ELj8ELj1ELj1EE13storage_type_E.exit.sink.split.i.i.i
	s_add_u32 s0, s14, s20
	s_addc_u32 s1, s15, 0
	v_add_co_u32 v0, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s1, 0, s0
	global_store_b8 v[0:1], v13, off offset:896
.LBB11_105:                             ; %_ZN7rocprim6detail28block_merge_mergepath_kernelILj128ELj8EPjN6thrust10device_ptrIjEEPhNS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_PKSF_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 41
		.amdhsa_next_free_sgpr 29
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
.Lfunc_end11:
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end11-_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 7232
; NumSgprs: 31
; NumVgprs: 41
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 31
; NumVGPRsForWavesPerEU: 41
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.protected	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ ; -- Begin function _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.globl	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	8
	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: ; @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
; %bb.0:
	s_load_b128 s[16:19], s[0:1], 0x20
	s_lshl_b32 s2, s15, 7
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s3, s16, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB12_28
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_lshr_b32 s0, s16, 7
	s_mov_b32 s3, 0
	s_cmp_lg_u32 s15, s0
	v_lshlrev_b32_e32 v1, 2, v0
	s_cselect_b32 s1, -1, 0
	s_lshl_b64 s[12:13], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s4, s12
	s_addc_u32 s13, s5, s13
	s_add_u32 s8, s8, s2
	s_addc_u32 s9, s9, 0
	s_lshr_b32 s0, s17, 7
	global_load_u8 v3, v0, s[8:9]
	global_load_b32 v4, v1, s[12:13]
	s_sub_i32 s8, 0, s0
	s_sub_i32 s9, 0, s17
	s_and_b32 s8, s15, s8
	v_add_nc_u32_e32 v0, s2, v0
	s_and_b32 s0, s8, s0
	s_lshl_b32 s8, s8, 7
	s_cmp_eq_u32 s0, 0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s12, s0, exec_lo
	s_cselect_b32 s9, s17, s9
	s_add_i32 s9, s9, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s9, s16
	s_cbranch_scc1 .LBB12_4
; %bb.2:
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB12_5
; %bb.3:                                ; %.critedge68.i
	v_mov_b32_e32 v1, 0
	s_mov_b32 s3, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, s2, s10, v0
	v_add_co_ci_u32_e64 v2, null, s11, 0, s2
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
	s_branch .LBB12_6
.LBB12_4:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr1_vgpr2
	s_branch .LBB12_11
.LBB12_5:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB12_6:                               ; %Flow37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB12_10
; %bb.7:
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2
	v_cmpx_gt_u32_e64 s16, v0
	s_cbranch_execz .LBB12_9
; %bb.8:
	v_mov_b32_e32 v1, 0
	s_or_b32 s3, s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_u32 v1, s12, s10, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_ci_u32_e64 v2, null, s11, 0, s12
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB12_9:                               ; %Flow39
	s_or_b32 exec_lo, exec_lo, s2
.LBB12_10:                              ; %Flow38
	s_mov_b32 s2, 0
.LBB12_11:                              ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB12_26
; %bb.12:
	s_min_u32 s2, s9, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s12, s2, s17
	s_min_u32 s13, s8, s2
	s_add_i32 s8, s8, s2
	s_min_u32 s3, s12, s16
	s_cmp_gt_u32 s12, s9
	v_subrev_nc_u32_e32 v0, s8, v0
	s_cselect_b32 s8, -1, 0
	s_and_b32 vcc_lo, exec_lo, s1
	v_cndmask_b32_e64 v1, 0, 1, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, s13, v0
	v_cmp_ne_u32_e64 s1, 1, v1
	s_cbranch_vccz .LBB12_18
; %bb.13:                               ; %.critedge72.i
	v_mov_b32_e32 v2, s2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB12_17
; %bb.14:                               ; %.lr.ph.i84.preheader.i
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v7, s3 :: v_dual_and_b32 v6, s18, v4
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, 0
	s_mov_b32 s1, 0
.LBB12_15:                              ; %.lr.ph.i84.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v7
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[0:1]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v8, s18, v8
	v_cmp_gt_u32_e32 vcc_lo, v6, v8
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v8, v6
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_add_nc_u32_e32 v9, 1, v0
	v_and_b32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 1, v8
	v_dual_cndmask_b32 v7, v0, v7 :: v_dual_cndmask_b32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v7
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB12_15
; %bb.16:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
.LBB12_17:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEEPhNS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit90.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, s1, s10, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s11, 0, s1
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v4, off
	s_branch .LBB12_19
.LBB12_18:
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB12_19:                              ; %Flow34
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB12_25
; %bb.20:
	v_mov_b32_e32 v2, s2
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB12_24
; %bb.21:                               ; %.lr.ph.i.preheader.i
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v7, s3 :: v_dual_and_b32 v6, s18, v4
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, 0
	s_mov_b32 s1, 0
.LBB12_22:                              ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v7
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[0:1]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v8, s18, v8
	v_cmp_gt_u32_e32 vcc_lo, v6, v8
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v8, v6
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_add_nc_u32_e32 v9, 1, v0
	v_and_b32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 1, v8
	v_dual_cndmask_b32 v7, v0, v7 :: v_dual_cndmask_b32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v7
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB12_22
; %bb.23:                               ; %Flow32
	s_or_b32 exec_lo, exec_lo, s1
.LBB12_24:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEEPhNS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_u32 v1, s0, s10, v0
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_ci_u32_e64 v2, null, s11, 0, s0
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB12_25:                              ; %Flow35
	s_mov_b32 s3, -1
.LBB12_26:                              ; %Flow40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB12_28
; %bb.27:                               ; %.critedge.sink.split.i
	s_waitcnt vmcnt(1)
	global_store_b8 v[1:2], v3, off
.LBB12_28:                              ; %_ZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEEPhNS4_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
.Lfunc_end12:
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end12-_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 992
; NumSgprs: 22
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.protected	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_ ; -- Begin function _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.globl	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.p2align	8
	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@function
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_: ; @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
; %bb.0:
	s_load_b64 s[4:5], s[0:1], 0x8
	v_lshl_or_b32 v0, s15, 7, v0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s5, v0
	s_cbranch_execz .LBB13_6
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s3, 9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, s5, 0x7ffffe
	s_sub_i32 s6, 0, s5
	s_add_i32 s5, s5, -1
	v_and_b32_e32 v1, s6, v0
	v_and_b32_e32 v5, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 10, v1
	v_add_nc_u32_e32 v2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v4, s4, v2
	v_min_u32_e32 v2, s4, v1
	v_add_nc_u32_e32 v3, s3, v4
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, s4, v3
	v_lshlrev_b32_e32 v3, 10, v5
	v_sub_nc_u32_e32 v5, v1, v2
	v_sub_nc_u32_e32 v6, v1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, v5, v3
	v_sub_nc_u32_e32 v3, v4, v2
	v_sub_nc_u32_e64 v6, v1, v6 clamp
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v7, v1, v3
	v_cmpx_lt_u32_e64 v6, v7
	s_cbranch_execz .LBB13_5
; %bb.2:                                ; %.lr.ph.i.preheader
	s_load_b64 s[4:5], s[0:1], 0x0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v5
	v_lshlrev_b64 v[10:11], 2, v[4:5]
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v11, vcc_lo
	s_mov_b32 s4, 0
.LBB13_3:                               ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v4, v7, v6
	v_mov_b32_e32 v12, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 1, v4
	v_xad_u32 v11, v4, -1, v1
	v_lshlrev_b64 v[13:14], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v13, vcc_lo, v3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v8, v14, vcc_lo
	v_add_co_u32 v11, vcc_lo, v9, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, v10, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v12, s2, v13
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v11, s2, v11
	v_add_nc_u32_e32 v13, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, v12, v11
	v_dual_cndmask_b32 v7, v7, v4 :: v_dual_cndmask_b32 v6, v13, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v6, v7
	s_or_b32 s4, vcc_lo, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB13_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s4
.LBB13_5:                               ; %Flow58
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v6, v2
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB13_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
.Lfunc_end13:
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, .Lfunc_end13-_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 480
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.protected	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ ; -- Begin function _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.globl	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	8
	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: ; @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[16:19], s[0:1], 0x20
	s_load_b64 s[4:5], s[0:1], 0x30
	s_mov_b32 s3, 0
	s_mov_b32 s6, s15
	s_mov_b32 s7, s3
	s_mov_b32 s11, s3
	v_lshlrev_b32_e32 v17, 2, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s23, s16, 10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s15, s23
	s_cselect_b32 s19, -1, 0
	s_lshl_b64 s[8:9], s[6:7], 2
	s_add_u32 s8, s4, s8
	s_addc_u32 s9, s5, s9
	s_add_i32 s10, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[10:11], 2
	s_add_u32 s4, s4, s10
	s_addc_u32 s5, s5, s11
	s_clause 0x1
	s_load_b32 s2, s[8:9], 0x0
	s_load_b32 s7, s[4:5], 0x0
	s_load_b256 s[8:15], s[0:1], 0x0
	s_lshr_b32 s4, s17, 9
	s_load_b64 s[24:25], s[0:1], 0x44
	s_and_b32 s0, s4, 0x7ffffe
	s_lshl_b32 s20, s6, 10
	s_sub_i32 s1, 0, s0
	s_add_i32 s0, s0, -1
	s_and_b32 s1, s6, s1
	s_and_b32 s5, s0, s6
	s_lshl_b32 s4, s1, 11
	s_lshl_b32 s1, s1, 10
	s_add_i32 s4, s4, s17
	s_sub_i32 s21, s20, s1
	s_sub_i32 s1, s4, s1
	s_add_i32 s4, s4, s21
	s_min_u32 s21, s16, s1
	s_add_i32 s1, s1, s17
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s17, s4, s2
	s_sub_i32 s22, s4, s7
	s_min_u32 s4, s16, s17
	s_addk_i32 s22, 0x400
	s_cmp_eq_u32 s0, s5
	s_mov_b32 s5, s3
	s_cselect_b32 s17, s1, s22
	s_cselect_b32 s7, s21, s7
	s_lshl_b64 s[0:1], s[2:3], 2
	s_min_u32 s22, s17, s16
	s_sub_i32 s17, s7, s2
	s_add_u32 s7, s8, s0
	s_addc_u32 s21, s9, s1
	s_lshl_b64 s[26:27], s[4:5], 2
	s_mov_b32 s0, -1
	s_add_u32 s8, s8, s26
	s_addc_u32 s9, s9, s27
	s_lshr_b32 s5, s24, 16
	s_and_b32 s24, s24, 0xffff
	s_and_b32 s1, s25, 0xffff
	s_mul_i32 s5, s24, s5
	s_cmp_eq_u32 s6, s23
	s_mul_i32 s5, s5, s1
	s_cbranch_scc1 .LBB14_2
; %bb.1:                                ; %.preheader38.i.i.i
	v_subrev_nc_u32_e32 v3, s17, v0
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v5, s5, v0
	v_add_co_u32 v7, s0, s7, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, null, s21, 0, s0
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v3, s17, v5
	v_lshl_add_u32 v9, s5, 1, v0
	s_mov_b32 s3, -1
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_mov_b32 v6, v4 :: v_dual_cndmask_b32 v1, v1, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_lshlrev_b64 v[10:11], 2, v[5:6]
	v_subrev_nc_u32_e32 v3, s17, v9
	global_load_b32 v1, v[1:2], off
	v_add_co_u32 v7, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	v_add_co_u32 v12, vcc_lo, s7, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v11, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v5
	v_mov_b32_e32 v10, v4
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v7, v7, v12 :: v_dual_cndmask_b32 v8, v8, v11
	v_lshlrev_b64 v[10:11], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v2, v[7:8], off
	v_add_co_u32 v14, vcc_lo, s7, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s21, v11, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v9, v12, v14, vcc_lo
	v_cndmask_b32_e32 v10, v13, v10, vcc_lo
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[5:6], null, s5, 3, v[0:1]
	v_mov_b32_e32 v6, v4
	v_mad_u64_u32 v[13:14], null, s5, 5, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v3, s17, v5
	v_lshlrev_b64 v[11:12], 2, v[5:6]
	v_lshl_add_u32 v6, s5, 2, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_u32 v16, vcc_lo, s8, v7
	v_mov_b32_e32 v7, v4
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	v_add_co_u32 v18, vcc_lo, s7, v11
	v_add_co_ci_u32_e32 v15, vcc_lo, s21, v12, vcc_lo
	v_lshlrev_b64 v[11:12], 2, v[3:4]
	v_cmp_gt_u32_e32 vcc_lo, s17, v5
	v_subrev_nc_u32_e32 v3, s17, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v8, v15, vcc_lo
	v_lshlrev_b64 v[14:15], 2, v[6:7]
	v_add_co_u32 v5, s0, s8, v11
	v_add_co_ci_u32_e64 v19, s0, s9, v12, s0
	v_mad_u64_u32 v[11:12], null, s5, 6, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s0, s7, v14
	v_add_co_ci_u32_e64 v12, s0, s21, v15, s0
	v_mov_b32_e32 v14, v4
	v_cndmask_b32_e32 v7, v16, v18, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v6
	v_lshlrev_b64 v[15:16], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v11
	v_cndmask_b32_e32 v6, v19, v12, vcc_lo
	v_lshlrev_b64 v[18:19], 2, v[13:14]
	v_mov_b32_e32 v12, v4
	v_add_co_u32 v21, s0, s8, v15
	v_lshlrev_b64 v[14:15], 2, v[3:4]
	v_add_co_ci_u32_e64 v16, s0, s9, v16, s0
	v_add_co_u32 v18, s0, s7, v18
	v_lshlrev_b64 v[3:4], 2, v[11:12]
	v_add_co_ci_u32_e64 v19, s0, s21, v19, s0
	v_cmp_gt_u32_e64 s0, s17, v13
	v_add_co_u32 v13, s1, s8, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s1, s9, v15, s1
	v_add_co_u32 v3, s1, s7, v3
	v_add_co_ci_u32_e64 v4, s1, s21, v4, s1
	v_cmp_gt_u32_e64 s1, s17, v11
	v_cndmask_b32_e32 v5, v5, v20, vcc_lo
	v_cndmask_b32_e64 v12, v16, v19, s0
	v_cndmask_b32_e64 v11, v21, v18, s0
	s_mov_b32 s0, 0
	v_cndmask_b32_e64 v14, v14, v4, s1
	v_cndmask_b32_e64 v13, v13, v3, s1
	global_load_b32 v3, v[9:10], off
	global_load_b32 v4, v[7:8], off
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[11:12], off
	global_load_b32 v7, v[13:14], off
	v_mad_u64_u32 v[9:10], null, s5, 7, v[0:1]
	s_branch .LBB14_3
.LBB14_2:
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
.LBB14_3:                               ; %Flow124
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_sub_i32 s6, s22, s4
	s_cbranch_vccnz .LBB14_19
; %bb.4:                                ; %.preheader.i.i.i
	s_add_i32 s1, s6, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB14_6
; %bb.5:
	v_subrev_nc_u32_e32 v1, s17, v0
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, s3, s7, v17
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(3)
	v_add_co_ci_u32_e64 v4, null, s21, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v2, v2, v4
	global_load_b32 v1, v[1:2], off
.LBB14_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, s5, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB14_8
; %bb.7:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v2, vcc_lo, s7, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v2 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v2, v[9:10], off
.LBB14_8:
	s_or_b32 exec_lo, exec_lo, s3
	v_lshl_add_u32 v9, s5, 1, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB14_10
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, vcc_lo, s7, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v3, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v3, v[9:10], off
.LBB14_10:
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, s5, 3, v[0:1]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB14_12
; %bb.11:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v4, vcc_lo, s7, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v4 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v4, v[9:10], off
.LBB14_12:
	s_or_b32 exec_lo, exec_lo, s3
	v_lshl_add_u32 v9, s5, 2, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB14_14
; %bb.13:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v5, vcc_lo, s7, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v5 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v5, v[9:10], off
.LBB14_14:
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[9:10], null, s5, 5, v[0:1]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB14_16
; %bb.15:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v6, vcc_lo, s7, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v6 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v6, v[9:10], off
.LBB14_16:
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[9:10], null, s5, 6, v[0:1]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB14_18
; %bb.17:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v7, vcc_lo, s7, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v7, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v7, v[9:10], off
.LBB14_18:
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[9:10], null, s5, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s1, v9
.LBB14_19:                              ; %Flow125
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB14_21
; %bb.20:                               ; %.loopexit.sink.split.i.i.i
	v_mov_b32_e32 v12, 0
	v_subrev_nc_u32_e32 v11, s17, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v10, v12
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[9:10]
	v_add_co_u32 v8, vcc_lo, s8, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v12, vcc_lo
	v_add_co_u32 v11, vcc_lo, s7, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s21, v14, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v9, v10, v12 :: v_dual_cndmask_b32 v8, v8, v11
	global_load_b32 v8, v[8:9], off
.LBB14_21:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EjN6thrust10device_ptrIjEEEEvRAT__T0_T1_S8_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s0
	v_cndmask_b32_e64 v11, 0, 1, s19
	s_add_u32 s3, s12, s2
	s_addc_u32 s7, s13, 0
	s_add_u32 s4, s12, s4
	s_mov_b32 s1, 0
	s_addc_u32 s8, s13, 0
	s_and_not1_b32 vcc_lo, exec_lo, s19
	s_waitcnt vmcnt(5)
	ds_store_2addr_stride64_b32 v17, v1, v2 offset1:2
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v17, v3, v4 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v17, v5, v6 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v17, v7, v8 offset0:12 offset1:14
	s_cbranch_vccnz .LBB14_23
; %bb.22:                               ; %.preheader38.i91.i.i
	v_subrev_nc_u32_e32 v9, s17, v0
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_lshl_add_u32 v18, s5, 1, v0
	v_lshl_add_u32 v26, s5, 2, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s4, v9
	v_add_co_ci_u32_e64 v10, null, s8, 0, s0
	v_add_co_u32 v14, s0, s3, v0
	v_add_nc_u32_e32 v12, s5, v0
	v_add_co_ci_u32_e64 v13, null, s7, 0, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v9, v9, v14, vcc_lo
	v_subrev_nc_u32_e32 v22, s17, v18
	v_subrev_nc_u32_e32 v15, s17, v12
	v_cmp_gt_u32_e64 s2, s17, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v15, s0, s4, v15
	v_add_co_ci_u32_e64 v16, null, s8, 0, s0
	v_add_co_u32 v19, s0, s3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v20, null, s7, 0, s0
	v_cmp_gt_u32_e64 s0, s17, v12
	v_cndmask_b32_e64 v21, v16, v20, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v20, v15, v19, s0
	v_add_co_u32 v15, s0, s4, v22
	v_add_co_ci_u32_e64 v16, null, s8, 0, s0
	v_add_co_u32 v19, s0, s3, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v22, null, s7, 0, s0
	v_cndmask_b32_e32 v10, v10, v13, vcc_lo
	v_mad_u64_u32 v[12:13], null, s5, 3, v[0:1]
	v_cmp_gt_u32_e32 vcc_lo, s17, v18
	v_cndmask_b32_e32 v23, v16, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v13, s17, v12
	v_add_co_u32 v24, s0, s4, v13
	v_mad_u64_u32 v[13:14], null, s5, 5, v[0:1]
	v_add_co_ci_u32_e64 v18, null, s8, 0, s0
	v_add_co_u32 v25, s0, s3, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, null, s7, 0, s0
	v_cndmask_b32_e32 v22, v15, v19, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v12
	v_mad_u64_u32 v[15:16], null, s5, 6, v[0:1]
	v_subrev_nc_u32_e32 v12, s17, v26
	v_cmp_gt_u32_e64 s1, s17, v13
	v_cndmask_b32_e32 v14, v18, v14, vcc_lo
	v_subrev_nc_u32_e32 v18, s17, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v12, s0, s4, v12
	v_add_co_ci_u32_e64 v27, null, s8, 0, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v28, s0, s4, v18
	v_subrev_nc_u32_e32 v18, s17, v15
	v_add_co_ci_u32_e64 v16, null, s8, 0, s0
	v_add_co_u32 v29, s0, s3, v13
	v_cndmask_b32_e32 v13, v24, v25, vcc_lo
	v_add_co_ci_u32_e64 v19, null, s7, 0, s0
	v_add_co_u32 v18, s0, s4, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v30, null, s8, 0, s0
	v_add_co_u32 v31, s0, s3, v15
	v_add_co_ci_u32_e64 v32, null, s7, 0, s0
	v_add_co_u32 v33, s0, s3, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v34, null, s7, 0, s0
	v_cmp_gt_u32_e64 s0, s17, v15
	v_cndmask_b32_e64 v16, v16, v19, s1
	v_cndmask_b32_e64 v15, v28, v29, s1
	v_cndmask_b32_e64 v25, v27, v34, s2
	v_cndmask_b32_e64 v24, v12, v33, s2
	v_cndmask_b32_e64 v19, v30, v32, s0
	v_cndmask_b32_e64 v18, v18, v31, s0
	global_load_u8 v19, v[18:19], off
	global_load_u8 v18, v[15:16], off
	global_load_u8 v15, v[13:14], off
	global_load_u8 v12, v[9:10], off
	global_load_u8 v16, v[24:25], off
	global_load_u8 v14, v[22:23], off
	global_load_u8 v13, v[20:21], off
	v_mad_u64_u32 v[9:10], null, s5, 7, v[0:1]
	s_mov_b32 s2, 0
	s_add_i32 s0, s6, s17
	s_mov_b32 s1, -1
	s_branch .LBB14_24
.LBB14_23:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr14
                                        ; implicit-def: $vgpr15
                                        ; implicit-def: $vgpr16
                                        ; implicit-def: $vgpr18
                                        ; implicit-def: $vgpr19
                                        ; implicit-def: $sgpr0
.LBB14_24:                              ; %Flow122
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB14_40
; %bb.25:                               ; %.preheader.i102.i.i
	s_add_i32 s0, s6, s17
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr12
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB14_27
; %bb.26:
	v_subrev_nc_u32_e32 v9, s17, v0
	s_waitcnt vmcnt(3)
	v_add_co_u32 v12, s2, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v10, null, s7, 0, s2
	v_add_co_u32 v9, s2, s4, v9
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e64 v13, null, s8, 0, s2
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v9, v9, v12, vcc_lo
	v_cndmask_b32_e32 v10, v13, v10, vcc_lo
	global_load_u8 v12, v[9:10], off
.LBB14_27:
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v9, s5, v0
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr13
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s0, v9
	s_cbranch_execz .LBB14_29
; %bb.28:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(0)
	v_add_co_u32 v13, s2, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v14, null, s7, 0, s2
	v_add_co_u32 v15, s2, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s8, 0, s2
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v14 :: v_dual_cndmask_b32 v9, v15, v13
	global_load_u8 v13, v[9:10], off
.LBB14_29:
	s_or_b32 exec_lo, exec_lo, s1
	v_lshl_add_u32 v9, s5, 1, v0
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr14
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s0, v9
	s_cbranch_execz .LBB14_31
; %bb.30:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(1)
	v_add_co_u32 v14, s2, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v15, null, s7, 0, s2
	v_add_co_u32 v16, s2, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s8, 0, s2
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v15 :: v_dual_cndmask_b32 v9, v16, v14
	global_load_u8 v14, v[9:10], off
.LBB14_31:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[9:10], null, s5, 3, v[0:1]
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr15
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s0, v9
	s_cbranch_execz .LBB14_33
; %bb.32:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(4)
	v_add_co_u32 v15, s2, s3, v9
	s_waitcnt vmcnt(2)
	v_add_co_ci_u32_e64 v16, null, s7, 0, s2
	v_add_co_u32 v18, s2, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v10, null, s8, 0, s2
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_cndmask_b32_e32 v9, v18, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v10, v10, v16, vcc_lo
	global_load_u8 v15, v[9:10], off
.LBB14_33:
	s_or_b32 exec_lo, exec_lo, s1
	v_lshl_add_u32 v9, s5, 2, v0
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr16
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s0, v9
	s_cbranch_execz .LBB14_35
; %bb.34:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(2)
	v_add_co_u32 v16, s2, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v18, null, s7, 0, s2
	v_add_co_u32 v19, s2, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s8, 0, s2
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v18 :: v_dual_cndmask_b32 v9, v19, v16
	global_load_u8 v16, v[9:10], off
.LBB14_35:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[9:10], null, s5, 5, v[0:1]
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr18
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s0, v9
	s_cbranch_execz .LBB14_37
; %bb.36:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(5)
	v_add_co_u32 v18, s2, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v19, null, s7, 0, s2
	v_add_co_u32 v20, s2, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s8, 0, s2
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v19 :: v_dual_cndmask_b32 v9, v20, v18
	global_load_u8 v18, v[9:10], off
.LBB14_37:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[9:10], null, s5, 6, v[0:1]
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr19
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s0, v9
	s_cbranch_execz .LBB14_39
; %bb.38:
	v_subrev_nc_u32_e32 v10, s17, v9
	s_waitcnt vmcnt(6)
	v_add_co_u32 v19, s2, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v20, null, s7, 0, s2
	v_add_co_u32 v21, s2, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, null, s8, 0, s2
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v10, v10, v20 :: v_dual_cndmask_b32 v9, v21, v19
	global_load_u8 v19, v[9:10], off
.LBB14_39:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[9:10], null, s5, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s0, v9
.LBB14_40:                              ; %Flow123
	v_mov_b32_e32 v20, s0
                                        ; implicit-def: $vgpr10
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB14_42
; %bb.41:                               ; %.loopexit.sink.split.i99.i.i
	v_subrev_nc_u32_e32 v10, s17, v9
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s1, s4, v10
	v_add_co_ci_u32_e64 v10, null, s8, 0, s1
	v_add_co_u32 v21, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v22, null, s7, 0, s1
	v_dual_cndmask_b32 v9, v20, v21 :: v_dual_mov_b32 v20, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v10, v10, v22, vcc_lo
	global_load_u8 v10, v[9:10], off
.LBB14_42:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EhN6thrust10device_ptrIhEEEEvRAT__T0_T1_S8_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b32_e32 v9, 3, v0
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_min_u32_e32 v22, v20, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e64 v21, v22, s6 clamp
	v_min_u32_e32 v23, s17, v22
	v_cmpx_lt_u32_e64 v21, v23
	s_cbranch_execz .LBB14_46
; %bb.43:                               ; %.lr.ph.i.preheader.i.i
	v_lshlrev_b32_e32 v24, 2, v22
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v24, s17, 2, v24
.LBB14_44:                              ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v25, v23, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v25, 1, v25
	v_not_b32_e32 v26, v25
	v_lshlrev_b32_e32 v27, 2, v25
	v_add_nc_u32_e32 v28, 1, v25
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v26, v26, 2, v24
	ds_load_b32 v27, v27
	ds_load_b32 v26, v26
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v27, s18, v27
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v26, s18, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, v27, v26
	v_cndmask_b32_e32 v23, v23, v25, vcc_lo
	v_cndmask_b32_e32 v21, v28, v21, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v21, v23
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB14_44
; %bb.45:                               ; %Flow120
	s_or_b32 exec_lo, exec_lo, s1
.LBB14_46:                              ; %Flow121
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s0
	v_sub_nc_u32_e32 v22, v22, v21
	v_cmp_ge_u32_e32 vcc_lo, s17, v21
                                        ; implicit-def: $vgpr30
                                        ; implicit-def: $vgpr28
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $vgpr26
                                        ; implicit-def: $vgpr23
                                        ; implicit-def: $vgpr25
                                        ; implicit-def: $vgpr24
	v_add_nc_u32_e32 v29, s17, v22
                                        ; implicit-def: $vgpr22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s0, v29, v20
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s8, s0
	s_cbranch_execz .LBB14_52
; %bb.47:                               ; %._crit_edge.i.i.i.i
	v_cmp_gt_u32_e32 vcc_lo, s17, v21
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB14_49
; %bb.48:
	v_lshlrev_b32_e32 v1, 2, v21
	ds_load_b32 v1, v1
.LBB14_49:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_ge_u32_e64 s0, v29, v20
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_lt_u32_e64 v29, v20
	s_cbranch_execz .LBB14_51
; %bb.50:
	v_lshlrev_b32_e32 v2, 2, v29
	ds_load_b32 v2, v2
.LBB14_51:                              ; %.loopexit.loopexit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v3, s18, v2
	v_and_b32_e32 v4, s18, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s1, v4, v3
	s_and_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 vcc_lo, s0, s1
	v_cndmask_b32_e32 v24, v29, v21, vcc_lo
	v_cndmask_b32_e64 v3, v20, s17, vcc_lo
	v_add_nc_u32_e32 v4, 1, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, -1, v3
	v_min_u32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 2, v3
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v5, v3, v2, vcc_lo
	v_cndmask_b32_e32 v3, v1, v3, vcc_lo
	v_cndmask_b32_e32 v6, v21, v4, vcc_lo
	v_cndmask_b32_e32 v4, v4, v29, vcc_lo
	v_cndmask_b32_e32 v1, v2, v1, vcc_lo
	v_and_b32_e32 v7, s18, v5
	v_and_b32_e32 v8, s18, v3
	v_cmp_gt_u32_e64 s0, s17, v6
	v_cmp_ge_u32_e64 s2, v4, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s1, v8, v7
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v25, v4, v6, s0
	v_cndmask_b32_e64 v7, v20, s17, s0
	v_cndmask_b32_e64 v2, v5, v3, s0
	v_add_nc_u32_e32 v8, 1, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, -1, v7
	v_cndmask_b32_e64 v6, v6, v8, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v7, v8, v7
	v_cndmask_b32_e64 v4, v8, v4, s0
	v_cmp_gt_u32_e64 s1, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v7, 2, v7
	v_cmp_ge_u32_e64 s3, v4, v20
	ds_load_b32 v7, v7
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v21, v7, v5, s0
	v_cndmask_b32_e64 v7, v3, v7, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v22, s18, v21
	v_and_b32_e32 v23, s18, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s2, v23, v22
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s3, s1
	v_cndmask_b32_e64 v22, v4, v6, s1
	v_cndmask_b32_e64 v8, v20, s17, s1
	v_cndmask_b32_e64 v3, v21, v7, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v23, 1, v22
	v_add_nc_u32_e32 v8, -1, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v23, s1
	v_min_u32_e32 v8, v23, v8
	v_cndmask_b32_e64 v4, v23, v4, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s2, s17, v6
	v_lshlrev_b32_e32 v8, 2, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_ge_u32_e64 s4, v4, v20
	ds_load_b32 v8, v8
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v29, v8, v21, s1
	v_cndmask_b32_e64 v8, v7, v8, s1
	v_and_b32_e32 v26, s18, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v27, s18, v8
	v_cmp_le_u32_e64 s3, v27, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_or_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v23, v4, v6, s2
	v_cndmask_b32_e64 v26, v20, s17, s2
	v_add_nc_u32_e32 v27, 1, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v26, -1, v26
	v_cndmask_b32_e64 v6, v6, v27, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v26, v27, v26
	v_cndmask_b32_e64 v4, v27, v4, s2
	v_cmp_gt_u32_e64 s3, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v26, 2, v26
	v_cmp_ge_u32_e64 s5, v4, v20
	ds_load_b32 v26, v26
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v30, v26, v29, s2
	v_cndmask_b32_e64 v31, v8, v26, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v26, s18, v30
	v_and_b32_e32 v28, s18, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s4, v28, v26
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s5, s3
	v_cndmask_b32_e64 v26, v4, v6, s3
	v_cndmask_b32_e64 v27, v20, s17, s3
	v_cndmask_b32_e64 v5, v30, v31, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v28, 1, v26
	v_add_nc_u32_e32 v27, -1, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v28, s3
	v_min_u32_e32 v27, v28, v27
	v_cndmask_b32_e64 v4, v28, v4, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s4, s17, v6
	v_lshlrev_b32_e32 v27, 2, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_ge_u32_e64 s6, v4, v20
	ds_load_b32 v27, v27
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v32, v27, v30, s3
	v_cndmask_b32_e64 v33, v31, v27, s3
	v_and_b32_e32 v27, s18, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v34, s18, v33
	v_cmp_le_u32_e64 s5, v34, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, s5
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v27, v4, v6, s4
	v_cndmask_b32_e64 v28, v20, s17, s4
	v_add_nc_u32_e32 v34, 1, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v28, -1, v28
	v_cndmask_b32_e64 v6, v6, v34, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v28, v34, v28
	v_cndmask_b32_e64 v4, v34, v4, s4
	v_cmp_gt_u32_e64 s5, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v28, 2, v28
	v_cmp_ge_u32_e64 s7, v4, v20
	ds_load_b32 v28, v28
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v35, v28, v32, s4
	v_cndmask_b32_e64 v36, v33, v28, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v28, s18, v35
	v_and_b32_e32 v37, s18, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s6, v37, v28
	s_and_b32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s7, s5
	v_cndmask_b32_e64 v28, v4, v6, s5
	v_cndmask_b32_e64 v34, v20, s17, s5
	v_cndmask_b32_e64 v7, v35, v36, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v37, 1, v28
	v_add_nc_u32_e32 v34, -1, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v39, v6, v37, s5
	v_min_u32_e32 v34, v37, v34
	v_cndmask_b32_e64 v37, v37, v4, s5
	v_cndmask_b32_e64 v4, v29, v8, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_gt_u32_e32 vcc_lo, s17, v39
	v_lshlrev_b32_e32 v34, 2, v34
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_ge_u32_e64 s1, v37, v20
	ds_load_b32 v34, v34
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v38, v34, v35, s5
	v_cndmask_b32_e64 v34, v36, v34, s5
	v_and_b32_e32 v6, s18, v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v40, s18, v34
	v_cmp_le_u32_e64 s0, v40, v6
	v_cndmask_b32_e64 v6, v32, v33, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_or_b32 vcc_lo, s1, s0
	v_cndmask_b32_e32 v8, v38, v34, vcc_lo
	v_cndmask_b32_e32 v30, v37, v39, vcc_lo
.LBB14_52:                              ; %Flow118
	s_or_b32 exec_lo, exec_lo, s8
	s_barrier
	buffer_gl0_inv
	ds_store_b8 v0, v12
	ds_store_b8 v0, v13 offset:128
	ds_store_b8 v0, v14 offset:256
	ds_store_b8 v0, v15 offset:384
	ds_store_b8 v0, v16 offset:512
	ds_store_b8 v0, v18 offset:640
	ds_store_b8 v0, v19 offset:768
	ds_store_b8 v0, v10 offset:896
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u8 v19, v30
	ds_load_u8 v18, v28
	ds_load_u8 v21, v27
	ds_load_u8 v20, v26
	ds_load_u8 v23, v23
	ds_load_u8 v22, v22
	ds_load_u8 v25, v25
	ds_load_u8 v24, v24
	v_lshrrev_b32_e32 v10, 2, v0
	v_cmp_ne_u32_e32 vcc_lo, 1, v11
	s_mov_b32 s21, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	v_add_nc_u32_e32 v26, v10, v9
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	buffer_gl0_inv
	s_barrier
	v_lshlrev_b32_e32 v27, 2, v26
	buffer_gl0_inv
	s_cbranch_vccnz .LBB14_62
; %bb.53:                               ; %.preheader174.i.i.preheader
	v_mov_b32_e32 v9, v27
	s_mov_b64 s[0:1], 0
.LBB14_54:                              ; %.preheader174.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v10, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v9, v10
	v_add_nc_u32_e32 v9, 4, v9
	s_cbranch_scc0 .LBB14_54
; %bb.55:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v28, v0, v9
	v_dual_mov_b32 v16, v8 :: v_dual_mov_b32 v13, v5
	v_dual_mov_b32 v15, v7 :: v_dual_mov_b32 v12, v4
	v_mov_b32_e32 v11, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mov_b32 v14, v6 :: v_dual_lshlrev_b32 v29, 2, v28
	v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v9, v1
.LBB14_56:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v30, v29
	v_add_nc_u32_e32 v29, 0x210, v29
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v9, v30
	s_cbranch_scc1 .LBB14_56
; %bb.57:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPjEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	v_and_b32_e32 v29, 0xff, v24
	v_lshlrev_b16 v30, 8, v25
	v_and_b32_e32 v31, 0xff, v22
	v_lshlrev_b16 v32, 8, v23
	v_and_b32_e32 v33, 0xff, v20
	v_lshlrev_b16 v34, 8, v21
	v_and_b32_e32 v35, 0xff, v18
	v_lshlrev_b16 v36, 8, v19
	v_or_b32_e32 v29, v29, v30
	v_or_b32_e32 v30, v31, v32
	v_or_b32_e32 v31, v33, v34
	s_lshl_b64 s[0:1], s[20:21], 2
	v_or_b32_e32 v32, v35, v36
	v_and_b32_e32 v29, 0xffff, v29
	v_lshlrev_b32_e32 v30, 16, v30
	v_and_b32_e32 v31, 0xffff, v31
	s_add_u32 s0, s10, s0
	v_lshlrev_b32_e32 v32, 16, v32
	s_addc_u32 s1, s11, s1
	s_clause 0x7
	global_store_b32 v17, v9, s[0:1]
	global_store_b32 v17, v10, s[0:1] offset:512
	global_store_b32 v17, v11, s[0:1] offset:1024
	global_store_b32 v17, v12, s[0:1] offset:1536
	global_store_b32 v17, v13, s[0:1] offset:2048
	global_store_b32 v17, v14, s[0:1] offset:2560
	global_store_b32 v17, v15, s[0:1] offset:3072
	global_store_b32 v17, v16, s[0:1] offset:3584
	v_mov_b32_e32 v11, v26
	v_or_b32_e32 v9, v29, v30
	v_or_b32_e32 v10, v31, v32
	s_mov_b64 s[0:1], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB14_58:                              ; =>This Inner Loop Header: Depth=1
	s_lshl_b32 s2, s0, 3
	s_add_u32 s0, s0, 1
	v_lshrrev_b64 v[12:13], s2, v[9:10]
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b8 v11, v12
	v_add_nc_u32_e32 v11, 1, v11
	s_cbranch_scc0 .LBB14_58
; %bb.59:
	v_dual_mov_b32 v34, v24 :: v_dual_mov_b32 v33, v22
	v_dual_mov_b32 v36, v25 :: v_dual_mov_b32 v35, v23
	v_dual_mov_b32 v29, v20 :: v_dual_mov_b32 v32, v21
	v_mov_b32_e32 v12, v18
	v_mov_b32_e32 v30, v19
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB14_60:                              ; =>This Inner Loop Header: Depth=1
	ds_load_u8 v14, v28
	v_and_b32_e32 v9, 0xff, v34
	v_lshlrev_b16 v10, 8, v36
	v_and_b32_e32 v11, 0xff, v33
	v_lshlrev_b16 v13, 8, v35
	v_and_b32_e32 v15, 0xff, v29
	v_lshlrev_b16 v16, 8, v32
	v_and_b32_e32 v12, 0xff, v12
	v_lshlrev_b16 v29, 8, v30
	v_or_b32_e32 v9, v9, v10
	v_or_b32_e32 v10, v11, v13
	v_or_b32_e32 v11, v15, v16
	s_lshl_b32 s2, s0, 3
	v_or_b32_e32 v12, v12, v29
	v_and_b32_e32 v9, 0xffff, v9
	v_lshlrev_b32_e32 v10, 16, v10
	v_and_b32_e32 v11, 0xffff, v11
	s_lshl_b64 s[2:3], 0xff, s2
	v_lshlrev_b32_e32 v12, 16, v12
	v_add_nc_u32_e32 v28, 0x84, v28
	v_or_b32_e32 v9, v9, v10
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	v_or_b32_e32 v10, v11, v12
	s_waitcnt lgkmcnt(0)
	v_perm_b32 v11, v14, v14, 0x4040404
	s_cmp_lg_u32 s0, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_bfi_b32 v10, s3, v11, v10
	v_bfi_b32 v9, s2, v11, v9
	v_lshrrev_b32_e32 v14, 16, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_lshrrev_b64 v[11:12], 24, v[9:10]
	v_lshrrev_b32_e32 v16, 16, v9
	v_lshrrev_b32_e32 v13, 24, v10
	v_lshrrev_b32_e32 v15, 8, v10
	v_lshrrev_b32_e32 v31, 8, v9
	v_and_b32_e32 v30, 0xff, v14
	v_and_b32_e32 v29, 0xff, v16
	v_lshlrev_b16 v12, 8, v13
	v_lshlrev_b16 v32, 8, v11
	v_lshlrev_b16 v34, 8, v31
	v_lshlrev_b16 v35, 8, v15
	v_and_b32_e32 v38, 0xff, v10
	v_or_b32_e32 v12, v30, v12
	v_or_b32_e32 v33, v29, v32
	v_and_b32_e32 v30, 0xffff, v34
	v_and_b32_e32 v32, 0xffff, v35
	v_and_b32_e32 v29, 0xff, v9
	v_lshlrev_b32_e32 v36, 16, v12
	v_lshlrev_b32_e32 v37, 16, v33
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v34, v29, v34
	v_or_b32_e32 v32, v32, v36
	s_delay_alu instid0(VALU_DEP_3)
	v_or_b32_e32 v39, v30, v37
	v_or_b32_e32 v29, v38, v35
	v_lshrrev_b32_e32 v30, 24, v36
	v_lshrrev_b32_e32 v35, 24, v37
	v_lshrrev_b32_e32 v32, 8, v32
	v_lshrrev_b32_e32 v36, 8, v39
	s_cbranch_scc1 .LBB14_60
; %bb.61:                               ; %_ZN7rocprim11block_storeIhLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPhEEvT_RA8_hRNS_14block_exchangeIhLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_add_u32 s0, s14, s20
	s_addc_u32 s1, s15, 0
	v_add_co_u32 v28, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v29, null, s1, 0, s0
	s_mov_b32 s0, 0
	s_mov_b32 s8, -1
	s_clause 0x6
	global_store_b8 v[28:29], v9, off
	global_store_b8 v[28:29], v31, off offset:128
	global_store_b8 v[28:29], v16, off offset:256
	global_store_b8 v[28:29], v11, off offset:384
	global_store_b8 v[28:29], v10, off offset:512
	global_store_b8 v[28:29], v15, off offset:640
	global_store_b8 v[28:29], v14, off offset:768
	s_branch .LBB14_63
.LBB14_62:
	s_mov_b32 s0, -1
	s_mov_b32 s8, s21
                                        ; implicit-def: $vgpr13
.LBB14_63:                              ; %Flow
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB14_103
; %bb.64:                               ; %.preheader.i.i.preheader
	s_mov_b64 s[0:1], 0
.LBB14_65:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v9, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v27, v9
	v_add_nc_u32_e32 v27, 4, v27
	s_cbranch_scc0 .LBB14_65
; %bb.66:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v11, v0, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v9, 2, v11
.LBB14_67:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v10, v9
	v_add_nc_u32_e32 v9, 0x210, v9
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v1, v10
	s_cbranch_scc1 .LBB14_67
; %bb.68:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[0:1], s[20:21], 2
	s_sub_i32 s6, s16, s20
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	v_add_co_u32 v9, s0, s0, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, null, s1, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s6, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB14_70
; %bb.69:
	global_store_b32 v[9:10], v1, off
.LBB14_70:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v1, 0x80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s6, v1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_72
; %bb.71:
	global_store_b32 v[9:10], v2, off offset:512
.LBB14_72:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v1, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s6, v1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB14_74
; %bb.73:
	global_store_b32 v[9:10], v3, off offset:1024
.LBB14_74:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v1, 0x180, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s6, v1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB14_76
; %bb.75:
	global_store_b32 v[9:10], v4, off offset:1536
.LBB14_76:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v1, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s6, v1
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB14_78
; %bb.77:
	global_store_b32 v[9:10], v5, off offset:2048
.LBB14_78:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v1, 0x280, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s6, v1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB14_80
; %bb.79:
	global_store_b32 v[9:10], v6, off offset:2560
.LBB14_80:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v1, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s6, v1
	s_and_saveexec_b32 s7, s5
	s_cbranch_execz .LBB14_82
; %bb.81:
	global_store_b32 v[9:10], v7, off offset:3072
.LBB14_82:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v1, 0x380, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s6, v1
	s_and_saveexec_b32 s6, s8
	s_cbranch_execz .LBB14_84
; %bb.83:
	global_store_b32 v[9:10], v8, off offset:3584
.LBB14_84:                              ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPjEEvT_RA8_jjRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s6
	v_and_b32_e32 v1, 0xff, v24
	v_lshlrev_b16 v2, 8, v25
	v_and_b32_e32 v3, 0xff, v22
	v_lshlrev_b16 v4, 8, v23
	v_and_b32_e32 v5, 0xff, v20
	v_lshlrev_b16 v6, 8, v21
	v_and_b32_e32 v7, 0xff, v18
	v_lshlrev_b16 v8, 8, v19
	v_or_b32_e32 v1, v1, v2
	v_or_b32_e32 v2, v3, v4
	v_or_b32_e32 v3, v5, v6
	s_mov_b64 s[6:7], 0
	v_or_b32_e32 v4, v7, v8
	v_and_b32_e32 v1, 0xffff, v1
	v_lshlrev_b32_e32 v2, 16, v2
	v_and_b32_e32 v3, 0xffff, v3
	s_waitcnt_vscnt null, 0x0
	v_lshlrev_b32_e32 v4, 16, v4
	s_barrier
	v_or_b32_e32 v1, v1, v2
	buffer_gl0_inv
	v_or_b32_e32 v2, v3, v4
.LBB14_85:                              ; =>This Inner Loop Header: Depth=1
	s_lshl_b32 s9, s6, 3
	s_add_u32 s6, s6, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b64 v[3:4], s9, v[1:2]
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s6, 8
	ds_store_b8 v26, v3
	v_add_nc_u32_e32 v26, 1, v26
	s_cbranch_scc0 .LBB14_85
; %bb.86:
	s_mov_b64 s[6:7], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB14_87:                              ; =>This Inner Loop Header: Depth=1
	ds_load_u8 v5, v11
	v_and_b32_e32 v1, 0xff, v24
	v_lshlrev_b16 v2, 8, v25
	v_and_b32_e32 v3, 0xff, v22
	v_lshlrev_b16 v4, 8, v23
	v_and_b32_e32 v6, 0xff, v20
	v_lshlrev_b16 v7, 8, v21
	v_and_b32_e32 v8, 0xff, v18
	v_lshlrev_b16 v9, 8, v19
	v_or_b32_e32 v1, v1, v2
	v_or_b32_e32 v2, v3, v4
	v_or_b32_e32 v3, v6, v7
	s_lshl_b32 s9, s6, 3
	v_or_b32_e32 v4, v8, v9
	v_and_b32_e32 v1, 0xffff, v1
	v_lshlrev_b32_e32 v2, 16, v2
	v_and_b32_e32 v3, 0xffff, v3
	s_lshl_b64 s[10:11], 0xff, s9
	v_lshlrev_b32_e32 v4, 16, v4
	v_add_nc_u32_e32 v11, 0x84, v11
	v_or_b32_e32 v1, v1, v2
	s_add_u32 s6, s6, 1
	s_addc_u32 s7, s7, 0
	v_or_b32_e32 v2, v3, v4
	s_waitcnt lgkmcnt(0)
	v_perm_b32 v3, v5, v5, 0x4040404
	s_cmp_lg_u32 s6, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_bfi_b32 v2, s11, v3, v2
	v_bfi_b32 v1, s10, v3, v1
	v_lshrrev_b32_e32 v6, 16, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_lshrrev_b64 v[3:4], 24, v[1:2]
	v_lshrrev_b32_e32 v8, 16, v1
	v_lshrrev_b32_e32 v13, 24, v2
	v_lshrrev_b32_e32 v7, 8, v2
	v_lshrrev_b32_e32 v9, 8, v1
	v_and_b32_e32 v10, 0xff, v6
	v_and_b32_e32 v4, 0xff, v8
	v_lshlrev_b16 v5, 8, v13
	v_lshlrev_b16 v12, 8, v3
	v_lshlrev_b16 v14, 8, v9
	v_lshlrev_b16 v15, 8, v7
	v_and_b32_e32 v17, 0xff, v2
	v_or_b32_e32 v18, v10, v5
	v_or_b32_e32 v22, v4, v12
	v_and_b32_e32 v4, 0xff, v1
	v_and_b32_e32 v5, 0xffff, v14
	v_and_b32_e32 v10, 0xffff, v15
	v_lshlrev_b32_e32 v12, 16, v18
	v_lshlrev_b32_e32 v16, 16, v22
	v_or_b32_e32 v24, v4, v14
	v_or_b32_e32 v20, v17, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_or_b32_e32 v4, v10, v12
	v_or_b32_e32 v5, v5, v16
	v_lshrrev_b32_e32 v19, 24, v12
	v_lshrrev_b32_e32 v23, 24, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshrrev_b32_e32 v21, 8, v4
	v_lshrrev_b32_e32 v25, 8, v5
	s_cbranch_scc1 .LBB14_87
; %bb.88:                               ; %_ZN7rocprim14block_exchangeIhLj128ELj8ELj1ELj1EE18blocked_to_stripedIhEEvRA8_KhRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_add_u32 s6, s14, s20
	s_addc_u32 s7, s15, 0
	v_add_co_u32 v4, s6, s6, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, null, s7, 0, s6
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB14_90
; %bb.89:
	global_store_b8 v[4:5], v1, off
.LBB14_90:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB14_92
; %bb.91:
	global_store_b8 v[4:5], v9, off offset:128
.LBB14_92:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB14_94
; %bb.93:
	global_store_b8 v[4:5], v8, off offset:256
.LBB14_94:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB14_96
; %bb.95:
	global_store_b8 v[4:5], v3, off offset:384
.LBB14_96:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB14_98
; %bb.97:
	global_store_b8 v[4:5], v2, off offset:512
.LBB14_98:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB14_100
; %bb.99:
	global_store_b8 v[4:5], v7, off offset:640
.LBB14_100:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB14_102
; %bb.101:
	global_store_b8 v[4:5], v6, off offset:768
.LBB14_102:
	s_or_b32 exec_lo, exec_lo, s0
.LBB14_103:                             ; %Flow116
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB14_105
; %bb.104:                              ; %_ZN7rocprim6detail16block_store_implILb1ELj128ELj8EjhE5storeIPjPhjEEvT1_jbT_T0_RA8_jRA8_hRNS2_12storage_typeE.exit.sink.split.i.i
	s_add_u32 s0, s14, s20
	s_addc_u32 s1, s15, 0
	v_add_co_u32 v0, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s1, 0, s0
	global_store_b8 v[0:1], v13, off offset:896
.LBB14_105:                             ; %_ZN7rocprim6detail28block_merge_mergepath_kernelILj128ELj8EN6thrust10device_ptrIjEEPjNS3_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_PKSF_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 41
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
.Lfunc_end14:
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end14-_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 7128
; NumSgprs: 30
; NumVgprs: 41
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 41
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.protected	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ ; -- Begin function _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.globl	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	8
	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: ; @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
; %bb.0:
	s_load_b128 s[16:19], s[0:1], 0x20
	s_lshl_b32 s2, s15, 7
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s3, s16, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB15_28
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_lshr_b32 s0, s16, 7
	s_mov_b32 s3, 0
	s_cmp_lg_u32 s15, s0
	v_lshlrev_b32_e32 v1, 2, v0
	s_cselect_b32 s1, -1, 0
	s_lshl_b64 s[12:13], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s4, s12
	s_addc_u32 s13, s5, s13
	s_add_u32 s8, s8, s2
	s_addc_u32 s9, s9, 0
	s_lshr_b32 s0, s17, 7
	global_load_u8 v3, v0, s[8:9]
	global_load_b32 v4, v1, s[12:13]
	s_sub_i32 s8, 0, s0
	s_sub_i32 s9, 0, s17
	s_and_b32 s8, s15, s8
	v_add_nc_u32_e32 v0, s2, v0
	s_and_b32 s0, s8, s0
	s_lshl_b32 s8, s8, 7
	s_cmp_eq_u32 s0, 0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s12, s0, exec_lo
	s_cselect_b32 s9, s17, s9
	s_add_i32 s9, s9, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s9, s16
	s_cbranch_scc1 .LBB15_4
; %bb.2:
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB15_5
; %bb.3:                                ; %.critedge70.i
	v_mov_b32_e32 v1, 0
	s_mov_b32 s3, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, s2, s10, v0
	v_add_co_ci_u32_e64 v2, null, s11, 0, s2
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
	s_branch .LBB15_6
.LBB15_4:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr1_vgpr2
	s_branch .LBB15_11
.LBB15_5:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB15_6:                               ; %Flow37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB15_10
; %bb.7:
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2
	v_cmpx_gt_u32_e64 s16, v0
	s_cbranch_execz .LBB15_9
; %bb.8:
	v_mov_b32_e32 v1, 0
	s_or_b32 s3, s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_u32 v1, s12, s10, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_ci_u32_e64 v2, null, s11, 0, s12
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB15_9:                               ; %Flow39
	s_or_b32 exec_lo, exec_lo, s2
.LBB15_10:                              ; %Flow38
	s_mov_b32 s2, 0
.LBB15_11:                              ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB15_26
; %bb.12:
	s_min_u32 s2, s9, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s12, s2, s17
	s_min_u32 s13, s8, s2
	s_add_i32 s8, s8, s2
	s_min_u32 s3, s12, s16
	s_cmp_gt_u32 s12, s9
	v_subrev_nc_u32_e32 v0, s8, v0
	s_cselect_b32 s8, -1, 0
	s_and_b32 vcc_lo, exec_lo, s1
	v_cndmask_b32_e64 v1, 0, 1, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, s13, v0
	v_cmp_ne_u32_e64 s1, 1, v1
	s_cbranch_vccz .LBB15_18
; %bb.13:                               ; %.critedge74.i
	v_mov_b32_e32 v2, s2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB15_17
; %bb.14:                               ; %.lr.ph.i83.preheader.i
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v7, s3 :: v_dual_and_b32 v6, s18, v4
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, 0
	s_mov_b32 s1, 0
.LBB15_15:                              ; %.lr.ph.i83.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v7
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[0:1]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v8, s18, v8
	v_cmp_gt_u32_e32 vcc_lo, v6, v8
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v8, v6
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_add_nc_u32_e32 v9, 1, v0
	v_and_b32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 1, v8
	v_dual_cndmask_b32 v7, v0, v7 :: v_dual_cndmask_b32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v7
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB15_15
; %bb.16:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
.LBB15_17:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjNS3_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit89.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, s1, s10, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s11, 0, s1
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v4, off
	s_branch .LBB15_19
.LBB15_18:
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB15_19:                              ; %Flow34
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB15_25
; %bb.20:
	v_mov_b32_e32 v2, s2
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB15_24
; %bb.21:                               ; %.lr.ph.i.preheader.i
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v7, s3 :: v_dual_and_b32 v6, s18, v4
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, 0
	s_mov_b32 s1, 0
.LBB15_22:                              ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v7
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[0:1]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v8, s18, v8
	v_cmp_gt_u32_e32 vcc_lo, v6, v8
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v8, v6
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_add_nc_u32_e32 v9, 1, v0
	v_and_b32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 1, v8
	v_dual_cndmask_b32 v7, v0, v7 :: v_dual_cndmask_b32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v7
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB15_22
; %bb.23:                               ; %Flow32
	s_or_b32 exec_lo, exec_lo, s1
.LBB15_24:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjNS3_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_u32 v1, s0, s10, v0
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_ci_u32_e64 v2, null, s11, 0, s0
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB15_25:                              ; %Flow35
	s_mov_b32 s3, -1
.LBB15_26:                              ; %Flow40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB15_28
; %bb.27:                               ; %.critedge.sink.split.i
	s_waitcnt vmcnt(1)
	global_store_b8 v[1:2], v3, off
.LBB15_28:                              ; %_ZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjNS3_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
.Lfunc_end15:
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end15-_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 992
; NumSgprs: 22
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,"axG",@progbits,_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,comdat
	.protected	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj ; -- Begin function _ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.globl	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.p2align	8
	.type	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,@function
_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj: ; @_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[16:19], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x1c
	v_lshlrev_b32_e32 v3, 2, v0
	s_mul_i32 s14, s15, 0xc00
	s_mov_b32 s0, -1
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_u32 s15, s3
	s_cbranch_scc0 .LBB16_61
; %bb.1:
	s_mov_b32 s15, 0
	s_mul_i32 s11, s3, 0xfffff400
	v_lshlrev_b32_e32 v15, 2, v0
	s_lshl_b64 s[0:1], s[14:15], 2
	s_add_i32 s11, s11, s2
	s_add_u32 s0, s16, s0
	s_addc_u32 s1, s17, s1
	v_add_co_u32 v1, s0, s0, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s1, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s11, v0
                                        ; implicit-def: $vgpr4
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB16_3
; %bb.2:
	global_load_b32 v4, v[1:2], off
.LBB16_3:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v5, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s11, v5
                                        ; implicit-def: $vgpr5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB16_5
; %bb.4:
	global_load_b32 v5, v[1:2], off offset:1024
.LBB16_5:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v6, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s11, v6
                                        ; implicit-def: $vgpr6
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB16_7
; %bb.6:
	global_load_b32 v6, v[1:2], off offset:2048
.LBB16_7:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v7, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s11, v7
                                        ; implicit-def: $vgpr7
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB16_9
; %bb.8:
	global_load_b32 v7, v[1:2], off offset:3072
.LBB16_9:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v8, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s11, v8
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB16_11
; %bb.10:
	v_add_co_u32 v8, s4, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s4, 0, v2, s4
	global_load_b32 v8, v[8:9], off
.LBB16_11:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v9, 0x500, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s11, v9
                                        ; implicit-def: $vgpr9
	s_and_saveexec_b32 s6, s4
	s_cbranch_execz .LBB16_13
; %bb.12:
	v_add_co_u32 v9, s5, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s5, 0, v2, s5
	global_load_b32 v9, v[9:10], off offset:1024
.LBB16_13:
	s_or_b32 exec_lo, exec_lo, s6
	v_or_b32_e32 v10, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s11, v10
                                        ; implicit-def: $vgpr10
	s_and_saveexec_b32 s7, s5
	s_cbranch_execz .LBB16_15
; %bb.14:
	v_add_co_u32 v10, s6, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s6, 0, v2, s6
	global_load_b32 v10, v[10:11], off offset:2048
.LBB16_15:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v11, 0x700, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s11, v11
                                        ; implicit-def: $vgpr11
	s_and_saveexec_b32 s8, s6
	s_cbranch_execz .LBB16_17
; %bb.16:
	v_add_co_u32 v11, s7, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s7, 0, v2, s7
	global_load_b32 v11, v[11:12], off offset:3072
.LBB16_17:
	s_or_b32 exec_lo, exec_lo, s8
	v_or_b32_e32 v12, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s11, v12
                                        ; implicit-def: $vgpr12
	s_and_saveexec_b32 s9, s7
	s_cbranch_execz .LBB16_19
; %bb.18:
	v_add_co_u32 v12, s8, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s8, 0, v2, s8
	global_load_b32 v12, v[12:13], off
.LBB16_19:
	s_or_b32 exec_lo, exec_lo, s9
	v_or_b32_e32 v13, 0x900, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s11, v13
                                        ; implicit-def: $vgpr13
	s_and_saveexec_b32 s10, s8
	s_cbranch_execz .LBB16_21
; %bb.20:
	v_add_co_u32 v13, s9, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s9, 0, v2, s9
	global_load_b32 v13, v[13:14], off offset:1024
.LBB16_21:
	s_or_b32 exec_lo, exec_lo, s10
	v_or_b32_e32 v14, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s11, v14
                                        ; implicit-def: $vgpr14
	s_and_saveexec_b32 s15, s9
	s_cbranch_execz .LBB16_23
; %bb.22:
	v_add_co_u32 v16, s10, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v17, s10, 0, v2, s10
	global_load_b32 v14, v[16:17], off offset:2048
.LBB16_23:
	s_or_b32 exec_lo, exec_lo, s15
	v_or_b32_e32 v16, 0xb00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s11, v16
                                        ; implicit-def: $vgpr16
	s_and_saveexec_b32 s15, s10
	s_cbranch_execz .LBB16_25
; %bb.24:
	v_add_co_u32 v1, s11, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s11, 0, v2, s11
	global_load_b32 v16, v[1:2], off offset:3072
.LBB16_25:                              ; %_ZN7rocprim25block_load_direct_stripedILj256EN6thrust10device_ptrIjEEjLj12EEEvjT0_RAT2__T1_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s15, exec_lo
	v_cmpx_gt_u32_e32 0x200, v0
	s_cbranch_execz .LBB16_28
; %bb.26:                               ; %.lr.ph.i.i20.i.preheader
	v_or_b32_e32 v1, 0xffffff00, v0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s11, 0
.LBB16_27:                              ; %.lr.ph.i.i20.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s20, 0x100, v1
	s_xor_b32 s20, s20, -1
	ds_store_b32 v15, v2
	v_add_nc_u32_e32 v15, 0x400, v15
	s_and_b32 s20, exec_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s11, s20, s11
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB16_27
.LBB16_28:                              ; %Flow92
	s_or_b32 exec_lo, exec_lo, s15
	s_cmp_gt_u32 s13, s12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_cselect_b32 s11, -1, 0
	s_cmp_le_u32 s13, s12
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB16_55
; %bb.29:                               ; %.lr.ph.i17.i.preheader
	v_dual_mov_b32 v2, 1 :: v_dual_and_b32 v1, 3, v0
	s_sub_i32 s15, s13, s12
	s_mov_b32 s20, s12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 2, v1
.LBB16_30:                              ; %.lr.ph.i17.i
                                        ; =>This Inner Loop Header: Depth=1
	s_min_u32 s21, s15, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s21, -1, s21
	s_not_b32 s21, s21
	s_and_saveexec_b32 s22, vcc_lo
	s_cbranch_execz .LBB16_32
; %bb.31:                               ;   in Loop: Header=BB16_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB16_32:                              ;   in Loop: Header=BB16_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s0
	s_cbranch_execz .LBB16_34
; %bb.33:                               ;   in Loop: Header=BB16_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB16_34:                              ;   in Loop: Header=BB16_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s1
	s_cbranch_execz .LBB16_36
; %bb.35:                               ;   in Loop: Header=BB16_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB16_36:                              ;   in Loop: Header=BB16_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s2
	s_cbranch_execz .LBB16_38
; %bb.37:                               ;   in Loop: Header=BB16_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB16_38:                              ;   in Loop: Header=BB16_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s3
	s_cbranch_execz .LBB16_40
; %bb.39:                               ;   in Loop: Header=BB16_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB16_40:                              ;   in Loop: Header=BB16_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s4
	s_cbranch_execz .LBB16_42
; %bb.41:                               ;   in Loop: Header=BB16_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB16_42:                              ;   in Loop: Header=BB16_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s5
	s_cbranch_execz .LBB16_44
; %bb.43:                               ;   in Loop: Header=BB16_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB16_44:                              ;   in Loop: Header=BB16_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s6
	s_cbranch_execz .LBB16_46
; %bb.45:                               ;   in Loop: Header=BB16_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB16_46:                              ;   in Loop: Header=BB16_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s7
	s_cbranch_execz .LBB16_48
; %bb.47:                               ;   in Loop: Header=BB16_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB16_48:                              ;   in Loop: Header=BB16_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s8
	s_cbranch_execz .LBB16_50
; %bb.49:                               ;   in Loop: Header=BB16_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB16_50:                              ;   in Loop: Header=BB16_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s9
	s_cbranch_execz .LBB16_52
; %bb.51:                               ;   in Loop: Header=BB16_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB16_52:                              ;   in Loop: Header=BB16_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s10
	s_cbranch_execz .LBB16_54
; %bb.53:                               ;   in Loop: Header=BB16_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB16_54:                              ; %_ZN7rocprim6detail26onesweep_histograms_helperIjLj256ELj12ELj4ELb0ENS_19identity_decomposerEE21count_digits_at_placeILb0EEEvjjRA12_KjjS2_jjjRNS3_12storage_typeE.exit.i.i
                                        ;   in Loop: Header=BB16_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v1, 0x100, v1
	s_add_i32 s20, s20, 4
	s_add_i32 s15, s15, -4
	s_cmp_ge_u32 s20, s13
	s_cbranch_scc0 .LBB16_30
.LBB16_55:                              ; %._crit_edge.i15.i
	s_and_not1_b32 vcc_lo, exec_lo, s11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB16_60
; %bb.56:                               ; %.preheader50.lr.ph.i.i
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	v_dual_mov_b32 v1, v0 :: v_dual_lshlrev_b32 v4, 4, v0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s1, s12
.LBB16_57:                              ; %.preheader50.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB16_59
; %bb.58:                               ; %.preheader.lr.ph.i16.i
                                        ;   in Loop: Header=BB16_57 Depth=1
	ds_load_2addr_b32 v[5:6], v4 offset1:1
	ds_load_2addr_b32 v[7:8], v4 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v9, v6, v5
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v7, v9, v7, v8
	v_add_co_u32 v5, s0, s18, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, s19, v6, s0
	global_atomic_add_u32 v[5:6], v7, off
.LBB16_59:                              ;   in Loop: Header=BB16_57 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v1, 16, v1
	v_add_nc_u32_e32 v4, 0x100, v4
	s_add_i32 s1, s1, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s1, s13
	s_cbranch_scc1 .LBB16_57
.LBB16_60:                              ; %Flow88
	s_mov_b32 s0, 0
.LBB16_61:                              ; %Flow99
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB16_73
; %bb.62:
	s_mov_b32 s15, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[14:15], 2
	s_add_u32 s0, s16, s0
	s_addc_u32 s1, s17, s1
	v_add_co_u32 v6, s2, s0, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, null, s1, 0, s2
	s_clause 0x3
	global_load_b32 v1, v3, s[0:1]
	global_load_b32 v2, v3, s[0:1] offset:1024
	global_load_b32 v4, v3, s[0:1] offset:2048
	global_load_b32 v5, v3, s[0:1] offset:3072
	v_add_co_u32 v9, vcc_lo, 0x1000, v6
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v7, vcc_lo
	v_add_co_u32 v12, vcc_lo, v6, 0x2000
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v7, vcc_lo
	v_add_co_u32 v14, vcc_lo, 0x2000, v6
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v7, vcc_lo
	s_clause 0x7
	global_load_b32 v6, v[12:13], off
	global_load_b32 v7, v[9:10], off offset:1024
	global_load_b32 v8, v[9:10], off offset:2048
	global_load_b32 v9, v[9:10], off offset:3072
	global_load_b32 v10, v[14:15], off offset:1024
	global_load_b32 v11, v[14:15], off offset:2048
	global_load_b32 v12, v[12:13], off offset:-4096
	global_load_b32 v13, v[14:15], off offset:3072
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 0x200, v0
	s_cbranch_execz .LBB16_65
; %bb.63:                               ; %.lr.ph.i.i.i.preheader
	v_or_b32_e32 v14, 0xffffff00, v0
	v_mov_b32_e32 v15, 0
.LBB16_64:                              ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v14, s1, 0x100, v14
	s_xor_b32 s1, s1, -1
	ds_store_b32 v3, v15
	v_add_nc_u32_e32 v3, 0x400, v3
	s_and_b32 s1, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s15, s1, s15
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB16_64
.LBB16_65:                              ; %Flow98
	s_or_b32 exec_lo, exec_lo, s0
	s_cmp_gt_u32 s13, s12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_cselect_b32 s0, -1, 0
	s_cmp_le_u32 s13, s12
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB16_68
; %bb.66:                               ; %.lr.ph.i.i.preheader
	v_dual_mov_b32 v14, 1 :: v_dual_and_b32 v3, 3, v0
	s_sub_i32 s1, s13, s12
	s_mov_b32 s2, s12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 2, v3
.LBB16_67:                              ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_min_u32 s3, s1, 4
	v_lshrrev_b32_e32 v15, s2, v1
	v_lshrrev_b32_e32 v16, s2, v2
	s_lshl_b32 s3, -1, s3
	v_lshrrev_b32_e32 v17, s2, v4
	v_lshrrev_b32_e32 v18, s2, v5
	s_not_b32 s3, s3
	v_lshrrev_b32_e32 v19, s2, v12
	v_lshrrev_b32_e32 v20, s2, v7
	v_lshrrev_b32_e32 v21, s2, v8
	v_lshrrev_b32_e32 v22, s2, v9
	v_lshrrev_b32_e32 v23, s2, v6
	v_lshrrev_b32_e32 v24, s2, v10
	v_lshrrev_b32_e32 v25, s2, v11
	v_lshrrev_b32_e32 v26, s2, v13
	v_and_b32_e32 v15, s3, v15
	v_and_b32_e32 v16, s3, v16
	v_and_b32_e32 v17, s3, v17
	v_and_b32_e32 v18, s3, v18
	v_and_b32_e32 v19, s3, v19
	v_and_b32_e32 v20, s3, v20
	v_and_b32_e32 v21, s3, v21
	v_and_b32_e32 v22, s3, v22
	v_and_b32_e32 v23, s3, v23
	v_and_b32_e32 v24, s3, v24
	v_and_b32_e32 v25, s3, v25
	v_and_b32_e32 v26, s3, v26
	v_lshl_add_u32 v15, v15, 4, v3
	v_lshl_add_u32 v16, v16, 4, v3
	v_lshl_add_u32 v17, v17, 4, v3
	v_lshl_add_u32 v18, v18, 4, v3
	v_lshl_add_u32 v19, v19, 4, v3
	v_lshl_add_u32 v20, v20, 4, v3
	v_lshl_add_u32 v21, v21, 4, v3
	v_lshl_add_u32 v22, v22, 4, v3
	v_lshl_add_u32 v23, v23, 4, v3
	v_lshl_add_u32 v24, v24, 4, v3
	v_lshl_add_u32 v25, v25, 4, v3
	v_lshl_add_u32 v26, v26, 4, v3
	ds_add_u32 v15, v14
	ds_add_u32 v16, v14
	ds_add_u32 v17, v14
	ds_add_u32 v18, v14
	ds_add_u32 v19, v14
	ds_add_u32 v20, v14
	ds_add_u32 v21, v14
	ds_add_u32 v22, v14
	ds_add_u32 v23, v14
	ds_add_u32 v24, v14
	ds_add_u32 v25, v14
	ds_add_u32 v26, v14
	v_add_nc_u32_e32 v3, 0x100, v3
	s_add_i32 s2, s2, 4
	s_add_i32 s1, s1, -4
	s_cmp_ge_u32 s2, s13
	s_cbranch_scc0 .LBB16_67
.LBB16_68:                              ; %._crit_edge.i.i
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB16_73
; %bb.69:                               ; %.preheader49.lr.ph.i.i
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v2, 4, v0
.LBB16_70:                              ; %.preheader49.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB16_72
; %bb.71:                               ; %.preheader.lr.ph.i.i
                                        ;   in Loop: Header=BB16_70 Depth=1
	ds_load_2addr_b32 v[3:4], v2 offset1:1
	ds_load_2addr_b32 v[5:6], v2 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v7, v4, v3
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v5, v7, v5, v6
	v_add_co_u32 v3, s0, s18, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s19, v4, s0
	global_atomic_add_u32 v[3:4], v5, off
.LBB16_72:                              ;   in Loop: Header=BB16_70 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v0, 16, v0
	v_add_nc_u32_e32 v2, 0x100, v2
	s_add_i32 s12, s12, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s12, s13
	s_cbranch_scc0 .LBB16_70
.LBB16_73:                              ; %_ZN7rocprim6detail19onesweep_histogramsILj256ELj12ELj4ELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT3_PT4_S7_S7_T5_jj.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 27
		.amdhsa_next_free_sgpr 23
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,"axG",@progbits,_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,comdat
.Lfunc_end16:
	.size	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj, .Lfunc_end16-_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2440
; NumSgprs: 25
; NumVgprs: 27
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 25
; NumVGPRsForWavesPerEU: 27
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_,"axG",@progbits,_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_,comdat
	.protected	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_ ; -- Begin function _ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_
	.globl	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_
	.p2align	8
	.type	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_,@function
_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_: ; @_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	s_lshl_b32 s2, s15, 4
	s_mov_b32 s3, 0
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_lshl_b64 s[2:3], s[2:3], 2
	v_lshlrev_b32_e32 v1, 2, v0
                                        ; implicit-def: $vgpr3
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s0, s2
	s_addc_u32 s3, s1, s3
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB17_2
; %bb.1:
	global_load_b32 v3, v1, s[2:3]
.LBB17_2:                               ; %_ZN7rocprim25block_load_direct_blockedIPjjLj1EEEvjT_RAT1__T0_j.exit.i
	s_or_b32 exec_lo, exec_lo, s0
	v_mbcnt_lo_u32_b32 v2, -1, 0
	s_waitcnt vmcnt(0)
	v_mov_b32_dpp v5, v3 row_shr:1 row_mask:0xf bank_mask:0xf
	v_or_b32_e32 v6, 31, v0
	s_mov_b32 s1, exec_lo
	v_and_b32_e32 v4, 15, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 0, v4
	v_cndmask_b32_e64 v5, 0, v5, s0
	v_cmp_lt_u32_e64 s0, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v5, v3
	v_mov_b32_dpp v5, v3 row_shr:2 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, 0, v5, s0
	v_cmp_lt_u32_e64 s0, 3, v4
	v_add_nc_u32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v5, v3 row_shr:4 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v5, 0, v5, s0
	v_cmp_lt_u32_e64 s0, 7, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v3, v5
	v_mov_b32_dpp v5, v3 row_shr:8 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, 0, v5, s0
	v_bfe_i32 v5, v2, 4, 1
	v_add_nc_u32_e32 v3, v3, v4
	ds_swizzle_b32 v4, v3 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v5, v5, v4
	v_lshrrev_b32_e32 v4, 5, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v3, v5
	v_cmpx_eq_u32_e64 v6, v0
	s_cbranch_execz .LBB17_4
; %bb.3:
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b32_e32 v5, 2, v4
	ds_store_b32 v5, v3
.LBB17_4:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 8, v0
	s_cbranch_execz .LBB17_6
; %bb.5:
	ds_load_b32 v5, v1
	v_and_b32_e32 v6, 7, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 0, v6
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v7, v5 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v7, 0, v7, s0
	v_cmp_lt_u32_e64 s0, 1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v7, v5
	v_mov_b32_dpp v7, v5 row_shr:2 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, 0, v7, s0
	v_cmp_lt_u32_e64 s0, 3, v6
	v_add_nc_u32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v7, v5 row_shr:4 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v6, 0, v7, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v5, v6
	ds_store_b32 v1, v5
.LBB17_6:                               ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj256ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj256EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_lt_u32_e64 s0, 31, v0
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB17_8
; %bb.7:
	v_lshl_add_u32 v0, v4, 2, -4
	ds_load_b32 v0, v0
.LBB17_8:                               ; %_ZN7rocprim10block_scanIjLj256ELNS_20block_scan_algorithmE0ELj1ELj1EE14exclusive_scanILj1ENS_4plusIjEEEEvRAT__jS7_jT0_.exit.i
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v4, -1, v2
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s0, 0, v4
	v_cndmask_b32_e64 v4, v4, v2, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 2, v4
	ds_bpermute_b32 v3, v4, v3
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB17_10
; %bb.9:
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v0, v3, v0, vcc_lo
	global_store_b32 v1, v0, s[2:3]
.LBB17_10:                              ; %_ZN7rocprim6detail24onesweep_scan_histogramsILj256ELj4EjEEvPT1_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_
		.amdhsa_group_segment_fixed_size 32
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_,"axG",@progbits,_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_,comdat
.Lfunc_end17:
	.size	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_, .Lfunc_end17-_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEEjEEvPT0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 596
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 32 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_,comdat
	.protected	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_ ; -- Begin function _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_
	.globl	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_
	.p2align	8
	.type	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_,@function
_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_: ; @_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[16:17], s[0:1], 0x10
	s_mov_b32 s21, 0
	s_lshl_b32 s20, s15, 12
	v_lshlrev_b32_e32 v3, 2, v0
	s_lshl_b64 s[18:19], s[20:21], 2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_add_u32 s0, s4, s18
	s_addc_u32 s1, s5, s19
	v_add_co_u32 v1, s0, s0, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s1, 0, s0
	s_cmp_lg_u32 s15, s2
	s_mov_b32 s0, -1
	s_cbranch_scc0 .LBB18_2
; %bb.1:
	v_add_co_u32 v4, vcc_lo, 0x1000, v1
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v6, vcc_lo, v1, 0x2000
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v8, vcc_lo, 0x2000, v1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v10, vcc_lo, 0x3000, v1
	global_load_b32 v13, v[6:7], off
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v2, vcc_lo
	s_clause 0xe
	global_load_b32 v14, v[1:2], off
	global_load_b32 v15, v[1:2], off offset:1024
	global_load_b32 v16, v[1:2], off offset:2048
	global_load_b32 v17, v[1:2], off offset:3072
	global_load_b32 v18, v[4:5], off offset:1024
	global_load_b32 v19, v[4:5], off offset:2048
	global_load_b32 v20, v[4:5], off offset:3072
	global_load_b32 v21, v[8:9], off offset:1024
	global_load_b32 v22, v[8:9], off offset:2048
	global_load_b32 v23, v[8:9], off offset:3072
	global_load_b32 v24, v[10:11], off
	global_load_b32 v25, v[10:11], off offset:1024
	global_load_b32 v26, v[6:7], off offset:-4096
	global_load_b32 v27, v[10:11], off offset:2048
	global_load_b32 v4, v[10:11], off offset:3072
	s_add_u32 s2, s16, s18
	s_addc_u32 s3, s17, s19
	v_add_co_u32 v11, s1, s2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v12, null, s3, 0, s1
	s_mov_b32 s0, 0
	v_add_co_u32 v5, vcc_lo, 0x1000, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v12, vcc_lo
	v_add_co_u32 v7, vcc_lo, v11, 0x2000
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v12, vcc_lo
	v_add_co_u32 v9, vcc_lo, 0x2000, v11
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v12, vcc_lo
	v_add_co_u32 v11, vcc_lo, 0x3000, v11
	s_mov_b32 s21, -1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
	s_waitcnt vmcnt(15)
	global_store_b32 v[7:8], v13, off
	s_waitcnt vmcnt(14)
	global_store_b32 v3, v14, s[2:3]
	s_waitcnt vmcnt(13)
	global_store_b32 v3, v15, s[2:3] offset:1024
	s_waitcnt vmcnt(12)
	global_store_b32 v3, v16, s[2:3] offset:2048
	s_waitcnt vmcnt(11)
	global_store_b32 v3, v17, s[2:3] offset:3072
	s_waitcnt vmcnt(10)
	global_store_b32 v[5:6], v18, off offset:1024
	s_waitcnt vmcnt(9)
	global_store_b32 v[5:6], v19, off offset:2048
	s_waitcnt vmcnt(8)
	global_store_b32 v[5:6], v20, off offset:3072
	s_waitcnt vmcnt(7)
	global_store_b32 v[9:10], v21, off offset:1024
	s_waitcnt vmcnt(6)
	global_store_b32 v[9:10], v22, off offset:2048
	s_waitcnt vmcnt(5)
	global_store_b32 v[9:10], v23, off offset:3072
	s_waitcnt vmcnt(4)
	global_store_b32 v[11:12], v24, off
	s_waitcnt vmcnt(3)
	global_store_b32 v[11:12], v25, off offset:1024
	s_waitcnt vmcnt(2)
	global_store_b32 v[7:8], v26, off offset:-4096
	s_waitcnt vmcnt(1)
	global_store_b32 v[11:12], v27, off offset:2048
	s_branch .LBB18_3
.LBB18_2:
                                        ; implicit-def: $vgpr4
.LBB18_3:                               ; %Flow
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB18_67
; %bb.4:
	s_sub_i32 s15, s6, s20
                                        ; implicit-def: $vgpr5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s15, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB18_6
; %bb.5:
	global_load_b32 v5, v[1:2], off
.LBB18_6:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	v_or_b32_e32 v4, 0x100, v0
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s15, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB18_8
; %bb.7:
	global_load_b32 v6, v[1:2], off offset:1024
.LBB18_8:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v4, 0x200, v0
                                        ; implicit-def: $vgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s15, v4
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB18_10
; %bb.9:
	global_load_b32 v7, v[1:2], off offset:2048
.LBB18_10:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v4, 0x300, v0
                                        ; implicit-def: $vgpr8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s15, v4
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB18_12
; %bb.11:
	global_load_b32 v8, v[1:2], off offset:3072
.LBB18_12:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v4, 0x400, v0
                                        ; implicit-def: $vgpr9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s15, v4
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB18_14
; %bb.13:
	v_add_co_u32 v9, s4, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s4, 0, v2, s4
	global_load_b32 v9, v[9:10], off
.LBB18_14:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v4, 0x500, v0
                                        ; implicit-def: $vgpr10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s15, v4
	s_and_saveexec_b32 s6, s4
	s_cbranch_execz .LBB18_16
; %bb.15:
	v_add_co_u32 v10, s5, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s5, 0, v2, s5
	global_load_b32 v10, v[10:11], off offset:1024
.LBB18_16:
	s_or_b32 exec_lo, exec_lo, s6
	v_or_b32_e32 v4, 0x600, v0
                                        ; implicit-def: $vgpr11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s15, v4
	s_and_saveexec_b32 s7, s5
	s_cbranch_execz .LBB18_18
; %bb.17:
	v_add_co_u32 v11, s6, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s6, 0, v2, s6
	global_load_b32 v11, v[11:12], off offset:2048
.LBB18_18:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v4, 0x700, v0
                                        ; implicit-def: $vgpr12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s15, v4
	s_and_saveexec_b32 s8, s6
	s_cbranch_execz .LBB18_20
; %bb.19:
	v_add_co_u32 v12, s7, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s7, 0, v2, s7
	global_load_b32 v12, v[12:13], off offset:3072
.LBB18_20:
	s_or_b32 exec_lo, exec_lo, s8
	v_or_b32_e32 v4, 0x800, v0
                                        ; implicit-def: $vgpr13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s15, v4
	s_and_saveexec_b32 s9, s7
	s_cbranch_execz .LBB18_22
; %bb.21:
	v_add_co_u32 v13, s8, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s8, 0, v2, s8
	global_load_b32 v13, v[13:14], off
.LBB18_22:
	s_or_b32 exec_lo, exec_lo, s9
	v_or_b32_e32 v4, 0x900, v0
                                        ; implicit-def: $vgpr14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s15, v4
	s_and_saveexec_b32 s10, s8
	s_cbranch_execz .LBB18_24
; %bb.23:
	v_add_co_u32 v14, s9, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v15, s9, 0, v2, s9
	global_load_b32 v14, v[14:15], off offset:1024
.LBB18_24:
	s_or_b32 exec_lo, exec_lo, s10
	v_or_b32_e32 v4, 0xa00, v0
                                        ; implicit-def: $vgpr15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s15, v4
	s_and_saveexec_b32 s11, s9
	s_cbranch_execz .LBB18_26
; %bb.25:
	v_add_co_u32 v15, s10, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v16, s10, 0, v2, s10
	global_load_b32 v15, v[15:16], off offset:2048
.LBB18_26:
	s_or_b32 exec_lo, exec_lo, s11
	v_or_b32_e32 v4, 0xb00, v0
                                        ; implicit-def: $vgpr16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s15, v4
	s_and_saveexec_b32 s12, s10
	s_cbranch_execz .LBB18_28
; %bb.27:
	v_add_co_u32 v16, s11, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v17, s11, 0, v2, s11
	global_load_b32 v16, v[16:17], off offset:3072
.LBB18_28:
	s_or_b32 exec_lo, exec_lo, s12
	v_or_b32_e32 v4, 0xc00, v0
                                        ; implicit-def: $vgpr17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s11, s15, v4
	s_and_saveexec_b32 s13, s11
	s_cbranch_execz .LBB18_30
; %bb.29:
	v_add_co_u32 v17, s12, 0x3000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v18, s12, 0, v2, s12
	global_load_b32 v17, v[17:18], off
.LBB18_30:
	s_or_b32 exec_lo, exec_lo, s13
	v_or_b32_e32 v4, 0xd00, v0
                                        ; implicit-def: $vgpr18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s15, v4
	s_and_saveexec_b32 s14, s12
	s_cbranch_execz .LBB18_32
; %bb.31:
	v_add_co_u32 v18, s13, 0x3000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v19, s13, 0, v2, s13
	global_load_b32 v18, v[18:19], off offset:1024
.LBB18_32:
	s_or_b32 exec_lo, exec_lo, s14
	v_or_b32_e32 v4, 0xe00, v0
                                        ; implicit-def: $vgpr19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s13, s15, v4
	s_and_saveexec_b32 s20, s13
	s_cbranch_execz .LBB18_34
; %bb.33:
	v_add_co_u32 v19, s14, 0x3000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v20, s14, 0, v2, s14
	global_load_b32 v19, v[19:20], off offset:2048
.LBB18_34:
	s_or_b32 exec_lo, exec_lo, s20
	v_or_b32_e32 v0, 0xf00, v0
                                        ; implicit-def: $vgpr4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s21, s15, v0
	s_and_saveexec_b32 s15, s21
	s_cbranch_execz .LBB18_36
; %bb.35:
	v_add_co_u32 v0, s14, 0x3000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s14, 0, v2, s14
	global_load_b32 v4, v[0:1], off offset:3072
.LBB18_36:                              ; %_ZN7rocprim25block_load_direct_stripedILj256EN6thrust10device_ptrIjEEjLj16EEEvjT0_RAT2__T1_j.exit.i
	s_or_b32 exec_lo, exec_lo, s15
	s_add_u32 s14, s16, s18
	s_addc_u32 s15, s17, s19
	v_add_co_u32 v0, s14, s14, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v1, null, s15, 0, s14
	s_and_saveexec_b32 s14, vcc_lo
	s_xor_b32 s14, exec_lo, s14
	s_cbranch_execz .LBB18_38
; %bb.37:
	global_store_b32 v[0:1], v5, off
.LBB18_38:
	s_or_b32 exec_lo, exec_lo, s14
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB18_40
; %bb.39:
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v6, off offset:1024
.LBB18_40:
	s_or_b32 exec_lo, exec_lo, s14
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB18_42
; %bb.41:
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v7, off offset:2048
.LBB18_42:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB18_44
; %bb.43:
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v8, off offset:3072
.LBB18_44:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB18_46
; %bb.45:
	v_add_co_u32 v5, vcc_lo, 0x1000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v9, off
.LBB18_46:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB18_48
; %bb.47:
	v_add_co_u32 v5, vcc_lo, 0x1000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v10, off offset:1024
.LBB18_48:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB18_50
; %bb.49:
	v_add_co_u32 v5, vcc_lo, 0x1000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v11, off offset:2048
.LBB18_50:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s6
	s_cbranch_execz .LBB18_52
; %bb.51:
	v_add_co_u32 v5, vcc_lo, 0x1000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v12, off offset:3072
.LBB18_52:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB18_54
; %bb.53:
	v_add_co_u32 v5, vcc_lo, 0x2000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v13, off
.LBB18_54:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB18_56
; %bb.55:
	v_add_co_u32 v5, vcc_lo, 0x2000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v14, off offset:1024
.LBB18_56:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s9
	s_cbranch_execz .LBB18_58
; %bb.57:
	v_add_co_u32 v5, vcc_lo, 0x2000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v15, off offset:2048
.LBB18_58:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s10
	s_cbranch_execz .LBB18_60
; %bb.59:
	v_add_co_u32 v5, vcc_lo, 0x2000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v16, off offset:3072
.LBB18_60:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s11
	s_cbranch_execz .LBB18_62
; %bb.61:
	v_add_co_u32 v5, vcc_lo, 0x3000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v17, off
.LBB18_62:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s12
	s_cbranch_execz .LBB18_64
; %bb.63:
	v_add_co_u32 v5, vcc_lo, 0x3000, v0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	global_store_b32 v[5:6], v18, off offset:1024
.LBB18_64:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s13
	s_cbranch_execz .LBB18_66
; %bb.65:
	v_add_co_u32 v0, vcc_lo, 0x3000, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v19, off offset:2048
.LBB18_66:
	s_or_b32 exec_lo, exec_lo, s0
.LBB18_67:                              ; %Flow12
	s_and_saveexec_b32 s0, s21
	s_cbranch_execz .LBB18_69
; %bb.68:                               ; %_ZN7rocprim26block_store_direct_stripedILj256EPjjLj16EEEvjT0_RAT2__T1_j.exit.sink.split.i
	s_add_u32 s0, s16, s18
	s_addc_u32 s1, s17, s19
	v_add_co_u32 v0, s0, s0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v1, null, s1, 0, s0
	v_add_co_u32 v0, vcc_lo, 0x3000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v4, off offset:3072
.LBB18_69:                              ; %_ZN7rocprim6detail21transform_kernel_implILj256ELj16EjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT2_mT3_T4_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 28
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_,comdat
.Lfunc_end18:
	.size	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_, .Lfunc_end18-_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEjEEjN6thrust10device_ptrIjEEPjNS_8identityIjEEEEvT1_mT2_T3_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2152
; NumSgprs: 24
; NumVgprs: 28
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 28
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_,comdat
	.protected	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_ ; -- Begin function _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_
	.globl	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_
	.p2align	8
	.type	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_,@function
_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_: ; @_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[16:17], s[0:1], 0x10
	s_lshl_b32 s18, s15, 12
	s_mov_b32 s19, 0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_add_u32 s0, s4, s18
	s_addc_u32 s1, s5, 0
	v_add_co_u32 v1, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s1, 0, s0
	s_cmp_lg_u32 s15, s2
	s_mov_b32 s0, -1
	s_cbranch_scc0 .LBB19_2
; %bb.1:
	s_clause 0xf
	global_load_u8 v6, v[1:2], off
	global_load_u8 v7, v[1:2], off offset:256
	global_load_u8 v8, v[1:2], off offset:512
	global_load_u8 v9, v[1:2], off offset:768
	global_load_u8 v10, v[1:2], off offset:1024
	global_load_u8 v11, v[1:2], off offset:1280
	global_load_u8 v12, v[1:2], off offset:1536
	global_load_u8 v13, v[1:2], off offset:1792
	global_load_u8 v14, v[1:2], off offset:2048
	global_load_u8 v15, v[1:2], off offset:2304
	global_load_u8 v16, v[1:2], off offset:2560
	global_load_u8 v17, v[1:2], off offset:2816
	global_load_u8 v18, v[1:2], off offset:3072
	global_load_u8 v19, v[1:2], off offset:3328
	global_load_u8 v20, v[1:2], off offset:3584
	global_load_u8 v3, v[1:2], off offset:3840
	s_add_u32 s0, s16, s18
	s_addc_u32 s1, s17, 0
	v_add_co_u32 v4, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, null, s1, 0, s0
	s_mov_b32 s0, 0
	s_mov_b32 s19, -1
	s_waitcnt vmcnt(15)
	global_store_b8 v[4:5], v6, off
	s_waitcnt vmcnt(14)
	global_store_b8 v[4:5], v7, off offset:256
	s_waitcnt vmcnt(13)
	global_store_b8 v[4:5], v8, off offset:512
	s_waitcnt vmcnt(12)
	global_store_b8 v[4:5], v9, off offset:768
	s_waitcnt vmcnt(11)
	global_store_b8 v[4:5], v10, off offset:1024
	s_waitcnt vmcnt(10)
	global_store_b8 v[4:5], v11, off offset:1280
	s_waitcnt vmcnt(9)
	global_store_b8 v[4:5], v12, off offset:1536
	s_waitcnt vmcnt(8)
	global_store_b8 v[4:5], v13, off offset:1792
	s_waitcnt vmcnt(7)
	global_store_b8 v[4:5], v14, off offset:2048
	s_waitcnt vmcnt(6)
	global_store_b8 v[4:5], v15, off offset:2304
	s_waitcnt vmcnt(5)
	global_store_b8 v[4:5], v16, off offset:2560
	s_waitcnt vmcnt(4)
	global_store_b8 v[4:5], v17, off offset:2816
	s_waitcnt vmcnt(3)
	global_store_b8 v[4:5], v18, off offset:3072
	s_waitcnt vmcnt(2)
	global_store_b8 v[4:5], v19, off offset:3328
	s_waitcnt vmcnt(1)
	global_store_b8 v[4:5], v20, off offset:3584
	s_branch .LBB19_3
.LBB19_2:
                                        ; implicit-def: $vgpr3
.LBB19_3:                               ; %Flow
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB19_69
; %bb.4:
	s_sub_i32 s14, s6, s18
                                        ; implicit-def: $vgpr3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s14, v0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB19_6
; %bb.5:
	global_load_u8 v3, v[1:2], off
.LBB19_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v4, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s14, v4
                                        ; implicit-def: $vgpr4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB19_8
; %bb.7:
	global_load_u8 v4, v[1:2], off offset:256
.LBB19_8:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v5, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s14, v5
                                        ; implicit-def: $vgpr5
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB19_10
; %bb.9:
	global_load_u8 v5, v[1:2], off offset:512
.LBB19_10:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v6, 0x300, v0
                                        ; implicit-def: $vgpr7
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s14, v6
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB19_12
; %bb.11:
	global_load_u8 v7, v[1:2], off offset:768
.LBB19_12:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v6, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s14, v6
                                        ; implicit-def: $vgpr6
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB19_14
; %bb.13:
	global_load_u8 v6, v[1:2], off offset:1024
.LBB19_14:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v8, 0x500, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s14, v8
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB19_16
; %bb.15:
	global_load_u8 v8, v[1:2], off offset:1280
.LBB19_16:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v9, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s14, v9
                                        ; implicit-def: $vgpr9
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB19_18
; %bb.17:
	global_load_u8 v9, v[1:2], off offset:1536
.LBB19_18:
	s_or_b32 exec_lo, exec_lo, s6
	v_or_b32_e32 v10, 0x700, v0
                                        ; implicit-def: $vgpr11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s14, v10
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB19_20
; %bb.19:
	global_load_u8 v11, v[1:2], off offset:1792
.LBB19_20:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v10, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s14, v10
                                        ; implicit-def: $vgpr10
	s_and_saveexec_b32 s8, s7
	s_cbranch_execz .LBB19_22
; %bb.21:
	global_load_u8 v10, v[1:2], off offset:2048
.LBB19_22:
	s_or_b32 exec_lo, exec_lo, s8
	v_or_b32_e32 v12, 0x900, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s14, v12
                                        ; implicit-def: $vgpr12
	s_and_saveexec_b32 s9, s8
	s_cbranch_execz .LBB19_24
; %bb.23:
	global_load_u8 v12, v[1:2], off offset:2304
.LBB19_24:
	s_or_b32 exec_lo, exec_lo, s9
	v_or_b32_e32 v13, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s14, v13
                                        ; implicit-def: $vgpr13
	s_and_saveexec_b32 s10, s9
	s_cbranch_execz .LBB19_26
; %bb.25:
	global_load_u8 v13, v[1:2], off offset:2560
.LBB19_26:
	s_or_b32 exec_lo, exec_lo, s10
	v_or_b32_e32 v14, 0xb00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s14, v14
                                        ; implicit-def: $vgpr14
	s_and_saveexec_b32 s11, s10
	s_cbranch_execz .LBB19_28
; %bb.27:
	global_load_u8 v14, v[1:2], off offset:2816
.LBB19_28:
	s_or_b32 exec_lo, exec_lo, s11
	v_or_b32_e32 v15, 0xc00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s11, s14, v15
                                        ; implicit-def: $vgpr15
	s_and_saveexec_b32 s12, s11
	s_cbranch_execz .LBB19_30
; %bb.29:
	global_load_u8 v15, v[1:2], off offset:3072
.LBB19_30:
	s_or_b32 exec_lo, exec_lo, s12
	v_or_b32_e32 v16, 0xd00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s14, v16
                                        ; implicit-def: $vgpr16
	s_and_saveexec_b32 s13, s12
	s_cbranch_execz .LBB19_32
; %bb.31:
	global_load_u8 v16, v[1:2], off offset:3328
.LBB19_32:
	s_or_b32 exec_lo, exec_lo, s13
	v_or_b32_e32 v17, 0xe00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s13, s14, v17
                                        ; implicit-def: $vgpr17
	s_and_saveexec_b32 s15, s13
	s_cbranch_execz .LBB19_34
; %bb.33:
	global_load_u8 v17, v[1:2], off offset:3584
.LBB19_34:
	s_or_b32 exec_lo, exec_lo, s15
	v_or_b32_e32 v18, 0xf00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s14, s14, v18
                                        ; implicit-def: $vgpr18
	s_and_saveexec_b32 s15, s14
	s_cbranch_execz .LBB19_36
; %bb.35:
	global_load_u8 v18, v[1:2], off offset:3840
.LBB19_36:                              ; %_ZN7rocprim25block_load_direct_stripedILj256EN6thrust10device_ptrIhEEhLj16EEEvjT0_RAT2__T1_j.exit.i
	s_or_b32 exec_lo, exec_lo, s15
	s_add_u32 s15, s16, s18
	s_addc_u32 s20, s17, 0
	v_add_co_u32 v1, s15, s15, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s20, 0, s15
	s_and_saveexec_b32 s15, s2
	s_cbranch_execz .LBB19_38
; %bb.37:
	s_waitcnt vmcnt(0)
	global_store_b8 v[1:2], v3, off
.LBB19_38:
	s_or_b32 exec_lo, exec_lo, s15
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v19, 0xff, v3
	v_lshlrev_b16 v4, 8, v4
	v_and_b32_e32 v5, 0xff, v5
	v_lshlrev_b16 v3, 8, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v4, v19, v4
	v_or_b32_e32 v5, v5, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v7, 0xffff, v4
	v_lshlrev_b32_e32 v4, 16, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v7, v7, v4
	v_lshrrev_b32_e32 v5, 8, v7
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB19_40
; %bb.39:
	global_store_b8 v[1:2], v5, off offset:256
.LBB19_40:
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b16 v5, 8, v5
	v_or_b32_e32 v5, v19, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v19, 0xffff, v5
	v_or_b32_e32 v4, v19, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v7, s1
	v_lshrrev_b32_e32 v20, 16, v4
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB19_42
; %bb.41:
	global_store_b8 v[1:2], v20, off offset:512
.LBB19_42:
	s_or_b32 exec_lo, exec_lo, s0
	v_and_b32_e32 v4, 0xff, v6
	v_lshlrev_b16 v8, 8, v8
	v_and_b32_e32 v6, 0xff, v9
	v_lshlrev_b16 v5, 8, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v4, v4, v8
	v_or_b32_e32 v6, v6, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, 0xffff, v4
	v_lshlrev_b32_e32 v6, 16, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v4, v4, v6
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB19_44
; %bb.43:
	v_and_b32_e32 v9, 0xff, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v9, v3
	v_lshlrev_b32_e32 v3, 16, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v19, v3
	v_cndmask_b32_e32 v3, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b64 v[19:20], 24, v[3:4]
	global_store_b8 v[1:2], v19, off offset:768
.LBB19_44:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB19_46
; %bb.45:
	global_store_b8 v[1:2], v4, off offset:1024
.LBB19_46:
	s_or_b32 exec_lo, exec_lo, s0
	v_and_b32_e32 v3, 0xff, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v7, v3, v8
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v7, v7, v6
	v_cndmask_b32_e64 v7, v7, v4, s4
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b32_e32 v7, 8, v7
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB19_48
; %bb.47:
	global_store_b8 v[1:2], v7, off offset:1280
.LBB19_48:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b16 v7, 8, v7
	v_or_b32_e32 v3, v3, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, 0xffff, v3
	v_or_b32_e32 v6, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v6, v6, v4, s5
	v_lshrrev_b32_e32 v6, 16, v6
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB19_50
; %bb.49:
	global_store_b8 v[1:2], v6, off offset:1536
.LBB19_50:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s6
	s_cbranch_execz .LBB19_52
; %bb.51:
	v_and_b32_e32 v6, 0xff, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v5, v6, v5
	v_lshlrev_b32_e32 v5, 16, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v3, v5
	v_cndmask_b32_e64 v3, v3, v4, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 24, v3
	global_store_b8 v[1:2], v3, off offset:1792
.LBB19_52:
	s_or_b32 exec_lo, exec_lo, s0
	v_and_b32_e32 v4, 0xff, v10
	v_lshlrev_b16 v5, 8, v12
	v_and_b32_e32 v6, 0xff, v13
	v_lshlrev_b16 v3, 8, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v4, v4, v5
	v_or_b32_e32 v6, v6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v7, 0xffff, v4
	v_lshlrev_b32_e32 v4, 16, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v6, v7, v4
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB19_54
; %bb.53:
	global_store_b8 v[1:2], v6, off offset:2048
.LBB19_54:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v7, 0xff, v6
	v_or_b32_e32 v5, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v5, 0xffff, v5
	v_or_b32_e32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v6, s8
	v_lshrrev_b32_e32 v5, 8, v5
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB19_56
; %bb.55:
	global_store_b8 v[1:2], v5, off offset:2304
.LBB19_56:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b16 v5, 8, v5
	v_or_b32_e32 v5, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v8, 0xffff, v5
	v_or_b32_e32 v4, v8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v6, s9
	v_lshrrev_b32_e32 v9, 16, v4
	s_and_saveexec_b32 s0, s9
	s_cbranch_execz .LBB19_58
; %bb.57:
	global_store_b8 v[1:2], v9, off offset:2560
.LBB19_58:
	s_or_b32 exec_lo, exec_lo, s0
	v_and_b32_e32 v4, 0xff, v15
	v_lshlrev_b16 v7, 8, v16
	v_and_b32_e32 v5, 0xff, v17
	v_lshlrev_b16 v10, 8, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v4, v4, v7
	v_or_b32_e32 v5, v5, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, 0xffff, v4
	v_lshlrev_b32_e32 v5, 16, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v4, v4, v5
	s_and_saveexec_b32 s0, s10
	s_cbranch_execz .LBB19_60
; %bb.59:
	v_and_b32_e32 v9, 0xff, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v9, v3
	v_lshlrev_b32_e32 v3, 16, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v8, v3
	v_cndmask_b32_e64 v3, v3, v6, s10
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b64 v[8:9], 24, v[3:4]
	global_store_b8 v[1:2], v8, off offset:2816
.LBB19_60:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s11
	s_cbranch_execz .LBB19_62
; %bb.61:
	global_store_b8 v[1:2], v4, off offset:3072
.LBB19_62:
	s_or_b32 exec_lo, exec_lo, s0
	v_and_b32_e32 v6, 0xff, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v6, v7
	v_and_b32_e32 v3, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v3, v5
	v_cndmask_b32_e64 v3, v3, v4, s12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 8, v3
	s_and_saveexec_b32 s0, s12
	s_cbranch_execz .LBB19_64
; %bb.63:
	global_store_b8 v[1:2], v3, off offset:3328
.LBB19_64:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b16 v7, 8, v3
	s_and_saveexec_b32 s0, s13
	s_cbranch_execz .LBB19_66
; %bb.65:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v6, v7
	v_and_b32_e32 v3, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, v3, v5
	v_cndmask_b32_e64 v3, v3, v4, s13
	global_store_d16_hi_b8 v[1:2], v3, off offset:3584
.LBB19_66:
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3
	s_and_saveexec_b32 s0, s14
; %bb.67:
	v_or_b32_e32 v1, v6, v7
	s_or_b32 s19, s19, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, 0xffff, v1
	v_or_b32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v1, v1, v4, s14
	v_lshrrev_b32_e32 v3, 24, v1
; %bb.68:                               ; %Flow13
	s_or_b32 exec_lo, exec_lo, s0
.LBB19_69:                              ; %Flow12
	s_and_saveexec_b32 s0, s19
	s_cbranch_execz .LBB19_71
; %bb.70:                               ; %_ZN7rocprim26block_store_direct_stripedILj256EPhhLj16EEEvjT0_RAT2__T1_j.exit.sink.split.i
	s_add_u32 s0, s16, s18
	s_addc_u32 s1, s17, 0
	v_add_co_u32 v0, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s1, 0, s0
	s_waitcnt vmcnt(0)
	global_store_b8 v[0:1], v3, off offset:3840
.LBB19_71:                              ; %_ZN7rocprim6detail21transform_kernel_implILj256ELj16EhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT2_mT3_T4_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 21
		.amdhsa_next_free_sgpr 21
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_,comdat
.Lfunc_end19:
	.size	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_, .Lfunc_end19-_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEhEEhN6thrust10device_ptrIhEEPhNS_8identityIhEEEEvT1_mT2_T3_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2264
; NumSgprs: 23
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 23
; NumVGPRsForWavesPerEU: 21
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.protected	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj ; -- Begin function _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.globl	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	8
	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj: ; @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
; %bb.0:
	s_clause 0x3
	s_load_b128 s[80:83], s[0:1], 0x44
	s_load_b256 s[68:75], s[0:1], 0x0
	s_load_b128 s[76:79], s[0:1], 0x28
	s_load_b64 s[86:87], s[0:1], 0x38
	v_mul_u32_u24_e32 v32, 31, v0
	s_mul_i32 s84, s15, 0x3e00
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_u32 s15, s82
	s_cbranch_scc0 .LBB20_337
; %bb.1:
	s_load_b32 s4, s[0:1], 0x20
	s_mov_b32 s85, 0
	s_mul_i32 s66, s82, 0xffffc200
	v_dual_mov_b32 v4, -1 :: v_dual_lshlrev_b32 v1, 2, v32
	s_lshl_b64 s[2:3], s[84:85], 2
	v_mov_b32_e32 v3, -1
	s_waitcnt lgkmcnt(0)
	s_add_i32 s66, s66, s4
	s_add_u32 s4, s68, s2
	s_addc_u32 s3, s69, s3
	v_add_co_u32 v1, s4, s4, v1
	v_cmp_gt_u32_e64 s2, s66, v32
	v_add_co_ci_u32_e64 v2, null, s3, 0, s4
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB20_3
; %bb.2:
	global_load_b32 v4, v[1:2], off
.LBB20_3:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v5, 1, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s66, v5
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB20_5
; %bb.4:
	global_load_b32 v3, v[1:2], off offset:4
.LBB20_5:
	s_or_b32 exec_lo, exec_lo, s4
	v_dual_mov_b32 v5, -1 :: v_dual_add_nc_u32 v6, 2, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e64 s4, s66, v6
	v_mov_b32_e32 v6, -1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB20_7
; %bb.6:
	global_load_b32 v6, v[1:2], off offset:8
.LBB20_7:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v7, 3, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s66, v7
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB20_9
; %bb.8:
	global_load_b32 v5, v[1:2], off offset:12
.LBB20_9:
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v42, -1 :: v_dual_add_nc_u32 v7, 4, v32
	v_mov_b32_e32 v41, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s66, v7
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB20_11
; %bb.10:
	global_load_b32 v42, v[1:2], off offset:16
.LBB20_11:
	s_or_b32 exec_lo, exec_lo, s7
	v_add_nc_u32_e32 v7, 5, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s66, v7
	s_and_saveexec_b32 s8, s7
	s_cbranch_execz .LBB20_13
; %bb.12:
	global_load_b32 v41, v[1:2], off offset:20
.LBB20_13:
	s_or_b32 exec_lo, exec_lo, s8
	v_dual_mov_b32 v44, -1 :: v_dual_add_nc_u32 v7, 6, v32
	v_mov_b32_e32 v43, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s66, v7
	s_and_saveexec_b32 s9, s8
	s_cbranch_execz .LBB20_15
; %bb.14:
	global_load_b32 v44, v[1:2], off offset:24
.LBB20_15:
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v7, 7, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s66, v7
	s_and_saveexec_b32 s10, s9
	s_cbranch_execz .LBB20_17
; %bb.16:
	global_load_b32 v43, v[1:2], off offset:28
.LBB20_17:
	s_or_b32 exec_lo, exec_lo, s10
	v_dual_mov_b32 v46, -1 :: v_dual_add_nc_u32 v7, 8, v32
	v_mov_b32_e32 v45, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s66, v7
	s_and_saveexec_b32 s11, s10
	s_cbranch_execz .LBB20_19
; %bb.18:
	global_load_b32 v46, v[1:2], off offset:32
.LBB20_19:
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v7, 9, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s11, s66, v7
	s_and_saveexec_b32 s12, s11
	s_cbranch_execz .LBB20_21
; %bb.20:
	global_load_b32 v45, v[1:2], off offset:36
.LBB20_21:
	s_or_b32 exec_lo, exec_lo, s12
	v_dual_mov_b32 v48, -1 :: v_dual_add_nc_u32 v7, 10, v32
	v_mov_b32_e32 v47, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s66, v7
	s_and_saveexec_b32 s13, s12
	s_cbranch_execz .LBB20_23
; %bb.22:
	global_load_b32 v48, v[1:2], off offset:40
.LBB20_23:
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v7, 11, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s13, s66, v7
	s_and_saveexec_b32 s14, s13
	s_cbranch_execz .LBB20_25
; %bb.24:
	global_load_b32 v47, v[1:2], off offset:44
.LBB20_25:
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v50, -1 :: v_dual_add_nc_u32 v7, 12, v32
	v_mov_b32_e32 v49, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s14, s66, v7
	s_and_saveexec_b32 s16, s14
	s_cbranch_execz .LBB20_27
; %bb.26:
	global_load_b32 v50, v[1:2], off offset:48
.LBB20_27:
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v7, 13, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s16, s66, v7
	s_and_saveexec_b32 s17, s16
	s_cbranch_execz .LBB20_29
; %bb.28:
	global_load_b32 v49, v[1:2], off offset:52
.LBB20_29:
	s_or_b32 exec_lo, exec_lo, s17
	v_dual_mov_b32 v52, -1 :: v_dual_add_nc_u32 v7, 14, v32
	v_mov_b32_e32 v51, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s17, s66, v7
	s_and_saveexec_b32 s18, s17
	s_cbranch_execz .LBB20_31
; %bb.30:
	global_load_b32 v52, v[1:2], off offset:56
.LBB20_31:
	s_or_b32 exec_lo, exec_lo, s18
	v_add_nc_u32_e32 v7, 15, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s18, s66, v7
	s_and_saveexec_b32 s19, s18
	s_cbranch_execz .LBB20_33
; %bb.32:
	global_load_b32 v51, v[1:2], off offset:60
.LBB20_33:
	s_or_b32 exec_lo, exec_lo, s19
	v_dual_mov_b32 v54, -1 :: v_dual_add_nc_u32 v7, 16, v32
	v_mov_b32_e32 v53, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s19, s66, v7
	s_and_saveexec_b32 s20, s19
	s_cbranch_execz .LBB20_35
; %bb.34:
	global_load_b32 v54, v[1:2], off offset:64
.LBB20_35:
	s_or_b32 exec_lo, exec_lo, s20
	v_add_nc_u32_e32 v7, 17, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s20, s66, v7
	s_and_saveexec_b32 s21, s20
	s_cbranch_execz .LBB20_37
; %bb.36:
	global_load_b32 v53, v[1:2], off offset:68
.LBB20_37:
	s_or_b32 exec_lo, exec_lo, s21
	v_dual_mov_b32 v56, -1 :: v_dual_add_nc_u32 v7, 18, v32
	v_mov_b32_e32 v55, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s21, s66, v7
	s_and_saveexec_b32 s22, s21
	s_cbranch_execz .LBB20_39
; %bb.38:
	global_load_b32 v56, v[1:2], off offset:72
.LBB20_39:
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v7, 19, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s22, s66, v7
	s_and_saveexec_b32 s23, s22
	s_cbranch_execz .LBB20_41
; %bb.40:
	global_load_b32 v55, v[1:2], off offset:76
.LBB20_41:
	s_or_b32 exec_lo, exec_lo, s23
	v_dual_mov_b32 v58, -1 :: v_dual_add_nc_u32 v7, 20, v32
	v_mov_b32_e32 v57, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s23, s66, v7
	s_and_saveexec_b32 s24, s23
	s_cbranch_execz .LBB20_43
; %bb.42:
	global_load_b32 v58, v[1:2], off offset:80
.LBB20_43:
	s_or_b32 exec_lo, exec_lo, s24
	v_add_nc_u32_e32 v7, 21, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s24, s66, v7
	s_and_saveexec_b32 s25, s24
	s_cbranch_execz .LBB20_45
; %bb.44:
	global_load_b32 v57, v[1:2], off offset:84
.LBB20_45:
	s_or_b32 exec_lo, exec_lo, s25
	v_dual_mov_b32 v60, -1 :: v_dual_add_nc_u32 v7, 22, v32
	v_mov_b32_e32 v59, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s25, s66, v7
	s_and_saveexec_b32 s26, s25
	s_cbranch_execz .LBB20_47
; %bb.46:
	global_load_b32 v60, v[1:2], off offset:88
.LBB20_47:
	s_or_b32 exec_lo, exec_lo, s26
	v_add_nc_u32_e32 v7, 23, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s26, s66, v7
	s_and_saveexec_b32 s27, s26
	s_cbranch_execz .LBB20_49
; %bb.48:
	global_load_b32 v59, v[1:2], off offset:92
.LBB20_49:
	s_or_b32 exec_lo, exec_lo, s27
	v_dual_mov_b32 v62, -1 :: v_dual_add_nc_u32 v7, 24, v32
	v_mov_b32_e32 v61, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s27, s66, v7
	s_and_saveexec_b32 s28, s27
	s_cbranch_execz .LBB20_51
; %bb.50:
	global_load_b32 v62, v[1:2], off offset:96
.LBB20_51:
	s_or_b32 exec_lo, exec_lo, s28
	v_add_nc_u32_e32 v7, 25, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s28, s66, v7
	s_and_saveexec_b32 s29, s28
	s_cbranch_execz .LBB20_53
; %bb.52:
	global_load_b32 v61, v[1:2], off offset:100
.LBB20_53:
	s_or_b32 exec_lo, exec_lo, s29
	v_dual_mov_b32 v64, -1 :: v_dual_add_nc_u32 v7, 26, v32
	v_mov_b32_e32 v63, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s29, s66, v7
	s_and_saveexec_b32 s30, s29
	s_cbranch_execz .LBB20_55
; %bb.54:
	global_load_b32 v64, v[1:2], off offset:104
.LBB20_55:
	s_or_b32 exec_lo, exec_lo, s30
	v_add_nc_u32_e32 v7, 27, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s30, s66, v7
	s_and_saveexec_b32 s31, s30
	s_cbranch_execz .LBB20_57
; %bb.56:
	global_load_b32 v63, v[1:2], off offset:108
.LBB20_57:
	s_or_b32 exec_lo, exec_lo, s31
	v_dual_mov_b32 v66, -1 :: v_dual_add_nc_u32 v7, 28, v32
	v_mov_b32_e32 v65, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s31, s66, v7
	s_and_saveexec_b32 s33, s31
	s_cbranch_execz .LBB20_59
; %bb.58:
	global_load_b32 v66, v[1:2], off offset:112
.LBB20_59:
	s_or_b32 exec_lo, exec_lo, s33
	v_add_nc_u32_e32 v7, 29, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s33, s66, v7
	s_and_saveexec_b32 s34, s33
	s_cbranch_execz .LBB20_61
; %bb.60:
	global_load_b32 v65, v[1:2], off offset:116
.LBB20_61:
	s_or_b32 exec_lo, exec_lo, s34
	v_add_nc_u32_e32 v7, 30, v32
	v_mov_b32_e32 v67, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s34, s66, v7
	s_and_saveexec_b32 s35, s34
	s_cbranch_execz .LBB20_63
; %bb.62:
	global_load_b32 v67, v[1:2], off offset:120
.LBB20_63:                              ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIjEEjLj31EjEEvjT_RAT1__T0_jT2_.exit.i.i
	s_or_b32 exec_lo, exec_lo, s35
	v_or_b32_e32 v1, 0xfffffe00, v0
	v_dual_mov_b32 v7, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_mov_b32 s35, 0
.LBB20_64:                              ; %.lr.ph.i.i.i.i.i.i25.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v1, 0x200, v1
	ds_store_b32 v2, v7
	v_add_nc_u32_e32 v2, 0x800, v2
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v1
	s_or_b32 s35, vcc_lo, s35
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB20_64
; %bb.65:                               ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i27.i
	s_or_b32 exec_lo, exec_lo, s35
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_lshl_b32 s35, -1, s81
	v_lshrrev_b32_e32 v10, s80, v6
	s_not_b32 s67, s35
	s_mov_b32 s39, exec_lo
	v_and_b32_e32 v1, s67, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v2, 9, v1
	v_lshrrev_b32_e32 v1, 3, v1
	v_and_or_b32 v2, 0xe00, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v2
	v_add_lshl_u32 v7, v2, v1, 1
	v_lshrrev_b32_e32 v2, s80, v3
	ds_load_u16 v1, v7
	v_and_b32_e32 v2, s67, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 9, v2
	v_lshrrev_b32_e32 v2, 3, v2
	v_and_or_b32 v8, 0xe00, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 1, v8
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v9, v1, 1
	v_add_lshl_u32 v8, v8, v2, 1
	ds_store_b16 v7, v9
	ds_load_u16 v2, v8
	v_and_b32_e32 v9, s67, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 9, v9
	v_lshrrev_b32_e32 v9, 3, v9
	v_and_or_b32 v10, 0xe00, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 1, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v11, v2, 1
	v_add_lshl_u32 v15, v10, v9, 1
	v_lshrrev_b32_e32 v10, s80, v5
	ds_store_b16 v8, v11
	ds_load_u16 v9, v15
	v_and_b32_e32 v10, s67, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 9, v10
	v_lshrrev_b32_e32 v10, 3, v10
	v_and_or_b32 v11, 0xe00, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 1, v11
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v12, v9, 1
	v_add_lshl_u32 v17, v11, v10, 1
	v_lshrrev_b32_e32 v11, s80, v42
	ds_store_b16 v15, v12
	ds_load_u16 v10, v17
	v_and_b32_e32 v11, s67, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 9, v11
	v_lshrrev_b32_e32 v11, 3, v11
	v_and_or_b32 v12, 0xe00, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 1, v12
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v13, v10, 1
	v_add_lshl_u32 v19, v12, v11, 1
	v_lshrrev_b32_e32 v12, s80, v41
	ds_store_b16 v17, v13
	ds_load_u16 v11, v19
	v_and_b32_e32 v12, s67, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 9, v12
	v_lshrrev_b32_e32 v12, 3, v12
	v_and_or_b32 v13, 0xe00, v13, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 1, v13
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v14, v11, 1
	v_add_lshl_u32 v21, v13, v12, 1
	v_lshrrev_b32_e32 v13, s80, v44
	ds_store_b16 v19, v14
	ds_load_u16 v12, v21
	v_and_b32_e32 v13, s67, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 9, v13
	v_lshrrev_b32_e32 v13, 3, v13
	v_and_or_b32 v14, 0xe00, v14, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 1, v14
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v16, v12, 1
	v_add_lshl_u32 v23, v14, v13, 1
	v_lshrrev_b32_e32 v14, s80, v43
	ds_store_b16 v21, v16
	ds_load_u16 v13, v23
	v_and_b32_e32 v14, s67, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v16, 9, v14
	v_lshrrev_b32_e32 v14, 3, v14
	v_and_or_b32 v16, 0xe00, v16, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v16, 1, v16
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v18, v13, 1
	v_add_lshl_u32 v25, v16, v14, 1
	v_lshrrev_b32_e32 v16, s80, v46
	ds_store_b16 v23, v18
	ds_load_u16 v14, v25
	v_and_b32_e32 v16, s67, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v18, 9, v16
	v_lshrrev_b32_e32 v16, 3, v16
	v_and_or_b32 v18, 0xe00, v18, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v18, 1, v18
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v20, v14, 1
	v_add_lshl_u32 v27, v18, v16, 1
	v_lshrrev_b32_e32 v18, s80, v45
	ds_store_b16 v25, v20
	ds_load_u16 v16, v27
	v_and_b32_e32 v18, s67, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v20, 9, v18
	v_lshrrev_b32_e32 v18, 3, v18
	v_and_or_b32 v20, 0xe00, v20, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v20, 1, v20
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v22, v16, 1
	v_add_lshl_u32 v29, v20, v18, 1
	v_lshrrev_b32_e32 v20, s80, v48
	ds_store_b16 v27, v22
	ds_load_u16 v18, v29
	v_and_b32_e32 v20, s67, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v22, 9, v20
	v_lshrrev_b32_e32 v20, 3, v20
	v_and_or_b32 v22, 0xe00, v22, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v22, 1, v22
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v24, v18, 1
	v_add_lshl_u32 v31, v22, v20, 1
	v_lshrrev_b32_e32 v22, s80, v47
	ds_store_b16 v29, v24
	ds_load_u16 v20, v31
	v_and_b32_e32 v22, s67, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v24, 9, v22
	v_lshrrev_b32_e32 v22, 3, v22
	v_and_or_b32 v24, 0xe00, v24, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v24, 1, v24
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v26, v20, 1
	v_add_lshl_u32 v34, v24, v22, 1
	v_lshrrev_b32_e32 v24, s80, v50
	ds_store_b16 v31, v26
	ds_load_u16 v22, v34
	v_and_b32_e32 v24, s67, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v26, 9, v24
	v_lshrrev_b32_e32 v24, 3, v24
	v_and_or_b32 v26, 0xe00, v26, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v26, 1, v26
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v28, v22, 1
	v_add_lshl_u32 v36, v26, v24, 1
	v_lshrrev_b32_e32 v26, s80, v49
	ds_store_b16 v34, v28
	ds_load_u16 v24, v36
	v_and_b32_e32 v26, s67, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v28, 9, v26
	v_lshrrev_b32_e32 v26, 3, v26
	v_and_or_b32 v28, 0xe00, v28, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v28, 1, v28
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v30, v24, 1
	v_add_lshl_u32 v38, v28, v26, 1
	v_lshrrev_b32_e32 v28, s80, v52
	ds_store_b16 v36, v30
	ds_load_u16 v26, v38
	v_and_b32_e32 v28, s67, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v30, 9, v28
	v_lshrrev_b32_e32 v28, 3, v28
	v_and_or_b32 v30, 0xe00, v30, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v30, 1, v30
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v33, v26, 1
	v_add_lshl_u32 v40, v30, v28, 1
	v_lshrrev_b32_e32 v30, s80, v51
	ds_store_b16 v38, v33
	ds_load_u16 v28, v40
	v_and_b32_e32 v30, s67, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v33, 9, v30
	v_lshrrev_b32_e32 v30, 3, v30
	v_and_or_b32 v33, 0xe00, v33, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v33, 1, v33
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v35, v28, 1
	v_add_lshl_u32 v69, v33, v30, 1
	v_lshrrev_b32_e32 v33, s80, v54
	ds_store_b16 v40, v35
	ds_load_u16 v30, v69
	v_and_b32_e32 v33, s67, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v35, 9, v33
	v_lshrrev_b32_e32 v33, 3, v33
	v_and_or_b32 v35, 0xe00, v35, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v35, 1, v35
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v37, v30, 1
	v_add_lshl_u32 v71, v35, v33, 1
	v_lshrrev_b32_e32 v35, s80, v53
	ds_store_b16 v69, v37
	ds_load_u16 v33, v71
	v_and_b32_e32 v35, s67, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v37, 9, v35
	v_lshrrev_b32_e32 v35, 3, v35
	v_and_or_b32 v37, 0xe00, v37, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v37, 1, v37
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v39, v33, 1
	v_add_lshl_u32 v73, v37, v35, 1
	v_lshrrev_b32_e32 v37, s80, v56
	ds_store_b16 v71, v39
	ds_load_u16 v35, v73
	v_and_b32_e32 v37, s67, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 9, v37
	v_lshrrev_b32_e32 v37, 3, v37
	v_and_or_b32 v39, 0xe00, v39, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 1, v39
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v68, v35, 1
	v_add_lshl_u32 v75, v39, v37, 1
	v_lshrrev_b32_e32 v39, s80, v55
	ds_store_b16 v73, v68
	ds_load_u16 v37, v75
	v_and_b32_e32 v39, s67, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 9, v39
	v_lshrrev_b32_e32 v39, 3, v39
	v_and_or_b32 v68, 0xe00, v68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 1, v68
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v70, v37, 1
	v_add_lshl_u32 v77, v68, v39, 1
	v_lshrrev_b32_e32 v68, s80, v58
	ds_store_b16 v75, v70
	ds_load_u16 v39, v77
	v_and_b32_e32 v68, s67, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 9, v68
	v_lshrrev_b32_e32 v68, 3, v68
	v_and_or_b32 v70, 0xe00, v70, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 1, v70
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v72, v39, 1
	v_add_lshl_u32 v79, v70, v68, 1
	v_lshrrev_b32_e32 v70, s80, v57
	ds_store_b16 v77, v72
	ds_load_u16 v68, v79
	v_and_b32_e32 v70, s67, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 9, v70
	v_lshrrev_b32_e32 v70, 3, v70
	v_and_or_b32 v72, 0xe00, v72, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 1, v72
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v74, v68, 1
	v_add_lshl_u32 v81, v72, v70, 1
	v_lshrrev_b32_e32 v72, s80, v60
	ds_store_b16 v79, v74
	ds_load_u16 v70, v81
	v_and_b32_e32 v72, s67, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 9, v72
	v_lshrrev_b32_e32 v72, 3, v72
	v_and_or_b32 v74, 0xe00, v74, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 1, v74
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v76, v70, 1
	v_add_lshl_u32 v83, v74, v72, 1
	v_lshrrev_b32_e32 v74, s80, v59
	ds_store_b16 v81, v76
	ds_load_u16 v72, v83
	v_and_b32_e32 v74, s67, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 9, v74
	v_lshrrev_b32_e32 v74, 3, v74
	v_and_or_b32 v76, 0xe00, v76, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 1, v76
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v78, v72, 1
	v_add_lshl_u32 v85, v76, v74, 1
	v_lshrrev_b32_e32 v76, s80, v62
	ds_store_b16 v83, v78
	ds_load_u16 v74, v85
	v_and_b32_e32 v76, s67, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 9, v76
	v_lshrrev_b32_e32 v76, 3, v76
	v_and_or_b32 v78, 0xe00, v78, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 1, v78
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v80, v74, 1
	v_add_lshl_u32 v87, v78, v76, 1
	v_lshrrev_b32_e32 v78, s80, v61
	ds_store_b16 v85, v80
	ds_load_u16 v76, v87
	v_and_b32_e32 v78, s67, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 9, v78
	v_lshrrev_b32_e32 v78, 3, v78
	v_and_or_b32 v80, 0xe00, v80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 1, v80
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v82, v76, 1
	v_add_lshl_u32 v89, v80, v78, 1
	v_lshrrev_b32_e32 v80, s80, v64
	ds_store_b16 v87, v82
	ds_load_u16 v78, v89
	v_and_b32_e32 v80, s67, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 9, v80
	v_lshrrev_b32_e32 v80, 3, v80
	v_and_or_b32 v82, 0xe00, v82, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 1, v82
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v84, v78, 1
	v_add_lshl_u32 v90, v82, v80, 1
	v_lshrrev_b32_e32 v82, s80, v63
	ds_store_b16 v89, v84
	ds_load_u16 v80, v90
	v_and_b32_e32 v82, s67, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 9, v82
	v_lshrrev_b32_e32 v82, 3, v82
	v_and_or_b32 v84, 0xe00, v84, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 1, v84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v86, v80, 1
	v_add_lshl_u32 v91, v84, v82, 1
	v_lshrrev_b32_e32 v84, s80, v66
	ds_store_b16 v90, v86
	ds_load_u16 v82, v91
	v_and_b32_e32 v84, s67, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 9, v84
	v_lshrrev_b32_e32 v84, 3, v84
	v_and_or_b32 v86, 0xe00, v86, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 1, v86
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v88, v82, 1
	v_add_lshl_u32 v92, v86, v84, 1
	v_lshrrev_b32_e32 v86, s80, v65
	ds_store_b16 v91, v88
	ds_load_u16 v84, v92
	v_and_b32_e32 v86, s67, v86
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 9, v86
	v_lshrrev_b32_e32 v86, 3, v86
	v_and_or_b32 v88, 0xe00, v88, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 1, v88
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v94, v84, 1
	v_add_lshl_u32 v93, v88, v86, 1
	v_lshrrev_b32_e32 v88, s80, v67
	ds_store_b16 v92, v94
	ds_load_u16 v86, v93
	v_and_b32_e32 v88, s67, v88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 9, v88
	v_lshrrev_b32_e32 v88, 3, v88
	v_and_or_b32 v94, 0xe00, v94, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 1, v94
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v86, 1
	v_add_lshl_u32 v94, v94, v88, 1
	ds_store_b16 v93, v95
	ds_load_u16 v88, v94
	v_lshlrev_b32_e32 v95, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v88, 1
	ds_store_b16 v94, v96
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[96:99], v95 offset1:1
	ds_load_2addr_b64 v[100:103], v95 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v96, v97, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v96, v96, v98, v99
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v97, v96, v100, v101
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_or_b32_e32 v100, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v97, v97, v102, v103
	v_and_b32_e32 v98, 15, v96
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v99, v97 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s35, 0, v98
	v_cmp_lt_u32_e64 s36, 1, v98
	v_cmp_lt_u32_e64 s37, 3, v98
	v_cmp_lt_u32_e64 s38, 7, v98
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, v99, 0, s35
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v99, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v97, v97, v99
	v_mov_b32_dpp v99, v97 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, 0, v99, s37
	v_add_nc_u32_e32 v97, v97, v99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v98, 0, v99, s38
	v_bfe_i32 v99, v96, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v97, v97, v98
	ds_swizzle_b32 v98, v97 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v98, v99, v98
	v_lshrrev_b32_e32 v99, 5, v0
	v_add_nc_u32_e32 v97, v97, v98
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v99
	v_cmpx_eq_u32_e64 v100, v0
	s_cbranch_execz .LBB20_67
; %bb.66:
	ds_store_b32 v98, v97 offset:16384
.LBB20_67:
	s_or_b32 exec_lo, exec_lo, s39
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s39, vcc_lo
	s_cbranch_execz .LBB20_69
; %bb.68:
	v_mad_i32_i24 v99, 0xffffffe4, v0, v95
	ds_load_b32 v100, v99 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v101, v100 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, v101, 0, s35
	v_add_nc_u32_e32 v100, v101, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	v_mov_b32_dpp v101, v100 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, 0, v101, s37
	v_add_nc_u32_e32 v100, v100, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s38
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	ds_store_b32 v99, v100 offset:16384
.LBB20_69:                              ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i36.i
	s_or_b32 exec_lo, exec_lo, s39
	v_dual_mov_b32 v100, 0 :: v_dual_mov_b32 v99, 0
	s_mov_b32 s36, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB20_71
; %bb.70:
	ds_load_b32 v99, v98 offset:16380
.LBB20_71:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjhjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb0EN6thrust10device_ptrIjEESB_NSA_IhEESC_EEvT0_T1_T2_T3_PjSH_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESE_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s36
	v_add_nc_u32_e32 v98, -1, v96
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s35, 0, v98
	v_cndmask_b32_e64 v98, v98, v96, s35
	v_cmp_eq_u32_e64 s35, 0, v96
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v98
	ds_bpermute_b32 v97, v98, v97
	ds_load_b32 v98, v100 offset:16444
	ds_load_2addr_b64 v[100:103], v95 offset1:1
	ds_load_b32 v104, v95 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v96, v97, v99, s35
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v96, v98, 16, v96
	ds_load_b64 v[98:99], v95 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v97, v96, v100
	v_add_nc_u32_e32 v100, v101, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v102, v100
	v_add_nc_u32_e32 v102, v103, v101
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v103, v98, v102
	v_add_nc_u32_e32 v98, v99, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v99, v104, v98
	ds_store_2addr_b64 v95, v[96:97], v[100:101] offset1:1
	ds_store_2addr_b64 v95, v[102:103], v[98:99] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v108, v7
	ds_load_u16 v107, v8
	ds_load_u16 v106, v15
	ds_load_u16 v105, v17
	ds_load_u16 v104, v19
	ds_load_u16 v103, v21
	ds_load_u16 v102, v23
	ds_load_u16 v101, v25
	ds_load_u16 v100, v27
	ds_load_u16 v15, v29
	ds_load_u16 v17, v31
	ds_load_u16 v19, v34
	ds_load_u16 v99, v36
	ds_load_u16 v98, v38
	ds_load_u16 v23, v40
	ds_load_u16 v21, v69
	ds_load_u16 v97, v71
	ds_load_u16 v96, v73
	ds_load_u16 v95, v75
	ds_load_u16 v25, v77
	ds_load_u16 v27, v79
	ds_load_u16 v29, v81
	ds_load_u16 v75, v83
	ds_load_u16 v73, v85
	ds_load_u16 v34, v87
	ds_load_u16 v31, v89
	ds_load_u16 v71, v90
	ds_load_u16 v69, v91
	ds_load_u16 v40, v92
	ds_load_u16 v36, v93
	ds_load_u16 v38, v94
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB20_75
; %bb.72:
	v_lshrrev_b32_e32 v7, 3, v0
	v_lshlrev_b32_e32 v8, 10, v0
	v_add_nc_u32_e32 v77, 1, v0
	s_mov_b32 s37, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v7, 0x1c00, v8, v7
	v_dual_mov_b32 v8, 0x3e00 :: v_dual_lshlrev_b32 v7, 1, v7
	ds_load_u16 v7, v7
	v_cmpx_ne_u32_e32 16, v77
	s_cbranch_execz .LBB20_74
; %bb.73:
	v_lshlrev_b32_e32 v8, 10, v77
	v_lshrrev_b32_e32 v77, 3, v77
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v8, 0x1c00, v8, v77
	v_lshlrev_b32_e32 v8, 1, v8
	ds_load_u16 v8, v8
.LBB20_74:
	s_or_b32 exec_lo, exec_lo, s37
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v8, v7
.LBB20_75:                              ; %Flow92
	s_or_b32 exec_lo, exec_lo, s36
	v_and_b32_e32 v1, 0xffff, v1
	v_and_b32_e32 v77, 0xffff, v9
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v9, 0xffff, v108
	v_and_b32_e32 v2, 0xffff, v2
	v_and_b32_e32 v79, 0xffff, v10
	s_waitcnt lgkmcnt(29)
	v_and_b32_e32 v10, 0xffff, v107
	v_and_b32_e32 v83, 0xffff, v12
	v_add_nc_u32_e32 v9, v9, v1
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v1, 0xffff, v106
	v_and_b32_e32 v81, 0xffff, v11
	v_add_nc_u32_e32 v10, v10, v2
	s_waitcnt lgkmcnt(25)
	v_and_b32_e32 v2, 0xffff, v103
	v_and_b32_e32 v85, 0xffff, v13
	v_and_b32_e32 v12, 0xffff, v105
	v_add_nc_u32_e32 v11, v1, v77
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v1, 0xffff, v102
	v_and_b32_e32 v87, 0xffff, v14
	v_add_nc_u32_e32 v14, v2, v83
	s_waitcnt lgkmcnt(23)
	v_and_b32_e32 v2, 0xffff, v101
	v_and_b32_e32 v20, 0xffff, v20
	v_add_nc_u32_e32 v12, v12, v79
	s_waitcnt lgkmcnt(21)
	v_and_b32_e32 v79, 0xffff, v15
	v_add_nc_u32_e32 v15, v1, v85
	s_waitcnt lgkmcnt(20)
	v_and_b32_e32 v1, 0xffff, v17
	v_and_b32_e32 v89, 0xffff, v16
	v_and_b32_e32 v22, 0xffff, v22
	v_add_nc_u32_e32 v16, v2, v87
	s_waitcnt lgkmcnt(19)
	v_and_b32_e32 v2, 0xffff, v19
	v_and_b32_e32 v24, 0xffff, v24
	v_add_nc_u32_e32 v19, v1, v20
	s_waitcnt lgkmcnt(18)
	v_and_b32_e32 v1, 0xffff, v99
	v_and_b32_e32 v30, 0xffff, v30
	v_and_b32_e32 v77, 0xffff, v100
	v_add_nc_u32_e32 v20, v2, v22
	s_waitcnt lgkmcnt(15)
	v_and_b32_e32 v2, 0xffff, v21
	v_and_b32_e32 v33, 0xffff, v33
	v_add_nc_u32_e32 v21, v1, v24
	s_waitcnt lgkmcnt(14)
	v_and_b32_e32 v1, 0xffff, v97
	v_and_b32_e32 v26, 0xffff, v26
	v_and_b32_e32 v28, 0xffff, v28
	v_and_b32_e32 v35, 0xffff, v35
	v_add_nc_u32_e32 v17, v77, v89
	v_and_b32_e32 v77, 0xffff, v98
	v_and_b32_e32 v23, 0xffff, v23
	v_add_nc_u32_e32 v24, v2, v30
	s_waitcnt lgkmcnt(13)
	v_and_b32_e32 v2, 0xffff, v96
	v_and_b32_e32 v68, 0xffff, v68
	s_waitcnt lgkmcnt(11)
	v_and_b32_e32 v30, 0xffff, v25
	v_add_nc_u32_e32 v25, v1, v33
	s_waitcnt lgkmcnt(10)
	v_and_b32_e32 v1, 0xffff, v27
	v_and_b32_e32 v37, 0xffff, v37
	v_and_b32_e32 v39, 0xffff, v39
	v_and_b32_e32 v70, 0xffff, v70
	v_add_nc_u32_e32 v22, v77, v26
	v_add_nc_u32_e32 v23, v23, v28
	v_and_b32_e32 v28, 0xffff, v95
	v_add_nc_u32_e32 v26, v2, v35
	s_waitcnt lgkmcnt(9)
	v_and_b32_e32 v2, 0xffff, v29
	v_and_b32_e32 v72, 0xffff, v72
	v_add_nc_u32_e32 v29, v1, v68
	s_waitcnt lgkmcnt(8)
	v_and_b32_e32 v1, 0xffff, v75
	v_and_b32_e32 v78, 0xffff, v78
	v_add_nc_u32_e32 v27, v28, v37
	v_add_nc_u32_e32 v28, v30, v39
	v_add_nc_u32_e32 v30, v2, v70
	s_waitcnt lgkmcnt(5)
	v_and_b32_e32 v2, 0xffff, v31
	v_and_b32_e32 v80, 0xffff, v80
	v_add_nc_u32_e32 v31, v1, v72
	s_waitcnt lgkmcnt(4)
	v_and_b32_e32 v1, 0xffff, v71
	v_and_b32_e32 v82, 0xffff, v82
	v_add_nc_u32_e32 v35, v2, v78
	s_waitcnt lgkmcnt(3)
	v_and_b32_e32 v2, 0xffff, v69
	v_and_b32_e32 v13, 0xffff, v104
	v_and_b32_e32 v84, 0xffff, v84
	v_and_b32_e32 v86, 0xffff, v86
	v_and_b32_e32 v88, 0xffff, v88
	s_waitcnt lgkmcnt(2)
	v_and_b32_e32 v39, 0xffff, v40
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v40, 0xffff, v36
	v_add_nc_u32_e32 v36, v1, v80
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v1, 0xffff, v38
	v_add_nc_u32_e32 v37, v2, v82
	v_lshlrev_b32_e32 v2, 2, v9
	v_and_b32_e32 v18, 0xffff, v18
	v_add_nc_u32_e32 v13, v13, v81
	v_add_nc_u32_e32 v38, v39, v84
	v_add_nc_u32_e32 v39, v40, v86
	v_add_nc_u32_e32 v40, v1, v88
	v_lshlrev_b32_e32 v1, 2, v10
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v2, v4 offset:64
	v_lshlrev_b32_e32 v2, 2, v11
	v_lshlrev_b32_e32 v4, 2, v12
	v_add_nc_u32_e32 v18, v79, v18
	v_lshlrev_b32_e32 v68, 2, v13
	v_lshlrev_b32_e32 v69, 2, v14
	ds_store_b32 v1, v3 offset:64
	ds_store_b32 v2, v6 offset:64
	ds_store_b32 v4, v5 offset:64
	ds_store_b32 v68, v42 offset:64
	ds_store_b32 v69, v41 offset:64
	v_lshlrev_b32_e32 v1, 2, v15
	v_lshlrev_b32_e32 v2, 2, v16
	v_lshlrev_b32_e32 v3, 2, v17
	v_lshlrev_b32_e32 v4, 2, v18
	v_lshlrev_b32_e32 v5, 2, v19
	ds_store_b32 v1, v44 offset:64
	ds_store_b32 v2, v43 offset:64
	ds_store_b32 v3, v46 offset:64
	ds_store_b32 v4, v45 offset:64
	ds_store_b32 v5, v48 offset:64
	v_lshlrev_b32_e32 v1, 2, v20
	v_lshlrev_b32_e32 v2, 2, v21
	v_and_b32_e32 v74, 0xffff, v74
	v_and_b32_e32 v33, 0xffff, v73
	v_lshlrev_b32_e32 v3, 2, v22
	v_and_b32_e32 v76, 0xffff, v76
	v_and_b32_e32 v34, 0xffff, v34
	v_lshlrev_b32_e32 v4, 2, v23
	v_lshlrev_b32_e32 v5, 2, v24
	ds_store_b32 v1, v47 offset:64
	ds_store_b32 v2, v50 offset:64
	ds_store_b32 v3, v49 offset:64
	ds_store_b32 v4, v52 offset:64
	ds_store_b32 v5, v51 offset:64
	v_lshlrev_b32_e32 v1, 2, v25
	v_lshlrev_b32_e32 v2, 2, v26
	v_add_nc_u32_e32 v33, v33, v74
	v_lshlrev_b32_e32 v3, 2, v27
	v_add_nc_u32_e32 v34, v34, v76
	v_lshlrev_b32_e32 v4, 2, v28
	v_lshlrev_b32_e32 v5, 2, v29
	ds_store_b32 v1, v54 offset:64
	ds_store_b32 v2, v53 offset:64
	ds_store_b32 v3, v56 offset:64
	ds_store_b32 v4, v55 offset:64
	ds_store_b32 v5, v58 offset:64
	v_lshlrev_b32_e32 v1, 2, v30
	v_lshlrev_b32_e32 v2, 2, v31
	v_lshlrev_b32_e32 v3, 2, v33
	v_lshlrev_b32_e32 v4, 2, v34
	v_lshlrev_b32_e32 v5, 2, v35
	ds_store_b32 v1, v57 offset:64
	ds_store_b32 v2, v60 offset:64
	ds_store_b32 v3, v59 offset:64
	ds_store_b32 v4, v62 offset:64
	ds_store_b32 v5, v61 offset:64
	v_lshlrev_b32_e32 v1, 2, v36
	v_lshlrev_b32_e32 v2, 2, v37
	v_lshlrev_b32_e32 v3, 2, v38
	v_lshlrev_b32_e32 v4, 2, v39
	v_lshlrev_b32_e32 v5, 2, v40
	ds_store_b32 v1, v64 offset:64
	ds_store_b32 v2, v63 offset:64
	ds_store_b32 v3, v66 offset:64
	ds_store_b32 v4, v65 offset:64
	ds_store_b32 v5, v67 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB20_86
; %bb.76:
	v_lshl_or_b32 v3, s15, 4, v0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v41, 0
	s_mov_b32 s37, 0
	s_mov_b32 s38, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v8
	v_add_co_u32 v1, s35, s86, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s35, s87, v2, s35
                                        ; implicit-def: $sgpr35
	global_store_b32 v[1:2], v3, off
.LBB20_77:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB20_80 Depth 2
	s_or_b32 s35, s35, exec_lo
	s_cmp_eq_u32 s38, 0
	s_cbranch_scc1 .LBB20_83
; %bb.78:                               ;   in Loop: Header=BB20_77 Depth=1
	s_add_i32 s38, s38, -1
	s_mov_b32 s39, exec_lo
	v_lshl_or_b32 v3, s38, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s35, s86, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s35, s87, v6, s35
	global_load_b32 v42, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v42
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB20_82
; %bb.79:                               ; %.lr.ph.i46.i.preheader
                                        ;   in Loop: Header=BB20_77 Depth=1
	s_mov_b32 s40, 0
.LBB20_80:                              ; %.lr.ph.i46.i
                                        ;   Parent Loop BB20_77 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v42, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s35, 0, v3
	s_or_b32 s40, s35, s40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s40
	s_cbranch_execnz .LBB20_80
; %bb.81:                               ; %Flow
                                        ;   in Loop: Header=BB20_77 Depth=1
	s_or_b32 exec_lo, exec_lo, s40
.LBB20_82:                              ; %Flow89
                                        ;   in Loop: Header=BB20_77 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s39
	v_and_b32_e32 v5, 0x3fffffff, v42
	v_cmp_eq_u32_e64 s35, 0x80000000, v3
	v_add_nc_u32_e32 v41, v5, v41
	s_branch .LBB20_84
.LBB20_83:                              ;   in Loop: Header=BB20_77 Depth=1
                                        ; implicit-def: $sgpr38
.LBB20_84:                              ; %Flow90
                                        ;   in Loop: Header=BB20_77 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s39, exec_lo, s35
	s_or_b32 s37, s39, s37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s37
	s_cbranch_execnz .LBB20_77
; %bb.85:
	s_or_b32 exec_lo, exec_lo, s37
	v_add_nc_u32_e32 v3, v41, v8
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v41, v7
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	ds_store_b32 v4, v1
.LBB20_86:                              ; %Flow91
	s_or_b32 exec_lo, exec_lo, s36
	v_cmp_gt_u32_e64 s35, s66, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s37, s35
	s_cbranch_execz .LBB20_88
; %bb.87:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v3, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s36, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s36, s71, v2, s36
	global_store_b32 v[1:2], v3, off
.LBB20_88:
	s_or_b32 exec_lo, exec_lo, s37
	v_or_b32_e32 v3, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s36, s66, v3
	s_and_saveexec_b32 s38, s36
	s_cbranch_execz .LBB20_90
; %bb.89:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v4, v1 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s37, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s37, s71, v2, s37
	global_store_b32 v[1:2], v4, off
.LBB20_90:
	s_or_b32 exec_lo, exec_lo, s38
	v_or_b32_e32 v4, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s37, s66, v4
	s_and_saveexec_b32 s39, s37
	s_cbranch_execz .LBB20_92
; %bb.91:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v5, v1 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s38, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s38, s71, v2, s38
	global_store_b32 v[1:2], v5, off
.LBB20_92:
	s_or_b32 exec_lo, exec_lo, s39
	v_or_b32_e32 v5, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s38, s66, v5
	s_and_saveexec_b32 s40, s38
	s_cbranch_execz .LBB20_94
; %bb.93:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v6, v1 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s39, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s39, s71, v2, s39
	global_store_b32 v[1:2], v6, off
.LBB20_94:
	s_or_b32 exec_lo, exec_lo, s40
	v_or_b32_e32 v6, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s39, s66, v6
	s_and_saveexec_b32 s41, s39
	s_cbranch_execz .LBB20_96
; %bb.95:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v41, v1 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s40, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s40, s71, v2, s40
	global_store_b32 v[1:2], v41, off
.LBB20_96:
	s_or_b32 exec_lo, exec_lo, s41
	v_or_b32_e32 v41, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s40, s66, v41
	s_and_saveexec_b32 s42, s40
	s_cbranch_execz .LBB20_98
; %bb.97:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v42, v1 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s41, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s41, s71, v2, s41
	global_store_b32 v[1:2], v42, off
.LBB20_98:
	s_or_b32 exec_lo, exec_lo, s42
	v_or_b32_e32 v42, 0xc00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s41, s66, v42
	s_and_saveexec_b32 s43, s41
	s_cbranch_execz .LBB20_100
; %bb.99:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v43, v1 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s42, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s42, s71, v2, s42
	global_store_b32 v[1:2], v43, off
.LBB20_100:
	s_or_b32 exec_lo, exec_lo, s43
	v_or_b32_e32 v43, 0xe00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s42, s66, v43
	s_and_saveexec_b32 s44, s42
	s_cbranch_execz .LBB20_102
; %bb.101:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v44, v1 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s43, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s43, s71, v2, s43
	global_store_b32 v[1:2], v44, off
.LBB20_102:
	s_or_b32 exec_lo, exec_lo, s44
	v_or_b32_e32 v44, 0x1000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s43, s66, v44
	s_and_saveexec_b32 s45, s43
	s_cbranch_execz .LBB20_104
; %bb.103:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v45, v1 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s44, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s44, s71, v2, s44
	global_store_b32 v[1:2], v45, off
.LBB20_104:
	s_or_b32 exec_lo, exec_lo, s45
	v_or_b32_e32 v45, 0x1200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s44, s66, v45
	s_and_saveexec_b32 s46, s44
	s_cbranch_execz .LBB20_106
; %bb.105:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v46, v1 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s45, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s45, s71, v2, s45
	global_store_b32 v[1:2], v46, off
.LBB20_106:
	s_or_b32 exec_lo, exec_lo, s46
	v_or_b32_e32 v46, 0x1400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s45, s66, v46
	s_and_saveexec_b32 s47, s45
	s_cbranch_execz .LBB20_108
; %bb.107:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v47, v1 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s46, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s46, s71, v2, s46
	global_store_b32 v[1:2], v47, off
.LBB20_108:
	s_or_b32 exec_lo, exec_lo, s47
	v_or_b32_e32 v47, 0x1600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s46, s66, v47
	s_and_saveexec_b32 s48, s46
	s_cbranch_execz .LBB20_110
; %bb.109:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v48, v1 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s47, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s47, s71, v2, s47
	global_store_b32 v[1:2], v48, off
.LBB20_110:
	s_or_b32 exec_lo, exec_lo, s48
	v_or_b32_e32 v48, 0x1800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s47, s66, v48
	s_and_saveexec_b32 s49, s47
	s_cbranch_execz .LBB20_112
; %bb.111:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v49, v1 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s48, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s48, s71, v2, s48
	global_store_b32 v[1:2], v49, off
.LBB20_112:
	s_or_b32 exec_lo, exec_lo, s49
	v_or_b32_e32 v49, 0x1a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s48, s66, v49
	s_and_saveexec_b32 s50, s48
	s_cbranch_execz .LBB20_114
; %bb.113:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v50, v1 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s49, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s49, s71, v2, s49
	global_store_b32 v[1:2], v50, off
.LBB20_114:
	s_or_b32 exec_lo, exec_lo, s50
	v_or_b32_e32 v50, 0x1c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s49, s66, v50
	s_and_saveexec_b32 s51, s49
	s_cbranch_execz .LBB20_116
; %bb.115:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v51, v1 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s50, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s50, s71, v2, s50
	global_store_b32 v[1:2], v51, off
.LBB20_116:
	s_or_b32 exec_lo, exec_lo, s51
	v_or_b32_e32 v51, 0x1e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s50, s66, v51
	s_and_saveexec_b32 s52, s50
	s_cbranch_execz .LBB20_118
; %bb.117:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v52, v1 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s51, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s51, s71, v2, s51
	global_store_b32 v[1:2], v52, off
.LBB20_118:
	s_or_b32 exec_lo, exec_lo, s52
	v_or_b32_e32 v52, 0x2000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s51, s66, v52
	s_and_saveexec_b32 s53, s51
	s_cbranch_execz .LBB20_120
; %bb.119:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v53, v1 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s52, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s52, s71, v2, s52
	global_store_b32 v[1:2], v53, off
.LBB20_120:
	s_or_b32 exec_lo, exec_lo, s53
	v_or_b32_e32 v53, 0x2200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s52, s66, v53
	s_and_saveexec_b32 s54, s52
	s_cbranch_execz .LBB20_122
; %bb.121:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v54, v1 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s53, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s53, s71, v2, s53
	global_store_b32 v[1:2], v54, off
.LBB20_122:
	s_or_b32 exec_lo, exec_lo, s54
	v_or_b32_e32 v54, 0x2400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s53, s66, v54
	s_and_saveexec_b32 s55, s53
	s_cbranch_execz .LBB20_124
; %bb.123:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v55, v1 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s54, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s54, s71, v2, s54
	global_store_b32 v[1:2], v55, off
.LBB20_124:
	s_or_b32 exec_lo, exec_lo, s55
	v_or_b32_e32 v55, 0x2600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s54, s66, v55
	s_and_saveexec_b32 s56, s54
	s_cbranch_execz .LBB20_126
; %bb.125:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v56, v1 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s55, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s55, s71, v2, s55
	global_store_b32 v[1:2], v56, off
.LBB20_126:
	s_or_b32 exec_lo, exec_lo, s56
	v_or_b32_e32 v56, 0x2800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s55, s66, v56
	s_and_saveexec_b32 s57, s55
	s_cbranch_execz .LBB20_128
; %bb.127:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v57, v1 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s56, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s56, s71, v2, s56
	global_store_b32 v[1:2], v57, off
.LBB20_128:
	s_or_b32 exec_lo, exec_lo, s57
	v_or_b32_e32 v57, 0x2a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s56, s66, v57
	s_and_saveexec_b32 s58, s56
	s_cbranch_execz .LBB20_130
; %bb.129:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v58, v1 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s57, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s57, s71, v2, s57
	global_store_b32 v[1:2], v58, off
.LBB20_130:
	s_or_b32 exec_lo, exec_lo, s58
	v_or_b32_e32 v58, 0x2c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s57, s66, v58
	s_and_saveexec_b32 s59, s57
	s_cbranch_execz .LBB20_132
; %bb.131:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v59, v1 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s58, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s58, s71, v2, s58
	global_store_b32 v[1:2], v59, off
.LBB20_132:
	s_or_b32 exec_lo, exec_lo, s59
	v_or_b32_e32 v59, 0x2e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s58, s66, v59
	s_and_saveexec_b32 s60, s58
	s_cbranch_execz .LBB20_134
; %bb.133:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v60, v1 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s59, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s59, s71, v2, s59
	global_store_b32 v[1:2], v60, off
.LBB20_134:
	s_or_b32 exec_lo, exec_lo, s60
	v_or_b32_e32 v60, 0x3000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s59, s66, v60
	s_and_saveexec_b32 s61, s59
	s_cbranch_execz .LBB20_136
; %bb.135:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v61, v1 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s60, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s60, s71, v2, s60
	global_store_b32 v[1:2], v61, off
.LBB20_136:
	s_or_b32 exec_lo, exec_lo, s61
	v_or_b32_e32 v61, 0x3200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s60, s66, v61
	s_and_saveexec_b32 s62, s60
	s_cbranch_execz .LBB20_138
; %bb.137:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v62, v1 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s61, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s61, s71, v2, s61
	global_store_b32 v[1:2], v62, off
.LBB20_138:
	s_or_b32 exec_lo, exec_lo, s62
	v_or_b32_e32 v62, 0x3400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s61, s66, v62
	s_and_saveexec_b32 s63, s61
	s_cbranch_execz .LBB20_140
; %bb.139:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v63, v1 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s62, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s62, s71, v2, s62
	global_store_b32 v[1:2], v63, off
.LBB20_140:
	s_or_b32 exec_lo, exec_lo, s63
	v_or_b32_e32 v63, 0x3600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s62, s66, v63
	s_and_saveexec_b32 s64, s62
	s_cbranch_execz .LBB20_142
; %bb.141:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v64, v1 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s63, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s63, s71, v2, s63
	global_store_b32 v[1:2], v64, off
.LBB20_142:
	s_or_b32 exec_lo, exec_lo, s64
	v_or_b32_e32 v64, 0x3800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s63, s66, v64
	s_and_saveexec_b32 s65, s63
	s_cbranch_execz .LBB20_144
; %bb.143:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v65, v1 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s64, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s64, s71, v2, s64
	global_store_b32 v[1:2], v65, off
.LBB20_144:
	s_or_b32 exec_lo, exec_lo, s65
	v_or_b32_e32 v65, 0x3a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s64, s66, v65
	s_and_saveexec_b32 s82, s64
	s_cbranch_execz .LBB20_146
; %bb.145:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v66, v1 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s65, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s65, s71, v2, s65
	global_store_b32 v[1:2], v66, off
.LBB20_146:
	s_or_b32 exec_lo, exec_lo, s82
	v_or_b32_e32 v66, 0x3c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s65, s66, v66
	s_and_saveexec_b32 s82, s65
	s_cbranch_execz .LBB20_148
; %bb.147:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v67, v1 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s66, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s66, s71, v2, s66
	global_store_b32 v[1:2], v67, off
.LBB20_148:
	s_or_b32 exec_lo, exec_lo, s82
	s_add_u32 s66, s72, s84
	s_addc_u32 s82, s73, 0
	v_add_co_u32 v1, s66, s66, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v2, null, s82, 0, s66
                                        ; implicit-def: $vgpr67
	s_and_saveexec_b32 s66, s2
	s_xor_b32 s2, exec_lo, s66
	s_cbranch_execz .LBB20_150
; %bb.149:
	global_load_u8 v67, v[1:2], off
.LBB20_150:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr68
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB20_152
; %bb.151:
	global_load_u8 v68, v[1:2], off offset:1
.LBB20_152:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr69
	s_and_saveexec_b32 s2, s4
	s_cbranch_execz .LBB20_154
; %bb.153:
	global_load_u8 v69, v[1:2], off offset:2
.LBB20_154:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr70
	s_and_saveexec_b32 s2, s5
	s_cbranch_execz .LBB20_156
; %bb.155:
	global_load_u8 v70, v[1:2], off offset:3
.LBB20_156:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr71
	s_and_saveexec_b32 s2, s6
	s_cbranch_execz .LBB20_158
; %bb.157:
	global_load_u8 v71, v[1:2], off offset:4
.LBB20_158:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr72
	s_and_saveexec_b32 s2, s7
	s_cbranch_execz .LBB20_160
; %bb.159:
	global_load_u8 v72, v[1:2], off offset:5
.LBB20_160:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr73
	s_and_saveexec_b32 s2, s8
	s_cbranch_execz .LBB20_162
; %bb.161:
	global_load_u8 v73, v[1:2], off offset:6
.LBB20_162:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr74
	s_and_saveexec_b32 s2, s9
	s_cbranch_execz .LBB20_164
; %bb.163:
	global_load_u8 v74, v[1:2], off offset:7
.LBB20_164:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr75
	s_and_saveexec_b32 s2, s10
	s_cbranch_execz .LBB20_166
; %bb.165:
	global_load_u8 v75, v[1:2], off offset:8
.LBB20_166:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr76
	s_and_saveexec_b32 s2, s11
	s_cbranch_execz .LBB20_168
; %bb.167:
	global_load_u8 v76, v[1:2], off offset:9
.LBB20_168:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr77
	s_and_saveexec_b32 s2, s12
	s_cbranch_execz .LBB20_170
; %bb.169:
	global_load_u8 v77, v[1:2], off offset:10
.LBB20_170:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr78
	s_and_saveexec_b32 s2, s13
	s_cbranch_execz .LBB20_172
; %bb.171:
	global_load_u8 v78, v[1:2], off offset:11
.LBB20_172:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr79
	s_and_saveexec_b32 s2, s14
	s_cbranch_execz .LBB20_174
; %bb.173:
	global_load_u8 v79, v[1:2], off offset:12
.LBB20_174:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr80
	s_and_saveexec_b32 s2, s16
	s_cbranch_execz .LBB20_176
; %bb.175:
	global_load_u8 v80, v[1:2], off offset:13
.LBB20_176:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr81
	s_and_saveexec_b32 s2, s17
	s_cbranch_execz .LBB20_178
; %bb.177:
	global_load_u8 v81, v[1:2], off offset:14
.LBB20_178:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr82
	s_and_saveexec_b32 s2, s18
	s_cbranch_execz .LBB20_180
; %bb.179:
	global_load_u8 v82, v[1:2], off offset:15
.LBB20_180:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr83
	s_and_saveexec_b32 s2, s19
	s_cbranch_execz .LBB20_182
; %bb.181:
	global_load_u8 v83, v[1:2], off offset:16
.LBB20_182:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr84
	s_and_saveexec_b32 s2, s20
	s_cbranch_execz .LBB20_184
; %bb.183:
	global_load_u8 v84, v[1:2], off offset:17
.LBB20_184:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr85
	s_and_saveexec_b32 s2, s21
	s_cbranch_execz .LBB20_186
; %bb.185:
	global_load_u8 v85, v[1:2], off offset:18
.LBB20_186:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr86
	s_and_saveexec_b32 s2, s22
	s_cbranch_execz .LBB20_188
; %bb.187:
	global_load_u8 v86, v[1:2], off offset:19
.LBB20_188:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr87
	s_and_saveexec_b32 s2, s23
	s_cbranch_execz .LBB20_190
; %bb.189:
	global_load_u8 v87, v[1:2], off offset:20
.LBB20_190:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr88
	s_and_saveexec_b32 s2, s24
	s_cbranch_execz .LBB20_192
; %bb.191:
	global_load_u8 v88, v[1:2], off offset:21
.LBB20_192:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr89
	s_and_saveexec_b32 s2, s25
	s_cbranch_execz .LBB20_194
; %bb.193:
	global_load_u8 v89, v[1:2], off offset:22
.LBB20_194:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr90
	s_and_saveexec_b32 s2, s26
	s_cbranch_execz .LBB20_196
; %bb.195:
	global_load_u8 v90, v[1:2], off offset:23
.LBB20_196:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr91
	s_and_saveexec_b32 s2, s27
	s_cbranch_execz .LBB20_198
; %bb.197:
	global_load_u8 v91, v[1:2], off offset:24
.LBB20_198:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr92
	s_and_saveexec_b32 s2, s28
	s_cbranch_execz .LBB20_200
; %bb.199:
	global_load_u8 v92, v[1:2], off offset:25
.LBB20_200:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr93
	s_and_saveexec_b32 s2, s29
	s_cbranch_execz .LBB20_202
; %bb.201:
	global_load_u8 v93, v[1:2], off offset:26
.LBB20_202:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr94
	s_and_saveexec_b32 s2, s30
	s_cbranch_execz .LBB20_204
; %bb.203:
	global_load_u8 v94, v[1:2], off offset:27
.LBB20_204:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr95
	s_and_saveexec_b32 s2, s31
	s_cbranch_execz .LBB20_206
; %bb.205:
	global_load_u8 v95, v[1:2], off offset:28
.LBB20_206:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr96
	s_and_saveexec_b32 s2, s33
	s_cbranch_execz .LBB20_208
; %bb.207:
	global_load_u8 v96, v[1:2], off offset:29
.LBB20_208:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr97
	s_and_saveexec_b32 s2, s34
	s_cbranch_execz .LBB20_210
; %bb.209:
	global_load_u8 v97, v[1:2], off offset:30
.LBB20_210:                             ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIhEEhLj31EEEvjT_RAT1__T0_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s2, s35
	s_cbranch_execz .LBB20_212
; %bb.211:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
.LBB20_212:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr2
	s_and_saveexec_b32 s2, s36
	s_cbranch_execz .LBB20_214
; %bb.213:
	v_lshlrev_b32_e32 v2, 2, v0
	ds_load_b32 v2, v2 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v2, s80, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v2, s67, v2
.LBB20_214:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr98
	s_and_saveexec_b32 s2, s37
	s_cbranch_execz .LBB20_216
; %bb.215:
	v_lshlrev_b32_e32 v98, 2, v0
	ds_load_b32 v98, v98 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v98, s80, v98
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v98, s67, v98
.LBB20_216:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr99
	s_and_saveexec_b32 s2, s38
	s_cbranch_execz .LBB20_218
; %bb.217:
	v_lshlrev_b32_e32 v99, 2, v0
	ds_load_b32 v99, v99 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v99, s80, v99
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v99, s67, v99
.LBB20_218:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr100
	s_and_saveexec_b32 s2, s39
	s_cbranch_execz .LBB20_220
; %bb.219:
	v_lshlrev_b32_e32 v100, 2, v0
	ds_load_b32 v100, v100 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v100, s80, v100
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v100, s67, v100
.LBB20_220:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr101
	s_and_saveexec_b32 s2, s40
	s_cbranch_execz .LBB20_222
; %bb.221:
	v_lshlrev_b32_e32 v101, 2, v0
	ds_load_b32 v101, v101 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v101, s80, v101
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v101, s67, v101
.LBB20_222:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr102
	s_and_saveexec_b32 s2, s41
	s_cbranch_execz .LBB20_224
; %bb.223:
	v_lshlrev_b32_e32 v102, 2, v0
	ds_load_b32 v102, v102 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v102, s80, v102
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v102, s67, v102
.LBB20_224:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr103
	s_and_saveexec_b32 s2, s42
	s_cbranch_execz .LBB20_226
; %bb.225:
	v_lshlrev_b32_e32 v103, 2, v0
	ds_load_b32 v103, v103 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v103, s80, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v103, s67, v103
.LBB20_226:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr104
	s_and_saveexec_b32 s2, s43
	s_cbranch_execz .LBB20_228
; %bb.227:
	v_lshlrev_b32_e32 v104, 2, v0
	ds_load_b32 v104, v104 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v104, s80, v104
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v104, s67, v104
.LBB20_228:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr105
	s_and_saveexec_b32 s2, s44
	s_cbranch_execz .LBB20_230
; %bb.229:
	v_lshlrev_b32_e32 v105, 2, v0
	ds_load_b32 v105, v105 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v105, s80, v105
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v105, s67, v105
.LBB20_230:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr106
	s_and_saveexec_b32 s2, s45
	s_cbranch_execz .LBB20_232
; %bb.231:
	v_lshlrev_b32_e32 v106, 2, v0
	ds_load_b32 v106, v106 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v106, s80, v106
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v106, s67, v106
.LBB20_232:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr107
	s_and_saveexec_b32 s2, s46
	s_cbranch_execz .LBB20_234
; %bb.233:
	v_lshlrev_b32_e32 v107, 2, v0
	ds_load_b32 v107, v107 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v107, s80, v107
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v107, s67, v107
.LBB20_234:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr108
	s_and_saveexec_b32 s2, s47
	s_cbranch_execz .LBB20_236
; %bb.235:
	v_lshlrev_b32_e32 v108, 2, v0
	ds_load_b32 v108, v108 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v108, s80, v108
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v108, s67, v108
.LBB20_236:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr109
	s_and_saveexec_b32 s2, s48
	s_cbranch_execz .LBB20_238
; %bb.237:
	v_lshlrev_b32_e32 v109, 2, v0
	ds_load_b32 v109, v109 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v109, s80, v109
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v109, s67, v109
.LBB20_238:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr110
	s_and_saveexec_b32 s2, s49
	s_cbranch_execz .LBB20_240
; %bb.239:
	v_lshlrev_b32_e32 v110, 2, v0
	ds_load_b32 v110, v110 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v110, s80, v110
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v110, s67, v110
.LBB20_240:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr111
	s_and_saveexec_b32 s2, s50
	s_cbranch_execz .LBB20_242
; %bb.241:
	v_lshlrev_b32_e32 v111, 2, v0
	ds_load_b32 v111, v111 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v111, s80, v111
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v111, s67, v111
.LBB20_242:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr112
	s_and_saveexec_b32 s2, s51
	s_cbranch_execz .LBB20_244
; %bb.243:
	v_lshlrev_b32_e32 v112, 2, v0
	ds_load_b32 v112, v112 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v112, s80, v112
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v112, s67, v112
.LBB20_244:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr113
	s_and_saveexec_b32 s2, s52
	s_cbranch_execz .LBB20_246
; %bb.245:
	v_lshlrev_b32_e32 v113, 2, v0
	ds_load_b32 v113, v113 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v113, s80, v113
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v113, s67, v113
.LBB20_246:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr114
	s_and_saveexec_b32 s2, s53
	s_cbranch_execz .LBB20_248
; %bb.247:
	v_lshlrev_b32_e32 v114, 2, v0
	ds_load_b32 v114, v114 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v114, s80, v114
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v114, s67, v114
.LBB20_248:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr115
	s_and_saveexec_b32 s2, s54
	s_cbranch_execz .LBB20_250
; %bb.249:
	v_lshlrev_b32_e32 v115, 2, v0
	ds_load_b32 v115, v115 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v115, s80, v115
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v115, s67, v115
.LBB20_250:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr116
	s_and_saveexec_b32 s2, s55
	s_cbranch_execz .LBB20_252
; %bb.251:
	v_lshlrev_b32_e32 v116, 2, v0
	ds_load_b32 v116, v116 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v116, s80, v116
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v116, s67, v116
.LBB20_252:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr117
	s_and_saveexec_b32 s2, s56
	s_cbranch_execz .LBB20_254
; %bb.253:
	v_lshlrev_b32_e32 v117, 2, v0
	ds_load_b32 v117, v117 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v117, s80, v117
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v117, s67, v117
.LBB20_254:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr118
	s_and_saveexec_b32 s2, s57
	s_cbranch_execz .LBB20_256
; %bb.255:
	v_lshlrev_b32_e32 v118, 2, v0
	ds_load_b32 v118, v118 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v118, s80, v118
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v118, s67, v118
.LBB20_256:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr119
	s_and_saveexec_b32 s2, s58
	s_cbranch_execz .LBB20_258
; %bb.257:
	v_lshlrev_b32_e32 v119, 2, v0
	ds_load_b32 v119, v119 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v119, s80, v119
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v119, s67, v119
.LBB20_258:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr120
	s_and_saveexec_b32 s2, s59
	s_cbranch_execz .LBB20_260
; %bb.259:
	v_lshlrev_b32_e32 v120, 2, v0
	ds_load_b32 v120, v120 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v120, s80, v120
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v120, s67, v120
.LBB20_260:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr121
	s_and_saveexec_b32 s2, s60
	s_cbranch_execz .LBB20_262
; %bb.261:
	v_lshlrev_b32_e32 v121, 2, v0
	ds_load_b32 v121, v121 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v121, s80, v121
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v121, s67, v121
.LBB20_262:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr122
	s_and_saveexec_b32 s2, s61
	s_cbranch_execz .LBB20_264
; %bb.263:
	v_lshlrev_b32_e32 v122, 2, v0
	ds_load_b32 v122, v122 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v122, s80, v122
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v122, s67, v122
.LBB20_264:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr123
	s_and_saveexec_b32 s2, s62
	s_cbranch_execz .LBB20_266
; %bb.265:
	v_lshlrev_b32_e32 v123, 2, v0
	ds_load_b32 v123, v123 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v123, s80, v123
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v123, s67, v123
.LBB20_266:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr124
	s_and_saveexec_b32 s2, s63
	s_cbranch_execz .LBB20_268
; %bb.267:
	v_lshlrev_b32_e32 v124, 2, v0
	ds_load_b32 v124, v124 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v124, s80, v124
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v124, s67, v124
.LBB20_268:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr125
	s_and_saveexec_b32 s2, s64
	s_cbranch_execz .LBB20_270
; %bb.269:
	v_lshlrev_b32_e32 v125, 2, v0
	ds_load_b32 v125, v125 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v125, s80, v125
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v125, s67, v125
.LBB20_270:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr126
	s_and_saveexec_b32 s2, s65
	s_cbranch_execz .LBB20_272
; %bb.271:
	v_lshlrev_b32_e32 v126, 2, v0
	ds_load_b32 v126, v126 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v126, s80, v126
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v126, s67, v126
.LBB20_272:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b8 v9, v67 offset:64
	ds_store_b8 v10, v68 offset:64
	ds_store_b8 v11, v69 offset:64
	ds_store_b8 v12, v70 offset:64
	ds_store_b8 v13, v71 offset:64
	ds_store_b8 v14, v72 offset:64
	ds_store_b8 v15, v73 offset:64
	ds_store_b8 v16, v74 offset:64
	ds_store_b8 v17, v75 offset:64
	ds_store_b8 v18, v76 offset:64
	ds_store_b8 v19, v77 offset:64
	ds_store_b8 v20, v78 offset:64
	ds_store_b8 v21, v79 offset:64
	ds_store_b8 v22, v80 offset:64
	ds_store_b8 v23, v81 offset:64
	ds_store_b8 v24, v82 offset:64
	ds_store_b8 v25, v83 offset:64
	ds_store_b8 v26, v84 offset:64
	ds_store_b8 v27, v85 offset:64
	ds_store_b8 v28, v86 offset:64
	ds_store_b8 v29, v87 offset:64
	ds_store_b8 v30, v88 offset:64
	ds_store_b8 v31, v89 offset:64
	ds_store_b8 v33, v90 offset:64
	ds_store_b8 v34, v91 offset:64
	ds_store_b8 v35, v92 offset:64
	ds_store_b8 v36, v93 offset:64
	ds_store_b8 v37, v94 offset:64
	ds_store_b8 v38, v95 offset:64
	ds_store_b8 v39, v96 offset:64
	ds_store_b8 v40, v97 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s2, s35
	s_cbranch_execz .LBB20_274
; %bb.273:
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	ds_load_u8 v9, v0 offset:64
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v9, s[74:75]
.LBB20_274:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s36
	s_cbranch_execz .LBB20_276
; %bb.275:
	v_lshlrev_b32_e32 v1, 2, v2
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:576
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v3
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_276:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s37
	s_cbranch_execz .LBB20_278
; %bb.277:
	v_lshlrev_b32_e32 v1, 2, v98
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:1088
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v4
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_278:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s38
	s_cbranch_execz .LBB20_280
; %bb.279:
	v_lshlrev_b32_e32 v1, 2, v99
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:1600
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v5
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_280:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s39
	s_cbranch_execz .LBB20_282
; %bb.281:
	v_lshlrev_b32_e32 v1, 2, v100
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:2112
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v6
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_282:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s40
	s_cbranch_execz .LBB20_284
; %bb.283:
	v_lshlrev_b32_e32 v1, 2, v101
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:2624
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v41
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_284:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s41
	s_cbranch_execz .LBB20_286
; %bb.285:
	v_lshlrev_b32_e32 v1, 2, v102
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:3136
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v42
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_286:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s42
	s_cbranch_execz .LBB20_288
; %bb.287:
	v_lshlrev_b32_e32 v1, 2, v103
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:3648
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v43
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_288:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s43
	s_cbranch_execz .LBB20_290
; %bb.289:
	v_lshlrev_b32_e32 v1, 2, v104
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:4160
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v44
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_290:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s44
	s_cbranch_execz .LBB20_292
; %bb.291:
	v_lshlrev_b32_e32 v1, 2, v105
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:4672
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v45
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_292:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s45
	s_cbranch_execz .LBB20_294
; %bb.293:
	v_lshlrev_b32_e32 v1, 2, v106
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:5184
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v46
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_294:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s46
	s_cbranch_execz .LBB20_296
; %bb.295:
	v_lshlrev_b32_e32 v1, 2, v107
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:5696
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v47
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_296:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s47
	s_cbranch_execz .LBB20_298
; %bb.297:
	v_lshlrev_b32_e32 v1, 2, v108
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:6208
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v48
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_298:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s48
	s_cbranch_execz .LBB20_300
; %bb.299:
	v_lshlrev_b32_e32 v1, 2, v109
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:6720
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v49
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_300:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s49
	s_cbranch_execz .LBB20_302
; %bb.301:
	v_lshlrev_b32_e32 v1, 2, v110
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:7232
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v50
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_302:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s50
	s_cbranch_execz .LBB20_304
; %bb.303:
	v_lshlrev_b32_e32 v1, 2, v111
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:7744
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v51
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_304:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s51
	s_cbranch_execz .LBB20_306
; %bb.305:
	v_lshlrev_b32_e32 v1, 2, v112
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:8256
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v52
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_306:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s52
	s_cbranch_execz .LBB20_308
; %bb.307:
	v_lshlrev_b32_e32 v1, 2, v113
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:8768
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v53
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_308:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s53
	s_cbranch_execz .LBB20_310
; %bb.309:
	v_lshlrev_b32_e32 v1, 2, v114
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:9280
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v54
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_310:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s54
	s_cbranch_execz .LBB20_312
; %bb.311:
	v_lshlrev_b32_e32 v1, 2, v115
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:9792
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v55
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_312:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s55
	s_cbranch_execz .LBB20_314
; %bb.313:
	v_lshlrev_b32_e32 v1, 2, v116
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:10304
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v56
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_314:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s56
	s_cbranch_execz .LBB20_316
; %bb.315:
	v_lshlrev_b32_e32 v1, 2, v117
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:10816
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v57
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_316:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s57
	s_cbranch_execz .LBB20_318
; %bb.317:
	v_lshlrev_b32_e32 v1, 2, v118
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:11328
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v58
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_318:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s58
	s_cbranch_execz .LBB20_320
; %bb.319:
	v_lshlrev_b32_e32 v1, 2, v119
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:11840
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v59
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_320:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s59
	s_cbranch_execz .LBB20_322
; %bb.321:
	v_lshlrev_b32_e32 v1, 2, v120
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:12352
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v60
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_322:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s60
	s_cbranch_execz .LBB20_324
; %bb.323:
	v_lshlrev_b32_e32 v1, 2, v121
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:12864
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v61
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_324:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s61
	s_cbranch_execz .LBB20_326
; %bb.325:
	v_lshlrev_b32_e32 v1, 2, v122
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:13376
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v62
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_326:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s62
	s_cbranch_execz .LBB20_328
; %bb.327:
	v_lshlrev_b32_e32 v1, 2, v123
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:13888
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v63
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_328:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s63
	s_cbranch_execz .LBB20_330
; %bb.329:
	v_lshlrev_b32_e32 v1, 2, v124
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:14400
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v64
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_330:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s64
	s_cbranch_execz .LBB20_332
; %bb.331:
	v_lshlrev_b32_e32 v1, 2, v125
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:14912
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v65
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_332:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s65
	s_cbranch_execz .LBB20_334
; %bb.333:
	v_lshlrev_b32_e32 v1, 2, v126
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:15424
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v66
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB20_334:
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b32 s2, s[0:1], 0x50
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s2
	s_mov_b32 s2, 0
	s_cselect_b32 s3, -1, 0
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s3
	s_xor_b32 s3, exec_lo, s4
; %bb.335:
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v7, v8
	s_mov_b32 s7, exec_lo
; %bb.336:                              ; %Flow103
	s_or_b32 exec_lo, exec_lo, s3
	s_branch .LBB20_338
.LBB20_337:
	s_mov_b32 s2, -1
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
.LBB20_338:                             ; %Flow102
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB20_367
; %bb.339:
	s_mov_b32 s85, 0
	v_lshlrev_b32_e32 v21, 2, v32
	s_lshl_b64 s[2:3], s[84:85], 2
	v_mov_b32_e32 v33, 0
	s_add_u32 s2, s68, s2
	s_addc_u32 s3, s69, s3
	v_or_b32_e32 v34, 0xfffffe00, v0
	s_clause 0x7
	global_load_b128 v[1:4], v21, s[2:3] offset:48
	global_load_b128 v[9:12], v21, s[2:3] offset:32
	global_load_b128 v[17:20], v21, s[2:3] offset:16
	global_load_b128 v[25:28], v21, s[2:3]
	global_load_b96 v[29:31], v21, s[2:3] offset:112
	global_load_b128 v[5:8], v21, s[2:3] offset:96
	global_load_b128 v[13:16], v21, s[2:3] offset:80
	global_load_b128 v[21:24], v21, s[2:3] offset:64
	v_lshlrev_b32_e32 v35, 2, v0
.LBB20_340:                             ; %.lr.ph.i.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v34, 0x200, v34
	ds_store_b32 v35, v33
	v_add_nc_u32_e32 v35, 0x800, v35
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v34
	s_or_b32 s85, vcc_lo, s85
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s85
	s_cbranch_execnz .LBB20_340
; %bb.341:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s85
	s_waitcnt vmcnt(4)
	v_lshrrev_b32_e32 v33, s80, v25
	s_lshl_b32 s2, -1, s81
	v_lshrrev_b32_e32 v38, s80, v27
	s_not_b32 s8, s2
	s_mov_b32 s2, exec_lo
	v_and_b32_e32 v33, s8, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v34, 9, v33
	v_lshrrev_b32_e32 v33, 3, v33
	v_and_or_b32 v34, 0xe00, v34, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v34, 1, v34
	v_add_lshl_u32 v33, v34, v33, 1
	v_lshrrev_b32_e32 v34, s80, v26
	ds_load_u16 v35, v33
	v_and_b32_e32 v34, s8, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 9, v34
	v_lshrrev_b32_e32 v34, 3, v34
	v_and_or_b32 v36, 0xe00, v36, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 1, v36
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v37, v35, 1
	v_add_lshl_u32 v34, v36, v34, 1
	ds_store_b16 v33, v37
	ds_load_u16 v36, v34
	v_and_b32_e32 v37, s8, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 9, v37
	v_lshrrev_b32_e32 v37, 3, v37
	v_and_or_b32 v38, 0xe00, v38, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 1, v38
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v39, v36, 1
	v_add_lshl_u32 v43, v38, v37, 1
	v_lshrrev_b32_e32 v38, s80, v28
	ds_store_b16 v34, v39
	ds_load_u16 v37, v43
	v_and_b32_e32 v38, s8, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 9, v38
	v_lshrrev_b32_e32 v38, 3, v38
	v_and_or_b32 v39, 0xe00, v39, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 1, v39
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v40, v37, 1
	v_add_lshl_u32 v45, v39, v38, 1
	v_lshrrev_b32_e32 v39, s80, v17
	ds_store_b16 v43, v40
	ds_load_u16 v38, v45
	v_and_b32_e32 v39, s8, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 9, v39
	v_lshrrev_b32_e32 v39, 3, v39
	v_and_or_b32 v40, 0xe00, v40, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 1, v40
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v41, v38, 1
	v_add_lshl_u32 v47, v40, v39, 1
	v_lshrrev_b32_e32 v40, s80, v18
	ds_store_b16 v45, v41
	ds_load_u16 v39, v47
	v_and_b32_e32 v40, s8, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 9, v40
	v_lshrrev_b32_e32 v40, 3, v40
	v_and_or_b32 v41, 0xe00, v41, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 1, v41
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v42, v39, 1
	v_add_lshl_u32 v49, v41, v40, 1
	v_lshrrev_b32_e32 v41, s80, v19
	ds_store_b16 v47, v42
	ds_load_u16 v40, v49
	v_and_b32_e32 v41, s8, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 9, v41
	v_lshrrev_b32_e32 v41, 3, v41
	v_and_or_b32 v42, 0xe00, v42, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 1, v42
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v44, v40, 1
	v_add_lshl_u32 v51, v42, v41, 1
	v_lshrrev_b32_e32 v42, s80, v20
	ds_store_b16 v49, v44
	ds_load_u16 v41, v51
	v_and_b32_e32 v42, s8, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 9, v42
	v_lshrrev_b32_e32 v42, 3, v42
	v_and_or_b32 v44, 0xe00, v44, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 1, v44
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v46, v41, 1
	v_add_lshl_u32 v53, v44, v42, 1
	v_lshrrev_b32_e32 v44, s80, v9
	ds_store_b16 v51, v46
	ds_load_u16 v42, v53
	v_and_b32_e32 v44, s8, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 9, v44
	v_lshrrev_b32_e32 v44, 3, v44
	v_and_or_b32 v46, 0xe00, v46, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 1, v46
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v48, v42, 1
	v_add_lshl_u32 v55, v46, v44, 1
	v_lshrrev_b32_e32 v46, s80, v10
	ds_store_b16 v53, v48
	ds_load_u16 v44, v55
	v_and_b32_e32 v46, s8, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 9, v46
	v_lshrrev_b32_e32 v46, 3, v46
	v_and_or_b32 v48, 0xe00, v48, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 1, v48
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v50, v44, 1
	v_add_lshl_u32 v57, v48, v46, 1
	v_lshrrev_b32_e32 v48, s80, v11
	ds_store_b16 v55, v50
	ds_load_u16 v46, v57
	v_and_b32_e32 v48, s8, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 9, v48
	v_lshrrev_b32_e32 v48, 3, v48
	v_and_or_b32 v50, 0xe00, v50, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 1, v50
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v52, v46, 1
	v_add_lshl_u32 v59, v50, v48, 1
	v_lshrrev_b32_e32 v50, s80, v12
	ds_store_b16 v57, v52
	ds_load_u16 v48, v59
	v_and_b32_e32 v50, s8, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 9, v50
	v_lshrrev_b32_e32 v50, 3, v50
	v_and_or_b32 v52, 0xe00, v52, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 1, v52
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v54, v48, 1
	v_add_lshl_u32 v61, v52, v50, 1
	v_lshrrev_b32_e32 v52, s80, v1
	ds_store_b16 v59, v54
	ds_load_u16 v50, v61
	v_and_b32_e32 v52, s8, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 9, v52
	v_lshrrev_b32_e32 v52, 3, v52
	v_and_or_b32 v54, 0xe00, v54, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 1, v54
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v56, v50, 1
	v_add_lshl_u32 v63, v54, v52, 1
	v_lshrrev_b32_e32 v54, s80, v2
	ds_store_b16 v61, v56
	ds_load_u16 v52, v63
	v_and_b32_e32 v54, s8, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 9, v54
	v_lshrrev_b32_e32 v54, 3, v54
	v_and_or_b32 v56, 0xe00, v56, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 1, v56
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v58, v52, 1
	v_add_lshl_u32 v65, v56, v54, 1
	v_lshrrev_b32_e32 v56, s80, v3
	ds_store_b16 v63, v58
	ds_load_u16 v54, v65
	v_and_b32_e32 v56, s8, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 9, v56
	v_lshrrev_b32_e32 v56, 3, v56
	v_and_or_b32 v58, 0xe00, v58, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 1, v58
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v60, v54, 1
	v_add_lshl_u32 v67, v58, v56, 1
	v_lshrrev_b32_e32 v58, s80, v4
	ds_store_b16 v65, v60
	ds_load_u16 v56, v67
	v_and_b32_e32 v58, s8, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 9, v58
	v_lshrrev_b32_e32 v58, 3, v58
	v_and_or_b32 v60, 0xe00, v60, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 1, v60
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v62, v56, 1
	v_add_lshl_u32 v69, v60, v58, 1
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v60, s80, v21
	ds_store_b16 v67, v62
	ds_load_u16 v58, v69
	v_and_b32_e32 v60, s8, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 9, v60
	v_lshrrev_b32_e32 v60, 3, v60
	v_and_or_b32 v62, 0xe00, v62, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 1, v62
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v64, v58, 1
	v_add_lshl_u32 v71, v62, v60, 1
	v_lshrrev_b32_e32 v62, s80, v22
	ds_store_b16 v69, v64
	ds_load_u16 v60, v71
	v_and_b32_e32 v62, s8, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 9, v62
	v_lshrrev_b32_e32 v62, 3, v62
	v_and_or_b32 v64, 0xe00, v64, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 1, v64
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v66, v60, 1
	v_add_lshl_u32 v73, v64, v62, 1
	v_lshrrev_b32_e32 v64, s80, v23
	ds_store_b16 v71, v66
	ds_load_u16 v62, v73
	v_and_b32_e32 v64, s8, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 9, v64
	v_lshrrev_b32_e32 v64, 3, v64
	v_and_or_b32 v66, 0xe00, v66, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 1, v66
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v68, v62, 1
	v_add_lshl_u32 v75, v66, v64, 1
	v_lshrrev_b32_e32 v66, s80, v24
	ds_store_b16 v73, v68
	ds_load_u16 v64, v75
	v_and_b32_e32 v66, s8, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 9, v66
	v_lshrrev_b32_e32 v66, 3, v66
	v_and_or_b32 v68, 0xe00, v68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 1, v68
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v70, v64, 1
	v_add_lshl_u32 v77, v68, v66, 1
	v_lshrrev_b32_e32 v68, s80, v13
	ds_store_b16 v75, v70
	ds_load_u16 v66, v77
	v_and_b32_e32 v68, s8, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 9, v68
	v_lshrrev_b32_e32 v68, 3, v68
	v_and_or_b32 v70, 0xe00, v70, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 1, v70
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v72, v66, 1
	v_add_lshl_u32 v79, v70, v68, 1
	v_lshrrev_b32_e32 v70, s80, v14
	ds_store_b16 v77, v72
	ds_load_u16 v68, v79
	v_and_b32_e32 v70, s8, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 9, v70
	v_lshrrev_b32_e32 v70, 3, v70
	v_and_or_b32 v72, 0xe00, v72, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 1, v72
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v74, v68, 1
	v_add_lshl_u32 v81, v72, v70, 1
	v_lshrrev_b32_e32 v72, s80, v15
	ds_store_b16 v79, v74
	ds_load_u16 v70, v81
	v_and_b32_e32 v72, s8, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 9, v72
	v_lshrrev_b32_e32 v72, 3, v72
	v_and_or_b32 v74, 0xe00, v74, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 1, v74
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v76, v70, 1
	v_add_lshl_u32 v83, v74, v72, 1
	v_lshrrev_b32_e32 v74, s80, v16
	ds_store_b16 v81, v76
	ds_load_u16 v72, v83
	v_and_b32_e32 v74, s8, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 9, v74
	v_lshrrev_b32_e32 v74, 3, v74
	v_and_or_b32 v76, 0xe00, v76, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 1, v76
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v78, v72, 1
	v_add_lshl_u32 v85, v76, v74, 1
	v_lshrrev_b32_e32 v76, s80, v5
	ds_store_b16 v83, v78
	ds_load_u16 v74, v85
	v_and_b32_e32 v76, s8, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 9, v76
	v_lshrrev_b32_e32 v76, 3, v76
	v_and_or_b32 v78, 0xe00, v78, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 1, v78
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v80, v74, 1
	v_add_lshl_u32 v87, v78, v76, 1
	v_lshrrev_b32_e32 v78, s80, v6
	ds_store_b16 v85, v80
	ds_load_u16 v76, v87
	v_and_b32_e32 v78, s8, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 9, v78
	v_lshrrev_b32_e32 v78, 3, v78
	v_and_or_b32 v80, 0xe00, v80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 1, v80
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v82, v76, 1
	v_add_lshl_u32 v89, v80, v78, 1
	v_lshrrev_b32_e32 v80, s80, v7
	ds_store_b16 v87, v82
	ds_load_u16 v78, v89
	v_and_b32_e32 v80, s8, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 9, v80
	v_lshrrev_b32_e32 v80, 3, v80
	v_and_or_b32 v82, 0xe00, v82, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 1, v82
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v84, v78, 1
	v_add_lshl_u32 v90, v82, v80, 1
	v_lshrrev_b32_e32 v82, s80, v8
	ds_store_b16 v89, v84
	ds_load_u16 v80, v90
	v_and_b32_e32 v82, s8, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 9, v82
	v_lshrrev_b32_e32 v82, 3, v82
	v_and_or_b32 v84, 0xe00, v84, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 1, v84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v86, v80, 1
	v_add_lshl_u32 v91, v84, v82, 1
	v_lshrrev_b32_e32 v84, s80, v29
	ds_store_b16 v90, v86
	ds_load_u16 v82, v91
	v_and_b32_e32 v84, s8, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 9, v84
	v_lshrrev_b32_e32 v84, 3, v84
	v_and_or_b32 v86, 0xe00, v86, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 1, v86
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v88, v82, 1
	v_add_lshl_u32 v92, v86, v84, 1
	v_lshrrev_b32_e32 v86, s80, v30
	ds_store_b16 v91, v88
	ds_load_u16 v84, v92
	v_and_b32_e32 v86, s8, v86
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 9, v86
	v_lshrrev_b32_e32 v86, 3, v86
	v_and_or_b32 v88, 0xe00, v88, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 1, v88
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v94, v84, 1
	v_add_lshl_u32 v93, v88, v86, 1
	v_lshrrev_b32_e32 v88, s80, v31
	ds_store_b16 v92, v94
	ds_load_u16 v86, v93
	v_and_b32_e32 v88, s8, v88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 9, v88
	v_lshrrev_b32_e32 v88, 3, v88
	v_and_or_b32 v94, 0xe00, v94, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 1, v94
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v86, 1
	v_add_lshl_u32 v94, v94, v88, 1
	ds_store_b16 v93, v95
	ds_load_u16 v88, v94
	v_lshlrev_b32_e32 v95, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v88, 1
	ds_store_b16 v94, v96
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[96:99], v95 offset1:1
	ds_load_2addr_b64 v[100:103], v95 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v96, v97, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v96, v96, v98, v99
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v97, v96, v100, v101
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_or_b32_e32 v100, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v97, v97, v102, v103
	v_and_b32_e32 v98, 15, v96
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v99, v97 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s3, 0, v98
	v_cmp_lt_u32_e64 s4, 1, v98
	v_cmp_lt_u32_e64 s5, 3, v98
	v_cmp_lt_u32_e64 s6, 7, v98
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, v99, 0, s3
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v99, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v97, v97, v99
	v_mov_b32_dpp v99, v97 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, 0, v99, s5
	v_add_nc_u32_e32 v97, v97, v99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v98, 0, v99, s6
	v_bfe_i32 v99, v96, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v97, v97, v98
	ds_swizzle_b32 v98, v97 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v98, v99, v98
	v_lshrrev_b32_e32 v99, 5, v0
	v_add_nc_u32_e32 v97, v97, v98
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v99
	v_cmpx_eq_u32_e64 v100, v0
	s_cbranch_execz .LBB20_343
; %bb.342:
	ds_store_b32 v98, v97 offset:16384
.LBB20_343:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_lt_u32_e64 s2, 15, v0
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s9, vcc_lo
	s_cbranch_execz .LBB20_345
; %bb.344:
	v_mad_i32_i24 v99, 0xffffffe4, v0, v95
	ds_load_b32 v100, v99 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v101, v100 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, v101, 0, s3
	v_add_nc_u32_e32 v100, v101, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	v_mov_b32_dpp v101, v100 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, 0, v101, s5
	v_add_nc_u32_e32 v100, v100, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	ds_store_b32 v99, v100 offset:16384
.LBB20_345:                             ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s9
	v_dual_mov_b32 v100, 0 :: v_dual_mov_b32 v99, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB20_347
; %bb.346:
	ds_load_b32 v99, v98 offset:16380
.LBB20_347:                             ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjhjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEESB_NSA_IhEESC_EEvT0_T1_T2_T3_PjSH_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESE_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v98, -1, v96
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s3, 0, v98
	v_cndmask_b32_e64 v98, v98, v96, s3
	v_cmp_eq_u32_e64 s3, 0, v96
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v98
	ds_bpermute_b32 v97, v98, v97
	ds_load_b32 v98, v100 offset:16444
	ds_load_2addr_b64 v[100:103], v95 offset1:1
	ds_load_b32 v104, v95 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v96, v97, v99, s3
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v96, v98, 16, v96
	ds_load_b64 v[98:99], v95 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v97, v96, v100
	v_add_nc_u32_e32 v100, v101, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v102, v100
	v_add_nc_u32_e32 v102, v103, v101
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v103, v98, v102
	v_add_nc_u32_e32 v98, v99, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v99, v104, v98
	ds_store_2addr_b64 v95, v[96:97], v[100:101] offset1:1
	ds_store_2addr_b64 v95, v[102:103], v[98:99] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v108, v33
	ds_load_u16 v107, v34
	ds_load_u16 v106, v43
	ds_load_u16 v105, v45
	ds_load_u16 v104, v47
	ds_load_u16 v103, v49
	ds_load_u16 v102, v51
	ds_load_u16 v101, v53
	ds_load_u16 v100, v55
	ds_load_u16 v99, v57
	ds_load_u16 v43, v59
	ds_load_u16 v45, v61
	ds_load_u16 v98, v63
	ds_load_u16 v97, v65
	ds_load_u16 v49, v67
	ds_load_u16 v47, v69
	ds_load_u16 v96, v71
	ds_load_u16 v95, v73
	ds_load_u16 v75, v75
	ds_load_u16 v51, v77
	ds_load_u16 v53, v79
	ds_load_u16 v55, v81
	ds_load_u16 v73, v83
	ds_load_u16 v71, v85
	ds_load_u16 v59, v87
	ds_load_u16 v57, v89
	ds_load_u16 v69, v90
	ds_load_u16 v67, v91
	ds_load_u16 v65, v92
	ds_load_u16 v61, v93
	ds_load_u16 v63, v94
                                        ; implicit-def: $vgpr33
                                        ; implicit-def: $vgpr34
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB20_351
; %bb.348:
	v_lshrrev_b32_e32 v33, 3, v0
	v_lshlrev_b32_e32 v34, 10, v0
	v_add_nc_u32_e32 v77, 1, v0
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v33, 0x1c00, v34, v33
	v_dual_mov_b32 v34, 0x3e00 :: v_dual_lshlrev_b32 v33, 1, v33
	ds_load_u16 v33, v33
	v_cmpx_ne_u32_e32 16, v77
	s_cbranch_execz .LBB20_350
; %bb.349:
	v_lshlrev_b32_e32 v34, 10, v77
	v_lshrrev_b32_e32 v77, 3, v77
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v34, 0x1c00, v34, v77
	v_lshlrev_b32_e32 v34, 1, v34
	ds_load_u16 v34, v34
.LBB20_350:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v33, 0xffff, v33
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v34, v34, v33
.LBB20_351:                             ; %Flow99
	s_or_b32 exec_lo, exec_lo, s4
	v_and_b32_e32 v35, 0xffff, v35
	v_and_b32_e32 v77, 0xffff, v78
	v_and_b32_e32 v78, 0xffff, v80
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v80, 0xffff, v108
	v_and_b32_e32 v37, 0xffff, v37
	v_and_b32_e32 v38, 0xffff, v38
	v_and_b32_e32 v39, 0xffff, v39
	v_and_b32_e32 v79, 0xffff, v82
	v_add_nc_u32_e32 v35, v80, v35
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v80, 0xffff, v106
	v_and_b32_e32 v82, 0xffff, v86
	s_waitcnt lgkmcnt(27)
	v_and_b32_e32 v85, 0xffff, v105
	s_waitcnt lgkmcnt(26)
	v_and_b32_e32 v86, 0xffff, v104
	v_and_b32_e32 v41, 0xffff, v41
	v_add_nc_u32_e32 v37, v80, v37
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v80, 0xffff, v102
	v_and_b32_e32 v44, 0xffff, v44
	v_and_b32_e32 v46, 0xffff, v46
	v_add_nc_u32_e32 v38, v85, v38
	v_add_nc_u32_e32 v39, v86, v39
	s_waitcnt lgkmcnt(22)
	v_and_b32_e32 v85, 0xffff, v100
	s_waitcnt lgkmcnt(21)
	v_and_b32_e32 v86, 0xffff, v99
	v_and_b32_e32 v48, 0xffff, v48
	v_add_nc_u32_e32 v41, v80, v41
	s_waitcnt lgkmcnt(20)
	v_and_b32_e32 v80, 0xffff, v43
	v_and_b32_e32 v50, 0xffff, v50
	v_add_nc_u32_e32 v43, v85, v44
	v_add_nc_u32_e32 v44, v86, v46
	s_waitcnt lgkmcnt(19)
	v_and_b32_e32 v46, 0xffff, v45
	v_and_b32_e32 v52, 0xffff, v52
	v_add_nc_u32_e32 v45, v80, v48
	s_waitcnt lgkmcnt(18)
	v_and_b32_e32 v48, 0xffff, v98
	v_and_b32_e32 v54, 0xffff, v54
	v_and_b32_e32 v56, 0xffff, v56
	v_and_b32_e32 v58, 0xffff, v58
	s_waitcnt lgkmcnt(17)
	v_and_b32_e32 v80, 0xffff, v97
	s_waitcnt lgkmcnt(16)
	v_and_b32_e32 v49, 0xffff, v49
	v_add_nc_u32_e32 v46, v46, v50
	s_waitcnt lgkmcnt(15)
	v_and_b32_e32 v50, 0xffff, v47
	v_and_b32_e32 v60, 0xffff, v60
	v_add_nc_u32_e32 v47, v48, v52
	s_waitcnt lgkmcnt(14)
	v_and_b32_e32 v52, 0xffff, v96
	v_and_b32_e32 v62, 0xffff, v62
	v_and_b32_e32 v64, 0xffff, v64
	v_and_b32_e32 v66, 0xffff, v66
	v_add_nc_u32_e32 v48, v80, v54
	v_add_nc_u32_e32 v49, v49, v56
	v_add_nc_u32_e32 v50, v50, v58
	s_waitcnt lgkmcnt(13)
	v_and_b32_e32 v54, 0xffff, v95
	s_waitcnt lgkmcnt(12)
	v_and_b32_e32 v56, 0xffff, v75
	s_waitcnt lgkmcnt(11)
	v_and_b32_e32 v58, 0xffff, v51
	v_and_b32_e32 v36, 0xffff, v36
	v_and_b32_e32 v81, 0xffff, v84
	v_and_b32_e32 v84, 0xffff, v107
	v_and_b32_e32 v68, 0xffff, v68
	v_add_nc_u32_e32 v51, v52, v60
	s_waitcnt lgkmcnt(10)
	v_and_b32_e32 v60, 0xffff, v53
	v_add_nc_u32_e32 v52, v54, v62
	v_add_nc_u32_e32 v53, v56, v64
	v_add_nc_u32_e32 v54, v58, v66
	s_waitcnt lgkmcnt(4)
	v_and_b32_e32 v64, 0xffff, v69
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v66, 0xffff, v61
	v_and_b32_e32 v40, 0xffff, v40
	v_add_nc_u32_e32 v36, v84, v36
	v_and_b32_e32 v84, 0xffff, v103
	v_and_b32_e32 v72, 0xffff, v72
	v_and_b32_e32 v74, 0xffff, v74
	v_and_b32_e32 v56, 0xffff, v55
	v_add_nc_u32_e32 v55, v60, v68
	v_and_b32_e32 v58, 0xffff, v73
	v_and_b32_e32 v60, 0xffff, v71
	v_and_b32_e32 v62, 0xffff, v57
	v_add_nc_u32_e32 v61, v64, v78
	v_add_nc_u32_e32 v64, v66, v82
	v_lshlrev_b32_e32 v66, 2, v35
	v_and_b32_e32 v42, 0xffff, v42
	v_add_nc_u32_e32 v40, v84, v40
	v_and_b32_e32 v84, 0xffff, v101
	v_and_b32_e32 v83, 0xffff, v88
	v_add_nc_u32_e32 v57, v58, v72
	v_add_nc_u32_e32 v58, v60, v74
	v_add_nc_u32_e32 v60, v62, v77
	v_and_b32_e32 v62, 0xffff, v67
	v_and_b32_e32 v65, 0xffff, v65
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v67, 0xffff, v63
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v66, v25 offset:64
	v_lshlrev_b32_e32 v25, 2, v36
	v_add_nc_u32_e32 v42, v84, v42
	v_lshlrev_b32_e32 v66, 2, v37
	v_add_nc_u32_e32 v63, v65, v81
	v_add_nc_u32_e32 v65, v67, v83
	v_lshlrev_b32_e32 v67, 2, v38
	v_lshlrev_b32_e32 v68, 2, v39
	v_lshlrev_b32_e32 v69, 2, v40
	ds_store_b32 v25, v26 offset:64
	ds_store_b32 v66, v27 offset:64
	ds_store_b32 v67, v28 offset:64
	ds_store_b32 v68, v17 offset:64
	ds_store_b32 v69, v18 offset:64
	v_lshlrev_b32_e32 v17, 2, v41
	v_lshlrev_b32_e32 v18, 2, v42
	v_lshlrev_b32_e32 v25, 2, v43
	v_lshlrev_b32_e32 v26, 2, v44
	v_lshlrev_b32_e32 v27, 2, v45
	v_and_b32_e32 v70, 0xffff, v70
	ds_store_b32 v17, v19 offset:64
	ds_store_b32 v18, v20 offset:64
	ds_store_b32 v25, v9 offset:64
	ds_store_b32 v26, v10 offset:64
	ds_store_b32 v27, v11 offset:64
	v_lshlrev_b32_e32 v9, 2, v46
	v_lshlrev_b32_e32 v10, 2, v47
	v_lshlrev_b32_e32 v11, 2, v48
	v_and_b32_e32 v76, 0xffff, v76
	v_and_b32_e32 v59, 0xffff, v59
	v_lshlrev_b32_e32 v17, 2, v49
	v_lshlrev_b32_e32 v18, 2, v50
	v_add_nc_u32_e32 v56, v56, v70
	ds_store_b32 v9, v12 offset:64
	ds_store_b32 v10, v1 offset:64
	ds_store_b32 v11, v2 offset:64
	ds_store_b32 v17, v3 offset:64
	ds_store_b32 v18, v4 offset:64
	v_lshlrev_b32_e32 v1, 2, v51
	v_lshlrev_b32_e32 v2, 2, v52
	v_lshlrev_b32_e32 v3, 2, v53
	v_add_nc_u32_e32 v59, v59, v76
	v_lshlrev_b32_e32 v4, 2, v54
	v_lshlrev_b32_e32 v9, 2, v55
	ds_store_b32 v1, v21 offset:64
	ds_store_b32 v2, v22 offset:64
	ds_store_b32 v3, v23 offset:64
	ds_store_b32 v4, v24 offset:64
	ds_store_b32 v9, v13 offset:64
	v_lshlrev_b32_e32 v1, 2, v56
	v_add_nc_u32_e32 v62, v62, v79
	v_lshlrev_b32_e32 v2, 2, v57
	v_lshlrev_b32_e32 v3, 2, v58
	v_lshlrev_b32_e32 v4, 2, v59
	v_lshlrev_b32_e32 v9, 2, v60
	ds_store_b32 v1, v14 offset:64
	ds_store_b32 v2, v15 offset:64
	ds_store_b32 v3, v16 offset:64
	ds_store_b32 v4, v5 offset:64
	ds_store_b32 v9, v6 offset:64
	v_lshlrev_b32_e32 v1, 2, v61
	v_lshlrev_b32_e32 v2, 2, v62
	v_lshlrev_b32_e32 v3, 2, v63
	v_lshlrev_b32_e32 v4, 2, v64
	v_lshlrev_b32_e32 v5, 2, v65
	ds_store_b32 v1, v7 offset:64
	ds_store_b32 v2, v8 offset:64
	ds_store_b32 v3, v29 offset:64
	ds_store_b32 v4, v30 offset:64
	ds_store_b32 v5, v31 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s3
; %bb.352:                              ; %_ZN7rocprim16block_radix_rankILj512ELj4ELNS_26block_radix_rank_algorithmE0ELj1ELj1EE9rank_keysIjLj31EZNS_6detail25onesweep_iteration_helperIjhjLj512ELj31ELj4ELb0ELS1_0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEESB_NSA_IhEESC_EEvT0_T1_T2_T3_PjSH_PNS4_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS4_11raw_storageINS4_16block_radix_rankILj512ELj4ELb0ELj1ELj1EE13storage_type_EEESE_RA1_jS12_.exit._crit_edge.i.i
	v_mov_b32_e32 v1, 0
; %bb.353:                              ; %Flow96
	s_and_not1_saveexec_b32 s3, s2
	s_cbranch_execz .LBB20_364
; %bb.354:
	v_lshl_or_b32 v3, s15, 4, v0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v7, 0
	s_mov_b32 s4, 0
	s_mov_b32 s5, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v34
	v_add_co_u32 v1, s2, s86, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s2, s87, v2, s2
                                        ; implicit-def: $sgpr2
	global_store_b32 v[1:2], v3, off
.LBB20_355:                             ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB20_358 Depth 2
	s_or_b32 s2, s2, exec_lo
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB20_361
; %bb.356:                              ;   in Loop: Header=BB20_355 Depth=1
	s_add_i32 s5, s5, -1
	s_mov_b32 s6, exec_lo
	v_lshl_or_b32 v3, s5, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s2, s86, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s2, s87, v6, s2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB20_360
; %bb.357:                              ; %.lr.ph.i.i.preheader
                                        ;   in Loop: Header=BB20_355 Depth=1
	s_mov_b32 s9, 0
.LBB20_358:                             ; %.lr.ph.i.i
                                        ;   Parent Loop BB20_355 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s2, 0, v3
	s_or_b32 s9, s2, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB20_358
; %bb.359:                              ; %Flow93
                                        ;   in Loop: Header=BB20_355 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
.LBB20_360:                             ; %Flow94
                                        ;   in Loop: Header=BB20_355 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s6
	v_and_b32_e32 v5, 0x3fffffff, v8
	v_cmp_eq_u32_e64 s2, 0x80000000, v3
	v_add_nc_u32_e32 v7, v5, v7
	s_branch .LBB20_362
.LBB20_361:                             ;   in Loop: Header=BB20_355 Depth=1
                                        ; implicit-def: $sgpr5
.LBB20_362:                             ; %Flow95
                                        ;   in Loop: Header=BB20_355 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s6, exec_lo, s2
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB20_355
; %bb.363:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v3, v7, v34
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v7, v33
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v2, v1
	ds_store_b32 v4, v2
.LBB20_364:                             ; %Flow97
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v75, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v23, 64, v2
	v_lshlrev_b32_e32 v2, 2, v0
	v_or_b32_e32 v116, 0x3000, v0
	v_or_b32_e32 v117, 0x3200, v0
	v_or_b32_e32 v118, 0x3400, v0
	ds_load_2addr_stride64_b32 v[8:9], v23 offset0:8 offset1:16
	ds_load_2addr_stride64_b32 v[14:15], v23 offset0:24 offset1:32
	ds_load_2addr_stride64_b32 v[26:27], v23 offset0:40 offset1:48
	ds_load_2addr_stride64_b32 v[66:67], v23 offset0:56 offset1:64
	ds_load_2addr_stride64_b32 v[68:69], v23 offset0:72 offset1:80
	ds_load_2addr_stride64_b32 v[70:71], v23 offset0:88 offset1:96
	ds_load_2addr_stride64_b32 v[72:73], v23 offset0:104 offset1:112
	ds_load_b32 v12, v2 offset:64
	s_waitcnt lgkmcnt(7)
	v_lshrrev_b32_e32 v3, s80, v8
	s_waitcnt lgkmcnt(6)
	v_lshrrev_b32_e32 v4, s80, v14
	s_waitcnt lgkmcnt(5)
	v_lshrrev_b32_e32 v5, s80, v26
	s_waitcnt lgkmcnt(4)
	v_lshrrev_b32_e32 v6, s80, v66
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v7, s80, v68
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v10, s80, v70
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v11, s80, v72
	v_and_b32_e32 v2, s8, v5
	v_and_b32_e32 v3, s8, v3
	v_and_b32_e32 v4, s8, v4
	v_and_b32_e32 v5, s8, v6
	v_and_b32_e32 v6, s8, v7
	v_lshlrev_b32_e32 v18, 2, v2
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v2, s80, v12
	v_and_b32_e32 v7, s8, v10
	v_and_b32_e32 v10, s8, v11
	v_lshlrev_b32_e32 v22, 2, v3
	v_lshlrev_b32_e32 v20, 2, v4
	v_and_b32_e32 v2, s8, v2
	v_lshrrev_b32_e32 v4, s80, v9
	v_lshlrev_b32_e32 v17, 2, v5
	v_lshlrev_b32_e32 v16, 2, v6
	v_lshlrev_b32_e32 v13, 2, v7
	v_lshlrev_b32_e32 v29, 2, v2
	v_lshlrev_b32_e32 v11, 2, v10
	ds_load_b32 v3, v22
	ds_load_b32 v7, v20
	ds_load_b32 v10, v18
	ds_load_b32 v84, v17
	ds_load_b32 v85, v16
	ds_load_b32 v86, v13
	ds_load_b32 v87, v11
	v_and_b32_e32 v4, s8, v4
	v_lshrrev_b32_e32 v5, s80, v15
	ds_load_b32 v74, v29
	v_lshrrev_b32_e32 v21, s80, v69
	v_lshrrev_b32_e32 v2, s80, v71
	v_lshlrev_b32_e32 v31, 2, v4
	v_lshrrev_b32_e32 v6, s80, v27
	v_lshrrev_b32_e32 v19, s80, v67
	v_lshrrev_b32_e32 v24, s80, v73
	v_and_b32_e32 v5, s8, v5
	ds_load_b32 v80, v31
	v_and_b32_e32 v21, s8, v21
	v_and_b32_e32 v2, s8, v2
	v_and_b32_e32 v6, s8, v6
	v_and_b32_e32 v19, s8, v19
	v_and_b32_e32 v76, s8, v24
	v_lshlrev_b32_e32 v30, 2, v5
	v_lshlrev_b32_e32 v24, 2, v21
	v_lshlrev_b32_e32 v21, 2, v2
	v_or_b32_e32 v2, 0x200, v0
	v_lshlrev_b32_e32 v28, 2, v6
	v_lshlrev_b32_e32 v25, 2, v19
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v74, v74, v0
	v_lshlrev_b32_e32 v19, 2, v76
	ds_load_b32 v82, v30
	ds_load_b32 v88, v28
	ds_load_b32 v89, v25
	ds_load_b32 v90, v24
	ds_load_b32 v91, v21
	ds_load_b32 v92, v19
	v_or_b32_e32 v4, 0x600, v0
	v_or_b32_e32 v5, 0x800, v0
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	v_add_nc_u32_e32 v74, v3, v2
	v_or_b32_e32 v3, 0x400, v0
	v_or_b32_e32 v6, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[78:79], 2, v[74:75]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v74, v80, v3
	v_add_co_u32 v76, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	v_add_nc_u32_e32 v74, v7, v4
	v_add_co_u32 v78, s2, s70, v78
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v79, s2, s71, v79, s2
	global_store_b32 v[76:77], v12, off
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v74, v82, v5
	global_store_b32 v[78:79], v8, off
	v_add_co_u32 v78, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v79, s2, s71, v81, s2
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	v_or_b32_e32 v7, 0xc00, v0
	v_add_nc_u32_e32 v74, v10, v6
	v_add_co_u32 v76, s2, s70, v76
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	v_add_co_u32 v80, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[82:83], 2, v[74:75]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v74, v88, v7
	v_or_b32_e32 v8, 0xe00, v0
	v_add_co_ci_u32_e64 v81, s2, s71, v81, s2
	s_clause 0x2
	global_store_b32 v[78:79], v9, off
	global_store_b32 v[76:77], v14, off
	global_store_b32 v[80:81], v15, off
	v_lshlrev_b64 v[14:15], 2, v[74:75]
	v_add_nc_u32_e32 v74, v84, v8
	v_or_b32_e32 v9, 0x1000, v0
	v_add_co_u32 v76, s2, s70, v82
	v_or_b32_e32 v10, 0x1200, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[78:79], 2, v[74:75]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v74, v89, v9
	v_add_co_ci_u32_e64 v77, s2, s71, v83, s2
	v_add_co_u32 v14, s2, s70, v14
	v_add_co_ci_u32_e64 v15, s2, s71, v15, s2
	v_add_co_u32 v78, s2, s70, v78
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	v_add_nc_u32_e32 v74, v85, v10
	v_add_co_ci_u32_e64 v79, s2, s71, v79, s2
	s_clause 0x2
	global_store_b32 v[76:77], v26, off
	global_store_b32 v[14:15], v27, off
	global_store_b32 v[78:79], v66, off
	v_lshlrev_b64 v[26:27], 2, v[74:75]
	v_or_b32_e32 v12, 0x1400, v0
	v_add_co_u32 v76, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v77, s2, s71, v81, s2
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v74, v90, v12
	v_add_co_u32 v26, s2, s70, v26
	v_or_b32_e32 v14, 0x1600, v0
	v_add_co_ci_u32_e64 v27, s2, s71, v27, s2
	ds_load_2addr_stride64_b32 v[82:83], v23 offset0:120 offset1:128
	v_lshlrev_b64 v[78:79], 2, v[74:75]
	s_clause 0x1
	global_store_b32 v[76:77], v67, off
	global_store_b32 v[26:27], v68, off
	v_add_nc_u32_e32 v74, v86, v14
	ds_load_2addr_stride64_b32 v[67:68], v23 offset0:136 offset1:144
	v_or_b32_e32 v15, 0x1800, v0
	v_or_b32_e32 v26, 0x1a00, v0
	v_add_co_u32 v78, s2, s70, v78
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	v_add_co_ci_u32_e64 v79, s2, s71, v79, s2
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v74, v91, v15
	v_or_b32_e32 v27, 0x1c00, v0
	global_store_b32 v[78:79], v69, off
	v_add_co_u32 v78, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v79, s2, s71, v81, s2
	ds_load_2addr_stride64_b32 v[80:81], v23 offset0:152 offset1:160
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	v_add_nc_u32_e32 v74, v87, v26
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v66, s80, v82
	ds_load_2addr_stride64_b32 v[86:87], v23 offset0:168 offset1:176
	v_lshrrev_b32_e32 v69, s80, v83
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v90, s80, v67
	v_lshlrev_b64 v[84:85], 2, v[74:75]
	v_add_nc_u32_e32 v74, v92, v27
	v_and_b32_e32 v91, s8, v66
	v_and_b32_e32 v69, s8, v69
	v_or_b32_e32 v66, 0x1e00, v0
	v_add_co_u32 v76, s2, s70, v76
	v_lshlrev_b64 v[88:89], 2, v[74:75]
	v_and_b32_e32 v74, s8, v90
	v_lshlrev_b32_e32 v90, 2, v91
	v_lshlrev_b32_e32 v91, 2, v69
	v_lshrrev_b32_e32 v69, s80, v68
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	ds_load_b32 v94, v90
	ds_load_b32 v97, v91
	v_lshlrev_b32_e32 v92, 2, v74
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v74, s80, v80
	v_lshrrev_b32_e32 v93, s80, v81
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v95, s80, v86
	v_lshrrev_b32_e32 v96, s80, v87
	v_and_b32_e32 v69, s8, v69
	v_and_b32_e32 v74, s8, v74
	v_and_b32_e32 v93, s8, v93
	v_and_b32_e32 v95, s8, v95
	v_and_b32_e32 v96, s8, v96
	v_lshlrev_b32_e32 v98, 2, v69
	v_lshlrev_b32_e32 v99, 2, v74
	v_lshlrev_b32_e32 v93, 2, v93
	v_lshlrev_b32_e32 v95, 2, v95
	v_lshlrev_b32_e32 v96, 2, v96
	ds_load_b32 v100, v92
	ds_load_b32 v101, v98
	ds_load_b32 v102, v99
	ds_load_b32 v103, v93
	ds_load_b32 v104, v95
	ds_load_b32 v105, v96
	v_add_co_u32 v84, s2, s70, v84
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v74, v94, v66
	v_or_b32_e32 v94, 0x2000, v0
	v_add_co_ci_u32_e64 v85, s2, s71, v85, s2
	s_clause 0x2
	global_store_b32 v[78:79], v70, off
	global_store_b32 v[76:77], v71, off
	global_store_b32 v[84:85], v72, off
	v_lshlrev_b64 v[69:70], 2, v[74:75]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v74, v97, v94
	v_add_co_u32 v71, s2, s70, v88
	v_or_b32_e32 v88, 0x2200, v0
	v_add_co_ci_u32_e64 v72, s2, s71, v89, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	v_or_b32_e32 v89, 0x2400, v0
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v74, v100, v88
	v_add_co_u32 v69, s2, s70, v69
	v_add_co_ci_u32_e64 v70, s2, s71, v70, s2
	v_add_co_u32 v76, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[78:79], 2, v[74:75]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v74, v101, v89
	v_or_b32_e32 v97, 0x2600, v0
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	s_clause 0x2
	global_store_b32 v[71:72], v73, off
	global_store_b32 v[69:70], v82, off
	global_store_b32 v[76:77], v83, off
	v_lshlrev_b64 v[69:70], 2, v[74:75]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v74, v102, v97
	v_or_b32_e32 v100, 0x2800, v0
	v_add_co_u32 v71, s2, s70, v78
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v72, s2, s71, v79, s2
	ds_load_2addr_stride64_b32 v[78:79], v23 offset0:184 offset1:192
	ds_load_2addr_stride64_b32 v[82:83], v23 offset0:200 offset1:208
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v74, v103, v100
	v_add_co_u32 v69, s2, s70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v70, s2, s71, v70, s2
	v_add_co_u32 v76, s2, s70, v76
	global_store_b32 v[71:72], v67, off
	v_lshlrev_b64 v[71:72], 2, v[74:75]
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	s_clause 0x1
	global_store_b32 v[69:70], v68, off
	global_store_b32 v[76:77], v80, off
	v_add_co_u32 v69, s2, s70, v71
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v70, s2, s71, v72, s2
	ds_load_2addr_stride64_b32 v[71:72], v23 offset0:232 offset1:240
	v_or_b32_e32 v101, 0x2a00, v0
	ds_load_2addr_stride64_b32 v[67:68], v23 offset0:216 offset1:224
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v23, s80, v78
	v_lshrrev_b32_e32 v73, s80, v79
	v_or_b32_e32 v102, 0x2c00, v0
	v_add_nc_u32_e32 v74, v104, v101
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v80, s80, v82
	v_and_b32_e32 v23, s8, v23
	v_and_b32_e32 v73, s8, v73
	global_store_b32 v[69:70], v81, off
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	v_add_nc_u32_e32 v74, v105, v102
	v_lshlrev_b32_e32 v23, 2, v23
	v_lshlrev_b32_e32 v104, 2, v73
	v_lshrrev_b32_e32 v73, s80, v83
	v_or_b32_e32 v103, 0x2e00, v0
	v_lshlrev_b64 v[69:70], 2, v[74:75]
	v_and_b32_e32 v74, s8, v80
	ds_load_b32 v81, v23
	v_and_b32_e32 v73, s8, v73
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v84, s80, v71
	v_lshrrev_b32_e32 v85, s80, v72
	v_lshlrev_b32_e32 v105, 2, v74
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v74, s80, v67
	v_lshrrev_b32_e32 v80, s80, v68
	v_lshlrev_b32_e32 v106, 2, v73
	v_and_b32_e32 v73, s8, v84
	v_and_b32_e32 v84, s8, v85
	ds_load_b32 v85, v104
	v_and_b32_e32 v74, s8, v74
	v_and_b32_e32 v80, s8, v80
	v_lshlrev_b32_e32 v109, 2, v73
	v_lshlrev_b32_e32 v110, 2, v84
	v_add_co_u32 v76, s2, s70, v76
	v_lshlrev_b32_e32 v107, 2, v74
	v_lshlrev_b32_e32 v108, 2, v80
	ds_load_b32 v73, v105
	ds_load_b32 v111, v106
	ds_load_b32 v112, v107
	ds_load_b32 v113, v108
	ds_load_b32 v114, v109
	ds_load_b32 v115, v110
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v74, v81, v103
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	v_add_co_u32 v69, s2, s70, v69
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	v_add_co_ci_u32_e64 v70, s2, s71, v70, s2
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v74, v85, v116
	v_add_co_u32 v80, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v81, s2, s71, v81, s2
	v_lshlrev_b64 v[84:85], 2, v[74:75]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v74, v73, v117
	s_clause 0x2
	global_store_b32 v[76:77], v86, off
	global_store_b32 v[69:70], v87, off
	global_store_b32 v[80:81], v78, off
	v_or_b32_e32 v86, 0x3600, v0
	v_or_b32_e32 v87, 0x3800, v0
	v_lshlrev_b64 v[69:70], 2, v[74:75]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v74, v111, v118
	v_add_co_u32 v76, s2, s70, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v77, s2, s71, v85, s2
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v74, v112, v86
	v_add_co_u32 v69, s2, s70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v70, s2, s71, v70, s2
	v_add_co_u32 v80, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[84:85], 2, v[74:75]
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v74, v113, v87
	v_or_b32_e32 v111, 0x3a00, v0
	v_add_co_ci_u32_e64 v81, s2, s71, v81, s2
	s_clause 0x2
	global_store_b32 v[76:77], v79, off
	global_store_b32 v[69:70], v82, off
	global_store_b32 v[80:81], v83, off
	v_lshlrev_b64 v[69:70], 2, v[74:75]
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v74, v114, v111
	v_or_b32_e32 v82, 0x3c00, v0
	v_add_co_u32 v76, s2, s70, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v77, s2, s71, v85, s2
	v_lshlrev_b64 v[78:79], 2, v[74:75]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v74, v115, v82
	v_add_co_u32 v69, s2, s70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v70, s2, s71, v70, s2
	v_lshlrev_b64 v[73:74], 2, v[74:75]
	v_add_co_u32 v78, s2, s70, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v79, s2, s71, v79, s2
	v_add_co_u32 v73, s2, s70, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v74, s2, s71, v74, s2
	s_add_u32 s2, s72, s84
	s_addc_u32 s3, s73, 0
	v_add_co_u32 v80, s2, s2, v32
	v_add_co_ci_u32_e64 v81, null, s3, 0, s2
	s_clause 0x3
	global_store_b32 v[76:77], v67, off
	global_store_b32 v[69:70], v68, off
	global_store_b32 v[78:79], v71, off
	global_store_b32 v[73:74], v72, off
	s_clause 0x3
	global_load_b128 v[67:70], v[80:81], off
	global_load_u16 v32, v[80:81], off offset:28
	global_load_b96 v[71:73], v[80:81], off offset:16
	global_load_u8 v74, v[80:81], off offset:30
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_lshrrev_b32_e32 v75, 8, v67
	v_and_b32_e32 v84, 0xffff, v32
	v_lshrrev_b32_e32 v76, 24, v67
	v_lshrrev_b32_e32 v77, 8, v68
	v_lshrrev_b32_e32 v78, 24, v68
	v_lshrrev_b32_e32 v79, 8, v69
	v_lshrrev_b32_e32 v80, 24, v69
	ds_store_b8 v35, v67 offset:64
	v_lshrrev_b32_e32 v35, 8, v84
	v_lshrrev_b32_e32 v81, 8, v70
	v_lshrrev_b32_e32 v83, 24, v70
	v_lshrrev_b32_e32 v85, 8, v71
	v_lshrrev_b32_e32 v112, 24, v71
	v_lshrrev_b32_e32 v113, 8, v72
	v_lshrrev_b32_e32 v114, 24, v72
	v_lshrrev_b32_e32 v115, 8, v73
	v_lshrrev_b32_e32 v119, 24, v73
	ds_store_b8 v36, v75 offset:64
	ds_store_b8_d16_hi v37, v67 offset:64
	ds_store_b8 v38, v76 offset:64
	ds_store_b8 v39, v68 offset:64
	ds_store_b8 v40, v77 offset:64
	ds_store_b8_d16_hi v41, v68 offset:64
	ds_store_b8 v42, v78 offset:64
	ds_store_b8 v43, v69 offset:64
	ds_store_b8 v44, v79 offset:64
	ds_store_b8_d16_hi v45, v69 offset:64
	ds_store_b8 v46, v80 offset:64
	ds_store_b8 v47, v70 offset:64
	ds_store_b8 v48, v81 offset:64
	ds_store_b8_d16_hi v49, v70 offset:64
	ds_store_b8 v50, v83 offset:64
	ds_store_b8 v51, v71 offset:64
	ds_store_b8 v52, v85 offset:64
	ds_store_b8_d16_hi v53, v71 offset:64
	ds_store_b8 v54, v112 offset:64
	ds_store_b8 v55, v72 offset:64
	ds_store_b8 v56, v113 offset:64
	ds_store_b8_d16_hi v57, v72 offset:64
	ds_store_b8 v58, v114 offset:64
	ds_store_b8 v59, v73 offset:64
	ds_store_b8 v60, v115 offset:64
	ds_store_b8_d16_hi v61, v73 offset:64
	ds_store_b8 v62, v119 offset:64
	ds_store_b8 v63, v32 offset:64
	ds_store_b8 v64, v35 offset:64
	ds_store_b8 v65, v74 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v29, v29
	ds_load_b32 v22, v22
	ds_load_b32 v31, v31
	ds_load_b32 v20, v20
	ds_load_b32 v30, v30
	ds_load_b32 v18, v18
	ds_load_b32 v28, v28
	ds_load_b32 v17, v17
	ds_load_u8 v32, v0 offset:576
	ds_load_u8 v35, v0 offset:1088
	ds_load_u8 v36, v0 offset:1600
	ds_load_u8 v37, v0 offset:2112
	ds_load_u8 v38, v0 offset:2624
	ds_load_u8 v39, v0 offset:3136
	ds_load_u8 v40, v0 offset:3648
	ds_load_u8 v41, v0 offset:4160
	ds_load_b32 v25, v25
	ds_load_b32 v16, v16
	ds_load_b32 v24, v24
	ds_load_b32 v13, v13
	ds_load_b32 v21, v21
	ds_load_b32 v11, v11
	ds_load_b32 v19, v19
	ds_load_b32 v42, v90
	ds_load_u8 v43, v0 offset:4672
	ds_load_u8 v44, v0 offset:5184
	ds_load_u8 v45, v0 offset:5696
	ds_load_u8 v46, v0 offset:6208
	ds_load_u8 v47, v0 offset:6720
	ds_load_u8 v48, v0 offset:7232
	ds_load_u8 v49, v0 offset:7744
	ds_load_u8 v50, v0 offset:8256
	ds_load_b32 v51, v91
	ds_load_b32 v52, v92
	ds_load_b32 v53, v98
	ds_load_b32 v54, v99
	ds_load_b32 v55, v93
	ds_load_b32 v56, v95
	ds_load_b32 v57, v96
	ds_load_b32 v23, v23
	ds_load_u8 v58, v0 offset:8768
	ds_load_u8 v59, v0 offset:9280
	ds_load_u8 v60, v0 offset:9792
	ds_load_u8 v61, v0 offset:10304
	ds_load_u8 v62, v0 offset:10816
	ds_load_u8 v63, v0 offset:11328
	ds_load_u8 v64, v0 offset:11840
	ds_load_u8 v65, v0 offset:12352
	ds_load_b32 v67, v104
	ds_load_b32 v68, v105
	ds_load_b32 v69, v106
	ds_load_b32 v70, v107
	ds_load_b32 v71, v108
	ds_load_b32 v72, v109
	ds_load_u8 v73, v0 offset:12864
	ds_load_u8 v74, v0 offset:13376
	ds_load_u8 v75, v0 offset:13888
	ds_load_u8 v76, v0 offset:14400
	ds_load_u8 v77, v0 offset:14912
	ds_load_u8 v78, v0 offset:15424
	ds_load_u8 v79, v0 offset:64
	ds_load_b32 v80, v110
	s_waitcnt lgkmcnt(61)
	v_add_nc_u32_e32 v29, v29, v0
	s_waitcnt lgkmcnt(60)
	v_add_nc_u32_e32 v2, v22, v2
	s_waitcnt lgkmcnt(59)
	v_add_nc_u32_e32 v3, v31, v3
	s_waitcnt lgkmcnt(58)
	v_add_nc_u32_e32 v4, v20, v4
	s_waitcnt lgkmcnt(57)
	v_add_nc_u32_e32 v5, v30, v5
	s_waitcnt lgkmcnt(56)
	v_add_nc_u32_e32 v6, v18, v6
	s_waitcnt lgkmcnt(55)
	v_add_nc_u32_e32 v7, v28, v7
	s_waitcnt lgkmcnt(54)
	v_add_nc_u32_e32 v8, v17, v8
	s_waitcnt lgkmcnt(45)
	v_add_nc_u32_e32 v9, v25, v9
	s_waitcnt lgkmcnt(44)
	v_add_nc_u32_e32 v10, v16, v10
	s_waitcnt lgkmcnt(43)
	v_add_nc_u32_e32 v12, v24, v12
	s_waitcnt lgkmcnt(42)
	v_add_nc_u32_e32 v13, v13, v14
	s_waitcnt lgkmcnt(41)
	v_add_nc_u32_e32 v14, v21, v15
	s_waitcnt lgkmcnt(40)
	v_add_nc_u32_e32 v11, v11, v26
	s_waitcnt lgkmcnt(39)
	v_add_nc_u32_e32 v15, v19, v27
	s_waitcnt lgkmcnt(38)
	v_add_nc_u32_e32 v16, v42, v66
	s_waitcnt lgkmcnt(29)
	v_add_nc_u32_e32 v17, v51, v94
	s_waitcnt lgkmcnt(28)
	v_add_nc_u32_e32 v18, v52, v88
	s_waitcnt lgkmcnt(27)
	v_add_nc_u32_e32 v19, v53, v89
	s_waitcnt lgkmcnt(26)
	v_add_nc_u32_e32 v20, v54, v97
	s_waitcnt lgkmcnt(25)
	v_add_nc_u32_e32 v21, v55, v100
	s_waitcnt lgkmcnt(24)
	v_add_nc_u32_e32 v22, v56, v101
	s_waitcnt lgkmcnt(23)
	v_add_nc_u32_e32 v24, v57, v102
	s_waitcnt lgkmcnt(22)
	v_add_nc_u32_e32 v23, v23, v103
	s_waitcnt lgkmcnt(13)
	v_add_nc_u32_e32 v25, v67, v116
	s_waitcnt lgkmcnt(12)
	v_add_nc_u32_e32 v26, v68, v117
	s_waitcnt lgkmcnt(11)
	v_add_nc_u32_e32 v27, v69, v118
	s_waitcnt lgkmcnt(10)
	v_add_nc_u32_e32 v28, v70, v86
	s_waitcnt lgkmcnt(9)
	v_add_nc_u32_e32 v30, v71, v87
	s_waitcnt lgkmcnt(8)
	v_add_nc_u32_e32 v31, v72, v111
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v42, v80, v82
	s_clause 0x1e
	global_store_b8 v29, v79, s[74:75]
	global_store_b8 v2, v32, s[74:75]
	global_store_b8 v3, v35, s[74:75]
	global_store_b8 v4, v36, s[74:75]
	global_store_b8 v5, v37, s[74:75]
	global_store_b8 v6, v38, s[74:75]
	global_store_b8 v7, v39, s[74:75]
	global_store_b8 v8, v40, s[74:75]
	global_store_b8 v9, v41, s[74:75]
	global_store_b8 v10, v43, s[74:75]
	global_store_b8 v12, v44, s[74:75]
	global_store_b8 v13, v45, s[74:75]
	global_store_b8 v14, v46, s[74:75]
	global_store_b8 v11, v47, s[74:75]
	global_store_b8 v15, v48, s[74:75]
	global_store_b8 v16, v49, s[74:75]
	global_store_b8 v17, v50, s[74:75]
	global_store_b8 v18, v58, s[74:75]
	global_store_b8 v19, v59, s[74:75]
	global_store_b8 v20, v60, s[74:75]
	global_store_b8 v21, v61, s[74:75]
	global_store_b8 v22, v62, s[74:75]
	global_store_b8 v24, v63, s[74:75]
	global_store_b8 v23, v64, s[74:75]
	global_store_b8 v25, v65, s[74:75]
	global_store_b8 v26, v73, s[74:75]
	global_store_b8 v27, v74, s[74:75]
	global_store_b8 v28, v75, s[74:75]
	global_store_b8 v30, v76, s[74:75]
	global_store_b8 v31, v77, s[74:75]
	global_store_b8 v42, v78, s[74:75]
	s_load_b32 s0, s[0:1], 0x50
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s0
	s_cselect_b32 s0, -1, 0
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
; %bb.365:
	v_add_nc_u32_e32 v2, v33, v34
	s_or_b32 s7, s7, exec_lo
; %bb.366:                              ; %Flow105
	s_or_b32 exec_lo, exec_lo, s0
.LBB20_367:                             ; %Flow104
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB20_369
; %bb.368:                              ; %_ZN7rocprim6detail25onesweep_iteration_helperIjhjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEES8_NS7_IhEES9_EEvT0_T1_T2_T3_PjSE_PNS0_23onesweep_lookback_stateES3_jjjRNS4_13storage_type_E.exit.sink.split.i
	v_lshlrev_b32_e32 v3, 2, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	ds_load_b32 v3, v3
	v_add_co_u32 v0, vcc_lo, s78, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s79, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB20_369:                             ; %_ZN7rocprim6detail18onesweep_iterationILj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0EN6thrust10device_ptrIjEES5_NS4_IhEES6_jNS_19identity_decomposerEEEvT4_T5_T6_T7_jPT8_SD_PNS0_23onesweep_lookback_stateET9_jjj.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
		.amdhsa_group_segment_fixed_size 63552
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 127
		.amdhsa_next_free_sgpr 88
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
.Lfunc_end20:
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end20-_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEES7_NS6_IhEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 23104
; NumSgprs: 90
; NumVgprs: 127
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 63552 bytes/workgroup (compile time only)
; SGPRBlocks: 11
; VGPRBlocks: 15
; NumSGPRsForWavesPerEU: 90
; NumVGPRsForWavesPerEU: 127
; Occupancy: 8
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.protected	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj ; -- Begin function _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.globl	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	8
	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj: ; @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
; %bb.0:
	s_clause 0x3
	s_load_b128 s[80:83], s[0:1], 0x44
	s_load_b256 s[68:75], s[0:1], 0x0
	s_load_b128 s[76:79], s[0:1], 0x28
	s_load_b64 s[86:87], s[0:1], 0x38
	v_mul_u32_u24_e32 v32, 31, v0
	s_mul_i32 s84, s15, 0x3e00
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_u32 s15, s82
	s_cbranch_scc0 .LBB21_337
; %bb.1:
	s_load_b32 s4, s[0:1], 0x20
	s_mov_b32 s85, 0
	s_mul_i32 s66, s82, 0xffffc200
	v_dual_mov_b32 v4, -1 :: v_dual_lshlrev_b32 v1, 2, v32
	s_lshl_b64 s[2:3], s[84:85], 2
	v_mov_b32_e32 v3, -1
	s_waitcnt lgkmcnt(0)
	s_add_i32 s66, s66, s4
	s_add_u32 s4, s68, s2
	s_addc_u32 s3, s69, s3
	v_add_co_u32 v1, s4, s4, v1
	v_cmp_gt_u32_e64 s2, s66, v32
	v_add_co_ci_u32_e64 v2, null, s3, 0, s4
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB21_3
; %bb.2:
	global_load_b32 v4, v[1:2], off
.LBB21_3:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v5, 1, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s66, v5
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB21_5
; %bb.4:
	global_load_b32 v3, v[1:2], off offset:4
.LBB21_5:
	s_or_b32 exec_lo, exec_lo, s4
	v_dual_mov_b32 v5, -1 :: v_dual_add_nc_u32 v6, 2, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e64 s4, s66, v6
	v_mov_b32_e32 v6, -1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB21_7
; %bb.6:
	global_load_b32 v6, v[1:2], off offset:8
.LBB21_7:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v7, 3, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s66, v7
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB21_9
; %bb.8:
	global_load_b32 v5, v[1:2], off offset:12
.LBB21_9:
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v42, -1 :: v_dual_add_nc_u32 v7, 4, v32
	v_mov_b32_e32 v41, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s66, v7
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB21_11
; %bb.10:
	global_load_b32 v42, v[1:2], off offset:16
.LBB21_11:
	s_or_b32 exec_lo, exec_lo, s7
	v_add_nc_u32_e32 v7, 5, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s66, v7
	s_and_saveexec_b32 s8, s7
	s_cbranch_execz .LBB21_13
; %bb.12:
	global_load_b32 v41, v[1:2], off offset:20
.LBB21_13:
	s_or_b32 exec_lo, exec_lo, s8
	v_dual_mov_b32 v44, -1 :: v_dual_add_nc_u32 v7, 6, v32
	v_mov_b32_e32 v43, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s66, v7
	s_and_saveexec_b32 s9, s8
	s_cbranch_execz .LBB21_15
; %bb.14:
	global_load_b32 v44, v[1:2], off offset:24
.LBB21_15:
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v7, 7, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s66, v7
	s_and_saveexec_b32 s10, s9
	s_cbranch_execz .LBB21_17
; %bb.16:
	global_load_b32 v43, v[1:2], off offset:28
.LBB21_17:
	s_or_b32 exec_lo, exec_lo, s10
	v_dual_mov_b32 v46, -1 :: v_dual_add_nc_u32 v7, 8, v32
	v_mov_b32_e32 v45, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s66, v7
	s_and_saveexec_b32 s11, s10
	s_cbranch_execz .LBB21_19
; %bb.18:
	global_load_b32 v46, v[1:2], off offset:32
.LBB21_19:
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v7, 9, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s11, s66, v7
	s_and_saveexec_b32 s12, s11
	s_cbranch_execz .LBB21_21
; %bb.20:
	global_load_b32 v45, v[1:2], off offset:36
.LBB21_21:
	s_or_b32 exec_lo, exec_lo, s12
	v_dual_mov_b32 v48, -1 :: v_dual_add_nc_u32 v7, 10, v32
	v_mov_b32_e32 v47, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s66, v7
	s_and_saveexec_b32 s13, s12
	s_cbranch_execz .LBB21_23
; %bb.22:
	global_load_b32 v48, v[1:2], off offset:40
.LBB21_23:
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v7, 11, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s13, s66, v7
	s_and_saveexec_b32 s14, s13
	s_cbranch_execz .LBB21_25
; %bb.24:
	global_load_b32 v47, v[1:2], off offset:44
.LBB21_25:
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v50, -1 :: v_dual_add_nc_u32 v7, 12, v32
	v_mov_b32_e32 v49, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s14, s66, v7
	s_and_saveexec_b32 s16, s14
	s_cbranch_execz .LBB21_27
; %bb.26:
	global_load_b32 v50, v[1:2], off offset:48
.LBB21_27:
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v7, 13, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s16, s66, v7
	s_and_saveexec_b32 s17, s16
	s_cbranch_execz .LBB21_29
; %bb.28:
	global_load_b32 v49, v[1:2], off offset:52
.LBB21_29:
	s_or_b32 exec_lo, exec_lo, s17
	v_dual_mov_b32 v52, -1 :: v_dual_add_nc_u32 v7, 14, v32
	v_mov_b32_e32 v51, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s17, s66, v7
	s_and_saveexec_b32 s18, s17
	s_cbranch_execz .LBB21_31
; %bb.30:
	global_load_b32 v52, v[1:2], off offset:56
.LBB21_31:
	s_or_b32 exec_lo, exec_lo, s18
	v_add_nc_u32_e32 v7, 15, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s18, s66, v7
	s_and_saveexec_b32 s19, s18
	s_cbranch_execz .LBB21_33
; %bb.32:
	global_load_b32 v51, v[1:2], off offset:60
.LBB21_33:
	s_or_b32 exec_lo, exec_lo, s19
	v_dual_mov_b32 v54, -1 :: v_dual_add_nc_u32 v7, 16, v32
	v_mov_b32_e32 v53, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s19, s66, v7
	s_and_saveexec_b32 s20, s19
	s_cbranch_execz .LBB21_35
; %bb.34:
	global_load_b32 v54, v[1:2], off offset:64
.LBB21_35:
	s_or_b32 exec_lo, exec_lo, s20
	v_add_nc_u32_e32 v7, 17, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s20, s66, v7
	s_and_saveexec_b32 s21, s20
	s_cbranch_execz .LBB21_37
; %bb.36:
	global_load_b32 v53, v[1:2], off offset:68
.LBB21_37:
	s_or_b32 exec_lo, exec_lo, s21
	v_dual_mov_b32 v56, -1 :: v_dual_add_nc_u32 v7, 18, v32
	v_mov_b32_e32 v55, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s21, s66, v7
	s_and_saveexec_b32 s22, s21
	s_cbranch_execz .LBB21_39
; %bb.38:
	global_load_b32 v56, v[1:2], off offset:72
.LBB21_39:
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v7, 19, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s22, s66, v7
	s_and_saveexec_b32 s23, s22
	s_cbranch_execz .LBB21_41
; %bb.40:
	global_load_b32 v55, v[1:2], off offset:76
.LBB21_41:
	s_or_b32 exec_lo, exec_lo, s23
	v_dual_mov_b32 v58, -1 :: v_dual_add_nc_u32 v7, 20, v32
	v_mov_b32_e32 v57, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s23, s66, v7
	s_and_saveexec_b32 s24, s23
	s_cbranch_execz .LBB21_43
; %bb.42:
	global_load_b32 v58, v[1:2], off offset:80
.LBB21_43:
	s_or_b32 exec_lo, exec_lo, s24
	v_add_nc_u32_e32 v7, 21, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s24, s66, v7
	s_and_saveexec_b32 s25, s24
	s_cbranch_execz .LBB21_45
; %bb.44:
	global_load_b32 v57, v[1:2], off offset:84
.LBB21_45:
	s_or_b32 exec_lo, exec_lo, s25
	v_dual_mov_b32 v60, -1 :: v_dual_add_nc_u32 v7, 22, v32
	v_mov_b32_e32 v59, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s25, s66, v7
	s_and_saveexec_b32 s26, s25
	s_cbranch_execz .LBB21_47
; %bb.46:
	global_load_b32 v60, v[1:2], off offset:88
.LBB21_47:
	s_or_b32 exec_lo, exec_lo, s26
	v_add_nc_u32_e32 v7, 23, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s26, s66, v7
	s_and_saveexec_b32 s27, s26
	s_cbranch_execz .LBB21_49
; %bb.48:
	global_load_b32 v59, v[1:2], off offset:92
.LBB21_49:
	s_or_b32 exec_lo, exec_lo, s27
	v_dual_mov_b32 v62, -1 :: v_dual_add_nc_u32 v7, 24, v32
	v_mov_b32_e32 v61, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s27, s66, v7
	s_and_saveexec_b32 s28, s27
	s_cbranch_execz .LBB21_51
; %bb.50:
	global_load_b32 v62, v[1:2], off offset:96
.LBB21_51:
	s_or_b32 exec_lo, exec_lo, s28
	v_add_nc_u32_e32 v7, 25, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s28, s66, v7
	s_and_saveexec_b32 s29, s28
	s_cbranch_execz .LBB21_53
; %bb.52:
	global_load_b32 v61, v[1:2], off offset:100
.LBB21_53:
	s_or_b32 exec_lo, exec_lo, s29
	v_dual_mov_b32 v64, -1 :: v_dual_add_nc_u32 v7, 26, v32
	v_mov_b32_e32 v63, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s29, s66, v7
	s_and_saveexec_b32 s30, s29
	s_cbranch_execz .LBB21_55
; %bb.54:
	global_load_b32 v64, v[1:2], off offset:104
.LBB21_55:
	s_or_b32 exec_lo, exec_lo, s30
	v_add_nc_u32_e32 v7, 27, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s30, s66, v7
	s_and_saveexec_b32 s31, s30
	s_cbranch_execz .LBB21_57
; %bb.56:
	global_load_b32 v63, v[1:2], off offset:108
.LBB21_57:
	s_or_b32 exec_lo, exec_lo, s31
	v_dual_mov_b32 v66, -1 :: v_dual_add_nc_u32 v7, 28, v32
	v_mov_b32_e32 v65, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s31, s66, v7
	s_and_saveexec_b32 s33, s31
	s_cbranch_execz .LBB21_59
; %bb.58:
	global_load_b32 v66, v[1:2], off offset:112
.LBB21_59:
	s_or_b32 exec_lo, exec_lo, s33
	v_add_nc_u32_e32 v7, 29, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s33, s66, v7
	s_and_saveexec_b32 s34, s33
	s_cbranch_execz .LBB21_61
; %bb.60:
	global_load_b32 v65, v[1:2], off offset:116
.LBB21_61:
	s_or_b32 exec_lo, exec_lo, s34
	v_add_nc_u32_e32 v7, 30, v32
	v_mov_b32_e32 v67, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s34, s66, v7
	s_and_saveexec_b32 s35, s34
	s_cbranch_execz .LBB21_63
; %bb.62:
	global_load_b32 v67, v[1:2], off offset:120
.LBB21_63:                              ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIjEEjLj31EjEEvjT_RAT1__T0_jT2_.exit.i.i
	s_or_b32 exec_lo, exec_lo, s35
	v_or_b32_e32 v1, 0xfffffe00, v0
	v_dual_mov_b32 v7, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_mov_b32 s35, 0
.LBB21_64:                              ; %.lr.ph.i.i.i.i.i.i23.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v1, 0x200, v1
	ds_store_b32 v2, v7
	v_add_nc_u32_e32 v2, 0x800, v2
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v1
	s_or_b32 s35, vcc_lo, s35
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB21_64
; %bb.65:                               ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i25.i
	s_or_b32 exec_lo, exec_lo, s35
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_lshl_b32 s35, -1, s81
	v_lshrrev_b32_e32 v10, s80, v6
	s_not_b32 s67, s35
	s_mov_b32 s39, exec_lo
	v_and_b32_e32 v1, s67, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v2, 9, v1
	v_lshrrev_b32_e32 v1, 3, v1
	v_and_or_b32 v2, 0xe00, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v2
	v_add_lshl_u32 v7, v2, v1, 1
	v_lshrrev_b32_e32 v2, s80, v3
	ds_load_u16 v1, v7
	v_and_b32_e32 v2, s67, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 9, v2
	v_lshrrev_b32_e32 v2, 3, v2
	v_and_or_b32 v8, 0xe00, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 1, v8
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v9, v1, 1
	v_add_lshl_u32 v8, v8, v2, 1
	ds_store_b16 v7, v9
	ds_load_u16 v2, v8
	v_and_b32_e32 v9, s67, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 9, v9
	v_lshrrev_b32_e32 v9, 3, v9
	v_and_or_b32 v10, 0xe00, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 1, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v11, v2, 1
	v_add_lshl_u32 v15, v10, v9, 1
	v_lshrrev_b32_e32 v10, s80, v5
	ds_store_b16 v8, v11
	ds_load_u16 v9, v15
	v_and_b32_e32 v10, s67, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 9, v10
	v_lshrrev_b32_e32 v10, 3, v10
	v_and_or_b32 v11, 0xe00, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 1, v11
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v12, v9, 1
	v_add_lshl_u32 v17, v11, v10, 1
	v_lshrrev_b32_e32 v11, s80, v42
	ds_store_b16 v15, v12
	ds_load_u16 v10, v17
	v_and_b32_e32 v11, s67, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 9, v11
	v_lshrrev_b32_e32 v11, 3, v11
	v_and_or_b32 v12, 0xe00, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 1, v12
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v13, v10, 1
	v_add_lshl_u32 v19, v12, v11, 1
	v_lshrrev_b32_e32 v12, s80, v41
	ds_store_b16 v17, v13
	ds_load_u16 v11, v19
	v_and_b32_e32 v12, s67, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 9, v12
	v_lshrrev_b32_e32 v12, 3, v12
	v_and_or_b32 v13, 0xe00, v13, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 1, v13
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v14, v11, 1
	v_add_lshl_u32 v21, v13, v12, 1
	v_lshrrev_b32_e32 v13, s80, v44
	ds_store_b16 v19, v14
	ds_load_u16 v12, v21
	v_and_b32_e32 v13, s67, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 9, v13
	v_lshrrev_b32_e32 v13, 3, v13
	v_and_or_b32 v14, 0xe00, v14, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 1, v14
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v16, v12, 1
	v_add_lshl_u32 v23, v14, v13, 1
	v_lshrrev_b32_e32 v14, s80, v43
	ds_store_b16 v21, v16
	ds_load_u16 v13, v23
	v_and_b32_e32 v14, s67, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v16, 9, v14
	v_lshrrev_b32_e32 v14, 3, v14
	v_and_or_b32 v16, 0xe00, v16, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v16, 1, v16
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v18, v13, 1
	v_add_lshl_u32 v25, v16, v14, 1
	v_lshrrev_b32_e32 v16, s80, v46
	ds_store_b16 v23, v18
	ds_load_u16 v14, v25
	v_and_b32_e32 v16, s67, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v18, 9, v16
	v_lshrrev_b32_e32 v16, 3, v16
	v_and_or_b32 v18, 0xe00, v18, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v18, 1, v18
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v20, v14, 1
	v_add_lshl_u32 v27, v18, v16, 1
	v_lshrrev_b32_e32 v18, s80, v45
	ds_store_b16 v25, v20
	ds_load_u16 v16, v27
	v_and_b32_e32 v18, s67, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v20, 9, v18
	v_lshrrev_b32_e32 v18, 3, v18
	v_and_or_b32 v20, 0xe00, v20, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v20, 1, v20
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v22, v16, 1
	v_add_lshl_u32 v29, v20, v18, 1
	v_lshrrev_b32_e32 v20, s80, v48
	ds_store_b16 v27, v22
	ds_load_u16 v18, v29
	v_and_b32_e32 v20, s67, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v22, 9, v20
	v_lshrrev_b32_e32 v20, 3, v20
	v_and_or_b32 v22, 0xe00, v22, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v22, 1, v22
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v24, v18, 1
	v_add_lshl_u32 v31, v22, v20, 1
	v_lshrrev_b32_e32 v22, s80, v47
	ds_store_b16 v29, v24
	ds_load_u16 v20, v31
	v_and_b32_e32 v22, s67, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v24, 9, v22
	v_lshrrev_b32_e32 v22, 3, v22
	v_and_or_b32 v24, 0xe00, v24, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v24, 1, v24
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v26, v20, 1
	v_add_lshl_u32 v34, v24, v22, 1
	v_lshrrev_b32_e32 v24, s80, v50
	ds_store_b16 v31, v26
	ds_load_u16 v22, v34
	v_and_b32_e32 v24, s67, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v26, 9, v24
	v_lshrrev_b32_e32 v24, 3, v24
	v_and_or_b32 v26, 0xe00, v26, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v26, 1, v26
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v28, v22, 1
	v_add_lshl_u32 v36, v26, v24, 1
	v_lshrrev_b32_e32 v26, s80, v49
	ds_store_b16 v34, v28
	ds_load_u16 v24, v36
	v_and_b32_e32 v26, s67, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v28, 9, v26
	v_lshrrev_b32_e32 v26, 3, v26
	v_and_or_b32 v28, 0xe00, v28, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v28, 1, v28
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v30, v24, 1
	v_add_lshl_u32 v38, v28, v26, 1
	v_lshrrev_b32_e32 v28, s80, v52
	ds_store_b16 v36, v30
	ds_load_u16 v26, v38
	v_and_b32_e32 v28, s67, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v30, 9, v28
	v_lshrrev_b32_e32 v28, 3, v28
	v_and_or_b32 v30, 0xe00, v30, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v30, 1, v30
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v33, v26, 1
	v_add_lshl_u32 v40, v30, v28, 1
	v_lshrrev_b32_e32 v30, s80, v51
	ds_store_b16 v38, v33
	ds_load_u16 v28, v40
	v_and_b32_e32 v30, s67, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v33, 9, v30
	v_lshrrev_b32_e32 v30, 3, v30
	v_and_or_b32 v33, 0xe00, v33, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v33, 1, v33
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v35, v28, 1
	v_add_lshl_u32 v69, v33, v30, 1
	v_lshrrev_b32_e32 v33, s80, v54
	ds_store_b16 v40, v35
	ds_load_u16 v30, v69
	v_and_b32_e32 v33, s67, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v35, 9, v33
	v_lshrrev_b32_e32 v33, 3, v33
	v_and_or_b32 v35, 0xe00, v35, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v35, 1, v35
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v37, v30, 1
	v_add_lshl_u32 v71, v35, v33, 1
	v_lshrrev_b32_e32 v35, s80, v53
	ds_store_b16 v69, v37
	ds_load_u16 v33, v71
	v_and_b32_e32 v35, s67, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v37, 9, v35
	v_lshrrev_b32_e32 v35, 3, v35
	v_and_or_b32 v37, 0xe00, v37, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v37, 1, v37
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v39, v33, 1
	v_add_lshl_u32 v73, v37, v35, 1
	v_lshrrev_b32_e32 v37, s80, v56
	ds_store_b16 v71, v39
	ds_load_u16 v35, v73
	v_and_b32_e32 v37, s67, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 9, v37
	v_lshrrev_b32_e32 v37, 3, v37
	v_and_or_b32 v39, 0xe00, v39, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 1, v39
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v68, v35, 1
	v_add_lshl_u32 v75, v39, v37, 1
	v_lshrrev_b32_e32 v39, s80, v55
	ds_store_b16 v73, v68
	ds_load_u16 v37, v75
	v_and_b32_e32 v39, s67, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 9, v39
	v_lshrrev_b32_e32 v39, 3, v39
	v_and_or_b32 v68, 0xe00, v68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 1, v68
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v70, v37, 1
	v_add_lshl_u32 v77, v68, v39, 1
	v_lshrrev_b32_e32 v68, s80, v58
	ds_store_b16 v75, v70
	ds_load_u16 v39, v77
	v_and_b32_e32 v68, s67, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 9, v68
	v_lshrrev_b32_e32 v68, 3, v68
	v_and_or_b32 v70, 0xe00, v70, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 1, v70
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v72, v39, 1
	v_add_lshl_u32 v79, v70, v68, 1
	v_lshrrev_b32_e32 v70, s80, v57
	ds_store_b16 v77, v72
	ds_load_u16 v68, v79
	v_and_b32_e32 v70, s67, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 9, v70
	v_lshrrev_b32_e32 v70, 3, v70
	v_and_or_b32 v72, 0xe00, v72, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 1, v72
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v74, v68, 1
	v_add_lshl_u32 v81, v72, v70, 1
	v_lshrrev_b32_e32 v72, s80, v60
	ds_store_b16 v79, v74
	ds_load_u16 v70, v81
	v_and_b32_e32 v72, s67, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 9, v72
	v_lshrrev_b32_e32 v72, 3, v72
	v_and_or_b32 v74, 0xe00, v74, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 1, v74
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v76, v70, 1
	v_add_lshl_u32 v83, v74, v72, 1
	v_lshrrev_b32_e32 v74, s80, v59
	ds_store_b16 v81, v76
	ds_load_u16 v72, v83
	v_and_b32_e32 v74, s67, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 9, v74
	v_lshrrev_b32_e32 v74, 3, v74
	v_and_or_b32 v76, 0xe00, v76, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 1, v76
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v78, v72, 1
	v_add_lshl_u32 v85, v76, v74, 1
	v_lshrrev_b32_e32 v76, s80, v62
	ds_store_b16 v83, v78
	ds_load_u16 v74, v85
	v_and_b32_e32 v76, s67, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 9, v76
	v_lshrrev_b32_e32 v76, 3, v76
	v_and_or_b32 v78, 0xe00, v78, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 1, v78
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v80, v74, 1
	v_add_lshl_u32 v87, v78, v76, 1
	v_lshrrev_b32_e32 v78, s80, v61
	ds_store_b16 v85, v80
	ds_load_u16 v76, v87
	v_and_b32_e32 v78, s67, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 9, v78
	v_lshrrev_b32_e32 v78, 3, v78
	v_and_or_b32 v80, 0xe00, v80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 1, v80
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v82, v76, 1
	v_add_lshl_u32 v89, v80, v78, 1
	v_lshrrev_b32_e32 v80, s80, v64
	ds_store_b16 v87, v82
	ds_load_u16 v78, v89
	v_and_b32_e32 v80, s67, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 9, v80
	v_lshrrev_b32_e32 v80, 3, v80
	v_and_or_b32 v82, 0xe00, v82, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 1, v82
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v84, v78, 1
	v_add_lshl_u32 v90, v82, v80, 1
	v_lshrrev_b32_e32 v82, s80, v63
	ds_store_b16 v89, v84
	ds_load_u16 v80, v90
	v_and_b32_e32 v82, s67, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 9, v82
	v_lshrrev_b32_e32 v82, 3, v82
	v_and_or_b32 v84, 0xe00, v84, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 1, v84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v86, v80, 1
	v_add_lshl_u32 v91, v84, v82, 1
	v_lshrrev_b32_e32 v84, s80, v66
	ds_store_b16 v90, v86
	ds_load_u16 v82, v91
	v_and_b32_e32 v84, s67, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 9, v84
	v_lshrrev_b32_e32 v84, 3, v84
	v_and_or_b32 v86, 0xe00, v86, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 1, v86
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v88, v82, 1
	v_add_lshl_u32 v92, v86, v84, 1
	v_lshrrev_b32_e32 v86, s80, v65
	ds_store_b16 v91, v88
	ds_load_u16 v84, v92
	v_and_b32_e32 v86, s67, v86
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 9, v86
	v_lshrrev_b32_e32 v86, 3, v86
	v_and_or_b32 v88, 0xe00, v88, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 1, v88
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v94, v84, 1
	v_add_lshl_u32 v93, v88, v86, 1
	v_lshrrev_b32_e32 v88, s80, v67
	ds_store_b16 v92, v94
	ds_load_u16 v86, v93
	v_and_b32_e32 v88, s67, v88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 9, v88
	v_lshrrev_b32_e32 v88, 3, v88
	v_and_or_b32 v94, 0xe00, v94, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 1, v94
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v86, 1
	v_add_lshl_u32 v94, v94, v88, 1
	ds_store_b16 v93, v95
	ds_load_u16 v88, v94
	v_lshlrev_b32_e32 v95, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v88, 1
	ds_store_b16 v94, v96
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[96:99], v95 offset1:1
	ds_load_2addr_b64 v[100:103], v95 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v96, v97, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v96, v96, v98, v99
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v97, v96, v100, v101
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_or_b32_e32 v100, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v97, v97, v102, v103
	v_and_b32_e32 v98, 15, v96
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v99, v97 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s35, 0, v98
	v_cmp_lt_u32_e64 s36, 1, v98
	v_cmp_lt_u32_e64 s37, 3, v98
	v_cmp_lt_u32_e64 s38, 7, v98
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, v99, 0, s35
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v99, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v97, v97, v99
	v_mov_b32_dpp v99, v97 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, 0, v99, s37
	v_add_nc_u32_e32 v97, v97, v99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v98, 0, v99, s38
	v_bfe_i32 v99, v96, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v97, v97, v98
	ds_swizzle_b32 v98, v97 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v98, v99, v98
	v_lshrrev_b32_e32 v99, 5, v0
	v_add_nc_u32_e32 v97, v97, v98
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v99
	v_cmpx_eq_u32_e64 v100, v0
	s_cbranch_execz .LBB21_67
; %bb.66:
	ds_store_b32 v98, v97 offset:16384
.LBB21_67:
	s_or_b32 exec_lo, exec_lo, s39
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s39, vcc_lo
	s_cbranch_execz .LBB21_69
; %bb.68:
	v_mad_i32_i24 v99, 0xffffffe4, v0, v95
	ds_load_b32 v100, v99 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v101, v100 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, v101, 0, s35
	v_add_nc_u32_e32 v100, v101, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	v_mov_b32_dpp v101, v100 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, 0, v101, s37
	v_add_nc_u32_e32 v100, v100, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s38
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	ds_store_b32 v99, v100 offset:16384
.LBB21_69:                              ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i34.i
	s_or_b32 exec_lo, exec_lo, s39
	v_dual_mov_b32 v100, 0 :: v_dual_mov_b32 v99, 0
	s_mov_b32 s36, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB21_71
; %bb.70:
	ds_load_b32 v99, v98 offset:16380
.LBB21_71:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjhjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb0EN6thrust10device_ptrIjEEPjNSA_IhEEPhEEvT0_T1_T2_T3_SC_SC_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESG_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s36
	v_add_nc_u32_e32 v98, -1, v96
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s35, 0, v98
	v_cndmask_b32_e64 v98, v98, v96, s35
	v_cmp_eq_u32_e64 s35, 0, v96
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v98
	ds_bpermute_b32 v97, v98, v97
	ds_load_b32 v98, v100 offset:16444
	ds_load_2addr_b64 v[100:103], v95 offset1:1
	ds_load_b32 v104, v95 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v96, v97, v99, s35
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v96, v98, 16, v96
	ds_load_b64 v[98:99], v95 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v97, v96, v100
	v_add_nc_u32_e32 v100, v101, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v102, v100
	v_add_nc_u32_e32 v102, v103, v101
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v103, v98, v102
	v_add_nc_u32_e32 v98, v99, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v99, v104, v98
	ds_store_2addr_b64 v95, v[96:97], v[100:101] offset1:1
	ds_store_2addr_b64 v95, v[102:103], v[98:99] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v108, v7
	ds_load_u16 v107, v8
	ds_load_u16 v106, v15
	ds_load_u16 v105, v17
	ds_load_u16 v104, v19
	ds_load_u16 v103, v21
	ds_load_u16 v102, v23
	ds_load_u16 v101, v25
	ds_load_u16 v100, v27
	ds_load_u16 v15, v29
	ds_load_u16 v17, v31
	ds_load_u16 v19, v34
	ds_load_u16 v99, v36
	ds_load_u16 v98, v38
	ds_load_u16 v23, v40
	ds_load_u16 v21, v69
	ds_load_u16 v97, v71
	ds_load_u16 v96, v73
	ds_load_u16 v95, v75
	ds_load_u16 v25, v77
	ds_load_u16 v27, v79
	ds_load_u16 v29, v81
	ds_load_u16 v75, v83
	ds_load_u16 v73, v85
	ds_load_u16 v34, v87
	ds_load_u16 v31, v89
	ds_load_u16 v71, v90
	ds_load_u16 v69, v91
	ds_load_u16 v40, v92
	ds_load_u16 v36, v93
	ds_load_u16 v38, v94
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB21_75
; %bb.72:
	v_lshrrev_b32_e32 v7, 3, v0
	v_lshlrev_b32_e32 v8, 10, v0
	v_add_nc_u32_e32 v77, 1, v0
	s_mov_b32 s37, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v7, 0x1c00, v8, v7
	v_dual_mov_b32 v8, 0x3e00 :: v_dual_lshlrev_b32 v7, 1, v7
	ds_load_u16 v7, v7
	v_cmpx_ne_u32_e32 16, v77
	s_cbranch_execz .LBB21_74
; %bb.73:
	v_lshlrev_b32_e32 v8, 10, v77
	v_lshrrev_b32_e32 v77, 3, v77
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v8, 0x1c00, v8, v77
	v_lshlrev_b32_e32 v8, 1, v8
	ds_load_u16 v8, v8
.LBB21_74:
	s_or_b32 exec_lo, exec_lo, s37
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v8, v7
.LBB21_75:                              ; %Flow92
	s_or_b32 exec_lo, exec_lo, s36
	v_and_b32_e32 v1, 0xffff, v1
	v_and_b32_e32 v77, 0xffff, v9
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v9, 0xffff, v108
	v_and_b32_e32 v2, 0xffff, v2
	v_and_b32_e32 v79, 0xffff, v10
	s_waitcnt lgkmcnt(29)
	v_and_b32_e32 v10, 0xffff, v107
	v_and_b32_e32 v83, 0xffff, v12
	v_add_nc_u32_e32 v9, v9, v1
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v1, 0xffff, v106
	v_and_b32_e32 v81, 0xffff, v11
	v_add_nc_u32_e32 v10, v10, v2
	s_waitcnt lgkmcnt(25)
	v_and_b32_e32 v2, 0xffff, v103
	v_and_b32_e32 v85, 0xffff, v13
	v_and_b32_e32 v12, 0xffff, v105
	v_add_nc_u32_e32 v11, v1, v77
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v1, 0xffff, v102
	v_and_b32_e32 v87, 0xffff, v14
	v_add_nc_u32_e32 v14, v2, v83
	s_waitcnt lgkmcnt(23)
	v_and_b32_e32 v2, 0xffff, v101
	v_and_b32_e32 v20, 0xffff, v20
	v_add_nc_u32_e32 v12, v12, v79
	s_waitcnt lgkmcnt(21)
	v_and_b32_e32 v79, 0xffff, v15
	v_add_nc_u32_e32 v15, v1, v85
	s_waitcnt lgkmcnt(20)
	v_and_b32_e32 v1, 0xffff, v17
	v_and_b32_e32 v89, 0xffff, v16
	v_and_b32_e32 v22, 0xffff, v22
	v_add_nc_u32_e32 v16, v2, v87
	s_waitcnt lgkmcnt(19)
	v_and_b32_e32 v2, 0xffff, v19
	v_and_b32_e32 v24, 0xffff, v24
	v_add_nc_u32_e32 v19, v1, v20
	s_waitcnt lgkmcnt(18)
	v_and_b32_e32 v1, 0xffff, v99
	v_and_b32_e32 v30, 0xffff, v30
	v_and_b32_e32 v77, 0xffff, v100
	v_add_nc_u32_e32 v20, v2, v22
	s_waitcnt lgkmcnt(15)
	v_and_b32_e32 v2, 0xffff, v21
	v_and_b32_e32 v33, 0xffff, v33
	v_add_nc_u32_e32 v21, v1, v24
	s_waitcnt lgkmcnt(14)
	v_and_b32_e32 v1, 0xffff, v97
	v_and_b32_e32 v26, 0xffff, v26
	v_and_b32_e32 v28, 0xffff, v28
	v_and_b32_e32 v35, 0xffff, v35
	v_add_nc_u32_e32 v17, v77, v89
	v_and_b32_e32 v77, 0xffff, v98
	v_and_b32_e32 v23, 0xffff, v23
	v_add_nc_u32_e32 v24, v2, v30
	s_waitcnt lgkmcnt(13)
	v_and_b32_e32 v2, 0xffff, v96
	v_and_b32_e32 v68, 0xffff, v68
	s_waitcnt lgkmcnt(11)
	v_and_b32_e32 v30, 0xffff, v25
	v_add_nc_u32_e32 v25, v1, v33
	s_waitcnt lgkmcnt(10)
	v_and_b32_e32 v1, 0xffff, v27
	v_and_b32_e32 v37, 0xffff, v37
	v_and_b32_e32 v39, 0xffff, v39
	v_and_b32_e32 v70, 0xffff, v70
	v_add_nc_u32_e32 v22, v77, v26
	v_add_nc_u32_e32 v23, v23, v28
	v_and_b32_e32 v28, 0xffff, v95
	v_add_nc_u32_e32 v26, v2, v35
	s_waitcnt lgkmcnt(9)
	v_and_b32_e32 v2, 0xffff, v29
	v_and_b32_e32 v72, 0xffff, v72
	v_add_nc_u32_e32 v29, v1, v68
	s_waitcnt lgkmcnt(8)
	v_and_b32_e32 v1, 0xffff, v75
	v_and_b32_e32 v78, 0xffff, v78
	v_add_nc_u32_e32 v27, v28, v37
	v_add_nc_u32_e32 v28, v30, v39
	v_add_nc_u32_e32 v30, v2, v70
	s_waitcnt lgkmcnt(5)
	v_and_b32_e32 v2, 0xffff, v31
	v_and_b32_e32 v80, 0xffff, v80
	v_add_nc_u32_e32 v31, v1, v72
	s_waitcnt lgkmcnt(4)
	v_and_b32_e32 v1, 0xffff, v71
	v_and_b32_e32 v82, 0xffff, v82
	v_add_nc_u32_e32 v35, v2, v78
	s_waitcnt lgkmcnt(3)
	v_and_b32_e32 v2, 0xffff, v69
	v_and_b32_e32 v13, 0xffff, v104
	v_and_b32_e32 v84, 0xffff, v84
	v_and_b32_e32 v86, 0xffff, v86
	v_and_b32_e32 v88, 0xffff, v88
	s_waitcnt lgkmcnt(2)
	v_and_b32_e32 v39, 0xffff, v40
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v40, 0xffff, v36
	v_add_nc_u32_e32 v36, v1, v80
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v1, 0xffff, v38
	v_add_nc_u32_e32 v37, v2, v82
	v_lshlrev_b32_e32 v2, 2, v9
	v_and_b32_e32 v18, 0xffff, v18
	v_add_nc_u32_e32 v13, v13, v81
	v_add_nc_u32_e32 v38, v39, v84
	v_add_nc_u32_e32 v39, v40, v86
	v_add_nc_u32_e32 v40, v1, v88
	v_lshlrev_b32_e32 v1, 2, v10
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v2, v4 offset:64
	v_lshlrev_b32_e32 v2, 2, v11
	v_lshlrev_b32_e32 v4, 2, v12
	v_add_nc_u32_e32 v18, v79, v18
	v_lshlrev_b32_e32 v68, 2, v13
	v_lshlrev_b32_e32 v69, 2, v14
	ds_store_b32 v1, v3 offset:64
	ds_store_b32 v2, v6 offset:64
	ds_store_b32 v4, v5 offset:64
	ds_store_b32 v68, v42 offset:64
	ds_store_b32 v69, v41 offset:64
	v_lshlrev_b32_e32 v1, 2, v15
	v_lshlrev_b32_e32 v2, 2, v16
	v_lshlrev_b32_e32 v3, 2, v17
	v_lshlrev_b32_e32 v4, 2, v18
	v_lshlrev_b32_e32 v5, 2, v19
	ds_store_b32 v1, v44 offset:64
	ds_store_b32 v2, v43 offset:64
	ds_store_b32 v3, v46 offset:64
	ds_store_b32 v4, v45 offset:64
	ds_store_b32 v5, v48 offset:64
	v_lshlrev_b32_e32 v1, 2, v20
	v_lshlrev_b32_e32 v2, 2, v21
	v_and_b32_e32 v74, 0xffff, v74
	v_and_b32_e32 v33, 0xffff, v73
	v_lshlrev_b32_e32 v3, 2, v22
	v_and_b32_e32 v76, 0xffff, v76
	v_and_b32_e32 v34, 0xffff, v34
	v_lshlrev_b32_e32 v4, 2, v23
	v_lshlrev_b32_e32 v5, 2, v24
	ds_store_b32 v1, v47 offset:64
	ds_store_b32 v2, v50 offset:64
	ds_store_b32 v3, v49 offset:64
	ds_store_b32 v4, v52 offset:64
	ds_store_b32 v5, v51 offset:64
	v_lshlrev_b32_e32 v1, 2, v25
	v_lshlrev_b32_e32 v2, 2, v26
	v_add_nc_u32_e32 v33, v33, v74
	v_lshlrev_b32_e32 v3, 2, v27
	v_add_nc_u32_e32 v34, v34, v76
	v_lshlrev_b32_e32 v4, 2, v28
	v_lshlrev_b32_e32 v5, 2, v29
	ds_store_b32 v1, v54 offset:64
	ds_store_b32 v2, v53 offset:64
	ds_store_b32 v3, v56 offset:64
	ds_store_b32 v4, v55 offset:64
	ds_store_b32 v5, v58 offset:64
	v_lshlrev_b32_e32 v1, 2, v30
	v_lshlrev_b32_e32 v2, 2, v31
	v_lshlrev_b32_e32 v3, 2, v33
	v_lshlrev_b32_e32 v4, 2, v34
	v_lshlrev_b32_e32 v5, 2, v35
	ds_store_b32 v1, v57 offset:64
	ds_store_b32 v2, v60 offset:64
	ds_store_b32 v3, v59 offset:64
	ds_store_b32 v4, v62 offset:64
	ds_store_b32 v5, v61 offset:64
	v_lshlrev_b32_e32 v1, 2, v36
	v_lshlrev_b32_e32 v2, 2, v37
	v_lshlrev_b32_e32 v3, 2, v38
	v_lshlrev_b32_e32 v4, 2, v39
	v_lshlrev_b32_e32 v5, 2, v40
	ds_store_b32 v1, v64 offset:64
	ds_store_b32 v2, v63 offset:64
	ds_store_b32 v3, v66 offset:64
	ds_store_b32 v4, v65 offset:64
	ds_store_b32 v5, v67 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB21_86
; %bb.76:
	v_lshl_or_b32 v3, s15, 4, v0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v41, 0
	s_mov_b32 s37, 0
	s_mov_b32 s38, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v8
	v_add_co_u32 v1, s35, s86, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s35, s87, v2, s35
                                        ; implicit-def: $sgpr35
	global_store_b32 v[1:2], v3, off
.LBB21_77:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB21_80 Depth 2
	s_or_b32 s35, s35, exec_lo
	s_cmp_eq_u32 s38, 0
	s_cbranch_scc1 .LBB21_83
; %bb.78:                               ;   in Loop: Header=BB21_77 Depth=1
	s_add_i32 s38, s38, -1
	s_mov_b32 s39, exec_lo
	v_lshl_or_b32 v3, s38, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s35, s86, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s35, s87, v6, s35
	global_load_b32 v42, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v42
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB21_82
; %bb.79:                               ; %.lr.ph.i44.i.preheader
                                        ;   in Loop: Header=BB21_77 Depth=1
	s_mov_b32 s40, 0
.LBB21_80:                              ; %.lr.ph.i44.i
                                        ;   Parent Loop BB21_77 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v42, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s35, 0, v3
	s_or_b32 s40, s35, s40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s40
	s_cbranch_execnz .LBB21_80
; %bb.81:                               ; %Flow
                                        ;   in Loop: Header=BB21_77 Depth=1
	s_or_b32 exec_lo, exec_lo, s40
.LBB21_82:                              ; %Flow89
                                        ;   in Loop: Header=BB21_77 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s39
	v_and_b32_e32 v5, 0x3fffffff, v42
	v_cmp_eq_u32_e64 s35, 0x80000000, v3
	v_add_nc_u32_e32 v41, v5, v41
	s_branch .LBB21_84
.LBB21_83:                              ;   in Loop: Header=BB21_77 Depth=1
                                        ; implicit-def: $sgpr38
.LBB21_84:                              ; %Flow90
                                        ;   in Loop: Header=BB21_77 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s39, exec_lo, s35
	s_or_b32 s37, s39, s37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s37
	s_cbranch_execnz .LBB21_77
; %bb.85:
	s_or_b32 exec_lo, exec_lo, s37
	v_add_nc_u32_e32 v3, v41, v8
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v41, v7
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	ds_store_b32 v4, v1
.LBB21_86:                              ; %Flow91
	s_or_b32 exec_lo, exec_lo, s36
	v_cmp_gt_u32_e64 s35, s66, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s37, s35
	s_cbranch_execz .LBB21_88
; %bb.87:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v3, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s36, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s36, s71, v2, s36
	global_store_b32 v[1:2], v3, off
.LBB21_88:
	s_or_b32 exec_lo, exec_lo, s37
	v_or_b32_e32 v3, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s36, s66, v3
	s_and_saveexec_b32 s38, s36
	s_cbranch_execz .LBB21_90
; %bb.89:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v4, v1 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s37, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s37, s71, v2, s37
	global_store_b32 v[1:2], v4, off
.LBB21_90:
	s_or_b32 exec_lo, exec_lo, s38
	v_or_b32_e32 v4, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s37, s66, v4
	s_and_saveexec_b32 s39, s37
	s_cbranch_execz .LBB21_92
; %bb.91:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v5, v1 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s38, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s38, s71, v2, s38
	global_store_b32 v[1:2], v5, off
.LBB21_92:
	s_or_b32 exec_lo, exec_lo, s39
	v_or_b32_e32 v5, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s38, s66, v5
	s_and_saveexec_b32 s40, s38
	s_cbranch_execz .LBB21_94
; %bb.93:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v6, v1 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s39, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s39, s71, v2, s39
	global_store_b32 v[1:2], v6, off
.LBB21_94:
	s_or_b32 exec_lo, exec_lo, s40
	v_or_b32_e32 v6, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s39, s66, v6
	s_and_saveexec_b32 s41, s39
	s_cbranch_execz .LBB21_96
; %bb.95:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v41, v1 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s40, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s40, s71, v2, s40
	global_store_b32 v[1:2], v41, off
.LBB21_96:
	s_or_b32 exec_lo, exec_lo, s41
	v_or_b32_e32 v41, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s40, s66, v41
	s_and_saveexec_b32 s42, s40
	s_cbranch_execz .LBB21_98
; %bb.97:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v42, v1 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s41, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s41, s71, v2, s41
	global_store_b32 v[1:2], v42, off
.LBB21_98:
	s_or_b32 exec_lo, exec_lo, s42
	v_or_b32_e32 v42, 0xc00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s41, s66, v42
	s_and_saveexec_b32 s43, s41
	s_cbranch_execz .LBB21_100
; %bb.99:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v43, v1 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s42, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s42, s71, v2, s42
	global_store_b32 v[1:2], v43, off
.LBB21_100:
	s_or_b32 exec_lo, exec_lo, s43
	v_or_b32_e32 v43, 0xe00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s42, s66, v43
	s_and_saveexec_b32 s44, s42
	s_cbranch_execz .LBB21_102
; %bb.101:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v44, v1 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s43, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s43, s71, v2, s43
	global_store_b32 v[1:2], v44, off
.LBB21_102:
	s_or_b32 exec_lo, exec_lo, s44
	v_or_b32_e32 v44, 0x1000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s43, s66, v44
	s_and_saveexec_b32 s45, s43
	s_cbranch_execz .LBB21_104
; %bb.103:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v45, v1 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s44, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s44, s71, v2, s44
	global_store_b32 v[1:2], v45, off
.LBB21_104:
	s_or_b32 exec_lo, exec_lo, s45
	v_or_b32_e32 v45, 0x1200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s44, s66, v45
	s_and_saveexec_b32 s46, s44
	s_cbranch_execz .LBB21_106
; %bb.105:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v46, v1 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s45, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s45, s71, v2, s45
	global_store_b32 v[1:2], v46, off
.LBB21_106:
	s_or_b32 exec_lo, exec_lo, s46
	v_or_b32_e32 v46, 0x1400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s45, s66, v46
	s_and_saveexec_b32 s47, s45
	s_cbranch_execz .LBB21_108
; %bb.107:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v47, v1 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s46, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s46, s71, v2, s46
	global_store_b32 v[1:2], v47, off
.LBB21_108:
	s_or_b32 exec_lo, exec_lo, s47
	v_or_b32_e32 v47, 0x1600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s46, s66, v47
	s_and_saveexec_b32 s48, s46
	s_cbranch_execz .LBB21_110
; %bb.109:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v48, v1 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s47, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s47, s71, v2, s47
	global_store_b32 v[1:2], v48, off
.LBB21_110:
	s_or_b32 exec_lo, exec_lo, s48
	v_or_b32_e32 v48, 0x1800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s47, s66, v48
	s_and_saveexec_b32 s49, s47
	s_cbranch_execz .LBB21_112
; %bb.111:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v49, v1 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s48, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s48, s71, v2, s48
	global_store_b32 v[1:2], v49, off
.LBB21_112:
	s_or_b32 exec_lo, exec_lo, s49
	v_or_b32_e32 v49, 0x1a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s48, s66, v49
	s_and_saveexec_b32 s50, s48
	s_cbranch_execz .LBB21_114
; %bb.113:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v50, v1 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s49, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s49, s71, v2, s49
	global_store_b32 v[1:2], v50, off
.LBB21_114:
	s_or_b32 exec_lo, exec_lo, s50
	v_or_b32_e32 v50, 0x1c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s49, s66, v50
	s_and_saveexec_b32 s51, s49
	s_cbranch_execz .LBB21_116
; %bb.115:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v51, v1 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s50, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s50, s71, v2, s50
	global_store_b32 v[1:2], v51, off
.LBB21_116:
	s_or_b32 exec_lo, exec_lo, s51
	v_or_b32_e32 v51, 0x1e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s50, s66, v51
	s_and_saveexec_b32 s52, s50
	s_cbranch_execz .LBB21_118
; %bb.117:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v52, v1 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s51, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s51, s71, v2, s51
	global_store_b32 v[1:2], v52, off
.LBB21_118:
	s_or_b32 exec_lo, exec_lo, s52
	v_or_b32_e32 v52, 0x2000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s51, s66, v52
	s_and_saveexec_b32 s53, s51
	s_cbranch_execz .LBB21_120
; %bb.119:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v53, v1 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s52, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s52, s71, v2, s52
	global_store_b32 v[1:2], v53, off
.LBB21_120:
	s_or_b32 exec_lo, exec_lo, s53
	v_or_b32_e32 v53, 0x2200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s52, s66, v53
	s_and_saveexec_b32 s54, s52
	s_cbranch_execz .LBB21_122
; %bb.121:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v54, v1 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s53, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s53, s71, v2, s53
	global_store_b32 v[1:2], v54, off
.LBB21_122:
	s_or_b32 exec_lo, exec_lo, s54
	v_or_b32_e32 v54, 0x2400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s53, s66, v54
	s_and_saveexec_b32 s55, s53
	s_cbranch_execz .LBB21_124
; %bb.123:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v55, v1 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s54, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s54, s71, v2, s54
	global_store_b32 v[1:2], v55, off
.LBB21_124:
	s_or_b32 exec_lo, exec_lo, s55
	v_or_b32_e32 v55, 0x2600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s54, s66, v55
	s_and_saveexec_b32 s56, s54
	s_cbranch_execz .LBB21_126
; %bb.125:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v56, v1 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s55, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s55, s71, v2, s55
	global_store_b32 v[1:2], v56, off
.LBB21_126:
	s_or_b32 exec_lo, exec_lo, s56
	v_or_b32_e32 v56, 0x2800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s55, s66, v56
	s_and_saveexec_b32 s57, s55
	s_cbranch_execz .LBB21_128
; %bb.127:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v57, v1 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s56, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s56, s71, v2, s56
	global_store_b32 v[1:2], v57, off
.LBB21_128:
	s_or_b32 exec_lo, exec_lo, s57
	v_or_b32_e32 v57, 0x2a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s56, s66, v57
	s_and_saveexec_b32 s58, s56
	s_cbranch_execz .LBB21_130
; %bb.129:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v58, v1 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s57, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s57, s71, v2, s57
	global_store_b32 v[1:2], v58, off
.LBB21_130:
	s_or_b32 exec_lo, exec_lo, s58
	v_or_b32_e32 v58, 0x2c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s57, s66, v58
	s_and_saveexec_b32 s59, s57
	s_cbranch_execz .LBB21_132
; %bb.131:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v59, v1 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s58, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s58, s71, v2, s58
	global_store_b32 v[1:2], v59, off
.LBB21_132:
	s_or_b32 exec_lo, exec_lo, s59
	v_or_b32_e32 v59, 0x2e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s58, s66, v59
	s_and_saveexec_b32 s60, s58
	s_cbranch_execz .LBB21_134
; %bb.133:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v60, v1 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s59, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s59, s71, v2, s59
	global_store_b32 v[1:2], v60, off
.LBB21_134:
	s_or_b32 exec_lo, exec_lo, s60
	v_or_b32_e32 v60, 0x3000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s59, s66, v60
	s_and_saveexec_b32 s61, s59
	s_cbranch_execz .LBB21_136
; %bb.135:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v61, v1 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s60, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s60, s71, v2, s60
	global_store_b32 v[1:2], v61, off
.LBB21_136:
	s_or_b32 exec_lo, exec_lo, s61
	v_or_b32_e32 v61, 0x3200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s60, s66, v61
	s_and_saveexec_b32 s62, s60
	s_cbranch_execz .LBB21_138
; %bb.137:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v62, v1 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s61, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s61, s71, v2, s61
	global_store_b32 v[1:2], v62, off
.LBB21_138:
	s_or_b32 exec_lo, exec_lo, s62
	v_or_b32_e32 v62, 0x3400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s61, s66, v62
	s_and_saveexec_b32 s63, s61
	s_cbranch_execz .LBB21_140
; %bb.139:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v63, v1 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s62, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s62, s71, v2, s62
	global_store_b32 v[1:2], v63, off
.LBB21_140:
	s_or_b32 exec_lo, exec_lo, s63
	v_or_b32_e32 v63, 0x3600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s62, s66, v63
	s_and_saveexec_b32 s64, s62
	s_cbranch_execz .LBB21_142
; %bb.141:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v64, v1 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s63, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s63, s71, v2, s63
	global_store_b32 v[1:2], v64, off
.LBB21_142:
	s_or_b32 exec_lo, exec_lo, s64
	v_or_b32_e32 v64, 0x3800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s63, s66, v64
	s_and_saveexec_b32 s65, s63
	s_cbranch_execz .LBB21_144
; %bb.143:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v65, v1 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s64, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s64, s71, v2, s64
	global_store_b32 v[1:2], v65, off
.LBB21_144:
	s_or_b32 exec_lo, exec_lo, s65
	v_or_b32_e32 v65, 0x3a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s64, s66, v65
	s_and_saveexec_b32 s82, s64
	s_cbranch_execz .LBB21_146
; %bb.145:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v66, v1 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s65, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s65, s71, v2, s65
	global_store_b32 v[1:2], v66, off
.LBB21_146:
	s_or_b32 exec_lo, exec_lo, s82
	v_or_b32_e32 v66, 0x3c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s65, s66, v66
	s_and_saveexec_b32 s82, s65
	s_cbranch_execz .LBB21_148
; %bb.147:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v67, v1 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s66, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s66, s71, v2, s66
	global_store_b32 v[1:2], v67, off
.LBB21_148:
	s_or_b32 exec_lo, exec_lo, s82
	s_add_u32 s66, s72, s84
	s_addc_u32 s82, s73, 0
	v_add_co_u32 v1, s66, s66, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v2, null, s82, 0, s66
                                        ; implicit-def: $vgpr67
	s_and_saveexec_b32 s66, s2
	s_xor_b32 s2, exec_lo, s66
	s_cbranch_execz .LBB21_150
; %bb.149:
	global_load_u8 v67, v[1:2], off
.LBB21_150:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr68
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB21_152
; %bb.151:
	global_load_u8 v68, v[1:2], off offset:1
.LBB21_152:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr69
	s_and_saveexec_b32 s2, s4
	s_cbranch_execz .LBB21_154
; %bb.153:
	global_load_u8 v69, v[1:2], off offset:2
.LBB21_154:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr70
	s_and_saveexec_b32 s2, s5
	s_cbranch_execz .LBB21_156
; %bb.155:
	global_load_u8 v70, v[1:2], off offset:3
.LBB21_156:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr71
	s_and_saveexec_b32 s2, s6
	s_cbranch_execz .LBB21_158
; %bb.157:
	global_load_u8 v71, v[1:2], off offset:4
.LBB21_158:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr72
	s_and_saveexec_b32 s2, s7
	s_cbranch_execz .LBB21_160
; %bb.159:
	global_load_u8 v72, v[1:2], off offset:5
.LBB21_160:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr73
	s_and_saveexec_b32 s2, s8
	s_cbranch_execz .LBB21_162
; %bb.161:
	global_load_u8 v73, v[1:2], off offset:6
.LBB21_162:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr74
	s_and_saveexec_b32 s2, s9
	s_cbranch_execz .LBB21_164
; %bb.163:
	global_load_u8 v74, v[1:2], off offset:7
.LBB21_164:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr75
	s_and_saveexec_b32 s2, s10
	s_cbranch_execz .LBB21_166
; %bb.165:
	global_load_u8 v75, v[1:2], off offset:8
.LBB21_166:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr76
	s_and_saveexec_b32 s2, s11
	s_cbranch_execz .LBB21_168
; %bb.167:
	global_load_u8 v76, v[1:2], off offset:9
.LBB21_168:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr77
	s_and_saveexec_b32 s2, s12
	s_cbranch_execz .LBB21_170
; %bb.169:
	global_load_u8 v77, v[1:2], off offset:10
.LBB21_170:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr78
	s_and_saveexec_b32 s2, s13
	s_cbranch_execz .LBB21_172
; %bb.171:
	global_load_u8 v78, v[1:2], off offset:11
.LBB21_172:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr79
	s_and_saveexec_b32 s2, s14
	s_cbranch_execz .LBB21_174
; %bb.173:
	global_load_u8 v79, v[1:2], off offset:12
.LBB21_174:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr80
	s_and_saveexec_b32 s2, s16
	s_cbranch_execz .LBB21_176
; %bb.175:
	global_load_u8 v80, v[1:2], off offset:13
.LBB21_176:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr81
	s_and_saveexec_b32 s2, s17
	s_cbranch_execz .LBB21_178
; %bb.177:
	global_load_u8 v81, v[1:2], off offset:14
.LBB21_178:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr82
	s_and_saveexec_b32 s2, s18
	s_cbranch_execz .LBB21_180
; %bb.179:
	global_load_u8 v82, v[1:2], off offset:15
.LBB21_180:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr83
	s_and_saveexec_b32 s2, s19
	s_cbranch_execz .LBB21_182
; %bb.181:
	global_load_u8 v83, v[1:2], off offset:16
.LBB21_182:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr84
	s_and_saveexec_b32 s2, s20
	s_cbranch_execz .LBB21_184
; %bb.183:
	global_load_u8 v84, v[1:2], off offset:17
.LBB21_184:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr85
	s_and_saveexec_b32 s2, s21
	s_cbranch_execz .LBB21_186
; %bb.185:
	global_load_u8 v85, v[1:2], off offset:18
.LBB21_186:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr86
	s_and_saveexec_b32 s2, s22
	s_cbranch_execz .LBB21_188
; %bb.187:
	global_load_u8 v86, v[1:2], off offset:19
.LBB21_188:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr87
	s_and_saveexec_b32 s2, s23
	s_cbranch_execz .LBB21_190
; %bb.189:
	global_load_u8 v87, v[1:2], off offset:20
.LBB21_190:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr88
	s_and_saveexec_b32 s2, s24
	s_cbranch_execz .LBB21_192
; %bb.191:
	global_load_u8 v88, v[1:2], off offset:21
.LBB21_192:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr89
	s_and_saveexec_b32 s2, s25
	s_cbranch_execz .LBB21_194
; %bb.193:
	global_load_u8 v89, v[1:2], off offset:22
.LBB21_194:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr90
	s_and_saveexec_b32 s2, s26
	s_cbranch_execz .LBB21_196
; %bb.195:
	global_load_u8 v90, v[1:2], off offset:23
.LBB21_196:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr91
	s_and_saveexec_b32 s2, s27
	s_cbranch_execz .LBB21_198
; %bb.197:
	global_load_u8 v91, v[1:2], off offset:24
.LBB21_198:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr92
	s_and_saveexec_b32 s2, s28
	s_cbranch_execz .LBB21_200
; %bb.199:
	global_load_u8 v92, v[1:2], off offset:25
.LBB21_200:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr93
	s_and_saveexec_b32 s2, s29
	s_cbranch_execz .LBB21_202
; %bb.201:
	global_load_u8 v93, v[1:2], off offset:26
.LBB21_202:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr94
	s_and_saveexec_b32 s2, s30
	s_cbranch_execz .LBB21_204
; %bb.203:
	global_load_u8 v94, v[1:2], off offset:27
.LBB21_204:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr95
	s_and_saveexec_b32 s2, s31
	s_cbranch_execz .LBB21_206
; %bb.205:
	global_load_u8 v95, v[1:2], off offset:28
.LBB21_206:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr96
	s_and_saveexec_b32 s2, s33
	s_cbranch_execz .LBB21_208
; %bb.207:
	global_load_u8 v96, v[1:2], off offset:29
.LBB21_208:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr97
	s_and_saveexec_b32 s2, s34
	s_cbranch_execz .LBB21_210
; %bb.209:
	global_load_u8 v97, v[1:2], off offset:30
.LBB21_210:                             ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIhEEhLj31EEEvjT_RAT1__T0_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s2, s35
	s_cbranch_execz .LBB21_212
; %bb.211:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
.LBB21_212:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr2
	s_and_saveexec_b32 s2, s36
	s_cbranch_execz .LBB21_214
; %bb.213:
	v_lshlrev_b32_e32 v2, 2, v0
	ds_load_b32 v2, v2 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v2, s80, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v2, s67, v2
.LBB21_214:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr98
	s_and_saveexec_b32 s2, s37
	s_cbranch_execz .LBB21_216
; %bb.215:
	v_lshlrev_b32_e32 v98, 2, v0
	ds_load_b32 v98, v98 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v98, s80, v98
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v98, s67, v98
.LBB21_216:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr99
	s_and_saveexec_b32 s2, s38
	s_cbranch_execz .LBB21_218
; %bb.217:
	v_lshlrev_b32_e32 v99, 2, v0
	ds_load_b32 v99, v99 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v99, s80, v99
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v99, s67, v99
.LBB21_218:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr100
	s_and_saveexec_b32 s2, s39
	s_cbranch_execz .LBB21_220
; %bb.219:
	v_lshlrev_b32_e32 v100, 2, v0
	ds_load_b32 v100, v100 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v100, s80, v100
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v100, s67, v100
.LBB21_220:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr101
	s_and_saveexec_b32 s2, s40
	s_cbranch_execz .LBB21_222
; %bb.221:
	v_lshlrev_b32_e32 v101, 2, v0
	ds_load_b32 v101, v101 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v101, s80, v101
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v101, s67, v101
.LBB21_222:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr102
	s_and_saveexec_b32 s2, s41
	s_cbranch_execz .LBB21_224
; %bb.223:
	v_lshlrev_b32_e32 v102, 2, v0
	ds_load_b32 v102, v102 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v102, s80, v102
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v102, s67, v102
.LBB21_224:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr103
	s_and_saveexec_b32 s2, s42
	s_cbranch_execz .LBB21_226
; %bb.225:
	v_lshlrev_b32_e32 v103, 2, v0
	ds_load_b32 v103, v103 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v103, s80, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v103, s67, v103
.LBB21_226:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr104
	s_and_saveexec_b32 s2, s43
	s_cbranch_execz .LBB21_228
; %bb.227:
	v_lshlrev_b32_e32 v104, 2, v0
	ds_load_b32 v104, v104 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v104, s80, v104
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v104, s67, v104
.LBB21_228:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr105
	s_and_saveexec_b32 s2, s44
	s_cbranch_execz .LBB21_230
; %bb.229:
	v_lshlrev_b32_e32 v105, 2, v0
	ds_load_b32 v105, v105 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v105, s80, v105
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v105, s67, v105
.LBB21_230:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr106
	s_and_saveexec_b32 s2, s45
	s_cbranch_execz .LBB21_232
; %bb.231:
	v_lshlrev_b32_e32 v106, 2, v0
	ds_load_b32 v106, v106 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v106, s80, v106
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v106, s67, v106
.LBB21_232:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr107
	s_and_saveexec_b32 s2, s46
	s_cbranch_execz .LBB21_234
; %bb.233:
	v_lshlrev_b32_e32 v107, 2, v0
	ds_load_b32 v107, v107 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v107, s80, v107
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v107, s67, v107
.LBB21_234:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr108
	s_and_saveexec_b32 s2, s47
	s_cbranch_execz .LBB21_236
; %bb.235:
	v_lshlrev_b32_e32 v108, 2, v0
	ds_load_b32 v108, v108 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v108, s80, v108
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v108, s67, v108
.LBB21_236:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr109
	s_and_saveexec_b32 s2, s48
	s_cbranch_execz .LBB21_238
; %bb.237:
	v_lshlrev_b32_e32 v109, 2, v0
	ds_load_b32 v109, v109 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v109, s80, v109
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v109, s67, v109
.LBB21_238:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr110
	s_and_saveexec_b32 s2, s49
	s_cbranch_execz .LBB21_240
; %bb.239:
	v_lshlrev_b32_e32 v110, 2, v0
	ds_load_b32 v110, v110 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v110, s80, v110
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v110, s67, v110
.LBB21_240:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr111
	s_and_saveexec_b32 s2, s50
	s_cbranch_execz .LBB21_242
; %bb.241:
	v_lshlrev_b32_e32 v111, 2, v0
	ds_load_b32 v111, v111 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v111, s80, v111
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v111, s67, v111
.LBB21_242:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr112
	s_and_saveexec_b32 s2, s51
	s_cbranch_execz .LBB21_244
; %bb.243:
	v_lshlrev_b32_e32 v112, 2, v0
	ds_load_b32 v112, v112 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v112, s80, v112
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v112, s67, v112
.LBB21_244:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr113
	s_and_saveexec_b32 s2, s52
	s_cbranch_execz .LBB21_246
; %bb.245:
	v_lshlrev_b32_e32 v113, 2, v0
	ds_load_b32 v113, v113 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v113, s80, v113
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v113, s67, v113
.LBB21_246:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr114
	s_and_saveexec_b32 s2, s53
	s_cbranch_execz .LBB21_248
; %bb.247:
	v_lshlrev_b32_e32 v114, 2, v0
	ds_load_b32 v114, v114 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v114, s80, v114
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v114, s67, v114
.LBB21_248:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr115
	s_and_saveexec_b32 s2, s54
	s_cbranch_execz .LBB21_250
; %bb.249:
	v_lshlrev_b32_e32 v115, 2, v0
	ds_load_b32 v115, v115 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v115, s80, v115
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v115, s67, v115
.LBB21_250:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr116
	s_and_saveexec_b32 s2, s55
	s_cbranch_execz .LBB21_252
; %bb.251:
	v_lshlrev_b32_e32 v116, 2, v0
	ds_load_b32 v116, v116 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v116, s80, v116
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v116, s67, v116
.LBB21_252:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr117
	s_and_saveexec_b32 s2, s56
	s_cbranch_execz .LBB21_254
; %bb.253:
	v_lshlrev_b32_e32 v117, 2, v0
	ds_load_b32 v117, v117 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v117, s80, v117
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v117, s67, v117
.LBB21_254:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr118
	s_and_saveexec_b32 s2, s57
	s_cbranch_execz .LBB21_256
; %bb.255:
	v_lshlrev_b32_e32 v118, 2, v0
	ds_load_b32 v118, v118 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v118, s80, v118
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v118, s67, v118
.LBB21_256:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr119
	s_and_saveexec_b32 s2, s58
	s_cbranch_execz .LBB21_258
; %bb.257:
	v_lshlrev_b32_e32 v119, 2, v0
	ds_load_b32 v119, v119 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v119, s80, v119
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v119, s67, v119
.LBB21_258:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr120
	s_and_saveexec_b32 s2, s59
	s_cbranch_execz .LBB21_260
; %bb.259:
	v_lshlrev_b32_e32 v120, 2, v0
	ds_load_b32 v120, v120 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v120, s80, v120
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v120, s67, v120
.LBB21_260:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr121
	s_and_saveexec_b32 s2, s60
	s_cbranch_execz .LBB21_262
; %bb.261:
	v_lshlrev_b32_e32 v121, 2, v0
	ds_load_b32 v121, v121 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v121, s80, v121
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v121, s67, v121
.LBB21_262:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr122
	s_and_saveexec_b32 s2, s61
	s_cbranch_execz .LBB21_264
; %bb.263:
	v_lshlrev_b32_e32 v122, 2, v0
	ds_load_b32 v122, v122 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v122, s80, v122
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v122, s67, v122
.LBB21_264:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr123
	s_and_saveexec_b32 s2, s62
	s_cbranch_execz .LBB21_266
; %bb.265:
	v_lshlrev_b32_e32 v123, 2, v0
	ds_load_b32 v123, v123 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v123, s80, v123
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v123, s67, v123
.LBB21_266:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr124
	s_and_saveexec_b32 s2, s63
	s_cbranch_execz .LBB21_268
; %bb.267:
	v_lshlrev_b32_e32 v124, 2, v0
	ds_load_b32 v124, v124 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v124, s80, v124
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v124, s67, v124
.LBB21_268:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr125
	s_and_saveexec_b32 s2, s64
	s_cbranch_execz .LBB21_270
; %bb.269:
	v_lshlrev_b32_e32 v125, 2, v0
	ds_load_b32 v125, v125 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v125, s80, v125
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v125, s67, v125
.LBB21_270:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr126
	s_and_saveexec_b32 s2, s65
	s_cbranch_execz .LBB21_272
; %bb.271:
	v_lshlrev_b32_e32 v126, 2, v0
	ds_load_b32 v126, v126 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v126, s80, v126
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v126, s67, v126
.LBB21_272:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b8 v9, v67 offset:64
	ds_store_b8 v10, v68 offset:64
	ds_store_b8 v11, v69 offset:64
	ds_store_b8 v12, v70 offset:64
	ds_store_b8 v13, v71 offset:64
	ds_store_b8 v14, v72 offset:64
	ds_store_b8 v15, v73 offset:64
	ds_store_b8 v16, v74 offset:64
	ds_store_b8 v17, v75 offset:64
	ds_store_b8 v18, v76 offset:64
	ds_store_b8 v19, v77 offset:64
	ds_store_b8 v20, v78 offset:64
	ds_store_b8 v21, v79 offset:64
	ds_store_b8 v22, v80 offset:64
	ds_store_b8 v23, v81 offset:64
	ds_store_b8 v24, v82 offset:64
	ds_store_b8 v25, v83 offset:64
	ds_store_b8 v26, v84 offset:64
	ds_store_b8 v27, v85 offset:64
	ds_store_b8 v28, v86 offset:64
	ds_store_b8 v29, v87 offset:64
	ds_store_b8 v30, v88 offset:64
	ds_store_b8 v31, v89 offset:64
	ds_store_b8 v33, v90 offset:64
	ds_store_b8 v34, v91 offset:64
	ds_store_b8 v35, v92 offset:64
	ds_store_b8 v36, v93 offset:64
	ds_store_b8 v37, v94 offset:64
	ds_store_b8 v38, v95 offset:64
	ds_store_b8 v39, v96 offset:64
	ds_store_b8 v40, v97 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s2, s35
	s_cbranch_execz .LBB21_274
; %bb.273:
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	ds_load_u8 v9, v0 offset:64
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v9, s[74:75]
.LBB21_274:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s36
	s_cbranch_execz .LBB21_276
; %bb.275:
	v_lshlrev_b32_e32 v1, 2, v2
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:576
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v3
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_276:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s37
	s_cbranch_execz .LBB21_278
; %bb.277:
	v_lshlrev_b32_e32 v1, 2, v98
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:1088
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v4
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_278:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s38
	s_cbranch_execz .LBB21_280
; %bb.279:
	v_lshlrev_b32_e32 v1, 2, v99
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:1600
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v5
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_280:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s39
	s_cbranch_execz .LBB21_282
; %bb.281:
	v_lshlrev_b32_e32 v1, 2, v100
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:2112
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v6
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_282:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s40
	s_cbranch_execz .LBB21_284
; %bb.283:
	v_lshlrev_b32_e32 v1, 2, v101
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:2624
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v41
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_284:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s41
	s_cbranch_execz .LBB21_286
; %bb.285:
	v_lshlrev_b32_e32 v1, 2, v102
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:3136
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v42
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_286:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s42
	s_cbranch_execz .LBB21_288
; %bb.287:
	v_lshlrev_b32_e32 v1, 2, v103
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:3648
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v43
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_288:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s43
	s_cbranch_execz .LBB21_290
; %bb.289:
	v_lshlrev_b32_e32 v1, 2, v104
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:4160
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v44
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_290:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s44
	s_cbranch_execz .LBB21_292
; %bb.291:
	v_lshlrev_b32_e32 v1, 2, v105
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:4672
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v45
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_292:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s45
	s_cbranch_execz .LBB21_294
; %bb.293:
	v_lshlrev_b32_e32 v1, 2, v106
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:5184
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v46
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_294:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s46
	s_cbranch_execz .LBB21_296
; %bb.295:
	v_lshlrev_b32_e32 v1, 2, v107
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:5696
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v47
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_296:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s47
	s_cbranch_execz .LBB21_298
; %bb.297:
	v_lshlrev_b32_e32 v1, 2, v108
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:6208
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v48
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_298:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s48
	s_cbranch_execz .LBB21_300
; %bb.299:
	v_lshlrev_b32_e32 v1, 2, v109
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:6720
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v49
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_300:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s49
	s_cbranch_execz .LBB21_302
; %bb.301:
	v_lshlrev_b32_e32 v1, 2, v110
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:7232
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v50
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_302:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s50
	s_cbranch_execz .LBB21_304
; %bb.303:
	v_lshlrev_b32_e32 v1, 2, v111
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:7744
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v51
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_304:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s51
	s_cbranch_execz .LBB21_306
; %bb.305:
	v_lshlrev_b32_e32 v1, 2, v112
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:8256
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v52
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_306:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s52
	s_cbranch_execz .LBB21_308
; %bb.307:
	v_lshlrev_b32_e32 v1, 2, v113
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:8768
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v53
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_308:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s53
	s_cbranch_execz .LBB21_310
; %bb.309:
	v_lshlrev_b32_e32 v1, 2, v114
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:9280
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v54
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_310:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s54
	s_cbranch_execz .LBB21_312
; %bb.311:
	v_lshlrev_b32_e32 v1, 2, v115
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:9792
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v55
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_312:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s55
	s_cbranch_execz .LBB21_314
; %bb.313:
	v_lshlrev_b32_e32 v1, 2, v116
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:10304
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v56
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_314:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s56
	s_cbranch_execz .LBB21_316
; %bb.315:
	v_lshlrev_b32_e32 v1, 2, v117
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:10816
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v57
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_316:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s57
	s_cbranch_execz .LBB21_318
; %bb.317:
	v_lshlrev_b32_e32 v1, 2, v118
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:11328
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v58
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_318:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s58
	s_cbranch_execz .LBB21_320
; %bb.319:
	v_lshlrev_b32_e32 v1, 2, v119
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:11840
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v59
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_320:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s59
	s_cbranch_execz .LBB21_322
; %bb.321:
	v_lshlrev_b32_e32 v1, 2, v120
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:12352
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v60
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_322:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s60
	s_cbranch_execz .LBB21_324
; %bb.323:
	v_lshlrev_b32_e32 v1, 2, v121
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:12864
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v61
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_324:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s61
	s_cbranch_execz .LBB21_326
; %bb.325:
	v_lshlrev_b32_e32 v1, 2, v122
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:13376
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v62
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_326:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s62
	s_cbranch_execz .LBB21_328
; %bb.327:
	v_lshlrev_b32_e32 v1, 2, v123
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:13888
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v63
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_328:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s63
	s_cbranch_execz .LBB21_330
; %bb.329:
	v_lshlrev_b32_e32 v1, 2, v124
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:14400
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v64
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_330:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s64
	s_cbranch_execz .LBB21_332
; %bb.331:
	v_lshlrev_b32_e32 v1, 2, v125
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:14912
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v65
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_332:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s65
	s_cbranch_execz .LBB21_334
; %bb.333:
	v_lshlrev_b32_e32 v1, 2, v126
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:15424
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v66
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB21_334:
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b32 s2, s[0:1], 0x50
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s2
	s_mov_b32 s2, 0
	s_cselect_b32 s3, -1, 0
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s3
	s_xor_b32 s3, exec_lo, s4
; %bb.335:
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v7, v8
	s_mov_b32 s7, exec_lo
; %bb.336:                              ; %Flow103
	s_or_b32 exec_lo, exec_lo, s3
	s_branch .LBB21_338
.LBB21_337:
	s_mov_b32 s2, -1
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
.LBB21_338:                             ; %Flow102
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB21_367
; %bb.339:
	s_mov_b32 s85, 0
	v_lshlrev_b32_e32 v21, 2, v32
	s_lshl_b64 s[2:3], s[84:85], 2
	v_mov_b32_e32 v33, 0
	s_add_u32 s2, s68, s2
	s_addc_u32 s3, s69, s3
	v_or_b32_e32 v34, 0xfffffe00, v0
	s_clause 0x7
	global_load_b128 v[1:4], v21, s[2:3] offset:48
	global_load_b128 v[9:12], v21, s[2:3] offset:32
	global_load_b128 v[17:20], v21, s[2:3] offset:16
	global_load_b128 v[25:28], v21, s[2:3]
	global_load_b96 v[29:31], v21, s[2:3] offset:112
	global_load_b128 v[5:8], v21, s[2:3] offset:96
	global_load_b128 v[13:16], v21, s[2:3] offset:80
	global_load_b128 v[21:24], v21, s[2:3] offset:64
	v_lshlrev_b32_e32 v35, 2, v0
.LBB21_340:                             ; %.lr.ph.i.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v34, 0x200, v34
	ds_store_b32 v35, v33
	v_add_nc_u32_e32 v35, 0x800, v35
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v34
	s_or_b32 s85, vcc_lo, s85
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s85
	s_cbranch_execnz .LBB21_340
; %bb.341:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s85
	s_waitcnt vmcnt(4)
	v_lshrrev_b32_e32 v33, s80, v25
	s_lshl_b32 s2, -1, s81
	v_lshrrev_b32_e32 v38, s80, v27
	s_not_b32 s8, s2
	s_mov_b32 s2, exec_lo
	v_and_b32_e32 v33, s8, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v34, 9, v33
	v_lshrrev_b32_e32 v33, 3, v33
	v_and_or_b32 v34, 0xe00, v34, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v34, 1, v34
	v_add_lshl_u32 v33, v34, v33, 1
	v_lshrrev_b32_e32 v34, s80, v26
	ds_load_u16 v35, v33
	v_and_b32_e32 v34, s8, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 9, v34
	v_lshrrev_b32_e32 v34, 3, v34
	v_and_or_b32 v36, 0xe00, v36, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 1, v36
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v37, v35, 1
	v_add_lshl_u32 v34, v36, v34, 1
	ds_store_b16 v33, v37
	ds_load_u16 v36, v34
	v_and_b32_e32 v37, s8, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 9, v37
	v_lshrrev_b32_e32 v37, 3, v37
	v_and_or_b32 v38, 0xe00, v38, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 1, v38
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v39, v36, 1
	v_add_lshl_u32 v43, v38, v37, 1
	v_lshrrev_b32_e32 v38, s80, v28
	ds_store_b16 v34, v39
	ds_load_u16 v37, v43
	v_and_b32_e32 v38, s8, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 9, v38
	v_lshrrev_b32_e32 v38, 3, v38
	v_and_or_b32 v39, 0xe00, v39, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 1, v39
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v40, v37, 1
	v_add_lshl_u32 v45, v39, v38, 1
	v_lshrrev_b32_e32 v39, s80, v17
	ds_store_b16 v43, v40
	ds_load_u16 v38, v45
	v_and_b32_e32 v39, s8, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 9, v39
	v_lshrrev_b32_e32 v39, 3, v39
	v_and_or_b32 v40, 0xe00, v40, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 1, v40
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v41, v38, 1
	v_add_lshl_u32 v47, v40, v39, 1
	v_lshrrev_b32_e32 v40, s80, v18
	ds_store_b16 v45, v41
	ds_load_u16 v39, v47
	v_and_b32_e32 v40, s8, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 9, v40
	v_lshrrev_b32_e32 v40, 3, v40
	v_and_or_b32 v41, 0xe00, v41, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 1, v41
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v42, v39, 1
	v_add_lshl_u32 v49, v41, v40, 1
	v_lshrrev_b32_e32 v41, s80, v19
	ds_store_b16 v47, v42
	ds_load_u16 v40, v49
	v_and_b32_e32 v41, s8, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 9, v41
	v_lshrrev_b32_e32 v41, 3, v41
	v_and_or_b32 v42, 0xe00, v42, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 1, v42
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v44, v40, 1
	v_add_lshl_u32 v51, v42, v41, 1
	v_lshrrev_b32_e32 v42, s80, v20
	ds_store_b16 v49, v44
	ds_load_u16 v41, v51
	v_and_b32_e32 v42, s8, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 9, v42
	v_lshrrev_b32_e32 v42, 3, v42
	v_and_or_b32 v44, 0xe00, v44, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 1, v44
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v46, v41, 1
	v_add_lshl_u32 v53, v44, v42, 1
	v_lshrrev_b32_e32 v44, s80, v9
	ds_store_b16 v51, v46
	ds_load_u16 v42, v53
	v_and_b32_e32 v44, s8, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 9, v44
	v_lshrrev_b32_e32 v44, 3, v44
	v_and_or_b32 v46, 0xe00, v46, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 1, v46
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v48, v42, 1
	v_add_lshl_u32 v55, v46, v44, 1
	v_lshrrev_b32_e32 v46, s80, v10
	ds_store_b16 v53, v48
	ds_load_u16 v44, v55
	v_and_b32_e32 v46, s8, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 9, v46
	v_lshrrev_b32_e32 v46, 3, v46
	v_and_or_b32 v48, 0xe00, v48, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 1, v48
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v50, v44, 1
	v_add_lshl_u32 v57, v48, v46, 1
	v_lshrrev_b32_e32 v48, s80, v11
	ds_store_b16 v55, v50
	ds_load_u16 v46, v57
	v_and_b32_e32 v48, s8, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 9, v48
	v_lshrrev_b32_e32 v48, 3, v48
	v_and_or_b32 v50, 0xe00, v50, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 1, v50
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v52, v46, 1
	v_add_lshl_u32 v59, v50, v48, 1
	v_lshrrev_b32_e32 v50, s80, v12
	ds_store_b16 v57, v52
	ds_load_u16 v48, v59
	v_and_b32_e32 v50, s8, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 9, v50
	v_lshrrev_b32_e32 v50, 3, v50
	v_and_or_b32 v52, 0xe00, v52, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 1, v52
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v54, v48, 1
	v_add_lshl_u32 v61, v52, v50, 1
	v_lshrrev_b32_e32 v52, s80, v1
	ds_store_b16 v59, v54
	ds_load_u16 v50, v61
	v_and_b32_e32 v52, s8, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 9, v52
	v_lshrrev_b32_e32 v52, 3, v52
	v_and_or_b32 v54, 0xe00, v54, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 1, v54
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v56, v50, 1
	v_add_lshl_u32 v63, v54, v52, 1
	v_lshrrev_b32_e32 v54, s80, v2
	ds_store_b16 v61, v56
	ds_load_u16 v52, v63
	v_and_b32_e32 v54, s8, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 9, v54
	v_lshrrev_b32_e32 v54, 3, v54
	v_and_or_b32 v56, 0xe00, v56, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 1, v56
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v58, v52, 1
	v_add_lshl_u32 v65, v56, v54, 1
	v_lshrrev_b32_e32 v56, s80, v3
	ds_store_b16 v63, v58
	ds_load_u16 v54, v65
	v_and_b32_e32 v56, s8, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 9, v56
	v_lshrrev_b32_e32 v56, 3, v56
	v_and_or_b32 v58, 0xe00, v58, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 1, v58
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v60, v54, 1
	v_add_lshl_u32 v67, v58, v56, 1
	v_lshrrev_b32_e32 v58, s80, v4
	ds_store_b16 v65, v60
	ds_load_u16 v56, v67
	v_and_b32_e32 v58, s8, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 9, v58
	v_lshrrev_b32_e32 v58, 3, v58
	v_and_or_b32 v60, 0xe00, v60, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 1, v60
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v62, v56, 1
	v_add_lshl_u32 v69, v60, v58, 1
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v60, s80, v21
	ds_store_b16 v67, v62
	ds_load_u16 v58, v69
	v_and_b32_e32 v60, s8, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 9, v60
	v_lshrrev_b32_e32 v60, 3, v60
	v_and_or_b32 v62, 0xe00, v62, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 1, v62
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v64, v58, 1
	v_add_lshl_u32 v71, v62, v60, 1
	v_lshrrev_b32_e32 v62, s80, v22
	ds_store_b16 v69, v64
	ds_load_u16 v60, v71
	v_and_b32_e32 v62, s8, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 9, v62
	v_lshrrev_b32_e32 v62, 3, v62
	v_and_or_b32 v64, 0xe00, v64, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 1, v64
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v66, v60, 1
	v_add_lshl_u32 v73, v64, v62, 1
	v_lshrrev_b32_e32 v64, s80, v23
	ds_store_b16 v71, v66
	ds_load_u16 v62, v73
	v_and_b32_e32 v64, s8, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 9, v64
	v_lshrrev_b32_e32 v64, 3, v64
	v_and_or_b32 v66, 0xe00, v66, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 1, v66
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v68, v62, 1
	v_add_lshl_u32 v75, v66, v64, 1
	v_lshrrev_b32_e32 v66, s80, v24
	ds_store_b16 v73, v68
	ds_load_u16 v64, v75
	v_and_b32_e32 v66, s8, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 9, v66
	v_lshrrev_b32_e32 v66, 3, v66
	v_and_or_b32 v68, 0xe00, v68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 1, v68
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v70, v64, 1
	v_add_lshl_u32 v77, v68, v66, 1
	v_lshrrev_b32_e32 v68, s80, v13
	ds_store_b16 v75, v70
	ds_load_u16 v66, v77
	v_and_b32_e32 v68, s8, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 9, v68
	v_lshrrev_b32_e32 v68, 3, v68
	v_and_or_b32 v70, 0xe00, v70, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 1, v70
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v72, v66, 1
	v_add_lshl_u32 v79, v70, v68, 1
	v_lshrrev_b32_e32 v70, s80, v14
	ds_store_b16 v77, v72
	ds_load_u16 v68, v79
	v_and_b32_e32 v70, s8, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 9, v70
	v_lshrrev_b32_e32 v70, 3, v70
	v_and_or_b32 v72, 0xe00, v72, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 1, v72
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v74, v68, 1
	v_add_lshl_u32 v81, v72, v70, 1
	v_lshrrev_b32_e32 v72, s80, v15
	ds_store_b16 v79, v74
	ds_load_u16 v70, v81
	v_and_b32_e32 v72, s8, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 9, v72
	v_lshrrev_b32_e32 v72, 3, v72
	v_and_or_b32 v74, 0xe00, v74, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 1, v74
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v76, v70, 1
	v_add_lshl_u32 v83, v74, v72, 1
	v_lshrrev_b32_e32 v74, s80, v16
	ds_store_b16 v81, v76
	ds_load_u16 v72, v83
	v_and_b32_e32 v74, s8, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 9, v74
	v_lshrrev_b32_e32 v74, 3, v74
	v_and_or_b32 v76, 0xe00, v76, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 1, v76
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v78, v72, 1
	v_add_lshl_u32 v85, v76, v74, 1
	v_lshrrev_b32_e32 v76, s80, v5
	ds_store_b16 v83, v78
	ds_load_u16 v74, v85
	v_and_b32_e32 v76, s8, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 9, v76
	v_lshrrev_b32_e32 v76, 3, v76
	v_and_or_b32 v78, 0xe00, v78, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 1, v78
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v80, v74, 1
	v_add_lshl_u32 v87, v78, v76, 1
	v_lshrrev_b32_e32 v78, s80, v6
	ds_store_b16 v85, v80
	ds_load_u16 v76, v87
	v_and_b32_e32 v78, s8, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 9, v78
	v_lshrrev_b32_e32 v78, 3, v78
	v_and_or_b32 v80, 0xe00, v80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 1, v80
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v82, v76, 1
	v_add_lshl_u32 v89, v80, v78, 1
	v_lshrrev_b32_e32 v80, s80, v7
	ds_store_b16 v87, v82
	ds_load_u16 v78, v89
	v_and_b32_e32 v80, s8, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 9, v80
	v_lshrrev_b32_e32 v80, 3, v80
	v_and_or_b32 v82, 0xe00, v82, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 1, v82
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v84, v78, 1
	v_add_lshl_u32 v90, v82, v80, 1
	v_lshrrev_b32_e32 v82, s80, v8
	ds_store_b16 v89, v84
	ds_load_u16 v80, v90
	v_and_b32_e32 v82, s8, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 9, v82
	v_lshrrev_b32_e32 v82, 3, v82
	v_and_or_b32 v84, 0xe00, v84, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 1, v84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v86, v80, 1
	v_add_lshl_u32 v91, v84, v82, 1
	v_lshrrev_b32_e32 v84, s80, v29
	ds_store_b16 v90, v86
	ds_load_u16 v82, v91
	v_and_b32_e32 v84, s8, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 9, v84
	v_lshrrev_b32_e32 v84, 3, v84
	v_and_or_b32 v86, 0xe00, v86, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 1, v86
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v88, v82, 1
	v_add_lshl_u32 v92, v86, v84, 1
	v_lshrrev_b32_e32 v86, s80, v30
	ds_store_b16 v91, v88
	ds_load_u16 v84, v92
	v_and_b32_e32 v86, s8, v86
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 9, v86
	v_lshrrev_b32_e32 v86, 3, v86
	v_and_or_b32 v88, 0xe00, v88, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 1, v88
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v94, v84, 1
	v_add_lshl_u32 v93, v88, v86, 1
	v_lshrrev_b32_e32 v88, s80, v31
	ds_store_b16 v92, v94
	ds_load_u16 v86, v93
	v_and_b32_e32 v88, s8, v88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 9, v88
	v_lshrrev_b32_e32 v88, 3, v88
	v_and_or_b32 v94, 0xe00, v94, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 1, v94
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v86, 1
	v_add_lshl_u32 v94, v94, v88, 1
	ds_store_b16 v93, v95
	ds_load_u16 v88, v94
	v_lshlrev_b32_e32 v95, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v88, 1
	ds_store_b16 v94, v96
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[96:99], v95 offset1:1
	ds_load_2addr_b64 v[100:103], v95 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v96, v97, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v96, v96, v98, v99
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v97, v96, v100, v101
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_or_b32_e32 v100, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v97, v97, v102, v103
	v_and_b32_e32 v98, 15, v96
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v99, v97 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s3, 0, v98
	v_cmp_lt_u32_e64 s4, 1, v98
	v_cmp_lt_u32_e64 s5, 3, v98
	v_cmp_lt_u32_e64 s6, 7, v98
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, v99, 0, s3
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v99, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v97, v97, v99
	v_mov_b32_dpp v99, v97 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, 0, v99, s5
	v_add_nc_u32_e32 v97, v97, v99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v98, 0, v99, s6
	v_bfe_i32 v99, v96, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v97, v97, v98
	ds_swizzle_b32 v98, v97 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v98, v99, v98
	v_lshrrev_b32_e32 v99, 5, v0
	v_add_nc_u32_e32 v97, v97, v98
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v99
	v_cmpx_eq_u32_e64 v100, v0
	s_cbranch_execz .LBB21_343
; %bb.342:
	ds_store_b32 v98, v97 offset:16384
.LBB21_343:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_lt_u32_e64 s2, 15, v0
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s9, vcc_lo
	s_cbranch_execz .LBB21_345
; %bb.344:
	v_mad_i32_i24 v99, 0xffffffe4, v0, v95
	ds_load_b32 v100, v99 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v101, v100 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, v101, 0, s3
	v_add_nc_u32_e32 v100, v101, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	v_mov_b32_dpp v101, v100 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, 0, v101, s5
	v_add_nc_u32_e32 v100, v100, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	ds_store_b32 v99, v100 offset:16384
.LBB21_345:                             ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s9
	v_dual_mov_b32 v100, 0 :: v_dual_mov_b32 v99, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB21_347
; %bb.346:
	ds_load_b32 v99, v98 offset:16380
.LBB21_347:                             ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjhjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEEPjNSA_IhEEPhEEvT0_T1_T2_T3_SC_SC_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESG_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v98, -1, v96
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s3, 0, v98
	v_cndmask_b32_e64 v98, v98, v96, s3
	v_cmp_eq_u32_e64 s3, 0, v96
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v98
	ds_bpermute_b32 v97, v98, v97
	ds_load_b32 v98, v100 offset:16444
	ds_load_2addr_b64 v[100:103], v95 offset1:1
	ds_load_b32 v104, v95 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v96, v97, v99, s3
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v96, v98, 16, v96
	ds_load_b64 v[98:99], v95 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v97, v96, v100
	v_add_nc_u32_e32 v100, v101, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v102, v100
	v_add_nc_u32_e32 v102, v103, v101
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v103, v98, v102
	v_add_nc_u32_e32 v98, v99, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v99, v104, v98
	ds_store_2addr_b64 v95, v[96:97], v[100:101] offset1:1
	ds_store_2addr_b64 v95, v[102:103], v[98:99] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v108, v33
	ds_load_u16 v107, v34
	ds_load_u16 v106, v43
	ds_load_u16 v105, v45
	ds_load_u16 v104, v47
	ds_load_u16 v103, v49
	ds_load_u16 v102, v51
	ds_load_u16 v101, v53
	ds_load_u16 v100, v55
	ds_load_u16 v99, v57
	ds_load_u16 v43, v59
	ds_load_u16 v45, v61
	ds_load_u16 v98, v63
	ds_load_u16 v97, v65
	ds_load_u16 v49, v67
	ds_load_u16 v47, v69
	ds_load_u16 v96, v71
	ds_load_u16 v95, v73
	ds_load_u16 v75, v75
	ds_load_u16 v51, v77
	ds_load_u16 v53, v79
	ds_load_u16 v55, v81
	ds_load_u16 v73, v83
	ds_load_u16 v71, v85
	ds_load_u16 v59, v87
	ds_load_u16 v57, v89
	ds_load_u16 v69, v90
	ds_load_u16 v67, v91
	ds_load_u16 v65, v92
	ds_load_u16 v61, v93
	ds_load_u16 v63, v94
                                        ; implicit-def: $vgpr33
                                        ; implicit-def: $vgpr34
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB21_351
; %bb.348:
	v_lshrrev_b32_e32 v33, 3, v0
	v_lshlrev_b32_e32 v34, 10, v0
	v_add_nc_u32_e32 v77, 1, v0
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v33, 0x1c00, v34, v33
	v_dual_mov_b32 v34, 0x3e00 :: v_dual_lshlrev_b32 v33, 1, v33
	ds_load_u16 v33, v33
	v_cmpx_ne_u32_e32 16, v77
	s_cbranch_execz .LBB21_350
; %bb.349:
	v_lshlrev_b32_e32 v34, 10, v77
	v_lshrrev_b32_e32 v77, 3, v77
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v34, 0x1c00, v34, v77
	v_lshlrev_b32_e32 v34, 1, v34
	ds_load_u16 v34, v34
.LBB21_350:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v33, 0xffff, v33
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v34, v34, v33
.LBB21_351:                             ; %Flow99
	s_or_b32 exec_lo, exec_lo, s4
	v_and_b32_e32 v35, 0xffff, v35
	v_and_b32_e32 v77, 0xffff, v78
	v_and_b32_e32 v78, 0xffff, v80
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v80, 0xffff, v108
	v_and_b32_e32 v37, 0xffff, v37
	v_and_b32_e32 v38, 0xffff, v38
	v_and_b32_e32 v39, 0xffff, v39
	v_and_b32_e32 v79, 0xffff, v82
	v_add_nc_u32_e32 v35, v80, v35
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v80, 0xffff, v106
	v_and_b32_e32 v82, 0xffff, v86
	s_waitcnt lgkmcnt(27)
	v_and_b32_e32 v85, 0xffff, v105
	s_waitcnt lgkmcnt(26)
	v_and_b32_e32 v86, 0xffff, v104
	v_and_b32_e32 v41, 0xffff, v41
	v_add_nc_u32_e32 v37, v80, v37
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v80, 0xffff, v102
	v_and_b32_e32 v44, 0xffff, v44
	v_and_b32_e32 v46, 0xffff, v46
	v_add_nc_u32_e32 v38, v85, v38
	v_add_nc_u32_e32 v39, v86, v39
	s_waitcnt lgkmcnt(22)
	v_and_b32_e32 v85, 0xffff, v100
	s_waitcnt lgkmcnt(21)
	v_and_b32_e32 v86, 0xffff, v99
	v_and_b32_e32 v48, 0xffff, v48
	v_add_nc_u32_e32 v41, v80, v41
	s_waitcnt lgkmcnt(20)
	v_and_b32_e32 v80, 0xffff, v43
	v_and_b32_e32 v50, 0xffff, v50
	v_add_nc_u32_e32 v43, v85, v44
	v_add_nc_u32_e32 v44, v86, v46
	s_waitcnt lgkmcnt(19)
	v_and_b32_e32 v46, 0xffff, v45
	v_and_b32_e32 v52, 0xffff, v52
	v_add_nc_u32_e32 v45, v80, v48
	s_waitcnt lgkmcnt(18)
	v_and_b32_e32 v48, 0xffff, v98
	v_and_b32_e32 v54, 0xffff, v54
	v_and_b32_e32 v56, 0xffff, v56
	v_and_b32_e32 v58, 0xffff, v58
	s_waitcnt lgkmcnt(17)
	v_and_b32_e32 v80, 0xffff, v97
	s_waitcnt lgkmcnt(16)
	v_and_b32_e32 v49, 0xffff, v49
	v_add_nc_u32_e32 v46, v46, v50
	s_waitcnt lgkmcnt(15)
	v_and_b32_e32 v50, 0xffff, v47
	v_and_b32_e32 v60, 0xffff, v60
	v_add_nc_u32_e32 v47, v48, v52
	s_waitcnt lgkmcnt(14)
	v_and_b32_e32 v52, 0xffff, v96
	v_and_b32_e32 v62, 0xffff, v62
	v_and_b32_e32 v64, 0xffff, v64
	v_and_b32_e32 v66, 0xffff, v66
	v_add_nc_u32_e32 v48, v80, v54
	v_add_nc_u32_e32 v49, v49, v56
	v_add_nc_u32_e32 v50, v50, v58
	s_waitcnt lgkmcnt(13)
	v_and_b32_e32 v54, 0xffff, v95
	s_waitcnt lgkmcnt(12)
	v_and_b32_e32 v56, 0xffff, v75
	s_waitcnt lgkmcnt(11)
	v_and_b32_e32 v58, 0xffff, v51
	v_and_b32_e32 v36, 0xffff, v36
	v_and_b32_e32 v81, 0xffff, v84
	v_and_b32_e32 v84, 0xffff, v107
	v_and_b32_e32 v68, 0xffff, v68
	v_add_nc_u32_e32 v51, v52, v60
	s_waitcnt lgkmcnt(10)
	v_and_b32_e32 v60, 0xffff, v53
	v_add_nc_u32_e32 v52, v54, v62
	v_add_nc_u32_e32 v53, v56, v64
	v_add_nc_u32_e32 v54, v58, v66
	s_waitcnt lgkmcnt(4)
	v_and_b32_e32 v64, 0xffff, v69
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v66, 0xffff, v61
	v_and_b32_e32 v40, 0xffff, v40
	v_add_nc_u32_e32 v36, v84, v36
	v_and_b32_e32 v84, 0xffff, v103
	v_and_b32_e32 v72, 0xffff, v72
	v_and_b32_e32 v74, 0xffff, v74
	v_and_b32_e32 v56, 0xffff, v55
	v_add_nc_u32_e32 v55, v60, v68
	v_and_b32_e32 v58, 0xffff, v73
	v_and_b32_e32 v60, 0xffff, v71
	v_and_b32_e32 v62, 0xffff, v57
	v_add_nc_u32_e32 v61, v64, v78
	v_add_nc_u32_e32 v64, v66, v82
	v_lshlrev_b32_e32 v66, 2, v35
	v_and_b32_e32 v42, 0xffff, v42
	v_add_nc_u32_e32 v40, v84, v40
	v_and_b32_e32 v84, 0xffff, v101
	v_and_b32_e32 v83, 0xffff, v88
	v_add_nc_u32_e32 v57, v58, v72
	v_add_nc_u32_e32 v58, v60, v74
	v_add_nc_u32_e32 v60, v62, v77
	v_and_b32_e32 v62, 0xffff, v67
	v_and_b32_e32 v65, 0xffff, v65
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v67, 0xffff, v63
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v66, v25 offset:64
	v_lshlrev_b32_e32 v25, 2, v36
	v_add_nc_u32_e32 v42, v84, v42
	v_lshlrev_b32_e32 v66, 2, v37
	v_add_nc_u32_e32 v63, v65, v81
	v_add_nc_u32_e32 v65, v67, v83
	v_lshlrev_b32_e32 v67, 2, v38
	v_lshlrev_b32_e32 v68, 2, v39
	v_lshlrev_b32_e32 v69, 2, v40
	ds_store_b32 v25, v26 offset:64
	ds_store_b32 v66, v27 offset:64
	ds_store_b32 v67, v28 offset:64
	ds_store_b32 v68, v17 offset:64
	ds_store_b32 v69, v18 offset:64
	v_lshlrev_b32_e32 v17, 2, v41
	v_lshlrev_b32_e32 v18, 2, v42
	v_lshlrev_b32_e32 v25, 2, v43
	v_lshlrev_b32_e32 v26, 2, v44
	v_lshlrev_b32_e32 v27, 2, v45
	v_and_b32_e32 v70, 0xffff, v70
	ds_store_b32 v17, v19 offset:64
	ds_store_b32 v18, v20 offset:64
	ds_store_b32 v25, v9 offset:64
	ds_store_b32 v26, v10 offset:64
	ds_store_b32 v27, v11 offset:64
	v_lshlrev_b32_e32 v9, 2, v46
	v_lshlrev_b32_e32 v10, 2, v47
	v_lshlrev_b32_e32 v11, 2, v48
	v_and_b32_e32 v76, 0xffff, v76
	v_and_b32_e32 v59, 0xffff, v59
	v_lshlrev_b32_e32 v17, 2, v49
	v_lshlrev_b32_e32 v18, 2, v50
	v_add_nc_u32_e32 v56, v56, v70
	ds_store_b32 v9, v12 offset:64
	ds_store_b32 v10, v1 offset:64
	ds_store_b32 v11, v2 offset:64
	ds_store_b32 v17, v3 offset:64
	ds_store_b32 v18, v4 offset:64
	v_lshlrev_b32_e32 v1, 2, v51
	v_lshlrev_b32_e32 v2, 2, v52
	v_lshlrev_b32_e32 v3, 2, v53
	v_add_nc_u32_e32 v59, v59, v76
	v_lshlrev_b32_e32 v4, 2, v54
	v_lshlrev_b32_e32 v9, 2, v55
	ds_store_b32 v1, v21 offset:64
	ds_store_b32 v2, v22 offset:64
	ds_store_b32 v3, v23 offset:64
	ds_store_b32 v4, v24 offset:64
	ds_store_b32 v9, v13 offset:64
	v_lshlrev_b32_e32 v1, 2, v56
	v_add_nc_u32_e32 v62, v62, v79
	v_lshlrev_b32_e32 v2, 2, v57
	v_lshlrev_b32_e32 v3, 2, v58
	v_lshlrev_b32_e32 v4, 2, v59
	v_lshlrev_b32_e32 v9, 2, v60
	ds_store_b32 v1, v14 offset:64
	ds_store_b32 v2, v15 offset:64
	ds_store_b32 v3, v16 offset:64
	ds_store_b32 v4, v5 offset:64
	ds_store_b32 v9, v6 offset:64
	v_lshlrev_b32_e32 v1, 2, v61
	v_lshlrev_b32_e32 v2, 2, v62
	v_lshlrev_b32_e32 v3, 2, v63
	v_lshlrev_b32_e32 v4, 2, v64
	v_lshlrev_b32_e32 v5, 2, v65
	ds_store_b32 v1, v7 offset:64
	ds_store_b32 v2, v8 offset:64
	ds_store_b32 v3, v29 offset:64
	ds_store_b32 v4, v30 offset:64
	ds_store_b32 v5, v31 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s3
; %bb.352:                              ; %_ZN7rocprim16block_radix_rankILj512ELj4ELNS_26block_radix_rank_algorithmE0ELj1ELj1EE9rank_keysIjLj31EZNS_6detail25onesweep_iteration_helperIjhjLj512ELj31ELj4ELb0ELS1_0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEEPjNSA_IhEEPhEEvT0_T1_T2_T3_SC_SC_PNS4_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS4_11raw_storageINS4_16block_radix_rankILj512ELj4ELb0ELj1ELj1EE13storage_type_EEESG_RA1_jS13_.exit._crit_edge.i.i
	v_mov_b32_e32 v1, 0
; %bb.353:                              ; %Flow96
	s_and_not1_saveexec_b32 s3, s2
	s_cbranch_execz .LBB21_364
; %bb.354:
	v_lshl_or_b32 v3, s15, 4, v0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v7, 0
	s_mov_b32 s4, 0
	s_mov_b32 s5, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v34
	v_add_co_u32 v1, s2, s86, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s2, s87, v2, s2
                                        ; implicit-def: $sgpr2
	global_store_b32 v[1:2], v3, off
.LBB21_355:                             ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB21_358 Depth 2
	s_or_b32 s2, s2, exec_lo
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB21_361
; %bb.356:                              ;   in Loop: Header=BB21_355 Depth=1
	s_add_i32 s5, s5, -1
	s_mov_b32 s6, exec_lo
	v_lshl_or_b32 v3, s5, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s2, s86, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s2, s87, v6, s2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB21_360
; %bb.357:                              ; %.lr.ph.i.i.preheader
                                        ;   in Loop: Header=BB21_355 Depth=1
	s_mov_b32 s9, 0
.LBB21_358:                             ; %.lr.ph.i.i
                                        ;   Parent Loop BB21_355 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s2, 0, v3
	s_or_b32 s9, s2, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB21_358
; %bb.359:                              ; %Flow93
                                        ;   in Loop: Header=BB21_355 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
.LBB21_360:                             ; %Flow94
                                        ;   in Loop: Header=BB21_355 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s6
	v_and_b32_e32 v5, 0x3fffffff, v8
	v_cmp_eq_u32_e64 s2, 0x80000000, v3
	v_add_nc_u32_e32 v7, v5, v7
	s_branch .LBB21_362
.LBB21_361:                             ;   in Loop: Header=BB21_355 Depth=1
                                        ; implicit-def: $sgpr5
.LBB21_362:                             ; %Flow95
                                        ;   in Loop: Header=BB21_355 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s6, exec_lo, s2
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB21_355
; %bb.363:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v3, v7, v34
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v7, v33
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v2, v1
	ds_store_b32 v4, v2
.LBB21_364:                             ; %Flow97
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v75, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v23, 64, v2
	v_lshlrev_b32_e32 v2, 2, v0
	v_or_b32_e32 v116, 0x3000, v0
	v_or_b32_e32 v117, 0x3200, v0
	v_or_b32_e32 v118, 0x3400, v0
	ds_load_2addr_stride64_b32 v[8:9], v23 offset0:8 offset1:16
	ds_load_2addr_stride64_b32 v[14:15], v23 offset0:24 offset1:32
	ds_load_2addr_stride64_b32 v[26:27], v23 offset0:40 offset1:48
	ds_load_2addr_stride64_b32 v[66:67], v23 offset0:56 offset1:64
	ds_load_2addr_stride64_b32 v[68:69], v23 offset0:72 offset1:80
	ds_load_2addr_stride64_b32 v[70:71], v23 offset0:88 offset1:96
	ds_load_2addr_stride64_b32 v[72:73], v23 offset0:104 offset1:112
	ds_load_b32 v12, v2 offset:64
	s_waitcnt lgkmcnt(7)
	v_lshrrev_b32_e32 v3, s80, v8
	s_waitcnt lgkmcnt(6)
	v_lshrrev_b32_e32 v4, s80, v14
	s_waitcnt lgkmcnt(5)
	v_lshrrev_b32_e32 v5, s80, v26
	s_waitcnt lgkmcnt(4)
	v_lshrrev_b32_e32 v6, s80, v66
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v7, s80, v68
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v10, s80, v70
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v11, s80, v72
	v_and_b32_e32 v2, s8, v5
	v_and_b32_e32 v3, s8, v3
	v_and_b32_e32 v4, s8, v4
	v_and_b32_e32 v5, s8, v6
	v_and_b32_e32 v6, s8, v7
	v_lshlrev_b32_e32 v18, 2, v2
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v2, s80, v12
	v_and_b32_e32 v7, s8, v10
	v_and_b32_e32 v10, s8, v11
	v_lshlrev_b32_e32 v22, 2, v3
	v_lshlrev_b32_e32 v20, 2, v4
	v_and_b32_e32 v2, s8, v2
	v_lshrrev_b32_e32 v4, s80, v9
	v_lshlrev_b32_e32 v17, 2, v5
	v_lshlrev_b32_e32 v16, 2, v6
	v_lshlrev_b32_e32 v13, 2, v7
	v_lshlrev_b32_e32 v29, 2, v2
	v_lshlrev_b32_e32 v11, 2, v10
	ds_load_b32 v3, v22
	ds_load_b32 v7, v20
	ds_load_b32 v10, v18
	ds_load_b32 v84, v17
	ds_load_b32 v85, v16
	ds_load_b32 v86, v13
	ds_load_b32 v87, v11
	v_and_b32_e32 v4, s8, v4
	v_lshrrev_b32_e32 v5, s80, v15
	ds_load_b32 v74, v29
	v_lshrrev_b32_e32 v21, s80, v69
	v_lshrrev_b32_e32 v2, s80, v71
	v_lshlrev_b32_e32 v31, 2, v4
	v_lshrrev_b32_e32 v6, s80, v27
	v_lshrrev_b32_e32 v19, s80, v67
	v_lshrrev_b32_e32 v24, s80, v73
	v_and_b32_e32 v5, s8, v5
	ds_load_b32 v80, v31
	v_and_b32_e32 v21, s8, v21
	v_and_b32_e32 v2, s8, v2
	v_and_b32_e32 v6, s8, v6
	v_and_b32_e32 v19, s8, v19
	v_and_b32_e32 v76, s8, v24
	v_lshlrev_b32_e32 v30, 2, v5
	v_lshlrev_b32_e32 v24, 2, v21
	v_lshlrev_b32_e32 v21, 2, v2
	v_or_b32_e32 v2, 0x200, v0
	v_lshlrev_b32_e32 v28, 2, v6
	v_lshlrev_b32_e32 v25, 2, v19
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v74, v74, v0
	v_lshlrev_b32_e32 v19, 2, v76
	ds_load_b32 v82, v30
	ds_load_b32 v88, v28
	ds_load_b32 v89, v25
	ds_load_b32 v90, v24
	ds_load_b32 v91, v21
	ds_load_b32 v92, v19
	v_or_b32_e32 v4, 0x600, v0
	v_or_b32_e32 v5, 0x800, v0
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	v_add_nc_u32_e32 v74, v3, v2
	v_or_b32_e32 v3, 0x400, v0
	v_or_b32_e32 v6, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[78:79], 2, v[74:75]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v74, v80, v3
	v_add_co_u32 v76, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	v_add_nc_u32_e32 v74, v7, v4
	v_add_co_u32 v78, s2, s70, v78
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v79, s2, s71, v79, s2
	global_store_b32 v[76:77], v12, off
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v74, v82, v5
	global_store_b32 v[78:79], v8, off
	v_add_co_u32 v78, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v79, s2, s71, v81, s2
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	v_or_b32_e32 v7, 0xc00, v0
	v_add_nc_u32_e32 v74, v10, v6
	v_add_co_u32 v76, s2, s70, v76
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	v_add_co_u32 v80, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[82:83], 2, v[74:75]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v74, v88, v7
	v_or_b32_e32 v8, 0xe00, v0
	v_add_co_ci_u32_e64 v81, s2, s71, v81, s2
	s_clause 0x2
	global_store_b32 v[78:79], v9, off
	global_store_b32 v[76:77], v14, off
	global_store_b32 v[80:81], v15, off
	v_lshlrev_b64 v[14:15], 2, v[74:75]
	v_add_nc_u32_e32 v74, v84, v8
	v_or_b32_e32 v9, 0x1000, v0
	v_add_co_u32 v76, s2, s70, v82
	v_or_b32_e32 v10, 0x1200, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[78:79], 2, v[74:75]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v74, v89, v9
	v_add_co_ci_u32_e64 v77, s2, s71, v83, s2
	v_add_co_u32 v14, s2, s70, v14
	v_add_co_ci_u32_e64 v15, s2, s71, v15, s2
	v_add_co_u32 v78, s2, s70, v78
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	v_add_nc_u32_e32 v74, v85, v10
	v_add_co_ci_u32_e64 v79, s2, s71, v79, s2
	s_clause 0x2
	global_store_b32 v[76:77], v26, off
	global_store_b32 v[14:15], v27, off
	global_store_b32 v[78:79], v66, off
	v_lshlrev_b64 v[26:27], 2, v[74:75]
	v_or_b32_e32 v12, 0x1400, v0
	v_add_co_u32 v76, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v77, s2, s71, v81, s2
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v74, v90, v12
	v_add_co_u32 v26, s2, s70, v26
	v_or_b32_e32 v14, 0x1600, v0
	v_add_co_ci_u32_e64 v27, s2, s71, v27, s2
	ds_load_2addr_stride64_b32 v[82:83], v23 offset0:120 offset1:128
	v_lshlrev_b64 v[78:79], 2, v[74:75]
	s_clause 0x1
	global_store_b32 v[76:77], v67, off
	global_store_b32 v[26:27], v68, off
	v_add_nc_u32_e32 v74, v86, v14
	ds_load_2addr_stride64_b32 v[67:68], v23 offset0:136 offset1:144
	v_or_b32_e32 v15, 0x1800, v0
	v_or_b32_e32 v26, 0x1a00, v0
	v_add_co_u32 v78, s2, s70, v78
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	v_add_co_ci_u32_e64 v79, s2, s71, v79, s2
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v74, v91, v15
	v_or_b32_e32 v27, 0x1c00, v0
	global_store_b32 v[78:79], v69, off
	v_add_co_u32 v78, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v79, s2, s71, v81, s2
	ds_load_2addr_stride64_b32 v[80:81], v23 offset0:152 offset1:160
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	v_add_nc_u32_e32 v74, v87, v26
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v66, s80, v82
	ds_load_2addr_stride64_b32 v[86:87], v23 offset0:168 offset1:176
	v_lshrrev_b32_e32 v69, s80, v83
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v90, s80, v67
	v_lshlrev_b64 v[84:85], 2, v[74:75]
	v_add_nc_u32_e32 v74, v92, v27
	v_and_b32_e32 v91, s8, v66
	v_and_b32_e32 v69, s8, v69
	v_or_b32_e32 v66, 0x1e00, v0
	v_add_co_u32 v76, s2, s70, v76
	v_lshlrev_b64 v[88:89], 2, v[74:75]
	v_and_b32_e32 v74, s8, v90
	v_lshlrev_b32_e32 v90, 2, v91
	v_lshlrev_b32_e32 v91, 2, v69
	v_lshrrev_b32_e32 v69, s80, v68
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	ds_load_b32 v94, v90
	ds_load_b32 v97, v91
	v_lshlrev_b32_e32 v92, 2, v74
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v74, s80, v80
	v_lshrrev_b32_e32 v93, s80, v81
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v95, s80, v86
	v_lshrrev_b32_e32 v96, s80, v87
	v_and_b32_e32 v69, s8, v69
	v_and_b32_e32 v74, s8, v74
	v_and_b32_e32 v93, s8, v93
	v_and_b32_e32 v95, s8, v95
	v_and_b32_e32 v96, s8, v96
	v_lshlrev_b32_e32 v98, 2, v69
	v_lshlrev_b32_e32 v99, 2, v74
	v_lshlrev_b32_e32 v93, 2, v93
	v_lshlrev_b32_e32 v95, 2, v95
	v_lshlrev_b32_e32 v96, 2, v96
	ds_load_b32 v100, v92
	ds_load_b32 v101, v98
	ds_load_b32 v102, v99
	ds_load_b32 v103, v93
	ds_load_b32 v104, v95
	ds_load_b32 v105, v96
	v_add_co_u32 v84, s2, s70, v84
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v74, v94, v66
	v_or_b32_e32 v94, 0x2000, v0
	v_add_co_ci_u32_e64 v85, s2, s71, v85, s2
	s_clause 0x2
	global_store_b32 v[78:79], v70, off
	global_store_b32 v[76:77], v71, off
	global_store_b32 v[84:85], v72, off
	v_lshlrev_b64 v[69:70], 2, v[74:75]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v74, v97, v94
	v_add_co_u32 v71, s2, s70, v88
	v_or_b32_e32 v88, 0x2200, v0
	v_add_co_ci_u32_e64 v72, s2, s71, v89, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	v_or_b32_e32 v89, 0x2400, v0
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v74, v100, v88
	v_add_co_u32 v69, s2, s70, v69
	v_add_co_ci_u32_e64 v70, s2, s71, v70, s2
	v_add_co_u32 v76, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[78:79], 2, v[74:75]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v74, v101, v89
	v_or_b32_e32 v97, 0x2600, v0
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	s_clause 0x2
	global_store_b32 v[71:72], v73, off
	global_store_b32 v[69:70], v82, off
	global_store_b32 v[76:77], v83, off
	v_lshlrev_b64 v[69:70], 2, v[74:75]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v74, v102, v97
	v_or_b32_e32 v100, 0x2800, v0
	v_add_co_u32 v71, s2, s70, v78
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v72, s2, s71, v79, s2
	ds_load_2addr_stride64_b32 v[78:79], v23 offset0:184 offset1:192
	ds_load_2addr_stride64_b32 v[82:83], v23 offset0:200 offset1:208
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v74, v103, v100
	v_add_co_u32 v69, s2, s70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v70, s2, s71, v70, s2
	v_add_co_u32 v76, s2, s70, v76
	global_store_b32 v[71:72], v67, off
	v_lshlrev_b64 v[71:72], 2, v[74:75]
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	s_clause 0x1
	global_store_b32 v[69:70], v68, off
	global_store_b32 v[76:77], v80, off
	v_add_co_u32 v69, s2, s70, v71
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v70, s2, s71, v72, s2
	ds_load_2addr_stride64_b32 v[71:72], v23 offset0:232 offset1:240
	v_or_b32_e32 v101, 0x2a00, v0
	ds_load_2addr_stride64_b32 v[67:68], v23 offset0:216 offset1:224
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v23, s80, v78
	v_lshrrev_b32_e32 v73, s80, v79
	v_or_b32_e32 v102, 0x2c00, v0
	v_add_nc_u32_e32 v74, v104, v101
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v80, s80, v82
	v_and_b32_e32 v23, s8, v23
	v_and_b32_e32 v73, s8, v73
	global_store_b32 v[69:70], v81, off
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	v_add_nc_u32_e32 v74, v105, v102
	v_lshlrev_b32_e32 v23, 2, v23
	v_lshlrev_b32_e32 v104, 2, v73
	v_lshrrev_b32_e32 v73, s80, v83
	v_or_b32_e32 v103, 0x2e00, v0
	v_lshlrev_b64 v[69:70], 2, v[74:75]
	v_and_b32_e32 v74, s8, v80
	ds_load_b32 v81, v23
	v_and_b32_e32 v73, s8, v73
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v84, s80, v71
	v_lshrrev_b32_e32 v85, s80, v72
	v_lshlrev_b32_e32 v105, 2, v74
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v74, s80, v67
	v_lshrrev_b32_e32 v80, s80, v68
	v_lshlrev_b32_e32 v106, 2, v73
	v_and_b32_e32 v73, s8, v84
	v_and_b32_e32 v84, s8, v85
	ds_load_b32 v85, v104
	v_and_b32_e32 v74, s8, v74
	v_and_b32_e32 v80, s8, v80
	v_lshlrev_b32_e32 v109, 2, v73
	v_lshlrev_b32_e32 v110, 2, v84
	v_add_co_u32 v76, s2, s70, v76
	v_lshlrev_b32_e32 v107, 2, v74
	v_lshlrev_b32_e32 v108, 2, v80
	ds_load_b32 v73, v105
	ds_load_b32 v111, v106
	ds_load_b32 v112, v107
	ds_load_b32 v113, v108
	ds_load_b32 v114, v109
	ds_load_b32 v115, v110
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v74, v81, v103
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	v_add_co_u32 v69, s2, s70, v69
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	v_add_co_ci_u32_e64 v70, s2, s71, v70, s2
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v74, v85, v116
	v_add_co_u32 v80, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v81, s2, s71, v81, s2
	v_lshlrev_b64 v[84:85], 2, v[74:75]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v74, v73, v117
	s_clause 0x2
	global_store_b32 v[76:77], v86, off
	global_store_b32 v[69:70], v87, off
	global_store_b32 v[80:81], v78, off
	v_or_b32_e32 v86, 0x3600, v0
	v_or_b32_e32 v87, 0x3800, v0
	v_lshlrev_b64 v[69:70], 2, v[74:75]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v74, v111, v118
	v_add_co_u32 v76, s2, s70, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v77, s2, s71, v85, s2
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v74, v112, v86
	v_add_co_u32 v69, s2, s70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v70, s2, s71, v70, s2
	v_add_co_u32 v80, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[84:85], 2, v[74:75]
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v74, v113, v87
	v_or_b32_e32 v111, 0x3a00, v0
	v_add_co_ci_u32_e64 v81, s2, s71, v81, s2
	s_clause 0x2
	global_store_b32 v[76:77], v79, off
	global_store_b32 v[69:70], v82, off
	global_store_b32 v[80:81], v83, off
	v_lshlrev_b64 v[69:70], 2, v[74:75]
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v74, v114, v111
	v_or_b32_e32 v82, 0x3c00, v0
	v_add_co_u32 v76, s2, s70, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v77, s2, s71, v85, s2
	v_lshlrev_b64 v[78:79], 2, v[74:75]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v74, v115, v82
	v_add_co_u32 v69, s2, s70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v70, s2, s71, v70, s2
	v_lshlrev_b64 v[73:74], 2, v[74:75]
	v_add_co_u32 v78, s2, s70, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v79, s2, s71, v79, s2
	v_add_co_u32 v73, s2, s70, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v74, s2, s71, v74, s2
	s_add_u32 s2, s72, s84
	s_addc_u32 s3, s73, 0
	v_add_co_u32 v80, s2, s2, v32
	v_add_co_ci_u32_e64 v81, null, s3, 0, s2
	s_clause 0x3
	global_store_b32 v[76:77], v67, off
	global_store_b32 v[69:70], v68, off
	global_store_b32 v[78:79], v71, off
	global_store_b32 v[73:74], v72, off
	s_clause 0x3
	global_load_b128 v[67:70], v[80:81], off
	global_load_u16 v32, v[80:81], off offset:28
	global_load_b96 v[71:73], v[80:81], off offset:16
	global_load_u8 v74, v[80:81], off offset:30
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_lshrrev_b32_e32 v75, 8, v67
	v_and_b32_e32 v84, 0xffff, v32
	v_lshrrev_b32_e32 v76, 24, v67
	v_lshrrev_b32_e32 v77, 8, v68
	v_lshrrev_b32_e32 v78, 24, v68
	v_lshrrev_b32_e32 v79, 8, v69
	v_lshrrev_b32_e32 v80, 24, v69
	ds_store_b8 v35, v67 offset:64
	v_lshrrev_b32_e32 v35, 8, v84
	v_lshrrev_b32_e32 v81, 8, v70
	v_lshrrev_b32_e32 v83, 24, v70
	v_lshrrev_b32_e32 v85, 8, v71
	v_lshrrev_b32_e32 v112, 24, v71
	v_lshrrev_b32_e32 v113, 8, v72
	v_lshrrev_b32_e32 v114, 24, v72
	v_lshrrev_b32_e32 v115, 8, v73
	v_lshrrev_b32_e32 v119, 24, v73
	ds_store_b8 v36, v75 offset:64
	ds_store_b8_d16_hi v37, v67 offset:64
	ds_store_b8 v38, v76 offset:64
	ds_store_b8 v39, v68 offset:64
	ds_store_b8 v40, v77 offset:64
	ds_store_b8_d16_hi v41, v68 offset:64
	ds_store_b8 v42, v78 offset:64
	ds_store_b8 v43, v69 offset:64
	ds_store_b8 v44, v79 offset:64
	ds_store_b8_d16_hi v45, v69 offset:64
	ds_store_b8 v46, v80 offset:64
	ds_store_b8 v47, v70 offset:64
	ds_store_b8 v48, v81 offset:64
	ds_store_b8_d16_hi v49, v70 offset:64
	ds_store_b8 v50, v83 offset:64
	ds_store_b8 v51, v71 offset:64
	ds_store_b8 v52, v85 offset:64
	ds_store_b8_d16_hi v53, v71 offset:64
	ds_store_b8 v54, v112 offset:64
	ds_store_b8 v55, v72 offset:64
	ds_store_b8 v56, v113 offset:64
	ds_store_b8_d16_hi v57, v72 offset:64
	ds_store_b8 v58, v114 offset:64
	ds_store_b8 v59, v73 offset:64
	ds_store_b8 v60, v115 offset:64
	ds_store_b8_d16_hi v61, v73 offset:64
	ds_store_b8 v62, v119 offset:64
	ds_store_b8 v63, v32 offset:64
	ds_store_b8 v64, v35 offset:64
	ds_store_b8 v65, v74 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v29, v29
	ds_load_b32 v22, v22
	ds_load_b32 v31, v31
	ds_load_b32 v20, v20
	ds_load_b32 v30, v30
	ds_load_b32 v18, v18
	ds_load_b32 v28, v28
	ds_load_b32 v17, v17
	ds_load_u8 v32, v0 offset:576
	ds_load_u8 v35, v0 offset:1088
	ds_load_u8 v36, v0 offset:1600
	ds_load_u8 v37, v0 offset:2112
	ds_load_u8 v38, v0 offset:2624
	ds_load_u8 v39, v0 offset:3136
	ds_load_u8 v40, v0 offset:3648
	ds_load_u8 v41, v0 offset:4160
	ds_load_b32 v25, v25
	ds_load_b32 v16, v16
	ds_load_b32 v24, v24
	ds_load_b32 v13, v13
	ds_load_b32 v21, v21
	ds_load_b32 v11, v11
	ds_load_b32 v19, v19
	ds_load_b32 v42, v90
	ds_load_u8 v43, v0 offset:4672
	ds_load_u8 v44, v0 offset:5184
	ds_load_u8 v45, v0 offset:5696
	ds_load_u8 v46, v0 offset:6208
	ds_load_u8 v47, v0 offset:6720
	ds_load_u8 v48, v0 offset:7232
	ds_load_u8 v49, v0 offset:7744
	ds_load_u8 v50, v0 offset:8256
	ds_load_b32 v51, v91
	ds_load_b32 v52, v92
	ds_load_b32 v53, v98
	ds_load_b32 v54, v99
	ds_load_b32 v55, v93
	ds_load_b32 v56, v95
	ds_load_b32 v57, v96
	ds_load_b32 v23, v23
	ds_load_u8 v58, v0 offset:8768
	ds_load_u8 v59, v0 offset:9280
	ds_load_u8 v60, v0 offset:9792
	ds_load_u8 v61, v0 offset:10304
	ds_load_u8 v62, v0 offset:10816
	ds_load_u8 v63, v0 offset:11328
	ds_load_u8 v64, v0 offset:11840
	ds_load_u8 v65, v0 offset:12352
	ds_load_b32 v67, v104
	ds_load_b32 v68, v105
	ds_load_b32 v69, v106
	ds_load_b32 v70, v107
	ds_load_b32 v71, v108
	ds_load_b32 v72, v109
	ds_load_u8 v73, v0 offset:12864
	ds_load_u8 v74, v0 offset:13376
	ds_load_u8 v75, v0 offset:13888
	ds_load_u8 v76, v0 offset:14400
	ds_load_u8 v77, v0 offset:14912
	ds_load_u8 v78, v0 offset:15424
	ds_load_u8 v79, v0 offset:64
	ds_load_b32 v80, v110
	s_waitcnt lgkmcnt(61)
	v_add_nc_u32_e32 v29, v29, v0
	s_waitcnt lgkmcnt(60)
	v_add_nc_u32_e32 v2, v22, v2
	s_waitcnt lgkmcnt(59)
	v_add_nc_u32_e32 v3, v31, v3
	s_waitcnt lgkmcnt(58)
	v_add_nc_u32_e32 v4, v20, v4
	s_waitcnt lgkmcnt(57)
	v_add_nc_u32_e32 v5, v30, v5
	s_waitcnt lgkmcnt(56)
	v_add_nc_u32_e32 v6, v18, v6
	s_waitcnt lgkmcnt(55)
	v_add_nc_u32_e32 v7, v28, v7
	s_waitcnt lgkmcnt(54)
	v_add_nc_u32_e32 v8, v17, v8
	s_waitcnt lgkmcnt(45)
	v_add_nc_u32_e32 v9, v25, v9
	s_waitcnt lgkmcnt(44)
	v_add_nc_u32_e32 v10, v16, v10
	s_waitcnt lgkmcnt(43)
	v_add_nc_u32_e32 v12, v24, v12
	s_waitcnt lgkmcnt(42)
	v_add_nc_u32_e32 v13, v13, v14
	s_waitcnt lgkmcnt(41)
	v_add_nc_u32_e32 v14, v21, v15
	s_waitcnt lgkmcnt(40)
	v_add_nc_u32_e32 v11, v11, v26
	s_waitcnt lgkmcnt(39)
	v_add_nc_u32_e32 v15, v19, v27
	s_waitcnt lgkmcnt(38)
	v_add_nc_u32_e32 v16, v42, v66
	s_waitcnt lgkmcnt(29)
	v_add_nc_u32_e32 v17, v51, v94
	s_waitcnt lgkmcnt(28)
	v_add_nc_u32_e32 v18, v52, v88
	s_waitcnt lgkmcnt(27)
	v_add_nc_u32_e32 v19, v53, v89
	s_waitcnt lgkmcnt(26)
	v_add_nc_u32_e32 v20, v54, v97
	s_waitcnt lgkmcnt(25)
	v_add_nc_u32_e32 v21, v55, v100
	s_waitcnt lgkmcnt(24)
	v_add_nc_u32_e32 v22, v56, v101
	s_waitcnt lgkmcnt(23)
	v_add_nc_u32_e32 v24, v57, v102
	s_waitcnt lgkmcnt(22)
	v_add_nc_u32_e32 v23, v23, v103
	s_waitcnt lgkmcnt(13)
	v_add_nc_u32_e32 v25, v67, v116
	s_waitcnt lgkmcnt(12)
	v_add_nc_u32_e32 v26, v68, v117
	s_waitcnt lgkmcnt(11)
	v_add_nc_u32_e32 v27, v69, v118
	s_waitcnt lgkmcnt(10)
	v_add_nc_u32_e32 v28, v70, v86
	s_waitcnt lgkmcnt(9)
	v_add_nc_u32_e32 v30, v71, v87
	s_waitcnt lgkmcnt(8)
	v_add_nc_u32_e32 v31, v72, v111
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v42, v80, v82
	s_clause 0x1e
	global_store_b8 v29, v79, s[74:75]
	global_store_b8 v2, v32, s[74:75]
	global_store_b8 v3, v35, s[74:75]
	global_store_b8 v4, v36, s[74:75]
	global_store_b8 v5, v37, s[74:75]
	global_store_b8 v6, v38, s[74:75]
	global_store_b8 v7, v39, s[74:75]
	global_store_b8 v8, v40, s[74:75]
	global_store_b8 v9, v41, s[74:75]
	global_store_b8 v10, v43, s[74:75]
	global_store_b8 v12, v44, s[74:75]
	global_store_b8 v13, v45, s[74:75]
	global_store_b8 v14, v46, s[74:75]
	global_store_b8 v11, v47, s[74:75]
	global_store_b8 v15, v48, s[74:75]
	global_store_b8 v16, v49, s[74:75]
	global_store_b8 v17, v50, s[74:75]
	global_store_b8 v18, v58, s[74:75]
	global_store_b8 v19, v59, s[74:75]
	global_store_b8 v20, v60, s[74:75]
	global_store_b8 v21, v61, s[74:75]
	global_store_b8 v22, v62, s[74:75]
	global_store_b8 v24, v63, s[74:75]
	global_store_b8 v23, v64, s[74:75]
	global_store_b8 v25, v65, s[74:75]
	global_store_b8 v26, v73, s[74:75]
	global_store_b8 v27, v74, s[74:75]
	global_store_b8 v28, v75, s[74:75]
	global_store_b8 v30, v76, s[74:75]
	global_store_b8 v31, v77, s[74:75]
	global_store_b8 v42, v78, s[74:75]
	s_load_b32 s0, s[0:1], 0x50
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s0
	s_cselect_b32 s0, -1, 0
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
; %bb.365:
	v_add_nc_u32_e32 v2, v33, v34
	s_or_b32 s7, s7, exec_lo
; %bb.366:                              ; %Flow105
	s_or_b32 exec_lo, exec_lo, s0
.LBB21_367:                             ; %Flow104
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB21_369
; %bb.368:                              ; %_ZN7rocprim6detail25onesweep_iteration_helperIjhjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEEPjNS7_IhEEPhEEvT0_T1_T2_T3_S9_S9_PNS0_23onesweep_lookback_stateES3_jjjRNS4_13storage_type_E.exit.sink.split.i
	v_lshlrev_b32_e32 v3, 2, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	ds_load_b32 v3, v3
	v_add_co_u32 v0, vcc_lo, s78, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s79, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB21_369:                             ; %_ZN7rocprim6detail18onesweep_iterationILj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0EN6thrust10device_ptrIjEEPjNS4_IhEEPhjNS_19identity_decomposerEEEvT4_T5_T6_T7_jPT8_SF_PNS0_23onesweep_lookback_stateET9_jjj.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
		.amdhsa_group_segment_fixed_size 63552
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 127
		.amdhsa_next_free_sgpr 88
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
.Lfunc_end21:
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end21-_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EN6thrust10device_ptrIjEEPjNS6_IhEEPhjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 23104
; NumSgprs: 90
; NumVgprs: 127
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 63552 bytes/workgroup (compile time only)
; SGPRBlocks: 11
; VGPRBlocks: 15
; NumSGPRsForWavesPerEU: 90
; NumVGPRsForWavesPerEU: 127
; Occupancy: 8
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.protected	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj ; -- Begin function _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.globl	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	8
	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj: ; @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
; %bb.0:
	s_clause 0x3
	s_load_b128 s[80:83], s[0:1], 0x44
	s_load_b256 s[68:75], s[0:1], 0x0
	s_load_b128 s[76:79], s[0:1], 0x28
	s_load_b64 s[86:87], s[0:1], 0x38
	v_mul_u32_u24_e32 v32, 31, v0
	s_mul_i32 s84, s15, 0x3e00
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_u32 s15, s82
	s_cbranch_scc0 .LBB22_337
; %bb.1:
	s_load_b32 s4, s[0:1], 0x20
	s_mov_b32 s85, 0
	s_mul_i32 s66, s82, 0xffffc200
	v_dual_mov_b32 v4, -1 :: v_dual_lshlrev_b32 v1, 2, v32
	s_lshl_b64 s[2:3], s[84:85], 2
	v_mov_b32_e32 v3, -1
	s_waitcnt lgkmcnt(0)
	s_add_i32 s66, s66, s4
	s_add_u32 s4, s68, s2
	s_addc_u32 s3, s69, s3
	v_add_co_u32 v1, s4, s4, v1
	v_cmp_gt_u32_e64 s2, s66, v32
	v_add_co_ci_u32_e64 v2, null, s3, 0, s4
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB22_3
; %bb.2:
	global_load_b32 v4, v[1:2], off
.LBB22_3:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v5, 1, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s66, v5
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB22_5
; %bb.4:
	global_load_b32 v3, v[1:2], off offset:4
.LBB22_5:
	s_or_b32 exec_lo, exec_lo, s4
	v_dual_mov_b32 v5, -1 :: v_dual_add_nc_u32 v6, 2, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e64 s4, s66, v6
	v_mov_b32_e32 v6, -1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB22_7
; %bb.6:
	global_load_b32 v6, v[1:2], off offset:8
.LBB22_7:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v7, 3, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s66, v7
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB22_9
; %bb.8:
	global_load_b32 v5, v[1:2], off offset:12
.LBB22_9:
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v42, -1 :: v_dual_add_nc_u32 v7, 4, v32
	v_mov_b32_e32 v41, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s66, v7
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB22_11
; %bb.10:
	global_load_b32 v42, v[1:2], off offset:16
.LBB22_11:
	s_or_b32 exec_lo, exec_lo, s7
	v_add_nc_u32_e32 v7, 5, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s66, v7
	s_and_saveexec_b32 s8, s7
	s_cbranch_execz .LBB22_13
; %bb.12:
	global_load_b32 v41, v[1:2], off offset:20
.LBB22_13:
	s_or_b32 exec_lo, exec_lo, s8
	v_dual_mov_b32 v44, -1 :: v_dual_add_nc_u32 v7, 6, v32
	v_mov_b32_e32 v43, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s66, v7
	s_and_saveexec_b32 s9, s8
	s_cbranch_execz .LBB22_15
; %bb.14:
	global_load_b32 v44, v[1:2], off offset:24
.LBB22_15:
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v7, 7, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s66, v7
	s_and_saveexec_b32 s10, s9
	s_cbranch_execz .LBB22_17
; %bb.16:
	global_load_b32 v43, v[1:2], off offset:28
.LBB22_17:
	s_or_b32 exec_lo, exec_lo, s10
	v_dual_mov_b32 v46, -1 :: v_dual_add_nc_u32 v7, 8, v32
	v_mov_b32_e32 v45, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s66, v7
	s_and_saveexec_b32 s11, s10
	s_cbranch_execz .LBB22_19
; %bb.18:
	global_load_b32 v46, v[1:2], off offset:32
.LBB22_19:
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v7, 9, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s11, s66, v7
	s_and_saveexec_b32 s12, s11
	s_cbranch_execz .LBB22_21
; %bb.20:
	global_load_b32 v45, v[1:2], off offset:36
.LBB22_21:
	s_or_b32 exec_lo, exec_lo, s12
	v_dual_mov_b32 v48, -1 :: v_dual_add_nc_u32 v7, 10, v32
	v_mov_b32_e32 v47, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s66, v7
	s_and_saveexec_b32 s13, s12
	s_cbranch_execz .LBB22_23
; %bb.22:
	global_load_b32 v48, v[1:2], off offset:40
.LBB22_23:
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v7, 11, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s13, s66, v7
	s_and_saveexec_b32 s14, s13
	s_cbranch_execz .LBB22_25
; %bb.24:
	global_load_b32 v47, v[1:2], off offset:44
.LBB22_25:
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v50, -1 :: v_dual_add_nc_u32 v7, 12, v32
	v_mov_b32_e32 v49, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s14, s66, v7
	s_and_saveexec_b32 s16, s14
	s_cbranch_execz .LBB22_27
; %bb.26:
	global_load_b32 v50, v[1:2], off offset:48
.LBB22_27:
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v7, 13, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s16, s66, v7
	s_and_saveexec_b32 s17, s16
	s_cbranch_execz .LBB22_29
; %bb.28:
	global_load_b32 v49, v[1:2], off offset:52
.LBB22_29:
	s_or_b32 exec_lo, exec_lo, s17
	v_dual_mov_b32 v52, -1 :: v_dual_add_nc_u32 v7, 14, v32
	v_mov_b32_e32 v51, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s17, s66, v7
	s_and_saveexec_b32 s18, s17
	s_cbranch_execz .LBB22_31
; %bb.30:
	global_load_b32 v52, v[1:2], off offset:56
.LBB22_31:
	s_or_b32 exec_lo, exec_lo, s18
	v_add_nc_u32_e32 v7, 15, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s18, s66, v7
	s_and_saveexec_b32 s19, s18
	s_cbranch_execz .LBB22_33
; %bb.32:
	global_load_b32 v51, v[1:2], off offset:60
.LBB22_33:
	s_or_b32 exec_lo, exec_lo, s19
	v_dual_mov_b32 v54, -1 :: v_dual_add_nc_u32 v7, 16, v32
	v_mov_b32_e32 v53, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s19, s66, v7
	s_and_saveexec_b32 s20, s19
	s_cbranch_execz .LBB22_35
; %bb.34:
	global_load_b32 v54, v[1:2], off offset:64
.LBB22_35:
	s_or_b32 exec_lo, exec_lo, s20
	v_add_nc_u32_e32 v7, 17, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s20, s66, v7
	s_and_saveexec_b32 s21, s20
	s_cbranch_execz .LBB22_37
; %bb.36:
	global_load_b32 v53, v[1:2], off offset:68
.LBB22_37:
	s_or_b32 exec_lo, exec_lo, s21
	v_dual_mov_b32 v56, -1 :: v_dual_add_nc_u32 v7, 18, v32
	v_mov_b32_e32 v55, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s21, s66, v7
	s_and_saveexec_b32 s22, s21
	s_cbranch_execz .LBB22_39
; %bb.38:
	global_load_b32 v56, v[1:2], off offset:72
.LBB22_39:
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v7, 19, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s22, s66, v7
	s_and_saveexec_b32 s23, s22
	s_cbranch_execz .LBB22_41
; %bb.40:
	global_load_b32 v55, v[1:2], off offset:76
.LBB22_41:
	s_or_b32 exec_lo, exec_lo, s23
	v_dual_mov_b32 v58, -1 :: v_dual_add_nc_u32 v7, 20, v32
	v_mov_b32_e32 v57, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s23, s66, v7
	s_and_saveexec_b32 s24, s23
	s_cbranch_execz .LBB22_43
; %bb.42:
	global_load_b32 v58, v[1:2], off offset:80
.LBB22_43:
	s_or_b32 exec_lo, exec_lo, s24
	v_add_nc_u32_e32 v7, 21, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s24, s66, v7
	s_and_saveexec_b32 s25, s24
	s_cbranch_execz .LBB22_45
; %bb.44:
	global_load_b32 v57, v[1:2], off offset:84
.LBB22_45:
	s_or_b32 exec_lo, exec_lo, s25
	v_dual_mov_b32 v60, -1 :: v_dual_add_nc_u32 v7, 22, v32
	v_mov_b32_e32 v59, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s25, s66, v7
	s_and_saveexec_b32 s26, s25
	s_cbranch_execz .LBB22_47
; %bb.46:
	global_load_b32 v60, v[1:2], off offset:88
.LBB22_47:
	s_or_b32 exec_lo, exec_lo, s26
	v_add_nc_u32_e32 v7, 23, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s26, s66, v7
	s_and_saveexec_b32 s27, s26
	s_cbranch_execz .LBB22_49
; %bb.48:
	global_load_b32 v59, v[1:2], off offset:92
.LBB22_49:
	s_or_b32 exec_lo, exec_lo, s27
	v_dual_mov_b32 v62, -1 :: v_dual_add_nc_u32 v7, 24, v32
	v_mov_b32_e32 v61, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s27, s66, v7
	s_and_saveexec_b32 s28, s27
	s_cbranch_execz .LBB22_51
; %bb.50:
	global_load_b32 v62, v[1:2], off offset:96
.LBB22_51:
	s_or_b32 exec_lo, exec_lo, s28
	v_add_nc_u32_e32 v7, 25, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s28, s66, v7
	s_and_saveexec_b32 s29, s28
	s_cbranch_execz .LBB22_53
; %bb.52:
	global_load_b32 v61, v[1:2], off offset:100
.LBB22_53:
	s_or_b32 exec_lo, exec_lo, s29
	v_dual_mov_b32 v64, -1 :: v_dual_add_nc_u32 v7, 26, v32
	v_mov_b32_e32 v63, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s29, s66, v7
	s_and_saveexec_b32 s30, s29
	s_cbranch_execz .LBB22_55
; %bb.54:
	global_load_b32 v64, v[1:2], off offset:104
.LBB22_55:
	s_or_b32 exec_lo, exec_lo, s30
	v_add_nc_u32_e32 v7, 27, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s30, s66, v7
	s_and_saveexec_b32 s31, s30
	s_cbranch_execz .LBB22_57
; %bb.56:
	global_load_b32 v63, v[1:2], off offset:108
.LBB22_57:
	s_or_b32 exec_lo, exec_lo, s31
	v_dual_mov_b32 v66, -1 :: v_dual_add_nc_u32 v7, 28, v32
	v_mov_b32_e32 v65, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s31, s66, v7
	s_and_saveexec_b32 s33, s31
	s_cbranch_execz .LBB22_59
; %bb.58:
	global_load_b32 v66, v[1:2], off offset:112
.LBB22_59:
	s_or_b32 exec_lo, exec_lo, s33
	v_add_nc_u32_e32 v7, 29, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s33, s66, v7
	s_and_saveexec_b32 s34, s33
	s_cbranch_execz .LBB22_61
; %bb.60:
	global_load_b32 v65, v[1:2], off offset:116
.LBB22_61:
	s_or_b32 exec_lo, exec_lo, s34
	v_add_nc_u32_e32 v7, 30, v32
	v_mov_b32_e32 v67, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s34, s66, v7
	s_and_saveexec_b32 s35, s34
	s_cbranch_execz .LBB22_63
; %bb.62:
	global_load_b32 v67, v[1:2], off offset:120
.LBB22_63:                              ; %_ZN7rocprim25block_load_direct_blockedIPjjLj31EjEEvjT_RAT1__T0_jT2_.exit.i.i
	s_or_b32 exec_lo, exec_lo, s35
	v_or_b32_e32 v1, 0xfffffe00, v0
	v_dual_mov_b32 v7, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_mov_b32 s35, 0
.LBB22_64:                              ; %.lr.ph.i.i.i.i.i.i23.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v1, 0x200, v1
	ds_store_b32 v2, v7
	v_add_nc_u32_e32 v2, 0x800, v2
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v1
	s_or_b32 s35, vcc_lo, s35
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB22_64
; %bb.65:                               ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i25.i
	s_or_b32 exec_lo, exec_lo, s35
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_lshl_b32 s35, -1, s81
	v_lshrrev_b32_e32 v10, s80, v6
	s_not_b32 s67, s35
	s_mov_b32 s39, exec_lo
	v_and_b32_e32 v1, s67, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v2, 9, v1
	v_lshrrev_b32_e32 v1, 3, v1
	v_and_or_b32 v2, 0xe00, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v2
	v_add_lshl_u32 v7, v2, v1, 1
	v_lshrrev_b32_e32 v2, s80, v3
	ds_load_u16 v1, v7
	v_and_b32_e32 v2, s67, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 9, v2
	v_lshrrev_b32_e32 v2, 3, v2
	v_and_or_b32 v8, 0xe00, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 1, v8
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v9, v1, 1
	v_add_lshl_u32 v8, v8, v2, 1
	ds_store_b16 v7, v9
	ds_load_u16 v2, v8
	v_and_b32_e32 v9, s67, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 9, v9
	v_lshrrev_b32_e32 v9, 3, v9
	v_and_or_b32 v10, 0xe00, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 1, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v11, v2, 1
	v_add_lshl_u32 v15, v10, v9, 1
	v_lshrrev_b32_e32 v10, s80, v5
	ds_store_b16 v8, v11
	ds_load_u16 v9, v15
	v_and_b32_e32 v10, s67, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 9, v10
	v_lshrrev_b32_e32 v10, 3, v10
	v_and_or_b32 v11, 0xe00, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 1, v11
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v12, v9, 1
	v_add_lshl_u32 v17, v11, v10, 1
	v_lshrrev_b32_e32 v11, s80, v42
	ds_store_b16 v15, v12
	ds_load_u16 v10, v17
	v_and_b32_e32 v11, s67, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 9, v11
	v_lshrrev_b32_e32 v11, 3, v11
	v_and_or_b32 v12, 0xe00, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 1, v12
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v13, v10, 1
	v_add_lshl_u32 v19, v12, v11, 1
	v_lshrrev_b32_e32 v12, s80, v41
	ds_store_b16 v17, v13
	ds_load_u16 v11, v19
	v_and_b32_e32 v12, s67, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 9, v12
	v_lshrrev_b32_e32 v12, 3, v12
	v_and_or_b32 v13, 0xe00, v13, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 1, v13
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v14, v11, 1
	v_add_lshl_u32 v21, v13, v12, 1
	v_lshrrev_b32_e32 v13, s80, v44
	ds_store_b16 v19, v14
	ds_load_u16 v12, v21
	v_and_b32_e32 v13, s67, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 9, v13
	v_lshrrev_b32_e32 v13, 3, v13
	v_and_or_b32 v14, 0xe00, v14, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 1, v14
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v16, v12, 1
	v_add_lshl_u32 v23, v14, v13, 1
	v_lshrrev_b32_e32 v14, s80, v43
	ds_store_b16 v21, v16
	ds_load_u16 v13, v23
	v_and_b32_e32 v14, s67, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v16, 9, v14
	v_lshrrev_b32_e32 v14, 3, v14
	v_and_or_b32 v16, 0xe00, v16, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v16, 1, v16
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v18, v13, 1
	v_add_lshl_u32 v25, v16, v14, 1
	v_lshrrev_b32_e32 v16, s80, v46
	ds_store_b16 v23, v18
	ds_load_u16 v14, v25
	v_and_b32_e32 v16, s67, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v18, 9, v16
	v_lshrrev_b32_e32 v16, 3, v16
	v_and_or_b32 v18, 0xe00, v18, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v18, 1, v18
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v20, v14, 1
	v_add_lshl_u32 v27, v18, v16, 1
	v_lshrrev_b32_e32 v18, s80, v45
	ds_store_b16 v25, v20
	ds_load_u16 v16, v27
	v_and_b32_e32 v18, s67, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v20, 9, v18
	v_lshrrev_b32_e32 v18, 3, v18
	v_and_or_b32 v20, 0xe00, v20, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v20, 1, v20
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v22, v16, 1
	v_add_lshl_u32 v29, v20, v18, 1
	v_lshrrev_b32_e32 v20, s80, v48
	ds_store_b16 v27, v22
	ds_load_u16 v18, v29
	v_and_b32_e32 v20, s67, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v22, 9, v20
	v_lshrrev_b32_e32 v20, 3, v20
	v_and_or_b32 v22, 0xe00, v22, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v22, 1, v22
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v24, v18, 1
	v_add_lshl_u32 v31, v22, v20, 1
	v_lshrrev_b32_e32 v22, s80, v47
	ds_store_b16 v29, v24
	ds_load_u16 v20, v31
	v_and_b32_e32 v22, s67, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v24, 9, v22
	v_lshrrev_b32_e32 v22, 3, v22
	v_and_or_b32 v24, 0xe00, v24, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v24, 1, v24
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v26, v20, 1
	v_add_lshl_u32 v34, v24, v22, 1
	v_lshrrev_b32_e32 v24, s80, v50
	ds_store_b16 v31, v26
	ds_load_u16 v22, v34
	v_and_b32_e32 v24, s67, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v26, 9, v24
	v_lshrrev_b32_e32 v24, 3, v24
	v_and_or_b32 v26, 0xe00, v26, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v26, 1, v26
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v28, v22, 1
	v_add_lshl_u32 v36, v26, v24, 1
	v_lshrrev_b32_e32 v26, s80, v49
	ds_store_b16 v34, v28
	ds_load_u16 v24, v36
	v_and_b32_e32 v26, s67, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v28, 9, v26
	v_lshrrev_b32_e32 v26, 3, v26
	v_and_or_b32 v28, 0xe00, v28, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v28, 1, v28
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v30, v24, 1
	v_add_lshl_u32 v38, v28, v26, 1
	v_lshrrev_b32_e32 v28, s80, v52
	ds_store_b16 v36, v30
	ds_load_u16 v26, v38
	v_and_b32_e32 v28, s67, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v30, 9, v28
	v_lshrrev_b32_e32 v28, 3, v28
	v_and_or_b32 v30, 0xe00, v30, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v30, 1, v30
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v33, v26, 1
	v_add_lshl_u32 v40, v30, v28, 1
	v_lshrrev_b32_e32 v30, s80, v51
	ds_store_b16 v38, v33
	ds_load_u16 v28, v40
	v_and_b32_e32 v30, s67, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v33, 9, v30
	v_lshrrev_b32_e32 v30, 3, v30
	v_and_or_b32 v33, 0xe00, v33, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v33, 1, v33
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v35, v28, 1
	v_add_lshl_u32 v69, v33, v30, 1
	v_lshrrev_b32_e32 v33, s80, v54
	ds_store_b16 v40, v35
	ds_load_u16 v30, v69
	v_and_b32_e32 v33, s67, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v35, 9, v33
	v_lshrrev_b32_e32 v33, 3, v33
	v_and_or_b32 v35, 0xe00, v35, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v35, 1, v35
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v37, v30, 1
	v_add_lshl_u32 v71, v35, v33, 1
	v_lshrrev_b32_e32 v35, s80, v53
	ds_store_b16 v69, v37
	ds_load_u16 v33, v71
	v_and_b32_e32 v35, s67, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v37, 9, v35
	v_lshrrev_b32_e32 v35, 3, v35
	v_and_or_b32 v37, 0xe00, v37, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v37, 1, v37
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v39, v33, 1
	v_add_lshl_u32 v73, v37, v35, 1
	v_lshrrev_b32_e32 v37, s80, v56
	ds_store_b16 v71, v39
	ds_load_u16 v35, v73
	v_and_b32_e32 v37, s67, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 9, v37
	v_lshrrev_b32_e32 v37, 3, v37
	v_and_or_b32 v39, 0xe00, v39, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 1, v39
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v68, v35, 1
	v_add_lshl_u32 v75, v39, v37, 1
	v_lshrrev_b32_e32 v39, s80, v55
	ds_store_b16 v73, v68
	ds_load_u16 v37, v75
	v_and_b32_e32 v39, s67, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 9, v39
	v_lshrrev_b32_e32 v39, 3, v39
	v_and_or_b32 v68, 0xe00, v68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 1, v68
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v70, v37, 1
	v_add_lshl_u32 v77, v68, v39, 1
	v_lshrrev_b32_e32 v68, s80, v58
	ds_store_b16 v75, v70
	ds_load_u16 v39, v77
	v_and_b32_e32 v68, s67, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 9, v68
	v_lshrrev_b32_e32 v68, 3, v68
	v_and_or_b32 v70, 0xe00, v70, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 1, v70
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v72, v39, 1
	v_add_lshl_u32 v79, v70, v68, 1
	v_lshrrev_b32_e32 v70, s80, v57
	ds_store_b16 v77, v72
	ds_load_u16 v68, v79
	v_and_b32_e32 v70, s67, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 9, v70
	v_lshrrev_b32_e32 v70, 3, v70
	v_and_or_b32 v72, 0xe00, v72, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 1, v72
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v74, v68, 1
	v_add_lshl_u32 v81, v72, v70, 1
	v_lshrrev_b32_e32 v72, s80, v60
	ds_store_b16 v79, v74
	ds_load_u16 v70, v81
	v_and_b32_e32 v72, s67, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 9, v72
	v_lshrrev_b32_e32 v72, 3, v72
	v_and_or_b32 v74, 0xe00, v74, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 1, v74
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v76, v70, 1
	v_add_lshl_u32 v83, v74, v72, 1
	v_lshrrev_b32_e32 v74, s80, v59
	ds_store_b16 v81, v76
	ds_load_u16 v72, v83
	v_and_b32_e32 v74, s67, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 9, v74
	v_lshrrev_b32_e32 v74, 3, v74
	v_and_or_b32 v76, 0xe00, v76, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 1, v76
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v78, v72, 1
	v_add_lshl_u32 v85, v76, v74, 1
	v_lshrrev_b32_e32 v76, s80, v62
	ds_store_b16 v83, v78
	ds_load_u16 v74, v85
	v_and_b32_e32 v76, s67, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 9, v76
	v_lshrrev_b32_e32 v76, 3, v76
	v_and_or_b32 v78, 0xe00, v78, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 1, v78
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v80, v74, 1
	v_add_lshl_u32 v87, v78, v76, 1
	v_lshrrev_b32_e32 v78, s80, v61
	ds_store_b16 v85, v80
	ds_load_u16 v76, v87
	v_and_b32_e32 v78, s67, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 9, v78
	v_lshrrev_b32_e32 v78, 3, v78
	v_and_or_b32 v80, 0xe00, v80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 1, v80
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v82, v76, 1
	v_add_lshl_u32 v89, v80, v78, 1
	v_lshrrev_b32_e32 v80, s80, v64
	ds_store_b16 v87, v82
	ds_load_u16 v78, v89
	v_and_b32_e32 v80, s67, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 9, v80
	v_lshrrev_b32_e32 v80, 3, v80
	v_and_or_b32 v82, 0xe00, v82, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 1, v82
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v84, v78, 1
	v_add_lshl_u32 v90, v82, v80, 1
	v_lshrrev_b32_e32 v82, s80, v63
	ds_store_b16 v89, v84
	ds_load_u16 v80, v90
	v_and_b32_e32 v82, s67, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 9, v82
	v_lshrrev_b32_e32 v82, 3, v82
	v_and_or_b32 v84, 0xe00, v84, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 1, v84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v86, v80, 1
	v_add_lshl_u32 v91, v84, v82, 1
	v_lshrrev_b32_e32 v84, s80, v66
	ds_store_b16 v90, v86
	ds_load_u16 v82, v91
	v_and_b32_e32 v84, s67, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 9, v84
	v_lshrrev_b32_e32 v84, 3, v84
	v_and_or_b32 v86, 0xe00, v86, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 1, v86
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v88, v82, 1
	v_add_lshl_u32 v92, v86, v84, 1
	v_lshrrev_b32_e32 v86, s80, v65
	ds_store_b16 v91, v88
	ds_load_u16 v84, v92
	v_and_b32_e32 v86, s67, v86
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 9, v86
	v_lshrrev_b32_e32 v86, 3, v86
	v_and_or_b32 v88, 0xe00, v88, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 1, v88
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v94, v84, 1
	v_add_lshl_u32 v93, v88, v86, 1
	v_lshrrev_b32_e32 v88, s80, v67
	ds_store_b16 v92, v94
	ds_load_u16 v86, v93
	v_and_b32_e32 v88, s67, v88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 9, v88
	v_lshrrev_b32_e32 v88, 3, v88
	v_and_or_b32 v94, 0xe00, v94, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 1, v94
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v86, 1
	v_add_lshl_u32 v94, v94, v88, 1
	ds_store_b16 v93, v95
	ds_load_u16 v88, v94
	v_lshlrev_b32_e32 v95, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v88, 1
	ds_store_b16 v94, v96
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[96:99], v95 offset1:1
	ds_load_2addr_b64 v[100:103], v95 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v96, v97, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v96, v96, v98, v99
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v97, v96, v100, v101
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_or_b32_e32 v100, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v97, v97, v102, v103
	v_and_b32_e32 v98, 15, v96
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v99, v97 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s35, 0, v98
	v_cmp_lt_u32_e64 s36, 1, v98
	v_cmp_lt_u32_e64 s37, 3, v98
	v_cmp_lt_u32_e64 s38, 7, v98
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, v99, 0, s35
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v99, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v97, v97, v99
	v_mov_b32_dpp v99, v97 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, 0, v99, s37
	v_add_nc_u32_e32 v97, v97, v99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v98, 0, v99, s38
	v_bfe_i32 v99, v96, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v97, v97, v98
	ds_swizzle_b32 v98, v97 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v98, v99, v98
	v_lshrrev_b32_e32 v99, 5, v0
	v_add_nc_u32_e32 v97, v97, v98
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v99
	v_cmpx_eq_u32_e64 v100, v0
	s_cbranch_execz .LBB22_67
; %bb.66:
	ds_store_b32 v98, v97 offset:16384
.LBB22_67:
	s_or_b32 exec_lo, exec_lo, s39
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s39, vcc_lo
	s_cbranch_execz .LBB22_69
; %bb.68:
	v_mad_i32_i24 v99, 0xffffffe4, v0, v95
	ds_load_b32 v100, v99 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v101, v100 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, v101, 0, s35
	v_add_nc_u32_e32 v100, v101, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	v_mov_b32_dpp v101, v100 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, 0, v101, s37
	v_add_nc_u32_e32 v100, v100, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s38
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	ds_store_b32 v99, v100 offset:16384
.LBB22_69:                              ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i34.i
	s_or_b32 exec_lo, exec_lo, s39
	v_dual_mov_b32 v100, 0 :: v_dual_mov_b32 v99, 0
	s_mov_b32 s36, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB22_71
; %bb.70:
	ds_load_b32 v99, v98 offset:16380
.LBB22_71:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjhjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb0EPjN6thrust10device_ptrIjEEPhNSB_IhEEEEvT0_T1_T2_T3_S9_S9_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESG_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s36
	v_add_nc_u32_e32 v98, -1, v96
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s35, 0, v98
	v_cndmask_b32_e64 v98, v98, v96, s35
	v_cmp_eq_u32_e64 s35, 0, v96
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v98
	ds_bpermute_b32 v97, v98, v97
	ds_load_b32 v98, v100 offset:16444
	ds_load_2addr_b64 v[100:103], v95 offset1:1
	ds_load_b32 v104, v95 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v96, v97, v99, s35
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v96, v98, 16, v96
	ds_load_b64 v[98:99], v95 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v97, v96, v100
	v_add_nc_u32_e32 v100, v101, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v102, v100
	v_add_nc_u32_e32 v102, v103, v101
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v103, v98, v102
	v_add_nc_u32_e32 v98, v99, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v99, v104, v98
	ds_store_2addr_b64 v95, v[96:97], v[100:101] offset1:1
	ds_store_2addr_b64 v95, v[102:103], v[98:99] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v108, v7
	ds_load_u16 v107, v8
	ds_load_u16 v106, v15
	ds_load_u16 v105, v17
	ds_load_u16 v104, v19
	ds_load_u16 v103, v21
	ds_load_u16 v102, v23
	ds_load_u16 v101, v25
	ds_load_u16 v100, v27
	ds_load_u16 v15, v29
	ds_load_u16 v17, v31
	ds_load_u16 v19, v34
	ds_load_u16 v99, v36
	ds_load_u16 v98, v38
	ds_load_u16 v23, v40
	ds_load_u16 v21, v69
	ds_load_u16 v97, v71
	ds_load_u16 v96, v73
	ds_load_u16 v95, v75
	ds_load_u16 v25, v77
	ds_load_u16 v27, v79
	ds_load_u16 v29, v81
	ds_load_u16 v75, v83
	ds_load_u16 v73, v85
	ds_load_u16 v34, v87
	ds_load_u16 v31, v89
	ds_load_u16 v71, v90
	ds_load_u16 v69, v91
	ds_load_u16 v40, v92
	ds_load_u16 v36, v93
	ds_load_u16 v38, v94
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB22_75
; %bb.72:
	v_lshrrev_b32_e32 v7, 3, v0
	v_lshlrev_b32_e32 v8, 10, v0
	v_add_nc_u32_e32 v77, 1, v0
	s_mov_b32 s37, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v7, 0x1c00, v8, v7
	v_dual_mov_b32 v8, 0x3e00 :: v_dual_lshlrev_b32 v7, 1, v7
	ds_load_u16 v7, v7
	v_cmpx_ne_u32_e32 16, v77
	s_cbranch_execz .LBB22_74
; %bb.73:
	v_lshlrev_b32_e32 v8, 10, v77
	v_lshrrev_b32_e32 v77, 3, v77
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v8, 0x1c00, v8, v77
	v_lshlrev_b32_e32 v8, 1, v8
	ds_load_u16 v8, v8
.LBB22_74:
	s_or_b32 exec_lo, exec_lo, s37
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v8, v7
.LBB22_75:                              ; %Flow92
	s_or_b32 exec_lo, exec_lo, s36
	v_and_b32_e32 v1, 0xffff, v1
	v_and_b32_e32 v77, 0xffff, v9
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v9, 0xffff, v108
	v_and_b32_e32 v2, 0xffff, v2
	v_and_b32_e32 v79, 0xffff, v10
	s_waitcnt lgkmcnt(29)
	v_and_b32_e32 v10, 0xffff, v107
	v_and_b32_e32 v83, 0xffff, v12
	v_add_nc_u32_e32 v9, v9, v1
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v1, 0xffff, v106
	v_and_b32_e32 v81, 0xffff, v11
	v_add_nc_u32_e32 v10, v10, v2
	s_waitcnt lgkmcnt(25)
	v_and_b32_e32 v2, 0xffff, v103
	v_and_b32_e32 v85, 0xffff, v13
	v_and_b32_e32 v12, 0xffff, v105
	v_add_nc_u32_e32 v11, v1, v77
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v1, 0xffff, v102
	v_and_b32_e32 v87, 0xffff, v14
	v_add_nc_u32_e32 v14, v2, v83
	s_waitcnt lgkmcnt(23)
	v_and_b32_e32 v2, 0xffff, v101
	v_and_b32_e32 v20, 0xffff, v20
	v_add_nc_u32_e32 v12, v12, v79
	s_waitcnt lgkmcnt(21)
	v_and_b32_e32 v79, 0xffff, v15
	v_add_nc_u32_e32 v15, v1, v85
	s_waitcnt lgkmcnt(20)
	v_and_b32_e32 v1, 0xffff, v17
	v_and_b32_e32 v89, 0xffff, v16
	v_and_b32_e32 v22, 0xffff, v22
	v_add_nc_u32_e32 v16, v2, v87
	s_waitcnt lgkmcnt(19)
	v_and_b32_e32 v2, 0xffff, v19
	v_and_b32_e32 v24, 0xffff, v24
	v_add_nc_u32_e32 v19, v1, v20
	s_waitcnt lgkmcnt(18)
	v_and_b32_e32 v1, 0xffff, v99
	v_and_b32_e32 v30, 0xffff, v30
	v_and_b32_e32 v77, 0xffff, v100
	v_add_nc_u32_e32 v20, v2, v22
	s_waitcnt lgkmcnt(15)
	v_and_b32_e32 v2, 0xffff, v21
	v_and_b32_e32 v33, 0xffff, v33
	v_add_nc_u32_e32 v21, v1, v24
	s_waitcnt lgkmcnt(14)
	v_and_b32_e32 v1, 0xffff, v97
	v_and_b32_e32 v26, 0xffff, v26
	v_and_b32_e32 v28, 0xffff, v28
	v_and_b32_e32 v35, 0xffff, v35
	v_add_nc_u32_e32 v17, v77, v89
	v_and_b32_e32 v77, 0xffff, v98
	v_and_b32_e32 v23, 0xffff, v23
	v_add_nc_u32_e32 v24, v2, v30
	s_waitcnt lgkmcnt(13)
	v_and_b32_e32 v2, 0xffff, v96
	v_and_b32_e32 v68, 0xffff, v68
	s_waitcnt lgkmcnt(11)
	v_and_b32_e32 v30, 0xffff, v25
	v_add_nc_u32_e32 v25, v1, v33
	s_waitcnt lgkmcnt(10)
	v_and_b32_e32 v1, 0xffff, v27
	v_and_b32_e32 v37, 0xffff, v37
	v_and_b32_e32 v39, 0xffff, v39
	v_and_b32_e32 v70, 0xffff, v70
	v_add_nc_u32_e32 v22, v77, v26
	v_add_nc_u32_e32 v23, v23, v28
	v_and_b32_e32 v28, 0xffff, v95
	v_add_nc_u32_e32 v26, v2, v35
	s_waitcnt lgkmcnt(9)
	v_and_b32_e32 v2, 0xffff, v29
	v_and_b32_e32 v72, 0xffff, v72
	v_add_nc_u32_e32 v29, v1, v68
	s_waitcnt lgkmcnt(8)
	v_and_b32_e32 v1, 0xffff, v75
	v_and_b32_e32 v78, 0xffff, v78
	v_add_nc_u32_e32 v27, v28, v37
	v_add_nc_u32_e32 v28, v30, v39
	v_add_nc_u32_e32 v30, v2, v70
	s_waitcnt lgkmcnt(5)
	v_and_b32_e32 v2, 0xffff, v31
	v_and_b32_e32 v80, 0xffff, v80
	v_add_nc_u32_e32 v31, v1, v72
	s_waitcnt lgkmcnt(4)
	v_and_b32_e32 v1, 0xffff, v71
	v_and_b32_e32 v82, 0xffff, v82
	v_add_nc_u32_e32 v35, v2, v78
	s_waitcnt lgkmcnt(3)
	v_and_b32_e32 v2, 0xffff, v69
	v_and_b32_e32 v13, 0xffff, v104
	v_and_b32_e32 v84, 0xffff, v84
	v_and_b32_e32 v86, 0xffff, v86
	v_and_b32_e32 v88, 0xffff, v88
	s_waitcnt lgkmcnt(2)
	v_and_b32_e32 v39, 0xffff, v40
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v40, 0xffff, v36
	v_add_nc_u32_e32 v36, v1, v80
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v1, 0xffff, v38
	v_add_nc_u32_e32 v37, v2, v82
	v_lshlrev_b32_e32 v2, 2, v9
	v_and_b32_e32 v18, 0xffff, v18
	v_add_nc_u32_e32 v13, v13, v81
	v_add_nc_u32_e32 v38, v39, v84
	v_add_nc_u32_e32 v39, v40, v86
	v_add_nc_u32_e32 v40, v1, v88
	v_lshlrev_b32_e32 v1, 2, v10
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v2, v4 offset:64
	v_lshlrev_b32_e32 v2, 2, v11
	v_lshlrev_b32_e32 v4, 2, v12
	v_add_nc_u32_e32 v18, v79, v18
	v_lshlrev_b32_e32 v68, 2, v13
	v_lshlrev_b32_e32 v69, 2, v14
	ds_store_b32 v1, v3 offset:64
	ds_store_b32 v2, v6 offset:64
	ds_store_b32 v4, v5 offset:64
	ds_store_b32 v68, v42 offset:64
	ds_store_b32 v69, v41 offset:64
	v_lshlrev_b32_e32 v1, 2, v15
	v_lshlrev_b32_e32 v2, 2, v16
	v_lshlrev_b32_e32 v3, 2, v17
	v_lshlrev_b32_e32 v4, 2, v18
	v_lshlrev_b32_e32 v5, 2, v19
	ds_store_b32 v1, v44 offset:64
	ds_store_b32 v2, v43 offset:64
	ds_store_b32 v3, v46 offset:64
	ds_store_b32 v4, v45 offset:64
	ds_store_b32 v5, v48 offset:64
	v_lshlrev_b32_e32 v1, 2, v20
	v_lshlrev_b32_e32 v2, 2, v21
	v_and_b32_e32 v74, 0xffff, v74
	v_and_b32_e32 v33, 0xffff, v73
	v_lshlrev_b32_e32 v3, 2, v22
	v_and_b32_e32 v76, 0xffff, v76
	v_and_b32_e32 v34, 0xffff, v34
	v_lshlrev_b32_e32 v4, 2, v23
	v_lshlrev_b32_e32 v5, 2, v24
	ds_store_b32 v1, v47 offset:64
	ds_store_b32 v2, v50 offset:64
	ds_store_b32 v3, v49 offset:64
	ds_store_b32 v4, v52 offset:64
	ds_store_b32 v5, v51 offset:64
	v_lshlrev_b32_e32 v1, 2, v25
	v_lshlrev_b32_e32 v2, 2, v26
	v_add_nc_u32_e32 v33, v33, v74
	v_lshlrev_b32_e32 v3, 2, v27
	v_add_nc_u32_e32 v34, v34, v76
	v_lshlrev_b32_e32 v4, 2, v28
	v_lshlrev_b32_e32 v5, 2, v29
	ds_store_b32 v1, v54 offset:64
	ds_store_b32 v2, v53 offset:64
	ds_store_b32 v3, v56 offset:64
	ds_store_b32 v4, v55 offset:64
	ds_store_b32 v5, v58 offset:64
	v_lshlrev_b32_e32 v1, 2, v30
	v_lshlrev_b32_e32 v2, 2, v31
	v_lshlrev_b32_e32 v3, 2, v33
	v_lshlrev_b32_e32 v4, 2, v34
	v_lshlrev_b32_e32 v5, 2, v35
	ds_store_b32 v1, v57 offset:64
	ds_store_b32 v2, v60 offset:64
	ds_store_b32 v3, v59 offset:64
	ds_store_b32 v4, v62 offset:64
	ds_store_b32 v5, v61 offset:64
	v_lshlrev_b32_e32 v1, 2, v36
	v_lshlrev_b32_e32 v2, 2, v37
	v_lshlrev_b32_e32 v3, 2, v38
	v_lshlrev_b32_e32 v4, 2, v39
	v_lshlrev_b32_e32 v5, 2, v40
	ds_store_b32 v1, v64 offset:64
	ds_store_b32 v2, v63 offset:64
	ds_store_b32 v3, v66 offset:64
	ds_store_b32 v4, v65 offset:64
	ds_store_b32 v5, v67 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB22_86
; %bb.76:
	v_lshl_or_b32 v3, s15, 4, v0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v41, 0
	s_mov_b32 s37, 0
	s_mov_b32 s38, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v8
	v_add_co_u32 v1, s35, s86, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s35, s87, v2, s35
                                        ; implicit-def: $sgpr35
	global_store_b32 v[1:2], v3, off
.LBB22_77:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB22_80 Depth 2
	s_or_b32 s35, s35, exec_lo
	s_cmp_eq_u32 s38, 0
	s_cbranch_scc1 .LBB22_83
; %bb.78:                               ;   in Loop: Header=BB22_77 Depth=1
	s_add_i32 s38, s38, -1
	s_mov_b32 s39, exec_lo
	v_lshl_or_b32 v3, s38, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s35, s86, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s35, s87, v6, s35
	global_load_b32 v42, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v42
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB22_82
; %bb.79:                               ; %.lr.ph.i44.i.preheader
                                        ;   in Loop: Header=BB22_77 Depth=1
	s_mov_b32 s40, 0
.LBB22_80:                              ; %.lr.ph.i44.i
                                        ;   Parent Loop BB22_77 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v42, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s35, 0, v3
	s_or_b32 s40, s35, s40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s40
	s_cbranch_execnz .LBB22_80
; %bb.81:                               ; %Flow
                                        ;   in Loop: Header=BB22_77 Depth=1
	s_or_b32 exec_lo, exec_lo, s40
.LBB22_82:                              ; %Flow89
                                        ;   in Loop: Header=BB22_77 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s39
	v_and_b32_e32 v5, 0x3fffffff, v42
	v_cmp_eq_u32_e64 s35, 0x80000000, v3
	v_add_nc_u32_e32 v41, v5, v41
	s_branch .LBB22_84
.LBB22_83:                              ;   in Loop: Header=BB22_77 Depth=1
                                        ; implicit-def: $sgpr38
.LBB22_84:                              ; %Flow90
                                        ;   in Loop: Header=BB22_77 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s39, exec_lo, s35
	s_or_b32 s37, s39, s37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s37
	s_cbranch_execnz .LBB22_77
; %bb.85:
	s_or_b32 exec_lo, exec_lo, s37
	v_add_nc_u32_e32 v3, v41, v8
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v41, v7
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	ds_store_b32 v4, v1
.LBB22_86:                              ; %Flow91
	s_or_b32 exec_lo, exec_lo, s36
	v_cmp_gt_u32_e64 s35, s66, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s37, s35
	s_cbranch_execz .LBB22_88
; %bb.87:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v3, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s36, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s36, s71, v2, s36
	global_store_b32 v[1:2], v3, off
.LBB22_88:
	s_or_b32 exec_lo, exec_lo, s37
	v_or_b32_e32 v3, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s36, s66, v3
	s_and_saveexec_b32 s38, s36
	s_cbranch_execz .LBB22_90
; %bb.89:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v4, v1 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s37, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s37, s71, v2, s37
	global_store_b32 v[1:2], v4, off
.LBB22_90:
	s_or_b32 exec_lo, exec_lo, s38
	v_or_b32_e32 v4, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s37, s66, v4
	s_and_saveexec_b32 s39, s37
	s_cbranch_execz .LBB22_92
; %bb.91:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v5, v1 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s38, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s38, s71, v2, s38
	global_store_b32 v[1:2], v5, off
.LBB22_92:
	s_or_b32 exec_lo, exec_lo, s39
	v_or_b32_e32 v5, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s38, s66, v5
	s_and_saveexec_b32 s40, s38
	s_cbranch_execz .LBB22_94
; %bb.93:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v6, v1 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s39, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s39, s71, v2, s39
	global_store_b32 v[1:2], v6, off
.LBB22_94:
	s_or_b32 exec_lo, exec_lo, s40
	v_or_b32_e32 v6, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s39, s66, v6
	s_and_saveexec_b32 s41, s39
	s_cbranch_execz .LBB22_96
; %bb.95:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v41, v1 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s40, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s40, s71, v2, s40
	global_store_b32 v[1:2], v41, off
.LBB22_96:
	s_or_b32 exec_lo, exec_lo, s41
	v_or_b32_e32 v41, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s40, s66, v41
	s_and_saveexec_b32 s42, s40
	s_cbranch_execz .LBB22_98
; %bb.97:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v42, v1 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s41, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s41, s71, v2, s41
	global_store_b32 v[1:2], v42, off
.LBB22_98:
	s_or_b32 exec_lo, exec_lo, s42
	v_or_b32_e32 v42, 0xc00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s41, s66, v42
	s_and_saveexec_b32 s43, s41
	s_cbranch_execz .LBB22_100
; %bb.99:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v43, v1 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s42, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s42, s71, v2, s42
	global_store_b32 v[1:2], v43, off
.LBB22_100:
	s_or_b32 exec_lo, exec_lo, s43
	v_or_b32_e32 v43, 0xe00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s42, s66, v43
	s_and_saveexec_b32 s44, s42
	s_cbranch_execz .LBB22_102
; %bb.101:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v44, v1 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s43, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s43, s71, v2, s43
	global_store_b32 v[1:2], v44, off
.LBB22_102:
	s_or_b32 exec_lo, exec_lo, s44
	v_or_b32_e32 v44, 0x1000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s43, s66, v44
	s_and_saveexec_b32 s45, s43
	s_cbranch_execz .LBB22_104
; %bb.103:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v45, v1 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s44, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s44, s71, v2, s44
	global_store_b32 v[1:2], v45, off
.LBB22_104:
	s_or_b32 exec_lo, exec_lo, s45
	v_or_b32_e32 v45, 0x1200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s44, s66, v45
	s_and_saveexec_b32 s46, s44
	s_cbranch_execz .LBB22_106
; %bb.105:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v46, v1 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s45, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s45, s71, v2, s45
	global_store_b32 v[1:2], v46, off
.LBB22_106:
	s_or_b32 exec_lo, exec_lo, s46
	v_or_b32_e32 v46, 0x1400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s45, s66, v46
	s_and_saveexec_b32 s47, s45
	s_cbranch_execz .LBB22_108
; %bb.107:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v47, v1 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s46, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s46, s71, v2, s46
	global_store_b32 v[1:2], v47, off
.LBB22_108:
	s_or_b32 exec_lo, exec_lo, s47
	v_or_b32_e32 v47, 0x1600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s46, s66, v47
	s_and_saveexec_b32 s48, s46
	s_cbranch_execz .LBB22_110
; %bb.109:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v48, v1 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s47, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s47, s71, v2, s47
	global_store_b32 v[1:2], v48, off
.LBB22_110:
	s_or_b32 exec_lo, exec_lo, s48
	v_or_b32_e32 v48, 0x1800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s47, s66, v48
	s_and_saveexec_b32 s49, s47
	s_cbranch_execz .LBB22_112
; %bb.111:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v49, v1 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s48, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s48, s71, v2, s48
	global_store_b32 v[1:2], v49, off
.LBB22_112:
	s_or_b32 exec_lo, exec_lo, s49
	v_or_b32_e32 v49, 0x1a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s48, s66, v49
	s_and_saveexec_b32 s50, s48
	s_cbranch_execz .LBB22_114
; %bb.113:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v50, v1 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s49, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s49, s71, v2, s49
	global_store_b32 v[1:2], v50, off
.LBB22_114:
	s_or_b32 exec_lo, exec_lo, s50
	v_or_b32_e32 v50, 0x1c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s49, s66, v50
	s_and_saveexec_b32 s51, s49
	s_cbranch_execz .LBB22_116
; %bb.115:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v51, v1 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s50, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s50, s71, v2, s50
	global_store_b32 v[1:2], v51, off
.LBB22_116:
	s_or_b32 exec_lo, exec_lo, s51
	v_or_b32_e32 v51, 0x1e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s50, s66, v51
	s_and_saveexec_b32 s52, s50
	s_cbranch_execz .LBB22_118
; %bb.117:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v52, v1 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s51, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s51, s71, v2, s51
	global_store_b32 v[1:2], v52, off
.LBB22_118:
	s_or_b32 exec_lo, exec_lo, s52
	v_or_b32_e32 v52, 0x2000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s51, s66, v52
	s_and_saveexec_b32 s53, s51
	s_cbranch_execz .LBB22_120
; %bb.119:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v53, v1 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s52, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s52, s71, v2, s52
	global_store_b32 v[1:2], v53, off
.LBB22_120:
	s_or_b32 exec_lo, exec_lo, s53
	v_or_b32_e32 v53, 0x2200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s52, s66, v53
	s_and_saveexec_b32 s54, s52
	s_cbranch_execz .LBB22_122
; %bb.121:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v54, v1 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s53, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s53, s71, v2, s53
	global_store_b32 v[1:2], v54, off
.LBB22_122:
	s_or_b32 exec_lo, exec_lo, s54
	v_or_b32_e32 v54, 0x2400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s53, s66, v54
	s_and_saveexec_b32 s55, s53
	s_cbranch_execz .LBB22_124
; %bb.123:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v55, v1 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s54, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s54, s71, v2, s54
	global_store_b32 v[1:2], v55, off
.LBB22_124:
	s_or_b32 exec_lo, exec_lo, s55
	v_or_b32_e32 v55, 0x2600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s54, s66, v55
	s_and_saveexec_b32 s56, s54
	s_cbranch_execz .LBB22_126
; %bb.125:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v56, v1 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s55, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s55, s71, v2, s55
	global_store_b32 v[1:2], v56, off
.LBB22_126:
	s_or_b32 exec_lo, exec_lo, s56
	v_or_b32_e32 v56, 0x2800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s55, s66, v56
	s_and_saveexec_b32 s57, s55
	s_cbranch_execz .LBB22_128
; %bb.127:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v57, v1 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s56, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s56, s71, v2, s56
	global_store_b32 v[1:2], v57, off
.LBB22_128:
	s_or_b32 exec_lo, exec_lo, s57
	v_or_b32_e32 v57, 0x2a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s56, s66, v57
	s_and_saveexec_b32 s58, s56
	s_cbranch_execz .LBB22_130
; %bb.129:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v58, v1 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s57, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s57, s71, v2, s57
	global_store_b32 v[1:2], v58, off
.LBB22_130:
	s_or_b32 exec_lo, exec_lo, s58
	v_or_b32_e32 v58, 0x2c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s57, s66, v58
	s_and_saveexec_b32 s59, s57
	s_cbranch_execz .LBB22_132
; %bb.131:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v59, v1 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s58, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s58, s71, v2, s58
	global_store_b32 v[1:2], v59, off
.LBB22_132:
	s_or_b32 exec_lo, exec_lo, s59
	v_or_b32_e32 v59, 0x2e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s58, s66, v59
	s_and_saveexec_b32 s60, s58
	s_cbranch_execz .LBB22_134
; %bb.133:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v60, v1 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s59, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s59, s71, v2, s59
	global_store_b32 v[1:2], v60, off
.LBB22_134:
	s_or_b32 exec_lo, exec_lo, s60
	v_or_b32_e32 v60, 0x3000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s59, s66, v60
	s_and_saveexec_b32 s61, s59
	s_cbranch_execz .LBB22_136
; %bb.135:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v61, v1 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s60, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s60, s71, v2, s60
	global_store_b32 v[1:2], v61, off
.LBB22_136:
	s_or_b32 exec_lo, exec_lo, s61
	v_or_b32_e32 v61, 0x3200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s60, s66, v61
	s_and_saveexec_b32 s62, s60
	s_cbranch_execz .LBB22_138
; %bb.137:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v62, v1 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s61, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s61, s71, v2, s61
	global_store_b32 v[1:2], v62, off
.LBB22_138:
	s_or_b32 exec_lo, exec_lo, s62
	v_or_b32_e32 v62, 0x3400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s61, s66, v62
	s_and_saveexec_b32 s63, s61
	s_cbranch_execz .LBB22_140
; %bb.139:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v63, v1 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s62, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s62, s71, v2, s62
	global_store_b32 v[1:2], v63, off
.LBB22_140:
	s_or_b32 exec_lo, exec_lo, s63
	v_or_b32_e32 v63, 0x3600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s62, s66, v63
	s_and_saveexec_b32 s64, s62
	s_cbranch_execz .LBB22_142
; %bb.141:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v64, v1 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s63, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s63, s71, v2, s63
	global_store_b32 v[1:2], v64, off
.LBB22_142:
	s_or_b32 exec_lo, exec_lo, s64
	v_or_b32_e32 v64, 0x3800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s63, s66, v64
	s_and_saveexec_b32 s65, s63
	s_cbranch_execz .LBB22_144
; %bb.143:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v65, v1 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s64, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s64, s71, v2, s64
	global_store_b32 v[1:2], v65, off
.LBB22_144:
	s_or_b32 exec_lo, exec_lo, s65
	v_or_b32_e32 v65, 0x3a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s64, s66, v65
	s_and_saveexec_b32 s82, s64
	s_cbranch_execz .LBB22_146
; %bb.145:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v66, v1 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s65, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s65, s71, v2, s65
	global_store_b32 v[1:2], v66, off
.LBB22_146:
	s_or_b32 exec_lo, exec_lo, s82
	v_or_b32_e32 v66, 0x3c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s65, s66, v66
	s_and_saveexec_b32 s82, s65
	s_cbranch_execz .LBB22_148
; %bb.147:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v67, v1 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s66, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s66, s71, v2, s66
	global_store_b32 v[1:2], v67, off
.LBB22_148:
	s_or_b32 exec_lo, exec_lo, s82
	s_add_u32 s66, s72, s84
	s_addc_u32 s82, s73, 0
	v_add_co_u32 v1, s66, s66, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v2, null, s82, 0, s66
                                        ; implicit-def: $vgpr67
	s_and_saveexec_b32 s66, s2
	s_xor_b32 s2, exec_lo, s66
	s_cbranch_execz .LBB22_150
; %bb.149:
	global_load_u8 v67, v[1:2], off
.LBB22_150:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr68
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB22_152
; %bb.151:
	global_load_u8 v68, v[1:2], off offset:1
.LBB22_152:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr69
	s_and_saveexec_b32 s2, s4
	s_cbranch_execz .LBB22_154
; %bb.153:
	global_load_u8 v69, v[1:2], off offset:2
.LBB22_154:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr70
	s_and_saveexec_b32 s2, s5
	s_cbranch_execz .LBB22_156
; %bb.155:
	global_load_u8 v70, v[1:2], off offset:3
.LBB22_156:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr71
	s_and_saveexec_b32 s2, s6
	s_cbranch_execz .LBB22_158
; %bb.157:
	global_load_u8 v71, v[1:2], off offset:4
.LBB22_158:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr72
	s_and_saveexec_b32 s2, s7
	s_cbranch_execz .LBB22_160
; %bb.159:
	global_load_u8 v72, v[1:2], off offset:5
.LBB22_160:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr73
	s_and_saveexec_b32 s2, s8
	s_cbranch_execz .LBB22_162
; %bb.161:
	global_load_u8 v73, v[1:2], off offset:6
.LBB22_162:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr74
	s_and_saveexec_b32 s2, s9
	s_cbranch_execz .LBB22_164
; %bb.163:
	global_load_u8 v74, v[1:2], off offset:7
.LBB22_164:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr75
	s_and_saveexec_b32 s2, s10
	s_cbranch_execz .LBB22_166
; %bb.165:
	global_load_u8 v75, v[1:2], off offset:8
.LBB22_166:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr76
	s_and_saveexec_b32 s2, s11
	s_cbranch_execz .LBB22_168
; %bb.167:
	global_load_u8 v76, v[1:2], off offset:9
.LBB22_168:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr77
	s_and_saveexec_b32 s2, s12
	s_cbranch_execz .LBB22_170
; %bb.169:
	global_load_u8 v77, v[1:2], off offset:10
.LBB22_170:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr78
	s_and_saveexec_b32 s2, s13
	s_cbranch_execz .LBB22_172
; %bb.171:
	global_load_u8 v78, v[1:2], off offset:11
.LBB22_172:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr79
	s_and_saveexec_b32 s2, s14
	s_cbranch_execz .LBB22_174
; %bb.173:
	global_load_u8 v79, v[1:2], off offset:12
.LBB22_174:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr80
	s_and_saveexec_b32 s2, s16
	s_cbranch_execz .LBB22_176
; %bb.175:
	global_load_u8 v80, v[1:2], off offset:13
.LBB22_176:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr81
	s_and_saveexec_b32 s2, s17
	s_cbranch_execz .LBB22_178
; %bb.177:
	global_load_u8 v81, v[1:2], off offset:14
.LBB22_178:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr82
	s_and_saveexec_b32 s2, s18
	s_cbranch_execz .LBB22_180
; %bb.179:
	global_load_u8 v82, v[1:2], off offset:15
.LBB22_180:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr83
	s_and_saveexec_b32 s2, s19
	s_cbranch_execz .LBB22_182
; %bb.181:
	global_load_u8 v83, v[1:2], off offset:16
.LBB22_182:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr84
	s_and_saveexec_b32 s2, s20
	s_cbranch_execz .LBB22_184
; %bb.183:
	global_load_u8 v84, v[1:2], off offset:17
.LBB22_184:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr85
	s_and_saveexec_b32 s2, s21
	s_cbranch_execz .LBB22_186
; %bb.185:
	global_load_u8 v85, v[1:2], off offset:18
.LBB22_186:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr86
	s_and_saveexec_b32 s2, s22
	s_cbranch_execz .LBB22_188
; %bb.187:
	global_load_u8 v86, v[1:2], off offset:19
.LBB22_188:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr87
	s_and_saveexec_b32 s2, s23
	s_cbranch_execz .LBB22_190
; %bb.189:
	global_load_u8 v87, v[1:2], off offset:20
.LBB22_190:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr88
	s_and_saveexec_b32 s2, s24
	s_cbranch_execz .LBB22_192
; %bb.191:
	global_load_u8 v88, v[1:2], off offset:21
.LBB22_192:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr89
	s_and_saveexec_b32 s2, s25
	s_cbranch_execz .LBB22_194
; %bb.193:
	global_load_u8 v89, v[1:2], off offset:22
.LBB22_194:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr90
	s_and_saveexec_b32 s2, s26
	s_cbranch_execz .LBB22_196
; %bb.195:
	global_load_u8 v90, v[1:2], off offset:23
.LBB22_196:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr91
	s_and_saveexec_b32 s2, s27
	s_cbranch_execz .LBB22_198
; %bb.197:
	global_load_u8 v91, v[1:2], off offset:24
.LBB22_198:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr92
	s_and_saveexec_b32 s2, s28
	s_cbranch_execz .LBB22_200
; %bb.199:
	global_load_u8 v92, v[1:2], off offset:25
.LBB22_200:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr93
	s_and_saveexec_b32 s2, s29
	s_cbranch_execz .LBB22_202
; %bb.201:
	global_load_u8 v93, v[1:2], off offset:26
.LBB22_202:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr94
	s_and_saveexec_b32 s2, s30
	s_cbranch_execz .LBB22_204
; %bb.203:
	global_load_u8 v94, v[1:2], off offset:27
.LBB22_204:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr95
	s_and_saveexec_b32 s2, s31
	s_cbranch_execz .LBB22_206
; %bb.205:
	global_load_u8 v95, v[1:2], off offset:28
.LBB22_206:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr96
	s_and_saveexec_b32 s2, s33
	s_cbranch_execz .LBB22_208
; %bb.207:
	global_load_u8 v96, v[1:2], off offset:29
.LBB22_208:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr97
	s_and_saveexec_b32 s2, s34
	s_cbranch_execz .LBB22_210
; %bb.209:
	global_load_u8 v97, v[1:2], off offset:30
.LBB22_210:                             ; %_ZN7rocprim25block_load_direct_blockedIPhhLj31EEEvjT_RAT1__T0_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s2, s35
	s_cbranch_execz .LBB22_212
; %bb.211:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
.LBB22_212:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr2
	s_and_saveexec_b32 s2, s36
	s_cbranch_execz .LBB22_214
; %bb.213:
	v_lshlrev_b32_e32 v2, 2, v0
	ds_load_b32 v2, v2 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v2, s80, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v2, s67, v2
.LBB22_214:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr98
	s_and_saveexec_b32 s2, s37
	s_cbranch_execz .LBB22_216
; %bb.215:
	v_lshlrev_b32_e32 v98, 2, v0
	ds_load_b32 v98, v98 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v98, s80, v98
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v98, s67, v98
.LBB22_216:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr99
	s_and_saveexec_b32 s2, s38
	s_cbranch_execz .LBB22_218
; %bb.217:
	v_lshlrev_b32_e32 v99, 2, v0
	ds_load_b32 v99, v99 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v99, s80, v99
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v99, s67, v99
.LBB22_218:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr100
	s_and_saveexec_b32 s2, s39
	s_cbranch_execz .LBB22_220
; %bb.219:
	v_lshlrev_b32_e32 v100, 2, v0
	ds_load_b32 v100, v100 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v100, s80, v100
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v100, s67, v100
.LBB22_220:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr101
	s_and_saveexec_b32 s2, s40
	s_cbranch_execz .LBB22_222
; %bb.221:
	v_lshlrev_b32_e32 v101, 2, v0
	ds_load_b32 v101, v101 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v101, s80, v101
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v101, s67, v101
.LBB22_222:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr102
	s_and_saveexec_b32 s2, s41
	s_cbranch_execz .LBB22_224
; %bb.223:
	v_lshlrev_b32_e32 v102, 2, v0
	ds_load_b32 v102, v102 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v102, s80, v102
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v102, s67, v102
.LBB22_224:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr103
	s_and_saveexec_b32 s2, s42
	s_cbranch_execz .LBB22_226
; %bb.225:
	v_lshlrev_b32_e32 v103, 2, v0
	ds_load_b32 v103, v103 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v103, s80, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v103, s67, v103
.LBB22_226:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr104
	s_and_saveexec_b32 s2, s43
	s_cbranch_execz .LBB22_228
; %bb.227:
	v_lshlrev_b32_e32 v104, 2, v0
	ds_load_b32 v104, v104 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v104, s80, v104
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v104, s67, v104
.LBB22_228:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr105
	s_and_saveexec_b32 s2, s44
	s_cbranch_execz .LBB22_230
; %bb.229:
	v_lshlrev_b32_e32 v105, 2, v0
	ds_load_b32 v105, v105 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v105, s80, v105
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v105, s67, v105
.LBB22_230:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr106
	s_and_saveexec_b32 s2, s45
	s_cbranch_execz .LBB22_232
; %bb.231:
	v_lshlrev_b32_e32 v106, 2, v0
	ds_load_b32 v106, v106 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v106, s80, v106
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v106, s67, v106
.LBB22_232:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr107
	s_and_saveexec_b32 s2, s46
	s_cbranch_execz .LBB22_234
; %bb.233:
	v_lshlrev_b32_e32 v107, 2, v0
	ds_load_b32 v107, v107 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v107, s80, v107
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v107, s67, v107
.LBB22_234:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr108
	s_and_saveexec_b32 s2, s47
	s_cbranch_execz .LBB22_236
; %bb.235:
	v_lshlrev_b32_e32 v108, 2, v0
	ds_load_b32 v108, v108 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v108, s80, v108
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v108, s67, v108
.LBB22_236:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr109
	s_and_saveexec_b32 s2, s48
	s_cbranch_execz .LBB22_238
; %bb.237:
	v_lshlrev_b32_e32 v109, 2, v0
	ds_load_b32 v109, v109 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v109, s80, v109
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v109, s67, v109
.LBB22_238:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr110
	s_and_saveexec_b32 s2, s49
	s_cbranch_execz .LBB22_240
; %bb.239:
	v_lshlrev_b32_e32 v110, 2, v0
	ds_load_b32 v110, v110 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v110, s80, v110
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v110, s67, v110
.LBB22_240:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr111
	s_and_saveexec_b32 s2, s50
	s_cbranch_execz .LBB22_242
; %bb.241:
	v_lshlrev_b32_e32 v111, 2, v0
	ds_load_b32 v111, v111 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v111, s80, v111
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v111, s67, v111
.LBB22_242:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr112
	s_and_saveexec_b32 s2, s51
	s_cbranch_execz .LBB22_244
; %bb.243:
	v_lshlrev_b32_e32 v112, 2, v0
	ds_load_b32 v112, v112 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v112, s80, v112
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v112, s67, v112
.LBB22_244:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr113
	s_and_saveexec_b32 s2, s52
	s_cbranch_execz .LBB22_246
; %bb.245:
	v_lshlrev_b32_e32 v113, 2, v0
	ds_load_b32 v113, v113 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v113, s80, v113
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v113, s67, v113
.LBB22_246:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr114
	s_and_saveexec_b32 s2, s53
	s_cbranch_execz .LBB22_248
; %bb.247:
	v_lshlrev_b32_e32 v114, 2, v0
	ds_load_b32 v114, v114 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v114, s80, v114
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v114, s67, v114
.LBB22_248:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr115
	s_and_saveexec_b32 s2, s54
	s_cbranch_execz .LBB22_250
; %bb.249:
	v_lshlrev_b32_e32 v115, 2, v0
	ds_load_b32 v115, v115 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v115, s80, v115
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v115, s67, v115
.LBB22_250:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr116
	s_and_saveexec_b32 s2, s55
	s_cbranch_execz .LBB22_252
; %bb.251:
	v_lshlrev_b32_e32 v116, 2, v0
	ds_load_b32 v116, v116 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v116, s80, v116
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v116, s67, v116
.LBB22_252:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr117
	s_and_saveexec_b32 s2, s56
	s_cbranch_execz .LBB22_254
; %bb.253:
	v_lshlrev_b32_e32 v117, 2, v0
	ds_load_b32 v117, v117 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v117, s80, v117
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v117, s67, v117
.LBB22_254:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr118
	s_and_saveexec_b32 s2, s57
	s_cbranch_execz .LBB22_256
; %bb.255:
	v_lshlrev_b32_e32 v118, 2, v0
	ds_load_b32 v118, v118 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v118, s80, v118
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v118, s67, v118
.LBB22_256:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr119
	s_and_saveexec_b32 s2, s58
	s_cbranch_execz .LBB22_258
; %bb.257:
	v_lshlrev_b32_e32 v119, 2, v0
	ds_load_b32 v119, v119 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v119, s80, v119
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v119, s67, v119
.LBB22_258:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr120
	s_and_saveexec_b32 s2, s59
	s_cbranch_execz .LBB22_260
; %bb.259:
	v_lshlrev_b32_e32 v120, 2, v0
	ds_load_b32 v120, v120 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v120, s80, v120
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v120, s67, v120
.LBB22_260:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr121
	s_and_saveexec_b32 s2, s60
	s_cbranch_execz .LBB22_262
; %bb.261:
	v_lshlrev_b32_e32 v121, 2, v0
	ds_load_b32 v121, v121 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v121, s80, v121
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v121, s67, v121
.LBB22_262:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr122
	s_and_saveexec_b32 s2, s61
	s_cbranch_execz .LBB22_264
; %bb.263:
	v_lshlrev_b32_e32 v122, 2, v0
	ds_load_b32 v122, v122 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v122, s80, v122
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v122, s67, v122
.LBB22_264:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr123
	s_and_saveexec_b32 s2, s62
	s_cbranch_execz .LBB22_266
; %bb.265:
	v_lshlrev_b32_e32 v123, 2, v0
	ds_load_b32 v123, v123 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v123, s80, v123
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v123, s67, v123
.LBB22_266:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr124
	s_and_saveexec_b32 s2, s63
	s_cbranch_execz .LBB22_268
; %bb.267:
	v_lshlrev_b32_e32 v124, 2, v0
	ds_load_b32 v124, v124 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v124, s80, v124
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v124, s67, v124
.LBB22_268:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr125
	s_and_saveexec_b32 s2, s64
	s_cbranch_execz .LBB22_270
; %bb.269:
	v_lshlrev_b32_e32 v125, 2, v0
	ds_load_b32 v125, v125 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v125, s80, v125
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v125, s67, v125
.LBB22_270:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr126
	s_and_saveexec_b32 s2, s65
	s_cbranch_execz .LBB22_272
; %bb.271:
	v_lshlrev_b32_e32 v126, 2, v0
	ds_load_b32 v126, v126 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v126, s80, v126
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v126, s67, v126
.LBB22_272:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b8 v9, v67 offset:64
	ds_store_b8 v10, v68 offset:64
	ds_store_b8 v11, v69 offset:64
	ds_store_b8 v12, v70 offset:64
	ds_store_b8 v13, v71 offset:64
	ds_store_b8 v14, v72 offset:64
	ds_store_b8 v15, v73 offset:64
	ds_store_b8 v16, v74 offset:64
	ds_store_b8 v17, v75 offset:64
	ds_store_b8 v18, v76 offset:64
	ds_store_b8 v19, v77 offset:64
	ds_store_b8 v20, v78 offset:64
	ds_store_b8 v21, v79 offset:64
	ds_store_b8 v22, v80 offset:64
	ds_store_b8 v23, v81 offset:64
	ds_store_b8 v24, v82 offset:64
	ds_store_b8 v25, v83 offset:64
	ds_store_b8 v26, v84 offset:64
	ds_store_b8 v27, v85 offset:64
	ds_store_b8 v28, v86 offset:64
	ds_store_b8 v29, v87 offset:64
	ds_store_b8 v30, v88 offset:64
	ds_store_b8 v31, v89 offset:64
	ds_store_b8 v33, v90 offset:64
	ds_store_b8 v34, v91 offset:64
	ds_store_b8 v35, v92 offset:64
	ds_store_b8 v36, v93 offset:64
	ds_store_b8 v37, v94 offset:64
	ds_store_b8 v38, v95 offset:64
	ds_store_b8 v39, v96 offset:64
	ds_store_b8 v40, v97 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s2, s35
	s_cbranch_execz .LBB22_274
; %bb.273:
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	ds_load_u8 v9, v0 offset:64
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v9, s[74:75]
.LBB22_274:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s36
	s_cbranch_execz .LBB22_276
; %bb.275:
	v_lshlrev_b32_e32 v1, 2, v2
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:576
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v3
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_276:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s37
	s_cbranch_execz .LBB22_278
; %bb.277:
	v_lshlrev_b32_e32 v1, 2, v98
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:1088
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v4
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_278:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s38
	s_cbranch_execz .LBB22_280
; %bb.279:
	v_lshlrev_b32_e32 v1, 2, v99
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:1600
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v5
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_280:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s39
	s_cbranch_execz .LBB22_282
; %bb.281:
	v_lshlrev_b32_e32 v1, 2, v100
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:2112
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v6
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_282:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s40
	s_cbranch_execz .LBB22_284
; %bb.283:
	v_lshlrev_b32_e32 v1, 2, v101
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:2624
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v41
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_284:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s41
	s_cbranch_execz .LBB22_286
; %bb.285:
	v_lshlrev_b32_e32 v1, 2, v102
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:3136
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v42
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_286:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s42
	s_cbranch_execz .LBB22_288
; %bb.287:
	v_lshlrev_b32_e32 v1, 2, v103
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:3648
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v43
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_288:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s43
	s_cbranch_execz .LBB22_290
; %bb.289:
	v_lshlrev_b32_e32 v1, 2, v104
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:4160
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v44
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_290:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s44
	s_cbranch_execz .LBB22_292
; %bb.291:
	v_lshlrev_b32_e32 v1, 2, v105
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:4672
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v45
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_292:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s45
	s_cbranch_execz .LBB22_294
; %bb.293:
	v_lshlrev_b32_e32 v1, 2, v106
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:5184
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v46
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_294:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s46
	s_cbranch_execz .LBB22_296
; %bb.295:
	v_lshlrev_b32_e32 v1, 2, v107
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:5696
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v47
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_296:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s47
	s_cbranch_execz .LBB22_298
; %bb.297:
	v_lshlrev_b32_e32 v1, 2, v108
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:6208
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v48
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_298:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s48
	s_cbranch_execz .LBB22_300
; %bb.299:
	v_lshlrev_b32_e32 v1, 2, v109
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:6720
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v49
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_300:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s49
	s_cbranch_execz .LBB22_302
; %bb.301:
	v_lshlrev_b32_e32 v1, 2, v110
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:7232
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v50
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_302:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s50
	s_cbranch_execz .LBB22_304
; %bb.303:
	v_lshlrev_b32_e32 v1, 2, v111
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:7744
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v51
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_304:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s51
	s_cbranch_execz .LBB22_306
; %bb.305:
	v_lshlrev_b32_e32 v1, 2, v112
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:8256
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v52
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_306:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s52
	s_cbranch_execz .LBB22_308
; %bb.307:
	v_lshlrev_b32_e32 v1, 2, v113
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:8768
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v53
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_308:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s53
	s_cbranch_execz .LBB22_310
; %bb.309:
	v_lshlrev_b32_e32 v1, 2, v114
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:9280
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v54
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_310:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s54
	s_cbranch_execz .LBB22_312
; %bb.311:
	v_lshlrev_b32_e32 v1, 2, v115
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:9792
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v55
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_312:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s55
	s_cbranch_execz .LBB22_314
; %bb.313:
	v_lshlrev_b32_e32 v1, 2, v116
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:10304
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v56
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_314:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s56
	s_cbranch_execz .LBB22_316
; %bb.315:
	v_lshlrev_b32_e32 v1, 2, v117
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:10816
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v57
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_316:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s57
	s_cbranch_execz .LBB22_318
; %bb.317:
	v_lshlrev_b32_e32 v1, 2, v118
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:11328
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v58
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_318:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s58
	s_cbranch_execz .LBB22_320
; %bb.319:
	v_lshlrev_b32_e32 v1, 2, v119
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:11840
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v59
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_320:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s59
	s_cbranch_execz .LBB22_322
; %bb.321:
	v_lshlrev_b32_e32 v1, 2, v120
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:12352
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v60
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_322:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s60
	s_cbranch_execz .LBB22_324
; %bb.323:
	v_lshlrev_b32_e32 v1, 2, v121
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:12864
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v61
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_324:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s61
	s_cbranch_execz .LBB22_326
; %bb.325:
	v_lshlrev_b32_e32 v1, 2, v122
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:13376
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v62
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_326:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s62
	s_cbranch_execz .LBB22_328
; %bb.327:
	v_lshlrev_b32_e32 v1, 2, v123
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:13888
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v63
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_328:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s63
	s_cbranch_execz .LBB22_330
; %bb.329:
	v_lshlrev_b32_e32 v1, 2, v124
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:14400
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v64
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_330:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s64
	s_cbranch_execz .LBB22_332
; %bb.331:
	v_lshlrev_b32_e32 v1, 2, v125
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:14912
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v65
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_332:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s65
	s_cbranch_execz .LBB22_334
; %bb.333:
	v_lshlrev_b32_e32 v1, 2, v126
	ds_load_b32 v1, v1
	ds_load_u8 v2, v0 offset:15424
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v66
	s_waitcnt lgkmcnt(0)
	global_store_b8 v1, v2, s[74:75]
.LBB22_334:
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b32 s2, s[0:1], 0x50
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s2
	s_mov_b32 s2, 0
	s_cselect_b32 s3, -1, 0
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s3
	s_xor_b32 s3, exec_lo, s4
; %bb.335:
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v7, v8
	s_mov_b32 s7, exec_lo
; %bb.336:                              ; %Flow103
	s_or_b32 exec_lo, exec_lo, s3
	s_branch .LBB22_338
.LBB22_337:
	s_mov_b32 s2, -1
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
.LBB22_338:                             ; %Flow102
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB22_367
; %bb.339:
	s_mov_b32 s85, 0
	v_lshlrev_b32_e32 v21, 2, v32
	s_lshl_b64 s[2:3], s[84:85], 2
	v_mov_b32_e32 v33, 0
	s_add_u32 s2, s68, s2
	s_addc_u32 s3, s69, s3
	v_or_b32_e32 v34, 0xfffffe00, v0
	s_clause 0x7
	global_load_b128 v[1:4], v21, s[2:3] offset:48
	global_load_b128 v[9:12], v21, s[2:3] offset:32
	global_load_b128 v[17:20], v21, s[2:3] offset:16
	global_load_b128 v[25:28], v21, s[2:3]
	global_load_b96 v[29:31], v21, s[2:3] offset:112
	global_load_b128 v[5:8], v21, s[2:3] offset:96
	global_load_b128 v[13:16], v21, s[2:3] offset:80
	global_load_b128 v[21:24], v21, s[2:3] offset:64
	v_lshlrev_b32_e32 v35, 2, v0
.LBB22_340:                             ; %.lr.ph.i.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v34, 0x200, v34
	ds_store_b32 v35, v33
	v_add_nc_u32_e32 v35, 0x800, v35
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v34
	s_or_b32 s85, vcc_lo, s85
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s85
	s_cbranch_execnz .LBB22_340
; %bb.341:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s85
	s_waitcnt vmcnt(4)
	v_lshrrev_b32_e32 v33, s80, v25
	s_lshl_b32 s2, -1, s81
	v_lshrrev_b32_e32 v38, s80, v27
	s_not_b32 s8, s2
	s_mov_b32 s2, exec_lo
	v_and_b32_e32 v33, s8, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v34, 9, v33
	v_lshrrev_b32_e32 v33, 3, v33
	v_and_or_b32 v34, 0xe00, v34, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v34, 1, v34
	v_add_lshl_u32 v33, v34, v33, 1
	v_lshrrev_b32_e32 v34, s80, v26
	ds_load_u16 v35, v33
	v_and_b32_e32 v34, s8, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 9, v34
	v_lshrrev_b32_e32 v34, 3, v34
	v_and_or_b32 v36, 0xe00, v36, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 1, v36
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v37, v35, 1
	v_add_lshl_u32 v34, v36, v34, 1
	ds_store_b16 v33, v37
	ds_load_u16 v36, v34
	v_and_b32_e32 v37, s8, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 9, v37
	v_lshrrev_b32_e32 v37, 3, v37
	v_and_or_b32 v38, 0xe00, v38, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 1, v38
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v39, v36, 1
	v_add_lshl_u32 v43, v38, v37, 1
	v_lshrrev_b32_e32 v38, s80, v28
	ds_store_b16 v34, v39
	ds_load_u16 v37, v43
	v_and_b32_e32 v38, s8, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 9, v38
	v_lshrrev_b32_e32 v38, 3, v38
	v_and_or_b32 v39, 0xe00, v39, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 1, v39
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v40, v37, 1
	v_add_lshl_u32 v45, v39, v38, 1
	v_lshrrev_b32_e32 v39, s80, v17
	ds_store_b16 v43, v40
	ds_load_u16 v38, v45
	v_and_b32_e32 v39, s8, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 9, v39
	v_lshrrev_b32_e32 v39, 3, v39
	v_and_or_b32 v40, 0xe00, v40, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 1, v40
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v41, v38, 1
	v_add_lshl_u32 v47, v40, v39, 1
	v_lshrrev_b32_e32 v40, s80, v18
	ds_store_b16 v45, v41
	ds_load_u16 v39, v47
	v_and_b32_e32 v40, s8, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 9, v40
	v_lshrrev_b32_e32 v40, 3, v40
	v_and_or_b32 v41, 0xe00, v41, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 1, v41
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v42, v39, 1
	v_add_lshl_u32 v49, v41, v40, 1
	v_lshrrev_b32_e32 v41, s80, v19
	ds_store_b16 v47, v42
	ds_load_u16 v40, v49
	v_and_b32_e32 v41, s8, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 9, v41
	v_lshrrev_b32_e32 v41, 3, v41
	v_and_or_b32 v42, 0xe00, v42, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 1, v42
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v44, v40, 1
	v_add_lshl_u32 v51, v42, v41, 1
	v_lshrrev_b32_e32 v42, s80, v20
	ds_store_b16 v49, v44
	ds_load_u16 v41, v51
	v_and_b32_e32 v42, s8, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 9, v42
	v_lshrrev_b32_e32 v42, 3, v42
	v_and_or_b32 v44, 0xe00, v44, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 1, v44
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v46, v41, 1
	v_add_lshl_u32 v53, v44, v42, 1
	v_lshrrev_b32_e32 v44, s80, v9
	ds_store_b16 v51, v46
	ds_load_u16 v42, v53
	v_and_b32_e32 v44, s8, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 9, v44
	v_lshrrev_b32_e32 v44, 3, v44
	v_and_or_b32 v46, 0xe00, v46, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 1, v46
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v48, v42, 1
	v_add_lshl_u32 v55, v46, v44, 1
	v_lshrrev_b32_e32 v46, s80, v10
	ds_store_b16 v53, v48
	ds_load_u16 v44, v55
	v_and_b32_e32 v46, s8, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 9, v46
	v_lshrrev_b32_e32 v46, 3, v46
	v_and_or_b32 v48, 0xe00, v48, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 1, v48
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v50, v44, 1
	v_add_lshl_u32 v57, v48, v46, 1
	v_lshrrev_b32_e32 v48, s80, v11
	ds_store_b16 v55, v50
	ds_load_u16 v46, v57
	v_and_b32_e32 v48, s8, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 9, v48
	v_lshrrev_b32_e32 v48, 3, v48
	v_and_or_b32 v50, 0xe00, v50, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 1, v50
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v52, v46, 1
	v_add_lshl_u32 v59, v50, v48, 1
	v_lshrrev_b32_e32 v50, s80, v12
	ds_store_b16 v57, v52
	ds_load_u16 v48, v59
	v_and_b32_e32 v50, s8, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 9, v50
	v_lshrrev_b32_e32 v50, 3, v50
	v_and_or_b32 v52, 0xe00, v52, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 1, v52
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v54, v48, 1
	v_add_lshl_u32 v61, v52, v50, 1
	v_lshrrev_b32_e32 v52, s80, v1
	ds_store_b16 v59, v54
	ds_load_u16 v50, v61
	v_and_b32_e32 v52, s8, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 9, v52
	v_lshrrev_b32_e32 v52, 3, v52
	v_and_or_b32 v54, 0xe00, v54, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 1, v54
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v56, v50, 1
	v_add_lshl_u32 v63, v54, v52, 1
	v_lshrrev_b32_e32 v54, s80, v2
	ds_store_b16 v61, v56
	ds_load_u16 v52, v63
	v_and_b32_e32 v54, s8, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 9, v54
	v_lshrrev_b32_e32 v54, 3, v54
	v_and_or_b32 v56, 0xe00, v56, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 1, v56
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v58, v52, 1
	v_add_lshl_u32 v65, v56, v54, 1
	v_lshrrev_b32_e32 v56, s80, v3
	ds_store_b16 v63, v58
	ds_load_u16 v54, v65
	v_and_b32_e32 v56, s8, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 9, v56
	v_lshrrev_b32_e32 v56, 3, v56
	v_and_or_b32 v58, 0xe00, v58, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 1, v58
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v60, v54, 1
	v_add_lshl_u32 v67, v58, v56, 1
	v_lshrrev_b32_e32 v58, s80, v4
	ds_store_b16 v65, v60
	ds_load_u16 v56, v67
	v_and_b32_e32 v58, s8, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 9, v58
	v_lshrrev_b32_e32 v58, 3, v58
	v_and_or_b32 v60, 0xe00, v60, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 1, v60
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v62, v56, 1
	v_add_lshl_u32 v69, v60, v58, 1
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v60, s80, v21
	ds_store_b16 v67, v62
	ds_load_u16 v58, v69
	v_and_b32_e32 v60, s8, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 9, v60
	v_lshrrev_b32_e32 v60, 3, v60
	v_and_or_b32 v62, 0xe00, v62, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 1, v62
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v64, v58, 1
	v_add_lshl_u32 v71, v62, v60, 1
	v_lshrrev_b32_e32 v62, s80, v22
	ds_store_b16 v69, v64
	ds_load_u16 v60, v71
	v_and_b32_e32 v62, s8, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 9, v62
	v_lshrrev_b32_e32 v62, 3, v62
	v_and_or_b32 v64, 0xe00, v64, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 1, v64
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v66, v60, 1
	v_add_lshl_u32 v73, v64, v62, 1
	v_lshrrev_b32_e32 v64, s80, v23
	ds_store_b16 v71, v66
	ds_load_u16 v62, v73
	v_and_b32_e32 v64, s8, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 9, v64
	v_lshrrev_b32_e32 v64, 3, v64
	v_and_or_b32 v66, 0xe00, v66, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 1, v66
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v68, v62, 1
	v_add_lshl_u32 v75, v66, v64, 1
	v_lshrrev_b32_e32 v66, s80, v24
	ds_store_b16 v73, v68
	ds_load_u16 v64, v75
	v_and_b32_e32 v66, s8, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 9, v66
	v_lshrrev_b32_e32 v66, 3, v66
	v_and_or_b32 v68, 0xe00, v68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 1, v68
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v70, v64, 1
	v_add_lshl_u32 v77, v68, v66, 1
	v_lshrrev_b32_e32 v68, s80, v13
	ds_store_b16 v75, v70
	ds_load_u16 v66, v77
	v_and_b32_e32 v68, s8, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 9, v68
	v_lshrrev_b32_e32 v68, 3, v68
	v_and_or_b32 v70, 0xe00, v70, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 1, v70
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v72, v66, 1
	v_add_lshl_u32 v79, v70, v68, 1
	v_lshrrev_b32_e32 v70, s80, v14
	ds_store_b16 v77, v72
	ds_load_u16 v68, v79
	v_and_b32_e32 v70, s8, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 9, v70
	v_lshrrev_b32_e32 v70, 3, v70
	v_and_or_b32 v72, 0xe00, v72, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 1, v72
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v74, v68, 1
	v_add_lshl_u32 v81, v72, v70, 1
	v_lshrrev_b32_e32 v72, s80, v15
	ds_store_b16 v79, v74
	ds_load_u16 v70, v81
	v_and_b32_e32 v72, s8, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 9, v72
	v_lshrrev_b32_e32 v72, 3, v72
	v_and_or_b32 v74, 0xe00, v74, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 1, v74
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v76, v70, 1
	v_add_lshl_u32 v83, v74, v72, 1
	v_lshrrev_b32_e32 v74, s80, v16
	ds_store_b16 v81, v76
	ds_load_u16 v72, v83
	v_and_b32_e32 v74, s8, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 9, v74
	v_lshrrev_b32_e32 v74, 3, v74
	v_and_or_b32 v76, 0xe00, v76, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 1, v76
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v78, v72, 1
	v_add_lshl_u32 v85, v76, v74, 1
	v_lshrrev_b32_e32 v76, s80, v5
	ds_store_b16 v83, v78
	ds_load_u16 v74, v85
	v_and_b32_e32 v76, s8, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 9, v76
	v_lshrrev_b32_e32 v76, 3, v76
	v_and_or_b32 v78, 0xe00, v78, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 1, v78
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v80, v74, 1
	v_add_lshl_u32 v87, v78, v76, 1
	v_lshrrev_b32_e32 v78, s80, v6
	ds_store_b16 v85, v80
	ds_load_u16 v76, v87
	v_and_b32_e32 v78, s8, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 9, v78
	v_lshrrev_b32_e32 v78, 3, v78
	v_and_or_b32 v80, 0xe00, v80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 1, v80
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v82, v76, 1
	v_add_lshl_u32 v89, v80, v78, 1
	v_lshrrev_b32_e32 v80, s80, v7
	ds_store_b16 v87, v82
	ds_load_u16 v78, v89
	v_and_b32_e32 v80, s8, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 9, v80
	v_lshrrev_b32_e32 v80, 3, v80
	v_and_or_b32 v82, 0xe00, v82, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 1, v82
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v84, v78, 1
	v_add_lshl_u32 v90, v82, v80, 1
	v_lshrrev_b32_e32 v82, s80, v8
	ds_store_b16 v89, v84
	ds_load_u16 v80, v90
	v_and_b32_e32 v82, s8, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 9, v82
	v_lshrrev_b32_e32 v82, 3, v82
	v_and_or_b32 v84, 0xe00, v84, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 1, v84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v86, v80, 1
	v_add_lshl_u32 v91, v84, v82, 1
	v_lshrrev_b32_e32 v84, s80, v29
	ds_store_b16 v90, v86
	ds_load_u16 v82, v91
	v_and_b32_e32 v84, s8, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 9, v84
	v_lshrrev_b32_e32 v84, 3, v84
	v_and_or_b32 v86, 0xe00, v86, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 1, v86
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v88, v82, 1
	v_add_lshl_u32 v92, v86, v84, 1
	v_lshrrev_b32_e32 v86, s80, v30
	ds_store_b16 v91, v88
	ds_load_u16 v84, v92
	v_and_b32_e32 v86, s8, v86
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 9, v86
	v_lshrrev_b32_e32 v86, 3, v86
	v_and_or_b32 v88, 0xe00, v88, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 1, v88
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v94, v84, 1
	v_add_lshl_u32 v93, v88, v86, 1
	v_lshrrev_b32_e32 v88, s80, v31
	ds_store_b16 v92, v94
	ds_load_u16 v86, v93
	v_and_b32_e32 v88, s8, v88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 9, v88
	v_lshrrev_b32_e32 v88, 3, v88
	v_and_or_b32 v94, 0xe00, v94, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 1, v94
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v86, 1
	v_add_lshl_u32 v94, v94, v88, 1
	ds_store_b16 v93, v95
	ds_load_u16 v88, v94
	v_lshlrev_b32_e32 v95, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v88, 1
	ds_store_b16 v94, v96
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[96:99], v95 offset1:1
	ds_load_2addr_b64 v[100:103], v95 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v96, v97, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v96, v96, v98, v99
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v97, v96, v100, v101
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_or_b32_e32 v100, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v97, v97, v102, v103
	v_and_b32_e32 v98, 15, v96
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v99, v97 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s3, 0, v98
	v_cmp_lt_u32_e64 s4, 1, v98
	v_cmp_lt_u32_e64 s5, 3, v98
	v_cmp_lt_u32_e64 s6, 7, v98
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, v99, 0, s3
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v99, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v97, v97, v99
	v_mov_b32_dpp v99, v97 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, 0, v99, s5
	v_add_nc_u32_e32 v97, v97, v99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v98, 0, v99, s6
	v_bfe_i32 v99, v96, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v97, v97, v98
	ds_swizzle_b32 v98, v97 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v98, v99, v98
	v_lshrrev_b32_e32 v99, 5, v0
	v_add_nc_u32_e32 v97, v97, v98
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v99
	v_cmpx_eq_u32_e64 v100, v0
	s_cbranch_execz .LBB22_343
; %bb.342:
	ds_store_b32 v98, v97 offset:16384
.LBB22_343:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_lt_u32_e64 s2, 15, v0
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s9, vcc_lo
	s_cbranch_execz .LBB22_345
; %bb.344:
	v_mad_i32_i24 v99, 0xffffffe4, v0, v95
	ds_load_b32 v100, v99 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v101, v100 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, v101, 0, s3
	v_add_nc_u32_e32 v100, v101, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	v_mov_b32_dpp v101, v100 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, 0, v101, s5
	v_add_nc_u32_e32 v100, v100, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	ds_store_b32 v99, v100 offset:16384
.LBB22_345:                             ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s9
	v_dual_mov_b32 v100, 0 :: v_dual_mov_b32 v99, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB22_347
; %bb.346:
	ds_load_b32 v99, v98 offset:16380
.LBB22_347:                             ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjhjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EPjN6thrust10device_ptrIjEEPhNSB_IhEEEEvT0_T1_T2_T3_S9_S9_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESG_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v98, -1, v96
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s3, 0, v98
	v_cndmask_b32_e64 v98, v98, v96, s3
	v_cmp_eq_u32_e64 s3, 0, v96
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v98
	ds_bpermute_b32 v97, v98, v97
	ds_load_b32 v98, v100 offset:16444
	ds_load_2addr_b64 v[100:103], v95 offset1:1
	ds_load_b32 v104, v95 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v96, v97, v99, s3
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v96, v98, 16, v96
	ds_load_b64 v[98:99], v95 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v97, v96, v100
	v_add_nc_u32_e32 v100, v101, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v102, v100
	v_add_nc_u32_e32 v102, v103, v101
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v103, v98, v102
	v_add_nc_u32_e32 v98, v99, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v99, v104, v98
	ds_store_2addr_b64 v95, v[96:97], v[100:101] offset1:1
	ds_store_2addr_b64 v95, v[102:103], v[98:99] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v108, v33
	ds_load_u16 v107, v34
	ds_load_u16 v106, v43
	ds_load_u16 v105, v45
	ds_load_u16 v104, v47
	ds_load_u16 v103, v49
	ds_load_u16 v102, v51
	ds_load_u16 v101, v53
	ds_load_u16 v100, v55
	ds_load_u16 v99, v57
	ds_load_u16 v43, v59
	ds_load_u16 v45, v61
	ds_load_u16 v98, v63
	ds_load_u16 v97, v65
	ds_load_u16 v49, v67
	ds_load_u16 v47, v69
	ds_load_u16 v96, v71
	ds_load_u16 v95, v73
	ds_load_u16 v75, v75
	ds_load_u16 v51, v77
	ds_load_u16 v53, v79
	ds_load_u16 v55, v81
	ds_load_u16 v73, v83
	ds_load_u16 v71, v85
	ds_load_u16 v59, v87
	ds_load_u16 v57, v89
	ds_load_u16 v69, v90
	ds_load_u16 v67, v91
	ds_load_u16 v65, v92
	ds_load_u16 v61, v93
	ds_load_u16 v63, v94
                                        ; implicit-def: $vgpr33
                                        ; implicit-def: $vgpr34
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB22_351
; %bb.348:
	v_lshrrev_b32_e32 v33, 3, v0
	v_lshlrev_b32_e32 v34, 10, v0
	v_add_nc_u32_e32 v77, 1, v0
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v33, 0x1c00, v34, v33
	v_dual_mov_b32 v34, 0x3e00 :: v_dual_lshlrev_b32 v33, 1, v33
	ds_load_u16 v33, v33
	v_cmpx_ne_u32_e32 16, v77
	s_cbranch_execz .LBB22_350
; %bb.349:
	v_lshlrev_b32_e32 v34, 10, v77
	v_lshrrev_b32_e32 v77, 3, v77
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v34, 0x1c00, v34, v77
	v_lshlrev_b32_e32 v34, 1, v34
	ds_load_u16 v34, v34
.LBB22_350:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v33, 0xffff, v33
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v34, v34, v33
.LBB22_351:                             ; %Flow99
	s_or_b32 exec_lo, exec_lo, s4
	v_and_b32_e32 v35, 0xffff, v35
	v_and_b32_e32 v77, 0xffff, v78
	v_and_b32_e32 v78, 0xffff, v80
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v80, 0xffff, v108
	v_and_b32_e32 v37, 0xffff, v37
	v_and_b32_e32 v38, 0xffff, v38
	v_and_b32_e32 v39, 0xffff, v39
	v_and_b32_e32 v79, 0xffff, v82
	v_add_nc_u32_e32 v35, v80, v35
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v80, 0xffff, v106
	v_and_b32_e32 v82, 0xffff, v86
	s_waitcnt lgkmcnt(27)
	v_and_b32_e32 v85, 0xffff, v105
	s_waitcnt lgkmcnt(26)
	v_and_b32_e32 v86, 0xffff, v104
	v_and_b32_e32 v41, 0xffff, v41
	v_add_nc_u32_e32 v37, v80, v37
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v80, 0xffff, v102
	v_and_b32_e32 v44, 0xffff, v44
	v_and_b32_e32 v46, 0xffff, v46
	v_add_nc_u32_e32 v38, v85, v38
	v_add_nc_u32_e32 v39, v86, v39
	s_waitcnt lgkmcnt(22)
	v_and_b32_e32 v85, 0xffff, v100
	s_waitcnt lgkmcnt(21)
	v_and_b32_e32 v86, 0xffff, v99
	v_and_b32_e32 v48, 0xffff, v48
	v_add_nc_u32_e32 v41, v80, v41
	s_waitcnt lgkmcnt(20)
	v_and_b32_e32 v80, 0xffff, v43
	v_and_b32_e32 v50, 0xffff, v50
	v_add_nc_u32_e32 v43, v85, v44
	v_add_nc_u32_e32 v44, v86, v46
	s_waitcnt lgkmcnt(19)
	v_and_b32_e32 v46, 0xffff, v45
	v_and_b32_e32 v52, 0xffff, v52
	v_add_nc_u32_e32 v45, v80, v48
	s_waitcnt lgkmcnt(18)
	v_and_b32_e32 v48, 0xffff, v98
	v_and_b32_e32 v54, 0xffff, v54
	v_and_b32_e32 v56, 0xffff, v56
	v_and_b32_e32 v58, 0xffff, v58
	s_waitcnt lgkmcnt(17)
	v_and_b32_e32 v80, 0xffff, v97
	s_waitcnt lgkmcnt(16)
	v_and_b32_e32 v49, 0xffff, v49
	v_add_nc_u32_e32 v46, v46, v50
	s_waitcnt lgkmcnt(15)
	v_and_b32_e32 v50, 0xffff, v47
	v_and_b32_e32 v60, 0xffff, v60
	v_add_nc_u32_e32 v47, v48, v52
	s_waitcnt lgkmcnt(14)
	v_and_b32_e32 v52, 0xffff, v96
	v_and_b32_e32 v62, 0xffff, v62
	v_and_b32_e32 v64, 0xffff, v64
	v_and_b32_e32 v66, 0xffff, v66
	v_add_nc_u32_e32 v48, v80, v54
	v_add_nc_u32_e32 v49, v49, v56
	v_add_nc_u32_e32 v50, v50, v58
	s_waitcnt lgkmcnt(13)
	v_and_b32_e32 v54, 0xffff, v95
	s_waitcnt lgkmcnt(12)
	v_and_b32_e32 v56, 0xffff, v75
	s_waitcnt lgkmcnt(11)
	v_and_b32_e32 v58, 0xffff, v51
	v_and_b32_e32 v36, 0xffff, v36
	v_and_b32_e32 v81, 0xffff, v84
	v_and_b32_e32 v84, 0xffff, v107
	v_and_b32_e32 v68, 0xffff, v68
	v_add_nc_u32_e32 v51, v52, v60
	s_waitcnt lgkmcnt(10)
	v_and_b32_e32 v60, 0xffff, v53
	v_add_nc_u32_e32 v52, v54, v62
	v_add_nc_u32_e32 v53, v56, v64
	v_add_nc_u32_e32 v54, v58, v66
	s_waitcnt lgkmcnt(4)
	v_and_b32_e32 v64, 0xffff, v69
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v66, 0xffff, v61
	v_and_b32_e32 v40, 0xffff, v40
	v_add_nc_u32_e32 v36, v84, v36
	v_and_b32_e32 v84, 0xffff, v103
	v_and_b32_e32 v72, 0xffff, v72
	v_and_b32_e32 v74, 0xffff, v74
	v_and_b32_e32 v56, 0xffff, v55
	v_add_nc_u32_e32 v55, v60, v68
	v_and_b32_e32 v58, 0xffff, v73
	v_and_b32_e32 v60, 0xffff, v71
	v_and_b32_e32 v62, 0xffff, v57
	v_add_nc_u32_e32 v61, v64, v78
	v_add_nc_u32_e32 v64, v66, v82
	v_lshlrev_b32_e32 v66, 2, v35
	v_and_b32_e32 v42, 0xffff, v42
	v_add_nc_u32_e32 v40, v84, v40
	v_and_b32_e32 v84, 0xffff, v101
	v_and_b32_e32 v83, 0xffff, v88
	v_add_nc_u32_e32 v57, v58, v72
	v_add_nc_u32_e32 v58, v60, v74
	v_add_nc_u32_e32 v60, v62, v77
	v_and_b32_e32 v62, 0xffff, v67
	v_and_b32_e32 v65, 0xffff, v65
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v67, 0xffff, v63
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v66, v25 offset:64
	v_lshlrev_b32_e32 v25, 2, v36
	v_add_nc_u32_e32 v42, v84, v42
	v_lshlrev_b32_e32 v66, 2, v37
	v_add_nc_u32_e32 v63, v65, v81
	v_add_nc_u32_e32 v65, v67, v83
	v_lshlrev_b32_e32 v67, 2, v38
	v_lshlrev_b32_e32 v68, 2, v39
	v_lshlrev_b32_e32 v69, 2, v40
	ds_store_b32 v25, v26 offset:64
	ds_store_b32 v66, v27 offset:64
	ds_store_b32 v67, v28 offset:64
	ds_store_b32 v68, v17 offset:64
	ds_store_b32 v69, v18 offset:64
	v_lshlrev_b32_e32 v17, 2, v41
	v_lshlrev_b32_e32 v18, 2, v42
	v_lshlrev_b32_e32 v25, 2, v43
	v_lshlrev_b32_e32 v26, 2, v44
	v_lshlrev_b32_e32 v27, 2, v45
	v_and_b32_e32 v70, 0xffff, v70
	ds_store_b32 v17, v19 offset:64
	ds_store_b32 v18, v20 offset:64
	ds_store_b32 v25, v9 offset:64
	ds_store_b32 v26, v10 offset:64
	ds_store_b32 v27, v11 offset:64
	v_lshlrev_b32_e32 v9, 2, v46
	v_lshlrev_b32_e32 v10, 2, v47
	v_lshlrev_b32_e32 v11, 2, v48
	v_and_b32_e32 v76, 0xffff, v76
	v_and_b32_e32 v59, 0xffff, v59
	v_lshlrev_b32_e32 v17, 2, v49
	v_lshlrev_b32_e32 v18, 2, v50
	v_add_nc_u32_e32 v56, v56, v70
	ds_store_b32 v9, v12 offset:64
	ds_store_b32 v10, v1 offset:64
	ds_store_b32 v11, v2 offset:64
	ds_store_b32 v17, v3 offset:64
	ds_store_b32 v18, v4 offset:64
	v_lshlrev_b32_e32 v1, 2, v51
	v_lshlrev_b32_e32 v2, 2, v52
	v_lshlrev_b32_e32 v3, 2, v53
	v_add_nc_u32_e32 v59, v59, v76
	v_lshlrev_b32_e32 v4, 2, v54
	v_lshlrev_b32_e32 v9, 2, v55
	ds_store_b32 v1, v21 offset:64
	ds_store_b32 v2, v22 offset:64
	ds_store_b32 v3, v23 offset:64
	ds_store_b32 v4, v24 offset:64
	ds_store_b32 v9, v13 offset:64
	v_lshlrev_b32_e32 v1, 2, v56
	v_add_nc_u32_e32 v62, v62, v79
	v_lshlrev_b32_e32 v2, 2, v57
	v_lshlrev_b32_e32 v3, 2, v58
	v_lshlrev_b32_e32 v4, 2, v59
	v_lshlrev_b32_e32 v9, 2, v60
	ds_store_b32 v1, v14 offset:64
	ds_store_b32 v2, v15 offset:64
	ds_store_b32 v3, v16 offset:64
	ds_store_b32 v4, v5 offset:64
	ds_store_b32 v9, v6 offset:64
	v_lshlrev_b32_e32 v1, 2, v61
	v_lshlrev_b32_e32 v2, 2, v62
	v_lshlrev_b32_e32 v3, 2, v63
	v_lshlrev_b32_e32 v4, 2, v64
	v_lshlrev_b32_e32 v5, 2, v65
	ds_store_b32 v1, v7 offset:64
	ds_store_b32 v2, v8 offset:64
	ds_store_b32 v3, v29 offset:64
	ds_store_b32 v4, v30 offset:64
	ds_store_b32 v5, v31 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s3
; %bb.352:                              ; %_ZN7rocprim16block_radix_rankILj512ELj4ELNS_26block_radix_rank_algorithmE0ELj1ELj1EE9rank_keysIjLj31EZNS_6detail25onesweep_iteration_helperIjhjLj512ELj31ELj4ELb0ELS1_0ENS_19identity_decomposerEE8onesweepILb1EPjN6thrust10device_ptrIjEEPhNSB_IhEEEEvT0_T1_T2_T3_S9_S9_PNS4_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS4_11raw_storageINS4_16block_radix_rankILj512ELj4ELb0ELj1ELj1EE13storage_type_EEESG_RA1_jS13_.exit._crit_edge.i.i
	v_mov_b32_e32 v1, 0
; %bb.353:                              ; %Flow96
	s_and_not1_saveexec_b32 s3, s2
	s_cbranch_execz .LBB22_364
; %bb.354:
	v_lshl_or_b32 v3, s15, 4, v0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v7, 0
	s_mov_b32 s4, 0
	s_mov_b32 s5, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v34
	v_add_co_u32 v1, s2, s86, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s2, s87, v2, s2
                                        ; implicit-def: $sgpr2
	global_store_b32 v[1:2], v3, off
.LBB22_355:                             ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB22_358 Depth 2
	s_or_b32 s2, s2, exec_lo
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB22_361
; %bb.356:                              ;   in Loop: Header=BB22_355 Depth=1
	s_add_i32 s5, s5, -1
	s_mov_b32 s6, exec_lo
	v_lshl_or_b32 v3, s5, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s2, s86, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s2, s87, v6, s2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB22_360
; %bb.357:                              ; %.lr.ph.i.i.preheader
                                        ;   in Loop: Header=BB22_355 Depth=1
	s_mov_b32 s9, 0
.LBB22_358:                             ; %.lr.ph.i.i
                                        ;   Parent Loop BB22_355 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s2, 0, v3
	s_or_b32 s9, s2, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB22_358
; %bb.359:                              ; %Flow93
                                        ;   in Loop: Header=BB22_355 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
.LBB22_360:                             ; %Flow94
                                        ;   in Loop: Header=BB22_355 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s6
	v_and_b32_e32 v5, 0x3fffffff, v8
	v_cmp_eq_u32_e64 s2, 0x80000000, v3
	v_add_nc_u32_e32 v7, v5, v7
	s_branch .LBB22_362
.LBB22_361:                             ;   in Loop: Header=BB22_355 Depth=1
                                        ; implicit-def: $sgpr5
.LBB22_362:                             ; %Flow95
                                        ;   in Loop: Header=BB22_355 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s6, exec_lo, s2
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB22_355
; %bb.363:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v3, v7, v34
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v7, v33
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v2, v1
	ds_store_b32 v4, v2
.LBB22_364:                             ; %Flow97
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v75, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v23, 64, v2
	v_lshlrev_b32_e32 v2, 2, v0
	v_or_b32_e32 v116, 0x3000, v0
	v_or_b32_e32 v117, 0x3200, v0
	v_or_b32_e32 v118, 0x3400, v0
	ds_load_2addr_stride64_b32 v[8:9], v23 offset0:8 offset1:16
	ds_load_2addr_stride64_b32 v[14:15], v23 offset0:24 offset1:32
	ds_load_2addr_stride64_b32 v[26:27], v23 offset0:40 offset1:48
	ds_load_2addr_stride64_b32 v[66:67], v23 offset0:56 offset1:64
	ds_load_2addr_stride64_b32 v[68:69], v23 offset0:72 offset1:80
	ds_load_2addr_stride64_b32 v[70:71], v23 offset0:88 offset1:96
	ds_load_2addr_stride64_b32 v[72:73], v23 offset0:104 offset1:112
	ds_load_b32 v12, v2 offset:64
	s_waitcnt lgkmcnt(7)
	v_lshrrev_b32_e32 v3, s80, v8
	s_waitcnt lgkmcnt(6)
	v_lshrrev_b32_e32 v4, s80, v14
	s_waitcnt lgkmcnt(5)
	v_lshrrev_b32_e32 v5, s80, v26
	s_waitcnt lgkmcnt(4)
	v_lshrrev_b32_e32 v6, s80, v66
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v7, s80, v68
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v10, s80, v70
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v11, s80, v72
	v_and_b32_e32 v2, s8, v5
	v_and_b32_e32 v3, s8, v3
	v_and_b32_e32 v4, s8, v4
	v_and_b32_e32 v5, s8, v6
	v_and_b32_e32 v6, s8, v7
	v_lshlrev_b32_e32 v18, 2, v2
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v2, s80, v12
	v_and_b32_e32 v7, s8, v10
	v_and_b32_e32 v10, s8, v11
	v_lshlrev_b32_e32 v22, 2, v3
	v_lshlrev_b32_e32 v20, 2, v4
	v_and_b32_e32 v2, s8, v2
	v_lshrrev_b32_e32 v4, s80, v9
	v_lshlrev_b32_e32 v17, 2, v5
	v_lshlrev_b32_e32 v16, 2, v6
	v_lshlrev_b32_e32 v13, 2, v7
	v_lshlrev_b32_e32 v29, 2, v2
	v_lshlrev_b32_e32 v11, 2, v10
	ds_load_b32 v3, v22
	ds_load_b32 v7, v20
	ds_load_b32 v10, v18
	ds_load_b32 v84, v17
	ds_load_b32 v85, v16
	ds_load_b32 v86, v13
	ds_load_b32 v87, v11
	v_and_b32_e32 v4, s8, v4
	v_lshrrev_b32_e32 v5, s80, v15
	ds_load_b32 v74, v29
	v_lshrrev_b32_e32 v21, s80, v69
	v_lshrrev_b32_e32 v2, s80, v71
	v_lshlrev_b32_e32 v31, 2, v4
	v_lshrrev_b32_e32 v6, s80, v27
	v_lshrrev_b32_e32 v19, s80, v67
	v_lshrrev_b32_e32 v24, s80, v73
	v_and_b32_e32 v5, s8, v5
	ds_load_b32 v80, v31
	v_and_b32_e32 v21, s8, v21
	v_and_b32_e32 v2, s8, v2
	v_and_b32_e32 v6, s8, v6
	v_and_b32_e32 v19, s8, v19
	v_and_b32_e32 v76, s8, v24
	v_lshlrev_b32_e32 v30, 2, v5
	v_lshlrev_b32_e32 v24, 2, v21
	v_lshlrev_b32_e32 v21, 2, v2
	v_or_b32_e32 v2, 0x200, v0
	v_lshlrev_b32_e32 v28, 2, v6
	v_lshlrev_b32_e32 v25, 2, v19
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v74, v74, v0
	v_lshlrev_b32_e32 v19, 2, v76
	ds_load_b32 v82, v30
	ds_load_b32 v88, v28
	ds_load_b32 v89, v25
	ds_load_b32 v90, v24
	ds_load_b32 v91, v21
	ds_load_b32 v92, v19
	v_or_b32_e32 v4, 0x600, v0
	v_or_b32_e32 v5, 0x800, v0
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	v_add_nc_u32_e32 v74, v3, v2
	v_or_b32_e32 v3, 0x400, v0
	v_or_b32_e32 v6, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[78:79], 2, v[74:75]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v74, v80, v3
	v_add_co_u32 v76, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	v_add_nc_u32_e32 v74, v7, v4
	v_add_co_u32 v78, s2, s70, v78
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v79, s2, s71, v79, s2
	global_store_b32 v[76:77], v12, off
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v74, v82, v5
	global_store_b32 v[78:79], v8, off
	v_add_co_u32 v78, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v79, s2, s71, v81, s2
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	v_or_b32_e32 v7, 0xc00, v0
	v_add_nc_u32_e32 v74, v10, v6
	v_add_co_u32 v76, s2, s70, v76
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	v_add_co_u32 v80, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[82:83], 2, v[74:75]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v74, v88, v7
	v_or_b32_e32 v8, 0xe00, v0
	v_add_co_ci_u32_e64 v81, s2, s71, v81, s2
	s_clause 0x2
	global_store_b32 v[78:79], v9, off
	global_store_b32 v[76:77], v14, off
	global_store_b32 v[80:81], v15, off
	v_lshlrev_b64 v[14:15], 2, v[74:75]
	v_add_nc_u32_e32 v74, v84, v8
	v_or_b32_e32 v9, 0x1000, v0
	v_add_co_u32 v76, s2, s70, v82
	v_or_b32_e32 v10, 0x1200, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[78:79], 2, v[74:75]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v74, v89, v9
	v_add_co_ci_u32_e64 v77, s2, s71, v83, s2
	v_add_co_u32 v14, s2, s70, v14
	v_add_co_ci_u32_e64 v15, s2, s71, v15, s2
	v_add_co_u32 v78, s2, s70, v78
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	v_add_nc_u32_e32 v74, v85, v10
	v_add_co_ci_u32_e64 v79, s2, s71, v79, s2
	s_clause 0x2
	global_store_b32 v[76:77], v26, off
	global_store_b32 v[14:15], v27, off
	global_store_b32 v[78:79], v66, off
	v_lshlrev_b64 v[26:27], 2, v[74:75]
	v_or_b32_e32 v12, 0x1400, v0
	v_add_co_u32 v76, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v77, s2, s71, v81, s2
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v74, v90, v12
	v_add_co_u32 v26, s2, s70, v26
	v_or_b32_e32 v14, 0x1600, v0
	v_add_co_ci_u32_e64 v27, s2, s71, v27, s2
	ds_load_2addr_stride64_b32 v[82:83], v23 offset0:120 offset1:128
	v_lshlrev_b64 v[78:79], 2, v[74:75]
	s_clause 0x1
	global_store_b32 v[76:77], v67, off
	global_store_b32 v[26:27], v68, off
	v_add_nc_u32_e32 v74, v86, v14
	ds_load_2addr_stride64_b32 v[67:68], v23 offset0:136 offset1:144
	v_or_b32_e32 v15, 0x1800, v0
	v_or_b32_e32 v26, 0x1a00, v0
	v_add_co_u32 v78, s2, s70, v78
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	v_add_co_ci_u32_e64 v79, s2, s71, v79, s2
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v74, v91, v15
	v_or_b32_e32 v27, 0x1c00, v0
	global_store_b32 v[78:79], v69, off
	v_add_co_u32 v78, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v79, s2, s71, v81, s2
	ds_load_2addr_stride64_b32 v[80:81], v23 offset0:152 offset1:160
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	v_add_nc_u32_e32 v74, v87, v26
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v66, s80, v82
	ds_load_2addr_stride64_b32 v[86:87], v23 offset0:168 offset1:176
	v_lshrrev_b32_e32 v69, s80, v83
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v90, s80, v67
	v_lshlrev_b64 v[84:85], 2, v[74:75]
	v_add_nc_u32_e32 v74, v92, v27
	v_and_b32_e32 v91, s8, v66
	v_and_b32_e32 v69, s8, v69
	v_or_b32_e32 v66, 0x1e00, v0
	v_add_co_u32 v76, s2, s70, v76
	v_lshlrev_b64 v[88:89], 2, v[74:75]
	v_and_b32_e32 v74, s8, v90
	v_lshlrev_b32_e32 v90, 2, v91
	v_lshlrev_b32_e32 v91, 2, v69
	v_lshrrev_b32_e32 v69, s80, v68
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	ds_load_b32 v94, v90
	ds_load_b32 v97, v91
	v_lshlrev_b32_e32 v92, 2, v74
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v74, s80, v80
	v_lshrrev_b32_e32 v93, s80, v81
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v95, s80, v86
	v_lshrrev_b32_e32 v96, s80, v87
	v_and_b32_e32 v69, s8, v69
	v_and_b32_e32 v74, s8, v74
	v_and_b32_e32 v93, s8, v93
	v_and_b32_e32 v95, s8, v95
	v_and_b32_e32 v96, s8, v96
	v_lshlrev_b32_e32 v98, 2, v69
	v_lshlrev_b32_e32 v99, 2, v74
	v_lshlrev_b32_e32 v93, 2, v93
	v_lshlrev_b32_e32 v95, 2, v95
	v_lshlrev_b32_e32 v96, 2, v96
	ds_load_b32 v100, v92
	ds_load_b32 v101, v98
	ds_load_b32 v102, v99
	ds_load_b32 v103, v93
	ds_load_b32 v104, v95
	ds_load_b32 v105, v96
	v_add_co_u32 v84, s2, s70, v84
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v74, v94, v66
	v_or_b32_e32 v94, 0x2000, v0
	v_add_co_ci_u32_e64 v85, s2, s71, v85, s2
	s_clause 0x2
	global_store_b32 v[78:79], v70, off
	global_store_b32 v[76:77], v71, off
	global_store_b32 v[84:85], v72, off
	v_lshlrev_b64 v[69:70], 2, v[74:75]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v74, v97, v94
	v_add_co_u32 v71, s2, s70, v88
	v_or_b32_e32 v88, 0x2200, v0
	v_add_co_ci_u32_e64 v72, s2, s71, v89, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	v_or_b32_e32 v89, 0x2400, v0
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v74, v100, v88
	v_add_co_u32 v69, s2, s70, v69
	v_add_co_ci_u32_e64 v70, s2, s71, v70, s2
	v_add_co_u32 v76, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[78:79], 2, v[74:75]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v74, v101, v89
	v_or_b32_e32 v97, 0x2600, v0
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	s_clause 0x2
	global_store_b32 v[71:72], v73, off
	global_store_b32 v[69:70], v82, off
	global_store_b32 v[76:77], v83, off
	v_lshlrev_b64 v[69:70], 2, v[74:75]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v74, v102, v97
	v_or_b32_e32 v100, 0x2800, v0
	v_add_co_u32 v71, s2, s70, v78
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v72, s2, s71, v79, s2
	ds_load_2addr_stride64_b32 v[78:79], v23 offset0:184 offset1:192
	ds_load_2addr_stride64_b32 v[82:83], v23 offset0:200 offset1:208
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v74, v103, v100
	v_add_co_u32 v69, s2, s70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v70, s2, s71, v70, s2
	v_add_co_u32 v76, s2, s70, v76
	global_store_b32 v[71:72], v67, off
	v_lshlrev_b64 v[71:72], 2, v[74:75]
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	s_clause 0x1
	global_store_b32 v[69:70], v68, off
	global_store_b32 v[76:77], v80, off
	v_add_co_u32 v69, s2, s70, v71
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v70, s2, s71, v72, s2
	ds_load_2addr_stride64_b32 v[71:72], v23 offset0:232 offset1:240
	v_or_b32_e32 v101, 0x2a00, v0
	ds_load_2addr_stride64_b32 v[67:68], v23 offset0:216 offset1:224
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v23, s80, v78
	v_lshrrev_b32_e32 v73, s80, v79
	v_or_b32_e32 v102, 0x2c00, v0
	v_add_nc_u32_e32 v74, v104, v101
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v80, s80, v82
	v_and_b32_e32 v23, s8, v23
	v_and_b32_e32 v73, s8, v73
	global_store_b32 v[69:70], v81, off
	v_lshlrev_b64 v[76:77], 2, v[74:75]
	v_add_nc_u32_e32 v74, v105, v102
	v_lshlrev_b32_e32 v23, 2, v23
	v_lshlrev_b32_e32 v104, 2, v73
	v_lshrrev_b32_e32 v73, s80, v83
	v_or_b32_e32 v103, 0x2e00, v0
	v_lshlrev_b64 v[69:70], 2, v[74:75]
	v_and_b32_e32 v74, s8, v80
	ds_load_b32 v81, v23
	v_and_b32_e32 v73, s8, v73
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v84, s80, v71
	v_lshrrev_b32_e32 v85, s80, v72
	v_lshlrev_b32_e32 v105, 2, v74
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v74, s80, v67
	v_lshrrev_b32_e32 v80, s80, v68
	v_lshlrev_b32_e32 v106, 2, v73
	v_and_b32_e32 v73, s8, v84
	v_and_b32_e32 v84, s8, v85
	ds_load_b32 v85, v104
	v_and_b32_e32 v74, s8, v74
	v_and_b32_e32 v80, s8, v80
	v_lshlrev_b32_e32 v109, 2, v73
	v_lshlrev_b32_e32 v110, 2, v84
	v_add_co_u32 v76, s2, s70, v76
	v_lshlrev_b32_e32 v107, 2, v74
	v_lshlrev_b32_e32 v108, 2, v80
	ds_load_b32 v73, v105
	ds_load_b32 v111, v106
	ds_load_b32 v112, v107
	ds_load_b32 v113, v108
	ds_load_b32 v114, v109
	ds_load_b32 v115, v110
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v74, v81, v103
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	v_add_co_u32 v69, s2, s70, v69
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	v_add_co_ci_u32_e64 v70, s2, s71, v70, s2
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v74, v85, v116
	v_add_co_u32 v80, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v81, s2, s71, v81, s2
	v_lshlrev_b64 v[84:85], 2, v[74:75]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v74, v73, v117
	s_clause 0x2
	global_store_b32 v[76:77], v86, off
	global_store_b32 v[69:70], v87, off
	global_store_b32 v[80:81], v78, off
	v_or_b32_e32 v86, 0x3600, v0
	v_or_b32_e32 v87, 0x3800, v0
	v_lshlrev_b64 v[69:70], 2, v[74:75]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v74, v111, v118
	v_add_co_u32 v76, s2, s70, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v77, s2, s71, v85, s2
	v_lshlrev_b64 v[80:81], 2, v[74:75]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v74, v112, v86
	v_add_co_u32 v69, s2, s70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v70, s2, s71, v70, s2
	v_add_co_u32 v80, s2, s70, v80
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[84:85], 2, v[74:75]
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v74, v113, v87
	v_or_b32_e32 v111, 0x3a00, v0
	v_add_co_ci_u32_e64 v81, s2, s71, v81, s2
	s_clause 0x2
	global_store_b32 v[76:77], v79, off
	global_store_b32 v[69:70], v82, off
	global_store_b32 v[80:81], v83, off
	v_lshlrev_b64 v[69:70], 2, v[74:75]
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v74, v114, v111
	v_or_b32_e32 v82, 0x3c00, v0
	v_add_co_u32 v76, s2, s70, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v77, s2, s71, v85, s2
	v_lshlrev_b64 v[78:79], 2, v[74:75]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v74, v115, v82
	v_add_co_u32 v69, s2, s70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v70, s2, s71, v70, s2
	v_lshlrev_b64 v[73:74], 2, v[74:75]
	v_add_co_u32 v78, s2, s70, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v79, s2, s71, v79, s2
	v_add_co_u32 v73, s2, s70, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v74, s2, s71, v74, s2
	s_add_u32 s2, s72, s84
	s_addc_u32 s3, s73, 0
	v_add_co_u32 v80, s2, s2, v32
	v_add_co_ci_u32_e64 v81, null, s3, 0, s2
	s_clause 0x3
	global_store_b32 v[76:77], v67, off
	global_store_b32 v[69:70], v68, off
	global_store_b32 v[78:79], v71, off
	global_store_b32 v[73:74], v72, off
	s_clause 0x3
	global_load_b128 v[67:70], v[80:81], off
	global_load_u16 v32, v[80:81], off offset:28
	global_load_b96 v[71:73], v[80:81], off offset:16
	global_load_u8 v74, v[80:81], off offset:30
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_lshrrev_b32_e32 v75, 8, v67
	v_and_b32_e32 v84, 0xffff, v32
	v_lshrrev_b32_e32 v76, 24, v67
	v_lshrrev_b32_e32 v77, 8, v68
	v_lshrrev_b32_e32 v78, 24, v68
	v_lshrrev_b32_e32 v79, 8, v69
	v_lshrrev_b32_e32 v80, 24, v69
	ds_store_b8 v35, v67 offset:64
	v_lshrrev_b32_e32 v35, 8, v84
	v_lshrrev_b32_e32 v81, 8, v70
	v_lshrrev_b32_e32 v83, 24, v70
	v_lshrrev_b32_e32 v85, 8, v71
	v_lshrrev_b32_e32 v112, 24, v71
	v_lshrrev_b32_e32 v113, 8, v72
	v_lshrrev_b32_e32 v114, 24, v72
	v_lshrrev_b32_e32 v115, 8, v73
	v_lshrrev_b32_e32 v119, 24, v73
	ds_store_b8 v36, v75 offset:64
	ds_store_b8_d16_hi v37, v67 offset:64
	ds_store_b8 v38, v76 offset:64
	ds_store_b8 v39, v68 offset:64
	ds_store_b8 v40, v77 offset:64
	ds_store_b8_d16_hi v41, v68 offset:64
	ds_store_b8 v42, v78 offset:64
	ds_store_b8 v43, v69 offset:64
	ds_store_b8 v44, v79 offset:64
	ds_store_b8_d16_hi v45, v69 offset:64
	ds_store_b8 v46, v80 offset:64
	ds_store_b8 v47, v70 offset:64
	ds_store_b8 v48, v81 offset:64
	ds_store_b8_d16_hi v49, v70 offset:64
	ds_store_b8 v50, v83 offset:64
	ds_store_b8 v51, v71 offset:64
	ds_store_b8 v52, v85 offset:64
	ds_store_b8_d16_hi v53, v71 offset:64
	ds_store_b8 v54, v112 offset:64
	ds_store_b8 v55, v72 offset:64
	ds_store_b8 v56, v113 offset:64
	ds_store_b8_d16_hi v57, v72 offset:64
	ds_store_b8 v58, v114 offset:64
	ds_store_b8 v59, v73 offset:64
	ds_store_b8 v60, v115 offset:64
	ds_store_b8_d16_hi v61, v73 offset:64
	ds_store_b8 v62, v119 offset:64
	ds_store_b8 v63, v32 offset:64
	ds_store_b8 v64, v35 offset:64
	ds_store_b8 v65, v74 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v29, v29
	ds_load_b32 v22, v22
	ds_load_b32 v31, v31
	ds_load_b32 v20, v20
	ds_load_b32 v30, v30
	ds_load_b32 v18, v18
	ds_load_b32 v28, v28
	ds_load_b32 v17, v17
	ds_load_u8 v32, v0 offset:576
	ds_load_u8 v35, v0 offset:1088
	ds_load_u8 v36, v0 offset:1600
	ds_load_u8 v37, v0 offset:2112
	ds_load_u8 v38, v0 offset:2624
	ds_load_u8 v39, v0 offset:3136
	ds_load_u8 v40, v0 offset:3648
	ds_load_u8 v41, v0 offset:4160
	ds_load_b32 v25, v25
	ds_load_b32 v16, v16
	ds_load_b32 v24, v24
	ds_load_b32 v13, v13
	ds_load_b32 v21, v21
	ds_load_b32 v11, v11
	ds_load_b32 v19, v19
	ds_load_b32 v42, v90
	ds_load_u8 v43, v0 offset:4672
	ds_load_u8 v44, v0 offset:5184
	ds_load_u8 v45, v0 offset:5696
	ds_load_u8 v46, v0 offset:6208
	ds_load_u8 v47, v0 offset:6720
	ds_load_u8 v48, v0 offset:7232
	ds_load_u8 v49, v0 offset:7744
	ds_load_u8 v50, v0 offset:8256
	ds_load_b32 v51, v91
	ds_load_b32 v52, v92
	ds_load_b32 v53, v98
	ds_load_b32 v54, v99
	ds_load_b32 v55, v93
	ds_load_b32 v56, v95
	ds_load_b32 v57, v96
	ds_load_b32 v23, v23
	ds_load_u8 v58, v0 offset:8768
	ds_load_u8 v59, v0 offset:9280
	ds_load_u8 v60, v0 offset:9792
	ds_load_u8 v61, v0 offset:10304
	ds_load_u8 v62, v0 offset:10816
	ds_load_u8 v63, v0 offset:11328
	ds_load_u8 v64, v0 offset:11840
	ds_load_u8 v65, v0 offset:12352
	ds_load_b32 v67, v104
	ds_load_b32 v68, v105
	ds_load_b32 v69, v106
	ds_load_b32 v70, v107
	ds_load_b32 v71, v108
	ds_load_b32 v72, v109
	ds_load_u8 v73, v0 offset:12864
	ds_load_u8 v74, v0 offset:13376
	ds_load_u8 v75, v0 offset:13888
	ds_load_u8 v76, v0 offset:14400
	ds_load_u8 v77, v0 offset:14912
	ds_load_u8 v78, v0 offset:15424
	ds_load_u8 v79, v0 offset:64
	ds_load_b32 v80, v110
	s_waitcnt lgkmcnt(61)
	v_add_nc_u32_e32 v29, v29, v0
	s_waitcnt lgkmcnt(60)
	v_add_nc_u32_e32 v2, v22, v2
	s_waitcnt lgkmcnt(59)
	v_add_nc_u32_e32 v3, v31, v3
	s_waitcnt lgkmcnt(58)
	v_add_nc_u32_e32 v4, v20, v4
	s_waitcnt lgkmcnt(57)
	v_add_nc_u32_e32 v5, v30, v5
	s_waitcnt lgkmcnt(56)
	v_add_nc_u32_e32 v6, v18, v6
	s_waitcnt lgkmcnt(55)
	v_add_nc_u32_e32 v7, v28, v7
	s_waitcnt lgkmcnt(54)
	v_add_nc_u32_e32 v8, v17, v8
	s_waitcnt lgkmcnt(45)
	v_add_nc_u32_e32 v9, v25, v9
	s_waitcnt lgkmcnt(44)
	v_add_nc_u32_e32 v10, v16, v10
	s_waitcnt lgkmcnt(43)
	v_add_nc_u32_e32 v12, v24, v12
	s_waitcnt lgkmcnt(42)
	v_add_nc_u32_e32 v13, v13, v14
	s_waitcnt lgkmcnt(41)
	v_add_nc_u32_e32 v14, v21, v15
	s_waitcnt lgkmcnt(40)
	v_add_nc_u32_e32 v11, v11, v26
	s_waitcnt lgkmcnt(39)
	v_add_nc_u32_e32 v15, v19, v27
	s_waitcnt lgkmcnt(38)
	v_add_nc_u32_e32 v16, v42, v66
	s_waitcnt lgkmcnt(29)
	v_add_nc_u32_e32 v17, v51, v94
	s_waitcnt lgkmcnt(28)
	v_add_nc_u32_e32 v18, v52, v88
	s_waitcnt lgkmcnt(27)
	v_add_nc_u32_e32 v19, v53, v89
	s_waitcnt lgkmcnt(26)
	v_add_nc_u32_e32 v20, v54, v97
	s_waitcnt lgkmcnt(25)
	v_add_nc_u32_e32 v21, v55, v100
	s_waitcnt lgkmcnt(24)
	v_add_nc_u32_e32 v22, v56, v101
	s_waitcnt lgkmcnt(23)
	v_add_nc_u32_e32 v24, v57, v102
	s_waitcnt lgkmcnt(22)
	v_add_nc_u32_e32 v23, v23, v103
	s_waitcnt lgkmcnt(13)
	v_add_nc_u32_e32 v25, v67, v116
	s_waitcnt lgkmcnt(12)
	v_add_nc_u32_e32 v26, v68, v117
	s_waitcnt lgkmcnt(11)
	v_add_nc_u32_e32 v27, v69, v118
	s_waitcnt lgkmcnt(10)
	v_add_nc_u32_e32 v28, v70, v86
	s_waitcnt lgkmcnt(9)
	v_add_nc_u32_e32 v30, v71, v87
	s_waitcnt lgkmcnt(8)
	v_add_nc_u32_e32 v31, v72, v111
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v42, v80, v82
	s_clause 0x1e
	global_store_b8 v29, v79, s[74:75]
	global_store_b8 v2, v32, s[74:75]
	global_store_b8 v3, v35, s[74:75]
	global_store_b8 v4, v36, s[74:75]
	global_store_b8 v5, v37, s[74:75]
	global_store_b8 v6, v38, s[74:75]
	global_store_b8 v7, v39, s[74:75]
	global_store_b8 v8, v40, s[74:75]
	global_store_b8 v9, v41, s[74:75]
	global_store_b8 v10, v43, s[74:75]
	global_store_b8 v12, v44, s[74:75]
	global_store_b8 v13, v45, s[74:75]
	global_store_b8 v14, v46, s[74:75]
	global_store_b8 v11, v47, s[74:75]
	global_store_b8 v15, v48, s[74:75]
	global_store_b8 v16, v49, s[74:75]
	global_store_b8 v17, v50, s[74:75]
	global_store_b8 v18, v58, s[74:75]
	global_store_b8 v19, v59, s[74:75]
	global_store_b8 v20, v60, s[74:75]
	global_store_b8 v21, v61, s[74:75]
	global_store_b8 v22, v62, s[74:75]
	global_store_b8 v24, v63, s[74:75]
	global_store_b8 v23, v64, s[74:75]
	global_store_b8 v25, v65, s[74:75]
	global_store_b8 v26, v73, s[74:75]
	global_store_b8 v27, v74, s[74:75]
	global_store_b8 v28, v75, s[74:75]
	global_store_b8 v30, v76, s[74:75]
	global_store_b8 v31, v77, s[74:75]
	global_store_b8 v42, v78, s[74:75]
	s_load_b32 s0, s[0:1], 0x50
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s0
	s_cselect_b32 s0, -1, 0
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
; %bb.365:
	v_add_nc_u32_e32 v2, v33, v34
	s_or_b32 s7, s7, exec_lo
; %bb.366:                              ; %Flow105
	s_or_b32 exec_lo, exec_lo, s0
.LBB22_367:                             ; %Flow104
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB22_369
; %bb.368:                              ; %_ZN7rocprim6detail25onesweep_iteration_helperIjhjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EPjN6thrust10device_ptrIjEEPhNS8_IhEEEEvT0_T1_T2_T3_S6_S6_PNS0_23onesweep_lookback_stateES3_jjjRNS4_13storage_type_E.exit.sink.split.i
	v_lshlrev_b32_e32 v3, 2, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	ds_load_b32 v3, v3
	v_add_co_u32 v0, vcc_lo, s78, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s79, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB22_369:                             ; %_ZN7rocprim6detail18onesweep_iterationILj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0EPjN6thrust10device_ptrIjEEPhNS5_IhEEjNS_19identity_decomposerEEEvT4_T5_T6_T7_jPT8_SF_PNS0_23onesweep_lookback_stateET9_jjj.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
		.amdhsa_group_segment_fixed_size 63552
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 127
		.amdhsa_next_free_sgpr 88
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
.Lfunc_end22:
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end22-_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjhEELb0EPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 23104
; NumSgprs: 90
; NumVgprs: 127
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 63552 bytes/workgroup (compile time only)
; SGPRBlocks: 11
; VGPRBlocks: 15
; NumSGPRsForWavesPerEU: 90
; NumVGPRsForWavesPerEU: 127
; Occupancy: 8
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,"axG",@progbits,_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,comdat
	.protected	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj ; -- Begin function _ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.globl	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.p2align	8
	.type	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,@function
_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj: ; @_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x20
	s_load_b256 s[16:23], s[0:1], 0x0
	s_lshl_b32 s24, s15, 10
	s_mov_b32 s25, 0
	v_lshlrev_b32_e32 v1, 4, v0
	v_lshlrev_b32_e32 v16, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b32_e32 v15, 1, v16
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 10
	s_cmp_lg_u32 s15, s3
	s_cselect_b32 s29, -1, 0
	s_lshl_b64 s[26:27], s[24:25], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_u32 s4, s16, s26
	s_addc_u32 s5, s17, s27
	v_add_co_u32 v5, s4, s4, v1
	v_add_co_ci_u32_e64 v6, null, s5, 0, s4
	s_cmp_eq_u32 s15, s3
	s_cbranch_scc1 .LBB23_2
; %bb.1:
	s_lshl_b64 s[4:5], s[24:25], 1
	s_mov_b32 s3, 0
	s_add_u32 s4, s20, s4
	s_addc_u32 s5, s21, s5
	global_load_b128 v[1:4], v[5:6], off
	s_clause 0x1
	global_load_d16_b16 v14, v15, s[4:5] offset:4
	global_load_b32 v13, v15, s[4:5]
	s_mov_b32 s4, -1
	s_branch .LBB23_3
.LBB23_2:
	s_mov_b32 s3, -1
	s_mov_b32 s4, s25
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4
                                        ; implicit-def: $vgpr13_vgpr14
.LBB23_3:                               ; %Flow76
	s_sub_i32 s28, s2, s24
	s_and_not1_b32 vcc_lo, exec_lo, s3
	v_cmp_gt_u32_e64 s2, s28, v16
	s_cbranch_vccnz .LBB23_19
; %bb.4:
	s_mov_b32 s4, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	s_mov_b32 s7, s4
	s_waitcnt vmcnt(2)
	v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
	v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB23_6
; %bb.5:
	global_load_b32 v1, v[5:6], off
	v_mov_b32_e32 v2, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v3, v2
	v_mov_b32_e32 v4, v2
.LBB23_6:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v7, 1, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s28, v7
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB23_8
; %bb.7:
	global_load_b32 v2, v[5:6], off offset:4
.LBB23_8:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v7, 2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s28, v7
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB23_10
; %bb.9:
	global_load_b32 v3, v[5:6], off offset:8
.LBB23_10:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v7, 3, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s28, v7
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB23_12
; %bb.11:
	global_load_b32 v4, v[5:6], off offset:12
.LBB23_12:                              ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIjEEjLj4EjEEvjT_RAT1__T0_jT2_.exit.i.i
	s_or_b32 exec_lo, exec_lo, s5
	s_lshl_b64 s[6:7], s[24:25], 1
                                        ; implicit-def: $vgpr13_vgpr14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_u32 s5, s20, s6
	s_addc_u32 s6, s21, s7
	v_add_co_u32 v5, s5, s5, v15
	v_add_co_ci_u32_e64 v6, null, s6, 0, s5
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB23_14
; %bb.13:
	global_load_d16_b16 v13, v[5:6], off
.LBB23_14:
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB23_16
; %bb.15:
	global_load_d16_hi_b16 v13, v[5:6], off offset:2
.LBB23_16:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB23_18
; %bb.17:
	global_load_d16_b16 v14, v[5:6], off offset:4
.LBB23_18:
	s_or_b32 exec_lo, exec_lo, s2
.LBB23_19:                              ; %Flow77
	s_and_saveexec_b32 s2, s4
	s_cbranch_execz .LBB23_21
; %bb.20:                               ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrItEEtLj4EEEvjT_RAT1__T0_j.exit.sink.split.i.i
	s_lshl_b64 s[4:5], s[24:25], 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s4, s20, s4
	s_addc_u32 s5, s21, s5
	global_load_d16_hi_b16 v14, v15, s[4:5] offset:6
.LBB23_21:                              ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrItEEtLj4EEEvjT_RAT1__T0_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
	v_mbcnt_lo_u32_b32 v5, -1, 0
	s_load_b64 s[16:17], s[0:1], 0x28
	v_or_b32_e32 v7, 31, v0
	v_cmp_gt_u32_e64 s6, 8, v0
	v_cmp_lt_u32_e64 s7, 31, v0
	v_add_nc_u32_e32 v9, -1, v5
	v_dual_mov_b32 v23, 0 :: v_dual_and_b32 v6, 15, v5
	v_and_b32_e32 v8, 16, v5
	v_cmp_eq_u32_e64 s5, v7, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_gt_i32_e32 vcc_lo, 0, v9
	v_lshlrev_b32_e32 v17, 5, v0
	v_cmp_eq_u32_e64 s0, 0, v6
	v_cmp_lt_u32_e64 s1, 1, v6
	v_cmp_lt_u32_e64 s2, 3, v6
	v_cmp_lt_u32_e64 s3, 7, v6
	v_cndmask_b32_e32 v6, v9, v5, vcc_lo
	v_lshrrev_b32_e32 v7, 3, v0
	v_cmp_eq_u32_e64 s4, 0, v8
	v_and_b32_e32 v8, 7, v5
	v_cmp_eq_u32_e64 s8, 0, v5
	v_lshlrev_b32_e32 v18, 2, v6
	v_and_b32_e32 v19, 28, v7
	v_mul_i32_i24_e32 v5, 0xffffffe4, v0
	v_lshlrev_b32_e32 v6, 2, v7
	v_lshlrev_b32_e32 v7, 1, v7
	v_cmp_eq_u32_e64 s9, 0, v8
	v_cmp_lt_u32_e64 s10, 1, v8
	v_cmp_lt_u32_e64 s11, 3, v8
	v_or_b32_e32 v20, 0xffffff00, v0
	v_lshl_add_u32 v21, v0, 4, v6
	v_lshl_add_u32 v22, v0, 3, v7
	v_add_nc_u32_e32 v24, v17, v5
	s_waitcnt lgkmcnt(0)
	s_add_i32 s17, s17, s16
.LBB23_22:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB23_23 Depth 2
                                        ;     Child Loop BB23_31 Depth 2
                                        ;     Child Loop BB23_33 Depth 2
                                        ;     Child Loop BB23_35 Depth 2
                                        ;     Child Loop BB23_37 Depth 2
	v_mov_b32_e32 v5, v16
	v_mov_b32_e32 v6, v20
	s_mov_b32 s12, 0
.LBB23_23:                              ; %.lr.ph.i.i.i.i.i.i.i.i.i
                                        ;   Parent Loop BB23_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v6, 0x100, v6
	ds_store_b32 v5, v23
	v_add_nc_u32_e32 v5, 0x400, v5
	v_cmp_lt_u32_e32 vcc_lo, 0x6ff, v6
	s_or_b32 s12, vcc_lo, s12
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB23_23
; %bb.24:                               ; %_ZN7rocprim6detail16block_radix_rankILj256ELj4ELb1ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.preheader.i.i.i.i.i.i.i.i
                                        ;   in Loop: Header=BB23_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_sub_i32 s12, s17, s16
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v5, s16, v1
	s_min_u32 s12, s12, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s12, -1, s12
	s_not_b32 s12, s12
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_and_b32_e32 v5, s12, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 8, v5
	v_lshrrev_b32_e32 v5, 3, v5
	v_and_or_b32 v6, 0x700, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v6, 1, v6
	v_add_lshl_u32 v26, v6, v5, 1
	v_lshrrev_b32_e32 v5, s16, v2
	ds_load_u16 v25, v26
	v_and_b32_e32 v5, s12, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 8, v5
	v_lshrrev_b32_e32 v5, 3, v5
	v_and_or_b32 v6, 0x700, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 1, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v7, v25, 1
	v_add_lshl_u32 v27, v6, v5, 1
	v_lshrrev_b32_e32 v5, s16, v3
	ds_store_b16 v26, v7
	ds_load_u16 v28, v27
	v_and_b32_e32 v5, s12, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 8, v5
	v_lshrrev_b32_e32 v5, 3, v5
	v_and_or_b32 v6, 0x700, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 1, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v7, v28, 1
	v_add_lshl_u32 v29, v6, v5, 1
	v_lshrrev_b32_e32 v5, s16, v4
	ds_store_b16 v27, v7
	ds_load_u16 v30, v29
	v_and_b32_e32 v5, s12, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 8, v5
	v_lshrrev_b32_e32 v5, 3, v5
	v_and_or_b32 v6, 0x700, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 1, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v7, v30, 1
	v_add_lshl_u32 v32, v6, v5, 1
	ds_store_b16 v29, v7
	ds_load_u16 v31, v32
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v5, v31, 1
	ds_store_b16 v32, v5
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[9:12], v17 offset1:1
	ds_load_2addr_b64 v[5:8], v17 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v33, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v33, v33, v11, v12
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v33, v33, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v8, v33, v7, v8
	v_mov_b32_dpp v33, v8 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v33, v33, 0, s0
	v_add_nc_u32_e32 v8, v33, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v33, v8 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v33, 0, v33, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, v8, v33
	v_mov_b32_dpp v33, v8 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v33, 0, v33, s2
	v_add_nc_u32_e32 v8, v8, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v33, v8 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v33, 0, v33, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, v8, v33
	ds_swizzle_b32 v33, v8 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v33, v33, 0, s4
	v_add_nc_u32_e32 v8, v8, v33
	s_and_saveexec_b32 s12, s5
	s_cbranch_execz .LBB23_26
; %bb.25:                               ;   in Loop: Header=BB23_22 Depth=1
	ds_store_b32 v19, v8 offset:8192
.LBB23_26:                              ;   in Loop: Header=BB23_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s12, s6
	s_cbranch_execz .LBB23_28
; %bb.27:                               ;   in Loop: Header=BB23_22 Depth=1
	ds_load_b32 v33, v24 offset:8192
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v34, v33 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v34, v34, 0, s9
	v_add_nc_u32_e32 v33, v34, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v34, v33 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v34, 0, v34, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v33, v33, v34
	v_mov_b32_dpp v34, v33 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v34, 0, v34, s11
	v_add_nc_u32_e32 v33, v33, v34
	ds_store_b32 v24, v33 offset:8192
.LBB23_28:                              ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj256ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj256EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i.i.i.i
                                        ;   in Loop: Header=BB23_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	v_mov_b32_e32 v33, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s12, s7
	s_cbranch_execz .LBB23_30
; %bb.29:                               ;   in Loop: Header=BB23_22 Depth=1
	ds_load_b32 v33, v19 offset:8188
.LBB23_30:                              ; %_ZN7rocprim16block_radix_rankILj256ELj4ELNS_26block_radix_rank_algorithmE1ELj1ELj1EE9rank_keysIjLj4EZNS_16block_radix_sortIjLj256ELj4EtLj1ELj1ELj4EE9sort_implILb0ELb0EtNS_19identity_decomposerEEEvRA4_jRA4_T1_RNS_6detail11raw_storageINS5_13storage_type_EEEjjT2_EUlRKjE_EEvRAT0__KT_RAT0__jRNSE_INSD_16block_radix_rankILj256ELj4ELb1ELj1ELj1EE13storage_type_EEESA_.exit.i.i.i.i.i
                                        ;   in Loop: Header=BB23_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v8, v33, v8
	ds_load_b32 v34, v23 offset:8220
	s_mov_b64 s[14:15], 0
	ds_bpermute_b32 v8, v18, v8
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v8, v8, v33, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v8, v34, 16, v8
	v_add_nc_u32_e32 v9, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v10, v9, v10
	v_add_nc_u32_e32 v11, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v33, v11, v12
	v_and_b32_e32 v12, 0xffff, v31
	v_add_nc_u32_e32 v34, v33, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v34, v6
	v_add_nc_u32_e32 v6, v5, v7
	ds_store_2addr_b64 v17, v[8:9], v[10:11] offset1:1
	ds_store_2addr_b64 v17, v[33:34], v[5:6] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v5, v26
	ds_load_u16 v6, v27
	ds_load_u16 v7, v29
	ds_load_u16 v8, v32
	v_and_b32_e32 v9, 0xffff, v25
	v_and_b32_e32 v10, 0xffff, v28
	v_and_b32_e32 v11, 0xffff, v30
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v5, v5, v9
	v_add_nc_u32_e32 v6, v6, v10
	v_add_nc_u32_e32 v7, v7, v11
	v_add_nc_u32_e32 v8, v8, v12
.LBB23_31:                              ;   Parent Loop BB23_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_cmp_eq_u32 s14, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s14, 2
	v_cndmask_b32_e32 v9, v5, v6, vcc_lo
	s_cselect_b32 s12, -1, 0
	s_cmp_eq_u32 s14, 3
	s_cselect_b32 s13, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v9, v9, v7, s12
	s_add_u32 s14, s14, 1
	s_addc_u32 s15, s15, 0
	s_cmp_eq_u32 s14, 4
	v_cndmask_b32_e64 v9, v9, v8, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v11, 3, v9
	v_dual_cndmask_b32 v10, v1, v2 :: v_dual_and_b32 v11, 0x3ffc, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v10, v10, v3, s12
	v_lshl_add_u32 v9, v9, 2, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v10, v10, v4, s13
	ds_store_b32 v9, v10
	s_cbranch_scc0 .LBB23_31
; %bb.32:                               ;   in Loop: Header=BB23_22 Depth=1
	v_mov_b32_e32 v9, v21
	s_mov_b64 s[20:21], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB23_33:                              ;   Parent Loop BB23_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v10, v9
	s_cmp_eq_u32 s20, 3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s20, 2
	v_add_nc_u32_e32 v9, 4, v9
	s_cselect_b32 s12, -1, 0
	s_cmp_eq_u32 s20, 1
	s_cselect_b32 s13, -1, 0
	s_cmp_eq_u32 s20, 0
	s_cselect_b32 s14, -1, 0
	s_add_u32 s20, s20, 1
	s_addc_u32 s21, s21, 0
	s_cmp_lg_u32 s20, 4
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v4, v4, v10, vcc_lo
	v_cndmask_b32_e64 v3, v3, v10, s12
	v_cndmask_b32_e64 v2, v2, v10, s13
	v_cndmask_b32_e64 v1, v1, v10, s14
	s_cbranch_scc1 .LBB23_33
; %bb.34:                               ; %_ZN7rocprim16block_radix_sortIjLj256ELj4EtLj1ELj1ELj4EE13exchange_keysERNS_6detail11raw_storageINS1_13storage_type_EEERA4_jRA4_Kj.exit.i.i.i.i.i
                                        ;   in Loop: Header=BB23_22 Depth=1
	s_mov_b64 s[12:13], 0
	s_barrier
	buffer_gl0_inv
.LBB23_35:                              ;   Parent Loop BB23_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_cmp_eq_u32 s12, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s12, 2
	v_cndmask_b32_e32 v9, v5, v6, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s12, 3
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v9, v9, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_lshl_b32 s14, s12, 4
	s_add_u32 s12, s12, 1
	s_addc_u32 s13, s13, 0
	v_cndmask_b32_e32 v11, v9, v8, vcc_lo
	s_cmp_eq_u32 s12, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v9, 4, v11
	v_and_b32_e32 v12, 0x1ffe, v9
	v_lshrrev_b64 v[9:10], s14, v[13:14]
	s_delay_alu instid0(VALU_DEP_2)
	v_lshl_add_u32 v10, v11, 1, v12
	ds_store_b16 v10, v9
	s_cbranch_scc0 .LBB23_35
; %bb.36:                               ;   in Loop: Header=BB23_22 Depth=1
	v_mov_b32_e32 v5, v22
	s_mov_b64 s[12:13], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB23_37:                              ;   Parent Loop BB23_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_u16 v6, v5
	s_lshl_b32 s14, s12, 4
	v_add_nc_u32_e32 v5, 2, v5
	s_lshl_b64 s[14:15], 0xffff, s14
	s_add_u32 s12, s12, 1
	s_addc_u32 s13, s13, 0
	s_cmp_lg_u32 s12, 4
	s_waitcnt lgkmcnt(0)
	v_perm_b32 v6, v6, v6, 0x5040100
	s_delay_alu instid0(VALU_DEP_1)
	v_bfi_b32 v14, s15, v6, v14
	v_bfi_b32 v13, s14, v6, v13
	s_cbranch_scc1 .LBB23_37
; %bb.38:                               ; %_ZN7rocprim16block_radix_sortIjLj256ELj4EtLj1ELj1ELj4EE15exchange_valuesItEEvRNS_6detail11raw_storageINS1_13storage_type_EEERA4_T_RA4_Kj.exit.i.i.i.i.i
                                        ;   in Loop: Header=BB23_22 Depth=1
	s_add_i32 s16, s16, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s16, s17
	s_cbranch_scc1 .LBB23_40
; %bb.39:                               ;   in Loop: Header=BB23_22 Depth=1
	s_mov_b32 s12, 0
	s_barrier
	buffer_gl0_inv
	s_branch .LBB23_41
.LBB23_40:                              ;   in Loop: Header=BB23_22 Depth=1
	s_mov_b32 s12, -1
                                        ; implicit-def: $sgpr16
.LBB23_41:                              ; %Flow75
                                        ;   in Loop: Header=BB23_22 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB23_22
; %bb.42:                               ; %_ZN7rocprim6detail10sort_blockILb0ENS_16block_radix_sortIjLj256ELj4EtLj1ELj1ELj4EEEjtLj4ENS_19identity_decomposerEEEvT0_RAT3__T1_RAT3__T2_RNS5_12storage_typeET4_jj.exit.i.i
	v_lshlrev_b32_e32 v0, 2, v16
	s_add_u32 s0, s18, s26
	s_addc_u32 s1, s19, s27
	s_mov_b32 s2, 0
	s_and_not1_b32 vcc_lo, exec_lo, s29
	v_add_co_u32 v5, s0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, null, s1, 0, s0
	s_mov_b32 s0, -1
	s_cbranch_vccnz .LBB23_44
; %bb.43:
	s_lshl_b64 s[0:1], s[24:25], 1
	s_mov_b32 s2, -1
	s_add_u32 s4, s22, s0
	s_addc_u32 s5, s23, s1
	s_mov_b32 s0, 0
	global_store_b128 v[5:6], v[1:4], off
	s_clause 0x1
	global_store_b16 v15, v14, s[4:5] offset:4
	global_store_b32 v15, v13, s[4:5]
.LBB23_44:                              ; %Flow
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB23_60
; %bb.45:
	v_cmp_gt_u32_e32 vcc_lo, s28, v16
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB23_47
; %bb.46:
	global_store_b32 v[5:6], v1, off
.LBB23_47:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v0, 1, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s28, v0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB23_49
; %bb.48:
	global_store_b32 v[5:6], v2, off offset:4
.LBB23_49:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v0, 2, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s28, v0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB23_51
; %bb.50:
	global_store_b32 v[5:6], v3, off offset:8
.LBB23_51:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v0, 3, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s28, v0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB23_53
; %bb.52:
	global_store_b32 v[5:6], v4, off offset:12
.LBB23_53:                              ; %_ZN7rocprim26block_store_direct_blockedIN6thrust10device_ptrIjEEjLj4EEEvjT_RAT1__T0_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s3
	s_lshl_b64 s[4:5], s[24:25], 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_u32 s3, s22, s4
	s_addc_u32 s4, s23, s5
	v_add_co_u32 v0, s3, s3, v15
	v_add_co_ci_u32_e64 v1, null, s4, 0, s3
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB23_55
; %bb.54:
	global_store_b16 v[0:1], v13, off
.LBB23_55:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB23_57
; %bb.56:
	global_store_d16_hi_b16 v[0:1], v13, off offset:2
.LBB23_57:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB23_59
; %bb.58:
	global_store_b16 v[0:1], v14, off offset:4
.LBB23_59:
	s_or_b32 exec_lo, exec_lo, s0
.LBB23_60:                              ; %Flow73
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB23_62
; %bb.61:                               ; %_ZN7rocprim6detail24radix_sort_single_helperILj256ELj4ELb0EjtE11sort_singleIN6thrust10device_ptrIjEES6_NS5_ItEES7_NS_19identity_decomposerEEEvT_T0_T1_T2_jT3_jjRNS2_12storage_typeE.exit.sink.split.i
	s_lshl_b64 s[0:1], s[24:25], 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s22, s0
	s_addc_u32 s1, s23, s1
	global_store_d16_hi_b16 v15, v14, s[0:1] offset:6
.LBB23_62:                              ; %_ZN7rocprim6detail11sort_singleILj256ELj4ELb0EN6thrust10device_ptrIjEES4_NS3_ItEES5_NS_19identity_decomposerEEEvT2_T3_T4_T5_jT6_jj.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
		.amdhsa_group_segment_fixed_size 8224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 35
		.amdhsa_next_free_sgpr 30
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,"axG",@progbits,_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,comdat
.Lfunc_end23:
	.size	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj, .Lfunc_end23-_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjtEELb0EN6thrust10device_ptrIjEES8_NS7_ItEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2592
; NumSgprs: 32
; NumVgprs: 35
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8224 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 32
; NumVGPRsForWavesPerEU: 35
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv,"axG",@progbits,_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv,comdat
	.protected	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv ; -- Begin function _ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv
	.globl	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv
	.p2align	8
	.type	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv,@function
_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv: ; @_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 0
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 0
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv,"axG",@progbits,_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv,comdat
.Lfunc_end24:
	.size	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv, .Lfunc_end24-_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjtEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEEEvv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.protected	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_ ; -- Begin function _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.globl	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.p2align	8
	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@function
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_: ; @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x8
	v_lshl_or_b32 v0, s15, 7, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB25_6
; %bb.1:
	s_load_b32 s3, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, 0x7ffffe
	s_sub_i32 s5, 0, s4
	s_add_i32 s4, s4, -1
	v_and_b32_e32 v1, s5, v0
	v_and_b32_e32 v5, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 10, v1
	v_add_nc_u32_e32 v2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v4, s2, v2
	v_min_u32_e32 v2, s2, v1
	v_add_nc_u32_e32 v3, s3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, s2, v3
	v_lshlrev_b32_e32 v3, 10, v5
	s_mov_b32 s2, exec_lo
	v_sub_nc_u32_e32 v5, v1, v2
	v_sub_nc_u32_e32 v6, v1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, v5, v3
	v_sub_nc_u32_e32 v3, v4, v2
	v_sub_nc_u32_e64 v6, v1, v6 clamp
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v7, v1, v3
	v_cmpx_lt_u32_e64 v6, v7
	s_cbranch_execz .LBB25_5
; %bb.2:                                ; %.lr.ph.i.preheader
	s_load_b64 s[4:5], s[0:1], 0x0
	v_mov_b32_e32 v5, 0
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v5
	v_lshlrev_b64 v[10:11], 2, v[4:5]
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v11, vcc_lo
.LBB25_3:                               ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v4, 1, v4
	v_mov_b32_e32 v12, v5
	v_xad_u32 v11, v4, -1, v1
	v_lshlrev_b64 v[13:14], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v13, vcc_lo, v3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v8, v14, vcc_lo
	v_add_co_u32 v11, vcc_lo, v9, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, v10, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	v_add_nc_u32_e32 v12, 1, v4
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v13, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v7, v7, v4 :: v_dual_cndmask_b32 v6, v12, v6
	v_cmp_ge_u32_e32 vcc_lo, v6, v7
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB25_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s3
.LBB25_5:                               ; %Flow53
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v6, v2
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB25_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
.Lfunc_end25:
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, .Lfunc_end25-_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.protected	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ ; -- Begin function _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.globl	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	8
	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: ; @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
; %bb.0:
	s_clause 0x2
	s_load_b64 s[18:19], s[0:1], 0x20
	s_load_b64 s[4:5], s[0:1], 0x30
	s_load_b64 s[22:23], s[0:1], 0x44
	s_mov_b32 s3, 0
	s_mov_b32 s6, s15
	s_mov_b32 s7, s3
	s_mov_b32 s11, s3
	v_lshlrev_b32_e32 v17, 2, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s26, s18, 10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s15, s26
	s_cselect_b32 s20, -1, 0
	s_lshl_b64 s[8:9], s[6:7], 2
	s_add_u32 s8, s4, s8
	s_addc_u32 s9, s5, s9
	s_add_i32 s10, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[10:11], 2
	s_add_u32 s4, s4, s10
	s_addc_u32 s5, s5, s11
	s_clause 0x1
	s_load_b32 s2, s[8:9], 0x0
	s_load_b32 s7, s[4:5], 0x0
	s_lshr_b32 s4, s19, 9
	s_load_b256 s[8:15], s[0:1], 0x0
	s_and_b32 s0, s4, 0x7ffffe
	s_lshl_b32 s16, s6, 10
	s_sub_i32 s1, 0, s0
	s_add_i32 s0, s0, -1
	s_and_b32 s1, s6, s1
	s_and_b32 s5, s0, s6
	s_lshl_b32 s4, s1, 11
	s_lshl_b32 s1, s1, 10
	s_add_i32 s4, s4, s19
	s_sub_i32 s17, s16, s1
	s_sub_i32 s1, s4, s1
	s_add_i32 s4, s4, s17
	s_min_u32 s17, s18, s1
	s_add_i32 s1, s1, s19
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s19, s4, s2
	s_sub_i32 s21, s4, s7
	s_min_u32 s4, s18, s19
	s_addk_i32 s21, 0x400
	s_cmp_eq_u32 s0, s5
	s_mov_b32 s5, s3
	s_cselect_b32 s19, s1, s21
	s_cselect_b32 s17, s17, s7
	s_lshl_b64 s[0:1], s[2:3], 2
	s_min_u32 s7, s19, s18
	s_sub_i32 s17, s17, s2
	s_add_u32 s19, s8, s0
	s_addc_u32 s21, s9, s1
	s_lshl_b64 s[24:25], s[4:5], 2
	s_mov_b32 s1, -1
	s_add_u32 s8, s8, s24
	s_addc_u32 s9, s9, s25
	s_and_b32 s0, s23, 0xffff
	s_lshr_b32 s23, s22, 16
	s_and_b32 s22, s22, 0xffff
	s_cmp_eq_u32 s6, s26
	s_mul_i32 s22, s22, s23
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s6, s22, s0
	s_cbranch_scc1 .LBB26_2
; %bb.1:                                ; %.preheader36.i.i.i
	v_mov_b32_e32 v4, 0
	v_subrev_nc_u32_e32 v3, s17, v0
	v_add_co_u32 v7, s0, s19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, null, s21, 0, s0
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_add_nc_u32_e32 v3, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v9, vcc_lo, s19, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, s21, v6, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_add_co_u32 v5, s0, s8, v1
	v_add_co_ci_u32_e64 v6, s0, s9, v2, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_cmp_gt_u32_e64 s0, s17, v0
	v_lshl_add_u32 v3, s6, 1, v0
	v_cndmask_b32_e64 v6, v6, v8, s0
	v_cndmask_b32_e64 v5, v5, v7, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_add_co_u32 v11, s0, s8, v1
	v_add_co_ci_u32_e64 v2, s0, s9, v2, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s19, v7
	v_add_co_ci_u32_e64 v14, s0, s21, v8, s0
	v_mad_u64_u32 v[7:8], null, s6, 3, v[0:1]
	global_load_b32 v1, v[5:6], off
	v_cmp_gt_u32_e64 s0, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_mov_b32_e32 v8, v4
	v_dual_cndmask_b32 v10, v2, v10 :: v_dual_cndmask_b32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v7
	v_lshlrev_b64 v[11:12], 2, v[7:8]
	global_load_b32 v2, v[9:10], off
	v_add_co_u32 v15, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v16, vcc_lo, s9, v6, vcc_lo
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_lshl_add_u32 v3, s6, 2, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v8, v15, v13, s0
	v_cndmask_b32_e64 v9, v16, v14, s0
	v_add_co_u32 v15, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[3:4]
	v_add_co_ci_u32_e32 v12, vcc_lo, s21, v12, vcc_lo
	v_add_co_u32 v16, vcc_lo, s19, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v18, vcc_lo, s21, v14, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_add_co_u32 v14, s0, s8, v5
	v_add_co_ci_u32_e64 v13, s0, s9, v6, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_cmp_gt_u32_e64 s0, s17, v7
	v_cndmask_b32_e64 v13, v13, v12, s0
	v_cndmask_b32_e64 v12, v14, v15, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s0, s8, v5
	v_add_co_ci_u32_e64 v7, s0, s9, v6, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v18, vcc_lo
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[10:11], null, s6, 5, v[0:1]
	v_mov_b32_e32 v11, v4
	v_mad_u64_u32 v[14:15], null, s6, 6, v[0:1]
	v_mov_b32_e32 v15, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[10:11]
	v_subrev_nc_u32_e32 v3, s17, v10
	v_lshlrev_b64 v[18:19], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_co_u32 v21, s0, s19, v5
	v_subrev_nc_u32_e32 v3, s17, v14
	v_add_co_ci_u32_e64 v11, s0, s21, v6, s0
	v_lshlrev_b64 v[5:6], 2, v[14:15]
	v_add_co_u32 v15, s0, s8, v18
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_ci_u32_e64 v18, s0, s9, v19, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s1, s19, v5
	v_add_co_ci_u32_e64 v19, s1, s21, v6, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, s1, s8, v3
	v_cmp_gt_u32_e64 s0, s17, v10
	v_add_co_ci_u32_e64 v4, s1, s9, v4, s1
	v_cmp_gt_u32_e64 s1, s17, v14
	v_cndmask_b32_e32 v6, v20, v16, vcc_lo
	v_cndmask_b32_e64 v11, v18, v11, s0
	v_cndmask_b32_e64 v10, v15, v21, s0
	s_mov_b32 s0, -1
	v_cndmask_b32_e64 v15, v4, v19, s1
	v_cndmask_b32_e64 v14, v3, v5, s1
	global_load_b32 v3, v[8:9], off
	global_load_b32 v4, v[12:13], off
	global_load_b32 v5, v[6:7], off
	global_load_b32 v6, v[10:11], off
	global_load_b32 v7, v[14:15], off
	v_mad_u64_u32 v[9:10], null, s6, 7, v[0:1]
	s_mov_b32 s1, 0
	s_branch .LBB26_3
.LBB26_2:
	s_mov_b32 s0, s3
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
                                        ; implicit-def: $vgpr9
.LBB26_3:                               ; %Flow131
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_sub_i32 s7, s7, s4
	s_cbranch_vccnz .LBB26_19
; %bb.4:                                ; %.preheader.i.i.i
	s_add_i32 s1, s7, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB26_6
; %bb.5:
	v_subrev_nc_u32_e32 v1, s17, v0
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, s22, s19, v17
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(3)
	v_add_co_ci_u32_e64 v4, null, s21, 0, s22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v2, v2, v4
	global_load_b32 v1, v[1:2], off
.LBB26_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, s6, v0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB26_8
; %bb.7:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v2, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v2 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v2, v[9:10], off
.LBB26_8:
	s_or_b32 exec_lo, exec_lo, s22
	v_lshl_add_u32 v9, s6, 1, v0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB26_10
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v3, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v3, v[9:10], off
.LBB26_10:
	s_or_b32 exec_lo, exec_lo, s22
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, s6, 3, v[0:1]
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB26_12
; %bb.11:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v4, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v4 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v4, v[9:10], off
.LBB26_12:
	s_or_b32 exec_lo, exec_lo, s22
	v_lshl_add_u32 v9, s6, 2, v0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB26_14
; %bb.13:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v5, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v5 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v5, v[9:10], off
.LBB26_14:
	s_or_b32 exec_lo, exec_lo, s22
	v_mad_u64_u32 v[9:10], null, s6, 5, v[0:1]
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB26_16
; %bb.15:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v6, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v6 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v6, v[9:10], off
.LBB26_16:
	s_or_b32 exec_lo, exec_lo, s22
	v_mad_u64_u32 v[9:10], null, s6, 6, v[0:1]
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB26_18
; %bb.17:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v7, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v7, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v7, v[9:10], off
.LBB26_18:
	s_or_b32 exec_lo, exec_lo, s22
	v_mad_u64_u32 v[9:10], null, s6, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s1, v9
.LBB26_19:                              ; %Flow132
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB26_21
; %bb.20:                               ; %_ZN7rocprim6detail11gmem_to_regILj8EjPjEEvRAT__T0_T1_S6_jjb.exit.sink.split.i.i
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v11, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v12, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[8:9], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s0, s8, v8
	v_add_co_ci_u32_e64 v9, s0, s9, v9, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v8, v8, v11 :: v_dual_cndmask_b32 v9, v9, v12
	global_load_b32 v8, v[8:9], off
.LBB26_21:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EjPjEEvRAT__T0_T1_S6_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s1
	s_lshl_b64 s[0:1], s[2:3], 1
	v_cndmask_b32_e64 v15, 0, 1, s20
	s_add_u32 s9, s12, s0
	s_addc_u32 s19, s13, s1
	s_lshl_b64 s[0:1], s[4:5], 1
	v_lshlrev_b32_e32 v18, 1, v0
	s_add_u32 s3, s12, s0
	s_addc_u32 s4, s13, s1
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_waitcnt vmcnt(5)
	ds_store_2addr_stride64_b32 v17, v1, v2 offset1:2
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v17, v3, v4 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v17, v5, v6 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v17, v7, v8 offset0:12 offset1:14
	s_cbranch_vccnz .LBB26_23
; %bb.22:                               ; %.preheader36.i89.i.i
	v_mov_b32_e32 v14, 0
	v_subrev_nc_u32_e32 v13, s17, v0
	v_mad_u64_u32 v[21:22], null, s6, 3, v[0:1]
	v_add_co_u32 v30, s1, s9, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[9:10], 1, v[13:14]
	v_add_nc_u32_e32 v13, s6, v0
	v_add_co_ci_u32_e64 v31, null, s19, 0, s1
	v_mad_u64_u32 v[25:26], null, s6, 5, v[0:1]
	v_lshlrev_b64 v[11:12], 1, v[13:14]
	v_add_co_u32 v32, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v35, s1, s4, v10, s1
	v_mad_u64_u32 v[26:27], null, s6, 6, v[0:1]
	v_add_co_u32 v16, vcc_lo, s9, v11
	v_add_co_ci_u32_e32 v33, vcc_lo, s19, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_mov_b32_e32 v27, v14
	v_cmp_gt_u32_e64 s2, s17, v0
	s_add_i32 s8, s7, s17
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_lshl_add_u32 v13, s6, 1, v0
	v_lshlrev_b64 v[9:10], 1, v[26:27]
	v_cndmask_b32_e64 v27, v32, v30, s2
	v_lshlrev_b64 v[11:12], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v22, s0, s9, v11
	v_add_co_ci_u32_e64 v34, s0, s19, v12, s0
	v_cmp_gt_u32_e64 s0, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 1, v[13:14]
	v_subrev_nc_u32_e32 v13, s17, v21
	v_lshlrev_b64 v[23:24], 1, v[13:14]
	v_lshl_add_u32 v13, s6, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[28:29], 1, v[13:14]
	v_add_co_u32 v36, s1, s9, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v37, s1, s19, v29, s1
	v_cmp_gt_u32_e64 s1, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_cndmask_b32_e64 v28, v35, v31, s2
	v_add_co_u32 v35, s2, s3, v11
	v_add_co_ci_u32_e64 v11, s2, s4, v12, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[29:30], 1, v[13:14]
	v_subrev_nc_u32_e32 v13, s17, v25
	v_add_co_u32 v38, s2, s9, v9
	v_add_co_ci_u32_e64 v39, s2, s19, v10, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[31:32], 1, v[13:14]
	v_subrev_nc_u32_e32 v13, s17, v26
	v_add_co_u32 v12, s2, s3, v29
	v_cndmask_b32_e64 v11, v11, v34, s0
	v_lshlrev_b64 v[9:10], 1, v[13:14]
	v_add_co_ci_u32_e64 v13, s2, s4, v30, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v12, v12, v36, s1
	v_add_co_u32 v9, s2, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v29, s2, s4, v10, s2
	v_cmp_gt_u32_e64 s2, s17, v26
	v_cndmask_b32_e64 v10, v35, v22, s0
	v_cndmask_b32_e64 v13, v13, v37, s1
	v_cndmask_b32_e64 v30, v29, v39, s2
	v_cndmask_b32_e64 v29, v9, v38, s2
	global_load_u16 v9, v[27:28], off
	global_load_u16 v10, v[10:11], off
	global_load_u16 v11, v[12:13], off
	global_load_u16 v12, v[29:30], off
	v_add_co_u32 v13, s0, s3, v19
	v_mov_b32_e32 v22, v14
	v_add_co_ci_u32_e64 v26, s0, s4, v20, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v27, v13, v16, vcc_lo
	v_lshlrev_b64 v[19:20], 1, v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v28, v26, v33, vcc_lo
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v13, vcc_lo, s19, v20, vcc_lo
	v_add_co_u32 v29, vcc_lo, s3, v23
	v_add_co_ci_u32_e32 v24, vcc_lo, s4, v24, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v21
	v_mov_b32_e32 v26, v14
	v_mad_u64_u32 v[22:23], null, s6, 7, v[0:1]
	v_mov_b32_e32 v23, v14
	v_cndmask_b32_e32 v21, v24, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[19:20], 1, v[25:26]
	v_subrev_nc_u32_e32 v13, s17, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v24, s0, s9, v19
	v_add_co_ci_u32_e64 v26, s0, s19, v20, s0
	v_lshlrev_b64 v[19:20], 1, v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	v_add_co_u32 v23, s0, s3, v31
	v_add_co_ci_u32_e64 v30, s0, s4, v32, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_u32 v19, s1, s9, v19
	v_cmp_gt_u32_e64 s0, s17, v25
	v_add_co_ci_u32_e64 v25, s1, s19, v20, s1
	v_add_co_u32 v31, s1, s3, v13
	v_add_co_ci_u32_e64 v32, s1, s4, v14, s1
	v_cmp_gt_u32_e64 s1, s17, v22
	v_cndmask_b32_e32 v20, v29, v16, vcc_lo
	v_cndmask_b32_e64 v14, v30, v26, s0
	v_cndmask_b32_e64 v13, v23, v24, s0
	s_mov_b32 s0, 0
	v_cndmask_b32_e64 v23, v32, v25, s1
	v_cndmask_b32_e64 v22, v31, v19, s1
	global_load_d16_hi_b16 v9, v[27:28], off
	global_load_d16_hi_b16 v10, v[20:21], off
	global_load_d16_hi_b16 v11, v[13:14], off
	global_load_d16_hi_b16 v12, v[22:23], off
	s_branch .LBB26_24
.LBB26_23:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12
                                        ; implicit-def: $sgpr8
.LBB26_24:                              ; %Flow129
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB26_42
; %bb.25:                               ; %.preheader.i98.i.i
	s_add_i32 s8, s7, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12
	v_cmpx_gt_u32_e64 s8, v0
	s_cbranch_execz .LBB26_27
; %bb.26:
	s_waitcnt vmcnt(3)
	v_subrev_nc_u32_e32 v9, s17, v0
	s_waitcnt vmcnt(1)
	v_add_co_u32 v11, s1, s9, v18
	v_mov_b32_e32 v10, 0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e64 v12, null, s19, 0, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 1, v[9:10]
	v_add_co_u32 v9, vcc_lo, s3, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s4, v10, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v9, v9, v11 :: v_dual_cndmask_b32 v10, v10, v12
	global_load_d16_b16 v9, v[9:10], off
.LBB26_27:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v13, s6, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v13
	s_cbranch_execz .LBB26_29
; %bb.28:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s3, v13
	v_add_co_ci_u32_e64 v14, s0, s4, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_hi_b16 v9, v[13:14], off
.LBB26_29:
	s_or_b32 exec_lo, exec_lo, s1
	v_lshl_add_u32 v13, s6, 1, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v13
	s_cbranch_execz .LBB26_31
; %bb.30:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s3, v13
	v_add_co_ci_u32_e64 v14, s0, s4, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_b16 v10, v[13:14], off
.LBB26_31:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[13:14], null, s6, 3, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v13
	s_cbranch_execz .LBB26_33
; %bb.32:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s3, v13
	v_add_co_ci_u32_e64 v14, s0, s4, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_hi_b16 v10, v[13:14], off
.LBB26_33:
	s_or_b32 exec_lo, exec_lo, s1
	v_lshl_add_u32 v13, s6, 2, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v13
	s_cbranch_execz .LBB26_35
; %bb.34:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s3, v13
	v_add_co_ci_u32_e64 v14, s0, s4, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_b16 v11, v[13:14], off
.LBB26_35:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[13:14], null, s6, 5, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v13
	s_cbranch_execz .LBB26_37
; %bb.36:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s3, v13
	v_add_co_ci_u32_e64 v14, s0, s4, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_hi_b16 v11, v[13:14], off
.LBB26_37:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[13:14], null, s6, 6, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v13
	s_cbranch_execz .LBB26_39
; %bb.38:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s3, v13
	v_add_co_ci_u32_e64 v14, s0, s4, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_b16 v12, v[13:14], off
.LBB26_39:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[13:14], null, s6, 7, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v13
	s_cbranch_execz .LBB26_41
; %bb.40:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s3, v13
	v_add_co_ci_u32_e64 v14, s0, s4, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_hi_b16 v12, v[13:14], off
.LBB26_41:                              ; %Flow128
	s_or_b32 exec_lo, exec_lo, s1
.LBB26_42:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EtPtEEvRAT__T0_T1_S6_jjb.exit.i.i
	v_lshlrev_b32_e32 v13, 3, v0
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_min_u32_e32 v14, s8, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e64 v21, v14, s7 clamp
	v_min_u32_e32 v16, s17, v14
	v_cmpx_lt_u32_e64 v21, v16
	s_cbranch_execz .LBB26_46
; %bb.43:                               ; %.lr.ph.i.preheader.i.i
	v_lshlrev_b32_e32 v19, 2, v14
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v19, s17, 2, v19
.LBB26_44:                              ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v20, v16, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v20, 1, v20
	v_not_b32_e32 v22, v20
	v_lshlrev_b32_e32 v23, 2, v20
	v_add_nc_u32_e32 v24, 1, v20
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v22, v22, 2, v19
	ds_load_b32 v23, v23
	ds_load_b32 v22, v22
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v23, v22
	v_cndmask_b32_e32 v16, v16, v20, vcc_lo
	v_cndmask_b32_e32 v21, v24, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v21, v16
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB26_44
; %bb.45:                               ; %Flow126
	s_or_b32 exec_lo, exec_lo, s1
.LBB26_46:                              ; %Flow127
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s0
	v_sub_nc_u32_e32 v14, v14, v21
	v_cmp_ge_u32_e32 vcc_lo, s17, v21
                                        ; implicit-def: $vgpr25
                                        ; implicit-def: $vgpr22
                                        ; implicit-def: $vgpr24
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr23
                                        ; implicit-def: $vgpr19
                                        ; implicit-def: $vgpr16
	v_add_nc_u32_e32 v26, s17, v14
                                        ; implicit-def: $vgpr14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_u32_e64 s0, s8, v26
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB26_52
; %bb.47:                               ; %._crit_edge.i.i.i.i
	v_cmp_gt_u32_e32 vcc_lo, s17, v21
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB26_49
; %bb.48:
	v_lshlrev_b32_e32 v1, 2, v21
	ds_load_b32 v1, v1
.LBB26_49:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_le_u32_e64 s0, s8, v26
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_gt_u32_e64 s8, v26
	s_cbranch_execz .LBB26_51
; %bb.50:
	v_lshlrev_b32_e32 v2, 2, v26
	ds_load_b32 v2, v2
.LBB26_51:                              ; %.loopexit.loopexit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	v_cmp_le_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_or_b32 vcc_lo, s0, s1
	v_dual_mov_b32 v3, s17 :: v_dual_cndmask_b32 v16, v26, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, s8, v3 :: v_dual_add_nc_u32 v5, 1, v16
	v_add_nc_u32_e32 v4, -1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v4, v5, v4
	v_lshlrev_b32_e32 v4, 2, v4
	ds_load_b32 v4, v4
	v_cndmask_b32_e32 v6, v21, v5, vcc_lo
	v_cndmask_b32_e32 v5, v5, v26, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e64 s2, s8, v5
	s_waitcnt lgkmcnt(0)
	v_dual_cndmask_b32 v7, v4, v2 :: v_dual_cndmask_b32 v4, v1, v4
	v_cmp_gt_u32_e64 s0, s17, v6
	v_cndmask_b32_e32 v1, v2, v1, vcc_lo
	v_cmp_le_u32_e64 s1, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_or_b32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v14, v5, v6, s0
	v_cndmask_b32_e64 v8, s8, v3, s0
	v_add_nc_u32_e32 v19, 1, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v8, -1, v8
	v_cndmask_b32_e64 v2, v7, v4, s0
	v_cndmask_b32_e64 v6, v6, v19, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v8, v19, v8
	v_cndmask_b32_e64 v5, v19, v5, s0
	v_cmp_gt_u32_e64 s1, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v8, 2, v8
	v_cmp_le_u32_e64 s3, s8, v5
	ds_load_b32 v8, v8
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v21, v8, v7, s0
	v_cndmask_b32_e64 v8, v4, v8, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s2, v8, v21
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s3, s1
	v_cndmask_b32_e64 v19, v5, v6, s1
	v_cndmask_b32_e64 v20, s8, v3, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v22, 1, v19
	v_add_nc_u32_e32 v20, -1, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v22, s1
	v_min_u32_e32 v20, v22, v20
	v_cndmask_b32_e64 v5, v22, v5, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s2, s17, v6
	v_lshlrev_b32_e32 v20, 2, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s4, s8, v5
	ds_load_b32 v20, v20
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v25, v20, v21, s1
	v_cndmask_b32_e64 v26, v8, v20, s1
	v_cmp_le_u32_e64 s3, v26, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_or_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v23, v5, v6, s2
	v_cndmask_b32_e64 v20, s8, v3, s2
	v_cndmask_b32_e64 v4, v25, v26, s2
	v_add_nc_u32_e32 v22, 1, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v20, -1, v20
	v_cndmask_b32_e64 v6, v6, v22, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v20, v22, v20
	v_cndmask_b32_e64 v5, v22, v5, s2
	v_cmp_gt_u32_e64 s3, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v20, 2, v20
	v_cmp_le_u32_e64 s5, s8, v5
	ds_load_b32 v20, v20
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v27, v20, v25, s2
	v_cndmask_b32_e64 v28, v26, v20, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s4, v28, v27
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s5, s3
	v_cndmask_b32_e64 v20, v5, v6, s3
	v_cndmask_b32_e64 v22, s8, v3, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v24, 1, v20
	v_add_nc_u32_e32 v22, -1, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v24, s3
	v_min_u32_e32 v22, v24, v22
	v_cndmask_b32_e64 v5, v24, v5, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s4, s17, v6
	v_lshlrev_b32_e32 v22, 2, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s6, s8, v5
	ds_load_b32 v22, v22
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v29, v22, v27, s3
	v_cndmask_b32_e64 v30, v28, v22, s3
	v_cmp_le_u32_e64 s5, v30, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, s5
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v24, v5, v6, s4
	v_cndmask_b32_e64 v22, s8, v3, s4
	v_add_nc_u32_e32 v31, 1, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v22, -1, v22
	v_cndmask_b32_e64 v6, v6, v31, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v22, v31, v22
	v_cndmask_b32_e64 v5, v31, v5, s4
	v_cmp_gt_u32_e64 s5, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v22, 2, v22
	v_cmp_le_u32_e64 s7, s8, v5
	ds_load_b32 v22, v22
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v32, v22, v29, s4
	v_cndmask_b32_e64 v33, v30, v22, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s6, v33, v32
	s_and_b32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s7, s5
	v_cndmask_b32_e64 v22, v5, v6, s5
	v_cndmask_b32_e64 v3, s8, v3, s5
	v_cndmask_b32_e64 v7, v32, v33, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v31, 1, v22
	v_add_nc_u32_e32 v3, -1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v34, v6, v31, s5
	v_min_u32_e32 v3, v31, v3
	v_cndmask_b32_e64 v31, v31, v5, s5
	v_cndmask_b32_e64 v5, v27, v28, s3
	v_cndmask_b32_e64 v6, v29, v30, s4
	v_cmp_gt_u32_e32 vcc_lo, s17, v34
	v_lshlrev_b32_e32 v3, 2, v3
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v35, v3, v32, s5
	v_cndmask_b32_e64 v36, v33, v3, s5
	v_cndmask_b32_e64 v3, v21, v8, s1
	v_cmp_le_u32_e64 s1, s8, v31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s0, v36, v35
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 vcc_lo, s1, s0
	v_cndmask_b32_e32 v8, v35, v36, vcc_lo
	v_cndmask_b32_e32 v25, v31, v34, vcc_lo
.LBB26_52:                              ; %Flow124
	s_or_b32 exec_lo, exec_lo, s9
	s_barrier
	buffer_gl0_inv
	ds_store_b16 v18, v9
	ds_store_b16_d16_hi v18, v9 offset:256
	ds_store_b16 v18, v10 offset:512
	ds_store_b16_d16_hi v18, v10 offset:768
	ds_store_b16 v18, v11 offset:1024
	ds_store_b16_d16_hi v18, v11 offset:1280
	ds_store_b16 v18, v12 offset:1536
	ds_store_b16_d16_hi v18, v12 offset:1792
	v_lshlrev_b32_e32 v9, 1, v16
	v_lshlrev_b32_e32 v10, 1, v19
	v_lshlrev_b32_e32 v11, 1, v20
	v_lshlrev_b32_e32 v12, 1, v22
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v21, v9
	ds_load_u16 v20, v10
	ds_load_u16 v19, v11
	ds_load_u16 v22, v12
	v_lshlrev_b32_e32 v9, 1, v14
	v_lshlrev_b32_e32 v10, 1, v23
	v_lshlrev_b32_e32 v11, 1, v24
	v_lshlrev_b32_e32 v12, 1, v25
	v_cmp_ne_u32_e32 vcc_lo, 1, v15
	s_mov_b32 s17, 0
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v21, v9
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v20, v10
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v19, v11
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v22, v12
	v_lshrrev_b32_e32 v9, 2, v0
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v23, v9, v13
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b32_e32 v24, 2, v23
	s_cbranch_vccnz .LBB26_62
; %bb.53:                               ; %.preheader166.i.i.preheader
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v9, v24
	s_mov_b64 s[0:1], 0
.LBB26_54:                              ; %.preheader166.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v10, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v9, v10
	v_add_nc_u32_e32 v9, 4, v9
	s_cbranch_scc0 .LBB26_54
; %bb.55:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v25, v0, v9
	v_dual_mov_b32 v16, v8 :: v_dual_mov_b32 v13, v5
	v_mov_b32_e32 v14, v6
	v_dual_mov_b32 v12, v4 :: v_dual_mov_b32 v11, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mov_b32 v15, v7 :: v_dual_lshlrev_b32 v26, 2, v25
	v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v9, v1
.LBB26_56:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v27, v26
	v_add_nc_u32_e32 v26, 0x210, v26
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v9, v27
	s_cbranch_scc1 .LBB26_56
; %bb.57:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_lshl_b64 s[0:1], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	s_clause 0x7
	global_store_b32 v17, v9, s[0:1]
	global_store_b32 v17, v10, s[0:1] offset:512
	global_store_b32 v17, v11, s[0:1] offset:1024
	global_store_b32 v17, v12, s[0:1] offset:1536
	global_store_b32 v17, v13, s[0:1] offset:2048
	global_store_b32 v17, v14, s[0:1] offset:2560
	global_store_b32 v17, v15, s[0:1] offset:3072
	global_store_b32 v17, v16, s[0:1] offset:3584
	v_lshlrev_b32_e32 v9, 1, v23
	v_lshrrev_b32_e32 v10, 16, v21
	v_lshrrev_b32_e32 v11, 16, v20
	v_lshrrev_b32_e32 v12, 16, v19
	v_lshrrev_b32_e32 v13, 16, v22
	s_mov_b64 s[0:1], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB26_58:                              ; =>This Inner Loop Header: Depth=1
	s_cmp_eq_u32 s0, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 2
	v_cndmask_b32_e32 v14, v21, v10, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v14, v20, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 4
	v_cndmask_b32_e32 v14, v14, v11, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v14, v19, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 6
	v_cndmask_b32_e32 v14, v14, v12, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 7
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v14, v22, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	v_cndmask_b32_e32 v14, v14, v13, vcc_lo
	ds_store_b16 v9, v14
	v_add_nc_u32_e32 v9, 2, v9
	s_cbranch_scc0 .LBB26_58
; %bb.59:
	v_dual_mov_b32 v10, v20 :: v_dual_lshlrev_b32 v13, 1, v25
	v_dual_mov_b32 v11, v21 :: v_dual_mov_b32 v12, v22
	v_mov_b32_e32 v9, v19
	s_mov_b64 s[8:9], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB26_60:                              ; =>This Inner Loop Header: Depth=1
	ds_load_u16 v14, v13
	s_cmp_eq_u32 s8, 7
	v_lshrrev_b32_e32 v15, 16, v12
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s8, 5
	v_lshrrev_b32_e32 v16, 16, v9
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s8, 3
	v_lshrrev_b32_e32 v25, 16, v10
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s8, 1
	v_lshrrev_b32_e32 v26, 16, v11
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s8, 6
	v_add_nc_u32_e32 v13, 0x108, v13
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s8, 4
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 2
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v15, v15, v14, vcc_lo
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s8, 0
	v_cndmask_b32_e64 v16, v16, v14, s0
	s_cselect_b32 s6, -1, 0
	v_cndmask_b32_e64 v25, v25, v14, s1
	v_cndmask_b32_e64 v26, v26, v14, s2
	v_cndmask_b32_e64 v11, v11, v14, s6
	v_cndmask_b32_e64 v10, v10, v14, s5
	v_cndmask_b32_e64 v9, v9, v14, s4
	v_cndmask_b32_e64 v12, v12, v14, s3
	s_add_u32 s8, s8, 1
	v_perm_b32 v11, v26, v11, 0x5040100
	v_perm_b32 v10, v25, v10, 0x5040100
	v_perm_b32 v9, v16, v9, 0x5040100
	v_perm_b32 v12, v15, v12, 0x5040100
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s8, 8
	s_cbranch_scc1 .LBB26_60
; %bb.61:                               ; %_ZN7rocprim11block_storeItLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrItEEEEvT_RA8_tRNS_14block_exchangeItLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_lshl_b64 s[2:3], s[16:17], 1
	s_mov_b32 s0, 0
	s_add_u32 s2, s14, s2
	s_addc_u32 s3, s15, s3
	s_mov_b32 s20, -1
	s_clause 0x6
	global_store_b16 v18, v11, s[2:3]
	global_store_d16_hi_b16 v18, v11, s[2:3] offset:256
	global_store_b16 v18, v10, s[2:3] offset:512
	global_store_d16_hi_b16 v18, v10, s[2:3] offset:768
	global_store_b16 v18, v9, s[2:3] offset:1024
	global_store_d16_hi_b16 v18, v9, s[2:3] offset:1280
	global_store_b16 v18, v12, s[2:3] offset:1536
	s_branch .LBB26_63
.LBB26_62:
	s_mov_b32 s0, -1
	s_mov_b32 s20, s17
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12
.LBB26_63:                              ; %Flow
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB26_103
; %bb.64:                               ; %.preheader.i.i.preheader
	v_mov_b32_e32 v9, v24
	s_mov_b64 s[0:1], 0
.LBB26_65:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v10, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v9, v10
	v_add_nc_u32_e32 v9, 4, v9
	s_cbranch_scc0 .LBB26_65
; %bb.66:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v11, v0, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v9, 2, v11
.LBB26_67:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v10, v9
	v_add_nc_u32_e32 v9, 0x210, v9
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v1, v10
	s_cbranch_scc1 .LBB26_67
; %bb.68:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[0:1], s[16:17], 2
	s_sub_i32 s6, s18, s16
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	v_add_co_u32 v9, s0, s0, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, null, s1, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s6, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB26_70
; %bb.69:
	global_store_b32 v[9:10], v1, off
.LBB26_70:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v1, 0x80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s6, v1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB26_72
; %bb.71:
	global_store_b32 v[9:10], v2, off offset:512
.LBB26_72:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v1, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s6, v1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB26_74
; %bb.73:
	global_store_b32 v[9:10], v3, off offset:1024
.LBB26_74:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v1, 0x180, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s6, v1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB26_76
; %bb.75:
	global_store_b32 v[9:10], v4, off offset:1536
.LBB26_76:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v1, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s6, v1
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB26_78
; %bb.77:
	global_store_b32 v[9:10], v5, off offset:2048
.LBB26_78:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v1, 0x280, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s6, v1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB26_80
; %bb.79:
	global_store_b32 v[9:10], v6, off offset:2560
.LBB26_80:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v1, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s6, v1
	s_and_saveexec_b32 s7, s5
	s_cbranch_execz .LBB26_82
; %bb.81:
	global_store_b32 v[9:10], v7, off offset:3072
.LBB26_82:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v0, 0x380, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s20, s6, v0
	s_and_saveexec_b32 s6, s20
	s_cbranch_execz .LBB26_84
; %bb.83:
	global_store_b32 v[9:10], v8, off offset:3584
.LBB26_84:                              ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jjRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b32_e32 v3, 1, v23
	v_lshrrev_b32_e32 v0, 16, v21
	v_lshrrev_b32_e32 v1, 16, v20
	v_lshrrev_b32_e32 v2, 16, v19
	v_lshrrev_b32_e32 v4, 16, v22
	v_sub_nc_u32_e32 v3, v24, v3
	s_mov_b64 s[8:9], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB26_85:                              ; =>This Inner Loop Header: Depth=1
	s_cmp_eq_u32 s8, 1
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 2
	v_cndmask_b32_e64 v5, v21, v0, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v20, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 4
	v_cndmask_b32_e64 v5, v5, v1, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v19, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 6
	v_cndmask_b32_e64 v5, v5, v2, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 7
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v22, s6
	s_cselect_b32 s6, -1, 0
	s_add_u32 s8, s8, 1
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s8, 8
	v_cndmask_b32_e64 v5, v5, v4, s6
	ds_store_b16 v3, v5
	v_add_nc_u32_e32 v3, 2, v3
	s_cbranch_scc0 .LBB26_85
; %bb.86:
	v_lshlrev_b32_e32 v0, 1, v11
	v_mov_b32_e32 v12, v22
	s_mov_b64 s[18:19], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB26_87:                              ; =>This Inner Loop Header: Depth=1
	ds_load_u16 v1, v0
	s_cmp_eq_u32 s18, 7
	v_lshrrev_b32_e32 v2, 16, v12
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s18, 5
	v_lshrrev_b32_e32 v3, 16, v19
	s_cselect_b32 s7, -1, 0
	s_cmp_eq_u32 s18, 3
	v_lshrrev_b32_e32 v4, 16, v20
	s_cselect_b32 s8, -1, 0
	s_cmp_eq_u32 s18, 1
	v_lshrrev_b32_e32 v5, 16, v21
	s_cselect_b32 s9, -1, 0
	s_cmp_eq_u32 s18, 6
	v_add_nc_u32_e32 v0, 0x108, v0
	s_cselect_b32 s10, -1, 0
	s_cmp_eq_u32 s18, 4
	s_cselect_b32 s11, -1, 0
	s_cmp_eq_u32 s18, 2
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v2, v2, v1, s6
	s_cselect_b32 s12, -1, 0
	s_cmp_eq_u32 s18, 0
	v_cndmask_b32_e64 v3, v3, v1, s7
	s_cselect_b32 s13, -1, 0
	v_cndmask_b32_e64 v4, v4, v1, s8
	v_cndmask_b32_e64 v5, v5, v1, s9
	v_cndmask_b32_e64 v6, v21, v1, s13
	v_cndmask_b32_e64 v7, v20, v1, s12
	v_cndmask_b32_e64 v8, v19, v1, s11
	v_cndmask_b32_e64 v1, v12, v1, s10
	s_add_u32 s18, s18, 1
	v_perm_b32 v21, v5, v6, 0x5040100
	v_perm_b32 v20, v4, v7, 0x5040100
	v_perm_b32 v19, v3, v8, 0x5040100
	v_perm_b32 v12, v2, v1, 0x5040100
	s_addc_u32 s19, s19, 0
	s_cmp_lg_u32 s18, 8
	s_cbranch_scc1 .LBB26_87
; %bb.88:                               ; %_ZN7rocprim14block_exchangeItLj128ELj8ELj1ELj1EE18blocked_to_stripedItEEvRA8_KtRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[6:7], s[16:17], 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_u32 s6, s14, s6
	s_addc_u32 s7, s15, s7
	v_add_co_u32 v0, s6, s6, v18
	v_add_co_ci_u32_e64 v1, null, s7, 0, s6
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB26_90
; %bb.89:
	global_store_b16 v[0:1], v21, off
.LBB26_90:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB26_92
; %bb.91:
	global_store_d16_hi_b16 v[0:1], v21, off offset:256
.LBB26_92:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB26_94
; %bb.93:
	global_store_b16 v[0:1], v20, off offset:512
.LBB26_94:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB26_96
; %bb.95:
	global_store_d16_hi_b16 v[0:1], v20, off offset:768
.LBB26_96:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB26_98
; %bb.97:
	global_store_b16 v[0:1], v19, off offset:1024
.LBB26_98:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB26_100
; %bb.99:
	global_store_d16_hi_b16 v[0:1], v19, off offset:1280
.LBB26_100:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB26_102
; %bb.101:
	global_store_b16 v[0:1], v12, off offset:1536
.LBB26_102:
	s_or_b32 exec_lo, exec_lo, s0
.LBB26_103:                             ; %Flow122
	s_and_saveexec_b32 s0, s20
	s_cbranch_execz .LBB26_105
; %bb.104:                              ; %_ZN7rocprim11block_storeItLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrItEEEEvT_RA8_tjRNS_14block_exchangeItLj128ELj8ELj1ELj1EE13storage_type_E.exit.sink.split.i.i.i
	s_lshl_b64 s[0:1], s[16:17], 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s14, s0
	s_addc_u32 s1, s15, s1
	global_store_d16_hi_b16 v18, v12, s[0:1] offset:1792
.LBB26_105:                             ; %_ZN7rocprim6detail28block_merge_mergepath_kernelILj128ELj8EPjN6thrust10device_ptrIjEEPtNS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_PKSF_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 40
		.amdhsa_next_free_sgpr 27
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
.Lfunc_end26:
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end26-_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 7220
; NumSgprs: 29
; NumVgprs: 40
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 29
; NumVGPRsForWavesPerEU: 40
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.protected	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ ; -- Begin function _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.globl	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	8
	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: ; @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x20
	s_lshl_b32 s12, s15, 7
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s4, s2, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s4, v0
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB27_28
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_lshr_b32 s0, s2, 7
	s_mov_b32 s13, 0
	s_cmp_lg_u32 s15, s0
	v_lshlrev_b32_e32 v1, 1, v0
	s_cselect_b32 s1, -1, 0
	s_lshl_b64 s[16:17], s[12:13], 2
	v_lshlrev_b32_e32 v2, 2, v0
	v_add_nc_u32_e32 v0, s12, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s4, s16
	s_addc_u32 s17, s5, s17
	s_lshl_b64 s[18:19], s[12:13], 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s8, s8, s18
	s_addc_u32 s9, s9, s19
	global_load_u16 v3, v1, s[8:9]
	global_load_b32 v4, v2, s[16:17]
	s_lshr_b32 s0, s3, 7
	s_sub_i32 s9, 0, s3
	s_sub_i32 s8, 0, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, s15, s8
	s_and_b32 s0, s8, s0
	s_lshl_b32 s8, s8, 7
	s_cmp_eq_u32 s0, 0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s14, s0, exec_lo
	s_cselect_b32 s14, s3, s9
	s_add_i32 s14, s14, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s14, s2
	s_cbranch_scc1 .LBB27_4
; %bb.2:
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB27_5
; %bb.3:                                ; %.critedge68.i
	v_mov_b32_e32 v1, 0
	s_mov_b32 s9, 0
	s_mov_b32 s13, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
	s_branch .LBB27_6
.LBB27_4:
	s_mov_b32 s9, -1
                                        ; implicit-def: $vgpr1_vgpr2
	s_branch .LBB27_11
.LBB27_5:
	s_mov_b32 s9, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB27_6:                               ; %Flow33
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_cbranch_vccnz .LBB27_10
; %bb.7:
	s_mov_b32 s9, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB27_9
; %bb.8:
	v_mov_b32_e32 v1, 0
	s_or_b32 s13, s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB27_9:                               ; %Flow35
	s_or_b32 exec_lo, exec_lo, s9
.LBB27_10:                              ; %Flow34
	s_mov_b32 s9, 0
.LBB27_11:                              ; %Flow32
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s9
	s_cbranch_vccz .LBB27_26
; %bb.12:
	s_min_u32 s9, s14, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s3, s9, s3
	s_min_u32 s12, s8, s9
	s_add_i32 s8, s8, s9
	s_min_u32 s2, s3, s2
	s_cmp_gt_u32 s3, s14
	v_subrev_nc_u32_e32 v0, s8, v0
	s_cselect_b32 s3, -1, 0
	s_and_b32 vcc_lo, exec_lo, s1
	v_cndmask_b32_e64 v1, 0, 1, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, s12, v0
	v_cmp_ne_u32_e64 s1, 1, v1
	s_cbranch_vccz .LBB27_18
; %bb.13:                               ; %.critedge72.i
	v_mov_b32_e32 v2, s9
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB27_17
; %bb.14:                               ; %.lr.ph.i84.i.preheader
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, s9
	s_mov_b32 s1, 0
.LBB27_15:                              ; %.lr.ph.i84.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v6
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v4, v7
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v7, v4
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v8, s0
	v_add_nc_u32_e32 v8, 1, v0
	v_and_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 1, v7
	v_cndmask_b32_e32 v6, v0, v6, vcc_lo
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v6
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB27_15
; %bb.16:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
.LBB27_17:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEEPtNS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit90.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	s_mov_b32 s1, 0
	v_lshlrev_b64 v[6:7], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v4, off
	s_branch .LBB27_19
.LBB27_18:
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB27_19:                              ; %Flow30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB27_25
; %bb.20:
	v_mov_b32_e32 v2, s9
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB27_24
; %bb.21:                               ; %.lr.ph.i.i.preheader
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, s9
	s_mov_b32 s1, 0
.LBB27_22:                              ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v6
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v4, v7
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v7, v4
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v8, s0
	v_add_nc_u32_e32 v8, 1, v0
	v_and_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 1, v7
	v_cndmask_b32_e32 v6, v0, v6, vcc_lo
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v6
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB27_22
; %bb.23:                               ; %Flow28
	s_or_b32 exec_lo, exec_lo, s1
.LBB27_24:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEEPtNS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB27_25:                              ; %Flow31
	s_mov_b32 s13, -1
.LBB27_26:                              ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s13
	s_cbranch_execz .LBB27_28
; %bb.27:                               ; %.critedge.sink.split.i
	s_waitcnt vmcnt(1)
	global_store_b16 v[1:2], v3, off
.LBB27_28:                              ; %_ZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEEPtNS4_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
.Lfunc_end27:
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end27-_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1012
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.protected	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_ ; -- Begin function _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.globl	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.p2align	8
	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@function
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_: ; @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x8
	v_lshl_or_b32 v0, s15, 7, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB28_6
; %bb.1:
	s_load_b32 s3, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, 0x7ffffe
	s_sub_i32 s5, 0, s4
	s_add_i32 s4, s4, -1
	v_and_b32_e32 v1, s5, v0
	v_and_b32_e32 v5, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 10, v1
	v_add_nc_u32_e32 v2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v4, s2, v2
	v_min_u32_e32 v2, s2, v1
	v_add_nc_u32_e32 v3, s3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, s2, v3
	v_lshlrev_b32_e32 v3, 10, v5
	s_mov_b32 s2, exec_lo
	v_sub_nc_u32_e32 v5, v1, v2
	v_sub_nc_u32_e32 v6, v1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, v5, v3
	v_sub_nc_u32_e32 v3, v4, v2
	v_sub_nc_u32_e64 v6, v1, v6 clamp
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v7, v1, v3
	v_cmpx_lt_u32_e64 v6, v7
	s_cbranch_execz .LBB28_5
; %bb.2:                                ; %.lr.ph.i.preheader
	s_load_b64 s[4:5], s[0:1], 0x0
	v_mov_b32_e32 v5, 0
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v5
	v_lshlrev_b64 v[10:11], 2, v[4:5]
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v11, vcc_lo
.LBB28_3:                               ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v4, 1, v4
	v_mov_b32_e32 v12, v5
	v_xad_u32 v11, v4, -1, v1
	v_lshlrev_b64 v[13:14], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v13, vcc_lo, v3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v8, v14, vcc_lo
	v_add_co_u32 v11, vcc_lo, v9, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, v10, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	v_add_nc_u32_e32 v12, 1, v4
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v13, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v7, v7, v4 :: v_dual_cndmask_b32 v6, v12, v6
	v_cmp_ge_u32_e32 vcc_lo, v6, v7
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB28_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s3
.LBB28_5:                               ; %Flow53
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v6, v2
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB28_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
.Lfunc_end28:
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, .Lfunc_end28-_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.protected	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ ; -- Begin function _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.globl	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	8
	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: ; @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
; %bb.0:
	s_clause 0x2
	s_load_b64 s[18:19], s[0:1], 0x20
	s_load_b64 s[4:5], s[0:1], 0x30
	s_load_b64 s[22:23], s[0:1], 0x44
	s_mov_b32 s3, 0
	s_mov_b32 s6, s15
	s_mov_b32 s7, s3
	s_mov_b32 s11, s3
	v_lshlrev_b32_e32 v17, 2, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s26, s18, 10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s15, s26
	s_cselect_b32 s20, -1, 0
	s_lshl_b64 s[8:9], s[6:7], 2
	s_add_u32 s8, s4, s8
	s_addc_u32 s9, s5, s9
	s_add_i32 s10, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[10:11], 2
	s_add_u32 s4, s4, s10
	s_addc_u32 s5, s5, s11
	s_clause 0x1
	s_load_b32 s2, s[8:9], 0x0
	s_load_b32 s7, s[4:5], 0x0
	s_lshr_b32 s4, s19, 9
	s_load_b256 s[8:15], s[0:1], 0x0
	s_and_b32 s0, s4, 0x7ffffe
	s_lshl_b32 s16, s6, 10
	s_sub_i32 s1, 0, s0
	s_add_i32 s0, s0, -1
	s_and_b32 s1, s6, s1
	s_and_b32 s5, s0, s6
	s_lshl_b32 s4, s1, 11
	s_lshl_b32 s1, s1, 10
	s_add_i32 s4, s4, s19
	s_sub_i32 s17, s16, s1
	s_sub_i32 s1, s4, s1
	s_add_i32 s4, s4, s17
	s_min_u32 s17, s18, s1
	s_add_i32 s1, s1, s19
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s19, s4, s2
	s_sub_i32 s21, s4, s7
	s_min_u32 s4, s18, s19
	s_addk_i32 s21, 0x400
	s_cmp_eq_u32 s0, s5
	s_mov_b32 s5, s3
	s_cselect_b32 s19, s1, s21
	s_cselect_b32 s17, s17, s7
	s_lshl_b64 s[0:1], s[2:3], 2
	s_min_u32 s7, s19, s18
	s_sub_i32 s17, s17, s2
	s_add_u32 s19, s8, s0
	s_addc_u32 s21, s9, s1
	s_lshl_b64 s[24:25], s[4:5], 2
	s_mov_b32 s1, -1
	s_add_u32 s8, s8, s24
	s_addc_u32 s9, s9, s25
	s_and_b32 s0, s23, 0xffff
	s_lshr_b32 s23, s22, 16
	s_and_b32 s22, s22, 0xffff
	s_cmp_eq_u32 s6, s26
	s_mul_i32 s22, s22, s23
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s6, s22, s0
	s_cbranch_scc1 .LBB29_2
; %bb.1:                                ; %.preheader38.i.i.i
	v_subrev_nc_u32_e32 v3, s17, v0
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v5, s6, v0
	v_add_co_u32 v7, s0, s19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, null, s21, 0, s0
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v3, s17, v5
	v_lshl_add_u32 v9, s6, 1, v0
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_mov_b32 v6, v4 :: v_dual_cndmask_b32 v1, v1, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_lshlrev_b64 v[10:11], 2, v[5:6]
	v_subrev_nc_u32_e32 v3, s17, v9
	global_load_b32 v1, v[1:2], off
	v_add_co_u32 v7, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	v_add_co_u32 v12, vcc_lo, s19, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v11, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v5
	v_mov_b32_e32 v10, v4
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v7, v7, v12 :: v_dual_cndmask_b32 v8, v8, v11
	v_lshlrev_b64 v[10:11], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v2, v[7:8], off
	v_add_co_u32 v14, vcc_lo, s19, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s21, v11, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v9, v12, v14, vcc_lo
	v_cndmask_b32_e32 v10, v13, v10, vcc_lo
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[5:6], null, s6, 3, v[0:1]
	v_mov_b32_e32 v6, v4
	v_mad_u64_u32 v[13:14], null, s6, 5, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v3, s17, v5
	v_lshlrev_b64 v[11:12], 2, v[5:6]
	v_lshl_add_u32 v6, s6, 2, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_u32 v16, vcc_lo, s8, v7
	v_mov_b32_e32 v7, v4
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	v_add_co_u32 v18, vcc_lo, s19, v11
	v_add_co_ci_u32_e32 v15, vcc_lo, s21, v12, vcc_lo
	v_lshlrev_b64 v[11:12], 2, v[3:4]
	v_cmp_gt_u32_e32 vcc_lo, s17, v5
	v_subrev_nc_u32_e32 v3, s17, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v8, v15, vcc_lo
	v_lshlrev_b64 v[14:15], 2, v[6:7]
	v_add_co_u32 v5, s0, s8, v11
	v_add_co_ci_u32_e64 v19, s0, s9, v12, s0
	v_mad_u64_u32 v[11:12], null, s6, 6, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s0, s19, v14
	v_add_co_ci_u32_e64 v12, s0, s21, v15, s0
	v_mov_b32_e32 v14, v4
	v_cndmask_b32_e32 v7, v16, v18, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v6
	v_lshlrev_b64 v[15:16], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v11
	v_cndmask_b32_e32 v6, v19, v12, vcc_lo
	v_lshlrev_b64 v[18:19], 2, v[13:14]
	v_mov_b32_e32 v12, v4
	v_add_co_u32 v21, s0, s8, v15
	v_lshlrev_b64 v[14:15], 2, v[3:4]
	v_add_co_ci_u32_e64 v16, s0, s9, v16, s0
	v_add_co_u32 v18, s0, s19, v18
	v_lshlrev_b64 v[3:4], 2, v[11:12]
	v_add_co_ci_u32_e64 v19, s0, s21, v19, s0
	v_cmp_gt_u32_e64 s0, s17, v13
	v_add_co_u32 v13, s1, s8, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s1, s9, v15, s1
	v_add_co_u32 v3, s1, s19, v3
	v_add_co_ci_u32_e64 v4, s1, s21, v4, s1
	v_cmp_gt_u32_e64 s1, s17, v11
	v_cndmask_b32_e32 v5, v5, v20, vcc_lo
	v_cndmask_b32_e64 v12, v16, v19, s0
	v_cndmask_b32_e64 v11, v21, v18, s0
	s_mov_b32 s0, -1
	v_cndmask_b32_e64 v14, v14, v4, s1
	v_cndmask_b32_e64 v13, v13, v3, s1
	global_load_b32 v3, v[9:10], off
	global_load_b32 v4, v[7:8], off
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[11:12], off
	global_load_b32 v7, v[13:14], off
	v_mad_u64_u32 v[9:10], null, s6, 7, v[0:1]
	s_mov_b32 s1, 0
	s_branch .LBB29_3
.LBB29_2:
	s_mov_b32 s0, s3
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
.LBB29_3:                               ; %Flow130
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_sub_i32 s7, s7, s4
	s_cbranch_vccnz .LBB29_19
; %bb.4:                                ; %.preheader.i.i.i
	s_add_i32 s1, s7, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB29_6
; %bb.5:
	v_subrev_nc_u32_e32 v1, s17, v0
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, s22, s19, v17
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(3)
	v_add_co_ci_u32_e64 v4, null, s21, 0, s22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v2, v2, v4
	global_load_b32 v1, v[1:2], off
.LBB29_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, s6, v0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB29_8
; %bb.7:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v2, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v2 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v2, v[9:10], off
.LBB29_8:
	s_or_b32 exec_lo, exec_lo, s22
	v_lshl_add_u32 v9, s6, 1, v0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB29_10
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v3, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v3, v[9:10], off
.LBB29_10:
	s_or_b32 exec_lo, exec_lo, s22
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, s6, 3, v[0:1]
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB29_12
; %bb.11:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v4, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v4 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v4, v[9:10], off
.LBB29_12:
	s_or_b32 exec_lo, exec_lo, s22
	v_lshl_add_u32 v9, s6, 2, v0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB29_14
; %bb.13:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v5, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v5 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v5, v[9:10], off
.LBB29_14:
	s_or_b32 exec_lo, exec_lo, s22
	v_mad_u64_u32 v[9:10], null, s6, 5, v[0:1]
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB29_16
; %bb.15:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v6, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v6 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v6, v[9:10], off
.LBB29_16:
	s_or_b32 exec_lo, exec_lo, s22
	v_mad_u64_u32 v[9:10], null, s6, 6, v[0:1]
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB29_18
; %bb.17:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v7, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v7, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v7, v[9:10], off
.LBB29_18:
	s_or_b32 exec_lo, exec_lo, s22
	v_mad_u64_u32 v[9:10], null, s6, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s1, v9
.LBB29_19:                              ; %Flow131
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB29_21
; %bb.20:                               ; %.loopexit.sink.split.i.i.i
	v_mov_b32_e32 v12, 0
	v_subrev_nc_u32_e32 v11, s17, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v10, v12
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[9:10]
	v_add_co_u32 v8, vcc_lo, s8, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v12, vcc_lo
	v_add_co_u32 v11, vcc_lo, s19, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s21, v14, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v9, v10, v12 :: v_dual_cndmask_b32 v8, v8, v11
	global_load_b32 v8, v[8:9], off
.LBB29_21:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EjN6thrust10device_ptrIjEEEEvRAT__T0_T1_S8_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s1
	s_lshl_b64 s[2:3], s[2:3], 1
	v_cndmask_b32_e64 v15, 0, 1, s20
	s_add_u32 s2, s12, s2
	s_addc_u32 s3, s13, s3
	s_lshl_b64 s[4:5], s[4:5], 1
	v_lshlrev_b32_e32 v18, 1, v0
	s_add_u32 s4, s12, s4
	s_mov_b32 s0, 0
	s_addc_u32 s5, s13, s5
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_waitcnt vmcnt(5)
	ds_store_2addr_stride64_b32 v17, v1, v2 offset1:2
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v17, v3, v4 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v17, v5, v6 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v17, v7, v8 offset0:12 offset1:14
	s_cbranch_vccnz .LBB29_23
; %bb.22:                               ; %.preheader38.i87.i.i
	v_mad_u64_u32 v[24:25], null, s6, 3, v[0:1]
	v_add_co_u32 v25, s0, s2, v18
	v_subrev_nc_u32_e32 v12, s17, v0
	v_add_co_ci_u32_e64 v26, null, s3, 0, s0
	v_mov_b32_e32 v13, 0
	v_lshl_add_u32 v20, s6, 1, v0
	v_lshl_add_u32 v11, s6, 2, v0
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 1, v[12:13]
	v_add_co_u32 v14, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v10, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v26, v16, v26 :: v_dual_add_nc_u32 v19, s6, v0
	v_mov_b32_e32 v21, v13
	v_cndmask_b32_e32 v25, v14, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v12, s17, v19
	v_lshlrev_b64 v[27:28], 1, v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], 1, v[12:13]
	v_subrev_nc_u32_e32 v12, s17, v20
	v_lshlrev_b64 v[9:10], 1, v[12:13]
	v_subrev_nc_u32_e32 v12, s17, v24
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, s4, v22
	v_lshlrev_b64 v[29:30], 1, v[12:13]
	v_subrev_nc_u32_e32 v12, s17, v11
	v_add_co_u32 v16, s0, s4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v31, s0, s5, v10, s0
	v_lshlrev_b64 v[9:10], 1, v[12:13]
	v_mov_b32_e32 v12, v13
	v_add_co_u32 v27, s0, s2, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v28, s0, s3, v28, s0
	v_cmp_gt_u32_e64 s0, s17, v20
	v_lshlrev_b64 v[20:21], 1, v[11:12]
	v_add_co_u32 v9, s1, s4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v12, s1, s5, v10, s1
	v_cndmask_b32_e64 v10, v16, v27, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s1, s2, v20
	v_add_co_ci_u32_e64 v21, s1, s3, v21, s1
	v_cmp_gt_u32_e64 s1, s17, v11
	v_cndmask_b32_e64 v11, v31, v28, s0
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v23, vcc_lo
	v_mad_u64_u32 v[31:32], null, s6, 6, v[0:1]
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v21, v12, v21, s1
	v_cndmask_b32_e64 v20, v9, v20, s1
	global_load_u16 v9, v[25:26], off
	global_load_u16 v10, v[10:11], off
	global_load_u16 v11, v[20:21], off
	v_mov_b32_e32 v20, v13
	v_mad_u64_u32 v[26:27], null, s6, 5, v[0:1]
	v_mov_b32_e32 v27, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[20:21], 1, v[19:20]
	v_lshlrev_b64 v[27:28], 1, v[26:27]
	v_subrev_nc_u32_e32 v12, s17, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v23, vcc_lo, s2, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v19
	v_mov_b32_e32 v25, v13
	v_mov_b32_e32 v32, v13
	v_lshlrev_b64 v[19:20], 1, v[12:13]
	v_subrev_nc_u32_e32 v12, s17, v31
	v_dual_cndmask_b32 v22, v16, v21 :: v_dual_cndmask_b32 v21, v14, v23
	v_lshlrev_b64 v[33:34], 1, v[24:25]
	v_lshlrev_b64 v[35:36], 1, v[31:32]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[12:13], 1, v[12:13]
	v_cmp_gt_u32_e32 vcc_lo, s17, v24
	v_add_co_u32 v25, s0, s2, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v32, s0, s3, v34, s0
	v_add_co_u32 v27, s0, s2, v27
	v_add_co_ci_u32_e64 v28, s0, s3, v28, s0
	v_add_co_u32 v33, s0, s2, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v34, s0, s3, v36, s0
	v_add_co_u32 v29, s0, s4, v29
	v_add_co_ci_u32_e64 v30, s0, s5, v30, s0
	v_add_co_u32 v16, s0, s4, v19
	v_add_co_u32 v12, s1, s4, v12
	v_add_co_ci_u32_e64 v19, s0, s5, v20, s0
	v_cmp_gt_u32_e64 s0, s17, v26
	v_add_co_ci_u32_e64 v23, s1, s5, v13, s1
	v_cmp_gt_u32_e64 s1, s17, v31
	v_dual_cndmask_b32 v14, v30, v32 :: v_dual_cndmask_b32 v13, v29, v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v20, v19, v28, s0
	v_cndmask_b32_e64 v19, v16, v27, s0
	v_cndmask_b32_e64 v24, v23, v34, s1
	v_cndmask_b32_e64 v23, v12, v33, s1
	s_add_i32 s1, s7, s17
	s_mov_b32 s0, -1
	global_load_d16_hi_b16 v9, v[21:22], off
	global_load_d16_hi_b16 v10, v[13:14], off
	global_load_d16_hi_b16 v11, v[19:20], off
	global_load_d16_b16 v12, v[23:24], off
	v_mad_u64_u32 v[13:14], null, s6, 7, v[0:1]
	s_branch .LBB29_24
.LBB29_23:
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12
                                        ; implicit-def: $sgpr1
.LBB29_24:                              ; %Flow128
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB29_40
; %bb.25:                               ; %.preheader.i98.i.i
	s_add_i32 s1, s7, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB29_27
; %bb.26:
	s_waitcnt vmcnt(3)
	v_subrev_nc_u32_e32 v9, s17, v0
	s_waitcnt vmcnt(1)
	v_add_co_u32 v11, s8, s2, v18
	v_mov_b32_e32 v10, 0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e64 v12, null, s3, 0, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 1, v[9:10]
	v_add_co_u32 v9, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v9, v9, v11 :: v_dual_cndmask_b32 v10, v10, v12
	global_load_d16_b16 v9, v[9:10], off
.LBB29_27:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v13, s6, v0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v13
	s_cbranch_execz .LBB29_29
; %bb.28:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s2, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s4, v13
	v_add_co_ci_u32_e64 v14, s0, s5, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_hi_b16 v9, v[13:14], off
.LBB29_29:
	s_or_b32 exec_lo, exec_lo, s8
	v_lshl_add_u32 v13, s6, 1, v0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v13
	s_cbranch_execz .LBB29_31
; %bb.30:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s2, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s4, v13
	v_add_co_ci_u32_e64 v14, s0, s5, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_b16 v10, v[13:14], off
.LBB29_31:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[13:14], null, s6, 3, v[0:1]
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v13
	s_cbranch_execz .LBB29_33
; %bb.32:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s2, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s4, v13
	v_add_co_ci_u32_e64 v14, s0, s5, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_hi_b16 v10, v[13:14], off
.LBB29_33:
	s_or_b32 exec_lo, exec_lo, s8
	v_lshl_add_u32 v13, s6, 2, v0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v13
	s_cbranch_execz .LBB29_35
; %bb.34:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s2, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s4, v13
	v_add_co_ci_u32_e64 v14, s0, s5, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_b16 v11, v[13:14], off
.LBB29_35:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[13:14], null, s6, 5, v[0:1]
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v13
	s_cbranch_execz .LBB29_37
; %bb.36:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s2, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s4, v13
	v_add_co_ci_u32_e64 v14, s0, s5, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_hi_b16 v11, v[13:14], off
.LBB29_37:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[13:14], null, s6, 6, v[0:1]
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v13
	s_cbranch_execz .LBB29_39
; %bb.38:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s2, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s4, v13
	v_add_co_ci_u32_e64 v14, s0, s5, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_b16 v12, v[13:14], off
.LBB29_39:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[13:14], null, s6, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s1, v13
.LBB29_40:                              ; %Flow129
	v_mov_b32_e32 v14, s1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB29_42
; %bb.41:                               ; %.loopexit.sink.split.i95.i.i
	v_mov_b32_e32 v20, 0
	v_subrev_nc_u32_e32 v19, s17, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v14, v20
	v_lshlrev_b64 v[19:20], 1, v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[21:22], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s4, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v20, vcc_lo
	v_add_co_u32 v19, vcc_lo, s2, v21
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v20, vcc_lo, s3, v22, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_dual_cndmask_b32 v13, v16, v19 :: v_dual_cndmask_b32 v14, v14, v20
	global_load_d16_hi_b16 v12, v[13:14], off
	v_mov_b32_e32 v14, s1
.LBB29_42:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EtN6thrust10device_ptrItEEEEvRAT__T0_T1_S8_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b32_e32 v13, 3, v0
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_min_u32_e32 v16, v14, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e64 v22, v16, s7 clamp
	v_min_u32_e32 v19, s17, v16
	v_cmpx_lt_u32_e64 v22, v19
	s_cbranch_execz .LBB29_46
; %bb.43:                               ; %.lr.ph.i.preheader.i.i
	v_lshlrev_b32_e32 v20, 2, v16
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v20, s17, 2, v20
.LBB29_44:                              ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v21, v19, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v21, 1, v21
	v_not_b32_e32 v23, v21
	v_lshlrev_b32_e32 v24, 2, v21
	v_add_nc_u32_e32 v25, 1, v21
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v23, v23, 2, v20
	ds_load_b32 v24, v24
	ds_load_b32 v23, v23
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v24, v23
	v_dual_cndmask_b32 v19, v19, v21 :: v_dual_cndmask_b32 v22, v25, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v22, v19
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB29_44
; %bb.45:                               ; %Flow126
	s_or_b32 exec_lo, exec_lo, s1
.LBB29_46:                              ; %Flow127
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s0
	v_sub_nc_u32_e32 v16, v16, v22
	v_cmp_ge_u32_e32 vcc_lo, s17, v22
                                        ; implicit-def: $vgpr26
                                        ; implicit-def: $vgpr25
                                        ; implicit-def: $vgpr24
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $vgpr23
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr19
	v_add_nc_u32_e32 v27, s17, v16
                                        ; implicit-def: $vgpr16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s0, v27, v14
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s8, s0
	s_cbranch_execz .LBB29_52
; %bb.47:                               ; %._crit_edge.i.i.i.i
	v_cmp_gt_u32_e32 vcc_lo, s17, v22
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB29_49
; %bb.48:
	v_lshlrev_b32_e32 v1, 2, v22
	ds_load_b32 v1, v1
.LBB29_49:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_ge_u32_e64 s0, v27, v14
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_lt_u32_e64 v27, v14
	s_cbranch_execz .LBB29_51
; %bb.50:
	v_lshlrev_b32_e32 v2, 2, v27
	ds_load_b32 v2, v2
.LBB29_51:                              ; %.loopexit.loopexit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	v_cmp_le_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_or_b32 vcc_lo, s0, s1
	v_cndmask_b32_e32 v19, v27, v22, vcc_lo
	v_cndmask_b32_e64 v3, v14, s17, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, 1, v19
	v_add_nc_u32_e32 v3, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v3, v4, v3
	v_lshlrev_b32_e32 v3, 2, v3
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_dual_cndmask_b32 v6, v3, v2 :: v_dual_cndmask_b32 v3, v1, v3
	v_cndmask_b32_e32 v1, v2, v1, vcc_lo
	v_dual_cndmask_b32 v5, v22, v4 :: v_dual_cndmask_b32 v4, v4, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s1, v3, v6
	v_cmp_gt_u32_e64 s0, s17, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_u32_e64 s2, v4, v14
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v16, v4, v5, s0
	v_cndmask_b32_e64 v7, v14, s17, s0
	v_cndmask_b32_e64 v2, v6, v3, s0
	v_add_nc_u32_e32 v8, 1, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, -1, v7
	v_cndmask_b32_e64 v5, v5, v8, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v7, v8, v7
	v_cndmask_b32_e64 v4, v8, v4, s0
	v_cmp_gt_u32_e64 s1, s17, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v7, 2, v7
	v_cmp_ge_u32_e64 s3, v4, v14
	ds_load_b32 v7, v7
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v22, v7, v6, s0
	v_cndmask_b32_e64 v7, v3, v7, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s2, v7, v22
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s3, s1
	v_cndmask_b32_e64 v20, v4, v5, s1
	v_cndmask_b32_e64 v8, v14, s17, s1
	v_cndmask_b32_e64 v3, v22, v7, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v21, 1, v20
	v_add_nc_u32_e32 v8, -1, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v5, v21, s1
	v_min_u32_e32 v8, v21, v8
	v_cndmask_b32_e64 v4, v21, v4, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s2, s17, v5
	v_lshlrev_b32_e32 v8, 2, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_ge_u32_e64 s4, v4, v14
	ds_load_b32 v8, v8
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v26, v8, v22, s1
	v_cndmask_b32_e64 v8, v7, v8, s1
	v_cmp_le_u32_e64 s3, v8, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_or_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v23, v4, v5, s2
	v_cndmask_b32_e64 v21, v14, s17, s2
	v_add_nc_u32_e32 v24, 1, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v21, -1, v21
	v_cndmask_b32_e64 v5, v5, v24, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v21, v24, v21
	v_cndmask_b32_e64 v4, v24, v4, s2
	v_cmp_gt_u32_e64 s3, s17, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v21, 2, v21
	v_cmp_ge_u32_e64 s5, v4, v14
	ds_load_b32 v21, v21
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v27, v21, v26, s2
	v_cndmask_b32_e64 v28, v8, v21, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s4, v28, v27
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s5, s3
	v_cndmask_b32_e64 v21, v4, v5, s3
	v_cndmask_b32_e64 v24, v14, s17, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v25, 1, v21
	v_add_nc_u32_e32 v24, -1, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v5, v25, s3
	v_min_u32_e32 v24, v25, v24
	v_cndmask_b32_e64 v4, v25, v4, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s4, s17, v5
	v_lshlrev_b32_e32 v24, 2, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_ge_u32_e64 s6, v4, v14
	ds_load_b32 v24, v24
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v29, v24, v27, s3
	v_cndmask_b32_e64 v30, v28, v24, s3
	v_cmp_le_u32_e64 s5, v30, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, s5
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v24, v4, v5, s4
	v_cndmask_b32_e64 v25, v14, s17, s4
	v_cndmask_b32_e64 v6, v29, v30, s4
	v_add_nc_u32_e32 v31, 1, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v25, -1, v25
	v_cndmask_b32_e64 v5, v5, v31, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v25, v31, v25
	v_cndmask_b32_e64 v4, v31, v4, s4
	v_cmp_gt_u32_e64 s5, s17, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v25, 2, v25
	v_cmp_ge_u32_e64 s7, v4, v14
	ds_load_b32 v25, v25
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v32, v25, v29, s4
	v_cndmask_b32_e64 v33, v30, v25, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s6, v33, v32
	s_and_b32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s7, s5
	v_cndmask_b32_e64 v25, v4, v5, s5
	v_cndmask_b32_e64 v31, v14, s17, s5
	v_cndmask_b32_e64 v7, v32, v33, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v34, 1, v25
	v_add_nc_u32_e32 v31, -1, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v35, v5, v34, s5
	v_min_u32_e32 v31, v34, v31
	v_cndmask_b32_e64 v34, v34, v4, s5
	v_cndmask_b32_e64 v4, v26, v8, s2
	v_cndmask_b32_e64 v5, v27, v28, s3
	v_cmp_gt_u32_e32 vcc_lo, s17, v35
	v_lshlrev_b32_e32 v31, 2, v31
	v_cmp_ge_u32_e64 s1, v34, v14
	ds_load_b32 v31, v31
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v36, v31, v32, s5
	v_cndmask_b32_e64 v31, v33, v31, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s0, v31, v36
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 vcc_lo, s1, s0
	v_cndmask_b32_e32 v8, v36, v31, vcc_lo
	v_cndmask_b32_e32 v26, v34, v35, vcc_lo
.LBB29_52:                              ; %Flow124
	s_or_b32 exec_lo, exec_lo, s8
	s_barrier
	buffer_gl0_inv
	ds_store_b16 v18, v9
	ds_store_b16_d16_hi v18, v9 offset:256
	ds_store_b16 v18, v10 offset:512
	ds_store_b16_d16_hi v18, v10 offset:768
	ds_store_b16 v18, v11 offset:1024
	ds_store_b16_d16_hi v18, v11 offset:1280
	ds_store_b16 v18, v12 offset:1536
	ds_store_b16_d16_hi v18, v12 offset:1792
	v_lshlrev_b32_e32 v9, 1, v19
	v_lshlrev_b32_e32 v10, 1, v20
	v_lshlrev_b32_e32 v11, 1, v21
	v_lshlrev_b32_e32 v12, 1, v25
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v21, v9
	ds_load_u16 v20, v10
	ds_load_u16 v19, v11
	ds_load_u16 v22, v12
	v_lshlrev_b32_e32 v9, 1, v16
	v_lshlrev_b32_e32 v10, 1, v23
	v_lshlrev_b32_e32 v11, 1, v24
	v_lshlrev_b32_e32 v12, 1, v26
	v_cmp_ne_u32_e32 vcc_lo, 1, v15
	s_mov_b32 s17, 0
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v21, v9
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v20, v10
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v19, v11
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v22, v12
	v_lshrrev_b32_e32 v9, 2, v0
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v23, v9, v13
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b32_e32 v24, 2, v23
	s_cbranch_vccnz .LBB29_62
; %bb.53:                               ; %.preheader170.i.i.preheader
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v9, v24
	s_mov_b64 s[0:1], 0
.LBB29_54:                              ; %.preheader170.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v10, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v9, v10
	v_add_nc_u32_e32 v9, 4, v9
	s_cbranch_scc0 .LBB29_54
; %bb.55:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v25, v0, v9
	v_dual_mov_b32 v16, v8 :: v_dual_mov_b32 v13, v5
	v_mov_b32_e32 v14, v6
	v_dual_mov_b32 v12, v4 :: v_dual_mov_b32 v11, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mov_b32 v15, v7 :: v_dual_lshlrev_b32 v26, 2, v25
	v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v9, v1
.LBB29_56:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v27, v26
	v_add_nc_u32_e32 v26, 0x210, v26
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v9, v27
	s_cbranch_scc1 .LBB29_56
; %bb.57:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPjEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_lshl_b64 s[0:1], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	s_clause 0x7
	global_store_b32 v17, v9, s[0:1]
	global_store_b32 v17, v10, s[0:1] offset:512
	global_store_b32 v17, v11, s[0:1] offset:1024
	global_store_b32 v17, v12, s[0:1] offset:1536
	global_store_b32 v17, v13, s[0:1] offset:2048
	global_store_b32 v17, v14, s[0:1] offset:2560
	global_store_b32 v17, v15, s[0:1] offset:3072
	global_store_b32 v17, v16, s[0:1] offset:3584
	v_lshlrev_b32_e32 v9, 1, v23
	v_lshrrev_b32_e32 v10, 16, v21
	v_lshrrev_b32_e32 v11, 16, v20
	v_lshrrev_b32_e32 v12, 16, v19
	v_lshrrev_b32_e32 v13, 16, v22
	s_mov_b64 s[0:1], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB29_58:                              ; =>This Inner Loop Header: Depth=1
	s_cmp_eq_u32 s0, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 2
	v_cndmask_b32_e32 v14, v21, v10, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v14, v20, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 4
	v_cndmask_b32_e32 v14, v14, v11, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v14, v19, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 6
	v_cndmask_b32_e32 v14, v14, v12, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 7
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v14, v22, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	v_cndmask_b32_e32 v14, v14, v13, vcc_lo
	ds_store_b16 v9, v14
	v_add_nc_u32_e32 v9, 2, v9
	s_cbranch_scc0 .LBB29_58
; %bb.59:
	v_dual_mov_b32 v10, v20 :: v_dual_lshlrev_b32 v13, 1, v25
	v_dual_mov_b32 v11, v21 :: v_dual_mov_b32 v12, v22
	v_mov_b32_e32 v9, v19
	s_mov_b64 s[8:9], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB29_60:                              ; =>This Inner Loop Header: Depth=1
	ds_load_u16 v14, v13
	s_cmp_eq_u32 s8, 7
	v_lshrrev_b32_e32 v15, 16, v12
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s8, 5
	v_lshrrev_b32_e32 v16, 16, v9
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s8, 3
	v_lshrrev_b32_e32 v25, 16, v10
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s8, 1
	v_lshrrev_b32_e32 v26, 16, v11
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s8, 6
	v_add_nc_u32_e32 v13, 0x108, v13
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s8, 4
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 2
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v15, v15, v14, vcc_lo
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s8, 0
	v_cndmask_b32_e64 v16, v16, v14, s0
	s_cselect_b32 s6, -1, 0
	v_cndmask_b32_e64 v25, v25, v14, s1
	v_cndmask_b32_e64 v26, v26, v14, s2
	v_cndmask_b32_e64 v11, v11, v14, s6
	v_cndmask_b32_e64 v10, v10, v14, s5
	v_cndmask_b32_e64 v9, v9, v14, s4
	v_cndmask_b32_e64 v12, v12, v14, s3
	s_add_u32 s8, s8, 1
	v_perm_b32 v11, v26, v11, 0x5040100
	v_perm_b32 v10, v25, v10, 0x5040100
	v_perm_b32 v9, v16, v9, 0x5040100
	v_perm_b32 v12, v15, v12, 0x5040100
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s8, 8
	s_cbranch_scc1 .LBB29_60
; %bb.61:                               ; %_ZN7rocprim11block_storeItLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPtEEvT_RA8_tRNS_14block_exchangeItLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_lshl_b64 s[2:3], s[16:17], 1
	s_mov_b32 s0, 0
	s_add_u32 s2, s14, s2
	s_addc_u32 s3, s15, s3
	s_mov_b32 s20, -1
	s_clause 0x6
	global_store_b16 v18, v11, s[2:3]
	global_store_d16_hi_b16 v18, v11, s[2:3] offset:256
	global_store_b16 v18, v10, s[2:3] offset:512
	global_store_d16_hi_b16 v18, v10, s[2:3] offset:768
	global_store_b16 v18, v9, s[2:3] offset:1024
	global_store_d16_hi_b16 v18, v9, s[2:3] offset:1280
	global_store_b16 v18, v12, s[2:3] offset:1536
	s_branch .LBB29_63
.LBB29_62:
	s_mov_b32 s0, -1
	s_mov_b32 s20, s17
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12
.LBB29_63:                              ; %Flow
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB29_103
; %bb.64:                               ; %.preheader.i.i.preheader
	v_mov_b32_e32 v9, v24
	s_mov_b64 s[0:1], 0
.LBB29_65:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v10, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v9, v10
	v_add_nc_u32_e32 v9, 4, v9
	s_cbranch_scc0 .LBB29_65
; %bb.66:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v11, v0, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v9, 2, v11
.LBB29_67:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v10, v9
	v_add_nc_u32_e32 v9, 0x210, v9
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v1, v10
	s_cbranch_scc1 .LBB29_67
; %bb.68:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[0:1], s[16:17], 2
	s_sub_i32 s6, s18, s16
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	v_add_co_u32 v9, s0, s0, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, null, s1, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s6, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB29_70
; %bb.69:
	global_store_b32 v[9:10], v1, off
.LBB29_70:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v1, 0x80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s6, v1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB29_72
; %bb.71:
	global_store_b32 v[9:10], v2, off offset:512
.LBB29_72:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v1, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s6, v1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB29_74
; %bb.73:
	global_store_b32 v[9:10], v3, off offset:1024
.LBB29_74:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v1, 0x180, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s6, v1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB29_76
; %bb.75:
	global_store_b32 v[9:10], v4, off offset:1536
.LBB29_76:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v1, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s6, v1
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB29_78
; %bb.77:
	global_store_b32 v[9:10], v5, off offset:2048
.LBB29_78:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v1, 0x280, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s6, v1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB29_80
; %bb.79:
	global_store_b32 v[9:10], v6, off offset:2560
.LBB29_80:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v1, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s6, v1
	s_and_saveexec_b32 s7, s5
	s_cbranch_execz .LBB29_82
; %bb.81:
	global_store_b32 v[9:10], v7, off offset:3072
.LBB29_82:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v0, 0x380, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s20, s6, v0
	s_and_saveexec_b32 s6, s20
	s_cbranch_execz .LBB29_84
; %bb.83:
	global_store_b32 v[9:10], v8, off offset:3584
.LBB29_84:                              ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPjEEvT_RA8_jjRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b32_e32 v3, 1, v23
	v_lshrrev_b32_e32 v0, 16, v21
	v_lshrrev_b32_e32 v1, 16, v20
	v_lshrrev_b32_e32 v2, 16, v19
	v_lshrrev_b32_e32 v4, 16, v22
	v_sub_nc_u32_e32 v3, v24, v3
	s_mov_b64 s[8:9], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB29_85:                              ; =>This Inner Loop Header: Depth=1
	s_cmp_eq_u32 s8, 1
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 2
	v_cndmask_b32_e64 v5, v21, v0, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v20, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 4
	v_cndmask_b32_e64 v5, v5, v1, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v19, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 6
	v_cndmask_b32_e64 v5, v5, v2, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 7
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v22, s6
	s_cselect_b32 s6, -1, 0
	s_add_u32 s8, s8, 1
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s8, 8
	v_cndmask_b32_e64 v5, v5, v4, s6
	ds_store_b16 v3, v5
	v_add_nc_u32_e32 v3, 2, v3
	s_cbranch_scc0 .LBB29_85
; %bb.86:
	v_lshlrev_b32_e32 v0, 1, v11
	v_mov_b32_e32 v12, v22
	s_mov_b64 s[18:19], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB29_87:                              ; =>This Inner Loop Header: Depth=1
	ds_load_u16 v1, v0
	s_cmp_eq_u32 s18, 7
	v_lshrrev_b32_e32 v2, 16, v12
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s18, 5
	v_lshrrev_b32_e32 v3, 16, v19
	s_cselect_b32 s7, -1, 0
	s_cmp_eq_u32 s18, 3
	v_lshrrev_b32_e32 v4, 16, v20
	s_cselect_b32 s8, -1, 0
	s_cmp_eq_u32 s18, 1
	v_lshrrev_b32_e32 v5, 16, v21
	s_cselect_b32 s9, -1, 0
	s_cmp_eq_u32 s18, 6
	v_add_nc_u32_e32 v0, 0x108, v0
	s_cselect_b32 s10, -1, 0
	s_cmp_eq_u32 s18, 4
	s_cselect_b32 s11, -1, 0
	s_cmp_eq_u32 s18, 2
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v2, v2, v1, s6
	s_cselect_b32 s12, -1, 0
	s_cmp_eq_u32 s18, 0
	v_cndmask_b32_e64 v3, v3, v1, s7
	s_cselect_b32 s13, -1, 0
	v_cndmask_b32_e64 v4, v4, v1, s8
	v_cndmask_b32_e64 v5, v5, v1, s9
	v_cndmask_b32_e64 v6, v21, v1, s13
	v_cndmask_b32_e64 v7, v20, v1, s12
	v_cndmask_b32_e64 v8, v19, v1, s11
	v_cndmask_b32_e64 v1, v12, v1, s10
	s_add_u32 s18, s18, 1
	v_perm_b32 v21, v5, v6, 0x5040100
	v_perm_b32 v20, v4, v7, 0x5040100
	v_perm_b32 v19, v3, v8, 0x5040100
	v_perm_b32 v12, v2, v1, 0x5040100
	s_addc_u32 s19, s19, 0
	s_cmp_lg_u32 s18, 8
	s_cbranch_scc1 .LBB29_87
; %bb.88:                               ; %_ZN7rocprim14block_exchangeItLj128ELj8ELj1ELj1EE18blocked_to_stripedItEEvRA8_KtRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[6:7], s[16:17], 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_u32 s6, s14, s6
	s_addc_u32 s7, s15, s7
	v_add_co_u32 v0, s6, s6, v18
	v_add_co_ci_u32_e64 v1, null, s7, 0, s6
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB29_90
; %bb.89:
	global_store_b16 v[0:1], v21, off
.LBB29_90:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB29_92
; %bb.91:
	global_store_d16_hi_b16 v[0:1], v21, off offset:256
.LBB29_92:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB29_94
; %bb.93:
	global_store_b16 v[0:1], v20, off offset:512
.LBB29_94:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB29_96
; %bb.95:
	global_store_d16_hi_b16 v[0:1], v20, off offset:768
.LBB29_96:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB29_98
; %bb.97:
	global_store_b16 v[0:1], v19, off offset:1024
.LBB29_98:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB29_100
; %bb.99:
	global_store_d16_hi_b16 v[0:1], v19, off offset:1280
.LBB29_100:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB29_102
; %bb.101:
	global_store_b16 v[0:1], v12, off offset:1536
.LBB29_102:
	s_or_b32 exec_lo, exec_lo, s0
.LBB29_103:                             ; %Flow122
	s_and_saveexec_b32 s0, s20
	s_cbranch_execz .LBB29_105
; %bb.104:                              ; %_ZN7rocprim6detail16block_store_implILb1ELj128ELj8EjtE5storeIPjPtjEEvT1_jbT_T0_RA8_jRA8_tRNS2_12storage_typeE.exit.sink.split.i.i
	s_lshl_b64 s[0:1], s[16:17], 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s14, s0
	s_addc_u32 s1, s15, s1
	global_store_d16_hi_b16 v18, v12, s[0:1] offset:1792
.LBB29_105:                             ; %_ZN7rocprim6detail28block_merge_mergepath_kernelILj128ELj8EN6thrust10device_ptrIjEEPjNS3_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_PKSF_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 37
		.amdhsa_next_free_sgpr 27
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
.Lfunc_end29:
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end29-_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 7096
; NumSgprs: 29
; NumVgprs: 37
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 29
; NumVGPRsForWavesPerEU: 37
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.protected	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ ; -- Begin function _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.globl	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	8
	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: ; @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x20
	s_lshl_b32 s12, s15, 7
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s4, s2, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s4, v0
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB30_28
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_lshr_b32 s0, s2, 7
	s_mov_b32 s13, 0
	s_cmp_lg_u32 s15, s0
	v_lshlrev_b32_e32 v1, 1, v0
	s_cselect_b32 s1, -1, 0
	s_lshl_b64 s[16:17], s[12:13], 2
	v_lshlrev_b32_e32 v2, 2, v0
	v_add_nc_u32_e32 v0, s12, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s4, s16
	s_addc_u32 s17, s5, s17
	s_lshl_b64 s[18:19], s[12:13], 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s8, s8, s18
	s_addc_u32 s9, s9, s19
	global_load_u16 v3, v1, s[8:9]
	global_load_b32 v4, v2, s[16:17]
	s_lshr_b32 s0, s3, 7
	s_sub_i32 s9, 0, s3
	s_sub_i32 s8, 0, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, s15, s8
	s_and_b32 s0, s8, s0
	s_lshl_b32 s8, s8, 7
	s_cmp_eq_u32 s0, 0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s14, s0, exec_lo
	s_cselect_b32 s14, s3, s9
	s_add_i32 s14, s14, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s14, s2
	s_cbranch_scc1 .LBB30_4
; %bb.2:
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB30_5
; %bb.3:                                ; %.critedge70.i
	v_mov_b32_e32 v1, 0
	s_mov_b32 s9, 0
	s_mov_b32 s13, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
	s_branch .LBB30_6
.LBB30_4:
	s_mov_b32 s9, -1
                                        ; implicit-def: $vgpr1_vgpr2
	s_branch .LBB30_11
.LBB30_5:
	s_mov_b32 s9, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB30_6:                               ; %Flow33
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_cbranch_vccnz .LBB30_10
; %bb.7:
	s_mov_b32 s9, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB30_9
; %bb.8:
	v_mov_b32_e32 v1, 0
	s_or_b32 s13, s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB30_9:                               ; %Flow35
	s_or_b32 exec_lo, exec_lo, s9
.LBB30_10:                              ; %Flow34
	s_mov_b32 s9, 0
.LBB30_11:                              ; %Flow32
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s9
	s_cbranch_vccz .LBB30_26
; %bb.12:
	s_min_u32 s9, s14, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s3, s9, s3
	s_min_u32 s12, s8, s9
	s_add_i32 s8, s8, s9
	s_min_u32 s2, s3, s2
	s_cmp_gt_u32 s3, s14
	v_subrev_nc_u32_e32 v0, s8, v0
	s_cselect_b32 s3, -1, 0
	s_and_b32 vcc_lo, exec_lo, s1
	v_cndmask_b32_e64 v1, 0, 1, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, s12, v0
	v_cmp_ne_u32_e64 s1, 1, v1
	s_cbranch_vccz .LBB30_18
; %bb.13:                               ; %.critedge74.i
	v_mov_b32_e32 v2, s9
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB30_17
; %bb.14:                               ; %.lr.ph.i83.i.preheader
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, s9
	s_mov_b32 s1, 0
.LBB30_15:                              ; %.lr.ph.i83.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v6
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v4, v7
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v7, v4
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v8, s0
	v_add_nc_u32_e32 v8, 1, v0
	v_and_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 1, v7
	v_cndmask_b32_e32 v6, v0, v6, vcc_lo
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v6
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB30_15
; %bb.16:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
.LBB30_17:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjNS3_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit89.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	s_mov_b32 s1, 0
	v_lshlrev_b64 v[6:7], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v4, off
	s_branch .LBB30_19
.LBB30_18:
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB30_19:                              ; %Flow30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB30_25
; %bb.20:
	v_mov_b32_e32 v2, s9
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB30_24
; %bb.21:                               ; %.lr.ph.i.i.preheader
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, s9
	s_mov_b32 s1, 0
.LBB30_22:                              ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v6
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v4, v7
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v7, v4
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v8, s0
	v_add_nc_u32_e32 v8, 1, v0
	v_and_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 1, v7
	v_cndmask_b32_e32 v6, v0, v6, vcc_lo
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v6
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB30_22
; %bb.23:                               ; %Flow28
	s_or_b32 exec_lo, exec_lo, s1
.LBB30_24:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjNS3_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB30_25:                              ; %Flow31
	s_mov_b32 s13, -1
.LBB30_26:                              ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s13
	s_cbranch_execz .LBB30_28
; %bb.27:                               ; %.critedge.sink.split.i
	s_waitcnt vmcnt(1)
	global_store_b16 v[1:2], v3, off
.LBB30_28:                              ; %_ZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjNS3_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
.Lfunc_end30:
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end30-_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1012
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_,comdat
	.protected	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_ ; -- Begin function _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_
	.globl	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_
	.p2align	8
	.type	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_,@function
_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_: ; @_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[16:17], s[0:1], 0x10
	s_mov_b32 s19, 0
	s_lshl_b32 s18, s15, 12
	v_lshlrev_b32_e32 v11, 1, v0
	s_lshl_b64 s[20:21], s[18:19], 1
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_add_u32 s0, s4, s20
	s_addc_u32 s1, s5, s21
	v_add_co_u32 v9, s0, s0, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, null, s1, 0, s0
	s_cmp_lg_u32 s15, s2
	s_mov_b32 s0, -1
	s_cbranch_scc0 .LBB31_2
; %bb.1:
	v_add_co_u32 v1, vcc_lo, 0x1000, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v10, vcc_lo
	s_clause 0xf
	global_load_u16 v4, v[9:10], off
	global_load_u16 v5, v[9:10], off offset:512
	global_load_u16 v6, v[9:10], off offset:1024
	global_load_u16 v7, v[9:10], off offset:1536
	global_load_u16 v8, v[9:10], off offset:2048
	global_load_u16 v12, v[9:10], off offset:2560
	global_load_u16 v13, v[9:10], off offset:3072
	global_load_u16 v14, v[9:10], off offset:3584
	global_load_u16 v15, v[1:2], off
	global_load_u16 v16, v[1:2], off offset:512
	global_load_u16 v17, v[1:2], off offset:1024
	global_load_u16 v18, v[1:2], off offset:1536
	global_load_u16 v19, v[1:2], off offset:2048
	global_load_u16 v20, v[1:2], off offset:2560
	global_load_u16 v21, v[1:2], off offset:3072
	global_load_u16 v1, v[1:2], off offset:3584
	s_add_u32 s2, s16, s20
	s_addc_u32 s3, s17, s21
	v_add_co_u32 v2, s1, s2, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v3, null, s3, 0, s1
	s_mov_b32 s0, 0
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	s_mov_b32 s19, -1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(15)
	global_store_b16 v11, v4, s[2:3]
	s_waitcnt vmcnt(14)
	global_store_b16 v11, v5, s[2:3] offset:512
	s_waitcnt vmcnt(13)
	global_store_b16 v11, v6, s[2:3] offset:1024
	s_waitcnt vmcnt(12)
	global_store_b16 v11, v7, s[2:3] offset:1536
	s_waitcnt vmcnt(11)
	global_store_b16 v11, v8, s[2:3] offset:2048
	s_waitcnt vmcnt(10)
	global_store_b16 v11, v12, s[2:3] offset:2560
	s_waitcnt vmcnt(9)
	global_store_b16 v11, v13, s[2:3] offset:3072
	s_waitcnt vmcnt(8)
	global_store_b16 v11, v14, s[2:3] offset:3584
	s_waitcnt vmcnt(7)
	global_store_b16 v[2:3], v15, off
	s_waitcnt vmcnt(6)
	global_store_b16 v[2:3], v16, off offset:512
	s_waitcnt vmcnt(5)
	global_store_b16 v[2:3], v17, off offset:1024
	s_waitcnt vmcnt(4)
	global_store_b16 v[2:3], v18, off offset:1536
	s_waitcnt vmcnt(3)
	global_store_b16 v[2:3], v19, off offset:2048
	s_waitcnt vmcnt(2)
	global_store_b16 v[2:3], v20, off offset:2560
	s_waitcnt vmcnt(1)
	global_store_b16 v[2:3], v21, off offset:3072
	s_branch .LBB31_3
.LBB31_2:
                                        ; implicit-def: $vgpr1
.LBB31_3:                               ; %Flow
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB31_69
; %bb.4:
	s_sub_i32 s15, s6, s18
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s15, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB31_6
; %bb.5:
	global_load_d16_b16 v1, v[9:10], off
.LBB31_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v12, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s15, v12
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB31_8
; %bb.7:
	global_load_d16_hi_b16 v1, v[9:10], off offset:512
.LBB31_8:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v12, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s15, v12
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB31_10
; %bb.9:
	global_load_d16_b16 v2, v[9:10], off offset:1024
.LBB31_10:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v12, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s15, v12
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB31_12
; %bb.11:
	global_load_d16_hi_b16 v2, v[9:10], off offset:1536
.LBB31_12:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v12, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s15, v12
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB31_14
; %bb.13:
	global_load_d16_b16 v3, v[9:10], off offset:2048
.LBB31_14:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v12, 0x500, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s15, v12
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB31_16
; %bb.15:
	global_load_d16_hi_b16 v3, v[9:10], off offset:2560
.LBB31_16:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v12, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s15, v12
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB31_18
; %bb.17:
	global_load_d16_b16 v4, v[9:10], off offset:3072
.LBB31_18:
	s_or_b32 exec_lo, exec_lo, s6
	v_or_b32_e32 v12, 0x700, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s15, v12
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB31_20
; %bb.19:
	global_load_d16_hi_b16 v4, v[9:10], off offset:3584
.LBB31_20:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v12, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s15, v12
	s_and_saveexec_b32 s9, s7
	s_cbranch_execz .LBB31_22
; %bb.21:
	v_add_co_u32 v12, s8, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s8, 0, v10, s8
	global_load_d16_b16 v5, v[12:13], off
.LBB31_22:
	s_or_b32 exec_lo, exec_lo, s9
	v_or_b32_e32 v12, 0x900, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s15, v12
	s_and_saveexec_b32 s10, s8
	s_cbranch_execz .LBB31_24
; %bb.23:
	v_add_co_u32 v12, s9, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s9, 0, v10, s9
	global_load_d16_hi_b16 v5, v[12:13], off offset:512
.LBB31_24:
	s_or_b32 exec_lo, exec_lo, s10
	v_or_b32_e32 v12, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s15, v12
	s_and_saveexec_b32 s11, s9
	s_cbranch_execz .LBB31_26
; %bb.25:
	v_add_co_u32 v12, s10, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s10, 0, v10, s10
	global_load_d16_b16 v6, v[12:13], off offset:1024
.LBB31_26:
	s_or_b32 exec_lo, exec_lo, s11
	v_or_b32_e32 v12, 0xb00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s15, v12
	s_and_saveexec_b32 s12, s10
	s_cbranch_execz .LBB31_28
; %bb.27:
	v_add_co_u32 v12, s11, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s11, 0, v10, s11
	global_load_d16_hi_b16 v6, v[12:13], off offset:1536
.LBB31_28:
	s_or_b32 exec_lo, exec_lo, s12
	v_or_b32_e32 v12, 0xc00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s11, s15, v12
	s_and_saveexec_b32 s13, s11
	s_cbranch_execz .LBB31_30
; %bb.29:
	v_add_co_u32 v12, s12, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s12, 0, v10, s12
	global_load_d16_b16 v7, v[12:13], off offset:2048
.LBB31_30:
	s_or_b32 exec_lo, exec_lo, s13
	v_or_b32_e32 v12, 0xd00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s15, v12
	s_and_saveexec_b32 s14, s12
	s_cbranch_execz .LBB31_32
; %bb.31:
	v_add_co_u32 v12, s13, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s13, 0, v10, s13
	global_load_d16_hi_b16 v7, v[12:13], off offset:2560
.LBB31_32:
	s_or_b32 exec_lo, exec_lo, s14
	v_or_b32_e32 v12, 0xe00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s13, s15, v12
	s_and_saveexec_b32 s18, s13
	s_cbranch_execz .LBB31_34
; %bb.33:
	v_add_co_u32 v12, s14, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s14, 0, v10, s14
	global_load_d16_b16 v8, v[12:13], off offset:3072
.LBB31_34:
	s_or_b32 exec_lo, exec_lo, s18
	v_or_b32_e32 v0, 0xf00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s14, s15, v0
	s_and_saveexec_b32 s18, s14
	s_cbranch_execz .LBB31_36
; %bb.35:
	v_add_co_u32 v9, s15, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s15, 0, v10, s15
	global_load_d16_hi_b16 v8, v[9:10], off offset:3584
.LBB31_36:                              ; %_ZN7rocprim25block_load_direct_stripedILj256EPttLj16EEEvjT0_RAT2__T1_j.exit.i
	s_or_b32 exec_lo, exec_lo, s18
	s_add_u32 s15, s16, s20
	s_addc_u32 s18, s17, s21
	v_add_co_u32 v9, s15, s15, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, null, s18, 0, s15
	s_and_saveexec_b32 s15, vcc_lo
	s_cbranch_execz .LBB31_38
; %bb.37:
	s_waitcnt vmcnt(0)
	global_store_b16 v[9:10], v1, off
.LBB31_38:
	s_or_b32 exec_lo, exec_lo, s15
	s_and_saveexec_b32 s15, s0
	s_cbranch_execz .LBB31_40
; %bb.39:
	s_waitcnt vmcnt(0)
	global_store_d16_hi_b16 v[9:10], v1, off offset:512
.LBB31_40:
	s_or_b32 exec_lo, exec_lo, s15
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB31_42
; %bb.41:
	s_waitcnt vmcnt(0)
	global_store_b16 v[9:10], v2, off offset:1024
.LBB31_42:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	v_bfi_b32 v0, 0xffff, v2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v0, v0, v2, s2
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB31_44
; %bb.43:
	global_store_d16_hi_b16 v[9:10], v0, off offset:1536
.LBB31_44:
	s_or_b32 exec_lo, exec_lo, s0
	v_cndmask_b32_e64 v0, v3, v3, s3
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB31_46
; %bb.45:
	global_store_b16 v[9:10], v0, off offset:2048
.LBB31_46:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v0, 0xffff, v0, v3
	v_cndmask_b32_e64 v0, v0, v3, s4
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB31_48
; %bb.47:
	global_store_d16_hi_b16 v[9:10], v0, off offset:2560
.LBB31_48:
	s_or_b32 exec_lo, exec_lo, s0
	v_cndmask_b32_e64 v0, v4, v4, s5
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB31_50
; %bb.49:
	global_store_b16 v[9:10], v0, off offset:3072
.LBB31_50:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v0, 0xffff, v0, v4
	v_cndmask_b32_e64 v0, v0, v4, s6
	s_and_saveexec_b32 s0, s6
	s_cbranch_execz .LBB31_52
; %bb.51:
	global_store_d16_hi_b16 v[9:10], v0, off offset:3584
.LBB31_52:
	s_or_b32 exec_lo, exec_lo, s0
	v_cndmask_b32_e64 v0, v5, v5, s7
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB31_54
; %bb.53:
	v_add_co_u32 v1, vcc_lo, 0x1000, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v10, vcc_lo
	global_store_b16 v[1:2], v0, off
.LBB31_54:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v0, 0xffff, v0, v5
	v_cndmask_b32_e64 v0, v0, v5, s8
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB31_56
; %bb.55:
	v_add_co_u32 v1, vcc_lo, 0x1000, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v10, vcc_lo
	global_store_d16_hi_b16 v[1:2], v0, off offset:512
.LBB31_56:
	s_or_b32 exec_lo, exec_lo, s0
	v_cndmask_b32_e64 v0, v6, v6, s9
	s_and_saveexec_b32 s0, s9
	s_cbranch_execz .LBB31_58
; %bb.57:
	v_add_co_u32 v1, vcc_lo, 0x1000, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v10, vcc_lo
	global_store_b16 v[1:2], v0, off offset:1024
.LBB31_58:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v0, 0xffff, v0, v6
	v_cndmask_b32_e64 v0, v0, v6, s10
	s_and_saveexec_b32 s0, s10
	s_cbranch_execz .LBB31_60
; %bb.59:
	v_add_co_u32 v1, vcc_lo, 0x1000, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v10, vcc_lo
	global_store_d16_hi_b16 v[1:2], v0, off offset:1536
.LBB31_60:
	s_or_b32 exec_lo, exec_lo, s0
	v_cndmask_b32_e64 v0, v7, v7, s11
	s_and_saveexec_b32 s0, s11
	s_cbranch_execz .LBB31_62
; %bb.61:
	v_add_co_u32 v1, vcc_lo, 0x1000, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v10, vcc_lo
	global_store_b16 v[1:2], v0, off offset:2048
.LBB31_62:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v0, 0xffff, v0, v7
	v_cndmask_b32_e64 v0, v0, v7, s12
	s_and_saveexec_b32 s0, s12
	s_cbranch_execz .LBB31_64
; %bb.63:
	v_add_co_u32 v1, vcc_lo, 0x1000, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v10, vcc_lo
	global_store_d16_hi_b16 v[1:2], v0, off offset:2560
.LBB31_64:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s13
	s_cbranch_execz .LBB31_66
; %bb.65:
	v_add_co_u32 v0, vcc_lo, 0x1000, v9
	v_cndmask_b32_e64 v2, v8, v8, s13
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v10, vcc_lo
	global_store_b16 v[0:1], v2, off offset:3072
.LBB31_66:
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s0, s14
; %bb.67:
	v_cndmask_b32_e64 v0, v8, v8, s14
	s_or_b32 s19, s19, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b32_e32 v1, 16, v0
; %bb.68:                               ; %Flow13
	s_or_b32 exec_lo, exec_lo, s0
.LBB31_69:                              ; %Flow12
	s_and_saveexec_b32 s0, s19
	s_cbranch_execz .LBB31_71
; %bb.70:                               ; %_ZN7rocprim26block_store_direct_stripedILj256EN6thrust10device_ptrItEEtLj16EEEvjT0_RAT2__T1_j.exit.sink.split.i
	s_add_u32 s0, s16, s20
	s_addc_u32 s1, s17, s21
	v_add_co_u32 v0, s0, s0, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v3, null, s1, 0, s0
	v_add_co_u32 v2, vcc_lo, 0x1000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b16 v[2:3], v1, off offset:3584
.LBB31_71:                              ; %_ZN7rocprim6detail21transform_kernel_implILj256ELj16EtPtN6thrust10device_ptrItEENS_8identityItEEEEvT2_mT3_T4_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_,comdat
.Lfunc_end31:
	.size	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_, .Lfunc_end31-_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtPtN6thrust10device_ptrItEENS_8identityItEEEEvT1_mT2_T3_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2068
; NumSgprs: 24
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.protected	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_ ; -- Begin function _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.globl	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.p2align	8
	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@function
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_: ; @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
; %bb.0:
	s_load_b64 s[4:5], s[0:1], 0x8
	v_lshl_or_b32 v0, s15, 7, v0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s5, v0
	s_cbranch_execz .LBB32_6
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s3, 9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, s5, 0x7ffffe
	s_sub_i32 s6, 0, s5
	s_add_i32 s5, s5, -1
	v_and_b32_e32 v1, s6, v0
	v_and_b32_e32 v5, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 10, v1
	v_add_nc_u32_e32 v2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v4, s4, v2
	v_min_u32_e32 v2, s4, v1
	v_add_nc_u32_e32 v3, s3, v4
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, s4, v3
	v_lshlrev_b32_e32 v3, 10, v5
	v_sub_nc_u32_e32 v5, v1, v2
	v_sub_nc_u32_e32 v6, v1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, v5, v3
	v_sub_nc_u32_e32 v3, v4, v2
	v_sub_nc_u32_e64 v6, v1, v6 clamp
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v7, v1, v3
	v_cmpx_lt_u32_e64 v6, v7
	s_cbranch_execz .LBB32_5
; %bb.2:                                ; %.lr.ph.i.preheader
	s_load_b64 s[4:5], s[0:1], 0x0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v5
	v_lshlrev_b64 v[10:11], 2, v[4:5]
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v11, vcc_lo
	s_mov_b32 s4, 0
.LBB32_3:                               ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v4, v7, v6
	v_mov_b32_e32 v12, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 1, v4
	v_xad_u32 v11, v4, -1, v1
	v_lshlrev_b64 v[13:14], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v13, vcc_lo, v3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v8, v14, vcc_lo
	v_add_co_u32 v11, vcc_lo, v9, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, v10, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v12, s2, v13
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v11, s2, v11
	v_add_nc_u32_e32 v13, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, v12, v11
	v_dual_cndmask_b32 v7, v7, v4 :: v_dual_cndmask_b32 v6, v13, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v6, v7
	s_or_b32 s4, vcc_lo, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB32_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s4
.LBB32_5:                               ; %Flow58
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v6, v2
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB32_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
.Lfunc_end32:
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, .Lfunc_end32-_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 480
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.protected	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ ; -- Begin function _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.globl	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	8
	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: ; @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[16:19], s[0:1], 0x20
	s_load_b64 s[4:5], s[0:1], 0x30
	s_mov_b32 s3, 0
	s_mov_b32 s6, s15
	s_mov_b32 s7, s3
	s_mov_b32 s11, s3
	v_lshlrev_b32_e32 v17, 2, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s23, s16, 10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s15, s23
	s_cselect_b32 s19, -1, 0
	s_lshl_b64 s[8:9], s[6:7], 2
	s_add_u32 s8, s4, s8
	s_addc_u32 s9, s5, s9
	s_add_i32 s10, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[10:11], 2
	s_add_u32 s4, s4, s10
	s_addc_u32 s5, s5, s11
	s_clause 0x1
	s_load_b32 s2, s[8:9], 0x0
	s_load_b32 s7, s[4:5], 0x0
	s_load_b256 s[8:15], s[0:1], 0x0
	s_lshr_b32 s4, s17, 9
	s_load_b64 s[24:25], s[0:1], 0x44
	s_and_b32 s0, s4, 0x7ffffe
	s_lshl_b32 s20, s6, 10
	s_sub_i32 s1, 0, s0
	s_add_i32 s0, s0, -1
	s_and_b32 s1, s6, s1
	s_and_b32 s5, s0, s6
	s_lshl_b32 s4, s1, 11
	s_lshl_b32 s1, s1, 10
	s_add_i32 s4, s4, s17
	s_sub_i32 s21, s20, s1
	s_sub_i32 s1, s4, s1
	s_add_i32 s4, s4, s21
	s_min_u32 s21, s16, s1
	s_add_i32 s1, s1, s17
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s17, s4, s2
	s_sub_i32 s22, s4, s7
	s_min_u32 s4, s16, s17
	s_addk_i32 s22, 0x400
	s_cmp_eq_u32 s0, s5
	s_mov_b32 s5, s3
	s_cselect_b32 s17, s1, s22
	s_cselect_b32 s21, s21, s7
	s_lshl_b64 s[0:1], s[2:3], 2
	s_min_u32 s7, s17, s16
	s_sub_i32 s17, s21, s2
	s_add_u32 s21, s8, s0
	s_addc_u32 s22, s9, s1
	s_lshl_b64 s[26:27], s[4:5], 2
	s_mov_b32 s1, -1
	s_add_u32 s8, s8, s26
	s_addc_u32 s9, s9, s27
	s_and_b32 s0, s25, 0xffff
	s_lshr_b32 s25, s24, 16
	s_and_b32 s24, s24, 0xffff
	s_cmp_eq_u32 s6, s23
	s_mul_i32 s24, s24, s25
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s6, s24, s0
	s_cbranch_scc1 .LBB33_2
; %bb.1:                                ; %.preheader36.i.i.i
	v_mov_b32_e32 v4, 0
	v_subrev_nc_u32_e32 v3, s17, v0
	v_add_co_u32 v7, s0, s21, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, null, s22, 0, s0
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_add_nc_u32_e32 v3, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v9, vcc_lo, s21, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, s22, v6, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_add_co_u32 v5, s0, s8, v1
	v_add_co_ci_u32_e64 v6, s0, s9, v2, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_cmp_gt_u32_e64 s0, s17, v0
	v_lshl_add_u32 v3, s6, 1, v0
	v_cndmask_b32_e64 v6, v6, v8, s0
	v_cndmask_b32_e64 v5, v5, v7, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_add_co_u32 v11, s0, s8, v1
	v_add_co_ci_u32_e64 v2, s0, s9, v2, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s21, v7
	v_add_co_ci_u32_e64 v14, s0, s22, v8, s0
	v_mad_u64_u32 v[7:8], null, s6, 3, v[0:1]
	global_load_b32 v1, v[5:6], off
	v_cmp_gt_u32_e64 s0, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_mov_b32_e32 v8, v4
	v_dual_cndmask_b32 v10, v2, v10 :: v_dual_cndmask_b32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v7
	v_lshlrev_b64 v[11:12], 2, v[7:8]
	global_load_b32 v2, v[9:10], off
	v_add_co_u32 v15, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v16, vcc_lo, s9, v6, vcc_lo
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_lshl_add_u32 v3, s6, 2, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v8, v15, v13, s0
	v_cndmask_b32_e64 v9, v16, v14, s0
	v_add_co_u32 v15, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[3:4]
	v_add_co_ci_u32_e32 v12, vcc_lo, s22, v12, vcc_lo
	v_add_co_u32 v16, vcc_lo, s21, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v18, vcc_lo, s22, v14, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_add_co_u32 v14, s0, s8, v5
	v_add_co_ci_u32_e64 v13, s0, s9, v6, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_cmp_gt_u32_e64 s0, s17, v7
	v_cndmask_b32_e64 v13, v13, v12, s0
	v_cndmask_b32_e64 v12, v14, v15, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s0, s8, v5
	v_add_co_ci_u32_e64 v7, s0, s9, v6, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v18, vcc_lo
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[10:11], null, s6, 5, v[0:1]
	v_mov_b32_e32 v11, v4
	v_mad_u64_u32 v[14:15], null, s6, 6, v[0:1]
	v_mov_b32_e32 v15, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[10:11]
	v_subrev_nc_u32_e32 v3, s17, v10
	v_lshlrev_b64 v[18:19], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_co_u32 v21, s0, s21, v5
	v_subrev_nc_u32_e32 v3, s17, v14
	v_add_co_ci_u32_e64 v11, s0, s22, v6, s0
	v_lshlrev_b64 v[5:6], 2, v[14:15]
	v_add_co_u32 v15, s0, s8, v18
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_ci_u32_e64 v18, s0, s9, v19, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s1, s21, v5
	v_add_co_ci_u32_e64 v19, s1, s22, v6, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, s1, s8, v3
	v_cmp_gt_u32_e64 s0, s17, v10
	v_add_co_ci_u32_e64 v4, s1, s9, v4, s1
	v_cmp_gt_u32_e64 s1, s17, v14
	v_cndmask_b32_e32 v6, v20, v16, vcc_lo
	v_cndmask_b32_e64 v11, v18, v11, s0
	v_cndmask_b32_e64 v10, v15, v21, s0
	s_mov_b32 s0, -1
	v_cndmask_b32_e64 v15, v4, v19, s1
	v_cndmask_b32_e64 v14, v3, v5, s1
	global_load_b32 v3, v[8:9], off
	global_load_b32 v4, v[12:13], off
	global_load_b32 v5, v[6:7], off
	global_load_b32 v6, v[10:11], off
	global_load_b32 v7, v[14:15], off
	v_mad_u64_u32 v[9:10], null, s6, 7, v[0:1]
	s_mov_b32 s1, 0
	s_branch .LBB33_3
.LBB33_2:
	s_mov_b32 s0, s3
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
                                        ; implicit-def: $vgpr9
.LBB33_3:                               ; %Flow135
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_sub_i32 s7, s7, s4
	s_cbranch_vccnz .LBB33_19
; %bb.4:                                ; %.preheader.i.i.i
	s_add_i32 s1, s7, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB33_6
; %bb.5:
	v_subrev_nc_u32_e32 v1, s17, v0
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, s23, s21, v17
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(3)
	v_add_co_ci_u32_e64 v4, null, s22, 0, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v2, v2, v4
	global_load_b32 v1, v[1:2], off
.LBB33_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, s6, v0
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB33_8
; %bb.7:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v2, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v2 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v2, v[9:10], off
.LBB33_8:
	s_or_b32 exec_lo, exec_lo, s23
	v_lshl_add_u32 v9, s6, 1, v0
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB33_10
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v3, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v3, v[9:10], off
.LBB33_10:
	s_or_b32 exec_lo, exec_lo, s23
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, s6, 3, v[0:1]
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB33_12
; %bb.11:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v4, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v4 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v4, v[9:10], off
.LBB33_12:
	s_or_b32 exec_lo, exec_lo, s23
	v_lshl_add_u32 v9, s6, 2, v0
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB33_14
; %bb.13:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v5, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v5 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v5, v[9:10], off
.LBB33_14:
	s_or_b32 exec_lo, exec_lo, s23
	v_mad_u64_u32 v[9:10], null, s6, 5, v[0:1]
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB33_16
; %bb.15:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v6, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v6 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v6, v[9:10], off
.LBB33_16:
	s_or_b32 exec_lo, exec_lo, s23
	v_mad_u64_u32 v[9:10], null, s6, 6, v[0:1]
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB33_18
; %bb.17:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v7, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v7, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v7, v[9:10], off
.LBB33_18:
	s_or_b32 exec_lo, exec_lo, s23
	v_mad_u64_u32 v[9:10], null, s6, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s1, v9
.LBB33_19:                              ; %Flow136
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB33_21
; %bb.20:                               ; %_ZN7rocprim6detail11gmem_to_regILj8EjPjEEvRAT__T0_T1_S6_jjb.exit.sink.split.i.i
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v11, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v12, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[8:9], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s0, s8, v8
	v_add_co_ci_u32_e64 v9, s0, s9, v9, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v8, v8, v11 :: v_dual_cndmask_b32 v9, v9, v12
	global_load_b32 v8, v[8:9], off
.LBB33_21:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EjPjEEvRAT__T0_T1_S6_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s1
	s_lshl_b64 s[0:1], s[2:3], 1
	v_cndmask_b32_e64 v15, 0, 1, s19
	s_add_u32 s9, s12, s0
	s_addc_u32 s21, s13, s1
	s_lshl_b64 s[0:1], s[4:5], 1
	v_lshlrev_b32_e32 v18, 1, v0
	s_add_u32 s3, s12, s0
	s_addc_u32 s4, s13, s1
	s_and_not1_b32 vcc_lo, exec_lo, s19
	s_waitcnt vmcnt(5)
	ds_store_2addr_stride64_b32 v17, v1, v2 offset1:2
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v17, v3, v4 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v17, v5, v6 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v17, v7, v8 offset0:12 offset1:14
	s_cbranch_vccnz .LBB33_23
; %bb.22:                               ; %.preheader36.i93.i.i
	v_mov_b32_e32 v14, 0
	v_subrev_nc_u32_e32 v13, s17, v0
	v_mad_u64_u32 v[21:22], null, s6, 3, v[0:1]
	v_add_co_u32 v30, s1, s9, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[9:10], 1, v[13:14]
	v_add_nc_u32_e32 v13, s6, v0
	v_add_co_ci_u32_e64 v31, null, s21, 0, s1
	v_mad_u64_u32 v[25:26], null, s6, 5, v[0:1]
	v_lshlrev_b64 v[11:12], 1, v[13:14]
	v_add_co_u32 v32, s1, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v35, s1, s4, v10, s1
	v_mad_u64_u32 v[26:27], null, s6, 6, v[0:1]
	v_add_co_u32 v16, vcc_lo, s9, v11
	v_add_co_ci_u32_e32 v33, vcc_lo, s21, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_mov_b32_e32 v27, v14
	v_cmp_gt_u32_e64 s2, s17, v0
	s_add_i32 s8, s7, s17
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_lshl_add_u32 v13, s6, 1, v0
	v_lshlrev_b64 v[9:10], 1, v[26:27]
	v_cndmask_b32_e64 v27, v32, v30, s2
	v_lshlrev_b64 v[11:12], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v22, s0, s9, v11
	v_add_co_ci_u32_e64 v34, s0, s21, v12, s0
	v_cmp_gt_u32_e64 s0, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 1, v[13:14]
	v_subrev_nc_u32_e32 v13, s17, v21
	v_lshlrev_b64 v[23:24], 1, v[13:14]
	v_lshl_add_u32 v13, s6, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[28:29], 1, v[13:14]
	v_add_co_u32 v36, s1, s9, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v37, s1, s21, v29, s1
	v_cmp_gt_u32_e64 s1, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_cndmask_b32_e64 v28, v35, v31, s2
	v_add_co_u32 v35, s2, s3, v11
	v_add_co_ci_u32_e64 v11, s2, s4, v12, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[29:30], 1, v[13:14]
	v_subrev_nc_u32_e32 v13, s17, v25
	v_add_co_u32 v38, s2, s9, v9
	v_add_co_ci_u32_e64 v39, s2, s21, v10, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[31:32], 1, v[13:14]
	v_subrev_nc_u32_e32 v13, s17, v26
	v_add_co_u32 v12, s2, s3, v29
	v_cndmask_b32_e64 v11, v11, v34, s0
	v_lshlrev_b64 v[9:10], 1, v[13:14]
	v_add_co_ci_u32_e64 v13, s2, s4, v30, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v12, v12, v36, s1
	v_add_co_u32 v9, s2, s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v29, s2, s4, v10, s2
	v_cmp_gt_u32_e64 s2, s17, v26
	v_cndmask_b32_e64 v10, v35, v22, s0
	v_cndmask_b32_e64 v13, v13, v37, s1
	v_cndmask_b32_e64 v30, v29, v39, s2
	v_cndmask_b32_e64 v29, v9, v38, s2
	global_load_u16 v9, v[27:28], off
	global_load_u16 v10, v[10:11], off
	global_load_u16 v11, v[12:13], off
	global_load_u16 v12, v[29:30], off
	v_add_co_u32 v13, s0, s3, v19
	v_mov_b32_e32 v22, v14
	v_add_co_ci_u32_e64 v26, s0, s4, v20, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v27, v13, v16, vcc_lo
	v_lshlrev_b64 v[19:20], 1, v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v28, v26, v33, vcc_lo
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v13, vcc_lo, s21, v20, vcc_lo
	v_add_co_u32 v29, vcc_lo, s3, v23
	v_add_co_ci_u32_e32 v24, vcc_lo, s4, v24, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v21
	v_mov_b32_e32 v26, v14
	v_mad_u64_u32 v[22:23], null, s6, 7, v[0:1]
	v_mov_b32_e32 v23, v14
	v_cndmask_b32_e32 v21, v24, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[19:20], 1, v[25:26]
	v_subrev_nc_u32_e32 v13, s17, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v24, s0, s9, v19
	v_add_co_ci_u32_e64 v26, s0, s21, v20, s0
	v_lshlrev_b64 v[19:20], 1, v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	v_add_co_u32 v23, s0, s3, v31
	v_add_co_ci_u32_e64 v30, s0, s4, v32, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_u32 v19, s1, s9, v19
	v_cmp_gt_u32_e64 s0, s17, v25
	v_add_co_ci_u32_e64 v25, s1, s21, v20, s1
	v_add_co_u32 v31, s1, s3, v13
	v_add_co_ci_u32_e64 v32, s1, s4, v14, s1
	v_cmp_gt_u32_e64 s1, s17, v22
	v_cndmask_b32_e32 v20, v29, v16, vcc_lo
	v_cndmask_b32_e64 v14, v30, v26, s0
	v_cndmask_b32_e64 v13, v23, v24, s0
	s_mov_b32 s0, 0
	v_cndmask_b32_e64 v23, v32, v25, s1
	v_cndmask_b32_e64 v22, v31, v19, s1
	global_load_d16_hi_b16 v9, v[27:28], off
	global_load_d16_hi_b16 v10, v[20:21], off
	global_load_d16_hi_b16 v11, v[13:14], off
	global_load_d16_hi_b16 v12, v[22:23], off
	s_branch .LBB33_24
.LBB33_23:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12
                                        ; implicit-def: $sgpr8
.LBB33_24:                              ; %Flow133
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB33_42
; %bb.25:                               ; %.preheader.i102.i.i
	s_add_i32 s8, s7, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12
	v_cmpx_gt_u32_e64 s8, v0
	s_cbranch_execz .LBB33_27
; %bb.26:
	s_waitcnt vmcnt(3)
	v_subrev_nc_u32_e32 v9, s17, v0
	s_waitcnt vmcnt(1)
	v_add_co_u32 v11, s1, s9, v18
	v_mov_b32_e32 v10, 0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e64 v12, null, s21, 0, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 1, v[9:10]
	v_add_co_u32 v9, vcc_lo, s3, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s4, v10, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v9, v9, v11 :: v_dual_cndmask_b32 v10, v10, v12
	global_load_d16_b16 v9, v[9:10], off
.LBB33_27:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v13, s6, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v13
	s_cbranch_execz .LBB33_29
; %bb.28:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s3, v13
	v_add_co_ci_u32_e64 v14, s0, s4, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_hi_b16 v9, v[13:14], off
.LBB33_29:
	s_or_b32 exec_lo, exec_lo, s1
	v_lshl_add_u32 v13, s6, 1, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v13
	s_cbranch_execz .LBB33_31
; %bb.30:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s3, v13
	v_add_co_ci_u32_e64 v14, s0, s4, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_b16 v10, v[13:14], off
.LBB33_31:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[13:14], null, s6, 3, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v13
	s_cbranch_execz .LBB33_33
; %bb.32:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s3, v13
	v_add_co_ci_u32_e64 v14, s0, s4, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_hi_b16 v10, v[13:14], off
.LBB33_33:
	s_or_b32 exec_lo, exec_lo, s1
	v_lshl_add_u32 v13, s6, 2, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v13
	s_cbranch_execz .LBB33_35
; %bb.34:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s3, v13
	v_add_co_ci_u32_e64 v14, s0, s4, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_b16 v11, v[13:14], off
.LBB33_35:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[13:14], null, s6, 5, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v13
	s_cbranch_execz .LBB33_37
; %bb.36:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s3, v13
	v_add_co_ci_u32_e64 v14, s0, s4, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_hi_b16 v11, v[13:14], off
.LBB33_37:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[13:14], null, s6, 6, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v13
	s_cbranch_execz .LBB33_39
; %bb.38:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s3, v13
	v_add_co_ci_u32_e64 v14, s0, s4, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_b16 v12, v[13:14], off
.LBB33_39:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[13:14], null, s6, 7, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v13
	s_cbranch_execz .LBB33_41
; %bb.40:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s9, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s3, v13
	v_add_co_ci_u32_e64 v14, s0, s4, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_hi_b16 v12, v[13:14], off
.LBB33_41:                              ; %Flow132
	s_or_b32 exec_lo, exec_lo, s1
.LBB33_42:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EtPtEEvRAT__T0_T1_S6_jjb.exit.i.i
	v_lshlrev_b32_e32 v13, 3, v0
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_min_u32_e32 v14, s8, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e64 v21, v14, s7 clamp
	v_min_u32_e32 v16, s17, v14
	v_cmpx_lt_u32_e64 v21, v16
	s_cbranch_execz .LBB33_46
; %bb.43:                               ; %.lr.ph.i.preheader.i.i
	v_lshlrev_b32_e32 v19, 2, v14
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v19, s17, 2, v19
.LBB33_44:                              ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v20, v16, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v20, 1, v20
	v_not_b32_e32 v22, v20
	v_lshlrev_b32_e32 v23, 2, v20
	v_add_nc_u32_e32 v24, 1, v20
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v22, v22, 2, v19
	ds_load_b32 v23, v23
	ds_load_b32 v22, v22
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v23, s18, v23
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v22, s18, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, v23, v22
	v_cndmask_b32_e32 v21, v24, v21, vcc_lo
	v_cndmask_b32_e32 v16, v16, v20, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v21, v16
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB33_44
; %bb.45:                               ; %Flow130
	s_or_b32 exec_lo, exec_lo, s1
.LBB33_46:                              ; %Flow131
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s0
	v_sub_nc_u32_e32 v14, v14, v21
	v_cmp_ge_u32_e32 vcc_lo, s17, v21
                                        ; implicit-def: $vgpr25
                                        ; implicit-def: $vgpr22
                                        ; implicit-def: $vgpr24
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr23
                                        ; implicit-def: $vgpr19
                                        ; implicit-def: $vgpr16
	v_add_nc_u32_e32 v26, s17, v14
                                        ; implicit-def: $vgpr14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_u32_e64 s0, s8, v26
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB33_52
; %bb.47:                               ; %._crit_edge.i.i.i.i
	v_cmp_gt_u32_e32 vcc_lo, s17, v21
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB33_49
; %bb.48:
	v_lshlrev_b32_e32 v1, 2, v21
	ds_load_b32 v1, v1
.LBB33_49:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_le_u32_e64 s0, s8, v26
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_gt_u32_e64 s8, v26
	s_cbranch_execz .LBB33_51
; %bb.50:
	v_lshlrev_b32_e32 v2, 2, v26
	ds_load_b32 v2, v2
.LBB33_51:                              ; %.loopexit.loopexit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v3, s18, v2
	v_and_b32_e32 v4, s18, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s1, v4, v3
	v_mov_b32_e32 v3, s17
	s_and_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 vcc_lo, s0, s1
	v_cndmask_b32_e32 v16, v26, v21, vcc_lo
	v_dual_cndmask_b32 v4, s8, v3 :: v_dual_add_nc_u32 v5, 1, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v7, v21, v5 :: v_dual_add_nc_u32 v4, -1, v4
	v_min_u32_e32 v4, v5, v4
	v_cndmask_b32_e32 v5, v5, v26, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s0, s17, v7
	v_lshlrev_b32_e32 v4, 2, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s2, s8, v5
	ds_load_b32 v4, v4
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v6, v4, v2, vcc_lo
	v_dual_cndmask_b32 v4, v1, v4 :: v_dual_cndmask_b32 v1, v2, v1
	v_and_b32_e32 v8, s18, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v14, s18, v4
	v_cmp_le_u32_e64 s1, v14, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_or_b32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v14, v5, v7, s0
	v_cndmask_b32_e64 v8, s8, v3, s0
	v_add_nc_u32_e32 v19, 1, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, -1, v8
	v_cndmask_b32_e64 v7, v7, v19, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v8, v19, v8
	v_cndmask_b32_e64 v5, v19, v5, s0
	v_cmp_gt_u32_e64 s1, s17, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v8, 2, v8
	v_cmp_le_u32_e64 s3, s8, v5
	ds_load_b32 v8, v8
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v21, v8, v6, s0
	v_cndmask_b32_e64 v8, v4, v8, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v20, s18, v21
	v_and_b32_e32 v22, s18, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s2, v22, v20
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s3, s1
	v_cndmask_b32_e64 v19, v5, v7, s1
	v_cndmask_b32_e64 v20, s8, v3, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v22, 1, v19
	v_add_nc_u32_e32 v20, -1, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v22, s1
	v_min_u32_e32 v20, v22, v20
	v_cndmask_b32_e64 v5, v22, v5, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s2, s17, v7
	v_lshlrev_b32_e32 v20, 2, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s4, s8, v5
	ds_load_b32 v20, v20
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v25, v20, v21, s1
	v_cndmask_b32_e64 v26, v8, v20, s1
	v_and_b32_e32 v20, s18, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v23, s18, v26
	v_cmp_le_u32_e64 s3, v23, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_or_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v23, v5, v7, s2
	v_cndmask_b32_e64 v20, s8, v3, s2
	v_add_nc_u32_e32 v22, 1, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v20, -1, v20
	v_cndmask_b32_e64 v7, v7, v22, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v20, v22, v20
	v_cndmask_b32_e64 v5, v22, v5, s2
	v_cmp_gt_u32_e64 s3, s17, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v20, 2, v20
	v_cmp_le_u32_e64 s5, s8, v5
	ds_load_b32 v20, v20
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v27, v20, v25, s2
	v_cndmask_b32_e64 v28, v26, v20, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v20, s18, v27
	v_and_b32_e32 v24, s18, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s4, v24, v20
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s5, s3
	v_cndmask_b32_e64 v20, v5, v7, s3
	v_cndmask_b32_e64 v22, s8, v3, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v24, 1, v20
	v_add_nc_u32_e32 v22, -1, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v24, s3
	v_min_u32_e32 v22, v24, v22
	v_cndmask_b32_e64 v5, v24, v5, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s4, s17, v7
	v_lshlrev_b32_e32 v22, 2, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s6, s8, v5
	ds_load_b32 v22, v22
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v29, v22, v27, s3
	v_cndmask_b32_e64 v30, v28, v22, s3
	v_and_b32_e32 v22, s18, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v31, s18, v30
	v_cmp_le_u32_e64 s5, v31, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, s5
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v24, v5, v7, s4
	v_cndmask_b32_e64 v22, s8, v3, s4
	v_add_nc_u32_e32 v31, 1, v24
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v22, -1, v22
	v_cndmask_b32_e64 v2, v6, v4, s0
	v_cndmask_b32_e64 v4, v25, v26, s2
	v_cndmask_b32_e64 v6, v29, v30, s4
	v_cndmask_b32_e64 v7, v7, v31, s4
	v_min_u32_e32 v22, v31, v22
	v_cndmask_b32_e64 v5, v31, v5, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s5, s17, v7
	v_lshlrev_b32_e32 v22, 2, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s7, s8, v5
	ds_load_b32 v22, v22
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v32, v22, v29, s4
	v_cndmask_b32_e64 v33, v30, v22, s4
	v_and_b32_e32 v22, s18, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v34, s18, v33
	v_cmp_le_u32_e64 s6, v34, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, s5, s6
	s_or_b32 s5, s7, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v22, v5, v7, s5
	v_cndmask_b32_e64 v3, s8, v3, s5
	v_add_nc_u32_e32 v31, 1, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, -1, v3
	v_cndmask_b32_e64 v36, v7, v31, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_min_u32_e32 v3, v31, v3
	v_cndmask_b32_e64 v31, v31, v5, s5
	v_cndmask_b32_e64 v5, v27, v28, s3
	v_cmp_gt_u32_e32 vcc_lo, s17, v36
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b32_e32 v3, 2, v3
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v34, v3, v32, s5
	v_cndmask_b32_e64 v35, v33, v3, s5
	v_cndmask_b32_e64 v3, v21, v8, s1
	v_cmp_le_u32_e64 s1, s8, v31
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_and_b32_e32 v7, s18, v34
	v_and_b32_e32 v37, s18, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s0, v37, v7
	v_cndmask_b32_e64 v7, v32, v33, s5
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 vcc_lo, s1, s0
	v_dual_cndmask_b32 v8, v34, v35 :: v_dual_cndmask_b32 v25, v31, v36
.LBB33_52:                              ; %Flow128
	s_or_b32 exec_lo, exec_lo, s9
	s_barrier
	buffer_gl0_inv
	ds_store_b16 v18, v9
	ds_store_b16_d16_hi v18, v9 offset:256
	ds_store_b16 v18, v10 offset:512
	ds_store_b16_d16_hi v18, v10 offset:768
	ds_store_b16 v18, v11 offset:1024
	ds_store_b16_d16_hi v18, v11 offset:1280
	ds_store_b16 v18, v12 offset:1536
	ds_store_b16_d16_hi v18, v12 offset:1792
	v_lshlrev_b32_e32 v9, 1, v16
	v_lshlrev_b32_e32 v10, 1, v19
	v_lshlrev_b32_e32 v11, 1, v20
	v_lshlrev_b32_e32 v12, 1, v22
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v21, v9
	ds_load_u16 v20, v10
	ds_load_u16 v19, v11
	ds_load_u16 v22, v12
	v_lshlrev_b32_e32 v9, 1, v14
	v_lshlrev_b32_e32 v10, 1, v23
	v_lshlrev_b32_e32 v11, 1, v24
	v_lshlrev_b32_e32 v12, 1, v25
	v_cmp_ne_u32_e32 vcc_lo, 1, v15
	s_mov_b32 s21, 0
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v21, v9
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v20, v10
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v19, v11
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v22, v12
	v_lshrrev_b32_e32 v9, 2, v0
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v23, v9, v13
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b32_e32 v24, 2, v23
	s_cbranch_vccnz .LBB33_62
; %bb.53:                               ; %.preheader170.i.i.preheader
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v9, v24
	s_mov_b64 s[0:1], 0
.LBB33_54:                              ; %.preheader170.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v10, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v9, v10
	v_add_nc_u32_e32 v9, 4, v9
	s_cbranch_scc0 .LBB33_54
; %bb.55:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v25, v0, v9
	v_dual_mov_b32 v16, v8 :: v_dual_mov_b32 v13, v5
	v_mov_b32_e32 v14, v6
	v_dual_mov_b32 v12, v4 :: v_dual_mov_b32 v11, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mov_b32 v15, v7 :: v_dual_lshlrev_b32 v26, 2, v25
	v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v9, v1
.LBB33_56:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v27, v26
	v_add_nc_u32_e32 v26, 0x210, v26
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v9, v27
	s_cbranch_scc1 .LBB33_56
; %bb.57:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_lshl_b64 s[0:1], s[20:21], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	s_clause 0x7
	global_store_b32 v17, v9, s[0:1]
	global_store_b32 v17, v10, s[0:1] offset:512
	global_store_b32 v17, v11, s[0:1] offset:1024
	global_store_b32 v17, v12, s[0:1] offset:1536
	global_store_b32 v17, v13, s[0:1] offset:2048
	global_store_b32 v17, v14, s[0:1] offset:2560
	global_store_b32 v17, v15, s[0:1] offset:3072
	global_store_b32 v17, v16, s[0:1] offset:3584
	v_lshlrev_b32_e32 v9, 1, v23
	v_lshrrev_b32_e32 v10, 16, v21
	v_lshrrev_b32_e32 v11, 16, v20
	v_lshrrev_b32_e32 v12, 16, v19
	v_lshrrev_b32_e32 v13, 16, v22
	s_mov_b64 s[0:1], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB33_58:                              ; =>This Inner Loop Header: Depth=1
	s_cmp_eq_u32 s0, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 2
	v_cndmask_b32_e32 v14, v21, v10, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v14, v20, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 4
	v_cndmask_b32_e32 v14, v14, v11, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v14, v19, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 6
	v_cndmask_b32_e32 v14, v14, v12, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 7
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v14, v22, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	v_cndmask_b32_e32 v14, v14, v13, vcc_lo
	ds_store_b16 v9, v14
	v_add_nc_u32_e32 v9, 2, v9
	s_cbranch_scc0 .LBB33_58
; %bb.59:
	v_dual_mov_b32 v10, v20 :: v_dual_lshlrev_b32 v13, 1, v25
	v_dual_mov_b32 v11, v21 :: v_dual_mov_b32 v12, v22
	v_mov_b32_e32 v9, v19
	s_mov_b64 s[8:9], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB33_60:                              ; =>This Inner Loop Header: Depth=1
	ds_load_u16 v14, v13
	s_cmp_eq_u32 s8, 7
	v_lshrrev_b32_e32 v15, 16, v12
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s8, 5
	v_lshrrev_b32_e32 v16, 16, v9
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s8, 3
	v_lshrrev_b32_e32 v25, 16, v10
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s8, 1
	v_lshrrev_b32_e32 v26, 16, v11
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s8, 6
	v_add_nc_u32_e32 v13, 0x108, v13
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s8, 4
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 2
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v15, v15, v14, vcc_lo
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s8, 0
	v_cndmask_b32_e64 v16, v16, v14, s0
	s_cselect_b32 s6, -1, 0
	v_cndmask_b32_e64 v25, v25, v14, s1
	v_cndmask_b32_e64 v26, v26, v14, s2
	v_cndmask_b32_e64 v11, v11, v14, s6
	v_cndmask_b32_e64 v10, v10, v14, s5
	v_cndmask_b32_e64 v9, v9, v14, s4
	v_cndmask_b32_e64 v12, v12, v14, s3
	s_add_u32 s8, s8, 1
	v_perm_b32 v11, v26, v11, 0x5040100
	v_perm_b32 v10, v25, v10, 0x5040100
	v_perm_b32 v9, v16, v9, 0x5040100
	v_perm_b32 v12, v15, v12, 0x5040100
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s8, 8
	s_cbranch_scc1 .LBB33_60
; %bb.61:                               ; %_ZN7rocprim11block_storeItLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrItEEEEvT_RA8_tRNS_14block_exchangeItLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_lshl_b64 s[2:3], s[20:21], 1
	s_mov_b32 s0, 0
	s_add_u32 s2, s14, s2
	s_addc_u32 s3, s15, s3
	s_mov_b32 s18, -1
	s_clause 0x6
	global_store_b16 v18, v11, s[2:3]
	global_store_d16_hi_b16 v18, v11, s[2:3] offset:256
	global_store_b16 v18, v10, s[2:3] offset:512
	global_store_d16_hi_b16 v18, v10, s[2:3] offset:768
	global_store_b16 v18, v9, s[2:3] offset:1024
	global_store_d16_hi_b16 v18, v9, s[2:3] offset:1280
	global_store_b16 v18, v12, s[2:3] offset:1536
	s_branch .LBB33_63
.LBB33_62:
	s_mov_b32 s0, -1
	s_mov_b32 s18, s21
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12
.LBB33_63:                              ; %Flow
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB33_103
; %bb.64:                               ; %.preheader.i.i.preheader
	v_mov_b32_e32 v9, v24
	s_mov_b64 s[0:1], 0
.LBB33_65:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v10, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v9, v10
	v_add_nc_u32_e32 v9, 4, v9
	s_cbranch_scc0 .LBB33_65
; %bb.66:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v11, v0, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v9, 2, v11
.LBB33_67:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v10, v9
	v_add_nc_u32_e32 v9, 0x210, v9
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v1, v10
	s_cbranch_scc1 .LBB33_67
; %bb.68:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[0:1], s[20:21], 2
	s_sub_i32 s6, s16, s20
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	v_add_co_u32 v9, s0, s0, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, null, s1, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s6, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB33_70
; %bb.69:
	global_store_b32 v[9:10], v1, off
.LBB33_70:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v1, 0x80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s6, v1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB33_72
; %bb.71:
	global_store_b32 v[9:10], v2, off offset:512
.LBB33_72:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v1, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s6, v1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB33_74
; %bb.73:
	global_store_b32 v[9:10], v3, off offset:1024
.LBB33_74:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v1, 0x180, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s6, v1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB33_76
; %bb.75:
	global_store_b32 v[9:10], v4, off offset:1536
.LBB33_76:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v1, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s6, v1
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB33_78
; %bb.77:
	global_store_b32 v[9:10], v5, off offset:2048
.LBB33_78:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v1, 0x280, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s6, v1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB33_80
; %bb.79:
	global_store_b32 v[9:10], v6, off offset:2560
.LBB33_80:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v1, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s6, v1
	s_and_saveexec_b32 s7, s5
	s_cbranch_execz .LBB33_82
; %bb.81:
	global_store_b32 v[9:10], v7, off offset:3072
.LBB33_82:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v0, 0x380, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s18, s6, v0
	s_and_saveexec_b32 s6, s18
	s_cbranch_execz .LBB33_84
; %bb.83:
	global_store_b32 v[9:10], v8, off offset:3584
.LBB33_84:                              ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jjRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b32_e32 v3, 1, v23
	v_lshrrev_b32_e32 v0, 16, v21
	v_lshrrev_b32_e32 v1, 16, v20
	v_lshrrev_b32_e32 v2, 16, v19
	v_lshrrev_b32_e32 v4, 16, v22
	v_sub_nc_u32_e32 v3, v24, v3
	s_mov_b64 s[8:9], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB33_85:                              ; =>This Inner Loop Header: Depth=1
	s_cmp_eq_u32 s8, 1
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 2
	v_cndmask_b32_e64 v5, v21, v0, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v20, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 4
	v_cndmask_b32_e64 v5, v5, v1, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v19, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 6
	v_cndmask_b32_e64 v5, v5, v2, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 7
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v22, s6
	s_cselect_b32 s6, -1, 0
	s_add_u32 s8, s8, 1
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s8, 8
	v_cndmask_b32_e64 v5, v5, v4, s6
	ds_store_b16 v3, v5
	v_add_nc_u32_e32 v3, 2, v3
	s_cbranch_scc0 .LBB33_85
; %bb.86:
	v_lshlrev_b32_e32 v0, 1, v11
	v_mov_b32_e32 v12, v22
	s_mov_b64 s[16:17], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB33_87:                              ; =>This Inner Loop Header: Depth=1
	ds_load_u16 v1, v0
	s_cmp_eq_u32 s16, 7
	v_lshrrev_b32_e32 v2, 16, v12
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s16, 5
	v_lshrrev_b32_e32 v3, 16, v19
	s_cselect_b32 s7, -1, 0
	s_cmp_eq_u32 s16, 3
	v_lshrrev_b32_e32 v4, 16, v20
	s_cselect_b32 s8, -1, 0
	s_cmp_eq_u32 s16, 1
	v_lshrrev_b32_e32 v5, 16, v21
	s_cselect_b32 s9, -1, 0
	s_cmp_eq_u32 s16, 6
	v_add_nc_u32_e32 v0, 0x108, v0
	s_cselect_b32 s10, -1, 0
	s_cmp_eq_u32 s16, 4
	s_cselect_b32 s11, -1, 0
	s_cmp_eq_u32 s16, 2
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v2, v2, v1, s6
	s_cselect_b32 s12, -1, 0
	s_cmp_eq_u32 s16, 0
	v_cndmask_b32_e64 v3, v3, v1, s7
	s_cselect_b32 s13, -1, 0
	v_cndmask_b32_e64 v4, v4, v1, s8
	v_cndmask_b32_e64 v5, v5, v1, s9
	v_cndmask_b32_e64 v6, v21, v1, s13
	v_cndmask_b32_e64 v7, v20, v1, s12
	v_cndmask_b32_e64 v8, v19, v1, s11
	v_cndmask_b32_e64 v1, v12, v1, s10
	s_add_u32 s16, s16, 1
	v_perm_b32 v21, v5, v6, 0x5040100
	v_perm_b32 v20, v4, v7, 0x5040100
	v_perm_b32 v19, v3, v8, 0x5040100
	v_perm_b32 v12, v2, v1, 0x5040100
	s_addc_u32 s17, s17, 0
	s_cmp_lg_u32 s16, 8
	s_cbranch_scc1 .LBB33_87
; %bb.88:                               ; %_ZN7rocprim14block_exchangeItLj128ELj8ELj1ELj1EE18blocked_to_stripedItEEvRA8_KtRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[6:7], s[20:21], 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_u32 s6, s14, s6
	s_addc_u32 s7, s15, s7
	v_add_co_u32 v0, s6, s6, v18
	v_add_co_ci_u32_e64 v1, null, s7, 0, s6
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB33_90
; %bb.89:
	global_store_b16 v[0:1], v21, off
.LBB33_90:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB33_92
; %bb.91:
	global_store_d16_hi_b16 v[0:1], v21, off offset:256
.LBB33_92:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB33_94
; %bb.93:
	global_store_b16 v[0:1], v20, off offset:512
.LBB33_94:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB33_96
; %bb.95:
	global_store_d16_hi_b16 v[0:1], v20, off offset:768
.LBB33_96:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB33_98
; %bb.97:
	global_store_b16 v[0:1], v19, off offset:1024
.LBB33_98:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB33_100
; %bb.99:
	global_store_d16_hi_b16 v[0:1], v19, off offset:1280
.LBB33_100:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB33_102
; %bb.101:
	global_store_b16 v[0:1], v12, off offset:1536
.LBB33_102:
	s_or_b32 exec_lo, exec_lo, s0
.LBB33_103:                             ; %Flow126
	s_and_saveexec_b32 s0, s18
	s_cbranch_execz .LBB33_105
; %bb.104:                              ; %_ZN7rocprim11block_storeItLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrItEEEEvT_RA8_tjRNS_14block_exchangeItLj128ELj8ELj1ELj1EE13storage_type_E.exit.sink.split.i.i.i
	s_lshl_b64 s[0:1], s[20:21], 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s14, s0
	s_addc_u32 s1, s15, s1
	global_store_d16_hi_b16 v18, v12, s[0:1] offset:1792
.LBB33_105:                             ; %_ZN7rocprim6detail28block_merge_mergepath_kernelILj128ELj8EPjN6thrust10device_ptrIjEEPtNS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_PKSF_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 40
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
.Lfunc_end33:
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end33-_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 7336
; NumSgprs: 30
; NumVgprs: 40
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 40
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.protected	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ ; -- Begin function _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.globl	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	8
	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: ; @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
; %bb.0:
	s_load_b128 s[16:19], s[0:1], 0x20
	s_lshl_b32 s2, s15, 7
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s3, s16, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB34_28
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_lshr_b32 s0, s16, 7
	s_mov_b32 s3, 0
	s_cmp_lg_u32 s15, s0
	v_lshlrev_b32_e32 v1, 1, v0
	s_cselect_b32 s1, -1, 0
	s_lshl_b64 s[12:13], s[2:3], 2
	v_lshlrev_b32_e32 v2, 2, v0
	v_add_nc_u32_e32 v0, s2, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s4, s12
	s_addc_u32 s13, s5, s13
	s_lshl_b64 s[20:21], s[2:3], 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s8, s8, s20
	s_addc_u32 s9, s9, s21
	global_load_u16 v3, v1, s[8:9]
	global_load_b32 v4, v2, s[12:13]
	s_lshr_b32 s0, s17, 7
	s_sub_i32 s9, 0, s17
	s_sub_i32 s8, 0, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, s15, s8
	s_and_b32 s0, s8, s0
	s_lshl_b32 s8, s8, 7
	s_cmp_eq_u32 s0, 0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s12, s0, exec_lo
	s_cselect_b32 s9, s17, s9
	s_add_i32 s9, s9, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s9, s16
	s_cbranch_scc1 .LBB34_4
; %bb.2:
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB34_5
; %bb.3:                                ; %.critedge68.i
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, 0
	s_mov_b32 s3, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
	s_branch .LBB34_6
.LBB34_4:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr1_vgpr2
	s_branch .LBB34_11
.LBB34_5:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB34_6:                               ; %Flow37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB34_10
; %bb.7:
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2
	v_cmpx_gt_u32_e64 s16, v0
	s_cbranch_execz .LBB34_9
; %bb.8:
	v_mov_b32_e32 v1, 0
	s_or_b32 s3, s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB34_9:                               ; %Flow39
	s_or_b32 exec_lo, exec_lo, s2
.LBB34_10:                              ; %Flow38
	s_mov_b32 s2, 0
.LBB34_11:                              ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB34_26
; %bb.12:
	s_min_u32 s2, s9, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s12, s2, s17
	s_min_u32 s13, s8, s2
	s_add_i32 s8, s8, s2
	s_min_u32 s3, s12, s16
	s_cmp_gt_u32 s12, s9
	v_subrev_nc_u32_e32 v0, s8, v0
	s_cselect_b32 s8, -1, 0
	s_and_b32 vcc_lo, exec_lo, s1
	v_cndmask_b32_e64 v1, 0, 1, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, s13, v0
	v_cmp_ne_u32_e64 s1, 1, v1
	s_cbranch_vccz .LBB34_18
; %bb.13:                               ; %.critedge72.i
	v_mov_b32_e32 v2, s2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB34_17
; %bb.14:                               ; %.lr.ph.i84.preheader.i
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v7, s3 :: v_dual_and_b32 v6, s18, v4
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, 0
	s_mov_b32 s1, 0
.LBB34_15:                              ; %.lr.ph.i84.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v7
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[0:1]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v8, s18, v8
	v_cmp_gt_u32_e32 vcc_lo, v6, v8
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v8, v6
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_add_nc_u32_e32 v9, 1, v0
	v_and_b32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 1, v8
	v_dual_cndmask_b32 v7, v0, v7 :: v_dual_cndmask_b32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v7
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB34_15
; %bb.16:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
.LBB34_17:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEEPtNS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit90.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	s_mov_b32 s1, 0
	v_lshlrev_b64 v[6:7], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v4, off
	s_branch .LBB34_19
.LBB34_18:
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB34_19:                              ; %Flow34
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB34_25
; %bb.20:
	v_mov_b32_e32 v2, s2
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB34_24
; %bb.21:                               ; %.lr.ph.i.preheader.i
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v7, s3 :: v_dual_and_b32 v6, s18, v4
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, 0
	s_mov_b32 s1, 0
.LBB34_22:                              ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v7
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[0:1]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v8, s18, v8
	v_cmp_gt_u32_e32 vcc_lo, v6, v8
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v8, v6
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_add_nc_u32_e32 v9, 1, v0
	v_and_b32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 1, v8
	v_dual_cndmask_b32 v7, v0, v7 :: v_dual_cndmask_b32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v7
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB34_22
; %bb.23:                               ; %Flow32
	s_or_b32 exec_lo, exec_lo, s1
.LBB34_24:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEEPtNS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB34_25:                              ; %Flow35
	s_mov_b32 s3, -1
.LBB34_26:                              ; %Flow40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB34_28
; %bb.27:                               ; %.critedge.sink.split.i
	s_waitcnt vmcnt(1)
	global_store_b16 v[1:2], v3, off
.LBB34_28:                              ; %_ZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEEPtNS4_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
.Lfunc_end34:
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end34-_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1036
; NumSgprs: 24
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.protected	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_ ; -- Begin function _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.globl	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.p2align	8
	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@function
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_: ; @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
; %bb.0:
	s_load_b64 s[4:5], s[0:1], 0x8
	v_lshl_or_b32 v0, s15, 7, v0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s5, v0
	s_cbranch_execz .LBB35_6
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s3, 9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, s5, 0x7ffffe
	s_sub_i32 s6, 0, s5
	s_add_i32 s5, s5, -1
	v_and_b32_e32 v1, s6, v0
	v_and_b32_e32 v5, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 10, v1
	v_add_nc_u32_e32 v2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v4, s4, v2
	v_min_u32_e32 v2, s4, v1
	v_add_nc_u32_e32 v3, s3, v4
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, s4, v3
	v_lshlrev_b32_e32 v3, 10, v5
	v_sub_nc_u32_e32 v5, v1, v2
	v_sub_nc_u32_e32 v6, v1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, v5, v3
	v_sub_nc_u32_e32 v3, v4, v2
	v_sub_nc_u32_e64 v6, v1, v6 clamp
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v7, v1, v3
	v_cmpx_lt_u32_e64 v6, v7
	s_cbranch_execz .LBB35_5
; %bb.2:                                ; %.lr.ph.i.preheader
	s_load_b64 s[4:5], s[0:1], 0x0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v5
	v_lshlrev_b64 v[10:11], 2, v[4:5]
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v11, vcc_lo
	s_mov_b32 s4, 0
.LBB35_3:                               ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v4, v7, v6
	v_mov_b32_e32 v12, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 1, v4
	v_xad_u32 v11, v4, -1, v1
	v_lshlrev_b64 v[13:14], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v13, vcc_lo, v3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v8, v14, vcc_lo
	v_add_co_u32 v11, vcc_lo, v9, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, v10, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v12, s2, v13
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v11, s2, v11
	v_add_nc_u32_e32 v13, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, v12, v11
	v_dual_cndmask_b32 v7, v7, v4 :: v_dual_cndmask_b32 v6, v13, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v6, v7
	s_or_b32 s4, vcc_lo, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB35_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s4
.LBB35_5:                               ; %Flow58
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v6, v2
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB35_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
.Lfunc_end35:
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, .Lfunc_end35-_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 480
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
	.protected	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_ ; -- Begin function _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.globl	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
	.p2align	8
	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,@function
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_: ; @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[16:19], s[0:1], 0x20
	s_load_b64 s[4:5], s[0:1], 0x30
	s_mov_b32 s3, 0
	s_mov_b32 s6, s15
	s_mov_b32 s7, s3
	s_mov_b32 s11, s3
	v_lshlrev_b32_e32 v17, 2, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s23, s16, 10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s15, s23
	s_cselect_b32 s19, -1, 0
	s_lshl_b64 s[8:9], s[6:7], 2
	s_add_u32 s8, s4, s8
	s_addc_u32 s9, s5, s9
	s_add_i32 s10, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[10:11], 2
	s_add_u32 s4, s4, s10
	s_addc_u32 s5, s5, s11
	s_clause 0x1
	s_load_b32 s2, s[8:9], 0x0
	s_load_b32 s7, s[4:5], 0x0
	s_load_b256 s[8:15], s[0:1], 0x0
	s_lshr_b32 s4, s17, 9
	s_load_b64 s[24:25], s[0:1], 0x44
	s_and_b32 s0, s4, 0x7ffffe
	s_lshl_b32 s20, s6, 10
	s_sub_i32 s1, 0, s0
	s_add_i32 s0, s0, -1
	s_and_b32 s1, s6, s1
	s_and_b32 s5, s0, s6
	s_lshl_b32 s4, s1, 11
	s_lshl_b32 s1, s1, 10
	s_add_i32 s4, s4, s17
	s_sub_i32 s21, s20, s1
	s_sub_i32 s1, s4, s1
	s_add_i32 s4, s4, s21
	s_min_u32 s21, s16, s1
	s_add_i32 s1, s1, s17
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s17, s4, s2
	s_sub_i32 s22, s4, s7
	s_min_u32 s4, s16, s17
	s_addk_i32 s22, 0x400
	s_cmp_eq_u32 s0, s5
	s_mov_b32 s5, s3
	s_cselect_b32 s17, s1, s22
	s_cselect_b32 s21, s21, s7
	s_lshl_b64 s[0:1], s[2:3], 2
	s_min_u32 s7, s17, s16
	s_sub_i32 s17, s21, s2
	s_add_u32 s21, s8, s0
	s_addc_u32 s22, s9, s1
	s_lshl_b64 s[26:27], s[4:5], 2
	s_mov_b32 s1, -1
	s_add_u32 s8, s8, s26
	s_addc_u32 s9, s9, s27
	s_and_b32 s0, s25, 0xffff
	s_lshr_b32 s25, s24, 16
	s_and_b32 s24, s24, 0xffff
	s_cmp_eq_u32 s6, s23
	s_mul_i32 s24, s24, s25
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s6, s24, s0
	s_cbranch_scc1 .LBB36_2
; %bb.1:                                ; %.preheader38.i.i.i
	v_subrev_nc_u32_e32 v3, s17, v0
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v5, s6, v0
	v_add_co_u32 v7, s0, s21, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, null, s22, 0, s0
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v3, s17, v5
	v_lshl_add_u32 v9, s6, 1, v0
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_mov_b32 v6, v4 :: v_dual_cndmask_b32 v1, v1, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_lshlrev_b64 v[10:11], 2, v[5:6]
	v_subrev_nc_u32_e32 v3, s17, v9
	global_load_b32 v1, v[1:2], off
	v_add_co_u32 v7, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	v_add_co_u32 v12, vcc_lo, s21, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v11, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v5
	v_mov_b32_e32 v10, v4
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v7, v7, v12 :: v_dual_cndmask_b32 v8, v8, v11
	v_lshlrev_b64 v[10:11], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v2, v[7:8], off
	v_add_co_u32 v14, vcc_lo, s21, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s22, v11, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v9, v12, v14, vcc_lo
	v_cndmask_b32_e32 v10, v13, v10, vcc_lo
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[5:6], null, s6, 3, v[0:1]
	v_mov_b32_e32 v6, v4
	v_mad_u64_u32 v[13:14], null, s6, 5, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v3, s17, v5
	v_lshlrev_b64 v[11:12], 2, v[5:6]
	v_lshl_add_u32 v6, s6, 2, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_u32 v16, vcc_lo, s8, v7
	v_mov_b32_e32 v7, v4
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	v_add_co_u32 v18, vcc_lo, s21, v11
	v_add_co_ci_u32_e32 v15, vcc_lo, s22, v12, vcc_lo
	v_lshlrev_b64 v[11:12], 2, v[3:4]
	v_cmp_gt_u32_e32 vcc_lo, s17, v5
	v_subrev_nc_u32_e32 v3, s17, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v8, v15, vcc_lo
	v_lshlrev_b64 v[14:15], 2, v[6:7]
	v_add_co_u32 v5, s0, s8, v11
	v_add_co_ci_u32_e64 v19, s0, s9, v12, s0
	v_mad_u64_u32 v[11:12], null, s6, 6, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s0, s21, v14
	v_add_co_ci_u32_e64 v12, s0, s22, v15, s0
	v_mov_b32_e32 v14, v4
	v_cndmask_b32_e32 v7, v16, v18, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v6
	v_lshlrev_b64 v[15:16], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v11
	v_cndmask_b32_e32 v6, v19, v12, vcc_lo
	v_lshlrev_b64 v[18:19], 2, v[13:14]
	v_mov_b32_e32 v12, v4
	v_add_co_u32 v21, s0, s8, v15
	v_lshlrev_b64 v[14:15], 2, v[3:4]
	v_add_co_ci_u32_e64 v16, s0, s9, v16, s0
	v_add_co_u32 v18, s0, s21, v18
	v_lshlrev_b64 v[3:4], 2, v[11:12]
	v_add_co_ci_u32_e64 v19, s0, s22, v19, s0
	v_cmp_gt_u32_e64 s0, s17, v13
	v_add_co_u32 v13, s1, s8, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s1, s9, v15, s1
	v_add_co_u32 v3, s1, s21, v3
	v_add_co_ci_u32_e64 v4, s1, s22, v4, s1
	v_cmp_gt_u32_e64 s1, s17, v11
	v_cndmask_b32_e32 v5, v5, v20, vcc_lo
	v_cndmask_b32_e64 v12, v16, v19, s0
	v_cndmask_b32_e64 v11, v21, v18, s0
	s_mov_b32 s0, -1
	v_cndmask_b32_e64 v14, v14, v4, s1
	v_cndmask_b32_e64 v13, v13, v3, s1
	global_load_b32 v3, v[9:10], off
	global_load_b32 v4, v[7:8], off
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[11:12], off
	global_load_b32 v7, v[13:14], off
	v_mad_u64_u32 v[9:10], null, s6, 7, v[0:1]
	s_mov_b32 s1, 0
	s_branch .LBB36_3
.LBB36_2:
	s_mov_b32 s0, s3
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
.LBB36_3:                               ; %Flow134
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_sub_i32 s7, s7, s4
	s_cbranch_vccnz .LBB36_19
; %bb.4:                                ; %.preheader.i.i.i
	s_add_i32 s1, s7, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB36_6
; %bb.5:
	v_subrev_nc_u32_e32 v1, s17, v0
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, s23, s21, v17
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(3)
	v_add_co_ci_u32_e64 v4, null, s22, 0, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v2, v2, v4
	global_load_b32 v1, v[1:2], off
.LBB36_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, s6, v0
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB36_8
; %bb.7:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v2, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v2 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v2, v[9:10], off
.LBB36_8:
	s_or_b32 exec_lo, exec_lo, s23
	v_lshl_add_u32 v9, s6, 1, v0
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB36_10
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v3, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v3, v[9:10], off
.LBB36_10:
	s_or_b32 exec_lo, exec_lo, s23
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, s6, 3, v[0:1]
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB36_12
; %bb.11:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v4, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v4 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v4, v[9:10], off
.LBB36_12:
	s_or_b32 exec_lo, exec_lo, s23
	v_lshl_add_u32 v9, s6, 2, v0
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB36_14
; %bb.13:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v5, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v5 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v5, v[9:10], off
.LBB36_14:
	s_or_b32 exec_lo, exec_lo, s23
	v_mad_u64_u32 v[9:10], null, s6, 5, v[0:1]
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB36_16
; %bb.15:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v6, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v6 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v6, v[9:10], off
.LBB36_16:
	s_or_b32 exec_lo, exec_lo, s23
	v_mad_u64_u32 v[9:10], null, s6, 6, v[0:1]
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB36_18
; %bb.17:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v7, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s22, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v7, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v7, v[9:10], off
.LBB36_18:
	s_or_b32 exec_lo, exec_lo, s23
	v_mad_u64_u32 v[9:10], null, s6, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s1, v9
.LBB36_19:                              ; %Flow135
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB36_21
; %bb.20:                               ; %.loopexit.sink.split.i.i.i
	v_mov_b32_e32 v12, 0
	v_subrev_nc_u32_e32 v11, s17, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v10, v12
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[9:10]
	v_add_co_u32 v8, vcc_lo, s8, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v12, vcc_lo
	v_add_co_u32 v11, vcc_lo, s21, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s22, v14, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v9, v10, v12 :: v_dual_cndmask_b32 v8, v8, v11
	global_load_b32 v8, v[8:9], off
.LBB36_21:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EjN6thrust10device_ptrIjEEEEvRAT__T0_T1_S8_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s1
	s_lshl_b64 s[2:3], s[2:3], 1
	v_cndmask_b32_e64 v15, 0, 1, s19
	s_add_u32 s2, s12, s2
	s_addc_u32 s3, s13, s3
	s_lshl_b64 s[4:5], s[4:5], 1
	v_lshlrev_b32_e32 v18, 1, v0
	s_add_u32 s4, s12, s4
	s_mov_b32 s0, 0
	s_addc_u32 s5, s13, s5
	s_and_not1_b32 vcc_lo, exec_lo, s19
	s_waitcnt vmcnt(5)
	ds_store_2addr_stride64_b32 v17, v1, v2 offset1:2
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v17, v3, v4 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v17, v5, v6 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v17, v7, v8 offset0:12 offset1:14
	s_cbranch_vccnz .LBB36_23
; %bb.22:                               ; %.preheader38.i91.i.i
	v_mad_u64_u32 v[24:25], null, s6, 3, v[0:1]
	v_add_co_u32 v25, s0, s2, v18
	v_subrev_nc_u32_e32 v12, s17, v0
	v_add_co_ci_u32_e64 v26, null, s3, 0, s0
	v_mov_b32_e32 v13, 0
	v_lshl_add_u32 v20, s6, 1, v0
	v_lshl_add_u32 v11, s6, 2, v0
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 1, v[12:13]
	v_add_co_u32 v14, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v10, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v26, v16, v26 :: v_dual_add_nc_u32 v19, s6, v0
	v_mov_b32_e32 v21, v13
	v_cndmask_b32_e32 v25, v14, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v12, s17, v19
	v_lshlrev_b64 v[27:28], 1, v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], 1, v[12:13]
	v_subrev_nc_u32_e32 v12, s17, v20
	v_lshlrev_b64 v[9:10], 1, v[12:13]
	v_subrev_nc_u32_e32 v12, s17, v24
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, s4, v22
	v_lshlrev_b64 v[29:30], 1, v[12:13]
	v_subrev_nc_u32_e32 v12, s17, v11
	v_add_co_u32 v16, s0, s4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v31, s0, s5, v10, s0
	v_lshlrev_b64 v[9:10], 1, v[12:13]
	v_mov_b32_e32 v12, v13
	v_add_co_u32 v27, s0, s2, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v28, s0, s3, v28, s0
	v_cmp_gt_u32_e64 s0, s17, v20
	v_lshlrev_b64 v[20:21], 1, v[11:12]
	v_add_co_u32 v9, s1, s4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v12, s1, s5, v10, s1
	v_cndmask_b32_e64 v10, v16, v27, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s1, s2, v20
	v_add_co_ci_u32_e64 v21, s1, s3, v21, s1
	v_cmp_gt_u32_e64 s1, s17, v11
	v_cndmask_b32_e64 v11, v31, v28, s0
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v23, vcc_lo
	v_mad_u64_u32 v[31:32], null, s6, 6, v[0:1]
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v21, v12, v21, s1
	v_cndmask_b32_e64 v20, v9, v20, s1
	global_load_u16 v9, v[25:26], off
	global_load_u16 v10, v[10:11], off
	global_load_u16 v11, v[20:21], off
	v_mov_b32_e32 v20, v13
	v_mad_u64_u32 v[26:27], null, s6, 5, v[0:1]
	v_mov_b32_e32 v27, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[20:21], 1, v[19:20]
	v_lshlrev_b64 v[27:28], 1, v[26:27]
	v_subrev_nc_u32_e32 v12, s17, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v23, vcc_lo, s2, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v19
	v_mov_b32_e32 v25, v13
	v_mov_b32_e32 v32, v13
	v_lshlrev_b64 v[19:20], 1, v[12:13]
	v_subrev_nc_u32_e32 v12, s17, v31
	v_dual_cndmask_b32 v22, v16, v21 :: v_dual_cndmask_b32 v21, v14, v23
	v_lshlrev_b64 v[33:34], 1, v[24:25]
	v_lshlrev_b64 v[35:36], 1, v[31:32]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[12:13], 1, v[12:13]
	v_cmp_gt_u32_e32 vcc_lo, s17, v24
	v_add_co_u32 v25, s0, s2, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v32, s0, s3, v34, s0
	v_add_co_u32 v27, s0, s2, v27
	v_add_co_ci_u32_e64 v28, s0, s3, v28, s0
	v_add_co_u32 v33, s0, s2, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v34, s0, s3, v36, s0
	v_add_co_u32 v29, s0, s4, v29
	v_add_co_ci_u32_e64 v30, s0, s5, v30, s0
	v_add_co_u32 v16, s0, s4, v19
	v_add_co_u32 v12, s1, s4, v12
	v_add_co_ci_u32_e64 v19, s0, s5, v20, s0
	v_cmp_gt_u32_e64 s0, s17, v26
	v_add_co_ci_u32_e64 v23, s1, s5, v13, s1
	v_cmp_gt_u32_e64 s1, s17, v31
	v_dual_cndmask_b32 v14, v30, v32 :: v_dual_cndmask_b32 v13, v29, v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v20, v19, v28, s0
	v_cndmask_b32_e64 v19, v16, v27, s0
	v_cndmask_b32_e64 v24, v23, v34, s1
	v_cndmask_b32_e64 v23, v12, v33, s1
	s_add_i32 s1, s7, s17
	s_mov_b32 s0, -1
	global_load_d16_hi_b16 v9, v[21:22], off
	global_load_d16_hi_b16 v10, v[13:14], off
	global_load_d16_hi_b16 v11, v[19:20], off
	global_load_d16_b16 v12, v[23:24], off
	v_mad_u64_u32 v[13:14], null, s6, 7, v[0:1]
	s_branch .LBB36_24
.LBB36_23:
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12
                                        ; implicit-def: $sgpr1
.LBB36_24:                              ; %Flow132
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB36_40
; %bb.25:                               ; %.preheader.i102.i.i
	s_add_i32 s1, s7, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB36_27
; %bb.26:
	s_waitcnt vmcnt(3)
	v_subrev_nc_u32_e32 v9, s17, v0
	s_waitcnt vmcnt(1)
	v_add_co_u32 v11, s8, s2, v18
	v_mov_b32_e32 v10, 0
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e64 v12, null, s3, 0, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 1, v[9:10]
	v_add_co_u32 v9, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v9, v9, v11 :: v_dual_cndmask_b32 v10, v10, v12
	global_load_d16_b16 v9, v[9:10], off
.LBB36_27:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v13, s6, v0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v13
	s_cbranch_execz .LBB36_29
; %bb.28:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s2, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s4, v13
	v_add_co_ci_u32_e64 v14, s0, s5, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_hi_b16 v9, v[13:14], off
.LBB36_29:
	s_or_b32 exec_lo, exec_lo, s8
	v_lshl_add_u32 v13, s6, 1, v0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v13
	s_cbranch_execz .LBB36_31
; %bb.30:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s2, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s4, v13
	v_add_co_ci_u32_e64 v14, s0, s5, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_b16 v10, v[13:14], off
.LBB36_31:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[13:14], null, s6, 3, v[0:1]
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v13
	s_cbranch_execz .LBB36_33
; %bb.32:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s2, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s4, v13
	v_add_co_ci_u32_e64 v14, s0, s5, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_hi_b16 v10, v[13:14], off
.LBB36_33:
	s_or_b32 exec_lo, exec_lo, s8
	v_lshl_add_u32 v13, s6, 2, v0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v13
	s_cbranch_execz .LBB36_35
; %bb.34:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s2, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s4, v13
	v_add_co_ci_u32_e64 v14, s0, s5, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_b16 v11, v[13:14], off
.LBB36_35:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[13:14], null, s6, 5, v[0:1]
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v13
	s_cbranch_execz .LBB36_37
; %bb.36:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s2, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s4, v13
	v_add_co_ci_u32_e64 v14, s0, s5, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_hi_b16 v11, v[13:14], off
.LBB36_37:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[13:14], null, s6, 6, v[0:1]
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v13
	s_cbranch_execz .LBB36_39
; %bb.38:
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s2, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v20, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v13, s17, v13
	v_lshlrev_b64 v[13:14], 1, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s4, v13
	v_add_co_ci_u32_e64 v14, s0, s5, v14, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_cndmask_b32 v14, v14, v19
	global_load_d16_b16 v12, v[13:14], off
.LBB36_39:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[13:14], null, s6, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s1, v13
.LBB36_40:                              ; %Flow133
	v_mov_b32_e32 v14, s1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB36_42
; %bb.41:                               ; %.loopexit.sink.split.i99.i.i
	v_mov_b32_e32 v20, 0
	v_subrev_nc_u32_e32 v19, s17, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v14, v20
	v_lshlrev_b64 v[19:20], 1, v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[21:22], 1, v[13:14]
	v_add_co_u32 v16, vcc_lo, s4, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v20, vcc_lo
	v_add_co_u32 v19, vcc_lo, s2, v21
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v20, vcc_lo, s3, v22, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_dual_cndmask_b32 v13, v16, v19 :: v_dual_cndmask_b32 v14, v14, v20
	global_load_d16_hi_b16 v12, v[13:14], off
	v_mov_b32_e32 v14, s1
.LBB36_42:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EtN6thrust10device_ptrItEEEEvRAT__T0_T1_S8_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b32_e32 v13, 3, v0
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_min_u32_e32 v16, v14, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e64 v22, v16, s7 clamp
	v_min_u32_e32 v19, s17, v16
	v_cmpx_lt_u32_e64 v22, v19
	s_cbranch_execz .LBB36_46
; %bb.43:                               ; %.lr.ph.i.preheader.i.i
	v_lshlrev_b32_e32 v20, 2, v16
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v20, s17, 2, v20
.LBB36_44:                              ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v21, v19, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v21, 1, v21
	v_not_b32_e32 v23, v21
	v_lshlrev_b32_e32 v24, 2, v21
	v_add_nc_u32_e32 v25, 1, v21
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v23, v23, 2, v20
	ds_load_b32 v24, v24
	ds_load_b32 v23, v23
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v24, s18, v24
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v23, s18, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, v24, v23
	v_dual_cndmask_b32 v22, v25, v22 :: v_dual_cndmask_b32 v19, v19, v21
	v_cmp_ge_u32_e32 vcc_lo, v22, v19
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB36_44
; %bb.45:                               ; %Flow130
	s_or_b32 exec_lo, exec_lo, s1
.LBB36_46:                              ; %Flow131
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s0
	v_sub_nc_u32_e32 v16, v16, v22
	v_cmp_ge_u32_e32 vcc_lo, s17, v22
                                        ; implicit-def: $vgpr26
                                        ; implicit-def: $vgpr25
                                        ; implicit-def: $vgpr24
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $vgpr23
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr19
	v_add_nc_u32_e32 v27, s17, v16
                                        ; implicit-def: $vgpr16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s0, v27, v14
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s8, s0
	s_cbranch_execz .LBB36_52
; %bb.47:                               ; %._crit_edge.i.i.i.i
	v_cmp_gt_u32_e32 vcc_lo, s17, v22
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB36_49
; %bb.48:
	v_lshlrev_b32_e32 v1, 2, v22
	ds_load_b32 v1, v1
.LBB36_49:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_ge_u32_e64 s0, v27, v14
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_lt_u32_e64 v27, v14
	s_cbranch_execz .LBB36_51
; %bb.50:
	v_lshlrev_b32_e32 v2, 2, v27
	ds_load_b32 v2, v2
.LBB36_51:                              ; %.loopexit.loopexit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v3, s18, v2
	v_and_b32_e32 v4, s18, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s1, v4, v3
	s_and_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 vcc_lo, s0, s1
	v_cndmask_b32_e32 v19, v27, v22, vcc_lo
	v_cndmask_b32_e64 v3, v14, s17, vcc_lo
	v_add_nc_u32_e32 v4, 1, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, -1, v3
	v_min_u32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 2, v3
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v5, v3, v2, vcc_lo
	v_dual_cndmask_b32 v3, v1, v3 :: v_dual_cndmask_b32 v6, v22, v4
	v_dual_cndmask_b32 v4, v4, v27 :: v_dual_cndmask_b32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_and_b32_e32 v7, s18, v5
	v_and_b32_e32 v8, s18, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_gt_u32_e64 s0, s17, v6
	v_cmp_ge_u32_e64 s2, v4, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s1, v8, v7
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v16, v4, v6, s0
	v_cndmask_b32_e64 v7, v14, s17, s0
	v_add_nc_u32_e32 v8, 1, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, -1, v7
	v_cndmask_b32_e64 v2, v5, v3, s0
	v_cndmask_b32_e64 v6, v6, v8, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v7, v8, v7
	v_cndmask_b32_e64 v4, v8, v4, s0
	v_cmp_gt_u32_e64 s1, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v7, 2, v7
	v_cmp_ge_u32_e64 s3, v4, v14
	ds_load_b32 v7, v7
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v22, v7, v5, s0
	v_cndmask_b32_e64 v7, v3, v7, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v20, s18, v22
	v_and_b32_e32 v21, s18, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s2, v21, v20
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s3, s1
	v_cndmask_b32_e64 v20, v4, v6, s1
	v_cndmask_b32_e64 v8, v14, s17, s1
	v_cndmask_b32_e64 v3, v22, v7, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v21, 1, v20
	v_add_nc_u32_e32 v8, -1, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v21, s1
	v_min_u32_e32 v8, v21, v8
	v_cndmask_b32_e64 v4, v21, v4, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s2, s17, v6
	v_lshlrev_b32_e32 v8, 2, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_ge_u32_e64 s4, v4, v14
	ds_load_b32 v8, v8
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v26, v8, v22, s1
	v_cndmask_b32_e64 v8, v7, v8, s1
	v_and_b32_e32 v23, s18, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v24, s18, v8
	v_cmp_le_u32_e64 s3, v24, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_or_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v23, v4, v6, s2
	v_cndmask_b32_e64 v21, v14, s17, s2
	v_add_nc_u32_e32 v24, 1, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v21, -1, v21
	v_cndmask_b32_e64 v6, v6, v24, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v21, v24, v21
	v_cndmask_b32_e64 v4, v24, v4, s2
	v_cmp_gt_u32_e64 s3, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v21, 2, v21
	v_cmp_ge_u32_e64 s5, v4, v14
	ds_load_b32 v21, v21
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v27, v21, v26, s2
	v_cndmask_b32_e64 v28, v8, v21, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v21, s18, v27
	v_and_b32_e32 v25, s18, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s4, v25, v21
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s5, s3
	v_cndmask_b32_e64 v21, v4, v6, s3
	v_cndmask_b32_e64 v24, v14, s17, s3
	v_cndmask_b32_e64 v5, v27, v28, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v25, 1, v21
	v_add_nc_u32_e32 v24, -1, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v25, s3
	v_min_u32_e32 v24, v25, v24
	v_cndmask_b32_e64 v4, v25, v4, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s4, s17, v6
	v_lshlrev_b32_e32 v24, 2, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_ge_u32_e64 s6, v4, v14
	ds_load_b32 v24, v24
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v29, v24, v27, s3
	v_cndmask_b32_e64 v30, v28, v24, s3
	v_and_b32_e32 v24, s18, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v31, s18, v30
	v_cmp_le_u32_e64 s5, v31, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, s5
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v24, v4, v6, s4
	v_cndmask_b32_e64 v25, v14, s17, s4
	v_add_nc_u32_e32 v31, 1, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v25, -1, v25
	v_cndmask_b32_e64 v6, v6, v31, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v25, v31, v25
	v_cndmask_b32_e64 v4, v31, v4, s4
	v_cmp_gt_u32_e64 s5, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v25, 2, v25
	v_cmp_ge_u32_e64 s7, v4, v14
	ds_load_b32 v25, v25
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v32, v25, v29, s4
	v_cndmask_b32_e64 v33, v30, v25, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v25, s18, v32
	v_and_b32_e32 v34, s18, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s6, v34, v25
	s_and_b32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s7, s5
	v_cndmask_b32_e64 v25, v4, v6, s5
	v_cndmask_b32_e64 v31, v14, s17, s5
	v_cndmask_b32_e64 v7, v32, v33, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v34, 1, v25
	v_add_nc_u32_e32 v31, -1, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v36, v6, v34, s5
	v_min_u32_e32 v31, v34, v31
	v_cndmask_b32_e64 v34, v34, v4, s5
	v_cndmask_b32_e64 v4, v26, v8, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_gt_u32_e32 vcc_lo, s17, v36
	v_lshlrev_b32_e32 v31, 2, v31
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_ge_u32_e64 s1, v34, v14
	ds_load_b32 v31, v31
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v35, v31, v32, s5
	v_cndmask_b32_e64 v31, v33, v31, s5
	v_and_b32_e32 v6, s18, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v37, s18, v31
	v_cmp_le_u32_e64 s0, v37, v6
	v_cndmask_b32_e64 v6, v29, v30, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_or_b32 vcc_lo, s1, s0
	v_cndmask_b32_e32 v8, v35, v31, vcc_lo
	v_cndmask_b32_e32 v26, v34, v36, vcc_lo
.LBB36_52:                              ; %Flow128
	s_or_b32 exec_lo, exec_lo, s8
	s_barrier
	buffer_gl0_inv
	ds_store_b16 v18, v9
	ds_store_b16_d16_hi v18, v9 offset:256
	ds_store_b16 v18, v10 offset:512
	ds_store_b16_d16_hi v18, v10 offset:768
	ds_store_b16 v18, v11 offset:1024
	ds_store_b16_d16_hi v18, v11 offset:1280
	ds_store_b16 v18, v12 offset:1536
	ds_store_b16_d16_hi v18, v12 offset:1792
	v_lshlrev_b32_e32 v9, 1, v19
	v_lshlrev_b32_e32 v10, 1, v20
	v_lshlrev_b32_e32 v11, 1, v21
	v_lshlrev_b32_e32 v12, 1, v25
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v21, v9
	ds_load_u16 v20, v10
	ds_load_u16 v19, v11
	ds_load_u16 v22, v12
	v_lshlrev_b32_e32 v9, 1, v16
	v_lshlrev_b32_e32 v10, 1, v23
	v_lshlrev_b32_e32 v11, 1, v24
	v_lshlrev_b32_e32 v12, 1, v26
	v_cmp_ne_u32_e32 vcc_lo, 1, v15
	s_mov_b32 s21, 0
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v21, v9
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v20, v10
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v19, v11
	s_waitcnt lgkmcnt(3)
	ds_load_u16_d16_hi v22, v12
	v_lshrrev_b32_e32 v9, 2, v0
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v23, v9, v13
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b32_e32 v24, 2, v23
	s_cbranch_vccnz .LBB36_62
; %bb.53:                               ; %.preheader174.i.i.preheader
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v9, v24
	s_mov_b64 s[0:1], 0
.LBB36_54:                              ; %.preheader174.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v10, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v9, v10
	v_add_nc_u32_e32 v9, 4, v9
	s_cbranch_scc0 .LBB36_54
; %bb.55:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v25, v0, v9
	v_dual_mov_b32 v16, v8 :: v_dual_mov_b32 v13, v5
	v_mov_b32_e32 v14, v6
	v_dual_mov_b32 v12, v4 :: v_dual_mov_b32 v11, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mov_b32 v15, v7 :: v_dual_lshlrev_b32 v26, 2, v25
	v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v9, v1
.LBB36_56:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v27, v26
	v_add_nc_u32_e32 v26, 0x210, v26
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v9, v27
	s_cbranch_scc1 .LBB36_56
; %bb.57:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPjEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_lshl_b64 s[0:1], s[20:21], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	s_clause 0x7
	global_store_b32 v17, v9, s[0:1]
	global_store_b32 v17, v10, s[0:1] offset:512
	global_store_b32 v17, v11, s[0:1] offset:1024
	global_store_b32 v17, v12, s[0:1] offset:1536
	global_store_b32 v17, v13, s[0:1] offset:2048
	global_store_b32 v17, v14, s[0:1] offset:2560
	global_store_b32 v17, v15, s[0:1] offset:3072
	global_store_b32 v17, v16, s[0:1] offset:3584
	v_lshlrev_b32_e32 v9, 1, v23
	v_lshrrev_b32_e32 v10, 16, v21
	v_lshrrev_b32_e32 v11, 16, v20
	v_lshrrev_b32_e32 v12, 16, v19
	v_lshrrev_b32_e32 v13, 16, v22
	s_mov_b64 s[0:1], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB36_58:                              ; =>This Inner Loop Header: Depth=1
	s_cmp_eq_u32 s0, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 2
	v_cndmask_b32_e32 v14, v21, v10, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v14, v20, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 4
	v_cndmask_b32_e32 v14, v14, v11, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v14, v19, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 6
	v_cndmask_b32_e32 v14, v14, v12, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 7
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v14, v22, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	v_cndmask_b32_e32 v14, v14, v13, vcc_lo
	ds_store_b16 v9, v14
	v_add_nc_u32_e32 v9, 2, v9
	s_cbranch_scc0 .LBB36_58
; %bb.59:
	v_dual_mov_b32 v10, v20 :: v_dual_lshlrev_b32 v13, 1, v25
	v_dual_mov_b32 v11, v21 :: v_dual_mov_b32 v12, v22
	v_mov_b32_e32 v9, v19
	s_mov_b64 s[8:9], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB36_60:                              ; =>This Inner Loop Header: Depth=1
	ds_load_u16 v14, v13
	s_cmp_eq_u32 s8, 7
	v_lshrrev_b32_e32 v15, 16, v12
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s8, 5
	v_lshrrev_b32_e32 v16, 16, v9
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s8, 3
	v_lshrrev_b32_e32 v25, 16, v10
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s8, 1
	v_lshrrev_b32_e32 v26, 16, v11
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s8, 6
	v_add_nc_u32_e32 v13, 0x108, v13
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s8, 4
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 2
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v15, v15, v14, vcc_lo
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s8, 0
	v_cndmask_b32_e64 v16, v16, v14, s0
	s_cselect_b32 s6, -1, 0
	v_cndmask_b32_e64 v25, v25, v14, s1
	v_cndmask_b32_e64 v26, v26, v14, s2
	v_cndmask_b32_e64 v11, v11, v14, s6
	v_cndmask_b32_e64 v10, v10, v14, s5
	v_cndmask_b32_e64 v9, v9, v14, s4
	v_cndmask_b32_e64 v12, v12, v14, s3
	s_add_u32 s8, s8, 1
	v_perm_b32 v11, v26, v11, 0x5040100
	v_perm_b32 v10, v25, v10, 0x5040100
	v_perm_b32 v9, v16, v9, 0x5040100
	v_perm_b32 v12, v15, v12, 0x5040100
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s8, 8
	s_cbranch_scc1 .LBB36_60
; %bb.61:                               ; %_ZN7rocprim11block_storeItLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPtEEvT_RA8_tRNS_14block_exchangeItLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_lshl_b64 s[2:3], s[20:21], 1
	s_mov_b32 s0, 0
	s_add_u32 s2, s14, s2
	s_addc_u32 s3, s15, s3
	s_mov_b32 s18, -1
	s_clause 0x6
	global_store_b16 v18, v11, s[2:3]
	global_store_d16_hi_b16 v18, v11, s[2:3] offset:256
	global_store_b16 v18, v10, s[2:3] offset:512
	global_store_d16_hi_b16 v18, v10, s[2:3] offset:768
	global_store_b16 v18, v9, s[2:3] offset:1024
	global_store_d16_hi_b16 v18, v9, s[2:3] offset:1280
	global_store_b16 v18, v12, s[2:3] offset:1536
	s_branch .LBB36_63
.LBB36_62:
	s_mov_b32 s0, -1
	s_mov_b32 s18, s21
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12
.LBB36_63:                              ; %Flow
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB36_103
; %bb.64:                               ; %.preheader.i.i.preheader
	v_mov_b32_e32 v9, v24
	s_mov_b64 s[0:1], 0
.LBB36_65:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v10, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v9, v10
	v_add_nc_u32_e32 v9, 4, v9
	s_cbranch_scc0 .LBB36_65
; %bb.66:
	v_lshrrev_b32_e32 v9, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v11, v0, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v9, 2, v11
.LBB36_67:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v10, v9
	v_add_nc_u32_e32 v9, 0x210, v9
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v1, v10
	s_cbranch_scc1 .LBB36_67
; %bb.68:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[0:1], s[20:21], 2
	s_sub_i32 s6, s16, s20
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	v_add_co_u32 v9, s0, s0, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, null, s1, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s6, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB36_70
; %bb.69:
	global_store_b32 v[9:10], v1, off
.LBB36_70:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v1, 0x80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s6, v1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB36_72
; %bb.71:
	global_store_b32 v[9:10], v2, off offset:512
.LBB36_72:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v1, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s6, v1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB36_74
; %bb.73:
	global_store_b32 v[9:10], v3, off offset:1024
.LBB36_74:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v1, 0x180, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s6, v1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB36_76
; %bb.75:
	global_store_b32 v[9:10], v4, off offset:1536
.LBB36_76:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v1, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s6, v1
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB36_78
; %bb.77:
	global_store_b32 v[9:10], v5, off offset:2048
.LBB36_78:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v1, 0x280, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s6, v1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB36_80
; %bb.79:
	global_store_b32 v[9:10], v6, off offset:2560
.LBB36_80:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v1, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s6, v1
	s_and_saveexec_b32 s7, s5
	s_cbranch_execz .LBB36_82
; %bb.81:
	global_store_b32 v[9:10], v7, off offset:3072
.LBB36_82:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v0, 0x380, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s18, s6, v0
	s_and_saveexec_b32 s6, s18
	s_cbranch_execz .LBB36_84
; %bb.83:
	global_store_b32 v[9:10], v8, off offset:3584
.LBB36_84:                              ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPjEEvT_RA8_jjRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b32_e32 v3, 1, v23
	v_lshrrev_b32_e32 v0, 16, v21
	v_lshrrev_b32_e32 v1, 16, v20
	v_lshrrev_b32_e32 v2, 16, v19
	v_lshrrev_b32_e32 v4, 16, v22
	v_sub_nc_u32_e32 v3, v24, v3
	s_mov_b64 s[8:9], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB36_85:                              ; =>This Inner Loop Header: Depth=1
	s_cmp_eq_u32 s8, 1
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 2
	v_cndmask_b32_e64 v5, v21, v0, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v20, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 4
	v_cndmask_b32_e64 v5, v5, v1, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v19, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 6
	v_cndmask_b32_e64 v5, v5, v2, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s8, 7
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v22, s6
	s_cselect_b32 s6, -1, 0
	s_add_u32 s8, s8, 1
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s8, 8
	v_cndmask_b32_e64 v5, v5, v4, s6
	ds_store_b16 v3, v5
	v_add_nc_u32_e32 v3, 2, v3
	s_cbranch_scc0 .LBB36_85
; %bb.86:
	v_lshlrev_b32_e32 v0, 1, v11
	v_mov_b32_e32 v12, v22
	s_mov_b64 s[16:17], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB36_87:                              ; =>This Inner Loop Header: Depth=1
	ds_load_u16 v1, v0
	s_cmp_eq_u32 s16, 7
	v_lshrrev_b32_e32 v2, 16, v12
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s16, 5
	v_lshrrev_b32_e32 v3, 16, v19
	s_cselect_b32 s7, -1, 0
	s_cmp_eq_u32 s16, 3
	v_lshrrev_b32_e32 v4, 16, v20
	s_cselect_b32 s8, -1, 0
	s_cmp_eq_u32 s16, 1
	v_lshrrev_b32_e32 v5, 16, v21
	s_cselect_b32 s9, -1, 0
	s_cmp_eq_u32 s16, 6
	v_add_nc_u32_e32 v0, 0x108, v0
	s_cselect_b32 s10, -1, 0
	s_cmp_eq_u32 s16, 4
	s_cselect_b32 s11, -1, 0
	s_cmp_eq_u32 s16, 2
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v2, v2, v1, s6
	s_cselect_b32 s12, -1, 0
	s_cmp_eq_u32 s16, 0
	v_cndmask_b32_e64 v3, v3, v1, s7
	s_cselect_b32 s13, -1, 0
	v_cndmask_b32_e64 v4, v4, v1, s8
	v_cndmask_b32_e64 v5, v5, v1, s9
	v_cndmask_b32_e64 v6, v21, v1, s13
	v_cndmask_b32_e64 v7, v20, v1, s12
	v_cndmask_b32_e64 v8, v19, v1, s11
	v_cndmask_b32_e64 v1, v12, v1, s10
	s_add_u32 s16, s16, 1
	v_perm_b32 v21, v5, v6, 0x5040100
	v_perm_b32 v20, v4, v7, 0x5040100
	v_perm_b32 v19, v3, v8, 0x5040100
	v_perm_b32 v12, v2, v1, 0x5040100
	s_addc_u32 s17, s17, 0
	s_cmp_lg_u32 s16, 8
	s_cbranch_scc1 .LBB36_87
; %bb.88:                               ; %_ZN7rocprim14block_exchangeItLj128ELj8ELj1ELj1EE18blocked_to_stripedItEEvRA8_KtRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[6:7], s[20:21], 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_u32 s6, s14, s6
	s_addc_u32 s7, s15, s7
	v_add_co_u32 v0, s6, s6, v18
	v_add_co_ci_u32_e64 v1, null, s7, 0, s6
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB36_90
; %bb.89:
	global_store_b16 v[0:1], v21, off
.LBB36_90:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB36_92
; %bb.91:
	global_store_d16_hi_b16 v[0:1], v21, off offset:256
.LBB36_92:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB36_94
; %bb.93:
	global_store_b16 v[0:1], v20, off offset:512
.LBB36_94:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB36_96
; %bb.95:
	global_store_d16_hi_b16 v[0:1], v20, off offset:768
.LBB36_96:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB36_98
; %bb.97:
	global_store_b16 v[0:1], v19, off offset:1024
.LBB36_98:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB36_100
; %bb.99:
	global_store_d16_hi_b16 v[0:1], v19, off offset:1280
.LBB36_100:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB36_102
; %bb.101:
	global_store_b16 v[0:1], v12, off offset:1536
.LBB36_102:
	s_or_b32 exec_lo, exec_lo, s0
.LBB36_103:                             ; %Flow126
	s_and_saveexec_b32 s0, s18
	s_cbranch_execz .LBB36_105
; %bb.104:                              ; %_ZN7rocprim6detail16block_store_implILb1ELj128ELj8EjtE5storeIPjPtjEEvT1_jbT_T0_RA8_jRA8_tRNS2_12storage_typeE.exit.sink.split.i.i
	s_lshl_b64 s[0:1], s[20:21], 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s14, s0
	s_addc_u32 s1, s15, s1
	global_store_d16_hi_b16 v18, v12, s[0:1] offset:1792
.LBB36_105:                             ; %_ZN7rocprim6detail28block_merge_mergepath_kernelILj128ELj8EN6thrust10device_ptrIjEEPjNS3_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_PKSF_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 38
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_,comdat
.Lfunc_end36:
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_, .Lfunc_end36-_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 7212
; NumSgprs: 30
; NumVgprs: 38
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 38
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
	.protected	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_ ; -- Begin function _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.globl	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
	.p2align	8
	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,@function
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_: ; @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
; %bb.0:
	s_load_b128 s[16:19], s[0:1], 0x20
	s_lshl_b32 s2, s15, 7
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s3, s16, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB37_28
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_lshr_b32 s0, s16, 7
	s_mov_b32 s3, 0
	s_cmp_lg_u32 s15, s0
	v_lshlrev_b32_e32 v1, 1, v0
	s_cselect_b32 s1, -1, 0
	s_lshl_b64 s[12:13], s[2:3], 2
	v_lshlrev_b32_e32 v2, 2, v0
	v_add_nc_u32_e32 v0, s2, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s4, s12
	s_addc_u32 s13, s5, s13
	s_lshl_b64 s[20:21], s[2:3], 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s8, s8, s20
	s_addc_u32 s9, s9, s21
	global_load_u16 v3, v1, s[8:9]
	global_load_b32 v4, v2, s[12:13]
	s_lshr_b32 s0, s17, 7
	s_sub_i32 s9, 0, s17
	s_sub_i32 s8, 0, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, s15, s8
	s_and_b32 s0, s8, s0
	s_lshl_b32 s8, s8, 7
	s_cmp_eq_u32 s0, 0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s12, s0, exec_lo
	s_cselect_b32 s9, s17, s9
	s_add_i32 s9, s9, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s9, s16
	s_cbranch_scc1 .LBB37_4
; %bb.2:
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB37_5
; %bb.3:                                ; %.critedge70.i
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, 0
	s_mov_b32 s3, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
	s_branch .LBB37_6
.LBB37_4:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr1_vgpr2
	s_branch .LBB37_11
.LBB37_5:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB37_6:                               ; %Flow37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB37_10
; %bb.7:
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2
	v_cmpx_gt_u32_e64 s16, v0
	s_cbranch_execz .LBB37_9
; %bb.8:
	v_mov_b32_e32 v1, 0
	s_or_b32 s3, s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB37_9:                               ; %Flow39
	s_or_b32 exec_lo, exec_lo, s2
.LBB37_10:                              ; %Flow38
	s_mov_b32 s2, 0
.LBB37_11:                              ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB37_26
; %bb.12:
	s_min_u32 s2, s9, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s12, s2, s17
	s_min_u32 s13, s8, s2
	s_add_i32 s8, s8, s2
	s_min_u32 s3, s12, s16
	s_cmp_gt_u32 s12, s9
	v_subrev_nc_u32_e32 v0, s8, v0
	s_cselect_b32 s8, -1, 0
	s_and_b32 vcc_lo, exec_lo, s1
	v_cndmask_b32_e64 v1, 0, 1, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, s13, v0
	v_cmp_ne_u32_e64 s1, 1, v1
	s_cbranch_vccz .LBB37_18
; %bb.13:                               ; %.critedge74.i
	v_mov_b32_e32 v2, s2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB37_17
; %bb.14:                               ; %.lr.ph.i83.preheader.i
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v7, s3 :: v_dual_and_b32 v6, s18, v4
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, 0
	s_mov_b32 s1, 0
.LBB37_15:                              ; %.lr.ph.i83.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v7
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[0:1]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v8, s18, v8
	v_cmp_gt_u32_e32 vcc_lo, v6, v8
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v8, v6
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_add_nc_u32_e32 v9, 1, v0
	v_and_b32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 1, v8
	v_dual_cndmask_b32 v7, v0, v7 :: v_dual_cndmask_b32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v7
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB37_15
; %bb.16:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
.LBB37_17:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjNS3_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit89.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	s_mov_b32 s1, 0
	v_lshlrev_b64 v[6:7], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v4, off
	s_branch .LBB37_19
.LBB37_18:
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB37_19:                              ; %Flow34
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB37_25
; %bb.20:
	v_mov_b32_e32 v2, s2
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB37_24
; %bb.21:                               ; %.lr.ph.i.preheader.i
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v7, s3 :: v_dual_and_b32 v6, s18, v4
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, 0
	s_mov_b32 s1, 0
.LBB37_22:                              ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v7
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[0:1]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v8, s18, v8
	v_cmp_gt_u32_e32 vcc_lo, v6, v8
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v8, v6
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_add_nc_u32_e32 v9, 1, v0
	v_and_b32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 1, v8
	v_dual_cndmask_b32 v7, v0, v7 :: v_dual_cndmask_b32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v7
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB37_22
; %bb.23:                               ; %Flow32
	s_or_b32 exec_lo, exec_lo, s1
.LBB37_24:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjNS3_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_ENKUljE_clEj.exit.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_lshlrev_b64 v[1:2], 1, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB37_25:                              ; %Flow35
	s_mov_b32 s3, -1
.LBB37_26:                              ; %Flow40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB37_28
; %bb.27:                               ; %.critedge.sink.split.i
	s_waitcnt vmcnt(1)
	global_store_b16 v[1:2], v3, off
.LBB37_28:                              ; %_ZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjNS3_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SF_T6_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_,comdat
.Lfunc_end37:
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_, .Lfunc_end37-_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjtEEN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1036
; NumSgprs: 24
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,"axG",@progbits,_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,comdat
	.protected	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj ; -- Begin function _ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.globl	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.p2align	8
	.type	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,@function
_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj: ; @_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[16:19], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x1c
	v_lshlrev_b32_e32 v3, 2, v0
	s_mul_i32 s14, s15, 0xc00
	s_mov_b32 s0, -1
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_u32 s15, s3
	s_cbranch_scc0 .LBB38_61
; %bb.1:
	s_mov_b32 s15, 0
	s_mul_i32 s11, s3, 0xfffff400
	v_lshlrev_b32_e32 v15, 2, v0
	s_lshl_b64 s[0:1], s[14:15], 2
	s_add_i32 s11, s11, s2
	s_add_u32 s0, s16, s0
	s_addc_u32 s1, s17, s1
	v_add_co_u32 v1, s0, s0, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s1, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s11, v0
                                        ; implicit-def: $vgpr4
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB38_3
; %bb.2:
	global_load_b32 v4, v[1:2], off
.LBB38_3:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v5, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s11, v5
                                        ; implicit-def: $vgpr5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB38_5
; %bb.4:
	global_load_b32 v5, v[1:2], off offset:1024
.LBB38_5:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v6, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s11, v6
                                        ; implicit-def: $vgpr6
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB38_7
; %bb.6:
	global_load_b32 v6, v[1:2], off offset:2048
.LBB38_7:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v7, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s11, v7
                                        ; implicit-def: $vgpr7
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB38_9
; %bb.8:
	global_load_b32 v7, v[1:2], off offset:3072
.LBB38_9:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v8, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s11, v8
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB38_11
; %bb.10:
	v_add_co_u32 v8, s4, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s4, 0, v2, s4
	global_load_b32 v8, v[8:9], off
.LBB38_11:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v9, 0x500, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s11, v9
                                        ; implicit-def: $vgpr9
	s_and_saveexec_b32 s6, s4
	s_cbranch_execz .LBB38_13
; %bb.12:
	v_add_co_u32 v9, s5, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s5, 0, v2, s5
	global_load_b32 v9, v[9:10], off offset:1024
.LBB38_13:
	s_or_b32 exec_lo, exec_lo, s6
	v_or_b32_e32 v10, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s11, v10
                                        ; implicit-def: $vgpr10
	s_and_saveexec_b32 s7, s5
	s_cbranch_execz .LBB38_15
; %bb.14:
	v_add_co_u32 v10, s6, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s6, 0, v2, s6
	global_load_b32 v10, v[10:11], off offset:2048
.LBB38_15:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v11, 0x700, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s11, v11
                                        ; implicit-def: $vgpr11
	s_and_saveexec_b32 s8, s6
	s_cbranch_execz .LBB38_17
; %bb.16:
	v_add_co_u32 v11, s7, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s7, 0, v2, s7
	global_load_b32 v11, v[11:12], off offset:3072
.LBB38_17:
	s_or_b32 exec_lo, exec_lo, s8
	v_or_b32_e32 v12, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s11, v12
                                        ; implicit-def: $vgpr12
	s_and_saveexec_b32 s9, s7
	s_cbranch_execz .LBB38_19
; %bb.18:
	v_add_co_u32 v12, s8, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s8, 0, v2, s8
	global_load_b32 v12, v[12:13], off
.LBB38_19:
	s_or_b32 exec_lo, exec_lo, s9
	v_or_b32_e32 v13, 0x900, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s11, v13
                                        ; implicit-def: $vgpr13
	s_and_saveexec_b32 s10, s8
	s_cbranch_execz .LBB38_21
; %bb.20:
	v_add_co_u32 v13, s9, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s9, 0, v2, s9
	global_load_b32 v13, v[13:14], off offset:1024
.LBB38_21:
	s_or_b32 exec_lo, exec_lo, s10
	v_or_b32_e32 v14, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s11, v14
                                        ; implicit-def: $vgpr14
	s_and_saveexec_b32 s15, s9
	s_cbranch_execz .LBB38_23
; %bb.22:
	v_add_co_u32 v16, s10, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v17, s10, 0, v2, s10
	global_load_b32 v14, v[16:17], off offset:2048
.LBB38_23:
	s_or_b32 exec_lo, exec_lo, s15
	v_or_b32_e32 v16, 0xb00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s11, v16
                                        ; implicit-def: $vgpr16
	s_and_saveexec_b32 s15, s10
	s_cbranch_execz .LBB38_25
; %bb.24:
	v_add_co_u32 v1, s11, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s11, 0, v2, s11
	global_load_b32 v16, v[1:2], off offset:3072
.LBB38_25:                              ; %_ZN7rocprim25block_load_direct_stripedILj256EN6thrust10device_ptrIjEEjLj12EEEvjT0_RAT2__T1_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s15, exec_lo
	v_cmpx_gt_u32_e32 0x200, v0
	s_cbranch_execz .LBB38_28
; %bb.26:                               ; %.lr.ph.i.i20.i.preheader
	v_or_b32_e32 v1, 0xffffff00, v0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s11, 0
.LBB38_27:                              ; %.lr.ph.i.i20.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s20, 0x100, v1
	s_xor_b32 s20, s20, -1
	ds_store_b32 v15, v2
	v_add_nc_u32_e32 v15, 0x400, v15
	s_and_b32 s20, exec_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s11, s20, s11
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB38_27
.LBB38_28:                              ; %Flow92
	s_or_b32 exec_lo, exec_lo, s15
	s_cmp_gt_u32 s13, s12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_cselect_b32 s11, -1, 0
	s_cmp_le_u32 s13, s12
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB38_55
; %bb.29:                               ; %.lr.ph.i17.i.preheader
	v_dual_mov_b32 v2, 1 :: v_dual_and_b32 v1, 3, v0
	s_sub_i32 s15, s13, s12
	s_mov_b32 s20, s12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 2, v1
.LBB38_30:                              ; %.lr.ph.i17.i
                                        ; =>This Inner Loop Header: Depth=1
	s_min_u32 s21, s15, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s21, -1, s21
	s_not_b32 s21, s21
	s_and_saveexec_b32 s22, vcc_lo
	s_cbranch_execz .LBB38_32
; %bb.31:                               ;   in Loop: Header=BB38_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB38_32:                              ;   in Loop: Header=BB38_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s0
	s_cbranch_execz .LBB38_34
; %bb.33:                               ;   in Loop: Header=BB38_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB38_34:                              ;   in Loop: Header=BB38_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s1
	s_cbranch_execz .LBB38_36
; %bb.35:                               ;   in Loop: Header=BB38_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB38_36:                              ;   in Loop: Header=BB38_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s2
	s_cbranch_execz .LBB38_38
; %bb.37:                               ;   in Loop: Header=BB38_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB38_38:                              ;   in Loop: Header=BB38_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s3
	s_cbranch_execz .LBB38_40
; %bb.39:                               ;   in Loop: Header=BB38_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB38_40:                              ;   in Loop: Header=BB38_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s4
	s_cbranch_execz .LBB38_42
; %bb.41:                               ;   in Loop: Header=BB38_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB38_42:                              ;   in Loop: Header=BB38_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s5
	s_cbranch_execz .LBB38_44
; %bb.43:                               ;   in Loop: Header=BB38_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB38_44:                              ;   in Loop: Header=BB38_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s6
	s_cbranch_execz .LBB38_46
; %bb.45:                               ;   in Loop: Header=BB38_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB38_46:                              ;   in Loop: Header=BB38_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s7
	s_cbranch_execz .LBB38_48
; %bb.47:                               ;   in Loop: Header=BB38_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB38_48:                              ;   in Loop: Header=BB38_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s8
	s_cbranch_execz .LBB38_50
; %bb.49:                               ;   in Loop: Header=BB38_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB38_50:                              ;   in Loop: Header=BB38_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s9
	s_cbranch_execz .LBB38_52
; %bb.51:                               ;   in Loop: Header=BB38_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB38_52:                              ;   in Loop: Header=BB38_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s10
	s_cbranch_execz .LBB38_54
; %bb.53:                               ;   in Loop: Header=BB38_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB38_54:                              ; %_ZN7rocprim6detail26onesweep_histograms_helperIjLj256ELj12ELj4ELb0ENS_19identity_decomposerEE21count_digits_at_placeILb0EEEvjjRA12_KjjS2_jjjRNS3_12storage_typeE.exit.i.i
                                        ;   in Loop: Header=BB38_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v1, 0x100, v1
	s_add_i32 s20, s20, 4
	s_add_i32 s15, s15, -4
	s_cmp_ge_u32 s20, s13
	s_cbranch_scc0 .LBB38_30
.LBB38_55:                              ; %._crit_edge.i15.i
	s_and_not1_b32 vcc_lo, exec_lo, s11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB38_60
; %bb.56:                               ; %.preheader50.lr.ph.i.i
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	v_dual_mov_b32 v1, v0 :: v_dual_lshlrev_b32 v4, 4, v0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s1, s12
.LBB38_57:                              ; %.preheader50.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB38_59
; %bb.58:                               ; %.preheader.lr.ph.i16.i
                                        ;   in Loop: Header=BB38_57 Depth=1
	ds_load_2addr_b32 v[5:6], v4 offset1:1
	ds_load_2addr_b32 v[7:8], v4 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v9, v6, v5
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v7, v9, v7, v8
	v_add_co_u32 v5, s0, s18, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, s19, v6, s0
	global_atomic_add_u32 v[5:6], v7, off
.LBB38_59:                              ;   in Loop: Header=BB38_57 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v1, 16, v1
	v_add_nc_u32_e32 v4, 0x100, v4
	s_add_i32 s1, s1, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s1, s13
	s_cbranch_scc1 .LBB38_57
.LBB38_60:                              ; %Flow88
	s_mov_b32 s0, 0
.LBB38_61:                              ; %Flow99
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB38_73
; %bb.62:
	s_mov_b32 s15, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[14:15], 2
	s_add_u32 s0, s16, s0
	s_addc_u32 s1, s17, s1
	v_add_co_u32 v6, s2, s0, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, null, s1, 0, s2
	s_clause 0x3
	global_load_b32 v1, v3, s[0:1]
	global_load_b32 v2, v3, s[0:1] offset:1024
	global_load_b32 v4, v3, s[0:1] offset:2048
	global_load_b32 v5, v3, s[0:1] offset:3072
	v_add_co_u32 v9, vcc_lo, 0x1000, v6
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v7, vcc_lo
	v_add_co_u32 v12, vcc_lo, v6, 0x2000
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v7, vcc_lo
	v_add_co_u32 v14, vcc_lo, 0x2000, v6
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v7, vcc_lo
	s_clause 0x7
	global_load_b32 v6, v[12:13], off
	global_load_b32 v7, v[9:10], off offset:1024
	global_load_b32 v8, v[9:10], off offset:2048
	global_load_b32 v9, v[9:10], off offset:3072
	global_load_b32 v10, v[14:15], off offset:1024
	global_load_b32 v11, v[14:15], off offset:2048
	global_load_b32 v12, v[12:13], off offset:-4096
	global_load_b32 v13, v[14:15], off offset:3072
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 0x200, v0
	s_cbranch_execz .LBB38_65
; %bb.63:                               ; %.lr.ph.i.i.i.preheader
	v_or_b32_e32 v14, 0xffffff00, v0
	v_mov_b32_e32 v15, 0
.LBB38_64:                              ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v14, s1, 0x100, v14
	s_xor_b32 s1, s1, -1
	ds_store_b32 v3, v15
	v_add_nc_u32_e32 v3, 0x400, v3
	s_and_b32 s1, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s15, s1, s15
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB38_64
.LBB38_65:                              ; %Flow98
	s_or_b32 exec_lo, exec_lo, s0
	s_cmp_gt_u32 s13, s12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_cselect_b32 s0, -1, 0
	s_cmp_le_u32 s13, s12
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB38_68
; %bb.66:                               ; %.lr.ph.i.i.preheader
	v_dual_mov_b32 v14, 1 :: v_dual_and_b32 v3, 3, v0
	s_sub_i32 s1, s13, s12
	s_mov_b32 s2, s12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 2, v3
.LBB38_67:                              ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_min_u32 s3, s1, 4
	v_lshrrev_b32_e32 v15, s2, v1
	v_lshrrev_b32_e32 v16, s2, v2
	s_lshl_b32 s3, -1, s3
	v_lshrrev_b32_e32 v17, s2, v4
	v_lshrrev_b32_e32 v18, s2, v5
	s_not_b32 s3, s3
	v_lshrrev_b32_e32 v19, s2, v12
	v_lshrrev_b32_e32 v20, s2, v7
	v_lshrrev_b32_e32 v21, s2, v8
	v_lshrrev_b32_e32 v22, s2, v9
	v_lshrrev_b32_e32 v23, s2, v6
	v_lshrrev_b32_e32 v24, s2, v10
	v_lshrrev_b32_e32 v25, s2, v11
	v_lshrrev_b32_e32 v26, s2, v13
	v_and_b32_e32 v15, s3, v15
	v_and_b32_e32 v16, s3, v16
	v_and_b32_e32 v17, s3, v17
	v_and_b32_e32 v18, s3, v18
	v_and_b32_e32 v19, s3, v19
	v_and_b32_e32 v20, s3, v20
	v_and_b32_e32 v21, s3, v21
	v_and_b32_e32 v22, s3, v22
	v_and_b32_e32 v23, s3, v23
	v_and_b32_e32 v24, s3, v24
	v_and_b32_e32 v25, s3, v25
	v_and_b32_e32 v26, s3, v26
	v_lshl_add_u32 v15, v15, 4, v3
	v_lshl_add_u32 v16, v16, 4, v3
	v_lshl_add_u32 v17, v17, 4, v3
	v_lshl_add_u32 v18, v18, 4, v3
	v_lshl_add_u32 v19, v19, 4, v3
	v_lshl_add_u32 v20, v20, 4, v3
	v_lshl_add_u32 v21, v21, 4, v3
	v_lshl_add_u32 v22, v22, 4, v3
	v_lshl_add_u32 v23, v23, 4, v3
	v_lshl_add_u32 v24, v24, 4, v3
	v_lshl_add_u32 v25, v25, 4, v3
	v_lshl_add_u32 v26, v26, 4, v3
	ds_add_u32 v15, v14
	ds_add_u32 v16, v14
	ds_add_u32 v17, v14
	ds_add_u32 v18, v14
	ds_add_u32 v19, v14
	ds_add_u32 v20, v14
	ds_add_u32 v21, v14
	ds_add_u32 v22, v14
	ds_add_u32 v23, v14
	ds_add_u32 v24, v14
	ds_add_u32 v25, v14
	ds_add_u32 v26, v14
	v_add_nc_u32_e32 v3, 0x100, v3
	s_add_i32 s2, s2, 4
	s_add_i32 s1, s1, -4
	s_cmp_ge_u32 s2, s13
	s_cbranch_scc0 .LBB38_67
.LBB38_68:                              ; %._crit_edge.i.i
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB38_73
; %bb.69:                               ; %.preheader49.lr.ph.i.i
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v2, 4, v0
.LBB38_70:                              ; %.preheader49.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB38_72
; %bb.71:                               ; %.preheader.lr.ph.i.i
                                        ;   in Loop: Header=BB38_70 Depth=1
	ds_load_2addr_b32 v[3:4], v2 offset1:1
	ds_load_2addr_b32 v[5:6], v2 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v7, v4, v3
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v5, v7, v5, v6
	v_add_co_u32 v3, s0, s18, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s19, v4, s0
	global_atomic_add_u32 v[3:4], v5, off
.LBB38_72:                              ;   in Loop: Header=BB38_70 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v0, 16, v0
	v_add_nc_u32_e32 v2, 0x100, v2
	s_add_i32 s12, s12, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s12, s13
	s_cbranch_scc0 .LBB38_70
.LBB38_73:                              ; %_ZN7rocprim6detail19onesweep_histogramsILj256ELj12ELj4ELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT3_PT4_S7_S7_T5_jj.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 27
		.amdhsa_next_free_sgpr 23
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,"axG",@progbits,_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,comdat
.Lfunc_end38:
	.size	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj, .Lfunc_end38-_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2440
; NumSgprs: 25
; NumVgprs: 27
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 25
; NumVGPRsForWavesPerEU: 27
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_,"axG",@progbits,_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_,comdat
	.protected	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_ ; -- Begin function _ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_
	.globl	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_
	.p2align	8
	.type	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_,@function
_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_: ; @_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	s_lshl_b32 s2, s15, 4
	s_mov_b32 s3, 0
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_lshl_b64 s[2:3], s[2:3], 2
	v_lshlrev_b32_e32 v1, 2, v0
                                        ; implicit-def: $vgpr3
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s0, s2
	s_addc_u32 s3, s1, s3
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB39_2
; %bb.1:
	global_load_b32 v3, v1, s[2:3]
.LBB39_2:                               ; %_ZN7rocprim25block_load_direct_blockedIPjjLj1EEEvjT_RAT1__T0_j.exit.i
	s_or_b32 exec_lo, exec_lo, s0
	v_mbcnt_lo_u32_b32 v2, -1, 0
	s_waitcnt vmcnt(0)
	v_mov_b32_dpp v5, v3 row_shr:1 row_mask:0xf bank_mask:0xf
	v_or_b32_e32 v6, 31, v0
	s_mov_b32 s1, exec_lo
	v_and_b32_e32 v4, 15, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 0, v4
	v_cndmask_b32_e64 v5, 0, v5, s0
	v_cmp_lt_u32_e64 s0, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v5, v3
	v_mov_b32_dpp v5, v3 row_shr:2 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, 0, v5, s0
	v_cmp_lt_u32_e64 s0, 3, v4
	v_add_nc_u32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v5, v3 row_shr:4 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v5, 0, v5, s0
	v_cmp_lt_u32_e64 s0, 7, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v3, v5
	v_mov_b32_dpp v5, v3 row_shr:8 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, 0, v5, s0
	v_bfe_i32 v5, v2, 4, 1
	v_add_nc_u32_e32 v3, v3, v4
	ds_swizzle_b32 v4, v3 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v5, v5, v4
	v_lshrrev_b32_e32 v4, 5, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v3, v5
	v_cmpx_eq_u32_e64 v6, v0
	s_cbranch_execz .LBB39_4
; %bb.3:
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b32_e32 v5, 2, v4
	ds_store_b32 v5, v3
.LBB39_4:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 8, v0
	s_cbranch_execz .LBB39_6
; %bb.5:
	ds_load_b32 v5, v1
	v_and_b32_e32 v6, 7, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 0, v6
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v7, v5 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v7, 0, v7, s0
	v_cmp_lt_u32_e64 s0, 1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v7, v5
	v_mov_b32_dpp v7, v5 row_shr:2 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, 0, v7, s0
	v_cmp_lt_u32_e64 s0, 3, v6
	v_add_nc_u32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v7, v5 row_shr:4 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v6, 0, v7, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v5, v6
	ds_store_b32 v1, v5
.LBB39_6:                               ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj256ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj256EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_lt_u32_e64 s0, 31, v0
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB39_8
; %bb.7:
	v_lshl_add_u32 v0, v4, 2, -4
	ds_load_b32 v0, v0
.LBB39_8:                               ; %_ZN7rocprim10block_scanIjLj256ELNS_20block_scan_algorithmE0ELj1ELj1EE14exclusive_scanILj1ENS_4plusIjEEEEvRAT__jS7_jT0_.exit.i
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v4, -1, v2
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s0, 0, v4
	v_cndmask_b32_e64 v4, v4, v2, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 2, v4
	ds_bpermute_b32 v3, v4, v3
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB39_10
; %bb.9:
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v0, v3, v0, vcc_lo
	global_store_b32 v1, v0, s[2:3]
.LBB39_10:                              ; %_ZN7rocprim6detail24onesweep_scan_histogramsILj256ELj4EjEEvPT1_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_
		.amdhsa_group_segment_fixed_size 32
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_,"axG",@progbits,_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_,comdat
.Lfunc_end39:
	.size	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_, .Lfunc_end39-_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEEjEEvPT0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 596
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 32 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_,comdat
	.protected	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_ ; -- Begin function _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_
	.globl	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_
	.p2align	8
	.type	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_,@function
_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_: ; @_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[16:17], s[0:1], 0x10
	s_mov_b32 s19, 0
	s_lshl_b32 s18, s15, 12
	v_lshlrev_b32_e32 v11, 1, v0
	s_lshl_b64 s[20:21], s[18:19], 1
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_add_u32 s0, s4, s20
	s_addc_u32 s1, s5, s21
	v_add_co_u32 v9, s0, s0, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, null, s1, 0, s0
	s_cmp_lg_u32 s15, s2
	s_mov_b32 s0, -1
	s_cbranch_scc0 .LBB40_2
; %bb.1:
	v_add_co_u32 v1, vcc_lo, 0x1000, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v10, vcc_lo
	s_clause 0xf
	global_load_u16 v4, v[9:10], off
	global_load_u16 v5, v[9:10], off offset:512
	global_load_u16 v6, v[9:10], off offset:1024
	global_load_u16 v7, v[9:10], off offset:1536
	global_load_u16 v8, v[9:10], off offset:2048
	global_load_u16 v12, v[9:10], off offset:2560
	global_load_u16 v13, v[9:10], off offset:3072
	global_load_u16 v14, v[9:10], off offset:3584
	global_load_u16 v15, v[1:2], off
	global_load_u16 v16, v[1:2], off offset:512
	global_load_u16 v17, v[1:2], off offset:1024
	global_load_u16 v18, v[1:2], off offset:1536
	global_load_u16 v19, v[1:2], off offset:2048
	global_load_u16 v20, v[1:2], off offset:2560
	global_load_u16 v21, v[1:2], off offset:3072
	global_load_u16 v1, v[1:2], off offset:3584
	s_add_u32 s2, s16, s20
	s_addc_u32 s3, s17, s21
	v_add_co_u32 v2, s1, s2, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v3, null, s3, 0, s1
	s_mov_b32 s0, 0
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	s_mov_b32 s19, -1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(15)
	global_store_b16 v11, v4, s[2:3]
	s_waitcnt vmcnt(14)
	global_store_b16 v11, v5, s[2:3] offset:512
	s_waitcnt vmcnt(13)
	global_store_b16 v11, v6, s[2:3] offset:1024
	s_waitcnt vmcnt(12)
	global_store_b16 v11, v7, s[2:3] offset:1536
	s_waitcnt vmcnt(11)
	global_store_b16 v11, v8, s[2:3] offset:2048
	s_waitcnt vmcnt(10)
	global_store_b16 v11, v12, s[2:3] offset:2560
	s_waitcnt vmcnt(9)
	global_store_b16 v11, v13, s[2:3] offset:3072
	s_waitcnt vmcnt(8)
	global_store_b16 v11, v14, s[2:3] offset:3584
	s_waitcnt vmcnt(7)
	global_store_b16 v[2:3], v15, off
	s_waitcnt vmcnt(6)
	global_store_b16 v[2:3], v16, off offset:512
	s_waitcnt vmcnt(5)
	global_store_b16 v[2:3], v17, off offset:1024
	s_waitcnt vmcnt(4)
	global_store_b16 v[2:3], v18, off offset:1536
	s_waitcnt vmcnt(3)
	global_store_b16 v[2:3], v19, off offset:2048
	s_waitcnt vmcnt(2)
	global_store_b16 v[2:3], v20, off offset:2560
	s_waitcnt vmcnt(1)
	global_store_b16 v[2:3], v21, off offset:3072
	s_branch .LBB40_3
.LBB40_2:
                                        ; implicit-def: $vgpr1
.LBB40_3:                               ; %Flow
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB40_69
; %bb.4:
	s_sub_i32 s15, s6, s18
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s15, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB40_6
; %bb.5:
	global_load_d16_b16 v1, v[9:10], off
.LBB40_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v12, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s15, v12
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB40_8
; %bb.7:
	global_load_d16_hi_b16 v1, v[9:10], off offset:512
.LBB40_8:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v12, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s15, v12
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB40_10
; %bb.9:
	global_load_d16_b16 v2, v[9:10], off offset:1024
.LBB40_10:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v12, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s15, v12
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB40_12
; %bb.11:
	global_load_d16_hi_b16 v2, v[9:10], off offset:1536
.LBB40_12:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v12, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s15, v12
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB40_14
; %bb.13:
	global_load_d16_b16 v3, v[9:10], off offset:2048
.LBB40_14:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v12, 0x500, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s15, v12
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB40_16
; %bb.15:
	global_load_d16_hi_b16 v3, v[9:10], off offset:2560
.LBB40_16:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v12, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s15, v12
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB40_18
; %bb.17:
	global_load_d16_b16 v4, v[9:10], off offset:3072
.LBB40_18:
	s_or_b32 exec_lo, exec_lo, s6
	v_or_b32_e32 v12, 0x700, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s15, v12
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB40_20
; %bb.19:
	global_load_d16_hi_b16 v4, v[9:10], off offset:3584
.LBB40_20:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v12, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s15, v12
	s_and_saveexec_b32 s9, s7
	s_cbranch_execz .LBB40_22
; %bb.21:
	v_add_co_u32 v12, s8, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s8, 0, v10, s8
	global_load_d16_b16 v5, v[12:13], off
.LBB40_22:
	s_or_b32 exec_lo, exec_lo, s9
	v_or_b32_e32 v12, 0x900, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s15, v12
	s_and_saveexec_b32 s10, s8
	s_cbranch_execz .LBB40_24
; %bb.23:
	v_add_co_u32 v12, s9, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s9, 0, v10, s9
	global_load_d16_hi_b16 v5, v[12:13], off offset:512
.LBB40_24:
	s_or_b32 exec_lo, exec_lo, s10
	v_or_b32_e32 v12, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s15, v12
	s_and_saveexec_b32 s11, s9
	s_cbranch_execz .LBB40_26
; %bb.25:
	v_add_co_u32 v12, s10, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s10, 0, v10, s10
	global_load_d16_b16 v6, v[12:13], off offset:1024
.LBB40_26:
	s_or_b32 exec_lo, exec_lo, s11
	v_or_b32_e32 v12, 0xb00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s15, v12
	s_and_saveexec_b32 s12, s10
	s_cbranch_execz .LBB40_28
; %bb.27:
	v_add_co_u32 v12, s11, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s11, 0, v10, s11
	global_load_d16_hi_b16 v6, v[12:13], off offset:1536
.LBB40_28:
	s_or_b32 exec_lo, exec_lo, s12
	v_or_b32_e32 v12, 0xc00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s11, s15, v12
	s_and_saveexec_b32 s13, s11
	s_cbranch_execz .LBB40_30
; %bb.29:
	v_add_co_u32 v12, s12, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s12, 0, v10, s12
	global_load_d16_b16 v7, v[12:13], off offset:2048
.LBB40_30:
	s_or_b32 exec_lo, exec_lo, s13
	v_or_b32_e32 v12, 0xd00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s15, v12
	s_and_saveexec_b32 s14, s12
	s_cbranch_execz .LBB40_32
; %bb.31:
	v_add_co_u32 v12, s13, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s13, 0, v10, s13
	global_load_d16_hi_b16 v7, v[12:13], off offset:2560
.LBB40_32:
	s_or_b32 exec_lo, exec_lo, s14
	v_or_b32_e32 v12, 0xe00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s13, s15, v12
	s_and_saveexec_b32 s18, s13
	s_cbranch_execz .LBB40_34
; %bb.33:
	v_add_co_u32 v12, s14, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s14, 0, v10, s14
	global_load_d16_b16 v8, v[12:13], off offset:3072
.LBB40_34:
	s_or_b32 exec_lo, exec_lo, s18
	v_or_b32_e32 v0, 0xf00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s14, s15, v0
	s_and_saveexec_b32 s18, s14
	s_cbranch_execz .LBB40_36
; %bb.35:
	v_add_co_u32 v9, s15, 0x1000, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s15, 0, v10, s15
	global_load_d16_hi_b16 v8, v[9:10], off offset:3584
.LBB40_36:                              ; %_ZN7rocprim25block_load_direct_stripedILj256EN6thrust10device_ptrItEEtLj16EEEvjT0_RAT2__T1_j.exit.i
	s_or_b32 exec_lo, exec_lo, s18
	s_add_u32 s15, s16, s20
	s_addc_u32 s18, s17, s21
	v_add_co_u32 v9, s15, s15, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, null, s18, 0, s15
	s_and_saveexec_b32 s15, vcc_lo
	s_cbranch_execz .LBB40_38
; %bb.37:
	s_waitcnt vmcnt(0)
	global_store_b16 v[9:10], v1, off
.LBB40_38:
	s_or_b32 exec_lo, exec_lo, s15
	s_and_saveexec_b32 s15, s0
	s_cbranch_execz .LBB40_40
; %bb.39:
	s_waitcnt vmcnt(0)
	global_store_d16_hi_b16 v[9:10], v1, off offset:512
.LBB40_40:
	s_or_b32 exec_lo, exec_lo, s15
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB40_42
; %bb.41:
	s_waitcnt vmcnt(0)
	global_store_b16 v[9:10], v2, off offset:1024
.LBB40_42:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	v_bfi_b32 v0, 0xffff, v2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v0, v0, v2, s2
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB40_44
; %bb.43:
	global_store_d16_hi_b16 v[9:10], v0, off offset:1536
.LBB40_44:
	s_or_b32 exec_lo, exec_lo, s0
	v_cndmask_b32_e64 v0, v3, v3, s3
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB40_46
; %bb.45:
	global_store_b16 v[9:10], v0, off offset:2048
.LBB40_46:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v0, 0xffff, v0, v3
	v_cndmask_b32_e64 v0, v0, v3, s4
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB40_48
; %bb.47:
	global_store_d16_hi_b16 v[9:10], v0, off offset:2560
.LBB40_48:
	s_or_b32 exec_lo, exec_lo, s0
	v_cndmask_b32_e64 v0, v4, v4, s5
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB40_50
; %bb.49:
	global_store_b16 v[9:10], v0, off offset:3072
.LBB40_50:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v0, 0xffff, v0, v4
	v_cndmask_b32_e64 v0, v0, v4, s6
	s_and_saveexec_b32 s0, s6
	s_cbranch_execz .LBB40_52
; %bb.51:
	global_store_d16_hi_b16 v[9:10], v0, off offset:3584
.LBB40_52:
	s_or_b32 exec_lo, exec_lo, s0
	v_cndmask_b32_e64 v0, v5, v5, s7
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB40_54
; %bb.53:
	v_add_co_u32 v1, vcc_lo, 0x1000, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v10, vcc_lo
	global_store_b16 v[1:2], v0, off
.LBB40_54:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v0, 0xffff, v0, v5
	v_cndmask_b32_e64 v0, v0, v5, s8
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB40_56
; %bb.55:
	v_add_co_u32 v1, vcc_lo, 0x1000, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v10, vcc_lo
	global_store_d16_hi_b16 v[1:2], v0, off offset:512
.LBB40_56:
	s_or_b32 exec_lo, exec_lo, s0
	v_cndmask_b32_e64 v0, v6, v6, s9
	s_and_saveexec_b32 s0, s9
	s_cbranch_execz .LBB40_58
; %bb.57:
	v_add_co_u32 v1, vcc_lo, 0x1000, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v10, vcc_lo
	global_store_b16 v[1:2], v0, off offset:1024
.LBB40_58:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v0, 0xffff, v0, v6
	v_cndmask_b32_e64 v0, v0, v6, s10
	s_and_saveexec_b32 s0, s10
	s_cbranch_execz .LBB40_60
; %bb.59:
	v_add_co_u32 v1, vcc_lo, 0x1000, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v10, vcc_lo
	global_store_d16_hi_b16 v[1:2], v0, off offset:1536
.LBB40_60:
	s_or_b32 exec_lo, exec_lo, s0
	v_cndmask_b32_e64 v0, v7, v7, s11
	s_and_saveexec_b32 s0, s11
	s_cbranch_execz .LBB40_62
; %bb.61:
	v_add_co_u32 v1, vcc_lo, 0x1000, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v10, vcc_lo
	global_store_b16 v[1:2], v0, off offset:2048
.LBB40_62:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v0, 0xffff, v0, v7
	v_cndmask_b32_e64 v0, v0, v7, s12
	s_and_saveexec_b32 s0, s12
	s_cbranch_execz .LBB40_64
; %bb.63:
	v_add_co_u32 v1, vcc_lo, 0x1000, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v10, vcc_lo
	global_store_d16_hi_b16 v[1:2], v0, off offset:2560
.LBB40_64:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s13
	s_cbranch_execz .LBB40_66
; %bb.65:
	v_add_co_u32 v0, vcc_lo, 0x1000, v9
	v_cndmask_b32_e64 v2, v8, v8, s13
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v10, vcc_lo
	global_store_b16 v[0:1], v2, off offset:3072
.LBB40_66:
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s0, s14
; %bb.67:
	v_cndmask_b32_e64 v0, v8, v8, s14
	s_or_b32 s19, s19, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_lshrrev_b32_e32 v1, 16, v0
; %bb.68:                               ; %Flow13
	s_or_b32 exec_lo, exec_lo, s0
.LBB40_69:                              ; %Flow12
	s_and_saveexec_b32 s0, s19
	s_cbranch_execz .LBB40_71
; %bb.70:                               ; %_ZN7rocprim26block_store_direct_stripedILj256EPttLj16EEEvjT0_RAT2__T1_j.exit.sink.split.i
	s_add_u32 s0, s16, s20
	s_addc_u32 s1, s17, s21
	v_add_co_u32 v0, s0, s0, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v3, null, s1, 0, s0
	v_add_co_u32 v2, vcc_lo, 0x1000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b16 v[2:3], v1, off offset:3584
.LBB40_71:                              ; %_ZN7rocprim6detail21transform_kernel_implILj256ELj16EtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT2_mT3_T4_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_,"axG",@progbits,_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_,comdat
.Lfunc_end40:
	.size	_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_, .Lfunc_end40-_ZN7rocprim6detail16transform_kernelINS0_24wrapped_transform_configINS_14default_configEtEEtN6thrust10device_ptrItEEPtNS_8identityItEEEEvT1_mT2_T3_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2068
; NumSgprs: 24
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.protected	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj ; -- Begin function _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.globl	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	8
	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj: ; @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
; %bb.0:
	s_clause 0x3
	s_load_b128 s[80:83], s[0:1], 0x44
	s_load_b256 s[68:75], s[0:1], 0x0
	s_load_b128 s[76:79], s[0:1], 0x28
	s_load_b64 s[86:87], s[0:1], 0x38
	v_mul_u32_u24_e32 v32, 31, v0
	s_mul_i32 s84, s15, 0x3e00
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_u32 s15, s82
	s_cbranch_scc0 .LBB41_337
; %bb.1:
	s_load_b32 s4, s[0:1], 0x20
	s_mov_b32 s85, 0
	s_mul_i32 s66, s82, 0xffffc200
	v_dual_mov_b32 v4, -1 :: v_dual_lshlrev_b32 v1, 2, v32
	s_lshl_b64 s[2:3], s[84:85], 2
	v_mov_b32_e32 v3, -1
	s_waitcnt lgkmcnt(0)
	s_add_i32 s66, s66, s4
	s_add_u32 s4, s68, s2
	s_addc_u32 s3, s69, s3
	v_add_co_u32 v1, s4, s4, v1
	v_cmp_gt_u32_e64 s2, s66, v32
	v_add_co_ci_u32_e64 v2, null, s3, 0, s4
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB41_3
; %bb.2:
	global_load_b32 v4, v[1:2], off
.LBB41_3:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v5, 1, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s66, v5
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB41_5
; %bb.4:
	global_load_b32 v3, v[1:2], off offset:4
.LBB41_5:
	s_or_b32 exec_lo, exec_lo, s4
	v_dual_mov_b32 v5, -1 :: v_dual_add_nc_u32 v6, 2, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e64 s4, s66, v6
	v_mov_b32_e32 v6, -1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB41_7
; %bb.6:
	global_load_b32 v6, v[1:2], off offset:8
.LBB41_7:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v7, 3, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s66, v7
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB41_9
; %bb.8:
	global_load_b32 v5, v[1:2], off offset:12
.LBB41_9:
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v42, -1 :: v_dual_add_nc_u32 v7, 4, v32
	v_mov_b32_e32 v41, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s66, v7
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB41_11
; %bb.10:
	global_load_b32 v42, v[1:2], off offset:16
.LBB41_11:
	s_or_b32 exec_lo, exec_lo, s7
	v_add_nc_u32_e32 v7, 5, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s66, v7
	s_and_saveexec_b32 s8, s7
	s_cbranch_execz .LBB41_13
; %bb.12:
	global_load_b32 v41, v[1:2], off offset:20
.LBB41_13:
	s_or_b32 exec_lo, exec_lo, s8
	v_dual_mov_b32 v44, -1 :: v_dual_add_nc_u32 v7, 6, v32
	v_mov_b32_e32 v43, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s66, v7
	s_and_saveexec_b32 s9, s8
	s_cbranch_execz .LBB41_15
; %bb.14:
	global_load_b32 v44, v[1:2], off offset:24
.LBB41_15:
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v7, 7, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s66, v7
	s_and_saveexec_b32 s10, s9
	s_cbranch_execz .LBB41_17
; %bb.16:
	global_load_b32 v43, v[1:2], off offset:28
.LBB41_17:
	s_or_b32 exec_lo, exec_lo, s10
	v_dual_mov_b32 v46, -1 :: v_dual_add_nc_u32 v7, 8, v32
	v_mov_b32_e32 v45, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s66, v7
	s_and_saveexec_b32 s11, s10
	s_cbranch_execz .LBB41_19
; %bb.18:
	global_load_b32 v46, v[1:2], off offset:32
.LBB41_19:
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v7, 9, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s11, s66, v7
	s_and_saveexec_b32 s12, s11
	s_cbranch_execz .LBB41_21
; %bb.20:
	global_load_b32 v45, v[1:2], off offset:36
.LBB41_21:
	s_or_b32 exec_lo, exec_lo, s12
	v_dual_mov_b32 v48, -1 :: v_dual_add_nc_u32 v7, 10, v32
	v_mov_b32_e32 v47, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s66, v7
	s_and_saveexec_b32 s13, s12
	s_cbranch_execz .LBB41_23
; %bb.22:
	global_load_b32 v48, v[1:2], off offset:40
.LBB41_23:
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v7, 11, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s13, s66, v7
	s_and_saveexec_b32 s14, s13
	s_cbranch_execz .LBB41_25
; %bb.24:
	global_load_b32 v47, v[1:2], off offset:44
.LBB41_25:
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v50, -1 :: v_dual_add_nc_u32 v7, 12, v32
	v_mov_b32_e32 v49, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s14, s66, v7
	s_and_saveexec_b32 s16, s14
	s_cbranch_execz .LBB41_27
; %bb.26:
	global_load_b32 v50, v[1:2], off offset:48
.LBB41_27:
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v7, 13, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s16, s66, v7
	s_and_saveexec_b32 s17, s16
	s_cbranch_execz .LBB41_29
; %bb.28:
	global_load_b32 v49, v[1:2], off offset:52
.LBB41_29:
	s_or_b32 exec_lo, exec_lo, s17
	v_dual_mov_b32 v52, -1 :: v_dual_add_nc_u32 v7, 14, v32
	v_mov_b32_e32 v51, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s17, s66, v7
	s_and_saveexec_b32 s18, s17
	s_cbranch_execz .LBB41_31
; %bb.30:
	global_load_b32 v52, v[1:2], off offset:56
.LBB41_31:
	s_or_b32 exec_lo, exec_lo, s18
	v_add_nc_u32_e32 v7, 15, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s18, s66, v7
	s_and_saveexec_b32 s19, s18
	s_cbranch_execz .LBB41_33
; %bb.32:
	global_load_b32 v51, v[1:2], off offset:60
.LBB41_33:
	s_or_b32 exec_lo, exec_lo, s19
	v_dual_mov_b32 v54, -1 :: v_dual_add_nc_u32 v7, 16, v32
	v_mov_b32_e32 v53, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s19, s66, v7
	s_and_saveexec_b32 s20, s19
	s_cbranch_execz .LBB41_35
; %bb.34:
	global_load_b32 v54, v[1:2], off offset:64
.LBB41_35:
	s_or_b32 exec_lo, exec_lo, s20
	v_add_nc_u32_e32 v7, 17, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s20, s66, v7
	s_and_saveexec_b32 s21, s20
	s_cbranch_execz .LBB41_37
; %bb.36:
	global_load_b32 v53, v[1:2], off offset:68
.LBB41_37:
	s_or_b32 exec_lo, exec_lo, s21
	v_dual_mov_b32 v56, -1 :: v_dual_add_nc_u32 v7, 18, v32
	v_mov_b32_e32 v55, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s21, s66, v7
	s_and_saveexec_b32 s22, s21
	s_cbranch_execz .LBB41_39
; %bb.38:
	global_load_b32 v56, v[1:2], off offset:72
.LBB41_39:
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v7, 19, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s22, s66, v7
	s_and_saveexec_b32 s23, s22
	s_cbranch_execz .LBB41_41
; %bb.40:
	global_load_b32 v55, v[1:2], off offset:76
.LBB41_41:
	s_or_b32 exec_lo, exec_lo, s23
	v_dual_mov_b32 v58, -1 :: v_dual_add_nc_u32 v7, 20, v32
	v_mov_b32_e32 v57, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s23, s66, v7
	s_and_saveexec_b32 s24, s23
	s_cbranch_execz .LBB41_43
; %bb.42:
	global_load_b32 v58, v[1:2], off offset:80
.LBB41_43:
	s_or_b32 exec_lo, exec_lo, s24
	v_add_nc_u32_e32 v7, 21, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s24, s66, v7
	s_and_saveexec_b32 s25, s24
	s_cbranch_execz .LBB41_45
; %bb.44:
	global_load_b32 v57, v[1:2], off offset:84
.LBB41_45:
	s_or_b32 exec_lo, exec_lo, s25
	v_dual_mov_b32 v60, -1 :: v_dual_add_nc_u32 v7, 22, v32
	v_mov_b32_e32 v59, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s25, s66, v7
	s_and_saveexec_b32 s26, s25
	s_cbranch_execz .LBB41_47
; %bb.46:
	global_load_b32 v60, v[1:2], off offset:88
.LBB41_47:
	s_or_b32 exec_lo, exec_lo, s26
	v_add_nc_u32_e32 v7, 23, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s26, s66, v7
	s_and_saveexec_b32 s27, s26
	s_cbranch_execz .LBB41_49
; %bb.48:
	global_load_b32 v59, v[1:2], off offset:92
.LBB41_49:
	s_or_b32 exec_lo, exec_lo, s27
	v_dual_mov_b32 v62, -1 :: v_dual_add_nc_u32 v7, 24, v32
	v_mov_b32_e32 v61, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s27, s66, v7
	s_and_saveexec_b32 s28, s27
	s_cbranch_execz .LBB41_51
; %bb.50:
	global_load_b32 v62, v[1:2], off offset:96
.LBB41_51:
	s_or_b32 exec_lo, exec_lo, s28
	v_add_nc_u32_e32 v7, 25, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s28, s66, v7
	s_and_saveexec_b32 s29, s28
	s_cbranch_execz .LBB41_53
; %bb.52:
	global_load_b32 v61, v[1:2], off offset:100
.LBB41_53:
	s_or_b32 exec_lo, exec_lo, s29
	v_dual_mov_b32 v64, -1 :: v_dual_add_nc_u32 v7, 26, v32
	v_mov_b32_e32 v63, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s29, s66, v7
	s_and_saveexec_b32 s30, s29
	s_cbranch_execz .LBB41_55
; %bb.54:
	global_load_b32 v64, v[1:2], off offset:104
.LBB41_55:
	s_or_b32 exec_lo, exec_lo, s30
	v_add_nc_u32_e32 v7, 27, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s30, s66, v7
	s_and_saveexec_b32 s31, s30
	s_cbranch_execz .LBB41_57
; %bb.56:
	global_load_b32 v63, v[1:2], off offset:108
.LBB41_57:
	s_or_b32 exec_lo, exec_lo, s31
	v_dual_mov_b32 v66, -1 :: v_dual_add_nc_u32 v7, 28, v32
	v_mov_b32_e32 v65, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s31, s66, v7
	s_and_saveexec_b32 s33, s31
	s_cbranch_execz .LBB41_59
; %bb.58:
	global_load_b32 v66, v[1:2], off offset:112
.LBB41_59:
	s_or_b32 exec_lo, exec_lo, s33
	v_add_nc_u32_e32 v7, 29, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s33, s66, v7
	s_and_saveexec_b32 s34, s33
	s_cbranch_execz .LBB41_61
; %bb.60:
	global_load_b32 v65, v[1:2], off offset:116
.LBB41_61:
	s_or_b32 exec_lo, exec_lo, s34
	v_add_nc_u32_e32 v7, 30, v32
	v_mov_b32_e32 v67, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s34, s66, v7
	s_and_saveexec_b32 s35, s34
	s_cbranch_execz .LBB41_63
; %bb.62:
	global_load_b32 v67, v[1:2], off offset:120
.LBB41_63:                              ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIjEEjLj31EjEEvjT_RAT1__T0_jT2_.exit.i.i
	s_or_b32 exec_lo, exec_lo, s35
	v_or_b32_e32 v1, 0xfffffe00, v0
	v_dual_mov_b32 v7, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_mov_b32 s35, 0
.LBB41_64:                              ; %.lr.ph.i.i.i.i.i.i25.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v1, 0x200, v1
	ds_store_b32 v2, v7
	v_add_nc_u32_e32 v2, 0x800, v2
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v1
	s_or_b32 s35, vcc_lo, s35
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB41_64
; %bb.65:                               ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i27.i
	s_or_b32 exec_lo, exec_lo, s35
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_lshl_b32 s35, -1, s81
	v_lshrrev_b32_e32 v10, s80, v6
	s_not_b32 s67, s35
	s_mov_b32 s39, exec_lo
	v_and_b32_e32 v1, s67, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v2, 9, v1
	v_lshrrev_b32_e32 v1, 3, v1
	v_and_or_b32 v2, 0xe00, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v2
	v_add_lshl_u32 v7, v2, v1, 1
	v_lshrrev_b32_e32 v2, s80, v3
	ds_load_u16 v1, v7
	v_and_b32_e32 v2, s67, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 9, v2
	v_lshrrev_b32_e32 v2, 3, v2
	v_and_or_b32 v8, 0xe00, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 1, v8
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v9, v1, 1
	v_add_lshl_u32 v8, v8, v2, 1
	ds_store_b16 v7, v9
	ds_load_u16 v2, v8
	v_and_b32_e32 v9, s67, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 9, v9
	v_lshrrev_b32_e32 v9, 3, v9
	v_and_or_b32 v10, 0xe00, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 1, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v11, v2, 1
	v_add_lshl_u32 v15, v10, v9, 1
	v_lshrrev_b32_e32 v10, s80, v5
	ds_store_b16 v8, v11
	ds_load_u16 v9, v15
	v_and_b32_e32 v10, s67, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 9, v10
	v_lshrrev_b32_e32 v10, 3, v10
	v_and_or_b32 v11, 0xe00, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 1, v11
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v12, v9, 1
	v_add_lshl_u32 v17, v11, v10, 1
	v_lshrrev_b32_e32 v11, s80, v42
	ds_store_b16 v15, v12
	ds_load_u16 v10, v17
	v_and_b32_e32 v11, s67, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 9, v11
	v_lshrrev_b32_e32 v11, 3, v11
	v_and_or_b32 v12, 0xe00, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 1, v12
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v13, v10, 1
	v_add_lshl_u32 v19, v12, v11, 1
	v_lshrrev_b32_e32 v12, s80, v41
	ds_store_b16 v17, v13
	ds_load_u16 v11, v19
	v_and_b32_e32 v12, s67, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 9, v12
	v_lshrrev_b32_e32 v12, 3, v12
	v_and_or_b32 v13, 0xe00, v13, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 1, v13
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v14, v11, 1
	v_add_lshl_u32 v21, v13, v12, 1
	v_lshrrev_b32_e32 v13, s80, v44
	ds_store_b16 v19, v14
	ds_load_u16 v12, v21
	v_and_b32_e32 v13, s67, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 9, v13
	v_lshrrev_b32_e32 v13, 3, v13
	v_and_or_b32 v14, 0xe00, v14, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 1, v14
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v16, v12, 1
	v_add_lshl_u32 v23, v14, v13, 1
	v_lshrrev_b32_e32 v14, s80, v43
	ds_store_b16 v21, v16
	ds_load_u16 v13, v23
	v_and_b32_e32 v14, s67, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v16, 9, v14
	v_lshrrev_b32_e32 v14, 3, v14
	v_and_or_b32 v16, 0xe00, v16, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v16, 1, v16
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v18, v13, 1
	v_add_lshl_u32 v25, v16, v14, 1
	v_lshrrev_b32_e32 v16, s80, v46
	ds_store_b16 v23, v18
	ds_load_u16 v14, v25
	v_and_b32_e32 v16, s67, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v18, 9, v16
	v_lshrrev_b32_e32 v16, 3, v16
	v_and_or_b32 v18, 0xe00, v18, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v18, 1, v18
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v20, v14, 1
	v_add_lshl_u32 v27, v18, v16, 1
	v_lshrrev_b32_e32 v18, s80, v45
	ds_store_b16 v25, v20
	ds_load_u16 v16, v27
	v_and_b32_e32 v18, s67, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v20, 9, v18
	v_lshrrev_b32_e32 v18, 3, v18
	v_and_or_b32 v20, 0xe00, v20, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v20, 1, v20
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v22, v16, 1
	v_add_lshl_u32 v29, v20, v18, 1
	v_lshrrev_b32_e32 v20, s80, v48
	ds_store_b16 v27, v22
	ds_load_u16 v18, v29
	v_and_b32_e32 v20, s67, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v22, 9, v20
	v_lshrrev_b32_e32 v20, 3, v20
	v_and_or_b32 v22, 0xe00, v22, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v22, 1, v22
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v24, v18, 1
	v_add_lshl_u32 v31, v22, v20, 1
	v_lshrrev_b32_e32 v22, s80, v47
	ds_store_b16 v29, v24
	ds_load_u16 v20, v31
	v_and_b32_e32 v22, s67, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v24, 9, v22
	v_lshrrev_b32_e32 v22, 3, v22
	v_and_or_b32 v24, 0xe00, v24, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v24, 1, v24
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v26, v20, 1
	v_add_lshl_u32 v34, v24, v22, 1
	v_lshrrev_b32_e32 v24, s80, v50
	ds_store_b16 v31, v26
	ds_load_u16 v22, v34
	v_and_b32_e32 v24, s67, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v26, 9, v24
	v_lshrrev_b32_e32 v24, 3, v24
	v_and_or_b32 v26, 0xe00, v26, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v26, 1, v26
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v28, v22, 1
	v_add_lshl_u32 v36, v26, v24, 1
	v_lshrrev_b32_e32 v26, s80, v49
	ds_store_b16 v34, v28
	ds_load_u16 v24, v36
	v_and_b32_e32 v26, s67, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v28, 9, v26
	v_lshrrev_b32_e32 v26, 3, v26
	v_and_or_b32 v28, 0xe00, v28, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v28, 1, v28
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v30, v24, 1
	v_add_lshl_u32 v38, v28, v26, 1
	v_lshrrev_b32_e32 v28, s80, v52
	ds_store_b16 v36, v30
	ds_load_u16 v26, v38
	v_and_b32_e32 v28, s67, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v30, 9, v28
	v_lshrrev_b32_e32 v28, 3, v28
	v_and_or_b32 v30, 0xe00, v30, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v30, 1, v30
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v33, v26, 1
	v_add_lshl_u32 v40, v30, v28, 1
	v_lshrrev_b32_e32 v30, s80, v51
	ds_store_b16 v38, v33
	ds_load_u16 v28, v40
	v_and_b32_e32 v30, s67, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v33, 9, v30
	v_lshrrev_b32_e32 v30, 3, v30
	v_and_or_b32 v33, 0xe00, v33, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v33, 1, v33
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v35, v28, 1
	v_add_lshl_u32 v69, v33, v30, 1
	v_lshrrev_b32_e32 v33, s80, v54
	ds_store_b16 v40, v35
	ds_load_u16 v30, v69
	v_and_b32_e32 v33, s67, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v35, 9, v33
	v_lshrrev_b32_e32 v33, 3, v33
	v_and_or_b32 v35, 0xe00, v35, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v35, 1, v35
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v37, v30, 1
	v_add_lshl_u32 v71, v35, v33, 1
	v_lshrrev_b32_e32 v35, s80, v53
	ds_store_b16 v69, v37
	ds_load_u16 v33, v71
	v_and_b32_e32 v35, s67, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v37, 9, v35
	v_lshrrev_b32_e32 v35, 3, v35
	v_and_or_b32 v37, 0xe00, v37, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v37, 1, v37
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v39, v33, 1
	v_add_lshl_u32 v73, v37, v35, 1
	v_lshrrev_b32_e32 v37, s80, v56
	ds_store_b16 v71, v39
	ds_load_u16 v35, v73
	v_and_b32_e32 v37, s67, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 9, v37
	v_lshrrev_b32_e32 v37, 3, v37
	v_and_or_b32 v39, 0xe00, v39, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 1, v39
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v68, v35, 1
	v_add_lshl_u32 v75, v39, v37, 1
	v_lshrrev_b32_e32 v39, s80, v55
	ds_store_b16 v73, v68
	ds_load_u16 v37, v75
	v_and_b32_e32 v39, s67, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 9, v39
	v_lshrrev_b32_e32 v39, 3, v39
	v_and_or_b32 v68, 0xe00, v68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 1, v68
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v70, v37, 1
	v_add_lshl_u32 v77, v68, v39, 1
	v_lshrrev_b32_e32 v68, s80, v58
	ds_store_b16 v75, v70
	ds_load_u16 v39, v77
	v_and_b32_e32 v68, s67, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 9, v68
	v_lshrrev_b32_e32 v68, 3, v68
	v_and_or_b32 v70, 0xe00, v70, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 1, v70
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v72, v39, 1
	v_add_lshl_u32 v79, v70, v68, 1
	v_lshrrev_b32_e32 v70, s80, v57
	ds_store_b16 v77, v72
	ds_load_u16 v68, v79
	v_and_b32_e32 v70, s67, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 9, v70
	v_lshrrev_b32_e32 v70, 3, v70
	v_and_or_b32 v72, 0xe00, v72, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 1, v72
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v74, v68, 1
	v_add_lshl_u32 v81, v72, v70, 1
	v_lshrrev_b32_e32 v72, s80, v60
	ds_store_b16 v79, v74
	ds_load_u16 v70, v81
	v_and_b32_e32 v72, s67, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 9, v72
	v_lshrrev_b32_e32 v72, 3, v72
	v_and_or_b32 v74, 0xe00, v74, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 1, v74
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v76, v70, 1
	v_add_lshl_u32 v83, v74, v72, 1
	v_lshrrev_b32_e32 v74, s80, v59
	ds_store_b16 v81, v76
	ds_load_u16 v72, v83
	v_and_b32_e32 v74, s67, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 9, v74
	v_lshrrev_b32_e32 v74, 3, v74
	v_and_or_b32 v76, 0xe00, v76, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 1, v76
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v78, v72, 1
	v_add_lshl_u32 v85, v76, v74, 1
	v_lshrrev_b32_e32 v76, s80, v62
	ds_store_b16 v83, v78
	ds_load_u16 v74, v85
	v_and_b32_e32 v76, s67, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 9, v76
	v_lshrrev_b32_e32 v76, 3, v76
	v_and_or_b32 v78, 0xe00, v78, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 1, v78
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v80, v74, 1
	v_add_lshl_u32 v87, v78, v76, 1
	v_lshrrev_b32_e32 v78, s80, v61
	ds_store_b16 v85, v80
	ds_load_u16 v76, v87
	v_and_b32_e32 v78, s67, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 9, v78
	v_lshrrev_b32_e32 v78, 3, v78
	v_and_or_b32 v80, 0xe00, v80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 1, v80
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v82, v76, 1
	v_add_lshl_u32 v89, v80, v78, 1
	v_lshrrev_b32_e32 v80, s80, v64
	ds_store_b16 v87, v82
	ds_load_u16 v78, v89
	v_and_b32_e32 v80, s67, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 9, v80
	v_lshrrev_b32_e32 v80, 3, v80
	v_and_or_b32 v82, 0xe00, v82, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 1, v82
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v84, v78, 1
	v_add_lshl_u32 v90, v82, v80, 1
	v_lshrrev_b32_e32 v82, s80, v63
	ds_store_b16 v89, v84
	ds_load_u16 v80, v90
	v_and_b32_e32 v82, s67, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 9, v82
	v_lshrrev_b32_e32 v82, 3, v82
	v_and_or_b32 v84, 0xe00, v84, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 1, v84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v86, v80, 1
	v_add_lshl_u32 v91, v84, v82, 1
	v_lshrrev_b32_e32 v84, s80, v66
	ds_store_b16 v90, v86
	ds_load_u16 v82, v91
	v_and_b32_e32 v84, s67, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 9, v84
	v_lshrrev_b32_e32 v84, 3, v84
	v_and_or_b32 v86, 0xe00, v86, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 1, v86
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v88, v82, 1
	v_add_lshl_u32 v92, v86, v84, 1
	v_lshrrev_b32_e32 v86, s80, v65
	ds_store_b16 v91, v88
	ds_load_u16 v84, v92
	v_and_b32_e32 v86, s67, v86
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 9, v86
	v_lshrrev_b32_e32 v86, 3, v86
	v_and_or_b32 v88, 0xe00, v88, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 1, v88
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v94, v84, 1
	v_add_lshl_u32 v93, v88, v86, 1
	v_lshrrev_b32_e32 v88, s80, v67
	ds_store_b16 v92, v94
	ds_load_u16 v86, v93
	v_and_b32_e32 v88, s67, v88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 9, v88
	v_lshrrev_b32_e32 v88, 3, v88
	v_and_or_b32 v94, 0xe00, v94, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 1, v94
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v86, 1
	v_add_lshl_u32 v94, v94, v88, 1
	ds_store_b16 v93, v95
	ds_load_u16 v88, v94
	v_lshlrev_b32_e32 v95, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v88, 1
	ds_store_b16 v94, v96
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[96:99], v95 offset1:1
	ds_load_2addr_b64 v[100:103], v95 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v96, v97, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v96, v96, v98, v99
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v97, v96, v100, v101
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_or_b32_e32 v100, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v97, v97, v102, v103
	v_and_b32_e32 v98, 15, v96
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v99, v97 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s35, 0, v98
	v_cmp_lt_u32_e64 s36, 1, v98
	v_cmp_lt_u32_e64 s37, 3, v98
	v_cmp_lt_u32_e64 s38, 7, v98
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, v99, 0, s35
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v99, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v97, v97, v99
	v_mov_b32_dpp v99, v97 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, 0, v99, s37
	v_add_nc_u32_e32 v97, v97, v99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v98, 0, v99, s38
	v_bfe_i32 v99, v96, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v97, v97, v98
	ds_swizzle_b32 v98, v97 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v98, v99, v98
	v_lshrrev_b32_e32 v99, 5, v0
	v_add_nc_u32_e32 v97, v97, v98
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v99
	v_cmpx_eq_u32_e64 v100, v0
	s_cbranch_execz .LBB41_67
; %bb.66:
	ds_store_b32 v98, v97 offset:16384
.LBB41_67:
	s_or_b32 exec_lo, exec_lo, s39
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s39, vcc_lo
	s_cbranch_execz .LBB41_69
; %bb.68:
	v_mad_i32_i24 v99, 0xffffffe4, v0, v95
	ds_load_b32 v100, v99 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v101, v100 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, v101, 0, s35
	v_add_nc_u32_e32 v100, v101, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	v_mov_b32_dpp v101, v100 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, 0, v101, s37
	v_add_nc_u32_e32 v100, v100, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s38
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	ds_store_b32 v99, v100 offset:16384
.LBB41_69:                              ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i36.i
	s_or_b32 exec_lo, exec_lo, s39
	v_dual_mov_b32 v100, 0 :: v_dual_mov_b32 v99, 0
	s_mov_b32 s36, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB41_71
; %bb.70:
	ds_load_b32 v99, v98 offset:16380
.LBB41_71:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjtjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb0EN6thrust10device_ptrIjEESB_NSA_ItEESC_EEvT0_T1_T2_T3_PjSH_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESE_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s36
	v_add_nc_u32_e32 v98, -1, v96
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s35, 0, v98
	v_cndmask_b32_e64 v98, v98, v96, s35
	v_cmp_eq_u32_e64 s35, 0, v96
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v98
	ds_bpermute_b32 v97, v98, v97
	ds_load_b32 v98, v100 offset:16444
	ds_load_2addr_b64 v[100:103], v95 offset1:1
	ds_load_b32 v104, v95 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v96, v97, v99, s35
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v96, v98, 16, v96
	ds_load_b64 v[98:99], v95 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v97, v96, v100
	v_add_nc_u32_e32 v100, v101, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v102, v100
	v_add_nc_u32_e32 v102, v103, v101
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v103, v98, v102
	v_add_nc_u32_e32 v98, v99, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v99, v104, v98
	ds_store_2addr_b64 v95, v[96:97], v[100:101] offset1:1
	ds_store_2addr_b64 v95, v[102:103], v[98:99] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v107, v7
	ds_load_u16 v106, v8
	ds_load_u16 v105, v15
	ds_load_u16 v104, v17
	ds_load_u16 v103, v19
	ds_load_u16 v15, v21
	ds_load_u16 v102, v23
	ds_load_u16 v101, v25
	ds_load_u16 v100, v27
	ds_load_u16 v99, v29
	ds_load_u16 v17, v31
	ds_load_u16 v98, v34
	ds_load_u16 v97, v36
	ds_load_u16 v25, v38
	ds_load_u16 v21, v40
	ds_load_u16 v19, v69
	ds_load_u16 v23, v71
	ds_load_u16 v96, v73
	ds_load_u16 v95, v75
	ds_load_u16 v77, v77
	ds_load_u16 v27, v79
	ds_load_u16 v75, v81
	ds_load_u16 v73, v83
	ds_load_u16 v36, v85
	ds_load_u16 v31, v87
	ds_load_u16 v29, v89
	ds_load_u16 v34, v90
	ds_load_u16 v71, v91
	ds_load_u16 v69, v92
	ds_load_u16 v40, v93
	ds_load_u16 v38, v94
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB41_75
; %bb.72:
	v_lshrrev_b32_e32 v7, 3, v0
	v_lshlrev_b32_e32 v8, 10, v0
	v_add_nc_u32_e32 v79, 1, v0
	s_mov_b32 s37, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v7, 0x1c00, v8, v7
	v_dual_mov_b32 v8, 0x3e00 :: v_dual_lshlrev_b32 v7, 1, v7
	ds_load_u16 v7, v7
	v_cmpx_ne_u32_e32 16, v79
	s_cbranch_execz .LBB41_74
; %bb.73:
	v_lshlrev_b32_e32 v8, 10, v79
	v_lshrrev_b32_e32 v79, 3, v79
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v8, 0x1c00, v8, v79
	v_lshlrev_b32_e32 v8, 1, v8
	ds_load_u16 v8, v8
.LBB41_74:
	s_or_b32 exec_lo, exec_lo, s37
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v8, v7
.LBB41_75:                              ; %Flow92
	s_or_b32 exec_lo, exec_lo, s36
	v_and_b32_e32 v1, 0xffff, v1
	v_and_b32_e32 v79, 0xffff, v9
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v9, 0xffff, v107
	v_and_b32_e32 v2, 0xffff, v2
	v_and_b32_e32 v81, 0xffff, v11
	s_waitcnt lgkmcnt(29)
	v_and_b32_e32 v11, 0xffff, v106
	v_and_b32_e32 v12, 0xffff, v12
	v_add_nc_u32_e32 v9, v9, v1
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v1, 0xffff, v105
	v_and_b32_e32 v83, 0xffff, v14
	v_add_nc_u32_e32 v14, v11, v2
	s_waitcnt lgkmcnt(25)
	v_and_b32_e32 v2, 0xffff, v15
	v_and_b32_e32 v10, 0xffff, v10
	v_and_b32_e32 v13, 0xffff, v13
	v_and_b32_e32 v85, 0xffff, v16
	v_and_b32_e32 v87, 0xffff, v20
	v_and_b32_e32 v16, 0xffff, v104
	v_and_b32_e32 v20, 0xffff, v103
	v_add_nc_u32_e32 v15, v1, v79
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v1, 0xffff, v102
	v_add_nc_u32_e32 v12, v2, v12
	s_waitcnt lgkmcnt(23)
	v_and_b32_e32 v2, 0xffff, v101
	v_and_b32_e32 v18, 0xffff, v18
	v_add_nc_u32_e32 v11, v16, v10
	v_add_nc_u32_e32 v10, v20, v81
	s_waitcnt lgkmcnt(21)
	v_and_b32_e32 v81, 0xffff, v99
	v_add_nc_u32_e32 v16, v1, v13
	s_waitcnt lgkmcnt(20)
	v_and_b32_e32 v1, 0xffff, v17
	v_and_b32_e32 v22, 0xffff, v22
	v_add_nc_u32_e32 v20, v2, v83
	s_waitcnt lgkmcnt(19)
	v_and_b32_e32 v2, 0xffff, v98
	v_and_b32_e32 v24, 0xffff, v24
	v_and_b32_e32 v79, 0xffff, v100
	v_add_nc_u32_e32 v13, v81, v18
	v_add_nc_u32_e32 v18, v1, v87
	s_waitcnt lgkmcnt(18)
	v_and_b32_e32 v1, 0xffff, v97
	v_and_b32_e32 v30, 0xffff, v30
	s_waitcnt lgkmcnt(16)
	v_and_b32_e32 v81, 0xffff, v21
	v_add_nc_u32_e32 v21, v2, v22
	s_waitcnt lgkmcnt(15)
	v_and_b32_e32 v2, 0xffff, v19
	v_and_b32_e32 v26, 0xffff, v26
	v_and_b32_e32 v28, 0xffff, v28
	v_and_b32_e32 v33, 0xffff, v33
	v_add_nc_u32_e32 v17, v79, v85
	v_and_b32_e32 v79, 0xffff, v25
	v_add_nc_u32_e32 v25, v1, v24
	s_waitcnt lgkmcnt(14)
	v_and_b32_e32 v1, 0xffff, v23
	v_and_b32_e32 v35, 0xffff, v35
	v_add_nc_u32_e32 v23, v2, v30
	s_waitcnt lgkmcnt(13)
	v_and_b32_e32 v2, 0xffff, v96
	v_and_b32_e32 v37, 0xffff, v37
	v_and_b32_e32 v39, 0xffff, v39
	v_and_b32_e32 v68, 0xffff, v68
	v_add_nc_u32_e32 v22, v79, v26
	v_add_nc_u32_e32 v19, v81, v28
	s_waitcnt lgkmcnt(12)
	v_and_b32_e32 v24, 0xffff, v95
	s_waitcnt lgkmcnt(11)
	v_and_b32_e32 v28, 0xffff, v77
	v_add_nc_u32_e32 v26, v1, v33
	s_waitcnt lgkmcnt(10)
	v_and_b32_e32 v1, 0xffff, v27
	v_and_b32_e32 v70, 0xffff, v70
	v_add_nc_u32_e32 v30, v2, v35
	s_waitcnt lgkmcnt(9)
	v_and_b32_e32 v2, 0xffff, v75
	v_and_b32_e32 v72, 0xffff, v72
	v_add_nc_u32_e32 v27, v24, v37
	v_add_nc_u32_e32 v24, v28, v39
	v_add_nc_u32_e32 v28, v1, v68
	s_waitcnt lgkmcnt(8)
	v_and_b32_e32 v1, 0xffff, v73
	v_and_b32_e32 v78, 0xffff, v78
	s_waitcnt lgkmcnt(6)
	v_and_b32_e32 v35, 0xffff, v31
	v_add_nc_u32_e32 v31, v2, v70
	s_waitcnt lgkmcnt(5)
	v_and_b32_e32 v2, 0xffff, v29
	v_and_b32_e32 v76, 0xffff, v76
	v_and_b32_e32 v80, 0xffff, v80
	v_and_b32_e32 v33, 0xffff, v36
	v_add_nc_u32_e32 v36, v1, v72
	s_waitcnt lgkmcnt(4)
	v_and_b32_e32 v1, 0xffff, v34
	v_and_b32_e32 v82, 0xffff, v82
	v_add_nc_u32_e32 v34, v2, v78
	s_waitcnt lgkmcnt(3)
	v_and_b32_e32 v2, 0xffff, v71
	v_and_b32_e32 v84, 0xffff, v84
	v_and_b32_e32 v86, 0xffff, v86
	v_and_b32_e32 v88, 0xffff, v88
	v_add_nc_u32_e32 v29, v35, v76
	s_waitcnt lgkmcnt(2)
	v_and_b32_e32 v35, 0xffff, v69
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v40, 0xffff, v40
	v_add_nc_u32_e32 v37, v1, v80
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v1, 0xffff, v38
	v_add_nc_u32_e32 v39, v2, v82
	v_lshlrev_b32_e32 v2, 2, v9
	v_add_nc_u32_e32 v38, v35, v84
	v_add_nc_u32_e32 v35, v40, v86
	v_add_nc_u32_e32 v40, v1, v88
	v_lshlrev_b32_e32 v1, 2, v14
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v2, v4 offset:64
	v_lshlrev_b32_e32 v2, 2, v15
	v_lshlrev_b32_e32 v4, 2, v11
	v_lshlrev_b32_e32 v68, 2, v10
	v_lshlrev_b32_e32 v69, 2, v12
	ds_store_b32 v1, v3 offset:64
	ds_store_b32 v2, v6 offset:64
	ds_store_b32 v4, v5 offset:64
	ds_store_b32 v68, v42 offset:64
	ds_store_b32 v69, v41 offset:64
	v_lshlrev_b32_e32 v1, 2, v16
	v_lshlrev_b32_e32 v2, 2, v20
	v_lshlrev_b32_e32 v3, 2, v17
	v_lshlrev_b32_e32 v4, 2, v13
	v_lshlrev_b32_e32 v5, 2, v18
	ds_store_b32 v1, v44 offset:64
	ds_store_b32 v2, v43 offset:64
	ds_store_b32 v3, v46 offset:64
	ds_store_b32 v4, v45 offset:64
	ds_store_b32 v5, v48 offset:64
	v_lshlrev_b32_e32 v1, 2, v21
	v_lshlrev_b32_e32 v2, 2, v25
	v_and_b32_e32 v74, 0xffff, v74
	v_lshlrev_b32_e32 v3, 2, v22
	v_lshlrev_b32_e32 v4, 2, v19
	v_lshlrev_b32_e32 v5, 2, v23
	ds_store_b32 v1, v47 offset:64
	ds_store_b32 v2, v50 offset:64
	ds_store_b32 v3, v49 offset:64
	ds_store_b32 v4, v52 offset:64
	ds_store_b32 v5, v51 offset:64
	v_lshlrev_b32_e32 v1, 2, v26
	v_lshlrev_b32_e32 v2, 2, v30
	v_add_nc_u32_e32 v33, v33, v74
	v_lshlrev_b32_e32 v3, 2, v27
	v_lshlrev_b32_e32 v4, 2, v24
	v_lshlrev_b32_e32 v5, 2, v28
	ds_store_b32 v1, v54 offset:64
	ds_store_b32 v2, v53 offset:64
	ds_store_b32 v3, v56 offset:64
	ds_store_b32 v4, v55 offset:64
	ds_store_b32 v5, v58 offset:64
	v_lshlrev_b32_e32 v1, 2, v31
	v_lshlrev_b32_e32 v2, 2, v36
	v_lshlrev_b32_e32 v3, 2, v33
	v_lshlrev_b32_e32 v4, 2, v29
	v_lshlrev_b32_e32 v5, 2, v34
	ds_store_b32 v1, v57 offset:64
	ds_store_b32 v2, v60 offset:64
	ds_store_b32 v3, v59 offset:64
	ds_store_b32 v4, v62 offset:64
	ds_store_b32 v5, v61 offset:64
	v_lshlrev_b32_e32 v1, 2, v37
	v_lshlrev_b32_e32 v2, 2, v39
	v_lshlrev_b32_e32 v3, 2, v38
	v_lshlrev_b32_e32 v4, 2, v35
	v_lshlrev_b32_e32 v5, 2, v40
	ds_store_b32 v1, v64 offset:64
	ds_store_b32 v2, v63 offset:64
	ds_store_b32 v3, v66 offset:64
	ds_store_b32 v4, v65 offset:64
	ds_store_b32 v5, v67 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB41_86
; %bb.76:
	v_lshl_or_b32 v3, s15, 4, v0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v41, 0
	s_mov_b32 s37, 0
	s_mov_b32 s38, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v8
	v_add_co_u32 v1, s35, s86, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s35, s87, v2, s35
                                        ; implicit-def: $sgpr35
	global_store_b32 v[1:2], v3, off
.LBB41_77:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB41_80 Depth 2
	s_or_b32 s35, s35, exec_lo
	s_cmp_eq_u32 s38, 0
	s_cbranch_scc1 .LBB41_83
; %bb.78:                               ;   in Loop: Header=BB41_77 Depth=1
	s_add_i32 s38, s38, -1
	s_mov_b32 s39, exec_lo
	v_lshl_or_b32 v3, s38, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s35, s86, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s35, s87, v6, s35
	global_load_b32 v42, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v42
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB41_82
; %bb.79:                               ; %.lr.ph.i46.i.preheader
                                        ;   in Loop: Header=BB41_77 Depth=1
	s_mov_b32 s40, 0
.LBB41_80:                              ; %.lr.ph.i46.i
                                        ;   Parent Loop BB41_77 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v42, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s35, 0, v3
	s_or_b32 s40, s35, s40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s40
	s_cbranch_execnz .LBB41_80
; %bb.81:                               ; %Flow
                                        ;   in Loop: Header=BB41_77 Depth=1
	s_or_b32 exec_lo, exec_lo, s40
.LBB41_82:                              ; %Flow89
                                        ;   in Loop: Header=BB41_77 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s39
	v_and_b32_e32 v5, 0x3fffffff, v42
	v_cmp_eq_u32_e64 s35, 0x80000000, v3
	v_add_nc_u32_e32 v41, v5, v41
	s_branch .LBB41_84
.LBB41_83:                              ;   in Loop: Header=BB41_77 Depth=1
                                        ; implicit-def: $sgpr38
.LBB41_84:                              ; %Flow90
                                        ;   in Loop: Header=BB41_77 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s39, exec_lo, s35
	s_or_b32 s37, s39, s37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s37
	s_cbranch_execnz .LBB41_77
; %bb.85:
	s_or_b32 exec_lo, exec_lo, s37
	v_add_nc_u32_e32 v3, v41, v8
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v41, v7
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	ds_store_b32 v4, v1
.LBB41_86:                              ; %Flow91
	s_or_b32 exec_lo, exec_lo, s36
	v_cmp_gt_u32_e64 s35, s66, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s37, s35
	s_cbranch_execz .LBB41_88
; %bb.87:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v3, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s36, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s36, s71, v2, s36
	global_store_b32 v[1:2], v3, off
.LBB41_88:
	s_or_b32 exec_lo, exec_lo, s37
	v_or_b32_e32 v3, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s36, s66, v3
	s_and_saveexec_b32 s38, s36
	s_cbranch_execz .LBB41_90
; %bb.89:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v4, v1 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s37, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s37, s71, v2, s37
	global_store_b32 v[1:2], v4, off
.LBB41_90:
	s_or_b32 exec_lo, exec_lo, s38
	v_or_b32_e32 v4, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s37, s66, v4
	s_and_saveexec_b32 s39, s37
	s_cbranch_execz .LBB41_92
; %bb.91:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v5, v1 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s38, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s38, s71, v2, s38
	global_store_b32 v[1:2], v5, off
.LBB41_92:
	s_or_b32 exec_lo, exec_lo, s39
	v_or_b32_e32 v5, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s38, s66, v5
	s_and_saveexec_b32 s40, s38
	s_cbranch_execz .LBB41_94
; %bb.93:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v6, v1 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s39, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s39, s71, v2, s39
	global_store_b32 v[1:2], v6, off
.LBB41_94:
	s_or_b32 exec_lo, exec_lo, s40
	v_or_b32_e32 v6, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s39, s66, v6
	s_and_saveexec_b32 s41, s39
	s_cbranch_execz .LBB41_96
; %bb.95:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v41, v1 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s40, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s40, s71, v2, s40
	global_store_b32 v[1:2], v41, off
.LBB41_96:
	s_or_b32 exec_lo, exec_lo, s41
	v_or_b32_e32 v41, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s40, s66, v41
	s_and_saveexec_b32 s42, s40
	s_cbranch_execz .LBB41_98
; %bb.97:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v42, v1 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s41, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s41, s71, v2, s41
	global_store_b32 v[1:2], v42, off
.LBB41_98:
	s_or_b32 exec_lo, exec_lo, s42
	v_or_b32_e32 v42, 0xc00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s41, s66, v42
	s_and_saveexec_b32 s43, s41
	s_cbranch_execz .LBB41_100
; %bb.99:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v43, v1 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s42, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s42, s71, v2, s42
	global_store_b32 v[1:2], v43, off
.LBB41_100:
	s_or_b32 exec_lo, exec_lo, s43
	v_or_b32_e32 v43, 0xe00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s42, s66, v43
	s_and_saveexec_b32 s44, s42
	s_cbranch_execz .LBB41_102
; %bb.101:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v44, v1 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s43, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s43, s71, v2, s43
	global_store_b32 v[1:2], v44, off
.LBB41_102:
	s_or_b32 exec_lo, exec_lo, s44
	v_or_b32_e32 v44, 0x1000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s43, s66, v44
	s_and_saveexec_b32 s45, s43
	s_cbranch_execz .LBB41_104
; %bb.103:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v45, v1 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s44, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s44, s71, v2, s44
	global_store_b32 v[1:2], v45, off
.LBB41_104:
	s_or_b32 exec_lo, exec_lo, s45
	v_or_b32_e32 v45, 0x1200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s44, s66, v45
	s_and_saveexec_b32 s46, s44
	s_cbranch_execz .LBB41_106
; %bb.105:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v46, v1 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s45, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s45, s71, v2, s45
	global_store_b32 v[1:2], v46, off
.LBB41_106:
	s_or_b32 exec_lo, exec_lo, s46
	v_or_b32_e32 v46, 0x1400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s45, s66, v46
	s_and_saveexec_b32 s47, s45
	s_cbranch_execz .LBB41_108
; %bb.107:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v47, v1 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s46, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s46, s71, v2, s46
	global_store_b32 v[1:2], v47, off
.LBB41_108:
	s_or_b32 exec_lo, exec_lo, s47
	v_or_b32_e32 v47, 0x1600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s46, s66, v47
	s_and_saveexec_b32 s48, s46
	s_cbranch_execz .LBB41_110
; %bb.109:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v48, v1 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s47, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s47, s71, v2, s47
	global_store_b32 v[1:2], v48, off
.LBB41_110:
	s_or_b32 exec_lo, exec_lo, s48
	v_or_b32_e32 v48, 0x1800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s47, s66, v48
	s_and_saveexec_b32 s49, s47
	s_cbranch_execz .LBB41_112
; %bb.111:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v49, v1 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s48, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s48, s71, v2, s48
	global_store_b32 v[1:2], v49, off
.LBB41_112:
	s_or_b32 exec_lo, exec_lo, s49
	v_or_b32_e32 v49, 0x1a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s48, s66, v49
	s_and_saveexec_b32 s50, s48
	s_cbranch_execz .LBB41_114
; %bb.113:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v50, v1 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s49, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s49, s71, v2, s49
	global_store_b32 v[1:2], v50, off
.LBB41_114:
	s_or_b32 exec_lo, exec_lo, s50
	v_or_b32_e32 v50, 0x1c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s49, s66, v50
	s_and_saveexec_b32 s51, s49
	s_cbranch_execz .LBB41_116
; %bb.115:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v51, v1 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s50, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s50, s71, v2, s50
	global_store_b32 v[1:2], v51, off
.LBB41_116:
	s_or_b32 exec_lo, exec_lo, s51
	v_or_b32_e32 v51, 0x1e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s50, s66, v51
	s_and_saveexec_b32 s52, s50
	s_cbranch_execz .LBB41_118
; %bb.117:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v52, v1 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s51, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s51, s71, v2, s51
	global_store_b32 v[1:2], v52, off
.LBB41_118:
	s_or_b32 exec_lo, exec_lo, s52
	v_or_b32_e32 v52, 0x2000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s51, s66, v52
	s_and_saveexec_b32 s53, s51
	s_cbranch_execz .LBB41_120
; %bb.119:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v53, v1 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s52, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s52, s71, v2, s52
	global_store_b32 v[1:2], v53, off
.LBB41_120:
	s_or_b32 exec_lo, exec_lo, s53
	v_or_b32_e32 v53, 0x2200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s52, s66, v53
	s_and_saveexec_b32 s54, s52
	s_cbranch_execz .LBB41_122
; %bb.121:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v54, v1 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s53, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s53, s71, v2, s53
	global_store_b32 v[1:2], v54, off
.LBB41_122:
	s_or_b32 exec_lo, exec_lo, s54
	v_or_b32_e32 v54, 0x2400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s53, s66, v54
	s_and_saveexec_b32 s55, s53
	s_cbranch_execz .LBB41_124
; %bb.123:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v55, v1 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s54, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s54, s71, v2, s54
	global_store_b32 v[1:2], v55, off
.LBB41_124:
	s_or_b32 exec_lo, exec_lo, s55
	v_or_b32_e32 v55, 0x2600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s54, s66, v55
	s_and_saveexec_b32 s56, s54
	s_cbranch_execz .LBB41_126
; %bb.125:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v56, v1 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s55, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s55, s71, v2, s55
	global_store_b32 v[1:2], v56, off
.LBB41_126:
	s_or_b32 exec_lo, exec_lo, s56
	v_or_b32_e32 v56, 0x2800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s55, s66, v56
	s_and_saveexec_b32 s57, s55
	s_cbranch_execz .LBB41_128
; %bb.127:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v57, v1 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s56, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s56, s71, v2, s56
	global_store_b32 v[1:2], v57, off
.LBB41_128:
	s_or_b32 exec_lo, exec_lo, s57
	v_or_b32_e32 v57, 0x2a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s56, s66, v57
	s_and_saveexec_b32 s58, s56
	s_cbranch_execz .LBB41_130
; %bb.129:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v58, v1 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s57, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s57, s71, v2, s57
	global_store_b32 v[1:2], v58, off
.LBB41_130:
	s_or_b32 exec_lo, exec_lo, s58
	v_or_b32_e32 v58, 0x2c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s57, s66, v58
	s_and_saveexec_b32 s59, s57
	s_cbranch_execz .LBB41_132
; %bb.131:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v59, v1 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s58, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s58, s71, v2, s58
	global_store_b32 v[1:2], v59, off
.LBB41_132:
	s_or_b32 exec_lo, exec_lo, s59
	v_or_b32_e32 v59, 0x2e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s58, s66, v59
	s_and_saveexec_b32 s60, s58
	s_cbranch_execz .LBB41_134
; %bb.133:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v60, v1 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s59, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s59, s71, v2, s59
	global_store_b32 v[1:2], v60, off
.LBB41_134:
	s_or_b32 exec_lo, exec_lo, s60
	v_or_b32_e32 v60, 0x3000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s59, s66, v60
	s_and_saveexec_b32 s61, s59
	s_cbranch_execz .LBB41_136
; %bb.135:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v61, v1 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s60, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s60, s71, v2, s60
	global_store_b32 v[1:2], v61, off
.LBB41_136:
	s_or_b32 exec_lo, exec_lo, s61
	v_or_b32_e32 v61, 0x3200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s60, s66, v61
	s_and_saveexec_b32 s62, s60
	s_cbranch_execz .LBB41_138
; %bb.137:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v62, v1 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s61, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s61, s71, v2, s61
	global_store_b32 v[1:2], v62, off
.LBB41_138:
	s_or_b32 exec_lo, exec_lo, s62
	v_or_b32_e32 v62, 0x3400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s61, s66, v62
	s_and_saveexec_b32 s63, s61
	s_cbranch_execz .LBB41_140
; %bb.139:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v63, v1 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s62, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s62, s71, v2, s62
	global_store_b32 v[1:2], v63, off
.LBB41_140:
	s_or_b32 exec_lo, exec_lo, s63
	v_or_b32_e32 v63, 0x3600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s62, s66, v63
	s_and_saveexec_b32 s64, s62
	s_cbranch_execz .LBB41_142
; %bb.141:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v64, v1 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s63, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s63, s71, v2, s63
	global_store_b32 v[1:2], v64, off
.LBB41_142:
	s_or_b32 exec_lo, exec_lo, s64
	v_or_b32_e32 v64, 0x3800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s63, s66, v64
	s_and_saveexec_b32 s65, s63
	s_cbranch_execz .LBB41_144
; %bb.143:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v65, v1 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s64, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s64, s71, v2, s64
	global_store_b32 v[1:2], v65, off
.LBB41_144:
	s_or_b32 exec_lo, exec_lo, s65
	v_or_b32_e32 v65, 0x3a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s64, s66, v65
	s_and_saveexec_b32 s82, s64
	s_cbranch_execz .LBB41_146
; %bb.145:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v66, v1 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s65, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s65, s71, v2, s65
	global_store_b32 v[1:2], v66, off
.LBB41_146:
	s_or_b32 exec_lo, exec_lo, s82
	v_or_b32_e32 v66, 0x3c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s65, s66, v66
	s_and_saveexec_b32 s82, s65
	s_cbranch_execz .LBB41_148
; %bb.147:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v67, v1 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s66, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s66, s71, v2, s66
	global_store_b32 v[1:2], v67, off
.LBB41_148:
	s_or_b32 exec_lo, exec_lo, s82
	v_lshlrev_b32_e32 v1, 1, v32
	s_lshl_b64 s[82:83], s[84:85], 1
                                        ; implicit-def: $vgpr67
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s66, s72, s82
	s_addc_u32 s82, s73, s83
	v_add_co_u32 v1, s66, s66, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v2, null, s82, 0, s66
	s_and_saveexec_b32 s66, s2
	s_xor_b32 s2, exec_lo, s66
	s_cbranch_execz .LBB41_150
; %bb.149:
	global_load_u16 v67, v[1:2], off
.LBB41_150:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr69
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB41_152
; %bb.151:
	global_load_u16 v69, v[1:2], off offset:2
.LBB41_152:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr71
	s_and_saveexec_b32 s2, s4
	s_cbranch_execz .LBB41_154
; %bb.153:
	global_load_u16 v71, v[1:2], off offset:4
.LBB41_154:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr73
	s_and_saveexec_b32 s2, s5
	s_cbranch_execz .LBB41_156
; %bb.155:
	global_load_u16 v73, v[1:2], off offset:6
.LBB41_156:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr75
	s_and_saveexec_b32 s2, s6
	s_cbranch_execz .LBB41_158
; %bb.157:
	global_load_u16 v75, v[1:2], off offset:8
.LBB41_158:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr77
	s_and_saveexec_b32 s2, s7
	s_cbranch_execz .LBB41_160
; %bb.159:
	global_load_u16 v77, v[1:2], off offset:10
.LBB41_160:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr78
	s_and_saveexec_b32 s2, s8
	s_cbranch_execz .LBB41_162
; %bb.161:
	global_load_u16 v78, v[1:2], off offset:12
.LBB41_162:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr80
	s_and_saveexec_b32 s2, s9
	s_cbranch_execz .LBB41_164
; %bb.163:
	global_load_u16 v80, v[1:2], off offset:14
.LBB41_164:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr83
	s_and_saveexec_b32 s2, s10
	s_cbranch_execz .LBB41_166
; %bb.165:
	global_load_u16 v83, v[1:2], off offset:16
.LBB41_166:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr85
	s_and_saveexec_b32 s2, s11
	s_cbranch_execz .LBB41_168
; %bb.167:
	global_load_u16 v85, v[1:2], off offset:18
.LBB41_168:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr87
	s_and_saveexec_b32 s2, s12
	s_cbranch_execz .LBB41_170
; %bb.169:
	global_load_u16 v87, v[1:2], off offset:20
.LBB41_170:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr88
	s_and_saveexec_b32 s2, s13
	s_cbranch_execz .LBB41_172
; %bb.171:
	global_load_u16 v88, v[1:2], off offset:22
.LBB41_172:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr90
	s_and_saveexec_b32 s2, s14
	s_cbranch_execz .LBB41_174
; %bb.173:
	global_load_u16 v90, v[1:2], off offset:24
.LBB41_174:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr92
	s_and_saveexec_b32 s2, s16
	s_cbranch_execz .LBB41_176
; %bb.175:
	global_load_u16 v92, v[1:2], off offset:26
.LBB41_176:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr94
	s_and_saveexec_b32 s2, s17
	s_cbranch_execz .LBB41_178
; %bb.177:
	global_load_u16 v94, v[1:2], off offset:28
.LBB41_178:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr96
	s_and_saveexec_b32 s2, s18
	s_cbranch_execz .LBB41_180
; %bb.179:
	global_load_u16 v96, v[1:2], off offset:30
.LBB41_180:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr98
	s_and_saveexec_b32 s2, s19
	s_cbranch_execz .LBB41_182
; %bb.181:
	global_load_u16 v98, v[1:2], off offset:32
.LBB41_182:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr100
	s_and_saveexec_b32 s2, s20
	s_cbranch_execz .LBB41_184
; %bb.183:
	global_load_u16 v100, v[1:2], off offset:34
.LBB41_184:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr102
	s_and_saveexec_b32 s2, s21
	s_cbranch_execz .LBB41_186
; %bb.185:
	global_load_u16 v102, v[1:2], off offset:36
.LBB41_186:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr104
	s_and_saveexec_b32 s2, s22
	s_cbranch_execz .LBB41_188
; %bb.187:
	global_load_u16 v104, v[1:2], off offset:38
.LBB41_188:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr106
	s_and_saveexec_b32 s2, s23
	s_cbranch_execz .LBB41_190
; %bb.189:
	global_load_u16 v106, v[1:2], off offset:40
.LBB41_190:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr107
	s_and_saveexec_b32 s2, s24
	s_cbranch_execz .LBB41_192
; %bb.191:
	global_load_u16 v107, v[1:2], off offset:42
.LBB41_192:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr109
	s_and_saveexec_b32 s2, s25
	s_cbranch_execz .LBB41_194
; %bb.193:
	global_load_u16 v109, v[1:2], off offset:44
.LBB41_194:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr111
	s_and_saveexec_b32 s2, s26
	s_cbranch_execz .LBB41_196
; %bb.195:
	global_load_u16 v111, v[1:2], off offset:46
.LBB41_196:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr113
	s_and_saveexec_b32 s2, s27
	s_cbranch_execz .LBB41_198
; %bb.197:
	global_load_u16 v113, v[1:2], off offset:48
.LBB41_198:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr116
	s_and_saveexec_b32 s2, s28
	s_cbranch_execz .LBB41_200
; %bb.199:
	global_load_u16 v116, v[1:2], off offset:50
.LBB41_200:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr117
	s_and_saveexec_b32 s2, s29
	s_cbranch_execz .LBB41_202
; %bb.201:
	global_load_u16 v117, v[1:2], off offset:52
.LBB41_202:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr119
	s_and_saveexec_b32 s2, s30
	s_cbranch_execz .LBB41_204
; %bb.203:
	global_load_u16 v119, v[1:2], off offset:54
.LBB41_204:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr121
	s_and_saveexec_b32 s2, s31
	s_cbranch_execz .LBB41_206
; %bb.205:
	global_load_u16 v121, v[1:2], off offset:56
.LBB41_206:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr123
	s_and_saveexec_b32 s2, s33
	s_cbranch_execz .LBB41_208
; %bb.207:
	global_load_u16 v123, v[1:2], off offset:58
.LBB41_208:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr125
	s_and_saveexec_b32 s2, s34
	s_cbranch_execz .LBB41_210
; %bb.209:
	global_load_u16 v125, v[1:2], off offset:60
.LBB41_210:                             ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrItEEtLj31EEEvjT_RAT1__T0_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr126
	s_and_saveexec_b32 s2, s35
	s_cbranch_execz .LBB41_212
; %bb.211:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v126, s67, v1
.LBB41_212:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr124
	s_and_saveexec_b32 s2, s36
	s_cbranch_execz .LBB41_214
; %bb.213:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v124, s67, v1
.LBB41_214:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr122
	s_and_saveexec_b32 s2, s37
	s_cbranch_execz .LBB41_216
; %bb.215:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v122, s67, v1
.LBB41_216:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr120
	s_and_saveexec_b32 s2, s38
	s_cbranch_execz .LBB41_218
; %bb.217:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v120, s67, v1
.LBB41_218:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr118
	s_and_saveexec_b32 s2, s39
	s_cbranch_execz .LBB41_220
; %bb.219:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v118, s67, v1
.LBB41_220:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr115
	s_and_saveexec_b32 s2, s40
	s_cbranch_execz .LBB41_222
; %bb.221:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v115, s67, v1
.LBB41_222:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr114
	s_and_saveexec_b32 s2, s41
	s_cbranch_execz .LBB41_224
; %bb.223:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v114, s67, v1
.LBB41_224:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr112
	s_and_saveexec_b32 s2, s42
	s_cbranch_execz .LBB41_226
; %bb.225:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v112, s67, v1
.LBB41_226:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr110
	s_and_saveexec_b32 s2, s43
	s_cbranch_execz .LBB41_228
; %bb.227:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v110, s67, v1
.LBB41_228:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr108
	s_and_saveexec_b32 s2, s44
	s_cbranch_execz .LBB41_230
; %bb.229:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v108, s67, v1
.LBB41_230:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr105
	s_and_saveexec_b32 s2, s45
	s_cbranch_execz .LBB41_232
; %bb.231:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v105, s67, v1
.LBB41_232:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr103
	s_and_saveexec_b32 s2, s46
	s_cbranch_execz .LBB41_234
; %bb.233:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v103, s67, v1
.LBB41_234:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr101
	s_and_saveexec_b32 s2, s47
	s_cbranch_execz .LBB41_236
; %bb.235:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v101, s67, v1
.LBB41_236:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr99
	s_and_saveexec_b32 s2, s48
	s_cbranch_execz .LBB41_238
; %bb.237:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v99, s67, v1
.LBB41_238:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr97
	s_and_saveexec_b32 s2, s49
	s_cbranch_execz .LBB41_240
; %bb.239:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v97, s67, v1
.LBB41_240:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr95
	s_and_saveexec_b32 s2, s50
	s_cbranch_execz .LBB41_242
; %bb.241:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v95, s67, v1
.LBB41_242:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr93
	s_and_saveexec_b32 s2, s51
	s_cbranch_execz .LBB41_244
; %bb.243:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v93, s67, v1
.LBB41_244:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr91
	s_and_saveexec_b32 s2, s52
	s_cbranch_execz .LBB41_246
; %bb.245:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v91, s67, v1
.LBB41_246:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr89
	s_and_saveexec_b32 s2, s53
	s_cbranch_execz .LBB41_248
; %bb.247:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v89, s67, v1
.LBB41_248:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr86
	s_and_saveexec_b32 s2, s54
	s_cbranch_execz .LBB41_250
; %bb.249:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v86, s67, v1
.LBB41_250:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr84
	s_and_saveexec_b32 s2, s55
	s_cbranch_execz .LBB41_252
; %bb.251:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v84, s67, v1
.LBB41_252:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr82
	s_and_saveexec_b32 s2, s56
	s_cbranch_execz .LBB41_254
; %bb.253:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v82, s67, v1
.LBB41_254:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr81
	s_and_saveexec_b32 s2, s57
	s_cbranch_execz .LBB41_256
; %bb.255:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v81, s67, v1
.LBB41_256:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr79
	s_and_saveexec_b32 s2, s58
	s_cbranch_execz .LBB41_258
; %bb.257:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v79, s67, v1
.LBB41_258:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr76
	s_and_saveexec_b32 s2, s59
	s_cbranch_execz .LBB41_260
; %bb.259:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v76, s67, v1
.LBB41_260:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr74
	s_and_saveexec_b32 s2, s60
	s_cbranch_execz .LBB41_262
; %bb.261:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v74, s67, v1
.LBB41_262:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr72
	s_and_saveexec_b32 s2, s61
	s_cbranch_execz .LBB41_264
; %bb.263:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v72, s67, v1
.LBB41_264:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr70
	s_and_saveexec_b32 s2, s62
	s_cbranch_execz .LBB41_266
; %bb.265:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v70, s67, v1
.LBB41_266:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr68
	s_and_saveexec_b32 s2, s63
	s_cbranch_execz .LBB41_268
; %bb.267:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v68, s67, v1
.LBB41_268:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr2
	s_and_saveexec_b32 s2, s64
	s_cbranch_execz .LBB41_270
; %bb.269:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v2, s67, v1
.LBB41_270:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s2, s65
	s_cbranch_execz .LBB41_272
; %bb.271:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
.LBB41_272:
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b32_e32 v9, 1, v9
	v_lshlrev_b32_e32 v14, 1, v14
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b16 v9, v67 offset:64
	v_lshlrev_b32_e32 v9, 1, v15
	v_lshlrev_b32_e32 v11, 1, v11
	v_lshlrev_b32_e32 v10, 1, v10
	v_lshlrev_b32_e32 v12, 1, v12
	ds_store_b16 v14, v69 offset:64
	ds_store_b16 v9, v71 offset:64
	ds_store_b16 v11, v73 offset:64
	ds_store_b16 v10, v75 offset:64
	ds_store_b16 v12, v77 offset:64
	v_lshlrev_b32_e32 v9, 1, v16
	v_lshlrev_b32_e32 v10, 1, v20
	v_lshlrev_b32_e32 v11, 1, v17
	v_lshlrev_b32_e32 v12, 1, v13
	v_lshlrev_b32_e32 v13, 1, v18
	ds_store_b16 v9, v78 offset:64
	ds_store_b16 v10, v80 offset:64
	ds_store_b16 v11, v83 offset:64
	ds_store_b16 v12, v85 offset:64
	ds_store_b16 v13, v87 offset:64
	v_lshlrev_b32_e32 v9, 1, v21
	v_lshlrev_b32_e32 v10, 1, v25
	v_lshlrev_b32_e32 v11, 1, v22
	v_lshlrev_b32_e32 v12, 1, v19
	v_lshlrev_b32_e32 v13, 1, v23
	ds_store_b16 v9, v88 offset:64
	ds_store_b16 v10, v90 offset:64
	ds_store_b16 v11, v92 offset:64
	ds_store_b16 v12, v94 offset:64
	ds_store_b16 v13, v96 offset:64
	v_lshlrev_b32_e32 v9, 1, v26
	v_lshlrev_b32_e32 v10, 1, v30
	v_lshlrev_b32_e32 v11, 1, v27
	v_lshlrev_b32_e32 v12, 1, v24
	v_lshlrev_b32_e32 v13, 1, v28
	ds_store_b16 v9, v98 offset:64
	ds_store_b16 v10, v100 offset:64
	ds_store_b16 v11, v102 offset:64
	ds_store_b16 v12, v104 offset:64
	ds_store_b16 v13, v106 offset:64
	v_lshlrev_b32_e32 v9, 1, v31
	v_lshlrev_b32_e32 v10, 1, v36
	v_lshlrev_b32_e32 v11, 1, v33
	v_lshlrev_b32_e32 v12, 1, v29
	v_lshlrev_b32_e32 v13, 1, v34
	ds_store_b16 v9, v107 offset:64
	ds_store_b16 v10, v109 offset:64
	ds_store_b16 v11, v111 offset:64
	ds_store_b16 v12, v113 offset:64
	ds_store_b16 v13, v116 offset:64
	v_lshlrev_b32_e32 v9, 1, v37
	v_lshlrev_b32_e32 v10, 1, v39
	v_lshlrev_b32_e32 v11, 1, v38
	v_lshlrev_b32_e32 v12, 1, v35
	v_lshlrev_b32_e32 v13, 1, v40
	ds_store_b16 v9, v117 offset:64
	ds_store_b16 v10, v119 offset:64
	ds_store_b16 v11, v121 offset:64
	ds_store_b16 v12, v123 offset:64
	ds_store_b16 v13, v125 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s35
	s_cbranch_execz .LBB41_274
; %bb.273:
	v_lshlrev_b32_e32 v9, 2, v126
	v_lshlrev_b32_e32 v10, 1, v0
	ds_load_b32 v9, v9
	ds_load_u16 v11, v10 offset:64
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v9, v9, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 1, v[9:10]
	v_add_co_u32 v9, s2, s74, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s75, v10, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[9:10], v11, off
.LBB41_274:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s36
	s_cbranch_execz .LBB41_276
; %bb.275:
	v_lshlrev_b32_e32 v9, 2, v124
	v_lshlrev_b32_e32 v10, 1, v0
	ds_load_b32 v9, v9
	ds_load_u16 v11, v10 offset:1088
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v9, v9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 1, v[9:10]
	v_add_co_u32 v9, s2, s74, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s75, v10, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[9:10], v11, off
.LBB41_276:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s37
	s_cbranch_execz .LBB41_278
; %bb.277:
	v_dual_mov_b32 v10, 0 :: v_dual_lshlrev_b32 v3, 2, v122
	v_lshlrev_b32_e32 v9, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v11, v9 offset:2112
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v9, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[9:10]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v11, off
.LBB41_278:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s38
	s_cbranch_execz .LBB41_280
; %bb.279:
	v_lshlrev_b32_e32 v3, 2, v120
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v9, v4 offset:3136
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v9, off
.LBB41_280:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s39
	s_cbranch_execz .LBB41_282
; %bb.281:
	v_lshlrev_b32_e32 v3, 2, v118
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:4160
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_282:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s40
	s_cbranch_execz .LBB41_284
; %bb.283:
	v_lshlrev_b32_e32 v3, 2, v115
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:5184
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_284:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s41
	s_cbranch_execz .LBB41_286
; %bb.285:
	v_lshlrev_b32_e32 v3, 2, v114
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:6208
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_286:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s42
	s_cbranch_execz .LBB41_288
; %bb.287:
	v_lshlrev_b32_e32 v3, 2, v112
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:7232
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_288:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s43
	s_cbranch_execz .LBB41_290
; %bb.289:
	v_lshlrev_b32_e32 v3, 2, v110
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:8256
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_290:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s44
	s_cbranch_execz .LBB41_292
; %bb.291:
	v_lshlrev_b32_e32 v3, 2, v108
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:9280
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_292:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s45
	s_cbranch_execz .LBB41_294
; %bb.293:
	v_lshlrev_b32_e32 v3, 2, v105
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:10304
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_294:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s46
	s_cbranch_execz .LBB41_296
; %bb.295:
	v_lshlrev_b32_e32 v3, 2, v103
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:11328
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_296:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s47
	s_cbranch_execz .LBB41_298
; %bb.297:
	v_lshlrev_b32_e32 v3, 2, v101
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:12352
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_298:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s48
	s_cbranch_execz .LBB41_300
; %bb.299:
	v_lshlrev_b32_e32 v3, 2, v99
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:13376
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_300:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s49
	s_cbranch_execz .LBB41_302
; %bb.301:
	v_lshlrev_b32_e32 v3, 2, v97
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:14400
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_302:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s50
	s_cbranch_execz .LBB41_304
; %bb.303:
	v_lshlrev_b32_e32 v3, 2, v95
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:15424
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_304:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s51
	s_cbranch_execz .LBB41_306
; %bb.305:
	v_lshlrev_b32_e32 v3, 2, v93
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:16448
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_306:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s52
	s_cbranch_execz .LBB41_308
; %bb.307:
	v_lshlrev_b32_e32 v3, 2, v91
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:17472
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_308:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s53
	s_cbranch_execz .LBB41_310
; %bb.309:
	v_lshlrev_b32_e32 v3, 2, v89
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:18496
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_310:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s54
	s_cbranch_execz .LBB41_312
; %bb.311:
	v_lshlrev_b32_e32 v3, 2, v86
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:19520
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_312:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s55
	s_cbranch_execz .LBB41_314
; %bb.313:
	v_lshlrev_b32_e32 v3, 2, v84
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:20544
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_314:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s56
	s_cbranch_execz .LBB41_316
; %bb.315:
	v_lshlrev_b32_e32 v3, 2, v82
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:21568
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_316:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s57
	s_cbranch_execz .LBB41_318
; %bb.317:
	v_lshlrev_b32_e32 v3, 2, v81
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:22592
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_318:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s58
	s_cbranch_execz .LBB41_320
; %bb.319:
	v_lshlrev_b32_e32 v3, 2, v79
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:23616
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_320:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s59
	s_cbranch_execz .LBB41_322
; %bb.321:
	v_lshlrev_b32_e32 v3, 2, v76
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:24640
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_322:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s60
	s_cbranch_execz .LBB41_324
; %bb.323:
	v_lshlrev_b32_e32 v3, 2, v74
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:25664
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_324:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s61
	s_cbranch_execz .LBB41_326
; %bb.325:
	v_lshlrev_b32_e32 v3, 2, v72
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:26688
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_326:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s62
	s_cbranch_execz .LBB41_328
; %bb.327:
	v_lshlrev_b32_e32 v3, 2, v70
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:27712
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_328:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s63
	s_cbranch_execz .LBB41_330
; %bb.329:
	v_lshlrev_b32_e32 v3, 2, v68
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:28736
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB41_330:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s64
	s_cbranch_execz .LBB41_332
; %bb.331:
	v_lshlrev_b32_e32 v2, 2, v2
	v_lshlrev_b32_e32 v3, 1, v0
	ds_load_b32 v2, v2
	ds_load_u16 v4, v3 offset:29760
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v2, v2, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 1, v[2:3]
	v_add_co_u32 v2, s2, s74, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s2, s75, v3, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[2:3], v4, off
.LBB41_332:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s65
	s_cbranch_execz .LBB41_334
; %bb.333:
	v_lshlrev_b32_e32 v1, 2, v1
	v_lshlrev_b32_e32 v2, 1, v0
	ds_load_b32 v1, v1
	ds_load_u16 v3, v2 offset:30784
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, v1, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 1, v[1:2]
	v_add_co_u32 v1, s2, s74, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s2, s75, v2, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[1:2], v3, off
.LBB41_334:
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b32 s2, s[0:1], 0x50
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s2
	s_mov_b32 s2, 0
	s_cselect_b32 s3, -1, 0
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s3
	s_xor_b32 s3, exec_lo, s4
; %bb.335:
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v7, v8
	s_mov_b32 s7, exec_lo
; %bb.336:                              ; %Flow103
	s_or_b32 exec_lo, exec_lo, s3
	s_branch .LBB41_338
.LBB41_337:
	s_mov_b32 s2, -1
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
.LBB41_338:                             ; %Flow102
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB41_367
; %bb.339:
	s_mov_b32 s85, 0
	v_lshlrev_b32_e32 v21, 2, v32
	s_lshl_b64 s[2:3], s[84:85], 2
	v_mov_b32_e32 v33, 0
	s_add_u32 s2, s68, s2
	s_addc_u32 s3, s69, s3
	v_or_b32_e32 v34, 0xfffffe00, v0
	s_clause 0x7
	global_load_b128 v[1:4], v21, s[2:3] offset:48
	global_load_b128 v[9:12], v21, s[2:3] offset:32
	global_load_b128 v[17:20], v21, s[2:3] offset:16
	global_load_b128 v[25:28], v21, s[2:3]
	global_load_b96 v[29:31], v21, s[2:3] offset:112
	global_load_b128 v[5:8], v21, s[2:3] offset:96
	global_load_b128 v[13:16], v21, s[2:3] offset:80
	global_load_b128 v[21:24], v21, s[2:3] offset:64
	v_lshlrev_b32_e32 v35, 2, v0
	s_mov_b32 s2, s85
.LBB41_340:                             ; %.lr.ph.i.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v34, 0x200, v34
	ds_store_b32 v35, v33
	v_add_nc_u32_e32 v35, 0x800, v35
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v34
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB41_340
; %bb.341:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(4)
	v_lshrrev_b32_e32 v33, s80, v25
	s_lshl_b32 s2, -1, s81
	v_lshrrev_b32_e32 v38, s80, v27
	s_not_b32 s8, s2
	s_mov_b32 s2, exec_lo
	v_and_b32_e32 v33, s8, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v34, 9, v33
	v_lshrrev_b32_e32 v33, 3, v33
	v_and_or_b32 v34, 0xe00, v34, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v34, 1, v34
	v_add_lshl_u32 v33, v34, v33, 1
	v_lshrrev_b32_e32 v34, s80, v26
	ds_load_u16 v35, v33
	v_and_b32_e32 v34, s8, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 9, v34
	v_lshrrev_b32_e32 v34, 3, v34
	v_and_or_b32 v36, 0xe00, v36, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 1, v36
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v37, v35, 1
	v_add_lshl_u32 v34, v36, v34, 1
	ds_store_b16 v33, v37
	ds_load_u16 v36, v34
	v_and_b32_e32 v37, s8, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 9, v37
	v_lshrrev_b32_e32 v37, 3, v37
	v_and_or_b32 v38, 0xe00, v38, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 1, v38
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v39, v36, 1
	v_add_lshl_u32 v43, v38, v37, 1
	v_lshrrev_b32_e32 v38, s80, v28
	ds_store_b16 v34, v39
	ds_load_u16 v37, v43
	v_and_b32_e32 v38, s8, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 9, v38
	v_lshrrev_b32_e32 v38, 3, v38
	v_and_or_b32 v39, 0xe00, v39, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 1, v39
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v40, v37, 1
	v_add_lshl_u32 v45, v39, v38, 1
	v_lshrrev_b32_e32 v39, s80, v17
	ds_store_b16 v43, v40
	ds_load_u16 v38, v45
	v_and_b32_e32 v39, s8, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 9, v39
	v_lshrrev_b32_e32 v39, 3, v39
	v_and_or_b32 v40, 0xe00, v40, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 1, v40
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v41, v38, 1
	v_add_lshl_u32 v47, v40, v39, 1
	v_lshrrev_b32_e32 v40, s80, v18
	ds_store_b16 v45, v41
	ds_load_u16 v39, v47
	v_and_b32_e32 v40, s8, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 9, v40
	v_lshrrev_b32_e32 v40, 3, v40
	v_and_or_b32 v41, 0xe00, v41, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 1, v41
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v42, v39, 1
	v_add_lshl_u32 v49, v41, v40, 1
	v_lshrrev_b32_e32 v41, s80, v19
	ds_store_b16 v47, v42
	ds_load_u16 v40, v49
	v_and_b32_e32 v41, s8, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 9, v41
	v_lshrrev_b32_e32 v41, 3, v41
	v_and_or_b32 v42, 0xe00, v42, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 1, v42
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v44, v40, 1
	v_add_lshl_u32 v51, v42, v41, 1
	v_lshrrev_b32_e32 v42, s80, v20
	ds_store_b16 v49, v44
	ds_load_u16 v41, v51
	v_and_b32_e32 v42, s8, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 9, v42
	v_lshrrev_b32_e32 v42, 3, v42
	v_and_or_b32 v44, 0xe00, v44, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 1, v44
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v46, v41, 1
	v_add_lshl_u32 v53, v44, v42, 1
	v_lshrrev_b32_e32 v44, s80, v9
	ds_store_b16 v51, v46
	ds_load_u16 v42, v53
	v_and_b32_e32 v44, s8, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 9, v44
	v_lshrrev_b32_e32 v44, 3, v44
	v_and_or_b32 v46, 0xe00, v46, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 1, v46
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v48, v42, 1
	v_add_lshl_u32 v55, v46, v44, 1
	v_lshrrev_b32_e32 v46, s80, v10
	ds_store_b16 v53, v48
	ds_load_u16 v44, v55
	v_and_b32_e32 v46, s8, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 9, v46
	v_lshrrev_b32_e32 v46, 3, v46
	v_and_or_b32 v48, 0xe00, v48, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 1, v48
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v50, v44, 1
	v_add_lshl_u32 v57, v48, v46, 1
	v_lshrrev_b32_e32 v48, s80, v11
	ds_store_b16 v55, v50
	ds_load_u16 v46, v57
	v_and_b32_e32 v48, s8, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 9, v48
	v_lshrrev_b32_e32 v48, 3, v48
	v_and_or_b32 v50, 0xe00, v50, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 1, v50
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v52, v46, 1
	v_add_lshl_u32 v59, v50, v48, 1
	v_lshrrev_b32_e32 v50, s80, v12
	ds_store_b16 v57, v52
	ds_load_u16 v48, v59
	v_and_b32_e32 v50, s8, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 9, v50
	v_lshrrev_b32_e32 v50, 3, v50
	v_and_or_b32 v52, 0xe00, v52, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 1, v52
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v54, v48, 1
	v_add_lshl_u32 v61, v52, v50, 1
	v_lshrrev_b32_e32 v52, s80, v1
	ds_store_b16 v59, v54
	ds_load_u16 v50, v61
	v_and_b32_e32 v52, s8, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 9, v52
	v_lshrrev_b32_e32 v52, 3, v52
	v_and_or_b32 v54, 0xe00, v54, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 1, v54
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v56, v50, 1
	v_add_lshl_u32 v63, v54, v52, 1
	v_lshrrev_b32_e32 v54, s80, v2
	ds_store_b16 v61, v56
	ds_load_u16 v52, v63
	v_and_b32_e32 v54, s8, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 9, v54
	v_lshrrev_b32_e32 v54, 3, v54
	v_and_or_b32 v56, 0xe00, v56, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 1, v56
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v58, v52, 1
	v_add_lshl_u32 v65, v56, v54, 1
	v_lshrrev_b32_e32 v56, s80, v3
	ds_store_b16 v63, v58
	ds_load_u16 v54, v65
	v_and_b32_e32 v56, s8, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 9, v56
	v_lshrrev_b32_e32 v56, 3, v56
	v_and_or_b32 v58, 0xe00, v58, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 1, v58
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v60, v54, 1
	v_add_lshl_u32 v67, v58, v56, 1
	v_lshrrev_b32_e32 v58, s80, v4
	ds_store_b16 v65, v60
	ds_load_u16 v56, v67
	v_and_b32_e32 v58, s8, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 9, v58
	v_lshrrev_b32_e32 v58, 3, v58
	v_and_or_b32 v60, 0xe00, v60, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 1, v60
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v62, v56, 1
	v_add_lshl_u32 v69, v60, v58, 1
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v60, s80, v21
	ds_store_b16 v67, v62
	ds_load_u16 v58, v69
	v_and_b32_e32 v60, s8, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 9, v60
	v_lshrrev_b32_e32 v60, 3, v60
	v_and_or_b32 v62, 0xe00, v62, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 1, v62
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v64, v58, 1
	v_add_lshl_u32 v71, v62, v60, 1
	v_lshrrev_b32_e32 v62, s80, v22
	ds_store_b16 v69, v64
	ds_load_u16 v60, v71
	v_and_b32_e32 v62, s8, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 9, v62
	v_lshrrev_b32_e32 v62, 3, v62
	v_and_or_b32 v64, 0xe00, v64, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 1, v64
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v66, v60, 1
	v_add_lshl_u32 v73, v64, v62, 1
	v_lshrrev_b32_e32 v64, s80, v23
	ds_store_b16 v71, v66
	ds_load_u16 v62, v73
	v_and_b32_e32 v64, s8, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 9, v64
	v_lshrrev_b32_e32 v64, 3, v64
	v_and_or_b32 v66, 0xe00, v66, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 1, v66
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v68, v62, 1
	v_add_lshl_u32 v75, v66, v64, 1
	v_lshrrev_b32_e32 v66, s80, v24
	ds_store_b16 v73, v68
	ds_load_u16 v64, v75
	v_and_b32_e32 v66, s8, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 9, v66
	v_lshrrev_b32_e32 v66, 3, v66
	v_and_or_b32 v68, 0xe00, v68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 1, v68
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v70, v64, 1
	v_add_lshl_u32 v77, v68, v66, 1
	v_lshrrev_b32_e32 v68, s80, v13
	ds_store_b16 v75, v70
	ds_load_u16 v66, v77
	v_and_b32_e32 v68, s8, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 9, v68
	v_lshrrev_b32_e32 v68, 3, v68
	v_and_or_b32 v70, 0xe00, v70, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 1, v70
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v72, v66, 1
	v_add_lshl_u32 v79, v70, v68, 1
	v_lshrrev_b32_e32 v70, s80, v14
	ds_store_b16 v77, v72
	ds_load_u16 v68, v79
	v_and_b32_e32 v70, s8, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 9, v70
	v_lshrrev_b32_e32 v70, 3, v70
	v_and_or_b32 v72, 0xe00, v72, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 1, v72
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v74, v68, 1
	v_add_lshl_u32 v81, v72, v70, 1
	v_lshrrev_b32_e32 v72, s80, v15
	ds_store_b16 v79, v74
	ds_load_u16 v70, v81
	v_and_b32_e32 v72, s8, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 9, v72
	v_lshrrev_b32_e32 v72, 3, v72
	v_and_or_b32 v74, 0xe00, v74, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 1, v74
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v76, v70, 1
	v_add_lshl_u32 v83, v74, v72, 1
	v_lshrrev_b32_e32 v74, s80, v16
	ds_store_b16 v81, v76
	ds_load_u16 v72, v83
	v_and_b32_e32 v74, s8, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 9, v74
	v_lshrrev_b32_e32 v74, 3, v74
	v_and_or_b32 v76, 0xe00, v76, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 1, v76
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v78, v72, 1
	v_add_lshl_u32 v85, v76, v74, 1
	v_lshrrev_b32_e32 v76, s80, v5
	ds_store_b16 v83, v78
	ds_load_u16 v74, v85
	v_and_b32_e32 v76, s8, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 9, v76
	v_lshrrev_b32_e32 v76, 3, v76
	v_and_or_b32 v78, 0xe00, v78, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 1, v78
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v80, v74, 1
	v_add_lshl_u32 v87, v78, v76, 1
	v_lshrrev_b32_e32 v78, s80, v6
	ds_store_b16 v85, v80
	ds_load_u16 v76, v87
	v_and_b32_e32 v78, s8, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 9, v78
	v_lshrrev_b32_e32 v78, 3, v78
	v_and_or_b32 v80, 0xe00, v80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 1, v80
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v82, v76, 1
	v_add_lshl_u32 v89, v80, v78, 1
	v_lshrrev_b32_e32 v80, s80, v7
	ds_store_b16 v87, v82
	ds_load_u16 v78, v89
	v_and_b32_e32 v80, s8, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 9, v80
	v_lshrrev_b32_e32 v80, 3, v80
	v_and_or_b32 v82, 0xe00, v82, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 1, v82
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v84, v78, 1
	v_add_lshl_u32 v90, v82, v80, 1
	v_lshrrev_b32_e32 v82, s80, v8
	ds_store_b16 v89, v84
	ds_load_u16 v80, v90
	v_and_b32_e32 v82, s8, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 9, v82
	v_lshrrev_b32_e32 v82, 3, v82
	v_and_or_b32 v84, 0xe00, v84, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 1, v84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v86, v80, 1
	v_add_lshl_u32 v91, v84, v82, 1
	v_lshrrev_b32_e32 v84, s80, v29
	ds_store_b16 v90, v86
	ds_load_u16 v82, v91
	v_and_b32_e32 v84, s8, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 9, v84
	v_lshrrev_b32_e32 v84, 3, v84
	v_and_or_b32 v86, 0xe00, v86, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 1, v86
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v88, v82, 1
	v_add_lshl_u32 v92, v86, v84, 1
	v_lshrrev_b32_e32 v86, s80, v30
	ds_store_b16 v91, v88
	ds_load_u16 v84, v92
	v_and_b32_e32 v86, s8, v86
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 9, v86
	v_lshrrev_b32_e32 v86, 3, v86
	v_and_or_b32 v88, 0xe00, v88, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 1, v88
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v94, v84, 1
	v_add_lshl_u32 v93, v88, v86, 1
	v_lshrrev_b32_e32 v88, s80, v31
	ds_store_b16 v92, v94
	ds_load_u16 v86, v93
	v_and_b32_e32 v88, s8, v88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 9, v88
	v_lshrrev_b32_e32 v88, 3, v88
	v_and_or_b32 v94, 0xe00, v94, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 1, v94
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v86, 1
	v_add_lshl_u32 v94, v94, v88, 1
	ds_store_b16 v93, v95
	ds_load_u16 v88, v94
	v_lshlrev_b32_e32 v95, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v88, 1
	ds_store_b16 v94, v96
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[96:99], v95 offset1:1
	ds_load_2addr_b64 v[100:103], v95 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v96, v97, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v96, v96, v98, v99
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v97, v96, v100, v101
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_or_b32_e32 v100, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v97, v97, v102, v103
	v_and_b32_e32 v98, 15, v96
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v99, v97 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s3, 0, v98
	v_cmp_lt_u32_e64 s4, 1, v98
	v_cmp_lt_u32_e64 s5, 3, v98
	v_cmp_lt_u32_e64 s6, 7, v98
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, v99, 0, s3
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v99, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v97, v97, v99
	v_mov_b32_dpp v99, v97 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, 0, v99, s5
	v_add_nc_u32_e32 v97, v97, v99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v98, 0, v99, s6
	v_bfe_i32 v99, v96, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v97, v97, v98
	ds_swizzle_b32 v98, v97 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v98, v99, v98
	v_lshrrev_b32_e32 v99, 5, v0
	v_add_nc_u32_e32 v97, v97, v98
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v99
	v_cmpx_eq_u32_e64 v100, v0
	s_cbranch_execz .LBB41_343
; %bb.342:
	ds_store_b32 v98, v97 offset:16384
.LBB41_343:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_lt_u32_e64 s2, 15, v0
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s9, vcc_lo
	s_cbranch_execz .LBB41_345
; %bb.344:
	v_mad_i32_i24 v99, 0xffffffe4, v0, v95
	ds_load_b32 v100, v99 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v101, v100 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, v101, 0, s3
	v_add_nc_u32_e32 v100, v101, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	v_mov_b32_dpp v101, v100 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, 0, v101, s5
	v_add_nc_u32_e32 v100, v100, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	ds_store_b32 v99, v100 offset:16384
.LBB41_345:                             ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s9
	v_dual_mov_b32 v100, 0 :: v_dual_mov_b32 v99, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB41_347
; %bb.346:
	ds_load_b32 v99, v98 offset:16380
.LBB41_347:                             ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjtjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEESB_NSA_ItEESC_EEvT0_T1_T2_T3_PjSH_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESE_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v98, -1, v96
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s3, 0, v98
	v_cndmask_b32_e64 v98, v98, v96, s3
	v_cmp_eq_u32_e64 s3, 0, v96
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v98
	ds_bpermute_b32 v97, v98, v97
	ds_load_b32 v98, v100 offset:16444
	ds_load_2addr_b64 v[100:103], v95 offset1:1
	ds_load_b32 v104, v95 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v96, v97, v99, s3
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v96, v98, 16, v96
	ds_load_b64 v[98:99], v95 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v97, v96, v100
	v_add_nc_u32_e32 v100, v101, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v102, v100
	v_add_nc_u32_e32 v102, v103, v101
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v103, v98, v102
	v_add_nc_u32_e32 v98, v99, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v99, v104, v98
	ds_store_2addr_b64 v95, v[96:97], v[100:101] offset1:1
	ds_store_2addr_b64 v95, v[102:103], v[98:99] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v108, v33
	ds_load_u16 v107, v34
	ds_load_u16 v106, v43
	ds_load_u16 v105, v45
	ds_load_u16 v104, v47
	ds_load_u16 v103, v49
	ds_load_u16 v102, v51
	ds_load_u16 v101, v53
	ds_load_u16 v100, v55
	ds_load_u16 v45, v57
	ds_load_u16 v43, v59
	ds_load_u16 v99, v61
	ds_load_u16 v98, v63
	ds_load_u16 v97, v65
	ds_load_u16 v47, v67
	ds_load_u16 v96, v69
	ds_load_u16 v49, v71
	ds_load_u16 v95, v73
	ds_load_u16 v55, v75
	ds_load_u16 v53, v77
	ds_load_u16 v51, v79
	ds_load_u16 v75, v81
	ds_load_u16 v73, v83
	ds_load_u16 v71, v85
	ds_load_u16 v57, v87
	ds_load_u16 v69, v89
	ds_load_u16 v59, v90
	ds_load_u16 v67, v91
	ds_load_u16 v65, v92
	ds_load_u16 v63, v93
	ds_load_u16 v61, v94
                                        ; implicit-def: $vgpr33
                                        ; implicit-def: $vgpr34
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB41_351
; %bb.348:
	v_lshrrev_b32_e32 v33, 3, v0
	v_lshlrev_b32_e32 v34, 10, v0
	v_add_nc_u32_e32 v77, 1, v0
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v33, 0x1c00, v34, v33
	v_dual_mov_b32 v34, 0x3e00 :: v_dual_lshlrev_b32 v33, 1, v33
	ds_load_u16 v33, v33
	v_cmpx_ne_u32_e32 16, v77
	s_cbranch_execz .LBB41_350
; %bb.349:
	v_lshlrev_b32_e32 v34, 10, v77
	v_lshrrev_b32_e32 v77, 3, v77
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v34, 0x1c00, v34, v77
	v_lshlrev_b32_e32 v34, 1, v34
	ds_load_u16 v34, v34
.LBB41_350:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v33, 0xffff, v33
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v34, v34, v33
.LBB41_351:                             ; %Flow99
	s_or_b32 exec_lo, exec_lo, s4
	v_and_b32_e32 v35, 0xffff, v35
	v_and_b32_e32 v36, 0xffff, v36
	v_and_b32_e32 v77, 0xffff, v37
	v_and_b32_e32 v38, 0xffff, v38
	v_and_b32_e32 v39, 0xffff, v39
	v_and_b32_e32 v79, 0xffff, v40
	v_and_b32_e32 v81, 0xffff, v42
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v37, 0xffff, v108
	v_and_b32_e32 v83, 0xffff, v84
	v_and_b32_e32 v84, 0xffff, v86
	v_and_b32_e32 v85, 0xffff, v88
	s_waitcnt lgkmcnt(29)
	v_and_b32_e32 v40, 0xffff, v107
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v42, 0xffff, v106
	s_waitcnt lgkmcnt(27)
	v_and_b32_e32 v86, 0xffff, v105
	s_waitcnt lgkmcnt(26)
	v_and_b32_e32 v87, 0xffff, v104
	s_waitcnt lgkmcnt(25)
	v_and_b32_e32 v88, 0xffff, v103
	v_and_b32_e32 v41, 0xffff, v41
	v_and_b32_e32 v44, 0xffff, v44
	v_and_b32_e32 v46, 0xffff, v46
	v_and_b32_e32 v48, 0xffff, v48
	v_add_nc_u32_e32 v35, v37, v35
	v_add_nc_u32_e32 v37, v40, v36
	v_add_nc_u32_e32 v40, v42, v77
	v_add_nc_u32_e32 v38, v86, v38
	v_add_nc_u32_e32 v36, v87, v39
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v42, 0xffff, v102
	v_add_nc_u32_e32 v39, v88, v79
	s_waitcnt lgkmcnt(23)
	v_and_b32_e32 v77, 0xffff, v101
	s_waitcnt lgkmcnt(22)
	v_and_b32_e32 v79, 0xffff, v100
	s_waitcnt lgkmcnt(21)
	v_and_b32_e32 v86, 0xffff, v45
	s_waitcnt lgkmcnt(20)
	v_and_b32_e32 v87, 0xffff, v43
	v_and_b32_e32 v50, 0xffff, v50
	v_and_b32_e32 v52, 0xffff, v52
	v_and_b32_e32 v54, 0xffff, v54
	v_and_b32_e32 v58, 0xffff, v58
	v_add_nc_u32_e32 v42, v42, v41
	v_add_nc_u32_e32 v45, v77, v81
	v_add_nc_u32_e32 v43, v79, v44
	v_add_nc_u32_e32 v41, v86, v46
	s_waitcnt lgkmcnt(19)
	v_and_b32_e32 v46, 0xffff, v99
	v_add_nc_u32_e32 v44, v87, v48
	s_waitcnt lgkmcnt(18)
	v_and_b32_e32 v48, 0xffff, v98
	s_waitcnt lgkmcnt(17)
	v_and_b32_e32 v77, 0xffff, v97
	s_waitcnt lgkmcnt(15)
	v_and_b32_e32 v81, 0xffff, v96
	v_and_b32_e32 v56, 0xffff, v56
	v_and_b32_e32 v60, 0xffff, v60
	v_and_b32_e32 v62, 0xffff, v62
	v_and_b32_e32 v66, 0xffff, v66
	v_and_b32_e32 v79, 0xffff, v47
	v_add_nc_u32_e32 v47, v46, v50
	v_add_nc_u32_e32 v50, v48, v52
	v_add_nc_u32_e32 v48, v77, v54
	s_waitcnt lgkmcnt(14)
	v_and_b32_e32 v52, 0xffff, v49
	v_add_nc_u32_e32 v49, v81, v58
	s_waitcnt lgkmcnt(13)
	v_and_b32_e32 v54, 0xffff, v95
	s_waitcnt lgkmcnt(11)
	v_and_b32_e32 v58, 0xffff, v53
	v_and_b32_e32 v64, 0xffff, v64
	v_and_b32_e32 v68, 0xffff, v68
	v_and_b32_e32 v72, 0xffff, v72
	v_and_b32_e32 v74, 0xffff, v74
	v_and_b32_e32 v78, 0xffff, v78
	v_add_nc_u32_e32 v46, v79, v56
	v_and_b32_e32 v56, 0xffff, v55
	v_add_nc_u32_e32 v52, v52, v60
	s_waitcnt lgkmcnt(10)
	v_and_b32_e32 v60, 0xffff, v51
	v_add_nc_u32_e32 v55, v54, v62
	v_add_nc_u32_e32 v51, v58, v66
	s_waitcnt lgkmcnt(8)
	v_and_b32_e32 v58, 0xffff, v73
	s_waitcnt lgkmcnt(7)
	v_and_b32_e32 v62, 0xffff, v71
	s_waitcnt lgkmcnt(5)
	v_and_b32_e32 v66, 0xffff, v69
	v_and_b32_e32 v70, 0xffff, v70
	v_and_b32_e32 v76, 0xffff, v76
	v_add_nc_u32_e32 v53, v56, v64
	v_and_b32_e32 v56, 0xffff, v75
	v_add_nc_u32_e32 v54, v60, v68
	v_and_b32_e32 v64, 0xffff, v57
	v_add_nc_u32_e32 v60, v58, v72
	v_add_nc_u32_e32 v58, v62, v74
	s_waitcnt lgkmcnt(4)
	v_and_b32_e32 v62, 0xffff, v59
	v_add_nc_u32_e32 v59, v66, v78
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v66, 0xffff, v63
	v_add_nc_u32_e32 v57, v56, v70
	v_add_nc_u32_e32 v56, v64, v76
	v_and_b32_e32 v64, 0xffff, v67
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v67, 0xffff, v61
	v_add_nc_u32_e32 v61, v66, v84
	v_lshlrev_b32_e32 v66, 2, v35
	v_and_b32_e32 v65, 0xffff, v65
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v66, v25 offset:64
	v_lshlrev_b32_e32 v25, 2, v37
	v_lshlrev_b32_e32 v66, 2, v40
	v_add_nc_u32_e32 v63, v65, v83
	v_add_nc_u32_e32 v65, v67, v85
	v_lshlrev_b32_e32 v67, 2, v38
	v_lshlrev_b32_e32 v68, 2, v36
	v_lshlrev_b32_e32 v69, 2, v39
	ds_store_b32 v25, v26 offset:64
	ds_store_b32 v66, v27 offset:64
	ds_store_b32 v67, v28 offset:64
	ds_store_b32 v68, v17 offset:64
	ds_store_b32 v69, v18 offset:64
	v_lshlrev_b32_e32 v17, 2, v42
	v_lshlrev_b32_e32 v18, 2, v45
	v_lshlrev_b32_e32 v25, 2, v43
	v_lshlrev_b32_e32 v26, 2, v41
	v_lshlrev_b32_e32 v27, 2, v44
	ds_store_b32 v17, v19 offset:64
	ds_store_b32 v18, v20 offset:64
	ds_store_b32 v25, v9 offset:64
	ds_store_b32 v26, v10 offset:64
	ds_store_b32 v27, v11 offset:64
	v_lshlrev_b32_e32 v9, 2, v47
	v_lshlrev_b32_e32 v10, 2, v50
	v_lshlrev_b32_e32 v11, 2, v48
	v_lshlrev_b32_e32 v17, 2, v46
	v_lshlrev_b32_e32 v18, 2, v49
	v_and_b32_e32 v80, 0xffff, v80
	ds_store_b32 v9, v12 offset:64
	ds_store_b32 v10, v1 offset:64
	ds_store_b32 v11, v2 offset:64
	ds_store_b32 v17, v3 offset:64
	ds_store_b32 v18, v4 offset:64
	v_lshlrev_b32_e32 v1, 2, v52
	v_and_b32_e32 v82, 0xffff, v82
	v_lshlrev_b32_e32 v2, 2, v55
	v_lshlrev_b32_e32 v3, 2, v53
	v_lshlrev_b32_e32 v4, 2, v51
	v_lshlrev_b32_e32 v9, 2, v54
	v_add_nc_u32_e32 v62, v62, v80
	ds_store_b32 v1, v21 offset:64
	ds_store_b32 v2, v22 offset:64
	ds_store_b32 v3, v23 offset:64
	ds_store_b32 v4, v24 offset:64
	ds_store_b32 v9, v13 offset:64
	v_lshlrev_b32_e32 v1, 2, v57
	v_add_nc_u32_e32 v64, v64, v82
	v_lshlrev_b32_e32 v2, 2, v60
	v_lshlrev_b32_e32 v3, 2, v58
	v_lshlrev_b32_e32 v4, 2, v56
	v_lshlrev_b32_e32 v9, 2, v59
	ds_store_b32 v1, v14 offset:64
	ds_store_b32 v2, v15 offset:64
	ds_store_b32 v3, v16 offset:64
	ds_store_b32 v4, v5 offset:64
	ds_store_b32 v9, v6 offset:64
	v_lshlrev_b32_e32 v1, 2, v62
	v_lshlrev_b32_e32 v2, 2, v64
	v_lshlrev_b32_e32 v3, 2, v63
	v_lshlrev_b32_e32 v4, 2, v61
	v_lshlrev_b32_e32 v5, 2, v65
	ds_store_b32 v1, v7 offset:64
	ds_store_b32 v2, v8 offset:64
	ds_store_b32 v3, v29 offset:64
	ds_store_b32 v4, v30 offset:64
	ds_store_b32 v5, v31 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s3
; %bb.352:                              ; %_ZN7rocprim16block_radix_rankILj512ELj4ELNS_26block_radix_rank_algorithmE0ELj1ELj1EE9rank_keysIjLj31EZNS_6detail25onesweep_iteration_helperIjtjLj512ELj31ELj4ELb0ELS1_0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEESB_NSA_ItEESC_EEvT0_T1_T2_T3_PjSH_PNS4_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS4_11raw_storageINS4_16block_radix_rankILj512ELj4ELb0ELj1ELj1EE13storage_type_EEESE_RA1_jS12_.exit._crit_edge.i.i
	v_mov_b32_e32 v1, 0
; %bb.353:                              ; %Flow96
	s_and_not1_saveexec_b32 s3, s2
	s_cbranch_execz .LBB41_364
; %bb.354:
	v_lshl_or_b32 v3, s15, 4, v0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v7, 0
	s_mov_b32 s4, 0
	s_mov_b32 s5, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v34
	v_add_co_u32 v1, s2, s86, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s2, s87, v2, s2
                                        ; implicit-def: $sgpr2
	global_store_b32 v[1:2], v3, off
.LBB41_355:                             ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB41_358 Depth 2
	s_or_b32 s2, s2, exec_lo
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB41_361
; %bb.356:                              ;   in Loop: Header=BB41_355 Depth=1
	s_add_i32 s5, s5, -1
	s_mov_b32 s6, exec_lo
	v_lshl_or_b32 v3, s5, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s2, s86, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s2, s87, v6, s2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB41_360
; %bb.357:                              ; %.lr.ph.i.i.preheader
                                        ;   in Loop: Header=BB41_355 Depth=1
	s_mov_b32 s9, 0
.LBB41_358:                             ; %.lr.ph.i.i
                                        ;   Parent Loop BB41_355 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s2, 0, v3
	s_or_b32 s9, s2, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB41_358
; %bb.359:                              ; %Flow93
                                        ;   in Loop: Header=BB41_355 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
.LBB41_360:                             ; %Flow94
                                        ;   in Loop: Header=BB41_355 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s6
	v_and_b32_e32 v5, 0x3fffffff, v8
	v_cmp_eq_u32_e64 s2, 0x80000000, v3
	v_add_nc_u32_e32 v7, v5, v7
	s_branch .LBB41_362
.LBB41_361:                             ;   in Loop: Header=BB41_355 Depth=1
                                        ; implicit-def: $sgpr5
.LBB41_362:                             ; %Flow95
                                        ;   in Loop: Header=BB41_355 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s6, exec_lo, s2
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB41_355
; %bb.363:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v3, v7, v34
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v7, v33
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v2, v1
	ds_store_b32 v4, v2
.LBB41_364:                             ; %Flow97
	s_or_b32 exec_lo, exec_lo, s3
	v_lshlrev_b32_e32 v2, 2, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b32_e32 v125, 1, v32
	v_add_nc_u32_e32 v70, 64, v2
	v_lshlrev_b32_e32 v2, 2, v0
	v_or_b32_e32 v32, 0x3c00, v0
	v_lshlrev_b32_e32 v35, 1, v35
	v_lshlrev_b32_e32 v37, 1, v37
	ds_load_2addr_stride64_b32 v[9:10], v70 offset0:8 offset1:16
	ds_load_2addr_stride64_b32 v[11:12], v70 offset0:24 offset1:32
	ds_load_2addr_stride64_b32 v[13:14], v70 offset0:40 offset1:48
	ds_load_2addr_stride64_b32 v[16:17], v70 offset0:56 offset1:64
	ds_load_2addr_stride64_b32 v[18:19], v70 offset0:72 offset1:80
	ds_load_2addr_stride64_b32 v[21:22], v70 offset0:88 offset1:96
	ds_load_2addr_stride64_b32 v[23:24], v70 offset0:104 offset1:112
	ds_load_b32 v78, v2 offset:64
	v_lshlrev_b32_e32 v40, 1, v40
	v_lshlrev_b32_e32 v38, 1, v38
	v_lshlrev_b32_e32 v36, 1, v36
	v_lshlrev_b32_e32 v39, 1, v39
	v_lshlrev_b32_e32 v42, 1, v42
	v_lshlrev_b32_e32 v45, 1, v45
	v_lshlrev_b32_e32 v43, 1, v43
	v_lshlrev_b32_e32 v41, 1, v41
	v_lshlrev_b32_e32 v44, 1, v44
	v_lshlrev_b32_e32 v47, 1, v47
	v_lshlrev_b32_e32 v50, 1, v50
	v_lshlrev_b32_e32 v48, 1, v48
	s_waitcnt lgkmcnt(7)
	v_lshrrev_b32_e32 v3, s80, v9
	s_waitcnt lgkmcnt(6)
	v_lshrrev_b32_e32 v4, s80, v11
	s_waitcnt lgkmcnt(5)
	v_lshrrev_b32_e32 v5, s80, v13
	s_waitcnt lgkmcnt(4)
	v_lshrrev_b32_e32 v6, s80, v16
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v7, s80, v18
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v8, s80, v21
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v15, s80, v23
	v_and_b32_e32 v2, s8, v5
	v_and_b32_e32 v3, s8, v3
	v_and_b32_e32 v5, s8, v6
	v_and_b32_e32 v4, s8, v4
	v_and_b32_e32 v6, s8, v7
	v_lshlrev_b32_e32 v67, 2, v2
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v2, s80, v78
	v_and_b32_e32 v7, s8, v8
	v_and_b32_e32 v8, s8, v15
	v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v72, 2, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_and_b32_e32 v2, s8, v2
	v_lshlrev_b32_e32 v31, 2, v5
	v_lshrrev_b32_e32 v5, s80, v10
	v_lshlrev_b32_e32 v69, 2, v4
	v_lshlrev_b32_e32 v27, 2, v6
	v_lshlrev_b32_e32 v80, 2, v2
	v_lshlrev_b32_e32 v25, 2, v7
	v_lshlrev_b32_e32 v20, 2, v8
	ds_load_b32 v4, v72
	ds_load_b32 v6, v69
	ds_load_b32 v79, v67
	ds_load_b32 v82, v31
	ds_load_b32 v83, v27
	ds_load_b32 v84, v25
	ds_load_b32 v85, v20
	v_and_b32_e32 v5, s8, v5
	ds_load_b32 v29, v80
	v_lshrrev_b32_e32 v7, s80, v12
	v_lshrrev_b32_e32 v15, s80, v17
	v_lshrrev_b32_e32 v2, s80, v22
	v_lshlrev_b32_e32 v81, 2, v5
	v_lshrrev_b32_e32 v8, s80, v14
	v_lshrrev_b32_e32 v26, s80, v19
	v_lshrrev_b32_e32 v28, s80, v24
	v_and_b32_e32 v7, s8, v7
	ds_load_b32 v76, v81
	v_and_b32_e32 v15, s8, v15
	v_and_b32_e32 v2, s8, v2
	v_and_b32_e32 v8, s8, v8
	v_and_b32_e32 v26, s8, v26
	v_and_b32_e32 v28, s8, v28
	v_lshlrev_b32_e32 v73, 2, v7
	v_lshlrev_b32_e32 v68, 2, v15
	v_lshlrev_b32_e32 v30, 2, v2
	v_or_b32_e32 v15, 0x200, v0
	v_lshlrev_b32_e32 v71, 2, v8
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v29, v0
	v_lshlrev_b32_e32 v66, 2, v26
	v_lshlrev_b32_e32 v26, 2, v28
	ds_load_b32 v86, v73
	ds_load_b32 v87, v71
	ds_load_b32 v88, v68
	ds_load_b32 v89, v66
	ds_load_b32 v90, v30
	ds_load_b32 v92, v26
	v_or_b32_e32 v8, 0x400, v0
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	v_add_nc_u32_e32 v2, v4, v15
	v_or_b32_e32 v7, 0x600, v0
	v_or_b32_e32 v5, 0x800, v0
	v_or_b32_e32 v4, 0xa00, v0
	v_lshlrev_b32_e32 v46, 1, v46
	v_lshlrev_b64 v[74:75], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v76, v8
	v_add_co_u32 v28, s2, s70, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v29, s2, s71, v29, s2
	v_lshlrev_b64 v[76:77], 2, v[2:3]
	v_add_nc_u32_e32 v2, v6, v7
	v_add_co_u32 v74, s2, s70, v74
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v75, s2, s71, v75, s2
	global_store_b32 v[28:29], v78, off
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v86, v5
	global_store_b32 v[74:75], v9, off
	v_add_co_u32 v74, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v75, s2, s71, v77, s2
	v_lshlrev_b64 v[76:77], 2, v[2:3]
	v_or_b32_e32 v6, 0xc00, v0
	v_add_nc_u32_e32 v2, v79, v4
	v_add_co_u32 v28, s2, s70, v28
	v_add_co_ci_u32_e64 v29, s2, s71, v29, s2
	v_add_co_u32 v76, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[78:79], 2, v[2:3]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v87, v6
	v_or_b32_e32 v9, 0xe00, v0
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	s_clause 0x2
	global_store_b32 v[74:75], v10, off
	global_store_b32 v[28:29], v11, off
	global_store_b32 v[76:77], v12, off
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	v_add_nc_u32_e32 v2, v82, v9
	v_or_b32_e32 v11, 0x1000, v0
	v_add_co_u32 v74, s2, s70, v78
	v_or_b32_e32 v12, 0x1200, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[76:77], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v88, v11
	v_add_co_ci_u32_e64 v75, s2, s71, v79, s2
	v_add_co_u32 v28, s2, s70, v28
	v_add_co_ci_u32_e64 v29, s2, s71, v29, s2
	v_add_co_u32 v76, s2, s70, v76
	v_lshlrev_b64 v[78:79], 2, v[2:3]
	v_add_nc_u32_e32 v2, v83, v12
	v_or_b32_e32 v10, 0x1400, v0
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	s_clause 0x2
	global_store_b32 v[74:75], v13, off
	global_store_b32 v[28:29], v14, off
	global_store_b32 v[76:77], v16, off
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v2, v89, v10
	v_or_b32_e32 v13, 0x1600, v0
	v_or_b32_e32 v14, 0x1800, v0
	v_add_co_u32 v74, s2, s70, v78
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[76:77], 2, v[2:3]
	v_add_nc_u32_e32 v2, v84, v13
	v_add_co_ci_u32_e64 v75, s2, s71, v79, s2
	v_add_co_u32 v28, s2, s70, v28
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[78:79], 2, v[2:3]
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v90, v14
	ds_load_2addr_stride64_b32 v[90:91], v70 offset0:120 offset1:128
	v_add_co_ci_u32_e64 v29, s2, s71, v29, s2
	v_add_co_u32 v76, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	s_clause 0x1
	global_store_b32 v[74:75], v17, off
	global_store_b32 v[28:29], v18, off
	ds_load_2addr_stride64_b32 v[74:75], v70 offset0:136 offset1:144
	v_or_b32_e32 v17, 0x1a00, v0
	global_store_b32 v[76:77], v19, off
	v_lshlrev_b64 v[18:19], 2, v[2:3]
	v_add_co_u32 v28, s2, s70, v78
	v_add_nc_u32_e32 v2, v85, v17
	v_add_co_ci_u32_e64 v29, s2, s71, v79, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v76, s2, s70, v18
	v_add_co_ci_u32_e64 v77, s2, s71, v19, s2
	ds_load_2addr_stride64_b32 v[78:79], v70 offset0:152 offset1:160
	v_lshlrev_b64 v[18:19], 2, v[2:3]
	v_or_b32_e32 v16, 0x1c00, v0
	ds_load_2addr_stride64_b32 v[95:96], v70 offset0:168 offset1:176
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v82, s80, v90
	v_lshrrev_b32_e32 v83, s80, v91
	v_lshlrev_b32_e32 v49, 1, v49
	v_add_nc_u32_e32 v2, v92, v16
	v_add_co_u32 v92, s2, s70, v18
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v93, s2, s71, v19, s2
	v_and_b32_e32 v19, s8, v82
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v84, s80, v74
	v_and_b32_e32 v82, s8, v83
	v_lshlrev_b64 v[97:98], 2, v[2:3]
	v_or_b32_e32 v18, 0x1e00, v0
	v_lshlrev_b32_e32 v89, 2, v19
	v_and_b32_e32 v2, s8, v84
	v_lshlrev_b32_e32 v87, 2, v82
	v_lshrrev_b32_e32 v19, s80, v75
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v82, s80, v79
	ds_load_b32 v94, v89
	v_lshlrev_b32_e32 v85, 2, v2
	ds_load_b32 v99, v87
	v_lshrrev_b32_e32 v2, s80, v78
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v83, s80, v95
	v_lshrrev_b32_e32 v84, s80, v96
	v_and_b32_e32 v19, s8, v19
	v_and_b32_e32 v82, s8, v82
	v_and_b32_e32 v2, s8, v2
	v_and_b32_e32 v83, s8, v83
	v_and_b32_e32 v100, s8, v84
	v_lshlrev_b32_e32 v88, 2, v19
	v_lshlrev_b32_e32 v84, 2, v82
	v_lshlrev_b32_e32 v86, 2, v2
	v_lshlrev_b32_e32 v83, 2, v83
	v_lshlrev_b32_e32 v82, 2, v100
	ds_load_b32 v100, v85
	ds_load_b32 v101, v88
	ds_load_b32 v102, v86
	ds_load_b32 v103, v84
	ds_load_b32 v104, v83
	ds_load_b32 v105, v82
	v_or_b32_e32 v19, 0x2000, v0
	s_clause 0x2
	global_store_b32 v[28:29], v21, off
	global_store_b32 v[76:77], v22, off
	global_store_b32 v[92:93], v23, off
	v_or_b32_e32 v22, 0x2200, v0
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v2, v94, v18
	v_add_co_u32 v76, s2, s70, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v77, s2, s71, v98, s2
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v99, v19
	v_or_b32_e32 v23, 0x2400, v0
	v_or_b32_e32 v21, 0x2600, v0
	v_lshlrev_b32_e32 v52, 1, v52
	v_lshlrev_b32_e32 v55, 1, v55
	v_lshlrev_b64 v[92:93], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v100, v22
	v_add_co_u32 v28, s2, s70, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v29, s2, s71, v29, s2
	v_lshlrev_b64 v[97:98], 2, v[2:3]
	v_add_co_u32 v92, s2, s70, v92
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v93, s2, s71, v93, s2
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v101, v23
	s_clause 0x2
	global_store_b32 v[76:77], v24, off
	global_store_b32 v[28:29], v90, off
	global_store_b32 v[92:93], v91, off
	v_add_co_u32 v76, s2, s70, v97
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v77, s2, s71, v98, s2
	ds_load_2addr_stride64_b32 v[97:98], v70 offset0:184 offset1:192
	ds_load_2addr_stride64_b32 v[106:107], v70 offset0:200 offset1:208
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v102, v21
	v_or_b32_e32 v24, 0x2800, v0
	global_store_b32 v[76:77], v74, off
	v_lshlrev_b32_e32 v53, 1, v53
	v_lshlrev_b32_e32 v51, 1, v51
	v_lshlrev_b64 v[90:91], 2, v[2:3]
	v_add_co_u32 v92, s2, s70, v28
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v103, v24
	v_or_b32_e32 v28, 0x2a00, v0
	v_add_co_ci_u32_e64 v93, s2, s71, v29, s2
	v_add_co_u32 v90, s2, s70, v90
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[76:77], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v104, v28
	v_add_co_ci_u32_e64 v91, s2, s71, v91, s2
	s_clause 0x1
	global_store_b32 v[92:93], v75, off
	global_store_b32 v[90:91], v78, off
	v_lshlrev_b64 v[74:75], 2, v[2:3]
	ds_load_2addr_stride64_b32 v[108:109], v70 offset0:216 offset1:224
	ds_load_2addr_stride64_b32 v[110:111], v70 offset0:232 offset1:240
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v70, s80, v97
	v_add_co_u32 v76, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	v_lshrrev_b32_e32 v78, s80, v98
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v90, s80, v106
	v_add_co_u32 v99, s2, s70, v74
	v_and_b32_e32 v74, s8, v70
	v_or_b32_e32 v29, 0x2c00, v0
	v_add_co_ci_u32_e64 v100, s2, s71, v75, s2
	v_and_b32_e32 v75, s8, v78
	v_and_b32_e32 v78, s8, v90
	v_lshlrev_b32_e32 v122, 2, v74
	v_add_nc_u32_e32 v2, v105, v29
	v_or_b32_e32 v70, 0x2e00, v0
	v_lshlrev_b32_e32 v123, 2, v75
	v_lshlrev_b32_e32 v93, 2, v78
	ds_load_b32 v78, v122
	v_lshlrev_b64 v[101:102], 2, v[2:3]
	v_lshrrev_b32_e32 v2, s80, v107
	ds_load_b32 v105, v123
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v74, s80, v108
	v_lshrrev_b32_e32 v75, s80, v109
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v90, s80, v110
	v_and_b32_e32 v2, s8, v2
	v_lshrrev_b32_e32 v91, s80, v111
	ds_load_b32 v112, v93
	v_and_b32_e32 v74, s8, v74
	v_and_b32_e32 v75, s8, v75
	v_and_b32_e32 v90, s8, v90
	v_lshlrev_b32_e32 v124, 2, v2
	v_and_b32_e32 v2, s8, v91
	v_lshlrev_b32_e32 v94, 2, v74
	v_lshlrev_b32_e32 v92, 2, v75
	v_lshlrev_b32_e32 v91, 2, v90
	v_or_b32_e32 v75, 0x3000, v0
	v_lshlrev_b32_e32 v90, 2, v2
	ds_load_b32 v113, v124
	ds_load_b32 v114, v94
	ds_load_b32 v115, v92
	ds_load_b32 v116, v91
	ds_load_b32 v117, v90
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v2, v78, v70
	v_add_co_u32 v101, s2, s70, v101
	v_or_b32_e32 v74, 0x3200, v0
	v_add_co_ci_u32_e64 v102, s2, s71, v102, s2
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[103:104], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v105, v75
	s_clause 0x2
	global_store_b32 v[76:77], v79, off
	global_store_b32 v[99:100], v95, off
	global_store_b32 v[101:102], v96, off
	v_or_b32_e32 v77, 0x3400, v0
	v_or_b32_e32 v76, 0x3800, v0
	v_lshlrev_b32_e32 v54, 1, v54
	v_lshlrev_b64 v[78:79], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v112, v74
	v_add_co_u32 v95, s2, s70, v103
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v96, s2, s71, v104, s2
	v_lshlrev_b64 v[99:100], 2, v[2:3]
	v_add_co_u32 v101, s2, s70, v78
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v113, v77
	v_or_b32_e32 v78, 0x3600, v0
	v_add_co_ci_u32_e64 v102, s2, s71, v79, s2
	v_add_co_u32 v99, s2, s70, v99
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[103:104], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v114, v78
	v_add_co_ci_u32_e64 v100, s2, s71, v100, s2
	s_clause 0x2
	global_store_b32 v[95:96], v97, off
	global_store_b32 v[101:102], v98, off
	global_store_b32 v[99:100], v106, off
	v_lshlrev_b64 v[99:100], 2, v[2:3]
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v2, v115, v76
	v_or_b32_e32 v79, 0x3a00, v0
	v_add_co_u32 v112, s2, s70, v103
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v113, s2, s71, v104, s2
	v_lshlrev_b64 v[101:102], 2, v[2:3]
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v116, v79
	s_lshl_b64 s[2:3], s[84:85], 1
	v_lshlrev_b32_e32 v57, 1, v57
	s_add_u32 s4, s72, s2
	v_add_co_u32 v114, s2, s70, v99
	v_lshlrev_b64 v[103:104], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v117, v32
	v_add_co_ci_u32_e64 v115, s2, s71, v100, s2
	v_add_co_u32 v116, s2, s70, v101
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[118:119], 2, v[2:3]
	v_add_co_ci_u32_e64 v117, s2, s71, v102, s2
	v_add_co_u32 v120, s2, s70, v103
	v_add_co_ci_u32_e64 v121, s2, s71, v104, s2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v118, s2, s70, v118
	s_addc_u32 s5, s73, s3
	v_add_co_ci_u32_e64 v119, s2, s71, v119, s2
	s_clause 0x2
	global_load_b128 v[95:98], v125, s[4:5]
	global_load_b128 v[99:102], v125, s[4:5] offset:16
	global_load_b128 v[103:106], v125, s[4:5] offset:32
	s_clause 0x4
	global_store_b32 v[112:113], v107, off
	global_store_b32 v[114:115], v108, off
	global_store_b32 v[116:117], v109, off
	global_store_b32 v[120:121], v110, off
	global_store_b32 v[118:119], v111, off
	s_clause 0x1
	global_load_b96 v[107:109], v125, s[4:5] offset:48
	global_load_u16 v2, v125, s[4:5] offset:60
	v_lshlrev_b32_e32 v110, 1, v0
	v_lshlrev_b32_e32 v60, 1, v60
	v_lshlrev_b32_e32 v58, 1, v58
	v_lshlrev_b32_e32 v56, 1, v56
	v_lshlrev_b32_e32 v59, 1, v59
	v_lshlrev_b32_e32 v62, 1, v62
	v_lshlrev_b32_e32 v64, 1, v64
	v_lshlrev_b32_e32 v63, 1, v63
	v_lshlrev_b32_e32 v61, 1, v61
	v_lshlrev_b32_e32 v65, 1, v65
	v_lshlrev_b32_e32 v111, 1, v0
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b16 v35, v95 offset:64
	ds_store_b16_d16_hi v37, v95 offset:64
	ds_store_b16 v40, v96 offset:64
	ds_store_b16_d16_hi v38, v96 offset:64
	ds_store_b16 v36, v97 offset:64
	ds_store_b16_d16_hi v39, v97 offset:64
	ds_store_b16 v42, v98 offset:64
	ds_store_b16_d16_hi v45, v98 offset:64
	ds_store_b16 v43, v99 offset:64
	ds_store_b16_d16_hi v41, v99 offset:64
	ds_store_b16 v44, v100 offset:64
	ds_store_b16_d16_hi v47, v100 offset:64
	ds_store_b16 v50, v101 offset:64
	ds_store_b16_d16_hi v48, v101 offset:64
	ds_store_b16 v46, v102 offset:64
	ds_store_b16_d16_hi v49, v102 offset:64
	ds_store_b16 v52, v103 offset:64
	ds_store_b16_d16_hi v55, v103 offset:64
	ds_store_b16 v53, v104 offset:64
	ds_store_b16_d16_hi v51, v104 offset:64
	ds_store_b16 v54, v105 offset:64
	ds_store_b16_d16_hi v57, v105 offset:64
	ds_store_b16 v60, v106 offset:64
	ds_store_b16_d16_hi v58, v106 offset:64
	ds_store_b16 v56, v107 offset:64
	ds_store_b16_d16_hi v59, v107 offset:64
	ds_store_b16 v62, v108 offset:64
	ds_store_b16_d16_hi v64, v108 offset:64
	ds_store_b16 v63, v109 offset:64
	ds_store_b16_d16_hi v61, v109 offset:64
	ds_store_b16 v65, v2 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v37, v110 offset:64
	ds_load_b32 v2, v80
	ds_load_b32 v35, v72
	ds_load_b32 v36, v81
	ds_load_b32 v38, v69
	ds_load_b32 v39, v73
	ds_load_b32 v40, v67
	ds_load_b32 v41, v71
	ds_load_b32 v42, v31
	ds_load_u16 v43, v111 offset:1088
	ds_load_u16 v44, v111 offset:2112
	ds_load_u16 v45, v111 offset:3136
	ds_load_u16 v46, v111 offset:4160
	ds_load_u16 v47, v111 offset:5184
	ds_load_u16 v48, v111 offset:6208
	ds_load_u16 v49, v111 offset:7232
	ds_load_u16 v50, v111 offset:8256
	ds_load_b32 v51, v68
	ds_load_b32 v27, v27
	ds_load_b32 v52, v66
	ds_load_b32 v53, v25
	ds_load_b32 v54, v30
	ds_load_b32 v20, v20
	ds_load_b32 v55, v26
	ds_load_b32 v56, v89
	ds_load_u16 v57, v111 offset:9280
	ds_load_u16 v58, v111 offset:10304
	ds_load_u16 v59, v111 offset:11328
	ds_load_u16 v60, v111 offset:12352
	ds_load_u16 v61, v111 offset:13376
	ds_load_u16 v62, v111 offset:14400
	ds_load_u16 v63, v111 offset:15424
	ds_load_u16 v64, v111 offset:16448
	ds_load_b32 v65, v87
	ds_load_b32 v66, v85
	ds_load_b32 v67, v88
	ds_load_b32 v68, v86
	ds_load_b32 v69, v84
	ds_load_b32 v71, v83
	ds_load_b32 v72, v82
	ds_load_b32 v73, v122
	ds_load_u16 v80, v111 offset:17472
	ds_load_u16 v81, v111 offset:18496
	ds_load_u16 v82, v111 offset:19520
	ds_load_u16 v83, v111 offset:20544
	ds_load_u16 v84, v111 offset:21568
	ds_load_u16 v85, v111 offset:22592
	ds_load_u16 v86, v111 offset:23616
	ds_load_u16 v87, v111 offset:24640
	s_waitcnt lgkmcnt(47)
	v_add_nc_u32_e32 v2, v2, v0
	ds_load_b32 v88, v123
	ds_load_b32 v89, v93
	ds_load_b32 v93, v124
	ds_load_b32 v94, v94
	ds_load_b32 v92, v92
	ds_load_b32 v91, v91
	v_lshlrev_b64 v[25:26], 1, v[2:3]
	s_waitcnt lgkmcnt(52)
	v_add_nc_u32_e32 v2, v35, v15
	ds_load_u16 v15, v111 offset:25664
	ds_load_u16 v95, v111 offset:26688
	ds_load_u16 v96, v111 offset:27712
	ds_load_u16 v97, v111 offset:28736
	ds_load_u16 v98, v111 offset:29760
	ds_load_u16 v99, v111 offset:30784
	v_lshlrev_b64 v[30:31], 1, v[2:3]
	s_waitcnt lgkmcnt(57)
	v_add_nc_u32_e32 v2, v36, v8
	v_add_co_u32 v25, s2, s74, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v26, s2, s75, v26, s2
	v_lshlrev_b64 v[35:36], 1, v[2:3]
	s_waitcnt lgkmcnt(56)
	v_add_nc_u32_e32 v2, v38, v7
	v_add_co_u32 v7, s2, s74, v30
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s2, s75, v31, s2
	global_store_b16 v[25:26], v37, off
	v_lshlrev_b64 v[25:26], 1, v[2:3]
	s_waitcnt lgkmcnt(55)
	v_add_nc_u32_e32 v2, v39, v5
	s_waitcnt lgkmcnt(51)
	global_store_b16 v[7:8], v43, off
	v_add_co_u32 v7, s2, s74, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s2, s75, v36, s2
	v_lshlrev_b64 v[30:31], 1, v[2:3]
	v_add_nc_u32_e32 v2, v40, v4
	v_add_co_u32 v4, s2, s74, v25
	v_add_co_ci_u32_e64 v5, s2, s75, v26, s2
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[25:26], 1, v[2:3]
	v_add_nc_u32_e32 v2, v41, v6
	ds_load_b32 v38, v90
	s_waitcnt lgkmcnt(51)
	global_store_b16 v[7:8], v44, off
	s_waitcnt lgkmcnt(50)
	global_store_b16 v[4:5], v45, off
	v_add_co_u32 v30, s2, s74, v30
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	v_add_nc_u32_e32 v2, v42, v9
	v_add_co_ci_u32_e64 v31, s2, s75, v31, s2
	v_add_co_u32 v6, s2, s74, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	s_waitcnt lgkmcnt(44)
	v_add_nc_u32_e32 v2, v51, v11
	v_add_co_ci_u32_e64 v7, s2, s75, v26, s2
	v_add_co_u32 v4, s2, s74, v4
	v_lshlrev_b64 v[25:26], 1, v[2:3]
	s_waitcnt lgkmcnt(43)
	v_add_nc_u32_e32 v2, v27, v12
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	v_add_co_u32 v8, s2, s74, v8
	global_store_b16 v[30:31], v46, off
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b16 v[6:7], v47, off
	global_store_b16 v[4:5], v48, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	s_waitcnt lgkmcnt(42)
	v_add_nc_u32_e32 v2, v52, v10
	global_store_b16 v[8:9], v49, off
	v_add_co_u32 v6, s2, s74, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v26, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	s_waitcnt lgkmcnt(41)
	v_add_nc_u32_e32 v2, v53, v13
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(40)
	v_add_nc_u32_e32 v2, v54, v14
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	global_store_b16 v[6:7], v50, off
	s_waitcnt lgkmcnt(36)
	global_store_b16 v[4:5], v57, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	v_add_nc_u32_e32 v2, v20, v17
	s_waitcnt lgkmcnt(35)
	global_store_b16 v[8:9], v58, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	v_add_nc_u32_e32 v2, v55, v16
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	v_add_nc_u32_e32 v2, v56, v18
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_waitcnt lgkmcnt(34)
	global_store_b16 v[6:7], v59, off
	s_waitcnt lgkmcnt(33)
	global_store_b16 v[4:5], v60, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	s_waitcnt lgkmcnt(28)
	v_add_nc_u32_e32 v2, v65, v19
	global_store_b16 v[8:9], v61, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	s_waitcnt lgkmcnt(27)
	v_add_nc_u32_e32 v2, v66, v22
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(26)
	v_add_nc_u32_e32 v2, v67, v23
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b16 v[6:7], v62, off
	global_store_b16 v[4:5], v63, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	s_waitcnt lgkmcnt(25)
	v_add_nc_u32_e32 v2, v68, v21
	global_store_b16 v[8:9], v64, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	s_waitcnt lgkmcnt(24)
	v_add_nc_u32_e32 v2, v69, v24
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(23)
	v_add_nc_u32_e32 v2, v71, v28
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_waitcnt lgkmcnt(20)
	global_store_b16 v[6:7], v80, off
	s_waitcnt lgkmcnt(19)
	global_store_b16 v[4:5], v81, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	v_add_nc_u32_e32 v2, v72, v29
	s_waitcnt lgkmcnt(18)
	global_store_b16 v[8:9], v82, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	v_add_nc_u32_e32 v2, v73, v70
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(12)
	v_add_nc_u32_e32 v2, v88, v75
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b16 v[6:7], v83, off
	global_store_b16 v[4:5], v84, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	s_waitcnt lgkmcnt(11)
	v_add_nc_u32_e32 v2, v89, v74
	global_store_b16 v[8:9], v85, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	s_waitcnt lgkmcnt(10)
	v_add_nc_u32_e32 v2, v93, v77
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(9)
	v_add_nc_u32_e32 v2, v94, v78
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b16 v[6:7], v86, off
	global_store_b16 v[4:5], v87, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	s_waitcnt lgkmcnt(8)
	v_add_nc_u32_e32 v2, v92, v76
	s_waitcnt lgkmcnt(6)
	global_store_b16 v[8:9], v15, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	v_add_nc_u32_e32 v2, v91, v79
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v38, v32
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 1, v[2:3]
	v_add_co_u32 v10, s2, s74, v10
	v_add_co_ci_u32_e64 v11, s2, s75, v11, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s2, s74, v2
	v_add_co_ci_u32_e64 v3, s2, s75, v3, s2
	s_clause 0x4
	global_store_b16 v[6:7], v95, off
	global_store_b16 v[4:5], v96, off
	global_store_b16 v[8:9], v97, off
	global_store_b16 v[10:11], v98, off
	global_store_b16 v[2:3], v99, off
	s_load_b32 s0, s[0:1], 0x50
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s0
	s_cselect_b32 s0, -1, 0
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
; %bb.365:
	v_add_nc_u32_e32 v2, v33, v34
	s_or_b32 s7, s7, exec_lo
; %bb.366:                              ; %Flow105
	s_or_b32 exec_lo, exec_lo, s0
.LBB41_367:                             ; %Flow104
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB41_369
; %bb.368:                              ; %_ZN7rocprim6detail25onesweep_iteration_helperIjtjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEES8_NS7_ItEES9_EEvT0_T1_T2_T3_PjSE_PNS0_23onesweep_lookback_stateES3_jjjRNS4_13storage_type_E.exit.sink.split.i
	v_lshlrev_b32_e32 v3, 2, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	ds_load_b32 v3, v3
	v_add_co_u32 v0, vcc_lo, s78, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s79, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB41_369:                             ; %_ZN7rocprim6detail18onesweep_iterationILj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0EN6thrust10device_ptrIjEES5_NS4_ItEES6_jNS_19identity_decomposerEEEvT4_T5_T6_T7_jPT8_SD_PNS0_23onesweep_lookback_stateET9_jjj.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
		.amdhsa_group_segment_fixed_size 63552
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 127
		.amdhsa_next_free_sgpr 88
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
.Lfunc_end41:
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end41-_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEES7_NS6_ItEES8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 25440
; NumSgprs: 90
; NumVgprs: 127
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 63552 bytes/workgroup (compile time only)
; SGPRBlocks: 11
; VGPRBlocks: 15
; NumSGPRsForWavesPerEU: 90
; NumVGPRsForWavesPerEU: 127
; Occupancy: 8
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.protected	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj ; -- Begin function _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.globl	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	8
	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj: ; @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
; %bb.0:
	s_clause 0x3
	s_load_b128 s[80:83], s[0:1], 0x44
	s_load_b256 s[68:75], s[0:1], 0x0
	s_load_b128 s[76:79], s[0:1], 0x28
	s_load_b64 s[86:87], s[0:1], 0x38
	v_mul_u32_u24_e32 v32, 31, v0
	s_mul_i32 s84, s15, 0x3e00
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_u32 s15, s82
	s_cbranch_scc0 .LBB42_337
; %bb.1:
	s_load_b32 s4, s[0:1], 0x20
	s_mov_b32 s85, 0
	s_mul_i32 s66, s82, 0xffffc200
	v_dual_mov_b32 v4, -1 :: v_dual_lshlrev_b32 v1, 2, v32
	s_lshl_b64 s[2:3], s[84:85], 2
	v_mov_b32_e32 v3, -1
	s_waitcnt lgkmcnt(0)
	s_add_i32 s66, s66, s4
	s_add_u32 s4, s68, s2
	s_addc_u32 s3, s69, s3
	v_add_co_u32 v1, s4, s4, v1
	v_cmp_gt_u32_e64 s2, s66, v32
	v_add_co_ci_u32_e64 v2, null, s3, 0, s4
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB42_3
; %bb.2:
	global_load_b32 v4, v[1:2], off
.LBB42_3:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v5, 1, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s66, v5
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB42_5
; %bb.4:
	global_load_b32 v3, v[1:2], off offset:4
.LBB42_5:
	s_or_b32 exec_lo, exec_lo, s4
	v_dual_mov_b32 v5, -1 :: v_dual_add_nc_u32 v6, 2, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e64 s4, s66, v6
	v_mov_b32_e32 v6, -1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB42_7
; %bb.6:
	global_load_b32 v6, v[1:2], off offset:8
.LBB42_7:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v7, 3, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s66, v7
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB42_9
; %bb.8:
	global_load_b32 v5, v[1:2], off offset:12
.LBB42_9:
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v42, -1 :: v_dual_add_nc_u32 v7, 4, v32
	v_mov_b32_e32 v41, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s66, v7
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB42_11
; %bb.10:
	global_load_b32 v42, v[1:2], off offset:16
.LBB42_11:
	s_or_b32 exec_lo, exec_lo, s7
	v_add_nc_u32_e32 v7, 5, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s66, v7
	s_and_saveexec_b32 s8, s7
	s_cbranch_execz .LBB42_13
; %bb.12:
	global_load_b32 v41, v[1:2], off offset:20
.LBB42_13:
	s_or_b32 exec_lo, exec_lo, s8
	v_dual_mov_b32 v44, -1 :: v_dual_add_nc_u32 v7, 6, v32
	v_mov_b32_e32 v43, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s66, v7
	s_and_saveexec_b32 s9, s8
	s_cbranch_execz .LBB42_15
; %bb.14:
	global_load_b32 v44, v[1:2], off offset:24
.LBB42_15:
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v7, 7, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s66, v7
	s_and_saveexec_b32 s10, s9
	s_cbranch_execz .LBB42_17
; %bb.16:
	global_load_b32 v43, v[1:2], off offset:28
.LBB42_17:
	s_or_b32 exec_lo, exec_lo, s10
	v_dual_mov_b32 v46, -1 :: v_dual_add_nc_u32 v7, 8, v32
	v_mov_b32_e32 v45, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s66, v7
	s_and_saveexec_b32 s11, s10
	s_cbranch_execz .LBB42_19
; %bb.18:
	global_load_b32 v46, v[1:2], off offset:32
.LBB42_19:
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v7, 9, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s11, s66, v7
	s_and_saveexec_b32 s12, s11
	s_cbranch_execz .LBB42_21
; %bb.20:
	global_load_b32 v45, v[1:2], off offset:36
.LBB42_21:
	s_or_b32 exec_lo, exec_lo, s12
	v_dual_mov_b32 v48, -1 :: v_dual_add_nc_u32 v7, 10, v32
	v_mov_b32_e32 v47, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s66, v7
	s_and_saveexec_b32 s13, s12
	s_cbranch_execz .LBB42_23
; %bb.22:
	global_load_b32 v48, v[1:2], off offset:40
.LBB42_23:
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v7, 11, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s13, s66, v7
	s_and_saveexec_b32 s14, s13
	s_cbranch_execz .LBB42_25
; %bb.24:
	global_load_b32 v47, v[1:2], off offset:44
.LBB42_25:
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v50, -1 :: v_dual_add_nc_u32 v7, 12, v32
	v_mov_b32_e32 v49, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s14, s66, v7
	s_and_saveexec_b32 s16, s14
	s_cbranch_execz .LBB42_27
; %bb.26:
	global_load_b32 v50, v[1:2], off offset:48
.LBB42_27:
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v7, 13, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s16, s66, v7
	s_and_saveexec_b32 s17, s16
	s_cbranch_execz .LBB42_29
; %bb.28:
	global_load_b32 v49, v[1:2], off offset:52
.LBB42_29:
	s_or_b32 exec_lo, exec_lo, s17
	v_dual_mov_b32 v52, -1 :: v_dual_add_nc_u32 v7, 14, v32
	v_mov_b32_e32 v51, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s17, s66, v7
	s_and_saveexec_b32 s18, s17
	s_cbranch_execz .LBB42_31
; %bb.30:
	global_load_b32 v52, v[1:2], off offset:56
.LBB42_31:
	s_or_b32 exec_lo, exec_lo, s18
	v_add_nc_u32_e32 v7, 15, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s18, s66, v7
	s_and_saveexec_b32 s19, s18
	s_cbranch_execz .LBB42_33
; %bb.32:
	global_load_b32 v51, v[1:2], off offset:60
.LBB42_33:
	s_or_b32 exec_lo, exec_lo, s19
	v_dual_mov_b32 v54, -1 :: v_dual_add_nc_u32 v7, 16, v32
	v_mov_b32_e32 v53, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s19, s66, v7
	s_and_saveexec_b32 s20, s19
	s_cbranch_execz .LBB42_35
; %bb.34:
	global_load_b32 v54, v[1:2], off offset:64
.LBB42_35:
	s_or_b32 exec_lo, exec_lo, s20
	v_add_nc_u32_e32 v7, 17, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s20, s66, v7
	s_and_saveexec_b32 s21, s20
	s_cbranch_execz .LBB42_37
; %bb.36:
	global_load_b32 v53, v[1:2], off offset:68
.LBB42_37:
	s_or_b32 exec_lo, exec_lo, s21
	v_dual_mov_b32 v56, -1 :: v_dual_add_nc_u32 v7, 18, v32
	v_mov_b32_e32 v55, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s21, s66, v7
	s_and_saveexec_b32 s22, s21
	s_cbranch_execz .LBB42_39
; %bb.38:
	global_load_b32 v56, v[1:2], off offset:72
.LBB42_39:
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v7, 19, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s22, s66, v7
	s_and_saveexec_b32 s23, s22
	s_cbranch_execz .LBB42_41
; %bb.40:
	global_load_b32 v55, v[1:2], off offset:76
.LBB42_41:
	s_or_b32 exec_lo, exec_lo, s23
	v_dual_mov_b32 v58, -1 :: v_dual_add_nc_u32 v7, 20, v32
	v_mov_b32_e32 v57, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s23, s66, v7
	s_and_saveexec_b32 s24, s23
	s_cbranch_execz .LBB42_43
; %bb.42:
	global_load_b32 v58, v[1:2], off offset:80
.LBB42_43:
	s_or_b32 exec_lo, exec_lo, s24
	v_add_nc_u32_e32 v7, 21, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s24, s66, v7
	s_and_saveexec_b32 s25, s24
	s_cbranch_execz .LBB42_45
; %bb.44:
	global_load_b32 v57, v[1:2], off offset:84
.LBB42_45:
	s_or_b32 exec_lo, exec_lo, s25
	v_dual_mov_b32 v60, -1 :: v_dual_add_nc_u32 v7, 22, v32
	v_mov_b32_e32 v59, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s25, s66, v7
	s_and_saveexec_b32 s26, s25
	s_cbranch_execz .LBB42_47
; %bb.46:
	global_load_b32 v60, v[1:2], off offset:88
.LBB42_47:
	s_or_b32 exec_lo, exec_lo, s26
	v_add_nc_u32_e32 v7, 23, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s26, s66, v7
	s_and_saveexec_b32 s27, s26
	s_cbranch_execz .LBB42_49
; %bb.48:
	global_load_b32 v59, v[1:2], off offset:92
.LBB42_49:
	s_or_b32 exec_lo, exec_lo, s27
	v_dual_mov_b32 v62, -1 :: v_dual_add_nc_u32 v7, 24, v32
	v_mov_b32_e32 v61, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s27, s66, v7
	s_and_saveexec_b32 s28, s27
	s_cbranch_execz .LBB42_51
; %bb.50:
	global_load_b32 v62, v[1:2], off offset:96
.LBB42_51:
	s_or_b32 exec_lo, exec_lo, s28
	v_add_nc_u32_e32 v7, 25, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s28, s66, v7
	s_and_saveexec_b32 s29, s28
	s_cbranch_execz .LBB42_53
; %bb.52:
	global_load_b32 v61, v[1:2], off offset:100
.LBB42_53:
	s_or_b32 exec_lo, exec_lo, s29
	v_dual_mov_b32 v64, -1 :: v_dual_add_nc_u32 v7, 26, v32
	v_mov_b32_e32 v63, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s29, s66, v7
	s_and_saveexec_b32 s30, s29
	s_cbranch_execz .LBB42_55
; %bb.54:
	global_load_b32 v64, v[1:2], off offset:104
.LBB42_55:
	s_or_b32 exec_lo, exec_lo, s30
	v_add_nc_u32_e32 v7, 27, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s30, s66, v7
	s_and_saveexec_b32 s31, s30
	s_cbranch_execz .LBB42_57
; %bb.56:
	global_load_b32 v63, v[1:2], off offset:108
.LBB42_57:
	s_or_b32 exec_lo, exec_lo, s31
	v_dual_mov_b32 v66, -1 :: v_dual_add_nc_u32 v7, 28, v32
	v_mov_b32_e32 v65, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s31, s66, v7
	s_and_saveexec_b32 s33, s31
	s_cbranch_execz .LBB42_59
; %bb.58:
	global_load_b32 v66, v[1:2], off offset:112
.LBB42_59:
	s_or_b32 exec_lo, exec_lo, s33
	v_add_nc_u32_e32 v7, 29, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s33, s66, v7
	s_and_saveexec_b32 s34, s33
	s_cbranch_execz .LBB42_61
; %bb.60:
	global_load_b32 v65, v[1:2], off offset:116
.LBB42_61:
	s_or_b32 exec_lo, exec_lo, s34
	v_add_nc_u32_e32 v7, 30, v32
	v_mov_b32_e32 v67, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s34, s66, v7
	s_and_saveexec_b32 s35, s34
	s_cbranch_execz .LBB42_63
; %bb.62:
	global_load_b32 v67, v[1:2], off offset:120
.LBB42_63:                              ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIjEEjLj31EjEEvjT_RAT1__T0_jT2_.exit.i.i
	s_or_b32 exec_lo, exec_lo, s35
	v_or_b32_e32 v1, 0xfffffe00, v0
	v_dual_mov_b32 v7, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_mov_b32 s35, 0
.LBB42_64:                              ; %.lr.ph.i.i.i.i.i.i23.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v1, 0x200, v1
	ds_store_b32 v2, v7
	v_add_nc_u32_e32 v2, 0x800, v2
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v1
	s_or_b32 s35, vcc_lo, s35
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB42_64
; %bb.65:                               ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i25.i
	s_or_b32 exec_lo, exec_lo, s35
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_lshl_b32 s35, -1, s81
	v_lshrrev_b32_e32 v10, s80, v6
	s_not_b32 s67, s35
	s_mov_b32 s39, exec_lo
	v_and_b32_e32 v1, s67, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v2, 9, v1
	v_lshrrev_b32_e32 v1, 3, v1
	v_and_or_b32 v2, 0xe00, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v2
	v_add_lshl_u32 v7, v2, v1, 1
	v_lshrrev_b32_e32 v2, s80, v3
	ds_load_u16 v1, v7
	v_and_b32_e32 v2, s67, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 9, v2
	v_lshrrev_b32_e32 v2, 3, v2
	v_and_or_b32 v8, 0xe00, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 1, v8
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v9, v1, 1
	v_add_lshl_u32 v8, v8, v2, 1
	ds_store_b16 v7, v9
	ds_load_u16 v2, v8
	v_and_b32_e32 v9, s67, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 9, v9
	v_lshrrev_b32_e32 v9, 3, v9
	v_and_or_b32 v10, 0xe00, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 1, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v11, v2, 1
	v_add_lshl_u32 v15, v10, v9, 1
	v_lshrrev_b32_e32 v10, s80, v5
	ds_store_b16 v8, v11
	ds_load_u16 v9, v15
	v_and_b32_e32 v10, s67, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 9, v10
	v_lshrrev_b32_e32 v10, 3, v10
	v_and_or_b32 v11, 0xe00, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 1, v11
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v12, v9, 1
	v_add_lshl_u32 v17, v11, v10, 1
	v_lshrrev_b32_e32 v11, s80, v42
	ds_store_b16 v15, v12
	ds_load_u16 v10, v17
	v_and_b32_e32 v11, s67, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 9, v11
	v_lshrrev_b32_e32 v11, 3, v11
	v_and_or_b32 v12, 0xe00, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 1, v12
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v13, v10, 1
	v_add_lshl_u32 v19, v12, v11, 1
	v_lshrrev_b32_e32 v12, s80, v41
	ds_store_b16 v17, v13
	ds_load_u16 v11, v19
	v_and_b32_e32 v12, s67, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 9, v12
	v_lshrrev_b32_e32 v12, 3, v12
	v_and_or_b32 v13, 0xe00, v13, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 1, v13
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v14, v11, 1
	v_add_lshl_u32 v21, v13, v12, 1
	v_lshrrev_b32_e32 v13, s80, v44
	ds_store_b16 v19, v14
	ds_load_u16 v12, v21
	v_and_b32_e32 v13, s67, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 9, v13
	v_lshrrev_b32_e32 v13, 3, v13
	v_and_or_b32 v14, 0xe00, v14, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 1, v14
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v16, v12, 1
	v_add_lshl_u32 v23, v14, v13, 1
	v_lshrrev_b32_e32 v14, s80, v43
	ds_store_b16 v21, v16
	ds_load_u16 v13, v23
	v_and_b32_e32 v14, s67, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v16, 9, v14
	v_lshrrev_b32_e32 v14, 3, v14
	v_and_or_b32 v16, 0xe00, v16, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v16, 1, v16
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v18, v13, 1
	v_add_lshl_u32 v25, v16, v14, 1
	v_lshrrev_b32_e32 v16, s80, v46
	ds_store_b16 v23, v18
	ds_load_u16 v14, v25
	v_and_b32_e32 v16, s67, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v18, 9, v16
	v_lshrrev_b32_e32 v16, 3, v16
	v_and_or_b32 v18, 0xe00, v18, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v18, 1, v18
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v20, v14, 1
	v_add_lshl_u32 v27, v18, v16, 1
	v_lshrrev_b32_e32 v18, s80, v45
	ds_store_b16 v25, v20
	ds_load_u16 v16, v27
	v_and_b32_e32 v18, s67, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v20, 9, v18
	v_lshrrev_b32_e32 v18, 3, v18
	v_and_or_b32 v20, 0xe00, v20, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v20, 1, v20
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v22, v16, 1
	v_add_lshl_u32 v29, v20, v18, 1
	v_lshrrev_b32_e32 v20, s80, v48
	ds_store_b16 v27, v22
	ds_load_u16 v18, v29
	v_and_b32_e32 v20, s67, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v22, 9, v20
	v_lshrrev_b32_e32 v20, 3, v20
	v_and_or_b32 v22, 0xe00, v22, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v22, 1, v22
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v24, v18, 1
	v_add_lshl_u32 v31, v22, v20, 1
	v_lshrrev_b32_e32 v22, s80, v47
	ds_store_b16 v29, v24
	ds_load_u16 v20, v31
	v_and_b32_e32 v22, s67, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v24, 9, v22
	v_lshrrev_b32_e32 v22, 3, v22
	v_and_or_b32 v24, 0xe00, v24, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v24, 1, v24
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v26, v20, 1
	v_add_lshl_u32 v34, v24, v22, 1
	v_lshrrev_b32_e32 v24, s80, v50
	ds_store_b16 v31, v26
	ds_load_u16 v22, v34
	v_and_b32_e32 v24, s67, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v26, 9, v24
	v_lshrrev_b32_e32 v24, 3, v24
	v_and_or_b32 v26, 0xe00, v26, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v26, 1, v26
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v28, v22, 1
	v_add_lshl_u32 v36, v26, v24, 1
	v_lshrrev_b32_e32 v26, s80, v49
	ds_store_b16 v34, v28
	ds_load_u16 v24, v36
	v_and_b32_e32 v26, s67, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v28, 9, v26
	v_lshrrev_b32_e32 v26, 3, v26
	v_and_or_b32 v28, 0xe00, v28, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v28, 1, v28
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v30, v24, 1
	v_add_lshl_u32 v38, v28, v26, 1
	v_lshrrev_b32_e32 v28, s80, v52
	ds_store_b16 v36, v30
	ds_load_u16 v26, v38
	v_and_b32_e32 v28, s67, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v30, 9, v28
	v_lshrrev_b32_e32 v28, 3, v28
	v_and_or_b32 v30, 0xe00, v30, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v30, 1, v30
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v33, v26, 1
	v_add_lshl_u32 v40, v30, v28, 1
	v_lshrrev_b32_e32 v30, s80, v51
	ds_store_b16 v38, v33
	ds_load_u16 v28, v40
	v_and_b32_e32 v30, s67, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v33, 9, v30
	v_lshrrev_b32_e32 v30, 3, v30
	v_and_or_b32 v33, 0xe00, v33, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v33, 1, v33
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v35, v28, 1
	v_add_lshl_u32 v69, v33, v30, 1
	v_lshrrev_b32_e32 v33, s80, v54
	ds_store_b16 v40, v35
	ds_load_u16 v30, v69
	v_and_b32_e32 v33, s67, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v35, 9, v33
	v_lshrrev_b32_e32 v33, 3, v33
	v_and_or_b32 v35, 0xe00, v35, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v35, 1, v35
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v37, v30, 1
	v_add_lshl_u32 v71, v35, v33, 1
	v_lshrrev_b32_e32 v35, s80, v53
	ds_store_b16 v69, v37
	ds_load_u16 v33, v71
	v_and_b32_e32 v35, s67, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v37, 9, v35
	v_lshrrev_b32_e32 v35, 3, v35
	v_and_or_b32 v37, 0xe00, v37, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v37, 1, v37
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v39, v33, 1
	v_add_lshl_u32 v73, v37, v35, 1
	v_lshrrev_b32_e32 v37, s80, v56
	ds_store_b16 v71, v39
	ds_load_u16 v35, v73
	v_and_b32_e32 v37, s67, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 9, v37
	v_lshrrev_b32_e32 v37, 3, v37
	v_and_or_b32 v39, 0xe00, v39, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 1, v39
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v68, v35, 1
	v_add_lshl_u32 v75, v39, v37, 1
	v_lshrrev_b32_e32 v39, s80, v55
	ds_store_b16 v73, v68
	ds_load_u16 v37, v75
	v_and_b32_e32 v39, s67, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 9, v39
	v_lshrrev_b32_e32 v39, 3, v39
	v_and_or_b32 v68, 0xe00, v68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 1, v68
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v70, v37, 1
	v_add_lshl_u32 v77, v68, v39, 1
	v_lshrrev_b32_e32 v68, s80, v58
	ds_store_b16 v75, v70
	ds_load_u16 v39, v77
	v_and_b32_e32 v68, s67, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 9, v68
	v_lshrrev_b32_e32 v68, 3, v68
	v_and_or_b32 v70, 0xe00, v70, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 1, v70
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v72, v39, 1
	v_add_lshl_u32 v79, v70, v68, 1
	v_lshrrev_b32_e32 v70, s80, v57
	ds_store_b16 v77, v72
	ds_load_u16 v68, v79
	v_and_b32_e32 v70, s67, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 9, v70
	v_lshrrev_b32_e32 v70, 3, v70
	v_and_or_b32 v72, 0xe00, v72, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 1, v72
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v74, v68, 1
	v_add_lshl_u32 v81, v72, v70, 1
	v_lshrrev_b32_e32 v72, s80, v60
	ds_store_b16 v79, v74
	ds_load_u16 v70, v81
	v_and_b32_e32 v72, s67, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 9, v72
	v_lshrrev_b32_e32 v72, 3, v72
	v_and_or_b32 v74, 0xe00, v74, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 1, v74
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v76, v70, 1
	v_add_lshl_u32 v83, v74, v72, 1
	v_lshrrev_b32_e32 v74, s80, v59
	ds_store_b16 v81, v76
	ds_load_u16 v72, v83
	v_and_b32_e32 v74, s67, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 9, v74
	v_lshrrev_b32_e32 v74, 3, v74
	v_and_or_b32 v76, 0xe00, v76, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 1, v76
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v78, v72, 1
	v_add_lshl_u32 v85, v76, v74, 1
	v_lshrrev_b32_e32 v76, s80, v62
	ds_store_b16 v83, v78
	ds_load_u16 v74, v85
	v_and_b32_e32 v76, s67, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 9, v76
	v_lshrrev_b32_e32 v76, 3, v76
	v_and_or_b32 v78, 0xe00, v78, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 1, v78
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v80, v74, 1
	v_add_lshl_u32 v87, v78, v76, 1
	v_lshrrev_b32_e32 v78, s80, v61
	ds_store_b16 v85, v80
	ds_load_u16 v76, v87
	v_and_b32_e32 v78, s67, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 9, v78
	v_lshrrev_b32_e32 v78, 3, v78
	v_and_or_b32 v80, 0xe00, v80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 1, v80
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v82, v76, 1
	v_add_lshl_u32 v89, v80, v78, 1
	v_lshrrev_b32_e32 v80, s80, v64
	ds_store_b16 v87, v82
	ds_load_u16 v78, v89
	v_and_b32_e32 v80, s67, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 9, v80
	v_lshrrev_b32_e32 v80, 3, v80
	v_and_or_b32 v82, 0xe00, v82, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 1, v82
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v84, v78, 1
	v_add_lshl_u32 v90, v82, v80, 1
	v_lshrrev_b32_e32 v82, s80, v63
	ds_store_b16 v89, v84
	ds_load_u16 v80, v90
	v_and_b32_e32 v82, s67, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 9, v82
	v_lshrrev_b32_e32 v82, 3, v82
	v_and_or_b32 v84, 0xe00, v84, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 1, v84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v86, v80, 1
	v_add_lshl_u32 v91, v84, v82, 1
	v_lshrrev_b32_e32 v84, s80, v66
	ds_store_b16 v90, v86
	ds_load_u16 v82, v91
	v_and_b32_e32 v84, s67, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 9, v84
	v_lshrrev_b32_e32 v84, 3, v84
	v_and_or_b32 v86, 0xe00, v86, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 1, v86
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v88, v82, 1
	v_add_lshl_u32 v92, v86, v84, 1
	v_lshrrev_b32_e32 v86, s80, v65
	ds_store_b16 v91, v88
	ds_load_u16 v84, v92
	v_and_b32_e32 v86, s67, v86
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 9, v86
	v_lshrrev_b32_e32 v86, 3, v86
	v_and_or_b32 v88, 0xe00, v88, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 1, v88
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v94, v84, 1
	v_add_lshl_u32 v93, v88, v86, 1
	v_lshrrev_b32_e32 v88, s80, v67
	ds_store_b16 v92, v94
	ds_load_u16 v86, v93
	v_and_b32_e32 v88, s67, v88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 9, v88
	v_lshrrev_b32_e32 v88, 3, v88
	v_and_or_b32 v94, 0xe00, v94, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 1, v94
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v86, 1
	v_add_lshl_u32 v94, v94, v88, 1
	ds_store_b16 v93, v95
	ds_load_u16 v88, v94
	v_lshlrev_b32_e32 v95, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v88, 1
	ds_store_b16 v94, v96
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[96:99], v95 offset1:1
	ds_load_2addr_b64 v[100:103], v95 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v96, v97, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v96, v96, v98, v99
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v97, v96, v100, v101
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_or_b32_e32 v100, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v97, v97, v102, v103
	v_and_b32_e32 v98, 15, v96
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v99, v97 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s35, 0, v98
	v_cmp_lt_u32_e64 s36, 1, v98
	v_cmp_lt_u32_e64 s37, 3, v98
	v_cmp_lt_u32_e64 s38, 7, v98
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, v99, 0, s35
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v99, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v97, v97, v99
	v_mov_b32_dpp v99, v97 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, 0, v99, s37
	v_add_nc_u32_e32 v97, v97, v99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v98, 0, v99, s38
	v_bfe_i32 v99, v96, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v97, v97, v98
	ds_swizzle_b32 v98, v97 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v98, v99, v98
	v_lshrrev_b32_e32 v99, 5, v0
	v_add_nc_u32_e32 v97, v97, v98
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v99
	v_cmpx_eq_u32_e64 v100, v0
	s_cbranch_execz .LBB42_67
; %bb.66:
	ds_store_b32 v98, v97 offset:16384
.LBB42_67:
	s_or_b32 exec_lo, exec_lo, s39
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s39, vcc_lo
	s_cbranch_execz .LBB42_69
; %bb.68:
	v_mad_i32_i24 v99, 0xffffffe4, v0, v95
	ds_load_b32 v100, v99 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v101, v100 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, v101, 0, s35
	v_add_nc_u32_e32 v100, v101, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	v_mov_b32_dpp v101, v100 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, 0, v101, s37
	v_add_nc_u32_e32 v100, v100, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s38
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	ds_store_b32 v99, v100 offset:16384
.LBB42_69:                              ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i34.i
	s_or_b32 exec_lo, exec_lo, s39
	v_dual_mov_b32 v100, 0 :: v_dual_mov_b32 v99, 0
	s_mov_b32 s36, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB42_71
; %bb.70:
	ds_load_b32 v99, v98 offset:16380
.LBB42_71:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjtjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb0EN6thrust10device_ptrIjEEPjNSA_ItEEPtEEvT0_T1_T2_T3_SC_SC_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESG_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s36
	v_add_nc_u32_e32 v98, -1, v96
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s35, 0, v98
	v_cndmask_b32_e64 v98, v98, v96, s35
	v_cmp_eq_u32_e64 s35, 0, v96
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v98
	ds_bpermute_b32 v97, v98, v97
	ds_load_b32 v98, v100 offset:16444
	ds_load_2addr_b64 v[100:103], v95 offset1:1
	ds_load_b32 v104, v95 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v96, v97, v99, s35
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v96, v98, 16, v96
	ds_load_b64 v[98:99], v95 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v97, v96, v100
	v_add_nc_u32_e32 v100, v101, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v102, v100
	v_add_nc_u32_e32 v102, v103, v101
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v103, v98, v102
	v_add_nc_u32_e32 v98, v99, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v99, v104, v98
	ds_store_2addr_b64 v95, v[96:97], v[100:101] offset1:1
	ds_store_2addr_b64 v95, v[102:103], v[98:99] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v107, v7
	ds_load_u16 v106, v8
	ds_load_u16 v105, v15
	ds_load_u16 v104, v17
	ds_load_u16 v103, v19
	ds_load_u16 v15, v21
	ds_load_u16 v102, v23
	ds_load_u16 v101, v25
	ds_load_u16 v100, v27
	ds_load_u16 v99, v29
	ds_load_u16 v17, v31
	ds_load_u16 v98, v34
	ds_load_u16 v97, v36
	ds_load_u16 v25, v38
	ds_load_u16 v21, v40
	ds_load_u16 v19, v69
	ds_load_u16 v23, v71
	ds_load_u16 v96, v73
	ds_load_u16 v95, v75
	ds_load_u16 v77, v77
	ds_load_u16 v27, v79
	ds_load_u16 v75, v81
	ds_load_u16 v73, v83
	ds_load_u16 v36, v85
	ds_load_u16 v31, v87
	ds_load_u16 v29, v89
	ds_load_u16 v34, v90
	ds_load_u16 v71, v91
	ds_load_u16 v69, v92
	ds_load_u16 v40, v93
	ds_load_u16 v38, v94
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB42_75
; %bb.72:
	v_lshrrev_b32_e32 v7, 3, v0
	v_lshlrev_b32_e32 v8, 10, v0
	v_add_nc_u32_e32 v79, 1, v0
	s_mov_b32 s37, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v7, 0x1c00, v8, v7
	v_dual_mov_b32 v8, 0x3e00 :: v_dual_lshlrev_b32 v7, 1, v7
	ds_load_u16 v7, v7
	v_cmpx_ne_u32_e32 16, v79
	s_cbranch_execz .LBB42_74
; %bb.73:
	v_lshlrev_b32_e32 v8, 10, v79
	v_lshrrev_b32_e32 v79, 3, v79
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v8, 0x1c00, v8, v79
	v_lshlrev_b32_e32 v8, 1, v8
	ds_load_u16 v8, v8
.LBB42_74:
	s_or_b32 exec_lo, exec_lo, s37
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v8, v7
.LBB42_75:                              ; %Flow92
	s_or_b32 exec_lo, exec_lo, s36
	v_and_b32_e32 v1, 0xffff, v1
	v_and_b32_e32 v79, 0xffff, v9
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v9, 0xffff, v107
	v_and_b32_e32 v2, 0xffff, v2
	v_and_b32_e32 v81, 0xffff, v11
	s_waitcnt lgkmcnt(29)
	v_and_b32_e32 v11, 0xffff, v106
	v_and_b32_e32 v12, 0xffff, v12
	v_add_nc_u32_e32 v9, v9, v1
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v1, 0xffff, v105
	v_and_b32_e32 v83, 0xffff, v14
	v_add_nc_u32_e32 v14, v11, v2
	s_waitcnt lgkmcnt(25)
	v_and_b32_e32 v2, 0xffff, v15
	v_and_b32_e32 v10, 0xffff, v10
	v_and_b32_e32 v13, 0xffff, v13
	v_and_b32_e32 v85, 0xffff, v16
	v_and_b32_e32 v87, 0xffff, v20
	v_and_b32_e32 v16, 0xffff, v104
	v_and_b32_e32 v20, 0xffff, v103
	v_add_nc_u32_e32 v15, v1, v79
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v1, 0xffff, v102
	v_add_nc_u32_e32 v12, v2, v12
	s_waitcnt lgkmcnt(23)
	v_and_b32_e32 v2, 0xffff, v101
	v_and_b32_e32 v18, 0xffff, v18
	v_add_nc_u32_e32 v11, v16, v10
	v_add_nc_u32_e32 v10, v20, v81
	s_waitcnt lgkmcnt(21)
	v_and_b32_e32 v81, 0xffff, v99
	v_add_nc_u32_e32 v16, v1, v13
	s_waitcnt lgkmcnt(20)
	v_and_b32_e32 v1, 0xffff, v17
	v_and_b32_e32 v22, 0xffff, v22
	v_add_nc_u32_e32 v20, v2, v83
	s_waitcnt lgkmcnt(19)
	v_and_b32_e32 v2, 0xffff, v98
	v_and_b32_e32 v24, 0xffff, v24
	v_and_b32_e32 v79, 0xffff, v100
	v_add_nc_u32_e32 v13, v81, v18
	v_add_nc_u32_e32 v18, v1, v87
	s_waitcnt lgkmcnt(18)
	v_and_b32_e32 v1, 0xffff, v97
	v_and_b32_e32 v30, 0xffff, v30
	s_waitcnt lgkmcnt(16)
	v_and_b32_e32 v81, 0xffff, v21
	v_add_nc_u32_e32 v21, v2, v22
	s_waitcnt lgkmcnt(15)
	v_and_b32_e32 v2, 0xffff, v19
	v_and_b32_e32 v26, 0xffff, v26
	v_and_b32_e32 v28, 0xffff, v28
	v_and_b32_e32 v33, 0xffff, v33
	v_add_nc_u32_e32 v17, v79, v85
	v_and_b32_e32 v79, 0xffff, v25
	v_add_nc_u32_e32 v25, v1, v24
	s_waitcnt lgkmcnt(14)
	v_and_b32_e32 v1, 0xffff, v23
	v_and_b32_e32 v35, 0xffff, v35
	v_add_nc_u32_e32 v23, v2, v30
	s_waitcnt lgkmcnt(13)
	v_and_b32_e32 v2, 0xffff, v96
	v_and_b32_e32 v37, 0xffff, v37
	v_and_b32_e32 v39, 0xffff, v39
	v_and_b32_e32 v68, 0xffff, v68
	v_add_nc_u32_e32 v22, v79, v26
	v_add_nc_u32_e32 v19, v81, v28
	s_waitcnt lgkmcnt(12)
	v_and_b32_e32 v24, 0xffff, v95
	s_waitcnt lgkmcnt(11)
	v_and_b32_e32 v28, 0xffff, v77
	v_add_nc_u32_e32 v26, v1, v33
	s_waitcnt lgkmcnt(10)
	v_and_b32_e32 v1, 0xffff, v27
	v_and_b32_e32 v70, 0xffff, v70
	v_add_nc_u32_e32 v30, v2, v35
	s_waitcnt lgkmcnt(9)
	v_and_b32_e32 v2, 0xffff, v75
	v_and_b32_e32 v72, 0xffff, v72
	v_add_nc_u32_e32 v27, v24, v37
	v_add_nc_u32_e32 v24, v28, v39
	v_add_nc_u32_e32 v28, v1, v68
	s_waitcnt lgkmcnt(8)
	v_and_b32_e32 v1, 0xffff, v73
	v_and_b32_e32 v78, 0xffff, v78
	s_waitcnt lgkmcnt(6)
	v_and_b32_e32 v35, 0xffff, v31
	v_add_nc_u32_e32 v31, v2, v70
	s_waitcnt lgkmcnt(5)
	v_and_b32_e32 v2, 0xffff, v29
	v_and_b32_e32 v76, 0xffff, v76
	v_and_b32_e32 v80, 0xffff, v80
	v_and_b32_e32 v33, 0xffff, v36
	v_add_nc_u32_e32 v36, v1, v72
	s_waitcnt lgkmcnt(4)
	v_and_b32_e32 v1, 0xffff, v34
	v_and_b32_e32 v82, 0xffff, v82
	v_add_nc_u32_e32 v34, v2, v78
	s_waitcnt lgkmcnt(3)
	v_and_b32_e32 v2, 0xffff, v71
	v_and_b32_e32 v84, 0xffff, v84
	v_and_b32_e32 v86, 0xffff, v86
	v_and_b32_e32 v88, 0xffff, v88
	v_add_nc_u32_e32 v29, v35, v76
	s_waitcnt lgkmcnt(2)
	v_and_b32_e32 v35, 0xffff, v69
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v40, 0xffff, v40
	v_add_nc_u32_e32 v37, v1, v80
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v1, 0xffff, v38
	v_add_nc_u32_e32 v39, v2, v82
	v_lshlrev_b32_e32 v2, 2, v9
	v_add_nc_u32_e32 v38, v35, v84
	v_add_nc_u32_e32 v35, v40, v86
	v_add_nc_u32_e32 v40, v1, v88
	v_lshlrev_b32_e32 v1, 2, v14
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v2, v4 offset:64
	v_lshlrev_b32_e32 v2, 2, v15
	v_lshlrev_b32_e32 v4, 2, v11
	v_lshlrev_b32_e32 v68, 2, v10
	v_lshlrev_b32_e32 v69, 2, v12
	ds_store_b32 v1, v3 offset:64
	ds_store_b32 v2, v6 offset:64
	ds_store_b32 v4, v5 offset:64
	ds_store_b32 v68, v42 offset:64
	ds_store_b32 v69, v41 offset:64
	v_lshlrev_b32_e32 v1, 2, v16
	v_lshlrev_b32_e32 v2, 2, v20
	v_lshlrev_b32_e32 v3, 2, v17
	v_lshlrev_b32_e32 v4, 2, v13
	v_lshlrev_b32_e32 v5, 2, v18
	ds_store_b32 v1, v44 offset:64
	ds_store_b32 v2, v43 offset:64
	ds_store_b32 v3, v46 offset:64
	ds_store_b32 v4, v45 offset:64
	ds_store_b32 v5, v48 offset:64
	v_lshlrev_b32_e32 v1, 2, v21
	v_lshlrev_b32_e32 v2, 2, v25
	v_and_b32_e32 v74, 0xffff, v74
	v_lshlrev_b32_e32 v3, 2, v22
	v_lshlrev_b32_e32 v4, 2, v19
	v_lshlrev_b32_e32 v5, 2, v23
	ds_store_b32 v1, v47 offset:64
	ds_store_b32 v2, v50 offset:64
	ds_store_b32 v3, v49 offset:64
	ds_store_b32 v4, v52 offset:64
	ds_store_b32 v5, v51 offset:64
	v_lshlrev_b32_e32 v1, 2, v26
	v_lshlrev_b32_e32 v2, 2, v30
	v_add_nc_u32_e32 v33, v33, v74
	v_lshlrev_b32_e32 v3, 2, v27
	v_lshlrev_b32_e32 v4, 2, v24
	v_lshlrev_b32_e32 v5, 2, v28
	ds_store_b32 v1, v54 offset:64
	ds_store_b32 v2, v53 offset:64
	ds_store_b32 v3, v56 offset:64
	ds_store_b32 v4, v55 offset:64
	ds_store_b32 v5, v58 offset:64
	v_lshlrev_b32_e32 v1, 2, v31
	v_lshlrev_b32_e32 v2, 2, v36
	v_lshlrev_b32_e32 v3, 2, v33
	v_lshlrev_b32_e32 v4, 2, v29
	v_lshlrev_b32_e32 v5, 2, v34
	ds_store_b32 v1, v57 offset:64
	ds_store_b32 v2, v60 offset:64
	ds_store_b32 v3, v59 offset:64
	ds_store_b32 v4, v62 offset:64
	ds_store_b32 v5, v61 offset:64
	v_lshlrev_b32_e32 v1, 2, v37
	v_lshlrev_b32_e32 v2, 2, v39
	v_lshlrev_b32_e32 v3, 2, v38
	v_lshlrev_b32_e32 v4, 2, v35
	v_lshlrev_b32_e32 v5, 2, v40
	ds_store_b32 v1, v64 offset:64
	ds_store_b32 v2, v63 offset:64
	ds_store_b32 v3, v66 offset:64
	ds_store_b32 v4, v65 offset:64
	ds_store_b32 v5, v67 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB42_86
; %bb.76:
	v_lshl_or_b32 v3, s15, 4, v0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v41, 0
	s_mov_b32 s37, 0
	s_mov_b32 s38, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v8
	v_add_co_u32 v1, s35, s86, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s35, s87, v2, s35
                                        ; implicit-def: $sgpr35
	global_store_b32 v[1:2], v3, off
.LBB42_77:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB42_80 Depth 2
	s_or_b32 s35, s35, exec_lo
	s_cmp_eq_u32 s38, 0
	s_cbranch_scc1 .LBB42_83
; %bb.78:                               ;   in Loop: Header=BB42_77 Depth=1
	s_add_i32 s38, s38, -1
	s_mov_b32 s39, exec_lo
	v_lshl_or_b32 v3, s38, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s35, s86, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s35, s87, v6, s35
	global_load_b32 v42, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v42
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB42_82
; %bb.79:                               ; %.lr.ph.i44.i.preheader
                                        ;   in Loop: Header=BB42_77 Depth=1
	s_mov_b32 s40, 0
.LBB42_80:                              ; %.lr.ph.i44.i
                                        ;   Parent Loop BB42_77 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v42, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s35, 0, v3
	s_or_b32 s40, s35, s40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s40
	s_cbranch_execnz .LBB42_80
; %bb.81:                               ; %Flow
                                        ;   in Loop: Header=BB42_77 Depth=1
	s_or_b32 exec_lo, exec_lo, s40
.LBB42_82:                              ; %Flow89
                                        ;   in Loop: Header=BB42_77 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s39
	v_and_b32_e32 v5, 0x3fffffff, v42
	v_cmp_eq_u32_e64 s35, 0x80000000, v3
	v_add_nc_u32_e32 v41, v5, v41
	s_branch .LBB42_84
.LBB42_83:                              ;   in Loop: Header=BB42_77 Depth=1
                                        ; implicit-def: $sgpr38
.LBB42_84:                              ; %Flow90
                                        ;   in Loop: Header=BB42_77 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s39, exec_lo, s35
	s_or_b32 s37, s39, s37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s37
	s_cbranch_execnz .LBB42_77
; %bb.85:
	s_or_b32 exec_lo, exec_lo, s37
	v_add_nc_u32_e32 v3, v41, v8
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v41, v7
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	ds_store_b32 v4, v1
.LBB42_86:                              ; %Flow91
	s_or_b32 exec_lo, exec_lo, s36
	v_cmp_gt_u32_e64 s35, s66, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s37, s35
	s_cbranch_execz .LBB42_88
; %bb.87:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v3, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s36, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s36, s71, v2, s36
	global_store_b32 v[1:2], v3, off
.LBB42_88:
	s_or_b32 exec_lo, exec_lo, s37
	v_or_b32_e32 v3, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s36, s66, v3
	s_and_saveexec_b32 s38, s36
	s_cbranch_execz .LBB42_90
; %bb.89:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v4, v1 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s37, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s37, s71, v2, s37
	global_store_b32 v[1:2], v4, off
.LBB42_90:
	s_or_b32 exec_lo, exec_lo, s38
	v_or_b32_e32 v4, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s37, s66, v4
	s_and_saveexec_b32 s39, s37
	s_cbranch_execz .LBB42_92
; %bb.91:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v5, v1 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s38, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s38, s71, v2, s38
	global_store_b32 v[1:2], v5, off
.LBB42_92:
	s_or_b32 exec_lo, exec_lo, s39
	v_or_b32_e32 v5, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s38, s66, v5
	s_and_saveexec_b32 s40, s38
	s_cbranch_execz .LBB42_94
; %bb.93:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v6, v1 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s39, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s39, s71, v2, s39
	global_store_b32 v[1:2], v6, off
.LBB42_94:
	s_or_b32 exec_lo, exec_lo, s40
	v_or_b32_e32 v6, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s39, s66, v6
	s_and_saveexec_b32 s41, s39
	s_cbranch_execz .LBB42_96
; %bb.95:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v41, v1 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s40, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s40, s71, v2, s40
	global_store_b32 v[1:2], v41, off
.LBB42_96:
	s_or_b32 exec_lo, exec_lo, s41
	v_or_b32_e32 v41, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s40, s66, v41
	s_and_saveexec_b32 s42, s40
	s_cbranch_execz .LBB42_98
; %bb.97:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v42, v1 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s41, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s41, s71, v2, s41
	global_store_b32 v[1:2], v42, off
.LBB42_98:
	s_or_b32 exec_lo, exec_lo, s42
	v_or_b32_e32 v42, 0xc00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s41, s66, v42
	s_and_saveexec_b32 s43, s41
	s_cbranch_execz .LBB42_100
; %bb.99:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v43, v1 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s42, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s42, s71, v2, s42
	global_store_b32 v[1:2], v43, off
.LBB42_100:
	s_or_b32 exec_lo, exec_lo, s43
	v_or_b32_e32 v43, 0xe00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s42, s66, v43
	s_and_saveexec_b32 s44, s42
	s_cbranch_execz .LBB42_102
; %bb.101:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v44, v1 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s43, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s43, s71, v2, s43
	global_store_b32 v[1:2], v44, off
.LBB42_102:
	s_or_b32 exec_lo, exec_lo, s44
	v_or_b32_e32 v44, 0x1000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s43, s66, v44
	s_and_saveexec_b32 s45, s43
	s_cbranch_execz .LBB42_104
; %bb.103:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v45, v1 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s44, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s44, s71, v2, s44
	global_store_b32 v[1:2], v45, off
.LBB42_104:
	s_or_b32 exec_lo, exec_lo, s45
	v_or_b32_e32 v45, 0x1200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s44, s66, v45
	s_and_saveexec_b32 s46, s44
	s_cbranch_execz .LBB42_106
; %bb.105:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v46, v1 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s45, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s45, s71, v2, s45
	global_store_b32 v[1:2], v46, off
.LBB42_106:
	s_or_b32 exec_lo, exec_lo, s46
	v_or_b32_e32 v46, 0x1400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s45, s66, v46
	s_and_saveexec_b32 s47, s45
	s_cbranch_execz .LBB42_108
; %bb.107:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v47, v1 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s46, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s46, s71, v2, s46
	global_store_b32 v[1:2], v47, off
.LBB42_108:
	s_or_b32 exec_lo, exec_lo, s47
	v_or_b32_e32 v47, 0x1600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s46, s66, v47
	s_and_saveexec_b32 s48, s46
	s_cbranch_execz .LBB42_110
; %bb.109:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v48, v1 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s47, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s47, s71, v2, s47
	global_store_b32 v[1:2], v48, off
.LBB42_110:
	s_or_b32 exec_lo, exec_lo, s48
	v_or_b32_e32 v48, 0x1800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s47, s66, v48
	s_and_saveexec_b32 s49, s47
	s_cbranch_execz .LBB42_112
; %bb.111:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v49, v1 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s48, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s48, s71, v2, s48
	global_store_b32 v[1:2], v49, off
.LBB42_112:
	s_or_b32 exec_lo, exec_lo, s49
	v_or_b32_e32 v49, 0x1a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s48, s66, v49
	s_and_saveexec_b32 s50, s48
	s_cbranch_execz .LBB42_114
; %bb.113:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v50, v1 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s49, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s49, s71, v2, s49
	global_store_b32 v[1:2], v50, off
.LBB42_114:
	s_or_b32 exec_lo, exec_lo, s50
	v_or_b32_e32 v50, 0x1c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s49, s66, v50
	s_and_saveexec_b32 s51, s49
	s_cbranch_execz .LBB42_116
; %bb.115:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v51, v1 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s50, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s50, s71, v2, s50
	global_store_b32 v[1:2], v51, off
.LBB42_116:
	s_or_b32 exec_lo, exec_lo, s51
	v_or_b32_e32 v51, 0x1e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s50, s66, v51
	s_and_saveexec_b32 s52, s50
	s_cbranch_execz .LBB42_118
; %bb.117:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v52, v1 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s51, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s51, s71, v2, s51
	global_store_b32 v[1:2], v52, off
.LBB42_118:
	s_or_b32 exec_lo, exec_lo, s52
	v_or_b32_e32 v52, 0x2000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s51, s66, v52
	s_and_saveexec_b32 s53, s51
	s_cbranch_execz .LBB42_120
; %bb.119:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v53, v1 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s52, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s52, s71, v2, s52
	global_store_b32 v[1:2], v53, off
.LBB42_120:
	s_or_b32 exec_lo, exec_lo, s53
	v_or_b32_e32 v53, 0x2200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s52, s66, v53
	s_and_saveexec_b32 s54, s52
	s_cbranch_execz .LBB42_122
; %bb.121:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v54, v1 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s53, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s53, s71, v2, s53
	global_store_b32 v[1:2], v54, off
.LBB42_122:
	s_or_b32 exec_lo, exec_lo, s54
	v_or_b32_e32 v54, 0x2400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s53, s66, v54
	s_and_saveexec_b32 s55, s53
	s_cbranch_execz .LBB42_124
; %bb.123:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v55, v1 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s54, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s54, s71, v2, s54
	global_store_b32 v[1:2], v55, off
.LBB42_124:
	s_or_b32 exec_lo, exec_lo, s55
	v_or_b32_e32 v55, 0x2600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s54, s66, v55
	s_and_saveexec_b32 s56, s54
	s_cbranch_execz .LBB42_126
; %bb.125:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v56, v1 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s55, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s55, s71, v2, s55
	global_store_b32 v[1:2], v56, off
.LBB42_126:
	s_or_b32 exec_lo, exec_lo, s56
	v_or_b32_e32 v56, 0x2800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s55, s66, v56
	s_and_saveexec_b32 s57, s55
	s_cbranch_execz .LBB42_128
; %bb.127:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v57, v1 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s56, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s56, s71, v2, s56
	global_store_b32 v[1:2], v57, off
.LBB42_128:
	s_or_b32 exec_lo, exec_lo, s57
	v_or_b32_e32 v57, 0x2a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s56, s66, v57
	s_and_saveexec_b32 s58, s56
	s_cbranch_execz .LBB42_130
; %bb.129:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v58, v1 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s57, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s57, s71, v2, s57
	global_store_b32 v[1:2], v58, off
.LBB42_130:
	s_or_b32 exec_lo, exec_lo, s58
	v_or_b32_e32 v58, 0x2c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s57, s66, v58
	s_and_saveexec_b32 s59, s57
	s_cbranch_execz .LBB42_132
; %bb.131:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v59, v1 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s58, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s58, s71, v2, s58
	global_store_b32 v[1:2], v59, off
.LBB42_132:
	s_or_b32 exec_lo, exec_lo, s59
	v_or_b32_e32 v59, 0x2e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s58, s66, v59
	s_and_saveexec_b32 s60, s58
	s_cbranch_execz .LBB42_134
; %bb.133:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v60, v1 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s59, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s59, s71, v2, s59
	global_store_b32 v[1:2], v60, off
.LBB42_134:
	s_or_b32 exec_lo, exec_lo, s60
	v_or_b32_e32 v60, 0x3000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s59, s66, v60
	s_and_saveexec_b32 s61, s59
	s_cbranch_execz .LBB42_136
; %bb.135:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v61, v1 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s60, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s60, s71, v2, s60
	global_store_b32 v[1:2], v61, off
.LBB42_136:
	s_or_b32 exec_lo, exec_lo, s61
	v_or_b32_e32 v61, 0x3200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s60, s66, v61
	s_and_saveexec_b32 s62, s60
	s_cbranch_execz .LBB42_138
; %bb.137:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v62, v1 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s61, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s61, s71, v2, s61
	global_store_b32 v[1:2], v62, off
.LBB42_138:
	s_or_b32 exec_lo, exec_lo, s62
	v_or_b32_e32 v62, 0x3400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s61, s66, v62
	s_and_saveexec_b32 s63, s61
	s_cbranch_execz .LBB42_140
; %bb.139:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v63, v1 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s62, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s62, s71, v2, s62
	global_store_b32 v[1:2], v63, off
.LBB42_140:
	s_or_b32 exec_lo, exec_lo, s63
	v_or_b32_e32 v63, 0x3600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s62, s66, v63
	s_and_saveexec_b32 s64, s62
	s_cbranch_execz .LBB42_142
; %bb.141:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v64, v1 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s63, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s63, s71, v2, s63
	global_store_b32 v[1:2], v64, off
.LBB42_142:
	s_or_b32 exec_lo, exec_lo, s64
	v_or_b32_e32 v64, 0x3800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s63, s66, v64
	s_and_saveexec_b32 s65, s63
	s_cbranch_execz .LBB42_144
; %bb.143:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v65, v1 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s64, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s64, s71, v2, s64
	global_store_b32 v[1:2], v65, off
.LBB42_144:
	s_or_b32 exec_lo, exec_lo, s65
	v_or_b32_e32 v65, 0x3a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s64, s66, v65
	s_and_saveexec_b32 s82, s64
	s_cbranch_execz .LBB42_146
; %bb.145:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v66, v1 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s65, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s65, s71, v2, s65
	global_store_b32 v[1:2], v66, off
.LBB42_146:
	s_or_b32 exec_lo, exec_lo, s82
	v_or_b32_e32 v66, 0x3c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s65, s66, v66
	s_and_saveexec_b32 s82, s65
	s_cbranch_execz .LBB42_148
; %bb.147:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v67, v1 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s66, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s66, s71, v2, s66
	global_store_b32 v[1:2], v67, off
.LBB42_148:
	s_or_b32 exec_lo, exec_lo, s82
	v_lshlrev_b32_e32 v1, 1, v32
	s_lshl_b64 s[82:83], s[84:85], 1
                                        ; implicit-def: $vgpr67
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s66, s72, s82
	s_addc_u32 s82, s73, s83
	v_add_co_u32 v1, s66, s66, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v2, null, s82, 0, s66
	s_and_saveexec_b32 s66, s2
	s_xor_b32 s2, exec_lo, s66
	s_cbranch_execz .LBB42_150
; %bb.149:
	global_load_u16 v67, v[1:2], off
.LBB42_150:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr69
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB42_152
; %bb.151:
	global_load_u16 v69, v[1:2], off offset:2
.LBB42_152:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr71
	s_and_saveexec_b32 s2, s4
	s_cbranch_execz .LBB42_154
; %bb.153:
	global_load_u16 v71, v[1:2], off offset:4
.LBB42_154:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr73
	s_and_saveexec_b32 s2, s5
	s_cbranch_execz .LBB42_156
; %bb.155:
	global_load_u16 v73, v[1:2], off offset:6
.LBB42_156:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr75
	s_and_saveexec_b32 s2, s6
	s_cbranch_execz .LBB42_158
; %bb.157:
	global_load_u16 v75, v[1:2], off offset:8
.LBB42_158:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr77
	s_and_saveexec_b32 s2, s7
	s_cbranch_execz .LBB42_160
; %bb.159:
	global_load_u16 v77, v[1:2], off offset:10
.LBB42_160:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr78
	s_and_saveexec_b32 s2, s8
	s_cbranch_execz .LBB42_162
; %bb.161:
	global_load_u16 v78, v[1:2], off offset:12
.LBB42_162:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr80
	s_and_saveexec_b32 s2, s9
	s_cbranch_execz .LBB42_164
; %bb.163:
	global_load_u16 v80, v[1:2], off offset:14
.LBB42_164:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr83
	s_and_saveexec_b32 s2, s10
	s_cbranch_execz .LBB42_166
; %bb.165:
	global_load_u16 v83, v[1:2], off offset:16
.LBB42_166:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr85
	s_and_saveexec_b32 s2, s11
	s_cbranch_execz .LBB42_168
; %bb.167:
	global_load_u16 v85, v[1:2], off offset:18
.LBB42_168:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr87
	s_and_saveexec_b32 s2, s12
	s_cbranch_execz .LBB42_170
; %bb.169:
	global_load_u16 v87, v[1:2], off offset:20
.LBB42_170:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr88
	s_and_saveexec_b32 s2, s13
	s_cbranch_execz .LBB42_172
; %bb.171:
	global_load_u16 v88, v[1:2], off offset:22
.LBB42_172:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr90
	s_and_saveexec_b32 s2, s14
	s_cbranch_execz .LBB42_174
; %bb.173:
	global_load_u16 v90, v[1:2], off offset:24
.LBB42_174:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr92
	s_and_saveexec_b32 s2, s16
	s_cbranch_execz .LBB42_176
; %bb.175:
	global_load_u16 v92, v[1:2], off offset:26
.LBB42_176:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr94
	s_and_saveexec_b32 s2, s17
	s_cbranch_execz .LBB42_178
; %bb.177:
	global_load_u16 v94, v[1:2], off offset:28
.LBB42_178:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr96
	s_and_saveexec_b32 s2, s18
	s_cbranch_execz .LBB42_180
; %bb.179:
	global_load_u16 v96, v[1:2], off offset:30
.LBB42_180:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr98
	s_and_saveexec_b32 s2, s19
	s_cbranch_execz .LBB42_182
; %bb.181:
	global_load_u16 v98, v[1:2], off offset:32
.LBB42_182:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr100
	s_and_saveexec_b32 s2, s20
	s_cbranch_execz .LBB42_184
; %bb.183:
	global_load_u16 v100, v[1:2], off offset:34
.LBB42_184:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr102
	s_and_saveexec_b32 s2, s21
	s_cbranch_execz .LBB42_186
; %bb.185:
	global_load_u16 v102, v[1:2], off offset:36
.LBB42_186:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr104
	s_and_saveexec_b32 s2, s22
	s_cbranch_execz .LBB42_188
; %bb.187:
	global_load_u16 v104, v[1:2], off offset:38
.LBB42_188:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr106
	s_and_saveexec_b32 s2, s23
	s_cbranch_execz .LBB42_190
; %bb.189:
	global_load_u16 v106, v[1:2], off offset:40
.LBB42_190:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr107
	s_and_saveexec_b32 s2, s24
	s_cbranch_execz .LBB42_192
; %bb.191:
	global_load_u16 v107, v[1:2], off offset:42
.LBB42_192:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr109
	s_and_saveexec_b32 s2, s25
	s_cbranch_execz .LBB42_194
; %bb.193:
	global_load_u16 v109, v[1:2], off offset:44
.LBB42_194:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr111
	s_and_saveexec_b32 s2, s26
	s_cbranch_execz .LBB42_196
; %bb.195:
	global_load_u16 v111, v[1:2], off offset:46
.LBB42_196:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr113
	s_and_saveexec_b32 s2, s27
	s_cbranch_execz .LBB42_198
; %bb.197:
	global_load_u16 v113, v[1:2], off offset:48
.LBB42_198:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr116
	s_and_saveexec_b32 s2, s28
	s_cbranch_execz .LBB42_200
; %bb.199:
	global_load_u16 v116, v[1:2], off offset:50
.LBB42_200:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr117
	s_and_saveexec_b32 s2, s29
	s_cbranch_execz .LBB42_202
; %bb.201:
	global_load_u16 v117, v[1:2], off offset:52
.LBB42_202:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr119
	s_and_saveexec_b32 s2, s30
	s_cbranch_execz .LBB42_204
; %bb.203:
	global_load_u16 v119, v[1:2], off offset:54
.LBB42_204:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr121
	s_and_saveexec_b32 s2, s31
	s_cbranch_execz .LBB42_206
; %bb.205:
	global_load_u16 v121, v[1:2], off offset:56
.LBB42_206:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr123
	s_and_saveexec_b32 s2, s33
	s_cbranch_execz .LBB42_208
; %bb.207:
	global_load_u16 v123, v[1:2], off offset:58
.LBB42_208:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr125
	s_and_saveexec_b32 s2, s34
	s_cbranch_execz .LBB42_210
; %bb.209:
	global_load_u16 v125, v[1:2], off offset:60
.LBB42_210:                             ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrItEEtLj31EEEvjT_RAT1__T0_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr126
	s_and_saveexec_b32 s2, s35
	s_cbranch_execz .LBB42_212
; %bb.211:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v126, s67, v1
.LBB42_212:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr124
	s_and_saveexec_b32 s2, s36
	s_cbranch_execz .LBB42_214
; %bb.213:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v124, s67, v1
.LBB42_214:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr122
	s_and_saveexec_b32 s2, s37
	s_cbranch_execz .LBB42_216
; %bb.215:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v122, s67, v1
.LBB42_216:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr120
	s_and_saveexec_b32 s2, s38
	s_cbranch_execz .LBB42_218
; %bb.217:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v120, s67, v1
.LBB42_218:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr118
	s_and_saveexec_b32 s2, s39
	s_cbranch_execz .LBB42_220
; %bb.219:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v118, s67, v1
.LBB42_220:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr115
	s_and_saveexec_b32 s2, s40
	s_cbranch_execz .LBB42_222
; %bb.221:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v115, s67, v1
.LBB42_222:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr114
	s_and_saveexec_b32 s2, s41
	s_cbranch_execz .LBB42_224
; %bb.223:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v114, s67, v1
.LBB42_224:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr112
	s_and_saveexec_b32 s2, s42
	s_cbranch_execz .LBB42_226
; %bb.225:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v112, s67, v1
.LBB42_226:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr110
	s_and_saveexec_b32 s2, s43
	s_cbranch_execz .LBB42_228
; %bb.227:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v110, s67, v1
.LBB42_228:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr108
	s_and_saveexec_b32 s2, s44
	s_cbranch_execz .LBB42_230
; %bb.229:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v108, s67, v1
.LBB42_230:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr105
	s_and_saveexec_b32 s2, s45
	s_cbranch_execz .LBB42_232
; %bb.231:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v105, s67, v1
.LBB42_232:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr103
	s_and_saveexec_b32 s2, s46
	s_cbranch_execz .LBB42_234
; %bb.233:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v103, s67, v1
.LBB42_234:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr101
	s_and_saveexec_b32 s2, s47
	s_cbranch_execz .LBB42_236
; %bb.235:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v101, s67, v1
.LBB42_236:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr99
	s_and_saveexec_b32 s2, s48
	s_cbranch_execz .LBB42_238
; %bb.237:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v99, s67, v1
.LBB42_238:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr97
	s_and_saveexec_b32 s2, s49
	s_cbranch_execz .LBB42_240
; %bb.239:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v97, s67, v1
.LBB42_240:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr95
	s_and_saveexec_b32 s2, s50
	s_cbranch_execz .LBB42_242
; %bb.241:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v95, s67, v1
.LBB42_242:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr93
	s_and_saveexec_b32 s2, s51
	s_cbranch_execz .LBB42_244
; %bb.243:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v93, s67, v1
.LBB42_244:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr91
	s_and_saveexec_b32 s2, s52
	s_cbranch_execz .LBB42_246
; %bb.245:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v91, s67, v1
.LBB42_246:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr89
	s_and_saveexec_b32 s2, s53
	s_cbranch_execz .LBB42_248
; %bb.247:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v89, s67, v1
.LBB42_248:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr86
	s_and_saveexec_b32 s2, s54
	s_cbranch_execz .LBB42_250
; %bb.249:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v86, s67, v1
.LBB42_250:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr84
	s_and_saveexec_b32 s2, s55
	s_cbranch_execz .LBB42_252
; %bb.251:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v84, s67, v1
.LBB42_252:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr82
	s_and_saveexec_b32 s2, s56
	s_cbranch_execz .LBB42_254
; %bb.253:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v82, s67, v1
.LBB42_254:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr81
	s_and_saveexec_b32 s2, s57
	s_cbranch_execz .LBB42_256
; %bb.255:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v81, s67, v1
.LBB42_256:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr79
	s_and_saveexec_b32 s2, s58
	s_cbranch_execz .LBB42_258
; %bb.257:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v79, s67, v1
.LBB42_258:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr76
	s_and_saveexec_b32 s2, s59
	s_cbranch_execz .LBB42_260
; %bb.259:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v76, s67, v1
.LBB42_260:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr74
	s_and_saveexec_b32 s2, s60
	s_cbranch_execz .LBB42_262
; %bb.261:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v74, s67, v1
.LBB42_262:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr72
	s_and_saveexec_b32 s2, s61
	s_cbranch_execz .LBB42_264
; %bb.263:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v72, s67, v1
.LBB42_264:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr70
	s_and_saveexec_b32 s2, s62
	s_cbranch_execz .LBB42_266
; %bb.265:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v70, s67, v1
.LBB42_266:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr68
	s_and_saveexec_b32 s2, s63
	s_cbranch_execz .LBB42_268
; %bb.267:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v68, s67, v1
.LBB42_268:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr2
	s_and_saveexec_b32 s2, s64
	s_cbranch_execz .LBB42_270
; %bb.269:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v2, s67, v1
.LBB42_270:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s2, s65
	s_cbranch_execz .LBB42_272
; %bb.271:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
.LBB42_272:
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b32_e32 v9, 1, v9
	v_lshlrev_b32_e32 v14, 1, v14
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b16 v9, v67 offset:64
	v_lshlrev_b32_e32 v9, 1, v15
	v_lshlrev_b32_e32 v11, 1, v11
	v_lshlrev_b32_e32 v10, 1, v10
	v_lshlrev_b32_e32 v12, 1, v12
	ds_store_b16 v14, v69 offset:64
	ds_store_b16 v9, v71 offset:64
	ds_store_b16 v11, v73 offset:64
	ds_store_b16 v10, v75 offset:64
	ds_store_b16 v12, v77 offset:64
	v_lshlrev_b32_e32 v9, 1, v16
	v_lshlrev_b32_e32 v10, 1, v20
	v_lshlrev_b32_e32 v11, 1, v17
	v_lshlrev_b32_e32 v12, 1, v13
	v_lshlrev_b32_e32 v13, 1, v18
	ds_store_b16 v9, v78 offset:64
	ds_store_b16 v10, v80 offset:64
	ds_store_b16 v11, v83 offset:64
	ds_store_b16 v12, v85 offset:64
	ds_store_b16 v13, v87 offset:64
	v_lshlrev_b32_e32 v9, 1, v21
	v_lshlrev_b32_e32 v10, 1, v25
	v_lshlrev_b32_e32 v11, 1, v22
	v_lshlrev_b32_e32 v12, 1, v19
	v_lshlrev_b32_e32 v13, 1, v23
	ds_store_b16 v9, v88 offset:64
	ds_store_b16 v10, v90 offset:64
	ds_store_b16 v11, v92 offset:64
	ds_store_b16 v12, v94 offset:64
	ds_store_b16 v13, v96 offset:64
	v_lshlrev_b32_e32 v9, 1, v26
	v_lshlrev_b32_e32 v10, 1, v30
	v_lshlrev_b32_e32 v11, 1, v27
	v_lshlrev_b32_e32 v12, 1, v24
	v_lshlrev_b32_e32 v13, 1, v28
	ds_store_b16 v9, v98 offset:64
	ds_store_b16 v10, v100 offset:64
	ds_store_b16 v11, v102 offset:64
	ds_store_b16 v12, v104 offset:64
	ds_store_b16 v13, v106 offset:64
	v_lshlrev_b32_e32 v9, 1, v31
	v_lshlrev_b32_e32 v10, 1, v36
	v_lshlrev_b32_e32 v11, 1, v33
	v_lshlrev_b32_e32 v12, 1, v29
	v_lshlrev_b32_e32 v13, 1, v34
	ds_store_b16 v9, v107 offset:64
	ds_store_b16 v10, v109 offset:64
	ds_store_b16 v11, v111 offset:64
	ds_store_b16 v12, v113 offset:64
	ds_store_b16 v13, v116 offset:64
	v_lshlrev_b32_e32 v9, 1, v37
	v_lshlrev_b32_e32 v10, 1, v39
	v_lshlrev_b32_e32 v11, 1, v38
	v_lshlrev_b32_e32 v12, 1, v35
	v_lshlrev_b32_e32 v13, 1, v40
	ds_store_b16 v9, v117 offset:64
	ds_store_b16 v10, v119 offset:64
	ds_store_b16 v11, v121 offset:64
	ds_store_b16 v12, v123 offset:64
	ds_store_b16 v13, v125 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s35
	s_cbranch_execz .LBB42_274
; %bb.273:
	v_lshlrev_b32_e32 v9, 2, v126
	v_lshlrev_b32_e32 v10, 1, v0
	ds_load_b32 v9, v9
	ds_load_u16 v11, v10 offset:64
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v9, v9, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 1, v[9:10]
	v_add_co_u32 v9, s2, s74, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s75, v10, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[9:10], v11, off
.LBB42_274:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s36
	s_cbranch_execz .LBB42_276
; %bb.275:
	v_lshlrev_b32_e32 v9, 2, v124
	v_lshlrev_b32_e32 v10, 1, v0
	ds_load_b32 v9, v9
	ds_load_u16 v11, v10 offset:1088
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v9, v9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 1, v[9:10]
	v_add_co_u32 v9, s2, s74, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s75, v10, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[9:10], v11, off
.LBB42_276:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s37
	s_cbranch_execz .LBB42_278
; %bb.277:
	v_dual_mov_b32 v10, 0 :: v_dual_lshlrev_b32 v3, 2, v122
	v_lshlrev_b32_e32 v9, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v11, v9 offset:2112
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v9, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[9:10]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v11, off
.LBB42_278:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s38
	s_cbranch_execz .LBB42_280
; %bb.279:
	v_lshlrev_b32_e32 v3, 2, v120
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v9, v4 offset:3136
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v9, off
.LBB42_280:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s39
	s_cbranch_execz .LBB42_282
; %bb.281:
	v_lshlrev_b32_e32 v3, 2, v118
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:4160
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_282:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s40
	s_cbranch_execz .LBB42_284
; %bb.283:
	v_lshlrev_b32_e32 v3, 2, v115
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:5184
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_284:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s41
	s_cbranch_execz .LBB42_286
; %bb.285:
	v_lshlrev_b32_e32 v3, 2, v114
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:6208
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_286:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s42
	s_cbranch_execz .LBB42_288
; %bb.287:
	v_lshlrev_b32_e32 v3, 2, v112
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:7232
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_288:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s43
	s_cbranch_execz .LBB42_290
; %bb.289:
	v_lshlrev_b32_e32 v3, 2, v110
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:8256
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_290:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s44
	s_cbranch_execz .LBB42_292
; %bb.291:
	v_lshlrev_b32_e32 v3, 2, v108
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:9280
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_292:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s45
	s_cbranch_execz .LBB42_294
; %bb.293:
	v_lshlrev_b32_e32 v3, 2, v105
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:10304
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_294:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s46
	s_cbranch_execz .LBB42_296
; %bb.295:
	v_lshlrev_b32_e32 v3, 2, v103
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:11328
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_296:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s47
	s_cbranch_execz .LBB42_298
; %bb.297:
	v_lshlrev_b32_e32 v3, 2, v101
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:12352
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_298:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s48
	s_cbranch_execz .LBB42_300
; %bb.299:
	v_lshlrev_b32_e32 v3, 2, v99
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:13376
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_300:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s49
	s_cbranch_execz .LBB42_302
; %bb.301:
	v_lshlrev_b32_e32 v3, 2, v97
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:14400
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_302:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s50
	s_cbranch_execz .LBB42_304
; %bb.303:
	v_lshlrev_b32_e32 v3, 2, v95
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:15424
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_304:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s51
	s_cbranch_execz .LBB42_306
; %bb.305:
	v_lshlrev_b32_e32 v3, 2, v93
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:16448
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_306:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s52
	s_cbranch_execz .LBB42_308
; %bb.307:
	v_lshlrev_b32_e32 v3, 2, v91
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:17472
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_308:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s53
	s_cbranch_execz .LBB42_310
; %bb.309:
	v_lshlrev_b32_e32 v3, 2, v89
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:18496
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_310:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s54
	s_cbranch_execz .LBB42_312
; %bb.311:
	v_lshlrev_b32_e32 v3, 2, v86
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:19520
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_312:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s55
	s_cbranch_execz .LBB42_314
; %bb.313:
	v_lshlrev_b32_e32 v3, 2, v84
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:20544
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_314:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s56
	s_cbranch_execz .LBB42_316
; %bb.315:
	v_lshlrev_b32_e32 v3, 2, v82
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:21568
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_316:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s57
	s_cbranch_execz .LBB42_318
; %bb.317:
	v_lshlrev_b32_e32 v3, 2, v81
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:22592
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_318:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s58
	s_cbranch_execz .LBB42_320
; %bb.319:
	v_lshlrev_b32_e32 v3, 2, v79
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:23616
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_320:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s59
	s_cbranch_execz .LBB42_322
; %bb.321:
	v_lshlrev_b32_e32 v3, 2, v76
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:24640
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_322:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s60
	s_cbranch_execz .LBB42_324
; %bb.323:
	v_lshlrev_b32_e32 v3, 2, v74
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:25664
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_324:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s61
	s_cbranch_execz .LBB42_326
; %bb.325:
	v_lshlrev_b32_e32 v3, 2, v72
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:26688
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_326:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s62
	s_cbranch_execz .LBB42_328
; %bb.327:
	v_lshlrev_b32_e32 v3, 2, v70
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:27712
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_328:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s63
	s_cbranch_execz .LBB42_330
; %bb.329:
	v_lshlrev_b32_e32 v3, 2, v68
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:28736
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB42_330:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s64
	s_cbranch_execz .LBB42_332
; %bb.331:
	v_lshlrev_b32_e32 v2, 2, v2
	v_lshlrev_b32_e32 v3, 1, v0
	ds_load_b32 v2, v2
	ds_load_u16 v4, v3 offset:29760
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v2, v2, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 1, v[2:3]
	v_add_co_u32 v2, s2, s74, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s2, s75, v3, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[2:3], v4, off
.LBB42_332:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s65
	s_cbranch_execz .LBB42_334
; %bb.333:
	v_lshlrev_b32_e32 v1, 2, v1
	v_lshlrev_b32_e32 v2, 1, v0
	ds_load_b32 v1, v1
	ds_load_u16 v3, v2 offset:30784
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, v1, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 1, v[1:2]
	v_add_co_u32 v1, s2, s74, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s2, s75, v2, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[1:2], v3, off
.LBB42_334:
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b32 s2, s[0:1], 0x50
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s2
	s_mov_b32 s2, 0
	s_cselect_b32 s3, -1, 0
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s3
	s_xor_b32 s3, exec_lo, s4
; %bb.335:
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v7, v8
	s_mov_b32 s7, exec_lo
; %bb.336:                              ; %Flow103
	s_or_b32 exec_lo, exec_lo, s3
	s_branch .LBB42_338
.LBB42_337:
	s_mov_b32 s2, -1
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
.LBB42_338:                             ; %Flow102
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB42_367
; %bb.339:
	s_mov_b32 s85, 0
	v_lshlrev_b32_e32 v21, 2, v32
	s_lshl_b64 s[2:3], s[84:85], 2
	v_mov_b32_e32 v33, 0
	s_add_u32 s2, s68, s2
	s_addc_u32 s3, s69, s3
	v_or_b32_e32 v34, 0xfffffe00, v0
	s_clause 0x7
	global_load_b128 v[1:4], v21, s[2:3] offset:48
	global_load_b128 v[9:12], v21, s[2:3] offset:32
	global_load_b128 v[17:20], v21, s[2:3] offset:16
	global_load_b128 v[25:28], v21, s[2:3]
	global_load_b96 v[29:31], v21, s[2:3] offset:112
	global_load_b128 v[5:8], v21, s[2:3] offset:96
	global_load_b128 v[13:16], v21, s[2:3] offset:80
	global_load_b128 v[21:24], v21, s[2:3] offset:64
	v_lshlrev_b32_e32 v35, 2, v0
	s_mov_b32 s2, s85
.LBB42_340:                             ; %.lr.ph.i.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v34, 0x200, v34
	ds_store_b32 v35, v33
	v_add_nc_u32_e32 v35, 0x800, v35
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v34
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB42_340
; %bb.341:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(4)
	v_lshrrev_b32_e32 v33, s80, v25
	s_lshl_b32 s2, -1, s81
	v_lshrrev_b32_e32 v38, s80, v27
	s_not_b32 s8, s2
	s_mov_b32 s2, exec_lo
	v_and_b32_e32 v33, s8, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v34, 9, v33
	v_lshrrev_b32_e32 v33, 3, v33
	v_and_or_b32 v34, 0xe00, v34, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v34, 1, v34
	v_add_lshl_u32 v33, v34, v33, 1
	v_lshrrev_b32_e32 v34, s80, v26
	ds_load_u16 v35, v33
	v_and_b32_e32 v34, s8, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 9, v34
	v_lshrrev_b32_e32 v34, 3, v34
	v_and_or_b32 v36, 0xe00, v36, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 1, v36
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v37, v35, 1
	v_add_lshl_u32 v34, v36, v34, 1
	ds_store_b16 v33, v37
	ds_load_u16 v36, v34
	v_and_b32_e32 v37, s8, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 9, v37
	v_lshrrev_b32_e32 v37, 3, v37
	v_and_or_b32 v38, 0xe00, v38, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 1, v38
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v39, v36, 1
	v_add_lshl_u32 v43, v38, v37, 1
	v_lshrrev_b32_e32 v38, s80, v28
	ds_store_b16 v34, v39
	ds_load_u16 v37, v43
	v_and_b32_e32 v38, s8, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 9, v38
	v_lshrrev_b32_e32 v38, 3, v38
	v_and_or_b32 v39, 0xe00, v39, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 1, v39
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v40, v37, 1
	v_add_lshl_u32 v45, v39, v38, 1
	v_lshrrev_b32_e32 v39, s80, v17
	ds_store_b16 v43, v40
	ds_load_u16 v38, v45
	v_and_b32_e32 v39, s8, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 9, v39
	v_lshrrev_b32_e32 v39, 3, v39
	v_and_or_b32 v40, 0xe00, v40, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 1, v40
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v41, v38, 1
	v_add_lshl_u32 v47, v40, v39, 1
	v_lshrrev_b32_e32 v40, s80, v18
	ds_store_b16 v45, v41
	ds_load_u16 v39, v47
	v_and_b32_e32 v40, s8, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 9, v40
	v_lshrrev_b32_e32 v40, 3, v40
	v_and_or_b32 v41, 0xe00, v41, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 1, v41
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v42, v39, 1
	v_add_lshl_u32 v49, v41, v40, 1
	v_lshrrev_b32_e32 v41, s80, v19
	ds_store_b16 v47, v42
	ds_load_u16 v40, v49
	v_and_b32_e32 v41, s8, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 9, v41
	v_lshrrev_b32_e32 v41, 3, v41
	v_and_or_b32 v42, 0xe00, v42, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 1, v42
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v44, v40, 1
	v_add_lshl_u32 v51, v42, v41, 1
	v_lshrrev_b32_e32 v42, s80, v20
	ds_store_b16 v49, v44
	ds_load_u16 v41, v51
	v_and_b32_e32 v42, s8, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 9, v42
	v_lshrrev_b32_e32 v42, 3, v42
	v_and_or_b32 v44, 0xe00, v44, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 1, v44
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v46, v41, 1
	v_add_lshl_u32 v53, v44, v42, 1
	v_lshrrev_b32_e32 v44, s80, v9
	ds_store_b16 v51, v46
	ds_load_u16 v42, v53
	v_and_b32_e32 v44, s8, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 9, v44
	v_lshrrev_b32_e32 v44, 3, v44
	v_and_or_b32 v46, 0xe00, v46, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 1, v46
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v48, v42, 1
	v_add_lshl_u32 v55, v46, v44, 1
	v_lshrrev_b32_e32 v46, s80, v10
	ds_store_b16 v53, v48
	ds_load_u16 v44, v55
	v_and_b32_e32 v46, s8, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 9, v46
	v_lshrrev_b32_e32 v46, 3, v46
	v_and_or_b32 v48, 0xe00, v48, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 1, v48
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v50, v44, 1
	v_add_lshl_u32 v57, v48, v46, 1
	v_lshrrev_b32_e32 v48, s80, v11
	ds_store_b16 v55, v50
	ds_load_u16 v46, v57
	v_and_b32_e32 v48, s8, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 9, v48
	v_lshrrev_b32_e32 v48, 3, v48
	v_and_or_b32 v50, 0xe00, v50, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 1, v50
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v52, v46, 1
	v_add_lshl_u32 v59, v50, v48, 1
	v_lshrrev_b32_e32 v50, s80, v12
	ds_store_b16 v57, v52
	ds_load_u16 v48, v59
	v_and_b32_e32 v50, s8, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 9, v50
	v_lshrrev_b32_e32 v50, 3, v50
	v_and_or_b32 v52, 0xe00, v52, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 1, v52
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v54, v48, 1
	v_add_lshl_u32 v61, v52, v50, 1
	v_lshrrev_b32_e32 v52, s80, v1
	ds_store_b16 v59, v54
	ds_load_u16 v50, v61
	v_and_b32_e32 v52, s8, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 9, v52
	v_lshrrev_b32_e32 v52, 3, v52
	v_and_or_b32 v54, 0xe00, v54, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 1, v54
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v56, v50, 1
	v_add_lshl_u32 v63, v54, v52, 1
	v_lshrrev_b32_e32 v54, s80, v2
	ds_store_b16 v61, v56
	ds_load_u16 v52, v63
	v_and_b32_e32 v54, s8, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 9, v54
	v_lshrrev_b32_e32 v54, 3, v54
	v_and_or_b32 v56, 0xe00, v56, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 1, v56
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v58, v52, 1
	v_add_lshl_u32 v65, v56, v54, 1
	v_lshrrev_b32_e32 v56, s80, v3
	ds_store_b16 v63, v58
	ds_load_u16 v54, v65
	v_and_b32_e32 v56, s8, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 9, v56
	v_lshrrev_b32_e32 v56, 3, v56
	v_and_or_b32 v58, 0xe00, v58, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 1, v58
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v60, v54, 1
	v_add_lshl_u32 v67, v58, v56, 1
	v_lshrrev_b32_e32 v58, s80, v4
	ds_store_b16 v65, v60
	ds_load_u16 v56, v67
	v_and_b32_e32 v58, s8, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 9, v58
	v_lshrrev_b32_e32 v58, 3, v58
	v_and_or_b32 v60, 0xe00, v60, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 1, v60
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v62, v56, 1
	v_add_lshl_u32 v69, v60, v58, 1
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v60, s80, v21
	ds_store_b16 v67, v62
	ds_load_u16 v58, v69
	v_and_b32_e32 v60, s8, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 9, v60
	v_lshrrev_b32_e32 v60, 3, v60
	v_and_or_b32 v62, 0xe00, v62, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 1, v62
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v64, v58, 1
	v_add_lshl_u32 v71, v62, v60, 1
	v_lshrrev_b32_e32 v62, s80, v22
	ds_store_b16 v69, v64
	ds_load_u16 v60, v71
	v_and_b32_e32 v62, s8, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 9, v62
	v_lshrrev_b32_e32 v62, 3, v62
	v_and_or_b32 v64, 0xe00, v64, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 1, v64
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v66, v60, 1
	v_add_lshl_u32 v73, v64, v62, 1
	v_lshrrev_b32_e32 v64, s80, v23
	ds_store_b16 v71, v66
	ds_load_u16 v62, v73
	v_and_b32_e32 v64, s8, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 9, v64
	v_lshrrev_b32_e32 v64, 3, v64
	v_and_or_b32 v66, 0xe00, v66, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 1, v66
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v68, v62, 1
	v_add_lshl_u32 v75, v66, v64, 1
	v_lshrrev_b32_e32 v66, s80, v24
	ds_store_b16 v73, v68
	ds_load_u16 v64, v75
	v_and_b32_e32 v66, s8, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 9, v66
	v_lshrrev_b32_e32 v66, 3, v66
	v_and_or_b32 v68, 0xe00, v68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 1, v68
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v70, v64, 1
	v_add_lshl_u32 v77, v68, v66, 1
	v_lshrrev_b32_e32 v68, s80, v13
	ds_store_b16 v75, v70
	ds_load_u16 v66, v77
	v_and_b32_e32 v68, s8, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 9, v68
	v_lshrrev_b32_e32 v68, 3, v68
	v_and_or_b32 v70, 0xe00, v70, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 1, v70
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v72, v66, 1
	v_add_lshl_u32 v79, v70, v68, 1
	v_lshrrev_b32_e32 v70, s80, v14
	ds_store_b16 v77, v72
	ds_load_u16 v68, v79
	v_and_b32_e32 v70, s8, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 9, v70
	v_lshrrev_b32_e32 v70, 3, v70
	v_and_or_b32 v72, 0xe00, v72, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 1, v72
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v74, v68, 1
	v_add_lshl_u32 v81, v72, v70, 1
	v_lshrrev_b32_e32 v72, s80, v15
	ds_store_b16 v79, v74
	ds_load_u16 v70, v81
	v_and_b32_e32 v72, s8, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 9, v72
	v_lshrrev_b32_e32 v72, 3, v72
	v_and_or_b32 v74, 0xe00, v74, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 1, v74
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v76, v70, 1
	v_add_lshl_u32 v83, v74, v72, 1
	v_lshrrev_b32_e32 v74, s80, v16
	ds_store_b16 v81, v76
	ds_load_u16 v72, v83
	v_and_b32_e32 v74, s8, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 9, v74
	v_lshrrev_b32_e32 v74, 3, v74
	v_and_or_b32 v76, 0xe00, v76, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 1, v76
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v78, v72, 1
	v_add_lshl_u32 v85, v76, v74, 1
	v_lshrrev_b32_e32 v76, s80, v5
	ds_store_b16 v83, v78
	ds_load_u16 v74, v85
	v_and_b32_e32 v76, s8, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 9, v76
	v_lshrrev_b32_e32 v76, 3, v76
	v_and_or_b32 v78, 0xe00, v78, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 1, v78
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v80, v74, 1
	v_add_lshl_u32 v87, v78, v76, 1
	v_lshrrev_b32_e32 v78, s80, v6
	ds_store_b16 v85, v80
	ds_load_u16 v76, v87
	v_and_b32_e32 v78, s8, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 9, v78
	v_lshrrev_b32_e32 v78, 3, v78
	v_and_or_b32 v80, 0xe00, v80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 1, v80
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v82, v76, 1
	v_add_lshl_u32 v89, v80, v78, 1
	v_lshrrev_b32_e32 v80, s80, v7
	ds_store_b16 v87, v82
	ds_load_u16 v78, v89
	v_and_b32_e32 v80, s8, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 9, v80
	v_lshrrev_b32_e32 v80, 3, v80
	v_and_or_b32 v82, 0xe00, v82, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 1, v82
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v84, v78, 1
	v_add_lshl_u32 v90, v82, v80, 1
	v_lshrrev_b32_e32 v82, s80, v8
	ds_store_b16 v89, v84
	ds_load_u16 v80, v90
	v_and_b32_e32 v82, s8, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 9, v82
	v_lshrrev_b32_e32 v82, 3, v82
	v_and_or_b32 v84, 0xe00, v84, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 1, v84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v86, v80, 1
	v_add_lshl_u32 v91, v84, v82, 1
	v_lshrrev_b32_e32 v84, s80, v29
	ds_store_b16 v90, v86
	ds_load_u16 v82, v91
	v_and_b32_e32 v84, s8, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 9, v84
	v_lshrrev_b32_e32 v84, 3, v84
	v_and_or_b32 v86, 0xe00, v86, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 1, v86
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v88, v82, 1
	v_add_lshl_u32 v92, v86, v84, 1
	v_lshrrev_b32_e32 v86, s80, v30
	ds_store_b16 v91, v88
	ds_load_u16 v84, v92
	v_and_b32_e32 v86, s8, v86
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 9, v86
	v_lshrrev_b32_e32 v86, 3, v86
	v_and_or_b32 v88, 0xe00, v88, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 1, v88
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v94, v84, 1
	v_add_lshl_u32 v93, v88, v86, 1
	v_lshrrev_b32_e32 v88, s80, v31
	ds_store_b16 v92, v94
	ds_load_u16 v86, v93
	v_and_b32_e32 v88, s8, v88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 9, v88
	v_lshrrev_b32_e32 v88, 3, v88
	v_and_or_b32 v94, 0xe00, v94, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 1, v94
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v86, 1
	v_add_lshl_u32 v94, v94, v88, 1
	ds_store_b16 v93, v95
	ds_load_u16 v88, v94
	v_lshlrev_b32_e32 v95, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v88, 1
	ds_store_b16 v94, v96
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[96:99], v95 offset1:1
	ds_load_2addr_b64 v[100:103], v95 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v96, v97, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v96, v96, v98, v99
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v97, v96, v100, v101
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_or_b32_e32 v100, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v97, v97, v102, v103
	v_and_b32_e32 v98, 15, v96
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v99, v97 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s3, 0, v98
	v_cmp_lt_u32_e64 s4, 1, v98
	v_cmp_lt_u32_e64 s5, 3, v98
	v_cmp_lt_u32_e64 s6, 7, v98
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, v99, 0, s3
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v99, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v97, v97, v99
	v_mov_b32_dpp v99, v97 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, 0, v99, s5
	v_add_nc_u32_e32 v97, v97, v99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v98, 0, v99, s6
	v_bfe_i32 v99, v96, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v97, v97, v98
	ds_swizzle_b32 v98, v97 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v98, v99, v98
	v_lshrrev_b32_e32 v99, 5, v0
	v_add_nc_u32_e32 v97, v97, v98
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v99
	v_cmpx_eq_u32_e64 v100, v0
	s_cbranch_execz .LBB42_343
; %bb.342:
	ds_store_b32 v98, v97 offset:16384
.LBB42_343:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_lt_u32_e64 s2, 15, v0
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s9, vcc_lo
	s_cbranch_execz .LBB42_345
; %bb.344:
	v_mad_i32_i24 v99, 0xffffffe4, v0, v95
	ds_load_b32 v100, v99 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v101, v100 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, v101, 0, s3
	v_add_nc_u32_e32 v100, v101, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	v_mov_b32_dpp v101, v100 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, 0, v101, s5
	v_add_nc_u32_e32 v100, v100, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	ds_store_b32 v99, v100 offset:16384
.LBB42_345:                             ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s9
	v_dual_mov_b32 v100, 0 :: v_dual_mov_b32 v99, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB42_347
; %bb.346:
	ds_load_b32 v99, v98 offset:16380
.LBB42_347:                             ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjtjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEEPjNSA_ItEEPtEEvT0_T1_T2_T3_SC_SC_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESG_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v98, -1, v96
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s3, 0, v98
	v_cndmask_b32_e64 v98, v98, v96, s3
	v_cmp_eq_u32_e64 s3, 0, v96
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v98
	ds_bpermute_b32 v97, v98, v97
	ds_load_b32 v98, v100 offset:16444
	ds_load_2addr_b64 v[100:103], v95 offset1:1
	ds_load_b32 v104, v95 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v96, v97, v99, s3
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v96, v98, 16, v96
	ds_load_b64 v[98:99], v95 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v97, v96, v100
	v_add_nc_u32_e32 v100, v101, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v102, v100
	v_add_nc_u32_e32 v102, v103, v101
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v103, v98, v102
	v_add_nc_u32_e32 v98, v99, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v99, v104, v98
	ds_store_2addr_b64 v95, v[96:97], v[100:101] offset1:1
	ds_store_2addr_b64 v95, v[102:103], v[98:99] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v108, v33
	ds_load_u16 v107, v34
	ds_load_u16 v106, v43
	ds_load_u16 v105, v45
	ds_load_u16 v104, v47
	ds_load_u16 v103, v49
	ds_load_u16 v102, v51
	ds_load_u16 v101, v53
	ds_load_u16 v100, v55
	ds_load_u16 v45, v57
	ds_load_u16 v43, v59
	ds_load_u16 v99, v61
	ds_load_u16 v98, v63
	ds_load_u16 v97, v65
	ds_load_u16 v47, v67
	ds_load_u16 v96, v69
	ds_load_u16 v49, v71
	ds_load_u16 v95, v73
	ds_load_u16 v55, v75
	ds_load_u16 v53, v77
	ds_load_u16 v51, v79
	ds_load_u16 v75, v81
	ds_load_u16 v73, v83
	ds_load_u16 v71, v85
	ds_load_u16 v57, v87
	ds_load_u16 v69, v89
	ds_load_u16 v59, v90
	ds_load_u16 v67, v91
	ds_load_u16 v65, v92
	ds_load_u16 v63, v93
	ds_load_u16 v61, v94
                                        ; implicit-def: $vgpr33
                                        ; implicit-def: $vgpr34
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB42_351
; %bb.348:
	v_lshrrev_b32_e32 v33, 3, v0
	v_lshlrev_b32_e32 v34, 10, v0
	v_add_nc_u32_e32 v77, 1, v0
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v33, 0x1c00, v34, v33
	v_dual_mov_b32 v34, 0x3e00 :: v_dual_lshlrev_b32 v33, 1, v33
	ds_load_u16 v33, v33
	v_cmpx_ne_u32_e32 16, v77
	s_cbranch_execz .LBB42_350
; %bb.349:
	v_lshlrev_b32_e32 v34, 10, v77
	v_lshrrev_b32_e32 v77, 3, v77
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v34, 0x1c00, v34, v77
	v_lshlrev_b32_e32 v34, 1, v34
	ds_load_u16 v34, v34
.LBB42_350:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v33, 0xffff, v33
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v34, v34, v33
.LBB42_351:                             ; %Flow99
	s_or_b32 exec_lo, exec_lo, s4
	v_and_b32_e32 v35, 0xffff, v35
	v_and_b32_e32 v36, 0xffff, v36
	v_and_b32_e32 v77, 0xffff, v37
	v_and_b32_e32 v38, 0xffff, v38
	v_and_b32_e32 v39, 0xffff, v39
	v_and_b32_e32 v79, 0xffff, v40
	v_and_b32_e32 v81, 0xffff, v42
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v37, 0xffff, v108
	v_and_b32_e32 v83, 0xffff, v84
	v_and_b32_e32 v84, 0xffff, v86
	v_and_b32_e32 v85, 0xffff, v88
	s_waitcnt lgkmcnt(29)
	v_and_b32_e32 v40, 0xffff, v107
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v42, 0xffff, v106
	s_waitcnt lgkmcnt(27)
	v_and_b32_e32 v86, 0xffff, v105
	s_waitcnt lgkmcnt(26)
	v_and_b32_e32 v87, 0xffff, v104
	s_waitcnt lgkmcnt(25)
	v_and_b32_e32 v88, 0xffff, v103
	v_and_b32_e32 v41, 0xffff, v41
	v_and_b32_e32 v44, 0xffff, v44
	v_and_b32_e32 v46, 0xffff, v46
	v_and_b32_e32 v48, 0xffff, v48
	v_add_nc_u32_e32 v35, v37, v35
	v_add_nc_u32_e32 v37, v40, v36
	v_add_nc_u32_e32 v40, v42, v77
	v_add_nc_u32_e32 v38, v86, v38
	v_add_nc_u32_e32 v36, v87, v39
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v42, 0xffff, v102
	v_add_nc_u32_e32 v39, v88, v79
	s_waitcnt lgkmcnt(23)
	v_and_b32_e32 v77, 0xffff, v101
	s_waitcnt lgkmcnt(22)
	v_and_b32_e32 v79, 0xffff, v100
	s_waitcnt lgkmcnt(21)
	v_and_b32_e32 v86, 0xffff, v45
	s_waitcnt lgkmcnt(20)
	v_and_b32_e32 v87, 0xffff, v43
	v_and_b32_e32 v50, 0xffff, v50
	v_and_b32_e32 v52, 0xffff, v52
	v_and_b32_e32 v54, 0xffff, v54
	v_and_b32_e32 v58, 0xffff, v58
	v_add_nc_u32_e32 v42, v42, v41
	v_add_nc_u32_e32 v45, v77, v81
	v_add_nc_u32_e32 v43, v79, v44
	v_add_nc_u32_e32 v41, v86, v46
	s_waitcnt lgkmcnt(19)
	v_and_b32_e32 v46, 0xffff, v99
	v_add_nc_u32_e32 v44, v87, v48
	s_waitcnt lgkmcnt(18)
	v_and_b32_e32 v48, 0xffff, v98
	s_waitcnt lgkmcnt(17)
	v_and_b32_e32 v77, 0xffff, v97
	s_waitcnt lgkmcnt(15)
	v_and_b32_e32 v81, 0xffff, v96
	v_and_b32_e32 v56, 0xffff, v56
	v_and_b32_e32 v60, 0xffff, v60
	v_and_b32_e32 v62, 0xffff, v62
	v_and_b32_e32 v66, 0xffff, v66
	v_and_b32_e32 v79, 0xffff, v47
	v_add_nc_u32_e32 v47, v46, v50
	v_add_nc_u32_e32 v50, v48, v52
	v_add_nc_u32_e32 v48, v77, v54
	s_waitcnt lgkmcnt(14)
	v_and_b32_e32 v52, 0xffff, v49
	v_add_nc_u32_e32 v49, v81, v58
	s_waitcnt lgkmcnt(13)
	v_and_b32_e32 v54, 0xffff, v95
	s_waitcnt lgkmcnt(11)
	v_and_b32_e32 v58, 0xffff, v53
	v_and_b32_e32 v64, 0xffff, v64
	v_and_b32_e32 v68, 0xffff, v68
	v_and_b32_e32 v72, 0xffff, v72
	v_and_b32_e32 v74, 0xffff, v74
	v_and_b32_e32 v78, 0xffff, v78
	v_add_nc_u32_e32 v46, v79, v56
	v_and_b32_e32 v56, 0xffff, v55
	v_add_nc_u32_e32 v52, v52, v60
	s_waitcnt lgkmcnt(10)
	v_and_b32_e32 v60, 0xffff, v51
	v_add_nc_u32_e32 v55, v54, v62
	v_add_nc_u32_e32 v51, v58, v66
	s_waitcnt lgkmcnt(8)
	v_and_b32_e32 v58, 0xffff, v73
	s_waitcnt lgkmcnt(7)
	v_and_b32_e32 v62, 0xffff, v71
	s_waitcnt lgkmcnt(5)
	v_and_b32_e32 v66, 0xffff, v69
	v_and_b32_e32 v70, 0xffff, v70
	v_and_b32_e32 v76, 0xffff, v76
	v_add_nc_u32_e32 v53, v56, v64
	v_and_b32_e32 v56, 0xffff, v75
	v_add_nc_u32_e32 v54, v60, v68
	v_and_b32_e32 v64, 0xffff, v57
	v_add_nc_u32_e32 v60, v58, v72
	v_add_nc_u32_e32 v58, v62, v74
	s_waitcnt lgkmcnt(4)
	v_and_b32_e32 v62, 0xffff, v59
	v_add_nc_u32_e32 v59, v66, v78
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v66, 0xffff, v63
	v_add_nc_u32_e32 v57, v56, v70
	v_add_nc_u32_e32 v56, v64, v76
	v_and_b32_e32 v64, 0xffff, v67
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v67, 0xffff, v61
	v_add_nc_u32_e32 v61, v66, v84
	v_lshlrev_b32_e32 v66, 2, v35
	v_and_b32_e32 v65, 0xffff, v65
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v66, v25 offset:64
	v_lshlrev_b32_e32 v25, 2, v37
	v_lshlrev_b32_e32 v66, 2, v40
	v_add_nc_u32_e32 v63, v65, v83
	v_add_nc_u32_e32 v65, v67, v85
	v_lshlrev_b32_e32 v67, 2, v38
	v_lshlrev_b32_e32 v68, 2, v36
	v_lshlrev_b32_e32 v69, 2, v39
	ds_store_b32 v25, v26 offset:64
	ds_store_b32 v66, v27 offset:64
	ds_store_b32 v67, v28 offset:64
	ds_store_b32 v68, v17 offset:64
	ds_store_b32 v69, v18 offset:64
	v_lshlrev_b32_e32 v17, 2, v42
	v_lshlrev_b32_e32 v18, 2, v45
	v_lshlrev_b32_e32 v25, 2, v43
	v_lshlrev_b32_e32 v26, 2, v41
	v_lshlrev_b32_e32 v27, 2, v44
	ds_store_b32 v17, v19 offset:64
	ds_store_b32 v18, v20 offset:64
	ds_store_b32 v25, v9 offset:64
	ds_store_b32 v26, v10 offset:64
	ds_store_b32 v27, v11 offset:64
	v_lshlrev_b32_e32 v9, 2, v47
	v_lshlrev_b32_e32 v10, 2, v50
	v_lshlrev_b32_e32 v11, 2, v48
	v_lshlrev_b32_e32 v17, 2, v46
	v_lshlrev_b32_e32 v18, 2, v49
	v_and_b32_e32 v80, 0xffff, v80
	ds_store_b32 v9, v12 offset:64
	ds_store_b32 v10, v1 offset:64
	ds_store_b32 v11, v2 offset:64
	ds_store_b32 v17, v3 offset:64
	ds_store_b32 v18, v4 offset:64
	v_lshlrev_b32_e32 v1, 2, v52
	v_and_b32_e32 v82, 0xffff, v82
	v_lshlrev_b32_e32 v2, 2, v55
	v_lshlrev_b32_e32 v3, 2, v53
	v_lshlrev_b32_e32 v4, 2, v51
	v_lshlrev_b32_e32 v9, 2, v54
	v_add_nc_u32_e32 v62, v62, v80
	ds_store_b32 v1, v21 offset:64
	ds_store_b32 v2, v22 offset:64
	ds_store_b32 v3, v23 offset:64
	ds_store_b32 v4, v24 offset:64
	ds_store_b32 v9, v13 offset:64
	v_lshlrev_b32_e32 v1, 2, v57
	v_add_nc_u32_e32 v64, v64, v82
	v_lshlrev_b32_e32 v2, 2, v60
	v_lshlrev_b32_e32 v3, 2, v58
	v_lshlrev_b32_e32 v4, 2, v56
	v_lshlrev_b32_e32 v9, 2, v59
	ds_store_b32 v1, v14 offset:64
	ds_store_b32 v2, v15 offset:64
	ds_store_b32 v3, v16 offset:64
	ds_store_b32 v4, v5 offset:64
	ds_store_b32 v9, v6 offset:64
	v_lshlrev_b32_e32 v1, 2, v62
	v_lshlrev_b32_e32 v2, 2, v64
	v_lshlrev_b32_e32 v3, 2, v63
	v_lshlrev_b32_e32 v4, 2, v61
	v_lshlrev_b32_e32 v5, 2, v65
	ds_store_b32 v1, v7 offset:64
	ds_store_b32 v2, v8 offset:64
	ds_store_b32 v3, v29 offset:64
	ds_store_b32 v4, v30 offset:64
	ds_store_b32 v5, v31 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s3
; %bb.352:                              ; %_ZN7rocprim16block_radix_rankILj512ELj4ELNS_26block_radix_rank_algorithmE0ELj1ELj1EE9rank_keysIjLj31EZNS_6detail25onesweep_iteration_helperIjtjLj512ELj31ELj4ELb0ELS1_0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEEPjNSA_ItEEPtEEvT0_T1_T2_T3_SC_SC_PNS4_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS4_11raw_storageINS4_16block_radix_rankILj512ELj4ELb0ELj1ELj1EE13storage_type_EEESG_RA1_jS13_.exit._crit_edge.i.i
	v_mov_b32_e32 v1, 0
; %bb.353:                              ; %Flow96
	s_and_not1_saveexec_b32 s3, s2
	s_cbranch_execz .LBB42_364
; %bb.354:
	v_lshl_or_b32 v3, s15, 4, v0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v7, 0
	s_mov_b32 s4, 0
	s_mov_b32 s5, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v34
	v_add_co_u32 v1, s2, s86, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s2, s87, v2, s2
                                        ; implicit-def: $sgpr2
	global_store_b32 v[1:2], v3, off
.LBB42_355:                             ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB42_358 Depth 2
	s_or_b32 s2, s2, exec_lo
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB42_361
; %bb.356:                              ;   in Loop: Header=BB42_355 Depth=1
	s_add_i32 s5, s5, -1
	s_mov_b32 s6, exec_lo
	v_lshl_or_b32 v3, s5, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s2, s86, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s2, s87, v6, s2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB42_360
; %bb.357:                              ; %.lr.ph.i.i.preheader
                                        ;   in Loop: Header=BB42_355 Depth=1
	s_mov_b32 s9, 0
.LBB42_358:                             ; %.lr.ph.i.i
                                        ;   Parent Loop BB42_355 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s2, 0, v3
	s_or_b32 s9, s2, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB42_358
; %bb.359:                              ; %Flow93
                                        ;   in Loop: Header=BB42_355 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
.LBB42_360:                             ; %Flow94
                                        ;   in Loop: Header=BB42_355 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s6
	v_and_b32_e32 v5, 0x3fffffff, v8
	v_cmp_eq_u32_e64 s2, 0x80000000, v3
	v_add_nc_u32_e32 v7, v5, v7
	s_branch .LBB42_362
.LBB42_361:                             ;   in Loop: Header=BB42_355 Depth=1
                                        ; implicit-def: $sgpr5
.LBB42_362:                             ; %Flow95
                                        ;   in Loop: Header=BB42_355 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s6, exec_lo, s2
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB42_355
; %bb.363:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v3, v7, v34
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v7, v33
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v2, v1
	ds_store_b32 v4, v2
.LBB42_364:                             ; %Flow97
	s_or_b32 exec_lo, exec_lo, s3
	v_lshlrev_b32_e32 v2, 2, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b32_e32 v125, 1, v32
	v_add_nc_u32_e32 v70, 64, v2
	v_lshlrev_b32_e32 v2, 2, v0
	v_or_b32_e32 v32, 0x3c00, v0
	v_lshlrev_b32_e32 v35, 1, v35
	v_lshlrev_b32_e32 v37, 1, v37
	ds_load_2addr_stride64_b32 v[9:10], v70 offset0:8 offset1:16
	ds_load_2addr_stride64_b32 v[11:12], v70 offset0:24 offset1:32
	ds_load_2addr_stride64_b32 v[13:14], v70 offset0:40 offset1:48
	ds_load_2addr_stride64_b32 v[16:17], v70 offset0:56 offset1:64
	ds_load_2addr_stride64_b32 v[18:19], v70 offset0:72 offset1:80
	ds_load_2addr_stride64_b32 v[21:22], v70 offset0:88 offset1:96
	ds_load_2addr_stride64_b32 v[23:24], v70 offset0:104 offset1:112
	ds_load_b32 v78, v2 offset:64
	v_lshlrev_b32_e32 v40, 1, v40
	v_lshlrev_b32_e32 v38, 1, v38
	v_lshlrev_b32_e32 v36, 1, v36
	v_lshlrev_b32_e32 v39, 1, v39
	v_lshlrev_b32_e32 v42, 1, v42
	v_lshlrev_b32_e32 v45, 1, v45
	v_lshlrev_b32_e32 v43, 1, v43
	v_lshlrev_b32_e32 v41, 1, v41
	v_lshlrev_b32_e32 v44, 1, v44
	v_lshlrev_b32_e32 v47, 1, v47
	v_lshlrev_b32_e32 v50, 1, v50
	v_lshlrev_b32_e32 v48, 1, v48
	s_waitcnt lgkmcnt(7)
	v_lshrrev_b32_e32 v3, s80, v9
	s_waitcnt lgkmcnt(6)
	v_lshrrev_b32_e32 v4, s80, v11
	s_waitcnt lgkmcnt(5)
	v_lshrrev_b32_e32 v5, s80, v13
	s_waitcnt lgkmcnt(4)
	v_lshrrev_b32_e32 v6, s80, v16
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v7, s80, v18
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v8, s80, v21
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v15, s80, v23
	v_and_b32_e32 v2, s8, v5
	v_and_b32_e32 v3, s8, v3
	v_and_b32_e32 v5, s8, v6
	v_and_b32_e32 v4, s8, v4
	v_and_b32_e32 v6, s8, v7
	v_lshlrev_b32_e32 v67, 2, v2
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v2, s80, v78
	v_and_b32_e32 v7, s8, v8
	v_and_b32_e32 v8, s8, v15
	v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v72, 2, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_and_b32_e32 v2, s8, v2
	v_lshlrev_b32_e32 v31, 2, v5
	v_lshrrev_b32_e32 v5, s80, v10
	v_lshlrev_b32_e32 v69, 2, v4
	v_lshlrev_b32_e32 v27, 2, v6
	v_lshlrev_b32_e32 v80, 2, v2
	v_lshlrev_b32_e32 v25, 2, v7
	v_lshlrev_b32_e32 v20, 2, v8
	ds_load_b32 v4, v72
	ds_load_b32 v6, v69
	ds_load_b32 v79, v67
	ds_load_b32 v82, v31
	ds_load_b32 v83, v27
	ds_load_b32 v84, v25
	ds_load_b32 v85, v20
	v_and_b32_e32 v5, s8, v5
	ds_load_b32 v29, v80
	v_lshrrev_b32_e32 v7, s80, v12
	v_lshrrev_b32_e32 v15, s80, v17
	v_lshrrev_b32_e32 v2, s80, v22
	v_lshlrev_b32_e32 v81, 2, v5
	v_lshrrev_b32_e32 v8, s80, v14
	v_lshrrev_b32_e32 v26, s80, v19
	v_lshrrev_b32_e32 v28, s80, v24
	v_and_b32_e32 v7, s8, v7
	ds_load_b32 v76, v81
	v_and_b32_e32 v15, s8, v15
	v_and_b32_e32 v2, s8, v2
	v_and_b32_e32 v8, s8, v8
	v_and_b32_e32 v26, s8, v26
	v_and_b32_e32 v28, s8, v28
	v_lshlrev_b32_e32 v73, 2, v7
	v_lshlrev_b32_e32 v68, 2, v15
	v_lshlrev_b32_e32 v30, 2, v2
	v_or_b32_e32 v15, 0x200, v0
	v_lshlrev_b32_e32 v71, 2, v8
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v29, v0
	v_lshlrev_b32_e32 v66, 2, v26
	v_lshlrev_b32_e32 v26, 2, v28
	ds_load_b32 v86, v73
	ds_load_b32 v87, v71
	ds_load_b32 v88, v68
	ds_load_b32 v89, v66
	ds_load_b32 v90, v30
	ds_load_b32 v92, v26
	v_or_b32_e32 v8, 0x400, v0
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	v_add_nc_u32_e32 v2, v4, v15
	v_or_b32_e32 v7, 0x600, v0
	v_or_b32_e32 v5, 0x800, v0
	v_or_b32_e32 v4, 0xa00, v0
	v_lshlrev_b32_e32 v46, 1, v46
	v_lshlrev_b64 v[74:75], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v76, v8
	v_add_co_u32 v28, s2, s70, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v29, s2, s71, v29, s2
	v_lshlrev_b64 v[76:77], 2, v[2:3]
	v_add_nc_u32_e32 v2, v6, v7
	v_add_co_u32 v74, s2, s70, v74
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v75, s2, s71, v75, s2
	global_store_b32 v[28:29], v78, off
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v86, v5
	global_store_b32 v[74:75], v9, off
	v_add_co_u32 v74, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v75, s2, s71, v77, s2
	v_lshlrev_b64 v[76:77], 2, v[2:3]
	v_or_b32_e32 v6, 0xc00, v0
	v_add_nc_u32_e32 v2, v79, v4
	v_add_co_u32 v28, s2, s70, v28
	v_add_co_ci_u32_e64 v29, s2, s71, v29, s2
	v_add_co_u32 v76, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[78:79], 2, v[2:3]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v87, v6
	v_or_b32_e32 v9, 0xe00, v0
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	s_clause 0x2
	global_store_b32 v[74:75], v10, off
	global_store_b32 v[28:29], v11, off
	global_store_b32 v[76:77], v12, off
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	v_add_nc_u32_e32 v2, v82, v9
	v_or_b32_e32 v11, 0x1000, v0
	v_add_co_u32 v74, s2, s70, v78
	v_or_b32_e32 v12, 0x1200, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[76:77], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v88, v11
	v_add_co_ci_u32_e64 v75, s2, s71, v79, s2
	v_add_co_u32 v28, s2, s70, v28
	v_add_co_ci_u32_e64 v29, s2, s71, v29, s2
	v_add_co_u32 v76, s2, s70, v76
	v_lshlrev_b64 v[78:79], 2, v[2:3]
	v_add_nc_u32_e32 v2, v83, v12
	v_or_b32_e32 v10, 0x1400, v0
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	s_clause 0x2
	global_store_b32 v[74:75], v13, off
	global_store_b32 v[28:29], v14, off
	global_store_b32 v[76:77], v16, off
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v2, v89, v10
	v_or_b32_e32 v13, 0x1600, v0
	v_or_b32_e32 v14, 0x1800, v0
	v_add_co_u32 v74, s2, s70, v78
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[76:77], 2, v[2:3]
	v_add_nc_u32_e32 v2, v84, v13
	v_add_co_ci_u32_e64 v75, s2, s71, v79, s2
	v_add_co_u32 v28, s2, s70, v28
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[78:79], 2, v[2:3]
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v90, v14
	ds_load_2addr_stride64_b32 v[90:91], v70 offset0:120 offset1:128
	v_add_co_ci_u32_e64 v29, s2, s71, v29, s2
	v_add_co_u32 v76, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	s_clause 0x1
	global_store_b32 v[74:75], v17, off
	global_store_b32 v[28:29], v18, off
	ds_load_2addr_stride64_b32 v[74:75], v70 offset0:136 offset1:144
	v_or_b32_e32 v17, 0x1a00, v0
	global_store_b32 v[76:77], v19, off
	v_lshlrev_b64 v[18:19], 2, v[2:3]
	v_add_co_u32 v28, s2, s70, v78
	v_add_nc_u32_e32 v2, v85, v17
	v_add_co_ci_u32_e64 v29, s2, s71, v79, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v76, s2, s70, v18
	v_add_co_ci_u32_e64 v77, s2, s71, v19, s2
	ds_load_2addr_stride64_b32 v[78:79], v70 offset0:152 offset1:160
	v_lshlrev_b64 v[18:19], 2, v[2:3]
	v_or_b32_e32 v16, 0x1c00, v0
	ds_load_2addr_stride64_b32 v[95:96], v70 offset0:168 offset1:176
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v82, s80, v90
	v_lshrrev_b32_e32 v83, s80, v91
	v_lshlrev_b32_e32 v49, 1, v49
	v_add_nc_u32_e32 v2, v92, v16
	v_add_co_u32 v92, s2, s70, v18
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v93, s2, s71, v19, s2
	v_and_b32_e32 v19, s8, v82
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v84, s80, v74
	v_and_b32_e32 v82, s8, v83
	v_lshlrev_b64 v[97:98], 2, v[2:3]
	v_or_b32_e32 v18, 0x1e00, v0
	v_lshlrev_b32_e32 v89, 2, v19
	v_and_b32_e32 v2, s8, v84
	v_lshlrev_b32_e32 v87, 2, v82
	v_lshrrev_b32_e32 v19, s80, v75
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v82, s80, v79
	ds_load_b32 v94, v89
	v_lshlrev_b32_e32 v85, 2, v2
	ds_load_b32 v99, v87
	v_lshrrev_b32_e32 v2, s80, v78
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v83, s80, v95
	v_lshrrev_b32_e32 v84, s80, v96
	v_and_b32_e32 v19, s8, v19
	v_and_b32_e32 v82, s8, v82
	v_and_b32_e32 v2, s8, v2
	v_and_b32_e32 v83, s8, v83
	v_and_b32_e32 v100, s8, v84
	v_lshlrev_b32_e32 v88, 2, v19
	v_lshlrev_b32_e32 v84, 2, v82
	v_lshlrev_b32_e32 v86, 2, v2
	v_lshlrev_b32_e32 v83, 2, v83
	v_lshlrev_b32_e32 v82, 2, v100
	ds_load_b32 v100, v85
	ds_load_b32 v101, v88
	ds_load_b32 v102, v86
	ds_load_b32 v103, v84
	ds_load_b32 v104, v83
	ds_load_b32 v105, v82
	v_or_b32_e32 v19, 0x2000, v0
	s_clause 0x2
	global_store_b32 v[28:29], v21, off
	global_store_b32 v[76:77], v22, off
	global_store_b32 v[92:93], v23, off
	v_or_b32_e32 v22, 0x2200, v0
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v2, v94, v18
	v_add_co_u32 v76, s2, s70, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v77, s2, s71, v98, s2
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v99, v19
	v_or_b32_e32 v23, 0x2400, v0
	v_or_b32_e32 v21, 0x2600, v0
	v_lshlrev_b32_e32 v52, 1, v52
	v_lshlrev_b32_e32 v55, 1, v55
	v_lshlrev_b64 v[92:93], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v100, v22
	v_add_co_u32 v28, s2, s70, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v29, s2, s71, v29, s2
	v_lshlrev_b64 v[97:98], 2, v[2:3]
	v_add_co_u32 v92, s2, s70, v92
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v93, s2, s71, v93, s2
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v101, v23
	s_clause 0x2
	global_store_b32 v[76:77], v24, off
	global_store_b32 v[28:29], v90, off
	global_store_b32 v[92:93], v91, off
	v_add_co_u32 v76, s2, s70, v97
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v77, s2, s71, v98, s2
	ds_load_2addr_stride64_b32 v[97:98], v70 offset0:184 offset1:192
	ds_load_2addr_stride64_b32 v[106:107], v70 offset0:200 offset1:208
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v102, v21
	v_or_b32_e32 v24, 0x2800, v0
	global_store_b32 v[76:77], v74, off
	v_lshlrev_b32_e32 v53, 1, v53
	v_lshlrev_b32_e32 v51, 1, v51
	v_lshlrev_b64 v[90:91], 2, v[2:3]
	v_add_co_u32 v92, s2, s70, v28
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v103, v24
	v_or_b32_e32 v28, 0x2a00, v0
	v_add_co_ci_u32_e64 v93, s2, s71, v29, s2
	v_add_co_u32 v90, s2, s70, v90
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[76:77], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v104, v28
	v_add_co_ci_u32_e64 v91, s2, s71, v91, s2
	s_clause 0x1
	global_store_b32 v[92:93], v75, off
	global_store_b32 v[90:91], v78, off
	v_lshlrev_b64 v[74:75], 2, v[2:3]
	ds_load_2addr_stride64_b32 v[108:109], v70 offset0:216 offset1:224
	ds_load_2addr_stride64_b32 v[110:111], v70 offset0:232 offset1:240
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v70, s80, v97
	v_add_co_u32 v76, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	v_lshrrev_b32_e32 v78, s80, v98
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v90, s80, v106
	v_add_co_u32 v99, s2, s70, v74
	v_and_b32_e32 v74, s8, v70
	v_or_b32_e32 v29, 0x2c00, v0
	v_add_co_ci_u32_e64 v100, s2, s71, v75, s2
	v_and_b32_e32 v75, s8, v78
	v_and_b32_e32 v78, s8, v90
	v_lshlrev_b32_e32 v122, 2, v74
	v_add_nc_u32_e32 v2, v105, v29
	v_or_b32_e32 v70, 0x2e00, v0
	v_lshlrev_b32_e32 v123, 2, v75
	v_lshlrev_b32_e32 v93, 2, v78
	ds_load_b32 v78, v122
	v_lshlrev_b64 v[101:102], 2, v[2:3]
	v_lshrrev_b32_e32 v2, s80, v107
	ds_load_b32 v105, v123
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v74, s80, v108
	v_lshrrev_b32_e32 v75, s80, v109
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v90, s80, v110
	v_and_b32_e32 v2, s8, v2
	v_lshrrev_b32_e32 v91, s80, v111
	ds_load_b32 v112, v93
	v_and_b32_e32 v74, s8, v74
	v_and_b32_e32 v75, s8, v75
	v_and_b32_e32 v90, s8, v90
	v_lshlrev_b32_e32 v124, 2, v2
	v_and_b32_e32 v2, s8, v91
	v_lshlrev_b32_e32 v94, 2, v74
	v_lshlrev_b32_e32 v92, 2, v75
	v_lshlrev_b32_e32 v91, 2, v90
	v_or_b32_e32 v75, 0x3000, v0
	v_lshlrev_b32_e32 v90, 2, v2
	ds_load_b32 v113, v124
	ds_load_b32 v114, v94
	ds_load_b32 v115, v92
	ds_load_b32 v116, v91
	ds_load_b32 v117, v90
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v2, v78, v70
	v_add_co_u32 v101, s2, s70, v101
	v_or_b32_e32 v74, 0x3200, v0
	v_add_co_ci_u32_e64 v102, s2, s71, v102, s2
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[103:104], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v105, v75
	s_clause 0x2
	global_store_b32 v[76:77], v79, off
	global_store_b32 v[99:100], v95, off
	global_store_b32 v[101:102], v96, off
	v_or_b32_e32 v77, 0x3400, v0
	v_or_b32_e32 v76, 0x3800, v0
	v_lshlrev_b32_e32 v54, 1, v54
	v_lshlrev_b64 v[78:79], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v112, v74
	v_add_co_u32 v95, s2, s70, v103
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v96, s2, s71, v104, s2
	v_lshlrev_b64 v[99:100], 2, v[2:3]
	v_add_co_u32 v101, s2, s70, v78
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v113, v77
	v_or_b32_e32 v78, 0x3600, v0
	v_add_co_ci_u32_e64 v102, s2, s71, v79, s2
	v_add_co_u32 v99, s2, s70, v99
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[103:104], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v114, v78
	v_add_co_ci_u32_e64 v100, s2, s71, v100, s2
	s_clause 0x2
	global_store_b32 v[95:96], v97, off
	global_store_b32 v[101:102], v98, off
	global_store_b32 v[99:100], v106, off
	v_lshlrev_b64 v[99:100], 2, v[2:3]
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v2, v115, v76
	v_or_b32_e32 v79, 0x3a00, v0
	v_add_co_u32 v112, s2, s70, v103
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v113, s2, s71, v104, s2
	v_lshlrev_b64 v[101:102], 2, v[2:3]
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v116, v79
	s_lshl_b64 s[2:3], s[84:85], 1
	v_lshlrev_b32_e32 v57, 1, v57
	s_add_u32 s4, s72, s2
	v_add_co_u32 v114, s2, s70, v99
	v_lshlrev_b64 v[103:104], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v117, v32
	v_add_co_ci_u32_e64 v115, s2, s71, v100, s2
	v_add_co_u32 v116, s2, s70, v101
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[118:119], 2, v[2:3]
	v_add_co_ci_u32_e64 v117, s2, s71, v102, s2
	v_add_co_u32 v120, s2, s70, v103
	v_add_co_ci_u32_e64 v121, s2, s71, v104, s2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v118, s2, s70, v118
	s_addc_u32 s5, s73, s3
	v_add_co_ci_u32_e64 v119, s2, s71, v119, s2
	s_clause 0x2
	global_load_b128 v[95:98], v125, s[4:5]
	global_load_b128 v[99:102], v125, s[4:5] offset:16
	global_load_b128 v[103:106], v125, s[4:5] offset:32
	s_clause 0x4
	global_store_b32 v[112:113], v107, off
	global_store_b32 v[114:115], v108, off
	global_store_b32 v[116:117], v109, off
	global_store_b32 v[120:121], v110, off
	global_store_b32 v[118:119], v111, off
	s_clause 0x1
	global_load_b96 v[107:109], v125, s[4:5] offset:48
	global_load_u16 v2, v125, s[4:5] offset:60
	v_lshlrev_b32_e32 v110, 1, v0
	v_lshlrev_b32_e32 v60, 1, v60
	v_lshlrev_b32_e32 v58, 1, v58
	v_lshlrev_b32_e32 v56, 1, v56
	v_lshlrev_b32_e32 v59, 1, v59
	v_lshlrev_b32_e32 v62, 1, v62
	v_lshlrev_b32_e32 v64, 1, v64
	v_lshlrev_b32_e32 v63, 1, v63
	v_lshlrev_b32_e32 v61, 1, v61
	v_lshlrev_b32_e32 v65, 1, v65
	v_lshlrev_b32_e32 v111, 1, v0
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b16 v35, v95 offset:64
	ds_store_b16_d16_hi v37, v95 offset:64
	ds_store_b16 v40, v96 offset:64
	ds_store_b16_d16_hi v38, v96 offset:64
	ds_store_b16 v36, v97 offset:64
	ds_store_b16_d16_hi v39, v97 offset:64
	ds_store_b16 v42, v98 offset:64
	ds_store_b16_d16_hi v45, v98 offset:64
	ds_store_b16 v43, v99 offset:64
	ds_store_b16_d16_hi v41, v99 offset:64
	ds_store_b16 v44, v100 offset:64
	ds_store_b16_d16_hi v47, v100 offset:64
	ds_store_b16 v50, v101 offset:64
	ds_store_b16_d16_hi v48, v101 offset:64
	ds_store_b16 v46, v102 offset:64
	ds_store_b16_d16_hi v49, v102 offset:64
	ds_store_b16 v52, v103 offset:64
	ds_store_b16_d16_hi v55, v103 offset:64
	ds_store_b16 v53, v104 offset:64
	ds_store_b16_d16_hi v51, v104 offset:64
	ds_store_b16 v54, v105 offset:64
	ds_store_b16_d16_hi v57, v105 offset:64
	ds_store_b16 v60, v106 offset:64
	ds_store_b16_d16_hi v58, v106 offset:64
	ds_store_b16 v56, v107 offset:64
	ds_store_b16_d16_hi v59, v107 offset:64
	ds_store_b16 v62, v108 offset:64
	ds_store_b16_d16_hi v64, v108 offset:64
	ds_store_b16 v63, v109 offset:64
	ds_store_b16_d16_hi v61, v109 offset:64
	ds_store_b16 v65, v2 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v37, v110 offset:64
	ds_load_b32 v2, v80
	ds_load_b32 v35, v72
	ds_load_b32 v36, v81
	ds_load_b32 v38, v69
	ds_load_b32 v39, v73
	ds_load_b32 v40, v67
	ds_load_b32 v41, v71
	ds_load_b32 v42, v31
	ds_load_u16 v43, v111 offset:1088
	ds_load_u16 v44, v111 offset:2112
	ds_load_u16 v45, v111 offset:3136
	ds_load_u16 v46, v111 offset:4160
	ds_load_u16 v47, v111 offset:5184
	ds_load_u16 v48, v111 offset:6208
	ds_load_u16 v49, v111 offset:7232
	ds_load_u16 v50, v111 offset:8256
	ds_load_b32 v51, v68
	ds_load_b32 v27, v27
	ds_load_b32 v52, v66
	ds_load_b32 v53, v25
	ds_load_b32 v54, v30
	ds_load_b32 v20, v20
	ds_load_b32 v55, v26
	ds_load_b32 v56, v89
	ds_load_u16 v57, v111 offset:9280
	ds_load_u16 v58, v111 offset:10304
	ds_load_u16 v59, v111 offset:11328
	ds_load_u16 v60, v111 offset:12352
	ds_load_u16 v61, v111 offset:13376
	ds_load_u16 v62, v111 offset:14400
	ds_load_u16 v63, v111 offset:15424
	ds_load_u16 v64, v111 offset:16448
	ds_load_b32 v65, v87
	ds_load_b32 v66, v85
	ds_load_b32 v67, v88
	ds_load_b32 v68, v86
	ds_load_b32 v69, v84
	ds_load_b32 v71, v83
	ds_load_b32 v72, v82
	ds_load_b32 v73, v122
	ds_load_u16 v80, v111 offset:17472
	ds_load_u16 v81, v111 offset:18496
	ds_load_u16 v82, v111 offset:19520
	ds_load_u16 v83, v111 offset:20544
	ds_load_u16 v84, v111 offset:21568
	ds_load_u16 v85, v111 offset:22592
	ds_load_u16 v86, v111 offset:23616
	ds_load_u16 v87, v111 offset:24640
	s_waitcnt lgkmcnt(47)
	v_add_nc_u32_e32 v2, v2, v0
	ds_load_b32 v88, v123
	ds_load_b32 v89, v93
	ds_load_b32 v93, v124
	ds_load_b32 v94, v94
	ds_load_b32 v92, v92
	ds_load_b32 v91, v91
	v_lshlrev_b64 v[25:26], 1, v[2:3]
	s_waitcnt lgkmcnt(52)
	v_add_nc_u32_e32 v2, v35, v15
	ds_load_u16 v15, v111 offset:25664
	ds_load_u16 v95, v111 offset:26688
	ds_load_u16 v96, v111 offset:27712
	ds_load_u16 v97, v111 offset:28736
	ds_load_u16 v98, v111 offset:29760
	ds_load_u16 v99, v111 offset:30784
	v_lshlrev_b64 v[30:31], 1, v[2:3]
	s_waitcnt lgkmcnt(57)
	v_add_nc_u32_e32 v2, v36, v8
	v_add_co_u32 v25, s2, s74, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v26, s2, s75, v26, s2
	v_lshlrev_b64 v[35:36], 1, v[2:3]
	s_waitcnt lgkmcnt(56)
	v_add_nc_u32_e32 v2, v38, v7
	v_add_co_u32 v7, s2, s74, v30
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s2, s75, v31, s2
	global_store_b16 v[25:26], v37, off
	v_lshlrev_b64 v[25:26], 1, v[2:3]
	s_waitcnt lgkmcnt(55)
	v_add_nc_u32_e32 v2, v39, v5
	s_waitcnt lgkmcnt(51)
	global_store_b16 v[7:8], v43, off
	v_add_co_u32 v7, s2, s74, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s2, s75, v36, s2
	v_lshlrev_b64 v[30:31], 1, v[2:3]
	v_add_nc_u32_e32 v2, v40, v4
	v_add_co_u32 v4, s2, s74, v25
	v_add_co_ci_u32_e64 v5, s2, s75, v26, s2
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[25:26], 1, v[2:3]
	v_add_nc_u32_e32 v2, v41, v6
	ds_load_b32 v38, v90
	s_waitcnt lgkmcnt(51)
	global_store_b16 v[7:8], v44, off
	s_waitcnt lgkmcnt(50)
	global_store_b16 v[4:5], v45, off
	v_add_co_u32 v30, s2, s74, v30
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	v_add_nc_u32_e32 v2, v42, v9
	v_add_co_ci_u32_e64 v31, s2, s75, v31, s2
	v_add_co_u32 v6, s2, s74, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	s_waitcnt lgkmcnt(44)
	v_add_nc_u32_e32 v2, v51, v11
	v_add_co_ci_u32_e64 v7, s2, s75, v26, s2
	v_add_co_u32 v4, s2, s74, v4
	v_lshlrev_b64 v[25:26], 1, v[2:3]
	s_waitcnt lgkmcnt(43)
	v_add_nc_u32_e32 v2, v27, v12
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	v_add_co_u32 v8, s2, s74, v8
	global_store_b16 v[30:31], v46, off
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b16 v[6:7], v47, off
	global_store_b16 v[4:5], v48, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	s_waitcnt lgkmcnt(42)
	v_add_nc_u32_e32 v2, v52, v10
	global_store_b16 v[8:9], v49, off
	v_add_co_u32 v6, s2, s74, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v26, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	s_waitcnt lgkmcnt(41)
	v_add_nc_u32_e32 v2, v53, v13
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(40)
	v_add_nc_u32_e32 v2, v54, v14
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	global_store_b16 v[6:7], v50, off
	s_waitcnt lgkmcnt(36)
	global_store_b16 v[4:5], v57, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	v_add_nc_u32_e32 v2, v20, v17
	s_waitcnt lgkmcnt(35)
	global_store_b16 v[8:9], v58, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	v_add_nc_u32_e32 v2, v55, v16
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	v_add_nc_u32_e32 v2, v56, v18
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_waitcnt lgkmcnt(34)
	global_store_b16 v[6:7], v59, off
	s_waitcnt lgkmcnt(33)
	global_store_b16 v[4:5], v60, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	s_waitcnt lgkmcnt(28)
	v_add_nc_u32_e32 v2, v65, v19
	global_store_b16 v[8:9], v61, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	s_waitcnt lgkmcnt(27)
	v_add_nc_u32_e32 v2, v66, v22
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(26)
	v_add_nc_u32_e32 v2, v67, v23
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b16 v[6:7], v62, off
	global_store_b16 v[4:5], v63, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	s_waitcnt lgkmcnt(25)
	v_add_nc_u32_e32 v2, v68, v21
	global_store_b16 v[8:9], v64, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	s_waitcnt lgkmcnt(24)
	v_add_nc_u32_e32 v2, v69, v24
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(23)
	v_add_nc_u32_e32 v2, v71, v28
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_waitcnt lgkmcnt(20)
	global_store_b16 v[6:7], v80, off
	s_waitcnt lgkmcnt(19)
	global_store_b16 v[4:5], v81, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	v_add_nc_u32_e32 v2, v72, v29
	s_waitcnt lgkmcnt(18)
	global_store_b16 v[8:9], v82, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	v_add_nc_u32_e32 v2, v73, v70
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(12)
	v_add_nc_u32_e32 v2, v88, v75
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b16 v[6:7], v83, off
	global_store_b16 v[4:5], v84, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	s_waitcnt lgkmcnt(11)
	v_add_nc_u32_e32 v2, v89, v74
	global_store_b16 v[8:9], v85, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	s_waitcnt lgkmcnt(10)
	v_add_nc_u32_e32 v2, v93, v77
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(9)
	v_add_nc_u32_e32 v2, v94, v78
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b16 v[6:7], v86, off
	global_store_b16 v[4:5], v87, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	s_waitcnt lgkmcnt(8)
	v_add_nc_u32_e32 v2, v92, v76
	s_waitcnt lgkmcnt(6)
	global_store_b16 v[8:9], v15, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	v_add_nc_u32_e32 v2, v91, v79
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v38, v32
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 1, v[2:3]
	v_add_co_u32 v10, s2, s74, v10
	v_add_co_ci_u32_e64 v11, s2, s75, v11, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s2, s74, v2
	v_add_co_ci_u32_e64 v3, s2, s75, v3, s2
	s_clause 0x4
	global_store_b16 v[6:7], v95, off
	global_store_b16 v[4:5], v96, off
	global_store_b16 v[8:9], v97, off
	global_store_b16 v[10:11], v98, off
	global_store_b16 v[2:3], v99, off
	s_load_b32 s0, s[0:1], 0x50
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s0
	s_cselect_b32 s0, -1, 0
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
; %bb.365:
	v_add_nc_u32_e32 v2, v33, v34
	s_or_b32 s7, s7, exec_lo
; %bb.366:                              ; %Flow105
	s_or_b32 exec_lo, exec_lo, s0
.LBB42_367:                             ; %Flow104
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB42_369
; %bb.368:                              ; %_ZN7rocprim6detail25onesweep_iteration_helperIjtjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEEPjNS7_ItEEPtEEvT0_T1_T2_T3_S9_S9_PNS0_23onesweep_lookback_stateES3_jjjRNS4_13storage_type_E.exit.sink.split.i
	v_lshlrev_b32_e32 v3, 2, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	ds_load_b32 v3, v3
	v_add_co_u32 v0, vcc_lo, s78, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s79, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB42_369:                             ; %_ZN7rocprim6detail18onesweep_iterationILj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0EN6thrust10device_ptrIjEEPjNS4_ItEEPtjNS_19identity_decomposerEEEvT4_T5_T6_T7_jPT8_SF_PNS0_23onesweep_lookback_stateET9_jjj.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
		.amdhsa_group_segment_fixed_size 63552
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 127
		.amdhsa_next_free_sgpr 88
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
.Lfunc_end42:
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end42-_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EN6thrust10device_ptrIjEEPjNS6_ItEEPtjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 25440
; NumSgprs: 90
; NumVgprs: 127
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 63552 bytes/workgroup (compile time only)
; SGPRBlocks: 11
; VGPRBlocks: 15
; NumSGPRsForWavesPerEU: 90
; NumVGPRsForWavesPerEU: 127
; Occupancy: 8
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.protected	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj ; -- Begin function _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.globl	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	8
	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj: ; @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
; %bb.0:
	s_clause 0x3
	s_load_b128 s[80:83], s[0:1], 0x44
	s_load_b256 s[68:75], s[0:1], 0x0
	s_load_b128 s[76:79], s[0:1], 0x28
	s_load_b64 s[86:87], s[0:1], 0x38
	v_mul_u32_u24_e32 v32, 31, v0
	s_mul_i32 s84, s15, 0x3e00
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_u32 s15, s82
	s_cbranch_scc0 .LBB43_337
; %bb.1:
	s_load_b32 s4, s[0:1], 0x20
	s_mov_b32 s85, 0
	s_mul_i32 s66, s82, 0xffffc200
	v_dual_mov_b32 v4, -1 :: v_dual_lshlrev_b32 v1, 2, v32
	s_lshl_b64 s[2:3], s[84:85], 2
	v_mov_b32_e32 v3, -1
	s_waitcnt lgkmcnt(0)
	s_add_i32 s66, s66, s4
	s_add_u32 s4, s68, s2
	s_addc_u32 s3, s69, s3
	v_add_co_u32 v1, s4, s4, v1
	v_cmp_gt_u32_e64 s2, s66, v32
	v_add_co_ci_u32_e64 v2, null, s3, 0, s4
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB43_3
; %bb.2:
	global_load_b32 v4, v[1:2], off
.LBB43_3:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v5, 1, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s66, v5
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB43_5
; %bb.4:
	global_load_b32 v3, v[1:2], off offset:4
.LBB43_5:
	s_or_b32 exec_lo, exec_lo, s4
	v_dual_mov_b32 v5, -1 :: v_dual_add_nc_u32 v6, 2, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e64 s4, s66, v6
	v_mov_b32_e32 v6, -1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB43_7
; %bb.6:
	global_load_b32 v6, v[1:2], off offset:8
.LBB43_7:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v7, 3, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s66, v7
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB43_9
; %bb.8:
	global_load_b32 v5, v[1:2], off offset:12
.LBB43_9:
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v42, -1 :: v_dual_add_nc_u32 v7, 4, v32
	v_mov_b32_e32 v41, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s66, v7
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB43_11
; %bb.10:
	global_load_b32 v42, v[1:2], off offset:16
.LBB43_11:
	s_or_b32 exec_lo, exec_lo, s7
	v_add_nc_u32_e32 v7, 5, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s66, v7
	s_and_saveexec_b32 s8, s7
	s_cbranch_execz .LBB43_13
; %bb.12:
	global_load_b32 v41, v[1:2], off offset:20
.LBB43_13:
	s_or_b32 exec_lo, exec_lo, s8
	v_dual_mov_b32 v44, -1 :: v_dual_add_nc_u32 v7, 6, v32
	v_mov_b32_e32 v43, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s66, v7
	s_and_saveexec_b32 s9, s8
	s_cbranch_execz .LBB43_15
; %bb.14:
	global_load_b32 v44, v[1:2], off offset:24
.LBB43_15:
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v7, 7, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s66, v7
	s_and_saveexec_b32 s10, s9
	s_cbranch_execz .LBB43_17
; %bb.16:
	global_load_b32 v43, v[1:2], off offset:28
.LBB43_17:
	s_or_b32 exec_lo, exec_lo, s10
	v_dual_mov_b32 v46, -1 :: v_dual_add_nc_u32 v7, 8, v32
	v_mov_b32_e32 v45, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s66, v7
	s_and_saveexec_b32 s11, s10
	s_cbranch_execz .LBB43_19
; %bb.18:
	global_load_b32 v46, v[1:2], off offset:32
.LBB43_19:
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v7, 9, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s11, s66, v7
	s_and_saveexec_b32 s12, s11
	s_cbranch_execz .LBB43_21
; %bb.20:
	global_load_b32 v45, v[1:2], off offset:36
.LBB43_21:
	s_or_b32 exec_lo, exec_lo, s12
	v_dual_mov_b32 v48, -1 :: v_dual_add_nc_u32 v7, 10, v32
	v_mov_b32_e32 v47, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s66, v7
	s_and_saveexec_b32 s13, s12
	s_cbranch_execz .LBB43_23
; %bb.22:
	global_load_b32 v48, v[1:2], off offset:40
.LBB43_23:
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v7, 11, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s13, s66, v7
	s_and_saveexec_b32 s14, s13
	s_cbranch_execz .LBB43_25
; %bb.24:
	global_load_b32 v47, v[1:2], off offset:44
.LBB43_25:
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v50, -1 :: v_dual_add_nc_u32 v7, 12, v32
	v_mov_b32_e32 v49, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s14, s66, v7
	s_and_saveexec_b32 s16, s14
	s_cbranch_execz .LBB43_27
; %bb.26:
	global_load_b32 v50, v[1:2], off offset:48
.LBB43_27:
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v7, 13, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s16, s66, v7
	s_and_saveexec_b32 s17, s16
	s_cbranch_execz .LBB43_29
; %bb.28:
	global_load_b32 v49, v[1:2], off offset:52
.LBB43_29:
	s_or_b32 exec_lo, exec_lo, s17
	v_dual_mov_b32 v52, -1 :: v_dual_add_nc_u32 v7, 14, v32
	v_mov_b32_e32 v51, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s17, s66, v7
	s_and_saveexec_b32 s18, s17
	s_cbranch_execz .LBB43_31
; %bb.30:
	global_load_b32 v52, v[1:2], off offset:56
.LBB43_31:
	s_or_b32 exec_lo, exec_lo, s18
	v_add_nc_u32_e32 v7, 15, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s18, s66, v7
	s_and_saveexec_b32 s19, s18
	s_cbranch_execz .LBB43_33
; %bb.32:
	global_load_b32 v51, v[1:2], off offset:60
.LBB43_33:
	s_or_b32 exec_lo, exec_lo, s19
	v_dual_mov_b32 v54, -1 :: v_dual_add_nc_u32 v7, 16, v32
	v_mov_b32_e32 v53, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s19, s66, v7
	s_and_saveexec_b32 s20, s19
	s_cbranch_execz .LBB43_35
; %bb.34:
	global_load_b32 v54, v[1:2], off offset:64
.LBB43_35:
	s_or_b32 exec_lo, exec_lo, s20
	v_add_nc_u32_e32 v7, 17, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s20, s66, v7
	s_and_saveexec_b32 s21, s20
	s_cbranch_execz .LBB43_37
; %bb.36:
	global_load_b32 v53, v[1:2], off offset:68
.LBB43_37:
	s_or_b32 exec_lo, exec_lo, s21
	v_dual_mov_b32 v56, -1 :: v_dual_add_nc_u32 v7, 18, v32
	v_mov_b32_e32 v55, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s21, s66, v7
	s_and_saveexec_b32 s22, s21
	s_cbranch_execz .LBB43_39
; %bb.38:
	global_load_b32 v56, v[1:2], off offset:72
.LBB43_39:
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v7, 19, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s22, s66, v7
	s_and_saveexec_b32 s23, s22
	s_cbranch_execz .LBB43_41
; %bb.40:
	global_load_b32 v55, v[1:2], off offset:76
.LBB43_41:
	s_or_b32 exec_lo, exec_lo, s23
	v_dual_mov_b32 v58, -1 :: v_dual_add_nc_u32 v7, 20, v32
	v_mov_b32_e32 v57, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s23, s66, v7
	s_and_saveexec_b32 s24, s23
	s_cbranch_execz .LBB43_43
; %bb.42:
	global_load_b32 v58, v[1:2], off offset:80
.LBB43_43:
	s_or_b32 exec_lo, exec_lo, s24
	v_add_nc_u32_e32 v7, 21, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s24, s66, v7
	s_and_saveexec_b32 s25, s24
	s_cbranch_execz .LBB43_45
; %bb.44:
	global_load_b32 v57, v[1:2], off offset:84
.LBB43_45:
	s_or_b32 exec_lo, exec_lo, s25
	v_dual_mov_b32 v60, -1 :: v_dual_add_nc_u32 v7, 22, v32
	v_mov_b32_e32 v59, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s25, s66, v7
	s_and_saveexec_b32 s26, s25
	s_cbranch_execz .LBB43_47
; %bb.46:
	global_load_b32 v60, v[1:2], off offset:88
.LBB43_47:
	s_or_b32 exec_lo, exec_lo, s26
	v_add_nc_u32_e32 v7, 23, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s26, s66, v7
	s_and_saveexec_b32 s27, s26
	s_cbranch_execz .LBB43_49
; %bb.48:
	global_load_b32 v59, v[1:2], off offset:92
.LBB43_49:
	s_or_b32 exec_lo, exec_lo, s27
	v_dual_mov_b32 v62, -1 :: v_dual_add_nc_u32 v7, 24, v32
	v_mov_b32_e32 v61, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s27, s66, v7
	s_and_saveexec_b32 s28, s27
	s_cbranch_execz .LBB43_51
; %bb.50:
	global_load_b32 v62, v[1:2], off offset:96
.LBB43_51:
	s_or_b32 exec_lo, exec_lo, s28
	v_add_nc_u32_e32 v7, 25, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s28, s66, v7
	s_and_saveexec_b32 s29, s28
	s_cbranch_execz .LBB43_53
; %bb.52:
	global_load_b32 v61, v[1:2], off offset:100
.LBB43_53:
	s_or_b32 exec_lo, exec_lo, s29
	v_dual_mov_b32 v64, -1 :: v_dual_add_nc_u32 v7, 26, v32
	v_mov_b32_e32 v63, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s29, s66, v7
	s_and_saveexec_b32 s30, s29
	s_cbranch_execz .LBB43_55
; %bb.54:
	global_load_b32 v64, v[1:2], off offset:104
.LBB43_55:
	s_or_b32 exec_lo, exec_lo, s30
	v_add_nc_u32_e32 v7, 27, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s30, s66, v7
	s_and_saveexec_b32 s31, s30
	s_cbranch_execz .LBB43_57
; %bb.56:
	global_load_b32 v63, v[1:2], off offset:108
.LBB43_57:
	s_or_b32 exec_lo, exec_lo, s31
	v_dual_mov_b32 v66, -1 :: v_dual_add_nc_u32 v7, 28, v32
	v_mov_b32_e32 v65, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s31, s66, v7
	s_and_saveexec_b32 s33, s31
	s_cbranch_execz .LBB43_59
; %bb.58:
	global_load_b32 v66, v[1:2], off offset:112
.LBB43_59:
	s_or_b32 exec_lo, exec_lo, s33
	v_add_nc_u32_e32 v7, 29, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s33, s66, v7
	s_and_saveexec_b32 s34, s33
	s_cbranch_execz .LBB43_61
; %bb.60:
	global_load_b32 v65, v[1:2], off offset:116
.LBB43_61:
	s_or_b32 exec_lo, exec_lo, s34
	v_add_nc_u32_e32 v7, 30, v32
	v_mov_b32_e32 v67, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s34, s66, v7
	s_and_saveexec_b32 s35, s34
	s_cbranch_execz .LBB43_63
; %bb.62:
	global_load_b32 v67, v[1:2], off offset:120
.LBB43_63:                              ; %_ZN7rocprim25block_load_direct_blockedIPjjLj31EjEEvjT_RAT1__T0_jT2_.exit.i.i
	s_or_b32 exec_lo, exec_lo, s35
	v_or_b32_e32 v1, 0xfffffe00, v0
	v_dual_mov_b32 v7, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_mov_b32 s35, 0
.LBB43_64:                              ; %.lr.ph.i.i.i.i.i.i23.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v1, 0x200, v1
	ds_store_b32 v2, v7
	v_add_nc_u32_e32 v2, 0x800, v2
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v1
	s_or_b32 s35, vcc_lo, s35
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB43_64
; %bb.65:                               ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i25.i
	s_or_b32 exec_lo, exec_lo, s35
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_lshl_b32 s35, -1, s81
	v_lshrrev_b32_e32 v10, s80, v6
	s_not_b32 s67, s35
	s_mov_b32 s39, exec_lo
	v_and_b32_e32 v1, s67, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v2, 9, v1
	v_lshrrev_b32_e32 v1, 3, v1
	v_and_or_b32 v2, 0xe00, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v2
	v_add_lshl_u32 v7, v2, v1, 1
	v_lshrrev_b32_e32 v2, s80, v3
	ds_load_u16 v1, v7
	v_and_b32_e32 v2, s67, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 9, v2
	v_lshrrev_b32_e32 v2, 3, v2
	v_and_or_b32 v8, 0xe00, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 1, v8
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v9, v1, 1
	v_add_lshl_u32 v8, v8, v2, 1
	ds_store_b16 v7, v9
	ds_load_u16 v2, v8
	v_and_b32_e32 v9, s67, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 9, v9
	v_lshrrev_b32_e32 v9, 3, v9
	v_and_or_b32 v10, 0xe00, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 1, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v11, v2, 1
	v_add_lshl_u32 v15, v10, v9, 1
	v_lshrrev_b32_e32 v10, s80, v5
	ds_store_b16 v8, v11
	ds_load_u16 v9, v15
	v_and_b32_e32 v10, s67, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 9, v10
	v_lshrrev_b32_e32 v10, 3, v10
	v_and_or_b32 v11, 0xe00, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 1, v11
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v12, v9, 1
	v_add_lshl_u32 v17, v11, v10, 1
	v_lshrrev_b32_e32 v11, s80, v42
	ds_store_b16 v15, v12
	ds_load_u16 v10, v17
	v_and_b32_e32 v11, s67, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 9, v11
	v_lshrrev_b32_e32 v11, 3, v11
	v_and_or_b32 v12, 0xe00, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 1, v12
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v13, v10, 1
	v_add_lshl_u32 v19, v12, v11, 1
	v_lshrrev_b32_e32 v12, s80, v41
	ds_store_b16 v17, v13
	ds_load_u16 v11, v19
	v_and_b32_e32 v12, s67, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 9, v12
	v_lshrrev_b32_e32 v12, 3, v12
	v_and_or_b32 v13, 0xe00, v13, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 1, v13
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v14, v11, 1
	v_add_lshl_u32 v21, v13, v12, 1
	v_lshrrev_b32_e32 v13, s80, v44
	ds_store_b16 v19, v14
	ds_load_u16 v12, v21
	v_and_b32_e32 v13, s67, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 9, v13
	v_lshrrev_b32_e32 v13, 3, v13
	v_and_or_b32 v14, 0xe00, v14, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 1, v14
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v16, v12, 1
	v_add_lshl_u32 v23, v14, v13, 1
	v_lshrrev_b32_e32 v14, s80, v43
	ds_store_b16 v21, v16
	ds_load_u16 v13, v23
	v_and_b32_e32 v14, s67, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v16, 9, v14
	v_lshrrev_b32_e32 v14, 3, v14
	v_and_or_b32 v16, 0xe00, v16, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v16, 1, v16
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v18, v13, 1
	v_add_lshl_u32 v25, v16, v14, 1
	v_lshrrev_b32_e32 v16, s80, v46
	ds_store_b16 v23, v18
	ds_load_u16 v14, v25
	v_and_b32_e32 v16, s67, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v18, 9, v16
	v_lshrrev_b32_e32 v16, 3, v16
	v_and_or_b32 v18, 0xe00, v18, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v18, 1, v18
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v20, v14, 1
	v_add_lshl_u32 v27, v18, v16, 1
	v_lshrrev_b32_e32 v18, s80, v45
	ds_store_b16 v25, v20
	ds_load_u16 v16, v27
	v_and_b32_e32 v18, s67, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v20, 9, v18
	v_lshrrev_b32_e32 v18, 3, v18
	v_and_or_b32 v20, 0xe00, v20, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v20, 1, v20
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v22, v16, 1
	v_add_lshl_u32 v29, v20, v18, 1
	v_lshrrev_b32_e32 v20, s80, v48
	ds_store_b16 v27, v22
	ds_load_u16 v18, v29
	v_and_b32_e32 v20, s67, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v22, 9, v20
	v_lshrrev_b32_e32 v20, 3, v20
	v_and_or_b32 v22, 0xe00, v22, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v22, 1, v22
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v24, v18, 1
	v_add_lshl_u32 v31, v22, v20, 1
	v_lshrrev_b32_e32 v22, s80, v47
	ds_store_b16 v29, v24
	ds_load_u16 v20, v31
	v_and_b32_e32 v22, s67, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v24, 9, v22
	v_lshrrev_b32_e32 v22, 3, v22
	v_and_or_b32 v24, 0xe00, v24, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v24, 1, v24
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v26, v20, 1
	v_add_lshl_u32 v34, v24, v22, 1
	v_lshrrev_b32_e32 v24, s80, v50
	ds_store_b16 v31, v26
	ds_load_u16 v22, v34
	v_and_b32_e32 v24, s67, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v26, 9, v24
	v_lshrrev_b32_e32 v24, 3, v24
	v_and_or_b32 v26, 0xe00, v26, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v26, 1, v26
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v28, v22, 1
	v_add_lshl_u32 v36, v26, v24, 1
	v_lshrrev_b32_e32 v26, s80, v49
	ds_store_b16 v34, v28
	ds_load_u16 v24, v36
	v_and_b32_e32 v26, s67, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v28, 9, v26
	v_lshrrev_b32_e32 v26, 3, v26
	v_and_or_b32 v28, 0xe00, v28, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v28, 1, v28
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v30, v24, 1
	v_add_lshl_u32 v38, v28, v26, 1
	v_lshrrev_b32_e32 v28, s80, v52
	ds_store_b16 v36, v30
	ds_load_u16 v26, v38
	v_and_b32_e32 v28, s67, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v30, 9, v28
	v_lshrrev_b32_e32 v28, 3, v28
	v_and_or_b32 v30, 0xe00, v30, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v30, 1, v30
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v33, v26, 1
	v_add_lshl_u32 v40, v30, v28, 1
	v_lshrrev_b32_e32 v30, s80, v51
	ds_store_b16 v38, v33
	ds_load_u16 v28, v40
	v_and_b32_e32 v30, s67, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v33, 9, v30
	v_lshrrev_b32_e32 v30, 3, v30
	v_and_or_b32 v33, 0xe00, v33, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v33, 1, v33
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v35, v28, 1
	v_add_lshl_u32 v69, v33, v30, 1
	v_lshrrev_b32_e32 v33, s80, v54
	ds_store_b16 v40, v35
	ds_load_u16 v30, v69
	v_and_b32_e32 v33, s67, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v35, 9, v33
	v_lshrrev_b32_e32 v33, 3, v33
	v_and_or_b32 v35, 0xe00, v35, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v35, 1, v35
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v37, v30, 1
	v_add_lshl_u32 v71, v35, v33, 1
	v_lshrrev_b32_e32 v35, s80, v53
	ds_store_b16 v69, v37
	ds_load_u16 v33, v71
	v_and_b32_e32 v35, s67, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v37, 9, v35
	v_lshrrev_b32_e32 v35, 3, v35
	v_and_or_b32 v37, 0xe00, v37, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v37, 1, v37
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v39, v33, 1
	v_add_lshl_u32 v73, v37, v35, 1
	v_lshrrev_b32_e32 v37, s80, v56
	ds_store_b16 v71, v39
	ds_load_u16 v35, v73
	v_and_b32_e32 v37, s67, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 9, v37
	v_lshrrev_b32_e32 v37, 3, v37
	v_and_or_b32 v39, 0xe00, v39, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 1, v39
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v68, v35, 1
	v_add_lshl_u32 v75, v39, v37, 1
	v_lshrrev_b32_e32 v39, s80, v55
	ds_store_b16 v73, v68
	ds_load_u16 v37, v75
	v_and_b32_e32 v39, s67, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 9, v39
	v_lshrrev_b32_e32 v39, 3, v39
	v_and_or_b32 v68, 0xe00, v68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 1, v68
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v70, v37, 1
	v_add_lshl_u32 v77, v68, v39, 1
	v_lshrrev_b32_e32 v68, s80, v58
	ds_store_b16 v75, v70
	ds_load_u16 v39, v77
	v_and_b32_e32 v68, s67, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 9, v68
	v_lshrrev_b32_e32 v68, 3, v68
	v_and_or_b32 v70, 0xe00, v70, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 1, v70
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v72, v39, 1
	v_add_lshl_u32 v79, v70, v68, 1
	v_lshrrev_b32_e32 v70, s80, v57
	ds_store_b16 v77, v72
	ds_load_u16 v68, v79
	v_and_b32_e32 v70, s67, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 9, v70
	v_lshrrev_b32_e32 v70, 3, v70
	v_and_or_b32 v72, 0xe00, v72, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 1, v72
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v74, v68, 1
	v_add_lshl_u32 v81, v72, v70, 1
	v_lshrrev_b32_e32 v72, s80, v60
	ds_store_b16 v79, v74
	ds_load_u16 v70, v81
	v_and_b32_e32 v72, s67, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 9, v72
	v_lshrrev_b32_e32 v72, 3, v72
	v_and_or_b32 v74, 0xe00, v74, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 1, v74
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v76, v70, 1
	v_add_lshl_u32 v83, v74, v72, 1
	v_lshrrev_b32_e32 v74, s80, v59
	ds_store_b16 v81, v76
	ds_load_u16 v72, v83
	v_and_b32_e32 v74, s67, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 9, v74
	v_lshrrev_b32_e32 v74, 3, v74
	v_and_or_b32 v76, 0xe00, v76, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 1, v76
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v78, v72, 1
	v_add_lshl_u32 v85, v76, v74, 1
	v_lshrrev_b32_e32 v76, s80, v62
	ds_store_b16 v83, v78
	ds_load_u16 v74, v85
	v_and_b32_e32 v76, s67, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 9, v76
	v_lshrrev_b32_e32 v76, 3, v76
	v_and_or_b32 v78, 0xe00, v78, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 1, v78
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v80, v74, 1
	v_add_lshl_u32 v87, v78, v76, 1
	v_lshrrev_b32_e32 v78, s80, v61
	ds_store_b16 v85, v80
	ds_load_u16 v76, v87
	v_and_b32_e32 v78, s67, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 9, v78
	v_lshrrev_b32_e32 v78, 3, v78
	v_and_or_b32 v80, 0xe00, v80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 1, v80
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v82, v76, 1
	v_add_lshl_u32 v89, v80, v78, 1
	v_lshrrev_b32_e32 v80, s80, v64
	ds_store_b16 v87, v82
	ds_load_u16 v78, v89
	v_and_b32_e32 v80, s67, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 9, v80
	v_lshrrev_b32_e32 v80, 3, v80
	v_and_or_b32 v82, 0xe00, v82, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 1, v82
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v84, v78, 1
	v_add_lshl_u32 v90, v82, v80, 1
	v_lshrrev_b32_e32 v82, s80, v63
	ds_store_b16 v89, v84
	ds_load_u16 v80, v90
	v_and_b32_e32 v82, s67, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 9, v82
	v_lshrrev_b32_e32 v82, 3, v82
	v_and_or_b32 v84, 0xe00, v84, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 1, v84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v86, v80, 1
	v_add_lshl_u32 v91, v84, v82, 1
	v_lshrrev_b32_e32 v84, s80, v66
	ds_store_b16 v90, v86
	ds_load_u16 v82, v91
	v_and_b32_e32 v84, s67, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 9, v84
	v_lshrrev_b32_e32 v84, 3, v84
	v_and_or_b32 v86, 0xe00, v86, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 1, v86
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v88, v82, 1
	v_add_lshl_u32 v92, v86, v84, 1
	v_lshrrev_b32_e32 v86, s80, v65
	ds_store_b16 v91, v88
	ds_load_u16 v84, v92
	v_and_b32_e32 v86, s67, v86
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 9, v86
	v_lshrrev_b32_e32 v86, 3, v86
	v_and_or_b32 v88, 0xe00, v88, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 1, v88
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v94, v84, 1
	v_add_lshl_u32 v93, v88, v86, 1
	v_lshrrev_b32_e32 v88, s80, v67
	ds_store_b16 v92, v94
	ds_load_u16 v86, v93
	v_and_b32_e32 v88, s67, v88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 9, v88
	v_lshrrev_b32_e32 v88, 3, v88
	v_and_or_b32 v94, 0xe00, v94, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 1, v94
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v86, 1
	v_add_lshl_u32 v94, v94, v88, 1
	ds_store_b16 v93, v95
	ds_load_u16 v88, v94
	v_lshlrev_b32_e32 v95, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v88, 1
	ds_store_b16 v94, v96
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[96:99], v95 offset1:1
	ds_load_2addr_b64 v[100:103], v95 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v96, v97, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v96, v96, v98, v99
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v97, v96, v100, v101
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_or_b32_e32 v100, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v97, v97, v102, v103
	v_and_b32_e32 v98, 15, v96
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v99, v97 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s35, 0, v98
	v_cmp_lt_u32_e64 s36, 1, v98
	v_cmp_lt_u32_e64 s37, 3, v98
	v_cmp_lt_u32_e64 s38, 7, v98
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, v99, 0, s35
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v99, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v97, v97, v99
	v_mov_b32_dpp v99, v97 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, 0, v99, s37
	v_add_nc_u32_e32 v97, v97, v99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v98, 0, v99, s38
	v_bfe_i32 v99, v96, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v97, v97, v98
	ds_swizzle_b32 v98, v97 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v98, v99, v98
	v_lshrrev_b32_e32 v99, 5, v0
	v_add_nc_u32_e32 v97, v97, v98
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v99
	v_cmpx_eq_u32_e64 v100, v0
	s_cbranch_execz .LBB43_67
; %bb.66:
	ds_store_b32 v98, v97 offset:16384
.LBB43_67:
	s_or_b32 exec_lo, exec_lo, s39
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s39, vcc_lo
	s_cbranch_execz .LBB43_69
; %bb.68:
	v_mad_i32_i24 v99, 0xffffffe4, v0, v95
	ds_load_b32 v100, v99 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v101, v100 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, v101, 0, s35
	v_add_nc_u32_e32 v100, v101, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	v_mov_b32_dpp v101, v100 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, 0, v101, s37
	v_add_nc_u32_e32 v100, v100, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s38
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	ds_store_b32 v99, v100 offset:16384
.LBB43_69:                              ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i34.i
	s_or_b32 exec_lo, exec_lo, s39
	v_dual_mov_b32 v100, 0 :: v_dual_mov_b32 v99, 0
	s_mov_b32 s36, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB43_71
; %bb.70:
	ds_load_b32 v99, v98 offset:16380
.LBB43_71:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjtjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb0EPjN6thrust10device_ptrIjEEPtNSB_ItEEEEvT0_T1_T2_T3_S9_S9_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESG_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s36
	v_add_nc_u32_e32 v98, -1, v96
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s35, 0, v98
	v_cndmask_b32_e64 v98, v98, v96, s35
	v_cmp_eq_u32_e64 s35, 0, v96
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v98
	ds_bpermute_b32 v97, v98, v97
	ds_load_b32 v98, v100 offset:16444
	ds_load_2addr_b64 v[100:103], v95 offset1:1
	ds_load_b32 v104, v95 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v96, v97, v99, s35
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v96, v98, 16, v96
	ds_load_b64 v[98:99], v95 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v97, v96, v100
	v_add_nc_u32_e32 v100, v101, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v102, v100
	v_add_nc_u32_e32 v102, v103, v101
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v103, v98, v102
	v_add_nc_u32_e32 v98, v99, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v99, v104, v98
	ds_store_2addr_b64 v95, v[96:97], v[100:101] offset1:1
	ds_store_2addr_b64 v95, v[102:103], v[98:99] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v107, v7
	ds_load_u16 v106, v8
	ds_load_u16 v105, v15
	ds_load_u16 v104, v17
	ds_load_u16 v103, v19
	ds_load_u16 v15, v21
	ds_load_u16 v102, v23
	ds_load_u16 v101, v25
	ds_load_u16 v100, v27
	ds_load_u16 v99, v29
	ds_load_u16 v17, v31
	ds_load_u16 v98, v34
	ds_load_u16 v97, v36
	ds_load_u16 v25, v38
	ds_load_u16 v21, v40
	ds_load_u16 v19, v69
	ds_load_u16 v23, v71
	ds_load_u16 v96, v73
	ds_load_u16 v95, v75
	ds_load_u16 v77, v77
	ds_load_u16 v27, v79
	ds_load_u16 v75, v81
	ds_load_u16 v73, v83
	ds_load_u16 v36, v85
	ds_load_u16 v31, v87
	ds_load_u16 v29, v89
	ds_load_u16 v34, v90
	ds_load_u16 v71, v91
	ds_load_u16 v69, v92
	ds_load_u16 v40, v93
	ds_load_u16 v38, v94
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB43_75
; %bb.72:
	v_lshrrev_b32_e32 v7, 3, v0
	v_lshlrev_b32_e32 v8, 10, v0
	v_add_nc_u32_e32 v79, 1, v0
	s_mov_b32 s37, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v7, 0x1c00, v8, v7
	v_dual_mov_b32 v8, 0x3e00 :: v_dual_lshlrev_b32 v7, 1, v7
	ds_load_u16 v7, v7
	v_cmpx_ne_u32_e32 16, v79
	s_cbranch_execz .LBB43_74
; %bb.73:
	v_lshlrev_b32_e32 v8, 10, v79
	v_lshrrev_b32_e32 v79, 3, v79
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v8, 0x1c00, v8, v79
	v_lshlrev_b32_e32 v8, 1, v8
	ds_load_u16 v8, v8
.LBB43_74:
	s_or_b32 exec_lo, exec_lo, s37
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v8, v7
.LBB43_75:                              ; %Flow92
	s_or_b32 exec_lo, exec_lo, s36
	v_and_b32_e32 v1, 0xffff, v1
	v_and_b32_e32 v79, 0xffff, v9
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v9, 0xffff, v107
	v_and_b32_e32 v2, 0xffff, v2
	v_and_b32_e32 v81, 0xffff, v11
	s_waitcnt lgkmcnt(29)
	v_and_b32_e32 v11, 0xffff, v106
	v_and_b32_e32 v12, 0xffff, v12
	v_add_nc_u32_e32 v9, v9, v1
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v1, 0xffff, v105
	v_and_b32_e32 v83, 0xffff, v14
	v_add_nc_u32_e32 v14, v11, v2
	s_waitcnt lgkmcnt(25)
	v_and_b32_e32 v2, 0xffff, v15
	v_and_b32_e32 v10, 0xffff, v10
	v_and_b32_e32 v13, 0xffff, v13
	v_and_b32_e32 v85, 0xffff, v16
	v_and_b32_e32 v87, 0xffff, v20
	v_and_b32_e32 v16, 0xffff, v104
	v_and_b32_e32 v20, 0xffff, v103
	v_add_nc_u32_e32 v15, v1, v79
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v1, 0xffff, v102
	v_add_nc_u32_e32 v12, v2, v12
	s_waitcnt lgkmcnt(23)
	v_and_b32_e32 v2, 0xffff, v101
	v_and_b32_e32 v18, 0xffff, v18
	v_add_nc_u32_e32 v11, v16, v10
	v_add_nc_u32_e32 v10, v20, v81
	s_waitcnt lgkmcnt(21)
	v_and_b32_e32 v81, 0xffff, v99
	v_add_nc_u32_e32 v16, v1, v13
	s_waitcnt lgkmcnt(20)
	v_and_b32_e32 v1, 0xffff, v17
	v_and_b32_e32 v22, 0xffff, v22
	v_add_nc_u32_e32 v20, v2, v83
	s_waitcnt lgkmcnt(19)
	v_and_b32_e32 v2, 0xffff, v98
	v_and_b32_e32 v24, 0xffff, v24
	v_and_b32_e32 v79, 0xffff, v100
	v_add_nc_u32_e32 v13, v81, v18
	v_add_nc_u32_e32 v18, v1, v87
	s_waitcnt lgkmcnt(18)
	v_and_b32_e32 v1, 0xffff, v97
	v_and_b32_e32 v30, 0xffff, v30
	s_waitcnt lgkmcnt(16)
	v_and_b32_e32 v81, 0xffff, v21
	v_add_nc_u32_e32 v21, v2, v22
	s_waitcnt lgkmcnt(15)
	v_and_b32_e32 v2, 0xffff, v19
	v_and_b32_e32 v26, 0xffff, v26
	v_and_b32_e32 v28, 0xffff, v28
	v_and_b32_e32 v33, 0xffff, v33
	v_add_nc_u32_e32 v17, v79, v85
	v_and_b32_e32 v79, 0xffff, v25
	v_add_nc_u32_e32 v25, v1, v24
	s_waitcnt lgkmcnt(14)
	v_and_b32_e32 v1, 0xffff, v23
	v_and_b32_e32 v35, 0xffff, v35
	v_add_nc_u32_e32 v23, v2, v30
	s_waitcnt lgkmcnt(13)
	v_and_b32_e32 v2, 0xffff, v96
	v_and_b32_e32 v37, 0xffff, v37
	v_and_b32_e32 v39, 0xffff, v39
	v_and_b32_e32 v68, 0xffff, v68
	v_add_nc_u32_e32 v22, v79, v26
	v_add_nc_u32_e32 v19, v81, v28
	s_waitcnt lgkmcnt(12)
	v_and_b32_e32 v24, 0xffff, v95
	s_waitcnt lgkmcnt(11)
	v_and_b32_e32 v28, 0xffff, v77
	v_add_nc_u32_e32 v26, v1, v33
	s_waitcnt lgkmcnt(10)
	v_and_b32_e32 v1, 0xffff, v27
	v_and_b32_e32 v70, 0xffff, v70
	v_add_nc_u32_e32 v30, v2, v35
	s_waitcnt lgkmcnt(9)
	v_and_b32_e32 v2, 0xffff, v75
	v_and_b32_e32 v72, 0xffff, v72
	v_add_nc_u32_e32 v27, v24, v37
	v_add_nc_u32_e32 v24, v28, v39
	v_add_nc_u32_e32 v28, v1, v68
	s_waitcnt lgkmcnt(8)
	v_and_b32_e32 v1, 0xffff, v73
	v_and_b32_e32 v78, 0xffff, v78
	s_waitcnt lgkmcnt(6)
	v_and_b32_e32 v35, 0xffff, v31
	v_add_nc_u32_e32 v31, v2, v70
	s_waitcnt lgkmcnt(5)
	v_and_b32_e32 v2, 0xffff, v29
	v_and_b32_e32 v76, 0xffff, v76
	v_and_b32_e32 v80, 0xffff, v80
	v_and_b32_e32 v33, 0xffff, v36
	v_add_nc_u32_e32 v36, v1, v72
	s_waitcnt lgkmcnt(4)
	v_and_b32_e32 v1, 0xffff, v34
	v_and_b32_e32 v82, 0xffff, v82
	v_add_nc_u32_e32 v34, v2, v78
	s_waitcnt lgkmcnt(3)
	v_and_b32_e32 v2, 0xffff, v71
	v_and_b32_e32 v84, 0xffff, v84
	v_and_b32_e32 v86, 0xffff, v86
	v_and_b32_e32 v88, 0xffff, v88
	v_add_nc_u32_e32 v29, v35, v76
	s_waitcnt lgkmcnt(2)
	v_and_b32_e32 v35, 0xffff, v69
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v40, 0xffff, v40
	v_add_nc_u32_e32 v37, v1, v80
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v1, 0xffff, v38
	v_add_nc_u32_e32 v39, v2, v82
	v_lshlrev_b32_e32 v2, 2, v9
	v_add_nc_u32_e32 v38, v35, v84
	v_add_nc_u32_e32 v35, v40, v86
	v_add_nc_u32_e32 v40, v1, v88
	v_lshlrev_b32_e32 v1, 2, v14
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v2, v4 offset:64
	v_lshlrev_b32_e32 v2, 2, v15
	v_lshlrev_b32_e32 v4, 2, v11
	v_lshlrev_b32_e32 v68, 2, v10
	v_lshlrev_b32_e32 v69, 2, v12
	ds_store_b32 v1, v3 offset:64
	ds_store_b32 v2, v6 offset:64
	ds_store_b32 v4, v5 offset:64
	ds_store_b32 v68, v42 offset:64
	ds_store_b32 v69, v41 offset:64
	v_lshlrev_b32_e32 v1, 2, v16
	v_lshlrev_b32_e32 v2, 2, v20
	v_lshlrev_b32_e32 v3, 2, v17
	v_lshlrev_b32_e32 v4, 2, v13
	v_lshlrev_b32_e32 v5, 2, v18
	ds_store_b32 v1, v44 offset:64
	ds_store_b32 v2, v43 offset:64
	ds_store_b32 v3, v46 offset:64
	ds_store_b32 v4, v45 offset:64
	ds_store_b32 v5, v48 offset:64
	v_lshlrev_b32_e32 v1, 2, v21
	v_lshlrev_b32_e32 v2, 2, v25
	v_and_b32_e32 v74, 0xffff, v74
	v_lshlrev_b32_e32 v3, 2, v22
	v_lshlrev_b32_e32 v4, 2, v19
	v_lshlrev_b32_e32 v5, 2, v23
	ds_store_b32 v1, v47 offset:64
	ds_store_b32 v2, v50 offset:64
	ds_store_b32 v3, v49 offset:64
	ds_store_b32 v4, v52 offset:64
	ds_store_b32 v5, v51 offset:64
	v_lshlrev_b32_e32 v1, 2, v26
	v_lshlrev_b32_e32 v2, 2, v30
	v_add_nc_u32_e32 v33, v33, v74
	v_lshlrev_b32_e32 v3, 2, v27
	v_lshlrev_b32_e32 v4, 2, v24
	v_lshlrev_b32_e32 v5, 2, v28
	ds_store_b32 v1, v54 offset:64
	ds_store_b32 v2, v53 offset:64
	ds_store_b32 v3, v56 offset:64
	ds_store_b32 v4, v55 offset:64
	ds_store_b32 v5, v58 offset:64
	v_lshlrev_b32_e32 v1, 2, v31
	v_lshlrev_b32_e32 v2, 2, v36
	v_lshlrev_b32_e32 v3, 2, v33
	v_lshlrev_b32_e32 v4, 2, v29
	v_lshlrev_b32_e32 v5, 2, v34
	ds_store_b32 v1, v57 offset:64
	ds_store_b32 v2, v60 offset:64
	ds_store_b32 v3, v59 offset:64
	ds_store_b32 v4, v62 offset:64
	ds_store_b32 v5, v61 offset:64
	v_lshlrev_b32_e32 v1, 2, v37
	v_lshlrev_b32_e32 v2, 2, v39
	v_lshlrev_b32_e32 v3, 2, v38
	v_lshlrev_b32_e32 v4, 2, v35
	v_lshlrev_b32_e32 v5, 2, v40
	ds_store_b32 v1, v64 offset:64
	ds_store_b32 v2, v63 offset:64
	ds_store_b32 v3, v66 offset:64
	ds_store_b32 v4, v65 offset:64
	ds_store_b32 v5, v67 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB43_86
; %bb.76:
	v_lshl_or_b32 v3, s15, 4, v0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v41, 0
	s_mov_b32 s37, 0
	s_mov_b32 s38, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v8
	v_add_co_u32 v1, s35, s86, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s35, s87, v2, s35
                                        ; implicit-def: $sgpr35
	global_store_b32 v[1:2], v3, off
.LBB43_77:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB43_80 Depth 2
	s_or_b32 s35, s35, exec_lo
	s_cmp_eq_u32 s38, 0
	s_cbranch_scc1 .LBB43_83
; %bb.78:                               ;   in Loop: Header=BB43_77 Depth=1
	s_add_i32 s38, s38, -1
	s_mov_b32 s39, exec_lo
	v_lshl_or_b32 v3, s38, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s35, s86, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s35, s87, v6, s35
	global_load_b32 v42, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v42
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB43_82
; %bb.79:                               ; %.lr.ph.i44.i.preheader
                                        ;   in Loop: Header=BB43_77 Depth=1
	s_mov_b32 s40, 0
.LBB43_80:                              ; %.lr.ph.i44.i
                                        ;   Parent Loop BB43_77 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v42, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s35, 0, v3
	s_or_b32 s40, s35, s40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s40
	s_cbranch_execnz .LBB43_80
; %bb.81:                               ; %Flow
                                        ;   in Loop: Header=BB43_77 Depth=1
	s_or_b32 exec_lo, exec_lo, s40
.LBB43_82:                              ; %Flow89
                                        ;   in Loop: Header=BB43_77 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s39
	v_and_b32_e32 v5, 0x3fffffff, v42
	v_cmp_eq_u32_e64 s35, 0x80000000, v3
	v_add_nc_u32_e32 v41, v5, v41
	s_branch .LBB43_84
.LBB43_83:                              ;   in Loop: Header=BB43_77 Depth=1
                                        ; implicit-def: $sgpr38
.LBB43_84:                              ; %Flow90
                                        ;   in Loop: Header=BB43_77 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s39, exec_lo, s35
	s_or_b32 s37, s39, s37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s37
	s_cbranch_execnz .LBB43_77
; %bb.85:
	s_or_b32 exec_lo, exec_lo, s37
	v_add_nc_u32_e32 v3, v41, v8
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v41, v7
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	ds_store_b32 v4, v1
.LBB43_86:                              ; %Flow91
	s_or_b32 exec_lo, exec_lo, s36
	v_cmp_gt_u32_e64 s35, s66, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s37, s35
	s_cbranch_execz .LBB43_88
; %bb.87:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v3, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s36, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s36, s71, v2, s36
	global_store_b32 v[1:2], v3, off
.LBB43_88:
	s_or_b32 exec_lo, exec_lo, s37
	v_or_b32_e32 v3, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s36, s66, v3
	s_and_saveexec_b32 s38, s36
	s_cbranch_execz .LBB43_90
; %bb.89:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v4, v1 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s37, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s37, s71, v2, s37
	global_store_b32 v[1:2], v4, off
.LBB43_90:
	s_or_b32 exec_lo, exec_lo, s38
	v_or_b32_e32 v4, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s37, s66, v4
	s_and_saveexec_b32 s39, s37
	s_cbranch_execz .LBB43_92
; %bb.91:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v5, v1 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s38, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s38, s71, v2, s38
	global_store_b32 v[1:2], v5, off
.LBB43_92:
	s_or_b32 exec_lo, exec_lo, s39
	v_or_b32_e32 v5, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s38, s66, v5
	s_and_saveexec_b32 s40, s38
	s_cbranch_execz .LBB43_94
; %bb.93:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v6, v1 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s39, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s39, s71, v2, s39
	global_store_b32 v[1:2], v6, off
.LBB43_94:
	s_or_b32 exec_lo, exec_lo, s40
	v_or_b32_e32 v6, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s39, s66, v6
	s_and_saveexec_b32 s41, s39
	s_cbranch_execz .LBB43_96
; %bb.95:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v41, v1 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s40, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s40, s71, v2, s40
	global_store_b32 v[1:2], v41, off
.LBB43_96:
	s_or_b32 exec_lo, exec_lo, s41
	v_or_b32_e32 v41, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s40, s66, v41
	s_and_saveexec_b32 s42, s40
	s_cbranch_execz .LBB43_98
; %bb.97:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v42, v1 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s41, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s41, s71, v2, s41
	global_store_b32 v[1:2], v42, off
.LBB43_98:
	s_or_b32 exec_lo, exec_lo, s42
	v_or_b32_e32 v42, 0xc00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s41, s66, v42
	s_and_saveexec_b32 s43, s41
	s_cbranch_execz .LBB43_100
; %bb.99:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v43, v1 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s42, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s42, s71, v2, s42
	global_store_b32 v[1:2], v43, off
.LBB43_100:
	s_or_b32 exec_lo, exec_lo, s43
	v_or_b32_e32 v43, 0xe00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s42, s66, v43
	s_and_saveexec_b32 s44, s42
	s_cbranch_execz .LBB43_102
; %bb.101:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v44, v1 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s43, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s43, s71, v2, s43
	global_store_b32 v[1:2], v44, off
.LBB43_102:
	s_or_b32 exec_lo, exec_lo, s44
	v_or_b32_e32 v44, 0x1000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s43, s66, v44
	s_and_saveexec_b32 s45, s43
	s_cbranch_execz .LBB43_104
; %bb.103:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v45, v1 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s44, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s44, s71, v2, s44
	global_store_b32 v[1:2], v45, off
.LBB43_104:
	s_or_b32 exec_lo, exec_lo, s45
	v_or_b32_e32 v45, 0x1200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s44, s66, v45
	s_and_saveexec_b32 s46, s44
	s_cbranch_execz .LBB43_106
; %bb.105:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v46, v1 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s45, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s45, s71, v2, s45
	global_store_b32 v[1:2], v46, off
.LBB43_106:
	s_or_b32 exec_lo, exec_lo, s46
	v_or_b32_e32 v46, 0x1400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s45, s66, v46
	s_and_saveexec_b32 s47, s45
	s_cbranch_execz .LBB43_108
; %bb.107:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v47, v1 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s46, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s46, s71, v2, s46
	global_store_b32 v[1:2], v47, off
.LBB43_108:
	s_or_b32 exec_lo, exec_lo, s47
	v_or_b32_e32 v47, 0x1600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s46, s66, v47
	s_and_saveexec_b32 s48, s46
	s_cbranch_execz .LBB43_110
; %bb.109:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v48, v1 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s47, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s47, s71, v2, s47
	global_store_b32 v[1:2], v48, off
.LBB43_110:
	s_or_b32 exec_lo, exec_lo, s48
	v_or_b32_e32 v48, 0x1800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s47, s66, v48
	s_and_saveexec_b32 s49, s47
	s_cbranch_execz .LBB43_112
; %bb.111:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v49, v1 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s48, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s48, s71, v2, s48
	global_store_b32 v[1:2], v49, off
.LBB43_112:
	s_or_b32 exec_lo, exec_lo, s49
	v_or_b32_e32 v49, 0x1a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s48, s66, v49
	s_and_saveexec_b32 s50, s48
	s_cbranch_execz .LBB43_114
; %bb.113:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v50, v1 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s49, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s49, s71, v2, s49
	global_store_b32 v[1:2], v50, off
.LBB43_114:
	s_or_b32 exec_lo, exec_lo, s50
	v_or_b32_e32 v50, 0x1c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s49, s66, v50
	s_and_saveexec_b32 s51, s49
	s_cbranch_execz .LBB43_116
; %bb.115:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v51, v1 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s50, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s50, s71, v2, s50
	global_store_b32 v[1:2], v51, off
.LBB43_116:
	s_or_b32 exec_lo, exec_lo, s51
	v_or_b32_e32 v51, 0x1e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s50, s66, v51
	s_and_saveexec_b32 s52, s50
	s_cbranch_execz .LBB43_118
; %bb.117:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v52, v1 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s51, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s51, s71, v2, s51
	global_store_b32 v[1:2], v52, off
.LBB43_118:
	s_or_b32 exec_lo, exec_lo, s52
	v_or_b32_e32 v52, 0x2000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s51, s66, v52
	s_and_saveexec_b32 s53, s51
	s_cbranch_execz .LBB43_120
; %bb.119:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v53, v1 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s52, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s52, s71, v2, s52
	global_store_b32 v[1:2], v53, off
.LBB43_120:
	s_or_b32 exec_lo, exec_lo, s53
	v_or_b32_e32 v53, 0x2200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s52, s66, v53
	s_and_saveexec_b32 s54, s52
	s_cbranch_execz .LBB43_122
; %bb.121:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v54, v1 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s53, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s53, s71, v2, s53
	global_store_b32 v[1:2], v54, off
.LBB43_122:
	s_or_b32 exec_lo, exec_lo, s54
	v_or_b32_e32 v54, 0x2400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s53, s66, v54
	s_and_saveexec_b32 s55, s53
	s_cbranch_execz .LBB43_124
; %bb.123:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v55, v1 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s54, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s54, s71, v2, s54
	global_store_b32 v[1:2], v55, off
.LBB43_124:
	s_or_b32 exec_lo, exec_lo, s55
	v_or_b32_e32 v55, 0x2600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s54, s66, v55
	s_and_saveexec_b32 s56, s54
	s_cbranch_execz .LBB43_126
; %bb.125:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v56, v1 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s55, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s55, s71, v2, s55
	global_store_b32 v[1:2], v56, off
.LBB43_126:
	s_or_b32 exec_lo, exec_lo, s56
	v_or_b32_e32 v56, 0x2800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s55, s66, v56
	s_and_saveexec_b32 s57, s55
	s_cbranch_execz .LBB43_128
; %bb.127:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v57, v1 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s56, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s56, s71, v2, s56
	global_store_b32 v[1:2], v57, off
.LBB43_128:
	s_or_b32 exec_lo, exec_lo, s57
	v_or_b32_e32 v57, 0x2a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s56, s66, v57
	s_and_saveexec_b32 s58, s56
	s_cbranch_execz .LBB43_130
; %bb.129:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v58, v1 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s57, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s57, s71, v2, s57
	global_store_b32 v[1:2], v58, off
.LBB43_130:
	s_or_b32 exec_lo, exec_lo, s58
	v_or_b32_e32 v58, 0x2c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s57, s66, v58
	s_and_saveexec_b32 s59, s57
	s_cbranch_execz .LBB43_132
; %bb.131:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v59, v1 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s58, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s58, s71, v2, s58
	global_store_b32 v[1:2], v59, off
.LBB43_132:
	s_or_b32 exec_lo, exec_lo, s59
	v_or_b32_e32 v59, 0x2e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s58, s66, v59
	s_and_saveexec_b32 s60, s58
	s_cbranch_execz .LBB43_134
; %bb.133:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v60, v1 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s59, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s59, s71, v2, s59
	global_store_b32 v[1:2], v60, off
.LBB43_134:
	s_or_b32 exec_lo, exec_lo, s60
	v_or_b32_e32 v60, 0x3000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s59, s66, v60
	s_and_saveexec_b32 s61, s59
	s_cbranch_execz .LBB43_136
; %bb.135:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v61, v1 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s60, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s60, s71, v2, s60
	global_store_b32 v[1:2], v61, off
.LBB43_136:
	s_or_b32 exec_lo, exec_lo, s61
	v_or_b32_e32 v61, 0x3200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s60, s66, v61
	s_and_saveexec_b32 s62, s60
	s_cbranch_execz .LBB43_138
; %bb.137:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v62, v1 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s61, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s61, s71, v2, s61
	global_store_b32 v[1:2], v62, off
.LBB43_138:
	s_or_b32 exec_lo, exec_lo, s62
	v_or_b32_e32 v62, 0x3400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s61, s66, v62
	s_and_saveexec_b32 s63, s61
	s_cbranch_execz .LBB43_140
; %bb.139:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v63, v1 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s62, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s62, s71, v2, s62
	global_store_b32 v[1:2], v63, off
.LBB43_140:
	s_or_b32 exec_lo, exec_lo, s63
	v_or_b32_e32 v63, 0x3600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s62, s66, v63
	s_and_saveexec_b32 s64, s62
	s_cbranch_execz .LBB43_142
; %bb.141:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v64, v1 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s63, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s63, s71, v2, s63
	global_store_b32 v[1:2], v64, off
.LBB43_142:
	s_or_b32 exec_lo, exec_lo, s64
	v_or_b32_e32 v64, 0x3800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s63, s66, v64
	s_and_saveexec_b32 s65, s63
	s_cbranch_execz .LBB43_144
; %bb.143:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v65, v1 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s64, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s64, s71, v2, s64
	global_store_b32 v[1:2], v65, off
.LBB43_144:
	s_or_b32 exec_lo, exec_lo, s65
	v_or_b32_e32 v65, 0x3a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s64, s66, v65
	s_and_saveexec_b32 s82, s64
	s_cbranch_execz .LBB43_146
; %bb.145:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v66, v1 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s65, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s65, s71, v2, s65
	global_store_b32 v[1:2], v66, off
.LBB43_146:
	s_or_b32 exec_lo, exec_lo, s82
	v_or_b32_e32 v66, 0x3c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s65, s66, v66
	s_and_saveexec_b32 s82, s65
	s_cbranch_execz .LBB43_148
; %bb.147:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v67, v1 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s66, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s66, s71, v2, s66
	global_store_b32 v[1:2], v67, off
.LBB43_148:
	s_or_b32 exec_lo, exec_lo, s82
	v_lshlrev_b32_e32 v1, 1, v32
	s_lshl_b64 s[82:83], s[84:85], 1
                                        ; implicit-def: $vgpr67
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s66, s72, s82
	s_addc_u32 s82, s73, s83
	v_add_co_u32 v1, s66, s66, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v2, null, s82, 0, s66
	s_and_saveexec_b32 s66, s2
	s_xor_b32 s2, exec_lo, s66
	s_cbranch_execz .LBB43_150
; %bb.149:
	global_load_u16 v67, v[1:2], off
.LBB43_150:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr69
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB43_152
; %bb.151:
	global_load_u16 v69, v[1:2], off offset:2
.LBB43_152:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr71
	s_and_saveexec_b32 s2, s4
	s_cbranch_execz .LBB43_154
; %bb.153:
	global_load_u16 v71, v[1:2], off offset:4
.LBB43_154:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr73
	s_and_saveexec_b32 s2, s5
	s_cbranch_execz .LBB43_156
; %bb.155:
	global_load_u16 v73, v[1:2], off offset:6
.LBB43_156:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr75
	s_and_saveexec_b32 s2, s6
	s_cbranch_execz .LBB43_158
; %bb.157:
	global_load_u16 v75, v[1:2], off offset:8
.LBB43_158:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr77
	s_and_saveexec_b32 s2, s7
	s_cbranch_execz .LBB43_160
; %bb.159:
	global_load_u16 v77, v[1:2], off offset:10
.LBB43_160:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr78
	s_and_saveexec_b32 s2, s8
	s_cbranch_execz .LBB43_162
; %bb.161:
	global_load_u16 v78, v[1:2], off offset:12
.LBB43_162:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr80
	s_and_saveexec_b32 s2, s9
	s_cbranch_execz .LBB43_164
; %bb.163:
	global_load_u16 v80, v[1:2], off offset:14
.LBB43_164:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr83
	s_and_saveexec_b32 s2, s10
	s_cbranch_execz .LBB43_166
; %bb.165:
	global_load_u16 v83, v[1:2], off offset:16
.LBB43_166:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr85
	s_and_saveexec_b32 s2, s11
	s_cbranch_execz .LBB43_168
; %bb.167:
	global_load_u16 v85, v[1:2], off offset:18
.LBB43_168:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr87
	s_and_saveexec_b32 s2, s12
	s_cbranch_execz .LBB43_170
; %bb.169:
	global_load_u16 v87, v[1:2], off offset:20
.LBB43_170:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr88
	s_and_saveexec_b32 s2, s13
	s_cbranch_execz .LBB43_172
; %bb.171:
	global_load_u16 v88, v[1:2], off offset:22
.LBB43_172:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr90
	s_and_saveexec_b32 s2, s14
	s_cbranch_execz .LBB43_174
; %bb.173:
	global_load_u16 v90, v[1:2], off offset:24
.LBB43_174:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr92
	s_and_saveexec_b32 s2, s16
	s_cbranch_execz .LBB43_176
; %bb.175:
	global_load_u16 v92, v[1:2], off offset:26
.LBB43_176:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr94
	s_and_saveexec_b32 s2, s17
	s_cbranch_execz .LBB43_178
; %bb.177:
	global_load_u16 v94, v[1:2], off offset:28
.LBB43_178:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr96
	s_and_saveexec_b32 s2, s18
	s_cbranch_execz .LBB43_180
; %bb.179:
	global_load_u16 v96, v[1:2], off offset:30
.LBB43_180:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr98
	s_and_saveexec_b32 s2, s19
	s_cbranch_execz .LBB43_182
; %bb.181:
	global_load_u16 v98, v[1:2], off offset:32
.LBB43_182:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr100
	s_and_saveexec_b32 s2, s20
	s_cbranch_execz .LBB43_184
; %bb.183:
	global_load_u16 v100, v[1:2], off offset:34
.LBB43_184:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr102
	s_and_saveexec_b32 s2, s21
	s_cbranch_execz .LBB43_186
; %bb.185:
	global_load_u16 v102, v[1:2], off offset:36
.LBB43_186:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr104
	s_and_saveexec_b32 s2, s22
	s_cbranch_execz .LBB43_188
; %bb.187:
	global_load_u16 v104, v[1:2], off offset:38
.LBB43_188:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr106
	s_and_saveexec_b32 s2, s23
	s_cbranch_execz .LBB43_190
; %bb.189:
	global_load_u16 v106, v[1:2], off offset:40
.LBB43_190:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr107
	s_and_saveexec_b32 s2, s24
	s_cbranch_execz .LBB43_192
; %bb.191:
	global_load_u16 v107, v[1:2], off offset:42
.LBB43_192:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr109
	s_and_saveexec_b32 s2, s25
	s_cbranch_execz .LBB43_194
; %bb.193:
	global_load_u16 v109, v[1:2], off offset:44
.LBB43_194:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr111
	s_and_saveexec_b32 s2, s26
	s_cbranch_execz .LBB43_196
; %bb.195:
	global_load_u16 v111, v[1:2], off offset:46
.LBB43_196:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr113
	s_and_saveexec_b32 s2, s27
	s_cbranch_execz .LBB43_198
; %bb.197:
	global_load_u16 v113, v[1:2], off offset:48
.LBB43_198:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr116
	s_and_saveexec_b32 s2, s28
	s_cbranch_execz .LBB43_200
; %bb.199:
	global_load_u16 v116, v[1:2], off offset:50
.LBB43_200:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr117
	s_and_saveexec_b32 s2, s29
	s_cbranch_execz .LBB43_202
; %bb.201:
	global_load_u16 v117, v[1:2], off offset:52
.LBB43_202:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr119
	s_and_saveexec_b32 s2, s30
	s_cbranch_execz .LBB43_204
; %bb.203:
	global_load_u16 v119, v[1:2], off offset:54
.LBB43_204:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr121
	s_and_saveexec_b32 s2, s31
	s_cbranch_execz .LBB43_206
; %bb.205:
	global_load_u16 v121, v[1:2], off offset:56
.LBB43_206:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr123
	s_and_saveexec_b32 s2, s33
	s_cbranch_execz .LBB43_208
; %bb.207:
	global_load_u16 v123, v[1:2], off offset:58
.LBB43_208:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr125
	s_and_saveexec_b32 s2, s34
	s_cbranch_execz .LBB43_210
; %bb.209:
	global_load_u16 v125, v[1:2], off offset:60
.LBB43_210:                             ; %_ZN7rocprim25block_load_direct_blockedIPttLj31EEEvjT_RAT1__T0_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr126
	s_and_saveexec_b32 s2, s35
	s_cbranch_execz .LBB43_212
; %bb.211:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v126, s67, v1
.LBB43_212:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr124
	s_and_saveexec_b32 s2, s36
	s_cbranch_execz .LBB43_214
; %bb.213:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v124, s67, v1
.LBB43_214:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr122
	s_and_saveexec_b32 s2, s37
	s_cbranch_execz .LBB43_216
; %bb.215:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v122, s67, v1
.LBB43_216:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr120
	s_and_saveexec_b32 s2, s38
	s_cbranch_execz .LBB43_218
; %bb.217:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v120, s67, v1
.LBB43_218:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr118
	s_and_saveexec_b32 s2, s39
	s_cbranch_execz .LBB43_220
; %bb.219:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v118, s67, v1
.LBB43_220:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr115
	s_and_saveexec_b32 s2, s40
	s_cbranch_execz .LBB43_222
; %bb.221:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v115, s67, v1
.LBB43_222:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr114
	s_and_saveexec_b32 s2, s41
	s_cbranch_execz .LBB43_224
; %bb.223:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v114, s67, v1
.LBB43_224:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr112
	s_and_saveexec_b32 s2, s42
	s_cbranch_execz .LBB43_226
; %bb.225:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v112, s67, v1
.LBB43_226:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr110
	s_and_saveexec_b32 s2, s43
	s_cbranch_execz .LBB43_228
; %bb.227:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v110, s67, v1
.LBB43_228:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr108
	s_and_saveexec_b32 s2, s44
	s_cbranch_execz .LBB43_230
; %bb.229:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v108, s67, v1
.LBB43_230:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr105
	s_and_saveexec_b32 s2, s45
	s_cbranch_execz .LBB43_232
; %bb.231:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v105, s67, v1
.LBB43_232:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr103
	s_and_saveexec_b32 s2, s46
	s_cbranch_execz .LBB43_234
; %bb.233:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v103, s67, v1
.LBB43_234:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr101
	s_and_saveexec_b32 s2, s47
	s_cbranch_execz .LBB43_236
; %bb.235:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v101, s67, v1
.LBB43_236:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr99
	s_and_saveexec_b32 s2, s48
	s_cbranch_execz .LBB43_238
; %bb.237:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v99, s67, v1
.LBB43_238:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr97
	s_and_saveexec_b32 s2, s49
	s_cbranch_execz .LBB43_240
; %bb.239:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v97, s67, v1
.LBB43_240:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr95
	s_and_saveexec_b32 s2, s50
	s_cbranch_execz .LBB43_242
; %bb.241:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v95, s67, v1
.LBB43_242:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr93
	s_and_saveexec_b32 s2, s51
	s_cbranch_execz .LBB43_244
; %bb.243:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v93, s67, v1
.LBB43_244:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr91
	s_and_saveexec_b32 s2, s52
	s_cbranch_execz .LBB43_246
; %bb.245:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v91, s67, v1
.LBB43_246:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr89
	s_and_saveexec_b32 s2, s53
	s_cbranch_execz .LBB43_248
; %bb.247:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v89, s67, v1
.LBB43_248:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr86
	s_and_saveexec_b32 s2, s54
	s_cbranch_execz .LBB43_250
; %bb.249:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v86, s67, v1
.LBB43_250:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr84
	s_and_saveexec_b32 s2, s55
	s_cbranch_execz .LBB43_252
; %bb.251:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v84, s67, v1
.LBB43_252:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr82
	s_and_saveexec_b32 s2, s56
	s_cbranch_execz .LBB43_254
; %bb.253:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v82, s67, v1
.LBB43_254:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr81
	s_and_saveexec_b32 s2, s57
	s_cbranch_execz .LBB43_256
; %bb.255:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v81, s67, v1
.LBB43_256:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr79
	s_and_saveexec_b32 s2, s58
	s_cbranch_execz .LBB43_258
; %bb.257:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v79, s67, v1
.LBB43_258:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr76
	s_and_saveexec_b32 s2, s59
	s_cbranch_execz .LBB43_260
; %bb.259:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v76, s67, v1
.LBB43_260:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr74
	s_and_saveexec_b32 s2, s60
	s_cbranch_execz .LBB43_262
; %bb.261:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v74, s67, v1
.LBB43_262:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr72
	s_and_saveexec_b32 s2, s61
	s_cbranch_execz .LBB43_264
; %bb.263:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v72, s67, v1
.LBB43_264:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr70
	s_and_saveexec_b32 s2, s62
	s_cbranch_execz .LBB43_266
; %bb.265:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v70, s67, v1
.LBB43_266:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr68
	s_and_saveexec_b32 s2, s63
	s_cbranch_execz .LBB43_268
; %bb.267:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v68, s67, v1
.LBB43_268:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr2
	s_and_saveexec_b32 s2, s64
	s_cbranch_execz .LBB43_270
; %bb.269:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v2, s67, v1
.LBB43_270:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s2, s65
	s_cbranch_execz .LBB43_272
; %bb.271:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
.LBB43_272:
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b32_e32 v9, 1, v9
	v_lshlrev_b32_e32 v14, 1, v14
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b16 v9, v67 offset:64
	v_lshlrev_b32_e32 v9, 1, v15
	v_lshlrev_b32_e32 v11, 1, v11
	v_lshlrev_b32_e32 v10, 1, v10
	v_lshlrev_b32_e32 v12, 1, v12
	ds_store_b16 v14, v69 offset:64
	ds_store_b16 v9, v71 offset:64
	ds_store_b16 v11, v73 offset:64
	ds_store_b16 v10, v75 offset:64
	ds_store_b16 v12, v77 offset:64
	v_lshlrev_b32_e32 v9, 1, v16
	v_lshlrev_b32_e32 v10, 1, v20
	v_lshlrev_b32_e32 v11, 1, v17
	v_lshlrev_b32_e32 v12, 1, v13
	v_lshlrev_b32_e32 v13, 1, v18
	ds_store_b16 v9, v78 offset:64
	ds_store_b16 v10, v80 offset:64
	ds_store_b16 v11, v83 offset:64
	ds_store_b16 v12, v85 offset:64
	ds_store_b16 v13, v87 offset:64
	v_lshlrev_b32_e32 v9, 1, v21
	v_lshlrev_b32_e32 v10, 1, v25
	v_lshlrev_b32_e32 v11, 1, v22
	v_lshlrev_b32_e32 v12, 1, v19
	v_lshlrev_b32_e32 v13, 1, v23
	ds_store_b16 v9, v88 offset:64
	ds_store_b16 v10, v90 offset:64
	ds_store_b16 v11, v92 offset:64
	ds_store_b16 v12, v94 offset:64
	ds_store_b16 v13, v96 offset:64
	v_lshlrev_b32_e32 v9, 1, v26
	v_lshlrev_b32_e32 v10, 1, v30
	v_lshlrev_b32_e32 v11, 1, v27
	v_lshlrev_b32_e32 v12, 1, v24
	v_lshlrev_b32_e32 v13, 1, v28
	ds_store_b16 v9, v98 offset:64
	ds_store_b16 v10, v100 offset:64
	ds_store_b16 v11, v102 offset:64
	ds_store_b16 v12, v104 offset:64
	ds_store_b16 v13, v106 offset:64
	v_lshlrev_b32_e32 v9, 1, v31
	v_lshlrev_b32_e32 v10, 1, v36
	v_lshlrev_b32_e32 v11, 1, v33
	v_lshlrev_b32_e32 v12, 1, v29
	v_lshlrev_b32_e32 v13, 1, v34
	ds_store_b16 v9, v107 offset:64
	ds_store_b16 v10, v109 offset:64
	ds_store_b16 v11, v111 offset:64
	ds_store_b16 v12, v113 offset:64
	ds_store_b16 v13, v116 offset:64
	v_lshlrev_b32_e32 v9, 1, v37
	v_lshlrev_b32_e32 v10, 1, v39
	v_lshlrev_b32_e32 v11, 1, v38
	v_lshlrev_b32_e32 v12, 1, v35
	v_lshlrev_b32_e32 v13, 1, v40
	ds_store_b16 v9, v117 offset:64
	ds_store_b16 v10, v119 offset:64
	ds_store_b16 v11, v121 offset:64
	ds_store_b16 v12, v123 offset:64
	ds_store_b16 v13, v125 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s35
	s_cbranch_execz .LBB43_274
; %bb.273:
	v_lshlrev_b32_e32 v9, 2, v126
	v_lshlrev_b32_e32 v10, 1, v0
	ds_load_b32 v9, v9
	ds_load_u16 v11, v10 offset:64
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v9, v9, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 1, v[9:10]
	v_add_co_u32 v9, s2, s74, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s75, v10, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[9:10], v11, off
.LBB43_274:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s36
	s_cbranch_execz .LBB43_276
; %bb.275:
	v_lshlrev_b32_e32 v9, 2, v124
	v_lshlrev_b32_e32 v10, 1, v0
	ds_load_b32 v9, v9
	ds_load_u16 v11, v10 offset:1088
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v9, v9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 1, v[9:10]
	v_add_co_u32 v9, s2, s74, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s75, v10, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[9:10], v11, off
.LBB43_276:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s37
	s_cbranch_execz .LBB43_278
; %bb.277:
	v_dual_mov_b32 v10, 0 :: v_dual_lshlrev_b32 v3, 2, v122
	v_lshlrev_b32_e32 v9, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v11, v9 offset:2112
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v9, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[9:10]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v11, off
.LBB43_278:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s38
	s_cbranch_execz .LBB43_280
; %bb.279:
	v_lshlrev_b32_e32 v3, 2, v120
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v9, v4 offset:3136
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v9, off
.LBB43_280:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s39
	s_cbranch_execz .LBB43_282
; %bb.281:
	v_lshlrev_b32_e32 v3, 2, v118
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:4160
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_282:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s40
	s_cbranch_execz .LBB43_284
; %bb.283:
	v_lshlrev_b32_e32 v3, 2, v115
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:5184
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_284:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s41
	s_cbranch_execz .LBB43_286
; %bb.285:
	v_lshlrev_b32_e32 v3, 2, v114
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:6208
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_286:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s42
	s_cbranch_execz .LBB43_288
; %bb.287:
	v_lshlrev_b32_e32 v3, 2, v112
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:7232
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_288:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s43
	s_cbranch_execz .LBB43_290
; %bb.289:
	v_lshlrev_b32_e32 v3, 2, v110
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:8256
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_290:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s44
	s_cbranch_execz .LBB43_292
; %bb.291:
	v_lshlrev_b32_e32 v3, 2, v108
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:9280
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_292:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s45
	s_cbranch_execz .LBB43_294
; %bb.293:
	v_lshlrev_b32_e32 v3, 2, v105
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:10304
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_294:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s46
	s_cbranch_execz .LBB43_296
; %bb.295:
	v_lshlrev_b32_e32 v3, 2, v103
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:11328
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_296:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s47
	s_cbranch_execz .LBB43_298
; %bb.297:
	v_lshlrev_b32_e32 v3, 2, v101
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:12352
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_298:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s48
	s_cbranch_execz .LBB43_300
; %bb.299:
	v_lshlrev_b32_e32 v3, 2, v99
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:13376
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_300:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s49
	s_cbranch_execz .LBB43_302
; %bb.301:
	v_lshlrev_b32_e32 v3, 2, v97
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:14400
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_302:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s50
	s_cbranch_execz .LBB43_304
; %bb.303:
	v_lshlrev_b32_e32 v3, 2, v95
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:15424
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_304:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s51
	s_cbranch_execz .LBB43_306
; %bb.305:
	v_lshlrev_b32_e32 v3, 2, v93
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:16448
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_306:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s52
	s_cbranch_execz .LBB43_308
; %bb.307:
	v_lshlrev_b32_e32 v3, 2, v91
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:17472
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_308:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s53
	s_cbranch_execz .LBB43_310
; %bb.309:
	v_lshlrev_b32_e32 v3, 2, v89
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:18496
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_310:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s54
	s_cbranch_execz .LBB43_312
; %bb.311:
	v_lshlrev_b32_e32 v3, 2, v86
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:19520
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_312:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s55
	s_cbranch_execz .LBB43_314
; %bb.313:
	v_lshlrev_b32_e32 v3, 2, v84
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:20544
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_314:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s56
	s_cbranch_execz .LBB43_316
; %bb.315:
	v_lshlrev_b32_e32 v3, 2, v82
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:21568
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_316:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s57
	s_cbranch_execz .LBB43_318
; %bb.317:
	v_lshlrev_b32_e32 v3, 2, v81
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:22592
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_318:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s58
	s_cbranch_execz .LBB43_320
; %bb.319:
	v_lshlrev_b32_e32 v3, 2, v79
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:23616
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_320:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s59
	s_cbranch_execz .LBB43_322
; %bb.321:
	v_lshlrev_b32_e32 v3, 2, v76
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:24640
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_322:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s60
	s_cbranch_execz .LBB43_324
; %bb.323:
	v_lshlrev_b32_e32 v3, 2, v74
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:25664
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_324:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s61
	s_cbranch_execz .LBB43_326
; %bb.325:
	v_lshlrev_b32_e32 v3, 2, v72
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:26688
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_326:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s62
	s_cbranch_execz .LBB43_328
; %bb.327:
	v_lshlrev_b32_e32 v3, 2, v70
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:27712
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_328:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s63
	s_cbranch_execz .LBB43_330
; %bb.329:
	v_lshlrev_b32_e32 v3, 2, v68
	v_lshlrev_b32_e32 v4, 1, v0
	ds_load_b32 v3, v3
	ds_load_u16 v5, v4 offset:28736
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 1, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[3:4], v5, off
.LBB43_330:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s64
	s_cbranch_execz .LBB43_332
; %bb.331:
	v_lshlrev_b32_e32 v2, 2, v2
	v_lshlrev_b32_e32 v3, 1, v0
	ds_load_b32 v2, v2
	ds_load_u16 v4, v3 offset:29760
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v2, v2, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 1, v[2:3]
	v_add_co_u32 v2, s2, s74, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s2, s75, v3, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[2:3], v4, off
.LBB43_332:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s65
	s_cbranch_execz .LBB43_334
; %bb.333:
	v_lshlrev_b32_e32 v1, 2, v1
	v_lshlrev_b32_e32 v2, 1, v0
	ds_load_b32 v1, v1
	ds_load_u16 v3, v2 offset:30784
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, v1, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 1, v[1:2]
	v_add_co_u32 v1, s2, s74, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s2, s75, v2, s2
	s_waitcnt lgkmcnt(0)
	global_store_b16 v[1:2], v3, off
.LBB43_334:
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b32 s2, s[0:1], 0x50
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s2
	s_mov_b32 s2, 0
	s_cselect_b32 s3, -1, 0
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s3
	s_xor_b32 s3, exec_lo, s4
; %bb.335:
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v7, v8
	s_mov_b32 s7, exec_lo
; %bb.336:                              ; %Flow103
	s_or_b32 exec_lo, exec_lo, s3
	s_branch .LBB43_338
.LBB43_337:
	s_mov_b32 s2, -1
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
.LBB43_338:                             ; %Flow102
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB43_367
; %bb.339:
	s_mov_b32 s85, 0
	v_lshlrev_b32_e32 v21, 2, v32
	s_lshl_b64 s[2:3], s[84:85], 2
	v_mov_b32_e32 v33, 0
	s_add_u32 s2, s68, s2
	s_addc_u32 s3, s69, s3
	v_or_b32_e32 v34, 0xfffffe00, v0
	s_clause 0x7
	global_load_b128 v[1:4], v21, s[2:3] offset:48
	global_load_b128 v[9:12], v21, s[2:3] offset:32
	global_load_b128 v[17:20], v21, s[2:3] offset:16
	global_load_b128 v[25:28], v21, s[2:3]
	global_load_b96 v[29:31], v21, s[2:3] offset:112
	global_load_b128 v[5:8], v21, s[2:3] offset:96
	global_load_b128 v[13:16], v21, s[2:3] offset:80
	global_load_b128 v[21:24], v21, s[2:3] offset:64
	v_lshlrev_b32_e32 v35, 2, v0
	s_mov_b32 s2, s85
.LBB43_340:                             ; %.lr.ph.i.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v34, 0x200, v34
	ds_store_b32 v35, v33
	v_add_nc_u32_e32 v35, 0x800, v35
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v34
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB43_340
; %bb.341:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(4)
	v_lshrrev_b32_e32 v33, s80, v25
	s_lshl_b32 s2, -1, s81
	v_lshrrev_b32_e32 v38, s80, v27
	s_not_b32 s8, s2
	s_mov_b32 s2, exec_lo
	v_and_b32_e32 v33, s8, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v34, 9, v33
	v_lshrrev_b32_e32 v33, 3, v33
	v_and_or_b32 v34, 0xe00, v34, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v34, 1, v34
	v_add_lshl_u32 v33, v34, v33, 1
	v_lshrrev_b32_e32 v34, s80, v26
	ds_load_u16 v35, v33
	v_and_b32_e32 v34, s8, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 9, v34
	v_lshrrev_b32_e32 v34, 3, v34
	v_and_or_b32 v36, 0xe00, v36, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 1, v36
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v37, v35, 1
	v_add_lshl_u32 v34, v36, v34, 1
	ds_store_b16 v33, v37
	ds_load_u16 v36, v34
	v_and_b32_e32 v37, s8, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 9, v37
	v_lshrrev_b32_e32 v37, 3, v37
	v_and_or_b32 v38, 0xe00, v38, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 1, v38
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v39, v36, 1
	v_add_lshl_u32 v43, v38, v37, 1
	v_lshrrev_b32_e32 v38, s80, v28
	ds_store_b16 v34, v39
	ds_load_u16 v37, v43
	v_and_b32_e32 v38, s8, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 9, v38
	v_lshrrev_b32_e32 v38, 3, v38
	v_and_or_b32 v39, 0xe00, v39, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 1, v39
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v40, v37, 1
	v_add_lshl_u32 v45, v39, v38, 1
	v_lshrrev_b32_e32 v39, s80, v17
	ds_store_b16 v43, v40
	ds_load_u16 v38, v45
	v_and_b32_e32 v39, s8, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 9, v39
	v_lshrrev_b32_e32 v39, 3, v39
	v_and_or_b32 v40, 0xe00, v40, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 1, v40
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v41, v38, 1
	v_add_lshl_u32 v47, v40, v39, 1
	v_lshrrev_b32_e32 v40, s80, v18
	ds_store_b16 v45, v41
	ds_load_u16 v39, v47
	v_and_b32_e32 v40, s8, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 9, v40
	v_lshrrev_b32_e32 v40, 3, v40
	v_and_or_b32 v41, 0xe00, v41, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 1, v41
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v42, v39, 1
	v_add_lshl_u32 v49, v41, v40, 1
	v_lshrrev_b32_e32 v41, s80, v19
	ds_store_b16 v47, v42
	ds_load_u16 v40, v49
	v_and_b32_e32 v41, s8, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 9, v41
	v_lshrrev_b32_e32 v41, 3, v41
	v_and_or_b32 v42, 0xe00, v42, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 1, v42
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v44, v40, 1
	v_add_lshl_u32 v51, v42, v41, 1
	v_lshrrev_b32_e32 v42, s80, v20
	ds_store_b16 v49, v44
	ds_load_u16 v41, v51
	v_and_b32_e32 v42, s8, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 9, v42
	v_lshrrev_b32_e32 v42, 3, v42
	v_and_or_b32 v44, 0xe00, v44, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 1, v44
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v46, v41, 1
	v_add_lshl_u32 v53, v44, v42, 1
	v_lshrrev_b32_e32 v44, s80, v9
	ds_store_b16 v51, v46
	ds_load_u16 v42, v53
	v_and_b32_e32 v44, s8, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 9, v44
	v_lshrrev_b32_e32 v44, 3, v44
	v_and_or_b32 v46, 0xe00, v46, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 1, v46
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v48, v42, 1
	v_add_lshl_u32 v55, v46, v44, 1
	v_lshrrev_b32_e32 v46, s80, v10
	ds_store_b16 v53, v48
	ds_load_u16 v44, v55
	v_and_b32_e32 v46, s8, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 9, v46
	v_lshrrev_b32_e32 v46, 3, v46
	v_and_or_b32 v48, 0xe00, v48, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 1, v48
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v50, v44, 1
	v_add_lshl_u32 v57, v48, v46, 1
	v_lshrrev_b32_e32 v48, s80, v11
	ds_store_b16 v55, v50
	ds_load_u16 v46, v57
	v_and_b32_e32 v48, s8, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 9, v48
	v_lshrrev_b32_e32 v48, 3, v48
	v_and_or_b32 v50, 0xe00, v50, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 1, v50
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v52, v46, 1
	v_add_lshl_u32 v59, v50, v48, 1
	v_lshrrev_b32_e32 v50, s80, v12
	ds_store_b16 v57, v52
	ds_load_u16 v48, v59
	v_and_b32_e32 v50, s8, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 9, v50
	v_lshrrev_b32_e32 v50, 3, v50
	v_and_or_b32 v52, 0xe00, v52, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 1, v52
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v54, v48, 1
	v_add_lshl_u32 v61, v52, v50, 1
	v_lshrrev_b32_e32 v52, s80, v1
	ds_store_b16 v59, v54
	ds_load_u16 v50, v61
	v_and_b32_e32 v52, s8, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 9, v52
	v_lshrrev_b32_e32 v52, 3, v52
	v_and_or_b32 v54, 0xe00, v54, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 1, v54
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v56, v50, 1
	v_add_lshl_u32 v63, v54, v52, 1
	v_lshrrev_b32_e32 v54, s80, v2
	ds_store_b16 v61, v56
	ds_load_u16 v52, v63
	v_and_b32_e32 v54, s8, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 9, v54
	v_lshrrev_b32_e32 v54, 3, v54
	v_and_or_b32 v56, 0xe00, v56, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 1, v56
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v58, v52, 1
	v_add_lshl_u32 v65, v56, v54, 1
	v_lshrrev_b32_e32 v56, s80, v3
	ds_store_b16 v63, v58
	ds_load_u16 v54, v65
	v_and_b32_e32 v56, s8, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 9, v56
	v_lshrrev_b32_e32 v56, 3, v56
	v_and_or_b32 v58, 0xe00, v58, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 1, v58
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v60, v54, 1
	v_add_lshl_u32 v67, v58, v56, 1
	v_lshrrev_b32_e32 v58, s80, v4
	ds_store_b16 v65, v60
	ds_load_u16 v56, v67
	v_and_b32_e32 v58, s8, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 9, v58
	v_lshrrev_b32_e32 v58, 3, v58
	v_and_or_b32 v60, 0xe00, v60, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 1, v60
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v62, v56, 1
	v_add_lshl_u32 v69, v60, v58, 1
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v60, s80, v21
	ds_store_b16 v67, v62
	ds_load_u16 v58, v69
	v_and_b32_e32 v60, s8, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 9, v60
	v_lshrrev_b32_e32 v60, 3, v60
	v_and_or_b32 v62, 0xe00, v62, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 1, v62
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v64, v58, 1
	v_add_lshl_u32 v71, v62, v60, 1
	v_lshrrev_b32_e32 v62, s80, v22
	ds_store_b16 v69, v64
	ds_load_u16 v60, v71
	v_and_b32_e32 v62, s8, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 9, v62
	v_lshrrev_b32_e32 v62, 3, v62
	v_and_or_b32 v64, 0xe00, v64, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 1, v64
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v66, v60, 1
	v_add_lshl_u32 v73, v64, v62, 1
	v_lshrrev_b32_e32 v64, s80, v23
	ds_store_b16 v71, v66
	ds_load_u16 v62, v73
	v_and_b32_e32 v64, s8, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 9, v64
	v_lshrrev_b32_e32 v64, 3, v64
	v_and_or_b32 v66, 0xe00, v66, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 1, v66
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v68, v62, 1
	v_add_lshl_u32 v75, v66, v64, 1
	v_lshrrev_b32_e32 v66, s80, v24
	ds_store_b16 v73, v68
	ds_load_u16 v64, v75
	v_and_b32_e32 v66, s8, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 9, v66
	v_lshrrev_b32_e32 v66, 3, v66
	v_and_or_b32 v68, 0xe00, v68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 1, v68
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v70, v64, 1
	v_add_lshl_u32 v77, v68, v66, 1
	v_lshrrev_b32_e32 v68, s80, v13
	ds_store_b16 v75, v70
	ds_load_u16 v66, v77
	v_and_b32_e32 v68, s8, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 9, v68
	v_lshrrev_b32_e32 v68, 3, v68
	v_and_or_b32 v70, 0xe00, v70, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 1, v70
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v72, v66, 1
	v_add_lshl_u32 v79, v70, v68, 1
	v_lshrrev_b32_e32 v70, s80, v14
	ds_store_b16 v77, v72
	ds_load_u16 v68, v79
	v_and_b32_e32 v70, s8, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 9, v70
	v_lshrrev_b32_e32 v70, 3, v70
	v_and_or_b32 v72, 0xe00, v72, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 1, v72
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v74, v68, 1
	v_add_lshl_u32 v81, v72, v70, 1
	v_lshrrev_b32_e32 v72, s80, v15
	ds_store_b16 v79, v74
	ds_load_u16 v70, v81
	v_and_b32_e32 v72, s8, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 9, v72
	v_lshrrev_b32_e32 v72, 3, v72
	v_and_or_b32 v74, 0xe00, v74, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 1, v74
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v76, v70, 1
	v_add_lshl_u32 v83, v74, v72, 1
	v_lshrrev_b32_e32 v74, s80, v16
	ds_store_b16 v81, v76
	ds_load_u16 v72, v83
	v_and_b32_e32 v74, s8, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 9, v74
	v_lshrrev_b32_e32 v74, 3, v74
	v_and_or_b32 v76, 0xe00, v76, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 1, v76
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v78, v72, 1
	v_add_lshl_u32 v85, v76, v74, 1
	v_lshrrev_b32_e32 v76, s80, v5
	ds_store_b16 v83, v78
	ds_load_u16 v74, v85
	v_and_b32_e32 v76, s8, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 9, v76
	v_lshrrev_b32_e32 v76, 3, v76
	v_and_or_b32 v78, 0xe00, v78, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 1, v78
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v80, v74, 1
	v_add_lshl_u32 v87, v78, v76, 1
	v_lshrrev_b32_e32 v78, s80, v6
	ds_store_b16 v85, v80
	ds_load_u16 v76, v87
	v_and_b32_e32 v78, s8, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 9, v78
	v_lshrrev_b32_e32 v78, 3, v78
	v_and_or_b32 v80, 0xe00, v80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 1, v80
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v82, v76, 1
	v_add_lshl_u32 v89, v80, v78, 1
	v_lshrrev_b32_e32 v80, s80, v7
	ds_store_b16 v87, v82
	ds_load_u16 v78, v89
	v_and_b32_e32 v80, s8, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 9, v80
	v_lshrrev_b32_e32 v80, 3, v80
	v_and_or_b32 v82, 0xe00, v82, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 1, v82
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v84, v78, 1
	v_add_lshl_u32 v90, v82, v80, 1
	v_lshrrev_b32_e32 v82, s80, v8
	ds_store_b16 v89, v84
	ds_load_u16 v80, v90
	v_and_b32_e32 v82, s8, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 9, v82
	v_lshrrev_b32_e32 v82, 3, v82
	v_and_or_b32 v84, 0xe00, v84, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 1, v84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v86, v80, 1
	v_add_lshl_u32 v91, v84, v82, 1
	v_lshrrev_b32_e32 v84, s80, v29
	ds_store_b16 v90, v86
	ds_load_u16 v82, v91
	v_and_b32_e32 v84, s8, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 9, v84
	v_lshrrev_b32_e32 v84, 3, v84
	v_and_or_b32 v86, 0xe00, v86, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 1, v86
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v88, v82, 1
	v_add_lshl_u32 v92, v86, v84, 1
	v_lshrrev_b32_e32 v86, s80, v30
	ds_store_b16 v91, v88
	ds_load_u16 v84, v92
	v_and_b32_e32 v86, s8, v86
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 9, v86
	v_lshrrev_b32_e32 v86, 3, v86
	v_and_or_b32 v88, 0xe00, v88, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 1, v88
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v94, v84, 1
	v_add_lshl_u32 v93, v88, v86, 1
	v_lshrrev_b32_e32 v88, s80, v31
	ds_store_b16 v92, v94
	ds_load_u16 v86, v93
	v_and_b32_e32 v88, s8, v88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 9, v88
	v_lshrrev_b32_e32 v88, 3, v88
	v_and_or_b32 v94, 0xe00, v94, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 1, v94
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v86, 1
	v_add_lshl_u32 v94, v94, v88, 1
	ds_store_b16 v93, v95
	ds_load_u16 v88, v94
	v_lshlrev_b32_e32 v95, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v88, 1
	ds_store_b16 v94, v96
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[96:99], v95 offset1:1
	ds_load_2addr_b64 v[100:103], v95 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v96, v97, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v96, v96, v98, v99
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v97, v96, v100, v101
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_or_b32_e32 v100, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v97, v97, v102, v103
	v_and_b32_e32 v98, 15, v96
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v99, v97 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s3, 0, v98
	v_cmp_lt_u32_e64 s4, 1, v98
	v_cmp_lt_u32_e64 s5, 3, v98
	v_cmp_lt_u32_e64 s6, 7, v98
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, v99, 0, s3
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v99, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v97, v97, v99
	v_mov_b32_dpp v99, v97 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, 0, v99, s5
	v_add_nc_u32_e32 v97, v97, v99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v98, 0, v99, s6
	v_bfe_i32 v99, v96, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v97, v97, v98
	ds_swizzle_b32 v98, v97 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v98, v99, v98
	v_lshrrev_b32_e32 v99, 5, v0
	v_add_nc_u32_e32 v97, v97, v98
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v99
	v_cmpx_eq_u32_e64 v100, v0
	s_cbranch_execz .LBB43_343
; %bb.342:
	ds_store_b32 v98, v97 offset:16384
.LBB43_343:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_lt_u32_e64 s2, 15, v0
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s9, vcc_lo
	s_cbranch_execz .LBB43_345
; %bb.344:
	v_mad_i32_i24 v99, 0xffffffe4, v0, v95
	ds_load_b32 v100, v99 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v101, v100 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, v101, 0, s3
	v_add_nc_u32_e32 v100, v101, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	v_mov_b32_dpp v101, v100 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, 0, v101, s5
	v_add_nc_u32_e32 v100, v100, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	ds_store_b32 v99, v100 offset:16384
.LBB43_345:                             ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s9
	v_dual_mov_b32 v100, 0 :: v_dual_mov_b32 v99, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB43_347
; %bb.346:
	ds_load_b32 v99, v98 offset:16380
.LBB43_347:                             ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjtjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EPjN6thrust10device_ptrIjEEPtNSB_ItEEEEvT0_T1_T2_T3_S9_S9_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESG_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v98, -1, v96
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s3, 0, v98
	v_cndmask_b32_e64 v98, v98, v96, s3
	v_cmp_eq_u32_e64 s3, 0, v96
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v98
	ds_bpermute_b32 v97, v98, v97
	ds_load_b32 v98, v100 offset:16444
	ds_load_2addr_b64 v[100:103], v95 offset1:1
	ds_load_b32 v104, v95 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v96, v97, v99, s3
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v96, v98, 16, v96
	ds_load_b64 v[98:99], v95 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v97, v96, v100
	v_add_nc_u32_e32 v100, v101, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v102, v100
	v_add_nc_u32_e32 v102, v103, v101
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v103, v98, v102
	v_add_nc_u32_e32 v98, v99, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v99, v104, v98
	ds_store_2addr_b64 v95, v[96:97], v[100:101] offset1:1
	ds_store_2addr_b64 v95, v[102:103], v[98:99] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v108, v33
	ds_load_u16 v107, v34
	ds_load_u16 v106, v43
	ds_load_u16 v105, v45
	ds_load_u16 v104, v47
	ds_load_u16 v103, v49
	ds_load_u16 v102, v51
	ds_load_u16 v101, v53
	ds_load_u16 v100, v55
	ds_load_u16 v45, v57
	ds_load_u16 v43, v59
	ds_load_u16 v99, v61
	ds_load_u16 v98, v63
	ds_load_u16 v97, v65
	ds_load_u16 v47, v67
	ds_load_u16 v96, v69
	ds_load_u16 v49, v71
	ds_load_u16 v95, v73
	ds_load_u16 v55, v75
	ds_load_u16 v53, v77
	ds_load_u16 v51, v79
	ds_load_u16 v75, v81
	ds_load_u16 v73, v83
	ds_load_u16 v71, v85
	ds_load_u16 v57, v87
	ds_load_u16 v69, v89
	ds_load_u16 v59, v90
	ds_load_u16 v67, v91
	ds_load_u16 v65, v92
	ds_load_u16 v63, v93
	ds_load_u16 v61, v94
                                        ; implicit-def: $vgpr33
                                        ; implicit-def: $vgpr34
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB43_351
; %bb.348:
	v_lshrrev_b32_e32 v33, 3, v0
	v_lshlrev_b32_e32 v34, 10, v0
	v_add_nc_u32_e32 v77, 1, v0
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v33, 0x1c00, v34, v33
	v_dual_mov_b32 v34, 0x3e00 :: v_dual_lshlrev_b32 v33, 1, v33
	ds_load_u16 v33, v33
	v_cmpx_ne_u32_e32 16, v77
	s_cbranch_execz .LBB43_350
; %bb.349:
	v_lshlrev_b32_e32 v34, 10, v77
	v_lshrrev_b32_e32 v77, 3, v77
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v34, 0x1c00, v34, v77
	v_lshlrev_b32_e32 v34, 1, v34
	ds_load_u16 v34, v34
.LBB43_350:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v33, 0xffff, v33
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v34, v34, v33
.LBB43_351:                             ; %Flow99
	s_or_b32 exec_lo, exec_lo, s4
	v_and_b32_e32 v35, 0xffff, v35
	v_and_b32_e32 v36, 0xffff, v36
	v_and_b32_e32 v77, 0xffff, v37
	v_and_b32_e32 v38, 0xffff, v38
	v_and_b32_e32 v39, 0xffff, v39
	v_and_b32_e32 v79, 0xffff, v40
	v_and_b32_e32 v81, 0xffff, v42
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v37, 0xffff, v108
	v_and_b32_e32 v83, 0xffff, v84
	v_and_b32_e32 v84, 0xffff, v86
	v_and_b32_e32 v85, 0xffff, v88
	s_waitcnt lgkmcnt(29)
	v_and_b32_e32 v40, 0xffff, v107
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v42, 0xffff, v106
	s_waitcnt lgkmcnt(27)
	v_and_b32_e32 v86, 0xffff, v105
	s_waitcnt lgkmcnt(26)
	v_and_b32_e32 v87, 0xffff, v104
	s_waitcnt lgkmcnt(25)
	v_and_b32_e32 v88, 0xffff, v103
	v_and_b32_e32 v41, 0xffff, v41
	v_and_b32_e32 v44, 0xffff, v44
	v_and_b32_e32 v46, 0xffff, v46
	v_and_b32_e32 v48, 0xffff, v48
	v_add_nc_u32_e32 v35, v37, v35
	v_add_nc_u32_e32 v37, v40, v36
	v_add_nc_u32_e32 v40, v42, v77
	v_add_nc_u32_e32 v38, v86, v38
	v_add_nc_u32_e32 v36, v87, v39
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v42, 0xffff, v102
	v_add_nc_u32_e32 v39, v88, v79
	s_waitcnt lgkmcnt(23)
	v_and_b32_e32 v77, 0xffff, v101
	s_waitcnt lgkmcnt(22)
	v_and_b32_e32 v79, 0xffff, v100
	s_waitcnt lgkmcnt(21)
	v_and_b32_e32 v86, 0xffff, v45
	s_waitcnt lgkmcnt(20)
	v_and_b32_e32 v87, 0xffff, v43
	v_and_b32_e32 v50, 0xffff, v50
	v_and_b32_e32 v52, 0xffff, v52
	v_and_b32_e32 v54, 0xffff, v54
	v_and_b32_e32 v58, 0xffff, v58
	v_add_nc_u32_e32 v42, v42, v41
	v_add_nc_u32_e32 v45, v77, v81
	v_add_nc_u32_e32 v43, v79, v44
	v_add_nc_u32_e32 v41, v86, v46
	s_waitcnt lgkmcnt(19)
	v_and_b32_e32 v46, 0xffff, v99
	v_add_nc_u32_e32 v44, v87, v48
	s_waitcnt lgkmcnt(18)
	v_and_b32_e32 v48, 0xffff, v98
	s_waitcnt lgkmcnt(17)
	v_and_b32_e32 v77, 0xffff, v97
	s_waitcnt lgkmcnt(15)
	v_and_b32_e32 v81, 0xffff, v96
	v_and_b32_e32 v56, 0xffff, v56
	v_and_b32_e32 v60, 0xffff, v60
	v_and_b32_e32 v62, 0xffff, v62
	v_and_b32_e32 v66, 0xffff, v66
	v_and_b32_e32 v79, 0xffff, v47
	v_add_nc_u32_e32 v47, v46, v50
	v_add_nc_u32_e32 v50, v48, v52
	v_add_nc_u32_e32 v48, v77, v54
	s_waitcnt lgkmcnt(14)
	v_and_b32_e32 v52, 0xffff, v49
	v_add_nc_u32_e32 v49, v81, v58
	s_waitcnt lgkmcnt(13)
	v_and_b32_e32 v54, 0xffff, v95
	s_waitcnt lgkmcnt(11)
	v_and_b32_e32 v58, 0xffff, v53
	v_and_b32_e32 v64, 0xffff, v64
	v_and_b32_e32 v68, 0xffff, v68
	v_and_b32_e32 v72, 0xffff, v72
	v_and_b32_e32 v74, 0xffff, v74
	v_and_b32_e32 v78, 0xffff, v78
	v_add_nc_u32_e32 v46, v79, v56
	v_and_b32_e32 v56, 0xffff, v55
	v_add_nc_u32_e32 v52, v52, v60
	s_waitcnt lgkmcnt(10)
	v_and_b32_e32 v60, 0xffff, v51
	v_add_nc_u32_e32 v55, v54, v62
	v_add_nc_u32_e32 v51, v58, v66
	s_waitcnt lgkmcnt(8)
	v_and_b32_e32 v58, 0xffff, v73
	s_waitcnt lgkmcnt(7)
	v_and_b32_e32 v62, 0xffff, v71
	s_waitcnt lgkmcnt(5)
	v_and_b32_e32 v66, 0xffff, v69
	v_and_b32_e32 v70, 0xffff, v70
	v_and_b32_e32 v76, 0xffff, v76
	v_add_nc_u32_e32 v53, v56, v64
	v_and_b32_e32 v56, 0xffff, v75
	v_add_nc_u32_e32 v54, v60, v68
	v_and_b32_e32 v64, 0xffff, v57
	v_add_nc_u32_e32 v60, v58, v72
	v_add_nc_u32_e32 v58, v62, v74
	s_waitcnt lgkmcnt(4)
	v_and_b32_e32 v62, 0xffff, v59
	v_add_nc_u32_e32 v59, v66, v78
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v66, 0xffff, v63
	v_add_nc_u32_e32 v57, v56, v70
	v_add_nc_u32_e32 v56, v64, v76
	v_and_b32_e32 v64, 0xffff, v67
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v67, 0xffff, v61
	v_add_nc_u32_e32 v61, v66, v84
	v_lshlrev_b32_e32 v66, 2, v35
	v_and_b32_e32 v65, 0xffff, v65
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v66, v25 offset:64
	v_lshlrev_b32_e32 v25, 2, v37
	v_lshlrev_b32_e32 v66, 2, v40
	v_add_nc_u32_e32 v63, v65, v83
	v_add_nc_u32_e32 v65, v67, v85
	v_lshlrev_b32_e32 v67, 2, v38
	v_lshlrev_b32_e32 v68, 2, v36
	v_lshlrev_b32_e32 v69, 2, v39
	ds_store_b32 v25, v26 offset:64
	ds_store_b32 v66, v27 offset:64
	ds_store_b32 v67, v28 offset:64
	ds_store_b32 v68, v17 offset:64
	ds_store_b32 v69, v18 offset:64
	v_lshlrev_b32_e32 v17, 2, v42
	v_lshlrev_b32_e32 v18, 2, v45
	v_lshlrev_b32_e32 v25, 2, v43
	v_lshlrev_b32_e32 v26, 2, v41
	v_lshlrev_b32_e32 v27, 2, v44
	ds_store_b32 v17, v19 offset:64
	ds_store_b32 v18, v20 offset:64
	ds_store_b32 v25, v9 offset:64
	ds_store_b32 v26, v10 offset:64
	ds_store_b32 v27, v11 offset:64
	v_lshlrev_b32_e32 v9, 2, v47
	v_lshlrev_b32_e32 v10, 2, v50
	v_lshlrev_b32_e32 v11, 2, v48
	v_lshlrev_b32_e32 v17, 2, v46
	v_lshlrev_b32_e32 v18, 2, v49
	v_and_b32_e32 v80, 0xffff, v80
	ds_store_b32 v9, v12 offset:64
	ds_store_b32 v10, v1 offset:64
	ds_store_b32 v11, v2 offset:64
	ds_store_b32 v17, v3 offset:64
	ds_store_b32 v18, v4 offset:64
	v_lshlrev_b32_e32 v1, 2, v52
	v_and_b32_e32 v82, 0xffff, v82
	v_lshlrev_b32_e32 v2, 2, v55
	v_lshlrev_b32_e32 v3, 2, v53
	v_lshlrev_b32_e32 v4, 2, v51
	v_lshlrev_b32_e32 v9, 2, v54
	v_add_nc_u32_e32 v62, v62, v80
	ds_store_b32 v1, v21 offset:64
	ds_store_b32 v2, v22 offset:64
	ds_store_b32 v3, v23 offset:64
	ds_store_b32 v4, v24 offset:64
	ds_store_b32 v9, v13 offset:64
	v_lshlrev_b32_e32 v1, 2, v57
	v_add_nc_u32_e32 v64, v64, v82
	v_lshlrev_b32_e32 v2, 2, v60
	v_lshlrev_b32_e32 v3, 2, v58
	v_lshlrev_b32_e32 v4, 2, v56
	v_lshlrev_b32_e32 v9, 2, v59
	ds_store_b32 v1, v14 offset:64
	ds_store_b32 v2, v15 offset:64
	ds_store_b32 v3, v16 offset:64
	ds_store_b32 v4, v5 offset:64
	ds_store_b32 v9, v6 offset:64
	v_lshlrev_b32_e32 v1, 2, v62
	v_lshlrev_b32_e32 v2, 2, v64
	v_lshlrev_b32_e32 v3, 2, v63
	v_lshlrev_b32_e32 v4, 2, v61
	v_lshlrev_b32_e32 v5, 2, v65
	ds_store_b32 v1, v7 offset:64
	ds_store_b32 v2, v8 offset:64
	ds_store_b32 v3, v29 offset:64
	ds_store_b32 v4, v30 offset:64
	ds_store_b32 v5, v31 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s3
; %bb.352:                              ; %_ZN7rocprim16block_radix_rankILj512ELj4ELNS_26block_radix_rank_algorithmE0ELj1ELj1EE9rank_keysIjLj31EZNS_6detail25onesweep_iteration_helperIjtjLj512ELj31ELj4ELb0ELS1_0ENS_19identity_decomposerEE8onesweepILb1EPjN6thrust10device_ptrIjEEPtNSB_ItEEEEvT0_T1_T2_T3_S9_S9_PNS4_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS4_11raw_storageINS4_16block_radix_rankILj512ELj4ELb0ELj1ELj1EE13storage_type_EEESG_RA1_jS13_.exit._crit_edge.i.i
	v_mov_b32_e32 v1, 0
; %bb.353:                              ; %Flow96
	s_and_not1_saveexec_b32 s3, s2
	s_cbranch_execz .LBB43_364
; %bb.354:
	v_lshl_or_b32 v3, s15, 4, v0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v7, 0
	s_mov_b32 s4, 0
	s_mov_b32 s5, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v34
	v_add_co_u32 v1, s2, s86, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s2, s87, v2, s2
                                        ; implicit-def: $sgpr2
	global_store_b32 v[1:2], v3, off
.LBB43_355:                             ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB43_358 Depth 2
	s_or_b32 s2, s2, exec_lo
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB43_361
; %bb.356:                              ;   in Loop: Header=BB43_355 Depth=1
	s_add_i32 s5, s5, -1
	s_mov_b32 s6, exec_lo
	v_lshl_or_b32 v3, s5, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s2, s86, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s2, s87, v6, s2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB43_360
; %bb.357:                              ; %.lr.ph.i.i.preheader
                                        ;   in Loop: Header=BB43_355 Depth=1
	s_mov_b32 s9, 0
.LBB43_358:                             ; %.lr.ph.i.i
                                        ;   Parent Loop BB43_355 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s2, 0, v3
	s_or_b32 s9, s2, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB43_358
; %bb.359:                              ; %Flow93
                                        ;   in Loop: Header=BB43_355 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
.LBB43_360:                             ; %Flow94
                                        ;   in Loop: Header=BB43_355 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s6
	v_and_b32_e32 v5, 0x3fffffff, v8
	v_cmp_eq_u32_e64 s2, 0x80000000, v3
	v_add_nc_u32_e32 v7, v5, v7
	s_branch .LBB43_362
.LBB43_361:                             ;   in Loop: Header=BB43_355 Depth=1
                                        ; implicit-def: $sgpr5
.LBB43_362:                             ; %Flow95
                                        ;   in Loop: Header=BB43_355 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s6, exec_lo, s2
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB43_355
; %bb.363:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v3, v7, v34
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v7, v33
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v2, v1
	ds_store_b32 v4, v2
.LBB43_364:                             ; %Flow97
	s_or_b32 exec_lo, exec_lo, s3
	v_lshlrev_b32_e32 v2, 2, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b32_e32 v125, 1, v32
	v_add_nc_u32_e32 v70, 64, v2
	v_lshlrev_b32_e32 v2, 2, v0
	v_or_b32_e32 v32, 0x3c00, v0
	v_lshlrev_b32_e32 v35, 1, v35
	v_lshlrev_b32_e32 v37, 1, v37
	ds_load_2addr_stride64_b32 v[9:10], v70 offset0:8 offset1:16
	ds_load_2addr_stride64_b32 v[11:12], v70 offset0:24 offset1:32
	ds_load_2addr_stride64_b32 v[13:14], v70 offset0:40 offset1:48
	ds_load_2addr_stride64_b32 v[16:17], v70 offset0:56 offset1:64
	ds_load_2addr_stride64_b32 v[18:19], v70 offset0:72 offset1:80
	ds_load_2addr_stride64_b32 v[21:22], v70 offset0:88 offset1:96
	ds_load_2addr_stride64_b32 v[23:24], v70 offset0:104 offset1:112
	ds_load_b32 v78, v2 offset:64
	v_lshlrev_b32_e32 v40, 1, v40
	v_lshlrev_b32_e32 v38, 1, v38
	v_lshlrev_b32_e32 v36, 1, v36
	v_lshlrev_b32_e32 v39, 1, v39
	v_lshlrev_b32_e32 v42, 1, v42
	v_lshlrev_b32_e32 v45, 1, v45
	v_lshlrev_b32_e32 v43, 1, v43
	v_lshlrev_b32_e32 v41, 1, v41
	v_lshlrev_b32_e32 v44, 1, v44
	v_lshlrev_b32_e32 v47, 1, v47
	v_lshlrev_b32_e32 v50, 1, v50
	v_lshlrev_b32_e32 v48, 1, v48
	s_waitcnt lgkmcnt(7)
	v_lshrrev_b32_e32 v3, s80, v9
	s_waitcnt lgkmcnt(6)
	v_lshrrev_b32_e32 v4, s80, v11
	s_waitcnt lgkmcnt(5)
	v_lshrrev_b32_e32 v5, s80, v13
	s_waitcnt lgkmcnt(4)
	v_lshrrev_b32_e32 v6, s80, v16
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v7, s80, v18
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v8, s80, v21
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v15, s80, v23
	v_and_b32_e32 v2, s8, v5
	v_and_b32_e32 v3, s8, v3
	v_and_b32_e32 v5, s8, v6
	v_and_b32_e32 v4, s8, v4
	v_and_b32_e32 v6, s8, v7
	v_lshlrev_b32_e32 v67, 2, v2
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v2, s80, v78
	v_and_b32_e32 v7, s8, v8
	v_and_b32_e32 v8, s8, v15
	v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v72, 2, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_and_b32_e32 v2, s8, v2
	v_lshlrev_b32_e32 v31, 2, v5
	v_lshrrev_b32_e32 v5, s80, v10
	v_lshlrev_b32_e32 v69, 2, v4
	v_lshlrev_b32_e32 v27, 2, v6
	v_lshlrev_b32_e32 v80, 2, v2
	v_lshlrev_b32_e32 v25, 2, v7
	v_lshlrev_b32_e32 v20, 2, v8
	ds_load_b32 v4, v72
	ds_load_b32 v6, v69
	ds_load_b32 v79, v67
	ds_load_b32 v82, v31
	ds_load_b32 v83, v27
	ds_load_b32 v84, v25
	ds_load_b32 v85, v20
	v_and_b32_e32 v5, s8, v5
	ds_load_b32 v29, v80
	v_lshrrev_b32_e32 v7, s80, v12
	v_lshrrev_b32_e32 v15, s80, v17
	v_lshrrev_b32_e32 v2, s80, v22
	v_lshlrev_b32_e32 v81, 2, v5
	v_lshrrev_b32_e32 v8, s80, v14
	v_lshrrev_b32_e32 v26, s80, v19
	v_lshrrev_b32_e32 v28, s80, v24
	v_and_b32_e32 v7, s8, v7
	ds_load_b32 v76, v81
	v_and_b32_e32 v15, s8, v15
	v_and_b32_e32 v2, s8, v2
	v_and_b32_e32 v8, s8, v8
	v_and_b32_e32 v26, s8, v26
	v_and_b32_e32 v28, s8, v28
	v_lshlrev_b32_e32 v73, 2, v7
	v_lshlrev_b32_e32 v68, 2, v15
	v_lshlrev_b32_e32 v30, 2, v2
	v_or_b32_e32 v15, 0x200, v0
	v_lshlrev_b32_e32 v71, 2, v8
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v29, v0
	v_lshlrev_b32_e32 v66, 2, v26
	v_lshlrev_b32_e32 v26, 2, v28
	ds_load_b32 v86, v73
	ds_load_b32 v87, v71
	ds_load_b32 v88, v68
	ds_load_b32 v89, v66
	ds_load_b32 v90, v30
	ds_load_b32 v92, v26
	v_or_b32_e32 v8, 0x400, v0
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	v_add_nc_u32_e32 v2, v4, v15
	v_or_b32_e32 v7, 0x600, v0
	v_or_b32_e32 v5, 0x800, v0
	v_or_b32_e32 v4, 0xa00, v0
	v_lshlrev_b32_e32 v46, 1, v46
	v_lshlrev_b64 v[74:75], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v76, v8
	v_add_co_u32 v28, s2, s70, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v29, s2, s71, v29, s2
	v_lshlrev_b64 v[76:77], 2, v[2:3]
	v_add_nc_u32_e32 v2, v6, v7
	v_add_co_u32 v74, s2, s70, v74
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v75, s2, s71, v75, s2
	global_store_b32 v[28:29], v78, off
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v86, v5
	global_store_b32 v[74:75], v9, off
	v_add_co_u32 v74, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v75, s2, s71, v77, s2
	v_lshlrev_b64 v[76:77], 2, v[2:3]
	v_or_b32_e32 v6, 0xc00, v0
	v_add_nc_u32_e32 v2, v79, v4
	v_add_co_u32 v28, s2, s70, v28
	v_add_co_ci_u32_e64 v29, s2, s71, v29, s2
	v_add_co_u32 v76, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[78:79], 2, v[2:3]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v87, v6
	v_or_b32_e32 v9, 0xe00, v0
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	s_clause 0x2
	global_store_b32 v[74:75], v10, off
	global_store_b32 v[28:29], v11, off
	global_store_b32 v[76:77], v12, off
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	v_add_nc_u32_e32 v2, v82, v9
	v_or_b32_e32 v11, 0x1000, v0
	v_add_co_u32 v74, s2, s70, v78
	v_or_b32_e32 v12, 0x1200, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[76:77], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v88, v11
	v_add_co_ci_u32_e64 v75, s2, s71, v79, s2
	v_add_co_u32 v28, s2, s70, v28
	v_add_co_ci_u32_e64 v29, s2, s71, v29, s2
	v_add_co_u32 v76, s2, s70, v76
	v_lshlrev_b64 v[78:79], 2, v[2:3]
	v_add_nc_u32_e32 v2, v83, v12
	v_or_b32_e32 v10, 0x1400, v0
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	s_clause 0x2
	global_store_b32 v[74:75], v13, off
	global_store_b32 v[28:29], v14, off
	global_store_b32 v[76:77], v16, off
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v2, v89, v10
	v_or_b32_e32 v13, 0x1600, v0
	v_or_b32_e32 v14, 0x1800, v0
	v_add_co_u32 v74, s2, s70, v78
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[76:77], 2, v[2:3]
	v_add_nc_u32_e32 v2, v84, v13
	v_add_co_ci_u32_e64 v75, s2, s71, v79, s2
	v_add_co_u32 v28, s2, s70, v28
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[78:79], 2, v[2:3]
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v90, v14
	ds_load_2addr_stride64_b32 v[90:91], v70 offset0:120 offset1:128
	v_add_co_ci_u32_e64 v29, s2, s71, v29, s2
	v_add_co_u32 v76, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	s_clause 0x1
	global_store_b32 v[74:75], v17, off
	global_store_b32 v[28:29], v18, off
	ds_load_2addr_stride64_b32 v[74:75], v70 offset0:136 offset1:144
	v_or_b32_e32 v17, 0x1a00, v0
	global_store_b32 v[76:77], v19, off
	v_lshlrev_b64 v[18:19], 2, v[2:3]
	v_add_co_u32 v28, s2, s70, v78
	v_add_nc_u32_e32 v2, v85, v17
	v_add_co_ci_u32_e64 v29, s2, s71, v79, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v76, s2, s70, v18
	v_add_co_ci_u32_e64 v77, s2, s71, v19, s2
	ds_load_2addr_stride64_b32 v[78:79], v70 offset0:152 offset1:160
	v_lshlrev_b64 v[18:19], 2, v[2:3]
	v_or_b32_e32 v16, 0x1c00, v0
	ds_load_2addr_stride64_b32 v[95:96], v70 offset0:168 offset1:176
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v82, s80, v90
	v_lshrrev_b32_e32 v83, s80, v91
	v_lshlrev_b32_e32 v49, 1, v49
	v_add_nc_u32_e32 v2, v92, v16
	v_add_co_u32 v92, s2, s70, v18
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v93, s2, s71, v19, s2
	v_and_b32_e32 v19, s8, v82
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v84, s80, v74
	v_and_b32_e32 v82, s8, v83
	v_lshlrev_b64 v[97:98], 2, v[2:3]
	v_or_b32_e32 v18, 0x1e00, v0
	v_lshlrev_b32_e32 v89, 2, v19
	v_and_b32_e32 v2, s8, v84
	v_lshlrev_b32_e32 v87, 2, v82
	v_lshrrev_b32_e32 v19, s80, v75
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v82, s80, v79
	ds_load_b32 v94, v89
	v_lshlrev_b32_e32 v85, 2, v2
	ds_load_b32 v99, v87
	v_lshrrev_b32_e32 v2, s80, v78
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v83, s80, v95
	v_lshrrev_b32_e32 v84, s80, v96
	v_and_b32_e32 v19, s8, v19
	v_and_b32_e32 v82, s8, v82
	v_and_b32_e32 v2, s8, v2
	v_and_b32_e32 v83, s8, v83
	v_and_b32_e32 v100, s8, v84
	v_lshlrev_b32_e32 v88, 2, v19
	v_lshlrev_b32_e32 v84, 2, v82
	v_lshlrev_b32_e32 v86, 2, v2
	v_lshlrev_b32_e32 v83, 2, v83
	v_lshlrev_b32_e32 v82, 2, v100
	ds_load_b32 v100, v85
	ds_load_b32 v101, v88
	ds_load_b32 v102, v86
	ds_load_b32 v103, v84
	ds_load_b32 v104, v83
	ds_load_b32 v105, v82
	v_or_b32_e32 v19, 0x2000, v0
	s_clause 0x2
	global_store_b32 v[28:29], v21, off
	global_store_b32 v[76:77], v22, off
	global_store_b32 v[92:93], v23, off
	v_or_b32_e32 v22, 0x2200, v0
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v2, v94, v18
	v_add_co_u32 v76, s2, s70, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v77, s2, s71, v98, s2
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v99, v19
	v_or_b32_e32 v23, 0x2400, v0
	v_or_b32_e32 v21, 0x2600, v0
	v_lshlrev_b32_e32 v52, 1, v52
	v_lshlrev_b32_e32 v55, 1, v55
	v_lshlrev_b64 v[92:93], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v100, v22
	v_add_co_u32 v28, s2, s70, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v29, s2, s71, v29, s2
	v_lshlrev_b64 v[97:98], 2, v[2:3]
	v_add_co_u32 v92, s2, s70, v92
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v93, s2, s71, v93, s2
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v101, v23
	s_clause 0x2
	global_store_b32 v[76:77], v24, off
	global_store_b32 v[28:29], v90, off
	global_store_b32 v[92:93], v91, off
	v_add_co_u32 v76, s2, s70, v97
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v77, s2, s71, v98, s2
	ds_load_2addr_stride64_b32 v[97:98], v70 offset0:184 offset1:192
	ds_load_2addr_stride64_b32 v[106:107], v70 offset0:200 offset1:208
	v_lshlrev_b64 v[28:29], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v102, v21
	v_or_b32_e32 v24, 0x2800, v0
	global_store_b32 v[76:77], v74, off
	v_lshlrev_b32_e32 v53, 1, v53
	v_lshlrev_b32_e32 v51, 1, v51
	v_lshlrev_b64 v[90:91], 2, v[2:3]
	v_add_co_u32 v92, s2, s70, v28
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v103, v24
	v_or_b32_e32 v28, 0x2a00, v0
	v_add_co_ci_u32_e64 v93, s2, s71, v29, s2
	v_add_co_u32 v90, s2, s70, v90
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[76:77], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v104, v28
	v_add_co_ci_u32_e64 v91, s2, s71, v91, s2
	s_clause 0x1
	global_store_b32 v[92:93], v75, off
	global_store_b32 v[90:91], v78, off
	v_lshlrev_b64 v[74:75], 2, v[2:3]
	ds_load_2addr_stride64_b32 v[108:109], v70 offset0:216 offset1:224
	ds_load_2addr_stride64_b32 v[110:111], v70 offset0:232 offset1:240
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v70, s80, v97
	v_add_co_u32 v76, s2, s70, v76
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v77, s2, s71, v77, s2
	v_lshrrev_b32_e32 v78, s80, v98
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v90, s80, v106
	v_add_co_u32 v99, s2, s70, v74
	v_and_b32_e32 v74, s8, v70
	v_or_b32_e32 v29, 0x2c00, v0
	v_add_co_ci_u32_e64 v100, s2, s71, v75, s2
	v_and_b32_e32 v75, s8, v78
	v_and_b32_e32 v78, s8, v90
	v_lshlrev_b32_e32 v122, 2, v74
	v_add_nc_u32_e32 v2, v105, v29
	v_or_b32_e32 v70, 0x2e00, v0
	v_lshlrev_b32_e32 v123, 2, v75
	v_lshlrev_b32_e32 v93, 2, v78
	ds_load_b32 v78, v122
	v_lshlrev_b64 v[101:102], 2, v[2:3]
	v_lshrrev_b32_e32 v2, s80, v107
	ds_load_b32 v105, v123
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v74, s80, v108
	v_lshrrev_b32_e32 v75, s80, v109
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v90, s80, v110
	v_and_b32_e32 v2, s8, v2
	v_lshrrev_b32_e32 v91, s80, v111
	ds_load_b32 v112, v93
	v_and_b32_e32 v74, s8, v74
	v_and_b32_e32 v75, s8, v75
	v_and_b32_e32 v90, s8, v90
	v_lshlrev_b32_e32 v124, 2, v2
	v_and_b32_e32 v2, s8, v91
	v_lshlrev_b32_e32 v94, 2, v74
	v_lshlrev_b32_e32 v92, 2, v75
	v_lshlrev_b32_e32 v91, 2, v90
	v_or_b32_e32 v75, 0x3000, v0
	v_lshlrev_b32_e32 v90, 2, v2
	ds_load_b32 v113, v124
	ds_load_b32 v114, v94
	ds_load_b32 v115, v92
	ds_load_b32 v116, v91
	ds_load_b32 v117, v90
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v2, v78, v70
	v_add_co_u32 v101, s2, s70, v101
	v_or_b32_e32 v74, 0x3200, v0
	v_add_co_ci_u32_e64 v102, s2, s71, v102, s2
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[103:104], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v105, v75
	s_clause 0x2
	global_store_b32 v[76:77], v79, off
	global_store_b32 v[99:100], v95, off
	global_store_b32 v[101:102], v96, off
	v_or_b32_e32 v77, 0x3400, v0
	v_or_b32_e32 v76, 0x3800, v0
	v_lshlrev_b32_e32 v54, 1, v54
	v_lshlrev_b64 v[78:79], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v112, v74
	v_add_co_u32 v95, s2, s70, v103
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v96, s2, s71, v104, s2
	v_lshlrev_b64 v[99:100], 2, v[2:3]
	v_add_co_u32 v101, s2, s70, v78
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v113, v77
	v_or_b32_e32 v78, 0x3600, v0
	v_add_co_ci_u32_e64 v102, s2, s71, v79, s2
	v_add_co_u32 v99, s2, s70, v99
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[103:104], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v114, v78
	v_add_co_ci_u32_e64 v100, s2, s71, v100, s2
	s_clause 0x2
	global_store_b32 v[95:96], v97, off
	global_store_b32 v[101:102], v98, off
	global_store_b32 v[99:100], v106, off
	v_lshlrev_b64 v[99:100], 2, v[2:3]
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v2, v115, v76
	v_or_b32_e32 v79, 0x3a00, v0
	v_add_co_u32 v112, s2, s70, v103
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v113, s2, s71, v104, s2
	v_lshlrev_b64 v[101:102], 2, v[2:3]
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v116, v79
	s_lshl_b64 s[2:3], s[84:85], 1
	v_lshlrev_b32_e32 v57, 1, v57
	s_add_u32 s4, s72, s2
	v_add_co_u32 v114, s2, s70, v99
	v_lshlrev_b64 v[103:104], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v117, v32
	v_add_co_ci_u32_e64 v115, s2, s71, v100, s2
	v_add_co_u32 v116, s2, s70, v101
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[118:119], 2, v[2:3]
	v_add_co_ci_u32_e64 v117, s2, s71, v102, s2
	v_add_co_u32 v120, s2, s70, v103
	v_add_co_ci_u32_e64 v121, s2, s71, v104, s2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v118, s2, s70, v118
	s_addc_u32 s5, s73, s3
	v_add_co_ci_u32_e64 v119, s2, s71, v119, s2
	s_clause 0x2
	global_load_b128 v[95:98], v125, s[4:5]
	global_load_b128 v[99:102], v125, s[4:5] offset:16
	global_load_b128 v[103:106], v125, s[4:5] offset:32
	s_clause 0x4
	global_store_b32 v[112:113], v107, off
	global_store_b32 v[114:115], v108, off
	global_store_b32 v[116:117], v109, off
	global_store_b32 v[120:121], v110, off
	global_store_b32 v[118:119], v111, off
	s_clause 0x1
	global_load_b96 v[107:109], v125, s[4:5] offset:48
	global_load_u16 v2, v125, s[4:5] offset:60
	v_lshlrev_b32_e32 v110, 1, v0
	v_lshlrev_b32_e32 v60, 1, v60
	v_lshlrev_b32_e32 v58, 1, v58
	v_lshlrev_b32_e32 v56, 1, v56
	v_lshlrev_b32_e32 v59, 1, v59
	v_lshlrev_b32_e32 v62, 1, v62
	v_lshlrev_b32_e32 v64, 1, v64
	v_lshlrev_b32_e32 v63, 1, v63
	v_lshlrev_b32_e32 v61, 1, v61
	v_lshlrev_b32_e32 v65, 1, v65
	v_lshlrev_b32_e32 v111, 1, v0
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b16 v35, v95 offset:64
	ds_store_b16_d16_hi v37, v95 offset:64
	ds_store_b16 v40, v96 offset:64
	ds_store_b16_d16_hi v38, v96 offset:64
	ds_store_b16 v36, v97 offset:64
	ds_store_b16_d16_hi v39, v97 offset:64
	ds_store_b16 v42, v98 offset:64
	ds_store_b16_d16_hi v45, v98 offset:64
	ds_store_b16 v43, v99 offset:64
	ds_store_b16_d16_hi v41, v99 offset:64
	ds_store_b16 v44, v100 offset:64
	ds_store_b16_d16_hi v47, v100 offset:64
	ds_store_b16 v50, v101 offset:64
	ds_store_b16_d16_hi v48, v101 offset:64
	ds_store_b16 v46, v102 offset:64
	ds_store_b16_d16_hi v49, v102 offset:64
	ds_store_b16 v52, v103 offset:64
	ds_store_b16_d16_hi v55, v103 offset:64
	ds_store_b16 v53, v104 offset:64
	ds_store_b16_d16_hi v51, v104 offset:64
	ds_store_b16 v54, v105 offset:64
	ds_store_b16_d16_hi v57, v105 offset:64
	ds_store_b16 v60, v106 offset:64
	ds_store_b16_d16_hi v58, v106 offset:64
	ds_store_b16 v56, v107 offset:64
	ds_store_b16_d16_hi v59, v107 offset:64
	ds_store_b16 v62, v108 offset:64
	ds_store_b16_d16_hi v64, v108 offset:64
	ds_store_b16 v63, v109 offset:64
	ds_store_b16_d16_hi v61, v109 offset:64
	ds_store_b16 v65, v2 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v37, v110 offset:64
	ds_load_b32 v2, v80
	ds_load_b32 v35, v72
	ds_load_b32 v36, v81
	ds_load_b32 v38, v69
	ds_load_b32 v39, v73
	ds_load_b32 v40, v67
	ds_load_b32 v41, v71
	ds_load_b32 v42, v31
	ds_load_u16 v43, v111 offset:1088
	ds_load_u16 v44, v111 offset:2112
	ds_load_u16 v45, v111 offset:3136
	ds_load_u16 v46, v111 offset:4160
	ds_load_u16 v47, v111 offset:5184
	ds_load_u16 v48, v111 offset:6208
	ds_load_u16 v49, v111 offset:7232
	ds_load_u16 v50, v111 offset:8256
	ds_load_b32 v51, v68
	ds_load_b32 v27, v27
	ds_load_b32 v52, v66
	ds_load_b32 v53, v25
	ds_load_b32 v54, v30
	ds_load_b32 v20, v20
	ds_load_b32 v55, v26
	ds_load_b32 v56, v89
	ds_load_u16 v57, v111 offset:9280
	ds_load_u16 v58, v111 offset:10304
	ds_load_u16 v59, v111 offset:11328
	ds_load_u16 v60, v111 offset:12352
	ds_load_u16 v61, v111 offset:13376
	ds_load_u16 v62, v111 offset:14400
	ds_load_u16 v63, v111 offset:15424
	ds_load_u16 v64, v111 offset:16448
	ds_load_b32 v65, v87
	ds_load_b32 v66, v85
	ds_load_b32 v67, v88
	ds_load_b32 v68, v86
	ds_load_b32 v69, v84
	ds_load_b32 v71, v83
	ds_load_b32 v72, v82
	ds_load_b32 v73, v122
	ds_load_u16 v80, v111 offset:17472
	ds_load_u16 v81, v111 offset:18496
	ds_load_u16 v82, v111 offset:19520
	ds_load_u16 v83, v111 offset:20544
	ds_load_u16 v84, v111 offset:21568
	ds_load_u16 v85, v111 offset:22592
	ds_load_u16 v86, v111 offset:23616
	ds_load_u16 v87, v111 offset:24640
	s_waitcnt lgkmcnt(47)
	v_add_nc_u32_e32 v2, v2, v0
	ds_load_b32 v88, v123
	ds_load_b32 v89, v93
	ds_load_b32 v93, v124
	ds_load_b32 v94, v94
	ds_load_b32 v92, v92
	ds_load_b32 v91, v91
	v_lshlrev_b64 v[25:26], 1, v[2:3]
	s_waitcnt lgkmcnt(52)
	v_add_nc_u32_e32 v2, v35, v15
	ds_load_u16 v15, v111 offset:25664
	ds_load_u16 v95, v111 offset:26688
	ds_load_u16 v96, v111 offset:27712
	ds_load_u16 v97, v111 offset:28736
	ds_load_u16 v98, v111 offset:29760
	ds_load_u16 v99, v111 offset:30784
	v_lshlrev_b64 v[30:31], 1, v[2:3]
	s_waitcnt lgkmcnt(57)
	v_add_nc_u32_e32 v2, v36, v8
	v_add_co_u32 v25, s2, s74, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v26, s2, s75, v26, s2
	v_lshlrev_b64 v[35:36], 1, v[2:3]
	s_waitcnt lgkmcnt(56)
	v_add_nc_u32_e32 v2, v38, v7
	v_add_co_u32 v7, s2, s74, v30
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s2, s75, v31, s2
	global_store_b16 v[25:26], v37, off
	v_lshlrev_b64 v[25:26], 1, v[2:3]
	s_waitcnt lgkmcnt(55)
	v_add_nc_u32_e32 v2, v39, v5
	s_waitcnt lgkmcnt(51)
	global_store_b16 v[7:8], v43, off
	v_add_co_u32 v7, s2, s74, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s2, s75, v36, s2
	v_lshlrev_b64 v[30:31], 1, v[2:3]
	v_add_nc_u32_e32 v2, v40, v4
	v_add_co_u32 v4, s2, s74, v25
	v_add_co_ci_u32_e64 v5, s2, s75, v26, s2
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[25:26], 1, v[2:3]
	v_add_nc_u32_e32 v2, v41, v6
	ds_load_b32 v38, v90
	s_waitcnt lgkmcnt(51)
	global_store_b16 v[7:8], v44, off
	s_waitcnt lgkmcnt(50)
	global_store_b16 v[4:5], v45, off
	v_add_co_u32 v30, s2, s74, v30
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	v_add_nc_u32_e32 v2, v42, v9
	v_add_co_ci_u32_e64 v31, s2, s75, v31, s2
	v_add_co_u32 v6, s2, s74, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	s_waitcnt lgkmcnt(44)
	v_add_nc_u32_e32 v2, v51, v11
	v_add_co_ci_u32_e64 v7, s2, s75, v26, s2
	v_add_co_u32 v4, s2, s74, v4
	v_lshlrev_b64 v[25:26], 1, v[2:3]
	s_waitcnt lgkmcnt(43)
	v_add_nc_u32_e32 v2, v27, v12
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	v_add_co_u32 v8, s2, s74, v8
	global_store_b16 v[30:31], v46, off
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b16 v[6:7], v47, off
	global_store_b16 v[4:5], v48, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	s_waitcnt lgkmcnt(42)
	v_add_nc_u32_e32 v2, v52, v10
	global_store_b16 v[8:9], v49, off
	v_add_co_u32 v6, s2, s74, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v26, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	s_waitcnt lgkmcnt(41)
	v_add_nc_u32_e32 v2, v53, v13
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(40)
	v_add_nc_u32_e32 v2, v54, v14
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	global_store_b16 v[6:7], v50, off
	s_waitcnt lgkmcnt(36)
	global_store_b16 v[4:5], v57, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	v_add_nc_u32_e32 v2, v20, v17
	s_waitcnt lgkmcnt(35)
	global_store_b16 v[8:9], v58, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	v_add_nc_u32_e32 v2, v55, v16
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	v_add_nc_u32_e32 v2, v56, v18
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_waitcnt lgkmcnt(34)
	global_store_b16 v[6:7], v59, off
	s_waitcnt lgkmcnt(33)
	global_store_b16 v[4:5], v60, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	s_waitcnt lgkmcnt(28)
	v_add_nc_u32_e32 v2, v65, v19
	global_store_b16 v[8:9], v61, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	s_waitcnt lgkmcnt(27)
	v_add_nc_u32_e32 v2, v66, v22
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(26)
	v_add_nc_u32_e32 v2, v67, v23
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b16 v[6:7], v62, off
	global_store_b16 v[4:5], v63, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	s_waitcnt lgkmcnt(25)
	v_add_nc_u32_e32 v2, v68, v21
	global_store_b16 v[8:9], v64, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	s_waitcnt lgkmcnt(24)
	v_add_nc_u32_e32 v2, v69, v24
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(23)
	v_add_nc_u32_e32 v2, v71, v28
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_waitcnt lgkmcnt(20)
	global_store_b16 v[6:7], v80, off
	s_waitcnt lgkmcnt(19)
	global_store_b16 v[4:5], v81, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	v_add_nc_u32_e32 v2, v72, v29
	s_waitcnt lgkmcnt(18)
	global_store_b16 v[8:9], v82, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	v_add_nc_u32_e32 v2, v73, v70
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(12)
	v_add_nc_u32_e32 v2, v88, v75
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b16 v[6:7], v83, off
	global_store_b16 v[4:5], v84, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	s_waitcnt lgkmcnt(11)
	v_add_nc_u32_e32 v2, v89, v74
	global_store_b16 v[8:9], v85, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	s_waitcnt lgkmcnt(10)
	v_add_nc_u32_e32 v2, v93, v77
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(9)
	v_add_nc_u32_e32 v2, v94, v78
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b16 v[6:7], v86, off
	global_store_b16 v[4:5], v87, off
	v_lshlrev_b64 v[4:5], 1, v[2:3]
	s_waitcnt lgkmcnt(8)
	v_add_nc_u32_e32 v2, v92, v76
	s_waitcnt lgkmcnt(6)
	global_store_b16 v[8:9], v15, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 1, v[2:3]
	v_add_nc_u32_e32 v2, v91, v79
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 1, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v38, v32
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 1, v[2:3]
	v_add_co_u32 v10, s2, s74, v10
	v_add_co_ci_u32_e64 v11, s2, s75, v11, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s2, s74, v2
	v_add_co_ci_u32_e64 v3, s2, s75, v3, s2
	s_clause 0x4
	global_store_b16 v[6:7], v95, off
	global_store_b16 v[4:5], v96, off
	global_store_b16 v[8:9], v97, off
	global_store_b16 v[10:11], v98, off
	global_store_b16 v[2:3], v99, off
	s_load_b32 s0, s[0:1], 0x50
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s0
	s_cselect_b32 s0, -1, 0
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
; %bb.365:
	v_add_nc_u32_e32 v2, v33, v34
	s_or_b32 s7, s7, exec_lo
; %bb.366:                              ; %Flow105
	s_or_b32 exec_lo, exec_lo, s0
.LBB43_367:                             ; %Flow104
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB43_369
; %bb.368:                              ; %_ZN7rocprim6detail25onesweep_iteration_helperIjtjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EPjN6thrust10device_ptrIjEEPtNS8_ItEEEEvT0_T1_T2_T3_S6_S6_PNS0_23onesweep_lookback_stateES3_jjjRNS4_13storage_type_E.exit.sink.split.i
	v_lshlrev_b32_e32 v3, 2, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	ds_load_b32 v3, v3
	v_add_co_u32 v0, vcc_lo, s78, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s79, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB43_369:                             ; %_ZN7rocprim6detail18onesweep_iterationILj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0EPjN6thrust10device_ptrIjEEPtNS5_ItEEjNS_19identity_decomposerEEEvT4_T5_T6_T7_jPT8_SF_PNS0_23onesweep_lookback_stateET9_jjj.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
		.amdhsa_group_segment_fixed_size 63552
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 127
		.amdhsa_next_free_sgpr 88
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj,comdat
.Lfunc_end43:
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end43-_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjtEELb0EPjN6thrust10device_ptrIjEEPtNS7_ItEEjNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SH_PNS0_23onesweep_lookback_stateET6_jjj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 25440
; NumSgprs: 90
; NumVgprs: 127
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 63552 bytes/workgroup (compile time only)
; SGPRBlocks: 11
; VGPRBlocks: 15
; NumSGPRsForWavesPerEU: 90
; NumVGPRsForWavesPerEU: 127
; Occupancy: 8
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,"axG",@progbits,_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,comdat
	.protected	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj ; -- Begin function _ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.globl	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
	.p2align	8
	.type	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,@function
_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj: ; @_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x20
	s_load_b256 s[16:23], s[0:1], 0x0
	s_lshl_b32 s4, s15, 10
	s_mov_b32 s5, 0
	v_lshlrev_b32_e32 v1, 4, v0
	v_lshlrev_b32_e32 v18, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b32_e32 v17, 2, v18
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 10
	s_cmp_lg_u32 s15, s3
	s_cselect_b32 s27, -1, 0
	s_lshl_b64 s[24:25], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_u32 s6, s16, s24
	s_addc_u32 s7, s17, s25
	v_add_co_u32 v9, s6, s6, v1
	v_add_co_ci_u32_e64 v10, null, s7, 0, s6
	s_cmp_eq_u32 s15, s3
	s_cbranch_scc1 .LBB44_2
; %bb.1:
	s_add_u32 s6, s20, s24
	s_addc_u32 s7, s21, s25
	global_load_b128 v[1:4], v[9:10], off
	global_load_b96 v[5:7], v17, s[6:7]
	s_mov_b32 s3, 0
	s_mov_b32 s5, -1
	s_branch .LBB44_3
.LBB44_2:
	s_mov_b32 s3, -1
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4
                                        ; implicit-def: $vgpr5_vgpr6_vgpr7_vgpr8
.LBB44_3:                               ; %Flow75
	s_sub_i32 s26, s2, s4
	s_and_not1_b32 vcc_lo, exec_lo, s3
	v_cmp_gt_u32_e64 s2, s26, v18
	s_cbranch_vccnz .LBB44_19
; %bb.4:
	s_mov_b32 s4, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	s_mov_b32 s7, s4
	s_waitcnt vmcnt(1)
	v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
	v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB44_6
; %bb.5:
	global_load_b32 v1, v[9:10], off
	v_mov_b32_e32 v2, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v3, v2
	v_mov_b32_e32 v4, v2
.LBB44_6:
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_or_b32_e32 v5, 1, v18
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s26, v5
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB44_8
; %bb.7:
	global_load_b32 v2, v[9:10], off offset:4
.LBB44_8:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v5, 2, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s26, v5
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB44_10
; %bb.9:
	global_load_b32 v3, v[9:10], off offset:8
.LBB44_10:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v5, 3, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s26, v5
	s_and_saveexec_b32 s4, s5
	s_cbranch_execz .LBB44_12
; %bb.11:
	global_load_b32 v4, v[9:10], off offset:12
.LBB44_12:                              ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIjEEjLj4EjEEvjT_RAT1__T0_jT2_.exit.i.i
	s_or_b32 exec_lo, exec_lo, s4
	s_add_u32 s4, s20, s24
	s_addc_u32 s6, s21, s25
	v_add_co_u32 v9, s4, s4, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, null, s6, 0, s4
                                        ; implicit-def: $vgpr5_vgpr6_vgpr7_vgpr8
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB44_14
; %bb.13:
	global_load_b32 v5, v[9:10], off
.LBB44_14:
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB44_16
; %bb.15:
	global_load_b32 v6, v[9:10], off offset:4
.LBB44_16:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB44_18
; %bb.17:
	global_load_b32 v7, v[9:10], off offset:8
.LBB44_18:
	s_or_b32 exec_lo, exec_lo, s2
.LBB44_19:                              ; %Flow76
	s_and_saveexec_b32 s2, s5
	s_cbranch_execz .LBB44_21
; %bb.20:                               ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIjEEjLj4EEEvjT_RAT1__T0_j.exit.sink.split.i.i
	s_add_u32 s4, s20, s24
	s_addc_u32 s5, s21, s25
	global_load_b32 v8, v17, s[4:5] offset:12
.LBB44_21:                              ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIjEEjLj4EEEvjT_RAT1__T0_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
	v_mbcnt_lo_u32_b32 v9, -1, 0
	s_load_b64 s[16:17], s[0:1], 0x28
	v_or_b32_e32 v11, 31, v0
	v_cmp_gt_u32_e64 s6, 8, v0
	v_cmp_lt_u32_e64 s7, 31, v0
	v_dual_mov_b32 v24, 0 :: v_dual_add_nc_u32 v13, -1, v9
	v_and_b32_e32 v10, 15, v9
	v_and_b32_e32 v12, 16, v9
	v_cmp_eq_u32_e64 s5, v11, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_gt_i32_e32 vcc_lo, 0, v13
	v_lshlrev_b32_e32 v19, 5, v0
	v_cmp_eq_u32_e64 s0, 0, v10
	v_cmp_lt_u32_e64 s1, 1, v10
	v_cmp_lt_u32_e64 s2, 3, v10
	v_cmp_lt_u32_e64 s3, 7, v10
	v_cndmask_b32_e32 v10, v13, v9, vcc_lo
	v_cmp_eq_u32_e64 s4, 0, v12
	v_lshrrev_b32_e32 v11, 3, v0
	v_and_b32_e32 v12, 7, v9
	v_cmp_eq_u32_e64 s8, 0, v9
	v_lshlrev_b32_e32 v20, 2, v10
	v_lshrrev_b32_e32 v10, 1, v0
	v_mul_i32_i24_e32 v9, 0xffffffe4, v0
	v_and_b32_e32 v21, 28, v11
	v_cmp_eq_u32_e64 s9, 0, v12
	v_cmp_lt_u32_e64 s10, 1, v12
	v_and_b32_e32 v10, 0x7c, v10
	v_cmp_lt_u32_e64 s11, 3, v12
	v_or_b32_e32 v22, 0xffffff00, v0
	v_add_nc_u32_e32 v25, v19, v9
	s_waitcnt lgkmcnt(0)
	s_add_i32 s17, s17, s16
	v_lshl_add_u32 v23, v0, 4, v10
.LBB44_22:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB44_23 Depth 2
                                        ;     Child Loop BB44_31 Depth 2
                                        ;     Child Loop BB44_33 Depth 2
                                        ;     Child Loop BB44_35 Depth 2
                                        ;     Child Loop BB44_37 Depth 2
	v_mov_b32_e32 v9, v18
	v_mov_b32_e32 v10, v22
	s_mov_b32 s12, 0
.LBB44_23:                              ; %.lr.ph.i.i.i.i.i.i.i.i.i
                                        ;   Parent Loop BB44_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v10, 0x100, v10
	ds_store_b32 v9, v24
	v_add_nc_u32_e32 v9, 0x400, v9
	v_cmp_lt_u32_e32 vcc_lo, 0x6ff, v10
	s_or_b32 s12, vcc_lo, s12
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB44_23
; %bb.24:                               ; %_ZN7rocprim6detail16block_radix_rankILj256ELj4ELb1ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.preheader.i.i.i.i.i.i.i.i
                                        ;   in Loop: Header=BB44_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_sub_i32 s12, s17, s16
	s_waitcnt vmcnt(1)
	v_lshrrev_b32_e32 v9, s16, v1
	s_min_u32 s12, s12, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s12, -1, s12
	s_not_b32 s12, s12
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_and_b32_e32 v9, s12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 8, v9
	v_lshrrev_b32_e32 v9, 3, v9
	v_and_or_b32 v10, 0x700, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v10, 1, v10
	v_add_lshl_u32 v27, v10, v9, 1
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v9, s16, v2
	ds_load_u16 v26, v27
	v_and_b32_e32 v9, s12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 8, v9
	v_lshrrev_b32_e32 v9, 3, v9
	v_and_or_b32 v10, 0x700, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 1, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v11, v26, 1
	v_add_lshl_u32 v28, v10, v9, 1
	v_lshrrev_b32_e32 v9, s16, v3
	ds_store_b16 v27, v11
	ds_load_u16 v29, v28
	v_and_b32_e32 v9, s12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 8, v9
	v_lshrrev_b32_e32 v9, 3, v9
	v_and_or_b32 v10, 0x700, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 1, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v11, v29, 1
	v_add_lshl_u32 v30, v10, v9, 1
	v_lshrrev_b32_e32 v9, s16, v4
	ds_store_b16 v28, v11
	ds_load_u16 v31, v30
	v_and_b32_e32 v9, s12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 8, v9
	v_lshrrev_b32_e32 v9, 3, v9
	v_and_or_b32 v10, 0x700, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v10, 1, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v11, v31, 1
	v_add_lshl_u32 v33, v10, v9, 1
	ds_store_b16 v30, v11
	ds_load_u16 v32, v33
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v9, v32, 1
	ds_store_b16 v33, v9
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[13:16], v19 offset1:1
	ds_load_2addr_b64 v[9:12], v19 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v34, v14, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v34, v34, v15, v16
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v34, v34, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v12, v34, v11, v12
	v_mov_b32_dpp v34, v12 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v34, v34, 0, s0
	v_add_nc_u32_e32 v12, v34, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v34, v12 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v34, 0, v34, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v12, v12, v34
	v_mov_b32_dpp v34, v12 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v34, 0, v34, s2
	v_add_nc_u32_e32 v12, v12, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v34, v12 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v34, 0, v34, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v12, v12, v34
	ds_swizzle_b32 v34, v12 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v34, v34, 0, s4
	v_add_nc_u32_e32 v12, v12, v34
	s_and_saveexec_b32 s12, s5
	s_cbranch_execz .LBB44_26
; %bb.25:                               ;   in Loop: Header=BB44_22 Depth=1
	ds_store_b32 v21, v12 offset:8192
.LBB44_26:                              ;   in Loop: Header=BB44_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s12, s6
	s_cbranch_execz .LBB44_28
; %bb.27:                               ;   in Loop: Header=BB44_22 Depth=1
	ds_load_b32 v34, v25 offset:8192
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v35, v34 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v35, v35, 0, s9
	v_add_nc_u32_e32 v34, v35, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v35, v34 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v35, 0, v35, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v34, v34, v35
	v_mov_b32_dpp v35, v34 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v35, 0, v35, s11
	v_add_nc_u32_e32 v34, v34, v35
	ds_store_b32 v25, v34 offset:8192
.LBB44_28:                              ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj256ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj256EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i.i.i.i
                                        ;   in Loop: Header=BB44_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	v_mov_b32_e32 v34, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s12, s7
	s_cbranch_execz .LBB44_30
; %bb.29:                               ;   in Loop: Header=BB44_22 Depth=1
	ds_load_b32 v34, v21 offset:8188
.LBB44_30:                              ; %_ZN7rocprim16block_radix_rankILj256ELj4ELNS_26block_radix_rank_algorithmE1ELj1ELj1EE9rank_keysIjLj4EZNS_16block_radix_sortIjLj256ELj4EjLj1ELj1ELj4EE9sort_implILb0ELb0EjNS_19identity_decomposerEEEvRA4_jRA4_T1_RNS_6detail11raw_storageINS5_13storage_type_EEEjjT2_EUlRKjE_EEvRAT0__KT_RAT0__jRNSE_INSD_16block_radix_rankILj256ELj4ELb1ELj1ELj1EE13storage_type_EEESA_.exit.i.i.i.i.i
                                        ;   in Loop: Header=BB44_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v12, v34, v12
	ds_load_b32 v35, v24 offset:8220
	s_mov_b64 s[14:15], 0
	ds_bpermute_b32 v12, v20, v12
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v12, v12, v34, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v12, v35, 16, v12
	v_add_nc_u32_e32 v13, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v14, v13, v14
	v_add_nc_u32_e32 v15, v14, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v34, v15, v16
	v_and_b32_e32 v16, 0xffff, v32
	v_add_nc_u32_e32 v35, v34, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v9, v35, v10
	v_add_nc_u32_e32 v10, v9, v11
	ds_store_2addr_b64 v19, v[12:13], v[14:15] offset1:1
	ds_store_2addr_b64 v19, v[34:35], v[9:10] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v9, v27
	ds_load_u16 v10, v28
	ds_load_u16 v11, v30
	ds_load_u16 v12, v33
	v_and_b32_e32 v13, 0xffff, v26
	v_and_b32_e32 v14, 0xffff, v29
	v_and_b32_e32 v15, 0xffff, v31
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v9, v9, v13
	v_add_nc_u32_e32 v10, v10, v14
	v_add_nc_u32_e32 v11, v11, v15
	v_add_nc_u32_e32 v12, v12, v16
.LBB44_31:                              ;   Parent Loop BB44_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_cmp_eq_u32 s14, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s14, 2
	v_cndmask_b32_e32 v13, v9, v10, vcc_lo
	s_cselect_b32 s12, -1, 0
	s_cmp_eq_u32 s14, 3
	s_cselect_b32 s13, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v13, v13, v11, s12
	s_add_u32 s14, s14, 1
	s_addc_u32 s15, s15, 0
	s_cmp_eq_u32 s14, 4
	v_cndmask_b32_e64 v13, v13, v12, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v15, 3, v13
	v_dual_cndmask_b32 v14, v1, v2 :: v_dual_and_b32 v15, 0x3ffc, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v14, v14, v3, s12
	v_lshl_add_u32 v13, v13, 2, v15
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v14, v14, v4, s13
	ds_store_b32 v13, v14
	s_cbranch_scc0 .LBB44_31
; %bb.32:                               ;   in Loop: Header=BB44_22 Depth=1
	v_mov_b32_e32 v13, v23
	s_mov_b64 s[20:21], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB44_33:                              ;   Parent Loop BB44_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v14, v13
	s_cmp_eq_u32 s20, 3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s20, 2
	v_add_nc_u32_e32 v13, 4, v13
	s_cselect_b32 s12, -1, 0
	s_cmp_eq_u32 s20, 1
	s_cselect_b32 s13, -1, 0
	s_cmp_eq_u32 s20, 0
	s_cselect_b32 s14, -1, 0
	s_add_u32 s20, s20, 1
	s_addc_u32 s21, s21, 0
	s_cmp_lg_u32 s20, 4
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v4, v4, v14, vcc_lo
	v_cndmask_b32_e64 v3, v3, v14, s12
	v_cndmask_b32_e64 v2, v2, v14, s13
	v_cndmask_b32_e64 v1, v1, v14, s14
	s_cbranch_scc1 .LBB44_33
; %bb.34:                               ; %_ZN7rocprim16block_radix_sortIjLj256ELj4EjLj1ELj1ELj4EE13exchange_keysERNS_6detail11raw_storageINS1_13storage_type_EEERA4_jRA4_Kj.exit.i.i.i.i.i
                                        ;   in Loop: Header=BB44_22 Depth=1
	s_mov_b64 s[14:15], 0
	s_barrier
	buffer_gl0_inv
.LBB44_35:                              ;   Parent Loop BB44_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_cmp_eq_u32 s14, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s14, 2
	v_cndmask_b32_e32 v13, v9, v10, vcc_lo
	s_cselect_b32 s12, -1, 0
	s_cmp_eq_u32 s14, 3
	s_cselect_b32 s13, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v13, v13, v11, s12
	s_add_u32 s14, s14, 1
	s_addc_u32 s15, s15, 0
	s_cmp_eq_u32 s14, 4
	v_cndmask_b32_e64 v13, v13, v12, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v15, 3, v13
	v_dual_cndmask_b32 v14, v5, v6 :: v_dual_and_b32 v15, 0x3ffc, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v14, v14, v7, s12
	v_lshl_add_u32 v13, v13, 2, v15
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v14, v14, v8, s13
	ds_store_b32 v13, v14
	s_cbranch_scc0 .LBB44_35
; %bb.36:                               ;   in Loop: Header=BB44_22 Depth=1
	v_mov_b32_e32 v9, v23
	s_mov_b64 s[20:21], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB44_37:                              ;   Parent Loop BB44_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v10, v9
	s_cmp_eq_u32 s20, 3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s20, 2
	v_add_nc_u32_e32 v9, 4, v9
	s_cselect_b32 s12, -1, 0
	s_cmp_eq_u32 s20, 1
	s_cselect_b32 s13, -1, 0
	s_cmp_eq_u32 s20, 0
	s_cselect_b32 s14, -1, 0
	s_add_u32 s20, s20, 1
	s_addc_u32 s21, s21, 0
	s_cmp_lg_u32 s20, 4
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v8, v8, v10, vcc_lo
	v_cndmask_b32_e64 v7, v7, v10, s12
	v_cndmask_b32_e64 v6, v6, v10, s13
	v_cndmask_b32_e64 v5, v5, v10, s14
	s_cbranch_scc1 .LBB44_37
; %bb.38:                               ; %_ZN7rocprim16block_radix_sortIjLj256ELj4EjLj1ELj1ELj4EE15exchange_valuesIjEEvRNS_6detail11raw_storageINS1_13storage_type_EEERA4_T_RA4_Kj.exit.i.i.i.i.i
                                        ;   in Loop: Header=BB44_22 Depth=1
	s_add_i32 s16, s16, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s16, s17
	s_cbranch_scc1 .LBB44_40
; %bb.39:                               ;   in Loop: Header=BB44_22 Depth=1
	s_mov_b32 s12, 0
	s_barrier
	buffer_gl0_inv
	s_branch .LBB44_41
.LBB44_40:                              ;   in Loop: Header=BB44_22 Depth=1
	s_mov_b32 s12, -1
                                        ; implicit-def: $sgpr16
.LBB44_41:                              ; %Flow74
                                        ;   in Loop: Header=BB44_22 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB44_22
; %bb.42:                               ; %_ZN7rocprim6detail10sort_blockILb0ENS_16block_radix_sortIjLj256ELj4EjLj1ELj1ELj4EEEjjLj4ENS_19identity_decomposerEEEvT0_RAT3__T1_RAT3__T2_RNS5_12storage_typeET4_jj.exit.i.i
	s_add_u32 s0, s18, s24
	s_addc_u32 s1, s19, s25
	v_add_co_u32 v9, s0, s0, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, null, s1, 0, s0
	s_mov_b32 s2, 0
	s_and_not1_b32 vcc_lo, exec_lo, s27
	s_mov_b32 s0, -1
	s_cbranch_vccnz .LBB44_44
; %bb.43:
	s_add_u32 s4, s22, s24
	s_addc_u32 s5, s23, s25
	s_mov_b32 s0, 0
	s_mov_b32 s2, -1
	global_store_b128 v[9:10], v[1:4], off
	global_store_b96 v17, v[5:7], s[4:5]
.LBB44_44:                              ; %Flow
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB44_60
; %bb.45:
	v_cmp_gt_u32_e32 vcc_lo, s26, v18
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB44_47
; %bb.46:
	global_store_b32 v[9:10], v1, off
.LBB44_47:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v0, 1, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s26, v0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB44_49
; %bb.48:
	global_store_b32 v[9:10], v2, off offset:4
.LBB44_49:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v0, 2, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s26, v0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB44_51
; %bb.50:
	global_store_b32 v[9:10], v3, off offset:8
.LBB44_51:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v0, 3, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s26, v0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB44_53
; %bb.52:
	global_store_b32 v[9:10], v4, off offset:12
.LBB44_53:                              ; %_ZN7rocprim26block_store_direct_blockedIN6thrust10device_ptrIjEEjLj4EEEvjT_RAT1__T0_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s3
	s_add_u32 s3, s22, s24
	s_addc_u32 s4, s23, s25
	v_add_co_u32 v0, s3, s3, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s4, 0, s3
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB44_55
; %bb.54:
	global_store_b32 v[0:1], v5, off
.LBB44_55:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB44_57
; %bb.56:
	global_store_b32 v[0:1], v6, off offset:4
.LBB44_57:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB44_59
; %bb.58:
	global_store_b32 v[0:1], v7, off offset:8
.LBB44_59:
	s_or_b32 exec_lo, exec_lo, s0
.LBB44_60:                              ; %Flow72
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB44_62
; %bb.61:                               ; %_ZN7rocprim6detail24radix_sort_single_helperILj256ELj4ELb0EjjE11sort_singleIN6thrust10device_ptrIjEES6_S6_S6_NS_19identity_decomposerEEEvT_T0_T1_T2_jT3_jjRNS2_12storage_typeE.exit.sink.split.i
	s_add_u32 s0, s22, s24
	s_addc_u32 s1, s23, s25
	global_store_b32 v17, v8, s[0:1] offset:12
.LBB44_62:                              ; %_ZN7rocprim6detail11sort_singleILj256ELj4ELb0EN6thrust10device_ptrIjEES4_S4_S4_NS_19identity_decomposerEEEvT2_T3_T4_T5_jT6_jj.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
		.amdhsa_group_segment_fixed_size 8224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 36
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,"axG",@progbits,_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj,comdat
.Lfunc_end44:
	.size	_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj, .Lfunc_end44-_ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjjEELb0EN6thrust10device_ptrIjEES8_S8_S8_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2568
; NumSgprs: 30
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8224 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 36
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv,"axG",@progbits,_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv,comdat
	.protected	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv ; -- Begin function _ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv
	.globl	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv
	.p2align	8
	.type	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv,@function
_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv: ; @_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 0
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 0
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv,"axG",@progbits,_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv,comdat
.Lfunc_end45:
	.size	_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv, .Lfunc_end45-_ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjjEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEEEvv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.protected	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_ ; -- Begin function _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.globl	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.p2align	8
	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@function
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_: ; @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x8
	v_lshl_or_b32 v0, s15, 7, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB46_6
; %bb.1:
	s_load_b32 s3, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, 0x7ffffe
	s_sub_i32 s5, 0, s4
	s_add_i32 s4, s4, -1
	v_and_b32_e32 v1, s5, v0
	v_and_b32_e32 v5, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 10, v1
	v_add_nc_u32_e32 v2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v4, s2, v2
	v_min_u32_e32 v2, s2, v1
	v_add_nc_u32_e32 v3, s3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, s2, v3
	v_lshlrev_b32_e32 v3, 10, v5
	s_mov_b32 s2, exec_lo
	v_sub_nc_u32_e32 v5, v1, v2
	v_sub_nc_u32_e32 v6, v1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, v5, v3
	v_sub_nc_u32_e32 v3, v4, v2
	v_sub_nc_u32_e64 v6, v1, v6 clamp
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v7, v1, v3
	v_cmpx_lt_u32_e64 v6, v7
	s_cbranch_execz .LBB46_5
; %bb.2:                                ; %.lr.ph.i.preheader
	s_load_b64 s[4:5], s[0:1], 0x0
	v_mov_b32_e32 v5, 0
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v5
	v_lshlrev_b64 v[10:11], 2, v[4:5]
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v11, vcc_lo
.LBB46_3:                               ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v4, 1, v4
	v_mov_b32_e32 v12, v5
	v_xad_u32 v11, v4, -1, v1
	v_lshlrev_b64 v[13:14], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v13, vcc_lo, v3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v8, v14, vcc_lo
	v_add_co_u32 v11, vcc_lo, v9, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, v10, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	v_add_nc_u32_e32 v12, 1, v4
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v13, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v7, v7, v4 :: v_dual_cndmask_b32 v6, v12, v6
	v_cmp_ge_u32_e32 vcc_lo, v6, v7
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB46_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s3
.LBB46_5:                               ; %Flow53
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v6, v2
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB46_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
.Lfunc_end46:
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, .Lfunc_end46-_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
	.protected	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_ ; -- Begin function _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.globl	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.p2align	8
	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,@function
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_: ; @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
; %bb.0:
	s_clause 0x2
	s_load_b64 s[18:19], s[0:1], 0x20
	s_load_b64 s[2:3], s[0:1], 0x30
	s_load_b64 s[26:27], s[0:1], 0x44
	s_mov_b32 s20, s15
	s_mov_b32 s21, 0
	v_lshlrev_b32_e32 v25, 2, v0
	s_mov_b32 s7, s21
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s25, s18, 10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s15, s25
	s_cselect_b32 s22, -1, 0
	s_lshl_b64 s[4:5], s[20:21], 2
	s_add_u32 s4, s2, s4
	s_addc_u32 s5, s3, s5
	s_add_i32 s6, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[6:7], s[6:7], 2
	s_add_u32 s2, s2, s6
	s_addc_u32 s3, s3, s7
	s_clause 0x1
	s_load_b32 s4, s[4:5], 0x0
	s_load_b32 s2, s[2:3], 0x0
	s_load_b256 s[8:15], s[0:1], 0x0
	s_lshr_b32 s0, s19, 9
	s_lshl_b32 s16, s20, 10
	s_and_b32 s0, s0, 0x7ffffe
	s_mov_b32 s5, s21
	s_sub_i32 s1, 0, s0
	s_add_i32 s0, s0, -1
	s_and_b32 s1, s20, s1
	s_and_b32 s3, s0, s20
	s_lshl_b32 s6, s1, 11
	s_lshl_b32 s1, s1, 10
	s_add_i32 s6, s6, s19
	s_sub_i32 s7, s16, s1
	s_sub_i32 s1, s6, s1
	s_add_i32 s6, s6, s7
	s_min_u32 s17, s18, s1
	s_add_i32 s1, s1, s19
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s7, s6, s4
	s_sub_i32 s19, s6, s2
	s_min_u32 s6, s18, s7
	s_addk_i32 s19, 0x400
	s_cmp_eq_u32 s0, s3
	s_mov_b32 s7, s21
	s_cselect_b32 s0, s1, s19
	s_cselect_b32 s1, s17, s2
	s_lshl_b64 s[2:3], s[4:5], 2
	s_min_u32 s24, s0, s18
	s_sub_i32 s17, s1, s4
	s_add_u32 s19, s8, s2
	s_addc_u32 s23, s9, s3
	s_lshl_b64 s[4:5], s[6:7], 2
	s_mov_b32 s0, -1
	s_add_u32 s8, s8, s4
	s_addc_u32 s9, s9, s5
	s_lshr_b32 s7, s26, 16
	s_and_b32 s26, s26, 0xffff
	s_and_b32 s1, s27, 0xffff
	s_mul_i32 s7, s26, s7
	s_cmp_eq_u32 s20, s25
	s_mul_i32 s7, s7, s1
	s_cbranch_scc1 .LBB47_2
; %bb.1:                                ; %.preheader36.i.i.i
	v_mov_b32_e32 v4, 0
	v_subrev_nc_u32_e32 v3, s17, v0
	v_add_co_u32 v7, s0, s19, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, null, s23, 0, s0
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_add_nc_u32_e32 v3, s7, v0
	s_mov_b32 s21, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v9, vcc_lo, s19, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, s23, v6, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_add_co_u32 v5, s0, s8, v1
	v_add_co_ci_u32_e64 v6, s0, s9, v2, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_cmp_gt_u32_e64 s0, s17, v0
	v_lshl_add_u32 v3, s7, 1, v0
	v_cndmask_b32_e64 v6, v6, v8, s0
	v_cndmask_b32_e64 v5, v5, v7, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_add_co_u32 v11, s0, s8, v1
	v_add_co_ci_u32_e64 v2, s0, s9, v2, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s19, v7
	v_add_co_ci_u32_e64 v14, s0, s23, v8, s0
	v_mad_u64_u32 v[7:8], null, s7, 3, v[0:1]
	global_load_b32 v1, v[5:6], off
	v_cmp_gt_u32_e64 s0, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_mov_b32_e32 v8, v4
	v_dual_cndmask_b32 v10, v2, v10 :: v_dual_cndmask_b32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v7
	v_lshlrev_b64 v[11:12], 2, v[7:8]
	global_load_b32 v2, v[9:10], off
	v_add_co_u32 v15, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v16, vcc_lo, s9, v6, vcc_lo
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_lshl_add_u32 v3, s7, 2, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v8, v15, v13, s0
	v_cndmask_b32_e64 v9, v16, v14, s0
	v_add_co_u32 v15, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[3:4]
	v_add_co_ci_u32_e32 v12, vcc_lo, s23, v12, vcc_lo
	v_add_co_u32 v18, vcc_lo, s19, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v16, vcc_lo, s23, v14, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_add_co_u32 v14, s0, s8, v5
	v_add_co_ci_u32_e64 v13, s0, s9, v6, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_cmp_gt_u32_e64 s0, s17, v7
	v_cndmask_b32_e64 v13, v13, v12, s0
	v_cndmask_b32_e64 v12, v14, v15, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v19, s0, s8, v5
	v_add_co_ci_u32_e64 v7, s0, s9, v6, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v16, vcc_lo
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[10:11], null, s7, 5, v[0:1]
	v_mov_b32_e32 v11, v4
	v_mad_u64_u32 v[14:15], null, s7, 6, v[0:1]
	v_mov_b32_e32 v15, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[10:11]
	v_subrev_nc_u32_e32 v3, s17, v10
	v_lshlrev_b64 v[16:17], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_co_u32 v20, s0, s19, v5
	v_subrev_nc_u32_e32 v3, s17, v14
	v_add_co_ci_u32_e64 v11, s0, s23, v6, s0
	v_lshlrev_b64 v[5:6], 2, v[14:15]
	v_add_co_u32 v15, s0, s8, v16
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_ci_u32_e64 v16, s0, s9, v17, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s1, s19, v5
	v_add_co_ci_u32_e64 v17, s1, s23, v6, s1
	v_cndmask_b32_e32 v6, v19, v18, vcc_lo
	v_add_co_u32 v3, s1, s8, v3
	v_cmp_gt_u32_e64 s0, s17, v10
	v_add_co_ci_u32_e64 v4, s1, s9, v4, s1
	v_cmp_gt_u32_e64 s1, s17, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, v16, v11, s0
	v_cndmask_b32_e64 v10, v15, v20, s0
	s_mov_b32 s0, 0
	v_cndmask_b32_e64 v15, v4, v17, s1
	v_cndmask_b32_e64 v14, v3, v5, s1
	global_load_b32 v3, v[8:9], off
	global_load_b32 v4, v[12:13], off
	global_load_b32 v5, v[6:7], off
	global_load_b32 v6, v[10:11], off
	global_load_b32 v7, v[14:15], off
	v_mad_u64_u32 v[9:10], null, s7, 7, v[0:1]
	s_branch .LBB47_3
.LBB47_2:
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
                                        ; implicit-def: $vgpr9
.LBB47_3:                               ; %Flow157
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_sub_i32 s6, s24, s6
	s_cbranch_vccnz .LBB47_19
; %bb.4:                                ; %.preheader.i.i.i
	s_add_i32 s1, s6, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB47_6
; %bb.5:
	v_subrev_nc_u32_e32 v1, s17, v0
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, s20, s19, v25
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(3)
	v_add_co_ci_u32_e64 v4, null, s23, 0, s20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v2, v2, v4
	global_load_b32 v1, v[1:2], off
.LBB47_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, s7, v0
	s_mov_b32 s20, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB47_8
; %bb.7:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v2, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s23, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v2 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v2, v[9:10], off
.LBB47_8:
	s_or_b32 exec_lo, exec_lo, s20
	v_lshl_add_u32 v9, s7, 1, v0
	s_mov_b32 s20, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB47_10
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s23, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v3, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v3, v[9:10], off
.LBB47_10:
	s_or_b32 exec_lo, exec_lo, s20
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, s7, 3, v[0:1]
	s_mov_b32 s20, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB47_12
; %bb.11:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v4, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s23, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v4 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v4, v[9:10], off
.LBB47_12:
	s_or_b32 exec_lo, exec_lo, s20
	v_lshl_add_u32 v9, s7, 2, v0
	s_mov_b32 s20, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB47_14
; %bb.13:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v5, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s23, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v5 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v5, v[9:10], off
.LBB47_14:
	s_or_b32 exec_lo, exec_lo, s20
	v_mad_u64_u32 v[9:10], null, s7, 5, v[0:1]
	s_mov_b32 s20, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB47_16
; %bb.15:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v6, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s23, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v6 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v6, v[9:10], off
.LBB47_16:
	s_or_b32 exec_lo, exec_lo, s20
	v_mad_u64_u32 v[9:10], null, s7, 6, v[0:1]
	s_mov_b32 s20, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB47_18
; %bb.17:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v7, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s23, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v7, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v7, v[9:10], off
.LBB47_18:
	s_or_b32 exec_lo, exec_lo, s20
	v_mad_u64_u32 v[9:10], null, s7, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s21, s1, v9
.LBB47_19:                              ; %Flow158
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s21
	s_cbranch_execz .LBB47_21
; %bb.20:                               ; %_ZN7rocprim6detail11gmem_to_regILj8EjPjEEvRAT__T0_T1_S6_jjb.exit.sink.split.i.i
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v11, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v12, vcc_lo, s23, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[8:9], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s0, s8, v8
	v_add_co_ci_u32_e64 v9, s0, s9, v9, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v8, v8, v11 :: v_dual_cndmask_b32 v9, v9, v12
	global_load_b32 v8, v[8:9], off
.LBB47_21:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EjPjEEvRAT__T0_T1_S6_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s1
	v_cndmask_b32_e64 v19, 0, 1, s22
	s_add_u32 s9, s12, s2
	s_addc_u32 s19, s13, s3
	s_add_u32 s2, s12, s4
	s_addc_u32 s3, s13, s5
	s_and_not1_b32 vcc_lo, exec_lo, s22
	s_waitcnt vmcnt(5)
	ds_store_2addr_stride64_b32 v25, v1, v2 offset1:2
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v25, v3, v4 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v25, v5, v6 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v25, v7, v8 offset0:12 offset1:14
	s_cbranch_vccnz .LBB47_23
; %bb.22:                               ; %.preheader36.i89.i.i
	v_mov_b32_e32 v13, 0
	v_subrev_nc_u32_e32 v12, s17, v0
	v_add_co_u32 v18, s0, s9, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v21, null, s19, 0, s0
	v_lshlrev_b64 v[9:10], 2, v[12:13]
	v_add_nc_u32_e32 v12, s7, v0
	v_cmp_gt_u32_e64 s1, s17, v0
	v_mad_u64_u32 v[28:29], null, s7, 6, v[0:1]
	v_mov_b32_e32 v29, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[14:15], 2, v[12:13]
	v_add_co_u32 v9, s0, s2, v9
	v_add_co_ci_u32_e64 v10, s0, s3, v10, s0
	s_add_i32 s8, s6, s17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v11, vcc_lo, s9, v14
	v_add_co_ci_u32_e32 v20, vcc_lo, s19, v15, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v12
	v_subrev_nc_u32_e32 v12, s17, v12
	v_cndmask_b32_e64 v10, v10, v21, s1
	v_cndmask_b32_e64 v9, v9, v18, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[14:15], 2, v[12:13]
	v_lshl_add_u32 v12, s7, 1, v0
	v_lshlrev_b64 v[16:17], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v14, s1, s2, v14
	v_add_co_ci_u32_e64 v15, s1, s3, v15, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v22, s0, s9, v16
	v_add_co_ci_u32_e64 v23, s0, s19, v17, s0
	v_mad_u64_u32 v[16:17], null, s7, 3, v[0:1]
	v_cmp_gt_u32_e64 s0, s17, v12
	v_subrev_nc_u32_e32 v12, s17, v12
	v_dual_cndmask_b32 v15, v15, v20 :: v_dual_cndmask_b32 v14, v14, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[17:18], 2, v[12:13]
	v_subrev_nc_u32_e32 v12, s17, v16
	v_lshlrev_b64 v[20:21], 2, v[12:13]
	v_lshl_add_u32 v12, s7, 2, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s1, s2, v17
	v_add_co_ci_u32_e64 v18, s1, s3, v18, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[26:27], 2, v[12:13]
	v_cndmask_b32_e64 v22, v17, v22, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v23, v18, v23, s0
	global_load_b32 v9, v[9:10], off
	global_load_b32 v10, v[14:15], off
	global_load_b32 v11, v[22:23], off
	v_add_co_u32 v24, vcc_lo, s9, v26
	v_add_co_ci_u32_e32 v22, vcc_lo, s19, v27, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v12
	v_mov_b32_e32 v17, v13
	v_subrev_nc_u32_e32 v12, s17, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[14:15], 2, v[16:17]
	v_mad_u64_u32 v[17:18], null, s7, 5, v[0:1]
	v_mov_b32_e32 v18, v13
	v_add_co_u32 v23, s0, s9, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v26, s0, s19, v15, s0
	v_lshlrev_b64 v[14:15], 2, v[12:13]
	v_add_co_u32 v20, s0, s2, v20
	v_add_co_ci_u32_e64 v12, s0, s3, v21, s0
	v_cmp_gt_u32_e64 s0, s17, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v16, s1, s2, v14
	v_add_co_ci_u32_e64 v21, s1, s3, v15, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v15, v12, v26, s0
	v_subrev_nc_u32_e32 v12, s17, v17
	v_cndmask_b32_e64 v14, v20, v23, s0
	v_dual_cndmask_b32 v20, v16, v24 :: v_dual_cndmask_b32 v21, v21, v22
	v_lshlrev_b64 v[22:23], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[26:27], 2, v[12:13]
	v_subrev_nc_u32_e32 v12, s17, v28
	v_add_co_u32 v16, vcc_lo, s9, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v18, vcc_lo, s19, v23, vcc_lo
	v_add_co_u32 v24, vcc_lo, s2, v26
	v_add_co_ci_u32_e32 v30, vcc_lo, s3, v27, vcc_lo
	v_mad_u64_u32 v[26:27], null, s7, 7, v[0:1]
	v_lshlrev_b64 v[22:23], 2, v[28:29]
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_dual_mov_b32 v27, v13 :: v_dual_cndmask_b32 v16, v24, v16
	v_cndmask_b32_e32 v17, v30, v18, vcc_lo
	v_lshlrev_b64 v[29:30], 2, v[12:13]
	v_add_co_u32 v18, s0, s9, v22
	v_subrev_nc_u32_e32 v12, s17, v26
	v_add_co_ci_u32_e64 v31, s0, s19, v23, s0
	v_lshlrev_b64 v[22:23], 2, v[26:27]
	v_add_co_u32 v27, s0, s2, v29
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_ci_u32_e64 v29, s0, s3, v30, s0
	v_cmp_gt_u32_e64 s0, s17, v28
	v_add_co_u32 v28, s1, s9, v22
	v_add_co_ci_u32_e64 v30, s1, s19, v23, s1
	v_add_co_u32 v12, s1, s2, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v13, s1, s3, v13, s1
	v_cmp_gt_u32_e64 s1, s17, v26
	v_cndmask_b32_e64 v23, v29, v31, s0
	v_cndmask_b32_e64 v22, v27, v18, s0
	s_mov_b32 s0, 0
	v_cndmask_b32_e64 v27, v13, v30, s1
	v_cndmask_b32_e64 v26, v12, v28, s1
	global_load_b32 v12, v[14:15], off
	global_load_b32 v13, v[20:21], off
	global_load_b32 v14, v[16:17], off
	global_load_b32 v15, v[22:23], off
	global_load_b32 v16, v[26:27], off
	s_branch .LBB47_24
.LBB47_23:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $sgpr8
.LBB47_24:                              ; %Flow155
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB47_42
; %bb.25:                               ; %.preheader.i98.i.i
	s_add_i32 s8, s6, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
	v_cmpx_gt_u32_e64 s8, v0
	s_cbranch_execz .LBB47_27
; %bb.26:
	s_waitcnt vmcnt(7)
	v_subrev_nc_u32_e32 v9, s17, v0
	s_waitcnt vmcnt(5)
	v_add_co_u32 v11, s1, s9, v25
	v_mov_b32_e32 v10, 0
	s_waitcnt vmcnt(4)
	v_add_co_ci_u32_e64 v12, null, s19, 0, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v9, v9, v11 :: v_dual_cndmask_b32 v10, v10, v12
	global_load_b32 v9, v[9:10], off
.LBB47_27:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v17, s7, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v17
	s_cbranch_execz .LBB47_29
; %bb.28:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(6)
	v_add_co_u32 v10, vcc_lo, s9, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s19, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s2, v17
	v_add_co_ci_u32_e64 v18, s0, s3, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v10 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v10, v[17:18], off
.LBB47_29:
	s_or_b32 exec_lo, exec_lo, s1
	v_lshl_add_u32 v17, s7, 1, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v17
	s_cbranch_execz .LBB47_31
; %bb.30:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v11, vcc_lo, s9, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s19, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s2, v17
	v_add_co_ci_u32_e64 v18, s0, s3, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v11 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v11, v[17:18], off
.LBB47_31:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[17:18], null, s7, 3, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v17
	s_cbranch_execz .LBB47_33
; %bb.32:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v12, vcc_lo, s9, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s19, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s2, v17
	v_add_co_ci_u32_e64 v18, s0, s3, v18, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v17, v17, v12, vcc_lo
	v_cndmask_b32_e32 v18, v18, v20, vcc_lo
	global_load_b32 v12, v[17:18], off
.LBB47_33:
	s_or_b32 exec_lo, exec_lo, s1
	v_lshl_add_u32 v17, s7, 2, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v17
	s_cbranch_execz .LBB47_35
; %bb.34:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(3)
	v_add_co_u32 v13, vcc_lo, s9, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s19, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s2, v17
	v_add_co_ci_u32_e64 v18, s0, s3, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v13 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v13, v[17:18], off
.LBB47_35:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[17:18], null, s7, 5, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v17
	s_cbranch_execz .LBB47_37
; %bb.36:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v14, vcc_lo, s9, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s19, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s2, v17
	v_add_co_ci_u32_e64 v18, s0, s3, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v14 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v14, v[17:18], off
.LBB47_37:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[17:18], null, s7, 6, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v17
	s_cbranch_execz .LBB47_39
; %bb.38:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v15, vcc_lo, s9, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s19, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s2, v17
	v_add_co_ci_u32_e64 v18, s0, s3, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v15 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v15, v[17:18], off
.LBB47_39:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[17:18], null, s7, 7, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v17
	s_cbranch_execz .LBB47_41
; %bb.40:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	v_add_co_u32 v20, vcc_lo, s9, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v21, vcc_lo, s19, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[16:17], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v16, s0, s2, v16
	v_add_co_ci_u32_e64 v17, s0, s3, v17, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v16, v16, v20 :: v_dual_cndmask_b32 v17, v17, v21
	global_load_b32 v16, v[16:17], off
.LBB47_41:                              ; %Flow154
	s_or_b32 exec_lo, exec_lo, s1
.LBB47_42:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EjPjEEvRAT__T0_T1_S6_jjb.exit107.i.i
	v_lshlrev_b32_e32 v17, 3, v0
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_min_u32_e32 v18, s8, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e64 v24, v18, s6 clamp
	v_min_u32_e32 v20, s17, v18
	v_cmpx_lt_u32_e64 v24, v20
	s_cbranch_execz .LBB47_46
; %bb.43:                               ; %.lr.ph.i.preheader.i.i
	v_lshlrev_b32_e32 v21, 2, v18
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v21, s17, 2, v21
.LBB47_44:                              ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v22, v20, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v22, 1, v22
	v_not_b32_e32 v23, v22
	v_lshlrev_b32_e32 v26, 2, v22
	v_add_nc_u32_e32 v27, 1, v22
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v23, v23, 2, v21
	ds_load_b32 v26, v26
	ds_load_b32 v23, v23
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v26, v23
	v_cndmask_b32_e32 v20, v20, v22, vcc_lo
	v_cndmask_b32_e32 v24, v27, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v24, v20
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB47_44
; %bb.45:                               ; %Flow152
	s_or_b32 exec_lo, exec_lo, s1
.LBB47_46:                              ; %Flow153
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s0
	v_sub_nc_u32_e32 v18, v18, v24
	v_cmp_ge_u32_e32 vcc_lo, s17, v24
                                        ; implicit-def: $vgpr28
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $vgpr26
                                        ; implicit-def: $vgpr23
                                        ; implicit-def: $vgpr22
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $vgpr20
	v_add_nc_u32_e32 v29, s17, v18
                                        ; implicit-def: $vgpr18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_u32_e64 s0, s8, v29
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB47_52
; %bb.47:                               ; %._crit_edge.i.i.i.i
	v_cmp_gt_u32_e32 vcc_lo, s17, v24
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB47_49
; %bb.48:
	v_lshlrev_b32_e32 v1, 2, v24
	ds_load_b32 v1, v1
.LBB47_49:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_le_u32_e64 s0, s8, v29
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_gt_u32_e64 s8, v29
	s_cbranch_execz .LBB47_51
; %bb.50:
	v_lshlrev_b32_e32 v2, 2, v29
	ds_load_b32 v2, v2
.LBB47_51:                              ; %.loopexit.loopexit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	v_cmp_le_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_or_b32 vcc_lo, s0, s1
	v_dual_mov_b32 v3, s17 :: v_dual_cndmask_b32 v18, v29, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, s8, v3 :: v_dual_add_nc_u32 v5, 1, v18
	v_add_nc_u32_e32 v4, -1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v6, v24, v5, vcc_lo
	v_min_u32_e32 v4, v5, v4
	v_cndmask_b32_e32 v5, v5, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s0, s17, v6
	v_lshlrev_b32_e32 v4, 2, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s2, s8, v5
	ds_load_b32 v4, v4
	s_waitcnt lgkmcnt(0)
	v_dual_cndmask_b32 v7, v4, v2 :: v_dual_cndmask_b32 v4, v1, v4
	v_cndmask_b32_e32 v1, v2, v1, vcc_lo
	v_cmp_le_u32_e64 s1, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_or_b32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v20, v5, v6, s0
	v_cndmask_b32_e64 v8, s8, v3, s0
	v_cndmask_b32_e64 v2, v7, v4, s0
	v_add_nc_u32_e32 v21, 1, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, -1, v8
	v_cndmask_b32_e64 v6, v6, v21, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v8, v21, v8
	v_cndmask_b32_e64 v5, v21, v5, s0
	v_cmp_gt_u32_e64 s1, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v8, 2, v8
	v_cmp_le_u32_e64 s3, s8, v5
	ds_load_b32 v8, v8
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v24, v8, v7, s0
	v_cndmask_b32_e64 v8, v4, v8, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s2, v8, v24
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s3, s1
	v_cndmask_b32_e64 v21, v5, v6, s1
	v_cndmask_b32_e64 v22, s8, v3, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v23, 1, v21
	v_add_nc_u32_e32 v22, -1, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v23, s1
	v_min_u32_e32 v22, v23, v22
	v_cndmask_b32_e64 v5, v23, v5, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s2, s17, v6
	v_lshlrev_b32_e32 v22, 2, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s4, s8, v5
	ds_load_b32 v22, v22
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v28, v22, v24, s1
	v_cndmask_b32_e64 v29, v8, v22, s1
	v_cmp_le_u32_e64 s3, v29, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_or_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v22, v5, v6, s2
	v_cndmask_b32_e64 v23, s8, v3, s2
	v_cndmask_b32_e64 v4, v28, v29, s2
	v_add_nc_u32_e32 v26, 1, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v23, -1, v23
	v_cndmask_b32_e64 v6, v6, v26, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v23, v26, v23
	v_cndmask_b32_e64 v5, v26, v5, s2
	v_cmp_gt_u32_e64 s3, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v23, 2, v23
	v_cmp_le_u32_e64 s5, s8, v5
	ds_load_b32 v23, v23
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v30, v23, v28, s2
	v_cndmask_b32_e64 v31, v29, v23, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s4, v31, v30
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s5, s3
	v_cndmask_b32_e64 v23, v5, v6, s3
	v_cndmask_b32_e64 v26, s8, v3, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v27, 1, v23
	v_add_nc_u32_e32 v26, -1, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v27, s3
	v_min_u32_e32 v26, v27, v26
	v_cndmask_b32_e64 v5, v27, v5, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s4, s17, v6
	v_lshlrev_b32_e32 v26, 2, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s6, s8, v5
	ds_load_b32 v26, v26
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v32, v26, v30, s3
	v_cndmask_b32_e64 v33, v31, v26, s3
	v_cmp_le_u32_e64 s5, v33, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, s5
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v26, v5, v6, s4
	v_cndmask_b32_e64 v27, s8, v3, s4
	v_add_nc_u32_e32 v34, 1, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v27, -1, v27
	v_cndmask_b32_e64 v6, v6, v34, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v27, v34, v27
	v_cndmask_b32_e64 v5, v34, v5, s4
	v_cmp_gt_u32_e64 s5, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v27, 2, v27
	v_cmp_le_u32_e64 s7, s8, v5
	ds_load_b32 v27, v27
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v35, v27, v32, s4
	v_cndmask_b32_e64 v36, v33, v27, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s6, v36, v35
	s_and_b32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s7, s5
	v_cndmask_b32_e64 v27, v5, v6, s5
	v_cndmask_b32_e64 v3, s8, v3, s5
	v_cndmask_b32_e64 v7, v35, v36, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v34, 1, v27
	v_add_nc_u32_e32 v3, -1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, v6, v34, s5
	v_min_u32_e32 v3, v34, v3
	v_cndmask_b32_e64 v34, v34, v5, s5
	v_cndmask_b32_e64 v5, v30, v31, s3
	v_cndmask_b32_e64 v6, v32, v33, s4
	v_cmp_gt_u32_e32 vcc_lo, s17, v37
	v_lshlrev_b32_e32 v3, 2, v3
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v38, v3, v35, s5
	v_cndmask_b32_e64 v39, v36, v3, s5
	v_cndmask_b32_e64 v3, v24, v8, s1
	v_cmp_le_u32_e64 s1, s8, v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s0, v39, v38
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 vcc_lo, s1, s0
	v_cndmask_b32_e32 v28, v34, v37, vcc_lo
	v_cndmask_b32_e32 v8, v38, v39, vcc_lo
.LBB47_52:                              ; %Flow150
	s_or_b32 exec_lo, exec_lo, s9
	s_barrier
	buffer_gl0_inv
	ds_store_2addr_stride64_b32 v25, v9, v10 offset1:2
	ds_store_2addr_stride64_b32 v25, v11, v12 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v25, v13, v14 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v25, v15, v16 offset0:12 offset1:14
	v_lshlrev_b32_e32 v9, 2, v18
	v_lshlrev_b32_e32 v10, 2, v20
	v_lshlrev_b32_e32 v11, 2, v21
	v_lshlrev_b32_e32 v12, 2, v22
	v_lshlrev_b32_e32 v13, 2, v23
	v_lshlrev_b32_e32 v14, 2, v26
	v_lshlrev_b32_e32 v15, 2, v27
	v_lshlrev_b32_e32 v16, 2, v28
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v9, v9
	ds_load_b32 v10, v10
	ds_load_b32 v11, v11
	ds_load_b32 v12, v12
	ds_load_b32 v13, v13
	ds_load_b32 v14, v14
	ds_load_b32 v15, v15
	ds_load_b32 v16, v16
	v_and_b32_e32 v18, 0x7c, v0
	v_cmp_ne_u32_e32 vcc_lo, 1, v19
	s_mov_b32 s17, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	v_lshl_add_u32 v26, v17, 2, v18
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB47_62
; %bb.53:                               ; %.preheader167.i.i.preheader
	v_mov_b32_e32 v17, v26
	s_mov_b64 s[0:1], 0
.LBB47_54:                              ; %.preheader167.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v18, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v17, v18
	v_add_nc_u32_e32 v17, 4, v17
	s_cbranch_scc0 .LBB47_54
; %bb.55:
	v_lshrrev_b32_e32 v17, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_lshl_u32 v27, v0, v17, 2
	v_dual_mov_b32 v24, v8 :: v_dual_mov_b32 v23, v7
	v_dual_mov_b32 v22, v6 :: v_dual_mov_b32 v19, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v28, v27 :: v_dual_mov_b32 v21, v5
	v_dual_mov_b32 v20, v4 :: v_dual_mov_b32 v17, v1
	v_mov_b32_e32 v18, v2
.LBB47_56:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v29, v28
	v_add_nc_u32_e32 v28, 0x210, v28
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v17, v29
	s_cbranch_scc1 .LBB47_56
; %bb.57:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_lshl_b64 s[0:1], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s10, s0
	s_addc_u32 s3, s11, s1
	s_clause 0x7
	global_store_b32 v25, v17, s[2:3]
	global_store_b32 v25, v18, s[2:3] offset:512
	global_store_b32 v25, v19, s[2:3] offset:1024
	global_store_b32 v25, v20, s[2:3] offset:1536
	global_store_b32 v25, v21, s[2:3] offset:2048
	global_store_b32 v25, v22, s[2:3] offset:2560
	global_store_b32 v25, v23, s[2:3] offset:3072
	global_store_b32 v25, v24, s[2:3] offset:3584
	v_mov_b32_e32 v17, v26
	s_mov_b64 s[2:3], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB47_58:                              ; =>This Inner Loop Header: Depth=1
	s_mov_b32 m0, s2
	s_add_u32 s2, s2, 1
	v_movrels_b32_e32 v18, v9
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 8
	ds_store_b32 v17, v18
	v_add_nc_u32_e32 v17, 4, v17
	s_cbranch_scc0 .LBB47_58
; %bb.59:
	v_dual_mov_b32 v17, v9 :: v_dual_mov_b32 v18, v10
	v_dual_mov_b32 v19, v11 :: v_dual_mov_b32 v20, v12
	v_dual_mov_b32 v21, v13 :: v_dual_mov_b32 v22, v14
	v_dual_mov_b32 v23, v15 :: v_dual_mov_b32 v24, v16
	s_mov_b64 s[2:3], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB47_60:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v28, v27
	v_add_nc_u32_e32 v27, 0x210, v27
	s_mov_b32 m0, s2
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v17, v28
	s_cbranch_scc1 .LBB47_60
; %bb.61:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit34.i.i.i
	s_add_u32 s2, s14, s0
	s_addc_u32 s3, s15, s1
	s_mov_b32 s0, 0
	s_mov_b32 s12, -1
	s_clause 0x6
	global_store_b32 v25, v17, s[2:3]
	global_store_b32 v25, v18, s[2:3] offset:512
	global_store_b32 v25, v19, s[2:3] offset:1024
	global_store_b32 v25, v20, s[2:3] offset:1536
	global_store_b32 v25, v21, s[2:3] offset:2048
	global_store_b32 v25, v22, s[2:3] offset:2560
	global_store_b32 v25, v23, s[2:3] offset:3072
	s_branch .LBB47_63
.LBB47_62:
	s_mov_b32 s0, -1
	s_mov_b32 s12, s17
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24
.LBB47_63:                              ; %Flow
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB47_103
; %bb.64:                               ; %.preheader.i.i.preheader
	v_mov_b32_e32 v17, v26
	s_mov_b64 s[0:1], 0
.LBB47_65:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v18, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v17, v18
	v_add_nc_u32_e32 v17, 4, v17
	s_cbranch_scc0 .LBB47_65
; %bb.66:
	v_lshrrev_b32_e32 v17, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_lshl_u32 v27, v0, v17, 2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v17, v27
.LBB47_67:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v18, v17
	v_add_nc_u32_e32 v17, 0x210, v17
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v1, v18
	s_cbranch_scc1 .LBB47_67
; %bb.68:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[6:7], s[16:17], 2
	s_sub_i32 s8, s18, s16
	s_add_u32 s0, s10, s6
	s_addc_u32 s1, s11, s7
	v_add_co_u32 v17, s0, s0, v25
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v18, null, s1, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s8, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB47_70
; %bb.69:
	global_store_b32 v[17:18], v1, off
.LBB47_70:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v1, 0x80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s8, v1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB47_72
; %bb.71:
	global_store_b32 v[17:18], v2, off offset:512
.LBB47_72:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v1, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s8, v1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB47_74
; %bb.73:
	global_store_b32 v[17:18], v3, off offset:1024
.LBB47_74:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v1, 0x180, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s8, v1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB47_76
; %bb.75:
	global_store_b32 v[17:18], v4, off offset:1536
.LBB47_76:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v1, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s8, v1
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB47_78
; %bb.77:
	global_store_b32 v[17:18], v5, off offset:2048
.LBB47_78:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v1, 0x280, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s8, v1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB47_80
; %bb.79:
	global_store_b32 v[17:18], v6, off offset:2560
.LBB47_80:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v1, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s8, v1
	s_and_saveexec_b32 s9, s5
	s_cbranch_execz .LBB47_82
; %bb.81:
	global_store_b32 v[17:18], v7, off offset:3072
.LBB47_82:
	s_or_b32 exec_lo, exec_lo, s9
	v_or_b32_e32 v0, 0x380, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s8, v0
	s_and_saveexec_b32 s8, s12
	s_cbranch_execz .LBB47_84
; %bb.83:
	global_store_b32 v[17:18], v8, off offset:3584
.LBB47_84:                              ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jjRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s8
	s_mov_b64 s[8:9], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB47_85:                              ; =>This Inner Loop Header: Depth=1
	s_mov_b32 m0, s8
	s_add_u32 s8, s8, 1
	v_movrels_b32_e32 v0, v9
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s8, 8
	ds_store_b32 v26, v0
	v_add_nc_u32_e32 v26, 4, v26
	s_cbranch_scc0 .LBB47_85
; %bb.86:
	v_dual_mov_b32 v17, v9 :: v_dual_mov_b32 v18, v10
	v_dual_mov_b32 v19, v11 :: v_dual_mov_b32 v20, v12
	v_dual_mov_b32 v21, v13 :: v_dual_mov_b32 v22, v14
	v_dual_mov_b32 v23, v15 :: v_dual_mov_b32 v24, v16
	s_mov_b64 s[8:9], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB47_87:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v0, v27
	v_add_nc_u32_e32 v27, 0x210, v27
	s_mov_b32 m0, s8
	s_add_u32 s8, s8, 1
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s8, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v17, v0
	s_cbranch_scc1 .LBB47_87
; %bb.88:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i22.i.i.i
	s_add_u32 s6, s14, s6
	s_addc_u32 s7, s15, s7
	v_add_co_u32 v0, s6, s6, v25
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s7, 0, s6
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB47_90
; %bb.89:
	global_store_b32 v[0:1], v17, off
.LBB47_90:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB47_92
; %bb.91:
	global_store_b32 v[0:1], v18, off offset:512
.LBB47_92:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB47_94
; %bb.93:
	global_store_b32 v[0:1], v19, off offset:1024
.LBB47_94:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB47_96
; %bb.95:
	global_store_b32 v[0:1], v20, off offset:1536
.LBB47_96:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB47_98
; %bb.97:
	global_store_b32 v[0:1], v21, off offset:2048
.LBB47_98:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB47_100
; %bb.99:
	global_store_b32 v[0:1], v22, off offset:2560
.LBB47_100:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB47_102
; %bb.101:
	global_store_b32 v[0:1], v23, off offset:3072
.LBB47_102:
	s_or_b32 exec_lo, exec_lo, s0
.LBB47_103:                             ; %Flow148
	s_and_saveexec_b32 s0, s12
	s_cbranch_execz .LBB47_105
; %bb.104:                              ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jjRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit23.sink.split.i.i.i
	s_lshl_b64 s[0:1], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s14, s0
	s_addc_u32 s1, s15, s1
	global_store_b32 v25, v24, s[0:1] offset:3584
.LBB47_105:                             ; %_ZN7rocprim6detail28block_merge_mergepath_kernelILj128ELj8EPjN6thrust10device_ptrIjEES2_S5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_PKSD_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 40
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
.Lfunc_end47:
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, .Lfunc_end47-_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 6592
; NumSgprs: 30
; NumVgprs: 40
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 40
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
	.protected	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_ ; -- Begin function _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.globl	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.p2align	8
	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,@function
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_: ; @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x20
	s_lshl_b32 s12, s15, 7
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s4, s2, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s4, v0
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB48_28
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_lshr_b32 s0, s2, 7
	s_mov_b32 s13, 0
	s_cmp_lg_u32 s15, s0
	v_lshlrev_b32_e32 v1, 2, v0
	s_cselect_b32 s1, -1, 0
	s_lshl_b64 s[16:17], s[12:13], 2
	v_add_nc_u32_e32 v0, s12, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s4, s16
	s_addc_u32 s19, s5, s17
	s_add_u32 s8, s8, s16
	s_addc_u32 s9, s9, s17
	s_lshr_b32 s0, s3, 7
	s_clause 0x1
	global_load_b32 v3, v1, s[8:9]
	global_load_b32 v4, v1, s[18:19]
	s_sub_i32 s8, 0, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, s15, s8
	s_and_b32 s0, s8, s0
	s_lshl_b32 s9, s8, 7
	s_sub_i32 s8, 0, s3
	s_cmp_eq_u32 s0, 0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s14, s0, exec_lo
	s_cselect_b32 s14, s3, s8
	s_add_i32 s14, s14, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s14, s2
	s_cbranch_scc1 .LBB48_4
; %bb.2:
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB48_5
; %bb.3:                                ; %.critedge68.i
	v_mov_b32_e32 v1, 0
	s_mov_b32 s8, 0
	s_mov_b32 s13, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
	s_branch .LBB48_6
.LBB48_4:
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr1_vgpr2
	s_branch .LBB48_11
.LBB48_5:
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB48_6:                               ; %Flow33
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB48_10
; %bb.7:
	s_mov_b32 s8, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB48_9
; %bb.8:
	v_mov_b32_e32 v1, 0
	s_or_b32 s13, s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB48_9:                               ; %Flow35
	s_or_b32 exec_lo, exec_lo, s8
.LBB48_10:                              ; %Flow34
	s_mov_b32 s8, 0
.LBB48_11:                              ; %Flow32
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccz .LBB48_26
; %bb.12:
	s_min_u32 s8, s14, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s3, s8, s3
	s_min_u32 s12, s9, s8
	s_add_i32 s9, s9, s8
	s_min_u32 s2, s3, s2
	s_cmp_gt_u32 s3, s14
	v_subrev_nc_u32_e32 v0, s9, v0
	s_cselect_b32 s3, -1, 0
	s_and_b32 vcc_lo, exec_lo, s1
	v_cndmask_b32_e64 v1, 0, 1, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, s12, v0
	v_cmp_ne_u32_e64 s1, 1, v1
	s_cbranch_vccz .LBB48_18
; %bb.13:                               ; %.critedge72.i
	v_mov_b32_e32 v2, s8
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB48_17
; %bb.14:                               ; %.lr.ph.i85.i.preheader
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, s8
	s_mov_b32 s1, 0
.LBB48_15:                              ; %.lr.ph.i85.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v6
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v4, v7
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v7, v4
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v8, s0
	v_add_nc_u32_e32 v8, 1, v0
	v_and_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 1, v7
	v_cndmask_b32_e32 v6, v0, v6, vcc_lo
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v6
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB48_15
; %bb.16:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
.LBB48_17:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEES2_S5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_ENKUljE_clEj.exit91.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	s_mov_b32 s1, 0
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v4, off
	s_branch .LBB48_19
.LBB48_18:
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB48_19:                              ; %Flow30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB48_25
; %bb.20:
	v_mov_b32_e32 v2, s8
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB48_24
; %bb.21:                               ; %.lr.ph.i.i.preheader
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, s8
	s_mov_b32 s1, 0
.LBB48_22:                              ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v6
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v4, v7
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v7, v4
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v8, s0
	v_add_nc_u32_e32 v8, 1, v0
	v_and_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 1, v7
	v_cndmask_b32_e32 v6, v0, v6, vcc_lo
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v6
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB48_22
; %bb.23:                               ; %Flow28
	s_or_b32 exec_lo, exec_lo, s1
.LBB48_24:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEES2_S5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_ENKUljE_clEj.exit.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB48_25:                              ; %Flow31
	s_mov_b32 s13, -1
.LBB48_26:                              ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s13
	s_cbranch_execz .LBB48_28
; %bb.27:                               ; %.critedge.sink.split.i
	s_waitcnt vmcnt(1)
	global_store_b32 v[1:2], v3, off
.LBB48_28:                              ; %_ZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEES2_S5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
.Lfunc_end48:
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, .Lfunc_end48-_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 956
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.protected	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_ ; -- Begin function _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.globl	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.p2align	8
	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@function
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_: ; @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x8
	v_lshl_or_b32 v0, s15, 7, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB49_6
; %bb.1:
	s_load_b32 s3, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, 0x7ffffe
	s_sub_i32 s5, 0, s4
	s_add_i32 s4, s4, -1
	v_and_b32_e32 v1, s5, v0
	v_and_b32_e32 v5, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 10, v1
	v_add_nc_u32_e32 v2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v4, s2, v2
	v_min_u32_e32 v2, s2, v1
	v_add_nc_u32_e32 v3, s3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, s2, v3
	v_lshlrev_b32_e32 v3, 10, v5
	s_mov_b32 s2, exec_lo
	v_sub_nc_u32_e32 v5, v1, v2
	v_sub_nc_u32_e32 v6, v1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, v5, v3
	v_sub_nc_u32_e32 v3, v4, v2
	v_sub_nc_u32_e64 v6, v1, v6 clamp
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v7, v1, v3
	v_cmpx_lt_u32_e64 v6, v7
	s_cbranch_execz .LBB49_5
; %bb.2:                                ; %.lr.ph.i.preheader
	s_load_b64 s[4:5], s[0:1], 0x0
	v_mov_b32_e32 v5, 0
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v5
	v_lshlrev_b64 v[10:11], 2, v[4:5]
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v11, vcc_lo
.LBB49_3:                               ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v4, 1, v4
	v_mov_b32_e32 v12, v5
	v_xad_u32 v11, v4, -1, v1
	v_lshlrev_b64 v[13:14], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v13, vcc_lo, v3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v8, v14, vcc_lo
	v_add_co_u32 v11, vcc_lo, v9, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, v10, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	v_add_nc_u32_e32 v12, 1, v4
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v13, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v7, v7, v4 :: v_dual_cndmask_b32 v6, v12, v6
	v_cmp_ge_u32_e32 vcc_lo, v6, v7
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB49_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s3
.LBB49_5:                               ; %Flow53
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v6, v2
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB49_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
.Lfunc_end49:
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, .Lfunc_end49-_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
	.protected	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_ ; -- Begin function _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.globl	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.p2align	8
	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,@function
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_: ; @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
; %bb.0:
	s_clause 0x2
	s_load_b64 s[18:19], s[0:1], 0x20
	s_load_b64 s[2:3], s[0:1], 0x30
	s_load_b64 s[26:27], s[0:1], 0x44
	s_mov_b32 s20, s15
	s_mov_b32 s21, 0
	v_lshlrev_b32_e32 v25, 2, v0
	s_mov_b32 s7, s21
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s25, s18, 10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s15, s25
	s_cselect_b32 s22, -1, 0
	s_lshl_b64 s[4:5], s[20:21], 2
	s_add_u32 s4, s2, s4
	s_addc_u32 s5, s3, s5
	s_add_i32 s6, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[6:7], s[6:7], 2
	s_add_u32 s2, s2, s6
	s_addc_u32 s3, s3, s7
	s_clause 0x1
	s_load_b32 s4, s[4:5], 0x0
	s_load_b32 s2, s[2:3], 0x0
	s_load_b256 s[8:15], s[0:1], 0x0
	s_lshr_b32 s0, s19, 9
	s_lshl_b32 s16, s20, 10
	s_and_b32 s0, s0, 0x7ffffe
	s_mov_b32 s5, s21
	s_sub_i32 s1, 0, s0
	s_add_i32 s0, s0, -1
	s_and_b32 s1, s20, s1
	s_and_b32 s3, s0, s20
	s_lshl_b32 s6, s1, 11
	s_lshl_b32 s1, s1, 10
	s_add_i32 s6, s6, s19
	s_sub_i32 s7, s16, s1
	s_sub_i32 s1, s6, s1
	s_add_i32 s6, s6, s7
	s_min_u32 s17, s18, s1
	s_add_i32 s1, s1, s19
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s7, s6, s4
	s_sub_i32 s19, s6, s2
	s_min_u32 s6, s18, s7
	s_addk_i32 s19, 0x400
	s_cmp_eq_u32 s0, s3
	s_mov_b32 s7, s21
	s_cselect_b32 s0, s1, s19
	s_cselect_b32 s1, s17, s2
	s_lshl_b64 s[2:3], s[4:5], 2
	s_min_u32 s24, s0, s18
	s_sub_i32 s17, s1, s4
	s_add_u32 s19, s8, s2
	s_addc_u32 s23, s9, s3
	s_lshl_b64 s[4:5], s[6:7], 2
	s_mov_b32 s0, -1
	s_add_u32 s8, s8, s4
	s_addc_u32 s9, s9, s5
	s_lshr_b32 s7, s26, 16
	s_and_b32 s26, s26, 0xffff
	s_and_b32 s1, s27, 0xffff
	s_mul_i32 s7, s26, s7
	s_cmp_eq_u32 s20, s25
	s_mul_i32 s7, s7, s1
	s_cbranch_scc1 .LBB50_2
; %bb.1:                                ; %.preheader38.i.i.i
	v_subrev_nc_u32_e32 v3, s17, v0
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v5, s7, v0
	v_add_co_u32 v7, s0, s19, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, null, s23, 0, s0
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v3, s17, v5
	v_lshl_add_u32 v9, s7, 1, v0
	s_mov_b32 s21, -1
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_mov_b32 v6, v4 :: v_dual_cndmask_b32 v1, v1, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_lshlrev_b64 v[10:11], 2, v[5:6]
	v_subrev_nc_u32_e32 v3, s17, v9
	global_load_b32 v1, v[1:2], off
	v_add_co_u32 v7, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	v_add_co_u32 v12, vcc_lo, s19, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s23, v11, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v5
	v_mov_b32_e32 v10, v4
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v7, v7, v12 :: v_dual_cndmask_b32 v8, v8, v11
	v_lshlrev_b64 v[10:11], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v2, v[7:8], off
	v_add_co_u32 v14, vcc_lo, s19, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s23, v11, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v9, v12, v14, vcc_lo
	v_cndmask_b32_e32 v10, v13, v10, vcc_lo
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[5:6], null, s7, 3, v[0:1]
	v_mov_b32_e32 v6, v4
	v_mad_u64_u32 v[13:14], null, s7, 5, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v3, s17, v5
	v_lshlrev_b64 v[11:12], 2, v[5:6]
	v_lshl_add_u32 v6, s7, 2, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v16, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	v_add_co_u32 v17, vcc_lo, s19, v11
	v_add_co_ci_u32_e32 v15, vcc_lo, s23, v12, vcc_lo
	v_lshlrev_b64 v[11:12], 2, v[3:4]
	v_mov_b32_e32 v7, v4
	v_cmp_gt_u32_e32 vcc_lo, s17, v5
	v_subrev_nc_u32_e32 v3, s17, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, s0, s8, v11
	v_cndmask_b32_e32 v8, v8, v15, vcc_lo
	v_lshlrev_b64 v[14:15], 2, v[6:7]
	v_add_co_ci_u32_e64 v18, s0, s9, v12, s0
	v_mad_u64_u32 v[11:12], null, s7, 6, v[0:1]
	v_add_co_u32 v19, s0, s19, v14
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s0, s23, v15, s0
	v_mov_b32_e32 v14, v4
	v_cndmask_b32_e32 v7, v16, v17, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v6
	v_lshlrev_b64 v[15:16], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v11
	v_cndmask_b32_e32 v6, v18, v12, vcc_lo
	v_lshlrev_b64 v[17:18], 2, v[13:14]
	v_mov_b32_e32 v12, v4
	v_add_co_u32 v20, s0, s8, v15
	v_lshlrev_b64 v[14:15], 2, v[3:4]
	v_add_co_ci_u32_e64 v16, s0, s9, v16, s0
	v_add_co_u32 v17, s0, s19, v17
	v_lshlrev_b64 v[3:4], 2, v[11:12]
	v_add_co_ci_u32_e64 v18, s0, s23, v18, s0
	v_cmp_gt_u32_e64 s0, s17, v13
	v_add_co_u32 v13, s1, s8, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s1, s9, v15, s1
	v_add_co_u32 v3, s1, s19, v3
	v_add_co_ci_u32_e64 v4, s1, s23, v4, s1
	v_cmp_gt_u32_e64 s1, s17, v11
	v_cndmask_b32_e32 v5, v5, v19, vcc_lo
	v_cndmask_b32_e64 v12, v16, v18, s0
	v_cndmask_b32_e64 v11, v20, v17, s0
	s_mov_b32 s0, 0
	v_cndmask_b32_e64 v14, v14, v4, s1
	v_cndmask_b32_e64 v13, v13, v3, s1
	global_load_b32 v3, v[9:10], off
	global_load_b32 v4, v[7:8], off
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[11:12], off
	global_load_b32 v7, v[13:14], off
	v_mad_u64_u32 v[9:10], null, s7, 7, v[0:1]
	s_branch .LBB50_3
.LBB50_2:
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
.LBB50_3:                               ; %Flow156
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_sub_i32 s6, s24, s6
	s_cbranch_vccnz .LBB50_19
; %bb.4:                                ; %.preheader.i.i.i
	s_add_i32 s1, s6, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB50_6
; %bb.5:
	v_subrev_nc_u32_e32 v1, s17, v0
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, s20, s19, v25
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(3)
	v_add_co_ci_u32_e64 v4, null, s23, 0, s20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v2, v2, v4
	global_load_b32 v1, v[1:2], off
.LBB50_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, s7, v0
	s_mov_b32 s20, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB50_8
; %bb.7:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v2, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s23, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v2 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v2, v[9:10], off
.LBB50_8:
	s_or_b32 exec_lo, exec_lo, s20
	v_lshl_add_u32 v9, s7, 1, v0
	s_mov_b32 s20, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB50_10
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s23, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v3, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v3, v[9:10], off
.LBB50_10:
	s_or_b32 exec_lo, exec_lo, s20
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, s7, 3, v[0:1]
	s_mov_b32 s20, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB50_12
; %bb.11:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v4, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s23, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v4 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v4, v[9:10], off
.LBB50_12:
	s_or_b32 exec_lo, exec_lo, s20
	v_lshl_add_u32 v9, s7, 2, v0
	s_mov_b32 s20, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB50_14
; %bb.13:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v5, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s23, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v5 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v5, v[9:10], off
.LBB50_14:
	s_or_b32 exec_lo, exec_lo, s20
	v_mad_u64_u32 v[9:10], null, s7, 5, v[0:1]
	s_mov_b32 s20, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB50_16
; %bb.15:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v6, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s23, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v6 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v6, v[9:10], off
.LBB50_16:
	s_or_b32 exec_lo, exec_lo, s20
	v_mad_u64_u32 v[9:10], null, s7, 6, v[0:1]
	s_mov_b32 s20, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB50_18
; %bb.17:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v7, vcc_lo, s19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s23, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v7, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v7, v[9:10], off
.LBB50_18:
	s_or_b32 exec_lo, exec_lo, s20
	v_mad_u64_u32 v[9:10], null, s7, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s21, s1, v9
.LBB50_19:                              ; %Flow157
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s0, s21
	s_cbranch_execz .LBB50_21
; %bb.20:                               ; %.loopexit.sink.split.i.i.i
	v_mov_b32_e32 v12, 0
	v_subrev_nc_u32_e32 v11, s17, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v10, v12
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[9:10]
	v_add_co_u32 v8, vcc_lo, s8, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v12, vcc_lo
	v_add_co_u32 v11, vcc_lo, s19, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s23, v14, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v9, v10, v12 :: v_dual_cndmask_b32 v8, v8, v11
	global_load_b32 v8, v[8:9], off
.LBB50_21:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EjN6thrust10device_ptrIjEEEEvRAT__T0_T1_S8_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s0
	v_cndmask_b32_e64 v19, 0, 1, s22
	s_add_u32 s2, s12, s2
	s_addc_u32 s3, s13, s3
	s_add_u32 s4, s12, s4
	s_mov_b32 s0, 0
	s_addc_u32 s5, s13, s5
	s_and_not1_b32 vcc_lo, exec_lo, s22
	s_waitcnt vmcnt(5)
	ds_store_2addr_stride64_b32 v25, v1, v2 offset1:2
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v25, v3, v4 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v25, v5, v6 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v25, v7, v8 offset0:12 offset1:14
	s_cbranch_vccnz .LBB50_23
; %bb.22:                               ; %.preheader38.i87.i.i
	v_subrev_nc_u32_e32 v11, s17, v0
	v_dual_mov_b32 v12, 0 :: v_dual_add_nc_u32 v13, s7, v0
	v_add_co_u32 v15, s0, s2, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v16, null, s3, 0, s0
	v_lshlrev_b64 v[9:10], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v11, s17, v13
	v_lshl_add_u32 v17, s7, 1, v0
	s_mov_b32 s8, 0
	v_add_co_u32 v9, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_mov_b32 v14, v12 :: v_dual_cndmask_b32 v9, v9, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v10, v10, v16, vcc_lo
	v_lshlrev_b64 v[15:16], 2, v[11:12]
	v_lshlrev_b64 v[20:21], 2, v[13:14]
	v_subrev_nc_u32_e32 v11, s17, v17
	global_load_b32 v9, v[9:10], off
	v_add_co_u32 v15, vcc_lo, s4, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v16, vcc_lo
	v_add_co_u32 v20, vcc_lo, s2, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_mov_b32_e32 v18, v12
	v_lshlrev_b64 v[10:11], 2, v[11:12]
	v_mad_u64_u32 v[13:14], null, s7, 3, v[0:1]
	v_dual_cndmask_b32 v15, v15, v20 :: v_dual_cndmask_b32 v16, v16, v21
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	v_add_co_u32 v22, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v18, vcc_lo, s5, v11, vcc_lo
	v_subrev_nc_u32_e32 v11, s17, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_u32 v20, vcc_lo, s2, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_cndmask_b32_e32 v17, v22, v20, vcc_lo
	global_load_b32 v10, v[15:16], off
	v_lshlrev_b64 v[15:16], 2, v[11:12]
	v_cndmask_b32_e32 v18, v18, v21, vcc_lo
	v_mad_u64_u32 v[22:23], null, s7, 5, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_co_u32 v26, vcc_lo, s4, v15
	v_mov_b32_e32 v14, v12
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v16, vcc_lo
	v_mov_b32_e32 v15, v12
	v_lshlrev_b64 v[20:21], 2, v[13:14]
	v_lshl_add_u32 v14, s7, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v11, s17, v14
	v_add_co_u32 v27, vcc_lo, s2, v20
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v24, vcc_lo, s3, v21, vcc_lo
	v_lshlrev_b64 v[20:21], 2, v[11:12]
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v11, s17, v22
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v13, s0, s4, v20
	v_cndmask_b32_e32 v16, v16, v24, vcc_lo
	v_lshlrev_b64 v[23:24], 2, v[14:15]
	v_add_co_ci_u32_e64 v28, s0, s5, v21, s0
	v_mad_u64_u32 v[20:21], null, s7, 6, v[0:1]
	v_cndmask_b32_e32 v15, v26, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v29, s0, s2, v23
	v_mov_b32_e32 v23, v12
	v_lshlrev_b64 v[26:27], 2, v[11:12]
	v_add_co_ci_u32_e64 v21, s0, s3, v24, s0
	v_cmp_gt_u32_e32 vcc_lo, s17, v14
	v_subrev_nc_u32_e32 v11, s17, v20
	v_lshlrev_b64 v[23:24], 2, v[22:23]
	v_cndmask_b32_e32 v13, v13, v29, vcc_lo
	v_cndmask_b32_e32 v14, v28, v21, vcc_lo
	v_add_co_u32 v28, s0, s4, v26
	v_mov_b32_e32 v21, v12
	v_add_co_ci_u32_e64 v30, s0, s5, v27, s0
	v_lshlrev_b64 v[26:27], 2, v[11:12]
	v_add_co_u32 v23, s0, s2, v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[20:21]
	v_add_co_ci_u32_e64 v24, s0, s3, v24, s0
	v_cmp_gt_u32_e64 s0, s17, v22
	v_add_co_u32 v22, s1, s4, v26
	v_add_co_ci_u32_e64 v26, s1, s5, v27, s1
	v_add_co_u32 v11, s1, s2, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v12, s1, s3, v12, s1
	v_cmp_gt_u32_e64 s1, s17, v20
	v_cndmask_b32_e64 v21, v30, v24, s0
	v_cndmask_b32_e64 v20, v28, v23, s0
	s_mov_b32 s0, -1
	v_cndmask_b32_e64 v23, v26, v12, s1
	v_cndmask_b32_e64 v22, v22, v11, s1
	global_load_b32 v11, v[17:18], off
	global_load_b32 v12, v[15:16], off
	global_load_b32 v13, v[13:14], off
	global_load_b32 v14, v[20:21], off
	global_load_b32 v15, v[22:23], off
	v_mad_u64_u32 v[17:18], null, s7, 7, v[0:1]
	s_add_i32 s1, s6, s17
	s_branch .LBB50_24
.LBB50_23:
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr17
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $sgpr1
.LBB50_24:                              ; %Flow154
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB50_40
; %bb.25:                               ; %.preheader.i98.i.i
	s_add_i32 s1, s6, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB50_27
; %bb.26:
	s_waitcnt vmcnt(6)
	v_subrev_nc_u32_e32 v9, s17, v0
	s_waitcnt vmcnt(4)
	v_add_co_u32 v11, s8, s2, v25
	v_mov_b32_e32 v10, 0
	s_waitcnt vmcnt(3)
	v_add_co_ci_u32_e64 v12, null, s3, 0, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v9, v9, v11 :: v_dual_cndmask_b32 v10, v10, v12
	global_load_b32 v9, v[9:10], off
.LBB50_27:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v17, s7, v0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v17
	s_cbranch_execz .LBB50_29
; %bb.28:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v10, vcc_lo, s2, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s4, v17
	v_add_co_ci_u32_e64 v18, s0, s5, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v10 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v10, v[17:18], off
.LBB50_29:
	s_or_b32 exec_lo, exec_lo, s8
	v_lshl_add_u32 v17, s7, 1, v0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v17
	s_cbranch_execz .LBB50_31
; %bb.30:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v11, vcc_lo, s2, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s4, v17
	v_add_co_ci_u32_e64 v18, s0, s5, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v11 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v11, v[17:18], off
.LBB50_31:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[17:18], null, s7, 3, v[0:1]
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v17
	s_cbranch_execz .LBB50_33
; %bb.32:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(3)
	v_add_co_u32 v12, vcc_lo, s2, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s4, v17
	v_add_co_ci_u32_e64 v18, s0, s5, v18, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v17, v17, v12, vcc_lo
	v_cndmask_b32_e32 v18, v18, v20, vcc_lo
	global_load_b32 v12, v[17:18], off
.LBB50_33:
	s_or_b32 exec_lo, exec_lo, s8
	v_lshl_add_u32 v17, s7, 2, v0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v17
	s_cbranch_execz .LBB50_35
; %bb.34:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v13, vcc_lo, s2, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s4, v17
	v_add_co_ci_u32_e64 v18, s0, s5, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v13 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v13, v[17:18], off
.LBB50_35:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[17:18], null, s7, 5, v[0:1]
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v17
	s_cbranch_execz .LBB50_37
; %bb.36:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v14, vcc_lo, s2, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s4, v17
	v_add_co_ci_u32_e64 v18, s0, s5, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v14 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v14, v[17:18], off
.LBB50_37:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[17:18], null, s7, 6, v[0:1]
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v17
	s_cbranch_execz .LBB50_39
; %bb.38:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, s2, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s4, v17
	v_add_co_ci_u32_e64 v18, s0, s5, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v15 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v15, v[17:18], off
.LBB50_39:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[17:18], null, s7, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s1, v17
.LBB50_40:                              ; %Flow155
	v_mov_b32_e32 v18, s1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s7, s0
	s_cbranch_execz .LBB50_42
; %bb.41:                               ; %.loopexit.sink.split.i95.i.i
	v_mov_b32_e32 v21, 0
	v_subrev_nc_u32_e32 v20, s17, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v18, v21
	v_lshlrev_b64 v[20:21], 2, v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[22:23], 2, v[17:18]
	v_add_co_u32 v16, vcc_lo, s4, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v18, vcc_lo, s5, v21, vcc_lo
	v_add_co_u32 v20, vcc_lo, s2, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v21, vcc_lo, s3, v23, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_dual_cndmask_b32 v16, v16, v20 :: v_dual_cndmask_b32 v17, v18, v21
	v_mov_b32_e32 v18, s1
	global_load_b32 v16, v[16:17], off
.LBB50_42:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EjN6thrust10device_ptrIjEEEEvRAT__T0_T1_S8_jjb.exit106.i.i
	s_or_b32 exec_lo, exec_lo, s7
	v_lshlrev_b32_e32 v17, 3, v0
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_min_u32_e32 v20, v18, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e64 v26, v20, s6 clamp
	v_min_u32_e32 v21, s17, v20
	v_cmpx_lt_u32_e64 v26, v21
	s_cbranch_execz .LBB50_46
; %bb.43:                               ; %.lr.ph.i.preheader.i.i
	v_lshlrev_b32_e32 v22, 2, v20
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v22, s17, 2, v22
.LBB50_44:                              ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v23, v21, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v23, 1, v23
	v_not_b32_e32 v24, v23
	v_add_nc_u32_e32 v28, 1, v23
	v_lshlrev_b32_e32 v27, 2, v23
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v24, v24, 2, v22
	ds_load_b32 v27, v27
	ds_load_b32 v24, v24
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v27, v24
	v_dual_cndmask_b32 v26, v28, v26 :: v_dual_cndmask_b32 v21, v21, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v26, v21
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB50_44
; %bb.45:                               ; %Flow152
	s_or_b32 exec_lo, exec_lo, s1
.LBB50_46:                              ; %Flow153
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s0
	v_sub_nc_u32_e32 v20, v20, v26
	v_cmp_ge_u32_e32 vcc_lo, s17, v26
                                        ; implicit-def: $vgpr29
                                        ; implicit-def: $vgpr28
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $vgpr24
                                        ; implicit-def: $vgpr23
                                        ; implicit-def: $vgpr22
                                        ; implicit-def: $vgpr21
	v_add_nc_u32_e32 v30, s17, v20
                                        ; implicit-def: $vgpr20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s0, v30, v18
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s8, s0
	s_cbranch_execz .LBB50_52
; %bb.47:                               ; %._crit_edge.i.i.i.i
	v_cmp_gt_u32_e32 vcc_lo, s17, v26
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB50_49
; %bb.48:
	v_lshlrev_b32_e32 v1, 2, v26
	ds_load_b32 v1, v1
.LBB50_49:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_ge_u32_e64 s0, v30, v18
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_lt_u32_e64 v30, v18
	s_cbranch_execz .LBB50_51
; %bb.50:
	v_lshlrev_b32_e32 v2, 2, v30
	ds_load_b32 v2, v2
.LBB50_51:                              ; %.loopexit.loopexit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	v_cmp_le_u32_e64 s1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_or_b32 vcc_lo, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v18, s17, vcc_lo
	v_dual_cndmask_b32 v20, v30, v26 :: v_dual_add_nc_u32 v3, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, 1, v20
	v_min_u32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 2, v3
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_dual_cndmask_b32 v6, v3, v2 :: v_dual_cndmask_b32 v3, v1, v3
	v_dual_cndmask_b32 v5, v26, v4 :: v_dual_cndmask_b32 v4, v4, v30
	v_cndmask_b32_e32 v1, v2, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e64 s1, v3, v6
	v_cmp_gt_u32_e64 s0, s17, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_u32_e64 s2, v4, v18
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v21, v4, v5, s0
	v_cndmask_b32_e64 v7, v18, s17, s0
	v_add_nc_u32_e32 v8, 1, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, -1, v7
	v_cndmask_b32_e64 v2, v6, v3, s0
	v_cndmask_b32_e64 v5, v5, v8, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v7, v8, v7
	v_cndmask_b32_e64 v4, v8, v4, s0
	v_cmp_gt_u32_e64 s1, s17, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v7, 2, v7
	v_cmp_ge_u32_e64 s3, v4, v18
	ds_load_b32 v7, v7
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v26, v7, v6, s0
	v_cndmask_b32_e64 v7, v3, v7, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s2, v7, v26
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s3, s1
	v_cndmask_b32_e64 v22, v4, v5, s1
	v_cndmask_b32_e64 v8, v18, s17, s1
	v_cndmask_b32_e64 v3, v26, v7, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v23, 1, v22
	v_add_nc_u32_e32 v8, -1, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v5, v23, s1
	v_min_u32_e32 v8, v23, v8
	v_cndmask_b32_e64 v4, v23, v4, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s2, s17, v5
	v_lshlrev_b32_e32 v8, 2, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_ge_u32_e64 s4, v4, v18
	ds_load_b32 v8, v8
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v29, v8, v26, s1
	v_cndmask_b32_e64 v8, v7, v8, s1
	v_cmp_le_u32_e64 s3, v8, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_or_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v23, v4, v5, s2
	v_cndmask_b32_e64 v24, v18, s17, s2
	v_add_nc_u32_e32 v27, 1, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v24, -1, v24
	v_cndmask_b32_e64 v5, v5, v27, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v24, v27, v24
	v_cndmask_b32_e64 v4, v27, v4, s2
	v_cmp_gt_u32_e64 s3, s17, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v24, 2, v24
	v_cmp_ge_u32_e64 s5, v4, v18
	ds_load_b32 v24, v24
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v30, v24, v29, s2
	v_cndmask_b32_e64 v31, v8, v24, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s4, v31, v30
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s5, s3
	v_cndmask_b32_e64 v24, v4, v5, s3
	v_cndmask_b32_e64 v27, v18, s17, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v28, 1, v24
	v_add_nc_u32_e32 v27, -1, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v5, v28, s3
	v_min_u32_e32 v27, v28, v27
	v_cndmask_b32_e64 v4, v28, v4, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s4, s17, v5
	v_lshlrev_b32_e32 v27, 2, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_ge_u32_e64 s6, v4, v18
	ds_load_b32 v27, v27
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v32, v27, v30, s3
	v_cndmask_b32_e64 v33, v31, v27, s3
	v_cmp_le_u32_e64 s5, v33, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, s5
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v27, v4, v5, s4
	v_cndmask_b32_e64 v28, v18, s17, s4
	v_cndmask_b32_e64 v6, v32, v33, s4
	v_add_nc_u32_e32 v34, 1, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v28, -1, v28
	v_cndmask_b32_e64 v5, v5, v34, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v28, v34, v28
	v_cndmask_b32_e64 v4, v34, v4, s4
	v_cmp_gt_u32_e64 s5, s17, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v28, 2, v28
	v_cmp_ge_u32_e64 s7, v4, v18
	ds_load_b32 v28, v28
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v35, v28, v32, s4
	v_cndmask_b32_e64 v36, v33, v28, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s6, v36, v35
	s_and_b32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s7, s5
	v_cndmask_b32_e64 v28, v4, v5, s5
	v_cndmask_b32_e64 v34, v18, s17, s5
	v_cndmask_b32_e64 v7, v35, v36, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v37, 1, v28
	v_add_nc_u32_e32 v34, -1, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v5, v37, s5
	v_min_u32_e32 v34, v37, v34
	v_cndmask_b32_e64 v37, v37, v4, s5
	v_cndmask_b32_e64 v4, v29, v8, s2
	v_cndmask_b32_e64 v5, v30, v31, s3
	v_cmp_gt_u32_e32 vcc_lo, s17, v38
	v_lshlrev_b32_e32 v34, 2, v34
	v_cmp_ge_u32_e64 s1, v37, v18
	ds_load_b32 v34, v34
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v39, v34, v35, s5
	v_cndmask_b32_e64 v34, v36, v34, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s0, v34, v39
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 vcc_lo, s1, s0
	v_cndmask_b32_e32 v29, v37, v38, vcc_lo
	v_cndmask_b32_e32 v8, v39, v34, vcc_lo
.LBB50_52:                              ; %Flow150
	s_or_b32 exec_lo, exec_lo, s8
	s_barrier
	buffer_gl0_inv
	ds_store_2addr_stride64_b32 v25, v9, v10 offset1:2
	ds_store_2addr_stride64_b32 v25, v11, v12 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v25, v13, v14 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v25, v15, v16 offset0:12 offset1:14
	v_lshlrev_b32_e32 v9, 2, v20
	v_lshlrev_b32_e32 v10, 2, v21
	v_lshlrev_b32_e32 v11, 2, v22
	v_lshlrev_b32_e32 v12, 2, v23
	v_lshlrev_b32_e32 v13, 2, v24
	v_lshlrev_b32_e32 v14, 2, v27
	v_lshlrev_b32_e32 v15, 2, v28
	v_lshlrev_b32_e32 v16, 2, v29
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v9, v9
	ds_load_b32 v10, v10
	ds_load_b32 v11, v11
	ds_load_b32 v12, v12
	ds_load_b32 v13, v13
	ds_load_b32 v14, v14
	ds_load_b32 v15, v15
	ds_load_b32 v16, v16
	v_and_b32_e32 v18, 0x7c, v0
	v_cmp_ne_u32_e32 vcc_lo, 1, v19
	s_mov_b32 s17, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	v_lshl_add_u32 v26, v17, 2, v18
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB50_62
; %bb.53:                               ; %.preheader171.i.i.preheader
	v_mov_b32_e32 v17, v26
	s_mov_b64 s[0:1], 0
.LBB50_54:                              ; %.preheader171.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v18, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v17, v18
	v_add_nc_u32_e32 v17, 4, v17
	s_cbranch_scc0 .LBB50_54
; %bb.55:
	v_lshrrev_b32_e32 v17, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_lshl_u32 v27, v0, v17, 2
	v_dual_mov_b32 v24, v8 :: v_dual_mov_b32 v23, v7
	v_dual_mov_b32 v22, v6 :: v_dual_mov_b32 v19, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v28, v27 :: v_dual_mov_b32 v21, v5
	v_dual_mov_b32 v20, v4 :: v_dual_mov_b32 v17, v1
	v_mov_b32_e32 v18, v2
.LBB50_56:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v29, v28
	v_add_nc_u32_e32 v28, 0x210, v28
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v17, v29
	s_cbranch_scc1 .LBB50_56
; %bb.57:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPjEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_lshl_b64 s[0:1], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s10, s0
	s_addc_u32 s3, s11, s1
	s_clause 0x7
	global_store_b32 v25, v17, s[2:3]
	global_store_b32 v25, v18, s[2:3] offset:512
	global_store_b32 v25, v19, s[2:3] offset:1024
	global_store_b32 v25, v20, s[2:3] offset:1536
	global_store_b32 v25, v21, s[2:3] offset:2048
	global_store_b32 v25, v22, s[2:3] offset:2560
	global_store_b32 v25, v23, s[2:3] offset:3072
	global_store_b32 v25, v24, s[2:3] offset:3584
	v_mov_b32_e32 v17, v26
	s_mov_b64 s[2:3], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB50_58:                              ; =>This Inner Loop Header: Depth=1
	s_mov_b32 m0, s2
	s_add_u32 s2, s2, 1
	v_movrels_b32_e32 v18, v9
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 8
	ds_store_b32 v17, v18
	v_add_nc_u32_e32 v17, 4, v17
	s_cbranch_scc0 .LBB50_58
; %bb.59:
	v_dual_mov_b32 v17, v9 :: v_dual_mov_b32 v18, v10
	v_dual_mov_b32 v19, v11 :: v_dual_mov_b32 v20, v12
	v_dual_mov_b32 v21, v13 :: v_dual_mov_b32 v22, v14
	v_dual_mov_b32 v23, v15 :: v_dual_mov_b32 v24, v16
	s_mov_b64 s[2:3], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB50_60:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v28, v27
	v_add_nc_u32_e32 v27, 0x210, v27
	s_mov_b32 m0, s2
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v17, v28
	s_cbranch_scc1 .LBB50_60
; %bb.61:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPjEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit35.i.i.i
	s_add_u32 s2, s14, s0
	s_addc_u32 s3, s15, s1
	s_mov_b32 s0, 0
	s_mov_b32 s12, -1
	s_clause 0x6
	global_store_b32 v25, v17, s[2:3]
	global_store_b32 v25, v18, s[2:3] offset:512
	global_store_b32 v25, v19, s[2:3] offset:1024
	global_store_b32 v25, v20, s[2:3] offset:1536
	global_store_b32 v25, v21, s[2:3] offset:2048
	global_store_b32 v25, v22, s[2:3] offset:2560
	global_store_b32 v25, v23, s[2:3] offset:3072
	s_branch .LBB50_63
.LBB50_62:
	s_mov_b32 s0, -1
	s_mov_b32 s12, s17
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24
.LBB50_63:                              ; %Flow
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB50_103
; %bb.64:                               ; %.preheader.i.i.preheader
	v_mov_b32_e32 v17, v26
	s_mov_b64 s[0:1], 0
.LBB50_65:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v18, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v17, v18
	v_add_nc_u32_e32 v17, 4, v17
	s_cbranch_scc0 .LBB50_65
; %bb.66:
	v_lshrrev_b32_e32 v17, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_lshl_u32 v27, v0, v17, 2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v17, v27
.LBB50_67:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v18, v17
	v_add_nc_u32_e32 v17, 0x210, v17
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v1, v18
	s_cbranch_scc1 .LBB50_67
; %bb.68:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[6:7], s[16:17], 2
	s_sub_i32 s8, s18, s16
	s_add_u32 s0, s10, s6
	s_addc_u32 s1, s11, s7
	v_add_co_u32 v17, s0, s0, v25
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v18, null, s1, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s8, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB50_70
; %bb.69:
	global_store_b32 v[17:18], v1, off
.LBB50_70:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v1, 0x80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s8, v1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB50_72
; %bb.71:
	global_store_b32 v[17:18], v2, off offset:512
.LBB50_72:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v1, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s8, v1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB50_74
; %bb.73:
	global_store_b32 v[17:18], v3, off offset:1024
.LBB50_74:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v1, 0x180, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s8, v1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB50_76
; %bb.75:
	global_store_b32 v[17:18], v4, off offset:1536
.LBB50_76:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v1, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s8, v1
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB50_78
; %bb.77:
	global_store_b32 v[17:18], v5, off offset:2048
.LBB50_78:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v1, 0x280, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s8, v1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB50_80
; %bb.79:
	global_store_b32 v[17:18], v6, off offset:2560
.LBB50_80:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v1, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s8, v1
	s_and_saveexec_b32 s9, s5
	s_cbranch_execz .LBB50_82
; %bb.81:
	global_store_b32 v[17:18], v7, off offset:3072
.LBB50_82:
	s_or_b32 exec_lo, exec_lo, s9
	v_or_b32_e32 v0, 0x380, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s8, v0
	s_and_saveexec_b32 s8, s12
	s_cbranch_execz .LBB50_84
; %bb.83:
	global_store_b32 v[17:18], v8, off offset:3584
.LBB50_84:                              ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPjEEvT_RA8_jjRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s8
	s_mov_b64 s[8:9], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB50_85:                              ; =>This Inner Loop Header: Depth=1
	s_mov_b32 m0, s8
	s_add_u32 s8, s8, 1
	v_movrels_b32_e32 v0, v9
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s8, 8
	ds_store_b32 v26, v0
	v_add_nc_u32_e32 v26, 4, v26
	s_cbranch_scc0 .LBB50_85
; %bb.86:
	v_dual_mov_b32 v17, v9 :: v_dual_mov_b32 v18, v10
	v_dual_mov_b32 v19, v11 :: v_dual_mov_b32 v20, v12
	v_dual_mov_b32 v21, v13 :: v_dual_mov_b32 v22, v14
	v_dual_mov_b32 v23, v15 :: v_dual_mov_b32 v24, v16
	s_mov_b64 s[8:9], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB50_87:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v0, v27
	v_add_nc_u32_e32 v27, 0x210, v27
	s_mov_b32 m0, s8
	s_add_u32 s8, s8, 1
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s8, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v17, v0
	s_cbranch_scc1 .LBB50_87
; %bb.88:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i23.i.i.i
	s_add_u32 s6, s14, s6
	s_addc_u32 s7, s15, s7
	v_add_co_u32 v0, s6, s6, v25
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s7, 0, s6
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB50_90
; %bb.89:
	global_store_b32 v[0:1], v17, off
.LBB50_90:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB50_92
; %bb.91:
	global_store_b32 v[0:1], v18, off offset:512
.LBB50_92:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB50_94
; %bb.93:
	global_store_b32 v[0:1], v19, off offset:1024
.LBB50_94:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB50_96
; %bb.95:
	global_store_b32 v[0:1], v20, off offset:1536
.LBB50_96:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB50_98
; %bb.97:
	global_store_b32 v[0:1], v21, off offset:2048
.LBB50_98:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB50_100
; %bb.99:
	global_store_b32 v[0:1], v22, off offset:2560
.LBB50_100:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB50_102
; %bb.101:
	global_store_b32 v[0:1], v23, off offset:3072
.LBB50_102:
	s_or_b32 exec_lo, exec_lo, s0
.LBB50_103:                             ; %Flow148
	s_and_saveexec_b32 s0, s12
	s_cbranch_execz .LBB50_105
; %bb.104:                              ; %_ZN7rocprim6detail16block_store_implILb1ELj128ELj8EjjE5storeIPjS4_jEEvT1_jbT_T0_RA8_jS9_RNS2_12storage_typeE.exit.sink.split.i.i
	s_lshl_b64 s[0:1], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s14, s0
	s_addc_u32 s1, s15, s1
	global_store_b32 v25, v24, s[0:1] offset:3584
.LBB50_105:                             ; %_ZN7rocprim6detail28block_merge_mergepath_kernelILj128ELj8EN6thrust10device_ptrIjEEPjS4_S5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_PKSD_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 40
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
.Lfunc_end50:
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, .Lfunc_end50-_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 6428
; NumSgprs: 30
; NumVgprs: 40
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 40
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
	.protected	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_ ; -- Begin function _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.globl	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.p2align	8
	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,@function
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_: ; @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x20
	s_lshl_b32 s12, s15, 7
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s4, s2, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s4, v0
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB51_28
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_lshr_b32 s0, s2, 7
	s_mov_b32 s13, 0
	s_cmp_lg_u32 s15, s0
	v_lshlrev_b32_e32 v1, 2, v0
	s_cselect_b32 s1, -1, 0
	s_lshl_b64 s[16:17], s[12:13], 2
	v_add_nc_u32_e32 v0, s12, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s4, s16
	s_addc_u32 s19, s5, s17
	s_add_u32 s8, s8, s16
	s_addc_u32 s9, s9, s17
	s_lshr_b32 s0, s3, 7
	s_clause 0x1
	global_load_b32 v3, v1, s[8:9]
	global_load_b32 v4, v1, s[18:19]
	s_sub_i32 s8, 0, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, s15, s8
	s_and_b32 s0, s8, s0
	s_lshl_b32 s9, s8, 7
	s_sub_i32 s8, 0, s3
	s_cmp_eq_u32 s0, 0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s14, s0, exec_lo
	s_cselect_b32 s14, s3, s8
	s_add_i32 s14, s14, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s14, s2
	s_cbranch_scc1 .LBB51_4
; %bb.2:
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB51_5
; %bb.3:                                ; %.critedge70.i
	v_mov_b32_e32 v1, 0
	s_mov_b32 s8, 0
	s_mov_b32 s13, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
	s_branch .LBB51_6
.LBB51_4:
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr1_vgpr2
	s_branch .LBB51_11
.LBB51_5:
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB51_6:                               ; %Flow33
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB51_10
; %bb.7:
	s_mov_b32 s8, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB51_9
; %bb.8:
	v_mov_b32_e32 v1, 0
	s_or_b32 s13, s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB51_9:                               ; %Flow35
	s_or_b32 exec_lo, exec_lo, s8
.LBB51_10:                              ; %Flow34
	s_mov_b32 s8, 0
.LBB51_11:                              ; %Flow32
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccz .LBB51_26
; %bb.12:
	s_min_u32 s8, s14, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s3, s8, s3
	s_min_u32 s12, s9, s8
	s_add_i32 s9, s9, s8
	s_min_u32 s2, s3, s2
	s_cmp_gt_u32 s3, s14
	v_subrev_nc_u32_e32 v0, s9, v0
	s_cselect_b32 s3, -1, 0
	s_and_b32 vcc_lo, exec_lo, s1
	v_cndmask_b32_e64 v1, 0, 1, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, s12, v0
	v_cmp_ne_u32_e64 s1, 1, v1
	s_cbranch_vccz .LBB51_18
; %bb.13:                               ; %.critedge74.i
	v_mov_b32_e32 v2, s8
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB51_17
; %bb.14:                               ; %.lr.ph.i84.i.preheader
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, s8
	s_mov_b32 s1, 0
.LBB51_15:                              ; %.lr.ph.i84.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v6
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v4, v7
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v7, v4
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v8, s0
	v_add_nc_u32_e32 v8, 1, v0
	v_and_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 1, v7
	v_cndmask_b32_e32 v6, v0, v6, vcc_lo
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v6
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB51_15
; %bb.16:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
.LBB51_17:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjS4_S5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_ENKUljE_clEj.exit90.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	s_mov_b32 s1, 0
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v4, off
	s_branch .LBB51_19
.LBB51_18:
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB51_19:                              ; %Flow30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB51_25
; %bb.20:
	v_mov_b32_e32 v2, s8
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB51_24
; %bb.21:                               ; %.lr.ph.i.i.preheader
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, s8
	s_mov_b32 s1, 0
.LBB51_22:                              ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v6
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, v4, v7
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v7, v4
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v8, s0
	v_add_nc_u32_e32 v8, 1, v0
	v_and_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 1, v7
	v_cndmask_b32_e32 v6, v0, v6, vcc_lo
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v6
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB51_22
; %bb.23:                               ; %Flow28
	s_or_b32 exec_lo, exec_lo, s1
.LBB51_24:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjS4_S5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_ENKUljE_clEj.exit.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB51_25:                              ; %Flow31
	s_mov_b32 s13, -1
.LBB51_26:                              ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s13
	s_cbranch_execz .LBB51_28
; %bb.27:                               ; %.critedge.sink.split.i
	s_waitcnt vmcnt(1)
	global_store_b32 v[1:2], v3, off
.LBB51_28:                              ; %_ZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjS4_S5_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
.Lfunc_end51:
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, .Lfunc_end51-_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 956
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
	.protected	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_ ; -- Begin function _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.globl	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
	.p2align	8
	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,@function
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_: ; @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
; %bb.0:
	s_load_b64 s[4:5], s[0:1], 0x8
	v_lshl_or_b32 v0, s15, 7, v0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s5, v0
	s_cbranch_execz .LBB52_6
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s3, 9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, s5, 0x7ffffe
	s_sub_i32 s6, 0, s5
	s_add_i32 s5, s5, -1
	v_and_b32_e32 v1, s6, v0
	v_and_b32_e32 v5, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 10, v1
	v_add_nc_u32_e32 v2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v4, s4, v2
	v_min_u32_e32 v2, s4, v1
	v_add_nc_u32_e32 v3, s3, v4
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, s4, v3
	v_lshlrev_b32_e32 v3, 10, v5
	v_sub_nc_u32_e32 v5, v1, v2
	v_sub_nc_u32_e32 v6, v1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, v5, v3
	v_sub_nc_u32_e32 v3, v4, v2
	v_sub_nc_u32_e64 v6, v1, v6 clamp
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v7, v1, v3
	v_cmpx_lt_u32_e64 v6, v7
	s_cbranch_execz .LBB52_5
; %bb.2:                                ; %.lr.ph.i.preheader
	s_load_b64 s[4:5], s[0:1], 0x0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v5
	v_lshlrev_b64 v[10:11], 2, v[4:5]
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v11, vcc_lo
	s_mov_b32 s4, 0
.LBB52_3:                               ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v4, v7, v6
	v_mov_b32_e32 v12, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 1, v4
	v_xad_u32 v11, v4, -1, v1
	v_lshlrev_b64 v[13:14], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v13, vcc_lo, v3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v8, v14, vcc_lo
	v_add_co_u32 v11, vcc_lo, v9, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, v10, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v12, s2, v13
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v11, s2, v11
	v_add_nc_u32_e32 v13, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, v12, v11
	v_dual_cndmask_b32 v7, v7, v4 :: v_dual_cndmask_b32 v6, v13, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v6, v7
	s_or_b32 s4, vcc_lo, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB52_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s4
.LBB52_5:                               ; %Flow58
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v6, v2
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB52_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_,comdat
.Lfunc_end52:
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_, .Lfunc_end52-_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 480
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
	.protected	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_ ; -- Begin function _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.globl	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.p2align	8
	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,@function
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_: ; @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[16:19], s[0:1], 0x20
	s_load_b64 s[2:3], s[0:1], 0x30
	s_mov_b32 s22, s15
	s_mov_b32 s23, 0
	v_lshlrev_b32_e32 v25, 2, v0
	s_mov_b32 s7, s23
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s28, s16, 10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s15, s28
	s_cselect_b32 s19, -1, 0
	s_lshl_b64 s[4:5], s[22:23], 2
	s_add_u32 s4, s2, s4
	s_addc_u32 s5, s3, s5
	s_add_i32 s6, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[6:7], s[6:7], 2
	s_add_u32 s2, s2, s6
	s_addc_u32 s3, s3, s7
	s_clause 0x1
	s_load_b32 s4, s[4:5], 0x0
	s_load_b32 s2, s[2:3], 0x0
	s_load_b256 s[8:15], s[0:1], 0x0
	s_lshr_b32 s3, s17, 9
	s_load_b64 s[26:27], s[0:1], 0x44
	s_and_b32 s0, s3, 0x7ffffe
	s_lshl_b32 s20, s22, 10
	s_sub_i32 s1, 0, s0
	s_add_i32 s0, s0, -1
	s_and_b32 s1, s22, s1
	s_and_b32 s3, s0, s22
	s_lshl_b32 s6, s1, 11
	s_lshl_b32 s1, s1, 10
	s_add_i32 s6, s6, s17
	s_sub_i32 s7, s20, s1
	s_sub_i32 s1, s6, s1
	s_add_i32 s6, s6, s7
	s_min_u32 s21, s16, s1
	s_add_i32 s1, s1, s17
	s_mov_b32 s5, s23
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s7, s6, s4
	s_sub_i32 s17, s6, s2
	s_min_u32 s6, s16, s7
	s_addk_i32 s17, 0x400
	s_cmp_eq_u32 s0, s3
	s_mov_b32 s7, s23
	s_cselect_b32 s0, s1, s17
	s_cselect_b32 s1, s21, s2
	s_lshl_b64 s[2:3], s[4:5], 2
	s_min_u32 s25, s0, s16
	s_sub_i32 s17, s1, s4
	s_add_u32 s21, s8, s2
	s_addc_u32 s24, s9, s3
	s_lshl_b64 s[4:5], s[6:7], 2
	s_mov_b32 s0, -1
	s_add_u32 s8, s8, s4
	s_addc_u32 s9, s9, s5
	s_lshr_b32 s7, s26, 16
	s_and_b32 s26, s26, 0xffff
	s_and_b32 s1, s27, 0xffff
	s_mul_i32 s7, s26, s7
	s_cmp_eq_u32 s22, s28
	s_mul_i32 s7, s7, s1
	s_cbranch_scc1 .LBB53_2
; %bb.1:                                ; %.preheader36.i.i.i
	v_mov_b32_e32 v4, 0
	v_subrev_nc_u32_e32 v3, s17, v0
	v_add_co_u32 v7, s0, s21, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, null, s24, 0, s0
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_add_nc_u32_e32 v3, s7, v0
	s_mov_b32 s23, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v9, vcc_lo, s21, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, s24, v6, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_add_co_u32 v5, s0, s8, v1
	v_add_co_ci_u32_e64 v6, s0, s9, v2, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_cmp_gt_u32_e64 s0, s17, v0
	v_lshl_add_u32 v3, s7, 1, v0
	v_cndmask_b32_e64 v6, v6, v8, s0
	v_cndmask_b32_e64 v5, v5, v7, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_add_co_u32 v11, s0, s8, v1
	v_add_co_ci_u32_e64 v2, s0, s9, v2, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s21, v7
	v_add_co_ci_u32_e64 v14, s0, s24, v8, s0
	v_mad_u64_u32 v[7:8], null, s7, 3, v[0:1]
	global_load_b32 v1, v[5:6], off
	v_cmp_gt_u32_e64 s0, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_mov_b32_e32 v8, v4
	v_dual_cndmask_b32 v10, v2, v10 :: v_dual_cndmask_b32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v7
	v_lshlrev_b64 v[11:12], 2, v[7:8]
	global_load_b32 v2, v[9:10], off
	v_add_co_u32 v15, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v16, vcc_lo, s9, v6, vcc_lo
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_lshl_add_u32 v3, s7, 2, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v8, v15, v13, s0
	v_cndmask_b32_e64 v9, v16, v14, s0
	v_add_co_u32 v15, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[3:4]
	v_add_co_ci_u32_e32 v12, vcc_lo, s24, v12, vcc_lo
	v_add_co_u32 v18, vcc_lo, s21, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v16, vcc_lo, s24, v14, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v3
	v_subrev_nc_u32_e32 v3, s17, v3
	v_add_co_u32 v14, s0, s8, v5
	v_add_co_ci_u32_e64 v13, s0, s9, v6, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_cmp_gt_u32_e64 s0, s17, v7
	v_cndmask_b32_e64 v13, v13, v12, s0
	v_cndmask_b32_e64 v12, v14, v15, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v19, s0, s8, v5
	v_add_co_ci_u32_e64 v7, s0, s9, v6, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v16, vcc_lo
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[10:11], null, s7, 5, v[0:1]
	v_mov_b32_e32 v11, v4
	v_mad_u64_u32 v[14:15], null, s7, 6, v[0:1]
	v_mov_b32_e32 v15, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[10:11]
	v_subrev_nc_u32_e32 v3, s17, v10
	v_lshlrev_b64 v[16:17], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_co_u32 v20, s0, s21, v5
	v_subrev_nc_u32_e32 v3, s17, v14
	v_add_co_ci_u32_e64 v11, s0, s24, v6, s0
	v_lshlrev_b64 v[5:6], 2, v[14:15]
	v_add_co_u32 v15, s0, s8, v16
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_ci_u32_e64 v16, s0, s9, v17, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s1, s21, v5
	v_add_co_ci_u32_e64 v17, s1, s24, v6, s1
	v_cndmask_b32_e32 v6, v19, v18, vcc_lo
	v_add_co_u32 v3, s1, s8, v3
	v_cmp_gt_u32_e64 s0, s17, v10
	v_add_co_ci_u32_e64 v4, s1, s9, v4, s1
	v_cmp_gt_u32_e64 s1, s17, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, v16, v11, s0
	v_cndmask_b32_e64 v10, v15, v20, s0
	s_mov_b32 s0, 0
	v_cndmask_b32_e64 v15, v4, v17, s1
	v_cndmask_b32_e64 v14, v3, v5, s1
	global_load_b32 v3, v[8:9], off
	global_load_b32 v4, v[12:13], off
	global_load_b32 v5, v[6:7], off
	global_load_b32 v6, v[10:11], off
	global_load_b32 v7, v[14:15], off
	v_mad_u64_u32 v[9:10], null, s7, 7, v[0:1]
	s_branch .LBB53_3
.LBB53_2:
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
                                        ; implicit-def: $vgpr9
.LBB53_3:                               ; %Flow161
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_sub_i32 s6, s25, s6
	s_cbranch_vccnz .LBB53_19
; %bb.4:                                ; %.preheader.i.i.i
	s_add_i32 s1, s6, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB53_6
; %bb.5:
	v_subrev_nc_u32_e32 v1, s17, v0
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, s22, s21, v25
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(3)
	v_add_co_ci_u32_e64 v4, null, s24, 0, s22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v2, v2, v4
	global_load_b32 v1, v[1:2], off
.LBB53_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, s7, v0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB53_8
; %bb.7:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v2, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s24, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v2 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v2, v[9:10], off
.LBB53_8:
	s_or_b32 exec_lo, exec_lo, s22
	v_lshl_add_u32 v9, s7, 1, v0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB53_10
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s24, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v3, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v3, v[9:10], off
.LBB53_10:
	s_or_b32 exec_lo, exec_lo, s22
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, s7, 3, v[0:1]
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB53_12
; %bb.11:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v4, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s24, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v4 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v4, v[9:10], off
.LBB53_12:
	s_or_b32 exec_lo, exec_lo, s22
	v_lshl_add_u32 v9, s7, 2, v0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB53_14
; %bb.13:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v5, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s24, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v5 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v5, v[9:10], off
.LBB53_14:
	s_or_b32 exec_lo, exec_lo, s22
	v_mad_u64_u32 v[9:10], null, s7, 5, v[0:1]
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB53_16
; %bb.15:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v6, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s24, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v6 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v6, v[9:10], off
.LBB53_16:
	s_or_b32 exec_lo, exec_lo, s22
	v_mad_u64_u32 v[9:10], null, s7, 6, v[0:1]
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB53_18
; %bb.17:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v7, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s24, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v7, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v7, v[9:10], off
.LBB53_18:
	s_or_b32 exec_lo, exec_lo, s22
	v_mad_u64_u32 v[9:10], null, s7, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s23, s1, v9
.LBB53_19:                              ; %Flow162
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s23
	s_cbranch_execz .LBB53_21
; %bb.20:                               ; %_ZN7rocprim6detail11gmem_to_regILj8EjPjEEvRAT__T0_T1_S6_jjb.exit.sink.split.i.i
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v11, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v12, vcc_lo, s24, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[8:9], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s0, s8, v8
	v_add_co_ci_u32_e64 v9, s0, s9, v9, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v8, v8, v11 :: v_dual_cndmask_b32 v9, v9, v12
	global_load_b32 v8, v[8:9], off
.LBB53_21:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EjPjEEvRAT__T0_T1_S6_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s1
	v_cndmask_b32_e64 v19, 0, 1, s19
	s_add_u32 s9, s12, s2
	s_addc_u32 s21, s13, s3
	s_add_u32 s2, s12, s4
	s_addc_u32 s3, s13, s5
	s_and_not1_b32 vcc_lo, exec_lo, s19
	s_waitcnt vmcnt(5)
	ds_store_2addr_stride64_b32 v25, v1, v2 offset1:2
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v25, v3, v4 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v25, v5, v6 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v25, v7, v8 offset0:12 offset1:14
	s_cbranch_vccnz .LBB53_23
; %bb.22:                               ; %.preheader36.i93.i.i
	v_mov_b32_e32 v13, 0
	v_subrev_nc_u32_e32 v12, s17, v0
	v_add_co_u32 v18, s0, s9, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v21, null, s21, 0, s0
	v_lshlrev_b64 v[9:10], 2, v[12:13]
	v_add_nc_u32_e32 v12, s7, v0
	v_cmp_gt_u32_e64 s1, s17, v0
	v_mad_u64_u32 v[28:29], null, s7, 6, v[0:1]
	v_mov_b32_e32 v29, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[14:15], 2, v[12:13]
	v_add_co_u32 v9, s0, s2, v9
	v_add_co_ci_u32_e64 v10, s0, s3, v10, s0
	s_add_i32 s8, s6, s17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v11, vcc_lo, s9, v14
	v_add_co_ci_u32_e32 v20, vcc_lo, s21, v15, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v12
	v_subrev_nc_u32_e32 v12, s17, v12
	v_cndmask_b32_e64 v10, v10, v21, s1
	v_cndmask_b32_e64 v9, v9, v18, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[14:15], 2, v[12:13]
	v_lshl_add_u32 v12, s7, 1, v0
	v_lshlrev_b64 v[16:17], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v14, s1, s2, v14
	v_add_co_ci_u32_e64 v15, s1, s3, v15, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v22, s0, s9, v16
	v_add_co_ci_u32_e64 v23, s0, s21, v17, s0
	v_mad_u64_u32 v[16:17], null, s7, 3, v[0:1]
	v_cmp_gt_u32_e64 s0, s17, v12
	v_subrev_nc_u32_e32 v12, s17, v12
	v_dual_cndmask_b32 v15, v15, v20 :: v_dual_cndmask_b32 v14, v14, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[17:18], 2, v[12:13]
	v_subrev_nc_u32_e32 v12, s17, v16
	v_lshlrev_b64 v[20:21], 2, v[12:13]
	v_lshl_add_u32 v12, s7, 2, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s1, s2, v17
	v_add_co_ci_u32_e64 v18, s1, s3, v18, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[26:27], 2, v[12:13]
	v_cndmask_b32_e64 v22, v17, v22, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v23, v18, v23, s0
	global_load_b32 v9, v[9:10], off
	global_load_b32 v10, v[14:15], off
	global_load_b32 v11, v[22:23], off
	v_add_co_u32 v24, vcc_lo, s9, v26
	v_add_co_ci_u32_e32 v22, vcc_lo, s21, v27, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v12
	v_mov_b32_e32 v17, v13
	v_subrev_nc_u32_e32 v12, s17, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[14:15], 2, v[16:17]
	v_mad_u64_u32 v[17:18], null, s7, 5, v[0:1]
	v_mov_b32_e32 v18, v13
	v_add_co_u32 v23, s0, s9, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v26, s0, s21, v15, s0
	v_lshlrev_b64 v[14:15], 2, v[12:13]
	v_add_co_u32 v20, s0, s2, v20
	v_add_co_ci_u32_e64 v12, s0, s3, v21, s0
	v_cmp_gt_u32_e64 s0, s17, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v16, s1, s2, v14
	v_add_co_ci_u32_e64 v21, s1, s3, v15, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v15, v12, v26, s0
	v_subrev_nc_u32_e32 v12, s17, v17
	v_cndmask_b32_e64 v14, v20, v23, s0
	v_dual_cndmask_b32 v20, v16, v24 :: v_dual_cndmask_b32 v21, v21, v22
	v_lshlrev_b64 v[22:23], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[26:27], 2, v[12:13]
	v_subrev_nc_u32_e32 v12, s17, v28
	v_add_co_u32 v16, vcc_lo, s9, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v18, vcc_lo, s21, v23, vcc_lo
	v_add_co_u32 v24, vcc_lo, s2, v26
	v_add_co_ci_u32_e32 v30, vcc_lo, s3, v27, vcc_lo
	v_mad_u64_u32 v[26:27], null, s7, 7, v[0:1]
	v_lshlrev_b64 v[22:23], 2, v[28:29]
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_dual_mov_b32 v27, v13 :: v_dual_cndmask_b32 v16, v24, v16
	v_cndmask_b32_e32 v17, v30, v18, vcc_lo
	v_lshlrev_b64 v[29:30], 2, v[12:13]
	v_add_co_u32 v18, s0, s9, v22
	v_subrev_nc_u32_e32 v12, s17, v26
	v_add_co_ci_u32_e64 v31, s0, s21, v23, s0
	v_lshlrev_b64 v[22:23], 2, v[26:27]
	v_add_co_u32 v27, s0, s2, v29
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_ci_u32_e64 v29, s0, s3, v30, s0
	v_cmp_gt_u32_e64 s0, s17, v28
	v_add_co_u32 v28, s1, s9, v22
	v_add_co_ci_u32_e64 v30, s1, s21, v23, s1
	v_add_co_u32 v12, s1, s2, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v13, s1, s3, v13, s1
	v_cmp_gt_u32_e64 s1, s17, v26
	v_cndmask_b32_e64 v23, v29, v31, s0
	v_cndmask_b32_e64 v22, v27, v18, s0
	s_mov_b32 s0, 0
	v_cndmask_b32_e64 v27, v13, v30, s1
	v_cndmask_b32_e64 v26, v12, v28, s1
	global_load_b32 v12, v[14:15], off
	global_load_b32 v13, v[20:21], off
	global_load_b32 v14, v[16:17], off
	global_load_b32 v15, v[22:23], off
	global_load_b32 v16, v[26:27], off
	s_branch .LBB53_24
.LBB53_23:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $sgpr8
.LBB53_24:                              ; %Flow159
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB53_42
; %bb.25:                               ; %.preheader.i102.i.i
	s_add_i32 s8, s6, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
	v_cmpx_gt_u32_e64 s8, v0
	s_cbranch_execz .LBB53_27
; %bb.26:
	s_waitcnt vmcnt(7)
	v_subrev_nc_u32_e32 v9, s17, v0
	s_waitcnt vmcnt(5)
	v_add_co_u32 v11, s1, s9, v25
	v_mov_b32_e32 v10, 0
	s_waitcnt vmcnt(4)
	v_add_co_ci_u32_e64 v12, null, s21, 0, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v9, v9, v11 :: v_dual_cndmask_b32 v10, v10, v12
	global_load_b32 v9, v[9:10], off
.LBB53_27:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v17, s7, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v17
	s_cbranch_execz .LBB53_29
; %bb.28:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(6)
	v_add_co_u32 v10, vcc_lo, s9, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s21, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s2, v17
	v_add_co_ci_u32_e64 v18, s0, s3, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v10 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v10, v[17:18], off
.LBB53_29:
	s_or_b32 exec_lo, exec_lo, s1
	v_lshl_add_u32 v17, s7, 1, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v17
	s_cbranch_execz .LBB53_31
; %bb.30:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v11, vcc_lo, s9, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s21, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s2, v17
	v_add_co_ci_u32_e64 v18, s0, s3, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v11 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v11, v[17:18], off
.LBB53_31:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[17:18], null, s7, 3, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v17
	s_cbranch_execz .LBB53_33
; %bb.32:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v12, vcc_lo, s9, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s21, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s2, v17
	v_add_co_ci_u32_e64 v18, s0, s3, v18, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v17, v17, v12, vcc_lo
	v_cndmask_b32_e32 v18, v18, v20, vcc_lo
	global_load_b32 v12, v[17:18], off
.LBB53_33:
	s_or_b32 exec_lo, exec_lo, s1
	v_lshl_add_u32 v17, s7, 2, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v17
	s_cbranch_execz .LBB53_35
; %bb.34:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(3)
	v_add_co_u32 v13, vcc_lo, s9, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s21, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s2, v17
	v_add_co_ci_u32_e64 v18, s0, s3, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v13 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v13, v[17:18], off
.LBB53_35:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[17:18], null, s7, 5, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v17
	s_cbranch_execz .LBB53_37
; %bb.36:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v14, vcc_lo, s9, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s21, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s2, v17
	v_add_co_ci_u32_e64 v18, s0, s3, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v14 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v14, v[17:18], off
.LBB53_37:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[17:18], null, s7, 6, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v17
	s_cbranch_execz .LBB53_39
; %bb.38:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v15, vcc_lo, s9, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s21, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s2, v17
	v_add_co_ci_u32_e64 v18, s0, s3, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v15 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v15, v[17:18], off
.LBB53_39:
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[17:18], null, s7, 7, v[0:1]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v17
	s_cbranch_execz .LBB53_41
; %bb.40:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	v_add_co_u32 v20, vcc_lo, s9, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v21, vcc_lo, s21, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[16:17], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v16, s0, s2, v16
	v_add_co_ci_u32_e64 v17, s0, s3, v17, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v16, v16, v20 :: v_dual_cndmask_b32 v17, v17, v21
	global_load_b32 v16, v[16:17], off
.LBB53_41:                              ; %Flow158
	s_or_b32 exec_lo, exec_lo, s1
.LBB53_42:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EjPjEEvRAT__T0_T1_S6_jjb.exit111.i.i
	v_lshlrev_b32_e32 v17, 3, v0
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_min_u32_e32 v18, s8, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e64 v24, v18, s6 clamp
	v_min_u32_e32 v20, s17, v18
	v_cmpx_lt_u32_e64 v24, v20
	s_cbranch_execz .LBB53_46
; %bb.43:                               ; %.lr.ph.i.preheader.i.i
	v_lshlrev_b32_e32 v21, 2, v18
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v21, s17, 2, v21
.LBB53_44:                              ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v22, v20, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v22, 1, v22
	v_not_b32_e32 v23, v22
	v_lshlrev_b32_e32 v26, 2, v22
	v_add_nc_u32_e32 v27, 1, v22
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v23, v23, 2, v21
	ds_load_b32 v26, v26
	ds_load_b32 v23, v23
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v26, s18, v26
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v23, s18, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, v26, v23
	v_cndmask_b32_e32 v20, v20, v22, vcc_lo
	v_cndmask_b32_e32 v24, v27, v24, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v24, v20
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB53_44
; %bb.45:                               ; %Flow156
	s_or_b32 exec_lo, exec_lo, s1
.LBB53_46:                              ; %Flow157
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s0
	v_sub_nc_u32_e32 v18, v18, v24
	v_cmp_ge_u32_e32 vcc_lo, s17, v24
                                        ; implicit-def: $vgpr29
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $vgpr26
                                        ; implicit-def: $vgpr23
                                        ; implicit-def: $vgpr22
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $vgpr20
	v_add_nc_u32_e32 v28, s17, v18
                                        ; implicit-def: $vgpr18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_u32_e64 s0, s8, v28
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB53_52
; %bb.47:                               ; %._crit_edge.i.i.i.i
	v_cmp_gt_u32_e32 vcc_lo, s17, v24
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB53_49
; %bb.48:
	v_lshlrev_b32_e32 v1, 2, v24
	ds_load_b32 v1, v1
.LBB53_49:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_le_u32_e64 s0, s8, v28
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_gt_u32_e64 s8, v28
	s_cbranch_execz .LBB53_51
; %bb.50:
	v_lshlrev_b32_e32 v2, 2, v28
	ds_load_b32 v2, v2
.LBB53_51:                              ; %.loopexit.loopexit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v3, s18, v2
	v_and_b32_e32 v4, s18, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s1, v4, v3
	v_mov_b32_e32 v3, s17
	s_and_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 vcc_lo, s0, s1
	v_cndmask_b32_e32 v18, v28, v24, vcc_lo
	v_dual_cndmask_b32 v4, s8, v3 :: v_dual_add_nc_u32 v5, 1, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v7, v24, v5 :: v_dual_add_nc_u32 v4, -1, v4
	v_min_u32_e32 v4, v5, v4
	v_cndmask_b32_e32 v5, v5, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s0, s17, v7
	v_lshlrev_b32_e32 v4, 2, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s2, s8, v5
	ds_load_b32 v4, v4
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v6, v4, v2, vcc_lo
	v_dual_cndmask_b32 v4, v1, v4 :: v_dual_cndmask_b32 v1, v2, v1
	v_and_b32_e32 v8, s18, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v20, s18, v4
	v_cmp_le_u32_e64 s1, v20, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_or_b32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v20, v5, v7, s0
	v_cndmask_b32_e64 v8, s8, v3, s0
	v_add_nc_u32_e32 v21, 1, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, -1, v8
	v_cndmask_b32_e64 v7, v7, v21, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v8, v21, v8
	v_cndmask_b32_e64 v5, v21, v5, s0
	v_cmp_gt_u32_e64 s1, s17, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v8, 2, v8
	v_cmp_le_u32_e64 s3, s8, v5
	ds_load_b32 v8, v8
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v24, v8, v6, s0
	v_cndmask_b32_e64 v8, v4, v8, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v22, s18, v24
	v_and_b32_e32 v23, s18, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s2, v23, v22
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s3, s1
	v_cndmask_b32_e64 v21, v5, v7, s1
	v_cndmask_b32_e64 v22, s8, v3, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v23, 1, v21
	v_add_nc_u32_e32 v22, -1, v22
	v_cndmask_b32_e64 v2, v6, v4, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v7, v7, v23, s1
	v_min_u32_e32 v22, v23, v22
	v_cndmask_b32_e64 v5, v23, v5, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s2, s17, v7
	v_lshlrev_b32_e32 v22, 2, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s4, s8, v5
	ds_load_b32 v22, v22
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v28, v22, v24, s1
	v_cndmask_b32_e64 v29, v8, v22, s1
	v_and_b32_e32 v22, s18, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v26, s18, v29
	v_cmp_le_u32_e64 s3, v26, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_or_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v22, v5, v7, s2
	v_cndmask_b32_e64 v23, s8, v3, s2
	v_cndmask_b32_e64 v4, v28, v29, s2
	v_add_nc_u32_e32 v26, 1, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v23, -1, v23
	v_cndmask_b32_e64 v7, v7, v26, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v23, v26, v23
	v_cndmask_b32_e64 v5, v26, v5, s2
	v_cmp_gt_u32_e64 s3, s17, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v23, 2, v23
	v_cmp_le_u32_e64 s5, s8, v5
	ds_load_b32 v23, v23
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v30, v23, v28, s2
	v_cndmask_b32_e64 v31, v29, v23, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v23, s18, v30
	v_and_b32_e32 v27, s18, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s4, v27, v23
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s5, s3
	v_cndmask_b32_e64 v23, v5, v7, s3
	v_cndmask_b32_e64 v26, s8, v3, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v27, 1, v23
	v_add_nc_u32_e32 v26, -1, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v27, s3
	v_min_u32_e32 v26, v27, v26
	v_cndmask_b32_e64 v5, v27, v5, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s4, s17, v7
	v_lshlrev_b32_e32 v26, 2, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s6, s8, v5
	ds_load_b32 v26, v26
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v32, v26, v30, s3
	v_cndmask_b32_e64 v33, v31, v26, s3
	v_and_b32_e32 v26, s18, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v34, s18, v33
	v_cmp_le_u32_e64 s5, v34, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, s5
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v5, v7, s4
	v_cndmask_b32_e64 v27, s8, v3, s4
	v_cndmask_b32_e64 v6, v32, v33, s4
	v_add_nc_u32_e32 v34, 1, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v27, -1, v27
	v_cndmask_b32_e64 v7, v7, v34, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v27, v34, v27
	v_cndmask_b32_e64 v5, v34, v5, s4
	v_cmp_gt_u32_e64 s5, s17, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v27, 2, v27
	v_cmp_le_u32_e64 s7, s8, v5
	ds_load_b32 v27, v27
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v35, v27, v32, s4
	v_cndmask_b32_e64 v36, v33, v27, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v27, s18, v35
	v_and_b32_e32 v37, s18, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s6, v37, v27
	s_and_b32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s7, s5
	v_cndmask_b32_e64 v27, v5, v7, s5
	v_cndmask_b32_e64 v3, s8, v3, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v34, 1, v27
	v_add_nc_u32_e32 v3, -1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v39, v7, v34, s5
	v_min_u32_e32 v3, v34, v3
	v_cndmask_b32_e64 v34, v34, v5, s5
	v_cndmask_b32_e64 v5, v30, v31, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_gt_u32_e32 vcc_lo, s17, v39
	v_lshlrev_b32_e32 v3, 2, v3
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v37, v3, v35, s5
	v_cndmask_b32_e64 v38, v36, v3, s5
	v_cndmask_b32_e64 v3, v24, v8, s1
	v_cmp_le_u32_e64 s1, s8, v34
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_and_b32_e32 v7, s18, v37
	v_and_b32_e32 v40, s18, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e64 s0, v40, v7
	v_cndmask_b32_e64 v7, v35, v36, s5
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 vcc_lo, s1, s0
	v_dual_cndmask_b32 v8, v37, v38 :: v_dual_cndmask_b32 v29, v34, v39
.LBB53_52:                              ; %Flow154
	s_or_b32 exec_lo, exec_lo, s9
	s_barrier
	buffer_gl0_inv
	ds_store_2addr_stride64_b32 v25, v9, v10 offset1:2
	ds_store_2addr_stride64_b32 v25, v11, v12 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v25, v13, v14 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v25, v15, v16 offset0:12 offset1:14
	v_lshlrev_b32_e32 v9, 2, v18
	v_lshlrev_b32_e32 v10, 2, v20
	v_lshlrev_b32_e32 v11, 2, v21
	v_lshlrev_b32_e32 v12, 2, v22
	v_lshlrev_b32_e32 v13, 2, v23
	v_lshlrev_b32_e32 v14, 2, v26
	v_lshlrev_b32_e32 v15, 2, v27
	v_lshlrev_b32_e32 v16, 2, v29
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v9, v9
	ds_load_b32 v10, v10
	ds_load_b32 v11, v11
	ds_load_b32 v12, v12
	ds_load_b32 v13, v13
	ds_load_b32 v14, v14
	ds_load_b32 v15, v15
	ds_load_b32 v16, v16
	v_and_b32_e32 v18, 0x7c, v0
	v_cmp_ne_u32_e32 vcc_lo, 1, v19
	s_mov_b32 s21, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	v_lshl_add_u32 v26, v17, 2, v18
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB53_62
; %bb.53:                               ; %.preheader171.i.i.preheader
	v_mov_b32_e32 v17, v26
	s_mov_b64 s[0:1], 0
.LBB53_54:                              ; %.preheader171.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v18, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v17, v18
	v_add_nc_u32_e32 v17, 4, v17
	s_cbranch_scc0 .LBB53_54
; %bb.55:
	v_lshrrev_b32_e32 v17, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_lshl_u32 v27, v0, v17, 2
	v_dual_mov_b32 v24, v8 :: v_dual_mov_b32 v23, v7
	v_dual_mov_b32 v22, v6 :: v_dual_mov_b32 v19, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v28, v27 :: v_dual_mov_b32 v21, v5
	v_dual_mov_b32 v20, v4 :: v_dual_mov_b32 v17, v1
	v_mov_b32_e32 v18, v2
.LBB53_56:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v29, v28
	v_add_nc_u32_e32 v28, 0x210, v28
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v17, v29
	s_cbranch_scc1 .LBB53_56
; %bb.57:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_lshl_b64 s[0:1], s[20:21], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s10, s0
	s_addc_u32 s3, s11, s1
	s_clause 0x7
	global_store_b32 v25, v17, s[2:3]
	global_store_b32 v25, v18, s[2:3] offset:512
	global_store_b32 v25, v19, s[2:3] offset:1024
	global_store_b32 v25, v20, s[2:3] offset:1536
	global_store_b32 v25, v21, s[2:3] offset:2048
	global_store_b32 v25, v22, s[2:3] offset:2560
	global_store_b32 v25, v23, s[2:3] offset:3072
	global_store_b32 v25, v24, s[2:3] offset:3584
	v_mov_b32_e32 v17, v26
	s_mov_b64 s[2:3], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB53_58:                              ; =>This Inner Loop Header: Depth=1
	s_mov_b32 m0, s2
	s_add_u32 s2, s2, 1
	v_movrels_b32_e32 v18, v9
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 8
	ds_store_b32 v17, v18
	v_add_nc_u32_e32 v17, 4, v17
	s_cbranch_scc0 .LBB53_58
; %bb.59:
	v_dual_mov_b32 v17, v9 :: v_dual_mov_b32 v18, v10
	v_dual_mov_b32 v19, v11 :: v_dual_mov_b32 v20, v12
	v_dual_mov_b32 v21, v13 :: v_dual_mov_b32 v22, v14
	v_dual_mov_b32 v23, v15 :: v_dual_mov_b32 v24, v16
	s_mov_b64 s[2:3], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB53_60:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v28, v27
	v_add_nc_u32_e32 v27, 0x210, v27
	s_mov_b32 m0, s2
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v17, v28
	s_cbranch_scc1 .LBB53_60
; %bb.61:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit34.i.i.i
	s_add_u32 s2, s14, s0
	s_addc_u32 s3, s15, s1
	s_mov_b32 s0, 0
	s_mov_b32 s12, -1
	s_clause 0x6
	global_store_b32 v25, v17, s[2:3]
	global_store_b32 v25, v18, s[2:3] offset:512
	global_store_b32 v25, v19, s[2:3] offset:1024
	global_store_b32 v25, v20, s[2:3] offset:1536
	global_store_b32 v25, v21, s[2:3] offset:2048
	global_store_b32 v25, v22, s[2:3] offset:2560
	global_store_b32 v25, v23, s[2:3] offset:3072
	s_branch .LBB53_63
.LBB53_62:
	s_mov_b32 s0, -1
	s_mov_b32 s12, s21
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24
.LBB53_63:                              ; %Flow
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB53_103
; %bb.64:                               ; %.preheader.i.i.preheader
	v_mov_b32_e32 v17, v26
	s_mov_b64 s[0:1], 0
.LBB53_65:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v18, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v17, v18
	v_add_nc_u32_e32 v17, 4, v17
	s_cbranch_scc0 .LBB53_65
; %bb.66:
	v_lshrrev_b32_e32 v17, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_lshl_u32 v27, v0, v17, 2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v17, v27
.LBB53_67:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v18, v17
	v_add_nc_u32_e32 v17, 0x210, v17
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v1, v18
	s_cbranch_scc1 .LBB53_67
; %bb.68:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[6:7], s[20:21], 2
	s_sub_i32 s8, s16, s20
	s_add_u32 s0, s10, s6
	s_addc_u32 s1, s11, s7
	v_add_co_u32 v17, s0, s0, v25
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v18, null, s1, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s8, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB53_70
; %bb.69:
	global_store_b32 v[17:18], v1, off
.LBB53_70:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v1, 0x80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s8, v1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB53_72
; %bb.71:
	global_store_b32 v[17:18], v2, off offset:512
.LBB53_72:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v1, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s8, v1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB53_74
; %bb.73:
	global_store_b32 v[17:18], v3, off offset:1024
.LBB53_74:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v1, 0x180, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s8, v1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB53_76
; %bb.75:
	global_store_b32 v[17:18], v4, off offset:1536
.LBB53_76:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v1, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s8, v1
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB53_78
; %bb.77:
	global_store_b32 v[17:18], v5, off offset:2048
.LBB53_78:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v1, 0x280, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s8, v1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB53_80
; %bb.79:
	global_store_b32 v[17:18], v6, off offset:2560
.LBB53_80:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v1, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s8, v1
	s_and_saveexec_b32 s9, s5
	s_cbranch_execz .LBB53_82
; %bb.81:
	global_store_b32 v[17:18], v7, off offset:3072
.LBB53_82:
	s_or_b32 exec_lo, exec_lo, s9
	v_or_b32_e32 v0, 0x380, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s8, v0
	s_and_saveexec_b32 s8, s12
	s_cbranch_execz .LBB53_84
; %bb.83:
	global_store_b32 v[17:18], v8, off offset:3584
.LBB53_84:                              ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jjRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s8
	s_mov_b64 s[8:9], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB53_85:                              ; =>This Inner Loop Header: Depth=1
	s_mov_b32 m0, s8
	s_add_u32 s8, s8, 1
	v_movrels_b32_e32 v0, v9
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s8, 8
	ds_store_b32 v26, v0
	v_add_nc_u32_e32 v26, 4, v26
	s_cbranch_scc0 .LBB53_85
; %bb.86:
	v_dual_mov_b32 v17, v9 :: v_dual_mov_b32 v18, v10
	v_dual_mov_b32 v19, v11 :: v_dual_mov_b32 v20, v12
	v_dual_mov_b32 v21, v13 :: v_dual_mov_b32 v22, v14
	v_dual_mov_b32 v23, v15 :: v_dual_mov_b32 v24, v16
	s_mov_b64 s[8:9], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB53_87:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v0, v27
	v_add_nc_u32_e32 v27, 0x210, v27
	s_mov_b32 m0, s8
	s_add_u32 s8, s8, 1
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s8, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v17, v0
	s_cbranch_scc1 .LBB53_87
; %bb.88:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i22.i.i.i
	s_add_u32 s6, s14, s6
	s_addc_u32 s7, s15, s7
	v_add_co_u32 v0, s6, s6, v25
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s7, 0, s6
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB53_90
; %bb.89:
	global_store_b32 v[0:1], v17, off
.LBB53_90:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB53_92
; %bb.91:
	global_store_b32 v[0:1], v18, off offset:512
.LBB53_92:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB53_94
; %bb.93:
	global_store_b32 v[0:1], v19, off offset:1024
.LBB53_94:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB53_96
; %bb.95:
	global_store_b32 v[0:1], v20, off offset:1536
.LBB53_96:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB53_98
; %bb.97:
	global_store_b32 v[0:1], v21, off offset:2048
.LBB53_98:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB53_100
; %bb.99:
	global_store_b32 v[0:1], v22, off offset:2560
.LBB53_100:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB53_102
; %bb.101:
	global_store_b32 v[0:1], v23, off offset:3072
.LBB53_102:
	s_or_b32 exec_lo, exec_lo, s0
.LBB53_103:                             ; %Flow152
	s_and_saveexec_b32 s0, s12
	s_cbranch_execz .LBB53_105
; %bb.104:                              ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIN6thrust10device_ptrIjEEEEvT_RA8_jjRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit23.sink.split.i.i.i
	s_lshl_b64 s[0:1], s[20:21], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s14, s0
	s_addc_u32 s1, s15, s1
	global_store_b32 v25, v24, s[0:1] offset:3584
.LBB53_105:                             ; %_ZN7rocprim6detail28block_merge_mergepath_kernelILj128ELj8EPjN6thrust10device_ptrIjEES2_S5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_PKSD_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 41
		.amdhsa_next_free_sgpr 29
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
.Lfunc_end53:
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, .Lfunc_end53-_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 6704
; NumSgprs: 31
; NumVgprs: 41
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 31
; NumVGPRsForWavesPerEU: 41
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
	.protected	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_ ; -- Begin function _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.globl	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.p2align	8
	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,@function
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_: ; @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
; %bb.0:
	s_load_b128 s[16:19], s[0:1], 0x20
	s_lshl_b32 s2, s15, 7
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s3, s16, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB54_28
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_lshr_b32 s0, s16, 7
	s_mov_b32 s3, 0
	s_cmp_lg_u32 s15, s0
	v_lshlrev_b32_e32 v1, 2, v0
	s_cselect_b32 s1, -1, 0
	s_lshl_b64 s[12:13], s[2:3], 2
	v_add_nc_u32_e32 v0, s2, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s4, s12
	s_addc_u32 s21, s5, s13
	s_add_u32 s8, s8, s12
	s_addc_u32 s9, s9, s13
	s_lshr_b32 s0, s17, 7
	s_clause 0x1
	global_load_b32 v3, v1, s[8:9]
	global_load_b32 v4, v1, s[20:21]
	s_sub_i32 s8, 0, s0
	s_sub_i32 s9, 0, s17
	s_and_b32 s8, s15, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s8, s0
	s_lshl_b32 s8, s8, 7
	s_cmp_eq_u32 s0, 0
	s_cselect_b32 s0, -1, 0
	s_and_b32 s12, s0, exec_lo
	s_cselect_b32 s9, s17, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s9, s9, s8
	s_cmp_lt_u32 s9, s16
	s_cbranch_scc1 .LBB54_4
; %bb.2:
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB54_5
; %bb.3:                                ; %.critedge68.i
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, 0
	s_mov_b32 s3, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
	s_branch .LBB54_6
.LBB54_4:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr1_vgpr2
	s_branch .LBB54_11
.LBB54_5:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB54_6:                               ; %Flow37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB54_10
; %bb.7:
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2
	v_cmpx_gt_u32_e64 s16, v0
	s_cbranch_execz .LBB54_9
; %bb.8:
	v_mov_b32_e32 v1, 0
	s_or_b32 s3, s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB54_9:                               ; %Flow39
	s_or_b32 exec_lo, exec_lo, s2
.LBB54_10:                              ; %Flow38
	s_mov_b32 s2, 0
.LBB54_11:                              ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB54_26
; %bb.12:
	s_min_u32 s2, s9, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s12, s2, s17
	s_min_u32 s13, s8, s2
	s_add_i32 s8, s8, s2
	s_min_u32 s3, s12, s16
	s_cmp_gt_u32 s12, s9
	v_subrev_nc_u32_e32 v0, s8, v0
	s_cselect_b32 s8, -1, 0
	s_and_b32 vcc_lo, exec_lo, s1
	v_cndmask_b32_e64 v1, 0, 1, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, s13, v0
	v_cmp_ne_u32_e64 s1, 1, v1
	s_cbranch_vccz .LBB54_18
; %bb.13:                               ; %.critedge72.i
	v_mov_b32_e32 v2, s2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB54_17
; %bb.14:                               ; %.lr.ph.i85.preheader.i
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v7, s3 :: v_dual_and_b32 v6, s18, v4
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, 0
	s_mov_b32 s1, 0
.LBB54_15:                              ; %.lr.ph.i85.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v7
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[0:1]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v8, s18, v8
	v_cmp_gt_u32_e32 vcc_lo, v6, v8
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v8, v6
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_add_nc_u32_e32 v9, 1, v0
	v_and_b32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 1, v8
	v_dual_cndmask_b32 v7, v0, v7 :: v_dual_cndmask_b32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v7
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB54_15
; %bb.16:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
.LBB54_17:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEES2_S5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_ENKUljE_clEj.exit91.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	s_mov_b32 s1, 0
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v4, off
	s_branch .LBB54_19
.LBB54_18:
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB54_19:                              ; %Flow34
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB54_25
; %bb.20:
	v_mov_b32_e32 v2, s2
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB54_24
; %bb.21:                               ; %.lr.ph.i.preheader.i
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v7, s3 :: v_dual_and_b32 v6, s18, v4
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, 0
	s_mov_b32 s1, 0
.LBB54_22:                              ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v7
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[0:1]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v8, s18, v8
	v_cmp_gt_u32_e32 vcc_lo, v6, v8
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v8, v6
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_add_nc_u32_e32 v9, 1, v0
	v_and_b32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 1, v8
	v_dual_cndmask_b32 v7, v0, v7 :: v_dual_cndmask_b32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v7
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB54_22
; %bb.23:                               ; %Flow32
	s_or_b32 exec_lo, exec_lo, s1
.LBB54_24:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEES2_S5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_ENKUljE_clEj.exit.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB54_25:                              ; %Flow35
	s_mov_b32 s3, -1
.LBB54_26:                              ; %Flow40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB54_28
; %bb.27:                               ; %.critedge.sink.split.i
	s_waitcnt vmcnt(1)
	global_store_b32 v[1:2], v3, off
.LBB54_28:                              ; %_ZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EPjN6thrust10device_ptrIjEES2_S5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
.Lfunc_end54:
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, .Lfunc_end54-_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEPjN6thrust10device_ptrIjEES5_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 976
; NumSgprs: 24
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
	.protected	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_ ; -- Begin function _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.globl	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
	.p2align	8
	.type	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,@function
_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_: ; @_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
; %bb.0:
	s_load_b64 s[4:5], s[0:1], 0x8
	v_lshl_or_b32 v0, s15, 7, v0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s5, v0
	s_cbranch_execz .LBB55_6
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s3, 9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, s5, 0x7ffffe
	s_sub_i32 s6, 0, s5
	s_add_i32 s5, s5, -1
	v_and_b32_e32 v1, s6, v0
	v_and_b32_e32 v5, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 10, v1
	v_add_nc_u32_e32 v2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v4, s4, v2
	v_min_u32_e32 v2, s4, v1
	v_add_nc_u32_e32 v3, s3, v4
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, s4, v3
	v_lshlrev_b32_e32 v3, 10, v5
	v_sub_nc_u32_e32 v5, v1, v2
	v_sub_nc_u32_e32 v6, v1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, v5, v3
	v_sub_nc_u32_e32 v3, v4, v2
	v_sub_nc_u32_e64 v6, v1, v6 clamp
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v7, v1, v3
	v_cmpx_lt_u32_e64 v6, v7
	s_cbranch_execz .LBB55_5
; %bb.2:                                ; %.lr.ph.i.preheader
	s_load_b64 s[4:5], s[0:1], 0x0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v5
	v_lshlrev_b64 v[10:11], 2, v[4:5]
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v11, vcc_lo
	s_mov_b32 s4, 0
.LBB55_3:                               ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v4, v7, v6
	v_mov_b32_e32 v12, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 1, v4
	v_xad_u32 v11, v4, -1, v1
	v_lshlrev_b64 v[13:14], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v13, vcc_lo, v3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v8, v14, vcc_lo
	v_add_co_u32 v11, vcc_lo, v9, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, v10, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v12, s2, v13
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v11, s2, v11
	v_add_nc_u32_e32 v13, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, v12, v11
	v_dual_cndmask_b32 v7, v7, v4 :: v_dual_cndmask_b32 v6, v13, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v6, v7
	s_or_b32 s4, vcc_lo, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB55_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s4
.LBB55_5:                               ; %Flow58
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v6, v2
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB55_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,"axG",@progbits,_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_,comdat
.Lfunc_end55:
	.size	_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_, .Lfunc_end55-_ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEjNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_jPSC_T2_SC_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 480
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
	.protected	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_ ; -- Begin function _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.globl	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
	.p2align	8
	.type	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,@function
_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_: ; @_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[16:19], s[0:1], 0x20
	s_load_b64 s[2:3], s[0:1], 0x30
	s_mov_b32 s22, s15
	s_mov_b32 s23, 0
	v_lshlrev_b32_e32 v25, 2, v0
	s_mov_b32 s7, s23
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s28, s16, 10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s15, s28
	s_cselect_b32 s19, -1, 0
	s_lshl_b64 s[4:5], s[22:23], 2
	s_add_u32 s4, s2, s4
	s_addc_u32 s5, s3, s5
	s_add_i32 s6, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[6:7], s[6:7], 2
	s_add_u32 s2, s2, s6
	s_addc_u32 s3, s3, s7
	s_clause 0x1
	s_load_b32 s4, s[4:5], 0x0
	s_load_b32 s2, s[2:3], 0x0
	s_load_b256 s[8:15], s[0:1], 0x0
	s_lshr_b32 s3, s17, 9
	s_load_b64 s[26:27], s[0:1], 0x44
	s_and_b32 s0, s3, 0x7ffffe
	s_lshl_b32 s20, s22, 10
	s_sub_i32 s1, 0, s0
	s_add_i32 s0, s0, -1
	s_and_b32 s1, s22, s1
	s_and_b32 s3, s0, s22
	s_lshl_b32 s6, s1, 11
	s_lshl_b32 s1, s1, 10
	s_add_i32 s6, s6, s17
	s_sub_i32 s7, s20, s1
	s_sub_i32 s1, s6, s1
	s_add_i32 s6, s6, s7
	s_min_u32 s21, s16, s1
	s_add_i32 s1, s1, s17
	s_mov_b32 s5, s23
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s7, s6, s4
	s_sub_i32 s17, s6, s2
	s_min_u32 s6, s16, s7
	s_addk_i32 s17, 0x400
	s_cmp_eq_u32 s0, s3
	s_mov_b32 s7, s23
	s_cselect_b32 s0, s1, s17
	s_cselect_b32 s1, s21, s2
	s_lshl_b64 s[2:3], s[4:5], 2
	s_min_u32 s25, s0, s16
	s_sub_i32 s17, s1, s4
	s_add_u32 s21, s8, s2
	s_addc_u32 s24, s9, s3
	s_lshl_b64 s[4:5], s[6:7], 2
	s_mov_b32 s0, -1
	s_add_u32 s8, s8, s4
	s_addc_u32 s9, s9, s5
	s_lshr_b32 s7, s26, 16
	s_and_b32 s26, s26, 0xffff
	s_and_b32 s1, s27, 0xffff
	s_mul_i32 s7, s26, s7
	s_cmp_eq_u32 s22, s28
	s_mul_i32 s7, s7, s1
	s_cbranch_scc1 .LBB56_2
; %bb.1:                                ; %.preheader38.i.i.i
	v_subrev_nc_u32_e32 v3, s17, v0
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v5, s7, v0
	v_add_co_u32 v7, s0, s21, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, null, s24, 0, s0
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v3, s17, v5
	v_lshl_add_u32 v9, s7, 1, v0
	s_mov_b32 s23, -1
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_mov_b32 v6, v4 :: v_dual_cndmask_b32 v1, v1, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_lshlrev_b64 v[10:11], 2, v[5:6]
	v_subrev_nc_u32_e32 v3, s17, v9
	global_load_b32 v1, v[1:2], off
	v_add_co_u32 v7, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	v_add_co_u32 v12, vcc_lo, s21, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s24, v11, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v5
	v_mov_b32_e32 v10, v4
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v7, v7, v12 :: v_dual_cndmask_b32 v8, v8, v11
	v_lshlrev_b64 v[10:11], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v2, v[7:8], off
	v_add_co_u32 v14, vcc_lo, s21, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s24, v11, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v9, v12, v14, vcc_lo
	v_cndmask_b32_e32 v10, v13, v10, vcc_lo
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[5:6], null, s7, 3, v[0:1]
	v_mov_b32_e32 v6, v4
	v_mad_u64_u32 v[13:14], null, s7, 5, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v3, s17, v5
	v_lshlrev_b64 v[11:12], 2, v[5:6]
	v_lshl_add_u32 v6, s7, 2, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v16, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	v_add_co_u32 v17, vcc_lo, s21, v11
	v_add_co_ci_u32_e32 v15, vcc_lo, s24, v12, vcc_lo
	v_lshlrev_b64 v[11:12], 2, v[3:4]
	v_mov_b32_e32 v7, v4
	v_cmp_gt_u32_e32 vcc_lo, s17, v5
	v_subrev_nc_u32_e32 v3, s17, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, s0, s8, v11
	v_cndmask_b32_e32 v8, v8, v15, vcc_lo
	v_lshlrev_b64 v[14:15], 2, v[6:7]
	v_add_co_ci_u32_e64 v18, s0, s9, v12, s0
	v_mad_u64_u32 v[11:12], null, s7, 6, v[0:1]
	v_add_co_u32 v19, s0, s21, v14
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s0, s24, v15, s0
	v_mov_b32_e32 v14, v4
	v_cndmask_b32_e32 v7, v16, v17, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v6
	v_lshlrev_b64 v[15:16], 2, v[3:4]
	v_subrev_nc_u32_e32 v3, s17, v11
	v_cndmask_b32_e32 v6, v18, v12, vcc_lo
	v_lshlrev_b64 v[17:18], 2, v[13:14]
	v_mov_b32_e32 v12, v4
	v_add_co_u32 v20, s0, s8, v15
	v_lshlrev_b64 v[14:15], 2, v[3:4]
	v_add_co_ci_u32_e64 v16, s0, s9, v16, s0
	v_add_co_u32 v17, s0, s21, v17
	v_lshlrev_b64 v[3:4], 2, v[11:12]
	v_add_co_ci_u32_e64 v18, s0, s24, v18, s0
	v_cmp_gt_u32_e64 s0, s17, v13
	v_add_co_u32 v13, s1, s8, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s1, s9, v15, s1
	v_add_co_u32 v3, s1, s21, v3
	v_add_co_ci_u32_e64 v4, s1, s24, v4, s1
	v_cmp_gt_u32_e64 s1, s17, v11
	v_cndmask_b32_e32 v5, v5, v19, vcc_lo
	v_cndmask_b32_e64 v12, v16, v18, s0
	v_cndmask_b32_e64 v11, v20, v17, s0
	s_mov_b32 s0, 0
	v_cndmask_b32_e64 v14, v14, v4, s1
	v_cndmask_b32_e64 v13, v13, v3, s1
	global_load_b32 v3, v[9:10], off
	global_load_b32 v4, v[7:8], off
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[11:12], off
	global_load_b32 v7, v[13:14], off
	v_mad_u64_u32 v[9:10], null, s7, 7, v[0:1]
	s_branch .LBB56_3
.LBB56_2:
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
.LBB56_3:                               ; %Flow160
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_sub_i32 s6, s25, s6
	s_cbranch_vccnz .LBB56_19
; %bb.4:                                ; %.preheader.i.i.i
	s_add_i32 s1, s6, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB56_6
; %bb.5:
	v_subrev_nc_u32_e32 v1, s17, v0
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, s22, s21, v25
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(3)
	v_add_co_ci_u32_e64 v4, null, s24, 0, s22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v2, v2, v4
	global_load_b32 v1, v[1:2], off
.LBB56_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, s7, v0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB56_8
; %bb.7:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v2, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s24, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v2 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v2, v[9:10], off
.LBB56_8:
	s_or_b32 exec_lo, exec_lo, s22
	v_lshl_add_u32 v9, s7, 1, v0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB56_10
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v3, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s24, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v3, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v3, v[9:10], off
.LBB56_10:
	s_or_b32 exec_lo, exec_lo, s22
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, s7, 3, v[0:1]
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB56_12
; %bb.11:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v4, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s24, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v4 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v4, v[9:10], off
.LBB56_12:
	s_or_b32 exec_lo, exec_lo, s22
	v_lshl_add_u32 v9, s7, 2, v0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB56_14
; %bb.13:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v5, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s24, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v5 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v5, v[9:10], off
.LBB56_14:
	s_or_b32 exec_lo, exec_lo, s22
	v_mad_u64_u32 v[9:10], null, s7, 5, v[0:1]
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB56_16
; %bb.15:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v6, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s24, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v6 :: v_dual_cndmask_b32 v10, v10, v11
	global_load_b32 v6, v[9:10], off
.LBB56_16:
	s_or_b32 exec_lo, exec_lo, s22
	v_mad_u64_u32 v[9:10], null, s7, 6, v[0:1]
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v9
	s_cbranch_execz .LBB56_18
; %bb.17:
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[9:10]
	v_add_co_u32 v7, vcc_lo, s21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s24, v12, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_subrev_nc_u32_e32 v9, s17, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s8, v9
	v_add_co_ci_u32_e64 v10, s0, s9, v10, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v7, vcc_lo
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	global_load_b32 v7, v[9:10], off
.LBB56_18:
	s_or_b32 exec_lo, exec_lo, s22
	v_mad_u64_u32 v[9:10], null, s7, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s23, s1, v9
.LBB56_19:                              ; %Flow161
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s0, s23
	s_cbranch_execz .LBB56_21
; %bb.20:                               ; %.loopexit.sink.split.i.i.i
	v_mov_b32_e32 v12, 0
	v_subrev_nc_u32_e32 v11, s17, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v10, v12
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[9:10]
	v_add_co_u32 v8, vcc_lo, s8, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v12, vcc_lo
	v_add_co_u32 v11, vcc_lo, s21, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s24, v14, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v9
	v_dual_cndmask_b32 v9, v10, v12 :: v_dual_cndmask_b32 v8, v8, v11
	global_load_b32 v8, v[8:9], off
.LBB56_21:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EjN6thrust10device_ptrIjEEEEvRAT__T0_T1_S8_jjb.exit.i.i
	s_or_b32 exec_lo, exec_lo, s0
	v_cndmask_b32_e64 v19, 0, 1, s19
	s_add_u32 s2, s12, s2
	s_addc_u32 s3, s13, s3
	s_add_u32 s4, s12, s4
	s_mov_b32 s0, 0
	s_addc_u32 s5, s13, s5
	s_and_not1_b32 vcc_lo, exec_lo, s19
	s_waitcnt vmcnt(5)
	ds_store_2addr_stride64_b32 v25, v1, v2 offset1:2
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v25, v3, v4 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v25, v5, v6 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v25, v7, v8 offset0:12 offset1:14
	s_cbranch_vccnz .LBB56_23
; %bb.22:                               ; %.preheader38.i91.i.i
	v_subrev_nc_u32_e32 v11, s17, v0
	v_dual_mov_b32 v12, 0 :: v_dual_add_nc_u32 v13, s7, v0
	v_add_co_u32 v15, s0, s2, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v16, null, s3, 0, s0
	v_lshlrev_b64 v[9:10], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v11, s17, v13
	v_lshl_add_u32 v17, s7, 1, v0
	s_mov_b32 s8, 0
	v_add_co_u32 v9, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_mov_b32 v14, v12 :: v_dual_cndmask_b32 v9, v9, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v10, v10, v16, vcc_lo
	v_lshlrev_b64 v[15:16], 2, v[11:12]
	v_lshlrev_b64 v[20:21], 2, v[13:14]
	v_subrev_nc_u32_e32 v11, s17, v17
	global_load_b32 v9, v[9:10], off
	v_add_co_u32 v15, vcc_lo, s4, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v16, vcc_lo
	v_add_co_u32 v20, vcc_lo, s2, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_mov_b32_e32 v18, v12
	v_lshlrev_b64 v[10:11], 2, v[11:12]
	v_mad_u64_u32 v[13:14], null, s7, 3, v[0:1]
	v_dual_cndmask_b32 v15, v15, v20 :: v_dual_cndmask_b32 v16, v16, v21
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	v_add_co_u32 v22, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v18, vcc_lo, s5, v11, vcc_lo
	v_subrev_nc_u32_e32 v11, s17, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_u32 v20, vcc_lo, s2, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_cndmask_b32_e32 v17, v22, v20, vcc_lo
	global_load_b32 v10, v[15:16], off
	v_lshlrev_b64 v[15:16], 2, v[11:12]
	v_cndmask_b32_e32 v18, v18, v21, vcc_lo
	v_mad_u64_u32 v[22:23], null, s7, 5, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_co_u32 v26, vcc_lo, s4, v15
	v_mov_b32_e32 v14, v12
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v16, vcc_lo
	v_mov_b32_e32 v15, v12
	v_lshlrev_b64 v[20:21], 2, v[13:14]
	v_lshl_add_u32 v14, s7, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v11, s17, v14
	v_add_co_u32 v27, vcc_lo, s2, v20
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v24, vcc_lo, s3, v21, vcc_lo
	v_lshlrev_b64 v[20:21], 2, v[11:12]
	v_cmp_gt_u32_e32 vcc_lo, s17, v13
	v_subrev_nc_u32_e32 v11, s17, v22
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v13, s0, s4, v20
	v_cndmask_b32_e32 v16, v16, v24, vcc_lo
	v_lshlrev_b64 v[23:24], 2, v[14:15]
	v_add_co_ci_u32_e64 v28, s0, s5, v21, s0
	v_mad_u64_u32 v[20:21], null, s7, 6, v[0:1]
	v_cndmask_b32_e32 v15, v26, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v29, s0, s2, v23
	v_mov_b32_e32 v23, v12
	v_lshlrev_b64 v[26:27], 2, v[11:12]
	v_add_co_ci_u32_e64 v21, s0, s3, v24, s0
	v_cmp_gt_u32_e32 vcc_lo, s17, v14
	v_subrev_nc_u32_e32 v11, s17, v20
	v_lshlrev_b64 v[23:24], 2, v[22:23]
	v_cndmask_b32_e32 v13, v13, v29, vcc_lo
	v_cndmask_b32_e32 v14, v28, v21, vcc_lo
	v_add_co_u32 v28, s0, s4, v26
	v_mov_b32_e32 v21, v12
	v_add_co_ci_u32_e64 v30, s0, s5, v27, s0
	v_lshlrev_b64 v[26:27], 2, v[11:12]
	v_add_co_u32 v23, s0, s2, v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[20:21]
	v_add_co_ci_u32_e64 v24, s0, s3, v24, s0
	v_cmp_gt_u32_e64 s0, s17, v22
	v_add_co_u32 v22, s1, s4, v26
	v_add_co_ci_u32_e64 v26, s1, s5, v27, s1
	v_add_co_u32 v11, s1, s2, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v12, s1, s3, v12, s1
	v_cmp_gt_u32_e64 s1, s17, v20
	v_cndmask_b32_e64 v21, v30, v24, s0
	v_cndmask_b32_e64 v20, v28, v23, s0
	s_mov_b32 s0, -1
	v_cndmask_b32_e64 v23, v26, v12, s1
	v_cndmask_b32_e64 v22, v22, v11, s1
	global_load_b32 v11, v[17:18], off
	global_load_b32 v12, v[15:16], off
	global_load_b32 v13, v[13:14], off
	global_load_b32 v14, v[20:21], off
	global_load_b32 v15, v[22:23], off
	v_mad_u64_u32 v[17:18], null, s7, 7, v[0:1]
	s_add_i32 s1, s6, s17
	s_branch .LBB56_24
.LBB56_23:
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr17
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $sgpr1
.LBB56_24:                              ; %Flow158
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB56_40
; %bb.25:                               ; %.preheader.i102.i.i
	s_add_i32 s1, s6, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB56_27
; %bb.26:
	s_waitcnt vmcnt(6)
	v_subrev_nc_u32_e32 v9, s17, v0
	s_waitcnt vmcnt(4)
	v_add_co_u32 v11, s8, s2, v25
	v_mov_b32_e32 v10, 0
	s_waitcnt vmcnt(3)
	v_add_co_ci_u32_e64 v12, null, s3, 0, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v0
	v_dual_cndmask_b32 v9, v9, v11 :: v_dual_cndmask_b32 v10, v10, v12
	global_load_b32 v9, v[9:10], off
.LBB56_27:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v17, s7, v0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v17
	s_cbranch_execz .LBB56_29
; %bb.28:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(5)
	v_add_co_u32 v10, vcc_lo, s2, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s4, v17
	v_add_co_ci_u32_e64 v18, s0, s5, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v10 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v10, v[17:18], off
.LBB56_29:
	s_or_b32 exec_lo, exec_lo, s8
	v_lshl_add_u32 v17, s7, 1, v0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v17
	s_cbranch_execz .LBB56_31
; %bb.30:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(4)
	v_add_co_u32 v11, vcc_lo, s2, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s4, v17
	v_add_co_ci_u32_e64 v18, s0, s5, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v11 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v11, v[17:18], off
.LBB56_31:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[17:18], null, s7, 3, v[0:1]
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v17
	s_cbranch_execz .LBB56_33
; %bb.32:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(3)
	v_add_co_u32 v12, vcc_lo, s2, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s4, v17
	v_add_co_ci_u32_e64 v18, s0, s5, v18, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v17, v17, v12, vcc_lo
	v_cndmask_b32_e32 v18, v18, v20, vcc_lo
	global_load_b32 v12, v[17:18], off
.LBB56_33:
	s_or_b32 exec_lo, exec_lo, s8
	v_lshl_add_u32 v17, s7, 2, v0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v17
	s_cbranch_execz .LBB56_35
; %bb.34:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v13, vcc_lo, s2, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s4, v17
	v_add_co_ci_u32_e64 v18, s0, s5, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v13 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v13, v[17:18], off
.LBB56_35:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[17:18], null, s7, 5, v[0:1]
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v17
	s_cbranch_execz .LBB56_37
; %bb.36:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v14, vcc_lo, s2, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s4, v17
	v_add_co_ci_u32_e64 v18, s0, s5, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v14 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v14, v[17:18], off
.LBB56_37:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[17:18], null, s7, 6, v[0:1]
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s1, v17
	s_cbranch_execz .LBB56_39
; %bb.38:
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[17:18]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, s2, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v20, vcc_lo, s3, v21, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_subrev_nc_u32_e32 v17, s17, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s4, v17
	v_add_co_ci_u32_e64 v18, s0, s5, v18, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v15 :: v_dual_cndmask_b32 v18, v18, v20
	global_load_b32 v15, v[17:18], off
.LBB56_39:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[17:18], null, s7, 7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s1, v17
.LBB56_40:                              ; %Flow159
	v_mov_b32_e32 v18, s1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s7, s0
	s_cbranch_execz .LBB56_42
; %bb.41:                               ; %.loopexit.sink.split.i99.i.i
	v_mov_b32_e32 v21, 0
	v_subrev_nc_u32_e32 v20, s17, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v18, v21
	v_lshlrev_b64 v[20:21], 2, v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[22:23], 2, v[17:18]
	v_add_co_u32 v16, vcc_lo, s4, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v18, vcc_lo, s5, v21, vcc_lo
	v_add_co_u32 v20, vcc_lo, s2, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v21, vcc_lo, s3, v23, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s17, v17
	v_dual_cndmask_b32 v16, v16, v20 :: v_dual_cndmask_b32 v17, v18, v21
	v_mov_b32_e32 v18, s1
	global_load_b32 v16, v[16:17], off
.LBB56_42:                              ; %_ZN7rocprim6detail11gmem_to_regILj8EjN6thrust10device_ptrIjEEEEvRAT__T0_T1_S8_jjb.exit110.i.i
	s_or_b32 exec_lo, exec_lo, s7
	v_lshlrev_b32_e32 v17, 3, v0
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_min_u32_e32 v20, v18, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e64 v26, v20, s6 clamp
	v_min_u32_e32 v21, s17, v20
	v_cmpx_lt_u32_e64 v26, v21
	s_cbranch_execz .LBB56_46
; %bb.43:                               ; %.lr.ph.i.preheader.i.i
	v_lshlrev_b32_e32 v22, 2, v20
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v22, s17, 2, v22
.LBB56_44:                              ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v23, v21, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v23, 1, v23
	v_not_b32_e32 v24, v23
	v_add_nc_u32_e32 v28, 1, v23
	v_lshlrev_b32_e32 v27, 2, v23
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v24, v24, 2, v22
	ds_load_b32 v27, v27
	ds_load_b32 v24, v24
	s_waitcnt lgkmcnt(1)
	v_and_b32_e32 v27, s18, v27
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v24, s18, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, v27, v24
	v_dual_cndmask_b32 v21, v21, v23 :: v_dual_cndmask_b32 v26, v28, v26
	v_cmp_ge_u32_e32 vcc_lo, v26, v21
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB56_44
; %bb.45:                               ; %Flow156
	s_or_b32 exec_lo, exec_lo, s1
.LBB56_46:                              ; %Flow157
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s0
	v_sub_nc_u32_e32 v20, v20, v26
	v_cmp_ge_u32_e32 vcc_lo, s17, v26
                                        ; implicit-def: $vgpr29
                                        ; implicit-def: $vgpr28
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $vgpr24
                                        ; implicit-def: $vgpr23
                                        ; implicit-def: $vgpr22
                                        ; implicit-def: $vgpr21
	v_add_nc_u32_e32 v30, s17, v20
                                        ; implicit-def: $vgpr20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s0, v30, v18
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s8, s0
	s_cbranch_execz .LBB56_52
; %bb.47:                               ; %._crit_edge.i.i.i.i
	v_cmp_gt_u32_e32 vcc_lo, s17, v26
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB56_49
; %bb.48:
	v_lshlrev_b32_e32 v1, 2, v26
	ds_load_b32 v1, v1
.LBB56_49:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_ge_u32_e64 s0, v30, v18
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_lt_u32_e64 v30, v18
	s_cbranch_execz .LBB56_51
; %bb.50:
	v_lshlrev_b32_e32 v2, 2, v30
	ds_load_b32 v2, v2
.LBB56_51:                              ; %.loopexit.loopexit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v3, s18, v2
	v_and_b32_e32 v4, s18, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s1, v4, v3
	s_and_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 vcc_lo, s0, s1
	v_cndmask_b32_e64 v3, v18, s17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v20, v30, v26 :: v_dual_add_nc_u32 v3, -1, v3
	v_add_nc_u32_e32 v4, 1, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v3, v4, v3
	v_lshlrev_b32_e32 v3, 2, v3
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v5, v3, v2, vcc_lo
	v_dual_cndmask_b32 v3, v1, v3 :: v_dual_cndmask_b32 v6, v26, v4
	v_dual_cndmask_b32 v4, v4, v30 :: v_dual_cndmask_b32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_and_b32_e32 v7, s18, v5
	v_and_b32_e32 v8, s18, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_gt_u32_e64 s0, s17, v6
	v_cmp_ge_u32_e64 s2, v4, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s1, v8, v7
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v21, v4, v6, s0
	v_cndmask_b32_e64 v7, v18, s17, s0
	v_cndmask_b32_e64 v2, v5, v3, s0
	v_add_nc_u32_e32 v8, 1, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, -1, v7
	v_cndmask_b32_e64 v6, v6, v8, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v7, v8, v7
	v_cndmask_b32_e64 v4, v8, v4, s0
	v_cmp_gt_u32_e64 s1, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v7, 2, v7
	v_cmp_ge_u32_e64 s3, v4, v18
	ds_load_b32 v7, v7
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v26, v7, v5, s0
	v_cndmask_b32_e64 v7, v3, v7, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v22, s18, v26
	v_and_b32_e32 v23, s18, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s2, v23, v22
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s3, s1
	v_cndmask_b32_e64 v22, v4, v6, s1
	v_cndmask_b32_e64 v8, v18, s17, s1
	v_cndmask_b32_e64 v3, v26, v7, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v23, 1, v22
	v_add_nc_u32_e32 v8, -1, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v23, s1
	v_min_u32_e32 v8, v23, v8
	v_cndmask_b32_e64 v4, v23, v4, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s2, s17, v6
	v_lshlrev_b32_e32 v8, 2, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_ge_u32_e64 s4, v4, v18
	ds_load_b32 v8, v8
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v29, v8, v26, s1
	v_cndmask_b32_e64 v8, v7, v8, s1
	v_and_b32_e32 v24, s18, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v27, s18, v8
	v_cmp_le_u32_e64 s3, v27, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_or_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v23, v4, v6, s2
	v_cndmask_b32_e64 v24, v18, s17, s2
	v_add_nc_u32_e32 v27, 1, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v24, -1, v24
	v_cndmask_b32_e64 v6, v6, v27, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v24, v27, v24
	v_cndmask_b32_e64 v4, v27, v4, s2
	v_cmp_gt_u32_e64 s3, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v24, 2, v24
	v_cmp_ge_u32_e64 s5, v4, v18
	ds_load_b32 v24, v24
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v30, v24, v29, s2
	v_cndmask_b32_e64 v31, v8, v24, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v24, s18, v30
	v_and_b32_e32 v28, s18, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s4, v28, v24
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s5, s3
	v_cndmask_b32_e64 v24, v4, v6, s3
	v_cndmask_b32_e64 v27, v18, s17, s3
	v_cndmask_b32_e64 v5, v30, v31, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v28, 1, v24
	v_add_nc_u32_e32 v27, -1, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v28, s3
	v_min_u32_e32 v27, v28, v27
	v_cndmask_b32_e64 v4, v28, v4, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s4, s17, v6
	v_lshlrev_b32_e32 v27, 2, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_ge_u32_e64 s6, v4, v18
	ds_load_b32 v27, v27
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v32, v27, v30, s3
	v_cndmask_b32_e64 v33, v31, v27, s3
	v_and_b32_e32 v27, s18, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v34, s18, v33
	v_cmp_le_u32_e64 s5, v34, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, s5
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v27, v4, v6, s4
	v_cndmask_b32_e64 v28, v18, s17, s4
	v_add_nc_u32_e32 v34, 1, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v28, -1, v28
	v_cndmask_b32_e64 v6, v6, v34, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_min_u32_e32 v28, v34, v28
	v_cndmask_b32_e64 v4, v34, v4, s4
	v_cmp_gt_u32_e64 s5, s17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v28, 2, v28
	v_cmp_ge_u32_e64 s7, v4, v18
	ds_load_b32 v28, v28
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v35, v28, v32, s4
	v_cndmask_b32_e64 v36, v33, v28, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v28, s18, v35
	v_and_b32_e32 v37, s18, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e64 s6, v37, v28
	s_and_b32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s7, s5
	v_cndmask_b32_e64 v28, v4, v6, s5
	v_cndmask_b32_e64 v34, v18, s17, s5
	v_cndmask_b32_e64 v7, v35, v36, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v37, 1, v28
	v_add_nc_u32_e32 v34, -1, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v39, v6, v37, s5
	v_min_u32_e32 v34, v37, v34
	v_cndmask_b32_e64 v37, v37, v4, s5
	v_cndmask_b32_e64 v4, v29, v8, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_gt_u32_e32 vcc_lo, s17, v39
	v_lshlrev_b32_e32 v34, 2, v34
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_ge_u32_e64 s1, v37, v18
	ds_load_b32 v34, v34
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v38, v34, v35, s5
	v_cndmask_b32_e64 v34, v36, v34, s5
	v_and_b32_e32 v6, s18, v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v40, s18, v34
	v_cmp_le_u32_e64 s0, v40, v6
	v_cndmask_b32_e64 v6, v32, v33, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_or_b32 vcc_lo, s1, s0
	v_dual_cndmask_b32 v29, v37, v39 :: v_dual_cndmask_b32 v8, v38, v34
.LBB56_52:                              ; %Flow154
	s_or_b32 exec_lo, exec_lo, s8
	s_barrier
	buffer_gl0_inv
	ds_store_2addr_stride64_b32 v25, v9, v10 offset1:2
	ds_store_2addr_stride64_b32 v25, v11, v12 offset0:4 offset1:6
	ds_store_2addr_stride64_b32 v25, v13, v14 offset0:8 offset1:10
	ds_store_2addr_stride64_b32 v25, v15, v16 offset0:12 offset1:14
	v_lshlrev_b32_e32 v9, 2, v20
	v_lshlrev_b32_e32 v10, 2, v21
	v_lshlrev_b32_e32 v11, 2, v22
	v_lshlrev_b32_e32 v12, 2, v23
	v_lshlrev_b32_e32 v13, 2, v24
	v_lshlrev_b32_e32 v14, 2, v27
	v_lshlrev_b32_e32 v15, 2, v28
	v_lshlrev_b32_e32 v16, 2, v29
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v9, v9
	ds_load_b32 v10, v10
	ds_load_b32 v11, v11
	ds_load_b32 v12, v12
	ds_load_b32 v13, v13
	ds_load_b32 v14, v14
	ds_load_b32 v15, v15
	ds_load_b32 v16, v16
	v_and_b32_e32 v18, 0x7c, v0
	v_cmp_ne_u32_e32 vcc_lo, 1, v19
	s_mov_b32 s21, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	v_lshl_add_u32 v26, v17, 2, v18
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB56_62
; %bb.53:                               ; %.preheader175.i.i.preheader
	v_mov_b32_e32 v17, v26
	s_mov_b64 s[0:1], 0
.LBB56_54:                              ; %.preheader175.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v18, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v17, v18
	v_add_nc_u32_e32 v17, 4, v17
	s_cbranch_scc0 .LBB56_54
; %bb.55:
	v_lshrrev_b32_e32 v17, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_lshl_u32 v27, v0, v17, 2
	v_dual_mov_b32 v24, v8 :: v_dual_mov_b32 v23, v7
	v_dual_mov_b32 v22, v6 :: v_dual_mov_b32 v19, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v28, v27 :: v_dual_mov_b32 v21, v5
	v_dual_mov_b32 v20, v4 :: v_dual_mov_b32 v17, v1
	v_mov_b32_e32 v18, v2
.LBB56_56:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v29, v28
	v_add_nc_u32_e32 v28, 0x210, v28
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v17, v29
	s_cbranch_scc1 .LBB56_56
; %bb.57:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPjEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_lshl_b64 s[0:1], s[20:21], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s10, s0
	s_addc_u32 s3, s11, s1
	s_clause 0x7
	global_store_b32 v25, v17, s[2:3]
	global_store_b32 v25, v18, s[2:3] offset:512
	global_store_b32 v25, v19, s[2:3] offset:1024
	global_store_b32 v25, v20, s[2:3] offset:1536
	global_store_b32 v25, v21, s[2:3] offset:2048
	global_store_b32 v25, v22, s[2:3] offset:2560
	global_store_b32 v25, v23, s[2:3] offset:3072
	global_store_b32 v25, v24, s[2:3] offset:3584
	v_mov_b32_e32 v17, v26
	s_mov_b64 s[2:3], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB56_58:                              ; =>This Inner Loop Header: Depth=1
	s_mov_b32 m0, s2
	s_add_u32 s2, s2, 1
	v_movrels_b32_e32 v18, v9
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 8
	ds_store_b32 v17, v18
	v_add_nc_u32_e32 v17, 4, v17
	s_cbranch_scc0 .LBB56_58
; %bb.59:
	v_dual_mov_b32 v17, v9 :: v_dual_mov_b32 v18, v10
	v_dual_mov_b32 v19, v11 :: v_dual_mov_b32 v20, v12
	v_dual_mov_b32 v21, v13 :: v_dual_mov_b32 v22, v14
	v_dual_mov_b32 v23, v15 :: v_dual_mov_b32 v24, v16
	s_mov_b64 s[2:3], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB56_60:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v28, v27
	v_add_nc_u32_e32 v27, 0x210, v27
	s_mov_b32 m0, s2
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v17, v28
	s_cbranch_scc1 .LBB56_60
; %bb.61:                               ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPjEEvT_RA8_jRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit35.i.i.i
	s_add_u32 s2, s14, s0
	s_addc_u32 s3, s15, s1
	s_mov_b32 s0, 0
	s_mov_b32 s12, -1
	s_clause 0x6
	global_store_b32 v25, v17, s[2:3]
	global_store_b32 v25, v18, s[2:3] offset:512
	global_store_b32 v25, v19, s[2:3] offset:1024
	global_store_b32 v25, v20, s[2:3] offset:1536
	global_store_b32 v25, v21, s[2:3] offset:2048
	global_store_b32 v25, v22, s[2:3] offset:2560
	global_store_b32 v25, v23, s[2:3] offset:3072
	s_branch .LBB56_63
.LBB56_62:
	s_mov_b32 s0, -1
	s_mov_b32 s12, s21
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24
.LBB56_63:                              ; %Flow
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB56_103
; %bb.64:                               ; %.preheader.i.i.preheader
	v_mov_b32_e32 v17, v26
	s_mov_b64 s[0:1], 0
.LBB56_65:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v18, v1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 8
	ds_store_b32 v17, v18
	v_add_nc_u32_e32 v17, 4, v17
	s_cbranch_scc0 .LBB56_65
; %bb.66:
	v_lshrrev_b32_e32 v17, 5, v0
	s_mov_b64 s[0:1], 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_lshl_u32 v27, v0, v17, 2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v17, v27
.LBB56_67:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v18, v17
	v_add_nc_u32_e32 v17, 0x210, v17
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v1, v18
	s_cbranch_scc1 .LBB56_67
; %bb.68:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i.i.i.i
	s_lshl_b64 s[6:7], s[20:21], 2
	s_sub_i32 s8, s16, s20
	s_add_u32 s0, s10, s6
	s_addc_u32 s1, s11, s7
	v_add_co_u32 v17, s0, s0, v25
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v18, null, s1, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s8, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB56_70
; %bb.69:
	global_store_b32 v[17:18], v1, off
.LBB56_70:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v1, 0x80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s8, v1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB56_72
; %bb.71:
	global_store_b32 v[17:18], v2, off offset:512
.LBB56_72:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v1, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s8, v1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB56_74
; %bb.73:
	global_store_b32 v[17:18], v3, off offset:1024
.LBB56_74:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v1, 0x180, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s8, v1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB56_76
; %bb.75:
	global_store_b32 v[17:18], v4, off offset:1536
.LBB56_76:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v1, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s8, v1
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB56_78
; %bb.77:
	global_store_b32 v[17:18], v5, off offset:2048
.LBB56_78:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v1, 0x280, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s8, v1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB56_80
; %bb.79:
	global_store_b32 v[17:18], v6, off offset:2560
.LBB56_80:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v1, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s8, v1
	s_and_saveexec_b32 s9, s5
	s_cbranch_execz .LBB56_82
; %bb.81:
	global_store_b32 v[17:18], v7, off offset:3072
.LBB56_82:
	s_or_b32 exec_lo, exec_lo, s9
	v_or_b32_e32 v0, 0x380, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s8, v0
	s_and_saveexec_b32 s8, s12
	s_cbranch_execz .LBB56_84
; %bb.83:
	global_store_b32 v[17:18], v8, off offset:3584
.LBB56_84:                              ; %_ZN7rocprim11block_storeIjLj128ELj8ELNS_18block_store_methodE3ELj1ELj1EE5storeIPjEEvT_RA8_jjRNS_14block_exchangeIjLj128ELj8ELj1ELj1EE13storage_type_E.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s8
	s_mov_b64 s[8:9], 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB56_85:                              ; =>This Inner Loop Header: Depth=1
	s_mov_b32 m0, s8
	s_add_u32 s8, s8, 1
	v_movrels_b32_e32 v0, v9
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s8, 8
	ds_store_b32 v26, v0
	v_add_nc_u32_e32 v26, 4, v26
	s_cbranch_scc0 .LBB56_85
; %bb.86:
	v_dual_mov_b32 v17, v9 :: v_dual_mov_b32 v18, v10
	v_dual_mov_b32 v19, v11 :: v_dual_mov_b32 v20, v12
	v_dual_mov_b32 v21, v13 :: v_dual_mov_b32 v22, v14
	v_dual_mov_b32 v23, v15 :: v_dual_mov_b32 v24, v16
	s_mov_b64 s[8:9], 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB56_87:                              ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v0, v27
	v_add_nc_u32_e32 v27, 0x210, v27
	s_mov_b32 m0, s8
	s_add_u32 s8, s8, 1
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s8, 8
	s_waitcnt lgkmcnt(0)
	v_movreld_b32_e32 v17, v0
	s_cbranch_scc1 .LBB56_87
; %bb.88:                               ; %_ZN7rocprim14block_exchangeIjLj128ELj8ELj1ELj1EE18blocked_to_stripedIjEEvRA8_KjRA8_T_RNS1_13storage_type_E.exit.i23.i.i.i
	s_add_u32 s6, s14, s6
	s_addc_u32 s7, s15, s7
	v_add_co_u32 v0, s6, s6, v25
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s7, 0, s6
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB56_90
; %bb.89:
	global_store_b32 v[0:1], v17, off
.LBB56_90:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB56_92
; %bb.91:
	global_store_b32 v[0:1], v18, off offset:512
.LBB56_92:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB56_94
; %bb.93:
	global_store_b32 v[0:1], v19, off offset:1024
.LBB56_94:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB56_96
; %bb.95:
	global_store_b32 v[0:1], v20, off offset:1536
.LBB56_96:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB56_98
; %bb.97:
	global_store_b32 v[0:1], v21, off offset:2048
.LBB56_98:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB56_100
; %bb.99:
	global_store_b32 v[0:1], v22, off offset:2560
.LBB56_100:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB56_102
; %bb.101:
	global_store_b32 v[0:1], v23, off offset:3072
.LBB56_102:
	s_or_b32 exec_lo, exec_lo, s0
.LBB56_103:                             ; %Flow152
	s_and_saveexec_b32 s0, s12
	s_cbranch_execz .LBB56_105
; %bb.104:                              ; %_ZN7rocprim6detail16block_store_implILb1ELj128ELj8EjjE5storeIPjS4_jEEvT1_jbT_T0_RA8_jS9_RNS2_12storage_typeE.exit.sink.split.i.i
	s_lshl_b64 s[0:1], s[20:21], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s14, s0
	s_addc_u32 s1, s15, s1
	global_store_b32 v25, v24, s[0:1] offset:3584
.LBB56_105:                             ; %_ZN7rocprim6detail28block_merge_mergepath_kernelILj128ELj8EN6thrust10device_ptrIjEEPjS4_S5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_PKSD_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 41
		.amdhsa_next_free_sgpr 29
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,"axG",@progbits,_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_,comdat
.Lfunc_end56:
	.size	_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_, .Lfunc_end56-_ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_PKSG_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 6540
; NumSgprs: 31
; NumVgprs: 41
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 31
; NumVGPRsForWavesPerEU: 41
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
	.protected	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_ ; -- Begin function _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.globl	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
	.p2align	8
	.type	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,@function
_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_: ; @_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
; %bb.0:
	s_load_b128 s[16:19], s[0:1], 0x20
	s_lshl_b32 s2, s15, 7
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s3, s16, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB57_28
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_lshr_b32 s0, s16, 7
	s_mov_b32 s3, 0
	s_cmp_lg_u32 s15, s0
	v_lshlrev_b32_e32 v1, 2, v0
	s_cselect_b32 s1, -1, 0
	s_lshl_b64 s[12:13], s[2:3], 2
	v_add_nc_u32_e32 v0, s2, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s4, s12
	s_addc_u32 s21, s5, s13
	s_add_u32 s8, s8, s12
	s_addc_u32 s9, s9, s13
	s_lshr_b32 s0, s17, 7
	s_clause 0x1
	global_load_b32 v3, v1, s[8:9]
	global_load_b32 v4, v1, s[20:21]
	s_sub_i32 s8, 0, s0
	s_sub_i32 s9, 0, s17
	s_and_b32 s8, s15, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s8, s0
	s_lshl_b32 s8, s8, 7
	s_cmp_eq_u32 s0, 0
	s_cselect_b32 s0, -1, 0
	s_and_b32 s12, s0, exec_lo
	s_cselect_b32 s9, s17, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s9, s9, s8
	s_cmp_lt_u32 s9, s16
	s_cbranch_scc1 .LBB57_4
; %bb.2:
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB57_5
; %bb.3:                                ; %.critedge70.i
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, 0
	s_mov_b32 s3, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
	s_branch .LBB57_6
.LBB57_4:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr1_vgpr2
	s_branch .LBB57_11
.LBB57_5:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB57_6:                               ; %Flow37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB57_10
; %bb.7:
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2
	v_cmpx_gt_u32_e64 s16, v0
	s_cbranch_execz .LBB57_9
; %bb.8:
	v_mov_b32_e32 v1, 0
	s_or_b32 s3, s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB57_9:                               ; %Flow39
	s_or_b32 exec_lo, exec_lo, s2
.LBB57_10:                              ; %Flow38
	s_mov_b32 s2, 0
.LBB57_11:                              ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB57_26
; %bb.12:
	s_min_u32 s2, s9, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s12, s2, s17
	s_min_u32 s13, s8, s2
	s_add_i32 s8, s8, s2
	s_min_u32 s3, s12, s16
	s_cmp_gt_u32 s12, s9
	v_subrev_nc_u32_e32 v0, s8, v0
	s_cselect_b32 s8, -1, 0
	s_and_b32 vcc_lo, exec_lo, s1
	v_cndmask_b32_e64 v1, 0, 1, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, s13, v0
	v_cmp_ne_u32_e64 s1, 1, v1
	s_cbranch_vccz .LBB57_18
; %bb.13:                               ; %.critedge74.i
	v_mov_b32_e32 v2, s2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB57_17
; %bb.14:                               ; %.lr.ph.i84.preheader.i
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v7, s3 :: v_dual_and_b32 v6, s18, v4
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, 0
	s_mov_b32 s1, 0
.LBB57_15:                              ; %.lr.ph.i84.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v7
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[0:1]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v8, s18, v8
	v_cmp_gt_u32_e32 vcc_lo, v6, v8
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v8, v6
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_add_nc_u32_e32 v9, 1, v0
	v_and_b32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 1, v8
	v_dual_cndmask_b32 v7, v0, v7 :: v_dual_cndmask_b32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v7
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB57_15
; %bb.16:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
.LBB57_17:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjS4_S5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_ENKUljE_clEj.exit90.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	s_mov_b32 s1, 0
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v4, off
	s_branch .LBB57_19
.LBB57_18:
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB57_19:                              ; %Flow34
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB57_25
; %bb.20:
	v_mov_b32_e32 v2, s2
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB57_24
; %bb.21:                               ; %.lr.ph.i.preheader.i
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v7, s3 :: v_dual_and_b32 v6, s18, v4
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, 0
	s_mov_b32 s1, 0
.LBB57_22:                              ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v2, v7
	v_lshrrev_b32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[0:1]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v8, s18, v8
	v_cmp_gt_u32_e32 vcc_lo, v6, v8
	v_cndmask_b32_e64 v9, 0, 1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, v8, v6
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_add_nc_u32_e32 v9, 1, v0
	v_and_b32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 1, v8
	v_dual_cndmask_b32 v7, v0, v7 :: v_dual_cndmask_b32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v2, v7
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB57_22
; %bb.23:                               ; %Flow32
	s_or_b32 exec_lo, exec_lo, s1
.LBB57_24:                              ; %_ZZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjS4_S5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_ENKUljE_clEj.exit.i
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v2, v5
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v4, off
.LBB57_25:                              ; %Flow35
	s_mov_b32 s3, -1
.LBB57_26:                              ; %Flow40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB57_28
; %bb.27:                               ; %.critedge.sink.split.i
	s_waitcnt vmcnt(1)
	global_store_b32 v[1:2], v3, off
.LBB57_28:                              ; %_ZN7rocprim6detail26block_merge_oddeven_kernelILj128ELj1EN6thrust10device_ptrIjEEPjS4_S5_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT1_T2_T3_T4_T5_SD_T6_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,"axG",@progbits,_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_,comdat
.Lfunc_end57:
	.size	_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_, .Lfunc_end57-_ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjjEEN6thrust10device_ptrIjEEPjS7_S8_jNS0_19radix_merge_compareILb0ELb1EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SG_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 976
; NumSgprs: 24
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,"axG",@progbits,_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,comdat
	.protected	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj ; -- Begin function _ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.globl	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
	.p2align	8
	.type	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,@function
_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj: ; @_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[16:19], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x1c
	v_lshlrev_b32_e32 v3, 2, v0
	s_mul_i32 s14, s15, 0xc00
	s_mov_b32 s0, -1
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_u32 s15, s3
	s_cbranch_scc0 .LBB58_61
; %bb.1:
	s_mov_b32 s15, 0
	s_mul_i32 s11, s3, 0xfffff400
	v_lshlrev_b32_e32 v15, 2, v0
	s_lshl_b64 s[0:1], s[14:15], 2
	s_add_i32 s11, s11, s2
	s_add_u32 s0, s16, s0
	s_addc_u32 s1, s17, s1
	v_add_co_u32 v1, s0, s0, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s1, 0, s0
	v_cmp_gt_u32_e32 vcc_lo, s11, v0
                                        ; implicit-def: $vgpr4
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB58_3
; %bb.2:
	global_load_b32 v4, v[1:2], off
.LBB58_3:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v5, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s11, v5
                                        ; implicit-def: $vgpr5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB58_5
; %bb.4:
	global_load_b32 v5, v[1:2], off offset:1024
.LBB58_5:
	s_or_b32 exec_lo, exec_lo, s1
	v_or_b32_e32 v6, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s11, v6
                                        ; implicit-def: $vgpr6
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB58_7
; %bb.6:
	global_load_b32 v6, v[1:2], off offset:2048
.LBB58_7:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v7, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s11, v7
                                        ; implicit-def: $vgpr7
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB58_9
; %bb.8:
	global_load_b32 v7, v[1:2], off offset:3072
.LBB58_9:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v8, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s11, v8
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB58_11
; %bb.10:
	v_add_co_u32 v8, s4, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s4, 0, v2, s4
	global_load_b32 v8, v[8:9], off
.LBB58_11:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v9, 0x500, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s11, v9
                                        ; implicit-def: $vgpr9
	s_and_saveexec_b32 s6, s4
	s_cbranch_execz .LBB58_13
; %bb.12:
	v_add_co_u32 v9, s5, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s5, 0, v2, s5
	global_load_b32 v9, v[9:10], off offset:1024
.LBB58_13:
	s_or_b32 exec_lo, exec_lo, s6
	v_or_b32_e32 v10, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s11, v10
                                        ; implicit-def: $vgpr10
	s_and_saveexec_b32 s7, s5
	s_cbranch_execz .LBB58_15
; %bb.14:
	v_add_co_u32 v10, s6, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s6, 0, v2, s6
	global_load_b32 v10, v[10:11], off offset:2048
.LBB58_15:
	s_or_b32 exec_lo, exec_lo, s7
	v_or_b32_e32 v11, 0x700, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s11, v11
                                        ; implicit-def: $vgpr11
	s_and_saveexec_b32 s8, s6
	s_cbranch_execz .LBB58_17
; %bb.16:
	v_add_co_u32 v11, s7, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s7, 0, v2, s7
	global_load_b32 v11, v[11:12], off offset:3072
.LBB58_17:
	s_or_b32 exec_lo, exec_lo, s8
	v_or_b32_e32 v12, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s11, v12
                                        ; implicit-def: $vgpr12
	s_and_saveexec_b32 s9, s7
	s_cbranch_execz .LBB58_19
; %bb.18:
	v_add_co_u32 v12, s8, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s8, 0, v2, s8
	global_load_b32 v12, v[12:13], off
.LBB58_19:
	s_or_b32 exec_lo, exec_lo, s9
	v_or_b32_e32 v13, 0x900, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s11, v13
                                        ; implicit-def: $vgpr13
	s_and_saveexec_b32 s10, s8
	s_cbranch_execz .LBB58_21
; %bb.20:
	v_add_co_u32 v13, s9, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s9, 0, v2, s9
	global_load_b32 v13, v[13:14], off offset:1024
.LBB58_21:
	s_or_b32 exec_lo, exec_lo, s10
	v_or_b32_e32 v14, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s11, v14
                                        ; implicit-def: $vgpr14
	s_and_saveexec_b32 s15, s9
	s_cbranch_execz .LBB58_23
; %bb.22:
	v_add_co_u32 v16, s10, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v17, s10, 0, v2, s10
	global_load_b32 v14, v[16:17], off offset:2048
.LBB58_23:
	s_or_b32 exec_lo, exec_lo, s15
	v_or_b32_e32 v16, 0xb00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s11, v16
                                        ; implicit-def: $vgpr16
	s_and_saveexec_b32 s15, s10
	s_cbranch_execz .LBB58_25
; %bb.24:
	v_add_co_u32 v1, s11, 0x2000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s11, 0, v2, s11
	global_load_b32 v16, v[1:2], off offset:3072
.LBB58_25:                              ; %_ZN7rocprim25block_load_direct_stripedILj256EN6thrust10device_ptrIjEEjLj12EEEvjT0_RAT2__T1_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s15, exec_lo
	v_cmpx_gt_u32_e32 0x200, v0
	s_cbranch_execz .LBB58_28
; %bb.26:                               ; %.lr.ph.i.i20.i.preheader
	v_or_b32_e32 v1, 0xffffff00, v0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s11, 0
.LBB58_27:                              ; %.lr.ph.i.i20.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s20, 0x100, v1
	s_xor_b32 s20, s20, -1
	ds_store_b32 v15, v2
	v_add_nc_u32_e32 v15, 0x400, v15
	s_and_b32 s20, exec_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s11, s20, s11
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB58_27
.LBB58_28:                              ; %Flow92
	s_or_b32 exec_lo, exec_lo, s15
	s_cmp_gt_u32 s13, s12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_cselect_b32 s11, -1, 0
	s_cmp_le_u32 s13, s12
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB58_55
; %bb.29:                               ; %.lr.ph.i17.i.preheader
	v_dual_mov_b32 v2, 1 :: v_dual_and_b32 v1, 3, v0
	s_sub_i32 s15, s13, s12
	s_mov_b32 s20, s12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 2, v1
.LBB58_30:                              ; %.lr.ph.i17.i
                                        ; =>This Inner Loop Header: Depth=1
	s_min_u32 s21, s15, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s21, -1, s21
	s_not_b32 s21, s21
	s_and_saveexec_b32 s22, vcc_lo
	s_cbranch_execz .LBB58_32
; %bb.31:                               ;   in Loop: Header=BB58_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB58_32:                              ;   in Loop: Header=BB58_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s0
	s_cbranch_execz .LBB58_34
; %bb.33:                               ;   in Loop: Header=BB58_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB58_34:                              ;   in Loop: Header=BB58_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s1
	s_cbranch_execz .LBB58_36
; %bb.35:                               ;   in Loop: Header=BB58_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB58_36:                              ;   in Loop: Header=BB58_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s2
	s_cbranch_execz .LBB58_38
; %bb.37:                               ;   in Loop: Header=BB58_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB58_38:                              ;   in Loop: Header=BB58_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s3
	s_cbranch_execz .LBB58_40
; %bb.39:                               ;   in Loop: Header=BB58_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB58_40:                              ;   in Loop: Header=BB58_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s4
	s_cbranch_execz .LBB58_42
; %bb.41:                               ;   in Loop: Header=BB58_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB58_42:                              ;   in Loop: Header=BB58_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s5
	s_cbranch_execz .LBB58_44
; %bb.43:                               ;   in Loop: Header=BB58_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB58_44:                              ;   in Loop: Header=BB58_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s6
	s_cbranch_execz .LBB58_46
; %bb.45:                               ;   in Loop: Header=BB58_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB58_46:                              ;   in Loop: Header=BB58_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s7
	s_cbranch_execz .LBB58_48
; %bb.47:                               ;   in Loop: Header=BB58_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB58_48:                              ;   in Loop: Header=BB58_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s8
	s_cbranch_execz .LBB58_50
; %bb.49:                               ;   in Loop: Header=BB58_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB58_50:                              ;   in Loop: Header=BB58_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s9
	s_cbranch_execz .LBB58_52
; %bb.51:                               ;   in Loop: Header=BB58_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB58_52:                              ;   in Loop: Header=BB58_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s22, s10
	s_cbranch_execz .LBB58_54
; %bb.53:                               ;   in Loop: Header=BB58_30 Depth=1
	v_lshrrev_b32_e32 v15, s20, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v15, s21, v15
	v_lshl_add_u32 v15, v15, 4, v1
	ds_add_u32 v15, v2
.LBB58_54:                              ; %_ZN7rocprim6detail26onesweep_histograms_helperIjLj256ELj12ELj4ELb0ENS_19identity_decomposerEE21count_digits_at_placeILb0EEEvjjRA12_KjjS2_jjjRNS3_12storage_typeE.exit.i.i
                                        ;   in Loop: Header=BB58_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v1, 0x100, v1
	s_add_i32 s20, s20, 4
	s_add_i32 s15, s15, -4
	s_cmp_ge_u32 s20, s13
	s_cbranch_scc0 .LBB58_30
.LBB58_55:                              ; %._crit_edge.i15.i
	s_and_not1_b32 vcc_lo, exec_lo, s11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB58_60
; %bb.56:                               ; %.preheader50.lr.ph.i.i
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	v_dual_mov_b32 v1, v0 :: v_dual_lshlrev_b32 v4, 4, v0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s1, s12
.LBB58_57:                              ; %.preheader50.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB58_59
; %bb.58:                               ; %.preheader.lr.ph.i16.i
                                        ;   in Loop: Header=BB58_57 Depth=1
	ds_load_2addr_b32 v[5:6], v4 offset1:1
	ds_load_2addr_b32 v[7:8], v4 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v9, v6, v5
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v7, v9, v7, v8
	v_add_co_u32 v5, s0, s18, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, s19, v6, s0
	global_atomic_add_u32 v[5:6], v7, off
.LBB58_59:                              ;   in Loop: Header=BB58_57 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v1, 16, v1
	v_add_nc_u32_e32 v4, 0x100, v4
	s_add_i32 s1, s1, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s1, s13
	s_cbranch_scc1 .LBB58_57
.LBB58_60:                              ; %Flow88
	s_mov_b32 s0, 0
.LBB58_61:                              ; %Flow99
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB58_73
; %bb.62:
	s_mov_b32 s15, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[14:15], 2
	s_add_u32 s0, s16, s0
	s_addc_u32 s1, s17, s1
	v_add_co_u32 v6, s2, s0, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, null, s1, 0, s2
	s_clause 0x3
	global_load_b32 v1, v3, s[0:1]
	global_load_b32 v2, v3, s[0:1] offset:1024
	global_load_b32 v4, v3, s[0:1] offset:2048
	global_load_b32 v5, v3, s[0:1] offset:3072
	v_add_co_u32 v9, vcc_lo, 0x1000, v6
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v7, vcc_lo
	v_add_co_u32 v12, vcc_lo, v6, 0x2000
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v7, vcc_lo
	v_add_co_u32 v14, vcc_lo, 0x2000, v6
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v7, vcc_lo
	s_clause 0x7
	global_load_b32 v6, v[12:13], off
	global_load_b32 v7, v[9:10], off offset:1024
	global_load_b32 v8, v[9:10], off offset:2048
	global_load_b32 v9, v[9:10], off offset:3072
	global_load_b32 v10, v[14:15], off offset:1024
	global_load_b32 v11, v[14:15], off offset:2048
	global_load_b32 v12, v[12:13], off offset:-4096
	global_load_b32 v13, v[14:15], off offset:3072
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 0x200, v0
	s_cbranch_execz .LBB58_65
; %bb.63:                               ; %.lr.ph.i.i.i.preheader
	v_or_b32_e32 v14, 0xffffff00, v0
	v_mov_b32_e32 v15, 0
.LBB58_64:                              ; %.lr.ph.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v14, s1, 0x100, v14
	s_xor_b32 s1, s1, -1
	ds_store_b32 v3, v15
	v_add_nc_u32_e32 v3, 0x400, v3
	s_and_b32 s1, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s15, s1, s15
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB58_64
.LBB58_65:                              ; %Flow98
	s_or_b32 exec_lo, exec_lo, s0
	s_cmp_gt_u32 s13, s12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_cselect_b32 s0, -1, 0
	s_cmp_le_u32 s13, s12
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB58_68
; %bb.66:                               ; %.lr.ph.i.i.preheader
	v_dual_mov_b32 v14, 1 :: v_dual_and_b32 v3, 3, v0
	s_sub_i32 s1, s13, s12
	s_mov_b32 s2, s12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 2, v3
.LBB58_67:                              ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_min_u32 s3, s1, 4
	v_lshrrev_b32_e32 v15, s2, v1
	v_lshrrev_b32_e32 v16, s2, v2
	s_lshl_b32 s3, -1, s3
	v_lshrrev_b32_e32 v17, s2, v4
	v_lshrrev_b32_e32 v18, s2, v5
	s_not_b32 s3, s3
	v_lshrrev_b32_e32 v19, s2, v12
	v_lshrrev_b32_e32 v20, s2, v7
	v_lshrrev_b32_e32 v21, s2, v8
	v_lshrrev_b32_e32 v22, s2, v9
	v_lshrrev_b32_e32 v23, s2, v6
	v_lshrrev_b32_e32 v24, s2, v10
	v_lshrrev_b32_e32 v25, s2, v11
	v_lshrrev_b32_e32 v26, s2, v13
	v_and_b32_e32 v15, s3, v15
	v_and_b32_e32 v16, s3, v16
	v_and_b32_e32 v17, s3, v17
	v_and_b32_e32 v18, s3, v18
	v_and_b32_e32 v19, s3, v19
	v_and_b32_e32 v20, s3, v20
	v_and_b32_e32 v21, s3, v21
	v_and_b32_e32 v22, s3, v22
	v_and_b32_e32 v23, s3, v23
	v_and_b32_e32 v24, s3, v24
	v_and_b32_e32 v25, s3, v25
	v_and_b32_e32 v26, s3, v26
	v_lshl_add_u32 v15, v15, 4, v3
	v_lshl_add_u32 v16, v16, 4, v3
	v_lshl_add_u32 v17, v17, 4, v3
	v_lshl_add_u32 v18, v18, 4, v3
	v_lshl_add_u32 v19, v19, 4, v3
	v_lshl_add_u32 v20, v20, 4, v3
	v_lshl_add_u32 v21, v21, 4, v3
	v_lshl_add_u32 v22, v22, 4, v3
	v_lshl_add_u32 v23, v23, 4, v3
	v_lshl_add_u32 v24, v24, 4, v3
	v_lshl_add_u32 v25, v25, 4, v3
	v_lshl_add_u32 v26, v26, 4, v3
	ds_add_u32 v15, v14
	ds_add_u32 v16, v14
	ds_add_u32 v17, v14
	ds_add_u32 v18, v14
	ds_add_u32 v19, v14
	ds_add_u32 v20, v14
	ds_add_u32 v21, v14
	ds_add_u32 v22, v14
	ds_add_u32 v23, v14
	ds_add_u32 v24, v14
	ds_add_u32 v25, v14
	ds_add_u32 v26, v14
	v_add_nc_u32_e32 v3, 0x100, v3
	s_add_i32 s2, s2, 4
	s_add_i32 s1, s1, -4
	s_cmp_ge_u32 s2, s13
	s_cbranch_scc0 .LBB58_67
.LBB58_68:                              ; %._crit_edge.i.i
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB58_73
; %bb.69:                               ; %.preheader49.lr.ph.i.i
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v2, 4, v0
.LBB58_70:                              ; %.preheader49.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB58_72
; %bb.71:                               ; %.preheader.lr.ph.i.i
                                        ;   in Loop: Header=BB58_70 Depth=1
	ds_load_2addr_b32 v[3:4], v2 offset1:1
	ds_load_2addr_b32 v[5:6], v2 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v7, v4, v3
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v5, v7, v5, v6
	v_add_co_u32 v3, s0, s18, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s19, v4, s0
	global_atomic_add_u32 v[3:4], v5, off
.LBB58_72:                              ;   in Loop: Header=BB58_70 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v0, 16, v0
	v_add_nc_u32_e32 v2, 0x100, v2
	s_add_i32 s12, s12, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s12, s13
	s_cbranch_scc0 .LBB58_70
.LBB58_73:                              ; %_ZN7rocprim6detail19onesweep_histogramsILj256ELj12ELj4ELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT3_PT4_S7_S7_T5_jj.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 27
		.amdhsa_next_free_sgpr 23
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,"axG",@progbits,_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj,comdat
.Lfunc_end58:
	.size	_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj, .Lfunc_end58-_ZN7rocprim6detail26onesweep_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEjNS_19identity_decomposerEEEvT1_PT2_SA_SA_T3_jj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2440
; NumSgprs: 25
; NumVgprs: 27
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 25
; NumVGPRsForWavesPerEU: 27
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_,"axG",@progbits,_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_,comdat
	.protected	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_ ; -- Begin function _ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_
	.globl	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_
	.p2align	8
	.type	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_,@function
_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_: ; @_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	s_lshl_b32 s2, s15, 4
	s_mov_b32 s3, 0
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_lshl_b64 s[2:3], s[2:3], 2
	v_lshlrev_b32_e32 v1, 2, v0
                                        ; implicit-def: $vgpr3
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s0, s2
	s_addc_u32 s3, s1, s3
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB59_2
; %bb.1:
	global_load_b32 v3, v1, s[2:3]
.LBB59_2:                               ; %_ZN7rocprim25block_load_direct_blockedIPjjLj1EEEvjT_RAT1__T0_j.exit.i
	s_or_b32 exec_lo, exec_lo, s0
	v_mbcnt_lo_u32_b32 v2, -1, 0
	s_waitcnt vmcnt(0)
	v_mov_b32_dpp v5, v3 row_shr:1 row_mask:0xf bank_mask:0xf
	v_or_b32_e32 v6, 31, v0
	s_mov_b32 s1, exec_lo
	v_and_b32_e32 v4, 15, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 0, v4
	v_cndmask_b32_e64 v5, 0, v5, s0
	v_cmp_lt_u32_e64 s0, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v5, v3
	v_mov_b32_dpp v5, v3 row_shr:2 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, 0, v5, s0
	v_cmp_lt_u32_e64 s0, 3, v4
	v_add_nc_u32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v5, v3 row_shr:4 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v5, 0, v5, s0
	v_cmp_lt_u32_e64 s0, 7, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v3, v5
	v_mov_b32_dpp v5, v3 row_shr:8 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, 0, v5, s0
	v_bfe_i32 v5, v2, 4, 1
	v_add_nc_u32_e32 v3, v3, v4
	ds_swizzle_b32 v4, v3 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v5, v5, v4
	v_lshrrev_b32_e32 v4, 5, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v3, v5
	v_cmpx_eq_u32_e64 v6, v0
	s_cbranch_execz .LBB59_4
; %bb.3:
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b32_e32 v5, 2, v4
	ds_store_b32 v5, v3
.LBB59_4:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 8, v0
	s_cbranch_execz .LBB59_6
; %bb.5:
	ds_load_b32 v5, v1
	v_and_b32_e32 v6, 7, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 0, v6
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v7, v5 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v7, 0, v7, s0
	v_cmp_lt_u32_e64 s0, 1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v7, v5
	v_mov_b32_dpp v7, v5 row_shr:2 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, 0, v7, s0
	v_cmp_lt_u32_e64 s0, 3, v6
	v_add_nc_u32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v7, v5 row_shr:4 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v6, 0, v7, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v5, v6
	ds_store_b32 v1, v5
.LBB59_6:                               ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj256ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj256EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_lt_u32_e64 s0, 31, v0
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB59_8
; %bb.7:
	v_lshl_add_u32 v0, v4, 2, -4
	ds_load_b32 v0, v0
.LBB59_8:                               ; %_ZN7rocprim10block_scanIjLj256ELNS_20block_scan_algorithmE0ELj1ELj1EE14exclusive_scanILj1ENS_4plusIjEEEEvRAT__jS7_jT0_.exit.i
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v4, -1, v2
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s0, 0, v4
	v_cndmask_b32_e64 v4, v4, v2, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 2, v4
	ds_bpermute_b32 v3, v4, v3
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB59_10
; %bb.9:
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v0, v3, v0, vcc_lo
	global_store_b32 v1, v0, s[2:3]
.LBB59_10:                              ; %_ZN7rocprim6detail24onesweep_scan_histogramsILj256ELj4EjEEvPT1_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_
		.amdhsa_group_segment_fixed_size 32
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_,"axG",@progbits,_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_,comdat
.Lfunc_end59:
	.size	_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_, .Lfunc_end59-_ZN7rocprim6detail31onesweep_scan_histograms_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEEjEEvPT0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 596
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 32 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.protected	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj ; -- Begin function _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj
	.globl	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	8
	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj: ; @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj
; %bb.0:
	s_clause 0x3
	s_load_b128 s[80:83], s[0:1], 0x44
	s_load_b256 s[68:75], s[0:1], 0x0
	s_load_b128 s[76:79], s[0:1], 0x28
	s_load_b64 s[84:85], s[0:1], 0x38
	v_mul_u32_u24_e32 v32, 31, v0
	s_mul_i32 s86, s15, 0x3e00
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_u32 s15, s82
	s_cbranch_scc0 .LBB60_337
; %bb.1:
	s_load_b32 s2, s[0:1], 0x20
	s_mov_b32 s87, 0
	s_mul_i32 s66, s82, 0xffffc200
	v_dual_mov_b32 v4, -1 :: v_dual_lshlrev_b32 v9, 2, v32
	s_lshl_b64 s[82:83], s[86:87], 2
	v_mov_b32_e32 v3, -1
	s_waitcnt lgkmcnt(0)
	s_add_i32 s66, s66, s2
	s_add_u32 s3, s68, s82
	s_addc_u32 s4, s69, s83
	v_add_co_u32 v1, s3, s3, v9
	v_cmp_gt_u32_e64 s2, s66, v32
	v_add_co_ci_u32_e64 v2, null, s4, 0, s3
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB60_3
; %bb.2:
	global_load_b32 v4, v[1:2], off
.LBB60_3:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v5, 1, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s66, v5
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB60_5
; %bb.4:
	global_load_b32 v3, v[1:2], off offset:4
.LBB60_5:
	s_or_b32 exec_lo, exec_lo, s4
	v_dual_mov_b32 v5, -1 :: v_dual_add_nc_u32 v6, 2, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e64 s4, s66, v6
	v_mov_b32_e32 v6, -1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB60_7
; %bb.6:
	global_load_b32 v6, v[1:2], off offset:8
.LBB60_7:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v7, 3, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s66, v7
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB60_9
; %bb.8:
	global_load_b32 v5, v[1:2], off offset:12
.LBB60_9:
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v16, -1 :: v_dual_add_nc_u32 v7, 4, v32
	v_mov_b32_e32 v17, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s66, v7
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB60_11
; %bb.10:
	global_load_b32 v17, v[1:2], off offset:16
.LBB60_11:
	s_or_b32 exec_lo, exec_lo, s7
	v_add_nc_u32_e32 v7, 5, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s66, v7
	s_and_saveexec_b32 s8, s7
	s_cbranch_execz .LBB60_13
; %bb.12:
	global_load_b32 v16, v[1:2], off offset:20
.LBB60_13:
	s_or_b32 exec_lo, exec_lo, s8
	v_dual_mov_b32 v22, -1 :: v_dual_add_nc_u32 v7, 6, v32
	v_mov_b32_e32 v21, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s66, v7
	s_and_saveexec_b32 s9, s8
	s_cbranch_execz .LBB60_15
; %bb.14:
	global_load_b32 v22, v[1:2], off offset:24
.LBB60_15:
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v7, 7, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s66, v7
	s_and_saveexec_b32 s10, s9
	s_cbranch_execz .LBB60_17
; %bb.16:
	global_load_b32 v21, v[1:2], off offset:28
.LBB60_17:
	s_or_b32 exec_lo, exec_lo, s10
	v_dual_mov_b32 v24, -1 :: v_dual_add_nc_u32 v7, 8, v32
	v_mov_b32_e32 v23, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s66, v7
	s_and_saveexec_b32 s11, s10
	s_cbranch_execz .LBB60_19
; %bb.18:
	global_load_b32 v24, v[1:2], off offset:32
.LBB60_19:
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v7, 9, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s11, s66, v7
	s_and_saveexec_b32 s12, s11
	s_cbranch_execz .LBB60_21
; %bb.20:
	global_load_b32 v23, v[1:2], off offset:36
.LBB60_21:
	s_or_b32 exec_lo, exec_lo, s12
	v_dual_mov_b32 v26, -1 :: v_dual_add_nc_u32 v7, 10, v32
	v_mov_b32_e32 v25, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s66, v7
	s_and_saveexec_b32 s13, s12
	s_cbranch_execz .LBB60_23
; %bb.22:
	global_load_b32 v25, v[1:2], off offset:40
.LBB60_23:
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v7, 11, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s13, s66, v7
	s_and_saveexec_b32 s14, s13
	s_cbranch_execz .LBB60_25
; %bb.24:
	global_load_b32 v26, v[1:2], off offset:44
.LBB60_25:
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v28, -1 :: v_dual_add_nc_u32 v7, 12, v32
	v_mov_b32_e32 v27, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s14, s66, v7
	s_and_saveexec_b32 s16, s14
	s_cbranch_execz .LBB60_27
; %bb.26:
	global_load_b32 v28, v[1:2], off offset:48
.LBB60_27:
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v7, 13, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s16, s66, v7
	s_and_saveexec_b32 s17, s16
	s_cbranch_execz .LBB60_29
; %bb.28:
	global_load_b32 v27, v[1:2], off offset:52
.LBB60_29:
	s_or_b32 exec_lo, exec_lo, s17
	v_dual_mov_b32 v30, -1 :: v_dual_add_nc_u32 v7, 14, v32
	v_mov_b32_e32 v29, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s17, s66, v7
	s_and_saveexec_b32 s18, s17
	s_cbranch_execz .LBB60_31
; %bb.30:
	global_load_b32 v30, v[1:2], off offset:56
.LBB60_31:
	s_or_b32 exec_lo, exec_lo, s18
	v_add_nc_u32_e32 v7, 15, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s18, s66, v7
	s_and_saveexec_b32 s19, s18
	s_cbranch_execz .LBB60_33
; %bb.32:
	global_load_b32 v29, v[1:2], off offset:60
.LBB60_33:
	s_or_b32 exec_lo, exec_lo, s19
	v_add_nc_u32_e32 v7, 16, v32
	v_mov_b32_e32 v31, -1
	v_mov_b32_e32 v33, -1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s19, s66, v7
	s_and_saveexec_b32 s20, s19
	s_cbranch_execz .LBB60_35
; %bb.34:
	global_load_b32 v33, v[1:2], off offset:64
.LBB60_35:
	s_or_b32 exec_lo, exec_lo, s20
	v_add_nc_u32_e32 v7, 17, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s20, s66, v7
	s_and_saveexec_b32 s21, s20
	s_cbranch_execz .LBB60_37
; %bb.36:
	global_load_b32 v31, v[1:2], off offset:68
.LBB60_37:
	s_or_b32 exec_lo, exec_lo, s21
	v_dual_mov_b32 v34, -1 :: v_dual_add_nc_u32 v7, 18, v32
	v_mov_b32_e32 v35, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s21, s66, v7
	s_and_saveexec_b32 s22, s21
	s_cbranch_execz .LBB60_39
; %bb.38:
	global_load_b32 v35, v[1:2], off offset:72
.LBB60_39:
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v7, 19, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s22, s66, v7
	s_and_saveexec_b32 s23, s22
	s_cbranch_execz .LBB60_41
; %bb.40:
	global_load_b32 v34, v[1:2], off offset:76
.LBB60_41:
	s_or_b32 exec_lo, exec_lo, s23
	v_dual_mov_b32 v36, -1 :: v_dual_add_nc_u32 v7, 20, v32
	v_mov_b32_e32 v37, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s23, s66, v7
	s_and_saveexec_b32 s24, s23
	s_cbranch_execz .LBB60_43
; %bb.42:
	global_load_b32 v36, v[1:2], off offset:80
.LBB60_43:
	s_or_b32 exec_lo, exec_lo, s24
	v_add_nc_u32_e32 v7, 21, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s24, s66, v7
	s_and_saveexec_b32 s25, s24
	s_cbranch_execz .LBB60_45
; %bb.44:
	global_load_b32 v37, v[1:2], off offset:84
.LBB60_45:
	s_or_b32 exec_lo, exec_lo, s25
	v_dual_mov_b32 v38, -1 :: v_dual_add_nc_u32 v7, 22, v32
	v_mov_b32_e32 v39, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s25, s66, v7
	s_and_saveexec_b32 s26, s25
	s_cbranch_execz .LBB60_47
; %bb.46:
	global_load_b32 v39, v[1:2], off offset:88
.LBB60_47:
	s_or_b32 exec_lo, exec_lo, s26
	v_add_nc_u32_e32 v7, 23, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s26, s66, v7
	s_and_saveexec_b32 s27, s26
	s_cbranch_execz .LBB60_49
; %bb.48:
	global_load_b32 v38, v[1:2], off offset:92
.LBB60_49:
	s_or_b32 exec_lo, exec_lo, s27
	v_dual_mov_b32 v40, -1 :: v_dual_add_nc_u32 v7, 24, v32
	v_mov_b32_e32 v41, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s27, s66, v7
	s_and_saveexec_b32 s28, s27
	s_cbranch_execz .LBB60_51
; %bb.50:
	global_load_b32 v41, v[1:2], off offset:96
.LBB60_51:
	s_or_b32 exec_lo, exec_lo, s28
	v_add_nc_u32_e32 v7, 25, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s28, s66, v7
	s_and_saveexec_b32 s29, s28
	s_cbranch_execz .LBB60_53
; %bb.52:
	global_load_b32 v40, v[1:2], off offset:100
.LBB60_53:
	s_or_b32 exec_lo, exec_lo, s29
	v_dual_mov_b32 v42, -1 :: v_dual_add_nc_u32 v7, 26, v32
	v_mov_b32_e32 v43, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s29, s66, v7
	s_and_saveexec_b32 s30, s29
	s_cbranch_execz .LBB60_55
; %bb.54:
	global_load_b32 v43, v[1:2], off offset:104
.LBB60_55:
	s_or_b32 exec_lo, exec_lo, s30
	v_add_nc_u32_e32 v7, 27, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s30, s66, v7
	s_and_saveexec_b32 s31, s30
	s_cbranch_execz .LBB60_57
; %bb.56:
	global_load_b32 v42, v[1:2], off offset:108
.LBB60_57:
	s_or_b32 exec_lo, exec_lo, s31
	v_dual_mov_b32 v44, -1 :: v_dual_add_nc_u32 v7, 28, v32
	v_mov_b32_e32 v45, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s31, s66, v7
	s_and_saveexec_b32 s33, s31
	s_cbranch_execz .LBB60_59
; %bb.58:
	global_load_b32 v45, v[1:2], off offset:112
.LBB60_59:
	s_or_b32 exec_lo, exec_lo, s33
	v_add_nc_u32_e32 v7, 29, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s33, s66, v7
	s_and_saveexec_b32 s34, s33
	s_cbranch_execz .LBB60_61
; %bb.60:
	global_load_b32 v44, v[1:2], off offset:116
.LBB60_61:
	s_or_b32 exec_lo, exec_lo, s34
	v_dual_mov_b32 v46, -1 :: v_dual_add_nc_u32 v7, 30, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s34, s66, v7
	s_and_saveexec_b32 s35, s34
	s_cbranch_execz .LBB60_63
; %bb.62:
	global_load_b32 v46, v[1:2], off offset:120
.LBB60_63:                              ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIjEEjLj31EjEEvjT_RAT1__T0_jT2_.exit.i.i
	s_or_b32 exec_lo, exec_lo, s35
	v_or_b32_e32 v1, 0xfffffe00, v0
	v_dual_mov_b32 v7, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_mov_b32 s35, 0
.LBB60_64:                              ; %.lr.ph.i.i.i.i.i.i25.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v1, 0x200, v1
	ds_store_b32 v2, v7
	v_add_nc_u32_e32 v2, 0x800, v2
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v1
	s_or_b32 s35, vcc_lo, s35
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB60_64
; %bb.65:                               ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i27.i
	s_or_b32 exec_lo, exec_lo, s35
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_lshl_b32 s35, -1, s81
	v_lshrrev_b32_e32 v11, s80, v6
	s_not_b32 s67, s35
	s_mov_b32 s39, exec_lo
	v_and_b32_e32 v1, s67, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v2, 9, v1
	v_lshrrev_b32_e32 v1, 3, v1
	v_and_or_b32 v2, 0xe00, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v2
	v_add_lshl_u32 v7, v2, v1, 1
	v_lshrrev_b32_e32 v2, s80, v3
	ds_load_u16 v1, v7
	v_and_b32_e32 v2, s67, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 9, v2
	v_lshrrev_b32_e32 v2, 3, v2
	v_and_or_b32 v8, 0xe00, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 1, v8
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v10, v1, 1
	v_add_lshl_u32 v8, v8, v2, 1
	ds_store_b16 v7, v10
	ds_load_u16 v2, v8
	v_and_b32_e32 v10, s67, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 9, v10
	v_lshrrev_b32_e32 v10, 3, v10
	v_and_or_b32 v11, 0xe00, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 1, v11
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v12, v2, 1
	v_add_lshl_u32 v18, v11, v10, 1
	v_lshrrev_b32_e32 v11, s80, v5
	ds_store_b16 v8, v12
	ds_load_u16 v10, v18
	v_and_b32_e32 v11, s67, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 9, v11
	v_lshrrev_b32_e32 v11, 3, v11
	v_and_or_b32 v12, 0xe00, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 1, v12
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v13, v10, 1
	v_add_lshl_u32 v20, v12, v11, 1
	v_lshrrev_b32_e32 v12, s80, v17
	ds_store_b16 v18, v13
	ds_load_u16 v11, v20
	v_and_b32_e32 v12, s67, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 9, v12
	v_lshrrev_b32_e32 v12, 3, v12
	v_and_or_b32 v13, 0xe00, v13, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 1, v13
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v14, v11, 1
	v_add_lshl_u32 v48, v13, v12, 1
	v_lshrrev_b32_e32 v13, s80, v16
	ds_store_b16 v20, v14
	ds_load_u16 v12, v48
	v_and_b32_e32 v13, s67, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 9, v13
	v_lshrrev_b32_e32 v13, 3, v13
	v_and_or_b32 v14, 0xe00, v14, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 1, v14
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v15, v12, 1
	v_add_lshl_u32 v50, v14, v13, 1
	v_lshrrev_b32_e32 v14, s80, v22
	ds_store_b16 v48, v15
	ds_load_u16 v13, v50
	v_and_b32_e32 v14, s67, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v15, 9, v14
	v_lshrrev_b32_e32 v14, 3, v14
	v_and_or_b32 v15, 0xe00, v15, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v15, 1, v15
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v19, v13, 1
	v_add_lshl_u32 v52, v15, v14, 1
	v_lshrrev_b32_e32 v15, s80, v21
	ds_store_b16 v50, v19
	ds_load_u16 v14, v52
	v_and_b32_e32 v15, s67, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v19, 9, v15
	v_lshrrev_b32_e32 v15, 3, v15
	v_and_or_b32 v19, 0xe00, v19, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v19, 1, v19
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v47, v14, 1
	v_add_lshl_u32 v54, v19, v15, 1
	v_lshrrev_b32_e32 v19, s80, v24
	ds_store_b16 v52, v47
	ds_load_u16 v15, v54
	v_and_b32_e32 v19, s67, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v47, 9, v19
	v_lshrrev_b32_e32 v19, 3, v19
	v_and_or_b32 v47, 0xe00, v47, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v47, 1, v47
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v49, v15, 1
	v_add_lshl_u32 v56, v47, v19, 1
	v_lshrrev_b32_e32 v47, s80, v23
	ds_store_b16 v54, v49
	ds_load_u16 v19, v56
	v_and_b32_e32 v47, s67, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v49, 9, v47
	v_lshrrev_b32_e32 v47, 3, v47
	v_and_or_b32 v49, 0xe00, v49, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v49, 1, v49
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v51, v19, 1
	v_add_lshl_u32 v58, v49, v47, 1
	v_lshrrev_b32_e32 v49, s80, v25
	ds_store_b16 v56, v51
	ds_load_u16 v47, v58
	v_and_b32_e32 v49, s67, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v51, 9, v49
	v_lshrrev_b32_e32 v49, 3, v49
	v_and_or_b32 v51, 0xe00, v51, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v51, 1, v51
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v53, v47, 1
	v_add_lshl_u32 v60, v51, v49, 1
	v_lshrrev_b32_e32 v51, s80, v26
	ds_store_b16 v58, v53
	ds_load_u16 v49, v60
	v_and_b32_e32 v51, s67, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v53, 9, v51
	v_lshrrev_b32_e32 v51, 3, v51
	v_and_or_b32 v53, 0xe00, v53, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v53, 1, v53
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v55, v49, 1
	v_add_lshl_u32 v62, v53, v51, 1
	v_lshrrev_b32_e32 v53, s80, v28
	ds_store_b16 v60, v55
	ds_load_u16 v51, v62
	v_and_b32_e32 v53, s67, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v55, 9, v53
	v_lshrrev_b32_e32 v53, 3, v53
	v_and_or_b32 v55, 0xe00, v55, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v55, 1, v55
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v57, v51, 1
	v_add_lshl_u32 v64, v55, v53, 1
	v_lshrrev_b32_e32 v55, s80, v27
	ds_store_b16 v62, v57
	ds_load_u16 v53, v64
	v_and_b32_e32 v55, s67, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v57, 9, v55
	v_lshrrev_b32_e32 v55, 3, v55
	v_and_or_b32 v57, 0xe00, v57, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v57, 1, v57
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v59, v53, 1
	v_add_lshl_u32 v66, v57, v55, 1
	v_lshrrev_b32_e32 v57, s80, v30
	ds_store_b16 v64, v59
	ds_load_u16 v55, v66
	v_and_b32_e32 v57, s67, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v59, 9, v57
	v_lshrrev_b32_e32 v57, 3, v57
	v_and_or_b32 v59, 0xe00, v59, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v59, 1, v59
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v61, v55, 1
	v_add_lshl_u32 v68, v59, v57, 1
	v_lshrrev_b32_e32 v59, s80, v29
	ds_store_b16 v66, v61
	ds_load_u16 v57, v68
	v_and_b32_e32 v59, s67, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v61, 9, v59
	v_lshrrev_b32_e32 v59, 3, v59
	v_and_or_b32 v61, 0xe00, v61, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v61, 1, v61
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v63, v57, 1
	v_add_lshl_u32 v70, v61, v59, 1
	v_lshrrev_b32_e32 v61, s80, v33
	ds_store_b16 v68, v63
	ds_load_u16 v59, v70
	v_and_b32_e32 v61, s67, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v63, 9, v61
	v_lshrrev_b32_e32 v61, 3, v61
	v_and_or_b32 v63, 0xe00, v63, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v63, 1, v63
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v65, v59, 1
	v_add_lshl_u32 v72, v63, v61, 1
	v_lshrrev_b32_e32 v63, s80, v31
	ds_store_b16 v70, v65
	ds_load_u16 v61, v72
	v_and_b32_e32 v63, s67, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v65, 9, v63
	v_lshrrev_b32_e32 v63, 3, v63
	v_and_or_b32 v65, 0xe00, v65, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v65, 1, v65
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v67, v61, 1
	v_add_lshl_u32 v74, v65, v63, 1
	v_lshrrev_b32_e32 v65, s80, v35
	ds_store_b16 v72, v67
	ds_load_u16 v63, v74
	v_and_b32_e32 v65, s67, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v67, 9, v65
	v_lshrrev_b32_e32 v65, 3, v65
	v_and_or_b32 v67, 0xe00, v67, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v67, 1, v67
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v69, v63, 1
	v_add_lshl_u32 v76, v67, v65, 1
	v_lshrrev_b32_e32 v67, s80, v34
	ds_store_b16 v74, v69
	ds_load_u16 v65, v76
	v_and_b32_e32 v67, s67, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v69, 9, v67
	v_lshrrev_b32_e32 v67, 3, v67
	v_and_or_b32 v69, 0xe00, v69, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v69, 1, v69
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v71, v65, 1
	v_add_lshl_u32 v78, v69, v67, 1
	v_lshrrev_b32_e32 v69, s80, v36
	ds_store_b16 v76, v71
	ds_load_u16 v67, v78
	v_and_b32_e32 v69, s67, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v71, 9, v69
	v_lshrrev_b32_e32 v69, 3, v69
	v_and_or_b32 v71, 0xe00, v71, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v71, 1, v71
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v73, v67, 1
	v_add_lshl_u32 v80, v71, v69, 1
	v_lshrrev_b32_e32 v71, s80, v37
	ds_store_b16 v78, v73
	ds_load_u16 v69, v80
	v_and_b32_e32 v71, s67, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v73, 9, v71
	v_lshrrev_b32_e32 v71, 3, v71
	v_and_or_b32 v73, 0xe00, v73, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v73, 1, v73
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v75, v69, 1
	v_add_lshl_u32 v82, v73, v71, 1
	v_lshrrev_b32_e32 v73, s80, v39
	ds_store_b16 v80, v75
	ds_load_u16 v71, v82
	v_and_b32_e32 v73, s67, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v75, 9, v73
	v_lshrrev_b32_e32 v73, 3, v73
	v_and_or_b32 v75, 0xe00, v75, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v75, 1, v75
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v77, v71, 1
	v_add_lshl_u32 v84, v75, v73, 1
	v_lshrrev_b32_e32 v75, s80, v38
	ds_store_b16 v82, v77
	ds_load_u16 v73, v84
	v_and_b32_e32 v75, s67, v75
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v77, 9, v75
	v_lshrrev_b32_e32 v75, 3, v75
	v_and_or_b32 v77, 0xe00, v77, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v77, 1, v77
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v79, v73, 1
	v_add_lshl_u32 v86, v77, v75, 1
	v_lshrrev_b32_e32 v77, s80, v41
	ds_store_b16 v84, v79
	ds_load_u16 v75, v86
	v_and_b32_e32 v77, s67, v77
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v79, 9, v77
	v_lshrrev_b32_e32 v77, 3, v77
	v_and_or_b32 v79, 0xe00, v79, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v79, 1, v79
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v81, v75, 1
	v_add_lshl_u32 v88, v79, v77, 1
	v_lshrrev_b32_e32 v79, s80, v40
	ds_store_b16 v86, v81
	ds_load_u16 v77, v88
	v_and_b32_e32 v79, s67, v79
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v81, 9, v79
	v_lshrrev_b32_e32 v79, 3, v79
	v_and_or_b32 v81, 0xe00, v81, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v81, 1, v81
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v83, v77, 1
	v_add_lshl_u32 v90, v81, v79, 1
	v_lshrrev_b32_e32 v81, s80, v43
	ds_store_b16 v88, v83
	ds_load_u16 v79, v90
	v_and_b32_e32 v81, s67, v81
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v83, 9, v81
	v_lshrrev_b32_e32 v81, 3, v81
	v_and_or_b32 v83, 0xe00, v83, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v83, 1, v83
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v85, v79, 1
	v_add_lshl_u32 v91, v83, v81, 1
	v_lshrrev_b32_e32 v83, s80, v42
	ds_store_b16 v90, v85
	ds_load_u16 v81, v91
	v_and_b32_e32 v83, s67, v83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v85, 9, v83
	v_lshrrev_b32_e32 v83, 3, v83
	v_and_or_b32 v85, 0xe00, v85, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v85, 1, v85
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v87, v81, 1
	v_add_lshl_u32 v92, v85, v83, 1
	v_lshrrev_b32_e32 v85, s80, v45
	ds_store_b16 v91, v87
	ds_load_u16 v83, v92
	v_and_b32_e32 v85, s67, v85
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v87, 9, v85
	v_lshrrev_b32_e32 v85, 3, v85
	v_and_or_b32 v87, 0xe00, v87, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v87, 1, v87
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v89, v83, 1
	v_add_lshl_u32 v93, v87, v85, 1
	v_lshrrev_b32_e32 v87, s80, v44
	ds_store_b16 v92, v89
	ds_load_u16 v85, v93
	v_and_b32_e32 v87, s67, v87
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v89, 9, v87
	v_lshrrev_b32_e32 v87, 3, v87
	v_and_or_b32 v89, 0xe00, v89, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v89, 1, v89
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v85, 1
	v_add_lshl_u32 v94, v89, v87, 1
	v_lshrrev_b32_e32 v89, s80, v46
	ds_store_b16 v93, v95
	ds_load_u16 v87, v94
	v_and_b32_e32 v89, s67, v89
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v95, 9, v89
	v_lshrrev_b32_e32 v89, 3, v89
	v_and_or_b32 v95, 0xe00, v95, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v95, 1, v95
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v87, 1
	v_add_lshl_u32 v95, v95, v89, 1
	ds_store_b16 v94, v96
	ds_load_u16 v89, v95
	v_lshlrev_b32_e32 v96, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v97, v89, 1
	ds_store_b16 v95, v97
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[97:100], v96 offset1:1
	ds_load_2addr_b64 v[101:104], v96 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v97, v98, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v97, v97, v99, v100
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v98, v97, v101, v102
	v_mbcnt_lo_u32_b32 v97, -1, 0
	v_or_b32_e32 v101, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v98, v98, v103, v104
	v_and_b32_e32 v99, 15, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v100, v98 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s35, 0, v99
	v_cmp_lt_u32_e64 s36, 1, v99
	v_cmp_lt_u32_e64 s37, 3, v99
	v_cmp_lt_u32_e64 s38, 7, v99
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v100, v100, 0, s35
	v_add_nc_u32_e32 v98, v100, v98
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v100, v98 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v100, 0, v100, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v98, v98, v100
	v_mov_b32_dpp v100, v98 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v100, 0, v100, s37
	v_add_nc_u32_e32 v98, v98, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v100, v98 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v100, s38
	v_bfe_i32 v100, v97, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v98, v98, v99
	ds_swizzle_b32 v99, v98 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v99, v100, v99
	v_lshrrev_b32_e32 v100, 5, v0
	v_add_nc_u32_e32 v98, v98, v99
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v99, 2, v100
	v_cmpx_eq_u32_e64 v101, v0
	s_cbranch_execz .LBB60_67
; %bb.66:
	ds_store_b32 v99, v98 offset:16384
.LBB60_67:
	s_or_b32 exec_lo, exec_lo, s39
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s39, vcc_lo
	s_cbranch_execz .LBB60_69
; %bb.68:
	v_mad_i32_i24 v100, 0xffffffe4, v0, v96
	ds_load_b32 v101, v100 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v102, v101 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v102, v102, 0, s35
	v_add_nc_u32_e32 v101, v102, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v102, v101 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v102, 0, v102, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v101, v102
	v_mov_b32_dpp v102, v101 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v102, 0, v102, s37
	v_add_nc_u32_e32 v101, v101, v102
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v102, v101 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v102, 0, v102, s38
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v101, v102
	ds_store_b32 v100, v101 offset:16384
.LBB60_69:                              ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i36.i
	s_or_b32 exec_lo, exec_lo, s39
	v_dual_mov_b32 v101, 0 :: v_dual_mov_b32 v100, 0
	s_mov_b32 s36, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB60_71
; %bb.70:
	ds_load_b32 v100, v99 offset:16380
.LBB60_71:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjjjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb0EN6thrust10device_ptrIjEESB_SB_SB_EEvT0_T1_T2_T3_PjSG_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESD_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s36
	v_add_nc_u32_e32 v99, -1, v97
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v98, v100, v98
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s35, 0, v99
	v_cndmask_b32_e64 v99, v99, v97, s35
	v_cmp_eq_u32_e64 s35, 0, v97
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v99, 2, v99
	ds_bpermute_b32 v98, v99, v98
	ds_load_b32 v99, v101 offset:16444
	ds_load_2addr_b64 v[101:104], v96 offset1:1
	ds_load_b32 v105, v96 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v97, v98, v100, s35
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v97, v99, 16, v97
	ds_load_b64 v[99:100], v96 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v98, v97, v101
	v_add_nc_u32_e32 v101, v102, v98
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v102, v103, v101
	v_add_nc_u32_e32 v103, v104, v102
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v104, v99, v103
	v_add_nc_u32_e32 v99, v100, v104
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v105, v99
	ds_store_2addr_b64 v96, v[97:98], v[101:102] offset1:1
	ds_store_2addr_b64 v96, v[103:104], v[99:100] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v96, v7
	ds_load_u16 v97, v8
	ds_load_u16 v98, v18
	ds_load_u16 v20, v20
	ds_load_u16 v48, v48
	ds_load_u16 v50, v50
	ds_load_u16 v52, v52
	ds_load_u16 v54, v54
	ds_load_u16 v56, v56
	ds_load_u16 v58, v58
	ds_load_u16 v60, v60
	ds_load_u16 v62, v62
	ds_load_u16 v64, v64
	ds_load_u16 v66, v66
	ds_load_u16 v68, v68
	ds_load_u16 v70, v70
	ds_load_u16 v72, v72
	ds_load_u16 v74, v74
	ds_load_u16 v76, v76
	ds_load_u16 v78, v78
	ds_load_u16 v80, v80
	ds_load_u16 v82, v82
	ds_load_u16 v84, v84
	ds_load_u16 v86, v86
	ds_load_u16 v88, v88
	ds_load_u16 v90, v90
	ds_load_u16 v91, v91
	ds_load_u16 v92, v92
	ds_load_u16 v93, v93
	ds_load_u16 v94, v94
	ds_load_u16 v18, v95
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB60_75
; %bb.72:
	v_lshrrev_b32_e32 v7, 3, v0
	v_lshlrev_b32_e32 v8, 10, v0
	v_add_nc_u32_e32 v95, 1, v0
	s_mov_b32 s37, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v7, 0x1c00, v8, v7
	v_dual_mov_b32 v8, 0x3e00 :: v_dual_lshlrev_b32 v7, 1, v7
	ds_load_u16 v7, v7
	v_cmpx_ne_u32_e32 16, v95
	s_cbranch_execz .LBB60_74
; %bb.73:
	v_lshlrev_b32_e32 v8, 10, v95
	v_lshrrev_b32_e32 v95, 3, v95
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v8, 0x1c00, v8, v95
	v_lshlrev_b32_e32 v8, 1, v8
	ds_load_u16 v8, v8
.LBB60_74:
	s_or_b32 exec_lo, exec_lo, s37
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v8, v7
.LBB60_75:                              ; %Flow154
	s_or_b32 exec_lo, exec_lo, s36
	v_and_b32_e32 v1, 0xffff, v1
	v_and_b32_e32 v2, 0xffff, v2
	v_and_b32_e32 v95, 0xffff, v10
	v_and_b32_e32 v99, 0xffff, v11
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v10, 0xffff, v96
	s_waitcnt lgkmcnt(29)
	v_and_b32_e32 v11, 0xffff, v97
	v_and_b32_e32 v100, 0xffff, v12
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v12, 0xffff, v98
	v_and_b32_e32 v101, 0xffff, v13
	s_waitcnt lgkmcnt(27)
	v_and_b32_e32 v13, 0xffff, v20
	v_and_b32_e32 v102, 0xffff, v14
	s_waitcnt lgkmcnt(26)
	v_and_b32_e32 v14, 0xffff, v48
	v_and_b32_e32 v103, 0xffff, v15
	s_waitcnt lgkmcnt(25)
	v_and_b32_e32 v15, 0xffff, v50
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v20, 0xffff, v52
	v_add_lshl_u32 v10, v10, v1, 2
	v_add_lshl_u32 v11, v11, v2, 2
	s_waitcnt lgkmcnt(23)
	v_and_b32_e32 v48, 0xffff, v54
	v_add_lshl_u32 v12, v12, v95, 2
	v_and_b32_e32 v19, 0xffff, v19
	s_waitcnt lgkmcnt(22)
	v_and_b32_e32 v50, 0xffff, v56
	v_add_lshl_u32 v13, v13, v99, 2
	v_and_b32_e32 v47, 0xffff, v47
	s_waitcnt lgkmcnt(21)
	v_and_b32_e32 v52, 0xffff, v58
	v_add_lshl_u32 v14, v14, v100, 2
	v_and_b32_e32 v49, 0xffff, v49
	s_waitcnt lgkmcnt(20)
	v_and_b32_e32 v54, 0xffff, v60
	v_add_lshl_u32 v15, v15, v101, 2
	v_and_b32_e32 v51, 0xffff, v51
	s_waitcnt lgkmcnt(19)
	v_and_b32_e32 v56, 0xffff, v62
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v10, v4 offset:64
	ds_store_b32 v11, v3 offset:64
	ds_store_b32 v12, v6 offset:64
	ds_store_b32 v13, v5 offset:64
	ds_store_b32 v14, v17 offset:64
	ds_store_b32 v15, v16 offset:64
	v_add_lshl_u32 v16, v20, v102, 2
	v_and_b32_e32 v53, 0xffff, v53
	v_and_b32_e32 v58, 0xffff, v64
	v_add_lshl_u32 v17, v48, v103, 2
	v_and_b32_e32 v55, 0xffff, v55
	v_and_b32_e32 v60, 0xffff, v66
	v_and_b32_e32 v1, 0xffff, v18
	v_add_lshl_u32 v18, v50, v19, 2
	v_and_b32_e32 v57, 0xffff, v57
	v_and_b32_e32 v62, 0xffff, v68
	v_add_lshl_u32 v19, v52, v47, 2
	v_and_b32_e32 v59, 0xffff, v59
	v_and_b32_e32 v64, 0xffff, v70
	v_add_lshl_u32 v20, v54, v49, 2
	v_and_b32_e32 v61, 0xffff, v61
	v_and_b32_e32 v66, 0xffff, v72
	ds_store_b32 v16, v22 offset:64
	ds_store_b32 v17, v21 offset:64
	ds_store_b32 v18, v24 offset:64
	ds_store_b32 v19, v23 offset:64
	ds_store_b32 v20, v25 offset:64
	v_add_lshl_u32 v21, v56, v51, 2
	v_and_b32_e32 v63, 0xffff, v63
	v_and_b32_e32 v68, 0xffff, v74
	v_add_lshl_u32 v22, v58, v53, 2
	v_and_b32_e32 v65, 0xffff, v65
	v_and_b32_e32 v70, 0xffff, v76
	v_add_lshl_u32 v23, v60, v55, 2
	v_and_b32_e32 v67, 0xffff, v67
	v_and_b32_e32 v72, 0xffff, v78
	v_add_lshl_u32 v24, v62, v57, 2
	v_and_b32_e32 v69, 0xffff, v69
	v_and_b32_e32 v74, 0xffff, v80
	v_add_lshl_u32 v25, v64, v59, 2
	v_and_b32_e32 v71, 0xffff, v71
	v_and_b32_e32 v76, 0xffff, v82
	ds_store_b32 v21, v26 offset:64
	ds_store_b32 v22, v28 offset:64
	ds_store_b32 v23, v27 offset:64
	ds_store_b32 v24, v30 offset:64
	ds_store_b32 v25, v29 offset:64
	v_add_lshl_u32 v26, v66, v61, 2
	v_and_b32_e32 v73, 0xffff, v73
	v_and_b32_e32 v78, 0xffff, v84
	v_add_lshl_u32 v27, v68, v63, 2
	v_and_b32_e32 v75, 0xffff, v75
	v_and_b32_e32 v80, 0xffff, v86
	v_add_lshl_u32 v28, v70, v65, 2
	v_and_b32_e32 v77, 0xffff, v77
	v_and_b32_e32 v82, 0xffff, v88
	v_add_lshl_u32 v29, v72, v67, 2
	v_and_b32_e32 v79, 0xffff, v79
	v_and_b32_e32 v84, 0xffff, v90
	v_add_lshl_u32 v30, v74, v69, 2
	v_and_b32_e32 v81, 0xffff, v81
	v_and_b32_e32 v83, 0xffff, v83
	v_and_b32_e32 v85, 0xffff, v85
	v_and_b32_e32 v87, 0xffff, v87
	v_and_b32_e32 v89, 0xffff, v89
	v_and_b32_e32 v86, 0xffff, v91
	v_and_b32_e32 v88, 0xffff, v92
	v_and_b32_e32 v90, 0xffff, v93
	v_and_b32_e32 v91, 0xffff, v94
	ds_store_b32 v26, v33 offset:64
	ds_store_b32 v27, v31 offset:64
	ds_store_b32 v28, v35 offset:64
	ds_store_b32 v29, v34 offset:64
	ds_store_b32 v30, v36 offset:64
	v_add_lshl_u32 v31, v76, v71, 2
	v_add_lshl_u32 v33, v78, v73, 2
	v_add_lshl_u32 v34, v80, v75, 2
	v_add_lshl_u32 v35, v82, v77, 2
	v_add_lshl_u32 v36, v84, v79, 2
	ds_store_b32 v31, v37 offset:64
	ds_store_b32 v33, v39 offset:64
	ds_store_b32 v34, v38 offset:64
	ds_store_b32 v35, v41 offset:64
	ds_store_b32 v36, v40 offset:64
	v_add_lshl_u32 v37, v86, v81, 2
	v_add_lshl_u32 v38, v88, v83, 2
	v_add_lshl_u32 v39, v90, v85, 2
	v_add_lshl_u32 v40, v91, v87, 2
	v_add_lshl_u32 v41, v1, v89, 2
	ds_store_b32 v37, v43 offset:64
	ds_store_b32 v38, v42 offset:64
	ds_store_b32 v39, v45 offset:64
	ds_store_b32 v40, v44 offset:64
	ds_store_b32 v41, v46 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB60_86
; %bb.76:
	v_lshl_or_b32 v3, s15, 4, v0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v42, 0
	s_mov_b32 s37, 0
	s_mov_b32 s38, s15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v8
	v_add_co_u32 v1, s35, s84, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s35, s85, v2, s35
                                        ; implicit-def: $sgpr35
	global_store_b32 v[1:2], v3, off
.LBB60_77:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB60_80 Depth 2
	s_or_b32 s35, s35, exec_lo
	s_cmp_eq_u32 s38, 0
	s_cbranch_scc1 .LBB60_83
; %bb.78:                               ;   in Loop: Header=BB60_77 Depth=1
	s_add_i32 s38, s38, -1
	s_mov_b32 s39, exec_lo
	v_lshl_or_b32 v3, s38, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s35, s84, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s35, s85, v6, s35
	global_load_b32 v43, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v43
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB60_82
; %bb.79:                               ; %.lr.ph.i46.i.preheader
                                        ;   in Loop: Header=BB60_77 Depth=1
	s_mov_b32 s40, 0
.LBB60_80:                              ; %.lr.ph.i46.i
                                        ;   Parent Loop BB60_77 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v43, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s35, 0, v3
	s_or_b32 s40, s35, s40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s40
	s_cbranch_execnz .LBB60_80
; %bb.81:                               ; %Flow
                                        ;   in Loop: Header=BB60_77 Depth=1
	s_or_b32 exec_lo, exec_lo, s40
.LBB60_82:                              ; %Flow151
                                        ;   in Loop: Header=BB60_77 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s39
	v_and_b32_e32 v5, 0x3fffffff, v43
	v_cmp_eq_u32_e64 s35, 0x80000000, v3
	v_add_nc_u32_e32 v42, v5, v42
	s_branch .LBB60_84
.LBB60_83:                              ;   in Loop: Header=BB60_77 Depth=1
                                        ; implicit-def: $sgpr38
.LBB60_84:                              ; %Flow152
                                        ;   in Loop: Header=BB60_77 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s39, exec_lo, s35
	s_or_b32 s37, s39, s37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s37
	s_cbranch_execnz .LBB60_77
; %bb.85:
	s_or_b32 exec_lo, exec_lo, s37
	v_add_nc_u32_e32 v3, v42, v8
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v42, v7
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	ds_store_b32 v4, v1
.LBB60_86:                              ; %Flow153
	s_or_b32 exec_lo, exec_lo, s36
	v_cmp_gt_u32_e64 s35, s66, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s37, s35
	s_cbranch_execz .LBB60_88
; %bb.87:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v3, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s36, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s36, s71, v2, s36
	global_store_b32 v[1:2], v3, off
.LBB60_88:
	s_or_b32 exec_lo, exec_lo, s37
	v_or_b32_e32 v3, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s36, s66, v3
	s_and_saveexec_b32 s38, s36
	s_cbranch_execz .LBB60_90
; %bb.89:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v4, v1 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s37, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s37, s71, v2, s37
	global_store_b32 v[1:2], v4, off
.LBB60_90:
	s_or_b32 exec_lo, exec_lo, s38
	v_or_b32_e32 v4, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s37, s66, v4
	s_and_saveexec_b32 s39, s37
	s_cbranch_execz .LBB60_92
; %bb.91:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v5, v1 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s38, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s38, s71, v2, s38
	global_store_b32 v[1:2], v5, off
.LBB60_92:
	s_or_b32 exec_lo, exec_lo, s39
	v_or_b32_e32 v5, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s38, s66, v5
	s_and_saveexec_b32 s40, s38
	s_cbranch_execz .LBB60_94
; %bb.93:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v6, v1 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s39, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s39, s71, v2, s39
	global_store_b32 v[1:2], v6, off
.LBB60_94:
	s_or_b32 exec_lo, exec_lo, s40
	v_or_b32_e32 v6, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s39, s66, v6
	s_and_saveexec_b32 s41, s39
	s_cbranch_execz .LBB60_96
; %bb.95:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v42, v1 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s40, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s40, s71, v2, s40
	global_store_b32 v[1:2], v42, off
.LBB60_96:
	s_or_b32 exec_lo, exec_lo, s41
	v_or_b32_e32 v42, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s40, s66, v42
	s_and_saveexec_b32 s42, s40
	s_cbranch_execz .LBB60_98
; %bb.97:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v43, v1 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s41, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s41, s71, v2, s41
	global_store_b32 v[1:2], v43, off
.LBB60_98:
	s_or_b32 exec_lo, exec_lo, s42
	v_or_b32_e32 v43, 0xc00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s41, s66, v43
	s_and_saveexec_b32 s43, s41
	s_cbranch_execz .LBB60_100
; %bb.99:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v44, v1 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s42, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s42, s71, v2, s42
	global_store_b32 v[1:2], v44, off
.LBB60_100:
	s_or_b32 exec_lo, exec_lo, s43
	v_or_b32_e32 v44, 0xe00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s42, s66, v44
	s_and_saveexec_b32 s44, s42
	s_cbranch_execz .LBB60_102
; %bb.101:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v45, v1 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s43, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s43, s71, v2, s43
	global_store_b32 v[1:2], v45, off
.LBB60_102:
	s_or_b32 exec_lo, exec_lo, s44
	v_or_b32_e32 v45, 0x1000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s43, s66, v45
	s_and_saveexec_b32 s45, s43
	s_cbranch_execz .LBB60_104
; %bb.103:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v46, v1 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s44, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s44, s71, v2, s44
	global_store_b32 v[1:2], v46, off
.LBB60_104:
	s_or_b32 exec_lo, exec_lo, s45
	v_or_b32_e32 v46, 0x1200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s44, s66, v46
	s_and_saveexec_b32 s46, s44
	s_cbranch_execz .LBB60_106
; %bb.105:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v47, v1 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s45, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s45, s71, v2, s45
	global_store_b32 v[1:2], v47, off
.LBB60_106:
	s_or_b32 exec_lo, exec_lo, s46
	v_or_b32_e32 v47, 0x1400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s45, s66, v47
	s_and_saveexec_b32 s47, s45
	s_cbranch_execz .LBB60_108
; %bb.107:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v48, v1 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s46, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s46, s71, v2, s46
	global_store_b32 v[1:2], v48, off
.LBB60_108:
	s_or_b32 exec_lo, exec_lo, s47
	v_or_b32_e32 v48, 0x1600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s46, s66, v48
	s_and_saveexec_b32 s48, s46
	s_cbranch_execz .LBB60_110
; %bb.109:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v49, v1 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s47, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s47, s71, v2, s47
	global_store_b32 v[1:2], v49, off
.LBB60_110:
	s_or_b32 exec_lo, exec_lo, s48
	v_or_b32_e32 v49, 0x1800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s47, s66, v49
	s_and_saveexec_b32 s49, s47
	s_cbranch_execz .LBB60_112
; %bb.111:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v50, v1 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s48, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s48, s71, v2, s48
	global_store_b32 v[1:2], v50, off
.LBB60_112:
	s_or_b32 exec_lo, exec_lo, s49
	v_or_b32_e32 v50, 0x1a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s48, s66, v50
	s_and_saveexec_b32 s50, s48
	s_cbranch_execz .LBB60_114
; %bb.113:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v51, v1 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s49, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s49, s71, v2, s49
	global_store_b32 v[1:2], v51, off
.LBB60_114:
	s_or_b32 exec_lo, exec_lo, s50
	v_or_b32_e32 v51, 0x1c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s49, s66, v51
	s_and_saveexec_b32 s51, s49
	s_cbranch_execz .LBB60_116
; %bb.115:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v52, v1 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s50, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s50, s71, v2, s50
	global_store_b32 v[1:2], v52, off
.LBB60_116:
	s_or_b32 exec_lo, exec_lo, s51
	v_or_b32_e32 v52, 0x1e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s50, s66, v52
	s_and_saveexec_b32 s52, s50
	s_cbranch_execz .LBB60_118
; %bb.117:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v53, v1 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s51, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s51, s71, v2, s51
	global_store_b32 v[1:2], v53, off
.LBB60_118:
	s_or_b32 exec_lo, exec_lo, s52
	v_or_b32_e32 v53, 0x2000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s51, s66, v53
	s_and_saveexec_b32 s53, s51
	s_cbranch_execz .LBB60_120
; %bb.119:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v54, v1 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s52, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s52, s71, v2, s52
	global_store_b32 v[1:2], v54, off
.LBB60_120:
	s_or_b32 exec_lo, exec_lo, s53
	v_or_b32_e32 v54, 0x2200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s52, s66, v54
	s_and_saveexec_b32 s54, s52
	s_cbranch_execz .LBB60_122
; %bb.121:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v55, v1 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s53, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s53, s71, v2, s53
	global_store_b32 v[1:2], v55, off
.LBB60_122:
	s_or_b32 exec_lo, exec_lo, s54
	v_or_b32_e32 v55, 0x2400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s53, s66, v55
	s_and_saveexec_b32 s55, s53
	s_cbranch_execz .LBB60_124
; %bb.123:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v56, v1 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s54, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s54, s71, v2, s54
	global_store_b32 v[1:2], v56, off
.LBB60_124:
	s_or_b32 exec_lo, exec_lo, s55
	v_or_b32_e32 v56, 0x2600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s54, s66, v56
	s_and_saveexec_b32 s56, s54
	s_cbranch_execz .LBB60_126
; %bb.125:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v57, v1 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s55, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s55, s71, v2, s55
	global_store_b32 v[1:2], v57, off
.LBB60_126:
	s_or_b32 exec_lo, exec_lo, s56
	v_or_b32_e32 v57, 0x2800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s55, s66, v57
	s_and_saveexec_b32 s57, s55
	s_cbranch_execz .LBB60_128
; %bb.127:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v58, v1 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s56, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s56, s71, v2, s56
	global_store_b32 v[1:2], v58, off
.LBB60_128:
	s_or_b32 exec_lo, exec_lo, s57
	v_or_b32_e32 v58, 0x2a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s56, s66, v58
	s_and_saveexec_b32 s58, s56
	s_cbranch_execz .LBB60_130
; %bb.129:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v59, v1 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s57, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s57, s71, v2, s57
	global_store_b32 v[1:2], v59, off
.LBB60_130:
	s_or_b32 exec_lo, exec_lo, s58
	v_or_b32_e32 v59, 0x2c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s57, s66, v59
	s_and_saveexec_b32 s59, s57
	s_cbranch_execz .LBB60_132
; %bb.131:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v60, v1 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s58, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s58, s71, v2, s58
	global_store_b32 v[1:2], v60, off
.LBB60_132:
	s_or_b32 exec_lo, exec_lo, s59
	v_or_b32_e32 v60, 0x2e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s58, s66, v60
	s_and_saveexec_b32 s60, s58
	s_cbranch_execz .LBB60_134
; %bb.133:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v61, v1 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s59, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s59, s71, v2, s59
	global_store_b32 v[1:2], v61, off
.LBB60_134:
	s_or_b32 exec_lo, exec_lo, s60
	v_or_b32_e32 v61, 0x3000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s59, s66, v61
	s_and_saveexec_b32 s61, s59
	s_cbranch_execz .LBB60_136
; %bb.135:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v62, v1 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s60, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s60, s71, v2, s60
	global_store_b32 v[1:2], v62, off
.LBB60_136:
	s_or_b32 exec_lo, exec_lo, s61
	v_or_b32_e32 v62, 0x3200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s60, s66, v62
	s_and_saveexec_b32 s62, s60
	s_cbranch_execz .LBB60_138
; %bb.137:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v63, v1 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s61, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s61, s71, v2, s61
	global_store_b32 v[1:2], v63, off
.LBB60_138:
	s_or_b32 exec_lo, exec_lo, s62
	v_or_b32_e32 v63, 0x3400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s61, s66, v63
	s_and_saveexec_b32 s63, s61
	s_cbranch_execz .LBB60_140
; %bb.139:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v64, v1 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s62, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s62, s71, v2, s62
	global_store_b32 v[1:2], v64, off
.LBB60_140:
	s_or_b32 exec_lo, exec_lo, s63
	v_or_b32_e32 v64, 0x3600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s62, s66, v64
	s_and_saveexec_b32 s64, s62
	s_cbranch_execz .LBB60_142
; %bb.141:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v65, v1 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s63, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s63, s71, v2, s63
	global_store_b32 v[1:2], v65, off
.LBB60_142:
	s_or_b32 exec_lo, exec_lo, s64
	v_or_b32_e32 v65, 0x3800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s63, s66, v65
	s_and_saveexec_b32 s65, s63
	s_cbranch_execz .LBB60_144
; %bb.143:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v66, v1 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s64, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s64, s71, v2, s64
	global_store_b32 v[1:2], v66, off
.LBB60_144:
	s_or_b32 exec_lo, exec_lo, s65
	v_or_b32_e32 v66, 0x3a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s64, s66, v66
	s_and_saveexec_b32 s87, s64
	s_cbranch_execz .LBB60_146
; %bb.145:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v67, v1 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s65, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s65, s71, v2, s65
	global_store_b32 v[1:2], v67, off
.LBB60_146:
	s_or_b32 exec_lo, exec_lo, s87
	v_or_b32_e32 v67, 0x3c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s65, s66, v67
	s_and_saveexec_b32 s87, s65
	s_cbranch_execz .LBB60_148
; %bb.147:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v68, v1 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s66, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s66, s71, v2, s66
	global_store_b32 v[1:2], v68, off
.LBB60_148:
	s_or_b32 exec_lo, exec_lo, s87
	s_add_u32 s66, s72, s82
	s_addc_u32 s82, s73, s83
	v_add_co_u32 v1, s66, s66, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v2, null, s82, 0, s66
                                        ; implicit-def: $vgpr9
	s_and_saveexec_b32 s66, s2
	s_xor_b32 s2, exec_lo, s66
	s_cbranch_execz .LBB60_150
; %bb.149:
	global_load_b32 v9, v[1:2], off
.LBB60_150:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr68
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB60_152
; %bb.151:
	global_load_b32 v68, v[1:2], off offset:4
.LBB60_152:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr69
	s_and_saveexec_b32 s2, s4
	s_cbranch_execz .LBB60_154
; %bb.153:
	global_load_b32 v69, v[1:2], off offset:8
.LBB60_154:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr70
	s_and_saveexec_b32 s2, s5
	s_cbranch_execz .LBB60_156
; %bb.155:
	global_load_b32 v70, v[1:2], off offset:12
.LBB60_156:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr71
	s_and_saveexec_b32 s2, s6
	s_cbranch_execz .LBB60_158
; %bb.157:
	global_load_b32 v71, v[1:2], off offset:16
.LBB60_158:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr73
	s_and_saveexec_b32 s2, s7
	s_cbranch_execz .LBB60_160
; %bb.159:
	global_load_b32 v73, v[1:2], off offset:20
.LBB60_160:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr75
	s_and_saveexec_b32 s2, s8
	s_cbranch_execz .LBB60_162
; %bb.161:
	global_load_b32 v75, v[1:2], off offset:24
.LBB60_162:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr77
	s_and_saveexec_b32 s2, s9
	s_cbranch_execz .LBB60_164
; %bb.163:
	global_load_b32 v77, v[1:2], off offset:28
.LBB60_164:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr79
	s_and_saveexec_b32 s2, s10
	s_cbranch_execz .LBB60_166
; %bb.165:
	global_load_b32 v79, v[1:2], off offset:32
.LBB60_166:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr81
	s_and_saveexec_b32 s2, s11
	s_cbranch_execz .LBB60_168
; %bb.167:
	global_load_b32 v81, v[1:2], off offset:36
.LBB60_168:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr83
	s_and_saveexec_b32 s2, s12
	s_cbranch_execz .LBB60_170
; %bb.169:
	global_load_b32 v83, v[1:2], off offset:40
.LBB60_170:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr85
	s_and_saveexec_b32 s2, s13
	s_cbranch_execz .LBB60_172
; %bb.171:
	global_load_b32 v85, v[1:2], off offset:44
.LBB60_172:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr87
	s_and_saveexec_b32 s2, s14
	s_cbranch_execz .LBB60_174
; %bb.173:
	global_load_b32 v87, v[1:2], off offset:48
.LBB60_174:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr89
	s_and_saveexec_b32 s2, s16
	s_cbranch_execz .LBB60_176
; %bb.175:
	global_load_b32 v89, v[1:2], off offset:52
.LBB60_176:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr92
	s_and_saveexec_b32 s2, s17
	s_cbranch_execz .LBB60_178
; %bb.177:
	global_load_b32 v92, v[1:2], off offset:56
.LBB60_178:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr94
	s_and_saveexec_b32 s2, s18
	s_cbranch_execz .LBB60_180
; %bb.179:
	global_load_b32 v94, v[1:2], off offset:60
.LBB60_180:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr96
	s_and_saveexec_b32 s2, s19
	s_cbranch_execz .LBB60_182
; %bb.181:
	global_load_b32 v96, v[1:2], off offset:64
.LBB60_182:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr98
	s_and_saveexec_b32 s2, s20
	s_cbranch_execz .LBB60_184
; %bb.183:
	global_load_b32 v98, v[1:2], off offset:68
.LBB60_184:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr100
	s_and_saveexec_b32 s2, s21
	s_cbranch_execz .LBB60_186
; %bb.185:
	global_load_b32 v100, v[1:2], off offset:72
.LBB60_186:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr102
	s_and_saveexec_b32 s2, s22
	s_cbranch_execz .LBB60_188
; %bb.187:
	global_load_b32 v102, v[1:2], off offset:76
.LBB60_188:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr104
	s_and_saveexec_b32 s2, s23
	s_cbranch_execz .LBB60_190
; %bb.189:
	global_load_b32 v104, v[1:2], off offset:80
.LBB60_190:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr106
	s_and_saveexec_b32 s2, s24
	s_cbranch_execz .LBB60_192
; %bb.191:
	global_load_b32 v106, v[1:2], off offset:84
.LBB60_192:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr108
	s_and_saveexec_b32 s2, s25
	s_cbranch_execz .LBB60_194
; %bb.193:
	global_load_b32 v108, v[1:2], off offset:88
.LBB60_194:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr110
	s_and_saveexec_b32 s2, s26
	s_cbranch_execz .LBB60_196
; %bb.195:
	global_load_b32 v110, v[1:2], off offset:92
.LBB60_196:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr113
	s_and_saveexec_b32 s2, s27
	s_cbranch_execz .LBB60_198
; %bb.197:
	global_load_b32 v113, v[1:2], off offset:96
.LBB60_198:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr115
	s_and_saveexec_b32 s2, s28
	s_cbranch_execz .LBB60_200
; %bb.199:
	global_load_b32 v115, v[1:2], off offset:100
.LBB60_200:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr117
	s_and_saveexec_b32 s2, s29
	s_cbranch_execz .LBB60_202
; %bb.201:
	global_load_b32 v117, v[1:2], off offset:104
.LBB60_202:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr119
	s_and_saveexec_b32 s2, s30
	s_cbranch_execz .LBB60_204
; %bb.203:
	global_load_b32 v119, v[1:2], off offset:108
.LBB60_204:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr121
	s_and_saveexec_b32 s2, s31
	s_cbranch_execz .LBB60_206
; %bb.205:
	global_load_b32 v121, v[1:2], off offset:112
.LBB60_206:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr123
	s_and_saveexec_b32 s2, s33
	s_cbranch_execz .LBB60_208
; %bb.207:
	global_load_b32 v123, v[1:2], off offset:116
.LBB60_208:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr125
	s_and_saveexec_b32 s2, s34
	s_cbranch_execz .LBB60_210
; %bb.209:
	global_load_b32 v125, v[1:2], off offset:120
.LBB60_210:                             ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIjEEjLj31EEEvjT_RAT1__T0_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr126
	s_and_saveexec_b32 s2, s35
	s_cbranch_execz .LBB60_212
; %bb.211:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v126, s67, v1
.LBB60_212:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr124
	s_and_saveexec_b32 s2, s36
	s_cbranch_execz .LBB60_214
; %bb.213:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v124, s67, v1
.LBB60_214:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr122
	s_and_saveexec_b32 s2, s37
	s_cbranch_execz .LBB60_216
; %bb.215:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v122, s67, v1
.LBB60_216:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr120
	s_and_saveexec_b32 s2, s38
	s_cbranch_execz .LBB60_218
; %bb.217:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v120, s67, v1
.LBB60_218:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr118
	s_and_saveexec_b32 s2, s39
	s_cbranch_execz .LBB60_220
; %bb.219:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v118, s67, v1
.LBB60_220:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr116
	s_and_saveexec_b32 s2, s40
	s_cbranch_execz .LBB60_222
; %bb.221:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v116, s67, v1
.LBB60_222:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr114
	s_and_saveexec_b32 s2, s41
	s_cbranch_execz .LBB60_224
; %bb.223:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v114, s67, v1
.LBB60_224:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr112
	s_and_saveexec_b32 s2, s42
	s_cbranch_execz .LBB60_226
; %bb.225:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v112, s67, v1
.LBB60_226:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr111
	s_and_saveexec_b32 s2, s43
	s_cbranch_execz .LBB60_228
; %bb.227:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v111, s67, v1
.LBB60_228:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr109
	s_and_saveexec_b32 s2, s44
	s_cbranch_execz .LBB60_230
; %bb.229:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v109, s67, v1
.LBB60_230:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr107
	s_and_saveexec_b32 s2, s45
	s_cbranch_execz .LBB60_232
; %bb.231:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v107, s67, v1
.LBB60_232:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr105
	s_and_saveexec_b32 s2, s46
	s_cbranch_execz .LBB60_234
; %bb.233:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v105, s67, v1
.LBB60_234:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr103
	s_and_saveexec_b32 s2, s47
	s_cbranch_execz .LBB60_236
; %bb.235:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v103, s67, v1
.LBB60_236:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr101
	s_and_saveexec_b32 s2, s48
	s_cbranch_execz .LBB60_238
; %bb.237:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v101, s67, v1
.LBB60_238:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr99
	s_and_saveexec_b32 s2, s49
	s_cbranch_execz .LBB60_240
; %bb.239:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v99, s67, v1
.LBB60_240:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr97
	s_and_saveexec_b32 s2, s50
	s_cbranch_execz .LBB60_242
; %bb.241:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v97, s67, v1
.LBB60_242:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr95
	s_and_saveexec_b32 s2, s51
	s_cbranch_execz .LBB60_244
; %bb.243:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v95, s67, v1
.LBB60_244:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr93
	s_and_saveexec_b32 s2, s52
	s_cbranch_execz .LBB60_246
; %bb.245:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v93, s67, v1
.LBB60_246:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr91
	s_and_saveexec_b32 s2, s53
	s_cbranch_execz .LBB60_248
; %bb.247:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v91, s67, v1
.LBB60_248:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr90
	s_and_saveexec_b32 s2, s54
	s_cbranch_execz .LBB60_250
; %bb.249:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v90, s67, v1
.LBB60_250:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr88
	s_and_saveexec_b32 s2, s55
	s_cbranch_execz .LBB60_252
; %bb.251:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v88, s67, v1
.LBB60_252:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr86
	s_and_saveexec_b32 s2, s56
	s_cbranch_execz .LBB60_254
; %bb.253:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v86, s67, v1
.LBB60_254:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr84
	s_and_saveexec_b32 s2, s57
	s_cbranch_execz .LBB60_256
; %bb.255:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v84, s67, v1
.LBB60_256:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr82
	s_and_saveexec_b32 s2, s58
	s_cbranch_execz .LBB60_258
; %bb.257:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v82, s67, v1
.LBB60_258:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr80
	s_and_saveexec_b32 s2, s59
	s_cbranch_execz .LBB60_260
; %bb.259:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v80, s67, v1
.LBB60_260:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr78
	s_and_saveexec_b32 s2, s60
	s_cbranch_execz .LBB60_262
; %bb.261:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v78, s67, v1
.LBB60_262:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr76
	s_and_saveexec_b32 s2, s61
	s_cbranch_execz .LBB60_264
; %bb.263:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v76, s67, v1
.LBB60_264:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr74
	s_and_saveexec_b32 s2, s62
	s_cbranch_execz .LBB60_266
; %bb.265:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v74, s67, v1
.LBB60_266:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr72
	s_and_saveexec_b32 s2, s63
	s_cbranch_execz .LBB60_268
; %bb.267:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v72, s67, v1
.LBB60_268:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr2
	s_and_saveexec_b32 s2, s64
	s_cbranch_execz .LBB60_270
; %bb.269:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v2, s67, v1
.LBB60_270:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s2, s65
	s_cbranch_execz .LBB60_272
; %bb.271:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
.LBB60_272:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v10, v9 offset:64
	ds_store_b32 v11, v68 offset:64
	ds_store_b32 v12, v69 offset:64
	ds_store_b32 v13, v70 offset:64
	ds_store_b32 v14, v71 offset:64
	ds_store_b32 v15, v73 offset:64
	ds_store_b32 v16, v75 offset:64
	ds_store_b32 v17, v77 offset:64
	ds_store_b32 v18, v79 offset:64
	ds_store_b32 v19, v81 offset:64
	ds_store_b32 v20, v83 offset:64
	ds_store_b32 v21, v85 offset:64
	ds_store_b32 v22, v87 offset:64
	ds_store_b32 v23, v89 offset:64
	ds_store_b32 v24, v92 offset:64
	ds_store_b32 v25, v94 offset:64
	ds_store_b32 v26, v96 offset:64
	ds_store_b32 v27, v98 offset:64
	ds_store_b32 v28, v100 offset:64
	ds_store_b32 v29, v102 offset:64
	ds_store_b32 v30, v104 offset:64
	ds_store_b32 v31, v106 offset:64
	ds_store_b32 v33, v108 offset:64
	ds_store_b32 v34, v110 offset:64
	ds_store_b32 v35, v113 offset:64
	ds_store_b32 v36, v115 offset:64
	ds_store_b32 v37, v117 offset:64
	ds_store_b32 v38, v119 offset:64
	ds_store_b32 v39, v121 offset:64
	ds_store_b32 v40, v123 offset:64
	ds_store_b32 v41, v125 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s35
	s_cbranch_execz .LBB60_274
; %bb.273:
	v_lshlrev_b32_e32 v9, 2, v126
	v_lshlrev_b32_e32 v10, 2, v0
	ds_load_b32 v9, v9
	ds_load_b32 v11, v10 offset:64
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v9, v9, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, s2, s74, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s75, v10, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[9:10], v11, off
.LBB60_274:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s36
	s_cbranch_execz .LBB60_276
; %bb.275:
	v_lshlrev_b32_e32 v9, 2, v124
	v_lshlrev_b32_e32 v10, 2, v0
	ds_load_b32 v9, v9
	ds_load_b32 v11, v10 offset:2112
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v9, v9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, s2, s74, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s75, v10, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[9:10], v11, off
.LBB60_276:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s37
	s_cbranch_execz .LBB60_278
; %bb.277:
	v_dual_mov_b32 v10, 0 :: v_dual_lshlrev_b32 v3, 2, v122
	v_lshlrev_b32_e32 v9, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v11, v9 offset:4160
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v9, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[9:10]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v11, off
.LBB60_278:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s38
	s_cbranch_execz .LBB60_280
; %bb.279:
	v_lshlrev_b32_e32 v3, 2, v120
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v9, v4 offset:6208
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v9, off
.LBB60_280:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s39
	s_cbranch_execz .LBB60_282
; %bb.281:
	v_lshlrev_b32_e32 v3, 2, v118
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:8256
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_282:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s40
	s_cbranch_execz .LBB60_284
; %bb.283:
	v_lshlrev_b32_e32 v3, 2, v116
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:10304
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_284:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s41
	s_cbranch_execz .LBB60_286
; %bb.285:
	v_lshlrev_b32_e32 v3, 2, v114
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:12352
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_286:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s42
	s_cbranch_execz .LBB60_288
; %bb.287:
	v_lshlrev_b32_e32 v3, 2, v112
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:14400
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_288:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s43
	s_cbranch_execz .LBB60_290
; %bb.289:
	v_lshlrev_b32_e32 v3, 2, v111
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:16448
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_290:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s44
	s_cbranch_execz .LBB60_292
; %bb.291:
	v_lshlrev_b32_e32 v3, 2, v109
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:18496
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_292:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s45
	s_cbranch_execz .LBB60_294
; %bb.293:
	v_lshlrev_b32_e32 v3, 2, v107
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:20544
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_294:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s46
	s_cbranch_execz .LBB60_296
; %bb.295:
	v_lshlrev_b32_e32 v3, 2, v105
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:22592
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_296:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s47
	s_cbranch_execz .LBB60_298
; %bb.297:
	v_lshlrev_b32_e32 v3, 2, v103
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:24640
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_298:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s48
	s_cbranch_execz .LBB60_300
; %bb.299:
	v_lshlrev_b32_e32 v3, 2, v101
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:26688
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_300:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s49
	s_cbranch_execz .LBB60_302
; %bb.301:
	v_lshlrev_b32_e32 v3, 2, v99
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:28736
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_302:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s50
	s_cbranch_execz .LBB60_304
; %bb.303:
	v_lshlrev_b32_e32 v3, 2, v97
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:30784
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_304:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s51
	s_cbranch_execz .LBB60_306
; %bb.305:
	v_lshlrev_b32_e32 v3, 2, v95
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:32832
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_306:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s52
	s_cbranch_execz .LBB60_308
; %bb.307:
	v_lshlrev_b32_e32 v3, 2, v93
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:34880
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_308:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s53
	s_cbranch_execz .LBB60_310
; %bb.309:
	v_lshlrev_b32_e32 v3, 2, v91
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:36928
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_310:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s54
	s_cbranch_execz .LBB60_312
; %bb.311:
	v_lshlrev_b32_e32 v3, 2, v90
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:38976
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_312:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s55
	s_cbranch_execz .LBB60_314
; %bb.313:
	v_lshlrev_b32_e32 v3, 2, v88
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:41024
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_314:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s56
	s_cbranch_execz .LBB60_316
; %bb.315:
	v_lshlrev_b32_e32 v3, 2, v86
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:43072
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_316:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s57
	s_cbranch_execz .LBB60_318
; %bb.317:
	v_lshlrev_b32_e32 v3, 2, v84
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:45120
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_318:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s58
	s_cbranch_execz .LBB60_320
; %bb.319:
	v_lshlrev_b32_e32 v3, 2, v82
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:47168
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_320:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s59
	s_cbranch_execz .LBB60_322
; %bb.321:
	v_lshlrev_b32_e32 v3, 2, v80
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:49216
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_322:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s60
	s_cbranch_execz .LBB60_324
; %bb.323:
	v_lshlrev_b32_e32 v3, 2, v78
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:51264
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_324:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s61
	s_cbranch_execz .LBB60_326
; %bb.325:
	v_lshlrev_b32_e32 v3, 2, v76
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:53312
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_326:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s62
	s_cbranch_execz .LBB60_328
; %bb.327:
	v_lshlrev_b32_e32 v3, 2, v74
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:55360
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_328:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s63
	s_cbranch_execz .LBB60_330
; %bb.329:
	v_lshlrev_b32_e32 v3, 2, v72
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:57408
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB60_330:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s64
	s_cbranch_execz .LBB60_332
; %bb.331:
	v_lshlrev_b32_e32 v2, 2, v2
	v_lshlrev_b32_e32 v3, 2, v0
	ds_load_b32 v2, v2
	ds_load_b32 v4, v3 offset:59456
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v2, v2, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, s2, s74, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s2, s75, v3, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[2:3], v4, off
.LBB60_332:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s65
	s_cbranch_execz .LBB60_334
; %bb.333:
	v_lshlrev_b32_e32 v1, 2, v1
	v_lshlrev_b32_e32 v2, 2, v0
	ds_load_b32 v1, v1
	ds_load_b32 v3, v2 offset:61504
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, v1, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s2, s74, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s2, s75, v2, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[1:2], v3, off
.LBB60_334:
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b32 s2, s[0:1], 0x50
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s2
	s_mov_b32 s2, 0
	s_cselect_b32 s3, -1, 0
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s3
	s_xor_b32 s3, exec_lo, s4
; %bb.335:
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v7, v8
	s_mov_b32 s7, exec_lo
; %bb.336:                              ; %Flow165
	s_or_b32 exec_lo, exec_lo, s3
	s_branch .LBB60_338
.LBB60_337:
	s_mov_b32 s2, -1
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
.LBB60_338:                             ; %Flow164
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB60_367
; %bb.339:
	s_mov_b32 s87, 0
	v_lshlrev_b32_e32 v21, 2, v32
	s_lshl_b64 s[8:9], s[86:87], 2
	v_mov_b32_e32 v33, 0
	s_add_u32 s2, s68, s8
	s_addc_u32 s3, s69, s9
	v_or_b32_e32 v34, 0xfffffe00, v0
	s_clause 0x7
	global_load_b128 v[1:4], v21, s[2:3] offset:48
	global_load_b128 v[9:12], v21, s[2:3] offset:32
	global_load_b128 v[17:20], v21, s[2:3] offset:16
	global_load_b128 v[25:28], v21, s[2:3]
	global_load_b96 v[29:31], v21, s[2:3] offset:112
	global_load_b128 v[5:8], v21, s[2:3] offset:96
	global_load_b128 v[13:16], v21, s[2:3] offset:80
	global_load_b128 v[21:24], v21, s[2:3] offset:64
	v_lshlrev_b32_e32 v35, 2, v0
.LBB60_340:                             ; %.lr.ph.i.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v34, 0x200, v34
	ds_store_b32 v35, v33
	v_add_nc_u32_e32 v35, 0x800, v35
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v34
	s_or_b32 s87, vcc_lo, s87
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s87
	s_cbranch_execnz .LBB60_340
; %bb.341:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s87
	s_waitcnt vmcnt(4)
	v_lshrrev_b32_e32 v33, s80, v25
	s_lshl_b32 s2, -1, s81
	v_lshrrev_b32_e32 v38, s80, v27
	s_not_b32 s10, s2
	s_mov_b32 s2, exec_lo
	v_and_b32_e32 v33, s10, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v34, 9, v33
	v_lshrrev_b32_e32 v33, 3, v33
	v_and_or_b32 v34, 0xe00, v34, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v34, 1, v34
	v_add_lshl_u32 v33, v34, v33, 1
	v_lshrrev_b32_e32 v34, s80, v26
	ds_load_u16 v35, v33
	v_and_b32_e32 v34, s10, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 9, v34
	v_lshrrev_b32_e32 v34, 3, v34
	v_and_or_b32 v36, 0xe00, v36, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 1, v36
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v37, v35, 1
	v_add_lshl_u32 v34, v36, v34, 1
	ds_store_b16 v33, v37
	ds_load_u16 v36, v34
	v_and_b32_e32 v37, s10, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 9, v37
	v_lshrrev_b32_e32 v37, 3, v37
	v_and_or_b32 v38, 0xe00, v38, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 1, v38
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v39, v36, 1
	v_add_lshl_u32 v43, v38, v37, 1
	v_lshrrev_b32_e32 v38, s80, v28
	ds_store_b16 v34, v39
	ds_load_u16 v37, v43
	v_and_b32_e32 v38, s10, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 9, v38
	v_lshrrev_b32_e32 v38, 3, v38
	v_and_or_b32 v39, 0xe00, v39, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 1, v39
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v40, v37, 1
	v_add_lshl_u32 v45, v39, v38, 1
	v_lshrrev_b32_e32 v39, s80, v17
	ds_store_b16 v43, v40
	ds_load_u16 v38, v45
	v_and_b32_e32 v39, s10, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 9, v39
	v_lshrrev_b32_e32 v39, 3, v39
	v_and_or_b32 v40, 0xe00, v40, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 1, v40
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v41, v38, 1
	v_add_lshl_u32 v47, v40, v39, 1
	v_lshrrev_b32_e32 v40, s80, v18
	ds_store_b16 v45, v41
	ds_load_u16 v39, v47
	v_and_b32_e32 v40, s10, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 9, v40
	v_lshrrev_b32_e32 v40, 3, v40
	v_and_or_b32 v41, 0xe00, v41, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 1, v41
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v42, v39, 1
	v_add_lshl_u32 v49, v41, v40, 1
	v_lshrrev_b32_e32 v41, s80, v19
	ds_store_b16 v47, v42
	ds_load_u16 v40, v49
	v_and_b32_e32 v41, s10, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 9, v41
	v_lshrrev_b32_e32 v41, 3, v41
	v_and_or_b32 v42, 0xe00, v42, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 1, v42
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v44, v40, 1
	v_add_lshl_u32 v51, v42, v41, 1
	v_lshrrev_b32_e32 v42, s80, v20
	ds_store_b16 v49, v44
	ds_load_u16 v41, v51
	v_and_b32_e32 v42, s10, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 9, v42
	v_lshrrev_b32_e32 v42, 3, v42
	v_and_or_b32 v44, 0xe00, v44, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 1, v44
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v46, v41, 1
	v_add_lshl_u32 v53, v44, v42, 1
	v_lshrrev_b32_e32 v44, s80, v9
	ds_store_b16 v51, v46
	ds_load_u16 v42, v53
	v_and_b32_e32 v44, s10, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 9, v44
	v_lshrrev_b32_e32 v44, 3, v44
	v_and_or_b32 v46, 0xe00, v46, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 1, v46
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v48, v42, 1
	v_add_lshl_u32 v55, v46, v44, 1
	v_lshrrev_b32_e32 v46, s80, v10
	ds_store_b16 v53, v48
	ds_load_u16 v44, v55
	v_and_b32_e32 v46, s10, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 9, v46
	v_lshrrev_b32_e32 v46, 3, v46
	v_and_or_b32 v48, 0xe00, v48, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 1, v48
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v50, v44, 1
	v_add_lshl_u32 v57, v48, v46, 1
	v_lshrrev_b32_e32 v48, s80, v11
	ds_store_b16 v55, v50
	ds_load_u16 v46, v57
	v_and_b32_e32 v48, s10, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 9, v48
	v_lshrrev_b32_e32 v48, 3, v48
	v_and_or_b32 v50, 0xe00, v50, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 1, v50
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v52, v46, 1
	v_add_lshl_u32 v59, v50, v48, 1
	v_lshrrev_b32_e32 v50, s80, v12
	ds_store_b16 v57, v52
	ds_load_u16 v48, v59
	v_and_b32_e32 v50, s10, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 9, v50
	v_lshrrev_b32_e32 v50, 3, v50
	v_and_or_b32 v52, 0xe00, v52, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 1, v52
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v54, v48, 1
	v_add_lshl_u32 v61, v52, v50, 1
	v_lshrrev_b32_e32 v52, s80, v1
	ds_store_b16 v59, v54
	ds_load_u16 v50, v61
	v_and_b32_e32 v52, s10, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 9, v52
	v_lshrrev_b32_e32 v52, 3, v52
	v_and_or_b32 v54, 0xe00, v54, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 1, v54
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v56, v50, 1
	v_add_lshl_u32 v63, v54, v52, 1
	v_lshrrev_b32_e32 v54, s80, v2
	ds_store_b16 v61, v56
	ds_load_u16 v52, v63
	v_and_b32_e32 v54, s10, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 9, v54
	v_lshrrev_b32_e32 v54, 3, v54
	v_and_or_b32 v56, 0xe00, v56, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 1, v56
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v58, v52, 1
	v_add_lshl_u32 v65, v56, v54, 1
	v_lshrrev_b32_e32 v56, s80, v3
	ds_store_b16 v63, v58
	ds_load_u16 v54, v65
	v_and_b32_e32 v56, s10, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 9, v56
	v_lshrrev_b32_e32 v56, 3, v56
	v_and_or_b32 v58, 0xe00, v58, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 1, v58
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v60, v54, 1
	v_add_lshl_u32 v67, v58, v56, 1
	v_lshrrev_b32_e32 v58, s80, v4
	ds_store_b16 v65, v60
	ds_load_u16 v56, v67
	v_and_b32_e32 v58, s10, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 9, v58
	v_lshrrev_b32_e32 v58, 3, v58
	v_and_or_b32 v60, 0xe00, v60, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 1, v60
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v62, v56, 1
	v_add_lshl_u32 v69, v60, v58, 1
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v60, s80, v21
	ds_store_b16 v67, v62
	ds_load_u16 v58, v69
	v_and_b32_e32 v60, s10, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 9, v60
	v_lshrrev_b32_e32 v60, 3, v60
	v_and_or_b32 v62, 0xe00, v62, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 1, v62
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v64, v58, 1
	v_add_lshl_u32 v71, v62, v60, 1
	v_lshrrev_b32_e32 v62, s80, v22
	ds_store_b16 v69, v64
	ds_load_u16 v60, v71
	v_and_b32_e32 v62, s10, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 9, v62
	v_lshrrev_b32_e32 v62, 3, v62
	v_and_or_b32 v64, 0xe00, v64, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 1, v64
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v66, v60, 1
	v_add_lshl_u32 v73, v64, v62, 1
	v_lshrrev_b32_e32 v64, s80, v23
	ds_store_b16 v71, v66
	ds_load_u16 v62, v73
	v_and_b32_e32 v64, s10, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 9, v64
	v_lshrrev_b32_e32 v64, 3, v64
	v_and_or_b32 v66, 0xe00, v66, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 1, v66
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v68, v62, 1
	v_add_lshl_u32 v75, v66, v64, 1
	v_lshrrev_b32_e32 v66, s80, v24
	ds_store_b16 v73, v68
	ds_load_u16 v64, v75
	v_and_b32_e32 v66, s10, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 9, v66
	v_lshrrev_b32_e32 v66, 3, v66
	v_and_or_b32 v68, 0xe00, v68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 1, v68
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v70, v64, 1
	v_add_lshl_u32 v77, v68, v66, 1
	v_lshrrev_b32_e32 v68, s80, v13
	ds_store_b16 v75, v70
	ds_load_u16 v66, v77
	v_and_b32_e32 v68, s10, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 9, v68
	v_lshrrev_b32_e32 v68, 3, v68
	v_and_or_b32 v70, 0xe00, v70, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 1, v70
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v72, v66, 1
	v_add_lshl_u32 v79, v70, v68, 1
	v_lshrrev_b32_e32 v70, s80, v14
	ds_store_b16 v77, v72
	ds_load_u16 v68, v79
	v_and_b32_e32 v70, s10, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 9, v70
	v_lshrrev_b32_e32 v70, 3, v70
	v_and_or_b32 v72, 0xe00, v72, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 1, v72
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v74, v68, 1
	v_add_lshl_u32 v81, v72, v70, 1
	v_lshrrev_b32_e32 v72, s80, v15
	ds_store_b16 v79, v74
	ds_load_u16 v70, v81
	v_and_b32_e32 v72, s10, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 9, v72
	v_lshrrev_b32_e32 v72, 3, v72
	v_and_or_b32 v74, 0xe00, v74, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 1, v74
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v76, v70, 1
	v_add_lshl_u32 v83, v74, v72, 1
	v_lshrrev_b32_e32 v74, s80, v16
	ds_store_b16 v81, v76
	ds_load_u16 v72, v83
	v_and_b32_e32 v74, s10, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 9, v74
	v_lshrrev_b32_e32 v74, 3, v74
	v_and_or_b32 v76, 0xe00, v76, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 1, v76
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v78, v72, 1
	v_add_lshl_u32 v85, v76, v74, 1
	v_lshrrev_b32_e32 v76, s80, v5
	ds_store_b16 v83, v78
	ds_load_u16 v74, v85
	v_and_b32_e32 v76, s10, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 9, v76
	v_lshrrev_b32_e32 v76, 3, v76
	v_and_or_b32 v78, 0xe00, v78, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 1, v78
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v80, v74, 1
	v_add_lshl_u32 v87, v78, v76, 1
	v_lshrrev_b32_e32 v78, s80, v6
	ds_store_b16 v85, v80
	ds_load_u16 v76, v87
	v_and_b32_e32 v78, s10, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 9, v78
	v_lshrrev_b32_e32 v78, 3, v78
	v_and_or_b32 v80, 0xe00, v80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 1, v80
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v82, v76, 1
	v_add_lshl_u32 v89, v80, v78, 1
	v_lshrrev_b32_e32 v80, s80, v7
	ds_store_b16 v87, v82
	ds_load_u16 v78, v89
	v_and_b32_e32 v80, s10, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 9, v80
	v_lshrrev_b32_e32 v80, 3, v80
	v_and_or_b32 v82, 0xe00, v82, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 1, v82
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v84, v78, 1
	v_add_lshl_u32 v90, v82, v80, 1
	v_lshrrev_b32_e32 v82, s80, v8
	ds_store_b16 v89, v84
	ds_load_u16 v80, v90
	v_and_b32_e32 v82, s10, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 9, v82
	v_lshrrev_b32_e32 v82, 3, v82
	v_and_or_b32 v84, 0xe00, v84, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 1, v84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v86, v80, 1
	v_add_lshl_u32 v91, v84, v82, 1
	v_lshrrev_b32_e32 v84, s80, v29
	ds_store_b16 v90, v86
	ds_load_u16 v82, v91
	v_and_b32_e32 v84, s10, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 9, v84
	v_lshrrev_b32_e32 v84, 3, v84
	v_and_or_b32 v86, 0xe00, v86, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 1, v86
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v88, v82, 1
	v_add_lshl_u32 v92, v86, v84, 1
	v_lshrrev_b32_e32 v86, s80, v30
	ds_store_b16 v91, v88
	ds_load_u16 v84, v92
	v_and_b32_e32 v86, s10, v86
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 9, v86
	v_lshrrev_b32_e32 v86, 3, v86
	v_and_or_b32 v88, 0xe00, v88, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 1, v88
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v94, v84, 1
	v_add_lshl_u32 v93, v88, v86, 1
	v_lshrrev_b32_e32 v88, s80, v31
	ds_store_b16 v92, v94
	ds_load_u16 v86, v93
	v_and_b32_e32 v88, s10, v88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 9, v88
	v_lshrrev_b32_e32 v88, 3, v88
	v_and_or_b32 v94, 0xe00, v94, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 1, v94
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v86, 1
	v_add_lshl_u32 v94, v94, v88, 1
	ds_store_b16 v93, v95
	ds_load_u16 v88, v94
	v_lshlrev_b32_e32 v95, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v88, 1
	ds_store_b16 v94, v96
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[96:99], v95 offset1:1
	ds_load_2addr_b64 v[100:103], v95 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v96, v97, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v96, v96, v98, v99
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v97, v96, v100, v101
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_or_b32_e32 v100, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v97, v97, v102, v103
	v_and_b32_e32 v98, 15, v96
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v99, v97 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s3, 0, v98
	v_cmp_lt_u32_e64 s4, 1, v98
	v_cmp_lt_u32_e64 s5, 3, v98
	v_cmp_lt_u32_e64 s6, 7, v98
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, v99, 0, s3
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v99, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v97, v97, v99
	v_mov_b32_dpp v99, v97 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, 0, v99, s5
	v_add_nc_u32_e32 v97, v97, v99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v98, 0, v99, s6
	v_bfe_i32 v99, v96, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v97, v97, v98
	ds_swizzle_b32 v98, v97 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v98, v99, v98
	v_lshrrev_b32_e32 v99, 5, v0
	v_add_nc_u32_e32 v97, v97, v98
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v99
	v_cmpx_eq_u32_e64 v100, v0
	s_cbranch_execz .LBB60_343
; %bb.342:
	ds_store_b32 v98, v97 offset:16384
.LBB60_343:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_lt_u32_e64 s2, 15, v0
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s11, vcc_lo
	s_cbranch_execz .LBB60_345
; %bb.344:
	v_mad_i32_i24 v99, 0xffffffe4, v0, v95
	ds_load_b32 v100, v99 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v101, v100 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, v101, 0, s3
	v_add_nc_u32_e32 v100, v101, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	v_mov_b32_dpp v101, v100 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, 0, v101, s5
	v_add_nc_u32_e32 v100, v100, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	ds_store_b32 v99, v100 offset:16384
.LBB60_345:                             ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s11
	v_dual_mov_b32 v100, 0 :: v_dual_mov_b32 v99, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB60_347
; %bb.346:
	ds_load_b32 v99, v98 offset:16380
.LBB60_347:                             ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjjjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEESB_SB_SB_EEvT0_T1_T2_T3_PjSG_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESD_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v98, -1, v96
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s3, 0, v98
	v_cndmask_b32_e64 v98, v98, v96, s3
	v_cmp_eq_u32_e64 s3, 0, v96
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v98
	ds_bpermute_b32 v97, v98, v97
	ds_load_b32 v98, v100 offset:16444
	ds_load_2addr_b64 v[100:103], v95 offset1:1
	ds_load_b32 v104, v95 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v96, v97, v99, s3
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v96, v98, 16, v96
	ds_load_b64 v[98:99], v95 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v97, v96, v100
	v_add_nc_u32_e32 v100, v101, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v102, v100
	v_add_nc_u32_e32 v102, v103, v101
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v103, v98, v102
	v_add_nc_u32_e32 v98, v99, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v99, v104, v98
	ds_store_2addr_b64 v95, v[96:97], v[100:101] offset1:1
	ds_store_2addr_b64 v95, v[102:103], v[98:99] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v95, v33
	ds_load_u16 v96, v34
	ds_load_u16 v97, v43
	ds_load_u16 v45, v45
	ds_load_u16 v47, v47
	ds_load_u16 v49, v49
	ds_load_u16 v51, v51
	ds_load_u16 v53, v53
	ds_load_u16 v55, v55
	ds_load_u16 v57, v57
	ds_load_u16 v59, v59
	ds_load_u16 v61, v61
	ds_load_u16 v63, v63
	ds_load_u16 v65, v65
	ds_load_u16 v67, v67
	ds_load_u16 v69, v69
	ds_load_u16 v71, v71
	ds_load_u16 v73, v73
	ds_load_u16 v75, v75
	ds_load_u16 v77, v77
	ds_load_u16 v79, v79
	ds_load_u16 v81, v81
	ds_load_u16 v83, v83
	ds_load_u16 v85, v85
	ds_load_u16 v87, v87
	ds_load_u16 v89, v89
	ds_load_u16 v90, v90
	ds_load_u16 v91, v91
	ds_load_u16 v92, v92
	ds_load_u16 v93, v93
	ds_load_u16 v43, v94
                                        ; implicit-def: $vgpr33
                                        ; implicit-def: $vgpr34
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB60_351
; %bb.348:
	v_lshrrev_b32_e32 v33, 3, v0
	v_lshlrev_b32_e32 v34, 10, v0
	v_add_nc_u32_e32 v94, 1, v0
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v33, 0x1c00, v34, v33
	v_dual_mov_b32 v34, 0x3e00 :: v_dual_lshlrev_b32 v33, 1, v33
	ds_load_u16 v33, v33
	v_cmpx_ne_u32_e32 16, v94
	s_cbranch_execz .LBB60_350
; %bb.349:
	v_lshlrev_b32_e32 v34, 10, v94
	v_lshrrev_b32_e32 v94, 3, v94
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v34, 0x1c00, v34, v94
	v_lshlrev_b32_e32 v34, 1, v34
	ds_load_u16 v34, v34
.LBB60_350:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v33, 0xffff, v33
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v34, v34, v33
.LBB60_351:                             ; %Flow161
	s_or_b32 exec_lo, exec_lo, s4
	v_and_b32_e32 v35, 0xffff, v35
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v94, 0xffff, v95
	v_and_b32_e32 v36, 0xffff, v36
	s_waitcnt lgkmcnt(29)
	v_and_b32_e32 v95, 0xffff, v96
	v_and_b32_e32 v37, 0xffff, v37
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v96, 0xffff, v97
	v_add_lshl_u32 v35, v94, v35, 2
	v_and_b32_e32 v38, 0xffff, v38
	s_waitcnt lgkmcnt(27)
	v_and_b32_e32 v45, 0xffff, v45
	v_and_b32_e32 v39, 0xffff, v39
	s_waitcnt lgkmcnt(26)
	v_and_b32_e32 v47, 0xffff, v47
	v_and_b32_e32 v40, 0xffff, v40
	s_waitcnt lgkmcnt(25)
	v_and_b32_e32 v49, 0xffff, v49
	v_and_b32_e32 v41, 0xffff, v41
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v51, 0xffff, v51
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v35, v25 offset:64
	v_add_lshl_u32 v25, v95, v36, 2
	v_and_b32_e32 v42, 0xffff, v42
	v_and_b32_e32 v53, 0xffff, v53
	v_add_lshl_u32 v36, v96, v37, 2
	v_and_b32_e32 v44, 0xffff, v44
	v_and_b32_e32 v55, 0xffff, v55
	v_add_lshl_u32 v37, v45, v38, 2
	v_and_b32_e32 v46, 0xffff, v46
	v_and_b32_e32 v57, 0xffff, v57
	v_add_lshl_u32 v38, v47, v39, 2
	v_and_b32_e32 v48, 0xffff, v48
	v_and_b32_e32 v59, 0xffff, v59
	v_add_lshl_u32 v39, v49, v40, 2
	v_and_b32_e32 v50, 0xffff, v50
	v_and_b32_e32 v61, 0xffff, v61
	ds_store_b32 v25, v26 offset:64
	ds_store_b32 v36, v27 offset:64
	ds_store_b32 v37, v28 offset:64
	ds_store_b32 v38, v17 offset:64
	ds_store_b32 v39, v18 offset:64
	v_add_lshl_u32 v17, v51, v41, 2
	v_and_b32_e32 v52, 0xffff, v52
	v_and_b32_e32 v63, 0xffff, v63
	v_add_lshl_u32 v18, v53, v42, 2
	v_and_b32_e32 v54, 0xffff, v54
	v_and_b32_e32 v65, 0xffff, v65
	v_add_lshl_u32 v26, v55, v44, 2
	v_and_b32_e32 v56, 0xffff, v56
	v_and_b32_e32 v67, 0xffff, v67
	v_add_lshl_u32 v27, v57, v46, 2
	v_and_b32_e32 v58, 0xffff, v58
	v_and_b32_e32 v69, 0xffff, v69
	v_add_lshl_u32 v28, v59, v48, 2
	v_and_b32_e32 v60, 0xffff, v60
	v_and_b32_e32 v71, 0xffff, v71
	ds_store_b32 v17, v19 offset:64
	ds_store_b32 v18, v20 offset:64
	ds_store_b32 v26, v9 offset:64
	ds_store_b32 v27, v10 offset:64
	ds_store_b32 v28, v11 offset:64
	v_add_lshl_u32 v9, v61, v50, 2
	v_and_b32_e32 v62, 0xffff, v62
	v_and_b32_e32 v73, 0xffff, v73
	v_add_lshl_u32 v10, v63, v52, 2
	v_and_b32_e32 v64, 0xffff, v64
	v_and_b32_e32 v75, 0xffff, v75
	v_add_lshl_u32 v11, v65, v54, 2
	v_and_b32_e32 v66, 0xffff, v66
	v_and_b32_e32 v77, 0xffff, v77
	v_add_lshl_u32 v19, v67, v56, 2
	v_and_b32_e32 v68, 0xffff, v68
	v_and_b32_e32 v79, 0xffff, v79
	v_add_lshl_u32 v20, v69, v58, 2
	v_and_b32_e32 v70, 0xffff, v70
	v_and_b32_e32 v81, 0xffff, v81
	ds_store_b32 v9, v12 offset:64
	ds_store_b32 v10, v1 offset:64
	ds_store_b32 v11, v2 offset:64
	ds_store_b32 v19, v3 offset:64
	ds_store_b32 v20, v4 offset:64
	v_add_lshl_u32 v12, v71, v60, 2
	v_and_b32_e32 v72, 0xffff, v72
	v_and_b32_e32 v83, 0xffff, v83
	v_add_lshl_u32 v40, v73, v62, 2
	v_and_b32_e32 v74, 0xffff, v74
	v_and_b32_e32 v85, 0xffff, v85
	v_add_lshl_u32 v41, v75, v64, 2
	v_and_b32_e32 v76, 0xffff, v76
	v_and_b32_e32 v87, 0xffff, v87
	v_add_lshl_u32 v42, v77, v66, 2
	v_and_b32_e32 v78, 0xffff, v78
	v_and_b32_e32 v89, 0xffff, v89
	v_and_b32_e32 v94, 0xffff, v43
	v_add_lshl_u32 v43, v79, v68, 2
	v_and_b32_e32 v80, 0xffff, v80
	v_and_b32_e32 v82, 0xffff, v82
	v_and_b32_e32 v84, 0xffff, v84
	v_and_b32_e32 v86, 0xffff, v86
	v_and_b32_e32 v88, 0xffff, v88
	v_and_b32_e32 v90, 0xffff, v90
	v_and_b32_e32 v91, 0xffff, v91
	v_and_b32_e32 v92, 0xffff, v92
	v_and_b32_e32 v93, 0xffff, v93
	ds_store_b32 v12, v21 offset:64
	ds_store_b32 v40, v22 offset:64
	ds_store_b32 v41, v23 offset:64
	ds_store_b32 v42, v24 offset:64
	ds_store_b32 v43, v13 offset:64
	v_add_lshl_u32 v13, v81, v70, 2
	v_add_lshl_u32 v21, v83, v72, 2
	v_add_lshl_u32 v22, v85, v74, 2
	v_add_lshl_u32 v23, v87, v76, 2
	v_add_lshl_u32 v24, v89, v78, 2
	ds_store_b32 v13, v14 offset:64
	ds_store_b32 v21, v15 offset:64
	ds_store_b32 v22, v16 offset:64
	ds_store_b32 v23, v5 offset:64
	ds_store_b32 v24, v6 offset:64
	v_add_lshl_u32 v14, v90, v80, 2
	v_add_lshl_u32 v15, v91, v82, 2
	v_add_lshl_u32 v16, v92, v84, 2
	v_add_lshl_u32 v44, v93, v86, 2
	v_add_lshl_u32 v45, v94, v88, 2
	ds_store_b32 v14, v7 offset:64
	ds_store_b32 v15, v8 offset:64
	ds_store_b32 v16, v29 offset:64
	ds_store_b32 v44, v30 offset:64
	ds_store_b32 v45, v31 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s3
; %bb.352:                              ; %_ZN7rocprim16block_radix_rankILj512ELj4ELNS_26block_radix_rank_algorithmE0ELj1ELj1EE9rank_keysIjLj31EZNS_6detail25onesweep_iteration_helperIjjjLj512ELj31ELj4ELb0ELS1_0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEESB_SB_SB_EEvT0_T1_T2_T3_PjSG_PNS4_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS4_11raw_storageINS4_16block_radix_rankILj512ELj4ELb0ELj1ELj1EE13storage_type_EEESD_RA1_jS11_.exit._crit_edge.i.i
	v_mov_b32_e32 v1, 0
; %bb.353:                              ; %Flow158
	s_and_not1_saveexec_b32 s3, s2
	s_cbranch_execz .LBB60_364
; %bb.354:
	v_lshl_or_b32 v3, s15, 4, v0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v7, 0
	s_mov_b32 s4, 0
	s_mov_b32 s5, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v34
	v_add_co_u32 v1, s2, s84, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s2, s85, v2, s2
                                        ; implicit-def: $sgpr2
	global_store_b32 v[1:2], v3, off
.LBB60_355:                             ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB60_358 Depth 2
	s_or_b32 s2, s2, exec_lo
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB60_361
; %bb.356:                              ;   in Loop: Header=BB60_355 Depth=1
	s_add_i32 s5, s5, -1
	s_mov_b32 s6, exec_lo
	v_lshl_or_b32 v3, s5, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s2, s84, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s2, s85, v6, s2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB60_360
; %bb.357:                              ; %.lr.ph.i.i.preheader
                                        ;   in Loop: Header=BB60_355 Depth=1
	s_mov_b32 s11, 0
.LBB60_358:                             ; %.lr.ph.i.i
                                        ;   Parent Loop BB60_355 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s2, 0, v3
	s_or_b32 s11, s2, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB60_358
; %bb.359:                              ; %Flow155
                                        ;   in Loop: Header=BB60_355 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB60_360:                             ; %Flow156
                                        ;   in Loop: Header=BB60_355 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s6
	v_and_b32_e32 v5, 0x3fffffff, v8
	v_cmp_eq_u32_e64 s2, 0x80000000, v3
	v_add_nc_u32_e32 v7, v5, v7
	s_branch .LBB60_362
.LBB60_361:                             ;   in Loop: Header=BB60_355 Depth=1
                                        ; implicit-def: $sgpr5
.LBB60_362:                             ; %Flow157
                                        ;   in Loop: Header=BB60_355 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s6, exec_lo, s2
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB60_355
; %bb.363:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v3, v7, v34
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v7, v33
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v2, v1
	ds_store_b32 v4, v2
.LBB60_364:                             ; %Flow159
	s_or_b32 exec_lo, exec_lo, s3
	v_lshlrev_b32_e32 v2, 2, v0
	v_lshlrev_b32_e32 v69, 2, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v4, 64, v2
	ds_load_2addr_stride64_b32 v[7:8], v4 offset0:8 offset1:16
	ds_load_2addr_stride64_b32 v[30:31], v4 offset0:24 offset1:32
	ds_load_2addr_stride64_b32 v[46:47], v4 offset0:40 offset1:48
	ds_load_2addr_stride64_b32 v[50:51], v4 offset0:56 offset1:64
	ds_load_2addr_stride64_b32 v[58:59], v4 offset0:72 offset1:80
	ds_load_2addr_stride64_b32 v[60:61], v4 offset0:88 offset1:96
	ds_load_2addr_stride64_b32 v[67:68], v4 offset0:104 offset1:112
	ds_load_b32 v53, v69 offset:64
	s_waitcnt lgkmcnt(7)
	v_lshrrev_b32_e32 v2, s80, v7
	s_waitcnt lgkmcnt(6)
	v_lshrrev_b32_e32 v3, s80, v30
	s_waitcnt lgkmcnt(5)
	v_lshrrev_b32_e32 v5, s80, v46
	s_waitcnt lgkmcnt(4)
	v_lshrrev_b32_e32 v6, s80, v50
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v29, s80, v58
	v_and_b32_e32 v2, s10, v2
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v48, s80, v60
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v49, s80, v67
	v_and_b32_e32 v6, s10, v6
	v_and_b32_e32 v3, s10, v3
	v_lshlrev_b32_e32 v72, 2, v2
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v2, s80, v53
	v_and_b32_e32 v5, s10, v5
	v_and_b32_e32 v29, s10, v29
	v_and_b32_e32 v48, s10, v48
	v_and_b32_e32 v49, s10, v49
	v_and_b32_e32 v2, s10, v2
	v_lshlrev_b32_e32 v57, 2, v6
	v_lshrrev_b32_e32 v6, s80, v8
	v_lshlrev_b32_e32 v71, 2, v3
	v_mov_b32_e32 v3, 0
	v_lshlrev_b32_e32 v73, 2, v2
	v_lshlrev_b32_e32 v70, 2, v5
	v_lshlrev_b32_e32 v56, 2, v29
	v_lshlrev_b32_e32 v55, 2, v48
	v_lshlrev_b32_e32 v54, 2, v49
	ds_load_b32 v5, v72
	ds_load_b32 v29, v71
	ds_load_b32 v62, v70
	ds_load_b32 v85, v57
	ds_load_b32 v86, v56
	ds_load_b32 v87, v55
	ds_load_b32 v88, v54
	v_and_b32_e32 v6, s10, v6
	ds_load_b32 v77, v73
	v_lshrrev_b32_e32 v48, s80, v31
	v_lshrrev_b32_e32 v52, s80, v51
	v_lshrrev_b32_e32 v2, s80, v61
	v_lshlrev_b32_e32 v76, 2, v6
	v_lshrrev_b32_e32 v49, s80, v47
	v_lshrrev_b32_e32 v63, s80, v59
	v_lshrrev_b32_e32 v64, s80, v68
	v_and_b32_e32 v48, s10, v48
	ds_load_b32 v81, v76
	v_and_b32_e32 v52, s10, v52
	v_and_b32_e32 v2, s10, v2
	v_and_b32_e32 v49, s10, v49
	v_and_b32_e32 v63, s10, v63
	v_and_b32_e32 v78, s10, v64
	v_lshlrev_b32_e32 v75, 2, v48
	v_lshlrev_b32_e32 v66, 2, v52
	v_lshlrev_b32_e32 v64, 2, v2
	v_or_b32_e32 v52, 0x200, v0
	v_lshlrev_b32_e32 v74, 2, v49
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v77, v0
	v_lshlrev_b32_e32 v65, 2, v63
	v_lshlrev_b32_e32 v63, 2, v78
	ds_load_b32 v89, v75
	ds_load_b32 v90, v74
	ds_load_b32 v91, v66
	ds_load_b32 v92, v65
	ds_load_b32 v93, v64
	ds_load_b32 v97, v63
	v_or_b32_e32 v49, 0x400, v0
	v_lshlrev_b64 v[77:78], 2, v[2:3]
	v_add_nc_u32_e32 v2, v5, v52
	v_or_b32_e32 v48, 0x600, v0
	v_or_b32_e32 v6, 0x800, v0
	v_or_b32_e32 v5, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[79:80], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v81, v49
	v_add_co_u32 v77, s2, s70, v77
	v_add_co_ci_u32_e64 v78, s2, s71, v78, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[81:82], 2, v[2:3]
	v_add_nc_u32_e32 v2, v29, v48
	v_add_co_u32 v79, s2, s70, v79
	v_add_co_ci_u32_e64 v80, s2, s71, v80, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[83:84], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v89, v6
	v_add_co_u32 v81, s2, s70, v81
	v_add_co_ci_u32_e64 v82, s2, s71, v82, s2
	s_clause 0x1
	global_store_b32 v[77:78], v53, off
	global_store_b32 v[79:80], v7, off
	v_lshlrev_b64 v[77:78], 2, v[2:3]
	v_add_nc_u32_e32 v2, v62, v5
	v_or_b32_e32 v29, 0xc00, v0
	global_store_b32 v[81:82], v8, off
	v_add_co_u32 v79, s2, s70, v83
	v_lshlrev_b64 v[81:82], 2, v[2:3]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v90, v29
	v_or_b32_e32 v7, 0xe00, v0
	v_add_co_ci_u32_e64 v80, s2, s71, v84, s2
	v_add_co_u32 v77, s2, s70, v77
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v78, s2, s71, v78, s2
	v_add_co_u32 v81, s2, s70, v81
	v_lshlrev_b64 v[83:84], 2, v[2:3]
	v_add_nc_u32_e32 v2, v85, v7
	v_or_b32_e32 v8, 0x1000, v0
	v_add_co_ci_u32_e64 v82, s2, s71, v82, s2
	s_clause 0x2
	global_store_b32 v[79:80], v30, off
	global_store_b32 v[77:78], v31, off
	global_store_b32 v[81:82], v46, off
	v_lshlrev_b64 v[30:31], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v91, v8
	v_or_b32_e32 v46, 0x1200, v0
	v_add_co_u32 v77, s2, s70, v83
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v78, s2, s71, v84, s2
	v_lshlrev_b64 v[79:80], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v2, v86, v46
	v_add_co_u32 v81, s2, s70, v30
	v_or_b32_e32 v30, 0x1400, v0
	v_add_co_ci_u32_e64 v82, s2, s71, v31, s2
	v_lshlrev_b64 v[83:84], 2, v[2:3]
	v_add_co_u32 v79, s2, s70, v79
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v80, s2, s71, v80, s2
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v2, v92, v30
	v_or_b32_e32 v31, 0x1600, v0
	s_clause 0x2
	global_store_b32 v[77:78], v47, off
	global_store_b32 v[81:82], v50, off
	global_store_b32 v[79:80], v51, off
	v_add_co_u32 v77, s2, s70, v83
	v_lshlrev_b64 v[50:51], 2, v[2:3]
	v_add_nc_u32_e32 v2, v87, v31
	v_add_co_ci_u32_e64 v78, s2, s71, v84, s2
	ds_load_2addr_stride64_b32 v[84:85], v4 offset0:120 offset1:128
	ds_load_2addr_stride64_b32 v[86:87], v4 offset0:136 offset1:144
	v_or_b32_e32 v47, 0x1800, v0
	v_lshlrev_b64 v[79:80], 2, v[2:3]
	v_add_co_u32 v81, s2, s70, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v82, s2, s71, v51, s2
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v93, v47
	global_store_b32 v[77:78], v58, off
	v_add_co_u32 v79, s2, s70, v79
	v_add_co_ci_u32_e64 v80, s2, s71, v80, s2
	v_lshlrev_b64 v[77:78], 2, v[2:3]
	s_clause 0x1
	global_store_b32 v[81:82], v59, off
	global_store_b32 v[79:80], v60, off
	v_or_b32_e32 v50, 0x1a00, v0
	ds_load_2addr_stride64_b32 v[93:94], v4 offset0:152 offset1:160
	ds_load_2addr_stride64_b32 v[95:96], v4 offset0:168 offset1:176
	v_add_co_u32 v58, s2, s70, v77
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v59, s2, s71, v78, s2
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v53, s80, v84
	v_add_nc_u32_e32 v2, v88, v50
	v_or_b32_e32 v51, 0x1c00, v0
	global_store_b32 v[58:59], v61, off
	v_lshrrev_b32_e32 v60, s80, v85
	v_and_b32_e32 v58, s10, v53
	v_lshlrev_b64 v[81:82], 2, v[2:3]
	v_add_nc_u32_e32 v2, v97, v51
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v62, s80, v86
	v_and_b32_e32 v59, s10, v60
	v_lshlrev_b32_e32 v78, 2, v58
	v_lshrrev_b32_e32 v58, s80, v87
	v_lshlrev_b64 v[60:61], 2, v[2:3]
	v_and_b32_e32 v2, s10, v62
	v_lshlrev_b32_e32 v79, 2, v59
	ds_load_b32 v62, v78
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v59, s80, v94
	v_and_b32_e32 v58, s10, v58
	v_lshlrev_b32_e32 v80, 2, v2
	ds_load_b32 v88, v79
	v_lshrrev_b32_e32 v2, s80, v93
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v77, s80, v95
	v_lshrrev_b32_e32 v83, s80, v96
	v_and_b32_e32 v59, s10, v59
	v_lshlrev_b32_e32 v89, 2, v58
	v_and_b32_e32 v2, s10, v2
	v_and_b32_e32 v58, s10, v77
	v_and_b32_e32 v77, s10, v83
	v_or_b32_e32 v53, 0x1e00, v0
	v_lshlrev_b32_e32 v91, 2, v59
	v_lshlrev_b32_e32 v90, 2, v2
	v_lshlrev_b32_e32 v92, 2, v58
	v_lshlrev_b32_e32 v83, 2, v77
	ds_load_b32 v77, v80
	ds_load_b32 v101, v89
	ds_load_b32 v102, v90
	ds_load_b32 v103, v91
	ds_load_b32 v105, v92
	ds_load_b32 v106, v83
	v_or_b32_e32 v59, 0x2000, v0
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v2, v62, v53
	v_add_co_u32 v81, s2, s70, v81
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v82, s2, s71, v82, s2
	v_lshlrev_b64 v[97:98], 2, v[2:3]
	v_add_co_u32 v99, s2, s70, v60
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v88, v59
	v_or_b32_e32 v58, 0x2200, v0
	v_add_co_ci_u32_e64 v100, s2, s71, v61, s2
	v_add_co_u32 v61, s2, s70, v97
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v62, s2, s71, v98, s2
	v_lshlrev_b64 v[97:98], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v77, v58
	v_or_b32_e32 v60, 0x2400, v0
	s_clause 0x2
	global_store_b32 v[81:82], v67, off
	global_store_b32 v[99:100], v68, off
	global_store_b32 v[61:62], v84, off
	v_or_b32_e32 v62, 0x2600, v0
	v_or_b32_e32 v61, 0x2800, v0
	v_lshlrev_b64 v[67:68], 2, v[2:3]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v101, v60
	v_add_co_u32 v81, s2, s70, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v82, s2, s71, v98, s2
	v_lshlrev_b64 v[97:98], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v102, v62
	ds_load_2addr_stride64_b32 v[101:102], v4 offset0:184 offset1:192
	v_add_co_u32 v67, s2, s70, v67
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v68, s2, s71, v68, s2
	v_lshlrev_b64 v[99:100], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v103, v61
	s_clause 0x1
	global_store_b32 v[81:82], v85, off
	global_store_b32 v[67:68], v86, off
	ds_load_2addr_stride64_b32 v[103:104], v4 offset0:200 offset1:208
	v_or_b32_e32 v68, 0x2a00, v0
	v_add_co_u32 v97, s2, s70, v97
	v_lshlrev_b64 v[81:82], 2, v[2:3]
	v_add_co_ci_u32_e64 v98, s2, s71, v98, s2
	v_add_co_u32 v84, s2, s70, v99
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v105, v68
	v_add_co_ci_u32_e64 v85, s2, s71, v100, s2
	v_add_co_u32 v86, s2, s70, v81
	global_store_b32 v[97:98], v87, off
	ds_load_2addr_stride64_b32 v[97:98], v4 offset0:216 offset1:224
	v_add_co_ci_u32_e64 v87, s2, s71, v82, s2
	v_lshlrev_b64 v[81:82], 2, v[2:3]
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v77, s80, v101
	ds_load_2addr_stride64_b32 v[99:100], v4 offset0:232 offset1:240
	v_or_b32_e32 v67, 0x2c00, v0
	v_lshrrev_b32_e32 v88, s80, v102
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v109, s80, v103
	v_add_co_u32 v105, s2, s70, v81
	v_and_b32_e32 v81, s10, v77
	v_add_nc_u32_e32 v2, v106, v67
	v_add_co_ci_u32_e64 v106, s2, s71, v82, s2
	v_and_b32_e32 v82, s10, v88
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b32_e32 v124, 2, v81
	v_lshlrev_b64 v[107:108], 2, v[2:3]
	v_and_b32_e32 v2, s10, v109
	v_lshrrev_b32_e32 v81, s80, v104
	v_lshlrev_b32_e32 v125, 2, v82
	ds_load_b32 v88, v124
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v82, s80, v98
	v_lshlrev_b32_e32 v126, 2, v2
	v_lshrrev_b32_e32 v2, s80, v97
	ds_load_b32 v111, v125
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v109, s80, v99
	v_lshrrev_b32_e32 v110, s80, v100
	v_and_b32_e32 v81, s10, v81
	v_and_b32_e32 v2, s10, v2
	v_and_b32_e32 v82, s10, v82
	v_and_b32_e32 v109, s10, v109
	v_and_b32_e32 v110, s10, v110
	v_lshlrev_b32_e32 v127, 2, v81
	v_lshlrev_b32_e32 v128, 2, v2
	v_lshlrev_b32_e32 v129, 2, v82
	v_or_b32_e32 v77, 0x2e00, v0
	v_lshlrev_b32_e32 v130, 2, v109
	v_lshlrev_b32_e32 v131, 2, v110
	ds_load_b32 v82, v126
	ds_load_b32 v109, v127
	ds_load_b32 v110, v128
	ds_load_b32 v112, v129
	ds_load_b32 v113, v130
	ds_load_b32 v114, v131
	v_or_b32_e32 v81, 0x3000, v0
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v2, v88, v77
	s_clause 0x2
	global_store_b32 v[84:85], v93, off
	global_store_b32 v[86:87], v94, off
	global_store_b32 v[105:106], v95, off
	v_or_b32_e32 v84, 0x3200, v0
	v_add_co_u32 v87, s2, s70, v107
	v_lshlrev_b64 v[85:86], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v111, v81
	v_add_co_ci_u32_e64 v88, s2, s71, v108, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[93:94], 2, v[2:3]
	v_add_co_u32 v105, s2, s70, v85
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v82, v84
	v_or_b32_e32 v82, 0x3400, v0
	v_add_co_ci_u32_e64 v106, s2, s71, v86, s2
	v_add_co_u32 v93, s2, s70, v93
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[107:108], 2, v[2:3]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v109, v82
	v_or_b32_e32 v85, 0x3600, v0
	v_add_co_ci_u32_e64 v94, s2, s71, v94, s2
	s_clause 0x2
	global_store_b32 v[87:88], v96, off
	global_store_b32 v[105:106], v101, off
	global_store_b32 v[93:94], v102, off
	v_lshlrev_b64 v[87:88], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v110, v85
	v_or_b32_e32 v86, 0x3800, v0
	v_add_co_u32 v93, s2, s70, v107
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v94, s2, s71, v108, s2
	v_lshlrev_b64 v[95:96], 2, v[2:3]
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v2, v112, v86
	v_add_co_u32 v101, s2, s70, v87
	v_or_b32_e32 v87, 0x3a00, v0
	v_add_co_ci_u32_e64 v102, s2, s71, v88, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[105:106], 2, v[2:3]
	v_or_b32_e32 v88, 0x3c00, v0
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v113, v87
	v_add_co_u32 v95, s2, s70, v95
	v_add_co_ci_u32_e64 v96, s2, s71, v96, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[107:108], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v114, v88
	v_add_co_u32 v105, s2, s70, v105
	v_add_co_ci_u32_e64 v106, s2, s71, v106, s2
	s_clause 0x3
	global_store_b32 v[93:94], v103, off
	global_store_b32 v[101:102], v104, off
	global_store_b32 v[95:96], v97, off
	global_store_b32 v[105:106], v98, off
	v_lshlrev_b64 v[93:94], 2, v[2:3]
	v_add_co_u32 v95, s2, s70, v107
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v96, s2, s71, v108, s2
	v_lshlrev_b32_e32 v2, 2, v32
	v_add_co_u32 v93, s2, s70, v93
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v94, s2, s71, v94, s2
	s_add_u32 s2, s72, s8
	s_addc_u32 s3, s73, s9
	s_clause 0x1
	global_store_b32 v[95:96], v99, off
	global_store_b32 v[93:94], v100, off
	s_clause 0x7
	global_load_b128 v[93:96], v2, s[2:3]
	global_load_b128 v[97:100], v2, s[2:3] offset:16
	global_load_b128 v[101:104], v2, s[2:3] offset:32
	global_load_b128 v[105:108], v2, s[2:3] offset:48
	global_load_b128 v[109:112], v2, s[2:3] offset:64
	global_load_b128 v[113:116], v2, s[2:3] offset:80
	global_load_b128 v[117:120], v2, s[2:3] offset:96
	global_load_b96 v[121:123], v2, s[2:3] offset:112
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v35, v93 offset:64
	ds_store_b32 v25, v94 offset:64
	ds_store_b32 v36, v95 offset:64
	ds_store_b32 v37, v96 offset:64
	ds_store_b32 v38, v97 offset:64
	ds_store_b32 v39, v98 offset:64
	ds_store_b32 v17, v99 offset:64
	ds_store_b32 v18, v100 offset:64
	ds_store_b32 v26, v101 offset:64
	ds_store_b32 v27, v102 offset:64
	ds_store_b32 v28, v103 offset:64
	ds_store_b32 v9, v104 offset:64
	ds_store_b32 v10, v105 offset:64
	ds_store_b32 v11, v106 offset:64
	ds_store_b32 v19, v107 offset:64
	ds_store_b32 v20, v108 offset:64
	ds_store_b32 v12, v109 offset:64
	ds_store_b32 v40, v110 offset:64
	ds_store_b32 v41, v111 offset:64
	ds_store_b32 v42, v112 offset:64
	ds_store_b32 v43, v113 offset:64
	ds_store_b32 v13, v114 offset:64
	ds_store_b32 v21, v115 offset:64
	ds_store_b32 v22, v116 offset:64
	ds_store_b32 v23, v117 offset:64
	ds_store_b32 v24, v118 offset:64
	ds_store_b32 v14, v119 offset:64
	ds_store_b32 v15, v120 offset:64
	ds_store_b32 v16, v121 offset:64
	ds_store_b32 v44, v122 offset:64
	ds_store_b32 v45, v123 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_stride64_b32 v[9:10], v4 offset0:8 offset1:16
	ds_load_2addr_stride64_b32 v[11:12], v4 offset0:24 offset1:32
	ds_load_2addr_stride64_b32 v[13:14], v4 offset0:40 offset1:48
	ds_load_b32 v32, v69 offset:64
	ds_load_b32 v2, v73
	ds_load_b32 v39, v72
	ds_load_b32 v45, v76
	ds_load_b32 v69, v71
	ds_load_b32 v71, v75
	ds_load_b32 v70, v70
	ds_load_b32 v72, v74
	ds_load_2addr_stride64_b32 v[15:16], v4 offset0:56 offset1:64
	ds_load_2addr_stride64_b32 v[17:18], v4 offset0:72 offset1:80
	ds_load_2addr_stride64_b32 v[19:20], v4 offset0:88 offset1:96
	ds_load_2addr_stride64_b32 v[21:22], v4 offset0:104 offset1:112
	ds_load_b32 v73, v57
	ds_load_b32 v66, v66
	ds_load_b32 v74, v56
	ds_load_b32 v65, v65
	ds_load_b32 v75, v55
	ds_load_b32 v76, v64
	ds_load_b32 v93, v54
	ds_load_b32 v94, v63
	ds_load_2addr_stride64_b32 v[23:24], v4 offset0:120 offset1:128
	ds_load_2addr_stride64_b32 v[25:26], v4 offset0:136 offset1:144
	ds_load_2addr_stride64_b32 v[27:28], v4 offset0:152 offset1:160
	ds_load_2addr_stride64_b32 v[35:36], v4 offset0:168 offset1:176
	s_waitcnt lgkmcnt(22)
	v_add_nc_u32_e32 v2, v2, v0
	ds_load_b32 v78, v78
	ds_load_b32 v79, v79
	ds_load_b32 v80, v80
	ds_load_b32 v89, v89
	ds_load_b32 v90, v90
	ds_load_b32 v91, v91
	ds_load_b32 v92, v92
	ds_load_b32 v83, v83
	v_lshlrev_b64 v[37:38], 2, v[2:3]
	s_waitcnt lgkmcnt(29)
	v_add_nc_u32_e32 v2, v39, v52
	ds_load_2addr_stride64_b32 v[39:40], v4 offset0:184 offset1:192
	ds_load_2addr_stride64_b32 v[41:42], v4 offset0:200 offset1:208
	ds_load_2addr_stride64_b32 v[43:44], v4 offset0:216 offset1:224
	ds_load_2addr_stride64_b32 v[54:55], v4 offset0:232 offset1:240
	v_lshlrev_b64 v[56:57], 2, v[2:3]
	s_waitcnt lgkmcnt(32)
	v_add_nc_u32_e32 v2, v45, v49
	v_add_co_u32 v37, s2, s74, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v38, s2, s75, v38, s2
	v_lshlrev_b64 v[63:64], 2, v[2:3]
	s_waitcnt lgkmcnt(31)
	v_add_nc_u32_e32 v2, v69, v48
	v_add_co_u32 v48, s2, s74, v56
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v49, s2, s75, v57, s2
	ds_load_b32 v45, v124
	ds_load_b32 v52, v125
	ds_load_b32 v69, v126
	ds_load_b32 v95, v127
	ds_load_b32 v96, v128
	ds_load_b32 v97, v129
	ds_load_b32 v98, v130
	ds_load_b32 v99, v131
	global_store_b32 v[37:38], v32, off
	v_lshlrev_b64 v[37:38], 2, v[2:3]
	s_waitcnt lgkmcnt(38)
	v_add_nc_u32_e32 v2, v71, v6
	global_store_b32 v[48:49], v9, off
	v_add_co_u32 v48, s2, s74, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v49, s2, s75, v64, s2
	v_lshlrev_b64 v[56:57], 2, v[2:3]
	s_waitcnt lgkmcnt(37)
	v_add_nc_u32_e32 v2, v70, v5
	v_add_co_u32 v4, s2, s74, v37
	v_add_co_ci_u32_e64 v5, s2, s75, v38, s2
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[37:38], 2, v[2:3]
	s_waitcnt lgkmcnt(36)
	v_add_nc_u32_e32 v2, v72, v29
	s_clause 0x1
	global_store_b32 v[48:49], v10, off
	global_store_b32 v[4:5], v11, off
	v_add_co_u32 v56, s2, s74, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v57, s2, s75, v57, s2
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(31)
	v_add_nc_u32_e32 v2, v73, v7
	v_add_co_u32 v6, s2, s74, v37
	v_add_co_ci_u32_e64 v7, s2, s75, v38, s2
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[9:10], 2, v[2:3]
	s_waitcnt lgkmcnt(30)
	v_add_nc_u32_e32 v2, v66, v8
	v_add_co_u32 v4, s2, s74, v4
	global_store_b32 v[56:57], v12, off
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	v_lshlrev_b64 v[11:12], 2, v[2:3]
	s_waitcnt lgkmcnt(29)
	v_add_nc_u32_e32 v2, v74, v46
	v_add_co_u32 v8, s2, s74, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s2, s75, v10, s2
	s_clause 0x1
	global_store_b32 v[6:7], v13, off
	global_store_b32 v[4:5], v14, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(28)
	v_add_nc_u32_e32 v2, v65, v30
	global_store_b32 v[8:9], v15, off
	v_add_co_u32 v6, s2, s74, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v12, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(27)
	v_add_nc_u32_e32 v2, v75, v31
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(26)
	v_add_nc_u32_e32 v2, v76, v47
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v16, off
	global_store_b32 v[4:5], v17, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(25)
	v_add_nc_u32_e32 v2, v93, v50
	global_store_b32 v[8:9], v18, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(24)
	v_add_nc_u32_e32 v2, v94, v51
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(19)
	v_add_nc_u32_e32 v2, v78, v53
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v19, off
	global_store_b32 v[4:5], v20, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(18)
	v_add_nc_u32_e32 v2, v79, v59
	global_store_b32 v[8:9], v21, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(17)
	v_add_nc_u32_e32 v2, v80, v58
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(16)
	v_add_nc_u32_e32 v2, v89, v60
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v22, off
	global_store_b32 v[4:5], v23, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(15)
	v_add_nc_u32_e32 v2, v90, v62
	global_store_b32 v[8:9], v24, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(14)
	v_add_nc_u32_e32 v2, v91, v61
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(13)
	v_add_nc_u32_e32 v2, v92, v68
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v25, off
	global_store_b32 v[4:5], v26, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(12)
	v_add_nc_u32_e32 v2, v83, v67
	global_store_b32 v[8:9], v27, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v2, v45, v77
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v52, v81
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v28, off
	global_store_b32 v[4:5], v35, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v69, v84
	global_store_b32 v[8:9], v36, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v95, v82
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v96, v85
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v39, off
	global_store_b32 v[4:5], v40, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v2, v97, v86
	global_store_b32 v[8:9], v41, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v98, v87
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v99, v88
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v10, s2, s74, v10
	v_add_co_ci_u32_e64 v11, s2, s75, v11, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s2, s74, v2
	v_add_co_ci_u32_e64 v3, s2, s75, v3, s2
	s_clause 0x4
	global_store_b32 v[6:7], v42, off
	global_store_b32 v[4:5], v43, off
	global_store_b32 v[8:9], v44, off
	global_store_b32 v[10:11], v54, off
	global_store_b32 v[2:3], v55, off
	s_load_b32 s0, s[0:1], 0x50
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s0
	s_cselect_b32 s0, -1, 0
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
; %bb.365:
	v_add_nc_u32_e32 v2, v33, v34
	s_or_b32 s7, s7, exec_lo
; %bb.366:                              ; %Flow167
	s_or_b32 exec_lo, exec_lo, s0
.LBB60_367:                             ; %Flow166
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB60_369
; %bb.368:                              ; %_ZN7rocprim6detail25onesweep_iteration_helperIjjjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEES8_S8_S8_EEvT0_T1_T2_T3_PjSD_PNS0_23onesweep_lookback_stateES3_jjjRNS4_13storage_type_E.exit.sink.split.i
	v_lshlrev_b32_e32 v3, 2, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	ds_load_b32 v3, v3
	v_add_co_u32 v0, vcc_lo, s78, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s79, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB60_369:                             ; %_ZN7rocprim6detail18onesweep_iterationILj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0EN6thrust10device_ptrIjEES5_S5_S5_jNS_19identity_decomposerEEEvT4_T5_T6_T7_jPT8_SC_PNS0_23onesweep_lookback_stateET9_jjj.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj
		.amdhsa_group_segment_fixed_size 63552
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 132
		.amdhsa_next_free_sgpr 88
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj,comdat
.Lfunc_end60:
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end60-_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEES7_S7_S7_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SE_PNS0_23onesweep_lookback_stateET6_jjj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 24956
; NumSgprs: 90
; NumVgprs: 132
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 63552 bytes/workgroup (compile time only)
; SGPRBlocks: 11
; VGPRBlocks: 16
; NumSGPRsForWavesPerEU: 90
; NumVGPRsForWavesPerEU: 132
; Occupancy: 8
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.protected	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj ; -- Begin function _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.globl	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	8
	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj: ; @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
; %bb.0:
	s_clause 0x3
	s_load_b128 s[80:83], s[0:1], 0x44
	s_load_b256 s[68:75], s[0:1], 0x0
	s_load_b128 s[76:79], s[0:1], 0x28
	s_load_b64 s[84:85], s[0:1], 0x38
	v_mul_u32_u24_e32 v32, 31, v0
	s_mul_i32 s86, s15, 0x3e00
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_u32 s15, s82
	s_cbranch_scc0 .LBB61_337
; %bb.1:
	s_load_b32 s2, s[0:1], 0x20
	s_mov_b32 s87, 0
	s_mul_i32 s66, s82, 0xffffc200
	v_dual_mov_b32 v4, -1 :: v_dual_lshlrev_b32 v9, 2, v32
	s_lshl_b64 s[82:83], s[86:87], 2
	v_mov_b32_e32 v3, -1
	s_waitcnt lgkmcnt(0)
	s_add_i32 s66, s66, s2
	s_add_u32 s3, s68, s82
	s_addc_u32 s4, s69, s83
	v_add_co_u32 v1, s3, s3, v9
	v_cmp_gt_u32_e64 s2, s66, v32
	v_add_co_ci_u32_e64 v2, null, s4, 0, s3
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB61_3
; %bb.2:
	global_load_b32 v4, v[1:2], off
.LBB61_3:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v5, 1, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s66, v5
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB61_5
; %bb.4:
	global_load_b32 v3, v[1:2], off offset:4
.LBB61_5:
	s_or_b32 exec_lo, exec_lo, s4
	v_dual_mov_b32 v5, -1 :: v_dual_add_nc_u32 v6, 2, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e64 s4, s66, v6
	v_mov_b32_e32 v6, -1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB61_7
; %bb.6:
	global_load_b32 v6, v[1:2], off offset:8
.LBB61_7:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v7, 3, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s66, v7
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB61_9
; %bb.8:
	global_load_b32 v5, v[1:2], off offset:12
.LBB61_9:
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v16, -1 :: v_dual_add_nc_u32 v7, 4, v32
	v_mov_b32_e32 v17, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s66, v7
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB61_11
; %bb.10:
	global_load_b32 v17, v[1:2], off offset:16
.LBB61_11:
	s_or_b32 exec_lo, exec_lo, s7
	v_add_nc_u32_e32 v7, 5, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s66, v7
	s_and_saveexec_b32 s8, s7
	s_cbranch_execz .LBB61_13
; %bb.12:
	global_load_b32 v16, v[1:2], off offset:20
.LBB61_13:
	s_or_b32 exec_lo, exec_lo, s8
	v_dual_mov_b32 v22, -1 :: v_dual_add_nc_u32 v7, 6, v32
	v_mov_b32_e32 v21, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s66, v7
	s_and_saveexec_b32 s9, s8
	s_cbranch_execz .LBB61_15
; %bb.14:
	global_load_b32 v22, v[1:2], off offset:24
.LBB61_15:
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v7, 7, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s66, v7
	s_and_saveexec_b32 s10, s9
	s_cbranch_execz .LBB61_17
; %bb.16:
	global_load_b32 v21, v[1:2], off offset:28
.LBB61_17:
	s_or_b32 exec_lo, exec_lo, s10
	v_dual_mov_b32 v24, -1 :: v_dual_add_nc_u32 v7, 8, v32
	v_mov_b32_e32 v23, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s66, v7
	s_and_saveexec_b32 s11, s10
	s_cbranch_execz .LBB61_19
; %bb.18:
	global_load_b32 v24, v[1:2], off offset:32
.LBB61_19:
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v7, 9, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s11, s66, v7
	s_and_saveexec_b32 s12, s11
	s_cbranch_execz .LBB61_21
; %bb.20:
	global_load_b32 v23, v[1:2], off offset:36
.LBB61_21:
	s_or_b32 exec_lo, exec_lo, s12
	v_dual_mov_b32 v26, -1 :: v_dual_add_nc_u32 v7, 10, v32
	v_mov_b32_e32 v25, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s66, v7
	s_and_saveexec_b32 s13, s12
	s_cbranch_execz .LBB61_23
; %bb.22:
	global_load_b32 v25, v[1:2], off offset:40
.LBB61_23:
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v7, 11, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s13, s66, v7
	s_and_saveexec_b32 s14, s13
	s_cbranch_execz .LBB61_25
; %bb.24:
	global_load_b32 v26, v[1:2], off offset:44
.LBB61_25:
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v28, -1 :: v_dual_add_nc_u32 v7, 12, v32
	v_mov_b32_e32 v27, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s14, s66, v7
	s_and_saveexec_b32 s16, s14
	s_cbranch_execz .LBB61_27
; %bb.26:
	global_load_b32 v28, v[1:2], off offset:48
.LBB61_27:
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v7, 13, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s16, s66, v7
	s_and_saveexec_b32 s17, s16
	s_cbranch_execz .LBB61_29
; %bb.28:
	global_load_b32 v27, v[1:2], off offset:52
.LBB61_29:
	s_or_b32 exec_lo, exec_lo, s17
	v_dual_mov_b32 v30, -1 :: v_dual_add_nc_u32 v7, 14, v32
	v_mov_b32_e32 v29, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s17, s66, v7
	s_and_saveexec_b32 s18, s17
	s_cbranch_execz .LBB61_31
; %bb.30:
	global_load_b32 v30, v[1:2], off offset:56
.LBB61_31:
	s_or_b32 exec_lo, exec_lo, s18
	v_add_nc_u32_e32 v7, 15, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s18, s66, v7
	s_and_saveexec_b32 s19, s18
	s_cbranch_execz .LBB61_33
; %bb.32:
	global_load_b32 v29, v[1:2], off offset:60
.LBB61_33:
	s_or_b32 exec_lo, exec_lo, s19
	v_add_nc_u32_e32 v7, 16, v32
	v_mov_b32_e32 v31, -1
	v_mov_b32_e32 v33, -1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s19, s66, v7
	s_and_saveexec_b32 s20, s19
	s_cbranch_execz .LBB61_35
; %bb.34:
	global_load_b32 v33, v[1:2], off offset:64
.LBB61_35:
	s_or_b32 exec_lo, exec_lo, s20
	v_add_nc_u32_e32 v7, 17, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s20, s66, v7
	s_and_saveexec_b32 s21, s20
	s_cbranch_execz .LBB61_37
; %bb.36:
	global_load_b32 v31, v[1:2], off offset:68
.LBB61_37:
	s_or_b32 exec_lo, exec_lo, s21
	v_dual_mov_b32 v34, -1 :: v_dual_add_nc_u32 v7, 18, v32
	v_mov_b32_e32 v35, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s21, s66, v7
	s_and_saveexec_b32 s22, s21
	s_cbranch_execz .LBB61_39
; %bb.38:
	global_load_b32 v35, v[1:2], off offset:72
.LBB61_39:
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v7, 19, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s22, s66, v7
	s_and_saveexec_b32 s23, s22
	s_cbranch_execz .LBB61_41
; %bb.40:
	global_load_b32 v34, v[1:2], off offset:76
.LBB61_41:
	s_or_b32 exec_lo, exec_lo, s23
	v_dual_mov_b32 v36, -1 :: v_dual_add_nc_u32 v7, 20, v32
	v_mov_b32_e32 v37, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s23, s66, v7
	s_and_saveexec_b32 s24, s23
	s_cbranch_execz .LBB61_43
; %bb.42:
	global_load_b32 v36, v[1:2], off offset:80
.LBB61_43:
	s_or_b32 exec_lo, exec_lo, s24
	v_add_nc_u32_e32 v7, 21, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s24, s66, v7
	s_and_saveexec_b32 s25, s24
	s_cbranch_execz .LBB61_45
; %bb.44:
	global_load_b32 v37, v[1:2], off offset:84
.LBB61_45:
	s_or_b32 exec_lo, exec_lo, s25
	v_dual_mov_b32 v38, -1 :: v_dual_add_nc_u32 v7, 22, v32
	v_mov_b32_e32 v39, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s25, s66, v7
	s_and_saveexec_b32 s26, s25
	s_cbranch_execz .LBB61_47
; %bb.46:
	global_load_b32 v39, v[1:2], off offset:88
.LBB61_47:
	s_or_b32 exec_lo, exec_lo, s26
	v_add_nc_u32_e32 v7, 23, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s26, s66, v7
	s_and_saveexec_b32 s27, s26
	s_cbranch_execz .LBB61_49
; %bb.48:
	global_load_b32 v38, v[1:2], off offset:92
.LBB61_49:
	s_or_b32 exec_lo, exec_lo, s27
	v_dual_mov_b32 v40, -1 :: v_dual_add_nc_u32 v7, 24, v32
	v_mov_b32_e32 v41, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s27, s66, v7
	s_and_saveexec_b32 s28, s27
	s_cbranch_execz .LBB61_51
; %bb.50:
	global_load_b32 v41, v[1:2], off offset:96
.LBB61_51:
	s_or_b32 exec_lo, exec_lo, s28
	v_add_nc_u32_e32 v7, 25, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s28, s66, v7
	s_and_saveexec_b32 s29, s28
	s_cbranch_execz .LBB61_53
; %bb.52:
	global_load_b32 v40, v[1:2], off offset:100
.LBB61_53:
	s_or_b32 exec_lo, exec_lo, s29
	v_dual_mov_b32 v42, -1 :: v_dual_add_nc_u32 v7, 26, v32
	v_mov_b32_e32 v43, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s29, s66, v7
	s_and_saveexec_b32 s30, s29
	s_cbranch_execz .LBB61_55
; %bb.54:
	global_load_b32 v43, v[1:2], off offset:104
.LBB61_55:
	s_or_b32 exec_lo, exec_lo, s30
	v_add_nc_u32_e32 v7, 27, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s30, s66, v7
	s_and_saveexec_b32 s31, s30
	s_cbranch_execz .LBB61_57
; %bb.56:
	global_load_b32 v42, v[1:2], off offset:108
.LBB61_57:
	s_or_b32 exec_lo, exec_lo, s31
	v_dual_mov_b32 v44, -1 :: v_dual_add_nc_u32 v7, 28, v32
	v_mov_b32_e32 v45, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s31, s66, v7
	s_and_saveexec_b32 s33, s31
	s_cbranch_execz .LBB61_59
; %bb.58:
	global_load_b32 v45, v[1:2], off offset:112
.LBB61_59:
	s_or_b32 exec_lo, exec_lo, s33
	v_add_nc_u32_e32 v7, 29, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s33, s66, v7
	s_and_saveexec_b32 s34, s33
	s_cbranch_execz .LBB61_61
; %bb.60:
	global_load_b32 v44, v[1:2], off offset:116
.LBB61_61:
	s_or_b32 exec_lo, exec_lo, s34
	v_dual_mov_b32 v46, -1 :: v_dual_add_nc_u32 v7, 30, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s34, s66, v7
	s_and_saveexec_b32 s35, s34
	s_cbranch_execz .LBB61_63
; %bb.62:
	global_load_b32 v46, v[1:2], off offset:120
.LBB61_63:                              ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIjEEjLj31EjEEvjT_RAT1__T0_jT2_.exit.i.i
	s_or_b32 exec_lo, exec_lo, s35
	v_or_b32_e32 v1, 0xfffffe00, v0
	v_dual_mov_b32 v7, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_mov_b32 s35, 0
.LBB61_64:                              ; %.lr.ph.i.i.i.i.i.i23.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v1, 0x200, v1
	ds_store_b32 v2, v7
	v_add_nc_u32_e32 v2, 0x800, v2
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v1
	s_or_b32 s35, vcc_lo, s35
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB61_64
; %bb.65:                               ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i25.i
	s_or_b32 exec_lo, exec_lo, s35
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_lshl_b32 s35, -1, s81
	v_lshrrev_b32_e32 v11, s80, v6
	s_not_b32 s67, s35
	s_mov_b32 s39, exec_lo
	v_and_b32_e32 v1, s67, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v2, 9, v1
	v_lshrrev_b32_e32 v1, 3, v1
	v_and_or_b32 v2, 0xe00, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v2
	v_add_lshl_u32 v7, v2, v1, 1
	v_lshrrev_b32_e32 v2, s80, v3
	ds_load_u16 v1, v7
	v_and_b32_e32 v2, s67, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 9, v2
	v_lshrrev_b32_e32 v2, 3, v2
	v_and_or_b32 v8, 0xe00, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 1, v8
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v10, v1, 1
	v_add_lshl_u32 v8, v8, v2, 1
	ds_store_b16 v7, v10
	ds_load_u16 v2, v8
	v_and_b32_e32 v10, s67, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 9, v10
	v_lshrrev_b32_e32 v10, 3, v10
	v_and_or_b32 v11, 0xe00, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 1, v11
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v12, v2, 1
	v_add_lshl_u32 v18, v11, v10, 1
	v_lshrrev_b32_e32 v11, s80, v5
	ds_store_b16 v8, v12
	ds_load_u16 v10, v18
	v_and_b32_e32 v11, s67, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 9, v11
	v_lshrrev_b32_e32 v11, 3, v11
	v_and_or_b32 v12, 0xe00, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 1, v12
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v13, v10, 1
	v_add_lshl_u32 v20, v12, v11, 1
	v_lshrrev_b32_e32 v12, s80, v17
	ds_store_b16 v18, v13
	ds_load_u16 v11, v20
	v_and_b32_e32 v12, s67, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 9, v12
	v_lshrrev_b32_e32 v12, 3, v12
	v_and_or_b32 v13, 0xe00, v13, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 1, v13
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v14, v11, 1
	v_add_lshl_u32 v48, v13, v12, 1
	v_lshrrev_b32_e32 v13, s80, v16
	ds_store_b16 v20, v14
	ds_load_u16 v12, v48
	v_and_b32_e32 v13, s67, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 9, v13
	v_lshrrev_b32_e32 v13, 3, v13
	v_and_or_b32 v14, 0xe00, v14, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 1, v14
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v15, v12, 1
	v_add_lshl_u32 v50, v14, v13, 1
	v_lshrrev_b32_e32 v14, s80, v22
	ds_store_b16 v48, v15
	ds_load_u16 v13, v50
	v_and_b32_e32 v14, s67, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v15, 9, v14
	v_lshrrev_b32_e32 v14, 3, v14
	v_and_or_b32 v15, 0xe00, v15, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v15, 1, v15
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v19, v13, 1
	v_add_lshl_u32 v52, v15, v14, 1
	v_lshrrev_b32_e32 v15, s80, v21
	ds_store_b16 v50, v19
	ds_load_u16 v14, v52
	v_and_b32_e32 v15, s67, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v19, 9, v15
	v_lshrrev_b32_e32 v15, 3, v15
	v_and_or_b32 v19, 0xe00, v19, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v19, 1, v19
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v47, v14, 1
	v_add_lshl_u32 v54, v19, v15, 1
	v_lshrrev_b32_e32 v19, s80, v24
	ds_store_b16 v52, v47
	ds_load_u16 v15, v54
	v_and_b32_e32 v19, s67, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v47, 9, v19
	v_lshrrev_b32_e32 v19, 3, v19
	v_and_or_b32 v47, 0xe00, v47, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v47, 1, v47
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v49, v15, 1
	v_add_lshl_u32 v56, v47, v19, 1
	v_lshrrev_b32_e32 v47, s80, v23
	ds_store_b16 v54, v49
	ds_load_u16 v19, v56
	v_and_b32_e32 v47, s67, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v49, 9, v47
	v_lshrrev_b32_e32 v47, 3, v47
	v_and_or_b32 v49, 0xe00, v49, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v49, 1, v49
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v51, v19, 1
	v_add_lshl_u32 v58, v49, v47, 1
	v_lshrrev_b32_e32 v49, s80, v25
	ds_store_b16 v56, v51
	ds_load_u16 v47, v58
	v_and_b32_e32 v49, s67, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v51, 9, v49
	v_lshrrev_b32_e32 v49, 3, v49
	v_and_or_b32 v51, 0xe00, v51, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v51, 1, v51
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v53, v47, 1
	v_add_lshl_u32 v60, v51, v49, 1
	v_lshrrev_b32_e32 v51, s80, v26
	ds_store_b16 v58, v53
	ds_load_u16 v49, v60
	v_and_b32_e32 v51, s67, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v53, 9, v51
	v_lshrrev_b32_e32 v51, 3, v51
	v_and_or_b32 v53, 0xe00, v53, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v53, 1, v53
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v55, v49, 1
	v_add_lshl_u32 v62, v53, v51, 1
	v_lshrrev_b32_e32 v53, s80, v28
	ds_store_b16 v60, v55
	ds_load_u16 v51, v62
	v_and_b32_e32 v53, s67, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v55, 9, v53
	v_lshrrev_b32_e32 v53, 3, v53
	v_and_or_b32 v55, 0xe00, v55, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v55, 1, v55
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v57, v51, 1
	v_add_lshl_u32 v64, v55, v53, 1
	v_lshrrev_b32_e32 v55, s80, v27
	ds_store_b16 v62, v57
	ds_load_u16 v53, v64
	v_and_b32_e32 v55, s67, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v57, 9, v55
	v_lshrrev_b32_e32 v55, 3, v55
	v_and_or_b32 v57, 0xe00, v57, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v57, 1, v57
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v59, v53, 1
	v_add_lshl_u32 v66, v57, v55, 1
	v_lshrrev_b32_e32 v57, s80, v30
	ds_store_b16 v64, v59
	ds_load_u16 v55, v66
	v_and_b32_e32 v57, s67, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v59, 9, v57
	v_lshrrev_b32_e32 v57, 3, v57
	v_and_or_b32 v59, 0xe00, v59, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v59, 1, v59
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v61, v55, 1
	v_add_lshl_u32 v68, v59, v57, 1
	v_lshrrev_b32_e32 v59, s80, v29
	ds_store_b16 v66, v61
	ds_load_u16 v57, v68
	v_and_b32_e32 v59, s67, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v61, 9, v59
	v_lshrrev_b32_e32 v59, 3, v59
	v_and_or_b32 v61, 0xe00, v61, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v61, 1, v61
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v63, v57, 1
	v_add_lshl_u32 v70, v61, v59, 1
	v_lshrrev_b32_e32 v61, s80, v33
	ds_store_b16 v68, v63
	ds_load_u16 v59, v70
	v_and_b32_e32 v61, s67, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v63, 9, v61
	v_lshrrev_b32_e32 v61, 3, v61
	v_and_or_b32 v63, 0xe00, v63, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v63, 1, v63
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v65, v59, 1
	v_add_lshl_u32 v72, v63, v61, 1
	v_lshrrev_b32_e32 v63, s80, v31
	ds_store_b16 v70, v65
	ds_load_u16 v61, v72
	v_and_b32_e32 v63, s67, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v65, 9, v63
	v_lshrrev_b32_e32 v63, 3, v63
	v_and_or_b32 v65, 0xe00, v65, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v65, 1, v65
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v67, v61, 1
	v_add_lshl_u32 v74, v65, v63, 1
	v_lshrrev_b32_e32 v65, s80, v35
	ds_store_b16 v72, v67
	ds_load_u16 v63, v74
	v_and_b32_e32 v65, s67, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v67, 9, v65
	v_lshrrev_b32_e32 v65, 3, v65
	v_and_or_b32 v67, 0xe00, v67, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v67, 1, v67
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v69, v63, 1
	v_add_lshl_u32 v76, v67, v65, 1
	v_lshrrev_b32_e32 v67, s80, v34
	ds_store_b16 v74, v69
	ds_load_u16 v65, v76
	v_and_b32_e32 v67, s67, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v69, 9, v67
	v_lshrrev_b32_e32 v67, 3, v67
	v_and_or_b32 v69, 0xe00, v69, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v69, 1, v69
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v71, v65, 1
	v_add_lshl_u32 v78, v69, v67, 1
	v_lshrrev_b32_e32 v69, s80, v36
	ds_store_b16 v76, v71
	ds_load_u16 v67, v78
	v_and_b32_e32 v69, s67, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v71, 9, v69
	v_lshrrev_b32_e32 v69, 3, v69
	v_and_or_b32 v71, 0xe00, v71, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v71, 1, v71
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v73, v67, 1
	v_add_lshl_u32 v80, v71, v69, 1
	v_lshrrev_b32_e32 v71, s80, v37
	ds_store_b16 v78, v73
	ds_load_u16 v69, v80
	v_and_b32_e32 v71, s67, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v73, 9, v71
	v_lshrrev_b32_e32 v71, 3, v71
	v_and_or_b32 v73, 0xe00, v73, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v73, 1, v73
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v75, v69, 1
	v_add_lshl_u32 v82, v73, v71, 1
	v_lshrrev_b32_e32 v73, s80, v39
	ds_store_b16 v80, v75
	ds_load_u16 v71, v82
	v_and_b32_e32 v73, s67, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v75, 9, v73
	v_lshrrev_b32_e32 v73, 3, v73
	v_and_or_b32 v75, 0xe00, v75, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v75, 1, v75
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v77, v71, 1
	v_add_lshl_u32 v84, v75, v73, 1
	v_lshrrev_b32_e32 v75, s80, v38
	ds_store_b16 v82, v77
	ds_load_u16 v73, v84
	v_and_b32_e32 v75, s67, v75
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v77, 9, v75
	v_lshrrev_b32_e32 v75, 3, v75
	v_and_or_b32 v77, 0xe00, v77, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v77, 1, v77
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v79, v73, 1
	v_add_lshl_u32 v86, v77, v75, 1
	v_lshrrev_b32_e32 v77, s80, v41
	ds_store_b16 v84, v79
	ds_load_u16 v75, v86
	v_and_b32_e32 v77, s67, v77
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v79, 9, v77
	v_lshrrev_b32_e32 v77, 3, v77
	v_and_or_b32 v79, 0xe00, v79, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v79, 1, v79
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v81, v75, 1
	v_add_lshl_u32 v88, v79, v77, 1
	v_lshrrev_b32_e32 v79, s80, v40
	ds_store_b16 v86, v81
	ds_load_u16 v77, v88
	v_and_b32_e32 v79, s67, v79
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v81, 9, v79
	v_lshrrev_b32_e32 v79, 3, v79
	v_and_or_b32 v81, 0xe00, v81, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v81, 1, v81
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v83, v77, 1
	v_add_lshl_u32 v90, v81, v79, 1
	v_lshrrev_b32_e32 v81, s80, v43
	ds_store_b16 v88, v83
	ds_load_u16 v79, v90
	v_and_b32_e32 v81, s67, v81
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v83, 9, v81
	v_lshrrev_b32_e32 v81, 3, v81
	v_and_or_b32 v83, 0xe00, v83, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v83, 1, v83
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v85, v79, 1
	v_add_lshl_u32 v91, v83, v81, 1
	v_lshrrev_b32_e32 v83, s80, v42
	ds_store_b16 v90, v85
	ds_load_u16 v81, v91
	v_and_b32_e32 v83, s67, v83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v85, 9, v83
	v_lshrrev_b32_e32 v83, 3, v83
	v_and_or_b32 v85, 0xe00, v85, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v85, 1, v85
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v87, v81, 1
	v_add_lshl_u32 v92, v85, v83, 1
	v_lshrrev_b32_e32 v85, s80, v45
	ds_store_b16 v91, v87
	ds_load_u16 v83, v92
	v_and_b32_e32 v85, s67, v85
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v87, 9, v85
	v_lshrrev_b32_e32 v85, 3, v85
	v_and_or_b32 v87, 0xe00, v87, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v87, 1, v87
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v89, v83, 1
	v_add_lshl_u32 v93, v87, v85, 1
	v_lshrrev_b32_e32 v87, s80, v44
	ds_store_b16 v92, v89
	ds_load_u16 v85, v93
	v_and_b32_e32 v87, s67, v87
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v89, 9, v87
	v_lshrrev_b32_e32 v87, 3, v87
	v_and_or_b32 v89, 0xe00, v89, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v89, 1, v89
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v85, 1
	v_add_lshl_u32 v94, v89, v87, 1
	v_lshrrev_b32_e32 v89, s80, v46
	ds_store_b16 v93, v95
	ds_load_u16 v87, v94
	v_and_b32_e32 v89, s67, v89
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v95, 9, v89
	v_lshrrev_b32_e32 v89, 3, v89
	v_and_or_b32 v95, 0xe00, v95, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v95, 1, v95
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v87, 1
	v_add_lshl_u32 v95, v95, v89, 1
	ds_store_b16 v94, v96
	ds_load_u16 v89, v95
	v_lshlrev_b32_e32 v96, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v97, v89, 1
	ds_store_b16 v95, v97
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[97:100], v96 offset1:1
	ds_load_2addr_b64 v[101:104], v96 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v97, v98, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v97, v97, v99, v100
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v98, v97, v101, v102
	v_mbcnt_lo_u32_b32 v97, -1, 0
	v_or_b32_e32 v101, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v98, v98, v103, v104
	v_and_b32_e32 v99, 15, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v100, v98 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s35, 0, v99
	v_cmp_lt_u32_e64 s36, 1, v99
	v_cmp_lt_u32_e64 s37, 3, v99
	v_cmp_lt_u32_e64 s38, 7, v99
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v100, v100, 0, s35
	v_add_nc_u32_e32 v98, v100, v98
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v100, v98 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v100, 0, v100, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v98, v98, v100
	v_mov_b32_dpp v100, v98 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v100, 0, v100, s37
	v_add_nc_u32_e32 v98, v98, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v100, v98 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v100, s38
	v_bfe_i32 v100, v97, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v98, v98, v99
	ds_swizzle_b32 v99, v98 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v99, v100, v99
	v_lshrrev_b32_e32 v100, 5, v0
	v_add_nc_u32_e32 v98, v98, v99
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v99, 2, v100
	v_cmpx_eq_u32_e64 v101, v0
	s_cbranch_execz .LBB61_67
; %bb.66:
	ds_store_b32 v99, v98 offset:16384
.LBB61_67:
	s_or_b32 exec_lo, exec_lo, s39
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s39, vcc_lo
	s_cbranch_execz .LBB61_69
; %bb.68:
	v_mad_i32_i24 v100, 0xffffffe4, v0, v96
	ds_load_b32 v101, v100 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v102, v101 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v102, v102, 0, s35
	v_add_nc_u32_e32 v101, v102, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v102, v101 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v102, 0, v102, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v101, v102
	v_mov_b32_dpp v102, v101 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v102, 0, v102, s37
	v_add_nc_u32_e32 v101, v101, v102
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v102, v101 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v102, 0, v102, s38
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v101, v102
	ds_store_b32 v100, v101 offset:16384
.LBB61_69:                              ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i34.i
	s_or_b32 exec_lo, exec_lo, s39
	v_dual_mov_b32 v101, 0 :: v_dual_mov_b32 v100, 0
	s_mov_b32 s36, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB61_71
; %bb.70:
	ds_load_b32 v100, v99 offset:16380
.LBB61_71:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjjjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb0EN6thrust10device_ptrIjEEPjSB_SC_EEvT0_T1_T2_T3_SC_SC_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESE_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s36
	v_add_nc_u32_e32 v99, -1, v97
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v98, v100, v98
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s35, 0, v99
	v_cndmask_b32_e64 v99, v99, v97, s35
	v_cmp_eq_u32_e64 s35, 0, v97
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v99, 2, v99
	ds_bpermute_b32 v98, v99, v98
	ds_load_b32 v99, v101 offset:16444
	ds_load_2addr_b64 v[101:104], v96 offset1:1
	ds_load_b32 v105, v96 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v97, v98, v100, s35
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v97, v99, 16, v97
	ds_load_b64 v[99:100], v96 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v98, v97, v101
	v_add_nc_u32_e32 v101, v102, v98
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v102, v103, v101
	v_add_nc_u32_e32 v103, v104, v102
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v104, v99, v103
	v_add_nc_u32_e32 v99, v100, v104
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v105, v99
	ds_store_2addr_b64 v96, v[97:98], v[101:102] offset1:1
	ds_store_2addr_b64 v96, v[103:104], v[99:100] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v96, v7
	ds_load_u16 v97, v8
	ds_load_u16 v98, v18
	ds_load_u16 v20, v20
	ds_load_u16 v48, v48
	ds_load_u16 v50, v50
	ds_load_u16 v52, v52
	ds_load_u16 v54, v54
	ds_load_u16 v56, v56
	ds_load_u16 v58, v58
	ds_load_u16 v60, v60
	ds_load_u16 v62, v62
	ds_load_u16 v64, v64
	ds_load_u16 v66, v66
	ds_load_u16 v68, v68
	ds_load_u16 v70, v70
	ds_load_u16 v72, v72
	ds_load_u16 v74, v74
	ds_load_u16 v76, v76
	ds_load_u16 v78, v78
	ds_load_u16 v80, v80
	ds_load_u16 v82, v82
	ds_load_u16 v84, v84
	ds_load_u16 v86, v86
	ds_load_u16 v88, v88
	ds_load_u16 v90, v90
	ds_load_u16 v91, v91
	ds_load_u16 v92, v92
	ds_load_u16 v93, v93
	ds_load_u16 v94, v94
	ds_load_u16 v18, v95
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB61_75
; %bb.72:
	v_lshrrev_b32_e32 v7, 3, v0
	v_lshlrev_b32_e32 v8, 10, v0
	v_add_nc_u32_e32 v95, 1, v0
	s_mov_b32 s37, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v7, 0x1c00, v8, v7
	v_dual_mov_b32 v8, 0x3e00 :: v_dual_lshlrev_b32 v7, 1, v7
	ds_load_u16 v7, v7
	v_cmpx_ne_u32_e32 16, v95
	s_cbranch_execz .LBB61_74
; %bb.73:
	v_lshlrev_b32_e32 v8, 10, v95
	v_lshrrev_b32_e32 v95, 3, v95
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v8, 0x1c00, v8, v95
	v_lshlrev_b32_e32 v8, 1, v8
	ds_load_u16 v8, v8
.LBB61_74:
	s_or_b32 exec_lo, exec_lo, s37
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v8, v7
.LBB61_75:                              ; %Flow154
	s_or_b32 exec_lo, exec_lo, s36
	v_and_b32_e32 v1, 0xffff, v1
	v_and_b32_e32 v2, 0xffff, v2
	v_and_b32_e32 v95, 0xffff, v10
	v_and_b32_e32 v99, 0xffff, v11
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v10, 0xffff, v96
	s_waitcnt lgkmcnt(29)
	v_and_b32_e32 v11, 0xffff, v97
	v_and_b32_e32 v100, 0xffff, v12
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v12, 0xffff, v98
	v_and_b32_e32 v101, 0xffff, v13
	s_waitcnt lgkmcnt(27)
	v_and_b32_e32 v13, 0xffff, v20
	v_and_b32_e32 v102, 0xffff, v14
	s_waitcnt lgkmcnt(26)
	v_and_b32_e32 v14, 0xffff, v48
	v_and_b32_e32 v103, 0xffff, v15
	s_waitcnt lgkmcnt(25)
	v_and_b32_e32 v15, 0xffff, v50
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v20, 0xffff, v52
	v_add_lshl_u32 v10, v10, v1, 2
	v_add_lshl_u32 v11, v11, v2, 2
	s_waitcnt lgkmcnt(23)
	v_and_b32_e32 v48, 0xffff, v54
	v_add_lshl_u32 v12, v12, v95, 2
	v_and_b32_e32 v19, 0xffff, v19
	s_waitcnt lgkmcnt(22)
	v_and_b32_e32 v50, 0xffff, v56
	v_add_lshl_u32 v13, v13, v99, 2
	v_and_b32_e32 v47, 0xffff, v47
	s_waitcnt lgkmcnt(21)
	v_and_b32_e32 v52, 0xffff, v58
	v_add_lshl_u32 v14, v14, v100, 2
	v_and_b32_e32 v49, 0xffff, v49
	s_waitcnt lgkmcnt(20)
	v_and_b32_e32 v54, 0xffff, v60
	v_add_lshl_u32 v15, v15, v101, 2
	v_and_b32_e32 v51, 0xffff, v51
	s_waitcnt lgkmcnt(19)
	v_and_b32_e32 v56, 0xffff, v62
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v10, v4 offset:64
	ds_store_b32 v11, v3 offset:64
	ds_store_b32 v12, v6 offset:64
	ds_store_b32 v13, v5 offset:64
	ds_store_b32 v14, v17 offset:64
	ds_store_b32 v15, v16 offset:64
	v_add_lshl_u32 v16, v20, v102, 2
	v_and_b32_e32 v53, 0xffff, v53
	v_and_b32_e32 v58, 0xffff, v64
	v_add_lshl_u32 v17, v48, v103, 2
	v_and_b32_e32 v55, 0xffff, v55
	v_and_b32_e32 v60, 0xffff, v66
	v_and_b32_e32 v1, 0xffff, v18
	v_add_lshl_u32 v18, v50, v19, 2
	v_and_b32_e32 v57, 0xffff, v57
	v_and_b32_e32 v62, 0xffff, v68
	v_add_lshl_u32 v19, v52, v47, 2
	v_and_b32_e32 v59, 0xffff, v59
	v_and_b32_e32 v64, 0xffff, v70
	v_add_lshl_u32 v20, v54, v49, 2
	v_and_b32_e32 v61, 0xffff, v61
	v_and_b32_e32 v66, 0xffff, v72
	ds_store_b32 v16, v22 offset:64
	ds_store_b32 v17, v21 offset:64
	ds_store_b32 v18, v24 offset:64
	ds_store_b32 v19, v23 offset:64
	ds_store_b32 v20, v25 offset:64
	v_add_lshl_u32 v21, v56, v51, 2
	v_and_b32_e32 v63, 0xffff, v63
	v_and_b32_e32 v68, 0xffff, v74
	v_add_lshl_u32 v22, v58, v53, 2
	v_and_b32_e32 v65, 0xffff, v65
	v_and_b32_e32 v70, 0xffff, v76
	v_add_lshl_u32 v23, v60, v55, 2
	v_and_b32_e32 v67, 0xffff, v67
	v_and_b32_e32 v72, 0xffff, v78
	v_add_lshl_u32 v24, v62, v57, 2
	v_and_b32_e32 v69, 0xffff, v69
	v_and_b32_e32 v74, 0xffff, v80
	v_add_lshl_u32 v25, v64, v59, 2
	v_and_b32_e32 v71, 0xffff, v71
	v_and_b32_e32 v76, 0xffff, v82
	ds_store_b32 v21, v26 offset:64
	ds_store_b32 v22, v28 offset:64
	ds_store_b32 v23, v27 offset:64
	ds_store_b32 v24, v30 offset:64
	ds_store_b32 v25, v29 offset:64
	v_add_lshl_u32 v26, v66, v61, 2
	v_and_b32_e32 v73, 0xffff, v73
	v_and_b32_e32 v78, 0xffff, v84
	v_add_lshl_u32 v27, v68, v63, 2
	v_and_b32_e32 v75, 0xffff, v75
	v_and_b32_e32 v80, 0xffff, v86
	v_add_lshl_u32 v28, v70, v65, 2
	v_and_b32_e32 v77, 0xffff, v77
	v_and_b32_e32 v82, 0xffff, v88
	v_add_lshl_u32 v29, v72, v67, 2
	v_and_b32_e32 v79, 0xffff, v79
	v_and_b32_e32 v84, 0xffff, v90
	v_add_lshl_u32 v30, v74, v69, 2
	v_and_b32_e32 v81, 0xffff, v81
	v_and_b32_e32 v83, 0xffff, v83
	v_and_b32_e32 v85, 0xffff, v85
	v_and_b32_e32 v87, 0xffff, v87
	v_and_b32_e32 v89, 0xffff, v89
	v_and_b32_e32 v86, 0xffff, v91
	v_and_b32_e32 v88, 0xffff, v92
	v_and_b32_e32 v90, 0xffff, v93
	v_and_b32_e32 v91, 0xffff, v94
	ds_store_b32 v26, v33 offset:64
	ds_store_b32 v27, v31 offset:64
	ds_store_b32 v28, v35 offset:64
	ds_store_b32 v29, v34 offset:64
	ds_store_b32 v30, v36 offset:64
	v_add_lshl_u32 v31, v76, v71, 2
	v_add_lshl_u32 v33, v78, v73, 2
	v_add_lshl_u32 v34, v80, v75, 2
	v_add_lshl_u32 v35, v82, v77, 2
	v_add_lshl_u32 v36, v84, v79, 2
	ds_store_b32 v31, v37 offset:64
	ds_store_b32 v33, v39 offset:64
	ds_store_b32 v34, v38 offset:64
	ds_store_b32 v35, v41 offset:64
	ds_store_b32 v36, v40 offset:64
	v_add_lshl_u32 v37, v86, v81, 2
	v_add_lshl_u32 v38, v88, v83, 2
	v_add_lshl_u32 v39, v90, v85, 2
	v_add_lshl_u32 v40, v91, v87, 2
	v_add_lshl_u32 v41, v1, v89, 2
	ds_store_b32 v37, v43 offset:64
	ds_store_b32 v38, v42 offset:64
	ds_store_b32 v39, v45 offset:64
	ds_store_b32 v40, v44 offset:64
	ds_store_b32 v41, v46 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB61_86
; %bb.76:
	v_lshl_or_b32 v3, s15, 4, v0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v42, 0
	s_mov_b32 s37, 0
	s_mov_b32 s38, s15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v8
	v_add_co_u32 v1, s35, s84, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s35, s85, v2, s35
                                        ; implicit-def: $sgpr35
	global_store_b32 v[1:2], v3, off
.LBB61_77:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB61_80 Depth 2
	s_or_b32 s35, s35, exec_lo
	s_cmp_eq_u32 s38, 0
	s_cbranch_scc1 .LBB61_83
; %bb.78:                               ;   in Loop: Header=BB61_77 Depth=1
	s_add_i32 s38, s38, -1
	s_mov_b32 s39, exec_lo
	v_lshl_or_b32 v3, s38, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s35, s84, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s35, s85, v6, s35
	global_load_b32 v43, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v43
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB61_82
; %bb.79:                               ; %.lr.ph.i44.i.preheader
                                        ;   in Loop: Header=BB61_77 Depth=1
	s_mov_b32 s40, 0
.LBB61_80:                              ; %.lr.ph.i44.i
                                        ;   Parent Loop BB61_77 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v43, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s35, 0, v3
	s_or_b32 s40, s35, s40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s40
	s_cbranch_execnz .LBB61_80
; %bb.81:                               ; %Flow
                                        ;   in Loop: Header=BB61_77 Depth=1
	s_or_b32 exec_lo, exec_lo, s40
.LBB61_82:                              ; %Flow151
                                        ;   in Loop: Header=BB61_77 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s39
	v_and_b32_e32 v5, 0x3fffffff, v43
	v_cmp_eq_u32_e64 s35, 0x80000000, v3
	v_add_nc_u32_e32 v42, v5, v42
	s_branch .LBB61_84
.LBB61_83:                              ;   in Loop: Header=BB61_77 Depth=1
                                        ; implicit-def: $sgpr38
.LBB61_84:                              ; %Flow152
                                        ;   in Loop: Header=BB61_77 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s39, exec_lo, s35
	s_or_b32 s37, s39, s37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s37
	s_cbranch_execnz .LBB61_77
; %bb.85:
	s_or_b32 exec_lo, exec_lo, s37
	v_add_nc_u32_e32 v3, v42, v8
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v42, v7
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	ds_store_b32 v4, v1
.LBB61_86:                              ; %Flow153
	s_or_b32 exec_lo, exec_lo, s36
	v_cmp_gt_u32_e64 s35, s66, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s37, s35
	s_cbranch_execz .LBB61_88
; %bb.87:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v3, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s36, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s36, s71, v2, s36
	global_store_b32 v[1:2], v3, off
.LBB61_88:
	s_or_b32 exec_lo, exec_lo, s37
	v_or_b32_e32 v3, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s36, s66, v3
	s_and_saveexec_b32 s38, s36
	s_cbranch_execz .LBB61_90
; %bb.89:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v4, v1 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s37, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s37, s71, v2, s37
	global_store_b32 v[1:2], v4, off
.LBB61_90:
	s_or_b32 exec_lo, exec_lo, s38
	v_or_b32_e32 v4, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s37, s66, v4
	s_and_saveexec_b32 s39, s37
	s_cbranch_execz .LBB61_92
; %bb.91:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v5, v1 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s38, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s38, s71, v2, s38
	global_store_b32 v[1:2], v5, off
.LBB61_92:
	s_or_b32 exec_lo, exec_lo, s39
	v_or_b32_e32 v5, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s38, s66, v5
	s_and_saveexec_b32 s40, s38
	s_cbranch_execz .LBB61_94
; %bb.93:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v6, v1 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s39, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s39, s71, v2, s39
	global_store_b32 v[1:2], v6, off
.LBB61_94:
	s_or_b32 exec_lo, exec_lo, s40
	v_or_b32_e32 v6, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s39, s66, v6
	s_and_saveexec_b32 s41, s39
	s_cbranch_execz .LBB61_96
; %bb.95:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v42, v1 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s40, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s40, s71, v2, s40
	global_store_b32 v[1:2], v42, off
.LBB61_96:
	s_or_b32 exec_lo, exec_lo, s41
	v_or_b32_e32 v42, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s40, s66, v42
	s_and_saveexec_b32 s42, s40
	s_cbranch_execz .LBB61_98
; %bb.97:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v43, v1 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s41, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s41, s71, v2, s41
	global_store_b32 v[1:2], v43, off
.LBB61_98:
	s_or_b32 exec_lo, exec_lo, s42
	v_or_b32_e32 v43, 0xc00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s41, s66, v43
	s_and_saveexec_b32 s43, s41
	s_cbranch_execz .LBB61_100
; %bb.99:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v44, v1 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s42, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s42, s71, v2, s42
	global_store_b32 v[1:2], v44, off
.LBB61_100:
	s_or_b32 exec_lo, exec_lo, s43
	v_or_b32_e32 v44, 0xe00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s42, s66, v44
	s_and_saveexec_b32 s44, s42
	s_cbranch_execz .LBB61_102
; %bb.101:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v45, v1 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s43, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s43, s71, v2, s43
	global_store_b32 v[1:2], v45, off
.LBB61_102:
	s_or_b32 exec_lo, exec_lo, s44
	v_or_b32_e32 v45, 0x1000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s43, s66, v45
	s_and_saveexec_b32 s45, s43
	s_cbranch_execz .LBB61_104
; %bb.103:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v46, v1 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s44, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s44, s71, v2, s44
	global_store_b32 v[1:2], v46, off
.LBB61_104:
	s_or_b32 exec_lo, exec_lo, s45
	v_or_b32_e32 v46, 0x1200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s44, s66, v46
	s_and_saveexec_b32 s46, s44
	s_cbranch_execz .LBB61_106
; %bb.105:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v47, v1 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s45, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s45, s71, v2, s45
	global_store_b32 v[1:2], v47, off
.LBB61_106:
	s_or_b32 exec_lo, exec_lo, s46
	v_or_b32_e32 v47, 0x1400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s45, s66, v47
	s_and_saveexec_b32 s47, s45
	s_cbranch_execz .LBB61_108
; %bb.107:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v48, v1 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s46, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s46, s71, v2, s46
	global_store_b32 v[1:2], v48, off
.LBB61_108:
	s_or_b32 exec_lo, exec_lo, s47
	v_or_b32_e32 v48, 0x1600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s46, s66, v48
	s_and_saveexec_b32 s48, s46
	s_cbranch_execz .LBB61_110
; %bb.109:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v49, v1 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s47, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s47, s71, v2, s47
	global_store_b32 v[1:2], v49, off
.LBB61_110:
	s_or_b32 exec_lo, exec_lo, s48
	v_or_b32_e32 v49, 0x1800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s47, s66, v49
	s_and_saveexec_b32 s49, s47
	s_cbranch_execz .LBB61_112
; %bb.111:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v50, v1 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s48, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s48, s71, v2, s48
	global_store_b32 v[1:2], v50, off
.LBB61_112:
	s_or_b32 exec_lo, exec_lo, s49
	v_or_b32_e32 v50, 0x1a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s48, s66, v50
	s_and_saveexec_b32 s50, s48
	s_cbranch_execz .LBB61_114
; %bb.113:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v51, v1 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s49, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s49, s71, v2, s49
	global_store_b32 v[1:2], v51, off
.LBB61_114:
	s_or_b32 exec_lo, exec_lo, s50
	v_or_b32_e32 v51, 0x1c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s49, s66, v51
	s_and_saveexec_b32 s51, s49
	s_cbranch_execz .LBB61_116
; %bb.115:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v52, v1 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s50, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s50, s71, v2, s50
	global_store_b32 v[1:2], v52, off
.LBB61_116:
	s_or_b32 exec_lo, exec_lo, s51
	v_or_b32_e32 v52, 0x1e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s50, s66, v52
	s_and_saveexec_b32 s52, s50
	s_cbranch_execz .LBB61_118
; %bb.117:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v53, v1 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s51, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s51, s71, v2, s51
	global_store_b32 v[1:2], v53, off
.LBB61_118:
	s_or_b32 exec_lo, exec_lo, s52
	v_or_b32_e32 v53, 0x2000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s51, s66, v53
	s_and_saveexec_b32 s53, s51
	s_cbranch_execz .LBB61_120
; %bb.119:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v54, v1 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s52, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s52, s71, v2, s52
	global_store_b32 v[1:2], v54, off
.LBB61_120:
	s_or_b32 exec_lo, exec_lo, s53
	v_or_b32_e32 v54, 0x2200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s52, s66, v54
	s_and_saveexec_b32 s54, s52
	s_cbranch_execz .LBB61_122
; %bb.121:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v55, v1 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s53, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s53, s71, v2, s53
	global_store_b32 v[1:2], v55, off
.LBB61_122:
	s_or_b32 exec_lo, exec_lo, s54
	v_or_b32_e32 v55, 0x2400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s53, s66, v55
	s_and_saveexec_b32 s55, s53
	s_cbranch_execz .LBB61_124
; %bb.123:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v56, v1 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s54, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s54, s71, v2, s54
	global_store_b32 v[1:2], v56, off
.LBB61_124:
	s_or_b32 exec_lo, exec_lo, s55
	v_or_b32_e32 v56, 0x2600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s54, s66, v56
	s_and_saveexec_b32 s56, s54
	s_cbranch_execz .LBB61_126
; %bb.125:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v57, v1 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s55, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s55, s71, v2, s55
	global_store_b32 v[1:2], v57, off
.LBB61_126:
	s_or_b32 exec_lo, exec_lo, s56
	v_or_b32_e32 v57, 0x2800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s55, s66, v57
	s_and_saveexec_b32 s57, s55
	s_cbranch_execz .LBB61_128
; %bb.127:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v58, v1 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s56, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s56, s71, v2, s56
	global_store_b32 v[1:2], v58, off
.LBB61_128:
	s_or_b32 exec_lo, exec_lo, s57
	v_or_b32_e32 v58, 0x2a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s56, s66, v58
	s_and_saveexec_b32 s58, s56
	s_cbranch_execz .LBB61_130
; %bb.129:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v59, v1 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s57, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s57, s71, v2, s57
	global_store_b32 v[1:2], v59, off
.LBB61_130:
	s_or_b32 exec_lo, exec_lo, s58
	v_or_b32_e32 v59, 0x2c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s57, s66, v59
	s_and_saveexec_b32 s59, s57
	s_cbranch_execz .LBB61_132
; %bb.131:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v60, v1 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s58, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s58, s71, v2, s58
	global_store_b32 v[1:2], v60, off
.LBB61_132:
	s_or_b32 exec_lo, exec_lo, s59
	v_or_b32_e32 v60, 0x2e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s58, s66, v60
	s_and_saveexec_b32 s60, s58
	s_cbranch_execz .LBB61_134
; %bb.133:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v61, v1 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s59, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s59, s71, v2, s59
	global_store_b32 v[1:2], v61, off
.LBB61_134:
	s_or_b32 exec_lo, exec_lo, s60
	v_or_b32_e32 v61, 0x3000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s59, s66, v61
	s_and_saveexec_b32 s61, s59
	s_cbranch_execz .LBB61_136
; %bb.135:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v62, v1 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s60, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s60, s71, v2, s60
	global_store_b32 v[1:2], v62, off
.LBB61_136:
	s_or_b32 exec_lo, exec_lo, s61
	v_or_b32_e32 v62, 0x3200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s60, s66, v62
	s_and_saveexec_b32 s62, s60
	s_cbranch_execz .LBB61_138
; %bb.137:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v63, v1 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s61, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s61, s71, v2, s61
	global_store_b32 v[1:2], v63, off
.LBB61_138:
	s_or_b32 exec_lo, exec_lo, s62
	v_or_b32_e32 v63, 0x3400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s61, s66, v63
	s_and_saveexec_b32 s63, s61
	s_cbranch_execz .LBB61_140
; %bb.139:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v64, v1 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s62, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s62, s71, v2, s62
	global_store_b32 v[1:2], v64, off
.LBB61_140:
	s_or_b32 exec_lo, exec_lo, s63
	v_or_b32_e32 v64, 0x3600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s62, s66, v64
	s_and_saveexec_b32 s64, s62
	s_cbranch_execz .LBB61_142
; %bb.141:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v65, v1 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s63, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s63, s71, v2, s63
	global_store_b32 v[1:2], v65, off
.LBB61_142:
	s_or_b32 exec_lo, exec_lo, s64
	v_or_b32_e32 v65, 0x3800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s63, s66, v65
	s_and_saveexec_b32 s65, s63
	s_cbranch_execz .LBB61_144
; %bb.143:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v66, v1 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s64, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s64, s71, v2, s64
	global_store_b32 v[1:2], v66, off
.LBB61_144:
	s_or_b32 exec_lo, exec_lo, s65
	v_or_b32_e32 v66, 0x3a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s64, s66, v66
	s_and_saveexec_b32 s87, s64
	s_cbranch_execz .LBB61_146
; %bb.145:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v67, v1 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s65, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s65, s71, v2, s65
	global_store_b32 v[1:2], v67, off
.LBB61_146:
	s_or_b32 exec_lo, exec_lo, s87
	v_or_b32_e32 v67, 0x3c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s65, s66, v67
	s_and_saveexec_b32 s87, s65
	s_cbranch_execz .LBB61_148
; %bb.147:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v68, v1 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s66, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s66, s71, v2, s66
	global_store_b32 v[1:2], v68, off
.LBB61_148:
	s_or_b32 exec_lo, exec_lo, s87
	s_add_u32 s66, s72, s82
	s_addc_u32 s82, s73, s83
	v_add_co_u32 v1, s66, s66, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v2, null, s82, 0, s66
                                        ; implicit-def: $vgpr9
	s_and_saveexec_b32 s66, s2
	s_xor_b32 s2, exec_lo, s66
	s_cbranch_execz .LBB61_150
; %bb.149:
	global_load_b32 v9, v[1:2], off
.LBB61_150:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr68
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB61_152
; %bb.151:
	global_load_b32 v68, v[1:2], off offset:4
.LBB61_152:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr69
	s_and_saveexec_b32 s2, s4
	s_cbranch_execz .LBB61_154
; %bb.153:
	global_load_b32 v69, v[1:2], off offset:8
.LBB61_154:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr70
	s_and_saveexec_b32 s2, s5
	s_cbranch_execz .LBB61_156
; %bb.155:
	global_load_b32 v70, v[1:2], off offset:12
.LBB61_156:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr71
	s_and_saveexec_b32 s2, s6
	s_cbranch_execz .LBB61_158
; %bb.157:
	global_load_b32 v71, v[1:2], off offset:16
.LBB61_158:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr73
	s_and_saveexec_b32 s2, s7
	s_cbranch_execz .LBB61_160
; %bb.159:
	global_load_b32 v73, v[1:2], off offset:20
.LBB61_160:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr75
	s_and_saveexec_b32 s2, s8
	s_cbranch_execz .LBB61_162
; %bb.161:
	global_load_b32 v75, v[1:2], off offset:24
.LBB61_162:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr77
	s_and_saveexec_b32 s2, s9
	s_cbranch_execz .LBB61_164
; %bb.163:
	global_load_b32 v77, v[1:2], off offset:28
.LBB61_164:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr79
	s_and_saveexec_b32 s2, s10
	s_cbranch_execz .LBB61_166
; %bb.165:
	global_load_b32 v79, v[1:2], off offset:32
.LBB61_166:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr81
	s_and_saveexec_b32 s2, s11
	s_cbranch_execz .LBB61_168
; %bb.167:
	global_load_b32 v81, v[1:2], off offset:36
.LBB61_168:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr83
	s_and_saveexec_b32 s2, s12
	s_cbranch_execz .LBB61_170
; %bb.169:
	global_load_b32 v83, v[1:2], off offset:40
.LBB61_170:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr85
	s_and_saveexec_b32 s2, s13
	s_cbranch_execz .LBB61_172
; %bb.171:
	global_load_b32 v85, v[1:2], off offset:44
.LBB61_172:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr87
	s_and_saveexec_b32 s2, s14
	s_cbranch_execz .LBB61_174
; %bb.173:
	global_load_b32 v87, v[1:2], off offset:48
.LBB61_174:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr89
	s_and_saveexec_b32 s2, s16
	s_cbranch_execz .LBB61_176
; %bb.175:
	global_load_b32 v89, v[1:2], off offset:52
.LBB61_176:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr92
	s_and_saveexec_b32 s2, s17
	s_cbranch_execz .LBB61_178
; %bb.177:
	global_load_b32 v92, v[1:2], off offset:56
.LBB61_178:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr94
	s_and_saveexec_b32 s2, s18
	s_cbranch_execz .LBB61_180
; %bb.179:
	global_load_b32 v94, v[1:2], off offset:60
.LBB61_180:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr96
	s_and_saveexec_b32 s2, s19
	s_cbranch_execz .LBB61_182
; %bb.181:
	global_load_b32 v96, v[1:2], off offset:64
.LBB61_182:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr98
	s_and_saveexec_b32 s2, s20
	s_cbranch_execz .LBB61_184
; %bb.183:
	global_load_b32 v98, v[1:2], off offset:68
.LBB61_184:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr100
	s_and_saveexec_b32 s2, s21
	s_cbranch_execz .LBB61_186
; %bb.185:
	global_load_b32 v100, v[1:2], off offset:72
.LBB61_186:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr102
	s_and_saveexec_b32 s2, s22
	s_cbranch_execz .LBB61_188
; %bb.187:
	global_load_b32 v102, v[1:2], off offset:76
.LBB61_188:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr104
	s_and_saveexec_b32 s2, s23
	s_cbranch_execz .LBB61_190
; %bb.189:
	global_load_b32 v104, v[1:2], off offset:80
.LBB61_190:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr106
	s_and_saveexec_b32 s2, s24
	s_cbranch_execz .LBB61_192
; %bb.191:
	global_load_b32 v106, v[1:2], off offset:84
.LBB61_192:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr108
	s_and_saveexec_b32 s2, s25
	s_cbranch_execz .LBB61_194
; %bb.193:
	global_load_b32 v108, v[1:2], off offset:88
.LBB61_194:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr110
	s_and_saveexec_b32 s2, s26
	s_cbranch_execz .LBB61_196
; %bb.195:
	global_load_b32 v110, v[1:2], off offset:92
.LBB61_196:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr113
	s_and_saveexec_b32 s2, s27
	s_cbranch_execz .LBB61_198
; %bb.197:
	global_load_b32 v113, v[1:2], off offset:96
.LBB61_198:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr115
	s_and_saveexec_b32 s2, s28
	s_cbranch_execz .LBB61_200
; %bb.199:
	global_load_b32 v115, v[1:2], off offset:100
.LBB61_200:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr117
	s_and_saveexec_b32 s2, s29
	s_cbranch_execz .LBB61_202
; %bb.201:
	global_load_b32 v117, v[1:2], off offset:104
.LBB61_202:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr119
	s_and_saveexec_b32 s2, s30
	s_cbranch_execz .LBB61_204
; %bb.203:
	global_load_b32 v119, v[1:2], off offset:108
.LBB61_204:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr121
	s_and_saveexec_b32 s2, s31
	s_cbranch_execz .LBB61_206
; %bb.205:
	global_load_b32 v121, v[1:2], off offset:112
.LBB61_206:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr123
	s_and_saveexec_b32 s2, s33
	s_cbranch_execz .LBB61_208
; %bb.207:
	global_load_b32 v123, v[1:2], off offset:116
.LBB61_208:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr125
	s_and_saveexec_b32 s2, s34
	s_cbranch_execz .LBB61_210
; %bb.209:
	global_load_b32 v125, v[1:2], off offset:120
.LBB61_210:                             ; %_ZN7rocprim25block_load_direct_blockedIN6thrust10device_ptrIjEEjLj31EEEvjT_RAT1__T0_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr126
	s_and_saveexec_b32 s2, s35
	s_cbranch_execz .LBB61_212
; %bb.211:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v126, s67, v1
.LBB61_212:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr124
	s_and_saveexec_b32 s2, s36
	s_cbranch_execz .LBB61_214
; %bb.213:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v124, s67, v1
.LBB61_214:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr122
	s_and_saveexec_b32 s2, s37
	s_cbranch_execz .LBB61_216
; %bb.215:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v122, s67, v1
.LBB61_216:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr120
	s_and_saveexec_b32 s2, s38
	s_cbranch_execz .LBB61_218
; %bb.217:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v120, s67, v1
.LBB61_218:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr118
	s_and_saveexec_b32 s2, s39
	s_cbranch_execz .LBB61_220
; %bb.219:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v118, s67, v1
.LBB61_220:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr116
	s_and_saveexec_b32 s2, s40
	s_cbranch_execz .LBB61_222
; %bb.221:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v116, s67, v1
.LBB61_222:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr114
	s_and_saveexec_b32 s2, s41
	s_cbranch_execz .LBB61_224
; %bb.223:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v114, s67, v1
.LBB61_224:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr112
	s_and_saveexec_b32 s2, s42
	s_cbranch_execz .LBB61_226
; %bb.225:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v112, s67, v1
.LBB61_226:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr111
	s_and_saveexec_b32 s2, s43
	s_cbranch_execz .LBB61_228
; %bb.227:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v111, s67, v1
.LBB61_228:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr109
	s_and_saveexec_b32 s2, s44
	s_cbranch_execz .LBB61_230
; %bb.229:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v109, s67, v1
.LBB61_230:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr107
	s_and_saveexec_b32 s2, s45
	s_cbranch_execz .LBB61_232
; %bb.231:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v107, s67, v1
.LBB61_232:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr105
	s_and_saveexec_b32 s2, s46
	s_cbranch_execz .LBB61_234
; %bb.233:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v105, s67, v1
.LBB61_234:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr103
	s_and_saveexec_b32 s2, s47
	s_cbranch_execz .LBB61_236
; %bb.235:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v103, s67, v1
.LBB61_236:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr101
	s_and_saveexec_b32 s2, s48
	s_cbranch_execz .LBB61_238
; %bb.237:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v101, s67, v1
.LBB61_238:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr99
	s_and_saveexec_b32 s2, s49
	s_cbranch_execz .LBB61_240
; %bb.239:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v99, s67, v1
.LBB61_240:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr97
	s_and_saveexec_b32 s2, s50
	s_cbranch_execz .LBB61_242
; %bb.241:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v97, s67, v1
.LBB61_242:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr95
	s_and_saveexec_b32 s2, s51
	s_cbranch_execz .LBB61_244
; %bb.243:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v95, s67, v1
.LBB61_244:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr93
	s_and_saveexec_b32 s2, s52
	s_cbranch_execz .LBB61_246
; %bb.245:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v93, s67, v1
.LBB61_246:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr91
	s_and_saveexec_b32 s2, s53
	s_cbranch_execz .LBB61_248
; %bb.247:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v91, s67, v1
.LBB61_248:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr90
	s_and_saveexec_b32 s2, s54
	s_cbranch_execz .LBB61_250
; %bb.249:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v90, s67, v1
.LBB61_250:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr88
	s_and_saveexec_b32 s2, s55
	s_cbranch_execz .LBB61_252
; %bb.251:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v88, s67, v1
.LBB61_252:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr86
	s_and_saveexec_b32 s2, s56
	s_cbranch_execz .LBB61_254
; %bb.253:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v86, s67, v1
.LBB61_254:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr84
	s_and_saveexec_b32 s2, s57
	s_cbranch_execz .LBB61_256
; %bb.255:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v84, s67, v1
.LBB61_256:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr82
	s_and_saveexec_b32 s2, s58
	s_cbranch_execz .LBB61_258
; %bb.257:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v82, s67, v1
.LBB61_258:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr80
	s_and_saveexec_b32 s2, s59
	s_cbranch_execz .LBB61_260
; %bb.259:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v80, s67, v1
.LBB61_260:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr78
	s_and_saveexec_b32 s2, s60
	s_cbranch_execz .LBB61_262
; %bb.261:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v78, s67, v1
.LBB61_262:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr76
	s_and_saveexec_b32 s2, s61
	s_cbranch_execz .LBB61_264
; %bb.263:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v76, s67, v1
.LBB61_264:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr74
	s_and_saveexec_b32 s2, s62
	s_cbranch_execz .LBB61_266
; %bb.265:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v74, s67, v1
.LBB61_266:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr72
	s_and_saveexec_b32 s2, s63
	s_cbranch_execz .LBB61_268
; %bb.267:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v72, s67, v1
.LBB61_268:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr2
	s_and_saveexec_b32 s2, s64
	s_cbranch_execz .LBB61_270
; %bb.269:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v2, s67, v1
.LBB61_270:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s2, s65
	s_cbranch_execz .LBB61_272
; %bb.271:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
.LBB61_272:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v10, v9 offset:64
	ds_store_b32 v11, v68 offset:64
	ds_store_b32 v12, v69 offset:64
	ds_store_b32 v13, v70 offset:64
	ds_store_b32 v14, v71 offset:64
	ds_store_b32 v15, v73 offset:64
	ds_store_b32 v16, v75 offset:64
	ds_store_b32 v17, v77 offset:64
	ds_store_b32 v18, v79 offset:64
	ds_store_b32 v19, v81 offset:64
	ds_store_b32 v20, v83 offset:64
	ds_store_b32 v21, v85 offset:64
	ds_store_b32 v22, v87 offset:64
	ds_store_b32 v23, v89 offset:64
	ds_store_b32 v24, v92 offset:64
	ds_store_b32 v25, v94 offset:64
	ds_store_b32 v26, v96 offset:64
	ds_store_b32 v27, v98 offset:64
	ds_store_b32 v28, v100 offset:64
	ds_store_b32 v29, v102 offset:64
	ds_store_b32 v30, v104 offset:64
	ds_store_b32 v31, v106 offset:64
	ds_store_b32 v33, v108 offset:64
	ds_store_b32 v34, v110 offset:64
	ds_store_b32 v35, v113 offset:64
	ds_store_b32 v36, v115 offset:64
	ds_store_b32 v37, v117 offset:64
	ds_store_b32 v38, v119 offset:64
	ds_store_b32 v39, v121 offset:64
	ds_store_b32 v40, v123 offset:64
	ds_store_b32 v41, v125 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s35
	s_cbranch_execz .LBB61_274
; %bb.273:
	v_lshlrev_b32_e32 v9, 2, v126
	v_lshlrev_b32_e32 v10, 2, v0
	ds_load_b32 v9, v9
	ds_load_b32 v11, v10 offset:64
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v9, v9, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, s2, s74, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s75, v10, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[9:10], v11, off
.LBB61_274:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s36
	s_cbranch_execz .LBB61_276
; %bb.275:
	v_lshlrev_b32_e32 v9, 2, v124
	v_lshlrev_b32_e32 v10, 2, v0
	ds_load_b32 v9, v9
	ds_load_b32 v11, v10 offset:2112
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v9, v9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, s2, s74, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s75, v10, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[9:10], v11, off
.LBB61_276:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s37
	s_cbranch_execz .LBB61_278
; %bb.277:
	v_dual_mov_b32 v10, 0 :: v_dual_lshlrev_b32 v3, 2, v122
	v_lshlrev_b32_e32 v9, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v11, v9 offset:4160
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v9, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[9:10]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v11, off
.LBB61_278:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s38
	s_cbranch_execz .LBB61_280
; %bb.279:
	v_lshlrev_b32_e32 v3, 2, v120
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v9, v4 offset:6208
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v9, off
.LBB61_280:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s39
	s_cbranch_execz .LBB61_282
; %bb.281:
	v_lshlrev_b32_e32 v3, 2, v118
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:8256
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_282:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s40
	s_cbranch_execz .LBB61_284
; %bb.283:
	v_lshlrev_b32_e32 v3, 2, v116
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:10304
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_284:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s41
	s_cbranch_execz .LBB61_286
; %bb.285:
	v_lshlrev_b32_e32 v3, 2, v114
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:12352
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_286:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s42
	s_cbranch_execz .LBB61_288
; %bb.287:
	v_lshlrev_b32_e32 v3, 2, v112
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:14400
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_288:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s43
	s_cbranch_execz .LBB61_290
; %bb.289:
	v_lshlrev_b32_e32 v3, 2, v111
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:16448
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_290:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s44
	s_cbranch_execz .LBB61_292
; %bb.291:
	v_lshlrev_b32_e32 v3, 2, v109
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:18496
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_292:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s45
	s_cbranch_execz .LBB61_294
; %bb.293:
	v_lshlrev_b32_e32 v3, 2, v107
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:20544
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_294:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s46
	s_cbranch_execz .LBB61_296
; %bb.295:
	v_lshlrev_b32_e32 v3, 2, v105
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:22592
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_296:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s47
	s_cbranch_execz .LBB61_298
; %bb.297:
	v_lshlrev_b32_e32 v3, 2, v103
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:24640
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_298:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s48
	s_cbranch_execz .LBB61_300
; %bb.299:
	v_lshlrev_b32_e32 v3, 2, v101
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:26688
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_300:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s49
	s_cbranch_execz .LBB61_302
; %bb.301:
	v_lshlrev_b32_e32 v3, 2, v99
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:28736
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_302:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s50
	s_cbranch_execz .LBB61_304
; %bb.303:
	v_lshlrev_b32_e32 v3, 2, v97
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:30784
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_304:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s51
	s_cbranch_execz .LBB61_306
; %bb.305:
	v_lshlrev_b32_e32 v3, 2, v95
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:32832
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_306:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s52
	s_cbranch_execz .LBB61_308
; %bb.307:
	v_lshlrev_b32_e32 v3, 2, v93
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:34880
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_308:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s53
	s_cbranch_execz .LBB61_310
; %bb.309:
	v_lshlrev_b32_e32 v3, 2, v91
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:36928
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_310:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s54
	s_cbranch_execz .LBB61_312
; %bb.311:
	v_lshlrev_b32_e32 v3, 2, v90
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:38976
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_312:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s55
	s_cbranch_execz .LBB61_314
; %bb.313:
	v_lshlrev_b32_e32 v3, 2, v88
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:41024
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_314:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s56
	s_cbranch_execz .LBB61_316
; %bb.315:
	v_lshlrev_b32_e32 v3, 2, v86
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:43072
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_316:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s57
	s_cbranch_execz .LBB61_318
; %bb.317:
	v_lshlrev_b32_e32 v3, 2, v84
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:45120
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_318:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s58
	s_cbranch_execz .LBB61_320
; %bb.319:
	v_lshlrev_b32_e32 v3, 2, v82
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:47168
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_320:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s59
	s_cbranch_execz .LBB61_322
; %bb.321:
	v_lshlrev_b32_e32 v3, 2, v80
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:49216
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_322:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s60
	s_cbranch_execz .LBB61_324
; %bb.323:
	v_lshlrev_b32_e32 v3, 2, v78
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:51264
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_324:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s61
	s_cbranch_execz .LBB61_326
; %bb.325:
	v_lshlrev_b32_e32 v3, 2, v76
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:53312
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_326:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s62
	s_cbranch_execz .LBB61_328
; %bb.327:
	v_lshlrev_b32_e32 v3, 2, v74
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:55360
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_328:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s63
	s_cbranch_execz .LBB61_330
; %bb.329:
	v_lshlrev_b32_e32 v3, 2, v72
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:57408
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB61_330:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s64
	s_cbranch_execz .LBB61_332
; %bb.331:
	v_lshlrev_b32_e32 v2, 2, v2
	v_lshlrev_b32_e32 v3, 2, v0
	ds_load_b32 v2, v2
	ds_load_b32 v4, v3 offset:59456
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v2, v2, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, s2, s74, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s2, s75, v3, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[2:3], v4, off
.LBB61_332:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s65
	s_cbranch_execz .LBB61_334
; %bb.333:
	v_lshlrev_b32_e32 v1, 2, v1
	v_lshlrev_b32_e32 v2, 2, v0
	ds_load_b32 v1, v1
	ds_load_b32 v3, v2 offset:61504
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, v1, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s2, s74, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s2, s75, v2, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[1:2], v3, off
.LBB61_334:
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b32 s2, s[0:1], 0x50
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s2
	s_mov_b32 s2, 0
	s_cselect_b32 s3, -1, 0
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s3
	s_xor_b32 s3, exec_lo, s4
; %bb.335:
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v7, v8
	s_mov_b32 s7, exec_lo
; %bb.336:                              ; %Flow165
	s_or_b32 exec_lo, exec_lo, s3
	s_branch .LBB61_338
.LBB61_337:
	s_mov_b32 s2, -1
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
.LBB61_338:                             ; %Flow164
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB61_367
; %bb.339:
	s_mov_b32 s87, 0
	v_lshlrev_b32_e32 v21, 2, v32
	s_lshl_b64 s[8:9], s[86:87], 2
	v_mov_b32_e32 v33, 0
	s_add_u32 s2, s68, s8
	s_addc_u32 s3, s69, s9
	v_or_b32_e32 v34, 0xfffffe00, v0
	s_clause 0x7
	global_load_b128 v[1:4], v21, s[2:3] offset:48
	global_load_b128 v[9:12], v21, s[2:3] offset:32
	global_load_b128 v[17:20], v21, s[2:3] offset:16
	global_load_b128 v[25:28], v21, s[2:3]
	global_load_b96 v[29:31], v21, s[2:3] offset:112
	global_load_b128 v[5:8], v21, s[2:3] offset:96
	global_load_b128 v[13:16], v21, s[2:3] offset:80
	global_load_b128 v[21:24], v21, s[2:3] offset:64
	v_lshlrev_b32_e32 v35, 2, v0
.LBB61_340:                             ; %.lr.ph.i.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v34, 0x200, v34
	ds_store_b32 v35, v33
	v_add_nc_u32_e32 v35, 0x800, v35
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v34
	s_or_b32 s87, vcc_lo, s87
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s87
	s_cbranch_execnz .LBB61_340
; %bb.341:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s87
	s_waitcnt vmcnt(4)
	v_lshrrev_b32_e32 v33, s80, v25
	s_lshl_b32 s2, -1, s81
	v_lshrrev_b32_e32 v38, s80, v27
	s_not_b32 s10, s2
	s_mov_b32 s2, exec_lo
	v_and_b32_e32 v33, s10, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v34, 9, v33
	v_lshrrev_b32_e32 v33, 3, v33
	v_and_or_b32 v34, 0xe00, v34, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v34, 1, v34
	v_add_lshl_u32 v33, v34, v33, 1
	v_lshrrev_b32_e32 v34, s80, v26
	ds_load_u16 v35, v33
	v_and_b32_e32 v34, s10, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 9, v34
	v_lshrrev_b32_e32 v34, 3, v34
	v_and_or_b32 v36, 0xe00, v36, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 1, v36
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v37, v35, 1
	v_add_lshl_u32 v34, v36, v34, 1
	ds_store_b16 v33, v37
	ds_load_u16 v36, v34
	v_and_b32_e32 v37, s10, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 9, v37
	v_lshrrev_b32_e32 v37, 3, v37
	v_and_or_b32 v38, 0xe00, v38, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 1, v38
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v39, v36, 1
	v_add_lshl_u32 v43, v38, v37, 1
	v_lshrrev_b32_e32 v38, s80, v28
	ds_store_b16 v34, v39
	ds_load_u16 v37, v43
	v_and_b32_e32 v38, s10, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 9, v38
	v_lshrrev_b32_e32 v38, 3, v38
	v_and_or_b32 v39, 0xe00, v39, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 1, v39
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v40, v37, 1
	v_add_lshl_u32 v45, v39, v38, 1
	v_lshrrev_b32_e32 v39, s80, v17
	ds_store_b16 v43, v40
	ds_load_u16 v38, v45
	v_and_b32_e32 v39, s10, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 9, v39
	v_lshrrev_b32_e32 v39, 3, v39
	v_and_or_b32 v40, 0xe00, v40, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 1, v40
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v41, v38, 1
	v_add_lshl_u32 v47, v40, v39, 1
	v_lshrrev_b32_e32 v40, s80, v18
	ds_store_b16 v45, v41
	ds_load_u16 v39, v47
	v_and_b32_e32 v40, s10, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 9, v40
	v_lshrrev_b32_e32 v40, 3, v40
	v_and_or_b32 v41, 0xe00, v41, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 1, v41
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v42, v39, 1
	v_add_lshl_u32 v49, v41, v40, 1
	v_lshrrev_b32_e32 v41, s80, v19
	ds_store_b16 v47, v42
	ds_load_u16 v40, v49
	v_and_b32_e32 v41, s10, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 9, v41
	v_lshrrev_b32_e32 v41, 3, v41
	v_and_or_b32 v42, 0xe00, v42, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 1, v42
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v44, v40, 1
	v_add_lshl_u32 v51, v42, v41, 1
	v_lshrrev_b32_e32 v42, s80, v20
	ds_store_b16 v49, v44
	ds_load_u16 v41, v51
	v_and_b32_e32 v42, s10, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 9, v42
	v_lshrrev_b32_e32 v42, 3, v42
	v_and_or_b32 v44, 0xe00, v44, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 1, v44
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v46, v41, 1
	v_add_lshl_u32 v53, v44, v42, 1
	v_lshrrev_b32_e32 v44, s80, v9
	ds_store_b16 v51, v46
	ds_load_u16 v42, v53
	v_and_b32_e32 v44, s10, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 9, v44
	v_lshrrev_b32_e32 v44, 3, v44
	v_and_or_b32 v46, 0xe00, v46, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 1, v46
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v48, v42, 1
	v_add_lshl_u32 v55, v46, v44, 1
	v_lshrrev_b32_e32 v46, s80, v10
	ds_store_b16 v53, v48
	ds_load_u16 v44, v55
	v_and_b32_e32 v46, s10, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 9, v46
	v_lshrrev_b32_e32 v46, 3, v46
	v_and_or_b32 v48, 0xe00, v48, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 1, v48
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v50, v44, 1
	v_add_lshl_u32 v57, v48, v46, 1
	v_lshrrev_b32_e32 v48, s80, v11
	ds_store_b16 v55, v50
	ds_load_u16 v46, v57
	v_and_b32_e32 v48, s10, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 9, v48
	v_lshrrev_b32_e32 v48, 3, v48
	v_and_or_b32 v50, 0xe00, v50, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 1, v50
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v52, v46, 1
	v_add_lshl_u32 v59, v50, v48, 1
	v_lshrrev_b32_e32 v50, s80, v12
	ds_store_b16 v57, v52
	ds_load_u16 v48, v59
	v_and_b32_e32 v50, s10, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 9, v50
	v_lshrrev_b32_e32 v50, 3, v50
	v_and_or_b32 v52, 0xe00, v52, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 1, v52
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v54, v48, 1
	v_add_lshl_u32 v61, v52, v50, 1
	v_lshrrev_b32_e32 v52, s80, v1
	ds_store_b16 v59, v54
	ds_load_u16 v50, v61
	v_and_b32_e32 v52, s10, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 9, v52
	v_lshrrev_b32_e32 v52, 3, v52
	v_and_or_b32 v54, 0xe00, v54, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 1, v54
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v56, v50, 1
	v_add_lshl_u32 v63, v54, v52, 1
	v_lshrrev_b32_e32 v54, s80, v2
	ds_store_b16 v61, v56
	ds_load_u16 v52, v63
	v_and_b32_e32 v54, s10, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 9, v54
	v_lshrrev_b32_e32 v54, 3, v54
	v_and_or_b32 v56, 0xe00, v56, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 1, v56
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v58, v52, 1
	v_add_lshl_u32 v65, v56, v54, 1
	v_lshrrev_b32_e32 v56, s80, v3
	ds_store_b16 v63, v58
	ds_load_u16 v54, v65
	v_and_b32_e32 v56, s10, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 9, v56
	v_lshrrev_b32_e32 v56, 3, v56
	v_and_or_b32 v58, 0xe00, v58, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 1, v58
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v60, v54, 1
	v_add_lshl_u32 v67, v58, v56, 1
	v_lshrrev_b32_e32 v58, s80, v4
	ds_store_b16 v65, v60
	ds_load_u16 v56, v67
	v_and_b32_e32 v58, s10, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 9, v58
	v_lshrrev_b32_e32 v58, 3, v58
	v_and_or_b32 v60, 0xe00, v60, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 1, v60
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v62, v56, 1
	v_add_lshl_u32 v69, v60, v58, 1
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v60, s80, v21
	ds_store_b16 v67, v62
	ds_load_u16 v58, v69
	v_and_b32_e32 v60, s10, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 9, v60
	v_lshrrev_b32_e32 v60, 3, v60
	v_and_or_b32 v62, 0xe00, v62, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 1, v62
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v64, v58, 1
	v_add_lshl_u32 v71, v62, v60, 1
	v_lshrrev_b32_e32 v62, s80, v22
	ds_store_b16 v69, v64
	ds_load_u16 v60, v71
	v_and_b32_e32 v62, s10, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 9, v62
	v_lshrrev_b32_e32 v62, 3, v62
	v_and_or_b32 v64, 0xe00, v64, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 1, v64
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v66, v60, 1
	v_add_lshl_u32 v73, v64, v62, 1
	v_lshrrev_b32_e32 v64, s80, v23
	ds_store_b16 v71, v66
	ds_load_u16 v62, v73
	v_and_b32_e32 v64, s10, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 9, v64
	v_lshrrev_b32_e32 v64, 3, v64
	v_and_or_b32 v66, 0xe00, v66, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 1, v66
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v68, v62, 1
	v_add_lshl_u32 v75, v66, v64, 1
	v_lshrrev_b32_e32 v66, s80, v24
	ds_store_b16 v73, v68
	ds_load_u16 v64, v75
	v_and_b32_e32 v66, s10, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 9, v66
	v_lshrrev_b32_e32 v66, 3, v66
	v_and_or_b32 v68, 0xe00, v68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 1, v68
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v70, v64, 1
	v_add_lshl_u32 v77, v68, v66, 1
	v_lshrrev_b32_e32 v68, s80, v13
	ds_store_b16 v75, v70
	ds_load_u16 v66, v77
	v_and_b32_e32 v68, s10, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 9, v68
	v_lshrrev_b32_e32 v68, 3, v68
	v_and_or_b32 v70, 0xe00, v70, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 1, v70
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v72, v66, 1
	v_add_lshl_u32 v79, v70, v68, 1
	v_lshrrev_b32_e32 v70, s80, v14
	ds_store_b16 v77, v72
	ds_load_u16 v68, v79
	v_and_b32_e32 v70, s10, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 9, v70
	v_lshrrev_b32_e32 v70, 3, v70
	v_and_or_b32 v72, 0xe00, v72, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 1, v72
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v74, v68, 1
	v_add_lshl_u32 v81, v72, v70, 1
	v_lshrrev_b32_e32 v72, s80, v15
	ds_store_b16 v79, v74
	ds_load_u16 v70, v81
	v_and_b32_e32 v72, s10, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 9, v72
	v_lshrrev_b32_e32 v72, 3, v72
	v_and_or_b32 v74, 0xe00, v74, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 1, v74
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v76, v70, 1
	v_add_lshl_u32 v83, v74, v72, 1
	v_lshrrev_b32_e32 v74, s80, v16
	ds_store_b16 v81, v76
	ds_load_u16 v72, v83
	v_and_b32_e32 v74, s10, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 9, v74
	v_lshrrev_b32_e32 v74, 3, v74
	v_and_or_b32 v76, 0xe00, v76, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 1, v76
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v78, v72, 1
	v_add_lshl_u32 v85, v76, v74, 1
	v_lshrrev_b32_e32 v76, s80, v5
	ds_store_b16 v83, v78
	ds_load_u16 v74, v85
	v_and_b32_e32 v76, s10, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 9, v76
	v_lshrrev_b32_e32 v76, 3, v76
	v_and_or_b32 v78, 0xe00, v78, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 1, v78
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v80, v74, 1
	v_add_lshl_u32 v87, v78, v76, 1
	v_lshrrev_b32_e32 v78, s80, v6
	ds_store_b16 v85, v80
	ds_load_u16 v76, v87
	v_and_b32_e32 v78, s10, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 9, v78
	v_lshrrev_b32_e32 v78, 3, v78
	v_and_or_b32 v80, 0xe00, v80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 1, v80
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v82, v76, 1
	v_add_lshl_u32 v89, v80, v78, 1
	v_lshrrev_b32_e32 v80, s80, v7
	ds_store_b16 v87, v82
	ds_load_u16 v78, v89
	v_and_b32_e32 v80, s10, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 9, v80
	v_lshrrev_b32_e32 v80, 3, v80
	v_and_or_b32 v82, 0xe00, v82, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 1, v82
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v84, v78, 1
	v_add_lshl_u32 v90, v82, v80, 1
	v_lshrrev_b32_e32 v82, s80, v8
	ds_store_b16 v89, v84
	ds_load_u16 v80, v90
	v_and_b32_e32 v82, s10, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 9, v82
	v_lshrrev_b32_e32 v82, 3, v82
	v_and_or_b32 v84, 0xe00, v84, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 1, v84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v86, v80, 1
	v_add_lshl_u32 v91, v84, v82, 1
	v_lshrrev_b32_e32 v84, s80, v29
	ds_store_b16 v90, v86
	ds_load_u16 v82, v91
	v_and_b32_e32 v84, s10, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 9, v84
	v_lshrrev_b32_e32 v84, 3, v84
	v_and_or_b32 v86, 0xe00, v86, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 1, v86
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v88, v82, 1
	v_add_lshl_u32 v92, v86, v84, 1
	v_lshrrev_b32_e32 v86, s80, v30
	ds_store_b16 v91, v88
	ds_load_u16 v84, v92
	v_and_b32_e32 v86, s10, v86
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 9, v86
	v_lshrrev_b32_e32 v86, 3, v86
	v_and_or_b32 v88, 0xe00, v88, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 1, v88
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v94, v84, 1
	v_add_lshl_u32 v93, v88, v86, 1
	v_lshrrev_b32_e32 v88, s80, v31
	ds_store_b16 v92, v94
	ds_load_u16 v86, v93
	v_and_b32_e32 v88, s10, v88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 9, v88
	v_lshrrev_b32_e32 v88, 3, v88
	v_and_or_b32 v94, 0xe00, v94, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 1, v94
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v86, 1
	v_add_lshl_u32 v94, v94, v88, 1
	ds_store_b16 v93, v95
	ds_load_u16 v88, v94
	v_lshlrev_b32_e32 v95, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v88, 1
	ds_store_b16 v94, v96
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[96:99], v95 offset1:1
	ds_load_2addr_b64 v[100:103], v95 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v96, v97, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v96, v96, v98, v99
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v97, v96, v100, v101
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_or_b32_e32 v100, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v97, v97, v102, v103
	v_and_b32_e32 v98, 15, v96
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v99, v97 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s3, 0, v98
	v_cmp_lt_u32_e64 s4, 1, v98
	v_cmp_lt_u32_e64 s5, 3, v98
	v_cmp_lt_u32_e64 s6, 7, v98
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, v99, 0, s3
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v99, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v97, v97, v99
	v_mov_b32_dpp v99, v97 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, 0, v99, s5
	v_add_nc_u32_e32 v97, v97, v99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v98, 0, v99, s6
	v_bfe_i32 v99, v96, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v97, v97, v98
	ds_swizzle_b32 v98, v97 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v98, v99, v98
	v_lshrrev_b32_e32 v99, 5, v0
	v_add_nc_u32_e32 v97, v97, v98
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v99
	v_cmpx_eq_u32_e64 v100, v0
	s_cbranch_execz .LBB61_343
; %bb.342:
	ds_store_b32 v98, v97 offset:16384
.LBB61_343:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_lt_u32_e64 s2, 15, v0
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s11, vcc_lo
	s_cbranch_execz .LBB61_345
; %bb.344:
	v_mad_i32_i24 v99, 0xffffffe4, v0, v95
	ds_load_b32 v100, v99 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v101, v100 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, v101, 0, s3
	v_add_nc_u32_e32 v100, v101, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	v_mov_b32_dpp v101, v100 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, 0, v101, s5
	v_add_nc_u32_e32 v100, v100, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	ds_store_b32 v99, v100 offset:16384
.LBB61_345:                             ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s11
	v_dual_mov_b32 v100, 0 :: v_dual_mov_b32 v99, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB61_347
; %bb.346:
	ds_load_b32 v99, v98 offset:16380
.LBB61_347:                             ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjjjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEEPjSB_SC_EEvT0_T1_T2_T3_SC_SC_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESE_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v98, -1, v96
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s3, 0, v98
	v_cndmask_b32_e64 v98, v98, v96, s3
	v_cmp_eq_u32_e64 s3, 0, v96
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v98
	ds_bpermute_b32 v97, v98, v97
	ds_load_b32 v98, v100 offset:16444
	ds_load_2addr_b64 v[100:103], v95 offset1:1
	ds_load_b32 v104, v95 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v96, v97, v99, s3
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v96, v98, 16, v96
	ds_load_b64 v[98:99], v95 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v97, v96, v100
	v_add_nc_u32_e32 v100, v101, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v102, v100
	v_add_nc_u32_e32 v102, v103, v101
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v103, v98, v102
	v_add_nc_u32_e32 v98, v99, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v99, v104, v98
	ds_store_2addr_b64 v95, v[96:97], v[100:101] offset1:1
	ds_store_2addr_b64 v95, v[102:103], v[98:99] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v95, v33
	ds_load_u16 v96, v34
	ds_load_u16 v97, v43
	ds_load_u16 v45, v45
	ds_load_u16 v47, v47
	ds_load_u16 v49, v49
	ds_load_u16 v51, v51
	ds_load_u16 v53, v53
	ds_load_u16 v55, v55
	ds_load_u16 v57, v57
	ds_load_u16 v59, v59
	ds_load_u16 v61, v61
	ds_load_u16 v63, v63
	ds_load_u16 v65, v65
	ds_load_u16 v67, v67
	ds_load_u16 v69, v69
	ds_load_u16 v71, v71
	ds_load_u16 v73, v73
	ds_load_u16 v75, v75
	ds_load_u16 v77, v77
	ds_load_u16 v79, v79
	ds_load_u16 v81, v81
	ds_load_u16 v83, v83
	ds_load_u16 v85, v85
	ds_load_u16 v87, v87
	ds_load_u16 v89, v89
	ds_load_u16 v90, v90
	ds_load_u16 v91, v91
	ds_load_u16 v92, v92
	ds_load_u16 v93, v93
	ds_load_u16 v43, v94
                                        ; implicit-def: $vgpr33
                                        ; implicit-def: $vgpr34
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB61_351
; %bb.348:
	v_lshrrev_b32_e32 v33, 3, v0
	v_lshlrev_b32_e32 v34, 10, v0
	v_add_nc_u32_e32 v94, 1, v0
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v33, 0x1c00, v34, v33
	v_dual_mov_b32 v34, 0x3e00 :: v_dual_lshlrev_b32 v33, 1, v33
	ds_load_u16 v33, v33
	v_cmpx_ne_u32_e32 16, v94
	s_cbranch_execz .LBB61_350
; %bb.349:
	v_lshlrev_b32_e32 v34, 10, v94
	v_lshrrev_b32_e32 v94, 3, v94
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v34, 0x1c00, v34, v94
	v_lshlrev_b32_e32 v34, 1, v34
	ds_load_u16 v34, v34
.LBB61_350:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v33, 0xffff, v33
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v34, v34, v33
.LBB61_351:                             ; %Flow161
	s_or_b32 exec_lo, exec_lo, s4
	v_and_b32_e32 v35, 0xffff, v35
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v94, 0xffff, v95
	v_and_b32_e32 v36, 0xffff, v36
	s_waitcnt lgkmcnt(29)
	v_and_b32_e32 v95, 0xffff, v96
	v_and_b32_e32 v37, 0xffff, v37
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v96, 0xffff, v97
	v_add_lshl_u32 v35, v94, v35, 2
	v_and_b32_e32 v38, 0xffff, v38
	s_waitcnt lgkmcnt(27)
	v_and_b32_e32 v45, 0xffff, v45
	v_and_b32_e32 v39, 0xffff, v39
	s_waitcnt lgkmcnt(26)
	v_and_b32_e32 v47, 0xffff, v47
	v_and_b32_e32 v40, 0xffff, v40
	s_waitcnt lgkmcnt(25)
	v_and_b32_e32 v49, 0xffff, v49
	v_and_b32_e32 v41, 0xffff, v41
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v51, 0xffff, v51
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v35, v25 offset:64
	v_add_lshl_u32 v25, v95, v36, 2
	v_and_b32_e32 v42, 0xffff, v42
	v_and_b32_e32 v53, 0xffff, v53
	v_add_lshl_u32 v36, v96, v37, 2
	v_and_b32_e32 v44, 0xffff, v44
	v_and_b32_e32 v55, 0xffff, v55
	v_add_lshl_u32 v37, v45, v38, 2
	v_and_b32_e32 v46, 0xffff, v46
	v_and_b32_e32 v57, 0xffff, v57
	v_add_lshl_u32 v38, v47, v39, 2
	v_and_b32_e32 v48, 0xffff, v48
	v_and_b32_e32 v59, 0xffff, v59
	v_add_lshl_u32 v39, v49, v40, 2
	v_and_b32_e32 v50, 0xffff, v50
	v_and_b32_e32 v61, 0xffff, v61
	ds_store_b32 v25, v26 offset:64
	ds_store_b32 v36, v27 offset:64
	ds_store_b32 v37, v28 offset:64
	ds_store_b32 v38, v17 offset:64
	ds_store_b32 v39, v18 offset:64
	v_add_lshl_u32 v17, v51, v41, 2
	v_and_b32_e32 v52, 0xffff, v52
	v_and_b32_e32 v63, 0xffff, v63
	v_add_lshl_u32 v18, v53, v42, 2
	v_and_b32_e32 v54, 0xffff, v54
	v_and_b32_e32 v65, 0xffff, v65
	v_add_lshl_u32 v26, v55, v44, 2
	v_and_b32_e32 v56, 0xffff, v56
	v_and_b32_e32 v67, 0xffff, v67
	v_add_lshl_u32 v27, v57, v46, 2
	v_and_b32_e32 v58, 0xffff, v58
	v_and_b32_e32 v69, 0xffff, v69
	v_add_lshl_u32 v28, v59, v48, 2
	v_and_b32_e32 v60, 0xffff, v60
	v_and_b32_e32 v71, 0xffff, v71
	ds_store_b32 v17, v19 offset:64
	ds_store_b32 v18, v20 offset:64
	ds_store_b32 v26, v9 offset:64
	ds_store_b32 v27, v10 offset:64
	ds_store_b32 v28, v11 offset:64
	v_add_lshl_u32 v9, v61, v50, 2
	v_and_b32_e32 v62, 0xffff, v62
	v_and_b32_e32 v73, 0xffff, v73
	v_add_lshl_u32 v10, v63, v52, 2
	v_and_b32_e32 v64, 0xffff, v64
	v_and_b32_e32 v75, 0xffff, v75
	v_add_lshl_u32 v11, v65, v54, 2
	v_and_b32_e32 v66, 0xffff, v66
	v_and_b32_e32 v77, 0xffff, v77
	v_add_lshl_u32 v19, v67, v56, 2
	v_and_b32_e32 v68, 0xffff, v68
	v_and_b32_e32 v79, 0xffff, v79
	v_add_lshl_u32 v20, v69, v58, 2
	v_and_b32_e32 v70, 0xffff, v70
	v_and_b32_e32 v81, 0xffff, v81
	ds_store_b32 v9, v12 offset:64
	ds_store_b32 v10, v1 offset:64
	ds_store_b32 v11, v2 offset:64
	ds_store_b32 v19, v3 offset:64
	ds_store_b32 v20, v4 offset:64
	v_add_lshl_u32 v12, v71, v60, 2
	v_and_b32_e32 v72, 0xffff, v72
	v_and_b32_e32 v83, 0xffff, v83
	v_add_lshl_u32 v40, v73, v62, 2
	v_and_b32_e32 v74, 0xffff, v74
	v_and_b32_e32 v85, 0xffff, v85
	v_add_lshl_u32 v41, v75, v64, 2
	v_and_b32_e32 v76, 0xffff, v76
	v_and_b32_e32 v87, 0xffff, v87
	v_add_lshl_u32 v42, v77, v66, 2
	v_and_b32_e32 v78, 0xffff, v78
	v_and_b32_e32 v89, 0xffff, v89
	v_and_b32_e32 v94, 0xffff, v43
	v_add_lshl_u32 v43, v79, v68, 2
	v_and_b32_e32 v80, 0xffff, v80
	v_and_b32_e32 v82, 0xffff, v82
	v_and_b32_e32 v84, 0xffff, v84
	v_and_b32_e32 v86, 0xffff, v86
	v_and_b32_e32 v88, 0xffff, v88
	v_and_b32_e32 v90, 0xffff, v90
	v_and_b32_e32 v91, 0xffff, v91
	v_and_b32_e32 v92, 0xffff, v92
	v_and_b32_e32 v93, 0xffff, v93
	ds_store_b32 v12, v21 offset:64
	ds_store_b32 v40, v22 offset:64
	ds_store_b32 v41, v23 offset:64
	ds_store_b32 v42, v24 offset:64
	ds_store_b32 v43, v13 offset:64
	v_add_lshl_u32 v13, v81, v70, 2
	v_add_lshl_u32 v21, v83, v72, 2
	v_add_lshl_u32 v22, v85, v74, 2
	v_add_lshl_u32 v23, v87, v76, 2
	v_add_lshl_u32 v24, v89, v78, 2
	ds_store_b32 v13, v14 offset:64
	ds_store_b32 v21, v15 offset:64
	ds_store_b32 v22, v16 offset:64
	ds_store_b32 v23, v5 offset:64
	ds_store_b32 v24, v6 offset:64
	v_add_lshl_u32 v14, v90, v80, 2
	v_add_lshl_u32 v15, v91, v82, 2
	v_add_lshl_u32 v16, v92, v84, 2
	v_add_lshl_u32 v44, v93, v86, 2
	v_add_lshl_u32 v45, v94, v88, 2
	ds_store_b32 v14, v7 offset:64
	ds_store_b32 v15, v8 offset:64
	ds_store_b32 v16, v29 offset:64
	ds_store_b32 v44, v30 offset:64
	ds_store_b32 v45, v31 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s3
; %bb.352:                              ; %_ZN7rocprim16block_radix_rankILj512ELj4ELNS_26block_radix_rank_algorithmE0ELj1ELj1EE9rank_keysIjLj31EZNS_6detail25onesweep_iteration_helperIjjjLj512ELj31ELj4ELb0ELS1_0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEEPjSB_SC_EEvT0_T1_T2_T3_SC_SC_PNS4_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS4_11raw_storageINS4_16block_radix_rankILj512ELj4ELb0ELj1ELj1EE13storage_type_EEESE_RA1_jS11_.exit._crit_edge.i.i
	v_mov_b32_e32 v1, 0
; %bb.353:                              ; %Flow158
	s_and_not1_saveexec_b32 s3, s2
	s_cbranch_execz .LBB61_364
; %bb.354:
	v_lshl_or_b32 v3, s15, 4, v0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v7, 0
	s_mov_b32 s4, 0
	s_mov_b32 s5, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v34
	v_add_co_u32 v1, s2, s84, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s2, s85, v2, s2
                                        ; implicit-def: $sgpr2
	global_store_b32 v[1:2], v3, off
.LBB61_355:                             ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB61_358 Depth 2
	s_or_b32 s2, s2, exec_lo
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB61_361
; %bb.356:                              ;   in Loop: Header=BB61_355 Depth=1
	s_add_i32 s5, s5, -1
	s_mov_b32 s6, exec_lo
	v_lshl_or_b32 v3, s5, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s2, s84, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s2, s85, v6, s2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB61_360
; %bb.357:                              ; %.lr.ph.i.i.preheader
                                        ;   in Loop: Header=BB61_355 Depth=1
	s_mov_b32 s11, 0
.LBB61_358:                             ; %.lr.ph.i.i
                                        ;   Parent Loop BB61_355 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s2, 0, v3
	s_or_b32 s11, s2, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB61_358
; %bb.359:                              ; %Flow155
                                        ;   in Loop: Header=BB61_355 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB61_360:                             ; %Flow156
                                        ;   in Loop: Header=BB61_355 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s6
	v_and_b32_e32 v5, 0x3fffffff, v8
	v_cmp_eq_u32_e64 s2, 0x80000000, v3
	v_add_nc_u32_e32 v7, v5, v7
	s_branch .LBB61_362
.LBB61_361:                             ;   in Loop: Header=BB61_355 Depth=1
                                        ; implicit-def: $sgpr5
.LBB61_362:                             ; %Flow157
                                        ;   in Loop: Header=BB61_355 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s6, exec_lo, s2
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB61_355
; %bb.363:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v3, v7, v34
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v7, v33
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v2, v1
	ds_store_b32 v4, v2
.LBB61_364:                             ; %Flow159
	s_or_b32 exec_lo, exec_lo, s3
	v_lshlrev_b32_e32 v2, 2, v0
	v_lshlrev_b32_e32 v69, 2, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v4, 64, v2
	ds_load_2addr_stride64_b32 v[7:8], v4 offset0:8 offset1:16
	ds_load_2addr_stride64_b32 v[30:31], v4 offset0:24 offset1:32
	ds_load_2addr_stride64_b32 v[46:47], v4 offset0:40 offset1:48
	ds_load_2addr_stride64_b32 v[50:51], v4 offset0:56 offset1:64
	ds_load_2addr_stride64_b32 v[58:59], v4 offset0:72 offset1:80
	ds_load_2addr_stride64_b32 v[60:61], v4 offset0:88 offset1:96
	ds_load_2addr_stride64_b32 v[67:68], v4 offset0:104 offset1:112
	ds_load_b32 v53, v69 offset:64
	s_waitcnt lgkmcnt(7)
	v_lshrrev_b32_e32 v2, s80, v7
	s_waitcnt lgkmcnt(6)
	v_lshrrev_b32_e32 v3, s80, v30
	s_waitcnt lgkmcnt(5)
	v_lshrrev_b32_e32 v5, s80, v46
	s_waitcnt lgkmcnt(4)
	v_lshrrev_b32_e32 v6, s80, v50
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v29, s80, v58
	v_and_b32_e32 v2, s10, v2
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v48, s80, v60
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v49, s80, v67
	v_and_b32_e32 v6, s10, v6
	v_and_b32_e32 v3, s10, v3
	v_lshlrev_b32_e32 v72, 2, v2
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v2, s80, v53
	v_and_b32_e32 v5, s10, v5
	v_and_b32_e32 v29, s10, v29
	v_and_b32_e32 v48, s10, v48
	v_and_b32_e32 v49, s10, v49
	v_and_b32_e32 v2, s10, v2
	v_lshlrev_b32_e32 v57, 2, v6
	v_lshrrev_b32_e32 v6, s80, v8
	v_lshlrev_b32_e32 v71, 2, v3
	v_mov_b32_e32 v3, 0
	v_lshlrev_b32_e32 v73, 2, v2
	v_lshlrev_b32_e32 v70, 2, v5
	v_lshlrev_b32_e32 v56, 2, v29
	v_lshlrev_b32_e32 v55, 2, v48
	v_lshlrev_b32_e32 v54, 2, v49
	ds_load_b32 v5, v72
	ds_load_b32 v29, v71
	ds_load_b32 v62, v70
	ds_load_b32 v85, v57
	ds_load_b32 v86, v56
	ds_load_b32 v87, v55
	ds_load_b32 v88, v54
	v_and_b32_e32 v6, s10, v6
	ds_load_b32 v77, v73
	v_lshrrev_b32_e32 v48, s80, v31
	v_lshrrev_b32_e32 v52, s80, v51
	v_lshrrev_b32_e32 v2, s80, v61
	v_lshlrev_b32_e32 v76, 2, v6
	v_lshrrev_b32_e32 v49, s80, v47
	v_lshrrev_b32_e32 v63, s80, v59
	v_lshrrev_b32_e32 v64, s80, v68
	v_and_b32_e32 v48, s10, v48
	ds_load_b32 v81, v76
	v_and_b32_e32 v52, s10, v52
	v_and_b32_e32 v2, s10, v2
	v_and_b32_e32 v49, s10, v49
	v_and_b32_e32 v63, s10, v63
	v_and_b32_e32 v78, s10, v64
	v_lshlrev_b32_e32 v75, 2, v48
	v_lshlrev_b32_e32 v66, 2, v52
	v_lshlrev_b32_e32 v64, 2, v2
	v_or_b32_e32 v52, 0x200, v0
	v_lshlrev_b32_e32 v74, 2, v49
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v77, v0
	v_lshlrev_b32_e32 v65, 2, v63
	v_lshlrev_b32_e32 v63, 2, v78
	ds_load_b32 v89, v75
	ds_load_b32 v90, v74
	ds_load_b32 v91, v66
	ds_load_b32 v92, v65
	ds_load_b32 v93, v64
	ds_load_b32 v97, v63
	v_or_b32_e32 v49, 0x400, v0
	v_lshlrev_b64 v[77:78], 2, v[2:3]
	v_add_nc_u32_e32 v2, v5, v52
	v_or_b32_e32 v48, 0x600, v0
	v_or_b32_e32 v6, 0x800, v0
	v_or_b32_e32 v5, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[79:80], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v81, v49
	v_add_co_u32 v77, s2, s70, v77
	v_add_co_ci_u32_e64 v78, s2, s71, v78, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[81:82], 2, v[2:3]
	v_add_nc_u32_e32 v2, v29, v48
	v_add_co_u32 v79, s2, s70, v79
	v_add_co_ci_u32_e64 v80, s2, s71, v80, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[83:84], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v89, v6
	v_add_co_u32 v81, s2, s70, v81
	v_add_co_ci_u32_e64 v82, s2, s71, v82, s2
	s_clause 0x1
	global_store_b32 v[77:78], v53, off
	global_store_b32 v[79:80], v7, off
	v_lshlrev_b64 v[77:78], 2, v[2:3]
	v_add_nc_u32_e32 v2, v62, v5
	v_or_b32_e32 v29, 0xc00, v0
	global_store_b32 v[81:82], v8, off
	v_add_co_u32 v79, s2, s70, v83
	v_lshlrev_b64 v[81:82], 2, v[2:3]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v90, v29
	v_or_b32_e32 v7, 0xe00, v0
	v_add_co_ci_u32_e64 v80, s2, s71, v84, s2
	v_add_co_u32 v77, s2, s70, v77
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v78, s2, s71, v78, s2
	v_add_co_u32 v81, s2, s70, v81
	v_lshlrev_b64 v[83:84], 2, v[2:3]
	v_add_nc_u32_e32 v2, v85, v7
	v_or_b32_e32 v8, 0x1000, v0
	v_add_co_ci_u32_e64 v82, s2, s71, v82, s2
	s_clause 0x2
	global_store_b32 v[79:80], v30, off
	global_store_b32 v[77:78], v31, off
	global_store_b32 v[81:82], v46, off
	v_lshlrev_b64 v[30:31], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v91, v8
	v_or_b32_e32 v46, 0x1200, v0
	v_add_co_u32 v77, s2, s70, v83
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v78, s2, s71, v84, s2
	v_lshlrev_b64 v[79:80], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v2, v86, v46
	v_add_co_u32 v81, s2, s70, v30
	v_or_b32_e32 v30, 0x1400, v0
	v_add_co_ci_u32_e64 v82, s2, s71, v31, s2
	v_lshlrev_b64 v[83:84], 2, v[2:3]
	v_add_co_u32 v79, s2, s70, v79
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v80, s2, s71, v80, s2
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v2, v92, v30
	v_or_b32_e32 v31, 0x1600, v0
	s_clause 0x2
	global_store_b32 v[77:78], v47, off
	global_store_b32 v[81:82], v50, off
	global_store_b32 v[79:80], v51, off
	v_add_co_u32 v77, s2, s70, v83
	v_lshlrev_b64 v[50:51], 2, v[2:3]
	v_add_nc_u32_e32 v2, v87, v31
	v_add_co_ci_u32_e64 v78, s2, s71, v84, s2
	ds_load_2addr_stride64_b32 v[84:85], v4 offset0:120 offset1:128
	ds_load_2addr_stride64_b32 v[86:87], v4 offset0:136 offset1:144
	v_or_b32_e32 v47, 0x1800, v0
	v_lshlrev_b64 v[79:80], 2, v[2:3]
	v_add_co_u32 v81, s2, s70, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v82, s2, s71, v51, s2
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v93, v47
	global_store_b32 v[77:78], v58, off
	v_add_co_u32 v79, s2, s70, v79
	v_add_co_ci_u32_e64 v80, s2, s71, v80, s2
	v_lshlrev_b64 v[77:78], 2, v[2:3]
	s_clause 0x1
	global_store_b32 v[81:82], v59, off
	global_store_b32 v[79:80], v60, off
	v_or_b32_e32 v50, 0x1a00, v0
	ds_load_2addr_stride64_b32 v[93:94], v4 offset0:152 offset1:160
	ds_load_2addr_stride64_b32 v[95:96], v4 offset0:168 offset1:176
	v_add_co_u32 v58, s2, s70, v77
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v59, s2, s71, v78, s2
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v53, s80, v84
	v_add_nc_u32_e32 v2, v88, v50
	v_or_b32_e32 v51, 0x1c00, v0
	global_store_b32 v[58:59], v61, off
	v_lshrrev_b32_e32 v60, s80, v85
	v_and_b32_e32 v58, s10, v53
	v_lshlrev_b64 v[81:82], 2, v[2:3]
	v_add_nc_u32_e32 v2, v97, v51
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v62, s80, v86
	v_and_b32_e32 v59, s10, v60
	v_lshlrev_b32_e32 v78, 2, v58
	v_lshrrev_b32_e32 v58, s80, v87
	v_lshlrev_b64 v[60:61], 2, v[2:3]
	v_and_b32_e32 v2, s10, v62
	v_lshlrev_b32_e32 v79, 2, v59
	ds_load_b32 v62, v78
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v59, s80, v94
	v_and_b32_e32 v58, s10, v58
	v_lshlrev_b32_e32 v80, 2, v2
	ds_load_b32 v88, v79
	v_lshrrev_b32_e32 v2, s80, v93
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v77, s80, v95
	v_lshrrev_b32_e32 v83, s80, v96
	v_and_b32_e32 v59, s10, v59
	v_lshlrev_b32_e32 v89, 2, v58
	v_and_b32_e32 v2, s10, v2
	v_and_b32_e32 v58, s10, v77
	v_and_b32_e32 v77, s10, v83
	v_or_b32_e32 v53, 0x1e00, v0
	v_lshlrev_b32_e32 v91, 2, v59
	v_lshlrev_b32_e32 v90, 2, v2
	v_lshlrev_b32_e32 v92, 2, v58
	v_lshlrev_b32_e32 v83, 2, v77
	ds_load_b32 v77, v80
	ds_load_b32 v101, v89
	ds_load_b32 v102, v90
	ds_load_b32 v103, v91
	ds_load_b32 v105, v92
	ds_load_b32 v106, v83
	v_or_b32_e32 v59, 0x2000, v0
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v2, v62, v53
	v_add_co_u32 v81, s2, s70, v81
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v82, s2, s71, v82, s2
	v_lshlrev_b64 v[97:98], 2, v[2:3]
	v_add_co_u32 v99, s2, s70, v60
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v88, v59
	v_or_b32_e32 v58, 0x2200, v0
	v_add_co_ci_u32_e64 v100, s2, s71, v61, s2
	v_add_co_u32 v61, s2, s70, v97
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v62, s2, s71, v98, s2
	v_lshlrev_b64 v[97:98], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v77, v58
	v_or_b32_e32 v60, 0x2400, v0
	s_clause 0x2
	global_store_b32 v[81:82], v67, off
	global_store_b32 v[99:100], v68, off
	global_store_b32 v[61:62], v84, off
	v_or_b32_e32 v62, 0x2600, v0
	v_or_b32_e32 v61, 0x2800, v0
	v_lshlrev_b64 v[67:68], 2, v[2:3]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v101, v60
	v_add_co_u32 v81, s2, s70, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v82, s2, s71, v98, s2
	v_lshlrev_b64 v[97:98], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v102, v62
	ds_load_2addr_stride64_b32 v[101:102], v4 offset0:184 offset1:192
	v_add_co_u32 v67, s2, s70, v67
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v68, s2, s71, v68, s2
	v_lshlrev_b64 v[99:100], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v103, v61
	s_clause 0x1
	global_store_b32 v[81:82], v85, off
	global_store_b32 v[67:68], v86, off
	ds_load_2addr_stride64_b32 v[103:104], v4 offset0:200 offset1:208
	v_or_b32_e32 v68, 0x2a00, v0
	v_add_co_u32 v97, s2, s70, v97
	v_lshlrev_b64 v[81:82], 2, v[2:3]
	v_add_co_ci_u32_e64 v98, s2, s71, v98, s2
	v_add_co_u32 v84, s2, s70, v99
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v105, v68
	v_add_co_ci_u32_e64 v85, s2, s71, v100, s2
	v_add_co_u32 v86, s2, s70, v81
	global_store_b32 v[97:98], v87, off
	ds_load_2addr_stride64_b32 v[97:98], v4 offset0:216 offset1:224
	v_add_co_ci_u32_e64 v87, s2, s71, v82, s2
	v_lshlrev_b64 v[81:82], 2, v[2:3]
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v77, s80, v101
	ds_load_2addr_stride64_b32 v[99:100], v4 offset0:232 offset1:240
	v_or_b32_e32 v67, 0x2c00, v0
	v_lshrrev_b32_e32 v88, s80, v102
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v109, s80, v103
	v_add_co_u32 v105, s2, s70, v81
	v_and_b32_e32 v81, s10, v77
	v_add_nc_u32_e32 v2, v106, v67
	v_add_co_ci_u32_e64 v106, s2, s71, v82, s2
	v_and_b32_e32 v82, s10, v88
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b32_e32 v124, 2, v81
	v_lshlrev_b64 v[107:108], 2, v[2:3]
	v_and_b32_e32 v2, s10, v109
	v_lshrrev_b32_e32 v81, s80, v104
	v_lshlrev_b32_e32 v125, 2, v82
	ds_load_b32 v88, v124
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v82, s80, v98
	v_lshlrev_b32_e32 v126, 2, v2
	v_lshrrev_b32_e32 v2, s80, v97
	ds_load_b32 v111, v125
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v109, s80, v99
	v_lshrrev_b32_e32 v110, s80, v100
	v_and_b32_e32 v81, s10, v81
	v_and_b32_e32 v2, s10, v2
	v_and_b32_e32 v82, s10, v82
	v_and_b32_e32 v109, s10, v109
	v_and_b32_e32 v110, s10, v110
	v_lshlrev_b32_e32 v127, 2, v81
	v_lshlrev_b32_e32 v128, 2, v2
	v_lshlrev_b32_e32 v129, 2, v82
	v_or_b32_e32 v77, 0x2e00, v0
	v_lshlrev_b32_e32 v130, 2, v109
	v_lshlrev_b32_e32 v131, 2, v110
	ds_load_b32 v82, v126
	ds_load_b32 v109, v127
	ds_load_b32 v110, v128
	ds_load_b32 v112, v129
	ds_load_b32 v113, v130
	ds_load_b32 v114, v131
	v_or_b32_e32 v81, 0x3000, v0
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v2, v88, v77
	s_clause 0x2
	global_store_b32 v[84:85], v93, off
	global_store_b32 v[86:87], v94, off
	global_store_b32 v[105:106], v95, off
	v_or_b32_e32 v84, 0x3200, v0
	v_add_co_u32 v87, s2, s70, v107
	v_lshlrev_b64 v[85:86], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v111, v81
	v_add_co_ci_u32_e64 v88, s2, s71, v108, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[93:94], 2, v[2:3]
	v_add_co_u32 v105, s2, s70, v85
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v82, v84
	v_or_b32_e32 v82, 0x3400, v0
	v_add_co_ci_u32_e64 v106, s2, s71, v86, s2
	v_add_co_u32 v93, s2, s70, v93
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[107:108], 2, v[2:3]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v109, v82
	v_or_b32_e32 v85, 0x3600, v0
	v_add_co_ci_u32_e64 v94, s2, s71, v94, s2
	s_clause 0x2
	global_store_b32 v[87:88], v96, off
	global_store_b32 v[105:106], v101, off
	global_store_b32 v[93:94], v102, off
	v_lshlrev_b64 v[87:88], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v110, v85
	v_or_b32_e32 v86, 0x3800, v0
	v_add_co_u32 v93, s2, s70, v107
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v94, s2, s71, v108, s2
	v_lshlrev_b64 v[95:96], 2, v[2:3]
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v2, v112, v86
	v_add_co_u32 v101, s2, s70, v87
	v_or_b32_e32 v87, 0x3a00, v0
	v_add_co_ci_u32_e64 v102, s2, s71, v88, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[105:106], 2, v[2:3]
	v_or_b32_e32 v88, 0x3c00, v0
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v113, v87
	v_add_co_u32 v95, s2, s70, v95
	v_add_co_ci_u32_e64 v96, s2, s71, v96, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[107:108], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v114, v88
	v_add_co_u32 v105, s2, s70, v105
	v_add_co_ci_u32_e64 v106, s2, s71, v106, s2
	s_clause 0x3
	global_store_b32 v[93:94], v103, off
	global_store_b32 v[101:102], v104, off
	global_store_b32 v[95:96], v97, off
	global_store_b32 v[105:106], v98, off
	v_lshlrev_b64 v[93:94], 2, v[2:3]
	v_add_co_u32 v95, s2, s70, v107
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v96, s2, s71, v108, s2
	v_lshlrev_b32_e32 v2, 2, v32
	v_add_co_u32 v93, s2, s70, v93
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v94, s2, s71, v94, s2
	s_add_u32 s2, s72, s8
	s_addc_u32 s3, s73, s9
	s_clause 0x1
	global_store_b32 v[95:96], v99, off
	global_store_b32 v[93:94], v100, off
	s_clause 0x7
	global_load_b128 v[93:96], v2, s[2:3]
	global_load_b128 v[97:100], v2, s[2:3] offset:16
	global_load_b128 v[101:104], v2, s[2:3] offset:32
	global_load_b128 v[105:108], v2, s[2:3] offset:48
	global_load_b128 v[109:112], v2, s[2:3] offset:64
	global_load_b128 v[113:116], v2, s[2:3] offset:80
	global_load_b128 v[117:120], v2, s[2:3] offset:96
	global_load_b96 v[121:123], v2, s[2:3] offset:112
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v35, v93 offset:64
	ds_store_b32 v25, v94 offset:64
	ds_store_b32 v36, v95 offset:64
	ds_store_b32 v37, v96 offset:64
	ds_store_b32 v38, v97 offset:64
	ds_store_b32 v39, v98 offset:64
	ds_store_b32 v17, v99 offset:64
	ds_store_b32 v18, v100 offset:64
	ds_store_b32 v26, v101 offset:64
	ds_store_b32 v27, v102 offset:64
	ds_store_b32 v28, v103 offset:64
	ds_store_b32 v9, v104 offset:64
	ds_store_b32 v10, v105 offset:64
	ds_store_b32 v11, v106 offset:64
	ds_store_b32 v19, v107 offset:64
	ds_store_b32 v20, v108 offset:64
	ds_store_b32 v12, v109 offset:64
	ds_store_b32 v40, v110 offset:64
	ds_store_b32 v41, v111 offset:64
	ds_store_b32 v42, v112 offset:64
	ds_store_b32 v43, v113 offset:64
	ds_store_b32 v13, v114 offset:64
	ds_store_b32 v21, v115 offset:64
	ds_store_b32 v22, v116 offset:64
	ds_store_b32 v23, v117 offset:64
	ds_store_b32 v24, v118 offset:64
	ds_store_b32 v14, v119 offset:64
	ds_store_b32 v15, v120 offset:64
	ds_store_b32 v16, v121 offset:64
	ds_store_b32 v44, v122 offset:64
	ds_store_b32 v45, v123 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_stride64_b32 v[9:10], v4 offset0:8 offset1:16
	ds_load_2addr_stride64_b32 v[11:12], v4 offset0:24 offset1:32
	ds_load_2addr_stride64_b32 v[13:14], v4 offset0:40 offset1:48
	ds_load_b32 v32, v69 offset:64
	ds_load_b32 v2, v73
	ds_load_b32 v39, v72
	ds_load_b32 v45, v76
	ds_load_b32 v69, v71
	ds_load_b32 v71, v75
	ds_load_b32 v70, v70
	ds_load_b32 v72, v74
	ds_load_2addr_stride64_b32 v[15:16], v4 offset0:56 offset1:64
	ds_load_2addr_stride64_b32 v[17:18], v4 offset0:72 offset1:80
	ds_load_2addr_stride64_b32 v[19:20], v4 offset0:88 offset1:96
	ds_load_2addr_stride64_b32 v[21:22], v4 offset0:104 offset1:112
	ds_load_b32 v73, v57
	ds_load_b32 v66, v66
	ds_load_b32 v74, v56
	ds_load_b32 v65, v65
	ds_load_b32 v75, v55
	ds_load_b32 v76, v64
	ds_load_b32 v93, v54
	ds_load_b32 v94, v63
	ds_load_2addr_stride64_b32 v[23:24], v4 offset0:120 offset1:128
	ds_load_2addr_stride64_b32 v[25:26], v4 offset0:136 offset1:144
	ds_load_2addr_stride64_b32 v[27:28], v4 offset0:152 offset1:160
	ds_load_2addr_stride64_b32 v[35:36], v4 offset0:168 offset1:176
	s_waitcnt lgkmcnt(22)
	v_add_nc_u32_e32 v2, v2, v0
	ds_load_b32 v78, v78
	ds_load_b32 v79, v79
	ds_load_b32 v80, v80
	ds_load_b32 v89, v89
	ds_load_b32 v90, v90
	ds_load_b32 v91, v91
	ds_load_b32 v92, v92
	ds_load_b32 v83, v83
	v_lshlrev_b64 v[37:38], 2, v[2:3]
	s_waitcnt lgkmcnt(29)
	v_add_nc_u32_e32 v2, v39, v52
	ds_load_2addr_stride64_b32 v[39:40], v4 offset0:184 offset1:192
	ds_load_2addr_stride64_b32 v[41:42], v4 offset0:200 offset1:208
	ds_load_2addr_stride64_b32 v[43:44], v4 offset0:216 offset1:224
	ds_load_2addr_stride64_b32 v[54:55], v4 offset0:232 offset1:240
	v_lshlrev_b64 v[56:57], 2, v[2:3]
	s_waitcnt lgkmcnt(32)
	v_add_nc_u32_e32 v2, v45, v49
	v_add_co_u32 v37, s2, s74, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v38, s2, s75, v38, s2
	v_lshlrev_b64 v[63:64], 2, v[2:3]
	s_waitcnt lgkmcnt(31)
	v_add_nc_u32_e32 v2, v69, v48
	v_add_co_u32 v48, s2, s74, v56
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v49, s2, s75, v57, s2
	ds_load_b32 v45, v124
	ds_load_b32 v52, v125
	ds_load_b32 v69, v126
	ds_load_b32 v95, v127
	ds_load_b32 v96, v128
	ds_load_b32 v97, v129
	ds_load_b32 v98, v130
	ds_load_b32 v99, v131
	global_store_b32 v[37:38], v32, off
	v_lshlrev_b64 v[37:38], 2, v[2:3]
	s_waitcnt lgkmcnt(38)
	v_add_nc_u32_e32 v2, v71, v6
	global_store_b32 v[48:49], v9, off
	v_add_co_u32 v48, s2, s74, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v49, s2, s75, v64, s2
	v_lshlrev_b64 v[56:57], 2, v[2:3]
	s_waitcnt lgkmcnt(37)
	v_add_nc_u32_e32 v2, v70, v5
	v_add_co_u32 v4, s2, s74, v37
	v_add_co_ci_u32_e64 v5, s2, s75, v38, s2
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[37:38], 2, v[2:3]
	s_waitcnt lgkmcnt(36)
	v_add_nc_u32_e32 v2, v72, v29
	s_clause 0x1
	global_store_b32 v[48:49], v10, off
	global_store_b32 v[4:5], v11, off
	v_add_co_u32 v56, s2, s74, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v57, s2, s75, v57, s2
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(31)
	v_add_nc_u32_e32 v2, v73, v7
	v_add_co_u32 v6, s2, s74, v37
	v_add_co_ci_u32_e64 v7, s2, s75, v38, s2
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[9:10], 2, v[2:3]
	s_waitcnt lgkmcnt(30)
	v_add_nc_u32_e32 v2, v66, v8
	v_add_co_u32 v4, s2, s74, v4
	global_store_b32 v[56:57], v12, off
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	v_lshlrev_b64 v[11:12], 2, v[2:3]
	s_waitcnt lgkmcnt(29)
	v_add_nc_u32_e32 v2, v74, v46
	v_add_co_u32 v8, s2, s74, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s2, s75, v10, s2
	s_clause 0x1
	global_store_b32 v[6:7], v13, off
	global_store_b32 v[4:5], v14, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(28)
	v_add_nc_u32_e32 v2, v65, v30
	global_store_b32 v[8:9], v15, off
	v_add_co_u32 v6, s2, s74, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v12, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(27)
	v_add_nc_u32_e32 v2, v75, v31
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(26)
	v_add_nc_u32_e32 v2, v76, v47
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v16, off
	global_store_b32 v[4:5], v17, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(25)
	v_add_nc_u32_e32 v2, v93, v50
	global_store_b32 v[8:9], v18, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(24)
	v_add_nc_u32_e32 v2, v94, v51
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(19)
	v_add_nc_u32_e32 v2, v78, v53
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v19, off
	global_store_b32 v[4:5], v20, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(18)
	v_add_nc_u32_e32 v2, v79, v59
	global_store_b32 v[8:9], v21, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(17)
	v_add_nc_u32_e32 v2, v80, v58
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(16)
	v_add_nc_u32_e32 v2, v89, v60
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v22, off
	global_store_b32 v[4:5], v23, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(15)
	v_add_nc_u32_e32 v2, v90, v62
	global_store_b32 v[8:9], v24, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(14)
	v_add_nc_u32_e32 v2, v91, v61
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(13)
	v_add_nc_u32_e32 v2, v92, v68
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v25, off
	global_store_b32 v[4:5], v26, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(12)
	v_add_nc_u32_e32 v2, v83, v67
	global_store_b32 v[8:9], v27, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v2, v45, v77
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v52, v81
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v28, off
	global_store_b32 v[4:5], v35, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v69, v84
	global_store_b32 v[8:9], v36, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v95, v82
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v96, v85
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v39, off
	global_store_b32 v[4:5], v40, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v2, v97, v86
	global_store_b32 v[8:9], v41, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v98, v87
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v99, v88
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v10, s2, s74, v10
	v_add_co_ci_u32_e64 v11, s2, s75, v11, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s2, s74, v2
	v_add_co_ci_u32_e64 v3, s2, s75, v3, s2
	s_clause 0x4
	global_store_b32 v[6:7], v42, off
	global_store_b32 v[4:5], v43, off
	global_store_b32 v[8:9], v44, off
	global_store_b32 v[10:11], v54, off
	global_store_b32 v[2:3], v55, off
	s_load_b32 s0, s[0:1], 0x50
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s0
	s_cselect_b32 s0, -1, 0
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
; %bb.365:
	v_add_nc_u32_e32 v2, v33, v34
	s_or_b32 s7, s7, exec_lo
; %bb.366:                              ; %Flow167
	s_or_b32 exec_lo, exec_lo, s0
.LBB61_367:                             ; %Flow166
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB61_369
; %bb.368:                              ; %_ZN7rocprim6detail25onesweep_iteration_helperIjjjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EN6thrust10device_ptrIjEEPjS8_S9_EEvT0_T1_T2_T3_S9_S9_PNS0_23onesweep_lookback_stateES3_jjjRNS4_13storage_type_E.exit.sink.split.i
	v_lshlrev_b32_e32 v3, 2, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	ds_load_b32 v3, v3
	v_add_co_u32 v0, vcc_lo, s78, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s79, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB61_369:                             ; %_ZN7rocprim6detail18onesweep_iterationILj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0EN6thrust10device_ptrIjEEPjS5_S6_jNS_19identity_decomposerEEEvT4_T5_T6_T7_jPT8_SD_PNS0_23onesweep_lookback_stateET9_jjj.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
		.amdhsa_group_segment_fixed_size 63552
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 132
		.amdhsa_next_free_sgpr 88
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
.Lfunc_end61:
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end61-_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EN6thrust10device_ptrIjEEPjS7_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 24956
; NumSgprs: 90
; NumVgprs: 132
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 63552 bytes/workgroup (compile time only)
; SGPRBlocks: 11
; VGPRBlocks: 16
; NumSGPRsForWavesPerEU: 90
; NumVGPRsForWavesPerEU: 132
; Occupancy: 8
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
	.protected	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj ; -- Begin function _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.globl	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
	.p2align	8
	.type	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,@function
_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj: ; @_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
; %bb.0:
	s_clause 0x3
	s_load_b128 s[80:83], s[0:1], 0x44
	s_load_b256 s[68:75], s[0:1], 0x0
	s_load_b128 s[76:79], s[0:1], 0x28
	s_load_b64 s[84:85], s[0:1], 0x38
	v_mul_u32_u24_e32 v32, 31, v0
	s_mul_i32 s86, s15, 0x3e00
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_u32 s15, s82
	s_cbranch_scc0 .LBB62_337
; %bb.1:
	s_load_b32 s2, s[0:1], 0x20
	s_mov_b32 s87, 0
	s_mul_i32 s66, s82, 0xffffc200
	v_dual_mov_b32 v4, -1 :: v_dual_lshlrev_b32 v9, 2, v32
	s_lshl_b64 s[82:83], s[86:87], 2
	v_mov_b32_e32 v3, -1
	s_waitcnt lgkmcnt(0)
	s_add_i32 s66, s66, s2
	s_add_u32 s3, s68, s82
	s_addc_u32 s4, s69, s83
	v_add_co_u32 v1, s3, s3, v9
	v_cmp_gt_u32_e64 s2, s66, v32
	v_add_co_ci_u32_e64 v2, null, s4, 0, s3
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB62_3
; %bb.2:
	global_load_b32 v4, v[1:2], off
.LBB62_3:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v5, 1, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s66, v5
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB62_5
; %bb.4:
	global_load_b32 v3, v[1:2], off offset:4
.LBB62_5:
	s_or_b32 exec_lo, exec_lo, s4
	v_dual_mov_b32 v5, -1 :: v_dual_add_nc_u32 v6, 2, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e64 s4, s66, v6
	v_mov_b32_e32 v6, -1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB62_7
; %bb.6:
	global_load_b32 v6, v[1:2], off offset:8
.LBB62_7:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v7, 3, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s66, v7
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB62_9
; %bb.8:
	global_load_b32 v5, v[1:2], off offset:12
.LBB62_9:
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v16, -1 :: v_dual_add_nc_u32 v7, 4, v32
	v_mov_b32_e32 v17, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s6, s66, v7
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB62_11
; %bb.10:
	global_load_b32 v17, v[1:2], off offset:16
.LBB62_11:
	s_or_b32 exec_lo, exec_lo, s7
	v_add_nc_u32_e32 v7, 5, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s7, s66, v7
	s_and_saveexec_b32 s8, s7
	s_cbranch_execz .LBB62_13
; %bb.12:
	global_load_b32 v16, v[1:2], off offset:20
.LBB62_13:
	s_or_b32 exec_lo, exec_lo, s8
	v_dual_mov_b32 v22, -1 :: v_dual_add_nc_u32 v7, 6, v32
	v_mov_b32_e32 v21, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s8, s66, v7
	s_and_saveexec_b32 s9, s8
	s_cbranch_execz .LBB62_15
; %bb.14:
	global_load_b32 v22, v[1:2], off offset:24
.LBB62_15:
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v7, 7, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s9, s66, v7
	s_and_saveexec_b32 s10, s9
	s_cbranch_execz .LBB62_17
; %bb.16:
	global_load_b32 v21, v[1:2], off offset:28
.LBB62_17:
	s_or_b32 exec_lo, exec_lo, s10
	v_dual_mov_b32 v24, -1 :: v_dual_add_nc_u32 v7, 8, v32
	v_mov_b32_e32 v23, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s10, s66, v7
	s_and_saveexec_b32 s11, s10
	s_cbranch_execz .LBB62_19
; %bb.18:
	global_load_b32 v24, v[1:2], off offset:32
.LBB62_19:
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v7, 9, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s11, s66, v7
	s_and_saveexec_b32 s12, s11
	s_cbranch_execz .LBB62_21
; %bb.20:
	global_load_b32 v23, v[1:2], off offset:36
.LBB62_21:
	s_or_b32 exec_lo, exec_lo, s12
	v_dual_mov_b32 v26, -1 :: v_dual_add_nc_u32 v7, 10, v32
	v_mov_b32_e32 v25, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s12, s66, v7
	s_and_saveexec_b32 s13, s12
	s_cbranch_execz .LBB62_23
; %bb.22:
	global_load_b32 v25, v[1:2], off offset:40
.LBB62_23:
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v7, 11, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s13, s66, v7
	s_and_saveexec_b32 s14, s13
	s_cbranch_execz .LBB62_25
; %bb.24:
	global_load_b32 v26, v[1:2], off offset:44
.LBB62_25:
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v28, -1 :: v_dual_add_nc_u32 v7, 12, v32
	v_mov_b32_e32 v27, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s14, s66, v7
	s_and_saveexec_b32 s16, s14
	s_cbranch_execz .LBB62_27
; %bb.26:
	global_load_b32 v28, v[1:2], off offset:48
.LBB62_27:
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v7, 13, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s16, s66, v7
	s_and_saveexec_b32 s17, s16
	s_cbranch_execz .LBB62_29
; %bb.28:
	global_load_b32 v27, v[1:2], off offset:52
.LBB62_29:
	s_or_b32 exec_lo, exec_lo, s17
	v_dual_mov_b32 v30, -1 :: v_dual_add_nc_u32 v7, 14, v32
	v_mov_b32_e32 v29, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s17, s66, v7
	s_and_saveexec_b32 s18, s17
	s_cbranch_execz .LBB62_31
; %bb.30:
	global_load_b32 v30, v[1:2], off offset:56
.LBB62_31:
	s_or_b32 exec_lo, exec_lo, s18
	v_add_nc_u32_e32 v7, 15, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s18, s66, v7
	s_and_saveexec_b32 s19, s18
	s_cbranch_execz .LBB62_33
; %bb.32:
	global_load_b32 v29, v[1:2], off offset:60
.LBB62_33:
	s_or_b32 exec_lo, exec_lo, s19
	v_add_nc_u32_e32 v7, 16, v32
	v_mov_b32_e32 v31, -1
	v_mov_b32_e32 v33, -1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s19, s66, v7
	s_and_saveexec_b32 s20, s19
	s_cbranch_execz .LBB62_35
; %bb.34:
	global_load_b32 v33, v[1:2], off offset:64
.LBB62_35:
	s_or_b32 exec_lo, exec_lo, s20
	v_add_nc_u32_e32 v7, 17, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s20, s66, v7
	s_and_saveexec_b32 s21, s20
	s_cbranch_execz .LBB62_37
; %bb.36:
	global_load_b32 v31, v[1:2], off offset:68
.LBB62_37:
	s_or_b32 exec_lo, exec_lo, s21
	v_dual_mov_b32 v34, -1 :: v_dual_add_nc_u32 v7, 18, v32
	v_mov_b32_e32 v35, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s21, s66, v7
	s_and_saveexec_b32 s22, s21
	s_cbranch_execz .LBB62_39
; %bb.38:
	global_load_b32 v35, v[1:2], off offset:72
.LBB62_39:
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v7, 19, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s22, s66, v7
	s_and_saveexec_b32 s23, s22
	s_cbranch_execz .LBB62_41
; %bb.40:
	global_load_b32 v34, v[1:2], off offset:76
.LBB62_41:
	s_or_b32 exec_lo, exec_lo, s23
	v_dual_mov_b32 v36, -1 :: v_dual_add_nc_u32 v7, 20, v32
	v_mov_b32_e32 v37, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s23, s66, v7
	s_and_saveexec_b32 s24, s23
	s_cbranch_execz .LBB62_43
; %bb.42:
	global_load_b32 v36, v[1:2], off offset:80
.LBB62_43:
	s_or_b32 exec_lo, exec_lo, s24
	v_add_nc_u32_e32 v7, 21, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s24, s66, v7
	s_and_saveexec_b32 s25, s24
	s_cbranch_execz .LBB62_45
; %bb.44:
	global_load_b32 v37, v[1:2], off offset:84
.LBB62_45:
	s_or_b32 exec_lo, exec_lo, s25
	v_dual_mov_b32 v38, -1 :: v_dual_add_nc_u32 v7, 22, v32
	v_mov_b32_e32 v39, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s25, s66, v7
	s_and_saveexec_b32 s26, s25
	s_cbranch_execz .LBB62_47
; %bb.46:
	global_load_b32 v39, v[1:2], off offset:88
.LBB62_47:
	s_or_b32 exec_lo, exec_lo, s26
	v_add_nc_u32_e32 v7, 23, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s26, s66, v7
	s_and_saveexec_b32 s27, s26
	s_cbranch_execz .LBB62_49
; %bb.48:
	global_load_b32 v38, v[1:2], off offset:92
.LBB62_49:
	s_or_b32 exec_lo, exec_lo, s27
	v_dual_mov_b32 v40, -1 :: v_dual_add_nc_u32 v7, 24, v32
	v_mov_b32_e32 v41, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s27, s66, v7
	s_and_saveexec_b32 s28, s27
	s_cbranch_execz .LBB62_51
; %bb.50:
	global_load_b32 v41, v[1:2], off offset:96
.LBB62_51:
	s_or_b32 exec_lo, exec_lo, s28
	v_add_nc_u32_e32 v7, 25, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s28, s66, v7
	s_and_saveexec_b32 s29, s28
	s_cbranch_execz .LBB62_53
; %bb.52:
	global_load_b32 v40, v[1:2], off offset:100
.LBB62_53:
	s_or_b32 exec_lo, exec_lo, s29
	v_dual_mov_b32 v42, -1 :: v_dual_add_nc_u32 v7, 26, v32
	v_mov_b32_e32 v43, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s29, s66, v7
	s_and_saveexec_b32 s30, s29
	s_cbranch_execz .LBB62_55
; %bb.54:
	global_load_b32 v43, v[1:2], off offset:104
.LBB62_55:
	s_or_b32 exec_lo, exec_lo, s30
	v_add_nc_u32_e32 v7, 27, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s30, s66, v7
	s_and_saveexec_b32 s31, s30
	s_cbranch_execz .LBB62_57
; %bb.56:
	global_load_b32 v42, v[1:2], off offset:108
.LBB62_57:
	s_or_b32 exec_lo, exec_lo, s31
	v_dual_mov_b32 v44, -1 :: v_dual_add_nc_u32 v7, 28, v32
	v_mov_b32_e32 v45, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s31, s66, v7
	s_and_saveexec_b32 s33, s31
	s_cbranch_execz .LBB62_59
; %bb.58:
	global_load_b32 v45, v[1:2], off offset:112
.LBB62_59:
	s_or_b32 exec_lo, exec_lo, s33
	v_add_nc_u32_e32 v7, 29, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s33, s66, v7
	s_and_saveexec_b32 s34, s33
	s_cbranch_execz .LBB62_61
; %bb.60:
	global_load_b32 v44, v[1:2], off offset:116
.LBB62_61:
	s_or_b32 exec_lo, exec_lo, s34
	v_dual_mov_b32 v46, -1 :: v_dual_add_nc_u32 v7, 30, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s34, s66, v7
	s_and_saveexec_b32 s35, s34
	s_cbranch_execz .LBB62_63
; %bb.62:
	global_load_b32 v46, v[1:2], off offset:120
.LBB62_63:                              ; %_ZN7rocprim25block_load_direct_blockedIPjjLj31EjEEvjT_RAT1__T0_jT2_.exit.i.i
	s_or_b32 exec_lo, exec_lo, s35
	v_or_b32_e32 v1, 0xfffffe00, v0
	v_dual_mov_b32 v7, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_mov_b32 s35, 0
.LBB62_64:                              ; %.lr.ph.i.i.i.i.i.i23.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v1, 0x200, v1
	ds_store_b32 v2, v7
	v_add_nc_u32_e32 v2, 0x800, v2
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v1
	s_or_b32 s35, vcc_lo, s35
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB62_64
; %bb.65:                               ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i25.i
	s_or_b32 exec_lo, exec_lo, s35
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_lshl_b32 s35, -1, s81
	v_lshrrev_b32_e32 v11, s80, v6
	s_not_b32 s67, s35
	s_mov_b32 s39, exec_lo
	v_and_b32_e32 v1, s67, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v2, 9, v1
	v_lshrrev_b32_e32 v1, 3, v1
	v_and_or_b32 v2, 0xe00, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v2
	v_add_lshl_u32 v7, v2, v1, 1
	v_lshrrev_b32_e32 v2, s80, v3
	ds_load_u16 v1, v7
	v_and_b32_e32 v2, s67, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 9, v2
	v_lshrrev_b32_e32 v2, 3, v2
	v_and_or_b32 v8, 0xe00, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v8, 1, v8
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v10, v1, 1
	v_add_lshl_u32 v8, v8, v2, 1
	ds_store_b16 v7, v10
	ds_load_u16 v2, v8
	v_and_b32_e32 v10, s67, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 9, v10
	v_lshrrev_b32_e32 v10, 3, v10
	v_and_or_b32 v11, 0xe00, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v11, 1, v11
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v12, v2, 1
	v_add_lshl_u32 v18, v11, v10, 1
	v_lshrrev_b32_e32 v11, s80, v5
	ds_store_b16 v8, v12
	ds_load_u16 v10, v18
	v_and_b32_e32 v11, s67, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 9, v11
	v_lshrrev_b32_e32 v11, 3, v11
	v_and_or_b32 v12, 0xe00, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 1, v12
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v13, v10, 1
	v_add_lshl_u32 v20, v12, v11, 1
	v_lshrrev_b32_e32 v12, s80, v17
	ds_store_b16 v18, v13
	ds_load_u16 v11, v20
	v_and_b32_e32 v12, s67, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 9, v12
	v_lshrrev_b32_e32 v12, 3, v12
	v_and_or_b32 v13, 0xe00, v13, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 1, v13
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v14, v11, 1
	v_add_lshl_u32 v48, v13, v12, 1
	v_lshrrev_b32_e32 v13, s80, v16
	ds_store_b16 v20, v14
	ds_load_u16 v12, v48
	v_and_b32_e32 v13, s67, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 9, v13
	v_lshrrev_b32_e32 v13, 3, v13
	v_and_or_b32 v14, 0xe00, v14, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v14, 1, v14
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v15, v12, 1
	v_add_lshl_u32 v50, v14, v13, 1
	v_lshrrev_b32_e32 v14, s80, v22
	ds_store_b16 v48, v15
	ds_load_u16 v13, v50
	v_and_b32_e32 v14, s67, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v15, 9, v14
	v_lshrrev_b32_e32 v14, 3, v14
	v_and_or_b32 v15, 0xe00, v15, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v15, 1, v15
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v19, v13, 1
	v_add_lshl_u32 v52, v15, v14, 1
	v_lshrrev_b32_e32 v15, s80, v21
	ds_store_b16 v50, v19
	ds_load_u16 v14, v52
	v_and_b32_e32 v15, s67, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v19, 9, v15
	v_lshrrev_b32_e32 v15, 3, v15
	v_and_or_b32 v19, 0xe00, v19, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v19, 1, v19
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v47, v14, 1
	v_add_lshl_u32 v54, v19, v15, 1
	v_lshrrev_b32_e32 v19, s80, v24
	ds_store_b16 v52, v47
	ds_load_u16 v15, v54
	v_and_b32_e32 v19, s67, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v47, 9, v19
	v_lshrrev_b32_e32 v19, 3, v19
	v_and_or_b32 v47, 0xe00, v47, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v47, 1, v47
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v49, v15, 1
	v_add_lshl_u32 v56, v47, v19, 1
	v_lshrrev_b32_e32 v47, s80, v23
	ds_store_b16 v54, v49
	ds_load_u16 v19, v56
	v_and_b32_e32 v47, s67, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v49, 9, v47
	v_lshrrev_b32_e32 v47, 3, v47
	v_and_or_b32 v49, 0xe00, v49, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v49, 1, v49
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v51, v19, 1
	v_add_lshl_u32 v58, v49, v47, 1
	v_lshrrev_b32_e32 v49, s80, v25
	ds_store_b16 v56, v51
	ds_load_u16 v47, v58
	v_and_b32_e32 v49, s67, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v51, 9, v49
	v_lshrrev_b32_e32 v49, 3, v49
	v_and_or_b32 v51, 0xe00, v51, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v51, 1, v51
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v53, v47, 1
	v_add_lshl_u32 v60, v51, v49, 1
	v_lshrrev_b32_e32 v51, s80, v26
	ds_store_b16 v58, v53
	ds_load_u16 v49, v60
	v_and_b32_e32 v51, s67, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v53, 9, v51
	v_lshrrev_b32_e32 v51, 3, v51
	v_and_or_b32 v53, 0xe00, v53, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v53, 1, v53
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v55, v49, 1
	v_add_lshl_u32 v62, v53, v51, 1
	v_lshrrev_b32_e32 v53, s80, v28
	ds_store_b16 v60, v55
	ds_load_u16 v51, v62
	v_and_b32_e32 v53, s67, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v55, 9, v53
	v_lshrrev_b32_e32 v53, 3, v53
	v_and_or_b32 v55, 0xe00, v55, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v55, 1, v55
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v57, v51, 1
	v_add_lshl_u32 v64, v55, v53, 1
	v_lshrrev_b32_e32 v55, s80, v27
	ds_store_b16 v62, v57
	ds_load_u16 v53, v64
	v_and_b32_e32 v55, s67, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v57, 9, v55
	v_lshrrev_b32_e32 v55, 3, v55
	v_and_or_b32 v57, 0xe00, v57, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v57, 1, v57
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v59, v53, 1
	v_add_lshl_u32 v66, v57, v55, 1
	v_lshrrev_b32_e32 v57, s80, v30
	ds_store_b16 v64, v59
	ds_load_u16 v55, v66
	v_and_b32_e32 v57, s67, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v59, 9, v57
	v_lshrrev_b32_e32 v57, 3, v57
	v_and_or_b32 v59, 0xe00, v59, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v59, 1, v59
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v61, v55, 1
	v_add_lshl_u32 v68, v59, v57, 1
	v_lshrrev_b32_e32 v59, s80, v29
	ds_store_b16 v66, v61
	ds_load_u16 v57, v68
	v_and_b32_e32 v59, s67, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v61, 9, v59
	v_lshrrev_b32_e32 v59, 3, v59
	v_and_or_b32 v61, 0xe00, v61, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v61, 1, v61
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v63, v57, 1
	v_add_lshl_u32 v70, v61, v59, 1
	v_lshrrev_b32_e32 v61, s80, v33
	ds_store_b16 v68, v63
	ds_load_u16 v59, v70
	v_and_b32_e32 v61, s67, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v63, 9, v61
	v_lshrrev_b32_e32 v61, 3, v61
	v_and_or_b32 v63, 0xe00, v63, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v63, 1, v63
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v65, v59, 1
	v_add_lshl_u32 v72, v63, v61, 1
	v_lshrrev_b32_e32 v63, s80, v31
	ds_store_b16 v70, v65
	ds_load_u16 v61, v72
	v_and_b32_e32 v63, s67, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v65, 9, v63
	v_lshrrev_b32_e32 v63, 3, v63
	v_and_or_b32 v65, 0xe00, v65, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v65, 1, v65
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v67, v61, 1
	v_add_lshl_u32 v74, v65, v63, 1
	v_lshrrev_b32_e32 v65, s80, v35
	ds_store_b16 v72, v67
	ds_load_u16 v63, v74
	v_and_b32_e32 v65, s67, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v67, 9, v65
	v_lshrrev_b32_e32 v65, 3, v65
	v_and_or_b32 v67, 0xe00, v67, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v67, 1, v67
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v69, v63, 1
	v_add_lshl_u32 v76, v67, v65, 1
	v_lshrrev_b32_e32 v67, s80, v34
	ds_store_b16 v74, v69
	ds_load_u16 v65, v76
	v_and_b32_e32 v67, s67, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v69, 9, v67
	v_lshrrev_b32_e32 v67, 3, v67
	v_and_or_b32 v69, 0xe00, v69, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v69, 1, v69
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v71, v65, 1
	v_add_lshl_u32 v78, v69, v67, 1
	v_lshrrev_b32_e32 v69, s80, v36
	ds_store_b16 v76, v71
	ds_load_u16 v67, v78
	v_and_b32_e32 v69, s67, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v71, 9, v69
	v_lshrrev_b32_e32 v69, 3, v69
	v_and_or_b32 v71, 0xe00, v71, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v71, 1, v71
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v73, v67, 1
	v_add_lshl_u32 v80, v71, v69, 1
	v_lshrrev_b32_e32 v71, s80, v37
	ds_store_b16 v78, v73
	ds_load_u16 v69, v80
	v_and_b32_e32 v71, s67, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v73, 9, v71
	v_lshrrev_b32_e32 v71, 3, v71
	v_and_or_b32 v73, 0xe00, v73, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v73, 1, v73
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v75, v69, 1
	v_add_lshl_u32 v82, v73, v71, 1
	v_lshrrev_b32_e32 v73, s80, v39
	ds_store_b16 v80, v75
	ds_load_u16 v71, v82
	v_and_b32_e32 v73, s67, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v75, 9, v73
	v_lshrrev_b32_e32 v73, 3, v73
	v_and_or_b32 v75, 0xe00, v75, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v75, 1, v75
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v77, v71, 1
	v_add_lshl_u32 v84, v75, v73, 1
	v_lshrrev_b32_e32 v75, s80, v38
	ds_store_b16 v82, v77
	ds_load_u16 v73, v84
	v_and_b32_e32 v75, s67, v75
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v77, 9, v75
	v_lshrrev_b32_e32 v75, 3, v75
	v_and_or_b32 v77, 0xe00, v77, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v77, 1, v77
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v79, v73, 1
	v_add_lshl_u32 v86, v77, v75, 1
	v_lshrrev_b32_e32 v77, s80, v41
	ds_store_b16 v84, v79
	ds_load_u16 v75, v86
	v_and_b32_e32 v77, s67, v77
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v79, 9, v77
	v_lshrrev_b32_e32 v77, 3, v77
	v_and_or_b32 v79, 0xe00, v79, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v79, 1, v79
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v81, v75, 1
	v_add_lshl_u32 v88, v79, v77, 1
	v_lshrrev_b32_e32 v79, s80, v40
	ds_store_b16 v86, v81
	ds_load_u16 v77, v88
	v_and_b32_e32 v79, s67, v79
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v81, 9, v79
	v_lshrrev_b32_e32 v79, 3, v79
	v_and_or_b32 v81, 0xe00, v81, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v81, 1, v81
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v83, v77, 1
	v_add_lshl_u32 v90, v81, v79, 1
	v_lshrrev_b32_e32 v81, s80, v43
	ds_store_b16 v88, v83
	ds_load_u16 v79, v90
	v_and_b32_e32 v81, s67, v81
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v83, 9, v81
	v_lshrrev_b32_e32 v81, 3, v81
	v_and_or_b32 v83, 0xe00, v83, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v83, 1, v83
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v85, v79, 1
	v_add_lshl_u32 v91, v83, v81, 1
	v_lshrrev_b32_e32 v83, s80, v42
	ds_store_b16 v90, v85
	ds_load_u16 v81, v91
	v_and_b32_e32 v83, s67, v83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v85, 9, v83
	v_lshrrev_b32_e32 v83, 3, v83
	v_and_or_b32 v85, 0xe00, v85, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v85, 1, v85
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v87, v81, 1
	v_add_lshl_u32 v92, v85, v83, 1
	v_lshrrev_b32_e32 v85, s80, v45
	ds_store_b16 v91, v87
	ds_load_u16 v83, v92
	v_and_b32_e32 v85, s67, v85
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v87, 9, v85
	v_lshrrev_b32_e32 v85, 3, v85
	v_and_or_b32 v87, 0xe00, v87, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v87, 1, v87
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v89, v83, 1
	v_add_lshl_u32 v93, v87, v85, 1
	v_lshrrev_b32_e32 v87, s80, v44
	ds_store_b16 v92, v89
	ds_load_u16 v85, v93
	v_and_b32_e32 v87, s67, v87
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v89, 9, v87
	v_lshrrev_b32_e32 v87, 3, v87
	v_and_or_b32 v89, 0xe00, v89, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v89, 1, v89
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v85, 1
	v_add_lshl_u32 v94, v89, v87, 1
	v_lshrrev_b32_e32 v89, s80, v46
	ds_store_b16 v93, v95
	ds_load_u16 v87, v94
	v_and_b32_e32 v89, s67, v89
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v95, 9, v89
	v_lshrrev_b32_e32 v89, 3, v89
	v_and_or_b32 v95, 0xe00, v95, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v95, 1, v95
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v87, 1
	v_add_lshl_u32 v95, v95, v89, 1
	ds_store_b16 v94, v96
	ds_load_u16 v89, v95
	v_lshlrev_b32_e32 v96, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v97, v89, 1
	ds_store_b16 v95, v97
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[97:100], v96 offset1:1
	ds_load_2addr_b64 v[101:104], v96 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v97, v98, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v97, v97, v99, v100
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v98, v97, v101, v102
	v_mbcnt_lo_u32_b32 v97, -1, 0
	v_or_b32_e32 v101, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v98, v98, v103, v104
	v_and_b32_e32 v99, 15, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v100, v98 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s35, 0, v99
	v_cmp_lt_u32_e64 s36, 1, v99
	v_cmp_lt_u32_e64 s37, 3, v99
	v_cmp_lt_u32_e64 s38, 7, v99
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v100, v100, 0, s35
	v_add_nc_u32_e32 v98, v100, v98
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v100, v98 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v100, 0, v100, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v98, v98, v100
	v_mov_b32_dpp v100, v98 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v100, 0, v100, s37
	v_add_nc_u32_e32 v98, v98, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v100, v98 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v100, s38
	v_bfe_i32 v100, v97, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v98, v98, v99
	ds_swizzle_b32 v99, v98 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v99, v100, v99
	v_lshrrev_b32_e32 v100, 5, v0
	v_add_nc_u32_e32 v98, v98, v99
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v99, 2, v100
	v_cmpx_eq_u32_e64 v101, v0
	s_cbranch_execz .LBB62_67
; %bb.66:
	ds_store_b32 v99, v98 offset:16384
.LBB62_67:
	s_or_b32 exec_lo, exec_lo, s39
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s39, vcc_lo
	s_cbranch_execz .LBB62_69
; %bb.68:
	v_mad_i32_i24 v100, 0xffffffe4, v0, v96
	ds_load_b32 v101, v100 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v102, v101 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v102, v102, 0, s35
	v_add_nc_u32_e32 v101, v102, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v102, v101 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v102, 0, v102, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v101, v102
	v_mov_b32_dpp v102, v101 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v102, 0, v102, s37
	v_add_nc_u32_e32 v101, v101, v102
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v102, v101 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v102, 0, v102, s38
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v101, v102
	ds_store_b32 v100, v101 offset:16384
.LBB62_69:                              ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i34.i
	s_or_b32 exec_lo, exec_lo, s39
	v_dual_mov_b32 v101, 0 :: v_dual_mov_b32 v100, 0
	s_mov_b32 s36, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB62_71
; %bb.70:
	ds_load_b32 v100, v99 offset:16380
.LBB62_71:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjjjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb0EPjN6thrust10device_ptrIjEES9_SC_EEvT0_T1_T2_T3_S9_S9_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESE_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s36
	v_add_nc_u32_e32 v99, -1, v97
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v98, v100, v98
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s35, 0, v99
	v_cndmask_b32_e64 v99, v99, v97, s35
	v_cmp_eq_u32_e64 s35, 0, v97
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v99, 2, v99
	ds_bpermute_b32 v98, v99, v98
	ds_load_b32 v99, v101 offset:16444
	ds_load_2addr_b64 v[101:104], v96 offset1:1
	ds_load_b32 v105, v96 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v97, v98, v100, s35
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v97, v99, 16, v97
	ds_load_b64 v[99:100], v96 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v98, v97, v101
	v_add_nc_u32_e32 v101, v102, v98
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v102, v103, v101
	v_add_nc_u32_e32 v103, v104, v102
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v104, v99, v103
	v_add_nc_u32_e32 v99, v100, v104
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v105, v99
	ds_store_2addr_b64 v96, v[97:98], v[101:102] offset1:1
	ds_store_2addr_b64 v96, v[103:104], v[99:100] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v96, v7
	ds_load_u16 v97, v8
	ds_load_u16 v98, v18
	ds_load_u16 v20, v20
	ds_load_u16 v48, v48
	ds_load_u16 v50, v50
	ds_load_u16 v52, v52
	ds_load_u16 v54, v54
	ds_load_u16 v56, v56
	ds_load_u16 v58, v58
	ds_load_u16 v60, v60
	ds_load_u16 v62, v62
	ds_load_u16 v64, v64
	ds_load_u16 v66, v66
	ds_load_u16 v68, v68
	ds_load_u16 v70, v70
	ds_load_u16 v72, v72
	ds_load_u16 v74, v74
	ds_load_u16 v76, v76
	ds_load_u16 v78, v78
	ds_load_u16 v80, v80
	ds_load_u16 v82, v82
	ds_load_u16 v84, v84
	ds_load_u16 v86, v86
	ds_load_u16 v88, v88
	ds_load_u16 v90, v90
	ds_load_u16 v91, v91
	ds_load_u16 v92, v92
	ds_load_u16 v93, v93
	ds_load_u16 v94, v94
	ds_load_u16 v18, v95
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB62_75
; %bb.72:
	v_lshrrev_b32_e32 v7, 3, v0
	v_lshlrev_b32_e32 v8, 10, v0
	v_add_nc_u32_e32 v95, 1, v0
	s_mov_b32 s37, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v7, 0x1c00, v8, v7
	v_dual_mov_b32 v8, 0x3e00 :: v_dual_lshlrev_b32 v7, 1, v7
	ds_load_u16 v7, v7
	v_cmpx_ne_u32_e32 16, v95
	s_cbranch_execz .LBB62_74
; %bb.73:
	v_lshlrev_b32_e32 v8, 10, v95
	v_lshrrev_b32_e32 v95, 3, v95
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v8, 0x1c00, v8, v95
	v_lshlrev_b32_e32 v8, 1, v8
	ds_load_u16 v8, v8
.LBB62_74:
	s_or_b32 exec_lo, exec_lo, s37
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v7, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v8, v7
.LBB62_75:                              ; %Flow154
	s_or_b32 exec_lo, exec_lo, s36
	v_and_b32_e32 v1, 0xffff, v1
	v_and_b32_e32 v2, 0xffff, v2
	v_and_b32_e32 v95, 0xffff, v10
	v_and_b32_e32 v99, 0xffff, v11
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v10, 0xffff, v96
	s_waitcnt lgkmcnt(29)
	v_and_b32_e32 v11, 0xffff, v97
	v_and_b32_e32 v100, 0xffff, v12
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v12, 0xffff, v98
	v_and_b32_e32 v101, 0xffff, v13
	s_waitcnt lgkmcnt(27)
	v_and_b32_e32 v13, 0xffff, v20
	v_and_b32_e32 v102, 0xffff, v14
	s_waitcnt lgkmcnt(26)
	v_and_b32_e32 v14, 0xffff, v48
	v_and_b32_e32 v103, 0xffff, v15
	s_waitcnt lgkmcnt(25)
	v_and_b32_e32 v15, 0xffff, v50
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v20, 0xffff, v52
	v_add_lshl_u32 v10, v10, v1, 2
	v_add_lshl_u32 v11, v11, v2, 2
	s_waitcnt lgkmcnt(23)
	v_and_b32_e32 v48, 0xffff, v54
	v_add_lshl_u32 v12, v12, v95, 2
	v_and_b32_e32 v19, 0xffff, v19
	s_waitcnt lgkmcnt(22)
	v_and_b32_e32 v50, 0xffff, v56
	v_add_lshl_u32 v13, v13, v99, 2
	v_and_b32_e32 v47, 0xffff, v47
	s_waitcnt lgkmcnt(21)
	v_and_b32_e32 v52, 0xffff, v58
	v_add_lshl_u32 v14, v14, v100, 2
	v_and_b32_e32 v49, 0xffff, v49
	s_waitcnt lgkmcnt(20)
	v_and_b32_e32 v54, 0xffff, v60
	v_add_lshl_u32 v15, v15, v101, 2
	v_and_b32_e32 v51, 0xffff, v51
	s_waitcnt lgkmcnt(19)
	v_and_b32_e32 v56, 0xffff, v62
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v10, v4 offset:64
	ds_store_b32 v11, v3 offset:64
	ds_store_b32 v12, v6 offset:64
	ds_store_b32 v13, v5 offset:64
	ds_store_b32 v14, v17 offset:64
	ds_store_b32 v15, v16 offset:64
	v_add_lshl_u32 v16, v20, v102, 2
	v_and_b32_e32 v53, 0xffff, v53
	v_and_b32_e32 v58, 0xffff, v64
	v_add_lshl_u32 v17, v48, v103, 2
	v_and_b32_e32 v55, 0xffff, v55
	v_and_b32_e32 v60, 0xffff, v66
	v_and_b32_e32 v1, 0xffff, v18
	v_add_lshl_u32 v18, v50, v19, 2
	v_and_b32_e32 v57, 0xffff, v57
	v_and_b32_e32 v62, 0xffff, v68
	v_add_lshl_u32 v19, v52, v47, 2
	v_and_b32_e32 v59, 0xffff, v59
	v_and_b32_e32 v64, 0xffff, v70
	v_add_lshl_u32 v20, v54, v49, 2
	v_and_b32_e32 v61, 0xffff, v61
	v_and_b32_e32 v66, 0xffff, v72
	ds_store_b32 v16, v22 offset:64
	ds_store_b32 v17, v21 offset:64
	ds_store_b32 v18, v24 offset:64
	ds_store_b32 v19, v23 offset:64
	ds_store_b32 v20, v25 offset:64
	v_add_lshl_u32 v21, v56, v51, 2
	v_and_b32_e32 v63, 0xffff, v63
	v_and_b32_e32 v68, 0xffff, v74
	v_add_lshl_u32 v22, v58, v53, 2
	v_and_b32_e32 v65, 0xffff, v65
	v_and_b32_e32 v70, 0xffff, v76
	v_add_lshl_u32 v23, v60, v55, 2
	v_and_b32_e32 v67, 0xffff, v67
	v_and_b32_e32 v72, 0xffff, v78
	v_add_lshl_u32 v24, v62, v57, 2
	v_and_b32_e32 v69, 0xffff, v69
	v_and_b32_e32 v74, 0xffff, v80
	v_add_lshl_u32 v25, v64, v59, 2
	v_and_b32_e32 v71, 0xffff, v71
	v_and_b32_e32 v76, 0xffff, v82
	ds_store_b32 v21, v26 offset:64
	ds_store_b32 v22, v28 offset:64
	ds_store_b32 v23, v27 offset:64
	ds_store_b32 v24, v30 offset:64
	ds_store_b32 v25, v29 offset:64
	v_add_lshl_u32 v26, v66, v61, 2
	v_and_b32_e32 v73, 0xffff, v73
	v_and_b32_e32 v78, 0xffff, v84
	v_add_lshl_u32 v27, v68, v63, 2
	v_and_b32_e32 v75, 0xffff, v75
	v_and_b32_e32 v80, 0xffff, v86
	v_add_lshl_u32 v28, v70, v65, 2
	v_and_b32_e32 v77, 0xffff, v77
	v_and_b32_e32 v82, 0xffff, v88
	v_add_lshl_u32 v29, v72, v67, 2
	v_and_b32_e32 v79, 0xffff, v79
	v_and_b32_e32 v84, 0xffff, v90
	v_add_lshl_u32 v30, v74, v69, 2
	v_and_b32_e32 v81, 0xffff, v81
	v_and_b32_e32 v83, 0xffff, v83
	v_and_b32_e32 v85, 0xffff, v85
	v_and_b32_e32 v87, 0xffff, v87
	v_and_b32_e32 v89, 0xffff, v89
	v_and_b32_e32 v86, 0xffff, v91
	v_and_b32_e32 v88, 0xffff, v92
	v_and_b32_e32 v90, 0xffff, v93
	v_and_b32_e32 v91, 0xffff, v94
	ds_store_b32 v26, v33 offset:64
	ds_store_b32 v27, v31 offset:64
	ds_store_b32 v28, v35 offset:64
	ds_store_b32 v29, v34 offset:64
	ds_store_b32 v30, v36 offset:64
	v_add_lshl_u32 v31, v76, v71, 2
	v_add_lshl_u32 v33, v78, v73, 2
	v_add_lshl_u32 v34, v80, v75, 2
	v_add_lshl_u32 v35, v82, v77, 2
	v_add_lshl_u32 v36, v84, v79, 2
	ds_store_b32 v31, v37 offset:64
	ds_store_b32 v33, v39 offset:64
	ds_store_b32 v34, v38 offset:64
	ds_store_b32 v35, v41 offset:64
	ds_store_b32 v36, v40 offset:64
	v_add_lshl_u32 v37, v86, v81, 2
	v_add_lshl_u32 v38, v88, v83, 2
	v_add_lshl_u32 v39, v90, v85, 2
	v_add_lshl_u32 v40, v91, v87, 2
	v_add_lshl_u32 v41, v1, v89, 2
	ds_store_b32 v37, v43 offset:64
	ds_store_b32 v38, v42 offset:64
	ds_store_b32 v39, v45 offset:64
	ds_store_b32 v40, v44 offset:64
	ds_store_b32 v41, v46 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s36, vcc_lo
	s_cbranch_execz .LBB62_86
; %bb.76:
	v_lshl_or_b32 v3, s15, 4, v0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v42, 0
	s_mov_b32 s37, 0
	s_mov_b32 s38, s15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v8
	v_add_co_u32 v1, s35, s84, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s35, s85, v2, s35
                                        ; implicit-def: $sgpr35
	global_store_b32 v[1:2], v3, off
.LBB62_77:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB62_80 Depth 2
	s_or_b32 s35, s35, exec_lo
	s_cmp_eq_u32 s38, 0
	s_cbranch_scc1 .LBB62_83
; %bb.78:                               ;   in Loop: Header=BB62_77 Depth=1
	s_add_i32 s38, s38, -1
	s_mov_b32 s39, exec_lo
	v_lshl_or_b32 v3, s38, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s35, s84, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s35, s85, v6, s35
	global_load_b32 v43, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v43
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB62_82
; %bb.79:                               ; %.lr.ph.i44.i.preheader
                                        ;   in Loop: Header=BB62_77 Depth=1
	s_mov_b32 s40, 0
.LBB62_80:                              ; %.lr.ph.i44.i
                                        ;   Parent Loop BB62_77 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v43, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s35, 0, v3
	s_or_b32 s40, s35, s40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s40
	s_cbranch_execnz .LBB62_80
; %bb.81:                               ; %Flow
                                        ;   in Loop: Header=BB62_77 Depth=1
	s_or_b32 exec_lo, exec_lo, s40
.LBB62_82:                              ; %Flow151
                                        ;   in Loop: Header=BB62_77 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s39
	v_and_b32_e32 v5, 0x3fffffff, v43
	v_cmp_eq_u32_e64 s35, 0x80000000, v3
	v_add_nc_u32_e32 v42, v5, v42
	s_branch .LBB62_84
.LBB62_83:                              ;   in Loop: Header=BB62_77 Depth=1
                                        ; implicit-def: $sgpr38
.LBB62_84:                              ; %Flow152
                                        ;   in Loop: Header=BB62_77 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s39, exec_lo, s35
	s_or_b32 s37, s39, s37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s37
	s_cbranch_execnz .LBB62_77
; %bb.85:
	s_or_b32 exec_lo, exec_lo, s37
	v_add_nc_u32_e32 v3, v42, v8
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v42, v7
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	ds_store_b32 v4, v1
.LBB62_86:                              ; %Flow153
	s_or_b32 exec_lo, exec_lo, s36
	v_cmp_gt_u32_e64 s35, s66, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s37, s35
	s_cbranch_execz .LBB62_88
; %bb.87:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v3, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s36, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s36, s71, v2, s36
	global_store_b32 v[1:2], v3, off
.LBB62_88:
	s_or_b32 exec_lo, exec_lo, s37
	v_or_b32_e32 v3, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s36, s66, v3
	s_and_saveexec_b32 s38, s36
	s_cbranch_execz .LBB62_90
; %bb.89:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v4, v1 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s37, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s37, s71, v2, s37
	global_store_b32 v[1:2], v4, off
.LBB62_90:
	s_or_b32 exec_lo, exec_lo, s38
	v_or_b32_e32 v4, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s37, s66, v4
	s_and_saveexec_b32 s39, s37
	s_cbranch_execz .LBB62_92
; %bb.91:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v5, v1 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s38, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s38, s71, v2, s38
	global_store_b32 v[1:2], v5, off
.LBB62_92:
	s_or_b32 exec_lo, exec_lo, s39
	v_or_b32_e32 v5, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s38, s66, v5
	s_and_saveexec_b32 s40, s38
	s_cbranch_execz .LBB62_94
; %bb.93:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v6, v1 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s39, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s39, s71, v2, s39
	global_store_b32 v[1:2], v6, off
.LBB62_94:
	s_or_b32 exec_lo, exec_lo, s40
	v_or_b32_e32 v6, 0x800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s39, s66, v6
	s_and_saveexec_b32 s41, s39
	s_cbranch_execz .LBB62_96
; %bb.95:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v42, v1 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s40, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s40, s71, v2, s40
	global_store_b32 v[1:2], v42, off
.LBB62_96:
	s_or_b32 exec_lo, exec_lo, s41
	v_or_b32_e32 v42, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s40, s66, v42
	s_and_saveexec_b32 s42, s40
	s_cbranch_execz .LBB62_98
; %bb.97:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v43, v1 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s41, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s41, s71, v2, s41
	global_store_b32 v[1:2], v43, off
.LBB62_98:
	s_or_b32 exec_lo, exec_lo, s42
	v_or_b32_e32 v43, 0xc00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s41, s66, v43
	s_and_saveexec_b32 s43, s41
	s_cbranch_execz .LBB62_100
; %bb.99:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v44, v1 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s42, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s42, s71, v2, s42
	global_store_b32 v[1:2], v44, off
.LBB62_100:
	s_or_b32 exec_lo, exec_lo, s43
	v_or_b32_e32 v44, 0xe00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s42, s66, v44
	s_and_saveexec_b32 s44, s42
	s_cbranch_execz .LBB62_102
; %bb.101:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v45, v1 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s43, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s43, s71, v2, s43
	global_store_b32 v[1:2], v45, off
.LBB62_102:
	s_or_b32 exec_lo, exec_lo, s44
	v_or_b32_e32 v45, 0x1000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s43, s66, v45
	s_and_saveexec_b32 s45, s43
	s_cbranch_execz .LBB62_104
; %bb.103:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v46, v1 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s44, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s44, s71, v2, s44
	global_store_b32 v[1:2], v46, off
.LBB62_104:
	s_or_b32 exec_lo, exec_lo, s45
	v_or_b32_e32 v46, 0x1200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s44, s66, v46
	s_and_saveexec_b32 s46, s44
	s_cbranch_execz .LBB62_106
; %bb.105:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v47, v1 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s45, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s45, s71, v2, s45
	global_store_b32 v[1:2], v47, off
.LBB62_106:
	s_or_b32 exec_lo, exec_lo, s46
	v_or_b32_e32 v47, 0x1400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s45, s66, v47
	s_and_saveexec_b32 s47, s45
	s_cbranch_execz .LBB62_108
; %bb.107:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v48, v1 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s46, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s46, s71, v2, s46
	global_store_b32 v[1:2], v48, off
.LBB62_108:
	s_or_b32 exec_lo, exec_lo, s47
	v_or_b32_e32 v48, 0x1600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s46, s66, v48
	s_and_saveexec_b32 s48, s46
	s_cbranch_execz .LBB62_110
; %bb.109:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v49, v1 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s47, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s47, s71, v2, s47
	global_store_b32 v[1:2], v49, off
.LBB62_110:
	s_or_b32 exec_lo, exec_lo, s48
	v_or_b32_e32 v49, 0x1800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s47, s66, v49
	s_and_saveexec_b32 s49, s47
	s_cbranch_execz .LBB62_112
; %bb.111:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v50, v1 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s48, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s48, s71, v2, s48
	global_store_b32 v[1:2], v50, off
.LBB62_112:
	s_or_b32 exec_lo, exec_lo, s49
	v_or_b32_e32 v50, 0x1a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s48, s66, v50
	s_and_saveexec_b32 s50, s48
	s_cbranch_execz .LBB62_114
; %bb.113:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v51, v1 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s49, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s49, s71, v2, s49
	global_store_b32 v[1:2], v51, off
.LBB62_114:
	s_or_b32 exec_lo, exec_lo, s50
	v_or_b32_e32 v51, 0x1c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s49, s66, v51
	s_and_saveexec_b32 s51, s49
	s_cbranch_execz .LBB62_116
; %bb.115:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v52, v1 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s50, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s50, s71, v2, s50
	global_store_b32 v[1:2], v52, off
.LBB62_116:
	s_or_b32 exec_lo, exec_lo, s51
	v_or_b32_e32 v52, 0x1e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s50, s66, v52
	s_and_saveexec_b32 s52, s50
	s_cbranch_execz .LBB62_118
; %bb.117:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v53, v1 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s51, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s51, s71, v2, s51
	global_store_b32 v[1:2], v53, off
.LBB62_118:
	s_or_b32 exec_lo, exec_lo, s52
	v_or_b32_e32 v53, 0x2000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s51, s66, v53
	s_and_saveexec_b32 s53, s51
	s_cbranch_execz .LBB62_120
; %bb.119:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v54, v1 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s52, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s52, s71, v2, s52
	global_store_b32 v[1:2], v54, off
.LBB62_120:
	s_or_b32 exec_lo, exec_lo, s53
	v_or_b32_e32 v54, 0x2200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s52, s66, v54
	s_and_saveexec_b32 s54, s52
	s_cbranch_execz .LBB62_122
; %bb.121:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v55, v1 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s53, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s53, s71, v2, s53
	global_store_b32 v[1:2], v55, off
.LBB62_122:
	s_or_b32 exec_lo, exec_lo, s54
	v_or_b32_e32 v55, 0x2400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s53, s66, v55
	s_and_saveexec_b32 s55, s53
	s_cbranch_execz .LBB62_124
; %bb.123:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v56, v1 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s54, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s54, s71, v2, s54
	global_store_b32 v[1:2], v56, off
.LBB62_124:
	s_or_b32 exec_lo, exec_lo, s55
	v_or_b32_e32 v56, 0x2600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s54, s66, v56
	s_and_saveexec_b32 s56, s54
	s_cbranch_execz .LBB62_126
; %bb.125:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v57, v1 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s55, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s55, s71, v2, s55
	global_store_b32 v[1:2], v57, off
.LBB62_126:
	s_or_b32 exec_lo, exec_lo, s56
	v_or_b32_e32 v57, 0x2800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s55, s66, v57
	s_and_saveexec_b32 s57, s55
	s_cbranch_execz .LBB62_128
; %bb.127:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v58, v1 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s56, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s56, s71, v2, s56
	global_store_b32 v[1:2], v58, off
.LBB62_128:
	s_or_b32 exec_lo, exec_lo, s57
	v_or_b32_e32 v58, 0x2a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s56, s66, v58
	s_and_saveexec_b32 s58, s56
	s_cbranch_execz .LBB62_130
; %bb.129:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v59, v1 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s57, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s57, s71, v2, s57
	global_store_b32 v[1:2], v59, off
.LBB62_130:
	s_or_b32 exec_lo, exec_lo, s58
	v_or_b32_e32 v59, 0x2c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s57, s66, v59
	s_and_saveexec_b32 s59, s57
	s_cbranch_execz .LBB62_132
; %bb.131:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v60, v1 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s58, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s58, s71, v2, s58
	global_store_b32 v[1:2], v60, off
.LBB62_132:
	s_or_b32 exec_lo, exec_lo, s59
	v_or_b32_e32 v60, 0x2e00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s58, s66, v60
	s_and_saveexec_b32 s60, s58
	s_cbranch_execz .LBB62_134
; %bb.133:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v61, v1 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s59, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s59, s71, v2, s59
	global_store_b32 v[1:2], v61, off
.LBB62_134:
	s_or_b32 exec_lo, exec_lo, s60
	v_or_b32_e32 v61, 0x3000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s59, s66, v61
	s_and_saveexec_b32 s61, s59
	s_cbranch_execz .LBB62_136
; %bb.135:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v62, v1 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s60, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s60, s71, v2, s60
	global_store_b32 v[1:2], v62, off
.LBB62_136:
	s_or_b32 exec_lo, exec_lo, s61
	v_or_b32_e32 v62, 0x3200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s60, s66, v62
	s_and_saveexec_b32 s62, s60
	s_cbranch_execz .LBB62_138
; %bb.137:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v63, v1 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s61, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s61, s71, v2, s61
	global_store_b32 v[1:2], v63, off
.LBB62_138:
	s_or_b32 exec_lo, exec_lo, s62
	v_or_b32_e32 v63, 0x3400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s61, s66, v63
	s_and_saveexec_b32 s63, s61
	s_cbranch_execz .LBB62_140
; %bb.139:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v64, v1 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s62, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s62, s71, v2, s62
	global_store_b32 v[1:2], v64, off
.LBB62_140:
	s_or_b32 exec_lo, exec_lo, s63
	v_or_b32_e32 v64, 0x3600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s62, s66, v64
	s_and_saveexec_b32 s64, s62
	s_cbranch_execz .LBB62_142
; %bb.141:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v65, v1 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s63, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s63, s71, v2, s63
	global_store_b32 v[1:2], v65, off
.LBB62_142:
	s_or_b32 exec_lo, exec_lo, s64
	v_or_b32_e32 v65, 0x3800, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s63, s66, v65
	s_and_saveexec_b32 s65, s63
	s_cbranch_execz .LBB62_144
; %bb.143:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v66, v1 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s64, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s64, s71, v2, s64
	global_store_b32 v[1:2], v66, off
.LBB62_144:
	s_or_b32 exec_lo, exec_lo, s65
	v_or_b32_e32 v66, 0x3a00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s64, s66, v66
	s_and_saveexec_b32 s87, s64
	s_cbranch_execz .LBB62_146
; %bb.145:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v67, v1 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s65, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s65, s71, v2, s65
	global_store_b32 v[1:2], v67, off
.LBB62_146:
	s_or_b32 exec_lo, exec_lo, s87
	v_or_b32_e32 v67, 0x3c00, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s65, s66, v67
	s_and_saveexec_b32 s87, s65
	s_cbranch_execz .LBB62_148
; %bb.147:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_load_b32 v68, v1 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
	v_lshlrev_b32_e32 v1, 2, v1
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v1, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s66, s70, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s66, s71, v2, s66
	global_store_b32 v[1:2], v68, off
.LBB62_148:
	s_or_b32 exec_lo, exec_lo, s87
	s_add_u32 s66, s72, s82
	s_addc_u32 s82, s73, s83
	v_add_co_u32 v1, s66, s66, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v2, null, s82, 0, s66
                                        ; implicit-def: $vgpr9
	s_and_saveexec_b32 s66, s2
	s_xor_b32 s2, exec_lo, s66
	s_cbranch_execz .LBB62_150
; %bb.149:
	global_load_b32 v9, v[1:2], off
.LBB62_150:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr68
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB62_152
; %bb.151:
	global_load_b32 v68, v[1:2], off offset:4
.LBB62_152:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr69
	s_and_saveexec_b32 s2, s4
	s_cbranch_execz .LBB62_154
; %bb.153:
	global_load_b32 v69, v[1:2], off offset:8
.LBB62_154:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr70
	s_and_saveexec_b32 s2, s5
	s_cbranch_execz .LBB62_156
; %bb.155:
	global_load_b32 v70, v[1:2], off offset:12
.LBB62_156:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr71
	s_and_saveexec_b32 s2, s6
	s_cbranch_execz .LBB62_158
; %bb.157:
	global_load_b32 v71, v[1:2], off offset:16
.LBB62_158:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr73
	s_and_saveexec_b32 s2, s7
	s_cbranch_execz .LBB62_160
; %bb.159:
	global_load_b32 v73, v[1:2], off offset:20
.LBB62_160:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr75
	s_and_saveexec_b32 s2, s8
	s_cbranch_execz .LBB62_162
; %bb.161:
	global_load_b32 v75, v[1:2], off offset:24
.LBB62_162:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr77
	s_and_saveexec_b32 s2, s9
	s_cbranch_execz .LBB62_164
; %bb.163:
	global_load_b32 v77, v[1:2], off offset:28
.LBB62_164:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr79
	s_and_saveexec_b32 s2, s10
	s_cbranch_execz .LBB62_166
; %bb.165:
	global_load_b32 v79, v[1:2], off offset:32
.LBB62_166:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr81
	s_and_saveexec_b32 s2, s11
	s_cbranch_execz .LBB62_168
; %bb.167:
	global_load_b32 v81, v[1:2], off offset:36
.LBB62_168:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr83
	s_and_saveexec_b32 s2, s12
	s_cbranch_execz .LBB62_170
; %bb.169:
	global_load_b32 v83, v[1:2], off offset:40
.LBB62_170:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr85
	s_and_saveexec_b32 s2, s13
	s_cbranch_execz .LBB62_172
; %bb.171:
	global_load_b32 v85, v[1:2], off offset:44
.LBB62_172:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr87
	s_and_saveexec_b32 s2, s14
	s_cbranch_execz .LBB62_174
; %bb.173:
	global_load_b32 v87, v[1:2], off offset:48
.LBB62_174:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr89
	s_and_saveexec_b32 s2, s16
	s_cbranch_execz .LBB62_176
; %bb.175:
	global_load_b32 v89, v[1:2], off offset:52
.LBB62_176:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr92
	s_and_saveexec_b32 s2, s17
	s_cbranch_execz .LBB62_178
; %bb.177:
	global_load_b32 v92, v[1:2], off offset:56
.LBB62_178:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr94
	s_and_saveexec_b32 s2, s18
	s_cbranch_execz .LBB62_180
; %bb.179:
	global_load_b32 v94, v[1:2], off offset:60
.LBB62_180:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr96
	s_and_saveexec_b32 s2, s19
	s_cbranch_execz .LBB62_182
; %bb.181:
	global_load_b32 v96, v[1:2], off offset:64
.LBB62_182:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr98
	s_and_saveexec_b32 s2, s20
	s_cbranch_execz .LBB62_184
; %bb.183:
	global_load_b32 v98, v[1:2], off offset:68
.LBB62_184:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr100
	s_and_saveexec_b32 s2, s21
	s_cbranch_execz .LBB62_186
; %bb.185:
	global_load_b32 v100, v[1:2], off offset:72
.LBB62_186:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr102
	s_and_saveexec_b32 s2, s22
	s_cbranch_execz .LBB62_188
; %bb.187:
	global_load_b32 v102, v[1:2], off offset:76
.LBB62_188:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr104
	s_and_saveexec_b32 s2, s23
	s_cbranch_execz .LBB62_190
; %bb.189:
	global_load_b32 v104, v[1:2], off offset:80
.LBB62_190:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr106
	s_and_saveexec_b32 s2, s24
	s_cbranch_execz .LBB62_192
; %bb.191:
	global_load_b32 v106, v[1:2], off offset:84
.LBB62_192:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr108
	s_and_saveexec_b32 s2, s25
	s_cbranch_execz .LBB62_194
; %bb.193:
	global_load_b32 v108, v[1:2], off offset:88
.LBB62_194:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr110
	s_and_saveexec_b32 s2, s26
	s_cbranch_execz .LBB62_196
; %bb.195:
	global_load_b32 v110, v[1:2], off offset:92
.LBB62_196:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr113
	s_and_saveexec_b32 s2, s27
	s_cbranch_execz .LBB62_198
; %bb.197:
	global_load_b32 v113, v[1:2], off offset:96
.LBB62_198:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr115
	s_and_saveexec_b32 s2, s28
	s_cbranch_execz .LBB62_200
; %bb.199:
	global_load_b32 v115, v[1:2], off offset:100
.LBB62_200:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr117
	s_and_saveexec_b32 s2, s29
	s_cbranch_execz .LBB62_202
; %bb.201:
	global_load_b32 v117, v[1:2], off offset:104
.LBB62_202:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr119
	s_and_saveexec_b32 s2, s30
	s_cbranch_execz .LBB62_204
; %bb.203:
	global_load_b32 v119, v[1:2], off offset:108
.LBB62_204:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr121
	s_and_saveexec_b32 s2, s31
	s_cbranch_execz .LBB62_206
; %bb.205:
	global_load_b32 v121, v[1:2], off offset:112
.LBB62_206:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr123
	s_and_saveexec_b32 s2, s33
	s_cbranch_execz .LBB62_208
; %bb.207:
	global_load_b32 v123, v[1:2], off offset:116
.LBB62_208:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr125
	s_and_saveexec_b32 s2, s34
	s_cbranch_execz .LBB62_210
; %bb.209:
	global_load_b32 v125, v[1:2], off offset:120
.LBB62_210:                             ; %_ZN7rocprim25block_load_direct_blockedIPjjLj31EEEvjT_RAT1__T0_j.exit.i.i
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr126
	s_and_saveexec_b32 s2, s35
	s_cbranch_execz .LBB62_212
; %bb.211:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:64
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v126, s67, v1
.LBB62_212:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr124
	s_and_saveexec_b32 s2, s36
	s_cbranch_execz .LBB62_214
; %bb.213:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:2112
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v124, s67, v1
.LBB62_214:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr122
	s_and_saveexec_b32 s2, s37
	s_cbranch_execz .LBB62_216
; %bb.215:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:4160
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v122, s67, v1
.LBB62_216:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr120
	s_and_saveexec_b32 s2, s38
	s_cbranch_execz .LBB62_218
; %bb.217:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:6208
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v120, s67, v1
.LBB62_218:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr118
	s_and_saveexec_b32 s2, s39
	s_cbranch_execz .LBB62_220
; %bb.219:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:8256
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v118, s67, v1
.LBB62_220:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr116
	s_and_saveexec_b32 s2, s40
	s_cbranch_execz .LBB62_222
; %bb.221:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:10304
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v116, s67, v1
.LBB62_222:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr114
	s_and_saveexec_b32 s2, s41
	s_cbranch_execz .LBB62_224
; %bb.223:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:12352
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v114, s67, v1
.LBB62_224:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr112
	s_and_saveexec_b32 s2, s42
	s_cbranch_execz .LBB62_226
; %bb.225:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:14400
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v112, s67, v1
.LBB62_226:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr111
	s_and_saveexec_b32 s2, s43
	s_cbranch_execz .LBB62_228
; %bb.227:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:16448
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v111, s67, v1
.LBB62_228:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr109
	s_and_saveexec_b32 s2, s44
	s_cbranch_execz .LBB62_230
; %bb.229:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:18496
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v109, s67, v1
.LBB62_230:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr107
	s_and_saveexec_b32 s2, s45
	s_cbranch_execz .LBB62_232
; %bb.231:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:20544
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v107, s67, v1
.LBB62_232:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr105
	s_and_saveexec_b32 s2, s46
	s_cbranch_execz .LBB62_234
; %bb.233:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:22592
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v105, s67, v1
.LBB62_234:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr103
	s_and_saveexec_b32 s2, s47
	s_cbranch_execz .LBB62_236
; %bb.235:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:24640
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v103, s67, v1
.LBB62_236:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr101
	s_and_saveexec_b32 s2, s48
	s_cbranch_execz .LBB62_238
; %bb.237:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:26688
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v101, s67, v1
.LBB62_238:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr99
	s_and_saveexec_b32 s2, s49
	s_cbranch_execz .LBB62_240
; %bb.239:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:28736
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v99, s67, v1
.LBB62_240:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr97
	s_and_saveexec_b32 s2, s50
	s_cbranch_execz .LBB62_242
; %bb.241:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:30784
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v97, s67, v1
.LBB62_242:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr95
	s_and_saveexec_b32 s2, s51
	s_cbranch_execz .LBB62_244
; %bb.243:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:32832
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v95, s67, v1
.LBB62_244:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr93
	s_and_saveexec_b32 s2, s52
	s_cbranch_execz .LBB62_246
; %bb.245:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:34880
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v93, s67, v1
.LBB62_246:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr91
	s_and_saveexec_b32 s2, s53
	s_cbranch_execz .LBB62_248
; %bb.247:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:36928
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v91, s67, v1
.LBB62_248:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr90
	s_and_saveexec_b32 s2, s54
	s_cbranch_execz .LBB62_250
; %bb.249:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:38976
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v90, s67, v1
.LBB62_250:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr88
	s_and_saveexec_b32 s2, s55
	s_cbranch_execz .LBB62_252
; %bb.251:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:41024
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v88, s67, v1
.LBB62_252:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr86
	s_and_saveexec_b32 s2, s56
	s_cbranch_execz .LBB62_254
; %bb.253:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:43072
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v86, s67, v1
.LBB62_254:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr84
	s_and_saveexec_b32 s2, s57
	s_cbranch_execz .LBB62_256
; %bb.255:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:45120
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v84, s67, v1
.LBB62_256:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr82
	s_and_saveexec_b32 s2, s58
	s_cbranch_execz .LBB62_258
; %bb.257:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:47168
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v82, s67, v1
.LBB62_258:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr80
	s_and_saveexec_b32 s2, s59
	s_cbranch_execz .LBB62_260
; %bb.259:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:49216
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v80, s67, v1
.LBB62_260:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr78
	s_and_saveexec_b32 s2, s60
	s_cbranch_execz .LBB62_262
; %bb.261:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:51264
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v78, s67, v1
.LBB62_262:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr76
	s_and_saveexec_b32 s2, s61
	s_cbranch_execz .LBB62_264
; %bb.263:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:53312
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v76, s67, v1
.LBB62_264:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr74
	s_and_saveexec_b32 s2, s62
	s_cbranch_execz .LBB62_266
; %bb.265:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:55360
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v74, s67, v1
.LBB62_266:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr72
	s_and_saveexec_b32 s2, s63
	s_cbranch_execz .LBB62_268
; %bb.267:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:57408
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v72, s67, v1
.LBB62_268:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr2
	s_and_saveexec_b32 s2, s64
	s_cbranch_execz .LBB62_270
; %bb.269:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:59456
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v2, s67, v1
.LBB62_270:
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s2, s65
	s_cbranch_execz .LBB62_272
; %bb.271:
	v_lshlrev_b32_e32 v1, 2, v0
	ds_load_b32 v1, v1 offset:61504
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v1, s80, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v1, s67, v1
.LBB62_272:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v10, v9 offset:64
	ds_store_b32 v11, v68 offset:64
	ds_store_b32 v12, v69 offset:64
	ds_store_b32 v13, v70 offset:64
	ds_store_b32 v14, v71 offset:64
	ds_store_b32 v15, v73 offset:64
	ds_store_b32 v16, v75 offset:64
	ds_store_b32 v17, v77 offset:64
	ds_store_b32 v18, v79 offset:64
	ds_store_b32 v19, v81 offset:64
	ds_store_b32 v20, v83 offset:64
	ds_store_b32 v21, v85 offset:64
	ds_store_b32 v22, v87 offset:64
	ds_store_b32 v23, v89 offset:64
	ds_store_b32 v24, v92 offset:64
	ds_store_b32 v25, v94 offset:64
	ds_store_b32 v26, v96 offset:64
	ds_store_b32 v27, v98 offset:64
	ds_store_b32 v28, v100 offset:64
	ds_store_b32 v29, v102 offset:64
	ds_store_b32 v30, v104 offset:64
	ds_store_b32 v31, v106 offset:64
	ds_store_b32 v33, v108 offset:64
	ds_store_b32 v34, v110 offset:64
	ds_store_b32 v35, v113 offset:64
	ds_store_b32 v36, v115 offset:64
	ds_store_b32 v37, v117 offset:64
	ds_store_b32 v38, v119 offset:64
	ds_store_b32 v39, v121 offset:64
	ds_store_b32 v40, v123 offset:64
	ds_store_b32 v41, v125 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s35
	s_cbranch_execz .LBB62_274
; %bb.273:
	v_lshlrev_b32_e32 v9, 2, v126
	v_lshlrev_b32_e32 v10, 2, v0
	ds_load_b32 v9, v9
	ds_load_b32 v11, v10 offset:64
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v9, v9, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, s2, s74, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s75, v10, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[9:10], v11, off
.LBB62_274:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s36
	s_cbranch_execz .LBB62_276
; %bb.275:
	v_lshlrev_b32_e32 v9, 2, v124
	v_lshlrev_b32_e32 v10, 2, v0
	ds_load_b32 v9, v9
	ds_load_b32 v11, v10 offset:2112
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v9, v9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, s2, s74, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s75, v10, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[9:10], v11, off
.LBB62_276:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s37
	s_cbranch_execz .LBB62_278
; %bb.277:
	v_dual_mov_b32 v10, 0 :: v_dual_lshlrev_b32 v3, 2, v122
	v_lshlrev_b32_e32 v9, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v11, v9 offset:4160
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v9, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[9:10]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v11, off
.LBB62_278:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s38
	s_cbranch_execz .LBB62_280
; %bb.279:
	v_lshlrev_b32_e32 v3, 2, v120
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v9, v4 offset:6208
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v9, off
.LBB62_280:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s39
	s_cbranch_execz .LBB62_282
; %bb.281:
	v_lshlrev_b32_e32 v3, 2, v118
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:8256
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_282:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s40
	s_cbranch_execz .LBB62_284
; %bb.283:
	v_lshlrev_b32_e32 v3, 2, v116
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:10304
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_284:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s41
	s_cbranch_execz .LBB62_286
; %bb.285:
	v_lshlrev_b32_e32 v3, 2, v114
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:12352
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_286:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s42
	s_cbranch_execz .LBB62_288
; %bb.287:
	v_lshlrev_b32_e32 v3, 2, v112
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:14400
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_288:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s43
	s_cbranch_execz .LBB62_290
; %bb.289:
	v_lshlrev_b32_e32 v3, 2, v111
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:16448
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_290:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s44
	s_cbranch_execz .LBB62_292
; %bb.291:
	v_lshlrev_b32_e32 v3, 2, v109
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:18496
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_292:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s45
	s_cbranch_execz .LBB62_294
; %bb.293:
	v_lshlrev_b32_e32 v3, 2, v107
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:20544
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_294:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s46
	s_cbranch_execz .LBB62_296
; %bb.295:
	v_lshlrev_b32_e32 v3, 2, v105
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:22592
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_296:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s47
	s_cbranch_execz .LBB62_298
; %bb.297:
	v_lshlrev_b32_e32 v3, 2, v103
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:24640
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_298:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s48
	s_cbranch_execz .LBB62_300
; %bb.299:
	v_lshlrev_b32_e32 v3, 2, v101
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:26688
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_300:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s49
	s_cbranch_execz .LBB62_302
; %bb.301:
	v_lshlrev_b32_e32 v3, 2, v99
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:28736
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_302:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s50
	s_cbranch_execz .LBB62_304
; %bb.303:
	v_lshlrev_b32_e32 v3, 2, v97
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:30784
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_304:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s51
	s_cbranch_execz .LBB62_306
; %bb.305:
	v_lshlrev_b32_e32 v3, 2, v95
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:32832
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_306:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s52
	s_cbranch_execz .LBB62_308
; %bb.307:
	v_lshlrev_b32_e32 v3, 2, v93
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:34880
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_308:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s53
	s_cbranch_execz .LBB62_310
; %bb.309:
	v_lshlrev_b32_e32 v3, 2, v91
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:36928
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_310:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s54
	s_cbranch_execz .LBB62_312
; %bb.311:
	v_lshlrev_b32_e32 v3, 2, v90
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:38976
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_312:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s55
	s_cbranch_execz .LBB62_314
; %bb.313:
	v_lshlrev_b32_e32 v3, 2, v88
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:41024
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_314:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s56
	s_cbranch_execz .LBB62_316
; %bb.315:
	v_lshlrev_b32_e32 v3, 2, v86
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:43072
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_316:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s57
	s_cbranch_execz .LBB62_318
; %bb.317:
	v_lshlrev_b32_e32 v3, 2, v84
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:45120
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_318:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s58
	s_cbranch_execz .LBB62_320
; %bb.319:
	v_lshlrev_b32_e32 v3, 2, v82
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:47168
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_320:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s59
	s_cbranch_execz .LBB62_322
; %bb.321:
	v_lshlrev_b32_e32 v3, 2, v80
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:49216
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_322:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s60
	s_cbranch_execz .LBB62_324
; %bb.323:
	v_lshlrev_b32_e32 v3, 2, v78
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:51264
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_324:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s61
	s_cbranch_execz .LBB62_326
; %bb.325:
	v_lshlrev_b32_e32 v3, 2, v76
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:53312
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_326:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s62
	s_cbranch_execz .LBB62_328
; %bb.327:
	v_lshlrev_b32_e32 v3, 2, v74
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:55360
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_328:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s63
	s_cbranch_execz .LBB62_330
; %bb.329:
	v_lshlrev_b32_e32 v3, 2, v72
	v_lshlrev_b32_e32 v4, 2, v0
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4 offset:57408
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v3, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s2, s74, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s75, v4, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB62_330:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s64
	s_cbranch_execz .LBB62_332
; %bb.331:
	v_lshlrev_b32_e32 v2, 2, v2
	v_lshlrev_b32_e32 v3, 2, v0
	ds_load_b32 v2, v2
	ds_load_b32 v4, v3 offset:59456
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v2, v2, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, s2, s74, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s2, s75, v3, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[2:3], v4, off
.LBB62_332:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s65
	s_cbranch_execz .LBB62_334
; %bb.333:
	v_lshlrev_b32_e32 v1, 2, v1
	v_lshlrev_b32_e32 v2, 2, v0
	ds_load_b32 v1, v1
	ds_load_b32 v3, v2 offset:61504
	s_waitcnt lgkmcnt(1)
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, v1, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, s2, s74, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s2, s75, v2, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[1:2], v3, off
.LBB62_334:
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b32 s2, s[0:1], 0x50
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s2
	s_mov_b32 s2, 0
	s_cselect_b32 s3, -1, 0
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s3
	s_xor_b32 s3, exec_lo, s4
; %bb.335:
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v7, v8
	s_mov_b32 s7, exec_lo
; %bb.336:                              ; %Flow165
	s_or_b32 exec_lo, exec_lo, s3
	s_branch .LBB62_338
.LBB62_337:
	s_mov_b32 s2, -1
	s_mov_b32 s7, 0
                                        ; implicit-def: $vgpr2
.LBB62_338:                             ; %Flow164
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB62_367
; %bb.339:
	s_mov_b32 s87, 0
	v_lshlrev_b32_e32 v21, 2, v32
	s_lshl_b64 s[8:9], s[86:87], 2
	v_mov_b32_e32 v33, 0
	s_add_u32 s2, s68, s8
	s_addc_u32 s3, s69, s9
	v_or_b32_e32 v34, 0xfffffe00, v0
	s_clause 0x7
	global_load_b128 v[1:4], v21, s[2:3] offset:48
	global_load_b128 v[9:12], v21, s[2:3] offset:32
	global_load_b128 v[17:20], v21, s[2:3] offset:16
	global_load_b128 v[25:28], v21, s[2:3]
	global_load_b96 v[29:31], v21, s[2:3] offset:112
	global_load_b128 v[5:8], v21, s[2:3] offset:96
	global_load_b128 v[13:16], v21, s[2:3] offset:80
	global_load_b128 v[21:24], v21, s[2:3] offset:64
	v_lshlrev_b32_e32 v35, 2, v0
.LBB62_340:                             ; %.lr.ph.i.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v34, 0x200, v34
	ds_store_b32 v35, v33
	v_add_nc_u32_e32 v35, 0x800, v35
	v_cmp_lt_u32_e32 vcc_lo, 0xdff, v34
	s_or_b32 s87, vcc_lo, s87
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s87
	s_cbranch_execnz .LBB62_340
; %bb.341:                              ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE14reset_countersEjRNS2_13storage_type_E.exit.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s87
	s_waitcnt vmcnt(4)
	v_lshrrev_b32_e32 v33, s80, v25
	s_lshl_b32 s2, -1, s81
	v_lshrrev_b32_e32 v38, s80, v27
	s_not_b32 s10, s2
	s_mov_b32 s2, exec_lo
	v_and_b32_e32 v33, s10, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v34, 9, v33
	v_lshrrev_b32_e32 v33, 3, v33
	v_and_or_b32 v34, 0xe00, v34, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v34, 1, v34
	v_add_lshl_u32 v33, v34, v33, 1
	v_lshrrev_b32_e32 v34, s80, v26
	ds_load_u16 v35, v33
	v_and_b32_e32 v34, s10, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 9, v34
	v_lshrrev_b32_e32 v34, 3, v34
	v_and_or_b32 v36, 0xe00, v36, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v36, 1, v36
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v37, v35, 1
	v_add_lshl_u32 v34, v36, v34, 1
	ds_store_b16 v33, v37
	ds_load_u16 v36, v34
	v_and_b32_e32 v37, s10, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 9, v37
	v_lshrrev_b32_e32 v37, 3, v37
	v_and_or_b32 v38, 0xe00, v38, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v38, 1, v38
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v39, v36, 1
	v_add_lshl_u32 v43, v38, v37, 1
	v_lshrrev_b32_e32 v38, s80, v28
	ds_store_b16 v34, v39
	ds_load_u16 v37, v43
	v_and_b32_e32 v38, s10, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 9, v38
	v_lshrrev_b32_e32 v38, 3, v38
	v_and_or_b32 v39, 0xe00, v39, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v39, 1, v39
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v40, v37, 1
	v_add_lshl_u32 v45, v39, v38, 1
	v_lshrrev_b32_e32 v39, s80, v17
	ds_store_b16 v43, v40
	ds_load_u16 v38, v45
	v_and_b32_e32 v39, s10, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 9, v39
	v_lshrrev_b32_e32 v39, 3, v39
	v_and_or_b32 v40, 0xe00, v40, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v40, 1, v40
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v41, v38, 1
	v_add_lshl_u32 v47, v40, v39, 1
	v_lshrrev_b32_e32 v40, s80, v18
	ds_store_b16 v45, v41
	ds_load_u16 v39, v47
	v_and_b32_e32 v40, s10, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 9, v40
	v_lshrrev_b32_e32 v40, 3, v40
	v_and_or_b32 v41, 0xe00, v41, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v41, 1, v41
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v42, v39, 1
	v_add_lshl_u32 v49, v41, v40, 1
	v_lshrrev_b32_e32 v41, s80, v19
	ds_store_b16 v47, v42
	ds_load_u16 v40, v49
	v_and_b32_e32 v41, s10, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 9, v41
	v_lshrrev_b32_e32 v41, 3, v41
	v_and_or_b32 v42, 0xe00, v42, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v42, 1, v42
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v44, v40, 1
	v_add_lshl_u32 v51, v42, v41, 1
	v_lshrrev_b32_e32 v42, s80, v20
	ds_store_b16 v49, v44
	ds_load_u16 v41, v51
	v_and_b32_e32 v42, s10, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 9, v42
	v_lshrrev_b32_e32 v42, 3, v42
	v_and_or_b32 v44, 0xe00, v44, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v44, 1, v44
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v46, v41, 1
	v_add_lshl_u32 v53, v44, v42, 1
	v_lshrrev_b32_e32 v44, s80, v9
	ds_store_b16 v51, v46
	ds_load_u16 v42, v53
	v_and_b32_e32 v44, s10, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 9, v44
	v_lshrrev_b32_e32 v44, 3, v44
	v_and_or_b32 v46, 0xe00, v46, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v46, 1, v46
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v48, v42, 1
	v_add_lshl_u32 v55, v46, v44, 1
	v_lshrrev_b32_e32 v46, s80, v10
	ds_store_b16 v53, v48
	ds_load_u16 v44, v55
	v_and_b32_e32 v46, s10, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 9, v46
	v_lshrrev_b32_e32 v46, 3, v46
	v_and_or_b32 v48, 0xe00, v48, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v48, 1, v48
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v50, v44, 1
	v_add_lshl_u32 v57, v48, v46, 1
	v_lshrrev_b32_e32 v48, s80, v11
	ds_store_b16 v55, v50
	ds_load_u16 v46, v57
	v_and_b32_e32 v48, s10, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 9, v48
	v_lshrrev_b32_e32 v48, 3, v48
	v_and_or_b32 v50, 0xe00, v50, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v50, 1, v50
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v52, v46, 1
	v_add_lshl_u32 v59, v50, v48, 1
	v_lshrrev_b32_e32 v50, s80, v12
	ds_store_b16 v57, v52
	ds_load_u16 v48, v59
	v_and_b32_e32 v50, s10, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 9, v50
	v_lshrrev_b32_e32 v50, 3, v50
	v_and_or_b32 v52, 0xe00, v52, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v52, 1, v52
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v54, v48, 1
	v_add_lshl_u32 v61, v52, v50, 1
	v_lshrrev_b32_e32 v52, s80, v1
	ds_store_b16 v59, v54
	ds_load_u16 v50, v61
	v_and_b32_e32 v52, s10, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 9, v52
	v_lshrrev_b32_e32 v52, 3, v52
	v_and_or_b32 v54, 0xe00, v54, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v54, 1, v54
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v56, v50, 1
	v_add_lshl_u32 v63, v54, v52, 1
	v_lshrrev_b32_e32 v54, s80, v2
	ds_store_b16 v61, v56
	ds_load_u16 v52, v63
	v_and_b32_e32 v54, s10, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 9, v54
	v_lshrrev_b32_e32 v54, 3, v54
	v_and_or_b32 v56, 0xe00, v56, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v56, 1, v56
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v58, v52, 1
	v_add_lshl_u32 v65, v56, v54, 1
	v_lshrrev_b32_e32 v56, s80, v3
	ds_store_b16 v63, v58
	ds_load_u16 v54, v65
	v_and_b32_e32 v56, s10, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 9, v56
	v_lshrrev_b32_e32 v56, 3, v56
	v_and_or_b32 v58, 0xe00, v58, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v58, 1, v58
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v60, v54, 1
	v_add_lshl_u32 v67, v58, v56, 1
	v_lshrrev_b32_e32 v58, s80, v4
	ds_store_b16 v65, v60
	ds_load_u16 v56, v67
	v_and_b32_e32 v58, s10, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 9, v58
	v_lshrrev_b32_e32 v58, 3, v58
	v_and_or_b32 v60, 0xe00, v60, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v60, 1, v60
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v62, v56, 1
	v_add_lshl_u32 v69, v60, v58, 1
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v60, s80, v21
	ds_store_b16 v67, v62
	ds_load_u16 v58, v69
	v_and_b32_e32 v60, s10, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 9, v60
	v_lshrrev_b32_e32 v60, 3, v60
	v_and_or_b32 v62, 0xe00, v62, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v62, 1, v62
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v64, v58, 1
	v_add_lshl_u32 v71, v62, v60, 1
	v_lshrrev_b32_e32 v62, s80, v22
	ds_store_b16 v69, v64
	ds_load_u16 v60, v71
	v_and_b32_e32 v62, s10, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 9, v62
	v_lshrrev_b32_e32 v62, 3, v62
	v_and_or_b32 v64, 0xe00, v64, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v64, 1, v64
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v66, v60, 1
	v_add_lshl_u32 v73, v64, v62, 1
	v_lshrrev_b32_e32 v64, s80, v23
	ds_store_b16 v71, v66
	ds_load_u16 v62, v73
	v_and_b32_e32 v64, s10, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 9, v64
	v_lshrrev_b32_e32 v64, 3, v64
	v_and_or_b32 v66, 0xe00, v66, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v66, 1, v66
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v68, v62, 1
	v_add_lshl_u32 v75, v66, v64, 1
	v_lshrrev_b32_e32 v66, s80, v24
	ds_store_b16 v73, v68
	ds_load_u16 v64, v75
	v_and_b32_e32 v66, s10, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 9, v66
	v_lshrrev_b32_e32 v66, 3, v66
	v_and_or_b32 v68, 0xe00, v68, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v68, 1, v68
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v70, v64, 1
	v_add_lshl_u32 v77, v68, v66, 1
	v_lshrrev_b32_e32 v68, s80, v13
	ds_store_b16 v75, v70
	ds_load_u16 v66, v77
	v_and_b32_e32 v68, s10, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 9, v68
	v_lshrrev_b32_e32 v68, 3, v68
	v_and_or_b32 v70, 0xe00, v70, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v70, 1, v70
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v72, v66, 1
	v_add_lshl_u32 v79, v70, v68, 1
	v_lshrrev_b32_e32 v70, s80, v14
	ds_store_b16 v77, v72
	ds_load_u16 v68, v79
	v_and_b32_e32 v70, s10, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 9, v70
	v_lshrrev_b32_e32 v70, 3, v70
	v_and_or_b32 v72, 0xe00, v72, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v72, 1, v72
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v74, v68, 1
	v_add_lshl_u32 v81, v72, v70, 1
	v_lshrrev_b32_e32 v72, s80, v15
	ds_store_b16 v79, v74
	ds_load_u16 v70, v81
	v_and_b32_e32 v72, s10, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 9, v72
	v_lshrrev_b32_e32 v72, 3, v72
	v_and_or_b32 v74, 0xe00, v74, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v74, 1, v74
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v76, v70, 1
	v_add_lshl_u32 v83, v74, v72, 1
	v_lshrrev_b32_e32 v74, s80, v16
	ds_store_b16 v81, v76
	ds_load_u16 v72, v83
	v_and_b32_e32 v74, s10, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 9, v74
	v_lshrrev_b32_e32 v74, 3, v74
	v_and_or_b32 v76, 0xe00, v76, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v76, 1, v76
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v78, v72, 1
	v_add_lshl_u32 v85, v76, v74, 1
	v_lshrrev_b32_e32 v76, s80, v5
	ds_store_b16 v83, v78
	ds_load_u16 v74, v85
	v_and_b32_e32 v76, s10, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 9, v76
	v_lshrrev_b32_e32 v76, 3, v76
	v_and_or_b32 v78, 0xe00, v78, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v78, 1, v78
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v80, v74, 1
	v_add_lshl_u32 v87, v78, v76, 1
	v_lshrrev_b32_e32 v78, s80, v6
	ds_store_b16 v85, v80
	ds_load_u16 v76, v87
	v_and_b32_e32 v78, s10, v78
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 9, v78
	v_lshrrev_b32_e32 v78, 3, v78
	v_and_or_b32 v80, 0xe00, v80, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v80, 1, v80
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v82, v76, 1
	v_add_lshl_u32 v89, v80, v78, 1
	v_lshrrev_b32_e32 v80, s80, v7
	ds_store_b16 v87, v82
	ds_load_u16 v78, v89
	v_and_b32_e32 v80, s10, v80
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 9, v80
	v_lshrrev_b32_e32 v80, 3, v80
	v_and_or_b32 v82, 0xe00, v82, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v82, 1, v82
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v84, v78, 1
	v_add_lshl_u32 v90, v82, v80, 1
	v_lshrrev_b32_e32 v82, s80, v8
	ds_store_b16 v89, v84
	ds_load_u16 v80, v90
	v_and_b32_e32 v82, s10, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 9, v82
	v_lshrrev_b32_e32 v82, 3, v82
	v_and_or_b32 v84, 0xe00, v84, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v84, 1, v84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v86, v80, 1
	v_add_lshl_u32 v91, v84, v82, 1
	v_lshrrev_b32_e32 v84, s80, v29
	ds_store_b16 v90, v86
	ds_load_u16 v82, v91
	v_and_b32_e32 v84, s10, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 9, v84
	v_lshrrev_b32_e32 v84, 3, v84
	v_and_or_b32 v86, 0xe00, v86, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v86, 1, v86
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v88, v82, 1
	v_add_lshl_u32 v92, v86, v84, 1
	v_lshrrev_b32_e32 v86, s80, v30
	ds_store_b16 v91, v88
	ds_load_u16 v84, v92
	v_and_b32_e32 v86, s10, v86
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 9, v86
	v_lshrrev_b32_e32 v86, 3, v86
	v_and_or_b32 v88, 0xe00, v88, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v88, 1, v88
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v94, v84, 1
	v_add_lshl_u32 v93, v88, v86, 1
	v_lshrrev_b32_e32 v88, s80, v31
	ds_store_b16 v92, v94
	ds_load_u16 v86, v93
	v_and_b32_e32 v88, s10, v88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 9, v88
	v_lshrrev_b32_e32 v88, 3, v88
	v_and_or_b32 v94, 0xe00, v94, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v94, 1, v94
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v95, v86, 1
	v_add_lshl_u32 v94, v94, v88, 1
	ds_store_b16 v93, v95
	ds_load_u16 v88, v94
	v_lshlrev_b32_e32 v95, 5, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u16 v96, v88, 1
	ds_store_b16 v94, v96
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[96:99], v95 offset1:1
	ds_load_2addr_b64 v[100:103], v95 offset0:2 offset1:3
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v96, v97, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v96, v96, v98, v99
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v97, v96, v100, v101
	v_mbcnt_lo_u32_b32 v96, -1, 0
	v_or_b32_e32 v100, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v97, v97, v102, v103
	v_and_b32_e32 v98, 15, v96
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v99, v97 row_shr:1 row_mask:0xf bank_mask:0xf
	v_cmp_eq_u32_e64 s3, 0, v98
	v_cmp_lt_u32_e64 s4, 1, v98
	v_cmp_lt_u32_e64 s5, 3, v98
	v_cmp_lt_u32_e64 s6, 7, v98
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, v99, 0, s3
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v99, 0, v99, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v97, v97, v99
	v_mov_b32_dpp v99, v97 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v99, 0, v99, s5
	v_add_nc_u32_e32 v97, v97, v99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v99, v97 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v98, 0, v99, s6
	v_bfe_i32 v99, v96, 4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v97, v97, v98
	ds_swizzle_b32 v98, v97 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v98, v99, v98
	v_lshrrev_b32_e32 v99, 5, v0
	v_add_nc_u32_e32 v97, v97, v98
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v99
	v_cmpx_eq_u32_e64 v100, v0
	s_cbranch_execz .LBB62_343
; %bb.342:
	ds_store_b32 v98, v97 offset:16384
.LBB62_343:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_lt_u32_e64 s2, 15, v0
	v_cmp_gt_u32_e32 vcc_lo, 16, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s11, vcc_lo
	s_cbranch_execz .LBB62_345
; %bb.344:
	v_mad_i32_i24 v99, 0xffffffe4, v0, v95
	ds_load_b32 v100, v99 offset:16384
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v101, v100 row_shr:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, v101, 0, s3
	v_add_nc_u32_e32 v100, v101, v100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:2 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	v_mov_b32_dpp v101, v100 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v101, 0, v101, s5
	v_add_nc_u32_e32 v100, v100, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v101, v100 row_shr:8 row_mask:0xf bank_mask:0xf
	v_cndmask_b32_e64 v101, 0, v101, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v100, v100, v101
	ds_store_b32 v99, v100 offset:16384
.LBB62_345:                             ; %_ZN7rocprim6detail20block_scan_warp_scanIjLj512ELj1ELj1EE23calculate_warp_prefixesINS_4plusIjEELj512EEEvjjjRNS0_11raw_storageINS2_13storage_type_EEET_.exit.i.i.i.i.i.i.i.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s11
	v_dual_mov_b32 v100, 0 :: v_dual_mov_b32 v99, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e32 31, v0
	s_cbranch_execz .LBB62_347
; %bb.346:
	ds_load_b32 v99, v98 offset:16380
.LBB62_347:                             ; %_ZN7rocprim6detail16block_radix_rankILj512ELj4ELb0ELj1ELj1EE9rank_keysIjLj31EZNS0_25onesweep_iteration_helperIjjjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EPjN6thrust10device_ptrIjEES9_SC_EEvT0_T1_T2_T3_S9_S9_PNS0_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS0_11raw_storageINS2_13storage_type_EEESE_.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v98, -1, v96
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v97, v99, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s3, 0, v98
	v_cndmask_b32_e64 v98, v98, v96, s3
	v_cmp_eq_u32_e64 s3, 0, v96
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v98, 2, v98
	ds_bpermute_b32 v97, v98, v97
	ds_load_b32 v98, v100 offset:16444
	ds_load_2addr_b64 v[100:103], v95 offset1:1
	ds_load_b32 v104, v95 offset:24
	s_waitcnt lgkmcnt(3)
	v_cndmask_b32_e64 v96, v97, v99, s3
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v96, v98, 16, v96
	ds_load_b64 v[98:99], v95 offset:16
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v97, v96, v100
	v_add_nc_u32_e32 v100, v101, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v101, v102, v100
	v_add_nc_u32_e32 v102, v103, v101
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v103, v98, v102
	v_add_nc_u32_e32 v98, v99, v103
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v99, v104, v98
	ds_store_2addr_b64 v95, v[96:97], v[100:101] offset1:1
	ds_store_2addr_b64 v95, v[102:103], v[98:99] offset0:2 offset1:3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_u16 v95, v33
	ds_load_u16 v96, v34
	ds_load_u16 v97, v43
	ds_load_u16 v45, v45
	ds_load_u16 v47, v47
	ds_load_u16 v49, v49
	ds_load_u16 v51, v51
	ds_load_u16 v53, v53
	ds_load_u16 v55, v55
	ds_load_u16 v57, v57
	ds_load_u16 v59, v59
	ds_load_u16 v61, v61
	ds_load_u16 v63, v63
	ds_load_u16 v65, v65
	ds_load_u16 v67, v67
	ds_load_u16 v69, v69
	ds_load_u16 v71, v71
	ds_load_u16 v73, v73
	ds_load_u16 v75, v75
	ds_load_u16 v77, v77
	ds_load_u16 v79, v79
	ds_load_u16 v81, v81
	ds_load_u16 v83, v83
	ds_load_u16 v85, v85
	ds_load_u16 v87, v87
	ds_load_u16 v89, v89
	ds_load_u16 v90, v90
	ds_load_u16 v91, v91
	ds_load_u16 v92, v92
	ds_load_u16 v93, v93
	ds_load_u16 v43, v94
                                        ; implicit-def: $vgpr33
                                        ; implicit-def: $vgpr34
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB62_351
; %bb.348:
	v_lshrrev_b32_e32 v33, 3, v0
	v_lshlrev_b32_e32 v34, 10, v0
	v_add_nc_u32_e32 v94, 1, v0
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v33, 0x1c00, v34, v33
	v_dual_mov_b32 v34, 0x3e00 :: v_dual_lshlrev_b32 v33, 1, v33
	ds_load_u16 v33, v33
	v_cmpx_ne_u32_e32 16, v94
	s_cbranch_execz .LBB62_350
; %bb.349:
	v_lshlrev_b32_e32 v34, 10, v94
	v_lshrrev_b32_e32 v94, 3, v94
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v34, 0x1c00, v34, v94
	v_lshlrev_b32_e32 v34, 1, v34
	ds_load_u16 v34, v34
.LBB62_350:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v33, 0xffff, v33
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v34, v34, v33
.LBB62_351:                             ; %Flow161
	s_or_b32 exec_lo, exec_lo, s4
	v_and_b32_e32 v35, 0xffff, v35
	s_waitcnt lgkmcnt(30)
	v_and_b32_e32 v94, 0xffff, v95
	v_and_b32_e32 v36, 0xffff, v36
	s_waitcnt lgkmcnt(29)
	v_and_b32_e32 v95, 0xffff, v96
	v_and_b32_e32 v37, 0xffff, v37
	s_waitcnt lgkmcnt(28)
	v_and_b32_e32 v96, 0xffff, v97
	v_add_lshl_u32 v35, v94, v35, 2
	v_and_b32_e32 v38, 0xffff, v38
	s_waitcnt lgkmcnt(27)
	v_and_b32_e32 v45, 0xffff, v45
	v_and_b32_e32 v39, 0xffff, v39
	s_waitcnt lgkmcnt(26)
	v_and_b32_e32 v47, 0xffff, v47
	v_and_b32_e32 v40, 0xffff, v40
	s_waitcnt lgkmcnt(25)
	v_and_b32_e32 v49, 0xffff, v49
	v_and_b32_e32 v41, 0xffff, v41
	s_waitcnt lgkmcnt(24)
	v_and_b32_e32 v51, 0xffff, v51
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v35, v25 offset:64
	v_add_lshl_u32 v25, v95, v36, 2
	v_and_b32_e32 v42, 0xffff, v42
	v_and_b32_e32 v53, 0xffff, v53
	v_add_lshl_u32 v36, v96, v37, 2
	v_and_b32_e32 v44, 0xffff, v44
	v_and_b32_e32 v55, 0xffff, v55
	v_add_lshl_u32 v37, v45, v38, 2
	v_and_b32_e32 v46, 0xffff, v46
	v_and_b32_e32 v57, 0xffff, v57
	v_add_lshl_u32 v38, v47, v39, 2
	v_and_b32_e32 v48, 0xffff, v48
	v_and_b32_e32 v59, 0xffff, v59
	v_add_lshl_u32 v39, v49, v40, 2
	v_and_b32_e32 v50, 0xffff, v50
	v_and_b32_e32 v61, 0xffff, v61
	ds_store_b32 v25, v26 offset:64
	ds_store_b32 v36, v27 offset:64
	ds_store_b32 v37, v28 offset:64
	ds_store_b32 v38, v17 offset:64
	ds_store_b32 v39, v18 offset:64
	v_add_lshl_u32 v17, v51, v41, 2
	v_and_b32_e32 v52, 0xffff, v52
	v_and_b32_e32 v63, 0xffff, v63
	v_add_lshl_u32 v18, v53, v42, 2
	v_and_b32_e32 v54, 0xffff, v54
	v_and_b32_e32 v65, 0xffff, v65
	v_add_lshl_u32 v26, v55, v44, 2
	v_and_b32_e32 v56, 0xffff, v56
	v_and_b32_e32 v67, 0xffff, v67
	v_add_lshl_u32 v27, v57, v46, 2
	v_and_b32_e32 v58, 0xffff, v58
	v_and_b32_e32 v69, 0xffff, v69
	v_add_lshl_u32 v28, v59, v48, 2
	v_and_b32_e32 v60, 0xffff, v60
	v_and_b32_e32 v71, 0xffff, v71
	ds_store_b32 v17, v19 offset:64
	ds_store_b32 v18, v20 offset:64
	ds_store_b32 v26, v9 offset:64
	ds_store_b32 v27, v10 offset:64
	ds_store_b32 v28, v11 offset:64
	v_add_lshl_u32 v9, v61, v50, 2
	v_and_b32_e32 v62, 0xffff, v62
	v_and_b32_e32 v73, 0xffff, v73
	v_add_lshl_u32 v10, v63, v52, 2
	v_and_b32_e32 v64, 0xffff, v64
	v_and_b32_e32 v75, 0xffff, v75
	v_add_lshl_u32 v11, v65, v54, 2
	v_and_b32_e32 v66, 0xffff, v66
	v_and_b32_e32 v77, 0xffff, v77
	v_add_lshl_u32 v19, v67, v56, 2
	v_and_b32_e32 v68, 0xffff, v68
	v_and_b32_e32 v79, 0xffff, v79
	v_add_lshl_u32 v20, v69, v58, 2
	v_and_b32_e32 v70, 0xffff, v70
	v_and_b32_e32 v81, 0xffff, v81
	ds_store_b32 v9, v12 offset:64
	ds_store_b32 v10, v1 offset:64
	ds_store_b32 v11, v2 offset:64
	ds_store_b32 v19, v3 offset:64
	ds_store_b32 v20, v4 offset:64
	v_add_lshl_u32 v12, v71, v60, 2
	v_and_b32_e32 v72, 0xffff, v72
	v_and_b32_e32 v83, 0xffff, v83
	v_add_lshl_u32 v40, v73, v62, 2
	v_and_b32_e32 v74, 0xffff, v74
	v_and_b32_e32 v85, 0xffff, v85
	v_add_lshl_u32 v41, v75, v64, 2
	v_and_b32_e32 v76, 0xffff, v76
	v_and_b32_e32 v87, 0xffff, v87
	v_add_lshl_u32 v42, v77, v66, 2
	v_and_b32_e32 v78, 0xffff, v78
	v_and_b32_e32 v89, 0xffff, v89
	v_and_b32_e32 v94, 0xffff, v43
	v_add_lshl_u32 v43, v79, v68, 2
	v_and_b32_e32 v80, 0xffff, v80
	v_and_b32_e32 v82, 0xffff, v82
	v_and_b32_e32 v84, 0xffff, v84
	v_and_b32_e32 v86, 0xffff, v86
	v_and_b32_e32 v88, 0xffff, v88
	v_and_b32_e32 v90, 0xffff, v90
	v_and_b32_e32 v91, 0xffff, v91
	v_and_b32_e32 v92, 0xffff, v92
	v_and_b32_e32 v93, 0xffff, v93
	ds_store_b32 v12, v21 offset:64
	ds_store_b32 v40, v22 offset:64
	ds_store_b32 v41, v23 offset:64
	ds_store_b32 v42, v24 offset:64
	ds_store_b32 v43, v13 offset:64
	v_add_lshl_u32 v13, v81, v70, 2
	v_add_lshl_u32 v21, v83, v72, 2
	v_add_lshl_u32 v22, v85, v74, 2
	v_add_lshl_u32 v23, v87, v76, 2
	v_add_lshl_u32 v24, v89, v78, 2
	ds_store_b32 v13, v14 offset:64
	ds_store_b32 v21, v15 offset:64
	ds_store_b32 v22, v16 offset:64
	ds_store_b32 v23, v5 offset:64
	ds_store_b32 v24, v6 offset:64
	v_add_lshl_u32 v14, v90, v80, 2
	v_add_lshl_u32 v15, v91, v82, 2
	v_add_lshl_u32 v16, v92, v84, 2
	v_add_lshl_u32 v44, v93, v86, 2
	v_add_lshl_u32 v45, v94, v88, 2
	ds_store_b32 v14, v7 offset:64
	ds_store_b32 v15, v8 offset:64
	ds_store_b32 v16, v29 offset:64
	ds_store_b32 v44, v30 offset:64
	ds_store_b32 v45, v31 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s3
; %bb.352:                              ; %_ZN7rocprim16block_radix_rankILj512ELj4ELNS_26block_radix_rank_algorithmE0ELj1ELj1EE9rank_keysIjLj31EZNS_6detail25onesweep_iteration_helperIjjjLj512ELj31ELj4ELb0ELS1_0ENS_19identity_decomposerEE8onesweepILb1EPjN6thrust10device_ptrIjEES9_SC_EEvT0_T1_T2_T3_S9_S9_PNS4_23onesweep_lookback_stateES6_jjjRNS7_13storage_type_EEUlRKjE_EEvRAT0__KT_RAT0__jRNS4_11raw_storageINS4_16block_radix_rankILj512ELj4ELb0ELj1ELj1EE13storage_type_EEESE_RA1_jS11_.exit._crit_edge.i.i
	v_mov_b32_e32 v1, 0
; %bb.353:                              ; %Flow158
	s_and_not1_saveexec_b32 s3, s2
	s_cbranch_execz .LBB62_364
; %bb.354:
	v_lshl_or_b32 v3, s15, 4, v0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v7, 0
	s_mov_b32 s4, 0
	s_mov_b32 s5, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_or_b32_e32 v3, 2.0, v34
	v_add_co_u32 v1, s2, s84, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s2, s85, v2, s2
                                        ; implicit-def: $sgpr2
	global_store_b32 v[1:2], v3, off
.LBB62_355:                             ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB62_358 Depth 2
	s_or_b32 s2, s2, exec_lo
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB62_361
; %bb.356:                              ;   in Loop: Header=BB62_355 Depth=1
	s_add_i32 s5, s5, -1
	s_mov_b32 s6, exec_lo
	v_lshl_or_b32 v3, s5, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_co_u32 v5, s2, s84, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s2, s85, v6, s2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB62_360
; %bb.357:                              ; %.lr.ph.i.i.preheader
                                        ;   in Loop: Header=BB62_355 Depth=1
	s_mov_b32 s11, 0
.LBB62_358:                             ; %.lr.ph.i.i
                                        ;   Parent Loop BB62_355 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v8, v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, -2.0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s2, 0, v3
	s_or_b32 s11, s2, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB62_358
; %bb.359:                              ; %Flow155
                                        ;   in Loop: Header=BB62_355 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB62_360:                             ; %Flow156
                                        ;   in Loop: Header=BB62_355 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s6
	v_and_b32_e32 v5, 0x3fffffff, v8
	v_cmp_eq_u32_e64 s2, 0x80000000, v3
	v_add_nc_u32_e32 v7, v5, v7
	s_branch .LBB62_362
.LBB62_361:                             ;   in Loop: Header=BB62_355 Depth=1
                                        ; implicit-def: $sgpr5
.LBB62_362:                             ; %Flow157
                                        ;   in Loop: Header=BB62_355 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s6, exec_lo, s2
	s_or_b32 s4, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB62_355
; %bb.363:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v3, v7, v34
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	global_store_b32 v[1:2], v3, off
	global_load_b32 v1, v4, s[76:77]
	v_sub_nc_u32_e32 v2, v7, v33
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v2, v2, v1
	ds_store_b32 v4, v2
.LBB62_364:                             ; %Flow159
	s_or_b32 exec_lo, exec_lo, s3
	v_lshlrev_b32_e32 v2, 2, v0
	v_lshlrev_b32_e32 v69, 2, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v4, 64, v2
	ds_load_2addr_stride64_b32 v[7:8], v4 offset0:8 offset1:16
	ds_load_2addr_stride64_b32 v[30:31], v4 offset0:24 offset1:32
	ds_load_2addr_stride64_b32 v[46:47], v4 offset0:40 offset1:48
	ds_load_2addr_stride64_b32 v[50:51], v4 offset0:56 offset1:64
	ds_load_2addr_stride64_b32 v[58:59], v4 offset0:72 offset1:80
	ds_load_2addr_stride64_b32 v[60:61], v4 offset0:88 offset1:96
	ds_load_2addr_stride64_b32 v[67:68], v4 offset0:104 offset1:112
	ds_load_b32 v53, v69 offset:64
	s_waitcnt lgkmcnt(7)
	v_lshrrev_b32_e32 v2, s80, v7
	s_waitcnt lgkmcnt(6)
	v_lshrrev_b32_e32 v3, s80, v30
	s_waitcnt lgkmcnt(5)
	v_lshrrev_b32_e32 v5, s80, v46
	s_waitcnt lgkmcnt(4)
	v_lshrrev_b32_e32 v6, s80, v50
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v29, s80, v58
	v_and_b32_e32 v2, s10, v2
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v48, s80, v60
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v49, s80, v67
	v_and_b32_e32 v6, s10, v6
	v_and_b32_e32 v3, s10, v3
	v_lshlrev_b32_e32 v72, 2, v2
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v2, s80, v53
	v_and_b32_e32 v5, s10, v5
	v_and_b32_e32 v29, s10, v29
	v_and_b32_e32 v48, s10, v48
	v_and_b32_e32 v49, s10, v49
	v_and_b32_e32 v2, s10, v2
	v_lshlrev_b32_e32 v57, 2, v6
	v_lshrrev_b32_e32 v6, s80, v8
	v_lshlrev_b32_e32 v71, 2, v3
	v_mov_b32_e32 v3, 0
	v_lshlrev_b32_e32 v73, 2, v2
	v_lshlrev_b32_e32 v70, 2, v5
	v_lshlrev_b32_e32 v56, 2, v29
	v_lshlrev_b32_e32 v55, 2, v48
	v_lshlrev_b32_e32 v54, 2, v49
	ds_load_b32 v5, v72
	ds_load_b32 v29, v71
	ds_load_b32 v62, v70
	ds_load_b32 v85, v57
	ds_load_b32 v86, v56
	ds_load_b32 v87, v55
	ds_load_b32 v88, v54
	v_and_b32_e32 v6, s10, v6
	ds_load_b32 v77, v73
	v_lshrrev_b32_e32 v48, s80, v31
	v_lshrrev_b32_e32 v52, s80, v51
	v_lshrrev_b32_e32 v2, s80, v61
	v_lshlrev_b32_e32 v76, 2, v6
	v_lshrrev_b32_e32 v49, s80, v47
	v_lshrrev_b32_e32 v63, s80, v59
	v_lshrrev_b32_e32 v64, s80, v68
	v_and_b32_e32 v48, s10, v48
	ds_load_b32 v81, v76
	v_and_b32_e32 v52, s10, v52
	v_and_b32_e32 v2, s10, v2
	v_and_b32_e32 v49, s10, v49
	v_and_b32_e32 v63, s10, v63
	v_and_b32_e32 v78, s10, v64
	v_lshlrev_b32_e32 v75, 2, v48
	v_lshlrev_b32_e32 v66, 2, v52
	v_lshlrev_b32_e32 v64, 2, v2
	v_or_b32_e32 v52, 0x200, v0
	v_lshlrev_b32_e32 v74, 2, v49
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v77, v0
	v_lshlrev_b32_e32 v65, 2, v63
	v_lshlrev_b32_e32 v63, 2, v78
	ds_load_b32 v89, v75
	ds_load_b32 v90, v74
	ds_load_b32 v91, v66
	ds_load_b32 v92, v65
	ds_load_b32 v93, v64
	ds_load_b32 v97, v63
	v_or_b32_e32 v49, 0x400, v0
	v_lshlrev_b64 v[77:78], 2, v[2:3]
	v_add_nc_u32_e32 v2, v5, v52
	v_or_b32_e32 v48, 0x600, v0
	v_or_b32_e32 v6, 0x800, v0
	v_or_b32_e32 v5, 0xa00, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[79:80], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v81, v49
	v_add_co_u32 v77, s2, s70, v77
	v_add_co_ci_u32_e64 v78, s2, s71, v78, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[81:82], 2, v[2:3]
	v_add_nc_u32_e32 v2, v29, v48
	v_add_co_u32 v79, s2, s70, v79
	v_add_co_ci_u32_e64 v80, s2, s71, v80, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[83:84], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v89, v6
	v_add_co_u32 v81, s2, s70, v81
	v_add_co_ci_u32_e64 v82, s2, s71, v82, s2
	s_clause 0x1
	global_store_b32 v[77:78], v53, off
	global_store_b32 v[79:80], v7, off
	v_lshlrev_b64 v[77:78], 2, v[2:3]
	v_add_nc_u32_e32 v2, v62, v5
	v_or_b32_e32 v29, 0xc00, v0
	global_store_b32 v[81:82], v8, off
	v_add_co_u32 v79, s2, s70, v83
	v_lshlrev_b64 v[81:82], 2, v[2:3]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v90, v29
	v_or_b32_e32 v7, 0xe00, v0
	v_add_co_ci_u32_e64 v80, s2, s71, v84, s2
	v_add_co_u32 v77, s2, s70, v77
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v78, s2, s71, v78, s2
	v_add_co_u32 v81, s2, s70, v81
	v_lshlrev_b64 v[83:84], 2, v[2:3]
	v_add_nc_u32_e32 v2, v85, v7
	v_or_b32_e32 v8, 0x1000, v0
	v_add_co_ci_u32_e64 v82, s2, s71, v82, s2
	s_clause 0x2
	global_store_b32 v[79:80], v30, off
	global_store_b32 v[77:78], v31, off
	global_store_b32 v[81:82], v46, off
	v_lshlrev_b64 v[30:31], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v91, v8
	v_or_b32_e32 v46, 0x1200, v0
	v_add_co_u32 v77, s2, s70, v83
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v78, s2, s71, v84, s2
	v_lshlrev_b64 v[79:80], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v2, v86, v46
	v_add_co_u32 v81, s2, s70, v30
	v_or_b32_e32 v30, 0x1400, v0
	v_add_co_ci_u32_e64 v82, s2, s71, v31, s2
	v_lshlrev_b64 v[83:84], 2, v[2:3]
	v_add_co_u32 v79, s2, s70, v79
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v80, s2, s71, v80, s2
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v2, v92, v30
	v_or_b32_e32 v31, 0x1600, v0
	s_clause 0x2
	global_store_b32 v[77:78], v47, off
	global_store_b32 v[81:82], v50, off
	global_store_b32 v[79:80], v51, off
	v_add_co_u32 v77, s2, s70, v83
	v_lshlrev_b64 v[50:51], 2, v[2:3]
	v_add_nc_u32_e32 v2, v87, v31
	v_add_co_ci_u32_e64 v78, s2, s71, v84, s2
	ds_load_2addr_stride64_b32 v[84:85], v4 offset0:120 offset1:128
	ds_load_2addr_stride64_b32 v[86:87], v4 offset0:136 offset1:144
	v_or_b32_e32 v47, 0x1800, v0
	v_lshlrev_b64 v[79:80], 2, v[2:3]
	v_add_co_u32 v81, s2, s70, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v82, s2, s71, v51, s2
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v93, v47
	global_store_b32 v[77:78], v58, off
	v_add_co_u32 v79, s2, s70, v79
	v_add_co_ci_u32_e64 v80, s2, s71, v80, s2
	v_lshlrev_b64 v[77:78], 2, v[2:3]
	s_clause 0x1
	global_store_b32 v[81:82], v59, off
	global_store_b32 v[79:80], v60, off
	v_or_b32_e32 v50, 0x1a00, v0
	ds_load_2addr_stride64_b32 v[93:94], v4 offset0:152 offset1:160
	ds_load_2addr_stride64_b32 v[95:96], v4 offset0:168 offset1:176
	v_add_co_u32 v58, s2, s70, v77
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v59, s2, s71, v78, s2
	s_waitcnt lgkmcnt(3)
	v_lshrrev_b32_e32 v53, s80, v84
	v_add_nc_u32_e32 v2, v88, v50
	v_or_b32_e32 v51, 0x1c00, v0
	global_store_b32 v[58:59], v61, off
	v_lshrrev_b32_e32 v60, s80, v85
	v_and_b32_e32 v58, s10, v53
	v_lshlrev_b64 v[81:82], 2, v[2:3]
	v_add_nc_u32_e32 v2, v97, v51
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v62, s80, v86
	v_and_b32_e32 v59, s10, v60
	v_lshlrev_b32_e32 v78, 2, v58
	v_lshrrev_b32_e32 v58, s80, v87
	v_lshlrev_b64 v[60:61], 2, v[2:3]
	v_and_b32_e32 v2, s10, v62
	v_lshlrev_b32_e32 v79, 2, v59
	ds_load_b32 v62, v78
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v59, s80, v94
	v_and_b32_e32 v58, s10, v58
	v_lshlrev_b32_e32 v80, 2, v2
	ds_load_b32 v88, v79
	v_lshrrev_b32_e32 v2, s80, v93
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v77, s80, v95
	v_lshrrev_b32_e32 v83, s80, v96
	v_and_b32_e32 v59, s10, v59
	v_lshlrev_b32_e32 v89, 2, v58
	v_and_b32_e32 v2, s10, v2
	v_and_b32_e32 v58, s10, v77
	v_and_b32_e32 v77, s10, v83
	v_or_b32_e32 v53, 0x1e00, v0
	v_lshlrev_b32_e32 v91, 2, v59
	v_lshlrev_b32_e32 v90, 2, v2
	v_lshlrev_b32_e32 v92, 2, v58
	v_lshlrev_b32_e32 v83, 2, v77
	ds_load_b32 v77, v80
	ds_load_b32 v101, v89
	ds_load_b32 v102, v90
	ds_load_b32 v103, v91
	ds_load_b32 v105, v92
	ds_load_b32 v106, v83
	v_or_b32_e32 v59, 0x2000, v0
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v2, v62, v53
	v_add_co_u32 v81, s2, s70, v81
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v82, s2, s71, v82, s2
	v_lshlrev_b64 v[97:98], 2, v[2:3]
	v_add_co_u32 v99, s2, s70, v60
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v88, v59
	v_or_b32_e32 v58, 0x2200, v0
	v_add_co_ci_u32_e64 v100, s2, s71, v61, s2
	v_add_co_u32 v61, s2, s70, v97
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v62, s2, s71, v98, s2
	v_lshlrev_b64 v[97:98], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v77, v58
	v_or_b32_e32 v60, 0x2400, v0
	s_clause 0x2
	global_store_b32 v[81:82], v67, off
	global_store_b32 v[99:100], v68, off
	global_store_b32 v[61:62], v84, off
	v_or_b32_e32 v62, 0x2600, v0
	v_or_b32_e32 v61, 0x2800, v0
	v_lshlrev_b64 v[67:68], 2, v[2:3]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v101, v60
	v_add_co_u32 v81, s2, s70, v97
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v82, s2, s71, v98, s2
	v_lshlrev_b64 v[97:98], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v102, v62
	ds_load_2addr_stride64_b32 v[101:102], v4 offset0:184 offset1:192
	v_add_co_u32 v67, s2, s70, v67
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v68, s2, s71, v68, s2
	v_lshlrev_b64 v[99:100], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v103, v61
	s_clause 0x1
	global_store_b32 v[81:82], v85, off
	global_store_b32 v[67:68], v86, off
	ds_load_2addr_stride64_b32 v[103:104], v4 offset0:200 offset1:208
	v_or_b32_e32 v68, 0x2a00, v0
	v_add_co_u32 v97, s2, s70, v97
	v_lshlrev_b64 v[81:82], 2, v[2:3]
	v_add_co_ci_u32_e64 v98, s2, s71, v98, s2
	v_add_co_u32 v84, s2, s70, v99
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v105, v68
	v_add_co_ci_u32_e64 v85, s2, s71, v100, s2
	v_add_co_u32 v86, s2, s70, v81
	global_store_b32 v[97:98], v87, off
	ds_load_2addr_stride64_b32 v[97:98], v4 offset0:216 offset1:224
	v_add_co_ci_u32_e64 v87, s2, s71, v82, s2
	v_lshlrev_b64 v[81:82], 2, v[2:3]
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v77, s80, v101
	ds_load_2addr_stride64_b32 v[99:100], v4 offset0:232 offset1:240
	v_or_b32_e32 v67, 0x2c00, v0
	v_lshrrev_b32_e32 v88, s80, v102
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v109, s80, v103
	v_add_co_u32 v105, s2, s70, v81
	v_and_b32_e32 v81, s10, v77
	v_add_nc_u32_e32 v2, v106, v67
	v_add_co_ci_u32_e64 v106, s2, s71, v82, s2
	v_and_b32_e32 v82, s10, v88
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b32_e32 v124, 2, v81
	v_lshlrev_b64 v[107:108], 2, v[2:3]
	v_and_b32_e32 v2, s10, v109
	v_lshrrev_b32_e32 v81, s80, v104
	v_lshlrev_b32_e32 v125, 2, v82
	ds_load_b32 v88, v124
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v82, s80, v98
	v_lshlrev_b32_e32 v126, 2, v2
	v_lshrrev_b32_e32 v2, s80, v97
	ds_load_b32 v111, v125
	s_waitcnt lgkmcnt(2)
	v_lshrrev_b32_e32 v109, s80, v99
	v_lshrrev_b32_e32 v110, s80, v100
	v_and_b32_e32 v81, s10, v81
	v_and_b32_e32 v2, s10, v2
	v_and_b32_e32 v82, s10, v82
	v_and_b32_e32 v109, s10, v109
	v_and_b32_e32 v110, s10, v110
	v_lshlrev_b32_e32 v127, 2, v81
	v_lshlrev_b32_e32 v128, 2, v2
	v_lshlrev_b32_e32 v129, 2, v82
	v_or_b32_e32 v77, 0x2e00, v0
	v_lshlrev_b32_e32 v130, 2, v109
	v_lshlrev_b32_e32 v131, 2, v110
	ds_load_b32 v82, v126
	ds_load_b32 v109, v127
	ds_load_b32 v110, v128
	ds_load_b32 v112, v129
	ds_load_b32 v113, v130
	ds_load_b32 v114, v131
	v_or_b32_e32 v81, 0x3000, v0
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v2, v88, v77
	s_clause 0x2
	global_store_b32 v[84:85], v93, off
	global_store_b32 v[86:87], v94, off
	global_store_b32 v[105:106], v95, off
	v_or_b32_e32 v84, 0x3200, v0
	v_add_co_u32 v87, s2, s70, v107
	v_lshlrev_b64 v[85:86], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v111, v81
	v_add_co_ci_u32_e64 v88, s2, s71, v108, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[93:94], 2, v[2:3]
	v_add_co_u32 v105, s2, s70, v85
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v82, v84
	v_or_b32_e32 v82, 0x3400, v0
	v_add_co_ci_u32_e64 v106, s2, s71, v86, s2
	v_add_co_u32 v93, s2, s70, v93
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[107:108], 2, v[2:3]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v109, v82
	v_or_b32_e32 v85, 0x3600, v0
	v_add_co_ci_u32_e64 v94, s2, s71, v94, s2
	s_clause 0x2
	global_store_b32 v[87:88], v96, off
	global_store_b32 v[105:106], v101, off
	global_store_b32 v[93:94], v102, off
	v_lshlrev_b64 v[87:88], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v110, v85
	v_or_b32_e32 v86, 0x3800, v0
	v_add_co_u32 v93, s2, s70, v107
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v94, s2, s71, v108, s2
	v_lshlrev_b64 v[95:96], 2, v[2:3]
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v2, v112, v86
	v_add_co_u32 v101, s2, s70, v87
	v_or_b32_e32 v87, 0x3a00, v0
	v_add_co_ci_u32_e64 v102, s2, s71, v88, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[105:106], 2, v[2:3]
	v_or_b32_e32 v88, 0x3c00, v0
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v113, v87
	v_add_co_u32 v95, s2, s70, v95
	v_add_co_ci_u32_e64 v96, s2, s71, v96, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[107:108], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v114, v88
	v_add_co_u32 v105, s2, s70, v105
	v_add_co_ci_u32_e64 v106, s2, s71, v106, s2
	s_clause 0x3
	global_store_b32 v[93:94], v103, off
	global_store_b32 v[101:102], v104, off
	global_store_b32 v[95:96], v97, off
	global_store_b32 v[105:106], v98, off
	v_lshlrev_b64 v[93:94], 2, v[2:3]
	v_add_co_u32 v95, s2, s70, v107
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v96, s2, s71, v108, s2
	v_lshlrev_b32_e32 v2, 2, v32
	v_add_co_u32 v93, s2, s70, v93
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v94, s2, s71, v94, s2
	s_add_u32 s2, s72, s8
	s_addc_u32 s3, s73, s9
	s_clause 0x1
	global_store_b32 v[95:96], v99, off
	global_store_b32 v[93:94], v100, off
	s_clause 0x7
	global_load_b128 v[93:96], v2, s[2:3]
	global_load_b128 v[97:100], v2, s[2:3] offset:16
	global_load_b128 v[101:104], v2, s[2:3] offset:32
	global_load_b128 v[105:108], v2, s[2:3] offset:48
	global_load_b128 v[109:112], v2, s[2:3] offset:64
	global_load_b128 v[113:116], v2, s[2:3] offset:80
	global_load_b128 v[117:120], v2, s[2:3] offset:96
	global_load_b96 v[121:123], v2, s[2:3] offset:112
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v35, v93 offset:64
	ds_store_b32 v25, v94 offset:64
	ds_store_b32 v36, v95 offset:64
	ds_store_b32 v37, v96 offset:64
	ds_store_b32 v38, v97 offset:64
	ds_store_b32 v39, v98 offset:64
	ds_store_b32 v17, v99 offset:64
	ds_store_b32 v18, v100 offset:64
	ds_store_b32 v26, v101 offset:64
	ds_store_b32 v27, v102 offset:64
	ds_store_b32 v28, v103 offset:64
	ds_store_b32 v9, v104 offset:64
	ds_store_b32 v10, v105 offset:64
	ds_store_b32 v11, v106 offset:64
	ds_store_b32 v19, v107 offset:64
	ds_store_b32 v20, v108 offset:64
	ds_store_b32 v12, v109 offset:64
	ds_store_b32 v40, v110 offset:64
	ds_store_b32 v41, v111 offset:64
	ds_store_b32 v42, v112 offset:64
	ds_store_b32 v43, v113 offset:64
	ds_store_b32 v13, v114 offset:64
	ds_store_b32 v21, v115 offset:64
	ds_store_b32 v22, v116 offset:64
	ds_store_b32 v23, v117 offset:64
	ds_store_b32 v24, v118 offset:64
	ds_store_b32 v14, v119 offset:64
	ds_store_b32 v15, v120 offset:64
	ds_store_b32 v16, v121 offset:64
	ds_store_b32 v44, v122 offset:64
	ds_store_b32 v45, v123 offset:64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_stride64_b32 v[9:10], v4 offset0:8 offset1:16
	ds_load_2addr_stride64_b32 v[11:12], v4 offset0:24 offset1:32
	ds_load_2addr_stride64_b32 v[13:14], v4 offset0:40 offset1:48
	ds_load_b32 v32, v69 offset:64
	ds_load_b32 v2, v73
	ds_load_b32 v39, v72
	ds_load_b32 v45, v76
	ds_load_b32 v69, v71
	ds_load_b32 v71, v75
	ds_load_b32 v70, v70
	ds_load_b32 v72, v74
	ds_load_2addr_stride64_b32 v[15:16], v4 offset0:56 offset1:64
	ds_load_2addr_stride64_b32 v[17:18], v4 offset0:72 offset1:80
	ds_load_2addr_stride64_b32 v[19:20], v4 offset0:88 offset1:96
	ds_load_2addr_stride64_b32 v[21:22], v4 offset0:104 offset1:112
	ds_load_b32 v73, v57
	ds_load_b32 v66, v66
	ds_load_b32 v74, v56
	ds_load_b32 v65, v65
	ds_load_b32 v75, v55
	ds_load_b32 v76, v64
	ds_load_b32 v93, v54
	ds_load_b32 v94, v63
	ds_load_2addr_stride64_b32 v[23:24], v4 offset0:120 offset1:128
	ds_load_2addr_stride64_b32 v[25:26], v4 offset0:136 offset1:144
	ds_load_2addr_stride64_b32 v[27:28], v4 offset0:152 offset1:160
	ds_load_2addr_stride64_b32 v[35:36], v4 offset0:168 offset1:176
	s_waitcnt lgkmcnt(22)
	v_add_nc_u32_e32 v2, v2, v0
	ds_load_b32 v78, v78
	ds_load_b32 v79, v79
	ds_load_b32 v80, v80
	ds_load_b32 v89, v89
	ds_load_b32 v90, v90
	ds_load_b32 v91, v91
	ds_load_b32 v92, v92
	ds_load_b32 v83, v83
	v_lshlrev_b64 v[37:38], 2, v[2:3]
	s_waitcnt lgkmcnt(29)
	v_add_nc_u32_e32 v2, v39, v52
	ds_load_2addr_stride64_b32 v[39:40], v4 offset0:184 offset1:192
	ds_load_2addr_stride64_b32 v[41:42], v4 offset0:200 offset1:208
	ds_load_2addr_stride64_b32 v[43:44], v4 offset0:216 offset1:224
	ds_load_2addr_stride64_b32 v[54:55], v4 offset0:232 offset1:240
	v_lshlrev_b64 v[56:57], 2, v[2:3]
	s_waitcnt lgkmcnt(32)
	v_add_nc_u32_e32 v2, v45, v49
	v_add_co_u32 v37, s2, s74, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v38, s2, s75, v38, s2
	v_lshlrev_b64 v[63:64], 2, v[2:3]
	s_waitcnt lgkmcnt(31)
	v_add_nc_u32_e32 v2, v69, v48
	v_add_co_u32 v48, s2, s74, v56
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v49, s2, s75, v57, s2
	ds_load_b32 v45, v124
	ds_load_b32 v52, v125
	ds_load_b32 v69, v126
	ds_load_b32 v95, v127
	ds_load_b32 v96, v128
	ds_load_b32 v97, v129
	ds_load_b32 v98, v130
	ds_load_b32 v99, v131
	global_store_b32 v[37:38], v32, off
	v_lshlrev_b64 v[37:38], 2, v[2:3]
	s_waitcnt lgkmcnt(38)
	v_add_nc_u32_e32 v2, v71, v6
	global_store_b32 v[48:49], v9, off
	v_add_co_u32 v48, s2, s74, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v49, s2, s75, v64, s2
	v_lshlrev_b64 v[56:57], 2, v[2:3]
	s_waitcnt lgkmcnt(37)
	v_add_nc_u32_e32 v2, v70, v5
	v_add_co_u32 v4, s2, s74, v37
	v_add_co_ci_u32_e64 v5, s2, s75, v38, s2
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[37:38], 2, v[2:3]
	s_waitcnt lgkmcnt(36)
	v_add_nc_u32_e32 v2, v72, v29
	s_clause 0x1
	global_store_b32 v[48:49], v10, off
	global_store_b32 v[4:5], v11, off
	v_add_co_u32 v56, s2, s74, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v57, s2, s75, v57, s2
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(31)
	v_add_nc_u32_e32 v2, v73, v7
	v_add_co_u32 v6, s2, s74, v37
	v_add_co_ci_u32_e64 v7, s2, s75, v38, s2
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[9:10], 2, v[2:3]
	s_waitcnt lgkmcnt(30)
	v_add_nc_u32_e32 v2, v66, v8
	v_add_co_u32 v4, s2, s74, v4
	global_store_b32 v[56:57], v12, off
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	v_lshlrev_b64 v[11:12], 2, v[2:3]
	s_waitcnt lgkmcnt(29)
	v_add_nc_u32_e32 v2, v74, v46
	v_add_co_u32 v8, s2, s74, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s2, s75, v10, s2
	s_clause 0x1
	global_store_b32 v[6:7], v13, off
	global_store_b32 v[4:5], v14, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(28)
	v_add_nc_u32_e32 v2, v65, v30
	global_store_b32 v[8:9], v15, off
	v_add_co_u32 v6, s2, s74, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v12, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(27)
	v_add_nc_u32_e32 v2, v75, v31
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(26)
	v_add_nc_u32_e32 v2, v76, v47
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v16, off
	global_store_b32 v[4:5], v17, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(25)
	v_add_nc_u32_e32 v2, v93, v50
	global_store_b32 v[8:9], v18, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(24)
	v_add_nc_u32_e32 v2, v94, v51
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(19)
	v_add_nc_u32_e32 v2, v78, v53
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v19, off
	global_store_b32 v[4:5], v20, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(18)
	v_add_nc_u32_e32 v2, v79, v59
	global_store_b32 v[8:9], v21, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(17)
	v_add_nc_u32_e32 v2, v80, v58
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(16)
	v_add_nc_u32_e32 v2, v89, v60
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v22, off
	global_store_b32 v[4:5], v23, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(15)
	v_add_nc_u32_e32 v2, v90, v62
	global_store_b32 v[8:9], v24, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(14)
	v_add_nc_u32_e32 v2, v91, v61
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(13)
	v_add_nc_u32_e32 v2, v92, v68
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v25, off
	global_store_b32 v[4:5], v26, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(12)
	v_add_nc_u32_e32 v2, v83, v67
	global_store_b32 v[8:9], v27, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(7)
	v_add_nc_u32_e32 v2, v45, v77
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(6)
	v_add_nc_u32_e32 v2, v52, v81
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v28, off
	global_store_b32 v[4:5], v35, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(5)
	v_add_nc_u32_e32 v2, v69, v84
	global_store_b32 v[8:9], v36, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(4)
	v_add_nc_u32_e32 v2, v95, v82
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(3)
	v_add_nc_u32_e32 v2, v96, v85
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_clause 0x1
	global_store_b32 v[6:7], v39, off
	global_store_b32 v[4:5], v40, off
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(2)
	v_add_nc_u32_e32 v2, v97, v86
	global_store_b32 v[8:9], v41, off
	v_add_co_u32 v6, s2, s74, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s75, v11, s2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v2, v98, v87
	v_add_co_u32 v4, s2, s74, v4
	v_add_co_ci_u32_e64 v5, s2, s75, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v99, v88
	v_add_co_u32 v8, s2, s74, v8
	v_add_co_ci_u32_e64 v9, s2, s75, v9, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v10, s2, s74, v10
	v_add_co_ci_u32_e64 v11, s2, s75, v11, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s2, s74, v2
	v_add_co_ci_u32_e64 v3, s2, s75, v3, s2
	s_clause 0x4
	global_store_b32 v[6:7], v42, off
	global_store_b32 v[4:5], v43, off
	global_store_b32 v[8:9], v44, off
	global_store_b32 v[10:11], v54, off
	global_store_b32 v[2:3], v55, off
	s_load_b32 s0, s[0:1], 0x50
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s0
	s_cselect_b32 s0, -1, 0
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
; %bb.365:
	v_add_nc_u32_e32 v2, v33, v34
	s_or_b32 s7, s7, exec_lo
; %bb.366:                              ; %Flow167
	s_or_b32 exec_lo, exec_lo, s0
.LBB62_367:                             ; %Flow166
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB62_369
; %bb.368:                              ; %_ZN7rocprim6detail25onesweep_iteration_helperIjjjLj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0ENS_19identity_decomposerEE8onesweepILb1EPjN6thrust10device_ptrIjEES6_S9_EEvT0_T1_T2_T3_S6_S6_PNS0_23onesweep_lookback_stateES3_jjjRNS4_13storage_type_E.exit.sink.split.i
	v_lshlrev_b32_e32 v3, 2, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	ds_load_b32 v3, v3
	v_add_co_u32 v0, vcc_lo, s78, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s79, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB62_369:                             ; %_ZN7rocprim6detail18onesweep_iterationILj512ELj31ELj4ELb0ELNS_26block_radix_rank_algorithmE0EPjN6thrust10device_ptrIjEES3_S6_jNS_19identity_decomposerEEEvT4_T5_T6_T7_jPT8_SD_PNS0_23onesweep_lookback_stateET9_jjj.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
		.amdhsa_group_segment_fixed_size 63552
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 132
		.amdhsa_next_free_sgpr 88
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,"axG",@progbits,_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj,comdat
.Lfunc_end62:
	.size	_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj, .Lfunc_end62-_ZN7rocprim6detail25onesweep_iteration_kernelINS0_34wrapped_radix_sort_onesweep_configINS_14default_configEjjEELb0EPjN6thrust10device_ptrIjEES5_S8_jNS_19identity_decomposerEEEvT1_T2_T3_T4_jPT5_SF_PNS0_23onesweep_lookback_stateET6_jjj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 24956
; NumSgprs: 90
; NumVgprs: 132
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 63552 bytes/workgroup (compile time only)
; SGPRBlocks: 11
; VGPRBlocks: 16
; NumSGPRsForWavesPerEU: 90
; NumVGPRsForWavesPerEU: 132
; Occupancy: 8
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           1
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8224
    .kernarg_segment_align: 8
    .kernarg_segment_size: 48
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 256
    .name:           _ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj
    .private_segment_fixed_size: 0
    .sgpr_count:     32
    .sgpr_spill_count: 0
    .symbol:         _ZN7rocprim6detail28radix_sort_block_sort_kernelINS0_36wrapped_radix_sort_block_sort_configINS_13kernel_configILj256ELj4ELj4294967295EEEjhEELb0EN6thrust10device_ptrIjEES8_NS7_IhEES9_NS_19identity_decomposerEEEvT1_T2_T3_T4_jT5_jj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     36
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:           []
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 4
    .kernarg_segment_size: 0
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _ZN7rocprim6detail39device_merge_sort_compile_time_verifierINS0_36wrapped_merge_sort_block_sort_configINS0_28merge_sort_block_sort_configILj256ELj4ELNS_20block_sort_algorithmE0EEEjhEENS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEEEvv.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           1
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 128
    .name:           _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _ZN7rocprim6detail45device_block_merge_mergepath_partition_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_jPSA_T2_SA_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           1
        .value_kind:     by_value
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 4224
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 128
    .name:           _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_
    .private_segment_fixed_size: 0
    .sgpr_count:     30
    .sgpr_spill_count: 0
    .symbol:         _ZN7rocprim6detail35device_block_merge_mergepath_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_PKSI_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     40
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           1
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 44
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 128
    .name:           _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _ZN7rocprim6detail33device_block_merge_oddeven_kernelINS0_37wrapped_merge_sort_block_merge_configINS_14default_configEjhEEPjN6thrust10device_ptrIjEEPhNS7_IhEEjNS0_19radix_merge_compareILb0ELb0EjNS_19identity_decomposerEEEEEvT0_T1_T2_T3_T4_SI_T5_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
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